diff -Nru linux-3.10.11/debian/changelog linux-3.10-3.10.11/debian/changelog --- linux-3.10.11/debian/changelog 2013-09-10 13:13:17.000000000 +0000 +++ linux-3.10-3.10.11/debian/changelog 2014-04-27 23:24:40.000000000 +0000 @@ -1,3 +1,96 @@ +linux-3.10 (3.10.11-1+rpi6) wheezy-staging; urgency=low + + * Update rpi patches + Set CONFIG_HW_RANDOM_BCM2708=m (LP: 1275337) + + -- Peter Michael Green Sun, 27 Apr 2014 23:23:31 +0000 + +linux-3.10 (3.10.11-1+rpi5) wheezy-staging; urgency=low + + * Update rpi patches. + * Move rtlwifi related part of + bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch + to new patch + bugfix/all/firmware-remove-redundant-log-messages-from-drivers-rtlwifi.patch + and tweak it for compatibility with rpi patches. + * Remove features/all/rt/md-raid5-percpu-handling-rt-aware.patch and + features/all/rt/rwsem-add-rt-variant.patch from series-rt, they conflict + with the rpi patches and we don't build any rt kernels anyway. + + -- Peter Michael Green Mon, 17 Mar 2014 10:07:26 +0000 + +linux-3.10 (3.10.11-1+rpi4) wheezy-staging; urgency=low + + * Enable I2C stuff + * Update rpi patches. + * Remove features/all/rt/sched-* , peter_zijlstra-frob-migrate_disable*, + features/all/rt/workqueue-distangle-from-rq-lock.patch, + features/all/rt/cpu-rt-rework-cpu-down.patch, + features/all/rt/kernel-cpu-fix-cpu-down-problem-if-kthread-s-cpu-is-.patch, + features/all/rt/*preempt-lazy*, + features/all/rt/completion-use-simple-wait-queues.patch + and features/all/rt/rt-sched-* from series-rt as they fail to apply and + we don't build any rt kernels anyway. + + -- Peter Michael Green Fri, 24 Jan 2014 07:46:57 +0000 + +linux-3.10 (3.10.11-1+rpi3) wheezy-staging; urgency=low + + * Really disable libc-dev package. + * Build in USB storage support to allow USB booting without initrd. + * Disable usb storage modules udeb + + -- Peter Michael Green Wed, 01 Jan 2014 17:58:40 +0000 + +linux-3.10 (3.10.11-1+rpi2) wheezy-staging; urgency=low + + * Copy config tweaks from 3.6 packages + * Disable fat modules udeb as fat is built-in + * Update rpi patches. + + -- Peter Michael Green Tue, 31 Dec 2013 15:17:23 +0000 + +linux-3.10 (3.10.11-1+rpi1) wheezy-staging; urgency=low + + [Vagrant Cascadian ] + * disable other armhf variants. + * disable other armhf debian-installer variants. + * attempt to enable debian-installer udebs for rpi. + * try harder to enable debian-installer udebs. + [Peter Michael Green] + * Include patches to support RaspberryPI from: + https://github.com/raspberrypi/linux.git + branch: rpi-3.10.y + * add script to automatically regenerate rpi patches from git repos + * add hack to allow upgrading of kernel located on fat partition to succeed + * disable features/all/rt/net-another-local-irq-disable-alloc-atomic-headache.patch as it fails to apply + * Fix clean target + * Rename source package and disable libc-dev package to allow coexistance with other versions + * Start rpi patch numbers at 1000 rather than 100 so they sort correctly now we have over 900 patches + * disable debian patches that are or may beduplicates of patches generated from rpi git repo + + bugfix/all/ipv6-remove-max_addresses-check-from-ipv6_create_tem.patch + + bugfix/all/HID-* + + all bugfix patches that are specific to non-arm architectures + + features/all/cgroups-Allow-memory-cgroup-support-to-be-included-b.patch + * Remove changes to arch/x86/kernel/microcode_amd.c from debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch + as they conflict with a later patch we generated. + * disable some patches in the rt series as they fail to apply and we don't + actually build any rt kernels anyway. (note: patches were often disabled in + groups, so not all patches may actually have failed to apply) + features/all/rt/hwlatdetect.patch + features/all/rt/hwlat-detector-Update-hwlat_detector-to-add-outer-lo.patch + features/all/rt/mm-convert-swap-to-percpu-locked.patch + features/all/rt/posix-timers-* + all softirq related rt patches + features/all/rt/patch-to-introduce-rcu-bh-qs-where-safe-from-softirq.patch + all KMAP/HIGHMEM patches + features/all/rt/ipc-sem-rework-semaphore-wakeups.patch + features/all/rt/peterz-srcu-crypto-chain.patch + all the softirq patches. + features/all/rt/move_sched_delayed_work_to_helper.patch + + -- Peter Michael Green Mon, 23 Dec 2013 01:34:25 +0000 + linux (3.10.11-1) unstable; urgency=low * New upstream stable update: diff -Nru linux-3.10.11/debian/config/armhf/config.rpi linux-3.10-3.10.11/debian/config/armhf/config.rpi --- linux-3.10.11/debian/config/armhf/config.rpi 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/config/armhf/config.rpi 2014-04-27 23:25:33.000000000 +0000 @@ -0,0 +1,186 @@ +## +## file: arch/arm/Kconfig +CONFIG_ARCH_BCM2708=y + +# Enable MMC +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_BCM2708=y +CONFIG_MMC_SDHCI_BCM2708_DMA=y +# +# MMC/SD/SDIO Card Drivers +# +CONFIG_MMC_BLOCK=y +CONFIG_MMC_BLOCK_MINORS=8 +CONFIG_MMC_BLOCK_BOUNCE=y + +# +# Boot options +# +CONFIG_CMDLINE_FROM_BOOTLOADER=y + +# +# Non-8250 serial port support +# +# CONFIG_SERIAL_AMBA_PL010 is not set +CONFIG_SERIAL_AMBA_PL011=y +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y + +# Serial Console +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_CONSOLE_POLL=y + +CONFIG_TTY_PRINTK=y + +# +# I2C system bus drivers (mostly embedded / system-on-chip) +# +CONFIG_I2C_BCM2708=m +CONFIG_I2C_BCM2708_BAUDRATE=100000 + +CONFIG_SPI=y +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +CONFIG_SPI_BCM2708=m + +# +# SPI Protocol Masters +# +CONFIG_SPI_SPIDEV=m + +# +# Enable Device Drivers -> PPS to see the PTP clock options. +# +CONFIG_ARCH_REQUIRE_GPIOLIB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y + +CONFIG_THERMAL=y +CONFIG_THERMAL_BCM2835=y + +CONFIG_WATCHDOG=y + +# +# Watchdog Device Drivers +# +CONFIG_BCM2708_WDT=m + +# +# Audio decoders, processors and mixers +# +CONFIG_VIDEO_MSP3400=m +CONFIG_VIDEO_CS53L32A=m +CONFIG_VIDEO_WM8775=m + +# +# Video decoders +# +CONFIG_VIDEO_SAA711X=m + +# +# Video and audio decoders +# +# CONFIG_VIDEO_SAA717X is not set +CONFIG_VIDEO_CX25840=m + +# +# MPEG video encoders +# +CONFIG_VIDEO_CX2341X=m + +# +# Graphics support +# +CONFIG_FB=y +##CONFIG_FB_CFB_FILLRECT=y +##CONFIG_FB_CFB_COPYAREA=y +##CONFIG_FB_CFB_IMAGEBLIT=y + +# +# Frame buffer hardware drivers +# +CONFIG_FB_BCM2708=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_LCD_CLASS_DEVICE=m +CONFIG_BACKLIGHT_CLASS_DEVICE=m +CONFIG_BACKLIGHT_GENERIC=m + +# +# Console display driver support +# +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y +## CONFIG_FONTS is not set +##CONFIG_FONT_8x8=y +##CONFIG_FONT_8x16=y + +# Sound +CONFIG_SND_BCM2835=m + +# +# File systems +# +CONFIG_EXT4_FS=y +CONFIG_EXT4_USE_FOR_EXT23=y +CONFIG_EXT4_FS_XATTR=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y + +CONFIG_USB=y + +# USB controller for RPI? +CONFIG_USB_DWCOTG=y + +# USB network for RPI? +CONFIG_USB_USBNET=y +CONFIG_USB_NET_SMSC95XX=y + +# Hopefully make SD card status LED work +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_CLASS=y + +# Build in fat related stuff +CONFIG_VFAT_FS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_UTF8=y + +# Build in stuff needed for usb keyboard +CONFIG_HID=y +CONFIG_HIDRAW=y +CONFIG_HID_GENERIC=y +CONFIG_HID_WIIMOTE_EXT=y +CONFIG_USB_HID=y +CONFIG_HID_PID=y +CONFIG_USB_HIDDEV=y + +# build in devtmpfs stuff to allow working without udev +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y + +# build in USB mass storage support at hifi's request. +CONFIG_USB_STORAGE=y + +# I2C stuff requested by Gilligan94 and hifi +CONFIG_REGMAP_I2C=m +CONFIG_INPUT_AD714X_I2C=m +CONFIG_INPUT_ADXL34X_I2C=m +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_CHARDEV=m +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_ALGOBIT=m +CONFIG_I2C_BCM2708=m +CONFIG_I2C_BCM2708_BAUDRATE=100000 +CONFIG_I2C_SI470X=m +CONFIG_I2C_SI4713=m +CONFIG_VIDEO_IR_I2C=m +CONFIG_SND_SOC_I2C_AND_SPI=m + +#hardware RNG requested by red ink +CONFIG_HW_RANDOM_BCM2708=m \ No newline at end of file diff -Nru linux-3.10.11/debian/config/armhf/defines linux-3.10-3.10.11/debian/config/armhf/defines --- linux-3.10.11/debian/config/armhf/defines 2013-07-15 01:16:43.000000000 +0000 +++ linux-3.10-3.10.11/debian/config/armhf/defines 2013-12-23 01:34:43.000000000 +0000 @@ -1,9 +1,6 @@ [base] flavours: - armmp - mx5 - omap - vexpress + rpi kernel-arch: arm [image] @@ -43,3 +40,11 @@ hardware: ARM Ltd. Versatile Express hardware-long: ARM Ltd. Versatile Express family of processors +[rpi_build] +image-file: arch/arm/boot/zImage + +[rpi_description] +hardware: RaspberryPI +hardware-long: Raspberry PI + + diff -Nru linux-3.10.11/debian/config.defines.dump linux-3.10-3.10.11/debian/config.defines.dump --- linux-3.10.11/debian/config.defines.dump 2013-09-10 13:13:31.000000000 +0000 +++ linux-3.10-3.10.11/debian/config.defines.dump 2014-04-28 01:24:30.000000000 +0000 @@ -8,1091 +8,1086 @@ dict p3 (dp4 -(S'build' -S's390x' +(S'description' +S'armel' p5 -NS's390x' +NS'iop32x' tp6 (dp7 -S'debug-info' +S'hardware' p8 -I01 +S'IOP32x' +p9 +sS'hardware-long' +p10 +S'IOP32x based systems (Thecus N2100, etc)' +p11 ss(S'image' S'amd64' -p9 -tp10 -(dp11 -S'configs' p12 -(lp13 +tp13 +(dp14 +S'configs' +p15 +(lp16 sS'bootloaders' -p14 -(lp15 +p17 +(lp18 S'grub-pc' -p16 +p19 aS'extlinux' -p17 +p20 aS'lilo' -p18 -ass(S'build' -S'armel' -p19 -NS'ixp4xx' -tp20 -(dp21 -S'image-file' +p21 +ass(S'description' +S'alpha' p22 +NS'alpha-smp' +tp23 +(dp24 +S'hardware' +p25 +S'Alpha SMP' +p26 +sS'hardware-long' +p27 +S'DEC Alpha SMP systems with extended kernel start address (Wildfire, Titan, Marvel)' +p28 +ss(S'build' +g5 +NS'iop32x' +tp29 +(dp30 +S'image-file' +p31 S'arch/arm/boot/zImage' -p23 +p32 ss(S'base' -g9 +g12 S'none' -p24 -tp25 -(dp26 -S'flavours' -p27 -(lp28 -S'amd64' -p29 -ass(S'base' -S'hppa' -p30 -NS'parisc64-smp' -tp31 -(dp32 -S'override-host-type' p33 -S'hppa64-linux-gnu' -p34 -sS'cflags' -p35 -S'-fno-cse-follow-jumps' +tp34 +(dp35 +S'flavours' p36 -ss(S'build' -g19 -NS'iop32x' -tp37 -(dp38 -S'image-file' +(lp37 +S'amd64' +p38 +ass(S'description' +S'ia64' p39 -S'arch/arm/boot/zImage' -p40 -ss(S'image' -S'sparc' -p41 -NS'sparc32' -tp42 -(dp43 -S'image-postproc' -p44 -S'sparc32-image-postproc' -p45 +NS'mckinley' +tp40 +(dp41 +S'hardware' +p42 +S'Itanium II' +p43 ss(S'image' -S'ia64' -p46 -tp47 -(dp48 +g39 +tp44 +(dp45 S'suggests' -p49 +p46 S'fdutils' -p50 +p47 sS'bootloaders' -p51 -(lp52 +p48 +(lp49 S'elilo' -p53 -ass(S'image' -g5 -NS's390x' -tp54 -(dp55 -S'configs' -p56 -(lp57 -S's390/config.s390x' -p58 +p50 ass(S'xen' S'i386' -p59 +p51 S'none' -p60 +p52 S'amd64' -tp61 -(dp62 +tp53 +(dp54 S'flavours' -p63 -(lp64 +p55 +(lp56 S'amd64' -p65 +p57 ass(S'version' -p66 -tp67 -(dp68 +p58 +tp59 +(dp60 S'abiname' -p69 +p61 S'3.10-3' -p70 +p62 sS'source' -p71 -V3.10.11-1 -p72 +p63 +V3.10.11-1+rpi6 +p64 ss(S'description' -g9 -g24 +g12 +g33 S'amd64' -tp73 -(dp74 +tp65 +(dp66 S'parts' -p75 -(lp76 +p67 +(lp68 S'xen' -p77 +p69 ass(S'description' -S'sparc64' -p78 -NS'sparc64-smp' -tp79 -(dp80 -S'hardware' -p81 -S'multiprocessor 64-bit UltraSPARC' -p82 -ss(S'description' -g30 -NS'parisc-smp' -tp83 -(dp84 +g22 +NS'alpha-generic' +tp70 +(dp71 S'hardware' -p85 -S'multiprocessor 32-bit PA-RISC' -p86 -ss(S'image' +p72 +S'Alpha' +p73 +sS'hardware-long' +p74 +S'DEC Alpha systems with extended kernel start address (Wildfire, Titan, Marvel)' +p75 +ss(S'build' S'armhf' +p76 +NS'armmp' +tp77 +(dp78 +S'image-file' +p79 +S'arch/arm/boot/zImage' +p80 +ss(S'base' +g22 +tp81 +(dp82 +S'kernel-arch' +p83 +S'alpha' +p84 +sS'featuresets' +p85 +(lp86 +S'none' p87 -NS'omap' -tp88 -(dp89 -S'recommends' -p90 -S'uboot-mkimage' +ass(S'image' +S'mipsel' +p88 +NS'sb1-bcm91250a' +tp89 +(dp90 +S'configs' p91 -ss(S'description' -S'ppc64' -p92 -NS'powerpc64' -tp93 -(dp94 -S'hardware' -p95 -S'64-bit PowerPC' -p96 -ss(S'base' +(lp92 +S'mips/config.sb1-bcm91250a' +p93 +ass(S'build' +S'sh4' +p94 +NS'sh7751r' +tp95 +(dp96 +S'image-file' p97 -g87 -S'none' +S'arch/sh/boot/zImage' p98 -tp99 -(dp100 +ss(S'base' +p99 +g76 +g87 +tp100 +(dp101 S'implicit-flavour' -p101 +p102 I01 sS'flavours' -p102 -(lp103 -S'armmp' -p104 -aS'mx5' +p103 +(lp104 +S'rpi' p105 -aS'omap' -p106 -aS'vexpress' -p107 -ass(S'description' -g19 -NS'iop32x' -tp108 -(dp109 -S'hardware' +ass(S'image' +g51 +NS'amd64' +tp106 +(dp107 +S'configs' +p108 +(lp109 +S'kernelarch-x86/config-arch-64' p110 -S'IOP32x' +asS'recommends' p111 -sS'hardware-long' +S'libc6-i686' p112 -S'IOP32x based systems (Thecus N2100, etc)' -p113 -ss(S'base' -g59 -S'rt' -tp114 -(dp115 -S'flavours' +ss(S'description' +g76 +NS'vexpress' +tp113 +(dp114 +S'hardware' +p115 +S'ARM Ltd. Versatile Express' p116 -(lp117 -S'686-pae' +sS'hardware-long' +p117 +S'ARM Ltd. Versatile Express family of processors' p118 -ass(S'description' -S'sh4' +ss(S'description' +S'hppa' p119 -NS'sh7785lcr' +NS'parisc64' tp120 (dp121 S'hardware' p122 -S'sh7785lcr' +S'64-bit PA-RISC' p123 -sS'hardware-long' -p124 -S'Renesas SH7785 reference board' -p125 -ss(S'image' -g19 -NS'ixp4xx' -tp126 -(dp127 -S'check-size' +ss(S'base' +g51 +S'rt' +tp124 +(dp125 +S'flavours' +p126 +(lp127 +S'686-pae' p128 -S'1441760' +ass(S'description' +S'powerpc' p129 -sS'configs' -p130 -(lp131 -S'armel/config-reduced' +NS'powerpc' +tp130 +(dp131 +S'hardware' p132 -aS'armel/config.ixp4xx' +S'uniprocessor 32-bit PowerPC' p133 -ass(g97 -S'powerpc' -p134 -g98 -tp135 -(dp136 -g101 -I01 -sg102 -(lp137 -S'powerpc' +ss(S'description' +g88 +NS'loongson-2f' +tp134 +(dp135 +S'hardware' +p136 +S'Loongson 2F' +p137 +sS'hardware-long' p138 -aS'powerpc-smp' +S'Lemote Loongson 2F systems' p139 -aS'powerpc64' -p140 -ass(S'image' -g134 -tp141 -(dp142 -S'suggests' +ss(g99 +g129 +g87 +tp140 +(dp141 +g102 +I01 +sg103 +(lp142 +S'powerpc' p143 -S'mkvmlinuz' +aS'powerpc-smp' p144 +aS'powerpc64' +p145 +ass(S'build' +g76 +NS'omap' +tp146 +(dp147 +S'image-file' +p148 +S'arch/arm/boot/zImage' +p149 ss(S'description' -g134 -NS'powerpc-smp' -tp145 -(dp146 +S'mips' +p150 +NS'r4k-ip22' +tp151 +(dp152 S'hardware' -p147 -S'multiprocessor 32-bit PowerPC' -p148 -ss(S'base' -g9 -S'rt' -tp149 -(dp150 -S'flavours' -p151 -(lp152 -S'amd64' p153 -ass(S'description' -g59 -g60 -S'amd64' -tp154 -(dp155 -S'parts' +S'SGI IP22' +p154 +sS'hardware-long' +p155 +S'SGI IP22 systems (Indy, Indigo2)' p156 -(lp157 -S'xen' -p158 -ass(S'base' -g59 -tp159 -(dp160 -S'kernel-arch' +ss(S'description' +g76 +NS'rpi' +tp157 +(dp158 +S'hardware' +p159 +S'RaspberryPI' +p160 +sS'hardware-long' p161 -S'x86' +S'Raspberry PI' p162 -sS'featuresets' -p163 -(lp164 -S'none' +ss(S'description' +g51 +NS'686-pae' +tp163 +(dp164 +S'hardware' p165 -aS'rt' +S'modern PCs' p166 -ass(S'description' -g30 -NS'parisc64' -tp167 -(dp168 -S'hardware' +sS'parts' +p167 +(lp168 +S'pae' p169 -S'64-bit PA-RISC' +asS'hardware-long' p170 -ss(S'base' -S'mipsel' +S'PCs with one or more processors supporting PAE' p171 +ss(S'base' +g12 +S'rt' tp172 (dp173 -S'kernel-arch' +S'flavours' p174 -S'mips' -p175 -sS'featuresets' +(lp175 +S'amd64' p176 -(lp177 -g98 -ass(S'image' -g19 -NS'orion5x' -tp178 -(dp179 -S'check-size' +ass(S'description' +g94 +NS'sh7785lcr' +tp177 +(dp178 +S'hardware' +p179 +S'sh7785lcr' p180 -S'1572792' +sS'hardware-long' p181 -sS'configs' +S'Renesas SH7785 reference board' p182 -(lp183 -S'armel/config-reduced' -p184 -aS'armel/config.orion5x' +ss(S'description' +g51 +g52 +S'amd64' +tp183 +(dp184 +S'parts' p185 -asS'recommends' -p186 -S'uboot-mkimage' +(lp186 +S'xen' p187 -ss(S'base' -S'powerpcspe' -p188 -tp189 -(dp190 +ass(S'base' +g51 +tp188 +(dp189 S'kernel-arch' +p190 +S'x86' p191 -S'powerpc' +sS'featuresets' p192 -sg176 (lp193 -g98 -ass(g97 -g171 -g98 -tp194 -(dp195 -g101 -I01 -sg102 -(lp196 -S'r5k-cobalt' -p197 -aS'sb1-bcm91250a' +S'none' +p194 +aS'rt' +p195 +ass(S'base' +g88 +tp196 +(dp197 +S'kernel-arch' p198 -aS'sb1a-bcm91480b' +S'mips' p199 -aS'4kc-malta' -p200 -aS'5kc-malta' -p201 -aS'loongson-2f' -p202 -ass(S'description' -S'm68k' +sg85 +(lp200 +g87 +ass(S'base' +tp201 +(dp202 +S'arches' p203 -NS'm68k' -tp204 -(dp205 -S'hardware' +(lp204 +S'alpha' +p205 +aS'amd64' p206 -S'Motorola MC68020+ family' +aS'armel' p207 -ss(S'image' -g9 -NS'amd64' -tp208 -(dp209 -S'configs' +aS'armhf' +p208 +aS'hppa' +p209 +aS'i386' p210 -(lp211 -S'kernelarch-x86/config-arch-64' +aS'ia64' +p211 +aS'm68k' p212 -ass(S'description' -g188 -tp213 -(dp214 -S'hardware' +aS'mips' +p213 +aS'mipsel' +p214 +aS'powerpc' p215 -S'32-bit PowerPC with SPE (instead of AltiVec) with SMP support' +aS'powerpcspe' p216 -ss(S'base' -g30 -NS'parisc64' -tp217 -(dp218 -S'override-host-type' +aS'ppc64' +p217 +aS's390' +p218 +aS's390x' p219 -S'hppa64-linux-gnu' +aS'sh4' p220 -sS'cflags' +aS'sparc' p221 -S'-fno-cse-follow-jumps' +aS'sparc64' p222 -ss(S'image' -g78 -NS'sparc64' -tp223 -(dp224 -S'configs' -p225 -(lp226 -S'sparc/config.sparc64' +aS'x32' +p223 +asS'featuresets' +p224 +(lp225 +S'none' +p226 +aS'rt' p227 -ass(S'description' -g171 -NS'sb1-bcm91250a' -tp228 -(dp229 -S'hardware' -p230 -S'BCM91250A' -p231 -sS'hardware-long' +asS'compiler' +p228 +S'gcc-4.7' +p229 +ss(S'image' +g5 +NS'kirkwood' +tp230 +(dp231 +S'check-size' p232 -S'Broadcom BCM91250A systems (aka SWARM)' +S'2097080' p233 -ss(S'build' -g19 -NS'orion5x' -tp234 -(dp235 -S'image-file' +sS'recommends' +p234 +S'uboot-mkimage' +p235 +ss(S'image' +S'sparc64' p236 -S'arch/arm/boot/zImage' -p237 -ss(S'description' -g46 -NS'mckinley' -tp238 -(dp239 -S'hardware' -p240 -S'Itanium II' +NS'sparc64-smp' +tp237 +(dp238 +S'configs' +p239 +(lp240 +S'sparc/config.sparc64-smp' p241 -ss(S'description' -S'alpha' -p242 -NS'alpha-smp' -tp243 -(dp244 -S'hardware' +ass(g99 +g88 +g87 +tp242 +(dp243 +g102 +I01 +sg103 +(lp244 +S'r5k-cobalt' p245 -S'Alpha SMP' +aS'sb1-bcm91250a' p246 -sS'hardware-long' +aS'sb1a-bcm91480b' p247 -S'DEC Alpha SMP systems with extended kernel start address (Wildfire, Titan, Marvel)' +aS'4kc-malta' p248 -ss(g97 -g119 -g98 -tp249 -(dp250 -g101 -I01 -sg102 -(lp251 -S'sh7751r' -p252 -aS'sh7785lcr' +aS'5kc-malta' +p249 +aS'loongson-2f' +p250 +ass(S'description' +g88 +NS'4kc-malta' +tp251 +(dp252 +S'hardware' p253 -ass(S'build' -g119 -NS'sh7751r' -tp254 -(dp255 -S'image-file' +S'MIPS Malta' +p254 +sS'hardware-long' +p255 +S'MIPS Malta boards' p256 -S'arch/sh/boot/zImage' -p257 ss(S'description' -g19 -NS'mv78xx0' +S'powerpcspe' +p257 tp258 (dp259 S'hardware' p260 -S'Marvell 78xx0' +S'32-bit PowerPC with SPE (instead of AltiVec) with SMP support' p261 -sS'hardware-long' -p262 -S'Marvell DB-78xx0-BP Development Board' -p263 -ss(S'image' -g59 -NS'amd64' -tp264 -(dp265 -S'configs' +ss(S'relations' +tp262 +(dp263 +S'gcc-4.8' +p264 +S'gcc-4.8' +p265 +sS'initramfs-fallback' p266 -(lp267 -S'kernelarch-x86/config-arch-64' +S'linux-initramfs-tool' +p267 +sS'gcc-4.7' p268 -asS'recommends' +S'gcc-4.7' p269 -S'libc6-i686' +sS'gcc-4.6' p270 -ss(S'base' -g19 -tp271 -(dp272 -S'kernel-arch' +S'gcc-4.6' +p271 +sS'gcc-4.4' +p272 +S'gcc-4.4' p273 -S'arm' +sS'initramfs-tools' p274 -sg176 -(lp275 -g98 -ass(S'image' -g78 -NS'sparc64-smp' +S'initramfs-tools (>= 0.110~)' +p275 +ss(S'image' +g12 +NS'amd64' tp276 (dp277 S'configs' p278 (lp279 -S'sparc/config.sparc64-smp' +S'kernelarch-x86/config-arch-64' p280 -ass(S'base' -g41 -tp281 -(dp282 -S'kernel-arch' -p283 -S'sparc' -p284 -sg176 -(lp285 -g98 ass(S'description' -g9 -NS'amd64' +S'ppc64' +p281 +NS'powerpc64' +tp282 +(dp283 +S'hardware' +p284 +S'64-bit PowerPC' +p285 +ss(S'build' +g5 +NS'kirkwood' tp286 (dp287 -S'hardware' +S'image-file' p288 -S'64-bit PCs' +S'arch/arm/boot/zImage' p289 +ss(S'description' +g76 +NS'mx5' +tp290 +(dp291 +S'hardware' +p292 +S'Freescale i.MX51/53' +p293 sS'hardware-long' -p290 -S'PCs with AMD64, Intel 64 or VIA Nano processors' -p291 -ss(S'base' -g242 -tp292 -(dp293 -S'kernel-arch' p294 -S'alpha' +S'Freescale i.MX51 or i.MX53 based systems' p295 -sg176 -(lp296 -g98 -ass(S'base' +ss(g99 +g94 g87 -tp297 -(dp298 -S'kernel-arch' +tp296 +(dp297 +g102 +I01 +sg103 +(lp298 +S'sh7751r' p299 -S'arm' +aS'sh7785lcr' p300 -sg176 -(lp301 -g98 -ass(S'description' -S'mips' -p302 -NS'4kc-malta' -tp303 -(dp304 -S'hardware' -p305 -S'MIPS Malta' -p306 -sS'hardware-long' +ass(S'build' +g5 +NS'orion5x' +tp301 +(dp302 +S'image-file' +p303 +S'arch/arm/boot/zImage' +p304 +ss(S'base' +g5 +tp305 +(dp306 +S'kernel-arch' p307 -S'MIPS Malta boards' +S'arm' p308 -ss(S'description' -NS'rt' -p309 -tp310 -(dp311 -S'part-long-rt' -p312 -S'This kernel includes the PREEMPT_RT realtime patch set.' +sg85 +(lp309 +g87 +ass(S'base' +S'sparc' +p310 +tp311 +(dp312 +S'kernel-arch' p313 -sS'parts' +S'sparc' p314 +sg85 (lp315 -S'rt' -p316 -asS'part-short-rt' -p317 -S'PREEMPT_RT' +g87 +ass(S'base' +g257 +tp316 +(dp317 +S'kernel-arch' p318 -ss(g97 -S's390' +S'powerpc' p319 -g98 -tp320 -(dp321 -g101 -I01 -sg102 -(lp322 -S's390x' +sg85 +(lp320 +g87 +ass(S'description' +g129 +NS'powerpc-smp' +tp321 +(dp322 +S'hardware' p323 -ass(g97 -g5 -g98 -tp324 -(dp325 -g101 -I01 -sg102 -(lp326 -S's390x' +S'multiprocessor 32-bit PowerPC' +p324 +ss(S'description' +g12 +NS'amd64' +tp325 +(dp326 +S'hardware' p327 -ass(S'base' -g302 -tp328 -(dp329 -S'kernel-arch' +S'64-bit PCs' +p328 +sS'hardware-long' +p329 +S'PCs with AMD64, Intel 64 or VIA Nano processors' p330 -S'mips' +ss(g99 +S's390' p331 -sg176 -(lp332 -g98 +g87 +tp332 +(dp333 +g102 +I01 +sg103 +(lp334 +S's390x' +p335 ass(S'description' -g319 -NS's390' -tp333 -(dp334 +g310 +NS'sparc64' +tp336 +(dp337 S'hardware' -p335 -S'IBM S/390' -p336 -ss(S'build' -g9 -tp337 -(dp338 -S'debug-info' +p338 +S'uniprocessor 64-bit UltraSPARC' p339 +ss(g99 +S's390x' +p340 +g87 +tp341 +(dp342 +g102 I01 -ss(S'image' -g59 -NS'486' -tp340 -(dp341 -S'configs' -p342 +sg103 (lp343 -S'kernelarch-x86/config-arch-32' +S's390x' p344 -aS'i386/config.486' -p345 -ass(S'build' -g119 -NS'sh7785lcr' -tp346 -(dp347 -S'image-file' +ass(S'base' +g150 +tp345 +(dp346 +S'kernel-arch' +p347 +S'mips' p348 -S'arch/sh/boot/zImage' -p349 -ss(S'description' -g46 -NS'itanium' +sg85 +(lp349 +g87 +ass(S'build' +g12 tp350 (dp351 -S'hardware' +S'debug-info' p352 -S'Itanium' -p353 +I01 ss(S'image' -g171 -tp354 -(dp355 +g88 +tp353 +(dp354 S'initramfs' -p356 +p355 I00 +ss(S'description' +g150 +NS'5kc-malta' +tp356 +(dp357 +S'hardware' +p358 +S'MIPS Malta (64-bit)' +p359 +sS'hardware-long' +p360 +S'MIPS Malta boards (64-bit)' +p361 +ss(S'description' +g39 +NS'itanium' +tp362 +(dp363 +S'hardware' +p364 +S'Itanium' +p365 ss(S'xen' -g59 -g60 +g51 +g52 S'686-pae' -tp357 -(dp358 +tp366 +(dp367 S'flavours' -p359 -(lp360 +p368 +(lp369 S'i386' -p361 +p370 aS'amd64' -p362 +p371 ass(S'description' -g134 -NS'powerpc64' -tp363 -(dp364 -S'hardware' -p365 -S'64-bit PowerPC' -p366 -ss(S'build' -g87 -NS'omap' -tp367 -(dp368 -S'image-file' -p369 -S'arch/arm/boot/zImage' -p370 -ss(S'description' -g302 -NS'5kc-malta' -tp371 -(dp372 +g5 +NS'kirkwood' +tp372 +(dp373 S'hardware' -p373 -S'MIPS Malta (64-bit)' p374 -sS'hardware-long' +S'Marvell Kirkwood' p375 -S'MIPS Malta boards (64-bit)' +sS'hardware-long' p376 +S'Marvell Kirkwood based systems (SheevaPlug, QNAP TS-119/TS-219, etc)' +p377 +ss(S'description' +g5 +NS'mv78xx0' +tp378 +(dp379 +S'hardware' +p380 +S'Marvell 78xx0' +p381 +sS'hardware-long' +p382 +S'Marvell DB-78xx0-BP Development Board' +p383 ss(S'base' -g9 -tp377 -(dp378 +g12 +tp384 +(dp385 S'kernel-arch' -p379 +p386 S'x86' -p380 +p387 sS'featuresets' -p381 -(lp382 +p388 +(lp389 S'none' -p383 +p390 aS'rt' -p384 +p391 ass(S'base' -g46 -tp385 -(dp386 +g39 +tp392 +(dp393 S'kernel-arch' -p387 +p394 S'ia64' -p388 -sg176 -(lp389 -g98 -ass(S'description' -g41 -NS'sparc32' -tp390 -(dp391 -S'hardware' -p392 -S'uniprocessor sparc32 (sun4m)' -p393 -ss(S'description' +p395 +sg85 +(lp396 g87 -NS'omap' -tp394 -(dp395 -S'hardware' -p396 -S'TI OMAP3+' -p397 -sS'hardware-long' -p398 -S'Texas Instruments OMAP3 or OMAP4 based systems' +ass(S'image' +g94 +NS'sh7785lcr' +tp397 +(dp398 +S'check-size' p399 +S'4194304' +p400 +sS'recommends' +p401 +S'uboot-mkimage' +p402 ss(S'description' -g59 -NS'amd64' -tp400 -(dp401 +g119 +NS'parisc64-smp' +tp403 +(dp404 S'hardware' -p402 -S'64-bit PCs' -p403 -sS'parts' -p404 -(lp405 -S'xen' +p405 +S'multiprocessor 64-bit PA-RISC' p406 -asS'hardware-long' -p407 -S'PCs with AMD64, Intel 64 or VIA Nano processors' -p408 -ss(g97 -g92 -g98 -tp409 -(dp410 -g101 +ss(S'image' +g310 +NS'sparc32' +tp407 +(dp408 +S'image-postproc' +p409 +S'sparc32-image-postproc' +p410 +ss(g99 +g281 +g87 +tp411 +(dp412 +g102 I01 -sg102 -(lp411 +sg103 +(lp413 S'powerpc64' -p412 +p414 ass(S'base' -g319 -tp413 -(dp414 +g331 +tp415 +(dp416 S'kernel-arch' -p415 +p417 S's390' -p416 -sg176 -(lp417 -g98 -ass(g97 -g19 -g98 -tp418 -(dp419 -g101 +p418 +sg85 +(lp419 +g87 +ass(g99 +g5 +g87 +tp420 +(dp421 +g102 I01 -sg102 -(lp420 +sg103 +(lp422 S'iop32x' -p421 +p423 aS'ixp4xx' -p422 +p424 aS'kirkwood' -p423 +p425 aS'mv78xx0' -p424 +p426 aS'orion5x' -p425 +p427 aS'versatile' -p426 -ass(S'description' -g5 +p428 +ass(S'image' +g340 NS's390x' -tp427 -(dp428 -S'hardware' -p429 -S'IBM zSeries' -p430 -ss(S'image' -g19 -NS'iop32x' -tp431 -(dp432 -S'check-size' +tp429 +(dp430 +S'configs' +p431 +(lp432 +S's390/config.s390x' p433 -S'1441784' -p434 -sS'configs' -p435 -(lp436 -S'armel/config-reduced' -p437 -aS'armel/config.iop32x' +ass(S'image' +g51 +NS'686-pae' +tp434 +(dp435 +S'configs' +p436 +(lp437 +S'kernelarch-x86/config-arch-32' p438 -ass(S'description' -g302 -NS'sb1a-bcm91480b' -tp439 -(dp440 -S'hardware' +aS'i386/config.686-pae' +p439 +asS'recommends' +p440 +S'libc6-i686' p441 -S'BCM91480B' -p442 -sS'hardware-long' -p443 -S'Broadcom BCM91480B systems (aka BigSur)' -p444 ss(S'description' -g59 -tp445 -(dp446 -S'part-long-pae' +g94 +NS'sh7751r' +tp442 +(dp443 +S'hardware' +p444 +S'sh7751r' +p445 +sS'hardware-long' +p446 +S'Renesas SH7751R R2D plus board' p447 -S'This kernel requires PAE (Physical Address Extension).\nThis feature is supported by the Intel Pentium Pro/II/III/4/4M/D, Xeon,\nCore and Atom; AMD Geode NX, Athlon (K7), Duron, Opteron, Sempron,\nTurion or Phenom; Transmeta Efficeon; VIA C7; and some other processors.' -p448 -ss(S'relations' -tp449 -(dp450 -S'gcc-4.8' +ss(S'description' +g88 +NS'sb1-bcm91250a' +tp448 +(dp449 +S'hardware' +p450 +S'BCM91250A' p451 -S'gcc-4.8' +sS'hardware-long' p452 -sS'initramfs-fallback' +S'Broadcom BCM91250A systems (aka SWARM)' p453 -S'linux-initramfs-tool' -p454 -sS'gcc-4.7' -p455 -S'gcc-4.7' +ss(S'description' +g51 +tp454 +(dp455 +S'part-long-pae' p456 -sS'gcc-4.6' +S'This kernel requires PAE (Physical Address Extension).\nThis feature is supported by the Intel Pentium Pro/II/III/4/4M/D, Xeon,\nCore and Atom; AMD Geode NX, Athlon (K7), Duron, Opteron, Sempron,\nTurion or Phenom; Transmeta Efficeon; VIA C7; and some other processors.' p457 -S'gcc-4.6' -p458 -sS'gcc-4.4' -p459 -S'gcc-4.4' +ss(S'base' +g51 +g52 +tp458 +(dp459 +S'flavours' p460 -sS'initramfs-tools' -p461 -S'initramfs-tools (>= 0.110~)' +(lp461 +S'486' p462 -ss(S'image' -g87 -tp463 -(dp464 -S'suggests' -p465 -S'fdutils' -p466 -sS'configs' -p467 -(lp468 -S'armel/config' -p469 -aS'armhf/config' -p470 +aS'686-pae' +p463 +aS'amd64' +p464 ass(S'xen' -g9 -g24 +g12 +g33 S'amd64' -tp471 -(dp472 +tp465 +(dp466 S'flavours' -p473 -(lp474 +p467 +(lp468 S'amd64' -p475 +p469 ass(S'image' -g19 -tp476 -(dp477 +g5 +tp470 +(dp471 S'suggests' -p478 +p472 S'fdutils' -p479 +p473 ss(S'image' -g319 -tp480 -(dp481 +g331 +tp474 +(dp475 S'bootloaders' -p482 -(lp483 +p476 +(lp477 S's390-tools' -p484 +p478 ass(S'image' -g30 -tp485 -(dp486 -S'suggests' +g88 +NS'loongson-2f' +tp479 +(dp480 +S'recommends' +p481 +S'libc6-loongson2f' +p482 +ss(S'description' +NS'rt' +p483 +tp484 +(dp485 +S'part-long-rt' +p486 +S'This kernel includes the PREEMPT_RT realtime patch set.' p487 -S'palo' +sS'parts' p488 -ss(S'image' -g188 -tp489 -(dp490 -S'suggests' +(lp489 +S'rt' +p490 +asS'part-short-rt' p491 -S'mkvmlinuz' +S'PREEMPT_RT' p492 -sS'configs' -p493 -(lp494 -S'powerpc/config' +ss(S'image' +g119 +tp493 +(dp494 +S'suggests' p495 -aS'powerpcspe/config.powerpcspe' +S'palo' p496 -ass(S'relations' -g30 +ss(S'description' +g129 +NS'powerpc64' tp497 (dp498 -S'gcc-4.4' +S'hardware' p499 -S'gcc-4.4, binutils-hppa64, gcc-4.4-hppa64' +S'64-bit PowerPC' p500 ss(S'image' -g171 -NS'loongson-2f' +g257 tp501 (dp502 -S'recommends' +S'suggests' p503 -S'libc6-loongson2f' +S'mkvmlinuz' p504 -ss(S'description' -g171 -NS'5kc-malta' -tp505 -(dp506 -S'hardware' +sS'configs' +p505 +(lp506 +S'powerpc/config' p507 -S'MIPS Malta (64-bit)' +aS'powerpcspe/config.powerpcspe' p508 -sS'hardware-long' -p509 -S'MIPS Malta boards (64-bit)' -p510 +ass(S'relations' +g119 +tp509 +(dp510 +S'gcc-4.4' +p511 +S'gcc-4.4, binutils-hppa64, gcc-4.4-hppa64' +p512 +ss(S'build' +g76 +NS'vexpress' +tp513 +(dp514 +S'image-file' +p515 +S'arch/arm/boot/zImage' +p516 ss(S'image' -g171 -NS'sb1a-bcm91480b' -tp511 -(dp512 +g51 +NS'486' +tp517 +(dp518 S'configs' -p513 -(lp514 -S'mips/config.sb1a-bcm91480b' -p515 -ass(S'build' -g319 -NS's390x' -tp516 -(dp517 -S'debug-info' -p518 -I01 -ss(S'description' -g78 -NS'sparc64' -tp519 -(dp520 -S'hardware' +p519 +(lp520 +S'kernelarch-x86/config-arch-32' p521 -S'uniprocessor 64-bit UltraSPARC' +aS'i386/config.486' p522 -ss(g97 -g30 -g98 +ass(g99 +g119 +g87 tp523 (dp524 -g101 +g102 I01 -sg102 +sg103 (lp525 S'parisc' p526 @@ -1103,895 +1098,916 @@ aS'parisc64-smp' p529 ass(S'description' -g87 -NS'vexpress' +g88 +NS'sb1a-bcm91480b' tp530 (dp531 S'hardware' p532 -S'ARM Ltd. Versatile Express' +S'BCM91480B' p533 sS'hardware-long' p534 -S'ARM Ltd. Versatile Express family of processors' +S'Broadcom BCM91480B systems (aka BigSur)' p535 ss(S'image' -g242 +g22 tp536 (dp537 S'suggests' p538 S'aboot, fdutils' p539 -ss(S'description' -g302 -NS'r5k-ip32' +ss(S'image' +g281 +NS'powerpc64' tp540 (dp541 -S'hardware' +S'configs' p542 -S'SGI IP32' -p543 -sS'hardware-long' +(lp543 +S'powerpc/config.powerpc64' p544 -S'SGI IP32 systems (O2)' -p545 -ss(S'description' -g41 -NS'sparc64-smp' -tp546 -(dp547 -S'hardware' +ass(S'base' +g236 +tp545 +(dp546 +S'kernel-arch' +p547 +S'sparc' p548 -S'multiprocessor 64-bit UltraSPARC' -p549 -ss(S'image' -g59 -NS'686-pae' +sg85 +(lp549 +g87 +ass(S'description' +g51 +NS'486' tp550 (dp551 -S'configs' +S'hardware' p552 -(lp553 -S'kernelarch-x86/config-arch-32' +S'older PCs' +p553 +sS'parts' p554 -aS'i386/config.686-pae' -p555 -asS'recommends' +(lp555 +S'up' p556 -S'libc6-i686' +asS'hardware-long' p557 -ss(S'base' -g78 -tp558 -(dp559 -S'kernel-arch' -p560 -S'sparc' -p561 -sg176 -(lp562 -g98 -ass(S'description' -g19 -NS'versatile' -tp563 -(dp564 +S'PCs with a single processor not supporting PAE' +p558 +ss(S'description' +g5 +NS'ixp4xx' +tp559 +(dp560 S'hardware' -p565 -S'Versatile' -p566 +p561 +S'IXP4xx' +p562 sS'hardware-long' +p563 +S'IXP4xx based systems (Linksys NSLU2, etc)' +p564 +ss(S'description' +g150 +NS'r5k-ip32' +tp565 +(dp566 +S'hardware' p567 -S'Versatile systems (PB, AB, Qemu)' +S'SGI IP32' p568 -ss(S'build' -g87 -NS'armmp' -tp569 -(dp570 -S'image-file' +sS'hardware-long' +p569 +S'SGI IP32 systems (O2)' +p570 +ss(S'description' +S'm68k' p571 -S'arch/arm/boot/zImage' -p572 +NS'm68k' +tp572 +(dp573 +S'hardware' +p574 +S'Motorola MC68020+ family' +p575 ss(S'base' -g5 -tp573 -(dp574 +g340 +tp576 +(dp577 S'kernel-arch' -p575 +p578 S's390' -p576 -sg176 -(lp577 -g98 -ass(S'build' +p579 +sg85 +(lp580 g87 -NS'vexpress' -tp578 -(dp579 -S'image-file' -p580 -S'arch/arm/boot/zImage' -p581 -ss(S'description' -g171 -NS'r5k-cobalt' -tp582 -(dp583 -S'hardware' -p584 -S'Cobalt' +ass(S'image' +g88 +NS'4kc-malta' +tp581 +(dp582 +S'configs' +p583 +(lp584 +S'mips/config.4kc-malta' p585 -sS'hardware-long' -p586 -S'Cobalt systems (Qube, RaQ, Qube2, RaQ2)' -p587 -ss(S'description' -g242 -NS'alpha-generic' -tp588 -(dp589 +ass(S'description' +g331 +NS's390x' +tp586 +(dp587 S'hardware' -p590 -S'Alpha' -p591 -sS'hardware-long' -p592 -S'DEC Alpha systems with extended kernel start address (Wildfire, Titan, Marvel)' -p593 +p588 +S'IBM zSeries' +p589 ss(S'image' -g92 -tp594 -(dp595 +g281 +tp590 +(dp591 S'suggests' -p596 +p592 S'mkvmlinuz' -p597 +p593 sS'configs' -p598 -(lp599 +p594 +(lp595 S'powerpc/config' -p600 +p596 ass(S'image' -g302 -tp601 -(dp602 +g150 +tp597 +(dp598 S'initramfs' -p603 +p599 I00 ss(S'image' -g59 -tp604 -(dp605 +g236 +NS'sparc64' +tp600 +(dp601 S'configs' -p606 +p602 +(lp603 +S'sparc/config.sparc64' +p604 +ass(g99 +g310 +g87 +tp605 +(dp606 +g102 +I01 +sg103 (lp607 -sS'bootloaders' +S'sparc64' p608 -(lp609 -S'grub-pc' -p610 -aS'extlinux' -p611 -aS'lilo' +aS'sparc64-smp' +p609 +ass(S'base' +g281 +tp610 +(dp611 +S'kernel-arch' p612 -ass(g97 -g41 -g98 -tp613 -(dp614 -g101 +S'powerpc' +p613 +sg85 +(lp614 +g87 +ass(g99 +g150 +g87 +tp615 +(dp616 +g102 I01 -sg102 -(lp615 -S'sparc64' -p616 -aS'sparc64-smp' -p617 -ass(S'description' -g19 -NS'orion5x' -tp618 -(dp619 -S'hardware' +sg103 +(lp617 +S'r4k-ip22' +p618 +aS'r5k-ip32' +p619 +aS'sb1-bcm91250a' p620 -S'Marvell Orion' +aS'sb1a-bcm91480b' p621 -sS'hardware-long' +aS'4kc-malta' p622 -S'Marvell Orion 5181, 5182 and 5281 based systems (QNAP TS-109/TS-209, etc)' +aS'5kc-malta' p623 -ss(S'base' -g92 -tp624 -(dp625 -S'kernel-arch' -p626 -S'powerpc' +aS'octeon' +p624 +ass(S'description' +g51 +g52 +S'686-pae' +tp625 +(dp626 +S'parts' p627 -sg176 (lp628 -g98 -ass(g97 -g242 -g98 -tp629 -(dp630 -g101 +S'xen' +p629 +ass(g99 +g39 +g87 +tp630 +(dp631 +g102 I01 -sg102 -(lp631 -S'alpha-generic' -p632 -aS'alpha-smp' +sg103 +(lp632 +S'itanium' p633 -aS'alpha-legacy' +aS'mckinley' p634 -ass(S'description' -g59 -g60 -S'686-pae' +ass(g99 +g22 +g87 tp635 (dp636 -S'parts' -p637 -(lp638 -S'xen' -p639 -ass(g97 -g46 -g98 -tp640 -(dp641 -g101 +g102 I01 -sg102 -(lp642 -S'itanium' +sg103 +(lp637 +S'alpha-generic' +p638 +aS'alpha-smp' +p639 +aS'alpha-legacy' +p640 +ass(S'base' +g119 +NS'parisc64-smp' +tp641 +(dp642 +S'override-host-type' p643 -aS'mckinley' +S'hppa64-linux-gnu' p644 -ass(g97 -g302 -g98 -tp645 -(dp646 -g101 -I01 -sg102 -(lp647 -S'r4k-ip22' -p648 -aS'r5k-ip32' +sS'cflags' +p645 +S'-fno-cse-follow-jumps' +p646 +ss(S'description' +g88 +NS'r5k-cobalt' +tp647 +(dp648 +S'hardware' p649 -aS'sb1-bcm91250a' +S'Cobalt' p650 -aS'sb1a-bcm91480b' +sS'hardware-long' p651 -aS'4kc-malta' +S'Cobalt systems (Qube, RaQ, Qube2, RaQ2)' p652 -aS'5kc-malta' -p653 -aS'octeon' -p654 -ass(S'image' -g19 -NS'kirkwood' -tp655 -(dp656 -S'check-size' -p657 -S'2097080' -p658 -sS'recommends' -p659 -S'uboot-mkimage' -p660 +ss(S'build' +g76 +NS'rpi' +tp653 +(dp654 +S'image-file' +p655 +S'arch/arm/boot/zImage' +p656 ss(S'description' -g302 -NS'sb1-bcm91250a' -tp661 -(dp662 +g22 +NS'alpha-legacy' +tp657 +(dp658 S'hardware' -p663 -S'BCM91250A' -p664 +p659 +S'Alpha Legacy' +p660 sS'hardware-long' +p661 +S'DEC Alpha systems with legacy kernel start address' +p662 +ss(S'base' +S'x32' +tp663 +(dp664 +S'kernel-arch' p665 -S'Broadcom BCM91250A systems (aka SWARM)' +S'x86' p666 +sS'featuresets' +p667 +(lp668 ss(S'image' -g134 -NS'powerpc-smp' -tp667 -(dp668 -S'configs' -p669 -(lp670 -S'powerpc/config.powerpc' +g571 +tp669 +(dp670 +S'suggests' p671 -aS'powerpc/config.powerpc-smp' +S'vmelilo, fdutils' p672 -ass(S'base' -S'x32' +ss(S'description' +g5 +NS'orion5x' tp673 (dp674 -S'kernel-arch' +S'hardware' p675 -S'x86' +S'Marvell Orion' p676 -sS'featuresets' +sS'hardware-long' p677 -(lp678 +S'Marvell Orion 5181, 5182 and 5281 based systems (QNAP TS-109/TS-209, etc)' +p678 ss(S'base' -NS'rt' +g76 tp679 (dp680 -S'enabled' +S'kernel-arch' p681 +S'arm' +p682 +sg85 +(lp683 +g87 +ass(S'build' +g51 +NS'686-pae' +tp684 +(dp685 +S'debug-info' +p686 I01 ss(S'image' -g203 -tp682 -(dp683 +g94 +tp687 +(dp688 S'suggests' -p684 -S'vmelilo, fdutils' -p685 -ss(S'description' -g19 -NS'ixp4xx' -tp686 -(dp687 -S'hardware' -p688 -S'IXP4xx' p689 -sS'hardware-long' +S'fdutils' p690 -S'IXP4xx based systems (Linksys NSLU2, etc)' -p691 -ss(S'description' -g30 -NS'parisc64-smp' -tp692 -(dp693 -S'hardware' -p694 -S'multiprocessor 64-bit PA-RISC' -p695 -ss(S'description' +ss(S'base' g119 -NS'sh7751r' -tp696 -(dp697 -S'hardware' -p698 -S'sh7751r' -p699 -sS'hardware-long' +tp691 +(dp692 +S'kernel-arch' +p693 +S'parisc' +p694 +sg85 +(lp695 +g87 +asS'compiler' +p696 +S'gcc-4.4' +p697 +ss(S'build' +g340 +NS's390x' +tp698 +(dp699 +S'debug-info' p700 -S'Renesas SH7751R R2D plus board' -p701 +I01 ss(S'description' -g171 -NS'4kc-malta' -tp702 -(dp703 +g150 +NS'sb1-bcm91250a' +tp701 +(dp702 S'hardware' +p703 +S'BCM91250A' p704 -S'MIPS Malta' -p705 sS'hardware-long' +p705 +S'Broadcom BCM91250A systems (aka SWARM)' p706 -S'MIPS Malta boards' -p707 -ss(S'image' -g171 -NS'sb1-bcm91250a' -tp708 -(dp709 -S'configs' +ss(S'description' +g150 +NS'octeon' +tp707 +(dp708 +S'hardware' +p709 +S'Octeon' p710 -(lp711 -S'mips/config.sb1-bcm91250a' +sS'hardware-long' +p711 +S'Cavium Networks Octeon' p712 -ass(S'description' -g302 -NS'octeon' +ss(S'base' +g94 tp713 (dp714 -S'hardware' +S'kernel-arch' p715 -S'Octeon' +S'sh' p716 -sS'hardware-long' -p717 -S'Cavium Networks Octeon' -p718 +sg85 +(lp717 +g87 +ass(S'build' +g5 +NS'ixp4xx' +tp718 +(dp719 +S'image-file' +p720 +S'arch/arm/boot/zImage' +p721 ss(S'image' -g119 -tp719 -(dp720 +g310 +tp722 +(dp723 S'suggests' -p721 -S'fdutils' -p722 -ss(S'base' -g30 -tp723 -(dp724 -S'kernel-arch' +p724 +S'silo, fdutils' p725 -S'parisc' -p726 -sg176 -(lp727 -g98 -asS'compiler' +ss(S'image' +g5 +NS'ixp4xx' +tp726 +(dp727 +S'check-size' p728 -S'gcc-4.4' +S'1441760' p729 -ss(S'base' -g119 -tp730 -(dp731 -S'kernel-arch' +sS'configs' +p730 +(lp731 +S'armel/config-reduced' p732 -S'sh' +aS'armel/config.ixp4xx' p733 -sg176 -(lp734 -g98 -ass(S'image' -g41 -tp735 -(dp736 -S'suggests' -p737 -S'silo, fdutils' -p738 -ss(S'description' -tp739 -(dp740 +ass(S'description' +tp734 +(dp735 S'part-long-up' -p741 +p736 S'This kernel is not suitable for SMP (multi-processor,\nmulti-core or hyper-threaded) systems.' -p742 +p737 sS'part-long-xen' -p743 +p738 S'This kernel also runs on a Xen hypervisor.\nIt supports both privileged (dom0) and unprivileged (domU) operation.' -p744 +p739 ss(S'description' -g171 -NS'loongson-2f' -tp745 -(dp746 +g236 +NS'sparc64-smp' +tp740 +(dp741 S'hardware' -p747 -S'Loongson 2F' -p748 -sS'hardware-long' -p749 -S'Lemote Loongson 2F systems' +p742 +S'multiprocessor 64-bit UltraSPARC' +p743 +ss(S'abi' +Ng483 +tp744 +(dp745 +S'ignore-changes' +p746 +(lp747 +S'*' +ass(S'image' +g5 +NS'iop32x' +tp748 +(dp749 +S'check-size' p750 -ss(S'description' -g41 -NS'sparc64' -tp751 -(dp752 -S'hardware' -p753 -S'uniprocessor 64-bit UltraSPARC' +S'1441784' +p751 +sS'configs' +p752 +(lp753 +S'armel/config-reduced' p754 -ss(S'description' -g134 -NS'powerpc' -tp755 -(dp756 +aS'armel/config.iop32x' +p755 +ass(S'description' +g51 +NS'amd64' +tp756 +(dp757 S'hardware' -p757 -S'uniprocessor 32-bit PowerPC' p758 -ss(S'build' -g87 -NS'mx5' -tp759 -(dp760 -S'image-file' -p761 -S'arch/arm/boot/zImage' +S'64-bit PCs' +p759 +sS'parts' +p760 +(lp761 +S'xen' p762 +asS'hardware-long' +p763 +S'PCs with AMD64, Intel 64 or VIA Nano processors' +p764 ss(S'image' -g78 -tp763 -(dp764 +g236 +tp765 +(dp766 S'suggests' -p765 +p767 S'silo, fdutils' -p766 +p768 sS'configs' -p767 -(lp768 -S'sparc/config' p769 +(lp770 +S'sparc/config' +p771 ass(S'description' -g59 -NS'686-pae' -tp770 -(dp771 +g119 +NS'parisc-smp' +tp772 +(dp773 S'hardware' -p772 -S'modern PCs' -p773 -sS'parts' p774 -(lp775 -S'pae' -p776 -asS'hardware-long' -p777 -S'PCs with one or more processors supporting PAE' -p778 +S'multiprocessor 32-bit PA-RISC' +p775 ss(S'base' -g134 -tp779 -(dp780 +g129 +tp776 +(dp777 S'kernel-arch' -p781 +p778 S'powerpc' -p782 -sg176 -(lp783 -g98 -ass(S'abi' -tp784 -(dp785 -S'abiname' -p786 -S'3' +p779 +sg85 +(lp780 +g87 +ass(S'description' +g340 +NS's390x' +tp781 +(dp782 +S'hardware' +p783 +S'IBM zSeries' +p784 ss(S'description' -g30 -NS'parisc' -tp787 -(dp788 +g76 +NS'armmp' +tp785 +(dp786 S'hardware' +p787 +S'ARMv7 multiplatform compatible SoCs' +p788 +sS'hardware-long' p789 -S'32-bit PA-RISC' +S'ARMv7 multiplatform kernel for Marvell Armada 370/xp, Freescale iMX5x/iMX6' p790 -ss(S'description' -g242 -NS'alpha-legacy' +ss(S'base' +NS'rt' tp791 (dp792 -S'hardware' +S'enabled' p793 -S'Alpha Legacy' -p794 -sS'hardware-long' -p795 -S'DEC Alpha systems with legacy kernel start address' +I01 +ss(S'description' +g310 +NS'sparc32' +tp794 +(dp795 +S'hardware' p796 -ss(S'build' -g19 -NS'kirkwood' -tp797 -(dp798 -S'image-file' -p799 -S'arch/arm/boot/zImage' -p800 +S'uniprocessor sparc32 (sun4m)' +p797 ss(S'description' -g302 -NS'r4k-ip22' -tp801 -(dp802 +g119 +NS'parisc' +tp798 +(dp799 S'hardware' -p803 -S'SGI IP22' +p800 +S'32-bit PA-RISC' +p801 +ss(S'image' +g129 +NS'powerpc-smp' +tp802 +(dp803 +S'configs' p804 -sS'hardware-long' -p805 -S'SGI IP22 systems (Indy, Indigo2)' +(lp805 +S'powerpc/config.powerpc' p806 -ss(g97 -g188 -g98 -tp807 -(dp808 -g101 -I01 -sg102 -(lp809 -S'powerpcspe' +aS'powerpc/config.powerpc-smp' +p807 +ass(S'description' +g5 +NS'versatile' +tp808 +(dp809 +S'hardware' p810 -ass(g97 -g203 -g98 -tp811 -(dp812 -g101 -I01 -sg102 -(lp813 -S'm68k' -p814 -ass(S'base' -g59 -g60 -tp815 -(dp816 -S'flavours' +S'Versatile' +p811 +sS'hardware-long' +p812 +S'Versatile systems (PB, AB, Qemu)' +p813 +ss(S'build' +g94 +NS'sh7785lcr' +tp814 +(dp815 +S'image-file' +p816 +S'arch/sh/boot/zImage' p817 -(lp818 -S'486' -p819 -aS'686-pae' +ss(S'image' +g76 +tp818 +(dp819 +S'suggests' p820 -aS'amd64' +S'fdutils' p821 -ass(S'base' -tp822 -(dp823 -S'arches' +sS'configs' +p822 +(lp823 +S'armel/config' p824 -(lp825 -S'alpha' -p826 -aS'amd64' -p827 -aS'armel' +aS'armhf/config' +p825 +ass(S'abi' +tp826 +(dp827 +S'abiname' p828 -aS'armhf' -p829 -aS'hppa' -p830 -aS'i386' +S'3' +ss(S'image' +g76 +NS'omap' +tp829 +(dp830 +S'recommends' p831 -aS'ia64' +S'uboot-mkimage' p832 -aS'm68k' -p833 -aS'mips' -p834 -aS'mipsel' -p835 -aS'powerpc' +ss(g99 +g257 +g87 +tp833 +(dp834 +g102 +I01 +sg103 +(lp835 +S'powerpcspe' p836 -aS'powerpcspe' -p837 -aS'ppc64' -p838 -aS's390' +ass(S'base' +g119 +NS'parisc64' +tp837 +(dp838 +S'override-host-type' p839 -aS's390x' +S'hppa64-linux-gnu' p840 -aS'sh4' +sS'cflags' p841 -aS'sparc' +S'-fno-cse-follow-jumps' p842 -aS'sparc64' -p843 -aS'x32' -p844 -asS'featuresets' -p845 -(lp846 -S'none' -p847 -aS'rt' -p848 -asS'compiler' +ss(g99 +g571 +g87 +tp843 +(dp844 +g102 +I01 +sg103 +(lp845 +S'm68k' +p846 +ass(S'build' +g331 +NS's390x' +tp847 +(dp848 +S'debug-info' p849 -S'gcc-4.7' -p850 +I01 ss(S'description' -g59 -NS'486' -tp851 -(dp852 +g331 +NS's390' +tp850 +(dp851 S'hardware' +p852 +S'IBM S/390' p853 -S'older PCs' -p854 -sS'parts' -p855 -(lp856 -S'up' +ss(S'description' +g76 +NS'omap' +tp854 +(dp855 +S'hardware' +p856 +S'TI OMAP3+' p857 -asS'hardware-long' +sS'hardware-long' p858 -S'PCs with a single processor not supporting PAE' +S'Texas Instruments OMAP3 or OMAP4 based systems' p859 ss(S'description' -g87 -NS'mx5' +g310 +NS'sparc64-smp' tp860 (dp861 S'hardware' p862 -S'Freescale i.MX51/53' +S'multiprocessor 64-bit UltraSPARC' p863 -sS'hardware-long' -p864 -S'Freescale i.MX51 or i.MX53 based systems' -p865 -ss(S'base' -g203 -tp866 -(dp867 -S'kernel-arch' +ss(S'image' +g5 +NS'orion5x' +tp864 +(dp865 +S'check-size' +p866 +S'1572792' +p867 +sS'configs' p868 -S'm68k' -p869 -sg176 -(lp870 -g98 -asS'cflags' +(lp869 +S'armel/config-reduced' +p870 +aS'armel/config.orion5x' p871 -S'-ffreestanding' +asS'recommends' p872 -sS'compiler' +S'uboot-mkimage' p873 -S'gcc-4.8' -p874 -ss(S'image' -tp875 -(dp876 -S'initramfs-generators' +ss(S'base' +g571 +tp874 +(dp875 +S'kernel-arch' +p876 +S'm68k' p877 +sg85 (lp878 -S'initramfs-tools' +g87 +asS'cflags' p879 -aS'initramfs-fallback' +S'-ffreestanding' p880 -asS'type' +sS'compiler' p881 -S'plain' +S'gcc-4.8' p882 ss(S'image' -g119 -NS'sh7785lcr' +g88 +NS'sb1a-bcm91480b' tp883 (dp884 -S'check-size' +S'configs' p885 -S'4194304' -p886 -sS'recommends' +(lp886 +S'mips/config.sb1a-bcm91480b' p887 -S'uboot-mkimage' -p888 -ss(g97 -g78 -g98 -tp889 -(dp890 -g101 -I01 -sg102 +ass(S'image' +tp888 +(dp889 +S'initramfs-generators' +p890 (lp891 -S'sparc64' +S'initramfs-tools' p892 -aS'sparc64-smp' +aS'initramfs-fallback' p893 -ass(S'description' -g171 -NS'sb1a-bcm91480b' -tp894 -(dp895 +asS'type' +p894 +S'plain' +p895 +ss(S'description' +g236 +NS'sparc64' +tp896 +(dp897 S'hardware' -p896 -S'BCM91480B' -p897 -sS'hardware-long' p898 -S'Broadcom BCM91480B systems (aka BigSur)' +S'uniprocessor 64-bit UltraSPARC' p899 -ss(S'build' -g19 -NS'mv78xx0' +ss(g99 +g236 +g87 tp900 (dp901 -S'image-file' -p902 -S'arch/arm/boot/zImage' +g102 +I01 +sg103 +(lp902 +S'sparc64' p903 -ss(S'abi' -Ng309 -tp904 -(dp905 -S'ignore-changes' -p906 -(lp907 -S'*' +aS'sparc64-smp' +p904 ass(S'image' -g171 -NS'4kc-malta' -tp908 -(dp909 -S'configs' -p910 -(lp911 -S'mips/config.4kc-malta' +g129 +tp905 +(dp906 +S'suggests' +p907 +S'mkvmlinuz' +p908 +ss(S'description' +g150 +NS'sb1a-bcm91480b' +tp909 +(dp910 +S'hardware' +p911 +S'BCM91480B' p912 -ass(S'image' -g5 -tp913 -(dp914 -S'configs' -p915 -(lp916 -S's390/config' +sS'hardware-long' +p913 +S'Broadcom BCM91480B systems (aka BigSur)' +p914 +ss(S'description' +g88 +NS'5kc-malta' +tp915 +(dp916 +S'hardware' p917 -asS'bootloaders' +S'MIPS Malta (64-bit)' p918 -(lp919 -S's390-tools' +sS'hardware-long' +p919 +S'MIPS Malta boards (64-bit)' p920 -ass(S'description' -g87 -NS'armmp' +ss(S'image' +g340 tp921 (dp922 -S'hardware' +S'configs' p923 -S'ARMv7 multiplatform compatible SoCs' -p924 -sS'hardware-long' +(lp924 +S's390/config' p925 -S'ARMv7 multiplatform kernel for Marvell Armada 370/xp, Freescale iMX5x/iMX6' +asS'bootloaders' p926 -ss(S'description' -g19 -NS'kirkwood' -tp927 -(dp928 -S'hardware' -p929 -S'Marvell Kirkwood' -p930 -sS'hardware-long' -p931 -S'Marvell Kirkwood based systems (SheevaPlug, QNAP TS-119/TS-219, etc)' -p932 -ss(S'image' -g171 -NS'5kc-malta' -tp933 -(dp934 +(lp927 +S's390-tools' +p928 +ass(S'image' +g51 +tp929 +(dp930 S'configs' +p931 +(lp932 +sS'bootloaders' +p933 +(lp934 +S'grub-pc' p935 -(lp936 -S'mips/config.5kc-malta' +aS'extlinux' +p936 +aS'lilo' p937 -ass(S'build' -g59 -NS'686-pae' +ass(S'image' +g88 +NS'5kc-malta' tp938 (dp939 -S'debug-info' -p940 -I01 -ss(S'image' -g92 -NS'powerpc64' -tp941 -(dp942 S'configs' -p943 -(lp944 -S'powerpc/config.powerpc64' -p945 +p940 +(lp941 +S'mips/config.5kc-malta' +p942 ass(S'description' -g319 -NS's390x' -tp946 -(dp947 +g150 +NS'4kc-malta' +tp943 +(dp944 S'hardware' +p945 +S'MIPS Malta' +p946 +sS'hardware-long' +p947 +S'MIPS Malta boards' p948 -S'IBM zSeries' -p949 -sstRp950 +ss(S'build' +g5 +NS'mv78xx0' +tp949 +(dp950 +S'image-file' +p951 +S'arch/arm/boot/zImage' +p952 +ss(S'build' +g76 +NS'mx5' +tp953 +(dp954 +S'image-file' +p955 +S'arch/arm/boot/zImage' +p956 +sstRp957 . \ No newline at end of file diff -Nru linux-3.10.11/debian/control linux-3.10-3.10.11/debian/control --- linux-3.10.11/debian/control 2013-09-10 13:13:31.000000000 +0000 +++ linux-3.10-3.10.11/debian/control 2014-04-28 01:24:31.000000000 +0000 @@ -1,4 +1,4 @@ -Source: linux +Source: linux-3.10 Section: kernel Priority: optional Maintainer: Debian Kernel Team @@ -194,8 +194,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nic-modules-3.10-3-amd64-di Architecture: amd64 @@ -206,8 +206,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nic-wireless-modules-3.10-3-amd64-di Architecture: amd64 @@ -218,8 +218,8 @@ Description: Wireless NIC drivers This package contains wireless NIC drivers for the kernel. Includes crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nic-shared-modules-3.10-3-amd64-di Architecture: amd64 @@ -230,8 +230,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: serial-modules-3.10-3-amd64-di Architecture: amd64 @@ -241,8 +241,8 @@ Depends: kernel-image-3.10-3-amd64-di, pcmcia-modules-3.10-3-amd64-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: usb-serial-modules-3.10-3-amd64-di Architecture: amd64 @@ -252,8 +252,8 @@ Depends: kernel-image-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ppp-modules-3.10-3-amd64-di Architecture: amd64 @@ -263,8 +263,8 @@ Depends: kernel-image-3.10-3-amd64-di, serial-modules-3.10-3-amd64-di, zlib-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: pata-modules-3.10-3-amd64-di Architecture: amd64 @@ -274,8 +274,8 @@ Depends: kernel-image-3.10-3-amd64-di, ata-modules-3.10-3-amd64-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: cdrom-core-modules-3.10-3-amd64-di Architecture: amd64 @@ -285,8 +285,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, isofs-modules-3.10-3-amd64-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: firewire-core-modules-3.10-3-amd64-di Architecture: amd64 @@ -296,8 +296,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: scsi-core-modules-3.10-3-amd64-di Architecture: amd64 @@ -307,8 +307,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: scsi-modules-3.10-3-amd64-di Architecture: amd64 @@ -318,8 +318,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, scsi-common-modules-3.10-3-amd64-di, cdrom-core-modules-3.10-3-amd64-di, core-modules-3.10-3-amd64-di, ata-modules-3.10-3-amd64-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: scsi-common-modules-3.10-3-amd64-di Architecture: amd64 @@ -329,8 +329,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, cdrom-core-modules-3.10-3-amd64-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: scsi-extra-modules-3.10-3-amd64-di Architecture: amd64 @@ -341,8 +341,8 @@ Description: Uncommon SCSI drivers This package contains uncommon SCSI drivers for the kernel. This includes SCSI RAID drivers, and some of the less common SCSI controllers. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: loop-modules-3.10-3-amd64-di Architecture: amd64 @@ -352,8 +352,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: btrfs-modules-3.10-3-amd64-di Architecture: amd64 @@ -363,8 +363,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di, zlib-modules-3.10-3-amd64-di, md-modules-3.10-3-amd64-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ext2-modules-3.10-3-amd64-di Architecture: amd64 @@ -374,8 +374,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ext3-modules-3.10-3-amd64-di Architecture: amd64 @@ -385,8 +385,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ext4-modules-3.10-3-amd64-di Architecture: amd64 @@ -396,8 +396,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: isofs-modules-3.10-3-amd64-di Architecture: amd64 @@ -407,8 +407,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: jfs-modules-3.10-3-amd64-di Architecture: amd64 @@ -418,8 +418,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ntfs-modules-3.10-3-amd64-di Architecture: amd64 @@ -429,8 +429,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: NTFS filesystem support This package contains the NTFS file system module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: xfs-modules-3.10-3-amd64-di Architecture: amd64 @@ -440,8 +440,8 @@ Depends: kernel-image-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: fat-modules-3.10-3-amd64-di Architecture: amd64 @@ -451,8 +451,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: md-modules-3.10-3-amd64-di Architecture: amd64 @@ -462,8 +462,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: multipath-modules-3.10-3-amd64-di Architecture: amd64 @@ -473,8 +473,8 @@ Depends: kernel-image-3.10-3-amd64-di, md-modules-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: usb-modules-3.10-3-amd64-di Architecture: amd64 @@ -484,8 +484,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: usb-storage-modules-3.10-3-amd64-di Architecture: amd64 @@ -495,8 +495,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: pcmcia-storage-modules-3.10-3-amd64-di Architecture: amd64 @@ -506,8 +506,8 @@ Depends: kernel-image-3.10-3-amd64-di, cdrom-core-modules-3.10-3-amd64-di, pcmcia-modules-3.10-3-amd64-di, ata-modules-3.10-3-amd64-di Description: PCMCIA storage drivers This package contains PCMCIA storage drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: fb-modules-3.10-3-amd64-di Architecture: amd64 @@ -517,8 +517,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: input-modules-3.10-3-amd64-di Architecture: amd64 @@ -528,8 +528,8 @@ Depends: kernel-image-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: event-modules-3.10-3-amd64-di Architecture: amd64 @@ -539,8 +539,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: mouse-modules-3.10-3-amd64-di Architecture: amd64 @@ -550,8 +550,8 @@ Depends: kernel-image-3.10-3-amd64-di, event-modules-3.10-3-amd64-di, input-modules-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nic-pcmcia-modules-3.10-3-amd64-di Architecture: amd64 @@ -561,8 +561,8 @@ Depends: kernel-image-3.10-3-amd64-di, nic-shared-modules-3.10-3-amd64-di, nic-wireless-modules-3.10-3-amd64-di, pcmcia-modules-3.10-3-amd64-di, mmc-core-modules-3.10-3-amd64-di Description: Common PCMCIA NIC drivers This package contains common PCMCIA NIC drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: pcmcia-modules-3.10-3-amd64-di Architecture: amd64 @@ -572,8 +572,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nic-usb-modules-3.10-3-amd64-di Architecture: amd64 @@ -583,8 +583,8 @@ Depends: kernel-image-3.10-3-amd64-di, nic-shared-modules-3.10-3-amd64-di, nic-wireless-modules-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di, core-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: sata-modules-3.10-3-amd64-di Architecture: amd64 @@ -594,8 +594,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di, ata-modules-3.10-3-amd64-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: core-modules-3.10-3-amd64-di Architecture: amd64 @@ -606,8 +606,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: acpi-modules-3.10-3-amd64-di Architecture: amd64 @@ -617,8 +617,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: ACPI support modules This package contains kernel modules for ACPI. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: i2c-modules-3.10-3-amd64-di Architecture: amd64 @@ -628,8 +628,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: i2c support modules This package contains basic i2c support modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: crc-modules-3.10-3-amd64-di Architecture: amd64 @@ -639,8 +639,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: crypto-modules-3.10-3-amd64-di Architecture: amd64 @@ -650,8 +650,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: crypto-dm-modules-3.10-3-amd64-di Architecture: amd64 @@ -661,8 +661,8 @@ Depends: kernel-image-3.10-3-amd64-di, md-modules-3.10-3-amd64-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: efi-modules-3.10-3-amd64-di Architecture: amd64 @@ -672,8 +672,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: EFI modules This package contains EFI modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: ata-modules-3.10-3-amd64-di Architecture: amd64 @@ -684,8 +684,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: mmc-core-modules-3.10-3-amd64-di Architecture: amd64 @@ -695,8 +695,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di Description: MMC/SD/SDIO core modules This package contains core modules for MMC/SD/SDIO support. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: mmc-modules-3.10-3-amd64-di Architecture: amd64 @@ -707,8 +707,8 @@ Description: MMC/SD card modules This package contains modules needed to support MMC (multimedia) and SD cards. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: nbd-modules-3.10-3-amd64-di Architecture: amd64 @@ -719,8 +719,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: squashfs-modules-3.10-3-amd64-di Architecture: amd64 @@ -730,8 +730,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: speakup-modules-3.10-3-amd64-di Architecture: amd64 @@ -741,8 +741,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: speakup modules This package contains speakup modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: virtio-modules-3.10-3-amd64-di Architecture: amd64 @@ -752,8 +752,8 @@ Depends: kernel-image-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: uinput-modules-3.10-3-amd64-di Architecture: amd64 @@ -763,8 +763,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: sound-modules-3.10-3-amd64-di Architecture: amd64 @@ -774,8 +774,8 @@ Depends: kernel-image-3.10-3-amd64-di, core-modules-3.10-3-amd64-di, i2c-modules-3.10-3-amd64-di, usb-modules-3.10-3-amd64-di, pcmcia-modules-3.10-3-amd64-di, firewire-core-modules-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: sound support This package contains sound modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: zlib-modules-3.10-3-amd64-di Architecture: amd64 @@ -785,8 +785,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: hyperv-modules-3.10-3-amd64-di Architecture: amd64 @@ -796,8 +796,8 @@ Depends: kernel-image-3.10-3-amd64-di, input-modules-3.10-3-amd64-di, scsi-core-modules-3.10-3-amd64-di Description: Hyper-V modules This package contains Hyper-V paravirtualised drivers for the kernel. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: udf-modules-3.10-3-amd64-di Architecture: amd64 @@ -807,8 +807,8 @@ Depends: kernel-image-3.10-3-amd64-di, crc-modules-3.10-3-amd64-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: fuse-modules-3.10-3-amd64-di Architecture: amd64 @@ -818,8 +818,8 @@ Depends: kernel-image-3.10-3-amd64-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-amd64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-amd64 Package: linux-image-3.10-3-amd64 Architecture: amd64 i386 @@ -926,8 +926,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: nic-modules-3.10-3-iop32x-di Architecture: armel @@ -938,8 +938,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: nic-shared-modules-3.10-3-iop32x-di Architecture: armel @@ -950,8 +950,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: usb-serial-modules-3.10-3-iop32x-di Architecture: armel @@ -961,8 +961,8 @@ Depends: kernel-image-3.10-3-iop32x-di, usb-modules-3.10-3-iop32x-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ppp-modules-3.10-3-iop32x-di Architecture: armel @@ -972,8 +972,8 @@ Depends: kernel-image-3.10-3-iop32x-di, zlib-modules-3.10-3-iop32x-di, crc-modules-3.10-3-iop32x-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: pata-modules-3.10-3-iop32x-di Architecture: armel @@ -983,8 +983,8 @@ Depends: kernel-image-3.10-3-iop32x-di, ata-modules-3.10-3-iop32x-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: cdrom-core-modules-3.10-3-iop32x-di Architecture: armel @@ -994,8 +994,8 @@ Depends: kernel-image-3.10-3-iop32x-di, scsi-core-modules-3.10-3-iop32x-di, isofs-modules-3.10-3-iop32x-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: scsi-core-modules-3.10-3-iop32x-di Architecture: armel @@ -1005,8 +1005,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: loop-modules-3.10-3-iop32x-di Architecture: armel @@ -1016,8 +1016,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ipv6-modules-3.10-3-iop32x-di Architecture: armel @@ -1027,8 +1027,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: IPv6 driver This package contains the IPv6 driver for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: btrfs-modules-3.10-3-iop32x-di Architecture: armel @@ -1038,8 +1038,8 @@ Depends: kernel-image-3.10-3-iop32x-di, core-modules-3.10-3-iop32x-di, crc-modules-3.10-3-iop32x-di, zlib-modules-3.10-3-iop32x-di, md-modules-3.10-3-iop32x-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ext2-modules-3.10-3-iop32x-di Architecture: armel @@ -1049,8 +1049,8 @@ Depends: kernel-image-3.10-3-iop32x-di, core-modules-3.10-3-iop32x-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ext3-modules-3.10-3-iop32x-di Architecture: armel @@ -1060,8 +1060,8 @@ Depends: kernel-image-3.10-3-iop32x-di, core-modules-3.10-3-iop32x-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ext4-modules-3.10-3-iop32x-di Architecture: armel @@ -1071,8 +1071,8 @@ Depends: kernel-image-3.10-3-iop32x-di, core-modules-3.10-3-iop32x-di, crc-modules-3.10-3-iop32x-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: isofs-modules-3.10-3-iop32x-di Architecture: armel @@ -1082,8 +1082,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: jffs2-modules-3.10-3-iop32x-di Architecture: armel @@ -1093,8 +1093,8 @@ Depends: kernel-image-3.10-3-iop32x-di, zlib-modules-3.10-3-iop32x-di Description: JFFS2 filesystem support This package contains the JFFS2 filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: jfs-modules-3.10-3-iop32x-di Architecture: armel @@ -1104,8 +1104,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: fat-modules-3.10-3-iop32x-di Architecture: armel @@ -1115,8 +1115,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: md-modules-3.10-3-iop32x-di Architecture: armel @@ -1126,8 +1126,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: multipath-modules-3.10-3-iop32x-di Architecture: armel @@ -1137,8 +1137,8 @@ Depends: kernel-image-3.10-3-iop32x-di, md-modules-3.10-3-iop32x-di, scsi-core-modules-3.10-3-iop32x-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: usb-modules-3.10-3-iop32x-di Architecture: armel @@ -1148,8 +1148,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: usb-storage-modules-3.10-3-iop32x-di Architecture: armel @@ -1159,8 +1159,8 @@ Depends: kernel-image-3.10-3-iop32x-di, scsi-core-modules-3.10-3-iop32x-di, usb-modules-3.10-3-iop32x-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: event-modules-3.10-3-iop32x-di Architecture: armel @@ -1170,8 +1170,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: nic-usb-modules-3.10-3-iop32x-di Architecture: armel @@ -1181,8 +1181,8 @@ Depends: kernel-image-3.10-3-iop32x-di, nic-shared-modules-3.10-3-iop32x-di, usb-modules-3.10-3-iop32x-di, core-modules-3.10-3-iop32x-di, crc-modules-3.10-3-iop32x-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: sata-modules-3.10-3-iop32x-di Architecture: armel @@ -1192,8 +1192,8 @@ Depends: kernel-image-3.10-3-iop32x-di, scsi-core-modules-3.10-3-iop32x-di, ata-modules-3.10-3-iop32x-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: core-modules-3.10-3-iop32x-di Architecture: armel @@ -1204,8 +1204,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: crc-modules-3.10-3-iop32x-di Architecture: armel @@ -1215,8 +1215,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: crypto-modules-3.10-3-iop32x-di Architecture: armel @@ -1226,8 +1226,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: crypto-dm-modules-3.10-3-iop32x-di Architecture: armel @@ -1237,8 +1237,8 @@ Depends: kernel-image-3.10-3-iop32x-di, md-modules-3.10-3-iop32x-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: ata-modules-3.10-3-iop32x-di Architecture: armel @@ -1249,8 +1249,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: nbd-modules-3.10-3-iop32x-di Architecture: armel @@ -1261,8 +1261,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: squashfs-modules-3.10-3-iop32x-di Architecture: armel @@ -1272,8 +1272,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: zlib-modules-3.10-3-iop32x-di Architecture: armel @@ -1283,8 +1283,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: udf-modules-3.10-3-iop32x-di Architecture: armel @@ -1294,8 +1294,8 @@ Depends: kernel-image-3.10-3-iop32x-di, crc-modules-3.10-3-iop32x-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: fuse-modules-3.10-3-iop32x-di Architecture: armel @@ -1305,8 +1305,8 @@ Depends: kernel-image-3.10-3-iop32x-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-iop32x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-iop32x Package: kernel-image-3.10-3-kirkwood-di Architecture: armel @@ -1317,8 +1317,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: nic-modules-3.10-3-kirkwood-di Architecture: armel @@ -1329,8 +1329,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: nic-shared-modules-3.10-3-kirkwood-di Architecture: armel @@ -1341,8 +1341,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: usb-serial-modules-3.10-3-kirkwood-di Architecture: armel @@ -1352,8 +1352,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: ppp-modules-3.10-3-kirkwood-di Architecture: armel @@ -1363,8 +1363,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, crc-modules-3.10-3-kirkwood-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: cdrom-core-modules-3.10-3-kirkwood-di Architecture: armel @@ -1374,8 +1374,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, scsi-core-modules-3.10-3-kirkwood-di, isofs-modules-3.10-3-kirkwood-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: scsi-core-modules-3.10-3-kirkwood-di Architecture: armel @@ -1385,8 +1385,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: loop-modules-3.10-3-kirkwood-di Architecture: armel @@ -1396,8 +1396,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: btrfs-modules-3.10-3-kirkwood-di Architecture: armel @@ -1407,8 +1407,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, core-modules-3.10-3-kirkwood-di, crc-modules-3.10-3-kirkwood-di, md-modules-3.10-3-kirkwood-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: ext2-modules-3.10-3-kirkwood-di Architecture: armel @@ -1418,8 +1418,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, core-modules-3.10-3-kirkwood-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: ext3-modules-3.10-3-kirkwood-di Architecture: armel @@ -1429,8 +1429,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, core-modules-3.10-3-kirkwood-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: ext4-modules-3.10-3-kirkwood-di Architecture: armel @@ -1440,8 +1440,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, core-modules-3.10-3-kirkwood-di, crc-modules-3.10-3-kirkwood-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: isofs-modules-3.10-3-kirkwood-di Architecture: armel @@ -1451,8 +1451,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: jfs-modules-3.10-3-kirkwood-di Architecture: armel @@ -1462,8 +1462,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: fat-modules-3.10-3-kirkwood-di Architecture: armel @@ -1473,8 +1473,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: minix-modules-3.10-3-kirkwood-di Architecture: armel @@ -1484,8 +1484,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: Minix filesystem support This package contains the Minix filesystem module for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: md-modules-3.10-3-kirkwood-di Architecture: armel @@ -1495,8 +1495,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: multipath-modules-3.10-3-kirkwood-di Architecture: armel @@ -1506,8 +1506,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, md-modules-3.10-3-kirkwood-di, scsi-core-modules-3.10-3-kirkwood-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: usb-modules-3.10-3-kirkwood-di Architecture: armel @@ -1517,8 +1517,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: usb-storage-modules-3.10-3-kirkwood-di Architecture: armel @@ -1528,8 +1528,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, scsi-core-modules-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: fb-modules-3.10-3-kirkwood-di Architecture: armel @@ -1539,8 +1539,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: input-modules-3.10-3-kirkwood-di Architecture: armel @@ -1550,8 +1550,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: event-modules-3.10-3-kirkwood-di Architecture: armel @@ -1561,8 +1561,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: mouse-modules-3.10-3-kirkwood-di Architecture: armel @@ -1572,8 +1572,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, event-modules-3.10-3-kirkwood-di, input-modules-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: nic-usb-modules-3.10-3-kirkwood-di Architecture: armel @@ -1583,8 +1583,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, nic-shared-modules-3.10-3-kirkwood-di, usb-modules-3.10-3-kirkwood-di, core-modules-3.10-3-kirkwood-di, crc-modules-3.10-3-kirkwood-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: sata-modules-3.10-3-kirkwood-di Architecture: armel @@ -1594,8 +1594,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, scsi-core-modules-3.10-3-kirkwood-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: core-modules-3.10-3-kirkwood-di Architecture: armel @@ -1606,8 +1606,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: crc-modules-3.10-3-kirkwood-di Architecture: armel @@ -1617,8 +1617,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: crypto-modules-3.10-3-kirkwood-di Architecture: armel @@ -1628,8 +1628,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: crypto-dm-modules-3.10-3-kirkwood-di Architecture: armel @@ -1639,8 +1639,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, md-modules-3.10-3-kirkwood-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: mmc-modules-3.10-3-kirkwood-di Architecture: armel @@ -1651,8 +1651,8 @@ Description: MMC/SD card modules This package contains modules needed to support MMC (multimedia) and SD cards. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: nbd-modules-3.10-3-kirkwood-di Architecture: armel @@ -1663,8 +1663,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: squashfs-modules-3.10-3-kirkwood-di Architecture: armel @@ -1674,8 +1674,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: uinput-modules-3.10-3-kirkwood-di Architecture: armel @@ -1685,8 +1685,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: leds-modules-3.10-3-kirkwood-di Architecture: armel @@ -1696,8 +1696,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: LED modules This package contains LED modules. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: udf-modules-3.10-3-kirkwood-di Architecture: armel @@ -1707,8 +1707,8 @@ Depends: kernel-image-3.10-3-kirkwood-di, crc-modules-3.10-3-kirkwood-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: fuse-modules-3.10-3-kirkwood-di Architecture: armel @@ -1718,8 +1718,8 @@ Depends: kernel-image-3.10-3-kirkwood-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-kirkwood -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-kirkwood Package: kernel-image-3.10-3-orion5x-di Architecture: armel @@ -1730,8 +1730,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: nic-modules-3.10-3-orion5x-di Architecture: armel @@ -1742,8 +1742,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: nic-shared-modules-3.10-3-orion5x-di Architecture: armel @@ -1754,8 +1754,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: usb-serial-modules-3.10-3-orion5x-di Architecture: armel @@ -1765,8 +1765,8 @@ Depends: kernel-image-3.10-3-orion5x-di, usb-modules-3.10-3-orion5x-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: ppp-modules-3.10-3-orion5x-di Architecture: armel @@ -1776,8 +1776,8 @@ Depends: kernel-image-3.10-3-orion5x-di, zlib-modules-3.10-3-orion5x-di, crc-modules-3.10-3-orion5x-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: cdrom-core-modules-3.10-3-orion5x-di Architecture: armel @@ -1787,8 +1787,8 @@ Depends: kernel-image-3.10-3-orion5x-di, scsi-core-modules-3.10-3-orion5x-di, isofs-modules-3.10-3-orion5x-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: scsi-core-modules-3.10-3-orion5x-di Architecture: armel @@ -1798,8 +1798,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: loop-modules-3.10-3-orion5x-di Architecture: armel @@ -1809,8 +1809,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: ipv6-modules-3.10-3-orion5x-di Architecture: armel @@ -1820,8 +1820,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: IPv6 driver This package contains the IPv6 driver for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: btrfs-modules-3.10-3-orion5x-di Architecture: armel @@ -1831,8 +1831,8 @@ Depends: kernel-image-3.10-3-orion5x-di, core-modules-3.10-3-orion5x-di, crc-modules-3.10-3-orion5x-di, zlib-modules-3.10-3-orion5x-di, md-modules-3.10-3-orion5x-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: ext2-modules-3.10-3-orion5x-di Architecture: armel @@ -1842,8 +1842,8 @@ Depends: kernel-image-3.10-3-orion5x-di, core-modules-3.10-3-orion5x-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: ext3-modules-3.10-3-orion5x-di Architecture: armel @@ -1853,8 +1853,8 @@ Depends: kernel-image-3.10-3-orion5x-di, core-modules-3.10-3-orion5x-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: ext4-modules-3.10-3-orion5x-di Architecture: armel @@ -1864,8 +1864,8 @@ Depends: kernel-image-3.10-3-orion5x-di, core-modules-3.10-3-orion5x-di, crc-modules-3.10-3-orion5x-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: isofs-modules-3.10-3-orion5x-di Architecture: armel @@ -1875,8 +1875,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: jffs2-modules-3.10-3-orion5x-di Architecture: armel @@ -1886,8 +1886,8 @@ Depends: kernel-image-3.10-3-orion5x-di, zlib-modules-3.10-3-orion5x-di Description: JFFS2 filesystem support This package contains the JFFS2 filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: jfs-modules-3.10-3-orion5x-di Architecture: armel @@ -1897,8 +1897,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: fat-modules-3.10-3-orion5x-di Architecture: armel @@ -1908,8 +1908,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: minix-modules-3.10-3-orion5x-di Architecture: armel @@ -1919,8 +1919,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: Minix filesystem support This package contains the Minix filesystem module for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: md-modules-3.10-3-orion5x-di Architecture: armel @@ -1930,8 +1930,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: multipath-modules-3.10-3-orion5x-di Architecture: armel @@ -1941,8 +1941,8 @@ Depends: kernel-image-3.10-3-orion5x-di, md-modules-3.10-3-orion5x-di, scsi-core-modules-3.10-3-orion5x-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: usb-modules-3.10-3-orion5x-di Architecture: armel @@ -1952,8 +1952,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: usb-storage-modules-3.10-3-orion5x-di Architecture: armel @@ -1963,8 +1963,8 @@ Depends: kernel-image-3.10-3-orion5x-di, scsi-core-modules-3.10-3-orion5x-di, usb-modules-3.10-3-orion5x-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: event-modules-3.10-3-orion5x-di Architecture: armel @@ -1974,8 +1974,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: nic-usb-modules-3.10-3-orion5x-di Architecture: armel @@ -1985,8 +1985,8 @@ Depends: kernel-image-3.10-3-orion5x-di, nic-shared-modules-3.10-3-orion5x-di, usb-modules-3.10-3-orion5x-di, core-modules-3.10-3-orion5x-di, crc-modules-3.10-3-orion5x-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: sata-modules-3.10-3-orion5x-di Architecture: armel @@ -1996,8 +1996,8 @@ Depends: kernel-image-3.10-3-orion5x-di, scsi-core-modules-3.10-3-orion5x-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: core-modules-3.10-3-orion5x-di Architecture: armel @@ -2008,8 +2008,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: crc-modules-3.10-3-orion5x-di Architecture: armel @@ -2019,8 +2019,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: crypto-modules-3.10-3-orion5x-di Architecture: armel @@ -2030,8 +2030,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: crypto-dm-modules-3.10-3-orion5x-di Architecture: armel @@ -2041,8 +2041,8 @@ Depends: kernel-image-3.10-3-orion5x-di, md-modules-3.10-3-orion5x-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: nbd-modules-3.10-3-orion5x-di Architecture: armel @@ -2053,8 +2053,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: squashfs-modules-3.10-3-orion5x-di Architecture: armel @@ -2064,8 +2064,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: zlib-modules-3.10-3-orion5x-di Architecture: armel @@ -2075,8 +2075,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: udf-modules-3.10-3-orion5x-di Architecture: armel @@ -2086,8 +2086,8 @@ Depends: kernel-image-3.10-3-orion5x-di, crc-modules-3.10-3-orion5x-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: fuse-modules-3.10-3-orion5x-di Architecture: armel @@ -2097,8 +2097,8 @@ Depends: kernel-image-3.10-3-orion5x-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-orion5x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-orion5x Package: kernel-image-3.10-3-versatile-di Architecture: armel @@ -2109,8 +2109,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: nic-modules-3.10-3-versatile-di Architecture: armel @@ -2121,8 +2121,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: nic-shared-modules-3.10-3-versatile-di Architecture: armel @@ -2133,8 +2133,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: usb-serial-modules-3.10-3-versatile-di Architecture: armel @@ -2144,8 +2144,8 @@ Depends: kernel-image-3.10-3-versatile-di, usb-modules-3.10-3-versatile-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: ppp-modules-3.10-3-versatile-di Architecture: armel @@ -2155,8 +2155,8 @@ Depends: kernel-image-3.10-3-versatile-di, zlib-modules-3.10-3-versatile-di, crc-modules-3.10-3-versatile-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: cdrom-core-modules-3.10-3-versatile-di Architecture: armel @@ -2166,8 +2166,8 @@ Depends: kernel-image-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di, isofs-modules-3.10-3-versatile-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: scsi-core-modules-3.10-3-versatile-di Architecture: armel @@ -2177,8 +2177,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: scsi-common-modules-3.10-3-versatile-di Architecture: armel @@ -2188,8 +2188,8 @@ Depends: kernel-image-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di, cdrom-core-modules-3.10-3-versatile-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: loop-modules-3.10-3-versatile-di Architecture: armel @@ -2199,8 +2199,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: btrfs-modules-3.10-3-versatile-di Architecture: armel @@ -2210,8 +2210,8 @@ Depends: kernel-image-3.10-3-versatile-di, core-modules-3.10-3-versatile-di, crc-modules-3.10-3-versatile-di, zlib-modules-3.10-3-versatile-di, md-modules-3.10-3-versatile-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: ext2-modules-3.10-3-versatile-di Architecture: armel @@ -2221,8 +2221,8 @@ Depends: kernel-image-3.10-3-versatile-di, core-modules-3.10-3-versatile-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: ext3-modules-3.10-3-versatile-di Architecture: armel @@ -2232,8 +2232,8 @@ Depends: kernel-image-3.10-3-versatile-di, core-modules-3.10-3-versatile-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: ext4-modules-3.10-3-versatile-di Architecture: armel @@ -2243,8 +2243,8 @@ Depends: kernel-image-3.10-3-versatile-di, core-modules-3.10-3-versatile-di, crc-modules-3.10-3-versatile-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: isofs-modules-3.10-3-versatile-di Architecture: armel @@ -2254,8 +2254,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: fat-modules-3.10-3-versatile-di Architecture: armel @@ -2265,8 +2265,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: md-modules-3.10-3-versatile-di Architecture: armel @@ -2276,8 +2276,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: multipath-modules-3.10-3-versatile-di Architecture: armel @@ -2287,8 +2287,8 @@ Depends: kernel-image-3.10-3-versatile-di, md-modules-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: usb-modules-3.10-3-versatile-di Architecture: armel @@ -2298,8 +2298,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: usb-storage-modules-3.10-3-versatile-di Architecture: armel @@ -2309,8 +2309,8 @@ Depends: kernel-image-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di, usb-modules-3.10-3-versatile-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: nic-usb-modules-3.10-3-versatile-di Architecture: armel @@ -2320,8 +2320,8 @@ Depends: kernel-image-3.10-3-versatile-di, nic-shared-modules-3.10-3-versatile-di, usb-modules-3.10-3-versatile-di, core-modules-3.10-3-versatile-di, crc-modules-3.10-3-versatile-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: sata-modules-3.10-3-versatile-di Architecture: armel @@ -2331,8 +2331,8 @@ Depends: kernel-image-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: core-modules-3.10-3-versatile-di Architecture: armel @@ -2343,8 +2343,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: crc-modules-3.10-3-versatile-di Architecture: armel @@ -2354,8 +2354,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: crypto-modules-3.10-3-versatile-di Architecture: armel @@ -2365,8 +2365,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: crypto-dm-modules-3.10-3-versatile-di Architecture: armel @@ -2376,8 +2376,8 @@ Depends: kernel-image-3.10-3-versatile-di, md-modules-3.10-3-versatile-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: nbd-modules-3.10-3-versatile-di Architecture: armel @@ -2388,8 +2388,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: squashfs-modules-3.10-3-versatile-di Architecture: armel @@ -2399,8 +2399,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: virtio-modules-3.10-3-versatile-di Architecture: armel @@ -2410,8 +2410,8 @@ Depends: kernel-image-3.10-3-versatile-di, scsi-core-modules-3.10-3-versatile-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: zlib-modules-3.10-3-versatile-di Architecture: armel @@ -2421,8 +2421,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: udf-modules-3.10-3-versatile-di Architecture: armel @@ -2432,8 +2432,8 @@ Depends: kernel-image-3.10-3-versatile-di, crc-modules-3.10-3-versatile-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: fuse-modules-3.10-3-versatile-di Architecture: armel @@ -2443,8 +2443,8 @@ Depends: kernel-image-3.10-3-versatile-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-versatile -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-versatile Package: linux-image-3.10-3-iop32x Architecture: armel @@ -2592,13 +2592,13 @@ Package: linux-headers-3.10-3-all-armhf Architecture: armhf -Depends: ${misc:Depends}, linux-headers-3.10-3-armmp (= ${binary:Version}), linux-headers-3.10-3-mx5 (= ${binary:Version}), linux-headers-3.10-3-omap (= ${binary:Version}), linux-headers-3.10-3-vexpress (= ${binary:Version}) +Depends: ${misc:Depends}, linux-headers-3.10-3-rpi (= ${binary:Version}) Description: All header files for Linux 3.10 (meta-package) This package depends against all architecture-specific kernel header files for Linux kernel version 3.10, generally used for building out-of-tree kernel modules. -Package: kernel-image-3.10-3-armmp-di +Package: kernel-image-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra @@ -2607,1146 +2607,251 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: nic-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-modules, nic-extra-modules -Depends: kernel-image-3.10-3-armmp-di, nic-shared-modules-3.10-3-armmp-di, core-modules-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di -Description: NIC drivers - This package contains Ethernet and some paravirtualised network drivers - for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: nic-wireless-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-wireless-modules -Depends: kernel-image-3.10-3-armmp-di, nic-shared-modules-3.10-3-armmp-di, core-modules-3.10-3-armmp-di, usb-modules-3.10-3-armmp-di, mmc-modules-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di -Description: Wireless NIC drivers - This package contains wireless NIC drivers for the kernel. Includes - crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: nic-shared-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-shared-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Shared NIC drivers - This package contains NIC drivers needed by combinations of nic-modules, - nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: pata-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: pata-modules -Depends: kernel-image-3.10-3-armmp-di, ata-modules-3.10-3-armmp-di -Description: PATA drivers - This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: scsi-core-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: scsi-core-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Core SCSI subsystem - This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: loop-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: loop-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Loopback filesystem support - This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: btrfs-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: btrfs-modules -Depends: kernel-image-3.10-3-armmp-di, core-modules-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di, md-modules-3.10-3-armmp-di -Description: BTRFS filesystem support - This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: ext2-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext2-modules -Depends: kernel-image-3.10-3-armmp-di, core-modules-3.10-3-armmp-di -Description: EXT2 filesystem support - This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: ext3-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext3-modules -Depends: kernel-image-3.10-3-armmp-di, core-modules-3.10-3-armmp-di -Description: EXT3 filesystem support - This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: ext4-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext4-modules -Depends: kernel-image-3.10-3-armmp-di, core-modules-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di -Description: EXT4 filesystem support - This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: isofs-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: isofs-modules -Depends: kernel-image-3.10-3-armmp-di -Description: ISOFS filesystem support - This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: jfs-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: jfs-modules -Depends: kernel-image-3.10-3-armmp-di -Description: JFS filesystem support - This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: fat-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: fat-modules -Depends: kernel-image-3.10-3-armmp-di -Description: FAT filesystem support - This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: md-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: md-modules -Depends: kernel-image-3.10-3-armmp-di -Description: RAID and LVM support - This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: multipath-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: multipath-modules -Depends: kernel-image-3.10-3-armmp-di, md-modules-3.10-3-armmp-di, scsi-core-modules-3.10-3-armmp-di -Description: Multipath support - This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: usb-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: usb-modules -Depends: kernel-image-3.10-3-armmp-di -Description: USB support - This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: usb-storage-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: usb-storage-modules -Depends: kernel-image-3.10-3-armmp-di, scsi-core-modules-3.10-3-armmp-di, usb-modules-3.10-3-armmp-di -Description: USB storage support - This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: input-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: input-modules -Depends: kernel-image-3.10-3-armmp-di, usb-modules-3.10-3-armmp-di -Description: Input devices support - This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: event-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: event-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Event support - This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: nic-usb-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-usb-modules -Depends: kernel-image-3.10-3-armmp-di, nic-shared-modules-3.10-3-armmp-di, nic-wireless-modules-3.10-3-armmp-di, usb-modules-3.10-3-armmp-di, core-modules-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di -Description: USB NIC drivers - This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: sata-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: sata-modules -Depends: kernel-image-3.10-3-armmp-di, scsi-core-modules-3.10-3-armmp-di, ata-modules-3.10-3-armmp-di -Description: SATA drivers - This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: core-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: core-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Core modules - This package contains core modules for the kernel, that will almost - always be needed. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: crc-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crc-modules -Depends: kernel-image-3.10-3-armmp-di -Description: CRC modules - This package contains CRC support modules. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: crypto-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crypto-modules -Depends: kernel-image-3.10-3-armmp-di -Description: crypto modules - This package contains crypto modules. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: crypto-dm-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crypto-dm-modules -Depends: kernel-image-3.10-3-armmp-di, md-modules-3.10-3-armmp-di -Description: devicemapper crypto module - This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: ata-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: ata-modules -Depends: kernel-image-3.10-3-armmp-di, scsi-core-modules-3.10-3-armmp-di -Description: ATA disk modules - This package contains core ATA disk modules used by both PATA and SATA - disk drivers. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: mmc-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: mmc-modules -Depends: kernel-image-3.10-3-armmp-di, core-modules-3.10-3-armmp-di -Description: MMC/SD card modules - This package contains modules needed to support MMC (multimedia) and SD - cards. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: nbd-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: nbd-modules -Depends: kernel-image-3.10-3-armmp-di -Description: Network Block Device modules - This package contains the modules required for support of the Network - Block Device -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: squashfs-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: squashfs-modules -Depends: kernel-image-3.10-3-armmp-di -Description: squashfs modules - This package contains squashfs modules. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: uinput-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: uinput-modules -Depends: kernel-image-3.10-3-armmp-di -Description: uinput support - This package contains the uinput module. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: udf-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: udf-modules -Depends: kernel-image-3.10-3-armmp-di, crc-modules-3.10-3-armmp-di -Description: UDF modules - This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: fuse-modules-3.10-3-armmp-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: fuse-modules -Depends: kernel-image-3.10-3-armmp-di -Description: FUSE modules - This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-armmp -Package-Type: udeb - -Package: kernel-image-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: kernel-image, rtc-modules -Description: Linux kernel binary image for the Debian installer - This package contains the kernel image for the Debian installer boot - images. It does _not_ provide a usable kernel for your full Debian - system. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: nic-wireless-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-wireless-modules -Depends: kernel-image-3.10-3-mx5-di, nic-shared-modules-3.10-3-mx5-di, core-modules-3.10-3-mx5-di, mmc-modules-3.10-3-mx5-di, crc-modules-3.10-3-mx5-di -Description: Wireless NIC drivers - This package contains wireless NIC drivers for the kernel. Includes - crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: nic-shared-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-shared-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Shared NIC drivers - This package contains NIC drivers needed by combinations of nic-modules, - nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: pata-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: pata-modules -Depends: kernel-image-3.10-3-mx5-di, ata-modules-3.10-3-mx5-di -Description: PATA drivers - This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: scsi-core-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: scsi-core-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Core SCSI subsystem - This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: loop-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: loop-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Loopback filesystem support - This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: btrfs-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: btrfs-modules -Depends: kernel-image-3.10-3-mx5-di, core-modules-3.10-3-mx5-di, crc-modules-3.10-3-mx5-di, md-modules-3.10-3-mx5-di -Description: BTRFS filesystem support - This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: ext2-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext2-modules -Depends: kernel-image-3.10-3-mx5-di, core-modules-3.10-3-mx5-di -Description: EXT2 filesystem support - This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: ext3-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext3-modules -Depends: kernel-image-3.10-3-mx5-di, core-modules-3.10-3-mx5-di -Description: EXT3 filesystem support - This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: ext4-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext4-modules -Depends: kernel-image-3.10-3-mx5-di, core-modules-3.10-3-mx5-di, crc-modules-3.10-3-mx5-di -Description: EXT4 filesystem support - This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: isofs-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: isofs-modules -Depends: kernel-image-3.10-3-mx5-di -Description: ISOFS filesystem support - This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: jfs-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: jfs-modules -Depends: kernel-image-3.10-3-mx5-di -Description: JFS filesystem support - This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: fat-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: fat-modules -Depends: kernel-image-3.10-3-mx5-di -Description: FAT filesystem support - This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: minix-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: minix-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Minix filesystem support - This package contains the Minix filesystem module for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: md-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: md-modules -Depends: kernel-image-3.10-3-mx5-di -Description: RAID and LVM support - This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: multipath-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: multipath-modules -Depends: kernel-image-3.10-3-mx5-di, md-modules-3.10-3-mx5-di, scsi-core-modules-3.10-3-mx5-di -Description: Multipath support - This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: usb-storage-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: usb-storage-modules -Depends: kernel-image-3.10-3-mx5-di, scsi-core-modules-3.10-3-mx5-di -Description: USB storage support - This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: input-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: input-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Input devices support - This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: nic-usb-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-usb-modules -Depends: kernel-image-3.10-3-mx5-di, nic-shared-modules-3.10-3-mx5-di, nic-wireless-modules-3.10-3-mx5-di, core-modules-3.10-3-mx5-di, crc-modules-3.10-3-mx5-di -Description: USB NIC drivers - This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: sata-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: sata-modules -Depends: kernel-image-3.10-3-mx5-di, scsi-core-modules-3.10-3-mx5-di, ata-modules-3.10-3-mx5-di -Description: SATA drivers - This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: core-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: core-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Core modules - This package contains core modules for the kernel, that will almost - always be needed. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: crc-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crc-modules -Depends: kernel-image-3.10-3-mx5-di -Description: CRC modules - This package contains CRC support modules. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: crypto-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crypto-modules -Depends: kernel-image-3.10-3-mx5-di -Description: crypto modules - This package contains crypto modules. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: crypto-dm-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: crypto-dm-modules -Depends: kernel-image-3.10-3-mx5-di, md-modules-3.10-3-mx5-di -Description: devicemapper crypto module - This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: ata-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: ata-modules -Depends: kernel-image-3.10-3-mx5-di, scsi-core-modules-3.10-3-mx5-di -Description: ATA disk modules - This package contains core ATA disk modules used by both PATA and SATA - disk drivers. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: mmc-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: mmc-modules -Depends: kernel-image-3.10-3-mx5-di, core-modules-3.10-3-mx5-di -Description: MMC/SD card modules - This package contains modules needed to support MMC (multimedia) and SD - cards. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: nbd-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: nbd-modules -Depends: kernel-image-3.10-3-mx5-di -Description: Network Block Device modules - This package contains the modules required for support of the Network - Block Device -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: squashfs-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: squashfs-modules -Depends: kernel-image-3.10-3-mx5-di -Description: squashfs modules - This package contains squashfs modules. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: uinput-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: uinput-modules -Depends: kernel-image-3.10-3-mx5-di -Description: uinput support - This package contains the uinput module. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: udf-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: udf-modules -Depends: kernel-image-3.10-3-mx5-di, crc-modules-3.10-3-mx5-di -Description: UDF modules - This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: fuse-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: fuse-modules -Depends: kernel-image-3.10-3-mx5-di -Description: FUSE modules - This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: mtd-modules-3.10-3-mx5-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: mtd-modules -Depends: kernel-image-3.10-3-mx5-di -Description: MTD modules - This package contains MTD modules. -Kernel-Version: 3.10-3-mx5 -Package-Type: udeb - -Package: kernel-image-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: kernel-image, rtc-modules -Description: Linux kernel binary image for the Debian installer - This package contains the kernel image for the Debian installer boot - images. It does _not_ provide a usable kernel for your full Debian - system. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: nic-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-modules, nic-extra-modules -Depends: kernel-image-3.10-3-vexpress-di, nic-shared-modules-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di -Description: NIC drivers - This package contains Ethernet and some paravirtualised network drivers - for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: nic-wireless-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-wireless-modules -Depends: kernel-image-3.10-3-vexpress-di, nic-shared-modules-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di, usb-modules-3.10-3-vexpress-di, mmc-modules-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di -Description: Wireless NIC drivers - This package contains wireless NIC drivers for the kernel. Includes - crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: nic-shared-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: nic-shared-modules -Depends: kernel-image-3.10-3-vexpress-di -Description: Shared NIC drivers - This package contains NIC drivers needed by combinations of nic-modules, - nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: scsi-core-modules-3.10-3-vexpress-di +Package: scsi-core-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: scsi-core-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: loop-modules-3.10-3-vexpress-di +Package: loop-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: loop-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: btrfs-modules-3.10-3-vexpress-di +Package: btrfs-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: btrfs-modules -Depends: kernel-image-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di, md-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di, crc-modules-3.10-3-rpi-di, md-modules-3.10-3-rpi-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: ext2-modules-3.10-3-vexpress-di +Package: ext2-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: ext2-modules -Depends: kernel-image-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: ext3-modules-3.10-3-vexpress-di +Package: ext3-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: ext3-modules -Depends: kernel-image-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: ext4-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: ext4-modules -Depends: kernel-image-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di -Description: EXT4 filesystem support - This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: isofs-modules-3.10-3-vexpress-di +Package: isofs-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: isofs-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: jfs-modules-3.10-3-vexpress-di +Package: jfs-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: jfs-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: fat-modules-3.10-3-vexpress-di +Package: minix-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra -Provides: fat-modules -Depends: kernel-image-3.10-3-vexpress-di -Description: FAT filesystem support - This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +Provides: minix-modules +Depends: kernel-image-3.10-3-rpi-di +Description: Minix filesystem support + This package contains the Minix filesystem module for the kernel. +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: md-modules-3.10-3-vexpress-di +Package: md-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: md-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: multipath-modules-3.10-3-vexpress-di +Package: multipath-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: multipath-modules -Depends: kernel-image-3.10-3-vexpress-di, md-modules-3.10-3-vexpress-di, scsi-core-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di, md-modules-3.10-3-rpi-di, scsi-core-modules-3.10-3-rpi-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: usb-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: usb-modules -Depends: kernel-image-3.10-3-vexpress-di -Description: USB support - This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: usb-storage-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: usb-storage-modules -Depends: kernel-image-3.10-3-vexpress-di, scsi-core-modules-3.10-3-vexpress-di, usb-modules-3.10-3-vexpress-di -Description: USB storage support - This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: input-modules-3.10-3-vexpress-di +Package: input-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: input-modules -Depends: kernel-image-3.10-3-vexpress-di, usb-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: nic-usb-modules-3.10-3-vexpress-di +Package: nic-usb-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: standard Provides: nic-usb-modules -Depends: kernel-image-3.10-3-vexpress-di, nic-shared-modules-3.10-3-vexpress-di, nic-wireless-modules-3.10-3-vexpress-di, usb-modules-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di, crc-modules-3.10-3-rpi-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: core-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: standard -Provides: core-modules -Depends: kernel-image-3.10-3-vexpress-di -Description: Core modules - This package contains core modules for the kernel, that will almost - always be needed. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: crc-modules-3.10-3-vexpress-di +Package: crc-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: crc-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: crypto-modules-3.10-3-vexpress-di +Package: crypto-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: crypto-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: crypto-dm-modules-3.10-3-vexpress-di +Package: crypto-dm-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: crypto-dm-modules -Depends: kernel-image-3.10-3-vexpress-di, md-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di, md-modules-3.10-3-rpi-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: mmc-modules-3.10-3-vexpress-di -Architecture: armhf -Section: debian-installer -Priority: extra -Provides: mmc-modules -Depends: kernel-image-3.10-3-vexpress-di, core-modules-3.10-3-vexpress-di -Description: MMC/SD card modules - This package contains modules needed to support MMC (multimedia) and SD - cards. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: nbd-modules-3.10-3-vexpress-di +Package: nbd-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: nbd-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: squashfs-modules-3.10-3-vexpress-di +Package: squashfs-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: squashfs-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: uinput-modules-3.10-3-vexpress-di +Package: uinput-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: uinput-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: udf-modules-3.10-3-vexpress-di +Package: udf-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: udf-modules -Depends: kernel-image-3.10-3-vexpress-di, crc-modules-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di, crc-modules-3.10-3-rpi-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: fuse-modules-3.10-3-vexpress-di +Package: fuse-modules-3.10-3-rpi-di Architecture: armhf Section: debian-installer Priority: extra Provides: fuse-modules -Depends: kernel-image-3.10-3-vexpress-di +Depends: kernel-image-3.10-3-rpi-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-vexpress -Package-Type: udeb - -Package: linux-image-3.10-3-armmp -Architecture: armhf -Provides: linux-image, linux-modules-3.10-3-armmp -Pre-Depends: debconf | debconf-2.0 -Depends: kmod | module-init-tools, linux-base (>= 3~), ${misc:Depends}, initramfs-tools (>= 0.110~) [armhf] | linux-initramfs-tool [armhf] -Recommends: firmware-linux-free (>= 3~) -Suggests: linux-doc-3.10, debian-kernel-handbook, fdutils [armhf] -Breaks: at (<< 3.1.12-1+squeeze1), initramfs-tools (<< 0.110~) -Description: Linux 3.10 for ARMv7 multiplatform compatible SoCs - The Linux kernel 3.10 and modules for use on ARMv7 multiplatform kernel - for Marvell Armada 370/xp, Freescale iMX5x/iMX6. - -Package: linux-headers-3.10-3-armmp -Architecture: armhf -Provides: linux-headers -Depends: linux-headers-3.10-3-common (= ${binary:Version}), linux-kbuild-3.10, ${misc:Depends}, gcc-4.7 -Description: Header files for Linux 3.10-3-armmp - This package provides the architecture-specific kernel header files for - Linux kernel 3.10-3-armmp, generally used for building out-of-tree kernel - modules. These files are going to be installed into - /usr/src/linux-headers-3.10-3-armmp, and can be used for building modules - that load into the kernel provided by the linux-image-3.10-3-armmp - package. +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-rpi -Package: linux-image-3.10-3-mx5 +Package: linux-image-3.10-3-rpi Architecture: armhf -Provides: linux-image, linux-modules-3.10-3-mx5 +Provides: linux-image, linux-modules-3.10-3-rpi Pre-Depends: debconf | debconf-2.0 Depends: kmod | module-init-tools, linux-base (>= 3~), ${misc:Depends}, initramfs-tools (>= 0.110~) [armhf] | linux-initramfs-tool [armhf] Recommends: firmware-linux-free (>= 3~) Suggests: linux-doc-3.10, debian-kernel-handbook, fdutils [armhf] Breaks: at (<< 3.1.12-1+squeeze1), initramfs-tools (<< 0.110~) -Description: Linux 3.10 for Freescale i.MX51/53 - The Linux kernel 3.10 and modules for use on Freescale i.MX51 or i.MX53 - based systems. - -Package: linux-headers-3.10-3-mx5 -Architecture: armhf -Provides: linux-headers -Depends: linux-headers-3.10-3-common (= ${binary:Version}), linux-kbuild-3.10, ${misc:Depends}, gcc-4.7 -Description: Header files for Linux 3.10-3-mx5 - This package provides the architecture-specific kernel header files for - Linux kernel 3.10-3-mx5, generally used for building out-of-tree kernel - modules. These files are going to be installed into - /usr/src/linux-headers-3.10-3-mx5, and can be used for building modules - that load into the kernel provided by the linux-image-3.10-3-mx5 package. - -Package: linux-image-3.10-3-omap -Architecture: armhf -Provides: linux-image, linux-modules-3.10-3-omap -Pre-Depends: debconf | debconf-2.0 -Depends: kmod | module-init-tools, linux-base (>= 3~), ${misc:Depends}, initramfs-tools (>= 0.110~) [armhf] | linux-initramfs-tool [armhf] -Recommends: firmware-linux-free (>= 3~), uboot-mkimage [armhf] -Suggests: linux-doc-3.10, debian-kernel-handbook, fdutils [armhf] -Breaks: at (<< 3.1.12-1+squeeze1), initramfs-tools (<< 0.110~) -Description: Linux 3.10 for TI OMAP3+ - The Linux kernel 3.10 and modules for use on Texas Instruments OMAP3 or - OMAP4 based systems. +Description: Linux 3.10 for RaspberryPI + The Linux kernel 3.10 and modules for use on Raspberry PI. -Package: linux-headers-3.10-3-omap +Package: linux-headers-3.10-3-rpi Architecture: armhf Provides: linux-headers Depends: linux-headers-3.10-3-common (= ${binary:Version}), linux-kbuild-3.10, ${misc:Depends}, gcc-4.7 -Description: Header files for Linux 3.10-3-omap +Description: Header files for Linux 3.10-3-rpi This package provides the architecture-specific kernel header files for - Linux kernel 3.10-3-omap, generally used for building out-of-tree kernel + Linux kernel 3.10-3-rpi, generally used for building out-of-tree kernel modules. These files are going to be installed into - /usr/src/linux-headers-3.10-3-omap, and can be used for building modules - that load into the kernel provided by the linux-image-3.10-3-omap package. - -Package: linux-image-3.10-3-vexpress -Architecture: armhf -Provides: linux-image, linux-modules-3.10-3-vexpress -Pre-Depends: debconf | debconf-2.0 -Depends: kmod | module-init-tools, linux-base (>= 3~), ${misc:Depends}, initramfs-tools (>= 0.110~) [armhf] | linux-initramfs-tool [armhf] -Recommends: firmware-linux-free (>= 3~) -Suggests: linux-doc-3.10, debian-kernel-handbook, fdutils [armhf] -Breaks: at (<< 3.1.12-1+squeeze1), initramfs-tools (<< 0.110~) -Description: Linux 3.10 for ARM Ltd. Versatile Express - The Linux kernel 3.10 and modules for use on ARM Ltd. Versatile Express - family of processors. - -Package: linux-headers-3.10-3-vexpress -Architecture: armhf -Provides: linux-headers -Depends: linux-headers-3.10-3-common (= ${binary:Version}), linux-kbuild-3.10, ${misc:Depends}, gcc-4.7 -Description: Header files for Linux 3.10-3-vexpress - This package provides the architecture-specific kernel header files for - Linux kernel 3.10-3-vexpress, generally used for building out-of-tree - kernel modules. These files are going to be installed into - /usr/src/linux-headers-3.10-3-vexpress, and can be used for building - modules that load into the kernel provided by the - linux-image-3.10-3-vexpress package. + /usr/src/linux-headers-3.10-3-rpi, and can be used for building modules + that load into the kernel provided by the linux-image-3.10-3-rpi package. Package: linux-headers-3.10-3-all-hppa Architecture: hppa @@ -3765,8 +2870,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: nic-modules-3.10-3-parisc-di Architecture: hppa @@ -3777,8 +2882,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: ppp-modules-3.10-3-parisc-di Architecture: hppa @@ -3788,8 +2893,8 @@ Depends: kernel-image-3.10-3-parisc-di, zlib-modules-3.10-3-parisc-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: pata-modules-3.10-3-parisc-di Architecture: hppa @@ -3799,8 +2904,8 @@ Depends: kernel-image-3.10-3-parisc-di, scsi-core-modules-3.10-3-parisc-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: cdrom-core-modules-3.10-3-parisc-di Architecture: hppa @@ -3810,8 +2915,8 @@ Depends: kernel-image-3.10-3-parisc-di, scsi-core-modules-3.10-3-parisc-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: scsi-core-modules-3.10-3-parisc-di Architecture: hppa @@ -3821,8 +2926,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: scsi-modules-3.10-3-parisc-di Architecture: hppa @@ -3832,8 +2937,8 @@ Depends: kernel-image-3.10-3-parisc-di, scsi-core-modules-3.10-3-parisc-di, cdrom-core-modules-3.10-3-parisc-di, core-modules-3.10-3-parisc-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: loop-modules-3.10-3-parisc-di Architecture: hppa @@ -3843,8 +2948,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: btrfs-modules-3.10-3-parisc-di Architecture: hppa @@ -3854,8 +2959,8 @@ Depends: kernel-image-3.10-3-parisc-di, core-modules-3.10-3-parisc-di, zlib-modules-3.10-3-parisc-di, md-modules-3.10-3-parisc-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: ext3-modules-3.10-3-parisc-di Architecture: hppa @@ -3865,8 +2970,8 @@ Depends: kernel-image-3.10-3-parisc-di, core-modules-3.10-3-parisc-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: ext4-modules-3.10-3-parisc-di Architecture: hppa @@ -3876,8 +2981,8 @@ Depends: kernel-image-3.10-3-parisc-di, core-modules-3.10-3-parisc-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: fat-modules-3.10-3-parisc-di Architecture: hppa @@ -3887,8 +2992,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: md-modules-3.10-3-parisc-di Architecture: hppa @@ -3898,8 +3003,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: multipath-modules-3.10-3-parisc-di Architecture: hppa @@ -3909,8 +3014,8 @@ Depends: kernel-image-3.10-3-parisc-di, md-modules-3.10-3-parisc-di, scsi-core-modules-3.10-3-parisc-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: usb-modules-3.10-3-parisc-di Architecture: hppa @@ -3920,8 +3025,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: usb-storage-modules-3.10-3-parisc-di Architecture: hppa @@ -3931,8 +3036,8 @@ Depends: kernel-image-3.10-3-parisc-di, scsi-modules-3.10-3-parisc-di, usb-modules-3.10-3-parisc-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: input-modules-3.10-3-parisc-di Architecture: hppa @@ -3942,8 +3047,8 @@ Depends: kernel-image-3.10-3-parisc-di, usb-modules-3.10-3-parisc-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: core-modules-3.10-3-parisc-di Architecture: hppa @@ -3954,8 +3059,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: crypto-modules-3.10-3-parisc-di Architecture: hppa @@ -3965,8 +3070,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: crypto-dm-modules-3.10-3-parisc-di Architecture: hppa @@ -3976,8 +3081,8 @@ Depends: kernel-image-3.10-3-parisc-di, md-modules-3.10-3-parisc-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: nbd-modules-3.10-3-parisc-di Architecture: hppa @@ -3988,8 +3093,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: zlib-modules-3.10-3-parisc-di Architecture: hppa @@ -3999,8 +3104,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: fuse-modules-3.10-3-parisc-di Architecture: hppa @@ -4010,8 +3115,8 @@ Depends: kernel-image-3.10-3-parisc-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-parisc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc Package: kernel-image-3.10-3-parisc64-di Architecture: hppa @@ -4022,8 +3127,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: nic-modules-3.10-3-parisc64-di Architecture: hppa @@ -4034,8 +3139,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: ppp-modules-3.10-3-parisc64-di Architecture: hppa @@ -4045,8 +3150,8 @@ Depends: kernel-image-3.10-3-parisc64-di, zlib-modules-3.10-3-parisc64-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: pata-modules-3.10-3-parisc64-di Architecture: hppa @@ -4056,8 +3161,8 @@ Depends: kernel-image-3.10-3-parisc64-di, scsi-core-modules-3.10-3-parisc64-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: cdrom-core-modules-3.10-3-parisc64-di Architecture: hppa @@ -4067,8 +3172,8 @@ Depends: kernel-image-3.10-3-parisc64-di, scsi-core-modules-3.10-3-parisc64-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: scsi-core-modules-3.10-3-parisc64-di Architecture: hppa @@ -4078,8 +3183,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: scsi-modules-3.10-3-parisc64-di Architecture: hppa @@ -4089,8 +3194,8 @@ Depends: kernel-image-3.10-3-parisc64-di, scsi-core-modules-3.10-3-parisc64-di, cdrom-core-modules-3.10-3-parisc64-di, core-modules-3.10-3-parisc64-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: loop-modules-3.10-3-parisc64-di Architecture: hppa @@ -4100,8 +3205,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: btrfs-modules-3.10-3-parisc64-di Architecture: hppa @@ -4111,8 +3216,8 @@ Depends: kernel-image-3.10-3-parisc64-di, core-modules-3.10-3-parisc64-di, zlib-modules-3.10-3-parisc64-di, md-modules-3.10-3-parisc64-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: ext3-modules-3.10-3-parisc64-di Architecture: hppa @@ -4122,8 +3227,8 @@ Depends: kernel-image-3.10-3-parisc64-di, core-modules-3.10-3-parisc64-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: ext4-modules-3.10-3-parisc64-di Architecture: hppa @@ -4133,8 +3238,8 @@ Depends: kernel-image-3.10-3-parisc64-di, core-modules-3.10-3-parisc64-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: fat-modules-3.10-3-parisc64-di Architecture: hppa @@ -4144,8 +3249,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: md-modules-3.10-3-parisc64-di Architecture: hppa @@ -4155,8 +3260,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: multipath-modules-3.10-3-parisc64-di Architecture: hppa @@ -4166,8 +3271,8 @@ Depends: kernel-image-3.10-3-parisc64-di, md-modules-3.10-3-parisc64-di, scsi-core-modules-3.10-3-parisc64-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: usb-modules-3.10-3-parisc64-di Architecture: hppa @@ -4177,8 +3282,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: usb-storage-modules-3.10-3-parisc64-di Architecture: hppa @@ -4188,8 +3293,8 @@ Depends: kernel-image-3.10-3-parisc64-di, scsi-modules-3.10-3-parisc64-di, usb-modules-3.10-3-parisc64-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: input-modules-3.10-3-parisc64-di Architecture: hppa @@ -4199,8 +3304,8 @@ Depends: kernel-image-3.10-3-parisc64-di, usb-modules-3.10-3-parisc64-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: core-modules-3.10-3-parisc64-di Architecture: hppa @@ -4211,8 +3316,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: crypto-modules-3.10-3-parisc64-di Architecture: hppa @@ -4222,8 +3327,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: crypto-dm-modules-3.10-3-parisc64-di Architecture: hppa @@ -4233,8 +3338,8 @@ Depends: kernel-image-3.10-3-parisc64-di, md-modules-3.10-3-parisc64-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: nbd-modules-3.10-3-parisc64-di Architecture: hppa @@ -4245,8 +3350,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: zlib-modules-3.10-3-parisc64-di Architecture: hppa @@ -4256,8 +3361,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: fuse-modules-3.10-3-parisc64-di Architecture: hppa @@ -4267,8 +3372,8 @@ Depends: kernel-image-3.10-3-parisc64-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-parisc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-parisc64 Package: linux-image-3.10-3-parisc Architecture: hppa @@ -4381,8 +3486,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nic-modules-3.10-3-486-di Architecture: i386 @@ -4393,8 +3498,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nic-wireless-modules-3.10-3-486-di Architecture: i386 @@ -4405,8 +3510,8 @@ Description: Wireless NIC drivers This package contains wireless NIC drivers for the kernel. Includes crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nic-shared-modules-3.10-3-486-di Architecture: i386 @@ -4417,8 +3522,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: serial-modules-3.10-3-486-di Architecture: i386 @@ -4428,8 +3533,8 @@ Depends: kernel-image-3.10-3-486-di, pcmcia-modules-3.10-3-486-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: usb-serial-modules-3.10-3-486-di Architecture: i386 @@ -4439,8 +3544,8 @@ Depends: kernel-image-3.10-3-486-di, usb-modules-3.10-3-486-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ppp-modules-3.10-3-486-di Architecture: i386 @@ -4450,8 +3555,8 @@ Depends: kernel-image-3.10-3-486-di, serial-modules-3.10-3-486-di, zlib-modules-3.10-3-486-di, crc-modules-3.10-3-486-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: pata-modules-3.10-3-486-di Architecture: i386 @@ -4461,8 +3566,8 @@ Depends: kernel-image-3.10-3-486-di, ata-modules-3.10-3-486-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: cdrom-core-modules-3.10-3-486-di Architecture: i386 @@ -4472,8 +3577,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, isofs-modules-3.10-3-486-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: firewire-core-modules-3.10-3-486-di Architecture: i386 @@ -4483,8 +3588,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, crc-modules-3.10-3-486-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: scsi-core-modules-3.10-3-486-di Architecture: i386 @@ -4494,8 +3599,8 @@ Depends: kernel-image-3.10-3-486-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: scsi-modules-3.10-3-486-di Architecture: i386 @@ -4505,8 +3610,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, cdrom-core-modules-3.10-3-486-di, core-modules-3.10-3-486-di, ata-modules-3.10-3-486-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: scsi-common-modules-3.10-3-486-di Architecture: i386 @@ -4516,8 +3621,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, cdrom-core-modules-3.10-3-486-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: scsi-extra-modules-3.10-3-486-di Architecture: i386 @@ -4528,8 +3633,8 @@ Description: Uncommon SCSI drivers This package contains uncommon SCSI drivers for the kernel. This includes SCSI RAID drivers, and some of the less common SCSI controllers. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: loop-modules-3.10-3-486-di Architecture: i386 @@ -4539,8 +3644,8 @@ Depends: kernel-image-3.10-3-486-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: btrfs-modules-3.10-3-486-di Architecture: i386 @@ -4550,8 +3655,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di, crc-modules-3.10-3-486-di, zlib-modules-3.10-3-486-di, md-modules-3.10-3-486-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ext2-modules-3.10-3-486-di Architecture: i386 @@ -4561,8 +3666,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ext3-modules-3.10-3-486-di Architecture: i386 @@ -4572,8 +3677,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ext4-modules-3.10-3-486-di Architecture: i386 @@ -4583,8 +3688,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di, crc-modules-3.10-3-486-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: isofs-modules-3.10-3-486-di Architecture: i386 @@ -4594,8 +3699,8 @@ Depends: kernel-image-3.10-3-486-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: jfs-modules-3.10-3-486-di Architecture: i386 @@ -4605,8 +3710,8 @@ Depends: kernel-image-3.10-3-486-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ntfs-modules-3.10-3-486-di Architecture: i386 @@ -4616,8 +3721,8 @@ Depends: kernel-image-3.10-3-486-di Description: NTFS filesystem support This package contains the NTFS file system module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: xfs-modules-3.10-3-486-di Architecture: i386 @@ -4627,8 +3732,8 @@ Depends: kernel-image-3.10-3-486-di, crc-modules-3.10-3-486-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: fat-modules-3.10-3-486-di Architecture: i386 @@ -4638,8 +3743,8 @@ Depends: kernel-image-3.10-3-486-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: md-modules-3.10-3-486-di Architecture: i386 @@ -4649,8 +3754,8 @@ Depends: kernel-image-3.10-3-486-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: multipath-modules-3.10-3-486-di Architecture: i386 @@ -4660,8 +3765,8 @@ Depends: kernel-image-3.10-3-486-di, md-modules-3.10-3-486-di, scsi-core-modules-3.10-3-486-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: usb-modules-3.10-3-486-di Architecture: i386 @@ -4671,8 +3776,8 @@ Depends: kernel-image-3.10-3-486-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: usb-storage-modules-3.10-3-486-di Architecture: i386 @@ -4682,8 +3787,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, usb-modules-3.10-3-486-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: pcmcia-storage-modules-3.10-3-486-di Architecture: i386 @@ -4693,8 +3798,8 @@ Depends: kernel-image-3.10-3-486-di, cdrom-core-modules-3.10-3-486-di, pcmcia-modules-3.10-3-486-di, ata-modules-3.10-3-486-di Description: PCMCIA storage drivers This package contains PCMCIA storage drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: fb-modules-3.10-3-486-di Architecture: i386 @@ -4704,8 +3809,8 @@ Depends: kernel-image-3.10-3-486-di, i2c-modules-3.10-3-486-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: input-modules-3.10-3-486-di Architecture: i386 @@ -4715,8 +3820,8 @@ Depends: kernel-image-3.10-3-486-di, usb-modules-3.10-3-486-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: event-modules-3.10-3-486-di Architecture: i386 @@ -4726,8 +3831,8 @@ Depends: kernel-image-3.10-3-486-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: mouse-modules-3.10-3-486-di Architecture: i386 @@ -4737,8 +3842,8 @@ Depends: kernel-image-3.10-3-486-di, event-modules-3.10-3-486-di, input-modules-3.10-3-486-di, usb-modules-3.10-3-486-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nic-pcmcia-modules-3.10-3-486-di Architecture: i386 @@ -4748,8 +3853,8 @@ Depends: kernel-image-3.10-3-486-di, nic-shared-modules-3.10-3-486-di, nic-wireless-modules-3.10-3-486-di, pcmcia-modules-3.10-3-486-di, mmc-core-modules-3.10-3-486-di Description: Common PCMCIA NIC drivers This package contains common PCMCIA NIC drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: pcmcia-modules-3.10-3-486-di Architecture: i386 @@ -4759,8 +3864,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nic-usb-modules-3.10-3-486-di Architecture: i386 @@ -4770,8 +3875,8 @@ Depends: kernel-image-3.10-3-486-di, nic-shared-modules-3.10-3-486-di, nic-wireless-modules-3.10-3-486-di, usb-modules-3.10-3-486-di, core-modules-3.10-3-486-di, crc-modules-3.10-3-486-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: sata-modules-3.10-3-486-di Architecture: i386 @@ -4781,8 +3886,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di, ata-modules-3.10-3-486-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: core-modules-3.10-3-486-di Architecture: i386 @@ -4793,8 +3898,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: acpi-modules-3.10-3-486-di Architecture: i386 @@ -4804,8 +3909,8 @@ Depends: kernel-image-3.10-3-486-di Description: ACPI support modules This package contains kernel modules for ACPI. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: i2c-modules-3.10-3-486-di Architecture: i386 @@ -4815,8 +3920,8 @@ Depends: kernel-image-3.10-3-486-di Description: i2c support modules This package contains basic i2c support modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: crc-modules-3.10-3-486-di Architecture: i386 @@ -4826,8 +3931,8 @@ Depends: kernel-image-3.10-3-486-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: crypto-modules-3.10-3-486-di Architecture: i386 @@ -4837,8 +3942,8 @@ Depends: kernel-image-3.10-3-486-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: crypto-dm-modules-3.10-3-486-di Architecture: i386 @@ -4848,8 +3953,8 @@ Depends: kernel-image-3.10-3-486-di, md-modules-3.10-3-486-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: efi-modules-3.10-3-486-di Architecture: i386 @@ -4859,8 +3964,8 @@ Depends: kernel-image-3.10-3-486-di Description: EFI modules This package contains EFI modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: ata-modules-3.10-3-486-di Architecture: i386 @@ -4871,8 +3976,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: mmc-core-modules-3.10-3-486-di Architecture: i386 @@ -4882,8 +3987,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di Description: MMC/SD/SDIO core modules This package contains core modules for MMC/SD/SDIO support. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: mmc-modules-3.10-3-486-di Architecture: i386 @@ -4894,8 +3999,8 @@ Description: MMC/SD card modules This package contains modules needed to support MMC (multimedia) and SD cards. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: nbd-modules-3.10-3-486-di Architecture: i386 @@ -4906,8 +4011,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: squashfs-modules-3.10-3-486-di Architecture: i386 @@ -4917,8 +4022,8 @@ Depends: kernel-image-3.10-3-486-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: speakup-modules-3.10-3-486-di Architecture: i386 @@ -4928,8 +4033,8 @@ Depends: kernel-image-3.10-3-486-di Description: speakup modules This package contains speakup modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: virtio-modules-3.10-3-486-di Architecture: i386 @@ -4939,8 +4044,8 @@ Depends: kernel-image-3.10-3-486-di, scsi-core-modules-3.10-3-486-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: uinput-modules-3.10-3-486-di Architecture: i386 @@ -4950,8 +4055,8 @@ Depends: kernel-image-3.10-3-486-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: sound-modules-3.10-3-486-di Architecture: i386 @@ -4961,8 +4066,8 @@ Depends: kernel-image-3.10-3-486-di, core-modules-3.10-3-486-di, i2c-modules-3.10-3-486-di, usb-modules-3.10-3-486-di, pcmcia-modules-3.10-3-486-di, firewire-core-modules-3.10-3-486-di, crc-modules-3.10-3-486-di Description: sound support This package contains sound modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: zlib-modules-3.10-3-486-di Architecture: i386 @@ -4972,8 +4077,8 @@ Depends: kernel-image-3.10-3-486-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: hyperv-modules-3.10-3-486-di Architecture: i386 @@ -4983,8 +4088,8 @@ Depends: kernel-image-3.10-3-486-di, input-modules-3.10-3-486-di, scsi-core-modules-3.10-3-486-di Description: Hyper-V modules This package contains Hyper-V paravirtualised drivers for the kernel. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: udf-modules-3.10-3-486-di Architecture: i386 @@ -4994,8 +4099,8 @@ Depends: kernel-image-3.10-3-486-di, crc-modules-3.10-3-486-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: fuse-modules-3.10-3-486-di Architecture: i386 @@ -5005,8 +4110,8 @@ Depends: kernel-image-3.10-3-486-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-486 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-486 Package: kernel-image-3.10-3-686-pae-di Architecture: i386 @@ -5017,8 +4122,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nic-modules-3.10-3-686-pae-di Architecture: i386 @@ -5029,8 +4134,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nic-wireless-modules-3.10-3-686-pae-di Architecture: i386 @@ -5041,8 +4146,8 @@ Description: Wireless NIC drivers This package contains wireless NIC drivers for the kernel. Includes crypto modules only needed for wireless (WEP, WPA). -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nic-shared-modules-3.10-3-686-pae-di Architecture: i386 @@ -5053,8 +4158,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: serial-modules-3.10-3-686-pae-di Architecture: i386 @@ -5064,8 +4169,8 @@ Depends: kernel-image-3.10-3-686-pae-di, pcmcia-modules-3.10-3-686-pae-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: usb-serial-modules-3.10-3-686-pae-di Architecture: i386 @@ -5075,8 +4180,8 @@ Depends: kernel-image-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ppp-modules-3.10-3-686-pae-di Architecture: i386 @@ -5086,8 +4191,8 @@ Depends: kernel-image-3.10-3-686-pae-di, serial-modules-3.10-3-686-pae-di, zlib-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: pata-modules-3.10-3-686-pae-di Architecture: i386 @@ -5097,8 +4202,8 @@ Depends: kernel-image-3.10-3-686-pae-di, ata-modules-3.10-3-686-pae-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: cdrom-core-modules-3.10-3-686-pae-di Architecture: i386 @@ -5108,8 +4213,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, isofs-modules-3.10-3-686-pae-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: firewire-core-modules-3.10-3-686-pae-di Architecture: i386 @@ -5119,8 +4224,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: scsi-core-modules-3.10-3-686-pae-di Architecture: i386 @@ -5130,8 +4235,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: scsi-modules-3.10-3-686-pae-di Architecture: i386 @@ -5141,8 +4246,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, cdrom-core-modules-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di, ata-modules-3.10-3-686-pae-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: scsi-common-modules-3.10-3-686-pae-di Architecture: i386 @@ -5152,8 +4257,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, cdrom-core-modules-3.10-3-686-pae-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: scsi-extra-modules-3.10-3-686-pae-di Architecture: i386 @@ -5164,8 +4269,8 @@ Description: Uncommon SCSI drivers This package contains uncommon SCSI drivers for the kernel. This includes SCSI RAID drivers, and some of the less common SCSI controllers. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: loop-modules-3.10-3-686-pae-di Architecture: i386 @@ -5175,8 +4280,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: btrfs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5186,8 +4291,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di, zlib-modules-3.10-3-686-pae-di, md-modules-3.10-3-686-pae-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ext2-modules-3.10-3-686-pae-di Architecture: i386 @@ -5197,8 +4302,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ext3-modules-3.10-3-686-pae-di Architecture: i386 @@ -5208,8 +4313,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ext4-modules-3.10-3-686-pae-di Architecture: i386 @@ -5219,8 +4324,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: isofs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5230,8 +4335,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: jfs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5241,8 +4346,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ntfs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5252,8 +4357,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: NTFS filesystem support This package contains the NTFS file system module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: xfs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5263,8 +4368,8 @@ Depends: kernel-image-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: fat-modules-3.10-3-686-pae-di Architecture: i386 @@ -5274,8 +4379,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: md-modules-3.10-3-686-pae-di Architecture: i386 @@ -5285,8 +4390,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: multipath-modules-3.10-3-686-pae-di Architecture: i386 @@ -5296,8 +4401,8 @@ Depends: kernel-image-3.10-3-686-pae-di, md-modules-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: usb-modules-3.10-3-686-pae-di Architecture: i386 @@ -5307,8 +4412,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: usb-storage-modules-3.10-3-686-pae-di Architecture: i386 @@ -5318,8 +4423,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: pcmcia-storage-modules-3.10-3-686-pae-di Architecture: i386 @@ -5329,8 +4434,8 @@ Depends: kernel-image-3.10-3-686-pae-di, cdrom-core-modules-3.10-3-686-pae-di, pcmcia-modules-3.10-3-686-pae-di, ata-modules-3.10-3-686-pae-di Description: PCMCIA storage drivers This package contains PCMCIA storage drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: fb-modules-3.10-3-686-pae-di Architecture: i386 @@ -5340,8 +4445,8 @@ Depends: kernel-image-3.10-3-686-pae-di, i2c-modules-3.10-3-686-pae-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: input-modules-3.10-3-686-pae-di Architecture: i386 @@ -5351,8 +4456,8 @@ Depends: kernel-image-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: event-modules-3.10-3-686-pae-di Architecture: i386 @@ -5362,8 +4467,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: mouse-modules-3.10-3-686-pae-di Architecture: i386 @@ -5373,8 +4478,8 @@ Depends: kernel-image-3.10-3-686-pae-di, event-modules-3.10-3-686-pae-di, input-modules-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nic-pcmcia-modules-3.10-3-686-pae-di Architecture: i386 @@ -5384,8 +4489,8 @@ Depends: kernel-image-3.10-3-686-pae-di, nic-shared-modules-3.10-3-686-pae-di, nic-wireless-modules-3.10-3-686-pae-di, pcmcia-modules-3.10-3-686-pae-di, mmc-core-modules-3.10-3-686-pae-di Description: Common PCMCIA NIC drivers This package contains common PCMCIA NIC drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: pcmcia-modules-3.10-3-686-pae-di Architecture: i386 @@ -5395,8 +4500,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nic-usb-modules-3.10-3-686-pae-di Architecture: i386 @@ -5406,8 +4511,8 @@ Depends: kernel-image-3.10-3-686-pae-di, nic-shared-modules-3.10-3-686-pae-di, nic-wireless-modules-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: sata-modules-3.10-3-686-pae-di Architecture: i386 @@ -5417,8 +4522,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di, ata-modules-3.10-3-686-pae-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: core-modules-3.10-3-686-pae-di Architecture: i386 @@ -5429,8 +4534,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: acpi-modules-3.10-3-686-pae-di Architecture: i386 @@ -5440,8 +4545,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: ACPI support modules This package contains kernel modules for ACPI. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: i2c-modules-3.10-3-686-pae-di Architecture: i386 @@ -5451,8 +4556,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: i2c support modules This package contains basic i2c support modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: crc-modules-3.10-3-686-pae-di Architecture: i386 @@ -5462,8 +4567,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: crypto-modules-3.10-3-686-pae-di Architecture: i386 @@ -5473,8 +4578,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: crypto-dm-modules-3.10-3-686-pae-di Architecture: i386 @@ -5484,8 +4589,8 @@ Depends: kernel-image-3.10-3-686-pae-di, md-modules-3.10-3-686-pae-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: efi-modules-3.10-3-686-pae-di Architecture: i386 @@ -5495,8 +4600,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: EFI modules This package contains EFI modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: ata-modules-3.10-3-686-pae-di Architecture: i386 @@ -5507,8 +4612,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: mmc-core-modules-3.10-3-686-pae-di Architecture: i386 @@ -5518,8 +4623,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di Description: MMC/SD/SDIO core modules This package contains core modules for MMC/SD/SDIO support. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: mmc-modules-3.10-3-686-pae-di Architecture: i386 @@ -5530,8 +4635,8 @@ Description: MMC/SD card modules This package contains modules needed to support MMC (multimedia) and SD cards. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: nbd-modules-3.10-3-686-pae-di Architecture: i386 @@ -5542,8 +4647,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: squashfs-modules-3.10-3-686-pae-di Architecture: i386 @@ -5553,8 +4658,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: speakup-modules-3.10-3-686-pae-di Architecture: i386 @@ -5564,8 +4669,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: speakup modules This package contains speakup modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: virtio-modules-3.10-3-686-pae-di Architecture: i386 @@ -5575,8 +4680,8 @@ Depends: kernel-image-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: uinput-modules-3.10-3-686-pae-di Architecture: i386 @@ -5586,8 +4691,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: sound-modules-3.10-3-686-pae-di Architecture: i386 @@ -5597,8 +4702,8 @@ Depends: kernel-image-3.10-3-686-pae-di, core-modules-3.10-3-686-pae-di, i2c-modules-3.10-3-686-pae-di, usb-modules-3.10-3-686-pae-di, pcmcia-modules-3.10-3-686-pae-di, firewire-core-modules-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: sound support This package contains sound modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: zlib-modules-3.10-3-686-pae-di Architecture: i386 @@ -5608,8 +4713,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: hyperv-modules-3.10-3-686-pae-di Architecture: i386 @@ -5619,8 +4724,8 @@ Depends: kernel-image-3.10-3-686-pae-di, input-modules-3.10-3-686-pae-di, scsi-core-modules-3.10-3-686-pae-di Description: Hyper-V modules This package contains Hyper-V paravirtualised drivers for the kernel. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: udf-modules-3.10-3-686-pae-di Architecture: i386 @@ -5630,8 +4735,8 @@ Depends: kernel-image-3.10-3-686-pae-di, crc-modules-3.10-3-686-pae-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: fuse-modules-3.10-3-686-pae-di Architecture: i386 @@ -5641,8 +4746,8 @@ Depends: kernel-image-3.10-3-686-pae-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-686-pae -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-686-pae Package: linux-image-3.10-3-486 Architecture: i386 @@ -5775,8 +4880,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: nic-modules-3.10-3-itanium-di Architecture: ia64 @@ -5787,8 +4892,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: nic-shared-modules-3.10-3-itanium-di Architecture: ia64 @@ -5799,8 +4904,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: serial-modules-3.10-3-itanium-di Architecture: ia64 @@ -5810,8 +4915,8 @@ Depends: kernel-image-3.10-3-itanium-di, pcmcia-modules-3.10-3-itanium-di, sn-modules-3.10-3-itanium-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ppp-modules-3.10-3-itanium-di Architecture: ia64 @@ -5821,8 +4926,8 @@ Depends: kernel-image-3.10-3-itanium-di, serial-modules-3.10-3-itanium-di, zlib-modules-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: pata-modules-3.10-3-itanium-di Architecture: ia64 @@ -5832,8 +4937,8 @@ Depends: kernel-image-3.10-3-itanium-di, ata-modules-3.10-3-itanium-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: cdrom-core-modules-3.10-3-itanium-di Architecture: ia64 @@ -5843,8 +4948,8 @@ Depends: kernel-image-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di, ide-modules-3.10-3-itanium-di, isofs-modules-3.10-3-itanium-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: firewire-core-modules-3.10-3-itanium-di Architecture: ia64 @@ -5854,8 +4959,8 @@ Depends: kernel-image-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: scsi-core-modules-3.10-3-itanium-di Architecture: ia64 @@ -5865,8 +4970,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: scsi-modules-3.10-3-itanium-di Architecture: ia64 @@ -5876,8 +4981,8 @@ Depends: kernel-image-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di, cdrom-core-modules-3.10-3-itanium-di, core-modules-3.10-3-itanium-di, ata-modules-3.10-3-itanium-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: loop-modules-3.10-3-itanium-di Architecture: ia64 @@ -5887,8 +4992,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: btrfs-modules-3.10-3-itanium-di Architecture: ia64 @@ -5898,8 +5003,8 @@ Depends: kernel-image-3.10-3-itanium-di, core-modules-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di, zlib-modules-3.10-3-itanium-di, md-modules-3.10-3-itanium-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ext2-modules-3.10-3-itanium-di Architecture: ia64 @@ -5909,8 +5014,8 @@ Depends: kernel-image-3.10-3-itanium-di, core-modules-3.10-3-itanium-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ext3-modules-3.10-3-itanium-di Architecture: ia64 @@ -5920,8 +5025,8 @@ Depends: kernel-image-3.10-3-itanium-di, core-modules-3.10-3-itanium-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ext4-modules-3.10-3-itanium-di Architecture: ia64 @@ -5931,8 +5036,8 @@ Depends: kernel-image-3.10-3-itanium-di, core-modules-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: isofs-modules-3.10-3-itanium-di Architecture: ia64 @@ -5942,8 +5047,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: jfs-modules-3.10-3-itanium-di Architecture: ia64 @@ -5953,8 +5058,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ntfs-modules-3.10-3-itanium-di Architecture: ia64 @@ -5964,8 +5069,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: NTFS filesystem support This package contains the NTFS file system module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: xfs-modules-3.10-3-itanium-di Architecture: ia64 @@ -5975,8 +5080,8 @@ Depends: kernel-image-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: fat-modules-3.10-3-itanium-di Architecture: ia64 @@ -5986,8 +5091,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: md-modules-3.10-3-itanium-di Architecture: ia64 @@ -5997,8 +5102,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: multipath-modules-3.10-3-itanium-di Architecture: ia64 @@ -6008,8 +5113,8 @@ Depends: kernel-image-3.10-3-itanium-di, md-modules-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: usb-modules-3.10-3-itanium-di Architecture: ia64 @@ -6019,8 +5124,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: usb-storage-modules-3.10-3-itanium-di Architecture: ia64 @@ -6030,8 +5135,8 @@ Depends: kernel-image-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di, usb-modules-3.10-3-itanium-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: fb-modules-3.10-3-itanium-di Architecture: ia64 @@ -6041,8 +5146,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: input-modules-3.10-3-itanium-di Architecture: ia64 @@ -6052,8 +5157,8 @@ Depends: kernel-image-3.10-3-itanium-di, usb-modules-3.10-3-itanium-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: event-modules-3.10-3-itanium-di Architecture: ia64 @@ -6063,8 +5168,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: mouse-modules-3.10-3-itanium-di Architecture: ia64 @@ -6074,8 +5179,8 @@ Depends: kernel-image-3.10-3-itanium-di, event-modules-3.10-3-itanium-di, input-modules-3.10-3-itanium-di, usb-modules-3.10-3-itanium-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: pcmcia-modules-3.10-3-itanium-di Architecture: ia64 @@ -6085,8 +5190,8 @@ Depends: kernel-image-3.10-3-itanium-di, core-modules-3.10-3-itanium-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: nic-usb-modules-3.10-3-itanium-di Architecture: ia64 @@ -6096,8 +5201,8 @@ Depends: kernel-image-3.10-3-itanium-di, nic-shared-modules-3.10-3-itanium-di, usb-modules-3.10-3-itanium-di, core-modules-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: sata-modules-3.10-3-itanium-di Architecture: ia64 @@ -6107,8 +5212,8 @@ Depends: kernel-image-3.10-3-itanium-di, scsi-core-modules-3.10-3-itanium-di, ata-modules-3.10-3-itanium-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: core-modules-3.10-3-itanium-di Architecture: ia64 @@ -6119,8 +5224,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: crc-modules-3.10-3-itanium-di Architecture: ia64 @@ -6130,8 +5235,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: crypto-modules-3.10-3-itanium-di Architecture: ia64 @@ -6141,8 +5246,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: crypto-dm-modules-3.10-3-itanium-di Architecture: ia64 @@ -6152,8 +5257,8 @@ Depends: kernel-image-3.10-3-itanium-di, md-modules-3.10-3-itanium-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ata-modules-3.10-3-itanium-di Architecture: ia64 @@ -6164,8 +5269,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: nbd-modules-3.10-3-itanium-di Architecture: ia64 @@ -6176,8 +5281,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: squashfs-modules-3.10-3-itanium-di Architecture: ia64 @@ -6187,8 +5292,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: uinput-modules-3.10-3-itanium-di Architecture: ia64 @@ -6198,8 +5303,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: zlib-modules-3.10-3-itanium-di Architecture: ia64 @@ -6209,8 +5314,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: udf-modules-3.10-3-itanium-di Architecture: ia64 @@ -6220,8 +5325,8 @@ Depends: kernel-image-3.10-3-itanium-di, crc-modules-3.10-3-itanium-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: fuse-modules-3.10-3-itanium-di Architecture: ia64 @@ -6231,8 +5336,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ide-core-modules-3.10-3-itanium-di Architecture: ia64 @@ -6242,8 +5347,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: IDE support This package contains core IDE support for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: ide-modules-3.10-3-itanium-di Architecture: ia64 @@ -6253,8 +5358,8 @@ Depends: kernel-image-3.10-3-itanium-di, ide-core-modules-3.10-3-itanium-di, sn-modules-3.10-3-itanium-di Description: IDE drivers This package contains IDE drivers for the kernel. -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: sn-modules-3.10-3-itanium-di Architecture: ia64 @@ -6264,8 +5369,8 @@ Depends: kernel-image-3.10-3-itanium-di Description: SN modules This package contains SN modules for Altix systems -Kernel-Version: 3.10-3-itanium -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-itanium Package: linux-image-3.10-3-itanium Architecture: ia64 @@ -6330,8 +5435,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: nic-shared-modules-3.10-3-m68k-di Architecture: m68k @@ -6342,8 +5447,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: ppp-modules-3.10-3-m68k-di Architecture: m68k @@ -6353,8 +5458,8 @@ Depends: kernel-image-3.10-3-m68k-di, zlib-modules-3.10-3-m68k-di, crc-modules-3.10-3-m68k-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: cdrom-core-modules-3.10-3-m68k-di Architecture: m68k @@ -6364,8 +5469,8 @@ Depends: kernel-image-3.10-3-m68k-di, isofs-modules-3.10-3-m68k-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: scsi-modules-3.10-3-m68k-di Architecture: m68k @@ -6375,8 +5480,8 @@ Depends: kernel-image-3.10-3-m68k-di, cdrom-core-modules-3.10-3-m68k-di, core-modules-3.10-3-m68k-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: btrfs-modules-3.10-3-m68k-di Architecture: m68k @@ -6386,8 +5491,8 @@ Depends: kernel-image-3.10-3-m68k-di, core-modules-3.10-3-m68k-di, crc-modules-3.10-3-m68k-di, zlib-modules-3.10-3-m68k-di, md-modules-3.10-3-m68k-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: ext2-modules-3.10-3-m68k-di Architecture: m68k @@ -6397,8 +5502,8 @@ Depends: kernel-image-3.10-3-m68k-di, core-modules-3.10-3-m68k-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: ext3-modules-3.10-3-m68k-di Architecture: m68k @@ -6408,8 +5513,8 @@ Depends: kernel-image-3.10-3-m68k-di, core-modules-3.10-3-m68k-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: ext4-modules-3.10-3-m68k-di Architecture: m68k @@ -6419,8 +5524,8 @@ Depends: kernel-image-3.10-3-m68k-di, core-modules-3.10-3-m68k-di, crc-modules-3.10-3-m68k-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: isofs-modules-3.10-3-m68k-di Architecture: m68k @@ -6430,8 +5535,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: fat-modules-3.10-3-m68k-di Architecture: m68k @@ -6441,8 +5546,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: md-modules-3.10-3-m68k-di Architecture: m68k @@ -6452,8 +5557,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: core-modules-3.10-3-m68k-di Architecture: m68k @@ -6464,8 +5569,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: crc-modules-3.10-3-m68k-di Architecture: m68k @@ -6475,8 +5580,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: crypto-modules-3.10-3-m68k-di Architecture: m68k @@ -6486,8 +5591,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: nbd-modules-3.10-3-m68k-di Architecture: m68k @@ -6498,8 +5603,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: squashfs-modules-3.10-3-m68k-di Architecture: m68k @@ -6509,8 +5614,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: zlib-modules-3.10-3-m68k-di Architecture: m68k @@ -6520,8 +5625,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: udf-modules-3.10-3-m68k-di Architecture: m68k @@ -6531,8 +5636,8 @@ Depends: kernel-image-3.10-3-m68k-di, crc-modules-3.10-3-m68k-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: fuse-modules-3.10-3-m68k-di Architecture: m68k @@ -6542,8 +5647,8 @@ Depends: kernel-image-3.10-3-m68k-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-m68k -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-m68k Package: linux-image-3.10-3-m68k Architecture: m68k @@ -6584,8 +5689,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: nic-shared-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6596,8 +5701,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: ppp-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6607,8 +5712,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, zlib-modules-3.10-3-sb1-bcm91250a-di, crc-modules-3.10-3-sb1-bcm91250a-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: cdrom-core-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6618,8 +5723,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di, isofs-modules-3.10-3-sb1-bcm91250a-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: scsi-core-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6629,8 +5734,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: scsi-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6640,8 +5745,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di, cdrom-core-modules-3.10-3-sb1-bcm91250a-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: scsi-common-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6651,8 +5756,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di, cdrom-core-modules-3.10-3-sb1-bcm91250a-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: loop-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6662,8 +5767,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: btrfs-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6673,8 +5778,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, crc-modules-3.10-3-sb1-bcm91250a-di, zlib-modules-3.10-3-sb1-bcm91250a-di, md-modules-3.10-3-sb1-bcm91250a-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: isofs-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6684,8 +5789,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: jfs-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6695,8 +5800,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: xfs-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6706,8 +5811,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, crc-modules-3.10-3-sb1-bcm91250a-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: fat-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6717,8 +5822,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: md-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6728,8 +5833,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: multipath-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6739,8 +5844,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, md-modules-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: usb-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6750,8 +5855,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: usb-storage-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6761,8 +5866,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di, usb-modules-3.10-3-sb1-bcm91250a-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: fb-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6772,8 +5877,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: Frame buffer support This package contains Frame buffer drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: input-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6783,8 +5888,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, usb-modules-3.10-3-sb1-bcm91250a-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: sata-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6794,8 +5899,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, scsi-core-modules-3.10-3-sb1-bcm91250a-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: crc-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6805,8 +5910,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: crypto-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6816,8 +5921,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: crypto-dm-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6827,8 +5932,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, md-modules-3.10-3-sb1-bcm91250a-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: nbd-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6839,8 +5944,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: squashfs-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6850,8 +5955,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: rtc-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6861,8 +5966,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: RTC modules This package contains RTC modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: zlib-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6872,8 +5977,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: udf-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6883,8 +5988,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di, crc-modules-3.10-3-sb1-bcm91250a-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: fuse-modules-3.10-3-sb1-bcm91250a-di Architecture: mips mipsel @@ -6894,8 +5999,8 @@ Depends: kernel-image-3.10-3-sb1-bcm91250a-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-sb1-bcm91250a -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sb1-bcm91250a Package: kernel-image-3.10-3-r4k-ip22-di Architecture: mips @@ -6906,8 +6011,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: nic-shared-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6918,8 +6023,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: loop-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6929,8 +6034,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: btrfs-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6940,8 +6045,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di, crc-modules-3.10-3-r4k-ip22-di, zlib-modules-3.10-3-r4k-ip22-di, md-modules-3.10-3-r4k-ip22-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: isofs-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6951,8 +6056,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: jfs-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6962,8 +6067,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: xfs-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6973,8 +6078,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di, crc-modules-3.10-3-r4k-ip22-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: md-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6984,8 +6089,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: multipath-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -6995,8 +6100,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di, md-modules-3.10-3-r4k-ip22-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: crc-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7006,8 +6111,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: crypto-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7017,8 +6122,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: crypto-dm-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7028,8 +6133,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di, md-modules-3.10-3-r4k-ip22-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: nbd-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7040,8 +6145,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: squashfs-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7051,8 +6156,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: zlib-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7062,8 +6167,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: udf-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7073,8 +6178,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di, crc-modules-3.10-3-r4k-ip22-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: fuse-modules-3.10-3-r4k-ip22-di Architecture: mips @@ -7084,8 +6189,8 @@ Depends: kernel-image-3.10-3-r4k-ip22-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-r4k-ip22 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r4k-ip22 Package: kernel-image-3.10-3-r5k-ip32-di Architecture: mips @@ -7096,8 +6201,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: nic-shared-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7108,8 +6213,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: loop-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7119,8 +6224,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: btrfs-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7130,8 +6235,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di, crc-modules-3.10-3-r5k-ip32-di, zlib-modules-3.10-3-r5k-ip32-di, md-modules-3.10-3-r5k-ip32-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: isofs-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7141,8 +6246,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: jfs-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7152,8 +6257,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: xfs-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7163,8 +6268,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di, crc-modules-3.10-3-r5k-ip32-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: md-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7174,8 +6279,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: multipath-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7185,8 +6290,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di, md-modules-3.10-3-r5k-ip32-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: crc-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7196,8 +6301,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: crypto-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7207,8 +6312,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: crypto-dm-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7218,8 +6323,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di, md-modules-3.10-3-r5k-ip32-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: nbd-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7230,8 +6335,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: squashfs-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7241,8 +6346,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: zlib-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7252,8 +6357,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: udf-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7263,8 +6368,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di, crc-modules-3.10-3-r5k-ip32-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: fuse-modules-3.10-3-r5k-ip32-di Architecture: mips @@ -7274,8 +6379,8 @@ Depends: kernel-image-3.10-3-r5k-ip32-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-r5k-ip32 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-ip32 Package: kernel-image-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7286,8 +6391,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: ppp-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7297,8 +6402,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, zlib-modules-3.10-3-4kc-malta-di, crc-modules-3.10-3-4kc-malta-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: cdrom-core-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7308,8 +6413,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, isofs-modules-3.10-3-4kc-malta-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: loop-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7319,8 +6424,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: btrfs-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7330,8 +6435,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, crc-modules-3.10-3-4kc-malta-di, zlib-modules-3.10-3-4kc-malta-di, md-modules-3.10-3-4kc-malta-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: isofs-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7341,8 +6446,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: jfs-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7352,8 +6457,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: xfs-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7363,8 +6468,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, crc-modules-3.10-3-4kc-malta-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: fat-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7374,8 +6479,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: md-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7385,8 +6490,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: multipath-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7396,8 +6501,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, md-modules-3.10-3-4kc-malta-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: usb-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7407,8 +6512,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: usb-storage-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7418,8 +6523,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, usb-modules-3.10-3-4kc-malta-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: input-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7429,8 +6534,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, usb-modules-3.10-3-4kc-malta-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: sata-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7440,8 +6545,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: crc-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7451,8 +6556,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: crypto-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7462,8 +6567,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: crypto-dm-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7473,8 +6578,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, md-modules-3.10-3-4kc-malta-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: nbd-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7485,8 +6590,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: squashfs-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7496,8 +6601,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: virtio-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7507,8 +6612,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: zlib-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7518,8 +6623,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: udf-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7529,8 +6634,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di, crc-modules-3.10-3-4kc-malta-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: fuse-modules-3.10-3-4kc-malta-di Architecture: mips mipsel @@ -7540,8 +6645,8 @@ Depends: kernel-image-3.10-3-4kc-malta-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-4kc-malta -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-4kc-malta Package: linux-image-3.10-3-r4k-ip22 Architecture: mips @@ -7724,8 +6829,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: nic-shared-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7736,8 +6841,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: ppp-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7747,8 +6852,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di, zlib-modules-3.10-3-r5k-cobalt-di, crc-modules-3.10-3-r5k-cobalt-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: loop-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7758,8 +6863,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: btrfs-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7769,8 +6874,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di, crc-modules-3.10-3-r5k-cobalt-di, zlib-modules-3.10-3-r5k-cobalt-di, md-modules-3.10-3-r5k-cobalt-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: jfs-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7780,8 +6885,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: xfs-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7791,8 +6896,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di, crc-modules-3.10-3-r5k-cobalt-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: fat-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7802,8 +6907,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: nfs-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7813,8 +6918,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: NFS filesystem support This package contains the NFS filesystem module for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: md-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7824,8 +6929,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: multipath-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7835,8 +6940,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di, md-modules-3.10-3-r5k-cobalt-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: crc-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7846,8 +6951,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: crypto-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7857,8 +6962,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: crypto-dm-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7868,8 +6973,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di, md-modules-3.10-3-r5k-cobalt-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: nbd-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7880,8 +6985,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: squashfs-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7891,8 +6996,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: zlib-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7902,8 +7007,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: fuse-modules-3.10-3-r5k-cobalt-di Architecture: mipsel @@ -7913,8 +7018,8 @@ Depends: kernel-image-3.10-3-r5k-cobalt-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-r5k-cobalt -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-r5k-cobalt Package: kernel-image-3.10-3-loongson-2f-di Architecture: mipsel @@ -7925,8 +7030,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: nic-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7937,8 +7042,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: nic-shared-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7949,8 +7054,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: ppp-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7960,8 +7065,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, zlib-modules-3.10-3-loongson-2f-di, crc-modules-3.10-3-loongson-2f-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: cdrom-core-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7971,8 +7076,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, isofs-modules-3.10-3-loongson-2f-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: loop-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7982,8 +7087,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: btrfs-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -7993,8 +7098,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, crc-modules-3.10-3-loongson-2f-di, zlib-modules-3.10-3-loongson-2f-di, md-modules-3.10-3-loongson-2f-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: isofs-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8004,8 +7109,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: jfs-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8015,8 +7120,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: xfs-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8026,8 +7131,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, crc-modules-3.10-3-loongson-2f-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: fat-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8037,8 +7142,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: md-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8048,8 +7153,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: multipath-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8059,8 +7164,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, md-modules-3.10-3-loongson-2f-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: usb-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8070,8 +7175,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: usb-storage-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8081,8 +7186,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, usb-modules-3.10-3-loongson-2f-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: input-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8092,8 +7197,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, usb-modules-3.10-3-loongson-2f-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: nic-usb-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8103,8 +7208,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, nic-shared-modules-3.10-3-loongson-2f-di, usb-modules-3.10-3-loongson-2f-di, crc-modules-3.10-3-loongson-2f-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: sata-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8114,8 +7219,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: crc-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8125,8 +7230,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: crypto-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8136,8 +7241,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: crypto-dm-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8147,8 +7252,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, md-modules-3.10-3-loongson-2f-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: nbd-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8159,8 +7264,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: squashfs-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8170,8 +7275,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: virtio-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8181,8 +7286,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: zlib-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8192,8 +7297,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: udf-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8203,8 +7308,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di, crc-modules-3.10-3-loongson-2f-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: fuse-modules-3.10-3-loongson-2f-di Architecture: mipsel @@ -8214,8 +7319,8 @@ Depends: kernel-image-3.10-3-loongson-2f-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-loongson-2f -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-loongson-2f Package: linux-image-3.10-3-r5k-cobalt Architecture: mipsel @@ -8281,8 +7386,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: nic-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8293,8 +7398,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: nic-shared-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8305,8 +7410,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: serial-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8316,8 +7421,8 @@ Depends: kernel-image-3.10-3-powerpc-di, pcmcia-modules-3.10-3-powerpc-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: usb-serial-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8327,8 +7432,8 @@ Depends: kernel-image-3.10-3-powerpc-di, usb-modules-3.10-3-powerpc-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: ppp-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8338,8 +7443,8 @@ Depends: kernel-image-3.10-3-powerpc-di, serial-modules-3.10-3-powerpc-di, zlib-modules-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: pata-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8349,8 +7454,8 @@ Depends: kernel-image-3.10-3-powerpc-di, ata-modules-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: cdrom-core-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8360,8 +7465,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, isofs-modules-3.10-3-powerpc-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: firewire-core-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8371,8 +7476,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: scsi-core-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8382,8 +7487,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: scsi-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8393,8 +7498,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, cdrom-core-modules-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di, ata-modules-3.10-3-powerpc-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: scsi-common-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8404,8 +7509,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, cdrom-core-modules-3.10-3-powerpc-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: scsi-extra-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8416,8 +7521,8 @@ Description: Uncommon SCSI drivers This package contains uncommon SCSI drivers for the kernel. This includes SCSI RAID drivers, and some of the less common SCSI controllers. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: loop-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8427,8 +7532,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: btrfs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8438,8 +7543,8 @@ Depends: kernel-image-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di, zlib-modules-3.10-3-powerpc-di, md-modules-3.10-3-powerpc-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: ext2-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8449,8 +7554,8 @@ Depends: kernel-image-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: ext3-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8460,8 +7565,8 @@ Depends: kernel-image-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: ext4-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8471,8 +7576,8 @@ Depends: kernel-image-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: isofs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8482,8 +7587,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: jfs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8493,8 +7598,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: xfs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8504,8 +7609,8 @@ Depends: kernel-image-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: fat-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8515,8 +7620,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: hfs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8526,8 +7631,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: HFS filesystem support This package contains the HFS and HFS+ filesystem modules for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: affs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8537,8 +7642,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: Amiga filesystem support This package contains the Amiga filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: md-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8548,8 +7653,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: multipath-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8559,8 +7664,8 @@ Depends: kernel-image-3.10-3-powerpc-di, md-modules-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: usb-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8570,8 +7675,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: usb-storage-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8581,8 +7686,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, usb-modules-3.10-3-powerpc-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: pcmcia-storage-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8592,8 +7697,8 @@ Depends: kernel-image-3.10-3-powerpc-di, cdrom-core-modules-3.10-3-powerpc-di, pcmcia-modules-3.10-3-powerpc-di, ata-modules-3.10-3-powerpc-di Description: PCMCIA storage drivers This package contains PCMCIA storage drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: input-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8603,8 +7708,8 @@ Depends: kernel-image-3.10-3-powerpc-di, usb-modules-3.10-3-powerpc-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: event-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8614,8 +7719,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: mouse-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8625,8 +7730,8 @@ Depends: kernel-image-3.10-3-powerpc-di, event-modules-3.10-3-powerpc-di, input-modules-3.10-3-powerpc-di, usb-modules-3.10-3-powerpc-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: nic-pcmcia-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8636,8 +7741,8 @@ Depends: kernel-image-3.10-3-powerpc-di, nic-modules-3.10-3-powerpc-di, nic-shared-modules-3.10-3-powerpc-di, pcmcia-modules-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di Description: Common PCMCIA NIC drivers This package contains common PCMCIA NIC drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: pcmcia-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8647,8 +7752,8 @@ Depends: kernel-image-3.10-3-powerpc-di, core-modules-3.10-3-powerpc-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: sata-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8658,8 +7763,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di, ata-modules-3.10-3-powerpc-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: core-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8670,8 +7775,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: crc-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8681,8 +7786,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: crypto-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8692,8 +7797,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: crypto-dm-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8703,8 +7808,8 @@ Depends: kernel-image-3.10-3-powerpc-di, md-modules-3.10-3-powerpc-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: ata-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8715,8 +7820,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: nbd-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8727,8 +7832,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: squashfs-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8738,8 +7843,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: virtio-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8749,8 +7854,8 @@ Depends: kernel-image-3.10-3-powerpc-di, scsi-core-modules-3.10-3-powerpc-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: uinput-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8760,8 +7865,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: zlib-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8771,8 +7876,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: udf-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8782,8 +7887,8 @@ Depends: kernel-image-3.10-3-powerpc-di, crc-modules-3.10-3-powerpc-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: fuse-modules-3.10-3-powerpc-di Architecture: powerpc @@ -8793,8 +7898,8 @@ Depends: kernel-image-3.10-3-powerpc-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-powerpc -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc Package: kernel-image-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8805,8 +7910,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: nic-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8817,8 +7922,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: nic-shared-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8829,8 +7934,8 @@ Description: Shared NIC drivers This package contains NIC drivers needed by combinations of nic-modules, nic-pcmcia-modules, nic-usb-modules and nic-wireless-modules. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: serial-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8840,8 +7945,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, pcmcia-modules-3.10-3-powerpc64-di Description: Serial drivers This package contains serial drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: usb-serial-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8851,8 +7956,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, usb-modules-3.10-3-powerpc64-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: ppp-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8862,8 +7967,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, serial-modules-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: pata-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8873,8 +7978,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, ata-modules-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: cdrom-core-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8884,8 +7989,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, isofs-modules-3.10-3-powerpc64-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: firewire-core-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8895,8 +8000,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: scsi-core-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8906,8 +8011,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: scsi-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8917,8 +8022,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, cdrom-core-modules-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di, ata-modules-3.10-3-powerpc64-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: scsi-common-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8928,8 +8033,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, cdrom-core-modules-3.10-3-powerpc64-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: scsi-extra-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8940,8 +8045,8 @@ Description: Uncommon SCSI drivers This package contains uncommon SCSI drivers for the kernel. This includes SCSI RAID drivers, and some of the less common SCSI controllers. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: loop-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8951,8 +8056,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: btrfs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8962,8 +8067,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di, md-modules-3.10-3-powerpc64-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: ext2-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8973,8 +8078,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: ext3-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8984,8 +8089,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: ext4-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -8995,8 +8100,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: isofs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9006,8 +8111,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: jfs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9017,8 +8122,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: xfs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9028,8 +8133,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: fat-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9039,8 +8144,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: hfs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9050,8 +8155,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: HFS filesystem support This package contains the HFS and HFS+ filesystem modules for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: affs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9061,8 +8166,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: Amiga filesystem support This package contains the Amiga filesystem module for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: md-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9072,8 +8177,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: multipath-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9083,8 +8188,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, md-modules-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: usb-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9094,8 +8199,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: usb-storage-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9105,8 +8210,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, usb-modules-3.10-3-powerpc64-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: pcmcia-storage-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9116,8 +8221,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, cdrom-core-modules-3.10-3-powerpc64-di, pcmcia-modules-3.10-3-powerpc64-di, ata-modules-3.10-3-powerpc64-di Description: PCMCIA storage drivers This package contains PCMCIA storage drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: input-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9127,8 +8232,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, usb-modules-3.10-3-powerpc64-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: event-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9138,8 +8243,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: Event support This package contains event drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: mouse-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9149,8 +8254,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, event-modules-3.10-3-powerpc64-di, input-modules-3.10-3-powerpc64-di, usb-modules-3.10-3-powerpc64-di Description: Mouse support This package contains mouse drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: nic-pcmcia-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9160,8 +8265,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, nic-modules-3.10-3-powerpc64-di, nic-shared-modules-3.10-3-powerpc64-di, pcmcia-modules-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di Description: Common PCMCIA NIC drivers This package contains common PCMCIA NIC drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: pcmcia-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9171,8 +8276,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, core-modules-3.10-3-powerpc64-di Description: Common PCMCIA drivers This package contains common PCMCIA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: sata-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9182,8 +8287,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di, ata-modules-3.10-3-powerpc64-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: core-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9194,8 +8299,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: crc-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9205,8 +8310,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: crypto-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9216,8 +8321,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: crypto-dm-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9227,8 +8332,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, md-modules-3.10-3-powerpc64-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: ata-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9239,8 +8344,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: nbd-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9251,8 +8356,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: squashfs-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9262,8 +8367,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: virtio-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9273,8 +8378,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, scsi-core-modules-3.10-3-powerpc64-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: uinput-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9284,8 +8389,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: uinput support This package contains the uinput module. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: udf-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9295,8 +8400,8 @@ Depends: kernel-image-3.10-3-powerpc64-di, crc-modules-3.10-3-powerpc64-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: fuse-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9306,8 +8411,8 @@ Depends: kernel-image-3.10-3-powerpc64-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: hypervisor-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9318,8 +8423,8 @@ Description: IBM 64bit hypervisor console modules Contains drivers for the hypervisor console, used as console for linux running in logical partitions of IBM hardware supporting it. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: fancontrol-modules-3.10-3-powerpc64-di Architecture: powerpc ppc64 @@ -9331,8 +8436,8 @@ Contains drivers for macintosh i2c bus as well as for the monitoring devices connected to it. This allows to control the fans during installation. -Kernel-Version: 3.10-3-powerpc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-powerpc64 Package: linux-image-3.10-3-powerpc Architecture: powerpc @@ -9461,8 +8566,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: nic-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9473,8 +8578,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: scsi-core-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9484,8 +8589,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: scsi-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9495,8 +8600,8 @@ Depends: kernel-image-3.10-3-s390x-di, scsi-core-modules-3.10-3-s390x-di, core-modules-3.10-3-s390x-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: ext2-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9506,8 +8611,8 @@ Depends: kernel-image-3.10-3-s390x-di, core-modules-3.10-3-s390x-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: ext3-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9517,8 +8622,8 @@ Depends: kernel-image-3.10-3-s390x-di, core-modules-3.10-3-s390x-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: ext4-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9528,8 +8633,8 @@ Depends: kernel-image-3.10-3-s390x-di, core-modules-3.10-3-s390x-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: xfs-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9539,8 +8644,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: fat-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9550,8 +8655,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: md-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9561,8 +8666,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: multipath-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9572,8 +8677,8 @@ Depends: kernel-image-3.10-3-s390x-di, md-modules-3.10-3-s390x-di, scsi-core-modules-3.10-3-s390x-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: core-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9584,8 +8689,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: crypto-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9595,8 +8700,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: crypto-dm-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9606,8 +8711,8 @@ Depends: kernel-image-3.10-3-s390x-di, md-modules-3.10-3-s390x-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: nbd-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9618,8 +8723,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: virtio-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9629,8 +8734,8 @@ Depends: kernel-image-3.10-3-s390x-di, scsi-core-modules-3.10-3-s390x-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: fuse-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9640,8 +8745,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: dasd-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9651,8 +8756,8 @@ Depends: kernel-image-3.10-3-s390x-di Description: dasd modules This package contains dasd modules. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: dasd-extra-modules-3.10-3-s390x-di Architecture: s390 s390x @@ -9664,8 +8769,8 @@ This package contains the module for dasd DIAG support. The udeb is not loaded by default as the installer does not actually support this. It can however be useful to have available in rescue situations. -Kernel-Version: 3.10-3-s390x -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-s390x Package: linux-image-3.10-3-s390x Architecture: s390 s390x @@ -9724,8 +8829,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: nic-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9736,8 +8841,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: usb-serial-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9747,8 +8852,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: ppp-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9758,8 +8863,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, zlib-modules-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: pata-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9769,8 +8874,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: cdrom-core-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9780,8 +8885,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di, isofs-modules-3.10-3-sh7751r-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: firewire-core-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9791,8 +8896,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: scsi-core-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9802,8 +8907,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: loop-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9813,8 +8918,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: btrfs-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9824,8 +8929,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di, zlib-modules-3.10-3-sh7751r-di, md-modules-3.10-3-sh7751r-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: ext2-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9835,8 +8940,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: ext4-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9846,8 +8951,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: isofs-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9857,8 +8962,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: jfs-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9868,8 +8973,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: xfs-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9879,8 +8984,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: fat-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9890,8 +8995,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: minix-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9901,8 +9006,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: Minix filesystem support This package contains the Minix filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: md-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9912,8 +9017,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: multipath-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9923,8 +9028,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, md-modules-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: usb-storage-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9934,8 +9039,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: nic-usb-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9945,8 +9050,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: sata-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9956,8 +9061,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: i2c-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9967,8 +9072,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: i2c support modules This package contains basic i2c support modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: crc-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9978,8 +9083,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: crypto-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -9989,8 +9094,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: crypto-dm-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10000,8 +9105,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, md-modules-3.10-3-sh7751r-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: nbd-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10012,8 +9117,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: squashfs-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10023,8 +9128,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: speakup-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10034,8 +9139,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: speakup modules This package contains speakup modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: virtio-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10045,8 +9150,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, scsi-core-modules-3.10-3-sh7751r-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: sound-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10056,8 +9161,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, i2c-modules-3.10-3-sh7751r-di, firewire-core-modules-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: sound support This package contains sound modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: zlib-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10067,8 +9172,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: udf-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10078,8 +9183,8 @@ Depends: kernel-image-3.10-3-sh7751r-di, crc-modules-3.10-3-sh7751r-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: fuse-modules-3.10-3-sh7751r-di Architecture: sh4 @@ -10089,8 +9194,8 @@ Depends: kernel-image-3.10-3-sh7751r-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-sh7751r -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7751r Package: kernel-image-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10101,8 +9206,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: nic-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10113,8 +9218,8 @@ Description: NIC drivers This package contains Ethernet and some paravirtualised network drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: usb-serial-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10124,8 +9229,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: USB serial drivers This package contains USB serial drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: ppp-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10135,8 +9240,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, zlib-modules-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: pata-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10146,8 +9251,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: cdrom-core-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10157,8 +9262,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, scsi-core-modules-3.10-3-sh7785lcr-di, isofs-modules-3.10-3-sh7785lcr-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: firewire-core-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10168,8 +9273,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, scsi-core-modules-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: Core FireWire drivers This package contains core FireWire drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: scsi-core-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10179,8 +9284,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: loop-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10190,8 +9295,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: Loopback filesystem support This package contains loopback filesystem support for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: btrfs-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10201,8 +9306,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di, zlib-modules-3.10-3-sh7785lcr-di, md-modules-3.10-3-sh7785lcr-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: ext2-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10212,8 +9317,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: ext4-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10223,8 +9328,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: isofs-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10234,8 +9339,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: jfs-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10245,8 +9350,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: xfs-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10256,8 +9361,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: fat-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10267,8 +9372,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: minix-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10278,8 +9383,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: Minix filesystem support This package contains the Minix filesystem module for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: md-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10289,8 +9394,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: multipath-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10300,8 +9405,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, md-modules-3.10-3-sh7785lcr-di, scsi-core-modules-3.10-3-sh7785lcr-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: nic-usb-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10311,8 +9416,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: USB NIC drivers This package contains USB network adapter drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: sata-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10322,8 +9427,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, scsi-core-modules-3.10-3-sh7785lcr-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: crc-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10333,8 +9438,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: crypto-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10344,8 +9449,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: crypto-dm-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10355,8 +9460,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, md-modules-3.10-3-sh7785lcr-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: nbd-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10367,8 +9472,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: squashfs-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10378,8 +9483,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: speakup-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10389,8 +9494,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: speakup modules This package contains speakup modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: sound-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10400,8 +9505,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, firewire-core-modules-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: sound support This package contains sound modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: zlib-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10411,8 +9516,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: udf-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10422,8 +9527,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di, crc-modules-3.10-3-sh7785lcr-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: fuse-modules-3.10-3-sh7785lcr-di Architecture: sh4 @@ -10433,8 +9538,8 @@ Depends: kernel-image-3.10-3-sh7785lcr-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-sh7785lcr -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sh7785lcr Package: linux-image-3.10-3-sh7751r Architecture: sh4 @@ -10501,8 +9606,8 @@ This package contains the kernel image for the Debian installer boot images. It does _not_ provide a usable kernel for your full Debian system. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: nic-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10517,8 +9622,8 @@ . Do not install this package on a real Debian system! You probably want a kernel-image package instead. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: ppp-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10528,8 +9633,8 @@ Depends: kernel-image-3.10-3-sparc64-di, zlib-modules-3.10-3-sparc64-di, crc-modules-3.10-3-sparc64-di Description: PPP drivers This package contains PPP drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: pata-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10539,8 +9644,8 @@ Depends: kernel-image-3.10-3-sparc64-di, ata-modules-3.10-3-sparc64-di Description: PATA drivers This package contains PATA drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: cdrom-core-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10550,8 +9655,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di, isofs-modules-3.10-3-sparc64-di Description: CDROM support This package contains core CDROM support for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: scsi-core-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10561,8 +9666,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: Core SCSI subsystem This package contains the core SCSI subsystem for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: scsi-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10572,8 +9677,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di, cdrom-core-modules-3.10-3-sparc64-di, core-modules-3.10-3-sparc64-di, ata-modules-3.10-3-sparc64-di Description: SCSI drivers This package contains SCSI drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: scsi-common-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10583,8 +9688,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di, cdrom-core-modules-3.10-3-sparc64-di Description: Very common SCSI drivers This package contains very common SCSI drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: btrfs-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10594,8 +9699,8 @@ Depends: kernel-image-3.10-3-sparc64-di, core-modules-3.10-3-sparc64-di, crc-modules-3.10-3-sparc64-di, zlib-modules-3.10-3-sparc64-di, md-modules-3.10-3-sparc64-di Description: BTRFS filesystem support This package contains the BTRFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: ext2-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10605,8 +9710,8 @@ Depends: kernel-image-3.10-3-sparc64-di, core-modules-3.10-3-sparc64-di Description: EXT2 filesystem support This package contains the EXT2 filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: ext3-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10616,8 +9721,8 @@ Depends: kernel-image-3.10-3-sparc64-di, core-modules-3.10-3-sparc64-di Description: EXT3 filesystem support This package contains the EXT3 filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: ext4-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10627,8 +9732,8 @@ Depends: kernel-image-3.10-3-sparc64-di, core-modules-3.10-3-sparc64-di, crc-modules-3.10-3-sparc64-di Description: EXT4 filesystem support This package contains the EXT4 filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: isofs-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10638,8 +9743,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: ISOFS filesystem support This package contains the ISOFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: jfs-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10649,8 +9754,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: JFS filesystem support This package contains the JFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: xfs-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10660,8 +9765,8 @@ Depends: kernel-image-3.10-3-sparc64-di, crc-modules-3.10-3-sparc64-di Description: XFS filesystem support This package contains the XFS filesystem module for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: fat-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10671,8 +9776,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: FAT filesystem support This package contains the FAT and VFAT filesystem modules for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: md-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10682,8 +9787,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: RAID and LVM support This package contains RAID and LVM modules for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: multipath-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10693,8 +9798,8 @@ Depends: kernel-image-3.10-3-sparc64-di, md-modules-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di Description: Multipath support This package contains DM-Multipath modules for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: usb-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10704,8 +9809,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: USB support This package contains core USB drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: usb-storage-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10715,8 +9820,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di, usb-modules-3.10-3-sparc64-di Description: USB storage support This package contains the USB storage driver for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: input-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10726,8 +9831,8 @@ Depends: kernel-image-3.10-3-sparc64-di, usb-modules-3.10-3-sparc64-di Description: Input devices support This package contains input device drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: sata-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10737,8 +9842,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di, ata-modules-3.10-3-sparc64-di Description: SATA drivers This package contains SATA drivers for the kernel. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: core-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10749,8 +9854,8 @@ Description: Core modules This package contains core modules for the kernel, that will almost always be needed. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: crc-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10760,8 +9865,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: CRC modules This package contains CRC support modules. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: crypto-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10771,8 +9876,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: crypto modules This package contains crypto modules. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: crypto-dm-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10782,8 +9887,8 @@ Depends: kernel-image-3.10-3-sparc64-di, md-modules-3.10-3-sparc64-di Description: devicemapper crypto module This package contains the devicemapper crypto (dm-crypt) module. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: ata-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10794,8 +9899,8 @@ Description: ATA disk modules This package contains core ATA disk modules used by both PATA and SATA disk drivers. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: nbd-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10806,8 +9911,8 @@ Description: Network Block Device modules This package contains the modules required for support of the Network Block Device -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: squashfs-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10817,8 +9922,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: squashfs modules This package contains squashfs modules. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: virtio-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10828,8 +9933,8 @@ Depends: kernel-image-3.10-3-sparc64-di, scsi-core-modules-3.10-3-sparc64-di Description: virtio modules This package contains virtio modules. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: zlib-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10839,8 +9944,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: zlib modules This package contains zlib modules. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: udf-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10850,8 +9955,8 @@ Depends: kernel-image-3.10-3-sparc64-di, crc-modules-3.10-3-sparc64-di Description: UDF modules This package contains the UDF filesystem module. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: fuse-modules-3.10-3-sparc64-di Architecture: sparc sparc64 @@ -10861,8 +9966,8 @@ Depends: kernel-image-3.10-3-sparc64-di Description: FUSE modules This package contains the Filesystem in Userspace (FUSE) module. -Kernel-Version: 3.10-3-sparc64 -Package-Type: udeb +XC-Package-Type: udeb +XB-Kernel-Version: 3.10-3-sparc64 Package: linux-image-3.10-3-sparc64 Architecture: sparc sparc64 diff -Nru linux-3.10.11/debian/control.md5sum linux-3.10-3.10.11/debian/control.md5sum --- linux-3.10.11/debian/control.md5sum 2013-09-10 13:13:31.000000000 +0000 +++ linux-3.10-3.10.11/debian/control.md5sum 2014-04-28 01:24:31.000000000 +0000 @@ -1,5 +1,5 @@ 3e9ea9910531a747f9534a1f59846407 debian/bin/gencontrol.py -aa8fb65df0b8ea8e0c0f8e689d62203c debian/changelog +75de15a3b941e6e7b0d198cfb3c4f325 debian/changelog d253b8a3cc1ffc2054b1d485facc490a debian/templates/control.headers.arch.in d60e1ee86882c530ea74bfbb684a506e debian/templates/control.headers.featureset.in 3a8040742dfc77adae08116a336e98c3 debian/templates/control.headers.in @@ -15,7 +15,7 @@ 7805244237b17ec0c1e068c364136ee1 debian/config/alpha/defines 4ec8a85fa1b2821b4f3ed529ac912b29 debian/config/amd64/defines 416305ac0017e35ba0365d784c72e074 debian/config/armel/defines -e74dac997472afc09463de5eb4fcfe84 debian/config/armhf/defines +70e9761864c63f600cbc2d408960efe6 debian/config/armhf/defines 366b94d652a66b437eabcd165bcc9610 debian/config/featureset-rt/defines 7663688e373ff5b5857c15e69a7c1d3e debian/config/hppa/defines 86de41b9179ecf6fcca1ecf675cc2175 debian/config/i386/defines @@ -29,8 +29,8 @@ dc714f9f7a1624d1e1b518e60f0a529a debian/config/s390/defines dafb9c298ce03193b334ab168a0824e3 debian/config/s390x/defines 4f654b0507024e4483289a749a17d8cb debian/config/sh4/defines -1c43428cadb9eab47cee4e1efec554ff debian/config/sparc64/defines 7d9b29bf50681e32b95fc148252f0520 debian/config/sparc/defines +1c43428cadb9eab47cee4e1efec554ff debian/config/sparc64/defines f4b2921156e7b1a038862f848fdfe48f debian/config/x32/defines 040c78b69c26232e49b8fa5cbd86129e debian/config/amd64/none/defines 7dc981827930ed6844a731ed954b9b9d debian/config/amd64/rt/defines @@ -38,20 +38,20 @@ 7146ff53fc4f9fbb49948225d8589b69 debian/config/i386/rt/defines 7ecaa8334419297fe6715afadae794c6 debian/installer/amd64/kernel-versions 07c9cbe632c22b1a4d696e305a43dd79 debian/installer/armel/kernel-versions -22abf5e8f80b321f1141566a0afd5c58 debian/installer/armhf/kernel-versions +147116108018adaf3158829a801a395c debian/installer/armhf/kernel-versions fb5fd18c89403e59d2df08c6b261ba87 debian/installer/hppa/kernel-versions 967797430d58c1aeecac819cd6c23bd8 debian/installer/i386/kernel-versions 3003a272236f91494508a5f7e9c9b467 debian/installer/ia64/kernel-versions 8aba4204e5bc4edcfd9790294b8808ec debian/installer/m68k/kernel-versions -44e67e915e0d96d2c7a96db7a56ef9d5 debian/installer/mipsel/kernel-versions 0ef9abd87751a54fd67da5fa7ad15cfe debian/installer/mips/kernel-versions +44e67e915e0d96d2c7a96db7a56ef9d5 debian/installer/mipsel/kernel-versions 42aaaa53f3ecb95030e1a33654db6f8e debian/installer/powerpc/kernel-versions 0cb3424304d9602f321919da020eef8c debian/installer/ppc64/kernel-versions e5cf40c78e83c648c5f14f0531210b07 debian/installer/s390/kernel-versions f8348b90fe2b9e1e75bddda4dbb832c4 debian/installer/s390x/kernel-versions 49f36561dee0396410815d4e92beb01e debian/installer/sh4/kernel-versions -61a070b81f93d4c9e955dc90587702f3 debian/installer/sparc64/kernel-versions 98d2665cd87a45bb5d956bc5c415c928 debian/installer/sparc/kernel-versions +61a070b81f93d4c9e955dc90587702f3 debian/installer/sparc64/kernel-versions 7d5cb8a10076491fbcf136b5f548dcb4 debian/installer/amd64/package-list 42fba89c75a5028a203bb80b5d274fcd debian/installer/armel/package-list 165eedcd9ae7bd6e545589422fabc773 debian/installer/armhf/package-list @@ -59,13 +59,13 @@ 42b43a38e9deb951968a87f1fef3e60b debian/installer/i386/package-list c3a84196d56d3a4247bdc0aaac4e7908 debian/installer/ia64/package-list ef7ef282db90dad652dcdf5e96c0a107 debian/installer/m68k/package-list -53b5d0c9fad2263b374e0c26d7ba99e5 debian/installer/mipsel/package-list 848a9b53a08ff2575ecb4b41e3c1d92f debian/installer/mips/package-list +53b5d0c9fad2263b374e0c26d7ba99e5 debian/installer/mipsel/package-list 8b7d23c8cd92a63434be9319b47d23e9 debian/installer/powerpc/package-list 8b7d23c8cd92a63434be9319b47d23e9 debian/installer/ppc64/package-list 4c1bf26b971d89864682040568fa388e debian/installer/s390/package-list 4c1bf26b971d89864682040568fa388e debian/installer/s390x/package-list 71aedaa083596572b15f780a27343723 debian/installer/sh4/package-list -b9df39e550a637012ccd5b1ddaa4b74a debian/installer/sparc64/package-list b9df39e550a637012ccd5b1ddaa4b74a debian/installer/sparc/package-list +b9df39e550a637012ccd5b1ddaa4b74a debian/installer/sparc64/package-list f61a2bc61a6cba3e8a4141f374fa33ab debian/installer/package-list diff -Nru linux-3.10.11/debian/dummy.patch linux-3.10-3.10.11/debian/dummy.patch --- linux-3.10.11/debian/dummy.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/dummy.patch 2013-12-23 07:40:09.000000000 +0000 @@ -0,0 +1,5 @@ +diff -urN test1/999-dummy.txt test2/999-dummy.txt +--- test1/999-dummy.txt 1970-01-01 00:00:00.000000000 +0000 ++++ test2/999-dummy.txt 2013-07-20 14:46:08.000000000 +0000 +@@ -0,0 +1 @@ ++This is a dummy file to make sure rpi_999_other_changes.patch is not empty as empty patches confuse quilt. diff -Nru linux-3.10.11/debian/installer/armhf/kernel-versions linux-3.10-3.10.11/debian/installer/armhf/kernel-versions --- linux-3.10.11/debian/installer/armhf/kernel-versions 2013-09-07 21:48:51.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/kernel-versions 2013-12-27 14:03:32.000000000 +0000 @@ -1,4 +1,2 @@ # arch version flavour installedname suffix build-depends -armhf - armmp - y - -armhf - mx5 - y - -armhf - vexpress - y - +armhf - rpi - y - diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/btrfs-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/btrfs-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/btrfs-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/btrfs-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crc-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crc-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crc-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crc-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-dm-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-dm-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-dm-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-dm-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/crypto-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext2-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext2-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext2-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext2-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext3-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext3-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext3-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/ext3-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/fuse-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/fuse-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/fuse-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/fuse-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/input-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/input-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/input-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/input-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1,4 @@ +#include +usbhid - +usbmouse - +usbkbd - diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/isofs-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/isofs-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/isofs-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/isofs-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/jfs-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/jfs-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/jfs-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/jfs-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/kernel-image linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/kernel-image --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/kernel-image 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/kernel-image 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +# empty diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/loop-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/loop-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/loop-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/loop-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/md-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/md-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/md-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/md-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/minix-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/minix-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/minix-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/minix-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/multipath-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/multipath-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/multipath-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/multipath-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/nbd-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/nbd-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/nbd-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/nbd-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/nic-usb-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/nic-usb-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/nic-usb-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/nic-usb-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/reiserfs-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/reiserfs-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/reiserfs-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/reiserfs-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/scsi-core-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/scsi-core-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/scsi-core-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/scsi-core-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1,3 @@ +#include +scsi_mod - +sd_mod - diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/squashfs-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/squashfs-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/squashfs-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/squashfs-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/udf-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/udf-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/udf-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/udf-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/uinput-modules linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/uinput-modules --- linux-3.10.11/debian/installer/armhf/modules/armhf-rpi/uinput-modules 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/installer/armhf/modules/armhf-rpi/uinput-modules 2013-12-23 01:34:43.000000000 +0000 @@ -0,0 +1 @@ +#include diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-fix-100mbit-half-duplex-speed-translation.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-100mbit-half-duplex-speed-translation.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-fix-100mbit-half-duplex-speed-translation.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-100mbit-half-duplex-speed-translation.patch 2014-04-28 00:33:55.000000000 +0000 @@ -12,11 +12,11 @@ drivers/net/ethernet/atheros/alx/hw.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/drivers/net/ethernet/atheros/alx/hw.c b/drivers/net/ethernet/atheros/alx/hw.c -index 220a16a..dc71cfb 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.c -+++ b/drivers/net/ethernet/atheros/alx/hw.c -@@ -1134,7 +1134,7 @@ static inline u32 alx_speed_to_ethadv(int speed) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.c 2014-04-27 23:40:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:55.000000000 +0000 +@@ -1134,7 +1134,7 @@ case SPEED_100 + DUPLEX_FULL: return ADVERTISED_100baseT_Full; case SPEED_100 + DUPLEX_HALF: diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-fix-ethtool-support-code.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-ethtool-support-code.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-fix-ethtool-support-code.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-ethtool-support-code.patch 2014-04-28 00:33:58.000000000 +0000 @@ -14,10 +14,10 @@ drivers/net/ethernet/atheros/alx/ethtool.c | 64 ++++++++++++++---------------- 1 file changed, 29 insertions(+), 35 deletions(-) -diff --git a/drivers/net/ethernet/atheros/alx/ethtool.c b/drivers/net/ethernet/atheros/alx/ethtool.c -index 5e19e08..9261006 100644 ---- a/drivers/net/ethernet/atheros/alx/ethtool.c -+++ b/drivers/net/ethernet/atheros/alx/ethtool.c +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:58.000000000 +0000 @@ -46,21 +46,37 @@ #include "reg.h" #include "hw.h" @@ -62,7 +62,7 @@ ecmd->advertising = ADVERTISED_TP; if (hw->adv_cfg & ADVERTISED_Autoneg) -@@ -68,6 +84,7 @@ static int alx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) +@@ -68,6 +84,7 @@ ecmd->port = PORT_TP; ecmd->phy_address = 0; @@ -70,7 +70,7 @@ if (hw->adv_cfg & ADVERTISED_Autoneg) ecmd->autoneg = AUTONEG_ENABLE; else -@@ -100,7 +117,7 @@ static int alx_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) +@@ -100,7 +117,7 @@ ASSERT_RTNL(); if (ecmd->autoneg == AUTONEG_ENABLE) { @@ -79,7 +79,7 @@ return -EINVAL; adv_cfg = ecmd->advertising | ADVERTISED_Autoneg; } else { -@@ -121,21 +138,10 @@ static void alx_get_pauseparam(struct net_device *netdev, +@@ -121,21 +138,10 @@ struct alx_priv *alx = netdev_priv(netdev); struct alx_hw *hw = &alx->hw; @@ -105,7 +105,7 @@ } -@@ -214,8 +220,7 @@ static int alx_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) +@@ -214,8 +220,7 @@ struct alx_priv *alx = netdev_priv(netdev); struct alx_hw *hw = &alx->hw; @@ -115,7 +115,7 @@ return -EOPNOTSUPP; hw->sleep_ctrl = 0; -@@ -230,22 +235,11 @@ static int alx_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) +@@ -230,22 +235,11 @@ return 0; } diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-fix-MAC-address-alignment-problem.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-MAC-address-alignment-problem.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-fix-MAC-address-alignment-problem.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-fix-MAC-address-alignment-problem.patch 2014-04-28 00:33:58.000000000 +0000 @@ -14,11 +14,11 @@ drivers/net/ethernet/atheros/alx/hw.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -diff --git a/drivers/net/ethernet/atheros/alx/hw.c b/drivers/net/ethernet/atheros/alx/hw.c -index aed48a7..ea99e5d 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.c -+++ b/drivers/net/ethernet/atheros/alx/hw.c -@@ -282,8 +282,8 @@ static bool alx_read_macaddr(struct alx_hw *hw, u8 *addr) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:57.000000000 +0000 +@@ -282,8 +282,8 @@ mac1 = alx_read_mem32(hw, ALX_STAD1); /* addr should be big-endian */ @@ -29,7 +29,7 @@ return is_valid_ether_addr(addr); } -@@ -326,9 +326,9 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr) +@@ -326,9 +326,9 @@ u32 val; /* for example: 00-0B-6A-F6-00-DC * STAD0=6AF600DC, STAD1=000B */ diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-make-sizes-unsigned.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-make-sizes-unsigned.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-make-sizes-unsigned.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-make-sizes-unsigned.patch 2014-04-28 00:33:56.000000000 +0000 @@ -12,11 +12,11 @@ drivers/net/ethernet/atheros/alx/alx.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -diff --git a/drivers/net/ethernet/atheros/alx/alx.h b/drivers/net/ethernet/atheros/alx/alx.h -index 50b3ae2..d71103d 100644 ---- a/drivers/net/ethernet/atheros/alx/alx.h -+++ b/drivers/net/ethernet/atheros/alx/alx.h -@@ -85,16 +85,16 @@ struct alx_priv { +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/alx.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/alx.h 2014-04-27 23:40:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/alx.h 2014-04-28 00:33:55.000000000 +0000 +@@ -85,16 +85,16 @@ struct { dma_addr_t dma; void *virt; diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-remove-WoL-support.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-remove-WoL-support.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-remove-WoL-support.patch 2013-07-15 01:38:16.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-remove-WoL-support.patch 2014-04-28 00:33:59.000000000 +0000 @@ -16,11 +16,11 @@ drivers/net/ethernet/atheros/alx/main.c | 142 +++----------------------- 4 files changed, 15 insertions(+), 323 deletions(-) -diff --git a/drivers/net/ethernet/atheros/alx/ethtool.c b/drivers/net/ethernet/atheros/alx/ethtool.c -index 9261006..45b3650 100644 ---- a/drivers/net/ethernet/atheros/alx/ethtool.c -+++ b/drivers/net/ethernet/atheros/alx/ethtool.c -@@ -201,40 +201,6 @@ static void alx_set_msglevel(struct net_device *netdev, u32 data) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:59.000000000 +0000 +@@ -201,40 +201,6 @@ alx->msg_enable = data; } @@ -61,7 +61,7 @@ const struct ethtool_ops alx_ethtool_ops = { .get_settings = alx_get_settings, .set_settings = alx_set_settings, -@@ -242,7 +208,5 @@ const struct ethtool_ops alx_ethtool_ops = { +@@ -242,7 +208,5 @@ .set_pauseparam = alx_set_pauseparam, .get_msglevel = alx_get_msglevel, .set_msglevel = alx_set_msglevel, @@ -69,11 +69,11 @@ - .set_wol = alx_set_wol, .get_link = ethtool_op_get_link, }; -diff --git a/drivers/net/ethernet/atheros/alx/hw.c b/drivers/net/ethernet/atheros/alx/hw.c -index ea99e5d..1e8c24a 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.c -+++ b/drivers/net/ethernet/atheros/alx/hw.c -@@ -332,16 +332,6 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:59.000000000 +0000 +@@ -332,16 +332,6 @@ alx_write_mem32(hw, ALX_STAD1, val); } @@ -90,7 +90,7 @@ static void alx_reset_osc(struct alx_hw *hw, u8 rev) { u32 val, val2; -@@ -858,66 +848,6 @@ void alx_post_phy_link(struct alx_hw *hw) +@@ -858,66 +848,6 @@ } } @@ -157,7 +157,7 @@ bool alx_phy_configured(struct alx_hw *hw) { u32 cfg, hw_cfg; -@@ -990,26 +920,6 @@ int alx_clear_phy_intr(struct alx_hw *hw) +@@ -990,26 +920,6 @@ return alx_read_phy_reg(hw, ALX_MII_ISR, &isr); } @@ -184,7 +184,7 @@ void alx_disable_rss(struct alx_hw *hw) { u32 ctrl = alx_read_mem32(hw, ALX_RXQ0); -@@ -1121,71 +1031,6 @@ void alx_configure_basic(struct alx_hw *hw) +@@ -1121,71 +1031,6 @@ alx_write_mem32(hw, ALX_WRR, val); } @@ -256,11 +256,11 @@ bool alx_get_phy_info(struct alx_hw *hw) { u16 devs1, devs2; -diff --git a/drivers/net/ethernet/atheros/alx/hw.h b/drivers/net/ethernet/atheros/alx/hw.h -index a60e35c..96f3b43 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.h -+++ b/drivers/net/ethernet/atheros/alx/hw.h -@@ -418,8 +418,6 @@ struct alx_hw { +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.h 2014-04-28 00:33:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.h 2014-04-28 00:33:59.000000000 +0000 +@@ -418,8 +418,6 @@ u8 flowctrl; u32 adv_cfg; @@ -269,7 +269,7 @@ spinlock_t mdio_lock; struct mdio_if_info mdio; u16 phy_id[2]; -@@ -479,14 +477,12 @@ void alx_reset_pcie(struct alx_hw *hw); +@@ -479,14 +477,12 @@ void alx_enable_aspm(struct alx_hw *hw, bool l0s_en, bool l1_en); int alx_setup_speed_duplex(struct alx_hw *hw, u32 ethadv, u8 flowctrl); void alx_post_phy_link(struct alx_hw *hw); @@ -284,7 +284,7 @@ void alx_cfg_mac_flowcontrol(struct alx_hw *hw, u8 fc); void alx_start_mac(struct alx_hw *hw); int alx_reset_mac(struct alx_hw *hw); -@@ -494,7 +490,6 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr); +@@ -494,7 +490,6 @@ bool alx_phy_configured(struct alx_hw *hw); void alx_configure_basic(struct alx_hw *hw); void alx_disable_rss(struct alx_hw *hw); @@ -292,11 +292,11 @@ bool alx_get_phy_info(struct alx_hw *hw); static inline u32 alx_speed_to_ethadv(int speed, u8 duplex) -diff --git a/drivers/net/ethernet/atheros/alx/main.c b/drivers/net/ethernet/atheros/alx/main.c -index 148b4b9..0e0b242 100644 ---- a/drivers/net/ethernet/atheros/alx/main.c -+++ b/drivers/net/ethernet/atheros/alx/main.c -@@ -706,7 +706,6 @@ static int alx_init_sw(struct alx_priv *alx) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/main.c 2014-04-28 00:33:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/main.c 2014-04-28 00:33:59.000000000 +0000 +@@ -706,7 +706,6 @@ alx->rxbuf_size = ALIGN(ALX_RAW_MTU(hw->mtu), 8); alx->tx_ringsz = 256; alx->rx_ringsz = 512; @@ -304,7 +304,7 @@ hw->imt = 200; alx->int_mask = ALX_ISR_MISC; hw->dma_chnl = hw->max_dma_chnl; -@@ -961,66 +960,6 @@ static int alx_stop(struct net_device *netdev) +@@ -961,66 +960,6 @@ return 0; } @@ -371,7 +371,7 @@ static void alx_link_check(struct work_struct *work) { struct alx_priv *alx; -@@ -1399,8 +1338,6 @@ static int alx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) +@@ -1398,8 +1337,6 @@ goto out_unmap; } @@ -380,7 +380,7 @@ netdev_info(netdev, "Qualcomm Atheros AR816x/AR817x Ethernet [%pM]\n", netdev->dev_addr); -@@ -1445,22 +1382,12 @@ static void alx_remove(struct pci_dev *pdev) +@@ -1444,22 +1381,12 @@ static int alx_suspend(struct device *dev) { struct pci_dev *pdev = to_pci_dev(dev); @@ -408,7 +408,7 @@ return 0; } -@@ -1468,49 +1395,20 @@ static int alx_resume(struct device *dev) +@@ -1467,49 +1394,20 @@ { struct pci_dev *pdev = to_pci_dev(dev); struct alx_priv *alx = pci_get_drvdata(pdev); @@ -468,7 +468,7 @@ static pci_ers_result_t alx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state) { -@@ -1553,8 +1451,6 @@ static pci_ers_result_t alx_pci_error_slot_reset(struct pci_dev *pdev) +@@ -1552,8 +1450,6 @@ } pci_set_master(pdev); @@ -477,7 +477,7 @@ alx_reset_pcie(hw); if (!alx_reset_mac(hw)) -@@ -1590,13 +1486,6 @@ static const struct pci_error_handlers alx_err_handlers = { +@@ -1589,13 +1485,6 @@ .resume = alx_pci_error_resume, }; @@ -491,7 +491,7 @@ static DEFINE_PCI_DEVICE_TABLE(alx_pci_tbl) = { { PCI_VDEVICE(ATTANSIC, ALX_DEV_ID_AR8161), .driver_data = ALX_DEV_QUIRK_MSI_INTX_DISABLE_BUG }, -@@ -1614,7 +1503,6 @@ static struct pci_driver alx_driver = { +@@ -1613,7 +1502,6 @@ .id_table = alx_pci_tbl, .probe = alx_probe, .remove = alx_remove, diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-separate-link-speed-duplex-fields.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-separate-link-speed-duplex-fields.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-separate-link-speed-duplex-fields.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-separate-link-speed-duplex-fields.patch 2014-04-28 00:33:57.000000000 +0000 @@ -16,11 +16,11 @@ drivers/net/ethernet/atheros/alx/main.c | 37 ++++---- 4 files changed, 106 insertions(+), 125 deletions(-) -diff --git a/drivers/net/ethernet/atheros/alx/ethtool.c b/drivers/net/ethernet/atheros/alx/ethtool.c -index 50a91d0..5e19e08 100644 ---- a/drivers/net/ethernet/atheros/alx/ethtool.c -+++ b/drivers/net/ethernet/atheros/alx/ethtool.c -@@ -85,14 +85,8 @@ static int alx_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:56.000000000 +0000 +@@ -85,14 +85,8 @@ } } @@ -37,12 +37,14 @@ return 0; } -@@ -110,24 +104,11 @@ static int alx_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) +@@ -110,24 +104,11 @@ return -EINVAL; adv_cfg = ecmd->advertising | ADVERTISED_Autoneg; } else { - int speed = ethtool_cmd_speed(ecmd); -- ++ adv_cfg = alx_speed_to_ethadv(ethtool_cmd_speed(ecmd), ++ ecmd->duplex); + - switch (speed + ecmd->duplex) { - case SPEED_10 + DUPLEX_HALF: - adv_cfg = ADVERTISED_10baseT_Half; @@ -57,20 +59,17 @@ - adv_cfg = ADVERTISED_100baseT_Full; - break; - default: -+ adv_cfg = alx_speed_to_ethadv(ethtool_cmd_speed(ecmd), -+ ecmd->duplex); -+ + if (!adv_cfg || adv_cfg == ADVERTISED_1000baseT_Full) return -EINVAL; - } } hw->adv_cfg = adv_cfg; -diff --git a/drivers/net/ethernet/atheros/alx/hw.c b/drivers/net/ethernet/atheros/alx/hw.c -index dc71cfb..aed48a7 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.c -+++ b/drivers/net/ethernet/atheros/alx/hw.c -@@ -624,12 +624,12 @@ void alx_start_mac(struct alx_hw *hw) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.c 2014-04-28 00:33:56.000000000 +0000 +@@ -624,12 +624,12 @@ alx_write_mem32(hw, ALX_TXQ0, txq | ALX_TXQ0_EN); mac = hw->rx_ctrl; @@ -85,7 +84,7 @@ ALX_MAC_CTRL_SPEED_10_100); mac |= ALX_MAC_CTRL_TX_EN | ALX_MAC_CTRL_RX_EN; hw->rx_ctrl = mac; -@@ -790,28 +790,22 @@ void alx_post_phy_link(struct alx_hw *hw) +@@ -790,28 +790,22 @@ u16 phy_val, len, agc; u8 revid = alx_hw_revision(hw); bool adj_th = revid == ALX_REV_B0; @@ -117,7 +116,7 @@ (len > ALX_CLDCTRL6_CAB_LEN_SHORT100M || (len == 0 && agc > ALX_AGC_LONG100M_LIMT)))) { alx_write_phy_dbg(hw, ALX_MIIDBG_AZ_ANADECT, -@@ -831,10 +825,10 @@ void alx_post_phy_link(struct alx_hw *hw) +@@ -831,10 +825,10 @@ /* threshold adjust */ if (adj_th && hw->lnk_patch) { @@ -130,7 +129,7 @@ /* * Giga link threshold, raise the tolerance of * noise 50% -@@ -869,7 +863,7 @@ void alx_post_phy_link(struct alx_hw *hw) +@@ -869,7 +863,7 @@ * 1. phy link must be established before calling this function * 2. wol option (pattern,magic,link,etc.) is configed before call it. */ @@ -139,7 +138,7 @@ { u32 master, mac, phy, val; int err = 0; -@@ -897,9 +891,9 @@ int alx_pre_suspend(struct alx_hw *hw, int speed) +@@ -897,9 +891,9 @@ mac |= ALX_MAC_CTRL_RX_EN | ALX_MAC_CTRL_BRD_EN; if (hw->sleep_ctrl & ALX_SLEEP_CIFS) mac |= ALX_MAC_CTRL_TX_EN; @@ -151,7 +150,7 @@ ALX_SET_FIELD(mac, ALX_MAC_CTRL_SPEED, ALX_MAC_CTRL_SPEED_1000); phy |= ALX_PHY_CTRL_DSPRST_OUT; -@@ -938,7 +932,7 @@ bool alx_phy_configured(struct alx_hw *hw) +@@ -938,7 +932,7 @@ return cfg == hw_cfg; } @@ -160,7 +159,7 @@ { struct pci_dev *pdev = hw->pdev; u16 bmsr, giga; -@@ -953,7 +947,8 @@ int alx_get_phy_link(struct alx_hw *hw, int *speed) +@@ -953,7 +947,8 @@ return err; if (!(bmsr & BMSR_LSTATUS)) { @@ -170,7 +169,7 @@ return 0; } -@@ -967,20 +962,20 @@ int alx_get_phy_link(struct alx_hw *hw, int *speed) +@@ -967,20 +962,20 @@ switch (giga & ALX_GIGA_PSSR_SPEED) { case ALX_GIGA_PSSR_1000MBS: @@ -196,7 +195,7 @@ wrong_speed: dev_err(&pdev->dev, "invalid PHY speed/duplex: 0x%x\n", giga); -@@ -1126,81 +1121,67 @@ void alx_configure_basic(struct alx_hw *hw) +@@ -1126,81 +1121,67 @@ alx_write_mem32(hw, ALX_WRR, val); } @@ -256,18 +255,6 @@ - *speed = SPEED_100 + DUPLEX_FULL; - else - *speed = SPEED_100 + DUPLEX_HALF; -- -- if (*speed != spd) { -- err = alx_write_phy_reg(hw, ALX_MII_IER, 0); -- if (err) -- return err; -- err = alx_setup_speed_duplex(hw, -- alx_speed_to_ethadv(*speed) | -- ADVERTISED_Autoneg, -- ALX_FC_ANEG | ALX_FC_RX | -- ALX_FC_TX); -- if (err) -- return err; + if (lpa & LPA_10FULL) { + *speed = SPEED_10; + *duplex = DUPLEX_FULL; @@ -282,9 +269,17 @@ + *duplex = DUPLEX_HALF; + } -- /* wait for linkup */ -- for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { -- int speed2; +- if (*speed != spd) { +- err = alx_write_phy_reg(hw, ALX_MII_IER, 0); +- if (err) +- return err; +- err = alx_setup_speed_duplex(hw, +- alx_speed_to_ethadv(*speed) | +- ADVERTISED_Autoneg, +- ALX_FC_ANEG | ALX_FC_RX | +- ALX_FC_TX); +- if (err) +- return err; + if (*speed == hw->link_speed && *duplex == hw->duplex) + return 0; + err = alx_write_phy_reg(hw, ALX_MII_IER, 0); @@ -296,11 +291,12 @@ + if (err) + return err; +- /* wait for linkup */ +- for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { +- int speed2; +- - msleep(100); -+ /* wait for linkup */ -+ for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { -+ msleep(100); - +- - err = alx_get_phy_link(hw, &speed2); - if (err < 0) - return err; @@ -309,6 +305,10 @@ - } - if (i == ALX_MAX_SETUP_LNK_CYCLE) - return -ETIMEDOUT; ++ /* wait for linkup */ ++ for (i = 0; i < ALX_MAX_SETUP_LNK_CYCLE; i++) { ++ msleep(100); ++ + err = alx_read_phy_link(hw); + if (err < 0) + return err; @@ -320,11 +320,11 @@ return 0; } -diff --git a/drivers/net/ethernet/atheros/alx/hw.h b/drivers/net/ethernet/atheros/alx/hw.h -index 65e723d..a60e35c 100644 ---- a/drivers/net/ethernet/atheros/alx/hw.h -+++ b/drivers/net/ethernet/atheros/alx/hw.h -@@ -412,10 +412,11 @@ struct alx_hw { +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/hw.h 2014-04-27 23:40:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/hw.h 2014-04-28 00:33:56.000000000 +0000 +@@ -412,10 +412,11 @@ u32 smb_timer; /* SPEED_* + DUPLEX_*, SPEED_UNKNOWN if link is down */ int link_speed; @@ -337,7 +337,7 @@ u32 sleep_ctrl; -@@ -478,12 +479,12 @@ void alx_reset_pcie(struct alx_hw *hw); +@@ -478,12 +479,12 @@ void alx_enable_aspm(struct alx_hw *hw, bool l0s_en, bool l1_en); int alx_setup_speed_duplex(struct alx_hw *hw, u32 ethadv, u8 flowctrl); void alx_post_phy_link(struct alx_hw *hw); @@ -352,7 +352,7 @@ int alx_clear_phy_intr(struct alx_hw *hw); int alx_config_wol(struct alx_hw *hw); void alx_cfg_mac_flowcontrol(struct alx_hw *hw, u8 fc); -@@ -493,7 +494,22 @@ void alx_set_macaddr(struct alx_hw *hw, const u8 *addr); +@@ -493,7 +494,22 @@ bool alx_phy_configured(struct alx_hw *hw); void alx_configure_basic(struct alx_hw *hw); void alx_disable_rss(struct alx_hw *hw); @@ -376,11 +376,11 @@ +} + #endif -diff --git a/drivers/net/ethernet/atheros/alx/main.c b/drivers/net/ethernet/atheros/alx/main.c -index 418de8b..148b4b9 100644 ---- a/drivers/net/ethernet/atheros/alx/main.c -+++ b/drivers/net/ethernet/atheros/alx/main.c -@@ -712,6 +712,7 @@ static int alx_init_sw(struct alx_priv *alx) +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/main.c 2014-04-27 23:40:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/main.c 2014-04-28 00:33:56.000000000 +0000 +@@ -712,6 +712,7 @@ hw->dma_chnl = hw->max_dma_chnl; hw->ith_tpd = alx->tx_ringsz / 3; hw->link_speed = SPEED_UNKNOWN; @@ -388,7 +388,7 @@ hw->adv_cfg = ADVERTISED_Autoneg | ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | -@@ -758,6 +759,7 @@ static void alx_halt(struct alx_priv *alx) +@@ -758,6 +759,7 @@ alx_netif_stop(alx); hw->link_speed = SPEED_UNKNOWN; @@ -396,7 +396,7 @@ alx_reset_mac(hw); -@@ -869,18 +871,18 @@ static void __alx_stop(struct alx_priv *alx) +@@ -869,18 +871,18 @@ alx_free_rings(alx); } @@ -422,7 +422,7 @@ return "10 Mbps Half"; default: return "Unknown speed"; -@@ -891,7 +893,8 @@ static void alx_check_link(struct alx_priv *alx) +@@ -891,7 +893,8 @@ { struct alx_hw *hw = &alx->hw; unsigned long flags; @@ -432,7 +432,7 @@ int err; /* clear PHY internal interrupt status, otherwise the main -@@ -899,7 +902,9 @@ static void alx_check_link(struct alx_priv *alx) +@@ -899,7 +902,9 @@ */ alx_clear_phy_intr(hw); @@ -443,7 +443,7 @@ if (err < 0) goto reset; -@@ -908,15 +913,12 @@ static void alx_check_link(struct alx_priv *alx) +@@ -908,15 +913,12 @@ alx_write_mem32(hw, ALX_IMR, alx->int_mask); spin_unlock_irqrestore(&alx->irq_lock, flags); @@ -462,7 +462,7 @@ alx_post_phy_link(hw); alx_enable_aspm(hw, true, true); alx_start_mac(hw); -@@ -965,6 +967,7 @@ static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) +@@ -965,6 +967,7 @@ struct net_device *netdev = alx->dev; struct alx_hw *hw = &alx->hw; int err, speed; @@ -470,7 +470,7 @@ netif_device_detach(netdev); -@@ -977,13 +980,13 @@ static int __alx_shutdown(struct pci_dev *pdev, bool *wol_en) +@@ -977,13 +980,13 @@ return err; #endif diff -Nru linux-3.10.11/debian/patches/bugfix/all/alx-treat-flow-control-correctly-in-alx_set_pausepar.patch linux-3.10-3.10.11/debian/patches/bugfix/all/alx-treat-flow-control-correctly-in-alx_set_pausepar.patch --- linux-3.10.11/debian/patches/bugfix/all/alx-treat-flow-control-correctly-in-alx_set_pausepar.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/alx-treat-flow-control-correctly-in-alx_set_pausepar.patch 2014-04-28 00:33:55.000000000 +0000 @@ -17,11 +17,11 @@ drivers/net/ethernet/atheros/alx/ethtool.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -diff --git a/drivers/net/ethernet/atheros/alx/ethtool.c b/drivers/net/ethernet/atheros/alx/ethtool.c -index 6fa2aec..50a91d0 100644 ---- a/drivers/net/ethernet/atheros/alx/ethtool.c -+++ b/drivers/net/ethernet/atheros/alx/ethtool.c -@@ -187,7 +187,8 @@ static int alx_set_pauseparam(struct net_device *netdev, +Index: linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-27 23:40:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/atheros/alx/ethtool.c 2014-04-28 00:33:54.000000000 +0000 +@@ -187,7 +187,8 @@ if (reconfig_phy) { err = alx_setup_speed_duplex(hw, hw->adv_cfg, fc); diff -Nru linux-3.10.11/debian/patches/bugfix/all/ath6kl-do-not-use-virt_addr_valid.patch linux-3.10-3.10.11/debian/patches/bugfix/all/ath6kl-do-not-use-virt_addr_valid.patch --- linux-3.10.11/debian/patches/bugfix/all/ath6kl-do-not-use-virt_addr_valid.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/ath6kl-do-not-use-virt_addr_valid.patch 2014-04-28 00:33:37.000000000 +0000 @@ -16,9 +16,11 @@ a heap-allocated buffer and it's the one case where the performance benefit of DMA matters. ---- a/drivers/net/wireless/ath/ath6kl/sdio.c -+++ b/drivers/net/wireless/ath/ath6kl/sdio.c -@@ -79,17 +79,6 @@ static inline struct ath6kl_sdio *ath6kl +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath6kl/sdio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath6kl/sdio.c 2014-04-27 23:40:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath6kl/sdio.c 2014-04-28 00:33:36.000000000 +0000 +@@ -80,17 +80,6 @@ return ar->hif_priv; } @@ -36,7 +38,7 @@ static void ath6kl_sdio_set_mbox_info(struct ath6kl *ar) { struct ath6kl_mbox_info *mbox_info = &ar->mbox_info; -@@ -394,8 +383,8 @@ static int ath6kl_sdio_alloc_prep_scat_r +@@ -404,8 +393,8 @@ return 0; } @@ -47,7 +49,7 @@ { struct ath6kl_sdio *ar_sdio = ath6kl_sdio_priv(ar); u8 *tbuf = NULL; -@@ -405,7 +394,10 @@ static int ath6kl_sdio_read_write_sync(s +@@ -415,7 +404,10 @@ if (request & HIF_BLOCK_BASIS) len = round_down(len, HIF_MBOX_BLOCK_SIZE); @@ -59,7 +61,7 @@ if (!ar_sdio->dma_buffer) return -ENOMEM; mutex_lock(&ar_sdio->dma_buffer_mutex); -@@ -428,6 +420,13 @@ static int ath6kl_sdio_read_write_sync(s +@@ -438,6 +430,13 @@ return ret; } @@ -73,7 +75,7 @@ static void __ath6kl_sdio_write_async(struct ath6kl_sdio *ar_sdio, struct bus_request *req) { -@@ -437,9 +436,9 @@ static void __ath6kl_sdio_write_async(st +@@ -447,9 +446,9 @@ void *context; int status; diff -Nru linux-3.10.11/debian/patches/bugfix/all/cassini-Make-missing-firmware-non-fatal.patch linux-3.10-3.10.11/debian/patches/bugfix/all/cassini-Make-missing-firmware-non-fatal.patch --- linux-3.10.11/debian/patches/bugfix/all/cassini-Make-missing-firmware-non-fatal.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/cassini-Make-missing-firmware-non-fatal.patch 2014-04-28 00:32:41.000000000 +0000 @@ -16,11 +16,11 @@ drivers/net/ethernet/sun/cassini.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) -diff --git a/drivers/net/ethernet/sun/cassini.c b/drivers/net/ethernet/sun/cassini.c -index 4c682a3..759441b 100644 ---- a/drivers/net/ethernet/sun/cassini.c -+++ b/drivers/net/ethernet/sun/cassini.c -@@ -808,44 +808,43 @@ static int cas_reset_mii_phy(struct cas *cp) +Index: linux-3.10-3.10.11/drivers/net/ethernet/sun/cassini.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/sun/cassini.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/sun/cassini.c 2014-04-28 00:32:40.000000000 +0000 +@@ -808,44 +808,43 @@ return limit <= 0; } @@ -72,7 +72,7 @@ cas_phy_powerdown(cp); /* expanded memory access mode */ -@@ -5083,8 +5082,7 @@ static int cas_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) +@@ -5083,8 +5082,7 @@ if (cas_check_invariants(cp)) goto err_out_iounmap; if (cp->cas_flags & CAS_FLAG_SATURN) diff -Nru linux-3.10.11/debian/patches/bugfix/all/dm-Deal-with-merge_bvec_fn-in-component-devices-bett.patch linux-3.10-3.10.11/debian/patches/bugfix/all/dm-Deal-with-merge_bvec_fn-in-component-devices-bett.patch --- linux-3.10.11/debian/patches/bugfix/all/dm-Deal-with-merge_bvec_fn-in-component-devices-bett.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/dm-Deal-with-merge_bvec_fn-in-component-devices-bett.patch 2014-04-28 00:33:35.000000000 +0000 @@ -23,9 +23,11 @@ Signed-off-by: Ben Hutchings --- ---- a/drivers/md/dm-table.c -+++ b/drivers/md/dm-table.c -@@ -536,13 +536,15 @@ int dm_set_device_limits(struct dm_target *ti, struct dm_dev *dev, +Index: linux-3.10-3.10.11/drivers/md/dm-table.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-table.c 2014-04-27 23:40:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-table.c 2014-04-28 00:33:35.000000000 +0000 +@@ -537,13 +537,15 @@ (unsigned long long) start << SECTOR_SHIFT); /* diff -Nru linux-3.10.11/debian/patches/bugfix/all/firmware_class-log-every-success-and-failure.patch linux-3.10-3.10.11/debian/patches/bugfix/all/firmware_class-log-every-success-and-failure.patch --- linux-3.10.11/debian/patches/bugfix/all/firmware_class-log-every-success-and-failure.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/firmware_class-log-every-success-and-failure.patch 2014-04-28 00:32:41.000000000 +0000 @@ -18,9 +18,11 @@ This makes many error messages in drivers redundant, which will be removed in later patches. ---- a/drivers/base/firmware_class.c -+++ b/drivers/base/firmware_class.c -@@ -619,14 +619,23 @@ static ssize_t firmware_loading_store(st +Index: linux-3.10-3.10.11/drivers/base/firmware_class.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/base/firmware_class.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/base/firmware_class.c 2014-04-28 00:32:41.000000000 +0000 +@@ -619,14 +619,23 @@ * is completed. * */ fw_map_pages_buf(fw_buf); @@ -46,7 +48,7 @@ fw_load_abort(fw_priv); break; } -@@ -792,6 +801,9 @@ static void firmware_class_timeout_work( +@@ -792,6 +801,9 @@ struct firmware_priv, timeout_work.work); mutex_lock(&fw_lock); @@ -56,7 +58,7 @@ fw_load_abort(fw_priv); mutex_unlock(&fw_lock); } -@@ -843,25 +855,28 @@ static int _request_firmware_load(struct +@@ -843,25 +855,28 @@ retval = device_add(f_dev); if (retval) { @@ -89,7 +91,7 @@ if (timeout != MAX_SCHEDULE_TIMEOUT) schedule_delayed_work(&fw_priv->timeout_work, timeout); -@@ -949,7 +964,8 @@ _request_firmware_prepare(struct firmwar +@@ -949,7 +964,8 @@ } if (fw_get_builtin_firmware(firmware, name)) { @@ -99,7 +101,7 @@ return 0; /* assigned */ } -@@ -979,9 +995,16 @@ static int assign_firmware_buf(struct fi +@@ -979,9 +995,16 @@ struct firmware_buf *buf = fw->priv; mutex_lock(&fw_lock); @@ -117,7 +119,7 @@ } /* -@@ -1030,7 +1053,7 @@ _request_firmware(const struct firmware +@@ -1030,7 +1053,7 @@ if (nowait) { timeout = usermodehelper_read_lock_wait(timeout); if (!timeout) { @@ -126,7 +128,7 @@ name); ret = -EBUSY; goto out; -@@ -1056,6 +1079,9 @@ _request_firmware(const struct firmware +@@ -1056,6 +1079,9 @@ if (ret < 0) { release_firmware(fw); fw = NULL; diff -Nru linux-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch linux-3.10-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch --- linux-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers.patch 2014-04-28 00:33:03.000000000 +0000 @@ -9,9 +9,11 @@ This will probably need to be split up into multiple patches prior to upstream submission. ---- a/arch/arm/mach-netx/xc.c -+++ b/arch/arm/mach-netx/xc.c -@@ -127,10 +127,8 @@ int xc_request_firmware(struct xc *x) +Index: linux-3.10-3.10.11/arch/arm/mach-netx/xc.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-netx/xc.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-netx/xc.c 2014-04-28 00:32:42.000000000 +0000 +@@ -127,10 +127,8 @@ ret = request_firmware(&fw, name, x->dev); @@ -23,9 +25,11 @@ head = (struct fw_header *)fw->data; if (head->magic != 0x4e657458) { ---- a/arch/cris/arch-v32/drivers/iop_fw_load.c -+++ b/arch/cris/arch-v32/drivers/iop_fw_load.c -@@ -74,12 +74,7 @@ int iop_fw_load_spu(const unsigned char +Index: linux-3.10-3.10.11/arch/cris/arch-v32/drivers/iop_fw_load.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/cris/arch-v32/drivers/iop_fw_load.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/arch/cris/arch-v32/drivers/iop_fw_load.c 2014-04-28 00:32:42.000000000 +0000 +@@ -74,12 +74,7 @@ fw_name, &iop_spu_device[spu_inst]); if (retval != 0) @@ -38,7 +42,7 @@ data = (u32 *) fw_entry->data; /* acquire ownership of memory controller */ -@@ -137,12 +132,7 @@ int iop_fw_load_mpu(unsigned char *fw_na +@@ -137,12 +132,7 @@ /* get firmware */ retval = request_firmware(&fw_entry, fw_name, &iop_mpu_device); if (retval != 0) @@ -51,23 +55,11 @@ data = (u32 *) fw_entry->data; /* disable MPU */ ---- a/arch/x86/kernel/microcode_amd.c -+++ b/arch/x86/kernel/microcode_amd.c -@@ -429,10 +429,8 @@ static enum ucode_state request_microcod - if (c->x86 >= 0x15) - snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86); - -- if (request_firmware(&fw, (const char *)fw_name, device)) { -- pr_err("failed to load file %s\n", fw_name); -+ if (request_firmware(&fw, (const char *)fw_name, device)) - goto out; -- } - - ret = UCODE_ERROR; - if (*(u32 *)fw->data != UCODE_MAGIC) { ---- a/drivers/atm/ambassador.c -+++ b/drivers/atm/ambassador.c -@@ -1929,10 +1929,8 @@ static int ucode_init(loader_block *lb, +Index: linux-3.10-3.10.11/drivers/atm/ambassador.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/atm/ambassador.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/atm/ambassador.c 2014-04-28 00:32:42.000000000 +0000 +@@ -1929,10 +1929,8 @@ int res; res = request_ihex_firmware(&fw, "atmsar11.fw", &dev->pci_dev->dev); @@ -79,9 +71,11 @@ /* First record contains just the start address */ rec = (const struct ihex_binrec *)fw->data; ---- a/drivers/atm/fore200e.c -+++ b/drivers/atm/fore200e.c -@@ -2505,10 +2505,9 @@ static int fore200e_load_and_start_fw(st +Index: linux-3.10-3.10.11/drivers/atm/fore200e.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/atm/fore200e.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/atm/fore200e.c 2014-04-28 00:32:42.000000000 +0000 +@@ -2505,10 +2505,9 @@ return err; sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT); @@ -94,9 +88,11 @@ fw_data = (__le32 *) firmware->data; fw_size = firmware->size / sizeof(u32); ---- a/drivers/bluetooth/ath3k.c -+++ b/drivers/bluetooth/ath3k.c -@@ -327,10 +327,8 @@ static int ath3k_load_patch(struct usb_d +Index: linux-3.10-3.10.11/drivers/bluetooth/ath3k.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/ath3k.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/ath3k.c 2014-04-28 00:32:42.000000000 +0000 +@@ -355,10 +355,8 @@ fw_version.rom_version); ret = request_firmware(&firmware, filename, &udev->dev); @@ -108,7 +104,7 @@ pt_version.rom_version = *(int *)(firmware->data + firmware->size - 8); pt_version.build_version = *(int *) -@@ -389,10 +387,8 @@ static int ath3k_load_syscfg(struct usb_ +@@ -417,10 +415,8 @@ fw_version.rom_version, clk_value, ".dfu"); ret = request_firmware(&firmware, filename, &udev->dev); @@ -120,9 +116,11 @@ ret = ath3k_load_fwfile(udev, firmware); release_firmware(firmware); ---- a/drivers/bluetooth/bcm203x.c -+++ b/drivers/bluetooth/bcm203x.c -@@ -193,7 +193,6 @@ static int bcm203x_probe(struct usb_inte +Index: linux-3.10-3.10.11/drivers/bluetooth/bcm203x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/bcm203x.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/bcm203x.c 2014-04-28 00:32:42.000000000 +0000 +@@ -193,7 +193,6 @@ } if (request_firmware(&firmware, "BCM2033-MD.hex", &udev->dev) < 0) { @@ -130,7 +128,7 @@ usb_free_urb(data->urb); return -EIO; } -@@ -218,7 +217,6 @@ static int bcm203x_probe(struct usb_inte +@@ -218,7 +217,6 @@ release_firmware(firmware); if (request_firmware(&firmware, "BCM2033-FW.bin", &udev->dev) < 0) { @@ -138,9 +136,11 @@ usb_free_urb(data->urb); kfree(data->buffer); return -EIO; ---- a/drivers/bluetooth/bfusb.c -+++ b/drivers/bluetooth/bfusb.c -@@ -672,10 +672,8 @@ static int bfusb_probe(struct usb_interf +Index: linux-3.10-3.10.11/drivers/bluetooth/bfusb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/bfusb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/bfusb.c 2014-04-28 00:32:42.000000000 +0000 +@@ -672,10 +672,8 @@ skb_queue_head_init(&data->pending_q); skb_queue_head_init(&data->completed_q); @@ -152,9 +152,11 @@ BT_DBG("firmware data %p size %zu", firmware->data, firmware->size); ---- a/drivers/bluetooth/bt3c_cs.c -+++ b/drivers/bluetooth/bt3c_cs.c -@@ -585,10 +585,8 @@ static int bt3c_open(bt3c_info_t *info) +Index: linux-3.10-3.10.11/drivers/bluetooth/bt3c_cs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/bt3c_cs.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/bt3c_cs.c 2014-04-28 00:32:42.000000000 +0000 +@@ -585,10 +585,8 @@ /* Load firmware */ err = request_firmware(&firmware, "BT3CPCC.bin", &info->p_dev->dev); @@ -166,9 +168,11 @@ err = bt3c_load_firmware(info, firmware->data, firmware->size); ---- a/drivers/bluetooth/btmrvl_sdio.c -+++ b/drivers/bluetooth/btmrvl_sdio.c -@@ -288,8 +288,6 @@ static int btmrvl_sdio_download_helper(s +Index: linux-3.10-3.10.11/drivers/bluetooth/btmrvl_sdio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/btmrvl_sdio.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/btmrvl_sdio.c 2014-04-28 00:32:42.000000000 +0000 +@@ -288,8 +288,6 @@ ret = request_firmware(&fw_helper, card->helper, &card->func->dev); if ((ret < 0) || !fw_helper) { @@ -177,7 +181,7 @@ ret = -ENOENT; goto done; } -@@ -388,8 +386,6 @@ static int btmrvl_sdio_download_fw_w_hel +@@ -388,8 +386,6 @@ ret = request_firmware(&fw_firmware, card->firmware, &card->func->dev); if ((ret < 0) || !fw_firmware) { @@ -186,9 +190,11 @@ ret = -ENOENT; goto done; } ---- a/drivers/char/dsp56k.c -+++ b/drivers/char/dsp56k.c -@@ -140,11 +140,8 @@ static int dsp56k_upload(u_char __user * +Index: linux-3.10-3.10.11/drivers/char/dsp56k.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/dsp56k.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/dsp56k.c 2014-04-28 00:32:42.000000000 +0000 +@@ -140,11 +140,8 @@ } err = request_firmware(&fw, fw_name, &pdev->dev); platform_device_unregister(pdev); @@ -201,9 +207,11 @@ if (fw->size % 3) { printk(KERN_ERR "Bogus length %d in image \"%s\"\n", fw->size, fw_name); ---- a/drivers/dma/imx-sdma.c -+++ b/drivers/dma/imx-sdma.c -@@ -1163,10 +1163,8 @@ static void sdma_load_firmware(const str +Index: linux-3.10-3.10.11/drivers/dma/imx-sdma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/dma/imx-sdma.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/dma/imx-sdma.c 2014-04-28 00:32:42.000000000 +0000 +@@ -1163,10 +1163,8 @@ const struct sdma_script_start_addrs *addr; unsigned short *ram_code; @@ -215,9 +223,11 @@ if (fw->size < sizeof(*header)) goto err_firmware; ---- a/drivers/gpu/drm/mga/mga_warp.c -+++ b/drivers/gpu/drm/mga/mga_warp.c -@@ -79,11 +79,8 @@ int mga_warp_install_microcode(drm_mga_p +Index: linux-3.10-3.10.11/drivers/gpu/drm/mga/mga_warp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/mga/mga_warp.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/mga/mga_warp.c 2014-04-28 00:32:42.000000000 +0000 +@@ -79,11 +79,8 @@ } rc = request_ihex_firmware(&fw, firmware_name, &pdev->dev); platform_device_unregister(pdev); @@ -230,9 +240,11 @@ size = 0; where = 0; ---- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c -+++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c -@@ -513,10 +513,8 @@ nvc0_graph_ctor_fw(struct nvc0_graph_pri +Index: linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c 2014-04-28 00:32:42.000000000 +0000 +@@ -513,10 +513,8 @@ if (ret) { snprintf(f, sizeof(f), "nouveau/%s", fwname); ret = request_firmware(&fw, f, &device->pdev->dev); @@ -244,9 +256,11 @@ } fuc->size = fw->size; ---- a/drivers/gpu/drm/r128/r128_cce.c -+++ b/drivers/gpu/drm/r128/r128_cce.c -@@ -154,11 +154,8 @@ static int r128_cce_load_microcode(drm_r +Index: linux-3.10-3.10.11/drivers/gpu/drm/r128/r128_cce.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/r128/r128_cce.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/r128/r128_cce.c 2014-04-28 00:32:42.000000000 +0000 +@@ -154,11 +154,8 @@ } rc = request_firmware(&fw, FIRMWARE_NAME, &pdev->dev); platform_device_unregister(pdev); @@ -259,9 +273,11 @@ if (fw->size != 256 * 8) { printk(KERN_ERR ---- a/drivers/gpu/drm/radeon/ni.c -+++ b/drivers/gpu/drm/radeon/ni.c -@@ -676,10 +676,6 @@ out: +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/ni.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/ni.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/ni.c 2014-04-28 00:32:42.000000000 +0000 +@@ -676,10 +676,6 @@ platform_device_unregister(pdev); if (err) { @@ -272,9 +288,11 @@ release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; release_firmware(rdev->me_fw); ---- a/drivers/gpu/drm/radeon/r100.c -+++ b/drivers/gpu/drm/radeon/r100.c -@@ -1044,10 +1044,7 @@ static int r100_cp_init_microcode(struct +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r100.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r100.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r100.c 2014-04-28 00:32:42.000000000 +0000 +@@ -1044,10 +1044,7 @@ err = request_firmware(&rdev->me_fw, fw_name, &pdev->dev); platform_device_unregister(pdev); @@ -286,9 +304,11 @@ printk(KERN_ERR "radeon_cp: Bogus length %zu in firmware \"%s\"\n", rdev->me_fw->size, fw_name); ---- a/drivers/gpu/drm/radeon/r600.c -+++ b/drivers/gpu/drm/radeon/r600.c -@@ -2291,10 +2291,6 @@ out: +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r600.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600.c 2014-04-28 00:32:43.000000000 +0000 +@@ -2291,10 +2291,6 @@ platform_device_unregister(pdev); if (err) { @@ -299,9 +319,11 @@ release_firmware(rdev->pfp_fw); rdev->pfp_fw = NULL; release_firmware(rdev->me_fw); ---- a/drivers/gpu/drm/radeon/r600_cp.c -+++ b/drivers/gpu/drm/radeon/r600_cp.c -@@ -376,10 +376,6 @@ out: +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600_cp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r600_cp.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600_cp.c 2014-04-28 00:32:43.000000000 +0000 +@@ -376,10 +376,6 @@ platform_device_unregister(pdev); if (err) { @@ -312,9 +334,11 @@ release_firmware(dev_priv->pfp_fw); dev_priv->pfp_fw = NULL; release_firmware(dev_priv->me_fw); ---- a/drivers/gpu/drm/radeon/radeon_cp.c -+++ b/drivers/gpu/drm/radeon/radeon_cp.c -@@ -530,10 +530,7 @@ static int radeon_cp_init_microcode(drm_ +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_cp.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cp.c 2014-04-28 00:32:43.000000000 +0000 +@@ -530,10 +530,7 @@ err = request_firmware(&dev_priv->me_fw, fw_name, &pdev->dev); platform_device_unregister(pdev); @@ -326,9 +350,11 @@ printk(KERN_ERR "radeon_cp: Bogus length %zu in firmware \"%s\"\n", dev_priv->me_fw->size, fw_name); ---- a/drivers/infiniband/hw/qib/qib_sd7220.c -+++ b/drivers/infiniband/hw/qib/qib_sd7220.c -@@ -405,10 +405,8 @@ int qib_sd7220_init(struct qib_devdata * +Index: linux-3.10-3.10.11/drivers/infiniband/hw/qib/qib_sd7220.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/infiniband/hw/qib/qib_sd7220.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/infiniband/hw/qib/qib_sd7220.c 2014-04-28 00:32:43.000000000 +0000 +@@ -405,10 +405,8 @@ } ret = request_firmware(&fw, SD7220_FW_NAME, &dd->pcidev->dev); @@ -340,9 +366,11 @@ /* Substitute our deduced value for was_reset */ ret = qib_ibsd_ucode_loaded(dd->pport, fw); ---- a/drivers/input/touchscreen/atmel_mxt_ts.c -+++ b/drivers/input/touchscreen/atmel_mxt_ts.c -@@ -986,10 +986,8 @@ static int mxt_load_fw(struct device *de +Index: linux-3.10-3.10.11/drivers/input/touchscreen/atmel_mxt_ts.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/input/touchscreen/atmel_mxt_ts.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/input/touchscreen/atmel_mxt_ts.c 2014-04-28 00:32:43.000000000 +0000 +@@ -986,10 +986,8 @@ int ret; ret = request_firmware(&fw, fn, dev); @@ -354,9 +382,11 @@ /* Change to the bootloader mode */ mxt_write_object(data, MXT_GEN_COMMAND_T6, ---- a/drivers/isdn/hardware/mISDN/speedfax.c -+++ b/drivers/isdn/hardware/mISDN/speedfax.c -@@ -392,11 +392,8 @@ setup_instance(struct sfax_hw *card) +Index: linux-3.10-3.10.11/drivers/isdn/hardware/mISDN/speedfax.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/isdn/hardware/mISDN/speedfax.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/isdn/hardware/mISDN/speedfax.c 2014-04-28 00:32:43.000000000 +0000 +@@ -392,11 +392,8 @@ card->isar.owner = THIS_MODULE; err = request_firmware(&firmware, "isdn/ISAR.BIN", &card->pdev->dev); @@ -369,9 +399,11 @@ if (debug & DEBUG_HW) pr_notice("%s: got firmware %zu bytes\n", card->name, firmware->size); ---- a/drivers/media/tuners/tuner-xc2028.c -+++ b/drivers/media/tuners/tuner-xc2028.c -@@ -1349,7 +1349,6 @@ static void load_firmware_cb(const struc +Index: linux-3.10-3.10.11/drivers/media/tuners/tuner-xc2028.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/tuners/tuner-xc2028.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/tuners/tuner-xc2028.c 2014-04-28 00:32:43.000000000 +0000 +@@ -1349,7 +1349,6 @@ tuner_dbg("request_firmware_nowait(): %s\n", fw ? "OK" : "error"); if (!fw) { @@ -379,9 +411,11 @@ priv->state = XC2028_NODEV; return; } ---- a/drivers/media/usb/dvb-usb/dib0700_devices.c -+++ b/drivers/media/usb/dvb-usb/dib0700_devices.c -@@ -2256,12 +2256,9 @@ static int stk9090m_frontend_attach(stru +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/dib0700_devices.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/dib0700_devices.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/dib0700_devices.c 2014-04-28 00:32:43.000000000 +0000 +@@ -2256,12 +2256,9 @@ dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80); @@ -396,7 +430,7 @@ stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size; stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data; -@@ -2322,12 +2319,9 @@ static int nim9090md_frontend_attach(str +@@ -2322,12 +2319,9 @@ msleep(20); dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1); @@ -411,9 +445,11 @@ nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size; nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data; nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size; ---- a/drivers/media/usb/dvb-usb/dvb-usb-firmware.c -+++ b/drivers/media/usb/dvb-usb/dvb-usb-firmware.c -@@ -80,14 +80,9 @@ int dvb_usb_download_firmware(struct usb +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/dvb-usb-firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/dvb-usb-firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/dvb-usb-firmware.c 2014-04-28 00:32:43.000000000 +0000 +@@ -80,14 +80,9 @@ int ret; const struct firmware *fw = NULL; @@ -430,9 +466,11 @@ switch (props->usb_ctrl) { case CYPRESS_AN2135: ---- a/drivers/media/usb/dvb-usb/gp8psk.c -+++ b/drivers/media/usb/dvb-usb/gp8psk.c -@@ -116,20 +116,14 @@ static int gp8psk_load_bcm4500fw(struct +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/gp8psk.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/gp8psk.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/gp8psk.c 2014-04-28 00:32:43.000000000 +0000 +@@ -116,20 +116,14 @@ const u8 *ptr; u8 *buf; if ((ret = request_firmware(&fw, bcm4500_firmware, @@ -454,9 +492,11 @@ ptr = fw->data; buf = kmalloc(64, GFP_KERNEL | GFP_DMA); if (!buf) { ---- a/drivers/media/usb/dvb-usb/opera1.c -+++ b/drivers/media/usb/dvb-usb/opera1.c -@@ -452,9 +452,6 @@ static int opera1_xilinx_load_firmware(s +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/opera1.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/opera1.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/opera1.c 2014-04-28 00:32:43.000000000 +0000 +@@ -452,9 +452,6 @@ info("start downloading fpga firmware %s",filename); if ((ret = request_firmware(&fw, filename, &dev->dev)) != 0) { @@ -466,9 +506,11 @@ return ret; } else { p = kmalloc(fw->size, GFP_KERNEL); ---- a/drivers/media/dvb-frontends/af9013.c -+++ b/drivers/media/dvb-frontends/af9013.c -@@ -1363,16 +1363,8 @@ static int af9013_download_firmware(stru +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/af9013.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/af9013.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/af9013.c 2014-04-28 00:32:43.000000000 +0000 +@@ -1363,16 +1363,8 @@ /* request the firmware, this will block and timeout */ ret = request_firmware(&fw, fw_file, state->i2c->dev.parent); @@ -486,9 +528,11 @@ /* calc checksum */ for (i = 0; i < fw->size; i++) ---- a/drivers/media/dvb-frontends/bcm3510.c -+++ b/drivers/media/dvb-frontends/bcm3510.c -@@ -622,10 +622,9 @@ static int bcm3510_download_firmware(str +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/bcm3510.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/bcm3510.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/bcm3510.c 2014-04-28 00:32:43.000000000 +0000 +@@ -622,10 +622,9 @@ int ret,i; deb_info("requesting firmware\n"); @@ -501,9 +545,11 @@ deb_info("got firmware: %zd\n",fw->size); b = fw->data; ---- a/drivers/media/dvb-frontends/cx24116.c -+++ b/drivers/media/dvb-frontends/cx24116.c -@@ -493,13 +493,8 @@ static int cx24116_firmware_ondemand(str +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/cx24116.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/cx24116.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/cx24116.c 2014-04-28 00:32:43.000000000 +0000 +@@ -493,13 +493,8 @@ __func__, CX24116_DEFAULT_FIRMWARE); ret = request_firmware(&fw, CX24116_DEFAULT_FIRMWARE, state->i2c->dev.parent); @@ -518,9 +564,11 @@ /* Make sure we don't recurse back through here * during loading */ ---- a/drivers/media/dvb-frontends/drxd_hard.c -+++ b/drivers/media/dvb-frontends/drxd_hard.c -@@ -909,10 +909,8 @@ static int load_firmware(struct drxd_sta +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/drxd_hard.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/drxd_hard.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/drxd_hard.c 2014-04-28 00:32:43.000000000 +0000 +@@ -909,10 +909,8 @@ { const struct firmware *fw; @@ -532,9 +580,11 @@ state->microcode = kmemdup(fw->data, fw->size, GFP_KERNEL); if (state->microcode == NULL) { ---- a/drivers/media/dvb-frontends/drxk_hard.c -+++ b/drivers/media/dvb-frontends/drxk_hard.c -@@ -6229,12 +6229,6 @@ static void load_firmware_cb(const struc +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/drxk_hard.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/drxk_hard.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/drxk_hard.c 2014-04-28 00:32:43.000000000 +0000 +@@ -6229,12 +6229,6 @@ dprintk(1, ": %s\n", fw ? "firmware loaded" : "firmware not loaded"); if (!fw) { @@ -547,9 +597,11 @@ state->microcode_name = NULL; /* ---- a/drivers/media/dvb-frontends/ds3000.c -+++ b/drivers/media/dvb-frontends/ds3000.c -@@ -362,12 +362,8 @@ static int ds3000_firmware_ondemand(stru +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/ds3000.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/ds3000.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/ds3000.c 2014-04-28 00:32:43.000000000 +0000 +@@ -362,12 +362,8 @@ DS3000_DEFAULT_FIRMWARE); ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE, state->i2c->dev.parent); @@ -563,9 +615,11 @@ ret = ds3000_load_firmware(fe, fw); if (ret) ---- a/drivers/media/dvb-frontends/nxt200x.c -+++ b/drivers/media/dvb-frontends/nxt200x.c -@@ -882,12 +882,8 @@ static int nxt2002_init(struct dvb_front +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/nxt200x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/nxt200x.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/nxt200x.c 2014-04-28 00:32:43.000000000 +0000 +@@ -882,12 +882,8 @@ __func__, NXT2002_DEFAULT_FIRMWARE); ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE, state->i2c->dev.parent); @@ -579,7 +633,7 @@ ret = nxt2002_load_firmware(fe, fw); release_firmware(fw); -@@ -949,12 +945,8 @@ static int nxt2004_init(struct dvb_front +@@ -949,12 +945,8 @@ __func__, NXT2004_DEFAULT_FIRMWARE); ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE, state->i2c->dev.parent); @@ -593,9 +647,11 @@ ret = nxt2004_load_firmware(fe, fw); release_firmware(fw); ---- a/drivers/media/dvb-frontends/or51132.c -+++ b/drivers/media/dvb-frontends/or51132.c -@@ -341,11 +341,8 @@ static int or51132_set_parameters(struct +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/or51132.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/or51132.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/or51132.c 2014-04-28 00:32:43.000000000 +0000 +@@ -341,11 +341,8 @@ printk("or51132: Waiting for firmware upload(%s)...\n", fwname); ret = request_firmware(&fw, fwname, state->i2c->dev.parent); @@ -608,9 +664,11 @@ ret = or51132_load_firmware(fe, fw); release_firmware(fw); if (ret) { ---- a/drivers/media/dvb-frontends/or51211.c -+++ b/drivers/media/dvb-frontends/or51211.c -@@ -375,12 +375,8 @@ static int or51211_init(struct dvb_front +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/or51211.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/or51211.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/or51211.c 2014-04-28 00:32:43.000000000 +0000 +@@ -375,12 +375,8 @@ OR51211_DEFAULT_FIRMWARE); ret = config->request_firmware(fe, &fw, OR51211_DEFAULT_FIRMWARE); @@ -624,9 +682,11 @@ ret = or51211_load_firmware(fe, fw); release_firmware(fw); ---- a/drivers/media/dvb-frontends/sp8870.c -+++ b/drivers/media/dvb-frontends/sp8870.c -@@ -315,10 +315,8 @@ static int sp8870_init (struct dvb_front +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/sp8870.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/sp8870.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/sp8870.c 2014-04-28 00:32:43.000000000 +0000 +@@ -315,10 +315,8 @@ /* request the firmware, this will block until someone uploads it */ printk("sp8870: waiting for firmware upload (%s)...\n", SP8870_DEFAULT_FIRMWARE); @@ -638,9 +698,11 @@ if (sp8870_firmware_upload(state, fw)) { printk("sp8870: writing firmware to device failed\n"); ---- a/drivers/media/dvb-frontends/sp887x.c -+++ b/drivers/media/dvb-frontends/sp887x.c -@@ -527,10 +527,8 @@ static int sp887x_init(struct dvb_fronte +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/sp887x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/sp887x.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/sp887x.c 2014-04-28 00:32:43.000000000 +0000 +@@ -527,10 +527,8 @@ /* request the firmware, this will block until someone uploads it */ printk("sp887x: waiting for firmware upload (%s)...\n", SP887X_DEFAULT_FIRMWARE); ret = state->config->request_firmware(fe, &fw, SP887X_DEFAULT_FIRMWARE); @@ -652,9 +714,11 @@ ret = sp887x_initial_setup(fe, fw); release_firmware(fw); ---- a/drivers/media/dvb-frontends/tda10048.c -+++ b/drivers/media/dvb-frontends/tda10048.c -@@ -495,8 +495,6 @@ static int tda10048_firmware_upload(stru +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/tda10048.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/tda10048.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/tda10048.c 2014-04-28 00:32:43.000000000 +0000 +@@ -495,8 +495,6 @@ ret = request_firmware(&fw, TDA10048_DEFAULT_FIRMWARE, state->i2c->dev.parent); if (ret) { @@ -663,9 +727,11 @@ return -EIO; } else { printk(KERN_INFO "%s: firmware read %Zu bytes.\n", ---- a/drivers/media/dvb-frontends/tda1004x.c -+++ b/drivers/media/dvb-frontends/tda1004x.c -@@ -401,10 +401,8 @@ static int tda10045_fwupload(struct dvb_ +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/tda1004x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/tda1004x.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/tda1004x.c 2014-04-28 00:32:43.000000000 +0000 +@@ -401,10 +401,8 @@ /* request the firmware, this will block until someone uploads it */ printk(KERN_INFO "tda1004x: waiting for firmware upload (%s)...\n", TDA10045_DEFAULT_FIRMWARE); ret = state->config->request_firmware(fe, &fw, TDA10045_DEFAULT_FIRMWARE); @@ -677,7 +743,7 @@ /* reset chip */ tda1004x_write_mask(state, TDA1004X_CONFC4, 0x10, 0); -@@ -545,7 +543,6 @@ static int tda10046_fwupload(struct dvb_ +@@ -545,7 +543,6 @@ /* remain compatible to old bug: try to load with tda10045 image name */ ret = state->config->request_firmware(fe, &fw, TDA10045_DEFAULT_FIRMWARE); if (ret) { @@ -685,9 +751,11 @@ return ret; } else { printk(KERN_INFO "tda1004x: please rename the firmware file to %s\n", ---- a/drivers/media/dvb-frontends/tda10071.c -+++ b/drivers/media/dvb-frontends/tda10071.c -@@ -941,14 +941,8 @@ static int tda10071_init(struct dvb_fron +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/tda10071.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/tda10071.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/tda10071.c 2014-04-28 00:32:43.000000000 +0000 +@@ -941,14 +941,8 @@ /* request the firmware, this will block and timeout */ ret = request_firmware(&fw, fw_file, priv->i2c->dev.parent); @@ -703,9 +771,11 @@ /* init */ for (i = 0; i < ARRAY_SIZE(tab2); i++) { ---- a/drivers/media/pci/ngene/ngene-core.c -+++ b/drivers/media/pci/ngene/ngene-core.c -@@ -1266,13 +1266,8 @@ static int ngene_load_firm(struct ngene +Index: linux-3.10-3.10.11/drivers/media/pci/ngene/ngene-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/ngene/ngene-core.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/ngene/ngene-core.c 2014-04-28 00:32:44.000000000 +0000 +@@ -1266,13 +1266,8 @@ break; } @@ -720,7 +790,7 @@ if (size == 0) size = fw->size; if (size != fw->size) { -@@ -1280,8 +1275,6 @@ static int ngene_load_firm(struct ngene +@@ -1280,8 +1275,6 @@ ": Firmware %s has invalid size!", fw_name); err = -1; } else { @@ -729,9 +799,11 @@ ngene_fw = (u8 *) fw->data; err = ngene_command_load_firmware(dev, ngene_fw, size); } ---- a/drivers/media/common/siano/smscoreapi.c -+++ b/drivers/media/common/siano/smscoreapi.c -@@ -1164,10 +1164,8 @@ static int smscore_load_firmware_from_fi +Index: linux-3.10-3.10.11/drivers/media/common/siano/smscoreapi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/common/siano/smscoreapi.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/common/siano/smscoreapi.c 2014-04-28 00:32:44.000000000 +0000 +@@ -1164,10 +1164,8 @@ return -EINVAL; rc = request_firmware(&fw, fw_filename, coredev->device); @@ -743,9 +815,11 @@ sms_info("read fw %s, buffer size=0x%zx", fw_filename, fw->size); fw_buf = kmalloc(ALIGN(fw->size, SMS_ALLOC_ALIGNMENT), GFP_KERNEL | GFP_DMA); ---- a/drivers/media/pci/ttpci/av7110.c -+++ b/drivers/media/pci/ttpci/av7110.c -@@ -1531,16 +1531,9 @@ static int get_firmware(struct av7110* a +Index: linux-3.10-3.10.11/drivers/media/pci/ttpci/av7110.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/ttpci/av7110.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/ttpci/av7110.c 2014-04-28 00:32:44.000000000 +0000 +@@ -1531,16 +1531,9 @@ /* request the av7110 firmware, this will block until someone uploads it */ ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev); if (ret) { @@ -764,9 +838,11 @@ return -EINVAL; } ---- a/drivers/media/pci/ttpci/av7110_hw.c -+++ b/drivers/media/pci/ttpci/av7110_hw.c -@@ -243,11 +243,8 @@ int av7110_bootarm(struct av7110 *av7110 +Index: linux-3.10-3.10.11/drivers/media/pci/ttpci/av7110_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/ttpci/av7110_hw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/ttpci/av7110_hw.c 2014-04-28 00:32:44.000000000 +0000 +@@ -243,11 +243,8 @@ //saa7146_setgpio(dev, 3, SAA7146_GPIO_INPUT); ret = request_firmware(&fw, fw_name, &dev->pci->dev); @@ -779,9 +855,11 @@ mwdebi(av7110, DEBISWAB, DPRAM_BASE, fw->data, fw->size); release_firmware(fw); ---- a/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c -+++ b/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c -@@ -296,10 +296,8 @@ static int ttusb_boot_dsp(struct ttusb * +Index: linux-3.10-3.10.11/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/ttusb-budget/dvb-ttusb-budget.c 2014-04-28 00:32:44.000000000 +0000 +@@ -296,10 +296,8 @@ err = request_firmware(&fw, "ttusb-budget/dspbootcode.bin", &ttusb->dev->dev); @@ -793,9 +871,11 @@ /* BootBlock */ b[0] = 0xaa; ---- a/drivers/media/usb/ttusb-dec/ttusb_dec.c -+++ b/drivers/media/usb/ttusb-dec/ttusb_dec.c -@@ -1293,11 +1293,8 @@ static int ttusb_dec_boot_dsp(struct ttu +Index: linux-3.10-3.10.11/drivers/media/usb/ttusb-dec/ttusb_dec.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/ttusb-dec/ttusb_dec.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/ttusb-dec/ttusb_dec.c 2014-04-28 00:32:44.000000000 +0000 +@@ -1293,11 +1293,8 @@ dprintk("%s\n", __func__); @@ -808,9 +888,11 @@ firmware = fw_entry->data; firmware_size = fw_entry->size; ---- a/drivers/media/radio/radio-wl1273.c -+++ b/drivers/media/radio/radio-wl1273.c -@@ -512,11 +512,8 @@ static int wl1273_fm_upload_firmware_pat +Index: linux-3.10-3.10.11/drivers/media/radio/radio-wl1273.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/radio/radio-wl1273.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/radio/radio-wl1273.c 2014-04-28 00:32:44.000000000 +0000 +@@ -512,11 +512,8 @@ * Uploading the firmware patch is not always necessary, * so we only print an info message. */ @@ -823,9 +905,11 @@ ptr = (__u8 *) fw_p->data; packet_num = ptr[0]; ---- a/drivers/media/radio/wl128x/fmdrv_common.c -+++ b/drivers/media/radio/wl128x/fmdrv_common.c -@@ -1248,10 +1248,8 @@ static int fm_download_firmware(struct f +Index: linux-3.10-3.10.11/drivers/media/radio/wl128x/fmdrv_common.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/radio/wl128x/fmdrv_common.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/radio/wl128x/fmdrv_common.c 2014-04-28 00:32:44.000000000 +0000 +@@ -1248,10 +1248,8 @@ ret = request_firmware(&fw_entry, fw_name, &fmdev->radio_dev->dev); @@ -837,9 +921,11 @@ fmdbg("Firmware(%s) length : %d bytes\n", fw_name, fw_entry->size); fw_data = (void *)fw_entry->data; ---- a/drivers/media/pci/bt8xx/bttv-cards.c -+++ b/drivers/media/pci/bt8xx/bttv-cards.c -@@ -3759,10 +3759,8 @@ static int pvr_boot(struct bttv *btv) +Index: linux-3.10-3.10.11/drivers/media/pci/bt8xx/bttv-cards.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/bt8xx/bttv-cards.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/bt8xx/bttv-cards.c 2014-04-28 00:32:44.000000000 +0000 +@@ -3759,10 +3759,8 @@ int rc; rc = request_firmware(&fw_entry, "hcwamc.rbf", &btv->c.pci->dev); @@ -851,9 +937,11 @@ rc = pvr_altera_load(btv, fw_entry->data, fw_entry->size); pr_info("%d: altera firmware upload %s\n", btv->c.nr, (rc < 0) ? "failed" : "ok"); ---- a/drivers/media/usb/cpia2/cpia2_core.c -+++ b/drivers/media/usb/cpia2/cpia2_core.c -@@ -907,11 +907,8 @@ static int apply_vp_patch(struct camera_ +Index: linux-3.10-3.10.11/drivers/media/usb/cpia2/cpia2_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/cpia2/cpia2_core.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/cpia2/cpia2_core.c 2014-04-28 00:32:44.000000000 +0000 +@@ -907,11 +907,8 @@ struct cpia2_command cmd; ret = request_firmware(&fw, fw_name, &cam->dev->dev); @@ -866,9 +954,11 @@ cmd.req_mode = CAMERAACCESS_TYPE_REPEAT | CAMERAACCESS_VP; cmd.direction = TRANSFER_WRITE; ---- a/drivers/media/pci/cx18/cx18-av-firmware.c -+++ b/drivers/media/pci/cx18/cx18-av-firmware.c -@@ -85,10 +85,8 @@ int cx18_av_loadfw(struct cx18 *cx) +Index: linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-av-firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx18/cx18-av-firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-av-firmware.c 2014-04-28 00:32:44.000000000 +0000 +@@ -85,10 +85,8 @@ int i; int retries1 = 0; @@ -880,9 +970,11 @@ /* The firmware load often has byte errors, so allow for several retries, both at byte level and at the firmware load level. */ ---- a/drivers/media/pci/cx18/cx18-dvb.c -+++ b/drivers/media/pci/cx18/cx18-dvb.c -@@ -141,9 +141,7 @@ static int yuan_mpc718_mt352_reqfw(struc +Index: linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-dvb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx18/cx18-dvb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-dvb.c 2014-04-28 00:32:44.000000000 +0000 +@@ -141,9 +141,7 @@ int ret; ret = request_firmware(fw, fn, &cx->pci_dev->dev); @@ -893,7 +985,7 @@ size_t sz = (*fw)->size; if (sz < 2 || sz > 64 || (sz % 2) != 0) { CX18_ERR("Firmware %s has a bad size: %lu bytes\n", -@@ -156,7 +154,7 @@ static int yuan_mpc718_mt352_reqfw(struc +@@ -156,7 +154,7 @@ if (ret) { CX18_ERR("The MPC718 board variant with the MT352 DVB-T" @@ -902,9 +994,11 @@ CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware " "mpc718' if you need the firmware\n"); } ---- a/drivers/media/pci/cx18/cx18-firmware.c -+++ b/drivers/media/pci/cx18/cx18-firmware.c -@@ -106,11 +106,8 @@ static int load_cpu_fw_direct(const char +Index: linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx18/cx18-firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx18/cx18-firmware.c 2014-04-28 00:32:44.000000000 +0000 +@@ -106,11 +106,8 @@ u32 __iomem *dst = (u32 __iomem *)mem; const u32 *src; @@ -917,7 +1011,7 @@ src = (const u32 *)fw->data; -@@ -151,8 +148,6 @@ static int load_apu_fw_direct(const char +@@ -151,8 +148,6 @@ int sz; if (request_firmware(&fw, fn, &cx->pci_dev->dev)) { @@ -926,9 +1020,11 @@ cx18_setup_page(cx, 0); return -ENOMEM; } ---- a/drivers/media/usb/cx231xx/cx231xx-417.c -+++ b/drivers/media/usb/cx231xx/cx231xx-417.c -@@ -995,12 +995,8 @@ static int cx231xx_load_firmware(struct +Index: linux-3.10-3.10.11/drivers/media/usb/cx231xx/cx231xx-417.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/cx231xx/cx231xx-417.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/cx231xx/cx231xx-417.c 2014-04-28 00:32:44.000000000 +0000 +@@ -995,12 +995,8 @@ retval = request_firmware(&firmware, CX231xx_FIRM_IMAGE_NAME, &dev->udev->dev); @@ -942,9 +1038,11 @@ if (firmware->size != CX231xx_FIRM_IMAGE_SIZE) { pr_err("ERROR: Firmware size mismatch (have %zd, expected %d)\n", ---- a/drivers/media/pci/cx23885/cx23885-417.c -+++ b/drivers/media/pci/cx23885/cx23885-417.c -@@ -930,14 +930,8 @@ static int cx23885_load_firmware(struct +Index: linux-3.10-3.10.11/drivers/media/pci/cx23885/cx23885-417.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx23885/cx23885-417.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx23885/cx23885-417.c 2014-04-28 00:32:45.000000000 +0000 +@@ -930,14 +930,8 @@ retval = request_firmware(&firmware, CX23885_FIRM_IMAGE_NAME, &dev->pci->dev); @@ -960,9 +1058,11 @@ if (firmware->size != CX23885_FIRM_IMAGE_SIZE) { printk(KERN_ERR "ERROR: Firmware size mismatch " ---- a/drivers/media/pci/cx23885/cx23885-cards.c -+++ b/drivers/media/pci/cx23885/cx23885-cards.c -@@ -1795,11 +1795,7 @@ void cx23885_card_setup(struct cx23885_d +Index: linux-3.10-3.10.11/drivers/media/pci/cx23885/cx23885-cards.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx23885/cx23885-cards.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx23885/cx23885-cards.c 2014-04-28 00:32:45.000000000 +0000 +@@ -1795,11 +1795,7 @@ cinfo.rev, filename); ret = request_firmware(&fw, filename, &dev->pci->dev); @@ -975,9 +1075,11 @@ altera_init(&netup_config, fw); release_firmware(fw); ---- a/drivers/media/i2c/cx25840/cx25840-firmware.c -+++ b/drivers/media/i2c/cx25840/cx25840-firmware.c -@@ -127,10 +127,8 @@ int cx25840_loadfw(struct i2c_client *cl +Index: linux-3.10-3.10.11/drivers/media/i2c/cx25840/cx25840-firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/i2c/cx25840/cx25840-firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/i2c/cx25840/cx25840-firmware.c 2014-04-28 00:32:45.000000000 +0000 +@@ -127,10 +127,8 @@ MAX_BUF_SIZE = 16; /* cx231xx cannot accept more than 16 bytes at a time */ } @@ -989,9 +1091,11 @@ start_fw_load(client); ---- a/drivers/media/pci/cx88/cx88-blackbird.c -+++ b/drivers/media/pci/cx88/cx88-blackbird.c -@@ -448,13 +448,8 @@ static int blackbird_load_firmware(struc +Index: linux-3.10-3.10.11/drivers/media/pci/cx88/cx88-blackbird.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/cx88/cx88-blackbird.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/cx88/cx88-blackbird.c 2014-04-28 00:32:45.000000000 +0000 +@@ -448,13 +448,8 @@ &dev->pci->dev); @@ -1006,9 +1110,11 @@ if (firmware->size != BLACKBIRD_FIRM_IMAGE_SIZE) { dprintk(0, "ERROR: Firmware size mismatch (have %zd, expected %d)\n", ---- a/drivers/media/usb/gspca/vicam.c -+++ b/drivers/media/usb/gspca/vicam.c -@@ -244,10 +244,8 @@ static int sd_init(struct gspca_dev *gsp +Index: linux-3.10-3.10.11/drivers/media/usb/gspca/vicam.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/gspca/vicam.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/gspca/vicam.c 2014-04-28 00:32:45.000000000 +0000 +@@ -244,10 +244,8 @@ ret = request_ihex_firmware(&fw, VICAM_FIRMWARE, &gspca_dev->dev->dev); @@ -1020,9 +1126,11 @@ firmware_buf = kmalloc(PAGE_SIZE, GFP_KERNEL); if (!firmware_buf) { ---- a/drivers/media/pci/ivtv/ivtv-firmware.c -+++ b/drivers/media/pci/ivtv/ivtv-firmware.c -@@ -80,8 +80,6 @@ retry: +Index: linux-3.10-3.10.11/drivers/media/pci/ivtv/ivtv-firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/ivtv/ivtv-firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/ivtv/ivtv-firmware.c 2014-04-28 00:32:45.000000000 +0000 +@@ -80,8 +80,6 @@ release_firmware(fw); return size; } @@ -1031,9 +1139,11 @@ return -ENOMEM; } ---- a/drivers/media/usb/pvrusb2/pvrusb2-hdw.c -+++ b/drivers/media/usb/pvrusb2/pvrusb2-hdw.c -@@ -1382,29 +1382,6 @@ static int pvr2_locate_firmware(struct p +Index: linux-3.10-3.10.11/drivers/media/usb/pvrusb2/pvrusb2-hdw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/pvrusb2/pvrusb2-hdw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/pvrusb2/pvrusb2-hdw.c 2014-04-28 00:32:45.000000000 +0000 +@@ -1382,29 +1382,6 @@ "request_firmware fatal error with code=%d",ret); return ret; } @@ -1063,9 +1173,11 @@ return ret; } ---- a/drivers/media/usb/s2255/s2255drv.c -+++ b/drivers/media/usb/s2255/s2255drv.c -@@ -2568,10 +2568,8 @@ static int s2255_probe(struct usb_interf +Index: linux-3.10-3.10.11/drivers/media/usb/s2255/s2255drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/s2255/s2255drv.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/s2255/s2255drv.c 2014-04-28 00:32:45.000000000 +0000 +@@ -2568,10 +2568,8 @@ } /* load the first chunk */ if (request_firmware(&dev->fw_data->fw, @@ -1077,9 +1189,11 @@ /* check the firmware is valid */ fw_size = dev->fw_data->fw->size; pdata = (__le32 *) &dev->fw_data->fw->data[fw_size - 8]; ---- a/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c -+++ b/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c -@@ -88,10 +88,8 @@ int s5p_mfc_load_firmware(struct s5p_mfc +Index: linux-3.10-3.10.11/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/s5p-mfc/s5p_mfc_ctrl.c 2014-04-28 00:32:45.000000000 +0000 +@@ -88,10 +88,8 @@ err = request_firmware((const struct firmware **)&fw_blob, dev->variant->fw_name, dev->v4l2_dev.dev); @@ -1091,7 +1205,7 @@ if (fw_blob->size > dev->fw_size) { mfc_err("MFC firmware is too big to be loaded\n"); release_firmware(fw_blob); -@@ -121,10 +119,8 @@ int s5p_mfc_reload_firmware(struct s5p_m +@@ -121,10 +119,8 @@ err = request_firmware((const struct firmware **)&fw_blob, dev->variant->fw_name, dev->v4l2_dev.dev); @@ -1103,9 +1217,11 @@ if (fw_blob->size > dev->fw_size) { mfc_err("MFC firmware is too big to be loaded\n"); release_firmware(fw_blob); ---- a/drivers/media/pci/saa7164/saa7164-fw.c -+++ b/drivers/media/pci/saa7164/saa7164-fw.c -@@ -420,11 +420,8 @@ int saa7164_downloadfirmware(struct saa7 +Index: linux-3.10-3.10.11/drivers/media/pci/saa7164/saa7164-fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/saa7164/saa7164-fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/saa7164/saa7164-fw.c 2014-04-28 00:32:45.000000000 +0000 +@@ -420,11 +420,8 @@ __func__, fwname); ret = request_firmware(&fw, fwname, &dev->pci->dev); @@ -1118,9 +1234,11 @@ printk(KERN_INFO "%s() firmware read %Zu bytes.\n", __func__, fw->size); ---- a/drivers/media/usb/tlg2300/pd-main.c -+++ b/drivers/media/usb/tlg2300/pd-main.c -@@ -219,10 +219,8 @@ static int firmware_download(struct usb_ +Index: linux-3.10-3.10.11/drivers/media/usb/tlg2300/pd-main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/tlg2300/pd-main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/tlg2300/pd-main.c 2014-04-28 00:32:45.000000000 +0000 +@@ -219,10 +219,8 @@ size_t max_packet_size; ret = request_firmware(&fw, firmware_name, &udev->dev); @@ -1132,9 +1250,11 @@ fwlength = fw->size; ---- a/drivers/misc/ti-st/st_kim.c -+++ b/drivers/misc/ti-st/st_kim.c -@@ -301,11 +301,8 @@ static long download_firmware(struct kim +Index: linux-3.10-3.10.11/drivers/misc/ti-st/st_kim.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/ti-st/st_kim.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/ti-st/st_kim.c 2014-04-28 00:32:45.000000000 +0000 +@@ -301,11 +301,8 @@ request_firmware(&kim_gdata->fw_entry, bts_scr_name, &kim_gdata->kim_pdev->dev); if (unlikely((err != 0) || (kim_gdata->fw_entry->data == NULL) || @@ -1147,9 +1267,11 @@ ptr = (void *)kim_gdata->fw_entry->data; len = kim_gdata->fw_entry->size; /* bts_header to remove out magic number and ---- a/drivers/net/can/softing/softing_fw.c -+++ b/drivers/net/can/softing/softing_fw.c -@@ -238,11 +238,8 @@ int softing_load_app_fw(const char *file +Index: linux-3.10-3.10.11/drivers/net/can/softing/softing_fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/can/softing/softing_fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/can/softing/softing_fw.c 2014-04-28 00:32:45.000000000 +0000 +@@ -238,11 +238,8 @@ int8_t type_end = 0, type_entrypoint = 0; ret = request_firmware(&fw, file, &card->pdev->dev); @@ -1162,9 +1284,11 @@ dev_dbg(&card->pdev->dev, "firmware(%s) got %lu bytes\n", file, (unsigned long)fw->size); /* parse the firmware */ ---- a/drivers/net/ethernet/3com/typhoon.c -+++ b/drivers/net/ethernet/3com/typhoon.c -@@ -1279,11 +1279,8 @@ typhoon_request_firmware(struct typhoon +Index: linux-3.10-3.10.11/drivers/net/ethernet/3com/typhoon.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/3com/typhoon.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/3com/typhoon.c 2014-04-28 00:32:45.000000000 +0000 +@@ -1279,11 +1279,8 @@ return 0; err = request_firmware(&typhoon_fw, FIRMWARE_NAME, &tp->pdev->dev); @@ -1177,9 +1301,11 @@ image_data = (u8 *) typhoon_fw->data; remaining = typhoon_fw->size; ---- a/drivers/net/ethernet/adaptec/starfire.c -+++ b/drivers/net/ethernet/adaptec/starfire.c -@@ -1017,11 +1017,8 @@ static int netdev_open(struct net_device +Index: linux-3.10-3.10.11/drivers/net/ethernet/adaptec/starfire.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/adaptec/starfire.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/adaptec/starfire.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1017,11 +1017,8 @@ #endif /* VLAN_SUPPORT */ retval = request_firmware(&fw_rx, FIRMWARE_RX, &np->pci_dev->dev); @@ -1192,7 +1318,7 @@ if (fw_rx->size % 4) { printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n", fw_rx->size, FIRMWARE_RX); -@@ -1029,11 +1026,8 @@ static int netdev_open(struct net_device +@@ -1029,11 +1026,8 @@ goto out_rx; } retval = request_firmware(&fw_tx, FIRMWARE_TX, &np->pci_dev->dev); @@ -1205,9 +1331,11 @@ if (fw_tx->size % 4) { printk(KERN_ERR "starfire: bogus length %zu in \"%s\"\n", fw_tx->size, FIRMWARE_TX); ---- a/drivers/net/ethernet/alteon/acenic.c -+++ b/drivers/net/ethernet/alteon/acenic.c -@@ -2902,11 +2902,8 @@ static int ace_load_firmware(struct net_ +Index: linux-3.10-3.10.11/drivers/net/ethernet/alteon/acenic.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/alteon/acenic.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/alteon/acenic.c 2014-04-28 00:32:46.000000000 +0000 +@@ -2902,11 +2902,8 @@ fw_name = "acenic/tg1.bin"; ret = request_firmware(&fw, fw_name, &ap->pdev->dev); @@ -1220,9 +1348,11 @@ fw_data = (void *)fw->data; ---- a/drivers/net/ethernet/broadcom/bnx2.c -+++ b/drivers/net/ethernet/broadcom/bnx2.c -@@ -3679,16 +3679,13 @@ static int bnx2_request_uncached_firmwar +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/bnx2.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2.c 2014-04-28 00:32:46.000000000 +0000 +@@ -3679,16 +3679,13 @@ } rc = request_firmware(&bp->mips_firmware, mips_fw_file, &bp->pdev->dev); @@ -1242,9 +1372,11 @@ mips_fw = (const struct bnx2_mips_fw_file *) bp->mips_firmware->data; rv2p_fw = (const struct bnx2_rv2p_fw_file *) bp->rv2p_firmware->data; if (bp->mips_firmware->size < sizeof(*mips_fw) || ---- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c -+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c -@@ -12258,11 +12258,8 @@ static int bnx2x_init_firmware(struct bn +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c 2014-04-28 00:32:46.000000000 +0000 +@@ -12258,11 +12258,8 @@ BNX2X_DEV_INFO("Loading %s\n", fw_file_name); rc = request_firmware(&bp->firmware, fw_file_name, &bp->pdev->dev); @@ -1257,9 +1389,11 @@ rc = bnx2x_check_firmware(bp); if (rc) { ---- a/drivers/net/ethernet/broadcom/tg3.c -+++ b/drivers/net/ethernet/broadcom/tg3.c -@@ -11016,11 +11016,8 @@ static int tg3_request_firmware(struct t +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/tg3.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/tg3.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/tg3.c 2014-04-28 00:32:46.000000000 +0000 +@@ -11052,11 +11052,8 @@ { const struct tg3_firmware_hdr *fw_hdr; @@ -1272,9 +1406,11 @@ fw_hdr = (struct tg3_firmware_hdr *)tp->fw->data; ---- a/drivers/net/ethernet/brocade/bna/cna_fwimg.c -+++ b/drivers/net/ethernet/brocade/bna/cna_fwimg.c -@@ -30,10 +30,8 @@ cna_read_firmware(struct pci_dev *pdev, +Index: linux-3.10-3.10.11/drivers/net/ethernet/brocade/bna/cna_fwimg.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/brocade/bna/cna_fwimg.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/brocade/bna/cna_fwimg.c 2014-04-28 00:32:46.000000000 +0000 +@@ -30,10 +30,8 @@ { const struct firmware *fw; @@ -1286,9 +1422,11 @@ *bfi_image = (u32 *)fw->data; *bfi_image_size = fw->size/sizeof(u32); ---- a/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c -+++ b/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c -@@ -1034,12 +1034,8 @@ int t3_get_edc_fw(struct cphy *phy, int +Index: linux-3.10-3.10.11/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1034,12 +1034,8 @@ snprintf(buf, sizeof(buf), get_edc_fw_name(edc_idx)); ret = request_firmware(&fw, buf, &adapter->pdev->dev); @@ -1302,7 +1440,7 @@ /* check size, take checksum in account */ if (fw->size > size + 4) { -@@ -1076,11 +1072,8 @@ static int upgrade_fw(struct adapter *ad +@@ -1076,11 +1072,8 @@ struct device *dev = &adap->pdev->dev; ret = request_firmware(&fw, FW_FNAME, dev); @@ -1315,7 +1453,7 @@ ret = t3_load_fw(adap, fw->data, fw->size); release_firmware(fw); -@@ -1125,11 +1118,8 @@ static int update_tpsram(struct adapter +@@ -1125,11 +1118,8 @@ snprintf(buf, sizeof(buf), TPSRAM_NAME, rev); ret = request_firmware(&tpsram, buf, dev); @@ -1328,9 +1466,11 @@ ret = t3_check_tpsram(adap, tpsram->data, tpsram->size); if (ret) ---- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c -+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c -@@ -1089,11 +1089,8 @@ static int upgrade_fw(struct adapter *ad +Index: linux-3.10-3.10.11/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1089,11 +1089,8 @@ } ret = request_firmware(&fw, fw_file_name, dev); @@ -1343,9 +1483,11 @@ hdr = (const struct fw_hdr *)fw->data; vers = ntohl(hdr->fw_ver); ---- a/drivers/net/ethernet/intel/e100.c -+++ b/drivers/net/ethernet/intel/e100.c -@@ -1293,9 +1293,6 @@ static const struct firmware *e100_reque +Index: linux-3.10-3.10.11/drivers/net/ethernet/intel/e100.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/intel/e100.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/intel/e100.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1293,9 +1293,6 @@ if (err) { if (required) { @@ -1355,9 +1497,11 @@ return ERR_PTR(err); } else { netif_info(nic, probe, nic->netdev, ---- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c -+++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c -@@ -584,8 +584,6 @@ static int myri10ge_load_hotplug_firmwar +Index: linux-3.10-3.10.11/drivers/net/ethernet/myricom/myri10ge/myri10ge.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/myricom/myri10ge/myri10ge.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/myricom/myri10ge/myri10ge.c 2014-04-28 00:32:46.000000000 +0000 +@@ -584,8 +584,6 @@ unsigned i; if ((status = request_firmware(&fw, mgp->fw_name, dev)) < 0) { @@ -1366,9 +1510,11 @@ status = -EINVAL; goto abort_with_nothing; } ---- a/drivers/net/ethernet/smsc/smc91c92_cs.c -+++ b/drivers/net/ethernet/smsc/smc91c92_cs.c -@@ -648,10 +648,8 @@ static int osi_load_firmware(struct pcmc +Index: linux-3.10-3.10.11/drivers/net/ethernet/smsc/smc91c92_cs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/smsc/smc91c92_cs.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/smsc/smc91c92_cs.c 2014-04-28 00:32:46.000000000 +0000 +@@ -648,10 +648,8 @@ int i, err; err = request_firmware(&fw, FIRMWARE_NAME, &link->dev); @@ -1380,9 +1526,11 @@ /* Download the Seven of Diamonds firmware */ for (i = 0; i < fw->size; i++) { ---- a/drivers/net/ethernet/sun/cassini.c -+++ b/drivers/net/ethernet/sun/cassini.c -@@ -818,11 +818,8 @@ static void cas_saturn_firmware_init(str +Index: linux-3.10-3.10.11/drivers/net/ethernet/sun/cassini.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/sun/cassini.c 2014-04-28 00:32:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/sun/cassini.c 2014-04-28 00:32:46.000000000 +0000 +@@ -818,11 +818,8 @@ return; err = request_firmware(&fw, fw_name, &cp->pdev->dev); @@ -1395,9 +1543,11 @@ if (fw->size < 2) { pr_err("bogus length %zu in \"%s\"\n", fw->size, fw_name); ---- a/drivers/net/hamradio/yam.c -+++ b/drivers/net/hamradio/yam.c -@@ -372,11 +372,8 @@ static unsigned char *add_mcs(unsigned c +Index: linux-3.10-3.10.11/drivers/net/hamradio/yam.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/hamradio/yam.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/hamradio/yam.c 2014-04-28 00:32:46.000000000 +0000 +@@ -372,11 +372,8 @@ } err = request_firmware(&fw, fw_name[predef], &pdev->dev); platform_device_unregister(pdev); @@ -1410,9 +1560,11 @@ if (fw->size != YAM_FPGA_SIZE) { printk(KERN_ERR "Bogus length %zu in firmware \"%s\"\n", fw->size, fw_name[predef]); ---- a/drivers/net/usb/kaweth.c -+++ b/drivers/net/usb/kaweth.c -@@ -398,10 +398,8 @@ static int kaweth_download_firmware(stru +Index: linux-3.10-3.10.11/drivers/net/usb/kaweth.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/kaweth.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/kaweth.c 2014-04-28 00:32:46.000000000 +0000 +@@ -398,10 +398,8 @@ int ret; ret = request_firmware(&fw, fwname, &kaweth->dev->dev); @@ -1424,9 +1576,11 @@ if (fw->size > KAWETH_FIRMWARE_BUF_SIZE) { dev_err(&kaweth->intf->dev, "Firmware too big: %zu\n", ---- a/drivers/net/wimax/i2400m/fw.c -+++ b/drivers/net/wimax/i2400m/fw.c -@@ -1582,11 +1582,8 @@ int i2400m_dev_bootstrap(struct i2400m * +Index: linux-3.10-3.10.11/drivers/net/wimax/i2400m/fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wimax/i2400m/fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wimax/i2400m/fw.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1582,11 +1582,8 @@ } d_printf(1, dev, "trying firmware %s (%d)\n", fw_name, itr); ret = request_firmware(&fw, fw_name, dev); @@ -1439,7 +1593,7 @@ i2400m->fw_name = fw_name; ret = i2400m_fw_bootstrap(i2400m, fw, flags); release_firmware(fw); -@@ -1629,8 +1626,6 @@ void i2400m_fw_cache(struct i2400m *i240 +@@ -1629,8 +1626,6 @@ kref_init(&i2400m_fw->kref); result = request_firmware(&i2400m_fw->fw, i2400m->fw_name, dev); if (result < 0) { @@ -1448,9 +1602,11 @@ kfree(i2400m_fw); i2400m_fw = (void *) ~0; } else ---- a/drivers/net/wireless/at76c50x-usb.c -+++ b/drivers/net/wireless/at76c50x-usb.c -@@ -1553,13 +1553,8 @@ static struct fwentry *at76_load_firmwar +Index: linux-3.10-3.10.11/drivers/net/wireless/at76c50x-usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/at76c50x-usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/at76c50x-usb.c 2014-04-28 00:32:46.000000000 +0000 +@@ -1553,13 +1553,8 @@ at76_dbg(DBG_FW, "downloading firmware %s", fwe->fwname); ret = request_firmware(&fwe->fw, fwe->fwname, &udev->dev); @@ -1465,9 +1621,11 @@ at76_dbg(DBG_FW, "got it."); fwh = (struct at76_fw_header *)(fwe->fw->data); ---- a/drivers/net/wireless/ath/ath9k/hif_usb.c -+++ b/drivers/net/wireless/ath/ath9k/hif_usb.c -@@ -1092,12 +1092,8 @@ static void ath9k_hif_usb_firmware_cb(co +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/hif_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/hif_usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/hif_usb.c 2014-04-28 00:32:47.000000000 +0000 +@@ -1092,12 +1092,8 @@ struct hif_device_usb *hif_dev = context; int ret; @@ -1481,9 +1639,11 @@ hif_dev->htc_handle = ath9k_htc_hw_alloc(hif_dev, &hif_usb, &hif_dev->udev->dev); ---- a/drivers/net/wireless/ath/carl9170/usb.c -+++ b/drivers/net/wireless/ath/carl9170/usb.c -@@ -1025,7 +1025,6 @@ static void carl9170_usb_firmware_step2( +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/carl9170/usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/carl9170/usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/carl9170/usb.c 2014-04-28 00:32:47.000000000 +0000 +@@ -1025,7 +1025,6 @@ return; } @@ -1491,9 +1651,11 @@ carl9170_usb_firmware_failed(ar); } ---- a/drivers/net/wireless/atmel.c -+++ b/drivers/net/wireless/atmel.c -@@ -3928,12 +3928,8 @@ static int reset_atmel_card(struct net_d +Index: linux-3.10-3.10.11/drivers/net/wireless/atmel.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/atmel.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/atmel.c 2014-04-28 00:32:47.000000000 +0000 +@@ -3928,12 +3928,8 @@ strcpy(priv->firmware_id, "atmel_at76c502.bin"); } err = request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev); @@ -1507,9 +1669,11 @@ } else { int fw_index = 0; int success = 0; ---- a/drivers/net/wireless/b43/main.c -+++ b/drivers/net/wireless/b43/main.c -@@ -2158,19 +2158,8 @@ int b43_do_request_fw(struct b43_request +Index: linux-3.10-3.10.11/drivers/net/wireless/b43/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/b43/main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/b43/main.c 2014-04-28 00:32:47.000000000 +0000 +@@ -2158,19 +2158,8 @@ } err = request_firmware(&ctx->blob, ctx->fwname, ctx->dev->dev->dev); @@ -1530,9 +1694,11 @@ fw_ready: if (ctx->blob->size < sizeof(struct b43_fw_header)) goto err_format; ---- a/drivers/net/wireless/b43legacy/main.c -+++ b/drivers/net/wireless/b43legacy/main.c -@@ -1554,11 +1554,8 @@ static int do_request_fw(struct b43legac +Index: linux-3.10-3.10.11/drivers/net/wireless/b43legacy/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/b43legacy/main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/b43legacy/main.c 2014-04-28 00:32:47.000000000 +0000 +@@ -1554,11 +1554,8 @@ } else { err = request_firmware(fw, path, dev->dev->dev); } @@ -1545,9 +1711,11 @@ if ((*fw)->size < sizeof(struct b43legacy_fw_header)) goto err_format; hdr = (struct b43legacy_fw_header *)((*fw)->data); ---- a/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c -+++ b/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c -@@ -3037,10 +3037,8 @@ static int brcmf_sdbrcm_download_code_fi +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_sdio.c 2014-04-28 00:32:47.000000000 +0000 +@@ -3037,10 +3037,8 @@ ret = request_firmware(&bus->firmware, BRCMF_SDIO_FW_NAME, &bus->sdiodev->func[2]->dev); @@ -1559,7 +1727,7 @@ bus->fw_ptr = 0; memptr = memblock = kmalloc(MEMBLOCK + BRCMF_SDALIGN, GFP_ATOMIC); -@@ -3159,10 +3157,8 @@ static int brcmf_sdbrcm_download_nvram(s +@@ -3159,10 +3157,8 @@ ret = request_firmware(&bus->firmware, BRCMF_SDIO_NV_NAME, &bus->sdiodev->func[2]->dev); @@ -1571,9 +1739,11 @@ ret = brcmf_process_nvram_vars(bus); ---- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c -+++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c -@@ -379,19 +379,13 @@ static int brcms_request_fw(struct brcms +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c 2014-04-28 00:32:47.000000000 +0000 +@@ -379,19 +379,13 @@ sprintf(fw_name, "%s-%d.fw", brcms_firmwares[i], UCODE_LOADER_API_VER); status = request_firmware(&wl->fw.fw_bin[i], fw_name, device); @@ -1595,9 +1765,11 @@ wl->fw.hdr_num_entries[i] = wl->fw.fw_hdr[i]->size / (sizeof(struct firmware_hdr)); } ---- a/drivers/net/wireless/ipw2x00/ipw2100.c -+++ b/drivers/net/wireless/ipw2x00/ipw2100.c -@@ -8428,12 +8428,8 @@ static int ipw2100_get_firmware(struct i +Index: linux-3.10-3.10.11/drivers/net/wireless/ipw2x00/ipw2100.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ipw2x00/ipw2100.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ipw2x00/ipw2100.c 2014-04-28 00:32:47.000000000 +0000 +@@ -8428,12 +8428,8 @@ rc = request_firmware(&fw->fw_entry, fw_name, &priv->pci_dev->dev); @@ -1611,9 +1783,11 @@ IPW_DEBUG_INFO("firmware data %p size %zd\n", fw->fw_entry->data, fw->fw_entry->size); ---- a/drivers/net/wireless/ipw2x00/ipw2200.c -+++ b/drivers/net/wireless/ipw2x00/ipw2200.c -@@ -3418,10 +3418,8 @@ static int ipw_get_fw(struct ipw_priv *p +Index: linux-3.10-3.10.11/drivers/net/wireless/ipw2x00/ipw2200.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ipw2x00/ipw2200.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ipw2x00/ipw2200.c 2014-04-28 00:32:47.000000000 +0000 +@@ -3418,10 +3418,8 @@ /* ask firmware_class module to get the boot firmware off disk */ rc = request_firmware(raw, name, &priv->pci_dev->dev); @@ -1625,9 +1799,11 @@ if ((*raw)->size < sizeof(*fw)) { IPW_ERROR("%s is too small (%zd)\n", name, (*raw)->size); ---- a/drivers/net/wireless/iwlegacy/3945-mac.c -+++ b/drivers/net/wireless/iwlegacy/3945-mac.c -@@ -1866,7 +1866,6 @@ il3945_read_ucode(struct il_priv *il) +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlegacy/3945-mac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlegacy/3945-mac.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlegacy/3945-mac.c 2014-04-28 00:32:47.000000000 +0000 +@@ -1866,7 +1866,6 @@ sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); if (ret < 0) { @@ -1635,9 +1811,11 @@ if (ret == -ENOENT) continue; else ---- a/drivers/net/wireless/iwlwifi/iwl-drv.c -+++ b/drivers/net/wireless/iwlwifi/iwl-drv.c -@@ -852,13 +852,8 @@ static void iwl_req_fw_callback(const st +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlwifi/iwl-drv.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-drv.c 2014-04-28 00:32:47.000000000 +0000 +@@ -852,13 +852,8 @@ memset(&pieces, 0, sizeof(pieces)); @@ -1652,9 +1830,11 @@ IWL_DEBUG_INFO(drv, "Loaded firmware file '%s' (%zd bytes).\n", drv->firmware_name, ucode_raw->size); ---- a/drivers/net/wireless/libertas_tf/if_usb.c -+++ b/drivers/net/wireless/libertas_tf/if_usb.c -@@ -825,8 +825,6 @@ static int if_usb_prog_firmware(struct i +Index: linux-3.10-3.10.11/drivers/net/wireless/libertas_tf/if_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/libertas_tf/if_usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/libertas_tf/if_usb.c 2014-04-28 00:32:47.000000000 +0000 +@@ -825,8 +825,6 @@ kparam_block_sysfs_write(fw_name); ret = request_firmware(&cardp->fw, lbtf_fw_name, &cardp->udev->dev); if (ret < 0) { @@ -1663,9 +1843,11 @@ kparam_unblock_sysfs_write(fw_name); goto done; } ---- a/drivers/net/wireless/mwifiex/main.c -+++ b/drivers/net/wireless/mwifiex/main.c -@@ -316,11 +316,8 @@ static void mwifiex_fw_dpc(const struct +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:32:47.000000000 +0000 +@@ -316,11 +316,8 @@ struct mwifiex_adapter *adapter = context; struct mwifiex_fw_image fw; @@ -1678,9 +1860,11 @@ memset(&fw, 0, sizeof(struct mwifiex_fw_image)); adapter->firmware = firmware; ---- a/drivers/net/wireless/mwl8k.c -+++ b/drivers/net/wireless/mwl8k.c -@@ -5524,16 +5524,12 @@ static int mwl8k_firmware_load_success(s +Index: linux-3.10-3.10.11/drivers/net/wireless/mwl8k.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwl8k.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwl8k.c 2014-04-28 00:32:47.000000000 +0000 +@@ -5524,16 +5524,12 @@ static void mwl8k_fw_state_machine(const struct firmware *fw, void *context) { struct mwl8k_priv *priv = context; @@ -1698,7 +1882,7 @@ priv->fw_helper = fw; rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode, true); -@@ -5568,11 +5564,8 @@ static void mwl8k_fw_state_machine(const +@@ -5568,11 +5564,8 @@ break; case FW_STATE_LOADING_ALT: @@ -1711,7 +1895,7 @@ priv->fw_ucode = fw; rc = mwl8k_firmware_load_success(priv); if (rc) -@@ -5610,10 +5603,8 @@ retry: +@@ -5610,10 +5603,8 @@ /* Ask userland hotplug daemon for the device firmware */ rc = mwl8k_request_firmware(priv, fw_image, nowait); @@ -1723,9 +1907,11 @@ if (nowait) return rc; ---- a/drivers/net/wireless/orinoco/fw.c -+++ b/drivers/net/wireless/orinoco/fw.c -@@ -132,7 +132,6 @@ orinoco_dl_firmware(struct orinoco_priva +Index: linux-3.10-3.10.11/drivers/net/wireless/orinoco/fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/orinoco/fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/orinoco/fw.c 2014-04-28 00:32:47.000000000 +0000 +@@ -132,7 +132,6 @@ err = request_firmware(&fw_entry, firmware, priv->dev); if (err) { @@ -1733,7 +1919,7 @@ err = -ENOENT; goto free; } -@@ -292,10 +291,8 @@ symbol_dl_firmware(struct orinoco_privat +@@ -292,10 +291,8 @@ const struct firmware *fw_entry; if (!orinoco_cached_fw_get(priv, true)) { @@ -1745,7 +1931,7 @@ } else fw_entry = orinoco_cached_fw_get(priv, true); -@@ -311,10 +308,8 @@ symbol_dl_firmware(struct orinoco_privat +@@ -311,10 +308,8 @@ } if (!orinoco_cached_fw_get(priv, false)) { @@ -1757,9 +1943,11 @@ } else fw_entry = orinoco_cached_fw_get(priv, false); ---- a/drivers/net/wireless/orinoco/orinoco_usb.c -+++ b/drivers/net/wireless/orinoco/orinoco_usb.c -@@ -1690,7 +1690,6 @@ static int ezusb_probe(struct usb_interf +Index: linux-3.10-3.10.11/drivers/net/wireless/orinoco/orinoco_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/orinoco/orinoco_usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/orinoco/orinoco_usb.c 2014-04-28 00:32:47.000000000 +0000 +@@ -1690,7 +1690,6 @@ if (ezusb_firmware_download(upriv, &firmware)) goto error; } else { @@ -1767,9 +1955,11 @@ goto error; } ---- a/drivers/net/wireless/p54/p54pci.c -+++ b/drivers/net/wireless/p54/p54pci.c -@@ -497,7 +497,6 @@ static void p54p_firmware_step2(const st +Index: linux-3.10-3.10.11/drivers/net/wireless/p54/p54pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/p54/p54pci.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/p54/p54pci.c 2014-04-28 00:32:47.000000000 +0000 +@@ -497,7 +497,6 @@ int err; if (!fw) { @@ -1777,9 +1967,11 @@ err = -ENOENT; goto out; } ---- a/drivers/net/wireless/p54/p54spi.c -+++ b/drivers/net/wireless/p54/p54spi.c -@@ -171,10 +171,8 @@ static int p54spi_request_firmware(struc +Index: linux-3.10-3.10.11/drivers/net/wireless/p54/p54spi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/p54/p54spi.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/p54/p54spi.c 2014-04-28 00:32:47.000000000 +0000 +@@ -171,10 +171,8 @@ /* FIXME: should driver use it's own struct device? */ ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev); @@ -1791,9 +1983,11 @@ ret = p54_parse_firmware(dev, priv->firmware); if (ret) { ---- a/drivers/net/wireless/p54/p54usb.c -+++ b/drivers/net/wireless/p54/p54usb.c -@@ -929,7 +929,6 @@ static void p54u_load_firmware_cb(const +Index: linux-3.10-3.10.11/drivers/net/wireless/p54/p54usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/p54/p54usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/p54/p54usb.c 2014-04-28 00:32:47.000000000 +0000 +@@ -929,7 +929,6 @@ err = p54u_start_ops(priv); } else { err = -ENOENT; @@ -1801,9 +1995,11 @@ } if (err) { ---- a/drivers/net/wireless/prism54/islpci_dev.c -+++ b/drivers/net/wireless/prism54/islpci_dev.c -@@ -93,12 +93,9 @@ isl_upload_firmware(islpci_private *priv +Index: linux-3.10-3.10.11/drivers/net/wireless/prism54/islpci_dev.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/prism54/islpci_dev.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/prism54/islpci_dev.c 2014-04-28 00:32:47.000000000 +0000 +@@ -93,12 +93,9 @@ const u32 *fw_ptr; rc = request_firmware(&fw_entry, priv->firmware, PRISM_FW_PDEV); @@ -1818,9 +2014,11 @@ /* prepare the Direct Memory Base register */ reg = ISL38XX_DEV_FIRMWARE_ADDRES; ---- a/drivers/net/wireless/rt2x00/rt2x00firmware.c -+++ b/drivers/net/wireless/rt2x00/rt2x00firmware.c -@@ -51,10 +51,8 @@ static int rt2x00lib_request_firmware(st +Index: linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2x00firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rt2x00/rt2x00firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2x00firmware.c 2014-04-28 00:32:47.000000000 +0000 +@@ -51,10 +51,8 @@ rt2x00_info(rt2x00dev, "Loading firmware file '%s'\n", fw_name); retval = request_firmware(&fw, fw_name, device); @@ -1832,29 +2030,11 @@ if (!fw || !fw->size || !fw->data) { rt2x00_err(rt2x00dev, "Failed to read Firmware\n"); ---- a/drivers/net/wireless/rtlwifi/core.c -+++ b/drivers/net/wireless/rtlwifi/core.c -@@ -46,7 +46,6 @@ void rtl_fw_cb(const struct firmware *fi - "Firmware callback routine entered!\n"); - complete(&rtlpriv->firmware_loading_complete); - if (!firmware) { -- pr_err("Firmware %s not available\n", rtlpriv->cfg->fw_name); - rtlpriv->max_fw_size = 0; - return; - } ---- a/drivers/net/wireless/rtlwifi/rtl8192se/sw.c -+++ b/drivers/net/wireless/rtlwifi/rtl8192se/sw.c -@@ -97,7 +97,6 @@ static void rtl92se_fw_cb(const struct f - "Firmware callback routine entered!\n"); - complete(&rtlpriv->firmware_loading_complete); - if (!firmware) { -- pr_err("Firmware %s not available\n", rtlpriv->cfg->fw_name); - rtlpriv->max_fw_size = 0; - return; - } ---- a/drivers/net/wireless/ti/wl1251/main.c -+++ b/drivers/net/wireless/ti/wl1251/main.c -@@ -70,10 +70,8 @@ static int wl1251_fetch_firmware(struct +Index: linux-3.10-3.10.11/drivers/net/wireless/ti/wl1251/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ti/wl1251/main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ti/wl1251/main.c 2014-04-28 00:32:47.000000000 +0000 +@@ -70,10 +70,8 @@ ret = request_firmware(&fw, WL1251_FW_NAME, dev); @@ -1866,7 +2046,7 @@ if (fw->size % 4) { wl1251_error("firmware size is not multiple of 32 bits: %zu", -@@ -109,10 +107,8 @@ static int wl1251_fetch_nvs(struct wl125 +@@ -109,10 +107,8 @@ ret = request_firmware(&fw, WL1251_NVS_NAME, dev); @@ -1878,9 +2058,11 @@ if (fw->size % 4) { wl1251_error("nvs size is not multiple of 32 bits: %zu", ---- a/drivers/net/wireless/ti/wlcore/main.c -+++ b/drivers/net/wireless/ti/wlcore/main.c -@@ -753,10 +753,8 @@ static int wl12xx_fetch_firmware(struct +Index: linux-3.10-3.10.11/drivers/net/wireless/ti/wlcore/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ti/wlcore/main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ti/wlcore/main.c 2014-04-28 00:32:47.000000000 +0000 +@@ -753,10 +753,8 @@ ret = request_firmware(&fw, fw_name, wl->dev); @@ -1892,9 +2074,11 @@ if (fw->size % 4) { wl1271_error("firmware size is not multiple of 32 bits: %zu", ---- a/drivers/net/wireless/zd1201.c -+++ b/drivers/net/wireless/zd1201.c -@@ -65,8 +65,6 @@ static int zd1201_fw_upload(struct usb_d +Index: linux-3.10-3.10.11/drivers/net/wireless/zd1201.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/zd1201.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/zd1201.c 2014-04-28 00:32:47.000000000 +0000 +@@ -65,8 +65,6 @@ err = request_firmware(&fw_entry, fwfile, &dev->dev); if (err) { @@ -1903,9 +2087,11 @@ dev_err(&dev->dev, "Goto http://linux-lc100020.sourceforge.net for more info.\n"); return err; } ---- a/drivers/net/wireless/zd1211rw/zd_usb.c -+++ b/drivers/net/wireless/zd1211rw/zd_usb.c -@@ -121,16 +121,9 @@ static void int_urb_complete(struct urb +Index: linux-3.10-3.10.11/drivers/net/wireless/zd1211rw/zd_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/zd1211rw/zd_usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/zd1211rw/zd_usb.c 2014-04-28 00:32:48.000000000 +0000 +@@ -121,16 +121,9 @@ static int request_fw_file( const struct firmware **fw, const char *name, struct device *device) { @@ -1923,9 +2109,11 @@ } static inline u16 get_bcdDevice(const struct usb_device *udev) ---- a/drivers/scsi/advansys.c -+++ b/drivers/scsi/advansys.c -@@ -4298,8 +4298,6 @@ static ushort AscInitAsc1000Driver(ASC_D +Index: linux-3.10-3.10.11/drivers/scsi/advansys.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/advansys.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/advansys.c 2014-04-28 00:32:48.000000000 +0000 +@@ -4298,8 +4298,6 @@ err = request_firmware(&fw, fwname, asc_dvc->drv_ptr->dev); if (err) { @@ -1934,7 +2122,7 @@ asc_dvc->err_code |= ASC_IERR_MCODE_CHKSUM; return err; } -@@ -4631,8 +4629,6 @@ static int AdvInitAsc3550Driver(ADV_DVC_ +@@ -4631,8 +4629,6 @@ err = request_firmware(&fw, fwname, asc_dvc->drv_ptr->dev); if (err) { @@ -1943,7 +2131,7 @@ asc_dvc->err_code = ASC_IERR_MCODE_CHKSUM; return err; } -@@ -5147,8 +5143,6 @@ static int AdvInitAsc38C0800Driver(ADV_D +@@ -5147,8 +5143,6 @@ err = request_firmware(&fw, fwname, asc_dvc->drv_ptr->dev); if (err) { @@ -1952,7 +2140,7 @@ asc_dvc->err_code = ASC_IERR_MCODE_CHKSUM; return err; } -@@ -5649,8 +5643,6 @@ static int AdvInitAsc38C1600Driver(ADV_D +@@ -5649,8 +5643,6 @@ err = request_firmware(&fw, fwname, asc_dvc->drv_ptr->dev); if (err) { @@ -1961,9 +2149,11 @@ asc_dvc->err_code = ASC_IERR_MCODE_CHKSUM; return err; } ---- a/drivers/scsi/aic94xx/aic94xx_init.c -+++ b/drivers/scsi/aic94xx/aic94xx_init.c -@@ -397,8 +397,6 @@ static ssize_t asd_store_update_bios(str +Index: linux-3.10-3.10.11/drivers/scsi/aic94xx/aic94xx_init.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/aic94xx/aic94xx_init.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/aic94xx/aic94xx_init.c 2014-04-28 00:32:48.000000000 +0000 +@@ -397,8 +397,6 @@ filename_ptr, &asd_ha->pcidev->dev); if (err) { @@ -1972,9 +2162,11 @@ err = FAIL_OPEN_BIOS_FILE; goto out1; } ---- a/drivers/scsi/aic94xx/aic94xx_seq.c -+++ b/drivers/scsi/aic94xx/aic94xx_seq.c -@@ -1317,11 +1317,8 @@ int asd_init_seqs(struct asd_ha_struct * +Index: linux-3.10-3.10.11/drivers/scsi/aic94xx/aic94xx_seq.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/aic94xx/aic94xx_seq.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/aic94xx/aic94xx_seq.c 2014-04-28 00:32:48.000000000 +0000 +@@ -1317,11 +1317,8 @@ err = asd_request_firmware(asd_ha); @@ -1987,9 +2179,11 @@ err = asd_seq_download_seqs(asd_ha); if (err) { ---- a/drivers/scsi/bfa/bfad.c -+++ b/drivers/scsi/bfa/bfad.c -@@ -1803,7 +1803,6 @@ bfad_read_firmware(struct pci_dev *pdev, +Index: linux-3.10-3.10.11/drivers/scsi/bfa/bfad.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/bfa/bfad.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/bfa/bfad.c 2014-04-28 00:32:48.000000000 +0000 +@@ -1803,7 +1803,6 @@ const struct firmware *fw; if (request_firmware(&fw, fw_name, &pdev->dev)) { @@ -1997,9 +2191,11 @@ *bfi_image = NULL; goto out; } ---- a/drivers/scsi/ipr.c -+++ b/drivers/scsi/ipr.c -@@ -3907,10 +3907,8 @@ static ssize_t ipr_store_update_fw(struc +Index: linux-3.10-3.10.11/drivers/scsi/ipr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/ipr.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/ipr.c 2014-04-28 00:32:48.000000000 +0000 +@@ -3907,10 +3907,8 @@ len = snprintf(fname, 99, "%s", buf); fname[len-1] = '\0'; @@ -2011,9 +2207,11 @@ image_hdr = (struct ipr_ucode_image_header *)fw_entry->data; ---- a/drivers/scsi/pm8001/pm8001_ctl.c -+++ b/drivers/scsi/pm8001/pm8001_ctl.c -@@ -542,9 +542,6 @@ static ssize_t pm8001_store_update_fw(st +Index: linux-3.10-3.10.11/drivers/scsi/pm8001/pm8001_ctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/pm8001/pm8001_ctl.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/pm8001/pm8001_ctl.c 2014-04-28 00:32:48.000000000 +0000 +@@ -542,9 +542,6 @@ pm8001_ha->dev); if (err) { @@ -2023,9 +2221,11 @@ err = FAIL_OPEN_BIOS_FILE; goto out1; } ---- a/drivers/scsi/qla1280.c -+++ b/drivers/scsi/qla1280.c -@@ -1560,8 +1560,6 @@ qla1280_request_firmware(struct scsi_qla +Index: linux-3.10-3.10.11/drivers/scsi/qla1280.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/qla1280.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/qla1280.c 2014-04-28 00:32:48.000000000 +0000 +@@ -1560,8 +1560,6 @@ err = request_firmware(&fw, fwname, &ha->pdev->dev); if (err) { @@ -2034,9 +2234,11 @@ fw = ERR_PTR(err); goto unlock; } ---- a/drivers/scsi/qla2xxx/qla_init.c -+++ b/drivers/scsi/qla2xxx/qla_init.c -@@ -5134,8 +5134,6 @@ qla2x00_load_risc(scsi_qla_host_t *vha, +Index: linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_init.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/qla2xxx/qla_init.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_init.c 2014-04-28 00:32:48.000000000 +0000 +@@ -5134,8 +5134,6 @@ /* Load firmware blob. */ blob = qla2x00_request_firmware(vha); if (!blob) { @@ -2045,7 +2247,7 @@ ql_log(ql_log_info, vha, 0x0084, "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); return QLA_FUNCTION_FAILED; -@@ -5236,8 +5234,6 @@ qla24xx_load_risc_blob(scsi_qla_host_t * +@@ -5236,8 +5234,6 @@ /* Load firmware blob. */ blob = qla2x00_request_firmware(vha); if (!blob) { @@ -2054,9 +2256,11 @@ ql_log(ql_log_warn, vha, 0x0091, "Firmware images can be retrieved from: " QLA_FW_URL ".\n"); ---- a/drivers/scsi/qla2xxx/qla_nx.c -+++ b/drivers/scsi/qla2xxx/qla_nx.c -@@ -2447,11 +2447,8 @@ try_blob_fw: +Index: linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_nx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/qla2xxx/qla_nx.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_nx.c 2014-04-28 00:32:48.000000000 +0000 +@@ -2441,11 +2441,8 @@ /* Load firmware blob. */ blob = ha->hablob = qla2x00_request_firmware(vha); @@ -2069,9 +2273,11 @@ /* Validating firmware blob */ if (qla82xx_validate_firmware_blob(vha, ---- a/drivers/scsi/qla2xxx/qla_os.c -+++ b/drivers/scsi/qla2xxx/qla_os.c -@@ -5204,8 +5204,6 @@ qla2x00_request_firmware(scsi_qla_host_t +Index: linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_os.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/qla2xxx/qla_os.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/qla2xxx/qla_os.c 2014-04-28 00:32:48.000000000 +0000 +@@ -5204,8 +5204,6 @@ goto out; if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { @@ -2080,9 +2286,11 @@ blob->fw = NULL; blob = NULL; goto out; ---- a/drivers/scsi/qlogicpti.c -+++ b/drivers/scsi/qlogicpti.c -@@ -475,11 +475,8 @@ static int qlogicpti_load_firmware(struc +Index: linux-3.10-3.10.11/drivers/scsi/qlogicpti.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/qlogicpti.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/qlogicpti.c 2014-04-28 00:32:48.000000000 +0000 +@@ -475,11 +475,8 @@ int i, timeout; err = request_firmware(&fw, fwname, &qpti->op->dev); @@ -2095,9 +2303,11 @@ if (fw->size % 2) { printk(KERN_ERR "Bogus length %zu in image \"%s\"\n", fw->size, fwname); ---- a/drivers/staging/comedi/drivers/usbdux.c -+++ b/drivers/staging/comedi/drivers/usbdux.c -@@ -2376,11 +2376,8 @@ static void usbdux_firmware_request_comp +Index: linux-3.10-3.10.11/drivers/staging/comedi/drivers/usbdux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/comedi/drivers/usbdux.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/comedi/drivers/usbdux.c 2014-04-28 00:32:48.000000000 +0000 +@@ -2376,11 +2376,8 @@ struct usb_interface *uinterf = usbduxsub_tmp->interface; int ret; @@ -2110,9 +2320,11 @@ /* * we need to upload the firmware here because fw will be ---- a/drivers/staging/comedi/drivers/usbduxsigma.c -+++ b/drivers/staging/comedi/drivers/usbduxsigma.c -@@ -2358,11 +2358,8 @@ static void usbdux_firmware_request_comp +Index: linux-3.10-3.10.11/drivers/staging/comedi/drivers/usbduxsigma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/comedi/drivers/usbduxsigma.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/comedi/drivers/usbduxsigma.c 2014-04-28 00:32:48.000000000 +0000 +@@ -2358,11 +2358,8 @@ struct usb_interface *uinterf = usbduxsub_tmp->interface; int ret; @@ -2125,9 +2337,11 @@ /* * we need to upload the firmware here because fw will be ---- a/drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c -+++ b/drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c -@@ -2203,16 +2203,12 @@ struct net_device *init_ft1000_card(stru +Index: linux-3.10-3.10.11/drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/ft1000/ft1000-pcmcia/ft1000_hw.c 2014-04-28 00:32:48.000000000 +0000 +@@ -2203,16 +2203,12 @@ info->AsicID = ft1000_read_reg(dev, FT1000_REG_ASIC_ID); if (info->AsicID == ELECTRABUZZ_ID) { DEBUG(0, "ft1000_hw: ELECTRABUZZ ASIC\n"); @@ -2146,9 +2360,11 @@ } ft1000_enable_interrupts(dev); ---- a/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c -+++ b/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c -@@ -134,10 +134,8 @@ static int ft1000_probe(struct usb_inter +Index: linux-3.10-3.10.11/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/ft1000/ft1000-usb/ft1000_usb.c 2014-04-28 00:32:48.000000000 +0000 +@@ -134,10 +134,8 @@ ft1000dev->bulk_out_endpointAddr); ret = request_firmware(&dsp_fw, "ft3000.img", &dev->dev); @@ -2160,9 +2376,11 @@ size = max_t(uint, dsp_fw->size, 4096); pFileStart = kmalloc(size, GFP_KERNEL); ---- a/drivers/staging/media/as102/as102_fw.c -+++ b/drivers/staging/media/as102/as102_fw.c -@@ -190,11 +190,8 @@ int as102_fw_upload(struct as10x_bus_ada +Index: linux-3.10-3.10.11/drivers/staging/media/as102/as102_fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/as102/as102_fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/as102/as102_fw.c 2014-04-28 00:32:48.000000000 +0000 +@@ -190,11 +190,8 @@ /* request kernel to locate firmware file: part1 */ errno = request_firmware(&firmware, fw1, &dev->dev); @@ -2175,7 +2393,7 @@ /* initiate firmware upload */ errno = as102_firmware_upload(bus_adap, cmd_buf, firmware); -@@ -213,11 +210,8 @@ int as102_fw_upload(struct as10x_bus_ada +@@ -213,11 +210,8 @@ /* request kernel to locate firmware file: part2 */ errno = request_firmware(&firmware, fw2, &dev->dev); @@ -2188,9 +2406,11 @@ /* initiate firmware upload */ errno = as102_firmware_upload(bus_adap, cmd_buf, firmware); ---- a/drivers/staging/media/go7007/go7007-driver.c -+++ b/drivers/staging/media/go7007/go7007-driver.c -@@ -96,10 +96,8 @@ static int go7007_load_encoder(struct go +Index: linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/go7007/go7007-driver.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-driver.c 2014-04-28 00:32:48.000000000 +0000 +@@ -96,10 +96,8 @@ u16 intr_val, intr_data; if (go->boot_fw == NULL) { @@ -2202,9 +2422,11 @@ if (fw_entry->size < 16 || memcmp(fw_entry->data, "WISGO7007FW", 11)) { v4l2_err(go, "file \"%s\" does not appear to be go7007 firmware\n", fw_name); release_firmware(fw_entry); ---- a/drivers/staging/media/go7007/go7007-fw.c -+++ b/drivers/staging/media/go7007/go7007-fw.c -@@ -1570,12 +1570,8 @@ int go7007_construct_fw_image(struct go7 +Index: linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-fw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/go7007/go7007-fw.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-fw.c 2014-04-28 00:32:48.000000000 +0000 +@@ -1570,12 +1570,8 @@ default: return -1; } @@ -2218,9 +2440,11 @@ code = kzalloc(codespace * 2, GFP_KERNEL); if (code == NULL) goto fw_failed; ---- a/drivers/staging/media/go7007/go7007-loader.c -+++ b/drivers/staging/media/go7007/go7007-loader.c -@@ -80,11 +80,8 @@ static int go7007_loader_probe(struct us +Index: linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-loader.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/go7007/go7007-loader.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/go7007/go7007-loader.c 2014-04-28 00:32:48.000000000 +0000 +@@ -80,11 +80,8 @@ dev_info(&interface->dev, "loading firmware %s\n", fw1); @@ -2233,7 +2457,7 @@ ret = cypress_load_firmware(usbdev, fw, CYPRESS_FX2); release_firmware(fw); if (0 != ret) { -@@ -95,11 +92,8 @@ static int go7007_loader_probe(struct us +@@ -95,11 +92,8 @@ if (fw2 == NULL) return 0; @@ -2246,9 +2470,11 @@ ret = cypress_load_firmware(usbdev, fw, CYPRESS_FX2); release_firmware(fw); if (0 != ret) { ---- a/drivers/staging/media/lirc/lirc_zilog.c -+++ b/drivers/staging/media/lirc/lirc_zilog.c -@@ -764,8 +764,6 @@ static int fw_load(struct IR_tx *tx) +Index: linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_zilog.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/lirc/lirc_zilog.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_zilog.c 2014-04-28 00:32:48.000000000 +0000 +@@ -764,8 +764,6 @@ /* Request codeset data file */ ret = request_firmware(&fw_entry, "haup-ir-blaster.bin", tx->ir->l.dev); if (ret != 0) { @@ -2257,9 +2483,11 @@ ret = ret < 0 ? ret : -EFAULT; goto out; } ---- a/drivers/staging/rtl8192u/r819xU_firmware.c -+++ b/drivers/staging/rtl8192u/r819xU_firmware.c -@@ -284,10 +284,8 @@ bool init_firmware(struct net_device *de +Index: linux-3.10-3.10.11/drivers/staging/rtl8192u/r819xU_firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/rtl8192u/r819xU_firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/rtl8192u/r819xU_firmware.c 2014-04-28 00:32:48.000000000 +0000 +@@ -284,10 +284,8 @@ */ if(rst_opt == OPT_SYSTEM_RESET) { rc = request_firmware(&fw_entry, fw_name[init_step],&priv->udev->dev); @@ -2271,9 +2499,11 @@ if(fw_entry->size > sizeof(pfirmware->firmware_buf)) { RT_TRACE(COMP_ERR, "img file size exceed the container buffer fail!\n"); ---- a/drivers/staging/rtl8712/hal_init.c -+++ b/drivers/staging/rtl8712/hal_init.c -@@ -49,7 +49,6 @@ static void rtl871x_load_fw_cb(const str +Index: linux-3.10-3.10.11/drivers/staging/rtl8712/hal_init.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/rtl8712/hal_init.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/rtl8712/hal_init.c 2014-04-28 00:32:48.000000000 +0000 +@@ -49,7 +49,6 @@ if (!firmware) { struct usb_device *udev = padapter->dvobjpriv.pusbdev; struct usb_interface *pusb_intf = padapter->pusb_intf; @@ -2281,9 +2511,11 @@ padapter->fw_found = false; usb_put_dev(udev); usb_set_intfdata(pusb_intf, NULL); ---- a/drivers/staging/slicoss/slicoss.c -+++ b/drivers/staging/slicoss/slicoss.c -@@ -424,11 +424,8 @@ static int slic_card_download_gbrcv(stru +Index: linux-3.10-3.10.11/drivers/staging/slicoss/slicoss.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/slicoss/slicoss.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/slicoss/slicoss.c 2014-04-28 00:32:49.000000000 +0000 +@@ -424,11 +424,8 @@ } ret = request_firmware(&fw, file, &adapter->pcidev->dev); @@ -2296,7 +2528,7 @@ rcvucodelen = *(u32 *)(fw->data + index); index += 4; -@@ -502,11 +499,8 @@ static int slic_card_download(struct ada +@@ -502,11 +499,8 @@ return -ENOENT; } ret = request_firmware(&fw, file, &adapter->pcidev->dev); @@ -2309,9 +2541,11 @@ numsects = *(u32 *)(fw->data + index); index += 4; for (i = 0; i < numsects; i++) { ---- a/drivers/staging/vt6656/firmware.c -+++ b/drivers/staging/vt6656/firmware.c -@@ -57,11 +57,8 @@ int FIRMWAREbDownload(struct vnt_private +Index: linux-3.10-3.10.11/drivers/staging/vt6656/firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/vt6656/firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/vt6656/firmware.c 2014-04-28 00:32:49.000000000 +0000 +@@ -57,11 +57,8 @@ spin_unlock_irq(&pDevice->lock); rc = request_firmware(&fw, FIRMWARE_NAME, dev); @@ -2325,9 +2559,11 @@ pBuffer = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL); if (!pBuffer) ---- a/drivers/tty/cyclades.c -+++ b/drivers/tty/cyclades.c -@@ -3520,10 +3520,8 @@ static int cyz_load_fw(struct pci_dev *p +Index: linux-3.10-3.10.11/drivers/tty/cyclades.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/cyclades.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/cyclades.c 2014-04-28 00:32:49.000000000 +0000 +@@ -3520,10 +3520,8 @@ int retval; retval = request_firmware(&fw, "cyzfirm.bin", &pdev->dev); @@ -2339,9 +2575,11 @@ /* Check whether the firmware is already loaded and running. If positive, skip this board */ ---- a/drivers/tty/moxa.c -+++ b/drivers/tty/moxa.c -@@ -867,13 +867,8 @@ static int moxa_init_board(struct moxa_b +Index: linux-3.10-3.10.11/drivers/tty/moxa.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/moxa.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/moxa.c 2014-04-28 00:32:49.000000000 +0000 +@@ -867,13 +867,8 @@ } ret = request_firmware(&fw, file, dev); @@ -2356,9 +2594,11 @@ ret = moxa_load_fw(brd, fw); ---- a/drivers/tty/serial/icom.c -+++ b/drivers/tty/serial/icom.c -@@ -373,7 +373,6 @@ static void load_code(struct icom_port * +Index: linux-3.10-3.10.11/drivers/tty/serial/icom.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/icom.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/icom.c 2014-04-28 00:32:49.000000000 +0000 +@@ -373,7 +373,6 @@ /* Load Call Setup into Adapter */ if (request_firmware(&fw, "icom_call_setup.bin", &dev->dev) < 0) { @@ -2366,7 +2606,7 @@ status = -1; goto load_code_exit; } -@@ -393,7 +392,6 @@ static void load_code(struct icom_port * +@@ -393,7 +392,6 @@ /* Load Resident DCE portion of Adapter */ if (request_firmware(&fw, "icom_res_dce.bin", &dev->dev) < 0) { @@ -2374,7 +2614,7 @@ status = -1; goto load_code_exit; } -@@ -438,7 +436,6 @@ static void load_code(struct icom_port * +@@ -438,7 +436,6 @@ } if (request_firmware(&fw, "icom_asc.bin", &dev->dev) < 0) { @@ -2382,9 +2622,11 @@ status = -1; goto load_code_exit; } ---- a/drivers/tty/serial/ucc_uart.c -+++ b/drivers/tty/serial/ucc_uart.c -@@ -1176,10 +1176,8 @@ static void uart_firmware_cont(const str +Index: linux-3.10-3.10.11/drivers/tty/serial/ucc_uart.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/ucc_uart.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/ucc_uart.c 2014-04-28 00:32:49.000000000 +0000 +@@ -1176,10 +1176,8 @@ struct device *dev = context; int ret; @@ -2396,9 +2638,11 @@ firmware = (struct qe_firmware *) fw->data; ---- a/drivers/usb/atm/cxacru.c -+++ b/drivers/usb/atm/cxacru.c -@@ -1082,8 +1082,6 @@ static int cxacru_find_firmware(struct c +Index: linux-3.10-3.10.11/drivers/usb/atm/cxacru.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/atm/cxacru.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/atm/cxacru.c 2014-04-28 00:32:49.000000000 +0000 +@@ -1082,8 +1082,6 @@ return -ENOENT; } @@ -2407,9 +2651,11 @@ return 0; } ---- a/drivers/usb/atm/ueagle-atm.c -+++ b/drivers/usb/atm/ueagle-atm.c -@@ -650,10 +650,8 @@ static void uea_upload_pre_firmware(cons +Index: linux-3.10-3.10.11/drivers/usb/atm/ueagle-atm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/atm/ueagle-atm.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/atm/ueagle-atm.c 2014-04-28 00:32:49.000000000 +0000 +@@ -650,10 +650,8 @@ int ret, size; uea_enters(usb); @@ -2421,7 +2667,7 @@ pfw = fw_entry->data; size = fw_entry->size; -@@ -748,10 +746,6 @@ static int uea_load_firmware(struct usb_ +@@ -748,10 +746,6 @@ ret = request_firmware_nowait(THIS_MODULE, 1, fw_name, &usb->dev, GFP_KERNEL, usb, uea_upload_pre_firmware); @@ -2432,7 +2678,7 @@ uea_leaves(usb); return ret; -@@ -913,12 +907,8 @@ static int request_dsp(struct uea_softc +@@ -913,12 +907,8 @@ } ret = request_firmware(&sc->dsp_firm, dsp_name, &sc->usb_dev->dev); @@ -2446,7 +2692,7 @@ if (UEA_CHIP_VERSION(sc) == EAGLE_IV) ret = check_dsp_e4(sc->dsp_firm->data, sc->dsp_firm->size); -@@ -1631,12 +1621,8 @@ static int request_cmvs_old(struct uea_s +@@ -1631,12 +1621,8 @@ cmvs_file_name(sc, cmv_name, 1); ret = request_firmware(fw, cmv_name, &sc->usb_dev->dev); @@ -2460,7 +2706,7 @@ data = (u8 *) (*fw)->data; size = (*fw)->size; -@@ -1673,9 +1659,6 @@ static int request_cmvs(struct uea_softc +@@ -1673,9 +1659,6 @@ "try to get older cmvs\n", cmv_name); return request_cmvs_old(sc, cmvs, fw); } @@ -2470,7 +2716,7 @@ return ret; } -@@ -1958,11 +1941,8 @@ static int load_XILINX_firmware(struct u +@@ -1958,11 +1941,8 @@ uea_enters(INS_TO_USBDEV(sc)); ret = request_firmware(&fw_entry, fw_name, &sc->usb_dev->dev); @@ -2483,9 +2729,11 @@ pfw = fw_entry->data; size = fw_entry->size; ---- a/drivers/usb/misc/emi26.c -+++ b/drivers/usb/misc/emi26.c -@@ -89,21 +89,17 @@ static int emi26_load_firmware (struct u +Index: linux-3.10-3.10.11/drivers/usb/misc/emi26.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/misc/emi26.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/misc/emi26.c 2014-04-28 00:32:49.000000000 +0000 +@@ -89,21 +89,17 @@ err = request_ihex_firmware(&loader_fw, "emi26/loader.fw", &dev->dev); if (err) @@ -2510,9 +2758,11 @@ /* Assert reset (stop the CPU in the EMI) */ err = emi26_set_reset(dev,1); ---- a/drivers/usb/misc/ezusb.c -+++ b/drivers/usb/misc/ezusb.c -@@ -80,12 +80,8 @@ static int ezusb_ihex_firmware_download( +Index: linux-3.10-3.10.11/drivers/usb/misc/ezusb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/misc/ezusb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/misc/ezusb.c 2014-04-28 00:32:49.000000000 +0000 +@@ -80,12 +80,8 @@ const struct ihex_binrec *record; if (request_ihex_firmware(&firmware, firmware_path, @@ -2526,9 +2776,11 @@ ret = ezusb_set_reset(dev, fx.cpucs_reg, 0); if (ret < 0) ---- a/drivers/usb/misc/isight_firmware.c -+++ b/drivers/usb/misc/isight_firmware.c -@@ -48,7 +48,6 @@ static int isight_firmware_load(struct u +Index: linux-3.10-3.10.11/drivers/usb/misc/isight_firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/misc/isight_firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/misc/isight_firmware.c 2014-04-28 00:32:49.000000000 +0000 +@@ -48,7 +48,6 @@ return -ENOMEM; if (request_firmware(&firmware, "isight.fw", &dev->dev) != 0) { @@ -2536,9 +2788,11 @@ ret = -ENODEV; goto out; } ---- a/drivers/usb/serial/io_edgeport.c -+++ b/drivers/usb/serial/io_edgeport.c -@@ -302,11 +302,8 @@ static void update_edgeport_E2PROM(struc +Index: linux-3.10-3.10.11/drivers/usb/serial/io_edgeport.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/io_edgeport.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/io_edgeport.c 2014-04-28 00:32:49.000000000 +0000 +@@ -302,11 +302,8 @@ response = request_ihex_firmware(&fw, fw_name, &edge_serial->serial->dev->dev); @@ -2551,9 +2805,11 @@ rec = (const struct ihex_binrec *)fw->data; BootMajorVersion = rec->data[0]; ---- a/drivers/usb/serial/io_ti.c -+++ b/drivers/usb/serial/io_ti.c -@@ -782,8 +782,6 @@ static int build_i2c_fw_hdr(__u8 *header +Index: linux-3.10-3.10.11/drivers/usb/serial/io_ti.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/io_ti.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/io_ti.c 2014-04-28 00:32:49.000000000 +0000 +@@ -782,8 +782,6 @@ err = request_firmware(&fw, fw_name, dev); if (err) { @@ -2562,7 +2818,7 @@ kfree(buffer); return err; } -@@ -1341,8 +1339,6 @@ static int download_fw(struct edgeport_s +@@ -1341,8 +1339,6 @@ err = request_firmware(&fw, fw_name, dev); if (err) { @@ -2571,9 +2827,11 @@ kfree(buffer); return err; } ---- a/drivers/usb/serial/ti_usb_3410_5052.c -+++ b/drivers/usb/serial/ti_usb_3410_5052.c -@@ -1571,10 +1571,8 @@ static int ti_download_firmware(struct t +Index: linux-3.10-3.10.11/drivers/usb/serial/ti_usb_3410_5052.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/ti_usb_3410_5052.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/ti_usb_3410_5052.c 2014-04-28 00:32:49.000000000 +0000 +@@ -1572,10 +1572,8 @@ } status = request_firmware(&fw_p, buf, &dev->dev); } @@ -2585,9 +2843,11 @@ if (fw_p->size > TI_FIRMWARE_BUF_SIZE) { dev_err(&dev->dev, "%s - firmware too large %zu\n", __func__, fw_p->size); release_firmware(fw_p); ---- a/drivers/video/broadsheetfb.c -+++ b/drivers/video/broadsheetfb.c -@@ -741,10 +741,8 @@ static ssize_t broadsheet_loadstore_wave +Index: linux-3.10-3.10.11/drivers/video/broadsheetfb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/broadsheetfb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/broadsheetfb.c 2014-04-28 00:32:49.000000000 +0000 +@@ -741,10 +741,8 @@ return -EINVAL; err = request_firmware(&fw_entry, "broadsheet.wbf", dev); @@ -2599,9 +2859,11 @@ /* try to enforce reasonable min max on waveform */ if ((fw_entry->size < 8*1024) || (fw_entry->size > 64*1024)) { ---- a/drivers/video/metronomefb.c -+++ b/drivers/video/metronomefb.c -@@ -677,10 +677,8 @@ static int metronomefb_probe(struct plat +Index: linux-3.10-3.10.11/drivers/video/metronomefb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/metronomefb.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/metronomefb.c 2014-04-28 00:32:49.000000000 +0000 +@@ -677,10 +677,8 @@ a) request the waveform file from userspace b) process waveform and decode into metromem */ retval = request_firmware(&fw_entry, "metronome.wbf", &dev->dev); @@ -2613,9 +2875,11 @@ retval = load_waveform((u8 *) fw_entry->data, fw_entry->size, 3, 31, par); ---- a/sound/drivers/vx/vx_hwdep.c -+++ b/sound/drivers/vx/vx_hwdep.c -@@ -71,10 +71,8 @@ int snd_vx_setup_firmware(struct vx_core +Index: linux-3.10-3.10.11/sound/drivers/vx/vx_hwdep.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/drivers/vx/vx_hwdep.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/drivers/vx/vx_hwdep.c 2014-04-28 00:32:50.000000000 +0000 +@@ -71,10 +71,8 @@ if (! fw_files[chip->type][i]) continue; sprintf(path, "vx/%s", fw_files[chip->type][i]); @@ -2627,9 +2891,11 @@ err = chip->ops->load_dsp(chip, i, fw); if (err < 0) { release_firmware(fw); ---- a/sound/isa/msnd/msnd_pinnacle.c -+++ b/sound/isa/msnd/msnd_pinnacle.c -@@ -387,15 +387,11 @@ static int upload_dsp_code(struct snd_ca +Index: linux-3.10-3.10.11/sound/isa/msnd/msnd_pinnacle.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/isa/msnd/msnd_pinnacle.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/isa/msnd/msnd_pinnacle.c 2014-04-28 00:32:50.000000000 +0000 +@@ -387,15 +387,11 @@ outb(HPBLKSEL_0, chip->io + HP_BLKS); err = request_firmware(&init_fw, INITCODEFILE, card->dev); @@ -2647,9 +2913,11 @@ memcpy_toio(chip->mappedbase, perm_fw->data, perm_fw->size); if (snd_msnd_upload_host(chip, init_fw->data, init_fw->size) < 0) { ---- a/sound/isa/sscape.c -+++ b/sound/isa/sscape.c -@@ -543,10 +543,8 @@ static int sscape_upload_bootblock(struc +Index: linux-3.10-3.10.11/sound/isa/sscape.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/isa/sscape.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/isa/sscape.c 2014-04-28 00:32:50.000000000 +0000 +@@ -543,10 +543,8 @@ int ret; ret = request_firmware(&init_fw, "scope.cod", card->dev); @@ -2661,7 +2929,7 @@ ret = upload_dma_data(sscape, init_fw->data, init_fw->size); release_firmware(init_fw); -@@ -583,11 +581,8 @@ static int sscape_upload_microcode(struc +@@ -583,11 +581,8 @@ snprintf(name, sizeof(name), "sndscape.co%d", version); err = request_firmware(&init_fw, name, card->dev); @@ -2674,9 +2942,11 @@ err = upload_dma_data(sscape, init_fw->data, init_fw->size); if (err == 0) snd_printk(KERN_INFO "sscape: MIDI firmware loaded %d KBs\n", ---- a/sound/isa/wavefront/wavefront_synth.c -+++ b/sound/isa/wavefront/wavefront_synth.c -@@ -1947,10 +1947,8 @@ wavefront_download_firmware (snd_wavefro +Index: linux-3.10-3.10.11/sound/isa/wavefront/wavefront_synth.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/isa/wavefront/wavefront_synth.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/isa/wavefront/wavefront_synth.c 2014-04-28 00:32:50.000000000 +0000 +@@ -1947,10 +1947,8 @@ const struct firmware *firmware; err = request_firmware(&firmware, path, dev->card->dev); @@ -2688,9 +2958,11 @@ len = 0; buf = firmware->data; ---- a/sound/pci/asihpi/hpidspcd.c -+++ b/sound/pci/asihpi/hpidspcd.c -@@ -49,8 +49,6 @@ short hpi_dsp_code_open(u32 adapter, voi +Index: linux-3.10-3.10.11/sound/pci/asihpi/hpidspcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/asihpi/hpidspcd.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/asihpi/hpidspcd.c 2014-04-28 00:32:50.000000000 +0000 +@@ -49,8 +49,6 @@ err = request_firmware(&firmware, fw_name, &dev->dev); if (err || !firmware) { @@ -2699,9 +2971,11 @@ goto error1; } if (firmware->size < sizeof(header)) { ---- a/sound/pci/cs46xx/cs46xx_lib.c -+++ b/sound/pci/cs46xx/cs46xx_lib.c -@@ -411,10 +411,8 @@ static int snd_cs46xx_download_image(str +Index: linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/cs46xx/cs46xx_lib.c 2014-04-28 00:32:38.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.c 2014-04-28 00:32:50.000000000 +0000 +@@ -411,10 +411,8 @@ err = request_firmware(&firmware, "cs46xx/cs46xx-old.fw", &chip->pci->dev); @@ -2713,9 +2987,11 @@ err = snd_cs46xx_check_image_size(firmware); if (err < 0) ---- a/sound/pci/echoaudio/echoaudio.c -+++ b/sound/pci/echoaudio/echoaudio.c -@@ -57,10 +57,8 @@ static int get_firmware(const struct fir +Index: linux-3.10-3.10.11/sound/pci/echoaudio/echoaudio.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/echoaudio/echoaudio.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/echoaudio/echoaudio.c 2014-04-28 00:32:50.000000000 +0000 +@@ -57,10 +57,8 @@ DE_ACT(("firmware requested: %s\n", card_fw[fw_index].data)); snprintf(name, sizeof(name), "ea/%s", card_fw[fw_index].data); err = request_firmware(fw_entry, name, pci_device(chip)); @@ -2727,9 +3003,11 @@ chip->fw_cache[fw_index] = *fw_entry; #endif return err; ---- a/sound/pci/emu10k1/emu10k1_main.c -+++ b/sound/pci/emu10k1/emu10k1_main.c -@@ -879,10 +879,8 @@ static int snd_emu10k1_emu1010_init(stru +Index: linux-3.10-3.10.11/sound/pci/emu10k1/emu10k1_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/emu10k1/emu10k1_main.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/emu10k1/emu10k1_main.c 2014-04-28 00:32:50.000000000 +0000 +@@ -879,10 +879,8 @@ } err = request_firmware(&emu->firmware, filename, &emu->pci->dev); @@ -2741,9 +3019,11 @@ snd_printk(KERN_INFO "emu1010: firmware file = %s, size = 0x%zx\n", filename, emu->firmware->size); } ---- a/sound/pci/hda/hda_intel.c -+++ b/sound/pci/hda/hda_intel.c -@@ -3664,11 +3664,8 @@ static void azx_firmware_cb(const struct +Index: linux-3.10-3.10.11/sound/pci/hda/hda_intel.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/hda_intel.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/hda_intel.c 2014-04-28 00:32:50.000000000 +0000 +@@ -3664,11 +3664,8 @@ struct azx *chip = card->private_data; struct pci_dev *pci = chip->pci; @@ -2756,9 +3036,11 @@ chip->fw = fw; if (!chip->disabled) { ---- a/sound/pci/korg1212/korg1212.c -+++ b/sound/pci/korg1212/korg1212.c -@@ -2346,7 +2346,6 @@ static int snd_korg1212_create(struct sn +Index: linux-3.10-3.10.11/sound/pci/korg1212/korg1212.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/korg1212/korg1212.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/korg1212/korg1212.c 2014-04-28 00:32:50.000000000 +0000 +@@ -2346,7 +2346,6 @@ err = request_firmware(&dsp_code, "korg/k1212.dsp", &pci->dev); if (err < 0) { release_firmware(dsp_code); @@ -2766,9 +3048,11 @@ snd_korg1212_free(korg1212); return err; } ---- a/sound/pci/mixart/mixart_hwdep.c -+++ b/sound/pci/mixart/mixart_hwdep.c -@@ -558,10 +558,8 @@ int snd_mixart_setup_firmware(struct mix +Index: linux-3.10-3.10.11/sound/pci/mixart/mixart_hwdep.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/mixart/mixart_hwdep.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/mixart/mixart_hwdep.c 2014-04-28 00:32:50.000000000 +0000 +@@ -558,10 +558,8 @@ for (i = 0; i < 3; i++) { sprintf(path, "mixart/%s", fw_files[i]); @@ -2780,9 +3064,11 @@ /* fake hwdep dsp record */ err = mixart_dsp_load(mgr, i, fw_entry); release_firmware(fw_entry); ---- a/sound/pci/pcxhr/pcxhr_hwdep.c -+++ b/sound/pci/pcxhr/pcxhr_hwdep.c -@@ -381,11 +381,8 @@ int pcxhr_setup_firmware(struct pcxhr_mg +Index: linux-3.10-3.10.11/sound/pci/pcxhr/pcxhr_hwdep.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/pcxhr/pcxhr_hwdep.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/pcxhr/pcxhr_hwdep.c 2014-04-28 00:32:50.000000000 +0000 +@@ -381,11 +381,8 @@ if (!fw_files[fw_set][i]) continue; sprintf(path, "pcxhr/%s", fw_files[fw_set][i]); @@ -2795,9 +3081,11 @@ /* fake hwdep dsp record */ err = pcxhr_dsp_load(mgr, i, fw_entry); release_firmware(fw_entry); ---- a/sound/pci/riptide/riptide.c -+++ b/sound/pci/riptide/riptide.c -@@ -1245,11 +1245,8 @@ static int try_to_load_firmware(struct c +Index: linux-3.10-3.10.11/sound/pci/riptide/riptide.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/riptide/riptide.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/riptide/riptide.c 2014-04-28 00:32:50.000000000 +0000 +@@ -1245,11 +1245,8 @@ if (!chip->fw_entry) { err = request_firmware(&chip->fw_entry, "riptide.hex", &chip->pci->dev); @@ -2810,9 +3098,11 @@ } err = loadfirmware(cif, chip->fw_entry->data, chip->fw_entry->size); if (err) { ---- a/sound/pci/rme9652/hdsp.c -+++ b/sound/pci/rme9652/hdsp.c -@@ -5150,10 +5150,8 @@ static int hdsp_request_fw_loader(struct +Index: linux-3.10-3.10.11/sound/pci/rme9652/hdsp.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/rme9652/hdsp.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/rme9652/hdsp.c 2014-04-28 00:32:50.000000000 +0000 +@@ -5150,10 +5150,8 @@ return -EINVAL; } @@ -2824,9 +3114,11 @@ if (fw->size < HDSP_FIRMWARE_SIZE) { snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n", (int)fw->size, HDSP_FIRMWARE_SIZE); ---- a/sound/soc/codecs/wm2000.c -+++ b/sound/soc/codecs/wm2000.c -@@ -888,10 +888,8 @@ static int wm2000_i2c_probe(struct i2c_c +Index: linux-3.10-3.10.11/sound/soc/codecs/wm2000.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/wm2000.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/wm2000.c 2014-04-28 00:32:50.000000000 +0000 +@@ -888,10 +888,8 @@ } ret = request_firmware(&fw, filename, &i2c->dev); @@ -2838,9 +3130,11 @@ /* Pre-cook the concatenation of the register address onto the image */ wm2000->anc_download_size = fw->size + 2; ---- a/sound/usb/6fire/firmware.c -+++ b/sound/usb/6fire/firmware.c -@@ -219,8 +219,6 @@ static int usb6fire_fw_ezusb_upload( +Index: linux-3.10-3.10.11/sound/usb/6fire/firmware.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/usb/6fire/firmware.c 2014-04-27 23:40:55.000000000 +0000 ++++ linux-3.10-3.10.11/sound/usb/6fire/firmware.c 2014-04-28 00:32:50.000000000 +0000 +@@ -219,8 +219,6 @@ ret = request_firmware(&fw, fwname, &device->dev); if (ret < 0) { kfree(rec); @@ -2849,7 +3143,7 @@ return ret; } ret = usb6fire_fw_ihex_init(fw, rec); -@@ -292,8 +290,6 @@ static int usb6fire_fw_fpga_upload( +@@ -292,8 +290,6 @@ ret = request_firmware(&fw, fwname, &device->dev); if (ret < 0) { diff -Nru linux-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers-rtlwifi.patch linux-3.10-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers-rtlwifi.patch --- linux-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers-rtlwifi.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/firmware-remove-redundant-log-messages-from-drivers-rtlwifi.patch 2014-04-28 01:05:53.000000000 +0000 @@ -0,0 +1,24 @@ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtlwifi/core.c 2014-04-28 00:56:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/core.c 2014-04-28 01:05:52.000000000 +0000 +@@ -55,7 +55,6 @@ + if (!err) + goto found_alt; + } +- pr_err("Firmware %s not available\n", rtlpriv->cfg->fw_name); + rtlpriv->max_fw_size = 0; + return; + } +Index: linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/rtl8192se/sw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtlwifi/rtl8192se/sw.c 2014-04-27 23:28:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/rtl8192se/sw.c 2014-04-28 01:05:52.000000000 +0000 +@@ -97,7 +97,6 @@ + "Firmware callback routine entered!\n"); + complete(&rtlpriv->firmware_loading_complete); + if (!firmware) { +- pr_err("Firmware %s not available\n", rtlpriv->cfg->fw_name); + rtlpriv->max_fw_size = 0; + return; + } diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-check-for-NULL-field-when-setting-values.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-check-for-NULL-field-when-setting-values.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-check-for-NULL-field-when-setting-values.patch 2013-09-10 03:48:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-check-for-NULL-field-when-setting-values.patch 2013-12-23 04:40:19.000000000 +0000 @@ -12,9 +12,11 @@ drivers/hid/hid-core.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -1156,7 +1156,12 @@ EXPORT_SYMBOL_GPL(hid_output_report); +Index: linux-3.10.11.rpi/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-core.c 2013-12-23 04:40:14.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-core.c 2013-12-23 04:40:18.000000000 +0000 +@@ -1156,7 +1156,12 @@ int hid_set_field(struct hid_field *field, unsigned offset, __s32 value) { diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-ntrig-validate-feature-report-details.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-ntrig-validate-feature-report-details.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-ntrig-validate-feature-report-details.patch 2013-09-10 03:47:54.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-ntrig-validate-feature-report-details.patch 2013-12-23 04:40:16.000000000 +0000 @@ -21,11 +21,11 @@ drivers/hid/hid-ntrig.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -diff --git a/drivers/hid/hid-ntrig.c b/drivers/hid/hid-ntrig.c -index 98d1fdf..600f207 100644 ---- a/drivers/hid/hid-ntrig.c -+++ b/drivers/hid/hid-ntrig.c -@@ -115,7 +115,8 @@ static inline int ntrig_get_mode(struct hid_device *hdev) +Index: linux-3.10.11.rpi/drivers/hid/hid-ntrig.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-ntrig.c 2013-12-23 01:36:07.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-ntrig.c 2013-12-23 04:40:16.000000000 +0000 +@@ -115,7 +115,8 @@ struct hid_report *report = hdev->report_enum[HID_FEATURE_REPORT]. report_id_hash[0x0d]; diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-pantherlord-validate-output-report-details.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-pantherlord-validate-output-report-details.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-pantherlord-validate-output-report-details.patch 2013-09-10 03:47:54.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-pantherlord-validate-output-report-details.patch 2013-12-23 04:40:16.000000000 +0000 @@ -20,11 +20,11 @@ drivers/hid/hid-pl.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) -diff --git a/drivers/hid/hid-pl.c b/drivers/hid/hid-pl.c -index d29112f..2dcd7d9 100644 ---- a/drivers/hid/hid-pl.c -+++ b/drivers/hid/hid-pl.c -@@ -132,8 +132,14 @@ static int plff_init(struct hid_device *hid) +Index: linux-3.10.11.rpi/drivers/hid/hid-pl.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-pl.c 2013-12-23 01:36:08.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-pl.c 2013-12-23 04:40:15.000000000 +0000 +@@ -132,8 +132,14 @@ strong = &report->field[0]->value[2]; weak = &report->field[0]->value[3]; debug("detected single-field device"); diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-picolcd_core-validate-output-report-details.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-picolcd_core-validate-output-report-details.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-picolcd_core-validate-output-report-details.patch 2013-09-10 03:47:54.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-picolcd_core-validate-output-report-details.patch 2013-12-23 04:40:18.000000000 +0000 @@ -30,11 +30,11 @@ drivers/hid/hid-picolcd_core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/drivers/hid/hid-picolcd_core.c b/drivers/hid/hid-picolcd_core.c -index b48092d..acbb0210 100644 ---- a/drivers/hid/hid-picolcd_core.c -+++ b/drivers/hid/hid-picolcd_core.c -@@ -290,7 +290,7 @@ static ssize_t picolcd_operation_mode_store(struct device *dev, +Index: linux-3.10.11.rpi/drivers/hid/hid-picolcd_core.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-picolcd_core.c 2013-12-23 01:36:07.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-picolcd_core.c 2013-12-23 04:40:17.000000000 +0000 +@@ -290,7 +290,7 @@ buf += 10; cnt -= 10; } diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-sensor-hub-validate-feature-report-details.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-sensor-hub-validate-feature-report-details.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-sensor-hub-validate-feature-report-details.patch 2013-09-10 03:47:54.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-sensor-hub-validate-feature-report-details.patch 2013-12-23 04:40:17.000000000 +0000 @@ -17,11 +17,11 @@ drivers/hid/hid-sensor-hub.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c -index ffc80cf..6fca30e 100644 ---- a/drivers/hid/hid-sensor-hub.c -+++ b/drivers/hid/hid-sensor-hub.c -@@ -221,7 +221,8 @@ int sensor_hub_get_feature(struct hid_sensor_hub_device *hsdev, u32 report_id, +Index: linux-3.10.11.rpi/drivers/hid/hid-sensor-hub.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-sensor-hub.c 2013-12-23 02:26:47.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-sensor-hub.c 2013-12-23 04:40:17.000000000 +0000 +@@ -221,7 +221,8 @@ mutex_lock(&data->mutex); report = sensor_hub_report(report_id, hsdev->hdev, HID_FEATURE_REPORT); diff -Nru linux-3.10.11/debian/patches/bugfix/all/HID-validate-HID-report-id-size.patch linux-3.10-3.10.11/debian/patches/bugfix/all/HID-validate-HID-report-id-size.patch --- linux-3.10.11/debian/patches/bugfix/all/HID-validate-HID-report-id-size.patch 2013-09-10 04:22:37.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/HID-validate-HID-report-id-size.patch 2013-12-23 04:40:15.000000000 +0000 @@ -21,11 +21,11 @@ include/linux/hid.h | 4 +++- 2 files changed, 10 insertions(+), 4 deletions(-) -diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c -index 36668d1..5ea7d51 100644 ---- a/drivers/hid/hid-core.c -+++ b/drivers/hid/hid-core.c -@@ -63,6 +63,8 @@ struct hid_report *hid_register_report(struct hid_device *device, unsigned type, +Index: linux-3.10.11.rpi/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/hid/hid-core.c 2013-12-23 02:26:50.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/hid/hid-core.c 2013-12-23 04:40:14.000000000 +0000 +@@ -63,6 +63,8 @@ struct hid_report_enum *report_enum = device->report_enum + type; struct hid_report *report; @@ -34,7 +34,7 @@ if (report_enum->report_id_hash[id]) return report_enum->report_id_hash[id]; -@@ -404,8 +406,10 @@ static int hid_parser_global(struct hid_parser *parser, struct hid_item *item) +@@ -404,8 +406,10 @@ case HID_GLOBAL_ITEM_TAG_REPORT_ID: parser->global.report_id = item_udata(item); @@ -47,7 +47,7 @@ return -1; } return 0; -@@ -575,7 +579,7 @@ static void hid_close_report(struct hid_device *device) +@@ -575,7 +579,7 @@ for (i = 0; i < HID_REPORT_TYPES; i++) { struct hid_report_enum *report_enum = device->report_enum + i; @@ -56,11 +56,11 @@ struct hid_report *report = report_enum->report_id_hash[j]; if (report) hid_free_report(report); -diff --git a/include/linux/hid.h b/include/linux/hid.h -index 0c48991..ff545cc 100644 ---- a/include/linux/hid.h -+++ b/include/linux/hid.h -@@ -393,10 +393,12 @@ struct hid_report { +Index: linux-3.10.11.rpi/include/linux/hid.h +=================================================================== +--- linux-3.10.11.rpi.orig/include/linux/hid.h 2013-12-23 01:36:08.000000000 +0000 ++++ linux-3.10.11.rpi/include/linux/hid.h 2013-12-23 04:40:14.000000000 +0000 +@@ -393,10 +393,12 @@ struct hid_device *device; /* associated device */ }; diff -Nru linux-3.10.11/debian/patches/bugfix/all/ipv6-remove-max_addresses-check-from-ipv6_create_tem.patch linux-3.10-3.10.11/debian/patches/bugfix/all/ipv6-remove-max_addresses-check-from-ipv6_create_tem.patch --- linux-3.10.11/debian/patches/bugfix/all/ipv6-remove-max_addresses-check-from-ipv6_create_tem.patch 2013-09-10 03:40:31.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/ipv6-remove-max_addresses-check-from-ipv6_create_tem.patch 2013-12-23 04:40:14.000000000 +0000 @@ -39,9 +39,11 @@ net/ipv6/addrconf.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) ---- a/net/ipv6/addrconf.c -+++ b/net/ipv6/addrconf.c -@@ -1124,12 +1124,10 @@ retry: +Index: linux-3.10.11.rpi/net/ipv6/addrconf.c +=================================================================== +--- linux-3.10.11.rpi.orig/net/ipv6/addrconf.c 2013-12-23 01:36:08.000000000 +0000 ++++ linux-3.10.11.rpi/net/ipv6/addrconf.c 2013-12-23 04:40:14.000000000 +0000 +@@ -1124,12 +1124,10 @@ if (ifp->flags & IFA_F_OPTIMISTIC) addr_flags |= IFA_F_OPTIMISTIC; diff -Nru linux-3.10.11/debian/patches/bugfix/all/misc-bmp085-Enable-building-as-a-module.patch linux-3.10-3.10.11/debian/patches/bugfix/all/misc-bmp085-Enable-building-as-a-module.patch --- linux-3.10.11/debian/patches/bugfix/all/misc-bmp085-Enable-building-as-a-module.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/misc-bmp085-Enable-building-as-a-module.patch 2014-04-28 00:33:39.000000000 +0000 @@ -14,11 +14,11 @@ drivers/misc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index c002d86..7a68184 100644 ---- a/drivers/misc/Kconfig -+++ b/drivers/misc/Kconfig -@@ -451,7 +451,7 @@ config ARM_CHARLCD +Index: linux-3.10-3.10.11/drivers/misc/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/Kconfig 2014-04-27 23:40:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/Kconfig 2014-04-28 00:33:39.000000000 +0000 +@@ -451,7 +451,7 @@ still useful. config BMP085 diff -Nru linux-3.10.11/debian/patches/bugfix/all/radeon-firmware-is-required-for-drm-and-kms-on-r600-onward.patch linux-3.10-3.10.11/debian/patches/bugfix/all/radeon-firmware-is-required-for-drm-and-kms-on-r600-onward.patch --- linux-3.10.11/debian/patches/bugfix/all/radeon-firmware-is-required-for-drm-and-kms-on-r600-onward.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/all/radeon-firmware-is-required-for-drm-and-kms-on-r600-onward.patch 2014-04-28 00:33:04.000000000 +0000 @@ -26,8 +26,10 @@ missing, except for the pre-R600 KMS case. --- ---- a/drivers/gpu/drm/radeon/radeon_drv.c -+++ b/drivers/gpu/drm/radeon/radeon_drv.c +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_drv.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_drv.c 2014-04-28 00:33:03.000000000 +0000 @@ -36,6 +36,8 @@ #include #include @@ -37,7 +39,7 @@ /* -@@ -301,6 +303,37 @@ static struct drm_driver driver_old = { +@@ -308,6 +310,37 @@ static struct drm_driver kms_driver; @@ -75,7 +77,7 @@ static int radeon_kick_out_firmware_fb(struct pci_dev *pdev) { struct apertures_struct *ap; -@@ -327,6 +360,12 @@ static int radeon_pci_probe(struct pci_d +@@ -334,6 +367,12 @@ { int ret; @@ -88,7 +90,7 @@ /* Get rid of things like offb */ ret = radeon_kick_out_firmware_fb(pdev); if (ret) -@@ -435,6 +474,7 @@ static struct pci_driver *pdriver; +@@ -442,6 +481,7 @@ static struct pci_driver radeon_pci_driver = { .name = DRIVER_NAME, .id_table = pciidlist, diff -Nru linux-3.10.11/debian/patches/bugfix/arm/ARM-Fix-the-world-famous-typo-with-is_gate_vma.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/ARM-Fix-the-world-famous-typo-with-is_gate_vma.patch --- linux-3.10.11/debian/patches/bugfix/arm/ARM-Fix-the-world-famous-typo-with-is_gate_vma.patch 2013-08-15 19:09:24.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/ARM-Fix-the-world-famous-typo-with-is_gate_vma.patch 2013-12-23 04:40:12.000000000 +0000 @@ -8,11 +8,11 @@ arch/arm/kernel/process.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c -index d03b5bd..e28d43f 100644 ---- a/arch/arm/kernel/process.c -+++ b/arch/arm/kernel/process.c -@@ -459,7 +459,7 @@ int in_gate_area_no_mm(unsigned long addr) +Index: linux-3.10.11.rpi/arch/arm/kernel/process.c +=================================================================== +--- linux-3.10.11.rpi.orig/arch/arm/kernel/process.c 2013-12-23 01:36:09.000000000 +0000 ++++ linux-3.10.11.rpi/arch/arm/kernel/process.c 2013-12-23 04:40:12.000000000 +0000 +@@ -466,7 +466,7 @@ { return in_gate_area(NULL, addr); } diff -Nru linux-3.10.11/debian/patches/bugfix/arm/I2C-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch --- linux-3.10.11/debian/patches/bugfix/arm/I2C-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch 2013-08-13 18:27:21.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-I2C-mv64xxx-remove-I2C_M_NOSTART-code.patch 2014-04-28 00:34:01.000000000 +0000 @@ -17,11 +17,11 @@ drivers/i2c/busses/i2c-mv64xxx.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) -diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c -index 4b45c73..f11cb25 100644 ---- a/drivers/i2c/busses/i2c-mv64xxx.c -+++ b/drivers/i2c/busses/i2c-mv64xxx.c -@@ -419,28 +419,12 @@ mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg, +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-27 23:40:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-28 00:34:00.000000000 +0000 +@@ -421,28 +421,12 @@ spin_lock_irqsave(&drv_data->lock, flags); mv64xxx_i2c_prepare_for_io(drv_data, msg); diff -Nru linux-3.10.11/debian/patches/bugfix/arm/i2c-imx-add-module_device_table.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/i2c-imx-add-module_device_table.patch --- linux-3.10.11/debian/patches/bugfix/arm/i2c-imx-add-module_device_table.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/i2c-imx-add-module_device_table.patch 2014-04-28 00:33:32.000000000 +0000 @@ -11,11 +11,11 @@ drivers/i2c/busses/i2c-imx.c | 1 + 1 file changed, 1 insertion(+) -diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c -index 6406aa9..e242797 100644 ---- a/drivers/i2c/busses/i2c-imx.c -+++ b/drivers/i2c/busses/i2c-imx.c -@@ -147,6 +147,7 @@ static const struct of_device_id i2c_imx_dt_ids[] = { +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-imx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-imx.c 2014-04-27 23:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-imx.c 2014-04-28 00:33:32.000000000 +0000 +@@ -148,6 +148,7 @@ { .compatible = "fsl,imx21-i2c", .data = &imx_i2c_devtype[IMX21_I2C], }, { /* sentinel */ } }; diff -Nru linux-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch --- linux-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch 2013-08-13 18:27:32.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-fix-race-between-FSM-interrupt-and-proce.patch 2014-04-28 00:34:02.000000000 +0000 @@ -35,11 +35,11 @@ drivers/i2c/busses/i2c-mv64xxx.c | 54 +++++++++++++++++++++++++--------------- 1 file changed, 34 insertions(+), 20 deletions(-) -diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c -index bb37e14..6356439 100644 ---- a/drivers/i2c/busses/i2c-mv64xxx.c -+++ b/drivers/i2c/busses/i2c-mv64xxx.c -@@ -86,6 +86,8 @@ enum { +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-28 00:34:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-28 00:34:02.000000000 +0000 +@@ -86,6 +86,8 @@ }; struct mv64xxx_i2c_data { @@ -48,7 +48,7 @@ int irq; u32 state; u32 action; -@@ -194,7 +196,7 @@ mv64xxx_i2c_fsm(struct mv64xxx_i2c_data *drv_data, u32 status) +@@ -196,7 +198,7 @@ if ((drv_data->bytes_left == 0) || (drv_data->aborting && (drv_data->byte_posn != 0))) { @@ -57,7 +57,7 @@ drv_data->action = MV64XXX_I2C_ACTION_SEND_STOP; drv_data->state = MV64XXX_I2C_STATE_IDLE; } else { -@@ -271,12 +273,25 @@ mv64xxx_i2c_do_action(struct mv64xxx_i2c_data *drv_data) +@@ -273,12 +275,25 @@ { switch(drv_data->action) { case MV64XXX_I2C_ACTION_SEND_RESTART: @@ -86,7 +86,7 @@ break; case MV64XXX_I2C_ACTION_CONTINUE: -@@ -412,20 +427,15 @@ mv64xxx_i2c_wait_for_completion(struct mv64xxx_i2c_data *drv_data) +@@ -414,20 +429,15 @@ static int mv64xxx_i2c_execute_msg(struct mv64xxx_i2c_data *drv_data, struct i2c_msg *msg, @@ -110,7 +110,7 @@ drv_data->send_stop = is_last; drv_data->block = 1; -@@ -453,16 +463,20 @@ static int +@@ -455,16 +465,20 @@ mv64xxx_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { struct mv64xxx_i2c_data *drv_data = i2c_get_adapdata(adap); diff -Nru linux-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch --- linux-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch 2013-08-13 18:27:26.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/I2C-mv64xxx-move-mv64xxx_i2c_prepare_for_io.patch 2014-04-28 00:34:01.000000000 +0000 @@ -14,11 +14,11 @@ drivers/i2c/busses/i2c-mv64xxx.c | 52 ++++++++++++++++++++-------------------- 1 file changed, 26 insertions(+), 26 deletions(-) -diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c -index f11cb25..bb37e14 100644 ---- a/drivers/i2c/busses/i2c-mv64xxx.c -+++ b/drivers/i2c/busses/i2c-mv64xxx.c -@@ -110,6 +110,32 @@ struct mv64xxx_i2c_data { +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-28 00:34:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-mv64xxx.c 2014-04-28 00:34:01.000000000 +0000 +@@ -112,6 +112,32 @@ struct i2c_adapter adapter; }; @@ -51,7 +51,7 @@ /* ***************************************************************************** * -@@ -347,32 +373,6 @@ mv64xxx_i2c_intr(int irq, void *dev_id) +@@ -349,32 +375,6 @@ ***************************************************************************** */ static void diff -Nru linux-3.10.11/debian/patches/bugfix/arm/imx-sgtl5000-probe-defer.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/imx-sgtl5000-probe-defer.patch --- linux-3.10.11/debian/patches/bugfix/arm/imx-sgtl5000-probe-defer.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/imx-sgtl5000-probe-defer.patch 2014-04-28 00:33:33.000000000 +0000 @@ -10,11 +10,11 @@ [ not sure if upstream will like that ] Signed-off-by: Arnaud Patard -Index: linux/sound/soc/fsl/imx-sgtl5000.c +Index: linux-3.10-3.10.11/sound/soc/fsl/imx-sgtl5000.c =================================================================== ---- linux.orig/sound/soc/fsl/imx-sgtl5000.c 2013-05-16 09:33:01.000000000 +0200 -+++ linux/sound/soc/fsl/imx-sgtl5000.c 2013-05-16 09:35:14.000000000 +0200 -@@ -113,13 +113,13 @@ static int imx_sgtl5000_probe(struct pla +--- linux-3.10-3.10.11.orig/sound/soc/fsl/imx-sgtl5000.c 2014-04-27 23:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/fsl/imx-sgtl5000.c 2014-04-28 00:33:32.000000000 +0000 +@@ -113,13 +113,13 @@ ssi_pdev = of_find_device_by_node(ssi_np); if (!ssi_pdev) { dev_err(&pdev->dev, "failed to find SSI platform device\n"); diff -Nru linux-3.10.11/debian/patches/bugfix/arm/ixp4xx_iobe.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/ixp4xx_iobe.patch --- linux-3.10.11/debian/patches/bugfix/arm/ixp4xx_iobe.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/ixp4xx_iobe.patch 2014-04-28 00:33:36.000000000 +0000 @@ -15,11 +15,11 @@ Signed-off-by: Arnaud Patard -Index: linux-3.1/arch/arm/mach-ixp4xx/include/mach/io.h +Index: linux-3.10-3.10.11/arch/arm/mach-ixp4xx/include/mach/io.h =================================================================== ---- linux-3.1.orig/arch/arm/mach-ixp4xx/include/mach/io.h 2011-11-13 14:14:50.662853902 +0100 -+++ linux-3.1/arch/arm/mach-ixp4xx/include/mach/io.h 2011-11-13 14:19:38.522841236 +0100 -@@ -387,6 +387,20 @@ static inline unsigned int ioread16(cons +--- linux-3.10-3.10.11.orig/arch/arm/mach-ixp4xx/include/mach/io.h 2014-04-27 23:40:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-ixp4xx/include/mach/io.h 2014-04-28 00:33:36.000000000 +0000 +@@ -363,6 +363,20 @@ #endif } @@ -40,7 +40,7 @@ #define ioread16_rep(p, v, c) ioread16_rep(p, v, c) static inline void ioread16_rep(const void __iomem *addr, void *vaddr, u32 count) -@@ -417,6 +431,21 @@ static inline unsigned int ioread32(cons +@@ -393,6 +407,21 @@ } } @@ -62,7 +62,7 @@ #define ioread32_rep(p, v, c) ioread32_rep(p, v, c) static inline void ioread32_rep(const void __iomem *addr, void *vaddr, u32 count) -@@ -475,6 +504,20 @@ static inline void iowrite16(u16 value, +@@ -451,6 +480,20 @@ #endif } @@ -83,7 +83,7 @@ #define iowrite16_rep(p, v, c) iowrite16_rep(p, v, c) static inline void iowrite16_rep(void __iomem *addr, const void *vaddr, u32 count) -@@ -504,6 +547,20 @@ static inline void iowrite32(u32 value, +@@ -480,6 +523,20 @@ #endif } diff -Nru linux-3.10.11/debian/patches/bugfix/arm/mvneta-module-fix.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/mvneta-module-fix.patch --- linux-3.10.11/debian/patches/bugfix/arm/mvneta-module-fix.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/mvneta-module-fix.patch 2014-04-28 00:33:31.000000000 +0000 @@ -10,9 +10,11 @@ Signed-off-by: Arnaud Patard ---- a/drivers/net/ethernet/marvell/mvneta.c 2013-04-14 22:17:41.073749379 +0200 -+++ b/drivers/net/ethernet/marvell/mvneta.c 2013-04-14 23:22:16.033578898 +0200 -@@ -89,6 +89,8 @@ +Index: linux-3.10-3.10.11/drivers/net/ethernet/marvell/mvneta.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/marvell/mvneta.c 2014-04-27 23:40:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/marvell/mvneta.c 2014-04-28 00:33:31.000000000 +0000 +@@ -88,6 +88,8 @@ #define MVNETA_TX_IN_PRGRS BIT(1) #define MVNETA_TX_FIFO_EMPTY BIT(8) #define MVNETA_RX_MIN_FRAME_SIZE 0x247c @@ -21,7 +23,7 @@ #define MVNETA_TYPE_PRIO 0x24bc #define MVNETA_FORCE_UNI BIT(21) #define MVNETA_TXQ_CMD_1 0x24e4 -@@ -657,6 +659,9 @@ static void mvneta_port_sgmii_config(str +@@ -655,6 +657,9 @@ val = mvreg_read(pp, MVNETA_GMAC_CTRL_2); val |= MVNETA_GMAC2_PSC_ENABLE; mvreg_write(pp, MVNETA_GMAC_CTRL_2, val); @@ -31,7 +33,7 @@ } /* Start the Ethernet port RX and TX activity */ -@@ -2729,20 +2734,10 @@ static int mvneta_probe(struct platform_ +@@ -2718,20 +2723,10 @@ pp = netdev_priv(dev); @@ -52,7 +54,7 @@ pp->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(pp->clk)) { err = PTR_ERR(pp->clk); -@@ -2751,7 +2746,16 @@ static int mvneta_probe(struct platform_ +@@ -2740,7 +2735,16 @@ clk_prepare_enable(pp->clk); diff -Nru linux-3.10.11/debian/patches/bugfix/arm/omap-musb-choice.patch linux-3.10-3.10.11/debian/patches/bugfix/arm/omap-musb-choice.patch --- linux-3.10.11/debian/patches/bugfix/arm/omap-musb-choice.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/arm/omap-musb-choice.patch 2014-04-28 00:33:31.000000000 +0000 @@ -10,9 +10,11 @@ Removing the choice entry make things work. Signed-off-by: Arnaud Patard ---- a/drivers/usb/musb/Kconfig -+++ b/drivers/usb/musb/Kconfig -@@ -27,9 +27,6 @@ config USB_MUSB_HDRC +Index: linux-3.10-3.10.11/drivers/usb/musb/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/musb/Kconfig 2014-04-27 23:40:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/musb/Kconfig 2014-04-28 00:33:30.000000000 +0000 +@@ -27,9 +27,6 @@ if USB_MUSB_HDRC @@ -22,7 +24,7 @@ config USB_MUSB_DAVINCI tristate "DaVinci" depends on ARCH_DAVINCI_DMx -@@ -62,8 +59,6 @@ config USB_MUSB_BLACKFIN +@@ -62,8 +59,6 @@ config USB_MUSB_UX500 tristate "U8500 and U5500" diff -Nru linux-3.10.11/debian/patches/bugfix/m68k/atari-irqs.patch linux-3.10-3.10.11/debian/patches/bugfix/m68k/atari-irqs.patch --- linux-3.10.11/debian/patches/bugfix/m68k/atari-irqs.patch 2013-08-13 18:12:42.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/m68k/atari-irqs.patch 2013-12-23 04:40:10.000000000 +0000 @@ -3,9 +3,11 @@ Origin: http://thread.gmane.org/gmane.linux.debian.devel.kernel/91476/focus=5003 Forwarded: http://thread.gmane.org/gmane.linux.ports.m68k/5009 ---- a/arch/m68k/include/asm/irqflags.h -+++ b/arch/m68k/include/asm/irqflags.h -@@ -67,6 +67,10 @@ static inline void arch_local_irq_restor +Index: linux-3.10.11.rpi/arch/m68k/include/asm/irqflags.h +=================================================================== +--- linux-3.10.11.rpi.orig/arch/m68k/include/asm/irqflags.h 2013-12-23 01:36:10.000000000 +0000 ++++ linux-3.10.11.rpi/arch/m68k/include/asm/irqflags.h 2013-12-23 04:40:09.000000000 +0000 +@@ -67,6 +67,10 @@ static inline bool arch_irqs_disabled_flags(unsigned long flags) { diff -Nru linux-3.10.11/debian/patches/bugfix/m68k/ethernat-kconfig.patch linux-3.10-3.10.11/debian/patches/bugfix/m68k/ethernat-kconfig.patch --- linux-3.10.11/debian/patches/bugfix/m68k/ethernat-kconfig.patch 2013-08-13 18:12:42.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/m68k/ethernat-kconfig.patch 2013-12-23 04:40:09.000000000 +0000 @@ -2,9 +2,11 @@ Description: Make SMC91X driver selectable for ATARI_ETHERNAT boards Origin: http://git.kernel.org/cgit/linux/kernel/git/geert/linux-m68k.git/commit/?id=edee09224891c259071238d5a8d2be5e3ca7f09c ---- a/drivers/net/ethernet/smsc/Kconfig -+++ b/drivers/net/ethernet/smsc/Kconfig -@@ -6,7 +6,8 @@ config NET_VENDOR_SMSC +Index: linux-3.10.11.rpi/drivers/net/ethernet/smsc/Kconfig +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/net/ethernet/smsc/Kconfig 2013-12-23 01:36:10.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/net/ethernet/smsc/Kconfig 2013-12-23 04:40:08.000000000 +0000 +@@ -6,7 +6,8 @@ bool "SMC (SMSC)/Western Digital devices" default y depends on ARM || ISA || MAC || ARM64 || MIPS || M32R || SUPERH || \ @@ -14,7 +16,7 @@ ---help--- If you have a network (Ethernet) card belonging to this class, say Y and read the Ethernet-HOWTO, available from -@@ -40,7 +41,7 @@ config SMC91X +@@ -40,7 +41,7 @@ select NET_CORE select MII depends on (ARM || M32R || SUPERH || MIPS || BLACKFIN || \ diff -Nru linux-3.10.11/debian/patches/bugfix/mips/disable-advansys.patch linux-3.10-3.10.11/debian/patches/bugfix/mips/disable-advansys.patch --- linux-3.10.11/debian/patches/bugfix/mips/disable-advansys.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/mips/disable-advansys.patch 2014-04-28 00:33:34.000000000 +0000 @@ -12,9 +12,11 @@ But report: http://www.mail-archive.com/linux-scsi@vger.kernel.org/msg12773.html ---- a/drivers/scsi/Kconfig 2007-12-27 19:16:18.000000000 +0000 -+++ b/drivers/scsi/Kconfig 2007-12-27 19:16:58.000000000 +0000 -@@ -523,6 +523,7 @@ +Index: linux-3.10-3.10.11/drivers/scsi/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/Kconfig 2014-04-27 23:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/Kconfig 2014-04-28 00:33:33.000000000 +0000 +@@ -568,6 +568,7 @@ tristate "AdvanSys SCSI support" depends on SCSI && VIRT_TO_BUS depends on ISA || EISA || PCI diff -Nru linux-3.10.11/debian/patches/bugfix/powerpc/lpar-console.patch linux-3.10-3.10.11/debian/patches/bugfix/powerpc/lpar-console.patch --- linux-3.10.11/debian/patches/bugfix/powerpc/lpar-console.patch 2013-07-14 23:47:08.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/powerpc/lpar-console.patch 2014-04-28 00:33:34.000000000 +0000 @@ -8,8 +8,10 @@ Original version by Bastian Blank . ---- a/drivers/tty/hvc/hvc_vio.c -+++ b/drivers/tty/hvc/hvc_vio.c +Index: linux-3.10-3.10.11/drivers/tty/hvc/hvc_vio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/hvc/hvc_vio.c 2014-04-27 23:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/hvc/hvc_vio.c 2014-04-28 00:33:34.000000000 +0000 @@ -48,6 +48,7 @@ #include #include @@ -18,7 +20,7 @@ #include "hvc_console.h" -@@ -440,7 +441,9 @@ +@@ -457,7 +458,9 @@ if (hvterm_priv0.proto == HV_PROTOCOL_HVSI) goto out; #endif diff -Nru linux-3.10.11/debian/patches/bugfix/x86/amd64_edac-Fix-single-channel-setups.patch linux-3.10-3.10.11/debian/patches/bugfix/x86/amd64_edac-Fix-single-channel-setups.patch --- linux-3.10.11/debian/patches/bugfix/x86/amd64_edac-Fix-single-channel-setups.patch 2013-09-08 00:58:32.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/x86/amd64_edac-Fix-single-channel-setups.patch 2013-12-23 04:40:13.000000000 +0000 @@ -23,11 +23,11 @@ drivers/edac/amd64_edac.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) -diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c -index 8b6a034..8b3d901 100644 ---- a/drivers/edac/amd64_edac.c -+++ b/drivers/edac/amd64_edac.c -@@ -2470,8 +2470,15 @@ static int amd64_init_one_instance(struct pci_dev *F2) +Index: linux-3.10.11.rpi/drivers/edac/amd64_edac.c +=================================================================== +--- linux-3.10.11.rpi.orig/drivers/edac/amd64_edac.c 2013-12-23 01:36:08.000000000 +0000 ++++ linux-3.10.11.rpi/drivers/edac/amd64_edac.c 2013-12-23 04:40:13.000000000 +0000 +@@ -2470,8 +2470,15 @@ layers[0].size = pvt->csels[0].b_cnt; layers[0].is_virt_csrow = true; layers[1].type = EDAC_MC_LAYER_CHANNEL; diff -Nru linux-3.10.11/debian/patches/bugfix/x86/viafb-autoload-on-olpc-xo1.5-only.patch linux-3.10-3.10.11/debian/patches/bugfix/x86/viafb-autoload-on-olpc-xo1.5-only.patch --- linux-3.10.11/debian/patches/bugfix/x86/viafb-autoload-on-olpc-xo1.5-only.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/bugfix/x86/viafb-autoload-on-olpc-xo1.5-only.patch 2014-04-28 00:33:38.000000000 +0000 @@ -14,9 +14,11 @@ un-blacklist it in udev. --- ---- a/drivers/video/via/via-core.c -+++ b/drivers/video/via/via-core.c -@@ -753,7 +753,14 @@ static struct pci_device_id via_pci_tabl +Index: linux-3.10-3.10.11/drivers/video/via/via-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/via/via-core.c 2014-04-27 23:40:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/via/via-core.c 2014-04-28 00:33:38.000000000 +0000 +@@ -753,7 +753,14 @@ .driver_data = UNICHROME_VX900 }, { } }; diff -Nru linux-3.10.11/debian/patches/debian/af_802154-Disable-auto-loading-as-mitigation-against.patch linux-3.10-3.10.11/debian/patches/debian/af_802154-Disable-auto-loading-as-mitigation-against.patch --- linux-3.10.11/debian/patches/debian/af_802154-Disable-auto-loading-as-mitigation-against.patch 2013-05-04 20:38:33.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/af_802154-Disable-auto-loading-as-mitigation-against.patch 2014-04-28 00:33:19.000000000 +0000 @@ -19,16 +19,13 @@ net/ieee802154/af_ieee802154.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) -diff --git a/net/ieee802154/af_ieee802154.c b/net/ieee802154/af_ieee802154.c -index cd949d5..8f49dd5 100644 ---- a/net/ieee802154/af_ieee802154.c -+++ b/net/ieee802154/af_ieee802154.c -@@ -363,4 +363,4 @@ module_init(af_ieee802154_init); +Index: linux-3.10-3.10.11/net/ieee802154/af_ieee802154.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ieee802154/af_ieee802154.c 2014-04-27 23:40:49.000000000 +0000 ++++ linux-3.10-3.10.11/net/ieee802154/af_ieee802154.c 2014-04-28 00:33:18.000000000 +0000 +@@ -370,4 +370,4 @@ module_exit(af_ieee802154_remove); MODULE_LICENSE("GPL"); -MODULE_ALIAS_NETPROTO(PF_IEEE802154); +/* MODULE_ALIAS_NETPROTO(PF_IEEE802154); */ --- -1.7.2.3 - diff -Nru linux-3.10.11/debian/patches/debian/arch-sh4-fix-uimage-build.patch linux-3.10-3.10.11/debian/patches/debian/arch-sh4-fix-uimage-build.patch --- linux-3.10.11/debian/patches/debian/arch-sh4-fix-uimage-build.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/arch-sh4-fix-uimage-build.patch 2014-04-28 00:32:35.000000000 +0000 @@ -6,9 +6,11 @@ [bwh: This was added without a description, but I think it is dealing with a similar issue to powerpcspe-omit-uimage.patch] ---- a/arch/sh/Makefile -+++ b/arch/sh/Makefile -@@ -75,7 +75,6 @@ +Index: linux-3.10-3.10.11/arch/sh/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sh/Makefile 2014-04-27 23:40:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sh/Makefile 2014-04-28 00:32:35.000000000 +0000 +@@ -81,7 +81,6 @@ # Give the various platforms the opportunity to set default image types defaultimage-$(CONFIG_SUPERH32) := zImage diff -Nru linux-3.10.11/debian/patches/debian/ast-disable-autoload.patch linux-3.10-3.10.11/debian/patches/debian/ast-disable-autoload.patch --- linux-3.10.11/debian/patches/debian/ast-disable-autoload.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/ast-disable-autoload.patch 2014-04-28 00:33:25.000000000 +0000 @@ -8,9 +8,11 @@ have to be loaded either by local configuration or as part of a package of a compatible X driver. ---- a/drivers/gpu/drm/ast/ast_drv.c -+++ b/drivers/gpu/drm/ast/ast_drv.c -@@ -58,7 +58,7 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist +Index: linux-3.10-3.10.11/drivers/gpu/drm/ast/ast_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/ast/ast_drv.c 2014-04-27 23:40:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/ast/ast_drv.c 2014-04-28 00:33:25.000000000 +0000 +@@ -58,7 +58,7 @@ {0, 0, 0}, }; diff -Nru linux-3.10.11/debian/patches/debian/aufs3-mark-as-staging.patch linux-3.10-3.10.11/debian/patches/debian/aufs3-mark-as-staging.patch --- linux-3.10.11/debian/patches/debian/aufs3-mark-as-staging.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/aufs3-mark-as-staging.patch 2014-04-28 00:33:15.000000000 +0000 @@ -4,9 +4,11 @@ I really don't want to support this. ---- a/fs/aufs/module.c -+++ b/fs/aufs/module.c -@@ -104,6 +104,7 @@ MODULE_DESCRIPTION(AUFS_NAME +Index: linux-3.10-3.10.11/fs/aufs/module.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/aufs/module.c 2014-04-28 00:33:08.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/module.c 2014-04-28 00:33:14.000000000 +0000 +@@ -104,6 +104,7 @@ " -- Advanced multi layered unification filesystem"); MODULE_VERSION(AUFS_VERSION); MODULE_ALIAS_FS(AUFS_NAME); diff -Nru linux-3.10.11/debian/patches/debian/AUFS_PROC_MAP-is-BROKEN.patch linux-3.10-3.10.11/debian/patches/debian/AUFS_PROC_MAP-is-BROKEN.patch --- linux-3.10.11/debian/patches/debian/AUFS_PROC_MAP-is-BROKEN.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/AUFS_PROC_MAP-is-BROKEN.patch 2014-04-28 00:33:15.000000000 +0000 @@ -6,9 +6,11 @@ This config option depends on aufs3-proc_map.patch, which we don't apply. ---- a/fs/aufs/Kconfig -+++ b/fs/aufs/Kconfig -@@ -102,6 +102,7 @@ config AUFS_RDU +Index: linux-3.10-3.10.11/fs/aufs/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/fs/aufs/Kconfig 2014-04-28 00:33:08.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/Kconfig 2014-04-28 00:33:15.000000000 +0000 +@@ -101,6 +101,7 @@ config AUFS_PROC_MAP bool "support for /proc/maps and lsof(1)" diff -Nru linux-3.10.11/debian/patches/debian/cdc_ncm-cdc_mbim-use-ncm-by-default.patch linux-3.10-3.10.11/debian/patches/debian/cdc_ncm-cdc_mbim-use-ncm-by-default.patch --- linux-3.10.11/debian/patches/debian/cdc_ncm-cdc_mbim-use-ncm-by-default.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/cdc_ncm-cdc_mbim-use-ncm-by-default.patch 2014-04-28 00:33:27.000000000 +0000 @@ -11,8 +11,10 @@ once it's ready to speak MBIM. --- ---- a/drivers/net/usb/cdc_ncm.c -+++ b/drivers/net/usb/cdc_ncm.c +Index: linux-3.10-3.10.11/drivers/net/usb/cdc_ncm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/cdc_ncm.c 2014-04-27 23:40:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/cdc_ncm.c 2014-04-28 00:33:26.000000000 +0000 @@ -55,11 +55,7 @@ #define DRIVER_VERSION "14-Mar-2012" diff -Nru linux-3.10.11/debian/patches/debian/cgroups-Document-the-Debian-memory-resource-controll.patch linux-3.10-3.10.11/debian/patches/debian/cgroups-Document-the-Debian-memory-resource-controll.patch --- linux-3.10.11/debian/patches/debian/cgroups-Document-the-Debian-memory-resource-controll.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/cgroups-Document-the-Debian-memory-resource-controll.patch 2014-04-28 00:33:22.000000000 +0000 @@ -3,9 +3,11 @@ Forwarded: not-needed --- ---- a/Documentation/cgroups/memory.txt -+++ b/Documentation/cgroups/memory.txt -@@ -46,6 +46,10 @@ Features: +Index: linux-3.10-3.10.11/Documentation/cgroups/memory.txt +=================================================================== +--- linux-3.10-3.10.11.orig/Documentation/cgroups/memory.txt 2014-04-27 23:40:47.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/cgroups/memory.txt 2014-04-28 00:33:22.000000000 +0000 +@@ -47,6 +47,10 @@ Kernel memory support is a work in progress, and the current version provides basically functionality. (See Section 2.7) diff -Nru linux-3.10.11/debian/patches/debian/cirrus-disable-modeset-by-default.patch linux-3.10-3.10.11/debian/patches/debian/cirrus-disable-modeset-by-default.patch --- linux-3.10.11/debian/patches/debian/cirrus-disable-modeset-by-default.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/cirrus-disable-modeset-by-default.patch 2014-04-28 00:33:24.000000000 +0000 @@ -7,9 +7,11 @@ xserver-xorg-video-cirrus will need to override this once it is compatible, by installing a modprobe config file. ---- a/drivers/gpu/drm/cirrus/cirrus_drv.c -+++ b/drivers/gpu/drm/cirrus/cirrus_drv.c -@@ -15,7 +15,7 @@ +Index: linux-3.10-3.10.11/drivers/gpu/drm/cirrus/cirrus_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/cirrus/cirrus_drv.c 2014-04-27 23:40:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/cirrus/cirrus_drv.c 2014-04-28 00:33:23.000000000 +0000 +@@ -14,7 +14,7 @@ #include "cirrus_drv.h" diff -Nru linux-3.10.11/debian/patches/debian/decnet-Disable-auto-loading-as-mitigation-against-lo.patch linux-3.10-3.10.11/debian/patches/debian/decnet-Disable-auto-loading-as-mitigation-against-lo.patch --- linux-3.10.11/debian/patches/debian/decnet-Disable-auto-loading-as-mitigation-against-lo.patch 2013-05-04 20:38:34.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/decnet-Disable-auto-loading-as-mitigation-against-lo.patch 2014-04-28 00:33:20.000000000 +0000 @@ -19,11 +19,11 @@ net/decnet/af_decnet.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) -diff --git a/net/decnet/af_decnet.c b/net/decnet/af_decnet.c -index 7a58c87..ed9e2b0 100644 ---- a/net/decnet/af_decnet.c -+++ b/net/decnet/af_decnet.c -@@ -2358,7 +2358,7 @@ void dn_unregister_sysctl(void); +Index: linux-3.10-3.10.11/net/decnet/af_decnet.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/decnet/af_decnet.c 2014-04-27 23:40:48.000000000 +0000 ++++ linux-3.10-3.10.11/net/decnet/af_decnet.c 2014-04-28 00:33:20.000000000 +0000 +@@ -2358,7 +2358,7 @@ MODULE_DESCRIPTION("The Linux DECnet Network Protocol"); MODULE_AUTHOR("Linux DECnet Project Team"); MODULE_LICENSE("GPL"); @@ -32,6 +32,3 @@ static char banner[] __initdata = KERN_INFO "NET4: DECnet for Linux: V.2.5.68s (C) 1995-2003 Linux DECnet Project Team\n"; --- -1.7.2.3 - diff -Nru linux-3.10.11/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch linux-3.10-3.10.11/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch --- linux-3.10.11/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch 2014-04-28 00:33:21.000000000 +0000 @@ -7,9 +7,11 @@ This reverts commit 561ec64ae67ef25cac8d72bb9c4bfc955edfd415 ('VFS: don't do protected {sym,hard}links by default'). ---- a/fs/namei.c -+++ b/fs/namei.c -@@ -651,8 +651,8 @@ static inline void put_link(struct namei +Index: linux-3.10-3.10.11/fs/namei.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/namei.c 2014-04-27 23:40:48.000000000 +0000 ++++ linux-3.10-3.10.11/fs/namei.c 2014-04-28 00:33:20.000000000 +0000 +@@ -699,8 +699,8 @@ path_put(link); } diff -Nru linux-3.10.11/debian/patches/debian/gitignore.patch linux-3.10-3.10.11/debian/patches/debian/gitignore.patch --- linux-3.10.11/debian/patches/debian/gitignore.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/gitignore.patch 2014-04-28 00:32:33.000000000 +0000 @@ -3,8 +3,10 @@ Subject: Tweak gitignore for Debian pkg-kernel using git svn. Forwarded: not-needed ---- a/.gitignore -+++ b/.gitignore +Index: linux-3.10-3.10.11/.gitignore +=================================================================== +--- linux-3.10-3.10.11.orig/.gitignore 2014-04-27 23:40:58.000000000 +0000 ++++ linux-3.10-3.10.11/.gitignore 2014-04-28 00:32:33.000000000 +0000 @@ -46,11 +46,6 @@ /Module.symvers diff -Nru linux-3.10.11/debian/patches/debian/ia64-hardcode-arch-script-output.patch linux-3.10-3.10.11/debian/patches/debian/ia64-hardcode-arch-script-output.patch --- linux-3.10.11/debian/patches/debian/ia64-hardcode-arch-script-output.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/ia64-hardcode-arch-script-output.patch 2014-04-28 00:32:34.000000000 +0000 @@ -21,11 +21,11 @@ altogether, and allow for the possibility of other archs to provide their own scripts in the future. -diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile -index e7cbaa0..c8af869 100644 ---- a/arch/ia64/Makefile -+++ b/arch/ia64/Makefile -@@ -30,16 +30,7 @@ cflags-y := -pipe $(EXTRA) -ffixed-r13 -mfixed-range=f12-f15,f32-f127 \ +Index: linux-3.10-3.10.11/arch/ia64/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/ia64/Makefile 2014-04-27 23:40:58.000000000 +0000 ++++ linux-3.10-3.10.11/arch/ia64/Makefile 2014-04-28 00:32:33.000000000 +0000 +@@ -30,16 +30,7 @@ -falign-functions=32 -frename-registers -fno-optimize-sibling-calls KBUILD_CFLAGS_KERNEL := -mconstant-gp @@ -43,7 +43,7 @@ KBUILD_CFLAGS += $(cflags-y) head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o -@@ -69,7 +60,7 @@ boot := arch/ia64/hp/sim/boot +@@ -68,7 +59,7 @@ PHONY += boot compressed check @@ -52,7 +52,7 @@ compressed: vmlinux.gz -@@ -78,9 +69,6 @@ vmlinuz: vmlinux.gz +@@ -77,9 +68,6 @@ vmlinux.gz: vmlinux $(Q)$(MAKE) $(build)=$(boot) $@ @@ -62,7 +62,7 @@ archclean: $(Q)$(MAKE) $(clean)=$(boot) -@@ -96,7 +84,6 @@ define archhelp +@@ -95,7 +83,6 @@ echo '* compressed - Build compressed kernel image' echo ' install - Install compressed kernel image' echo ' boot - Build vmlinux and bootloader for Ski simulator' diff -Nru linux-3.10.11/debian/patches/debian/iwlwifi-do-not-request-unreleased-firmware.patch linux-3.10-3.10.11/debian/patches/debian/iwlwifi-do-not-request-unreleased-firmware.patch --- linux-3.10.11/debian/patches/debian/iwlwifi-do-not-request-unreleased-firmware.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/iwlwifi-do-not-request-unreleased-firmware.patch 2014-04-28 00:32:40.000000000 +0000 @@ -13,8 +13,10 @@ not easy to detect that this particular failure is harmless. So stop requesting the unreleased firmware. ---- a/drivers/net/wireless/iwlwifi/iwl-6000.c -+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-6000.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlwifi/iwl-6000.c 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-6000.c 2014-04-28 00:32:39.000000000 +0000 @@ -31,7 +31,7 @@ #include "dvm/commands.h" /* needed for BT for now */ diff -Nru linux-3.10.11/debian/patches/debian/kernelvariables.patch linux-3.10-3.10.11/debian/patches/debian/kernelvariables.patch --- linux-3.10.11/debian/patches/debian/kernelvariables.patch 2013-05-04 20:38:34.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/kernelvariables.patch 2014-04-28 00:32:31.000000000 +0000 @@ -12,9 +12,11 @@ This file can only be read after we establish the build tree, and all use of $(ARCH) needs to be moved after this. ---- a/Makefile -+++ b/Makefile -@@ -195,42 +195,6 @@ export KBUILD_BUILDHOST := $(SUBARCH) +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:32:29.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:32:31.000000000 +0000 +@@ -195,42 +195,6 @@ ARCH ?= $(SUBARCH) CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%) @@ -57,7 +59,7 @@ KCONFIG_CONFIG ?= .config export KCONFIG_CONFIG -@@ -349,6 +313,44 @@ CFLAGS_KERNEL = +@@ -349,6 +313,44 @@ AFLAGS_KERNEL = CFLAGS_GCOV = -fprofile-arcs -ftest-coverage diff -Nru linux-3.10.11/debian/patches/debian/mgag200-disable-autoload.patch linux-3.10-3.10.11/debian/patches/debian/mgag200-disable-autoload.patch --- linux-3.10.11/debian/patches/debian/mgag200-disable-autoload.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/mgag200-disable-autoload.patch 2014-04-28 00:33:26.000000000 +0000 @@ -8,9 +8,11 @@ loaded either by local configuration or as part of a package of a compatible X driver. ---- a/drivers/gpu/drm/mgag200/mgag200_drv.c -+++ b/drivers/gpu/drm/mgag200/mgag200_drv.c -@@ -38,7 +38,7 @@ static DEFINE_PCI_DEVICE_TABLE(pciidlist +Index: linux-3.10-3.10.11/drivers/gpu/drm/mgag200/mgag200_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/mgag200/mgag200_drv.c 2014-04-27 23:40:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/mgag200/mgag200_drv.c 2014-04-28 00:33:25.000000000 +0000 +@@ -38,7 +38,7 @@ {0,} }; diff -Nru linux-3.10.11/debian/patches/debian/mips-disable-werror.patch linux-3.10-3.10.11/debian/patches/debian/mips-disable-werror.patch --- linux-3.10.11/debian/patches/debian/mips-disable-werror.patch 2013-05-04 20:38:33.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/mips-disable-werror.patch 2014-04-28 00:32:35.000000000 +0000 @@ -10,10 +10,10 @@ arch/mips/Kbuild | 5 ----- 1 files changed, 0 insertions(+), 5 deletions(-) -diff --git a/arch/mips/Kbuild b/arch/mips/Kbuild -index e322d65..2e6b28f 100644 ---- a/arch/mips/Kbuild -+++ b/arch/mips/Kbuild +Index: linux-3.10-3.10.11/arch/mips/Kbuild +=================================================================== +--- linux-3.10-3.10.11.orig/arch/mips/Kbuild 2014-04-27 23:40:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/mips/Kbuild 2014-04-28 00:32:34.000000000 +0000 @@ -1,8 +1,3 @@ -# Fail on warnings - also for files referenced in subdirs -# -Werror can be disabled for specific files using: @@ -23,6 +23,3 @@ # platform specific definitions include arch/mips/Kbuild.platforms obj-y := $(platform-y) --- -1.7.1 - diff -Nru linux-3.10.11/debian/patches/debian/powerpcspe-omit-uimage.patch linux-3.10-3.10.11/debian/patches/debian/powerpcspe-omit-uimage.patch --- linux-3.10.11/debian/patches/debian/powerpcspe-omit-uimage.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/powerpcspe-omit-uimage.patch 2014-04-28 00:32:36.000000000 +0000 @@ -7,10 +7,10 @@ Bug-Debian: http://bugs.debian.org/708094 Forwarded: not-needed -Index: linux-3.8.12/arch/powerpc/boot/Makefile +Index: linux-3.10-3.10.11/arch/powerpc/boot/Makefile =================================================================== ---- linux-3.8.12.orig/arch/powerpc/boot/Makefile 2013-05-13 21:05:41.000000000 +0200 -+++ linux-3.8.12/arch/powerpc/boot/Makefile 2013-05-14 07:48:26.434286772 +0200 +--- linux-3.10-3.10.11.orig/arch/powerpc/boot/Makefile 2014-04-27 23:40:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/boot/Makefile 2014-04-28 00:32:36.000000000 +0000 @@ -204,7 +204,6 @@ image-$(CONFIG_PPC_PMAC) += zImage.pmac image-$(CONFIG_PPC_HOLLY) += dtbImage.holly diff -Nru linux-3.10.11/debian/patches/debian/rds-Disable-auto-loading-as-mitigation-against-local.patch linux-3.10-3.10.11/debian/patches/debian/rds-Disable-auto-loading-as-mitigation-against-local.patch --- linux-3.10.11/debian/patches/debian/rds-Disable-auto-loading-as-mitigation-against-local.patch 2013-05-04 20:38:33.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/rds-Disable-auto-loading-as-mitigation-against-local.patch 2014-04-28 00:33:19.000000000 +0000 @@ -19,16 +19,13 @@ net/rds/af_rds.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) -diff --git a/net/rds/af_rds.c b/net/rds/af_rds.c -index 98e0538..d8d4525 100644 ---- a/net/rds/af_rds.c -+++ b/net/rds/af_rds.c -@@ -574,4 +574,4 @@ MODULE_DESCRIPTION("RDS: Reliable Datagram Sockets" +Index: linux-3.10-3.10.11/net/rds/af_rds.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/rds/af_rds.c 2014-04-27 23:40:48.000000000 +0000 ++++ linux-3.10-3.10.11/net/rds/af_rds.c 2014-04-28 00:33:19.000000000 +0000 +@@ -596,4 +596,4 @@ " v" DRV_VERSION " (" DRV_RELDATE ")"); MODULE_VERSION(DRV_VERSION); MODULE_LICENSE("Dual BSD/GPL"); -MODULE_ALIAS_NETPROTO(PF_RDS); +/* MODULE_ALIAS_NETPROTO(PF_RDS); */ --- -1.7.2.3 - diff -Nru linux-3.10.11/debian/patches/debian/sched-autogroup-disabled.patch linux-3.10-3.10.11/debian/patches/debian/sched-autogroup-disabled.patch --- linux-3.10.11/debian/patches/debian/sched-autogroup-disabled.patch 2013-05-04 20:38:34.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/sched-autogroup-disabled.patch 2014-04-28 00:33:21.000000000 +0000 @@ -6,8 +6,10 @@ We want to provide the option of autogrouping but without enabling it by default yet. ---- a/kernel/sched/auto_group.c -+++ b/kernel/sched/auto_group.c +Index: linux-3.10-3.10.11/kernel/sched/auto_group.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/sched/auto_group.c 2014-04-27 23:40:47.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/sched/auto_group.c 2014-04-28 00:33:21.000000000 +0000 @@ -9,7 +9,7 @@ #include #include diff -Nru linux-3.10.11/debian/patches/debian/udl-disable-autoload.patch linux-3.10-3.10.11/debian/patches/debian/udl-disable-autoload.patch --- linux-3.10.11/debian/patches/debian/udl-disable-autoload.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/udl-disable-autoload.patch 2014-04-28 00:33:24.000000000 +0000 @@ -8,9 +8,11 @@ have to be loaded either by local configuration or as part of a package of a compatible X driver. ---- a/drivers/gpu/drm/udl/udl_drv.c -+++ b/drivers/gpu/drm/udl/udl_drv.c -@@ -30,7 +30,7 @@ static struct usb_device_id id_table[] = +Index: linux-3.10-3.10.11/drivers/gpu/drm/udl/udl_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/udl/udl_drv.c 2014-04-27 23:40:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/udl/udl_drv.c 2014-04-28 00:33:24.000000000 +0000 +@@ -30,7 +30,7 @@ USB_DEVICE_ID_MATCH_INT_PROTOCOL,}, {}, }; diff -Nru linux-3.10.11/debian/patches/debian/version.patch linux-3.10-3.10.11/debian/patches/debian/version.patch --- linux-3.10.11/debian/patches/debian/version.patch 2013-07-14 23:47:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/version.patch 2014-04-28 00:32:30.000000000 +0000 @@ -7,9 +7,11 @@ $DISTRIBUTION_OFFICIAL_BUILD, $DISTRIBUTOR and $DISTRIBUTION_VERSION are set. ---- a/Makefile -+++ b/Makefile -@@ -826,7 +826,7 @@ endif +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-27 23:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:32:29.000000000 +0000 +@@ -826,7 +826,7 @@ prepare2: prepare3 outputmakefile asm-generic prepare1: prepare2 $(version_h) include/generated/utsrelease.h \ @@ -18,7 +20,7 @@ $(cmd_crmodverdir) archprepare: archheaders archscripts prepare1 scripts_basic -@@ -858,12 +858,25 @@ define filechk_version.h +@@ -858,12 +858,25 @@ echo '#define KERNEL_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c))';) endef @@ -44,8 +46,10 @@ PHONY += headerdep headerdep: $(Q)find $(srctree)/include/ -name '*.h' | xargs --max-args 1 \ ---- a/arch/x86/um/sysrq_64.c -+++ b/arch/x86/um/sysrq_64.c +Index: linux-3.10-3.10.11/arch/x86/um/sysrq_64.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/um/sysrq_64.c 2014-04-27 23:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/um/sysrq_64.c 2014-04-28 00:32:29.000000000 +0000 @@ -8,6 +8,7 @@ #include #include @@ -54,7 +58,7 @@ #include #include #include -@@ -16,8 +17,9 @@ void __show_regs(struct pt_regs *regs) +@@ -16,8 +17,9 @@ { printk("\n"); print_modules(); @@ -66,8 +70,10 @@ printk(KERN_INFO "RIP: %04lx:[<%016lx>]\n", PT_REGS_CS(regs) & 0xffff, PT_REGS_IP(regs)); printk(KERN_INFO "RSP: %016lx EFLAGS: %08lx\n", PT_REGS_SP(regs), ---- a/arch/ia64/kernel/process.c -+++ b/arch/ia64/kernel/process.c +Index: linux-3.10-3.10.11/arch/ia64/kernel/process.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/ia64/kernel/process.c 2014-04-27 23:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/arch/ia64/kernel/process.c 2014-04-28 00:32:29.000000000 +0000 @@ -30,6 +30,7 @@ #include #include @@ -76,7 +82,7 @@ #include #include -@@ -103,9 +104,9 @@ show_regs (struct pt_regs *regs) +@@ -103,9 +104,9 @@ print_modules(); printk("\n"); show_regs_print_info(KERN_DEFAULT); @@ -88,8 +94,10 @@ print_symbol("ip is at %s\n", ip); printk("unat: %016lx pfs : %016lx rsc : %016lx\n", regs->ar_unat, regs->ar_pfs, regs->ar_rsc); ---- a/arch/powerpc/kernel/process.c -+++ b/arch/powerpc/kernel/process.c +Index: linux-3.10-3.10.11/arch/powerpc/kernel/process.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/process.c 2014-04-27 23:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/process.c 2014-04-28 00:32:29.000000000 +0000 @@ -38,6 +38,7 @@ #include #include @@ -98,7 +106,7 @@ #include #include -@@ -842,8 +843,9 @@ void show_regs(struct pt_regs * regs) +@@ -853,8 +854,9 @@ printk("NIP: "REG" LR: "REG" CTR: "REG"\n", regs->nip, regs->link, regs->ctr); @@ -110,8 +118,10 @@ printk("MSR: "REG" ", regs->msr); printbits(regs->msr, msr_bits); printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); ---- a/kernel/printk.c -+++ b/kernel/printk.c +Index: linux-3.10-3.10.11/kernel/printk.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/printk.c 2014-04-27 23:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/printk.c 2014-04-28 00:32:29.000000000 +0000 @@ -45,6 +45,7 @@ #include #include @@ -120,7 +130,7 @@ #include -@@ -2883,11 +2884,12 @@ void __init dump_stack_set_arch_desc(con +@@ -2892,11 +2893,12 @@ */ void dump_stack_print_info(const char *log_lvl) { diff -Nru linux-3.10.11/debian/patches/debian/yama-disable-by-default.patch linux-3.10-3.10.11/debian/patches/debian/yama-disable-by-default.patch --- linux-3.10.11/debian/patches/debian/yama-disable-by-default.patch 2013-06-19 03:36:07.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/debian/yama-disable-by-default.patch 2014-04-28 00:33:23.000000000 +0000 @@ -4,8 +4,10 @@ Bug-Debian: http://bugs.debian.org/712740 Forwarded: not-needed ---- a/security/yama/yama_lsm.c -+++ b/security/yama/yama_lsm.c +Index: linux-3.10-3.10.11/security/yama/yama_lsm.c +=================================================================== +--- linux-3.10-3.10.11.orig/security/yama/yama_lsm.c 2014-04-27 23:40:47.000000000 +0000 ++++ linux-3.10-3.10.11/security/yama/yama_lsm.c 2014-04-28 00:33:22.000000000 +0000 @@ -24,7 +24,7 @@ #define YAMA_SCOPE_CAPABILITY 2 #define YAMA_SCOPE_NO_ATTACH 3 @@ -15,7 +17,7 @@ /* describe a ptrace relationship for potential exception */ struct ptrace_relation { -@@ -425,7 +425,7 @@ static __init int yama_init(void) +@@ -425,7 +425,7 @@ return 0; #endif diff -Nru linux-3.10.11/debian/patches/dummytemplate.diff linux-3.10-3.10.11/debian/patches/dummytemplate.diff --- linux-3.10.11/debian/patches/dummytemplate.diff 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/dummytemplate.diff 2013-12-23 04:08:57.000000000 +0000 @@ -0,0 +1,5 @@ +diff -uN a/1.txt b/1.txt +--- a/dummy/PATCHNAME.txt 1970-01-01 00:00:00.000000000 +0000 ++++ b/dummy/PATCHNAME.txt 2013-12-23 04:07:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/features/all/aufs3/aufs3-add.patch linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-add.patch --- linux-3.10.11/debian/patches/features/all/aufs3/aufs3-add.patch 2013-08-31 17:37:57.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-add.patch 2014-04-28 00:33:14.000000000 +0000 @@ -6,8 +6,10 @@ Patch generated by debian/patches/features/all/aufs3/gen-patch ---- a/Documentation/ABI/testing/debugfs-aufs 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/ABI/testing/debugfs-aufs 2013-06-02 18:23:34.749538984 +0100 +Index: linux-3.10-3.10.11/Documentation/ABI/testing/debugfs-aufs +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/ABI/testing/debugfs-aufs 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,50 @@ +What: /debug/aufs/si_/ +Date: March 2009 @@ -59,8 +61,10 @@ + be created. + When the aufs mount option 'noxino' is specified, it + will be empty. About XINO files, see the aufs manual. ---- a/Documentation/ABI/testing/sysfs-aufs 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/ABI/testing/sysfs-aufs 2012-01-10 02:15:56.000000000 +0000 +Index: linux-3.10-3.10.11/Documentation/ABI/testing/sysfs-aufs +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/ABI/testing/sysfs-aufs 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,24 @@ +What: /sys/fs/aufs/si_/ +Date: March 2009 @@ -86,8 +90,10 @@ + even if it is the default path. + When the aufs mount option 'noxino' is specified, it + will be empty. About XINO files, see the aufs manual. ---- a/Documentation/filesystems/aufs/README 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/README 2013-08-07 14:04:57.879008639 +0100 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/README +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/README 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,346 @@ + +Aufs3 -- advanced multi layered unification filesystem version 3.x @@ -435,8 +441,10 @@ +# Local variables: ; +# mode: text; +# End: ; ---- a/Documentation/filesystems/aufs/design/01intro.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/01intro.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/01intro.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/01intro.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,162 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -600,8 +608,10 @@ +Some people may think it is better to pass such work to user space +helper, instead of doing in kernel space. Actually I am still thinking +about it. But currently I have implemented it in kernel space. ---- a/Documentation/filesystems/aufs/design/02struct.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/02struct.txt 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/02struct.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/02struct.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,243 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -846,8 +856,10 @@ +- etc. + +For this purpose, use "aumvdown" command in aufs-util.git. ---- a/Documentation/filesystems/aufs/design/03lookup.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/03lookup.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/03lookup.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/03lookup.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,106 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -955,8 +967,10 @@ + test, and skip therevalidatin in step 4. It is useful and improves + aufs performance when system surely hide the aufs branches from user, + by over-mounting something (or another method). ---- a/Documentation/filesystems/aufs/design/04branch.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/04branch.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/04branch.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/04branch.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,76 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1034,8 +1048,10 @@ + - a file on the branch is mmap-ed. + - a regular file on the branch is opened for write and there is no + same named entry on the upper branch. ---- a/Documentation/filesystems/aufs/design/05wbr_policy.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/05wbr_policy.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/05wbr_policy.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/05wbr_policy.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,65 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1102,8 +1118,10 @@ + where the source and the target exists and selects the higher + one. If the selected branch is readonly, then aufs follows the + copyup policy. ---- a/Documentation/filesystems/aufs/design/06mmap.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/06mmap.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/06mmap.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/06mmap.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,47 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1152,8 +1170,10 @@ +generic_file_mmap() and handles struct vm_operations_struct. In this +approach, aufs met a hard problem and I could not solve it without +switching the approach. ---- a/Documentation/filesystems/aufs/design/07export.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/07export.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/07export.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/07export.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,59 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1214,8 +1234,10 @@ + convert it into ESTALE for NFSD. +- readdir(): call lockdep_on/off() because filldir in NFSD calls + lookup_one_len(), vfs_getattr(), encode_fh() and others. ---- a/Documentation/filesystems/aufs/design/08shwh.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/08shwh.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/08shwh.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/08shwh.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,53 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1270,8 +1292,10 @@ + +This new squashfs archive can be stored on the boot device and the +initramfs will use it to replace the old one at the next boot. ---- a/Documentation/filesystems/aufs/design/10dynop.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/10dynop.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/10dynop.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/10dynop.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,47 @@ + +# Copyright (C) 2010-2013 Junjiro R. Okajima @@ -1320,8 +1344,10 @@ +XIP mainly. +Currently this approach is applied to file_operations and +vm_operations_struct for regular files only. ---- a/Documentation/filesystems/aufs/design/99plan.txt 1970-01-01 01:00:00.000000000 +0100 -+++ b/Documentation/filesystems/aufs/design/99plan.txt 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/Documentation/filesystems/aufs/design/99plan.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/filesystems/aufs/design/99plan.txt 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,96 @@ + +# Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1419,8 +1445,10 @@ +Opened File) is specified (by default), aufs returns the filedata from +/new. +Otherwise from /new. ---- a/fs/aufs/Kconfig 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/Kconfig 2013-08-31 18:32:36.447371122 +0100 +Index: linux-3.10-3.10.11/fs/aufs/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/Kconfig 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,202 @@ +config AUFS_FS + tristate "Aufs (Advanced multi layered unification filesystem) support" @@ -1624,8 +1652,10 @@ + Automatic configuration for internal use. + When aufs supports Magic SysRq, enabled automatically. +endif ---- a/fs/aufs/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/Makefile 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/Makefile 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,42 @@ + +include ${src}/magic.mk @@ -1669,8 +1699,10 @@ +aufs-$(CONFIG_AUFS_BR_HFSPLUS) += hfsplus.o +aufs-$(CONFIG_AUFS_DEBUG) += debug.o +aufs-$(CONFIG_AUFS_MAGIC_SYSRQ) += sysrq.o ---- a/fs/aufs/aufs.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/aufs.h 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/aufs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/aufs.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,60 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -1732,8 +1764,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_H__ */ ---- a/fs/aufs/branch.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/branch.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/branch.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/branch.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1213 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -2948,8 +2982,10 @@ + AuTraceErr(err); + return err; +} ---- a/fs/aufs/branch.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/branch.h 2013-08-07 14:04:57.883008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/branch.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/branch.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,255 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -3206,8 +3242,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_BRANCH_H__ */ ---- a/fs/aufs/conf.mk 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/conf.mk 2012-01-10 02:15:56.000000000 +0000 +Index: linux-3.10-3.10.11/fs/aufs/conf.mk +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/conf.mk 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,38 @@ + +AuConfStr = CONFIG_AUFS_FS=${CONFIG_AUFS_FS} @@ -3247,8 +3285,10 @@ +${obj}/sysfs.o: ${AuConfName} + +-include ${srctree}/${src}/conf_priv.mk ---- a/fs/aufs/cpup.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/cpup.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/cpup.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/cpup.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1266 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -4516,8 +4556,10 @@ + dput(parent); + return err; +} ---- a/fs/aufs/cpup.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/cpup.h 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/cpup.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/cpup.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,93 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -4612,8 +4654,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_CPUP_H__ */ ---- a/fs/aufs/dbgaufs.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dbgaufs.c 2013-08-07 14:04:57.883008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dbgaufs.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dbgaufs.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,433 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -5048,8 +5092,10 @@ + err = 0; + return err; +} ---- a/fs/aufs/dbgaufs.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dbgaufs.h 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/dbgaufs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dbgaufs.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,49 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -5100,8 +5146,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __DBGAUFS_H__ */ ---- a/fs/aufs/dcsub.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dcsub.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dcsub.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dcsub.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,243 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -5346,8 +5394,10 @@ + + return path_is_under(path + 0, path + 1); +} ---- a/fs/aufs/dcsub.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dcsub.h 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/dcsub.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dcsub.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -5443,8 +5493,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DCSUB_H__ */ ---- a/fs/aufs/debug.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/debug.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/debug.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/debug.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,491 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -5937,8 +5989,10 @@ + + return 0; +} ---- a/fs/aufs/debug.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/debug.h 2013-08-07 14:04:57.883008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/debug.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/debug.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,242 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -6182,8 +6236,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DEBUG_H__ */ ---- a/fs/aufs/dentry.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dentry.c 2013-08-07 14:04:57.883008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dentry.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dentry.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1065 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -7250,8 +7306,10 @@ + .d_weak_revalidate = aufs_d_revalidate, + .d_release = aufs_d_release +}; ---- a/fs/aufs/dentry.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dentry.h 2013-08-07 14:04:57.883008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dentry.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dentry.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,234 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -7487,8 +7545,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DENTRY_H__ */ ---- a/fs/aufs/dinfo.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dinfo.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dinfo.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dinfo.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,543 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -8033,8 +8093,10 @@ + return bindex; + return -1; +} ---- a/fs/aufs/dir.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dir.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dir.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dir.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,632 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -8668,8 +8730,10 @@ + .flush = aufs_flush_dir, + .fsync = aufs_fsync_dir +}; ---- a/fs/aufs/dir.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dir.h 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dir.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dir.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,137 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -8808,8 +8872,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DIR_H__ */ ---- a/fs/aufs/dynop.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dynop.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/dynop.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dynop.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,379 @@ +/* + * Copyright (C) 2010-2013 Junjiro R. Okajima @@ -9190,8 +9256,10 @@ + for (i = 0; i < AuDyLast; i++) + WARN_ON(!list_empty(&dynop[i].head)); +} ---- a/fs/aufs/dynop.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/dynop.h 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/dynop.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/dynop.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,76 @@ +/* + * Copyright (C) 2010-2013 Junjiro R. Okajima @@ -9269,8 +9337,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_DYNOP_H__ */ ---- a/fs/aufs/export.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/export.c 2013-08-31 18:37:41.071378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/export.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/export.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,826 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -10098,8 +10168,10 @@ + BUILD_BUG_ON(sizeof(u) != sizeof(int)); + atomic_set(&sbinfo->si_xigen_next, u); +} ---- a/fs/aufs/f_op.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/f_op.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/f_op.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/f_op.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,721 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -10822,8 +10894,10 @@ + .aio_splice_read = aufs_aio_splice_read +#endif +}; ---- a/fs/aufs/f_op_sp.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/f_op_sp.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/f_op_sp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/f_op_sp.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,383 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -11208,8 +11282,10 @@ + + return ret; +} ---- a/fs/aufs/file.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/file.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/file.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/file.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,708 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -11919,8 +11995,10 @@ + .swap_deactivate = aufs_swap_deactivate +#endif /* CONFIG_AUFS_DEBUG */ +}; ---- a/fs/aufs/file.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/file.h 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/file.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/file.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -12232,8 +12310,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FILE_H__ */ ---- a/fs/aufs/finfo.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/finfo.c 2013-03-10 01:48:58.459093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/finfo.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/finfo.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -12392,8 +12472,10 @@ +out: + return err; +} ---- a/fs/aufs/fstype.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/fstype.h 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/fstype.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/fstype.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,470 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -12865,8 +12947,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_FSTYPE_H__ */ ---- a/fs/aufs/hfsnotify.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/hfsnotify.c 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/hfsnotify.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/hfsnotify.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,296 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -13164,8 +13248,10 @@ + .fin_br = au_hfsn_fin_br, + .init_br = au_hfsn_init_br +}; ---- a/fs/aufs/hfsplus.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/hfsplus.c 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/hfsplus.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/hfsplus.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2010-2013 Junjiro R. Okajima @@ -13223,8 +13309,10 @@ + au_sbr_put(dentry->d_sb, bindex); + } +} ---- a/fs/aufs/hnotify.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/hnotify.c 2013-08-31 18:37:41.075378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/hnotify.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/hnotify.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,712 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -13938,8 +14026,10 @@ + if (au_cachep[AuCache_HNOTIFY]) + au_hn_destroy_cache(); +} ---- a/fs/aufs/i_op.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/i_op.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/i_op.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/i_op.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1115 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -15056,8 +15146,10 @@ + + .update_time = aufs_update_time +}; ---- a/fs/aufs/i_op_add.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/i_op_add.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/i_op_add.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/i_op_add.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,739 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -15798,8 +15890,10 @@ +out: + return err; +} ---- a/fs/aufs/i_op_del.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/i_op_del.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/i_op_del.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/i_op_del.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,502 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -16303,8 +16397,10 @@ + AuTraceErr(err); + return err; +} ---- a/fs/aufs/i_op_ren.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/i_op_ren.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/i_op_ren.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/i_op_ren.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1009 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -17315,8 +17411,10 @@ + AuTraceErr(err); + return err; +} ---- a/fs/aufs/iinfo.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/iinfo.c 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/iinfo.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/iinfo.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,276 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -17594,8 +17692,10 @@ + iinfo->ii_hinode = NULL; + AuRwDestroy(&iinfo->ii_rwsem); +} ---- a/fs/aufs/inode.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/inode.c 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/inode.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/inode.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,492 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -18089,8 +18189,10 @@ + mask |= MAY_READ; /* force permission check */ + return au_test_h_perm(h_inode, mask); +} ---- a/fs/aufs/inode.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/inode.h 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/inode.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/inode.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,600 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -18692,8 +18794,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_INODE_H__ */ ---- a/fs/aufs/ioctl.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/ioctl.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/ioctl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/ioctl.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,202 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -18897,8 +19001,10 @@ + return aufs_ioctl_nondir(file, cmd, (unsigned long)compat_ptr(arg)); +} +#endif ---- a/fs/aufs/loop.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/loop.c 2013-08-31 18:37:41.079378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/loop.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/loop.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,135 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -19035,8 +19141,10 @@ +{ + kfree(au_warn_loopback_array); +} ---- a/fs/aufs/loop.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/loop.h 2013-08-31 18:37:41.079378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/loop.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/loop.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,50 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -19088,8 +19196,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_LOOP_H__ */ ---- a/fs/aufs/magic.mk 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/magic.mk 2012-01-10 02:15:56.000000000 +0000 +Index: linux-3.10-3.10.11/fs/aufs/magic.mk +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/magic.mk 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,54 @@ + +# defined in ${srctree}/fs/fuse/inode.c @@ -19145,8 +19255,10 @@ +ifdef CONFIG_HFSPLUS_FS +ccflags-y += -DHFSPLUS_SUPER_MAGIC=0x482b +endif ---- a/fs/aufs/module.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/module.c 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/module.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/module.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,203 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -19351,8 +19463,10 @@ + +module_init(aufs_init); +module_exit(aufs_exit); ---- a/fs/aufs/module.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/module.h 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/module.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/module.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -19459,8 +19573,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_MODULE_H__ */ ---- a/fs/aufs/mvdown.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/mvdown.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/mvdown.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/mvdown.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,562 @@ +/* + * Copyright (C) 2011-2013 Junjiro R. Okajima @@ -20024,8 +20140,10 @@ + AuTraceErr(err); + return err; +} ---- a/fs/aufs/opts.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/opts.c 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/opts.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/opts.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1697 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -21724,8 +21842,10 @@ +{ + return au_mntflags(sb) & AuOptMask_UDBA; +} ---- a/fs/aufs/opts.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/opts.h 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/opts.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/opts.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,209 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -21936,8 +22056,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_OPTS_H__ */ ---- a/fs/aufs/plink.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/plink.c 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/plink.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/plink.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,520 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -22459,8 +22581,10 @@ + } + } +} ---- a/fs/aufs/poll.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/poll.c 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/poll.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/poll.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -22518,8 +22642,10 @@ + AuTraceErr((int)mask); + return mask; +} ---- a/fs/aufs/procfs.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/procfs.c 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/procfs.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/procfs.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,170 @@ +/* + * Copyright (C) 2010-2013 Junjiro R. Okajima @@ -22691,8 +22817,10 @@ +out: + return err; +} ---- a/fs/aufs/rdu.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/rdu.c 2013-08-31 18:37:41.079378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/rdu.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/rdu.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,384 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -23078,8 +23206,10 @@ + return err; +} +#endif ---- a/fs/aufs/rwsem.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/rwsem.h 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/rwsem.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/rwsem.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,188 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -23269,8 +23399,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_RWSEM_H__ */ ---- a/fs/aufs/sbinfo.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/sbinfo.c 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/sbinfo.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/sbinfo.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,346 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -23618,8 +23750,10 @@ + p = radix_tree_delete(&sbinfo->au_si_pid.tree, current->pid); + spin_unlock(&sbinfo->au_si_pid.tree_lock); +} ---- a/fs/aufs/spl.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/spl.h 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/spl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/spl.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,112 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -23733,8 +23867,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_SPL_H__ */ ---- a/fs/aufs/super.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/super.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/super.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/super.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,992 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -24728,8 +24864,10 @@ + /* no need to __module_get() and module_put(). */ + .owner = THIS_MODULE, +}; ---- a/fs/aufs/super.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/super.h 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/super.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/super.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,559 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -25290,8 +25428,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_SUPER_H__ */ ---- a/fs/aufs/sysaufs.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/sysaufs.c 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/sysaufs.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/sysaufs.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,105 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -25398,8 +25538,10 @@ +out: + return err; +} ---- a/fs/aufs/sysaufs.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/sysaufs.h 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/sysaufs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/sysaufs.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -25505,8 +25647,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __SYSAUFS_H__ */ ---- a/fs/aufs/sysfs.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/sysfs.c 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/sysfs.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/sysfs.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,257 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -25765,8 +25909,10 @@ + br->br_name, err); + } +} ---- a/fs/aufs/sysrq.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/sysrq.c 2013-08-07 14:04:57.887008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/sysrq.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/sysrq.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,151 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -25919,8 +26065,10 @@ + if (unlikely(err)) + pr_err("err %d (ignored)\n", err); +} ---- a/fs/aufs/vdir.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/vdir.c 2013-08-31 18:37:41.079378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/vdir.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/vdir.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,878 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -26800,8 +26948,10 @@ + /* smp_mb(); */ + return 0; +} ---- a/fs/aufs/vfsub.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/vfsub.c 2013-08-31 18:37:41.079378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/vfsub.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/vfsub.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,769 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -27572,8 +27722,10 @@ + + return err; +} ---- a/fs/aufs/vfsub.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/vfsub.h 2013-08-31 18:37:41.083378381 +0100 +Index: linux-3.10-3.10.11/fs/aufs/vfsub.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/vfsub.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,294 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -27869,8 +28021,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_VFSUB_H__ */ ---- a/fs/aufs/wbr_policy.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/wbr_policy.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/wbr_policy.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/wbr_policy.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,693 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -28565,8 +28719,10 @@ + .fin = au_wbr_create_fin_mfs + } +}; ---- a/fs/aufs/whout.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/whout.c 2013-08-07 14:04:57.891008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/whout.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/whout.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1022 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -29590,8 +29746,10 @@ + au_whtmp_rmdir_free(args); + } +} ---- a/fs/aufs/whout.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/whout.h 2013-06-02 18:23:34.753538984 +0100 +Index: linux-3.10-3.10.11/fs/aufs/whout.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/whout.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -29680,8 +29838,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WHOUT_H__ */ ---- a/fs/aufs/wkq.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/wkq.c 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/fs/aufs/wkq.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/wkq.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,213 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -29896,8 +30056,10 @@ + + return err; +} ---- a/fs/aufs/wkq.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/wkq.h 2013-03-10 01:48:58.463093058 +0000 +Index: linux-3.10-3.10.11/fs/aufs/wkq.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/wkq.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,92 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -29991,8 +30153,10 @@ + +#endif /* __KERNEL__ */ +#endif /* __AUFS_WKQ_H__ */ ---- a/fs/aufs/xino.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/fs/aufs/xino.c 2013-08-07 14:04:57.891008639 +0100 +Index: linux-3.10-3.10.11/fs/aufs/xino.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/xino.c 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,1264 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima @@ -31258,8 +31422,10 @@ +out: + return err; +} ---- a/include/linux/aufs_type.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/include/linux/aufs_type.h 2013-08-07 14:04:57.891008639 +0100 +Index: linux-3.10-3.10.11/include/linux/aufs_type.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/aufs_type.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2012-2013 Junjiro R. Okajima @@ -31280,8 +31446,10 @@ + */ + +#include ---- a/include/uapi/linux/aufs_type.h 1970-01-01 01:00:00.000000000 +0100 -+++ b/include/uapi/linux/aufs_type.h 2013-08-31 18:37:45.995378498 +0100 +Index: linux-3.10-3.10.11/include/uapi/linux/aufs_type.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/linux/aufs_type.h 2014-04-28 00:33:08.000000000 +0000 @@ -0,0 +1,270 @@ +/* + * Copyright (C) 2005-2013 Junjiro R. Okajima diff -Nru linux-3.10.11/debian/patches/features/all/aufs3/aufs3-base.patch linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-base.patch --- linux-3.10.11/debian/patches/features/all/aufs3/aufs3-base.patch 2013-08-31 17:37:57.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-base.patch 2014-04-28 00:33:05.000000000 +0000 @@ -8,11 +8,11 @@ aufs3.10 base patch -diff --git a/fs/file_table.c b/fs/file_table.c -index 485dc0e..8db8096 100644 ---- a/fs/file_table.c -+++ b/fs/file_table.c -@@ -36,7 +36,7 @@ struct files_stat_struct files_stat = { +Index: linux-3.10-3.10.11/fs/file_table.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/file_table.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/file_table.c 2014-04-28 00:33:04.000000000 +0000 +@@ -36,7 +36,7 @@ .max_files = NR_FILE }; @@ -21,11 +21,11 @@ /* SLAB cache for file structures */ static struct kmem_cache *filp_cachep __read_mostly; -diff --git a/fs/inode.c b/fs/inode.c -index 00d5fc3..f324521 100644 ---- a/fs/inode.c -+++ b/fs/inode.c -@@ -1498,7 +1498,7 @@ static int relatime_need_update(struct vfsmount *mnt, struct inode *inode, +Index: linux-3.10-3.10.11/fs/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/inode.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/inode.c 2014-04-28 00:33:04.000000000 +0000 +@@ -1498,7 +1498,7 @@ * This does the actual work of updating an inodes time or version. Must have * had called mnt_want_write() before calling this. */ @@ -34,11 +34,11 @@ { if (inode->i_op->update_time) return inode->i_op->update_time(inode, time, flags); -diff --git a/fs/splice.c b/fs/splice.c -index d37431d..987346f 100644 ---- a/fs/splice.c -+++ b/fs/splice.c -@@ -1093,8 +1093,8 @@ EXPORT_SYMBOL(generic_splice_sendpage); +Index: linux-3.10-3.10.11/fs/splice.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/splice.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/splice.c 2014-04-28 00:33:04.000000000 +0000 +@@ -1093,8 +1093,8 @@ /* * Attempt to initiate a splice from pipe to file. */ @@ -49,7 +49,7 @@ { ssize_t (*splice_write)(struct pipe_inode_info *, struct file *, loff_t *, size_t, unsigned int); -@@ -1124,9 +1124,9 @@ static long do_splice_from(struct pipe_inode_info *pipe, struct file *out, +@@ -1124,9 +1124,9 @@ /* * Attempt to initiate a splice from a file to a pipe. */ @@ -62,11 +62,11 @@ { ssize_t (*splice_read)(struct file *, loff_t *, struct pipe_inode_info *, size_t, unsigned int); -diff --git a/include/linux/fs.h b/include/linux/fs.h -index 65c2be2..0148214 100644 ---- a/include/linux/fs.h -+++ b/include/linux/fs.h -@@ -2574,6 +2574,7 @@ extern int inode_change_ok(const struct inode *, struct iattr *); +Index: linux-3.10-3.10.11/include/linux/fs.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/fs.h 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/fs.h 2014-04-28 00:33:04.000000000 +0000 +@@ -2574,6 +2574,7 @@ extern int inode_newsize_ok(const struct inode *, loff_t offset); extern void setattr_copy(struct inode *inode, const struct iattr *attr); @@ -74,11 +74,11 @@ extern int file_update_time(struct file *file); extern int generic_show_options(struct seq_file *m, struct dentry *root); -diff --git a/include/linux/splice.h b/include/linux/splice.h -index 74575cb..bfc6fb6 100644 ---- a/include/linux/splice.h -+++ b/include/linux/splice.h -@@ -92,4 +92,10 @@ extern void splice_shrink_spd(struct splice_pipe_desc *); +Index: linux-3.10-3.10.11/include/linux/splice.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/splice.h 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/splice.h 2014-04-28 00:33:04.000000000 +0000 +@@ -92,4 +92,10 @@ extern void spd_release_page(struct splice_pipe_desc *, unsigned int); extern const struct pipe_buf_operations page_cache_pipe_buf_ops; diff -Nru linux-3.10.11/debian/patches/features/all/aufs3/aufs3-kbuild.patch linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-kbuild.patch --- linux-3.10.11/debian/patches/features/all/aufs3/aufs3-kbuild.patch 2013-08-31 17:37:57.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-kbuild.patch 2014-04-28 00:33:08.000000000 +0000 @@ -8,11 +8,11 @@ aufs3.10 kbuild patch -diff --git a/fs/Kconfig b/fs/Kconfig -index c229f82..397b473 100644 ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -212,6 +212,7 @@ source "fs/ufs/Kconfig" +Index: linux-3.10-3.10.11/fs/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/fs/Kconfig 2014-04-27 23:40:51.000000000 +0000 ++++ linux-3.10-3.10.11/fs/Kconfig 2014-04-28 00:33:07.000000000 +0000 +@@ -212,6 +212,7 @@ source "fs/exofs/Kconfig" source "fs/f2fs/Kconfig" source "fs/efivarfs/Kconfig" @@ -20,20 +20,20 @@ endif # MISC_FILESYSTEMS -diff --git a/fs/Makefile b/fs/Makefile -index 4fe6df3..4a57676 100644 ---- a/fs/Makefile -+++ b/fs/Makefile -@@ -126,3 +126,4 @@ obj-y += exofs/ # Multiple modules +Index: linux-3.10-3.10.11/fs/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/fs/Makefile 2014-04-27 23:40:51.000000000 +0000 ++++ linux-3.10-3.10.11/fs/Makefile 2014-04-28 00:33:07.000000000 +0000 +@@ -126,3 +126,4 @@ obj-$(CONFIG_CEPH_FS) += ceph/ obj-$(CONFIG_PSTORE) += pstore/ obj-$(CONFIG_EFIVAR_FS) += efivarfs/ +obj-$(CONFIG_AUFS_FS) += aufs/ -diff --git a/include/uapi/linux/Kbuild b/include/uapi/linux/Kbuild -index bdc6e87..349600c 100644 ---- a/include/uapi/linux/Kbuild -+++ b/include/uapi/linux/Kbuild -@@ -56,6 +56,7 @@ header-y += atmppp.h +Index: linux-3.10-3.10.11/include/uapi/linux/Kbuild +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/linux/Kbuild 2014-04-27 23:40:51.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/linux/Kbuild 2014-04-28 00:33:07.000000000 +0000 +@@ -56,6 +56,7 @@ header-y += atmsap.h header-y += atmsvc.h header-y += audit.h diff -Nru linux-3.10.11/debian/patches/features/all/aufs3/aufs3-standalone.patch linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-standalone.patch --- linux-3.10.11/debian/patches/features/all/aufs3/aufs3-standalone.patch 2013-08-31 17:37:57.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs3-standalone.patch 2014-04-28 00:33:07.000000000 +0000 @@ -8,11 +8,11 @@ aufs3.10 standalone patch -diff --git a/fs/file_table.c b/fs/file_table.c -index 8db8096..e271e28 100644 ---- a/fs/file_table.c -+++ b/fs/file_table.c -@@ -37,6 +37,7 @@ struct files_stat_struct files_stat = { +Index: linux-3.10-3.10.11/fs/file_table.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/file_table.c 2014-04-28 00:33:04.000000000 +0000 ++++ linux-3.10-3.10.11/fs/file_table.c 2014-04-28 00:33:05.000000000 +0000 +@@ -37,6 +37,7 @@ }; DEFINE_LGLOCK(files_lglock); @@ -20,7 +20,7 @@ /* SLAB cache for file structures */ static struct kmem_cache *filp_cachep __read_mostly; -@@ -405,6 +406,8 @@ void file_sb_list_del(struct file *file) +@@ -405,6 +406,8 @@ } } @@ -29,11 +29,11 @@ #ifdef CONFIG_SMP /* -diff --git a/fs/inode.c b/fs/inode.c -index f324521..bff7670 100644 ---- a/fs/inode.c -+++ b/fs/inode.c -@@ -56,6 +56,7 @@ static struct hlist_head *inode_hashtable __read_mostly; +Index: linux-3.10-3.10.11/fs/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/inode.c 2014-04-28 00:33:04.000000000 +0000 ++++ linux-3.10-3.10.11/fs/inode.c 2014-04-28 00:33:05.000000000 +0000 +@@ -56,6 +56,7 @@ static __cacheline_aligned_in_smp DEFINE_SPINLOCK(inode_hash_lock); __cacheline_aligned_in_smp DEFINE_SPINLOCK(inode_sb_list_lock); @@ -41,7 +41,7 @@ /* * Empty aops. Can be used for the cases where the user does not -@@ -1514,6 +1515,7 @@ int update_time(struct inode *inode, struct timespec *time, int flags) +@@ -1514,6 +1515,7 @@ mark_inode_dirty_sync(inode); return 0; } @@ -49,11 +49,11 @@ /** * touch_atime - update the access time -diff --git a/fs/namespace.c b/fs/namespace.c -index 7b1ca9b..51db6ad 100644 ---- a/fs/namespace.c -+++ b/fs/namespace.c -@@ -54,6 +54,7 @@ EXPORT_SYMBOL_GPL(fs_kobj); +Index: linux-3.10-3.10.11/fs/namespace.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/namespace.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/namespace.c 2014-04-28 00:33:05.000000000 +0000 +@@ -54,6 +54,7 @@ * tree or hash is modified or when a vfsmount structure is modified. */ DEFINE_BRLOCK(vfsmount_lock); @@ -61,7 +61,7 @@ static inline unsigned long hash(struct vfsmount *mnt, struct dentry *dentry) { -@@ -427,6 +428,7 @@ void __mnt_drop_write(struct vfsmount *mnt) +@@ -427,6 +428,7 @@ mnt_dec_writers(real_mount(mnt)); preempt_enable(); } @@ -69,7 +69,7 @@ /** * mnt_drop_write - give up write access to a mount -@@ -1456,6 +1458,7 @@ int iterate_mounts(int (*f)(struct vfsmount *, void *), void *arg, +@@ -1456,6 +1458,7 @@ } return 0; } @@ -77,10 +77,10 @@ static void cleanup_group_ids(struct mount *mnt, struct mount *end) { -diff --git a/fs/notify/group.c b/fs/notify/group.c -index bd2625b..2ff2a0f 100644 ---- a/fs/notify/group.c -+++ b/fs/notify/group.c +Index: linux-3.10-3.10.11/fs/notify/group.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/notify/group.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/notify/group.c 2014-04-28 00:33:05.000000000 +0000 @@ -22,6 +22,7 @@ #include #include @@ -89,7 +89,7 @@ #include #include "fsnotify.h" -@@ -65,6 +66,7 @@ void fsnotify_get_group(struct fsnotify_group *group) +@@ -65,6 +66,7 @@ { atomic_inc(&group->refcnt); } @@ -97,7 +97,7 @@ /* * Drop a reference to a group. Free it if it's through. -@@ -74,6 +76,7 @@ void fsnotify_put_group(struct fsnotify_group *group) +@@ -74,6 +76,7 @@ if (atomic_dec_and_test(&group->refcnt)) fsnotify_final_destroy_group(group); } @@ -105,7 +105,7 @@ /* * Create a new fsnotify_group and hold a reference for the group returned. -@@ -102,6 +105,7 @@ struct fsnotify_group *fsnotify_alloc_group(const struct fsnotify_ops *ops) +@@ -102,6 +105,7 @@ return group; } @@ -113,11 +113,11 @@ int fsnotify_fasync(int fd, struct file *file, int on) { -diff --git a/fs/notify/mark.c b/fs/notify/mark.c -index fc6b49b..a6bb87d 100644 ---- a/fs/notify/mark.c -+++ b/fs/notify/mark.c -@@ -115,6 +115,7 @@ void fsnotify_put_mark(struct fsnotify_mark *mark) +Index: linux-3.10-3.10.11/fs/notify/mark.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/notify/mark.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/notify/mark.c 2014-04-28 00:33:05.000000000 +0000 +@@ -115,6 +115,7 @@ mark->free_mark(mark); } } @@ -125,7 +125,7 @@ /* * Any time a mark is getting freed we end up here. -@@ -197,6 +198,7 @@ void fsnotify_destroy_mark(struct fsnotify_mark *mark, +@@ -197,6 +198,7 @@ fsnotify_destroy_mark_locked(mark, group); mutex_unlock(&group->mark_mutex); } @@ -133,7 +133,7 @@ void fsnotify_set_mark_mask_locked(struct fsnotify_mark *mark, __u32 mask) { -@@ -281,6 +283,7 @@ err: +@@ -281,6 +283,7 @@ return ret; } @@ -141,7 +141,7 @@ int fsnotify_add_mark(struct fsnotify_mark *mark, struct fsnotify_group *group, struct inode *inode, struct vfsmount *mnt, int allow_dups) -@@ -342,6 +345,7 @@ void fsnotify_init_mark(struct fsnotify_mark *mark, +@@ -342,6 +345,7 @@ atomic_set(&mark->refcnt, 1); mark->free_mark = free_mark; } @@ -149,11 +149,11 @@ static int fsnotify_mark_destroy(void *ignored) { -diff --git a/fs/open.c b/fs/open.c -index 8c74100..be563cd 100644 ---- a/fs/open.c -+++ b/fs/open.c -@@ -61,6 +61,7 @@ int do_truncate(struct dentry *dentry, loff_t length, unsigned int time_attrs, +Index: linux-3.10-3.10.11/fs/open.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/open.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/fs/open.c 2014-04-28 00:33:05.000000000 +0000 +@@ -61,6 +61,7 @@ mutex_unlock(&dentry->d_inode->i_mutex); return ret; } @@ -161,11 +161,11 @@ long vfs_truncate(struct path *path, loff_t length) { -diff --git a/fs/splice.c b/fs/splice.c -index 987346f..8d6a045 100644 ---- a/fs/splice.c -+++ b/fs/splice.c -@@ -1120,6 +1120,7 @@ long do_splice_from(struct pipe_inode_info *pipe, struct file *out, +Index: linux-3.10-3.10.11/fs/splice.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/splice.c 2014-04-28 00:33:04.000000000 +0000 ++++ linux-3.10-3.10.11/fs/splice.c 2014-04-28 00:33:05.000000000 +0000 +@@ -1120,6 +1120,7 @@ file_end_write(out); return ret; } @@ -173,7 +173,7 @@ /* * Attempt to initiate a splice from a file to a pipe. -@@ -1146,6 +1147,7 @@ long do_splice_to(struct file *in, loff_t *ppos, +@@ -1146,6 +1147,7 @@ return splice_read(in, ppos, pipe, len, flags); } @@ -181,11 +181,11 @@ /** * splice_direct_to_actor - splices data directly between two non-pipes -diff --git a/security/commoncap.c b/security/commoncap.c -index c44b6fe..d78b003 100644 ---- a/security/commoncap.c -+++ b/security/commoncap.c -@@ -988,9 +988,11 @@ int cap_mmap_addr(unsigned long addr) +Index: linux-3.10-3.10.11/security/commoncap.c +=================================================================== +--- linux-3.10-3.10.11.orig/security/commoncap.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/security/commoncap.c 2014-04-28 00:33:05.000000000 +0000 +@@ -988,9 +988,11 @@ } return ret; } @@ -197,10 +197,10 @@ return 0; } +EXPORT_SYMBOL_GPL(cap_mmap_file); -diff --git a/security/device_cgroup.c b/security/device_cgroup.c -index dd0dc57..9760ecb6 100644 ---- a/security/device_cgroup.c -+++ b/security/device_cgroup.c +Index: linux-3.10-3.10.11/security/device_cgroup.c +=================================================================== +--- linux-3.10-3.10.11.orig/security/device_cgroup.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/security/device_cgroup.c 2014-04-28 00:33:05.000000000 +0000 @@ -7,6 +7,7 @@ #include #include @@ -209,7 +209,7 @@ #include #include #include -@@ -789,6 +790,7 @@ int __devcgroup_inode_permission(struct inode *inode, int mask) +@@ -789,6 +790,7 @@ return __devcgroup_check_permission(type, imajor(inode), iminor(inode), access); } @@ -217,11 +217,11 @@ int devcgroup_inode_mknod(int mode, dev_t dev) { -diff --git a/security/security.c b/security/security.c -index a3dce87..06a6ea6 100644 ---- a/security/security.c -+++ b/security/security.c -@@ -396,6 +396,7 @@ int security_path_rmdir(struct path *dir, struct dentry *dentry) +Index: linux-3.10-3.10.11/security/security.c +=================================================================== +--- linux-3.10-3.10.11.orig/security/security.c 2014-04-27 23:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/security/security.c 2014-04-28 00:33:05.000000000 +0000 +@@ -396,6 +396,7 @@ return 0; return security_ops->path_rmdir(dir, dentry); } @@ -229,7 +229,7 @@ int security_path_unlink(struct path *dir, struct dentry *dentry) { -@@ -412,6 +413,7 @@ int security_path_symlink(struct path *dir, struct dentry *dentry, +@@ -412,6 +413,7 @@ return 0; return security_ops->path_symlink(dir, dentry, old_name); } @@ -237,7 +237,7 @@ int security_path_link(struct dentry *old_dentry, struct path *new_dir, struct dentry *new_dentry) -@@ -420,6 +422,7 @@ int security_path_link(struct dentry *old_dentry, struct path *new_dir, +@@ -420,6 +422,7 @@ return 0; return security_ops->path_link(old_dentry, new_dir, new_dentry); } @@ -245,7 +245,7 @@ int security_path_rename(struct path *old_dir, struct dentry *old_dentry, struct path *new_dir, struct dentry *new_dentry) -@@ -438,6 +441,7 @@ int security_path_truncate(struct path *path) +@@ -438,6 +441,7 @@ return 0; return security_ops->path_truncate(path); } @@ -253,7 +253,7 @@ int security_path_chmod(struct path *path, umode_t mode) { -@@ -445,6 +449,7 @@ int security_path_chmod(struct path *path, umode_t mode) +@@ -445,6 +449,7 @@ return 0; return security_ops->path_chmod(path, mode); } @@ -261,7 +261,7 @@ int security_path_chown(struct path *path, kuid_t uid, kgid_t gid) { -@@ -452,6 +457,7 @@ int security_path_chown(struct path *path, kuid_t uid, kgid_t gid) +@@ -452,6 +457,7 @@ return 0; return security_ops->path_chown(path, uid, gid); } @@ -269,7 +269,7 @@ int security_path_chroot(struct path *path) { -@@ -528,6 +534,7 @@ int security_inode_readlink(struct dentry *dentry) +@@ -528,6 +534,7 @@ return 0; return security_ops->inode_readlink(dentry); } @@ -277,7 +277,7 @@ int security_inode_follow_link(struct dentry *dentry, struct nameidata *nd) { -@@ -542,6 +549,7 @@ int security_inode_permission(struct inode *inode, int mask) +@@ -542,6 +549,7 @@ return 0; return security_ops->inode_permission(inode, mask); } @@ -285,7 +285,7 @@ int security_inode_setattr(struct dentry *dentry, struct iattr *attr) { -@@ -663,6 +671,7 @@ int security_file_permission(struct file *file, int mask) +@@ -663,6 +671,7 @@ return fsnotify_perm(file, mask); } @@ -293,7 +293,7 @@ int security_file_alloc(struct file *file) { -@@ -723,6 +732,7 @@ int security_mmap_file(struct file *file, unsigned long prot, +@@ -723,6 +732,7 @@ return ret; return ima_file_mmap(file, prot); } diff -Nru linux-3.10.11/debian/patches/features/all/aufs3/aufs-mvdown-don-t-let-unprivileged-users-provoke-a-W.patch linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs-mvdown-don-t-let-unprivileged-users-provoke-a-W.patch --- linux-3.10.11/debian/patches/features/all/aufs3/aufs-mvdown-don-t-let-unprivileged-users-provoke-a-W.patch 2013-08-31 17:41:24.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/aufs3/aufs-mvdown-don-t-let-unprivileged-users-provoke-a-W.patch 2014-04-28 00:33:16.000000000 +0000 @@ -11,11 +11,11 @@ fs/aufs/mvdown.c | 2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) -diff --git a/fs/aufs/ioctl.c b/fs/aufs/ioctl.c -index 628d627..1ac7688 100644 ---- a/fs/aufs/ioctl.c -+++ b/fs/aufs/ioctl.c -@@ -152,7 +152,6 @@ long aufs_ioctl_nondir(struct file *file, unsigned int cmd, unsigned long arg) +Index: linux-3.10-3.10.11/fs/aufs/ioctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/aufs/ioctl.c 2014-04-28 00:33:08.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/ioctl.c 2014-04-28 00:33:16.000000000 +0000 +@@ -152,7 +152,6 @@ switch (cmd) { case AUFS_CTL_MVDOWN: @@ -23,11 +23,11 @@ err = au_mvdown(file->f_dentry, (void __user *)arg); break; -diff --git a/fs/aufs/mvdown.c b/fs/aufs/mvdown.c -index e68002e..5f56645 100644 ---- a/fs/aufs/mvdown.c -+++ b/fs/aufs/mvdown.c -@@ -489,6 +489,8 @@ int au_mvdown(struct dentry *dentry, struct aufs_mvdown __user *uarg) +Index: linux-3.10-3.10.11/fs/aufs/mvdown.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/aufs/mvdown.c 2014-04-28 00:33:08.000000000 +0000 ++++ linux-3.10-3.10.11/fs/aufs/mvdown.c 2014-04-28 00:33:16.000000000 +0000 +@@ -489,6 +489,8 @@ if (unlikely(!capable(CAP_SYS_ADMIN))) goto out; diff -Nru linux-3.10.11/debian/patches/features/all/cgroups-Allow-memory-cgroup-support-to-be-included-b.patch linux-3.10-3.10.11/debian/patches/features/all/cgroups-Allow-memory-cgroup-support-to-be-included-b.patch --- linux-3.10.11/debian/patches/features/all/cgroups-Allow-memory-cgroup-support-to-be-included-b.patch 2013-07-14 23:47:06.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/cgroups-Allow-memory-cgroup-support-to-be-included-b.patch 2013-12-23 10:41:51.000000000 +0000 @@ -17,9 +17,11 @@ mm/memcontrol.c | 3 +++ 4 files changed, 29 insertions(+), 6 deletions(-) ---- a/Documentation/kernel-parameters.txt -+++ b/Documentation/kernel-parameters.txt -@@ -449,8 +449,8 @@ bytes respectively. Such letter suffixes +Index: linux-3.10.11.rpi/Documentation/kernel-parameters.txt +=================================================================== +--- linux-3.10.11.rpi.orig/Documentation/kernel-parameters.txt 2013-12-23 10:39:19.000000000 +0000 ++++ linux-3.10.11.rpi/Documentation/kernel-parameters.txt 2013-12-23 10:41:50.000000000 +0000 +@@ -458,8 +458,8 @@ ccw_timeout_log [S390] See Documentation/s390/CommonIO for details. @@ -30,9 +32,11 @@ {Currently supported controllers - "memory"} checkreqprot [SELINUX] Set initial checkreqprot flag value. ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -845,6 +845,14 @@ config MEMCG +Index: linux-3.10.11.rpi/init/Kconfig +=================================================================== +--- linux-3.10.11.rpi.orig/init/Kconfig 2013-12-23 10:39:19.000000000 +0000 ++++ linux-3.10.11.rpi/init/Kconfig 2013-12-23 10:41:50.000000000 +0000 +@@ -890,6 +890,14 @@ This config option also selects MM_OWNER config option, which could in turn add some fork/exit overhead. @@ -47,9 +51,11 @@ config MEMCG_SWAP bool "Memory Resource Controller Swap Extension" depends on MEMCG && SWAP ---- a/kernel/cgroup.c -+++ b/kernel/cgroup.c -@@ -5193,7 +5193,7 @@ static void cgroup_release_agent(struct +Index: linux-3.10.11.rpi/kernel/cgroup.c +=================================================================== +--- linux-3.10.11.rpi.orig/kernel/cgroup.c 2013-12-23 10:39:19.000000000 +0000 ++++ linux-3.10.11.rpi/kernel/cgroup.c 2013-12-23 10:41:50.000000000 +0000 +@@ -5072,7 +5072,7 @@ mutex_unlock(&cgroup_mutex); } @@ -58,7 +64,7 @@ { int i; char *token; -@@ -5213,17 +5213,29 @@ static int __init cgroup_disable(char *s +@@ -5092,17 +5092,29 @@ continue; if (!strcmp(token, ss->name)) { @@ -91,9 +97,11 @@ /* * Functons for CSS ID. */ ---- a/mm/memcontrol.c -+++ b/mm/memcontrol.c -@@ -6789,6 +6789,9 @@ static void mem_cgroup_move_task(struct +Index: linux-3.10.11.rpi/mm/memcontrol.c +=================================================================== +--- linux-3.10.11.rpi.orig/mm/memcontrol.c 2013-12-23 10:39:19.000000000 +0000 ++++ linux-3.10.11.rpi/mm/memcontrol.c 2013-12-23 10:41:50.000000000 +0000 +@@ -6938,6 +6938,9 @@ struct cgroup_subsys mem_cgroup_subsys = { .name = "memory", diff -Nru linux-3.10.11/debian/patches/features/all/cpu-devices/Partially-revert-cpufreq-Add-support-for-x86-cpuinfo.patch linux-3.10-3.10.11/debian/patches/features/all/cpu-devices/Partially-revert-cpufreq-Add-support-for-x86-cpuinfo.patch --- linux-3.10.11/debian/patches/features/all/cpu-devices/Partially-revert-cpufreq-Add-support-for-x86-cpuinfo.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/cpu-devices/Partially-revert-cpufreq-Add-support-for-x86-cpuinfo.patch 2014-04-28 00:33:38.000000000 +0000 @@ -13,10 +13,10 @@ drivers/cpufreq/e_powersaver.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) -diff --git a/drivers/cpufreq/e_powersaver.c b/drivers/cpufreq/e_powersaver.c -index 3fffbe6..4bd6815 100644 ---- a/drivers/cpufreq/e_powersaver.c -+++ b/drivers/cpufreq/e_powersaver.c +Index: linux-3.10-3.10.11/drivers/cpufreq/e_powersaver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpufreq/e_powersaver.c 2014-04-27 23:40:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpufreq/e_powersaver.c 2014-04-28 00:33:37.000000000 +0000 @@ -16,7 +16,6 @@ #include #include @@ -25,7 +25,7 @@ #include #include -@@ -438,19 +437,18 @@ static struct cpufreq_driver eps_driver = { +@@ -437,19 +436,18 @@ .attr = eps_attr, }; diff -Nru linux-3.10.11/debian/patches/features/all/doc-build-parallel.patch linux-3.10-3.10.11/debian/patches/features/all/doc-build-parallel.patch --- linux-3.10.11/debian/patches/features/all/doc-build-parallel.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/doc-build-parallel.patch 2014-04-28 00:32:32.000000000 +0000 @@ -10,11 +10,11 @@ Since dh_compress will compress manual pages later, we don't need to run gzip here at all. -diff --git a/Documentation/DocBook/Makefile b/Documentation/DocBook/Makefile -index 5a2882d..71c7077 100644 ---- a/Documentation/DocBook/Makefile -+++ b/Documentation/DocBook/Makefile -@@ -146,7 +146,7 @@ quiet_cmd_db2html = HTML $@ +Index: linux-3.10-3.10.11/Documentation/DocBook/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Documentation/DocBook/Makefile 2014-04-27 23:40:58.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/DocBook/Makefile 2014-04-28 00:32:32.000000000 +0000 +@@ -159,7 +159,7 @@ cp $(PNG-$(basename $(notdir $@))) $(patsubst %.html,%,$@); fi quiet_cmd_db2man = MAN $@ diff -Nru linux-3.10.11/debian/patches/features/all/drivers-media-dvb-usb-af9005-request_firmware.patch linux-3.10-3.10.11/debian/patches/features/all/drivers-media-dvb-usb-af9005-request_firmware.patch --- linux-3.10.11/debian/patches/features/all/drivers-media-dvb-usb-af9005-request_firmware.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/drivers-media-dvb-usb-af9005-request_firmware.patch 2014-04-28 00:32:38.000000000 +0000 @@ -11,9 +11,11 @@ drivers/media/dvb/dvb-usb/af9005-fe.c | 66 ++++++++++++++++++++++++++------ 2 files changed, 54 insertions(+), 14 deletions(-) ---- a/drivers/media/usb/dvb-usb/Kconfig -+++ b/drivers/media/usb/dvb-usb/Kconfig -@@ -227,10 +227,10 @@ config DVB_USB_OPERA1 +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/Kconfig 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/Kconfig 2014-04-28 00:32:37.000000000 +0000 +@@ -231,10 +231,10 @@ config DVB_USB_AF9005 tristate "Afatech AF9005 DVB-T USB1.1 support" @@ -25,8 +27,10 @@ help Say Y here to support the Afatech AF9005 based DVB-T USB1.1 receiver and the TerraTec Cinergy T USB XE (Rev.1) ---- a/drivers/media/usb/dvb-usb/af9005-fe.c -+++ b/drivers/media/usb/dvb-usb/af9005-fe.c +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb/af9005-fe.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb/af9005-fe.c 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb/af9005-fe.c 2014-04-28 00:32:37.000000000 +0000 @@ -22,10 +22,26 @@ * see Documentation/dvb/README.dvb-usb for more information */ @@ -55,7 +59,7 @@ struct af9005_fe_state { struct dvb_usb_device *d; -@@ -816,6 +832,8 @@ static int af9005_fe_init(struct dvb_fro +@@ -816,6 +832,8 @@ { struct af9005_fe_state *state = fe->demodulator_priv; struct dvb_usb_adapter *adap = fe->dvb->priv; @@ -64,7 +68,7 @@ int ret, i, scriptlen; u8 temp, temp0 = 0, temp1 = 0, temp2 = 0; u8 buf[2]; -@@ -968,37 +986,55 @@ static int af9005_fe_init(struct dvb_fro +@@ -968,37 +986,55 @@ if ((ret = af9005_write_ofdm_register(state->d, 0xaefb, 0x01))) return ret; @@ -132,7 +136,7 @@ /* save original TOPs */ deb_info("save original TOPs\n"); -@@ -1078,6 +1114,10 @@ static int af9005_fe_init(struct dvb_fro +@@ -1078,6 +1114,10 @@ deb_info("profit!\n"); return 0; diff -Nru linux-3.10.11/debian/patches/features/all/efi-autoload-efivars.patch linux-3.10-3.10.11/debian/patches/features/all/efi-autoload-efivars.patch --- linux-3.10.11/debian/patches/features/all/efi-autoload-efivars.patch 2013-09-08 16:10:43.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/efi-autoload-efivars.patch 2014-04-28 00:33:54.000000000 +0000 @@ -15,8 +15,10 @@ are available. This should trigger udev to load them. --- ---- a/arch/x86/platform/efi/efi.c -+++ b/arch/x86/platform/efi/efi.c +Index: linux-3.10-3.10.11/arch/x86/platform/efi/efi.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/platform/efi/efi.c 2014-04-27 23:40:34.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/platform/efi/efi.c 2014-04-28 00:33:53.000000000 +0000 @@ -42,6 +42,7 @@ #include #include @@ -25,7 +27,7 @@ #include #include -@@ -783,6 +784,20 @@ void __init efi_late_init(void) +@@ -783,6 +784,20 @@ efi_bgrt_init(); } @@ -46,9 +48,11 @@ void __init efi_set_executable(efi_memory_desc_t *md, bool executable) { u64 addr, npages; ---- a/drivers/firmware/efi/efivars.c -+++ b/drivers/firmware/efi/efivars.c -@@ -77,6 +77,7 @@ MODULE_AUTHOR("Matt Domsch vif_data_size = sizeof(struct iwl_mvm_vif); hw->chanctx_data_size = sizeof(struct iwl_mvm_phy_ctxt); @@ -73,11 +73,3 @@ hw->wiphy->max_remain_on_channel_duration = 10000; hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL; --- -1.7.10.4 - --- -To unsubscribe from this list: send the line "unsubscribe stable" in -the body of a message to majordomo@vger.kernel.org -More majordomo info at http://vger.kernel.org/majordomo-info.html - diff -Nru linux-3.10.11/debian/patches/features/all/Kbuild-kconfig-Verbose-version-of-listnewconfig.patch linux-3.10-3.10.11/debian/patches/features/all/Kbuild-kconfig-Verbose-version-of-listnewconfig.patch --- linux-3.10.11/debian/patches/features/all/Kbuild-kconfig-Verbose-version-of-listnewconfig.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/Kbuild-kconfig-Verbose-version-of-listnewconfig.patch 2014-04-28 00:32:37.000000000 +0000 @@ -18,9 +18,11 @@ scripts/kconfig/lkc_proto.h | 1 + 4 files changed, 44 insertions(+), 10 deletions(-) ---- a/scripts/kconfig/conf.c -+++ b/scripts/kconfig/conf.c -@@ -368,7 +368,6 @@ static void conf(struct menu *menu) +Index: linux-3.10-3.10.11/scripts/kconfig/conf.c +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/kconfig/conf.c 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/kconfig/conf.c 2014-04-28 00:32:36.000000000 +0000 +@@ -368,7 +368,6 @@ switch (prop->type) { case P_MENU: if ((input_mode == silentoldconfig || @@ -28,7 +30,7 @@ input_mode == olddefconfig) && rootEntry != menu) { check_conf(menu); -@@ -429,11 +428,7 @@ static void check_conf(struct menu *menu +@@ -429,11 +428,7 @@ if (sym && !sym_has_value(sym)) { if (sym_is_changable(sym) || (sym_is_choice(sym) && sym_get_tristate_value(sym) == yes)) { @@ -41,7 +43,7 @@ if (!conf_cnt++) printf(_("*\n* Restart config...\n*\n")); rootEntry = menu_get_parent_menu(menu); -@@ -446,6 +441,30 @@ static void check_conf(struct menu *menu +@@ -446,6 +441,30 @@ check_conf(child); } @@ -72,7 +74,7 @@ static struct option long_opts[] = { {"oldaskconfig", no_argument, NULL, oldaskconfig}, {"oldconfig", no_argument, NULL, oldconfig}, -@@ -493,6 +512,7 @@ int main(int ac, char **av) +@@ -493,6 +512,7 @@ const char *progname = av[0]; int opt; const char *name, *defconfig_file = NULL /* gcc uninit */; @@ -80,7 +82,7 @@ struct stat tmpstat; setlocale(LC_ALL, ""); -@@ -666,16 +686,18 @@ int main(int ac, char **av) +@@ -666,16 +686,18 @@ input_mode = silentoldconfig; /* fall through */ case oldconfig: @@ -103,9 +105,11 @@ break; } ---- a/scripts/kconfig/confdata.c -+++ b/scripts/kconfig/confdata.c -@@ -727,6 +727,14 @@ next_menu: +Index: linux-3.10-3.10.11/scripts/kconfig/confdata.c +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/kconfig/confdata.c 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/kconfig/confdata.c 2014-04-28 00:32:37.000000000 +0000 +@@ -727,6 +727,14 @@ return 0; } @@ -120,7 +124,7 @@ int conf_write(const char *name) { FILE *out; -@@ -1153,7 +1161,10 @@ void conf_set_all_new_symbols(enum conf_ +@@ -1153,7 +1161,10 @@ } for_all_symbols(i, sym) { @@ -132,9 +136,11 @@ continue; switch (sym_get_type(sym)) { case S_BOOLEAN: ---- a/scripts/kconfig/expr.h -+++ b/scripts/kconfig/expr.h -@@ -106,6 +106,8 @@ struct symbol { +Index: linux-3.10-3.10.11/scripts/kconfig/expr.h +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/kconfig/expr.h 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/kconfig/expr.h 2014-04-28 00:32:37.000000000 +0000 +@@ -106,6 +106,8 @@ #define SYMBOL_DEF3 0x40000 /* symbol.def[S_DEF_3] is valid */ #define SYMBOL_DEF4 0x80000 /* symbol.def[S_DEF_4] is valid */ @@ -143,9 +149,11 @@ #define SYMBOL_MAXLENGTH 256 #define SYMBOL_HASHSIZE 9973 ---- a/scripts/kconfig/lkc_proto.h -+++ b/scripts/kconfig/lkc_proto.h -@@ -7,6 +7,7 @@ P(conf_read_simple,int,(const char *name +Index: linux-3.10-3.10.11/scripts/kconfig/lkc_proto.h +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/kconfig/lkc_proto.h 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/kconfig/lkc_proto.h 2014-04-28 00:32:37.000000000 +0000 +@@ -7,6 +7,7 @@ P(conf_write_defconfig,int,(const char *name)); P(conf_write,int,(const char *name)); P(conf_write_autoconf,int,(void)); diff -Nru linux-3.10.11/debian/patches/features/all/sound-pci-cs46xx-request_firmware.patch linux-3.10-3.10.11/debian/patches/features/all/sound-pci-cs46xx-request_firmware.patch --- linux-3.10.11/debian/patches/features/all/sound-pci-cs46xx-request_firmware.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/sound-pci-cs46xx-request_firmware.patch 2014-04-28 00:32:39.000000000 +0000 @@ -7,11 +7,11 @@ Tested by Antonio Ospite . Unfortunately we cannot currently distribute the firmware. -diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig -index 17e03b9..124b3a0 100644 ---- a/sound/pci/Kconfig -+++ b/sound/pci/Kconfig -@@ -229,7 +229,7 @@ config SND_CS4281 +Index: linux-3.10-3.10.11/sound/pci/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/Kconfig 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/Kconfig 2014-04-28 00:32:38.000000000 +0000 +@@ -257,7 +257,7 @@ config SND_CS46XX tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x" @@ -20,7 +20,7 @@ select SND_RAWMIDI select SND_AC97_CODEC help -@@ -241,6 +241,7 @@ config SND_CS46XX +@@ -269,6 +269,7 @@ config SND_CS46XX_NEW_DSP bool "Cirrus Logic (Sound Fusion) New DSP support" @@ -28,10 +28,10 @@ depends on SND_CS46XX default y help -diff --git a/sound/pci/cs46xx/cs46xx_lib.c b/sound/pci/cs46xx/cs46xx_lib.c -index 1be96ea..b12b930 100644 ---- a/sound/pci/cs46xx/cs46xx_lib.c -+++ b/sound/pci/cs46xx/cs46xx_lib.c +Index: linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/cs46xx/cs46xx_lib.c 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.c 2014-04-28 00:32:38.000000000 +0000 @@ -54,6 +54,8 @@ #include #include @@ -41,7 +41,7 @@ #include -@@ -308,7 +309,7 @@ static void snd_cs46xx_ac97_write(struct snd_ac97 *ac97, +@@ -309,7 +311,7 @@ */ int snd_cs46xx_download(struct snd_cs46xx *chip, @@ -50,7 +50,7 @@ unsigned long offset, unsigned long len) { -@@ -321,9 +322,9 @@ int snd_cs46xx_download(struct snd_cs46xx *chip, +@@ -322,9 +324,9 @@ dst = chip->region.idx[bank+1].remap_addr + offset; len /= sizeof(u32); @@ -62,7 +62,7 @@ dst += sizeof(u32); } return 0; -@@ -360,23 +361,77 @@ int snd_cs46xx_clear_BA1(struct snd_cs46xx *chip, +@@ -361,23 +363,77 @@ #else /* old DSP image */ @@ -151,17 +151,17 @@ #endif /* CONFIG_SND_CS46XX_NEW_DSP */ /* -@@ -3874,3 +3929,5 @@ int __devinit snd_cs46xx_create(struct snd_card *card, +@@ -3887,3 +3943,5 @@ *rchip = chip; return 0; } + +MODULE_FIRMWARE("cs46xx/cs46xx-old.fw"); -diff --git a/sound/pci/cs46xx/cs46xx_lib.h b/sound/pci/cs46xx/cs46xx_lib.h -index 4eb55aa..85babb5 100644 ---- a/sound/pci/cs46xx/cs46xx_lib.h -+++ b/sound/pci/cs46xx/cs46xx_lib.h -@@ -103,8 +103,8 @@ int cs46xx_dsp_proc_done (struct snd_cs46xx *chip); +Index: linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.h +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/cs46xx/cs46xx_lib.h 2014-04-27 23:40:56.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/cs46xx/cs46xx_lib.h 2014-04-28 00:32:38.000000000 +0000 +@@ -103,8 +103,8 @@ #define cs46xx_dsp_proc_done(chip) #endif int cs46xx_dsp_scb_and_task_init (struct snd_cs46xx *chip); diff -Nru linux-3.10.11/debian/patches/features/all/sysrq-mask.patch linux-3.10-3.10.11/debian/patches/features/all/sysrq-mask.patch --- linux-3.10.11/debian/patches/features/all/sysrq-mask.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/sysrq-mask.patch 2014-04-28 00:33:17.000000000 +0000 @@ -6,8 +6,10 @@ Add a Kconfig variable to set the initial value of the Magic SysRq mask (sysctl: kernel.sysrq). ---- a/include/linux/sysrq.h -+++ b/include/linux/sysrq.h +Index: linux-3.10-3.10.11/include/linux/sysrq.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/sysrq.h 2014-04-27 23:40:49.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/sysrq.h 2014-04-28 00:33:17.000000000 +0000 @@ -18,7 +18,7 @@ #include @@ -17,11 +19,11 @@ /* Possible values of bitmask for enabling sysrq functions */ /* 0x0001 is reserved for enable everything */ -diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug -index 234ceb1..415a834 100644 ---- a/lib/Kconfig.debug -+++ b/lib/Kconfig.debug -@@ -50,6 +50,14 @@ config MAGIC_SYSRQ +Index: linux-3.10-3.10.11/lib/Kconfig.debug +=================================================================== +--- linux-3.10-3.10.11.orig/lib/Kconfig.debug 2014-04-27 23:40:49.000000000 +0000 ++++ linux-3.10-3.10.11/lib/Kconfig.debug 2014-04-28 00:33:17.000000000 +0000 +@@ -66,6 +66,14 @@ keys are documented in . Don't say Y unless you really know what this hack does. diff -Nru linux-3.10.11/debian/patches/features/all/x86-memtest-WARN-if-bad-RAM-found.patch linux-3.10-3.10.11/debian/patches/features/all/x86-memtest-WARN-if-bad-RAM-found.patch --- linux-3.10.11/debian/patches/features/all/x86-memtest-WARN-if-bad-RAM-found.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/x86-memtest-WARN-if-bad-RAM-found.patch 2014-04-28 00:33:53.000000000 +0000 @@ -13,11 +13,11 @@ arch/x86/mm/memtest.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) -diff --git a/arch/x86/mm/memtest.c b/arch/x86/mm/memtest.c -index 92faf3a..ac6bdaa 100644 ---- a/arch/x86/mm/memtest.c -+++ b/arch/x86/mm/memtest.c -@@ -30,6 +30,8 @@ static u64 patterns[] __initdata = { +Index: linux-3.10-3.10.11/arch/x86/mm/memtest.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/mm/memtest.c 2014-04-27 23:40:34.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/mm/memtest.c 2014-04-28 00:33:52.000000000 +0000 +@@ -31,6 +31,8 @@ static void __init reserve_bad_mem(u64 pattern, u64 start_bad, u64 end_bad) { diff -Nru linux-3.10.11/debian/patches/features/all/xen/microcode-amd-fam15plus.patch linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-amd-fam15plus.patch --- linux-3.10.11/debian/patches/features/all/xen/microcode-amd-fam15plus.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-amd-fam15plus.patch 2014-04-28 00:33:28.000000000 +0000 @@ -9,11 +9,11 @@ arch/x86/kernel/microcode_xen.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) -diff --git a/arch/x86/kernel/microcode_xen.c b/arch/x86/kernel/microcode_xen.c -index 6a73957..9e50566 100644 ---- a/arch/x86/kernel/microcode_xen.c -+++ b/arch/x86/kernel/microcode_xen.c -@@ -58,7 +58,7 @@ static int xen_microcode_update(int cpu) +Index: linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:27.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:28.000000000 +0000 +@@ -58,7 +58,7 @@ static enum ucode_state xen_request_microcode_fw(int cpu, struct device *device) { @@ -22,7 +22,7 @@ struct cpuinfo_x86 *c = &cpu_data(cpu); const struct firmware *firmware; struct ucode_cpu_info *uci = ucode_cpu_info + cpu; -@@ -74,7 +74,11 @@ static enum ucode_state xen_request_microcode_fw(int cpu, struct device *device) +@@ -74,7 +74,11 @@ break; case X86_VENDOR_AMD: diff -Nru linux-3.10.11/debian/patches/features/all/xen/microcode-api-update.patch linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-api-update.patch --- linux-3.10.11/debian/patches/features/all/xen/microcode-api-update.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-api-update.patch 2014-04-28 00:33:30.000000000 +0000 @@ -8,11 +8,11 @@ arch/x86/kernel/microcode_xen.c | 3 ++- 1 files changed, 2 insertions(+), 1 deletions(-) -diff --git a/arch/x86/kernel/microcode_xen.c b/arch/x86/kernel/microcode_xen.c -index 9e50566..6b7aa48 100644 ---- a/arch/x86/kernel/microcode_xen.c -+++ b/arch/x86/kernel/microcode_xen.c -@@ -56,7 +56,8 @@ static int xen_microcode_update(int cpu) +Index: linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:29.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:29.000000000 +0000 +@@ -56,7 +56,8 @@ return err; } @@ -22,6 +22,3 @@ { char name[36]; struct cpuinfo_x86 *c = &cpu_data(cpu); --- -1.7.2.5 - diff -Nru linux-3.10.11/debian/patches/features/all/xen/microcode.patch linux-3.10-3.10.11/debian/patches/features/all/xen/microcode.patch --- linux-3.10.11/debian/patches/features/all/xen/microcode.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/xen/microcode.patch 2014-04-28 00:33:28.000000000 +0000 @@ -23,9 +23,11 @@ 5 files changed, 216 insertions(+), 1 deletion(-) create mode 100644 arch/x86/kernel/microcode_xen.c ---- a/arch/x86/include/asm/microcode.h -+++ b/arch/x86/include/asm/microcode.h -@@ -71,4 +71,13 @@ static inline int __init save_microcode_ +Index: linux-3.10-3.10.11/arch/x86/include/asm/microcode.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/microcode.h 2014-04-27 23:40:45.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/microcode.h 2014-04-28 00:33:27.000000000 +0000 +@@ -71,4 +71,13 @@ } #endif @@ -39,9 +41,11 @@ +#endif + #endif /* _ASM_X86_MICROCODE_H */ ---- a/arch/x86/kernel/Makefile -+++ b/arch/x86/kernel/Makefile -@@ -93,6 +93,7 @@ obj-$(CONFIG_MICROCODE_INTEL_LIB) += mic +Index: linux-3.10-3.10.11/arch/x86/kernel/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/Makefile 2014-04-27 23:40:45.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/Makefile 2014-04-28 00:33:27.000000000 +0000 +@@ -93,6 +93,7 @@ microcode-y := microcode_core.o microcode-$(CONFIG_MICROCODE_INTEL) += microcode_intel.o microcode-$(CONFIG_MICROCODE_AMD) += microcode_amd.o @@ -49,8 +53,10 @@ obj-$(CONFIG_MICROCODE) += microcode.o obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o ---- a/arch/x86/kernel/microcode_core.c -+++ b/arch/x86/kernel/microcode_core.c +Index: linux-3.10-3.10.11/arch/x86/kernel/microcode_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/microcode_core.c 2014-04-27 23:40:45.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/microcode_core.c 2014-04-28 00:33:27.000000000 +0000 @@ -84,6 +84,7 @@ #include #include @@ -59,7 +65,7 @@ #include #include #include -@@ -546,7 +547,9 @@ static int __init microcode_init(void) +@@ -546,7 +547,9 @@ struct cpuinfo_x86 *c = &cpu_data(0); int error; @@ -70,8 +76,10 @@ microcode_ops = init_intel_microcode(); else if (c->x86_vendor == X86_VENDOR_AMD) microcode_ops = init_amd_microcode(); ---- /dev/null -+++ b/arch/x86/kernel/microcode_xen.c +Index: linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:27.000000000 +0000 @@ -0,0 +1,198 @@ +/* + * Xen microcode update driver @@ -271,9 +279,11 @@ + return NULL; + return µcode_xen_ops; +} ---- a/arch/x86/xen/Kconfig -+++ b/arch/x86/xen/Kconfig -@@ -51,3 +51,6 @@ config XEN_DEBUG_FS +Index: linux-3.10-3.10.11/arch/x86/xen/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/xen/Kconfig 2014-04-27 23:40:45.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/xen/Kconfig 2014-04-28 00:33:27.000000000 +0000 +@@ -51,3 +51,6 @@ Enable statistics output and various tuning options in debugfs. Enabling this option may incur a significant performance overhead. diff -Nru linux-3.10.11/debian/patches/features/all/xen/microcode-typo.patch linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-typo.patch --- linux-3.10.11/debian/patches/features/all/xen/microcode-typo.patch 2013-07-14 23:47:05.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/all/xen/microcode-typo.patch 2014-04-28 00:33:29.000000000 +0000 @@ -11,11 +11,11 @@ arch/x86/kernel/microcode_xen.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/arch/x86/kernel/microcode_xen.c b/arch/x86/kernel/microcode_xen.c -index 9d2a06b..6a73957 100644 ---- a/arch/x86/kernel/microcode_xen.c -+++ b/arch/x86/kernel/microcode_xen.c -@@ -157,7 +157,7 @@ static enum ucode_state xen_request_microcode_user(int cpu, +Index: linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:28.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/microcode_xen.c 2014-04-28 00:33:29.000000000 +0000 +@@ -161,7 +161,7 @@ ret = UCODE_OK; out: diff -Nru linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usb-clock-DT-lookups.patch linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usb-clock-DT-lookups.patch --- linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usb-clock-DT-lookups.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usb-clock-DT-lookups.patch 2014-04-28 00:33:41.000000000 +0000 @@ -8,10 +8,10 @@ --- (limited to 'arch/arm/boot/dts') -diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi -index 761ae1c..b118e01 100644 ---- a/arch/arm/boot/dts/imx51.dtsi -+++ b/arch/arm/boot/dts/imx51.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx51.dtsi 2014-04-28 00:33:40.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi 2014-04-28 00:33:41.000000000 +0000 @@ -179,6 +179,7 @@ compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; @@ -52,10 +52,10 @@ }; gpio1: gpio@73f84000 { -diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi -index 6c8fa7d..faea9fa 100644 ---- a/arch/arm/boot/dts/imx53.dtsi -+++ b/arch/arm/boot/dts/imx53.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx53.dtsi 2014-04-28 00:33:40.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi 2014-04-28 00:33:41.000000000 +0000 @@ -167,6 +167,7 @@ compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80000 0x0200>; @@ -96,5 +96,3 @@ }; gpio1: gpio@53f84000 { --- -cgit v0.9.1 diff -Nru linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usbmisc-entries.patch linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usbmisc-entries.patch --- linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usbmisc-entries.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-add-imx5x-usbmisc-entries.patch 2014-04-28 00:33:40.000000000 +0000 @@ -8,10 +8,10 @@ --- (limited to 'arch/arm/boot/dts') -diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi -index 21bb786..761ae1c 100644 ---- a/arch/arm/boot/dts/imx51.dtsi -+++ b/arch/arm/boot/dts/imx51.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx51.dtsi 2014-04-27 23:40:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi 2014-04-28 00:33:40.000000000 +0000 @@ -179,6 +179,7 @@ compatible = "fsl,imx51-usb", "fsl,imx27-usb"; reg = <0x73f80000 0x0200>; @@ -53,10 +53,10 @@ gpio1: gpio@73f84000 { compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; reg = <0x73f84000 0x4000>; -diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi -index 845982e..6c8fa7d 100644 ---- a/arch/arm/boot/dts/imx53.dtsi -+++ b/arch/arm/boot/dts/imx53.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx53.dtsi 2014-04-27 23:40:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi 2014-04-28 00:33:40.000000000 +0000 @@ -167,6 +167,7 @@ compatible = "fsl,imx53-usb", "fsl,imx27-usb"; reg = <0x53f80000 0x0200>; @@ -98,5 +98,3 @@ gpio1: gpio@53f84000 { compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; reg = <0x53f84000 0x4000>; --- -cgit v0.9.1 diff -Nru linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-imx53-qsb.dts-enable-usbotg-and-usbh1.patch linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-imx53-qsb.dts-enable-usbotg-and-usbh1.patch --- linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-imx53-qsb.dts-enable-usbotg-and-usbh1.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-imx53-qsb.dts-enable-usbotg-and-usbh1.patch 2014-04-28 00:33:43.000000000 +0000 @@ -8,10 +8,10 @@ --- (limited to 'arch/arm/boot/dts') -diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts -index 8f0e9ae..160d1bc 100644 ---- a/arch/arm/boot/dts/imx53-qsb.dts -+++ b/arch/arm/boot/dts/imx53-qsb.dts +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx53-qsb.dts +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx53-qsb.dts 2014-04-27 23:40:40.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx53-qsb.dts 2014-04-28 00:33:42.000000000 +0000 @@ -268,3 +268,11 @@ phy-reset-gpios = <&gpio7 6 0>; status = "okay"; @@ -24,5 +24,3 @@ +&usbotg { + status = "okay"; +}; --- -cgit v0.9.1 diff -Nru linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-use-usb-nop-xceiv-usbphy-entries-for-imx5x.patch linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-use-usb-nop-xceiv-usbphy-entries-for-imx5x.patch --- linux-3.10.11/debian/patches/features/arm/ARM-dts-imx-use-usb-nop-xceiv-usbphy-entries-for-imx5x.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/ARM-dts-imx-use-usb-nop-xceiv-usbphy-entries-for-imx5x.patch 2014-04-28 00:33:42.000000000 +0000 @@ -8,10 +8,10 @@ --- (limited to 'arch/arm/boot/dts') -diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi -index b118e01..f23636f 100644 ---- a/arch/arm/boot/dts/imx51.dtsi -+++ b/arch/arm/boot/dts/imx51.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx51.dtsi 2014-04-28 00:33:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx51.dtsi 2014-04-28 00:33:41.000000000 +0000 @@ -175,12 +175,20 @@ }; }; @@ -33,10 +33,10 @@ status = "disabled"; }; -diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi -index faea9fa..c4ddf51 100644 ---- a/arch/arm/boot/dts/imx53.dtsi -+++ b/arch/arm/boot/dts/imx53.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx53.dtsi 2014-04-28 00:33:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx53.dtsi 2014-04-28 00:33:41.000000000 +0000 @@ -163,12 +163,27 @@ }; }; @@ -73,5 +73,3 @@ status = "disabled"; }; --- -cgit v0.9.1 diff -Nru linux-3.10.11/debian/patches/features/arm/imx53-qsb-usb-power.patch linux-3.10-3.10.11/debian/patches/features/arm/imx53-qsb-usb-power.patch --- linux-3.10.11/debian/patches/features/arm/imx53-qsb-usb-power.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/imx53-qsb-usb-power.patch 2014-04-28 00:33:44.000000000 +0000 @@ -7,10 +7,10 @@ Signed-off-by: Arnaud Patard [bwh: For 3.10, use macro for PIN_FUNC_ID in GPIO list] -Index: linux/arch/arm/boot/dts/imx53-qsb.dts +Index: linux-3.10-3.10.11/arch/arm/boot/dts/imx53-qsb.dts =================================================================== ---- linux.orig/arch/arm/boot/dts/imx53-qsb.dts 2013-05-20 00:46:34.000000000 +0200 -+++ linux/arch/arm/boot/dts/imx53-qsb.dts 2013-05-20 01:06:31.000000000 +0200 +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/imx53-qsb.dts 2014-04-28 00:33:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/imx53-qsb.dts 2014-04-28 00:33:44.000000000 +0000 @@ -66,6 +66,15 @@ regulator-max-microvolt = <3200000>; regulator-always-on; diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0001-net-Add-EMAC-ethernet-driver-found-on-Allwinner-A10-.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0001-net-Add-EMAC-ethernet-driver-found-on-Allwinner-A10-.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0001-net-Add-EMAC-ethernet-driver-found-on-Allwinner-A10-.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0001-net-Add-EMAC-ethernet-driver-found-on-Allwinner-A10-.patch 2014-04-28 00:33:45.000000000 +0000 @@ -31,11 +31,10 @@ create mode 100644 drivers/net/ethernet/allwinner/sun4i-emac.c create mode 100644 drivers/net/ethernet/allwinner/sun4i-emac.h -diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt -new file mode 100644 -index 0000000..b90bfcd ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt +Index: linux-3.10-3.10.11/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/devicetree/bindings/net/allwinner,sun4i-emac.txt 2014-04-28 00:33:44.000000000 +0000 @@ -0,0 +1,22 @@ +* Allwinner EMAC ethernet controller + @@ -59,11 +58,11 @@ + clocks = <&ahb_gates 17>; + phy = <&phy0>; +}; -diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig -index ed956e0..18fd6fb 100644 ---- a/drivers/net/ethernet/Kconfig -+++ b/drivers/net/ethernet/Kconfig -@@ -20,6 +20,7 @@ config SUNGEM_PHY +Index: linux-3.10-3.10.11/drivers/net/ethernet/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/Kconfig 2014-04-27 23:40:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/Kconfig 2014-04-28 00:33:44.000000000 +0000 +@@ -20,6 +20,7 @@ source "drivers/net/ethernet/3com/Kconfig" source "drivers/net/ethernet/adaptec/Kconfig" source "drivers/net/ethernet/aeroflex/Kconfig" @@ -71,11 +70,11 @@ source "drivers/net/ethernet/alteon/Kconfig" source "drivers/net/ethernet/amd/Kconfig" source "drivers/net/ethernet/apple/Kconfig" -diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile -index 8268d85..009da27 100644 ---- a/drivers/net/ethernet/Makefile -+++ b/drivers/net/ethernet/Makefile -@@ -6,6 +6,7 @@ obj-$(CONFIG_NET_VENDOR_3COM) += 3com/ +Index: linux-3.10-3.10.11/drivers/net/ethernet/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/Makefile 2014-04-27 23:40:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/Makefile 2014-04-28 00:33:44.000000000 +0000 +@@ -6,6 +6,7 @@ obj-$(CONFIG_NET_VENDOR_8390) += 8390/ obj-$(CONFIG_NET_VENDOR_ADAPTEC) += adaptec/ obj-$(CONFIG_GRETH) += aeroflex/ @@ -83,11 +82,10 @@ obj-$(CONFIG_NET_VENDOR_ALTEON) += alteon/ obj-$(CONFIG_NET_VENDOR_AMD) += amd/ obj-$(CONFIG_NET_VENDOR_APPLE) += apple/ -diff --git a/drivers/net/ethernet/allwinner/Kconfig b/drivers/net/ethernet/allwinner/Kconfig -new file mode 100644 -index 0000000..66d3532 ---- /dev/null -+++ b/drivers/net/ethernet/allwinner/Kconfig +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/Kconfig 2014-04-28 00:33:44.000000000 +0000 @@ -0,0 +1,36 @@ +# +# Allwinner device configuration @@ -125,22 +123,20 @@ + will be called sun4i-emac. + +endif # NET_VENDOR_ALLWINNER -diff --git a/drivers/net/ethernet/allwinner/Makefile b/drivers/net/ethernet/allwinner/Makefile -new file mode 100644 -index 0000000..03129f7 ---- /dev/null -+++ b/drivers/net/ethernet/allwinner/Makefile +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/Makefile 2014-04-28 00:33:44.000000000 +0000 @@ -0,0 +1,5 @@ +# +# Makefile for the Allwinner device drivers. +# + +obj-$(CONFIG_SUN4I_EMAC) += sun4i-emac.o -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c -new file mode 100644 -index 0000000..b411344 ---- /dev/null -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:44.000000000 +0000 @@ -0,0 +1,960 @@ +/* + * Allwinner EMAC Fast Ethernet driver for Linux. @@ -1102,11 +1098,10 @@ +MODULE_AUTHOR("Maxime Ripard "); +MODULE_DESCRIPTION("Allwinner A10 emac network driver"); +MODULE_LICENSE("GPL"); -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.h b/drivers/net/ethernet/allwinner/sun4i-emac.h -new file mode 100644 -index 0000000..38c72d9 ---- /dev/null -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.h +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.h 2014-04-28 00:33:44.000000000 +0000 @@ -0,0 +1,108 @@ +/* + * Allwinner EMAC Fast Ethernet driver for Linux. @@ -1216,6 +1211,3 @@ +#define EMAC_EEPROM_MAGIC (0x444d394b) +#define EMAC_UNDOCUMENTED_MAGIC (0x0143414d) +#endif /* _SUN4I_EMAC_H_ */ --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0002-net-Add-MDIO-bus-driver-for-the-Allwinner-EMAC.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0002-net-Add-MDIO-bus-driver-for-the-Allwinner-EMAC.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0002-net-Add-MDIO-bus-driver-for-the-Allwinner-EMAC.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0002-net-Add-MDIO-bus-driver-for-the-Allwinner-EMAC.patch 2014-04-28 00:33:46.000000000 +0000 @@ -19,11 +19,10 @@ create mode 100644 Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt create mode 100644 drivers/net/phy/mdio-sun4i.c -diff --git a/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt -new file mode 100644 -index 0000000..00b9f9a ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt +Index: linux-3.10-3.10.11/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/devicetree/bindings/net/allwinner,sun4i-mdio.txt 2014-04-28 00:33:46.000000000 +0000 @@ -0,0 +1,26 @@ +* Allwinner A10 MDIO Ethernet Controller interface + @@ -51,11 +50,11 @@ + reg = <0>; + }; +}; -diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig -index 1e11f2b..3a316b3 100644 ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -144,6 +144,16 @@ config MDIO_OCTEON +Index: linux-3.10-3.10.11/drivers/net/phy/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/phy/Kconfig 2014-04-27 23:40:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/phy/Kconfig 2014-04-28 00:33:46.000000000 +0000 +@@ -144,6 +144,16 @@ If in doubt, say Y. @@ -72,20 +71,19 @@ config MDIO_BUS_MUX tristate depends on OF_MDIO -diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile -index 9645e38..23a2ab2 100644 ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -30,3 +30,4 @@ obj-$(CONFIG_AMD_PHY) += amd.o +Index: linux-3.10-3.10.11/drivers/net/phy/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/phy/Makefile 2014-04-27 23:40:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/phy/Makefile 2014-04-28 00:33:46.000000000 +0000 +@@ -30,3 +30,4 @@ obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o obj-$(CONFIG_MDIO_BUS_MUX_GPIO) += mdio-mux-gpio.o obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o +obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.o -diff --git a/drivers/net/phy/mdio-sun4i.c b/drivers/net/phy/mdio-sun4i.c -new file mode 100644 -index 0000000..61d3f4e ---- /dev/null -+++ b/drivers/net/phy/mdio-sun4i.c +Index: linux-3.10-3.10.11/drivers/net/phy/mdio-sun4i.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/phy/mdio-sun4i.c 2014-04-28 00:33:46.000000000 +0000 @@ -0,0 +1,194 @@ +/* + * Allwinner EMAC MDIO interface driver @@ -281,6 +279,3 @@ +MODULE_DESCRIPTION("Allwinner EMAC MDIO interface driver"); +MODULE_AUTHOR("Maxime Ripard "); +MODULE_LICENSE("GPL"); --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0003-ARM-sun4i-Add-muxing-options-for-the-ethernet-contro.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0003-ARM-sun4i-Add-muxing-options-for-the-ethernet-contro.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0003-ARM-sun4i-Add-muxing-options-for-the-ethernet-contro.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0003-ARM-sun4i-Add-muxing-options-for-the-ethernet-contro.patch 2014-04-28 00:33:47.000000000 +0000 @@ -15,10 +15,10 @@ arch/arm/boot/dts/sun4i-a10.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) -diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi -index e7ef619..ff1f41f 100644 ---- a/arch/arm/boot/dts/sun4i-a10.dtsi -+++ b/arch/arm/boot/dts/sun4i-a10.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-27 23:40:37.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:33:47.000000000 +0000 @@ -199,6 +199,17 @@ allwinner,drive = <0>; allwinner,pull = <0>; @@ -37,6 +37,3 @@ }; timer@01c20c00 { --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0004-ARM-sunxi-Add-EMAC-controller-node-to-sun4i-DTSI.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0004-ARM-sunxi-Add-EMAC-controller-node-to-sun4i-DTSI.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0004-ARM-sunxi-Add-EMAC-controller-node-to-sun4i-DTSI.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0004-ARM-sunxi-Add-EMAC-controller-node-to-sun4i-DTSI.patch 2014-04-28 00:33:48.000000000 +0000 @@ -11,10 +11,10 @@ arch/arm/boot/dts/sun4i-a10.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) -diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi -index ff1f41f..983da33 100644 ---- a/arch/arm/boot/dts/sun4i-a10.dtsi -+++ b/arch/arm/boot/dts/sun4i-a10.dtsi +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:33:47.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:33:47.000000000 +0000 @@ -163,6 +163,22 @@ reg = <0x01c20000 0x300000>; ranges; @@ -38,6 +38,3 @@ intc: interrupt-controller@01c20400 { compatible = "allwinner,sun4i-ic"; reg = <0x01c20400 0x400>; --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0005-ARM-cubieboard-Enable-ethernet-EMAC-support-in-dts.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0005-ARM-cubieboard-Enable-ethernet-EMAC-support-in-dts.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0005-ARM-cubieboard-Enable-ethernet-EMAC-support-in-dts.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0005-ARM-cubieboard-Enable-ethernet-EMAC-support-in-dts.patch 2014-04-28 00:33:49.000000000 +0000 @@ -12,10 +12,10 @@ arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) -diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts -index b70fe0d..e752b57 100644 ---- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts -+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10-cubieboard.dts +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 2014-04-27 23:40:36.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10-cubieboard.dts 2014-04-28 00:33:48.000000000 +0000 @@ -27,6 +27,21 @@ }; @@ -38,6 +38,3 @@ pinctrl@01c20800 { led_pins_cubieboard: led_pins@0 { allwinner,pins = "PH20", "PH21"; --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0006-ARM-sunxi-Add-EMAC-Controller-to-Hackberry-dt.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0006-ARM-sunxi-Add-EMAC-Controller-to-Hackberry-dt.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0006-ARM-sunxi-Add-EMAC-Controller-to-Hackberry-dt.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0006-ARM-sunxi-Add-EMAC-Controller-to-Hackberry-dt.patch 2014-04-28 00:33:49.000000000 +0000 @@ -14,10 +14,10 @@ arch/arm/boot/dts/sun4i-a10-hackberry.dts | 41 +++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) -diff --git a/arch/arm/boot/dts/sun4i-a10-hackberry.dts b/arch/arm/boot/dts/sun4i-a10-hackberry.dts -index b9efac1..3514b37 100644 ---- a/arch/arm/boot/dts/sun4i-a10-hackberry.dts -+++ b/arch/arm/boot/dts/sun4i-a10-hackberry.dts +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10-hackberry.dts +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10-hackberry.dts 2014-04-27 23:40:35.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10-hackberry.dts 2014-04-28 00:33:49.000000000 +0000 @@ -23,10 +23,51 @@ }; @@ -70,6 +70,3 @@ + }; + }; }; --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0007-net-sun4i-emac-fix-a-typo-in-emac_probe.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0007-net-sun4i-emac-fix-a-typo-in-emac_probe.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0007-net-sun4i-emac-fix-a-typo-in-emac_probe.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0007-net-sun4i-emac-fix-a-typo-in-emac_probe.patch 2014-04-28 00:33:50.000000000 +0000 @@ -13,11 +13,11 @@ drivers/net/ethernet/allwinner/sun4i-emac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c -index b411344..26083cd 100644 ---- a/drivers/net/ethernet/allwinner/sun4i-emac.c -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c -@@ -821,7 +821,7 @@ static int emac_probe(struct platform_device *pdev) +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:50.000000000 +0000 +@@ -821,7 +821,7 @@ db->membase = of_iomap(np, 0); if (!db->membase) { dev_err(&pdev->dev, "failed to remap registers\n"); @@ -26,6 +26,3 @@ goto out; } --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0008-net-sun4i-emac-remove-erroneous-assignment.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0008-net-sun4i-emac-remove-erroneous-assignment.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0008-net-sun4i-emac-remove-erroneous-assignment.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0008-net-sun4i-emac-remove-erroneous-assignment.patch 2014-04-28 00:33:51.000000000 +0000 @@ -23,11 +23,11 @@ drivers/net/ethernet/allwinner/sun4i-emac.c | 4 ---- 1 file changed, 4 deletions(-) -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c -index 26083cd..0bb2f4a 100644 ---- a/drivers/net/ethernet/allwinner/sun4i-emac.c -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c -@@ -869,10 +869,6 @@ static int emac_probe(struct platform_device *pdev) +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:50.000000000 +0000 +@@ -869,10 +869,6 @@ ndev->watchdog_timeo = msecs_to_jiffies(watchdog); ndev->ethtool_ops = &emac_ethtool_ops; @@ -38,6 +38,3 @@ platform_set_drvdata(pdev, ndev); /* Carrier starts down, phylib will bring it up */ --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0009-net-sun4i-emac-Remove-redundant-platform_set_drvdata.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0009-net-sun4i-emac-Remove-redundant-platform_set_drvdata.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0009-net-sun4i-emac-Remove-redundant-platform_set_drvdata.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0009-net-sun4i-emac-Remove-redundant-platform_set_drvdata.patch 2014-04-28 00:33:51.000000000 +0000 @@ -17,11 +17,11 @@ drivers/net/ethernet/allwinner/sun4i-emac.c | 2 -- 1 file changed, 2 deletions(-) -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c -index 0bb2f4a..e9c8dbe 100644 ---- a/drivers/net/ethernet/allwinner/sun4i-emac.c -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c -@@ -898,8 +898,6 @@ static int emac_remove(struct platform_device *pdev) +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:51.000000000 +0000 +@@ -898,8 +898,6 @@ { struct net_device *ndev = platform_get_drvdata(pdev); @@ -30,6 +30,3 @@ unregister_netdev(ndev); free_netdev(ndev); --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/sunxi-emac/0010-net-sun4i-emac-Staticize-local-symbols.patch linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0010-net-sun4i-emac-Staticize-local-symbols.patch --- linux-3.10.11/debian/patches/features/arm/sunxi-emac/0010-net-sun4i-emac-Staticize-local-symbols.patch 2013-07-14 23:46:35.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/sunxi-emac/0010-net-sun4i-emac-Staticize-local-symbols.patch 2014-04-28 00:33:52.000000000 +0000 @@ -14,11 +14,11 @@ drivers/net/ethernet/allwinner/sun4i-emac.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -diff --git a/drivers/net/ethernet/allwinner/sun4i-emac.c b/drivers/net/ethernet/allwinner/sun4i-emac.c -index e9c8dbe..50b853a 100644 ---- a/drivers/net/ethernet/allwinner/sun4i-emac.c -+++ b/drivers/net/ethernet/allwinner/sun4i-emac.c -@@ -258,7 +258,7 @@ static const struct ethtool_ops emac_ethtool_ops = { +Index: linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/allwinner/sun4i-emac.c 2014-04-28 00:33:51.000000000 +0000 +@@ -258,7 +258,7 @@ .get_link = ethtool_op_get_link, }; @@ -27,7 +27,7 @@ { struct emac_board_info *db = netdev_priv(ndev); unsigned int reg_val; -@@ -310,7 +310,7 @@ unsigned int emac_setup(struct net_device *ndev) +@@ -310,7 +310,7 @@ return 0; } @@ -36,6 +36,3 @@ { struct emac_board_info *db = netdev_priv(ndev); unsigned int reg_val; --- -1.7.10.4 - diff -Nru linux-3.10.11/debian/patches/features/arm/usbmisc-imx-add-module_device_table.patch linux-3.10-3.10.11/debian/patches/features/arm/usbmisc-imx-add-module_device_table.patch --- linux-3.10.11/debian/patches/features/arm/usbmisc-imx-add-module_device_table.patch 2013-07-15 00:08:01.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/features/arm/usbmisc-imx-add-module_device_table.patch 2014-04-28 00:33:43.000000000 +0000 @@ -11,11 +11,11 @@ drivers/usb/chipidea/usbmisc_imx.c | 1 + 1 file changed, 1 insertion(+) -diff --git a/drivers/usb/chipidea/usbmisc_imx.c b/drivers/usb/chipidea/usbmisc_imx.c -index 588bae8..c912e7b 100644 ---- a/drivers/usb/chipidea/usbmisc_imx.c -+++ b/drivers/usb/chipidea/usbmisc_imx.c -@@ -175,6 +175,7 @@ static const struct of_device_id usbmisc_imx_dt_ids[] = { +Index: linux-3.10-3.10.11/drivers/usb/chipidea/usbmisc_imx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/chipidea/usbmisc_imx.c 2014-04-27 23:40:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/chipidea/usbmisc_imx.c 2014-04-28 00:33:43.000000000 +0000 +@@ -175,6 +175,7 @@ }, { /* sentinel */ } }; diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.patch 2014-04-28 00:34:03.000000000 +0000 @@ -0,0 +1,43 @@ +commit f4cc06ac2d9fc7a483eb778abec66f60487687f4 +Author: stephen hemminger +Date: Thu Aug 1 22:32:07 2013 -0700 + + htb: fix sign extension bug + + [ Upstream commit cbd375567f7e4811b1c721f75ec519828ac6583f ] + + When userspace passes a large priority value + the assignment of the unsigned value hopt->prio + to signed int cl->prio causes cl->prio to become negative and the + comparison is with TC_HTB_NUMPRIO is always false. + + The result is that HTB crashes by referencing outside + the array when processing packets. With this patch the large value + wraps around like other values outside the normal range. + + See: https://bugzilla.kernel.org/show_bug.cgi?id=60669 + + Signed-off-by: Stephen Hemminger + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sched/sch_htb.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sched/sch_htb.c 2014-04-27 23:40:30.000000000 +0000 ++++ linux-3.10-3.10.11/net/sched/sch_htb.c 2014-04-28 00:34:02.000000000 +0000 +@@ -87,7 +87,7 @@ + unsigned int children; + struct htb_class *parent; /* parent class */ + +- int prio; /* these two are used only by leaves... */ ++ u32 prio; /* these two are used only by leaves... */ + int quantum; /* but stored for parent-to-leaf return */ + + union { +Index: linux-3.10-3.10.11/dummy/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1000_f4cc06ac2d9fc7a483eb778abec66f60487687f4.txt 2014-04-28 00:34:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.patch --- linux-3.10.11/debian/patches/rpi/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.patch 2014-04-28 00:34:04.000000000 +0000 @@ -0,0 +1,45 @@ +commit b4f55925ace5646d72df5af6fdab74fdbb288229 +Author: Daniel Borkmann +Date: Fri Aug 2 11:32:43 2013 +0200 + + net: rtm_to_ifaddr: free ifa if ifa_cacheinfo processing fails + + [ Upstream commit 446266b0c742a2c9ee8f0dce759a0117bce58a86 ] + + Commit 5c766d642 ("ipv4: introduce address lifetime") leaves the ifa + resource that was allocated via inet_alloc_ifa() unfreed when returning + the function with -EINVAL. Thus, free it first via inet_free_ifa(). + + Signed-off-by: Daniel Borkmann + Reviewed-by: Jiri Pirko + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/devinet.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/devinet.c 2014-04-27 23:40:30.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/devinet.c 2014-04-28 00:34:03.000000000 +0000 +@@ -771,7 +771,7 @@ + ci = nla_data(tb[IFA_CACHEINFO]); + if (!ci->ifa_valid || ci->ifa_prefered > ci->ifa_valid) { + err = -EINVAL; +- goto errout; ++ goto errout_free; + } + *pvalid_lft = ci->ifa_valid; + *pprefered_lft = ci->ifa_prefered; +@@ -779,6 +779,8 @@ + + return ifa; + ++errout_free: ++ inet_free_ifa(ifa); + errout: + return ERR_PTR(err); + } +Index: linux-3.10-3.10.11/dummy/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1001_b4f55925ace5646d72df5af6fdab74fdbb288229.txt 2014-04-28 00:34:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.patch 2014-04-28 00:34:05.000000000 +0000 @@ -0,0 +1,74 @@ +commit 4691236cedfb12e2644f4c84b4b14a6882e1fd7b +Author: Roman Gushchin +Date: Fri Aug 2 18:36:40 2013 +0400 + + net: check net.core.somaxconn sysctl values + + [ Upstream commit 5f671d6b4ec3e6d66c2a868738af2cdea09e7509 ] + + It's possible to assign an invalid value to the net.core.somaxconn + sysctl variable, because there is no checks at all. + + The sk_max_ack_backlog field of the sock structure is defined as + unsigned short. Therefore, the backlog argument in inet_listen() + shouldn't exceed USHRT_MAX. The backlog argument in the listen() syscall + is truncated to the somaxconn value. So, the somaxconn value shouldn't + exceed 65535 (USHRT_MAX). + Also, negative values of somaxconn are meaningless. + + before: + $ sysctl -w net.core.somaxconn=256 + net.core.somaxconn = 256 + $ sysctl -w net.core.somaxconn=65536 + net.core.somaxconn = 65536 + $ sysctl -w net.core.somaxconn=-100 + net.core.somaxconn = -100 + + after: + $ sysctl -w net.core.somaxconn=256 + net.core.somaxconn = 256 + $ sysctl -w net.core.somaxconn=65536 + error: "Invalid argument" setting key "net.core.somaxconn" + $ sysctl -w net.core.somaxconn=-100 + error: "Invalid argument" setting key "net.core.somaxconn" + + Based on a prior patch from Changli Gao. + + Signed-off-by: Roman Gushchin + Reported-by: Changli Gao + Suggested-by: Eric Dumazet + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/sysctl_net_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/sysctl_net_core.c 2014-04-27 23:40:29.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/sysctl_net_core.c 2014-04-28 00:34:04.000000000 +0000 +@@ -20,7 +20,9 @@ + #include + #include + ++static int zero = 0; + static int one = 1; ++static int ushort_max = USHRT_MAX; + + #ifdef CONFIG_RPS + static int rps_sock_flow_sysctl(ctl_table *table, int write, +@@ -204,7 +206,9 @@ + .data = &init_net.core.sysctl_somaxconn, + .maxlen = sizeof(int), + .mode = 0644, +- .proc_handler = proc_dointvec ++ .extra1 = &zero, ++ .extra2 = &ushort_max, ++ .proc_handler = proc_dointvec_minmax + }, + { } + }; +Index: linux-3.10-3.10.11/dummy/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1002_4691236cedfb12e2644f4c84b4b14a6882e1fd7b.txt 2014-04-28 00:34:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.patch --- linux-3.10.11/debian/patches/rpi/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.patch 2014-04-28 00:34:05.000000000 +0000 @@ -0,0 +1,45 @@ +commit 3b8dd03efa3008933d14e7203b7b29200330f039 +Author: Michael S. Tsirkin +Date: Mon Aug 5 18:25:54 2013 +0300 + + macvlan: validate flags + + [ Upstream commit 1512747820367c8b3b8b72035f0f78c62f2bf1e9 ] + + commit df8ef8f3aaa6692970a436204c4429210addb23a + macvlan: add FDB bridge ops and macvlan flags + added a flags field to macvlan, which can be + controlled from userspace. + The idea is to make the interface future-proof + so we can add flags and not new fields. + + However, flags value isn't validated, as a result, + userspace can't detect which flags are supported. + + Signed-off-by: Michael S. Tsirkin + Cc: "David S. Miller" + Cc: John Fastabend + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/macvlan.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/macvlan.c 2014-04-27 23:40:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/macvlan.c 2014-04-28 00:34:05.000000000 +0000 +@@ -727,6 +727,10 @@ + return -EADDRNOTAVAIL; + } + ++ if (data && data[IFLA_MACVLAN_FLAGS] && ++ nla_get_u16(data[IFLA_MACVLAN_FLAGS]) & ~MACVLAN_FLAG_NOPROMISC) ++ return -EINVAL; ++ + if (data && data[IFLA_MACVLAN_MODE]) { + switch (nla_get_u32(data[IFLA_MACVLAN_MODE])) { + case MACVLAN_MODE_PRIVATE: +Index: linux-3.10-3.10.11/dummy/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1003_3b8dd03efa3008933d14e7203b7b29200330f039.txt 2014-04-28 00:34:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.patch 2014-04-28 00:34:06.000000000 +0000 @@ -0,0 +1,48 @@ +commit 5cf1ad6c6a29186821843e5d6f70ebbbce587f4f +Author: Veaceslav Falico +Date: Fri Aug 2 19:07:38 2013 +0200 + + neighbour: populate neigh_parms on alloc before calling ndo_neigh_setup + + [ Upstream commit 63134803a6369dcf7dddf7f0d5e37b9566b308d2 ] + + dev->ndo_neigh_setup() might need some of the values of neigh_parms, so + populate them before calling it. + + Signed-off-by: Veaceslav Falico + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/neighbour.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/neighbour.c 2014-04-27 23:40:29.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/neighbour.c 2014-04-28 00:34:06.000000000 +0000 +@@ -1445,16 +1445,18 @@ + atomic_set(&p->refcnt, 1); + p->reachable_time = + neigh_rand_reach_time(p->base_reachable_time); ++ dev_hold(dev); ++ p->dev = dev; ++ write_pnet(&p->net, hold_net(net)); ++ p->sysctl_table = NULL; + + if (ops->ndo_neigh_setup && ops->ndo_neigh_setup(dev, p)) { ++ release_net(net); ++ dev_put(dev); + kfree(p); + return NULL; + } + +- dev_hold(dev); +- p->dev = dev; +- write_pnet(&p->net, hold_net(net)); +- p->sysctl_table = NULL; + write_lock_bh(&tbl->lock); + p->next = tbl->parms.next; + tbl->parms.next = p; +Index: linux-3.10-3.10.11/dummy/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1004_5cf1ad6c6a29186821843e5d6f70ebbbce587f4f.txt 2014-04-28 00:34:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.patch 2014-04-28 00:34:07.000000000 +0000 @@ -0,0 +1,44 @@ +commit 92986ce4e59db8c4c44caf9633095ab07f1d79f5 +Author: Veaceslav Falico +Date: Fri Aug 2 19:07:39 2013 +0200 + + bonding: modify only neigh_parms owned by us + + [ Upstream commit 9918d5bf329d0dc5bb2d9d293bcb772bdb626e65 ] + + Otherwise, on neighbour creation, bond_neigh_init() will be called with a + foreign netdev. + + Signed-off-by: Veaceslav Falico + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/bonding/bond_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/bonding/bond_main.c 2014-04-27 23:40:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/bonding/bond_main.c 2014-04-28 00:34:07.000000000 +0000 +@@ -3770,11 +3770,17 @@ + * The bonding ndo_neigh_setup is called at init time beofre any + * slave exists. So we must declare proxy setup function which will + * be used at run time to resolve the actual slave neigh param setup. ++ * ++ * It's also called by master devices (such as vlans) to setup their ++ * underlying devices. In that case - do nothing, we're already set up from ++ * our init. + */ + static int bond_neigh_setup(struct net_device *dev, + struct neigh_parms *parms) + { +- parms->neigh_setup = bond_neigh_init; ++ /* modify only our neigh_parms */ ++ if (parms->dev == dev) ++ parms->neigh_setup = bond_neigh_init; + + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1005_92986ce4e59db8c4c44caf9633095ab07f1d79f5.txt 2014-04-28 00:34:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.patch --- linux-3.10.11/debian/patches/rpi/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.patch 2014-04-28 00:34:08.000000000 +0000 @@ -0,0 +1,55 @@ +commit 8b2b5e27cae0bd2572687869111e516ab445be34 +Author: Eric Dumazet +Date: Mon Aug 5 11:18:49 2013 -0700 + + fib_trie: remove potential out of bound access + + [ Upstream commit aab515d7c32a34300312416c50314e755ea6f765 ] + + AddressSanitizer [1] dynamic checker pointed a potential + out of bound access in leaf_walk_rcu() + + We could allocate one more slot in tnode_new() to leave the prefetch() + in-place but it looks not worth the pain. + + Bug added in commit 82cfbb008572b ("[IPV4] fib_trie: iterator recode") + + [1] : + https://code.google.com/p/address-sanitizer/wiki/AddressSanitizerForKernel + + Reported-by: Andrey Konovalov + Signed-off-by: Eric Dumazet + Cc: Dmitry Vyukov + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/fib_trie.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/fib_trie.c 2014-04-27 23:40:28.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/fib_trie.c 2014-04-28 00:34:07.000000000 +0000 +@@ -71,7 +71,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -1761,10 +1760,8 @@ + if (!c) + continue; + +- if (IS_LEAF(c)) { +- prefetch(rcu_dereference_rtnl(p->child[idx])); ++ if (IS_LEAF(c)) + return (struct leaf *) c; +- } + + /* Rescan start scanning in new node */ + p = (struct tnode *) c; +Index: linux-3.10-3.10.11/dummy/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1006_8b2b5e27cae0bd2572687869111e516ab445be34.txt 2014-04-28 00:34:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.patch --- linux-3.10.11/debian/patches/rpi/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.patch 2014-04-28 00:34:09.000000000 +0000 @@ -0,0 +1,42 @@ +commit 5ddf771720b5761435133058842f274072afa8ed +Author: Linus Lüssing +Date: Tue Aug 6 00:32:05 2013 +0200 + + bridge: don't try to update timers in case of broken MLD queries + + [ Upstream commit 248ba8ec05a2c3b118c2224e57eb10c128176ab1 ] + + Currently we are reading an uninitialized value for the max_delay + variable when snooping an MLD query message of invalid length and would + update our timers with that. + + Fixing this by simply ignoring such broken MLD queries (just like we do + for IGMP already). + + This is a regression introduced by: + "bridge: disable snooping if there is no querier" (b00589af3b04) + + Reported-by: Paul Bolle + Signed-off-by: Linus Lüssing + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_multicast.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_multicast.c 2014-04-27 23:40:28.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_multicast.c 2014-04-28 00:34:08.000000000 +0000 +@@ -1185,7 +1185,7 @@ + max_delay = msecs_to_jiffies(ntohs(mld->mld_maxdelay)); + if (max_delay) + group = &mld->mld_mca; +- } else if (skb->len >= sizeof(*mld2q)) { ++ } else { + if (!pskb_may_pull(skb, sizeof(*mld2q))) { + err = -EINVAL; + goto out; +Index: linux-3.10-3.10.11/dummy/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1007_5ddf771720b5761435133058842f274072afa8ed.txt 2014-04-28 00:34:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.patch 2014-04-28 00:34:10.000000000 +0000 @@ -0,0 +1,72 @@ +commit 16f033319c6805588375afbda88ea5a513393dd3 +Author: Eric Dumazet +Date: Mon Aug 5 17:10:15 2013 -0700 + + tcp: cubic: fix overflow error in bictcp_update() + + [ Upstream commit 2ed0edf9090bf4afa2c6fc4f38575a85a80d4b20 ] + + commit 17a6e9f1aa9 ("tcp_cubic: fix clock dependency") added an + overflow error in bictcp_update() in following code : + + /* change the unit from HZ to bictcp_HZ */ + t = ((tcp_time_stamp + msecs_to_jiffies(ca->delay_min>>3) - + ca->epoch_start) << BICTCP_HZ) / HZ; + + Because msecs_to_jiffies() being unsigned long, compiler does + implicit type promotion. + + We really want to constrain (tcp_time_stamp - ca->epoch_start) + to a signed 32bit value, or else 't' has unexpected high values. + + This bugs triggers an increase of retransmit rates ~24 days after + boot [1], as the high order bit of tcp_time_stamp flips. + + [1] for hosts with HZ=1000 + + Big thanks to Van Jacobson for spotting this problem. + + Diagnosed-by: Van Jacobson + Signed-off-by: Eric Dumazet + Cc: Neal Cardwell + Cc: Yuchung Cheng + Cc: Stephen Hemminger + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_cubic.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_cubic.c 2014-04-27 23:40:27.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_cubic.c 2014-04-28 00:34:09.000000000 +0000 +@@ -206,8 +206,8 @@ + */ + static inline void bictcp_update(struct bictcp *ca, u32 cwnd) + { +- u64 offs; +- u32 delta, t, bic_target, max_cnt; ++ u32 delta, bic_target, max_cnt; ++ u64 offs, t; + + ca->ack_cnt++; /* count the number of ACKs */ + +@@ -250,9 +250,11 @@ + * if the cwnd < 1 million packets !!! + */ + ++ t = (s32)(tcp_time_stamp - ca->epoch_start); ++ t += msecs_to_jiffies(ca->delay_min >> 3); + /* change the unit from HZ to bictcp_HZ */ +- t = ((tcp_time_stamp + msecs_to_jiffies(ca->delay_min>>3) +- - ca->epoch_start) << BICTCP_HZ) / HZ; ++ t <<= BICTCP_HZ; ++ do_div(t, HZ); + + if (t < ca->bic_K) /* t - K */ + offs = ca->bic_K - t; +Index: linux-3.10-3.10.11/dummy/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1008_16f033319c6805588375afbda88ea5a513393dd3.txt 2014-04-28 00:34:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.patch 2014-04-28 00:34:10.000000000 +0000 @@ -0,0 +1,50 @@ +commit ca02d414915693909f9d7f455c4598d3f8b514b3 +Author: Eric Dumazet +Date: Mon Aug 5 20:05:12 2013 -0700 + + tcp: cubic: fix bug in bictcp_acked() + + [ Upstream commit cd6b423afd3c08b27e1fed52db828ade0addbc6b ] + + While investigating about strange increase of retransmit rates + on hosts ~24 days after boot, Van found hystart was disabled + if ca->epoch_start was 0, as following condition is true + when tcp_time_stamp high order bit is set. + + (s32)(tcp_time_stamp - ca->epoch_start) < HZ + + Quoting Van : + + At initialization & after every loss ca->epoch_start is set to zero so + I believe that the above line will turn off hystart as soon as the 2^31 + bit is set in tcp_time_stamp & hystart will stay off for 24 days. + I think we've observed that cubic's restart is too aggressive without + hystart so this might account for the higher drop rate we observe. + + Diagnosed-by: Van Jacobson + Signed-off-by: Eric Dumazet + Cc: Neal Cardwell + Cc: Yuchung Cheng + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_cubic.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_cubic.c 2014-04-28 00:34:09.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_cubic.c 2014-04-28 00:34:10.000000000 +0000 +@@ -416,7 +416,7 @@ + return; + + /* Discard delay samples right after fast recovery */ +- if ((s32)(tcp_time_stamp - ca->epoch_start) < HZ) ++ if (ca->epoch_start && (s32)(tcp_time_stamp - ca->epoch_start) < HZ) + return; + + delay = (rtt_us << 3) / USEC_PER_MSEC; +Index: linux-3.10-3.10.11/dummy/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1009_ca02d414915693909f9d7f455c4598d3f8b514b3.txt 2014-04-28 00:34:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.patch 2014-04-28 00:34:11.000000000 +0000 @@ -0,0 +1,62 @@ +commit 24e8ac721e0e13cab478bd190977daac48b6146c +Author: Hannes Frederic Sowa +Date: Wed Aug 7 02:34:31 2013 +0200 + + ipv6: don't stop backtracking in fib6_lookup_1 if subtree does not match + + [ Upstream commit 3e3be275851bc6fc90bfdcd732cd95563acd982b ] + + In case a subtree did not match we currently stop backtracking and return + NULL (root table from fib_lookup). This could yield in invalid routing + table lookups when using subtrees. + + Instead continue to backtrack until a valid subtree or node is found + and return this match. + + Also remove unneeded NULL check. + + Reported-by: Teco Boot + Cc: YOSHIFUJI Hideaki + Cc: David Lamparter + Cc: + Signed-off-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_fib.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_fib.c 2014-04-27 23:40:27.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_fib.c 2014-04-28 00:34:11.000000000 +0000 +@@ -993,14 +993,22 @@ + + if (ipv6_prefix_equal(&key->addr, args->addr, key->plen)) { + #ifdef CONFIG_IPV6_SUBTREES +- if (fn->subtree) +- fn = fib6_lookup_1(fn->subtree, args + 1); ++ if (fn->subtree) { ++ struct fib6_node *sfn; ++ sfn = fib6_lookup_1(fn->subtree, ++ args + 1); ++ if (!sfn) ++ goto backtrack; ++ fn = sfn; ++ } + #endif +- if (!fn || fn->fn_flags & RTN_RTINFO) ++ if (fn->fn_flags & RTN_RTINFO) + return fn; + } + } +- ++#ifdef CONFIG_IPV6_SUBTREES ++backtrack: ++#endif + if (fn->fn_flags & RTN_ROOT) + break; + +Index: linux-3.10-3.10.11/dummy/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1010_24e8ac721e0e13cab478bd190977daac48b6146c.txt 2014-04-28 00:34:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.patch --- linux-3.10.11/debian/patches/rpi/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.patch 2014-04-28 00:34:12.000000000 +0000 @@ -0,0 +1,42 @@ +commit 27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829 +Author: Timo Teräs +Date: Tue Aug 6 13:45:43 2013 +0300 + + ip_gre: fix ipgre_header to return correct offset MIME-Version: 1.0 + + [ Upstream commit 77a482bdb2e68d13fae87541b341905ba70d572b ] + + Fix ipgre_header() (header_ops->create) to return the correct + amount of bytes pushed. Most callers of dev_hard_header() seem + to care only if it was success, but af_packet.c uses it as + offset to the skb to copy from userspace only once. In practice + this fixes packet socket sendto()/sendmsg() to gre tunnels. + + Regression introduced in c54419321455631079c7d6e60bc732dd0c5914c5 + ("GRE: Refactor GRE tunneling code.") + + Cc: Pravin B Shelar + Signed-off-by: Timo Teräs + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/ip_gre.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_gre.c 2014-04-27 23:40:26.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_gre.c 2014-04-28 00:34:12.000000000 +0000 +@@ -572,7 +572,7 @@ + if (daddr) + memcpy(&iph->daddr, daddr, 4); + if (iph->daddr) +- return t->hlen; ++ return t->hlen + sizeof(*iph); + + return -(t->hlen + sizeof(*iph)); + } +Index: linux-3.10-3.10.11/dummy/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1011_27c1c98bd3b44b7c5f5c0ecfe1a1ec1240b73829.txt 2014-04-28 00:34:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.patch --- linux-3.10.11/debian/patches/rpi/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.patch 2014-04-28 00:34:13.000000000 +0000 @@ -0,0 +1,33 @@ +commit 6c1a4bb872100c852b07480396744608278dd9ee +Author: Dave Jones +Date: Fri Aug 9 11:16:34 2013 -0700 + + 8139cp: Fix skb leak in rx_status_loop failure path. + + [ Upstream commit d06f5187469eee1b2932c02fd093d113cfc60d5e ] + + Introduced in cf3c4c03060b688cbc389ebc5065ebcce5653e96 + ("8139cp: Add dma_mapping_error checking") + + Signed-off-by: Dave Jones + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/realtek/8139cp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/realtek/8139cp.c 2014-04-27 23:40:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/realtek/8139cp.c 2014-04-28 00:34:12.000000000 +0000 +@@ -524,6 +524,7 @@ + PCI_DMA_FROMDEVICE); + if (dma_mapping_error(&cp->pdev->dev, new_mapping)) { + dev->stats.rx_dropped++; ++ kfree_skb(new_skb); + goto rx_next; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1012_6c1a4bb872100c852b07480396744608278dd9ee.txt 2014-04-28 00:34:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.patch 2014-04-28 00:34:14.000000000 +0000 @@ -0,0 +1,33 @@ +commit 21db4be1321b1fe80a28eb122e459c8ab3c2bd1f +Author: Sridhar Samudrala +Date: Thu Aug 8 15:19:48 2013 -0700 + + rtnetlink: Fix inverted check in ndo_dflt_fdb_del() + + [ Upstream commit 645359930231d5e78fd3296a38b98c1a658a7ade ] + + Fix inverted check when deleting an fdb entry. + + Signed-off-by: Sridhar Samudrala + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/rtnetlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/rtnetlink.c 2014-04-27 23:40:26.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/rtnetlink.c 2014-04-28 00:34:13.000000000 +0000 +@@ -2142,7 +2142,7 @@ + /* If aging addresses are supported device will need to + * implement its own handler for this. + */ +- if (ndm->ndm_state & NUD_PERMANENT) { ++ if (!(ndm->ndm_state & NUD_PERMANENT)) { + pr_info("%s: FDB only supports static addresses\n", dev->name); + return -EINVAL; + } +Index: linux-3.10-3.10.11/dummy/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1013_21db4be1321b1fe80a28eb122e459c8ab3c2bd1f.txt 2014-04-28 00:34:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.patch --- linux-3.10.11/debian/patches/rpi/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.patch 2014-04-28 00:34:15.000000000 +0000 @@ -0,0 +1,101 @@ +commit e307a8acf8c075261f8110b7088f20d2f7206f56 +Author: Pravin B Shelar +Date: Fri Aug 23 12:44:55 2013 -0700 + + genl: Fix genl dumpit() locking. + + [ Upstream commit 9b96309c5b0b9e466773c07a5bc8b7b68fcf010a ] + + In case of genl-family with parallel ops off, dumpif() callback + is expected to run under genl_lock, But commit def3117493eafd9df + (genl: Allow concurrent genl callbacks.) changed this behaviour + where only first dumpit() op was called under genl-lock. + For subsequent dump, only nlk->cb_lock was taken. + Following patch fixes it by defining locked dumpit() and done() + callback which takes care of genl-locking. + + Signed-off-by: Pravin B Shelar + CC: Jesse Gross + CC: Johannes Berg + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/netlink/genetlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/netlink/genetlink.c 2014-04-27 23:40:25.000000000 +0000 ++++ linux-3.10-3.10.11/net/netlink/genetlink.c 2014-04-28 00:34:14.000000000 +0000 +@@ -544,6 +544,30 @@ + } + EXPORT_SYMBOL(genlmsg_put); + ++static int genl_lock_dumpit(struct sk_buff *skb, struct netlink_callback *cb) ++{ ++ struct genl_ops *ops = cb->data; ++ int rc; ++ ++ genl_lock(); ++ rc = ops->dumpit(skb, cb); ++ genl_unlock(); ++ return rc; ++} ++ ++static int genl_lock_done(struct netlink_callback *cb) ++{ ++ struct genl_ops *ops = cb->data; ++ int rc = 0; ++ ++ if (ops->done) { ++ genl_lock(); ++ rc = ops->done(cb); ++ genl_unlock(); ++ } ++ return rc; ++} ++ + static int genl_family_rcv_msg(struct genl_family *family, + struct sk_buff *skb, + struct nlmsghdr *nlh) +@@ -572,15 +596,32 @@ + return -EPERM; + + if (nlh->nlmsg_flags & NLM_F_DUMP) { +- struct netlink_dump_control c = { +- .dump = ops->dumpit, +- .done = ops->done, +- }; ++ int rc; + + if (ops->dumpit == NULL) + return -EOPNOTSUPP; + +- return netlink_dump_start(net->genl_sock, skb, nlh, &c); ++ if (!family->parallel_ops) { ++ struct netlink_dump_control c = { ++ .data = ops, ++ .dump = genl_lock_dumpit, ++ .done = genl_lock_done, ++ }; ++ ++ genl_unlock(); ++ rc = netlink_dump_start(net->genl_sock, skb, nlh, &c); ++ genl_lock(); ++ ++ } else { ++ struct netlink_dump_control c = { ++ .dump = ops->dumpit, ++ .done = ops->done, ++ }; ++ ++ rc = netlink_dump_start(net->genl_sock, skb, nlh, &c); ++ } ++ ++ return rc; + } + + if (ops->doit == NULL) +Index: linux-3.10-3.10.11/dummy/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1014_e307a8acf8c075261f8110b7088f20d2f7206f56.txt 2014-04-28 00:34:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.patch 2014-04-28 00:34:16.000000000 +0000 @@ -0,0 +1,152 @@ +commit a8077ef001460c41bc0509b096d3d342002c4d9b +Author: Pravin B Shelar +Date: Fri Aug 23 12:45:04 2013 -0700 + + genl: Hold reference on correct module while netlink-dump. + + [ Upstream commit 33c6b1f6b154894321f5734e50c66621e9134e7e ] + + netlink dump operations take module as parameter to hold + reference for entire netlink dump duration. + Currently it holds ref only on genl module which is not correct + when we use ops registered to genl from another module. + Following patch adds module pointer to genl_ops so that netlink + can hold ref count on it. + + Signed-off-by: Pravin B Shelar + CC: Jesse Gross + CC: Johannes Berg + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/genetlink.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/genetlink.h 2014-04-27 23:40:25.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/genetlink.h 2014-04-28 00:34:15.000000000 +0000 +@@ -61,6 +61,7 @@ + struct list_head ops_list; /* private */ + struct list_head family_list; /* private */ + struct list_head mcast_groups; /* private */ ++ struct module *module; + }; + + /** +@@ -121,9 +122,24 @@ + struct list_head ops_list; + }; + +-extern int genl_register_family(struct genl_family *family); +-extern int genl_register_family_with_ops(struct genl_family *family, ++extern int __genl_register_family(struct genl_family *family); ++ ++static inline int genl_register_family(struct genl_family *family) ++{ ++ family->module = THIS_MODULE; ++ return __genl_register_family(family); ++} ++ ++extern int __genl_register_family_with_ops(struct genl_family *family, + struct genl_ops *ops, size_t n_ops); ++ ++static inline int genl_register_family_with_ops(struct genl_family *family, ++ struct genl_ops *ops, size_t n_ops) ++{ ++ family->module = THIS_MODULE; ++ return __genl_register_family_with_ops(family, ops, n_ops); ++} ++ + extern int genl_unregister_family(struct genl_family *family); + extern int genl_register_ops(struct genl_family *, struct genl_ops *ops); + extern int genl_unregister_ops(struct genl_family *, struct genl_ops *ops); +Index: linux-3.10-3.10.11/net/netlink/genetlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/netlink/genetlink.c 2014-04-28 00:34:14.000000000 +0000 ++++ linux-3.10-3.10.11/net/netlink/genetlink.c 2014-04-28 00:34:15.000000000 +0000 +@@ -364,7 +364,7 @@ + EXPORT_SYMBOL(genl_unregister_ops); + + /** +- * genl_register_family - register a generic netlink family ++ * __genl_register_family - register a generic netlink family + * @family: generic netlink family + * + * Registers the specified family after validating it first. Only one +@@ -374,7 +374,7 @@ + * + * Return 0 on success or a negative error code. + */ +-int genl_register_family(struct genl_family *family) ++int __genl_register_family(struct genl_family *family) + { + int err = -EINVAL; + +@@ -430,10 +430,10 @@ + errout: + return err; + } +-EXPORT_SYMBOL(genl_register_family); ++EXPORT_SYMBOL(__genl_register_family); + + /** +- * genl_register_family_with_ops - register a generic netlink family ++ * __genl_register_family_with_ops - register a generic netlink family + * @family: generic netlink family + * @ops: operations to be registered + * @n_ops: number of elements to register +@@ -457,12 +457,12 @@ + * + * Return 0 on success or a negative error code. + */ +-int genl_register_family_with_ops(struct genl_family *family, ++int __genl_register_family_with_ops(struct genl_family *family, + struct genl_ops *ops, size_t n_ops) + { + int err, i; + +- err = genl_register_family(family); ++ err = __genl_register_family(family); + if (err) + return err; + +@@ -476,7 +476,7 @@ + genl_unregister_family(family); + return err; + } +-EXPORT_SYMBOL(genl_register_family_with_ops); ++EXPORT_SYMBOL(__genl_register_family_with_ops); + + /** + * genl_unregister_family - unregister generic netlink family +@@ -603,22 +603,24 @@ + + if (!family->parallel_ops) { + struct netlink_dump_control c = { ++ .module = family->module, + .data = ops, + .dump = genl_lock_dumpit, + .done = genl_lock_done, + }; + + genl_unlock(); +- rc = netlink_dump_start(net->genl_sock, skb, nlh, &c); ++ rc = __netlink_dump_start(net->genl_sock, skb, nlh, &c); + genl_lock(); + + } else { + struct netlink_dump_control c = { ++ .module = family->module, + .dump = ops->dumpit, + .done = ops->done, + }; + +- rc = netlink_dump_start(net->genl_sock, skb, nlh, &c); ++ rc = __netlink_dump_start(net->genl_sock, skb, nlh, &c); + } + + return rc; +Index: linux-3.10-3.10.11/dummy/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1015_a8077ef001460c41bc0509b096d3d342002c4d9b.txt 2014-04-28 00:34:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.patch --- linux-3.10.11/debian/patches/rpi/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.patch 2014-04-28 00:34:17.000000000 +0000 @@ -0,0 +1,81 @@ +commit e8d11678770b9bbdcc5c2a9b3a041d136575f322 +Author: Pravin B Shelar +Date: Tue Aug 13 01:41:06 2013 -0700 + + ip_tunnel: Do not use inner ip-header-id for tunnel ip-header-id. + + [ Upstream commit 4221f40513233fa8edeef7fc82e44163fde03b9b ] + + Using inner-id for tunnel id is not safe in some rare cases. + E.g. packets coming from multiple sources entering same tunnel + can have same id. Therefore on tunnel packet receive we + could have packets from two different stream but with same + source and dst IP with same ip-id which could confuse ip packet + reassembly. + + Following patch reverts optimization from commit + 490ab08127 (IP_GRE: Fix IP-Identification.) + + Signed-off-by: Pravin B Shelar + CC: Jarno Rajahalme + CC: Ansis Atteka + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/vxlan.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/vxlan.c 2014-04-27 23:40:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/vxlan.c 2014-04-28 00:34:16.000000000 +0000 +@@ -1090,7 +1090,7 @@ + iph->daddr = dst; + iph->saddr = fl4.saddr; + iph->ttl = ttl ? : ip4_dst_hoplimit(&rt->dst); +- tunnel_ip_select_ident(skb, old_iph, &rt->dst); ++ __ip_select_ident(iph, &rt->dst, (skb_shinfo(skb)->gso_segs ?: 1) - 1); + + nf_reset(skb); + +Index: linux-3.10-3.10.11/include/net/ip_tunnels.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/ip_tunnels.h 2014-04-27 23:40:25.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/ip_tunnels.h 2014-04-28 00:34:16.000000000 +0000 +@@ -141,20 +141,6 @@ + return INET_ECN_encapsulate(tos, inner); + } + +-static inline void tunnel_ip_select_ident(struct sk_buff *skb, +- const struct iphdr *old_iph, +- struct dst_entry *dst) +-{ +- struct iphdr *iph = ip_hdr(skb); +- +- /* Use inner packet iph-id if possible. */ +- if (skb->protocol == htons(ETH_P_IP) && old_iph->id) +- iph->id = old_iph->id; +- else +- __ip_select_ident(iph, dst, +- (skb_shinfo(skb)->gso_segs ?: 1) - 1); +-} +- + static inline void iptunnel_xmit(struct sk_buff *skb, struct net_device *dev) + { + int err; +Index: linux-3.10-3.10.11/net/ipv4/ip_tunnel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_tunnel.c 2014-04-27 23:40:25.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_tunnel.c 2014-04-28 00:34:16.000000000 +0000 +@@ -686,7 +686,7 @@ + iph->daddr = fl4.daddr; + iph->saddr = fl4.saddr; + iph->ttl = ttl; +- tunnel_ip_select_ident(skb, inner_iph, &rt->dst); ++ __ip_select_ident(iph, &rt->dst, (skb_shinfo(skb)->gso_segs ?: 1) - 1); + + iptunnel_xmit(skb, dev); + return; +Index: linux-3.10-3.10.11/dummy/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1016_e8d11678770b9bbdcc5c2a9b3a041d136575f322.txt 2014-04-28 00:34:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.patch --- linux-3.10.11/debian/patches/rpi/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.patch 2014-04-28 00:34:17.000000000 +0000 @@ -0,0 +1,74 @@ +commit f784dbb9b9b868185b78295b120dbc1f79513e55 +Author: Asbjoern Sloth Toennesen +Date: Mon Aug 12 16:30:09 2013 +0000 + + rtnetlink: rtnl_bridge_getlink: Call nlmsg_find_attr() with ifinfomsg header + + [ Upstream commit 3e805ad288c524bb65aad3f1e004402223d3d504 ] + + Fix the iproute2 command `bridge vlan show`, after switching from + rtgenmsg to ifinfomsg. + + Let's start with a little history: + + Feb 20: Vlad Yasevich got his VLAN-aware bridge patchset included in + the 3.9 merge window. + In the kernel commit 6cbdceeb, he added attribute support to + bridge GETLINK requests sent with rtgenmsg. + + Mar 6th: Vlad got this iproute2 reference implementation of the bridge + vlan netlink interface accepted (iproute2 9eff0e5c) + + Apr 25th: iproute2 switched from using rtgenmsg to ifinfomsg (63338dca) + http://patchwork.ozlabs.org/patch/239602/ + http://marc.info/?t=136680900700007 + + Apr 28th: Linus released 3.9 + + Apr 30th: Stephen released iproute2 3.9.0 + + The `bridge vlan show` command haven't been working since the switch to + ifinfomsg, or in a released version of iproute2. Since the kernel side + only supports rtgenmsg, which iproute2 switched away from just prior to + the iproute2 3.9.0 release. + + I haven't been able to find any documentation, about neither rtgenmsg + nor ifinfomsg, and in which situation to use which, but kernel commit + 88c5b5ce seams to suggest that ifinfomsg should be used. + + Fixing this in kernel will break compatibility, but I doubt that anybody + have been using it due to this bug in the user space reference + implementation, at least not without noticing this bug. That said the + functionality is still fully functional in 3.9, when reversing iproute2 + commit 63338dca. + + This could also be fixed in iproute2, but thats an ugly patch that would + reintroduce rtgenmsg in iproute2, and from searching in netdev it seams + like rtgenmsg usage is discouraged. I'm assuming that the only reason + that Vlad implemented the kernel side to use rtgenmsg, was because + iproute2 was using it at the time. + + Signed-off-by: Asbjoern Sloth Toennesen + Reviewed-by: Vlad Yasevich + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/rtnetlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/rtnetlink.c 2014-04-28 00:34:13.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/rtnetlink.c 2014-04-28 00:34:17.000000000 +0000 +@@ -2374,7 +2374,7 @@ + struct nlattr *extfilt; + u32 filter_mask = 0; + +- extfilt = nlmsg_find_attr(cb->nlh, sizeof(struct rtgenmsg), ++ extfilt = nlmsg_find_attr(cb->nlh, sizeof(struct ifinfomsg), + IFLA_EXT_MASK); + if (extfilt) + filter_mask = nla_get_u32(extfilt); +Index: linux-3.10-3.10.11/dummy/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1017_f784dbb9b9b868185b78295b120dbc1f79513e55.txt 2014-04-28 00:34:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.patch --- linux-3.10.11/debian/patches/rpi/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.patch 2014-04-28 00:34:18.000000000 +0000 @@ -0,0 +1,50 @@ +commit b59bde78dbf049a2671603034562940ac6eb1181 +Author: Dan Carpenter +Date: Thu Aug 15 15:52:57 2013 +0300 + + tun: signedness bug in tun_get_user() + + [ Upstream commit 15718ea0d844e4816dbd95d57a8a0e3e264ba90e ] + + The recent fix d9bf5f1309 "tun: compare with 0 instead of total_len" is + not totally correct. Because "len" and "sizeof()" are size_t type, that + means they are never less than zero. + + Signed-off-by: Dan Carpenter + Acked-by: Michael S. Tsirkin + Acked-by: Neil Horman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/tun.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/tun.c 2014-04-27 23:40:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/tun.c 2014-04-28 00:34:18.000000000 +0000 +@@ -1076,8 +1076,9 @@ + u32 rxhash; + + if (!(tun->flags & TUN_NO_PI)) { +- if ((len -= sizeof(pi)) > total_len) ++ if (len < sizeof(pi)) + return -EINVAL; ++ len -= sizeof(pi); + + if (memcpy_fromiovecend((void *)&pi, iv, 0, sizeof(pi))) + return -EFAULT; +@@ -1085,8 +1086,9 @@ + } + + if (tun->flags & TUN_VNET_HDR) { +- if ((len -= tun->vnet_hdr_sz) > total_len) ++ if (len < tun->vnet_hdr_sz) + return -EINVAL; ++ len -= tun->vnet_hdr_sz; + + if (memcpy_fromiovecend((void *)&gso, iv, offset, sizeof(gso))) + return -EFAULT; +Index: linux-3.10-3.10.11/dummy/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1018_b59bde78dbf049a2671603034562940ac6eb1181.txt 2014-04-28 00:34:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.patch 2014-04-28 00:34:19.000000000 +0000 @@ -0,0 +1,68 @@ +commit ad558a2970f60e8a52f048c96f0f6ea7dc691fb7 +Author: Hannes Frederic Sowa +Date: Fri Aug 16 13:02:27 2013 +0200 + + ipv6: remove max_addresses check from ipv6_create_tempaddr + + [ Upstream commit 4b08a8f1bd8cb4541c93ec170027b4d0782dab52 ] + + Because of the max_addresses check attackers were able to disable privacy + extensions on an interface by creating enough autoconfigured addresses: + + + + But the check is not actually needed: max_addresses protects the + kernel to install too many ipv6 addresses on an interface and guards + addrconf_prefix_rcv to install further addresses as soon as this limit + is reached. We only generate temporary addresses in direct response of + a new address showing up. As soon as we filled up the maximum number of + addresses of an interface, we stop installing more addresses and thus + also stop generating more temp addresses. + + Even if the attacker tries to generate a lot of temporary addresses + by announcing a prefix and removing it again (lifetime == 0) we won't + install more temp addresses, because the temporary addresses do count + to the maximum number of addresses, thus we would stop installing new + autoconfigured addresses when the limit is reached. + + This patch fixes CVE-2013-0343 (but other layer-2 attacks are still + possible). + + Thanks to Ding Tianhong to bring this topic up again. + + Signed-off-by: Hannes Frederic Sowa + Cc: Ding Tianhong + Cc: George Kargiotakis + Cc: P J P + Cc: YOSHIFUJI Hideaki + Acked-by: Ding Tianhong + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/addrconf.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/addrconf.c 2014-04-27 23:40:24.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/addrconf.c 2014-04-28 00:34:19.000000000 +0000 +@@ -1124,12 +1124,10 @@ + if (ifp->flags & IFA_F_OPTIMISTIC) + addr_flags |= IFA_F_OPTIMISTIC; + +- ift = !max_addresses || +- ipv6_count_addresses(idev) < max_addresses ? +- ipv6_add_addr(idev, &addr, tmp_plen, +- ipv6_addr_type(&addr)&IPV6_ADDR_SCOPE_MASK, +- addr_flags) : NULL; +- if (IS_ERR_OR_NULL(ift)) { ++ ift = ipv6_add_addr(idev, &addr, tmp_plen, ++ ipv6_addr_type(&addr)&IPV6_ADDR_SCOPE_MASK, ++ addr_flags); ++ if (IS_ERR(ift)) { + in6_ifa_put(ifp); + in6_dev_put(idev); + pr_info("%s: retry temporary address regeneration\n", __func__); +Index: linux-3.10-3.10.11/dummy/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1019_ad558a2970f60e8a52f048c96f0f6ea7dc691fb7.txt 2014-04-28 00:34:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.patch --- linux-3.10.11/debian/patches/rpi/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.patch 2014-04-28 00:34:20.000000000 +0000 @@ -0,0 +1,68 @@ +commit a829a28873ec2f5daedd77ef91e430b260af1521 +Author: Hannes Frederic Sowa +Date: Fri Aug 16 13:30:07 2013 +0200 + + ipv6: drop packets with multiple fragmentation headers + + [ Upstream commit f46078cfcd77fa5165bf849f5e568a7ac5fa569c ] + + It is not allowed for an ipv6 packet to contain multiple fragmentation + headers. So discard packets which were already reassembled by + fragmentation logic and send back a parameter problem icmp. + + The updates for RFC 6980 will come in later, I have to do a bit more + research here. + + Cc: YOSHIFUJI Hideaki + Signed-off-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/ipv6.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/ipv6.h 2014-04-27 23:40:23.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/ipv6.h 2014-04-28 00:34:19.000000000 +0000 +@@ -101,6 +101,7 @@ + #define IP6SKB_FORWARDED 2 + #define IP6SKB_REROUTED 4 + #define IP6SKB_ROUTERALERT 8 ++#define IP6SKB_FRAGMENTED 16 + }; + + #define IP6CB(skb) ((struct inet6_skb_parm*)((skb)->cb)) +Index: linux-3.10-3.10.11/net/ipv6/reassembly.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/reassembly.c 2014-04-27 23:40:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/reassembly.c 2014-04-28 00:34:19.000000000 +0000 +@@ -490,6 +490,7 @@ + ipv6_hdr(head)->payload_len = htons(payload_len); + ipv6_change_dsfield(ipv6_hdr(head), 0xff, ecn); + IP6CB(head)->nhoff = nhoff; ++ IP6CB(head)->flags |= IP6SKB_FRAGMENTED; + + /* Yes, and fold redundant checksum back. 8) */ + if (head->ip_summed == CHECKSUM_COMPLETE) +@@ -524,6 +525,9 @@ + struct net *net = dev_net(skb_dst(skb)->dev); + int evicted; + ++ if (IP6CB(skb)->flags & IP6SKB_FRAGMENTED) ++ goto fail_hdr; ++ + IP6_INC_STATS_BH(net, ip6_dst_idev(skb_dst(skb)), IPSTATS_MIB_REASMREQDS); + + /* Jumbo payload inhibits frag. header */ +@@ -544,6 +548,7 @@ + ip6_dst_idev(skb_dst(skb)), IPSTATS_MIB_REASMOKS); + + IP6CB(skb)->nhoff = (u8 *)fhdr - skb_network_header(skb); ++ IP6CB(skb)->flags |= IP6SKB_FRAGMENTED; + return 1; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1020_a829a28873ec2f5daedd77ef91e430b260af1521.txt 2014-04-28 00:34:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.patch 2014-04-28 00:34:21.000000000 +0000 @@ -0,0 +1,50 @@ +commit f3f905389f1aaae9e091a28d018c66e08c85eddd +Author: Andrey Vagin +Date: Fri Aug 16 19:04:36 2013 +0400 + + tcp: set timestamps for restored skb-s + + [ Upstream commit 7ed5c5ae96d23da22de95e1c7a239537acd378b1 ] + + When the repair mode is turned off, the write queue seqs are + updated so that the whole queue is considered to be 'already sent. + + The "when" field must be set for such skb. It's used in tcp_rearm_rto + for example. If the "when" field isn't set, the retransmit timeout can + be calculated incorrectly and a tcp connected can stop for two minutes + (TCP_RTO_MAX). + + Acked-by: Pavel Emelyanov + Cc: "David S. Miller" + Cc: Alexey Kuznetsov + Cc: James Morris + Cc: Hideaki YOSHIFUJI + Cc: Patrick McHardy + Signed-off-by: Andrey Vagin + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp.c 2014-04-27 23:40:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp.c 2014-04-28 00:34:20.000000000 +0000 +@@ -1118,6 +1118,13 @@ + goto wait_for_memory; + + /* ++ * All packets are restored as if they have ++ * already been sent. ++ */ ++ if (tp->repair) ++ TCP_SKB_CB(skb)->when = tcp_time_stamp; ++ ++ /* + * Check whether we can use HW checksum. + */ + if (sk->sk_route_caps & NETIF_F_ALL_CSUM) +Index: linux-3.10-3.10.11/dummy/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1021_f3f905389f1aaae9e091a28d018c66e08c85eddd.txt 2014-04-28 00:34:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.patch 2014-04-28 00:34:22.000000000 +0000 @@ -0,0 +1,44 @@ +commit fc26e4cf6f6be400ea7b5442982c58e76b6beda4 +Author: Willem de Bruijn +Date: Mon Aug 19 16:40:22 2013 -0400 + + packet: restore packet statistics tp_packets to include drops + + [ Upstream commit 8bcdeaff5ed544704a9a691d4aef0adb3f9c5b8f ] + + getsockopt PACKET_STATISTICS returns tp_packets + tp_drops. Commit + ee80fbf301 ("packet: account statistics only in tpacket_stats_u") + cleaned up the getsockopt PACKET_STATISTICS code. + This also changed semantics. Historically, tp_packets included + tp_drops on return. The commit removed the line that adds tp_drops + into tp_packets. + + This patch reinstates the old semantics. + + Signed-off-by: Willem de Bruijn + Acked-by: Daniel Borkmann + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/packet/af_packet.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/packet/af_packet.c 2014-04-27 23:40:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/packet/af_packet.c 2014-04-28 00:34:21.000000000 +0000 +@@ -3259,9 +3259,11 @@ + + if (po->tp_version == TPACKET_V3) { + lv = sizeof(struct tpacket_stats_v3); ++ st.stats3.tp_packets += st.stats3.tp_drops; + data = &st.stats3; + } else { + lv = sizeof(struct tpacket_stats); ++ st.stats1.tp_packets += st.stats1.tp_drops; + data = &st.stats1; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1022_fc26e4cf6f6be400ea7b5442982c58e76b6beda4.txt 2014-04-28 00:34:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.patch --- linux-3.10.11/debian/patches/rpi/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.patch 2014-04-28 00:34:23.000000000 +0000 @@ -0,0 +1,119 @@ +commit 9f0bd377e1210501cd11eef80159e5d7f6160fef +Author: Toshiaki Makita +Date: Tue Aug 20 17:10:18 2013 +0900 + + bridge: Use the correct bit length for bitmap functions in the VLAN code + + [ Upstream commit ef40b7ef181b7b1a24df2ef2d1ef84956bffa635 ] + + The VLAN code needs to know the length of the per-port VLAN bitmap to + perform its most basic operations (retrieving VLAN informations, removing + VLANs, forwarding database manipulation, etc). Unfortunately, in the + current implementation we are using a macro that indicates the bitmap + size in longs in places where the size in bits is expected, which in + some cases can cause what appear to be random failures. + Use the correct macro. + + Signed-off-by: Toshiaki Makita + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_fdb.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_fdb.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_fdb.c 2014-04-28 00:34:22.000000000 +0000 +@@ -161,7 +161,7 @@ + if (!pv) + return; + +- for_each_set_bit_from(vid, pv->vlan_bitmap, BR_VLAN_BITMAP_LEN) { ++ for_each_set_bit_from(vid, pv->vlan_bitmap, VLAN_N_VID) { + f = __br_fdb_get(br, br->dev->dev_addr, vid); + if (f && f->is_local && !f->dst) + fdb_delete(br, f); +@@ -725,7 +725,7 @@ + /* VID was specified, so use it. */ + err = __br_fdb_add(ndm, p, addr, nlh_flags, vid); + } else { +- if (!pv || bitmap_empty(pv->vlan_bitmap, BR_VLAN_BITMAP_LEN)) { ++ if (!pv || bitmap_empty(pv->vlan_bitmap, VLAN_N_VID)) { + err = __br_fdb_add(ndm, p, addr, nlh_flags, 0); + goto out; + } +@@ -734,7 +734,7 @@ + * specify a VLAN. To be nice, add/update entry for every + * vlan on this port. + */ +- for_each_set_bit(vid, pv->vlan_bitmap, BR_VLAN_BITMAP_LEN) { ++ for_each_set_bit(vid, pv->vlan_bitmap, VLAN_N_VID) { + err = __br_fdb_add(ndm, p, addr, nlh_flags, vid); + if (err) + goto out; +@@ -812,7 +812,7 @@ + + err = __br_fdb_delete(p, addr, vid); + } else { +- if (!pv || bitmap_empty(pv->vlan_bitmap, BR_VLAN_BITMAP_LEN)) { ++ if (!pv || bitmap_empty(pv->vlan_bitmap, VLAN_N_VID)) { + err = __br_fdb_delete(p, addr, 0); + goto out; + } +@@ -822,7 +822,7 @@ + * vlan on this port. + */ + err = -ENOENT; +- for_each_set_bit(vid, pv->vlan_bitmap, BR_VLAN_BITMAP_LEN) { ++ for_each_set_bit(vid, pv->vlan_bitmap, VLAN_N_VID) { + err &= __br_fdb_delete(p, addr, vid); + } + } +Index: linux-3.10-3.10.11/net/bridge/br_netlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_netlink.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_netlink.c 2014-04-28 00:34:22.000000000 +0000 +@@ -128,7 +128,7 @@ + else + pv = br_get_vlan_info(br); + +- if (!pv || bitmap_empty(pv->vlan_bitmap, BR_VLAN_BITMAP_LEN)) ++ if (!pv || bitmap_empty(pv->vlan_bitmap, VLAN_N_VID)) + goto done; + + af = nla_nest_start(skb, IFLA_AF_SPEC); +@@ -136,7 +136,7 @@ + goto nla_put_failure; + + pvid = br_get_pvid(pv); +- for_each_set_bit(vid, pv->vlan_bitmap, BR_VLAN_BITMAP_LEN) { ++ for_each_set_bit(vid, pv->vlan_bitmap, VLAN_N_VID) { + vinfo.vid = vid; + vinfo.flags = 0; + if (vid == pvid) +Index: linux-3.10-3.10.11/net/bridge/br_vlan.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_vlan.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_vlan.c 2014-04-28 00:34:22.000000000 +0000 +@@ -108,7 +108,7 @@ + + clear_bit(vid, v->vlan_bitmap); + v->num_vlans--; +- if (bitmap_empty(v->vlan_bitmap, BR_VLAN_BITMAP_LEN)) { ++ if (bitmap_empty(v->vlan_bitmap, VLAN_N_VID)) { + if (v->port_idx) + rcu_assign_pointer(v->parent.port->vlan_info, NULL); + else +@@ -122,7 +122,7 @@ + { + smp_wmb(); + v->pvid = 0; +- bitmap_zero(v->vlan_bitmap, BR_VLAN_BITMAP_LEN); ++ bitmap_zero(v->vlan_bitmap, VLAN_N_VID); + if (v->port_idx) + rcu_assign_pointer(v->parent.port->vlan_info, NULL); + else +Index: linux-3.10-3.10.11/dummy/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1023_9f0bd377e1210501cd11eef80159e5d7f6160fef.txt 2014-04-28 00:34:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.patch 2014-04-28 00:34:24.000000000 +0000 @@ -0,0 +1,202 @@ +commit c06ab09127706af38e9e2869afef82a0f63e5fd7 +Author: Jesper Dangaard Brouer +Date: Wed Aug 14 23:47:11 2013 +0200 + + net_sched: restore "linklayer atm" handling + + [ Upstream commit 8a8e3d84b1719a56f9151909e80ea6ebc5b8e318 ] + + commit 56b765b79 ("htb: improved accuracy at high rates") + broke the "linklayer atm" handling. + + tc class add ... htb rate X ceil Y linklayer atm + + The linklayer setting is implemented by modifying the rate table + which is send to the kernel. No direct parameter were + transferred to the kernel indicating the linklayer setting. + + The commit 56b765b79 ("htb: improved accuracy at high rates") + removed the use of the rate table system. + + To keep compatible with older iproute2 utils, this patch detects + the linklayer by parsing the rate table. It also supports future + versions of iproute2 to send this linklayer parameter to the + kernel directly. This is done by using the __reserved field in + struct tc_ratespec, to convey the choosen linklayer option, but + only using the lower 4 bits of this field. + + Linklayer detection is limited to speeds below 100Mbit/s, because + at high rates the rtab is gets too inaccurate, so bad that + several fields contain the same values, this resembling the ATM + detect. Fields even start to contain "0" time to send, e.g. at + 1000Mbit/s sending a 96 bytes packet cost "0", thus the rtab have + been more broken than we first realized. + + Signed-off-by: Jesper Dangaard Brouer + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/sch_generic.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/sch_generic.h 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/sch_generic.h 2014-04-28 00:34:23.000000000 +0000 +@@ -682,13 +682,19 @@ + u64 rate_bps; + u32 mult; + u16 overhead; ++ u8 linklayer; + u8 shift; + }; + + static inline u64 psched_l2t_ns(const struct psched_ratecfg *r, + unsigned int len) + { +- return ((u64)(len + r->overhead) * r->mult) >> r->shift; ++ len += r->overhead; ++ ++ if (unlikely(r->linklayer == TC_LINKLAYER_ATM)) ++ return ((u64)(DIV_ROUND_UP(len,48)*53) * r->mult) >> r->shift; ++ ++ return ((u64)len * r->mult) >> r->shift; + } + + extern void psched_ratecfg_precompute(struct psched_ratecfg *r, const struct tc_ratespec *conf); +@@ -699,6 +705,7 @@ + memset(res, 0, sizeof(*res)); + res->rate = r->rate_bps >> 3; + res->overhead = r->overhead; ++ res->linklayer = (r->linklayer & TC_LINKLAYER_MASK); + } + + #endif +Index: linux-3.10-3.10.11/include/uapi/linux/pkt_sched.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/linux/pkt_sched.h 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/linux/pkt_sched.h 2014-04-28 00:34:23.000000000 +0000 +@@ -73,9 +73,17 @@ + #define TC_H_ROOT (0xFFFFFFFFU) + #define TC_H_INGRESS (0xFFFFFFF1U) + ++/* Need to corrospond to iproute2 tc/tc_core.h "enum link_layer" */ ++enum tc_link_layer { ++ TC_LINKLAYER_UNAWARE, /* Indicate unaware old iproute2 util */ ++ TC_LINKLAYER_ETHERNET, ++ TC_LINKLAYER_ATM, ++}; ++#define TC_LINKLAYER_MASK 0x0F /* limit use to lower 4 bits */ ++ + struct tc_ratespec { + unsigned char cell_log; +- unsigned char __reserved; ++ __u8 linklayer; /* lower 4 bits */ + unsigned short overhead; + short cell_align; + unsigned short mpu; +Index: linux-3.10-3.10.11/net/sched/sch_api.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sched/sch_api.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/sched/sch_api.c 2014-04-28 00:34:23.000000000 +0000 +@@ -285,6 +285,45 @@ + return q; + } + ++/* The linklayer setting were not transferred from iproute2, in older ++ * versions, and the rate tables lookup systems have been dropped in ++ * the kernel. To keep backward compatible with older iproute2 tc ++ * utils, we detect the linklayer setting by detecting if the rate ++ * table were modified. ++ * ++ * For linklayer ATM table entries, the rate table will be aligned to ++ * 48 bytes, thus some table entries will contain the same value. The ++ * mpu (min packet unit) is also encoded into the old rate table, thus ++ * starting from the mpu, we find low and high table entries for ++ * mapping this cell. If these entries contain the same value, when ++ * the rate tables have been modified for linklayer ATM. ++ * ++ * This is done by rounding mpu to the nearest 48 bytes cell/entry, ++ * and then roundup to the next cell, calc the table entry one below, ++ * and compare. ++ */ ++static __u8 __detect_linklayer(struct tc_ratespec *r, __u32 *rtab) ++{ ++ int low = roundup(r->mpu, 48); ++ int high = roundup(low+1, 48); ++ int cell_low = low >> r->cell_log; ++ int cell_high = (high >> r->cell_log) - 1; ++ ++ /* rtab is too inaccurate at rates > 100Mbit/s */ ++ if ((r->rate > (100000000/8)) || (rtab[0] == 0)) { ++ pr_debug("TC linklayer: Giving up ATM detection\n"); ++ return TC_LINKLAYER_ETHERNET; ++ } ++ ++ if ((cell_high > cell_low) && (cell_high < 256) ++ && (rtab[cell_low] == rtab[cell_high])) { ++ pr_debug("TC linklayer: Detected ATM, low(%d)=high(%d)=%u\n", ++ cell_low, cell_high, rtab[cell_high]); ++ return TC_LINKLAYER_ATM; ++ } ++ return TC_LINKLAYER_ETHERNET; ++} ++ + static struct qdisc_rate_table *qdisc_rtab_list; + + struct qdisc_rate_table *qdisc_get_rtab(struct tc_ratespec *r, struct nlattr *tab) +@@ -308,6 +347,8 @@ + rtab->rate = *r; + rtab->refcnt = 1; + memcpy(rtab->data, nla_data(tab), 1024); ++ if (r->linklayer == TC_LINKLAYER_UNAWARE) ++ r->linklayer = __detect_linklayer(r, rtab->data); + rtab->next = qdisc_rtab_list; + qdisc_rtab_list = rtab; + } +Index: linux-3.10-3.10.11/net/sched/sch_generic.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sched/sch_generic.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/sched/sch_generic.c 2014-04-28 00:34:23.000000000 +0000 +@@ -908,6 +908,7 @@ + memset(r, 0, sizeof(*r)); + r->overhead = conf->overhead; + r->rate_bps = (u64)conf->rate << 3; ++ r->linklayer = (conf->linklayer & TC_LINKLAYER_MASK); + r->mult = 1; + /* + * Calibrate mult, shift so that token counting is accurate +Index: linux-3.10-3.10.11/net/sched/sch_htb.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sched/sch_htb.c 2014-04-28 00:34:02.000000000 +0000 ++++ linux-3.10-3.10.11/net/sched/sch_htb.c 2014-04-28 00:34:23.000000000 +0000 +@@ -1312,6 +1312,7 @@ + struct htb_sched *q = qdisc_priv(sch); + struct htb_class *cl = (struct htb_class *)*arg, *parent; + struct nlattr *opt = tca[TCA_OPTIONS]; ++ struct qdisc_rate_table *rtab = NULL, *ctab = NULL; + struct nlattr *tb[TCA_HTB_MAX + 1]; + struct tc_htb_opt *hopt; + +@@ -1333,6 +1334,18 @@ + if (!hopt->rate.rate || !hopt->ceil.rate) + goto failure; + ++ /* Keeping backward compatible with rate_table based iproute2 tc */ ++ if (hopt->rate.linklayer == TC_LINKLAYER_UNAWARE) { ++ rtab = qdisc_get_rtab(&hopt->rate, tb[TCA_HTB_RTAB]); ++ if (rtab) ++ qdisc_put_rtab(rtab); ++ } ++ if (hopt->ceil.linklayer == TC_LINKLAYER_UNAWARE) { ++ ctab = qdisc_get_rtab(&hopt->ceil, tb[TCA_HTB_CTAB]); ++ if (ctab) ++ qdisc_put_rtab(ctab); ++ } ++ + if (!cl) { /* new class */ + struct Qdisc *new_q; + int prio; +Index: linux-3.10-3.10.11/dummy/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1024_c06ab09127706af38e9e2869afef82a0f63e5fd7.txt 2014-04-28 00:34:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.patch --- linux-3.10.11/debian/patches/rpi/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.patch 2014-04-28 00:34:25.000000000 +0000 @@ -0,0 +1,36 @@ +commit 40361e8fcc76eb603970d4da02592d4dc4a6f631 +Author: Ben Hutchings +Date: Tue Jul 9 17:12:49 2013 +0100 + + sfc: Fix lookup of default RX MAC filters when steered using ethtool + + [ Upstream commit f3851b0acc5a75bd33c6d344a2e4f920e1622ff0 ] + + commit 385904f819e3 ('sfc: Don't use + efx_filter_{build,hash,increment}() for default MAC filters') used the + wrong name to find the index of default RX MAC filters at insertion/ + update time. This could result in memory corruption and would in any + case silently fail to update the filter. + + Signed-off-by: Ben Hutchings + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/sfc/filter.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/sfc/filter.c 2014-04-27 23:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/sfc/filter.c 2014-04-28 00:34:24.000000000 +0000 +@@ -675,7 +675,7 @@ + BUILD_BUG_ON(EFX_FILTER_INDEX_UC_DEF != 0); + BUILD_BUG_ON(EFX_FILTER_INDEX_MC_DEF != + EFX_FILTER_MC_DEF - EFX_FILTER_UC_DEF); +- rep_index = spec->type - EFX_FILTER_INDEX_UC_DEF; ++ rep_index = spec->type - EFX_FILTER_UC_DEF; + ins_index = rep_index; + + spin_lock_bh(&state->lock); +Index: linux-3.10-3.10.11/dummy/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1025_40361e8fcc76eb603970d4da02592d4dc4a6f631.txt 2014-04-28 00:34:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.patch 2014-04-28 00:34:26.000000000 +0000 @@ -0,0 +1,38 @@ +commit 3d740e64f6e333efb2c539d5ea7ed56a5ba2757d +Author: Sathya Perla +Date: Thu Aug 22 12:23:41 2013 +0530 + + be2net: fix disabling TX in be_close() + + [ Upstream commit 6e1f99757a2b24b7255263b2240a0eb04215174d ] + + commit fba875591 ("disable TX in be_close()") disabled TX in be_close() + to protect be_xmit() from touching freed up queues in the AER recovery + flow. But, TX must be disabled *before* cleaning up TX completions in + the close() path, not after. This allows be_tx_compl_clean() to free up + all TX-req skbs that were notified to the HW. + + Signed-off-by: Sathya Perla + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/emulex/benet/be_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/emulex/benet/be_main.c 2014-04-27 23:40:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/emulex/benet/be_main.c 2014-04-28 00:34:25.000000000 +0000 +@@ -2561,8 +2561,8 @@ + /* Wait for all pending tx completions to arrive so that + * all tx skbs are freed. + */ +- be_tx_compl_clean(adapter); + netif_tx_disable(netdev); ++ be_tx_compl_clean(adapter); + + be_rx_qs_destroy(adapter); + +Index: linux-3.10-3.10.11/dummy/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1026_3d740e64f6e333efb2c539d5ea7ed56a5ba2757d.txt 2014-04-28 00:34:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.patch 2014-04-28 00:34:26.000000000 +0000 @@ -0,0 +1,45 @@ +commit f2e39b5ea18377e079ab44323d9c8653a15fc5d6 +Author: Rob Gardner +Date: Sun Aug 25 16:02:23 2013 -0600 + + net: usb: Add HP hs2434 device to ZLP exception table + + [ Upstream commit 03803a59e32453ee5737c6096a295f748f03cc49 ] + + This patch adds another entry (HP hs2434 Mobile Broadband) to the list + of exceptional devices that require a zero length packet in order to + function properly. This list was added in commit 844e88f0. The hs2434 + is manufactured by Sierra Wireless, who also produces the MC7710, + which the ZLP exception list was created for in the first place. So + hopefully it is just this one producer's devices that will need this + workaround. + + Tested on a DM1-4310NR HP notebook, which does not function without this + change. + + Signed-off-by: Rob Gardner + Acked-by: Bjørn Mork + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/usb/cdc_mbim.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/cdc_mbim.c 2014-04-27 23:40:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/cdc_mbim.c 2014-04-28 00:34:26.000000000 +0000 +@@ -400,6 +400,10 @@ + { USB_DEVICE_AND_INTERFACE_INFO(0x1199, 0x68a2, USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long)&cdc_mbim_info_zlp, + }, ++ /* HP hs2434 Mobile Broadband Module needs ZLPs */ ++ { USB_DEVICE_AND_INTERFACE_INFO(0x3f0, 0x4b1d, USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE), ++ .driver_info = (unsigned long)&cdc_mbim_info_zlp, ++ }, + { USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_MBIM, USB_CDC_PROTO_NONE), + .driver_info = (unsigned long)&cdc_mbim_info, + }, +Index: linux-3.10-3.10.11/dummy/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1027_f2e39b5ea18377e079ab44323d9c8653a15fc5d6.txt 2014-04-28 00:34:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.patch --- linux-3.10.11/debian/patches/rpi/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.patch 2014-04-28 00:34:27.000000000 +0000 @@ -0,0 +1,50 @@ +commit 6f198dcab737db9335f1f4c7d97f801e0d5de186 +Author: Andrew Vagin +Date: Tue Aug 27 12:20:40 2013 +0400 + + tcp: initialize rcv_tstamp for restored sockets + + [ Upstream commit c7781a6e3c4a9a17e144ec2db00ebfea327bd627 ] + + u32 rcv_tstamp; /* timestamp of last received ACK */ + + Its value used in tcp_retransmit_timer, which closes socket + if the last ack was received more then TCP_RTO_MAX ago. + + Currently rcv_tstamp is initialized to zero and if tcp_retransmit_timer + is called before receiving a first ack, the connection is closed. + + This patch initializes rcv_tstamp to a timestamp, when a socket was + restored. + + Reported-by: Cyrill Gorcunov + Cc: Pavel Emelyanov + Cc: Eric Dumazet + Cc: "David S. Miller" + Cc: Alexey Kuznetsov + Cc: James Morris + Cc: Hideaki YOSHIFUJI + Cc: Patrick McHardy + Signed-off-by: Andrey Vagin + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_output.c 2014-04-27 23:40:20.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_output.c 2014-04-28 00:34:27.000000000 +0000 +@@ -2808,6 +2808,8 @@ + + if (likely(!tp->repair)) + tp->rcv_nxt = 0; ++ else ++ tp->rcv_tstamp = tcp_time_stamp; + tp->rcv_wup = tp->rcv_nxt; + tp->copied_seq = tp->rcv_nxt; + +Index: linux-3.10-3.10.11/dummy/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1028_6f198dcab737db9335f1f4c7d97f801e0d5de186.txt 2014-04-28 00:34:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.patch 2014-04-28 00:34:28.000000000 +0000 @@ -0,0 +1,70 @@ +commit 6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4 +Author: Andrew Vagin +Date: Tue Aug 27 12:21:55 2013 +0400 + + tcp: don't apply tsoffset if rcv_tsecr is zero + + [ Upstream commit e3e12028315749b7fa2edbc37328e5847be9ede9 ] + + The zero value means that tsecr is not valid, so it's a special case. + + tsoffset is used to customize tcp_time_stamp for one socket. + tsoffset is usually zero, it's used when a socket was moved from one + host to another host. + + Currently this issue affects logic of tcp_rcv_rtt_measure_ts. Due to + incorrect value of rcv_tsecr, tcp_rcv_rtt_measure_ts sets rto to + TCP_RTO_MAX. + + Reported-by: Cyrill Gorcunov + Cc: Pavel Emelyanov + Cc: Eric Dumazet + Cc: "David S. Miller" + Cc: Alexey Kuznetsov + Cc: James Morris + Cc: Hideaki YOSHIFUJI + Cc: Patrick McHardy + Signed-off-by: Andrey Vagin + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_input.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_input.c 2014-04-27 23:40:20.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_input.c 2014-04-28 00:34:28.000000000 +0000 +@@ -3598,7 +3598,10 @@ + ++ptr; + tp->rx_opt.rcv_tsval = ntohl(*ptr); + ++ptr; +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (*ptr) ++ tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ else ++ tp->rx_opt.rcv_tsecr = 0; + return true; + } + return false; +@@ -3623,7 +3626,7 @@ + } + + tcp_parse_options(skb, &tp->rx_opt, 1, NULL); +- if (tp->rx_opt.saw_tstamp) ++ if (tp->rx_opt.saw_tstamp && tp->rx_opt.rcv_tsecr) + tp->rx_opt.rcv_tsecr -= tp->tsoffset; + + return true; +@@ -5376,7 +5379,7 @@ + int saved_clamp = tp->rx_opt.mss_clamp; + + tcp_parse_options(skb, &tp->rx_opt, 0, &foc); +- if (tp->rx_opt.saw_tstamp) ++ if (tp->rx_opt.saw_tstamp && tp->rx_opt.rcv_tsecr) + tp->rx_opt.rcv_tsecr -= tp->tsoffset; + + if (th->ack) { +Index: linux-3.10-3.10.11/dummy/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1029_6fe6efd941d49f7169e78b2e60ca2dc6a56ca8b4.txt 2014-04-28 00:34:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.patch --- linux-3.10.11/debian/patches/rpi/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.patch 2014-04-28 00:34:29.000000000 +0000 @@ -0,0 +1,48 @@ +commit 5612d36ca1438c23280b962a80943d14b2e9f778 +Author: Chris Clark +Date: Tue Aug 27 12:02:15 2013 -0600 + + ipv4: sendto/hdrincl: don't use destination address found in header + + [ Upstream commit c27c9322d015dc1d9dfdf31724fca71c0476c4d1 ] + + ipv4: raw_sendmsg: don't use header's destination address + + A sendto() regression was bisected and found to start with commit + f8126f1d5136be1 (ipv4: Adjust semantics of rt->rt_gateway.) + + The problem is that it tries to ARP-lookup the constructed packet's + destination address rather than the explicitly provided address. + + Fix this using FLOWI_FLAG_KNOWN_NH so that given nexthop is used. + + cf. commit 2ad5b9e4bd314fc685086b99e90e5de3bc59e26b + + Reported-by: Chris Clark + Bisected-by: Chris Clark + Tested-by: Chris Clark + Suggested-by: Julian Anastasov + Signed-off-by: Chris Clark + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/raw.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/raw.c 2014-04-27 23:40:20.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/raw.c 2014-04-28 00:34:28.000000000 +0000 +@@ -571,7 +571,8 @@ + flowi4_init_output(&fl4, ipc.oif, sk->sk_mark, tos, + RT_SCOPE_UNIVERSE, + inet->hdrincl ? IPPROTO_RAW : sk->sk_protocol, +- inet_sk_flowi_flags(sk) | FLOWI_FLAG_CAN_SLEEP, ++ inet_sk_flowi_flags(sk) | FLOWI_FLAG_CAN_SLEEP | ++ (inet->hdrincl ? FLOWI_FLAG_KNOWN_NH : 0), + daddr, saddr, 0, 0); + + if (!inet->hdrincl) { +Index: linux-3.10-3.10.11/dummy/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1030_5612d36ca1438c23280b962a80943d14b2e9f778.txt 2014-04-28 00:34:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.patch --- linux-3.10.11/debian/patches/rpi/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.patch 2014-04-28 00:34:30.000000000 +0000 @@ -0,0 +1,76 @@ +commit 4b7ead801d3e174ae14ccaed02773041419ae278 +Author: Thomas Graf +Date: Tue Sep 3 13:37:01 2013 +0200 + + ipv6: Don't depend on per socket memory for neighbour discovery messages + + [ Upstream commit 25a6e6b84fba601eff7c28d30da8ad7cfbef0d43 ] + + Allocating skbs when sending out neighbour discovery messages + currently uses sock_alloc_send_skb() based on a per net namespace + socket and thus share a socket wmem buffer space. + + If a netdevice is temporarily unable to transmit due to carrier + loss or for other reasons, the queued up ndisc messages will cosnume + all of the wmem space and will thus prevent from any more skbs to + be allocated even for netdevices that are able to transmit packets. + + The number of neighbour discovery messages sent is very limited, + use of alloc_skb() bypasses the socket wmem buffer size enforcement + while the manual call to skb_set_owner_w() maintains the socket + reference needed for the IPv6 output path. + + This patch has orginally been posted by Eric Dumazet in a modified + form. + + Signed-off-by: Thomas Graf + Cc: Eric Dumazet + Cc: Hannes Frederic Sowa + Cc: Stephen Warren + Cc: Fabio Estevam + Tested-by: Fabio Estevam + Tested-by: Stephen Warren + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ndisc.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ndisc.c 2014-04-27 23:40:19.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ndisc.c 2014-04-28 00:34:29.000000000 +0000 +@@ -372,14 +372,11 @@ + int tlen = dev->needed_tailroom; + struct sock *sk = dev_net(dev)->ipv6.ndisc_sk; + struct sk_buff *skb; +- int err; + +- skb = sock_alloc_send_skb(sk, +- hlen + sizeof(struct ipv6hdr) + len + tlen, +- 1, &err); ++ skb = alloc_skb(hlen + sizeof(struct ipv6hdr) + len + tlen, GFP_ATOMIC); + if (!skb) { +- ND_PRINTK(0, err, "ndisc: %s failed to allocate an skb, err=%d\n", +- __func__, err); ++ ND_PRINTK(0, err, "ndisc: %s failed to allocate an skb\n", ++ __func__); + return NULL; + } + +@@ -389,6 +386,11 @@ + skb_reserve(skb, hlen + sizeof(struct ipv6hdr)); + skb_reset_transport_header(skb); + ++ /* Manually assign socket ownership as we avoid calling ++ * sock_alloc_send_pskb() to bypass wmem buffer limits ++ */ ++ skb_set_owner_w(skb, sk); ++ + return skb; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1031_4b7ead801d3e174ae14ccaed02773041419ae278.txt 2014-04-28 00:34:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.patch 2014-04-28 00:34:31.000000000 +0000 @@ -0,0 +1,39 @@ +commit b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4 +Author: Phil Oester +Date: Tue Aug 27 16:41:40 2013 -0700 + + tcp: tcp_make_synack() should use sock_wmalloc + + [ Upstream commit eb8895debe1baba41fcb62c78a16f0c63c21662a ] + + In commit 90ba9b19 (tcp: tcp_make_synack() can use alloc_skb()), Eric changed + the call to sock_wmalloc in tcp_make_synack to alloc_skb. In doing so, + the netfilter owner match lost its ability to block the SYNACK packet on + outbound listening sockets. Revert the change, restoring the owner match + functionality. + + This closes netfilter bugzilla #847. + + Signed-off-by: Phil Oester + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_output.c 2014-04-28 00:34:27.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_output.c 2014-04-28 00:34:30.000000000 +0000 +@@ -2664,7 +2664,7 @@ + int tcp_header_size; + int mss; + +- skb = alloc_skb(MAX_TCP_HEADER + 15, sk_gfp_atomic(sk, GFP_ATOMIC)); ++ skb = sock_wmalloc(sk, MAX_TCP_HEADER + 15, 1, GFP_ATOMIC); + if (unlikely(!skb)) { + dst_release(dst); + return NULL; +Index: linux-3.10-3.10.11/dummy/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1032_b70a23ab4ab5a95ab9be1bf77b73c1ad9f4e15a4.txt 2014-04-28 00:34:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.patch --- linux-3.10.11/debian/patches/rpi/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.patch 2014-04-28 00:34:32.000000000 +0000 @@ -0,0 +1,54 @@ +commit 8db07b82b70897d868d864402b43a68da5e0cd59 +Author: Erik Hugne +Date: Wed Aug 28 09:29:58 2013 +0200 + + tipc: set sk_err correctly when connection fails + + [ Upstream commit 2c8d85182348021fc0a1bed193a4be4161dc8364 ] + + Should a connect fail, if the publication/server is unavailable or + due to some other error, a positive value will be returned and errno + is never set. If the application code checks for an explicit zero + return from connect (success) or a negative return (failure), it + will not catch the error and subsequent send() calls will fail as + shown from the strace snippet below. + + socket(0x1e /* PF_??? */, SOCK_SEQPACKET, 0) = 3 + connect(3, {sa_family=0x1e /* AF_??? */, sa_data="\2\1\322\4\0\0\322\4\0\0\0\0\0\0"}, 16) = 111 + sendto(3, "test", 4, 0, NULL, 0) = -1 EPIPE (Broken pipe) + + The reason for this behaviour is that TIPC wrongly inverts error + codes set in sk_err. + + Signed-off-by: Erik Hugne + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/tipc/socket.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/tipc/socket.c 2014-04-27 23:40:19.000000000 +0000 ++++ linux-3.10-3.10.11/net/tipc/socket.c 2014-04-28 00:34:31.000000000 +0000 +@@ -1179,7 +1179,7 @@ + /* Accept only ACK or NACK message */ + if (unlikely(msg_errcode(msg))) { + sock->state = SS_DISCONNECTING; +- sk->sk_err = -ECONNREFUSED; ++ sk->sk_err = ECONNREFUSED; + retval = TIPC_OK; + break; + } +@@ -1190,7 +1190,7 @@ + res = auto_connect(sock, msg); + if (res) { + sock->state = SS_DISCONNECTING; +- sk->sk_err = res; ++ sk->sk_err = -res; + retval = TIPC_OK; + break; + } +Index: linux-3.10-3.10.11/dummy/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1033_8db07b82b70897d868d864402b43a68da5e0cd59.txt 2014-04-28 00:34:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.patch 2014-04-28 00:34:32.000000000 +0000 @@ -0,0 +1,60 @@ +commit 56a12acebcbd08342f7287a5870fe7ec2c0de91a +Author: Eric Dumazet +Date: Wed Aug 28 18:10:43 2013 -0700 + + net: revert 8728c544a9c ("net: dev_pick_tx() fix") + + [ Upstream commit 702821f4ea6f68db18aa1de7d8ed62c6ba586a64 ] + + commit 8728c544a9cbdc ("net: dev_pick_tx() fix") and commit + b6fe83e9525a ("bonding: refine IFF_XMIT_DST_RELEASE capability") + are quite incompatible : Queue selection is disabled because skb + dst was dropped before entering bonding device. + + This causes major performance regression, mainly because TCP packets + for a given flow can be sent to multiple queues. + + This is particularly visible when using the new FQ packet scheduler + with MQ + FQ setup on the slaves. + + We can safely revert the first commit now that 416186fbf8c5b + ("net: Split core bits of netdev_pick_tx into __netdev_pick_tx") + properly caps the queue_index. + + Reported-by: Xi Wang + Diagnosed-by: Xi Wang + Signed-off-by: Eric Dumazet + Cc: Tom Herbert + Cc: Alexander Duyck + Cc: Denys Fedorysychenko + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/flow_dissector.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/flow_dissector.c 2014-04-27 23:40:18.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/flow_dissector.c 2014-04-28 00:34:32.000000000 +0000 +@@ -345,14 +345,9 @@ + if (new_index < 0) + new_index = skb_tx_hash(dev, skb); + +- if (queue_index != new_index && sk) { +- struct dst_entry *dst = +- rcu_dereference_check(sk->sk_dst_cache, 1); +- +- if (dst && skb_dst(skb) == dst) +- sk_tx_queue_set(sk, queue_index); +- +- } ++ if (queue_index != new_index && sk && ++ rcu_access_pointer(sk->sk_dst_cache)) ++ sk_tx_queue_set(sk, queue_index); + + queue_index = new_index; + } +Index: linux-3.10-3.10.11/dummy/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1034_56a12acebcbd08342f7287a5870fe7ec2c0de91a.txt 2014-04-28 00:34:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.patch --- linux-3.10.11/debian/patches/rpi/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.patch 2014-04-28 00:34:33.000000000 +0000 @@ -0,0 +1,47 @@ +commit 00897febb83864e2dd388d719b256cb362198e27 +Author: Daniel Borkmann +Date: Thu Aug 29 23:55:05 2013 +0200 + + net: bridge: convert MLDv2 Query MRC into msecs_to_jiffies for max_delay + + [ Upstream commit 2d98c29b6fb3de44d9eaa73c09f9cf7209346383 ] + + While looking into MLDv1/v2 code, I noticed that bridging code does + not convert it's max delay into jiffies for MLDv2 messages as we do + in core IPv6' multicast code. + + RFC3810, 5.1.3. Maximum Response Code says: + + The Maximum Response Code field specifies the maximum time allowed + before sending a responding Report. The actual time allowed, called + the Maximum Response Delay, is represented in units of milliseconds, + and is derived from the Maximum Response Code as follows: [...] + + As we update timers that work with jiffies, we need to convert it. + + Signed-off-by: Daniel Borkmann + Cc: Linus Lüssing + Cc: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_multicast.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_multicast.c 2014-04-28 00:34:08.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_multicast.c 2014-04-28 00:34:33.000000000 +0000 +@@ -1193,7 +1193,8 @@ + mld2q = (struct mld2_query *)icmp6_hdr(skb); + if (!mld2q->mld2q_nsrcs) + group = &mld2q->mld2q_mca; +- max_delay = mld2q->mld2q_mrc ? MLDV2_MRC(ntohs(mld2q->mld2q_mrc)) : 1; ++ ++ max_delay = max(msecs_to_jiffies(MLDV2_MRC(ntohs(mld2q->mld2q_mrc))), 1UL); + } + + if (!group) +Index: linux-3.10-3.10.11/dummy/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1035_00897febb83864e2dd388d719b256cb362198e27.txt 2014-04-28 00:34:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.patch --- linux-3.10.11/debian/patches/rpi/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.patch 2014-04-28 00:34:34.000000000 +0000 @@ -0,0 +1,77 @@ +commit 2aae409672a9ec6078702b2fe92bd41ecf05d826 +Author: Jiri Bohac +Date: Fri Aug 30 11:18:45 2013 +0200 + + ICMPv6: treat dest unreachable codes 5 and 6 as EACCES, not EPROTO + + [ Upstream commit 61e76b178dbe7145e8d6afa84bb4ccea71918994 ] + + RFC 4443 has defined two additional codes for ICMPv6 type 1 (destination + unreachable) messages: + 5 - Source address failed ingress/egress policy + 6 - Reject route to destination + + Now they are treated as protocol error and icmpv6_err_convert() converts them + to EPROTO. + + RFC 4443 says: + "Codes 5 and 6 are more informative subsets of code 1." + + Treat codes 5 and 6 as code 1 (EACCES) + + Btw, connect() returning -EPROTO confuses firefox, so that fallback to + other/IPv4 addresses does not work: + https://bugzilla.mozilla.org/show_bug.cgi?id=910773 + + Signed-off-by: Jiri Bohac + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/uapi/linux/icmpv6.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/linux/icmpv6.h 2014-04-27 23:40:18.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/linux/icmpv6.h 2014-04-28 00:34:33.000000000 +0000 +@@ -115,6 +115,8 @@ + #define ICMPV6_NOT_NEIGHBOUR 2 + #define ICMPV6_ADDR_UNREACH 3 + #define ICMPV6_PORT_UNREACH 4 ++#define ICMPV6_POLICY_FAIL 5 ++#define ICMPV6_REJECT_ROUTE 6 + + /* + * Codes for Time Exceeded +Index: linux-3.10-3.10.11/net/ipv6/icmp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/icmp.c 2014-04-27 23:40:18.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/icmp.c 2014-04-28 00:34:34.000000000 +0000 +@@ -931,6 +931,14 @@ + .err = ECONNREFUSED, + .fatal = 1, + }, ++ { /* POLICY_FAIL */ ++ .err = EACCES, ++ .fatal = 1, ++ }, ++ { /* REJECT_ROUTE */ ++ .err = EACCES, ++ .fatal = 1, ++ }, + }; + + int icmpv6_err_convert(u8 type, u8 code, int *err) +@@ -942,7 +950,7 @@ + switch (type) { + case ICMPV6_DEST_UNREACH: + fatal = 1; +- if (code <= ICMPV6_PORT_UNREACH) { ++ if (code < ARRAY_SIZE(tab_unreach)) { + *err = tab_unreach[code].err; + fatal = tab_unreach[code].fatal; + } +Index: linux-3.10-3.10.11/dummy/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1036_2aae409672a9ec6078702b2fe92bd41ecf05d826.txt 2014-04-28 00:34:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.patch 2014-04-28 00:34:35.000000000 +0000 @@ -0,0 +1,60 @@ +commit 84a38c47c2bbcb361caa1631c92eaf5916e178d6 +Author: Nithin Sujir +Date: Fri Aug 30 17:01:36 2013 -0700 + + tg3: Don't turn off led on 5719 serdes port 0 + + [ Upstream commit 989038e217e94161862a959e82f9a1ecf8dda152 ] + + Turning off led on port 0 of the 5719 serdes causes all other ports to + lose power and stop functioning. Add tg3_phy_led_bug() function to check + for this condition. We use a switch() in tg3_phy_led_bug() for + consistency with the tg3_phy_power_bug() function. + + Signed-off-by: Nithin Nayak Sujir + Signed-off-by: Michael Chan + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/tg3.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/tg3.c 2014-04-28 00:32:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/tg3.c 2014-04-28 00:34:34.000000000 +0000 +@@ -3003,6 +3003,19 @@ + return false; + } + ++static bool tg3_phy_led_bug(struct tg3 *tp) ++{ ++ switch (tg3_asic_rev(tp)) { ++ case ASIC_REV_5719: ++ if ((tp->phy_flags & TG3_PHYFLG_MII_SERDES) && ++ !tp->pci_fn) ++ return true; ++ return false; ++ } ++ ++ return false; ++} ++ + static void tg3_power_down_phy(struct tg3 *tp, bool do_low_power) + { + u32 val; +@@ -3050,8 +3063,9 @@ + } + return; + } else if (do_low_power) { +- tg3_writephy(tp, MII_TG3_EXT_CTRL, +- MII_TG3_EXT_CTRL_FORCE_LED_OFF); ++ if (!tg3_phy_led_bug(tp)) ++ tg3_writephy(tp, MII_TG3_EXT_CTRL, ++ MII_TG3_EXT_CTRL_FORCE_LED_OFF); + + val = MII_TG3_AUXCTL_PCTL_100TX_LPWR | + MII_TG3_AUXCTL_PCTL_SPR_ISOLATE | +Index: linux-3.10-3.10.11/dummy/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1037_84a38c47c2bbcb361caa1631c92eaf5916e178d6.txt 2014-04-28 00:34:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.patch 2014-04-28 00:34:36.000000000 +0000 @@ -0,0 +1,49 @@ +commit bd35c1a7f659dfa01179e456881285a9f057d30c +Author: Jason Wang +Date: Mon Sep 2 16:41:00 2013 +0800 + + vhost_net: poll vhost queue after marking DMA is done + + [ Upstream commit 19c73b3e08d16ee923f3962df4abf6205127896a ] + + We used to poll vhost queue before making DMA is done, this is racy if vhost + thread were waked up before marking DMA is done which can result the signal to + be missed. Fix this by always polling the vhost thread before DMA is done. + + Signed-off-by: Jason Wang + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/vhost/net.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/vhost/net.c 2014-04-27 23:40:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/vhost/net.c 2014-04-28 00:34:35.000000000 +0000 +@@ -307,6 +307,11 @@ + struct vhost_virtqueue *vq = ubufs->vq; + int cnt = atomic_read(&ubufs->kref.refcount); + ++ /* set len to mark this desc buffers done DMA */ ++ vq->heads[ubuf->desc].len = success ? ++ VHOST_DMA_DONE_LEN : VHOST_DMA_FAILED_LEN; ++ vhost_net_ubuf_put(ubufs); ++ + /* + * Trigger polling thread if guest stopped submitting new buffers: + * in this case, the refcount after decrement will eventually reach 1 +@@ -317,10 +322,6 @@ + */ + if (cnt <= 2 || !(cnt % 16)) + vhost_poll_queue(&vq->poll); +- /* set len to mark this desc buffers done DMA */ +- vq->heads[ubuf->desc].len = success ? +- VHOST_DMA_DONE_LEN : VHOST_DMA_FAILED_LEN; +- vhost_net_ubuf_put(ubufs); + } + + /* Expects to be always run from workqueue - which acts as +Index: linux-3.10-3.10.11/dummy/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1038_bd35c1a7f659dfa01179e456881285a9f057d30c.txt 2014-04-28 00:34:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.patch --- linux-3.10.11/debian/patches/rpi/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.patch 2014-04-28 00:34:37.000000000 +0000 @@ -0,0 +1,94 @@ +commit ef1f8bcdc2febd53978905b5b0a5201104cce653 +Author: Hannes Frederic Sowa +Date: Tue Sep 3 02:13:31 2013 +0200 + + ipv6: fix null pointer dereference in __ip6addrlbl_add + + [ Upstream commit 639739b5e609a5074839bb22fc061b37baa06269 ] + + Commit b67bfe0d42cac56c512dd5da4b1b347a23f4b70a ("hlist: drop + the node parameter from iterators") changed the behavior of + hlist_for_each_entry_safe to leave the p argument NULL. + + Fix this up by tracking the last argument. + + Reported-by: Michele Baldessari + Cc: Hideaki YOSHIFUJI + Cc: Sasha Levin + Signed-off-by: Hannes Frederic Sowa + Tested-by: Michele Baldessari + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/addrlabel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/addrlabel.c 2014-04-27 23:40:17.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/addrlabel.c 2014-04-28 00:34:36.000000000 +0000 +@@ -251,38 +251,36 @@ + /* add a label */ + static int __ip6addrlbl_add(struct ip6addrlbl_entry *newp, int replace) + { ++ struct hlist_node *n; ++ struct ip6addrlbl_entry *last = NULL, *p = NULL; + int ret = 0; + +- ADDRLABEL(KERN_DEBUG "%s(newp=%p, replace=%d)\n", +- __func__, +- newp, replace); ++ ADDRLABEL(KERN_DEBUG "%s(newp=%p, replace=%d)\n", __func__, newp, ++ replace); + +- if (hlist_empty(&ip6addrlbl_table.head)) { +- hlist_add_head_rcu(&newp->list, &ip6addrlbl_table.head); +- } else { +- struct hlist_node *n; +- struct ip6addrlbl_entry *p = NULL; +- hlist_for_each_entry_safe(p, n, +- &ip6addrlbl_table.head, list) { +- if (p->prefixlen == newp->prefixlen && +- net_eq(ip6addrlbl_net(p), ip6addrlbl_net(newp)) && +- p->ifindex == newp->ifindex && +- ipv6_addr_equal(&p->prefix, &newp->prefix)) { +- if (!replace) { +- ret = -EEXIST; +- goto out; +- } +- hlist_replace_rcu(&p->list, &newp->list); +- ip6addrlbl_put(p); +- goto out; +- } else if ((p->prefixlen == newp->prefixlen && !p->ifindex) || +- (p->prefixlen < newp->prefixlen)) { +- hlist_add_before_rcu(&newp->list, &p->list); ++ hlist_for_each_entry_safe(p, n, &ip6addrlbl_table.head, list) { ++ if (p->prefixlen == newp->prefixlen && ++ net_eq(ip6addrlbl_net(p), ip6addrlbl_net(newp)) && ++ p->ifindex == newp->ifindex && ++ ipv6_addr_equal(&p->prefix, &newp->prefix)) { ++ if (!replace) { ++ ret = -EEXIST; + goto out; + } ++ hlist_replace_rcu(&p->list, &newp->list); ++ ip6addrlbl_put(p); ++ goto out; ++ } else if ((p->prefixlen == newp->prefixlen && !p->ifindex) || ++ (p->prefixlen < newp->prefixlen)) { ++ hlist_add_before_rcu(&newp->list, &p->list); ++ goto out; + } +- hlist_add_after_rcu(&p->list, &newp->list); ++ last = p; + } ++ if (last) ++ hlist_add_after_rcu(&last->list, &newp->list); ++ else ++ hlist_add_head_rcu(&newp->list, &ip6addrlbl_table.head); + out: + if (!ret) + ip6addrlbl_table.seq++; +Index: linux-3.10-3.10.11/dummy/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1039_ef1f8bcdc2febd53978905b5b0a5201104cce653.txt 2014-04-28 00:34:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.patch 2014-04-28 00:34:37.000000000 +0000 @@ -0,0 +1,49 @@ +commit a22eb149b18ed385c72d527c42dc398c97b6387f +Author: Daniel Borkmann +Date: Tue Sep 3 19:29:12 2013 +0200 + + net: ipv6: tcp: fix potential use after free in tcp_v6_do_rcv + + [ Upstream commit 3a1c756590633c0e86df606e5c618c190926a0df ] + + In tcp_v6_do_rcv() code, when processing pkt options, we soley work + on our skb clone opt_skb that we've created earlier before entering + tcp_rcv_established() on our way. However, only in condition ... + + if (np->rxopt.bits.rxtclass) + np->rcv_tclass = ipv6_get_dsfield(ipv6_hdr(skb)); + + ... we work on skb itself. As we extract every other information out + of opt_skb in ipv6_pktoptions path, this seems wrong, since skb can + already be released by tcp_rcv_established() earlier on. When we try + to access it in ipv6_hdr(), we will dereference freed skb. + + [ Bug added by commit 4c507d2897bd9b ("net: implement IP_RECVTOS for + IP_PKTOPTIONS") ] + + Signed-off-by: Daniel Borkmann + Cc: Eric Dumazet + Acked-by: Eric Dumazet + Acked-by: Jiri Benc + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/tcp_ipv6.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/tcp_ipv6.c 2014-04-27 23:40:16.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/tcp_ipv6.c 2014-04-28 00:34:37.000000000 +0000 +@@ -1426,7 +1426,7 @@ + if (np->rxopt.bits.rxhlim || np->rxopt.bits.rxohlim) + np->mcast_hops = ipv6_hdr(opt_skb)->hop_limit; + if (np->rxopt.bits.rxtclass) +- np->rcv_tclass = ipv6_get_dsfield(ipv6_hdr(skb)); ++ np->rcv_tclass = ipv6_get_dsfield(ipv6_hdr(opt_skb)); + if (ipv6_opt_accepted(sk, opt_skb)) { + skb_set_owner_r(opt_skb, sk); + opt_skb = xchg(&np->pktoptions, opt_skb); +Index: linux-3.10-3.10.11/dummy/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1040_a22eb149b18ed385c72d527c42dc398c97b6387f.txt 2014-04-28 00:34:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.patch 2014-04-28 00:34:38.000000000 +0000 @@ -0,0 +1,121 @@ +commit 4c54b9db01842eb0f4eb54af6949b7606ea39e7a +Author: Thomas Petazzoni +Date: Wed Sep 4 16:21:18 2013 +0200 + + net: mvneta: properly disable HW PHY polling and ensure adjust_link() works + + [ Upstream commit 714086029116b6b0a34e67ba1dd2f0d1cf26770c ] + + This commit fixes a long-standing bug that has been reported by many + users: on some Armada 370 platforms, only the network interface that + has been used in U-Boot to tftp the kernel works properly in + Linux. The other network interfaces can see a 'link up', but are + unable to transmit data. The reports were generally made on the Armada + 370-based Mirabox, but have also been given on the Armada 370-RD + board. + + The network MAC in the Armada 370/XP (supported by the mvneta driver + in Linux) has a functionality that allows it to continuously poll the + PHY and directly update the MAC configuration accordingly (speed, + duplex, etc.). The very first versions of the driver submitted for + review were using this hardware mechanism, but due to this, the driver + was not integrated with the kernel phylib. Following reviews, the + driver was changed to use the phylib, and therefore a software based + polling. In software based polling, Linux regularly talks to the PHY + over the MDIO bus, and sees if the link status has changed. If it's + the case then the adjust_link() callback of the driver is called to + update the MAC configuration accordingly. + + However, it turns out that the adjust_link() callback was not + configuring the hardware in a completely correct way: while it was + setting the speed and duplex bits correctly, it wasn't telling the + hardware to actually take into account those bits rather than what the + hardware-based PHY polling mechanism has concluded. So, in fact the + adjust_link() callback was basically a no-op. + + However, the network happened to be working because on the network + interfaces used by U-Boot for tftp on Armada 370 platforms because the + hardware PHY polling was enabled by the bootloader, and left enabled + by Linux. However, the second network interface not used for tftp (or + both network interfaces if the kernel is loaded from USB, NAND or SD + card) didn't had the hardware PHY polling enabled. + + This patch fixes this situation by: + + (1) Making sure that the hardware PHY polling is disabled by clearing + the MVNETA_PHY_POLLING_ENABLE bit in the MVNETA_UNIT_CONTROL + register in the driver ->probe() function. + + (2) Making sure that the duplex and speed selections made by the + adjust_link() callback are taken into account by clearing the + MVNETA_GMAC_AN_SPEED_EN and MVNETA_GMAC_AN_DUPLEX_EN bits in the + MVNETA_GMAC_AUTONEG_CONFIG register. + + This patch has been tested on Armada 370 Mirabox, and now both network + interfaces are usable after boot. + + [ Problem introduced by commit c5aff18 ("net: mvneta: driver for + Marvell Armada 370/XP network unit") ] + + Signed-off-by: Thomas Petazzoni + Cc: Willy Tarreau + Cc: Jochen De Smet + Cc: Peter Sanford + Cc: Ethan Tuttle + Cc: Chény Yves-Gael + Cc: Ryan Press + Cc: Simon Guinot + Cc: vdonnefort@lacie.com + Cc: stable@vger.kernel.org + Acked-by: Jason Cooper + Tested-by: Vincent Donnefort + Tested-by: Yves-Gael Cheny + Tested-by: Gregory CLEMENT + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/marvell/mvneta.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/marvell/mvneta.c 2014-04-28 00:33:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/marvell/mvneta.c 2014-04-28 00:34:38.000000000 +0000 +@@ -138,7 +138,9 @@ + #define MVNETA_GMAC_FORCE_LINK_PASS BIT(1) + #define MVNETA_GMAC_CONFIG_MII_SPEED BIT(5) + #define MVNETA_GMAC_CONFIG_GMII_SPEED BIT(6) ++#define MVNETA_GMAC_AN_SPEED_EN BIT(7) + #define MVNETA_GMAC_CONFIG_FULL_DUPLEX BIT(12) ++#define MVNETA_GMAC_AN_DUPLEX_EN BIT(13) + #define MVNETA_MIB_COUNTERS_BASE 0x3080 + #define MVNETA_MIB_LATE_COLLISION 0x7c + #define MVNETA_DA_FILT_SPEC_MCAST 0x3400 +@@ -916,6 +918,13 @@ + /* Assign port SDMA configuration */ + mvreg_write(pp, MVNETA_SDMA_CONFIG, val); + ++ /* Disable PHY polling in hardware, since we're using the ++ * kernel phylib to do this. ++ */ ++ val = mvreg_read(pp, MVNETA_UNIT_CONTROL); ++ val &= ~MVNETA_PHY_POLLING_ENABLE; ++ mvreg_write(pp, MVNETA_UNIT_CONTROL, val); ++ + mvneta_set_ucast_table(pp, -1); + mvneta_set_special_mcast_table(pp, -1); + mvneta_set_other_mcast_table(pp, -1); +@@ -2293,7 +2302,9 @@ + val = mvreg_read(pp, MVNETA_GMAC_AUTONEG_CONFIG); + val &= ~(MVNETA_GMAC_CONFIG_MII_SPEED | + MVNETA_GMAC_CONFIG_GMII_SPEED | +- MVNETA_GMAC_CONFIG_FULL_DUPLEX); ++ MVNETA_GMAC_CONFIG_FULL_DUPLEX | ++ MVNETA_GMAC_AN_SPEED_EN | ++ MVNETA_GMAC_AN_DUPLEX_EN); + + if (phydev->duplex) + val |= MVNETA_GMAC_CONFIG_FULL_DUPLEX; +Index: linux-3.10-3.10.11/dummy/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1041_4c54b9db01842eb0f4eb54af6949b7606ea39e7a.txt 2014-04-28 00:34:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.patch --- linux-3.10.11/debian/patches/rpi/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.patch 2014-04-28 00:34:39.000000000 +0000 @@ -0,0 +1,42 @@ +commit 751190a69d7c885b98716e2aca339f6c4b988704 +Author: John Haxby +Date: Wed Aug 14 16:23:18 2013 +0100 + + crypto: xor - Check for osxsave as well as avx in crypto/xor + + commit edb6f29464afc65fc73767540b854abf63ae7144 upstream. + + This affects xen pv guests with sufficiently old versions of xen and + sufficiently new hardware. On such a system, a guest with a btrfs + root won't even boot. + + Signed-off-by: John Haxby + Signed-off-by: Herbert Xu + Reported-by: Michael Marineau + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/include/asm/xor_avx.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/xor_avx.h 2014-04-27 23:40:16.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/xor_avx.h 2014-04-28 00:34:38.000000000 +0000 +@@ -167,12 +167,12 @@ + + #define AVX_XOR_SPEED \ + do { \ +- if (cpu_has_avx) \ ++ if (cpu_has_avx && cpu_has_osxsave) \ + xor_speed(&xor_block_avx); \ + } while (0) + + #define AVX_SELECT(FASTEST) \ +- (cpu_has_avx ? &xor_block_avx : FASTEST) ++ (cpu_has_avx && cpu_has_osxsave ? &xor_block_avx : FASTEST) + + #else + +Index: linux-3.10-3.10.11/dummy/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1042_751190a69d7c885b98716e2aca339f6c4b988704.txt 2014-04-28 00:34:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.patch 2014-04-28 00:34:40.000000000 +0000 @@ -0,0 +1,41 @@ +commit 70aa7b8f105b0b5bb82d2082a230efb7f34645a0 +Author: Sangjung Woo +Date: Wed Sep 11 14:24:21 2013 -0700 + + drivers/rtc/rtc-max77686.c: Fix wrong register + + commit 1748cbf7f7c464593232cde914f5a103181a83b5 upstream. + + Fix a read of the wrong register when checking whether the RTC timer has + reached the alarm time. + + Signed-off-by: Sangjung Woo + Signed-off-by: Myugnjoo Ham + Reviewed-by: Jonghwa Lee + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/rtc/rtc-max77686.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/rtc/rtc-max77686.c 2014-04-27 23:40:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/rtc/rtc-max77686.c 2014-04-28 00:34:39.000000000 +0000 +@@ -240,9 +240,9 @@ + } + + alrm->pending = 0; +- ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS1, &val); ++ ret = regmap_read(info->max77686->regmap, MAX77686_REG_STATUS2, &val); + if (ret < 0) { +- dev_err(info->dev, "%s:%d fail to read status1 reg(%d)\n", ++ dev_err(info->dev, "%s:%d fail to read status2 reg(%d)\n", + __func__, __LINE__, ret); + goto out; + } +Index: linux-3.10-3.10.11/dummy/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1043_70aa7b8f105b0b5bb82d2082a230efb7f34645a0.txt 2014-04-28 00:34:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.patch 2014-04-28 00:34:40.000000000 +0000 @@ -0,0 +1,68 @@ +commit 7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4 +Author: Bing Zhao +Date: Mon Aug 19 16:10:21 2013 -0700 + + mwifiex: do not create AP and P2P interfaces upon driver loading + + commit 1211c961170cedb21c30d5bb7e2033c8720b38db upstream. + + Bug 60747 - 1286:2044 [Microsoft Surface Pro] + Marvell 88W8797 wifi show 3 interface under network + https://bugzilla.kernel.org/show_bug.cgi?id=60747 + + This issue was also reported previously by OLPC and some folks from + the community. + + There are 3 network interfaces with different types being created + when mwifiex driver is loaded: + + 1. mlan0 (infra. STA) + 2. uap0 (AP) + 3. p2p0 (P2P_CLIENT) + + The Network Manager attempts to use all 3 interfaces above without + filtering the managed interface type. As the result, 3 identical + interfaces are displayed under network manager. If user happens to + click on an entry under which its interface is uap0 or p2p0, the + association will fail. + + Work around it by removing the creation of AP and P2P interfaces + at driver loading time. These interfaces can be added with 'iw' or + other applications manually when they are needed. + + Signed-off-by: Bing Zhao + Signed-off-by: Avinash Patil + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:32:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:34:40.000000000 +0000 +@@ -360,20 +360,6 @@ + dev_err(adapter->dev, "cannot create default STA interface\n"); + goto err_add_intf; + } +- +- /* Create AP interface by default */ +- if (!mwifiex_add_virtual_intf(adapter->wiphy, "uap%d", +- NL80211_IFTYPE_AP, NULL, NULL)) { +- dev_err(adapter->dev, "cannot create default AP interface\n"); +- goto err_add_intf; +- } +- +- /* Create P2P interface by default */ +- if (!mwifiex_add_virtual_intf(adapter->wiphy, "p2p%d", +- NL80211_IFTYPE_P2P_CLIENT, NULL, NULL)) { +- dev_err(adapter->dev, "cannot create default P2P interface\n"); +- goto err_add_intf; +- } + rtnl_unlock(); + + mwifiex_drv_get_driver_version(adapter, fmt, sizeof(fmt) - 1); +Index: linux-3.10-3.10.11/dummy/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1044_7bf0f5bd9213cd0d75383ec36d3aae5f08e185c4.txt 2014-04-28 00:34:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.patch --- linux-3.10.11/debian/patches/rpi/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.patch 2014-04-28 00:34:41.000000000 +0000 @@ -0,0 +1,47 @@ +commit 9cfceacb4983272c1f0a6926aec2b127143df692 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun May 26 16:55:59 2013 +0800 + + ARM: at91: dt: sam9260: add i2c gpio pinctrl + + commit f89ae61bd74ae195c464bdd97a134e30908884d5 upstream. + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nicolas Ferre + Cc: Boris BREZILLON + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9260.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9260.dtsi 2014-04-27 23:40:15.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9260.dtsi 2014-04-28 00:34:41.000000000 +0000 +@@ -340,6 +340,14 @@ + }; + }; + ++ i2c_gpio0 { ++ pinctrl_i2c_gpio0: i2c_gpio0-0 { ++ atmel,pins = ++ <0 23 0x0 0x3 /* PA23 gpio I2C_SDA pin */ ++ 0 24 0x0 0x3>; /* PA24 gpio I2C_SCL pin */ ++ }; ++ }; ++ + pioA: gpio@fffff400 { + compatible = "atmel,at91rm9200-gpio"; + reg = <0xfffff400 0x200>; +@@ -592,6 +600,8 @@ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c_gpio0>; + status = "disabled"; + }; + }; +Index: linux-3.10-3.10.11/dummy/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1045_9cfceacb4983272c1f0a6926aec2b127143df692.txt 2014-04-28 00:34:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.patch 2014-04-28 00:34:42.000000000 +0000 @@ -0,0 +1,24 @@ +commit 410dbb746130bc052bb3c7a337a86252874adbdf +Author: Greg Kroah-Hartman +Date: Sat Sep 14 06:55:12 2013 -0700 + + Linux 3.10.12 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:32:31.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:34:42.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 11 ++SUBLEVEL = 12 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1046_410dbb746130bc052bb3c7a337a86252874adbdf.txt 2014-04-28 00:34:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.patch 2014-04-28 00:34:43.000000000 +0000 @@ -0,0 +1,33 @@ +commit e62b0f0196a7ea462d04e320cdd727aed51dd60f +Author: Greg Kroah-Hartman +Date: Tue Sep 3 15:00:11 2013 -0700 + + SCSI: Allow MPT Fusion SAS 3.0 driver to be built into the kernel + + commit 9807b4d94911be4e4efb9a08481b24292a9edf8a upstream. + + Right now the Makefile for the mpt3sas driver does not even allow the + driver to be built into the kernel. So fix that up, as there doesn't + seem to be any obvious reason why this shouldn't be done. + + Signed-off-by: Greg Kroah-Hartman + Acked-by: Sreekanth Reddy + Signed-off-by: James Bottomley + +Index: linux-3.10-3.10.11/drivers/scsi/mpt3sas/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/mpt3sas/Makefile 2014-04-27 23:40:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/mpt3sas/Makefile 2014-04-28 00:34:42.000000000 +0000 +@@ -1,5 +1,5 @@ + # mpt3sas makefile +-obj-m += mpt3sas.o ++obj-$(CONFIG_SCSI_MPT3SAS) += mpt3sas.o + mpt3sas-y += mpt3sas_base.o \ + mpt3sas_config.o \ + mpt3sas_scsih.o \ +Index: linux-3.10-3.10.11/dummy/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1047_e62b0f0196a7ea462d04e320cdd727aed51dd60f.txt 2014-04-28 00:34:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.patch --- linux-3.10.11/debian/patches/rpi/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.patch 2014-04-28 00:34:44.000000000 +0000 @@ -0,0 +1,40 @@ +commit e7d63334e76b3cbb0ef599fef1643701fdb28aad +Author: Richard Weinberger +Date: Mon Aug 19 08:48:12 2013 +0200 + + UBI: Fix PEB leak in wear_leveling_worker() + + commit 5ef4414f4bc26a19cfd5cd11aee9697a863e4d51 upstream. + + get_peb_for_wl() removes the PEB from the free list. + If the WL subsystem detects that no wear leveling is needed + it cancels the operation and drops the gained PEB. + In this case we have to put the PEB back into the free list. + + This issue was introduced with commit ed4b7021c + (UBI: remove PEB from free tree in get_peb_for_wl()). + + Signed-off-by: Richard Weinberger + Signed-off-by: Artem Bityutskiy + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/mtd/ubi/wl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mtd/ubi/wl.c 2014-04-27 23:40:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mtd/ubi/wl.c 2014-04-28 00:34:43.000000000 +0000 +@@ -1069,6 +1069,9 @@ + if (!(e2->ec - e1->ec >= UBI_WL_THRESHOLD)) { + dbg_wl("no WL needed: min used EC %d, max free EC %d", + e1->ec, e2->ec); ++ ++ /* Give the unused PEB back */ ++ wl_tree_add(e2, &ubi->free); + goto out_cancel; + } + self_check_in_wl_tree(ubi, e1, &ubi->used); +Index: linux-3.10-3.10.11/dummy/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1048_e7d63334e76b3cbb0ef599fef1643701fdb28aad.txt 2014-04-28 00:34:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.patch 2014-04-28 00:34:45.000000000 +0000 @@ -0,0 +1,47 @@ +commit 13915e203f991e77eb5a52bcd4c61e5f155e3bbc +Author: Alan Stern +Date: Fri Sep 6 11:49:51 2013 -0400 + + SCSI: sd: Fix potential out-of-bounds access + + commit 984f1733fcee3fbc78d47e26c5096921c5d9946a upstream. + + This patch fixes an out-of-bounds error in sd_read_cache_type(), found + by Google's AddressSanitizer tool. When the loop ends, we know that + "offset" lies beyond the end of the data in the buffer, so no Caching + mode page was found. In theory it may be present, but the buffer size + is limited to 512 bytes. + + Signed-off-by: Alan Stern + Reported-by: Dmitry Vyukov + Signed-off-by: James Bottomley + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/scsi/sd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/sd.c 2014-04-27 23:40:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/sd.c 2014-04-28 00:34:44.000000000 +0000 +@@ -2409,14 +2409,9 @@ + } + } + +- if (modepage == 0x3F) { +- sd_printk(KERN_ERR, sdkp, "No Caching mode page " +- "present\n"); +- goto defaults; +- } else if ((buffer[offset] & 0x3f) != modepage) { +- sd_printk(KERN_ERR, sdkp, "Got wrong page\n"); +- goto defaults; +- } ++ sd_printk(KERN_ERR, sdkp, "No Caching mode page found\n"); ++ goto defaults; ++ + Page_found: + if (modepage == 8) { + sdkp->WCE = ((buffer[offset + 2] & 0x04) != 0); +Index: linux-3.10-3.10.11/dummy/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1049_13915e203f991e77eb5a52bcd4c61e5f155e3bbc.txt 2014-04-28 00:34:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.patch 2014-04-28 00:34:45.000000000 +0000 @@ -0,0 +1,52 @@ +commit 139653e11c9eec4d5eff614e688d6bec99b78d7f +Author: Herbert Xu +Date: Sun Sep 8 14:33:50 2013 +1000 + + crypto: api - Fix race condition in larval lookup + + commit 77dbd7a95e4a4f15264c333a9e9ab97ee27dc2aa upstream. + + crypto_larval_lookup should only return a larval if it created one. + Any larval created by another entity must be processed through + crypto_larval_wait before being returned. + + Otherwise this will lead to a larval being killed twice, which + will most likely lead to a crash. + + Reported-by: Kees Cook + Tested-by: Kees Cook + Signed-off-by: Herbert Xu + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/crypto/api.c +=================================================================== +--- linux-3.10-3.10.11.orig/crypto/api.c 2014-04-27 23:40:13.000000000 +0000 ++++ linux-3.10-3.10.11/crypto/api.c 2014-04-28 00:34:45.000000000 +0000 +@@ -34,6 +34,8 @@ + BLOCKING_NOTIFIER_HEAD(crypto_chain); + EXPORT_SYMBOL_GPL(crypto_chain); + ++static struct crypto_alg *crypto_larval_wait(struct crypto_alg *alg); ++ + struct crypto_alg *crypto_mod_get(struct crypto_alg *alg) + { + return try_module_get(alg->cra_module) ? crypto_alg_get(alg) : NULL; +@@ -144,8 +146,11 @@ + } + up_write(&crypto_alg_sem); + +- if (alg != &larval->alg) ++ if (alg != &larval->alg) { + kfree(larval); ++ if (crypto_is_larval(alg)) ++ alg = crypto_larval_wait(alg); ++ } + + return alg; + } +Index: linux-3.10-3.10.11/dummy/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1050_139653e11c9eec4d5eff614e688d6bec99b78d7f.txt 2014-04-28 00:34:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.patch --- linux-3.10.11/debian/patches/rpi/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.patch 2014-04-28 00:34:46.000000000 +0000 @@ -0,0 +1,54 @@ +commit d8ba750f9a2feb07bb6f0448807907b674ca4525 +Author: Anton Blanchard +Date: Wed Aug 7 02:01:19 2013 +1000 + + powerpc: Handle unaligned ldbrx/stdbrx + + commit 230aef7a6a23b6166bd4003bfff5af23c9bd381f upstream. + + Normally when we haven't implemented an alignment handler for + a load or store instruction the process will be terminated. + + The alignment handler uses the DSISR (or a pseudo one) to locate + the right handler. Unfortunately ldbrx and stdbrx overlap lfs and + stfs so we incorrectly think ldbrx is an lfs and stdbrx is an + stfs. + + This bug is particularly nasty - instead of terminating the + process we apply an incorrect fixup and continue on. + + With more and more overlapping instructions we should stop + creating a pseudo DSISR and index using the instruction directly, + but for now add a special case to catch ldbrx/stdbrx. + + Signed-off-by: Anton Blanchard + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kernel/align.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/align.c 2014-04-27 23:40:13.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/align.c 2014-04-28 00:34:46.000000000 +0000 +@@ -764,6 +764,16 @@ + nb = aligninfo[instr].len; + flags = aligninfo[instr].flags; + ++ /* ldbrx/stdbrx overlap lfs/stfs in the DSISR unfortunately */ ++ if (IS_XFORM(instruction) && ((instruction >> 1) & 0x3ff) == 532) { ++ nb = 8; ++ flags = LD+SW; ++ } else if (IS_XFORM(instruction) && ++ ((instruction >> 1) & 0x3ff) == 660) { ++ nb = 8; ++ flags = ST+SW; ++ } ++ + /* Byteswap little endian loads and stores */ + swiz = 0; + if (regs->msr & MSR_LE) { +Index: linux-3.10-3.10.11/dummy/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1051_d8ba750f9a2feb07bb6f0448807907b674ca4525.txt 2014-04-28 00:34:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.patch 2014-04-28 00:34:47.000000000 +0000 @@ -0,0 +1,97 @@ +commit d08bfff9ef39c029befa68b2641ad2f7a2c894b6 +Author: Vaidyanathan Srinivasan +Date: Fri Sep 6 00:25:06 2013 +0530 + + powerpc: Default arch idle could cede processor on pseries + + commit 363edbe2614aa90df706c0f19ccfa2a6c06af0be upstream. + + When adding cpuidle support to pSeries, we introduced two + regressions: + + - The new cpuidle backend driver only works under hypervisors + supporting the "SLPLAR" option, which isn't the case of the + old POWER4 hypervisor and the HV "light" used on js2x blades + + - The cpuidle driver registers fairly late, meaning that for + a significant portion of the boot process, we end up having + all threads spinning. This slows down the boot process and + increases the overall resource usage if the hypervisor has + shared processors. + + This fixes both by implementing a "default" idle that will cede + to the hypervisor when possible, in a very simple way without + all the bells and whisles of cpuidle. + + Reported-by: Paul Mackerras + Signed-off-by: Vaidyanathan Srinivasan + Acked-by: Deepthi Dharwar + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/platforms/pseries/setup.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/platforms/pseries/setup.c 2014-04-27 23:40:12.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/platforms/pseries/setup.c 2014-04-28 00:34:47.000000000 +0000 +@@ -354,7 +354,7 @@ + } + early_initcall(alloc_dispatch_log_kmem_cache); + +-static void pSeries_idle(void) ++static void pseries_lpar_idle(void) + { + /* This would call on the cpuidle framework, and the back-end pseries + * driver to go to idle states +@@ -362,10 +362,22 @@ + if (cpuidle_idle_call()) { + /* On error, execute default handler + * to go into low thread priority and possibly +- * low power mode. ++ * low power mode by cedeing processor to hypervisor + */ +- HMT_low(); +- HMT_very_low(); ++ ++ /* Indicate to hypervisor that we are idle. */ ++ get_lppaca()->idle = 1; ++ ++ /* ++ * Yield the processor to the hypervisor. We return if ++ * an external interrupt occurs (which are driven prior ++ * to returning here) or if a prod occurs from another ++ * processor. When returning here, external interrupts ++ * are enabled. ++ */ ++ cede_processor(); ++ ++ get_lppaca()->idle = 0; + } + } + +@@ -456,15 +468,14 @@ + + pSeries_nvram_init(); + +- if (firmware_has_feature(FW_FEATURE_SPLPAR)) { ++ if (firmware_has_feature(FW_FEATURE_LPAR)) { + vpa_init(boot_cpuid); +- ppc_md.power_save = pSeries_idle; +- } +- +- if (firmware_has_feature(FW_FEATURE_LPAR)) ++ ppc_md.power_save = pseries_lpar_idle; + ppc_md.enable_pmcs = pseries_lpar_enable_pmcs; +- else ++ } else { ++ /* No special idle routine */ + ppc_md.enable_pmcs = power4_enable_pmcs; ++ } + + ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare; + +Index: linux-3.10-3.10.11/dummy/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1052_d08bfff9ef39c029befa68b2641ad2f7a2c894b6.txt 2014-04-28 00:34:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.patch 2014-04-28 00:34:48.000000000 +0000 @@ -0,0 +1,56 @@ +commit 93326685f124a1b2a71843b1c41328be13f97bbb +Author: Roger Pau Monne +Date: Wed Jul 31 17:00:42 2013 +0200 + + xen-gnt: prevent adding duplicate gnt callbacks + + commit 5f338d9001094a56cf87bd8a280b4e7ff953bb59 upstream. + + With the current implementation, the callback in the tail of the list + can be added twice, because the check done in + gnttab_request_free_callback is bogus, callback->next can be NULL if + it is the last callback in the list. If we add the same callback twice + we end up with an infinite loop, were callback == callback->next. + + Replace this check with a proper one that iterates over the list to + see if the callback has already been added. + + Signed-off-by: Roger Pau Monné + Cc: Konrad Rzeszutek Wilk + Cc: David Vrabel + Signed-off-by: Konrad Rzeszutek Wilk + Acked-by: Matt Wilson + Reviewed-by: David Vrabel + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/xen/grant-table.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/xen/grant-table.c 2014-04-27 23:40:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/xen/grant-table.c 2014-04-28 00:34:47.000000000 +0000 +@@ -729,9 +729,18 @@ + void (*fn)(void *), void *arg, u16 count) + { + unsigned long flags; ++ struct gnttab_free_callback *cb; ++ + spin_lock_irqsave(&gnttab_list_lock, flags); +- if (callback->next) +- goto out; ++ ++ /* Check if the callback is already on the list */ ++ cb = gnttab_free_callback_list; ++ while (cb) { ++ if (cb == callback) ++ goto out; ++ cb = cb->next; ++ } ++ + callback->fn = fn; + callback->arg = arg; + callback->count = count; +Index: linux-3.10-3.10.11/dummy/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1053_93326685f124a1b2a71843b1c41328be13f97bbb.txt 2014-04-28 00:34:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.patch 2014-04-28 00:34:49.000000000 +0000 @@ -0,0 +1,44 @@ +commit 863008a9b50259d3a4b1c9a387804f9509413de4 +Author: Rob Herring +Date: Thu Aug 29 07:43:52 2013 -0500 + + ARM: xen: only set pm function ptrs for Xen guests + + commit 9dd4b2944c46e1fdbd0a516c221c8a2670cbf005 upstream. + + xen_pm_init was unconditionally setting pm_power_off and arm_pm_restart + function pointers. This breaks multi-platform kernels. Make this + conditional on running as a Xen guest and make it a late_initcall to + ensure it is setup after platform code for Dom0. + + Signed-off-by: Rob Herring + Signed-off-by: Stefano Stabellini + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/xen/enlighten.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/xen/enlighten.c 2014-04-27 23:40:12.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/xen/enlighten.c 2014-04-28 00:34:48.000000000 +0000 +@@ -273,12 +273,15 @@ + + static int __init xen_pm_init(void) + { ++ if (!xen_domain()) ++ return -ENODEV; ++ + pm_power_off = xen_power_off; + arm_pm_restart = xen_restart; + + return 0; + } +-subsys_initcall(xen_pm_init); ++late_initcall(xen_pm_init); + + static irqreturn_t xen_arm_callback(int irq, void *arg) + { +Index: linux-3.10-3.10.11/dummy/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1054_863008a9b50259d3a4b1c9a387804f9509413de4.txt 2014-04-28 00:34:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.patch 2014-04-28 00:34:50.000000000 +0000 @@ -0,0 +1,249 @@ +commit 61704f036693ca93a7d916899288eba9a98b006f +Author: Colin Cross +Date: Wed Aug 28 18:41:47 2013 -0700 + + cpuidle: coupled: abort idle if pokes are pending + + commit f983827bcb9d2c34c4d8935861a1e9128aec2baf upstream. + + Joseph Lo reported a lockup on Tegra20 caused + by a race condition in coupled cpuidle. When two or more cpus + enter idle at the same time, the first cpus to arrive may go to the + ready loop without processing pending pokes from the last cpu to + arrive. + + This patch adds a check for pending pokes once all cpus have been + synchronized in the ready loop and resets the coupled state and + retries if any cpus failed to handle their pending poke. + + Retrying on all cpus may trigger the same issue again, so this patch + also adds a check to ensure that each cpu has received at least one + poke between when it enters the waiting loop and when it moves on to + the ready loop. + + Reported-and-tested-by: Joseph Lo + Tested-by: Stephen Warren + Signed-off-by: Colin Cross + Signed-off-by: Rafael J. Wysocki + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/cpuidle/coupled.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpuidle/coupled.c 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpuidle/coupled.c 2014-04-28 00:34:49.000000000 +0000 +@@ -106,6 +106,7 @@ + cpumask_t coupled_cpus; + int requested_state[NR_CPUS]; + atomic_t ready_waiting_counts; ++ atomic_t abort_barrier; + int online_count; + int refcnt; + int prevent; +@@ -122,12 +123,19 @@ + static DEFINE_PER_CPU(struct call_single_data, cpuidle_coupled_poke_cb); + + /* +- * The cpuidle_coupled_poked_mask mask is used to avoid calling ++ * The cpuidle_coupled_poke_pending mask is used to avoid calling + * __smp_call_function_single with the per cpu call_single_data struct already + * in use. This prevents a deadlock where two cpus are waiting for each others + * call_single_data struct to be available + */ +-static cpumask_t cpuidle_coupled_poked_mask; ++static cpumask_t cpuidle_coupled_poke_pending; ++ ++/* ++ * The cpuidle_coupled_poked mask is used to ensure that each cpu has been poked ++ * once to minimize entering the ready loop with a poke pending, which would ++ * require aborting and retrying. ++ */ ++static cpumask_t cpuidle_coupled_poked; + + /** + * cpuidle_coupled_parallel_barrier - synchronize all online coupled cpus +@@ -291,10 +299,11 @@ + return state; + } + +-static void cpuidle_coupled_poked(void *info) ++static void cpuidle_coupled_handle_poke(void *info) + { + int cpu = (unsigned long)info; +- cpumask_clear_cpu(cpu, &cpuidle_coupled_poked_mask); ++ cpumask_set_cpu(cpu, &cpuidle_coupled_poked); ++ cpumask_clear_cpu(cpu, &cpuidle_coupled_poke_pending); + } + + /** +@@ -313,7 +322,7 @@ + { + struct call_single_data *csd = &per_cpu(cpuidle_coupled_poke_cb, cpu); + +- if (!cpumask_test_and_set_cpu(cpu, &cpuidle_coupled_poked_mask)) ++ if (!cpumask_test_and_set_cpu(cpu, &cpuidle_coupled_poke_pending)) + __smp_call_function_single(cpu, csd, 0); + } + +@@ -340,30 +349,19 @@ + * @coupled: the struct coupled that contains the current cpu + * @next_state: the index in drv->states of the requested state for this cpu + * +- * Updates the requested idle state for the specified cpuidle device, +- * poking all coupled cpus out of idle if necessary to let them see the new +- * state. ++ * Updates the requested idle state for the specified cpuidle device. ++ * Returns the number of waiting cpus. + */ +-static void cpuidle_coupled_set_waiting(int cpu, ++static int cpuidle_coupled_set_waiting(int cpu, + struct cpuidle_coupled *coupled, int next_state) + { +- int w; +- + coupled->requested_state[cpu] = next_state; + + /* +- * If this is the last cpu to enter the waiting state, poke +- * all the other cpus out of their waiting state so they can +- * enter a deeper state. This can race with one of the cpus +- * exiting the waiting state due to an interrupt and +- * decrementing waiting_count, see comment below. +- * + * The atomic_inc_return provides a write barrier to order the write + * to requested_state with the later write that increments ready_count. + */ +- w = atomic_inc_return(&coupled->ready_waiting_counts) & WAITING_MASK; +- if (w == coupled->online_count) +- cpuidle_coupled_poke_others(cpu, coupled); ++ return atomic_inc_return(&coupled->ready_waiting_counts) & WAITING_MASK; + } + + /** +@@ -418,13 +416,24 @@ + static int cpuidle_coupled_clear_pokes(int cpu) + { + local_irq_enable(); +- while (cpumask_test_cpu(cpu, &cpuidle_coupled_poked_mask)) ++ while (cpumask_test_cpu(cpu, &cpuidle_coupled_poke_pending)) + cpu_relax(); + local_irq_disable(); + + return need_resched() ? -EINTR : 0; + } + ++static bool cpuidle_coupled_any_pokes_pending(struct cpuidle_coupled *coupled) ++{ ++ cpumask_t cpus; ++ int ret; ++ ++ cpumask_and(&cpus, cpu_online_mask, &coupled->coupled_cpus); ++ ret = cpumask_and(&cpus, &cpuidle_coupled_poke_pending, &cpus); ++ ++ return ret; ++} ++ + /** + * cpuidle_enter_state_coupled - attempt to enter a state with coupled cpus + * @dev: struct cpuidle_device for the current cpu +@@ -449,6 +458,7 @@ + { + int entered_state = -1; + struct cpuidle_coupled *coupled = dev->coupled; ++ int w; + + if (!coupled) + return -EINVAL; +@@ -465,14 +475,33 @@ + /* Read barrier ensures online_count is read after prevent is cleared */ + smp_rmb(); + +- cpuidle_coupled_set_waiting(dev->cpu, coupled, next_state); ++reset: ++ cpumask_clear_cpu(dev->cpu, &cpuidle_coupled_poked); ++ ++ w = cpuidle_coupled_set_waiting(dev->cpu, coupled, next_state); ++ /* ++ * If this is the last cpu to enter the waiting state, poke ++ * all the other cpus out of their waiting state so they can ++ * enter a deeper state. This can race with one of the cpus ++ * exiting the waiting state due to an interrupt and ++ * decrementing waiting_count, see comment below. ++ */ ++ if (w == coupled->online_count) { ++ cpumask_set_cpu(dev->cpu, &cpuidle_coupled_poked); ++ cpuidle_coupled_poke_others(dev->cpu, coupled); ++ } + + retry: + /* + * Wait for all coupled cpus to be idle, using the deepest state +- * allowed for a single cpu. ++ * allowed for a single cpu. If this was not the poking cpu, wait ++ * for at least one poke before leaving to avoid a race where ++ * two cpus could arrive at the waiting loop at the same time, ++ * but the first of the two to arrive could skip the loop without ++ * processing the pokes from the last to arrive. + */ +- while (!cpuidle_coupled_cpus_waiting(coupled)) { ++ while (!cpuidle_coupled_cpus_waiting(coupled) || ++ !cpumask_test_cpu(dev->cpu, &cpuidle_coupled_poked)) { + if (cpuidle_coupled_clear_pokes(dev->cpu)) { + cpuidle_coupled_set_not_waiting(dev->cpu, coupled); + goto out; +@@ -493,6 +522,12 @@ + } + + /* ++ * Make sure final poke status for this cpu is visible before setting ++ * cpu as ready. ++ */ ++ smp_wmb(); ++ ++ /* + * All coupled cpus are probably idle. There is a small chance that + * one of the other cpus just became active. Increment the ready count, + * and spin until all coupled cpus have incremented the counter. Once a +@@ -511,6 +546,28 @@ + cpu_relax(); + } + ++ /* ++ * Make sure read of all cpus ready is done before reading pending pokes ++ */ ++ smp_rmb(); ++ ++ /* ++ * There is a small chance that a cpu left and reentered idle after this ++ * cpu saw that all cpus were waiting. The cpu that reentered idle will ++ * have sent this cpu a poke, which will still be pending after the ++ * ready loop. The pending interrupt may be lost by the interrupt ++ * controller when entering the deep idle state. It's not possible to ++ * clear a pending interrupt without turning interrupts on and handling ++ * it, and it's too late to turn on interrupts here, so reset the ++ * coupled idle state of all cpus and retry. ++ */ ++ if (cpuidle_coupled_any_pokes_pending(coupled)) { ++ cpuidle_coupled_set_done(dev->cpu, coupled); ++ /* Wait for all cpus to see the pending pokes */ ++ cpuidle_coupled_parallel_barrier(dev, &coupled->abort_barrier); ++ goto reset; ++ } ++ + /* all cpus have acked the coupled state */ + next_state = cpuidle_coupled_get_state(dev, coupled); + +@@ -596,7 +653,7 @@ + coupled->refcnt++; + + csd = &per_cpu(cpuidle_coupled_poke_cb, dev->cpu); +- csd->func = cpuidle_coupled_poked; ++ csd->func = cpuidle_coupled_handle_poke; + csd->info = (void *)(unsigned long)dev->cpu; + + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1055_61704f036693ca93a7d916899288eba9a98b006f.txt 2014-04-28 00:34:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.patch 2014-04-28 00:34:50.000000000 +0000 @@ -0,0 +1,96 @@ +commit 736899ab702dc85345217e124686b661a56ecb6a +Author: Colin Cross +Date: Fri Aug 23 12:45:12 2013 -0700 + + cpuidle: coupled: fix race condition between pokes and safe state + + commit 9e19b73c30a5fa42a53583a1f7817dd857126156 upstream. + + The coupled cpuidle waiting loop clears pending pokes before + entering the safe state. If a poke arrives just before the + pokes are cleared, but after the while loop condition checks, + the poke will be lost and the cpu will stay in the safe state + until another interrupt arrives. This may cause the cpu that + sent the poke to spin in the ready loop with interrupts off + until another cpu receives an interrupt, and if no other cpus + have interrupts routed to them it can spin forever. + + Change the return value of cpuidle_coupled_clear_pokes to + return if a poke was cleared, and move the need_resched() + checks into the callers. In the waiting loop, if + a poke was cleared restart the loop to repeat the while + condition checks. + + Reported-by: Neil Zhang + Signed-off-by: Colin Cross + Signed-off-by: Rafael J. Wysocki + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/cpuidle/coupled.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpuidle/coupled.c 2014-04-28 00:34:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpuidle/coupled.c 2014-04-28 00:34:50.000000000 +0000 +@@ -408,19 +408,22 @@ + * been processed and the poke bit has been cleared. + * + * Other interrupts may also be processed while interrupts are enabled, so +- * need_resched() must be tested after turning interrupts off again to make sure ++ * need_resched() must be tested after this function returns to make sure + * the interrupt didn't schedule work that should take the cpu out of idle. + * +- * Returns 0 if need_resched was false, -EINTR if need_resched was true. ++ * Returns 0 if no poke was pending, 1 if a poke was cleared. + */ + static int cpuidle_coupled_clear_pokes(int cpu) + { ++ if (!cpumask_test_cpu(cpu, &cpuidle_coupled_poke_pending)) ++ return 0; ++ + local_irq_enable(); + while (cpumask_test_cpu(cpu, &cpuidle_coupled_poke_pending)) + cpu_relax(); + local_irq_disable(); + +- return need_resched() ? -EINTR : 0; ++ return 1; + } + + static bool cpuidle_coupled_any_pokes_pending(struct cpuidle_coupled *coupled) +@@ -464,7 +467,8 @@ + return -EINVAL; + + while (coupled->prevent) { +- if (cpuidle_coupled_clear_pokes(dev->cpu)) { ++ cpuidle_coupled_clear_pokes(dev->cpu); ++ if (need_resched()) { + local_irq_enable(); + return entered_state; + } +@@ -502,7 +506,10 @@ + */ + while (!cpuidle_coupled_cpus_waiting(coupled) || + !cpumask_test_cpu(dev->cpu, &cpuidle_coupled_poked)) { +- if (cpuidle_coupled_clear_pokes(dev->cpu)) { ++ if (cpuidle_coupled_clear_pokes(dev->cpu)) ++ continue; ++ ++ if (need_resched()) { + cpuidle_coupled_set_not_waiting(dev->cpu, coupled); + goto out; + } +@@ -516,7 +523,8 @@ + dev->safe_state_index); + } + +- if (cpuidle_coupled_clear_pokes(dev->cpu)) { ++ cpuidle_coupled_clear_pokes(dev->cpu); ++ if (need_resched()) { + cpuidle_coupled_set_not_waiting(dev->cpu, coupled); + goto out; + } +Index: linux-3.10-3.10.11/dummy/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1056_736899ab702dc85345217e124686b661a56ecb6a.txt 2014-04-28 00:34:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.patch --- linux-3.10.11/debian/patches/rpi/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.patch 2014-04-28 00:34:52.000000000 +0000 @@ -0,0 +1,148 @@ +commit 0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822 +Author: Lorenzo Pieralisi +Date: Thu Apr 18 18:31:35 2013 +0100 + + ARM: dts: at91: cpus/cpu node dts updates + + commit e757a6ee3e6fc1583b12b156588e8583f798d35c upstream. + + This patch updates the in-kernel dts files according to the latest cpus + and cpu bindings updates for ARM. + + Signed-off-by: Lorenzo Pieralisi + Acked-by: Nicolas Ferre + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91rm9200.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91rm9200.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91rm9200.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -35,8 +35,12 @@ + ssc2 = &ssc2; + }; + cpus { +- cpu@0 { ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { + compatible = "arm,arm920t"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9260.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9260.dtsi 2014-04-28 00:34:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9260.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -32,8 +32,12 @@ + ssc0 = &ssc0; + }; + cpus { +- cpu@0 { +- compatible = "arm,arm926ejs"; ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { ++ compatible = "arm,arm926ej-s"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9263.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9263.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9263.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -29,8 +29,12 @@ + ssc1 = &ssc1; + }; + cpus { +- cpu@0 { +- compatible = "arm,arm926ejs"; ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { ++ compatible = "arm,arm926ej-s"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9g45.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9g45.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9g45.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -35,8 +35,12 @@ + ssc1 = &ssc1; + }; + cpus { +- cpu@0 { +- compatible = "arm,arm926ejs"; ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { ++ compatible = "arm,arm926ej-s"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9n12.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9n12.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9n12.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -31,8 +31,12 @@ + ssc0 = &ssc0; + }; + cpus { +- cpu@0 { +- compatible = "arm,arm926ejs"; ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { ++ compatible = "arm,arm926ej-s"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9x5.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/at91sam9x5.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/at91sam9x5.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -33,8 +33,12 @@ + ssc0 = &ssc0; + }; + cpus { +- cpu@0 { +- compatible = "arm,arm926ejs"; ++ #address-cells = <0>; ++ #size-cells = <0>; ++ ++ cpu { ++ compatible = "arm,arm926ej-s"; ++ device_type = "cpu"; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sama5d3.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sama5d3.dtsi 2014-04-27 23:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sama5d3.dtsi 2014-04-28 00:34:51.000000000 +0000 +@@ -36,7 +36,9 @@ + }; + cpus { + cpu@0 { ++ device_type = "cpu"; + compatible = "arm,cortex-a5"; ++ reg = <0x0>; + }; + }; + +Index: linux-3.10-3.10.11/dummy/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1057_0fc9593a11f12e1c8cbe28cecf7a0ef3b2797822.txt 2014-04-28 00:34:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.patch 2014-04-28 00:34:53.000000000 +0000 @@ -0,0 +1,49 @@ +commit ed58fb796257c770cd9f1de07b49ed9a054f93eb +Author: Lorenzo Pieralisi +Date: Thu Apr 18 18:41:57 2013 +0100 + + ARM: dts: sunxi: cpus/cpu nodes dts updates + + commit 14c44aa541744d4cf06db89c27a1e6df293c64d5 upstream. + + This patch updates the in-kernel dts files according to the latest cpus + and cpu bindings updates for ARM. + + Signed-off-by: Lorenzo Pieralisi + Acked-by: Maxime Ripard + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:33:47.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:34:52.000000000 +0000 +@@ -17,7 +17,9 @@ + + cpus { + cpu@0 { ++ device_type = "cpu"; + compatible = "arm,cortex-a8"; ++ reg = <0x0>; + }; + }; + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun5i-a13.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun5i-a13.dtsi 2014-04-27 23:40:10.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun5i-a13.dtsi 2014-04-28 00:34:52.000000000 +0000 +@@ -18,7 +18,9 @@ + + cpus { + cpu@0 { ++ device_type = "cpu"; + compatible = "arm,cortex-a8"; ++ reg = <0x0>; + }; + }; + +Index: linux-3.10-3.10.11/dummy/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1058_ed58fb796257c770cd9f1de07b49ed9a054f93eb.txt 2014-04-28 00:34:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.patch 2014-04-28 00:34:54.000000000 +0000 @@ -0,0 +1,65 @@ +commit 464de2dc1539e6355fad1342ad106f08f7642edd +Author: Arnd Bergmann +Date: Mon Jun 10 16:48:36 2013 +0200 + + ARM: dts: add missing cpu #address-cell values + + commit 8b2efa896cc618e055e90c9d9600e7c8388ae3b7 upstream. + + A recent series has added CPU numbers to a lot of dts files, + but unfortunately in a few cases the #address-cells + and #size-cells values are missing, which causes build warnings. + This adds the missing ones for sunxi and sama5 that I found + through build testing. + + Signed-off-by: Arnd Bergmann + Cc: Lorenzo Pieralisi + Cc: Maxime Ripard + Cc: Nicolas Ferre + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sama5d3.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sama5d3.dtsi 2014-04-28 00:34:51.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sama5d3.dtsi 2014-04-28 00:34:53.000000000 +0000 +@@ -35,6 +35,8 @@ + ssc1 = &ssc1; + }; + cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:34:52.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun4i-a10.dtsi 2014-04-28 00:34:53.000000000 +0000 +@@ -16,6 +16,8 @@ + interrupt-parent = <&intc>; + + cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; +Index: linux-3.10-3.10.11/arch/arm/boot/dts/sun5i-a13.dtsi +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/sun5i-a13.dtsi 2014-04-28 00:34:52.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/sun5i-a13.dtsi 2014-04-28 00:34:53.000000000 +0000 +@@ -17,6 +17,8 @@ + interrupt-parent = <&intc>; + + cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a8"; +Index: linux-3.10-3.10.11/dummy/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1059_464de2dc1539e6355fad1342ad106f08f7642edd.txt 2014-04-28 00:34:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.patch 2014-04-28 00:34:55.000000000 +0000 @@ -0,0 +1,150 @@ +commit 008fe511c11fa20d1060c9e2ddb9c829ac44e0a7 +Author: Christoffer Dall +Date: Mon Aug 5 18:08:41 2013 -0700 + + ARM: KVM: Fix 64-bit coprocessor handling + + commit 240e99cbd00aa541b572480e3ea7ecb0d480bc79 upstream. + + The PAR was exported as CRn == 7 and CRm == 0, but in fact the primary + coprocessor register number was determined by CRm for 64-bit coprocessor + registers as the user space API was modeled after the coprocessor + access instructions (see the ARM ARM rev. C - B3-1445). + + However, just changing the CRn to CRm breaks the sorting check when + booting the kernel, because the internal kernel logic always treats CRn + as the primary register number, and it makes the table sorting + impossible to understand for humans. + + Alternatively we could change the logic to always have CRn == CRm, but + that becomes unclear in the number of ways we do look up of a coprocessor + register. We could also have a separate 64-bit table but that feels + somewhat over-engineered. Instead, keep CRn the primary representation + of the primary coproc. register number in-kernel and always export the + primary number as CRm as per the existing user space ABI. + + Note: The TTBR registers just magically worked because they happened to + follow the CRn(0) regs and were considered CRn(0) in the in-kernel + representation. + + Signed-off-by: Christoffer Dall + Signed-off-by: Kim Phillips + Cc: Gleb Natapov + Cc: Paolo Bonzini + Cc: Russell King + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/kvm/coproc.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kvm/coproc.c 2014-04-27 23:40:10.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kvm/coproc.c 2014-04-28 00:34:54.000000000 +0000 +@@ -146,7 +146,11 @@ + #define access_pmintenclr pm_fake + + /* Architected CP15 registers. +- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 ++ * CRn denotes the primary register number, but is copied to the CRm in the ++ * user space API for 64-bit register access in line with the terminology used ++ * in the ARM ARM. ++ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit ++ * registers preceding 32-bit ones. + */ + static const struct coproc_reg cp15_regs[] = { + /* CSSELR: swapped by interrupt.S. */ +@@ -154,8 +158,8 @@ + NULL, reset_unknown, c0_CSSELR }, + + /* TTBR0/TTBR1: swapped by interrupt.S. */ +- { CRm( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 }, +- { CRm( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 }, ++ { CRm64( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 }, ++ { CRm64( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 }, + + /* TTBCR: swapped by interrupt.S. */ + { CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32, +@@ -182,7 +186,7 @@ + NULL, reset_unknown, c6_IFAR }, + + /* PAR swapped by interrupt.S */ +- { CRn( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR }, ++ { CRm64( 7), Op1( 0), is64, NULL, reset_unknown64, c7_PAR }, + + /* + * DC{C,I,CI}SW operations: +@@ -399,12 +403,13 @@ + | KVM_REG_ARM_OPC1_MASK)) + return false; + params->is_64bit = true; +- params->CRm = ((id & KVM_REG_ARM_CRM_MASK) ++ /* CRm to CRn: see cp15_to_index for details */ ++ params->CRn = ((id & KVM_REG_ARM_CRM_MASK) + >> KVM_REG_ARM_CRM_SHIFT); + params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK) + >> KVM_REG_ARM_OPC1_SHIFT); + params->Op2 = 0; +- params->CRn = 0; ++ params->CRm = 0; + return true; + default: + return false; +@@ -898,7 +903,14 @@ + if (reg->is_64) { + val |= KVM_REG_SIZE_U64; + val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT); +- val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT); ++ /* ++ * CRn always denotes the primary coproc. reg. nr. for the ++ * in-kernel representation, but the user space API uses the ++ * CRm for the encoding, because it is modelled after the ++ * MRRC/MCRR instructions: see the ARM ARM rev. c page ++ * B3-1445 ++ */ ++ val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT); + } else { + val |= KVM_REG_SIZE_U32; + val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT); +Index: linux-3.10-3.10.11/arch/arm/kvm/coproc.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kvm/coproc.h 2014-04-27 23:40:10.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kvm/coproc.h 2014-04-28 00:34:54.000000000 +0000 +@@ -135,6 +135,8 @@ + return -1; + if (i1->CRn != i2->CRn) + return i1->CRn - i2->CRn; ++ if (i1->is_64 != i2->is_64) ++ return i2->is_64 - i1->is_64; + if (i1->CRm != i2->CRm) + return i1->CRm - i2->CRm; + if (i1->Op1 != i2->Op1) +@@ -145,6 +147,7 @@ + + #define CRn(_x) .CRn = _x + #define CRm(_x) .CRm = _x ++#define CRm64(_x) .CRn = _x, .CRm = 0 + #define Op1(_x) .Op1 = _x + #define Op2(_x) .Op2 = _x + #define is64 .is_64 = true +Index: linux-3.10-3.10.11/arch/arm/kvm/coproc_a15.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kvm/coproc_a15.c 2014-04-27 23:40:10.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kvm/coproc_a15.c 2014-04-28 00:34:54.000000000 +0000 +@@ -114,7 +114,11 @@ + + /* + * A15-specific CP15 registers. +- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 ++ * CRn denotes the primary register number, but is copied to the CRm in the ++ * user space API for 64-bit register access in line with the terminology used ++ * in the ARM ARM. ++ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit ++ * registers preceding 32-bit ones. + */ + static const struct coproc_reg a15_regs[] = { + /* MPIDR: we use VMPIDR for guest access. */ +Index: linux-3.10-3.10.11/dummy/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1060_008fe511c11fa20d1060c9e2ddb9c829ac44e0a7.txt 2014-04-28 00:34:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.patch --- linux-3.10.11/debian/patches/rpi/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.patch 2014-04-28 00:34:55.000000000 +0000 @@ -0,0 +1,39 @@ +commit 1f96d83b38937294584ede9473c2b2961528f287 +Author: Will Deacon +Date: Tue Aug 20 11:47:41 2013 +0100 + + arm64: perf: fix group validation when using enable_on_exec + + commit 8455e6ec70f33b0e8c3ffd47067e00481f09f454 upstream. + + This is a port of cb2d8b342aa0 ("ARM: 7698/1: perf: fix group validation + when using enable_on_exec") to arm64, which fixes the event validation + checking so that events in the OFF state are still considered when + enable_on_exec is true. + + Signed-off-by: Will Deacon + Signed-off-by: Catalin Marinas + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm64/kernel/perf_event.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm64/kernel/perf_event.c 2014-04-27 23:40:09.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm64/kernel/perf_event.c 2014-04-28 00:34:55.000000000 +0000 +@@ -325,7 +325,10 @@ + if (is_software_event(event)) + return 1; + +- if (event->pmu != leader_pmu || event->state <= PERF_EVENT_STATE_OFF) ++ if (event->pmu != leader_pmu || event->state < PERF_EVENT_STATE_OFF) ++ return 1; ++ ++ if (event->state == PERF_EVENT_STATE_OFF && !event->attr.enable_on_exec) + return 1; + + return armpmu->get_event_idx(hw_events, &fake_event) >= 0; +Index: linux-3.10-3.10.11/dummy/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1061_1f96d83b38937294584ede9473c2b2961528f287.txt 2014-04-28 00:34:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.patch 2014-04-28 00:34:56.000000000 +0000 @@ -0,0 +1,35 @@ +commit 0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c +Author: Will Deacon +Date: Tue Aug 20 11:47:42 2013 +0100 + + arm64: perf: fix ARMv8 EVTYPE_MASK to include NSH bit + + commit 178cd9ce377232518ec17ff2ecab2e80fa60784c upstream. + + This is a port of f2fe09b055e2 ("ARM: 7663/1: perf: fix ARMv7 EVTYPE_MASK + to include NSH bit") to arm64, which fixes the broken evtype mask to + include the NSH bit, allowing profiling at EL2. + + Signed-off-by: Will Deacon + Signed-off-by: Catalin Marinas + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm64/kernel/perf_event.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm64/kernel/perf_event.c 2014-04-28 00:34:55.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm64/kernel/perf_event.c 2014-04-28 00:34:56.000000000 +0000 +@@ -784,7 +784,7 @@ + /* + * PMXEVTYPER: Event selection reg + */ +-#define ARMV8_EVTYPE_MASK 0xc00000ff /* Mask for writable bits */ ++#define ARMV8_EVTYPE_MASK 0xc80000ff /* Mask for writable bits */ + #define ARMV8_EVTYPE_EVENT 0xff /* Mask for EVENT bits */ + + /* +Index: linux-3.10-3.10.11/dummy/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1062_0fe9a0dc92a64c088e76fcd3d35b2ba36b4d7f3c.txt 2014-04-28 00:34:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.patch 2014-04-28 00:34:57.000000000 +0000 @@ -0,0 +1,104 @@ +commit 3e4d5c23583779763a3393ba1bcc2ad4ba481fa2 +Author: Peter Maydell +Date: Thu Aug 22 17:47:48 2013 +0100 + + ARM: PCI: versatile: Fix map_irq function to match hardware + + commit f9b71fef12f0d6ac5c7051cfd87f7700f78c56b6 upstream. + + The PCI controller code for the Versatile board has never had the + correct IRQ mapping for hardware. For many years it had an odd + mapping ("all interrupts are int 27") which aligned with the + equivalent bug in QEMU. However as of commit 1bc39ac5dab265 + the mapping changed and no longer matched either hardware or QEMU, + with the result that any PCI card beyond the first in QEMU would + not have functioning interrupts; for example a boot with a SCSI + controller would time out as follows: + + ------------ + sym0: <895a> rev 0x0 at pci 0000:00:0d.0 irq 92 + sym0: SCSI BUS has been reset. + scsi0 : sym-2.2.3 + [...] + scsi 0:0:0:0: ABORT operation started + scsi 0:0:0:0: ABORT operation timed-out. + scsi 0:0:0:0: DEVICE RESET operation started + scsi 0:0:0:0: DEVICE RESET operation timed-out. + scsi 0:0:0:0: BUS RESET operation started + scsi 0:0:0:0: BUS RESET operation timed-out. + scsi 0:0:0:0: HOST RESET operation started + sym0: SCSI BUS has been reset + ------------ + + Fix the mapping so that it matches real hardware (checked against the + schematics for PB926 and backplane, and tested against the hardware). + This allows PCI cards using interrupts to work on hardware for the + first time; this change will also work with QEMU 1.5 or later, where + the equivalent bugs in the modelling of the hardware have been fixed. + + Although QEMU will attempt to autodetect whether the kernel is + expecting the long-standing "everything is int 27" mapping or the one + hardware has, for certainty we force it into "definitely behave like + hardware mode"; this will avoid unexpected surprises later if we + implement sparse irqs. This is harmless on hardware. + + Thanks to Paul Gortmaker for bisecting the problem and finding an initial + solution, to Russell King for providing the correct interrupt mapping, + and to Guenter Roeck for providing an initial version of this patch + and prodding me into relocating the hardware and retesting everything. + + Signed-off-by: Peter Maydell + Reviewed-by: Linus Walleij + Signed-off-by: Kevin Hilman + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-versatile/pci.c 2014-04-27 23:40:09.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c 2014-04-28 00:34:56.000000000 +0000 +@@ -295,6 +295,19 @@ + __raw_writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2); + + /* ++ * For many years the kernel and QEMU were symbiotically buggy ++ * in that they both assumed the same broken IRQ mapping. ++ * QEMU therefore attempts to auto-detect old broken kernels ++ * so that they still work on newer QEMU as they did on old ++ * QEMU. Since we now use the correct (ie matching-hardware) ++ * IRQ mapping we write a definitely different value to a ++ * PCI_INTERRUPT_LINE register to tell QEMU that we expect ++ * real hardware behaviour and it need not be backwards ++ * compatible for us. This write is harmless on real hardware. ++ */ ++ __raw_writel(0, VERSATILE_PCI_VIRT_BASE+PCI_INTERRUPT_LINE); ++ ++ /* + * Do not to map Versatile FPGA PCI device into memory space + */ + pci_slot_ignore |= (1 << myslot); +@@ -327,13 +340,13 @@ + { + int irq; + +- /* slot, pin, irq +- * 24 1 IRQ_SIC_PCI0 +- * 25 1 IRQ_SIC_PCI1 +- * 26 1 IRQ_SIC_PCI2 +- * 27 1 IRQ_SIC_PCI3 ++ /* ++ * Slot INTA INTB INTC INTD ++ * 31 PCI1 PCI2 PCI3 PCI0 ++ * 30 PCI0 PCI1 PCI2 PCI3 ++ * 29 PCI3 PCI0 PCI1 PCI2 + */ +- irq = IRQ_SIC_PCI0 + ((slot - 24 + pin - 1) & 3); ++ irq = IRQ_SIC_PCI0 + ((slot + 2 + pin - 1) & 3); + + return irq; + } +Index: linux-3.10-3.10.11/dummy/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1063_3e4d5c23583779763a3393ba1bcc2ad4ba481fa2.txt 2014-04-28 00:34:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.patch --- linux-3.10.11/debian/patches/rpi/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.patch 2014-04-28 00:34:58.000000000 +0000 @@ -0,0 +1,106 @@ +commit d6e770beb3489067fc68e0d468c99f0e44a42052 +Author: Peter Maydell +Date: Thu Aug 22 17:47:49 2013 +0100 + + ARM: PCI: versatile: Fix PCI I/O + + commit 829f9fedee30cde2ec15e88d57ec11074db791e2 upstream. + + The versatile PCI controller code was confused between the + PCI I/O window (at 0x43000000) and the first PCI memory + window (at 0x44000000). Pass the correct base address to + pci_remap_io() so that PCI I/O accesses work. + + Since the first PCI memory window isn't used at all (it's + an odd size), rename the associated variables and labels + so that it's clear that it isn't related to the I/O window. + + This has been tested and confirmed to fix PCI I/O accesses + both on physical PB926+PCI backplane hardware and on QEMU. + + Signed-off-by: Peter Maydell + Reviewed-by: Linus Walleij + Signed-off-by: Kevin Hilman + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/mach-versatile/include/mach/platform.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-versatile/include/mach/platform.h 2014-04-27 23:40:09.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-versatile/include/mach/platform.h 2014-04-28 00:34:57.000000000 +0000 +@@ -231,12 +231,14 @@ + /* PCI space */ + #define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ + #define VERSATILE_PCI_CFG_BASE 0x42000000 ++#define VERSATILE_PCI_IO_BASE 0x43000000 + #define VERSATILE_PCI_MEM_BASE0 0x44000000 + #define VERSATILE_PCI_MEM_BASE1 0x50000000 + #define VERSATILE_PCI_MEM_BASE2 0x60000000 + /* Sizes of above maps */ + #define VERSATILE_PCI_BASE_SIZE 0x01000000 + #define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000 ++#define VERSATILE_PCI_IO_BASE_SIZE 0x01000000 + #define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ + #define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ + #define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ +Index: linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-versatile/pci.c 2014-04-28 00:34:56.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c 2014-04-28 00:34:57.000000000 +0000 +@@ -170,8 +170,8 @@ + .write = versatile_write_config, + }; + +-static struct resource io_mem = { +- .name = "PCI I/O space", ++static struct resource unused_mem = { ++ .name = "PCI unused", + .start = VERSATILE_PCI_MEM_BASE0, + .end = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1, + .flags = IORESOURCE_MEM, +@@ -195,9 +195,9 @@ + { + int ret = 0; + +- ret = request_resource(&iomem_resource, &io_mem); ++ ret = request_resource(&iomem_resource, &unused_mem); + if (ret) { +- printk(KERN_ERR "PCI: unable to allocate I/O " ++ printk(KERN_ERR "PCI: unable to allocate unused " + "memory region (%d)\n", ret); + goto out; + } +@@ -205,7 +205,7 @@ + if (ret) { + printk(KERN_ERR "PCI: unable to allocate non-prefetchable " + "memory region (%d)\n", ret); +- goto release_io_mem; ++ goto release_unused_mem; + } + ret = request_resource(&iomem_resource, &pre_mem); + if (ret) { +@@ -225,8 +225,8 @@ + + release_non_mem: + release_resource(&non_mem); +- release_io_mem: +- release_resource(&io_mem); ++ release_unused_mem: ++ release_resource(&unused_mem); + out: + return ret; + } +@@ -246,7 +246,7 @@ + goto out; + } + +- ret = pci_ioremap_io(0, VERSATILE_PCI_MEM_BASE0); ++ ret = pci_ioremap_io(0, VERSATILE_PCI_IO_BASE); + if (ret) + goto out; + +Index: linux-3.10-3.10.11/dummy/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1064_d6e770beb3489067fc68e0d468c99f0e44a42052.txt 2014-04-28 00:34:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.patch --- linux-3.10.11/debian/patches/rpi/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.patch 2014-04-28 00:34:59.000000000 +0000 @@ -0,0 +1,43 @@ +commit d9a004a0a3bb56b62f36a460ec61c76112dd8442 +Author: Peter Maydell +Date: Thu Aug 22 17:47:50 2013 +0100 + + ARM: PCI: versatile: Fix SMAP register offsets + + commit 99f2b130370b904ca5300079243fdbcafa2c708b upstream. + + The SMAP register offsets in the versatile PCI controller code were + all off by four. (This didn't have any observable bad effects + because on this board PHYS_OFFSET is zero, and (a) writing zero to + the flags register at offset 0x10 has no effect and (b) the reset + value of the SMAP register is zero anyway, so failing to write SMAP2 + didn't matter.) + + Signed-off-by: Peter Maydell + Reviewed-by: Linus Walleij + Signed-off-by: Kevin Hilman + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-versatile/pci.c 2014-04-28 00:34:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-versatile/pci.c 2014-04-28 00:34:58.000000000 +0000 +@@ -43,9 +43,9 @@ + #define PCI_IMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x0) + #define PCI_IMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x4) + #define PCI_IMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x8) +-#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x10) +-#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14) +-#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18) ++#define PCI_SMAP0 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x14) ++#define PCI_SMAP1 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x18) ++#define PCI_SMAP2 __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0x1c) + #define PCI_SELFID __IO_ADDRESS(VERSATILE_PCI_CORE_BASE+0xc) + + #define DEVICE_ID_OFFSET 0x00 +Index: linux-3.10-3.10.11/dummy/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1065_d9a004a0a3bb56b62f36a460ec61c76112dd8442.txt 2014-04-28 00:34:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.patch 2014-04-28 00:34:59.000000000 +0000 @@ -0,0 +1,38 @@ +commit faa94b0365522a939cd10d05d526a355a7eeaadf +Author: Paul Mackerras +Date: Tue Aug 6 14:13:44 2013 +1000 + + KVM: PPC: Book3S: Fix compile error in XICS emulation + + commit 7bfa9ad55d691f2b836b576769b11eca2cf50816 upstream. + + Commit 8e44ddc3f3 ("powerpc/kvm/book3s: Add support for H_IPOLL and + H_XIRR_X in XICS emulation") added a call to get_tb() but didn't + include the header that defines it, and on some configs this means + book3s_xics.c fails to compile: + + arch/powerpc/kvm/book3s_xics.c: In function ‘kvmppc_xics_hcall’: + arch/powerpc/kvm/book3s_xics.c:812:3: error: implicit declaration of function ‘get_tb’ [-Werror=implicit-function-declaration] + + Signed-off-by: Paul Mackerras + Signed-off-by: Alexander Graf + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kvm/book3s_xics.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kvm/book3s_xics.c 2014-04-27 23:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kvm/book3s_xics.c 2014-04-28 00:34:59.000000000 +0000 +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include + #include +Index: linux-3.10-3.10.11/dummy/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1066_faa94b0365522a939cd10d05d526a355a7eeaadf.txt 2014-04-28 00:34:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.patch --- linux-3.10.11/debian/patches/rpi/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.patch 2014-04-28 00:35:00.000000000 +0000 @@ -0,0 +1,88 @@ +commit a6025b95e6d05833f19eaca2f4e181bf77a854ed +Author: Sarah Sharp +Date: Thu Aug 8 10:08:34 2013 -0700 + + xhci-plat: Don't enable legacy PCI interrupts. + + commit 52fb61250a7a132b0cfb9f4a1060a1f3c49e5a25 upstream. + + The xHCI platform driver calls into usb_add_hcd to register the irq for + its platform device. It does not want the xHCI generic driver to + register an interrupt for it at all. The original code did that by + setting the XHCI_BROKEN_MSI quirk, which tells the xHCI driver to not + enable MSI or MSI-X for a PCI host. + + Unfortunately, if CONFIG_PCI is enabled, and CONFIG_USB_DW3 is enabled, + the xHCI generic driver will attempt to register a legacy PCI interrupt + for the xHCI platform device in xhci_try_enable_msi(). This will result + in a bogus irq being registered, since the underlying device is a + platform_device, not a pci_device, and thus the pci_device->irq pointer + will be bogus. + + Add a new quirk, XHCI_PLAT, so that the xHCI generic driver can + distinguish between a PCI device that can't handle MSI or MSI-X, and a + platform device that should not have its interrupts touched at all. + This quirk may be useful in the future, in case other corner cases like + this arise. + + This patch should be backported to kernels as old as 3.9, that + contain the commit 00eed9c814cb8f281be6f0f5d8f45025dc0a97eb "USB: xhci: + correctly enable interrupts". + + Signed-off-by: Sarah Sharp + Reported-by: Yu Y Wang + Tested-by: Yu Y Wang + Reviewed-by: Felipe Balbi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-plat.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-plat.c 2014-04-27 23:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-plat.c 2014-04-28 00:35:00.000000000 +0000 +@@ -24,7 +24,7 @@ + * here that the generic code does not try to make a pci_dev from our + * dev struct in order to setup MSI + */ +- xhci->quirks |= XHCI_BROKEN_MSI; ++ xhci->quirks |= XHCI_PLAT; + } + + /* called during probe() after chip reset completes */ +Index: linux-3.10-3.10.11/drivers/usb/host/xhci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci.c 2014-04-27 23:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci.c 2014-04-28 00:35:00.000000000 +0000 +@@ -342,9 +342,14 @@ + static int xhci_try_enable_msi(struct usb_hcd *hcd) + { + struct xhci_hcd *xhci = hcd_to_xhci(hcd); +- struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); ++ struct pci_dev *pdev; + int ret; + ++ /* The xhci platform device has set up IRQs through usb_add_hcd. */ ++ if (xhci->quirks & XHCI_PLAT) ++ return 0; ++ ++ pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); + /* + * Some Fresco Logic host controllers advertise MSI, but fail to + * generate interrupts. Don't even try to enable MSI. +Index: linux-3.10-3.10.11/drivers/usb/host/xhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci.h 2014-04-27 23:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci.h 2014-04-28 00:35:00.000000000 +0000 +@@ -1516,6 +1516,7 @@ + #define XHCI_SPURIOUS_REBOOT (1 << 13) + #define XHCI_COMP_MODE_QUIRK (1 << 14) + #define XHCI_AVOID_BEI (1 << 15) ++#define XHCI_PLAT (1 << 16) + unsigned int num_active_eps; + unsigned int limit_active_eps; + /* There are two roothubs to keep track of bus suspend info for */ +Index: linux-3.10-3.10.11/dummy/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1067_a6025b95e6d05833f19eaca2f4e181bf77a854ed.txt 2014-04-28 00:35:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.patch --- linux-3.10.11/debian/patches/rpi/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.patch 2014-04-28 00:35:01.000000000 +0000 @@ -0,0 +1,82 @@ +commit 54d8c40da1d8763cfa5699516626f8ed37db3eed +Author: Shawn Nematbakhsh +Date: Mon Aug 19 10:36:13 2013 -0700 + + usb: xhci: Disable runtime PM suspend for quirky controllers + + commit c8476fb855434c733099079063990e5bfa7ecad6 upstream. + + If a USB controller with XHCI_RESET_ON_RESUME goes to runtime suspend, + a reset will be performed upon runtime resume. Any previously suspended + devices attached to the controller will be re-enumerated at this time. + This will cause problems, for example, if an open system call on the + device triggered the resume (the open call will fail). + + Note that this change is only relevant when persist_enabled is not set + for USB devices. + + This patch should be backported to kernels as old as 3.0, that + contain the commit c877b3b2ad5cb9d4fe523c5496185cc328ff3ae9 "xhci: Add + reset on resume quirk for asrock p67 host". + + Signed-off-by: Shawn Nematbakhsh + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/xhci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci.c 2014-04-28 00:35:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci.c 2014-04-28 00:35:01.000000000 +0000 +@@ -3511,10 +3511,21 @@ + { + struct xhci_hcd *xhci = hcd_to_xhci(hcd); + struct xhci_virt_device *virt_dev; ++ struct device *dev = hcd->self.controller; + unsigned long flags; + u32 state; + int i, ret; + ++#ifndef CONFIG_USB_DEFAULT_PERSIST ++ /* ++ * We called pm_runtime_get_noresume when the device was attached. ++ * Decrement the counter here to allow controller to runtime suspend ++ * if no devices remain. ++ */ ++ if (xhci->quirks & XHCI_RESET_ON_RESUME) ++ pm_runtime_put_noidle(dev); ++#endif ++ + ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__); + /* If the host is halted due to driver unload, we still need to free the + * device. +@@ -3586,6 +3597,7 @@ + int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev) + { + struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct device *dev = hcd->self.controller; + unsigned long flags; + int timeleft; + int ret; +@@ -3638,6 +3650,16 @@ + goto disable_slot; + } + udev->slot_id = xhci->slot_id; ++ ++#ifndef CONFIG_USB_DEFAULT_PERSIST ++ /* ++ * If resetting upon resume, we can't put the controller into runtime ++ * suspend if there is a device attached. ++ */ ++ if (xhci->quirks & XHCI_RESET_ON_RESUME) ++ pm_runtime_get_noresume(dev); ++#endif ++ + /* Is this a LS or FS device under a HS hub? */ + /* Hub or peripherial? */ + return 1; +Index: linux-3.10-3.10.11/dummy/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1068_54d8c40da1d8763cfa5699516626f8ed37db3eed.txt 2014-04-28 00:35:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.patch --- linux-3.10.11/debian/patches/rpi/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.patch 2014-04-28 00:35:02.000000000 +0000 @@ -0,0 +1,123 @@ +commit 734b2fe93f4bcce29f7d971a106ea94e263e8676 +Author: Felipe Balbi +Date: Thu Jun 27 10:00:18 2013 +0300 + + usb: dwc3: gadget: don't request IRQs in atomic + + commit b0d7ffd44ba9cd2dfbf299674418193a5f9ed21a upstream. + + We cannot request an IRQ with spinlocks held + as that would trigger a sleeping inside + spinlock warning. + + Reported-by: Stephen Boyd + Signed-off-by: Felipe Balbi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/dwc3/gadget.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/dwc3/gadget.c 2014-04-27 23:40:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/dwc3/gadget.c 2014-04-28 00:35:02.000000000 +0000 +@@ -1508,6 +1508,15 @@ + int irq; + u32 reg; + ++ irq = platform_get_irq(to_platform_device(dwc->dev), 0); ++ ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt, ++ IRQF_SHARED | IRQF_ONESHOT, "dwc3", dwc); ++ if (ret) { ++ dev_err(dwc->dev, "failed to request irq #%d --> %d\n", ++ irq, ret); ++ goto err0; ++ } ++ + spin_lock_irqsave(&dwc->lock, flags); + + if (dwc->gadget_driver) { +@@ -1515,7 +1524,7 @@ + dwc->gadget.name, + dwc->gadget_driver->driver.name); + ret = -EBUSY; +- goto err0; ++ goto err1; + } + + dwc->gadget_driver = driver; +@@ -1551,42 +1560,38 @@ + ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false); + if (ret) { + dev_err(dwc->dev, "failed to enable %s\n", dep->name); +- goto err0; ++ goto err2; + } + + dep = dwc->eps[1]; + ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL, false); + if (ret) { + dev_err(dwc->dev, "failed to enable %s\n", dep->name); +- goto err1; ++ goto err3; + } + + /* begin to receive SETUP packets */ + dwc->ep0state = EP0_SETUP_PHASE; + dwc3_ep0_out_start(dwc); + +- irq = platform_get_irq(to_platform_device(dwc->dev), 0); +- ret = request_threaded_irq(irq, dwc3_interrupt, dwc3_thread_interrupt, +- IRQF_SHARED | IRQF_ONESHOT, "dwc3", dwc); +- if (ret) { +- dev_err(dwc->dev, "failed to request irq #%d --> %d\n", +- irq, ret); +- goto err1; +- } +- + dwc3_gadget_enable_irq(dwc); + + spin_unlock_irqrestore(&dwc->lock, flags); + + return 0; + +-err1: ++err3: + __dwc3_gadget_ep_disable(dwc->eps[0]); + +-err0: ++err2: + dwc->gadget_driver = NULL; ++ ++err1: + spin_unlock_irqrestore(&dwc->lock, flags); + ++ free_irq(irq, dwc); ++ ++err0: + return ret; + } + +@@ -1600,9 +1605,6 @@ + spin_lock_irqsave(&dwc->lock, flags); + + dwc3_gadget_disable_irq(dwc); +- irq = platform_get_irq(to_platform_device(dwc->dev), 0); +- free_irq(irq, dwc); +- + __dwc3_gadget_ep_disable(dwc->eps[0]); + __dwc3_gadget_ep_disable(dwc->eps[1]); + +@@ -1610,6 +1612,9 @@ + + spin_unlock_irqrestore(&dwc->lock, flags); + ++ irq = platform_get_irq(to_platform_device(dwc->dev), 0); ++ free_irq(irq, dwc); ++ + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1069_734b2fe93f4bcce29f7d971a106ea94e263e8676.txt 2014-04-28 00:35:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.patch 2014-04-28 00:35:04.000000000 +0000 @@ -0,0 +1,51 @@ +commit d5cc290b92837eb9844579e297e969cc7a804da0 +Author: Oleg Nesterov +Date: Sun Sep 15 17:50:26 2013 +0200 + + tty: disassociate_ctty() sends the extra SIGCONT + + commit 03e1261778cca782d41a3d8e3945ca88cf93e01e upstream. + + Starting from v3.10 (probably commit f91e2590410b: "tty: Signal + foreground group processes in hangup") disassociate_ctty() sends SIGCONT + if tty && on_exit. This breaks LSB test-suite, in particular test8 in + _exit.c and test40 in sigcon5.c. + + Put the "!on_exit" check back to restore the old behaviour. + + Review by Peter Hurley: + "Yes, this regression was introduced by me in that commit. The effect + of the regression is that ptys will receive a SIGCONT when, in similar + circumstances, ttys would not. + + The fact that two test vectors accidentally tripped over this + regression suggests that some other apps may as well. + + Thanks for catching this" + + Signed-off-by: Oleg Nesterov + Reported-by: Karel Srot + Reviewed-by: Peter Hurley + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/tty_io.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/tty_io.c 2014-04-27 23:40:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/tty_io.c 2014-04-28 00:35:02.000000000 +0000 +@@ -850,7 +850,8 @@ + struct pid *tty_pgrp = tty_get_pgrp(tty); + if (tty_pgrp) { + kill_pgrp(tty_pgrp, SIGHUP, on_exit); +- kill_pgrp(tty_pgrp, SIGCONT, on_exit); ++ if (!on_exit) ++ kill_pgrp(tty_pgrp, SIGCONT, on_exit); + put_pid(tty_pgrp); + } + } +Index: linux-3.10-3.10.11/dummy/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1070_d5cc290b92837eb9844579e297e969cc7a804da0.txt 2014-04-28 00:35:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.patch 2014-04-28 00:35:05.000000000 +0000 @@ -0,0 +1,104 @@ +commit 9b8ace6745bf4722ff9c48089f5b0723478a849b +Author: Jeff Layton +Date: Thu Sep 5 08:38:10 2013 -0400 + + cifs: ensure that srv_mutex is held when dealing with ssocket pointer + + commit 73e216a8a42c0ef3d08071705c946c38fdbe12b0 upstream. + + Oleksii reported that he had seen an oops similar to this: + + BUG: unable to handle kernel NULL pointer dereference at 0000000000000088 + IP: [] sock_sendmsg+0x93/0xd0 + PGD 0 + Oops: 0000 [#1] PREEMPT SMP + Modules linked in: ipt_MASQUERADE xt_REDIRECT xt_tcpudp iptable_nat nf_conntrack_ipv4 nf_defrag_ipv4 nf_nat_ipv4 nf_nat nf_conntrack ip_tables x_tables carl9170 ath usb_storage f2fs nfnetlink_log nfnetlink md4 cifs dns_resolver hid_generic usbhid hid af_packet uvcvideo videobuf2_vmalloc videobuf2_memops videobuf2_core videodev rfcomm btusb bnep bluetooth qmi_wwan qcserial cdc_wdm usb_wwan usbnet usbserial mii snd_hda_codec_hdmi snd_hda_codec_realtek iwldvm mac80211 coretemp intel_powerclamp kvm_intel kvm iwlwifi snd_hda_intel cfg80211 snd_hda_codec xhci_hcd e1000e ehci_pci snd_hwdep sdhci_pci snd_pcm ehci_hcd microcode psmouse sdhci thinkpad_acpi mmc_core i2c_i801 pcspkr usbcore hwmon snd_timer snd_page_alloc snd ptp rfkill pps_core soundcore evdev usb_common vboxnetflt(O) vboxdrv(O)Oops#2 Part8 + loop tun binfmt_misc fuse msr acpi_call(O) ipv6 autofs4 + CPU: 0 PID: 21612 Comm: kworker/0:1 Tainted: G W O 3.10.1SIGN #28 + Hardware name: LENOVO 2306CTO/2306CTO, BIOS G2ET92WW (2.52 ) 02/22/2013 + Workqueue: cifsiod cifs_echo_request [cifs] + task: ffff8801e1f416f0 ti: ffff880148744000 task.ti: ffff880148744000 + RIP: 0010:[] [] sock_sendmsg+0x93/0xd0 + RSP: 0000:ffff880148745b00 EFLAGS: 00010246 + RAX: 0000000000000000 RBX: ffff880148745b78 RCX: 0000000000000048 + RDX: ffff880148745c90 RSI: ffff880181864a00 RDI: ffff880148745b78 + RBP: ffff880148745c48 R08: 0000000000000048 R09: 0000000000000000 + R10: 0000000000000000 R11: 0000000000000000 R12: ffff880181864a00 + R13: ffff880148745c90 R14: 0000000000000048 R15: 0000000000000048 + FS: 0000000000000000(0000) GS:ffff88021e200000(0000) knlGS:0000000000000000 + CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + CR2: 0000000000000088 CR3: 000000020c42c000 CR4: 00000000001407b0 + Oops#2 Part7 + DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 + Stack: + ffff880148745b30 ffffffff810c4af9 0000004848745b30 ffff880181864a00 + ffffffff81ffbc40 0000000000000000 ffff880148745c90 ffffffff810a5aab + ffff880148745bc0 ffffffff81ffbc40 ffff880148745b60 ffffffff815a9fb8 + Call Trace: + [] ? finish_task_switch+0x49/0xe0 + [] ? lock_timer_base.isra.36+0x2b/0x50 + [] ? _raw_spin_unlock_irqrestore+0x18/0x40 + [] ? try_to_del_timer_sync+0x4f/0x70 + [] ? _raw_spin_unlock_bh+0x1f/0x30 + [] kernel_sendmsg+0x37/0x50 + [] smb_send_kvec+0xd0/0x1d0 [cifs] + [] smb_send_rqst+0x83/0x1f0 [cifs] + [] cifs_call_async+0xec/0x1b0 [cifs] + [] ? free_rsp_buf+0x40/0x40 [cifs] + Oops#2 Part6 + [] SMB2_echo+0x8e/0xb0 [cifs] + [] cifs_echo_request+0x79/0xa0 [cifs] + [] process_one_work+0x173/0x4a0 + [] worker_thread+0x121/0x3a0 + [] ? manage_workers.isra.27+0x2b0/0x2b0 + [] kthread+0xc0/0xd0 + [] ? kthread_create_on_node+0x120/0x120 + [] ret_from_fork+0x7c/0xb0 + [] ? kthread_create_on_node+0x120/0x120 + Code: 84 24 b8 00 00 00 4c 89 f1 4c 89 ea 4c 89 e6 48 89 df 4c 89 60 18 48 c7 40 28 00 00 00 00 4c 89 68 30 44 89 70 14 49 8b 44 24 28 90 88 00 00 00 3d ef fd ff ff 74 10 48 8d 65 e0 5b 41 5c 41 + RIP [] sock_sendmsg+0x93/0xd0 + RSP + CR2: 0000000000000088 + + The client was in the middle of trying to send a frame when the + server->ssocket pointer got zeroed out. In most places, that we access + that pointer, the srv_mutex is held. There's only one spot that I see + that the server->ssocket pointer gets set and the srv_mutex isn't held. + This patch corrects that. + + The upstream bug report was here: + + https://bugzilla.kernel.org/show_bug.cgi?id=60557 + + Reported-by: Oleksii Shevchuk + Signed-off-by: Jeff Layton + Signed-off-by: Steve French + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/cifs/connect.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/cifs/connect.c 2014-04-27 23:40:06.000000000 +0000 ++++ linux-3.10-3.10.11/fs/cifs/connect.c 2014-04-28 00:35:04.000000000 +0000 +@@ -377,6 +377,7 @@ + try_to_freeze(); + + /* we should try only the port we connected to before */ ++ mutex_lock(&server->srv_mutex); + rc = generic_ip_connect(server); + if (rc) { + cifs_dbg(FYI, "reconnect error %d\n", rc); +@@ -388,6 +389,7 @@ + server->tcpStatus = CifsNeedNegotiate; + spin_unlock(&GlobalMid_Lock); + } ++ mutex_unlock(&server->srv_mutex); + } while (server->tcpStatus == CifsNeedReconnect); + + return rc; +Index: linux-3.10-3.10.11/dummy/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1071_9b8ace6745bf4722ff9c48089f5b0723478a849b.txt 2014-04-28 00:35:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.patch --- linux-3.10.11/debian/patches/rpi/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.patch 2014-04-28 00:35:06.000000000 +0000 @@ -0,0 +1,34 @@ +commit af66f40c4cb1d31b3b403d5f9a8471261a0cc945 +Author: Pavel Shilovsky +Date: Thu Sep 5 15:04:04 2013 +0400 + + CIFS: Fix a memory leak when a lease break comes + + commit 1a05096de82f3cd672c76389f63964952678506f upstream. + + This happens when we receive a lease break from a server, then + find an appropriate lease key in opened files and schedule the + oplock_break slow work. lw pointer isn't freed in this case. + + Signed-off-by: Pavel Shilovsky + Signed-off-by: Steve French + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/cifs/smb2misc.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/cifs/smb2misc.c 2014-04-27 23:40:06.000000000 +0000 ++++ linux-3.10-3.10.11/fs/cifs/smb2misc.c 2014-04-28 00:35:05.000000000 +0000 +@@ -469,6 +469,7 @@ + + queue_work(cifsiod_wq, &cfile->oplock_break); + ++ kfree(lw); + spin_unlock(&cifs_file_list_lock); + spin_unlock(&cifs_tcp_ses_lock); + return true; +Index: linux-3.10-3.10.11/dummy/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1072_af66f40c4cb1d31b3b403d5f9a8471261a0cc945.txt 2014-04-28 00:35:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.patch --- linux-3.10.11/debian/patches/rpi/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.patch 2014-04-28 00:35:07.000000000 +0000 @@ -0,0 +1,208 @@ +commit b08d9b572074b3d0899349070bb61688ad6eb630 +Author: Pavel Shilovsky +Date: Thu Sep 5 15:00:07 2013 +0400 + + CIFS: Fix missing lease break + + commit 933d4b36576c951d0371bbfed05ec0135d516a6e upstream. + + If a server sends a lease break to a connection that doesn't have + opens with a lease key specified in the server response, we can't + find an open file to send an ack. Fix this by walking through + all connections we have. + + Signed-off-by: Pavel Shilovsky + Signed-off-by: Steve French + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/cifs/smb2misc.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/cifs/smb2misc.c 2014-04-28 00:35:05.000000000 +0000 ++++ linux-3.10-3.10.11/fs/cifs/smb2misc.c 2014-04-28 00:35:06.000000000 +0000 +@@ -413,19 +413,76 @@ + } + + static bool +-smb2_is_valid_lease_break(char *buffer, struct TCP_Server_Info *server) ++smb2_tcon_has_lease(struct cifs_tcon *tcon, struct smb2_lease_break *rsp, ++ struct smb2_lease_break_work *lw) ++{ ++ bool found; ++ __u8 lease_state; ++ struct list_head *tmp; ++ struct cifsFileInfo *cfile; ++ struct cifs_pending_open *open; ++ struct cifsInodeInfo *cinode; ++ int ack_req = le32_to_cpu(rsp->Flags & ++ SMB2_NOTIFY_BREAK_LEASE_FLAG_ACK_REQUIRED); ++ ++ lease_state = smb2_map_lease_to_oplock(rsp->NewLeaseState); ++ ++ list_for_each(tmp, &tcon->openFileList) { ++ cfile = list_entry(tmp, struct cifsFileInfo, tlist); ++ cinode = CIFS_I(cfile->dentry->d_inode); ++ ++ if (memcmp(cinode->lease_key, rsp->LeaseKey, ++ SMB2_LEASE_KEY_SIZE)) ++ continue; ++ ++ cifs_dbg(FYI, "found in the open list\n"); ++ cifs_dbg(FYI, "lease key match, lease break 0x%d\n", ++ le32_to_cpu(rsp->NewLeaseState)); ++ ++ smb2_set_oplock_level(cinode, lease_state); ++ ++ if (ack_req) ++ cfile->oplock_break_cancelled = false; ++ else ++ cfile->oplock_break_cancelled = true; ++ ++ queue_work(cifsiod_wq, &cfile->oplock_break); ++ kfree(lw); ++ return true; ++ } ++ ++ found = false; ++ list_for_each_entry(open, &tcon->pending_opens, olist) { ++ if (memcmp(open->lease_key, rsp->LeaseKey, ++ SMB2_LEASE_KEY_SIZE)) ++ continue; ++ ++ if (!found && ack_req) { ++ found = true; ++ memcpy(lw->lease_key, open->lease_key, ++ SMB2_LEASE_KEY_SIZE); ++ lw->tlink = cifs_get_tlink(open->tlink); ++ queue_work(cifsiod_wq, &lw->lease_break); ++ } ++ ++ cifs_dbg(FYI, "found in the pending open list\n"); ++ cifs_dbg(FYI, "lease key match, lease break 0x%d\n", ++ le32_to_cpu(rsp->NewLeaseState)); ++ ++ open->oplock = lease_state; ++ } ++ return found; ++} ++ ++static bool ++smb2_is_valid_lease_break(char *buffer) + { + struct smb2_lease_break *rsp = (struct smb2_lease_break *)buffer; + struct list_head *tmp, *tmp1, *tmp2; ++ struct TCP_Server_Info *server; + struct cifs_ses *ses; + struct cifs_tcon *tcon; +- struct cifsInodeInfo *cinode; +- struct cifsFileInfo *cfile; +- struct cifs_pending_open *open; + struct smb2_lease_break_work *lw; +- bool found; +- int ack_req = le32_to_cpu(rsp->Flags & +- SMB2_NOTIFY_BREAK_LEASE_FLAG_ACK_REQUIRED); + + lw = kmalloc(sizeof(struct smb2_lease_break_work), GFP_KERNEL); + if (!lw) +@@ -438,72 +495,26 @@ + + /* look up tcon based on tid & uid */ + spin_lock(&cifs_tcp_ses_lock); +- list_for_each(tmp, &server->smb_ses_list) { +- ses = list_entry(tmp, struct cifs_ses, smb_ses_list); ++ list_for_each(tmp, &cifs_tcp_ses_list) { ++ server = list_entry(tmp, struct TCP_Server_Info, tcp_ses_list); + +- spin_lock(&cifs_file_list_lock); +- list_for_each(tmp1, &ses->tcon_list) { +- tcon = list_entry(tmp1, struct cifs_tcon, tcon_list); +- +- cifs_stats_inc(&tcon->stats.cifs_stats.num_oplock_brks); +- list_for_each(tmp2, &tcon->openFileList) { +- cfile = list_entry(tmp2, struct cifsFileInfo, +- tlist); +- cinode = CIFS_I(cfile->dentry->d_inode); +- +- if (memcmp(cinode->lease_key, rsp->LeaseKey, +- SMB2_LEASE_KEY_SIZE)) +- continue; +- +- cifs_dbg(FYI, "found in the open list\n"); +- cifs_dbg(FYI, "lease key match, lease break 0x%d\n", +- le32_to_cpu(rsp->NewLeaseState)); +- +- smb2_set_oplock_level(cinode, +- smb2_map_lease_to_oplock(rsp->NewLeaseState)); +- +- if (ack_req) +- cfile->oplock_break_cancelled = false; +- else +- cfile->oplock_break_cancelled = true; +- +- queue_work(cifsiod_wq, &cfile->oplock_break); +- +- kfree(lw); +- spin_unlock(&cifs_file_list_lock); +- spin_unlock(&cifs_tcp_ses_lock); +- return true; +- } ++ list_for_each(tmp1, &server->smb_ses_list) { ++ ses = list_entry(tmp1, struct cifs_ses, smb_ses_list); + +- found = false; +- list_for_each_entry(open, &tcon->pending_opens, olist) { +- if (memcmp(open->lease_key, rsp->LeaseKey, +- SMB2_LEASE_KEY_SIZE)) +- continue; +- +- if (!found && ack_req) { +- found = true; +- memcpy(lw->lease_key, open->lease_key, +- SMB2_LEASE_KEY_SIZE); +- lw->tlink = cifs_get_tlink(open->tlink); +- queue_work(cifsiod_wq, +- &lw->lease_break); ++ spin_lock(&cifs_file_list_lock); ++ list_for_each(tmp2, &ses->tcon_list) { ++ tcon = list_entry(tmp2, struct cifs_tcon, ++ tcon_list); ++ cifs_stats_inc( ++ &tcon->stats.cifs_stats.num_oplock_brks); ++ if (smb2_tcon_has_lease(tcon, rsp, lw)) { ++ spin_unlock(&cifs_file_list_lock); ++ spin_unlock(&cifs_tcp_ses_lock); ++ return true; + } +- +- cifs_dbg(FYI, "found in the pending open list\n"); +- cifs_dbg(FYI, "lease key match, lease break 0x%d\n", +- le32_to_cpu(rsp->NewLeaseState)); +- +- open->oplock = +- smb2_map_lease_to_oplock(rsp->NewLeaseState); +- } +- if (found) { +- spin_unlock(&cifs_file_list_lock); +- spin_unlock(&cifs_tcp_ses_lock); +- return true; + } ++ spin_unlock(&cifs_file_list_lock); + } +- spin_unlock(&cifs_file_list_lock); + } + spin_unlock(&cifs_tcp_ses_lock); + kfree(lw); +@@ -529,7 +540,7 @@ + if (rsp->StructureSize != + smb2_rsp_struct_sizes[SMB2_OPLOCK_BREAK_HE]) { + if (le16_to_cpu(rsp->StructureSize) == 44) +- return smb2_is_valid_lease_break(buffer, server); ++ return smb2_is_valid_lease_break(buffer); + else + return false; + } +Index: linux-3.10-3.10.11/dummy/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1073_b08d9b572074b3d0899349070bb61688ad6eb630.txt 2014-04-28 00:35:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.patch --- linux-3.10.11/debian/patches/rpi/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.patch 2014-04-28 00:35:08.000000000 +0000 @@ -0,0 +1,37 @@ +commit ac78ae630c039e548e2b8d41b6036f240386d770 +Author: Alan Stern +Date: Mon Aug 26 15:01:40 2013 -0400 + + USB: OHCI: Allow runtime PM without system sleep + + commit 69820e01aa756b8d228143d997f71523c1e97984 upstream. + + Since ohci-hcd supports runtime PM, the .pm field in its pci_driver + structure should be protected by CONFIG_PM rather than + CONFIG_PM_SLEEP. + + Without this change, OHCI controllers won't do runtime suspend if + system suspend or hibernation isn't enabled. + + Signed-off-by: Alan Stern + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/ohci-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ohci-pci.c 2014-04-27 23:40:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ohci-pci.c 2014-04-28 00:35:07.000000000 +0000 +@@ -371,7 +371,7 @@ + .remove = usb_hcd_pci_remove, + .shutdown = usb_hcd_pci_shutdown, + +-#ifdef CONFIG_PM_SLEEP ++#ifdef CONFIG_PM + .driver = { + .pm = &usb_hcd_pci_pm_ops + }, +Index: linux-3.10-3.10.11/dummy/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1074_ac78ae630c039e548e2b8d41b6036f240386d770.txt 2014-04-28 00:35:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.patch 2014-04-28 00:35:08.000000000 +0000 @@ -0,0 +1,37 @@ +commit 979ad974d2d7d1e98e21b582a11acdf0713914e6 +Author: Andy Lutomirski +Date: Thu Aug 22 11:39:15 2013 -0700 + + net: Check the correct namespace when spoofing pid over SCM_RIGHTS + + commit d661684cf6820331feae71146c35da83d794467e upstream. + + This is a security bug. + + The follow-up will fix nsproxy to discourage this type of issue from + happening again. + + Signed-off-by: Andy Lutomirski + Reviewed-by: "Eric W. Biederman" + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/scm.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/scm.c 2014-04-27 23:40:05.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/scm.c 2014-04-28 00:35:08.000000000 +0000 +@@ -54,7 +54,7 @@ + return -EINVAL; + + if ((creds->pid == task_tgid_vnr(current) || +- ns_capable(current->nsproxy->pid_ns->user_ns, CAP_SYS_ADMIN)) && ++ ns_capable(task_active_pid_ns(current)->user_ns, CAP_SYS_ADMIN)) && + ((uid_eq(uid, cred->uid) || uid_eq(uid, cred->euid) || + uid_eq(uid, cred->suid)) || nsown_capable(CAP_SETUID)) && + ((gid_eq(gid, cred->gid) || gid_eq(gid, cred->egid) || +Index: linux-3.10-3.10.11/dummy/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1075_979ad974d2d7d1e98e21b582a11acdf0713914e6.txt 2014-04-28 00:35:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.patch --- linux-3.10.11/debian/patches/rpi/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.patch 2014-04-28 00:35:09.000000000 +0000 @@ -0,0 +1,38 @@ +commit 6b844e7d601f709942cf15e5f5808953f5382402 +Author: Dan Carpenter +Date: Tue Aug 20 11:57:35 2013 +0300 + + staging: comedi: dt282x: dt282x_ai_insn_read() always fails + + commit 2c4283ca7cdcc6605859c836fc536fcd83a4525f upstream. + + In dt282x_ai_insn_read() we call this macro like: + wait_for(!mux_busy(), comedi_error(dev, "timeout\n"); return -ETIME;); + Because the if statement doesn't have curly braces it means we always + return -ETIME and the function never succeeds. + + Signed-off-by: Dan Carpenter + Acked-by: Ian Abbott + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/comedi/drivers/dt282x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/comedi/drivers/dt282x.c 2014-04-27 23:40:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/comedi/drivers/dt282x.c 2014-04-28 00:35:09.000000000 +0000 +@@ -269,8 +269,9 @@ + } \ + udelay(5); \ + } \ +- if (_i) \ ++ if (_i) { \ + b \ ++ } \ + } while (0) + + static int prep_ai_dma(struct comedi_device *dev, int chan, int size); +Index: linux-3.10-3.10.11/dummy/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1076_6b844e7d601f709942cf15e5f5808953f5382402.txt 2014-04-28 00:35:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.patch --- linux-3.10.11/debian/patches/rpi/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.patch 2014-04-28 00:35:10.000000000 +0000 @@ -0,0 +1,65 @@ +commit abea758371f89b0cdb5f0b2dad24674e0148f2ee +Author: Marek Vasut +Date: Sat Jun 29 22:20:00 2013 +0100 + + iio: mxs-lradc: Fix misuse of iio->trig + + commit e1b1fa66a0398f0b52ae79a2bdc7de87c205d074 upstream. + + The struct iio_dev .trig field is to be used only by the IIO core, + the driver shall not fill this field. This fixes ugly crash when + the driver is compiled as a module and the module is rmmod'd. + + Signed-off-by: Marek Vasut + Cc: Fabio Estevam + Cc: Jonathan Cameron + Cc: Shawn Guo + Signed-off-by: Jonathan Cameron + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/iio/adc/mxs-lradc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/iio/adc/mxs-lradc.c 2014-04-27 23:40:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/iio/adc/mxs-lradc.c 2014-04-28 00:35:09.000000000 +0000 +@@ -661,12 +661,13 @@ + { + int ret; + struct iio_trigger *trig; ++ struct mxs_lradc *lradc = iio_priv(iio); + + trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id); + if (trig == NULL) + return -ENOMEM; + +- trig->dev.parent = iio->dev.parent; ++ trig->dev.parent = lradc->dev; + iio_trigger_set_drvdata(trig, iio); + trig->ops = &mxs_lradc_trigger_ops; + +@@ -676,15 +677,17 @@ + return ret; + } + +- iio->trig = trig; ++ lradc->trig = trig; + + return 0; + } + + static void mxs_lradc_trigger_remove(struct iio_dev *iio) + { +- iio_trigger_unregister(iio->trig); +- iio_trigger_free(iio->trig); ++ struct mxs_lradc *lradc = iio_priv(iio); ++ ++ iio_trigger_unregister(lradc->trig); ++ iio_trigger_free(lradc->trig); + } + + static int mxs_lradc_buffer_preenable(struct iio_dev *iio) +Index: linux-3.10-3.10.11/dummy/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1077_abea758371f89b0cdb5f0b2dad24674e0148f2ee.txt 2014-04-28 00:35:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.patch --- linux-3.10.11/debian/patches/rpi/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.patch 2014-04-28 00:35:11.000000000 +0000 @@ -0,0 +1,52 @@ +commit f7e0ca347bcb540e2894833eccc33f9a65f4c822 +Author: Marek Vasut +Date: Wed Jul 3 22:25:00 2013 +0100 + + iio: mxs-lradc: Remove useless check in read_raw + + commit 2a961d0995cdadbfba565b28beada59c5ae7ebae upstream. + + The removed check in the read_raw implementation was always true, + therefore remove it. This also fixes a bug, by closely inspecting + the code, one can notice the iio_validate_scan_mask_onehot() will + always return 1 and therefore the subsequent condition will always + succeed, therefore making the mxs_lradc_read_raw() function always + return -EINVAL; . + + Signed-off-by: Marek Vasut + Tested-by: Otavio Salvador + Acked-by: Hector Palacios + Signed-off-by: Jonathan Cameron + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/iio/adc/mxs-lradc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/iio/adc/mxs-lradc.c 2014-04-28 00:35:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/iio/adc/mxs-lradc.c 2014-04-28 00:35:10.000000000 +0000 +@@ -234,7 +234,6 @@ + { + struct mxs_lradc *lradc = iio_priv(iio_dev); + int ret; +- unsigned long mask; + + if (m != IIO_CHAN_INFO_RAW) + return -EINVAL; +@@ -243,12 +242,6 @@ + if (chan->channel > LRADC_MAX_TOTAL_CHANS) + return -EINVAL; + +- /* Validate the channel if it doesn't intersect with reserved chans. */ +- bitmap_set(&mask, chan->channel, 1); +- ret = iio_validate_scan_mask_onehot(iio_dev, &mask); +- if (ret) +- return -EINVAL; +- + /* + * See if there is no buffered operation in progess. If there is, simply + * bail out. This can be improved to support both buffered and raw IO at +Index: linux-3.10-3.10.11/dummy/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1078_f7e0ca347bcb540e2894833eccc33f9a65f4c822.txt 2014-04-28 00:35:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.patch --- linux-3.10.11/debian/patches/rpi/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.patch 2014-04-28 00:35:12.000000000 +0000 @@ -0,0 +1,50 @@ +commit 3fa0d2f124263d0080f266c4c7bfc60153f29b91 +Author: Mika Westerberg +Date: Mon Sep 2 13:30:25 2013 +0300 + + ACPI / LPSS: don't crash if a device has no MMIO resources + + commit af65cfe9aeae03e0682bebdf4db94582d75562dd upstream. + + Intel LPSS devices that are enumerated from ACPI have both MMIO and IRQ + resources returned in their _CRS method. However, Apple Macbook Air with + Haswell has LPSS devices enumerated from PCI bus instead and _CRS method + returns only an interrupt number (but the device has _HID set that causes + the scan handler to match it). + + The current ACPI / LPSS code sets pdata->dev_desc only when MMIO resource + is found for the device and in case of Macbook Air it is never found. That + leads to a NULL pointer dereference in register_device_clock(). + + Correct this by always setting the pdata->dev_desc. + + Reported-and-tested-by: Imre Kaloz + Signed-off-by: Mika Westerberg + Signed-off-by: Rafael J. Wysocki + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/acpi/acpi_lpss.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/acpi/acpi_lpss.c 2014-04-27 23:40:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/acpi/acpi_lpss.c 2014-04-28 00:35:11.000000000 +0000 +@@ -155,12 +155,13 @@ + pdata->mmio_size = resource_size(&rentry->res); + pdata->mmio_base = ioremap(rentry->res.start, + pdata->mmio_size); +- pdata->dev_desc = dev_desc; + break; + } + + acpi_dev_free_resource_list(&resource_list); + ++ pdata->dev_desc = dev_desc; ++ + if (dev_desc->clk_required) { + ret = register_device_clock(adev, pdata); + if (ret) { +Index: linux-3.10-3.10.11/dummy/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1079_3fa0d2f124263d0080f266c4c7bfc60153f29b91.txt 2014-04-28 00:35:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1080_3765762187edd49446c94884aa88c952cec41116.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1080_3765762187edd49446c94884aa88c952cec41116.patch --- linux-3.10.11/debian/patches/rpi/rpi_1080_3765762187edd49446c94884aa88c952cec41116.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1080_3765762187edd49446c94884aa88c952cec41116.patch 2014-04-28 00:35:12.000000000 +0000 @@ -0,0 +1,34 @@ +commit 3765762187edd49446c94884aa88c952cec41116 +Author: Dan Carpenter +Date: Fri Aug 16 10:16:59 2013 +0300 + + USB: mos7720: use GFP_ATOMIC under spinlock + + commit d0bd9a41186e076ea543c397ad8a67a6cf604b55 upstream. + + The write_parport_reg_nonblock() function shouldn't sleep because it's + called with spinlocks held. + + Signed-off-by: Dan Carpenter + Acked-by: Johan Hovold + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/mos7720.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/mos7720.c 2014-04-27 23:40:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/mos7720.c 2014-04-28 00:35:12.000000000 +0000 +@@ -374,7 +374,7 @@ + kfree(urbtrack); + return -ENOMEM; + } +- urbtrack->setup = kmalloc(sizeof(*urbtrack->setup), GFP_KERNEL); ++ urbtrack->setup = kmalloc(sizeof(*urbtrack->setup), GFP_ATOMIC); + if (!urbtrack->setup) { + usb_free_urb(urbtrack->urb); + kfree(urbtrack); +Index: linux-3.10-3.10.11/dummy/rpi_1080_3765762187edd49446c94884aa88c952cec41116.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1080_3765762187edd49446c94884aa88c952cec41116.txt 2014-04-28 00:35:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.patch 2014-04-28 00:35:13.000000000 +0000 @@ -0,0 +1,36 @@ +commit 7965eef853ccd9e30f1ee5d5df27a48b77a22a4b +Author: Johan Hovold +Date: Mon Aug 19 13:05:45 2013 +0200 + + USB: mos7720: fix big-endian control requests + + commit 3b716caf190ccc6f2a09387210e0e6a26c1d81a4 upstream. + + Fix endianess bugs in parallel-port code which caused corrupt + control-requests to be issued on big-endian machines. + + Reported-by: kbuild test robot + Signed-off-by: Johan Hovold + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/mos7720.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/mos7720.c 2014-04-28 00:35:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/mos7720.c 2014-04-28 00:35:13.000000000 +0000 +@@ -382,8 +382,8 @@ + } + urbtrack->setup->bRequestType = (__u8)0x40; + urbtrack->setup->bRequest = (__u8)0x0e; +- urbtrack->setup->wValue = get_reg_value(reg, dummy); +- urbtrack->setup->wIndex = get_reg_index(reg); ++ urbtrack->setup->wValue = cpu_to_le16(get_reg_value(reg, dummy)); ++ urbtrack->setup->wIndex = cpu_to_le16(get_reg_index(reg)); + urbtrack->setup->wLength = 0; + usb_fill_control_urb(urbtrack->urb, usbdev, + usb_sndctrlpipe(usbdev, 0), +Index: linux-3.10-3.10.11/dummy/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1081_7965eef853ccd9e30f1ee5d5df27a48b77a22a4b.txt 2014-04-28 00:35:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.patch 2014-04-28 00:35:14.000000000 +0000 @@ -0,0 +1,37 @@ +commit b096d2211a059f6b22f089e3907e061409dbb6c5 +Author: Daniel Mack +Date: Wed Aug 21 11:17:21 2013 +0200 + + usb: ehci-mxc: check for pdata before dereferencing + + commit f375fc520d4df0cd9fcb570f33c103c6c0311f9e upstream. + + Commit 7e8d5cd93fac ("USB: Add EHCI support for MX27 and MX31 based + boards") introduced code that could potentially lead to a NULL pointer + dereference on driver removal. + + Fix this by checking for the value of pdata before dereferencing it. + + Signed-off-by: Daniel Mack + Reported-by: Dan Carpenter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/ehci-mxc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ehci-mxc.c 2014-04-27 23:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ehci-mxc.c 2014-04-28 00:35:13.000000000 +0000 +@@ -184,7 +184,7 @@ + if (pdata && pdata->exit) + pdata->exit(pdev); + +- if (pdata->otg) ++ if (pdata && pdata->otg) + usb_phy_shutdown(pdata->otg); + + clk_disable_unprepare(priv->usbclk); +Index: linux-3.10-3.10.11/dummy/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1082_b096d2211a059f6b22f089e3907e061409dbb6c5.txt 2014-04-28 00:35:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.patch --- linux-3.10.11/debian/patches/rpi/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.patch 2014-04-28 00:35:15.000000000 +0000 @@ -0,0 +1,66 @@ +commit c552e84c9bfd1b7feb5cd51e970b8110a31c4b89 +Author: Oliver Neukum +Date: Tue Aug 6 14:22:59 2013 +0200 + + USB: cdc-wdm: fix race between interrupt handler and tasklet + + commit 6dd433e6cf2475ce8abec1b467720858c24450eb upstream. + + Both could want to submit the same URB. Some checks of the flag + intended to prevent that were missing. + + Signed-off-by: Oliver Neukum + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/class/cdc-wdm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/class/cdc-wdm.c 2014-04-27 23:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/class/cdc-wdm.c 2014-04-28 00:35:14.000000000 +0000 +@@ -209,6 +209,7 @@ + static void wdm_int_callback(struct urb *urb) + { + int rv = 0; ++ int responding; + int status = urb->status; + struct wdm_device *desc; + struct usb_cdc_notification *dr; +@@ -262,8 +263,8 @@ + + spin_lock(&desc->iuspin); + clear_bit(WDM_READ, &desc->flags); +- set_bit(WDM_RESPONDING, &desc->flags); +- if (!test_bit(WDM_DISCONNECTING, &desc->flags) ++ responding = test_and_set_bit(WDM_RESPONDING, &desc->flags); ++ if (!responding && !test_bit(WDM_DISCONNECTING, &desc->flags) + && !test_bit(WDM_SUSPENDING, &desc->flags)) { + rv = usb_submit_urb(desc->response, GFP_ATOMIC); + dev_dbg(&desc->intf->dev, "%s: usb_submit_urb %d", +@@ -685,16 +686,20 @@ + { + struct wdm_device *desc = container_of(work, struct wdm_device, rxwork); + unsigned long flags; +- int rv; ++ int rv = 0; ++ int responding; + + spin_lock_irqsave(&desc->iuspin, flags); + if (test_bit(WDM_DISCONNECTING, &desc->flags)) { + spin_unlock_irqrestore(&desc->iuspin, flags); + } else { ++ responding = test_and_set_bit(WDM_RESPONDING, &desc->flags); + spin_unlock_irqrestore(&desc->iuspin, flags); +- rv = usb_submit_urb(desc->response, GFP_KERNEL); ++ if (!responding) ++ rv = usb_submit_urb(desc->response, GFP_KERNEL); + if (rv < 0 && rv != -EPERM) { + spin_lock_irqsave(&desc->iuspin, flags); ++ clear_bit(WDM_RESPONDING, &desc->flags); + if (!test_bit(WDM_DISCONNECTING, &desc->flags)) + schedule_work(&desc->rxwork); + spin_unlock_irqrestore(&desc->iuspin, flags); +Index: linux-3.10-3.10.11/dummy/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1083_c552e84c9bfd1b7feb5cd51e970b8110a31c4b89.txt 2014-04-28 00:35:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.patch 2014-04-28 00:35:16.000000000 +0000 @@ -0,0 +1,45 @@ +commit ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c +Author: Laurent Pinchart +Date: Mon Apr 29 22:18:01 2013 +0200 + + usb: gadget: uvc: Fix error handling in uvc_queue_buffer() + + commit ebe864a6cb8e087ede047fa1fa6b6d06fcb9a9e4 upstream. + + The conversion to videobuf2 failed to check the return value of + vb2_qbuf(). Fix it. + + Reported-by: Michael Grzeschik + Signed-off-by: Laurent Pinchart + Tested-By: Michael Grzeschik + Signed-off-by: Felipe Balbi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/gadget/uvc_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/gadget/uvc_queue.c 2014-04-27 23:40:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/gadget/uvc_queue.c 2014-04-28 00:35:15.000000000 +0000 +@@ -177,12 +177,16 @@ + + mutex_lock(&queue->mutex); + ret = vb2_qbuf(&queue->queue, buf); ++ if (ret < 0) ++ goto done; ++ + spin_lock_irqsave(&queue->irqlock, flags); + ret = (queue->flags & UVC_QUEUE_PAUSED) != 0; + queue->flags &= ~UVC_QUEUE_PAUSED; + spin_unlock_irqrestore(&queue->irqlock, flags); +- mutex_unlock(&queue->mutex); + ++done: ++ mutex_unlock(&queue->mutex); + return ret; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1084_ec7329b595fa4ef248e1ef9bbb6b49cee416ac7c.txt 2014-04-28 00:35:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.patch --- linux-3.10.11/debian/patches/rpi/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.patch 2014-04-28 00:35:16.000000000 +0000 @@ -0,0 +1,77 @@ +commit ddcc49fb2db6457861dbb0b99844b2a5b53b5c88 +Author: Sarah Sharp +Date: Mon Aug 5 18:58:15 2013 -0700 + + usb: Don't fail port power resume on device disconnect. + + commit d49dad3e11638f66be4e16573ffaa8c46a09e3b3 upstream. + + Userspace can tell the kernel to power off any USB port, including ones + that are visible and connectible to users. When an attached USB device + goes into suspend, the port will be powered off if the + pm_qos_no_port_poweroff file for its port is set to 0, the device does + not have remote wakeup enabled, and the device is marked as persistent. + + If the user disconnects the USB device while the port is powered off, + the current code does not handle that properly. If you disconnect a + device, and then run `lsusb -v -s` for the device, the device disconnect + does not get handled by the USB core. The runtime resume of the port + fails, because hub_port_debounce_be_connected() returns -ETIMEDOUT. + + This means the port resume fails and khubd doesn't handle the USB device + disconnect. This leaves the device listed in lsusb, and the port's + runtime_status will be permanently marked as "error". + + Fix this by ignoring the return value of hub_port_debounce_be_connected. + Users can disconnect USB devices while the ports are powered off, and we + must be able to handle that. + + This patch should be backported to kernels as old as 3.9, that + contain the commit ad493e5e580546e6c3024b76a41535476da1546a "usb: add + usb port auto power off mechanism" + + Signed-off-by: Sarah Sharp + Cc: Lan Tianyu + Cc: Alan Stern + Cc: Rafael J. Wysocki + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/port.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/port.c 2014-04-27 23:40:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/port.c 2014-04-28 00:35:16.000000000 +0000 +@@ -89,22 +89,19 @@ + retval = usb_hub_set_port_power(hdev, port1, true); + if (port_dev->child && !retval) { + /* +- * Wait for usb hub port to be reconnected in order to make +- * the resume procedure successful. ++ * Attempt to wait for usb hub port to be reconnected in order ++ * to make the resume procedure successful. The device may have ++ * disconnected while the port was powered off, so ignore the ++ * return status. + */ + retval = hub_port_debounce_be_connected(hub, port1); +- if (retval < 0) { ++ if (retval < 0) + dev_dbg(&port_dev->dev, "can't get reconnection after setting port power on, status %d\n", + retval); +- goto out; +- } + usb_clear_port_feature(hdev, port1, USB_PORT_FEAT_C_ENABLE); +- +- /* Set return value to 0 if debounce successful */ + retval = 0; + } + +-out: + clear_bit(port1, hub->busy_bits); + usb_autopm_put_interface(intf); + return retval; +Index: linux-3.10-3.10.11/dummy/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1085_ddcc49fb2db6457861dbb0b99844b2a5b53b5c88.txt 2014-04-28 00:35:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.patch 2014-04-28 00:35:17.000000000 +0000 @@ -0,0 +1,41 @@ +commit 94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1 +Author: Alan Stern +Date: Fri Aug 30 10:46:00 2013 -0400 + + USB: fix build error when CONFIG_PM_SLEEP isn't enabled + + commit 9d8924297cd9c256c23c02abae40202563452453 upstream. + + This patch fixes a build error that occurs when CONFIG_PM is enabled + and CONFIG_PM_SLEEP isn't: + + >> drivers/usb/host/ohci-pci.c:294:10: error: 'usb_hcd_pci_pm_ops' undeclared here (not in a function) + .pm = &usb_hcd_pci_pm_ops + + Since the usb_hcd_pci_pm_ops structure is defined and used when + CONFIG_PM is enabled, its declaration should not be protected by + CONFIG_PM_SLEEP. + + Signed-off-by: Alan Stern + Reported-by: kbuild test robot + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/usb/hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/usb/hcd.h 2014-04-27 23:40:01.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/usb/hcd.h 2014-04-28 00:35:17.000000000 +0000 +@@ -410,7 +410,7 @@ + extern void usb_hcd_pci_remove(struct pci_dev *dev); + extern void usb_hcd_pci_shutdown(struct pci_dev *dev); + +-#ifdef CONFIG_PM_SLEEP ++#ifdef CONFIG_PM + extern const struct dev_pm_ops usb_hcd_pci_pm_ops; + #endif + #endif /* CONFIG_PCI */ +Index: linux-3.10-3.10.11/dummy/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1086_94cc662c4bd9f8487d54262bbfc2307d9b1fc6b1.txt 2014-04-28 00:35:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1087_ef7198be2830f7d6951512724203326746756a86.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1087_ef7198be2830f7d6951512724203326746756a86.patch --- linux-3.10.11/debian/patches/rpi/rpi_1087_ef7198be2830f7d6951512724203326746756a86.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1087_ef7198be2830f7d6951512724203326746756a86.patch 2014-04-28 00:35:18.000000000 +0000 @@ -0,0 +1,36 @@ +commit ef7198be2830f7d6951512724203326746756a86 +Author: Hans de Goede +Date: Sat Aug 3 16:37:48 2013 +0200 + + usb: config->desc.bLength may not exceed amount of data returned by the device + + commit b4f17a488ae2e09bfcf95c0e0b4219c246f1116a upstream. + + While reading the config parsing code I noticed this check is missing, without + this check config->desc.wTotalLength can end up with a value larger then the + dev->rawdescriptors length for the config, and when userspace then tries to + get the rawdescriptors bad things may happen. + + Signed-off-by: Hans de Goede + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/config.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/config.c 2014-04-27 23:40:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/config.c 2014-04-28 00:35:17.000000000 +0000 +@@ -424,7 +424,8 @@ + + memcpy(&config->desc, buffer, USB_DT_CONFIG_SIZE); + if (config->desc.bDescriptorType != USB_DT_CONFIG || +- config->desc.bLength < USB_DT_CONFIG_SIZE) { ++ config->desc.bLength < USB_DT_CONFIG_SIZE || ++ config->desc.bLength > size) { + dev_err(ddev, "invalid descriptor for config index %d: " + "type = 0x%X, length = %d\n", cfgidx, + config->desc.bDescriptorType, config->desc.bLength); +Index: linux-3.10-3.10.11/dummy/rpi_1087_ef7198be2830f7d6951512724203326746756a86.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1087_ef7198be2830f7d6951512724203326746756a86.txt 2014-04-28 00:35:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.patch --- linux-3.10.11/debian/patches/rpi/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.patch 2014-04-28 00:35:19.000000000 +0000 @@ -0,0 +1,153 @@ +commit b504b4a1e3484b4b40a25ff228432df55cb24758 +Author: Alan Stern +Date: Tue Jul 30 15:39:02 2013 -0400 + + USB: handle LPM errors during device suspend correctly + + commit aa5ceae24bf8dff1d6fe87c6c4b08e69c6d33550 upstream. + + The hub driver's usb_port_suspend() routine doesn't handle errors + related to Link Power Management properly. It always returns failure, + it doesn't try to clean up the wakeup setting, (in the case of system + sleep) it doesn't try to go ahead with the port suspend regardless, + and it doesn't try to apply the new power-off mechanism. + + This patch fixes these problems. + + Note: Sarah fixed this patch to apply against 3.11, since the original + commit (4fae6f0fa86f92e6bc7429371b1e177ad0aaac66 "USB: handle LPM errors + during device suspend correctly") called usb_disable_remote_wakeup, + which won't be added until 3.12. + + This patch should be backported to kernels as old as 3.5, that + contain the commit 8306095fd2c1100e8244c09bf560f97aca5a311d "USB: + Disable USB 3.0 LPM in critical sections.". There will be merge + conflicts, since LTM wasn't added until 3.6. + + Signed-off-by: Alan Stern + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/hub.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/hub.c 2014-04-27 23:40:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/hub.c 2014-04-28 00:35:18.000000000 +0000 +@@ -2916,7 +2916,6 @@ + { + struct usb_hub *hub = usb_hub_to_struct_hub(udev->parent); + struct usb_port *port_dev = hub->ports[udev->portnum - 1]; +- enum pm_qos_flags_status pm_qos_stat; + int port1 = udev->portnum; + int status; + bool really_suspend = true; +@@ -2954,7 +2953,7 @@ + status); + /* bail if autosuspend is requested */ + if (PMSG_IS_AUTO(msg)) +- return status; ++ goto err_wakeup; + } + } + +@@ -2963,14 +2962,16 @@ + usb_set_usb2_hardware_lpm(udev, 0); + + if (usb_disable_ltm(udev)) { +- dev_err(&udev->dev, "%s Failed to disable LTM before suspend\n.", +- __func__); +- return -ENOMEM; ++ dev_err(&udev->dev, "Failed to disable LTM before suspend\n."); ++ status = -ENOMEM; ++ if (PMSG_IS_AUTO(msg)) ++ goto err_ltm; + } + if (usb_unlocked_disable_lpm(udev)) { +- dev_err(&udev->dev, "%s Failed to disable LPM before suspend\n.", +- __func__); +- return -ENOMEM; ++ dev_err(&udev->dev, "Failed to disable LPM before suspend\n."); ++ status = -ENOMEM; ++ if (PMSG_IS_AUTO(msg)) ++ goto err_lpm3; + } + + /* see 7.1.7.6 */ +@@ -2998,28 +2999,31 @@ + if (status) { + dev_dbg(hub->intfdev, "can't suspend port %d, status %d\n", + port1, status); +- /* paranoia: "should not happen" */ +- if (udev->do_remote_wakeup) { +- if (!hub_is_superspeed(hub->hdev)) { +- (void) usb_control_msg(udev, +- usb_sndctrlpipe(udev, 0), +- USB_REQ_CLEAR_FEATURE, +- USB_RECIP_DEVICE, +- USB_DEVICE_REMOTE_WAKEUP, 0, +- NULL, 0, +- USB_CTRL_SET_TIMEOUT); +- } else +- (void) usb_disable_function_remotewakeup(udev); +- +- } + ++ /* Try to enable USB3 LPM and LTM again */ ++ usb_unlocked_enable_lpm(udev); ++ err_lpm3: ++ usb_enable_ltm(udev); ++ err_ltm: + /* Try to enable USB2 hardware LPM again */ + if (udev->usb2_hw_lpm_capable == 1) + usb_set_usb2_hardware_lpm(udev, 1); + +- /* Try to enable USB3 LTM and LPM again */ +- usb_enable_ltm(udev); +- usb_unlocked_enable_lpm(udev); ++ if (udev->do_remote_wakeup) { ++ if (udev->speed < USB_SPEED_SUPER) ++ usb_control_msg(udev, usb_sndctrlpipe(udev, 0), ++ USB_REQ_CLEAR_FEATURE, ++ USB_RECIP_DEVICE, ++ USB_DEVICE_REMOTE_WAKEUP, 0, ++ NULL, 0, USB_CTRL_SET_TIMEOUT); ++ else ++ usb_control_msg(udev, usb_sndctrlpipe(udev, 0), ++ USB_REQ_CLEAR_FEATURE, ++ USB_RECIP_INTERFACE, ++ USB_INTRF_FUNC_SUSPEND, 0, ++ NULL, 0, USB_CTRL_SET_TIMEOUT); ++ } ++ err_wakeup: + + /* System sleep transitions should never fail */ + if (!PMSG_IS_AUTO(msg)) +@@ -3041,14 +3045,15 @@ + * Check whether current status meets the requirement of + * usb port power off mechanism + */ +- pm_qos_stat = dev_pm_qos_flags(&port_dev->dev, +- PM_QOS_FLAG_NO_POWER_OFF); +- if (!udev->do_remote_wakeup +- && pm_qos_stat != PM_QOS_FLAGS_ALL +- && udev->persist_enabled +- && !status) { +- pm_runtime_put_sync(&port_dev->dev); +- port_dev->did_runtime_put = true; ++ if (status == 0 && !udev->do_remote_wakeup && udev->persist_enabled) { ++ enum pm_qos_flags_status pm_qos_stat; ++ ++ pm_qos_stat = dev_pm_qos_flags(&port_dev->dev, ++ PM_QOS_FLAG_NO_POWER_OFF); ++ if (pm_qos_stat != PM_QOS_FLAGS_ALL) { ++ pm_runtime_put_sync(&port_dev->dev); ++ port_dev->did_runtime_put = true; ++ } + } + + usb_mark_last_busy(hub->hdev); +Index: linux-3.10-3.10.11/dummy/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1088_b504b4a1e3484b4b40a25ff228432df55cb24758.txt 2014-04-28 00:35:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.patch 2014-04-28 00:35:19.000000000 +0000 @@ -0,0 +1,56 @@ +commit e083505592ec12ab57fd930e286607583ecc641c +Author: Lan Tianyu +Date: Wed Jul 3 22:17:54 2013 +0800 + + usb: don't check pm qos NO_POWER_OFF flag in usb_port_suspend() + + commit 98a4f1ff7bea8002ab79d6776e30d27932e88244 upstream. + + The pm qos NO_POWER_OFF flag is checked twice during usb device suspend + to see if the usb port power off condition is met. This is redundant and + also will prevent the port from being powered off if the NO_POWER_OFF + flag is changed to 1 from 0 after the device was already suspended. + + More detail in the following link. + http://marc.info/?l=linux-usb&m=136543949130865&w=2 + + This patch should be backported to kernels as old as 3.7, that + contain the commit f7ac7787ad361e31a7972e2854ed8dc2eedfac3b "usb/acpi: + Use ACPI methods to power off ports." + + Signed-off-by: Lan Tianyu + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/hub.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/hub.c 2014-04-28 00:35:18.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/hub.c 2014-04-28 00:35:19.000000000 +0000 +@@ -3041,19 +3041,9 @@ + usb_set_device_state(udev, USB_STATE_SUSPENDED); + } + +- /* +- * Check whether current status meets the requirement of +- * usb port power off mechanism +- */ + if (status == 0 && !udev->do_remote_wakeup && udev->persist_enabled) { +- enum pm_qos_flags_status pm_qos_stat; +- +- pm_qos_stat = dev_pm_qos_flags(&port_dev->dev, +- PM_QOS_FLAG_NO_POWER_OFF); +- if (pm_qos_stat != PM_QOS_FLAGS_ALL) { +- pm_runtime_put_sync(&port_dev->dev); +- port_dev->did_runtime_put = true; +- } ++ pm_runtime_put_sync(&port_dev->dev); ++ port_dev->did_runtime_put = true; + } + + usb_mark_last_busy(hub->hdev); +Index: linux-3.10-3.10.11/dummy/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1089_e083505592ec12ab57fd930e286607583ecc641c.txt 2014-04-28 00:35:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.patch --- linux-3.10.11/debian/patches/rpi/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.patch 2014-04-28 00:35:20.000000000 +0000 @@ -0,0 +1,71 @@ +commit 215840ab83bfdd15deca0a8b0f140369afab7f52 +Author: Tejun Heo +Date: Fri Jun 28 10:34:48 2013 -0700 + + rculist: list_first_or_null_rcu() should use list_entry_rcu() + + commit c34ac00caefbe49d40058ae7200bd58725cebb45 upstream. + + list_first_or_null() should test whether the list is empty and return + pointer to the first entry if not in a RCU safe manner. It's broken + in several ways. + + * It compares __kernel @__ptr with __rcu @__next triggering the + following sparse warning. + + net/core/dev.c:4331:17: error: incompatible types in comparison expression (different address spaces) + + * It doesn't perform rcu_dereference*() and computes the entry address + using container_of() directly from the __rcu pointer which is + inconsitent with other rculist interface. As a result, all three + in-kernel users - net/core/dev.c, macvlan, cgroup - are buggy. They + dereference the pointer w/o going through read barrier. + + * While ->next dereference passes through list_next_rcu(), the + compiler is still free to fetch ->next more than once and thus + nullify the "__ptr != __next" condition check. + + Fix it by making list_first_or_null_rcu() dereference ->next directly + using ACCESS_ONCE() and then use list_entry_rcu() on it like other + rculist accessors. + + v2: Paul pointed out that the compiler may fetch the pointer more than + once nullifying the condition check. ACCESS_ONCE() added on + ->next dereference. + + v3: Restored () around macro param which was accidentally removed. + Spotted by Paul. + + Signed-off-by: Tejun Heo + Reported-by: Fengguang Wu + Cc: Dipankar Sarma + Cc: "Paul E. McKenney" + Cc: "David S. Miller" + Cc: Li Zefan + Cc: Patrick McHardy + Signed-off-by: Paul E. McKenney + Reviewed-by: Josh Triplett + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/rculist.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/rculist.h 2014-04-27 23:40:00.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/rculist.h 2014-04-28 00:35:20.000000000 +0000 +@@ -267,8 +267,9 @@ + */ + #define list_first_or_null_rcu(ptr, type, member) \ + ({struct list_head *__ptr = (ptr); \ +- struct list_head __rcu *__next = list_next_rcu(__ptr); \ +- likely(__ptr != __next) ? container_of(__next, type, member) : NULL; \ ++ struct list_head *__next = ACCESS_ONCE(__ptr->next); \ ++ likely(__ptr != __next) ? \ ++ list_entry_rcu(__next, type, member) : NULL; \ + }) + + /** +Index: linux-3.10-3.10.11/dummy/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1090_215840ab83bfdd15deca0a8b0f140369afab7f52.txt 2014-04-28 00:35:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.patch 2014-04-28 00:35:21.000000000 +0000 @@ -0,0 +1,38 @@ +commit a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e +Author: Mike Dyer +Date: Fri Aug 16 18:36:28 2013 +0100 + + ASoC: wm8960: Fix PLL register writes + + commit 85fa532b6ef920b32598df86b194571a7059a77c upstream. + + Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part + should be split across each register in 8bit chunks. + + Signed-off-by: Mike Dyer + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/wm8960.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/wm8960.c 2014-04-27 23:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/wm8960.c 2014-04-28 00:35:21.000000000 +0000 +@@ -857,9 +857,9 @@ + if (pll_div.k) { + reg |= 0x20; + +- snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 18) & 0x3f); +- snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 9) & 0x1ff); +- snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0x1ff); ++ snd_soc_write(codec, WM8960_PLL2, (pll_div.k >> 16) & 0xff); ++ snd_soc_write(codec, WM8960_PLL3, (pll_div.k >> 8) & 0xff); ++ snd_soc_write(codec, WM8960_PLL4, pll_div.k & 0xff); + } + snd_soc_write(codec, WM8960_PLL1, reg); + +Index: linux-3.10-3.10.11/dummy/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1091_a1b8ce5ac7db6a7c29a4ca658d5aff5384bd073e.txt 2014-04-28 00:35:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.patch --- linux-3.10.11/debian/patches/rpi/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.patch 2014-04-28 00:35:22.000000000 +0000 @@ -0,0 +1,44 @@ +commit 87d5b89a6a77f1e141d41c5447f6a4e83feb8d11 +Author: Steffen Trumtrar +Date: Mon Sep 9 18:09:12 2013 +0200 + + ASoC: mc13783: add spi errata fix + + commit 9f6f0afbb9fdabf6dcac642dfec457f28981e3f8 upstream. + + The MC13783 Chip Errata, Rev. 4 says, that depending on SPI clock + and main audio clock speed, the Audio Codec or Stereo DAC do sometimes + not start when programmed to do so. This is due to an internal clock + timing issue related to the loading of the SPI bits into the audio block. + + On an i.MX27 based system, this issue lead to switched audio channels under + certain circumstances: RTC + Touch + Audio are used and loaded at startup. + + The mentioned workaround of writing registers 40 and 41 two times is implemented + here. + + Signed-off-by: Steffen Trumtrar + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/mc13783.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/mc13783.c 2014-04-27 23:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/mc13783.c 2014-04-28 00:35:21.000000000 +0000 +@@ -126,6 +126,10 @@ + + ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); + ++ /* include errata fix for spi audio problems */ ++ if (reg == MC13783_AUDIO_CODEC || reg == MC13783_AUDIO_DAC) ++ ret = mc13xxx_reg_write(priv->mc13xxx, reg, value); ++ + mc13xxx_unlock(priv->mc13xxx); + + return ret; +Index: linux-3.10-3.10.11/dummy/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1092_87d5b89a6a77f1e141d41c5447f6a4e83feb8d11.txt 2014-04-28 00:35:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.patch 2014-04-28 00:35:23.000000000 +0000 @@ -0,0 +1,113 @@ +commit 1159cd1ded90b41db788f84bf94644a810dd322a +Author: H. Peter Anvin +Date: Fri Aug 30 15:43:03 2013 -0700 + + x86, smap: Handle csum_partial_copy_*_user() + + commit 7263dda41b5a28ae6566fd126d9b06ada73dd721 upstream. + + Add SMAP annotations to csum_partial_copy_to/from_user(). These + functions legitimately access user space and thus need to set the AC + flag. + + TODO: add explicit checks that the side with the kernel space pointer + really points into kernel space. + + Signed-off-by: H. Peter Anvin + Link: http://lkml.kernel.org/n/tip-2aps0u00eer658fd5xyanan7@git.kernel.org + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/include/asm/checksum_32.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/checksum_32.h 2014-04-27 23:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/checksum_32.h 2014-04-28 00:35:22.000000000 +0000 +@@ -49,9 +49,15 @@ + int len, __wsum sum, + int *err_ptr) + { ++ __wsum ret; ++ + might_sleep(); +- return csum_partial_copy_generic((__force void *)src, dst, +- len, sum, err_ptr, NULL); ++ stac(); ++ ret = csum_partial_copy_generic((__force void *)src, dst, ++ len, sum, err_ptr, NULL); ++ clac(); ++ ++ return ret; + } + + /* +@@ -176,10 +182,16 @@ + int len, __wsum sum, + int *err_ptr) + { ++ __wsum ret; ++ + might_sleep(); +- if (access_ok(VERIFY_WRITE, dst, len)) +- return csum_partial_copy_generic(src, (__force void *)dst, +- len, sum, NULL, err_ptr); ++ if (access_ok(VERIFY_WRITE, dst, len)) { ++ stac(); ++ ret = csum_partial_copy_generic(src, (__force void *)dst, ++ len, sum, NULL, err_ptr); ++ clac(); ++ return ret; ++ } + + if (len) + *err_ptr = -EFAULT; +Index: linux-3.10-3.10.11/arch/x86/lib/csum-wrappers_64.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/lib/csum-wrappers_64.c 2014-04-27 23:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/lib/csum-wrappers_64.c 2014-04-28 00:35:22.000000000 +0000 +@@ -6,6 +6,7 @@ + */ + #include + #include ++#include + + /** + * csum_partial_copy_from_user - Copy and checksum from user space. +@@ -52,8 +53,10 @@ + len -= 2; + } + } ++ stac(); + isum = csum_partial_copy_generic((__force const void *)src, + dst, len, isum, errp, NULL); ++ clac(); + if (unlikely(*errp)) + goto out_err; + +@@ -82,6 +85,8 @@ + csum_partial_copy_to_user(const void *src, void __user *dst, + int len, __wsum isum, int *errp) + { ++ __wsum ret; ++ + might_sleep(); + + if (unlikely(!access_ok(VERIFY_WRITE, dst, len))) { +@@ -105,8 +110,11 @@ + } + + *errp = 0; +- return csum_partial_copy_generic(src, (void __force *)dst, +- len, isum, NULL, errp); ++ stac(); ++ ret = csum_partial_copy_generic(src, (void __force *)dst, ++ len, isum, NULL, errp); ++ clac(); ++ return ret; + } + EXPORT_SYMBOL(csum_partial_copy_to_user); + +Index: linux-3.10-3.10.11/dummy/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1093_1159cd1ded90b41db788f84bf94644a810dd322a.txt 2014-04-28 00:35:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.patch --- linux-3.10.11/debian/patches/rpi/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.patch 2014-04-28 00:35:24.000000000 +0000 @@ -0,0 +1,113 @@ +commit a168ad2687045d24e98b2525d1ee678c4f2a9a96 +Author: Al Viro +Date: Sun Sep 1 20:35:01 2013 +0100 + + Introduce [compat_]save_altstack_ex() to unbreak x86 SMAP + + commit bd1c149aa9915b9abb6d83d0f01dfd2ace0680b5 upstream. + + For performance reasons, when SMAP is in use, SMAP is left open for an + entire put_user_try { ... } put_user_catch(); block, however, calling + __put_user() in the middle of that block will close SMAP as the + STAC..CLAC constructs intentionally do not nest. + + Furthermore, using __put_user() rather than put_user_ex() here is bad + for performance. + + Thus, introduce new [compat_]save_altstack_ex() helpers that replace + __[compat_]save_altstack() for x86, being currently the only + architecture which supports put_user_try { ... } put_user_catch(). + + Reported-by: H. Peter Anvin + Signed-off-by: Al Viro + Signed-off-by: H. Peter Anvin + Link: http://lkml.kernel.org/n/tip-es5p6y64if71k8p5u08agv9n@git.kernel.org + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/ia32/ia32_signal.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/ia32/ia32_signal.c 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/ia32/ia32_signal.c 2014-04-28 00:35:23.000000000 +0000 +@@ -459,7 +459,7 @@ + else + put_user_ex(0, &frame->uc.uc_flags); + put_user_ex(0, &frame->uc.uc_link); +- err |= __compat_save_altstack(&frame->uc.uc_stack, regs->sp); ++ compat_save_altstack_ex(&frame->uc.uc_stack, regs->sp); + + if (ksig->ka.sa.sa_flags & SA_RESTORER) + restorer = ksig->ka.sa.sa_restorer; +Index: linux-3.10-3.10.11/arch/x86/kernel/signal.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/signal.c 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/signal.c 2014-04-28 00:35:23.000000000 +0000 +@@ -364,7 +364,7 @@ + else + put_user_ex(0, &frame->uc.uc_flags); + put_user_ex(0, &frame->uc.uc_link); +- err |= __save_altstack(&frame->uc.uc_stack, regs->sp); ++ save_altstack_ex(&frame->uc.uc_stack, regs->sp); + + /* Set up to return from userspace. */ + restorer = VDSO32_SYMBOL(current->mm->context.vdso, rt_sigreturn); +@@ -429,7 +429,7 @@ + else + put_user_ex(0, &frame->uc.uc_flags); + put_user_ex(0, &frame->uc.uc_link); +- err |= __save_altstack(&frame->uc.uc_stack, regs->sp); ++ save_altstack_ex(&frame->uc.uc_stack, regs->sp); + + /* Set up to return from userspace. If provided, use a stub + already in userspace. */ +@@ -496,7 +496,7 @@ + else + put_user_ex(0, &frame->uc.uc_flags); + put_user_ex(0, &frame->uc.uc_link); +- err |= __compat_save_altstack(&frame->uc.uc_stack, regs->sp); ++ compat_save_altstack_ex(&frame->uc.uc_stack, regs->sp); + put_user_ex(0, &frame->uc.uc__pad0); + + if (ksig->ka.sa.sa_flags & SA_RESTORER) { +Index: linux-3.10-3.10.11/include/linux/compat.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/compat.h 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/compat.h 2014-04-28 00:35:23.000000000 +0000 +@@ -669,6 +669,13 @@ + + int compat_restore_altstack(const compat_stack_t __user *uss); + int __compat_save_altstack(compat_stack_t __user *, unsigned long); ++#define compat_save_altstack_ex(uss, sp) do { \ ++ compat_stack_t __user *__uss = uss; \ ++ struct task_struct *t = current; \ ++ put_user_ex(ptr_to_compat((void __user *)t->sas_ss_sp), &__uss->ss_sp); \ ++ put_user_ex(sas_ss_flags(sp), &__uss->ss_flags); \ ++ put_user_ex(t->sas_ss_size, &__uss->ss_size); \ ++} while (0); + + asmlinkage long compat_sys_sched_rr_get_interval(compat_pid_t pid, + struct compat_timespec __user *interval); +Index: linux-3.10-3.10.11/include/linux/signal.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/signal.h 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/signal.h 2014-04-28 00:35:23.000000000 +0000 +@@ -434,6 +434,14 @@ + int restore_altstack(const stack_t __user *); + int __save_altstack(stack_t __user *, unsigned long); + ++#define save_altstack_ex(uss, sp) do { \ ++ stack_t __user *__uss = uss; \ ++ struct task_struct *t = current; \ ++ put_user_ex((void __user *)t->sas_ss_sp, &__uss->ss_sp); \ ++ put_user_ex(sas_ss_flags(sp), &__uss->ss_flags); \ ++ put_user_ex(t->sas_ss_size, &__uss->ss_size); \ ++} while (0); ++ + #ifdef CONFIG_PROC_FS + struct seq_file; + extern void render_sigset_t(struct seq_file *, const char *, sigset_t *); +Index: linux-3.10-3.10.11/dummy/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1094_a168ad2687045d24e98b2525d1ee678c4f2a9a96.txt 2014-04-28 00:35:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.patch 2014-04-28 00:35:25.000000000 +0000 @@ -0,0 +1,34 @@ +commit 5e3db40138469c967ea0d323eeb8143f2d46a6aa +Author: Aravind Gopalakrishnan +Date: Fri Aug 2 17:43:02 2013 -0500 + + pci_ids: Add PCI device ID functions 3 and 4 for newer F15h models. + + commit 6bdaa63c2957ac04e8d596880f732b79f9c06c3c upstream. + + Add PCI device IDs for AMD F15h, model 30h. They will be used in + amd_nb.c and amd64_edac.c + + Signed-off-by: Aravind Gopalakrishnan + Signed-off-by: Borislav Petkov + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/pci_ids.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/pci_ids.h 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/pci_ids.h 2014-04-28 00:35:24.000000000 +0000 +@@ -518,6 +518,8 @@ + #define PCI_DEVICE_ID_AMD_11H_NB_MISC 0x1303 + #define PCI_DEVICE_ID_AMD_11H_NB_LINK 0x1304 + #define PCI_DEVICE_ID_AMD_15H_M10H_F3 0x1403 ++#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F3 0x141d ++#define PCI_DEVICE_ID_AMD_15H_M30H_NB_F4 0x141e + #define PCI_DEVICE_ID_AMD_15H_NB_F0 0x1600 + #define PCI_DEVICE_ID_AMD_15H_NB_F1 0x1601 + #define PCI_DEVICE_ID_AMD_15H_NB_F2 0x1602 +Index: linux-3.10-3.10.11/dummy/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1095_5e3db40138469c967ea0d323eeb8143f2d46a6aa.txt 2014-04-28 00:35:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.patch --- linux-3.10.11/debian/patches/rpi/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.patch 2014-04-28 00:35:26.000000000 +0000 @@ -0,0 +1,66 @@ +commit b50361f39ca5a27cdadbd53b7a7d46daa3cde151 +Author: Aravind Gopalakrishnan +Date: Fri Aug 2 17:43:03 2013 -0500 + + x86, amd_nb: Clarify F15h, model 30h GART and L3 support + + commit 7d64ac6422092adbbdaa279ab32f9d4c90a84558 upstream. + + F15h, models 0x30 and later don't have a GART. Note that. Also check + CPUID leaf 0x80000006 for L3 prescence because there are models which + don't sport an L3 cache. + + Signed-off-by: Aravind Gopalakrishnan + [ Boris: rewrite commit message, cleanup comments. ] + Signed-off-by: Borislav Petkov + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/kernel/amd_nb.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/amd_nb.c 2014-04-27 23:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/amd_nb.c 2014-04-28 00:35:25.000000000 +0000 +@@ -20,6 +20,7 @@ + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M10H_F3) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F3) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F3) }, + {} + }; +@@ -27,6 +28,7 @@ + + static const struct pci_device_id amd_nb_link_ids[] = { + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4) }, ++ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_M30H_NB_F4) }, + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_16H_NB_F4) }, + {} + }; +@@ -81,13 +83,20 @@ + next_northbridge(misc, amd_nb_misc_ids); + node_to_amd_nb(i)->link = link = + next_northbridge(link, amd_nb_link_ids); +- } ++ } + ++ /* GART present only on Fam15h upto model 0fh */ + if (boot_cpu_data.x86 == 0xf || boot_cpu_data.x86 == 0x10 || +- boot_cpu_data.x86 == 0x15) ++ (boot_cpu_data.x86 == 0x15 && boot_cpu_data.x86_model < 0x10)) + amd_northbridges.flags |= AMD_NB_GART; + + /* ++ * Check for L3 cache presence. ++ */ ++ if (!cpuid_edx(0x80000006)) ++ return 0; ++ ++ /* + * Some CPU families support L3 Cache Index Disable. There are some + * limitations because of E382 and E388 on family 0x10. + */ +Index: linux-3.10-3.10.11/dummy/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1096_b50361f39ca5a27cdadbd53b7a7d46daa3cde151.txt 2014-04-28 00:35:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.patch 2014-04-28 00:35:26.000000000 +0000 @@ -0,0 +1,53 @@ +commit 8ceb02f11454cf5102bfede5a6e112abe3990bb2 +Author: Tony Luck +Date: Wed Jul 24 13:54:20 2013 -0700 + + x86/mce: Pay no attention to 'F' bit in MCACOD when parsing 'UC' errors + + commit 0ca06c0857aee11911f91621db14498496f2c2cd upstream. + + The 0x1000 bit of the MCACOD field of machine check MCi_STATUS + registers is only defined for corrected errors (where it means + that hardware may be filtering errors see SDM section 15.9.2.1). + + For uncorrected errors it may, or may not be set - so we should mask + it out when checking for the architecturaly defined recoverable + error signatures (see SDM 15.9.3.1 and 15.9.3.2) + + Acked-by: Naveen N. Rao + Signed-off-by: Tony Luck + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/include/asm/mce.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/mce.h 2014-04-27 23:39:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/mce.h 2014-04-28 00:35:26.000000000 +0000 +@@ -32,11 +32,20 @@ + #define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */ + #define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */ + #define MCI_STATUS_AR (1ULL<<55) /* Action required */ +-#define MCACOD 0xffff /* MCA Error Code */ ++ ++/* ++ * Note that the full MCACOD field of IA32_MCi_STATUS MSR is ++ * bits 15:0. But bit 12 is the 'F' bit, defined for corrected ++ * errors to indicate that errors are being filtered by hardware. ++ * We should mask out bit 12 when looking for specific signatures ++ * of uncorrected errors - so the F bit is deliberately skipped ++ * in this #define. ++ */ ++#define MCACOD 0xefff /* MCA Error Code */ + + /* Architecturally defined codes from SDM Vol. 3B Chapter 15 */ + #define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */ +-#define MCACOD_SCRUBMSK 0xfff0 ++#define MCACOD_SCRUBMSK 0xeff0 /* Skip bit 12 ('F' bit) */ + #define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */ + #define MCACOD_DATA 0x0134 /* Data Load */ + #define MCACOD_INSTR 0x0150 /* Instruction Fetch */ +Index: linux-3.10-3.10.11/dummy/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1097_8ceb02f11454cf5102bfede5a6e112abe3990bb2.txt 2014-04-28 00:35:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.patch 2014-04-28 00:35:27.000000000 +0000 @@ -0,0 +1,93 @@ +commit c18c0f9da9d97ea6710804971b981456a40cd01a +Author: Rik van Riel +Date: Wed Jul 31 22:14:21 2013 -0400 + + sched/x86: Optimize switch_mm() for multi-threaded workloads + + commit 8f898fbbe5ee5e20a77c4074472a1fd088dc47d1 upstream. + + Dick Fowles, Don Zickus and Joe Mario have been working on + improvements to perf, and noticed heavy cache line contention + on the mm_cpumask, running linpack on a 60 core / 120 thread + system. + + The cause turned out to be unnecessary atomic accesses to the + mm_cpumask. When in lazy TLB mode, the CPU is only removed from + the mm_cpumask if there is a TLB flush event. + + Most of the time, no such TLB flush happens, and the kernel + skips the TLB reload. It can also skip the atomic memory + set & test. + + Here is a summary of Joe's test results: + + * The __schedule function dropped from 24% of all program cycles down + to 5.5%. + + * The cacheline contention/hotness for accesses to that bitmask went + from being the 1st/2nd hottest - down to the 84th hottest (0.3% of + all shared misses which is now quite cold) + + * The average load latency for the bit-test-n-set instruction in + __schedule dropped from 10k-15k cycles down to an average of 600 cycles. + + * The linpack program results improved from 133 GFlops to 144 GFlops. + Peak GFlops rose from 133 to 153. + + Reported-by: Don Zickus + Reported-by: Joe Mario + Tested-by: Joe Mario + Signed-off-by: Rik van Riel + Reviewed-by: Paul Turner + Acked-by: Linus Torvalds + Link: http://lkml.kernel.org/r/20130731221421.616d3d20@annuminas.surriel.com + [ Made the comments consistent around the modified code. ] + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/include/asm/mmu_context.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/mmu_context.h 2014-04-27 23:39:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/mmu_context.h 2014-04-28 00:35:27.000000000 +0000 +@@ -45,22 +45,28 @@ + /* Re-load page tables */ + load_cr3(next->pgd); + +- /* stop flush ipis for the previous mm */ ++ /* Stop flush ipis for the previous mm */ + cpumask_clear_cpu(cpu, mm_cpumask(prev)); + +- /* +- * load the LDT, if the LDT is different: +- */ ++ /* Load the LDT, if the LDT is different: */ + if (unlikely(prev->context.ldt != next->context.ldt)) + load_LDT_nolock(&next->context); + } + #ifdef CONFIG_SMP +- else { ++ else { + this_cpu_write(cpu_tlbstate.state, TLBSTATE_OK); + BUG_ON(this_cpu_read(cpu_tlbstate.active_mm) != next); + +- if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next))) { +- /* We were in lazy tlb mode and leave_mm disabled ++ if (!cpumask_test_cpu(cpu, mm_cpumask(next))) { ++ /* ++ * On established mms, the mm_cpumask is only changed ++ * from irq context, from ptep_clear_flush() while in ++ * lazy tlb mode, and here. Irqs are blocked during ++ * schedule, protecting us from simultaneous changes. ++ */ ++ cpumask_set_cpu(cpu, mm_cpumask(next)); ++ /* ++ * We were in lazy tlb mode and leave_mm disabled + * tlb flush IPI delivery. We must reload CR3 + * to make sure to use no freed page tables. + */ +Index: linux-3.10-3.10.11/dummy/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1098_c18c0f9da9d97ea6710804971b981456a40cd01a.txt 2014-04-28 00:35:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.patch --- linux-3.10.11/debian/patches/rpi/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.patch 2014-04-28 00:35:28.000000000 +0000 @@ -0,0 +1,147 @@ +commit dc780f7fc64b6ca11854cd5ac724b85fa1853495 +Author: Takashi Iwai +Date: Mon Sep 2 12:33:02 2013 +0200 + + ALSA: hda - Re-setup HDMI pin and audio infoframe on stream switches + + commit b054087dbacee30a9dddaef2c9a96312146be04e upstream. + + When the transcoder:port mapping on Haswell HDMI/DP audio is changed + during the stream playback, the sound gets lost. Typically this + problem is seen when the user switches the graphics mode from eDP+DP + to DP-only configuration, where CRTC 1 is used for DP in the former + while CRTC 0 is used for the latter. + + The graphics controller notifies the change via the normal ELD update + procedure, so we get the intrinsic event. For enabling the sound + again, the HDMI audio driver needs to reset the pin and set up the + audio infoframe again. + + This patch achieves it by: + - keep the current status of channels and info frame setup in per_pin + struct, + - check the reconnection in the intrinsic event handler, + - reset the pin and the re-invoke hdmi_setup_audio_infoframe() + accordingly. + + The hdmi_setup_audio_infoframe() function has been changed, too, so + that it can be invoked without passing the substream instance. + + The patch is mostly based on the work by Mengdong Lin. + + Cc: Mengdong Lin + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_hdmi.c 2014-04-27 23:39:56.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c 2014-04-28 00:35:28.000000000 +0000 +@@ -67,6 +67,8 @@ + struct delayed_work work; + struct snd_kcontrol *eld_ctl; + int repoll_count; ++ bool setup; /* the stream has been set up by prepare callback */ ++ int channels; /* current number of channels */ + bool non_pcm; + bool chmap_set; /* channel-map override by ALSA API? */ + unsigned char chmap[8]; /* ALSA API channel-map */ +@@ -868,18 +870,19 @@ + return true; + } + +-static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, +- bool non_pcm, +- struct snd_pcm_substream *substream) ++static void hdmi_setup_audio_infoframe(struct hda_codec *codec, ++ struct hdmi_spec_per_pin *per_pin, ++ bool non_pcm) + { +- struct hdmi_spec *spec = codec->spec; +- struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); + hda_nid_t pin_nid = per_pin->pin_nid; +- int channels = substream->runtime->channels; ++ int channels = per_pin->channels; + struct hdmi_eld *eld; + int ca; + union audio_infoframe ai; + ++ if (!channels) ++ return; ++ + eld = &per_pin->sink_eld; + if (!eld->monitor_present) + return; +@@ -1263,6 +1266,7 @@ + eld_changed = true; + } + if (update_eld) { ++ bool old_eld_valid = pin_eld->eld_valid; + pin_eld->eld_valid = eld->eld_valid; + eld_changed = pin_eld->eld_size != eld->eld_size || + memcmp(pin_eld->eld_buffer, eld->eld_buffer, +@@ -1272,6 +1276,18 @@ + eld->eld_size); + pin_eld->eld_size = eld->eld_size; + pin_eld->info = eld->info; ++ ++ /* Haswell-specific workaround: re-setup when the transcoder is ++ * changed during the stream playback ++ */ ++ if (codec->vendor_id == 0x80862807 && ++ eld->eld_valid && !old_eld_valid && per_pin->setup) { ++ snd_hda_codec_write(codec, pin_nid, 0, ++ AC_VERB_SET_AMP_GAIN_MUTE, ++ AMP_OUT_UNMUTE); ++ hdmi_setup_audio_infoframe(codec, per_pin, ++ per_pin->non_pcm); ++ } + } + mutex_unlock(&pin_eld->lock); + +@@ -1444,14 +1460,17 @@ + hda_nid_t cvt_nid = hinfo->nid; + struct hdmi_spec *spec = codec->spec; + int pin_idx = hinfo_to_pin_index(spec, hinfo); +- hda_nid_t pin_nid = get_pin(spec, pin_idx)->pin_nid; ++ struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); ++ hda_nid_t pin_nid = per_pin->pin_nid; + bool non_pcm; + + non_pcm = check_non_pcm_per_cvt(codec, cvt_nid); ++ per_pin->channels = substream->runtime->channels; ++ per_pin->setup = true; + + hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); + +- hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream); ++ hdmi_setup_audio_infoframe(codec, per_pin, non_pcm); + + return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); + } +@@ -1491,6 +1510,9 @@ + snd_hda_spdif_ctls_unassign(codec, pin_idx); + per_pin->chmap_set = false; + memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); ++ ++ per_pin->setup = false; ++ per_pin->channels = 0; + } + + return 0; +@@ -1626,8 +1648,7 @@ + per_pin->chmap_set = true; + memcpy(per_pin->chmap, chmap, sizeof(chmap)); + if (prepared) +- hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm, +- substream); ++ hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); + + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1099_dc780f7fc64b6ca11854cd5ac724b85fa1853495.txt 2014-04-28 00:35:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.patch 2014-04-28 00:35:29.000000000 +0000 @@ -0,0 +1,70 @@ +commit 686edbc09d22070e8ff3edaf7a6f53f80b4517b0 +Author: Anssi Hannula +Date: Sun Sep 1 14:36:47 2013 +0300 + + ALSA: hda - hdmi: Fallback to ALSA allocation when selecting CA + + commit 18e391862cceaf43ddb8eb5cca05e1a83abdebaa upstream. + + hdmi_channel_allocation() tries to find a HDMI channel allocation that + matches the number channels in the playback stream and contains only + speakers that the HDMI sink has reported as available via EDID. If no + such allocation is found, 0 (stereo audio) is used. + + Using CA 0 causes the audio causes the sink to discard everything except + the first two channels (front left and front right). + + However, the sink may be capable of receiving more channels than it has + speakers (and then perform downmix or discard the extra channels), in + which case it is preferable to use a CA that contains extra channels + than to use CA 0 which discards all the non-stereo channels. + + Additionally, it seems that HBR (HD) passthrough output does not work on + Intel HDMI codecs when CA is set to 0 (possibly the codec zeroes + channels not present in CA). This happens with all receivers that report + a 5.1 speaker mask since a HBR stream is carried on 8 channels to the + codec. + + Add a fallback in the CA selection so that the CA channel count at least + matches the stream channel count, even if the stream contains channels + not present in the sink speaker descriptor. + + Thanks to GrimGriefer at OpenELEC forums for discovering that changing + the sink speaker mask allowed HBR output. + + Reported-by: GrimGriefer + Reported-by: Ashecrow + Reported-by: Frank Zafka + Reported-by: Peter Frühberger + Signed-off-by: Anssi Hannula + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_hdmi.c 2014-04-28 00:35:28.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c 2014-04-28 00:35:28.000000000 +0000 +@@ -553,6 +553,17 @@ + } + } + ++ if (!ca) { ++ /* if there was no match, select the regular ALSA channel ++ * allocation with the matching number of channels */ ++ for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { ++ if (channels == channel_allocations[i].channels) { ++ ca = channel_allocations[i].ca_index; ++ break; ++ } ++ } ++ } ++ + snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf)); + snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", + ca, channels, buf); +Index: linux-3.10-3.10.11/dummy/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1100_686edbc09d22070e8ff3edaf7a6f53f80b4517b0.txt 2014-04-28 00:35:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.patch 2014-04-28 00:35:30.000000000 +0000 @@ -0,0 +1,34 @@ +commit ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8 +Author: Takashi Iwai +Date: Mon Sep 9 10:20:48 2013 +0200 + + ALSA: hda - Add Toshiba Satellite C870 to MSI blacklist + + commit 83f72151352791836a1b9c1542614cc9bf71ac61 upstream. + + Toshiba Satellite C870 shows interrupt problems occasionally when + certain mixer controls like "Mic Switch" is toggled. This seems + worked around by not using MSI. + + Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=833585 + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/hda_intel.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/hda_intel.c 2014-04-28 00:32:50.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/hda_intel.c 2014-04-28 00:35:29.000000000 +0000 +@@ -3335,6 +3335,7 @@ + SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */ + SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */ + SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */ ++ SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */ + SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */ + SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */ + {} +Index: linux-3.10-3.10.11/dummy/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1101_ff70cfafb27ead6e06ba3d2e2f648fee7137d9e8.txt 2014-04-28 00:35:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.patch --- linux-3.10.11/debian/patches/rpi/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.patch 2014-04-28 00:35:30.000000000 +0000 @@ -0,0 +1,45 @@ +commit 25a870d4dc930531f545aa1ae0cdca281d99f980 +Author: Boris BREZILLON +Date: Tue Aug 27 15:19:21 2013 +0200 + + pinctrl: at91: fix get_pullup/down function return + + commit 05d3534a321d7fe4524b3b83bb20318282f3ec2c upstream. + + In PIO_PUSR and PIO_PPDSR register if a given bit is set 1 this means the + pullup/down for this pin (pin is represented as a bit position) is + disabled. + + Signed-off-by: Boris BREZILLON + Acked-by: Nicolas Ferre + Signed-off-by: Linus Walleij + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/pinctrl/pinctrl-at91.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/pinctrl/pinctrl-at91.c 2014-04-27 23:39:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/pinctrl/pinctrl-at91.c 2014-04-28 00:35:30.000000000 +0000 +@@ -325,7 +325,7 @@ + + static unsigned at91_mux_get_pullup(void __iomem *pio, unsigned pin) + { +- return (readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1; ++ return !((readl_relaxed(pio + PIO_PUSR) >> pin) & 0x1); + } + + static void at91_mux_set_pullup(void __iomem *pio, unsigned mask, bool on) +@@ -445,7 +445,7 @@ + + static bool at91_mux_pio3_get_pulldown(void __iomem *pio, unsigned pin) + { +- return (__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1; ++ return !((__raw_readl(pio + PIO_PPDSR) >> pin) & 0x1); + } + + static void at91_mux_pio3_set_pulldown(void __iomem *pio, unsigned mask, bool is_on) +Index: linux-3.10-3.10.11/dummy/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1102_25a870d4dc930531f545aa1ae0cdca281d99f980.txt 2014-04-28 00:35:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.patch --- linux-3.10.11/debian/patches/rpi/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.patch 2014-04-28 00:35:31.000000000 +0000 @@ -0,0 +1,158 @@ +commit 263c784f2b66e18e34208a2f0e56df65c039d918 +Author: Jan Kara +Date: Sat Aug 17 10:07:17 2013 -0400 + + ext4: simplify truncation code in ext4_setattr() + + commit 5208386c501276df18fee464e21d3c58d2d79517 upstream. + + Merge conditions in ext4_setattr() handling inode size changes, also + move ext4_begin_ordered_truncate() call somewhat earlier because it + simplifies error recovery in case of failure. Also add error handling in + case i_disksize update fails. + + Signed-off-by: Jan Kara + Signed-off-by: "Theodore Ts'o" + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/ext4/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/ext4/inode.c 2014-04-27 23:39:55.000000000 +0000 ++++ linux-3.10-3.10.11/fs/ext4/inode.c 2014-04-28 00:35:31.000000000 +0000 +@@ -4706,7 +4706,9 @@ + ext4_journal_stop(handle); + } + +- if (attr->ia_valid & ATTR_SIZE) { ++ if (attr->ia_valid & ATTR_SIZE && attr->ia_size != inode->i_size) { ++ handle_t *handle; ++ loff_t oldsize = inode->i_size; + + if (!(ext4_test_inode_flag(inode, EXT4_INODE_EXTENTS))) { + struct ext4_sb_info *sbi = EXT4_SB(inode->i_sb); +@@ -4714,73 +4716,60 @@ + if (attr->ia_size > sbi->s_bitmap_maxbytes) + return -EFBIG; + } +- } +- +- if (S_ISREG(inode->i_mode) && +- attr->ia_valid & ATTR_SIZE && +- (attr->ia_size < inode->i_size)) { +- handle_t *handle; +- +- handle = ext4_journal_start(inode, EXT4_HT_INODE, 3); +- if (IS_ERR(handle)) { +- error = PTR_ERR(handle); +- goto err_out; +- } +- if (ext4_handle_valid(handle)) { +- error = ext4_orphan_add(handle, inode); +- orphan = 1; +- } +- EXT4_I(inode)->i_disksize = attr->ia_size; +- rc = ext4_mark_inode_dirty(handle, inode); +- if (!error) +- error = rc; +- ext4_journal_stop(handle); +- +- if (ext4_should_order_data(inode)) { +- error = ext4_begin_ordered_truncate(inode, ++ if (S_ISREG(inode->i_mode) && ++ (attr->ia_size < inode->i_size)) { ++ if (ext4_should_order_data(inode)) { ++ error = ext4_begin_ordered_truncate(inode, + attr->ia_size); +- if (error) { +- /* Do as much error cleanup as possible */ +- handle = ext4_journal_start(inode, +- EXT4_HT_INODE, 3); +- if (IS_ERR(handle)) { +- ext4_orphan_del(NULL, inode); ++ if (error) + goto err_out; +- } +- ext4_orphan_del(handle, inode); +- orphan = 0; +- ext4_journal_stop(handle); ++ } ++ handle = ext4_journal_start(inode, EXT4_HT_INODE, 3); ++ if (IS_ERR(handle)) { ++ error = PTR_ERR(handle); ++ goto err_out; ++ } ++ if (ext4_handle_valid(handle)) { ++ error = ext4_orphan_add(handle, inode); ++ orphan = 1; ++ } ++ EXT4_I(inode)->i_disksize = attr->ia_size; ++ rc = ext4_mark_inode_dirty(handle, inode); ++ if (!error) ++ error = rc; ++ ext4_journal_stop(handle); ++ if (error) { ++ ext4_orphan_del(NULL, inode); + goto err_out; + } + } +- } +- +- if (attr->ia_valid & ATTR_SIZE) { +- if (attr->ia_size != inode->i_size) { +- loff_t oldsize = inode->i_size; + +- i_size_write(inode, attr->ia_size); +- /* +- * Blocks are going to be removed from the inode. Wait +- * for dio in flight. Temporarily disable +- * dioread_nolock to prevent livelock. +- */ +- if (orphan) { +- if (!ext4_should_journal_data(inode)) { +- ext4_inode_block_unlocked_dio(inode); +- inode_dio_wait(inode); +- ext4_inode_resume_unlocked_dio(inode); +- } else +- ext4_wait_for_tail_page_commit(inode); +- } +- /* +- * Truncate pagecache after we've waited for commit +- * in data=journal mode to make pages freeable. +- */ +- truncate_pagecache(inode, oldsize, inode->i_size); ++ i_size_write(inode, attr->ia_size); ++ /* ++ * Blocks are going to be removed from the inode. Wait ++ * for dio in flight. Temporarily disable ++ * dioread_nolock to prevent livelock. ++ */ ++ if (orphan) { ++ if (!ext4_should_journal_data(inode)) { ++ ext4_inode_block_unlocked_dio(inode); ++ inode_dio_wait(inode); ++ ext4_inode_resume_unlocked_dio(inode); ++ } else ++ ext4_wait_for_tail_page_commit(inode); + } +- ext4_truncate(inode); ++ /* ++ * Truncate pagecache after we've waited for commit ++ * in data=journal mode to make pages freeable. ++ */ ++ truncate_pagecache(inode, oldsize, inode->i_size); + } ++ /* ++ * We want to call ext4_truncate() even if attr->ia_size == ++ * inode->i_size for cases like truncation of fallocated space ++ */ ++ if (attr->ia_valid & ATTR_SIZE) ++ ext4_truncate(inode); + + if (!rc) { + setattr_copy(inode, attr); +Index: linux-3.10-3.10.11/dummy/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1103_263c784f2b66e18e34208a2f0e56df65c039d918.txt 2014-04-28 00:35:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.patch 2014-04-28 00:35:32.000000000 +0000 @@ -0,0 +1,106 @@ +commit d31a13c733d14114da0c7f6cf01396a6a2e1ccb2 +Author: John W. Linville +Date: Fri Aug 9 13:36:21 2013 -0400 + + brcmsmac: Fix WARNING caused by lack of calls to dma_mapping_error() + + commit 67d0cf50bd32b66eab709871714e55725ee30ce4 upstream. + + The driver fails to check the results of DMA mapping in twp places, + which results in the following warning: + + [ 28.078515] ------------[ cut here ]------------ + [ 28.078529] WARNING: at lib/dma-debug.c:937 check_unmap+0x47e/0x930() + [ 28.078533] bcma-pci-bridge 0000:0e:00.0: DMA-API: device driver failed to check map error[device address=0x00000000b5d60d6c] [size=1876 bytes] [mapped as + single] + [ 28.078536] Modules linked in: bnep bluetooth vboxpci(O) vboxnetadp(O) vboxnetflt(O) vboxdrv(O) ipv6 b43 brcmsmac rtl8192cu rtl8192c_common rtlwifi mac802 + 11 brcmutil cfg80211 snd_hda_codec_conexant rng_core snd_hda_intel kvm_amd snd_hda_codec ssb kvm mmc_core snd_pcm snd_seq snd_timer snd_seq_device snd k8temp + cordic joydev serio_raw hwmon sr_mod sg pcmcia pcmcia_core soundcore cdrom i2c_nforce2 i2c_core forcedeth bcma snd_page_alloc autofs4 ext4 jbd2 mbcache crc1 + 6 scsi_dh_alua scsi_dh_hp_sw scsi_dh_rdac scsi_dh_emc scsi_dh ata_generic pata_amd + [ 28.078602] CPU: 1 PID: 2570 Comm: NetworkManager Tainted: G O 3.10.0-rc7-wl+ #42 + [ 28.078605] Hardware name: Hewlett-Packard HP Pavilion dv2700 Notebook PC/30D6, BIOS F.27 11/27/2008 + [ 28.078607] 0000000000000009 ffff8800bbb03ad8 ffffffff8144f898 ffff8800bbb03b18 + [ 28.078612] ffffffff8103e1eb 0000000000000002 ffff8800b719f480 ffff8800b7b9c010 + [ 28.078617] ffffffff824204c0 ffffffff81754d57 0000000000000754 ffff8800bbb03b78 + [ 28.078622] Call Trace: + [ 28.078624] [] dump_stack+0x19/0x1b + [ 28.078634] [] warn_slowpath_common+0x6b/0xa0 + [ 28.078638] [] warn_slowpath_fmt+0x41/0x50 + [ 28.078650] [] check_unmap+0x47e/0x930 + [ 28.078655] [] debug_dma_unmap_page+0x5c/0x70 + [ 28.078679] [] dma64_getnextrxp+0x10c/0x190 [brcmsmac] + [ 28.078691] [] dma_rx+0x62/0x240 [brcmsmac] + [ 28.078707] [] brcms_c_dpc+0x211/0x9d0 [brcmsmac] + [ 28.078717] [] ? brcms_dpc+0x27/0xf0 [brcmsmac] + [ 28.078731] [] brcms_dpc+0x47/0xf0 [brcmsmac] + [ 28.078736] [] tasklet_action+0x6c/0xf0 + --snip-- + [ 28.078974] [] SyS_sendmsg+0xd/0x20 + [ 28.078979] [] tracesys+0xdd/0xe2 + [ 28.078982] ---[ end trace 6164d1a08148e9c8 ]--- + [ 28.078984] Mapped at: + [ 28.078985] [] debug_dma_map_page+0x9d/0x150 + [ 28.078989] [] dma_rxfill+0x102/0x3d0 [brcmsmac] + [ 28.079001] [] brcms_c_init+0x87d/0x1100 [brcmsmac] + [ 28.079010] [] brcms_init+0x21/0x30 [brcmsmac] + [ 28.079018] [] brcms_c_up+0x150/0x430 [brcmsmac] + + As the patch adds a new failure mechanism to dma_rxfill(). When I changed the + comment at the start of the routine to add that information, I also polished + the wording. + + Signed-off-by: Larry Finger + Cc: Brett Rudley + Cc: Franky (Zhenhui) Lin + Cc: Hante Meuleman + Cc: brcm80211-dev-list@broadcom.com + Acked-by: Arend van Spriel + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmsmac/dma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmsmac/dma.c 2014-04-27 23:39:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmsmac/dma.c 2014-04-28 00:35:31.000000000 +0000 +@@ -1015,9 +1015,10 @@ + + /* + * post receive buffers +- * return false is refill failed completely and ring is empty this will stall +- * the rx dma and user might want to call rxfill again asap. This unlikely +- * happens on memory-rich NIC, but often on memory-constrained dongle ++ * Return false if refill failed completely or dma mapping failed. The ring ++ * is empty, which will stall the rx dma and user might want to call rxfill ++ * again asap. This is unlikely to happen on a memory-rich NIC, but often on ++ * memory-constrained dongle. + */ + bool dma_rxfill(struct dma_pub *pub) + { +@@ -1078,6 +1079,8 @@ + + pa = dma_map_single(di->dmadev, p->data, di->rxbufsize, + DMA_FROM_DEVICE); ++ if (dma_mapping_error(di->dmadev, pa)) ++ return false; + + /* save the free packet pointer */ + di->rxp[rxout] = p; +@@ -1284,7 +1287,11 @@ + + /* get physical address of buffer start */ + pa = dma_map_single(di->dmadev, data, len, DMA_TO_DEVICE); +- ++ /* if mapping failed, free skb */ ++ if (dma_mapping_error(di->dmadev, pa)) { ++ brcmu_pkt_buf_free_skb(p); ++ return; ++ } + /* With a DMA segment list, Descriptor table is filled + * using the segment list instead of looping over + * buffers in multi-chain DMA. Therefore, EOF for SGLIST +Index: linux-3.10-3.10.11/dummy/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1104_d31a13c733d14114da0c7f6cf01396a6a2e1ccb2.txt 2014-04-28 00:35:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.patch --- linux-3.10.11/debian/patches/rpi/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.patch 2014-04-28 00:35:33.000000000 +0000 @@ -0,0 +1,33 @@ +commit 31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886 +Author: Felix Fietkau +Date: Tue Aug 6 14:18:10 2013 +0200 + + ath9k: always clear ps filter bit on new assoc + + commit 026d5b07c03458f9c0ccd19c3850564a5409c325 upstream. + + Otherwise in some cases, EAPOL frames might be filtered during the + initial handshake, causing delays and assoc failures. + + Signed-off-by: Felix Fietkau + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/xmit.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/xmit.c 2014-04-27 23:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/xmit.c 2014-04-28 00:35:32.000000000 +0000 +@@ -2387,6 +2387,7 @@ + for (acno = 0, ac = &an->ac[acno]; + acno < IEEE80211_NUM_ACS; acno++, ac++) { + ac->sched = false; ++ ac->clear_ps_filter = true; + ac->txq = sc->tx.txq_map[acno]; + INIT_LIST_HEAD(&ac->tid_q); + } +Index: linux-3.10-3.10.11/dummy/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1105_31f34c79a7e8fb75c7bf7d61d56fc8eeff2a7886.txt 2014-04-28 00:35:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.patch 2014-04-28 00:35:34.000000000 +0000 @@ -0,0 +1,111 @@ +commit 8e4d4c932d23091953185297d40315e8ba76837f +Author: Felix Fietkau +Date: Sat Aug 10 15:59:15 2013 +0200 + + ath9k: fix rx descriptor related race condition + + commit e96542e55a2aacf4bdeccfe2f17b77c4895b4df2 upstream. + + Similar to a race condition that exists in the tx path, the hardware + might re-read the 'next' pointer of a descriptor of the last completed + frame. This only affects non-EDMA (pre-AR93xx) devices. + + To deal with this race, defer clearing and re-linking a completed rx + descriptor until the next one has been processed. + + Signed-off-by: Felix Fietkau + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/ath9k.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/ath9k.h 2014-04-27 23:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/ath9k.h 2014-04-28 00:35:33.000000000 +0000 +@@ -79,10 +79,6 @@ + sizeof(struct ath_buf_state)); \ + } while (0) + +-#define ATH_RXBUF_RESET(_bf) do { \ +- (_bf)->bf_stale = false; \ +- } while (0) +- + /** + * enum buffer_type - Buffer type flags + * +@@ -316,6 +312,7 @@ + struct ath_descdma rxdma; + struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX]; + ++ struct ath_buf *buf_hold; + struct sk_buff *frag; + + u32 ampdu_ref; +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/recv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/recv.c 2014-04-27 23:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/recv.c 2014-04-28 00:35:33.000000000 +0000 +@@ -42,8 +42,6 @@ + struct ath_desc *ds; + struct sk_buff *skb; + +- ATH_RXBUF_RESET(bf); +- + ds = bf->bf_desc; + ds->ds_link = 0; /* link to null */ + ds->ds_data = bf->bf_buf_addr; +@@ -70,6 +68,14 @@ + sc->rx.rxlink = &ds->ds_link; + } + ++static void ath_rx_buf_relink(struct ath_softc *sc, struct ath_buf *bf) ++{ ++ if (sc->rx.buf_hold) ++ ath_rx_buf_link(sc, sc->rx.buf_hold); ++ ++ sc->rx.buf_hold = bf; ++} ++ + static void ath_setdefantenna(struct ath_softc *sc, u32 antenna) + { + /* XXX block beacon interrupts */ +@@ -117,7 +123,6 @@ + + skb = bf->bf_mpdu; + +- ATH_RXBUF_RESET(bf); + memset(skb->data, 0, ah->caps.rx_status_len); + dma_sync_single_for_device(sc->dev, bf->bf_buf_addr, + ah->caps.rx_status_len, DMA_TO_DEVICE); +@@ -432,6 +437,7 @@ + if (list_empty(&sc->rx.rxbuf)) + goto start_recv; + ++ sc->rx.buf_hold = NULL; + sc->rx.rxlink = NULL; + list_for_each_entry_safe(bf, tbf, &sc->rx.rxbuf, list) { + ath_rx_buf_link(sc, bf); +@@ -677,6 +683,9 @@ + } + + bf = list_first_entry(&sc->rx.rxbuf, struct ath_buf, list); ++ if (bf == sc->rx.buf_hold) ++ return NULL; ++ + ds = bf->bf_desc; + + /* +@@ -1378,7 +1387,7 @@ + if (edma) { + ath_rx_edma_buf_link(sc, qtype); + } else { +- ath_rx_buf_link(sc, bf); ++ ath_rx_buf_relink(sc, bf); + ath9k_hw_rxena(ah); + } + } while (1); +Index: linux-3.10-3.10.11/dummy/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1106_8e4d4c932d23091953185297d40315e8ba76837f.txt 2014-04-28 00:35:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.patch 2014-04-28 00:35:34.000000000 +0000 @@ -0,0 +1,35 @@ +commit 4bd13a76d67743f11e4f05c60340a333f54bb92b +Author: Felix Fietkau +Date: Tue Aug 13 12:33:28 2013 +0200 + + ath9k: avoid accessing MRC registers on single-chain devices + + commit a1c781bb20ac1e03280e420abd47a99eb8bbdd3b upstream. + + They are not implemented, and accessing them might trigger errors + + Signed-off-by: Felix Fietkau + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/ar9003_phy.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/ar9003_phy.c 2014-04-27 23:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/ar9003_phy.c 2014-04-28 00:35:34.000000000 +0000 +@@ -1076,6 +1076,10 @@ + * is_on == 0 means MRC CCK is OFF (more noise imm) + */ + bool is_on = param ? 1 : 0; ++ ++ if (ah->caps.rx_chainmask == 1) ++ break; ++ + REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL, + AR_PHY_MRC_CCK_ENABLE, is_on); + REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL, +Index: linux-3.10-3.10.11/dummy/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1107_4bd13a76d67743f11e4f05c60340a333f54bb92b.txt 2014-04-28 00:35:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.patch 2014-04-28 00:35:35.000000000 +0000 @@ -0,0 +1,61 @@ +commit 32a190b73789d7d26846ca52d4d7eaacbf9ad6b7 +Author: Henrik Rydberg +Date: Sun Sep 1 15:31:44 2013 +0200 + + HID: Correct the USB IDs for the new Macbook Air 6 + + commit 8c89cc17b91992845bd635813cd162fe8dfcec6e upstream. + + A recent patch (9d9a04ee) added support for the new machine, but got + the sequence of USB ids wrong. Reports from both Ian and Linus T show + that the 0x0291 id is for ISO, not ANSI, which should have the missing + number 0x0290. This patchs moves the three numbers accordingly, fixing + the problem. + + Reported-and-tested-by: Ian Munsie + Tested-by: Linus G Thiel + Signed-off-by: Henrik Rydberg + Acked-by: Dmitry Torokhov + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-ids.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-ids.h 2014-04-27 23:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-ids.h 2014-04-28 00:35:35.000000000 +0000 +@@ -135,9 +135,9 @@ + #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS 0x023b + #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ANSI 0x0255 + #define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2011_ISO 0x0256 +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0291 +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0292 +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0293 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0290 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0291 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0292 + #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY 0x030a + #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY 0x030b + #define USB_DEVICE_ID_APPLE_IRCONTROL 0x8240 +Index: linux-3.10-3.10.11/drivers/input/mouse/bcm5974.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/input/mouse/bcm5974.c 2014-04-27 23:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/input/mouse/bcm5974.c 2014-04-28 00:35:35.000000000 +0000 +@@ -89,9 +89,9 @@ + #define USB_DEVICE_ID_APPLE_WELLSPRING7A_ISO 0x025a + #define USB_DEVICE_ID_APPLE_WELLSPRING7A_JIS 0x025b + /* MacbookAir6,2 (unibody, June 2013) */ +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0291 +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0292 +-#define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0293 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_ANSI 0x0290 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_ISO 0x0291 ++#define USB_DEVICE_ID_APPLE_WELLSPRING8_JIS 0x0292 + + #define BCM5974_DEVICE(prod) { \ + .match_flags = (USB_DEVICE_ID_MATCH_DEVICE | \ +Index: linux-3.10-3.10.11/dummy/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1108_32a190b73789d7d26846ca52d4d7eaacbf9ad6b7.txt 2014-04-28 00:35:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.patch --- linux-3.10.11/debian/patches/rpi/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.patch 2014-04-28 00:35:36.000000000 +0000 @@ -0,0 +1,49 @@ +commit 769eea247c41519e72675c72d0da8d95fd6b7c09 +Author: Kees Cook +Date: Wed Aug 28 22:30:49 2013 +0200 + + HID: pantherlord: validate output report details + + commit 412f30105ec6735224535791eed5cdc02888ecb4 upstream. + + A HID device could send a malicious output report that would cause the + pantherlord HID driver to write beyond the output report allocation + during initialization, causing a heap overflow: + + [ 310.939483] usb 1-1: New USB device found, idVendor=0e8f, idProduct=0003 + ... + [ 315.980774] BUG kmalloc-192 (Tainted: G W ): Redzone overwritten + + CVE-2013-2892 + + Signed-off-by: Kees Cook + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-pl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-pl.c 2014-04-27 23:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-pl.c 2014-04-28 00:35:35.000000000 +0000 +@@ -132,8 +132,14 @@ + strong = &report->field[0]->value[2]; + weak = &report->field[0]->value[3]; + debug("detected single-field device"); +- } else if (report->maxfield >= 4 && report->field[0]->maxusage == 1 && +- report->field[0]->usage[0].hid == (HID_UP_LED | 0x43)) { ++ } else if (report->field[0]->maxusage == 1 && ++ report->field[0]->usage[0].hid == ++ (HID_UP_LED | 0x43) && ++ report->maxfield >= 4 && ++ report->field[0]->report_count >= 1 && ++ report->field[1]->report_count >= 1 && ++ report->field[2]->report_count >= 1 && ++ report->field[3]->report_count >= 1) { + report->field[0]->value[0] = 0x00; + report->field[1]->value[0] = 0x00; + strong = &report->field[2]->value[0]; +Index: linux-3.10-3.10.11/dummy/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1109_769eea247c41519e72675c72d0da8d95fd6b7c09.txt 2014-04-28 00:35:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.patch --- linux-3.10.11/debian/patches/rpi/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.patch 2014-04-28 00:35:37.000000000 +0000 @@ -0,0 +1,55 @@ +commit 469e7f80f25f79a4c11bed47027da81fcf30d045 +Author: Stefan Kriwanek +Date: Sun Aug 25 10:46:13 2013 +0200 + + HID: Fix Speedlink VAD Cezanne support for some devices + + commit 06bb5219118fb098f4b0c7dcb484b28a52bf1c14 upstream. + + Some devices of the "Speedlink VAD Cezanne" model need more aggressive fixing + than already done. + + I made sure through testing that this patch would not interfere with the proper + working of a device that is bug-free. (The driver drops EV_REL events with + abs(val) >= 256, which are not achievable even on the highest laser resolution + hardware setting.) + + Signed-off-by: Stefan Kriwanek + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-speedlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-speedlink.c 2014-04-27 23:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-speedlink.c 2014-04-28 00:35:36.000000000 +0000 +@@ -3,7 +3,7 @@ + * Fixes "jumpy" cursor and removes nonexistent keyboard LEDS from + * the HID descriptor. + * +- * Copyright (c) 2011 Stefan Kriwanek ++ * Copyright (c) 2011, 2013 Stefan Kriwanek + */ + + /* +@@ -46,8 +46,13 @@ + struct hid_usage *usage, __s32 value) + { + /* No other conditions due to usage_table. */ +- /* Fix "jumpy" cursor (invalid events sent by device). */ +- if (value == 256) ++ ++ /* This fixes the "jumpy" cursor occuring due to invalid events sent ++ * by the device. Some devices only send them with value==+256, others ++ * don't. However, catching abs(value)>=256 is restrictive enough not ++ * to interfere with devices that were bug-free (has been tested). ++ */ ++ if (abs(value) >= 256) + return 1; + /* Drop useless distance 0 events (on button clicks etc.) as well */ + if (value == 0) +Index: linux-3.10-3.10.11/dummy/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1110_469e7f80f25f79a4c11bed47027da81fcf30d045.txt 2014-04-28 00:35:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.patch 2014-04-28 00:35:38.000000000 +0000 @@ -0,0 +1,39 @@ +commit a3957df756ccf3a46c24c8e2d4f8b26c932357b3 +Author: Kees Cook +Date: Wed Aug 28 22:31:44 2013 +0200 + + HID: sensor-hub: validate feature report details + + commit 9e8910257397372633e74b333ef891f20c800ee4 upstream. + + A HID device could send a malicious feature report that would cause the + sensor-hub HID driver to read past the end of heap allocation, leaking + kernel memory contents to the caller. + + CVE-2013-2898 + + Signed-off-by: Kees Cook + Reviewed-by: Mika Westerberg + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-sensor-hub.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-sensor-hub.c 2014-04-27 23:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-sensor-hub.c 2014-04-28 00:35:37.000000000 +0000 +@@ -221,7 +221,8 @@ + + mutex_lock(&data->mutex); + report = sensor_hub_report(report_id, hsdev->hdev, HID_FEATURE_REPORT); +- if (!report || (field_index >= report->maxfield)) { ++ if (!report || (field_index >= report->maxfield) || ++ report->field[field_index]->report_count < 1) { + ret = -EINVAL; + goto done_proc; + } +Index: linux-3.10-3.10.11/dummy/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1111_a3957df756ccf3a46c24c8e2d4f8b26c932357b3.txt 2014-04-28 00:35:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.patch --- linux-3.10.11/debian/patches/rpi/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.patch 2014-04-28 00:35:39.000000000 +0000 @@ -0,0 +1,81 @@ +commit 56085cec9ef90f5133effbcf71149d19ea2f5170 +Author: Kees Cook +Date: Wed Aug 28 22:29:55 2013 +0200 + + HID: validate HID report id size + + commit 43622021d2e2b82ea03d883926605bdd0525e1d1 upstream. + + The "Report ID" field of a HID report is used to build indexes of + reports. The kernel's index of these is limited to 256 entries, so any + malicious device that sets a Report ID greater than 255 will trigger + memory corruption on the host: + + [ 1347.156239] BUG: unable to handle kernel paging request at ffff88094958a878 + [ 1347.156261] IP: [] hid_register_report+0x2a/0x8b + + CVE-2013-2888 + + Signed-off-by: Kees Cook + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-27 23:39:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:35:38.000000000 +0000 +@@ -63,6 +63,8 @@ + struct hid_report_enum *report_enum = device->report_enum + type; + struct hid_report *report; + ++ if (id >= HID_MAX_IDS) ++ return NULL; + if (report_enum->report_id_hash[id]) + return report_enum->report_id_hash[id]; + +@@ -404,8 +406,10 @@ + + case HID_GLOBAL_ITEM_TAG_REPORT_ID: + parser->global.report_id = item_udata(item); +- if (parser->global.report_id == 0) { +- hid_err(parser->device, "report_id 0 is invalid\n"); ++ if (parser->global.report_id == 0 || ++ parser->global.report_id >= HID_MAX_IDS) { ++ hid_err(parser->device, "report_id %u is invalid\n", ++ parser->global.report_id); + return -1; + } + return 0; +@@ -575,7 +579,7 @@ + for (i = 0; i < HID_REPORT_TYPES; i++) { + struct hid_report_enum *report_enum = device->report_enum + i; + +- for (j = 0; j < 256; j++) { ++ for (j = 0; j < HID_MAX_IDS; j++) { + struct hid_report *report = report_enum->report_id_hash[j]; + if (report) + hid_free_report(report); +Index: linux-3.10-3.10.11/include/linux/hid.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/hid.h 2014-04-27 23:39:52.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/hid.h 2014-04-28 00:35:38.000000000 +0000 +@@ -393,10 +393,12 @@ + struct hid_device *device; /* associated device */ + }; + ++#define HID_MAX_IDS 256 ++ + struct hid_report_enum { + unsigned numbered; + struct list_head report_list; +- struct hid_report *report_id_hash[256]; ++ struct hid_report *report_id_hash[HID_MAX_IDS]; + }; + + #define HID_REPORT_TYPES 3 +Index: linux-3.10-3.10.11/dummy/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1112_56085cec9ef90f5133effbcf71149d19ea2f5170.txt 2014-04-28 00:35:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.patch 2014-04-28 00:35:40.000000000 +0000 @@ -0,0 +1,48 @@ +commit 0697d8057661db5032a55dd5b0d115262c883cb4 +Author: Kees Cook +Date: Wed Aug 28 22:31:52 2013 +0200 + + HID: picolcd_core: validate output report details + + commit 1e87a2456b0227ca4ab881e19a11bb99d164e792 upstream. + + A HID device could send a malicious output report that would cause the + picolcd HID driver to trigger a NULL dereference during attr file writing. + + [jkosina@suse.cz: changed + + report->maxfield < 1 + + to + + report->maxfield != 1 + + as suggested by Bruno]. + + CVE-2013-2899 + + Signed-off-by: Kees Cook + Reviewed-by: Bruno Prémont + Acked-by: Bruno Prémont + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-picolcd_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-picolcd_core.c 2014-04-27 23:39:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-picolcd_core.c 2014-04-28 00:35:39.000000000 +0000 +@@ -290,7 +290,7 @@ + buf += 10; + cnt -= 10; + } +- if (!report) ++ if (!report || report->maxfield != 1) + return -EINVAL; + + while (cnt > 0 && (buf[cnt-1] == '\n' || buf[cnt-1] == '\r')) +Index: linux-3.10-3.10.11/dummy/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1113_0697d8057661db5032a55dd5b0d115262c883cb4.txt 2014-04-28 00:35:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.patch 2014-04-28 00:35:41.000000000 +0000 @@ -0,0 +1,43 @@ +commit 7c91362f8c00c6fb75da374c749a024d6d3563fb +Author: Kees Cook +Date: Wed Aug 28 22:31:28 2013 +0200 + + HID: ntrig: validate feature report details + + commit 875b4e3763dbc941f15143dd1a18d10bb0be303b upstream. + + A HID device could send a malicious feature report that would cause the + ntrig HID driver to trigger a NULL dereference during initialization: + + [57383.031190] usb 3-1: New USB device found, idVendor=1b96, idProduct=0001 + ... + [57383.315193] BUG: unable to handle kernel NULL pointer dereference at 0000000000000030 + [57383.315308] IP: [] ntrig_probe+0x25e/0x420 [hid_ntrig] + + CVE-2013-2896 + + Signed-off-by: Kees Cook + Signed-off-by: Rafi Rubin + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-ntrig.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-ntrig.c 2014-04-27 23:39:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-ntrig.c 2014-04-28 00:35:40.000000000 +0000 +@@ -115,7 +115,8 @@ + struct hid_report *report = hdev->report_enum[HID_FEATURE_REPORT]. + report_id_hash[0x0d]; + +- if (!report) ++ if (!report || report->maxfield < 1 || ++ report->field[0]->report_count < 1) + return -EINVAL; + + hid_hw_request(hdev, report, HID_REQ_GET_REPORT); +Index: linux-3.10-3.10.11/dummy/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1114_7c91362f8c00c6fb75da374c749a024d6d3563fb.txt 2014-04-28 00:35:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.patch 2014-04-28 00:35:42.000000000 +0000 @@ -0,0 +1,75 @@ +commit 69f2af2ddcfd0d9984e764bdf0953a8d9248755a +Author: Bruno Prémont +Date: Sat Aug 31 14:07:48 2013 +0200 + + HID: picolcd: Prevent NULL pointer dereference on _remove() + + commit 1cde501bb4655e98fb832194beb88ac73be5a05d upstream. + + When picolcd is switched into bootloader mode (for FW flashing) make + sure not to try to dereference NULL-pointers of feature-devices during + unplug/unbind. + + This fixes following BUG: + BUG: unable to handle kernel NULL pointer dereference at 00000298 + IP: [] picolcd_exit_framebuffer+0x1b/0x80 [hid_picolcd] + *pde = 00000000 + Oops: 0000 [#1] + Modules linked in: hid_picolcd syscopyarea sysfillrect sysimgblt fb_sys_fops + CPU: 0 PID: 15 Comm: khubd Not tainted 3.11.0-rc7-00002-g50d62d4 #2 + EIP: 0060:[] EFLAGS: 00010292 CPU: 0 + EIP is at picolcd_exit_framebuffer+0x1b/0x80 [hid_picolcd] + Call Trace: + [] picolcd_remove+0xcb/0x120 [hid_picolcd] + [] hid_device_remove+0x59/0xc0 + [] __device_release_driver+0x5a/0xb0 + [] device_release_driver+0x1f/0x30 + [] bus_remove_device+0x9d/0xd0 + [] device_del+0xd5/0x150 + [] hid_destroy_device+0x24/0x60 + [] usbhid_disconnect+0x1b/0x40 + ... + + Signed-off-by: Bruno Prémont + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-picolcd_cir.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-picolcd_cir.c 2014-04-27 23:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-picolcd_cir.c 2014-04-28 00:35:41.000000000 +0000 +@@ -145,6 +145,7 @@ + struct rc_dev *rdev = data->rc_dev; + + data->rc_dev = NULL; +- rc_unregister_device(rdev); ++ if (rdev) ++ rc_unregister_device(rdev); + } + +Index: linux-3.10-3.10.11/drivers/hid/hid-picolcd_fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-picolcd_fb.c 2014-04-27 23:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-picolcd_fb.c 2014-04-28 00:35:41.000000000 +0000 +@@ -593,10 +593,14 @@ + void picolcd_exit_framebuffer(struct picolcd_data *data) + { + struct fb_info *info = data->fb_info; +- struct picolcd_fb_data *fbdata = info->par; ++ struct picolcd_fb_data *fbdata; + unsigned long flags; + ++ if (!info) ++ return; ++ + device_remove_file(&data->hdev->dev, &dev_attr_fb_update_rate); ++ fbdata = info->par; + + /* disconnect framebuffer from HID dev */ + spin_lock_irqsave(&fbdata->lock, flags); +Index: linux-3.10-3.10.11/dummy/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1115_69f2af2ddcfd0d9984e764bdf0953a8d9248755a.txt 2014-04-28 00:35:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.patch 2014-04-28 00:35:42.000000000 +0000 @@ -0,0 +1,65 @@ +commit 65a839f4b7fd73d2a84c2d404c94a162751e8edb +Author: Jiri Kosina +Date: Mon Sep 2 13:43:00 2013 +0200 + + HID: battery: don't do DMA from stack + + commit 6c2794a2984f4c17a58117a68703cc7640f01c5a upstream. + + Instead of using data from stack for DMA in hidinput_get_battery_property(), + allocate the buffer dynamically. + + Reported-by: Richard Ryniker + Reported-by: Alan Stern + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-input.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-input.c 2014-04-27 23:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-input.c 2014-04-28 00:35:42.000000000 +0000 +@@ -340,7 +340,7 @@ + { + struct hid_device *dev = container_of(psy, struct hid_device, battery); + int ret = 0; +- __u8 buf[2] = {}; ++ __u8 *buf; + + switch (prop) { + case POWER_SUPPLY_PROP_PRESENT: +@@ -349,13 +349,20 @@ + break; + + case POWER_SUPPLY_PROP_CAPACITY: ++ ++ buf = kmalloc(2 * sizeof(__u8), GFP_KERNEL); ++ if (!buf) { ++ ret = -ENOMEM; ++ break; ++ } + ret = dev->hid_get_raw_report(dev, dev->battery_report_id, +- buf, sizeof(buf), ++ buf, 2, + dev->battery_report_type); + + if (ret != 2) { + if (ret >= 0) + ret = -EINVAL; ++ kfree(buf); + break; + } + +@@ -364,6 +371,7 @@ + buf[1] <= dev->battery_max) + val->intval = (100 * (buf[1] - dev->battery_min)) / + (dev->battery_max - dev->battery_min); ++ kfree(buf); + break; + + case POWER_SUPPLY_PROP_MODEL_NAME: +Index: linux-3.10-3.10.11/dummy/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1116_65a839f4b7fd73d2a84c2d404c94a162751e8edb.txt 2014-04-28 00:35:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.patch 2014-04-28 00:35:43.000000000 +0000 @@ -0,0 +1,137 @@ +commit d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b +Author: Manoj Chourasia +Date: Mon Jul 22 15:33:13 2013 +0530 + + HID: hidraw: correctly deallocate memory on device disconnect + + commit 212a871a3934beccf43431608c27ed2e05a476ec upstream. + + This changes puts the commit 4fe9f8e203f back in place + with the fixes for slab corruption because of the commit. + + When a device is unplugged, wait for all processes that + have opened the device to close before deallocating the device. + + This commit was solving kernel crash because of the corruption in + rb tree of vmalloc. The rootcause was the device data pointer was + geting excessed after the memory associated with hidraw was freed. + + The commit 4fe9f8e203f was buggy as it was also freeing the hidraw + first and then calling delete operation on the list associated with + that hidraw leading to slab corruption. + + Signed-off-by: Manoj Chourasia + Tested-by: Peter Wu + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hidraw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hidraw.c 2014-04-27 23:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hidraw.c 2014-04-28 00:35:43.000000000 +0000 +@@ -113,7 +113,7 @@ + __u8 *buf; + int ret = 0; + +- if (!hidraw_table[minor]) { ++ if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { + ret = -ENODEV; + goto out; + } +@@ -261,7 +261,7 @@ + } + + mutex_lock(&minors_lock); +- if (!hidraw_table[minor]) { ++ if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { + err = -ENODEV; + goto out_unlock; + } +@@ -302,39 +302,38 @@ + return fasync_helper(fd, file, on, &list->fasync); + } + ++static void drop_ref(struct hidraw *hidraw, int exists_bit) ++{ ++ if (exists_bit) { ++ hid_hw_close(hidraw->hid); ++ hidraw->exist = 0; ++ if (hidraw->open) ++ wake_up_interruptible(&hidraw->wait); ++ } else { ++ --hidraw->open; ++ } ++ ++ if (!hidraw->open && !hidraw->exist) { ++ device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); ++ hidraw_table[hidraw->minor] = NULL; ++ kfree(hidraw); ++ } ++} ++ + static int hidraw_release(struct inode * inode, struct file * file) + { + unsigned int minor = iminor(inode); +- struct hidraw *dev; + struct hidraw_list *list = file->private_data; +- int ret; +- int i; + + mutex_lock(&minors_lock); +- if (!hidraw_table[minor]) { +- ret = -ENODEV; +- goto unlock; +- } + + list_del(&list->node); +- dev = hidraw_table[minor]; +- if (!--dev->open) { +- if (list->hidraw->exist) { +- hid_hw_power(dev->hid, PM_HINT_NORMAL); +- hid_hw_close(dev->hid); +- } else { +- kfree(list->hidraw); +- } +- } +- +- for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i) +- kfree(list->buffer[i].value); + kfree(list); +- ret = 0; +-unlock: +- mutex_unlock(&minors_lock); + +- return ret; ++ drop_ref(hidraw_table[minor], 0); ++ ++ mutex_unlock(&minors_lock); ++ return 0; + } + + static long hidraw_ioctl(struct file *file, unsigned int cmd, +@@ -539,18 +538,9 @@ + struct hidraw *hidraw = hid->hidraw; + + mutex_lock(&minors_lock); +- hidraw->exist = 0; +- +- device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); + +- hidraw_table[hidraw->minor] = NULL; ++ drop_ref(hidraw, 1); + +- if (hidraw->open) { +- hid_hw_close(hid); +- wake_up_interruptible(&hidraw->wait); +- } else { +- kfree(hidraw); +- } + mutex_unlock(&minors_lock); + } + EXPORT_SYMBOL_GPL(hidraw_disconnect); +Index: linux-3.10-3.10.11/dummy/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1117_d0de24dd0e200c83382cd3fff8e8c06cb6dcef2b.txt 2014-04-28 00:35:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.patch 2014-04-28 00:35:44.000000000 +0000 @@ -0,0 +1,38 @@ +commit 8bb7aacefb408f829835f3692dd34fab9801d86d +Author: Kees Cook +Date: Wed Aug 28 22:32:01 2013 +0200 + + HID: check for NULL field when setting values + + commit be67b68d52fa28b9b721c47bb42068f0c1214855 upstream. + + Defensively check that the field to be worked on is not NULL. + + Signed-off-by: Kees Cook + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-28 00:35:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:35:43.000000000 +0000 +@@ -1156,7 +1156,12 @@ + + int hid_set_field(struct hid_field *field, unsigned offset, __s32 value) + { +- unsigned size = field->report_size; ++ unsigned size; ++ ++ if (!field) ++ return -1; ++ ++ size = field->report_size; + + hid_dump_input(field->report->device, field->usage + offset, value); + +Index: linux-3.10-3.10.11/dummy/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1118_8bb7aacefb408f829835f3692dd34fab9801d86d.txt 2014-04-28 00:35:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.patch --- linux-3.10.11/debian/patches/rpi/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.patch 2014-04-28 00:35:45.000000000 +0000 @@ -0,0 +1,46 @@ +commit 5f24e1842d5d65d479818b719adb1286d9925840 +Author: Vasily Titskiy +Date: Fri Aug 30 18:25:04 2013 -0400 + + HID: usbhid: quirk for N-Trig DuoSense Touch Screen + + commit 9e0bf92c223dabe0789714f8f85f6e26f8f9cda4 upstream. + + The DuoSense touchscreen device causes a 10 second timeout. This fix + removes the delay. + + Signed-off-by: Vasily Titskiy + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-ids.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-ids.h 2014-04-28 00:35:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-ids.h 2014-04-28 00:35:44.000000000 +0000 +@@ -646,6 +646,7 @@ + #define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16 0x0012 + #define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17 0x0013 + #define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18 0x0014 ++#define USB_DEVICE_ID_NTRIG_DUOSENSE 0x1500 + + #define USB_VENDOR_ID_ONTRAK 0x0a07 + #define USB_DEVICE_ID_ONTRAK_ADU100 0x0064 +Index: linux-3.10-3.10.11/drivers/hid/usbhid/hid-quirks.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/usbhid/hid-quirks.c 2014-04-27 23:39:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/usbhid/hid-quirks.c 2014-04-28 00:35:44.000000000 +0000 +@@ -109,6 +109,8 @@ + { USB_VENDOR_ID_SIGMA_MICRO, USB_DEVICE_ID_SIGMA_MICRO_KEYBOARD, HID_QUIRK_NO_INIT_REPORTS }, + { USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_MOUSEPEN_I608X, HID_QUIRK_MULTI_INPUT }, + { USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X, HID_QUIRK_MULTI_INPUT }, ++ { USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_DUOSENSE, HID_QUIRK_NO_INIT_REPORTS }, ++ + { 0, 0 } + }; + +Index: linux-3.10-3.10.11/dummy/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1119_5f24e1842d5d65d479818b719adb1286d9925840.txt 2014-04-28 00:35:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.patch 2014-04-28 00:35:46.000000000 +0000 @@ -0,0 +1,87 @@ +commit 1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c +Author: Arun Kumar K +Date: Fri Jul 26 07:28:01 2013 -0300 + + media: exynos-gsc: Register v4l2 device + + commit d0b1c31349969973204fad21a076aecf131cc5e4 upstream. + + Gscaler video device registration was happening without reference to + a parent v4l2_dev causing probe to fail. The patch creates a parent + v4l2 device and uses it for the gsc m2m video device registration. + This fixes regression introduced with comit commit 1c1d86a1ea07506 + [media] v4l2: always require v4l2_dev, rename parent to dev_parent + + Signed-off-by: Arun Kumar K + Signed-off-by: Sylwester Nawrocki + Signed-off-by: Mauro Carvalho Chehab + Cc: stable@vger.kernel.org + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/exynos-gsc/gsc-core.c 2014-04-27 23:39:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-core.c 2014-04-28 00:35:45.000000000 +0000 +@@ -1122,10 +1122,14 @@ + goto err_clk; + } + +- ret = gsc_register_m2m_device(gsc); ++ ret = v4l2_device_register(dev, &gsc->v4l2_dev); + if (ret) + goto err_clk; + ++ ret = gsc_register_m2m_device(gsc); ++ if (ret) ++ goto err_v4l2; ++ + platform_set_drvdata(pdev, gsc); + pm_runtime_enable(dev); + ret = pm_runtime_get_sync(&pdev->dev); +@@ -1147,6 +1151,8 @@ + pm_runtime_put(dev); + err_m2m: + gsc_unregister_m2m_device(gsc); ++err_v4l2: ++ v4l2_device_unregister(&gsc->v4l2_dev); + err_clk: + gsc_clk_put(gsc); + return ret; +@@ -1157,6 +1163,7 @@ + struct gsc_dev *gsc = platform_get_drvdata(pdev); + + gsc_unregister_m2m_device(gsc); ++ v4l2_device_unregister(&gsc->v4l2_dev); + + vb2_dma_contig_cleanup_ctx(gsc->alloc_ctx); + pm_runtime_disable(&pdev->dev); +Index: linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-core.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/exynos-gsc/gsc-core.h 2014-04-27 23:39:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-core.h 2014-04-28 00:35:45.000000000 +0000 +@@ -343,6 +343,7 @@ + unsigned long state; + struct vb2_alloc_ctx *alloc_ctx; + struct video_device vdev; ++ struct v4l2_device v4l2_dev; + }; + + /** +Index: linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-m2m.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/exynos-gsc/gsc-m2m.c 2014-04-27 23:39:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/exynos-gsc/gsc-m2m.c 2014-04-28 00:35:45.000000000 +0000 +@@ -751,6 +751,7 @@ + gsc->vdev.release = video_device_release_empty; + gsc->vdev.lock = &gsc->lock; + gsc->vdev.vfl_dir = VFL_DIR_M2M; ++ gsc->vdev.v4l2_dev = &gsc->v4l2_dev; + snprintf(gsc->vdev.name, sizeof(gsc->vdev.name), "%s.%d:m2m", + GSC_MODULE_NAME, gsc->id); + +Index: linux-3.10-3.10.11/dummy/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1120_1d9d780fcd8df7c70312fdfe43ecc802b99b2e5c.txt 2014-04-28 00:35:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.patch 2014-04-28 00:35:47.000000000 +0000 @@ -0,0 +1,73 @@ +commit cb6ecb39fe845251412e34e1d10bb6f4a3652f2f +Author: Sylwester Nawrocki +Date: Mon Jul 29 06:53:59 2013 -0300 + + media: exynos4-is: Fix entity unregistration on error path + + commit d2b903b4427e417a73863cef36ad0796ea6b7404 upstream. + + This patch corrects media entities unregistration order to make sure + the fimc.N.capture and fimc-lite video nodes are unregistered with + fimc->lock mutex held. This prevents races between video device open() + and defered probing and NULL pointer dereference in open() callback + as follows: + [ 77.645000] Unable to handle kernel NULL pointer dereference at virtual address 00000290t + [ 77.655000] pgd = ee7a8000 + [ 77.660000] [00000290] *pgd=6e13c831, *pte=00000000, *ppte=00000000 + [ 77.665000] Internal error: Oops: 17 [#1] PREEMPT SMP ARM + [ 77.670000] Modules linked in: s5p_fimc ipv6 exynos_fimc_is exynos_fimc_lite + s5p_csis v4l2_mem2mem videobuf2_dma_contig videobuf2_memops exynos4_is_common videobuf2_core [last unloaded: s5p_fimc] + [ 77.685000] CPU: 0 PID : 2998 Comm: v4l_id Tainted: G W 3.10.0-next-20130709-00039-g39f491b-dirty #1548 + [ 77.695000] task: ee084000 ti: ee46e000 task.ti: ee46e000 + [ 77.700000] PC is at __mutex_lock_slowpath+0x54/0x368 + [ 77.705000] LR is at __mutex_lock_slowpath+0x24/0x368 + [ 77.710000] pc : [] lr : [] psr: 60000093 + [ 77.710000] sp : ee46fd70 ip : 000008c8 fp : c054e34c + [ 77.725000] r10: ee084000 r9 : 00000000 r8 : ee439480 + [ 77.730000] r7 : ee46e000 r6 : 60000013 r5 : 00000290 r4 : 0000028c + [ 77.735000] r3 : 00000000 r2 : 00000000 r1 : 20000093 r0 : 00000001 + [ 77.740000] Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment user + [ 77.750000] Control: 10c5387d Table: 6e7a804a DAC: 00000015 + [ 77.755000] Process v4l_id (pid: 2998, stack limit = 0xee46e238) + [ 77.760000] Stack: (0xee46fd70 to 0xee470000) + ... + [ 77.935000] [] (__mutex_lock_slowpath+0x54/0x368) from [] (mutex_lock+0xc/0x24) + [ 77.945000] [] (mutex_lock+0xc/0x24) from [] (fimc_lite_open+0x12c/0x2bc [exynos_fimc_lite]) + [ 77.955000] [] (fimc_lite_open+0x12c/0x2bc [exynos_fimc_lite]) from [] (v4l2_open+0xa0/0xe0) + [ 77.965000] [] (v4l2_open+0xa0/0xe0) from [] (chrdev_open+0x88/0x170) + [ 77.975000] [] (chrdev_open+0x88/0x170) from [] (do_dentry_open.isra.14+0x1d8/0x258) + [ 77.985000] [] (do_dentry_open.isra.14+0x1d8/0x258) from [] (finish_open+0x20/0x38) + [ 77.995000] [] (finish_open+0x20/0x38) from [] (do_last.isra.43+0x538/0xb1c) + [ 78.000000] [] (do_last.isra.43+0x538/0xb1c) from [] (path_openat+0xb4/0x5c4) + [ 78.010000] [] (path_openat+0xb4/0x5c4) from [] (do_filp_open+0x2c/0x80) + [ 78.020000] [] (do_filp_open+0x2c/0x80) from [] (do_sys_open+0xf4/0x1a8) + [ 78.025000] [] (do_sys_open+0xf4/0x1a8) from [] (ret_fast_syscall+0x0/0x30) + [ 78.035000] Code: 1a000093 e10f6000 f10c0080 e2845004 (e1953f9f) + + Reported-by: Andrzej Hajda + Signed-off-by: Sylwester Nawrocki + Signed-off-by: Kyungmin Park + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/platform/exynos4-is/media-dev.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/exynos4-is/media-dev.c 2014-04-27 23:39:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/exynos4-is/media-dev.c 2014-04-28 00:35:46.000000000 +0000 +@@ -1441,9 +1441,9 @@ + err_unlock: + mutex_unlock(&fmd->media_dev.graph_mutex); + err_clk: +- media_device_unregister(&fmd->media_dev); + fimc_md_put_clocks(fmd); + fimc_md_unregister_entities(fmd); ++ media_device_unregister(&fmd->media_dev); + err_md: + v4l2_device_unregister(&fmd->v4l2_dev); + return ret; +Index: linux-3.10-3.10.11/dummy/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1121_cb6ecb39fe845251412e34e1d10bb6f4a3652f2f.txt 2014-04-28 00:35:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.patch 2014-04-28 00:35:48.000000000 +0000 @@ -0,0 +1,61 @@ +commit 469641b2b568a9295396ff723573bdeaf2c4293e +Author: Sachin Kamat +Date: Mon Jul 15 02:36:23 2013 -0300 + + media: s5p-g2d: Fix registration failure + + commit 8a09a4cc9bd9389dc6a3b5b2dd3a7d64d2fab7e1 upstream. + + Commit 1c1d86a1ea ("[media] v4l2: always require v4l2_dev, + rename parent to dev_parent") expects v4l2_dev to be always set. + It converted most of the drivers using the parent field of video_device + to v4l2_dev field. G2D driver did not set the parent field. Hence it got + left out. Without this patch we get the following boot warning and G2D + driver fails to register the video device. + WARNING: CPU: 0 PID: 1 at drivers/media/v4l2-core/v4l2-dev.c:775 __video_register_device+0xfc0/0x1028() + Modules linked in: + CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.11.0-rc1-00001-g1c3e372-dirty #9 + [] (unwind_backtrace+0x0/0xf4) from [] (show_stack+0x10/0x14) + [] (show_stack+0x10/0x14) from [] (dump_stack+0x7c/0xb0) + [] (dump_stack+0x7c/0xb0) from [] (warn_slowpath_common+0x6c/0x88) + [] (warn_slowpath_common+0x6c/0x88) from [] (warn_slowpath_null+0x1c/0x24) + [] (warn_slowpath_null+0x1c/0x24) from [] (__video_register_device+0xfc0/0x1028) + [] (__video_register_device+0xfc0/0x1028) from [] (g2d_probe+0x1f8/0x398) + [] (g2d_probe+0x1f8/0x398) from [] (platform_drv_probe+0x14/0x18) + [] (platform_drv_probe+0x14/0x18) from [] (driver_probe_device+0x108/0x220) + [] (driver_probe_device+0x108/0x220) from [] (__driver_attach+0x8c/0x90) + [] (__driver_attach+0x8c/0x90) from [] (bus_for_each_dev+0x60/0x94) + [] (bus_for_each_dev+0x60/0x94) from [] (bus_add_driver+0x1c0/0x24c) + [] (bus_add_driver+0x1c0/0x24c) from [] (driver_register+0x78/0x140) + [] (driver_register+0x78/0x140) from [] (do_one_initcall+0xf8/0x144) + [] (do_one_initcall+0xf8/0x144) from [] (kernel_init_freeable+0x13c/0x1d8) + [] (kernel_init_freeable+0x13c/0x1d8) from [] (kernel_init+0xc/0x160) + [] (kernel_init+0xc/0x160) from [] (ret_from_fork+0x14/0x3c) + ---[ end trace 4e0ec028b0028e02 ]--- + s5p-g2d 12800000.g2d: Failed to register video device + s5p-g2d: probe of 12800000.g2d failed with error -22 + + Signed-off-by: Sachin Kamat + Cc: Hans Verkuil + Signed-off-by: Kamil Debski + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/platform/s5p-g2d/g2d.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/s5p-g2d/g2d.c 2014-04-27 23:39:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/s5p-g2d/g2d.c 2014-04-28 00:35:47.000000000 +0000 +@@ -784,6 +784,7 @@ + } + *vfd = g2d_videodev; + vfd->lock = &dev->mutex; ++ vfd->v4l2_dev = &dev->v4l2_dev; + ret = video_register_device(vfd, VFL_TYPE_GRABBER, 0); + if (ret) { + v4l2_err(&dev->v4l2_dev, "Failed to register video device\n"); +Index: linux-3.10-3.10.11/dummy/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1122_469641b2b568a9295396ff723573bdeaf2c4293e.txt 2014-04-28 00:35:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.patch 2014-04-28 00:35:48.000000000 +0000 @@ -0,0 +1,40 @@ +commit bd7dcb5af0f8771fbcf2fd999545281ec7561d3e +Author: Andrzej Hajda +Date: Fri Jun 28 05:34:20 2013 -0300 + + media: DocBook: upgrade media_api DocBook version to 4.2 + + commit 8bfd4a68ecc003c1a142f35551be846d6b13e822 upstream. + + Fixes the last three errors of media_api DocBook validatation: + (...) + media_api.xml:414: element imagedata: validity error : Value "SVG" for attribute format of imagedata is not among the enumerated set + media_api.xml:432: element imagedata: validity error : Value "SVG" for attribute format of imagedata is not among the enumerated set + media_api.xml:452: element imagedata: validity error : Value "SVG" for attribute format of imagedata is not among the enumerated set + (...) + + Signed-off-by: Andrzej Hajda + Signed-off-by: Kyungmin Park + Signed-off-by: Hans Verkuil + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/Documentation/DocBook/media_api.tmpl +=================================================================== +--- linux-3.10-3.10.11.orig/Documentation/DocBook/media_api.tmpl 2014-04-27 23:39:49.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/DocBook/media_api.tmpl 2014-04-28 00:35:48.000000000 +0000 +@@ -1,6 +1,6 @@ + +- %media-entities; + + +Index: linux-3.10-3.10.11/dummy/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1123_bd7dcb5af0f8771fbcf2fd999545281ec7561d3e.txt 2014-04-28 00:35:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.patch --- linux-3.10.11/debian/patches/rpi/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.patch 2014-04-28 00:35:49.000000000 +0000 @@ -0,0 +1,62 @@ +commit ed6db5dcac3698346227a49afb2635dfcb784057 +Author: Alexey Khoroshilov +Date: Wed Jul 3 16:17:34 2013 -0300 + + media: hdpvr: fix iteration over uninitialized lists in hdpvr_probe() + + commit 2e923a0527ac439e135b9961e58d3acd876bba10 upstream. + + free_buff_list and rec_buff_list are initialized in the middle of hdpvr_probe(), + but if something bad happens before that, error handling code calls hdpvr_delete(), + which contains iteration over the lists (via hdpvr_free_buffers()). + The patch moves the lists initialization to the beginning and by the way fixes + goto label in error handling of registering videodev. + Found by Linux Driver Verification project (linuxtesting.org). + + Signed-off-by: Alexey Khoroshilov + Signed-off-by: Hans Verkuil + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/usb/hdpvr/hdpvr-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/hdpvr/hdpvr-core.c 2014-04-27 23:39:48.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/hdpvr/hdpvr-core.c 2014-04-28 00:35:49.000000000 +0000 +@@ -311,6 +311,11 @@ + + dev->workqueue = 0; + ++ /* init video transfer queues first of all */ ++ /* to prevent oops in hdpvr_delete() on error paths */ ++ INIT_LIST_HEAD(&dev->free_buff_list); ++ INIT_LIST_HEAD(&dev->rec_buff_list); ++ + /* register v4l2_device early so it can be used for printks */ + if (v4l2_device_register(&interface->dev, &dev->v4l2_dev)) { + dev_err(&interface->dev, "v4l2_device_register failed\n"); +@@ -333,10 +338,6 @@ + if (!dev->workqueue) + goto error; + +- /* init video transfer queues */ +- INIT_LIST_HEAD(&dev->free_buff_list); +- INIT_LIST_HEAD(&dev->rec_buff_list); +- + dev->options = hdpvr_default_options; + + if (default_video_input < HDPVR_VIDEO_INPUTS) +@@ -413,7 +414,7 @@ + video_nr[atomic_inc_return(&dev_nr)]); + if (retval < 0) { + v4l2_err(&dev->v4l2_dev, "registering videodev failed\n"); +- goto error; ++ goto reg_fail; + } + + /* let the user know what node this device is now attached to */ +Index: linux-3.10-3.10.11/dummy/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1124_ed6db5dcac3698346227a49afb2635dfcb784057.txt 2014-04-28 00:35:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.patch 2014-04-28 00:35:50.000000000 +0000 @@ -0,0 +1,41 @@ +commit cd08ebc07c7cb27785b94a09e4b441e021ce302f +Author: Andrzej Hajda +Date: Fri Jun 28 05:44:22 2013 -0300 + + media: v4l2: added missing mutex.h include to v4l2-ctrls.h + + commit a19dec6ea94c036af68c31930c1c92681f55af41 upstream. + + This patch fixes following error: + include/media/v4l2-ctrls.h:193:15: error: field ‘_lock’ has incomplete type + include/media/v4l2-ctrls.h: In function ‘v4l2_ctrl_lock’: + include/media/v4l2-ctrls.h:570:2: error: implicit declaration of + function ‘mutex_lock’ [-Werror=implicit-function-declaration] + include/media/v4l2-ctrls.h: In function ‘v4l2_ctrl_unlock’: + include/media/v4l2-ctrls.h:579:2: error: implicit declaration of + function ‘mutex_unlock’ [-Werror=implicit-function-declaration] + + Signed-off-by: Andrzej Hajda + Signed-off-by: Kyungmin Park + Signed-off-by: Hans Verkuil + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/media/v4l2-ctrls.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/media/v4l2-ctrls.h 2014-04-27 23:39:48.000000000 +0000 ++++ linux-3.10-3.10.11/include/media/v4l2-ctrls.h 2014-04-28 00:35:50.000000000 +0000 +@@ -22,6 +22,7 @@ + #define _V4L2_CTRLS_H + + #include ++#include + #include + + /* forward references */ +Index: linux-3.10-3.10.11/dummy/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1125_cd08ebc07c7cb27785b94a09e4b441e021ce302f.txt 2014-04-28 00:35:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.patch --- linux-3.10.11/debian/patches/rpi/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.patch 2014-04-28 00:35:51.000000000 +0000 @@ -0,0 +1,35 @@ +commit 4ff5ef250fb348707bad956e6eef7f84f1021675 +Author: Alexander Shiyan +Date: Sat Jun 15 08:09:57 2013 -0300 + + media: media: coda: Fix DT driver data pointer for i.MX27 + + commit 7b0dd9e60e714951b5400dd0740b3c4c3c3cb76f upstream. + + The data pointer should point to DT data, and not to the ID + array. + + Signed-off-by: Alexander Shiyan + Signed-off-by: Kamil Debski + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/platform/coda.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/platform/coda.c 2014-04-27 23:39:48.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/platform/coda.c 2014-04-28 00:35:50.000000000 +0000 +@@ -1933,7 +1933,7 @@ + + #ifdef CONFIG_OF + static const struct of_device_id coda_dt_ids[] = { +- { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] }, ++ { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] }, + { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] }, + { /* sentinel */ } + }; +Index: linux-3.10-3.10.11/dummy/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1126_4ff5ef250fb348707bad956e6eef7f84f1021675.txt 2014-04-28 00:35:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.patch 2014-04-28 00:35:52.000000000 +0000 @@ -0,0 +1,57 @@ +commit b3fcd91b96de3082d24636478a145bb50947c9eb +Author: Mauro Carvalho Chehab +Date: Fri Aug 9 08:53:26 2013 -0300 + + media: mb86a20s: Fix TS parallel mode + + commit 9d32069faacdc81fe1dcb5d297c32a3ac81da8f0 upstream. + + changeset 768e6dadd74 caused a regression on using mb86a20s + in parallel mode, as the parallel mode selection got + overriden by mb86a20s_init2. + + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/dvb-frontends/mb86a20s.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/dvb-frontends/mb86a20s.c 2014-04-27 23:39:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/dvb-frontends/mb86a20s.c 2014-04-28 00:35:51.000000000 +0000 +@@ -157,7 +157,6 @@ + { 0x45, 0x04 }, /* CN symbol 4 */ + { 0x48, 0x04 }, /* CN manual mode */ + +- { 0x50, 0xd5 }, { 0x51, 0x01 }, /* Serial */ + { 0x50, 0xd6 }, { 0x51, 0x1f }, + { 0x50, 0xd2 }, { 0x51, 0x03 }, + { 0x50, 0xd7 }, { 0x51, 0xbf }, +@@ -1860,16 +1859,15 @@ + dev_dbg(&state->i2c->dev, "%s: IF=%d, IF reg=0x%06llx\n", + __func__, state->if_freq, (long long)pll); + +- if (!state->config->is_serial) { ++ if (!state->config->is_serial) + regD5 &= ~1; + +- rc = mb86a20s_writereg(state, 0x50, 0xd5); +- if (rc < 0) +- goto err; +- rc = mb86a20s_writereg(state, 0x51, regD5); +- if (rc < 0) +- goto err; +- } ++ rc = mb86a20s_writereg(state, 0x50, 0xd5); ++ if (rc < 0) ++ goto err; ++ rc = mb86a20s_writereg(state, 0x51, regD5); ++ if (rc < 0) ++ goto err; + + rc = mb86a20s_writeregdata(state, mb86a20s_init2); + if (rc < 0) +Index: linux-3.10-3.10.11/dummy/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1127_b3fcd91b96de3082d24636478a145bb50947c9eb.txt 2014-04-28 00:35:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.patch --- linux-3.10.11/debian/patches/rpi/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.patch 2014-04-28 00:35:53.000000000 +0000 @@ -0,0 +1,101 @@ +commit d2310f7119ba394d3256c221886c048189dcfb91 +Author: Bjørn Mork +Date: Wed Aug 14 05:24:39 2013 -0300 + + media: siano: fix divide error on 0 counters + + commit ec532503209053bbee0c7dac410031e50835e01a upstream. + + GIT_AUTHOR_DATE=1376465691 + I took a quick look at the code and wonder if the problem is caused by + an initial zero statistics message? This is all just a wild guess, but + if it is correct, then the attached untested patch might fix it... + Bjørn + >From d78a0599d5b5d4da384eae08bf7da316389dfbe5 Mon Sep 17 00:00:00 2001 + ts_packets and ets_packets counters can be 0. Don't fall over + if they are. Fixes: + [ 846.851711] divide error: 0000 [#1] SMP + [ 846.851806] Modules linked in: smsdvb dvb_core ir_lirc_codec lirc_dev ir_sanyo_decoder ir_mce_kbd_decoder ir_sony_decoder ir_jvc_decoder ir_rc6_decoder ir_rc5_decoder ir_nec_decoder rc_hauppauge smsusb smsmdtv rc_core pci_stub vboxpci(O) vboxnetadp(O) vboxnetflt(O) vboxdrv(O) parport_pc ppdev lp parport cpufreq_userspace cpufreq_powersave cpufreq_stats cpufreq_conservative rfcomm bnep binfmt_misc uinput nfsd auth_rpcgss oid_registry nfs_acl nfs lockd dns_resolver fscache sunrpc ext4 jbd2 fuse tp_smapi(O) thinkpad_ec(O) loop firewire_sbp2 dm_crypt snd_hda_codec_conexant snd_hda_intel snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm thinkpad_acpi nvram snd_page_alloc hid_generic snd_seq_midi snd_seq_midi_event arc4 usbhid snd_rawmidi uvcvideo hid iwldvm coretemp kvm_intel mac8021 + 1 cdc_wdm + [ 846.853477] cdc_acm snd_seq videobuf2_vmalloc videobuf2_memops videobuf2_core videodev media kvm radeon r852 ttm joydev cdc_ether usbnet pcmcia mii sm_common nand btusb drm_kms_helper tpm_tis acpi_cpufreq bluetooth iwlwifi nand_ecc drm nand_ids i2c_i801 mtd snd_seq_device iTCO_wdt iTCO_vendor_support r592 memstick lpc_ich mperf tpm yenta_socket pcmcia_rsrc pcmcia_core cfg80211 snd_timer snd pcspkr i2c_algo_bit crc16 i2c_core tpm_bios processor mfd_core wmi psmouse mei_me rfkill mei serio_raw soundcore evdev battery button video ac microcode ext3 mbcache jbd md_mod dm_mirror dm_region_hash dm_log dm_mod sg sr_mod sd_mod cdrom crc_t10dif firewire_ohci sdhci_pci sdhci mmc_core firewire_core crc_itu_t thermal thermal_sys ahci libahci ehci_pci uhci_hcd ehci_hcd libata scsi_mod usbcore e1000 + e usb_common + [ 846.855310] ptp pps_core + [ 846.855356] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G O 3.10-2-amd64 #1 Debian 3.10.5-1 + [ 846.855490] Hardware name: LENOVO 4061WFA/4061WFA, BIOS 6FET92WW (3.22 ) 12/14/2011 + [ 846.855609] task: ffffffff81613400 ti: ffffffff81600000 task.ti: ffffffff81600000 + [ 846.855636] RIP: 0010:[] [] smsdvb_onresponse+0x264/0xa86 [smsdvb] + [ 846.863906] RSP: 0018:ffff88013bc03cf0 EFLAGS: 00010046 + [ 846.863906] RAX: 0000000000000000 RBX: ffff880133bf6000 RCX: 0000000000000000 + [ 846.863906] RDX: 0000000000000000 RSI: ffff88005d3b58c0 RDI: ffff880133bf6000 + [ 846.863906] RBP: ffff88005d1da000 R08: 0000000000000058 R09: 0000000000000015 + [ 846.863906] R10: 0000000000001a0d R11: 000000000000021a R12: ffff88005d3b58c0 + [ 846.863906] R13: ffff88005d1da008 R14: 00000000ffffff8d R15: ffff880036cf5060 + [ 846.863906] FS: 0000000000000000(0000) GS:ffff88013bc00000(0000) knlGS:0000000000000000 + [ 846.863906] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b + [ 846.863906] CR2: 00007f3a4b69ae50 CR3: 0000000036dac000 CR4: 00000000000407f0 + [ 846.863906] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [ 846.863906] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 + [ 846.863906] Stack: + [ 846.863906] ffff88007a102000 ffff88005d1da000 ffff88005d3b58c0 0000000000085824 + [ 846.863906] ffffffffa08c5aa3 ffff88005d1da000 ffff8800a6907390 ffff8800a69073b0 + [ 846.863906] ffff8800a6907000 ffffffffa08b642c 000000000000021a ffff8800a69073b0 + [ 846.863906] Call Trace: + [ 846.863906] + [ 846.863906] + [ 846.863906] [] ? smscore_onresponse+0x1d5/0x353 [smsmdtv] + [ 846.863906] [] ? smsusb_onresponse+0x146/0x192 [smsusb] + [ 846.863906] [] ? usb_hcd_giveback_urb+0x6c/0xac [usbcore] + [ 846.863906] [] ? ehci_urb_done+0x62/0x72 [ehci_hcd] + [ 846.863906] [] ? qh_completions+0x91/0x364 [ehci_hcd] + [ 846.863906] [] ? ehci_work+0x8a/0x68e [ehci_hcd] + [ 846.863906] [] ? timekeeping_get_ns.constprop.10+0xd/0x31 + [ 846.863906] [] ? update_cfs_rq_blocked_load+0xde/0xec + [ 846.863906] [] ? run_posix_cpu_timers+0x25/0x575 + [ 846.863906] [] ? ehci_irq+0x211/0x23d [ehci_hcd] + [ 846.863906] [] ? usb_hcd_irq+0x31/0x48 [usbcore] + [ 846.863906] [] ? handle_irq_event_percpu+0x49/0x1a4 + [ 846.863906] [] ? handle_irq_event+0x32/0x4b + [ 846.863906] [] ? handle_fasteoi_irq+0x80/0xb6 + [ 846.863906] [] ? handle_irq+0x18/0x20 + [ 846.863906] [] ? do_IRQ+0x40/0x95 + [ 846.863906] [] ? common_interrupt+0x6d/0x6d + [ 846.863906] + [ 846.863906] + [ 846.863906] [] ? arch_local_irq_enable+0x4/0x8 + [ 846.863906] [] ? cpuidle_enter_state+0x52/0xc1 + [ 846.863906] [] ? cpuidle_idle_call+0xd4/0x143 + [ 846.863906] [] ? arch_cpu_idle+0x5/0x17 + [ 846.863906] [] ? cpu_startup_entry+0x10d/0x187 + [ 846.863906] [] ? start_kernel+0x3e8/0x3f3 + [ 846.863906] [] ? repair_env_string+0x54/0x54 + [ 846.863906] [] ? x86_64_start_kernel+0xf2/0xfd + [ 846.863906] Code: 25 09 00 00 c6 83 da 08 00 00 03 8b 45 54 48 01 83 b6 08 00 00 8b 45 50 48 01 83 db 08 00 00 8b 4d 18 69 c1 ff ff 00 00 03 4d 14 <48> f7 f1 89 83 a8 09 00 00 e9 68 fe ff ff 48 8b 7f 10 e8 79 92 + [ 846.863906] RIP [] smsdvb_onresponse+0x264/0xa86 [smsdvb] + [ 846.863906] RSP + Reference: http://bugs.debian.org/719623 + + Reported-by: Johannes Rohr + Signed-off-by: Bjørn Mork + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/common/siano/smsdvb-main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/common/siano/smsdvb-main.c 2014-04-27 23:39:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/common/siano/smsdvb-main.c 2014-04-28 00:35:52.000000000 +0000 +@@ -275,7 +275,8 @@ + + /* Legacy PER/BER */ + tmp = p->ets_packets * 65535; +- do_div(tmp, p->ts_packets + p->ets_packets); ++ if (p->ts_packets + p->ets_packets) ++ do_div(tmp, p->ts_packets + p->ets_packets); + client->legacy_per = tmp; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1128_d2310f7119ba394d3256c221886c048189dcfb91.txt 2014-04-28 00:35:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.patch 2014-04-28 00:35:53.000000000 +0000 @@ -0,0 +1,44 @@ +commit 42cc8e56740efe9acc271f4780b81ac5ecef188c +Author: Stefan Behrens +Date: Mon Aug 19 18:51:13 2013 +0200 + + Btrfs: don't allow the replace procedure on read only filesystems + + commit bbb651e469d99f0088e286fdeb54acca7bb4ad4e upstream. + + If you start the replace procedure on a read only filesystem, at + the end the procedure fails to write the updated dev_items to the + chunk tree. The problem is that this error is not indicated except + for a WARN_ON(). If the user now thinks that everything was done + as expected and destroys the source device (with mkfs or with a + hammer). The next mount fails with "failed to read chunk root" and + the filesystem is gone. + + This commit adds code to fail the attempt to start the replace + procedure if the filesystem is mounted read-only. + + Signed-off-by: Stefan Behrens + Signed-off-by: Josef Bacik + Signed-off-by: Chris Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/btrfs/ioctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/btrfs/ioctl.c 2014-04-27 23:39:47.000000000 +0000 ++++ linux-3.10-3.10.11/fs/btrfs/ioctl.c 2014-04-28 00:35:53.000000000 +0000 +@@ -3299,6 +3299,9 @@ + + switch (p->cmd) { + case BTRFS_IOCTL_DEV_REPLACE_CMD_START: ++ if (root->fs_info->sb->s_flags & MS_RDONLY) ++ return -EROFS; ++ + if (atomic_xchg( + &root->fs_info->mutually_exclusive_operation_running, + 1)) { +Index: linux-3.10-3.10.11/dummy/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1129_42cc8e56740efe9acc271f4780b81ac5ecef188c.txt 2014-04-28 00:35:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.patch --- linux-3.10.11/debian/patches/rpi/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.patch 2014-04-28 00:35:54.000000000 +0000 @@ -0,0 +1,52 @@ +commit 73e2c2b7c105e46344eb409575a4508f24a82eee +Author: Oleg Nesterov +Date: Wed Sep 11 17:47:26 2013 +0200 + + uprobes: Fix utask->depth accounting in handle_trampoline() + + commit 878b5a6efd38030c7a90895dc8346e8fb1e09b4c upstream. + + Currently utask->depth is simply the number of allocated/pending + return_instance's in uprobe_task->return_instances list. + + handle_trampoline() should decrement this counter every time we + handle/free an instance, but due to typo it does this only if + ->chained == T. This means that in the likely case this counter + is never decremented and the probed task can't report more than + MAX_URETPROBE_DEPTH events. + + Reported-by: Mikhail Kulemin + Reported-by: Hemant Kumar Shaw + Signed-off-by: Oleg Nesterov + Acked-by: Anton Arapov + Cc: masami.hiramatsu.pt@hitachi.com + Cc: srikar@linux.vnet.ibm.com + Cc: systemtap@sourceware.org + Link: http://lkml.kernel.org/r/20130911154726.GA8093@redhat.com + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/events/uprobes.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/events/uprobes.c 2014-04-27 23:39:46.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/events/uprobes.c 2014-04-28 00:35:54.000000000 +0000 +@@ -1682,12 +1682,10 @@ + tmp = ri; + ri = ri->next; + kfree(tmp); ++ utask->depth--; + + if (!chained) + break; +- +- utask->depth--; +- + BUG_ON(!ri); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1130_73e2c2b7c105e46344eb409575a4508f24a82eee.txt 2014-04-28 00:35:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.patch 2014-04-28 00:35:55.000000000 +0000 @@ -0,0 +1,38 @@ +commit d041e861d49f1f558e9e18f2075345f8a37427dc +Author: Mark Brown +Date: Thu Aug 29 07:18:14 2013 -0700 + + leds: wm831x-status: Request a REG resource + + commit 61abeba5222895d6900b13115f5d8eba7988d7d6 upstream. + + The wm831x-status driver was not converted to use a REG resource when they + were introduced and the rest of the wm831x drivers converted, causing it + to fail to probe due to requesting the wrong resource type. + + Signed-off-by: Mark Brown + Signed-off-by: Bryan Wu + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/leds/leds-wm831x-status.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/leds/leds-wm831x-status.c 2014-04-27 23:39:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/leds/leds-wm831x-status.c 2014-04-28 00:35:55.000000000 +0000 +@@ -230,9 +230,9 @@ + int id = pdev->id % ARRAY_SIZE(chip_pdata->status); + int ret; + +- res = platform_get_resource(pdev, IORESOURCE_IO, 0); ++ res = platform_get_resource(pdev, IORESOURCE_REG, 0); + if (res == NULL) { +- dev_err(&pdev->dev, "No I/O resource\n"); ++ dev_err(&pdev->dev, "No register resource\n"); + ret = -EINVAL; + goto err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1131_d041e861d49f1f558e9e18f2075345f8a37427dc.txt 2014-04-28 00:35:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.patch 2014-04-28 00:35:56.000000000 +0000 @@ -0,0 +1,48 @@ +commit 2008c41d079db04dfc6d6a29bd8a7292ed1299a3 +Author: Felix Fietkau +Date: Wed Aug 28 10:41:42 2013 +0200 + + MIPS: ath79: Fix ar933x watchdog clock + + commit a1191927ace7e6f827132aa9e062779eb3f11fa5 upstream. + + The watchdog device on the AR933x is connected to + the AHB clock, however the current code uses the + reference clock. Due to the wrong rate, the watchdog + driver can't calculate correct register values for + a given timeout value and the watchdog unexpectedly + restarts the system. + + The code uses the wrong value since the initial + commit 04225e1d227c8e68d685936ecf42ac175fec0e54 + (MIPS: ath79: add AR933X specific clock init) + + The patch fixes the code to use the correct clock + rate to avoid the problem. + + Signed-off-by: Felix Fietkau + Signed-off-by: Gabor Juhos + Cc: linux-mips@linux-mips.org + Patchwork: https://patchwork.linux-mips.org/patch/5777/ + Signed-off-by: Ralf Baechle + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/mips/ath79/clock.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/mips/ath79/clock.c 2014-04-27 23:39:46.000000000 +0000 ++++ linux-3.10-3.10.11/arch/mips/ath79/clock.c 2014-04-28 00:35:55.000000000 +0000 +@@ -164,7 +164,7 @@ + ath79_ahb_clk.rate = freq / t; + } + +- ath79_wdt_clk.rate = ath79_ref_clk.rate; ++ ath79_wdt_clk.rate = ath79_ahb_clk.rate; + ath79_uart_clk.rate = ath79_ref_clk.rate; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1132_2008c41d079db04dfc6d6a29bd8a7292ed1299a3.txt 2014-04-28 00:35:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.patch 2014-04-28 00:35:57.000000000 +0000 @@ -0,0 +1,73 @@ +commit e041da063093c8f0a713b09560dc5bf6985e8a0a +Author: Gera Kazakov +Date: Mon Sep 9 15:47:06 2013 -0700 + + target: Fix >= v3.9+ regression in PR APTPL + ALUA metadata write-out + + commit f730f9158f6ee7b5c4d892af6b51a72194445ea4 upstream. + + This patch fixes a >= v3.9+ regression in __core_scsi3_write_aptpl_to_file() + + core_alua_write_tpg_metadata() write-out, where a return value of -EIO was + incorrectly being returned upon success. + + This bug was originally introduced in: + + commit 0e9b10a90f1c30f25dd6f130130240745ab14010 + Author: Al Viro + Date: Sat Feb 23 15:22:43 2013 -0500 + + target: writev() on single-element vector is pointless + + However, given that the return of core_scsi3_update_and_write_aptpl() + was not used to determine if a command should be returned with non GOOD + status, this bug was not being triggered in PR logic until v3.11-rc1 by + commit: + + commit 459f213ba162bd13e113d6f92a8fa6c780fd67ed + Author: Andy Grover + Date: Thu May 16 10:41:02 2013 -0700 + + target: Allocate aptpl_buf inside update_and_write_aptpl() + + So, go ahead and only return -EIO if kernel_write() returned a + negative value. + + Reported-by: Gera Kazakov + Signed-off-by: Gera Kazakov + Cc: Al Viro + Cc: Andy Grover + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/target/target_core_alua.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/target/target_core_alua.c 2014-04-27 23:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/target/target_core_alua.c 2014-04-28 00:35:56.000000000 +0000 +@@ -730,7 +730,7 @@ + if (ret < 0) + pr_err("Error writing ALUA metadata file: %s\n", path); + fput(file); +- return ret ? -EIO : 0; ++ return (ret < 0) ? -EIO : 0; + } + + /* +Index: linux-3.10-3.10.11/drivers/target/target_core_pr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/target/target_core_pr.c 2014-04-27 23:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/target/target_core_pr.c 2014-04-28 00:35:56.000000000 +0000 +@@ -1987,7 +1987,7 @@ + pr_debug("Error writing APTPL metadata file: %s\n", path); + fput(file); + +- return ret ? -EIO : 0; ++ return (ret < 0) ? -EIO : 0; + } + + static int +Index: linux-3.10-3.10.11/dummy/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1133_e041da063093c8f0a713b09560dc5bf6985e8a0a.txt 2014-04-28 00:35:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.patch --- linux-3.10.11/debian/patches/rpi/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.patch 2014-04-28 00:35:58.000000000 +0000 @@ -0,0 +1,125 @@ +commit 1b24e0e487698ae239764165495f45401d5930ce +Author: Alex Williamson +Date: Sat Jun 15 10:27:19 2013 -0600 + + intel-iommu: Fix leaks in pagetable freeing + + commit 3269ee0bd6686baf86630300d528500ac5b516d7 upstream. + + At best the current code only seems to free the leaf pagetables and + the root. If you're unlucky enough to have a large gap (like any + QEMU guest with more than 3G of memory), only the first chunk of leaf + pagetables are freed (plus the root). This is a massive memory leak. + This patch re-writes the pagetable freeing function to use a + recursive algorithm and manages to not only free all the pagetables, + but does it without any apparent performance loss versus the current + broken version. + + Signed-off-by: Alex Williamson + Reviewed-by: Marcelo Tosatti + Signed-off-by: Joerg Roedel + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/iommu/intel-iommu.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/iommu/intel-iommu.c 2014-04-27 23:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/iommu/intel-iommu.c 2014-04-28 00:35:57.000000000 +0000 +@@ -890,56 +890,54 @@ + return order; + } + ++static void dma_pte_free_level(struct dmar_domain *domain, int level, ++ struct dma_pte *pte, unsigned long pfn, ++ unsigned long start_pfn, unsigned long last_pfn) ++{ ++ pfn = max(start_pfn, pfn); ++ pte = &pte[pfn_level_offset(pfn, level)]; ++ ++ do { ++ unsigned long level_pfn; ++ struct dma_pte *level_pte; ++ ++ if (!dma_pte_present(pte) || dma_pte_superpage(pte)) ++ goto next; ++ ++ level_pfn = pfn & level_mask(level - 1); ++ level_pte = phys_to_virt(dma_pte_addr(pte)); ++ ++ if (level > 2) ++ dma_pte_free_level(domain, level - 1, level_pte, ++ level_pfn, start_pfn, last_pfn); ++ ++ /* If range covers entire pagetable, free it */ ++ if (!(start_pfn > level_pfn || ++ last_pfn < level_pfn + level_size(level))) { ++ dma_clear_pte(pte); ++ domain_flush_cache(domain, pte, sizeof(*pte)); ++ free_pgtable_page(level_pte); ++ } ++next: ++ pfn += level_size(level); ++ } while (!first_pte_in_page(++pte) && pfn <= last_pfn); ++} ++ + /* free page table pages. last level pte should already be cleared */ + static void dma_pte_free_pagetable(struct dmar_domain *domain, + unsigned long start_pfn, + unsigned long last_pfn) + { + int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; +- struct dma_pte *first_pte, *pte; +- int total = agaw_to_level(domain->agaw); +- int level; +- unsigned long tmp; +- int large_page = 2; + + BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width); + BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width); + BUG_ON(start_pfn > last_pfn); + + /* We don't need lock here; nobody else touches the iova range */ +- level = 2; +- while (level <= total) { +- tmp = align_to_level(start_pfn, level); +- +- /* If we can't even clear one PTE at this level, we're done */ +- if (tmp + level_size(level) - 1 > last_pfn) +- return; +- +- do { +- large_page = level; +- first_pte = pte = dma_pfn_level_pte(domain, tmp, level, &large_page); +- if (large_page > level) +- level = large_page + 1; +- if (!pte) { +- tmp = align_to_level(tmp + 1, level + 1); +- continue; +- } +- do { +- if (dma_pte_present(pte)) { +- free_pgtable_page(phys_to_virt(dma_pte_addr(pte))); +- dma_clear_pte(pte); +- } +- pte++; +- tmp += level_size(level); +- } while (!first_pte_in_page(pte) && +- tmp + level_size(level) - 1 <= last_pfn); +- +- domain_flush_cache(domain, first_pte, +- (void *)pte - (void *)first_pte); +- +- } while (tmp && tmp + level_size(level) - 1 <= last_pfn); +- level++; +- } ++ dma_pte_free_level(domain, agaw_to_level(domain->agaw), ++ domain->pgd, 0, start_pfn, last_pfn); ++ + /* free pgd */ + if (start_pfn == 0 && last_pfn == DOMAIN_MAX_PFN(domain->gaw)) { + free_pgtable_page(domain->pgd); +Index: linux-3.10-3.10.11/dummy/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1134_1b24e0e487698ae239764165495f45401d5930ce.txt 2014-04-28 00:35:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.patch 2014-04-28 00:35:59.000000000 +0000 @@ -0,0 +1,100 @@ +commit 5a48788ca4d6dc78d1856d9ddeea1b1160097cc9 +Author: Eric W. Biederman +Date: Thu Aug 29 13:56:50 2013 -0700 + + pidns: Fix hang in zap_pid_ns_processes by sending a potentially extra wakeup + + commit a606488513543312805fab2b93070cefe6a3016c upstream. + + Serge Hallyn writes: + + > Since commit af4b8a83add95ef40716401395b44a1b579965f4 it's been + > possible to get into a situation where a pidns reaper is + > , reparented to host pid 1, but never reaped. How to + > reproduce this is documented at + > + > https://bugs.launchpad.net/ubuntu/+source/lxc/+bug/1168526 + > (and see + > https://bugs.launchpad.net/ubuntu/+source/lxc/+bug/1168526/comments/13) + > In short, run repeated starts of a container whose init is + > + > Process.exit(0); + > + > sysrq-t when such a task is playing zombie shows: + > + > [ 131.132978] init x ffff88011fc14580 0 2084 2039 0x00000000 + > [ 131.132978] ffff880116e89ea8 0000000000000002 ffff880116e89fd8 0000000000014580 + > [ 131.132978] ffff880116e89fd8 0000000000014580 ffff8801172a0000 ffff8801172a0000 + > [ 131.132978] ffff8801172a0630 ffff88011729fff0 ffff880116e14650 ffff88011729fff0 + > [ 131.132978] Call Trace: + > [ 131.132978] [] schedule+0x29/0x70 + > [ 131.132978] [] do_exit+0x6e1/0xa40 + > [ 131.132978] [] ? signal_wake_up_state+0x1e/0x30 + > [ 131.132978] [] do_group_exit+0x3f/0xa0 + > [ 131.132978] [] SyS_exit_group+0x14/0x20 + > [ 131.132978] [] tracesys+0xe1/0xe6 + > + > Further debugging showed that every time this happened, zap_pid_ns_processes() + > started with nr_hashed being 3, while we were expecting it to drop to 2. + > Any time it didn't happen, nr_hashed was 1 or 2. So the reaper was + > waiting for nr_hashed to become 2, but free_pid() only wakes the reaper + > if nr_hashed hits 1. + + The issue is that when the task group leader of an init process exits + before other tasks of the init process when the init process finally + exits it will be a secondary task sleeping in zap_pid_ns_processes and + waiting to wake up when the number of hashed pids drops to two. This + case waits forever as free_pid only sends a wake up when the number of + hashed pids drops to 1. + + To correct this the simple strategy of sending a possibly unncessary + wake up when the number of hashed pids drops to 2 is adopted. + + Sending one extraneous wake up is relatively harmless, at worst we + waste a little cpu time in the rare case when a pid namespace + appropaches exiting. + + We can detect the case when the pid namespace drops to just two pids + hashed race free in free_pid. + + Dereferencing pid_ns->child_reaper with the pidmap_lock held is safe + without out the tasklist_lock because it is guaranteed that the + detach_pid will be called on the child_reaper before it is freed and + detach_pid calls __change_pid which calls free_pid which takes the + pidmap_lock. __change_pid only calls free_pid if this is the + last use of the pid. For a thread that is not the thread group leader + the threads pid will only ever have one user because a threads pid + is not allowed to be the pid of a process, of a process group or + a session. For a thread that is a thread group leader all of + the other threads of that process will be reaped before it is allowed + for the thread group leader to be reaped ensuring there will only + be one user of the threads pid as a process pid. Furthermore + because the thread is the init process of a pid namespace all of the + other processes in the pid namespace will have also been already freed + leading to the fact that the pid will not be used as a session pid or + a process group pid for any other running process. + + Acked-by: Serge Hallyn + Tested-by: Serge Hallyn + Reported-by: Serge Hallyn + Signed-off-by: "Eric W. Biederman" + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/pid.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/pid.c 2014-04-27 23:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/pid.c 2014-04-28 00:35:58.000000000 +0000 +@@ -264,6 +264,7 @@ + struct pid_namespace *ns = upid->ns; + hlist_del_rcu(&upid->pid_chain); + switch(--ns->nr_hashed) { ++ case 2: + case 1: + /* When all that is left in the pid namespace + * is the reaper wake up the reaper. The reaper +Index: linux-3.10-3.10.11/dummy/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1135_5a48788ca4d6dc78d1856d9ddeea1b1160097cc9.txt 2014-04-28 00:35:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.patch --- linux-3.10.11/debian/patches/rpi/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.patch 2014-04-28 00:35:59.000000000 +0000 @@ -0,0 +1,66 @@ +commit f608ebd760cb9b48a333700fdc10245e257d9fce +Author: Oleg Nesterov +Date: Wed Sep 11 14:19:38 2013 -0700 + + pidns: fix vfork() after unshare(CLONE_NEWPID) + + commit e79f525e99b04390ca4d2366309545a836c03bf1 upstream. + + Commit 8382fcac1b81 ("pidns: Outlaw thread creation after + unshare(CLONE_NEWPID)") nacks CLONE_VM if the forking process unshared + pid_ns, this obviously breaks vfork: + + int main(void) + { + assert(unshare(CLONE_NEWUSER | CLONE_NEWPID) == 0); + assert(vfork() >= 0); + _exit(0); + return 0; + } + + fails without this patch. + + Change this check to use CLONE_SIGHAND instead. This also forbids + CLONE_THREAD automatically, and this is what the comment implies. + + We could probably even drop CLONE_SIGHAND and use CLONE_THREAD, but it + would be safer to not do this. The current check denies CLONE_SIGHAND + implicitely and there is no reason to change this. + + Eric said "CLONE_SIGHAND is fine. CLONE_THREAD would be even better. + Having shared signal handling between two different pid namespaces is + the case that we are fundamentally guarding against." + + Signed-off-by: Oleg Nesterov + Reported-by: Colin Walters + Acked-by: Andy Lutomirski + Reviewed-by: "Eric W. Biederman" + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/fork.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/fork.c 2014-04-27 23:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/fork.c 2014-04-28 00:35:59.000000000 +0000 +@@ -1171,10 +1171,11 @@ + return ERR_PTR(-EINVAL); + + /* +- * If the new process will be in a different pid namespace +- * don't allow the creation of threads. ++ * If the new process will be in a different pid namespace don't ++ * allow it to share a thread group or signal handlers with the ++ * forking task. + */ +- if ((clone_flags & (CLONE_VM|CLONE_NEWPID)) && ++ if ((clone_flags & (CLONE_SIGHAND | CLONE_NEWPID)) && + (task_active_pid_ns(current) != current->nsproxy->pid_ns)) + return ERR_PTR(-EINVAL); + +Index: linux-3.10-3.10.11/dummy/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1136_f608ebd760cb9b48a333700fdc10245e257d9fce.txt 2014-04-28 00:35:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1137_3c46f72697d06f219222314b4372562973975995.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1137_3c46f72697d06f219222314b4372562973975995.patch --- linux-3.10.11/debian/patches/rpi/rpi_1137_3c46f72697d06f219222314b4372562973975995.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1137_3c46f72697d06f219222314b4372562973975995.patch 2014-04-28 00:36:00.000000000 +0000 @@ -0,0 +1,68 @@ +commit 3c46f72697d06f219222314b4372562973975995 +Author: Jie Liu +Date: Wed Sep 11 14:20:05 2013 -0700 + + ocfs2: fix the end cluster offset of FIEMAP + + commit 28e8be31803b19d0d8f76216cb11b480b8a98bec upstream. + + Call fiemap ioctl(2) with given start offset as well as an desired mapping + range should show extents if possible. However, we somehow figure out the + end offset of mapping via 'mapping_end -= cpos' before iterating the + extent records which would cause problems if the given fiemap length is + too small to a cluster size, e.g, + + Cluster size 4096: + debugfs.ocfs2 1.6.3 + Block Size Bits: 12 Cluster Size Bits: 12 + + The extended fiemap test utility From David: + https://gist.github.com/anonymous/6172331 + + # dd if=/dev/urandom of=/ocfs2/test_file bs=1M count=1000 + # ./fiemap /ocfs2/test_file 4096 10 + start: 4096, length: 10 + File /ocfs2/test_file has 0 extents: + # Logical Physical Length Flags + ^^^^^ <-- No extent is shown + + In this case, at ocfs2_fiemap(): cpos == mapping_end == 1. Hence the + loop of searching extent records was not executed at all. + + This patch remove the in question 'mapping_end -= cpos', and loops + until the cpos is larger than the mapping_end as usual. + + # ./fiemap /ocfs2/test_file 4096 10 + start: 4096, length: 10 + File /ocfs2/test_file has 1 extents: + # Logical Physical Length Flags + 0: 0000000000000000 0000000056a01000 0000000006a00000 0000 + + Signed-off-by: Jie Liu + Reported-by: David Weber + Tested-by: David Weber + Cc: Sunil Mushran + Cc: Mark Fashen + Cc: Joel Becker + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/ocfs2/extent_map.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/ocfs2/extent_map.c 2014-04-27 23:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/fs/ocfs2/extent_map.c 2014-04-28 00:36:00.000000000 +0000 +@@ -781,7 +781,6 @@ + cpos = map_start >> osb->s_clustersize_bits; + mapping_end = ocfs2_clusters_for_bytes(inode->i_sb, + map_start + map_len); +- mapping_end -= cpos; + is_last = 0; + while (cpos < mapping_end && !is_last) { + u32 fe_flags; +Index: linux-3.10-3.10.11/dummy/rpi_1137_3c46f72697d06f219222314b4372562973975995.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1137_3c46f72697d06f219222314b4372562973975995.txt 2014-04-28 00:36:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.patch 2014-04-28 00:36:01.000000000 +0000 @@ -0,0 +1,76 @@ +commit d96fa17975d6b1d1dd1264170ccdfabb254f71c2 +Author: Greg Thelen +Date: Wed Sep 11 14:23:08 2013 -0700 + + memcg: fix multiple large threshold notifications + + commit 2bff24a3707093c435ab3241c47dcdb5f16e432b upstream. + + A memory cgroup with (1) multiple threshold notifications and (2) at least + one threshold >=2G was not reliable. Specifically the notifications would + either not fire or would not fire in the proper order. + + The __mem_cgroup_threshold() signaling logic depends on keeping 64 bit + thresholds in sorted order. mem_cgroup_usage_register_event() sorts them + with compare_thresholds(), which returns the difference of two 64 bit + thresholds as an int. If the difference is positive but has bit[31] set, + then sort() treats the difference as negative and breaks sort order. + + This fix compares the two arbitrary 64 bit thresholds returning the + classic -1, 0, 1 result. + + The test below sets two notifications (at 0x1000 and 0x81001000): + cd /sys/fs/cgroup/memory + mkdir x + for x in 4096 2164264960; do + cgroup_event_listener x/memory.usage_in_bytes $x | sed "s/^/$x listener:/" & + done + echo $$ > x/cgroup.procs + anon_leaker 500M + + v3.11-rc7 fails to signal the 4096 event listener: + Leaking... + Done leaking pages. + + Patched v3.11-rc7 properly notifies: + Leaking... + 4096 listener:2013:8:31:14:13:36 + Done leaking pages. + + The fixed bug is old. It appears to date back to the introduction of + memcg threshold notifications in v2.6.34-rc1-116-g2e72b6347c94 "memcg: + implement memory thresholds" + + Signed-off-by: Greg Thelen + Acked-by: Michal Hocko + Acked-by: Kirill A. Shutemov + Acked-by: Johannes Weiner + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/memcontrol.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/memcontrol.c 2014-04-27 23:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/mm/memcontrol.c 2014-04-28 00:36:01.000000000 +0000 +@@ -5584,7 +5584,13 @@ + const struct mem_cgroup_threshold *_a = a; + const struct mem_cgroup_threshold *_b = b; + +- return _a->threshold - _b->threshold; ++ if (_a->threshold > _b->threshold) ++ return 1; ++ ++ if (_a->threshold < _b->threshold) ++ return -1; ++ ++ return 0; + } + + static int mem_cgroup_oom_notify_cb(struct mem_cgroup *memcg) +Index: linux-3.10-3.10.11/dummy/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1138_d96fa17975d6b1d1dd1264170ccdfabb254f71c2.txt 2014-04-28 00:36:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.patch --- linux-3.10.11/debian/patches/rpi/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.patch 2014-04-28 00:36:02.000000000 +0000 @@ -0,0 +1,45 @@ +commit 8b89ae8a4914ee393c0db530735d933481272e97 +Author: Libin +Date: Wed Sep 11 14:20:38 2013 -0700 + + mm/huge_memory.c: fix potential NULL pointer dereference + + commit a8f531ebc33052642b4bd7b812eedf397108ce64 upstream. + + In collapse_huge_page() there is a race window between releasing the + mmap_sem read lock and taking the mmap_sem write lock, so find_vma() may + return NULL. So check the return value to avoid NULL pointer dereference. + + collapse_huge_page + khugepaged_alloc_page + up_read(&mm->mmap_sem) + down_write(&mm->mmap_sem) + vma = find_vma(mm, address) + + Signed-off-by: Libin + Acked-by: Kirill A. Shutemov + Reviewed-by: Wanpeng Li + Reviewed-by: Michal Hocko + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-27 23:39:43.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:36:01.000000000 +0000 +@@ -2286,6 +2286,8 @@ + goto out; + + vma = find_vma(mm, address); ++ if (!vma) ++ goto out; + hstart = (vma->vm_start + ~HPAGE_PMD_MASK) & HPAGE_PMD_MASK; + hend = vma->vm_end & HPAGE_PMD_MASK; + if (address < hstart || address + HPAGE_PMD_SIZE > hend) +Index: linux-3.10-3.10.11/dummy/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1139_8b89ae8a4914ee393c0db530735d933481272e97.txt 2014-04-28 00:36:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.patch --- linux-3.10.11/debian/patches/rpi/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.patch 2014-04-28 00:36:03.000000000 +0000 @@ -0,0 +1,41 @@ +commit 1ca91545961a92067cb8ad3ebc1558c8d1574456 +Author: Eric W. Biederman +Date: Mon Mar 25 19:57:10 2013 -0700 + + proc: Restrict mounting the proc filesystem + + commit aee1c13dd0f6c2fc56e0e492b349ee8ac655880f upstream. + + Don't allow mounting the proc filesystem unless the caller has + CAP_SYS_ADMIN rights over the pid namespace. The principle here is if + you create or have capabilities over it you can mount it, otherwise + you get to live with what other people have mounted. + + Andy pointed out that this is needed to prevent users in a user + namespace from remounting proc and specifying different hidepid and gid + options on already existing proc mounts. + + Reported-by: Andy Lutomirski + Signed-off-by: "Eric W. Biederman" + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/proc/root.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/proc/root.c 2014-04-27 23:39:43.000000000 +0000 ++++ linux-3.10-3.10.11/fs/proc/root.c 2014-04-28 00:36:02.000000000 +0000 +@@ -110,7 +110,8 @@ + ns = task_active_pid_ns(current); + options = data; + +- if (!current_user_ns()->may_mount_proc) ++ if (!current_user_ns()->may_mount_proc || ++ !ns_capable(ns->user_ns, CAP_SYS_ADMIN)) + return ERR_PTR(-EPERM); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1140_1ca91545961a92067cb8ad3ebc1558c8d1574456.txt 2014-04-28 00:36:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.patch 2014-04-28 00:36:03.000000000 +0000 @@ -0,0 +1,71 @@ +commit 4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3 +Author: Jan Kara +Date: Thu Jul 25 11:49:11 2013 +0200 + + isofs: Refuse RW mount of the filesystem instead of making it RO + + commit 17b7f7cf58926844e1dd40f5eb5348d481deca6a upstream. + + Refuse RW mount of isofs filesystem. So far we just silently changed it + to RO mount but when the media is writeable, block layer won't notice + this change and thus will think device is used RW and will block eject + button of the drive. That is unexpected by users because for + non-writeable media eject button works just fine. + + Userspace mount(8) command handles this just fine and retries mounting + with MS_RDONLY set so userspace shouldn't see any regression. Plus any + tool mounting isofs is likely confronted with the case of read-only + media where block layer already refuses to mount the filesystem without + MS_RDONLY set so our behavior shouldn't be anything new for it. + + Reported-by: Hui Wang + Signed-off-by: Jan Kara + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/isofs/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/isofs/inode.c 2014-04-27 23:39:43.000000000 +0000 ++++ linux-3.10-3.10.11/fs/isofs/inode.c 2014-04-28 00:36:03.000000000 +0000 +@@ -125,8 +125,8 @@ + + static int isofs_remount(struct super_block *sb, int *flags, char *data) + { +- /* we probably want a lot more here */ +- *flags |= MS_RDONLY; ++ if (!(*flags & MS_RDONLY)) ++ return -EROFS; + return 0; + } + +@@ -779,15 +779,6 @@ + */ + s->s_maxbytes = 0x80000000000LL; + +- /* +- * The CDROM is read-only, has no nodes (devices) on it, and since +- * all of the files appear to be owned by root, we really do not want +- * to allow suid. (suid or devices will not show up unless we have +- * Rock Ridge extensions) +- */ +- +- s->s_flags |= MS_RDONLY /* | MS_NODEV | MS_NOSUID */; +- + /* Set this for reference. Its not currently used except on write + which we don't have .. */ + +@@ -1546,6 +1537,9 @@ + static struct dentry *isofs_mount(struct file_system_type *fs_type, + int flags, const char *dev_name, void *data) + { ++ /* We don't support read-write mounts */ ++ if (!(flags & MS_RDONLY)) ++ return ERR_PTR(-EACCES); + return mount_bdev(fs_type, flags, dev_name, data, isofs_fill_super); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1141_4b5fe51a9a8e6d4c74a6f2717bf25e4132c551d3.txt 2014-04-28 00:36:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.patch --- linux-3.10.11/debian/patches/rpi/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.patch 2014-04-28 00:36:04.000000000 +0000 @@ -0,0 +1,52 @@ +commit 34db3c078aab40f22846b76c1a2c960c2a378f40 +Author: Borislav Petkov +Date: Tue Jul 23 20:01:23 2013 +0200 + + amd64_edac: Fix single-channel setups + + commit f0a56c480196a98479760862468cc95879df3de0 upstream. + + It can happen that configurations are running in a single-channel mode + even with a dual-channel memory controller, by, say, putting the DIMMs + only on the one channel and leaving the other empty. This causes a + problem in init_csrows which implicitly assumes that when the second + channel is enabled, i.e. channel 1, the struct dimm hierarchy will be + present. Which is not. + + So always allocate two channels unconditionally. + + This provides for the nice side effect that the data structures are + initialized so some day, when memory hotplug is supported, it should + just work out of the box when all of a sudden a second channel appears. + + Reported-and-tested-by: Roger Leigh + Signed-off-by: Borislav Petkov + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/edac/amd64_edac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/edac/amd64_edac.c 2014-04-27 23:39:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/edac/amd64_edac.c 2014-04-28 00:36:04.000000000 +0000 +@@ -2470,8 +2470,15 @@ + layers[0].size = pvt->csels[0].b_cnt; + layers[0].is_virt_csrow = true; + layers[1].type = EDAC_MC_LAYER_CHANNEL; +- layers[1].size = pvt->channel_count; ++ ++ /* ++ * Always allocate two channels since we can have setups with DIMMs on ++ * only one channel. Also, this simplifies handling later for the price ++ * of a couple of KBs tops. ++ */ ++ layers[1].size = 2; + layers[1].is_virt_csrow = false; ++ + mci = edac_mc_alloc(nid, ARRAY_SIZE(layers), layers, 0); + if (!mci) + goto err_siblings; +Index: linux-3.10-3.10.11/dummy/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1142_34db3c078aab40f22846b76c1a2c960c2a378f40.txt 2014-04-28 00:36:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.patch --- linux-3.10.11/debian/patches/rpi/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.patch 2014-04-28 00:36:05.000000000 +0000 @@ -0,0 +1,79 @@ +commit 579db19eca10b594acd9d4516814b599eb4486ec +Author: Alex Deucher +Date: Mon Aug 12 11:04:29 2013 -0400 + + drm/edid: add quirk for Medion MD30217PG + + commit 118bdbd86b39dbb843155054021d2c59058f1e05 upstream. + + This LCD monitor (1280x1024 native) has a completely + bogus detailed timing (640x350@70hz). User reports that + 1280x1024@60 has waves so prefer 1280x1024@75. + + Manufacturer: MED Model: 7b8 Serial#: 99188 + Year: 2005 Week: 5 + EDID Version: 1.3 + Analog Display Input, Input Voltage Level: 0.700/0.700 V + Sync: Separate + Max Image Size [cm]: horiz.: 34 vert.: 27 + Gamma: 2.50 + DPMS capabilities: Off; RGB/Color Display + First detailed timing is preferred mode + redX: 0.645 redY: 0.348 greenX: 0.280 greenY: 0.605 + blueX: 0.142 blueY: 0.071 whiteX: 0.313 whiteY: 0.329 + Supported established timings: + 720x400@70Hz + 640x480@60Hz + 640x480@72Hz + 640x480@75Hz + 800x600@56Hz + 800x600@60Hz + 800x600@72Hz + 800x600@75Hz + 1024x768@60Hz + 1024x768@70Hz + 1024x768@75Hz + 1280x1024@75Hz + Manufacturer's mask: 0 + Supported standard timings: + Supported detailed timing: + clock: 25.2 MHz Image Size: 337 x 270 mm + h_active: 640 h_sync: 688 h_sync_end 784 h_blank_end 800 h_border: 0 + v_active: 350 v_sync: 350 v_sync_end 352 v_blanking: 449 v_border: 0 + Monitor name: MD30217PG + Ranges: V min: 56 V max: 76 Hz, H min: 30 H max: 83 kHz, PixClock max 145 MHz + Serial No: 501099188 + EDID (in hex): + 00ffffffffffff0034a4b80774830100 + 050f010368221b962a0c55a559479b24 + 125054afcf00310a0101010101018180 + 000000000000d60980a0205e63103060 + 0200510e1100001e000000fc004d4433 + 3032313750470a202020000000fd0038 + 4c1e530e000a202020202020000000ff + 003530313039393138380a2020200078 + + Signed-off-by: Alex Deucher + Reported-by: friedrich@mailstation.de + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/drm_edid.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/drm_edid.c 2014-04-27 23:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/drm_edid.c 2014-04-28 00:36:04.000000000 +0000 +@@ -125,6 +125,9 @@ + + /* ViewSonic VA2026w */ + { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, ++ ++ /* Medion MD 30217 PG */ ++ { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, + }; + + /* +Index: linux-3.10-3.10.11/dummy/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1143_579db19eca10b594acd9d4516814b599eb4486ec.txt 2014-04-28 00:36:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.patch --- linux-3.10.11/debian/patches/rpi/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.patch 2014-04-28 00:36:06.000000000 +0000 @@ -0,0 +1,153 @@ +commit 4fdaa3d47985338f80d7262de700533a9e630d29 +Author: Richard Weinberger +Date: Sat Aug 17 18:46:00 2013 +0200 + + um: Implement probe_kernel_read() + + commit f75b1b1bedfb498cc43a992ce4d7ed8df3b1e770 upstream. + + UML needs it's own probe_kernel_read() to handle kernel + mode faults correctly. + The implementation uses mincore() on the host side to detect + whether a page is owned by the UML kernel process. + + This fixes also a possible crash when sysrq-t is used. + Starting with 3.10 sysrq-t calls probe_kernel_read() to + read details from the kernel workers. As kernel worker are + completely async pointers may turn NULL while reading them. + + Signed-off-by: Richard Weinberger + Cc: + Cc: + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/um/include/shared/os.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/um/include/shared/os.h 2014-04-27 23:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/um/include/shared/os.h 2014-04-28 00:36:05.000000000 +0000 +@@ -200,6 +200,7 @@ + extern int os_drop_memory(void *addr, int length); + extern int can_drop_memory(void); + extern void os_flush_stdout(void); ++extern int os_mincore(void *addr, unsigned long len); + + /* execvp.c */ + extern int execvp_noalloc(char *buf, const char *file, char *const argv[]); +Index: linux-3.10-3.10.11/arch/um/kernel/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/um/kernel/Makefile 2014-04-27 23:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/um/kernel/Makefile 2014-04-28 00:36:05.000000000 +0000 +@@ -13,7 +13,7 @@ + obj-y = config.o exec.o exitcode.o irq.o ksyms.o mem.o \ + physmem.o process.o ptrace.o reboot.o sigio.o \ + signal.o smp.o syscall.o sysrq.o time.o tlb.o trap.o \ +- um_arch.o umid.o skas/ ++ um_arch.o umid.o maccess.o skas/ + + obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o + obj-$(CONFIG_GPROF) += gprof_syms.o +Index: linux-3.10-3.10.11/arch/um/kernel/maccess.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/um/kernel/maccess.c 2014-04-28 00:36:05.000000000 +0000 +@@ -0,0 +1,24 @@ ++/* ++ * Copyright (C) 2013 Richard Weinberger ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++ ++long probe_kernel_read(void *dst, const void *src, size_t size) ++{ ++ void *psrc = (void *)rounddown((unsigned long)src, PAGE_SIZE); ++ ++ if ((unsigned long)src < PAGE_SIZE || size <= 0) ++ return -EFAULT; ++ ++ if (os_mincore(psrc, size + src - psrc) <= 0) ++ return -EFAULT; ++ ++ return __probe_kernel_read(dst, src, size); ++} +Index: linux-3.10-3.10.11/arch/um/os-Linux/process.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/um/os-Linux/process.c 2014-04-27 23:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/um/os-Linux/process.c 2014-04-28 00:36:05.000000000 +0000 +@@ -4,6 +4,7 @@ + */ + + #include ++#include + #include + #include + #include +@@ -232,6 +233,57 @@ + return ok; + } + ++static int os_page_mincore(void *addr) ++{ ++ char vec[2]; ++ int ret; ++ ++ ret = mincore(addr, UM_KERN_PAGE_SIZE, vec); ++ if (ret < 0) { ++ if (errno == ENOMEM || errno == EINVAL) ++ return 0; ++ else ++ return -errno; ++ } ++ ++ return vec[0] & 1; ++} ++ ++int os_mincore(void *addr, unsigned long len) ++{ ++ char *vec; ++ int ret, i; ++ ++ if (len <= UM_KERN_PAGE_SIZE) ++ return os_page_mincore(addr); ++ ++ vec = calloc(1, (len + UM_KERN_PAGE_SIZE - 1) / UM_KERN_PAGE_SIZE); ++ if (!vec) ++ return -ENOMEM; ++ ++ ret = mincore(addr, UM_KERN_PAGE_SIZE, vec); ++ if (ret < 0) { ++ if (errno == ENOMEM || errno == EINVAL) ++ ret = 0; ++ else ++ ret = -errno; ++ ++ goto out; ++ } ++ ++ for (i = 0; i < ((len + UM_KERN_PAGE_SIZE - 1) / UM_KERN_PAGE_SIZE); i++) { ++ if (!(vec[i] & 1)) { ++ ret = 0; ++ goto out; ++ } ++ } ++ ++ ret = 1; ++out: ++ free(vec); ++ return ret; ++} ++ + void init_new_thread_signals(void) + { + set_handler(SIGSEGV); +Index: linux-3.10-3.10.11/dummy/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1144_4fdaa3d47985338f80d7262de700533a9e630d29.txt 2014-04-28 00:36:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.patch --- linux-3.10.11/debian/patches/rpi/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.patch 2014-04-28 00:36:07.000000000 +0000 @@ -0,0 +1,35 @@ +commit 2ab0ad6af3a87818ea3525914be6779fca833801 +Author: majianpeng +Date: Tue Jul 16 15:45:48 2013 +0800 + + libceph: unregister request in __map_request failed and nofail == false + + commit 73d9f7eef3d98c3920e144797cc1894c6b005a1e upstream. + + For nofail == false request, if __map_request failed, the caller does + cleanup work, like releasing the relative pages. It doesn't make any sense + to retry this request. + + Signed-off-by: Jianpeng Ma + Reviewed-by: Sage Weil + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ceph/osd_client.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ceph/osd_client.c 2014-04-27 23:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/net/ceph/osd_client.c 2014-04-28 00:36:06.000000000 +0000 +@@ -2130,6 +2130,8 @@ + dout("osdc_start_request failed map, " + " will retry %lld\n", req->r_tid); + rc = 0; ++ } else { ++ __unregister_request(osdc, req); + } + goto out_unlock; + } +Index: linux-3.10-3.10.11/dummy/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1145_2ab0ad6af3a87818ea3525914be6779fca833801.txt 2014-04-28 00:36:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.patch --- linux-3.10.11/debian/patches/rpi/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.patch 2014-04-28 00:36:08.000000000 +0000 @@ -0,0 +1,35 @@ +commit fd5e2dea537bbf0bfb09f79a8b34c148bb502735 +Author: Sage Weil +Date: Wed Aug 28 17:17:29 2013 -0700 + + libceph: use pg_num_mask instead of pgp_num_mask for pg.seed calc + + commit 9542cf0bf9b1a3adcc2ef271edbcbdba03abf345 upstream. + + Fix a typo that used the wrong bitmask for the pg.seed calculation. This + is normally unnoticed because in most cases pg_num == pgp_num. It is, however, + a bug that is easily corrected. + + Signed-off-by: Sage Weil + Reviewed-by: Alex Elder + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ceph/osdmap.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ceph/osdmap.c 2014-04-27 23:39:41.000000000 +0000 ++++ linux-3.10-3.10.11/net/ceph/osdmap.c 2014-04-28 00:36:07.000000000 +0000 +@@ -1129,7 +1129,7 @@ + + /* pg_temp? */ + pgid.seed = ceph_stable_mod(pgid.seed, pool->pg_num, +- pool->pgp_num_mask); ++ pool->pg_num_mask); + pg = __lookup_pg_mapping(&osdmap->pg_temp, pgid); + if (pg) { + *num = pg->len; +Index: linux-3.10-3.10.11/dummy/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1146_fd5e2dea537bbf0bfb09f79a8b34c148bb502735.txt 2014-04-28 00:36:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.patch 2014-04-28 00:36:08.000000000 +0000 @@ -0,0 +1,34 @@ +commit 4f8e2fc10e249dcae05898f4807d9cc450b070bb +Author: majianpeng +Date: Tue Jul 16 19:36:21 2013 +0800 + + ceph: Don't forget the 'up_read(&osdc->map_sem)' if met error. + + commit 494ddd11be3e2621096bb425eed2886f8e8446d4 upstream. + + Signed-off-by: Jianpeng Ma + Reviewed-by: Sage Weil + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/ceph/ioctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/ceph/ioctl.c 2014-04-27 23:39:41.000000000 +0000 ++++ linux-3.10-3.10.11/fs/ceph/ioctl.c 2014-04-28 00:36:08.000000000 +0000 +@@ -196,8 +196,10 @@ + r = ceph_calc_file_object_mapping(&ci->i_layout, dl.file_offset, len, + &dl.object_no, &dl.object_offset, + &olen); +- if (r < 0) ++ if (r < 0) { ++ up_read(&osdc->map_sem); + return -EIO; ++ } + dl.file_offset -= dl.object_offset; + dl.object_size = ceph_file_layout_object_size(ci->i_layout); + dl.block_size = ceph_file_layout_su(ci->i_layout); +Index: linux-3.10-3.10.11/dummy/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1147_4f8e2fc10e249dcae05898f4807d9cc450b070bb.txt 2014-04-28 00:36:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.patch --- linux-3.10.11/debian/patches/rpi/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.patch 2014-04-28 00:36:09.000000000 +0000 @@ -0,0 +1,77 @@ +commit be4c4b85002b3c20773c2c3d3e997bd1aedc1453 +Author: Josh Durgin +Date: Mon Aug 26 17:55:38 2013 -0700 + + rbd: fix I/O error propagation for reads + + commit 17c1cc1d9293a568a00545469078e29555cc7f39 upstream. + + When a request returns an error, the driver needs to report the entire + extent of the request as completed. Writes already did this, since + they always set xferred = length, but reads were skipping that step if + an error other than -ENOENT occurred. Instead, rbd would end up + passing 0 xferred to blk_end_request(), which would always report + needing more data. This resulted in an assert failing when more data + was required by the block layer, but all the object requests were + done: + + [ 1868.719077] rbd: obj_request read result -108 xferred 0 + [ 1868.719077] + [ 1868.719518] end_request: I/O error, dev rbd1, sector 0 + [ 1868.719739] + [ 1868.719739] Assertion failure in rbd_img_obj_callback() at line 1736: + [ 1868.719739] + [ 1868.719739] rbd_assert(more ^ (which == img_request->obj_request_count)); + + Without this assert, reads that hit errors would hang forever, since + the block layer considered them incomplete. + + Fixes: http://tracker.ceph.com/issues/5647 + Signed-off-by: Josh Durgin + Reviewed-by: Alex Elder + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/block/rbd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/block/rbd.c 2014-04-27 23:39:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/block/rbd.c 2014-04-28 00:36:09.000000000 +0000 +@@ -1565,11 +1565,12 @@ + obj_request, obj_request->img_request, obj_request->result, + xferred, length); + /* +- * ENOENT means a hole in the image. We zero-fill the +- * entire length of the request. A short read also implies +- * zero-fill to the end of the request. Either way we +- * update the xferred count to indicate the whole request +- * was satisfied. ++ * ENOENT means a hole in the image. We zero-fill the entire ++ * length of the request. A short read also implies zero-fill ++ * to the end of the request. An error requires the whole ++ * length of the request to be reported finished with an error ++ * to the block layer. In each case we update the xferred ++ * count to indicate the whole request was satisfied. + */ + rbd_assert(obj_request->type != OBJ_REQUEST_NODATA); + if (obj_request->result == -ENOENT) { +@@ -1578,14 +1579,13 @@ + else + zero_pages(obj_request->pages, 0, length); + obj_request->result = 0; +- obj_request->xferred = length; + } else if (xferred < length && !obj_request->result) { + if (obj_request->type == OBJ_REQUEST_BIO) + zero_bio_chain(obj_request->bio_list, xferred); + else + zero_pages(obj_request->pages, xferred, length); +- obj_request->xferred = length; + } ++ obj_request->xferred = length; + obj_request_done_set(obj_request); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1148_be4c4b85002b3c20773c2c3d3e997bd1aedc1453.txt 2014-04-28 00:36:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.patch --- linux-3.10.11/debian/patches/rpi/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.patch 2014-04-28 00:36:10.000000000 +0000 @@ -0,0 +1,65 @@ +commit c0da08882ef2c738edacd5e7fbca671e663f9951 +Author: Sergei Shtylyov +Date: Sat Aug 24 23:38:15 2013 -0400 + + mmc: tmio_mmc_dma: fix PIO fallback on SDHI + + commit f936f9b67b7f8c2eae01dd303a0e90bd777c4679 upstream. + + I'm testing SH-Mobile SDHI driver in DMA mode with a new DMA controller using + 'bonnie++' and getting DMA error after which the tmio_mmc_dma.c code falls back + to PIO but all commands time out after that. It turned out that the fallback + code calls tmio_mmc_enable_dma() with RX/TX channels already freed and pointers + to them cleared, so that the function bails out early instead of clearing the + DMA bit in the CTL_DMA_ENABLE register. The regression was introduced by commit + 162f43e31c5a376ec16336e5d0ac973373d54c89 (mmc: tmio: fix a deadlock). + Moving tmio_mmc_enable_dma() calls to the top of the PIO fallback code in + tmio_mmc_start_dma_{rx|tx}() helps. + + Signed-off-by: Sergei Shtylyov + Acked-by: Guennadi Liakhovetski + Signed-off-by: Chris Ball + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/mmc/host/tmio_mmc_dma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/tmio_mmc_dma.c 2014-04-27 23:39:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/tmio_mmc_dma.c 2014-04-28 00:36:10.000000000 +0000 +@@ -104,6 +104,7 @@ + pio: + if (!desc) { + /* DMA failed, fall back to PIO */ ++ tmio_mmc_enable_dma(host, false); + if (ret >= 0) + ret = -EIO; + host->chan_rx = NULL; +@@ -116,7 +117,6 @@ + } + dev_warn(&host->pdev->dev, + "DMA failed: %d, falling back to PIO\n", ret); +- tmio_mmc_enable_dma(host, false); + } + + dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__, +@@ -185,6 +185,7 @@ + pio: + if (!desc) { + /* DMA failed, fall back to PIO */ ++ tmio_mmc_enable_dma(host, false); + if (ret >= 0) + ret = -EIO; + host->chan_tx = NULL; +@@ -197,7 +198,6 @@ + } + dev_warn(&host->pdev->dev, + "DMA failed: %d, falling back to PIO\n", ret); +- tmio_mmc_enable_dma(host, false); + } + + dev_dbg(&host->pdev->dev, "%s(): desc %p, cookie %d\n", __func__, +Index: linux-3.10-3.10.11/dummy/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1149_c0da08882ef2c738edacd5e7fbca671e663f9951.txt 2014-04-28 00:36:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.patch --- linux-3.10.11/debian/patches/rpi/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.patch 2014-04-28 00:36:11.000000000 +0000 @@ -0,0 +1,36 @@ +commit 6830e9ab4b67cee41edd609fb7ebe14c66fca434 +Author: Grant Likely +Date: Wed Aug 28 21:24:17 2013 +0100 + + of: Fix missing memory initialization on FDT unflattening + + commit 0640332e073be9207f0784df43595c0c39716e42 upstream. + + Any calls to dt_alloc() need to be zeroed. This is a temporary fix, but + the allocation function itself needs to zero memory before returning + it. This is a follow up to patch 9e4012752, "of: fdt: fix memory + initialization for expanded DT" which fixed one call site but missed + another. + + Signed-off-by: Grant Likely + Acked-by: Wladislav Wiebe + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/of/base.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/of/base.c 2014-04-27 23:39:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/of/base.c 2014-04-28 00:36:10.000000000 +0000 +@@ -1629,6 +1629,7 @@ + ap = dt_alloc(sizeof(*ap) + len + 1, 4); + if (!ap) + continue; ++ memset(ap, 0, sizeof(*ap) + len + 1); + ap->alias = start; + of_alias_add(ap, np, id, start, len); + } +Index: linux-3.10-3.10.11/dummy/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1150_6830e9ab4b67cee41edd609fb7ebe14c66fca434.txt 2014-04-28 00:36:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.patch 2014-04-28 00:36:12.000000000 +0000 @@ -0,0 +1,70 @@ +commit 497587f84f16a5775b91d0a1051930ae8997d02d +Author: Brian Norris +Date: Thu Jul 18 01:17:02 2013 -0700 + + mtd: nand: fix NAND_BUSWIDTH_AUTO for x16 devices + + commit 68e8078072e802e77134664f11d2ffbfbd2f8fbe upstream. + + The code for NAND_BUSWIDTH_AUTO is broken. According to Alexander: + + "I have a problem with attach NAND UBI in 16 bit mode. + NAND works fine if I specify NAND_BUSWIDTH_16 option, but not + working with NAND_BUSWIDTH_AUTO option. In second case NAND + chip is identifyed with ONFI." + + See his report for the rest of the details: + + http://lists.infradead.org/pipermail/linux-mtd/2013-July/047515.html + + Anyway, the problem is that nand_set_defaults() is called twice, we + intend it to reset the chip functions to their x16 buswidth verions + if the buswidth changed from x8 to x16; however, nand_set_defaults() + does exactly nothing if called a second time. + + Fix this by hacking nand_set_defaults() to reset the buswidth-dependent + functions if they were set to the x8 version the first time. Note that + this does not do anything to reset from x16 to x8, but that's not the + supported use case for NAND_BUSWIDTH_AUTO anyway. + + Signed-off-by: Brian Norris + Reported-by: Alexander Shiyan + Tested-by: Alexander Shiyan + Cc: Matthieu Castet + Signed-off-by: Artem Bityutskiy + Signed-off-by: David Woodhouse + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/mtd/nand/nand_base.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mtd/nand/nand_base.c 2014-04-27 23:39:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mtd/nand/nand_base.c 2014-04-28 00:36:11.000000000 +0000 +@@ -2793,7 +2793,9 @@ + + if (!chip->select_chip) + chip->select_chip = nand_select_chip; +- if (!chip->read_byte) ++ ++ /* If called twice, pointers that depend on busw may need to be reset */ ++ if (!chip->read_byte || chip->read_byte == nand_read_byte) + chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; + if (!chip->read_word) + chip->read_word = nand_read_word; +@@ -2801,9 +2803,9 @@ + chip->block_bad = nand_block_bad; + if (!chip->block_markbad) + chip->block_markbad = nand_default_block_markbad; +- if (!chip->write_buf) ++ if (!chip->write_buf || chip->write_buf == nand_write_buf) + chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; +- if (!chip->read_buf) ++ if (!chip->read_buf || chip->read_buf == nand_read_buf) + chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; + if (!chip->scan_bbt) + chip->scan_bbt = nand_default_bbt; +Index: linux-3.10-3.10.11/dummy/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1151_497587f84f16a5775b91d0a1051930ae8997d02d.txt 2014-04-28 00:36:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.patch 2014-04-28 00:36:13.000000000 +0000 @@ -0,0 +1,34 @@ +commit d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b +Author: Mark Brown +Date: Thu Aug 29 12:21:01 2013 +0100 + + clk: wm831x: Initialise wm831x pointer on init + + commit 08442ce993deeb15a070c14cc3f3459e87d111e0 upstream. + + Otherwise any attempt to interact with the hardware will crash. This is + what happens when drivers get written blind. + + Signed-off-by: Mark Brown + Signed-off-by: Mike Turquette + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/clk/clk-wm831x.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/clk/clk-wm831x.c 2014-04-27 23:39:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/clk/clk-wm831x.c 2014-04-28 00:36:12.000000000 +0000 +@@ -360,6 +360,8 @@ + if (!clkdata) + return -ENOMEM; + ++ clkdata->wm831x = wm831x; ++ + /* XTAL_ENA can only be set via OTP/InstantConfig so just read once */ + ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2); + if (ret < 0) { +Index: linux-3.10-3.10.11/dummy/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1152_d662986b4f282ed5d9e42e6dbd5e6dbb2b5e7d0b.txt 2014-04-28 00:36:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.patch --- linux-3.10.11/debian/patches/rpi/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.patch 2014-04-28 00:36:14.000000000 +0000 @@ -0,0 +1,62 @@ +commit 3002e63bec05766a5af794b09d9cec34fda60519 +Author: Maxim Patlasov +Date: Mon Aug 12 20:39:30 2013 +0400 + + fuse: postpone end_page_writeback() in fuse_writepage_locked() + + commit 4a4ac4eba1010ef9a804569058ab29e3450c0315 upstream. + + The patch fixes a race between ftruncate(2), mmap-ed write and write(2): + + 1) An user makes a page dirty via mmap-ed write. + 2) The user performs shrinking truncate(2) intended to purge the page. + 3) Before fuse_do_setattr calls truncate_pagecache, the page goes to + writeback. fuse_writepage_locked fills FUSE_WRITE request and releases + the original page by end_page_writeback. + 4) fuse_do_setattr() completes and successfully returns. Since now, i_mutex + is free. + 5) Ordinary write(2) extends i_size back to cover the page. Note that + fuse_send_write_pages do wait for fuse writeback, but for another + page->index. + 6) fuse_writepage_locked proceeds by queueing FUSE_WRITE request. + fuse_send_writepage is supposed to crop inarg->size of the request, + but it doesn't because i_size has already been extended back. + + Moving end_page_writeback to the end of fuse_writepage_locked fixes the + race because now the fact that truncate_pagecache is successfully returned + infers that fuse_writepage_locked has already called end_page_writeback. + And this, in turn, infers that fuse_flush_writepages has already called + fuse_send_writepage, and the latter used valid (shrunk) i_size. write(2) + could not extend it because of i_mutex held by ftruncate(2). + + Signed-off-by: Maxim Patlasov + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/file.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/file.c 2014-04-27 23:39:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/file.c 2014-04-28 00:36:13.000000000 +0000 +@@ -1530,7 +1530,6 @@ + + inc_bdi_stat(mapping->backing_dev_info, BDI_WRITEBACK); + inc_zone_page_state(tmp_page, NR_WRITEBACK_TEMP); +- end_page_writeback(page); + + spin_lock(&fc->lock); + list_add(&req->writepages_entry, &fi->writepages); +@@ -1538,6 +1537,8 @@ + fuse_flush_writepages(inode); + spin_unlock(&fc->lock); + ++ end_page_writeback(page); ++ + return 0; + + err_free: +Index: linux-3.10-3.10.11/dummy/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1153_3002e63bec05766a5af794b09d9cec34fda60519.txt 2014-04-28 00:36:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.patch --- linux-3.10.11/debian/patches/rpi/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.patch 2014-04-28 00:36:14.000000000 +0000 @@ -0,0 +1,44 @@ +commit eb97a45d12c9517b7846ebe3c97ee554b777ad34 +Author: Anand Avati +Date: Tue Aug 20 02:21:07 2013 -0400 + + fuse: invalidate inode attributes on xattr modification + + commit d331a415aef98717393dda0be69b7947da08eba3 upstream. + + Calls like setxattr and removexattr result in updation of ctime. + Therefore invalidate inode attributes to force a refresh. + + Signed-off-by: Anand Avati + Reviewed-by: Brian Foster + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/dir.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/dir.c 2014-04-27 23:39:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/dir.c 2014-04-28 00:36:14.000000000 +0000 +@@ -1753,6 +1753,8 @@ + fc->no_setxattr = 1; + err = -EOPNOTSUPP; + } ++ if (!err) ++ fuse_invalidate_attr(inode); + return err; + } + +@@ -1882,6 +1884,8 @@ + fc->no_removexattr = 1; + err = -EOPNOTSUPP; + } ++ if (!err) ++ fuse_invalidate_attr(inode); + return err; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1154_eb97a45d12c9517b7846ebe3c97ee554b777ad34.txt 2014-04-28 00:36:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.patch --- linux-3.10.11/debian/patches/rpi/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.patch 2014-04-28 00:36:15.000000000 +0000 @@ -0,0 +1,182 @@ +commit 4e208303119d234347b1f4337b84d47306e73811 +Author: Maxim Patlasov +Date: Fri Aug 30 17:06:04 2013 +0400 + + fuse: hotfix truncate_pagecache() issue + + commit 06a7c3c2781409af95000c60a5df743fd4e2f8b4 upstream. + + The way how fuse calls truncate_pagecache() from fuse_change_attributes() + is completely wrong. Because, w/o i_mutex held, we never sure whether + 'oldsize' and 'attr->size' are valid by the time of execution of + truncate_pagecache(inode, oldsize, attr->size). In fact, as soon as we + released fc->lock in the middle of fuse_change_attributes(), we completely + loose control of actions which may happen with given inode until we reach + truncate_pagecache. The list of potentially dangerous actions includes + mmap-ed reads and writes, ftruncate(2) and write(2) extending file size. + + The typical outcome of doing truncate_pagecache() with outdated arguments + is data corruption from user point of view. This is (in some sense) + acceptable in cases when the issue is triggered by a change of the file on + the server (i.e. externally wrt fuse operation), but it is absolutely + intolerable in scenarios when a single fuse client modifies a file without + any external intervention. A real life case I discovered by fsx-linux + looked like this: + + 1. Shrinking ftruncate(2) comes to fuse_do_setattr(). The latter sends + FUSE_SETATTR to the server synchronously, but before getting fc->lock ... + 2. fuse_dentry_revalidate() is asynchronously called. It sends FUSE_LOOKUP + to the server synchronously, then calls fuse_change_attributes(). The + latter updates i_size, releases fc->lock, but before comparing oldsize vs + attr->size.. + 3. fuse_do_setattr() from the first step proceeds by acquiring fc->lock and + updating attributes and i_size, but now oldsize is equal to + outarg.attr.size because i_size has just been updated (step 2). Hence, + fuse_do_setattr() returns w/o calling truncate_pagecache(). + 4. As soon as ftruncate(2) completes, the user extends file size by + write(2) making a hole in the middle of file, then reads data from the hole + either by read(2) or mmap-ed read. The user expects to get zero data from + the hole, but gets stale data because truncate_pagecache() is not executed + yet. + + The scenario above illustrates one side of the problem: not truncating the + page cache even though we should. Another side corresponds to truncating + page cache too late, when the state of inode changed significantly. + Theoretically, the following is possible: + + 1. As in the previous scenario fuse_dentry_revalidate() discovered that + i_size changed (due to our own fuse_do_setattr()) and is going to call + truncate_pagecache() for some 'new_size' it believes valid right now. But + by the time that particular truncate_pagecache() is called ... + 2. fuse_do_setattr() returns (either having called truncate_pagecache() or + not -- it doesn't matter). + 3. The file is extended either by write(2) or ftruncate(2) or fallocate(2). + 4. mmap-ed write makes a page in the extended region dirty. + + The result will be the lost of data user wrote on the fourth step. + + The patch is a hotfix resolving the issue in a simplistic way: let's skip + dangerous i_size update and truncate_pagecache if an operation changing + file size is in progress. This simplistic approach looks correct for the + cases w/o external changes. And to handle them properly, more sophisticated + and intrusive techniques (e.g. NFS-like one) would be required. I'd like to + postpone it until the issue is well discussed on the mailing list(s). + + Changed in v2: + - improved patch description to cover both sides of the issue. + + Signed-off-by: Maxim Patlasov + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/dir.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/dir.c 2014-04-28 00:36:14.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/dir.c 2014-04-28 00:36:15.000000000 +0000 +@@ -1594,6 +1594,7 @@ + struct file *file) + { + struct fuse_conn *fc = get_fuse_conn(inode); ++ struct fuse_inode *fi = get_fuse_inode(inode); + struct fuse_req *req; + struct fuse_setattr_in inarg; + struct fuse_attr_out outarg; +@@ -1621,8 +1622,10 @@ + if (IS_ERR(req)) + return PTR_ERR(req); + +- if (is_truncate) ++ if (is_truncate) { + fuse_set_nowrite(inode); ++ set_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); ++ } + + memset(&inarg, 0, sizeof(inarg)); + memset(&outarg, 0, sizeof(outarg)); +@@ -1684,12 +1687,14 @@ + invalidate_inode_pages2(inode->i_mapping); + } + ++ clear_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); + return 0; + + error: + if (is_truncate) + fuse_release_nowrite(inode); + ++ clear_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); + return err; + } + +Index: linux-3.10-3.10.11/fs/fuse/file.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/file.c 2014-04-28 00:36:13.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/file.c 2014-04-28 00:36:15.000000000 +0000 +@@ -630,7 +630,8 @@ + struct fuse_inode *fi = get_fuse_inode(inode); + + spin_lock(&fc->lock); +- if (attr_ver == fi->attr_version && size < inode->i_size) { ++ if (attr_ver == fi->attr_version && size < inode->i_size && ++ !test_bit(FUSE_I_SIZE_UNSTABLE, &fi->state)) { + fi->attr_version = ++fc->attr_version; + i_size_write(inode, size); + } +@@ -1033,12 +1034,16 @@ + { + struct inode *inode = mapping->host; + struct fuse_conn *fc = get_fuse_conn(inode); ++ struct fuse_inode *fi = get_fuse_inode(inode); + int err = 0; + ssize_t res = 0; + + if (is_bad_inode(inode)) + return -EIO; + ++ if (inode->i_size < pos + iov_iter_count(ii)) ++ set_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); ++ + do { + struct fuse_req *req; + ssize_t count; +@@ -1074,6 +1079,7 @@ + if (res > 0) + fuse_write_update_size(inode, pos); + ++ clear_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); + fuse_invalidate_attr(inode); + + return res > 0 ? res : err; +Index: linux-3.10-3.10.11/fs/fuse/fuse_i.h +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/fuse_i.h 2014-04-27 23:39:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/fuse_i.h 2014-04-28 00:36:15.000000000 +0000 +@@ -115,6 +115,8 @@ + enum { + /** Advise readdirplus */ + FUSE_I_ADVISE_RDPLUS, ++ /** An operation changing file size is in progress */ ++ FUSE_I_SIZE_UNSTABLE, + }; + + struct fuse_conn; +Index: linux-3.10-3.10.11/fs/fuse/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/inode.c 2014-04-27 23:39:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/inode.c 2014-04-28 00:36:15.000000000 +0000 +@@ -201,7 +201,8 @@ + struct timespec old_mtime; + + spin_lock(&fc->lock); +- if (attr_version != 0 && fi->attr_version > attr_version) { ++ if ((attr_version != 0 && fi->attr_version > attr_version) || ++ test_bit(FUSE_I_SIZE_UNSTABLE, &fi->state)) { + spin_unlock(&fc->lock); + return; + } +Index: linux-3.10-3.10.11/dummy/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1155_4e208303119d234347b1f4337b84d47306e73811.txt 2014-04-28 00:36:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.patch --- linux-3.10.11/debian/patches/rpi/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.patch 2014-04-28 00:36:16.000000000 +0000 @@ -0,0 +1,42 @@ +commit e5362560a01dd6fac5922434e16b16a1accea504 +Author: Miklos Szeredi +Date: Tue Sep 3 14:28:38 2013 +0200 + + fuse: readdir: check for slash in names + + commit efeb9e60d48f7778fdcad4a0f3ad9ea9b19e5dfd upstream. + + Userspace can add names containing a slash character to the directory + listing. Don't allow this as it could cause all sorts of trouble. + + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/dir.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/dir.c 2014-04-28 00:36:15.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/dir.c 2014-04-28 00:36:16.000000000 +0000 +@@ -1175,6 +1175,8 @@ + return -EIO; + if (reclen > nbytes) + break; ++ if (memchr(dirent->name, '/', dirent->namelen) != NULL) ++ return -EIO; + + over = filldir(dstbuf, dirent->name, dirent->namelen, + file->f_pos, dirent->ino, dirent->type); +@@ -1323,6 +1325,8 @@ + return -EIO; + if (reclen > nbytes) + break; ++ if (memchr(dirent->name, '/', dirent->namelen) != NULL) ++ return -EIO; + + if (!over) { + /* We fill entries into dstbuf only as much as +Index: linux-3.10-3.10.11/dummy/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1156_e5362560a01dd6fac5922434e16b16a1accea504.txt 2014-04-28 00:36:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.patch 2014-04-28 00:36:17.000000000 +0000 @@ -0,0 +1,24 @@ +commit cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd +Author: Greg Kroah-Hartman +Date: Thu Sep 26 17:18:49 2013 -0700 + + Linux 3.10.13 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:34:42.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:36:16.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 12 ++SUBLEVEL = 13 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1157_cff43fc8785eb4f8b3fa5a1030890fd8cad0cbdd.txt 2014-04-28 00:36:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.patch --- linux-3.10.11/debian/patches/rpi/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.patch 2014-04-28 00:36:18.000000000 +0000 @@ -0,0 +1,56 @@ +commit 65e8f55e673adae0177488ddb20444076f702a47 +Author: Rafael J. Wysocki +Date: Sat Sep 14 03:38:20 2013 +0200 + + PCI / ACPI / PM: Clear pme_poll for devices in D3cold on wakeup + + commit 834145156bedadfb50121f0bc5e9d9f9f942bcca upstream. + + Commit 448bd85 (PCI/PM: add PCIe runtime D3cold support) added a + piece of code to pci_acpi_wake_dev() causing that function to behave + in a special way for devices in D3cold (so that their configuration + registers are not accessed before those devices are resumed). + However, it didn't take the clearing of the pme_poll flag into + account. That has to be done for all devices, even if they are in + D3cold, or pci_pme_list_scan() will not know that wakeup has been + signaled for the device and will poll its PME Status bit + unnecessarily. + + Fix the problem by moving the clearing of the pme_poll flag in + pci_acpi_wake_dev() before the code introduced by commit 448bd85. + + Reported-and-tested-by: David E. Box + Signed-off-by: Rafael J. Wysocki + Acked-by: Bjorn Helgaas + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/pci/pci-acpi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/pci/pci-acpi.c 2014-04-27 23:39:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/pci/pci-acpi.c 2014-04-28 00:36:17.000000000 +0000 +@@ -47,6 +47,9 @@ + if (event != ACPI_NOTIFY_DEVICE_WAKE || !pci_dev) + return; + ++ if (pci_dev->pme_poll) ++ pci_dev->pme_poll = false; ++ + if (pci_dev->current_state == PCI_D3cold) { + pci_wakeup_event(pci_dev); + pm_runtime_resume(&pci_dev->dev); +@@ -57,9 +60,6 @@ + if (pci_dev->pme_support) + pci_check_pme_status(pci_dev); + +- if (pci_dev->pme_poll) +- pci_dev->pme_poll = false; +- + pci_wakeup_event(pci_dev); + pm_runtime_resume(&pci_dev->dev); + +Index: linux-3.10-3.10.11/dummy/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1158_65e8f55e673adae0177488ddb20444076f702a47.txt 2014-04-28 00:36:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.patch 2014-04-28 00:36:19.000000000 +0000 @@ -0,0 +1,35 @@ +commit 22df37406d8f90135b77ec6deb9950b68bcf3f4e +Author: Fabio Porcedda +Date: Mon Sep 16 11:47:50 2013 +0200 + + net: usb: cdc_ether: Use wwan interface for Telit modules + + commit 0092820407901a0b2c4e343e85f96bb7abfcded1 upstream. + + Signed-off-by: Fabio Porcedda + Acked-by: Oliver Neukum + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/usb/cdc_ether.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/cdc_ether.c 2014-04-27 23:39:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/cdc_ether.c 2014-04-28 00:36:18.000000000 +0000 +@@ -709,6 +709,11 @@ + .bInterfaceProtocol = USB_CDC_PROTO_NONE, + .driver_info = (unsigned long)&wwan_info, + }, { ++ /* Telit modules */ ++ USB_VENDOR_AND_INTERFACE_INFO(0x1bc7, USB_CLASS_COMM, ++ USB_CDC_SUBCLASS_ETHERNET, USB_CDC_PROTO_NONE), ++ .driver_info = (kernel_ulong_t) &wwan_info, ++}, { + USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ETHERNET, + USB_CDC_PROTO_NONE), + .driver_info = (unsigned long) &cdc_info, +Index: linux-3.10-3.10.11/dummy/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1159_22df37406d8f90135b77ec6deb9950b68bcf3f4e.txt 2014-04-28 00:36:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.patch --- linux-3.10.11/debian/patches/rpi/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.patch 2014-04-28 00:36:19.000000000 +0000 @@ -0,0 +1,34 @@ +commit b1bf3479808bfb56cec46edf5dd9f47364715f46 +Author: Miklos Szeredi +Date: Mon Sep 16 14:51:59 2013 +0200 + + cifs: fix filp leak in cifs_atomic_open() + + commit dfb1d61b0e9f9e2c542e9adc8d970689f4114ff6 upstream. + + If an error occurs after having called finish_open() then fput() needs to + be called on the already opened file. + + Signed-off-by: Miklos Szeredi + Cc: Steve French + Signed-off-by: Al Viro + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/cifs/dir.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/cifs/dir.c 2014-04-27 23:39:37.000000000 +0000 ++++ linux-3.10-3.10.11/fs/cifs/dir.c 2014-04-28 00:36:19.000000000 +0000 +@@ -491,6 +491,7 @@ + if (server->ops->close) + server->ops->close(xid, tcon, &fid); + cifs_del_pending_open(&open); ++ fput(file); + rc = -ENOMEM; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1160_b1bf3479808bfb56cec46edf5dd9f47364715f46.txt 2014-04-28 00:36:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.patch --- linux-3.10.11/debian/patches/rpi/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.patch 2014-04-28 00:36:20.000000000 +0000 @@ -0,0 +1,51 @@ +commit 86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820 +Author: RafaÅ‚ MiÅ‚ecki +Date: Sun Sep 15 00:22:47 2013 +0200 + + bgmac: fix internal switch initialization + + commit 6a391e7bf26c04a6df5f77290e1146941d210d49 upstream. + + Some devices (BCM4749, BCM5357, BCM53572) have internal switch that + requires initialization. We already have code for this, but because + of the typo in code it was never working. This resulted in network not + working for some routers and possibility of soft-bricking them. + + Use correct bit for switch initialization and fix typo in the define. + + Signed-off-by: RafaÅ‚ MiÅ‚ecki + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bgmac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/bgmac.c 2014-04-27 23:39:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bgmac.c 2014-04-28 00:36:20.000000000 +0000 +@@ -908,7 +908,7 @@ + struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc; + u8 et_swtype = 0; + u8 sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHY | +- BGMAC_CHIPCTL_1_IF_TYPE_RMII; ++ BGMAC_CHIPCTL_1_IF_TYPE_MII; + char buf[2]; + + if (bcm47xx_nvram_getenv("et_swtype", buf, 1) > 0) { +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bgmac.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/bgmac.h 2014-04-27 23:39:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bgmac.h 2014-04-28 00:36:20.000000000 +0000 +@@ -333,7 +333,7 @@ + + #define BGMAC_CHIPCTL_1_IF_TYPE_MASK 0x00000030 + #define BGMAC_CHIPCTL_1_IF_TYPE_RMII 0x00000000 +-#define BGMAC_CHIPCTL_1_IF_TYPE_MI 0x00000010 ++#define BGMAC_CHIPCTL_1_IF_TYPE_MII 0x00000010 + #define BGMAC_CHIPCTL_1_IF_TYPE_RGMII 0x00000020 + #define BGMAC_CHIPCTL_1_SW_TYPE_MASK 0x000000C0 + #define BGMAC_CHIPCTL_1_SW_TYPE_EPHY 0x00000000 +Index: linux-3.10-3.10.11/dummy/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1161_86f7c9950b9378ed4d9e9bf8fbdf515d03fa6820.txt 2014-04-28 00:36:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.patch 2014-04-28 00:36:21.000000000 +0000 @@ -0,0 +1,46 @@ +commit beb6f0e8d246adca601d786d206d414d1d0a549b +Author: Stanislaw Gruszka +Date: Mon Aug 26 15:18:53 2013 +0200 + + rt2800: fix wrong TX power compensation + + commit 6e956da2027c767859128b9bfef085cf2a8e233b upstream. + + We should not do temperature compensation on devices without + EXTERNAL_TX_ALC bit set (called DynamicTxAgcControl on vendor driver). + Such devices can have totally bogus TSSI parameters on the EEPROM, + but still threaded by us as valid and result doing wrong TX power + calculations. + + This fix inability to connect to AP on slightly longer distance on + some Ralink chips/devices. + + Reported-and-tested-by: Fabien ADAM + Signed-off-by: Stanislaw Gruszka + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-27 23:39:36.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-28 00:36:21.000000000 +0000 +@@ -2767,6 +2767,13 @@ + int i; + + /* ++ * First check if temperature compensation is supported. ++ */ ++ rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); ++ if (!rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_EXTERNAL_TX_ALC)) ++ return 0; ++ ++ /* + * Read TSSI boundaries for temperature compensation from + * the EEPROM. + * +Index: linux-3.10-3.10.11/dummy/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1162_beb6f0e8d246adca601d786d206d414d1d0a549b.txt 2014-04-28 00:36:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.patch 2014-04-28 00:36:22.000000000 +0000 @@ -0,0 +1,112 @@ +commit 63946e8616205dafe39b4d88f9fc3dc7c4fd79aa +Author: John Stultz +Date: Wed Sep 11 16:50:56 2013 -0700 + + timekeeping: Fix HRTICK related deadlock from ntp lock changes + + commit 7bd36014460f793c19e7d6c94dab67b0afcfcb7f upstream. + + Gerlando Falauto reported that when HRTICK is enabled, it is + possible to trigger system deadlocks. These were hard to + reproduce, as HRTICK has been broken in the past, but seemed + to be connected to the timekeeping_seq lock. + + Since seqlock/seqcount's aren't supported w/ lockdep, I added + some extra spinlock based locking and triggered the following + lockdep output: + + [ 15.849182] ntpd/4062 is trying to acquire lock: + [ 15.849765] (&(&pool->lock)->rlock){..-...}, at: [] __queue_work+0x145/0x480 + [ 15.850051] + [ 15.850051] but task is already holding lock: + [ 15.850051] (timekeeper_lock){-.-.-.}, at: [] do_adjtimex+0x7f/0x100 + + + + [ 15.850051] Chain exists of: &(&pool->lock)->rlock --> &p->pi_lock --> timekeeper_lock + [ 15.850051] Possible unsafe locking scenario: + [ 15.850051] + [ 15.850051] CPU0 CPU1 + [ 15.850051] ---- ---- + [ 15.850051] lock(timekeeper_lock); + [ 15.850051] lock(&p->pi_lock); + [ 15.850051] lock(timekeeper_lock); + [ 15.850051] lock(&(&pool->lock)->rlock); + [ 15.850051] + [ 15.850051] *** DEADLOCK *** + + The deadlock was introduced by 06c017fdd4dc48451a ("timekeeping: + Hold timekeepering locks in do_adjtimex and hardpps") in 3.10 + + This patch avoids this deadlock, by moving the call to + schedule_delayed_work() outside of the timekeeper lock + critical section. + + Reported-by: Gerlando Falauto + Tested-by: Lin Ming + Signed-off-by: John Stultz + Cc: Mathieu Desnoyers + Link: http://lkml.kernel.org/r/1378943457-27314-1-git-send-email-john.stultz@linaro.org + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/timex.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/timex.h 2014-04-27 23:39:36.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/timex.h 2014-04-28 00:36:22.000000000 +0000 +@@ -141,6 +141,7 @@ + extern void hardpps(const struct timespec *, const struct timespec *); + + int read_current_timer(unsigned long *timer_val); ++void ntp_notify_cmos_timer(void); + + /* The clock frequency of the i8253/i8254 PIT */ + #define PIT_TICK_RATE 1193182ul +Index: linux-3.10-3.10.11/kernel/time/ntp.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/time/ntp.c 2014-04-27 23:39:36.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/time/ntp.c 2014-04-28 00:36:22.000000000 +0000 +@@ -516,13 +516,13 @@ + schedule_delayed_work(&sync_cmos_work, timespec_to_jiffies(&next)); + } + +-static void notify_cmos_timer(void) ++void ntp_notify_cmos_timer(void) + { + schedule_delayed_work(&sync_cmos_work, 0); + } + + #else +-static inline void notify_cmos_timer(void) { } ++void ntp_notify_cmos_timer(void) { } + #endif + + +@@ -687,8 +687,6 @@ + if (!(time_status & STA_NANO)) + txc->time.tv_usec /= NSEC_PER_USEC; + +- notify_cmos_timer(); +- + return result; + } + +Index: linux-3.10-3.10.11/kernel/time/timekeeping.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/time/timekeeping.c 2014-04-27 23:39:36.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/time/timekeeping.c 2014-04-28 00:36:22.000000000 +0000 +@@ -1682,6 +1682,8 @@ + write_seqcount_end(&timekeeper_seq); + raw_spin_unlock_irqrestore(&timekeeper_lock, flags); + ++ ntp_notify_cmos_timer(); ++ + return ret; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1163_63946e8616205dafe39b4d88f9fc3dc7c4fd79aa.txt 2014-04-28 00:36:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.patch 2014-04-28 00:36:23.000000000 +0000 @@ -0,0 +1,95 @@ +commit 013b14c3067f0d55ab115405647d9f035f67737e +Author: Stanislaw Gruszka +Date: Wed Sep 4 15:16:03 2013 +0200 + + sched/cputime: Do not scale when utime == 0 + + commit 5a8e01f8fa51f5cbce8f37acc050eb2319d12956 upstream. + + scale_stime() silently assumes that stime < rtime, otherwise + when stime == rtime and both values are big enough (operations + on them do not fit in 32 bits), the resulting scaling stime can + be bigger than rtime. In consequence utime = rtime - stime + results in negative value. + + User space visible symptoms of the bug are overflowed TIME + values on ps/top, for example: + + $ ps aux | grep rcu + root 8 0.0 0.0 0 0 ? S 12:42 0:00 [rcuc/0] + root 9 0.0 0.0 0 0 ? S 12:42 0:00 [rcub/0] + root 10 62422329 0.0 0 0 ? R 12:42 21114581:37 [rcu_preempt] + root 11 0.1 0.0 0 0 ? S 12:42 0:02 [rcuop/0] + root 12 62422329 0.0 0 0 ? S 12:42 21114581:35 [rcuop/1] + root 10 62422329 0.0 0 0 ? R 12:42 21114581:37 [rcu_preempt] + + or overflowed utime values read directly from /proc/$PID/stat + + Reference: + + https://lkml.org/lkml/2013/8/20/259 + + Reported-and-tested-by: Sergey Senozhatsky + Signed-off-by: Stanislaw Gruszka + Cc: stable@vger.kernel.org + Cc: Frederic Weisbecker + Cc: Peter Zijlstra + Cc: Paul E. McKenney + Cc: Borislav Petkov + Link: http://lkml.kernel.org/r/20130904131602.GC2564@redhat.com + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/sched/cputime.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/sched/cputime.c 2014-04-27 23:39:36.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/sched/cputime.c 2014-04-28 00:36:23.000000000 +0000 +@@ -558,7 +558,7 @@ + struct cputime *prev, + cputime_t *ut, cputime_t *st) + { +- cputime_t rtime, stime, utime, total; ++ cputime_t rtime, stime, utime; + + if (vtime_accounting_enabled()) { + *ut = curr->utime; +@@ -566,9 +566,6 @@ + return; + } + +- stime = curr->stime; +- total = stime + curr->utime; +- + /* + * Tick based cputime accounting depend on random scheduling + * timeslices of a task to be interrupted or not by the timer. +@@ -589,13 +586,19 @@ + if (prev->stime + prev->utime >= rtime) + goto out; + +- if (total) { ++ stime = curr->stime; ++ utime = curr->utime; ++ ++ if (utime == 0) { ++ stime = rtime; ++ } else if (stime == 0) { ++ utime = rtime; ++ } else { ++ cputime_t total = stime + utime; ++ + stime = scale_stime((__force u64)stime, + (__force u64)rtime, (__force u64)total); + utime = rtime - stime; +- } else { +- stime = rtime; +- utime = 0; + } + + /* +Index: linux-3.10-3.10.11/dummy/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1164_013b14c3067f0d55ab115405647d9f035f67737e.txt 2014-04-28 00:36:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.patch 2014-04-28 00:36:24.000000000 +0000 @@ -0,0 +1,93 @@ +commit 51f5294797f14185f9b25ad0972a4abbbeff70c6 +Author: Daisuke Nishimura +Date: Tue Sep 10 18:16:36 2013 +0900 + + sched/fair: Fix small race where child->se.parent,cfs_rq might point to invalid ones + + commit 6c9a27f5da9609fca46cb2b183724531b48f71ad upstream. + + There is a small race between copy_process() and cgroup_attach_task() + where child->se.parent,cfs_rq points to invalid (old) ones. + + parent doing fork() | someone moving the parent to another cgroup + -------------------------------+--------------------------------------------- + copy_process() + + dup_task_struct() + -> parent->se is copied to child->se. + se.parent,cfs_rq of them point to old ones. + + cgroup_attach_task() + + cgroup_task_migrate() + -> parent->cgroup is updated. + + cpu_cgroup_attach() + + sched_move_task() + + task_move_group_fair() + +- set_task_rq() + -> se.parent,cfs_rq of parent + are updated. + + + cgroup_fork() + -> parent->cgroup is copied to child->cgroup. (*1) + + sched_fork() + + task_fork_fair() + -> se.parent,cfs_rq of child are accessed + while they point to old ones. (*2) + + In the worst case, this bug can lead to "use-after-free" and cause a panic, + because it's new cgroup's refcount that is incremented at (*1), + so the old cgroup(and related data) can be freed before (*2). + + In fact, a panic caused by this bug was originally caught in RHEL6.4. + + BUG: unable to handle kernel NULL pointer dereference at (null) + IP: [] sched_slice+0x6e/0xa0 + [...] + Call Trace: + [] place_entity+0x75/0xa0 + [] task_fork_fair+0xaa/0x160 + [] sched_fork+0x6b/0x140 + [] copy_process+0x5b2/0x1450 + [] ? wake_up_new_task+0xd9/0x130 + [] do_fork+0x94/0x460 + [] ? sys_wait4+0xae/0x100 + [] sys_clone+0x28/0x30 + [] stub_clone+0x13/0x20 + [] ? system_call_fastpath+0x16/0x1b + + Signed-off-by: Daisuke Nishimura + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/039601ceae06$733d3130$59b79390$@mxp.nes.nec.co.jp + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/sched/fair.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/sched/fair.c 2014-04-27 23:39:35.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/sched/fair.c 2014-04-28 00:36:23.000000000 +0000 +@@ -5778,11 +5778,15 @@ + cfs_rq = task_cfs_rq(current); + curr = cfs_rq->curr; + +- if (unlikely(task_cpu(p) != this_cpu)) { +- rcu_read_lock(); +- __set_task_cpu(p, this_cpu); +- rcu_read_unlock(); +- } ++ /* ++ * Not only the cpu but also the task_group of the parent might have ++ * been changed after parent->se.parent,cfs_rq were copied to ++ * child->se.parent,cfs_rq. So call __set_task_cpu() to make those ++ * of child point to valid ones. ++ */ ++ rcu_read_lock(); ++ __set_task_cpu(p, this_cpu); ++ rcu_read_unlock(); + + update_curr(cfs_rq); + +Index: linux-3.10-3.10.11/dummy/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1165_51f5294797f14185f9b25ad0972a4abbbeff70c6.txt 2014-04-28 00:36:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.patch 2014-04-28 00:36:25.000000000 +0000 @@ -0,0 +1,108 @@ +commit 791abfbee86161ad63bddc6af88c0391ef7332bd +Author: Kees Cook +Date: Wed Sep 11 21:56:50 2013 +0200 + + HID: provide a helper for validating hid reports + + commit 331415ff16a12147d57d5c953f3a961b7ede348b upstream. + + Many drivers need to validate the characteristics of their HID report + during initialization to avoid misusing the reports. This adds a common + helper to perform validation of the report exisitng, the field existing, + and the expected number of values within the field. + + Signed-off-by: Kees Cook + Reviewed-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-28 00:35:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:36:24.000000000 +0000 +@@ -759,6 +759,64 @@ + } + EXPORT_SYMBOL_GPL(hid_parse_report); + ++static const char * const hid_report_names[] = { ++ "HID_INPUT_REPORT", ++ "HID_OUTPUT_REPORT", ++ "HID_FEATURE_REPORT", ++}; ++/** ++ * hid_validate_values - validate existing device report's value indexes ++ * ++ * @device: hid device ++ * @type: which report type to examine ++ * @id: which report ID to examine (0 for first) ++ * @field_index: which report field to examine ++ * @report_counts: expected number of values ++ * ++ * Validate the number of values in a given field of a given report, after ++ * parsing. ++ */ ++struct hid_report *hid_validate_values(struct hid_device *hid, ++ unsigned int type, unsigned int id, ++ unsigned int field_index, ++ unsigned int report_counts) ++{ ++ struct hid_report *report; ++ ++ if (type > HID_FEATURE_REPORT) { ++ hid_err(hid, "invalid HID report type %u\n", type); ++ return NULL; ++ } ++ ++ if (id >= HID_MAX_IDS) { ++ hid_err(hid, "invalid HID report id %u\n", id); ++ return NULL; ++ } ++ ++ /* ++ * Explicitly not using hid_get_report() here since it depends on ++ * ->numbered being checked, which may not always be the case when ++ * drivers go to access report values. ++ */ ++ report = hid->report_enum[type].report_id_hash[id]; ++ if (!report) { ++ hid_err(hid, "missing %s %u\n", hid_report_names[type], id); ++ return NULL; ++ } ++ if (report->maxfield <= field_index) { ++ hid_err(hid, "not enough fields in %s %u\n", ++ hid_report_names[type], id); ++ return NULL; ++ } ++ if (report->field[field_index]->report_count < report_counts) { ++ hid_err(hid, "not enough values in %s %u field %u\n", ++ hid_report_names[type], id, field_index); ++ return NULL; ++ } ++ return report; ++} ++EXPORT_SYMBOL_GPL(hid_validate_values); ++ + /** + * hid_open_report - open a driver-specific device report + * +Index: linux-3.10-3.10.11/include/linux/hid.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/hid.h 2014-04-28 00:35:38.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/hid.h 2014-04-28 00:36:24.000000000 +0000 +@@ -749,6 +749,10 @@ + struct hid_device *hid_allocate_device(void); + struct hid_report *hid_register_report(struct hid_device *device, unsigned type, unsigned id); + int hid_parse_report(struct hid_device *hid, __u8 *start, unsigned size); ++struct hid_report *hid_validate_values(struct hid_device *hid, ++ unsigned int type, unsigned int id, ++ unsigned int field_index, ++ unsigned int report_counts); + int hid_open_report(struct hid_device *device); + int hid_check_keys_pressed(struct hid_device *hid); + int hid_connect(struct hid_device *hid, unsigned int connect_mask); +Index: linux-3.10-3.10.11/dummy/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1166_791abfbee86161ad63bddc6af88c0391ef7332bd.txt 2014-04-28 00:36:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.patch 2014-04-28 00:36:25.000000000 +0000 @@ -0,0 +1,138 @@ +commit ae5c98a48258dbdb742be23eadf9261b70d642c3 +Author: Benjamin Tissoires +Date: Wed Sep 11 21:56:57 2013 +0200 + + HID: validate feature and input report details + + commit cc6b54aa54bf40b762cab45a9fc8aa81653146eb upstream. + + When dealing with usage_index, be sure to properly use unsigned instead of + int to avoid overflows. + + When working on report fields, always validate that their report_counts are + in bounds. + Without this, a HID device could report a malicious feature report that + could trick the driver into a heap overflow: + + [ 634.885003] usb 1-1: New USB device found, idVendor=0596, idProduct=0500 + ... + [ 676.469629] BUG kmalloc-192 (Tainted: G W ): Redzone overwritten + + CVE-2013-2897 + + Signed-off-by: Benjamin Tissoires + Acked-by: Kees Cook + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-28 00:36:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:36:25.000000000 +0000 +@@ -94,7 +94,6 @@ + static struct hid_field *hid_register_field(struct hid_report *report, unsigned usages, unsigned values) + { + struct hid_field *field; +- int i; + + if (report->maxfield == HID_MAX_FIELDS) { + hid_err(report->device, "too many fields in report\n"); +@@ -113,9 +112,6 @@ + field->value = (s32 *)(field->usage + usages); + field->report = report; + +- for (i = 0; i < usages; i++) +- field->usage[i].usage_index = i; +- + return field; + } + +@@ -226,9 +222,9 @@ + { + struct hid_report *report; + struct hid_field *field; +- int usages; ++ unsigned usages; + unsigned offset; +- int i; ++ unsigned i; + + report = hid_register_report(parser->device, report_type, parser->global.report_id); + if (!report) { +@@ -255,7 +251,8 @@ + if (!parser->local.usage_index) /* Ignore padding fields */ + return 0; + +- usages = max_t(int, parser->local.usage_index, parser->global.report_count); ++ usages = max_t(unsigned, parser->local.usage_index, ++ parser->global.report_count); + + field = hid_register_field(report, usages, parser->global.report_count); + if (!field) +@@ -266,13 +263,14 @@ + field->application = hid_lookup_collection(parser, HID_COLLECTION_APPLICATION); + + for (i = 0; i < usages; i++) { +- int j = i; ++ unsigned j = i; + /* Duplicate the last usage we parsed if we have excess values */ + if (i >= parser->local.usage_index) + j = parser->local.usage_index - 1; + field->usage[i].hid = parser->local.usage[j]; + field->usage[i].collection_index = + parser->local.collection_index[j]; ++ field->usage[i].usage_index = i; + } + + field->maxusage = usages; +@@ -1295,7 +1293,7 @@ + goto out; + } + +- if (hid->claimed != HID_CLAIMED_HIDRAW) { ++ if (hid->claimed != HID_CLAIMED_HIDRAW && report->maxfield) { + for (a = 0; a < report->maxfield; a++) + hid_input_field(hid, report->field[a], cdata, interrupt); + hdrv = hid->driver; +Index: linux-3.10-3.10.11/drivers/hid/hid-input.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-input.c 2014-04-28 00:35:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-input.c 2014-04-28 00:36:25.000000000 +0000 +@@ -485,6 +485,10 @@ + if (field->flags & HID_MAIN_ITEM_CONSTANT) + goto ignore; + ++ /* Ignore if report count is out of bounds. */ ++ if (field->report_count < 1) ++ goto ignore; ++ + /* only LED usages are supported in output fields */ + if (field->report_type == HID_OUTPUT_REPORT && + (usage->hid & HID_USAGE_PAGE) != HID_UP_LED) { +@@ -1163,7 +1167,11 @@ + + rep_enum = &hid->report_enum[HID_FEATURE_REPORT]; + list_for_each_entry(rep, &rep_enum->report_list, list) +- for (i = 0; i < rep->maxfield; i++) ++ for (i = 0; i < rep->maxfield; i++) { ++ /* Ignore if report count is out of bounds. */ ++ if (rep->field[i]->report_count < 1) ++ continue; ++ + for (j = 0; j < rep->field[i]->maxusage; j++) { + /* Verify if Battery Strength feature is available */ + hidinput_setup_battery(hid, HID_FEATURE_REPORT, rep->field[i]); +@@ -1172,6 +1180,7 @@ + drv->feature_mapping(hid, rep->field[i], + rep->field[i]->usage + j); + } ++ } + } + + static struct hid_input *hidinput_allocate(struct hid_device *hid) +Index: linux-3.10-3.10.11/dummy/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1167_ae5c98a48258dbdb742be23eadf9261b70d642c3.txt 2014-04-28 00:36:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.patch --- linux-3.10.11/debian/patches/rpi/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.patch 2014-04-28 00:36:26.000000000 +0000 @@ -0,0 +1,88 @@ +commit 9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab +Author: Benjamin Tissoires +Date: Wed Sep 11 21:56:58 2013 +0200 + + HID: multitouch: validate indexes details + + commit 8821f5dc187bdf16cfb32ef5aa8c3035273fa79a upstream. + + When working on report indexes, always validate that they are in bounds. + Without this, a HID device could report a malicious feature report that + could trick the driver into a heap overflow: + + [ 634.885003] usb 1-1: New USB device found, idVendor=0596, idProduct=0500 + ... + [ 676.469629] BUG kmalloc-192 (Tainted: G W ): Redzone overwritten + + Note that we need to change the indexes from s8 to s16 as they can + be between -1 and 255. + + CVE-2013-2897 + + Signed-off-by: Benjamin Tissoires + Acked-by: Kees Cook + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-multitouch.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-multitouch.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-multitouch.c 2014-04-28 00:36:26.000000000 +0000 +@@ -101,9 +101,9 @@ + unsigned last_slot_field; /* the last field of a slot */ + unsigned mt_report_id; /* the report ID of the multitouch device */ + unsigned pen_report_id; /* the report ID of the pen device */ +- __s8 inputmode; /* InputMode HID feature, -1 if non-existent */ +- __s8 inputmode_index; /* InputMode HID feature index in the report */ +- __s8 maxcontact_report_id; /* Maximum Contact Number HID feature, ++ __s16 inputmode; /* InputMode HID feature, -1 if non-existent */ ++ __s16 inputmode_index; /* InputMode HID feature index in the report */ ++ __s16 maxcontact_report_id; /* Maximum Contact Number HID feature, + -1 if non-existent */ + __u8 num_received; /* how many contacts we received */ + __u8 num_expected; /* expected last contact index */ +@@ -317,20 +317,18 @@ + struct hid_field *field, struct hid_usage *usage) + { + struct mt_device *td = hid_get_drvdata(hdev); +- int i; + + switch (usage->hid) { + case HID_DG_INPUTMODE: +- td->inputmode = field->report->id; +- td->inputmode_index = 0; /* has to be updated below */ +- +- for (i=0; i < field->maxusage; i++) { +- if (field->usage[i].hid == usage->hid) { +- td->inputmode_index = i; +- break; +- } ++ /* Ignore if value index is out of bounds. */ ++ if (usage->usage_index >= field->report_count) { ++ dev_err(&hdev->dev, "HID_DG_INPUTMODE out of range\n"); ++ break; + } + ++ td->inputmode = field->report->id; ++ td->inputmode_index = usage->usage_index; ++ + break; + case HID_DG_CONTACTMAX: + td->maxcontact_report_id = field->report->id; +@@ -536,6 +534,10 @@ + mt_store_field(usage, td, hi); + return 1; + case HID_DG_CONTACTCOUNT: ++ /* Ignore if indexes are out of bounds. */ ++ if (field->index >= field->report->maxfield || ++ usage->usage_index >= field->report_count) ++ return 1; + td->cc_index = field->index; + td->cc_value_index = usage->usage_index; + return 1; +Index: linux-3.10-3.10.11/dummy/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1168_9f3383881d9b8f2ea3a1e8453e4e62a57b4af9ab.txt 2014-04-28 00:36:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.patch --- linux-3.10.11/debian/patches/rpi/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.patch 2014-04-28 00:36:27.000000000 +0000 @@ -0,0 +1,194 @@ +commit 2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35 +Author: Kees Cook +Date: Wed Sep 11 21:56:54 2013 +0200 + + HID: LG: validate HID output report details + + commit 0fb6bd06e06792469acc15bbe427361b56ada528 upstream. + + A HID device could send a malicious output report that would cause the + lg, lg3, and lg4 HID drivers to write beyond the output report allocation + during an event, causing a heap overflow: + + [ 325.245240] usb 1-1: New USB device found, idVendor=046d, idProduct=c287 + ... + [ 414.518960] BUG kmalloc-4096 (Not tainted): Redzone overwritten + + Additionally, while lg2 did correctly validate the report details, it was + cleaned up and shortened. + + CVE-2013-2893 + + Signed-off-by: Kees Cook + Reviewed-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-lg2ff.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lg2ff.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lg2ff.c 2014-04-28 00:36:27.000000000 +0000 +@@ -64,26 +64,13 @@ + struct hid_report *report; + struct hid_input *hidinput = list_entry(hid->inputs.next, + struct hid_input, list); +- struct list_head *report_list = +- &hid->report_enum[HID_OUTPUT_REPORT].report_list; + struct input_dev *dev = hidinput->input; + int error; + +- if (list_empty(report_list)) { +- hid_err(hid, "no output report found\n"); ++ /* Check that the report looks ok */ ++ report = hid_validate_values(hid, HID_OUTPUT_REPORT, 0, 0, 7); ++ if (!report) + return -ENODEV; +- } +- +- report = list_entry(report_list->next, struct hid_report, list); +- +- if (report->maxfield < 1) { +- hid_err(hid, "output report is empty\n"); +- return -ENODEV; +- } +- if (report->field[0]->report_count < 7) { +- hid_err(hid, "not enough values in the field\n"); +- return -ENODEV; +- } + + lg2ff = kmalloc(sizeof(struct lg2ff_device), GFP_KERNEL); + if (!lg2ff) +Index: linux-3.10-3.10.11/drivers/hid/hid-lg3ff.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lg3ff.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lg3ff.c 2014-04-28 00:36:27.000000000 +0000 +@@ -66,10 +66,11 @@ + int x, y; + + /* +- * Maxusage should always be 63 (maximum fields) +- * likely a better way to ensure this data is clean ++ * Available values in the field should always be 63, but we only use up to ++ * 35. Instead, clear the entire area, however big it is. + */ +- memset(report->field[0]->value, 0, sizeof(__s32)*report->field[0]->maxusage); ++ memset(report->field[0]->value, 0, ++ sizeof(__s32) * report->field[0]->report_count); + + switch (effect->type) { + case FF_CONSTANT: +@@ -129,32 +130,14 @@ + int lg3ff_init(struct hid_device *hid) + { + struct hid_input *hidinput = list_entry(hid->inputs.next, struct hid_input, list); +- struct list_head *report_list = &hid->report_enum[HID_OUTPUT_REPORT].report_list; + struct input_dev *dev = hidinput->input; +- struct hid_report *report; +- struct hid_field *field; + const signed short *ff_bits = ff3_joystick_ac; + int error; + int i; + +- /* Find the report to use */ +- if (list_empty(report_list)) { +- hid_err(hid, "No output report found\n"); +- return -1; +- } +- + /* Check that the report looks ok */ +- report = list_entry(report_list->next, struct hid_report, list); +- if (!report) { +- hid_err(hid, "NULL output report\n"); +- return -1; +- } +- +- field = report->field[0]; +- if (!field) { +- hid_err(hid, "NULL field\n"); +- return -1; +- } ++ if (!hid_validate_values(hid, HID_OUTPUT_REPORT, 0, 0, 35)) ++ return -ENODEV; + + /* Assume single fixed device G940 */ + for (i = 0; ff_bits[i] >= 0; i++) +Index: linux-3.10-3.10.11/drivers/hid/hid-lg4ff.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lg4ff.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lg4ff.c 2014-04-28 00:36:27.000000000 +0000 +@@ -484,34 +484,16 @@ + int lg4ff_init(struct hid_device *hid) + { + struct hid_input *hidinput = list_entry(hid->inputs.next, struct hid_input, list); +- struct list_head *report_list = &hid->report_enum[HID_OUTPUT_REPORT].report_list; + struct input_dev *dev = hidinput->input; +- struct hid_report *report; +- struct hid_field *field; + struct lg4ff_device_entry *entry; + struct lg_drv_data *drv_data; + struct usb_device_descriptor *udesc; + int error, i, j; + __u16 bcdDevice, rev_maj, rev_min; + +- /* Find the report to use */ +- if (list_empty(report_list)) { +- hid_err(hid, "No output report found\n"); +- return -1; +- } +- + /* Check that the report looks ok */ +- report = list_entry(report_list->next, struct hid_report, list); +- if (!report) { +- hid_err(hid, "NULL output report\n"); +- return -1; +- } +- +- field = report->field[0]; +- if (!field) { +- hid_err(hid, "NULL field\n"); ++ if (!hid_validate_values(hid, HID_OUTPUT_REPORT, 0, 0, 7)) + return -1; +- } + + /* Check what wheel has been connected */ + for (i = 0; i < ARRAY_SIZE(lg4ff_devices); i++) { +Index: linux-3.10-3.10.11/drivers/hid/hid-lgff.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lgff.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lgff.c 2014-04-28 00:36:27.000000000 +0000 +@@ -128,27 +128,14 @@ + int lgff_init(struct hid_device* hid) + { + struct hid_input *hidinput = list_entry(hid->inputs.next, struct hid_input, list); +- struct list_head *report_list = &hid->report_enum[HID_OUTPUT_REPORT].report_list; + struct input_dev *dev = hidinput->input; +- struct hid_report *report; +- struct hid_field *field; + const signed short *ff_bits = ff_joystick; + int error; + int i; + +- /* Find the report to use */ +- if (list_empty(report_list)) { +- hid_err(hid, "No output report found\n"); +- return -1; +- } +- + /* Check that the report looks ok */ +- report = list_entry(report_list->next, struct hid_report, list); +- field = report->field[0]; +- if (!field) { +- hid_err(hid, "NULL field\n"); +- return -1; +- } ++ if (!hid_validate_values(hid, HID_OUTPUT_REPORT, 0, 0, 7)) ++ return -ENODEV; + + for (i = 0; i < ARRAY_SIZE(devices); i++) { + if (dev->id.vendor == devices[i].idVendor && +Index: linux-3.10-3.10.11/dummy/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1169_2ec96f1b2beb4f755a61ee961ae2dbd7ad922a35.txt 2014-04-28 00:36:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.patch --- linux-3.10.11/debian/patches/rpi/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.patch 2014-04-28 00:36:28.000000000 +0000 @@ -0,0 +1,61 @@ +commit be3cdbf50f4f72325d145318d6ce02acad478925 +Author: Kees Cook +Date: Wed Sep 11 21:56:51 2013 +0200 + + HID: zeroplus: validate output report details + + commit 78214e81a1bf43740ce89bb5efda78eac2f8ef83 upstream. + + The zeroplus HID driver was not checking the size of allocated values + in fields it used. A HID device could send a malicious output report + that would cause the driver to write beyond the output report allocation + during initialization, causing a heap overflow: + + [ 1442.728680] usb 1-1: New USB device found, idVendor=0c12, idProduct=0005 + ... + [ 1466.243173] BUG kmalloc-192 (Tainted: G W ): Redzone overwritten + + CVE-2013-2889 + + Signed-off-by: Kees Cook + Reviewed-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-zpff.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-zpff.c 2014-04-27 23:39:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-zpff.c 2014-04-28 00:36:28.000000000 +0000 +@@ -68,21 +68,13 @@ + struct hid_report *report; + struct hid_input *hidinput = list_entry(hid->inputs.next, + struct hid_input, list); +- struct list_head *report_list = +- &hid->report_enum[HID_OUTPUT_REPORT].report_list; + struct input_dev *dev = hidinput->input; +- int error; ++ int i, error; + +- if (list_empty(report_list)) { +- hid_err(hid, "no output report found\n"); +- return -ENODEV; +- } +- +- report = list_entry(report_list->next, struct hid_report, list); +- +- if (report->maxfield < 4) { +- hid_err(hid, "not enough fields in report\n"); +- return -ENODEV; ++ for (i = 0; i < 4; i++) { ++ report = hid_validate_values(hid, HID_OUTPUT_REPORT, 0, i, 1); ++ if (!report) ++ return -ENODEV; + } + + zpff = kzalloc(sizeof(struct zpff_device), GFP_KERNEL); +Index: linux-3.10-3.10.11/dummy/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1170_be3cdbf50f4f72325d145318d6ce02acad478925.txt 2014-04-28 00:36:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.patch 2014-04-28 00:36:29.000000000 +0000 @@ -0,0 +1,61 @@ +commit 30c1e32f6fb5b48d6fd1625858c25b38af9ee91f +Author: Benjamin Tissoires +Date: Wed Sep 11 21:56:59 2013 +0200 + + HID: lenovo-tpkbd: fix leak if tpkbd_probe_tp fails + + commit 0ccdd9e7476680c16113131264ad6597bd10299d upstream. + + If tpkbd_probe_tp() bails out, the probe() function return an error, + but hid_hw_stop() is never called. + + fixes: + https://bugzilla.redhat.com/show_bug.cgi?id=1003998 + + Signed-off-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-lenovo-tpkbd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lenovo-tpkbd.c 2014-04-27 23:39:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lenovo-tpkbd.c 2014-04-28 00:36:28.000000000 +0000 +@@ -406,22 +406,27 @@ + ret = hid_parse(hdev); + if (ret) { + hid_err(hdev, "hid_parse failed\n"); +- goto err_free; ++ goto err; + } + + ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT); + if (ret) { + hid_err(hdev, "hid_hw_start failed\n"); +- goto err_free; ++ goto err; + } + + uhdev = (struct usbhid_device *) hdev->driver_data; + +- if (uhdev->ifnum == 1) +- return tpkbd_probe_tp(hdev); ++ if (uhdev->ifnum == 1) { ++ ret = tpkbd_probe_tp(hdev); ++ if (ret) ++ goto err_hid; ++ } + + return 0; +-err_free: ++err_hid: ++ hid_hw_stop(hdev); ++err: + return ret; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1171_30c1e32f6fb5b48d6fd1625858c25b38af9ee91f.txt 2014-04-28 00:36:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.patch 2014-04-28 00:36:30.000000000 +0000 @@ -0,0 +1,45 @@ +commit dcfd5f582c316c3e595c3bb28473efb30f4c2e6c +Author: Kees Cook +Date: Wed Sep 11 21:56:53 2013 +0200 + + HID: steelseries: validate output report details + + commit 41df7f6d43723deb7364340b44bc5d94bf717456 upstream. + + A HID device could send a malicious output report that would cause the + steelseries HID driver to write beyond the output report allocation + during initialization, causing a heap overflow: + + [ 167.981534] usb 1-1: New USB device found, idVendor=1038, idProduct=1410 + ... + [ 182.050547] BUG kmalloc-256 (Tainted: G W ): Redzone overwritten + + CVE-2013-2891 + + Signed-off-by: Kees Cook + Reviewed-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-steelseries.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-steelseries.c 2014-04-27 23:39:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-steelseries.c 2014-04-28 00:36:29.000000000 +0000 +@@ -249,6 +249,11 @@ + goto err_free; + } + ++ if (!hid_validate_values(hdev, HID_OUTPUT_REPORT, 0, 0, 16)) { ++ ret = -ENODEV; ++ goto err_free; ++ } ++ + ret = hid_hw_start(hdev, HID_CONNECT_DEFAULT); + if (ret) { + hid_err(hdev, "hw start failed\n"); +Index: linux-3.10-3.10.11/dummy/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1172_dcfd5f582c316c3e595c3bb28473efb30f4c2e6c.txt 2014-04-28 00:36:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.patch 2014-04-28 00:36:31.000000000 +0000 @@ -0,0 +1,50 @@ +commit 855f21e01243b09e5166b10e9c9e88585fc8e0c5 +Author: Kees Cook +Date: Wed Sep 11 21:56:55 2013 +0200 + + HID: lenovo-tpkbd: validate output report details + + commit 0a9cd0a80ac559357c6a90d26c55270ed752aa26 upstream. + + A HID device could send a malicious output report that would cause the + lenovo-tpkbd HID driver to write just beyond the output report allocation + during initialization, causing a heap overflow: + + [ 76.109807] usb 1-1: New USB device found, idVendor=17ef, idProduct=6009 + ... + [ 80.462540] BUG kmalloc-192 (Tainted: G W ): Redzone overwritten + + CVE-2013-2894 + + Signed-off-by: Kees Cook + Signed-off-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-lenovo-tpkbd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-lenovo-tpkbd.c 2014-04-28 00:36:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-lenovo-tpkbd.c 2014-04-28 00:36:30.000000000 +0000 +@@ -339,7 +339,15 @@ + struct tpkbd_data_pointer *data_pointer; + size_t name_sz = strlen(dev_name(dev)) + 16; + char *name_mute, *name_micmute; +- int ret; ++ int i, ret; ++ ++ /* Validate required reports. */ ++ for (i = 0; i < 4; i++) { ++ if (!hid_validate_values(hdev, HID_FEATURE_REPORT, 4, i, 1)) ++ return -ENODEV; ++ } ++ if (!hid_validate_values(hdev, HID_OUTPUT_REPORT, 3, 0, 2)) ++ return -ENODEV; + + if (sysfs_create_group(&hdev->dev.kobj, + &tpkbd_attr_group_pointer)) { +Index: linux-3.10-3.10.11/dummy/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1173_855f21e01243b09e5166b10e9c9e88585fc8e0c5.txt 2014-04-28 00:36:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.patch 2014-04-28 00:36:31.000000000 +0000 @@ -0,0 +1,65 @@ +commit 7661107379d11e11736e3c3210a95eb421a1ad3d +Author: Kees Cook +Date: Wed Sep 11 21:56:56 2013 +0200 + + HID: logitech-dj: validate output report details + + commit 297502abb32e225fb23801fcdb0e4f6f8e17099a upstream. + + A HID device could send a malicious output report that would cause the + logitech-dj HID driver to leak kernel memory contents to the device, or + trigger a NULL dereference during initialization: + + [ 304.424553] usb 1-1: New USB device found, idVendor=046d, idProduct=c52b + ... + [ 304.780467] BUG: unable to handle kernel NULL pointer dereference at 0000000000000028 + [ 304.781409] IP: [] logi_dj_recv_send_report.isra.11+0x1a/0x90 + + CVE-2013-2895 + + Signed-off-by: Kees Cook + Signed-off-by: Benjamin Tissoires + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-logitech-dj.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-logitech-dj.c 2014-04-27 23:39:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-logitech-dj.c 2014-04-28 00:36:31.000000000 +0000 +@@ -421,7 +421,7 @@ + struct hid_report *report; + struct hid_report_enum *output_report_enum; + u8 *data = (u8 *)(&dj_report->device_index); +- int i; ++ unsigned int i; + + output_report_enum = &hdev->report_enum[HID_OUTPUT_REPORT]; + report = output_report_enum->report_id_hash[REPORT_ID_DJ_SHORT]; +@@ -431,7 +431,7 @@ + return -ENODEV; + } + +- for (i = 0; i < report->field[0]->report_count; i++) ++ for (i = 0; i < DJREPORT_SHORT_LENGTH - 1; i++) + report->field[0]->value[i] = data[i]; + + hid_hw_request(hdev, report, HID_REQ_SET_REPORT); +@@ -738,6 +738,12 @@ + goto hid_parse_fail; + } + ++ if (!hid_validate_values(hdev, HID_OUTPUT_REPORT, REPORT_ID_DJ_SHORT, ++ 0, DJREPORT_SHORT_LENGTH - 1)) { ++ retval = -ENODEV; ++ goto hid_parse_fail; ++ } ++ + /* Starts the usb device and connects to upper interfaces hiddev and + * hidraw */ + retval = hid_hw_start(hdev, HID_CONNECT_DEFAULT); +Index: linux-3.10-3.10.11/dummy/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1174_7661107379d11e11736e3c3210a95eb421a1ad3d.txt 2014-04-28 00:36:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.patch 2014-04-28 00:36:32.000000000 +0000 @@ -0,0 +1,57 @@ +commit 45f785a21a8a8a782ceb920487b2c3da78ee77b8 +Author: Alan Stern +Date: Tue Jul 30 15:18:15 2013 -0400 + + usb: gadget: fix a bug and a WARN_ON in dummy-hcd + + commit 5f5610f69be3a925b1f79af27150bb7377bc9ad6 upstream. + + This patch fixes a NULL pointer dereference and a WARN_ON in + dummy-hcd. These things were the result of moving to the UDC core + framework, and possibly of changes to that framework. + + Now unloading a gadget driver causes the UDC to be stopped after the + gadget driver is unbound, not before. Therefore the "driver" argument + to dummy_udc_stop() can be NULL, so we must not try to print the + driver's name without checking first. + + Also, the UDC framework automatically unregisters the gadget when the + UDC is deleted. Therefore a sysfs attribute file attached to the + gadget must be removed before the UDC is deleted, not after. + + Signed-off-by: Alan Stern + Signed-off-by: Felipe Balbi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/gadget/dummy_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/gadget/dummy_hcd.c 2014-04-27 23:39:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/gadget/dummy_hcd.c 2014-04-28 00:36:32.000000000 +0000 +@@ -923,8 +923,9 @@ + struct dummy_hcd *dum_hcd = gadget_to_dummy_hcd(g); + struct dummy *dum = dum_hcd->dum; + +- dev_dbg(udc_dev(dum), "unregister gadget driver '%s'\n", +- driver->driver.name); ++ if (driver) ++ dev_dbg(udc_dev(dum), "unregister gadget driver '%s'\n", ++ driver->driver.name); + + dum->driver = NULL; + +@@ -1000,8 +1001,8 @@ + { + struct dummy *dum = platform_get_drvdata(pdev); + +- usb_del_gadget_udc(&dum->gadget); + device_remove_file(&dum->gadget.dev, &dev_attr_function); ++ usb_del_gadget_udc(&dum->gadget); + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1175_45f785a21a8a8a782ceb920487b2c3da78ee77b8.txt 2014-04-28 00:36:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.patch 2014-04-28 00:36:33.000000000 +0000 @@ -0,0 +1,125 @@ +commit d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b +Author: Daniel Vetter +Date: Wed Sep 4 17:36:14 2013 +0200 + + drm/i915: fix gpu hang vs. flip stall deadlocks + + commit 122f46badaafbe651f05c2c0f24cadee692f761b upstream. + + Since we've started to clean up pending flips when the gpu hangs in + + commit 96a02917a0131e52efefde49c2784c0421d6c439 + Author: Ville Syrjälä + Date: Mon Feb 18 19:08:49 2013 +0200 + + drm/i915: Finish page flips and update primary planes after a GPU reset + + the gpu reset work now also grabs modeset locks. But since work items + on our private work queue are not allowed to do that due to the + flush_workqueue from the pageflip code this results in a neat + deadlock: + + INFO: task kms_flip:14676 blocked for more than 120 seconds. + "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. + kms_flip D ffff88019283a5c0 0 14676 13344 0x00000004 + ffff88018e62dbf8 0000000000000046 ffff88013bdb12e0 ffff88018e62dfd8 + ffff88018e62dfd8 00000000001d3b00 ffff88019283a5c0 ffff88018ec21000 + ffff88018f693f00 ffff88018eece000 ffff88018e62dd60 ffff88018eece898 + Call Trace: + [] schedule+0x60/0x62 + [] intel_crtc_wait_for_pending_flips+0xb2/0x114 [i915] + [] ? finish_wait+0x60/0x60 + [] intel_crtc_set_config+0x7f3/0x81e [i915] + [] drm_mode_set_config_internal+0x4f/0xc6 [drm] + [] drm_mode_setcrtc+0x44d/0x4f9 [drm] + [] ? might_fault+0x38/0x86 + [] drm_ioctl+0x2f9/0x447 [drm] + [] ? trace_hardirqs_off+0xd/0xf + [] ? drm_mode_setplane+0x343/0x343 [drm] + [] ? mntput_no_expire+0x3e/0x13d + [] vfs_ioctl+0x18/0x34 + [] do_vfs_ioctl+0x396/0x454 + [] ? sysret_check+0x1b/0x56 + [] SyS_ioctl+0x52/0x7d + [] system_call_fastpath+0x16/0x1b + 2 locks held by kms_flip/14676: + #0: (&dev->mode_config.mutex){+.+.+.}, at: [] drm_modeset_lock_all+0x22/0x59 [drm] + #1: (&crtc->mutex){+.+.+.}, at: [] drm_modeset_lock_all+0x48/0x59 [drm] + INFO: task kworker/u8:4:175 blocked for more than 120 seconds. + "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. + kworker/u8:4 D ffff88018de9a5c0 0 175 2 0x00000000 + Workqueue: i915 i915_error_work_func [i915] + ffff88018e37dc30 0000000000000046 ffff8801938ab8a0 ffff88018e37dfd8 + ffff88018e37dfd8 00000000001d3b00 ffff88018de9a5c0 ffff88018ec21018 + 0000000000000246 ffff88018e37dca0 000000005a865a86 ffff88018de9a5c0 + Call Trace: + [] schedule+0x60/0x62 + [] schedule_preempt_disabled+0x9/0xb + [] mutex_lock_nested+0x205/0x3b1 + [] ? intel_display_handle_reset+0x7e/0xbd [i915] + [] ? intel_display_handle_reset+0x7e/0xbd [i915] + [] intel_display_handle_reset+0x7e/0xbd [i915] + [] i915_error_work_func+0x128/0x147 [i915] + [] process_one_work+0x1d4/0x35a + [] ? process_one_work+0x15b/0x35a + [] worker_thread+0x144/0x1f0 + [] ? rescuer_thread+0x275/0x275 + [] kthread+0xac/0xb4 + [] ? finish_task_switch+0x3b/0xc0 + [] ? __kthread_parkme+0x60/0x60 + [] ret_from_fork+0x7c/0xb0 + [] ? __kthread_parkme+0x60/0x60 + 3 locks held by kworker/u8:4/175: + #0: (i915){.+.+.+}, at: [] process_one_work+0x15b/0x35a + #1: ((&dev_priv->gpu_error.work)){+.+.+.}, at: [] process_one_work+0x15b/0x35a + #2: (&crtc->mutex){+.+.+.}, at: [] intel_display_handle_reset+0x7e/0xbd [i915] + + This blew up while running kms_flip/flip-vs-panning-vs-hang-interruptible + on one of my older machines. + + Unfortunately (despite the proper lockdep annotations for + flush_workqueue) lockdep still doesn't detect this correctly, so we + need to rely on chance to discover these bugs. + + Apply the usual bugfix and schedule the reset work on the system + workqueue to keep our own driver workqueue free of any modeset lock + grabbing. + + Note that this is not a terribly serious regression since before the + offending commit we'd simply have stalled userspace forever due to + failing to abort all outstanding pageflips. + + v2: Add a comment as requested by Chris. + + Cc: Thomas Gleixner + Cc: Ville Syrjälä + Cc: Chris Wilson + Reviewed-by: Chris Wilson + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_irq.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/i915_irq.c 2014-04-27 23:39:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_irq.c 2014-04-28 00:36:32.000000000 +0000 +@@ -1727,7 +1727,13 @@ + wake_up_all(&ring->irq_queue); + } + +- queue_work(dev_priv->wq, &dev_priv->gpu_error.work); ++ /* ++ * Our reset work can grab modeset locks (since it needs to reset the ++ * state of outstanding pagelips). Hence it must not be run on our own ++ * dev-priv->wq work queue for otherwise the flush_work in the pageflip ++ * code will deadlock. ++ */ ++ schedule_work(&dev_priv->gpu_error.work); + } + + static void __always_unused i915_pageflip_stall_check(struct drm_device *dev, int pipe) +Index: linux-3.10-3.10.11/dummy/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1176_d553bc6d55ec6e27cb46e6d2dd3e7e4e1f33d04b.txt 2014-04-28 00:36:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.patch --- linux-3.10.11/debian/patches/rpi/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.patch 2014-04-28 00:36:34.000000000 +0000 @@ -0,0 +1,199 @@ +commit 590f5c013918d7d9724f048fa9d0c09e36446e20 +Author: Daniel Vetter +Date: Sun Sep 8 21:57:13 2013 +0200 + + drm/i915: fix wait_for_pending_flips vs gpu hang deadlock + + commit 17e1df07df0fbc77696a1e1b6ccf9f2e5af70e40 upstream. + + My g33 here seems to be shockingly good at hitting them all. This time + around kms_flip/flip-vs-panning-vs-hang blows up: + + intel_crtc_wait_for_pending_flips correctly checks for gpu hangs and + if a gpu hang is pending aborts the wait for outstanding flips so that + the setcrtc call will succeed and release the crtc mutex. And the gpu + hang handler needs that lock in intel_display_handle_reset to be able + to complete outstanding flips. + + The problem is that we can race in two ways: + - Waiters on the dev_priv->pending_flip_queue aren't woken up after + we've the reset as pending, but before we actually start the reset + work. This means that the waiter doesn't notice the pending reset + and hence will keep on hogging the locks. + + Like with dev->struct_mutex and the ring->irq_queue wait queues we + there need to wake up everyone that potentially holds a lock which + the reset handler needs. + + - intel_display_handle_reset was called _after_ we've already + signalled the completion of the reset work. Which means a waiter + could sneak in, grab the lock and never release it (since the + pageflips won't ever get released). + + Similar to resetting the gem state all the reset work must complete + before we update the reset counter. Contrary to the gem reset we + don't need to have a second explicit wake up call since that will + have happened already when completing the pageflips. We also don't + have any issues that the completion happens while the reset state is + still pending - wait_for_pending_flips is only there to ensure we + display the right frame. After a gpu hang&reset events such + guarantees are out the window anyway. This is in contrast to the gem + code where too-early wake-up would result in unnecessary restarting + of ioctls. + + Also, since we've gotten these various deadlocks and ordering + constraints wrong so often throw copious amounts of comments at the + code. + + This deadlock regression has been introduced in the commit which added + the pageflip reset logic to the gpu hang work: + + commit 96a02917a0131e52efefde49c2784c0421d6c439 + Author: Ville Syrjälä + Date: Mon Feb 18 19:08:49 2013 +0200 + + drm/i915: Finish page flips and update primary planes after a GPU reset + + v2: + - Add comments to explain how the wake_up serves as memory barriers + for the atomic_t reset counter. + - Improve the comments a bit as suggested by Chris Wilson. + - Extract the wake_up calls before/after the reset into a little + i915_error_wake_up and unconditionally wake up the + pending_flip_queue waiters, again as suggested by Chris Wilson. + + v3: Throw copious amounts of comments at i915_error_wake_up as + suggested by Chris Wilson. + + Cc: Ville Syrjälä + Cc: Chris Wilson + Reviewed-by: Chris Wilson + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_irq.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/i915_irq.c 2014-04-28 00:36:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_irq.c 2014-04-28 00:36:33.000000000 +0000 +@@ -1009,6 +1009,34 @@ + return ret; + } + ++static void i915_error_wake_up(struct drm_i915_private *dev_priv, ++ bool reset_completed) ++{ ++ struct intel_ring_buffer *ring; ++ int i; ++ ++ /* ++ * Notify all waiters for GPU completion events that reset state has ++ * been changed, and that they need to restart their wait after ++ * checking for potential errors (and bail out to drop locks if there is ++ * a gpu reset pending so that i915_error_work_func can acquire them). ++ */ ++ ++ /* Wake up __wait_seqno, potentially holding dev->struct_mutex. */ ++ for_each_ring(ring, dev_priv, i) ++ wake_up_all(&ring->irq_queue); ++ ++ /* Wake up intel_crtc_wait_for_pending_flips, holding crtc->mutex. */ ++ wake_up_all(&dev_priv->pending_flip_queue); ++ ++ /* ++ * Signal tasks blocked in i915_gem_wait_for_error that the pending ++ * reset state is cleared. ++ */ ++ if (reset_completed) ++ wake_up_all(&dev_priv->gpu_error.reset_queue); ++} ++ + /** + * i915_error_work_func - do process context error handling work + * @work: work struct +@@ -1023,11 +1051,10 @@ + drm_i915_private_t *dev_priv = container_of(error, drm_i915_private_t, + gpu_error); + struct drm_device *dev = dev_priv->dev; +- struct intel_ring_buffer *ring; + char *error_event[] = { "ERROR=1", NULL }; + char *reset_event[] = { "RESET=1", NULL }; + char *reset_done_event[] = { "ERROR=0", NULL }; +- int i, ret; ++ int ret; + + kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, error_event); + +@@ -1046,8 +1073,16 @@ + kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, + reset_event); + ++ /* ++ * All state reset _must_ be completed before we update the ++ * reset counter, for otherwise waiters might miss the reset ++ * pending state and not properly drop locks, resulting in ++ * deadlocks with the reset work. ++ */ + ret = i915_reset(dev); + ++ intel_display_handle_reset(dev); ++ + if (ret == 0) { + /* + * After all the gem state is reset, increment the reset +@@ -1068,12 +1103,11 @@ + atomic_set(&error->reset_counter, I915_WEDGED); + } + +- for_each_ring(ring, dev_priv, i) +- wake_up_all(&ring->irq_queue); +- +- intel_display_handle_reset(dev); +- +- wake_up_all(&dev_priv->gpu_error.reset_queue); ++ /* ++ * Note: The wake_up also serves as a memory barrier so that ++ * waiters see the update value of the reset counter atomic_t. ++ */ ++ i915_error_wake_up(dev_priv, true); + } + } + +@@ -1709,8 +1743,6 @@ + void i915_handle_error(struct drm_device *dev, bool wedged) + { + struct drm_i915_private *dev_priv = dev->dev_private; +- struct intel_ring_buffer *ring; +- int i; + + i915_capture_error_state(dev); + i915_report_and_clear_eir(dev); +@@ -1720,11 +1752,19 @@ + &dev_priv->gpu_error.reset_counter); + + /* +- * Wakeup waiting processes so that the reset work item +- * doesn't deadlock trying to grab various locks. ++ * Wakeup waiting processes so that the reset work function ++ * i915_error_work_func doesn't deadlock trying to grab various ++ * locks. By bumping the reset counter first, the woken ++ * processes will see a reset in progress and back off, ++ * releasing their locks and then wait for the reset completion. ++ * We must do this for _all_ gpu waiters that might hold locks ++ * that the reset work needs to acquire. ++ * ++ * Note: The wake_up serves as the required memory barrier to ++ * ensure that the waiters see the updated value of the reset ++ * counter atomic_t. + */ +- for_each_ring(ring, dev_priv, i) +- wake_up_all(&ring->irq_queue); ++ i915_error_wake_up(dev_priv, false); + } + + /* +Index: linux-3.10-3.10.11/dummy/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1177_590f5c013918d7d9724f048fa9d0c09e36446e20.txt 2014-04-28 00:36:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.patch 2014-04-28 00:36:34.000000000 +0000 @@ -0,0 +1,78 @@ +commit b61d2139fb615a89d30d144907aefa5e66e3348f +Author: David Herrmann +Date: Mon Aug 26 15:16:49 2013 +0200 + + drm: fix DRM_IOCTL_MODE_GETFB handle-leak + + commit 101b96f32956ee99bf1468afaf572b88cda9f88b upstream. + + DRM_IOCTL_MODE_GETFB is used to retrieve information about a given + framebuffer ID. It is a read-only helper and was thus declassified for + unprivileged access in: + + commit a14b1b42477c5ef089fcda88cbaae50d979eb8f9 + Author: Mandeep Singh Baines + Date: Fri Jan 20 12:11:16 2012 -0800 + + drm: remove master fd restriction on mode setting getters + + However, alongside width, height and stride information, + DRM_IOCTL_MODE_GETFB also passes back a handle to the underlying buffer of + the framebuffer. This handle allows users to mmap() it and read or write + into it. Obviously, this should be restricted to DRM-Master. + + With the current setup, *any* process with access to /dev/dri/card0 (which + means any process with access to hardware-accelerated rendering) can + access the current screen framebuffer and modify it ad libitum. + + For backwards-compatibility reasons we want to keep the + DRM_IOCTL_MODE_GETFB call unprivileged. Besides, it provides quite useful + information regarding screen setup. So we simply test whether the caller + is the current DRM-Master and if not, we return 0 as handle, which is + always invalid. A following DRM_IOCTL_GEM_CLOSE on this handle will fail + with EINVAL, but we accept this. Users shouldn't test for errors during + GEM_CLOSE, anyway. And it is still better as a failing MODE_GETFB call. + + v2: add capable(CAP_SYS_ADMIN) check for compatibility with i-g-t + + Signed-off-by: David Herrmann + Reviewed-by: Chris Wilson + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/drm_crtc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/drm_crtc.c 2014-04-27 23:39:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/drm_crtc.c 2014-04-28 00:36:34.000000000 +0000 +@@ -2501,10 +2501,22 @@ + r->depth = fb->depth; + r->bpp = fb->bits_per_pixel; + r->pitch = fb->pitches[0]; +- if (fb->funcs->create_handle) +- ret = fb->funcs->create_handle(fb, file_priv, &r->handle); +- else ++ if (fb->funcs->create_handle) { ++ if (file_priv->is_master || capable(CAP_SYS_ADMIN)) { ++ ret = fb->funcs->create_handle(fb, file_priv, ++ &r->handle); ++ } else { ++ /* GET_FB() is an unprivileged ioctl so we must not ++ * return a buffer-handle to non-master processes! For ++ * backwards-compatibility reasons, we cannot make ++ * GET_FB() privileged, so just return an invalid handle ++ * for non-masters. */ ++ r->handle = 0; ++ ret = 0; ++ } ++ } else { + ret = -ENODEV; ++ } + + drm_framebuffer_unreference(fb); + +Index: linux-3.10-3.10.11/dummy/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1178_b61d2139fb615a89d30d144907aefa5e66e3348f.txt 2014-04-28 00:36:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.patch 2014-04-28 00:36:35.000000000 +0000 @@ -0,0 +1,34 @@ +commit 2781ca89611907abc45110fd992dc5e9d21924d9 +Author: Dave Airlie +Date: Thu Sep 12 15:31:04 2013 +1000 + + drm/ast: fix the ast open key function + + commit 2e8378136f28bea960cec643d3fa5d843c9049ec upstream. + + When porting from UMS I mistyped this from the wrong place, AST noticed + and pointed it out, so we should fix it to be like the X.org driver. + + Reported-by: Y.C. Chen + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/ast/ast_drv.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/ast/ast_drv.h 2014-04-27 23:39:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/ast/ast_drv.h 2014-04-28 00:36:35.000000000 +0000 +@@ -177,7 +177,7 @@ + + static inline void ast_open_key(struct ast_private *ast) + { +- ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xA1, 0xFF, 0x04); ++ ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x80, 0xA8); + } + + #define AST_VIDMEM_SIZE_8M 0x00800000 +Index: linux-3.10-3.10.11/dummy/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1179_2781ca89611907abc45110fd992dc5e9d21924d9.txt 2014-04-28 00:36:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.patch 2014-04-28 00:36:36.000000000 +0000 @@ -0,0 +1,46 @@ +commit 3614efdf382ea9da5c04ae1f312c441b78a9fafc +Author: Ben Skeggs +Date: Tue Sep 17 14:21:15 2013 +1000 + + drm/ttm: fix the tt_populated check in ttm_tt_destroy() + + commit 182b17c8dc4e83aab000ce86587b6810e515da87 upstream. + + After a vmalloc failure in ttm_dma_tt_alloc_page_directory(), + ttm_dma_tt_init() will call ttm_tt_destroy() to cleanup, and end up + inside the driver's unpopulate() hook when populate() has never yet + been called. + + On nouveau, the first issue to be hit because of this is that + dma_address[] may be a NULL pointer. After working around this, + ttm_pool_unpopulate() may potentially hit the same issue with + the pages[] array. + + It seems to make more sense to avoid calling unpopulate on already + unpopulated TTMs than to add checks to all the implementations. + + Signed-off-by: Ben Skeggs + Reviewed-by: Thomas Hellstrom + Cc: Jerome Glisse + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/ttm/ttm_tt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/ttm/ttm_tt.c 2014-04-27 23:39:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/ttm/ttm_tt.c 2014-04-28 00:36:36.000000000 +0000 +@@ -170,7 +170,7 @@ + ttm_tt_unbind(ttm); + } + +- if (likely(ttm->pages != NULL)) { ++ if (ttm->state == tt_unbound) { + ttm->bdev->driver->ttm_tt_unpopulate(ttm); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1180_3614efdf382ea9da5c04ae1f312c441b78a9fafc.txt 2014-04-28 00:36:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.patch 2014-04-28 00:36:37.000000000 +0000 @@ -0,0 +1,61 @@ +commit 262246999a59ac0aab5c4dd586b16d191ffe386b +Author: Emil Velikov +Date: Fri Aug 23 18:43:42 2013 +0100 + + drm/nv50/disp: prevent false output detection on the original nv50 + + commit 5087f51da805f53cba7366f70d596e7bde2a5486 upstream. + + Commit ea9197cc323839ef3d5280c0453b2c622caa6bc7 effectively enabled the + use of an improved DAC detection code, but introduced a regression on + the original nv50 chipset, causing a ghost monitor to be detected. + + v2 (Ben Skeggs): the offending line was likely a thinko, removed it for + all chipsets (tested nv50 and nve6 to cover entire range) and added + some additional debugging. + + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67382 + Tested-by: Martin Peres + Signed-off-by: Emil Velikov + Signed-off-by: Ben Skeggs + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c 2014-04-27 23:39:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c 2014-04-28 00:36:37.000000000 +0000 +@@ -49,18 +49,23 @@ + nv50_dac_sense(struct nv50_disp_priv *priv, int or, u32 loadval) + { + const u32 doff = (or * 0x800); +- int load = -EINVAL; ++ + nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000); + nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); ++ + nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval); + mdelay(9); + udelay(500); +- nv_wr32(priv, 0x61a00c + doff, 0x80000000); +- load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27; +- nv_wr32(priv, 0x61a00c + doff, 0x00000000); ++ loadval = nv_mask(priv, 0x61a00c + doff, 0xffffffff, 0x00000000); ++ + nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000); + nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000); +- return load; ++ ++ nv_debug(priv, "DAC%d sense: 0x%08x\n", or, loadval); ++ if (!(loadval & 0x80000000)) ++ return -ETIMEDOUT; ++ ++ return (loadval & 0x38000000) >> 27; + } + + int +Index: linux-3.10-3.10.11/dummy/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1181_262246999a59ac0aab5c4dd586b16d191ffe386b.txt 2014-04-28 00:36:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.patch 2014-04-28 00:36:38.000000000 +0000 @@ -0,0 +1,37 @@ +commit 6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3 +Author: Alex Deucher +Date: Tue Aug 20 14:59:01 2013 -0400 + + drm/radeon: fix LCD record parsing + + commit 95663948ba22a4be8b99acd67fbf83e86ddffba4 upstream. + + If the LCD table contains an EDID record, properly account + for the edid size when walking through the records. + + This should fix error messages about unknown LCD records. + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_atombios.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_atombios.c 2014-04-27 23:39:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_atombios.c 2014-04-28 00:36:37.000000000 +0000 +@@ -1651,7 +1651,9 @@ + kfree(edid); + } + } +- record += sizeof(ATOM_FAKE_EDID_PATCH_RECORD); ++ record += fake_edid_record->ucFakeEDIDLength ? ++ fake_edid_record->ucFakeEDIDLength + 2 : ++ sizeof(ATOM_FAKE_EDID_PATCH_RECORD); + break; + case LCD_PANEL_RESOLUTION_RECORD_TYPE: + panel_res_record = (ATOM_PANEL_RESOLUTION_PATCH_RECORD *)record; +Index: linux-3.10-3.10.11/dummy/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1182_6d90714d9a0d4b9c5c17952cb5affe7a1e3b6fb3.txt 2014-04-28 00:36:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.patch --- linux-3.10.11/debian/patches/rpi/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.patch 2014-04-28 00:36:39.000000000 +0000 @@ -0,0 +1,74 @@ +commit 5c6ece5d3786f287d61bc0ffd1ab372f47df2b81 +Author: Alex Deucher +Date: Wed Aug 7 19:34:53 2013 -0400 + + drm/radeon: fix endian bugs in hw i2c atom routines + + commit 4543eda52113d1e2cc0e9bf416f79597e6ef1ec7 upstream. + + Need to swap the data fetched over i2c properly. This + is the same fix as the endian fix for aux channel + transactions. + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_dp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/atombios_dp.c 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_dp.c 2014-04-28 00:36:38.000000000 +0000 +@@ -50,7 +50,7 @@ + * or from atom. Note that atom operates on + * dw units. + */ +-static void radeon_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le) ++void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le) + { + #ifdef __BIG_ENDIAN + u8 src_tmp[20], dst_tmp[20]; /* used for byteswapping */ +@@ -100,7 +100,7 @@ + + base = (unsigned char *)(rdev->mode_info.atom_context->scratch + 1); + +- radeon_copy_swap(base, send, send_bytes, true); ++ radeon_atom_copy_swap(base, send, send_bytes, true); + + args.v1.lpAuxRequest = cpu_to_le16((u16)(0 + 4)); + args.v1.lpDataOut = cpu_to_le16((u16)(16 + 4)); +@@ -137,7 +137,7 @@ + recv_bytes = recv_size; + + if (recv && recv_size) +- radeon_copy_swap(recv, base + 16, recv_bytes, false); ++ radeon_atom_copy_swap(recv, base + 16, recv_bytes, false); + + return recv_bytes; + } +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_i2c.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/atombios_i2c.c 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_i2c.c 2014-04-28 00:36:38.000000000 +0000 +@@ -27,6 +27,8 @@ + #include "radeon.h" + #include "atom.h" + ++extern void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le); ++ + #define TARGET_HW_I2C_CLOCK 50 + + /* these are a limitation of ProcessI2cChannelTransaction not the hw */ +@@ -77,7 +79,7 @@ + } + + if (!(flags & HW_I2C_WRITE)) +- memcpy(buf, base, num); ++ radeon_atom_copy_swap(buf, base, num, false); + + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1183_5c6ece5d3786f287d61bc0ffd1ab372f47df2b81.txt 2014-04-28 00:36:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.patch 2014-04-28 00:36:40.000000000 +0000 @@ -0,0 +1,206 @@ +commit c7384791a785d8f356aa9de8038596cfd2ea87d3 +Author: Tom Stellard +Date: Fri Aug 16 17:47:39 2013 -0400 + + drm/radeon/si: Add support for CP DMA to CS checker for compute v2 + + commit e5b9e7503eb1f4884efa3b321d3cc47806779202 upstream. + + Also add a new RADEON_INFO query to check that CP DMA packets are + supported on the compute ring. + + CP DMA has been supported since the 3.8 kernel, but due to an oversight + we forgot to teach the CS checker that the CP DMA packet was legal for + the compute ring on Southern Islands GPUs. + + This patch fixes a bug where the radeon driver will incorrectly reject a legal + CP DMA packet from user space. I would like to have the patch + backported to stable so that we don't have to require Mesa users to use a + bleeding edge kernel in order to take advantage of this feature which + is already present in the stable kernels (3.8 and newer). + + v2: + - Don't bump kms version, so this patch can be backported to stable + kernels. + + Signed-off-by: Tom Stellard + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_kms.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_kms.c 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_kms.c 2014-04-28 00:36:39.000000000 +0000 +@@ -414,6 +414,9 @@ + value = rdev->config.si.tile_mode_array; + value_size = sizeof(uint32_t)*32; + break; ++ case RADEON_INFO_SI_CP_DMA_COMPUTE: ++ *value = 1; ++ break; + default: + DRM_DEBUG_KMS("Invalid request %d\n", info->request); + return -EINVAL; +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/si.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/si.c 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/si.c 2014-04-28 00:36:39.000000000 +0000 +@@ -3796,13 +3796,64 @@ + return 0; + } + ++static int si_vm_packet3_cp_dma_check(u32 *ib, u32 idx) ++{ ++ u32 start_reg, reg, i; ++ u32 command = ib[idx + 4]; ++ u32 info = ib[idx + 1]; ++ u32 idx_value = ib[idx]; ++ if (command & PACKET3_CP_DMA_CMD_SAS) { ++ /* src address space is register */ ++ if (((info & 0x60000000) >> 29) == 0) { ++ start_reg = idx_value << 2; ++ if (command & PACKET3_CP_DMA_CMD_SAIC) { ++ reg = start_reg; ++ if (!si_vm_reg_valid(reg)) { ++ DRM_ERROR("CP DMA Bad SRC register\n"); ++ return -EINVAL; ++ } ++ } else { ++ for (i = 0; i < (command & 0x1fffff); i++) { ++ reg = start_reg + (4 * i); ++ if (!si_vm_reg_valid(reg)) { ++ DRM_ERROR("CP DMA Bad SRC register\n"); ++ return -EINVAL; ++ } ++ } ++ } ++ } ++ } ++ if (command & PACKET3_CP_DMA_CMD_DAS) { ++ /* dst address space is register */ ++ if (((info & 0x00300000) >> 20) == 0) { ++ start_reg = ib[idx + 2]; ++ if (command & PACKET3_CP_DMA_CMD_DAIC) { ++ reg = start_reg; ++ if (!si_vm_reg_valid(reg)) { ++ DRM_ERROR("CP DMA Bad DST register\n"); ++ return -EINVAL; ++ } ++ } else { ++ for (i = 0; i < (command & 0x1fffff); i++) { ++ reg = start_reg + (4 * i); ++ if (!si_vm_reg_valid(reg)) { ++ DRM_ERROR("CP DMA Bad DST register\n"); ++ return -EINVAL; ++ } ++ } ++ } ++ } ++ } ++ return 0; ++} ++ + static int si_vm_packet3_gfx_check(struct radeon_device *rdev, + u32 *ib, struct radeon_cs_packet *pkt) + { ++ int r; + u32 idx = pkt->idx + 1; + u32 idx_value = ib[idx]; + u32 start_reg, end_reg, reg, i; +- u32 command, info; + + switch (pkt->opcode) { + case PACKET3_NOP: +@@ -3903,50 +3954,9 @@ + } + break; + case PACKET3_CP_DMA: +- command = ib[idx + 4]; +- info = ib[idx + 1]; +- if (command & PACKET3_CP_DMA_CMD_SAS) { +- /* src address space is register */ +- if (((info & 0x60000000) >> 29) == 0) { +- start_reg = idx_value << 2; +- if (command & PACKET3_CP_DMA_CMD_SAIC) { +- reg = start_reg; +- if (!si_vm_reg_valid(reg)) { +- DRM_ERROR("CP DMA Bad SRC register\n"); +- return -EINVAL; +- } +- } else { +- for (i = 0; i < (command & 0x1fffff); i++) { +- reg = start_reg + (4 * i); +- if (!si_vm_reg_valid(reg)) { +- DRM_ERROR("CP DMA Bad SRC register\n"); +- return -EINVAL; +- } +- } +- } +- } +- } +- if (command & PACKET3_CP_DMA_CMD_DAS) { +- /* dst address space is register */ +- if (((info & 0x00300000) >> 20) == 0) { +- start_reg = ib[idx + 2]; +- if (command & PACKET3_CP_DMA_CMD_DAIC) { +- reg = start_reg; +- if (!si_vm_reg_valid(reg)) { +- DRM_ERROR("CP DMA Bad DST register\n"); +- return -EINVAL; +- } +- } else { +- for (i = 0; i < (command & 0x1fffff); i++) { +- reg = start_reg + (4 * i); +- if (!si_vm_reg_valid(reg)) { +- DRM_ERROR("CP DMA Bad DST register\n"); +- return -EINVAL; +- } +- } +- } +- } +- } ++ r = si_vm_packet3_cp_dma_check(ib, idx); ++ if (r) ++ return r; + break; + default: + DRM_ERROR("Invalid GFX packet3: 0x%x\n", pkt->opcode); +@@ -3958,6 +3968,7 @@ + static int si_vm_packet3_compute_check(struct radeon_device *rdev, + u32 *ib, struct radeon_cs_packet *pkt) + { ++ int r; + u32 idx = pkt->idx + 1; + u32 idx_value = ib[idx]; + u32 start_reg, reg, i; +@@ -4030,6 +4041,11 @@ + return -EINVAL; + } + break; ++ case PACKET3_CP_DMA: ++ r = si_vm_packet3_cp_dma_check(ib, idx); ++ if (r) ++ return r; ++ break; + default: + DRM_ERROR("Invalid Compute packet3: 0x%x\n", pkt->opcode); + return -EINVAL; +Index: linux-3.10-3.10.11/include/uapi/drm/radeon_drm.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/drm/radeon_drm.h 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/drm/radeon_drm.h 2014-04-28 00:36:39.000000000 +0000 +@@ -979,6 +979,8 @@ + #define RADEON_INFO_RING_WORKING 0x15 + /* SI tile mode array */ + #define RADEON_INFO_SI_TILE_MODE_ARRAY 0x16 ++/* query if CP DMA is supported on the compute ring */ ++#define RADEON_INFO_SI_CP_DMA_COMPUTE 0x17 + + + struct drm_radeon_info { +Index: linux-3.10-3.10.11/dummy/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1184_c7384791a785d8f356aa9de8038596cfd2ea87d3.txt 2014-04-28 00:36:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.patch 2014-04-28 00:36:40.000000000 +0000 @@ -0,0 +1,92 @@ +commit 410653c1e46c54436a66ccf1216ffc7e8b3bd4dd +Author: Alex Deucher +Date: Mon Aug 19 11:06:50 2013 -0400 + + drm/radeon: update line buffer allocation for dce4.1/5 + + commit 0b31e02363b0db4e7931561bc6c141436e729d9f upstream. + + We need to allocate line buffer to each display when + setting up the watermarks. Failure to do so can lead + to a blank screen. This fixes blank screen problems + on dce4.1/5 asics. + + Based on an initial fix from: + Jay Cornwall + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreen.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/evergreen.c 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreen.c 2014-04-28 00:36:40.000000000 +0000 +@@ -1718,7 +1718,8 @@ + struct drm_display_mode *mode, + struct drm_display_mode *other_mode) + { +- u32 tmp; ++ u32 tmp, buffer_alloc, i; ++ u32 pipe_offset = radeon_crtc->crtc_id * 0x20; + /* + * Line Buffer Setup + * There are 3 line buffers, each one shared by 2 display controllers. +@@ -1741,18 +1742,34 @@ + * non-linked crtcs for maximum line buffer allocation. + */ + if (radeon_crtc->base.enabled && mode) { +- if (other_mode) ++ if (other_mode) { + tmp = 0; /* 1/2 */ +- else ++ buffer_alloc = 1; ++ } else { + tmp = 2; /* whole */ +- } else ++ buffer_alloc = 2; ++ } ++ } else { + tmp = 0; ++ buffer_alloc = 0; ++ } + + /* second controller of the pair uses second half of the lb */ + if (radeon_crtc->crtc_id % 2) + tmp += 4; + WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, tmp); + ++ if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) { ++ WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset, ++ DMIF_BUFFERS_ALLOCATED(buffer_alloc)); ++ for (i = 0; i < rdev->usec_timeout; i++) { ++ if (RREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset) & ++ DMIF_BUFFERS_ALLOCATED_COMPLETED) ++ break; ++ udelay(1); ++ } ++ } ++ + if (radeon_crtc->base.enabled && mode) { + switch (tmp) { + case 0: +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreend.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/evergreend.h 2014-04-27 23:39:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreend.h 2014-04-28 00:36:40.000000000 +0000 +@@ -810,6 +810,10 @@ + # define LATENCY_LOW_WATERMARK(x) ((x) << 0) + # define LATENCY_HIGH_WATERMARK(x) ((x) << 16) + ++#define PIPE0_DMIF_BUFFER_CONTROL 0x0ca0 ++# define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) ++# define DMIF_BUFFERS_ALLOCATED_COMPLETED (1 << 4) ++ + #define IH_RB_CNTL 0x3e00 + # define IH_RB_ENABLE (1 << 0) + # define IH_IB_SIZE(x) ((x) << 1) /* log2 */ +Index: linux-3.10-3.10.11/dummy/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1185_410653c1e46c54436a66ccf1216ffc7e8b3bd4dd.txt 2014-04-28 00:36:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.patch 2014-04-28 00:36:41.000000000 +0000 @@ -0,0 +1,91 @@ +commit c74a65651ddcef3f06e10364809452191ac6cba6 +Author: Alex Deucher +Date: Mon Aug 19 11:15:43 2013 -0400 + + drm/radeon: update line buffer allocation for dce6 + + commit 290d24576ccf1aa0373d2185cedfe262d0d4952a upstream. + + We need to allocate line buffer to each display when + setting up the watermarks. Failure to do so can lead + to a blank screen. This fixes blank screen problems + on dce6 asics. + + Fixes: + https://bugs.freedesktop.org/show_bug.cgi?id=64850 + + Based on an initial fix from: + Jay Cornwall + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/si.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/si.c 2014-04-28 00:36:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/si.c 2014-04-28 00:36:41.000000000 +0000 +@@ -1467,7 +1467,8 @@ + struct drm_display_mode *mode, + struct drm_display_mode *other_mode) + { +- u32 tmp; ++ u32 tmp, buffer_alloc, i; ++ u32 pipe_offset = radeon_crtc->crtc_id * 0x20; + /* + * Line Buffer Setup + * There are 3 line buffers, each one shared by 2 display controllers. +@@ -1482,16 +1483,30 @@ + * non-linked crtcs for maximum line buffer allocation. + */ + if (radeon_crtc->base.enabled && mode) { +- if (other_mode) ++ if (other_mode) { + tmp = 0; /* 1/2 */ +- else ++ buffer_alloc = 1; ++ } else { + tmp = 2; /* whole */ +- } else ++ buffer_alloc = 2; ++ } ++ } else { + tmp = 0; ++ buffer_alloc = 0; ++ } + + WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, + DC_LB_MEMORY_CONFIG(tmp)); + ++ WREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset, ++ DMIF_BUFFERS_ALLOCATED(buffer_alloc)); ++ for (i = 0; i < rdev->usec_timeout; i++) { ++ if (RREG32(PIPE0_DMIF_BUFFER_CONTROL + pipe_offset) & ++ DMIF_BUFFERS_ALLOCATED_COMPLETED) ++ break; ++ udelay(1); ++ } ++ + if (radeon_crtc->base.enabled && mode) { + switch (tmp) { + case 0: +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/sid.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/sid.h 2014-04-27 23:39:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/sid.h 2014-04-28 00:36:41.000000000 +0000 +@@ -97,6 +97,10 @@ + + #define DMIF_ADDR_CALC 0xC00 + ++#define PIPE0_DMIF_BUFFER_CONTROL 0x0ca0 ++# define DMIF_BUFFERS_ALLOCATED(x) ((x) << 0) ++# define DMIF_BUFFERS_ALLOCATED_COMPLETED (1 << 4) ++ + #define SRBM_STATUS 0xE50 + #define GRBM_RQ_PENDING (1 << 5) + #define VMC_BUSY (1 << 8) +Index: linux-3.10-3.10.11/dummy/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1186_c74a65651ddcef3f06e10364809452191ac6cba6.txt 2014-04-28 00:36:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.patch 2014-04-28 00:36:42.000000000 +0000 @@ -0,0 +1,51 @@ +commit a7b153243b75dc0633a0ef85f1598d719a6624e6 +Author: Alex Deucher +Date: Mon Aug 26 17:52:12 2013 -0400 + + drm/radeon: fix resume on some rs4xx boards (v2) + + commit acf88deb8ddbb73acd1c3fa32fde51af9153227f upstream. + + Setting MC_MISC_CNTL.GART_INDEX_REG_EN causes hangs on + some boards on resume. The systems seem to work fine + without touching this bit so leave it as is. + + v2: read-modify-write the GART_INDEX_REG_EN bit. + I suspect the problem is that we are losing the other + settings in the register. + + fixes: + https://bugs.freedesktop.org/show_bug.cgi?id=52952 + + Reported-by: Ondrej Zary + Tested-by: Daniel Tobias + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/rs400.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/rs400.c 2014-04-27 23:39:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/rs400.c 2014-04-28 00:36:42.000000000 +0000 +@@ -174,10 +174,13 @@ + /* FIXME: according to doc we should set HIDE_MMCFG_BAR=0, + * AGPMODE30=0 & AGP30ENHANCED=0 in NB_CNTL */ + if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740)) { +- WREG32_MC(RS480_MC_MISC_CNTL, +- (RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN)); ++ tmp = RREG32_MC(RS480_MC_MISC_CNTL); ++ tmp |= RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN; ++ WREG32_MC(RS480_MC_MISC_CNTL, tmp); + } else { +- WREG32_MC(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN); ++ tmp = RREG32_MC(RS480_MC_MISC_CNTL); ++ tmp |= RS480_GART_INDEX_REG_EN; ++ WREG32_MC(RS480_MC_MISC_CNTL, tmp); + } + /* Enable gart */ + WREG32_MC(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN | size_reg)); +Index: linux-3.10-3.10.11/dummy/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1187_a7b153243b75dc0633a0ef85f1598d719a6624e6.txt 2014-04-28 00:36:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.patch 2014-04-28 00:36:43.000000000 +0000 @@ -0,0 +1,55 @@ +commit 911181cc6e98ee814b4f1616d1b59a54b6bb8e6f +Author: Alex Deucher +Date: Tue Aug 27 12:36:01 2013 -0400 + + drm/radeon: fix handling of variable sized arrays for router objects + + commit fb93df1c2d8b3b1fb16d6ee9e32554e0c038815d upstream. + + The table has the following format: + + typedef struct _ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT //usSrcDstTableOffset pointing to this structure + { + UCHAR ucNumberOfSrc; + USHORT usSrcObjectID[1]; + UCHAR ucNumberOfDst; + USHORT usDstObjectID[1]; + }ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT; + + usSrcObjectID[] and usDstObjectID[] are variably sized, so we + can't access them directly. Use pointers and update the offset + appropriately when accessing the Dst members. + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_atombios.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_atombios.c 2014-04-28 00:36:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_atombios.c 2014-04-28 00:36:43.000000000 +0000 +@@ -715,13 +715,16 @@ + (ATOM_SRC_DST_TABLE_FOR_ONE_OBJECT *) + (ctx->bios + data_offset + + le16_to_cpu(router_obj->asObjects[k].usSrcDstTableOffset)); ++ u8 *num_dst_objs = (u8 *) ++ ((u8 *)router_src_dst_table + 1 + ++ (router_src_dst_table->ucNumberOfSrc * 2)); ++ u16 *dst_objs = (u16 *)(num_dst_objs + 1); + int enum_id; + + router.router_id = router_obj_id; +- for (enum_id = 0; enum_id < router_src_dst_table->ucNumberOfDst; +- enum_id++) { ++ for (enum_id = 0; enum_id < (*num_dst_objs); enum_id++) { + if (le16_to_cpu(path->usConnObjectId) == +- le16_to_cpu(router_src_dst_table->usDstObjectID[enum_id])) ++ le16_to_cpu(dst_objs[enum_id])) + break; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1188_911181cc6e98ee814b4f1616d1b59a54b6bb8e6f.txt 2014-04-28 00:36:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.patch 2014-04-28 00:36:44.000000000 +0000 @@ -0,0 +1,88 @@ +commit 39bad38d5dddaaf1296a1e3f0bd75ee952521afc +Author: Stanislaw Gruszka +Date: Mon Sep 9 12:37:37 2013 +0200 + + rt2800: change initialization sequence to fix system freeze + + commit f4e1a4d3ecbb9e42bdf8e7869ee8a4ebfa27fb20 upstream. + + My commit + + commit c630ccf1a127578421a928489d51e99c05037054 + Author: Stanislaw Gruszka + Date: Sat Mar 16 19:19:46 2013 +0100 + + rt2800: rearrange bbp/rfcsr initialization + + make Maxim machine freeze when try to start wireless device. + + Initialization order and sending MCU_BOOT_SIGNAL request, changed in + above commit, is important. Doing things incorrectly make PCIe bus + problems, which can froze the machine. + + This patch change initialization sequence like vendor driver do: + function NICInitializeAsic() from + 2011_1007_RT5390_RT5392_Linux_STA_V2.5.0.3_DPO (PCI devices) and + DPO_RT5572_LinuxSTA_2.6.1.3_20121022 (according Mediatek, latest driver + for RT8070/RT3070/RT3370/RT3572/RT5370/RT5372/RT5572 USB devices). + It fixes freezes on Maxim system. + + Resolve: + https://bugzilla.redhat.com/show_bug.cgi?id=1000679 + + Reported-and-tested-by: Maxim Polyakov + Bisected-by: Igor Gnatenko + Cc: stable@vger.kernel.org # 3.10+ + Signed-off-by: Stanislaw Gruszka + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-28 00:36:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-28 00:36:43.000000000 +0000 +@@ -4048,10 +4048,6 @@ + u8 reg_id; + u8 value; + +- if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev) || +- rt2800_wait_bbp_ready(rt2x00dev))) +- return -EACCES; +- + if (rt2x00_rt(rt2x00dev, RT5592)) { + rt2800_init_bbp_5592(rt2x00dev); + return 0; +@@ -5192,20 +5188,23 @@ + rt2800_init_registers(rt2x00dev))) + return -EIO; + ++ if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev))) ++ return -EIO; ++ + /* + * Send signal to firmware during boot time. + */ + rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0); + rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); +- if (rt2x00_is_usb(rt2x00dev)) { ++ if (rt2x00_is_usb(rt2x00dev)) + rt2800_register_write(rt2x00dev, H2M_INT_SRC, 0); +- rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); +- } ++ rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0, 0, 0); + msleep(1); + +- if (unlikely(rt2800_init_bbp(rt2x00dev))) ++ if (unlikely(rt2800_wait_bbp_ready(rt2x00dev))) + return -EIO; + ++ rt2800_init_bbp(rt2x00dev); + rt2800_init_rfcsr(rt2x00dev); + + if (rt2x00_is_usb(rt2x00dev) && +Index: linux-3.10-3.10.11/dummy/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1189_39bad38d5dddaaf1296a1e3f0bd75ee952521afc.txt 2014-04-28 00:36:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.patch 2014-04-28 00:36:45.000000000 +0000 @@ -0,0 +1,54 @@ +commit abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c +Author: Alex Deucher +Date: Mon Sep 9 10:54:22 2013 -0400 + + drm/radeon/atom: workaround vbios bug in transmitter table on rs880 (v2) + + commit 91f3a6aaf280294b07c05dfe606e6c27b7ba3c72 upstream. + + The OUTPUT_ENABLE action jumps past the point in the coder where + the data_offset is set on certain rs780 cards. This worked + previously because the OUTPUT_ENABLE action is always called + immediately after the ENABLE action so the data_offset remained + set. In 6f8bbaf568c7f2c497558bfd04654c0b9841ad57 + (drm/radeon/atom: initialize more atom interpretor elements to 0), + we explictly reset data_offset to 0 between atom calls which then + caused this to fail. The fix is to just skip calling the + OUTPUT_ENABLE action on the problematic chipsets. The ENABLE + action does the same thing and more. Ultimately, we could + probably drop the OUTPUT_ENABLE action all together on DCE3 + asics. + + fixes: + https://bugzilla.kernel.org/show_bug.cgi?id=60791 + + v2: only rs880 seems to be affected + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_encoders.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/atombios_encoders.c 2014-04-27 23:39:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_encoders.c 2014-04-28 00:36:44.000000000 +0000 +@@ -1636,8 +1636,12 @@ + atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0); + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); +- /* some early dce3.2 boards have a bug in their transmitter control table */ +- if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730)) ++ /* some dce3.x boards have a bug in their transmitter control table. ++ * ACTION_ENABLE_OUTPUT can probably be dropped since ACTION_ENABLE ++ * does the same thing and more. ++ */ ++ if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730) && ++ (rdev->family != CHIP_RS880)) + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); + } + if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { +Index: linux-3.10-3.10.11/dummy/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1190_abc1e807c2bd7cd5b1aeedca2c4bb41eb786828c.txt 2014-04-28 00:36:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.patch 2014-04-28 00:36:45.000000000 +0000 @@ -0,0 +1,101 @@ +commit 85faca8521551b799955359334969b2b58cdd2fa +Author: Alex Deucher +Date: Fri Sep 13 18:33:16 2013 -0400 + + drm/radeon: fix panel scaling with eDP and LVDS bridges + + commit 855f5f1d882a34e4e9dd27b299737cd3508a5624 upstream. + + We were using the wrong set_properly callback so we always + ended up with Full scaling even if something else (Center or + Full aspect) was selected. + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_connectors.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_connectors.c 2014-04-27 23:39:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_connectors.c 2014-04-28 00:36:45.000000000 +0000 +@@ -1489,6 +1489,24 @@ + .force = radeon_dvi_force, + }; + ++static const struct drm_connector_funcs radeon_edp_connector_funcs = { ++ .dpms = drm_helper_connector_dpms, ++ .detect = radeon_dp_detect, ++ .fill_modes = drm_helper_probe_single_connector_modes, ++ .set_property = radeon_lvds_set_property, ++ .destroy = radeon_dp_connector_destroy, ++ .force = radeon_dvi_force, ++}; ++ ++static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = { ++ .dpms = drm_helper_connector_dpms, ++ .detect = radeon_dp_detect, ++ .fill_modes = drm_helper_probe_single_connector_modes, ++ .set_property = radeon_lvds_set_property, ++ .destroy = radeon_dp_connector_destroy, ++ .force = radeon_dvi_force, ++}; ++ + void + radeon_add_atom_connector(struct drm_device *dev, + uint32_t connector_id, +@@ -1580,8 +1598,6 @@ + goto failed; + radeon_dig_connector->igp_lane_info = igp_lane_info; + radeon_connector->con_priv = radeon_dig_connector; +- drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); +- drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); + if (i2c_bus->valid) { + /* add DP i2c bus */ + if (connector_type == DRM_MODE_CONNECTOR_eDP) +@@ -1598,6 +1614,10 @@ + case DRM_MODE_CONNECTOR_VGA: + case DRM_MODE_CONNECTOR_DVIA: + default: ++ drm_connector_init(dev, &radeon_connector->base, ++ &radeon_dp_connector_funcs, connector_type); ++ drm_connector_helper_add(&radeon_connector->base, ++ &radeon_dp_connector_helper_funcs); + connector->interlace_allowed = true; + connector->doublescan_allowed = true; + radeon_connector->dac_load_detect = true; +@@ -1610,6 +1630,10 @@ + case DRM_MODE_CONNECTOR_HDMIA: + case DRM_MODE_CONNECTOR_HDMIB: + case DRM_MODE_CONNECTOR_DisplayPort: ++ drm_connector_init(dev, &radeon_connector->base, ++ &radeon_dp_connector_funcs, connector_type); ++ drm_connector_helper_add(&radeon_connector->base, ++ &radeon_dp_connector_helper_funcs); + drm_object_attach_property(&radeon_connector->base.base, + rdev->mode_info.underscan_property, + UNDERSCAN_OFF); +@@ -1634,6 +1658,10 @@ + break; + case DRM_MODE_CONNECTOR_LVDS: + case DRM_MODE_CONNECTOR_eDP: ++ drm_connector_init(dev, &radeon_connector->base, ++ &radeon_lvds_bridge_connector_funcs, connector_type); ++ drm_connector_helper_add(&radeon_connector->base, ++ &radeon_dp_connector_helper_funcs); + drm_object_attach_property(&radeon_connector->base.base, + dev->mode_config.scaling_mode_property, + DRM_MODE_SCALE_FULLSCREEN); +@@ -1797,7 +1825,7 @@ + goto failed; + radeon_dig_connector->igp_lane_info = igp_lane_info; + radeon_connector->con_priv = radeon_dig_connector; +- drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); ++ drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type); + drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs); + if (i2c_bus->valid) { + /* add DP i2c bus */ +Index: linux-3.10-3.10.11/dummy/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1191_85faca8521551b799955359334969b2b58cdd2fa.txt 2014-04-28 00:36:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.patch 2014-04-28 00:36:46.000000000 +0000 @@ -0,0 +1,39 @@ +commit 075bf1f91aba3d3c689fa370850a6b89aa31cfe5 +Author: Christian König +Date: Sun Sep 15 13:31:28 2013 +0200 + + drm/radeon: avoid UVD corruptions on AGP cards + + commit 4f66c59922cbcda14c9e103e6c7f4ee616360d43 upstream. + + Putting everything into VRAM seems to help. + + Signed-off-by: Christian König + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_cs.c 2014-04-27 23:39:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cs.c 2014-04-28 00:36:46.000000000 +0000 +@@ -80,9 +80,11 @@ + p->relocs[i].lobj.bo = p->relocs[i].robj; + p->relocs[i].lobj.written = !!r->write_domain; + +- /* the first reloc of an UVD job is the +- msg and that must be in VRAM */ +- if (p->ring == R600_RING_TYPE_UVD_INDEX && i == 0) { ++ /* the first reloc of an UVD job is the msg and that must be in ++ VRAM, also but everything into VRAM on AGP cards to avoid ++ image corruptions */ ++ if (p->ring == R600_RING_TYPE_UVD_INDEX && ++ (i == 0 || p->rdev->flags & RADEON_IS_AGP)) { + /* TODO: is this still needed for NI+ ? */ + p->relocs[i].lobj.domain = + RADEON_GEM_DOMAIN_VRAM; +Index: linux-3.10-3.10.11/dummy/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1192_075bf1f91aba3d3c689fa370850a6b89aa31cfe5.txt 2014-04-28 00:36:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.patch --- linux-3.10.11/debian/patches/rpi/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.patch 2014-04-28 00:36:47.000000000 +0000 @@ -0,0 +1,141 @@ +commit 3db27a31a8b1c89bd6a0736559ee58550efe6278 +Author: Randy Dunlap +Date: Wed May 8 17:28:13 2013 -0300 + + media: media/usb: fix kconfig dependencies + + commit a0f9354b1a319cb29c331bfd2e5a15d7f9b87fa4 upstream. + + (a.k.a. Kconfig bool depending on a tristate considered harmful) + Fix various build errors when CONFIG_USB=m and media USB drivers + are builtin. In this case, CONFIG_USB_ZR364XX=y, + CONFIG_VIDEO_PVRUSB2=y, and CONFIG_VIDEO_STK1160=y. + This is caused by (from drivers/media/usb/Kconfig): + menuconfig MEDIA_USB_SUPPORT + bool "Media USB Adapters" + depends on USB && MEDIA_SUPPORT + =m =y + so MEDIA_USB_SUPPORT=y and all following Kconfig 'source' lines + are included. By adding an "if USB" guard around most of this file, + the needed dependencies are enforced. + drivers/built-in.o: In function `zr364xx_start_readpipe': + zr364xx.c:(.text+0xc726a): undefined reference to `usb_alloc_urb' + zr364xx.c:(.text+0xc72bb): undefined reference to `usb_submit_urb' + drivers/built-in.o: In function `zr364xx_stop_readpipe': + zr364xx.c:(.text+0xc72fd): undefined reference to `usb_kill_urb' + zr364xx.c:(.text+0xc7309): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `read_pipe_completion': + zr364xx.c:(.text+0xc7acc): undefined reference to `usb_submit_urb' + drivers/built-in.o: In function `send_control_msg.constprop.12': + zr364xx.c:(.text+0xc7d2f): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `pvr2_ctl_timeout': + pvrusb2-hdw.c:(.text+0xcadb6): undefined reference to `usb_unlink_urb' + pvrusb2-hdw.c:(.text+0xcadcb): undefined reference to `usb_unlink_urb' + drivers/built-in.o: In function `pvr2_hdw_create': + (.text+0xcc42c): undefined reference to `usb_alloc_urb' + drivers/built-in.o: In function `pvr2_hdw_create': + (.text+0xcc448): undefined reference to `usb_alloc_urb' + drivers/built-in.o: In function `pvr2_hdw_create': + (.text+0xcc5f9): undefined reference to `usb_set_interface' + drivers/built-in.o: In function `pvr2_hdw_create': + (.text+0xcc65a): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `pvr2_hdw_create': + (.text+0xcc666): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `pvr2_send_request_ex.part.22': + pvrusb2-hdw.c:(.text+0xccbe3): undefined reference to `usb_submit_urb' + pvrusb2-hdw.c:(.text+0xccc83): undefined reference to `usb_submit_urb' + drivers/built-in.o: In function `pvr2_hdw_remove_usb_stuff.part.25': + pvrusb2-hdw.c:(.text+0xcd3f9): undefined reference to `usb_kill_urb' + pvrusb2-hdw.c:(.text+0xcd405): undefined reference to `usb_free_urb' + pvrusb2-hdw.c:(.text+0xcd421): undefined reference to `usb_kill_urb' + pvrusb2-hdw.c:(.text+0xcd42d): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `pvr2_hdw_device_reset': + (.text+0xcd658): undefined reference to `usb_lock_device_for_reset' + drivers/built-in.o: In function `pvr2_hdw_device_reset': + (.text+0xcd664): undefined reference to `usb_reset_device' + drivers/built-in.o: In function `pvr2_hdw_cpureset_assert': + (.text+0xcd6f9): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `pvr2_hdw_cpufw_set_enabled': + (.text+0xcd84e): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `pvr2_upload_firmware1': + pvrusb2-hdw.c:(.text+0xcda47): undefined reference to `usb_clear_halt' + pvrusb2-hdw.c:(.text+0xcdb04): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `pvr2_upload_firmware2': + (.text+0xce7dc): undefined reference to `usb_bulk_msg' + drivers/built-in.o: In function `pvr2_stream_buffer_count': + pvrusb2-io.c:(.text+0xd2e05): undefined reference to `usb_alloc_urb' + pvrusb2-io.c:(.text+0xd2e5b): undefined reference to `usb_kill_urb' + pvrusb2-io.c:(.text+0xd2e9f): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `pvr2_stream_internal_flush': + pvrusb2-io.c:(.text+0xd2f9b): undefined reference to `usb_kill_urb' + drivers/built-in.o: In function `pvr2_buffer_queue': + (.text+0xd3328): undefined reference to `usb_kill_urb' + drivers/built-in.o: In function `pvr2_buffer_queue': + (.text+0xd33ea): undefined reference to `usb_submit_urb' + drivers/built-in.o: In function `stk1160_read_reg': + (.text+0xd3efa): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `stk1160_write_reg': + (.text+0xd3f4f): undefined reference to `usb_control_msg' + drivers/built-in.o: In function `stop_streaming': + stk1160-v4l.c:(.text+0xd4997): undefined reference to `usb_set_interface' + drivers/built-in.o: In function `start_streaming': + stk1160-v4l.c:(.text+0xd4a9f): undefined reference to `usb_set_interface' + stk1160-v4l.c:(.text+0xd4afa): undefined reference to `usb_submit_urb' + stk1160-v4l.c:(.text+0xd4ba3): undefined reference to `usb_set_interface' + drivers/built-in.o: In function `stk1160_isoc_irq': + stk1160-video.c:(.text+0xd509b): undefined reference to `usb_submit_urb' + drivers/built-in.o: In function `stk1160_cancel_isoc': + (.text+0xd50ef): undefined reference to `usb_kill_urb' + drivers/built-in.o: In function `stk1160_free_isoc': + (.text+0xd5155): undefined reference to `usb_free_coherent' + drivers/built-in.o: In function `stk1160_free_isoc': + (.text+0xd515d): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `stk1160_alloc_isoc': + (.text+0xd5278): undefined reference to `usb_alloc_urb' + drivers/built-in.o: In function `stk1160_alloc_isoc': + (.text+0xd52c2): undefined reference to `usb_alloc_coherent' + drivers/built-in.o: In function `stk1160_alloc_isoc': + (.text+0xd53c4): undefined reference to `usb_free_urb' + drivers/built-in.o: In function `zr364xx_driver_init': + zr364xx.c:(.init.text+0x463e): undefined reference to `usb_register_driver' + drivers/built-in.o: In function `pvr_init': + pvrusb2-main.c:(.init.text+0x4662): undefined reference to `usb_register_driver' + drivers/built-in.o: In function `stk1160_usb_driver_init': + stk1160-core.c:(.init.text+0x467d): undefined reference to `usb_register_driver' + drivers/built-in.o: In function `zr364xx_driver_exit': + zr364xx.c:(.exit.text+0x1377): undefined reference to `usb_deregister' + drivers/built-in.o: In function `pvr_exit': + pvrusb2-main.c:(.exit.text+0x1389): undefined reference to `usb_deregister' + drivers/built-in.o: In function `stk1160_usb_driver_exit': + stk1160-core.c:(.exit.text+0x13a0): undefined reference to `usb_deregister' + + Suggested-by: "Yann E. MORIN" + Signed-off-by: Randy Dunlap + Signed-off-by: Mauro Carvalho Chehab + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/usb/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/Kconfig 2014-04-27 23:39:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/Kconfig 2014-04-28 00:36:47.000000000 +0000 +@@ -1,6 +1,8 @@ ++if USB ++ + menuconfig MEDIA_USB_SUPPORT + bool "Media USB Adapters" +- depends on USB && MEDIA_SUPPORT ++ depends on MEDIA_SUPPORT + help + Enable media drivers for USB bus. + If you have such devices, say Y. +@@ -52,3 +54,4 @@ + endif + + endif #MEDIA_USB_SUPPORT ++endif #USB +Index: linux-3.10-3.10.11/dummy/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1193_3db27a31a8b1c89bd6a0736559ee58550efe6278.txt 2014-04-28 00:36:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.patch 2014-04-28 00:36:48.000000000 +0000 @@ -0,0 +1,58 @@ +commit 7b7b9915f77d3c5db399866080751e9dafc9136f +Author: Mauro Carvalho Chehab +Date: Wed May 22 11:25:52 2013 -0300 + + Properly handle tristate dependencies on USB/PCI menus + + commit 5077ac3b8108007f4a2b4589f2d373cf55453206 upstream. + + As USB/PCI/MEDIA_SUPPORT dependencies can be tristate, we can't + simply make the bool menu to be dependent on it. Everything below + the menu should also depend on it, otherwise, we risk to allow + building them with 'y', while only 'm' would be supported. + + So, add an IF just before everything below, in order to avoid + such risks. + + Signed-off-by: Mauro Carvalho Chehab + Cc: Randy Dunlap + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/media/pci/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/pci/Kconfig 2014-04-27 23:39:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/pci/Kconfig 2014-04-28 00:36:47.000000000 +0000 +@@ -1,6 +1,7 @@ ++if PCI && MEDIA_SUPPORT ++ + menuconfig MEDIA_PCI_SUPPORT + bool "Media PCI Adapters" +- depends on PCI && MEDIA_SUPPORT + help + Enable media drivers for PCI/PCIe bus. + If you have such devices, say Y. +@@ -45,3 +46,4 @@ + endif + + endif #MEDIA_PCI_SUPPORT ++endif #PCI +Index: linux-3.10-3.10.11/drivers/media/usb/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/Kconfig 2014-04-28 00:36:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/Kconfig 2014-04-28 00:36:47.000000000 +0000 +@@ -1,8 +1,7 @@ +-if USB ++if USB && MEDIA_SUPPORT + + menuconfig MEDIA_USB_SUPPORT + bool "Media USB Adapters" +- depends on MEDIA_SUPPORT + help + Enable media drivers for USB bus. + If you have such devices, say Y. +Index: linux-3.10-3.10.11/dummy/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1194_7b7b9915f77d3c5db399866080751e9dafc9136f.txt 2014-04-28 00:36:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.patch --- linux-3.10.11/debian/patches/rpi/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.patch 2014-04-28 00:36:49.000000000 +0000 @@ -0,0 +1,734 @@ +commit 66ccf96185266dee7b0b15ae08e9c1359e0e1c47 +Author: Jan Kara +Date: Thu Jul 25 19:10:59 2013 +0200 + + udf: Standardize return values in mount sequence + + commit d759bfa4e7919b89357de50a2e23817079889195 upstream. + + Change all function used in filesystem discovery during mount to user + standard kernel return values - -errno on error, 0 on success instead + of 1 on failure and 0 on success. This allows us to pass error number + (not just failure / success) so we can abort device scanning earlier + in case of errors like EIO or ENOMEM . Also we will be able to return + EROFS in case writeable mount is requested but writing isn't supported. + + Signed-off-by: Jan Kara + Cc: Hui Wang + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/udf/super.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/udf/super.c 2014-04-27 23:39:25.000000000 +0000 ++++ linux-3.10-3.10.11/fs/udf/super.c 2014-04-28 00:36:49.000000000 +0000 +@@ -843,27 +843,38 @@ + return 1; + } + ++/* ++ * Load primary Volume Descriptor Sequence ++ * ++ * Return <0 on error, 0 on success. -EAGAIN is special meaning next sequence ++ * should be tried. ++ */ + static int udf_load_pvoldesc(struct super_block *sb, sector_t block) + { + struct primaryVolDesc *pvoldesc; + struct ustr *instr, *outstr; + struct buffer_head *bh; + uint16_t ident; +- int ret = 1; ++ int ret = -ENOMEM; + + instr = kmalloc(sizeof(struct ustr), GFP_NOFS); + if (!instr) +- return 1; ++ return -ENOMEM; + + outstr = kmalloc(sizeof(struct ustr), GFP_NOFS); + if (!outstr) + goto out1; + + bh = udf_read_tagged(sb, block, block, &ident); +- if (!bh) ++ if (!bh) { ++ ret = -EAGAIN; + goto out2; ++ } + +- BUG_ON(ident != TAG_IDENT_PVD); ++ if (ident != TAG_IDENT_PVD) { ++ ret = -EIO; ++ goto out_bh; ++ } + + pvoldesc = (struct primaryVolDesc *)bh->b_data; + +@@ -889,8 +900,9 @@ + if (udf_CS0toUTF8(outstr, instr)) + udf_debug("volSetIdent[] = '%s'\n", outstr->u_name); + +- brelse(bh); + ret = 0; ++out_bh: ++ brelse(bh); + out2: + kfree(outstr); + out1: +@@ -947,7 +959,7 @@ + + if (mdata->s_mirror_fe == NULL) { + udf_err(sb, "Both metadata and mirror metadata inode efe can not found\n"); +- goto error_exit; ++ return -EIO; + } + } + +@@ -964,23 +976,18 @@ + addr.logicalBlockNum, addr.partitionReferenceNum); + + mdata->s_bitmap_fe = udf_iget(sb, &addr); +- + if (mdata->s_bitmap_fe == NULL) { + if (sb->s_flags & MS_RDONLY) + udf_warn(sb, "bitmap inode efe not found but it's ok since the disc is mounted read-only\n"); + else { + udf_err(sb, "bitmap inode efe not found and attempted read-write mount\n"); +- goto error_exit; ++ return -EIO; + } + } + } + + udf_debug("udf_load_metadata_files Ok\n"); +- + return 0; +- +-error_exit: +- return 1; + } + + static void udf_load_fileset(struct super_block *sb, struct buffer_head *bh, +@@ -1069,7 +1076,7 @@ + if (!map->s_uspace.s_table) { + udf_debug("cannot load unallocSpaceTable (part %d)\n", + p_index); +- return 1; ++ return -EIO; + } + map->s_partition_flags |= UDF_PART_FLAG_UNALLOC_TABLE; + udf_debug("unallocSpaceTable (part %d) @ %ld\n", +@@ -1079,7 +1086,7 @@ + if (phd->unallocSpaceBitmap.extLength) { + struct udf_bitmap *bitmap = udf_sb_alloc_bitmap(sb, p_index); + if (!bitmap) +- return 1; ++ return -ENOMEM; + map->s_uspace.s_bitmap = bitmap; + bitmap->s_extPosition = le32_to_cpu( + phd->unallocSpaceBitmap.extPosition); +@@ -1102,7 +1109,7 @@ + if (!map->s_fspace.s_table) { + udf_debug("cannot load freedSpaceTable (part %d)\n", + p_index); +- return 1; ++ return -EIO; + } + + map->s_partition_flags |= UDF_PART_FLAG_FREED_TABLE; +@@ -1113,7 +1120,7 @@ + if (phd->freedSpaceBitmap.extLength) { + struct udf_bitmap *bitmap = udf_sb_alloc_bitmap(sb, p_index); + if (!bitmap) +- return 1; ++ return -ENOMEM; + map->s_fspace.s_bitmap = bitmap; + bitmap->s_extPosition = le32_to_cpu( + phd->freedSpaceBitmap.extPosition); +@@ -1165,7 +1172,7 @@ + udf_find_vat_block(sb, p_index, type1_index, blocks - 1); + } + if (!sbi->s_vat_inode) +- return 1; ++ return -EIO; + + if (map->s_partition_type == UDF_VIRTUAL_MAP15) { + map->s_type_specific.s_virtual.s_start_offset = 0; +@@ -1177,7 +1184,7 @@ + pos = udf_block_map(sbi->s_vat_inode, 0); + bh = sb_bread(sb, pos); + if (!bh) +- return 1; ++ return -EIO; + vat20 = (struct virtualAllocationTable20 *)bh->b_data; + } else { + vat20 = (struct virtualAllocationTable20 *) +@@ -1195,6 +1202,12 @@ + return 0; + } + ++/* ++ * Load partition descriptor block ++ * ++ * Returns <0 on error, 0 on success, -EAGAIN is special - try next descriptor ++ * sequence. ++ */ + static int udf_load_partdesc(struct super_block *sb, sector_t block) + { + struct buffer_head *bh; +@@ -1204,13 +1217,15 @@ + int i, type1_idx; + uint16_t partitionNumber; + uint16_t ident; +- int ret = 0; ++ int ret; + + bh = udf_read_tagged(sb, block, block, &ident); + if (!bh) +- return 1; +- if (ident != TAG_IDENT_PD) ++ return -EAGAIN; ++ if (ident != TAG_IDENT_PD) { ++ ret = 0; + goto out_bh; ++ } + + p = (struct partitionDesc *)bh->b_data; + partitionNumber = le16_to_cpu(p->partitionNumber); +@@ -1229,10 +1244,13 @@ + if (i >= sbi->s_partitions) { + udf_debug("Partition (%d) not found in partition map\n", + partitionNumber); ++ ret = 0; + goto out_bh; + } + + ret = udf_fill_partdesc_info(sb, p, i); ++ if (ret < 0) ++ goto out_bh; + + /* + * Now rescan for VIRTUAL or METADATA partitions when SPARABLE and +@@ -1249,23 +1267,25 @@ + break; + } + +- if (i >= sbi->s_partitions) ++ if (i >= sbi->s_partitions) { ++ ret = 0; + goto out_bh; ++ } + + ret = udf_fill_partdesc_info(sb, p, i); +- if (ret) ++ if (ret < 0) + goto out_bh; + + if (map->s_partition_type == UDF_METADATA_MAP25) { + ret = udf_load_metadata_files(sb, i); +- if (ret) { ++ if (ret < 0) { + udf_err(sb, "error loading MetaData partition map %d\n", + i); + goto out_bh; + } + } else { + ret = udf_load_vat(sb, i, type1_idx); +- if (ret) ++ if (ret < 0) + goto out_bh; + /* + * Mark filesystem read-only if we have a partition with +@@ -1275,6 +1295,7 @@ + sb->s_flags |= MS_RDONLY; + pr_notice("Filesystem marked read-only because writing to pseudooverwrite partition is not implemented\n"); + } ++ ret = 0; + out_bh: + /* In case loading failed, we handle cleanup in udf_fill_super */ + brelse(bh); +@@ -1340,11 +1361,11 @@ + uint16_t ident; + struct buffer_head *bh; + unsigned int table_len; +- int ret = 0; ++ int ret; + + bh = udf_read_tagged(sb, block, block, &ident); + if (!bh) +- return 1; ++ return -EAGAIN; + BUG_ON(ident != TAG_IDENT_LVD); + lvd = (struct logicalVolDesc *)bh->b_data; + table_len = le32_to_cpu(lvd->mapTableLength); +@@ -1352,7 +1373,7 @@ + udf_err(sb, "error loading logical volume descriptor: " + "Partition table too long (%u > %lu)\n", table_len, + sb->s_blocksize - sizeof(*lvd)); +- ret = 1; ++ ret = -EIO; + goto out_bh; + } + +@@ -1396,11 +1417,10 @@ + } else if (!strncmp(upm2->partIdent.ident, + UDF_ID_SPARABLE, + strlen(UDF_ID_SPARABLE))) { +- if (udf_load_sparable_map(sb, map, +- (struct sparablePartitionMap *)gpm) < 0) { +- ret = 1; ++ ret = udf_load_sparable_map(sb, map, ++ (struct sparablePartitionMap *)gpm); ++ if (ret < 0) + goto out_bh; +- } + } else if (!strncmp(upm2->partIdent.ident, + UDF_ID_METADATA, + strlen(UDF_ID_METADATA))) { +@@ -1465,7 +1485,7 @@ + } + if (lvd->integritySeqExt.extLength) + udf_load_logicalvolint(sb, leea_to_cpu(lvd->integritySeqExt)); +- ++ ret = 0; + out_bh: + brelse(bh); + return ret; +@@ -1503,22 +1523,18 @@ + } + + /* +- * udf_process_sequence +- * +- * PURPOSE +- * Process a main/reserve volume descriptor sequence. ++ * Process a main/reserve volume descriptor sequence. ++ * @block First block of first extent of the sequence. ++ * @lastblock Lastblock of first extent of the sequence. ++ * @fileset There we store extent containing root fileset + * +- * PRE-CONDITIONS +- * sb Pointer to _locked_ superblock. +- * block First block of first extent of the sequence. +- * lastblock Lastblock of first extent of the sequence. +- * +- * HISTORY +- * July 1, 1997 - Andrew E. Mileski +- * Written, tested, and released. ++ * Returns <0 on error, 0 on success. -EAGAIN is special - try next descriptor ++ * sequence + */ +-static noinline int udf_process_sequence(struct super_block *sb, long block, +- long lastblock, struct kernel_lb_addr *fileset) ++static noinline int udf_process_sequence( ++ struct super_block *sb, ++ sector_t block, sector_t lastblock, ++ struct kernel_lb_addr *fileset) + { + struct buffer_head *bh = NULL; + struct udf_vds_record vds[VDS_POS_LENGTH]; +@@ -1529,6 +1545,7 @@ + uint32_t vdsn; + uint16_t ident; + long next_s = 0, next_e = 0; ++ int ret; + + memset(vds, 0, sizeof(struct udf_vds_record) * VDS_POS_LENGTH); + +@@ -1543,7 +1560,7 @@ + udf_err(sb, + "Block %llu of volume descriptor sequence is corrupted or we could not read it\n", + (unsigned long long)block); +- return 1; ++ return -EAGAIN; + } + + /* Process each descriptor (ISO 13346 3/8.3-8.4) */ +@@ -1616,14 +1633,19 @@ + */ + if (!vds[VDS_POS_PRIMARY_VOL_DESC].block) { + udf_err(sb, "Primary Volume Descriptor not found!\n"); +- return 1; ++ return -EAGAIN; ++ } ++ ret = udf_load_pvoldesc(sb, vds[VDS_POS_PRIMARY_VOL_DESC].block); ++ if (ret < 0) ++ return ret; ++ ++ if (vds[VDS_POS_LOGICAL_VOL_DESC].block) { ++ ret = udf_load_logicalvol(sb, ++ vds[VDS_POS_LOGICAL_VOL_DESC].block, ++ fileset); ++ if (ret < 0) ++ return ret; + } +- if (udf_load_pvoldesc(sb, vds[VDS_POS_PRIMARY_VOL_DESC].block)) +- return 1; +- +- if (vds[VDS_POS_LOGICAL_VOL_DESC].block && udf_load_logicalvol(sb, +- vds[VDS_POS_LOGICAL_VOL_DESC].block, fileset)) +- return 1; + + if (vds[VDS_POS_PARTITION_DESC].block) { + /* +@@ -1632,19 +1654,27 @@ + */ + for (block = vds[VDS_POS_PARTITION_DESC].block; + block < vds[VDS_POS_TERMINATING_DESC].block; +- block++) +- if (udf_load_partdesc(sb, block)) +- return 1; ++ block++) { ++ ret = udf_load_partdesc(sb, block); ++ if (ret < 0) ++ return ret; ++ } + } + + return 0; + } + ++/* ++ * Load Volume Descriptor Sequence described by anchor in bh ++ * ++ * Returns <0 on error, 0 on success ++ */ + static int udf_load_sequence(struct super_block *sb, struct buffer_head *bh, + struct kernel_lb_addr *fileset) + { + struct anchorVolDescPtr *anchor; +- long main_s, main_e, reserve_s, reserve_e; ++ sector_t main_s, main_e, reserve_s, reserve_e; ++ int ret; + + anchor = (struct anchorVolDescPtr *)bh->b_data; + +@@ -1662,18 +1692,26 @@ + + /* Process the main & reserve sequences */ + /* responsible for finding the PartitionDesc(s) */ +- if (!udf_process_sequence(sb, main_s, main_e, fileset)) +- return 1; ++ ret = udf_process_sequence(sb, main_s, main_e, fileset); ++ if (ret != -EAGAIN) ++ return ret; + udf_sb_free_partitions(sb); +- if (!udf_process_sequence(sb, reserve_s, reserve_e, fileset)) +- return 1; +- udf_sb_free_partitions(sb); +- return 0; ++ ret = udf_process_sequence(sb, reserve_s, reserve_e, fileset); ++ if (ret < 0) { ++ udf_sb_free_partitions(sb); ++ /* No sequence was OK, return -EIO */ ++ if (ret == -EAGAIN) ++ ret = -EIO; ++ } ++ return ret; + } + + /* + * Check whether there is an anchor block in the given block and + * load Volume Descriptor Sequence if so. ++ * ++ * Returns <0 on error, 0 on success, -EAGAIN is special - try next anchor ++ * block + */ + static int udf_check_anchor_block(struct super_block *sb, sector_t block, + struct kernel_lb_addr *fileset) +@@ -1685,33 +1723,40 @@ + if (UDF_QUERY_FLAG(sb, UDF_FLAG_VARCONV) && + udf_fixed_to_variable(block) >= + sb->s_bdev->bd_inode->i_size >> sb->s_blocksize_bits) +- return 0; ++ return -EAGAIN; + + bh = udf_read_tagged(sb, block, block, &ident); + if (!bh) +- return 0; ++ return -EAGAIN; + if (ident != TAG_IDENT_AVDP) { + brelse(bh); +- return 0; ++ return -EAGAIN; + } + ret = udf_load_sequence(sb, bh, fileset); + brelse(bh); + return ret; + } + +-/* Search for an anchor volume descriptor pointer */ +-static sector_t udf_scan_anchors(struct super_block *sb, sector_t lastblock, +- struct kernel_lb_addr *fileset) ++/* ++ * Search for an anchor volume descriptor pointer. ++ * ++ * Returns < 0 on error, 0 on success. -EAGAIN is special - try next set ++ * of anchors. ++ */ ++static int udf_scan_anchors(struct super_block *sb, sector_t *lastblock, ++ struct kernel_lb_addr *fileset) + { + sector_t last[6]; + int i; + struct udf_sb_info *sbi = UDF_SB(sb); + int last_count = 0; ++ int ret; + + /* First try user provided anchor */ + if (sbi->s_anchor) { +- if (udf_check_anchor_block(sb, sbi->s_anchor, fileset)) +- return lastblock; ++ ret = udf_check_anchor_block(sb, sbi->s_anchor, fileset); ++ if (ret != -EAGAIN) ++ return ret; + } + /* + * according to spec, anchor is in either: +@@ -1720,39 +1765,46 @@ + * lastblock + * however, if the disc isn't closed, it could be 512. + */ +- if (udf_check_anchor_block(sb, sbi->s_session + 256, fileset)) +- return lastblock; ++ ret = udf_check_anchor_block(sb, sbi->s_session + 256, fileset); ++ if (ret != -EAGAIN) ++ return ret; + /* + * The trouble is which block is the last one. Drives often misreport + * this so we try various possibilities. + */ +- last[last_count++] = lastblock; +- if (lastblock >= 1) +- last[last_count++] = lastblock - 1; +- last[last_count++] = lastblock + 1; +- if (lastblock >= 2) +- last[last_count++] = lastblock - 2; +- if (lastblock >= 150) +- last[last_count++] = lastblock - 150; +- if (lastblock >= 152) +- last[last_count++] = lastblock - 152; ++ last[last_count++] = *lastblock; ++ if (*lastblock >= 1) ++ last[last_count++] = *lastblock - 1; ++ last[last_count++] = *lastblock + 1; ++ if (*lastblock >= 2) ++ last[last_count++] = *lastblock - 2; ++ if (*lastblock >= 150) ++ last[last_count++] = *lastblock - 150; ++ if (*lastblock >= 152) ++ last[last_count++] = *lastblock - 152; + + for (i = 0; i < last_count; i++) { + if (last[i] >= sb->s_bdev->bd_inode->i_size >> + sb->s_blocksize_bits) + continue; +- if (udf_check_anchor_block(sb, last[i], fileset)) +- return last[i]; ++ ret = udf_check_anchor_block(sb, last[i], fileset); ++ if (ret != -EAGAIN) { ++ if (!ret) ++ *lastblock = last[i]; ++ return ret; ++ } + if (last[i] < 256) + continue; +- if (udf_check_anchor_block(sb, last[i] - 256, fileset)) +- return last[i]; ++ ret = udf_check_anchor_block(sb, last[i] - 256, fileset); ++ if (ret != -EAGAIN) { ++ if (!ret) ++ *lastblock = last[i]; ++ return ret; ++ } + } + + /* Finally try block 512 in case media is open */ +- if (udf_check_anchor_block(sb, sbi->s_session + 512, fileset)) +- return last[0]; +- return 0; ++ return udf_check_anchor_block(sb, sbi->s_session + 512, fileset); + } + + /* +@@ -1760,54 +1812,59 @@ + * area specified by it. The function expects sbi->s_lastblock to be the last + * block on the media. + * +- * Return 1 if ok, 0 if not found. +- * ++ * Return <0 on error, 0 if anchor found. -EAGAIN is special meaning anchor ++ * was not found. + */ + static int udf_find_anchor(struct super_block *sb, + struct kernel_lb_addr *fileset) + { +- sector_t lastblock; + struct udf_sb_info *sbi = UDF_SB(sb); ++ sector_t lastblock = sbi->s_last_block; ++ int ret; + +- lastblock = udf_scan_anchors(sb, sbi->s_last_block, fileset); +- if (lastblock) ++ ret = udf_scan_anchors(sb, &lastblock, fileset); ++ if (ret != -EAGAIN) + goto out; + + /* No anchor found? Try VARCONV conversion of block numbers */ + UDF_SET_FLAG(sb, UDF_FLAG_VARCONV); ++ lastblock = udf_variable_to_fixed(sbi->s_last_block); + /* Firstly, we try to not convert number of the last block */ +- lastblock = udf_scan_anchors(sb, +- udf_variable_to_fixed(sbi->s_last_block), +- fileset); +- if (lastblock) ++ ret = udf_scan_anchors(sb, &lastblock, fileset); ++ if (ret != -EAGAIN) + goto out; + ++ lastblock = sbi->s_last_block; + /* Secondly, we try with converted number of the last block */ +- lastblock = udf_scan_anchors(sb, sbi->s_last_block, fileset); +- if (!lastblock) { ++ ret = udf_scan_anchors(sb, &lastblock, fileset); ++ if (ret < 0) { + /* VARCONV didn't help. Clear it. */ + UDF_CLEAR_FLAG(sb, UDF_FLAG_VARCONV); +- return 0; + } + out: +- sbi->s_last_block = lastblock; +- return 1; ++ if (ret == 0) ++ sbi->s_last_block = lastblock; ++ return ret; + } + + /* + * Check Volume Structure Descriptor, find Anchor block and load Volume +- * Descriptor Sequence ++ * Descriptor Sequence. ++ * ++ * Returns < 0 on error, 0 on success. -EAGAIN is special meaning anchor ++ * block was not found. + */ + static int udf_load_vrs(struct super_block *sb, struct udf_options *uopt, + int silent, struct kernel_lb_addr *fileset) + { + struct udf_sb_info *sbi = UDF_SB(sb); + loff_t nsr_off; ++ int ret; + + if (!sb_set_blocksize(sb, uopt->blocksize)) { + if (!silent) + udf_warn(sb, "Bad block size\n"); +- return 0; ++ return -EINVAL; + } + sbi->s_last_block = uopt->lastblock; + if (!uopt->novrs) { +@@ -1828,12 +1885,13 @@ + + /* Look for anchor block and load Volume Descriptor Sequence */ + sbi->s_anchor = uopt->anchor; +- if (!udf_find_anchor(sb, fileset)) { +- if (!silent) ++ ret = udf_find_anchor(sb, fileset); ++ if (ret < 0) { ++ if (!silent && ret == -EAGAIN) + udf_warn(sb, "No anchor found\n"); +- return 0; ++ return ret; + } +- return 1; ++ return 0; + } + + static void udf_open_lvid(struct super_block *sb) +@@ -1939,7 +1997,7 @@ + + static int udf_fill_super(struct super_block *sb, void *options, int silent) + { +- int ret; ++ int ret = -EINVAL; + struct inode *inode = NULL; + struct udf_options uopt; + struct kernel_lb_addr rootdir, fileset; +@@ -2011,7 +2069,7 @@ + } else { + uopt.blocksize = bdev_logical_block_size(sb->s_bdev); + ret = udf_load_vrs(sb, &uopt, silent, &fileset); +- if (!ret && uopt.blocksize != UDF_DEFAULT_BLOCKSIZE) { ++ if (ret == -EAGAIN && uopt.blocksize != UDF_DEFAULT_BLOCKSIZE) { + if (!silent) + pr_notice("Rescanning with blocksize %d\n", + UDF_DEFAULT_BLOCKSIZE); +@@ -2021,8 +2079,11 @@ + ret = udf_load_vrs(sb, &uopt, silent, &fileset); + } + } +- if (!ret) { +- udf_warn(sb, "No partition found (1)\n"); ++ if (ret < 0) { ++ if (ret == -EAGAIN) { ++ udf_warn(sb, "No partition found (1)\n"); ++ ret = -EINVAL; ++ } + goto error_out; + } + +@@ -2040,6 +2101,7 @@ + udf_err(sb, "minUDFReadRev=%x (max is %x)\n", + le16_to_cpu(lvidiu->minUDFReadRev), + UDF_MAX_READ_VERSION); ++ ret = -EINVAL; + goto error_out; + } else if (minUDFWriteRev > UDF_MAX_WRITE_VERSION) + sb->s_flags |= MS_RDONLY; +@@ -2054,6 +2116,7 @@ + + if (!sbi->s_partitions) { + udf_warn(sb, "No partition found (2)\n"); ++ ret = -EINVAL; + goto error_out; + } + +@@ -2065,6 +2128,7 @@ + + if (udf_find_fileset(sb, &fileset, &rootdir)) { + udf_warn(sb, "No fileset found\n"); ++ ret = -EINVAL; + goto error_out; + } + +@@ -2086,6 +2150,7 @@ + if (!inode) { + udf_err(sb, "Error in udf_iget, block=%d, partition=%d\n", + rootdir.logicalBlockNum, rootdir.partitionReferenceNum); ++ ret = -EIO; + goto error_out; + } + +@@ -2093,6 +2158,7 @@ + sb->s_root = d_make_root(inode); + if (!sb->s_root) { + udf_err(sb, "Couldn't allocate root dentry\n"); ++ ret = -ENOMEM; + goto error_out; + } + sb->s_maxbytes = MAX_LFS_FILESIZE; +@@ -2113,7 +2179,7 @@ + kfree(sbi); + sb->s_fs_info = NULL; + +- return -EINVAL; ++ return ret; + } + + void _udf_err(struct super_block *sb, const char *function, +Index: linux-3.10-3.10.11/dummy/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1195_66ccf96185266dee7b0b15ae08e9c1359e0e1c47.txt 2014-04-28 00:36:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.patch 2014-04-28 00:36:50.000000000 +0000 @@ -0,0 +1,114 @@ +commit 39b79aa3f1554bb1e39be3b25d6c12fd429583d4 +Author: Jan Kara +Date: Thu Jul 25 16:15:16 2013 +0200 + + udf: Refuse RW mount of the filesystem instead of making it RO + + commit e729eac6f65e11c5f03b09adcc84bd5bcb230467 upstream. + + Refuse RW mount of udf filesystem. So far we just silently changed it + to RO mount but when the media is writeable, block layer won't notice + this change and thus will think device is used RW and will block eject + button of the drive. That is unexpected by users because for + non-writeable media eject button works just fine. + + Userspace mount(8) command handles this just fine and retries mounting + with MS_RDONLY set so userspace shouldn't see any regression. Plus any + tool mounting udf is likely confronted with the case of read-only + media where block layer already refuses to mount the filesystem without + MS_RDONLY set so our behavior shouldn't be anything new for it. + + Reported-by: Hui Wang + Signed-off-by: Jan Kara + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/udf/super.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/udf/super.c 2014-04-28 00:36:49.000000000 +0000 ++++ linux-3.10-3.10.11/fs/udf/super.c 2014-04-28 00:36:50.000000000 +0000 +@@ -630,6 +630,12 @@ + struct udf_sb_info *sbi = UDF_SB(sb); + int error = 0; + ++ if (sbi->s_lvid_bh) { ++ int write_rev = le16_to_cpu(udf_sb_lvidiu(sbi)->minUDFWriteRev); ++ if (write_rev > UDF_MAX_WRITE_VERSION && !(*flags & MS_RDONLY)) ++ return -EACCES; ++ } ++ + uopt.flags = sbi->s_flags; + uopt.uid = sbi->s_uid; + uopt.gid = sbi->s_gid; +@@ -649,12 +655,6 @@ + sbi->s_dmode = uopt.dmode; + write_unlock(&sbi->s_cred_lock); + +- if (sbi->s_lvid_bh) { +- int write_rev = le16_to_cpu(udf_sb_lvidiu(sbi)->minUDFWriteRev); +- if (write_rev > UDF_MAX_WRITE_VERSION) +- *flags |= MS_RDONLY; +- } +- + if ((*flags & MS_RDONLY) == (sb->s_flags & MS_RDONLY)) + goto out_unlock; + +@@ -1284,16 +1284,18 @@ + goto out_bh; + } + } else { ++ /* ++ * If we have a partition with virtual map, we don't handle ++ * writing to it (we overwrite blocks instead of relocating ++ * them). ++ */ ++ if (!(sb->s_flags & MS_RDONLY)) { ++ ret = -EACCES; ++ goto out_bh; ++ } + ret = udf_load_vat(sb, i, type1_idx); + if (ret < 0) + goto out_bh; +- /* +- * Mark filesystem read-only if we have a partition with +- * virtual map since we don't handle writing to it (we +- * overwrite blocks instead of relocating them). +- */ +- sb->s_flags |= MS_RDONLY; +- pr_notice("Filesystem marked read-only because writing to pseudooverwrite partition is not implemented\n"); + } + ret = 0; + out_bh: +@@ -2103,8 +2105,11 @@ + UDF_MAX_READ_VERSION); + ret = -EINVAL; + goto error_out; +- } else if (minUDFWriteRev > UDF_MAX_WRITE_VERSION) +- sb->s_flags |= MS_RDONLY; ++ } else if (minUDFWriteRev > UDF_MAX_WRITE_VERSION && ++ !(sb->s_flags & MS_RDONLY)) { ++ ret = -EACCES; ++ goto error_out; ++ } + + sbi->s_udfrev = minUDFWriteRev; + +@@ -2121,9 +2126,10 @@ + } + + if (sbi->s_partmaps[sbi->s_partition].s_partition_flags & +- UDF_PART_FLAG_READ_ONLY) { +- pr_notice("Partition marked readonly; forcing readonly mount\n"); +- sb->s_flags |= MS_RDONLY; ++ UDF_PART_FLAG_READ_ONLY && ++ !(sb->s_flags & MS_RDONLY)) { ++ ret = -EACCES; ++ goto error_out; + } + + if (udf_find_fileset(sb, &fileset, &rootdir)) { +Index: linux-3.10-3.10.11/dummy/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1196_39b79aa3f1554bb1e39be3b25d6c12fd429583d4.txt 2014-04-28 00:36:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.patch 2014-04-28 00:36:51.000000000 +0000 @@ -0,0 +1,51 @@ +commit 3ed3690eac0c839c6216fd7f7ce0add6a1f593b2 +Author: Konstantin Khlebnikov +Date: Tue Sep 24 15:27:42 2013 -0700 + + audit: fix endless wait in audit_log_start() + + commit 8ac1c8d5deba65513b6a82c35e89e73996c8e0d6 upstream. + + After commit 829199197a43 ("kernel/audit.c: avoid negative sleep + durations") audit emitters will block forever if userspace daemon cannot + handle backlog. + + After the timeout the waiting loop turns into busy loop and runs until + daemon dies or returns back to work. This is a minimal patch for that + bug. + + Signed-off-by: Konstantin Khlebnikov + Cc: Luiz Capitulino + Cc: Richard Guy Briggs + Cc: Eric Paris + Cc: Chuck Anderson + Cc: Dan Duval + Cc: Dave Kleikamp + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/audit.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/audit.c 2014-04-27 23:39:25.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/audit.c 2014-04-28 00:36:50.000000000 +0000 +@@ -1117,9 +1117,10 @@ + + sleep_time = timeout_start + audit_backlog_wait_time - + jiffies; +- if ((long)sleep_time > 0) ++ if ((long)sleep_time > 0) { + wait_for_auditd(sleep_time); +- continue; ++ continue; ++ } + } + if (audit_rate_check() && printk_ratelimit()) + printk(KERN_WARNING +Index: linux-3.10-3.10.11/dummy/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1197_3ed3690eac0c839c6216fd7f7ce0add6a1f593b2.txt 2014-04-28 00:36:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.patch --- linux-3.10.11/debian/patches/rpi/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.patch 2014-04-28 00:36:52.000000000 +0000 @@ -0,0 +1,180 @@ +commit 09642082b35034719f6916ee83b0a6251620ba74 +Author: Khalid Aziz +Date: Wed Sep 11 14:22:20 2013 -0700 + + mm: fix aio performance regression for database caused by THP + + commit 7cb2ef56e6a8b7b368b2e883a0a47d02fed66911 upstream. + + I am working with a tool that simulates oracle database I/O workload. + This tool (orion to be specific - + ) + allocates hugetlbfs pages using shmget() with SHM_HUGETLB flag. It then + does aio into these pages from flash disks using various common block + sizes used by database. I am looking at performance with two of the most + common block sizes - 1M and 64K. aio performance with these two block + sizes plunged after Transparent HugePages was introduced in the kernel. + Here are performance numbers: + + pre-THP 2.6.39 3.11-rc5 + 1M read 8384 MB/s 5629 MB/s 6501 MB/s + 64K read 7867 MB/s 4576 MB/s 4251 MB/s + + I have narrowed the performance impact down to the overheads introduced by + THP in __get_page_tail() and put_compound_page() routines. perf top shows + >40% of cycles being spent in these two routines. Every time direct I/O + to hugetlbfs pages starts, kernel calls get_page() to grab a reference to + the pages and calls put_page() when I/O completes to put the reference + away. THP introduced significant amount of locking overhead to get_page() + and put_page() when dealing with compound pages because hugepages can be + split underneath get_page() and put_page(). It added this overhead + irrespective of whether it is dealing with hugetlbfs pages or transparent + hugepages. This resulted in 20%-45% drop in aio performance when using + hugetlbfs pages. + + Since hugetlbfs pages can not be split, there is no reason to go through + all the locking overhead for these pages from what I can see. I added + code to __get_page_tail() and put_compound_page() to bypass all the + locking code when working with hugetlbfs pages. This improved performance + significantly. Performance numbers with this patch: + + pre-THP 3.11-rc5 3.11-rc5 + Patch + 1M read 8384 MB/s 6501 MB/s 8371 MB/s + 64K read 7867 MB/s 4251 MB/s 6510 MB/s + + Performance with 64K read is still lower than what it was before THP, but + still a 53% improvement. It does mean there is more work to be done but I + will take a 53% improvement for now. + + Please take a look at the following patch and let me know if it looks + reasonable. + + [akpm@linux-foundation.org: tweak comments] + Signed-off-by: Khalid Aziz + Cc: Pravin B Shelar + Cc: Christoph Lameter + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Mel Gorman + Cc: Rik van Riel + Cc: Minchan Kim + Cc: Andi Kleen + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/swap.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/swap.c 2014-04-27 23:39:24.000000000 +0000 ++++ linux-3.10-3.10.11/mm/swap.c 2014-04-28 00:36:51.000000000 +0000 +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include "internal.h" + +@@ -78,6 +79,19 @@ + + static void put_compound_page(struct page *page) + { ++ /* ++ * hugetlbfs pages cannot be split from under us. If this is a ++ * hugetlbfs page, check refcount on head page and release the page if ++ * the refcount becomes zero. ++ */ ++ if (PageHuge(page)) { ++ page = compound_head(page); ++ if (put_page_testzero(page)) ++ __put_compound_page(page); ++ ++ return; ++ } ++ + if (unlikely(PageTail(page))) { + /* __split_huge_page_refcount can run under us */ + struct page *page_head = compound_trans_head(page); +@@ -181,38 +195,51 @@ + * proper PT lock that already serializes against + * split_huge_page(). + */ +- unsigned long flags; + bool got = false; +- struct page *page_head = compound_trans_head(page); ++ struct page *page_head; + +- if (likely(page != page_head && get_page_unless_zero(page_head))) { ++ /* ++ * If this is a hugetlbfs page it cannot be split under us. Simply ++ * increment refcount for the head page. ++ */ ++ if (PageHuge(page)) { ++ page_head = compound_head(page); ++ atomic_inc(&page_head->_count); ++ got = true; ++ } else { ++ unsigned long flags; ++ ++ page_head = compound_trans_head(page); ++ if (likely(page != page_head && ++ get_page_unless_zero(page_head))) { ++ ++ /* Ref to put_compound_page() comment. */ ++ if (PageSlab(page_head)) { ++ if (likely(PageTail(page))) { ++ __get_page_tail_foll(page, false); ++ return true; ++ } else { ++ put_page(page_head); ++ return false; ++ } ++ } + +- /* Ref to put_compound_page() comment. */ +- if (PageSlab(page_head)) { ++ /* ++ * page_head wasn't a dangling pointer but it ++ * may not be a head page anymore by the time ++ * we obtain the lock. That is ok as long as it ++ * can't be freed from under us. ++ */ ++ flags = compound_lock_irqsave(page_head); ++ /* here __split_huge_page_refcount won't run anymore */ + if (likely(PageTail(page))) { + __get_page_tail_foll(page, false); +- return true; +- } else { +- put_page(page_head); +- return false; ++ got = true; + } ++ compound_unlock_irqrestore(page_head, flags); ++ if (unlikely(!got)) ++ put_page(page_head); + } +- +- /* +- * page_head wasn't a dangling pointer but it +- * may not be a head page anymore by the time +- * we obtain the lock. That is ok as long as it +- * can't be freed from under us. +- */ +- flags = compound_lock_irqsave(page_head); +- /* here __split_huge_page_refcount won't run anymore */ +- if (likely(PageTail(page))) { +- __get_page_tail_foll(page, false); +- got = true; +- } +- compound_unlock_irqrestore(page_head, flags); +- if (unlikely(!got)) +- put_page(page_head); + } + return got; + } +Index: linux-3.10-3.10.11/dummy/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1198_09642082b35034719f6916ee83b0a6251620ba74.txt 2014-04-28 00:36:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.patch --- linux-3.10.11/debian/patches/rpi/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.patch 2014-04-28 00:36:53.000000000 +0000 @@ -0,0 +1,36 @@ +commit 71828ed93986ea0f89c0daf739e13aadb870a3ef +Author: Andi Kleen +Date: Wed Apr 24 17:03:02 2013 -0700 + + perf tools: Handle JITed code in shared memory + + commit 89365e6c9ad4c0e090e4c6a4b67a3ce319381d89 upstream. + + Need to check for /dev/zero. + + Most likely more strings are missing too. + + Signed-off-by: Andi Kleen + Link: http://lkml.kernel.org/r/1366848182-30449-1-git-send-email-andi@firstfloor.org + Signed-off-by: Arnaldo Carvalho de Melo + Cc: Vinson Lee + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/tools/perf/util/map.c +=================================================================== +--- linux-3.10-3.10.11.orig/tools/perf/util/map.c 2014-04-27 23:39:24.000000000 +0000 ++++ linux-3.10-3.10.11/tools/perf/util/map.c 2014-04-28 00:36:52.000000000 +0000 +@@ -21,6 +21,7 @@ + static inline int is_anon_memory(const char *filename) + { + return !strcmp(filename, "//anon") || ++ !strcmp(filename, "/dev/zero (deleted)") || + !strcmp(filename, "/anon_hugepage (deleted)"); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1199_71828ed93986ea0f89c0daf739e13aadb870a3ef.txt 2014-04-28 00:36:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.patch --- linux-3.10.11/debian/patches/rpi/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.patch 2014-04-28 00:36:54.000000000 +0000 @@ -0,0 +1,38 @@ +commit edc96e2c36766db781313a53ba130e52e74d3296 +Author: Bjorn Helgaas +Date: Wed May 29 16:29:55 2013 -0600 + + bio-integrity: Fix use of bs->bio_integrity_pool after free + + commit adbe6991efd36104ac9eaf751993d35eaa7f493a upstream. + + This fixes a copy and paste error introduced by 9f060e2231 + ("block: Convert integrity to bvec_alloc_bs()"). + + Found by Coverity (CID 1020654). + + Signed-off-by: Bjorn Helgaas + Acked-by: Kent Overstreet + Signed-off-by: Jens Axboe + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/bio-integrity.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/bio-integrity.c 2014-04-27 23:39:24.000000000 +0000 ++++ linux-3.10-3.10.11/fs/bio-integrity.c 2014-04-28 00:36:53.000000000 +0000 +@@ -734,7 +734,7 @@ + mempool_destroy(bs->bio_integrity_pool); + + if (bs->bvec_integrity_pool) +- mempool_destroy(bs->bio_integrity_pool); ++ mempool_destroy(bs->bvec_integrity_pool); + } + EXPORT_SYMBOL(bioset_integrity_free); + +Index: linux-3.10-3.10.11/dummy/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1200_edc96e2c36766db781313a53ba130e52e74d3296.txt 2014-04-28 00:36:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.patch 2014-04-28 00:36:54.000000000 +0000 @@ -0,0 +1,40 @@ +commit 85f58908c038a5e1f51fb9014f0b0954f66be1d4 +Author: Anatol Pomozov +Date: Sun Sep 22 12:43:47 2013 -0600 + + cfq: explicitly use 64bit divide operation for 64bit arguments + + commit f3cff25f05f2ac29b2ee355e611b0657482f6f1d upstream. + + 'samples' is 64bit operant, but do_div() second parameter is 32. + do_div silently truncates high 32 bits and calculated result + is invalid. + + In case if low 32bit of 'samples' are zeros then do_div() produces + kernel crash. + + Signed-off-by: Anatol Pomozov + Acked-by: Tejun Heo + Signed-off-by: Jens Axboe + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/block/cfq-iosched.c +=================================================================== +--- linux-3.10-3.10.11.orig/block/cfq-iosched.c 2014-04-27 23:39:23.000000000 +0000 ++++ linux-3.10-3.10.11/block/cfq-iosched.c 2014-04-28 00:36:54.000000000 +0000 +@@ -1803,7 +1803,7 @@ + + if (samples) { + v = blkg_stat_read(&cfqg->stats.avg_queue_size_sum); +- do_div(v, samples); ++ v = div64_u64(v, samples); + } + __blkg_prfill_u64(sf, pd, v); + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1201_85f58908c038a5e1f51fb9014f0b0954f66be1d4.txt 2014-04-28 00:36:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.patch --- linux-3.10.11/debian/patches/rpi/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.patch 2014-04-28 00:36:55.000000000 +0000 @@ -0,0 +1,111 @@ +commit d68b9c457e6298e941b8b574f921624c6c648218 +Author: J. Bruce Fields +Date: Wed Aug 21 10:32:52 2013 -0400 + + rpc: clean up decoding of gssproxy linux creds + + commit 778e512bb1d3315c6b55832248cd30c566c081d7 upstream. + + We can use the normal coding infrastructure here. + + Two minor behavior changes: + + - we're assuming no wasted space at the end of the linux cred. + That seems to match gss-proxy's behavior, and I can't see why + it would need to do differently in the future. + + - NGROUPS_MAX check added: note groups_alloc doesn't do this, + this is the caller's responsibility. + + Tested-by: Simo Sorce + Signed-off-by: J. Bruce Fields + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-27 23:39:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-28 00:36:55.000000000 +0000 +@@ -166,14 +166,14 @@ + return 0; + } + +-static int get_s32(void **p, void *max, s32 *res) ++static int get_s32(struct xdr_stream *xdr, s32 *res) + { +- void *base = *p; +- void *next = (void *)((char *)base + sizeof(s32)); +- if (unlikely(next > max || next < base)) ++ __be32 *p; ++ ++ p = xdr_inline_decode(xdr, 4); ++ if (!p) + return -EINVAL; +- memcpy(res, base, sizeof(s32)); +- *p = next; ++ memcpy(res, p, sizeof(s32)); + return 0; + } + +@@ -182,7 +182,6 @@ + { + u32 length; + __be32 *p; +- void *q, *end; + s32 tmp; + int N, i, err; + +@@ -192,33 +191,28 @@ + + length = be32_to_cpup(p); + +- /* FIXME: we do not want to use the scratch buffer for this one +- * may need to use functions that allows us to access an io vector +- * directly */ +- p = xdr_inline_decode(xdr, length); +- if (unlikely(p == NULL)) ++ if (length > (3 + NGROUPS_MAX) * sizeof(u32)) + return -ENOSPC; + +- q = p; +- end = q + length; +- + /* uid */ +- err = get_s32(&q, end, &tmp); ++ err = get_s32(xdr, &tmp); + if (err) + return err; + creds->cr_uid = make_kuid(&init_user_ns, tmp); + + /* gid */ +- err = get_s32(&q, end, &tmp); ++ err = get_s32(xdr, &tmp); + if (err) + return err; + creds->cr_gid = make_kgid(&init_user_ns, tmp); + + /* number of additional gid's */ +- err = get_s32(&q, end, &tmp); ++ err = get_s32(xdr, &tmp); + if (err) + return err; + N = tmp; ++ if ((3 + N) * sizeof(u32) != length) ++ return -EINVAL; + creds->cr_group_info = groups_alloc(N); + if (creds->cr_group_info == NULL) + return -ENOMEM; +@@ -226,7 +220,7 @@ + /* gid's */ + for (i = 0; i < N; i++) { + kgid_t kgid; +- err = get_s32(&q, end, &tmp); ++ err = get_s32(xdr, &tmp); + if (err) + goto out_free_groups; + err = -EINVAL; +Index: linux-3.10-3.10.11/dummy/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1202_d68b9c457e6298e941b8b574f921624c6c648218.txt 2014-04-28 00:36:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.patch 2014-04-28 00:36:56.000000000 +0000 @@ -0,0 +1,91 @@ +commit 577e9397bcfaa293bb8de0e619fe93f69bf992b9 +Author: J. Bruce Fields +Date: Fri Aug 23 11:17:53 2013 -0400 + + rpc: comment on linux_cred encoding, treat all as unsigned + + commit 6a36978e6931e6601be586eb313375335f2cfaa3 upstream. + + The encoding of linux creds is a bit confusing. + + Also: I think in practice it doesn't really matter whether we treat any + of these things as signed or unsigned, but unsigned seems more + straightforward: uid_t/gid_t are unsigned and it simplifies the ngroups + overflow check. + + Tested-by: Simo Sorce + Signed-off-by: J. Bruce Fields + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-28 00:36:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-28 00:36:55.000000000 +0000 +@@ -166,14 +166,15 @@ + return 0; + } + +-static int get_s32(struct xdr_stream *xdr, s32 *res) ++static int get_host_u32(struct xdr_stream *xdr, u32 *res) + { + __be32 *p; + + p = xdr_inline_decode(xdr, 4); + if (!p) + return -EINVAL; +- memcpy(res, p, sizeof(s32)); ++ /* Contents of linux creds are all host-endian: */ ++ memcpy(res, p, sizeof(u32)); + return 0; + } + +@@ -182,8 +183,9 @@ + { + u32 length; + __be32 *p; +- s32 tmp; +- int N, i, err; ++ u32 tmp; ++ u32 N; ++ int i, err; + + p = xdr_inline_decode(xdr, 4); + if (unlikely(p == NULL)) +@@ -195,19 +197,19 @@ + return -ENOSPC; + + /* uid */ +- err = get_s32(xdr, &tmp); ++ err = get_host_u32(xdr, &tmp); + if (err) + return err; + creds->cr_uid = make_kuid(&init_user_ns, tmp); + + /* gid */ +- err = get_s32(xdr, &tmp); ++ err = get_host_u32(xdr, &tmp); + if (err) + return err; + creds->cr_gid = make_kgid(&init_user_ns, tmp); + + /* number of additional gid's */ +- err = get_s32(xdr, &tmp); ++ err = get_host_u32(xdr, &tmp); + if (err) + return err; + N = tmp; +@@ -220,7 +222,7 @@ + /* gid's */ + for (i = 0; i < N; i++) { + kgid_t kgid; +- err = get_s32(xdr, &tmp); ++ err = get_host_u32(xdr, &tmp); + if (err) + goto out_free_groups; + err = -EINVAL; +Index: linux-3.10-3.10.11/dummy/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1203_577e9397bcfaa293bb8de0e619fe93f69bf992b9.txt 2014-04-28 00:36:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.patch --- linux-3.10.11/debian/patches/rpi/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.patch 2014-04-28 00:36:57.000000000 +0000 @@ -0,0 +1,112 @@ +commit fea655196e39b35ef0d6c5a6372edb53315031db +Author: J. Bruce Fields +Date: Tue Aug 20 18:13:27 2013 -0400 + + rpc: fix huge kmalloc's in gss-proxy + + commit 9dfd87da1aeb0fd364167ad199f40fe96a6a87be upstream. + + The reply to a gssproxy can include up to NGROUPS_MAX gid's, which will + take up more than a page. We therefore need to allocate an array of + pages to hold the reply instead of trying to allocate a single huge + buffer. + + Tested-by: Simo Sorce + Signed-off-by: J. Bruce Fields + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_upcall.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_upcall.c 2014-04-27 23:39:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_upcall.c 2014-04-28 00:36:56.000000000 +0000 +@@ -213,6 +213,30 @@ + return status; + } + ++static void gssp_free_receive_pages(struct gssx_arg_accept_sec_context *arg) ++{ ++ int i; ++ ++ for (i = 0; i < arg->npages && arg->pages[i]; i++) ++ __free_page(arg->pages[i]); ++} ++ ++static int gssp_alloc_receive_pages(struct gssx_arg_accept_sec_context *arg) ++{ ++ int i; ++ ++ arg->npages = DIV_ROUND_UP(NGROUPS_MAX * 4, PAGE_SIZE); ++ arg->pages = kzalloc(arg->npages * sizeof(struct page *), GFP_KERNEL); ++ ++ for (i=0; i < arg->npages; i++) { ++ arg->pages[i] = alloc_page(GFP_KERNEL); ++ if (arg->pages[i] == NULL) { ++ gssp_free_receive_pages(arg); ++ return -ENOMEM; ++ } ++ } ++ return 0; ++} + + /* + * Public functions +@@ -261,10 +285,16 @@ + arg.context_handle = &ctxh; + res.output_token->len = GSSX_max_output_token_sz; + ++ ret = gssp_alloc_receive_pages(&arg); ++ if (ret) ++ return ret; ++ + /* use nfs/ for targ_name ? */ + + ret = gssp_call(net, &msg); + ++ gssp_free_receive_pages(&arg); ++ + /* we need to fetch all data even in case of error so + * that we can free special strctures is they have been allocated */ + data->major_status = res.status.major_status; +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-28 00:36:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.c 2014-04-28 00:36:56.000000000 +0000 +@@ -780,6 +780,9 @@ + /* arg->options */ + err = dummy_enc_opt_array(xdr, &arg->options); + ++ xdr_inline_pages(&req->rq_rcv_buf, ++ PAGE_SIZE/2 /* pretty arbitrary */, ++ arg->pages, 0 /* page base */, arg->npages * PAGE_SIZE); + done: + if (err) + dprintk("RPC: gssx_enc_accept_sec_context: %d\n", err); +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_xdr.h 2014-04-27 23:39:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_xdr.h 2014-04-28 00:36:56.000000000 +0000 +@@ -147,6 +147,8 @@ + struct gssx_cb *input_cb; + u32 ret_deleg_cred; + struct gssx_option_array options; ++ struct page **pages; ++ unsigned int npages; + }; + + struct gssx_res_accept_sec_context { +@@ -240,7 +242,8 @@ + 2 * GSSX_max_princ_sz + \ + 8 + 8 + 4 + 4 + 4) + #define GSSX_max_output_token_sz 1024 +-#define GSSX_max_creds_sz (4 + 4 + 4 + NGROUPS_MAX * 4) ++/* grouplist not included; we allocate separate pages for that: */ ++#define GSSX_max_creds_sz (4 + 4 + 4 /* + NGROUPS_MAX*4 */) + #define GSSX_RES_accept_sec_context_sz (GSSX_default_status_sz + \ + GSSX_default_ctx_sz + \ + GSSX_max_output_token_sz + \ +Index: linux-3.10-3.10.11/dummy/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1204_fea655196e39b35ef0d6c5a6372edb53315031db.txt 2014-04-28 00:36:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.patch --- linux-3.10.11/debian/patches/rpi/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.patch 2014-04-28 00:36:58.000000000 +0000 @@ -0,0 +1,53 @@ +commit ab2b9429c40a4083d675e15d79dc34f363096235 +Author: J. Bruce Fields +Date: Fri Aug 23 17:26:28 2013 -0400 + + rpc: let xdr layer allocate gssproxy receieve pages + + commit d4a516560fc96a9d486a9939bcb567e3fdce8f49 upstream. + + In theory the linux cred in a gssproxy reply can include up to + NGROUPS_MAX data, 256K of data. In the common case we expect it to be + shorter. So do as the nfsv3 ACL code does and let the xdr code allocate + the pages as they come in, instead of allocating a lot of pages that + won't typically be used. + + Tested-by: Simo Sorce + Signed-off-by: J. Bruce Fields + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_upcall.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sunrpc/auth_gss/gss_rpc_upcall.c 2014-04-28 00:36:56.000000000 +0000 ++++ linux-3.10-3.10.11/net/sunrpc/auth_gss/gss_rpc_upcall.c 2014-04-28 00:36:57.000000000 +0000 +@@ -223,18 +223,14 @@ + + static int gssp_alloc_receive_pages(struct gssx_arg_accept_sec_context *arg) + { +- int i; +- + arg->npages = DIV_ROUND_UP(NGROUPS_MAX * 4, PAGE_SIZE); + arg->pages = kzalloc(arg->npages * sizeof(struct page *), GFP_KERNEL); +- +- for (i=0; i < arg->npages; i++) { +- arg->pages[i] = alloc_page(GFP_KERNEL); +- if (arg->pages[i] == NULL) { +- gssp_free_receive_pages(arg); +- return -ENOMEM; +- } +- } ++ /* ++ * XXX: actual pages are allocated by xdr layer in ++ * xdr_partial_copy_from_skb. ++ */ ++ if (!arg->pages) ++ return -ENOMEM; + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1205_ab2b9429c40a4083d675e15d79dc34f363096235.txt 2014-04-28 00:36:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.patch 2014-04-28 00:36:58.000000000 +0000 @@ -0,0 +1,76 @@ +commit 97d2a12a277626098d6a001db1166447f86998d4 +Author: Oliver Smith +Date: Mon Sep 16 20:30:57 2013 +0200 + + netfilter: ipset: Fix serious failure in CIDR tracking + + commit 2cf55125c64d64cc106e204d53b107094762dfdf upstream. + + This fixes a serious bug affecting all hash types with a net element - + specifically, if a CIDR value is deleted such that none of the same size + exist any more, all larger (less-specific) values will then fail to + match. Adding back any prefix with a CIDR equal to or more specific than + the one deleted will fix it. + + Steps to reproduce: + ipset -N test hash:net + ipset -A test 1.1.0.0/16 + ipset -A test 2.2.2.0/24 + ipset -T test 1.1.1.1 #1.1.1.1 IS in set + ipset -D test 2.2.2.0/24 + ipset -T test 1.1.1.1 #1.1.1.1 IS NOT in set + + This is due to the fact that the nets counter was unconditionally + decremented prior to the iteration that shifts up the entries. Now, we + first check if there is a proceeding entry and if not, decrement it and + return. Otherwise, we proceed to iterate and then zero the last element, + which, in most cases, will already be zero. + + Signed-off-by: Oliver Smith + Signed-off-by: Jozsef Kadlecsik + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/netfilter/ipset/ip_set_hash_gen.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/netfilter/ipset/ip_set_hash_gen.h 2014-04-27 23:39:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/netfilter/ipset/ip_set_hash_gen.h 2014-04-28 00:36:58.000000000 +0000 +@@ -325,18 +325,22 @@ + static void + mtype_del_cidr(struct htype *h, u8 cidr, u8 nets_length) + { +- u8 i, j; ++ u8 i, j, net_end = nets_length - 1; + +- for (i = 0; i < nets_length - 1 && h->nets[i].cidr != cidr; i++) +- ; +- h->nets[i].nets--; +- +- if (h->nets[i].nets != 0) +- return; +- +- for (j = i; j < nets_length - 1 && h->nets[j].nets; j++) { +- h->nets[j].cidr = h->nets[j + 1].cidr; +- h->nets[j].nets = h->nets[j + 1].nets; ++ for (i = 0; i < nets_length; i++) { ++ if (h->nets[i].cidr != cidr) ++ continue; ++ if (h->nets[i].nets > 1 || i == net_end || ++ h->nets[i + 1].nets == 0) { ++ h->nets[i].nets--; ++ return; ++ } ++ for (j = i; j < net_end && h->nets[j].nets; j++) { ++ h->nets[j].cidr = h->nets[j + 1].cidr; ++ h->nets[j].nets = h->nets[j + 1].nets; ++ } ++ h->nets[j].nets = 0; ++ return; + } + } + #endif +Index: linux-3.10-3.10.11/dummy/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1206_97d2a12a277626098d6a001db1166447f86998d4.txt 2014-04-28 00:36:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.patch 2014-04-28 00:36:59.000000000 +0000 @@ -0,0 +1,24 @@ +commit 8c15abc94c737f9120d3d4a550abbcbb9be121f6 +Author: Greg Kroah-Hartman +Date: Tue Oct 1 09:18:05 2013 -0700 + + Linux 3.10.14 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:36:16.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:36:59.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 13 ++SUBLEVEL = 14 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1207_8c15abc94c737f9120d3d4a550abbcbb9be121f6.txt 2014-04-28 00:36:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.patch --- linux-3.10.11/debian/patches/rpi/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.patch 2014-04-28 00:37:00.000000000 +0000 @@ -0,0 +1,37 @@ +commit 9204e9dd40ce207074419e60f66922ce47bb1b79 +Author: Kent Overstreet +Date: Mon Sep 23 23:17:26 2013 -0700 + + block: Fix bio_copy_data() + + commit 2f6cf0de0281d210061ce976f2d42d246adc75bb upstream. + + The memcpy() in bio_copy_data() was using the wrong offset vars, leading + to data corruption in weird unusual setups. + + Signed-off-by: Kent Overstreet + Cc: Jens Axboe + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/bio.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/bio.c 2014-04-27 23:39:21.000000000 +0000 ++++ linux-3.10-3.10.11/fs/bio.c 2014-04-28 00:36:59.000000000 +0000 +@@ -917,8 +917,8 @@ + src_p = kmap_atomic(src_bv->bv_page); + dst_p = kmap_atomic(dst_bv->bv_page); + +- memcpy(dst_p + dst_bv->bv_offset, +- src_p + src_bv->bv_offset, ++ memcpy(dst_p + dst_offset, ++ src_p + src_offset, + bytes); + + kunmap_atomic(dst_p); +Index: linux-3.10-3.10.11/dummy/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1208_9204e9dd40ce207074419e60f66922ce47bb1b79.txt 2014-04-28 00:36:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.patch --- linux-3.10.11/debian/patches/rpi/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.patch 2014-04-28 00:37:01.000000000 +0000 @@ -0,0 +1,35 @@ +commit d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432 +Author: Lubomir Rintel +Date: Wed Sep 18 12:39:16 2013 +0200 + + sysv: Add forgotten superblock lock init for v7 fs + + commit 49475555848d396a0c78fb2f8ecceb3f3f263ef1 upstream. + + Superblock lock was replaced with (un)lock_super() removal, but left + uninitialized for Seventh Edition UNIX filesystem in the following commit (3.7): + c07cb01 sysv: drop lock/unlock super + + Signed-off-by: Lubomir Rintel + Signed-off-by: Christoph Hellwig + Signed-off-by: Al Viro + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/sysv/super.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/sysv/super.c 2014-04-27 23:39:21.000000000 +0000 ++++ linux-3.10-3.10.11/fs/sysv/super.c 2014-04-28 00:37:00.000000000 +0000 +@@ -487,6 +487,7 @@ + sbi->s_sb = sb; + sbi->s_block_base = 0; + sbi->s_type = FSTYPE_V7; ++ mutex_init(&sbi->s_lock); + sb->s_fs_info = sbi; + + sb_set_blocksize(sb, 512); +Index: linux-3.10-3.10.11/dummy/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1209_d8a1cf0bdbf668951b3ad4dfea4cde19c3fbe432.txt 2014-04-28 00:37:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.patch 2014-04-28 00:37:02.000000000 +0000 @@ -0,0 +1,34 @@ +commit 0a22f485eee6ae8da77c3e37c8856e025678cdb0 +Author: Kent Overstreet +Date: Mon Sep 23 23:17:27 2013 -0700 + + bcache: Fix a dumb journal discard bug + + commit 6d9d21e35fbfa2934339e96934f862d118abac23 upstream. + + That switch statement was obviously wrong, leading to some sort of weird + spinning on rare occasion with discards enabled... + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/journal.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/journal.c 2014-04-27 23:39:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/journal.c 2014-04-28 00:37:01.000000000 +0000 +@@ -425,7 +425,7 @@ + return; + } + +- switch (atomic_read(&ja->discard_in_flight) == DISCARD_IN_FLIGHT) { ++ switch (atomic_read(&ja->discard_in_flight)) { + case DISCARD_IN_FLIGHT: + return; + +Index: linux-3.10-3.10.11/dummy/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1210_0a22f485eee6ae8da77c3e37c8856e025678cdb0.txt 2014-04-28 00:37:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.patch 2014-04-28 00:37:03.000000000 +0000 @@ -0,0 +1,43 @@ +commit bb343115253500dcee63ea78d765e4c2f2a57fc4 +Author: Gabriel de Perthuis +Date: Mon Sep 23 23:17:28 2013 -0700 + + bcache: Strip endline when writing the label through sysfs + + commit aee6f1cfff3ce240eb4b43b41ca466b907acbd2e upstream. + + sysfs attributes with unusual characters have crappy failure modes + in Squeeze (udev 164); later versions of udev are unaffected. + + This should make these characters more unusual. + + Signed-off-by: Gabriel de Perthuis + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/sysfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/sysfs.c 2014-04-27 23:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/sysfs.c 2014-04-28 00:37:02.000000000 +0000 +@@ -214,7 +214,13 @@ + } + + if (attr == &sysfs_label) { +- memcpy(dc->sb.label, buf, SB_LABEL_SIZE); ++ if (size > SB_LABEL_SIZE) ++ return -EINVAL; ++ memcpy(dc->sb.label, buf, size); ++ if (size < SB_LABEL_SIZE) ++ dc->sb.label[size] = '\0'; ++ if (size && dc->sb.label[size - 1] == '\n') ++ dc->sb.label[size - 1] = '\0'; + bch_write_bdev_super(dc, NULL); + if (dc->disk.c) { + memcpy(dc->disk.c->uuids[dc->disk.id].label, +Index: linux-3.10-3.10.11/dummy/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1211_bb343115253500dcee63ea78d765e4c2f2a57fc4.txt 2014-04-28 00:37:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.patch 2014-04-28 00:37:03.000000000 +0000 @@ -0,0 +1,91 @@ +commit 808eea9d2912e4a3fb8cd45e3e3da94d114757fb +Author: Kent Overstreet +Date: Mon Sep 23 23:17:29 2013 -0700 + + bcache: Fix for when no journal entries are found + + commit c426c4fd46f709ade2bddd51c5738729c7ae1db5 upstream. + + The journal replay code didn't handle this case, causing it to go into + an infinite loop... + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/journal.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/journal.c 2014-04-28 00:37:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/journal.c 2014-04-28 00:37:03.000000000 +0000 +@@ -151,7 +151,8 @@ + bitmap_zero(bitmap, SB_JOURNAL_BUCKETS); + pr_debug("%u journal buckets", ca->sb.njournal_buckets); + +- /* Read journal buckets ordered by golden ratio hash to quickly ++ /* ++ * Read journal buckets ordered by golden ratio hash to quickly + * find a sequence of buckets with valid journal entries + */ + for (i = 0; i < ca->sb.njournal_buckets; i++) { +@@ -164,18 +165,20 @@ + goto bsearch; + } + +- /* If that fails, check all the buckets we haven't checked ++ /* ++ * If that fails, check all the buckets we haven't checked + * already + */ + pr_debug("falling back to linear search"); + +- for (l = 0; l < ca->sb.njournal_buckets; l++) { +- if (test_bit(l, bitmap)) +- continue; +- ++ for (l = find_first_zero_bit(bitmap, ca->sb.njournal_buckets); ++ l < ca->sb.njournal_buckets; ++ l = find_next_zero_bit(bitmap, ca->sb.njournal_buckets, l + 1)) + if (read_bucket(l)) + goto bsearch; +- } ++ ++ if (list_empty(list)) ++ continue; + bsearch: + /* Binary search */ + m = r = find_next_bit(bitmap, ca->sb.njournal_buckets, l + 1); +@@ -195,10 +198,12 @@ + r = m; + } + +- /* Read buckets in reverse order until we stop finding more ++ /* ++ * Read buckets in reverse order until we stop finding more + * journal entries + */ +- pr_debug("finishing up"); ++ pr_debug("finishing up: m %u njournal_buckets %u", ++ m, ca->sb.njournal_buckets); + l = m; + + while (1) { +@@ -226,9 +231,10 @@ + } + } + +- c->journal.seq = list_entry(list->prev, +- struct journal_replay, +- list)->j.seq; ++ if (!list_empty(list)) ++ c->journal.seq = list_entry(list->prev, ++ struct journal_replay, ++ list)->j.seq; + + return 0; + #undef read_bucket +Index: linux-3.10-3.10.11/dummy/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1212_808eea9d2912e4a3fb8cd45e3e3da94d114757fb.txt 2014-04-28 00:37:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.patch 2014-04-28 00:37:05.000000000 +0000 @@ -0,0 +1,228 @@ +commit 48c4100e10b75152098675d534d8a6109b28f1bf +Author: Kent Overstreet +Date: Mon Sep 23 23:17:31 2013 -0700 + + bcache: Fix a writeback performance regression + + commit c2a4f3183a1248f615a695fbd8905da55ad11bba upstream. + + Background writeback works by scanning the btree for dirty data and + adding those keys into a fixed size buffer, then for each dirty key in + the keybuf writing it to the backing device. + + When read_dirty() finishes and it's time to scan for more dirty data, we + need to wait for the outstanding writeback IO to finish - they still + take up slots in the keybuf (so that foreground writes can check for + them to avoid races) - without that wait, we'll continually rescan when + we'll be able to add at most a key or two to the keybuf, and that takes + locks that starves foreground IO. Doh. + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/bcache.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/bcache.h 2014-04-27 23:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/bcache.h 2014-04-28 00:37:04.000000000 +0000 +@@ -499,7 +499,7 @@ + */ + atomic_t has_dirty; + +- struct ratelimit writeback_rate; ++ struct bch_ratelimit writeback_rate; + struct delayed_work writeback_rate_update; + + /* +@@ -508,10 +508,9 @@ + */ + sector_t last_read; + +- /* Number of writeback bios in flight */ +- atomic_t in_flight; ++ /* Limit number of writeback bios in flight */ ++ struct semaphore in_flight; + struct closure_with_timer writeback; +- struct closure_waitlist writeback_wait; + + struct keybuf writeback_keys; + +Index: linux-3.10-3.10.11/drivers/md/bcache/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/util.c 2014-04-27 23:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/util.c 2014-04-28 00:37:04.000000000 +0000 +@@ -190,7 +190,16 @@ + stats->last = now ?: 1; + } + +-unsigned bch_next_delay(struct ratelimit *d, uint64_t done) ++/** ++ * bch_next_delay() - increment @d by the amount of work done, and return how ++ * long to delay until the next time to do some work. ++ * ++ * @d - the struct bch_ratelimit to update ++ * @done - the amount of work done, in arbitrary units ++ * ++ * Returns the amount of time to delay by, in jiffies ++ */ ++uint64_t bch_next_delay(struct bch_ratelimit *d, uint64_t done) + { + uint64_t now = local_clock(); + +Index: linux-3.10-3.10.11/drivers/md/bcache/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/util.h 2014-04-27 23:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/util.h 2014-04-28 00:37:04.000000000 +0000 +@@ -452,17 +452,23 @@ + (ewma) >> factor; \ + }) + +-struct ratelimit { ++struct bch_ratelimit { ++ /* Next time we want to do some work, in nanoseconds */ + uint64_t next; ++ ++ /* ++ * Rate at which we want to do work, in units per nanosecond ++ * The units here correspond to the units passed to bch_next_delay() ++ */ + unsigned rate; + }; + +-static inline void ratelimit_reset(struct ratelimit *d) ++static inline void bch_ratelimit_reset(struct bch_ratelimit *d) + { + d->next = local_clock(); + } + +-unsigned bch_next_delay(struct ratelimit *d, uint64_t done); ++uint64_t bch_next_delay(struct bch_ratelimit *d, uint64_t done); + + #define __DIV_SAFE(n, d, zero) \ + ({ \ +Index: linux-3.10-3.10.11/drivers/md/bcache/writeback.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/writeback.c 2014-04-27 23:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/writeback.c 2014-04-28 00:37:04.000000000 +0000 +@@ -91,11 +91,15 @@ + + static unsigned writeback_delay(struct cached_dev *dc, unsigned sectors) + { ++ uint64_t ret; ++ + if (atomic_read(&dc->disk.detaching) || + !dc->writeback_percent) + return 0; + +- return bch_next_delay(&dc->writeback_rate, sectors * 10000000ULL); ++ ret = bch_next_delay(&dc->writeback_rate, sectors * 10000000ULL); ++ ++ return min_t(uint64_t, ret, HZ); + } + + /* Background writeback */ +@@ -165,7 +169,7 @@ + + up_write(&dc->writeback_lock); + +- ratelimit_reset(&dc->writeback_rate); ++ bch_ratelimit_reset(&dc->writeback_rate); + + /* Punt to workqueue only so we don't recurse and blow the stack */ + continue_at(cl, read_dirty, dirty_wq); +@@ -246,9 +250,7 @@ + } + + bch_keybuf_del(&dc->writeback_keys, w); +- atomic_dec_bug(&dc->in_flight); +- +- closure_wake_up(&dc->writeback_wait); ++ up(&dc->in_flight); + + closure_return_with_destructor(cl, dirty_io_destructor); + } +@@ -278,7 +280,7 @@ + trace_bcache_write_dirty(&io->bio); + closure_bio_submit(&io->bio, cl, &io->dc->disk); + +- continue_at(cl, write_dirty_finish, dirty_wq); ++ continue_at(cl, write_dirty_finish, system_wq); + } + + static void read_dirty_endio(struct bio *bio, int error) +@@ -299,7 +301,7 @@ + trace_bcache_read_dirty(&io->bio); + closure_bio_submit(&io->bio, cl, &io->dc->disk); + +- continue_at(cl, write_dirty, dirty_wq); ++ continue_at(cl, write_dirty, system_wq); + } + + static void read_dirty(struct closure *cl) +@@ -324,12 +326,9 @@ + + if (delay > 0 && + (KEY_START(&w->key) != dc->last_read || +- jiffies_to_msecs(delay) > 50)) { +- w->private = NULL; +- +- closure_delay(&dc->writeback, delay); +- continue_at(cl, read_dirty, dirty_wq); +- } ++ jiffies_to_msecs(delay) > 50)) ++ while (delay) ++ delay = schedule_timeout(delay); + + dc->last_read = KEY_OFFSET(&w->key); + +@@ -354,15 +353,10 @@ + + pr_debug("%s", pkey(&w->key)); + +- closure_call(&io->cl, read_dirty_submit, NULL, &dc->disk.cl); ++ down(&dc->in_flight); ++ closure_call(&io->cl, read_dirty_submit, NULL, cl); + + delay = writeback_delay(dc, KEY_SIZE(&w->key)); +- +- atomic_inc(&dc->in_flight); +- +- if (!closure_wait_event(&dc->writeback_wait, cl, +- atomic_read(&dc->in_flight) < 64)) +- continue_at(cl, read_dirty, dirty_wq); + } + + if (0) { +@@ -372,11 +366,16 @@ + bch_keybuf_del(&dc->writeback_keys, w); + } + +- refill_dirty(cl); ++ /* ++ * Wait for outstanding writeback IOs to finish (and keybuf slots to be ++ * freed) before refilling again ++ */ ++ continue_at(cl, refill_dirty, dirty_wq); + } + + void bch_cached_dev_writeback_init(struct cached_dev *dc) + { ++ sema_init(&dc->in_flight, 64); + closure_init_unlocked(&dc->writeback); + init_rwsem(&dc->writeback_lock); + +@@ -406,7 +405,7 @@ + + int __init bch_writeback_init(void) + { +- dirty_wq = create_singlethread_workqueue("bcache_writeback"); ++ dirty_wq = create_workqueue("bcache_writeback"); + if (!dirty_wq) + return -ENOMEM; + +Index: linux-3.10-3.10.11/dummy/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1213_48c4100e10b75152098675d534d8a6109b28f1bf.txt 2014-04-28 00:37:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.patch 2014-04-28 00:37:05.000000000 +0000 @@ -0,0 +1,35 @@ +commit 77dbabefd61a7db6dad630d59823dd610ac6692d +Author: Kent Overstreet +Date: Mon Sep 23 23:17:32 2013 -0700 + + bcache: Fix a flush/fua performance bug + + commit 1394d6761b6e9e15ee7c632a6d48791188727b40 upstream. + + bch_journal_meta() was missing the flush to make the journal write + actually go down (instead of waiting up to journal_delay_ms)... + + Whoops + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/journal.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/journal.c 2014-04-28 00:37:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/journal.c 2014-04-28 00:37:05.000000000 +0000 +@@ -692,6 +692,7 @@ + if (cl) + BUG_ON(!closure_wait(&w->wait, cl)); + ++ closure_flush(&c->journal.io); + __journal_try_write(c, true); + } + } +Index: linux-3.10-3.10.11/dummy/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1214_77dbabefd61a7db6dad630d59823dd610ac6692d.txt 2014-04-28 00:37:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.patch 2014-04-28 00:37:06.000000000 +0000 @@ -0,0 +1,34 @@ +commit ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e +Author: Kent Overstreet +Date: Mon Sep 23 23:17:33 2013 -0700 + + bcache: Fix a dumb CPU spinning bug in writeback + + commit 79e3dab90d9f826ceca67c7890e048ac9169de49 upstream. + + schedule_timeout() != schedule_timeout_uninterruptible() + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/writeback.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/writeback.c 2014-04-28 00:37:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/writeback.c 2014-04-28 00:37:05.000000000 +0000 +@@ -327,8 +327,7 @@ + if (delay > 0 && + (KEY_START(&w->key) != dc->last_read || + jiffies_to_msecs(delay) > 50)) +- while (delay) +- delay = schedule_timeout(delay); ++ delay = schedule_timeout_uninterruptible(delay); + + dc->last_read = KEY_OFFSET(&w->key); + +Index: linux-3.10-3.10.11/dummy/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1215_ff1a51b9bf5808f2d40b8e605ff7f7cdc7973b3e.txt 2014-04-28 00:37:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.patch 2014-04-28 00:37:07.000000000 +0000 @@ -0,0 +1,35 @@ +commit 7866bece346caecd88c53c6603e178ce4ebda87b +Author: Kent Overstreet +Date: Mon Sep 23 23:17:34 2013 -0700 + + bcache: Fix a shrinker deadlock + + commit a698e08c82dfb9771e0bac12c7337c706d729b6d upstream. + + GFP_NOIO means we could be getting called recursively - mca_alloc() -> + mca_data_alloc() - definitely can't use mutex_lock(bucket_lock) then. + Whoops. + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/btree.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/btree.c 2014-04-27 23:39:19.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/btree.c 2014-04-28 00:37:06.000000000 +0000 +@@ -633,7 +633,7 @@ + return mca_can_free(c) * c->btree_pages; + + /* Return -1 if we can't do anything right now */ +- if (sc->gfp_mask & __GFP_WAIT) ++ if (sc->gfp_mask & __GFP_IO) + mutex_lock(&c->bucket_lock); + else if (!mutex_trylock(&c->bucket_lock)) + return -1; +Index: linux-3.10-3.10.11/dummy/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1216_7866bece346caecd88c53c6603e178ce4ebda87b.txt 2014-04-28 00:37:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.patch --- linux-3.10.11/debian/patches/rpi/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.patch 2014-04-28 00:37:08.000000000 +0000 @@ -0,0 +1,86 @@ +commit df8b0d944cae63df86dba0edaa8fa8f5efaa7e03 +Author: Kent Overstreet +Date: Mon Sep 23 23:17:35 2013 -0700 + + bcache: Fix for handling overlapping extents when reading in a btree node + + commit 84786438ed17978d72eeced580ab757e4da8830b upstream. + + btree_sort_fixup() was overly clever, because it was trying to avoid + pulling a key off the btree iterator in more than one place. + + This led to a really obscure bug where we'd break early from the loop in + btree_sort_fixup() if the current key overlapped with keys in more than + one older set, and the next key it overlapped with was zero size. + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/bset.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/bset.c 2014-04-27 23:39:18.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/bset.c 2014-04-28 00:37:07.000000000 +0000 +@@ -918,28 +918,45 @@ + + /* Mergesort */ + ++static void sort_key_next(struct btree_iter *iter, ++ struct btree_iter_set *i) ++{ ++ i->k = bkey_next(i->k); ++ ++ if (i->k == i->end) ++ *i = iter->data[--iter->used]; ++} ++ + static void btree_sort_fixup(struct btree_iter *iter) + { + while (iter->used > 1) { + struct btree_iter_set *top = iter->data, *i = top + 1; +- struct bkey *k; + + if (iter->used > 2 && + btree_iter_cmp(i[0], i[1])) + i++; + +- for (k = i->k; +- k != i->end && bkey_cmp(top->k, &START_KEY(k)) > 0; +- k = bkey_next(k)) +- if (top->k > i->k) +- __bch_cut_front(top->k, k); +- else if (KEY_SIZE(k)) +- bch_cut_back(&START_KEY(k), top->k); +- +- if (top->k < i->k || k == i->k) ++ if (bkey_cmp(top->k, &START_KEY(i->k)) <= 0) + break; + +- heap_sift(iter, i - top, btree_iter_cmp); ++ if (!KEY_SIZE(i->k)) { ++ sort_key_next(iter, i); ++ heap_sift(iter, i - top, btree_iter_cmp); ++ continue; ++ } ++ ++ if (top->k > i->k) { ++ if (bkey_cmp(top->k, i->k) >= 0) ++ sort_key_next(iter, i); ++ else ++ bch_cut_front(top->k, i->k); ++ ++ heap_sift(iter, i - top, btree_iter_cmp); ++ } else { ++ /* can't happen because of comparison func */ ++ BUG_ON(!bkey_cmp(&START_KEY(top->k), &START_KEY(i->k))); ++ bch_cut_back(&START_KEY(i->k), top->k); ++ } + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1217_df8b0d944cae63df86dba0edaa8fa8f5efaa7e03.txt 2014-04-28 00:37:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.patch --- linux-3.10.11/debian/patches/rpi/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.patch 2014-04-28 00:37:08.000000000 +0000 @@ -0,0 +1,57 @@ +commit 30d0e7953b17462b8e42ad374ace70c76e31d410 +Author: Kent Overstreet +Date: Mon Sep 23 23:17:36 2013 -0700 + + bcache: Fix flushes in writeback mode + + commit c0f04d88e46d14de51f4baebb6efafb7d59e9f96 upstream. + + In writeback mode, when we get a cache flush we need to make sure we + issue a flush to the backing device. + + The code for sending down an extra flush was wrong - by cloning the bio + we were probably getting flags that didn't make sense for a bare flush, + and also the old code was firing for FUA bios, for which we don't need + to send a flush to the backing device. + + This was causing data corruption somehow - the mechanism was never + determined, but this patch fixes it for the users that were seeing it. + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/request.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/request.c 2014-04-27 23:39:18.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/request.c 2014-04-28 00:37:08.000000000 +0000 +@@ -1056,14 +1056,17 @@ + trace_bcache_writeback(s->orig_bio); + bch_writeback_add(dc, bio_sectors(bio)); + +- if (s->op.flush_journal) { ++ if (bio->bi_rw & REQ_FLUSH) { + /* Also need to send a flush to the backing device */ +- s->op.cache_bio = bio_clone_bioset(bio, GFP_NOIO, +- dc->disk.bio_split); ++ struct bio *flush = bio_alloc_bioset(0, GFP_NOIO, ++ dc->disk.bio_split); + +- bio->bi_size = 0; +- bio->bi_vcnt = 0; +- closure_bio_submit(bio, cl, s->d); ++ flush->bi_rw = WRITE_FLUSH; ++ flush->bi_bdev = bio->bi_bdev; ++ flush->bi_end_io = request_endio; ++ flush->bi_private = cl; ++ ++ closure_bio_submit(flush, cl, s->d); + } else { + s->op.cache_bio = bio; + } +Index: linux-3.10-3.10.11/dummy/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1218_30d0e7953b17462b8e42ad374ace70c76e31d410.txt 2014-04-28 00:37:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.patch 2014-04-28 00:37:09.000000000 +0000 @@ -0,0 +1,52 @@ +commit fdc43786ed80ac4d85fb82ed3e37a5143721b50b +Author: Masoud Sharbiani +Date: Fri Sep 20 15:59:07 2013 -0700 + + x86/reboot: Add quirk to make Dell C6100 use reboot=pci automatically + + commit 4f0acd31c31f03ba42494c8baf6c0465150e2621 upstream. + + Dell PowerEdge C6100 machines fail to completely reboot about 20% of the time. + + Signed-off-by: Masoud Sharbiani + Signed-off-by: Vinson Lee + Cc: Robin Holt + Cc: Russell King + Cc: Guan Xuetao + Link: http://lkml.kernel.org/r/1379717947-18042-1-git-send-email-vlee@freedesktop.org + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/kernel/reboot.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/reboot.c 2014-04-27 23:39:18.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/reboot.c 2014-04-28 00:37:09.000000000 +0000 +@@ -447,6 +447,22 @@ + DMI_MATCH(DMI_PRODUCT_NAME, "Precision M6600"), + }, + }, ++ { /* Handle problems with rebooting on the Dell PowerEdge C6100. */ ++ .callback = set_pci_reboot, ++ .ident = "Dell PowerEdge C6100", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), ++ }, ++ }, ++ { /* Some C6100 machines were shipped with vendor being 'Dell'. */ ++ .callback = set_pci_reboot, ++ .ident = "Dell PowerEdge C6100", ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell"), ++ DMI_MATCH(DMI_PRODUCT_NAME, "C6100"), ++ }, ++ }, + { } + }; + +Index: linux-3.10-3.10.11/dummy/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1219_fdc43786ed80ac4d85fb82ed3e37a5143721b50b.txt 2014-04-28 00:37:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.patch 2014-04-28 00:37:10.000000000 +0000 @@ -0,0 +1,58 @@ +commit 655325c7e4f62ece9bea61e5b24d8118d6e09ef1 +Author: Vinson Lee +Date: Wed Sep 18 16:16:40 2013 -0700 + + tools lib lk: Uninclude linux/magic.h in debugfs.c + + commit ce7eebe5c3deef8e19c177c24ee75843256e69ca upstream. + + The compilation only looks for linux/magic.h from the default include + paths, which does not include the source tree. This results in a build + error if linux/magic.h is not available or not installed. + + For example, this build error occurs on CentOS 5. + + $ make -C tools/lib/lk V=1 + [...] + gcc -o debugfs.o -c -ggdb3 -Wall -Wextra -std=gnu99 -Werror -O6 + -D_FORTIFY_SOURCE=2 -Wbad-function-cast -Wdeclaration-after-statement + -Wformat-security -Wformat-y2k -Winit-self -Wmissing-declarations + -Wmissing-prototypes -Wnested-externs -Wno-system-headers + -Wold-style-definition -Wpacked -Wredundant-decls -Wshadow + -Wstrict-aliasing=3 -Wstrict-prototypes -Wswitch-default -Wswitch-enum + -Wundef -Wwrite-strings -Wformat -fPIC -D_LARGEFILE64_SOURCE + -D_FILE_OFFSET_BITS=64 debugfs.c + debugfs.c:8:25: error: linux/magic.h: No such file or directory + + The only symbol from linux/magic.h needed by debugfs.c is DEBUGFS_MAGIC, + and that is already defined in debugfs.h. linux/magic.h isn't providing + any extra symbols and can unincluded. This is similar to the approach by + perf, which has its own magic.h wrapper at + tools/perf/util/include/linux/magic.h + + Signed-off-by: Vinson Lee + Acked-by: Borislav Petkov + Cc: Borislav Petkov + Cc: Vinson Lee + Link: http://lkml.kernel.org/r/1379546200-17028-1-git-send-email-vlee@freedesktop.org + Signed-off-by: Arnaldo Carvalho de Melo + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/tools/lib/lk/debugfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/tools/lib/lk/debugfs.c 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/tools/lib/lk/debugfs.c 2014-04-28 00:37:10.000000000 +0000 +@@ -5,7 +5,6 @@ + #include + #include + #include +-#include + #include + + #include "debugfs.h" +Index: linux-3.10-3.10.11/dummy/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1220_655325c7e4f62ece9bea61e5b24d8118d6e09ef1.txt 2014-04-28 00:37:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.patch 2014-04-28 00:37:11.000000000 +0000 @@ -0,0 +1,91 @@ +commit 81fbb94d1fbdad184ca4091da4cae87a92dbf3c7 +Author: Josh Boyer +Date: Thu Apr 18 07:51:34 2013 -0700 + + x86, efi: Don't map Boot Services on i386 + + commit 700870119f49084da004ab588ea2b799689efaf7 upstream. + + Add patch to fix 32bit EFI service mapping (rhbz 726701) + + Multiple people are reporting hitting the following WARNING on i386, + + WARNING: at arch/x86/mm/ioremap.c:102 __ioremap_caller+0x3d3/0x440() + Modules linked in: + Pid: 0, comm: swapper Not tainted 3.9.0-rc7+ #95 + Call Trace: + [] warn_slowpath_common+0x5f/0x80 + [] ? __ioremap_caller+0x3d3/0x440 + [] ? __ioremap_caller+0x3d3/0x440 + [] warn_slowpath_null+0x1d/0x20 + [] __ioremap_caller+0x3d3/0x440 + [] ? get_usage_chars+0xfb/0x110 + [] ? vprintk_emit+0x147/0x480 + [] ? efi_enter_virtual_mode+0x1e4/0x3de + [] ioremap_cache+0x1a/0x20 + [] ? efi_enter_virtual_mode+0x1e4/0x3de + [] efi_enter_virtual_mode+0x1e4/0x3de + [] start_kernel+0x286/0x2f4 + [] ? repair_env_string+0x51/0x51 + [] i386_start_kernel+0x12c/0x12f + + Due to the workaround described in commit 916f676f8 ("x86, efi: Retain + boot service code until after switching to virtual mode") EFI Boot + Service regions are mapped for a period during boot. Unfortunately, with + the limited size of the i386 direct kernel map it's possible that some + of the Boot Service regions will not be directly accessible, which + causes them to be ioremap()'d, triggering the above warning as the + regions are marked as E820_RAM in the e820 memmap. + + There are currently only two situations where we need to map EFI Boot + Service regions, + + 1. To workaround the firmware bug described in 916f676f8 + 2. To access the ACPI BGRT image + + but since we haven't seen an i386 implementation that requires either, + this simple fix should suffice for now. + + [ Added to changelog - Matt ] + + Reported-by: Bryan O'Donoghue + Acked-by: Tom Zanussi + Acked-by: Darren Hart + Cc: Josh Triplett + Cc: Matthew Garrett + Cc: H. Peter Anvin + Cc: Ingo Molnar + Cc: Thomas Gleixner + Cc: Greg Kroah-Hartman + Signed-off-by: Josh Boyer + Signed-off-by: Matt Fleming + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/platform/efi/efi.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/platform/efi/efi.c 2014-04-28 00:33:53.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/platform/efi/efi.c 2014-04-28 00:37:10.000000000 +0000 +@@ -925,10 +925,13 @@ + + for (p = memmap.map; p < memmap.map_end; p += memmap.desc_size) { + md = p; +- if (!(md->attribute & EFI_MEMORY_RUNTIME) && +- md->type != EFI_BOOT_SERVICES_CODE && +- md->type != EFI_BOOT_SERVICES_DATA) +- continue; ++ if (!(md->attribute & EFI_MEMORY_RUNTIME)) { ++#ifdef CONFIG_X86_64 ++ if (md->type != EFI_BOOT_SERVICES_CODE && ++ md->type != EFI_BOOT_SERVICES_DATA) ++#endif ++ continue; ++ } + + size = md->num_pages << EFI_PAGE_SHIFT; + end = md->phys_addr + size; +Index: linux-3.10-3.10.11/dummy/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1221_81fbb94d1fbdad184ca4091da4cae87a92dbf3c7.txt 2014-04-28 00:37:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.patch 2014-04-28 00:37:12.000000000 +0000 @@ -0,0 +1,80 @@ +commit cb4af713f95f049056c25e0c18f652c3338c2bc7 +Author: Tomas Winkler +Date: Mon Sep 2 13:29:45 2013 +0300 + + mei: make me client counters less error prone + + commit 1aee351a739153529fbb98ee461777b2abd5e1c9 upstream. + + 1. u8 counters are prone to hard to detect overflow: + make them unsigned long to match bit_ functions argument type + + 2. don't check me_clients_num for negativity, it is unsigned. + + 3. init all the me client counters from one place + + Signed-off-by: Tomas Winkler + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/misc/mei/hbm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/hbm.c 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/hbm.c 2014-04-28 00:37:11.000000000 +0000 +@@ -35,11 +35,15 @@ + struct mei_me_client *clients; + int b; + ++ dev->me_clients_num = 0; ++ dev->me_client_presentation_num = 0; ++ dev->me_client_index = 0; ++ + /* count how many ME clients we have */ + for_each_set_bit(b, dev->me_clients_map, MEI_CLIENTS_MAX) + dev->me_clients_num++; + +- if (dev->me_clients_num <= 0) ++ if (dev->me_clients_num == 0) + return; + + kfree(dev->me_clients); +@@ -221,7 +225,7 @@ + struct hbm_props_request *prop_req; + const size_t len = sizeof(struct hbm_props_request); + unsigned long next_client_index; +- u8 client_num; ++ unsigned long client_num; + + + client_num = dev->me_client_presentation_num; +@@ -650,8 +654,6 @@ + if (dev->dev_state == MEI_DEV_INIT_CLIENTS && + dev->hbm_state == MEI_HBM_ENUM_CLIENTS) { + dev->init_clients_timer = 0; +- dev->me_client_presentation_num = 0; +- dev->me_client_index = 0; + mei_hbm_me_cl_allocate(dev); + dev->hbm_state = MEI_HBM_CLIENT_PROPERTIES; + +Index: linux-3.10-3.10.11/drivers/misc/mei/mei_dev.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/mei_dev.h 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/mei_dev.h 2014-04-28 00:37:11.000000000 +0000 +@@ -402,9 +402,9 @@ + struct mei_me_client *me_clients; /* Note: memory has to be allocated */ + DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); + DECLARE_BITMAP(host_clients_map, MEI_CLIENTS_MAX); +- u8 me_clients_num; +- u8 me_client_presentation_num; +- u8 me_client_index; ++ unsigned long me_clients_num; ++ unsigned long me_client_presentation_num; ++ unsigned long me_client_index; + + struct mei_cl wd_cl; + enum mei_wd_states wd_state; +Index: linux-3.10-3.10.11/dummy/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1222_cb4af713f95f049056c25e0c18f652c3338c2bc7.txt 2014-04-28 00:37:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.patch 2014-04-28 00:37:13.000000000 +0000 @@ -0,0 +1,89 @@ +commit 18f48d9e784339c954eb1641fef600e00c7a53c0 +Author: Tomas Winkler +Date: Mon Sep 2 13:29:46 2013 +0300 + + mei: bus: stop wait for read during cl state transition + + commit e2b31644e999e8bfe3efce880fb32840299abf41 upstream. + + Bus layer omitted check for client state transition while waiting + for read completion + The client state transition may occur for example as result + of firmware initiated reset + + Add mei_cl_is_transitioning wrapper to reduce the code + repetition.: + + Signed-off-by: Tomas Winkler + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/misc/mei/bus.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/bus.c 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/bus.c 2014-04-28 00:37:12.000000000 +0000 +@@ -295,10 +295,13 @@ + + if (cl->reading_state != MEI_READ_COMPLETE && + !waitqueue_active(&cl->rx_wait)) { ++ + mutex_unlock(&dev->device_lock); + + if (wait_event_interruptible(cl->rx_wait, +- (MEI_READ_COMPLETE == cl->reading_state))) { ++ cl->reading_state == MEI_READ_COMPLETE || ++ mei_cl_is_transitioning(cl))) { ++ + if (signal_pending(current)) + return -EINTR; + return -ERESTARTSYS; +Index: linux-3.10-3.10.11/drivers/misc/mei/client.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/client.h 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/client.h 2014-04-28 00:37:12.000000000 +0000 +@@ -76,6 +76,12 @@ + (cl1->host_client_id == cl2->host_client_id) && + (cl1->me_client_id == cl2->me_client_id); + } ++static inline bool mei_cl_is_transitioning(struct mei_cl *cl) ++{ ++ return (MEI_FILE_INITIALIZING == cl->state || ++ MEI_FILE_DISCONNECTED == cl->state || ++ MEI_FILE_DISCONNECTING == cl->state); ++} + + + int mei_cl_flow_ctrl_creds(struct mei_cl *cl); +Index: linux-3.10-3.10.11/drivers/misc/mei/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/main.c 2014-04-27 23:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/main.c 2014-04-28 00:37:12.000000000 +0000 +@@ -262,19 +262,16 @@ + mutex_unlock(&dev->device_lock); + + if (wait_event_interruptible(cl->rx_wait, +- (MEI_READ_COMPLETE == cl->reading_state || +- MEI_FILE_INITIALIZING == cl->state || +- MEI_FILE_DISCONNECTED == cl->state || +- MEI_FILE_DISCONNECTING == cl->state))) { ++ MEI_READ_COMPLETE == cl->reading_state || ++ mei_cl_is_transitioning(cl))) { ++ + if (signal_pending(current)) + return -EINTR; + return -ERESTARTSYS; + } + + mutex_lock(&dev->device_lock); +- if (MEI_FILE_INITIALIZING == cl->state || +- MEI_FILE_DISCONNECTED == cl->state || +- MEI_FILE_DISCONNECTING == cl->state) { ++ if (mei_cl_is_transitioning(cl)) { + rets = -EBUSY; + goto out; + } +Index: linux-3.10-3.10.11/dummy/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1223_18f48d9e784339c954eb1641fef600e00c7a53c0.txt 2014-04-28 00:37:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.patch --- linux-3.10.11/debian/patches/rpi/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.patch 2014-04-28 00:37:14.000000000 +0000 @@ -0,0 +1,48 @@ +commit 51d4e0771c3c69bb021d3052433e49effa6e4f65 +Author: Alexander Usyskin +Date: Mon Sep 2 13:29:47 2013 +0300 + + mei: cancel stall timers in mei_reset + + commit 4a704575cc1afb3b848f096778fa9b8d7b3d5813 upstream. + + Unset init_clients_timer and amthif_stall_timers + in mei_reset in order to cancel timer ticking and hence + avoid recursive reset calls. + + Signed-off-by: Alexander Usyskin + Signed-off-by: Tomas Winkler + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/misc/mei/amthif.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/amthif.c 2014-04-27 23:39:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/amthif.c 2014-04-28 00:37:13.000000000 +0000 +@@ -57,6 +57,7 @@ + dev->iamthif_ioctl = false; + dev->iamthif_state = MEI_IAMTHIF_IDLE; + dev->iamthif_timer = 0; ++ dev->iamthif_stall_timer = 0; + } + + /** +Index: linux-3.10-3.10.11/drivers/misc/mei/init.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/mei/init.c 2014-04-27 23:39:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/mei/init.c 2014-04-28 00:37:13.000000000 +0000 +@@ -164,6 +164,9 @@ + memset(&dev->wr_ext_msg, 0, sizeof(dev->wr_ext_msg)); + } + ++ /* we're already in reset, cancel the init timer */ ++ dev->init_clients_timer = 0; ++ + dev->me_clients_num = 0; + dev->rd_msg_hdr = 0; + dev->wd_pending = false; +Index: linux-3.10-3.10.11/dummy/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1224_51d4e0771c3c69bb021d3052433e49effa6e4f65.txt 2014-04-28 00:37:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.patch 2014-04-28 00:37:15.000000000 +0000 @@ -0,0 +1,40 @@ +commit fe0da74501e9eb204dc1b8167708bd9273f4277f +Author: Peter Hurley +Date: Wed Sep 25 20:13:04 2013 -0400 + + tty: Fix SIGTTOU not sent with tcflush() + + commit 5cec7bf699c61d14f0538345076480bb8c8ebfbb upstream. + + Commit 'e7f3880cd9b98c5bf9391ae7acdec82b75403776' + tty: Fix recursive deadlock in tty_perform_flush() + introduced a regression where tcflush() does not generate + SIGTTOU for background process groups. + + Make sure ioctl(TCFLSH) calls tty_check_change() when + invoked from the line discipline. + + Reported-by: Oleg Nesterov + Signed-off-by: Peter Hurley + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/tty_ioctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/tty_ioctl.c 2014-04-27 23:39:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/tty_ioctl.c 2014-04-28 00:37:14.000000000 +0000 +@@ -1201,6 +1201,9 @@ + } + return 0; + case TCFLSH: ++ retval = tty_check_change(tty); ++ if (retval) ++ return retval; + return __tty_perform_flush(tty, arg); + default: + /* Try the mode commands */ +Index: linux-3.10-3.10.11/dummy/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1225_fe0da74501e9eb204dc1b8167708bd9273f4277f.txt 2014-04-28 00:37:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.patch --- linux-3.10.11/debian/patches/rpi/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.patch 2014-04-28 00:37:16.000000000 +0000 @@ -0,0 +1,42 @@ +commit 64dc8de491ef490e979fe65d83daaadf32c83633 +Author: Johan Hovold +Date: Tue Sep 10 12:50:48 2013 +0200 + + serial: tegra: fix tty-kref leak + + commit cfd29aa0e81b791985e8428e6507e80e074e6730 upstream. + + Fix potential tty-kref leak in stop_rx path. + + Signed-off-by: Johan Hovold + Tested-by: Stephen Warren + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/serial/serial-tegra.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/serial-tegra.c 2014-04-27 23:39:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/serial-tegra.c 2014-04-28 00:37:15.000000000 +0000 +@@ -726,7 +726,7 @@ + static void tegra_uart_stop_rx(struct uart_port *u) + { + struct tegra_uart_port *tup = to_tegra_uport(u); +- struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port); ++ struct tty_struct *tty; + struct tty_port *port = &u->state->port; + struct dma_tx_state state; + unsigned long ier; +@@ -738,6 +738,8 @@ + if (!tup->rx_in_progress) + return; + ++ tty = tty_port_tty_get(&tup->uport.state->port); ++ + tegra_uart_wait_sym_time(tup, 1); /* wait a character interval */ + + ier = tup->ier_shadow; +Index: linux-3.10-3.10.11/dummy/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1226_64dc8de491ef490e979fe65d83daaadf32c83633.txt 2014-04-28 00:37:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.patch 2014-04-28 00:37:16.000000000 +0000 @@ -0,0 +1,33 @@ +commit b0a382b5a35e306362cde912bff18a42cc00b0f5 +Author: Johan Hovold +Date: Tue Sep 10 12:50:49 2013 +0200 + + serial: pch_uart: fix tty-kref leak in rx-error path + + commit fc0919c68cb2f75bb1af759315f9d7e2a9443c28 upstream. + + Fix tty-kref leak introduced by commit 384e301e ("pch_uart: fix a + deadlock when pch_uart as console") which never put its tty reference. + + Signed-off-by: Johan Hovold + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/serial/pch_uart.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/pch_uart.c 2014-04-27 23:39:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/pch_uart.c 2014-04-28 00:37:16.000000000 +0000 +@@ -1071,6 +1071,8 @@ + if (tty == NULL) { + for (i = 0; error_msg[i] != NULL; i++) + dev_err(&priv->pdev->dev, error_msg[i]); ++ } else { ++ tty_kref_put(tty); + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1227_b0a382b5a35e306362cde912bff18a42cc00b0f5.txt 2014-04-28 00:37:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.patch 2014-04-28 00:37:17.000000000 +0000 @@ -0,0 +1,41 @@ +commit 20d7e144c93a9f06224fc983cb5b248bb5bc87fb +Author: Johan Hovold +Date: Tue Sep 10 12:50:50 2013 +0200 + + serial: pch_uart: fix tty-kref leak in dma-rx path + + commit 19b85cfb190eb9980eaf416bff96aef4159a430e upstream. + + Fix tty_kref leak when tty_buffer_request room fails in dma-rx path. + + Note that the tty ref isn't really needed anymore, but as the leak has + always been there, fixing it before removing should makes it easier to + backport the fix. + + Signed-off-by: Johan Hovold + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/serial/pch_uart.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/pch_uart.c 2014-04-28 00:37:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/pch_uart.c 2014-04-28 00:37:17.000000000 +0000 +@@ -658,11 +658,12 @@ + dev_warn(port->dev, "Rx overrun: dropping %u bytes\n", + size - room); + if (!room) +- return room; ++ goto out; + + tty_insert_flip_string(tport, sg_virt(&priv->sg_rx), size); + + port->icount.rx += room; ++out: + tty_kref_put(tty); + + return room; +Index: linux-3.10-3.10.11/dummy/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1228_20d7e144c93a9f06224fc983cb5b248bb5bc87fb.txt 2014-04-28 00:37:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.patch 2014-04-28 00:37:18.000000000 +0000 @@ -0,0 +1,56 @@ +commit ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f +Author: Ard Biesheuvel +Date: Sat Sep 21 11:23:50 2013 +0100 + + ARM: 7837/3: fix Thumb-2 bug in AES assembler code + + commit 40190c85f427dcfdbab5dbef4ffd2510d649da1f upstream. + + Patch 638591c enabled building the AES assembler code in Thumb2 mode. + However, this code used arithmetic involving PC rather than adr{l} + instructions to generate PC-relative references to the lookup tables, + and this needs to take into account the different PC offset when + running in Thumb mode. + + Signed-off-by: Ard Biesheuvel + Acked-by: Nicolas Pitre + Signed-off-by: Russell King + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/crypto/aes-armv4.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/crypto/aes-armv4.S 2014-04-27 23:39:15.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/crypto/aes-armv4.S 2014-04-28 00:37:17.000000000 +0000 +@@ -148,7 +148,7 @@ + @ const AES_KEY *key) { + .align 5 + ENTRY(AES_encrypt) +- sub r3,pc,#8 @ AES_encrypt ++ adr r3,AES_encrypt + stmdb sp!,{r1,r4-r12,lr} + mov r12,r0 @ inp + mov r11,r2 +@@ -381,7 +381,7 @@ + .align 5 + ENTRY(private_AES_set_encrypt_key) + _armv4_AES_set_encrypt_key: +- sub r3,pc,#8 @ AES_set_encrypt_key ++ adr r3,_armv4_AES_set_encrypt_key + teq r0,#0 + moveq r0,#-1 + beq .Labrt +@@ -843,7 +843,7 @@ + @ const AES_KEY *key) { + .align 5 + ENTRY(AES_decrypt) +- sub r3,pc,#8 @ AES_decrypt ++ adr r3,AES_decrypt + stmdb sp!,{r1,r4-r12,lr} + mov r12,r0 @ inp + mov r11,r2 +Index: linux-3.10-3.10.11/dummy/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1229_ace53ef6a91d0afcb4f45fa06d162fe45c7c3b2f.txt 2014-04-28 00:37:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.patch 2014-04-28 00:37:19.000000000 +0000 @@ -0,0 +1,48 @@ +commit d66aed99301eb9dd6a6e71f73081057480369ab4 +Author: Malcolm Priestley +Date: Sun Sep 22 19:48:54 2013 +0100 + + staging: vt6656: [BUG] main_usb.c oops on device_close move flag earlier. + + commit e3eb270fab7734427dd8171a93e4946fe28674bc upstream. + + The vt6656 is prone to resetting on the usb bus. + + It seems there is a race condition and wpa supplicant is + trying to open the device via iw_handlers before its actually + closed at a stage that the buffers are being removed. + + The device is longer considered open when the + buffers are being removed. So move ~DEVICE_FLAGS_OPENED + flag to before freeing the device buffers. + + Signed-off-by: Malcolm Priestley + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/vt6656/main_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/vt6656/main_usb.c 2014-04-27 23:39:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/vt6656/main_usb.c 2014-04-28 00:37:18.000000000 +0000 +@@ -1099,6 +1099,8 @@ + memset(pMgmt->abyCurrBSSID, 0, 6); + pMgmt->eCurrState = WMAC_STATE_IDLE; + ++ pDevice->flags &= ~DEVICE_FLAGS_OPENED; ++ + device_free_tx_bufs(pDevice); + device_free_rx_bufs(pDevice); + device_free_int_bufs(pDevice); +@@ -1110,7 +1112,6 @@ + usb_free_urb(pDevice->pInterruptURB); + + BSSvClearNodeDBTable(pDevice, 0); +- pDevice->flags &=(~DEVICE_FLAGS_OPENED); + + DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_close2 \n"); + +Index: linux-3.10-3.10.11/dummy/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1230_d66aed99301eb9dd6a6e71f73081057480369ab4.txt 2014-04-28 00:37:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.patch --- linux-3.10.11/debian/patches/rpi/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.patch 2014-04-28 00:37:20.000000000 +0000 @@ -0,0 +1,36 @@ +commit 54cff964637d840e7860afa49a369c84c8cfbf61 +Author: Malcolm Priestley +Date: Mon Sep 23 20:30:42 2013 +0100 + + staging: vt6656: [BUG] iwctl_siwencodeext return if device not open + + commit 5e8c3d3e41b0bf241e830a1ee0752405adecc050 upstream. + + Don't allow entry to iwctl_siwencodeext if device not open. + + This fixes a race condition where wpa supplicant/network manager + enters the function when the device is already closed. + + Signed-off-by: Malcolm Priestley + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/vt6656/iwctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/vt6656/iwctl.c 2014-04-27 23:39:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/vt6656/iwctl.c 2014-04-28 00:37:19.000000000 +0000 +@@ -1634,6 +1634,9 @@ + if (pMgmt == NULL) + return -EFAULT; + ++ if (!(pDevice->flags & DEVICE_FLAGS_OPENED)) ++ return -ENODEV; ++ + buf = kzalloc(sizeof(struct viawget_wpa_param), GFP_KERNEL); + if (buf == NULL) + return -ENOMEM; +Index: linux-3.10-3.10.11/dummy/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1231_54cff964637d840e7860afa49a369c84c8cfbf61.txt 2014-04-28 00:37:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.patch --- linux-3.10.11/debian/patches/rpi/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.patch 2014-04-28 00:37:21.000000000 +0000 @@ -0,0 +1,66 @@ +commit 4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba +Author: Daniel Vetter +Date: Tue Sep 10 11:44:30 2013 +0200 + + drm/i915/tv: clear adjusted_mode.flags + + commit 1062b81598bc00e2f6620e6f3788f8f8df2f01e7 upstream. + + The native TV encoder has it's own flags to adjust sync modes and + enabled interlaced modes which are totally irrelevant for the adjusted + mode. This worked out nicely since the input modes used by both the + load detect code and reported in the ->get_modes callbacks all have no + flags set, and we also don't fill out any of them in the ->get_config + callback. + + This changed with the additional sanitation done with + + commit 2960bc9cceecb5d556ce1c07656a6609e2f7e8b0 + Author: Imre Deak + Date: Tue Jul 30 13:36:32 2013 +0300 + + drm/i915: make user mode sync polarity setting explicit + + sinc now the "no flags at all" state wouldn't fit through core code + any more. So fix this up again by explicitly clearing the flags in the + ->compute_config callback. + + Aside: We have zero checking in place to make sure that the requested + mode is indeed the right input mode we want for the selected TV mode. + So we'll happily fall over if userspace tries to pull us. But that's + definitely work for a different patch series. So just add a FIXME + comment for now. + + Reported-by: Knut Petersen + Cc: Knut Petersen + Cc: Imre Deak + Cc: Chris Wilson + Tested-by: Knut Petersen + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_tv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/intel_tv.c 2014-04-27 23:39:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_tv.c 2014-04-28 00:37:20.000000000 +0000 +@@ -921,6 +921,14 @@ + DRM_DEBUG_KMS("forcing bpc to 8 for TV\n"); + pipe_config->pipe_bpp = 8*3; + ++ /* TV has it's own notion of sync and other mode flags, so clear them. */ ++ pipe_config->adjusted_mode.flags = 0; ++ ++ /* ++ * FIXME: We don't check whether the input mode is actually what we want ++ * or whether userspace is doing something stupid. ++ */ ++ + return true; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1232_4bc8e1356cf9c7c2dbff522671a5d6d33d49c2ba.txt 2014-04-28 00:37:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.patch 2014-04-28 00:37:22.000000000 +0000 @@ -0,0 +1,150 @@ +commit 57ad776884c52610af5e00d53e9755f2a8d50bbd +Author: Mathias Nyman +Date: Fri Aug 30 18:25:49 2013 +0300 + + xhci: Ensure a command structure points to the correct trb on the command ring + + commit ec7e43e2d98173483866fe2e4e690143626b659c upstream. + + If a command on the command ring needs to be cancelled before it is handled + it can be turned to a no-op operation when the ring is stopped. + We want to store the command ring enqueue pointer in the command structure + when the command in enqueued for the cancellation case. + + Some commands used to store the command ring dequeue pointers instead of enqueue + (these often worked because enqueue happends to equal dequeue quite often) + + Other commands correctly used the enqueue pointer but did not check if it pointed + to a valid trb or a link trb, this caused for example stop endpoint command to timeout in + xhci_stop_device() in about 2% of suspend/resume cases. + + This should also solve some weird behavior happening in command cancellation cases. + + This patch is based on a patch submitted by Sarah Sharp to linux-usb, but + then forgotten: + http://marc.info/?l=linux-usb&m=136269803207465&w=2 + + This patch should be backported to kernels as old as 3.7, that contain + the commit b92cc66c047ff7cf587b318fe377061a353c120f "xHCI: add aborting + command ring function" + + Signed-off-by: Mathias Nyman + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-hub.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-hub.c 2014-04-27 23:39:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-hub.c 2014-04-28 00:37:21.000000000 +0000 +@@ -286,7 +286,7 @@ + if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue) + xhci_queue_stop_endpoint(xhci, slot_id, i, suspend); + } +- cmd->command_trb = xhci->cmd_ring->enqueue; ++ cmd->command_trb = xhci_find_next_enqueue(xhci->cmd_ring); + list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list); + xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend); + xhci_ring_cmd_db(xhci); +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-ring.c 2014-04-27 23:39:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c 2014-04-28 00:37:21.000000000 +0000 +@@ -122,6 +122,16 @@ + return TRB_TYPE_LINK_LE32(link->control); + } + ++union xhci_trb *xhci_find_next_enqueue(struct xhci_ring *ring) ++{ ++ /* Enqueue pointer can be left pointing to the link TRB, ++ * we must handle that ++ */ ++ if (TRB_TYPE_LINK_LE32(ring->enqueue->link.control)) ++ return ring->enq_seg->next->trbs; ++ return ring->enqueue; ++} ++ + /* Updates trb to point to the next TRB in the ring, and updates seg if the next + * TRB is in a new segment. This does not skip over link TRBs, and it does not + * effect the ring dequeue or enqueue pointers. +Index: linux-3.10-3.10.11/drivers/usb/host/xhci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci.c 2014-04-28 00:35:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci.c 2014-04-28 00:37:21.000000000 +0000 +@@ -2592,15 +2592,7 @@ + if (command) { + cmd_completion = command->completion; + cmd_status = &command->status; +- command->command_trb = xhci->cmd_ring->enqueue; +- +- /* Enqueue pointer can be left pointing to the link TRB, +- * we must handle that +- */ +- if (TRB_TYPE_LINK_LE32(command->command_trb->link.control)) +- command->command_trb = +- xhci->cmd_ring->enq_seg->next->trbs; +- ++ command->command_trb = xhci_find_next_enqueue(xhci->cmd_ring); + list_add_tail(&command->cmd_list, &virt_dev->cmd_list); + } else { + cmd_completion = &virt_dev->cmd_completion; +@@ -2608,7 +2600,7 @@ + } + init_completion(cmd_completion); + +- cmd_trb = xhci->cmd_ring->dequeue; ++ cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring); + if (!ctx_change) + ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma, + udev->slot_id, must_succeed); +@@ -3393,14 +3385,7 @@ + + /* Attempt to submit the Reset Device command to the command ring */ + spin_lock_irqsave(&xhci->lock, flags); +- reset_device_cmd->command_trb = xhci->cmd_ring->enqueue; +- +- /* Enqueue pointer can be left pointing to the link TRB, +- * we must handle that +- */ +- if (TRB_TYPE_LINK_LE32(reset_device_cmd->command_trb->link.control)) +- reset_device_cmd->command_trb = +- xhci->cmd_ring->enq_seg->next->trbs; ++ reset_device_cmd->command_trb = xhci_find_next_enqueue(xhci->cmd_ring); + + list_add_tail(&reset_device_cmd->cmd_list, &virt_dev->cmd_list); + ret = xhci_queue_reset_device(xhci, slot_id); +@@ -3604,7 +3589,7 @@ + union xhci_trb *cmd_trb; + + spin_lock_irqsave(&xhci->lock, flags); +- cmd_trb = xhci->cmd_ring->dequeue; ++ cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring); + ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0); + if (ret) { + spin_unlock_irqrestore(&xhci->lock, flags); +@@ -3731,7 +3716,7 @@ + xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2); + + spin_lock_irqsave(&xhci->lock, flags); +- cmd_trb = xhci->cmd_ring->dequeue; ++ cmd_trb = xhci_find_next_enqueue(xhci->cmd_ring); + ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma, + udev->slot_id); + if (ret) { +Index: linux-3.10-3.10.11/drivers/usb/host/xhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci.h 2014-04-28 00:35:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci.h 2014-04-28 00:37:21.000000000 +0000 +@@ -1821,6 +1821,7 @@ + union xhci_trb *cmd_trb); + void xhci_ring_ep_doorbell(struct xhci_hcd *xhci, unsigned int slot_id, + unsigned int ep_index, unsigned int stream_id); ++union xhci_trb *xhci_find_next_enqueue(struct xhci_ring *ring); + + /* xHCI roothub code */ + void xhci_set_link_state(struct xhci_hcd *xhci, __le32 __iomem **port_array, +Index: linux-3.10-3.10.11/dummy/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1233_57ad776884c52610af5e00d53e9755f2a8d50bbd.txt 2014-04-28 00:37:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.patch 2014-04-28 00:37:23.000000000 +0000 @@ -0,0 +1,48 @@ +commit a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d +Author: Mathias Nyman +Date: Thu Sep 5 11:01:20 2013 +0300 + + xhci: Fix oops happening after address device timeout + + commit 284d20552461466b04d6bfeafeb1c47a8891b591 upstream. + + When a command times out, the command ring is first aborted, + and then stopped. If the command ring is empty when it is stopped + the stop event will point to next command which is not yet set. + xHCI tries to handle this next event often causing an oops. + + Don't handle command completion events on stopped cmd ring if ring is + empty. + + This patch should be backported to kernels as old as 3.7, that contain + the commit b92cc66c047ff7cf587b318fe377061a353c120f "xHCI: add aborting + command ring function" + + Signed-off-by: Mathias Nyman + Reported-by: Giovanni + Signed-off-by: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-ring.c 2014-04-28 00:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c 2014-04-28 00:37:22.000000000 +0000 +@@ -1400,6 +1400,12 @@ + inc_deq(xhci, xhci->cmd_ring); + return; + } ++ /* There is no command to handle if we get a stop event when the ++ * command ring is empty, event->cmd_trb points to the next ++ * unset command ++ */ ++ if (xhci->cmd_ring->dequeue == xhci->cmd_ring->enqueue) ++ return; + } + + switch (le32_to_cpu(xhci->cmd_ring->dequeue->generic.field[3]) +Index: linux-3.10-3.10.11/dummy/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1234_a9b9047e6dcdfa8472b39d5a3c374d74d89a7f4d.txt 2014-04-28 00:37:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.patch 2014-04-28 00:37:25.000000000 +0000 @@ -0,0 +1,65 @@ +commit c9dd3462b3f99a4a397b7d90265c2e21831ed3a0 +Author: Alan Stern +Date: Tue Sep 24 15:45:25 2013 -0400 + + USB: fix PM config symbol in uhci-hcd, ehci-hcd, and xhci-hcd + + commit f875fdbf344b9fde207f66b392c40845dd7e5aa6 upstream. + + Since uhci-hcd, ehci-hcd, and xhci-hcd support runtime PM, the .pm + field in their pci_driver structures should be protected by CONFIG_PM + rather than CONFIG_PM_SLEEP. The corresponding change has already + been made for ohci-hcd. + + Without this change, controllers won't do runtime suspend if system + suspend or hibernation isn't enabled. + + Signed-off-by: Alan Stern + CC: Sarah Sharp + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/ehci-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ehci-pci.c 2014-04-27 23:39:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ehci-pci.c 2014-04-28 00:37:24.000000000 +0000 +@@ -403,7 +403,7 @@ + .remove = usb_hcd_pci_remove, + .shutdown = usb_hcd_pci_shutdown, + +-#ifdef CONFIG_PM_SLEEP ++#ifdef CONFIG_PM + .driver = { + .pm = &usb_hcd_pci_pm_ops + }, +Index: linux-3.10-3.10.11/drivers/usb/host/uhci-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/uhci-pci.c 2014-04-27 23:39:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/uhci-pci.c 2014-04-28 00:37:24.000000000 +0000 +@@ -293,7 +293,7 @@ + .remove = usb_hcd_pci_remove, + .shutdown = uhci_shutdown, + +-#ifdef CONFIG_PM_SLEEP ++#ifdef CONFIG_PM + .driver = { + .pm = &usb_hcd_pci_pm_ops + }, +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-pci.c 2014-04-27 23:39:13.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-pci.c 2014-04-28 00:37:24.000000000 +0000 +@@ -345,7 +345,7 @@ + /* suspend and resume implemented later */ + + .shutdown = usb_hcd_pci_shutdown, +-#ifdef CONFIG_PM_SLEEP ++#ifdef CONFIG_PM + .driver = { + .pm = &usb_hcd_pci_pm_ops + }, +Index: linux-3.10-3.10.11/dummy/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1235_c9dd3462b3f99a4a397b7d90265c2e21831ed3a0.txt 2014-04-28 00:37:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.patch --- linux-3.10.11/debian/patches/rpi/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.patch 2014-04-28 00:37:26.000000000 +0000 @@ -0,0 +1,44 @@ +commit 27e08a9885a9dab816af72f86b92f2f3513e8314 +Author: Florian Wolter +Date: Wed Aug 14 10:33:16 2013 +0200 + + xhci: Fix race between ep halt and URB cancellation + + commit 526867c3ca0caa2e3e846cb993b0f961c33c2abb upstream. + + The halted state of a endpoint cannot be cleared over CLEAR_HALT from a + user process, because the stopped_td variable was overwritten in the + handle_stopped_endpoint() function. So the xhci_endpoint_reset() function will + refuse the reset and communication with device can not run over this endpoint. + https://bugzilla.kernel.org/show_bug.cgi?id=60699 + + Signed-off-by: Florian Wolter + Signed-off-by: Sarah Sharp + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/xhci-ring.c 2014-04-28 00:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/xhci-ring.c 2014-04-28 00:37:25.000000000 +0000 +@@ -857,8 +857,12 @@ + /* Otherwise ring the doorbell(s) to restart queued transfers */ + ring_doorbell_for_active_rings(xhci, slot_id, ep_index); + } +- ep->stopped_td = NULL; +- ep->stopped_trb = NULL; ++ ++ /* Clear stopped_td and stopped_trb if endpoint is not halted */ ++ if (!(ep->ep_state & EP_HALTED)) { ++ ep->stopped_td = NULL; ++ ep->stopped_trb = NULL; ++ } + + /* + * Drop the lock and complete the URBs in the cancelled TD list. +Index: linux-3.10-3.10.11/dummy/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1236_27e08a9885a9dab816af72f86b92f2f3513e8314.txt 2014-04-28 00:37:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.patch 2014-04-28 00:37:27.000000000 +0000 @@ -0,0 +1,168 @@ +commit 7ca9229cd69ae54e9e124c6643e26c977dd82a6f +Author: Alan Stern +Date: Tue Sep 24 15:46:45 2013 -0400 + + USB: OHCI: accept very late isochronous URBs + + commit a8693424c751b8247ee19bd8b857f1d4f432b972 upstream. + + Commit 24f531371de1 (USB: EHCI: accept very late isochronous URBs) + changed the isochronous API provided by ehci-hcd. URBs submitted too + late, so that the time slots for all their packets have already + expired, are no longer rejected outright. Instead the submission is + accepted, and the URB completes normally with a -EXDEV error for each + packet. This is what client drivers expect. + + This patch implements the same policy in ohci-hcd. The change is more + complicated than it was in ehci-hcd, because ohci-hcd doesn't scan for + isochronous completions in the same way as ehci-hcd does. Rather, it + depends on the hardware adding completed TDs to a "done queue". Some + OHCI controller don't handle this properly when a TD's time slot has + already expired, so we have to avoid adding such TDs to the schedule + in the first place. As a result, if the URB was submitted too late + then none of its TDs will get put on the schedule, so none of them + will end up on the done queue, so the driver will never realize that + the URB should be completed. + + To solve this problem, the patch adds one to urb_priv->td_cnt for such + URBs, making it larger than urb_priv->length (td_cnt already gets set + to the number of TD's that had to be skipped because their slots have + expired). Each time an URB is given back, the finish_urb() routine + looks to see if urb_priv->td_cnt for the next URB on the same endpoint + is marked in this way. If so, it gives back the next URB right away. + + This should be applied to all kernels containing commit 815fa7b91761 + (USB: OHCI: fix logic for scheduling isochronous URBs). + + Signed-off-by: Alan Stern + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/ohci-hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ohci-hcd.c 2014-04-27 23:39:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ohci-hcd.c 2014-04-28 00:37:26.000000000 +0000 +@@ -231,31 +231,26 @@ + frame &= ~(ed->interval - 1); + frame |= ed->branch; + urb->start_frame = frame; ++ ed->last_iso = frame + ed->interval * (size - 1); + } + } else if (ed->type == PIPE_ISOCHRONOUS) { + u16 next = ohci_frame_no(ohci) + 1; + u16 frame = ed->last_iso + ed->interval; ++ u16 length = ed->interval * (size - 1); + + /* Behind the scheduling threshold? */ + if (unlikely(tick_before(frame, next))) { + +- /* USB_ISO_ASAP: Round up to the first available slot */ ++ /* URB_ISO_ASAP: Round up to the first available slot */ + if (urb->transfer_flags & URB_ISO_ASAP) { + frame += (next - frame + ed->interval - 1) & + -ed->interval; + + /* +- * Not ASAP: Use the next slot in the stream. If +- * the entire URB falls before the threshold, fail. ++ * Not ASAP: Use the next slot in the stream, ++ * no matter what. + */ + } else { +- if (tick_before(frame + ed->interval * +- (urb->number_of_packets - 1), next)) { +- retval = -EXDEV; +- usb_hcd_unlink_urb_from_ep(hcd, urb); +- goto fail; +- } +- + /* + * Some OHCI hardware doesn't handle late TDs + * correctly. After retiring them it proceeds +@@ -266,9 +261,16 @@ + urb_priv->td_cnt = DIV_ROUND_UP( + (u16) (next - frame), + ed->interval); ++ if (urb_priv->td_cnt >= urb_priv->length) { ++ ++urb_priv->td_cnt; /* Mark it */ ++ ohci_dbg(ohci, "iso underrun %p (%u+%u < %u)\n", ++ urb, frame, length, ++ next); ++ } + } + } + urb->start_frame = frame; ++ ed->last_iso = frame + length; + } + + /* fill the TDs and link them to the ed; and +Index: linux-3.10-3.10.11/drivers/usb/host/ohci-q.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ohci-q.c 2014-04-27 23:39:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ohci-q.c 2014-04-28 00:37:26.000000000 +0000 +@@ -41,8 +41,12 @@ + __releases(ohci->lock) + __acquires(ohci->lock) + { ++ struct usb_host_endpoint *ep = urb->ep; ++ struct urb_priv *urb_priv; ++ + // ASSERT (urb->hcpriv != 0); + ++ restart: + urb_free_priv (ohci, urb->hcpriv); + urb->hcpriv = NULL; + if (likely(status == -EINPROGRESS)) +@@ -79,6 +83,21 @@ + ohci->hc_control &= ~(OHCI_CTRL_PLE|OHCI_CTRL_IE); + ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); + } ++ ++ /* ++ * An isochronous URB that is sumitted too late won't have any TDs ++ * (marked by the fact that the td_cnt value is larger than the ++ * actual number of TDs). If the next URB on this endpoint is like ++ * that, give it back now. ++ */ ++ if (!list_empty(&ep->urb_list)) { ++ urb = list_first_entry(&ep->urb_list, struct urb, urb_list); ++ urb_priv = urb->hcpriv; ++ if (urb_priv->td_cnt > urb_priv->length) { ++ status = 0; ++ goto restart; ++ } ++ } + } + + +@@ -545,7 +564,6 @@ + td->hwCBP = cpu_to_hc32 (ohci, data & 0xFFFFF000); + *ohci_hwPSWp(ohci, td, 0) = cpu_to_hc16 (ohci, + (data & 0x0FFF) | 0xE000); +- td->ed->last_iso = info & 0xffff; + } else { + td->hwCBP = cpu_to_hc32 (ohci, data); + } +@@ -994,7 +1012,7 @@ + urb_priv->td_cnt++; + + /* if URB is done, clean up */ +- if (urb_priv->td_cnt == urb_priv->length) { ++ if (urb_priv->td_cnt >= urb_priv->length) { + modified = completed = 1; + finish_urb(ohci, urb, 0); + } +@@ -1084,7 +1102,7 @@ + urb_priv->td_cnt++; + + /* If all this urb's TDs are done, call complete() */ +- if (urb_priv->td_cnt == urb_priv->length) ++ if (urb_priv->td_cnt >= urb_priv->length) + finish_urb(ohci, urb, status); + + /* clean schedule: unlink EDs that are no longer busy */ +Index: linux-3.10-3.10.11/dummy/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1237_7ca9229cd69ae54e9e124c6643e26c977dd82a6f.txt 2014-04-28 00:37:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.patch --- linux-3.10.11/debian/patches/rpi/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.patch 2014-04-28 00:37:28.000000000 +0000 @@ -0,0 +1,62 @@ +commit 01ec662c0cfe0304b583ab5b8a6aa8797f4c9828 +Author: Alan Stern +Date: Tue Sep 24 15:47:20 2013 -0400 + + USB: UHCI: accept very late isochronous URBs + + commit bef073b067a7b1874a6b381e0035bb0516d71a77 upstream. + + Commit 24f531371de1 (USB: EHCI: accept very late isochronous URBs) + changed the isochronous API provided by ehci-hcd. URBs submitted too + late, so that the time slots for all their packets have already + expired, are no longer rejected outright. Instead the submission is + accepted, and the URB completes normally with a -EXDEV error for each + packet. This is what client drivers expect. + + This patch implements the same policy in uhci-hcd. It should be + applied to all kernels containing commit c44b225077bb (UHCI: implement + new semantics for URB_ISO_ASAP). + + Signed-off-by: Alan Stern + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/uhci-q.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/uhci-q.c 2014-04-27 23:39:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/uhci-q.c 2014-04-28 00:37:27.000000000 +0000 +@@ -1303,7 +1303,7 @@ + } + + /* Fell behind? */ +- if (uhci_frame_before_eq(frame, next)) { ++ if (!uhci_frame_before_eq(next, frame)) { + + /* USB_ISO_ASAP: Round up to the first available slot */ + if (urb->transfer_flags & URB_ISO_ASAP) +@@ -1311,13 +1311,17 @@ + -qh->period; + + /* +- * Not ASAP: Use the next slot in the stream. If +- * the entire URB falls before the threshold, fail. ++ * Not ASAP: Use the next slot in the stream, ++ * no matter what. + */ + else if (!uhci_frame_before_eq(next, + frame + (urb->number_of_packets - 1) * + qh->period)) +- return -EXDEV; ++ dev_dbg(uhci_dev(uhci), "iso underrun %p (%u+%u < %u)\n", ++ urb, frame, ++ (urb->number_of_packets - 1) * ++ qh->period, ++ next); + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1238_01ec662c0cfe0304b583ab5b8a6aa8797f4c9828.txt 2014-04-28 00:37:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.patch 2014-04-28 00:37:28.000000000 +0000 @@ -0,0 +1,190 @@ +commit 88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e +Author: Al Viro +Date: Fri Sep 20 17:14:21 2013 +0100 + + USB: Fix breakage in ffs_fs_mount() + + commit 2606b28aabd7dea1766c23a105e1124c95409c96 upstream. + + There's a bunch of failure exits in ffs_fs_mount() with + seriously broken recovery logics. Most of that appears to stem + from misunderstanding of the ->kill_sb() semantics; unlike + ->put_super() it is called for *all* superblocks of given type, + no matter how (in)complete the setup had been. ->put_super() + is called only if ->s_root is not NULL; any failure prior to + setting ->s_root will have the call of ->put_super() skipped. + ->kill_sb(), OTOH, awaits every superblock that has come from + sget(). + + Current behaviour of ffs_fs_mount(): + + We have struct ffs_sb_fill_data data on stack there. We do + ffs_dev = functionfs_acquire_dev_callback(dev_name); + and store that in data.private_data. Then we call mount_nodev(), + passing it ffs_sb_fill() as a callback. That will either fail + outright, or manage to call ffs_sb_fill(). There we allocate an + instance of struct ffs_data, slap the value of ffs_dev (picked + from data.private_data) into ffs->private_data and overwrite + data.private_data by storing ffs into an overlapping member + (data.ffs_data). Then we store ffs into sb->s_fs_info and attempt + to set the rest of the things up (root inode, root dentry, then + create /ep0 there). Any of those might fail. Should that + happen, we get ffs_fs_kill_sb() called before mount_nodev() + returns. If mount_nodev() fails for any reason whatsoever, + we proceed to + functionfs_release_dev_callback(data.ffs_data); + + That's broken in a lot of ways. Suppose the thing has failed in + allocation of e.g. root inode or dentry. We have + functionfs_release_dev_callback(ffs); + ffs_data_put(ffs); + done by ffs_fs_kill_sb() (ffs accessed via sb->s_fs_info), followed by + functionfs_release_dev_callback(ffs); + from ffs_fs_mount() (via data.ffs_data). Note that the second + functionfs_release_dev_callback() has every chance to be done to freed memory. + + Suppose we fail *before* root inode allocation. What happens then? + ffs_fs_kill_sb() doesn't do anything to ffs (it's either not called at all, + or it doesn't have a pointer to ffs stored in sb->s_fs_info). And + functionfs_release_dev_callback(data.ffs_data); + is called by ffs_fs_mount(), but here we are in nasal daemon country - we + are reading from a member of union we'd never stored into. In practice, + we'll get what we used to store into the overlapping field, i.e. ffs_dev. + And then we get screwed, since we treat it (struct gfs_ffs_obj * in + disguise, returned by functionfs_acquire_dev_callback()) as struct + ffs_data *, pick what would've been ffs_data ->private_data from it + (*well* past the actual end of the struct gfs_ffs_obj - struct ffs_data + is much bigger) and poke in whatever it points to. + + FWIW, there's a minor leak on top of all that in case if ffs_sb_fill() + fails on kstrdup() - ffs is obviously forgotten. + + The thing is, there is no point in playing all those games with union. + Just allocate and initialize ffs_data *before* calling mount_nodev() and + pass a pointer to it via data.ffs_data. And once it's stored in + sb->s_fs_info, clear data.ffs_data, so that ffs_fs_mount() knows that + it doesn't need to kill the sucker manually - from that point on + we'll have it done by ->kill_sb(). + + Signed-off-by: Al Viro + Acked-by: Michal Nazarewicz + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/gadget/f_fs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/gadget/f_fs.c 2014-04-27 23:39:11.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/gadget/f_fs.c 2014-04-28 00:37:28.000000000 +0000 +@@ -1034,37 +1034,19 @@ + struct ffs_file_perms perms; + umode_t root_mode; + const char *dev_name; +- union { +- /* set by ffs_fs_mount(), read by ffs_sb_fill() */ +- void *private_data; +- /* set by ffs_sb_fill(), read by ffs_fs_mount */ +- struct ffs_data *ffs_data; +- }; ++ struct ffs_data *ffs_data; + }; + + static int ffs_sb_fill(struct super_block *sb, void *_data, int silent) + { + struct ffs_sb_fill_data *data = _data; + struct inode *inode; +- struct ffs_data *ffs; ++ struct ffs_data *ffs = data->ffs_data; + + ENTER(); + +- /* Initialise data */ +- ffs = ffs_data_new(); +- if (unlikely(!ffs)) +- goto Enomem; +- + ffs->sb = sb; +- ffs->dev_name = kstrdup(data->dev_name, GFP_KERNEL); +- if (unlikely(!ffs->dev_name)) +- goto Enomem; +- ffs->file_perms = data->perms; +- ffs->private_data = data->private_data; +- +- /* used by the caller of this function */ +- data->ffs_data = ffs; +- ++ data->ffs_data = NULL; + sb->s_fs_info = ffs; + sb->s_blocksize = PAGE_CACHE_SIZE; + sb->s_blocksize_bits = PAGE_CACHE_SHIFT; +@@ -1080,17 +1062,14 @@ + &data->perms); + sb->s_root = d_make_root(inode); + if (unlikely(!sb->s_root)) +- goto Enomem; ++ return -ENOMEM; + + /* EP0 file */ + if (unlikely(!ffs_sb_create_file(sb, "ep0", ffs, + &ffs_ep0_operations, NULL))) +- goto Enomem; ++ return -ENOMEM; + + return 0; +- +-Enomem: +- return -ENOMEM; + } + + static int ffs_fs_parse_opts(struct ffs_sb_fill_data *data, char *opts) +@@ -1193,6 +1172,7 @@ + struct dentry *rv; + int ret; + void *ffs_dev; ++ struct ffs_data *ffs; + + ENTER(); + +@@ -1200,18 +1180,30 @@ + if (unlikely(ret < 0)) + return ERR_PTR(ret); + ++ ffs = ffs_data_new(); ++ if (unlikely(!ffs)) ++ return ERR_PTR(-ENOMEM); ++ ffs->file_perms = data.perms; ++ ++ ffs->dev_name = kstrdup(dev_name, GFP_KERNEL); ++ if (unlikely(!ffs->dev_name)) { ++ ffs_data_put(ffs); ++ return ERR_PTR(-ENOMEM); ++ } ++ + ffs_dev = functionfs_acquire_dev_callback(dev_name); +- if (IS_ERR(ffs_dev)) +- return ffs_dev; ++ if (IS_ERR(ffs_dev)) { ++ ffs_data_put(ffs); ++ return ERR_CAST(ffs_dev); ++ } ++ ffs->private_data = ffs_dev; ++ data.ffs_data = ffs; + +- data.dev_name = dev_name; +- data.private_data = ffs_dev; + rv = mount_nodev(t, flags, &data, ffs_sb_fill); +- +- /* data.ffs_data is set by ffs_sb_fill */ +- if (IS_ERR(rv)) ++ if (IS_ERR(rv) && data.ffs_data) { + functionfs_release_dev_callback(data.ffs_data); +- ++ ffs_data_put(data.ffs_data); ++ } + return rv; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1239_88b1befdb45f9f5aee5d00a22c4c06bdf5193d4e.txt 2014-04-28 00:37:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.patch 2014-04-28 00:37:29.000000000 +0000 @@ -0,0 +1,53 @@ +commit 07fa74e048755aa8ff07a513e2362722a1c282e7 +Author: Ramneek Mehresh +Date: Mon Sep 16 15:11:33 2013 +0530 + + fsl/usb: Resolve PHY_CLK_VLD instability issue for ULPI phy + + commit ad1260e9fbf768d6bed227d9604ebee76a84aae3 upstream. + + For controller versions greater than 1.6, setting ULPI_PHY_CLK_SEL + bit when USB_EN bit is already set causes instability issues with + PHY_CLK_VLD bit. So USB_EN is set only for IP controller version + below 1.6 before setting ULPI_PHY_CLK_SEL bit + + Signed-off-by: Ramneek Mehresh + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/host/ehci-fsl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/ehci-fsl.c 2014-04-27 23:39:11.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/ehci-fsl.c 2014-04-28 00:37:29.000000000 +0000 +@@ -130,7 +130,7 @@ + } + + /* Enable USB controller, 83xx or 8536 */ +- if (pdata->have_sysif_regs) ++ if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6) + setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); + + /* Don't need to set host mode here. It will be done by tdi_reset() */ +@@ -232,15 +232,9 @@ + case FSL_USB2_PHY_ULPI: + if (pdata->have_sysif_regs && pdata->controller_ver) { + /* controller version 1.6 or above */ ++ clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN); + setbits32(non_ehci + FSL_SOC_USB_CTRL, +- ULPI_PHY_CLK_SEL); +- /* +- * Due to controller issue of PHY_CLK_VALID in ULPI +- * mode, we set USB_CTRL_USB_EN before checking +- * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work. +- */ +- clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL, +- UTMI_PHY_EN, USB_CTRL_USB_EN); ++ ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN); + } + portsc |= PORT_PTS_ULPI; + break; +Index: linux-3.10-3.10.11/dummy/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1240_07fa74e048755aa8ff07a513e2362722a1c282e7.txt 2014-04-28 00:37:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.patch 2014-04-28 00:37:30.000000000 +0000 @@ -0,0 +1,40 @@ +commit 85f78609d213684c3079a0e1716ee6082868814d +Author: Heikki Krogerus +Date: Tue Sep 17 10:38:13 2013 +0300 + + usb: dwc3: pci: add support for BayTrail + + commit b62cd96de3161dfb125a769030eec35a4cab3d3a upstream. + + Add PCI id for Intel BayTrail. + + Signed-off-by: Heikki Krogerus + Signed-off-by: Felipe Balbi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/dwc3/dwc3-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/dwc3/dwc3-pci.c 2014-04-27 23:39:11.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/dwc3/dwc3-pci.c 2014-04-28 00:37:29.000000000 +0000 +@@ -48,6 +48,7 @@ + /* FIXME define these in */ + #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 + #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd ++#define PCI_DEVICE_ID_INTEL_BYT 0x0f37 + + struct dwc3_pci { + struct device *dev; +@@ -208,6 +209,7 @@ + PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, + PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), + }, ++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, + { } /* Terminating Entry */ + }; + MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); +Index: linux-3.10-3.10.11/dummy/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1241_85f78609d213684c3079a0e1716ee6082868814d.txt 2014-04-28 00:37:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.patch 2014-04-28 00:37:31.000000000 +0000 @@ -0,0 +1,39 @@ +commit 3dbfe91ab236d6edd20c52d87b99c5de8b85429d +Author: David Cohen +Date: Thu Sep 26 13:01:44 2013 -0700 + + usb: dwc3: add support for Merrifield + + commit 85601f8cf67c56a561a6dd5e130e65fdc179047d upstream. + + Add PCI id for Intel Merrifield + + Signed-off-by: David Cohen + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/dwc3/dwc3-pci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/dwc3/dwc3-pci.c 2014-04-28 00:37:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/dwc3/dwc3-pci.c 2014-04-28 00:37:30.000000000 +0000 +@@ -49,6 +49,7 @@ + #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 + #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd + #define PCI_DEVICE_ID_INTEL_BYT 0x0f37 ++#define PCI_DEVICE_ID_INTEL_MRFLD 0x119e + + struct dwc3_pci { + struct device *dev; +@@ -210,6 +211,7 @@ + PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), + }, + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, ++ { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), }, + { } /* Terminating Entry */ + }; + MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); +Index: linux-3.10-3.10.11/dummy/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1242_3dbfe91ab236d6edd20c52d87b99c5de8b85429d.txt 2014-04-28 00:37:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.patch --- linux-3.10.11/debian/patches/rpi/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.patch 2014-04-28 00:37:31.000000000 +0000 @@ -0,0 +1,86 @@ +commit 0ce8614959e1630ed3ce1fd36a689e80ca945f94 +Author: Kurt Garloff +Date: Tue Sep 24 14:13:48 2013 +0200 + + usb/core/devio.c: Don't reject control message to endpoint with wrong direction bit + + commit 831abf76643555a99b80a3b54adfa7e4fa0a3259 upstream. + + Trying to read data from the Pegasus Technologies NoteTaker (0e20:0101) + [1] with the Windows App (EasyNote) works natively but fails when + Windows is running under KVM (and the USB device handed to KVM). + + The reason is a USB control message + usb 4-2.2: control urb: bRequestType=22 bRequest=09 wValue=0200 wIndex=0001 wLength=0008 + This goes to endpoint address 0x01 (wIndex); however, endpoint address + 0x01 does not exist. There is an endpoint 0x81 though (same number, + but other direction); the app may have meant that endpoint instead. + + The kernel thus rejects the IO and thus we see the failure. + + Apparently, Linux is more strict here than Windows ... we can't change + the Win app easily, so that's a problem. + + It seems that the Win app/driver is buggy here and the driver does not + behave fully according to the USB HID class spec that it claims to + belong to. The device seems to happily deal with that though (and + seems to not really care about this value much). + + So the question is whether the Linux kernel should filter here. + Rejecting has the risk that somewhat non-compliant userspace apps/ + drivers (most likely in a virtual machine) are prevented from working. + Not rejecting has the risk of confusing an overly sensitive device with + such a transfer. Given the fact that Windows does not filter it makes + this risk rather small though. + + The patch makes the kernel more tolerant: If the endpoint address in + wIndex does not exist, but an endpoint with toggled direction bit does, + it will let the transfer through. (It does NOT change the message.) + + With attached patch, the app in Windows in KVM works. + usb 4-2.2: check_ctrlrecip: process 13073 (qemu-kvm) requesting ep 01 but needs 81 + + I suspect this will mostly affect apps in virtual environments; as on + Linux the apps would have been adapted to the stricter handling of the + kernel. I have done that for mine[2]. + + [1] http://www.pegatech.com/ + [2] https://sourceforge.net/projects/notetakerpen/ + + Signed-off-by: Kurt Garloff + Acked-by: Alan Stern + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/devio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/devio.c 2014-04-27 23:39:10.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/devio.c 2014-04-28 00:37:31.000000000 +0000 +@@ -742,6 +742,22 @@ + if ((index & ~USB_DIR_IN) == 0) + return 0; + ret = findintfep(ps->dev, index); ++ if (ret < 0) { ++ /* ++ * Some not fully compliant Win apps seem to get ++ * index wrong and have the endpoint number here ++ * rather than the endpoint address (with the ++ * correct direction). Win does let this through, ++ * so we'll not reject it here but leave it to ++ * the device to not break KVM. But we warn. ++ */ ++ ret = findintfep(ps->dev, index ^ 0x80); ++ if (ret >= 0) ++ dev_info(&ps->dev->dev, ++ "%s: process %i (%s) requesting ep %02x but needs %02x\n", ++ __func__, task_pid_nr(current), ++ current->comm, index, index ^ 0x80); ++ } + if (ret >= 0) + ret = checkintf(ps, ret); + break; +Index: linux-3.10-3.10.11/dummy/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1243_0ce8614959e1630ed3ce1fd36a689e80ca945f94.txt 2014-04-28 00:37:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.patch 2014-04-28 00:37:32.000000000 +0000 @@ -0,0 +1,94 @@ +commit 78421afdbf0ac17baee98a9caed80c8141a121d3 +Author: Benson Leung +Date: Tue Sep 24 20:05:11 2013 -0700 + + driver core : Fix use after free of dev->parent in device_shutdown + + commit f123db8e9d6c84c863cb3c44d17e61995dc984fb upstream. + + The put_device(dev) at the bottom of the loop of device_shutdown + may result in the dev being cleaned up. In device_create_release, + the dev is kfreed. + + However, device_shutdown attempts to use the dev pointer again after + put_device by referring to dev->parent. + + Copy the parent pointer instead to avoid this condition. + + This bug was found on Chromium OS's chromeos-3.8, which is based on v3.8.11. + See bug report : https://code.google.com/p/chromium/issues/detail?id=297842 + This can easily be reproduced when shutting down with + hidraw devices that report battery condition. + Two examples are the HP Bluetooth Mouse X4000b and the Apple Magic Mouse. + For example, with the magic mouse : + The dev in question is "hidraw0" + dev->parent is "magicmouse" + + In the course of the shutdown for this device, the input event cleanup calls + a put on hidraw0, decrementing its reference count. + When we finally get to put_device(dev) in device_shutdown, kobject_cleanup + is called and device_create_release does kfree(dev). + dev->parent is no longer valid, and we may crash in + put_device(dev->parent). + + This change should be applied on any kernel with this change : + d1c6c030fcec6f860d9bb6c632a3ebe62e28440b + + Signed-off-by: Benson Leung + Reviewed-by: Ming Lei + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/base/core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/base/core.c 2014-04-27 23:39:10.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/base/core.c 2014-04-28 00:37:32.000000000 +0000 +@@ -1839,7 +1839,7 @@ + */ + void device_shutdown(void) + { +- struct device *dev; ++ struct device *dev, *parent; + + spin_lock(&devices_kset->list_lock); + /* +@@ -1856,7 +1856,7 @@ + * prevent it from being freed because parent's + * lock is to be held + */ +- get_device(dev->parent); ++ parent = get_device(dev->parent); + get_device(dev); + /* + * Make sure the device is off the kset list, in the +@@ -1866,8 +1866,8 @@ + spin_unlock(&devices_kset->list_lock); + + /* hold lock to avoid race with probe/release */ +- if (dev->parent) +- device_lock(dev->parent); ++ if (parent) ++ device_lock(parent); + device_lock(dev); + + /* Don't allow any more runtime suspends */ +@@ -1885,11 +1885,11 @@ + } + + device_unlock(dev); +- if (dev->parent) +- device_unlock(dev->parent); ++ if (parent) ++ device_unlock(parent); + + put_device(dev); +- put_device(dev->parent); ++ put_device(parent); + + spin_lock(&devices_kset->list_lock); + } +Index: linux-3.10-3.10.11/dummy/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1244_78421afdbf0ac17baee98a9caed80c8141a121d3.txt 2014-04-28 00:37:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.patch --- linux-3.10.11/debian/patches/rpi/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.patch 2014-04-28 00:37:33.000000000 +0000 @@ -0,0 +1,50 @@ +commit 4541f4e356fe1d9d47165a041f85235e394b0d61 +Author: Mikulas Patocka +Date: Wed Sep 18 19:14:22 2013 -0400 + + dm snapshot: workaround for a false positive lockdep warning + + commit 5ea330a75bd86b2b2a01d7b85c516983238306fb upstream. + + The kernel reports a lockdep warning if a snapshot is invalidated because + it runs out of space. + + The lockdep warning was triggered by commit 0976dfc1d0cd80a4e9dfaf87bd87 + ("workqueue: Catch more locking problems with flush_work()") in v3.5. + + The warning is false positive. The real cause for the warning is that + the lockdep engine treats different instances of md->lock as a single + lock. + + This patch is a workaround - we use flush_workqueue instead of flush_work. + This code path is not performance sensitive (it is called only on + initialization or invalidation), thus it doesn't matter that we flush the + whole workqueue. + + The real fix for the problem would be to teach the lockdep engine to treat + different instances of md->lock as separate locks. + + Signed-off-by: Mikulas Patocka + Acked-by: Alasdair G Kergon + Signed-off-by: Mike Snitzer + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/dm-snap-persistent.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-snap-persistent.c 2014-04-27 23:39:10.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-snap-persistent.c 2014-04-28 00:37:33.000000000 +0000 +@@ -256,7 +256,7 @@ + */ + INIT_WORK_ONSTACK(&req.work, do_metadata); + queue_work(ps->metadata_wq, &req.work); +- flush_work(&req.work); ++ flush_workqueue(ps->metadata_wq); + + return req.result; + } +Index: linux-3.10-3.10.11/dummy/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1245_4541f4e356fe1d9d47165a041f85235e394b0d61.txt 2014-04-28 00:37:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.patch --- linux-3.10.11/debian/patches/rpi/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.patch 2014-04-28 00:37:34.000000000 +0000 @@ -0,0 +1,53 @@ +commit 0f64fad39c9577f3eaa26b45a9ad774c415c19ff +Author: Mikulas Patocka +Date: Wed Sep 18 19:40:42 2013 -0400 + + dm-snapshot: fix performance degradation due to small hash size + + commit 60e356f381954d79088d0455e357db48cfdd6857 upstream. + + LVM2, since version 2.02.96, creates origin with zero size, then loads + the snapshot driver and then loads the origin. Consequently, the + snapshot driver sees the origin size zero and sets the hash size to the + lower bound 64. Such small hash table causes performance degradation. + + This patch changes it so that the hash size is determined by the size of + snapshot volume, not minimum of origin and snapshot size. It doesn't + make sense to set the snapshot size significantly larger than the origin + size, so we do not need to take origin size into account when + calculating the hash size. + + Signed-off-by: Mikulas Patocka + Signed-off-by: Mike Snitzer + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/dm-snap.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-snap.c 2014-04-27 23:39:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-snap.c 2014-04-28 00:37:33.000000000 +0000 +@@ -725,17 +725,16 @@ + */ + static int init_hash_tables(struct dm_snapshot *s) + { +- sector_t hash_size, cow_dev_size, origin_dev_size, max_buckets; ++ sector_t hash_size, cow_dev_size, max_buckets; + + /* + * Calculate based on the size of the original volume or + * the COW volume... + */ + cow_dev_size = get_dev_size(s->cow->bdev); +- origin_dev_size = get_dev_size(s->origin->bdev); + max_buckets = calc_max_buckets(); + +- hash_size = min(origin_dev_size, cow_dev_size) >> s->store->chunk_shift; ++ hash_size = cow_dev_size >> s->store->chunk_shift; + hash_size = min(hash_size, max_buckets); + + if (hash_size < 64) +Index: linux-3.10-3.10.11/dummy/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1246_0f64fad39c9577f3eaa26b45a9ad774c415c19ff.txt 2014-04-28 00:37:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.patch --- linux-3.10.11/debian/patches/rpi/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.patch 2014-04-28 00:37:35.000000000 +0000 @@ -0,0 +1,157 @@ +commit e9d60f699108682bad9c4604feb408ac9198b232 +Author: Mike Snitzer +Date: Thu Sep 19 12:13:58 2013 -0400 + + dm mpath: disable WRITE SAME if it fails + + commit f84cb8a46a771f36a04a02c61ea635c968ed5f6a upstream. + + Workaround the SCSI layer's problematic WRITE SAME heuristics by + disabling WRITE SAME in the DM multipath device's queue_limits if an + underlying device disabled it. + + The WRITE SAME heuristics, with both the original commit 5db44863b6eb + ("[SCSI] sd: Implement support for WRITE SAME") and the updated commit + 66c28f971 ("[SCSI] sd: Update WRITE SAME heuristics"), default to enabling + WRITE SAME(10) even without successfully determining it is supported. + After the first failed WRITE SAME the SCSI layer will disable WRITE SAME + for the device (by setting sdkp->device->no_write_same which results in + 'max_write_same_sectors' in device's queue_limits to be set to 0). + + When a device is stacked ontop of such a SCSI device any changes to that + SCSI device's queue_limits do not automatically propagate up the stack. + As such, a DM multipath device will not have its WRITE SAME support + disabled. This causes the block layer to continue to issue WRITE SAME + requests to the mpath device which causes paths to fail and (if mpath IO + isn't configured to queue when no paths are available) it will result in + actual IO errors to the upper layers. + + This fix doesn't help configurations that have additional devices + stacked ontop of the mpath device (e.g. LVM created linear DM devices + ontop). A proper fix that restacks all the queue_limits from the bottom + of the device stack up will need to be explored if SCSI will continue to + use this model of optimistically allowing op codes and then disabling + them after they fail for the first time. + + Before this patch: + + EXT4-fs (dm-6): mounted filesystem with ordered data mode. Opts: (null) + device-mapper: multipath: XXX snitm debugging: got -EREMOTEIO (-121) + device-mapper: multipath: XXX snitm debugging: failing WRITE SAME IO with error=-121 + end_request: critical target error, dev dm-6, sector 528 + dm-6: WRITE SAME failed. Manually zeroing. + device-mapper: multipath: Failing path 8:112. + end_request: I/O error, dev dm-6, sector 4616 + dm-6: WRITE SAME failed. Manually zeroing. + end_request: I/O error, dev dm-6, sector 4616 + end_request: I/O error, dev dm-6, sector 5640 + end_request: I/O error, dev dm-6, sector 6664 + end_request: I/O error, dev dm-6, sector 7688 + end_request: I/O error, dev dm-6, sector 524288 + Buffer I/O error on device dm-6, logical block 65536 + lost page write due to I/O error on dm-6 + JBD2: Error -5 detected when updating journal superblock for dm-6-8. + end_request: I/O error, dev dm-6, sector 524296 + Aborting journal on device dm-6-8. + end_request: I/O error, dev dm-6, sector 524288 + Buffer I/O error on device dm-6, logical block 65536 + lost page write due to I/O error on dm-6 + JBD2: Error -5 detected when updating journal superblock for dm-6-8. + + # cat /sys/block/sdh/queue/write_same_max_bytes + 0 + # cat /sys/block/dm-6/queue/write_same_max_bytes + 33553920 + + After this patch: + + EXT4-fs (dm-6): mounted filesystem with ordered data mode. Opts: (null) + device-mapper: multipath: XXX snitm debugging: got -EREMOTEIO (-121) + device-mapper: multipath: XXX snitm debugging: WRITE SAME I/O failed with error=-121 + end_request: critical target error, dev dm-6, sector 528 + dm-6: WRITE SAME failed. Manually zeroing. + + # cat /sys/block/sdh/queue/write_same_max_bytes + 0 + # cat /sys/block/dm-6/queue/write_same_max_bytes + 0 + + It should be noted that WRITE SAME support wasn't enabled in DM + multipath until v3.10. + + Signed-off-by: Mike Snitzer + Cc: Martin K. Petersen + Cc: Hannes Reinecke + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/dm-mpath.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-mpath.c 2014-04-27 23:39:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-mpath.c 2014-04-28 00:37:34.000000000 +0000 +@@ -1284,8 +1284,17 @@ + if (!error && !clone->errors) + return 0; /* I/O complete */ + +- if (error == -EOPNOTSUPP || error == -EREMOTEIO || error == -EILSEQ) ++ if (error == -EOPNOTSUPP || error == -EREMOTEIO || error == -EILSEQ) { ++ if ((clone->cmd_flags & REQ_WRITE_SAME) && ++ !clone->q->limits.max_write_same_sectors) { ++ struct queue_limits *limits; ++ ++ /* device doesn't really support WRITE SAME, disable it */ ++ limits = dm_get_queue_limits(dm_table_get_md(m->ti->table)); ++ limits->max_write_same_sectors = 0; ++ } + return error; ++ } + + if (mpio->pgpath) + fail_path(mpio->pgpath); +Index: linux-3.10-3.10.11/drivers/md/dm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm.c 2014-04-27 23:39:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm.c 2014-04-28 00:37:34.000000000 +0000 +@@ -2219,6 +2219,17 @@ + } + + /* ++ * The queue_limits are only valid as long as you have a reference ++ * count on 'md'. ++ */ ++struct queue_limits *dm_get_queue_limits(struct mapped_device *md) ++{ ++ BUG_ON(!atomic_read(&md->holders)); ++ return &md->queue->limits; ++} ++EXPORT_SYMBOL_GPL(dm_get_queue_limits); ++ ++/* + * Fully initialize a request-based queue (->elevator, ->request_fn, etc). + */ + static int dm_init_request_based_queue(struct mapped_device *md) +Index: linux-3.10-3.10.11/include/linux/device-mapper.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/device-mapper.h 2014-04-27 23:39:09.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/device-mapper.h 2014-04-28 00:37:34.000000000 +0000 +@@ -405,13 +405,14 @@ + union map_info *dm_get_mapinfo(struct bio *bio); + union map_info *dm_get_rq_mapinfo(struct request *rq); + ++struct queue_limits *dm_get_queue_limits(struct mapped_device *md); ++ + /* + * Geometry functions. + */ + int dm_get_geometry(struct mapped_device *md, struct hd_geometry *geo); + int dm_set_geometry(struct mapped_device *md, struct hd_geometry *geo); + +- + /*----------------------------------------------------------------- + * Functions for manipulating device-mapper tables. + *---------------------------------------------------------------*/ +Index: linux-3.10-3.10.11/dummy/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1247_e9d60f699108682bad9c4604feb408ac9198b232.txt 2014-04-28 00:37:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.patch 2014-04-28 00:37:36.000000000 +0000 @@ -0,0 +1,34 @@ +commit f38af5d3f6aa1186b0ac9a1ef021d425550b479b +Author: NeilBrown +Date: Thu May 9 10:27:49 2013 +1000 + + dm-raid: silence compiler warning on rebuilds_per_group. + + commit 3f6bbd3ffd7b733dd705e494663e5761aa2cb9c1 upstream. + + This doesn't really need to be initialised, but it doesn't hurt, + silences the compiler, and as it is a counter it makes sense for it to + start at zero. + + Signed-off-by: NeilBrown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/dm-raid.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-raid.c 2014-04-27 23:39:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-raid.c 2014-04-28 00:37:35.000000000 +0000 +@@ -380,7 +380,7 @@ + static int validate_raid_redundancy(struct raid_set *rs) + { + unsigned i, rebuild_cnt = 0; +- unsigned rebuilds_per_group, copies, d; ++ unsigned rebuilds_per_group = 0, copies, d; + unsigned group_size, last_group_start; + + for (i = 0; i < rs->md.raid_disks; i++) +Index: linux-3.10-3.10.11/dummy/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1248_f38af5d3f6aa1186b0ac9a1ef021d425550b479b.txt 2014-04-28 00:37:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.patch --- linux-3.10.11/debian/patches/rpi/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.patch 2014-04-28 00:37:37.000000000 +0000 @@ -0,0 +1,60 @@ +commit 3ef7d935f87406489889c792ebc1218feaeaab44 +Author: Daniel Vetter +Date: Tue Sep 24 11:46:14 2013 +0200 + + drm/i915: preserve pipe A quirk in i9xx_set_pipeconf + + commit 67c72a12254101d4e8d9b9f3a02646ba0be84a2d upstream. + + This regression has been introduced in + + commit 9f11a9e4e50006b615ba94722dfc33ced89664cf + Author: Daniel Vetter + Date: Thu Jun 13 00:54:58 2013 +0200 + + drm/i915: set up PIPECONF explicitly for i9xx/vlv platforms + + Ville brough up the idea that this is just the pipe A quirk gone + wrong. + + Note that after resume the bios might or might not have enabled pipe A + already. We have a bit of magic to make sure that on resume we set up + a decent mode for pipe A, but I fear if I just smash pipe A to always + on we'd enable it in a bogus state and hang the hw. Hence the + readback. + + v2: Clarify the logic a bit as suggested by Chris. Also amend the + commit message to clarify why we don't unconditionally enable the + pipe. + + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66462 + References: https://lkml.org/lkml/2013/8/26/238 + Cc: Meelis Roos + Cc: Chris Wilson + Cc: Ville Syrjälä + Reviewed-by: Chris Wilson + [danvet: Use |= instead of = as suggested by Chris.] + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_display.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/intel_display.c 2014-04-27 23:39:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_display.c 2014-04-28 00:37:36.000000000 +0000 +@@ -4564,6 +4564,10 @@ + + pipeconf = I915_READ(PIPECONF(intel_crtc->pipe)); + ++ if (dev_priv->quirks & QUIRK_PIPEA_FORCE && ++ I915_READ(PIPECONF(intel_crtc->pipe)) & PIPECONF_ENABLE) ++ pipeconf |= PIPECONF_ENABLE; ++ + if (intel_crtc->pipe == 0 && INTEL_INFO(dev)->gen < 4) { + /* Enable pixel doubling when the dot clock is > 90% of the (display) + * core speed. +Index: linux-3.10-3.10.11/dummy/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1249_3ef7d935f87406489889c792ebc1218feaeaab44.txt 2014-04-28 00:37:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.patch --- linux-3.10.11/debian/patches/rpi/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.patch 2014-04-28 00:37:38.000000000 +0000 @@ -0,0 +1,50 @@ +commit d113feebb1081c4baa720c5fc99c984fb4e2e598 +Author: Jani Nikula +Date: Fri Sep 20 16:42:15 2013 +0300 + + drm/i915/dp: increase i2c-over-aux retry interval on AUX DEFER + + commit 8d16f258217f2f583af1fd57c5144aa4bbe73e48 upstream. + + There is no clear cut rules or specs for the retry interval, as there + are many factors that affect overall response time. Increase the + interval, and even more so on branch devices which may have limited i2c + bit rates. + + Signed-off-by: Jani Nikula + Reference: https://bugs.freedesktop.org/show_bug.cgi?id=60263 + Tested-by: Nicolas Suzor + Reviewed-by: Todd Previte + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_dp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/intel_dp.c 2014-04-27 23:39:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_dp.c 2014-04-28 00:37:37.000000000 +0000 +@@ -604,7 +604,18 @@ + DRM_DEBUG_KMS("aux_ch native nack\n"); + return -EREMOTEIO; + case AUX_NATIVE_REPLY_DEFER: +- udelay(100); ++ /* ++ * For now, just give more slack to branch devices. We ++ * could check the DPCD for I2C bit rate capabilities, ++ * and if available, adjust the interval. We could also ++ * be more careful with DP-to-Legacy adapters where a ++ * long legacy cable may force very low I2C bit rates. ++ */ ++ if (intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & ++ DP_DWN_STRM_PORT_PRESENT) ++ usleep_range(500, 600); ++ else ++ usleep_range(300, 400); + continue; + default: + DRM_ERROR("aux_ch invalid native reply 0x%02x\n", +Index: linux-3.10-3.10.11/dummy/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1250_d113feebb1081c4baa720c5fc99c984fb4e2e598.txt 2014-04-28 00:37:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.patch 2014-04-28 00:37:38.000000000 +0000 @@ -0,0 +1,36 @@ +commit 6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d +Author: Alex Deucher +Date: Sun Sep 15 23:23:07 2013 -0400 + + drm/radeon: avoid UVD corruption on AGP cards using GPU gart + + commit 4ca5a6cba53e13b8fd153b0762b4128fab6a3cfb upstream. + + If the user has forced the driver to use the internal GPU gart + rather than AGP on an AGP card, force the buffers to vram + as well. + + Signed-off-by: Alex Deucher + Reviewed-by: Christian König + Tested-by: Dieter Nützel + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_cs.c 2014-04-28 00:36:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_cs.c 2014-04-28 00:37:38.000000000 +0000 +@@ -84,7 +84,7 @@ + VRAM, also but everything into VRAM on AGP cards to avoid + image corruptions */ + if (p->ring == R600_RING_TYPE_UVD_INDEX && +- (i == 0 || p->rdev->flags & RADEON_IS_AGP)) { ++ (i == 0 || drm_pci_device_is_agp(p->rdev->ddev))) { + /* TODO: is this still needed for NI+ ? */ + p->relocs[i].lobj.domain = + RADEON_GEM_DOMAIN_VRAM; +Index: linux-3.10-3.10.11/dummy/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1251_6452230ccfffec35fc7ee2e5f3e3bb6f8ab6570d.txt 2014-04-28 00:37:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.patch --- linux-3.10.11/debian/patches/rpi/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.patch 2014-04-28 00:37:39.000000000 +0000 @@ -0,0 +1,63 @@ +commit f329055796c2c2d4d0a6fe4691755213cfef6187 +Author: Alex Ivanov +Date: Fri Sep 20 17:36:06 2013 +0400 + + drm/radeon: Make r100_cp_ring_info() and radeon_ring_gfx() safe (v2) + + commit 0eb3448aa6b31fbf24c31756aba7940cac5ad6b8 upstream. + + Prevent NULL pointer dereference in case when radeon_ring_fini() did it's job. + + Reading of r100_cp_ring_info and radeon_ring_gfx debugfs entries will lead to a KP if ring buffer was deallocated, e.g. on failed ring test. + Seen on PA-RISC machine having "radeon: ring test failed (scratch(0x8504)=0xCAFEDEAD)" issue. + + v2: agd5f: add some parens around ring->ready check + + Signed-off-by: Alex Ivanov + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r100.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r100.c 2014-04-28 00:32:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r100.c 2014-04-28 00:37:39.000000000 +0000 +@@ -2932,9 +2932,11 @@ + seq_printf(m, "CP_RB_RPTR 0x%08x\n", rdp); + seq_printf(m, "%u free dwords in ring\n", ring->ring_free_dw); + seq_printf(m, "%u dwords in ring\n", count); +- for (j = 0; j <= count; j++) { +- i = (rdp + j) & ring->ptr_mask; +- seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); ++ if (ring->ready) { ++ for (j = 0; j <= count; j++) { ++ i = (rdp + j) & ring->ptr_mask; ++ seq_printf(m, "r[%04d]=0x%08x\n", i, ring->ring[i]); ++ } + } + return 0; + } +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_ring.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_ring.c 2014-04-27 23:39:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_ring.c 2014-04-28 00:37:39.000000000 +0000 +@@ -823,9 +823,11 @@ + * packet that is the root issue + */ + i = (ring->rptr + ring->ptr_mask + 1 - 32) & ring->ptr_mask; +- for (j = 0; j <= (count + 32); j++) { +- seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); +- i = (i + 1) & ring->ptr_mask; ++ if (ring->ready) { ++ for (j = 0; j <= (count + 32); j++) { ++ seq_printf(m, "r[%5d]=0x%08x\n", i, ring->ring[i]); ++ i = (i + 1) & ring->ptr_mask; ++ } + } + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1252_f329055796c2c2d4d0a6fe4691755213cfef6187.txt 2014-04-28 00:37:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.patch 2014-04-28 00:37:40.000000000 +0000 @@ -0,0 +1,52 @@ +commit 05e1be66ed3e42ea63a30771531af4d9146efe3c +Author: Alex Deucher +Date: Mon Sep 23 10:38:26 2013 -0400 + + drm/radeon: disable tests/benchmarks if accel is disabled + + commit 4a1132a023eb48cf10522d84c5908d43b612c041 upstream. + + The tests are only usable if the acceleration engines have + been successfully initialized. + + Based on an initial patch from: Alex Ivanov + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_device.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_device.c 2014-04-27 23:39:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_device.c 2014-04-28 00:37:40.000000000 +0000 +@@ -1196,13 +1196,22 @@ + return r; + } + if ((radeon_testing & 1)) { +- radeon_test_moves(rdev); ++ if (rdev->accel_working) ++ radeon_test_moves(rdev); ++ else ++ DRM_INFO("radeon: acceleration disabled, skipping move tests\n"); + } + if ((radeon_testing & 2)) { +- radeon_test_syncing(rdev); ++ if (rdev->accel_working) ++ radeon_test_syncing(rdev); ++ else ++ DRM_INFO("radeon: acceleration disabled, skipping sync tests\n"); + } + if (radeon_benchmarking) { +- radeon_benchmark(rdev, radeon_benchmarking); ++ if (rdev->accel_working) ++ radeon_benchmark(rdev, radeon_benchmarking); ++ else ++ DRM_INFO("radeon: acceleration disabled, skipping benchmarks\n"); + } + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1253_05e1be66ed3e42ea63a30771531af4d9146efe3c.txt 2014-04-28 00:37:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.patch --- linux-3.10.11/debian/patches/rpi/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.patch 2014-04-28 00:37:41.000000000 +0000 @@ -0,0 +1,39 @@ +commit b2a9484006875ecd7d94582e7bcb72a02682be92 +Author: Alex Deucher +Date: Mon Sep 23 15:47:08 2013 -0400 + + drm/radeon: add missing hdmi callbacks for rv6xx + + commit 99d79aa2f3b7729e7290e8bda5d0dd8b0240ec62 upstream. + + When dpm was merged, I added a new asic struct for + rv6xx, but it never got properly updated when the + hdmi callbacks were added due to the two patch sets + being developed in parallel. + + Fixes: + https://bugs.freedesktop.org/show_bug.cgi?id=69729 + + Signed-off-by: Alex Deucher + Reviewed-by: Christian König + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_asic.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-27 23:39:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-28 00:37:40.000000000 +0000 +@@ -892,6 +892,8 @@ + .wait_for_vblank = &avivo_wait_for_vblank, + .set_backlight_level = &atombios_set_backlight_level, + .get_backlight_level = &atombios_get_backlight_level, ++ .hdmi_enable = &r600_hdmi_enable, ++ .hdmi_setmode = &r600_hdmi_setmode, + }, + .copy = { + .blit = &r100_copy_blit, +Index: linux-3.10-3.10.11/dummy/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1254_b2a9484006875ecd7d94582e7bcb72a02682be92.txt 2014-04-28 00:37:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.patch --- linux-3.10.11/debian/patches/rpi/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.patch 2014-04-28 00:37:42.000000000 +0000 @@ -0,0 +1,60 @@ +commit ddcca42fb47e59b1655d866b364c3dac4ba3f135 +Author: Alex Deucher +Date: Wed Sep 25 12:04:37 2013 -0400 + + drm/radeon: fix hdmi audio on DCE3.0/3.1 asics + + commit 58d327da9721f7a0f6e46c8dfa5cc5546fd7078a upstream. + + These asics seem to use a mix of the DCE2.x and + DCE3.2 audio interfaces despite what the register spec + says. + + Fixes: + https://bugs.freedesktop.org/show_bug.cgi?id=69729 + https://bugs.freedesktop.org/show_bug.cgi?id=69671 + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600_hdmi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r600_hdmi.c 2014-04-27 23:39:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600_hdmi.c 2014-04-28 00:37:41.000000000 +0000 +@@ -238,9 +238,19 @@ + * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE + * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator + */ +- if (ASIC_IS_DCE3(rdev)) { ++ if (ASIC_IS_DCE32(rdev)) { ++ if (dig->dig_encoder == 0) { ++ WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); ++ WREG32(DCCG_AUDIO_DTO0_MODULE, clock * 100); ++ WREG32(DCCG_AUDIO_DTO_SELECT, 0); /* select DTO0 */ ++ } else { ++ WREG32(DCCG_AUDIO_DTO1_PHASE, base_rate * 100); ++ WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); ++ WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ ++ } ++ } else if (ASIC_IS_DCE3(rdev)) { + /* according to the reg specs, this should DCE3.2 only, but in +- * practice it seems to cover DCE3.0 as well. ++ * practice it seems to cover DCE3.0/3.1 as well. + */ + if (dig->dig_encoder == 0) { + WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); +@@ -252,7 +262,7 @@ + WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ + } + } else { +- /* according to the reg specs, this should be DCE2.0 and DCE3.0 */ ++ /* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */ + WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) | + AUDIO_DTO_MODULE(clock / 10)); + } +Index: linux-3.10-3.10.11/dummy/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1255_ddcca42fb47e59b1655d866b364c3dac4ba3f135.txt 2014-04-28 00:37:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.patch 2014-04-28 00:37:43.000000000 +0000 @@ -0,0 +1,37 @@ +commit 37482f9cfb0269e082a817f31ad2a5f0204163f9 +Author: Arnd Bergmann +Date: Mon Jun 3 16:00:22 2013 +0200 + + ARM: mxs: stub out mxs_pm_init for !CONFIG_PM + + commit 7a9caf59f60e55a8caf96f856713bd0ef0cc25a7 upstream. + + When building a kernel without CONFIG_PM, we get a link + error from referencing mxs_pm_init in the machine + descriptor. This defines a macro to NULL for that case. + + Signed-off-by: Arnd Bergmann + Acked-by: Shawn Guo + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/mach-mxs/pm.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-mxs/pm.h 2014-04-27 23:39:06.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-mxs/pm.h 2014-04-28 00:37:42.000000000 +0000 +@@ -9,6 +9,10 @@ + #ifndef __ARCH_MXS_PM_H + #define __ARCH_MXS_PM_H + ++#ifdef CONFIG_PM + void mxs_pm_init(void); ++#else ++#define mxs_pm_init NULL ++#endif + + #endif +Index: linux-3.10-3.10.11/dummy/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1256_37482f9cfb0269e082a817f31ad2a5f0204163f9.txt 2014-04-28 00:37:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.patch 2014-04-28 00:37:43.000000000 +0000 @@ -0,0 +1,56 @@ +commit 332769e13b075c82ae7b9f79be29506f8c6aceb2 +Author: Henrik Rydberg +Date: Thu Sep 26 08:33:16 2013 +0200 + + hwmon: (applesmc) Check key count before proceeding + + commit 5f4513864304672e6ea9eac60583eeac32e679f2 upstream. + + After reports from Chris and Josh Boyer of a rare crash in applesmc, + Guenter pointed at the initialization problem fixed below. The patch + has not been verified to fix the crash, but should be applied + regardless. + + Reported-by: + Suggested-by: Guenter Roeck + Signed-off-by: Henrik Rydberg + Signed-off-by: Guenter Roeck + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hwmon/applesmc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hwmon/applesmc.c 2014-04-27 23:39:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hwmon/applesmc.c 2014-04-28 00:37:43.000000000 +0000 +@@ -525,16 +525,25 @@ + { + struct applesmc_registers *s = &smcreg; + bool left_light_sensor, right_light_sensor; ++ unsigned int count; + u8 tmp[1]; + int ret; + + if (s->init_complete) + return 0; + +- ret = read_register_count(&s->key_count); ++ ret = read_register_count(&count); + if (ret) + return ret; + ++ if (s->cache && s->key_count != count) { ++ pr_warn("key count changed from %d to %d\n", ++ s->key_count, count); ++ kfree(s->cache); ++ s->cache = NULL; ++ } ++ s->key_count = count; ++ + if (!s->cache) + s->cache = kcalloc(s->key_count, sizeof(*s->cache), GFP_KERNEL); + if (!s->cache) +Index: linux-3.10-3.10.11/dummy/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1257_332769e13b075c82ae7b9f79be29506f8c6aceb2.txt 2014-04-28 00:37:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.patch --- linux-3.10.11/debian/patches/rpi/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.patch 2014-04-28 00:37:44.000000000 +0000 @@ -0,0 +1,37 @@ +commit 1aff4161cc9ed30b6842030ec1b91b4cdca1a811 +Author: Liam Girdwood +Date: Fri Sep 13 17:43:17 2013 +0100 + + ALSA: compress: Fix compress device unregister. + + commit 4028b6c4c03f213260e9290ff3a6b5439aad07ce upstream. + + snd_unregister_device() should return the device type and not stream + direction. + + Signed-off-by: Liam Girdwood + Acked-by: Vinod Koul + Tested-by: Vinod Koul + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/core/compress_offload.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/core/compress_offload.c 2014-04-27 23:39:05.000000000 +0000 ++++ linux-3.10-3.10.11/sound/core/compress_offload.c 2014-04-28 00:37:44.000000000 +0000 +@@ -837,7 +837,8 @@ + struct snd_compr *compr; + + compr = device->device_data; +- snd_unregister_device(compr->direction, compr->card, compr->device); ++ snd_unregister_device(SNDRV_DEVICE_TYPE_COMPRESS, compr->card, ++ compr->device); + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1258_1aff4161cc9ed30b6842030ec1b91b4cdca1a811.txt 2014-04-28 00:37:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.patch 2014-04-28 00:37:45.000000000 +0000 @@ -0,0 +1,61 @@ +commit 5ffe7285aa50470853f2a06188b5578c4397c7c2 +Author: Daniel Vetter +Date: Fri Jul 26 11:27:49 2013 +0200 + + drm/i915: fix gen4 digital port hotplug definitions + + commit 0ce99f749b3834edeb500e17d6ad17e86b60ff83 upstream. + + Apparently Bspec is wrong in this case here even for gm45. Note that + Bspec is horribly misguided on i965g/gm, so we don't have any other + data points besides that it seems to make machines work better. + + With this changes all the bits in PORT_HOTPLUG_STAT for the digital + ports are ordered the same way. This seems to agree with what register + dumps from the hpd storm handling code shows, where the LIVE bit and + the short/long pulse STATUS bits light up at the same time with this + enumeration (but no with the one from Bspec). + + Also tested on my gm45 which has two DP+ ports, and everything seems + to still work as expected. + + References: http://www.mail-archive.com/intel-gfx@lists.freedesktop.org/msg23054.html + Cc: Egbert Eich + Cc: Jan Niggemann + Tested-by: Jan Niggemann + [danvet: Add a big warning that Bspec seems to be wrong for these + bits, suggested by Jani.] + Acked-by: Jani Nikula + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_reg.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/i915_reg.h 2014-04-27 23:39:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/i915_reg.h 2014-04-28 00:37:44.000000000 +0000 +@@ -1675,10 +1675,16 @@ + #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) + + #define PORT_HOTPLUG_STAT (dev_priv->info->display_mmio_offset + 0x61114) +-/* HDMI/DP bits are gen4+ */ +-#define PORTB_HOTPLUG_LIVE_STATUS (1 << 29) ++/* ++ * HDMI/DP bits are gen4+ ++ * ++ * WARNING: Bspec for hpd status bits on gen4 seems to be completely confused. ++ * Please check the detailed lore in the commit message for for experimental ++ * evidence. ++ */ ++#define PORTD_HOTPLUG_LIVE_STATUS (1 << 29) + #define PORTC_HOTPLUG_LIVE_STATUS (1 << 28) +-#define PORTD_HOTPLUG_LIVE_STATUS (1 << 27) ++#define PORTB_HOTPLUG_LIVE_STATUS (1 << 27) + #define PORTD_HOTPLUG_INT_STATUS (3 << 21) + #define PORTC_HOTPLUG_INT_STATUS (3 << 19) + #define PORTB_HOTPLUG_INT_STATUS (3 << 17) +Index: linux-3.10-3.10.11/dummy/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1259_5ffe7285aa50470853f2a06188b5578c4397c7c2.txt 2014-04-28 00:37:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.patch --- linux-3.10.11/debian/patches/rpi/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.patch 2014-04-28 00:37:46.000000000 +0000 @@ -0,0 +1,24 @@ +commit cac65253a9c5a30d4c8d7bc4c60197935f9e2e70 +Author: Greg Kroah-Hartman +Date: Sat Oct 5 07:13:21 2013 -0700 + + Linux 3.10.15 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:36:59.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:37:45.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 14 ++SUBLEVEL = 15 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1260_cac65253a9c5a30d4c8d7bc4c60197935f9e2e70.txt 2014-04-28 00:37:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.patch 2014-04-28 00:37:47.000000000 +0000 @@ -0,0 +1,79 @@ +commit 9e65b308202a4e6536c5b453d6b37fd0467dd5d2 +Author: Daniel Drake +Date: Fri Jun 14 15:24:24 2013 -0400 + + mwifiex: fix memory corruption when unsetting multicast list + + commit 6390d88529835a8ad3563fe01a5da89fa52d6db2 upstream. + + When trying to unset a previously-set multicast list (i.e. the new list + has 0 entries), mwifiex_set_multicast_list() was calling down to + mwifiex_request_set_multicast_list() while leaving + mcast_list.num_multicast_addr as an uninitialized value. + + We were arriving at mwifiex_cmd_mac_multicast_adr() which would then + proceed to do an often huge memcpy of + mcast_list.num_multicast_addr*ETH_ALEN bytes, causing memory corruption + and hard to debug crashes. + + Fix this by setting mcast_list.num_multicast_addr to 0 when no multicast + list is provided. Similarly, fix up the logic in + mwifiex_request_set_multicast_list() to unset the multicast list that + was previously sent to the hardware in such cases. + + Signed-off-by: Daniel Drake + Acked-by: Bing Zhao + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:34:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:37:46.000000000 +0000 +@@ -556,9 +556,8 @@ + mcast_list.mode = MWIFIEX_ALL_MULTI_MODE; + } else { + mcast_list.mode = MWIFIEX_MULTICAST_MODE; +- if (netdev_mc_count(dev)) +- mcast_list.num_multicast_addr = +- mwifiex_copy_mcast_addr(&mcast_list, dev); ++ mcast_list.num_multicast_addr = ++ mwifiex_copy_mcast_addr(&mcast_list, dev); + } + mwifiex_request_set_multicast_list(priv, &mcast_list); + } +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/sta_ioctl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/sta_ioctl.c 2014-04-27 23:39:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/sta_ioctl.c 2014-04-28 00:37:46.000000000 +0000 +@@ -104,16 +104,14 @@ + } else { + priv->curr_pkt_filter &= + ~HostCmd_ACT_MAC_ALL_MULTICAST_ENABLE; +- if (mcast_list->num_multicast_addr) { +- dev_dbg(priv->adapter->dev, +- "info: Set multicast list=%d\n", +- mcast_list->num_multicast_addr); +- /* Send multicast addresses to firmware */ +- ret = mwifiex_send_cmd_async(priv, +- HostCmd_CMD_MAC_MULTICAST_ADR, +- HostCmd_ACT_GEN_SET, 0, +- mcast_list); +- } ++ dev_dbg(priv->adapter->dev, ++ "info: Set multicast list=%d\n", ++ mcast_list->num_multicast_addr); ++ /* Send multicast addresses to firmware */ ++ ret = mwifiex_send_cmd_async(priv, ++ HostCmd_CMD_MAC_MULTICAST_ADR, ++ HostCmd_ACT_GEN_SET, 0, ++ mcast_list); + } + } + dev_dbg(priv->adapter->dev, +Index: linux-3.10-3.10.11/dummy/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1261_9e65b308202a4e6536c5b453d6b37fd0467dd5d2.txt 2014-04-28 00:37:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.patch 2014-04-28 00:37:47.000000000 +0000 @@ -0,0 +1,37 @@ +commit d862d211b03663ae22149cff65ad71f836fe6f7b +Author: Dan Carpenter +Date: Tue Sep 24 15:27:44 2013 -0700 + + cpqarray: fix info leak in ida_locked_ioctl() + + commit 627aad1c01da6f881e7f98d71fd928ca0c316b1a upstream. + + The pciinfo struct has a two byte hole after ->dev_fn so stack + information could be leaked to the user. + + This was assigned CVE-2013-2147. + + Signed-off-by: Dan Carpenter + Acked-by: Mike Miller + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/block/cpqarray.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/block/cpqarray.c 2014-04-27 23:39:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/block/cpqarray.c 2014-04-28 00:37:47.000000000 +0000 +@@ -1193,6 +1193,7 @@ + ida_pci_info_struct pciinfo; + + if (!arg) return -EINVAL; ++ memset(&pciinfo, 0, sizeof(pciinfo)); + pciinfo.bus = host->pci_dev->bus->number; + pciinfo.dev_fn = host->pci_dev->devfn; + pciinfo.board_id = host->board_id; +Index: linux-3.10-3.10.11/dummy/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1262_d862d211b03663ae22149cff65ad71f836fe6f7b.txt 2014-04-28 00:37:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.patch 2014-04-28 00:37:48.000000000 +0000 @@ -0,0 +1,38 @@ +commit 698508f44ad8d2f4289f8fae4488576f2902703a +Author: Dan Carpenter +Date: Tue Sep 24 15:27:45 2013 -0700 + + cciss: fix info leak in cciss_ioctl32_passthru() + + commit 58f09e00ae095e46ef9edfcf3a5fd9ccdfad065e upstream. + + The arg64 struct has a hole after ->buf_size which isn't cleared. Or if + any of the calls to copy_from_user() fail then that would cause an + information leak as well. + + This was assigned CVE-2013-2147. + + Signed-off-by: Dan Carpenter + Acked-by: Mike Miller + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/block/cciss.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/block/cciss.c 2014-04-27 23:39:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/block/cciss.c 2014-04-28 00:37:48.000000000 +0000 +@@ -1189,6 +1189,7 @@ + int err; + u32 cp; + ++ memset(&arg64, 0, sizeof(arg64)); + err = 0; + err |= + copy_from_user(&arg64.LUN_info, &arg32->LUN_info, +Index: linux-3.10-3.10.11/dummy/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1263_698508f44ad8d2f4289f8fae4488576f2902703a.txt 2014-04-28 00:37:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.patch 2014-04-28 00:37:49.000000000 +0000 @@ -0,0 +1,251 @@ +commit b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7 +Author: Jiri Kosina +Date: Wed Jul 10 19:56:27 2013 +0200 + + HID: fix data access in implement() + + commit 27ce405039bfe6d3f4143415c638f56a3df77dca upstream. + + implement() is setting bytes in LE data stream. In case the data is not + aligned to 64bits, it reads past the allocated buffer. It doesn't really + change any value there (it's properly bitmasked), but in case that this + read past the boundary hits a page boundary, pagefault happens when + accessing 64bits of 'x' in implement(), and kernel oopses. + + This happens much more often when numbered reports are in use, as the + initial 8bit skip in the buffer makes the whole process work on values + which are not aligned to 64bits. + + This problem dates back to attempts in 2005 and 2006 to make implement() + and extract() as generic as possible, and even back then the problem + was realized by Adam Kroperlin, but falsely assumed to be impossible + to cause any harm: + + http://www.mail-archive.com/linux-usb-devel@lists.sourceforge.net/msg47690.html + + I have made several attempts at fixing it "on the spot" directly in + implement(), but the results were horrible; the special casing for processing + last 64bit chunk and switching to different math makes it unreadable mess. + + I therefore took a path to allocate a few bytes more which will never make + it into final report, but are there as a cushion for all the 64bit math + operations happening in implement() and extract(). + + All callers of hid_output_report() are converted at the same time to allocate + the buffer by newly introduced hid_alloc_report_buf() helper. + + Bruno noticed that the whole raw_size test can be dropped as well, as + hid_alloc_report_buf() makes sure that the buffer is always of a proper + size. + + Reviewed-by: Benjamin Tissoires + Acked-by: Gustavo Padovan + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-28 00:36:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:37:48.000000000 +0000 +@@ -1188,7 +1188,8 @@ + } + + /* +- * Create a report. ++ * Create a report. 'data' has to be allocated using ++ * hid_alloc_report_buf() so that it has proper size. + */ + + void hid_output_report(struct hid_report *report, __u8 *data) +@@ -1205,6 +1206,22 @@ + EXPORT_SYMBOL_GPL(hid_output_report); + + /* ++ * Allocator for buffer that is going to be passed to hid_output_report() ++ */ ++u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags) ++{ ++ /* ++ * 7 extra bytes are necessary to achieve proper functionality ++ * of implement() working on 8 byte chunks ++ */ ++ ++ int len = ((report->size - 1) >> 3) + 1 + (report->id > 0) + 7; ++ ++ return kmalloc(len, flags); ++} ++EXPORT_SYMBOL_GPL(hid_alloc_report_buf); ++ ++/* + * Set a field value. The report this field belongs to has to be + * created and transferred to the device, to set this value in the + * device. +Index: linux-3.10-3.10.11/drivers/hid/hid-logitech-dj.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-logitech-dj.c 2014-04-28 00:36:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-logitech-dj.c 2014-04-28 00:37:48.000000000 +0000 +@@ -574,7 +574,7 @@ + + struct hid_field *field; + struct hid_report *report; +- unsigned char data[8]; ++ unsigned char *data; + int offset; + + dbg_hid("%s: %s, type:%d | code:%d | value:%d\n", +@@ -590,6 +590,13 @@ + return -1; + } + hid_set_field(field, offset, value); ++ ++ data = hid_alloc_report_buf(field->report, GFP_KERNEL); ++ if (!data) { ++ dev_warn(&dev->dev, "failed to allocate report buf memory\n"); ++ return -1; ++ } ++ + hid_output_report(field->report, &data[0]); + + output_report_enum = &dj_rcv_hiddev->report_enum[HID_OUTPUT_REPORT]; +@@ -600,8 +607,9 @@ + + hid_hw_request(dj_rcv_hiddev, report, HID_REQ_SET_REPORT); + +- return 0; ++ kfree(data); + ++ return 0; + } + + static int logi_dj_ll_start(struct hid_device *hid) +Index: linux-3.10-3.10.11/drivers/hid/hid-picolcd_debugfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-picolcd_debugfs.c 2014-04-27 23:39:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-picolcd_debugfs.c 2014-04-28 00:37:48.000000000 +0000 +@@ -394,7 +394,7 @@ + void picolcd_debug_out_report(struct picolcd_data *data, + struct hid_device *hdev, struct hid_report *report) + { +- u8 raw_data[70]; ++ u8 *raw_data; + int raw_size = (report->size >> 3) + 1; + char *buff; + #define BUFF_SZ 256 +@@ -407,20 +407,20 @@ + if (!buff) + return; + +- snprintf(buff, BUFF_SZ, "\nout report %d (size %d) = ", +- report->id, raw_size); +- hid_debug_event(hdev, buff); +- if (raw_size + 5 > sizeof(raw_data)) { ++ raw_data = hid_alloc_report_buf(report, GFP_ATOMIC); ++ if (!raw_data) { + kfree(buff); +- hid_debug_event(hdev, " TOO BIG\n"); + return; +- } else { +- raw_data[0] = report->id; +- hid_output_report(report, raw_data); +- dump_buff_as_hex(buff, BUFF_SZ, raw_data, raw_size); +- hid_debug_event(hdev, buff); + } + ++ snprintf(buff, BUFF_SZ, "\nout report %d (size %d) = ", ++ report->id, raw_size); ++ hid_debug_event(hdev, buff); ++ raw_data[0] = report->id; ++ hid_output_report(report, raw_data); ++ dump_buff_as_hex(buff, BUFF_SZ, raw_data, raw_size); ++ hid_debug_event(hdev, buff); ++ + switch (report->id) { + case REPORT_LED_STATE: + /* 1 data byte with GPO state */ +@@ -644,6 +644,7 @@ + break; + } + wake_up_interruptible(&hdev->debug_wait); ++ kfree(raw_data); + kfree(buff); + } + +Index: linux-3.10-3.10.11/drivers/hid/usbhid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/usbhid/hid-core.c 2014-04-27 23:39:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/usbhid/hid-core.c 2014-04-28 00:37:48.000000000 +0000 +@@ -535,7 +535,6 @@ + { + int head; + struct usbhid_device *usbhid = hid->driver_data; +- int len = ((report->size - 1) >> 3) + 1 + (report->id > 0); + + if ((hid->quirks & HID_QUIRK_NOGET) && dir == USB_DIR_IN) + return; +@@ -546,7 +545,7 @@ + return; + } + +- usbhid->out[usbhid->outhead].raw_report = kmalloc(len, GFP_ATOMIC); ++ usbhid->out[usbhid->outhead].raw_report = hid_alloc_report_buf(report, GFP_ATOMIC); + if (!usbhid->out[usbhid->outhead].raw_report) { + hid_warn(hid, "output queueing failed\n"); + return; +@@ -595,7 +594,7 @@ + } + + if (dir == USB_DIR_OUT) { +- usbhid->ctrl[usbhid->ctrlhead].raw_report = kmalloc(len, GFP_ATOMIC); ++ usbhid->ctrl[usbhid->ctrlhead].raw_report = hid_alloc_report_buf(report, GFP_ATOMIC); + if (!usbhid->ctrl[usbhid->ctrlhead].raw_report) { + hid_warn(hid, "control queueing failed\n"); + return; +Index: linux-3.10-3.10.11/include/linux/hid.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/hid.h 2014-04-28 00:36:24.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/hid.h 2014-04-28 00:37:48.000000000 +0000 +@@ -746,6 +746,7 @@ + unsigned int hidinput_count_leds(struct hid_device *hid); + __s32 hidinput_calc_abs_res(const struct hid_field *field, __u16 code); + void hid_output_report(struct hid_report *report, __u8 *data); ++u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags); + struct hid_device *hid_allocate_device(void); + struct hid_report *hid_register_report(struct hid_device *device, unsigned type, unsigned id); + int hid_parse_report(struct hid_device *hid, __u8 *start, unsigned size); +Index: linux-3.10-3.10.11/net/bluetooth/hidp/core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hidp/core.c 2014-04-27 23:39:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hidp/core.c 2014-04-28 00:37:48.000000000 +0000 +@@ -231,17 +231,21 @@ + + static int hidp_send_report(struct hidp_session *session, struct hid_report *report) + { +- unsigned char buf[32], hdr; +- int rsize; ++ unsigned char hdr; ++ u8 *buf; ++ int rsize, ret; + +- rsize = ((report->size - 1) >> 3) + 1 + (report->id > 0); +- if (rsize > sizeof(buf)) ++ buf = hid_alloc_report_buf(report, GFP_ATOMIC); ++ if (!buf) + return -EIO; + + hid_output_report(report, buf); + hdr = HIDP_TRANS_DATA | HIDP_DATA_RTYPE_OUPUT; + +- return hidp_send_intr_message(session, hdr, buf, rsize); ++ ret = hidp_send_intr_message(session, hdr, buf, rsize); ++ ++ kfree(buf); ++ return ret; + } + + static int hidp_get_raw_report(struct hid_device *hid, +Index: linux-3.10-3.10.11/dummy/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1264_b2b6cadad699d44a8a5b2a60f3d960e00d6fb3b7.txt 2014-04-28 00:37:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.patch 2014-04-28 00:37:50.000000000 +0000 @@ -0,0 +1,33 @@ +commit 88e2194c2aa9f29f80b2835295e298147c06f6e2 +Author: Jiri Kosina +Date: Mon Jul 22 17:11:44 2013 +0200 + + HID: fix unused rsize usage + + commit bc197eedef1ae082ec662c64c3f4aa302821fb7a upstream. + + 27ce4050 ("HID: fix data access in implement()") by mistake removed + a setting of buffer size in hidp. Fix that by putting it back. + + Reported-by: kbuild test robot + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bluetooth/hidp/core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hidp/core.c 2014-04-28 00:37:48.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hidp/core.c 2014-04-28 00:37:50.000000000 +0000 +@@ -242,6 +242,7 @@ + hid_output_report(report, buf); + hdr = HIDP_TRANS_DATA | HIDP_DATA_RTYPE_OUPUT; + ++ rsize = ((report->size - 1) >> 3) + 1 + (report->id > 0); + ret = hidp_send_intr_message(session, hdr, buf, rsize); + + kfree(buf); +Index: linux-3.10-3.10.11/dummy/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1265_88e2194c2aa9f29f80b2835295e298147c06f6e2.txt 2014-04-28 00:37:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.patch 2014-04-28 00:37:51.000000000 +0000 @@ -0,0 +1,39 @@ +commit a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd +Author: Dave Jones +Date: Thu Sep 5 00:11:19 2013 -0400 + + caif: Add missing braces to multiline if in cfctrl_linkup_request + + [ Upstream commit 0c1db731bfcf3a9fd6c58132134f8b0f423552f0 ] + + The indentation here implies this was meant to be a multi-line if. + + Introduced several years back in commit c85c2951d4da1236e32f1858db418221e624aba5 + ("caif: Handle dev_queue_xmit errors.") + + Signed-off-by: Dave Jones + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/caif/cfctrl.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/caif/cfctrl.c 2014-04-27 23:39:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/caif/cfctrl.c 2014-04-28 00:37:50.000000000 +0000 +@@ -293,9 +293,10 @@ + + count = cfctrl_cancel_req(&cfctrl->serv.layer, + user_layer); +- if (count != 1) ++ if (count != 1) { + pr_err("Could not remove request (%d)", count); + return -ENODEV; ++ } + } + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1266_a505becfe50ff2e1ba34e197f51eb18eb8e9dfbd.txt 2014-04-28 00:37:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.patch --- linux-3.10.11/debian/patches/rpi/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.patch 2014-04-28 00:37:51.000000000 +0000 @@ -0,0 +1,36 @@ +commit a4ae4c6176a7c878018adf470a47c1fae9090978 +Author: Dave Jones +Date: Thu Sep 5 13:43:34 2013 -0400 + + tcp: Add missing braces to do_tcp_setsockopt + + [ Upstream commit e2e5c4c07caf810d7849658dca42f598b3938e21 ] + + Signed-off-by: Dave Jones + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp.c 2014-04-28 00:34:20.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp.c 2014-04-28 00:37:51.000000000 +0000 +@@ -2447,10 +2447,11 @@ + case TCP_THIN_DUPACK: + if (val < 0 || val > 1) + err = -EINVAL; +- else ++ else { + tp->thin_dupack = val; + if (tp->thin_dupack) + tcp_disable_early_retrans(tp); ++ } + break; + + case TCP_REPAIR: +Index: linux-3.10-3.10.11/dummy/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1267_a4ae4c6176a7c878018adf470a47c1fae9090978.txt 2014-04-28 00:37:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.patch 2014-04-28 00:37:52.000000000 +0000 @@ -0,0 +1,43 @@ +commit 711b8c96842e7e93b01caad6403488498d5cecfa +Author: Jiri Pirko +Date: Fri Sep 6 16:02:25 2013 +0200 + + ipv6/exthdrs: accept tlv which includes only padding + + [ Upstream commit 8112b1fe071be01a28a774ed55909e6f4b29712d ] + + In rfc4942 and rfc2460 I cannot find anything which would implicate to + drop packets which have only padding in tlv. + + Current behaviour breaks TAHI Test v6LC.1.2.6. + + Problem was intruduced in: + 9b905fe6843 "ipv6/exthdrs: strict Pad1 and PadN check" + + Signed-off-by: Jiri Pirko + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/exthdrs.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/exthdrs.c 2014-04-27 23:39:02.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/exthdrs.c 2014-04-28 00:37:52.000000000 +0000 +@@ -162,12 +162,6 @@ + off += optlen; + len -= optlen; + } +- /* This case will not be caught by above check since its padding +- * length is smaller than 7: +- * 1 byte NH + 1 byte Length + 6 bytes Padding +- */ +- if ((padlen == 6) && ((off - skb_network_header_len(skb)) == 8)) +- goto bad; + + if (len == 0) + return true; +Index: linux-3.10-3.10.11/dummy/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1268_711b8c96842e7e93b01caad6403488498d5cecfa.txt 2014-04-28 00:37:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.patch 2014-04-28 00:37:53.000000000 +0000 @@ -0,0 +1,60 @@ +commit 45d268c6b87c0c80fda9960a8b850ee0e82b71dc +Author: Daniel Borkmann +Date: Sat Sep 7 15:13:20 2013 +0200 + + net: fib: fib6_add: fix potential NULL pointer dereference + + [ Upstream commit ae7b4e1f213aa659aedf9c6ecad0bf5f0476e1e2 ] + + When the kernel is compiled with CONFIG_IPV6_SUBTREES, and we return + with an error in fn = fib6_add_1(), then error codes are encoded into + the return pointer e.g. ERR_PTR(-ENOENT). In such an error case, we + write the error code into err and jump to out, hence enter the if(err) + condition. Now, if CONFIG_IPV6_SUBTREES is enabled, we check for: + + if (pn != fn && pn->leaf == rt) + ... + if (pn != fn && !pn->leaf && !(pn->fn_flags & RTN_RTINFO)) + ... + + Since pn is NULL and fn is f.e. ERR_PTR(-ENOENT), then pn != fn + evaluates to true and causes a NULL-pointer dereference on further + checks on pn. Fix it, by setting both NULL in error case, so that + pn != fn already evaluates to false and no further dereference + takes place. + + This was first correctly implemented in 4a287eba2 ("IPv6 routing, + NLM_F_* flag support: REPLACE and EXCL flags support, warn about + missing CREATE flag"), but the bug got later on introduced by + 188c517a0 ("ipv6: return errno pointers consistently for fib6_add_1()"). + + Signed-off-by: Daniel Borkmann + Cc: Lin Ming + Cc: Matti Vaittinen + Cc: Hannes Frederic Sowa + Acked-by: Hannes Frederic Sowa + Acked-by: Matti Vaittinen + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_fib.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_fib.c 2014-04-28 00:34:11.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_fib.c 2014-04-28 00:37:53.000000000 +0000 +@@ -825,9 +825,9 @@ + fn = fib6_add_1(root, &rt->rt6i_dst.addr, sizeof(struct in6_addr), + rt->rt6i_dst.plen, offsetof(struct rt6_info, rt6i_dst), + allow_create, replace_required); +- + if (IS_ERR(fn)) { + err = PTR_ERR(fn); ++ fn = NULL; + goto out; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1269_45d268c6b87c0c80fda9960a8b850ee0e82b71dc.txt 2014-04-28 00:37:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.patch 2014-04-28 00:37:54.000000000 +0000 @@ -0,0 +1,49 @@ +commit 8b1ada497191ab2be429c74817a8de63f9aa2bf6 +Author: Daniel Borkmann +Date: Sat Sep 7 16:44:59 2013 +0200 + + net: sctp: fix bug in sctp_poll for SOCK_SELECT_ERR_QUEUE + + [ Upstream commit a0fb05d1aef0f5df936f80b726d1b3bfd4275f95 ] + + If we do not add braces around ... + + mask |= POLLERR | + sock_flag(sk, SOCK_SELECT_ERR_QUEUE) ? POLLPRI : 0; + + ... then this condition always evaluates to true as POLLERR is + defined as 8 and binary or'd with whatever result comes out of + sock_flag(). Hence instead of (X | Y) ? A : B, transform it into + X | (Y ? A : B). Unfortunatelty, commit 8facd5fb73 ("net: fix + smatch warnings inside datagram_poll") forgot about SCTP. :-( + + Introduced by 7d4c04fc170 ("net: add option to enable error queue + packets waking select"). + + Signed-off-by: Daniel Borkmann + Cc: Jacob Keller + Acked-by: Neil Horman + Acked-by: Vlad Yasevich + Acked-by: Jacob Keller + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/socket.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/socket.c 2014-04-27 23:39:01.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/socket.c 2014-04-28 00:37:53.000000000 +0000 +@@ -6193,7 +6193,7 @@ + /* Is there any exceptional events? */ + if (sk->sk_err || !skb_queue_empty(&sk->sk_error_queue)) + mask |= POLLERR | +- sock_flag(sk, SOCK_SELECT_ERR_QUEUE) ? POLLPRI : 0; ++ (sock_flag(sk, SOCK_SELECT_ERR_QUEUE) ? POLLPRI : 0); + if (sk->sk_shutdown & RCV_SHUTDOWN) + mask |= POLLRDHUP | POLLIN | POLLRDNORM; + if (sk->sk_shutdown == SHUTDOWN_MASK) +Index: linux-3.10-3.10.11/dummy/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1270_8b1ada497191ab2be429c74817a8de63f9aa2bf6.txt 2014-04-28 00:37:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.patch --- linux-3.10.11/debian/patches/rpi/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.patch 2014-04-28 00:37:55.000000000 +0000 @@ -0,0 +1,64 @@ +commit 8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30 +Author: Daniel Borkmann +Date: Sat Sep 7 20:51:21 2013 +0200 + + net: sctp: fix smatch warning in sctp_send_asconf_del_ip + + [ Upstream commit 88362ad8f9a6cea787420b57cc27ccacef000dbe ] + + This was originally reported in [1] and posted by Neil Horman [2], he said: + + Fix up a missed null pointer check in the asconf code. If we don't find + a local address, but we pass in an address length of more than 1, we may + dereference a NULL laddr pointer. Currently this can't happen, as the only + users of the function pass in the value 1 as the addrcnt parameter, but + its not hot path, and it doesn't hurt to check for NULL should that ever + be the case. + + The callpath from sctp_asconf_mgmt() looks okay. But this could be triggered + from sctp_setsockopt_bindx() call with SCTP_BINDX_REM_ADDR and addrcnt > 1 + while passing all possible addresses from the bind list to SCTP_BINDX_REM_ADDR + so that we do *not* find a single address in the association's bind address + list that is not in the packed array of addresses. If this happens when we + have an established association with ASCONF-capable peers, then we could get + a NULL pointer dereference as we only check for laddr == NULL && addrcnt == 1 + and call later sctp_make_asconf_update_ip() with NULL laddr. + + BUT: this actually won't happen as sctp_bindx_rem() will catch such a case + and return with an error earlier. As this is incredably unintuitive and error + prone, add a check to catch at least future bugs here. As Neil says, its not + hot path. Introduced by 8a07eb0a5 ("sctp: Add ASCONF operation on the + single-homed host"). + + [1] http://www.spinics.net/lists/linux-sctp/msg02132.html + [2] http://www.spinics.net/lists/linux-sctp/msg02133.html + + Reported-by: Dan Carpenter + Signed-off-by: Neil Horman + Signed-off-by: Daniel Borkmann + Cc: Michio Honda + Acked-By: Neil Horman + Acked-by: Vlad Yasevich + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/socket.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/socket.c 2014-04-28 00:37:53.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/socket.c 2014-04-28 00:37:54.000000000 +0000 +@@ -820,6 +820,9 @@ + goto skip_mkasconf; + } + ++ if (laddr == NULL) ++ return -EINVAL; ++ + /* We do not need RCU protection throughout this loop + * because this is done under a socket lock from the + * setsockopt call. +Index: linux-3.10-3.10.11/dummy/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1271_8ee62e8c9495a6d0f8d227bbe0f02e1b288bac30.txt 2014-04-28 00:37:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.patch 2014-04-28 00:37:55.000000000 +0000 @@ -0,0 +1,53 @@ +commit b991056a43fef79b2327b084f4296fba698b941b +Author: Eric Dumazet +Date: Sat Sep 7 12:02:57 2013 -0700 + + net: fix multiqueue selection + + [ Upstream commit 50d1784ee4683f073c0362ee360bfae7a3333d6c ] + + commit 416186fbf8c5b4e4465 ("net: Split core bits of netdev_pick_tx + into __netdev_pick_tx") added a bug that disables caching of queue + index in the socket. + + This is the source of packet reorders for TCP flows, and + again this is happening more often when using FQ pacing. + + Old code was doing + + if (queue_index != old_index) + sk_tx_queue_set(sk, queue_index); + + Alexander renamed the variables but forgot to change sk_tx_queue_set() + 2nd parameter. + + if (queue_index != new_index) + sk_tx_queue_set(sk, queue_index); + + This means we store -1 over and over in sk->sk_tx_queue_mapping + + Signed-off-by: Eric Dumazet + Cc: Alexander Duyck + Acked-by: Alexander Duyck + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/flow_dissector.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/flow_dissector.c 2014-04-28 00:34:32.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/flow_dissector.c 2014-04-28 00:37:55.000000000 +0000 +@@ -347,7 +347,7 @@ + + if (queue_index != new_index && sk && + rcu_access_pointer(sk->sk_dst_cache)) +- sk_tx_queue_set(sk, queue_index); ++ sk_tx_queue_set(sk, new_index); + + queue_index = new_index; + } +Index: linux-3.10-3.10.11/dummy/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1272_b991056a43fef79b2327b084f4296fba698b941b.txt 2014-04-28 00:37:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.patch --- linux-3.10.11/debian/patches/rpi/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.patch 2014-04-28 00:37:56.000000000 +0000 @@ -0,0 +1,45 @@ +commit 98913d0758e27087bbd47db734ff96521b180389 +Author: Eric Dumazet +Date: Thu Sep 26 08:44:06 2013 -0700 + + net: flow_dissector: fix thoff for IPPROTO_AH + + [ Upstream commit b86783587b3d1d552326d955acee37eac48800f1 ] + + In commit 8ed781668dd49 ("flow_keys: include thoff into flow_keys for + later usage"), we missed that existing code was using nhoff as a + temporary variable that could not always contain transport header + offset. + + This is not a problem for TCP/UDP because port offset (@poff) + is 0 for these protocols. + + Signed-off-by: Eric Dumazet + Cc: Daniel Borkmann + Cc: Nikolay Aleksandrov + Acked-by: Nikolay Aleksandrov + Acked-by: Daniel Borkmann + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/flow_dissector.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/flow_dissector.c 2014-04-28 00:37:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/flow_dissector.c 2014-04-28 00:37:56.000000000 +0000 +@@ -149,8 +149,8 @@ + if (poff >= 0) { + __be32 *ports, _ports; + +- nhoff += poff; +- ports = skb_header_pointer(skb, nhoff, sizeof(_ports), &_ports); ++ ports = skb_header_pointer(skb, nhoff + poff, ++ sizeof(_ports), &_ports); + if (ports) + flow->ports = *ports; + } +Index: linux-3.10-3.10.11/dummy/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1273_98913d0758e27087bbd47db734ff96521b180389.txt 2014-04-28 00:37:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.patch 2014-04-28 00:37:57.000000000 +0000 @@ -0,0 +1,40 @@ +commit 5f584fec559756fd82796c2f7db58b10a3e479b1 +Author: Vimalkumar +Date: Tue Sep 10 17:36:37 2013 -0700 + + net_sched: htb: fix a typo in htb_change_class() + + [ Upstream commit f3ad857e3da1abaea780dc892b592cd86c541c52 ] + + Fix a typo added in commit 56b765b79 ("htb: improved accuracy at high + rates") + + cbuffer should not be a copy of buffer. + + Signed-off-by: Vimalkumar + Signed-off-by: Eric Dumazet + Cc: Jesper Dangaard Brouer + Cc: Jiri Pirko + Reviewed-by: Jiri Pirko + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sched/sch_htb.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sched/sch_htb.c 2014-04-28 00:34:23.000000000 +0000 ++++ linux-3.10-3.10.11/net/sched/sch_htb.c 2014-04-28 00:37:56.000000000 +0000 +@@ -1476,7 +1476,7 @@ + psched_ratecfg_precompute(&cl->ceil, &hopt->ceil); + + cl->buffer = PSCHED_TICKS2NS(hopt->buffer); +- cl->cbuffer = PSCHED_TICKS2NS(hopt->buffer); ++ cl->cbuffer = PSCHED_TICKS2NS(hopt->cbuffer); + + sch_tree_unlock(sch); + +Index: linux-3.10-3.10.11/dummy/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1274_5f584fec559756fd82796c2f7db58b10a3e479b1.txt 2014-04-28 00:37:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.patch --- linux-3.10.11/debian/patches/rpi/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.patch 2014-04-28 00:37:58.000000000 +0000 @@ -0,0 +1,39 @@ +commit 9fdd73559c439ba7216bce159a78e44328c3a573 +Author: Francois Romieu +Date: Sun Sep 8 01:15:35 2013 +0200 + + r8169: enforce RX_MULTI_EN for the 8168f. + + [ Upstream commit 3ced8c955e74d319f3e3997f7169c79d524dfd06 ] + + Same narrative as eb2dc35d99028b698cdedba4f5522bc43e576bd2 ("r8169: RxConfig + hack for the 8168evl.") regarding AMD IOMMU errors. + + RTL_GIGA_MAC_VER_36 - 8168f as well - has not been reported to behave the + same. + + Tested-by: David R + Tested-by: Frédéric Leroy + Cc: Hayes Wang + Signed-off-by: Francois Romieu + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/realtek/r8169.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/realtek/r8169.c 2014-04-27 23:39:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/realtek/r8169.c 2014-04-28 00:37:57.000000000 +0000 +@@ -4218,6 +4218,7 @@ + case RTL_GIGA_MAC_VER_23: + case RTL_GIGA_MAC_VER_24: + case RTL_GIGA_MAC_VER_34: ++ case RTL_GIGA_MAC_VER_35: + RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST); + break; + case RTL_GIGA_MAC_VER_40: +Index: linux-3.10-3.10.11/dummy/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1275_9fdd73559c439ba7216bce159a78e44328c3a573.txt 2014-04-28 00:37:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.patch 2014-04-28 00:37:59.000000000 +0000 @@ -0,0 +1,36 @@ +commit 0885f6b8bb0403a56546d302e749c1defe47339d +Author: Sonic Zhang +Date: Wed Sep 11 11:31:53 2013 +0800 + + netpoll: Should handle ETH_P_ARP other than ETH_P_IP in netpoll_neigh_reply + + [ Upstream commit b0dd663b60944a3ce86430fa35549fb37968bda0 ] + + The received ARP request type in the Ethernet packet head is ETH_P_ARP other than ETH_P_IP. + + [ Bug introduced by commit b7394d2429c198b1da3d46ac39192e891029ec0f + ("netpoll: prepare for ipv6") ] + + Signed-off-by: Sonic Zhang + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/netpoll.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/netpoll.c 2014-04-27 23:38:59.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/netpoll.c 2014-04-28 00:37:58.000000000 +0000 +@@ -550,7 +550,7 @@ + return; + + proto = ntohs(eth_hdr(skb)->h_proto); +- if (proto == ETH_P_IP) { ++ if (proto == ETH_P_ARP) { + struct arphdr *arp; + unsigned char *arp_ptr; + /* No arp on this interface */ +Index: linux-3.10-3.10.11/dummy/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1276_0885f6b8bb0403a56546d302e749c1defe47339d.txt 2014-04-28 00:37:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.patch --- linux-3.10.11/debian/patches/rpi/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.patch 2014-04-28 00:38:00.000000000 +0000 @@ -0,0 +1,57 @@ +commit e66bdd7106911886aebf118e1c1aebb5a26d0752 +Author: Nikolay Aleksandrov +Date: Thu Sep 19 15:02:35 2013 +0200 + + netpoll: fix NULL pointer dereference in netpoll_cleanup + + [ Upstream commit d0fe8c888b1fd1a2f84b9962cabcb98a70988aec ] + + I've been hitting a NULL ptr deref while using netconsole because the + np->dev check and the pointer manipulation in netpoll_cleanup are done + without rtnl and the following sequence happens when having a netconsole + over a vlan and we remove the vlan while disabling the netconsole: + CPU 1 CPU2 + removes vlan and calls the notifier + enters store_enabled(), calls + netdev_cleanup which checks np->dev + and then waits for rtnl + executes the netconsole netdev + release notifier making np->dev + == NULL and releases rtnl + continues to dereference a member of + np->dev which at this point is == NULL + + Signed-off-by: Nikolay Aleksandrov + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/netpoll.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/netpoll.c 2014-04-28 00:37:58.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/netpoll.c 2014-04-28 00:37:59.000000000 +0000 +@@ -1289,15 +1289,14 @@ + + void netpoll_cleanup(struct netpoll *np) + { +- if (!np->dev) +- return; +- + rtnl_lock(); ++ if (!np->dev) ++ goto out; + __netpoll_cleanup(np); +- rtnl_unlock(); +- + dev_put(np->dev); + np->dev = NULL; ++out: ++ rtnl_unlock(); + } + EXPORT_SYMBOL(netpoll_cleanup); + +Index: linux-3.10-3.10.11/dummy/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1277_e66bdd7106911886aebf118e1c1aebb5a26d0752.txt 2014-04-28 00:37:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.patch 2014-04-28 00:38:00.000000000 +0000 @@ -0,0 +1,63 @@ +commit a81a02460bdf054ca0c60c5aed29941f7134092d +Author: Jason Wang +Date: Wed Sep 11 18:09:48 2013 +0800 + + tuntap: correctly handle error in tun_set_iff() + + [ Upstream commit 662ca437e714caaab855b12415d6ffd815985bc0 ] + + Commit c8d68e6be1c3b242f1c598595830890b65cea64a + (tuntap: multiqueue support) only call free_netdev() on error in + tun_set_iff(). This causes several issues: + + - memory of tun security were leaked + - use after free since the flow gc timer was not deleted and the tfile + were not detached + + This patch solves the above issues. + + Reported-by: Wannes Rombouts + Cc: Michael S. Tsirkin + Signed-off-by: Jason Wang + Acked-by: Michael S. Tsirkin + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/tun.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/tun.c 2014-04-28 00:34:18.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/tun.c 2014-04-28 00:38:00.000000000 +0000 +@@ -1693,11 +1693,11 @@ + INIT_LIST_HEAD(&tun->disabled); + err = tun_attach(tun, file); + if (err < 0) +- goto err_free_dev; ++ goto err_free_flow; + + err = register_netdevice(tun->dev); + if (err < 0) +- goto err_free_dev; ++ goto err_detach; + + if (device_create_file(&tun->dev->dev, &dev_attr_tun_flags) || + device_create_file(&tun->dev->dev, &dev_attr_owner) || +@@ -1741,7 +1741,12 @@ + strcpy(ifr->ifr_name, tun->dev->name); + return 0; + +- err_free_dev: ++err_detach: ++ tun_detach_all(dev); ++err_free_flow: ++ tun_flow_uninit(tun); ++ security_tun_dev_free_security(tun->security); ++err_free_dev: + free_netdev(dev); + return err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1278_a81a02460bdf054ca0c60c5aed29941f7134092d.txt 2014-04-28 00:38:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.patch 2014-04-28 00:38:01.000000000 +0000 @@ -0,0 +1,195 @@ +commit 872b11be53a4594c39262433c4176176fcb12bd2 +Author: Daniel Borkmann +Date: Wed Sep 11 16:58:36 2013 +0200 + + net: sctp: fix ipv6 ipsec encryption bug in sctp_v6_xmit + + [ Upstream commit 95ee62083cb6453e056562d91f597552021e6ae7 ] + + Alan Chester reported an issue with IPv6 on SCTP that IPsec traffic is not + being encrypted, whereas on IPv4 it is. Setting up an AH + ESP transport + does not seem to have the desired effect: + + SCTP + IPv4: + + 22:14:20.809645 IP (tos 0x2,ECT(0), ttl 64, id 0, offset 0, flags [DF], proto AH (51), length 116) + 192.168.0.2 > 192.168.0.5: AH(spi=0x00000042,sumlen=16,seq=0x1): ESP(spi=0x00000044,seq=0x1), length 72 + 22:14:20.813270 IP (tos 0x2,ECT(0), ttl 64, id 0, offset 0, flags [DF], proto AH (51), length 340) + 192.168.0.5 > 192.168.0.2: AH(spi=0x00000043,sumlen=16,seq=0x1): + + SCTP + IPv6: + + 22:31:19.215029 IP6 (class 0x02, hlim 64, next-header SCTP (132) payload length: 364) + fe80::222:15ff:fe87:7fc.3333 > fe80::92e6:baff:fe0d:5a54.36767: sctp + 1) [INIT ACK] [init tag: 747759530] [rwnd: 62464] [OS: 10] [MIS: 10] + + Moreover, Alan says: + + This problem was seen with both Racoon and Racoon2. Other people have seen + this with OpenSwan. When IPsec is configured to encrypt all upper layer + protocols the SCTP connection does not initialize. After using Wireshark to + follow packets, this is because the SCTP packet leaves Box A unencrypted and + Box B believes all upper layer protocols are to be encrypted so it drops + this packet, causing the SCTP connection to fail to initialize. When IPsec + is configured to encrypt just SCTP, the SCTP packets are observed unencrypted. + + In fact, using `socat sctp6-listen:3333 -` on one end and transferring "plaintext" + string on the other end, results in cleartext on the wire where SCTP eventually + does not report any errors, thus in the latter case that Alan reports, the + non-paranoid user might think he's communicating over an encrypted transport on + SCTP although he's not (tcpdump ... -X): + + ... + 0x0030: 5d70 8e1a 0003 001a 177d eb6c 0000 0000 ]p.......}.l.... + 0x0040: 0000 0000 706c 6169 6e74 6578 740a 0000 ....plaintext... + + Only in /proc/net/xfrm_stat we can see XfrmInTmplMismatch increasing on the + receiver side. Initial follow-up analysis from Alan's bug report was done by + Alexey Dobriyan. Also thanks to Vlad Yasevich for feedback on this. + + SCTP has its own implementation of sctp_v6_xmit() not calling inet6_csk_xmit(). + This has the implication that it probably never really got updated along with + changes in inet6_csk_xmit() and therefore does not seem to invoke xfrm handlers. + + SCTP's IPv4 xmit however, properly calls ip_queue_xmit() to do the work. Since + a call to inet6_csk_xmit() would solve this problem, but result in unecessary + route lookups, let us just use the cached flowi6 instead that we got through + sctp_v6_get_dst(). Since all SCTP packets are being sent through sctp_packet_transmit(), + we do the route lookup / flow caching in sctp_transport_route(), hold it in + tp->dst and skb_dst_set() right after that. If we would alter fl6->daddr in + sctp_v6_xmit() to np->opt->srcrt, we possibly could run into the same effect + of not having xfrm layer pick it up, hence, use fl6_update_dst() in sctp_v6_get_dst() + instead to get the correct source routed dst entry, which we assign to the skb. + + Also source address routing example from 625034113 ("sctp: fix sctp to work with + ipv6 source address routing") still works with this patch! Nevertheless, in RFC5095 + it is actually 'recommended' to not use that anyway due to traffic amplification [1]. + So it seems we're not supposed to do that anyway in sctp_v6_xmit(). Moreover, if + we overwrite the flow destination here, the lower IPv6 layer will be unable to + put the correct destination address into IP header, as routing header is added in + ipv6_push_nfrag_opts() but then probably with wrong final destination. Things aside, + result of this patch is that we do not have any XfrmInTmplMismatch increase plus on + the wire with this patch it now looks like: + + SCTP + IPv6: + + 08:17:47.074080 IP6 2620:52:0:102f:7a2b:cbff:fe27:1b0a > 2620:52:0:102f:213:72ff:fe32:7eba: + AH(spi=0x00005fb4,seq=0x1): ESP(spi=0x00005fb5,seq=0x1), length 72 + 08:17:47.074264 IP6 2620:52:0:102f:213:72ff:fe32:7eba > 2620:52:0:102f:7a2b:cbff:fe27:1b0a: + AH(spi=0x00003d54,seq=0x1): ESP(spi=0x00003d55,seq=0x1), length 296 + + This fixes Kernel Bugzilla 24412. This security issue seems to be present since + 2.6.18 kernels. Lets just hope some big passive adversary in the wild didn't have + its fun with that. lksctp-tools IPv6 regression test suite passes as well with + this patch. + + [1] http://www.secdev.org/conf/IPv6_RH_security-csw07.pdf + + Reported-by: Alan Chester + Reported-by: Alexey Dobriyan + Signed-off-by: Daniel Borkmann + Cc: Steffen Klassert + Cc: Hannes Frederic Sowa + Acked-by: Vlad Yasevich + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/ipv6.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/ipv6.c 2014-04-27 23:38:58.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/ipv6.c 2014-04-28 00:38:01.000000000 +0000 +@@ -210,45 +210,24 @@ + in6_dev_put(idev); + } + +-/* Based on tcp_v6_xmit() in tcp_ipv6.c. */ + static int sctp_v6_xmit(struct sk_buff *skb, struct sctp_transport *transport) + { + struct sock *sk = skb->sk; + struct ipv6_pinfo *np = inet6_sk(sk); +- struct flowi6 fl6; +- +- memset(&fl6, 0, sizeof(fl6)); +- +- fl6.flowi6_proto = sk->sk_protocol; +- +- /* Fill in the dest address from the route entry passed with the skb +- * and the source address from the transport. +- */ +- fl6.daddr = transport->ipaddr.v6.sin6_addr; +- fl6.saddr = transport->saddr.v6.sin6_addr; +- +- fl6.flowlabel = np->flow_label; +- IP6_ECN_flow_xmit(sk, fl6.flowlabel); +- if (ipv6_addr_type(&fl6.saddr) & IPV6_ADDR_LINKLOCAL) +- fl6.flowi6_oif = transport->saddr.v6.sin6_scope_id; +- else +- fl6.flowi6_oif = sk->sk_bound_dev_if; +- +- if (np->opt && np->opt->srcrt) { +- struct rt0_hdr *rt0 = (struct rt0_hdr *) np->opt->srcrt; +- fl6.daddr = *rt0->addr; +- } ++ struct flowi6 *fl6 = &transport->fl.u.ip6; + + SCTP_DEBUG_PRINTK("%s: skb:%p, len:%d, src:%pI6 dst:%pI6\n", + __func__, skb, skb->len, +- &fl6.saddr, &fl6.daddr); ++ &fl6->saddr, &fl6->daddr); + +- SCTP_INC_STATS(sock_net(sk), SCTP_MIB_OUTSCTPPACKS); ++ IP6_ECN_flow_xmit(sk, fl6->flowlabel); + + if (!(transport->param_flags & SPP_PMTUD_ENABLE)) + skb->local_df = 1; + +- return ip6_xmit(sk, skb, &fl6, np->opt, np->tclass); ++ SCTP_INC_STATS(sock_net(sk), SCTP_MIB_OUTSCTPPACKS); ++ ++ return ip6_xmit(sk, skb, fl6, np->opt, np->tclass); + } + + /* Returns the dst cache entry for the given source and destination ip +@@ -261,10 +240,12 @@ + struct dst_entry *dst = NULL; + struct flowi6 *fl6 = &fl->u.ip6; + struct sctp_bind_addr *bp; ++ struct ipv6_pinfo *np = inet6_sk(sk); + struct sctp_sockaddr_entry *laddr; + union sctp_addr *baddr = NULL; + union sctp_addr *daddr = &t->ipaddr; + union sctp_addr dst_saddr; ++ struct in6_addr *final_p, final; + __u8 matchlen = 0; + __u8 bmatchlen; + sctp_scope_t scope; +@@ -287,7 +268,8 @@ + SCTP_DEBUG_PRINTK("SRC=%pI6 - ", &fl6->saddr); + } + +- dst = ip6_dst_lookup_flow(sk, fl6, NULL, false); ++ final_p = fl6_update_dst(fl6, np->opt, &final); ++ dst = ip6_dst_lookup_flow(sk, fl6, final_p, false); + if (!asoc || saddr) + goto out; + +@@ -339,10 +321,12 @@ + } + } + rcu_read_unlock(); ++ + if (baddr) { + fl6->saddr = baddr->v6.sin6_addr; + fl6->fl6_sport = baddr->v6.sin6_port; +- dst = ip6_dst_lookup_flow(sk, fl6, NULL, false); ++ final_p = fl6_update_dst(fl6, np->opt, &final); ++ dst = ip6_dst_lookup_flow(sk, fl6, final_p, false); + } + + out: +Index: linux-3.10-3.10.11/dummy/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1279_872b11be53a4594c39262433c4176176fcb12bd2.txt 2014-04-28 00:38:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.patch --- linux-3.10.11/debian/patches/rpi/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.patch 2014-04-28 00:38:02.000000000 +0000 @@ -0,0 +1,179 @@ +commit 0ff773f59ff375c42af2238457bda98ed4ddcd25 +Author: David Vrabel +Date: Wed Sep 11 14:52:48 2013 +0100 + + xen-netback: count number required slots for an skb more carefully + + [ Upstream commit 6e43fc04a6bc357d260583b8440882f28069207f ] + + When a VM is providing an iSCSI target and the LUN is used by the + backend domain, the generated skbs for direct I/O writes to the disk + have large, multi-page skb->data but no frags. + + With some lengths and starting offsets, xen_netbk_count_skb_slots() + would be one short because the simple calculation of + DIV_ROUND_UP(skb_headlen(), PAGE_SIZE) was not accounting for the + decisions made by start_new_rx_buffer() which does not guarantee + responses are fully packed. + + For example, a skb with length < 2 pages but which spans 3 pages would + be counted as requiring 2 slots but would actually use 3 slots. + + skb->data: + + | 1111|222222222222|3333 | + + Fully packed, this would need 2 slots: + + |111122222222|22223333 | + + But because the 2nd page wholy fits into a slot it is not split across + slots and goes into a slot of its own: + + |1111 |222222222222|3333 | + + Miscounting the number of slots means netback may push more responses + than the number of available requests. This will cause the frontend + to get very confused and report "Too many frags/slots". The frontend + never recovers and will eventually BUG. + + Fix this by counting the number of required slots more carefully. In + xen_netbk_count_skb_slots(), more closely follow the algorithm used by + xen_netbk_gop_skb() by introducing xen_netbk_count_frag_slots() which + is the dry-run equivalent of netbk_gop_frag_copy(). + + Signed-off-by: David Vrabel + Acked-by: Ian Campbell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/xen-netback/netback.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/xen-netback/netback.c 2014-04-27 23:38:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/xen-netback/netback.c 2014-04-28 00:38:02.000000000 +0000 +@@ -354,6 +354,49 @@ + return false; + } + ++struct xenvif_count_slot_state { ++ unsigned long copy_off; ++ bool head; ++}; ++ ++unsigned int xenvif_count_frag_slots(struct xenvif *vif, ++ unsigned long offset, unsigned long size, ++ struct xenvif_count_slot_state *state) ++{ ++ unsigned count = 0; ++ ++ offset &= ~PAGE_MASK; ++ ++ while (size > 0) { ++ unsigned long bytes; ++ ++ bytes = PAGE_SIZE - offset; ++ ++ if (bytes > size) ++ bytes = size; ++ ++ if (start_new_rx_buffer(state->copy_off, bytes, state->head)) { ++ count++; ++ state->copy_off = 0; ++ } ++ ++ if (state->copy_off + bytes > MAX_BUFFER_OFFSET) ++ bytes = MAX_BUFFER_OFFSET - state->copy_off; ++ ++ state->copy_off += bytes; ++ ++ offset += bytes; ++ size -= bytes; ++ ++ if (offset == PAGE_SIZE) ++ offset = 0; ++ ++ state->head = false; ++ } ++ ++ return count; ++} ++ + /* + * Figure out how many ring slots we're going to need to send @skb to + * the guest. This function is essentially a dry run of +@@ -361,48 +404,39 @@ + */ + unsigned int xen_netbk_count_skb_slots(struct xenvif *vif, struct sk_buff *skb) + { ++ struct xenvif_count_slot_state state; + unsigned int count; +- int i, copy_off; ++ unsigned char *data; ++ unsigned i; + +- count = DIV_ROUND_UP(skb_headlen(skb), PAGE_SIZE); ++ state.head = true; ++ state.copy_off = 0; + +- copy_off = skb_headlen(skb) % PAGE_SIZE; ++ /* Slot for the first (partial) page of data. */ ++ count = 1; + ++ /* Need a slot for the GSO prefix for GSO extra data? */ + if (skb_shinfo(skb)->gso_size) + count++; + +- for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { +- unsigned long size = skb_frag_size(&skb_shinfo(skb)->frags[i]); +- unsigned long offset = skb_shinfo(skb)->frags[i].page_offset; +- unsigned long bytes; +- +- offset &= ~PAGE_MASK; +- +- while (size > 0) { +- BUG_ON(offset >= PAGE_SIZE); +- BUG_ON(copy_off > MAX_BUFFER_OFFSET); ++ data = skb->data; ++ while (data < skb_tail_pointer(skb)) { ++ unsigned long offset = offset_in_page(data); ++ unsigned long size = PAGE_SIZE - offset; + +- bytes = PAGE_SIZE - offset; ++ if (data + size > skb_tail_pointer(skb)) ++ size = skb_tail_pointer(skb) - data; + +- if (bytes > size) +- bytes = size; ++ count += xenvif_count_frag_slots(vif, offset, size, &state); + +- if (start_new_rx_buffer(copy_off, bytes, 0)) { +- count++; +- copy_off = 0; +- } +- +- if (copy_off + bytes > MAX_BUFFER_OFFSET) +- bytes = MAX_BUFFER_OFFSET - copy_off; +- +- copy_off += bytes; ++ data += size; ++ } + +- offset += bytes; +- size -= bytes; ++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ++ unsigned long size = skb_frag_size(&skb_shinfo(skb)->frags[i]); ++ unsigned long offset = skb_shinfo(skb)->frags[i].page_offset; + +- if (offset == PAGE_SIZE) +- offset = 0; +- } ++ count += xenvif_count_frag_slots(vif, offset, size, &state); + } + return count; + } +Index: linux-3.10-3.10.11/dummy/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1280_0ff773f59ff375c42af2238457bda98ed4ddcd25.txt 2014-04-28 00:38:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.patch --- linux-3.10.11/debian/patches/rpi/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.patch 2014-04-28 00:38:03.000000000 +0000 @@ -0,0 +1,41 @@ +commit 10a559a0df3eaa0c3cfbf780f88caf7f85c47106 +Author: Chris Healy +Date: Wed Sep 11 21:37:47 2013 -0700 + + resubmit bridge: fix message_age_timer calculation + + [ Upstream commit 9a0620133ccce9dd35c00a96405c8d80938c2cc0 ] + + This changes the message_age_timer calculation to use the BPDU's max age as + opposed to the local bridge's max age. This is in accordance with section + 8.6.2.3.2 Step 2 of the 802.1D-1998 sprecification. + + With the current implementation, when running with very large bridge + diameters, convergance will not always occur even if a root bridge is + configured to have a longer max age. + + Tested successfully on bridge diameters of ~200. + + Signed-off-by: Chris Healy + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_stp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_stp.c 2014-04-27 23:38:58.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_stp.c 2014-04-28 00:38:02.000000000 +0000 +@@ -209,7 +209,7 @@ + p->designated_age = jiffies - bpdu->message_age; + + mod_timer(&p->message_age_timer, jiffies +- + (p->br->max_age - bpdu->message_age)); ++ + (bpdu->max_age - bpdu->message_age)); + } + + /* called under bridge lock */ +Index: linux-3.10-3.10.11/dummy/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1281_10a559a0df3eaa0c3cfbf780f88caf7f85c47106.txt 2014-04-28 00:38:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.patch --- linux-3.10.11/debian/patches/rpi/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.patch 2014-04-28 00:38:04.000000000 +0000 @@ -0,0 +1,112 @@ +commit dc45b846e96d5a656ddd926334b6496e6916b446 +Author: Herbert Xu +Date: Thu Sep 12 17:12:05 2013 +1000 + + bridge: Clamp forward_delay when enabling STP + + [ Upstream commit be4f154d5ef0ca147ab6bcd38857a774133f5450 ] + + At some point limits were added to forward_delay. However, the + limits are only enforced when STP is enabled. This created a + scenario where you could have a value outside the allowed range + while STP is disabled, which then stuck around even after STP + is enabled. + + This patch fixes this by clamping the value when we enable STP. + + I had to move the locking around a bit to ensure that there is + no window where someone could insert a value outside the range + while we're in the middle of enabling STP. + + Signed-off-by: Herbert Xu + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_private.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_private.h 2014-04-27 23:38:57.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_private.h 2014-04-28 00:38:03.000000000 +0000 +@@ -714,6 +714,7 @@ + extern void br_init_port(struct net_bridge_port *p); + extern void br_become_designated_port(struct net_bridge_port *p); + ++extern void __br_set_forward_delay(struct net_bridge *br, unsigned long t); + extern int br_set_forward_delay(struct net_bridge *br, unsigned long x); + extern int br_set_hello_time(struct net_bridge *br, unsigned long x); + extern int br_set_max_age(struct net_bridge *br, unsigned long x); +Index: linux-3.10-3.10.11/net/bridge/br_stp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_stp.c 2014-04-28 00:38:02.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_stp.c 2014-04-28 00:38:03.000000000 +0000 +@@ -544,18 +544,27 @@ + + } + ++void __br_set_forward_delay(struct net_bridge *br, unsigned long t) ++{ ++ br->bridge_forward_delay = t; ++ if (br_is_root_bridge(br)) ++ br->forward_delay = br->bridge_forward_delay; ++} ++ + int br_set_forward_delay(struct net_bridge *br, unsigned long val) + { + unsigned long t = clock_t_to_jiffies(val); ++ int err = -ERANGE; + ++ spin_lock_bh(&br->lock); + if (br->stp_enabled != BR_NO_STP && + (t < BR_MIN_FORWARD_DELAY || t > BR_MAX_FORWARD_DELAY)) +- return -ERANGE; ++ goto unlock; + +- spin_lock_bh(&br->lock); +- br->bridge_forward_delay = t; +- if (br_is_root_bridge(br)) +- br->forward_delay = br->bridge_forward_delay; ++ __br_set_forward_delay(br, t); ++ err = 0; ++ ++unlock: + spin_unlock_bh(&br->lock); +- return 0; ++ return err; + } +Index: linux-3.10-3.10.11/net/bridge/br_stp_if.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_stp_if.c 2014-04-27 23:38:57.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_stp_if.c 2014-04-28 00:38:03.000000000 +0000 +@@ -129,6 +129,14 @@ + char *envp[] = { NULL }; + + r = call_usermodehelper(BR_STP_PROG, argv, envp, UMH_WAIT_PROC); ++ ++ spin_lock_bh(&br->lock); ++ ++ if (br->bridge_forward_delay < BR_MIN_FORWARD_DELAY) ++ __br_set_forward_delay(br, BR_MIN_FORWARD_DELAY); ++ else if (br->bridge_forward_delay < BR_MAX_FORWARD_DELAY) ++ __br_set_forward_delay(br, BR_MAX_FORWARD_DELAY); ++ + if (r == 0) { + br->stp_enabled = BR_USER_STP; + br_debug(br, "userspace STP started\n"); +@@ -137,10 +145,10 @@ + br_debug(br, "using kernel STP\n"); + + /* To start timers on any ports left in blocking */ +- spin_lock_bh(&br->lock); + br_port_state_selection(br); +- spin_unlock_bh(&br->lock); + } ++ ++ spin_unlock_bh(&br->lock); + } + + static void br_stp_stop(struct net_bridge *br) +Index: linux-3.10-3.10.11/dummy/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1282_dc45b846e96d5a656ddd926334b6496e6916b446.txt 2014-04-28 00:38:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.patch --- linux-3.10.11/debian/patches/rpi/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.patch 2014-04-28 00:38:05.000000000 +0000 @@ -0,0 +1,57 @@ +commit 97ddc3e1f9d6637c81aaa470fde5669ffb854d14 +Author: Hong Zhiguo +Date: Sat Sep 14 22:42:27 2013 +0800 + + bridge: use br_port_get_rtnl within rtnl lock + + [ Upstream commit 1fb1754a8c70d69ab480763c423e0a74369c4a67 ] + + current br_port_get_rcu is problematic in bridging path + (NULL deref). Change these calls in netlink path first. + + Signed-off-by: Hong Zhiguo + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_netlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_netlink.c 2014-04-28 00:34:22.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_netlink.c 2014-04-28 00:38:04.000000000 +0000 +@@ -203,7 +203,7 @@ + struct net_device *dev, u32 filter_mask) + { + int err = 0; +- struct net_bridge_port *port = br_port_get_rcu(dev); ++ struct net_bridge_port *port = br_port_get_rtnl(dev); + + /* not a bridge port and */ + if (!port && !(filter_mask & RTEXT_FILTER_BRVLAN)) +@@ -443,7 +443,7 @@ + struct net_port_vlans *pv; + + if (br_port_exists(dev)) +- pv = nbp_get_vlan_info(br_port_get_rcu(dev)); ++ pv = nbp_get_vlan_info(br_port_get_rtnl(dev)); + else if (dev->priv_flags & IFF_EBRIDGE) + pv = br_get_vlan_info((struct net_bridge *)netdev_priv(dev)); + else +Index: linux-3.10-3.10.11/net/bridge/br_private.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_private.h 2014-04-28 00:38:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_private.h 2014-04-28 00:38:04.000000000 +0000 +@@ -189,7 +189,7 @@ + return br_port_exists(dev) ? port : NULL; + } + +-static inline struct net_bridge_port *br_port_get_rtnl(struct net_device *dev) ++static inline struct net_bridge_port *br_port_get_rtnl(const struct net_device *dev) + { + return br_port_exists(dev) ? + rtnl_dereference(dev->rx_handler_data) : NULL; +Index: linux-3.10-3.10.11/dummy/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1283_97ddc3e1f9d6637c81aaa470fde5669ffb854d14.txt 2014-04-28 00:38:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.patch --- linux-3.10.11/debian/patches/rpi/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.patch 2014-04-28 00:38:05.000000000 +0000 @@ -0,0 +1,51 @@ +commit 960b8e5018a552f62cfbc0dfe94be7b6ba178f13 +Author: Hong Zhiguo +Date: Sat Sep 14 22:42:28 2013 +0800 + + bridge: fix NULL pointer deref of br_port_get_rcu + + [ Upstream commit 716ec052d2280d511e10e90ad54a86f5b5d4dcc2 ] + + The NULL deref happens when br_handle_frame is called between these + 2 lines of del_nbp: + dev->priv_flags &= ~IFF_BRIDGE_PORT; + /* --> br_handle_frame is called at this time */ + netdev_rx_handler_unregister(dev); + + In br_handle_frame the return of br_port_get_rcu(dev) is dereferenced + without check but br_port_get_rcu(dev) returns NULL if: + !(dev->priv_flags & IFF_BRIDGE_PORT) + + Eric Dumazet pointed out the testing of IFF_BRIDGE_PORT is not necessary + here since we're in rcu_read_lock and we have synchronize_net() in + netdev_rx_handler_unregister. So remove the testing of IFF_BRIDGE_PORT + and by the previous patch, make sure br_port_get_rcu is called in + bridging code. + + Signed-off-by: Hong Zhiguo + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_private.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_private.h 2014-04-28 00:38:04.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_private.h 2014-04-28 00:38:05.000000000 +0000 +@@ -183,10 +183,7 @@ + + static inline struct net_bridge_port *br_port_get_rcu(const struct net_device *dev) + { +- struct net_bridge_port *port = +- rcu_dereference_rtnl(dev->rx_handler_data); +- +- return br_port_exists(dev) ? port : NULL; ++ return rcu_dereference(dev->rx_handler_data); + } + + static inline struct net_bridge_port *br_port_get_rtnl(const struct net_device *dev) +Index: linux-3.10-3.10.11/dummy/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1284_960b8e5018a552f62cfbc0dfe94be7b6ba178f13.txt 2014-04-28 00:38:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.patch --- linux-3.10.11/debian/patches/rpi/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.patch 2014-04-28 00:38:06.000000000 +0000 @@ -0,0 +1,39 @@ +commit fa42a01cb0b985d0d7321956dfdfee2e3e179899 +Author: Ding Zhi +Date: Mon Sep 16 11:31:15 2013 +0200 + + ip6_tunnels: raddr and laddr are inverted in nl msg + + [ Upstream commit 0d2ede929f61783aebfb9228e4d32a0546ee4d23 ] + + IFLA_IPTUN_LOCAL and IFLA_IPTUN_REMOTE were inverted. + + Introduced by c075b13098b3 (ip6tnl: advertise tunnel param via rtnl). + + Signed-off-by: Ding Zhi + Signed-off-by: Nicolas Dichtel + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_tunnel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_tunnel.c 2014-04-27 23:38:56.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_tunnel.c 2014-04-28 00:38:06.000000000 +0000 +@@ -1646,9 +1646,9 @@ + + if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) || + nla_put(skb, IFLA_IPTUN_LOCAL, sizeof(struct in6_addr), +- &parm->raddr) || +- nla_put(skb, IFLA_IPTUN_REMOTE, sizeof(struct in6_addr), + &parm->laddr) || ++ nla_put(skb, IFLA_IPTUN_REMOTE, sizeof(struct in6_addr), ++ &parm->raddr) || + nla_put_u8(skb, IFLA_IPTUN_TTL, parm->hop_limit) || + nla_put_u8(skb, IFLA_IPTUN_ENCAP_LIMIT, parm->encap_limit) || + nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) || +Index: linux-3.10-3.10.11/dummy/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1285_fa42a01cb0b985d0d7321956dfdfee2e3e179899.txt 2014-04-28 00:38:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.patch 2014-04-28 00:38:07.000000000 +0000 @@ -0,0 +1,64 @@ +commit e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc +Author: Daniel Borkmann +Date: Mon Sep 16 12:36:02 2013 +0200 + + net: sctp: rfc4443: do not report ICMP redirects to user space + + [ Upstream commit 3f96a532113131d5a65ac9e00fc83cfa31b0295f ] + + Adapt the same behaviour for SCTP as present in TCP for ICMP redirect + messages. For IPv6, RFC4443, section 2.4. says: + + ... + (e) An ICMPv6 error message MUST NOT be originated as a result of + receiving the following: + ... + (e.2) An ICMPv6 redirect message [IPv6-DISC]. + ... + + Therefore, do not report an error to user space, just invoke dst's redirect + callback and leave, same for IPv4 as done in TCP as well. The implication + w/o having this patch could be that the reception of such packets would + generate a poll notification and in worst case it could even tear down the + whole connection. Therefore, stop updating sk_err on redirects. + + Reported-by: Duan Jiong + Reported-by: Hannes Frederic Sowa + Suggested-by: Vlad Yasevich + Signed-off-by: Daniel Borkmann + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/input.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/input.c 2014-04-27 23:38:56.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/input.c 2014-04-28 00:38:06.000000000 +0000 +@@ -648,8 +648,7 @@ + break; + case ICMP_REDIRECT: + sctp_icmp_redirect(sk, transport, skb); +- err = 0; +- break; ++ /* Fall through to out_unlock. */ + default: + goto out_unlock; + } +Index: linux-3.10-3.10.11/net/sctp/ipv6.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/ipv6.c 2014-04-28 00:38:01.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/ipv6.c 2014-04-28 00:38:06.000000000 +0000 +@@ -189,7 +189,7 @@ + break; + case NDISC_REDIRECT: + sctp_icmp_redirect(sk, transport, skb); +- break; ++ goto out_unlock; + default: + break; + } +Index: linux-3.10-3.10.11/dummy/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1286_e4e7ba12fab4eba6eb6fe2863a6e0e91cd77c7cc.txt 2014-04-28 00:38:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.patch --- linux-3.10.11/debian/patches/rpi/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.patch 2014-04-28 00:38:08.000000000 +0000 @@ -0,0 +1,35 @@ +commit f25e4f35defd609b3e6ad2ae5e871bdbcc0af333 +Author: Duan Jiong +Date: Wed Sep 18 20:03:27 2013 +0800 + + net:dccp: do not report ICMP redirects to user space + + [ Upstream commit bd784a140712fd06674f2240eecfc4ccae421129 ] + + DCCP shouldn't be setting sk_err on redirects as it + isn't an error condition. it should be doing exactly + what tcp is doing and leaving the error handler without + touching the socket. + + Signed-off-by: Duan Jiong + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/dccp/ipv6.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/dccp/ipv6.c 2014-04-27 23:38:56.000000000 +0000 ++++ linux-3.10-3.10.11/net/dccp/ipv6.c 2014-04-28 00:38:07.000000000 +0000 +@@ -135,6 +135,7 @@ + + if (dst) + dst->ops->redirect(dst, sk, skb); ++ goto out; + } + + if (type == ICMPV6_PKT_TOOBIG) { +Index: linux-3.10-3.10.11/dummy/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1287_f25e4f35defd609b3e6ad2ae5e871bdbcc0af333.txt 2014-04-28 00:38:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.patch 2014-04-28 00:38:09.000000000 +0000 @@ -0,0 +1,34 @@ +commit cd176b578d356844f68176a1e0b6346c1cc9e33d +Author: Ansis Atteka +Date: Wed Sep 18 15:29:52 2013 -0700 + + ip: use ip_hdr() in __ip_make_skb() to retrieve IP header + + [ Upstream commit 749154aa56b57652a282cbde57a57abc278d1205 ] + + skb->data already points to IP header, but for the sake of + consistency we can also use ip_hdr() to retrieve it. + + Signed-off-by: Ansis Atteka + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/ip_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_output.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_output.c 2014-04-28 00:38:08.000000000 +0000 +@@ -1324,7 +1324,7 @@ + else + ttl = ip_select_ttl(inet, &rt->dst); + +- iph = (struct iphdr *)skb->data; ++ iph = ip_hdr(skb); + iph->version = 4; + iph->ihl = 5; + iph->tos = inet->tos; +Index: linux-3.10-3.10.11/dummy/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1288_cd176b578d356844f68176a1e0b6346c1cc9e33d.txt 2014-04-28 00:38:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.patch --- linux-3.10.11/debian/patches/rpi/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.patch 2014-04-28 00:38:10.000000000 +0000 @@ -0,0 +1,208 @@ +commit 68a9e707892caf0fda14656963fd99c6a1c10e46 +Author: Ansis Atteka +Date: Wed Sep 18 15:29:53 2013 -0700 + + ip: generate unique IP identificator if local fragmentation is allowed + + [ Upstream commit 703133de331a7a7df47f31fb9de51dc6f68a9de8 ] + + If local fragmentation is allowed, then ip_select_ident() and + ip_select_ident_more() need to generate unique IDs to ensure + correct defragmentation on the peer. + + For example, if IPsec (tunnel mode) has to encrypt large skbs + that have local_df bit set, then all IP fragments that belonged + to different ESP datagrams would have used the same identificator. + If one of these IP fragments would get lost or reordered, then + peer could possibly stitch together wrong IP fragments that did + not belong to the same datagram. This would lead to a packet loss + or data corruption. + + Signed-off-by: Ansis Atteka + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ppp/pptp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ppp/pptp.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ppp/pptp.c 2014-04-28 00:38:09.000000000 +0000 +@@ -281,7 +281,7 @@ + nf_reset(skb); + + skb->ip_summed = CHECKSUM_NONE; +- ip_select_ident(iph, &rt->dst, NULL); ++ ip_select_ident(skb, &rt->dst, NULL); + ip_send_check(iph); + + ip_local_out(skb); +Index: linux-3.10-3.10.11/include/net/ip.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/ip.h 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/ip.h 2014-04-28 00:38:09.000000000 +0000 +@@ -254,9 +254,11 @@ + + extern void __ip_select_ident(struct iphdr *iph, struct dst_entry *dst, int more); + +-static inline void ip_select_ident(struct iphdr *iph, struct dst_entry *dst, struct sock *sk) ++static inline void ip_select_ident(struct sk_buff *skb, struct dst_entry *dst, struct sock *sk) + { +- if (iph->frag_off & htons(IP_DF)) { ++ struct iphdr *iph = ip_hdr(skb); ++ ++ if ((iph->frag_off & htons(IP_DF)) && !skb->local_df) { + /* This is only to work around buggy Windows95/2000 + * VJ compression implementations. If the ID field + * does not change, they drop every other packet in +@@ -268,9 +270,11 @@ + __ip_select_ident(iph, dst, 0); + } + +-static inline void ip_select_ident_more(struct iphdr *iph, struct dst_entry *dst, struct sock *sk, int more) ++static inline void ip_select_ident_more(struct sk_buff *skb, struct dst_entry *dst, struct sock *sk, int more) + { +- if (iph->frag_off & htons(IP_DF)) { ++ struct iphdr *iph = ip_hdr(skb); ++ ++ if ((iph->frag_off & htons(IP_DF)) && !skb->local_df) { + if (sk && inet_sk(sk)->inet_daddr) { + iph->id = htons(inet_sk(sk)->inet_id); + inet_sk(sk)->inet_id += 1 + more; +Index: linux-3.10-3.10.11/net/ipv4/igmp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/igmp.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/igmp.c 2014-04-28 00:38:09.000000000 +0000 +@@ -343,7 +343,7 @@ + pip->saddr = fl4.saddr; + pip->protocol = IPPROTO_IGMP; + pip->tot_len = 0; /* filled in later */ +- ip_select_ident(pip, &rt->dst, NULL); ++ ip_select_ident(skb, &rt->dst, NULL); + ((u8 *)&pip[1])[0] = IPOPT_RA; + ((u8 *)&pip[1])[1] = 4; + ((u8 *)&pip[1])[2] = 0; +@@ -687,7 +687,7 @@ + iph->daddr = dst; + iph->saddr = fl4.saddr; + iph->protocol = IPPROTO_IGMP; +- ip_select_ident(iph, &rt->dst, NULL); ++ ip_select_ident(skb, &rt->dst, NULL); + ((u8 *)&iph[1])[0] = IPOPT_RA; + ((u8 *)&iph[1])[1] = 4; + ((u8 *)&iph[1])[2] = 0; +Index: linux-3.10-3.10.11/net/ipv4/inetpeer.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/inetpeer.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/inetpeer.c 2014-04-28 00:38:09.000000000 +0000 +@@ -32,8 +32,8 @@ + * At the moment of writing this notes identifier of IP packets is generated + * to be unpredictable using this code only for packets subjected + * (actually or potentially) to defragmentation. I.e. DF packets less than +- * PMTU in size uses a constant ID and do not use this code (see +- * ip_select_ident() in include/net/ip.h). ++ * PMTU in size when local fragmentation is disabled use a constant ID and do ++ * not use this code (see ip_select_ident() in include/net/ip.h). + * + * Route cache entries hold references to our nodes. + * New cache entries get references via lookup by destination IP address in +Index: linux-3.10-3.10.11/net/ipv4/ip_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_output.c 2014-04-28 00:38:08.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_output.c 2014-04-28 00:38:09.000000000 +0000 +@@ -148,7 +148,7 @@ + iph->daddr = (opt && opt->opt.srr ? opt->opt.faddr : daddr); + iph->saddr = saddr; + iph->protocol = sk->sk_protocol; +- ip_select_ident(iph, &rt->dst, sk); ++ ip_select_ident(skb, &rt->dst, sk); + + if (opt && opt->opt.optlen) { + iph->ihl += opt->opt.optlen>>2; +@@ -394,7 +394,7 @@ + ip_options_build(skb, &inet_opt->opt, inet->inet_daddr, rt, 0); + } + +- ip_select_ident_more(iph, &rt->dst, sk, ++ ip_select_ident_more(skb, &rt->dst, sk, + (skb_shinfo(skb)->gso_segs ?: 1) - 1); + + skb->priority = sk->sk_priority; +@@ -1332,7 +1332,7 @@ + iph->ttl = ttl; + iph->protocol = sk->sk_protocol; + ip_copy_addrs(iph, fl4); +- ip_select_ident(iph, &rt->dst, sk); ++ ip_select_ident(skb, &rt->dst, sk); + + if (opt) { + iph->ihl += opt->optlen>>2; +Index: linux-3.10-3.10.11/net/ipv4/ipmr.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ipmr.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ipmr.c 2014-04-28 00:38:09.000000000 +0000 +@@ -1658,7 +1658,7 @@ + iph->protocol = IPPROTO_IPIP; + iph->ihl = 5; + iph->tot_len = htons(skb->len); +- ip_select_ident(iph, skb_dst(skb), NULL); ++ ip_select_ident(skb, skb_dst(skb), NULL); + ip_send_check(iph); + + memset(&(IPCB(skb)->opt), 0, sizeof(IPCB(skb)->opt)); +Index: linux-3.10-3.10.11/net/ipv4/raw.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/raw.c 2014-04-28 00:34:28.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/raw.c 2014-04-28 00:38:09.000000000 +0000 +@@ -387,7 +387,7 @@ + iph->check = 0; + iph->tot_len = htons(length); + if (!iph->id) +- ip_select_ident(iph, &rt->dst, NULL); ++ ip_select_ident(skb, &rt->dst, NULL); + + iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl); + } +Index: linux-3.10-3.10.11/net/ipv4/xfrm4_mode_tunnel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/xfrm4_mode_tunnel.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/xfrm4_mode_tunnel.c 2014-04-28 00:38:09.000000000 +0000 +@@ -117,7 +117,7 @@ + + top_iph->frag_off = (flags & XFRM_STATE_NOPMTUDISC) ? + 0 : (XFRM_MODE_SKB_CB(skb)->frag_off & htons(IP_DF)); +- ip_select_ident(top_iph, dst->child, NULL); ++ ip_select_ident(skb, dst->child, NULL); + + top_iph->ttl = ip4_dst_hoplimit(dst->child); + +Index: linux-3.10-3.10.11/net/ipv6/sit.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/sit.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/sit.c 2014-04-28 00:38:09.000000000 +0000 +@@ -865,7 +865,7 @@ + iph->ttl = iph6->hop_limit; + + skb->ip_summed = CHECKSUM_NONE; +- ip_select_ident(iph, skb_dst(skb), NULL); ++ ip_select_ident(skb, skb_dst(skb), NULL); + iptunnel_xmit(skb, dev); + return NETDEV_TX_OK; + +Index: linux-3.10-3.10.11/net/netfilter/ipvs/ip_vs_xmit.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/netfilter/ipvs/ip_vs_xmit.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/netfilter/ipvs/ip_vs_xmit.c 2014-04-28 00:38:09.000000000 +0000 +@@ -883,7 +883,7 @@ + iph->daddr = cp->daddr.ip; + iph->saddr = saddr; + iph->ttl = old_iph->ttl; +- ip_select_ident(iph, &rt->dst, NULL); ++ ip_select_ident(skb, &rt->dst, NULL); + + /* Another hack: avoid icmp_send in ip_fragment */ + skb->local_df = 1; +Index: linux-3.10-3.10.11/dummy/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1289_68a9e707892caf0fda14656963fd99c6a1c10e46.txt 2014-04-28 00:38:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.patch 2014-04-28 00:38:11.000000000 +0000 @@ -0,0 +1,126 @@ +commit f5a30bc1d6b338ecba5b948798a48bc5b59ef30f +Author: Hannes Frederic Sowa +Date: Sat Sep 21 06:27:00 2013 +0200 + + ipv6: udp packets following an UFO enqueued packet need also be handled by UFO + + [ Upstream commit 2811ebac2521ceac84f2bdae402455baa6a7fb47 ] + + In the following scenario the socket is corked: + If the first UDP packet is larger then the mtu we try to append it to the + write queue via ip6_ufo_append_data. A following packet, which is smaller + than the mtu would be appended to the already queued up gso-skb via + plain ip6_append_data. This causes random memory corruptions. + + In ip6_ufo_append_data we also have to be careful to not queue up the + same skb multiple times. So setup the gso frame only when no first skb + is available. + + This also fixes a shortcoming where we add the current packet's length to + cork->length but return early because of a packet > mtu with dontfrag set + (instead of sutracting it again). + + Found with trinity. + + Cc: YOSHIFUJI Hideaki + Signed-off-by: Hannes Frederic Sowa + Reported-by: Dmitry Vyukov + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_output.c 2014-04-27 23:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_output.c 2014-04-28 00:38:11.000000000 +0000 +@@ -1039,6 +1039,8 @@ + * udp datagram + */ + if ((skb = skb_peek_tail(&sk->sk_write_queue)) == NULL) { ++ struct frag_hdr fhdr; ++ + skb = sock_alloc_send_skb(sk, + hh_len + fragheaderlen + transhdrlen + 20, + (flags & MSG_DONTWAIT), &err); +@@ -1059,12 +1061,6 @@ + + skb->ip_summed = CHECKSUM_PARTIAL; + skb->csum = 0; +- } +- +- err = skb_append_datato_frags(sk,skb, getfrag, from, +- (length - transhdrlen)); +- if (!err) { +- struct frag_hdr fhdr; + + /* Specify the length of each IPv6 datagram fragment. + * It has to be a multiple of 8. +@@ -1075,15 +1071,10 @@ + ipv6_select_ident(&fhdr, rt); + skb_shinfo(skb)->ip6_frag_id = fhdr.identification; + __skb_queue_tail(&sk->sk_write_queue, skb); +- +- return 0; + } +- /* There is not enough support do UPD LSO, +- * so follow normal path +- */ +- kfree_skb(skb); + +- return err; ++ return skb_append_datato_frags(sk, skb, getfrag, from, ++ (length - transhdrlen)); + } + + static inline struct ipv6_opt_hdr *ip6_opt_dup(struct ipv6_opt_hdr *src, +@@ -1250,27 +1241,27 @@ + * --yoshfuji + */ + +- cork->length += length; +- if (length > mtu) { +- int proto = sk->sk_protocol; +- if (dontfrag && (proto == IPPROTO_UDP || proto == IPPROTO_RAW)){ +- ipv6_local_rxpmtu(sk, fl6, mtu-exthdrlen); +- return -EMSGSIZE; +- } +- +- if (proto == IPPROTO_UDP && +- (rt->dst.dev->features & NETIF_F_UFO)) { ++ if ((length > mtu) && dontfrag && (sk->sk_protocol == IPPROTO_UDP || ++ sk->sk_protocol == IPPROTO_RAW)) { ++ ipv6_local_rxpmtu(sk, fl6, mtu-exthdrlen); ++ return -EMSGSIZE; ++ } + +- err = ip6_ufo_append_data(sk, getfrag, from, length, +- hh_len, fragheaderlen, +- transhdrlen, mtu, flags, rt); +- if (err) +- goto error; +- return 0; +- } ++ skb = skb_peek_tail(&sk->sk_write_queue); ++ cork->length += length; ++ if (((length > mtu) || ++ (skb && skb_is_gso(skb))) && ++ (sk->sk_protocol == IPPROTO_UDP) && ++ (rt->dst.dev->features & NETIF_F_UFO)) { ++ err = ip6_ufo_append_data(sk, getfrag, from, length, ++ hh_len, fragheaderlen, ++ transhdrlen, mtu, flags, rt); ++ if (err) ++ goto error; ++ return 0; + } + +- if ((skb = skb_peek_tail(&sk->sk_write_queue)) == NULL) ++ if (!skb) + goto alloc_new_skb; + + while (length > 0) { +Index: linux-3.10-3.10.11/dummy/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1290_f5a30bc1d6b338ecba5b948798a48bc5b59ef30f.txt 2014-04-28 00:38:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.patch 2014-04-28 00:38:12.000000000 +0000 @@ -0,0 +1,52 @@ +commit f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7 +Author: Roger Luethi +Date: Sat Sep 21 14:24:11 2013 +0200 + + via-rhine: fix VLAN priority field (PCP, IEEE 802.1p) + + [ Upstream commit 207070f5221e2a901d56a49df9cde47d9b716cd7 ] + + Outgoing packets sent by via-rhine have their VLAN PCP field off by one + (when hardware acceleration is enabled). The TX descriptor expects only VID + and PCP (without a CFI/DEI bit). + + Peter Boström noticed and reported the bug. + + Signed-off-by: Roger Luethi + Cc: Peter Boström + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/via/via-rhine.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/via/via-rhine.c 2014-04-27 23:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/via/via-rhine.c 2014-04-28 00:38:11.000000000 +0000 +@@ -32,7 +32,7 @@ + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + + #define DRV_NAME "via-rhine" +-#define DRV_VERSION "1.5.0" ++#define DRV_VERSION "1.5.1" + #define DRV_RELDATE "2010-10-09" + + #include +@@ -1694,7 +1694,12 @@ + cpu_to_le32(TXDESC | (skb->len >= ETH_ZLEN ? skb->len : ETH_ZLEN)); + + if (unlikely(vlan_tx_tag_present(skb))) { +- rp->tx_ring[entry].tx_status = cpu_to_le32((vlan_tx_tag_get(skb)) << 16); ++ u16 vid_pcp = vlan_tx_tag_get(skb); ++ ++ /* drop CFI/DEI bit, register needs VID and PCP */ ++ vid_pcp = (vid_pcp & VLAN_VID_MASK) | ++ ((vid_pcp & VLAN_PRIO_MASK) >> 1); ++ rp->tx_ring[entry].tx_status = cpu_to_le32((vid_pcp) << 16); + /* request tagging */ + rp->tx_ring[entry].desc_length |= cpu_to_le32(0x020000); + } +Index: linux-3.10-3.10.11/dummy/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1291_f7036a444e8a9eb1e41f4e157c8f19b8efbc2cb7.txt 2014-04-28 00:38:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.patch --- linux-3.10.11/debian/patches/rpi/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.patch 2014-04-28 00:38:13.000000000 +0000 @@ -0,0 +1,196 @@ +commit 6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56 +Author: Catalin(ux) M. BOIE +Date: Mon Sep 23 23:04:19 2013 +0300 + + IPv6 NAT: Do not drop DNATed 6to4/6rd packets + + [ Upstream commit 7df37ff33dc122f7bd0614d707939fe84322d264 ] + + When a router is doing DNAT for 6to4/6rd packets the latest + anti-spoofing commit 218774dc ("ipv6: add anti-spoofing checks for + 6to4 and 6rd") will drop them because the IPv6 address embedded does + not match the IPv4 destination. This patch will allow them to pass by + testing if we have an address that matches on 6to4/6rd interface. I + have been hit by this problem using Fedora and IPV6TO4_IPV4ADDR. + Also, log the dropped packets (with rate limit). + + Signed-off-by: Catalin(ux) M. BOIE + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/addrconf.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/addrconf.h 2014-04-27 23:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/addrconf.h 2014-04-28 00:38:12.000000000 +0000 +@@ -73,6 +73,10 @@ + const struct in6_addr *addr); + #endif + ++bool ipv6_chk_custom_prefix(const struct in6_addr *addr, ++ const unsigned int prefix_len, ++ struct net_device *dev); ++ + extern int ipv6_chk_prefix(const struct in6_addr *addr, + struct net_device *dev); + +Index: linux-3.10-3.10.11/net/ipv6/addrconf.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/addrconf.c 2014-04-28 00:34:19.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/addrconf.c 2014-04-28 00:38:12.000000000 +0000 +@@ -1533,6 +1533,33 @@ + return false; + } + ++/* Compares an address/prefix_len with addresses on device @dev. ++ * If one is found it returns true. ++ */ ++bool ipv6_chk_custom_prefix(const struct in6_addr *addr, ++ const unsigned int prefix_len, struct net_device *dev) ++{ ++ struct inet6_dev *idev; ++ struct inet6_ifaddr *ifa; ++ bool ret = false; ++ ++ rcu_read_lock(); ++ idev = __in6_dev_get(dev); ++ if (idev) { ++ read_lock_bh(&idev->lock); ++ list_for_each_entry(ifa, &idev->addr_list, if_list) { ++ ret = ipv6_prefix_equal(addr, &ifa->addr, prefix_len); ++ if (ret) ++ break; ++ } ++ read_unlock_bh(&idev->lock); ++ } ++ rcu_read_unlock(); ++ ++ return ret; ++} ++EXPORT_SYMBOL(ipv6_chk_custom_prefix); ++ + int ipv6_chk_prefix(const struct in6_addr *addr, struct net_device *dev) + { + struct inet6_dev *idev; +Index: linux-3.10-3.10.11/net/ipv6/sit.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/sit.c 2014-04-28 00:38:09.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/sit.c 2014-04-28 00:38:12.000000000 +0000 +@@ -566,6 +566,70 @@ + return false; + } + ++/* Checks if an address matches an address on the tunnel interface. ++ * Used to detect the NAT of proto 41 packets and let them pass spoofing test. ++ * Long story: ++ * This function is called after we considered the packet as spoofed ++ * in is_spoofed_6rd. ++ * We may have a router that is doing NAT for proto 41 packets ++ * for an internal station. Destination a.a.a.a/PREFIX:bbbb:bbbb ++ * will be translated to n.n.n.n/PREFIX:bbbb:bbbb. And is_spoofed_6rd ++ * function will return true, dropping the packet. ++ * But, we can still check if is spoofed against the IP ++ * addresses associated with the interface. ++ */ ++static bool only_dnatted(const struct ip_tunnel *tunnel, ++ const struct in6_addr *v6dst) ++{ ++ int prefix_len; ++ ++#ifdef CONFIG_IPV6_SIT_6RD ++ prefix_len = tunnel->ip6rd.prefixlen + 32 ++ - tunnel->ip6rd.relay_prefixlen; ++#else ++ prefix_len = 48; ++#endif ++ return ipv6_chk_custom_prefix(v6dst, prefix_len, tunnel->dev); ++} ++ ++/* Returns true if a packet is spoofed */ ++static bool packet_is_spoofed(struct sk_buff *skb, ++ const struct iphdr *iph, ++ struct ip_tunnel *tunnel) ++{ ++ const struct ipv6hdr *ipv6h; ++ ++ if (tunnel->dev->priv_flags & IFF_ISATAP) { ++ if (!isatap_chksrc(skb, iph, tunnel)) ++ return true; ++ ++ return false; ++ } ++ ++ if (tunnel->dev->flags & IFF_POINTOPOINT) ++ return false; ++ ++ ipv6h = ipv6_hdr(skb); ++ ++ if (unlikely(is_spoofed_6rd(tunnel, iph->saddr, &ipv6h->saddr))) { ++ net_warn_ratelimited("Src spoofed %pI4/%pI6c -> %pI4/%pI6c\n", ++ &iph->saddr, &ipv6h->saddr, ++ &iph->daddr, &ipv6h->daddr); ++ return true; ++ } ++ ++ if (likely(!is_spoofed_6rd(tunnel, iph->daddr, &ipv6h->daddr))) ++ return false; ++ ++ if (only_dnatted(tunnel, &ipv6h->daddr)) ++ return false; ++ ++ net_warn_ratelimited("Dst spoofed %pI4/%pI6c -> %pI4/%pI6c\n", ++ &iph->saddr, &ipv6h->saddr, ++ &iph->daddr, &ipv6h->daddr); ++ return true; ++} ++ + static int ipip6_rcv(struct sk_buff *skb) + { + const struct iphdr *iph = ip_hdr(skb); +@@ -584,19 +648,9 @@ + skb->protocol = htons(ETH_P_IPV6); + skb->pkt_type = PACKET_HOST; + +- if (tunnel->dev->priv_flags & IFF_ISATAP) { +- if (!isatap_chksrc(skb, iph, tunnel)) { +- tunnel->dev->stats.rx_errors++; +- goto out; +- } +- } else if (!(tunnel->dev->flags&IFF_POINTOPOINT)) { +- if (is_spoofed_6rd(tunnel, iph->saddr, +- &ipv6_hdr(skb)->saddr) || +- is_spoofed_6rd(tunnel, iph->daddr, +- &ipv6_hdr(skb)->daddr)) { +- tunnel->dev->stats.rx_errors++; +- goto out; +- } ++ if (packet_is_spoofed(skb, iph, tunnel)) { ++ tunnel->dev->stats.rx_errors++; ++ goto out; + } + + __skb_tunnel_rx(skb, tunnel->dev); +@@ -713,7 +767,7 @@ + neigh = dst_neigh_lookup(skb_dst(skb), &iph6->daddr); + + if (neigh == NULL) { +- net_dbg_ratelimited("sit: nexthop == NULL\n"); ++ net_dbg_ratelimited("nexthop == NULL\n"); + goto tx_error; + } + +@@ -742,7 +796,7 @@ + neigh = dst_neigh_lookup(skb_dst(skb), &iph6->daddr); + + if (neigh == NULL) { +- net_dbg_ratelimited("sit: nexthop == NULL\n"); ++ net_dbg_ratelimited("nexthop == NULL\n"); + goto tx_error; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1292_6ea2edb3b6cbe72d2f943e205c463f6cb8bafe56.txt 2014-04-28 00:38:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.patch --- linux-3.10.11/debian/patches/rpi/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.patch 2014-04-28 00:38:14.000000000 +0000 @@ -0,0 +1,151 @@ +commit bdf831a681dd237fcde669e07e5202daddfa0c65 +Author: Eric Dumazet +Date: Tue Sep 24 06:19:57 2013 -0700 + + net: net_secret should not depend on TCP + + [ Upstream commit 9a3bab6b05383f1e4c3716b3615500c51285959e ] + + A host might need net_secret[] and never open a single socket. + + Problem added in commit aebda156a570782 + ("net: defer net_secret[] initialization") + + Based on prior patch from Hannes Frederic Sowa. + + Reported-by: Hannes Frederic Sowa + Signed-off-by: Eric Dumazet + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/secure_seq.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/secure_seq.h 2014-04-27 23:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/secure_seq.h 2014-04-28 00:38:13.000000000 +0000 +@@ -3,7 +3,6 @@ + + #include + +-extern void net_secret_init(void); + extern __u32 secure_ip_id(__be32 daddr); + extern __u32 secure_ipv6_id(const __be32 daddr[4]); + extern u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); +Index: linux-3.10-3.10.11/net/core/secure_seq.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/secure_seq.c 2014-04-27 23:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/secure_seq.c 2014-04-28 00:38:13.000000000 +0000 +@@ -10,11 +10,24 @@ + + #include + +-static u32 net_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned; ++#define NET_SECRET_SIZE (MD5_MESSAGE_BYTES / 4) + +-void net_secret_init(void) ++static u32 net_secret[NET_SECRET_SIZE] ____cacheline_aligned; ++ ++static void net_secret_init(void) + { +- get_random_bytes(net_secret, sizeof(net_secret)); ++ u32 tmp; ++ int i; ++ ++ if (likely(net_secret[0])) ++ return; ++ ++ for (i = NET_SECRET_SIZE; i > 0;) { ++ do { ++ get_random_bytes(&tmp, sizeof(tmp)); ++ } while (!tmp); ++ cmpxchg(&net_secret[--i], 0, tmp); ++ } + } + + #ifdef CONFIG_INET +@@ -42,6 +55,7 @@ + u32 hash[MD5_DIGEST_WORDS]; + u32 i; + ++ net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + (__force u32)daddr[i]; +@@ -63,6 +77,7 @@ + u32 hash[MD5_DIGEST_WORDS]; + u32 i; + ++ net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + (__force u32) daddr[i]; +@@ -82,6 +97,7 @@ + { + u32 hash[MD5_DIGEST_WORDS]; + ++ net_secret_init(); + hash[0] = (__force __u32) daddr; + hash[1] = net_secret[13]; + hash[2] = net_secret[14]; +@@ -96,6 +112,7 @@ + { + __u32 hash[4]; + ++ net_secret_init(); + memcpy(hash, daddr, 16); + md5_transform(hash, net_secret); + +@@ -107,6 +124,7 @@ + { + u32 hash[MD5_DIGEST_WORDS]; + ++ net_secret_init(); + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = ((__force u16)sport << 16) + (__force u16)dport; +@@ -121,6 +139,7 @@ + { + u32 hash[MD5_DIGEST_WORDS]; + ++ net_secret_init(); + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = (__force u32)dport ^ net_secret[14]; +@@ -140,6 +159,7 @@ + u32 hash[MD5_DIGEST_WORDS]; + u64 seq; + ++ net_secret_init(); + hash[0] = (__force u32)saddr; + hash[1] = (__force u32)daddr; + hash[2] = ((__force u16)sport << 16) + (__force u16)dport; +@@ -164,6 +184,7 @@ + u64 seq; + u32 i; + ++ net_secret_init(); + memcpy(hash, saddr, 16); + for (i = 0; i < 4; i++) + secret[i] = net_secret[i] + daddr[i]; +Index: linux-3.10-3.10.11/net/ipv4/af_inet.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/af_inet.c 2014-04-27 23:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/af_inet.c 2014-04-28 00:38:13.000000000 +0000 +@@ -263,10 +263,8 @@ + get_random_bytes(&rnd, sizeof(rnd)); + } while (rnd == 0); + +- if (cmpxchg(&inet_ehash_secret, 0, rnd) == 0) { ++ if (cmpxchg(&inet_ehash_secret, 0, rnd) == 0) + get_random_bytes(&ipv6_hash_secret, sizeof(ipv6_hash_secret)); +- net_secret_init(); +- } + } + EXPORT_SYMBOL(build_ehash_secret); + +Index: linux-3.10-3.10.11/dummy/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1293_bdf831a681dd237fcde669e07e5202daddfa0c65.txt 2014-04-28 00:38:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.patch 2014-04-28 00:38:15.000000000 +0000 @@ -0,0 +1,35 @@ +commit f17c9815499705904d67157cb274a260d944e5f2 +Author: Peter Korsgaard +Date: Mon Sep 30 23:28:20 2013 +0200 + + dm9601: fix IFF_ALLMULTI handling + + [ Upstream commit bf0ea6380724beb64f27a722dfc4b0edabff816e ] + + Pass-all-multicast is controlled by bit 3 in RX control, not bit 2 + (pass undersized frames). + + Reported-by: Joseph Chang + Signed-off-by: Peter Korsgaard + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/usb/dm9601.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/dm9601.c 2014-04-27 23:38:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/dm9601.c 2014-04-28 00:38:14.000000000 +0000 +@@ -303,7 +303,7 @@ + rx_ctl |= 0x02; + } else if (net->flags & IFF_ALLMULTI || + netdev_mc_count(net) > DM_MAX_MCAST) { +- rx_ctl |= 0x04; ++ rx_ctl |= 0x08; + } else if (!netdev_mc_empty(net)) { + struct netdev_hw_addr *ha; + +Index: linux-3.10-3.10.11/dummy/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1294_f17c9815499705904d67157cb274a260d944e5f2.txt 2014-04-28 00:38:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.patch 2014-04-28 00:38:15.000000000 +0000 @@ -0,0 +1,81 @@ +commit c9b391f6d166118c5543e9d1708e67977dbdbe1f +Author: Neil Horman +Date: Fri Sep 27 12:22:15 2013 -0400 + + bonding: Fix broken promiscuity reference counting issue + + [ Upstream commit 5a0068deb611109c5ba77358be533f763f395ee4 ] + + Recently grabbed this report: + https://bugzilla.redhat.com/show_bug.cgi?id=1005567 + + Of an issue in which the bonding driver, with an attached vlan encountered the + following errors when bond0 was taken down and back up: + + dummy1: promiscuity touches roof, set promiscuity failed. promiscuity feature of + device might be broken. + + The error occurs because, during __bond_release_one, if we release our last + slave, we take on a random mac address and issue a NETDEV_CHANGEADDR + notification. With an attached vlan, the vlan may see that the vlan and bond + mac address were in sync, but no longer are. This triggers a call to dev_uc_add + and dev_set_rx_mode, which enables IFF_PROMISC on the bond device. Then, when + we complete __bond_release_one, we use the current state of the bond flags to + determine if we should decrement the promiscuity of the releasing slave. But + since the bond changed promiscuity state during the release operation, we + incorrectly decrement the slave promisc count when it wasn't in promiscuous mode + to begin with, causing the above error + + Fix is pretty simple, just cache the bonding flags at the start of the function + and use those when determining the need to set promiscuity. + + This is also needed for the ALLMULTI flag + + Reported-by: Mark Wu + CC: Jay Vosburgh + CC: Andy Gospodarek + CC: Mark Wu + CC: "David S. Miller" + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/bonding/bond_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/bonding/bond_main.c 2014-04-28 00:34:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/bonding/bond_main.c 2014-04-28 00:38:15.000000000 +0000 +@@ -1991,6 +1991,7 @@ + struct bonding *bond = netdev_priv(bond_dev); + struct slave *slave, *oldcurrent; + struct sockaddr addr; ++ int old_flags = bond_dev->flags; + netdev_features_t old_features = bond_dev->features; + + /* slave is not a slave or master is not master of this slave */ +@@ -2123,12 +2124,18 @@ + * already taken care of above when we detached the slave + */ + if (!USES_PRIMARY(bond->params.mode)) { +- /* unset promiscuity level from slave */ +- if (bond_dev->flags & IFF_PROMISC) ++ /* unset promiscuity level from slave ++ * NOTE: The NETDEV_CHANGEADDR call above may change the value ++ * of the IFF_PROMISC flag in the bond_dev, but we need the ++ * value of that flag before that change, as that was the value ++ * when this slave was attached, so we cache at the start of the ++ * function and use it here. Same goes for ALLMULTI below ++ */ ++ if (old_flags & IFF_PROMISC) + dev_set_promiscuity(slave_dev, -1); + + /* unset allmulti level from slave */ +- if (bond_dev->flags & IFF_ALLMULTI) ++ if (old_flags & IFF_ALLMULTI) + dev_set_allmulti(slave_dev, -1); + + /* flush master's mc_list from slave */ +Index: linux-3.10-3.10.11/dummy/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1295_c9b391f6d166118c5543e9d1708e67977dbdbe1f.txt 2014-04-28 00:38:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.patch --- linux-3.10.11/debian/patches/rpi/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.patch 2014-04-28 00:38:16.000000000 +0000 @@ -0,0 +1,54 @@ +commit 102ce961c8d54d613eb49d6bc71ecec674505815 +Author: Hannes Frederic Sowa +Date: Sun Sep 29 05:40:50 2013 +0200 + + ipv6: gre: correct calculation of max_headroom + + [ Upstream commit 3da812d860755925da890e8c713f2d2e2d7b1bae ] + + gre_hlen already accounts for sizeof(struct ipv6_hdr) + gre header, + so initialize max_headroom to zero. Otherwise the + + if (encap_limit >= 0) { + max_headroom += 8; + mtu -= 8; + } + + increments an uninitialized variable before max_headroom was reset. + + Found with coverity: 728539 + + Cc: Dmitry Kozlov + Signed-off-by: Hannes Frederic Sowa + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_gre.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_gre.c 2014-04-27 23:38:53.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_gre.c 2014-04-28 00:38:16.000000000 +0000 +@@ -620,7 +620,7 @@ + struct ip6_tnl *tunnel = netdev_priv(dev); + struct net_device *tdev; /* Device to other host */ + struct ipv6hdr *ipv6h; /* Our new IP header */ +- unsigned int max_headroom; /* The extra header space needed */ ++ unsigned int max_headroom = 0; /* The extra header space needed */ + int gre_hlen; + struct ipv6_tel_txoption opt; + int mtu; +@@ -693,7 +693,7 @@ + tunnel->err_count = 0; + } + +- max_headroom = LL_RESERVED_SPACE(tdev) + gre_hlen + dst->header_len; ++ max_headroom += LL_RESERVED_SPACE(tdev) + gre_hlen + dst->header_len; + + if (skb_headroom(skb) < max_headroom || skb_shared(skb) || + (skb_cloned(skb) && !skb_clone_writable(skb, 0))) { +Index: linux-3.10-3.10.11/dummy/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1296_102ce961c8d54d613eb49d6bc71ecec674505815.txt 2014-04-28 00:38:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.patch 2014-04-28 00:38:17.000000000 +0000 @@ -0,0 +1,51 @@ +commit fbf96d75f4a320c66e03a21b2a46d0985b6d096b +Author: Salam Noureddine +Date: Sun Sep 29 13:39:42 2013 -0700 + + ipv4 igmp: use in_dev_put in timer handlers instead of __in_dev_put + + [ Upstream commit e2401654dd0f5f3fb7a8d80dad9554d73d7ca394 ] + + It is possible for the timer handlers to run after the call to + ip_mc_down so use in_dev_put instead of __in_dev_put in the handler + function in order to do proper cleanup when the refcnt reaches 0. + Otherwise, the refcnt can reach zero without the in_device being + destroyed and we end up leaking a reference to the net_device and + see messages like the following, + + unregister_netdevice: waiting for eth0 to become free. Usage count = 1 + + Tested on linux-3.4.43. + + Signed-off-by: Salam Noureddine + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/igmp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/igmp.c 2014-04-28 00:38:09.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/igmp.c 2014-04-28 00:38:16.000000000 +0000 +@@ -709,7 +709,7 @@ + + in_dev->mr_gq_running = 0; + igmpv3_send_report(in_dev, NULL); +- __in_dev_put(in_dev); ++ in_dev_put(in_dev); + } + + static void igmp_ifc_timer_expire(unsigned long data) +@@ -721,7 +721,7 @@ + in_dev->mr_ifc_count--; + igmp_ifc_start_timer(in_dev, IGMP_Unsolicited_Report_Interval); + } +- __in_dev_put(in_dev); ++ in_dev_put(in_dev); + } + + static void igmp_ifc_event(struct in_device *in_dev) +Index: linux-3.10-3.10.11/dummy/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1297_fbf96d75f4a320c66e03a21b2a46d0985b6d096b.txt 2014-04-28 00:38:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.patch --- linux-3.10.11/debian/patches/rpi/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.patch 2014-04-28 00:38:18.000000000 +0000 @@ -0,0 +1,51 @@ +commit ef04c1db0aef35f8d006d18c79cacd11925078ec +Author: Salam Noureddine +Date: Sun Sep 29 13:41:34 2013 -0700 + + ipv6 mcast: use in6_dev_put in timer handlers instead of __in6_dev_put + + [ Upstream commit 9260d3e1013701aa814d10c8fc6a9f92bd17d643 ] + + It is possible for the timer handlers to run after the call to + ipv6_mc_down so use in6_dev_put instead of __in6_dev_put in the + handler function in order to do proper cleanup when the refcnt + reaches 0. Otherwise, the refcnt can reach zero without the + inet6_dev being destroyed and we end up leaking a reference to + the net_device and see messages like the following, + + unregister_netdevice: waiting for eth0 to become free. Usage count = 1 + + Tested on linux-3.4.43. + + Signed-off-by: Salam Noureddine + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/mcast.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/mcast.c 2014-04-27 23:38:52.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/mcast.c 2014-04-28 00:38:17.000000000 +0000 +@@ -2158,7 +2158,7 @@ + + idev->mc_gq_running = 0; + mld_send_report(idev, NULL); +- __in6_dev_put(idev); ++ in6_dev_put(idev); + } + + static void mld_ifc_timer_expire(unsigned long data) +@@ -2171,7 +2171,7 @@ + if (idev->mc_ifc_count) + mld_ifc_start_timer(idev, idev->mc_maxdelay); + } +- __in6_dev_put(idev); ++ in6_dev_put(idev); + } + + static void mld_ifc_event(struct inet6_dev *idev) +Index: linux-3.10-3.10.11/dummy/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1298_ef04c1db0aef35f8d006d18c79cacd11925078ec.txt 2014-04-28 00:38:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.patch --- linux-3.10.11/debian/patches/rpi/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.patch 2014-04-28 00:38:19.000000000 +0000 @@ -0,0 +1,46 @@ +commit c7bd0696131d1cc596afea05d06c6fee5b7a51ca +Author: Ricardo Ribalda +Date: Tue Oct 1 08:17:10 2013 +0200 + + ll_temac: Reset dma descriptors indexes on ndo_open + + [ Upstream commit 7167cf0e8cd10287b7912b9ffcccd9616f382922 ] + + The dma descriptors indexes are only initialized on the probe function. + + If a packet is on the buffer when temac_stop is called, the dma + descriptors indexes can be left on a incorrect state where no other + package can be sent. + + So an interface could be left in an usable state after ifdow/ifup. + + This patch makes sure that the descriptors indexes are in a proper + status when the device is open. + + Signed-off-by: Ricardo Ribalda Delgado + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/xilinx/ll_temac_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/xilinx/ll_temac_main.c 2014-04-27 23:38:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/xilinx/ll_temac_main.c 2014-04-28 00:38:18.000000000 +0000 +@@ -297,6 +297,12 @@ + lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1))); + lp->dma_out(lp, TX_CURDESC_PTR, lp->tx_bd_p); + ++ /* Init descriptor indexes */ ++ lp->tx_bd_ci = 0; ++ lp->tx_bd_next = 0; ++ lp->tx_bd_tail = 0; ++ lp->rx_bd_ci = 0; ++ + return 0; + + out: +Index: linux-3.10-3.10.11/dummy/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1299_c7bd0696131d1cc596afea05d06c6fee5b7a51ca.txt 2014-04-28 00:38:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.patch --- linux-3.10.11/debian/patches/rpi/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.patch 2014-04-28 00:38:19.000000000 +0000 @@ -0,0 +1,50 @@ +commit 23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df +Author: Steffen Klassert +Date: Tue Oct 1 11:33:59 2013 +0200 + + ip_tunnel: Fix a memory corruption in ip_tunnel_xmit + + [ Upstream commit 3e08f4a72f689c6296d336c2aab4bddd60c93ae2 ] + + We might extend the used aera of a skb beyond the total + headroom when we install the ipip header. Fix this by + calling skb_cow_head() unconditionally. + + Bug was introduced with commit c544193214 + ("GRE: Refactor GRE tunneling code.") + + Cc: Pravin Shelar + Signed-off-by: Steffen Klassert + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/ip_tunnel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_tunnel.c 2014-04-28 00:34:16.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_tunnel.c 2014-04-28 00:38:19.000000000 +0000 +@@ -659,13 +659,13 @@ + + max_headroom = LL_RESERVED_SPACE(tdev) + sizeof(struct iphdr) + + rt->dst.header_len; +- if (max_headroom > dev->needed_headroom) { ++ if (max_headroom > dev->needed_headroom) + dev->needed_headroom = max_headroom; +- if (skb_cow_head(skb, dev->needed_headroom)) { +- dev->stats.tx_dropped++; +- dev_kfree_skb(skb); +- return; +- } ++ ++ if (skb_cow_head(skb, dev->needed_headroom)) { ++ dev->stats.tx_dropped++; ++ dev_kfree_skb(skb); ++ return; + } + + skb_dst_drop(skb); +Index: linux-3.10-3.10.11/dummy/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1300_23d6f8dd1cc9ca2a3aaed9c6bb24f80b39e071df.txt 2014-04-28 00:38:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.patch 2014-04-28 00:38:20.000000000 +0000 @@ -0,0 +1,38 @@ +commit 20300db1bd1b9f45477c7af15b358deb87742bd1 +Author: Nicolas Dichtel +Date: Tue Oct 1 18:04:59 2013 +0200 + + sit: allow to use rtnl ops on fb tunnel + + [ Upstream commit 205983c43700ac3a81e7625273a3fa83cd2759b5 ] + + rtnl ops where introduced by ba3e3f50a0e5 ("sit: advertise tunnel param via + rtnl"), but I forget to assign rtnl ops to fb tunnels. + + Now that it is done, we must remove the explicit call to + unregister_netdevice_queue(), because the fallback tunnel is added to the queue + in sit_destroy_tunnels() when checking rtnl_link_ops of all netdevices (this + is valid since commit 5e6700b3bf98 ("sit: add support of x-netns")). + + Signed-off-by: Nicolas Dichtel + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/sit.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/sit.c 2014-04-28 00:38:12.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/sit.c 2014-04-28 00:38:20.000000000 +0000 +@@ -1561,6 +1561,7 @@ + goto err_alloc_dev; + } + dev_net_set(sitn->fb_tunnel_dev, net); ++ sitn->fb_tunnel_dev->rtnl_link_ops = &sit_link_ops; + + err = ipip6_fb_tunnel_init(sitn->fb_tunnel_dev); + if (err) +Index: linux-3.10-3.10.11/dummy/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1301_20300db1bd1b9f45477c7af15b358deb87742bd1.txt 2014-04-28 00:38:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.patch --- linux-3.10.11/debian/patches/rpi/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.patch 2014-04-28 00:38:21.000000000 +0000 @@ -0,0 +1,38 @@ +commit 506cdb8909a1a739c7585c680c6bd4b3d1247564 +Author: Nicolas Dichtel +Date: Tue Oct 1 18:05:00 2013 +0200 + + ip6tnl: allow to use rtnl ops on fb tunnel + + [ Upstream commit bb8140947a247b9aa15652cc24dc555ebb0b64b0 ] + + rtnl ops where introduced by c075b13098b3 ("ip6tnl: advertise tunnel param via + rtnl"), but I forget to assign rtnl ops to fb tunnels. + + Now that it is done, we must remove the explicit call to + unregister_netdevice_queue(), because the fallback tunnel is added to the queue + in ip6_tnl_destroy_tunnels() when checking rtnl_link_ops of all netdevices (this + is valid since commit 0bd8762824e7 ("ip6tnl: add x-netns support")). + + Signed-off-by: Nicolas Dichtel + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/ip6_tunnel.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_tunnel.c 2014-04-28 00:38:06.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_tunnel.c 2014-04-28 00:38:20.000000000 +0000 +@@ -1732,6 +1732,7 @@ + if (!ip6n->fb_tnl_dev) + goto err_alloc_dev; + dev_net_set(ip6n->fb_tnl_dev, net); ++ ip6n->fb_tnl_dev->rtnl_link_ops = &ip6_link_ops; + + err = ip6_fb_tnl_dev_init(ip6n->fb_tnl_dev); + if (err < 0) +Index: linux-3.10-3.10.11/dummy/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1302_506cdb8909a1a739c7585c680c6bd4b3d1247564.txt 2014-04-28 00:38:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.patch --- linux-3.10.11/debian/patches/rpi/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.patch 2014-04-28 00:38:22.000000000 +0000 @@ -0,0 +1,75 @@ +commit fd728b3e6bd0153c78425052da773c95f3fcf332 +Author: Gabor Juhos +Date: Wed Sep 25 15:32:35 2013 +0200 + + avr32: fix clockevents kernel warning + + commit 1b0135b5e20c56b2edae29e92b91c0b12c983432 upstream. + + Since commit 01426478df3a8791ff5c8b6b82d409e699cfaf38 + (avr32: Use generic idle loop) the kernel throws the + following warning on avr32: + + WARNING: at 900322e4 [verbose debug info unavailable] + Modules linked in: + CPU: 0 PID: 0 Comm: swapper Not tainted 3.12.0-rc2 #117 + task: 901c3ecc ti: 901c0000 task.ti: 901c0000 + PC is at cpu_idle_poll_ctrl+0x1c/0x38 + LR is at comparator_mode+0x3e/0x40 + pc : [<900322e4>] lr : [<90014882>] Not tainted + sp : 901c1f74 r12: 00000000 r11: 901c74a0 + r10: 901d2510 r9 : 00000001 r8 : 901db4de + r7 : 901c74a0 r6 : 00000001 r5 : 00410020 r4 : 901db574 + r3 : 00410024 r2 : 90206fe0 r1 : 00000000 r0 : 007f0000 + Flags: qvnzc + Mode bits: hjmde....G + CPU Mode: Supervisor + Call trace: + [<90039ede>] clockevents_set_mode+0x16/0x2e + [<90039f00>] clockevents_shutdown+0xa/0x1e + [<9003a078>] clockevents_exchange_device+0x58/0x70 + [<9003a78c>] tick_check_new_device+0x38/0x54 + [<9003a1a2>] clockevents_register_device+0x32/0x90 + [<900035c4>] time_init+0xa8/0x108 + [<90000520>] start_kernel+0x128/0x23c + + When the 'avr32_comparator' clockevent device is registered, + the clockevent core sets the mode of that clockevent device + to CLOCK_EVT_MODE_SHUTDOWN. Due to this, the 'comparator_mode' + function calls the 'cpu_idle_poll_ctrl' to disables idle poll. + This results in the aforementioned warning because the polling + is not enabled yet. + + Change the code to only disable idle poll if it is enabled by + the same function to avoid the warning. + + Signed-off-by: Gabor Juhos + Acked-by: Hans-Christian Egtvedt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/avr32/kernel/time.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/avr32/kernel/time.c 2014-04-27 23:38:51.000000000 +0000 ++++ linux-3.10-3.10.11/arch/avr32/kernel/time.c 2014-04-28 00:38:21.000000000 +0000 +@@ -98,7 +98,14 @@ + case CLOCK_EVT_MODE_SHUTDOWN: + sysreg_write(COMPARE, 0); + pr_debug("%s: stop\n", evdev->name); +- cpu_idle_poll_ctrl(false); ++ if (evdev->mode == CLOCK_EVT_MODE_ONESHOT || ++ evdev->mode == CLOCK_EVT_MODE_RESUME) { ++ /* ++ * Only disable idle poll if we have forced that ++ * in a previous call. ++ */ ++ cpu_idle_poll_ctrl(false); ++ } + break; + default: + BUG(); +Index: linux-3.10-3.10.11/dummy/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1303_fd728b3e6bd0153c78425052da773c95f3fcf332.txt 2014-04-28 00:38:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.patch --- linux-3.10.11/debian/patches/rpi/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.patch 2014-04-28 00:38:22.000000000 +0000 @@ -0,0 +1,143 @@ +commit cc748eed10e7e91c4fbc3a4503537f5748342b16 +Author: Dan Aloni +Date: Mon Sep 30 13:45:02 2013 -0700 + + fs/binfmt_elf.c: prevent a coredump with a large vm_map_count from Oopsing + + commit 72023656961b8c81a168a7a6762d589339d0d7ec upstream. + + A high setting of max_map_count, and a process core-dumping with a large + enough vm_map_count could result in an NT_FILE note not being written, + and the kernel crashing immediately later because it has assumed + otherwise. + + Reproduction of the oops-causing bug described here: + + https://lkml.org/lkml/2013/8/30/50 + + Rge ussue originated in commit 2aa362c49c31 ("coredump: extend core dump + note section to contain file names of mapped file") from Oct 4, 2012. + + This patch make that section optional in that case. fill_files_note() + should signify the error, and also let the info struct in + elf_core_dump() be zero-initialized so that we can check for the + optionally written note. + + [akpm@linux-foundation.org: avoid abusing E2BIG, remove a couple of not-really-needed local variables] + [akpm@linux-foundation.org: fix sparse warning] + Signed-off-by: Dan Aloni + Cc: Al Viro + Cc: Denys Vlasenko + Reported-by: Martin MOKREJS + Tested-by: Martin MOKREJS + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/binfmt_elf.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/binfmt_elf.c 2014-04-27 23:38:50.000000000 +0000 ++++ linux-3.10-3.10.11/fs/binfmt_elf.c 2014-04-28 00:38:22.000000000 +0000 +@@ -1415,7 +1415,7 @@ + * long file_ofs + * followed by COUNT filenames in ASCII: "FILE1" NUL "FILE2" NUL... + */ +-static void fill_files_note(struct memelfnote *note) ++static int fill_files_note(struct memelfnote *note) + { + struct vm_area_struct *vma; + unsigned count, size, names_ofs, remaining, n; +@@ -1430,11 +1430,11 @@ + names_ofs = (2 + 3 * count) * sizeof(data[0]); + alloc: + if (size >= MAX_FILE_NOTE_SIZE) /* paranoia check */ +- goto err; ++ return -EINVAL; + size = round_up(size, PAGE_SIZE); + data = vmalloc(size); + if (!data) +- goto err; ++ return -ENOMEM; + + start_end_ofs = data + 2; + name_base = name_curpos = ((char *)data) + names_ofs; +@@ -1487,7 +1487,7 @@ + + size = name_curpos - (char *)data; + fill_note(note, "CORE", NT_FILE, size, data); +- err: ; ++ return 0; + } + + #ifdef CORE_DUMP_USE_REGSET +@@ -1688,8 +1688,8 @@ + fill_auxv_note(&info->auxv, current->mm); + info->size += notesize(&info->auxv); + +- fill_files_note(&info->files); +- info->size += notesize(&info->files); ++ if (fill_files_note(&info->files) == 0) ++ info->size += notesize(&info->files); + + return 1; + } +@@ -1721,7 +1721,8 @@ + return 0; + if (first && !writenote(&info->auxv, file, foffset)) + return 0; +- if (first && !writenote(&info->files, file, foffset)) ++ if (first && info->files.data && ++ !writenote(&info->files, file, foffset)) + return 0; + + for (i = 1; i < info->thread_notes; ++i) +@@ -1808,6 +1809,7 @@ + + struct elf_note_info { + struct memelfnote *notes; ++ struct memelfnote *notes_files; + struct elf_prstatus *prstatus; /* NT_PRSTATUS */ + struct elf_prpsinfo *psinfo; /* NT_PRPSINFO */ + struct list_head thread_list; +@@ -1898,9 +1900,12 @@ + + fill_siginfo_note(info->notes + 2, &info->csigdata, siginfo); + fill_auxv_note(info->notes + 3, current->mm); +- fill_files_note(info->notes + 4); ++ info->numnote = 4; + +- info->numnote = 5; ++ if (fill_files_note(info->notes + info->numnote) == 0) { ++ info->notes_files = info->notes + info->numnote; ++ info->numnote++; ++ } + + /* Try to dump the FPU. */ + info->prstatus->pr_fpvalid = elf_core_copy_task_fpregs(current, regs, +@@ -1962,8 +1967,9 @@ + kfree(list_entry(tmp, struct elf_thread_status, list)); + } + +- /* Free data allocated by fill_files_note(): */ +- vfree(info->notes[4].data); ++ /* Free data possibly allocated by fill_files_note(): */ ++ if (info->notes_files) ++ vfree(info->notes_files->data); + + kfree(info->prstatus); + kfree(info->psinfo); +@@ -2046,7 +2052,7 @@ + struct vm_area_struct *vma, *gate_vma; + struct elfhdr *elf = NULL; + loff_t offset = 0, dataoff, foffset; +- struct elf_note_info info; ++ struct elf_note_info info = { }; + struct elf_phdr *phdr4note = NULL; + struct elf_shdr *shdr4extnum = NULL; + Elf_Half e_phnum; +Index: linux-3.10-3.10.11/dummy/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1304_cc748eed10e7e91c4fbc3a4503537f5748342b16.txt 2014-04-28 00:38:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.patch 2014-04-28 00:38:23.000000000 +0000 @@ -0,0 +1,167 @@ +commit 9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7 +Author: Javier Martinez Canillas +Date: Wed Sep 25 02:36:52 2013 +0200 + + gpio/omap: maintain GPIO and IRQ usage separately + + commit fa365e4d729065b5e85165df3dc9699ed47489cc upstream. + + The GPIO OMAP controller pins can be used as IRQ and GPIO + independently so is necessary to keep track GPIO pins and + IRQ lines usage separately to make sure that the bank will + always be enabled while being used. + + Also move gpio_is_input() definition in preparation for the + next patch that setups the controller's irq_chip driver when + a caller requests an interrupt line. + + Acked-by: Stephen Warren + Tested-by: George Cherian + Tested-by: Aaro Koskinen + Tested-by: Lars Poeschel + Reviewed-by: Kevin Hilman + Tested-by: Kevin Hilman + Acked-by: Santosh Shilimkar + Acked-by: Tony Lindgren + Signed-off-by: Javier Martinez Canillas + Signed-off-by: Linus Walleij + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpio/gpio-omap.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpio/gpio-omap.c 2014-04-27 23:38:50.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpio/gpio-omap.c 2014-04-28 00:38:23.000000000 +0000 +@@ -63,6 +63,7 @@ + struct gpio_chip chip; + struct clk *dbck; + u32 mod_usage; ++ u32 irq_usage; + u32 dbck_enable_mask; + bool dbck_enabled; + struct device *dev; +@@ -86,6 +87,9 @@ + #define GPIO_BIT(bank, gpio) (1 << GPIO_INDEX(bank, gpio)) + #define GPIO_MOD_CTRL_BIT BIT(0) + ++#define BANK_USED(bank) (bank->mod_usage || bank->irq_usage) ++#define LINE_USED(line, offset) (line & (1 << offset)) ++ + static int irq_to_gpio(struct gpio_bank *bank, unsigned int gpio_irq) + { + return bank->chip.base + gpio_irq; +@@ -420,6 +424,13 @@ + return 0; + } + ++static int gpio_is_input(struct gpio_bank *bank, int mask) ++{ ++ void __iomem *reg = bank->base + bank->regs->direction; ++ ++ return __raw_readl(reg) & mask; ++} ++ + static int gpio_irq_type(struct irq_data *d, unsigned type) + { + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); +@@ -427,7 +438,7 @@ + int retval; + unsigned long flags; + +- if (WARN_ON(!bank->mod_usage)) ++ if (WARN_ON(!BANK_USED(bank))) + return -EINVAL; + + #ifdef CONFIG_ARCH_OMAP1 +@@ -447,6 +458,7 @@ + + spin_lock_irqsave(&bank->lock, flags); + retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); ++ bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio); + spin_unlock_irqrestore(&bank->lock, flags); + + if (type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) +@@ -603,7 +615,7 @@ + * If this is the first gpio_request for the bank, + * enable the bank module. + */ +- if (!bank->mod_usage) ++ if (!BANK_USED(bank)) + pm_runtime_get_sync(bank->dev); + + spin_lock_irqsave(&bank->lock, flags); +@@ -619,7 +631,7 @@ + __raw_writel(__raw_readl(reg) | (1 << offset), reg); + } + +- if (bank->regs->ctrl && !bank->mod_usage) { ++ if (bank->regs->ctrl && !BANK_USED(bank)) { + void __iomem *reg = bank->base + bank->regs->ctrl; + u32 ctrl; + +@@ -654,7 +666,7 @@ + + bank->mod_usage &= ~(1 << offset); + +- if (bank->regs->ctrl && !bank->mod_usage) { ++ if (bank->regs->ctrl && !BANK_USED(bank)) { + void __iomem *reg = bank->base + bank->regs->ctrl; + u32 ctrl; + +@@ -672,7 +684,7 @@ + * If this is the last gpio to be freed in the bank, + * disable the bank module. + */ +- if (!bank->mod_usage) ++ if (!BANK_USED(bank)) + pm_runtime_put(bank->dev); + } + +@@ -762,8 +774,10 @@ + struct gpio_bank *bank = irq_data_get_irq_chip_data(d); + unsigned int gpio = irq_to_gpio(bank, d->hwirq); + unsigned long flags; ++ unsigned offset = GPIO_INDEX(bank, gpio); + + spin_lock_irqsave(&bank->lock, flags); ++ bank->irq_usage &= ~(1 << offset); + _reset_gpio(bank, gpio); + spin_unlock_irqrestore(&bank->lock, flags); + } +@@ -897,13 +911,6 @@ + return 0; + } + +-static int gpio_is_input(struct gpio_bank *bank, int mask) +-{ +- void __iomem *reg = bank->base + bank->regs->direction; +- +- return __raw_readl(reg) & mask; +-} +- + static int gpio_get(struct gpio_chip *chip, unsigned offset) + { + struct gpio_bank *bank; +@@ -1400,7 +1407,7 @@ + struct gpio_bank *bank; + + list_for_each_entry(bank, &omap_gpio_list, node) { +- if (!bank->mod_usage || !bank->loses_context) ++ if (!BANK_USED(bank) || !bank->loses_context) + continue; + + bank->power_mode = pwr_mode; +@@ -1414,7 +1421,7 @@ + struct gpio_bank *bank; + + list_for_each_entry(bank, &omap_gpio_list, node) { +- if (!bank->mod_usage || !bank->loses_context) ++ if (!BANK_USED(bank) || !bank->loses_context) + continue; + + pm_runtime_get_sync(bank->dev); +Index: linux-3.10-3.10.11/dummy/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1305_9dbd65f3bc7a1d75d474528360cfcb2f8816f5b7.txt 2014-04-28 00:38:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.patch --- linux-3.10.11/debian/patches/rpi/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.patch 2014-04-28 00:38:24.000000000 +0000 @@ -0,0 +1,240 @@ +commit 517ff99417cf9a27a6c4f34f99977505d9928785 +Author: Javier Martinez Canillas +Date: Wed Sep 25 02:36:54 2013 +0200 + + gpio/omap: auto-setup a GPIO when used as an IRQ + + commit fac7fa162a19100298d5d91359960037dc5bfca9 upstream. + + The OMAP GPIO controller HW requires a pin to be configured in GPIO + input mode in order to operate as an interrupt input. Since drivers + should not be aware of whether an interrupt pin is also a GPIO or not, + the HW should be fully configured/enabled as an IRQ if a driver solely + uses IRQ APIs such as request_irq(), and never calls any GPIO-related + APIs. As such, add the missing HW setup to the OMAP GPIO controller's + irq_chip driver. + + Since this bypasses the GPIO subsystem we have to ensure that another + driver won't be able to request the same GPIO pin that is used as an + IRQ and set its direction as output. Requesting the GPIO and setting + its direction as input is allowed though. + + This fixes smsc911x ethernet support for tobi and igep OMAP3 boards + and OMAP4 SDP SPI based ethernet that use a GPIO as an interrupt line. + + Acked-by: Stephen Warren + Tested-by: George Cherian + Tested-by: Aaro Koskinen + Tested-by: Lars Poeschel + Reviewed-by: Kevin Hilman + Tested-by: Kevin Hilman + Acked-by: Santosh Shilimkar + Acked-by: Tony Lindgren + Signed-off-by: Javier Martinez Canillas + Signed-off-by: Linus Walleij + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpio/gpio-omap.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpio/gpio-omap.c 2014-04-28 00:38:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpio/gpio-omap.c 2014-04-28 00:38:23.000000000 +0000 +@@ -424,6 +424,52 @@ + return 0; + } + ++static void _enable_gpio_module(struct gpio_bank *bank, unsigned offset) ++{ ++ if (bank->regs->pinctrl) { ++ void __iomem *reg = bank->base + bank->regs->pinctrl; ++ ++ /* Claim the pin for MPU */ ++ __raw_writel(__raw_readl(reg) | (1 << offset), reg); ++ } ++ ++ if (bank->regs->ctrl && !BANK_USED(bank)) { ++ void __iomem *reg = bank->base + bank->regs->ctrl; ++ u32 ctrl; ++ ++ ctrl = __raw_readl(reg); ++ /* Module is enabled, clocks are not gated */ ++ ctrl &= ~GPIO_MOD_CTRL_BIT; ++ __raw_writel(ctrl, reg); ++ bank->context.ctrl = ctrl; ++ } ++} ++ ++static void _disable_gpio_module(struct gpio_bank *bank, unsigned offset) ++{ ++ void __iomem *base = bank->base; ++ ++ if (bank->regs->wkup_en && ++ !LINE_USED(bank->mod_usage, offset) && ++ !LINE_USED(bank->irq_usage, offset)) { ++ /* Disable wake-up during idle for dynamic tick */ ++ _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); ++ bank->context.wake_en = ++ __raw_readl(bank->base + bank->regs->wkup_en); ++ } ++ ++ if (bank->regs->ctrl && !BANK_USED(bank)) { ++ void __iomem *reg = bank->base + bank->regs->ctrl; ++ u32 ctrl; ++ ++ ctrl = __raw_readl(reg); ++ /* Module is disabled, clocks are gated */ ++ ctrl |= GPIO_MOD_CTRL_BIT; ++ __raw_writel(ctrl, reg); ++ bank->context.ctrl = ctrl; ++ } ++} ++ + static int gpio_is_input(struct gpio_bank *bank, int mask) + { + void __iomem *reg = bank->base + bank->regs->direction; +@@ -437,9 +483,10 @@ + unsigned gpio = 0; + int retval; + unsigned long flags; ++ unsigned offset; + +- if (WARN_ON(!BANK_USED(bank))) +- return -EINVAL; ++ if (!BANK_USED(bank)) ++ pm_runtime_get_sync(bank->dev); + + #ifdef CONFIG_ARCH_OMAP1 + if (d->irq > IH_MPUIO_BASE) +@@ -457,7 +504,16 @@ + return -EINVAL; + + spin_lock_irqsave(&bank->lock, flags); +- retval = _set_gpio_triggering(bank, GPIO_INDEX(bank, gpio), type); ++ offset = GPIO_INDEX(bank, gpio); ++ retval = _set_gpio_triggering(bank, offset, type); ++ if (!LINE_USED(bank->mod_usage, offset)) { ++ _enable_gpio_module(bank, offset); ++ _set_gpio_direction(bank, offset, 1); ++ } else if (!gpio_is_input(bank, 1 << offset)) { ++ spin_unlock_irqrestore(&bank->lock, flags); ++ return -EINVAL; ++ } ++ + bank->irq_usage |= 1 << GPIO_INDEX(bank, gpio); + spin_unlock_irqrestore(&bank->lock, flags); + +@@ -620,30 +676,14 @@ + + spin_lock_irqsave(&bank->lock, flags); + /* Set trigger to none. You need to enable the desired trigger with +- * request_irq() or set_irq_type(). ++ * request_irq() or set_irq_type(). Only do this if the IRQ line has ++ * not already been requested. + */ +- _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); +- +- if (bank->regs->pinctrl) { +- void __iomem *reg = bank->base + bank->regs->pinctrl; +- +- /* Claim the pin for MPU */ +- __raw_writel(__raw_readl(reg) | (1 << offset), reg); ++ if (!LINE_USED(bank->irq_usage, offset)) { ++ _set_gpio_triggering(bank, offset, IRQ_TYPE_NONE); ++ _enable_gpio_module(bank, offset); + } +- +- if (bank->regs->ctrl && !BANK_USED(bank)) { +- void __iomem *reg = bank->base + bank->regs->ctrl; +- u32 ctrl; +- +- ctrl = __raw_readl(reg); +- /* Module is enabled, clocks are not gated */ +- ctrl &= ~GPIO_MOD_CTRL_BIT; +- __raw_writel(ctrl, reg); +- bank->context.ctrl = ctrl; +- } +- + bank->mod_usage |= 1 << offset; +- + spin_unlock_irqrestore(&bank->lock, flags); + + return 0; +@@ -652,31 +692,11 @@ + static void omap_gpio_free(struct gpio_chip *chip, unsigned offset) + { + struct gpio_bank *bank = container_of(chip, struct gpio_bank, chip); +- void __iomem *base = bank->base; + unsigned long flags; + + spin_lock_irqsave(&bank->lock, flags); +- +- if (bank->regs->wkup_en) { +- /* Disable wake-up during idle for dynamic tick */ +- _gpio_rmw(base, bank->regs->wkup_en, 1 << offset, 0); +- bank->context.wake_en = +- __raw_readl(bank->base + bank->regs->wkup_en); +- } +- + bank->mod_usage &= ~(1 << offset); +- +- if (bank->regs->ctrl && !BANK_USED(bank)) { +- void __iomem *reg = bank->base + bank->regs->ctrl; +- u32 ctrl; +- +- ctrl = __raw_readl(reg); +- /* Module is disabled, clocks are gated */ +- ctrl |= GPIO_MOD_CTRL_BIT; +- __raw_writel(ctrl, reg); +- bank->context.ctrl = ctrl; +- } +- ++ _disable_gpio_module(bank, offset); + _reset_gpio(bank, bank->chip.base + offset); + spin_unlock_irqrestore(&bank->lock, flags); + +@@ -778,8 +798,16 @@ + + spin_lock_irqsave(&bank->lock, flags); + bank->irq_usage &= ~(1 << offset); ++ _disable_gpio_module(bank, offset); + _reset_gpio(bank, gpio); + spin_unlock_irqrestore(&bank->lock, flags); ++ ++ /* ++ * If this is the last IRQ to be freed in the bank, ++ * disable the bank module. ++ */ ++ if (!BANK_USED(bank)) ++ pm_runtime_put(bank->dev); + } + + static void gpio_ack_irq(struct irq_data *d) +@@ -929,13 +957,22 @@ + { + struct gpio_bank *bank; + unsigned long flags; ++ int retval = 0; + + bank = container_of(chip, struct gpio_bank, chip); + spin_lock_irqsave(&bank->lock, flags); ++ ++ if (LINE_USED(bank->irq_usage, offset)) { ++ retval = -EINVAL; ++ goto exit; ++ } ++ + bank->set_dataout(bank, offset, value); + _set_gpio_direction(bank, offset, 0); ++ ++exit: + spin_unlock_irqrestore(&bank->lock, flags); +- return 0; ++ return retval; + } + + static int gpio_debounce(struct gpio_chip *chip, unsigned offset, +Index: linux-3.10-3.10.11/dummy/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1306_517ff99417cf9a27a6c4f34f99977505d9928785.txt 2014-04-28 00:38:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.patch --- linux-3.10.11/debian/patches/rpi/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.patch 2014-04-28 00:38:25.000000000 +0000 @@ -0,0 +1,44 @@ +commit 9cea6e1ab0be55708d4aacf62dd69f99c700b9ab +Author: Dan Carpenter +Date: Fri Sep 13 10:52:14 2013 +0300 + + ASoC: max98095: a couple array underflows + + commit f8d7b13e14357ed19d2ca2799539600418dc3939 upstream. + + The ->put() function are called from snd_ctl_elem_write() with user + supplied data. The limit checks here could underflow leading to a + crash. + + Signed-off-by: Dan Carpenter + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/max98095.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/max98095.c 2014-04-27 23:38:49.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/max98095.c 2014-04-28 00:38:24.000000000 +0000 +@@ -1863,7 +1863,7 @@ + struct max98095_pdata *pdata = max98095->pdata; + int channel = max98095_get_eq_channel(kcontrol->id.name); + struct max98095_cdata *cdata; +- int sel = ucontrol->value.integer.value[0]; ++ unsigned int sel = ucontrol->value.integer.value[0]; + struct max98095_eq_cfg *coef_set; + int fs, best, best_val, i; + int regmask, regsave; +@@ -2016,7 +2016,7 @@ + struct max98095_pdata *pdata = max98095->pdata; + int channel = max98095_get_bq_channel(codec, kcontrol->id.name); + struct max98095_cdata *cdata; +- int sel = ucontrol->value.integer.value[0]; ++ unsigned int sel = ucontrol->value.integer.value[0]; + struct max98095_biquad_cfg *coef_set; + int fs, best, best_val, i; + int regmask, regsave; +Index: linux-3.10-3.10.11/dummy/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1307_9cea6e1ab0be55708d4aacf62dd69f99c700b9ab.txt 2014-04-28 00:38:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.patch --- linux-3.10.11/debian/patches/rpi/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.patch 2014-04-28 00:38:25.000000000 +0000 @@ -0,0 +1,35 @@ +commit 7fe5daa3a267dc44677e471c3de88b8653aae541 +Author: Dan Carpenter +Date: Fri Sep 13 10:52:49 2013 +0300 + + ASoC: 88pm860x: array overflow in snd_soc_put_volsw_2r_st() + + commit d967967e8d1116fb38bad25e58714b5dddd03cca upstream. + + This is called from snd_ctl_elem_write() with user supplied data so we + need to add some bounds checking. + + Signed-off-by: Dan Carpenter + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/88pm860x-codec.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/88pm860x-codec.c 2014-04-27 23:38:49.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/88pm860x-codec.c 2014-04-28 00:38:25.000000000 +0000 +@@ -351,6 +351,9 @@ + val = ucontrol->value.integer.value[0]; + val2 = ucontrol->value.integer.value[1]; + ++ if (val >= ARRAY_SIZE(st_table) || val2 >= ARRAY_SIZE(st_table)) ++ return -EINVAL; ++ + err = snd_soc_update_bits(codec, reg, 0x3f, st_table[val].m); + if (err < 0) + return err; +Index: linux-3.10-3.10.11/dummy/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1308_7fe5daa3a267dc44677e471c3de88b8653aae541.txt 2014-04-28 00:38:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.patch --- linux-3.10.11/debian/patches/rpi/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.patch 2014-04-28 00:38:26.000000000 +0000 @@ -0,0 +1,46 @@ +commit 7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab +Author: Dan Carpenter +Date: Fri Sep 13 10:53:36 2013 +0300 + + ASoC: ab8500-codec: info leak in anc_status_control_put() + + commit d63733aed90b432e5cc489ddfa28e342f91b4652 upstream. + + If the user passes an invalid value it leads to an info leak when we + print the error message or it could oops. This is called with user + supplied data from snd_ctl_elem_write(). + + Signed-off-by: Dan Carpenter + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/ab8500-codec.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/ab8500-codec.c 2014-04-27 23:38:49.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/ab8500-codec.c 2014-04-28 00:38:26.000000000 +0000 +@@ -1225,13 +1225,18 @@ + struct ab8500_codec_drvdata *drvdata = dev_get_drvdata(codec->dev); + struct device *dev = codec->dev; + bool apply_fir, apply_iir; +- int req, status; ++ unsigned int req; ++ int status; + + dev_dbg(dev, "%s: Enter.\n", __func__); + + mutex_lock(&drvdata->anc_lock); + + req = ucontrol->value.integer.value[0]; ++ if (req >= ARRAY_SIZE(enum_anc_state)) { ++ status = -EINVAL; ++ goto cleanup; ++ } + if (req != ANC_APPLY_FIR_IIR && req != ANC_APPLY_FIR && + req != ANC_APPLY_IIR) { + dev_err(dev, "%s: ERROR: Unsupported status to set '%s'!\n", +Index: linux-3.10-3.10.11/dummy/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1309_7a7e86e4ef76e20e0e945c8216bbb0afa695d8ab.txt 2014-04-28 00:38:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.patch --- linux-3.10.11/debian/patches/rpi/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.patch 2014-04-28 00:38:27.000000000 +0000 @@ -0,0 +1,50 @@ +commit e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25 +Author: Nishanth Aravamudan +Date: Tue Oct 1 14:04:53 2013 -0700 + + powerpc/iommu: Use GFP_KERNEL instead of GFP_ATOMIC in iommu_init_table() + + commit 1cf389df090194a0976dc867b7fffe99d9d490cb upstream. + + Under heavy (DLPAR?) stress, we tripped this panic() in + arch/powerpc/kernel/iommu.c::iommu_init_table(): + + page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz)); + if (!page) + panic("iommu_init_table: Can't allocate %ld bytes\n", sz); + + Before the panic() we got a page allocation failure for an order-2 + allocation. There appears to be memory free, but perhaps not in the + ATOMIC context. I looked through all the call-sites of + iommu_init_table() and didn't see any obvious reason to need an ATOMIC + allocation. Most call-sites in fact have an explicit GFP_KERNEL + allocation shortly before the call to iommu_init_table(), indicating we + are not in an atomic context. There is some indirection for some paths, + but I didn't see any locks indicating that GFP_KERNEL is inappropriate. + + With this change under the same conditions, we have not been able to + reproduce the panic. + + Signed-off-by: Nishanth Aravamudan + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kernel/iommu.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/iommu.c 2014-04-27 23:38:48.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/iommu.c 2014-04-28 00:38:27.000000000 +0000 +@@ -658,7 +658,7 @@ + /* number of bytes needed for the bitmap */ + sz = BITS_TO_LONGS(tbl->it_size) * sizeof(unsigned long); + +- page = alloc_pages_node(nid, GFP_ATOMIC, get_order(sz)); ++ page = alloc_pages_node(nid, GFP_KERNEL, get_order(sz)); + if (!page) + panic("iommu_init_table: Can't allocate %ld bytes\n", sz); + tbl->it_map = page_address(page); +Index: linux-3.10-3.10.11/dummy/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1310_e98d86aaa251cbd7c9745a3743ec4fa0c7c54c25.txt 2014-04-28 00:38:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.patch --- linux-3.10.11/debian/patches/rpi/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.patch 2014-04-28 00:38:28.000000000 +0000 @@ -0,0 +1,55 @@ +commit 09bee3bc290da5f7f39b62f65f1a3deeaa3834ac +Author: Michael Ellerman +Date: Wed Oct 2 18:04:06 2013 +1000 + + powerpc/perf: Fix handling of FAB events + + commit a53b27b3abeef406de92a2bb0ceb6fb4c3fb8fc4 upstream. + + Commit 4df4899 "Add power8 EBB support" included a bug in the handling + of the FAB_CRESP_MATCH and FAB_TYPE_MATCH fields. + + These values are pulled out of the event code using EVENT_THR_CTL_SHIFT, + however we were then or'ing that value directly into MMCR1. + + This meant we were failing to set the FAB fields correctly, and also + potentially corrupting the value for PMC4SEL. Leading to no counts for + the FAB events and incorrect counts for PMC4. + + The fix is simply to shift left the FAB value correctly before or'ing it + with MMCR1. + + Reported-by: Sooraj Ravindran Nair + Signed-off-by: Michael Ellerman + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/perf/power8-pmu.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/perf/power8-pmu.c 2014-04-27 23:38:48.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/perf/power8-pmu.c 2014-04-28 00:38:27.000000000 +0000 +@@ -194,6 +194,7 @@ + #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) + #define MMCR1_COMBINE_SHIFT(pmc) (35 - ((pmc) - 1)) + #define MMCR1_PMCSEL_SHIFT(pmc) (24 - (((pmc) - 1)) * 8) ++#define MMCR1_FAB_SHIFT 36 + #define MMCR1_DC_QUAL_SHIFT 47 + #define MMCR1_IC_QUAL_SHIFT 46 + +@@ -367,8 +368,8 @@ + * the threshold bits are used for the match value. + */ + if (event_is_fab_match(event[i])) { +- mmcr1 |= (event[i] >> EVENT_THR_CTL_SHIFT) & +- EVENT_THR_CTL_MASK; ++ mmcr1 |= ((event[i] >> EVENT_THR_CTL_SHIFT) & ++ EVENT_THR_CTL_MASK) << MMCR1_FAB_SHIFT; + } else { + val = (event[i] >> EVENT_THR_CTL_SHIFT) & EVENT_THR_CTL_MASK; + mmcra |= val << MMCRA_THR_CTL_SHIFT; +Index: linux-3.10-3.10.11/dummy/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1311_09bee3bc290da5f7f39b62f65f1a3deeaa3834ac.txt 2014-04-28 00:38:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.patch --- linux-3.10.11/debian/patches/rpi/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.patch 2014-04-28 00:38:29.000000000 +0000 @@ -0,0 +1,214 @@ +commit 72daf965bb8fe1447069db3ea511047f20eca947 +Author: Michael Neuling +Date: Thu Sep 26 13:29:09 2013 +1000 + + powerpc/tm: Switch out userspace PPR and DSCR sooner + + commit e9bdc3d6143d1c4b8d8ce5231fc958268331f983 upstream. + + When we do a treclaim or trecheckpoint we end up running with userspace + PPR and DSCR values. Currently we don't do anything special to avoid + running with user values which could cause a severe performance + degradation. + + This patch moves the PPR and DSCR save and restore around treclaim and + trecheckpoint so that we run with user values for a much shorter period. + More care is taken with the PPR as it's impact is greater than the DSCR. + + This is similar to user exceptions, where we run HTM_MEDIUM early to + ensure that we don't run with a userspace PPR values in the kernel. + + Signed-off-by: Michael Neuling + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kernel/tm.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/tm.S 2014-04-27 23:38:48.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/tm.S 2014-04-28 00:38:28.000000000 +0000 +@@ -79,6 +79,11 @@ + TABORT(R3) + blr + ++ .section ".toc","aw" ++DSCR_DEFAULT: ++ .tc dscr_default[TC],dscr_default ++ ++ .section ".text" + + /* void tm_reclaim(struct thread_struct *thread, + * unsigned long orig_msr, +@@ -178,11 +183,18 @@ + std r1, PACATMSCRATCH(r13) + ld r1, PACAR1(r13) + ++ /* Store the PPR in r11 and reset to decent value */ ++ std r11, GPR11(r1) /* Temporary stash */ ++ mfspr r11, SPRN_PPR ++ HMT_MEDIUM ++ + /* Now get some more GPRS free */ + std r7, GPR7(r1) /* Temporary stash */ + std r12, GPR12(r1) /* '' '' '' */ + ld r12, STACK_PARAM(0)(r1) /* Param 0, thread_struct * */ + ++ std r11, THREAD_TM_PPR(r12) /* Store PPR and free r11 */ ++ + addi r7, r12, PT_CKPT_REGS /* Thread's ckpt_regs */ + + /* Make r7 look like an exception frame so that we +@@ -194,15 +206,19 @@ + SAVE_GPR(0, r7) /* user r0 */ + SAVE_GPR(2, r7) /* user r2 */ + SAVE_4GPRS(3, r7) /* user r3-r6 */ +- SAVE_4GPRS(8, r7) /* user r8-r11 */ ++ SAVE_GPR(8, r7) /* user r8 */ ++ SAVE_GPR(9, r7) /* user r9 */ ++ SAVE_GPR(10, r7) /* user r10 */ + ld r3, PACATMSCRATCH(r13) /* user r1 */ + ld r4, GPR7(r1) /* user r7 */ +- ld r5, GPR12(r1) /* user r12 */ +- GET_SCRATCH0(6) /* user r13 */ ++ ld r5, GPR11(r1) /* user r11 */ ++ ld r6, GPR12(r1) /* user r12 */ ++ GET_SCRATCH0(8) /* user r13 */ + std r3, GPR1(r7) + std r4, GPR7(r7) +- std r5, GPR12(r7) +- std r6, GPR13(r7) ++ std r5, GPR11(r7) ++ std r6, GPR12(r7) ++ std r8, GPR13(r7) + + SAVE_NVGPRS(r7) /* user r14-r31 */ + +@@ -225,14 +241,12 @@ + std r6, _XER(r7) + + +- /* ******************** TAR, PPR, DSCR ********** */ ++ /* ******************** TAR, DSCR ********** */ + mfspr r3, SPRN_TAR +- mfspr r4, SPRN_PPR +- mfspr r5, SPRN_DSCR ++ mfspr r4, SPRN_DSCR + + std r3, THREAD_TM_TAR(r12) +- std r4, THREAD_TM_PPR(r12) +- std r5, THREAD_TM_DSCR(r12) ++ std r4, THREAD_TM_DSCR(r12) + + /* MSR and flags: We don't change CRs, and we don't need to alter + * MSR. +@@ -249,7 +263,7 @@ + std r3, THREAD_TM_TFHAR(r12) + std r4, THREAD_TM_TFIAR(r12) + +- /* AMR and PPR are checkpointed too, but are unsupported by Linux. */ ++ /* AMR is checkpointed too, but is unsupported by Linux. */ + + /* Restore original MSR/IRQ state & clear TM mode */ + ld r14, TM_FRAME_L0(r1) /* Orig MSR */ +@@ -265,6 +279,12 @@ + mtcr r4 + mtlr r0 + ld r2, 40(r1) ++ ++ /* Load system default DSCR */ ++ ld r4, DSCR_DEFAULT@toc(r2) ++ ld r0, 0(r4) ++ mtspr SPRN_DSCR, r0 ++ + blr + + +@@ -349,44 +369,50 @@ + + restore_gprs: + +- /* ******************** TAR, PPR, DSCR ********** */ +- ld r4, THREAD_TM_TAR(r3) +- ld r5, THREAD_TM_PPR(r3) +- ld r6, THREAD_TM_DSCR(r3) ++ /* ******************** CR,LR,CCR,MSR ********** */ ++ ld r4, _CTR(r7) ++ ld r5, _LINK(r7) ++ ld r6, _CCR(r7) ++ ld r8, _XER(r7) ++ ++ mtctr r4 ++ mtlr r5 ++ mtcr r6 ++ mtxer r8 + ++ /* ******************** TAR ******************** */ ++ ld r4, THREAD_TM_TAR(r3) + mtspr SPRN_TAR, r4 +- mtspr SPRN_PPR, r5 +- mtspr SPRN_DSCR, r6 + +- /* ******************** CR,LR,CCR,MSR ********** */ +- ld r3, _CTR(r7) +- ld r4, _LINK(r7) +- ld r5, _CCR(r7) +- ld r6, _XER(r7) +- +- mtctr r3 +- mtlr r4 +- mtcr r5 +- mtxer r6 ++ /* Load up the PPR and DSCR in GPRs only at this stage */ ++ ld r5, THREAD_TM_DSCR(r3) ++ ld r6, THREAD_TM_PPR(r3) + + /* MSR and flags: We don't change CRs, and we don't need to alter + * MSR. + */ + + REST_4GPRS(0, r7) /* GPR0-3 */ +- REST_GPR(4, r7) /* GPR4-6 */ +- REST_GPR(5, r7) +- REST_GPR(6, r7) ++ REST_GPR(4, r7) /* GPR4 */ + REST_4GPRS(8, r7) /* GPR8-11 */ + REST_2GPRS(12, r7) /* GPR12-13 */ + + REST_NVGPRS(r7) /* GPR14-31 */ + +- ld r7, GPR7(r7) /* GPR7 */ ++ /* Load up PPR and DSCR here so we don't run with user values for long ++ */ ++ mtspr SPRN_DSCR, r5 ++ mtspr SPRN_PPR, r6 ++ ++ REST_GPR(5, r7) /* GPR5-7 */ ++ REST_GPR(6, r7) ++ ld r7, GPR7(r7) + + /* Commit register state as checkpointed state: */ + TRECHKPT + ++ HMT_MEDIUM ++ + /* Our transactional state has now changed. + * + * Now just get out of here. Transactional (current) state will be +@@ -405,6 +431,12 @@ + mtcr r4 + mtlr r0 + ld r2, 40(r1) ++ ++ /* Load system default DSCR */ ++ ld r4, DSCR_DEFAULT@toc(r2) ++ ld r0, 0(r4) ++ mtspr SPRN_DSCR, r0 ++ + blr + + /* ****************************************************************** */ +Index: linux-3.10-3.10.11/dummy/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1312_72daf965bb8fe1447069db3ea511047f20eca947.txt 2014-04-28 00:38:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.patch 2014-04-28 00:38:29.000000000 +0000 @@ -0,0 +1,53 @@ +commit 470d4d6fe7349299ed565948e539260c4d0d041c +Author: Prarit Bhargava +Date: Mon Sep 23 09:33:36 2013 -0400 + + powerpc/vio: Fix modalias_show return values + + commit e82b89a6f19bae73fb064d1b3dd91fcefbb478f4 upstream. + + modalias_show() should return an empty string on error, not -ENODEV. + + This causes the following false and annoying error: + + > find /sys/devices -name modalias -print0 | xargs -0 cat >/dev/null + cat: /sys/devices/vio/4000/modalias: No such device + cat: /sys/devices/vio/4001/modalias: No such device + cat: /sys/devices/vio/4002/modalias: No such device + cat: /sys/devices/vio/4004/modalias: No such device + cat: /sys/devices/vio/modalias: No such device + + Signed-off-by: Prarit Bhargava + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kernel/vio.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/vio.c 2014-04-27 23:38:47.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/vio.c 2014-04-28 00:38:29.000000000 +0000 +@@ -1529,11 +1529,15 @@ + const char *cp; + + dn = dev->of_node; +- if (!dn) +- return -ENODEV; ++ if (!dn) { ++ strcat(buf, "\n"); ++ return strlen(buf); ++ } + cp = of_get_property(dn, "compatible", NULL); +- if (!cp) +- return -ENODEV; ++ if (!cp) { ++ strcat(buf, "\n"); ++ return strlen(buf); ++ } + + return sprintf(buf, "vio:T%sS%s\n", vio_dev->type, cp); + } +Index: linux-3.10-3.10.11/dummy/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1313_470d4d6fe7349299ed565948e539260c4d0d041c.txt 2014-04-28 00:38:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.patch 2014-04-28 00:38:30.000000000 +0000 @@ -0,0 +1,41 @@ +commit 65ddee385ba4ba923eeb64182963815dc24f7bc1 +Author: Paul E. McKenney +Date: Tue Oct 1 16:54:05 2013 +1000 + + powerpc: Fix parameter clobber in csum_partial_copy_generic() + + commit d9813c3681a36774b254c0cdc9cce53c9e22c756 upstream. + + The csum_partial_copy_generic() uses register r7 to adjust the remaining + bytes to process. Unfortunately, r7 also holds a parameter, namely the + address of the flag to set in case of access exceptions while reading + the source buffer. Lacking a quantum implementation of PowerPC, this + commit instead uses register r9 to do the adjusting, leaving r7's + pointer uncorrupted. + + Signed-off-by: Paul E. McKenney + Signed-off-by: Anton Blanchard + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/lib/checksum_64.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/lib/checksum_64.S 2014-04-27 23:38:47.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/lib/checksum_64.S 2014-04-28 00:38:30.000000000 +0000 +@@ -269,8 +269,8 @@ + rldicl. r6,r3,64-1,64-2 /* r6 = (r3 & 0x3) >> 1 */ + beq .Lcopy_aligned + +- li r7,4 +- sub r6,r7,r6 ++ li r9,4 ++ sub r6,r9,r6 + mtctr r6 + + 1: +Index: linux-3.10-3.10.11/dummy/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1314_65ddee385ba4ba923eeb64182963815dc24f7bc1.txt 2014-04-28 00:38:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.patch 2014-04-28 00:38:31.000000000 +0000 @@ -0,0 +1,74 @@ +commit 4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc +Author: Madhavan Srinivasan +Date: Wed Oct 2 00:34:10 2013 +0530 + + powerpc/sysfs: Disable writing to PURR in guest mode + + commit d1211af3049f4c9c1d8d4eb8f8098cc4f4f0d0c7 upstream. + + arch/powerpc/kernel/sysfs.c exports PURR with write permission. + This may be valid for kernel in phyp mode. But writing to + the file in guest mode causes crash due to a priviledge violation + + Signed-off-by: Madhavan Srinivasan + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kernel/sysfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kernel/sysfs.c 2014-04-27 23:38:47.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kernel/sysfs.c 2014-04-28 00:38:30.000000000 +0000 +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + #include "cacheinfo.h" + +@@ -179,15 +180,25 @@ + SYSFS_PMCSETUP(dscr, SPRN_DSCR); + SYSFS_PMCSETUP(pir, SPRN_PIR); + ++/* ++ Lets only enable read for phyp resources and ++ enable write when needed with a separate function. ++ Lets be conservative and default to pseries. ++*/ + static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra); + static DEVICE_ATTR(spurr, 0400, show_spurr, NULL); + static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr); +-static DEVICE_ATTR(purr, 0600, show_purr, store_purr); ++static DEVICE_ATTR(purr, 0400, show_purr, store_purr); + static DEVICE_ATTR(pir, 0400, show_pir, NULL); + + unsigned long dscr_default = 0; + EXPORT_SYMBOL(dscr_default); + ++static void add_write_permission_dev_attr(struct device_attribute *attr) ++{ ++ attr->attr.mode |= 0200; ++} ++ + static ssize_t show_dscr_default(struct device *dev, + struct device_attribute *attr, char *buf) + { +@@ -394,8 +405,11 @@ + if (cpu_has_feature(CPU_FTR_MMCRA)) + device_create_file(s, &dev_attr_mmcra); + +- if (cpu_has_feature(CPU_FTR_PURR)) ++ if (cpu_has_feature(CPU_FTR_PURR)) { ++ if (!firmware_has_feature(FW_FEATURE_LPAR)) ++ add_write_permission_dev_attr(&dev_attr_purr); + device_create_file(s, &dev_attr_purr); ++ } + + if (cpu_has_feature(CPU_FTR_SPURR)) + device_create_file(s, &dev_attr_spurr); +Index: linux-3.10-3.10.11/dummy/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1315_4d358e9e19f001d2d7b33c2c8daa7b83b85ae1fc.txt 2014-04-28 00:38:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.patch 2014-04-28 00:38:32.000000000 +0000 @@ -0,0 +1,161 @@ +commit 17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6 +Author: Paul E. McKenney +Date: Tue Oct 1 17:11:35 2013 +1000 + + powerpc: Restore registers on error exit from csum_partial_copy_generic() + + commit 8f21bd0090052e740944f9397e2be5ac7957ded7 upstream. + + The csum_partial_copy_generic() function saves the PowerPC non-volatile + r14, r15, and r16 registers for the main checksum-and-copy loop. + Unfortunately, it fails to restore them upon error exit from this loop, + which results in silent corruption of these registers in the presumably + rare event of an access exception within that loop. + + This commit therefore restores these register on error exit from the loop. + + Signed-off-by: Paul E. McKenney + Signed-off-by: Anton Blanchard + Signed-off-by: Benjamin Herrenschmidt + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/lib/checksum_64.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/lib/checksum_64.S 2014-04-28 00:38:30.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/lib/checksum_64.S 2014-04-28 00:38:31.000000000 +0000 +@@ -226,19 +226,35 @@ + blr + + +- .macro source ++ .macro srcnr + 100: + .section __ex_table,"a" + .align 3 +- .llong 100b,.Lsrc_error ++ .llong 100b,.Lsrc_error_nr + .previous + .endm + +- .macro dest ++ .macro source ++150: ++ .section __ex_table,"a" ++ .align 3 ++ .llong 150b,.Lsrc_error ++ .previous ++ .endm ++ ++ .macro dstnr + 200: + .section __ex_table,"a" + .align 3 +- .llong 200b,.Ldest_error ++ .llong 200b,.Ldest_error_nr ++ .previous ++ .endm ++ ++ .macro dest ++250: ++ .section __ex_table,"a" ++ .align 3 ++ .llong 250b,.Ldest_error + .previous + .endm + +@@ -274,11 +290,11 @@ + mtctr r6 + + 1: +-source; lhz r6,0(r3) /* align to doubleword */ ++srcnr; lhz r6,0(r3) /* align to doubleword */ + subi r5,r5,2 + addi r3,r3,2 + adde r0,r0,r6 +-dest; sth r6,0(r4) ++dstnr; sth r6,0(r4) + addi r4,r4,2 + bdnz 1b + +@@ -392,10 +408,10 @@ + + mtctr r6 + 3: +-source; ld r6,0(r3) ++srcnr; ld r6,0(r3) + addi r3,r3,8 + adde r0,r0,r6 +-dest; std r6,0(r4) ++dstnr; std r6,0(r4) + addi r4,r4,8 + bdnz 3b + +@@ -405,10 +421,10 @@ + srdi. r6,r5,2 + beq .Lcopy_tail_halfword + +-source; lwz r6,0(r3) ++srcnr; lwz r6,0(r3) + addi r3,r3,4 + adde r0,r0,r6 +-dest; stw r6,0(r4) ++dstnr; stw r6,0(r4) + addi r4,r4,4 + subi r5,r5,4 + +@@ -416,10 +432,10 @@ + srdi. r6,r5,1 + beq .Lcopy_tail_byte + +-source; lhz r6,0(r3) ++srcnr; lhz r6,0(r3) + addi r3,r3,2 + adde r0,r0,r6 +-dest; sth r6,0(r4) ++dstnr; sth r6,0(r4) + addi r4,r4,2 + subi r5,r5,2 + +@@ -427,10 +443,10 @@ + andi. r6,r5,1 + beq .Lcopy_finish + +-source; lbz r6,0(r3) ++srcnr; lbz r6,0(r3) + sldi r9,r6,8 /* Pad the byte out to 16 bits */ + adde r0,r0,r9 +-dest; stb r6,0(r4) ++dstnr; stb r6,0(r4) + + .Lcopy_finish: + addze r0,r0 /* add in final carry */ +@@ -440,6 +456,11 @@ + blr + + .Lsrc_error: ++ ld r14,STK_REG(R14)(r1) ++ ld r15,STK_REG(R15)(r1) ++ ld r16,STK_REG(R16)(r1) ++ addi r1,r1,STACKFRAMESIZE ++.Lsrc_error_nr: + cmpdi 0,r7,0 + beqlr + li r6,-EFAULT +@@ -447,6 +468,11 @@ + blr + + .Ldest_error: ++ ld r14,STK_REG(R14)(r1) ++ ld r15,STK_REG(R15)(r1) ++ ld r16,STK_REG(R16)(r1) ++ addi r1,r1,STACKFRAMESIZE ++.Ldest_error_nr: + cmpdi 0,r8,0 + beqlr + li r6,-EFAULT +Index: linux-3.10-3.10.11/dummy/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1316_17cb5c2fef8f1b1b2f3a4ac10f0801c9ad258cb6.txt 2014-04-28 00:38:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.patch 2014-04-28 00:38:32.000000000 +0000 @@ -0,0 +1,76 @@ +commit eb12ca30f11b89eab811b23562e976c1c954c7f3 +Author: Maxim Patlasov +Date: Fri Sep 13 19:19:54 2013 +0400 + + fuse: wait for writeback in fuse_file_fallocate() + + commit bde52788bdb755b9e4b75db6c434f30e32a0ca0b upstream. + + The patch fixes a race between mmap-ed write and fallocate(PUNCH_HOLE): + + 1) An user makes a page dirty via mmap-ed write. + 2) The user performs fallocate(2) with mode == PUNCH_HOLE|KEEP_SIZE + and covering the page. + 3) Before truncate_pagecache_range call from fuse_file_fallocate, + the page goes to write-back. The page is fully processed by fuse_writepage + (including end_page_writeback on the page), but fuse_flush_writepages did + nothing because fi->writectr < 0. + 4) truncate_pagecache_range is called and fuse_file_fallocate is finishing + by calling fuse_release_nowrite. The latter triggers processing queued + write-back request which will write stale data to the hole soon. + + Changed in v2 (thanks to Brian for suggestion): + - Do not truncate page cache until FUSE_FALLOCATE succeeded. Otherwise, + we can end up in returning -ENOTSUPP while user data is already punched + from page cache. Use filemap_write_and_wait_range() instead. + Changed in v3 (thanks to Miklos for suggestion): + - fuse_wait_on_writeback() is prone to livelocks; use fuse_set_nowrite() + instead. So far as we need a dirty-page barrier only, fuse_sync_writes() + should be enough. + - rebased to for-linus branch of fuse.git + + Signed-off-by: Maxim Patlasov + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/file.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/file.c 2014-04-28 00:36:15.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/file.c 2014-04-28 00:38:32.000000000 +0000 +@@ -2485,8 +2485,15 @@ + + if (lock_inode) { + mutex_lock(&inode->i_mutex); +- if (mode & FALLOC_FL_PUNCH_HOLE) +- fuse_set_nowrite(inode); ++ if (mode & FALLOC_FL_PUNCH_HOLE) { ++ loff_t endbyte = offset + length - 1; ++ err = filemap_write_and_wait_range(inode->i_mapping, ++ offset, endbyte); ++ if (err) ++ goto out; ++ ++ fuse_sync_writes(inode); ++ } + } + + req = fuse_get_req_nopages(fc); +@@ -2521,11 +2528,8 @@ + fuse_invalidate_attr(inode); + + out: +- if (lock_inode) { +- if (mode & FALLOC_FL_PUNCH_HOLE) +- fuse_release_nowrite(inode); ++ if (lock_inode) + mutex_unlock(&inode->i_mutex); +- } + + return err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1317_eb12ca30f11b89eab811b23562e976c1c954c7f3.txt 2014-04-28 00:38:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.patch 2014-04-28 00:38:33.000000000 +0000 @@ -0,0 +1,65 @@ +commit 9abd30b435085cf2d897a77d657a4b6b8a56fd2c +Author: Maxim Patlasov +Date: Fri Sep 13 19:20:16 2013 +0400 + + fuse: fix fallocate vs. ftruncate race + + commit 0ab08f576b9e6a6b689fc6b4e632079b978e619b upstream. + + A former patch introducing FUSE_I_SIZE_UNSTABLE flag provided detailed + description of races between ftruncate and anyone who can extend i_size: + + > 1. As in the previous scenario fuse_dentry_revalidate() discovered that i_size + > changed (due to our own fuse_do_setattr()) and is going to call + > truncate_pagecache() for some 'new_size' it believes valid right now. But by + > the time that particular truncate_pagecache() is called ... + > 2. fuse_do_setattr() returns (either having called truncate_pagecache() or + > not -- it doesn't matter). + > 3. The file is extended either by write(2) or ftruncate(2) or fallocate(2). + > 4. mmap-ed write makes a page in the extended region dirty. + + This patch adds necessary bits to fuse_file_fallocate() to protect from that + race. + + Signed-off-by: Maxim Patlasov + Signed-off-by: Miklos Szeredi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/fuse/file.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/fuse/file.c 2014-04-28 00:38:32.000000000 +0000 ++++ linux-3.10-3.10.11/fs/fuse/file.c 2014-04-28 00:38:33.000000000 +0000 +@@ -2468,6 +2468,7 @@ + { + struct fuse_file *ff = file->private_data; + struct inode *inode = file->f_inode; ++ struct fuse_inode *fi = get_fuse_inode(inode); + struct fuse_conn *fc = ff->fc; + struct fuse_req *req; + struct fuse_fallocate_in inarg = { +@@ -2496,6 +2497,9 @@ + } + } + ++ if (!(mode & FALLOC_FL_KEEP_SIZE)) ++ set_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); ++ + req = fuse_get_req_nopages(fc); + if (IS_ERR(req)) { + err = PTR_ERR(req); +@@ -2528,6 +2532,9 @@ + fuse_invalidate_attr(inode); + + out: ++ if (!(mode & FALLOC_FL_KEEP_SIZE)) ++ clear_bit(FUSE_I_SIZE_UNSTABLE, &fi->state); ++ + if (lock_inode) + mutex_unlock(&inode->i_mutex); + +Index: linux-3.10-3.10.11/dummy/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1318_9abd30b435085cf2d897a77d657a4b6b8a56fd2c.txt 2014-04-28 00:38:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.patch --- linux-3.10.11/debian/patches/rpi/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.patch 2014-04-28 00:38:35.000000000 +0000 @@ -0,0 +1,201 @@ +commit 37afef393d94a49bea7ee44d255b05a922d7b791 +Author: Arend van Spriel +Date: Wed Sep 25 12:11:01 2013 +0200 + + brcmfmac: obtain platform data upon module initialization + + commit db4efbbeb457b6f9f4d8c4b090d1170d12f026e1 upstream. + + The driver uses platform_driver_probe() to obtain platform data + if any. However, that function is placed in the .init section so + it must be called upon driver module initialization. + + The problem was reported by Fenguang Wu resulting in a kernel + oops because the .init section was already freed. + + [ 48.966342] Switched to clocksource tsc + [ 48.970002] kernel tried to execute NX-protected page - exploit attempt? (uid: 0) + [ 48.970851] BUG: unable to handle kernel paging request at ffffffff82196446 + [ 48.970957] IP: [] classes_init+0x26/0x26 + [ 48.970957] PGD 1e76067 PUD 1e77063 PMD f388063 PTE 8000000002196163 + [ 48.970957] Oops: 0011 [#1] + [ 48.970957] CPU: 0 PID: 17 Comm: kworker/0:1 Not tainted 3.11.0-rc7-00444-gc52dd7f #23 + [ 48.970957] Workqueue: events brcmf_driver_init + [ 48.970957] task: ffff8800001d2000 ti: ffff8800001d4000 task.ti: ffff8800001d4000 + [ 48.970957] RIP: 0010:[] [] classes_init+0x26/0x26 + [ 48.970957] RSP: 0000:ffff8800001d5d40 EFLAGS: 00000286 + [ 48.970957] RAX: 0000000000000001 RBX: ffffffff820c5620 RCX: 0000000000000000 + [ 48.970957] RDX: 0000000000000001 RSI: ffffffff816f7380 RDI: ffffffff820c56c0 + [ 48.970957] RBP: ffff8800001d5d50 R08: ffff8800001d2508 R09: 0000000000000002 + [ 48.970957] R10: 0000000000000000 R11: 0001f7ce298c5620 R12: ffff8800001c76b0 + [ 48.970957] R13: ffffffff81e91d40 R14: 0000000000000000 R15: ffff88000e0ce300 + [ 48.970957] FS: 0000000000000000(0000) GS:ffffffff81e84000(0000) knlGS:0000000000000000 + [ 48.970957] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b + [ 48.970957] CR2: ffffffff82196446 CR3: 0000000001e75000 CR4: 00000000000006b0 + [ 48.970957] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [ 48.970957] DR3: 0000000000000000 DR6: 0000000000000000 DR7: 0000000000000000 + [ 48.970957] Stack: + [ 48.970957] ffffffff816f7df8 ffffffff820c5620 ffff8800001d5d60 ffffffff816eeec9 + [ 48.970957] ffff8800001d5de0 ffffffff81073dc5 ffffffff81073d68 ffff8800001d5db8 + [ 48.970957] 0000000000000086 ffffffff820c5620 ffffffff824f7fd0 0000000000000000 + [ 48.970957] Call Trace: + [ 48.970957] [] ? brcmf_sdio_init+0x18/0x70 + [ 48.970957] [] brcmf_driver_init+0x9/0x10 + [ 48.970957] [] process_one_work+0x1d5/0x480 + [ 48.970957] [] ? process_one_work+0x178/0x480 + [ 48.970957] [] worker_thread+0x118/0x3a0 + [ 48.970957] [] ? process_one_work+0x480/0x480 + [ 48.970957] [] kthread+0xe7/0xf0 + [ 48.970957] [] ? finish_task_switch.constprop.57+0x37/0xd0 + [ 48.970957] [] ? __kthread_parkme+0x80/0x80 + [ 48.970957] [] ret_from_fork+0x7a/0xb0 + [ 48.970957] [] ? __kthread_parkme+0x80/0x80 + [ 48.970957] Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc + cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc + [ 48.970957] RIP [] classes_init+0x26/0x26 + [ 48.970957] RSP + [ 48.970957] CR2: ffffffff82196446 + [ 48.970957] ---[ end trace 62980817cd525f14 ]--- + + Reported-by: Fengguang Wu + Reviewed-by: Hante Meuleman + Reviewed-by: Pieter-Paul Giesberts + Tested-by: Fengguang Wu + Signed-off-by: Arend van Spriel + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c 2014-04-27 23:38:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/bcmsdh_sdmmc.c 2014-04-28 00:38:34.000000000 +0000 +@@ -575,8 +575,6 @@ + + static int brcmf_sdio_pd_probe(struct platform_device *pdev) + { +- int ret; +- + brcmf_dbg(SDIO, "Enter\n"); + + brcmfmac_sdio_pdata = pdev->dev.platform_data; +@@ -584,11 +582,7 @@ + if (brcmfmac_sdio_pdata->power_on) + brcmfmac_sdio_pdata->power_on(); + +- ret = sdio_register_driver(&brcmf_sdmmc_driver); +- if (ret) +- brcmf_err("sdio_register_driver failed: %d\n", ret); +- +- return ret; ++ return 0; + } + + static int brcmf_sdio_pd_remove(struct platform_device *pdev) +@@ -610,6 +604,15 @@ + } + }; + ++void brcmf_sdio_register(void) ++{ ++ int ret; ++ ++ ret = sdio_register_driver(&brcmf_sdmmc_driver); ++ if (ret) ++ brcmf_err("sdio_register_driver failed: %d\n", ret); ++} ++ + void brcmf_sdio_exit(void) + { + brcmf_dbg(SDIO, "Enter\n"); +@@ -620,18 +623,13 @@ + sdio_unregister_driver(&brcmf_sdmmc_driver); + } + +-void brcmf_sdio_init(void) ++void __init brcmf_sdio_init(void) + { + int ret; + + brcmf_dbg(SDIO, "Enter\n"); + + ret = platform_driver_probe(&brcmf_sdio_pd, brcmf_sdio_pd_probe); +- if (ret == -ENODEV) { +- brcmf_dbg(SDIO, "No platform data available, registering without.\n"); +- ret = sdio_register_driver(&brcmf_sdmmc_driver); +- } +- +- if (ret) +- brcmf_err("driver registration failed: %d\n", ret); ++ if (ret == -ENODEV) ++ brcmf_dbg(SDIO, "No platform data available.\n"); + } +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h 2014-04-27 23:38:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_bus.h 2014-04-28 00:38:34.000000000 +0000 +@@ -154,10 +154,11 @@ + #ifdef CONFIG_BRCMFMAC_SDIO + extern void brcmf_sdio_exit(void); + extern void brcmf_sdio_init(void); ++extern void brcmf_sdio_register(void); + #endif + #ifdef CONFIG_BRCMFMAC_USB + extern void brcmf_usb_exit(void); +-extern void brcmf_usb_init(void); ++extern void brcmf_usb_register(void); + #endif + + #endif /* _BRCMF_BUS_H_ */ +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c 2014-04-27 23:38:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/dhd_linux.c 2014-04-28 00:38:35.000000000 +0000 +@@ -1034,21 +1034,23 @@ + return bus->chip << 4 | bus->chiprev; + } + +-static void brcmf_driver_init(struct work_struct *work) ++static void brcmf_driver_register(struct work_struct *work) + { +- brcmf_debugfs_init(); +- + #ifdef CONFIG_BRCMFMAC_SDIO +- brcmf_sdio_init(); ++ brcmf_sdio_register(); + #endif + #ifdef CONFIG_BRCMFMAC_USB +- brcmf_usb_init(); ++ brcmf_usb_register(); + #endif + } +-static DECLARE_WORK(brcmf_driver_work, brcmf_driver_init); ++static DECLARE_WORK(brcmf_driver_work, brcmf_driver_register); + + static int __init brcmfmac_module_init(void) + { ++ brcmf_debugfs_init(); ++#ifdef CONFIG_BRCMFMAC_SDIO ++ brcmf_sdio_init(); ++#endif + if (!schedule_work(&brcmf_driver_work)) + return -EBUSY; + +Index: linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/brcm80211/brcmfmac/usb.c 2014-04-27 23:38:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/brcm80211/brcmfmac/usb.c 2014-04-28 00:38:35.000000000 +0000 +@@ -1532,7 +1532,7 @@ + brcmf_release_fw(&fw_image_list); + } + +-void brcmf_usb_init(void) ++void brcmf_usb_register(void) + { + brcmf_dbg(USB, "Enter\n"); + INIT_LIST_HEAD(&fw_image_list); +Index: linux-3.10-3.10.11/dummy/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1319_37afef393d94a49bea7ee44d255b05a922d7b791.txt 2014-04-28 00:38:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.patch --- linux-3.10.11/debian/patches/rpi/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.patch 2014-04-28 00:38:36.000000000 +0000 @@ -0,0 +1,46 @@ +commit a508ba2c07af1c6b1255e334fadfeddda2887f93 +Author: Andre Guedes +Date: Wed Jul 31 16:25:28 2013 -0300 + + Bluetooth: Fix security level for peripheral role + + commit f8776218e8546397be64ad2bc0ebf4748522d6e3 upstream. + + While playing the peripheral role, the host gets a LE Long Term Key + Request Event from the controller when a connection is established + with a bonded device. The host then informs the LTK which should be + used for the connection. Once the link is encrypted, the host gets + an Encryption Change Event. + + Therefore we should set conn->pending_sec_level instead of conn-> + sec_level in hci_le_ltk_request_evt. This way, conn->sec_level is + properly updated in hci_encrypt_change_evt. + + Moreover, since we have a LTK associated to the device, we have at + least BT_SECURITY_MEDIUM security level. + + Signed-off-by: Andre Guedes + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bluetooth/hci_event.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hci_event.c 2014-04-27 23:38:45.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hci_event.c 2014-04-28 00:38:36.000000000 +0000 +@@ -3611,7 +3611,9 @@ + cp.handle = cpu_to_le16(conn->handle); + + if (ltk->authenticated) +- conn->sec_level = BT_SECURITY_HIGH; ++ conn->pending_sec_level = BT_SECURITY_HIGH; ++ else ++ conn->pending_sec_level = BT_SECURITY_MEDIUM; + + hci_send_cmd(hdev, HCI_OP_LE_LTK_REPLY, sizeof(cp), &cp); + +Index: linux-3.10-3.10.11/dummy/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1320_a508ba2c07af1c6b1255e334fadfeddda2887f93.txt 2014-04-28 00:38:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.patch 2014-04-28 00:38:37.000000000 +0000 @@ -0,0 +1,35 @@ +commit ad04e6cbe9e091059096748285655caf16da97d0 +Author: Andre Guedes +Date: Wed Jul 31 16:25:29 2013 -0300 + + Bluetooth: Fix encryption key size for peripheral role + + commit 89cbb4da0abee2f39d75f67f9fd57f7410c8b65c upstream. + + This patch fixes the connection encryption key size information when + the host is playing the peripheral role. We should set conn->enc_key_ + size in hci_le_ltk_request_evt, otherwise it is left uninitialized. + + Signed-off-by: Andre Guedes + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bluetooth/hci_event.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hci_event.c 2014-04-28 00:38:36.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hci_event.c 2014-04-28 00:38:36.000000000 +0000 +@@ -3615,6 +3615,8 @@ + else + conn->pending_sec_level = BT_SECURITY_MEDIUM; + ++ conn->enc_key_size = ltk->enc_size; ++ + hci_send_cmd(hdev, HCI_OP_LE_LTK_REPLY, sizeof(cp), &cp); + + if (ltk->type & HCI_SMP_STK) { +Index: linux-3.10-3.10.11/dummy/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1321_ad04e6cbe9e091059096748285655caf16da97d0.txt 2014-04-28 00:38:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.patch 2014-04-28 00:38:38.000000000 +0000 @@ -0,0 +1,64 @@ +commit 877ed5f4e67d3142df09048e037c62f3a3ae6ca9 +Author: Peng Chen +Date: Fri Aug 30 17:41:40 2013 +0800 + + Bluetooth: Add a new PID/VID 0cf3/e005 for AR3012. + + commit 0a3658cccdf5326ea508efeb1879b0e2508bb0c3 upstream. + + usb device info: + + T: Bus=06 Lev=01 Prnt=01 Port=01 Cnt=01 Dev#= 15 Spd=12 MxCh= 0 + D: Ver= 1.10 Cls=e0(wlcon) Sub=01 Prot=01 MxPS=64 #Cfgs= 1 + P: Vendor=0cf3 ProdID=e005 Rev= 0.02 + C:* #Ifs= 2 Cfg#= 1 Atr=e0 MxPwr=100mA + I:* If#= 0 Alt= 0 #EPs= 3 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb + E: Ad=81(I) Atr=03(Int.) MxPS= 16 Ivl=1ms + E: Ad=82(I) Atr=02(Bulk) MxPS= 64 Ivl=0ms + E: Ad=02(O) Atr=02(Bulk) MxPS= 64 Ivl=0ms + I:* If#= 1 Alt= 0 #EPs= 2 Cls=e0(wlcon) Sub=01 Prot=01 Driver=btusb + E: Ad=83(I) Atr=01(Isoc) MxPS= 0 Ivl=1ms + E: Ad=03(O) Atr=01(Isoc) MxPS= 0 Ivl=1ms + + Signed-off-by: Peng Chen + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/bluetooth/ath3k.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/ath3k.c 2014-04-28 00:32:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/ath3k.c 2014-04-28 00:38:37.000000000 +0000 +@@ -85,6 +85,7 @@ + { USB_DEVICE(0x04CA, 0x3008) }, + { USB_DEVICE(0x13d3, 0x3362) }, + { USB_DEVICE(0x0CF3, 0xE004) }, ++ { USB_DEVICE(0x0CF3, 0xE005) }, + { USB_DEVICE(0x0930, 0x0219) }, + { USB_DEVICE(0x0489, 0xe057) }, + { USB_DEVICE(0x13d3, 0x3393) }, +@@ -126,6 +127,7 @@ + { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 }, ++ { USB_DEVICE(0x0cf3, 0xe005), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x13d3, 0x3393), .driver_info = BTUSB_ATH3012 }, +Index: linux-3.10-3.10.11/drivers/bluetooth/btusb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/btusb.c 2014-04-27 23:38:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/btusb.c 2014-04-28 00:38:37.000000000 +0000 +@@ -148,6 +148,7 @@ + { USB_DEVICE(0x04ca, 0x3008), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x13d3, 0x3362), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0cf3, 0xe004), .driver_info = BTUSB_ATH3012 }, ++ { USB_DEVICE(0x0cf3, 0xe005), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0930, 0x0219), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x0489, 0xe057), .driver_info = BTUSB_ATH3012 }, + { USB_DEVICE(0x13d3, 0x3393), .driver_info = BTUSB_ATH3012 }, +Index: linux-3.10-3.10.11/dummy/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1322_877ed5f4e67d3142df09048e037c62f3a3ae6ca9.txt 2014-04-28 00:38:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.patch --- linux-3.10.11/debian/patches/rpi/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.patch 2014-04-28 00:38:38.000000000 +0000 @@ -0,0 +1,45 @@ +commit a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465 +Author: Raphael Kubo da Costa +Date: Mon Sep 2 14:57:51 2013 +0300 + + Bluetooth: Add support for BCM20702A0 [0b05, 17cb] + + commit 38a172bef8c93ecbfd69715fd88396988e4073fd upstream. + + Yet another vendor specific ID for this chipset; this one for the ASUS + USB-BT400 Bluetooth 4.0 adapter. + + T: Bus=03 Lev=02 Prnt=02 Port=01 Cnt=01 Dev#= 6 Spd=12 MxCh= 0 + D: Ver= 2.00 Cls=ff(vend.) Sub=01 Prot=01 MxPS=64 #Cfgs= 1 + P: Vendor=0b05 ProdID=17cb Rev=01.12 + S: Manufacturer=Broadcom Corp + S: Product=BCM20702A0 + S: SerialNumber=000272C64400 + C: #Ifs= 4 Cfg#= 1 Atr=a0 MxPwr=100mA + I: If#= 0 Alt= 0 #EPs= 3 Cls=ff(vend.) Sub=01 Prot=01 Driver=(none) + I: If#= 1 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=01 Prot=01 Driver=(none) + I: If#= 2 Alt= 0 #EPs= 2 Cls=ff(vend.) Sub=ff Prot=ff Driver=(none) + I: If#= 3 Alt= 0 #EPs= 0 Cls=fe(app. ) Sub=01 Prot=01 Driver=(none) + + Signed-off-by: Raphael Kubo da Costa + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/bluetooth/btusb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/bluetooth/btusb.c 2014-04-28 00:38:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/bluetooth/btusb.c 2014-04-28 00:38:38.000000000 +0000 +@@ -102,6 +102,7 @@ + + /* Broadcom BCM20702A0 */ + { USB_DEVICE(0x0b05, 0x17b5) }, ++ { USB_DEVICE(0x0b05, 0x17cb) }, + { USB_DEVICE(0x04ca, 0x2003) }, + { USB_DEVICE(0x0489, 0xe042) }, + { USB_DEVICE(0x413c, 0x8197) }, +Index: linux-3.10-3.10.11/dummy/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1323_a7905fb906f2d43fbbdf2bd45c860ad0ee6c9465.txt 2014-04-28 00:38:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.patch 2014-04-28 00:38:39.000000000 +0000 @@ -0,0 +1,76 @@ +commit ddc650c1b220e15a831ebc1624504a590ee0e8d9 +Author: Johan Hedberg +Date: Fri Sep 13 08:58:17 2013 +0300 + + Bluetooth: Introduce a new HCI_RFKILLED flag + + commit 5e130367d43ff22836bbae380d197d600fe8ddbb upstream. + + This makes it more convenient to check for rfkill (no need to check for + dev->rfkill before calling rfkill_blocked()) and also avoids potential + races if the RFKILL state needs to be checked from within the rfkill + callback. + + Signed-off-by: Johan Hedberg + Acked-by: Marcel Holtmann + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/bluetooth/hci.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/bluetooth/hci.h 2014-04-27 23:38:44.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/bluetooth/hci.h 2014-04-28 00:38:39.000000000 +0000 +@@ -104,6 +104,7 @@ + enum { + HCI_SETUP, + HCI_AUTO_OFF, ++ HCI_RFKILLED, + HCI_MGMT, + HCI_PAIRABLE, + HCI_SERVICE_CACHE, +Index: linux-3.10-3.10.11/net/bluetooth/hci_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hci_core.c 2014-04-27 23:38:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hci_core.c 2014-04-28 00:38:39.000000000 +0000 +@@ -1123,7 +1123,7 @@ + goto done; + } + +- if (hdev->rfkill && rfkill_blocked(hdev->rfkill)) { ++ if (test_bit(HCI_RFKILLED, &hdev->dev_flags)) { + ret = -ERFKILL; + goto done; + } +@@ -1545,10 +1545,12 @@ + + BT_DBG("%p name %s blocked %d", hdev, hdev->name, blocked); + +- if (!blocked) +- return 0; +- +- hci_dev_do_close(hdev); ++ if (blocked) { ++ set_bit(HCI_RFKILLED, &hdev->dev_flags); ++ hci_dev_do_close(hdev); ++ } else { ++ clear_bit(HCI_RFKILLED, &hdev->dev_flags); ++} + + return 0; + } +@@ -2241,6 +2243,9 @@ + } + } + ++ if (hdev->rfkill && rfkill_blocked(hdev->rfkill)) ++ set_bit(HCI_RFKILLED, &hdev->dev_flags); ++ + set_bit(HCI_SETUP, &hdev->dev_flags); + + if (hdev->dev_type != HCI_AMP) +Index: linux-3.10-3.10.11/dummy/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1324_ddc650c1b220e15a831ebc1624504a590ee0e8d9.txt 2014-04-28 00:38:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.patch --- linux-3.10.11/debian/patches/rpi/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.patch 2014-04-28 00:38:40.000000000 +0000 @@ -0,0 +1,77 @@ +commit 230352711ef9d819bff5ccc18d407bfd5f51ef81 +Author: Johan Hedberg +Date: Fri Sep 13 08:58:18 2013 +0300 + + Bluetooth: Fix rfkill functionality during the HCI setup stage + + commit bf5430360ebe4b2d0c51d91f782e649107b502eb upstream. + + We need to let the setup stage complete cleanly even when the HCI device + is rfkilled. Otherwise the HCI device will stay in an undefined state + and never get notified to user space through mgmt (even when it gets + unblocked through rfkill). + + This patch makes sure that hci_dev_open() can be called in the HCI_SETUP + stage, that blocking the device doesn't abort the setup stage, and that + the device gets proper powered down as soon as the setup stage completes + in case it was blocked meanwhile. + + The bug that this patch fixed can be very easily reproduced using e.g. + the rfkill command line too. By running "rfkill block all" before + inserting a Bluetooth dongle the resulting HCI device goes into a state + where it is never announced over mgmt, not even when "rfkill unblock all" + is run. + + Signed-off-by: Johan Hedberg + Acked-by: Marcel Holtmann + Signed-off-by: Gustavo Padovan + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bluetooth/hci_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bluetooth/hci_core.c 2014-04-28 00:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/net/bluetooth/hci_core.c 2014-04-28 00:38:40.000000000 +0000 +@@ -1123,7 +1123,11 @@ + goto done; + } + +- if (test_bit(HCI_RFKILLED, &hdev->dev_flags)) { ++ /* Check for rfkill but allow the HCI setup stage to proceed ++ * (which in itself doesn't cause any RF activity). ++ */ ++ if (test_bit(HCI_RFKILLED, &hdev->dev_flags) && ++ !test_bit(HCI_SETUP, &hdev->dev_flags)) { + ret = -ERFKILL; + goto done; + } +@@ -1547,7 +1551,8 @@ + + if (blocked) { + set_bit(HCI_RFKILLED, &hdev->dev_flags); +- hci_dev_do_close(hdev); ++ if (!test_bit(HCI_SETUP, &hdev->dev_flags)) ++ hci_dev_do_close(hdev); + } else { + clear_bit(HCI_RFKILLED, &hdev->dev_flags); + } +@@ -1572,9 +1577,13 @@ + return; + } + +- if (test_bit(HCI_AUTO_OFF, &hdev->dev_flags)) ++ if (test_bit(HCI_RFKILLED, &hdev->dev_flags)) { ++ clear_bit(HCI_AUTO_OFF, &hdev->dev_flags); ++ hci_dev_do_close(hdev); ++ } else if (test_bit(HCI_AUTO_OFF, &hdev->dev_flags)) { + queue_delayed_work(hdev->req_workqueue, &hdev->power_off, + HCI_AUTO_OFF_TIMEOUT); ++ } + + if (test_and_clear_bit(HCI_SETUP, &hdev->dev_flags)) + mgmt_index_added(hdev); +Index: linux-3.10-3.10.11/dummy/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1325_230352711ef9d819bff5ccc18d407bfd5f51ef81.txt 2014-04-28 00:38:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.patch 2014-04-28 00:38:41.000000000 +0000 @@ -0,0 +1,289 @@ +commit d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5 +Author: Vyacheslav Dubeyko +Date: Mon Sep 30 13:45:12 2013 -0700 + + nilfs2: fix issue with race condition of competition between segments for dirty blocks + + commit 7f42ec3941560f0902fe3671e36f2c20ffd3af0a upstream. + + Many NILFS2 users were reported about strange file system corruption + (for example): + + NILFS: bad btree node (blocknr=185027): level = 0, flags = 0x0, nchildren = 768 + NILFS error (device sda4): nilfs_bmap_last_key: broken bmap (inode number=11540) + + But such error messages are consequence of file system's issue that takes + place more earlier. Fortunately, Jerome Poulin + and Anton Eliasson were reported about another + issue not so recently. These reports describe the issue with segctor + thread's crash: + + BUG: unable to handle kernel paging request at 0000000000004c83 + IP: nilfs_end_page_io+0x12/0xd0 [nilfs2] + + Call Trace: + nilfs_segctor_do_construct+0xf25/0x1b20 [nilfs2] + nilfs_segctor_construct+0x17b/0x290 [nilfs2] + nilfs_segctor_thread+0x122/0x3b0 [nilfs2] + kthread+0xc0/0xd0 + ret_from_fork+0x7c/0xb0 + + These two issues have one reason. This reason can raise third issue + too. Third issue results in hanging of segctor thread with eating of + 100% CPU. + + REPRODUCING PATH: + + One of the possible way or the issue reproducing was described by + Jermoe me Poulin : + + 1. init S to get to single user mode. + 2. sysrq+E to make sure only my shell is running + 3. start network-manager to get my wifi connection up + 4. login as root and launch "screen" + 5. cd /boot/log/nilfs which is a ext3 mount point and can log when NILFS dies. + 6. lscp | xz -9e > lscp.txt.xz + 7. mount my snapshot using mount -o cp=3360839,ro /dev/vgUbuntu/root /mnt/nilfs + 8. start a screen to dump /proc/kmsg to text file since rsyslog is killed + 9. start a screen and launch strace -f -o find-cat.log -t find + /mnt/nilfs -type f -exec cat {} > /dev/null \; + 10. start a screen and launch strace -f -o apt-get.log -t apt-get update + 11. launch the last command again as it did not crash the first time + 12. apt-get crashes + 13. ps aux > ps-aux-crashed.log + 13. sysrq+W + 14. sysrq+E wait for everything to terminate + 15. sysrq+SUSB + + Simplified way of the issue reproducing is starting kernel compilation + task and "apt-get update" in parallel. + + REPRODUCIBILITY: + + The issue is reproduced not stable [60% - 80%]. It is very important to + have proper environment for the issue reproducing. The critical + conditions for successful reproducing: + + (1) It should have big modified file by mmap() way. + + (2) This file should have the count of dirty blocks are greater that + several segments in size (for example, two or three) from time to time + during processing. + + (3) It should be intensive background activity of files modification + in another thread. + + INVESTIGATION: + + First of all, it is possible to see that the reason of crash is not valid + page address: + + NILFS [nilfs_segctor_complete_write]:2100 bh->b_count 0, bh->b_blocknr 13895680, bh->b_size 13897727, bh->b_page 0000000000001a82 + NILFS [nilfs_segctor_complete_write]:2101 segbuf->sb_segnum 6783 + + Moreover, value of b_page (0x1a82) is 6786. This value looks like segment + number. And b_blocknr with b_size values look like block numbers. So, + buffer_head's pointer points on not proper address value. + + Detailed investigation of the issue is discovered such picture: + + [-----------------------------SEGMENT 6783-------------------------------] + NILFS [nilfs_segctor_do_construct]:2310 nilfs_segctor_begin_construction + NILFS [nilfs_segctor_do_construct]:2321 nilfs_segctor_collect + NILFS [nilfs_segctor_do_construct]:2336 nilfs_segctor_assign + NILFS [nilfs_segctor_do_construct]:2367 nilfs_segctor_update_segusage + NILFS [nilfs_segctor_do_construct]:2371 nilfs_segctor_prepare_write + NILFS [nilfs_segctor_do_construct]:2376 nilfs_add_checksums_on_logs + NILFS [nilfs_segctor_do_construct]:2381 nilfs_segctor_write + NILFS [nilfs_segbuf_submit_bio]:464 bio->bi_sector 111149024, segbuf->sb_segnum 6783 + + [-----------------------------SEGMENT 6784-------------------------------] + NILFS [nilfs_segctor_do_construct]:2310 nilfs_segctor_begin_construction + NILFS [nilfs_segctor_do_construct]:2321 nilfs_segctor_collect + NILFS [nilfs_lookup_dirty_data_buffers]:782 bh->b_count 1, bh->b_page ffffea000709b000, page->index 0, i_ino 1033103, i_size 25165824 + NILFS [nilfs_lookup_dirty_data_buffers]:783 bh->b_assoc_buffers.next ffff8802174a6798, bh->b_assoc_buffers.prev ffff880221cffee8 + NILFS [nilfs_segctor_do_construct]:2336 nilfs_segctor_assign + NILFS [nilfs_segctor_do_construct]:2367 nilfs_segctor_update_segusage + NILFS [nilfs_segctor_do_construct]:2371 nilfs_segctor_prepare_write + NILFS [nilfs_segctor_do_construct]:2376 nilfs_add_checksums_on_logs + NILFS [nilfs_segctor_do_construct]:2381 nilfs_segctor_write + NILFS [nilfs_segbuf_submit_bh]:575 bh->b_count 1, bh->b_page ffffea000709b000, page->index 0, i_ino 1033103, i_size 25165824 + NILFS [nilfs_segbuf_submit_bh]:576 segbuf->sb_segnum 6784 + NILFS [nilfs_segbuf_submit_bh]:577 bh->b_assoc_buffers.next ffff880218a0d5f8, bh->b_assoc_buffers.prev ffff880218bcdf50 + NILFS [nilfs_segbuf_submit_bio]:464 bio->bi_sector 111150080, segbuf->sb_segnum 6784, segbuf->sb_nbio 0 + [----------] ditto + NILFS [nilfs_segbuf_submit_bio]:464 bio->bi_sector 111164416, segbuf->sb_segnum 6784, segbuf->sb_nbio 15 + + [-----------------------------SEGMENT 6785-------------------------------] + NILFS [nilfs_segctor_do_construct]:2310 nilfs_segctor_begin_construction + NILFS [nilfs_segctor_do_construct]:2321 nilfs_segctor_collect + NILFS [nilfs_lookup_dirty_data_buffers]:782 bh->b_count 2, bh->b_page ffffea000709b000, page->index 0, i_ino 1033103, i_size 25165824 + NILFS [nilfs_lookup_dirty_data_buffers]:783 bh->b_assoc_buffers.next ffff880219277e80, bh->b_assoc_buffers.prev ffff880221cffc88 + NILFS [nilfs_segctor_do_construct]:2367 nilfs_segctor_update_segusage + NILFS [nilfs_segctor_do_construct]:2371 nilfs_segctor_prepare_write + NILFS [nilfs_segctor_do_construct]:2376 nilfs_add_checksums_on_logs + NILFS [nilfs_segctor_do_construct]:2381 nilfs_segctor_write + NILFS [nilfs_segbuf_submit_bh]:575 bh->b_count 2, bh->b_page ffffea000709b000, page->index 0, i_ino 1033103, i_size 25165824 + NILFS [nilfs_segbuf_submit_bh]:576 segbuf->sb_segnum 6785 + NILFS [nilfs_segbuf_submit_bh]:577 bh->b_assoc_buffers.next ffff880218a0d5f8, bh->b_assoc_buffers.prev ffff880222cc7ee8 + NILFS [nilfs_segbuf_submit_bio]:464 bio->bi_sector 111165440, segbuf->sb_segnum 6785, segbuf->sb_nbio 0 + [----------] ditto + NILFS [nilfs_segbuf_submit_bio]:464 bio->bi_sector 111177728, segbuf->sb_segnum 6785, segbuf->sb_nbio 12 + + NILFS [nilfs_segctor_do_construct]:2399 nilfs_segctor_wait + NILFS [nilfs_segbuf_wait]:676 segbuf->sb_segnum 6783 + NILFS [nilfs_segbuf_wait]:676 segbuf->sb_segnum 6784 + NILFS [nilfs_segbuf_wait]:676 segbuf->sb_segnum 6785 + + NILFS [nilfs_segctor_complete_write]:2100 bh->b_count 0, bh->b_blocknr 13895680, bh->b_size 13897727, bh->b_page 0000000000001a82 + + BUG: unable to handle kernel paging request at 0000000000001a82 + IP: [] nilfs_end_page_io+0x12/0xd0 [nilfs2] + + Usually, for every segment we collect dirty files in list. Then, dirty + blocks are gathered for every dirty file, prepared for write and + submitted by means of nilfs_segbuf_submit_bh() call. Finally, it takes + place complete write phase after calling nilfs_end_bio_write() on the + block layer. Buffers/pages are marked as not dirty on final phase and + processed files removed from the list of dirty files. + + It is possible to see that we had three prepare_write and submit_bio + phases before segbuf_wait and complete_write phase. Moreover, segments + compete between each other for dirty blocks because on every iteration + of segments processing dirty buffer_heads are added in several lists of + payload_buffers: + + [SEGMENT 6784]: bh->b_assoc_buffers.next ffff880218a0d5f8, bh->b_assoc_buffers.prev ffff880218bcdf50 + [SEGMENT 6785]: bh->b_assoc_buffers.next ffff880218a0d5f8, bh->b_assoc_buffers.prev ffff880222cc7ee8 + + The next pointer is the same but prev pointer has changed. It means + that buffer_head has next pointer from one list but prev pointer from + another. Such modification can be made several times. And, finally, it + can be resulted in various issues: (1) segctor hanging, (2) segctor + crashing, (3) file system metadata corruption. + + FIX: + This patch adds: + + (1) setting of BH_Async_Write flag in nilfs_segctor_prepare_write() + for every proccessed dirty block; + + (2) checking of BH_Async_Write flag in + nilfs_lookup_dirty_data_buffers() and + nilfs_lookup_dirty_node_buffers(); + + (3) clearing of BH_Async_Write flag in nilfs_segctor_complete_write(), + nilfs_abort_logs(), nilfs_forget_buffer(), nilfs_clear_dirty_page(). + + Reported-by: Jerome Poulin + Reported-by: Anton Eliasson + Cc: Paul Fertser + Cc: ARAI Shun-ichi + Cc: Piotr Szymaniak + Cc: Juan Barry Manuel Canham + Cc: Zahid Chowdhury + Cc: Elmer Zhang + Cc: Kenneth Langga + Signed-off-by: Vyacheslav Dubeyko + Acked-by: Ryusuke Konishi + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/nilfs2/page.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/nilfs2/page.c 2014-04-27 23:38:43.000000000 +0000 ++++ linux-3.10-3.10.11/fs/nilfs2/page.c 2014-04-28 00:38:40.000000000 +0000 +@@ -94,6 +94,7 @@ + clear_buffer_nilfs_volatile(bh); + clear_buffer_nilfs_checked(bh); + clear_buffer_nilfs_redirected(bh); ++ clear_buffer_async_write(bh); + clear_buffer_dirty(bh); + if (nilfs_page_buffers_clean(page)) + __nilfs_clear_page_dirty(page); +@@ -429,6 +430,7 @@ + "discard block %llu, size %zu", + (u64)bh->b_blocknr, bh->b_size); + } ++ clear_buffer_async_write(bh); + clear_buffer_dirty(bh); + clear_buffer_nilfs_volatile(bh); + clear_buffer_nilfs_checked(bh); +Index: linux-3.10-3.10.11/fs/nilfs2/segment.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/nilfs2/segment.c 2014-04-27 23:38:43.000000000 +0000 ++++ linux-3.10-3.10.11/fs/nilfs2/segment.c 2014-04-28 00:38:40.000000000 +0000 +@@ -665,7 +665,7 @@ + + bh = head = page_buffers(page); + do { +- if (!buffer_dirty(bh)) ++ if (!buffer_dirty(bh) || buffer_async_write(bh)) + continue; + get_bh(bh); + list_add_tail(&bh->b_assoc_buffers, listp); +@@ -699,7 +699,8 @@ + for (i = 0; i < pagevec_count(&pvec); i++) { + bh = head = page_buffers(pvec.pages[i]); + do { +- if (buffer_dirty(bh)) { ++ if (buffer_dirty(bh) && ++ !buffer_async_write(bh)) { + get_bh(bh); + list_add_tail(&bh->b_assoc_buffers, + listp); +@@ -1579,6 +1580,7 @@ + + list_for_each_entry(bh, &segbuf->sb_segsum_buffers, + b_assoc_buffers) { ++ set_buffer_async_write(bh); + if (bh->b_page != bd_page) { + if (bd_page) { + lock_page(bd_page); +@@ -1592,6 +1594,7 @@ + + list_for_each_entry(bh, &segbuf->sb_payload_buffers, + b_assoc_buffers) { ++ set_buffer_async_write(bh); + if (bh == segbuf->sb_super_root) { + if (bh->b_page != bd_page) { + lock_page(bd_page); +@@ -1677,6 +1680,7 @@ + list_for_each_entry(segbuf, logs, sb_list) { + list_for_each_entry(bh, &segbuf->sb_segsum_buffers, + b_assoc_buffers) { ++ clear_buffer_async_write(bh); + if (bh->b_page != bd_page) { + if (bd_page) + end_page_writeback(bd_page); +@@ -1686,6 +1690,7 @@ + + list_for_each_entry(bh, &segbuf->sb_payload_buffers, + b_assoc_buffers) { ++ clear_buffer_async_write(bh); + if (bh == segbuf->sb_super_root) { + if (bh->b_page != bd_page) { + end_page_writeback(bd_page); +@@ -1755,6 +1760,7 @@ + b_assoc_buffers) { + set_buffer_uptodate(bh); + clear_buffer_dirty(bh); ++ clear_buffer_async_write(bh); + if (bh->b_page != bd_page) { + if (bd_page) + end_page_writeback(bd_page); +@@ -1776,6 +1782,7 @@ + b_assoc_buffers) { + set_buffer_uptodate(bh); + clear_buffer_dirty(bh); ++ clear_buffer_async_write(bh); + clear_buffer_delay(bh); + clear_buffer_nilfs_volatile(bh); + clear_buffer_nilfs_redirected(bh); +Index: linux-3.10-3.10.11/dummy/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1326_d8974c7fe717ee8fb0706e35cc92e0bcdf660ec5.txt 2014-04-28 00:38:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.patch --- linux-3.10.11/debian/patches/rpi/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.patch 2014-04-28 00:38:42.000000000 +0000 @@ -0,0 +1,99 @@ +commit 74e8a9efa9f08394444ef6ea7a4349c35dd3e811 +Author: David S. Miller +Date: Thu Aug 1 18:08:34 2013 -0700 + + esp_scsi: Fix tag state corruption when autosensing. + + [ Upstream commit 21af8107f27878813d0364733c0b08813c2c192a ] + + Meelis Roos reports a crash in esp_free_lun_tag() in the presense + of a disk which has died. + + The issue is that when we issue an autosense command, we do so by + hijacking the original command that caused the check-condition. + + When we do so we clear out the ent->tag[] array when we issue it via + find_and_prep_issuable_command(). This is so that the autosense + command is forced to be issued non-tagged. + + That is problematic, because it is the value of ent->tag[] which + determines whether we issued the original scsi command as tagged + vs. non-tagged (see esp_alloc_lun_tag()). + + And that, in turn, is what trips up the sanity checks in + esp_free_lun_tag(). That function needs the original ->tag[] values + in order to free up the tag slot properly. + + Fix this by remembering the original command's tag values, and + having esp_alloc_lun_tag() and esp_free_lun_tag() use them. + + Reported-by: Meelis Roos + Tested-by: Meelis Roos + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/scsi/esp_scsi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/esp_scsi.c 2014-04-27 23:38:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/esp_scsi.c 2014-04-28 00:38:41.000000000 +0000 +@@ -530,7 +530,7 @@ + static int esp_alloc_lun_tag(struct esp_cmd_entry *ent, + struct esp_lun_data *lp) + { +- if (!ent->tag[0]) { ++ if (!ent->orig_tag[0]) { + /* Non-tagged, slot already taken? */ + if (lp->non_tagged_cmd) + return -EBUSY; +@@ -564,9 +564,9 @@ + return -EBUSY; + } + +- BUG_ON(lp->tagged_cmds[ent->tag[1]]); ++ BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]); + +- lp->tagged_cmds[ent->tag[1]] = ent; ++ lp->tagged_cmds[ent->orig_tag[1]] = ent; + lp->num_tagged++; + + return 0; +@@ -575,9 +575,9 @@ + static void esp_free_lun_tag(struct esp_cmd_entry *ent, + struct esp_lun_data *lp) + { +- if (ent->tag[0]) { +- BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent); +- lp->tagged_cmds[ent->tag[1]] = NULL; ++ if (ent->orig_tag[0]) { ++ BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent); ++ lp->tagged_cmds[ent->orig_tag[1]] = NULL; + lp->num_tagged--; + } else { + BUG_ON(lp->non_tagged_cmd != ent); +@@ -667,6 +667,8 @@ + ent->tag[0] = 0; + ent->tag[1] = 0; + } ++ ent->orig_tag[0] = ent->tag[0]; ++ ent->orig_tag[1] = ent->tag[1]; + + if (esp_alloc_lun_tag(ent, lp) < 0) + continue; +Index: linux-3.10-3.10.11/drivers/scsi/esp_scsi.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/esp_scsi.h 2014-04-27 23:38:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/esp_scsi.h 2014-04-28 00:38:41.000000000 +0000 +@@ -271,6 +271,7 @@ + #define ESP_CMD_FLAG_AUTOSENSE 0x04 /* Doing automatic REQUEST_SENSE */ + + u8 tag[2]; ++ u8 orig_tag[2]; + + u8 status; + u8 message; +Index: linux-3.10-3.10.11/dummy/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1327_74e8a9efa9f08394444ef6ea7a4349c35dd3e811.txt 2014-04-28 00:38:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.patch 2014-04-28 00:38:43.000000000 +0000 @@ -0,0 +1,45 @@ +commit 84c041cc9b2eb6305732e32f283d9fac2b0e8b6a +Author: Kirill Tkhai +Date: Fri Aug 2 19:23:18 2013 +0400 + + sparc64: Fix ITLB handler of null page + + [ Upstream commit 1c2696cdaad84580545a2e9c0879ff597880b1a9 ] + + 1)Use kvmap_itlb_longpath instead of kvmap_dtlb_longpath. + + 2)Handle page #0 only, don't handle page #1: bleu -> blu + + (KERNBASE is 0x400000, so #1 does not exist too. But everything + is possible in the future. Fix to not to have problems later.) + + 3)Remove unused kvmap_itlb_nonlinear. + + Signed-off-by: Kirill Tkhai + CC: David Miller + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/ktlb.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/ktlb.S 2014-04-27 23:38:43.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/ktlb.S 2014-04-28 00:38:42.000000000 +0000 +@@ -25,11 +25,10 @@ + */ + kvmap_itlb_4v: + +-kvmap_itlb_nonlinear: + /* Catch kernel NULL pointer calls. */ + sethi %hi(PAGE_SIZE), %g5 + cmp %g4, %g5 +- bleu,pn %xcc, kvmap_dtlb_longpath ++ blu,pn %xcc, kvmap_itlb_longpath + nop + + KERN_TSB_LOOKUP_TL1(%g4, %g6, %g5, %g1, %g2, %g3, kvmap_itlb_load) +Index: linux-3.10-3.10.11/dummy/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1328_84c041cc9b2eb6305732e32f283d9fac2b0e8b6a.txt 2014-04-28 00:38:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.patch 2014-04-28 00:38:43.000000000 +0000 @@ -0,0 +1,52 @@ +commit 32f0ba8e21166ec3ac11d692852d6d3e768942a4 +Author: Kirill Tkhai +Date: Mon Aug 12 16:02:24 2013 +0400 + + sparc64: Remove RWSEM export leftovers + + [ Upstream commit 61d9b9355b0d427bd1e732bd54628ff9103e496f ] + + The functions + + __down_read + __down_read_trylock + __down_write + __down_write_trylock + __up_read + __up_write + __downgrade_write + + are implemented inline, so remove corresponding EXPORT_SYMBOLs + (They lead to compile errors on RT kernel). + + Signed-off-by: Kirill Tkhai + CC: David Miller + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/lib/ksyms.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/lib/ksyms.c 2014-04-27 23:38:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/lib/ksyms.c 2014-04-28 00:38:43.000000000 +0000 +@@ -98,15 +98,6 @@ + EXPORT_SYMBOL(___copy_in_user); + EXPORT_SYMBOL(__clear_user); + +-/* RW semaphores */ +-EXPORT_SYMBOL(__down_read); +-EXPORT_SYMBOL(__down_read_trylock); +-EXPORT_SYMBOL(__down_write); +-EXPORT_SYMBOL(__down_write_trylock); +-EXPORT_SYMBOL(__up_read); +-EXPORT_SYMBOL(__up_write); +-EXPORT_SYMBOL(__downgrade_write); +- + /* Atomic counter implementation. */ + EXPORT_SYMBOL(atomic_add); + EXPORT_SYMBOL(atomic_add_ret); +Index: linux-3.10-3.10.11/dummy/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1329_32f0ba8e21166ec3ac11d692852d6d3e768942a4.txt 2014-04-28 00:38:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.patch 2014-04-28 00:38:44.000000000 +0000 @@ -0,0 +1,49 @@ +commit 34b6bdb2a889231e450774b5227a80c2f5051bc0 +Author: David S. Miller +Date: Fri Sep 27 13:46:04 2013 -0700 + + sparc64: Fix buggy strlcpy() conversion in ldom_reboot(). + + [ Upstream commit 2bd161a605f1f84a5fc8a4fe8410113a94f79355 ] + + Commit 117a0c5fc9c2d06045bd217385b2b39ea426b5a6 ("sparc: kernel: using + strlcpy() instead of strcpy()") added a bug to ldom_reboot in + arch/sparc/kernel/ds.c + + - strcpy(full_boot_str + strlen("boot "), boot_command); + + strlcpy(full_boot_str + strlen("boot "), boot_command, + + sizeof(full_boot_str + strlen("boot "))); + + That last sizeof() expression evaluates to sizeof(size_t) which is + not what was intended. + + Also even the corrected: + + sizeof(full_boot_str) + strlen("boot ") + + is not right as the destination buffer length is just plain + "sizeof(full_boot_str)" and that's what the final argument + should be. + + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/ds.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/ds.c 2014-04-27 23:38:42.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/ds.c 2014-04-28 00:38:44.000000000 +0000 +@@ -844,7 +844,7 @@ + + strcpy(full_boot_str, "boot "); + strlcpy(full_boot_str + strlen("boot "), boot_command, +- sizeof(full_boot_str + strlen("boot "))); ++ sizeof(full_boot_str)); + len = strlen(full_boot_str); + + if (reboot_data_supported) { +Index: linux-3.10-3.10.11/dummy/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1330_34b6bdb2a889231e450774b5227a80c2f5051bc0.txt 2014-04-28 00:38:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.patch 2014-04-28 00:38:45.000000000 +0000 @@ -0,0 +1,38 @@ +commit 5c19adb25bc8d618619c24c4500bbbbc06bdba0b +Author: Kees Cook +Date: Tue Oct 1 22:13:34 2013 -0700 + + sparc: fix ldom_reboot buffer overflow harder + + [ Upstream commit 20928bd3f08afb036c096d9559d581926b895918 ] + + The length argument to strlcpy was still wrong. It could overflow the end of + full_boot_str by 5 bytes. Instead of strcat and strlcpy, just use snprint. + + Reported-by: Brad Spengler + Signed-off-by: Kees Cook + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/ds.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/ds.c 2014-04-28 00:38:44.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/ds.c 2014-04-28 00:38:44.000000000 +0000 +@@ -842,9 +842,8 @@ + if (boot_command && strlen(boot_command)) { + unsigned long len; + +- strcpy(full_boot_str, "boot "); +- strlcpy(full_boot_str + strlen("boot "), boot_command, +- sizeof(full_boot_str)); ++ snprintf(full_boot_str, sizeof(full_boot_str), "boot %s", ++ boot_command); + len = strlen(full_boot_str); + + if (reboot_data_supported) { +Index: linux-3.10-3.10.11/dummy/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1331_5c19adb25bc8d618619c24c4500bbbbc06bdba0b.txt 2014-04-28 00:38:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.patch 2014-04-28 00:38:46.000000000 +0000 @@ -0,0 +1,38 @@ +commit ad779b05b451bf64ca159290339fd770539b298d +Author: David S. Miller +Date: Thu Aug 22 16:38:46 2013 -0700 + + sparc64: Fix off by one in trampoline TLB mapping installation loop. + + [ Upstream commit 63d499662aeec1864ec36d042aca8184ea6a938e ] + + Reported-by: Kirill Tkhai + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/trampoline_64.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/trampoline_64.S 2014-04-27 23:38:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/trampoline_64.S 2014-04-28 00:38:45.000000000 +0000 +@@ -131,7 +131,6 @@ + clr %l5 + sethi %hi(num_kernel_image_mappings), %l6 + lduw [%l6 + %lo(num_kernel_image_mappings)], %l6 +- add %l6, 1, %l6 + + mov 15, %l7 + BRANCH_IF_ANY_CHEETAH(g1,g5,2f) +@@ -224,7 +223,6 @@ + clr %l5 + sethi %hi(num_kernel_image_mappings), %l6 + lduw [%l6 + %lo(num_kernel_image_mappings)], %l6 +- add %l6, 1, %l6 + + 1: + mov HV_FAST_MMU_MAP_PERM_ADDR, %o5 +Index: linux-3.10-3.10.11/dummy/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1332_ad779b05b451bf64ca159290339fd770539b298d.txt 2014-04-28 00:38:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.patch 2014-04-28 00:38:47.000000000 +0000 @@ -0,0 +1,56 @@ +commit 4026b686478d8a3de4a10fd870a17ed53a7a2fc6 +Author: Kirill Tkhai +Date: Fri Jul 26 17:21:12 2013 +0400 + + sparc64: Fix not SRA'ed %o5 in 32-bit traced syscall + + [ Upstream commit ab2abda6377723e0d5fbbfe5f5aa16a5523344d1 ] + + (From v1 to v2: changed comment) + + On the way linux_sparc_syscall32->linux_syscall_trace32->goto 2f, + register %o5 doesn't clear its second 32-bit. + + Fix that. + + Signed-off-by: Kirill Tkhai + CC: David Miller + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/syscalls.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/syscalls.S 2014-04-27 23:38:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/syscalls.S 2014-04-28 00:38:46.000000000 +0000 +@@ -152,7 +152,7 @@ + srl %i4, 0, %o4 + srl %i1, 0, %o1 + srl %i2, 0, %o2 +- ba,pt %xcc, 2f ++ ba,pt %xcc, 5f + srl %i3, 0, %o3 + + linux_syscall_trace: +@@ -182,13 +182,13 @@ + srl %i1, 0, %o1 ! IEU0 Group + ldx [%g6 + TI_FLAGS], %l0 ! Load + +- srl %i5, 0, %o5 ! IEU1 ++ srl %i3, 0, %o3 ! IEU0 + srl %i2, 0, %o2 ! IEU0 Group + andcc %l0, (_TIF_SYSCALL_TRACE|_TIF_SECCOMP|_TIF_SYSCALL_AUDIT|_TIF_SYSCALL_TRACEPOINT), %g0 + bne,pn %icc, linux_syscall_trace32 ! CTI + mov %i0, %l5 ! IEU1 +- call %l7 ! CTI Group brk forced +- srl %i3, 0, %o3 ! IEU0 ++5: call %l7 ! CTI Group brk forced ++ srl %i5, 0, %o5 ! IEU1 + ba,a,pt %xcc, 3f + + /* Linux native system calls enter here... */ +Index: linux-3.10-3.10.11/dummy/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1333_4026b686478d8a3de4a10fd870a17ed53a7a2fc6.txt 2014-04-28 00:38:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.patch --- linux-3.10.11/debian/patches/rpi/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.patch 2014-04-28 00:38:47.000000000 +0000 @@ -0,0 +1,34 @@ +commit 04e7d3c0bcd0905d6977b926fd378280c0645e09 +Author: Kirill Tkhai +Date: Fri Jul 26 01:17:15 2013 +0400 + + sparc32: Fix exit flag passed from traced sys_sigreturn + + [ Upstream commit 7a3b0f89e3fea680f93932691ca41a68eee7ab5e ] + + Pass 1 in %o1 to indicate that syscall_trace accounts exit. + + Signed-off-by: Kirill Tkhai + CC: David Miller + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/sparc/kernel/entry.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/kernel/entry.S 2014-04-27 23:38:41.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/kernel/entry.S 2014-04-28 00:38:47.000000000 +0000 +@@ -839,7 +839,7 @@ + nop + + call syscall_trace +- nop ++ mov 1, %o1 + + 1: + /* We don't want to muck with user registers like a +Index: linux-3.10-3.10.11/dummy/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1334_04e7d3c0bcd0905d6977b926fd378280c0645e09.txt 2014-04-28 00:38:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.patch --- linux-3.10.11/debian/patches/rpi/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.patch 2014-04-28 00:38:48.000000000 +0000 @@ -0,0 +1,51 @@ +commit 4dc59be5037f059421e302890165d5ccf6a386ac +Author: David Miller +Date: Wed Oct 2 14:25:09 2013 -0400 + + mm: Fix generic hugetlb pte check return type. + + [ Upstream commit 26794942461f438a6bc725ec7294b08a6bd782c4 ] + + The include/asm-generic/hugetlb.h stubs that just vector huge_pte_*() + calls to the pte_*() implementations won't work in certain situations. + + x86 and sparc, for example, return "unsigned long" from the bit + checks, and just go "return pte_val(pte) & PTE_BIT_FOO;" + + But since huge_pte_*() returns 'int', if any high bits on 64-bit are + relevant, they get chopped off. + + The net effect is that we can loop forever trying to COW a huge page, + because the huge_pte_write() check signals false all the time. + + Reported-by: Gurudas Pai + Tested-by: Gurudas Pai + Signed-off-by: David S. Miller + Acked-by: David Rientjes + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/asm-generic/hugetlb.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/asm-generic/hugetlb.h 2014-04-27 23:38:40.000000000 +0000 ++++ linux-3.10-3.10.11/include/asm-generic/hugetlb.h 2014-04-28 00:38:48.000000000 +0000 +@@ -6,12 +6,12 @@ + return mk_pte(page, pgprot); + } + +-static inline int huge_pte_write(pte_t pte) ++static inline unsigned long huge_pte_write(pte_t pte) + { + return pte_write(pte); + } + +-static inline int huge_pte_dirty(pte_t pte) ++static inline unsigned long huge_pte_dirty(pte_t pte) + { + return pte_dirty(pte); + } +Index: linux-3.10-3.10.11/dummy/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1335_4dc59be5037f059421e302890165d5ccf6a386ac.txt 2014-04-28 00:38:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.patch --- linux-3.10.11/debian/patches/rpi/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.patch 2014-04-28 00:38:49.000000000 +0000 @@ -0,0 +1,42 @@ +commit a1cccf25241ba0f2f373f6c94bf8ff9a747ae305 +Author: Darrick J. Wong +Date: Mon Sep 30 13:45:09 2013 -0700 + + mm/bounce.c: fix a regression where MS_SNAP_STABLE (stable pages snapshotting) was ignored + + commit 83b2944fd2532b92db099cb3ada12df32a05b368 upstream. + + The "force" parameter in __blk_queue_bounce was being ignored, which + means that stable page snapshots are not always happening (on ext3). + This of course leads to DIF disks reporting checksum errors, so fix this + regression. + + The regression was introduced in commit 6bc454d15004 ("bounce: Refactor + __blk_queue_bounce to not use bi_io_vec") + + Reported-by: Mel Gorman + Signed-off-by: Darrick J. Wong + Cc: Kent Overstreet + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/bounce.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/bounce.c 2014-04-27 23:38:40.000000000 +0000 ++++ linux-3.10-3.10.11/mm/bounce.c 2014-04-28 00:38:49.000000000 +0000 +@@ -204,6 +204,8 @@ + struct bio_vec *to, *from; + unsigned i; + ++ if (force) ++ goto bounce; + bio_for_each_segment(from, *bio_orig, i) + if (page_to_pfn(from->bv_page) > queue_bounce_pfn(q)) + goto bounce; +Index: linux-3.10-3.10.11/dummy/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1336_a1cccf25241ba0f2f373f6c94bf8ff9a747ae305.txt 2014-04-28 00:38:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.patch 2014-04-28 00:38:50.000000000 +0000 @@ -0,0 +1,80 @@ +commit 96baebd41aab7e82b6d6083d8f31c482dd5a576e +Author: Ian Abbott +Date: Wed Oct 2 14:57:51 2013 +0100 + + staging: comedi: ni_65xx: (bug fix) confine insn_bits to one subdevice + + commit 677a31565692d596ef42ea589b53ba289abf4713 upstream. + + The `insn_bits` handler `ni_65xx_dio_insn_bits()` has a `for` loop that + currently writes (optionally) and reads back up to 5 "ports" consisting + of 8 channels each. It reads up to 32 1-bit channels but can only read + and write a whole port at once - it needs to handle up to 5 ports as the + first channel it reads might not be aligned on a port boundary. It + breaks out of the loop early if the next port it handles is beyond the + final port on the card. It also breaks out early on the 5th port in the + loop if the first channel was aligned. Unfortunately, it doesn't check + that the current port it is dealing with belongs to the comedi subdevice + the `insn_bits` handler is acting on. That's a bug. + + Redo the `for` loop to terminate after the final port belonging to the + subdevice, changing the loop variable in the process to simplify things + a bit. The `for` loop could now try and handle more than 5 ports if the + subdevice has more than 40 channels, but the test `if (bitshift >= 32)` + ensures it will break out early after 4 or 5 ports (depending on whether + the first channel is aligned on a port boundary). (`bitshift` will be + between -7 and 7 inclusive on the first iteration, increasing by 8 for + each subsequent operation.) + + Signed-off-by: Ian Abbott + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/comedi/drivers/ni_65xx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/comedi/drivers/ni_65xx.c 2014-04-27 23:38:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/comedi/drivers/ni_65xx.c 2014-04-28 00:38:49.000000000 +0000 +@@ -383,28 +383,23 @@ + { + const struct ni_65xx_board *board = comedi_board(dev); + struct ni_65xx_private *devpriv = dev->private; +- unsigned base_bitfield_channel; +- const unsigned max_ports_per_bitfield = 5; ++ int base_bitfield_channel; + unsigned read_bits = 0; +- unsigned j; ++ int last_port_offset = ni_65xx_port_by_channel(s->n_chan - 1); ++ int port_offset; + + base_bitfield_channel = CR_CHAN(insn->chanspec); +- for (j = 0; j < max_ports_per_bitfield; ++j) { +- const unsigned port_offset = +- ni_65xx_port_by_channel(base_bitfield_channel) + j; +- const unsigned port = +- sprivate(s)->base_port + port_offset; +- unsigned base_port_channel; ++ for (port_offset = ni_65xx_port_by_channel(base_bitfield_channel); ++ port_offset <= last_port_offset; port_offset++) { ++ unsigned port = sprivate(s)->base_port + port_offset; ++ int base_port_channel = port_offset * ni_65xx_channels_per_port; + unsigned port_mask, port_data, port_read_bits; +- int bitshift; +- if (port >= ni_65xx_total_num_ports(board)) ++ int bitshift = base_port_channel - base_bitfield_channel; ++ ++ if (bitshift >= 32) + break; +- base_port_channel = port_offset * ni_65xx_channels_per_port; + port_mask = data[0]; + port_data = data[1]; +- bitshift = base_port_channel - base_bitfield_channel; +- if (bitshift >= 32 || bitshift <= -32) +- break; + if (bitshift > 0) { + port_mask >>= bitshift; + port_data >>= bitshift; +Index: linux-3.10-3.10.11/dummy/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1337_96baebd41aab7e82b6d6083d8f31c482dd5a576e.txt 2014-04-28 00:38:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1338_28f7ae257183e8064119db486190d2229caae369.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1338_28f7ae257183e8064119db486190d2229caae369.patch --- linux-3.10.11/debian/patches/rpi/rpi_1338_28f7ae257183e8064119db486190d2229caae369.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1338_28f7ae257183e8064119db486190d2229caae369.patch 2014-04-28 00:38:51.000000000 +0000 @@ -0,0 +1,70 @@ +commit 28f7ae257183e8064119db486190d2229caae369 +Author: Trond Myklebust +Date: Thu Sep 26 14:08:36 2013 -0400 + + NFSv4.1: nfs4_fl_prepare_ds - fix bugs when the connect attempt fails + + commit 52b26a3e1bb3e065c32b3febdac1e1f117d88e15 upstream. + + - Fix an Oops when nfs4_ds_connect() returns an error. + - Always check the device status after waiting for a connect to complete. + + Reported-by: Andy Adamson + Reported-by: Jeff Layton + Signed-off-by: Trond Myklebust + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/nfs/nfs4filelayoutdev.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/nfs/nfs4filelayoutdev.c 2014-04-27 23:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/nfs/nfs4filelayoutdev.c 2014-04-28 00:38:50.000000000 +0000 +@@ -797,34 +797,34 @@ + struct nfs4_file_layout_dsaddr *dsaddr = FILELAYOUT_LSEG(lseg)->dsaddr; + struct nfs4_pnfs_ds *ds = dsaddr->ds_list[ds_idx]; + struct nfs4_deviceid_node *devid = FILELAYOUT_DEVID_NODE(lseg); +- +- if (filelayout_test_devid_unavailable(devid)) +- return NULL; ++ struct nfs4_pnfs_ds *ret = ds; + + if (ds == NULL) { + printk(KERN_ERR "NFS: %s: No data server for offset index %d\n", + __func__, ds_idx); + filelayout_mark_devid_invalid(devid); +- return NULL; ++ goto out; + } + if (ds->ds_clp) +- return ds; ++ goto out_test_devid; + + if (test_and_set_bit(NFS4DS_CONNECTING, &ds->ds_state) == 0) { + struct nfs_server *s = NFS_SERVER(lseg->pls_layout->plh_inode); + int err; + + err = nfs4_ds_connect(s, ds); +- if (err) { ++ if (err) + nfs4_mark_deviceid_unavailable(devid); +- ds = NULL; +- } + nfs4_clear_ds_conn_bit(ds); + } else { + /* Either ds is connected, or ds is NULL */ + nfs4_wait_ds_connect(ds); + } +- return ds; ++out_test_devid: ++ if (filelayout_test_devid_unavailable(devid)) ++ ret = NULL; ++out: ++ return ret; + } + + module_param(dataserver_retrans, uint, 0644); +Index: linux-3.10-3.10.11/dummy/rpi_1338_28f7ae257183e8064119db486190d2229caae369.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1338_28f7ae257183e8064119db486190d2229caae369.txt 2014-04-28 00:38:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.patch 2014-04-28 00:38:51.000000000 +0000 @@ -0,0 +1,66 @@ +commit c7a448c3372a03c2a0848ed2c5c0ee76518a77b6 +Author: Bing Zhao +Date: Tue Sep 24 19:31:25 2013 -0700 + + mwifiex: fix NULL pointer dereference in usb suspend handler + + commit 346ece0b7ba2730b4d633b9e371fe55488803102 upstream. + + Bug 60815 - Interface hangs in mwifiex_usb + https://bugzilla.kernel.org/show_bug.cgi?id=60815 + + [ 2.883807] BUG: unable to handle kernel NULL pointer dereference + at 0000000000000048 + [ 2.883813] IP: [] pfifo_fast_enqueue+0x90/0x90 + + [ 2.883834] CPU: 1 PID: 3220 Comm: kworker/u8:90 Not tainted + 3.11.1-monotone-l0 #6 + [ 2.883834] Hardware name: Microsoft Corporation Surface with + Windows 8 Pro/Surface with Windows 8 Pro, + BIOS 1.03.0450 03/29/2013 + + On Surface Pro, suspend to ram gives a NULL pointer dereference in + pfifo_fast_enqueue(). The stack trace reveals that the offending + call is clearing carrier in mwifiex_usb suspend handler. + + Since commit 1499d9f "mwifiex: don't drop carrier flag over suspend" + has removed the carrier flag handling over suspend/resume in SDIO + and PCIe drivers, I'm removing it in USB driver too. This also fixes + the bug for Surface Pro. + + Tested-by: Dmitry Khromov + Signed-off-by: Bing Zhao + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/usb.c 2014-04-27 23:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/usb.c 2014-04-28 00:38:51.000000000 +0000 +@@ -446,9 +446,6 @@ + */ + adapter->is_suspended = true; + +- for (i = 0; i < adapter->priv_num; i++) +- netif_carrier_off(adapter->priv[i]->netdev); +- + if (atomic_read(&card->rx_cmd_urb_pending) && card->rx_cmd.urb) + usb_kill_urb(card->rx_cmd.urb); + +@@ -508,10 +505,6 @@ + MWIFIEX_RX_CMD_BUF_SIZE); + } + +- for (i = 0; i < adapter->priv_num; i++) +- if (adapter->priv[i]->media_connected) +- netif_carrier_on(adapter->priv[i]->netdev); +- + /* Disable Host Sleep */ + if (adapter->hs_activated) + mwifiex_cancel_hs(mwifiex_get_priv(adapter, +Index: linux-3.10-3.10.11/dummy/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1339_c7a448c3372a03c2a0848ed2c5c0ee76518a77b6.txt 2014-04-28 00:38:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.patch 2014-04-28 00:38:52.000000000 +0000 @@ -0,0 +1,80 @@ +commit 88fb132a74d2352bcabff8e6b1443210e9b99e9d +Author: Amitkumar Karwar +Date: Tue Sep 24 19:31:24 2013 -0700 + + mwifiex: fix hang issue for USB chipsets + + commit bd1c6142edce787b8ac1be15635f845aa9905333 upstream. + + Bug 60815 - Interface hangs in mwifiex_usb + https://bugzilla.kernel.org/show_bug.cgi?id=60815 + + We have 4 bytes of interface header for packets delivered to SDIO + and PCIe, but not for USB interface. + + In Tx AMSDU case, currently 4 bytes of garbage data is unnecessarily + appended for USB packets. This sometimes leads to a firmware hang, + because it may not interpret the data packet correctly. + + Problem is fixed by removing this redundant headroom for USB. + + Tested-by: Dmitry Khromov + Signed-off-by: Amitkumar Karwar + Signed-off-by: Bing Zhao + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/11n_aggr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/11n_aggr.c 2014-04-27 23:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/11n_aggr.c 2014-04-28 00:38:52.000000000 +0000 +@@ -149,7 +149,7 @@ + */ + int + mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv, +- struct mwifiex_ra_list_tbl *pra_list, int headroom, ++ struct mwifiex_ra_list_tbl *pra_list, + int ptrindex, unsigned long ra_list_flags) + __releases(&priv->wmm.ra_list_spinlock) + { +@@ -159,6 +159,7 @@ + int pad = 0, ret; + struct mwifiex_tx_param tx_param; + struct txpd *ptx_pd = NULL; ++ int headroom = adapter->iface_type == MWIFIEX_USB ? 0 : INTF_HEADER_LEN; + + skb_src = skb_peek(&pra_list->skb_head); + if (!skb_src) { +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/11n_aggr.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/11n_aggr.h 2014-04-27 23:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/11n_aggr.h 2014-04-28 00:38:52.000000000 +0000 +@@ -26,7 +26,7 @@ + int mwifiex_11n_deaggregate_pkt(struct mwifiex_private *priv, + struct sk_buff *skb); + int mwifiex_11n_aggregate_pkt(struct mwifiex_private *priv, +- struct mwifiex_ra_list_tbl *ptr, int headroom, ++ struct mwifiex_ra_list_tbl *ptr, + int ptr_index, unsigned long flags) + __releases(&priv->wmm.ra_list_spinlock); + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/wmm.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/wmm.c 2014-04-27 23:38:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/wmm.c 2014-04-28 00:38:52.000000000 +0000 +@@ -1236,8 +1236,7 @@ + if (mwifiex_is_amsdu_allowed(priv, tid) && + mwifiex_is_11n_aggragation_possible(priv, ptr, + adapter->tx_buf_size)) +- mwifiex_11n_aggregate_pkt(priv, ptr, INTF_HEADER_LEN, +- ptr_index, flags); ++ mwifiex_11n_aggregate_pkt(priv, ptr, ptr_index, flags); + /* ra_list_spinlock has been freed in + mwifiex_11n_aggregate_pkt() */ + else +Index: linux-3.10-3.10.11/dummy/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1340_88fb132a74d2352bcabff8e6b1443210e9b99e9d.txt 2014-04-28 00:38:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.patch --- linux-3.10.11/debian/patches/rpi/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.patch 2014-04-28 00:38:53.000000000 +0000 @@ -0,0 +1,50 @@ +commit e54fcd5bcf04a1623e0cd5bf1eff5948d5666990 +Author: Bing Zhao +Date: Fri Sep 20 19:56:45 2013 -0700 + + mwifiex: fix PCIe hs_cfg cancel cmd timeout + + commit b7be1522def9a9988b67afd0be999c50a96394b5 upstream. + + For pcie8897, the hs_cfg cancel command (0xe5) times out when host + comes out of suspend. This is caused by an incompleted host sleep + handshake between driver and firmware. + + Like SDIO interface, PCIe also needs to go through firmware power + save events to complete the handshake for host sleep configuration. + Only USB interface doesn't require power save events for hs_cfg. + + Signed-off-by: Bing Zhao + Signed-off-by: Amitkumar Karwar + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/cmdevt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/cmdevt.c 2014-04-27 23:38:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/cmdevt.c 2014-04-28 00:38:53.000000000 +0000 +@@ -1154,7 +1154,7 @@ + uint32_t conditions = le32_to_cpu(phs_cfg->params.hs_config.conditions); + + if (phs_cfg->action == cpu_to_le16(HS_ACTIVATE) && +- adapter->iface_type == MWIFIEX_SDIO) { ++ adapter->iface_type != MWIFIEX_USB) { + mwifiex_hs_activated_event(priv, true); + return 0; + } else { +@@ -1166,8 +1166,7 @@ + } + if (conditions != HS_CFG_CANCEL) { + adapter->is_hs_configured = true; +- if (adapter->iface_type == MWIFIEX_USB || +- adapter->iface_type == MWIFIEX_PCIE) ++ if (adapter->iface_type == MWIFIEX_USB) + mwifiex_hs_activated_event(priv, true); + } else { + adapter->is_hs_configured = false; +Index: linux-3.10-3.10.11/dummy/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1341_e54fcd5bcf04a1623e0cd5bf1eff5948d5666990.txt 2014-04-28 00:38:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.patch --- linux-3.10.11/debian/patches/rpi/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.patch 2014-04-28 00:38:54.000000000 +0000 @@ -0,0 +1,48 @@ +commit 1b069646f53350d9c1188cef6d6bdd09a1df8b44 +Author: Michal Malý +Date: Sat Sep 28 19:50:27 2013 +0200 + + USB: serial: option: Ignore card reader interface on Huawei E1750 + + commit eb2addd4044b4b2ce77693bde5bc810536dd96ee upstream. + + Hi, + + my Huawei 3G modem has an embedded Smart Card reader which causes + trouble when the modem is being detected (a bunch of " (ttyUSBx): + open blocked by driver for more than 7 seconds!" in messages.log). This + trivial patch corrects the problem for me. The modem identifies itself + as "12d1:1406 Huawei Technologies Co., Ltd. E1750" in lsusb although the + description on the body says "Model E173u-1" + + Signed-off-by: Michal Malý + Cc: Bjørn Mork + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/option.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/option.c 2014-04-27 23:38:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/option.c 2014-04-28 00:38:54.000000000 +0000 +@@ -81,6 +81,7 @@ + + #define HUAWEI_VENDOR_ID 0x12D1 + #define HUAWEI_PRODUCT_E173 0x140C ++#define HUAWEI_PRODUCT_E1750 0x1406 + #define HUAWEI_PRODUCT_K4505 0x1464 + #define HUAWEI_PRODUCT_K3765 0x1465 + #define HUAWEI_PRODUCT_K4605 0x14C6 +@@ -567,6 +568,8 @@ + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1c23, USB_CLASS_COMM, 0x02, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E173, 0xff, 0xff, 0xff), + .driver_info = (kernel_ulong_t) &net_intf1_blacklist }, ++ { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_E1750, 0xff, 0xff, 0xff), ++ .driver_info = (kernel_ulong_t) &net_intf2_blacklist }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1441, USB_CLASS_COMM, 0x02, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0x1442, USB_CLASS_COMM, 0x02, 0xff) }, + { USB_DEVICE_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, HUAWEI_PRODUCT_K4505, 0xff, 0xff, 0xff), +Index: linux-3.10-3.10.11/dummy/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1342_1b069646f53350d9c1188cef6d6bdd09a1df8b44.txt 2014-04-28 00:38:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.patch 2014-04-28 00:38:55.000000000 +0000 @@ -0,0 +1,37 @@ +commit 8598a32d43af4abe6f3a464af8be7fc020080cf3 +Author: David Vrabel +Date: Tue Oct 1 19:00:49 2013 +0100 + + xen/hvc: allow xenboot console to be used again + + commit a9fbf4d591da6cd1d3eaab826c7c15f77fc8f6a3 upstream. + + Commit d0380e6c3c0f6edb986d8798a23acfaf33d5df23 (early_printk: + consolidate random copies of identical code) added in 3.10 introduced + a check for con->index == -1 in early_console_register(). + + Initialize index to -1 for the xenboot console so earlyprintk=xen + works again. + + Signed-off-by: David Vrabel + Cc: Jiri Slaby + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/hvc/hvc_xen.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/hvc/hvc_xen.c 2014-04-27 23:38:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/hvc/hvc_xen.c 2014-04-28 00:38:54.000000000 +0000 +@@ -636,6 +636,7 @@ + .name = "xenboot", + .write = xenboot_write_console, + .flags = CON_PRINTBUFFER | CON_BOOT | CON_ANYTIME, ++ .index = -1, + }; + #endif /* CONFIG_EARLY_PRINTK */ + +Index: linux-3.10-3.10.11/dummy/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1343_8598a32d43af4abe6f3a464af8be7fc020080cf3.txt 2014-04-28 00:38:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.patch 2014-04-28 00:38:56.000000000 +0000 @@ -0,0 +1,56 @@ +commit 5b97382398dda31ca38a8c62880a21af03cf6f7f +Author: Nicholas Bellinger +Date: Wed Sep 18 12:48:27 2013 -0700 + + ib_srpt: Destroy cm_id before destroying QP. + + commit 0b41d6ca616ddeb3b6c0a80e8770b6f53cd42806 upstream. + + This patch fixes a bug where ib_destroy_cm_id() was incorrectly being called + after srpt_destroy_ch_ib() had destroyed the active QP. + + This would result in the following failed SRP_LOGIN_REQ messages: + + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff1762bd, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 1 (guid=0xfe80000000000000:0x2c903009f8f41) + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff1758f9, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 2 (guid=0xfe80000000000000:0x2c903009f8f42) + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff175941, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 2 (guid=0xfe80000000000000:0x2c90300a3cfb2) + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff176299, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 1 (guid=0xfe80000000000000:0x2c90300a3cfb1) + mlx4_core 0000:84:00.0: command 0x19 failed: fw status = 0x9 + rejected SRP_LOGIN_REQ because creating a new RDMA channel failed. + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff176299, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 1 (guid=0xfe80000000000000:0x2c90300a3cfb1) + mlx4_core 0000:84:00.0: command 0x19 failed: fw status = 0x9 + rejected SRP_LOGIN_REQ because creating a new RDMA channel failed. + Received SRP_LOGIN_REQ with i_port_id 0x0:0x2590ffff176299, t_port_id 0x2c903009f8f40:0x2c903009f8f40 and it_iu_len 260 on port 1 (guid=0xfe80000000000000:0x2c90300a3cfb1) + + Reported-by: Navin Ahuja + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/infiniband/ulp/srpt/ib_srpt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/infiniband/ulp/srpt/ib_srpt.c 2014-04-27 23:38:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/infiniband/ulp/srpt/ib_srpt.c 2014-04-28 00:38:55.000000000 +0000 +@@ -2358,6 +2358,8 @@ + transport_deregister_session(se_sess); + ch->sess = NULL; + ++ ib_destroy_cm_id(ch->cm_id); ++ + srpt_destroy_ch_ib(ch); + + srpt_free_ioctx_ring((struct srpt_ioctx **)ch->ioctx_ring, +@@ -2368,8 +2370,6 @@ + list_del(&ch->list); + spin_unlock_irq(&sdev->spinlock); + +- ib_destroy_cm_id(ch->cm_id); +- + if (ch->release_done) + complete(ch->release_done); + +Index: linux-3.10-3.10.11/dummy/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1344_5b97382398dda31ca38a8c62880a21af03cf6f7f.txt 2014-04-28 00:38:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.patch --- linux-3.10.11/debian/patches/rpi/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.patch 2014-04-28 00:38:56.000000000 +0000 @@ -0,0 +1,56 @@ +commit b07ce93054a72fe89b42096f7603afe3395a95ea +Author: Jack Wang +Date: Mon Sep 30 10:09:05 2013 +0200 + + ib_srpt: always set response for task management + + commit c807f64340932e19f0d2ac9b30c8381e1f60663a upstream. + + The SRP specification requires: + + "Response data shall be provided in any SRP_RSP response that is sent in + response to an SRP_TSK_MGMT request (see 6.7). The information in the + RSP_CODE field (see table 24) shall indicate the completion status of + the task management function." + + So fix this to avoid the SRP initiator interprets task management functions + that succeeded as failed. + + Signed-off-by: Jack Wang + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/infiniband/ulp/srpt/ib_srpt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/infiniband/ulp/srpt/ib_srpt.c 2014-04-28 00:38:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/infiniband/ulp/srpt/ib_srpt.c 2014-04-28 00:38:56.000000000 +0000 +@@ -1588,7 +1588,7 @@ + int resp_data_len; + int resp_len; + +- resp_data_len = (rsp_code == SRP_TSK_MGMT_SUCCESS) ? 0 : 4; ++ resp_data_len = 4; + resp_len = sizeof(*srp_rsp) + resp_data_len; + + srp_rsp = ioctx->ioctx.buf; +@@ -1600,11 +1600,9 @@ + + atomic_xchg(&ch->req_lim_delta, 0)); + srp_rsp->tag = tag; + +- if (rsp_code != SRP_TSK_MGMT_SUCCESS) { +- srp_rsp->flags |= SRP_RSP_FLAG_RSPVALID; +- srp_rsp->resp_data_len = cpu_to_be32(resp_data_len); +- srp_rsp->data[3] = rsp_code; +- } ++ srp_rsp->flags |= SRP_RSP_FLAG_RSPVALID; ++ srp_rsp->resp_data_len = cpu_to_be32(resp_data_len); ++ srp_rsp->data[3] = rsp_code; + + return resp_len; + } +Index: linux-3.10-3.10.11/dummy/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1345_b07ce93054a72fe89b42096f7603afe3395a95ea.txt 2014-04-28 00:38:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.patch --- linux-3.10.11/debian/patches/rpi/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.patch 2014-04-28 00:38:57.000000000 +0000 @@ -0,0 +1,38 @@ +commit c00095f3c4dcafb0031cbab8abb43787efa7ee64 +Author: Larry Finger +Date: Wed Sep 18 21:21:35 2013 -0500 + + rtlwifi: Align private space in rtl_priv struct + + commit 60ce314d1750fef843e9db70050e09e49f838b69 upstream. + + The private array at the end of the rtl_priv struct is not aligned. + On ARM architecture, this causes an alignment trap and is fixed by aligning + that array with __align(sizeof(void *)). That should properly align that + space according to the requirements of all architectures. + + Reported-by: Jason Andrews + Tested-by: Jason Andrews + Signed-off-by: Larry Finger + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/wifi.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtlwifi/wifi.h 2014-04-27 23:38:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/wifi.h 2014-04-28 00:38:57.000000000 +0000 +@@ -2057,7 +2057,7 @@ + that it points to the data allocated + beyond this structure like: + rtl_pci_priv or rtl_usb_priv */ +- u8 priv[0]; ++ u8 priv[0] __aligned(sizeof(void *)); + }; + + #define rtl_priv(hw) (((struct rtl_priv *)(hw)->priv)) +Index: linux-3.10-3.10.11/dummy/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1346_c00095f3c4dcafb0031cbab8abb43787efa7ee64.txt 2014-04-28 00:38:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.patch --- linux-3.10.11/debian/patches/rpi/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.patch 2014-04-28 00:38:58.000000000 +0000 @@ -0,0 +1,33 @@ +commit 3e1972928dc7221bbf81c138667aa5d131623dce +Author: Christian Lamparter +Date: Tue Sep 24 21:56:46 2013 +0200 + + p54usb: add USB ID for Corega WLUSB2GTST USB adapter + + commit 1e43692cdb7cc445d6347d8a5207d9cef0c71434 upstream. + + Added USB ID for Corega WLUSB2GTST USB adapter. + + Reported-by: Joerg Kalisch + Signed-off-by: Christian Lamparter + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/p54/p54usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/p54/p54usb.c 2014-04-28 00:32:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/p54/p54usb.c 2014-04-28 00:38:57.000000000 +0000 +@@ -83,6 +83,7 @@ + {USB_DEVICE(0x06a9, 0x000e)}, /* Westell 802.11g USB (A90-211WG-01) */ + {USB_DEVICE(0x06b9, 0x0121)}, /* Thomson SpeedTouch 121g */ + {USB_DEVICE(0x0707, 0xee13)}, /* SMC 2862W-G version 2 */ ++ {USB_DEVICE(0x07aa, 0x0020)}, /* Corega WLUSB2GTST USB */ + {USB_DEVICE(0x0803, 0x4310)}, /* Zoom 4410a */ + {USB_DEVICE(0x083a, 0x4521)}, /* Siemens Gigaset USB Adapter 54 version 2 */ + {USB_DEVICE(0x083a, 0x4531)}, /* T-Com Sinus 154 data II */ +Index: linux-3.10-3.10.11/dummy/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1347_3e1972928dc7221bbf81c138667aa5d131623dce.txt 2014-04-28 00:38:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.patch 2014-04-28 00:38:59.000000000 +0000 @@ -0,0 +1,149 @@ +commit 009dfd4415d898150824d352905fcb80ae1de16e +Author: Rafael Aquini +Date: Mon Sep 30 13:45:16 2013 -0700 + + mm: avoid reinserting isolated balloon pages into LRU lists + + commit 117aad1e9e4d97448d1df3f84b08bd65811e6d6a upstream. + + Isolated balloon pages can wrongly end up in LRU lists when + migrate_pages() finishes its round without draining all the isolated + page list. + + The same issue can happen when reclaim_clean_pages_from_list() tries to + reclaim pages from an isolated page list, before migration, in the CMA + path. Such balloon page leak opens a race window against LRU lists + shrinkers that leads us to the following kernel panic: + + BUG: unable to handle kernel NULL pointer dereference at 0000000000000028 + IP: [] shrink_page_list+0x24e/0x897 + PGD 3cda2067 PUD 3d713067 PMD 0 + Oops: 0000 [#1] SMP + CPU: 0 PID: 340 Comm: kswapd0 Not tainted 3.12.0-rc1-22626-g4367597 #87 + Hardware name: Bochs Bochs, BIOS Bochs 01/01/2011 + RIP: shrink_page_list+0x24e/0x897 + RSP: 0000:ffff88003da499b8 EFLAGS: 00010286 + RAX: 0000000000000000 RBX: ffff88003e82bd60 RCX: 00000000000657d5 + RDX: 0000000000000000 RSI: 000000000000031f RDI: ffff88003e82bd40 + RBP: ffff88003da49ab0 R08: 0000000000000001 R09: 0000000081121a45 + R10: ffffffff81121a45 R11: ffff88003c4a9a28 R12: ffff88003e82bd40 + R13: ffff88003da0e800 R14: 0000000000000001 R15: ffff88003da49d58 + FS: 0000000000000000(0000) GS:ffff88003fc00000(0000) knlGS:0000000000000000 + CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + CR2: 00000000067d9000 CR3: 000000003ace5000 CR4: 00000000000407b0 + Call Trace: + shrink_inactive_list+0x240/0x3de + shrink_lruvec+0x3e0/0x566 + __shrink_zone+0x94/0x178 + shrink_zone+0x3a/0x82 + balance_pgdat+0x32a/0x4c2 + kswapd+0x2f0/0x372 + kthread+0xa2/0xaa + ret_from_fork+0x7c/0xb0 + Code: 80 7d 8f 01 48 83 95 68 ff ff ff 00 4c 89 e7 e8 5a 7b 00 00 48 85 c0 49 89 c5 75 08 80 7d 8f 00 74 3e eb 31 48 8b 80 18 01 00 00 <48> 8b 74 0d 48 8b 78 30 be 02 00 00 00 ff d2 eb + RIP [] shrink_page_list+0x24e/0x897 + RSP + CR2: 0000000000000028 + ---[ end trace 703d2451af6ffbfd ]--- + Kernel panic - not syncing: Fatal exception + + This patch fixes the issue, by assuring the proper tests are made at + putback_movable_pages() & reclaim_clean_pages_from_list() to avoid + isolated balloon pages being wrongly reinserted in LRU lists. + + [akpm@linux-foundation.org: clarify awkward comment text] + Signed-off-by: Rafael Aquini + Reported-by: Luiz Capitulino + Tested-by: Luiz Capitulino + Cc: Mel Gorman + Cc: Rik van Riel + Cc: Hugh Dickins + Cc: Johannes Weiner + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/balloon_compaction.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/balloon_compaction.h 2014-04-27 23:38:36.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/balloon_compaction.h 2014-04-28 00:38:58.000000000 +0000 +@@ -159,6 +159,26 @@ + } + + /* ++ * isolated_balloon_page - identify an isolated balloon page on private ++ * compaction/migration page lists. ++ * ++ * After a compaction thread isolates a balloon page for migration, it raises ++ * the page refcount to prevent concurrent compaction threads from re-isolating ++ * the same page. For that reason putback_movable_pages(), or other routines ++ * that need to identify isolated balloon pages on private pagelists, cannot ++ * rely on balloon_page_movable() to accomplish the task. ++ */ ++static inline bool isolated_balloon_page(struct page *page) ++{ ++ /* Already isolated balloon pages, by default, have a raised refcount */ ++ if (page_flags_cleared(page) && !page_mapped(page) && ++ page_count(page) >= 2) ++ return __is_movable_balloon_page(page); ++ ++ return false; ++} ++ ++/* + * balloon_page_insert - insert a page into the balloon's page list and make + * the page->mapping assignment accordingly. + * @page : page to be assigned as a 'balloon page' +@@ -242,6 +262,11 @@ + { + return false; + } ++ ++static inline bool isolated_balloon_page(struct page *page) ++{ ++ return false; ++} + + static inline bool balloon_page_isolate(struct page *page) + { +Index: linux-3.10-3.10.11/mm/migrate.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/migrate.c 2014-04-27 23:38:36.000000000 +0000 ++++ linux-3.10-3.10.11/mm/migrate.c 2014-04-28 00:38:58.000000000 +0000 +@@ -103,7 +103,7 @@ + list_del(&page->lru); + dec_zone_page_state(page, NR_ISOLATED_ANON + + page_is_file_cache(page)); +- if (unlikely(balloon_page_movable(page))) ++ if (unlikely(isolated_balloon_page(page))) + balloon_page_putback(page); + else + putback_lru_page(page); +Index: linux-3.10-3.10.11/mm/vmscan.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/vmscan.c 2014-04-27 23:38:36.000000000 +0000 ++++ linux-3.10-3.10.11/mm/vmscan.c 2014-04-28 00:38:58.000000000 +0000 +@@ -48,6 +48,7 @@ + #include + + #include ++#include + + #include "internal.h" + +@@ -978,7 +979,8 @@ + LIST_HEAD(clean_pages); + + list_for_each_entry_safe(page, next, page_list, lru) { +- if (page_is_file_cache(page) && !PageDirty(page)) { ++ if (page_is_file_cache(page) && !PageDirty(page) && ++ !isolated_balloon_page(page)) { + ClearPageActive(page); + list_move(&page->lru, &clean_pages); + } +Index: linux-3.10-3.10.11/dummy/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1348_009dfd4415d898150824d352905fcb80ae1de16e.txt 2014-04-28 00:38:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.patch --- linux-3.10.11/debian/patches/rpi/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.patch 2014-04-28 00:39:00.000000000 +0000 @@ -0,0 +1,46 @@ +commit a0348152bd365caadc105f11da03fc020bcc6226 +Author: Nicholas Bellinger +Date: Thu Oct 3 13:37:21 2013 -0700 + + iscsi-target: Only perform wait_for_tasks when performing shutdown + + commit e255a28598e8e63070322fc89bd34189dd660a89 upstream. + + This patch changes transport_generic_free_cmd() to only wait_for_tasks + when shutdown=true is passed to iscsit_free_cmd(). + + With the advent of >= v3.10 iscsi-target code using se_cmd->cmd_kref, + the extra wait_for_tasks with shutdown=false is unnecessary, and may + end up causing an extra context switch when releasing WRITEs. + + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/target/iscsi/iscsi_target_util.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/target/iscsi/iscsi_target_util.c 2014-04-27 23:38:36.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/target/iscsi/iscsi_target_util.c 2014-04-28 00:38:59.000000000 +0000 +@@ -734,7 +734,7 @@ + * Fallthrough + */ + case ISCSI_OP_SCSI_TMFUNC: +- rc = transport_generic_free_cmd(&cmd->se_cmd, 1); ++ rc = transport_generic_free_cmd(&cmd->se_cmd, shutdown); + if (!rc && shutdown && se_cmd && se_cmd->se_sess) { + __iscsit_free_cmd(cmd, true, shutdown); + target_put_sess_cmd(se_cmd->se_sess, se_cmd); +@@ -750,7 +750,7 @@ + se_cmd = &cmd->se_cmd; + __iscsit_free_cmd(cmd, true, shutdown); + +- rc = transport_generic_free_cmd(&cmd->se_cmd, 1); ++ rc = transport_generic_free_cmd(&cmd->se_cmd, shutdown); + if (!rc && shutdown && se_cmd->se_sess) { + __iscsit_free_cmd(cmd, true, shutdown); + target_put_sess_cmd(se_cmd->se_sess, se_cmd); +Index: linux-3.10-3.10.11/dummy/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1349_a0348152bd365caadc105f11da03fc020bcc6226.txt 2014-04-28 00:38:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.patch --- linux-3.10.11/debian/patches/rpi/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.patch 2014-04-28 00:39:01.000000000 +0000 @@ -0,0 +1,42 @@ +commit acbf720a11a80b0d284f6654bb2acc7404536037 +Author: Eric W. Biederman +Date: Sat Oct 5 13:15:30 2013 -0700 + + net: Update the sysctl permissions handler to test effective uid/gid + + commit 2433c8f094a008895e66f25bd1773cdb01c91d01 upstream. + + Modify the code to use current_euid(), and in_egroup_p, as in done + in fs/proc/proc_sysctl.c:test_perm() + + Reviewed-by: Eric Sandeen + Reported-by: Eric Sandeen + Signed-off-by: "Eric W. Biederman" + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sysctl_net.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sysctl_net.c 2014-04-27 23:38:35.000000000 +0000 ++++ linux-3.10-3.10.11/net/sysctl_net.c 2014-04-28 00:39:00.000000000 +0000 +@@ -47,12 +47,12 @@ + + /* Allow network administrator to have same access as root. */ + if (ns_capable(net->user_ns, CAP_NET_ADMIN) || +- uid_eq(root_uid, current_uid())) { ++ uid_eq(root_uid, current_euid())) { + int mode = (table->mode >> 6) & 7; + return (mode << 6) | (mode << 3) | mode; + } + /* Allow netns root group to have the same access as the root group */ +- if (gid_eq(root_gid, current_gid())) { ++ if (in_egroup_p(root_gid)) { + int mode = (table->mode >> 3) & 7; + return (mode << 3) | mode; + } +Index: linux-3.10-3.10.11/dummy/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1350_acbf720a11a80b0d284f6654bb2acc7404536037.txt 2014-04-28 00:39:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.patch --- linux-3.10.11/debian/patches/rpi/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.patch 2014-04-28 00:39:01.000000000 +0000 @@ -0,0 +1,157 @@ +commit 6dcdd5759f76c88ae86f9a98a232199520b6cc22 +Author: Frederic Weisbecker +Date: Tue Sep 24 00:50:25 2013 +0200 + + irq: Force hardirq exit's softirq processing on its own stack + + commit ded797547548a5b8e7b92383a41e4c0e6b0ecb7f upstream. + + The commit facd8b80c67a3cf64a467c4a2ac5fb31f2e6745b + ("irq: Sanitize invoke_softirq") converted irq exit + calls of do_softirq() to __do_softirq() on all architectures, + assuming it was only used there for its irq disablement + properties. + + But as a side effect, the softirqs processed in the end + of the hardirq are always called on the inline current + stack that is used by irq_exit() instead of the softirq + stack provided by the archs that override do_softirq(). + + The result is mostly safe if the architecture runs irq_exit() + on a separate irq stack because then softirqs are processed + on that same stack that is near empty at this stage (assuming + hardirq aren't nesting). + + Otherwise irq_exit() runs in the task stack and so does the softirq + too. The interrupted call stack can be randomly deep already and + the softirq can dig through it even further. To add insult to the + injury, this softirq can be interrupted by a new hardirq, maximizing + the chances for a stack overrun as reported in powerpc for example: + + do_IRQ: stack overflow: 1920 + CPU: 0 PID: 1602 Comm: qemu-system-ppc Not tainted 3.10.4-300.1.fc19.ppc64p7 #1 + Call Trace: + [c0000000050a8740] .show_stack+0x130/0x200 (unreliable) + [c0000000050a8810] .dump_stack+0x28/0x3c + [c0000000050a8880] .do_IRQ+0x2b8/0x2c0 + [c0000000050a8930] hardware_interrupt_common+0x154/0x180 + --- Exception: 501 at .cp_start_xmit+0x3a4/0x820 [8139cp] + LR = .cp_start_xmit+0x390/0x820 [8139cp] + [c0000000050a8d40] .dev_hard_start_xmit+0x394/0x640 + [c0000000050a8e00] .sch_direct_xmit+0x110/0x260 + [c0000000050a8ea0] .dev_queue_xmit+0x260/0x630 + [c0000000050a8f40] .br_dev_queue_push_xmit+0xc4/0x130 [bridge] + [c0000000050a8fc0] .br_dev_xmit+0x198/0x270 [bridge] + [c0000000050a9070] .dev_hard_start_xmit+0x394/0x640 + [c0000000050a9130] .dev_queue_xmit+0x428/0x630 + [c0000000050a91d0] .ip_finish_output+0x2a4/0x550 + [c0000000050a9290] .ip_local_out+0x50/0x70 + [c0000000050a9310] .ip_queue_xmit+0x148/0x420 + [c0000000050a93b0] .tcp_transmit_skb+0x4e4/0xaf0 + [c0000000050a94a0] .__tcp_ack_snd_check+0x7c/0xf0 + [c0000000050a9520] .tcp_rcv_established+0x1e8/0x930 + [c0000000050a95f0] .tcp_v4_do_rcv+0x21c/0x570 + [c0000000050a96c0] .tcp_v4_rcv+0x734/0x930 + [c0000000050a97a0] .ip_local_deliver_finish+0x184/0x360 + [c0000000050a9840] .ip_rcv_finish+0x148/0x400 + [c0000000050a98d0] .__netif_receive_skb_core+0x4f8/0xb00 + [c0000000050a99d0] .netif_receive_skb+0x44/0x110 + [c0000000050a9a70] .br_handle_frame_finish+0x2bc/0x3f0 [bridge] + [c0000000050a9b20] .br_nf_pre_routing_finish+0x2ac/0x420 [bridge] + [c0000000050a9bd0] .br_nf_pre_routing+0x4dc/0x7d0 [bridge] + [c0000000050a9c70] .nf_iterate+0x114/0x130 + [c0000000050a9d30] .nf_hook_slow+0xb4/0x1e0 + [c0000000050a9e00] .br_handle_frame+0x290/0x330 [bridge] + [c0000000050a9ea0] .__netif_receive_skb_core+0x34c/0xb00 + [c0000000050a9fa0] .netif_receive_skb+0x44/0x110 + [c0000000050aa040] .napi_gro_receive+0xe8/0x120 + [c0000000050aa0c0] .cp_rx_poll+0x31c/0x590 [8139cp] + [c0000000050aa1d0] .net_rx_action+0x1dc/0x310 + [c0000000050aa2b0] .__do_softirq+0x158/0x330 + [c0000000050aa3b0] .irq_exit+0xc8/0x110 + [c0000000050aa430] .do_IRQ+0xdc/0x2c0 + [c0000000050aa4e0] hardware_interrupt_common+0x154/0x180 + --- Exception: 501 at .bad_range+0x1c/0x110 + LR = .get_page_from_freelist+0x908/0xbb0 + [c0000000050aa7d0] .list_del+0x18/0x50 (unreliable) + [c0000000050aa850] .get_page_from_freelist+0x908/0xbb0 + [c0000000050aa9e0] .__alloc_pages_nodemask+0x21c/0xae0 + [c0000000050aaba0] .alloc_pages_vma+0xd0/0x210 + [c0000000050aac60] .handle_pte_fault+0x814/0xb70 + [c0000000050aad50] .__get_user_pages+0x1a4/0x640 + [c0000000050aae60] .get_user_pages_fast+0xec/0x160 + [c0000000050aaf10] .__gfn_to_pfn_memslot+0x3b0/0x430 [kvm] + [c0000000050aafd0] .kvmppc_gfn_to_pfn+0x64/0x130 [kvm] + [c0000000050ab070] .kvmppc_mmu_map_page+0x94/0x530 [kvm] + [c0000000050ab190] .kvmppc_handle_pagefault+0x174/0x610 [kvm] + [c0000000050ab270] .kvmppc_handle_exit_pr+0x464/0x9b0 [kvm] + [c0000000050ab320] kvm_start_lightweight+0x1ec/0x1fc [kvm] + [c0000000050ab4f0] .kvmppc_vcpu_run_pr+0x168/0x3b0 [kvm] + [c0000000050ab9c0] .kvmppc_vcpu_run+0xc8/0xf0 [kvm] + [c0000000050aba50] .kvm_arch_vcpu_ioctl_run+0x5c/0x1a0 [kvm] + [c0000000050abae0] .kvm_vcpu_ioctl+0x478/0x730 [kvm] + [c0000000050abc90] .do_vfs_ioctl+0x4ec/0x7c0 + [c0000000050abd80] .SyS_ioctl+0xd4/0xf0 + [c0000000050abe30] syscall_exit+0x0/0x98 + + Since this is a regression, this patch proposes a minimalistic + and low-risk solution by blindly forcing the hardirq exit processing of + softirqs on the softirq stack. This way we should reduce significantly + the opportunities for task stack overflow dug by softirqs. + + Longer term solutions may involve extending the hardirq stack coverage to + irq_exit(), etc... + + Reported-by: Benjamin Herrenschmidt + Acked-by: Linus Torvalds + Signed-off-by: Frederic Weisbecker + Cc: Benjamin Herrenschmidt + Cc: Paul Mackerras + Cc: Ingo Molnar + Cc: Thomas Gleixner + Cc: Peter Zijlstra + Cc: H. Peter Anvin + Cc: Linus Torvalds + Cc: Paul Mackerras + Cc: James Hogan + Cc: James E.J. Bottomley + Cc: Helge Deller + Cc: Martin Schwidefsky + Cc: Heiko Carstens + Cc: David S. Miller + Cc: Andrew Morton + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/softirq.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/softirq.c 2014-04-27 23:38:35.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/softirq.c 2014-04-28 00:39:01.000000000 +0000 +@@ -330,10 +330,19 @@ + + static inline void invoke_softirq(void) + { +- if (!force_irqthreads) +- __do_softirq(); +- else ++ if (!force_irqthreads) { ++ /* ++ * We can safely execute softirq on the current stack if ++ * it is the irq stack, because it should be near empty ++ * at this stage. But we have no way to know if the arch ++ * calls irq_exit() on the irq stack. So call softirq ++ * in its own stack to prevent from any overrun on top ++ * of a potentially deep task stack. ++ */ ++ do_softirq(); ++ } else { + wakeup_softirqd(); ++ } + } + + static inline void tick_irq_exit(void) +Index: linux-3.10-3.10.11/dummy/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1351_6dcdd5759f76c88ae86f9a98a232199520b6cc22.txt 2014-04-28 00:39:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.patch 2014-04-28 00:39:02.000000000 +0000 @@ -0,0 +1,40 @@ +commit 04283173f26643e0075fbdf95780f548576e30a5 +Author: RafaÅ‚ MiÅ‚ecki +Date: Thu Oct 10 07:56:07 2013 +0200 + + Revert "drm/radeon: add missing hdmi callbacks for rv6xx" + + This reverts commit b2a9484006875ecd7d94582e7bcb72a02682be92. + + Commit 99d79aa2f3b7729e7290e8bda5d0dd8b0240ec62 (backported by + b2a9484006875ecd7d94582e7bcb72a02682be92) was supposed to fix rv6xx_asic + struct. + + In kernel 3.10 we didn't have that struct yet, so the original patch + should never be backported to the 3.10. Accidentally it has applied and + modified different struct (r520_asic) that shouldn't have any HDMI + callbacks at all. + + Signed-off-by: RafaÅ‚ MiÅ‚ecki + Reviewed-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_asic.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-28 00:37:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_asic.c 2014-04-28 00:39:02.000000000 +0000 +@@ -892,8 +892,6 @@ + .wait_for_vblank = &avivo_wait_for_vblank, + .set_backlight_level = &atombios_set_backlight_level, + .get_backlight_level = &atombios_get_backlight_level, +- .hdmi_enable = &r600_hdmi_enable, +- .hdmi_setmode = &r600_hdmi_setmode, + }, + .copy = { + .blit = &r100_copy_blit, +Index: linux-3.10-3.10.11/dummy/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1352_04283173f26643e0075fbdf95780f548576e30a5.txt 2014-04-28 00:39:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.patch --- linux-3.10.11/debian/patches/rpi/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.patch 2014-04-28 00:39:03.000000000 +0000 @@ -0,0 +1,188 @@ +commit 16c72f379e4fdc8b0438f729ecd261428fff4c21 +Author: Michael Grzeschik +Date: Tue Sep 17 15:56:07 2013 +0200 + + dmaengine: imx-dma: fix lockdep issue between irqhandler and tasklet + + commit 5a276fa6bdf82fd442046969603968c83626ce0b upstream. + + The tasklet and irqhandler are using spin_lock while other routines are + using spin_lock_irqsave/restore. This leads to lockdep issues as + described bellow. This patch is changing the code to use + spinlock_irq_save/restore in both code pathes. + + As imxdma_xfer_desc always gets called with spin_lock_irqsave lock held, + this patch also removes the spare call inside the routine to avoid + double locking. + + [ 403.358162] ================================= + [ 403.362549] [ INFO: inconsistent lock state ] + [ 403.366945] 3.10.0-20130823+ #904 Not tainted + [ 403.371331] --------------------------------- + [ 403.375721] inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage. + [ 403.381769] swapper/0 [HC0[0]:SC1[1]:HE1:SE0] takes: + [ 403.386762] (&(&imxdma->lock)->rlock){?.-...}, at: [] imxdma_tasklet+0x20/0x134 + [ 403.395201] {IN-HARDIRQ-W} state was registered at: + [ 403.400108] [] mark_lock+0x2a0/0x6b4 + [ 403.404798] [] __lock_acquire+0x650/0x1a64 + [ 403.410004] [] lock_acquire+0x94/0xa8 + [ 403.414773] [] _raw_spin_lock+0x54/0x8c + [ 403.419720] [] dma_irq_handler+0x78/0x254 + [ 403.424845] [] handle_irq_event_percpu+0x38/0x1b4 + [ 403.430670] [] handle_irq_event+0x44/0x64 + [ 403.435789] [] handle_level_irq+0xd8/0xf0 + [ 403.440903] [] generic_handle_irq+0x28/0x38 + [ 403.446194] [] handle_IRQ+0x68/0x8c + [ 403.450789] [] avic_handle_irq+0x3c/0x48 + [ 403.455811] [] __irq_svc+0x44/0x74 + [ 403.460314] [] cpu_startup_entry+0x88/0xf4 + [ 403.465525] [] rest_init+0xb8/0xe0 + [ 403.470045] [] start_kernel+0x28c/0x2d4 + [ 403.474986] [] 0xa0008040 + [ 403.478709] irq event stamp: 50854 + [ 403.482140] hardirqs last enabled at (50854): [] tasklet_action+0x38/0xdc + [ 403.489954] hardirqs last disabled at (50853): [] tasklet_action+0x20/0xdc + [ 403.497761] softirqs last enabled at (50850): [] _local_bh_enable+0x14/0x18 + [ 403.505741] softirqs last disabled at (50851): [] irq_exit+0x88/0xdc + [ 403.513026] + [ 403.513026] other info that might help us debug this: + [ 403.519593] Possible unsafe locking scenario: + [ 403.519593] + [ 403.525548] CPU0 + [ 403.528020] ---- + [ 403.530491] lock(&(&imxdma->lock)->rlock); + [ 403.534828] + [ 403.537474] lock(&(&imxdma->lock)->rlock); + [ 403.541983] + [ 403.541983] *** DEADLOCK *** + [ 403.541983] + [ 403.547951] no locks held by swapper/0. + [ 403.551813] + [ 403.551813] stack backtrace: + [ 403.556222] CPU: 0 PID: 0 Comm: swapper Not tainted 3.10.0-20130823+ #904 + [ 403.563039] Backtrace: + [ 403.565581] [] (dump_backtrace+0x0/0x10c) from [] (show_stack+0x18/0x1c) + [ 403.574054] r6:00000000 r5:c05c51d8 r4:c040bd58 r3:00200000 + [ 403.579872] [] (show_stack+0x0/0x1c) from [] (dump_stack+0x20/0x28) + [ 403.587955] [] (dump_stack+0x0/0x28) from [] (print_usage_bug.part.28+0x224/0x28c) + [ 403.597340] [] (print_usage_bug.part.28+0x0/0x28c) from [] (mark_lock+0x440/0x6b4) + [ 403.606682] r8:c004a41c r7:00000000 r6:c040bd58 r5:c040c040 r4:00000002 + [ 403.613566] [] (mark_lock+0x0/0x6b4) from [] (__lock_acquire+0x6cc/0x1a64) + [ 403.622244] [] (__lock_acquire+0x0/0x1a64) from [] (lock_acquire+0x94/0xa8) + [ 403.631010] [] (lock_acquire+0x0/0xa8) from [] (_raw_spin_lock+0x54/0x8c) + [ 403.639614] [] (_raw_spin_lock+0x0/0x8c) from [] (imxdma_tasklet+0x20/0x134) + [ 403.648434] r6:c3847010 r5:c040e890 r4:c38470d4 + [ 403.653194] [] (imxdma_tasklet+0x0/0x134) from [] (tasklet_action+0x8c/0xdc) + [ 403.662013] r8:c0599160 r7:00000000 r6:00000000 r5:c040e890 r4:c3847114 r3:c019d75c + [ 403.670042] [] (tasklet_action+0x0/0xdc) from [] (__do_softirq+0xe4/0x1f0) + [ 403.678687] r7:00000101 r6:c0402000 r5:c059919c r4:00000001 + [ 403.684498] [] (__do_softirq+0x0/0x1f0) from [] (irq_exit+0x88/0xdc) + [ 403.692652] [] (irq_exit+0x0/0xdc) from [] (handle_IRQ+0x6c/0x8c) + [ 403.700514] r4:00000030 r3:00000110 + [ 403.704192] [] (handle_IRQ+0x0/0x8c) from [] (avic_handle_irq+0x3c/0x48) + [ 403.712664] r5:c0403f28 r4:c0593ebc + [ 403.716343] [] (avic_handle_irq+0x0/0x48) from [] (__irq_svc+0x44/0x74) + [ 403.724733] Exception stack(0xc0403f28 to 0xc0403f70) + [ 403.729841] 3f20: 00000001 00000004 00000000 20000013 c0402000 c04104a8 + [ 403.738078] 3f40: 00000002 c0b69620 a0004000 41069264 a03fb5f4 c0403f7c c0403f40 c0403f70 + [ 403.746301] 3f60: c004b92c c0009e74 20000013 ffffffff + [ 403.751383] r6:ffffffff r5:20000013 r4:c0009e74 r3:c004b92c + [ 403.757210] [] (arch_cpu_idle+0x0/0x4c) from [] (cpu_startup_entry+0x88/0xf4) + [ 403.766161] [] (cpu_startup_entry+0x0/0xf4) from [] (rest_init+0xb8/0xe0) + [ 403.774753] [] (rest_init+0x0/0xe0) from [] (start_kernel+0x28c/0x2d4) + [ 403.783051] r6:c03fc484 r5:ffffffff r4:c040a0e0 + [ 403.787797] [] (start_kernel+0x0/0x2d4) from [] (0xa0008040) + + Signed-off-by: Michael Grzeschik + Signed-off-by: Vinod Koul + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/dma/imx-dma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/dma/imx-dma.c 2014-04-27 23:38:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/dma/imx-dma.c 2014-04-28 00:39:02.000000000 +0000 +@@ -414,17 +414,18 @@ + struct imxdma_engine *imxdma = imxdmac->imxdma; + int chno = imxdmac->channel; + struct imxdma_desc *desc; ++ unsigned long flags; + +- spin_lock(&imxdma->lock); ++ spin_lock_irqsave(&imxdma->lock, flags); + if (list_empty(&imxdmac->ld_active)) { +- spin_unlock(&imxdma->lock); ++ spin_unlock_irqrestore(&imxdma->lock, flags); + goto out; + } + + desc = list_first_entry(&imxdmac->ld_active, + struct imxdma_desc, + node); +- spin_unlock(&imxdma->lock); ++ spin_unlock_irqrestore(&imxdma->lock, flags); + + if (desc->sg) { + u32 tmp; +@@ -496,7 +497,6 @@ + { + struct imxdma_channel *imxdmac = to_imxdma_chan(d->desc.chan); + struct imxdma_engine *imxdma = imxdmac->imxdma; +- unsigned long flags; + int slot = -1; + int i; + +@@ -504,7 +504,6 @@ + switch (d->type) { + case IMXDMA_DESC_INTERLEAVED: + /* Try to get a free 2D slot */ +- spin_lock_irqsave(&imxdma->lock, flags); + for (i = 0; i < IMX_DMA_2D_SLOTS; i++) { + if ((imxdma->slots_2d[i].count > 0) && + ((imxdma->slots_2d[i].xsr != d->x) || +@@ -514,10 +513,8 @@ + slot = i; + break; + } +- if (slot < 0) { +- spin_unlock_irqrestore(&imxdma->lock, flags); ++ if (slot < 0) + return -EBUSY; +- } + + imxdma->slots_2d[slot].xsr = d->x; + imxdma->slots_2d[slot].ysr = d->y; +@@ -526,7 +523,6 @@ + + imxdmac->slot_2d = slot; + imxdmac->enabled_2d = true; +- spin_unlock_irqrestore(&imxdma->lock, flags); + + if (slot == IMX_DMA_2D_SLOT_A) { + d->config_mem &= ~CCR_MSEL_B; +@@ -602,8 +598,9 @@ + struct imxdma_channel *imxdmac = (void *)data; + struct imxdma_engine *imxdma = imxdmac->imxdma; + struct imxdma_desc *desc; ++ unsigned long flags; + +- spin_lock(&imxdma->lock); ++ spin_lock_irqsave(&imxdma->lock, flags); + + if (list_empty(&imxdmac->ld_active)) { + /* Someone might have called terminate all */ +@@ -640,7 +637,7 @@ + __func__, imxdmac->channel); + } + out: +- spin_unlock(&imxdma->lock); ++ spin_unlock_irqrestore(&imxdma->lock, flags); + } + + static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, +Index: linux-3.10-3.10.11/dummy/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1353_16c72f379e4fdc8b0438f729ecd261428fff4c21.txt 2014-04-28 00:39:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.patch --- linux-3.10.11/debian/patches/rpi/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.patch 2014-04-28 00:39:04.000000000 +0000 @@ -0,0 +1,55 @@ +commit 8dac1d15489d284a4ffadaef25650272c4b44bfe +Author: Michael Grzeschik +Date: Tue Sep 17 15:56:08 2013 +0200 + + dmaengine: imx-dma: fix callback path in tasklet + + commit fcaaba6c7136fe47e5a13352f99a64b019b6d2c5 upstream. + + We need to free the ld_active list head before jumping into the callback + routine. Otherwise the callback could run into issue_pending and change + our ld_active list head we just going to free. This will run the channel + list into an currupted and undefined state. + + Signed-off-by: Michael Grzeschik + Signed-off-by: Vinod Koul + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/dma/imx-dma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/dma/imx-dma.c 2014-04-28 00:39:02.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/dma/imx-dma.c 2014-04-28 00:39:03.000000000 +0000 +@@ -604,13 +604,11 @@ + + if (list_empty(&imxdmac->ld_active)) { + /* Someone might have called terminate all */ +- goto out; ++ spin_unlock_irqrestore(&imxdma->lock, flags); ++ return; + } + desc = list_first_entry(&imxdmac->ld_active, struct imxdma_desc, node); + +- if (desc->desc.callback) +- desc->desc.callback(desc->desc.callback_param); +- + /* If we are dealing with a cyclic descriptor, keep it on ld_active + * and dont mark the descriptor as complete. + * Only in non-cyclic cases it would be marked as complete +@@ -638,6 +636,10 @@ + } + out: + spin_unlock_irqrestore(&imxdma->lock, flags); ++ ++ if (desc->desc.callback) ++ desc->desc.callback(desc->desc.callback_param); ++ + } + + static int imxdma_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, +Index: linux-3.10-3.10.11/dummy/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1354_8dac1d15489d284a4ffadaef25650272c4b44bfe.txt 2014-04-28 00:39:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.patch --- linux-3.10.11/debian/patches/rpi/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.patch 2014-04-28 00:39:05.000000000 +0000 @@ -0,0 +1,73 @@ +commit 414224fc002fc88c1f79934c12756f40510ff710 +Author: Michael Grzeschik +Date: Tue Sep 17 15:56:06 2013 +0200 + + dmaengine: imx-dma: fix slow path issue in prep_dma_cyclic + + commit edc530fe7ee5a562680615d2e7cd205879c751a7 upstream. + + When perparing cyclic_dma buffers by the sound layer, it will dump the + following lockdep trace. The leading snd_pcm_action_single get called + with read_lock_irq called. To fix this, we change the kcalloc call from + GFP_KERNEL to GFP_ATOMIC. + + WARNING: at kernel/lockdep.c:2740 lockdep_trace_alloc+0xcc/0x114() + DEBUG_LOCKS_WARN_ON(irqs_disabled_flags(flags)) + Modules linked in: + CPU: 0 PID: 832 Comm: aplay Not tainted 3.11.0-20130823+ #903 + Backtrace: + [] (dump_backtrace+0x0/0x10c) from [] (show_stack+0x18/0x1c) + r6:c004c090 r5:00000009 r4:c2e0bd18 r3:00404000 + [] (show_stack+0x0/0x1c) from [] (dump_stack+0x20/0x28) + [] (dump_stack+0x0/0x28) from [] (warn_slowpath_common+0x54/0x70) + [] (warn_slowpath_common+0x0/0x70) from [] (warn_slowpath_fmt+0x38/0x40) + r8:00004000 r7:a3b90000 r6:000080d0 r5:60000093 r4:c2e0a000 r3:00000009 + [] (warn_slowpath_fmt+0x0/0x40) from [] (lockdep_trace_alloc+0xcc/0x114) + r3:c03955d8 r2:c03907db + [] (lockdep_trace_alloc+0x0/0x114) from [] (__kmalloc+0x34/0x118) + r6:000080d0 r5:c3800120 r4:000080d0 r3:c040a0f8 + [] (__kmalloc+0x0/0x118) from [] (imxdma_prep_dma_cyclic+0x64/0x168) + r7:a3b90000 r6:00000004 r5:c39d8420 r4:c3847150 + [] (imxdma_prep_dma_cyclic+0x0/0x168) from [] (snd_dmaengine_pcm_trigger+0xa8/0x160) + [] (snd_dmaengine_pcm_trigger+0x0/0x160) from [] (soc_pcm_trigger+0x90/0xb4) + r8:c058c7b0 r7:c3b8140c r6:c39da560 r5:00000001 r4:c3b81000 + [] (soc_pcm_trigger+0x0/0xb4) from [] (snd_pcm_do_start+0x2c/0x38) + r7:00000000 r6:00000003 r5:c058c7b0 r4:c3b81000 + [] (snd_pcm_do_start+0x0/0x38) from [] (snd_pcm_action_single+0x40/0x6c) + [] (snd_pcm_action_single+0x0/0x6c) from [] (snd_pcm_action_lock_irq+0x7c/0x9c) + r7:00000003 r6:c3b810f0 r5:c3b810f0 r4:c3b81000 + [] (snd_pcm_action_lock_irq+0x0/0x9c) from [] (snd_pcm_common_ioctl1+0x7f8/0xfd0) + r8:c3b7f888 r7:005407b8 r6:c2c991c0 r5:c3b81000 r4:c3b81000 r3:00004142 + [] (snd_pcm_common_ioctl1+0x0/0xfd0) from [] (snd_pcm_playback_ioctl1+0x464/0x488) + [] (snd_pcm_playback_ioctl1+0x0/0x488) from [] (snd_pcm_playback_ioctl+0x34/0x40) + r8:c3b7f888 r7:00004142 r6:00000004 r5:c2c991c0 r4:005407b8 + [] (snd_pcm_playback_ioctl+0x0/0x40) from [] (vfs_ioctl+0x30/0x44) + [] (vfs_ioctl+0x0/0x44) from [] (do_vfs_ioctl+0x55c/0x5c0) + [] (do_vfs_ioctl+0x0/0x5c0) from [] (SyS_ioctl+0x40/0x68) + [] (SyS_ioctl+0x0/0x68) from [] (ret_fast_syscall+0x0/0x44) + r8:c0009544 r7:00000036 r6:bedeaa58 r5:00000000 r4:000000c0 + + Signed-off-by: Michael Grzeschik + Signed-off-by: Vinod Koul + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/dma/imx-dma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/dma/imx-dma.c 2014-04-28 00:39:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/dma/imx-dma.c 2014-04-28 00:39:04.000000000 +0000 +@@ -861,7 +861,7 @@ + kfree(imxdmac->sg_list); + + imxdmac->sg_list = kcalloc(periods + 1, +- sizeof(struct scatterlist), GFP_KERNEL); ++ sizeof(struct scatterlist), GFP_ATOMIC); + if (!imxdmac->sg_list) + return NULL; + +Index: linux-3.10-3.10.11/dummy/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1355_414224fc002fc88c1f79934c12756f40510ff710.txt 2014-04-28 00:39:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.patch 2014-04-28 00:39:05.000000000 +0000 @@ -0,0 +1,184 @@ +commit 2af8997a301609e2664c3c619865c6e1e518257d +Author: Lv Zheng +Date: Fri Sep 13 13:13:23 2013 +0800 + + ACPI / IPMI: Fix atomic context requirement of ipmi_msg_handler() + + commit 06a8566bcf5cf7db9843a82cde7a33c7bf3947d9 upstream. + + This patch fixes the issues indicated by the test results that + ipmi_msg_handler() is invoked in atomic context. + + BUG: scheduling while atomic: kipmi0/18933/0x10000100 + Modules linked in: ipmi_si acpi_ipmi ... + CPU: 3 PID: 18933 Comm: kipmi0 Tainted: G AW 3.10.0-rc7+ #2 + Hardware name: QCI QSSC-S4R/QSSC-S4R, BIOS QSSC-S4R.QCI.01.00.0027.070120100606 07/01/2010 + ffff8838245eea00 ffff88103fc63c98 ffffffff814c4a1e ffff88103fc63ca8 + ffffffff814bfbab ffff88103fc63d28 ffffffff814c73e0 ffff88103933cbd4 + 0000000000000096 ffff88103fc63ce8 ffff88102f618000 ffff881035c01fd8 + Call Trace: + [] dump_stack+0x19/0x1b + [] __schedule_bug+0x46/0x54 + [] __schedule+0x83/0x59c + [] __cond_resched+0x22/0x2d + [] _cond_resched+0x14/0x1d + [] mutex_lock+0x11/0x32 + [] ? __default_send_IPI_dest_field.constprop.0+0x53/0x58 + [] ipmi_msg_handler+0x23/0x166 [ipmi_si] + [] deliver_response+0x55/0x5a + [] handle_new_recv_msgs+0xb67/0xc65 + [] ? read_tsc+0x9/0x19 + [] ? _raw_spin_lock_irq+0xa/0xc + [] ipmi_thread+0x5c/0x146 [ipmi_si] + ... + + Also Tony Camuso says: + + We were getting occasional "Scheduling while atomic" call traces + during boot on some systems. Problem was first seen on a Cisco C210 + but we were able to reproduce it on a Cisco c220m3. Setting + CONFIG_LOCKDEP and LOCKDEP_SUPPORT to 'y' exposed a lockdep around + tx_msg_lock in acpi_ipmi.c struct acpi_ipmi_device. + + ================================= + [ INFO: inconsistent lock state ] + 2.6.32-415.el6.x86_64-debug-splck #1 + --------------------------------- + inconsistent {SOFTIRQ-ON-W} -> {IN-SOFTIRQ-W} usage. + ksoftirqd/3/17 [HC0[0]:SC1[1]:HE1:SE0] takes: + (&ipmi_device->tx_msg_lock){+.?...}, at: [] ipmi_msg_handler+0x71/0x126 + {SOFTIRQ-ON-W} state was registered at: + [] __lock_acquire+0x63c/0x1570 + [] lock_acquire+0xa4/0x120 + [] __mutex_lock_common+0x4c/0x400 + [] mutex_lock_nested+0x4a/0x60 + [] acpi_ipmi_space_handler+0x11b/0x234 + [] acpi_ev_address_space_dispatch+0x170/0x1be + + The fix implemented by this change has been tested by Tony: + + Tested the patch in a boot loop with lockdep debug enabled and never + saw the problem in over 400 reboots. + + Reported-and-tested-by: Tony Camuso + Signed-off-by: Lv Zheng + Reviewed-by: Huang Ying + Signed-off-by: Rafael J. Wysocki + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/acpi/acpi_ipmi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/acpi/acpi_ipmi.c 2014-04-27 23:38:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/acpi/acpi_ipmi.c 2014-04-28 00:39:05.000000000 +0000 +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + + MODULE_AUTHOR("Zhao Yakui"); + MODULE_DESCRIPTION("ACPI IPMI Opregion driver"); +@@ -57,7 +58,7 @@ + struct list_head head; + /* the IPMI request message list */ + struct list_head tx_msg_list; +- struct mutex tx_msg_lock; ++ spinlock_t tx_msg_lock; + acpi_handle handle; + struct pnp_dev *pnp_dev; + ipmi_user_t user_interface; +@@ -147,6 +148,7 @@ + struct kernel_ipmi_msg *msg; + struct acpi_ipmi_buffer *buffer; + struct acpi_ipmi_device *device; ++ unsigned long flags; + + msg = &tx_msg->tx_message; + /* +@@ -177,10 +179,10 @@ + + /* Get the msgid */ + device = tx_msg->device; +- mutex_lock(&device->tx_msg_lock); ++ spin_lock_irqsave(&device->tx_msg_lock, flags); + device->curr_msgid++; + tx_msg->tx_msgid = device->curr_msgid; +- mutex_unlock(&device->tx_msg_lock); ++ spin_unlock_irqrestore(&device->tx_msg_lock, flags); + } + + static void acpi_format_ipmi_response(struct acpi_ipmi_msg *msg, +@@ -242,6 +244,7 @@ + int msg_found = 0; + struct acpi_ipmi_msg *tx_msg; + struct pnp_dev *pnp_dev = ipmi_device->pnp_dev; ++ unsigned long flags; + + if (msg->user != ipmi_device->user_interface) { + dev_warn(&pnp_dev->dev, "Unexpected response is returned. " +@@ -250,7 +253,7 @@ + ipmi_free_recv_msg(msg); + return; + } +- mutex_lock(&ipmi_device->tx_msg_lock); ++ spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); + list_for_each_entry(tx_msg, &ipmi_device->tx_msg_list, head) { + if (msg->msgid == tx_msg->tx_msgid) { + msg_found = 1; +@@ -258,7 +261,7 @@ + } + } + +- mutex_unlock(&ipmi_device->tx_msg_lock); ++ spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); + if (!msg_found) { + dev_warn(&pnp_dev->dev, "Unexpected response (msg id %ld) is " + "returned.\n", msg->msgid); +@@ -378,6 +381,7 @@ + struct acpi_ipmi_device *ipmi_device = handler_context; + int err, rem_time; + acpi_status status; ++ unsigned long flags; + /* + * IPMI opregion message. + * IPMI message is firstly written to the BMC and system software +@@ -395,9 +399,9 @@ + return AE_NO_MEMORY; + + acpi_format_ipmi_msg(tx_msg, address, value); +- mutex_lock(&ipmi_device->tx_msg_lock); ++ spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); + list_add_tail(&tx_msg->head, &ipmi_device->tx_msg_list); +- mutex_unlock(&ipmi_device->tx_msg_lock); ++ spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); + err = ipmi_request_settime(ipmi_device->user_interface, + &tx_msg->addr, + tx_msg->tx_msgid, +@@ -413,9 +417,9 @@ + status = AE_OK; + + end_label: +- mutex_lock(&ipmi_device->tx_msg_lock); ++ spin_lock_irqsave(&ipmi_device->tx_msg_lock, flags); + list_del(&tx_msg->head); +- mutex_unlock(&ipmi_device->tx_msg_lock); ++ spin_unlock_irqrestore(&ipmi_device->tx_msg_lock, flags); + kfree(tx_msg); + return status; + } +@@ -457,7 +461,7 @@ + + INIT_LIST_HEAD(&ipmi_device->head); + +- mutex_init(&ipmi_device->tx_msg_lock); ++ spin_lock_init(&ipmi_device->tx_msg_lock); + INIT_LIST_HEAD(&ipmi_device->tx_msg_list); + ipmi_install_space_handler(ipmi_device); + +Index: linux-3.10-3.10.11/dummy/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1356_2af8997a301609e2664c3c619865c6e1e518257d.txt 2014-04-28 00:39:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.patch 2014-04-28 00:39:06.000000000 +0000 @@ -0,0 +1,65 @@ +commit 1fe36ec4914c34f63ea93c87ce6997606098628d +Author: Mark Tinguely +Date: Mon Sep 23 12:18:58 2013 -0500 + + xfs: fix node forward in xfs_node_toosmall + + commit 997def25e4b9cee3b01609e18a52f926bca8bd2b upstream. + + Commit f5ea1100 cleans up the disk to host conversions for + node directory entries, but because a variable is reused in + xfs_node_toosmall() the next node is not correctly found. + If the original node is small enough (<= 3/8 of the node size), + this change may incorrectly cause a node collapse when it should + not. That will cause an assert in xfstest generic/319: + + Assertion failed: first <= last && last < BBTOB(bp->b_length), + file: /root/newest/xfs/fs/xfs/xfs_trans_buf.c, line: 569 + + Keep the original node header to get the correct forward node. + + (When a node is considered for a merge with a sibling, it overwrites the + sibling pointers of the original incore nodehdr with the sibling's + pointers. This leads to loop considering the original node as a merge + candidate with itself in the second pass, and so it incorrectly + determines a merge should occur.) + + [v3: added Dave Chinner's (slightly modified) suggestion to the commit header, + cleaned up whitespace. -bpm] + + Signed-off-by: Mark Tinguely + Reviewed-by: Ben Myers + Signed-off-by: Ben Myers + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/xfs/xfs_da_btree.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/xfs/xfs_da_btree.c 2014-04-27 23:38:33.000000000 +0000 ++++ linux-3.10-3.10.11/fs/xfs/xfs_da_btree.c 2014-04-28 00:39:06.000000000 +0000 +@@ -1223,6 +1223,7 @@ + /* start with smaller blk num */ + forward = nodehdr.forw < nodehdr.back; + for (i = 0; i < 2; forward = !forward, i++) { ++ struct xfs_da3_icnode_hdr thdr; + if (forward) + blkno = nodehdr.forw; + else +@@ -1235,10 +1236,10 @@ + return(error); + + node = bp->b_addr; +- xfs_da3_node_hdr_from_disk(&nodehdr, node); ++ xfs_da3_node_hdr_from_disk(&thdr, node); + xfs_trans_brelse(state->args->trans, bp); + +- if (count - nodehdr.count >= 0) ++ if (count - thdr.count >= 0) + break; /* fits with at least 25% to spare */ + } + if (i >= 2) { +Index: linux-3.10-3.10.11/dummy/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1357_1fe36ec4914c34f63ea93c87ce6997606098628d.txt 2014-04-28 00:39:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.patch --- linux-3.10.11/debian/patches/rpi/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.patch 2014-04-28 00:39:07.000000000 +0000 @@ -0,0 +1,54 @@ +commit f60945fd5684f5773efd2d87d383f528056d6285 +Author: Ben Skeggs +Date: Tue Sep 10 12:11:01 2013 +1000 + + drm/nouveau/bios/init: stub opcode 0xaa + + commit 5495e39fb3695182b9f2a72fe4169056cada37a1 upstream. + + Signed-off-by: Ben Skeggs + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/subdev/bios/init.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/nouveau/core/subdev/bios/init.c 2014-04-27 23:38:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/nouveau/core/subdev/bios/init.c 2014-04-28 00:39:07.000000000 +0000 +@@ -580,8 +580,22 @@ + init_reserved(struct nvbios_init *init) + { + u8 opcode = nv_ro08(init->bios, init->offset); +- trace("RESERVED\t0x%02x\n", opcode); +- init->offset += 1; ++ u8 length, i; ++ ++ switch (opcode) { ++ case 0xaa: ++ length = 4; ++ break; ++ default: ++ length = 1; ++ break; ++ } ++ ++ trace("RESERVED 0x%02x\t", opcode); ++ for (i = 1; i < length; i++) ++ cont(" 0x%02x", nv_ro08(init->bios, init->offset + i)); ++ cont("\n"); ++ init->offset += length; + } + + /** +@@ -2136,6 +2150,7 @@ + [0x99] = { init_zm_auxch }, + [0x9a] = { init_i2c_long_if }, + [0xa9] = { init_gpio_ne }, ++ [0xaa] = { init_reserved }, + }; + + #define init_opcode_nr (sizeof(init_opcode) / sizeof(init_opcode[0])) +Index: linux-3.10-3.10.11/dummy/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1358_f60945fd5684f5773efd2d87d383f528056d6285.txt 2014-04-28 00:39:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.patch --- linux-3.10.11/debian/patches/rpi/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.patch 2014-04-28 00:39:08.000000000 +0000 @@ -0,0 +1,60 @@ +commit 22c748d6172867030c228d4737fdef0e9713a125 +Author: Takashi Iwai +Date: Mon Sep 30 12:13:44 2013 +0200 + + ALSA: hda - Fix GPIO for Acer Aspire 3830TG + + commit 4a4370442c996be0fd08234a167c8a127c2488bb upstream. + + Acer Aspire 3830TG seems requiring GPIO bit 0 as the primary mute + control. When a machine is booted after Windows 8, the GPIO pin is + turned off and it results in the silent output. + + This patch adds the manual fixup of GPIO bit 0 for this model. + + Reported-by: Christopher + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_conexant.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_conexant.c 2014-04-27 23:38:32.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_conexant.c 2014-04-28 00:39:07.000000000 +0000 +@@ -3225,6 +3225,7 @@ + CXT_PINCFG_LEMOTE_A1205, + CXT_FIXUP_STEREO_DMIC, + CXT_FIXUP_INC_MIC_BOOST, ++ CXT_FIXUP_GPIO1, + }; + + static void cxt_fixup_stereo_dmic(struct hda_codec *codec, +@@ -3303,6 +3304,15 @@ + .type = HDA_FIXUP_FUNC, + .v.func = cxt5066_increase_mic_boost, + }, ++ [CXT_FIXUP_GPIO1] = { ++ .type = HDA_FIXUP_VERBS, ++ .v.verbs = (const struct hda_verb[]) { ++ { 0x01, AC_VERB_SET_GPIO_MASK, 0x01 }, ++ { 0x01, AC_VERB_SET_GPIO_DIRECTION, 0x01 }, ++ { 0x01, AC_VERB_SET_GPIO_DATA, 0x01 }, ++ { } ++ }, ++ }, + }; + + static const struct snd_pci_quirk cxt5051_fixups[] = { +@@ -3312,6 +3322,7 @@ + + static const struct snd_pci_quirk cxt5066_fixups[] = { + SND_PCI_QUIRK(0x1025, 0x0543, "Acer Aspire One 522", CXT_FIXUP_STEREO_DMIC), ++ SND_PCI_QUIRK(0x1025, 0x054c, "Acer Aspire 3830TG", CXT_FIXUP_GPIO1), + SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo T400", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x215e, "Lenovo T410", CXT_PINCFG_LENOVO_TP410), + SND_PCI_QUIRK(0x17aa, 0x215f, "Lenovo T510", CXT_PINCFG_LENOVO_TP410), +Index: linux-3.10-3.10.11/dummy/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1359_22c748d6172867030c228d4737fdef0e9713a125.txt 2014-04-28 00:39:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.patch 2014-04-28 00:39:09.000000000 +0000 @@ -0,0 +1,74 @@ +commit bc30c3576d85f7d02f5620cbe8d03f4064c6a73a +Author: Chris Metcalf +Date: Thu Sep 26 13:24:53 2013 -0400 + + tile: use a more conservative __my_cpu_offset in CONFIG_PREEMPT + + commit f862eefec0b68e099a9fa58d3761ffb10bad97e1 upstream. + + It turns out the kernel relies on barrier() to force a reload of the + percpu offset value. Since we can't easily modify the definition of + barrier() to include "tp" as an output register, we instead provide a + definition of __my_cpu_offset as extended assembly that includes a fake + stack read to hazard against barrier(), forcing gcc to know that it + must reread "tp" and recompute anything based on "tp" after a barrier. + + This fixes observed hangs in the slub allocator when we are looping + on a percpu cmpxchg_double. + + A similar fix for ARMv7 was made in June in change 509eb76ebf97. + + Signed-off-by: Chris Metcalf + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/tile/include/asm/percpu.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/tile/include/asm/percpu.h 2014-04-27 23:38:32.000000000 +0000 ++++ linux-3.10-3.10.11/arch/tile/include/asm/percpu.h 2014-04-28 00:39:08.000000000 +0000 +@@ -15,9 +15,37 @@ + #ifndef _ASM_TILE_PERCPU_H + #define _ASM_TILE_PERCPU_H + +-register unsigned long __my_cpu_offset __asm__("tp"); +-#define __my_cpu_offset __my_cpu_offset +-#define set_my_cpu_offset(tp) (__my_cpu_offset = (tp)) ++register unsigned long my_cpu_offset_reg asm("tp"); ++ ++#ifdef CONFIG_PREEMPT ++/* ++ * For full preemption, we can't just use the register variable ++ * directly, since we need barrier() to hazard against it, causing the ++ * compiler to reload anything computed from a previous "tp" value. ++ * But we also don't want to use volatile asm, since we'd like the ++ * compiler to be able to cache the value across multiple percpu reads. ++ * So we use a fake stack read as a hazard against barrier(). ++ * The 'U' constraint is like 'm' but disallows postincrement. ++ */ ++static inline unsigned long __my_cpu_offset(void) ++{ ++ unsigned long tp; ++ register unsigned long *sp asm("sp"); ++ asm("move %0, tp" : "=r" (tp) : "U" (*sp)); ++ return tp; ++} ++#define __my_cpu_offset __my_cpu_offset() ++#else ++/* ++ * We don't need to hazard against barrier() since "tp" doesn't ever ++ * change with PREEMPT_NONE, and with PREEMPT_VOLUNTARY it only ++ * changes at function call points, at which we are already re-reading ++ * the value of "tp" due to "my_cpu_offset_reg" being a global variable. ++ */ ++#define __my_cpu_offset my_cpu_offset_reg ++#endif ++ ++#define set_my_cpu_offset(tp) (my_cpu_offset_reg = (tp)) + + #include + +Index: linux-3.10-3.10.11/dummy/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1360_bc30c3576d85f7d02f5620cbe8d03f4064c6a73a.txt 2014-04-28 00:39:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.patch 2014-04-28 00:39:10.000000000 +0000 @@ -0,0 +1,47 @@ +commit 98e00cd81b76f8b50b881bf3ac532fa1ab42931c +Author: Martin Schwidefsky +Date: Fri Sep 27 15:24:38 2013 +0200 + + s390: fix system call restart after inferior call + + commit dbbfe487e5f3fc00c9fe5207d63309859704d12f upstream. + + Git commit 616498813b11ffef "s390: system call path micro optimization" + introduced a regression in regard to system call restarting and inferior + function calls via the ptrace interface. The pointer to the system call + table needs to be loaded in sysc_sigpending if do_signal returns with + TIF_SYSCALl set after it restored a system call context. + + Signed-off-by: Martin Schwidefsky + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/s390/kernel/entry.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/s390/kernel/entry.S 2014-04-27 23:38:32.000000000 +0000 ++++ linux-3.10-3.10.11/arch/s390/kernel/entry.S 2014-04-28 00:39:09.000000000 +0000 +@@ -265,6 +265,7 @@ + tm __TI_flags+3(%r12),_TIF_SYSCALL + jno sysc_return + lm %r2,%r7,__PT_R2(%r11) # load svc arguments ++ l %r10,__TI_sysc_table(%r12) # 31 bit system call table + xr %r8,%r8 # svc 0 returns -ENOSYS + clc __PT_INT_CODE+2(2,%r11),BASED(.Lnr_syscalls+2) + jnl sysc_nr_ok # invalid svc number -> do svc 0 +Index: linux-3.10-3.10.11/arch/s390/kernel/entry64.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/s390/kernel/entry64.S 2014-04-27 23:38:32.000000000 +0000 ++++ linux-3.10-3.10.11/arch/s390/kernel/entry64.S 2014-04-28 00:39:09.000000000 +0000 +@@ -293,6 +293,7 @@ + tm __TI_flags+7(%r12),_TIF_SYSCALL + jno sysc_return + lmg %r2,%r7,__PT_R2(%r11) # load svc arguments ++ lg %r10,__TI_sysc_table(%r12) # address of system call table + lghi %r8,0 # svc 0 returns -ENOSYS + llgh %r1,__PT_INT_CODE+2(%r11) # load new svc number + cghi %r1,NR_syscalls +Index: linux-3.10-3.10.11/dummy/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1361_98e00cd81b76f8b50b881bf3ac532fa1ab42931c.txt 2014-04-28 00:39:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.patch --- linux-3.10.11/debian/patches/rpi/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.patch 2014-04-28 00:39:11.000000000 +0000 @@ -0,0 +1,71 @@ +commit 34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba +Author: Josef Bacik +Date: Tue Jul 30 16:30:30 2013 -0400 + + Btrfs: change how we queue blocks for backref checking + + commit b6c60c8018c4e9beb2f83fc82c09f9d033766571 upstream. + + Previously we only added blocks to the list to have their backrefs checked if + the level of the block is right above the one we are searching for. This is + because we want to make sure we don't add the entire path up to the root to the + lists to make sure we process things one at a time. This assumes that if any + blocks in the path to the root are going to be not checked (shared in other + words) then they will be in the level right above the current block on up. This + isn't quite right though since we can have blocks higher up the list that are + shared because they are attached to a reloc root. But we won't add this block + to be checked and then later on we will BUG_ON(!upper->checked). So instead + keep track of wether or not we've queued a block to be checked in this current + search, and if we haven't go ahead and queue it to be checked. This patch fixed + the panic I was seeing where we BUG_ON(!upper->checked). Thanks, + + Signed-off-by: Josef Bacik + Signed-off-by: Chris Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/btrfs/relocation.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/btrfs/relocation.c 2014-04-27 23:38:31.000000000 +0000 ++++ linux-3.10-3.10.11/fs/btrfs/relocation.c 2014-04-28 00:39:10.000000000 +0000 +@@ -691,6 +691,7 @@ + int cowonly; + int ret; + int err = 0; ++ bool need_check = true; + + path1 = btrfs_alloc_path(); + path2 = btrfs_alloc_path(); +@@ -914,6 +915,7 @@ + cur->bytenr); + + lower = cur; ++ need_check = true; + for (; level < BTRFS_MAX_LEVEL; level++) { + if (!path2->nodes[level]) { + BUG_ON(btrfs_root_bytenr(&root->root_item) != +@@ -957,14 +959,12 @@ + + /* + * add the block to pending list if we +- * need check its backrefs. only block +- * at 'cur->level + 1' is added to the +- * tail of pending list. this guarantees +- * we check backrefs from lower level +- * blocks to upper level blocks. ++ * need check its backrefs, we only do this once ++ * while walking up a tree as we will catch ++ * anything else later on. + */ +- if (!upper->checked && +- level == cur->level + 1) { ++ if (!upper->checked && need_check) { ++ need_check = false; + list_add_tail(&edge->list[UPPER], + &list); + } else +Index: linux-3.10-3.10.11/dummy/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1362_34aa872c2cea9518bba66ab8d88bc0f90dbeb2ba.txt 2014-04-28 00:39:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.patch 2014-04-28 00:39:12.000000000 +0000 @@ -0,0 +1,42 @@ +commit 0ac5762ca876c8554cea6e8a05422d561b98947f +Author: Josef Bacik +Date: Mon Aug 12 10:56:14 2013 -0400 + + Btrfs: skip subvol entries when checking if we've created a dir already + + commit a05254143cd183b18002cbba7759a1e4629aa762 upstream. + + We have logic to see if we've already created a parent directory by check to see + if an inode inside of that directory has a lower inode number than the one we + are currently processing. The logic is that if there is a lower inode number + then we would have had to made sure the directory was created at that previous + point. The problem is that subvols inode numbers count from the lowest objectid + in the root tree, which may be less than our current progress. So just skip if + our dir item key is a root item. This fixes the original test and the xfstest + version I made that added an extra subvol create. Thanks, + + Reported-by: Emil Karlson + Signed-off-by: Josef Bacik + Signed-off-by: Chris Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/btrfs/send.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/btrfs/send.c 2014-04-27 23:38:31.000000000 +0000 ++++ linux-3.10-3.10.11/fs/btrfs/send.c 2014-04-28 00:39:11.000000000 +0000 +@@ -2524,7 +2524,8 @@ + di = btrfs_item_ptr(eb, slot, struct btrfs_dir_item); + btrfs_dir_item_key_to_cpu(eb, di, &di_key); + +- if (di_key.objectid < sctx->send_progress) { ++ if (di_key.type != BTRFS_ROOT_ITEM_KEY && ++ di_key.objectid < sctx->send_progress) { + ret = 1; + goto out; + } +Index: linux-3.10-3.10.11/dummy/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1363_0ac5762ca876c8554cea6e8a05422d561b98947f.txt 2014-04-28 00:39:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.patch --- linux-3.10.11/debian/patches/rpi/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.patch 2014-04-28 00:39:12.000000000 +0000 @@ -0,0 +1,45 @@ +commit 322d9a97c490b890975e0d61f2b034bc18ea1100 +Author: Josef Bacik +Date: Thu Aug 22 17:03:29 2013 -0400 + + Btrfs: remove ourselves from the cluster list under lock + + commit b8d0c69b9469ffd33df30fee3e990f2d4aa68a09 upstream. + + A user was reporting weird warnings from btrfs_put_delayed_ref() and I noticed + that we were doing this list_del_init() on our head ref outside of + delayed_refs->lock. This is a problem if we have people still on the list, we + could end up modifying old pointers and such. Fix this by removing us from the + list before we do our run_delayed_ref on our head ref. Thanks, + + Signed-off-by: Josef Bacik + Signed-off-by: Chris Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/btrfs/extent-tree.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/btrfs/extent-tree.c 2014-04-27 23:38:31.000000000 +0000 ++++ linux-3.10-3.10.11/fs/btrfs/extent-tree.c 2014-04-28 00:39:12.000000000 +0000 +@@ -2402,6 +2402,8 @@ + default: + WARN_ON(1); + } ++ } else { ++ list_del_init(&locked_ref->cluster); + } + spin_unlock(&delayed_refs->lock); + +@@ -2424,7 +2426,6 @@ + * list before we release it. + */ + if (btrfs_delayed_ref_is_head(ref)) { +- list_del_init(&locked_ref->cluster); + btrfs_delayed_ref_unlock(locked_ref); + locked_ref = NULL; + } +Index: linux-3.10-3.10.11/dummy/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1364_322d9a97c490b890975e0d61f2b034bc18ea1100.txt 2014-04-28 00:39:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.patch 2014-04-28 00:39:14.000000000 +0000 @@ -0,0 +1,63 @@ +commit a873420aa42b4c96a9ea9900855856bfea8558d2 +Author: Stefan Achatz +Date: Fri Aug 30 14:10:07 2013 +0200 + + HID: roccat: add support for KonePureOptical v2 + + commit a4be0ed39f2b1ea990804ea54e39bc42d17ed5a5 upstream. + + KonePureOptical is a KonePure with different sensor. + + Signed-off-by: Stefan Achatz + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/hid-core.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-core.c 2014-04-28 00:37:48.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-core.c 2014-04-28 00:39:13.000000000 +0000 +@@ -1755,6 +1755,7 @@ + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ISKU) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONEPLUS) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONEPURE) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONEPURE_OPTICAL) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KOVAPLUS) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_LUA) }, + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_PYRA_WIRED) }, +Index: linux-3.10-3.10.11/drivers/hid/hid-ids.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-ids.h 2014-04-28 00:35:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-ids.h 2014-04-28 00:39:13.000000000 +0000 +@@ -705,6 +705,7 @@ + #define USB_DEVICE_ID_ROCCAT_KONE 0x2ced + #define USB_DEVICE_ID_ROCCAT_KONEPLUS 0x2d51 + #define USB_DEVICE_ID_ROCCAT_KONEPURE 0x2dbe ++#define USB_DEVICE_ID_ROCCAT_KONEPURE_OPTICAL 0x2db4 + #define USB_DEVICE_ID_ROCCAT_KONEXTD 0x2e22 + #define USB_DEVICE_ID_ROCCAT_KOVAPLUS 0x2d50 + #define USB_DEVICE_ID_ROCCAT_LUA 0x2c2e +Index: linux-3.10-3.10.11/drivers/hid/hid-roccat-konepure.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/hid-roccat-konepure.c 2014-04-27 23:38:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/hid-roccat-konepure.c 2014-04-28 00:39:13.000000000 +0000 +@@ -262,6 +262,7 @@ + + static const struct hid_device_id konepure_devices[] = { + { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONEPURE) }, ++ { HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONEPURE_OPTICAL) }, + { } + }; + +@@ -300,5 +301,5 @@ + module_exit(konepure_exit); + + MODULE_AUTHOR("Stefan Achatz"); +-MODULE_DESCRIPTION("USB Roccat KonePure driver"); ++MODULE_DESCRIPTION("USB Roccat KonePure/Optical driver"); + MODULE_LICENSE("GPL v2"); +Index: linux-3.10-3.10.11/dummy/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1365_a873420aa42b4c96a9ea9900855856bfea8558d2.txt 2014-04-28 00:39:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.patch 2014-04-28 00:39:14.000000000 +0000 @@ -0,0 +1,30 @@ +commit 1685c9903b259801b4e1c6c0c325f364742f28f4 +Author: Marcel Holtmann +Date: Sun Sep 1 11:02:46 2013 -0700 + + HID: uhid: add devname module alias + + commit 60cbd53e4bf623fe978e6f23a6da642e730fde3a upstream. + + For simple device node creation, add the devname module alias. + + Signed-off-by: Marcel Holtmann + Reviewed-by: David Herrmann + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/uhid.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/uhid.c 2014-04-27 23:38:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/uhid.c 2014-04-28 00:39:14.000000000 +0000 +@@ -659,3 +659,4 @@ + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("David Herrmann "); + MODULE_DESCRIPTION("User-space I/O driver support for HID subsystem"); ++MODULE_ALIAS("devname:" UHID_NAME); +Index: linux-3.10-3.10.11/dummy/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1366_1685c9903b259801b4e1c6c0c325f364742f28f4.txt 2014-04-28 00:39:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.patch 2014-04-28 00:39:15.000000000 +0000 @@ -0,0 +1,68 @@ +commit 0e01faab5690ff1674f659abb5ef719be6ef549d +Author: David Herrmann +Date: Mon Sep 9 18:33:54 2013 +0200 + + HID: uhid: allocate static minor + + commit 19872d20c890073c5207d9e02bb8f14d451a11eb upstream. + + udev has this nice feature of creating "dead" /dev/ device-nodes if + it finds a devnode: modalias. Once the node is accessed, the kernel + automatically loads the module that provides the node. However, this + requires udev to know the major:minor code to use for the node. This + feature was introduced by: + + commit 578454ff7eab61d13a26b568f99a89a2c9edc881 + Author: Kay Sievers + Date: Thu May 20 18:07:20 2010 +0200 + + driver core: add devname module aliases to allow module on-demand auto-loading + + However, uhid uses dynamic minor numbers so this doesn't actually work. We + need to load uhid to know which minor it's going to use. + + Hence, allocate a static minor (just like uinput does) and we're good + to go. + + Reported-by: Tom Gundersen + Signed-off-by: David Herrmann + Signed-off-by: Jiri Kosina + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hid/uhid.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hid/uhid.c 2014-04-28 00:39:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hid/uhid.c 2014-04-28 00:39:15.000000000 +0000 +@@ -640,7 +640,7 @@ + + static struct miscdevice uhid_misc = { + .fops = &uhid_fops, +- .minor = MISC_DYNAMIC_MINOR, ++ .minor = UHID_MINOR, + .name = UHID_NAME, + }; + +@@ -659,4 +659,5 @@ + MODULE_LICENSE("GPL"); + MODULE_AUTHOR("David Herrmann "); + MODULE_DESCRIPTION("User-space I/O driver support for HID subsystem"); ++MODULE_ALIAS_MISCDEV(UHID_MINOR); + MODULE_ALIAS("devname:" UHID_NAME); +Index: linux-3.10-3.10.11/include/linux/miscdevice.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/miscdevice.h 2014-04-27 23:38:30.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/miscdevice.h 2014-04-28 00:39:15.000000000 +0000 +@@ -45,6 +45,7 @@ + #define MAPPER_CTRL_MINOR 236 + #define LOOP_CTRL_MINOR 237 + #define VHOST_NET_MINOR 238 ++#define UHID_MINOR 239 + #define MISC_DYNAMIC_MINOR 255 + + struct device; +Index: linux-3.10-3.10.11/dummy/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1367_0e01faab5690ff1674f659abb5ef719be6ef549d.txt 2014-04-28 00:39:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.patch 2014-04-28 00:39:16.000000000 +0000 @@ -0,0 +1,182 @@ +commit adf0931b2b3ce91cc4096939650f4c4a3f68fef5 +Author: Bjørn Mork +Date: Tue Sep 10 15:06:20 2013 +0200 + + net: qmi_wwan: add new Qualcomm devices + + commit 0470667caa8261beb8a9141102b04a5357dd45b5 upstream. + + Adding the device list from the Windows driver description files + included with a new Qualcomm MDM9615 based device, "Alcatel-sbell + ASB TL131 TDD LTE", from China Mobile. This device is tested + and verified to work. The others are assumed to work based on + using the same Windows driver. + + Many of these devices support multiple QMI/wwan ports, requiring + multiple interface matching entries. All devices are composite, + providing a mix of one or more serial, storage or Android Debug + Brigde functions in addition to the wwan function. + + This device list included an update of one previously known device, + which was incorrectly assumed to have a Gobi 2K layout. This is + corrected. + + Reported-by: 王康 + Signed-off-by: Bjørn Mork + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/usb/qmi_wwan.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/qmi_wwan.c 2014-04-27 23:38:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/qmi_wwan.c 2014-04-28 00:39:15.000000000 +0000 +@@ -518,6 +518,135 @@ + + /* 3. Combined interface devices matching on interface number */ + {QMI_FIXED_INTF(0x0408, 0xea42, 4)}, /* Yota / Megafon M100-1 */ ++ {QMI_FIXED_INTF(0x05c6, 0x7000, 0)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7001, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7002, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7101, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7101, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7101, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7102, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7102, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x7102, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x8000, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x8001, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9000, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9003, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9005, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900a, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900b, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900c, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900c, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900c, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900d, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900f, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900f, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x900f, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9010, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9010, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9011, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9011, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9021, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9022, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9025, 4)}, /* Alcatel-sbell ASB TL131 TDD LTE (China Mobile) */ ++ {QMI_FIXED_INTF(0x05c6, 0x9026, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x902e, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9031, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9032, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9033, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9033, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9033, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9033, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9034, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9034, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9034, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9034, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9034, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9035, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9036, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9037, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9038, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x903b, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x903c, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x903d, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x903e, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9043, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9046, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9046, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9046, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9047, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9047, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9047, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9048, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9048, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9048, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9048, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9048, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x904c, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x904c, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x904c, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x904c, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9050, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9052, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9053, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9053, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9054, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9054, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9055, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9055, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9055, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9055, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9055, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9056, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9062, 9)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9064, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9065, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9065, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9066, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9066, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9067, 1)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 2)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9068, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9069, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9069, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9069, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9069, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9070, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9070, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9075, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9076, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9076, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9076, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9076, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9076, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9077, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9077, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9077, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9077, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9078, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9079, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9079, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9079, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9079, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9079, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9080, 5)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9080, 6)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9080, 7)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9080, 8)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9083, 3)}, ++ {QMI_FIXED_INTF(0x05c6, 0x9084, 4)}, ++ {QMI_FIXED_INTF(0x05c6, 0x920d, 0)}, ++ {QMI_FIXED_INTF(0x05c6, 0x920d, 5)}, + {QMI_FIXED_INTF(0x12d1, 0x140c, 1)}, /* Huawei E173 */ + {QMI_FIXED_INTF(0x12d1, 0x14ac, 1)}, /* Huawei E1820 */ + {QMI_FIXED_INTF(0x19d2, 0x0002, 1)}, +@@ -610,7 +739,6 @@ + {QMI_GOBI_DEVICE(0x413c, 0x8186)}, /* Dell Gobi 2000 Modem device (N0218, VU936) */ + {QMI_GOBI_DEVICE(0x413c, 0x8194)}, /* Dell Gobi 3000 Composite */ + {QMI_GOBI_DEVICE(0x05c6, 0x920b)}, /* Generic Gobi 2000 Modem device */ +- {QMI_GOBI_DEVICE(0x05c6, 0x920d)}, /* Gobi 3000 Composite */ + {QMI_GOBI_DEVICE(0x05c6, 0x9225)}, /* Sony Gobi 2000 Modem device (N0279, VU730) */ + {QMI_GOBI_DEVICE(0x05c6, 0x9245)}, /* Samsung Gobi 2000 Modem device (VL176) */ + {QMI_GOBI_DEVICE(0x03f0, 0x251d)}, /* HP Gobi 2000 Modem device (VP412) */ +Index: linux-3.10-3.10.11/dummy/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1368_adf0931b2b3ce91cc4096939650f4c4a3f68fef5.txt 2014-04-28 00:39:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.patch --- linux-3.10.11/debian/patches/rpi/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.patch 2014-04-28 00:39:17.000000000 +0000 @@ -0,0 +1,44 @@ +commit 84c8b3b9e17107a74f07dc5e48264034f1410b97 +Author: Kent Overstreet +Date: Thu Oct 10 17:31:15 2013 -0700 + + bcache: Fix a null ptr deref regression + + commit 2fe80d3bbf1c8bd9efc5b8154207c8dd104e7306 upstream. + + Commit c0f04d88e46d ("bcache: Fix flushes in writeback mode") was fixing + a reported data corruption bug, but it seems some last minute + refactoring or rebasing introduced a null pointer deref. + + Signed-off-by: Kent Overstreet + Reported-by: Gabriel de Perthuis + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/request.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/request.c 2014-04-28 00:37:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/request.c 2014-04-28 00:39:16.000000000 +0000 +@@ -1055,6 +1055,7 @@ + } else { + trace_bcache_writeback(s->orig_bio); + bch_writeback_add(dc, bio_sectors(bio)); ++ s->op.cache_bio = bio; + + if (bio->bi_rw & REQ_FLUSH) { + /* Also need to send a flush to the backing device */ +@@ -1067,8 +1068,6 @@ + flush->bi_private = cl; + + closure_bio_submit(flush, cl, s->d); +- } else { +- s->op.cache_bio = bio; + } + } + out: +Index: linux-3.10-3.10.11/dummy/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1369_84c8b3b9e17107a74f07dc5e48264034f1410b97.txt 2014-04-28 00:39:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.patch --- linux-3.10.11/debian/patches/rpi/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.patch 2014-04-28 00:39:18.000000000 +0000 @@ -0,0 +1,24 @@ +commit 7fc878164dd8bc7812eb774e728f2cc1ffe905ed +Author: Greg Kroah-Hartman +Date: Sun Oct 13 16:08:56 2013 -0700 + + Linux 3.10.16 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:37:45.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:39:17.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 15 ++SUBLEVEL = 16 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1370_7fc878164dd8bc7812eb774e728f2cc1ffe905ed.txt 2014-04-28 00:39:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.patch --- linux-3.10.11/debian/patches/rpi/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.patch 2014-04-28 00:39:18.000000000 +0000 @@ -0,0 +1,88 @@ +commit 044dde0ae7ea37140b31c5068c7517b49b141aae +Author: Daniel Mack +Date: Wed Oct 2 17:49:50 2013 +0200 + + ALSA: snd-usb-usx2y: remove bogus frame checks + + commit a9d14bc0b188a822e42787d01e56c06fe9750162 upstream. + + The frame check in i_usX2Y_urb_complete() and + i_usX2Y_usbpcm_urb_complete() is bogus and produces false positives as + described in this LAU thread: + + http://linuxaudio.org/mailarchive/lau/2013/5/20/200177 + + This patch removes the check code entirely. + + Cc: fzu@wemgehoertderstaat.de + Reported-by: Dr Nicholas J Bailey + Suggested-by: Takashi Iwai + Signed-off-by: Daniel Mack + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/usb/usx2y/usbusx2yaudio.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/usb/usx2y/usbusx2yaudio.c 2014-04-27 23:38:29.000000000 +0000 ++++ linux-3.10-3.10.11/sound/usb/usx2y/usbusx2yaudio.c 2014-04-28 00:39:18.000000000 +0000 +@@ -299,19 +299,6 @@ + usX2Y_clients_stop(usX2Y); + } + +-static void usX2Y_error_sequence(struct usX2Ydev *usX2Y, +- struct snd_usX2Y_substream *subs, struct urb *urb) +-{ +- snd_printk(KERN_ERR +-"Sequence Error!(hcd_frame=%i ep=%i%s;wait=%i,frame=%i).\n" +-"Most probably some urb of usb-frame %i is still missing.\n" +-"Cause could be too long delays in usb-hcd interrupt handling.\n", +- usb_get_current_frame_number(usX2Y->dev), +- subs->endpoint, usb_pipein(urb->pipe) ? "in" : "out", +- usX2Y->wait_iso_frame, urb->start_frame, usX2Y->wait_iso_frame); +- usX2Y_clients_stop(usX2Y); +-} +- + static void i_usX2Y_urb_complete(struct urb *urb) + { + struct snd_usX2Y_substream *subs = urb->context; +@@ -328,12 +315,9 @@ + usX2Y_error_urb_status(usX2Y, subs, urb); + return; + } +- if (likely((urb->start_frame & 0xFFFF) == (usX2Y->wait_iso_frame & 0xFFFF))) +- subs->completed_urb = urb; +- else { +- usX2Y_error_sequence(usX2Y, subs, urb); +- return; +- } ++ ++ subs->completed_urb = urb; ++ + { + struct snd_usX2Y_substream *capsubs = usX2Y->subs[SNDRV_PCM_STREAM_CAPTURE], + *playbacksubs = usX2Y->subs[SNDRV_PCM_STREAM_PLAYBACK]; +Index: linux-3.10-3.10.11/sound/usb/usx2y/usx2yhwdeppcm.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/usb/usx2y/usx2yhwdeppcm.c 2014-04-27 23:38:29.000000000 +0000 ++++ linux-3.10-3.10.11/sound/usb/usx2y/usx2yhwdeppcm.c 2014-04-28 00:39:18.000000000 +0000 +@@ -244,13 +244,8 @@ + usX2Y_error_urb_status(usX2Y, subs, urb); + return; + } +- if (likely((urb->start_frame & 0xFFFF) == (usX2Y->wait_iso_frame & 0xFFFF))) +- subs->completed_urb = urb; +- else { +- usX2Y_error_sequence(usX2Y, subs, urb); +- return; +- } + ++ subs->completed_urb = urb; + capsubs = usX2Y->subs[SNDRV_PCM_STREAM_CAPTURE]; + capsubs2 = usX2Y->subs[SNDRV_PCM_STREAM_CAPTURE + 2]; + playbacksubs = usX2Y->subs[SNDRV_PCM_STREAM_PLAYBACK]; +Index: linux-3.10-3.10.11/dummy/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1371_044dde0ae7ea37140b31c5068c7517b49b141aae.txt 2014-04-28 00:39:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.patch 2014-04-28 00:39:19.000000000 +0000 @@ -0,0 +1,74 @@ +commit 43d3dd157aa81407473c416234c94abcd13c4fc8 +Author: Anssi Hannula +Date: Mon Oct 7 19:24:52 2013 +0300 + + ALSA: hda - hdmi: Fix channel map switch not taking effect + + commit 39edac70e9aedf451fccaa851b273ace9fcca0bd upstream. + + Currently hdmi_setup_audio_infoframe() reprograms the HDA channel + mapping only when the infoframe is not up-to-date or the non-PCM flag + has changed. + + However, when just the channel map has been changed, the infoframe may + still be up-to-date and non-PCM flag may not have changed, so the new + channel map is not actually programmed into the HDA codec. + + Notably, this failing case is also always triggered when the device is + already in a prepared state and a new channel map is configured while + changing only the channel positions (for example, plain + "speaker-test -c2 -m FR,FL"). + + Fix that by always programming the channel map in + hdmi_setup_audio_infoframe(). Tested on Intel HDMI. + + Signed-off-by: Anssi Hannula + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_hdmi.c 2014-04-28 00:35:28.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_hdmi.c 2014-04-28 00:39:19.000000000 +0000 +@@ -930,6 +930,14 @@ + } + + /* ++ * always configure channel mapping, it may have been changed by the ++ * user in the meantime ++ */ ++ hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, ++ channels, per_pin->chmap, ++ per_pin->chmap_set); ++ ++ /* + * sizeof(ai) is used instead of sizeof(*hdmi_ai) or + * sizeof(*dp_ai) to avoid partial match/update problems when + * the user switches between HDMI/DP monitors. +@@ -940,20 +948,10 @@ + "pin=%d channels=%d\n", + pin_nid, + channels); +- hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, +- channels, per_pin->chmap, +- per_pin->chmap_set); + hdmi_stop_infoframe_trans(codec, pin_nid); + hdmi_fill_audio_infoframe(codec, pin_nid, + ai.bytes, sizeof(ai)); + hdmi_start_infoframe_trans(codec, pin_nid); +- } else { +- /* For non-pcm audio switch, setup new channel mapping +- * accordingly */ +- if (per_pin->non_pcm != non_pcm) +- hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, +- channels, per_pin->chmap, +- per_pin->chmap_set); + } + + per_pin->non_pcm = non_pcm; +Index: linux-3.10-3.10.11/dummy/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1372_43d3dd157aa81407473c416234c94abcd13c4fc8.txt 2014-04-28 00:39:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.patch --- linux-3.10.11/debian/patches/rpi/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.patch 2014-04-28 00:39:20.000000000 +0000 @@ -0,0 +1,33 @@ +commit 74a8f08dfff48215dabccf8148b7505e00d39c37 +Author: Takashi Iwai +Date: Tue Oct 8 19:57:50 2013 +0200 + + ALSA: hda - Add fixup for ASUS N56VZ + + commit c6cc3d58b4042f5cadae653ff8d3df26af1a0169 upstream. + + ASUS N56VZ needs a fixup for the bass speaker pin, which was already + provided via model=asus-mode4. + + Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=841645 + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_realtek.c 2014-04-27 23:38:28.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:19.000000000 +0000 +@@ -4216,6 +4216,7 @@ + SND_PCI_QUIRK(0x1028, 0x05d8, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), ++ SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_ASUS_MODE4), + SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT), + SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_FIXUP_ASUS_MODE2), + SND_PCI_QUIRK(0x144d, 0xc051, "Samsung R720", ALC662_FIXUP_IDEAPAD), +Index: linux-3.10-3.10.11/dummy/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1373_74a8f08dfff48215dabccf8148b7505e00d39c37.txt 2014-04-28 00:39:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.patch --- linux-3.10.11/debian/patches/rpi/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.patch 2014-04-28 00:39:21.000000000 +0000 @@ -0,0 +1,60 @@ +commit 09c517435dd6f29c29822b627f653259e97e7294 +Author: David Henningsson +Date: Fri Oct 11 10:18:45 2013 +0200 + + ALSA: hda - Fix microphone for Sony VAIO Pro 13 (Haswell model) + + commit 88cfcf86aa3ada84d97195bcad74f4dadb4ae23b upstream. + + The external mic showed up with a precense detect of "always present", + essentially disabling the internal mic. Therefore turn off presence + detection for this pin. + + Note: The external mic seems not yet working, but an internal mic is + certainly better than no mic at all. + + BugLink: https://bugs.launchpad.net/bugs/1227093 + Signed-off-by: David Henningsson + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:19.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:20.000000000 +0000 +@@ -3223,6 +3223,7 @@ + ALC269_FIXUP_HP_GPIO_LED, + ALC269_FIXUP_INV_DMIC, + ALC269_FIXUP_LENOVO_DOCK, ++ ALC286_FIXUP_SONY_MIC_NO_PRESENCE, + ALC269_FIXUP_PINCFG_NO_HP_TO_LINEOUT, + ALC269_FIXUP_DELL1_MIC_NO_PRESENCE, + ALC269_FIXUP_DELL2_MIC_NO_PRESENCE, +@@ -3420,6 +3421,13 @@ + .type = HDA_FIXUP_FUNC, + .v.func = alc_fixup_headset_mode_no_hp_mic, + }, ++ [ALC286_FIXUP_SONY_MIC_NO_PRESENCE] = { ++ .type = HDA_FIXUP_PINS, ++ .v.pins = (const struct hda_pintbl[]) { ++ { 0x18, 0x01a1913c }, /* use as headset mic, without its own jack detect */ ++ { } ++ }, ++ }, + [ALC269_FIXUP_ASUS_X101_FUNC] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc269_fixup_x101_headset_mic, +@@ -3529,6 +3537,7 @@ + SND_PCI_QUIRK(0x1043, 0x8398, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC), + SND_PCI_QUIRK(0x1043, 0x83ce, "ASUS P1005", ALC269_FIXUP_STEREO_DMIC), + SND_PCI_QUIRK(0x1043, 0x8516, "ASUS X101CH", ALC269_FIXUP_ASUS_X101), ++ SND_PCI_QUIRK(0x104d, 0x90b6, "Sony VAIO Pro 13", ALC286_FIXUP_SONY_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x104d, 0x9073, "Sony VAIO", ALC275_FIXUP_SONY_VAIO_GPIO2), + SND_PCI_QUIRK(0x104d, 0x907b, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), + SND_PCI_QUIRK(0x104d, 0x9084, "Sony VAIO", ALC275_FIXUP_SONY_HWEQ), +Index: linux-3.10-3.10.11/dummy/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1374_09c517435dd6f29c29822b627f653259e97e7294.txt 2014-04-28 00:39:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.patch 2014-04-28 00:39:22.000000000 +0000 @@ -0,0 +1,72 @@ +commit b7a52f5111bc53ffbfff96330621cbde80df6ba4 +Author: Theodore Ts'o +Date: Tue Sep 10 10:52:35 2013 -0400 + + random: run random_int_secret_init() run after all late_initcalls + + commit 47d06e532e95b71c0db3839ebdef3fe8812fca2c upstream. + + The some platforms (e.g., ARM) initializes their clocks as + late_initcalls for some unknown reason. So make sure + random_int_secret_init() is run after all of the late_initcalls are + run. + + Signed-off-by: "Theodore Ts'o" + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/char/random.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/random.c 2014-04-27 23:38:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/random.c 2014-04-28 00:39:21.000000000 +0000 +@@ -1462,12 +1462,11 @@ + + static u32 random_int_secret[MD5_MESSAGE_BYTES / 4] ____cacheline_aligned; + +-static int __init random_int_secret_init(void) ++int random_int_secret_init(void) + { + get_random_bytes(random_int_secret, sizeof(random_int_secret)); + return 0; + } +-late_initcall(random_int_secret_init); + + /* + * Get a random word for internal kernel use only. Similar to urandom but +Index: linux-3.10-3.10.11/include/linux/random.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/random.h 2014-04-27 23:38:28.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/random.h 2014-04-28 00:39:21.000000000 +0000 +@@ -17,6 +17,7 @@ + extern void get_random_bytes(void *buf, int nbytes); + extern void get_random_bytes_arch(void *buf, int nbytes); + void generate_random_uuid(unsigned char uuid_out[16]); ++extern int random_int_secret_init(void); + + #ifndef MODULE + extern const struct file_operations random_fops, urandom_fops; +Index: linux-3.10-3.10.11/init/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/init/main.c 2014-04-27 23:38:28.000000000 +0000 ++++ linux-3.10-3.10.11/init/main.c 2014-04-28 00:39:21.000000000 +0000 +@@ -74,6 +74,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -777,6 +778,7 @@ + do_ctors(); + usermodehelper_enable(); + do_initcalls(); ++ random_int_secret_init(); + } + + static void __init do_pre_smp_initcalls(void) +Index: linux-3.10-3.10.11/dummy/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1375_b7a52f5111bc53ffbfff96330621cbde80df6ba4.txt 2014-04-28 00:39:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.patch 2014-04-28 00:39:22.000000000 +0000 @@ -0,0 +1,40 @@ +commit 670c0d101a57340aff4311c26a9ebb65b1d58f5a +Author: Linus Torvalds +Date: Mon Sep 30 08:35:10 2013 -0700 + + vfs: allow O_PATH file descriptors for fstatfs() + + commit 9d05746e7b16d8565dddbe3200faa1e669d23bbf upstream. + + Olga reported that file descriptors opened with O_PATH do not work with + fstatfs(), found during further development of ksh93's thread support. + + There is no reason to not allow O_PATH file descriptors here (fstatfs is + very much a path operation), so use "fdget_raw()". See commit + 55815f70147d ("vfs: make O_PATH file descriptors usable for 'fstat()'") + for a very similar issue reported for fstat() by the same team. + + Reported-and-tested-by: ольга крыжановÑÐºÐ°Ñ + Acked-by: Al Viro + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/statfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/statfs.c 2014-04-27 23:38:27.000000000 +0000 ++++ linux-3.10-3.10.11/fs/statfs.c 2014-04-28 00:39:22.000000000 +0000 +@@ -94,7 +94,7 @@ + + int fd_statfs(int fd, struct kstatfs *st) + { +- struct fd f = fdget(fd); ++ struct fd f = fdget_raw(fd); + int error = -EBADF; + if (f.file) { + error = vfs_statfs(&f.file->f_path, st); +Index: linux-3.10-3.10.11/dummy/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1376_670c0d101a57340aff4311c26a9ebb65b1d58f5a.txt 2014-04-28 00:39:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.patch --- linux-3.10.11/debian/patches/rpi/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.patch 2014-04-28 00:39:23.000000000 +0000 @@ -0,0 +1,43 @@ +commit fafd39123416e56bf782e323031e6fdd18b61d60 +Author: Taras Kondratiuk +Date: Mon Oct 7 13:41:59 2013 +0300 + + i2c: omap: Clear ARDY bit twice + + commit 4cdbf7d346e7461c3b93a26707c852e2c9db3753 upstream. + + Initially commit cb527ede1bf6ff2008a025606f25344b8ed7b4ac + "i2c-omap: Double clear of ARDY status in IRQ handler" + added a workaround for undocumented errata ProDB0017052. + But then commit 1d7afc95946487945cc7f5019b41255b72224b70 + "i2c: omap: ack IRQ in parts" refactored code and missed + one of ARDY clearings. So current code violates errata. + It causes often i2c bus timeouts on my Pandaboard. + + This patch adds a second clearing in place. + + Signed-off-by: Grygorii Strashko + Signed-off-by: Taras Kondratiuk + Signed-off-by: Wolfram Sang + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-omap.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-omap.c 2014-04-27 23:38:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-omap.c 2014-04-28 00:39:23.000000000 +0000 +@@ -941,6 +941,9 @@ + /* + * ProDB0017052: Clear ARDY bit twice + */ ++ if (stat & OMAP_I2C_STAT_ARDY) ++ omap_i2c_ack_stat(dev, OMAP_I2C_STAT_ARDY); ++ + if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | + OMAP_I2C_STAT_AL)) { + omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_RRDY | +Index: linux-3.10-3.10.11/dummy/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1377_fafd39123416e56bf782e323031e6fdd18b61d60.txt 2014-04-28 00:39:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.patch --- linux-3.10.11/debian/patches/rpi/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.patch 2014-04-28 00:39:24.000000000 +0000 @@ -0,0 +1,75 @@ +commit 8c279694727d2ec6de4cc9dc96b1d0cfac0f5295 +Author: Henrik Rydberg +Date: Wed Oct 2 19:15:03 2013 +0200 + + hwmon: (applesmc) Always read until end of data + + commit 25f2bd7f5add608c1d1405938f39c96927b275ca upstream. + + The crash reported and investigated in commit 5f4513 turned out to be + caused by a change to the read interface on newer (2012) SMCs. + + Tests by Chris show that simply reading the data valid line is enough + for the problem to go away. Additional tests show that the newer SMCs + no longer wait for the number of requested bytes, but start sending + data right away. Apparently the number of bytes to read is no longer + specified as before, but instead found out by reading until end of + data. Failure to read until end of data confuses the state machine, + which eventually causes the crash. + + As a remedy, assuming bit0 is the read valid line, make sure there is + nothing more to read before leaving the read function. + + Tested to resolve the original problem, and runtested on MBA3,1, + MBP4,1, MBP8,2, MBP10,1, MBP10,2. The patch seems to have no effect on + machines before 2012. + + Tested-by: Chris Murphy + Signed-off-by: Henrik Rydberg + Signed-off-by: Guenter Roeck + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/hwmon/applesmc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hwmon/applesmc.c 2014-04-28 00:37:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hwmon/applesmc.c 2014-04-28 00:39:23.000000000 +0000 +@@ -230,6 +230,7 @@ + + static int read_smc(u8 cmd, const char *key, u8 *buffer, u8 len) + { ++ u8 status, data = 0; + int i; + + if (send_command(cmd) || send_argument(key)) { +@@ -237,6 +238,7 @@ + return -EIO; + } + ++ /* This has no effect on newer (2012) SMCs */ + if (send_byte(len, APPLESMC_DATA_PORT)) { + pr_warn("%.4s: read len fail\n", key); + return -EIO; +@@ -250,6 +252,17 @@ + buffer[i] = inb(APPLESMC_DATA_PORT); + } + ++ /* Read the data port until bit0 is cleared */ ++ for (i = 0; i < 16; i++) { ++ udelay(APPLESMC_MIN_WAIT); ++ status = inb(APPLESMC_CMD_PORT); ++ if (!(status & 0x01)) ++ break; ++ data = inb(APPLESMC_DATA_PORT); ++ } ++ if (i) ++ pr_warn("flushed %d bytes, last value is: %d\n", i, data); ++ + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1378_8c279694727d2ec6de4cc9dc96b1d0cfac0f5295.txt 2014-04-28 00:39:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.patch 2014-04-28 00:39:25.000000000 +0000 @@ -0,0 +1,43 @@ +commit a849b2f4200ab490d7a6d80e7632d28dc80c8f6f +Author: Josef Bacik +Date: Wed Oct 9 12:24:04 2013 -0400 + + Btrfs: use right root when checking for hash collision + + commit 4871c1588f92c6c13f4713a7009f25f217055807 upstream. + + btrfs_rename was using the root of the old dir instead of the root of the new + dir when checking for a hash collision, so if you tried to move a file into a + subvol it would freak out because it would see the file you are trying to move + in its current root. This fixes the bug where this would fail + + btrfs subvol create test1 + btrfs subvol create test2 + mv test1 test2. + + Thanks to Chris Murphy for catching this, + + Reported-by: Chris Murphy + Signed-off-by: Josef Bacik + Signed-off-by: Chris Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/btrfs/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/btrfs/inode.c 2014-04-27 23:38:26.000000000 +0000 ++++ linux-3.10-3.10.11/fs/btrfs/inode.c 2014-04-28 00:39:24.000000000 +0000 +@@ -8146,7 +8146,7 @@ + + + /* check for collisions, even if the name isn't there */ +- ret = btrfs_check_dir_item_collision(root, new_dir->i_ino, ++ ret = btrfs_check_dir_item_collision(dest, new_dir->i_ino, + new_dentry->d_name.name, + new_dentry->d_name.len); + +Index: linux-3.10-3.10.11/dummy/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1379_a849b2f4200ab490d7a6d80e7632d28dc80c8f6f.txt 2014-04-28 00:39:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.patch --- linux-3.10.11/debian/patches/rpi/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.patch 2014-04-28 00:39:26.000000000 +0000 @@ -0,0 +1,44 @@ +commit cec073e269a8e8ee653ada869b96c59e8286a606 +Author: Dave Jones +Date: Thu Oct 10 20:05:35 2013 -0400 + + ext4: fix memory leak in xattr + + commit 6e4ea8e33b2057b85d75175dd89b93f5e26de3bc upstream. + + If we take the 2nd retry path in ext4_expand_extra_isize_ea, we + potentionally return from the function without having freed these + allocations. If we don't do the return, we over-write the previous + allocation pointers, so we leak either way. + + Spotted with Coverity. + + [ Fixed by tytso to set is and bs to NULL after freeing these + pointers, in case in the retry loop we later end up triggering an + error causing a jump to cleanup, at which point we could have a double + free bug. -- Ted ] + + Signed-off-by: Dave Jones + Signed-off-by: "Theodore Ts'o" + Reviewed-by: Eric Sandeen + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/ext4/xattr.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/ext4/xattr.c 2014-04-27 23:38:26.000000000 +0000 ++++ linux-3.10-3.10.11/fs/ext4/xattr.c 2014-04-28 00:39:25.000000000 +0000 +@@ -1350,6 +1350,8 @@ + s_min_extra_isize) { + tried_min_extra_isize++; + new_extra_isize = s_min_extra_isize; ++ kfree(is); is = NULL; ++ kfree(bs); bs = NULL; + goto retry; + } + error = -1; +Index: linux-3.10-3.10.11/dummy/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1380_cec073e269a8e8ee653ada869b96c59e8286a606.txt 2014-04-28 00:39:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1381_40ee05de350259890492ceb4f23017470c553217.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1381_40ee05de350259890492ceb4f23017470c553217.patch --- linux-3.10.11/debian/patches/rpi/rpi_1381_40ee05de350259890492ceb4f23017470c553217.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1381_40ee05de350259890492ceb4f23017470c553217.patch 2014-04-28 00:39:26.000000000 +0000 @@ -0,0 +1,38 @@ +commit 40ee05de350259890492ceb4f23017470c553217 +Author: Paul Mackerras +Date: Sat Sep 21 09:53:28 2013 +1000 + + KVM: PPC: Book3S HV: Fix typo in saving DSCR + + commit cfc860253abd73e1681696c08ea268d33285a2c4 upstream. + + This fixes a typo in the code that saves the guest DSCR (Data Stream + Control Register) into the kvm_vcpu_arch struct on guest exit. The + effect of the typo was that the DSCR value was saved in the wrong place, + so changes to the DSCR by the guest didn't persist across guest exit + and entry, and some host kernel memory got corrupted. + + Signed-off-by: Paul Mackerras + Acked-by: Alexander Graf + Signed-off-by: Paolo Bonzini + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/powerpc/kvm/book3s_hv_rmhandlers.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/kvm/book3s_hv_rmhandlers.S 2014-04-27 23:38:25.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/kvm/book3s_hv_rmhandlers.S 2014-04-28 00:39:26.000000000 +0000 +@@ -1054,7 +1054,7 @@ + BEGIN_FTR_SECTION + mfspr r8, SPRN_DSCR + ld r7, HSTATE_DSCR(r13) +- std r8, VCPU_DSCR(r7) ++ std r8, VCPU_DSCR(r9) + mtspr SPRN_DSCR, r7 + END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206) + +Index: linux-3.10-3.10.11/dummy/rpi_1381_40ee05de350259890492ceb4f23017470c553217.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1381_40ee05de350259890492ceb4f23017470c553217.txt 2014-04-28 00:39:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.patch 2014-04-28 00:39:27.000000000 +0000 @@ -0,0 +1,58 @@ +commit 77587e89405f5d8225a0e750df254bcc2dcb73e1 +Author: Helge Deller +Date: Tue Oct 1 21:54:46 2013 +0200 + + parisc: fix interruption handler to respect pagefault_disable() + + commit 59b33f148cc08fb33cbe823fca1e34f7f023765e upstream. + + Running an "echo t > /proc/sysrq-trigger" crashes the parisc kernel. The + problem is, that in print_worker_info() we try to read the workqueue info via + the probe_kernel_read() functions which use pagefault_disable() to avoid + crashes like this: + probe_kernel_read(&pwq, &worker->current_pwq, sizeof(pwq)); + probe_kernel_read(&wq, &pwq->wq, sizeof(wq)); + probe_kernel_read(name, wq->name, sizeof(name) - 1); + + The problem here is, that the first probe_kernel_read(&pwq) might return zero + in pwq and as such the following probe_kernel_reads() try to access contents of + the page zero which is read protected and generate a kernel segfault. + + With this patch we fix the interruption handler to call parisc_terminate() + directly only if pagefault_disable() was not called (in which case + preempt_count()==0). Otherwise we hand over to the pagefault handler which + will try to look up the faulting address in the fixup tables. + + Signed-off-by: Helge Deller + Signed-off-by: John David Anglin + Signed-off-by: Helge Deller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/parisc/kernel/traps.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/parisc/kernel/traps.c 2014-04-27 23:38:25.000000000 +0000 ++++ linux-3.10-3.10.11/arch/parisc/kernel/traps.c 2014-04-28 00:39:27.000000000 +0000 +@@ -805,14 +805,14 @@ + else { + + /* +- * The kernel should never fault on its own address space. ++ * The kernel should never fault on its own address space, ++ * unless pagefault_disable() was called before. + */ + +- if (fault_space == 0) ++ if (fault_space == 0 && !in_atomic()) + { + pdc_chassis_send_status(PDC_CHASSIS_DIRECT_PANIC); + parisc_terminate("Kernel Fault", regs, code, fault_address); +- + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1382_77587e89405f5d8225a0e750df254bcc2dcb73e1.txt 2014-04-28 00:39:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.patch --- linux-3.10.11/debian/patches/rpi/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.patch 2014-04-28 00:39:28.000000000 +0000 @@ -0,0 +1,32 @@ +commit 1176dcded10fd4de79aaac9bb1bd77a4aabdba61 +Author: Russell King +Date: Tue Aug 6 09:49:14 2013 +0100 + + ARM: Fix the world famous typo with is_gate_vma() + + commit 1d0bbf428924f94867542d49d436cf254b9dbd06 upstream. + + Signed-off-by: Russell King + Signed-off-by: Greg Kroah-Hartman + Cc: Colin Cross + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/kernel/process.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/process.c 2014-04-27 23:38:25.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/process.c 2014-04-28 00:39:28.000000000 +0000 +@@ -466,7 +466,7 @@ + { + return in_gate_area(NULL, addr); + } +-#define is_gate_vma(vma) ((vma) = &gate_vma) ++#define is_gate_vma(vma) ((vma) == &gate_vma) + #else + #define is_gate_vma(vma) 0 + #endif +Index: linux-3.10-3.10.11/dummy/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1383_1176dcded10fd4de79aaac9bb1bd77a4aabdba61.txt 2014-04-28 00:39:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.patch 2014-04-28 00:39:29.000000000 +0000 @@ -0,0 +1,48 @@ +commit 8a229aeadcf9cf6616e56b00babc86607a3b3d1d +Author: Vineet Gupta +Date: Mon Jun 17 18:27:23 2013 +0530 + + ARC: Setup Vector Table Base in early boot + + commit 05b016ecf5e7a8c24409d8e9effb5d2ec9107708 upstream. + + Otherwise early boot exceptions such as instructions errors due to + configuration mismatch between kernel and hardware go off to la-la land, + as opposed to hitting the handler and panic()'ing properly. + + Signed-off-by: Vineet Gupta + Cc: Guenter Roeck + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/kernel/head.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/head.S 2014-04-27 23:38:24.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/head.S 2014-04-28 00:39:28.000000000 +0000 +@@ -27,6 +27,8 @@ + ; Don't clobber r0-r4 yet. It might have bootloader provided info + ;------------------------------------------------------------------- + ++ sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] ++ + #ifdef CONFIG_SMP + ; Only Boot (Master) proceeds. Others wait in platform dependent way + ; IDENTITY Reg [ 3 2 1 0 ] +Index: linux-3.10-3.10.11/arch/arc/kernel/irq.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/irq.c 2014-04-27 23:38:24.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/irq.c 2014-04-28 00:39:28.000000000 +0000 +@@ -32,8 +32,6 @@ + { + int level_mask = 0; + +- write_aux_reg(AUX_INTR_VEC_BASE, _int_vec_base_lds); +- + /* Disable all IRQs: enable them as devices request */ + write_aux_reg(AUX_IENABLE, 0); + +Index: linux-3.10-3.10.11/dummy/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1384_8a229aeadcf9cf6616e56b00babc86607a3b3d1d.txt 2014-04-28 00:39:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.patch 2014-04-28 00:39:30.000000000 +0000 @@ -0,0 +1,95 @@ +commit 98f745546bd27e54fe0bed1e9c900301428de9d5 +Author: Noam Camus +Date: Thu Sep 12 13:07:39 2013 +0530 + + ARC: SMP failed to boot due to missing IVT setup + + commit c3567f8a359b7917dcffa442301f88ed0a75211f upstream. + + Commit 05b016ecf5e7a "ARC: Setup Vector Table Base in early boot" moved + the Interrupt vector Table setup out of arc_init_IRQ() which is called + for all CPUs, to entry point of boot cpu only, breaking booting of others. + + Fix by adding the same to entry point of non-boot CPUs too. + + read_arc_build_cfg_regs() printing IVT Base Register didn't help the + casue since it prints a synthetic value if zero which is totally bogus, + so fix that to print the exact Register. + + [vgupta: Remove the now stale comment from header of arc_init_IRQ and + also added the commentary for halt-on-reset] + + Cc: Gilad Ben-Yossef + Signed-off-by: Noam Camus + Signed-off-by: Vineet Gupta + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/include/asm/sections.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/include/asm/sections.h 2014-04-27 23:38:24.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/include/asm/sections.h 2014-04-28 00:39:29.000000000 +0000 +@@ -11,7 +11,6 @@ + + #include + +-extern char _int_vec_base_lds[]; + extern char __arc_dccm_base[]; + extern char __dtb_start[]; + +Index: linux-3.10-3.10.11/arch/arc/kernel/head.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/head.S 2014-04-28 00:39:28.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/head.S 2014-04-28 00:39:29.000000000 +0000 +@@ -34,6 +34,9 @@ + ; IDENTITY Reg [ 3 2 1 0 ] + ; (cpu-id) ^^^ => Zero for UP ARC700 + ; => #Core-ID if SMP (Master 0) ++ ; Note that non-boot CPUs might not land here if halt-on-reset and ++ ; instead breath life from @first_lines_of_secondary, but we still ++ ; need to make sure only boot cpu takes this path. + GET_CPU_ID r5 + cmp r5, 0 + jnz arc_platform_smp_wait_to_boot +@@ -98,6 +101,8 @@ + + first_lines_of_secondary: + ++ sr @_int_vec_base_lds, [AUX_INTR_VEC_BASE] ++ + ; setup per-cpu idle task as "current" on this CPU + ld r0, [@secondary_idle_tsk] + SET_CURR_TASK_ON_CPU r0, r1 +Index: linux-3.10-3.10.11/arch/arc/kernel/irq.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/irq.c 2014-04-28 00:39:28.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/irq.c 2014-04-28 00:39:29.000000000 +0000 +@@ -24,7 +24,6 @@ + * -Needed for each CPU (hence not foldable into init_IRQ) + * + * what it does ? +- * -setup Vector Table Base Reg - in case Linux not linked at 0x8000_0000 + * -Disable all IRQs (on CPU side) + * -Optionally, setup the High priority Interrupts as Level 2 IRQs + */ +Index: linux-3.10-3.10.11/arch/arc/kernel/setup.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/setup.c 2014-04-27 23:38:24.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/setup.c 2014-04-28 00:39:29.000000000 +0000 +@@ -47,10 +47,7 @@ + READ_BCR(AUX_IDENTITY, cpu->core); + + cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR); +- + cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE); +- if (cpu->vec_base == 0) +- cpu->vec_base = (unsigned int)_int_vec_base_lds; + + READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space); + cpu->uncached_base = uncached_space.start << 24; +Index: linux-3.10-3.10.11/dummy/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1385_98f745546bd27e54fe0bed1e9c900301428de9d5.txt 2014-04-28 00:39:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.patch 2014-04-28 00:39:31.000000000 +0000 @@ -0,0 +1,44 @@ +commit 8036c31c84117707d4132cd199d997d7ed41427c +Author: Mischa Jonker +Date: Fri Aug 30 11:56:25 2013 +0200 + + ARC: Fix __udelay calculation + + commit 7efd0da2d17360e1cef91507dbe619db0ee2c691 upstream. + + Cast usecs to u64, to ensure that the (usecs * 4295 * HZ) + multiplication is 64 bit. + + Initially, the (usecs * 4295 * HZ) part was done as a 32 bit + multiplication, with the result casted to 64 bit. This led to some bits + falling off, causing a "DMA initialization error" in the stmmac Ethernet + driver, due to a premature timeout. + + Signed-off-by: Mischa Jonker + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/include/asm/delay.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/include/asm/delay.h 2014-04-27 23:38:24.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/include/asm/delay.h 2014-04-28 00:39:30.000000000 +0000 +@@ -53,11 +53,10 @@ + { + unsigned long loops; + +- /* (long long) cast ensures 64 bit MPY - real or emulated ++ /* (u64) cast ensures 64 bit MPY - real or emulated + * HZ * 4295 is pre-evaluated by gcc - hence only 2 mpy ops + */ +- loops = ((long long)(usecs * 4295 * HZ) * +- (long long)(loops_per_jiffy)) >> 32; ++ loops = ((u64) usecs * 4295 * HZ * loops_per_jiffy) >> 32; + + __delay(loops); + } +Index: linux-3.10-3.10.11/dummy/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1386_8036c31c84117707d4132cd199d997d7ed41427c.txt 2014-04-28 00:39:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.patch 2014-04-28 00:39:32.000000000 +0000 @@ -0,0 +1,40 @@ +commit 5cd12e7776183668bd92a5f5fe102113d3bb599a +Author: Mischa Jonker +Date: Thu Sep 26 15:44:56 2013 +0200 + + ARC: Handle zero-overhead-loop in unaligned access handler + + commit c11eb222fd7d4db91196121dbf854178505d2751 upstream. + + If a load or store is the last instruction in a zero-overhead-loop, and + it's misaligned, the loop would execute only once. + + This fixes that problem. + + Signed-off-by: Mischa Jonker + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/kernel/unaligned.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/unaligned.c 2014-04-27 23:38:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/unaligned.c 2014-04-28 00:39:31.000000000 +0000 +@@ -233,6 +233,12 @@ + regs->status32 &= ~STATUS_DE_MASK; + } else { + regs->ret += state.instr_len; ++ ++ /* handle zero-overhead-loop */ ++ if ((regs->ret == regs->lp_end) && (regs->lp_count)) { ++ regs->ret = regs->lp_start; ++ regs->lp_count--; ++ } + } + + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1387_5cd12e7776183668bd92a5f5fe102113d3bb599a.txt 2014-04-28 00:39:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.patch 2014-04-28 00:39:32.000000000 +0000 @@ -0,0 +1,53 @@ +commit a683a93b1ce0b86944a51a1b8f787aa684836edb +Author: Vineet Gupta +Date: Thu Sep 26 18:50:40 2013 +0530 + + ARC: Fix 32-bit wrap around in access_ok() + + commit 0752adfda15f0eca9859a76da3db1800e129ad43 upstream. + + Anton reported + + | LTP tests syscalls/process_vm_readv01 and process_vm_writev01 fail + | similarly in one testcase test_iov_invalid -> lvec->iov_base. + | Testcase expects errno EFAULT and return code -1, + | but it gets return code 1 and ERRNO is 0 what means success. + + Essentially test case was passing a pointer of -1 which access_ok() + was not catching. It was doing [@addr + @sz <= TASK_SIZE] which would + pass for @addr == -1 + + Fixed that by rewriting as [@addr <= TASK_SIZE - @sz] + + Reported-by: Anton Kolesov + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/include/asm/uaccess.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/include/asm/uaccess.h 2014-04-27 23:38:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/include/asm/uaccess.h 2014-04-28 00:39:32.000000000 +0000 +@@ -43,7 +43,7 @@ + * Because it essentially checks if buffer end is within limit and @len is + * non-ngeative, which implies that buffer start will be within limit too. + * +- * The reason for rewriting being, for majorit yof cases, @len is generally ++ * The reason for rewriting being, for majority of cases, @len is generally + * compile time constant, causing first sub-expression to be compile time + * subsumed. + * +@@ -53,7 +53,7 @@ + * + */ + #define __user_ok(addr, sz) (((sz) <= TASK_SIZE) && \ +- (((addr)+(sz)) <= get_fs())) ++ ((addr) <= (get_fs() - (sz)))) + #define __access_ok(addr, sz) (unlikely(__kernel_ok) || \ + likely(__user_ok((addr), (sz)))) + +Index: linux-3.10-3.10.11/dummy/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1388_a683a93b1ce0b86944a51a1b8f787aa684836edb.txt 2014-04-28 00:39:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.patch --- linux-3.10.11/debian/patches/rpi/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.patch 2014-04-28 00:39:33.000000000 +0000 @@ -0,0 +1,89 @@ +commit 0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23 +Author: Vineet Gupta +Date: Wed Sep 25 16:53:32 2013 +0530 + + ARC: Workaround spinlock livelock in SMP SystemC simulation + + commit 6c00350b573c0bd3635436e43e8696951dd6e1b6 upstream. + + Some ARC SMP systems lack native atomic R-M-W (LLOCK/SCOND) insns and + can only use atomic EX insn (reg with mem) to build higher level R-M-W + primitives. This includes a SystemC based SMP simulation model. + + So rwlocks need to use a protecting spinlock for atomic cmp-n-exchange + operation to update reader(s)/writer count. + + The spinlock operation itself looks as follows: + + mov reg, 1 ; 1=locked, 0=unlocked + retry: + EX reg, [lock] ; load existing, store 1, atomically + BREQ reg, 1, rety ; if already locked, retry + + In single-threaded simulation, SystemC alternates between the 2 cores + with "N" insn each based scheduling. Additionally for insn with global + side effect, such as EX writing to shared mem, a core switch is + enforced too. + + Given that, 2 cores doing a repeated EX on same location, Linux often + got into a livelock e.g. when both cores were fiddling with tasklist + lock (gdbserver / hackbench) for read/write respectively as the + sequence diagram below shows: + + core1 core2 + -------- -------- + 1. spin lock [EX r=0, w=1] - LOCKED + 2. rwlock(Read) - LOCKED + 3. spin unlock [ST 0] - UNLOCKED + spin lock [EX r=0,w=1] - LOCKED + -- resched core 1---- + + 5. spin lock [EX r=1] - ALREADY-LOCKED + + -- resched core 2---- + 6. rwlock(Write) - READER-LOCKED + 7. spin unlock [ST 0] + 8. rwlock failed, retry again + + 9. spin lock [EX r=0, w=1] + -- resched core 1---- + + 10 spinlock locked in #9, retry #5 + 11. spin lock [EX gets 1] + -- resched core 2---- + ... + ... + + The fix was to unlock using the EX insn too (step 7), to trigger another + SystemC scheduling pass which would let core1 proceed, eliding the + livelock. + + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/include/asm/spinlock.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/include/asm/spinlock.h 2014-04-27 23:38:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/include/asm/spinlock.h 2014-04-28 00:39:33.000000000 +0000 +@@ -45,7 +45,14 @@ + + static inline void arch_spin_unlock(arch_spinlock_t *lock) + { +- lock->slock = __ARCH_SPIN_LOCK_UNLOCKED__; ++ unsigned int tmp = __ARCH_SPIN_LOCK_UNLOCKED__; ++ ++ __asm__ __volatile__( ++ " ex %0, [%1] \n" ++ : "+r" (tmp) ++ : "r"(&(lock->slock)) ++ : "memory"); ++ + smp_mb(); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1389_0c06a0a693a5baaeacdb4c9485d5d6d490ea8a23.txt 2014-04-28 00:39:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.patch 2014-04-28 00:39:34.000000000 +0000 @@ -0,0 +1,89 @@ +commit 19a420033da02200c424adfa3a7b9eed6e3a6dc2 +Author: Christian Ruppert +Date: Wed Oct 2 11:13:38 2013 +0200 + + ARC: Fix signal frame management for SA_SIGINFO + + commit 10469350e345599dfef3fa78a7c19fb230e674c1 upstream. + + Previously, when a signal was registered with SA_SIGINFO, parameters 2 + and 3 of the signal handler were written to registers r1 and r2 before + the register set was saved. This led to corruption of these two + registers after returning from the signal handler (the wrong values were + restored). + With this patch, registers are now saved before any parameters are + passed, thus maintaining the processor state from before signal entry. + + Signed-off-by: Christian Ruppert + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/kernel/signal.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/signal.c 2014-04-27 23:38:22.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/signal.c 2014-04-28 00:39:34.000000000 +0000 +@@ -101,7 +101,6 @@ + { + struct rt_sigframe __user *sf; + unsigned int magic; +- int err; + struct pt_regs *regs = current_pt_regs(); + + /* Always make any pending restarted system calls return -EINTR */ +@@ -119,15 +118,16 @@ + if (!access_ok(VERIFY_READ, sf, sizeof(*sf))) + goto badframe; + +- err = restore_usr_regs(regs, sf); +- err |= __get_user(magic, &sf->sigret_magic); +- if (err) ++ if (__get_user(magic, &sf->sigret_magic)) + goto badframe; + + if (unlikely(is_do_ss_needed(magic))) + if (restore_altstack(&sf->uc.uc_stack)) + goto badframe; + ++ if (restore_usr_regs(regs, sf)) ++ goto badframe; ++ + /* Don't restart from sigreturn */ + syscall_wont_restart(regs); + +@@ -191,6 +191,15 @@ + return 1; + + /* ++ * w/o SA_SIGINFO, struct ucontext is partially populated (only ++ * uc_mcontext/uc_sigmask) for kernel's normal user state preservation ++ * during signal handler execution. This works for SA_SIGINFO as well ++ * although the semantics are now overloaded (the same reg state can be ++ * inspected by userland: but are they allowed to fiddle with it ? ++ */ ++ err |= stash_usr_regs(sf, regs, set); ++ ++ /* + * SA_SIGINFO requires 3 args to signal handler: + * #1: sig-no (common to any handler) + * #2: struct siginfo +@@ -213,14 +222,6 @@ + magic = MAGIC_SIGALTSTK; + } + +- /* +- * w/o SA_SIGINFO, struct ucontext is partially populated (only +- * uc_mcontext/uc_sigmask) for kernel's normal user state preservation +- * during signal handler execution. This works for SA_SIGINFO as well +- * although the semantics are now overloaded (the same reg state can be +- * inspected by userland: but are they allowed to fiddle with it ? +- */ +- err |= stash_usr_regs(sf, regs, set); + err |= __put_user(magic, &sf->sigret_magic); + if (err) + return err; +Index: linux-3.10-3.10.11/dummy/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1390_19a420033da02200c424adfa3a7b9eed6e3a6dc2.txt 2014-04-28 00:39:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.patch --- linux-3.10.11/debian/patches/rpi/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.patch 2014-04-28 00:39:35.000000000 +0000 @@ -0,0 +1,50 @@ +commit 4b3ea63f5af44f93bd28d94a93508bbd3186be89 +Author: Vineet Gupta +Date: Thu Oct 10 19:33:57 2013 +0530 + + ARC: Ignore ptrace SETREGSET request for synthetic register "stop_pc" + + commit 5b24282846c064ee90d40fcb3a8f63b8e754fd28 upstream. + + ARCompact TRAP_S insn used for breakpoints, commits before exception is + taken (updating architectural PC). So ptregs->ret contains next-PC and + not the breakpoint PC itself. This is different from other restartable + exceptions such as TLB Miss where ptregs->ret has exact faulting PC. + gdb needs to know exact-PC hence ARC ptrace GETREGSET provides for + @stop_pc which returns ptregs->ret vs. EFA depending on the + situation. + + However, writing stop_pc (SETREGSET request), which updates ptregs->ret + doesn't makes sense stop_pc doesn't always correspond to that reg as + described above. + + This was not an issue so far since user_regs->ret / user_regs->stop_pc + had same value and both writing to ptregs->ret was OK, needless, but NOT + broken, hence not observed. + + With gdb "jump", they diverge, and user_regs->ret updating ptregs is + overwritten immediately with stop_pc, which this patch fixes. + + Reported-by: Anton Kolesov + Signed-off-by: Vineet Gupta + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/kernel/ptrace.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/kernel/ptrace.c 2014-04-27 23:38:22.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/kernel/ptrace.c 2014-04-28 00:39:34.000000000 +0000 +@@ -92,7 +92,7 @@ + REG_IN_CHUNK(scratch, callee, ptregs); /* pt_regs[bta..orig_r8] */ + REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */ + REG_IGNORE_ONE(efa); /* efa update invalid */ +- REG_IN_ONE(stop_pc, &ptregs->ret); /* stop_pc: PC update */ ++ REG_IGNORE_ONE(stop_pc); /* PC updated via @ret */ + + return ret; + } +Index: linux-3.10-3.10.11/dummy/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1391_4b3ea63f5af44f93bd28d94a93508bbd3186be89.txt 2014-04-28 00:39:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.patch --- linux-3.10.11/debian/patches/rpi/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.patch 2014-04-28 00:39:36.000000000 +0000 @@ -0,0 +1,37 @@ +commit e2dcd671f79ade2c764034aeab492ce9a7da6194 +Author: Dan Carpenter +Date: Fri Aug 23 11:40:59 2013 +0300 + + watchdog: ts72xx_wdt: locking bug in ioctl + + commit 8612ed0d97abcf1c016d34755b7cf2060de71963 upstream. + + Calling the WDIOC_GETSTATUS & WDIOC_GETBOOTSTATUS and twice will cause a + interruptible deadlock. + + Signed-off-by: Dan Carpenter + Reviewed-by: Guenter Roeck + Signed-off-by: Wim Van Sebroeck + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/watchdog/ts72xx_wdt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/watchdog/ts72xx_wdt.c 2014-04-27 23:38:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/watchdog/ts72xx_wdt.c 2014-04-28 00:39:35.000000000 +0000 +@@ -310,7 +310,8 @@ + + case WDIOC_GETSTATUS: + case WDIOC_GETBOOTSTATUS: +- return put_user(0, p); ++ error = put_user(0, p); ++ break; + + case WDIOC_KEEPALIVE: + ts72xx_wdt_kick(wdt); +Index: linux-3.10-3.10.11/dummy/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1392_e2dcd671f79ade2c764034aeab492ce9a7da6194.txt 2014-04-28 00:39:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.patch 2014-04-28 00:39:37.000000000 +0000 @@ -0,0 +1,150 @@ +commit bb42ad4e4d2c1c10637368c750a5683100f2ddfa +Author: Ingo Molnar +Date: Thu Oct 10 10:16:30 2013 +0200 + + compiler/gcc4: Add quirk for 'asm goto' miscompilation bug + + commit 3f0116c3238a96bc18ad4b4acefe4e7be32fa861 upstream. + + Fengguang Wu, Oleg Nesterov and Peter Zijlstra tracked down + a kernel crash to a GCC bug: GCC miscompiles certain 'asm goto' + constructs, as outlined here: + + http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 + + Implement a workaround suggested by Jakub Jelinek. + + Reported-and-tested-by: Fengguang Wu + Reported-by: Oleg Nesterov + Reported-by: Peter Zijlstra + Suggested-by: Jakub Jelinek + Reviewed-by: Richard Henderson + Cc: Linus Torvalds + Cc: Andrew Morton + Link: http://lkml.kernel.org/r/20131015062351.GA4666@gmail.com + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -16,7 +16,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("1:\n\t" ++ asm_volatile_goto("1:\n\t" + JUMP_LABEL_NOP "\n\t" + ".pushsection __jump_table, \"aw\"\n\t" + ".word 1b, %l[l_yes], %c0\n\t" +Index: linux-3.10-3.10.11/arch/mips/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/mips/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/mips/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -22,7 +22,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("1:\tnop\n\t" ++ asm_volatile_goto("1:\tnop\n\t" + "nop\n\t" + ".pushsection __jump_table, \"aw\"\n\t" + WORD_INSN " 1b, %l[l_yes], %0\n\t" +Index: linux-3.10-3.10.11/arch/powerpc/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/powerpc/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/powerpc/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -19,7 +19,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("1:\n\t" ++ asm_volatile_goto("1:\n\t" + "nop\n\t" + ".pushsection __jump_table, \"aw\"\n\t" + JUMP_ENTRY_TYPE "1b, %l[l_yes], %c0\n\t" +Index: linux-3.10-3.10.11/arch/s390/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/s390/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/s390/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -15,7 +15,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("0: brcl 0,0\n" ++ asm_volatile_goto("0: brcl 0,0\n" + ".pushsection __jump_table, \"aw\"\n" + ASM_ALIGN "\n" + ASM_PTR " 0b, %l[label], %0\n" +Index: linux-3.10-3.10.11/arch/sparc/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/sparc/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/sparc/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -9,7 +9,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("1:\n\t" ++ asm_volatile_goto("1:\n\t" + "nop\n\t" + "nop\n\t" + ".pushsection __jump_table, \"aw\"\n\t" +Index: linux-3.10-3.10.11/arch/x86/include/asm/cpufeature.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/cpufeature.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/cpufeature.h 2014-04-28 00:39:36.000000000 +0000 +@@ -365,7 +365,7 @@ + static __always_inline __pure bool __static_cpu_has(u16 bit) + { + #if __GNUC__ > 4 || __GNUC_MINOR__ >= 5 +- asm goto("1: jmp %l[t_no]\n" ++ asm_volatile_goto("1: jmp %l[t_no]\n" + "2:\n" + ".section .altinstructions,\"a\"\n" + " .long 1b - .\n" +Index: linux-3.10-3.10.11/arch/x86/include/asm/jump_label.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/jump_label.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/jump_label.h 2014-04-28 00:39:36.000000000 +0000 +@@ -13,7 +13,7 @@ + + static __always_inline bool arch_static_branch(struct static_key *key) + { +- asm goto("1:" ++ asm_volatile_goto("1:" + STATIC_KEY_INITIAL_NOP + ".pushsection __jump_table, \"aw\" \n\t" + _ASM_ALIGN "\n\t" +Index: linux-3.10-3.10.11/include/linux/compiler-gcc4.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/compiler-gcc4.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/compiler-gcc4.h 2014-04-28 00:39:36.000000000 +0000 +@@ -65,6 +65,21 @@ + #define __visible __attribute__((externally_visible)) + #endif + ++/* ++ * GCC 'asm goto' miscompiles certain code sequences: ++ * ++ * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 ++ * ++ * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. ++ * Fixed in GCC 4.8.2 and later versions. ++ * ++ * (asm goto is automatically volatile - the naming reflects this.) ++ */ ++#if GCC_VERSION <= 40801 ++# define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) ++#else ++# define asm_volatile_goto(x...) do { asm goto(x); } while (0) ++#endif + + #ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP + #if GCC_VERSION >= 40400 +Index: linux-3.10-3.10.11/dummy/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1393_bb42ad4e4d2c1c10637368c750a5683100f2ddfa.txt 2014-04-28 00:39:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.patch 2014-04-28 00:39:38.000000000 +0000 @@ -0,0 +1,93 @@ +commit 92a02b07759bb5cbed4a4793019d14247649925c +Author: David Henningsson +Date: Mon Oct 7 10:39:59 2013 +0200 + + ALSA: hda - Fix mono speakers and headset mic on Dell Vostro 5470 + + This is a backport for stable. The original commit SHA is + 338cae565c53755de9f87d6a801517940d2d56f7. + + On this machine, DAC on node 0x03 seems to give mono output. + + Also, it needs additional patches for headset mic support. + It supports CTIA style headsets only. + + Alsa-info available at the bug link below. + + BugLink: https://bugs.launchpad.net/bugs/1236228 + Signed-off-by: David Henningsson + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:20.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:37.000000000 +0000 +@@ -3200,6 +3200,15 @@ + } + } + ++static void alc290_fixup_mono_speakers(struct hda_codec *codec, ++ const struct hda_fixup *fix, int action) ++{ ++ if (action == HDA_FIXUP_ACT_PRE_PROBE) ++ /* Remove DAC node 0x03, as it seems to be ++ giving mono output */ ++ snd_hda_override_wcaps(codec, 0x03, 0); ++} ++ + enum { + ALC269_FIXUP_SONY_VAIO, + ALC275_FIXUP_SONY_VAIO_GPIO2, +@@ -3227,6 +3236,8 @@ + ALC269_FIXUP_PINCFG_NO_HP_TO_LINEOUT, + ALC269_FIXUP_DELL1_MIC_NO_PRESENCE, + ALC269_FIXUP_DELL2_MIC_NO_PRESENCE, ++ ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, ++ ALC290_FIXUP_MONO_SPEAKERS, + ALC269_FIXUP_HEADSET_MODE, + ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC, + ALC269_FIXUP_ASUS_X101_FUNC, +@@ -3413,6 +3424,15 @@ + .chained = true, + .chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC + }, ++ [ALC269_FIXUP_DELL3_MIC_NO_PRESENCE] = { ++ .type = HDA_FIXUP_PINS, ++ .v.pins = (const struct hda_pintbl[]) { ++ { 0x1a, 0x01a1913c }, /* use as headset mic, without its own jack detect */ ++ { } ++ }, ++ .chained = true, ++ .chain_id = ALC269_FIXUP_HEADSET_MODE_NO_HP_MIC ++ }, + [ALC269_FIXUP_HEADSET_MODE] = { + .type = HDA_FIXUP_FUNC, + .v.func = alc_fixup_headset_mode, +@@ -3485,6 +3505,12 @@ + .type = HDA_FIXUP_FUNC, + .v.func = alc269_fixup_limit_int_mic_boost, + }, ++ [ALC290_FIXUP_MONO_SPEAKERS] = { ++ .type = HDA_FIXUP_FUNC, ++ .v.func = alc290_fixup_mono_speakers, ++ .chained = true, ++ .chain_id = ALC269_FIXUP_DELL3_MIC_NO_PRESENCE, ++ }, + }; + + static const struct snd_pci_quirk alc269_fixup_tbl[] = { +@@ -3519,6 +3545,7 @@ + SND_PCI_QUIRK(0x1028, 0x0608, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0609, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x1028, 0x0613, "Dell", ALC269_FIXUP_DELL1_MIC_NO_PRESENCE), ++ SND_PCI_QUIRK(0x1028, 0x0616, "Dell Vostro 5470", ALC290_FIXUP_MONO_SPEAKERS), + SND_PCI_QUIRK(0x103c, 0x1586, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC2), + SND_PCI_QUIRK(0x103c, 0x18e6, "HP", ALC269_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x1973, "HP Pavilion", ALC269_FIXUP_HP_MUTE_LED_MIC1), +Index: linux-3.10-3.10.11/dummy/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1394_92a02b07759bb5cbed4a4793019d14247649925c.txt 2014-04-28 00:39:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.patch 2014-04-28 00:39:39.000000000 +0000 @@ -0,0 +1,98 @@ +commit ad4c3cc41d6248a80231a6b87f1dab31542f011c +Author: Al Viro +Date: Sat Aug 24 12:08:17 2013 -0400 + + cope with potentially long ->d_dname() output for shmem/hugetlb + + commit 118b23022512eb2f41ce42db70dc0568d00be4ba upstream. + + dynamic_dname() is both too much and too little for those - the + output may be well in excess of 64 bytes dynamic_dname() assumes + to be enough (thanks to ashmem feeding really long names to + shmem_file_setup()) and vsnprintf() is an overkill for those + guys. + + Signed-off-by: Al Viro + Cc: Colin Cross + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/dcache.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/dcache.c 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/fs/dcache.c 2014-04-28 00:39:38.000000000 +0000 +@@ -2724,6 +2724,17 @@ + return memcpy(buffer, temp, sz); + } + ++char *simple_dname(struct dentry *dentry, char *buffer, int buflen) ++{ ++ char *end = buffer + buflen; ++ /* these dentries are never renamed, so d_lock is not needed */ ++ if (prepend(&end, &buflen, " (deleted)", 11) || ++ prepend_name(&end, &buflen, &dentry->d_name) || ++ prepend(&end, &buflen, "/", 1)) ++ end = ERR_PTR(-ENAMETOOLONG); ++ return end; ++} ++ + /* + * Write full pathname from the root of the filesystem into the buffer. + */ +Index: linux-3.10-3.10.11/fs/hugetlbfs/inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/hugetlbfs/inode.c 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/fs/hugetlbfs/inode.c 2014-04-28 00:39:38.000000000 +0000 +@@ -916,14 +916,8 @@ + return h - hstates; + } + +-static char *hugetlb_dname(struct dentry *dentry, char *buffer, int buflen) +-{ +- return dynamic_dname(dentry, buffer, buflen, "/%s (deleted)", +- dentry->d_name.name); +-} +- + static struct dentry_operations anon_ops = { +- .d_dname = hugetlb_dname ++ .d_dname = simple_dname + }; + + /* +Index: linux-3.10-3.10.11/include/linux/dcache.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/dcache.h 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/dcache.h 2014-04-28 00:39:38.000000000 +0000 +@@ -332,6 +332,7 @@ + * helper function for dentry_operations.d_dname() members + */ + extern char *dynamic_dname(struct dentry *, char *, int, const char *, ...); ++extern char *simple_dname(struct dentry *, char *, int); + + extern char *__d_path(const struct path *, const struct path *, char *, int); + extern char *d_absolute_path(const struct path *, char *, int); +Index: linux-3.10-3.10.11/mm/shmem.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/shmem.c 2014-04-27 23:38:21.000000000 +0000 ++++ linux-3.10-3.10.11/mm/shmem.c 2014-04-28 00:39:38.000000000 +0000 +@@ -2879,14 +2879,8 @@ + + /* common code */ + +-static char *shmem_dname(struct dentry *dentry, char *buffer, int buflen) +-{ +- return dynamic_dname(dentry, buffer, buflen, "/%s (deleted)", +- dentry->d_name.name); +-} +- + static struct dentry_operations anon_ops = { +- .d_dname = shmem_dname ++ .d_dname = simple_dname + }; + + /** +Index: linux-3.10-3.10.11/dummy/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1395_ad4c3cc41d6248a80231a6b87f1dab31542f011c.txt 2014-04-28 00:39:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.patch 2014-04-28 00:39:40.000000000 +0000 @@ -0,0 +1,100 @@ +commit 27c35c76cdfec3848ef0997605cfc16cb85a290c +Author: Chris Wilson +Date: Sun Sep 29 19:15:07 2013 +0100 + + drm/i915: Only apply DPMS to the encoder if enabled + + commit c9976dcf55c8aaa7037427b239f15e5acfc01a3a upstream. + + The current test for an attached enabled encoder fails if we have + multiple connectors aliased to the same encoder - both connectors + believe they own the enabled encoder and so we attempt to both enable + and disable DPMS on the encoder, leading to hilarity and an OOPs: + + [ 354.803064] WARNING: CPU: 0 PID: 482 at + /usr/src/linux/dist/3.11.2/drivers/gpu/drm/i915/intel_display.c:3869 intel_modeset_check_state+0x764/0x770 [i915]() + [ 354.803064] wrong connector dpms state + [ 354.803084] Modules linked in: nfsd auth_rpcgss oid_registry exportfs nfs lockd sunrpc xt_nat iptable_nat nf_nat_ipv4 nf_nat xt_limit xt_LOG xt_tcpudp nf_conntrack_ipv4 nf_defrag_ipv4 ipt_REJECT ipv6 xt_recent xt_conntrack nf_conntrack iptable_filter ip_tables x_tables snd_hda_codec_realtek snd_hda_codec_hdmi x86_pkg_temp_thermal snd_hda_intel coretemp kvm_intel snd_hda_codec i915 kvm snd_hwdep snd_pcm_oss snd_mixer_oss crc32_pclmul snd_pcm crc32c_intel e1000e intel_agp igb ghash_clmulni_intel intel_gtt aesni_intel cfbfillrect aes_x86_64 cfbimgblt lrw cfbcopyarea drm_kms_helper ptp video thermal processor gf128mul snd_page_alloc drm snd_timer glue_helper 8250_pci snd pps_core ablk_helper agpgart cryptd sg soundcore fan i2c_algo_bit sr_mod thermal_sys 8250 i2c_i801 serial_core + hwmon cdrom i2c_core evdev button + [ 354.803086] CPU: 0 PID: 482 Comm: kworker/0:1 Not tainted 3.11.2 #1 + [ 354.803087] Hardware name: Supermicro X10SAE/X10SAE, BIOS 1.00 05/03/2013 [ 354.803091] Workqueue: events console_callback + [ 354.803092] 0000000000000009 ffff88023611db48 ffffffff814048ac ffff88023611db90 + [ 354.803093] ffff88023611db80 ffffffff8103d4e3 ffff880230d82800 ffff880230f9b800 + [ 354.803094] ffff880230f99000 ffff880230f99448 ffff8802351c0e00 ffff88023611dbe0 + [ 354.803094] Call Trace: + [ 354.803098] [] dump_stack+0x54/0x8d + [ 354.803101] [] warn_slowpath_common+0x73/0x90 + [ 354.803103] [] warn_slowpath_fmt+0x47/0x50 + [ 354.803109] [] ? intel_ddi_connector_get_hw_state+0x5e/0x110 [i915] + [ 354.803114] [] intel_modeset_check_state+0x764/0x770 [i915] + [ 354.803117] [] intel_connector_dpms+0x3b/0x60 [i915] + [ 354.803120] [] drm_fb_helper_dpms.isra.11+0x120/0x160 [drm_kms_helper] + [ 354.803122] [] drm_fb_helper_blank+0x3e/0x80 [drm_kms_helper] + [ 354.803123] [] fb_blank+0x52/0xc0 + [ 354.803125] [] fbcon_blank+0x21b/0x2d0 + [ 354.803127] [] ? update_rq_clock.part.74+0x13/0x30 + [ 354.803129] [] ? lock_timer_base.isra.30+0x26/0x50 + [ 354.803130] [] ? internal_add_timer+0x12/0x40 + [ 354.803131] [] ? mod_timer+0xf8/0x1c0 + [ 354.803133] [] do_unblank_screen+0xa1/0x1c0 + [ 354.803134] [] poke_blanked_console+0xc7/0xd0 + [ 354.803136] [] console_callback+0x13f/0x160 + [ 354.803137] [] process_one_work+0x148/0x3d0 + [ 354.803138] [] worker_thread+0x119/0x3a0 + [ 354.803140] [] ? manage_workers.isra.30+0x2a0/0x2a0 + [ 354.803141] [] kthread+0xbb/0xc0 + [ 354.803142] [] ? kthread_create_on_node+0x120/0x120 + [ 354.803144] [] ret_from_fork+0x7c/0xb0 + [ 354.803145] [] ? kthread_create_on_node+0x120/0x120 + + This regression goes back to the big modeset rework and the conversion + to the new dpms helpers which started with: + + commit 5ab432ef4997ce32c9406721b37ef6e97e57dae1 + Author: Daniel Vetter + Date: Sat Jun 30 08:59:56 2012 +0200 + + drm/i915/hdmi: convert to encoder->disable/enable + + Fixes: igt/kms_flip/dpms-off-confusion + Reported-and-tested-by: Wakko Warner + Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68030 + Link: http://lkml.kernel.org/r/20130928185023.GA21672@animx.eu.org + Signed-off-by: Chris Wilson + [danvet: Add regression citation, mention the igt testcase this fixes + and slap a cc: stable on the patch.] + Signed-off-by: Daniel Vetter + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_display.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/i915/intel_display.c 2014-04-28 00:37:36.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/i915/intel_display.c 2014-04-28 00:39:39.000000000 +0000 +@@ -3946,8 +3946,6 @@ + * consider. */ + void intel_connector_dpms(struct drm_connector *connector, int mode) + { +- struct intel_encoder *encoder = intel_attached_encoder(connector); +- + /* All the simple cases only support two dpms states. */ + if (mode != DRM_MODE_DPMS_ON) + mode = DRM_MODE_DPMS_OFF; +@@ -3958,10 +3956,8 @@ + connector->dpms = mode; + + /* Only need to change hw state when actually enabled */ +- if (encoder->base.crtc) +- intel_encoder_dpms(encoder, mode); +- else +- WARN_ON(encoder->connectors_active != false); ++ if (connector->encoder) ++ intel_encoder_dpms(to_intel_encoder(connector->encoder), mode); + + intel_modeset_check_state(connector->dev); + } +Index: linux-3.10-3.10.11/dummy/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1396_27c35c76cdfec3848ef0997605cfc16cb85a290c.txt 2014-04-28 00:39:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.patch --- linux-3.10.11/debian/patches/rpi/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.patch 2014-04-28 00:39:41.000000000 +0000 @@ -0,0 +1,39 @@ +commit 4fbde5f0aabcd189d03e4e34a52024e70bdd3a73 +Author: Dan Carpenter +Date: Mon Jul 1 19:39:34 2013 +0300 + + drm/radeon: forever loop on error in radeon_do_test_moves() + + commit 89cd67b326fa95872cc2b4524cd807128db6071d upstream. + + The error path does this: + + for (--i; i >= 0; --i) { + + which is a forever loop because "i" is unsigned. + + Signed-off-by: Dan Carpenter + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_test.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/radeon_test.c 2014-04-27 23:38:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/radeon_test.c 2014-04-28 00:39:40.000000000 +0000 +@@ -37,8 +37,8 @@ + struct radeon_bo **gtt_obj = NULL; + struct radeon_fence *fence = NULL; + uint64_t gtt_addr, vram_addr; +- unsigned i, n, size; +- int r, ring; ++ unsigned n, size; ++ int i, r, ring; + + switch (flag) { + case RADEON_TEST_COPY_DMA: +Index: linux-3.10-3.10.11/dummy/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1397_4fbde5f0aabcd189d03e4e34a52024e70bdd3a73.txt 2014-04-28 00:39:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.patch 2014-04-28 00:39:41.000000000 +0000 @@ -0,0 +1,76 @@ +commit 11685f24f1e127ac069bd37cf1b5db559ced1f7e +Author: Alex Deucher +Date: Tue Oct 1 16:40:45 2013 -0400 + + drm/radeon: fix typo in CP DMA register headers + + commit aa3e146d04b6ae37939daeebaec060562b3db559 upstream. + + Wrong bit offset for SRC endian swapping. + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreend.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/evergreend.h 2014-04-28 00:36:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreend.h 2014-04-28 00:39:41.000000000 +0000 +@@ -1104,7 +1104,7 @@ + * 6. COMMAND [29:22] | BYTE_COUNT [20:0] + */ + # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) +- /* 0 - SRC_ADDR ++ /* 0 - DST_ADDR + * 1 - GDS + */ + # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) +@@ -1119,7 +1119,7 @@ + # define PACKET3_CP_DMA_CP_SYNC (1 << 31) + /* COMMAND */ + # define PACKET3_CP_DMA_DIS_WC (1 << 21) +-# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) ++# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600d.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/r600d.h 2014-04-27 23:38:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/r600d.h 2014-04-28 00:39:41.000000000 +0000 +@@ -1259,7 +1259,7 @@ + */ + # define PACKET3_CP_DMA_CP_SYNC (1 << 31) + /* COMMAND */ +-# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) ++# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/sid.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/sid.h 2014-04-28 00:36:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/sid.h 2014-04-28 00:39:41.000000000 +0000 +@@ -928,7 +928,7 @@ + * 6. COMMAND [30:21] | BYTE_COUNT [20:0] + */ + # define PACKET3_CP_DMA_DST_SEL(x) ((x) << 20) +- /* 0 - SRC_ADDR ++ /* 0 - DST_ADDR + * 1 - GDS + */ + # define PACKET3_CP_DMA_ENGINE(x) ((x) << 27) +@@ -943,7 +943,7 @@ + # define PACKET3_CP_DMA_CP_SYNC (1 << 31) + /* COMMAND */ + # define PACKET3_CP_DMA_DIS_WC (1 << 21) +-# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) ++# define PACKET3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 22) + /* 0 - none + * 1 - 8 in 16 + * 2 - 8 in 32 +Index: linux-3.10-3.10.11/dummy/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1398_11685f24f1e127ac069bd37cf1b5db559ced1f7e.txt 2014-04-28 00:39:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.patch --- linux-3.10.11/debian/patches/rpi/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.patch 2014-04-28 00:39:42.000000000 +0000 @@ -0,0 +1,36 @@ +commit 7276dd0042b05ae6409274664ed8747f4dcd2a30 +Author: wojciech kapuscinski +Date: Tue Oct 1 19:54:33 2013 -0400 + + drm/radeon: fix hw contexts for SUMO2 asics + + commit 50b8f5aec04ebec7dbdf2adb17220b9148c99e63 upstream. + + They have 4 rather than 8. + + Fixes: + https://bugs.freedesktop.org/show_bug.cgi?id=63599 + + Signed-off-by: wojciech kapuscinski + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreen.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/evergreen.c 2014-04-28 00:36:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/evergreen.c 2014-04-28 00:39:42.000000000 +0000 +@@ -2990,7 +2990,7 @@ + rdev->config.evergreen.sx_max_export_size = 256; + rdev->config.evergreen.sx_max_export_pos_size = 64; + rdev->config.evergreen.sx_max_export_smx_size = 192; +- rdev->config.evergreen.max_hw_contexts = 8; ++ rdev->config.evergreen.max_hw_contexts = 4; + rdev->config.evergreen.sq_num_cf_insts = 2; + + rdev->config.evergreen.sc_prim_fifo_size = 0x40; +Index: linux-3.10-3.10.11/dummy/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1399_7276dd0042b05ae6409274664ed8747f4dcd2a30.txt 2014-04-28 00:39:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.patch 2014-04-28 00:39:43.000000000 +0000 @@ -0,0 +1,111 @@ +commit 34b2092419a3f73bb69c55247fe71ca4941faad2 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:09 2013 -0700 + + ipc: move rcu lock out of ipc_addid + + commit dbfcd91f06f0e2d5564b2fd184e9c2a43675f9ab upstream. + + This patchset continues the work that began in the sysv ipc semaphore + scaling series, see + + https://lkml.org/lkml/2013/3/20/546 + + Just like semaphores used to be, sysv shared memory and msg queues also + abuse the ipc lock, unnecessarily holding it for operations such as + permission and security checks. + + This patchset mostly deals with mqueues, and while shared mem can be + done in a very similar way, I want to get these patches out in the open + first. It also does some pending cleanups, mostly focused on the two + level locking we have in ipc code, taking care of ipc_addid() and + ipcctl_pre_down_nolock() - yes there are still functions that need to be + updated as well. + + This patch: + + Make all callers explicitly take and release the RCU read lock. + + This addresses the two level locking seen in newary(), newseg() and + newqueue(). For the last two, explicitly unlock the ipc object and the + rcu lock, instead of calling the custom shm_unlock and msg_unlock + functions. The next patch will deal with the open coded locking for + ->perm.lock + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-27 23:38:19.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:42.000000000 +0000 +@@ -199,9 +199,7 @@ + return retval; + } + +- /* +- * ipc_addid() locks msq +- */ ++ /* ipc_addid() locks msq upon success. */ + id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni); + if (id < 0) { + security_msg_queue_free(msq); +@@ -218,7 +216,8 @@ + INIT_LIST_HEAD(&msq->q_receivers); + INIT_LIST_HEAD(&msq->q_senders); + +- msg_unlock(msq); ++ spin_unlock(&msq->q_perm.lock); ++ rcu_read_unlock(); + + return msq->q_perm.id; + } +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-27 23:38:19.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:42.000000000 +0000 +@@ -535,6 +535,7 @@ + shp->shm_nattch = 0; + shp->shm_file = file; + shp->shm_creator = current; ++ + /* + * shmid gets reported as "inode#" in /proc/pid/maps. + * proc-ps tools use this. Changing this will break them. +@@ -543,7 +544,9 @@ + + ns->shm_tot += numpages; + error = shp->shm_perm.id; +- shm_unlock(shp); ++ ++ spin_unlock(&shp->shm_perm.lock); ++ rcu_read_unlock(); + return error; + + no_id: +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-27 23:38:19.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:39:42.000000000 +0000 +@@ -246,9 +246,8 @@ + * is returned. The 'new' entry is returned in a locked state on success. + * On failure the entry is not locked and a negative err-code is returned. + * +- * Called with ipc_ids.rw_mutex held as a writer. ++ * Called with writer ipc_ids.rw_mutex held. + */ +- + int ipc_addid(struct ipc_ids* ids, struct kern_ipc_perm* new, int size) + { + kuid_t euid; +Index: linux-3.10-3.10.11/dummy/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1400_34b2092419a3f73bb69c55247fe71ca4941faad2.txt 2014-04-28 00:39:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.patch 2014-04-28 00:39:44.000000000 +0000 @@ -0,0 +1,67 @@ +commit 9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:10 2013 -0700 + + ipc: introduce ipc object locking helpers + + commit 1ca7003ab41152d673d9e359632283d05294f3d6 upstream. + + Simple helpers around the (kern_ipc_perm *)->lock spinlock. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-27 23:38:19.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:39:43.000000000 +0000 +@@ -159,23 +159,33 @@ + return uid / SEQ_MULTIPLIER != ipcp->seq; + } + +-static inline void ipc_lock_by_ptr(struct kern_ipc_perm *perm) ++static inline void ipc_lock_object(struct kern_ipc_perm *perm) + { +- rcu_read_lock(); + spin_lock(&perm->lock); + } + +-static inline void ipc_unlock(struct kern_ipc_perm *perm) ++static inline void ipc_unlock_object(struct kern_ipc_perm *perm) + { + spin_unlock(&perm->lock); +- rcu_read_unlock(); + } + +-static inline void ipc_lock_object(struct kern_ipc_perm *perm) ++static inline void ipc_assert_locked_object(struct kern_ipc_perm *perm) + { ++ assert_spin_locked(&perm->lock); ++} ++ ++static inline void ipc_lock_by_ptr(struct kern_ipc_perm *perm) ++{ ++ rcu_read_lock(); + spin_lock(&perm->lock); + } + ++static inline void ipc_unlock(struct kern_ipc_perm *perm) ++{ ++ spin_unlock(&perm->lock); ++ rcu_read_unlock(); ++} ++ + struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids, int id); + struct kern_ipc_perm *ipc_obtain_object_check(struct ipc_ids *ids, int id); + int ipcget(struct ipc_namespace *ns, struct ipc_ids *ids, +Index: linux-3.10-3.10.11/dummy/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1401_9f7b399c9dbc71bd09d5b45242a6fb8fbf2650a3.txt 2014-04-28 00:39:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.patch 2014-04-28 00:39:45.000000000 +0000 @@ -0,0 +1,143 @@ +commit 115d40dbef93b70e6f32732b0fdd5903c1f7fce4 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:11 2013 -0700 + + ipc: close open coded spin lock calls + + commit cf9d5d78d05bca96df7618dfc3a5ee4414dcae58 upstream. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:44.000000000 +0000 +@@ -216,7 +216,7 @@ + INIT_LIST_HEAD(&msq->q_receivers); + INIT_LIST_HEAD(&msq->q_senders); + +- spin_unlock(&msq->q_perm.lock); ++ ipc_unlock_object(&msq->q_perm); + rcu_read_unlock(); + + return msq->q_perm.id; +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-27 23:38:18.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:44.000000000 +0000 +@@ -246,7 +246,7 @@ + * their critical section while the array lock is held. + */ + lock_array: +- spin_lock(&sma->sem_perm.lock); ++ ipc_lock_object(&sma->sem_perm); + for (i = 0; i < sma->sem_nsems; i++) { + struct sem *sem = sma->sem_base + i; + spin_unlock_wait(&sem->lock); +@@ -259,7 +259,7 @@ + static inline void sem_unlock(struct sem_array *sma, int locknum) + { + if (locknum == -1) { +- spin_unlock(&sma->sem_perm.lock); ++ ipc_unlock_object(&sma->sem_perm); + } else { + struct sem *sem = sma->sem_base + locknum; + spin_unlock(&sem->lock); +@@ -872,7 +872,7 @@ + int i; + + /* Free the existing undo structures for this semaphore set. */ +- assert_spin_locked(&sma->sem_perm.lock); ++ ipc_assert_locked_object(&sma->sem_perm); + list_for_each_entry_safe(un, tu, &sma->list_id, list_id) { + list_del(&un->list_id); + spin_lock(&un->ulp->lock); +@@ -1070,7 +1070,7 @@ + + curr = &sma->sem_base[semnum]; + +- assert_spin_locked(&sma->sem_perm.lock); ++ ipc_assert_locked_object(&sma->sem_perm); + list_for_each_entry(un, &sma->list_id, list_id) + un->semadj[semnum] = 0; + +@@ -1199,7 +1199,7 @@ + for (i = 0; i < nsems; i++) + sma->sem_base[i].semval = sem_io[i]; + +- assert_spin_locked(&sma->sem_perm.lock); ++ ipc_assert_locked_object(&sma->sem_perm); + list_for_each_entry(un, &sma->list_id, list_id) { + for (i = 0; i < nsems; i++) + un->semadj[i] = 0; +@@ -1496,7 +1496,7 @@ + new->semid = semid; + assert_spin_locked(&ulp->lock); + list_add_rcu(&new->list_proc, &ulp->list_proc); +- assert_spin_locked(&sma->sem_perm.lock); ++ ipc_assert_locked_object(&sma->sem_perm); + list_add(&new->list_id, &sma->list_id); + un = new; + +@@ -1833,7 +1833,7 @@ + } + + /* remove un from the linked lists */ +- assert_spin_locked(&sma->sem_perm.lock); ++ ipc_assert_locked_object(&sma->sem_perm); + list_del(&un->list_id); + + spin_lock(&ulp->lock); +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:44.000000000 +0000 +@@ -141,7 +141,7 @@ + static inline void shm_lock_by_ptr(struct shmid_kernel *ipcp) + { + rcu_read_lock(); +- spin_lock(&ipcp->shm_perm.lock); ++ ipc_lock_object(&ipcp->shm_perm); + } + + static inline struct shmid_kernel *shm_lock_check(struct ipc_namespace *ns, +@@ -545,7 +545,7 @@ + ns->shm_tot += numpages; + error = shp->shm_perm.id; + +- spin_unlock(&shp->shm_perm.lock); ++ ipc_unlock_object(&shp->shm_perm); + rcu_read_unlock(); + return error; + +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:39:43.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:39:44.000000000 +0000 +@@ -177,12 +177,12 @@ + static inline void ipc_lock_by_ptr(struct kern_ipc_perm *perm) + { + rcu_read_lock(); +- spin_lock(&perm->lock); ++ ipc_lock_object(perm); + } + + static inline void ipc_unlock(struct kern_ipc_perm *perm) + { +- spin_unlock(&perm->lock); ++ ipc_unlock_object(perm); + rcu_read_unlock(); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1402_115d40dbef93b70e6f32732b0fdd5903c1f7fce4.txt 2014-04-28 00:39:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.patch --- linux-3.10.11/debian/patches/rpi/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.patch 2014-04-28 00:39:46.000000000 +0000 @@ -0,0 +1,254 @@ +commit ac9bc6e396285ab732dd869c3edb353662134022 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:12 2013 -0700 + + ipc: move locking out of ipcctl_pre_down_nolock + + commit 7b4cc5d8411bd4e9d61d8714f53859740cf830c2 upstream. + + This function currently acquires both the rw_mutex and the rcu lock on + successful lookups, leaving the callers to explicitly unlock them, + creating another two level locking situation. + + Make the callers (including those that still use ipcctl_pre_down()) + explicitly lock and unlock the rwsem and rcu lock. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:45.000000000 +0000 +@@ -407,31 +407,38 @@ + return -EFAULT; + } + ++ down_write(&msg_ids(ns).rw_mutex); ++ rcu_read_lock(); ++ + ipcp = ipcctl_pre_down(ns, &msg_ids(ns), msqid, cmd, + &msqid64.msg_perm, msqid64.msg_qbytes); +- if (IS_ERR(ipcp)) +- return PTR_ERR(ipcp); ++ if (IS_ERR(ipcp)) { ++ err = PTR_ERR(ipcp); ++ /* the ipc lock is not held upon failure */ ++ goto out_unlock1; ++ } + + msq = container_of(ipcp, struct msg_queue, q_perm); + + err = security_msg_queue_msgctl(msq, cmd); + if (err) +- goto out_unlock; ++ goto out_unlock0; + + switch (cmd) { + case IPC_RMID: ++ /* freeque unlocks the ipc object and rcu */ + freeque(ns, ipcp); + goto out_up; + case IPC_SET: + if (msqid64.msg_qbytes > ns->msg_ctlmnb && + !capable(CAP_SYS_RESOURCE)) { + err = -EPERM; +- goto out_unlock; ++ goto out_unlock0; + } + + err = ipc_update_perm(&msqid64.msg_perm, ipcp); + if (err) +- goto out_unlock; ++ goto out_unlock0; + + msq->q_qbytes = msqid64.msg_qbytes; + +@@ -448,8 +455,11 @@ + default: + err = -EINVAL; + } +-out_unlock: +- msg_unlock(msq); ++ ++out_unlock0: ++ ipc_unlock_object(&msq->q_perm); ++out_unlock1: ++ rcu_read_unlock(); + out_up: + up_write(&msg_ids(ns).rw_mutex); + return err; +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:45.000000000 +0000 +@@ -1289,39 +1289,44 @@ + return -EFAULT; + } + ++ down_write(&sem_ids(ns).rw_mutex); ++ rcu_read_lock(); ++ + ipcp = ipcctl_pre_down_nolock(ns, &sem_ids(ns), semid, cmd, + &semid64.sem_perm, 0); +- if (IS_ERR(ipcp)) +- return PTR_ERR(ipcp); ++ if (IS_ERR(ipcp)) { ++ err = PTR_ERR(ipcp); ++ /* the ipc lock is not held upon failure */ ++ goto out_unlock1; ++ } + + sma = container_of(ipcp, struct sem_array, sem_perm); + + err = security_sem_semctl(sma, cmd); +- if (err) { +- rcu_read_unlock(); +- goto out_up; +- } ++ if (err) ++ goto out_unlock1; + +- switch(cmd){ ++ switch (cmd) { + case IPC_RMID: + sem_lock(sma, NULL, -1); ++ /* freeary unlocks the ipc object and rcu */ + freeary(ns, ipcp); + goto out_up; + case IPC_SET: + sem_lock(sma, NULL, -1); + err = ipc_update_perm(&semid64.sem_perm, ipcp); + if (err) +- goto out_unlock; ++ goto out_unlock0; + sma->sem_ctime = get_seconds(); + break; + default: +- rcu_read_unlock(); + err = -EINVAL; +- goto out_up; ++ goto out_unlock1; + } + +-out_unlock: ++out_unlock0: + sem_unlock(sma, -1); ++out_unlock1: + rcu_read_unlock(); + out_up: + up_write(&sem_ids(ns).rw_mutex); +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:45.000000000 +0000 +@@ -757,31 +757,42 @@ + return -EFAULT; + } + ++ down_write(&shm_ids(ns).rw_mutex); ++ rcu_read_lock(); ++ + ipcp = ipcctl_pre_down(ns, &shm_ids(ns), shmid, cmd, + &shmid64.shm_perm, 0); +- if (IS_ERR(ipcp)) +- return PTR_ERR(ipcp); ++ if (IS_ERR(ipcp)) { ++ err = PTR_ERR(ipcp); ++ /* the ipc lock is not held upon failure */ ++ goto out_unlock1; ++ } + + shp = container_of(ipcp, struct shmid_kernel, shm_perm); + + err = security_shm_shmctl(shp, cmd); + if (err) +- goto out_unlock; ++ goto out_unlock0; ++ + switch (cmd) { + case IPC_RMID: ++ /* do_shm_rmid unlocks the ipc object and rcu */ + do_shm_rmid(ns, ipcp); + goto out_up; + case IPC_SET: + err = ipc_update_perm(&shmid64.shm_perm, ipcp); + if (err) +- goto out_unlock; ++ goto out_unlock0; + shp->shm_ctim = get_seconds(); + break; + default: + err = -EINVAL; + } +-out_unlock: +- shm_unlock(shp); ++ ++out_unlock0: ++ ipc_unlock_object(&shp->shm_perm); ++out_unlock1: ++ rcu_read_unlock(); + out_up: + up_write(&shm_ids(ns).rw_mutex); + return err; +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:39:42.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:39:45.000000000 +0000 +@@ -746,8 +746,10 @@ + * It must be called without any lock held and + * - retrieves the ipc with the given id in the given table. + * - performs some audit and permission check, depending on the given cmd +- * - returns the ipc with both ipc and rw_mutex locks held in case of success ++ * - returns the ipc with the ipc lock held in case of success + * or an err-code without any lock held otherwise. ++ * ++ * Call holding the both the rw_mutex and the rcu read lock. + */ + struct kern_ipc_perm *ipcctl_pre_down(struct ipc_namespace *ns, + struct ipc_ids *ids, int id, int cmd, +@@ -772,13 +774,10 @@ + int err = -EPERM; + struct kern_ipc_perm *ipcp; + +- down_write(&ids->rw_mutex); +- rcu_read_lock(); +- + ipcp = ipc_obtain_object_check(ids, id); + if (IS_ERR(ipcp)) { + err = PTR_ERR(ipcp); +- goto out_up; ++ goto err; + } + + audit_ipc_obj(ipcp); +@@ -789,16 +788,8 @@ + euid = current_euid(); + if (uid_eq(euid, ipcp->cuid) || uid_eq(euid, ipcp->uid) || + ns_capable(ns->user_ns, CAP_SYS_ADMIN)) +- return ipcp; +- +-out_up: +- /* +- * Unsuccessful lookup, unlock and return +- * the corresponding error. +- */ +- rcu_read_unlock(); +- up_write(&ids->rw_mutex); +- ++ return ipcp; /* successful lookup */ ++err: + return ERR_PTR(err); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1403_ac9bc6e396285ab732dd869c3edb353662134022.txt 2014-04-28 00:39:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.patch --- linux-3.10.11/debian/patches/rpi/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.patch 2014-04-28 00:39:47.000000000 +0000 @@ -0,0 +1,77 @@ +commit f880aca02ec5531b5ce62b10dae6311001a34804 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:13 2013 -0700 + + ipc,msg: shorten critical region in msgctl_down + + commit 15724ecb7e9bab35fc694c666ad563adba820cc3 upstream. + + Instead of holding the ipc lock for the entire function, use the + ipcctl_pre_down_nolock and only acquire the lock for specific commands: + RMID and SET. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:46.000000000 +0000 +@@ -410,11 +410,10 @@ + down_write(&msg_ids(ns).rw_mutex); + rcu_read_lock(); + +- ipcp = ipcctl_pre_down(ns, &msg_ids(ns), msqid, cmd, +- &msqid64.msg_perm, msqid64.msg_qbytes); ++ ipcp = ipcctl_pre_down_nolock(ns, &msg_ids(ns), msqid, cmd, ++ &msqid64.msg_perm, msqid64.msg_qbytes); + if (IS_ERR(ipcp)) { + err = PTR_ERR(ipcp); +- /* the ipc lock is not held upon failure */ + goto out_unlock1; + } + +@@ -422,10 +421,11 @@ + + err = security_msg_queue_msgctl(msq, cmd); + if (err) +- goto out_unlock0; ++ goto out_unlock1; + + switch (cmd) { + case IPC_RMID: ++ ipc_lock_object(&msq->q_perm); + /* freeque unlocks the ipc object and rcu */ + freeque(ns, ipcp); + goto out_up; +@@ -433,9 +433,10 @@ + if (msqid64.msg_qbytes > ns->msg_ctlmnb && + !capable(CAP_SYS_RESOURCE)) { + err = -EPERM; +- goto out_unlock0; ++ goto out_unlock1; + } + ++ ipc_lock_object(&msq->q_perm); + err = ipc_update_perm(&msqid64.msg_perm, ipcp); + if (err) + goto out_unlock0; +@@ -454,6 +455,7 @@ + break; + default: + err = -EINVAL; ++ goto out_unlock1; + } + + out_unlock0: +Index: linux-3.10-3.10.11/dummy/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1404_f880aca02ec5531b5ce62b10dae6311001a34804.txt 2014-04-28 00:39:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.patch 2014-04-28 00:39:48.000000000 +0000 @@ -0,0 +1,120 @@ +commit f1f7913980afb02f8dee9ee190b29230e69cf7a4 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:14 2013 -0700 + + ipc,msg: introduce msgctl_nolock + + commit 2cafed30f150f7314f98717b372df8173516cae0 upstream. + + Similar to semctl, when calling msgctl, the *_INFO and *_STAT commands + can be performed without acquiring the ipc object. + + Add a msgctl_nolock() function and move the logic of *_INFO and *_STAT + out of msgctl(). This change still takes the lock and it will be + properly lockless in the next patch + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:46.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:47.000000000 +0000 +@@ -467,17 +467,11 @@ + return err; + } + +-SYSCALL_DEFINE3(msgctl, int, msqid, int, cmd, struct msqid_ds __user *, buf) ++static int msgctl_nolock(struct ipc_namespace *ns, int msqid, ++ int cmd, int version, void __user *buf) + { ++ int err; + struct msg_queue *msq; +- int err, version; +- struct ipc_namespace *ns; +- +- if (msqid < 0 || cmd < 0) +- return -EINVAL; +- +- version = ipc_parse_version(&cmd); +- ns = current->nsproxy->ipc_ns; + + switch (cmd) { + case IPC_INFO: +@@ -488,6 +482,7 @@ + + if (!buf) + return -EFAULT; ++ + /* + * We must not return kernel stack data. + * due to padding, it's not enough +@@ -519,7 +514,8 @@ + return -EFAULT; + return (max_id < 0) ? 0 : max_id; + } +- case MSG_STAT: /* msqid is an index rather than a msg queue id */ ++ ++ case MSG_STAT: + case IPC_STAT: + { + struct msqid64_ds tbuf; +@@ -563,19 +559,42 @@ + return -EFAULT; + return success_return; + } +- case IPC_SET: +- case IPC_RMID: +- err = msgctl_down(ns, msqid, cmd, buf, version); +- return err; ++ + default: +- return -EINVAL; ++ return -EINVAL; + } + ++ return err; + out_unlock: + msg_unlock(msq); + return err; + } + ++SYSCALL_DEFINE3(msgctl, int, msqid, int, cmd, struct msqid_ds __user *, buf) ++{ ++ int version; ++ struct ipc_namespace *ns; ++ ++ if (msqid < 0 || cmd < 0) ++ return -EINVAL; ++ ++ version = ipc_parse_version(&cmd); ++ ns = current->nsproxy->ipc_ns; ++ ++ switch (cmd) { ++ case IPC_INFO: ++ case MSG_INFO: ++ case MSG_STAT: /* msqid is an index rather than a msg queue id */ ++ case IPC_STAT: ++ return msgctl_nolock(ns, msqid, cmd, version, buf); ++ case IPC_SET: ++ case IPC_RMID: ++ return msgctl_down(ns, msqid, cmd, buf, version); ++ default: ++ return -EINVAL; ++ } ++} ++ + static int testmsg(struct msg_msg *msg, long type, int mode) + { + switch(mode) +Index: linux-3.10-3.10.11/dummy/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1405_f1f7913980afb02f8dee9ee190b29230e69cf7a4.txt 2014-04-28 00:39:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.patch 2014-04-28 00:39:48.000000000 +0000 @@ -0,0 +1,59 @@ +commit 15d49ab4814e9b3e6b340ec073a3ce95862643a9 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:15 2013 -0700 + + ipc,msg: introduce lockless functions to obtain the ipc object + + commit a5001a0d9768568de5d613c3b3a5b9c7721299da upstream. + + Add msq_obtain_object() and msq_obtain_object_check(), which will allow + us to get the ipc object without acquiring the lock. Just as with + semaphores, these functions are basically wrappers around + ipc_obtain_object*(). + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:47.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:48.000000000 +0000 +@@ -166,6 +166,27 @@ + return container_of(ipcp, struct msg_queue, q_perm); + } + ++static inline struct msg_queue *msq_obtain_object(struct ipc_namespace *ns, int id) ++{ ++ struct kern_ipc_perm *ipcp = ipc_obtain_object(&msg_ids(ns), id); ++ ++ if (IS_ERR(ipcp)) ++ return ERR_CAST(ipcp); ++ ++ return container_of(ipcp, struct msg_queue, q_perm); ++} ++ ++static inline struct msg_queue *msq_obtain_object_check(struct ipc_namespace *ns, ++ int id) ++{ ++ struct kern_ipc_perm *ipcp = ipc_obtain_object_check(&msg_ids(ns), id); ++ ++ if (IS_ERR(ipcp)) ++ return ERR_CAST(ipcp); ++ ++ return container_of(ipcp, struct msg_queue, q_perm); ++} ++ + static inline void msg_rmid(struct ipc_namespace *ns, struct msg_queue *s) + { + ipc_rmid(&msg_ids(ns), &s->q_perm); +Index: linux-3.10-3.10.11/dummy/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1406_15d49ab4814e9b3e6b340ec073a3ce95862643a9.txt 2014-04-28 00:39:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.patch --- linux-3.10.11/debian/patches/rpi/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.patch 2014-04-28 00:39:49.000000000 +0000 @@ -0,0 +1,92 @@ +commit 107b413cd33374f8eb3a0075d0237e1076e0a752 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:16 2013 -0700 + + ipc,msg: make msgctl_nolock lockless + + commit ac0ba20ea6f2201a1589d6dc26ad1a4f0f967bb8 upstream. + + While the INFO cmd doesn't take the ipc lock, the STAT commands do + acquire it unnecessarily. We can do the permissions and security checks + only holding the rcu lock. + + This function now mimics semctl_nolock(). + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:48.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:49.000000000 +0000 +@@ -545,17 +545,25 @@ + if (!buf) + return -EFAULT; + ++ memset(&tbuf, 0, sizeof(tbuf)); ++ ++ rcu_read_lock(); + if (cmd == MSG_STAT) { +- msq = msg_lock(ns, msqid); +- if (IS_ERR(msq)) +- return PTR_ERR(msq); ++ msq = msq_obtain_object(ns, msqid); ++ if (IS_ERR(msq)) { ++ err = PTR_ERR(msq); ++ goto out_unlock; ++ } + success_return = msq->q_perm.id; + } else { +- msq = msg_lock_check(ns, msqid); +- if (IS_ERR(msq)) +- return PTR_ERR(msq); ++ msq = msq_obtain_object_check(ns, msqid); ++ if (IS_ERR(msq)) { ++ err = PTR_ERR(msq); ++ goto out_unlock; ++ } + success_return = 0; + } ++ + err = -EACCES; + if (ipcperms(ns, &msq->q_perm, S_IRUGO)) + goto out_unlock; +@@ -564,8 +572,6 @@ + if (err) + goto out_unlock; + +- memset(&tbuf, 0, sizeof(tbuf)); +- + kernel_to_ipc64_perm(&msq->q_perm, &tbuf.msg_perm); + tbuf.msg_stime = msq->q_stime; + tbuf.msg_rtime = msq->q_rtime; +@@ -575,7 +581,8 @@ + tbuf.msg_qbytes = msq->q_qbytes; + tbuf.msg_lspid = msq->q_lspid; + tbuf.msg_lrpid = msq->q_lrpid; +- msg_unlock(msq); ++ rcu_read_unlock(); ++ + if (copy_msqid_to_user(buf, &tbuf, version)) + return -EFAULT; + return success_return; +@@ -587,7 +594,7 @@ + + return err; + out_unlock: +- msg_unlock(msq); ++ rcu_read_unlock(); + return err; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1407_107b413cd33374f8eb3a0075d0237e1076e0a752.txt 2014-04-28 00:39:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.patch 2014-04-28 00:39:50.000000000 +0000 @@ -0,0 +1,120 @@ +commit 8398fe18b48b6e4ac671898cd9b7327954b4ba5f +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:17 2013 -0700 + + ipc,msg: shorten critical region in msgsnd + + commit 3dd1f784ed6603d7ab1043e51e6371235edf2313 upstream. + + do_msgsnd() is another function that does too many things with the ipc + object lock acquired. Take it only when needed when actually updating + msq. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:49.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:49.000000000 +0000 +@@ -698,10 +698,11 @@ + msg->m_type = mtype; + msg->m_ts = msgsz; + +- msq = msg_lock_check(ns, msqid); ++ rcu_read_lock(); ++ msq = msq_obtain_object_check(ns, msqid); + if (IS_ERR(msq)) { + err = PTR_ERR(msq); +- goto out_free; ++ goto out_unlock1; + } + + for (;;) { +@@ -709,11 +710,11 @@ + + err = -EACCES; + if (ipcperms(ns, &msq->q_perm, S_IWUGO)) +- goto out_unlock_free; ++ goto out_unlock1; + + err = security_msg_queue_msgsnd(msq, msg, msgflg); + if (err) +- goto out_unlock_free; ++ goto out_unlock1; + + if (msgsz + msq->q_cbytes <= msq->q_qbytes && + 1 + msq->q_qnum <= msq->q_qbytes) { +@@ -723,32 +724,41 @@ + /* queue full, wait: */ + if (msgflg & IPC_NOWAIT) { + err = -EAGAIN; +- goto out_unlock_free; ++ goto out_unlock1; + } ++ ++ ipc_lock_object(&msq->q_perm); + ss_add(msq, &s); + + if (!ipc_rcu_getref(msq)) { + err = -EIDRM; +- goto out_unlock_free; ++ goto out_unlock0; + } + +- msg_unlock(msq); ++ ipc_unlock_object(&msq->q_perm); ++ rcu_read_unlock(); + schedule(); + +- ipc_lock_by_ptr(&msq->q_perm); ++ rcu_read_lock(); ++ ipc_lock_object(&msq->q_perm); ++ + ipc_rcu_putref(msq); + if (msq->q_perm.deleted) { + err = -EIDRM; +- goto out_unlock_free; ++ goto out_unlock0; + } ++ + ss_del(&s); + + if (signal_pending(current)) { + err = -ERESTARTNOHAND; +- goto out_unlock_free; ++ goto out_unlock0; + } ++ ++ ipc_unlock_object(&msq->q_perm); + } + ++ ipc_lock_object(&msq->q_perm); + msq->q_lspid = task_tgid_vnr(current); + msq->q_stime = get_seconds(); + +@@ -764,9 +774,10 @@ + err = 0; + msg = NULL; + +-out_unlock_free: +- msg_unlock(msq); +-out_free: ++out_unlock0: ++ ipc_unlock_object(&msq->q_perm); ++out_unlock1: ++ rcu_read_unlock(); + if (msg != NULL) + free_msg(msg); + return err; +Index: linux-3.10-3.10.11/dummy/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1408_8398fe18b48b6e4ac671898cd9b7327954b4ba5f.txt 2014-04-28 00:39:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.patch --- linux-3.10.11/debian/patches/rpi/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.patch 2014-04-28 00:39:50.000000000 +0000 @@ -0,0 +1,186 @@ +commit 7b527fcdfdc6c4edfc6dad3bae254679ed63fc55 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:18 2013 -0700 + + ipc,msg: shorten critical region in msgrcv + + commit 41a0d523d0f626e9da0dc01de47f1b89058033cf upstream. + + do_msgrcv() is the last msg queue function that abuses the ipc lock Take + it only when needed when actually updating msq. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Tested-by: Sedat Dilek + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:49.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:50.000000000 +0000 +@@ -886,21 +886,19 @@ + return found ?: ERR_PTR(-EAGAIN); + } + +- +-long do_msgrcv(int msqid, void __user *buf, size_t bufsz, long msgtyp, +- int msgflg, ++long do_msgrcv(int msqid, void __user *buf, size_t bufsz, long msgtyp, int msgflg, + long (*msg_handler)(void __user *, struct msg_msg *, size_t)) + { +- struct msg_queue *msq; +- struct msg_msg *msg; + int mode; ++ struct msg_queue *msq; + struct ipc_namespace *ns; +- struct msg_msg *copy = NULL; ++ struct msg_msg *msg, *copy = NULL; + + ns = current->nsproxy->ipc_ns; + + if (msqid < 0 || (long) bufsz < 0) + return -EINVAL; ++ + if (msgflg & MSG_COPY) { + copy = prepare_copy(buf, min_t(size_t, bufsz, ns->msg_ctlmax)); + if (IS_ERR(copy)) +@@ -908,8 +906,10 @@ + } + mode = convert_mode(&msgtyp, msgflg); + +- msq = msg_lock_check(ns, msqid); ++ rcu_read_lock(); ++ msq = msq_obtain_object_check(ns, msqid); + if (IS_ERR(msq)) { ++ rcu_read_unlock(); + free_copy(copy); + return PTR_ERR(msq); + } +@@ -919,10 +919,10 @@ + + msg = ERR_PTR(-EACCES); + if (ipcperms(ns, &msq->q_perm, S_IRUGO)) +- goto out_unlock; ++ goto out_unlock1; + ++ ipc_lock_object(&msq->q_perm); + msg = find_msg(msq, &msgtyp, mode); +- + if (!IS_ERR(msg)) { + /* + * Found a suitable message. +@@ -930,7 +930,7 @@ + */ + if ((bufsz < msg->m_ts) && !(msgflg & MSG_NOERROR)) { + msg = ERR_PTR(-E2BIG); +- goto out_unlock; ++ goto out_unlock0; + } + /* + * If we are copying, then do not unlink message and do +@@ -938,8 +938,9 @@ + */ + if (msgflg & MSG_COPY) { + msg = copy_msg(msg, copy); +- goto out_unlock; ++ goto out_unlock0; + } ++ + list_del(&msg->m_list); + msq->q_qnum--; + msq->q_rtime = get_seconds(); +@@ -948,14 +949,16 @@ + atomic_sub(msg->m_ts, &ns->msg_bytes); + atomic_dec(&ns->msg_hdrs); + ss_wakeup(&msq->q_senders, 0); +- msg_unlock(msq); +- break; ++ ++ goto out_unlock0; + } ++ + /* No message waiting. Wait for a message */ + if (msgflg & IPC_NOWAIT) { + msg = ERR_PTR(-ENOMSG); +- goto out_unlock; ++ goto out_unlock0; + } ++ + list_add_tail(&msr_d.r_list, &msq->q_receivers); + msr_d.r_tsk = current; + msr_d.r_msgtype = msgtyp; +@@ -966,8 +969,9 @@ + msr_d.r_maxsize = bufsz; + msr_d.r_msg = ERR_PTR(-EAGAIN); + current->state = TASK_INTERRUPTIBLE; +- msg_unlock(msq); + ++ ipc_unlock_object(&msq->q_perm); ++ rcu_read_unlock(); + schedule(); + + /* Lockless receive, part 1: +@@ -978,7 +982,7 @@ + * Prior to destruction, expunge_all(-EIRDM) changes r_msg. + * Thus if r_msg is -EAGAIN, then the queue not yet destroyed. + * rcu_read_lock() prevents preemption between reading r_msg +- * and the spin_lock() inside ipc_lock_by_ptr(). ++ * and acquiring the q_perm.lock in ipc_lock_object(). + */ + rcu_read_lock(); + +@@ -997,32 +1001,34 @@ + * If there is a message or an error then accept it without + * locking. + */ +- if (msg != ERR_PTR(-EAGAIN)) { +- rcu_read_unlock(); +- break; +- } ++ if (msg != ERR_PTR(-EAGAIN)) ++ goto out_unlock1; + + /* Lockless receive, part 3: + * Acquire the queue spinlock. + */ +- ipc_lock_by_ptr(&msq->q_perm); +- rcu_read_unlock(); ++ ipc_lock_object(&msq->q_perm); + + /* Lockless receive, part 4: + * Repeat test after acquiring the spinlock. + */ + msg = (struct msg_msg*)msr_d.r_msg; + if (msg != ERR_PTR(-EAGAIN)) +- goto out_unlock; ++ goto out_unlock0; + + list_del(&msr_d.r_list); + if (signal_pending(current)) { + msg = ERR_PTR(-ERESTARTNOHAND); +-out_unlock: +- msg_unlock(msq); +- break; ++ goto out_unlock0; + } ++ ++ ipc_unlock_object(&msq->q_perm); + } ++ ++out_unlock0: ++ ipc_unlock_object(&msq->q_perm); ++out_unlock1: ++ rcu_read_unlock(); + if (IS_ERR(msg)) { + free_copy(copy); + return PTR_ERR(msg); +Index: linux-3.10-3.10.11/dummy/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1409_7b527fcdfdc6c4edfc6dad3bae254679ed63fc55.txt 2014-04-28 00:39:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.patch --- linux-3.10.11/debian/patches/rpi/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.patch 2014-04-28 00:39:51.000000000 +0000 @@ -0,0 +1,73 @@ +commit 5cd37e921753eeff777a522aa78b0cc5a6ff7596 +Author: Davidlohr Bueso +Date: Mon Jul 8 16:01:19 2013 -0700 + + ipc: remove unused functions + + commit 9ad66ae65fc8d3e7e3344310fb0aa835910264fe upstream. + + We can now drop the msg_lock and msg_lock_check functions along with a + bogus comment introduced previously in semctl_down. + + Signed-off-by: Davidlohr Bueso + Cc: Andi Kleen + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:50.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:51.000000000 +0000 +@@ -141,31 +141,6 @@ + IPC_MSG_IDS, sysvipc_msg_proc_show); + } + +-/* +- * msg_lock_(check_) routines are called in the paths where the rw_mutex +- * is not held. +- */ +-static inline struct msg_queue *msg_lock(struct ipc_namespace *ns, int id) +-{ +- struct kern_ipc_perm *ipcp = ipc_lock(&msg_ids(ns), id); +- +- if (IS_ERR(ipcp)) +- return (struct msg_queue *)ipcp; +- +- return container_of(ipcp, struct msg_queue, q_perm); +-} +- +-static inline struct msg_queue *msg_lock_check(struct ipc_namespace *ns, +- int id) +-{ +- struct kern_ipc_perm *ipcp = ipc_lock_check(&msg_ids(ns), id); +- +- if (IS_ERR(ipcp)) +- return (struct msg_queue *)ipcp; +- +- return container_of(ipcp, struct msg_queue, q_perm); +-} +- + static inline struct msg_queue *msq_obtain_object(struct ipc_namespace *ns, int id) + { + struct kern_ipc_perm *ipcp = ipc_obtain_object(&msg_ids(ns), id); +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:51.000000000 +0000 +@@ -1296,7 +1296,6 @@ + &semid64.sem_perm, 0); + if (IS_ERR(ipcp)) { + err = PTR_ERR(ipcp); +- /* the ipc lock is not held upon failure */ + goto out_unlock1; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1410_5cd37e921753eeff777a522aa78b0cc5a6ff7596.txt 2014-04-28 00:39:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.patch --- linux-3.10.11/debian/patches/rpi/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.patch 2014-04-28 00:39:52.000000000 +0000 @@ -0,0 +1,74 @@ +commit 49f7f31ab27de9bcaf2d12e1d0196400dadf6add +Author: Manfred Spraul +Date: Mon Jul 8 16:01:20 2013 -0700 + + ipc/util.c, ipc_rcu_alloc: cacheline align allocation + + commit 196aa0132fc7261f34b10ae1bfb44abc1bc69b3c upstream. + + Enforce that ipc_rcu_alloc returns a cacheline aligned pointer on SMP. + + Rationale: + + The SysV sem code tries to move the main spinlock into a seperate + cacheline (____cacheline_aligned_in_smp). This works only if + ipc_rcu_alloc returns cacheline aligned pointers. vmalloc and kmalloc + return cacheline algined pointers, the implementation of ipc_rcu_alloc + breaks that. + + [akpm@linux-foundation.org: coding-style fixes] + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:39:51.000000000 +0000 +@@ -468,9 +468,7 @@ + struct ipc_rcu { + struct rcu_head rcu; + atomic_t refcount; +- /* "void *" makes sure alignment of following data is sane. */ +- void *data[0]; +-}; ++} ____cacheline_aligned_in_smp; + + /** + * ipc_rcu_alloc - allocate ipc and rcu space +@@ -488,12 +486,14 @@ + if (unlikely(!out)) + return NULL; + atomic_set(&out->refcount, 1); +- return out->data; ++ return out + 1; + } + + int ipc_rcu_getref(void *ptr) + { +- return atomic_inc_not_zero(&container_of(ptr, struct ipc_rcu, data)->refcount); ++ struct ipc_rcu *p = ((struct ipc_rcu *)ptr) - 1; ++ ++ return atomic_inc_not_zero(&p->refcount); + } + + /** +@@ -507,7 +507,7 @@ + + void ipc_rcu_putref(void *ptr) + { +- struct ipc_rcu *p = container_of(ptr, struct ipc_rcu, data); ++ struct ipc_rcu *p = ((struct ipc_rcu *)ptr) - 1; + + if (!atomic_dec_and_test(&p->refcount)) + return; +Index: linux-3.10-3.10.11/dummy/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1411_49f7f31ab27de9bcaf2d12e1d0196400dadf6add.txt 2014-04-28 00:39:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.patch 2014-04-28 00:39:53.000000000 +0000 @@ -0,0 +1,57 @@ +commit 0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6 +Author: Manfred Spraul +Date: Mon Jul 8 16:01:22 2013 -0700 + + ipc/sem.c: cacheline align the semaphore structures + + commit f5c936c0f267ec58641451cf8b8d39b4c207ee4d upstream. + + As now each semaphore has its own spinlock and parallel operations are + possible, give each semaphore its own cacheline. + + On a i3 laptop, this gives up to 28% better performance: + + #semscale 10 | grep "interleave 2" + - before: + Cpus 1, interleave 2 delay 0: 36109234 in 10 secs + Cpus 2, interleave 2 delay 0: 55276317 in 10 secs + Cpus 3, interleave 2 delay 0: 62411025 in 10 secs + Cpus 4, interleave 2 delay 0: 81963928 in 10 secs + + -after: + Cpus 1, interleave 2 delay 0: 35527306 in 10 secs + Cpus 2, interleave 2 delay 0: 70922909 in 10 secs <<< + 28% + Cpus 3, interleave 2 delay 0: 80518538 in 10 secs + Cpus 4, interleave 2 delay 0: 89115148 in 10 secs <<< + 8.7% + + i3, with 2 cores and with hyperthreading enabled. Interleave 2 in order + use first the full cores. HT partially hides the delay from cacheline + trashing, thus the improvement is "only" 8.7% if 4 threads are running. + + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:52.000000000 +0000 +@@ -96,7 +96,7 @@ + int sempid; /* pid of last operation */ + spinlock_t lock; /* spinlock for fine-grained semtimedop */ + struct list_head sem_pending; /* pending single-sop operations */ +-}; ++} ____cacheline_aligned_in_smp; + + /* One queue for each sleeping process in the system. */ + struct sem_queue { +Index: linux-3.10-3.10.11/dummy/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1412_0824e44c3f0aa0d5dc3d06910a09b9bbaa53d2f6.txt 2014-04-28 00:39:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.patch 2014-04-28 00:39:53.000000000 +0000 @@ -0,0 +1,412 @@ +commit ab63bc97faaa8e26cef944eda370cf83ca818ca5 +Author: Manfred Spraul +Date: Mon Jul 8 16:01:23 2013 -0700 + + ipc/sem: separate wait-for-zero and alter tasks into seperate queues + + commit 1a82e9e1d0f1b45f47a97c9e2349020536ff8987 upstream. + + Introduce separate queues for operations that do not modify the + semaphore values. Advantages: + + - Simpler logic in check_restart(). + - Faster update_queue(): Right now, all wait-for-zero operations are + always tested, even if the semaphore value is not 0. + - wait-for-zero gets again priority, as in linux <=3.0.9 + + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/sem.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/sem.h 2014-04-27 23:38:15.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/sem.h 2014-04-28 00:39:53.000000000 +0000 +@@ -15,7 +15,10 @@ + time_t sem_otime; /* last semop time */ + time_t sem_ctime; /* last change time */ + struct sem *sem_base; /* ptr to first semaphore in array */ +- struct list_head sem_pending; /* pending operations to be processed */ ++ struct list_head pending_alter; /* pending operations */ ++ /* that alter the array */ ++ struct list_head pending_const; /* pending complex operations */ ++ /* that do not alter semvals */ + struct list_head list_id; /* undo requests on this array */ + int sem_nsems; /* no. of semaphores in array */ + int complex_count; /* pending complex operations */ +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:52.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:53.000000000 +0000 +@@ -95,7 +95,10 @@ + int semval; /* current value */ + int sempid; /* pid of last operation */ + spinlock_t lock; /* spinlock for fine-grained semtimedop */ +- struct list_head sem_pending; /* pending single-sop operations */ ++ struct list_head pending_alter; /* pending single-sop operations */ ++ /* that alter the semaphore */ ++ struct list_head pending_const; /* pending single-sop operations */ ++ /* that do not alter the semaphore*/ + } ____cacheline_aligned_in_smp; + + /* One queue for each sleeping process in the system. */ +@@ -152,7 +155,7 @@ + /* + * linked list protection: + * sem_undo.id_next, +- * sem_array.sem_pending{,last}, ++ * sem_array.pending{_alter,_cont}, + * sem_array.sem_undo: sem_lock() for read/write + * sem_undo.proc_next: only "current" is allowed to read/write that field. + * +@@ -337,7 +340,7 @@ + * Without the check/retry algorithm a lockless wakeup is possible: + * - queue.status is initialized to -EINTR before blocking. + * - wakeup is performed by +- * * unlinking the queue entry from sma->sem_pending ++ * * unlinking the queue entry from the pending list + * * setting queue.status to IN_WAKEUP + * This is the notification for the blocked thread that a + * result value is imminent. +@@ -418,12 +421,14 @@ + sma->sem_base = (struct sem *) &sma[1]; + + for (i = 0; i < nsems; i++) { +- INIT_LIST_HEAD(&sma->sem_base[i].sem_pending); ++ INIT_LIST_HEAD(&sma->sem_base[i].pending_alter); ++ INIT_LIST_HEAD(&sma->sem_base[i].pending_const); + spin_lock_init(&sma->sem_base[i].lock); + } + + sma->complex_count = 0; +- INIT_LIST_HEAD(&sma->sem_pending); ++ INIT_LIST_HEAD(&sma->pending_alter); ++ INIT_LIST_HEAD(&sma->pending_const); + INIT_LIST_HEAD(&sma->list_id); + sma->sem_nsems = nsems; + sma->sem_ctime = get_seconds(); +@@ -609,60 +614,132 @@ + * update_queue is O(N^2) when it restarts scanning the whole queue of + * waiting operations. Therefore this function checks if the restart is + * really necessary. It is called after a previously waiting operation +- * was completed. ++ * modified the array. ++ * Note that wait-for-zero operations are handled without restart. + */ + static int check_restart(struct sem_array *sma, struct sem_queue *q) + { +- struct sem *curr; +- struct sem_queue *h; +- +- /* if the operation didn't modify the array, then no restart */ +- if (q->alter == 0) +- return 0; +- +- /* pending complex operations are too difficult to analyse */ +- if (sma->complex_count) ++ /* pending complex alter operations are too difficult to analyse */ ++ if (!list_empty(&sma->pending_alter)) + return 1; + + /* we were a sleeping complex operation. Too difficult */ + if (q->nsops > 1) + return 1; + +- curr = sma->sem_base + q->sops[0].sem_num; ++ /* It is impossible that someone waits for the new value: ++ * - complex operations always restart. ++ * - wait-for-zero are handled seperately. ++ * - q is a previously sleeping simple operation that ++ * altered the array. It must be a decrement, because ++ * simple increments never sleep. ++ * - If there are older (higher priority) decrements ++ * in the queue, then they have observed the original ++ * semval value and couldn't proceed. The operation ++ * decremented to value - thus they won't proceed either. ++ */ ++ return 0; ++} + +- /* No-one waits on this queue */ +- if (list_empty(&curr->sem_pending)) +- return 0; ++/** ++ * wake_const_ops(sma, semnum, pt) - Wake up non-alter tasks ++ * @sma: semaphore array. ++ * @semnum: semaphore that was modified. ++ * @pt: list head for the tasks that must be woken up. ++ * ++ * wake_const_ops must be called after a semaphore in a semaphore array ++ * was set to 0. If complex const operations are pending, wake_const_ops must ++ * be called with semnum = -1, as well as with the number of each modified ++ * semaphore. ++ * The tasks that must be woken up are added to @pt. The return code ++ * is stored in q->pid. ++ * The function returns 1 if at least one operation was completed successfully. ++ */ ++static int wake_const_ops(struct sem_array *sma, int semnum, ++ struct list_head *pt) ++{ ++ struct sem_queue *q; ++ struct list_head *walk; ++ struct list_head *pending_list; ++ int semop_completed = 0; ++ ++ if (semnum == -1) ++ pending_list = &sma->pending_const; ++ else ++ pending_list = &sma->sem_base[semnum].pending_const; ++ ++ walk = pending_list->next; ++ while (walk != pending_list) { ++ int error; ++ ++ q = container_of(walk, struct sem_queue, list); ++ walk = walk->next; ++ ++ error = try_atomic_semop(sma, q->sops, q->nsops, ++ q->undo, q->pid); ++ ++ if (error <= 0) { ++ /* operation completed, remove from queue & wakeup */ ++ ++ unlink_queue(sma, q); ++ ++ wake_up_sem_queue_prepare(pt, q, error); ++ if (error == 0) ++ semop_completed = 1; ++ } ++ } ++ return semop_completed; ++} + +- /* the new semaphore value */ +- if (curr->semval) { +- /* It is impossible that someone waits for the new value: +- * - q is a previously sleeping simple operation that +- * altered the array. It must be a decrement, because +- * simple increments never sleep. +- * - The value is not 0, thus wait-for-zero won't proceed. +- * - If there are older (higher priority) decrements +- * in the queue, then they have observed the original +- * semval value and couldn't proceed. The operation +- * decremented to value - thus they won't proceed either. ++/** ++ * do_smart_wakeup_zero(sma, sops, nsops, pt) - wakeup all wait for zero tasks ++ * @sma: semaphore array ++ * @sops: operations that were performed ++ * @nsops: number of operations ++ * @pt: list head of the tasks that must be woken up. ++ * ++ * do_smart_wakeup_zero() checks all required queue for wait-for-zero ++ * operations, based on the actual changes that were performed on the ++ * semaphore array. ++ * The function returns 1 if at least one operation was completed successfully. ++ */ ++static int do_smart_wakeup_zero(struct sem_array *sma, struct sembuf *sops, ++ int nsops, struct list_head *pt) ++{ ++ int i; ++ int semop_completed = 0; ++ int got_zero = 0; ++ ++ /* first: the per-semaphore queues, if known */ ++ if (sops) { ++ for (i = 0; i < nsops; i++) { ++ int num = sops[i].sem_num; ++ ++ if (sma->sem_base[num].semval == 0) { ++ got_zero = 1; ++ semop_completed |= wake_const_ops(sma, num, pt); ++ } ++ } ++ } else { ++ /* ++ * No sops means modified semaphores not known. ++ * Assume all were changed. + */ +- BUG_ON(q->sops[0].sem_op >= 0); +- return 0; ++ for (i = 0; i < sma->sem_nsems; i++) { ++ if (sma->sem_base[i].semval == 0) { ++ got_zero = 1; ++ semop_completed |= wake_const_ops(sma, i, pt); ++ } ++ } + } + /* +- * semval is 0. Check if there are wait-for-zero semops. +- * They must be the first entries in the per-semaphore queue ++ * If one of the modified semaphores got 0, ++ * then check the global queue, too. + */ +- h = list_first_entry(&curr->sem_pending, struct sem_queue, list); +- BUG_ON(h->nsops != 1); +- BUG_ON(h->sops[0].sem_num != q->sops[0].sem_num); ++ if (got_zero) ++ semop_completed |= wake_const_ops(sma, -1, pt); + +- /* Yes, there is a wait-for-zero semop. Restart */ +- if (h->sops[0].sem_op == 0) +- return 1; +- +- /* Again - no-one is waiting for the new value. */ +- return 0; ++ return semop_completed; + } + + +@@ -678,6 +755,8 @@ + * semaphore. + * The tasks that must be woken up are added to @pt. The return code + * is stored in q->pid. ++ * The function internally checks if const operations can now succeed. ++ * + * The function return 1 if at least one semop was completed successfully. + */ + static int update_queue(struct sem_array *sma, int semnum, struct list_head *pt) +@@ -688,9 +767,9 @@ + int semop_completed = 0; + + if (semnum == -1) +- pending_list = &sma->sem_pending; ++ pending_list = &sma->pending_alter; + else +- pending_list = &sma->sem_base[semnum].sem_pending; ++ pending_list = &sma->sem_base[semnum].pending_alter; + + again: + walk = pending_list->next; +@@ -702,13 +781,12 @@ + + /* If we are scanning the single sop, per-semaphore list of + * one semaphore and that semaphore is 0, then it is not +- * necessary to scan the "alter" entries: simple increments ++ * necessary to scan further: simple increments + * that affect only one entry succeed immediately and cannot + * be in the per semaphore pending queue, and decrements + * cannot be successful if the value is already 0. + */ +- if (semnum != -1 && sma->sem_base[semnum].semval == 0 && +- q->alter) ++ if (semnum != -1 && sma->sem_base[semnum].semval == 0) + break; + + error = try_atomic_semop(sma, q->sops, q->nsops, +@@ -724,6 +802,7 @@ + restart = 0; + } else { + semop_completed = 1; ++ do_smart_wakeup_zero(sma, q->sops, q->nsops, pt); + restart = check_restart(sma, q); + } + +@@ -742,8 +821,8 @@ + * @otime: force setting otime + * @pt: list head of the tasks that must be woken up. + * +- * do_smart_update() does the required called to update_queue, based on the +- * actual changes that were performed on the semaphore array. ++ * do_smart_update() does the required calls to update_queue and wakeup_zero, ++ * based on the actual changes that were performed on the semaphore array. + * Note that the function does not do the actual wake-up: the caller is + * responsible for calling wake_up_sem_queue_do(@pt). + * It is safe to perform this call after dropping all locks. +@@ -754,6 +833,8 @@ + int i; + int progress; + ++ otime |= do_smart_wakeup_zero(sma, sops, nsops, pt); ++ + progress = 1; + retry_global: + if (sma->complex_count) { +@@ -813,14 +894,14 @@ + struct sem_queue * q; + + semncnt = 0; +- list_for_each_entry(q, &sma->sem_base[semnum].sem_pending, list) { ++ list_for_each_entry(q, &sma->sem_base[semnum].pending_alter, list) { + struct sembuf * sops = q->sops; + BUG_ON(sops->sem_num != semnum); + if ((sops->sem_op < 0) && !(sops->sem_flg & IPC_NOWAIT)) + semncnt++; + } + +- list_for_each_entry(q, &sma->sem_pending, list) { ++ list_for_each_entry(q, &sma->pending_alter, list) { + struct sembuf * sops = q->sops; + int nsops = q->nsops; + int i; +@@ -839,14 +920,14 @@ + struct sem_queue * q; + + semzcnt = 0; +- list_for_each_entry(q, &sma->sem_base[semnum].sem_pending, list) { ++ list_for_each_entry(q, &sma->sem_base[semnum].pending_const, list) { + struct sembuf * sops = q->sops; + BUG_ON(sops->sem_num != semnum); + if ((sops->sem_op == 0) && !(sops->sem_flg & IPC_NOWAIT)) + semzcnt++; + } + +- list_for_each_entry(q, &sma->sem_pending, list) { ++ list_for_each_entry(q, &sma->pending_const, list) { + struct sembuf * sops = q->sops; + int nsops = q->nsops; + int i; +@@ -884,13 +965,22 @@ + + /* Wake up all pending processes and let them fail with EIDRM. */ + INIT_LIST_HEAD(&tasks); +- list_for_each_entry_safe(q, tq, &sma->sem_pending, list) { ++ list_for_each_entry_safe(q, tq, &sma->pending_const, list) { ++ unlink_queue(sma, q); ++ wake_up_sem_queue_prepare(&tasks, q, -EIDRM); ++ } ++ ++ list_for_each_entry_safe(q, tq, &sma->pending_alter, list) { + unlink_queue(sma, q); + wake_up_sem_queue_prepare(&tasks, q, -EIDRM); + } + for (i = 0; i < sma->sem_nsems; i++) { + struct sem *sem = sma->sem_base + i; +- list_for_each_entry_safe(q, tq, &sem->sem_pending, list) { ++ list_for_each_entry_safe(q, tq, &sem->pending_const, list) { ++ unlink_queue(sma, q); ++ wake_up_sem_queue_prepare(&tasks, q, -EIDRM); ++ } ++ list_for_each_entry_safe(q, tq, &sem->pending_alter, list) { + unlink_queue(sma, q); + wake_up_sem_queue_prepare(&tasks, q, -EIDRM); + } +@@ -1658,14 +1748,15 @@ + curr = &sma->sem_base[sops->sem_num]; + + if (alter) +- list_add_tail(&queue.list, &curr->sem_pending); ++ list_add_tail(&queue.list, &curr->pending_alter); + else +- list_add(&queue.list, &curr->sem_pending); ++ list_add_tail(&queue.list, &curr->pending_const); + } else { + if (alter) +- list_add_tail(&queue.list, &sma->sem_pending); ++ list_add_tail(&queue.list, &sma->pending_alter); + else +- list_add(&queue.list, &sma->sem_pending); ++ list_add_tail(&queue.list, &sma->pending_const); ++ + sma->complex_count++; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1413_ab63bc97faaa8e26cef944eda370cf83ca818ca5.txt 2014-04-28 00:39:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.patch --- linux-3.10.11/debian/patches/rpi/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.patch 2014-04-28 00:39:54.000000000 +0000 @@ -0,0 +1,208 @@ +commit e5639c5288c125607fc45fb727c72a97d01cd868 +Author: Manfred Spraul +Date: Mon Jul 8 16:01:24 2013 -0700 + + ipc/sem.c: always use only one queue for alter operations + + commit f269f40ad5aeee229ed70044926f44318abe41ef upstream. + + There are two places that can contain alter operations: + - the global queue: sma->pending_alter + - the per-semaphore queues: sma->sem_base[].pending_alter. + + Since one of the queues must be processed first, this causes an odd + priorization of the wakeups: complex operations have priority over + simple ops. + + The patch restores the behavior of linux <=3.0.9: The longest waiting + operation has the highest priority. + + This is done by using only one queue: + - if there are complex ops, then sma->pending_alter is used. + - otherwise, the per-semaphore queues are used. + + As a side effect, do_smart_update_queue() becomes much simpler: no more + goto logic. + + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:54.000000000 +0000 +@@ -192,6 +192,53 @@ + IPC_SEM_IDS, sysvipc_sem_proc_show); + } + ++/** ++ * unmerge_queues - unmerge queues, if possible. ++ * @sma: semaphore array ++ * ++ * The function unmerges the wait queues if complex_count is 0. ++ * It must be called prior to dropping the global semaphore array lock. ++ */ ++static void unmerge_queues(struct sem_array *sma) ++{ ++ struct sem_queue *q, *tq; ++ ++ /* complex operations still around? */ ++ if (sma->complex_count) ++ return; ++ /* ++ * We will switch back to simple mode. ++ * Move all pending operation back into the per-semaphore ++ * queues. ++ */ ++ list_for_each_entry_safe(q, tq, &sma->pending_alter, list) { ++ struct sem *curr; ++ curr = &sma->sem_base[q->sops[0].sem_num]; ++ ++ list_add_tail(&q->list, &curr->pending_alter); ++ } ++ INIT_LIST_HEAD(&sma->pending_alter); ++} ++ ++/** ++ * merge_queues - Merge single semop queues into global queue ++ * @sma: semaphore array ++ * ++ * This function merges all per-semaphore queues into the global queue. ++ * It is necessary to achieve FIFO ordering for the pending single-sop ++ * operations when a multi-semop operation must sleep. ++ * Only the alter operations must be moved, the const operations can stay. ++ */ ++static void merge_queues(struct sem_array *sma) ++{ ++ int i; ++ for (i = 0; i < sma->sem_nsems; i++) { ++ struct sem *sem = sma->sem_base + i; ++ ++ list_splice_init(&sem->pending_alter, &sma->pending_alter); ++ } ++} ++ + /* + * If the request contains only one semaphore operation, and there are + * no complex transactions pending, lock only the semaphore involved. +@@ -262,6 +309,7 @@ + static inline void sem_unlock(struct sem_array *sma, int locknum) + { + if (locknum == -1) { ++ unmerge_queues(sma); + ipc_unlock_object(&sma->sem_perm); + } else { + struct sem *sem = sma->sem_base + locknum; +@@ -831,49 +879,38 @@ + int otime, struct list_head *pt) + { + int i; +- int progress; + + otime |= do_smart_wakeup_zero(sma, sops, nsops, pt); + +- progress = 1; +-retry_global: +- if (sma->complex_count) { +- if (update_queue(sma, -1, pt)) { +- progress = 1; +- otime = 1; +- sops = NULL; +- } +- } +- if (!progress) +- goto done; +- +- if (!sops) { +- /* No semops; something special is going on. */ +- for (i = 0; i < sma->sem_nsems; i++) { +- if (update_queue(sma, i, pt)) { +- otime = 1; +- progress = 1; ++ if (!list_empty(&sma->pending_alter)) { ++ /* semaphore array uses the global queue - just process it. */ ++ otime |= update_queue(sma, -1, pt); ++ } else { ++ if (!sops) { ++ /* ++ * No sops, thus the modified semaphores are not ++ * known. Check all. ++ */ ++ for (i = 0; i < sma->sem_nsems; i++) ++ otime |= update_queue(sma, i, pt); ++ } else { ++ /* ++ * Check the semaphores that were increased: ++ * - No complex ops, thus all sleeping ops are ++ * decrease. ++ * - if we decreased the value, then any sleeping ++ * semaphore ops wont be able to run: If the ++ * previous value was too small, then the new ++ * value will be too small, too. ++ */ ++ for (i = 0; i < nsops; i++) { ++ if (sops[i].sem_op > 0) { ++ otime |= update_queue(sma, ++ sops[i].sem_num, pt); ++ } + } + } +- goto done_checkretry; +- } +- +- /* Check the semaphores that were modified. */ +- for (i = 0; i < nsops; i++) { +- if (sops[i].sem_op > 0 || +- (sops[i].sem_op < 0 && +- sma->sem_base[sops[i].sem_num].semval == 0)) +- if (update_queue(sma, sops[i].sem_num, pt)) { +- otime = 1; +- progress = 1; +- } +- } +-done_checkretry: +- if (progress) { +- progress = 0; +- goto retry_global; + } +-done: + if (otime) + sma->sem_otime = get_seconds(); + } +@@ -1747,11 +1784,22 @@ + struct sem *curr; + curr = &sma->sem_base[sops->sem_num]; + +- if (alter) +- list_add_tail(&queue.list, &curr->pending_alter); +- else ++ if (alter) { ++ if (sma->complex_count) { ++ list_add_tail(&queue.list, ++ &sma->pending_alter); ++ } else { ++ ++ list_add_tail(&queue.list, ++ &curr->pending_alter); ++ } ++ } else { + list_add_tail(&queue.list, &curr->pending_const); ++ } + } else { ++ if (!sma->complex_count) ++ merge_queues(sma); ++ + if (alter) + list_add_tail(&queue.list, &sma->pending_alter); + else +Index: linux-3.10-3.10.11/dummy/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1414_e5639c5288c125607fc45fb727c72a97d01cd868.txt 2014-04-28 00:39:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.patch --- linux-3.10.11/debian/patches/rpi/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.patch 2014-04-28 00:39:55.000000000 +0000 @@ -0,0 +1,127 @@ +commit bf6830ad689a462a61c7e9191dc44fc45e205165 +Author: Manfred Spraul +Date: Mon Jul 8 16:01:25 2013 -0700 + + ipc/sem.c: replace shared sem_otime with per-semaphore value + + commit d12e1e50e47e0900dbbf52237b7e171f4f15ea1e upstream. + + sem_otime contains the time of the last semaphore operation that + completed successfully. Every operation updates this value, thus access + from multiple cpus can cause thrashing. + + Therefore the patch replaces the variable with a per-semaphore variable. + The per-array sem_otime is only calculated when required. + + No performance improvement on a single-socket i3 - only important for + larger systems. + + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/sem.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/sem.h 2014-04-28 00:39:53.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/sem.h 2014-04-28 00:39:54.000000000 +0000 +@@ -12,7 +12,6 @@ + struct sem_array { + struct kern_ipc_perm ____cacheline_aligned_in_smp + sem_perm; /* permissions .. see ipc.h */ +- time_t sem_otime; /* last semop time */ + time_t sem_ctime; /* last change time */ + struct sem *sem_base; /* ptr to first semaphore in array */ + struct list_head pending_alter; /* pending operations */ +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:54.000000000 +0000 +@@ -99,6 +99,7 @@ + /* that alter the semaphore */ + struct list_head pending_const; /* pending single-sop operations */ + /* that do not alter the semaphore*/ ++ time_t sem_otime; /* candidate for sem_otime */ + } ____cacheline_aligned_in_smp; + + /* One queue for each sleeping process in the system. */ +@@ -911,8 +912,14 @@ + } + } + } +- if (otime) +- sma->sem_otime = get_seconds(); ++ if (otime) { ++ if (sops == NULL) { ++ sma->sem_base[0].sem_otime = get_seconds(); ++ } else { ++ sma->sem_base[sops[0].sem_num].sem_otime = ++ get_seconds(); ++ } ++ } + } + + +@@ -1058,6 +1065,21 @@ + } + } + ++static time_t get_semotime(struct sem_array *sma) ++{ ++ int i; ++ time_t res; ++ ++ res = sma->sem_base[0].sem_otime; ++ for (i = 1; i < sma->sem_nsems; i++) { ++ time_t to = sma->sem_base[i].sem_otime; ++ ++ if (to > res) ++ res = to; ++ } ++ return res; ++} ++ + static int semctl_nolock(struct ipc_namespace *ns, int semid, + int cmd, int version, void __user *p) + { +@@ -1131,9 +1153,9 @@ + goto out_unlock; + + kernel_to_ipc64_perm(&sma->sem_perm, &tbuf.sem_perm); +- tbuf.sem_otime = sma->sem_otime; +- tbuf.sem_ctime = sma->sem_ctime; +- tbuf.sem_nsems = sma->sem_nsems; ++ tbuf.sem_otime = get_semotime(sma); ++ tbuf.sem_ctime = sma->sem_ctime; ++ tbuf.sem_nsems = sma->sem_nsems; + rcu_read_unlock(); + if (copy_semid_to_user(p, &tbuf, version)) + return -EFAULT; +@@ -2025,6 +2047,9 @@ + { + struct user_namespace *user_ns = seq_user_ns(s); + struct sem_array *sma = it; ++ time_t sem_otime; ++ ++ sem_otime = get_semotime(sma); + + return seq_printf(s, + "%10d %10d %4o %10u %5u %5u %5u %5u %10lu %10lu\n", +@@ -2036,7 +2061,7 @@ + from_kgid_munged(user_ns, sma->sem_perm.gid), + from_kuid_munged(user_ns, sma->sem_perm.cuid), + from_kgid_munged(user_ns, sma->sem_perm.cgid), +- sma->sem_otime, ++ sem_otime, + sma->sem_ctime); + } + #endif +Index: linux-3.10-3.10.11/dummy/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1415_bf6830ad689a462a61c7e9191dc44fc45e205165.txt 2014-04-28 00:39:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.patch 2014-04-28 00:39:55.000000000 +0000 @@ -0,0 +1,116 @@ +commit b56e88e25e1d576619343e97fdb6cbe11035cf6d +Author: Manfred Spraul +Date: Mon Jul 8 16:01:26 2013 -0700 + + ipc/sem.c: rename try_atomic_semop() to perform_atomic_semop(), docu update + + commit 758a6ba39ef6df4cdc615e5edd7bd86eab81a5f7 upstream. + + Cleanup: Some minor points that I noticed while writing the previous + patches + + 1) The name try_atomic_semop() is misleading: The function performs the + operation (if it is possible). + + 2) Some documentation updates. + + No real code change, a rename and documentation changes. + + Signed-off-by: Manfred Spraul + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:54.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:39:55.000000000 +0000 +@@ -154,12 +154,15 @@ + #define SEMOPM_FAST 64 /* ~ 372 bytes on stack */ + + /* +- * linked list protection: ++ * Locking: + * sem_undo.id_next, ++ * sem_array.complex_count, + * sem_array.pending{_alter,_cont}, +- * sem_array.sem_undo: sem_lock() for read/write ++ * sem_array.sem_undo: global sem_lock() for read/write + * sem_undo.proc_next: only "current" is allowed to read/write that field. + * ++ * sem_array.sem_base[i].pending_{const,alter}: ++ * global or semaphore sem_lock() for read/write + */ + + #define sc_semmsl sem_ctls[0] +@@ -536,12 +539,19 @@ + return ipcget(ns, &sem_ids(ns), &sem_ops, &sem_params); + } + +-/* +- * Determine whether a sequence of semaphore operations would succeed +- * all at once. Return 0 if yes, 1 if need to sleep, else return error code. ++/** perform_atomic_semop - Perform (if possible) a semaphore operation ++ * @sma: semaphore array ++ * @sops: array with operations that should be checked ++ * @nsems: number of sops ++ * @un: undo array ++ * @pid: pid that did the change ++ * ++ * Returns 0 if the operation was possible. ++ * Returns 1 if the operation is impossible, the caller must sleep. ++ * Negative values are error codes. + */ + +-static int try_atomic_semop (struct sem_array * sma, struct sembuf * sops, ++static int perform_atomic_semop(struct sem_array *sma, struct sembuf *sops, + int nsops, struct sem_undo *un, int pid) + { + int result, sem_op; +@@ -724,8 +734,8 @@ + q = container_of(walk, struct sem_queue, list); + walk = walk->next; + +- error = try_atomic_semop(sma, q->sops, q->nsops, +- q->undo, q->pid); ++ error = perform_atomic_semop(sma, q->sops, q->nsops, ++ q->undo, q->pid); + + if (error <= 0) { + /* operation completed, remove from queue & wakeup */ +@@ -838,7 +848,7 @@ + if (semnum != -1 && sma->sem_base[semnum].semval == 0) + break; + +- error = try_atomic_semop(sma, q->sops, q->nsops, ++ error = perform_atomic_semop(sma, q->sops, q->nsops, + q->undo, q->pid); + + /* Does q->sleeper still need to sleep? */ +@@ -1686,7 +1696,6 @@ + return error; + } + +- + SYSCALL_DEFINE4(semtimedop, int, semid, struct sembuf __user *, tsops, + unsigned, nsops, const struct timespec __user *, timeout) + { +@@ -1784,7 +1793,8 @@ + if (un && un->semid == -1) + goto out_unlock_free; + +- error = try_atomic_semop (sma, sops, nsops, un, task_tgid_vnr(current)); ++ error = perform_atomic_semop(sma, sops, nsops, un, ++ task_tgid_vnr(current)); + if (error <= 0) { + if (alter && error == 0) + do_smart_update(sma, sops, nsops, 1, &tasks); +Index: linux-3.10-3.10.11/dummy/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1416_b56e88e25e1d576619343e97fdb6cbe11035cf6d.txt 2014-04-28 00:39:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.patch 2014-04-28 00:39:56.000000000 +0000 @@ -0,0 +1,94 @@ +commit 11ce33923261281f406a99ee345ffc5f53aec2c8 +Author: Manfred Spraul +Date: Tue Sep 3 16:00:08 2013 +0200 + + ipc/msg.c: Fix lost wakeup in msgsnd(). + + commit bebcb928c820d0ee83aca4b192adc195e43e66a2 upstream. + + The check if the queue is full and adding current to the wait queue of + pending msgsnd() operations (ss_add()) must be atomic. + + Otherwise: + - the thread that performs msgsnd() finds a full queue and decides to + sleep. + - the thread that performs msgrcv() first reads all messages from the + queue and then sleeps, because the queue is empty. + - the msgrcv() calls do not perform any wakeups, because the msgsnd() + task has not yet called ss_add(). + - then the msgsnd()-thread first calls ss_add() and then sleeps. + + Net result: msgsnd() and msgrcv() both sleep forever. + + Observed with msgctl08 from ltp with a preemptible kernel. + + Fix: Call ipc_lock_object() before performing the check. + + The patch also moves security_msg_queue_msgsnd() under ipc_lock_object: + - msgctl(IPC_SET) explicitely mentions that it tries to expunge any + pending operations that are not allowed anymore with the new + permissions. If security_msg_queue_msgsnd() is called without locks, + then there might be races. + - it makes the patch much simpler. + + Reported-and-tested-by: Vineet Gupta + Acked-by: Rik van Riel + Signed-off-by: Manfred Spraul + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:39:56.000000000 +0000 +@@ -680,16 +680,18 @@ + goto out_unlock1; + } + ++ ipc_lock_object(&msq->q_perm); ++ + for (;;) { + struct msg_sender s; + + err = -EACCES; + if (ipcperms(ns, &msq->q_perm, S_IWUGO)) +- goto out_unlock1; ++ goto out_unlock0; + + err = security_msg_queue_msgsnd(msq, msg, msgflg); + if (err) +- goto out_unlock1; ++ goto out_unlock0; + + if (msgsz + msq->q_cbytes <= msq->q_qbytes && + 1 + msq->q_qnum <= msq->q_qbytes) { +@@ -699,10 +701,9 @@ + /* queue full, wait: */ + if (msgflg & IPC_NOWAIT) { + err = -EAGAIN; +- goto out_unlock1; ++ goto out_unlock0; + } + +- ipc_lock_object(&msq->q_perm); + ss_add(msq, &s); + + if (!ipc_rcu_getref(msq)) { +@@ -730,10 +731,7 @@ + goto out_unlock0; + } + +- ipc_unlock_object(&msq->q_perm); + } +- +- ipc_lock_object(&msq->q_perm); + msq->q_lspid = task_tgid_vnr(current); + msq->q_stime = get_seconds(); + +Index: linux-3.10-3.10.11/dummy/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1417_11ce33923261281f406a99ee345ffc5f53aec2c8.txt 2014-04-28 00:39:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.patch 2014-04-28 00:39:57.000000000 +0000 @@ -0,0 +1,84 @@ +commit 1b2ad167481aed32347ef7726d14bb2b9f63c4c9 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:15 2013 -0700 + + ipc,shm: introduce lockless functions to obtain the ipc object + + commit 8b8d52ac382b17a19906b930cd69e2edb0aca8ba upstream. + + This is the third and final patchset that deals with reducing the amount + of contention we impose on the ipc lock (kern_ipc_perm.lock). These + changes mostly deal with shared memory, previous work has already been + done for semaphores and message queues: + + http://lkml.org/lkml/2013/3/20/546 (sems) + http://lkml.org/lkml/2013/5/15/584 (mqueues) + + With these patches applied, a custom shm microbenchmark stressing shmctl + doing IPC_STAT with 4 threads a million times, reduces the execution + time by 50%. A similar run, this time with IPC_SET, reduces the + execution time from 3 mins and 35 secs to 27 seconds. + + Patches 1-8: replaces blindly taking the ipc lock for a smarter + combination of rcu and ipc_obtain_object, only acquiring the spinlock + when updating. + + Patch 9: renames the ids rw_mutex to rwsem, which is what it already was. + + Patch 10: is a trivial mqueue leftover cleanup + + Patch 11: adds a brief lock scheme description, requested by Andrew. + + This patch: + + Add shm_obtain_object() and shm_obtain_object_check(), which will allow us + to get the ipc object without acquiring the lock. Just as with other + forms of ipc, these functions are basically wrappers around + ipc_obtain_object*(). + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:45.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:56.000000000 +0000 +@@ -124,6 +124,26 @@ + IPC_SHM_IDS, sysvipc_shm_proc_show); + } + ++static inline struct shmid_kernel *shm_obtain_object(struct ipc_namespace *ns, int id) ++{ ++ struct kern_ipc_perm *ipcp = ipc_obtain_object(&shm_ids(ns), id); ++ ++ if (IS_ERR(ipcp)) ++ return ERR_CAST(ipcp); ++ ++ return container_of(ipcp, struct shmid_kernel, shm_perm); ++} ++ ++static inline struct shmid_kernel *shm_obtain_object_check(struct ipc_namespace *ns, int id) ++{ ++ struct kern_ipc_perm *ipcp = ipc_obtain_object_check(&shm_ids(ns), id); ++ ++ if (IS_ERR(ipcp)) ++ return ERR_CAST(ipcp); ++ ++ return container_of(ipcp, struct shmid_kernel, shm_perm); ++} ++ + /* + * shm_lock_(check_) routines are called in the paths where the rw_mutex + * is not necessarily held. +Index: linux-3.10-3.10.11/dummy/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1418_1b2ad167481aed32347ef7726d14bb2b9f63c4c9.txt 2014-04-28 00:39:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.patch --- linux-3.10.11/debian/patches/rpi/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.patch 2014-04-28 00:39:58.000000000 +0000 @@ -0,0 +1,71 @@ +commit b3b7b427fd385e92ce2ea8a847ec977724dc9669 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:16 2013 -0700 + + ipc,shm: shorten critical region in shmctl_down + + commit 79ccf0f8c8e04e8b9eda6645ba0f63b0915a3075 upstream. + + Instead of holding the ipc lock for the entire function, use the + ipcctl_pre_down_nolock and only acquire the lock for specific commands: + RMID and SET. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:56.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:57.000000000 +0000 +@@ -780,11 +780,10 @@ + down_write(&shm_ids(ns).rw_mutex); + rcu_read_lock(); + +- ipcp = ipcctl_pre_down(ns, &shm_ids(ns), shmid, cmd, +- &shmid64.shm_perm, 0); ++ ipcp = ipcctl_pre_down_nolock(ns, &shm_ids(ns), shmid, cmd, ++ &shmid64.shm_perm, 0); + if (IS_ERR(ipcp)) { + err = PTR_ERR(ipcp); +- /* the ipc lock is not held upon failure */ + goto out_unlock1; + } + +@@ -792,14 +791,16 @@ + + err = security_shm_shmctl(shp, cmd); + if (err) +- goto out_unlock0; ++ goto out_unlock1; + + switch (cmd) { + case IPC_RMID: ++ ipc_lock_object(&shp->shm_perm); + /* do_shm_rmid unlocks the ipc object and rcu */ + do_shm_rmid(ns, ipcp); + goto out_up; + case IPC_SET: ++ ipc_lock_object(&shp->shm_perm); + err = ipc_update_perm(&shmid64.shm_perm, ipcp); + if (err) + goto out_unlock0; +@@ -807,6 +808,7 @@ + break; + default: + err = -EINVAL; ++ goto out_unlock1; + } + + out_unlock0: +Index: linux-3.10-3.10.11/dummy/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1419_b3b7b427fd385e92ce2ea8a847ec977724dc9669.txt 2014-04-28 00:39:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.patch 2014-04-28 00:39:58.000000000 +0000 @@ -0,0 +1,87 @@ +commit 60425b7b25c07bbc55f39ce1b178c5bf86e679e4 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:17 2013 -0700 + + ipc: drop ipcctl_pre_down + + commit 3b1c4ad37741e53804ffe0a30dd01e08b2ab6241 upstream. + + Now that sem, msgque and shm, through *_down(), all use the lockless + variant of ipcctl_pre_down(), go ahead and delete it. + + [akpm@linux-foundation.org: fix function name in kerneldoc, cleanups] + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:39:51.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:39:58.000000000 +0000 +@@ -733,7 +733,7 @@ + } + + /** +- * ipcctl_pre_down - retrieve an ipc and check permissions for some IPC_XXX cmd ++ * ipcctl_pre_down_nolock - retrieve an ipc and check permissions for some IPC_XXX cmd + * @ns: the ipc namespace + * @ids: the table of ids where to look for the ipc + * @id: the id of the ipc to retrieve +@@ -746,29 +746,13 @@ + * It must be called without any lock held and + * - retrieves the ipc with the given id in the given table. + * - performs some audit and permission check, depending on the given cmd +- * - returns the ipc with the ipc lock held in case of success +- * or an err-code without any lock held otherwise. ++ * - returns a pointer to the ipc object or otherwise, the corresponding error. + * + * Call holding the both the rw_mutex and the rcu read lock. + */ +-struct kern_ipc_perm *ipcctl_pre_down(struct ipc_namespace *ns, +- struct ipc_ids *ids, int id, int cmd, +- struct ipc64_perm *perm, int extra_perm) +-{ +- struct kern_ipc_perm *ipcp; +- +- ipcp = ipcctl_pre_down_nolock(ns, ids, id, cmd, perm, extra_perm); +- if (IS_ERR(ipcp)) +- goto out; +- +- spin_lock(&ipcp->lock); +-out: +- return ipcp; +-} +- + struct kern_ipc_perm *ipcctl_pre_down_nolock(struct ipc_namespace *ns, +- struct ipc_ids *ids, int id, int cmd, +- struct ipc64_perm *perm, int extra_perm) ++ struct ipc_ids *ids, int id, int cmd, ++ struct ipc64_perm *perm, int extra_perm) + { + kuid_t euid; + int err = -EPERM; +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:39:44.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:39:58.000000000 +0000 +@@ -131,9 +131,6 @@ + struct kern_ipc_perm *ipcctl_pre_down_nolock(struct ipc_namespace *ns, + struct ipc_ids *ids, int id, int cmd, + struct ipc64_perm *perm, int extra_perm); +-struct kern_ipc_perm *ipcctl_pre_down(struct ipc_namespace *ns, +- struct ipc_ids *ids, int id, int cmd, +- struct ipc64_perm *perm, int extra_perm); + + #ifndef CONFIG_ARCH_WANT_IPC_PARSE_VERSION + /* On IA-64, we always use the "64-bit version" of the IPC structures. */ +Index: linux-3.10-3.10.11/dummy/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1420_60425b7b25c07bbc55f39ce1b178c5bf86e679e4.txt 2014-04-28 00:39:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.patch 2014-04-28 00:39:59.000000000 +0000 @@ -0,0 +1,121 @@ +commit d6187ddfc90715e95b8c73f49887781b4b2a1ebc +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:18 2013 -0700 + + ipc,shm: introduce shmctl_nolock + + commit 68eccc1dc345539d589ae78ee43b835c1a06a134 upstream. + + Similar to semctl and msgctl, when calling msgctl, the *_INFO and *_STAT + commands can be performed without acquiring the ipc object. + + Add a shmctl_nolock() function and move the logic of *_INFO and *_STAT out + of msgctl(). Since we are just moving functionality, this change still + takes the lock and it will be properly lockless in the next patch. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:57.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:59.000000000 +0000 +@@ -820,29 +820,24 @@ + return err; + } + +-SYSCALL_DEFINE3(shmctl, int, shmid, int, cmd, struct shmid_ds __user *, buf) ++static int shmctl_nolock(struct ipc_namespace *ns, int shmid, ++ int cmd, int version, void __user *buf) + { ++ int err; + struct shmid_kernel *shp; +- int err, version; +- struct ipc_namespace *ns; + +- if (cmd < 0 || shmid < 0) { +- err = -EINVAL; +- goto out; ++ /* preliminary security checks for *_INFO */ ++ if (cmd == IPC_INFO || cmd == SHM_INFO) { ++ err = security_shm_shmctl(NULL, cmd); ++ if (err) ++ return err; + } + +- version = ipc_parse_version(&cmd); +- ns = current->nsproxy->ipc_ns; +- +- switch (cmd) { /* replace with proc interface ? */ ++ switch (cmd) { + case IPC_INFO: + { + struct shminfo64 shminfo; + +- err = security_shm_shmctl(NULL, cmd); +- if (err) +- return err; +- + memset(&shminfo, 0, sizeof(shminfo)); + shminfo.shmmni = shminfo.shmseg = ns->shm_ctlmni; + shminfo.shmmax = ns->shm_ctlmax; +@@ -864,10 +859,6 @@ + { + struct shm_info shm_info; + +- err = security_shm_shmctl(NULL, cmd); +- if (err) +- return err; +- + memset(&shm_info, 0, sizeof(shm_info)); + down_read(&shm_ids(ns).rw_mutex); + shm_info.used_ids = shm_ids(ns).in_use; +@@ -928,6 +919,36 @@ + err = result; + goto out; + } ++ default: ++ return -EINVAL; ++ } ++ ++out_unlock: ++ shm_unlock(shp); ++out: ++ return err; ++} ++ ++SYSCALL_DEFINE3(shmctl, int, shmid, int, cmd, struct shmid_ds __user *, buf) ++{ ++ struct shmid_kernel *shp; ++ int err, version; ++ struct ipc_namespace *ns; ++ ++ if (cmd < 0 || shmid < 0) { ++ err = -EINVAL; ++ goto out; ++ } ++ ++ version = ipc_parse_version(&cmd); ++ ns = current->nsproxy->ipc_ns; ++ ++ switch (cmd) { ++ case IPC_INFO: ++ case SHM_INFO: ++ case SHM_STAT: ++ case IPC_STAT: ++ return shmctl_nolock(ns, shmid, cmd, version, buf); + case SHM_LOCK: + case SHM_UNLOCK: + { +Index: linux-3.10-3.10.11/dummy/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1421_d6187ddfc90715e95b8c73f49887781b4b2a1ebc.txt 2014-04-28 00:39:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.patch --- linux-3.10.11/debian/patches/rpi/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.patch 2014-04-28 00:40:00.000000000 +0000 @@ -0,0 +1,89 @@ +commit c29c40392a01b9414b02c1b57b042950704cb774 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:20 2013 -0700 + + ipc,shm: make shmctl_nolock lockless + + commit c97cb9ccab8c85428ec21eff690642ad2ce1fa8a upstream. + + While the INFO cmd doesn't take the ipc lock, the STAT commands do acquire + it unnecessarily. We can do the permissions and security checks only + holding the rcu lock. + + [akpm@linux-foundation.org: coding-style fixes] + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:39:59.000000000 +0000 +@@ -882,27 +882,31 @@ + struct shmid64_ds tbuf; + int result; + ++ rcu_read_lock(); + if (cmd == SHM_STAT) { +- shp = shm_lock(ns, shmid); ++ shp = shm_obtain_object(ns, shmid); + if (IS_ERR(shp)) { + err = PTR_ERR(shp); +- goto out; ++ goto out_unlock; + } + result = shp->shm_perm.id; + } else { +- shp = shm_lock_check(ns, shmid); ++ shp = shm_obtain_object_check(ns, shmid); + if (IS_ERR(shp)) { + err = PTR_ERR(shp); +- goto out; ++ goto out_unlock; + } + result = 0; + } ++ + err = -EACCES; + if (ipcperms(ns, &shp->shm_perm, S_IRUGO)) + goto out_unlock; ++ + err = security_shm_shmctl(shp, cmd); + if (err) + goto out_unlock; ++ + memset(&tbuf, 0, sizeof(tbuf)); + kernel_to_ipc64_perm(&shp->shm_perm, &tbuf.shm_perm); + tbuf.shm_segsz = shp->shm_segsz; +@@ -912,8 +916,9 @@ + tbuf.shm_cpid = shp->shm_cprid; + tbuf.shm_lpid = shp->shm_lprid; + tbuf.shm_nattch = shp->shm_nattch; +- shm_unlock(shp); +- if(copy_shmid_to_user (buf, &tbuf, version)) ++ rcu_read_unlock(); ++ ++ if (copy_shmid_to_user(buf, &tbuf, version)) + err = -EFAULT; + else + err = result; +@@ -924,7 +929,7 @@ + } + + out_unlock: +- shm_unlock(shp); ++ rcu_read_unlock(); + out: + return err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1422_c29c40392a01b9414b02c1b57b042950704cb774.txt 2014-04-28 00:39:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.patch 2014-04-28 00:40:01.000000000 +0000 @@ -0,0 +1,138 @@ +commit 00c88e695ae4c001495d6768d6c91603f34aa6c7 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:21 2013 -0700 + + ipc,shm: shorten critical region for shmctl + + commit 2caacaa82a51b78fc0c800e206473874094287ed upstream. + + With the *_INFO, *_STAT, IPC_RMID and IPC_SET commands already optimized, + deal with the remaining SHM_LOCK and SHM_UNLOCK commands. Take the + shm_perm lock after doing the initial auditing and security checks. The + rest of the logic remains unchanged. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:39:59.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:00.000000000 +0000 +@@ -940,10 +940,8 @@ + int err, version; + struct ipc_namespace *ns; + +- if (cmd < 0 || shmid < 0) { +- err = -EINVAL; +- goto out; +- } ++ if (cmd < 0 || shmid < 0) ++ return -EINVAL; + + version = ipc_parse_version(&cmd); + ns = current->nsproxy->ipc_ns; +@@ -954,36 +952,40 @@ + case SHM_STAT: + case IPC_STAT: + return shmctl_nolock(ns, shmid, cmd, version, buf); ++ case IPC_RMID: ++ case IPC_SET: ++ return shmctl_down(ns, shmid, cmd, buf, version); + case SHM_LOCK: + case SHM_UNLOCK: + { + struct file *shm_file; + +- shp = shm_lock_check(ns, shmid); ++ rcu_read_lock(); ++ shp = shm_obtain_object_check(ns, shmid); + if (IS_ERR(shp)) { + err = PTR_ERR(shp); +- goto out; ++ goto out_unlock1; + } + + audit_ipc_obj(&(shp->shm_perm)); ++ err = security_shm_shmctl(shp, cmd); ++ if (err) ++ goto out_unlock1; + ++ ipc_lock_object(&shp->shm_perm); + if (!ns_capable(ns->user_ns, CAP_IPC_LOCK)) { + kuid_t euid = current_euid(); + err = -EPERM; + if (!uid_eq(euid, shp->shm_perm.uid) && + !uid_eq(euid, shp->shm_perm.cuid)) +- goto out_unlock; ++ goto out_unlock0; + if (cmd == SHM_LOCK && !rlimit(RLIMIT_MEMLOCK)) +- goto out_unlock; ++ goto out_unlock0; + } + +- err = security_shm_shmctl(shp, cmd); +- if (err) +- goto out_unlock; +- + shm_file = shp->shm_file; + if (is_file_hugepages(shm_file)) +- goto out_unlock; ++ goto out_unlock0; + + if (cmd == SHM_LOCK) { + struct user_struct *user = current_user(); +@@ -992,32 +994,31 @@ + shp->shm_perm.mode |= SHM_LOCKED; + shp->mlock_user = user; + } +- goto out_unlock; ++ goto out_unlock0; + } + + /* SHM_UNLOCK */ + if (!(shp->shm_perm.mode & SHM_LOCKED)) +- goto out_unlock; ++ goto out_unlock0; + shmem_lock(shm_file, 0, shp->mlock_user); + shp->shm_perm.mode &= ~SHM_LOCKED; + shp->mlock_user = NULL; + get_file(shm_file); +- shm_unlock(shp); ++ ipc_unlock_object(&shp->shm_perm); ++ rcu_read_unlock(); + shmem_unlock_mapping(shm_file->f_mapping); ++ + fput(shm_file); +- goto out; +- } +- case IPC_RMID: +- case IPC_SET: +- err = shmctl_down(ns, shmid, cmd, buf, version); + return err; ++ } + default: + return -EINVAL; + } + +-out_unlock: +- shm_unlock(shp); +-out: ++out_unlock0: ++ ipc_unlock_object(&shp->shm_perm); ++out_unlock1: ++ rcu_read_unlock(); + return err; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1423_00c88e695ae4c001495d6768d6c91603f34aa6c7.txt 2014-04-28 00:40:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.patch 2014-04-28 00:40:01.000000000 +0000 @@ -0,0 +1,88 @@ +commit 247ec302b53873fa13bbb413b5df982cb5d7f78f +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:22 2013 -0700 + + ipc,shm: cleanup do_shmat pasta + + commit f42569b1388b1408b574a5e93a23a663647d4181 upstream. + + Clean up some of the messy do_shmat() spaghetti code, getting rid of + out_free and out_put_dentry labels. This makes shortening the critical + region of this function in the next patch a little easier to do and read. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:00.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:01.000000000 +0000 +@@ -1108,16 +1108,21 @@ + + err = -ENOMEM; + sfd = kzalloc(sizeof(*sfd), GFP_KERNEL); +- if (!sfd) +- goto out_put_dentry; ++ if (!sfd) { ++ path_put(&path); ++ goto out_nattch; ++ } + + file = alloc_file(&path, f_mode, + is_file_hugepages(shp->shm_file) ? + &shm_file_operations_huge : + &shm_file_operations); + err = PTR_ERR(file); +- if (IS_ERR(file)) +- goto out_free; ++ if (IS_ERR(file)) { ++ kfree(sfd); ++ path_put(&path); ++ goto out_nattch; ++ } + + file->private_data = sfd; + file->f_mapping = shp->shm_file->f_mapping; +@@ -1143,7 +1148,7 @@ + addr > current->mm->start_stack - size - PAGE_SIZE * 5) + goto invalid; + } +- ++ + addr = do_mmap_pgoff(file, addr, size, prot, flags, 0, &populate); + *raddr = addr; + err = 0; +@@ -1167,19 +1172,12 @@ + else + shm_unlock(shp); + up_write(&shm_ids(ns).rw_mutex); +- +-out: + return err; + + out_unlock: + shm_unlock(shp); +- goto out; +- +-out_free: +- kfree(sfd); +-out_put_dentry: +- path_put(&path); +- goto out_nattch; ++out: ++ return err; + } + + SYSCALL_DEFINE3(shmat, int, shmid, char __user *, shmaddr, int, shmflg) +Index: linux-3.10-3.10.11/dummy/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1424_247ec302b53873fa13bbb413b5df982cb5d7f78f.txt 2014-04-28 00:40:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.patch --- linux-3.10.11/debian/patches/rpi/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.patch 2014-04-28 00:40:02.000000000 +0000 @@ -0,0 +1,80 @@ +commit bd58e2dc27330012ff1774cd54d41d6e7ffcbc36 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:23 2013 -0700 + + ipc,shm: shorten critical region for shmat + + commit c2c737a0461e61a34676bd0bd1bc1a70a1b4e396 upstream. + + Similar to other system calls, acquire the kern_ipc_perm lock after doing + the initial permission and security checks. + + [sasha.levin@oracle.com: dont leave do_shmat with rcu lock held] + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Sasha Levin + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:01.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:02.000000000 +0000 +@@ -19,6 +19,9 @@ + * namespaces support + * OpenVZ, SWsoft Inc. + * Pavel Emelianov ++ * ++ * Better ipc lock (kern_ipc_perm.lock) handling ++ * Davidlohr Bueso , June 2013. + */ + + #include +@@ -1086,10 +1089,11 @@ + * additional creator id... + */ + ns = current->nsproxy->ipc_ns; +- shp = shm_lock_check(ns, shmid); ++ rcu_read_lock(); ++ shp = shm_obtain_object_check(ns, shmid); + if (IS_ERR(shp)) { + err = PTR_ERR(shp); +- goto out; ++ goto out_unlock; + } + + err = -EACCES; +@@ -1100,11 +1104,13 @@ + if (err) + goto out_unlock; + ++ ipc_lock_object(&shp->shm_perm); + path = shp->shm_file->f_path; + path_get(&path); + shp->shm_nattch++; + size = i_size_read(path.dentry->d_inode); +- shm_unlock(shp); ++ ipc_unlock_object(&shp->shm_perm); ++ rcu_read_unlock(); + + err = -ENOMEM; + sfd = kzalloc(sizeof(*sfd), GFP_KERNEL); +@@ -1175,7 +1181,7 @@ + return err; + + out_unlock: +- shm_unlock(shp); ++ rcu_read_unlock(); + out: + return err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1425_bd58e2dc27330012ff1774cd54d41d6e7ffcbc36.txt 2014-04-28 00:40:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.patch 2014-04-28 00:40:03.000000000 +0000 @@ -0,0 +1,603 @@ +commit 33b74669858f3f1982d83015203264b462d845e7 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:24 2013 -0700 + + ipc: rename ids->rw_mutex + + commit d9a605e40b1376eb02b067d7690580255a0df68f upstream. + + Since in some situations the lock can be shared for readers, we shouldn't + be calling it a mutex, rename it to rwsem. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/ipc_namespace.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/ipc_namespace.h 2014-04-27 23:38:10.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/ipc_namespace.h 2014-04-28 00:40:02.000000000 +0000 +@@ -22,7 +22,7 @@ + int in_use; + unsigned short seq; + unsigned short seq_max; +- struct rw_semaphore rw_mutex; ++ struct rw_semaphore rwsem; + struct idr ipcs_idr; + int next_id; + }; +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:39:56.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:40:02.000000000 +0000 +@@ -172,7 +172,7 @@ + * @ns: namespace + * @params: ptr to the structure that contains the key and msgflg + * +- * Called with msg_ids.rw_mutex held (writer) ++ * Called with msg_ids.rwsem held (writer) + */ + static int newque(struct ipc_namespace *ns, struct ipc_params *params) + { +@@ -259,8 +259,8 @@ + * removes the message queue from message queue ID IDR, and cleans up all the + * messages associated with this queue. + * +- * msg_ids.rw_mutex (writer) and the spinlock for this message queue are held +- * before freeque() is called. msg_ids.rw_mutex remains locked on exit. ++ * msg_ids.rwsem (writer) and the spinlock for this message queue are held ++ * before freeque() is called. msg_ids.rwsem remains locked on exit. + */ + static void freeque(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp) + { +@@ -282,7 +282,7 @@ + } + + /* +- * Called with msg_ids.rw_mutex and ipcp locked. ++ * Called with msg_ids.rwsem and ipcp locked. + */ + static inline int msg_security(struct kern_ipc_perm *ipcp, int msgflg) + { +@@ -386,9 +386,9 @@ + } + + /* +- * This function handles some msgctl commands which require the rw_mutex ++ * This function handles some msgctl commands which require the rwsem + * to be held in write mode. +- * NOTE: no locks must be held, the rw_mutex is taken inside this function. ++ * NOTE: no locks must be held, the rwsem is taken inside this function. + */ + static int msgctl_down(struct ipc_namespace *ns, int msqid, int cmd, + struct msqid_ds __user *buf, int version) +@@ -403,7 +403,7 @@ + return -EFAULT; + } + +- down_write(&msg_ids(ns).rw_mutex); ++ down_write(&msg_ids(ns).rwsem); + rcu_read_lock(); + + ipcp = ipcctl_pre_down_nolock(ns, &msg_ids(ns), msqid, cmd, +@@ -459,7 +459,7 @@ + out_unlock1: + rcu_read_unlock(); + out_up: +- up_write(&msg_ids(ns).rw_mutex); ++ up_write(&msg_ids(ns).rwsem); + return err; + } + +@@ -494,7 +494,7 @@ + msginfo.msgmnb = ns->msg_ctlmnb; + msginfo.msgssz = MSGSSZ; + msginfo.msgseg = MSGSEG; +- down_read(&msg_ids(ns).rw_mutex); ++ down_read(&msg_ids(ns).rwsem); + if (cmd == MSG_INFO) { + msginfo.msgpool = msg_ids(ns).in_use; + msginfo.msgmap = atomic_read(&ns->msg_hdrs); +@@ -505,7 +505,7 @@ + msginfo.msgtql = MSGTQL; + } + max_id = ipc_get_maxid(&msg_ids(ns)); +- up_read(&msg_ids(ns).rw_mutex); ++ up_read(&msg_ids(ns).rwsem); + if (copy_to_user(buf, &msginfo, sizeof(struct msginfo))) + return -EFAULT; + return (max_id < 0) ? 0 : max_id; +Index: linux-3.10-3.10.11/ipc/namespace.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/namespace.c 2014-04-27 23:38:10.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/namespace.c 2014-04-28 00:40:02.000000000 +0000 +@@ -81,7 +81,7 @@ + int next_id; + int total, in_use; + +- down_write(&ids->rw_mutex); ++ down_write(&ids->rwsem); + + in_use = ids->in_use; + +@@ -93,7 +93,7 @@ + free(ns, perm); + total++; + } +- up_write(&ids->rw_mutex); ++ up_write(&ids->rwsem); + } + + static void free_ipc_ns(struct ipc_namespace *ns) +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:39:55.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:02.000000000 +0000 +@@ -322,7 +322,7 @@ + } + + /* +- * sem_lock_(check_) routines are called in the paths where the rw_mutex ++ * sem_lock_(check_) routines are called in the paths where the rwsem + * is not held. + * + * The caller holds the RCU read lock. +@@ -426,7 +426,7 @@ + * @ns: namespace + * @params: ptr to the structure that contains key, semflg and nsems + * +- * Called with sem_ids.rw_mutex held (as a writer) ++ * Called with sem_ids.rwsem held (as a writer) + */ + + static int newary(struct ipc_namespace *ns, struct ipc_params *params) +@@ -492,7 +492,7 @@ + + + /* +- * Called with sem_ids.rw_mutex and ipcp locked. ++ * Called with sem_ids.rwsem and ipcp locked. + */ + static inline int sem_security(struct kern_ipc_perm *ipcp, int semflg) + { +@@ -503,7 +503,7 @@ + } + + /* +- * Called with sem_ids.rw_mutex and ipcp locked. ++ * Called with sem_ids.rwsem and ipcp locked. + */ + static inline int sem_more_checks(struct kern_ipc_perm *ipcp, + struct ipc_params *params) +@@ -994,8 +994,8 @@ + return semzcnt; + } + +-/* Free a semaphore set. freeary() is called with sem_ids.rw_mutex locked +- * as a writer and the spinlock for this semaphore set hold. sem_ids.rw_mutex ++/* Free a semaphore set. freeary() is called with sem_ids.rwsem locked ++ * as a writer and the spinlock for this semaphore set hold. sem_ids.rwsem + * remains locked on exit. + */ + static void freeary(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp) +@@ -1116,7 +1116,7 @@ + seminfo.semmnu = SEMMNU; + seminfo.semmap = SEMMAP; + seminfo.semume = SEMUME; +- down_read(&sem_ids(ns).rw_mutex); ++ down_read(&sem_ids(ns).rwsem); + if (cmd == SEM_INFO) { + seminfo.semusz = sem_ids(ns).in_use; + seminfo.semaem = ns->used_sems; +@@ -1125,7 +1125,7 @@ + seminfo.semaem = SEMAEM; + } + max_id = ipc_get_maxid(&sem_ids(ns)); +- up_read(&sem_ids(ns).rw_mutex); ++ up_read(&sem_ids(ns).rwsem); + if (copy_to_user(p, &seminfo, sizeof(struct seminfo))) + return -EFAULT; + return (max_id < 0) ? 0: max_id; +@@ -1431,9 +1431,9 @@ + } + + /* +- * This function handles some semctl commands which require the rw_mutex ++ * This function handles some semctl commands which require the rwsem + * to be held in write mode. +- * NOTE: no locks must be held, the rw_mutex is taken inside this function. ++ * NOTE: no locks must be held, the rwsem is taken inside this function. + */ + static int semctl_down(struct ipc_namespace *ns, int semid, + int cmd, int version, void __user *p) +@@ -1448,7 +1448,7 @@ + return -EFAULT; + } + +- down_write(&sem_ids(ns).rw_mutex); ++ down_write(&sem_ids(ns).rwsem); + rcu_read_lock(); + + ipcp = ipcctl_pre_down_nolock(ns, &sem_ids(ns), semid, cmd, +@@ -1487,7 +1487,7 @@ + out_unlock1: + rcu_read_unlock(); + out_up: +- up_write(&sem_ids(ns).rw_mutex); ++ up_write(&sem_ids(ns).rwsem); + return err; + } + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:02.000000000 +0000 +@@ -83,8 +83,8 @@ + } + + /* +- * Called with shm_ids.rw_mutex (writer) and the shp structure locked. +- * Only shm_ids.rw_mutex remains locked on exit. ++ * Called with shm_ids.rwsem (writer) and the shp structure locked. ++ * Only shm_ids.rwsem remains locked on exit. + */ + static void do_shm_rmid(struct ipc_namespace *ns, struct kern_ipc_perm *ipcp) + { +@@ -148,7 +148,7 @@ + } + + /* +- * shm_lock_(check_) routines are called in the paths where the rw_mutex ++ * shm_lock_(check_) routines are called in the paths where the rwsem + * is not necessarily held. + */ + static inline struct shmid_kernel *shm_lock(struct ipc_namespace *ns, int id) +@@ -205,7 +205,7 @@ + * @ns: namespace + * @shp: struct to free + * +- * It has to be called with shp and shm_ids.rw_mutex (writer) locked, ++ * It has to be called with shp and shm_ids.rwsem (writer) locked, + * but returns with shp unlocked and freed. + */ + static void shm_destroy(struct ipc_namespace *ns, struct shmid_kernel *shp) +@@ -253,7 +253,7 @@ + struct shmid_kernel *shp; + struct ipc_namespace *ns = sfd->ns; + +- down_write(&shm_ids(ns).rw_mutex); ++ down_write(&shm_ids(ns).rwsem); + /* remove from the list of attaches of the shm segment */ + shp = shm_lock(ns, sfd->id); + BUG_ON(IS_ERR(shp)); +@@ -264,10 +264,10 @@ + shm_destroy(ns, shp); + else + shm_unlock(shp); +- up_write(&shm_ids(ns).rw_mutex); ++ up_write(&shm_ids(ns).rwsem); + } + +-/* Called with ns->shm_ids(ns).rw_mutex locked */ ++/* Called with ns->shm_ids(ns).rwsem locked */ + static int shm_try_destroy_current(int id, void *p, void *data) + { + struct ipc_namespace *ns = data; +@@ -298,7 +298,7 @@ + return 0; + } + +-/* Called with ns->shm_ids(ns).rw_mutex locked */ ++/* Called with ns->shm_ids(ns).rwsem locked */ + static int shm_try_destroy_orphaned(int id, void *p, void *data) + { + struct ipc_namespace *ns = data; +@@ -309,7 +309,7 @@ + * We want to destroy segments without users and with already + * exit'ed originating process. + * +- * As shp->* are changed under rw_mutex, it's safe to skip shp locking. ++ * As shp->* are changed under rwsem, it's safe to skip shp locking. + */ + if (shp->shm_creator != NULL) + return 0; +@@ -323,10 +323,10 @@ + + void shm_destroy_orphaned(struct ipc_namespace *ns) + { +- down_write(&shm_ids(ns).rw_mutex); ++ down_write(&shm_ids(ns).rwsem); + if (shm_ids(ns).in_use) + idr_for_each(&shm_ids(ns).ipcs_idr, &shm_try_destroy_orphaned, ns); +- up_write(&shm_ids(ns).rw_mutex); ++ up_write(&shm_ids(ns).rwsem); + } + + +@@ -338,10 +338,10 @@ + return; + + /* Destroy all already created segments, but not mapped yet */ +- down_write(&shm_ids(ns).rw_mutex); ++ down_write(&shm_ids(ns).rwsem); + if (shm_ids(ns).in_use) + idr_for_each(&shm_ids(ns).ipcs_idr, &shm_try_destroy_current, ns); +- up_write(&shm_ids(ns).rw_mutex); ++ up_write(&shm_ids(ns).rwsem); + } + + static int shm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) +@@ -475,7 +475,7 @@ + * @ns: namespace + * @params: ptr to the structure that contains key, size and shmflg + * +- * Called with shm_ids.rw_mutex held as a writer. ++ * Called with shm_ids.rwsem held as a writer. + */ + + static int newseg(struct ipc_namespace *ns, struct ipc_params *params) +@@ -583,7 +583,7 @@ + } + + /* +- * Called with shm_ids.rw_mutex and ipcp locked. ++ * Called with shm_ids.rwsem and ipcp locked. + */ + static inline int shm_security(struct kern_ipc_perm *ipcp, int shmflg) + { +@@ -594,7 +594,7 @@ + } + + /* +- * Called with shm_ids.rw_mutex and ipcp locked. ++ * Called with shm_ids.rwsem and ipcp locked. + */ + static inline int shm_more_checks(struct kern_ipc_perm *ipcp, + struct ipc_params *params) +@@ -707,7 +707,7 @@ + + /* + * Calculate and add used RSS and swap pages of a shm. +- * Called with shm_ids.rw_mutex held as a reader ++ * Called with shm_ids.rwsem held as a reader + */ + static void shm_add_rss_swap(struct shmid_kernel *shp, + unsigned long *rss_add, unsigned long *swp_add) +@@ -734,7 +734,7 @@ + } + + /* +- * Called with shm_ids.rw_mutex held as a reader ++ * Called with shm_ids.rwsem held as a reader + */ + static void shm_get_stat(struct ipc_namespace *ns, unsigned long *rss, + unsigned long *swp) +@@ -763,9 +763,9 @@ + } + + /* +- * This function handles some shmctl commands which require the rw_mutex ++ * This function handles some shmctl commands which require the rwsem + * to be held in write mode. +- * NOTE: no locks must be held, the rw_mutex is taken inside this function. ++ * NOTE: no locks must be held, the rwsem is taken inside this function. + */ + static int shmctl_down(struct ipc_namespace *ns, int shmid, int cmd, + struct shmid_ds __user *buf, int version) +@@ -780,7 +780,7 @@ + return -EFAULT; + } + +- down_write(&shm_ids(ns).rw_mutex); ++ down_write(&shm_ids(ns).rwsem); + rcu_read_lock(); + + ipcp = ipcctl_pre_down_nolock(ns, &shm_ids(ns), shmid, cmd, +@@ -819,7 +819,7 @@ + out_unlock1: + rcu_read_unlock(); + out_up: +- up_write(&shm_ids(ns).rw_mutex); ++ up_write(&shm_ids(ns).rwsem); + return err; + } + +@@ -850,9 +850,9 @@ + if(copy_shminfo_to_user (buf, &shminfo, version)) + return -EFAULT; + +- down_read(&shm_ids(ns).rw_mutex); ++ down_read(&shm_ids(ns).rwsem); + err = ipc_get_maxid(&shm_ids(ns)); +- up_read(&shm_ids(ns).rw_mutex); ++ up_read(&shm_ids(ns).rwsem); + + if(err<0) + err = 0; +@@ -863,14 +863,14 @@ + struct shm_info shm_info; + + memset(&shm_info, 0, sizeof(shm_info)); +- down_read(&shm_ids(ns).rw_mutex); ++ down_read(&shm_ids(ns).rwsem); + shm_info.used_ids = shm_ids(ns).in_use; + shm_get_stat (ns, &shm_info.shm_rss, &shm_info.shm_swp); + shm_info.shm_tot = ns->shm_tot; + shm_info.swap_attempts = 0; + shm_info.swap_successes = 0; + err = ipc_get_maxid(&shm_ids(ns)); +- up_read(&shm_ids(ns).rw_mutex); ++ up_read(&shm_ids(ns).rwsem); + if (copy_to_user(buf, &shm_info, sizeof(shm_info))) { + err = -EFAULT; + goto out; +@@ -1169,7 +1169,7 @@ + fput(file); + + out_nattch: +- down_write(&shm_ids(ns).rw_mutex); ++ down_write(&shm_ids(ns).rwsem); + shp = shm_lock(ns, shmid); + BUG_ON(IS_ERR(shp)); + shp->shm_nattch--; +@@ -1177,7 +1177,7 @@ + shm_destroy(ns, shp); + else + shm_unlock(shp); +- up_write(&shm_ids(ns).rw_mutex); ++ up_write(&shm_ids(ns).rwsem); + return err; + + out_unlock: +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:40:02.000000000 +0000 +@@ -119,7 +119,7 @@ + + void ipc_init_ids(struct ipc_ids *ids) + { +- init_rwsem(&ids->rw_mutex); ++ init_rwsem(&ids->rwsem); + + ids->in_use = 0; + ids->seq = 0; +@@ -174,7 +174,7 @@ + * @ids: Identifier set + * @key: The key to find + * +- * Requires ipc_ids.rw_mutex locked. ++ * Requires ipc_ids.rwsem locked. + * Returns the LOCKED pointer to the ipc structure if found or NULL + * if not. + * If key is found ipc points to the owning ipc structure +@@ -208,7 +208,7 @@ + * ipc_get_maxid - get the last assigned id + * @ids: IPC identifier set + * +- * Called with ipc_ids.rw_mutex held. ++ * Called with ipc_ids.rwsem held. + */ + + int ipc_get_maxid(struct ipc_ids *ids) +@@ -246,7 +246,7 @@ + * is returned. The 'new' entry is returned in a locked state on success. + * On failure the entry is not locked and a negative err-code is returned. + * +- * Called with writer ipc_ids.rw_mutex held. ++ * Called with writer ipc_ids.rwsem held. + */ + int ipc_addid(struct ipc_ids* ids, struct kern_ipc_perm* new, int size) + { +@@ -312,9 +312,9 @@ + { + int err; + +- down_write(&ids->rw_mutex); ++ down_write(&ids->rwsem); + err = ops->getnew(ns, params); +- up_write(&ids->rw_mutex); ++ up_write(&ids->rwsem); + return err; + } + +@@ -331,7 +331,7 @@ + * + * On success, the IPC id is returned. + * +- * It is called with ipc_ids.rw_mutex and ipcp->lock held. ++ * It is called with ipc_ids.rwsem and ipcp->lock held. + */ + static int ipc_check_perms(struct ipc_namespace *ns, + struct kern_ipc_perm *ipcp, +@@ -376,7 +376,7 @@ + * Take the lock as a writer since we are potentially going to add + * a new entry + read locks are not "upgradable" + */ +- down_write(&ids->rw_mutex); ++ down_write(&ids->rwsem); + ipcp = ipc_findkey(ids, params->key); + if (ipcp == NULL) { + /* key not used */ +@@ -402,7 +402,7 @@ + } + ipc_unlock(ipcp); + } +- up_write(&ids->rw_mutex); ++ up_write(&ids->rwsem); + + return err; + } +@@ -413,7 +413,7 @@ + * @ids: IPC identifier set + * @ipcp: ipc perm structure containing the identifier to remove + * +- * ipc_ids.rw_mutex (as a writer) and the spinlock for this ID are held ++ * ipc_ids.rwsem (as a writer) and the spinlock for this ID are held + * before this function is called, and remain locked on the exit. + */ + +@@ -621,7 +621,7 @@ + } + + /** +- * ipc_lock - Lock an ipc structure without rw_mutex held ++ * ipc_lock - Lock an ipc structure without rwsem held + * @ids: IPC identifier set + * @id: ipc id to look for + * +@@ -748,7 +748,7 @@ + * - performs some audit and permission check, depending on the given cmd + * - returns a pointer to the ipc object or otherwise, the corresponding error. + * +- * Call holding the both the rw_mutex and the rcu read lock. ++ * Call holding the both the rwsem and the rcu read lock. + */ + struct kern_ipc_perm *ipcctl_pre_down_nolock(struct ipc_namespace *ns, + struct ipc_ids *ids, int id, int cmd, +@@ -868,7 +868,7 @@ + * Take the lock - this will be released by the corresponding + * call to stop(). + */ +- down_read(&ids->rw_mutex); ++ down_read(&ids->rwsem); + + /* pos < 0 is invalid */ + if (*pos < 0) +@@ -895,7 +895,7 @@ + + ids = &iter->ns->ids[iface->ids]; + /* Release the lock we took in start() */ +- up_read(&ids->rw_mutex); ++ up_read(&ids->rwsem); + } + + static int sysvipc_proc_show(struct seq_file *s, void *it) +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:39:58.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:40:02.000000000 +0000 +@@ -94,10 +94,10 @@ + #define ipcid_to_idx(id) ((id) % SEQ_MULTIPLIER) + #define ipcid_to_seqx(id) ((id) / SEQ_MULTIPLIER) + +-/* must be called with ids->rw_mutex acquired for writing */ ++/* must be called with ids->rwsem acquired for writing */ + int ipc_addid(struct ipc_ids *, struct kern_ipc_perm *, int); + +-/* must be called with ids->rw_mutex acquired for reading */ ++/* must be called with ids->rwsem acquired for reading */ + int ipc_get_maxid(struct ipc_ids *); + + /* must be called with both locks acquired. */ +Index: linux-3.10-3.10.11/dummy/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1426_33b74669858f3f1982d83015203264b462d845e7.txt 2014-04-28 00:40:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.patch 2014-04-28 00:40:04.000000000 +0000 @@ -0,0 +1,49 @@ +commit c143813735d3246637e4ad60bfd4cf042189b83c +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:25 2013 -0700 + + ipc,msg: drop msg_unlock + + commit 4718787d1f626f45ddb239912bc07266b9880044 upstream. + + There is only one user left, drop this function and just call + ipc_unlock_object() and rcu_read_unlock(). + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:40:04.000000000 +0000 +@@ -70,8 +70,6 @@ + + #define msg_ids(ns) ((ns)->ids[IPC_MSG_IDS]) + +-#define msg_unlock(msq) ipc_unlock(&(msq)->q_perm) +- + static void freeque(struct ipc_namespace *, struct kern_ipc_perm *); + static int newque(struct ipc_namespace *, struct ipc_params *); + #ifdef CONFIG_PROC_FS +@@ -270,7 +268,8 @@ + expunge_all(msq, -EIDRM); + ss_wakeup(&msq->q_senders, 1); + msg_rmid(ns, msq); +- msg_unlock(msq); ++ ipc_unlock_object(&msq->q_perm); ++ rcu_read_unlock(); + + list_for_each_entry_safe(msg, t, &msq->q_messages, m_list) { + atomic_dec(&ns->msg_hdrs); +Index: linux-3.10-3.10.11/dummy/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1427_c143813735d3246637e4ad60bfd4cf042189b83c.txt 2014-04-28 00:40:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.patch 2014-04-28 00:40:05.000000000 +0000 @@ -0,0 +1,49 @@ +commit a5daa172ff0897c52eb4c6da18b092c757264b2f +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:26 2013 -0700 + + ipc: document general ipc locking scheme + + commit 05603c44a7627793219b0bd9a7b236099dc9cd9d upstream. + + As suggested by Andrew, add a generic initial locking scheme used + throughout all sysv ipc mechanisms. Documenting the ids rwsem, how rcu + can be enough to do the initial checks and when to actually acquire the + kern_ipc_perm.lock spinlock. + + I found that adding it to util.c was generic enough. + + Signed-off-by: Davidlohr Bueso + Tested-by: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:40:04.000000000 +0000 +@@ -15,6 +15,14 @@ + * Jun 2006 - namespaces ssupport + * OpenVZ, SWsoft Inc. + * Pavel Emelianov ++ * ++ * General sysv ipc locking scheme: ++ * when doing ipc id lookups, take the ids->rwsem ++ * rcu_read_lock() ++ * obtain the ipc object (kern_ipc_perm) ++ * perform security, capabilities, auditing and permission checks, etc. ++ * acquire the ipc lock (kern_ipc_perm.lock) throught ipc_lock_object() ++ * perform data updates (ie: SET, RMID, LOCK/UNLOCK commands) + */ + + #include +Index: linux-3.10-3.10.11/dummy/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1428_a5daa172ff0897c52eb4c6da18b092c757264b2f.txt 2014-04-28 00:40:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.patch 2014-04-28 00:40:06.000000000 +0000 @@ -0,0 +1,43 @@ +commit 48ec782ce3e59d6ab14a8c1197c19826e61ac8e5 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:28 2013 -0700 + + ipc, shm: guard against non-existant vma in shmdt(2) + + commit 530fcd16d87cd2417c472a581ba5a1e501556c86 upstream. + + When !CONFIG_MMU there's a chance we can derefence a NULL pointer when the + VM area isn't found - check the return value of find_vma(). + + Also, remove the redundant -EINVAL return: retval is set to the proper + return code and *only* changed to 0, when we actually unmap the segments. + + Signed-off-by: Davidlohr Bueso + Cc: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:05.000000000 +0000 +@@ -1288,8 +1288,7 @@ + #else /* CONFIG_MMU */ + /* under NOMMU conditions, the exact address to be destroyed must be + * given */ +- retval = -EINVAL; +- if (vma->vm_start == addr && vma->vm_ops == &shm_vm_ops) { ++ if (vma && vma->vm_start == addr && vma->vm_ops == &shm_vm_ops) { + do_munmap(mm, vma->vm_start, vma->vm_end - vma->vm_start); + retval = 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1429_48ec782ce3e59d6ab14a8c1197c19826e61ac8e5.txt 2014-04-28 00:40:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.patch 2014-04-28 00:40:06.000000000 +0000 @@ -0,0 +1,82 @@ +commit ffa02e67efa1c1bd32ea07a17d74506e5855a50d +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:29 2013 -0700 + + ipc: drop ipc_lock_by_ptr + + commit 32a2750010981216fb788c5190fb0e646abfab30 upstream. + + After previous cleanups and optimizations, this function is no longer + heavily used and we don't have a good reason to keep it. Update the few + remaining callers and get rid of it. + + Signed-off-by: Davidlohr Bueso + Cc: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/namespace.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/namespace.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/namespace.c 2014-04-28 00:40:06.000000000 +0000 +@@ -89,7 +89,8 @@ + perm = idr_find(&ids->ipcs_idr, next_id); + if (perm == NULL) + continue; +- ipc_lock_by_ptr(perm); ++ rcu_read_lock(); ++ ipc_lock_object(perm); + free(ns, perm); + total++; + } +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:40:04.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:40:06.000000000 +0000 +@@ -205,7 +205,8 @@ + continue; + } + +- ipc_lock_by_ptr(ipc); ++ rcu_read_lock(); ++ ipc_lock_object(ipc); + return ipc; + } + +@@ -838,7 +839,8 @@ + ipc = idr_find(&ids->ipcs_idr, pos); + if (ipc != NULL) { + *new_pos = pos + 1; +- ipc_lock_by_ptr(ipc); ++ rcu_read_lock(); ++ ipc_lock_object(ipc); + return ipc; + } + } +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:40:06.000000000 +0000 +@@ -171,12 +171,6 @@ + assert_spin_locked(&perm->lock); + } + +-static inline void ipc_lock_by_ptr(struct kern_ipc_perm *perm) +-{ +- rcu_read_lock(); +- ipc_lock_object(perm); +-} +- + static inline void ipc_unlock(struct kern_ipc_perm *perm) + { + ipc_unlock_object(perm); +Index: linux-3.10-3.10.11/dummy/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1430_ffa02e67efa1c1bd32ea07a17d74506e5855a50d.txt 2014-04-28 00:40:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.patch 2014-04-28 00:40:07.000000000 +0000 @@ -0,0 +1,48 @@ +commit 1129a4810a2499dd02a7bfa657053c55c35140a3 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:30 2013 -0700 + + ipc, shm: drop shm_lock_check + + commit 7a25dd9e042b2b94202a67e5551112f4ac87285a upstream. + + This function was replaced by a the lockless shm_obtain_object_check(), + and no longer has any users. + + Signed-off-by: Davidlohr Bueso + Cc: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:05.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:07.000000000 +0000 +@@ -167,17 +167,6 @@ + ipc_lock_object(&ipcp->shm_perm); + } + +-static inline struct shmid_kernel *shm_lock_check(struct ipc_namespace *ns, +- int id) +-{ +- struct kern_ipc_perm *ipcp = ipc_lock_check(&shm_ids(ns), id); +- +- if (IS_ERR(ipcp)) +- return (struct shmid_kernel *)ipcp; +- +- return container_of(ipcp, struct shmid_kernel, shm_perm); +-} +- + static inline void shm_rmid(struct ipc_namespace *ns, struct shmid_kernel *s) + { + ipc_rmid(&shm_ids(ns), &s->shm_perm); +Index: linux-3.10-3.10.11/dummy/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1431_1129a4810a2499dd02a7bfa657053c55c35140a3.txt 2014-04-28 00:40:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.patch 2014-04-28 00:40:08.000000000 +0000 @@ -0,0 +1,64 @@ +commit c42107e68217f062e4257f0505a8c5b24b6cb9f3 +Author: Davidlohr Bueso +Date: Wed Sep 11 14:26:31 2013 -0700 + + ipc: drop ipc_lock_check + + commit 20b8875abcf2daa1dda5cf70bd6369df5e85d4c1 upstream. + + No remaining users, we now use ipc_obtain_object_check(). + + Signed-off-by: Davidlohr Bueso + Cc: Sedat Dilek + Cc: Rik van Riel + Cc: Manfred Spraul + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:40:06.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:40:07.000000000 +0000 +@@ -686,22 +686,6 @@ + return out; + } + +-struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids, int id) +-{ +- struct kern_ipc_perm *out; +- +- out = ipc_lock(ids, id); +- if (IS_ERR(out)) +- return out; +- +- if (ipc_checkid(out, id)) { +- ipc_unlock(out); +- return ERR_PTR(-EIDRM); +- } +- +- return out; +-} +- + /** + * ipcget - Common sys_*get() code + * @ns : namsepace +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:40:06.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:40:07.000000000 +0000 +@@ -177,7 +177,6 @@ + rcu_read_unlock(); + } + +-struct kern_ipc_perm *ipc_lock_check(struct ipc_ids *ids, int id); + struct kern_ipc_perm *ipc_obtain_object_check(struct ipc_ids *ids, int id); + int ipcget(struct ipc_namespace *ns, struct ipc_ids *ids, + struct ipc_ops *ops, struct ipc_params *params); +Index: linux-3.10-3.10.11/dummy/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1432_c42107e68217f062e4257f0505a8c5b24b6cb9f3.txt 2014-04-28 00:40:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.patch 2014-04-28 00:40:09.000000000 +0000 @@ -0,0 +1,354 @@ +commit e84ca333752636c70cf85711aeef2b2abaac816e +Author: Davidlohr Bueso +Date: Mon Sep 23 17:04:45 2013 -0700 + + ipc: fix race with LSMs + + commit 53dad6d3a8e5ac1af8bacc6ac2134ae1a8b085f1 upstream. + + Currently, IPC mechanisms do security and auditing related checks under + RCU. However, since security modules can free the security structure, + for example, through selinux_[sem,msg_queue,shm]_free_security(), we can + race if the structure is freed before other tasks are done with it, + creating a use-after-free condition. Manfred illustrates this nicely, + for instance with shared mem and selinux: + + -> do_shmat calls rcu_read_lock() + -> do_shmat calls shm_object_check(). + Checks that the object is still valid - but doesn't acquire any locks. + Then it returns. + -> do_shmat calls security_shm_shmat (e.g. selinux_shm_shmat) + -> selinux_shm_shmat calls ipc_has_perm() + -> ipc_has_perm accesses ipc_perms->security + + shm_close() + -> shm_close acquires rw_mutex & shm_lock + -> shm_close calls shm_destroy + -> shm_destroy calls security_shm_free (e.g. selinux_shm_free_security) + -> selinux_shm_free_security calls ipc_free_security(&shp->shm_perm) + -> ipc_free_security calls kfree(ipc_perms->security) + + This patch delays the freeing of the security structures after all RCU + readers are done. Furthermore it aligns the security life cycle with + that of the rest of IPC - freeing them based on the reference counter. + For situations where we need not free security, the current behavior is + kept. Linus states: + + "... the old behavior was suspect for another reason too: having the + security blob go away from under a user sounds like it could cause + various other problems anyway, so I think the old code was at least + _prone_ to bugs even if it didn't have catastrophic behavior." + + I have tested this patch with IPC testcases from LTP on both my + quad-core laptop and on a 64 core NUMA server. In both cases selinux is + enabled, and tests pass for both voluntary and forced preemption models. + While the mentioned races are theoretical (at least no one as reported + them), I wanted to make sure that this new logic doesn't break anything + we weren't aware of. + + Suggested-by: Linus Torvalds + Signed-off-by: Davidlohr Bueso + Acked-by: Manfred Spraul + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:40:04.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:40:08.000000000 +0000 +@@ -165,6 +165,15 @@ + ipc_rmid(&msg_ids(ns), &s->q_perm); + } + ++static void msg_rcu_free(struct rcu_head *head) ++{ ++ struct ipc_rcu *p = container_of(head, struct ipc_rcu, rcu); ++ struct msg_queue *msq = ipc_rcu_to_struct(p); ++ ++ security_msg_queue_free(msq); ++ ipc_rcu_free(head); ++} ++ + /** + * newque - Create a new msg queue + * @ns: namespace +@@ -189,15 +198,14 @@ + msq->q_perm.security = NULL; + retval = security_msg_queue_alloc(msq); + if (retval) { +- ipc_rcu_putref(msq); ++ ipc_rcu_putref(msq, ipc_rcu_free); + return retval; + } + + /* ipc_addid() locks msq upon success. */ + id = ipc_addid(&msg_ids(ns), &msq->q_perm, ns->msg_ctlmni); + if (id < 0) { +- security_msg_queue_free(msq); +- ipc_rcu_putref(msq); ++ ipc_rcu_putref(msq, msg_rcu_free); + return id; + } + +@@ -276,8 +284,7 @@ + free_msg(msg); + } + atomic_sub(msq->q_cbytes, &ns->msg_bytes); +- security_msg_queue_free(msq); +- ipc_rcu_putref(msq); ++ ipc_rcu_putref(msq, msg_rcu_free); + } + + /* +@@ -717,7 +724,7 @@ + rcu_read_lock(); + ipc_lock_object(&msq->q_perm); + +- ipc_rcu_putref(msq); ++ ipc_rcu_putref(msq, ipc_rcu_free); + if (msq->q_perm.deleted) { + err = -EIDRM; + goto out_unlock0; +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:40:02.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:08.000000000 +0000 +@@ -243,6 +243,15 @@ + } + } + ++static void sem_rcu_free(struct rcu_head *head) ++{ ++ struct ipc_rcu *p = container_of(head, struct ipc_rcu, rcu); ++ struct sem_array *sma = ipc_rcu_to_struct(p); ++ ++ security_sem_free(sma); ++ ipc_rcu_free(head); ++} ++ + /* + * If the request contains only one semaphore operation, and there are + * no complex transactions pending, lock only the semaphore involved. +@@ -374,12 +383,7 @@ + static inline void sem_lock_and_putref(struct sem_array *sma) + { + sem_lock(sma, NULL, -1); +- ipc_rcu_putref(sma); +-} +- +-static inline void sem_putref(struct sem_array *sma) +-{ +- ipc_rcu_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + } + + static inline void sem_rmid(struct ipc_namespace *ns, struct sem_array *s) +@@ -458,14 +462,13 @@ + sma->sem_perm.security = NULL; + retval = security_sem_alloc(sma); + if (retval) { +- ipc_rcu_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + return retval; + } + + id = ipc_addid(&sem_ids(ns), &sma->sem_perm, ns->sc_semmni); + if (id < 0) { +- security_sem_free(sma); +- ipc_rcu_putref(sma); ++ ipc_rcu_putref(sma, sem_rcu_free); + return id; + } + ns->used_sems += nsems; +@@ -1047,8 +1050,7 @@ + + wake_up_sem_queue_do(&tasks); + ns->used_sems -= sma->sem_nsems; +- security_sem_free(sma); +- ipc_rcu_putref(sma); ++ ipc_rcu_putref(sma, sem_rcu_free); + } + + static unsigned long copy_semid_to_user(void __user *buf, struct semid64_ds *in, int version) +@@ -1292,7 +1294,7 @@ + rcu_read_unlock(); + sem_io = ipc_alloc(sizeof(ushort)*nsems); + if(sem_io == NULL) { +- sem_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + return -ENOMEM; + } + +@@ -1328,20 +1330,20 @@ + if(nsems > SEMMSL_FAST) { + sem_io = ipc_alloc(sizeof(ushort)*nsems); + if(sem_io == NULL) { +- sem_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + return -ENOMEM; + } + } + + if (copy_from_user (sem_io, p, nsems*sizeof(ushort))) { +- sem_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + err = -EFAULT; + goto out_free; + } + + for (i = 0; i < nsems; i++) { + if (sem_io[i] > SEMVMX) { +- sem_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + err = -ERANGE; + goto out_free; + } +@@ -1629,7 +1631,7 @@ + /* step 2: allocate new undo structure */ + new = kzalloc(sizeof(struct sem_undo) + sizeof(short)*nsems, GFP_KERNEL); + if (!new) { +- sem_putref(sma); ++ ipc_rcu_putref(sma, ipc_rcu_free); + return ERR_PTR(-ENOMEM); + } + +Index: linux-3.10-3.10.11/ipc/shm.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/shm.c 2014-04-28 00:40:07.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/shm.c 2014-04-28 00:40:08.000000000 +0000 +@@ -167,6 +167,15 @@ + ipc_lock_object(&ipcp->shm_perm); + } + ++static void shm_rcu_free(struct rcu_head *head) ++{ ++ struct ipc_rcu *p = container_of(head, struct ipc_rcu, rcu); ++ struct shmid_kernel *shp = ipc_rcu_to_struct(p); ++ ++ security_shm_free(shp); ++ ipc_rcu_free(head); ++} ++ + static inline void shm_rmid(struct ipc_namespace *ns, struct shmid_kernel *s) + { + ipc_rmid(&shm_ids(ns), &s->shm_perm); +@@ -208,8 +217,7 @@ + user_shm_unlock(file_inode(shp->shm_file)->i_size, + shp->mlock_user); + fput (shp->shm_file); +- security_shm_free(shp); +- ipc_rcu_putref(shp); ++ ipc_rcu_putref(shp, shm_rcu_free); + } + + /* +@@ -497,7 +505,7 @@ + shp->shm_perm.security = NULL; + error = security_shm_alloc(shp); + if (error) { +- ipc_rcu_putref(shp); ++ ipc_rcu_putref(shp, ipc_rcu_free); + return error; + } + +@@ -566,8 +574,7 @@ + user_shm_unlock(size, shp->mlock_user); + fput(file); + no_file: +- security_shm_free(shp); +- ipc_rcu_putref(shp); ++ ipc_rcu_putref(shp, shm_rcu_free); + return error; + } + +Index: linux-3.10-3.10.11/ipc/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.c 2014-04-28 00:40:07.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.c 2014-04-28 00:40:08.000000000 +0000 +@@ -474,11 +474,6 @@ + kfree(ptr); + } + +-struct ipc_rcu { +- struct rcu_head rcu; +- atomic_t refcount; +-} ____cacheline_aligned_in_smp; +- + /** + * ipc_rcu_alloc - allocate ipc and rcu space + * @size: size desired +@@ -505,27 +500,24 @@ + return atomic_inc_not_zero(&p->refcount); + } + +-/** +- * ipc_schedule_free - free ipc + rcu space +- * @head: RCU callback structure for queued work +- */ +-static void ipc_schedule_free(struct rcu_head *head) +-{ +- vfree(container_of(head, struct ipc_rcu, rcu)); +-} +- +-void ipc_rcu_putref(void *ptr) ++void ipc_rcu_putref(void *ptr, void (*func)(struct rcu_head *head)) + { + struct ipc_rcu *p = ((struct ipc_rcu *)ptr) - 1; + + if (!atomic_dec_and_test(&p->refcount)) + return; + +- if (is_vmalloc_addr(ptr)) { +- call_rcu(&p->rcu, ipc_schedule_free); +- } else { +- kfree_rcu(p, rcu); +- } ++ call_rcu(&p->rcu, func); ++} ++ ++void ipc_rcu_free(struct rcu_head *head) ++{ ++ struct ipc_rcu *p = container_of(head, struct ipc_rcu, rcu); ++ ++ if (is_vmalloc_addr(p)) ++ vfree(p); ++ else ++ kfree(p); + } + + /** +Index: linux-3.10-3.10.11/ipc/util.h +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/util.h 2014-04-28 00:40:07.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/util.h 2014-04-28 00:40:08.000000000 +0000 +@@ -47,6 +47,13 @@ + static inline void shm_exit_ns(struct ipc_namespace *ns) { } + #endif + ++struct ipc_rcu { ++ struct rcu_head rcu; ++ atomic_t refcount; ++} ____cacheline_aligned_in_smp; ++ ++#define ipc_rcu_to_struct(p) ((void *)(p+1)) ++ + /* + * Structure that holds the parameters needed by the ipc operations + * (see after) +@@ -120,7 +127,8 @@ + */ + void* ipc_rcu_alloc(int size); + int ipc_rcu_getref(void *ptr); +-void ipc_rcu_putref(void *ptr); ++void ipc_rcu_putref(void *ptr, void (*func)(struct rcu_head *head)); ++void ipc_rcu_free(struct rcu_head *head); + + struct kern_ipc_perm *ipc_lock(struct ipc_ids *, int); + struct kern_ipc_perm *ipc_obtain_object(struct ipc_ids *ids, int id); +Index: linux-3.10-3.10.11/dummy/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1433_e84ca333752636c70cf85711aeef2b2abaac816e.txt 2014-04-28 00:40:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.patch 2014-04-28 00:40:10.000000000 +0000 @@ -0,0 +1,252 @@ +commit 184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4 +Author: Manfred Spraul +Date: Mon Sep 30 13:45:04 2013 -0700 + + ipc/sem.c: fix race in sem_lock() + + commit 5e9d527591421ccdb16acb8c23662231135d8686 upstream. + + The exclusion of complex operations in sem_lock() is insufficient: after + acquiring the per-semaphore lock, a simple op must first check that + sem_perm.lock is not locked and only after that test check + complex_count. The current code does it the other way around - and that + creates a race. Details are below. + + The patch is a complete rewrite of sem_lock(), based in part on the code + from Mike Galbraith. It removes all gotos and all loops and thus the + risk of livelocks. + + I have tested the patch (together with the next one) on my i3 laptop and + it didn't cause any problems. + + The bug is probably also present in 3.10 and 3.11, but for these kernels + it might be simpler just to move the test of sma->complex_count after + the spin_is_locked() test. + + Details of the bug: + + Assume: + - sma->complex_count = 0. + - Thread 1: semtimedop(complex op that must sleep) + - Thread 2: semtimedop(simple op). + + Pseudo-Trace: + + Thread 1: sem_lock(): acquire sem_perm.lock + Thread 1: sem_lock(): check for ongoing simple ops + Nothing ongoing, thread 2 is still before sem_lock(). + Thread 1: try_atomic_semop() + <<< preempted. + + Thread 2: sem_lock(): + static inline int sem_lock(struct sem_array *sma, struct sembuf *sops, + int nsops) + { + int locknum; + again: + if (nsops == 1 && !sma->complex_count) { + struct sem *sem = sma->sem_base + sops->sem_num; + + /* Lock just the semaphore we are interested in. */ + spin_lock(&sem->lock); + + /* + * If sma->complex_count was set while we were spinning, + * we may need to look at things we did not lock here. + */ + if (unlikely(sma->complex_count)) { + spin_unlock(&sem->lock); + goto lock_array; + } + <<<<<<<<< + <<< complex_count is still 0. + <<< + <<< Here it is preempted + <<<<<<<<< + + Thread 1: try_atomic_semop() returns, notices that it must sleep. + Thread 1: increases sma->complex_count. + Thread 1: drops sem_perm.lock + Thread 2: + /* + * Another process is holding the global lock on the + * sem_array; we cannot enter our critical section, + * but have to wait for the global lock to be released. + */ + if (unlikely(spin_is_locked(&sma->sem_perm.lock))) { + spin_unlock(&sem->lock); + spin_unlock_wait(&sma->sem_perm.lock); + goto again; + } + <<< sem_perm.lock already dropped, thus no "goto again;" + + locknum = sops->sem_num; + + Signed-off-by: Manfred Spraul + Cc: Mike Galbraith + Cc: Rik van Riel + Cc: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:09.000000000 +0000 +@@ -253,70 +253,104 @@ + } + + /* ++ * Wait until all currently ongoing simple ops have completed. ++ * Caller must own sem_perm.lock. ++ * New simple ops cannot start, because simple ops first check ++ * that sem_perm.lock is free. ++ */ ++static void sem_wait_array(struct sem_array *sma) ++{ ++ int i; ++ struct sem *sem; ++ ++ for (i = 0; i < sma->sem_nsems; i++) { ++ sem = sma->sem_base + i; ++ spin_unlock_wait(&sem->lock); ++ } ++} ++ ++/* + * If the request contains only one semaphore operation, and there are + * no complex transactions pending, lock only the semaphore involved. + * Otherwise, lock the entire semaphore array, since we either have + * multiple semaphores in our own semops, or we need to look at + * semaphores from other pending complex operations. +- * +- * Carefully guard against sma->complex_count changing between zero +- * and non-zero while we are spinning for the lock. The value of +- * sma->complex_count cannot change while we are holding the lock, +- * so sem_unlock should be fine. +- * +- * The global lock path checks that all the local locks have been released, +- * checking each local lock once. This means that the local lock paths +- * cannot start their critical sections while the global lock is held. + */ + static inline int sem_lock(struct sem_array *sma, struct sembuf *sops, + int nsops) + { +- int locknum; +- again: +- if (nsops == 1 && !sma->complex_count) { +- struct sem *sem = sma->sem_base + sops->sem_num; ++ struct sem *sem; + +- /* Lock just the semaphore we are interested in. */ +- spin_lock(&sem->lock); ++ if (nsops != 1) { ++ /* Complex operation - acquire a full lock */ ++ ipc_lock_object(&sma->sem_perm); + +- /* +- * If sma->complex_count was set while we were spinning, +- * we may need to look at things we did not lock here. ++ /* And wait until all simple ops that are processed ++ * right now have dropped their locks. + */ +- if (unlikely(sma->complex_count)) { +- spin_unlock(&sem->lock); +- goto lock_array; +- } ++ sem_wait_array(sma); ++ return -1; ++ } ++ ++ /* ++ * Only one semaphore affected - try to optimize locking. ++ * The rules are: ++ * - optimized locking is possible if no complex operation ++ * is either enqueued or processed right now. ++ * - The test for enqueued complex ops is simple: ++ * sma->complex_count != 0 ++ * - Testing for complex ops that are processed right now is ++ * a bit more difficult. Complex ops acquire the full lock ++ * and first wait that the running simple ops have completed. ++ * (see above) ++ * Thus: If we own a simple lock and the global lock is free ++ * and complex_count is now 0, then it will stay 0 and ++ * thus just locking sem->lock is sufficient. ++ */ ++ sem = sma->sem_base + sops->sem_num; + ++ if (sma->complex_count == 0) { + /* +- * Another process is holding the global lock on the +- * sem_array; we cannot enter our critical section, +- * but have to wait for the global lock to be released. ++ * It appears that no complex operation is around. ++ * Acquire the per-semaphore lock. + */ +- if (unlikely(spin_is_locked(&sma->sem_perm.lock))) { +- spin_unlock(&sem->lock); +- spin_unlock_wait(&sma->sem_perm.lock); +- goto again; ++ spin_lock(&sem->lock); ++ ++ /* Then check that the global lock is free */ ++ if (!spin_is_locked(&sma->sem_perm.lock)) { ++ /* spin_is_locked() is not a memory barrier */ ++ smp_mb(); ++ ++ /* Now repeat the test of complex_count: ++ * It can't change anymore until we drop sem->lock. ++ * Thus: if is now 0, then it will stay 0. ++ */ ++ if (sma->complex_count == 0) { ++ /* fast path successful! */ ++ return sops->sem_num; ++ } + } ++ spin_unlock(&sem->lock); ++ } ++ ++ /* slow path: acquire the full lock */ ++ ipc_lock_object(&sma->sem_perm); + +- locknum = sops->sem_num; ++ if (sma->complex_count == 0) { ++ /* False alarm: ++ * There is no complex operation, thus we can switch ++ * back to the fast path. ++ */ ++ spin_lock(&sem->lock); ++ ipc_unlock_object(&sma->sem_perm); ++ return sops->sem_num; + } else { +- int i; +- /* +- * Lock the semaphore array, and wait for all of the +- * individual semaphore locks to go away. The code +- * above ensures no new single-lock holders will enter +- * their critical section while the array lock is held. ++ /* Not a false alarm, thus complete the sequence for a ++ * full lock. + */ +- lock_array: +- ipc_lock_object(&sma->sem_perm); +- for (i = 0; i < sma->sem_nsems; i++) { +- struct sem *sem = sma->sem_base + i; +- spin_unlock_wait(&sem->lock); +- } +- locknum = -1; ++ sem_wait_array(sma); ++ return -1; + } +- return locknum; + } + + static inline void sem_unlock(struct sem_array *sma, int locknum) +Index: linux-3.10-3.10.11/dummy/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1434_184076a9f9306c9bef6843bf4cc7b7e15b8fc7b4.txt 2014-04-28 00:40:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.patch 2014-04-28 00:40:10.000000000 +0000 @@ -0,0 +1,58 @@ +commit 901f6fedc5340d66e2ca67c70dfee926cb5a1ea0 +Author: Manfred Spraul +Date: Mon Sep 30 13:45:06 2013 -0700 + + ipc/sem.c: optimize sem_lock() + + commit 6d07b68ce16ae9535955ba2059dedba5309c3ca1 upstream. + + Operations that need access to the whole array must guarantee that there + are no simple operations ongoing. Right now this is achieved by + spin_unlock_wait(sem->lock) on all semaphores. + + If complex_count is nonzero, then this spin_unlock_wait() is not + necessary, because it was already performed in the past by the thread + that increased complex_count and even though sem_perm.lock was dropped + inbetween, no simple operation could have started, because simple + operations cannot start when complex_count is non-zero. + + Signed-off-by: Manfred Spraul + Cc: Mike Galbraith + Cc: Rik van Riel + Reviewed-by: Davidlohr Bueso + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Mike Galbraith + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:40:09.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:10.000000000 +0000 +@@ -257,12 +257,20 @@ + * Caller must own sem_perm.lock. + * New simple ops cannot start, because simple ops first check + * that sem_perm.lock is free. ++ * that a) sem_perm.lock is free and b) complex_count is 0. + */ + static void sem_wait_array(struct sem_array *sma) + { + int i; + struct sem *sem; + ++ if (sma->complex_count) { ++ /* The thread that increased sma->complex_count waited on ++ * all sem->lock locks. Thus we don't need to wait again. ++ */ ++ return; ++ } ++ + for (i = 0; i < sma->sem_nsems; i++) { + sem = sma->sem_base + i; + spin_unlock_wait(&sem->lock); +Index: linux-3.10-3.10.11/dummy/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1435_901f6fedc5340d66e2ca67c70dfee926cb5a1ea0.txt 2014-04-28 00:40:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.patch 2014-04-28 00:40:11.000000000 +0000 @@ -0,0 +1,49 @@ +commit 83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e +Author: Manfred Spraul +Date: Mon Sep 30 13:45:07 2013 -0700 + + ipc/sem.c: synchronize the proc interface + + commit d8c633766ad88527f25d9f81a5c2f083d78a2b39 upstream. + + The proc interface is not aware of sem_lock(), it instead calls + ipc_lock_object() directly. This means that simple semop() operations + can run in parallel with the proc interface. Right now, this is + uncritical, because the implementation doesn't do anything that requires + a proper synchronization. + + But it is dangerous and therefore should be fixed. + + Signed-off-by: Manfred Spraul + Cc: Davidlohr Bueso + Cc: Mike Galbraith + Cc: Rik van Riel + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:40:10.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:11.000000000 +0000 +@@ -2103,6 +2103,14 @@ + struct sem_array *sma = it; + time_t sem_otime; + ++ /* ++ * The proc interface isn't aware of sem_lock(), it calls ++ * ipc_lock_object() directly (in sysvipc_find_ipc). ++ * In order to stay compatible with sem_lock(), we must wait until ++ * all simple semop() calls have left their critical regions. ++ */ ++ sem_wait_array(sma); ++ + sem_otime = get_semotime(sma); + + return seq_printf(s, +Index: linux-3.10-3.10.11/dummy/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1436_83aeb6e3449cc54fa8867a0c9cc1b8d2484fa91e.txt 2014-04-28 00:40:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.patch --- linux-3.10.11/debian/patches/rpi/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.patch 2014-04-28 00:40:12.000000000 +0000 @@ -0,0 +1,106 @@ +commit e556ea0191d648c63fbc4fe24bbfb15ad872a205 +Author: Manfred Spraul +Date: Mon Sep 30 13:45:25 2013 -0700 + + ipc/sem.c: update sem_otime for all operations + + commit 0e8c665699e953fa58dc1b0b0d09e5dce7343cc7 upstream. + + In commit 0a2b9d4c7967 ("ipc/sem.c: move wake_up_process out of the + spinlock section"), the update of semaphore's sem_otime(last semop time) + was moved to one central position (do_smart_update). + + But since do_smart_update() is only called for operations that modify + the array, this means that wait-for-zero semops do not update sem_otime + anymore. + + The fix is simple: + Non-alter operations must update sem_otime. + + [akpm@linux-foundation.org: coding-style fixes] + Signed-off-by: Manfred Spraul + Reported-by: Jia He + Tested-by: Jia He + Cc: Davidlohr Bueso + Cc: Mike Galbraith + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/sem.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/sem.c 2014-04-28 00:40:11.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/sem.c 2014-04-28 00:40:11.000000000 +0000 +@@ -918,6 +918,24 @@ + } + + /** ++ * set_semotime(sma, sops) - set sem_otime ++ * @sma: semaphore array ++ * @sops: operations that modified the array, may be NULL ++ * ++ * sem_otime is replicated to avoid cache line trashing. ++ * This function sets one instance to the current time. ++ */ ++static void set_semotime(struct sem_array *sma, struct sembuf *sops) ++{ ++ if (sops == NULL) { ++ sma->sem_base[0].sem_otime = get_seconds(); ++ } else { ++ sma->sem_base[sops[0].sem_num].sem_otime = ++ get_seconds(); ++ } ++} ++ ++/** + * do_smart_update(sma, sops, nsops, otime, pt) - optimized update_queue + * @sma: semaphore array + * @sops: operations that were performed +@@ -967,17 +985,10 @@ + } + } + } +- if (otime) { +- if (sops == NULL) { +- sma->sem_base[0].sem_otime = get_seconds(); +- } else { +- sma->sem_base[sops[0].sem_num].sem_otime = +- get_seconds(); +- } +- } ++ if (otime) ++ set_semotime(sma, sops); + } + +- + /* The following counts are associated to each semaphore: + * semncnt number of tasks waiting on semval being nonzero + * semzcnt number of tasks waiting on semval being zero +@@ -1839,12 +1850,17 @@ + + error = perform_atomic_semop(sma, sops, nsops, un, + task_tgid_vnr(current)); +- if (error <= 0) { +- if (alter && error == 0) ++ if (error == 0) { ++ /* If the operation was successful, then do ++ * the required updates. ++ */ ++ if (alter) + do_smart_update(sma, sops, nsops, 1, &tasks); +- +- goto out_unlock_free; ++ else ++ set_semotime(sma, sops); + } ++ if (error <= 0) ++ goto out_unlock_free; + + /* We need to sleep on this operation, so we put the current + * task into the pending queue and go to sleep. +Index: linux-3.10-3.10.11/dummy/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1437_e556ea0191d648c63fbc4fe24bbfb15ad872a205.txt 2014-04-28 00:40:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.patch 2014-04-28 00:40:13.000000000 +0000 @@ -0,0 +1,72 @@ +commit 3232569ecd21ad181bd070acdb27ac5ccd54494c +Author: Davidlohr Bueso +Date: Mon Sep 30 13:45:26 2013 -0700 + + ipc,msg: prevent race with rmid in msgsnd,msgrcv + + commit 4271b05a227dc6175b66c3d9941aeab09048aeb2 upstream. + + This fixes a race in both msgrcv() and msgsnd() between finding the msg + and actually dealing with the queue, as another thread can delete shmid + underneath us if we are preempted before acquiring the + kern_ipc_perm.lock. + + Manfred illustrates this nicely: + + Assume a preemptible kernel that is preempted just after + + msq = msq_obtain_object_check(ns, msqid) + + in do_msgrcv(). The only lock that is held is rcu_read_lock(). + + Now the other thread processes IPC_RMID. When the first task is + resumed, then it will happily wait for messages on a deleted queue. + + Fix this by checking for if the queue has been deleted after taking the + lock. + + Signed-off-by: Davidlohr Bueso + Reported-by: Manfred Spraul + Cc: Rik van Riel + Cc: Mike Galbraith + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/ipc/msg.c +=================================================================== +--- linux-3.10-3.10.11.orig/ipc/msg.c 2014-04-28 00:40:08.000000000 +0000 ++++ linux-3.10-3.10.11/ipc/msg.c 2014-04-28 00:40:12.000000000 +0000 +@@ -695,6 +695,12 @@ + if (ipcperms(ns, &msq->q_perm, S_IWUGO)) + goto out_unlock0; + ++ /* raced with RMID? */ ++ if (msq->q_perm.deleted) { ++ err = -EIDRM; ++ goto out_unlock0; ++ } ++ + err = security_msg_queue_msgsnd(msq, msg, msgflg); + if (err) + goto out_unlock0; +@@ -901,6 +907,13 @@ + goto out_unlock1; + + ipc_lock_object(&msq->q_perm); ++ ++ /* raced with RMID? */ ++ if (msq->q_perm.deleted) { ++ msg = ERR_PTR(-EIDRM); ++ goto out_unlock0; ++ } ++ + msg = find_msg(msq, &msgtyp, mode); + if (!IS_ERR(msg)) { + /* +Index: linux-3.10-3.10.11/dummy/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1438_3232569ecd21ad181bd070acdb27ac5ccd54494c.txt 2014-04-28 00:40:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1439_954acd2b6df732230608d260779ef6d545534929.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1439_954acd2b6df732230608d260779ef6d545534929.patch --- linux-3.10.11/debian/patches/rpi/rpi_1439_954acd2b6df732230608d260779ef6d545534929.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1439_954acd2b6df732230608d260779ef6d545534929.patch 2014-04-28 00:40:14.000000000 +0000 @@ -0,0 +1,114 @@ +commit 954acd2b6df732230608d260779ef6d545534929 +Author: Linn Crosetto +Date: Tue Aug 13 15:46:41 2013 -0600 + + x86: avoid remapping data in parse_setup_data() + + commit 30e46b574a1db7d14404e52dca8e1aa5f5155fd2 upstream. + + Type SETUP_PCI, added by setup_efi_pci(), may advertise a ROM size + larger than early_memremap() is able to handle, which is currently + limited to 256kB. If this occurs it leads to a NULL dereference in + parse_setup_data(). + + To avoid this, remap the setup_data header and allow parsing functions + for individual types to handle their own data remapping. + + Signed-off-by: Linn Crosetto + Link: http://lkml.kernel.org/r/1376430401-67445-1-git-send-email-linn@hp.com + Acked-by: Yinghai Lu + Reviewed-by: Pekka Enberg + Signed-off-by: H. Peter Anvin + Cc: Paul Gortmaker + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/include/asm/e820.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/include/asm/e820.h 2014-04-27 23:38:06.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/include/asm/e820.h 2014-04-28 00:40:13.000000000 +0000 +@@ -29,7 +29,7 @@ + extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize, + unsigned long start_addr, unsigned long long end_addr); + struct setup_data; +-extern void parse_e820_ext(struct setup_data *data); ++extern void parse_e820_ext(u64 phys_addr, u32 data_len); + + #if defined(CONFIG_X86_64) || \ + (defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION)) +Index: linux-3.10-3.10.11/arch/x86/kernel/e820.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/e820.c 2014-04-27 23:38:06.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/e820.c 2014-04-28 00:40:13.000000000 +0000 +@@ -658,15 +658,18 @@ + * boot_params.e820_map, others are passed via SETUP_E820_EXT node of + * linked list of struct setup_data, which is parsed here. + */ +-void __init parse_e820_ext(struct setup_data *sdata) ++void __init parse_e820_ext(u64 phys_addr, u32 data_len) + { + int entries; + struct e820entry *extmap; ++ struct setup_data *sdata; + ++ sdata = early_memremap(phys_addr, data_len); + entries = sdata->len / sizeof(struct e820entry); + extmap = (struct e820entry *)(sdata->data); + __append_e820_map(extmap, entries); + sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map); ++ early_iounmap(sdata, data_len); + printk(KERN_INFO "e820: extended physical RAM map:\n"); + e820_print_map("extended"); + } +Index: linux-3.10-3.10.11/arch/x86/kernel/setup.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/setup.c 2014-04-27 23:38:06.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/setup.c 2014-04-28 00:40:13.000000000 +0000 +@@ -426,25 +426,23 @@ + static void __init parse_setup_data(void) + { + struct setup_data *data; +- u64 pa_data; ++ u64 pa_data, pa_next; + + pa_data = boot_params.hdr.setup_data; + while (pa_data) { +- u32 data_len, map_len; ++ u32 data_len, map_len, data_type; + + map_len = max(PAGE_SIZE - (pa_data & ~PAGE_MASK), + (u64)sizeof(struct setup_data)); + data = early_memremap(pa_data, map_len); + data_len = data->len + sizeof(struct setup_data); +- if (data_len > map_len) { +- early_iounmap(data, map_len); +- data = early_memremap(pa_data, data_len); +- map_len = data_len; +- } ++ data_type = data->type; ++ pa_next = data->next; ++ early_iounmap(data, map_len); + +- switch (data->type) { ++ switch (data_type) { + case SETUP_E820_EXT: +- parse_e820_ext(data); ++ parse_e820_ext(pa_data, data_len); + break; + case SETUP_DTB: + add_dtb(pa_data); +@@ -452,8 +450,7 @@ + default: + break; + } +- pa_data = data->next; +- early_iounmap(data, map_len); ++ pa_data = pa_next; + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1439_954acd2b6df732230608d260779ef6d545534929.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1439_954acd2b6df732230608d260779ef6d545534929.txt 2014-04-28 00:40:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.patch --- linux-3.10.11/debian/patches/rpi/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.patch 2014-04-28 00:40:14.000000000 +0000 @@ -0,0 +1,24 @@ +commit 14e9c7db465387ede7f019c42f28c90f99fc2793 +Author: Greg Kroah-Hartman +Date: Fri Oct 18 10:44:19 2013 -0700 + + Linux 3.10.17 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:39:17.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:40:14.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 16 ++SUBLEVEL = 17 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1440_14e9c7db465387ede7f019c42f28c90f99fc2793.txt 2014-04-28 00:40:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.patch 2014-04-28 00:40:16.000000000 +0000 @@ -0,0 +1,282 @@ +commit 5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d +Author: Eric Dumazet +Date: Tue Aug 27 05:46:32 2013 -0700 + + tcp: TSO packets automatic sizing + + [ Upstream commits 6d36824e730f247b602c90e8715a792003e3c5a7, + 02cf4ebd82ff0ac7254b88e466820a290ed8289a, and parts of + 7eec4174ff29cd42f2acfae8112f51c228545d40 ] + + After hearing many people over past years complaining against TSO being + bursty or even buggy, we are proud to present automatic sizing of TSO + packets. + + One part of the problem is that tcp_tso_should_defer() uses an heuristic + relying on upcoming ACKS instead of a timer, but more generally, having + big TSO packets makes little sense for low rates, as it tends to create + micro bursts on the network, and general consensus is to reduce the + buffering amount. + + This patch introduces a per socket sk_pacing_rate, that approximates + the current sending rate, and allows us to size the TSO packets so + that we try to send one packet every ms. + + This field could be set by other transports. + + Patch has no impact for high speed flows, where having large TSO packets + makes sense to reach line rate. + + For other flows, this helps better packet scheduling and ACK clocking. + + This patch increases performance of TCP flows in lossy environments. + + A new sysctl (tcp_min_tso_segs) is added, to specify the + minimal size of a TSO packet (default being 2). + + A follow-up patch will provide a new packet scheduler (FQ), using + sk_pacing_rate as an input to perform optional per flow pacing. + + This explains why we chose to set sk_pacing_rate to twice the current + rate, allowing 'slow start' ramp up. + + sk_pacing_rate = 2 * cwnd * mss / srtt + + v2: Neal Cardwell reported a suspect deferring of last two segments on + initial write of 10 MSS, I had to change tcp_tso_should_defer() to take + into account tp->xmit_size_goal_segs + + Signed-off-by: Eric Dumazet + Cc: Neal Cardwell + Cc: Yuchung Cheng + Cc: Van Jacobson + Cc: Tom Herbert + Acked-by: Yuchung Cheng + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/Documentation/networking/ip-sysctl.txt +=================================================================== +--- linux-3.10-3.10.11.orig/Documentation/networking/ip-sysctl.txt 2014-04-27 23:38:05.000000000 +0000 ++++ linux-3.10-3.10.11/Documentation/networking/ip-sysctl.txt 2014-04-28 00:40:15.000000000 +0000 +@@ -478,6 +478,15 @@ + tcp_timestamps - BOOLEAN + Enable timestamps as defined in RFC1323. + ++tcp_min_tso_segs - INTEGER ++ Minimal number of segments per TSO frame. ++ Since linux-3.12, TCP does an automatic sizing of TSO frames, ++ depending on flow rate, instead of filling 64Kbytes packets. ++ For specific usages, it's possible to force TCP to build big ++ TSO frames. Note that TCP stack might split too big TSO packets ++ if available window is too small. ++ Default: 2 ++ + tcp_tso_win_divisor - INTEGER + This allows control over what percentage of the congestion window + can be consumed by a single TSO frame. +Index: linux-3.10-3.10.11/include/net/sock.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/sock.h 2014-04-27 23:38:05.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/sock.h 2014-04-28 00:40:15.000000000 +0000 +@@ -230,6 +230,7 @@ + * @sk_wmem_queued: persistent queue size + * @sk_forward_alloc: space allocated forward + * @sk_allocation: allocation mode ++ * @sk_pacing_rate: Pacing rate (if supported by transport/packet scheduler) + * @sk_sndbuf: size of send buffer in bytes + * @sk_flags: %SO_LINGER (l_onoff), %SO_BROADCAST, %SO_KEEPALIVE, + * %SO_OOBINLINE settings, %SO_TIMESTAMPING settings +@@ -355,6 +356,7 @@ + kmemcheck_bitfield_end(flags); + int sk_wmem_queued; + gfp_t sk_allocation; ++ u32 sk_pacing_rate; /* bytes per second */ + netdev_features_t sk_route_caps; + netdev_features_t sk_route_nocaps; + int sk_gso_type; +Index: linux-3.10-3.10.11/include/net/tcp.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/tcp.h 2014-04-27 23:38:05.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/tcp.h 2014-04-28 00:40:15.000000000 +0000 +@@ -287,6 +287,7 @@ + extern int sysctl_tcp_early_retrans; + extern int sysctl_tcp_limit_output_bytes; + extern int sysctl_tcp_challenge_ack_limit; ++extern int sysctl_tcp_min_tso_segs; + + extern atomic_long_t tcp_memory_allocated; + extern struct percpu_counter tcp_sockets_allocated; +Index: linux-3.10-3.10.11/net/core/sock.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/sock.c 2014-04-27 23:38:05.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/sock.c 2014-04-28 00:40:15.000000000 +0000 +@@ -2271,6 +2271,7 @@ + + sk->sk_stamp = ktime_set(-1L, 0); + ++ sk->sk_pacing_rate = ~0U; + /* + * Before updating sk_refcnt, we must commit prior changes to memory + * (Documentation/RCU/rculist_nulls.txt for details) +Index: linux-3.10-3.10.11/net/ipv4/sysctl_net_ipv4.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/sysctl_net_ipv4.c 2014-04-27 23:38:05.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/sysctl_net_ipv4.c 2014-04-28 00:40:15.000000000 +0000 +@@ -29,6 +29,7 @@ + static int zero; + static int one = 1; + static int four = 4; ++static int gso_max_segs = GSO_MAX_SEGS; + static int tcp_retr1_max = 255; + static int ip_local_port_range_min[] = { 1, 1 }; + static int ip_local_port_range_max[] = { 65535, 65535 }; +@@ -753,6 +754,15 @@ + .extra2 = &four, + }, + { ++ .procname = "tcp_min_tso_segs", ++ .data = &sysctl_tcp_min_tso_segs, ++ .maxlen = sizeof(int), ++ .mode = 0644, ++ .proc_handler = proc_dointvec_minmax, ++ .extra1 = &zero, ++ .extra2 = &gso_max_segs, ++ }, ++ { + .procname = "udp_mem", + .data = &sysctl_udp_mem, + .maxlen = sizeof(sysctl_udp_mem), +Index: linux-3.10-3.10.11/net/ipv4/tcp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp.c 2014-04-28 00:37:51.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp.c 2014-04-28 00:40:15.000000000 +0000 +@@ -282,6 +282,8 @@ + + int sysctl_tcp_fin_timeout __read_mostly = TCP_FIN_TIMEOUT; + ++int sysctl_tcp_min_tso_segs __read_mostly = 2; ++ + struct percpu_counter tcp_orphan_count; + EXPORT_SYMBOL_GPL(tcp_orphan_count); + +@@ -786,12 +788,28 @@ + xmit_size_goal = mss_now; + + if (large_allowed && sk_can_gso(sk)) { +- xmit_size_goal = ((sk->sk_gso_max_size - 1) - +- inet_csk(sk)->icsk_af_ops->net_header_len - +- inet_csk(sk)->icsk_ext_hdr_len - +- tp->tcp_header_len); ++ u32 gso_size, hlen; + +- /* TSQ : try to have two TSO segments in flight */ ++ /* Maybe we should/could use sk->sk_prot->max_header here ? */ ++ hlen = inet_csk(sk)->icsk_af_ops->net_header_len + ++ inet_csk(sk)->icsk_ext_hdr_len + ++ tp->tcp_header_len; ++ ++ /* Goal is to send at least one packet per ms, ++ * not one big TSO packet every 100 ms. ++ * This preserves ACK clocking and is consistent ++ * with tcp_tso_should_defer() heuristic. ++ */ ++ gso_size = sk->sk_pacing_rate / (2 * MSEC_PER_SEC); ++ gso_size = max_t(u32, gso_size, ++ sysctl_tcp_min_tso_segs * mss_now); ++ ++ xmit_size_goal = min_t(u32, gso_size, ++ sk->sk_gso_max_size - 1 - hlen); ++ ++ /* TSQ : try to have at least two segments in flight ++ * (one in NIC TX ring, another in Qdisc) ++ */ + xmit_size_goal = min_t(u32, xmit_size_goal, + sysctl_tcp_limit_output_bytes >> 1); + +Index: linux-3.10-3.10.11/net/ipv4/tcp_input.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_input.c 2014-04-28 00:34:28.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_input.c 2014-04-28 00:40:15.000000000 +0000 +@@ -699,6 +699,34 @@ + } + } + ++/* Set the sk_pacing_rate to allow proper sizing of TSO packets. ++ * Note: TCP stack does not yet implement pacing. ++ * FQ packet scheduler can be used to implement cheap but effective ++ * TCP pacing, to smooth the burst on large writes when packets ++ * in flight is significantly lower than cwnd (or rwin) ++ */ ++static void tcp_update_pacing_rate(struct sock *sk) ++{ ++ const struct tcp_sock *tp = tcp_sk(sk); ++ u64 rate; ++ ++ /* set sk_pacing_rate to 200 % of current rate (mss * cwnd / srtt) */ ++ rate = (u64)tp->mss_cache * 2 * (HZ << 3); ++ ++ rate *= max(tp->snd_cwnd, tp->packets_out); ++ ++ /* Correction for small srtt : minimum srtt being 8 (1 jiffy << 3), ++ * be conservative and assume srtt = 1 (125 us instead of 1.25 ms) ++ * We probably need usec resolution in the future. ++ * Note: This also takes care of possible srtt=0 case, ++ * when tcp_rtt_estimator() was not yet called. ++ */ ++ if (tp->srtt > 8 + 2) ++ do_div(rate, tp->srtt); ++ ++ sk->sk_pacing_rate = min_t(u64, rate, ~0U); ++} ++ + /* Calculate rto without backoff. This is the second half of Van Jacobson's + * routine referred to above. + */ +@@ -3330,7 +3358,7 @@ + u32 ack_seq = TCP_SKB_CB(skb)->seq; + u32 ack = TCP_SKB_CB(skb)->ack_seq; + bool is_dupack = false; +- u32 prior_in_flight; ++ u32 prior_in_flight, prior_cwnd = tp->snd_cwnd, prior_rtt = tp->srtt; + u32 prior_fackets; + int prior_packets = tp->packets_out; + int prior_sacked = tp->sacked_out; +@@ -3438,6 +3466,8 @@ + + if (icsk->icsk_pending == ICSK_TIME_RETRANS) + tcp_schedule_loss_probe(sk); ++ if (tp->srtt != prior_rtt || tp->snd_cwnd != prior_cwnd) ++ tcp_update_pacing_rate(sk); + return 1; + + no_queue: +@@ -5736,6 +5766,8 @@ + } else + tcp_init_metrics(sk); + ++ tcp_update_pacing_rate(sk); ++ + /* Prevent spurious tcp_cwnd_restart() on + * first data packet. + */ +Index: linux-3.10-3.10.11/net/ipv4/tcp_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_output.c 2014-04-28 00:34:30.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_output.c 2014-04-28 00:40:15.000000000 +0000 +@@ -1623,7 +1623,7 @@ + + /* If a full-sized TSO skb can be sent, do it. */ + if (limit >= min_t(unsigned int, sk->sk_gso_max_size, +- sk->sk_gso_max_segs * tp->mss_cache)) ++ tp->xmit_size_goal_segs * tp->mss_cache)) + goto send_now; + + /* Middle in queue won't get any more data, full sendable already? */ +Index: linux-3.10-3.10.11/dummy/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1441_5e25ba5003ee5de0ba2be56bfd54d16d4b1b028d.txt 2014-04-28 00:40:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.patch --- linux-3.10.11/debian/patches/rpi/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.patch 2014-04-28 00:40:17.000000000 +0000 @@ -0,0 +1,111 @@ +commit 0ae5f47eff2e543c3b94eec51c740f38a5071432 +Author: Eric Dumazet +Date: Fri Sep 27 03:28:54 2013 -0700 + + tcp: TSQ can use a dynamic limit + + [ Upstream commit c9eeec26e32e087359160406f96e0949b3cc6f10 ] + + When TCP Small Queues was added, we used a sysctl to limit amount of + packets queues on Qdisc/device queues for a given TCP flow. + + Problem is this limit is either too big for low rates, or too small + for high rates. + + Now TCP stack has rate estimation in sk->sk_pacing_rate, and TSO + auto sizing, it can better control number of packets in Qdisc/device + queues. + + New limit is two packets or at least 1 to 2 ms worth of packets. + + Low rates flows benefit from this patch by having even smaller + number of packets in queues, allowing for faster recovery, + better RTT estimations. + + High rates flows benefit from this patch by allowing more than 2 packets + in flight as we had reports this was a limiting factor to reach line + rate. [ In particular if TX completion is delayed because of coalescing + parameters ] + + Example for a single flow on 10Gbp link controlled by FQ/pacing + + 14 packets in flight instead of 2 + + $ tc -s -d qd + qdisc fq 8001: dev eth0 root refcnt 32 limit 10000p flow_limit 100p + buckets 1024 quantum 3028 initial_quantum 15140 + Sent 1168459366606 bytes 771822841 pkt (dropped 0, overlimits 0 + requeues 6822476) + rate 9346Mbit 771713pps backlog 953820b 14p requeues 6822476 + 2047 flow, 2046 inactive, 1 throttled, delay 15673 ns + 2372 gc, 0 highprio, 0 retrans, 9739249 throttled, 0 flows_plimit + + Note that sk_pacing_rate is currently set to twice the actual rate, but + this might be refined in the future when a flow is in congestion + avoidance. + + Additional change : skb->destructor should be set to tcp_wfree(). + + A future patch (for linux 3.13+) might remove tcp_limit_output_bytes + + Signed-off-by: Eric Dumazet + Cc: Wei Liu + Cc: Cong Wang + Cc: Yuchung Cheng + Cc: Neal Cardwell + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_output.c 2014-04-28 00:40:15.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_output.c 2014-04-28 00:40:16.000000000 +0000 +@@ -887,8 +887,7 @@ + + skb_orphan(skb); + skb->sk = sk; +- skb->destructor = (sysctl_tcp_limit_output_bytes > 0) ? +- tcp_wfree : sock_wfree; ++ skb->destructor = tcp_wfree; + atomic_add(skb->truesize, &sk->sk_wmem_alloc); + + /* Build TCP header and checksum it. */ +@@ -1832,7 +1831,6 @@ + while ((skb = tcp_send_head(sk))) { + unsigned int limit; + +- + tso_segs = tcp_init_tso_segs(sk, skb, mss_now); + BUG_ON(!tso_segs); + +@@ -1861,13 +1859,20 @@ + break; + } + +- /* TSQ : sk_wmem_alloc accounts skb truesize, +- * including skb overhead. But thats OK. ++ /* TCP Small Queues : ++ * Control number of packets in qdisc/devices to two packets / or ~1 ms. ++ * This allows for : ++ * - better RTT estimation and ACK scheduling ++ * - faster recovery ++ * - high rates + */ +- if (atomic_read(&sk->sk_wmem_alloc) >= sysctl_tcp_limit_output_bytes) { ++ limit = max(skb->truesize, sk->sk_pacing_rate >> 10); ++ ++ if (atomic_read(&sk->sk_wmem_alloc) > limit) { + set_bit(TSQ_THROTTLED, &tp->tsq_flags); + break; + } ++ + limit = mss_now; + if (tso_segs > 1 && !tcp_urg_mode(tp)) + limit = tcp_mss_split_point(sk, skb, mss_now, +Index: linux-3.10-3.10.11/dummy/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1442_0ae5f47eff2e543c3b94eec51c740f38a5071432.txt 2014-04-28 00:40:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.patch 2014-04-28 00:40:18.000000000 +0000 @@ -0,0 +1,72 @@ +commit b81908e15f548e385598beaf17376cd101f36bc8 +Author: Eric Dumazet +Date: Tue Oct 15 11:54:30 2013 -0700 + + tcp: must unclone packets before mangling them + + [ Upstream commit c52e2421f7368fd36cbe330d2cf41b10452e39a9 ] + + TCP stack should make sure it owns skbs before mangling them. + + We had various crashes using bnx2x, and it turned out gso_size + was cleared right before bnx2x driver was populating TC descriptor + of the _previous_ packet send. TCP stack can sometime retransmit + packets that are still in Qdisc. + + Of course we could make bnx2x driver more robust (using + ACCESS_ONCE(shinfo->gso_size) for example), but the bug is TCP stack. + + We have identified two points where skb_unclone() was needed. + + This patch adds a WARN_ON_ONCE() to warn us if we missed another + fix of this kind. + + Kudos to Neal for finding the root cause of this bug. Its visible + using small MSS. + + Signed-off-by: Eric Dumazet + Signed-off-by: Neal Cardwell + Cc: Yuchung Cheng + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_output.c 2014-04-28 00:40:16.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_output.c 2014-04-28 00:40:17.000000000 +0000 +@@ -976,6 +976,9 @@ + static void tcp_set_skb_tso_segs(const struct sock *sk, struct sk_buff *skb, + unsigned int mss_now) + { ++ /* Make sure we own this skb before messing gso_size/gso_segs */ ++ WARN_ON_ONCE(skb_cloned(skb)); ++ + if (skb->len <= mss_now || !sk_can_gso(sk) || + skb->ip_summed == CHECKSUM_NONE) { + /* Avoid the costly divide in the normal +@@ -1057,9 +1060,7 @@ + if (nsize < 0) + nsize = 0; + +- if (skb_cloned(skb) && +- skb_is_nonlinear(skb) && +- pskb_expand_head(skb, 0, 0, GFP_ATOMIC)) ++ if (skb_unclone(skb, GFP_ATOMIC)) + return -ENOMEM; + + /* Get a new skb... force flag on. */ +@@ -2334,6 +2335,8 @@ + int oldpcount = tcp_skb_pcount(skb); + + if (unlikely(oldpcount > 1)) { ++ if (skb_unclone(skb, GFP_ATOMIC)) ++ return -ENOMEM; + tcp_init_tso_segs(sk, skb, cur_mss); + tcp_adjust_pcount(sk, skb, oldpcount - tcp_skb_pcount(skb)); + } +Index: linux-3.10-3.10.11/dummy/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1443_b81908e15f548e385598beaf17376cd101f36bc8.txt 2014-04-28 00:40:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.patch --- linux-3.10.11/debian/patches/rpi/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.patch 2014-04-28 00:40:18.000000000 +0000 @@ -0,0 +1,80 @@ +commit a50b0399e6899e39e6f74431aaddf12ee92db854 +Author: Eric Dumazet +Date: Fri Oct 4 10:31:41 2013 -0700 + + tcp: do not forget FIN in tcp_shifted_skb() + + [ Upstream commit 5e8a402f831dbe7ee831340a91439e46f0d38acd ] + + Yuchung found following problem : + + There are bugs in the SACK processing code, merging part in + tcp_shift_skb_data(), that incorrectly resets or ignores the sacked + skbs FIN flag. When a receiver first SACK the FIN sequence, and later + throw away ofo queue (e.g., sack-reneging), the sender will stop + retransmitting the FIN flag, and hangs forever. + + Following packetdrill test can be used to reproduce the bug. + + $ cat sack-merge-bug.pkt + `sysctl -q net.ipv4.tcp_fack=0` + + // Establish a connection and send 10 MSS. + 0.000 socket(..., SOCK_STREAM, IPPROTO_TCP) = 3 + +.000 setsockopt(3, SOL_SOCKET, SO_REUSEADDR, [1], 4) = 0 + +.000 bind(3, ..., ...) = 0 + +.000 listen(3, 1) = 0 + + +.050 < S 0:0(0) win 32792 + +.000 > S. 0:0(0) ack 1 + +.001 < . 1:1(0) ack 1 win 1024 + +.000 accept(3, ..., ...) = 4 + + +.100 write(4, ..., 12000) = 12000 + +.000 shutdown(4, SHUT_WR) = 0 + +.000 > . 1:10001(10000) ack 1 + +.050 < . 1:1(0) ack 2001 win 257 + +.000 > FP. 10001:12001(2000) ack 1 + +.050 < . 1:1(0) ack 2001 win 257 + +.050 < . 1:1(0) ack 2001 win 257 + // SACK reneg + +.050 < . 1:1(0) ack 12001 win 257 + +0 %{ print "unacked: ",tcpi_unacked }% + +5 %{ print "" }% + + First, a typo inverted left/right of one OR operation, then + code forgot to advance end_seq if the merged skb carried FIN. + + Bug was added in 2.6.29 by commit 832d11c5cd076ab + ("tcp: Try to restore large SKBs while SACK processing") + + Signed-off-by: Eric Dumazet + Signed-off-by: Yuchung Cheng + Acked-by: Neal Cardwell + Cc: Ilpo Järvinen + Acked-by: Ilpo Järvinen + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_input.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_input.c 2014-04-28 00:40:15.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_input.c 2014-04-28 00:40:18.000000000 +0000 +@@ -1292,7 +1292,10 @@ + tp->lost_cnt_hint -= tcp_skb_pcount(prev); + } + +- TCP_SKB_CB(skb)->tcp_flags |= TCP_SKB_CB(prev)->tcp_flags; ++ TCP_SKB_CB(prev)->tcp_flags |= TCP_SKB_CB(skb)->tcp_flags; ++ if (TCP_SKB_CB(skb)->tcp_flags & TCPHDR_FIN) ++ TCP_SKB_CB(prev)->end_seq++; ++ + if (skb == tcp_highest_sack(sk)) + tcp_advance_highest_sack(sk, skb); + +Index: linux-3.10-3.10.11/dummy/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1444_a50b0399e6899e39e6f74431aaddf12ee92db854.txt 2014-04-28 00:40:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.patch 2014-04-28 00:40:19.000000000 +0000 @@ -0,0 +1,45 @@ +commit d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c +Author: Yuchung Cheng +Date: Sat Oct 12 10:16:27 2013 -0700 + + tcp: fix incorrect ca_state in tail loss probe + + [ Upstream commit 031afe4990a7c9dbff41a3a742c44d3e740ea0a1 ] + + On receiving an ACK that covers the loss probe sequence, TLP + immediately sets the congestion state to Open, even though some packets + are not recovered and retransmisssion are on the way. The later ACks + may trigger a WARN_ON check in step D of tcp_fastretrans_alert(), e.g., + https://bugzilla.redhat.com/show_bug.cgi?id=989251 + + The fix is to follow the similar procedure in recovery by calling + tcp_try_keep_open(). The sender switches to Open state if no packets + are retransmissted. Otherwise it goes to Disorder and let subsequent + ACKs move the state to Recovery or Open. + + Reported-By: Michael Sterrett + Tested-By: Dormando + Signed-off-by: Yuchung Cheng + Acked-by: Neal Cardwell + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/tcp_input.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/tcp_input.c 2014-04-28 00:40:18.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/tcp_input.c 2014-04-28 00:40:18.000000000 +0000 +@@ -3345,7 +3345,7 @@ + tcp_init_cwnd_reduction(sk, true); + tcp_set_ca_state(sk, TCP_CA_CWR); + tcp_end_cwnd_reduction(sk); +- tcp_set_ca_state(sk, TCP_CA_Open); ++ tcp_try_keep_open(sk); + NET_INC_STATS_BH(sock_net(sk), + LINUX_MIB_TCPLOSSPROBERECOVERY); + } +Index: linux-3.10-3.10.11/dummy/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1445_d8ac0f178f98d4e7c23cf9526d789d4869ec6e4c.txt 2014-04-28 00:40:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.patch --- linux-3.10.11/debian/patches/rpi/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.patch 2014-04-28 00:40:20.000000000 +0000 @@ -0,0 +1,49 @@ +commit 53d384ae6a01eadb8d362afaca6a9c0ba72c1126 +Author: Eric Dumazet +Date: Tue Oct 1 21:04:11 2013 -0700 + + net: do not call sock_put() on TIMEWAIT sockets + + [ Upstream commit 80ad1d61e72d626e30ebe8529a0455e660ca4693 ] + + commit 3ab5aee7fe84 ("net: Convert TCP & DCCP hash tables to use RCU / + hlist_nulls") incorrectly used sock_put() on TIMEWAIT sockets. + + We should instead use inet_twsk_put() + + Signed-off-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/inet_hashtables.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/inet_hashtables.c 2014-04-27 23:38:04.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/inet_hashtables.c 2014-04-28 00:40:19.000000000 +0000 +@@ -287,7 +287,7 @@ + if (unlikely(!INET_TW_MATCH(sk, net, acookie, + saddr, daddr, ports, + dif))) { +- sock_put(sk); ++ inet_twsk_put(inet_twsk(sk)); + goto begintw; + } + goto out; +Index: linux-3.10-3.10.11/net/ipv6/inet6_hashtables.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/inet6_hashtables.c 2014-04-27 23:38:04.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/inet6_hashtables.c 2014-04-28 00:40:19.000000000 +0000 +@@ -116,7 +116,7 @@ + } + if (unlikely(!INET6_TW_MATCH(sk, net, saddr, daddr, + ports, dif))) { +- sock_put(sk); ++ inet_twsk_put(inet_twsk(sk)); + goto begintw; + } + goto out; +Index: linux-3.10-3.10.11/dummy/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1446_53d384ae6a01eadb8d362afaca6a9c0ba72c1126.txt 2014-04-28 00:40:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.patch 2014-04-28 00:40:21.000000000 +0000 @@ -0,0 +1,146 @@ +commit bd83cd77073e5c54a88f976d6d6c785a1a80b0c0 +Author: François CACHEREUL +Date: Wed Oct 2 10:16:02 2013 +0200 + + l2tp: fix kernel panic when using IPv4-mapped IPv6 addresses + + [ Upstream commit e18503f41f9b12132c95d7c31ca6ee5155e44e5c ] + + IPv4 mapped addresses cause kernel panic. + The patch juste check whether the IPv6 address is an IPv4 mapped + address. If so, use IPv4 API instead of IPv6. + + [ 940.026915] general protection fault: 0000 [#1] + [ 940.026915] Modules linked in: l2tp_ppp l2tp_netlink l2tp_core pppox ppp_generic slhc loop psmouse + [ 940.026915] CPU: 0 PID: 3184 Comm: memcheck-amd64- Not tainted 3.11.0+ #1 + [ 940.026915] Hardware name: Bochs Bochs, BIOS Bochs 01/01/2007 + [ 940.026915] task: ffff880007130e20 ti: ffff88000737e000 task.ti: ffff88000737e000 + [ 940.026915] RIP: 0010:[] [] ip6_xmit+0x276/0x326 + [ 940.026915] RSP: 0018:ffff88000737fd28 EFLAGS: 00010286 + [ 940.026915] RAX: c748521a75ceff48 RBX: ffff880000c30800 RCX: 0000000000000000 + [ 940.026915] RDX: ffff88000075cc4e RSI: 0000000000000028 RDI: ffff8800060e5a40 + [ 940.026915] RBP: ffff8800060e5a40 R08: 0000000000000000 R09: ffff88000075cc90 + [ 940.026915] R10: 0000000000000000 R11: 0000000000000000 R12: ffff88000737fda0 + [ 940.026915] R13: 0000000000000000 R14: 0000000000002000 R15: ffff880005d3b580 + [ 940.026915] FS: 00007f163dc5e800(0000) GS:ffffffff81623000(0000) knlGS:0000000000000000 + [ 940.026915] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + [ 940.026915] CR2: 00000004032dc940 CR3: 0000000005c25000 CR4: 00000000000006f0 + [ 940.026915] Stack: + [ 940.026915] ffff88000075cc4e ffffffff81694e90 ffff880000c30b38 0000000000000020 + [ 940.026915] 11000000523c4bac ffff88000737fdb4 0000000000000000 ffff880000c30800 + [ 940.026915] ffff880005d3b580 ffff880000c30b38 ffff8800060e5a40 0000000000000020 + [ 940.026915] Call Trace: + [ 940.026915] [] ? inet6_csk_xmit+0xa4/0xc4 + [ 940.026915] [] ? l2tp_xmit_skb+0x503/0x55a [l2tp_core] + [ 940.026915] [] ? pskb_expand_head+0x161/0x214 + [ 940.026915] [] ? pppol2tp_xmit+0xf2/0x143 [l2tp_ppp] + [ 940.026915] [] ? ppp_channel_push+0x36/0x8b [ppp_generic] + [ 940.026915] [] ? ppp_write+0xaf/0xc5 [ppp_generic] + [ 940.026915] [] ? vfs_write+0xa2/0x106 + [ 940.026915] [] ? SyS_write+0x56/0x8a + [ 940.026915] [] ? system_call_fastpath+0x16/0x1b + [ 940.026915] Code: 00 49 8b 8f d8 00 00 00 66 83 7c 11 02 00 74 60 49 + 8b 47 58 48 83 e0 fe 48 8b 80 18 01 00 00 48 85 c0 74 13 48 8b 80 78 02 + 00 00 <48> ff 40 28 41 8b 57 68 48 01 50 30 48 8b 54 24 08 49 c7 c1 51 + [ 940.026915] RIP [] ip6_xmit+0x276/0x326 + [ 940.026915] RSP + [ 940.057945] ---[ end trace be8aba9a61c8b7f3 ]--- + [ 940.058583] Kernel panic - not syncing: Fatal exception in interrupt + + Signed-off-by: François CACHEREUL + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/l2tp/l2tp_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/l2tp/l2tp_core.c 2014-04-27 23:38:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/l2tp/l2tp_core.c 2014-04-28 00:40:20.000000000 +0000 +@@ -499,6 +499,7 @@ + static inline int l2tp_verify_udp_checksum(struct sock *sk, + struct sk_buff *skb) + { ++ struct l2tp_tunnel *tunnel = (struct l2tp_tunnel *)sk->sk_user_data; + struct udphdr *uh = udp_hdr(skb); + u16 ulen = ntohs(uh->len); + __wsum psum; +@@ -507,7 +508,7 @@ + return 0; + + #if IS_ENABLED(CONFIG_IPV6) +- if (sk->sk_family == PF_INET6) { ++ if (sk->sk_family == PF_INET6 && !tunnel->v4mapped) { + if (!uh->check) { + LIMIT_NETDEBUG(KERN_INFO "L2TP: IPv6: checksum is 0\n"); + return 1; +@@ -1071,7 +1072,7 @@ + /* Queue the packet to IP for output */ + skb->local_df = 1; + #if IS_ENABLED(CONFIG_IPV6) +- if (skb->sk->sk_family == PF_INET6) ++ if (skb->sk->sk_family == PF_INET6 && !tunnel->v4mapped) + error = inet6_csk_xmit(skb, NULL); + else + #endif +@@ -1198,7 +1199,7 @@ + + /* Calculate UDP checksum if configured to do so */ + #if IS_ENABLED(CONFIG_IPV6) +- if (sk->sk_family == PF_INET6) ++ if (sk->sk_family == PF_INET6 && !tunnel->v4mapped) + l2tp_xmit_ipv6_csum(sk, skb, udp_len); + else + #endif +@@ -1647,6 +1648,24 @@ + if (cfg != NULL) + tunnel->debug = cfg->debug; + ++#if IS_ENABLED(CONFIG_IPV6) ++ if (sk->sk_family == PF_INET6) { ++ struct ipv6_pinfo *np = inet6_sk(sk); ++ ++ if (ipv6_addr_v4mapped(&np->saddr) && ++ ipv6_addr_v4mapped(&np->daddr)) { ++ struct inet_sock *inet = inet_sk(sk); ++ ++ tunnel->v4mapped = true; ++ inet->inet_saddr = np->saddr.s6_addr32[3]; ++ inet->inet_rcv_saddr = np->rcv_saddr.s6_addr32[3]; ++ inet->inet_daddr = np->daddr.s6_addr32[3]; ++ } else { ++ tunnel->v4mapped = false; ++ } ++ } ++#endif ++ + /* Mark socket as an encapsulation socket. See net/ipv4/udp.c */ + tunnel->encap = encap; + if (encap == L2TP_ENCAPTYPE_UDP) { +@@ -1655,7 +1674,7 @@ + udp_sk(sk)->encap_rcv = l2tp_udp_encap_recv; + udp_sk(sk)->encap_destroy = l2tp_udp_encap_destroy; + #if IS_ENABLED(CONFIG_IPV6) +- if (sk->sk_family == PF_INET6) ++ if (sk->sk_family == PF_INET6 && !tunnel->v4mapped) + udpv6_encap_enable(); + else + #endif +Index: linux-3.10-3.10.11/net/l2tp/l2tp_core.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/l2tp/l2tp_core.h 2014-04-27 23:38:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/l2tp/l2tp_core.h 2014-04-28 00:40:20.000000000 +0000 +@@ -189,6 +189,9 @@ + struct sock *sock; /* Parent socket */ + int fd; /* Parent fd, if tunnel socket + * was created by userspace */ ++#if IS_ENABLED(CONFIG_IPV6) ++ bool v4mapped; ++#endif + + struct work_struct del_work; + +Index: linux-3.10-3.10.11/dummy/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1447_bd83cd77073e5c54a88f976d6d6c785a1a80b0c0.txt 2014-04-28 00:40:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.patch --- linux-3.10.11/debian/patches/rpi/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.patch 2014-04-28 00:40:22.000000000 +0000 @@ -0,0 +1,77 @@ +commit d980ed627b35d4685a4a27561dc3fc7a09226dab +Author: David S. Miller +Date: Tue Oct 8 15:44:26 2013 -0400 + + l2tp: Fix build warning with ipv6 disabled. + + [ Upstream commit 8d8a51e26a6d415e1470759f2cf5f3ee3ee86196 ] + + net/l2tp/l2tp_core.c: In function ‘l2tp_verify_udp_checksum’: + net/l2tp/l2tp_core.c:499:22: warning: unused variable ‘tunnel’ [-Wunused-variable] + + Create a helper "l2tp_tunnel()" to facilitate this, and as a side + effect get rid of a bunch of unnecessary void pointer casts. + + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/l2tp/l2tp_core.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/l2tp/l2tp_core.c 2014-04-28 00:40:20.000000000 +0000 ++++ linux-3.10-3.10.11/net/l2tp/l2tp_core.c 2014-04-28 00:40:21.000000000 +0000 +@@ -115,6 +115,11 @@ + static void l2tp_session_set_header_len(struct l2tp_session *session, int version); + static void l2tp_tunnel_free(struct l2tp_tunnel *tunnel); + ++static inline struct l2tp_tunnel *l2tp_tunnel(struct sock *sk) ++{ ++ return sk->sk_user_data; ++} ++ + static inline struct l2tp_net *l2tp_pernet(struct net *net) + { + BUG_ON(!net); +@@ -499,7 +504,6 @@ + static inline int l2tp_verify_udp_checksum(struct sock *sk, + struct sk_buff *skb) + { +- struct l2tp_tunnel *tunnel = (struct l2tp_tunnel *)sk->sk_user_data; + struct udphdr *uh = udp_hdr(skb); + u16 ulen = ntohs(uh->len); + __wsum psum; +@@ -508,7 +512,7 @@ + return 0; + + #if IS_ENABLED(CONFIG_IPV6) +- if (sk->sk_family == PF_INET6 && !tunnel->v4mapped) { ++ if (sk->sk_family == PF_INET6 && !l2tp_tunnel(sk)->v4mapped) { + if (!uh->check) { + LIMIT_NETDEBUG(KERN_INFO "L2TP: IPv6: checksum is 0\n"); + return 1; +@@ -1248,10 +1252,9 @@ + */ + static void l2tp_tunnel_destruct(struct sock *sk) + { +- struct l2tp_tunnel *tunnel; ++ struct l2tp_tunnel *tunnel = l2tp_tunnel(sk); + struct l2tp_net *pn; + +- tunnel = sk->sk_user_data; + if (tunnel == NULL) + goto end; + +@@ -1619,7 +1622,7 @@ + } + + /* Check if this socket has already been prepped */ +- tunnel = (struct l2tp_tunnel *)sk->sk_user_data; ++ tunnel = l2tp_tunnel(sk); + if (tunnel != NULL) { + /* This socket has already been prepped */ + err = -EBUSY; +Index: linux-3.10-3.10.11/dummy/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1448_d980ed627b35d4685a4a27561dc3fc7a09226dab.txt 2014-04-28 00:40:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.patch 2014-04-28 00:40:22.000000000 +0000 @@ -0,0 +1,45 @@ +commit 85cd02136ded01747a7959567aa1626627f1877e +Author: Sebastian Hesselbarth +Date: Wed Oct 2 12:57:20 2013 +0200 + + net: mv643xx_eth: update statistics timer from timer context only + + [ Upstream commit 041b4ddb84989f06ff1df0ca869b950f1ee3cb1c ] + + Each port driver installs a periodic timer to update port statistics + by calling mib_counters_update. As mib_counters_update is also called + from non-timer context, we should not reschedule the timer there but + rather move it to timer-only context. + + Signed-off-by: Sebastian Hesselbarth + Acked-by: Jason Cooper + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/marvell/mv643xx_eth.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/marvell/mv643xx_eth.c 2014-04-27 23:38:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/marvell/mv643xx_eth.c 2014-04-28 00:40:22.000000000 +0000 +@@ -1125,15 +1125,13 @@ + p->rx_discard += rdlp(mp, RX_DISCARD_FRAME_CNT); + p->rx_overrun += rdlp(mp, RX_OVERRUN_FRAME_CNT); + spin_unlock_bh(&mp->mib_counters_lock); +- +- mod_timer(&mp->mib_counters_timer, jiffies + 30 * HZ); + } + + static void mib_counters_timer_wrapper(unsigned long _mp) + { + struct mv643xx_eth_private *mp = (void *)_mp; +- + mib_counters_update(mp); ++ mod_timer(&mp->mib_counters_timer, jiffies + 30 * HZ); + } + + +Index: linux-3.10-3.10.11/dummy/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1449_85cd02136ded01747a7959567aa1626627f1877e.txt 2014-04-28 00:40:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.patch --- linux-3.10.11/debian/patches/rpi/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.patch 2014-04-28 00:40:23.000000000 +0000 @@ -0,0 +1,45 @@ +commit b24b4a82fc96f74d848275c8f1b33df66cbef061 +Author: Sebastian Hesselbarth +Date: Wed Oct 2 12:57:21 2013 +0200 + + net: mv643xx_eth: fix orphaned statistics timer crash + + [ Upstream commit f564412c935111c583b787bcc18157377b208e2e ] + + The periodic statistics timer gets started at port _probe() time, but + is stopped on _stop() only. In a modular environment, this can cause + the timer to access already deallocated memory, if the module is unloaded + without starting the eth device. To fix this, we add the timer right + before the port is started, instead of at _probe() time. + + Signed-off-by: Sebastian Hesselbarth + Acked-by: Jason Cooper + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/marvell/mv643xx_eth.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/marvell/mv643xx_eth.c 2014-04-28 00:40:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/marvell/mv643xx_eth.c 2014-04-28 00:40:23.000000000 +0000 +@@ -2229,6 +2229,7 @@ + mp->int_mask |= INT_TX_END_0 << i; + } + ++ add_timer(&mp->mib_counters_timer); + port_start(mp); + + wrlp(mp, INT_MASK_EXT, INT_EXT_LINK_PHY | INT_EXT_TX); +@@ -2737,7 +2738,6 @@ + mp->mib_counters_timer.data = (unsigned long)mp; + mp->mib_counters_timer.function = mib_counters_timer_wrapper; + mp->mib_counters_timer.expires = jiffies + 30 * HZ; +- add_timer(&mp->mib_counters_timer); + + spin_lock_init(&mp->mib_counters_lock); + +Index: linux-3.10-3.10.11/dummy/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1450_b24b4a82fc96f74d848275c8f1b33df66cbef061.txt 2014-04-28 00:40:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.patch 2014-04-28 00:40:24.000000000 +0000 @@ -0,0 +1,91 @@ +commit 2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6 +Author: Dan Carpenter +Date: Thu Oct 3 00:27:20 2013 +0300 + + net: heap overflow in __audit_sockaddr() + + [ Upstream commit 1661bf364ae9c506bc8795fef70d1532931be1e8 ] + + We need to cap ->msg_namelen or it leads to a buffer overflow when we + to the memcpy() in __audit_sockaddr(). It requires CAP_AUDIT_CONTROL to + exploit this bug. + + The call tree is: + ___sys_recvmsg() + move_addr_to_user() + audit_sockaddr() + __audit_sockaddr() + + Reported-by: Jüri Aedla + Signed-off-by: Dan Carpenter + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/compat.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/compat.c 2014-04-27 23:38:02.000000000 +0000 ++++ linux-3.10-3.10.11/net/compat.c 2014-04-28 00:40:23.000000000 +0000 +@@ -71,6 +71,8 @@ + __get_user(kmsg->msg_controllen, &umsg->msg_controllen) || + __get_user(kmsg->msg_flags, &umsg->msg_flags)) + return -EFAULT; ++ if (kmsg->msg_namelen > sizeof(struct sockaddr_storage)) ++ return -EINVAL; + kmsg->msg_name = compat_ptr(tmp1); + kmsg->msg_iov = compat_ptr(tmp2); + kmsg->msg_control = compat_ptr(tmp3); +Index: linux-3.10-3.10.11/net/socket.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/socket.c 2014-04-27 23:38:02.000000000 +0000 ++++ linux-3.10-3.10.11/net/socket.c 2014-04-28 00:40:23.000000000 +0000 +@@ -1956,6 +1956,16 @@ + unsigned int name_len; + }; + ++static int copy_msghdr_from_user(struct msghdr *kmsg, ++ struct msghdr __user *umsg) ++{ ++ if (copy_from_user(kmsg, umsg, sizeof(struct msghdr))) ++ return -EFAULT; ++ if (kmsg->msg_namelen > sizeof(struct sockaddr_storage)) ++ return -EINVAL; ++ return 0; ++} ++ + static int ___sys_sendmsg(struct socket *sock, struct msghdr __user *msg, + struct msghdr *msg_sys, unsigned int flags, + struct used_address *used_address) +@@ -1974,8 +1984,11 @@ + if (MSG_CMSG_COMPAT & flags) { + if (get_compat_msghdr(msg_sys, msg_compat)) + return -EFAULT; +- } else if (copy_from_user(msg_sys, msg, sizeof(struct msghdr))) +- return -EFAULT; ++ } else { ++ err = copy_msghdr_from_user(msg_sys, msg); ++ if (err) ++ return err; ++ } + + if (msg_sys->msg_iovlen > UIO_FASTIOV) { + err = -EMSGSIZE; +@@ -2183,8 +2196,11 @@ + if (MSG_CMSG_COMPAT & flags) { + if (get_compat_msghdr(msg_sys, msg_compat)) + return -EFAULT; +- } else if (copy_from_user(msg_sys, msg, sizeof(struct msghdr))) +- return -EFAULT; ++ } else { ++ err = copy_msghdr_from_user(msg_sys, msg); ++ if (err) ++ return err; ++ } + + if (msg_sys->msg_iovlen > UIO_FASTIOV) { + err = -EMSGSIZE; +Index: linux-3.10-3.10.11/dummy/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1451_2e8d97ab1f1236d08a8576d5c4b25d3180ff01f6.txt 2014-04-28 00:40:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.patch 2014-04-28 00:40:25.000000000 +0000 @@ -0,0 +1,171 @@ +commit df6ae0dc3145f5d3c0b04a59e64cd647469881e4 +Author: Mathias Krause +Date: Mon Sep 30 22:03:06 2013 +0200 + + proc connector: fix info leaks + + [ Upstream commit e727ca82e0e9616ab4844301e6bae60ca7327682 ] + + Initialize event_data for all possible message types to prevent leaking + kernel stack contents to userland (up to 20 bytes). Also set the flags + member of the connector message to 0 to prevent leaking two more stack + bytes this way. + + Signed-off-by: Mathias Krause + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/connector/cn_proc.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/connector/cn_proc.c 2014-04-27 23:38:02.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/connector/cn_proc.c 2014-04-28 00:40:24.000000000 +0000 +@@ -65,6 +65,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -80,6 +81,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + /* If cn_netlink_send() failed, the data is not sent */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } +@@ -96,6 +98,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -106,6 +109,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -122,6 +126,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + ev->what = which_id; + ev->event_data.id.process_pid = task->pid; + ev->event_data.id.process_tgid = task->tgid; +@@ -145,6 +150,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -160,6 +166,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -170,6 +177,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -185,6 +193,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -203,6 +212,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -218,6 +228,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -229,6 +240,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -244,6 +256,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -254,6 +267,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -269,6 +283,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + get_seq(&msg->seq, &ev->cpu); + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -281,6 +296,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = 0; /* not used */ + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +@@ -304,6 +320,7 @@ + + msg = (struct cn_msg *)buffer; + ev = (struct proc_event *)msg->data; ++ memset(&ev->event_data, 0, sizeof(ev->event_data)); + msg->seq = rcvd_seq; + ktime_get_ts(&ts); /* get high res monotonic timestamp */ + put_unaligned(timespec_to_ns(&ts), (__u64 *)&ev->timestamp_ns); +@@ -313,6 +330,7 @@ + memcpy(&msg->id, &cn_proc_event_id, sizeof(msg->id)); + msg->ack = rcvd_ack + 1; + msg->len = sizeof(*ev); ++ msg->flags = 0; /* not used */ + cn_netlink_send(msg, CN_IDX_PROC, GFP_KERNEL); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1452_df6ae0dc3145f5d3c0b04a59e64cd647469881e4.txt 2014-04-28 00:40:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.patch --- linux-3.10.11/debian/patches/rpi/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.patch 2014-04-28 00:40:26.000000000 +0000 @@ -0,0 +1,37 @@ +commit b15e22da6eb11f54ef53bec9b9e9adbc4fba1609 +Author: Jiri Benc +Date: Fri Oct 4 17:04:48 2013 +0200 + + ipv4: fix ineffective source address selection + + [ Upstream commit 0a7e22609067ff524fc7bbd45c6951dd08561667 ] + + When sending out multicast messages, the source address in inet->mc_addr is + ignored and rewritten by an autoselected one. This is caused by a typo in + commit 813b3b5db831 ("ipv4: Use caller's on-stack flowi as-is in output + route lookups"). + + Signed-off-by: Jiri Benc + Acked-by: Eric Dumazet + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/route.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/route.c 2014-04-27 23:38:01.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/route.c 2014-04-28 00:40:25.000000000 +0000 +@@ -2020,7 +2020,7 @@ + RT_SCOPE_LINK); + goto make_route; + } +- if (fl4->saddr) { ++ if (!fl4->saddr) { + if (ipv4_is_multicast(fl4->daddr)) + fl4->saddr = inet_select_addr(dev_out, 0, + fl4->flowi4_scope); +Index: linux-3.10-3.10.11/dummy/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1453_b15e22da6eb11f54ef53bec9b9e9adbc4fba1609.txt 2014-04-28 00:40:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.patch 2014-04-28 00:40:27.000000000 +0000 @@ -0,0 +1,45 @@ +commit 42fc155b9fe58a8885b76136ebdb7b5e376740b6 +Author: Marc Kleine-Budde +Date: Sat Oct 5 21:25:17 2013 +0200 + + can: dev: fix nlmsg size calculation in can_get_size() + + [ Upstream commit fe119a05f8ca481623a8d02efcc984332e612528 ] + + This patch fixes the calculation of the nlmsg size, by adding the missing + nla_total_size(). + + Signed-off-by: Marc Kleine-Budde + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/can/dev.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/can/dev.c 2014-04-27 23:38:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/can/dev.c 2014-04-28 00:40:26.000000000 +0000 +@@ -705,14 +705,14 @@ + size_t size; + + size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */ +- size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */ ++ size += nla_total_size(sizeof(struct can_ctrlmode)); /* IFLA_CAN_CTRLMODE */ + size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */ +- size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */ +- size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */ ++ size += nla_total_size(sizeof(struct can_bittiming)); /* IFLA_CAN_BITTIMING */ ++ size += nla_total_size(sizeof(struct can_clock)); /* IFLA_CAN_CLOCK */ + if (priv->do_get_berr_counter) /* IFLA_CAN_BERR_COUNTER */ +- size += sizeof(struct can_berr_counter); ++ size += nla_total_size(sizeof(struct can_berr_counter)); + if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */ +- size += sizeof(struct can_bittiming_const); ++ size += nla_total_size(sizeof(struct can_bittiming_const)); + + return size; + } +Index: linux-3.10-3.10.11/dummy/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1454_42fc155b9fe58a8885b76136ebdb7b5e376740b6.txt 2014-04-28 00:40:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.patch --- linux-3.10.11/debian/patches/rpi/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.patch 2014-04-28 00:40:27.000000000 +0000 @@ -0,0 +1,62 @@ +commit b9396c4c9e7f499b1dd8080e901c88705f2efa99 +Author: Fabio Estevam +Date: Sat Oct 5 17:56:59 2013 -0300 + + net: secure_seq: Fix warning when CONFIG_IPV6 and CONFIG_INET are not selected + + [ Upstream commit cb03db9d0e964568407fb08ea46cc2b6b7f67587 ] + + net_secret() is only used when CONFIG_IPV6 or CONFIG_INET are selected. + + Building a defconfig with both of these symbols unselected (Using the ARM + at91sam9rl_defconfig, for example) leads to the following build warning: + + $ make at91sam9rl_defconfig + # + # configuration written to .config + # + + $ make net/core/secure_seq.o + scripts/kconfig/conf --silentoldconfig Kconfig + CHK include/config/kernel.release + CHK include/generated/uapi/linux/version.h + CHK include/generated/utsrelease.h + make[1]: `include/generated/mach-types.h' is up to date. + CALL scripts/checksyscalls.sh + CC net/core/secure_seq.o + net/core/secure_seq.c:17:13: warning: 'net_secret_init' defined but not used [-Wunused-function] + + Fix this warning by protecting the definition of net_secret() with these + symbols. + + Reported-by: Olof Johansson + Signed-off-by: Fabio Estevam + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/core/secure_seq.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/core/secure_seq.c 2014-04-28 00:38:13.000000000 +0000 ++++ linux-3.10-3.10.11/net/core/secure_seq.c 2014-04-28 00:40:27.000000000 +0000 +@@ -10,6 +10,7 @@ + + #include + ++#if IS_ENABLED(CONFIG_IPV6) || IS_ENABLED(CONFIG_INET) + #define NET_SECRET_SIZE (MD5_MESSAGE_BYTES / 4) + + static u32 net_secret[NET_SECRET_SIZE] ____cacheline_aligned; +@@ -29,6 +30,7 @@ + cmpxchg(&net_secret[--i], 0, tmp); + } + } ++#endif + + #ifdef CONFIG_INET + static u32 seq_scale(u32 seq) +Index: linux-3.10-3.10.11/dummy/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1455_b9396c4c9e7f499b1dd8080e901c88705f2efa99.txt 2014-04-28 00:40:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.patch 2014-04-28 00:40:28.000000000 +0000 @@ -0,0 +1,131 @@ +commit f495ddc46f97dd0054ff2d5d3c7493d59f7511fb +Author: Paul Durrant +Date: Tue Oct 8 14:22:56 2013 +0100 + + xen-netback: Don't destroy the netdev until the vif is shut down + + [ upstream commit id: 279f438e36c0a70b23b86d2090aeec50155034a9 ] + + Without this patch, if a frontend cycles through states Closing + and Closed (which Windows frontends need to do) then the netdev + will be destroyed and requires re-invocation of hotplug scripts + to restore state before the frontend can move to Connected. Thus + when udev is not in use the backend gets stuck in InitWait. + + With this patch, the netdev is left alone whilst the backend is + still online and is only de-registered and freed just prior to + destroying the vif (which is also nicely symmetrical with the + netdev allocation and registration being done during probe) so + no re-invocation of hotplug scripts is required. + + Signed-off-by: Paul Durrant + Cc: David Vrabel + Cc: Wei Liu + Cc: Ian Campbell + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/xen-netback/common.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/xen-netback/common.h 2014-04-27 23:38:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/xen-netback/common.h 2014-04-28 00:40:27.000000000 +0000 +@@ -115,6 +115,7 @@ + int xenvif_connect(struct xenvif *vif, unsigned long tx_ring_ref, + unsigned long rx_ring_ref, unsigned int evtchn); + void xenvif_disconnect(struct xenvif *vif); ++void xenvif_free(struct xenvif *vif); + + void xenvif_get(struct xenvif *vif); + void xenvif_put(struct xenvif *vif); +Index: linux-3.10-3.10.11/drivers/net/xen-netback/interface.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/xen-netback/interface.c 2014-04-27 23:38:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/xen-netback/interface.c 2014-04-28 00:40:27.000000000 +0000 +@@ -304,6 +304,9 @@ + } + + netdev_dbg(dev, "Successfully created xenvif\n"); ++ ++ __module_get(THIS_MODULE); ++ + return vif; + } + +@@ -369,9 +372,14 @@ + if (vif->irq) + unbind_from_irqhandler(vif->irq, vif); + +- unregister_netdev(vif->dev); +- + xen_netbk_unmap_frontend_rings(vif); ++} ++ ++void xenvif_free(struct xenvif *vif) ++{ ++ unregister_netdev(vif->dev); + + free_netdev(vif->dev); ++ ++ module_put(THIS_MODULE); + } +Index: linux-3.10-3.10.11/drivers/net/xen-netback/xenbus.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/xen-netback/xenbus.c 2014-04-27 23:38:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/xen-netback/xenbus.c 2014-04-28 00:40:28.000000000 +0000 +@@ -42,7 +42,7 @@ + if (be->vif) { + kobject_uevent(&dev->dev.kobj, KOBJ_OFFLINE); + xenbus_rm(XBT_NIL, dev->nodename, "hotplug-status"); +- xenvif_disconnect(be->vif); ++ xenvif_free(be->vif); + be->vif = NULL; + } + kfree(be); +@@ -203,9 +203,18 @@ + { + struct backend_info *be = dev_get_drvdata(&dev->dev); + ++ if (be->vif) ++ xenvif_disconnect(be->vif); ++} ++ ++static void destroy_backend(struct xenbus_device *dev) ++{ ++ struct backend_info *be = dev_get_drvdata(&dev->dev); ++ + if (be->vif) { ++ kobject_uevent(&dev->dev.kobj, KOBJ_OFFLINE); + xenbus_rm(XBT_NIL, dev->nodename, "hotplug-status"); +- xenvif_disconnect(be->vif); ++ xenvif_free(be->vif); + be->vif = NULL; + } + } +@@ -237,14 +246,11 @@ + case XenbusStateConnected: + if (dev->state == XenbusStateConnected) + break; +- backend_create_xenvif(be); + if (be->vif) + connect(be); + break; + + case XenbusStateClosing: +- if (be->vif) +- kobject_uevent(&dev->dev.kobj, KOBJ_OFFLINE); + disconnect_backend(dev); + xenbus_switch_state(dev, XenbusStateClosing); + break; +@@ -253,6 +259,7 @@ + xenbus_switch_state(dev, XenbusStateClosed); + if (xenbus_dev_is_online(dev)) + break; ++ destroy_backend(dev); + /* fall through if not online */ + case XenbusStateUnknown: + device_unregister(&dev->dev); +Index: linux-3.10-3.10.11/dummy/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1456_f495ddc46f97dd0054ff2d5d3c7493d59f7511fb.txt 2014-04-28 00:40:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.patch --- linux-3.10.11/debian/patches/rpi/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.patch 2014-04-28 00:40:29.000000000 +0000 @@ -0,0 +1,35 @@ +commit 4c1f32d2d776b7d87962e902d62f8b6b2b2e1025 +Author: Marc Kleine-Budde +Date: Mon Oct 7 23:19:58 2013 +0200 + + net: vlan: fix nlmsg size calculation in vlan_get_size() + + [ Upstream commit c33a39c575068c2ea9bffb22fd6de2df19c74b89 ] + + This patch fixes the calculation of the nlmsg size, by adding the missing + nla_total_size(). + + Cc: Patrick McHardy + Signed-off-by: Marc Kleine-Budde + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/8021q/vlan_netlink.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/8021q/vlan_netlink.c 2014-04-27 23:38:00.000000000 +0000 ++++ linux-3.10-3.10.11/net/8021q/vlan_netlink.c 2014-04-28 00:40:28.000000000 +0000 +@@ -171,7 +171,7 @@ + + return nla_total_size(2) + /* IFLA_VLAN_PROTOCOL */ + nla_total_size(2) + /* IFLA_VLAN_ID */ +- sizeof(struct ifla_vlan_flags) + /* IFLA_VLAN_FLAGS */ ++ nla_total_size(sizeof(struct ifla_vlan_flags)) + /* IFLA_VLAN_FLAGS */ + vlan_qos_map_size(vlan->nr_ingress_mappings) + + vlan_qos_map_size(vlan->nr_egress_mappings); + } +Index: linux-3.10-3.10.11/dummy/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1457_4c1f32d2d776b7d87962e902d62f8b6b2b2e1025.txt 2014-04-28 00:40:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.patch --- linux-3.10.11/debian/patches/rpi/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.patch 2014-04-28 00:40:30.000000000 +0000 @@ -0,0 +1,129 @@ +commit a77db44038f976c2734fb3d2b1ed0cb9c3afde75 +Author: Christophe Gouault +Date: Tue Oct 8 17:21:22 2013 +0200 + + vti: get rid of nf mark rule in prerouting + + [ Upstream commit 7263a5187f9e9de45fcb51349cf0e031142c19a1 ] + + This patch fixes and improves the use of vti interfaces (while + lightly changing the way of configuring them). + + Currently: + + - it is necessary to identify and mark inbound IPsec + packets destined to each vti interface, via netfilter rules in + the mangle table at prerouting hook. + + - the vti module cannot retrieve the right tunnel in input since + commit b9959fd3: vti tunnels all have an i_key, but the tunnel lookup + is done with flag TUNNEL_NO_KEY, so there no chance to retrieve them. + + - the i_key is used by the outbound processing as a mark to lookup + for the right SP and SA bundle. + + This patch uses the o_key to store the vti mark (instead of i_key) and + enables: + + - to avoid the need for previously marking the inbound skbuffs via a + netfilter rule. + - to properly retrieve the right tunnel in input, only based on the IPsec + packet outer addresses. + - to properly perform an inbound policy check (using the tunnel o_key + as a mark). + - to properly perform an outbound SPD and SAD lookup (using the tunnel + o_key as a mark). + - to keep the current mark of the skbuff. The skbuff mark is neither + used nor changed by the vti interface. Only the vti interface o_key + is used. + + SAs have a wildcard mark. + SPs have a mark equal to the vti interface o_key. + + The vti interface must be created as follows (i_key = 0, o_key = mark): + + ip link add vti1 mode vti local 1.1.1.1 remote 2.2.2.2 okey 1 + + The SPs attached to vti1 must be created as follows (mark = vti1 o_key): + + ip xfrm policy add dir out mark 1 tmpl src 1.1.1.1 dst 2.2.2.2 \ + proto esp mode tunnel + ip xfrm policy add dir in mark 1 tmpl src 2.2.2.2 dst 1.1.1.1 \ + proto esp mode tunnel + + The SAs are created with the default wildcard mark. There is no + distinction between global vs. vti SAs. Just their addresses will + possibly link them to a vti interface: + + ip xfrm state add src 1.1.1.1 dst 2.2.2.2 proto esp spi 1000 mode tunnel \ + enc "cbc(aes)" "azertyuiopqsdfgh" + + ip xfrm state add src 2.2.2.2 dst 1.1.1.1 proto esp spi 2000 mode tunnel \ + enc "cbc(aes)" "sqbdhgqsdjqjsdfh" + + To avoid matching "global" (not vti) SPs in vti interfaces, global SPs + should no use the default wildcard mark, but explicitly match mark 0. + + To avoid a double SPD lookup in input and output (in global and vti SPDs), + the NOPOLICY and NOXFRM options should be set on the vti interfaces: + + echo 1 > /proc/sys/net/ipv4/conf/vti1/disable_policy + echo 1 > /proc/sys/net/ipv4/conf/vti1/disable_xfrm + + The outgoing traffic is steered to vti1 by a route via the vti interface: + + ip route add 192.168.0.0/16 dev vti1 + + The incoming IPsec traffic is steered to vti1 because its outer addresses + match the vti1 tunnel configuration. + + Signed-off-by: Christophe Gouault + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv4/ip_vti.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_vti.c 2014-04-27 23:38:00.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_vti.c 2014-04-28 00:40:29.000000000 +0000 +@@ -285,8 +285,17 @@ + tunnel = vti_tunnel_lookup(dev_net(skb->dev), iph->saddr, iph->daddr); + if (tunnel != NULL) { + struct pcpu_tstats *tstats; ++ u32 oldmark = skb->mark; ++ int ret; + +- if (!xfrm4_policy_check(NULL, XFRM_POLICY_IN, skb)) ++ ++ /* temporarily mark the skb with the tunnel o_key, to ++ * only match policies with this mark. ++ */ ++ skb->mark = be32_to_cpu(tunnel->parms.o_key); ++ ret = xfrm4_policy_check(NULL, XFRM_POLICY_IN, skb); ++ skb->mark = oldmark; ++ if (!ret) + return -1; + + tstats = this_cpu_ptr(tunnel->dev->tstats); +@@ -295,7 +304,6 @@ + tstats->rx_bytes += skb->len; + u64_stats_update_end(&tstats->syncp); + +- skb->mark = 0; + secpath_reset(skb); + skb->dev = tunnel->dev; + return 1; +@@ -327,7 +335,7 @@ + + memset(&fl4, 0, sizeof(fl4)); + flowi4_init_output(&fl4, tunnel->parms.link, +- be32_to_cpu(tunnel->parms.i_key), RT_TOS(tos), ++ be32_to_cpu(tunnel->parms.o_key), RT_TOS(tos), + RT_SCOPE_UNIVERSE, + IPPROTO_IPIP, 0, + dst, tiph->saddr, 0, 0); +Index: linux-3.10-3.10.11/dummy/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1458_a77db44038f976c2734fb3d2b1ed0cb9c3afde75.txt 2014-04-28 00:40:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.patch 2014-04-28 00:40:30.000000000 +0000 @@ -0,0 +1,205 @@ +commit a41536775e712e7b438400f73e927ffe4b21149c +Author: Eric Dumazet +Date: Thu Oct 10 06:30:09 2013 -0700 + + l2tp: must disable bh before calling l2tp_xmit_skb() + + [ Upstream commit 455cc32bf128e114455d11ad919321ab89a2c312 ] + + François Cachereul made a very nice bug report and suspected + the bh_lock_sock() / bh_unlok_sock() pair used in l2tp_xmit_skb() from + process context was not good. + + This problem was added by commit 6af88da14ee284aaad6e4326da09a89191ab6165 + ("l2tp: Fix locking in l2tp_core.c"). + + l2tp_eth_dev_xmit() runs from BH context, so we must disable BH + from other l2tp_xmit_skb() users. + + [ 452.060011] BUG: soft lockup - CPU#1 stuck for 23s! [accel-pppd:6662] + [ 452.061757] Modules linked in: l2tp_ppp l2tp_netlink l2tp_core pppoe pppox + ppp_generic slhc ipv6 ext3 mbcache jbd virtio_balloon xfs exportfs dm_mod + virtio_blk ata_generic virtio_net floppy ata_piix libata virtio_pci virtio_ring virtio [last unloaded: scsi_wait_scan] + [ 452.064012] CPU 1 + [ 452.080015] BUG: soft lockup - CPU#2 stuck for 23s! [accel-pppd:6643] + [ 452.080015] CPU 2 + [ 452.080015] + [ 452.080015] Pid: 6643, comm: accel-pppd Not tainted 3.2.46.mini #1 Bochs Bochs + [ 452.080015] RIP: 0010:[] [] do_raw_spin_lock+0x17/0x1f + [ 452.080015] RSP: 0018:ffff88007125fc18 EFLAGS: 00000293 + [ 452.080015] RAX: 000000000000aba9 RBX: ffffffff811d0703 RCX: 0000000000000000 + [ 452.080015] RDX: 00000000000000ab RSI: ffff8800711f6896 RDI: ffff8800745c8110 + [ 452.080015] RBP: ffff88007125fc18 R08: 0000000000000020 R09: 0000000000000000 + [ 452.080015] R10: 0000000000000000 R11: 0000000000000280 R12: 0000000000000286 + [ 452.080015] R13: 0000000000000020 R14: 0000000000000240 R15: 0000000000000000 + [ 452.080015] FS: 00007fdc0cc24700(0000) GS:ffff8800b6f00000(0000) knlGS:0000000000000000 + [ 452.080015] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + [ 452.080015] CR2: 00007fdb054899b8 CR3: 0000000074404000 CR4: 00000000000006a0 + [ 452.080015] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [ 452.080015] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 + [ 452.080015] Process accel-pppd (pid: 6643, threadinfo ffff88007125e000, task ffff8800b27e6dd0) + [ 452.080015] Stack: + [ 452.080015] ffff88007125fc28 ffffffff81256559 ffff88007125fc98 ffffffffa01b2bd1 + [ 452.080015] ffff88007125fc58 000000000000000c 00000000029490d0 0000009c71dbe25e + [ 452.080015] 000000000000005c 000000080000000e 0000000000000000 ffff880071170600 + [ 452.080015] Call Trace: + [ 452.080015] [] _raw_spin_lock+0xe/0x10 + [ 452.080015] [] l2tp_xmit_skb+0x189/0x4ac [l2tp_core] + [ 452.080015] [] pppol2tp_sendmsg+0x15e/0x19c [l2tp_ppp] + [ 452.080015] [] __sock_sendmsg_nosec+0x22/0x24 + [ 452.080015] [] sock_sendmsg+0xa1/0xb6 + [ 452.080015] [] ? __schedule+0x5c1/0x616 + [ 452.080015] [] ? __dequeue_signal+0xb7/0x10c + [ 452.080015] [] ? fget_light+0x75/0x89 + [ 452.080015] [] ? sockfd_lookup_light+0x20/0x56 + [ 452.080015] [] sys_sendto+0x10c/0x13b + [ 452.080015] [] system_call_fastpath+0x16/0x1b + [ 452.080015] Code: 81 48 89 e5 72 0c 31 c0 48 81 ff 45 66 25 81 0f 92 c0 5d c3 55 b8 00 01 00 00 48 89 e5 f0 66 0f c1 07 0f b6 d4 38 d0 74 06 f3 90 <8a> 07 eb f6 5d c3 90 90 55 48 89 e5 9c 58 0f 1f 44 00 00 5d c3 + [ 452.080015] Call Trace: + [ 452.080015] [] _raw_spin_lock+0xe/0x10 + [ 452.080015] [] l2tp_xmit_skb+0x189/0x4ac [l2tp_core] + [ 452.080015] [] pppol2tp_sendmsg+0x15e/0x19c [l2tp_ppp] + [ 452.080015] [] __sock_sendmsg_nosec+0x22/0x24 + [ 452.080015] [] sock_sendmsg+0xa1/0xb6 + [ 452.080015] [] ? __schedule+0x5c1/0x616 + [ 452.080015] [] ? __dequeue_signal+0xb7/0x10c + [ 452.080015] [] ? fget_light+0x75/0x89 + [ 452.080015] [] ? sockfd_lookup_light+0x20/0x56 + [ 452.080015] [] sys_sendto+0x10c/0x13b + [ 452.080015] [] system_call_fastpath+0x16/0x1b + [ 452.064012] + [ 452.064012] Pid: 6662, comm: accel-pppd Not tainted 3.2.46.mini #1 Bochs Bochs + [ 452.064012] RIP: 0010:[] [] do_raw_spin_lock+0x19/0x1f + [ 452.064012] RSP: 0018:ffff8800b6e83ba0 EFLAGS: 00000297 + [ 452.064012] RAX: 000000000000aaa9 RBX: ffff8800b6e83b40 RCX: 0000000000000002 + [ 452.064012] RDX: 00000000000000aa RSI: 000000000000000a RDI: ffff8800745c8110 + [ 452.064012] RBP: ffff8800b6e83ba0 R08: 000000000000c802 R09: 000000000000001c + [ 452.064012] R10: ffff880071096c4e R11: 0000000000000006 R12: ffff8800b6e83b18 + [ 452.064012] R13: ffffffff8125d51e R14: ffff8800b6e83ba0 R15: ffff880072a589c0 + [ 452.064012] FS: 00007fdc0b81e700(0000) GS:ffff8800b6e80000(0000) knlGS:0000000000000000 + [ 452.064012] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 + [ 452.064012] CR2: 0000000000625208 CR3: 0000000074404000 CR4: 00000000000006a0 + [ 452.064012] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 + [ 452.064012] DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400 + [ 452.064012] Process accel-pppd (pid: 6662, threadinfo ffff88007129a000, task ffff8800744f7410) + [ 452.064012] Stack: + [ 452.064012] ffff8800b6e83bb0 ffffffff81256559 ffff8800b6e83bc0 ffffffff8121c64a + [ 452.064012] ffff8800b6e83bf0 ffffffff8121ec7a ffff880072a589c0 ffff880071096c62 + [ 452.064012] 0000000000000011 ffffffff81430024 ffff8800b6e83c80 ffffffff8121f276 + [ 452.064012] Call Trace: + [ 452.064012] + [ 452.064012] [] _raw_spin_lock+0xe/0x10 + [ 452.064012] [] spin_lock+0x9/0xb + [ 452.064012] [] udp_queue_rcv_skb+0x186/0x269 + [ 452.064012] [] __udp4_lib_rcv+0x297/0x4ae + [ 452.064012] [] ? raw_rcv+0xe9/0xf0 + [ 452.064012] [] udp_rcv+0x1a/0x1c + [ 452.064012] [] ip_local_deliver_finish+0x12b/0x1a5 + [ 452.064012] [] ip_local_deliver+0x53/0x84 + [ 452.064012] [] ip_rcv_finish+0x2bc/0x2f3 + [ 452.064012] [] ip_rcv+0x210/0x269 + [ 452.064012] [] ? kvm_clock_get_cycles+0x9/0xb + [ 452.064012] [] __netif_receive_skb+0x3a5/0x3f7 + [ 452.064012] [] netif_receive_skb+0x57/0x5e + [ 452.064012] [] ? __netdev_alloc_skb+0x1f/0x3b + [ 452.064012] [] virtnet_poll+0x4ba/0x5a4 [virtio_net] + [ 452.064012] [] net_rx_action+0x73/0x184 + [ 452.064012] [] ? l2tp_xmit_skb+0x27a/0x4ac [l2tp_core] + [ 452.064012] [] __do_softirq+0xc3/0x1a8 + [ 452.064012] [] ? ack_APIC_irq+0x10/0x12 + [ 452.064012] [] ? _raw_spin_lock+0xe/0x10 + [ 452.064012] [] call_softirq+0x1c/0x26 + [ 452.064012] [] do_softirq+0x45/0x82 + [ 452.064012] [] irq_exit+0x42/0x9c + [ 452.064012] [] do_IRQ+0x8e/0xa5 + [ 452.064012] [] common_interrupt+0x6e/0x6e + [ 452.064012] + [ 452.064012] [] ? kfree+0x8a/0xa3 + [ 452.064012] [] ? l2tp_xmit_skb+0x27a/0x4ac [l2tp_core] + [ 452.064012] [] ? l2tp_xmit_skb+0x1dd/0x4ac [l2tp_core] + [ 452.064012] [] pppol2tp_sendmsg+0x15e/0x19c [l2tp_ppp] + [ 452.064012] [] __sock_sendmsg_nosec+0x22/0x24 + [ 452.064012] [] sock_sendmsg+0xa1/0xb6 + [ 452.064012] [] ? __schedule+0x5c1/0x616 + [ 452.064012] [] ? __dequeue_signal+0xb7/0x10c + [ 452.064012] [] ? fget_light+0x75/0x89 + [ 452.064012] [] ? sockfd_lookup_light+0x20/0x56 + [ 452.064012] [] sys_sendto+0x10c/0x13b + [ 452.064012] [] system_call_fastpath+0x16/0x1b + [ 452.064012] Code: 89 e5 72 0c 31 c0 48 81 ff 45 66 25 81 0f 92 c0 5d c3 55 b8 00 01 00 00 48 89 e5 f0 66 0f c1 07 0f b6 d4 38 d0 74 06 f3 90 8a 07 f6 5d c3 90 90 55 48 89 e5 9c 58 0f 1f 44 00 00 5d c3 55 48 + [ 452.064012] Call Trace: + [ 452.064012] [] _raw_spin_lock+0xe/0x10 + [ 452.064012] [] spin_lock+0x9/0xb + [ 452.064012] [] udp_queue_rcv_skb+0x186/0x269 + [ 452.064012] [] __udp4_lib_rcv+0x297/0x4ae + [ 452.064012] [] ? raw_rcv+0xe9/0xf0 + [ 452.064012] [] udp_rcv+0x1a/0x1c + [ 452.064012] [] ip_local_deliver_finish+0x12b/0x1a5 + [ 452.064012] [] ip_local_deliver+0x53/0x84 + [ 452.064012] [] ip_rcv_finish+0x2bc/0x2f3 + [ 452.064012] [] ip_rcv+0x210/0x269 + [ 452.064012] [] ? kvm_clock_get_cycles+0x9/0xb + [ 452.064012] [] __netif_receive_skb+0x3a5/0x3f7 + [ 452.064012] [] netif_receive_skb+0x57/0x5e + [ 452.064012] [] ? __netdev_alloc_skb+0x1f/0x3b + [ 452.064012] [] virtnet_poll+0x4ba/0x5a4 [virtio_net] + [ 452.064012] [] net_rx_action+0x73/0x184 + [ 452.064012] [] ? l2tp_xmit_skb+0x27a/0x4ac [l2tp_core] + [ 452.064012] [] __do_softirq+0xc3/0x1a8 + [ 452.064012] [] ? ack_APIC_irq+0x10/0x12 + [ 452.064012] [] ? _raw_spin_lock+0xe/0x10 + [ 452.064012] [] call_softirq+0x1c/0x26 + [ 452.064012] [] do_softirq+0x45/0x82 + [ 452.064012] [] irq_exit+0x42/0x9c + [ 452.064012] [] do_IRQ+0x8e/0xa5 + [ 452.064012] [] common_interrupt+0x6e/0x6e + [ 452.064012] [] ? kfree+0x8a/0xa3 + [ 452.064012] [] ? l2tp_xmit_skb+0x27a/0x4ac [l2tp_core] + [ 452.064012] [] ? l2tp_xmit_skb+0x1dd/0x4ac [l2tp_core] + [ 452.064012] [] pppol2tp_sendmsg+0x15e/0x19c [l2tp_ppp] + [ 452.064012] [] __sock_sendmsg_nosec+0x22/0x24 + [ 452.064012] [] sock_sendmsg+0xa1/0xb6 + [ 452.064012] [] ? __schedule+0x5c1/0x616 + [ 452.064012] [] ? __dequeue_signal+0xb7/0x10c + [ 452.064012] [] ? fget_light+0x75/0x89 + [ 452.064012] [] ? sockfd_lookup_light+0x20/0x56 + [ 452.064012] [] sys_sendto+0x10c/0x13b + [ 452.064012] [] system_call_fastpath+0x16/0x1b + + Reported-by: François Cachereul + Tested-by: François Cachereul + Signed-off-by: Eric Dumazet + Cc: James Chapman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/l2tp/l2tp_ppp.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/l2tp/l2tp_ppp.c 2014-04-27 23:37:59.000000000 +0000 ++++ linux-3.10-3.10.11/net/l2tp/l2tp_ppp.c 2014-04-28 00:40:30.000000000 +0000 +@@ -353,7 +353,9 @@ + goto error_put_sess_tun; + } + ++ local_bh_disable(); + l2tp_xmit_skb(session, skb, session->hdr_len); ++ local_bh_enable(); + + sock_put(ps->tunnel_sock); + sock_put(sk); +@@ -422,7 +424,9 @@ + skb->data[0] = ppph[0]; + skb->data[1] = ppph[1]; + ++ local_bh_disable(); + l2tp_xmit_skb(session, skb, session->hdr_len); ++ local_bh_enable(); + + sock_put(sk_tun); + sock_put(sk); +Index: linux-3.10-3.10.11/dummy/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1459_a41536775e712e7b438400f73e927ffe4b21149c.txt 2014-04-28 00:40:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.patch --- linux-3.10.11/debian/patches/rpi/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.patch 2014-04-28 00:40:31.000000000 +0000 @@ -0,0 +1,34 @@ +commit 3a26736015acfc8745db623efa7f57bc982ed516 +Author: Salva Peiró +Date: Fri Oct 11 12:50:03 2013 +0300 + + farsync: fix info leak in ioctl + + [ Upstream commit 96b340406724d87e4621284ebac5e059d67b2194 ] + + The fst_get_iface() code fails to initialize the two padding bytes of + struct sync_serial_settings after the ->loopback member. Add an explicit + memset(0) before filling the structure to avoid the info leak. + + Signed-off-by: Dan Carpenter + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wan/farsync.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wan/farsync.c 2014-04-27 23:37:59.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wan/farsync.c 2014-04-28 00:40:31.000000000 +0000 +@@ -1972,6 +1972,7 @@ + } + + i = port->index; ++ memset(&sync, 0, sizeof(sync)); + sync.clock_rate = FST_RDL(card, portConfig[i].lineSpeed); + /* Lucky card and linux use same encoding here */ + sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == +Index: linux-3.10-3.10.11/dummy/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1460_3a26736015acfc8745db623efa7f57bc982ed516.txt 2014-04-28 00:40:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.patch 2014-04-28 00:40:32.000000000 +0000 @@ -0,0 +1,34 @@ +commit 39283085a92262f9446b95d36df9724902b7579a +Author: Mathias Krause +Date: Mon Sep 30 22:05:40 2013 +0200 + + unix_diag: fix info leak + + [ Upstream commit 6865d1e834be84ddd5808d93d5035b492346c64a ] + + When filling the netlink message we miss to wipe the pad field, + therefore leak one byte of heap memory to userland. Fix this by + setting pad to 0. + + Signed-off-by: Mathias Krause + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/unix/diag.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/unix/diag.c 2014-04-27 23:37:59.000000000 +0000 ++++ linux-3.10-3.10.11/net/unix/diag.c 2014-04-28 00:40:31.000000000 +0000 +@@ -124,6 +124,7 @@ + rep->udiag_family = AF_UNIX; + rep->udiag_type = sk->sk_type; + rep->udiag_state = sk->sk_state; ++ rep->pad = 0; + rep->udiag_ino = sk_ino; + sock_diag_save_cookie(sk, rep->udiag_cookie); + +Index: linux-3.10-3.10.11/dummy/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1461_39283085a92262f9446b95d36df9724902b7579a.txt 2014-04-28 00:40:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.patch 2014-04-28 00:40:33.000000000 +0000 @@ -0,0 +1,49 @@ +commit 69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b +Author: Mathias Krause +Date: Mon Sep 30 22:03:07 2013 +0200 + + connector: use nlmsg_len() to check message length + + [ Upstream commit 162b2bedc084d2d908a04c93383ba02348b648b0 ] + + The current code tests the length of the whole netlink message to be + at least as long to fit a cn_msg. This is wrong as nlmsg_len includes + the length of the netlink message header. Use nlmsg_len() instead to + fix this "off-by-NLMSG_HDRLEN" size check. + + Signed-off-by: Mathias Krause + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/connector/connector.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/connector/connector.c 2014-04-27 23:37:59.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/connector/connector.c 2014-04-28 00:40:32.000000000 +0000 +@@ -157,17 +157,18 @@ + static void cn_rx_skb(struct sk_buff *__skb) + { + struct nlmsghdr *nlh; +- int err; + struct sk_buff *skb; ++ int len, err; + + skb = skb_get(__skb); + + if (skb->len >= NLMSG_HDRLEN) { + nlh = nlmsg_hdr(skb); ++ len = nlmsg_len(nlh); + +- if (nlh->nlmsg_len < sizeof(struct cn_msg) || ++ if (len < (int)sizeof(struct cn_msg) || + skb->len < nlh->nlmsg_len || +- nlh->nlmsg_len > CONNECTOR_MAX_MSG_SIZE) { ++ len > CONNECTOR_MAX_MSG_SIZE) { + kfree_skb(skb); + return; + } +Index: linux-3.10-3.10.11/dummy/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1462_69b9c5ea567e5c9b202b3e5bcac3c2eb72270e0b.txt 2014-04-28 00:40:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.patch 2014-04-28 00:40:34.000000000 +0000 @@ -0,0 +1,54 @@ +commit 608be70366c3abaa402ba9d6a8427b1b979633cf +Author: Eric Dumazet +Date: Sat Oct 12 14:08:34 2013 -0700 + + bnx2x: record rx queue for LRO packets + + [ Upstream commit 60e66fee56b2256dcb1dc2ea1b2ddcb6e273857d ] + + RPS support is kind of broken on bnx2x, because only non LRO packets + get proper rx queue information. This triggers reorders, as it seems + bnx2x like to generate a non LRO packet for segment including TCP PUSH + flag : (this might be pure coincidence, but all the reorders I've + seen involve segments with a PUSH) + + 11:13:34.335847 IP A > B: . 415808:447136(31328) ack 1 win 457 + 11:13:34.335992 IP A > B: . 447136:448560(1424) ack 1 win 457 + 11:13:34.336391 IP A > B: . 448560:479888(31328) ack 1 win 457 + 11:13:34.336425 IP A > B: P 511216:512640(1424) ack 1 win 457 + 11:13:34.336423 IP A > B: . 479888:511216(31328) ack 1 win 457 + 11:13:34.336924 IP A > B: . 512640:543968(31328) ack 1 win 457 + 11:13:34.336963 IP A > B: . 543968:575296(31328) ack 1 win 457 + + We must call skb_record_rx_queue() to properly give to RPS (and more + generally for TX queue selection on forward path) the receive queue + information. + + Similar fix is needed for skb_mark_napi_id(), but will be handled + in a separate patch to ease stable backports. + + Signed-off-by: Eric Dumazet + Cc: Willem de Bruijn + Cc: Eilon Greenstein + Acked-by: Dmitry Kravkov + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c 2014-04-27 23:37:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c 2014-04-28 00:40:33.000000000 +0000 +@@ -670,6 +670,7 @@ + } + } + #endif ++ skb_record_rx_queue(skb, fp->rx_queue); + napi_gro_receive(&fp->napi, skb); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1463_608be70366c3abaa402ba9d6a8427b1b979633cf.txt 2014-04-28 00:40:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.patch --- linux-3.10.11/debian/patches/rpi/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.patch 2014-04-28 00:40:34.000000000 +0000 @@ -0,0 +1,60 @@ +commit f02721718c7dcd4cb949fb0c0689e19a66c8c6ef +Author: Jason Wang +Date: Tue Oct 15 11:18:58 2013 +0800 + + virtio-net: don't respond to cpu hotplug notifier if we're not ready + + [ Upstream commit 3ab098df35f8b98b6553edc2e40234af512ba877 ] + + We're trying to re-configure the affinity unconditionally in cpu hotplug + callback. This may lead the issue during resuming from s3/s4 since + + - virt queues haven't been allocated at that time. + - it's unnecessary since thaw method will re-configure the affinity. + + Fix this issue by checking the config_enable and do nothing is we're not ready. + + The bug were introduced by commit 8de4b2f3ae90c8fc0f17eeaab87d5a951b66ee17 + (virtio-net: reset virtqueue affinity when doing cpu hotplug). + + Acked-by: Michael S. Tsirkin + Cc: Rusty Russell + Cc: Michael S. Tsirkin + Cc: Wanlong Gao + Reviewed-by: Wanlong Gao + Signed-off-by: Jason Wang + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/virtio_net.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/virtio_net.c 2014-04-27 23:37:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/virtio_net.c 2014-04-28 00:40:34.000000000 +0000 +@@ -1097,6 +1097,11 @@ + { + struct virtnet_info *vi = container_of(nfb, struct virtnet_info, nb); + ++ mutex_lock(&vi->config_lock); ++ ++ if (!vi->config_enable) ++ goto done; ++ + switch(action & ~CPU_TASKS_FROZEN) { + case CPU_ONLINE: + case CPU_DOWN_FAILED: +@@ -1109,6 +1114,9 @@ + default: + break; + } ++ ++done: ++ mutex_unlock(&vi->config_lock); + return NOTIFY_OK; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1464_f02721718c7dcd4cb949fb0c0689e19a66c8c6ef.txt 2014-04-28 00:40:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.patch 2014-04-28 00:40:35.000000000 +0000 @@ -0,0 +1,59 @@ +commit 413054e740f1efb2cb765323bc73ad01f986c4e1 +Author: Jason Wang +Date: Thu Jul 4 11:22:57 2013 +0930 + + virtio-net: fix the race between channels setting and refill + + [ Upstream commit 9b9cd8024a2882e896c65222aa421d461354e3f2 ] + + Commit 55257d72bd1c51f25106350f4983ec19f62ed1fa (virtio-net: fill only rx queues + which are being used) tries to refill on demand when changing the number of + channels by call try_refill_recv() directly, this may race: + + - the refill work who may do the refill in the same time + - the try_refill_recv() called in bh since napi was not disabled + + Which may led guest complain during setting channels: + + virtio_net virtio0: input.1:id 0 is not a head! + + Solve this issue by scheduling a refill work which can guarantee the + serialization of refill. + + Signed-off-by: Jason Wang + Cc: Sasha Levin + Cc: Rusty Russell + Cc: Michael S. Tsirkin + Signed-off-by: Rusty Russell + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/virtio_net.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/virtio_net.c 2014-04-28 00:40:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/virtio_net.c 2014-04-28 00:40:35.000000000 +0000 +@@ -902,7 +902,6 @@ + struct scatterlist sg; + struct virtio_net_ctrl_mq s; + struct net_device *dev = vi->dev; +- int i; + + if (!vi->has_cvq || !virtio_has_feature(vi->vdev, VIRTIO_NET_F_MQ)) + return 0; +@@ -916,10 +915,8 @@ + queue_pairs); + return -EINVAL; + } else { +- for (i = vi->curr_queue_pairs; i < queue_pairs; i++) +- if (!try_fill_recv(&vi->rq[i], GFP_KERNEL)) +- schedule_delayed_work(&vi->refill, 0); + vi->curr_queue_pairs = queue_pairs; ++ schedule_delayed_work(&vi->refill, 0); + } + + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1465_413054e740f1efb2cb765323bc73ad01f986c4e1.txt 2014-04-28 00:40:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.patch --- linux-3.10.11/debian/patches/rpi/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.patch 2014-04-28 00:40:36.000000000 +0000 @@ -0,0 +1,54 @@ +commit 30983d3c66572348f078fe2e2d55638d73c3e486 +Author: Jason Wang +Date: Tue Oct 15 11:18:59 2013 +0800 + + virtio-net: refill only when device is up during setting queues + + [ Upstream commit 35ed159bfd96a7547ec277ed8b550c7cbd9841b6 ] + + We used to schedule the refill work unconditionally after changing the + number of queues. This may lead an issue if the device is not + up. Since we only try to cancel the work in ndo_stop(), this may cause + the refill work still work after removing the device. Fix this by only + schedule the work when device is up. + + The bug were introduce by commit 9b9cd8024a2882e896c65222aa421d461354e3f2. + (virtio-net: fix the race between channels setting and refill) + + Signed-off-by: Jason Wang + Cc: Rusty Russell + Cc: Michael S. Tsirkin + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/virtio_net.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/virtio_net.c 2014-04-28 00:40:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/virtio_net.c 2014-04-28 00:40:35.000000000 +0000 +@@ -916,7 +916,9 @@ + return -EINVAL; + } else { + vi->curr_queue_pairs = queue_pairs; +- schedule_delayed_work(&vi->refill, 0); ++ /* virtnet_open() will refill when device is going to up. */ ++ if (dev->flags & IFF_UP) ++ schedule_delayed_work(&vi->refill, 0); + } + + return 0; +@@ -1714,7 +1716,9 @@ + vi->config_enable = true; + mutex_unlock(&vi->config_lock); + ++ rtnl_lock(); + virtnet_set_queues(vi, vi->curr_queue_pairs); ++ rtnl_unlock(); + + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1466_30983d3c66572348f078fe2e2d55638d73c3e486.txt 2014-04-28 00:40:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.patch 2014-04-28 00:40:37.000000000 +0000 @@ -0,0 +1,43 @@ +commit d14db2327635ac00aa7332bf26759d13ff39e2a5 +Author: Vlad Yasevich +Date: Tue Oct 15 14:57:45 2013 -0400 + + bridge: Correctly clamp MAX forward_delay when enabling STP + + [ Upstream commit 4b6c7879d84ad06a2ac5b964808ed599187a188d ] + + Commit be4f154d5ef0ca147ab6bcd38857a774133f5450 + bridge: Clamp forward_delay when enabling STP + had a typo when attempting to clamp maximum forward delay. + + It is possible to set bridge_forward_delay to be higher then + permitted maximum when STP is off. When turning STP on, the + higher then allowed delay has to be clamed down to max value. + + Signed-off-by: Vlad Yasevich + CC: Herbert Xu + CC: Stephen Hemminger + Reviewed-by: Veaceslav Falico + Acked-by: Herbert Xu + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/bridge/br_stp_if.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/bridge/br_stp_if.c 2014-04-28 00:38:03.000000000 +0000 ++++ linux-3.10-3.10.11/net/bridge/br_stp_if.c 2014-04-28 00:40:36.000000000 +0000 +@@ -134,7 +134,7 @@ + + if (br->bridge_forward_delay < BR_MIN_FORWARD_DELAY) + __br_set_forward_delay(br, BR_MIN_FORWARD_DELAY); +- else if (br->bridge_forward_delay < BR_MAX_FORWARD_DELAY) ++ else if (br->bridge_forward_delay > BR_MAX_FORWARD_DELAY) + __br_set_forward_delay(br, BR_MAX_FORWARD_DELAY); + + if (r == 0) { +Index: linux-3.10-3.10.11/dummy/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1467_d14db2327635ac00aa7332bf26759d13ff39e2a5.txt 2014-04-28 00:40:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.patch --- linux-3.10.11/debian/patches/rpi/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.patch 2014-04-28 00:40:38.000000000 +0000 @@ -0,0 +1,49 @@ +commit c9446ff691aca0ca902f31f7a9830ac725841759 +Author: Vlad Yasevich +Date: Tue Oct 15 22:01:29 2013 -0400 + + net: dst: provide accessor function to dst->xfrm + + [ Upstream commit e87b3998d795123b4139bc3f25490dd236f68212 ] + + dst->xfrm is conditionally defined. Provide accessor funtion that + is always available. + + Signed-off-by: Vlad Yasevich + Acked-by: Neil Horman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/dst.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/dst.h 2014-04-27 23:37:56.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/dst.h 2014-04-28 00:40:37.000000000 +0000 +@@ -477,10 +477,22 @@ + { + return dst_orig; + } ++ ++static inline struct xfrm_state *dst_xfrm(const struct dst_entry *dst) ++{ ++ return NULL; ++} ++ + #else + extern struct dst_entry *xfrm_lookup(struct net *net, struct dst_entry *dst_orig, + const struct flowi *fl, struct sock *sk, + int flags); ++ ++/* skb attached with this dst needs transformation if dst->xfrm is valid */ ++static inline struct xfrm_state *dst_xfrm(const struct dst_entry *dst) ++{ ++ return dst->xfrm; ++} + #endif + + #endif /* _NET_DST_H */ +Index: linux-3.10-3.10.11/dummy/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1468_c9446ff691aca0ca902f31f7a9830ac725841759.txt 2014-04-28 00:40:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.patch 2014-04-28 00:40:38.000000000 +0000 @@ -0,0 +1,42 @@ +commit 935be1dc2cafe04f1421e236f75d17878920631b +Author: Fan Du +Date: Tue Oct 15 22:01:30 2013 -0400 + + sctp: Use software crc32 checksum when xfrm transform will happen. + + [ Upstream commit 27127a82561a2a3ed955ce207048e1b066a80a2a ] + + igb/ixgbe have hardware sctp checksum support, when this feature is enabled + and also IPsec is armed to protect sctp traffic, ugly things happened as + xfrm_output checks CHECKSUM_PARTIAL to do checksum operation(sum every thing + up and pack the 16bits result in the checksum field). The result is fail + establishment of sctp communication. + + Signed-off-by: Fan Du + Cc: Neil Horman + Cc: Steffen Klassert + Signed-off-by: Vlad Yasevich + Acked-by: Neil Horman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/output.c 2014-04-27 23:37:56.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/output.c 2014-04-28 00:40:38.000000000 +0000 +@@ -547,7 +547,8 @@ + * by CRC32-C as described in . + */ + if (!sctp_checksum_disable) { +- if (!(dst->dev->features & NETIF_F_SCTP_CSUM)) { ++ if (!(dst->dev->features & NETIF_F_SCTP_CSUM) || ++ (dst_xfrm(dst) != NULL)) { + __u32 crc32 = sctp_start_cksum((__u8 *)sh, cksum_buf_len); + + /* 3) Put the resultant value into the checksum field in the +Index: linux-3.10-3.10.11/dummy/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1469_935be1dc2cafe04f1421e236f75d17878920631b.txt 2014-04-28 00:40:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.patch --- linux-3.10.11/debian/patches/rpi/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.patch 2014-04-28 00:40:39.000000000 +0000 @@ -0,0 +1,41 @@ +commit c69ee66768490b30127bc496921a3603c9366a10 +Author: Vlad Yasevich +Date: Tue Oct 15 22:01:31 2013 -0400 + + sctp: Perform software checksum if packet has to be fragmented. + + [ Upstream commit d2dbbba77e95dff4b4f901fee236fef6d9552072 ] + + IP/IPv6 fragmentation knows how to compute only TCP/UDP checksum. + This causes problems if SCTP packets has to be fragmented and + ipsummed has been set to PARTIAL due to checksum offload support. + This condition can happen when retransmitting after MTU discover, + or when INIT or other control chunks are larger then MTU. + Check for the rare fragmentation condition in SCTP and use software + checksum calculation in this case. + + CC: Fan Du + Signed-off-by: Vlad Yasevich + Acked-by: Neil Horman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/sctp/output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/sctp/output.c 2014-04-28 00:40:38.000000000 +0000 ++++ linux-3.10-3.10.11/net/sctp/output.c 2014-04-28 00:40:39.000000000 +0000 +@@ -548,7 +548,7 @@ + */ + if (!sctp_checksum_disable) { + if (!(dst->dev->features & NETIF_F_SCTP_CSUM) || +- (dst_xfrm(dst) != NULL)) { ++ (dst_xfrm(dst) != NULL) || packet->ipfragok) { + __u32 crc32 = sctp_start_cksum((__u8 *)sh, cksum_buf_len); + + /* 3) Put the resultant value into the checksum field in the +Index: linux-3.10-3.10.11/dummy/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1470_c69ee66768490b30127bc496921a3603c9366a10.txt 2014-04-28 00:40:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.patch 2014-04-28 00:40:40.000000000 +0000 @@ -0,0 +1,34 @@ +commit 8ffb77d881734108a750acb7fb2625643f924bc5 +Author: Salva Peiró +Date: Wed Oct 16 12:46:50 2013 +0200 + + wanxl: fix info leak in ioctl + + [ Upstream commit 2b13d06c9584b4eb773f1e80bbaedab9a1c344e1 ] + + The wanxl_ioctl() code fails to initialize the two padding bytes of + struct sync_serial_settings after the ->loopback member. Add an explicit + memset(0) before filling the structure to avoid the info leak. + + Signed-off-by: Salva Peiró + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wan/wanxl.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wan/wanxl.c 2014-04-27 23:37:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wan/wanxl.c 2014-04-28 00:40:39.000000000 +0000 +@@ -355,6 +355,7 @@ + ifr->ifr_settings.size = size; /* data size wanted */ + return -ENOBUFS; + } ++ memset(&line, 0, sizeof(line)); + line.clock_type = get_status(port)->clocking; + line.clock_rate = 0; + line.loopback = 0; +Index: linux-3.10-3.10.11/dummy/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1471_8ffb77d881734108a750acb7fb2625643f924bc5.txt 2014-04-28 00:40:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.patch 2014-04-28 00:40:41.000000000 +0000 @@ -0,0 +1,44 @@ +commit a8410b48a2d992411a8befbab05de5e886b4ac3e +Author: Vasundhara Volam +Date: Thu Oct 17 11:47:14 2013 +0530 + + be2net: pass if_id for v1 and V2 versions of TX_CREATE cmd + + [ Upstream commit 0fb88d61bc60779dde88b0fc268da17eb81d0412 ] + + It is a required field for all TX_CREATE cmd versions > 0. + This fixes a driver initialization failure, caused by recent SH-R Firmwares + (versions > 10.0.639.0) failing the TX_CREATE cmd when if_id field is + not passed. + + Signed-off-by: Sathya Perla + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/emulex/benet/be_cmds.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/emulex/benet/be_cmds.c 2014-04-27 23:37:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/emulex/benet/be_cmds.c 2014-04-28 00:40:40.000000000 +0000 +@@ -1150,7 +1150,6 @@ + + if (lancer_chip(adapter)) { + req->hdr.version = 1; +- req->if_id = cpu_to_le16(adapter->if_handle); + } else if (BEx_chip(adapter)) { + if (adapter->function_caps & BE_FUNCTION_CAPS_SUPER_NIC) + req->hdr.version = 2; +@@ -1158,6 +1157,8 @@ + req->hdr.version = 2; + } + ++ if (req->hdr.version > 0) ++ req->if_id = cpu_to_le16(adapter->if_handle); + req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size); + req->ulp_num = BE_ULP1_NUM; + req->type = BE_ETH_TX_RING_TYPE_STANDARD; +Index: linux-3.10-3.10.11/dummy/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1472_a8410b48a2d992411a8befbab05de5e886b4ac3e.txt 2014-04-28 00:40:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.patch 2014-04-28 00:40:41.000000000 +0000 @@ -0,0 +1,91 @@ +commit a769ad65ce0dea53fdf907008e5f6c93fe06168f +Author: Daniel Borkmann +Date: Thu Oct 17 22:51:31 2013 +0200 + + net: unix: inherit SOCK_PASS{CRED, SEC} flags from socket to fix race + + [ Upstream commit 90c6bd34f884cd9cee21f1d152baf6c18bcac949 ] + + In the case of credentials passing in unix stream sockets (dgram + sockets seem not affected), we get a rather sparse race after + commit 16e5726 ("af_unix: dont send SCM_CREDENTIALS by default"). + + We have a stream server on receiver side that requests credential + passing from senders (e.g. nc -U). Since we need to set SO_PASSCRED + on each spawned/accepted socket on server side to 1 first (as it's + not inherited), it can happen that in the time between accept() and + setsockopt() we get interrupted, the sender is being scheduled and + continues with passing data to our receiver. At that time SO_PASSCRED + is neither set on sender nor receiver side, hence in cmsg's + SCM_CREDENTIALS we get eventually pid:0, uid:65534, gid:65534 + (== overflow{u,g}id) instead of what we actually would like to see. + + On the sender side, here nc -U, the tests in maybe_add_creds() + invoked through unix_stream_sendmsg() would fail, as at that exact + time, as mentioned, the sender has neither SO_PASSCRED on his side + nor sees it on the server side, and we have a valid 'other' socket + in place. Thus, sender believes it would just look like a normal + connection, not needing/requesting SO_PASSCRED at that time. + + As reverting 16e5726 would not be an option due to the significant + performance regression reported when having creds always passed, + one way/trade-off to prevent that would be to set SO_PASSCRED on + the listener socket and allow inheriting these flags to the spawned + socket on server side in accept(). It seems also logical to do so + if we'd tell the listener socket to pass those flags onwards, and + would fix the race. + + Before, strace: + + recvmsg(4, {msg_name(0)=NULL, msg_iov(1)=[{"blub\n", 4096}], + msg_controllen=32, {cmsg_len=28, cmsg_level=SOL_SOCKET, + cmsg_type=SCM_CREDENTIALS{pid=0, uid=65534, gid=65534}}, + msg_flags=0}, 0) = 5 + + After, strace: + + recvmsg(4, {msg_name(0)=NULL, msg_iov(1)=[{"blub\n", 4096}], + msg_controllen=32, {cmsg_len=28, cmsg_level=SOL_SOCKET, + cmsg_type=SCM_CREDENTIALS{pid=11580, uid=1000, gid=1000}}, + msg_flags=0}, 0) = 5 + + Signed-off-by: Daniel Borkmann + Cc: Eric Dumazet + Cc: Eric W. Biederman + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/unix/af_unix.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/unix/af_unix.c 2014-04-27 23:37:55.000000000 +0000 ++++ linux-3.10-3.10.11/net/unix/af_unix.c 2014-04-28 00:40:41.000000000 +0000 +@@ -1245,6 +1245,15 @@ + return 0; + } + ++static void unix_sock_inherit_flags(const struct socket *old, ++ struct socket *new) ++{ ++ if (test_bit(SOCK_PASSCRED, &old->flags)) ++ set_bit(SOCK_PASSCRED, &new->flags); ++ if (test_bit(SOCK_PASSSEC, &old->flags)) ++ set_bit(SOCK_PASSSEC, &new->flags); ++} ++ + static int unix_accept(struct socket *sock, struct socket *newsock, int flags) + { + struct sock *sk = sock->sk; +@@ -1279,6 +1288,7 @@ + /* attach accepted sock to socket */ + unix_state_lock(tsk); + newsock->state = SS_CONNECTED; ++ unix_sock_inherit_flags(sock, newsock); + sock_graft(tsk, newsock); + unix_state_unlock(tsk); + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1473_a769ad65ce0dea53fdf907008e5f6c93fe06168f.txt 2014-04-28 00:40:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.patch 2014-04-28 00:40:42.000000000 +0000 @@ -0,0 +1,58 @@ +commit 872095cb74f0acd64d89e578a65df877870f198d +Author: Seif Mazareeb +Date: Thu Oct 17 20:33:21 2013 -0700 + + net: fix cipso packet validation when !NETLABEL + + [ Upstream commit f2e5ddcc0d12f9c4c7b254358ad245c9dddce13b ] + + When CONFIG_NETLABEL is disabled, the cipso_v4_validate() function could loop + forever in the main loop if opt[opt_iter +1] == 0, this will causing a kernel + crash in an SMP system, since the CPU executing this function will + stall /not respond to IPIs. + + This problem can be reproduced by running the IP Stack Integrity Checker + (http://isic.sourceforge.net) using the following command on a Linux machine + connected to DUT: + + "icmpsic -s rand -d -r 123456" + wait (1-2 min) + + Signed-off-by: Seif Mazareeb + Acked-by: Paul Moore + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/cipso_ipv4.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/cipso_ipv4.h 2014-04-27 23:37:55.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/cipso_ipv4.h 2014-04-28 00:40:42.000000000 +0000 +@@ -290,6 +290,7 @@ + unsigned char err_offset = 0; + u8 opt_len = opt[1]; + u8 opt_iter; ++ u8 tag_len; + + if (opt_len < 8) { + err_offset = 1; +@@ -302,11 +303,12 @@ + } + + for (opt_iter = 6; opt_iter < opt_len;) { +- if (opt[opt_iter + 1] > (opt_len - opt_iter)) { ++ tag_len = opt[opt_iter + 1]; ++ if ((tag_len == 0) || (opt[opt_iter + 1] > (opt_len - opt_iter))) { + err_offset = opt_iter + 1; + goto out; + } +- opt_iter += opt[opt_iter + 1]; ++ opt_iter += tag_len; + } + + out: +Index: linux-3.10-3.10.11/dummy/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1474_872095cb74f0acd64d89e578a65df877870f198d.txt 2014-04-28 00:40:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.patch --- linux-3.10.11/debian/patches/rpi/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.patch 2014-04-28 00:40:43.000000000 +0000 @@ -0,0 +1,82 @@ +commit b90cd7b9d0baab2e8176d9cca5f18a592ef16063 +Author: Hannes Frederic Sowa +Date: Tue Oct 22 00:07:47 2013 +0200 + + inet: fix possible memory corruption with UDP_CORK and UFO + + [ This is a simplified -stable version of a set of upstream commits. ] + + This is a replacement patch only for stable which does fix the problems + handled by the following two commits in -net: + + "ip_output: do skb ufo init for peeked non ufo skb as well" (e93b7d748be887cd7639b113ba7d7ef792a7efb9) + "ip6_output: do skb ufo init for peeked non ufo skb as well" (c547dbf55d5f8cf615ccc0e7265e98db27d3fb8b) + + Three frames are written on a corked udp socket for which the output + netdevice has UFO enabled. If the first and third frame are smaller than + the mtu and the second one is bigger, we enqueue the second frame with + skb_append_datato_frags without initializing the gso fields. This leads + to the third frame appended regulary and thus constructing an invalid skb. + + This fixes the problem by always using skb_append_datato_frags as soon + as the first frag got enqueued to the skb without marking the packet + as SKB_GSO_UDP. + + The problem with only two frames for ipv6 was fixed by "ipv6: udp + packets following an UFO enqueued packet need also be handled by UFO" + (2811ebac2521ceac84f2bdae402455baa6a7fb47). + + Signed-off-by: Hannes Frederic Sowa + Cc: Jiri Pirko + Cc: Eric Dumazet + Cc: David Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/linux/skbuff.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/skbuff.h 2014-04-27 23:37:54.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/skbuff.h 2014-04-28 00:40:42.000000000 +0000 +@@ -1308,6 +1308,11 @@ + return len + skb_headlen(skb); + } + ++static inline bool skb_has_frags(const struct sk_buff *skb) ++{ ++ return skb_shinfo(skb)->nr_frags; ++} ++ + /** + * __skb_fill_page_desc - initialise a paged fragment in an skb + * @skb: buffer containing fragment to be initialised +Index: linux-3.10-3.10.11/net/ipv4/ip_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv4/ip_output.c 2014-04-28 00:38:09.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv4/ip_output.c 2014-04-28 00:40:43.000000000 +0000 +@@ -844,7 +844,7 @@ + csummode = CHECKSUM_PARTIAL; + + cork->length += length; +- if (((length > mtu) || (skb && skb_is_gso(skb))) && ++ if (((length > mtu) || (skb && skb_has_frags(skb))) && + (sk->sk_protocol == IPPROTO_UDP) && + (rt->dst.dev->features & NETIF_F_UFO) && !rt->dst.header_len) { + err = ip_ufo_append_data(sk, queue, getfrag, from, length, +Index: linux-3.10-3.10.11/net/ipv6/ip6_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_output.c 2014-04-28 00:38:11.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_output.c 2014-04-28 00:40:43.000000000 +0000 +@@ -1250,7 +1250,7 @@ + skb = skb_peek_tail(&sk->sk_write_queue); + cork->length += length; + if (((length > mtu) || +- (skb && skb_is_gso(skb))) && ++ (skb && skb_has_frags(skb))) && + (sk->sk_protocol == IPPROTO_UDP) && + (rt->dst.dev->features & NETIF_F_UFO)) { + err = ip6_ufo_append_data(sk, getfrag, from, length, +Index: linux-3.10-3.10.11/dummy/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1475_b90cd7b9d0baab2e8176d9cca5f18a592ef16063.txt 2014-04-28 00:40:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.patch --- linux-3.10.11/debian/patches/rpi/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.patch 2014-04-28 00:40:44.000000000 +0000 @@ -0,0 +1,57 @@ +commit 208a6152b633a33722cc53bca47c46b79e88a2ad +Author: Julian Anastasov +Date: Sun Oct 20 15:43:03 2013 +0300 + + ipv6: always prefer rt6i_gateway if present + + [ Upstream commit 96dc809514fb2328605198a0602b67554d8cce7b ] + + In v3.9 6fd6ce2056de2709 ("ipv6: Do not depend on rt->n in + ip6_finish_output2()." changed the behaviour of ip6_finish_output2() + such that the recently introduced rt6_nexthop() is used + instead of an assigned neighbor. + + As rt6_nexthop() prefers rt6i_gateway only for gatewayed + routes this causes a problem for users like IPVS, xt_TEE and + RAW(hdrincl) if they want to use different address for routing + compared to the destination address. + + Another case is when redirect can create RTF_DYNAMIC + route without RTF_GATEWAY flag, we ignore the rt6i_gateway + in rt6_nexthop(). + + Fix the above problems by considering the rt6i_gateway if + present, so that traffic routed to address on local subnet is + not wrongly diverted to the destination address. + + Thanks to Simon Horman and Phil Oester for spotting the + problematic commit. + + Thanks to Hannes Frederic Sowa for his review and help in testing. + + Reported-by: Phil Oester + Reported-by: Mark Brooks + Signed-off-by: Julian Anastasov + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/ip6_route.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/ip6_route.h 2014-04-27 23:37:54.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/ip6_route.h 2014-04-28 00:40:43.000000000 +0000 +@@ -196,7 +196,7 @@ + + static inline struct in6_addr *rt6_nexthop(struct rt6_info *rt, struct in6_addr *dest) + { +- if (rt->rt6i_flags & RTF_GATEWAY) ++ if (rt->rt6i_flags & RTF_GATEWAY || !ipv6_addr_any(&rt->rt6i_gateway)) + return &rt->rt6i_gateway; + return dest; + } +Index: linux-3.10-3.10.11/dummy/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1476_208a6152b633a33722cc53bca47c46b79e88a2ad.txt 2014-04-28 00:40:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.patch --- linux-3.10.11/debian/patches/rpi/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.patch 2014-04-28 00:40:45.000000000 +0000 @@ -0,0 +1,107 @@ +commit 044d6efb797bfa1131bfb510102505ba41bfec52 +Author: Julian Anastasov +Date: Sun Oct 20 15:43:04 2013 +0300 + + ipv6: fill rt6i_gateway with nexthop address + + [ Upstream commit 550bab42f83308c9d6ab04a980cc4333cef1c8fa ] + + Make sure rt6i_gateway contains nexthop information in + all routes returned from lookup or when routes are directly + attached to skb for generated ICMP packets. + + The effect of this patch should be a faster version of + rt6_nexthop() and the consideration of local addresses as + nexthop. + + Signed-off-by: Julian Anastasov + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/net/ip6_route.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/net/ip6_route.h 2014-04-28 00:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/include/net/ip6_route.h 2014-04-28 00:40:44.000000000 +0000 +@@ -194,11 +194,9 @@ + skb_dst(skb)->dev->mtu : dst_mtu(skb_dst(skb)); + } + +-static inline struct in6_addr *rt6_nexthop(struct rt6_info *rt, struct in6_addr *dest) ++static inline struct in6_addr *rt6_nexthop(struct rt6_info *rt) + { +- if (rt->rt6i_flags & RTF_GATEWAY || !ipv6_addr_any(&rt->rt6i_gateway)) +- return &rt->rt6i_gateway; +- return dest; ++ return &rt->rt6i_gateway; + } + + #endif +Index: linux-3.10-3.10.11/net/ipv6/ip6_output.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/ip6_output.c 2014-04-28 00:40:43.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/ip6_output.c 2014-04-28 00:40:44.000000000 +0000 +@@ -130,7 +130,7 @@ + } + + rcu_read_lock_bh(); +- nexthop = rt6_nexthop((struct rt6_info *)dst, &ipv6_hdr(skb)->daddr); ++ nexthop = rt6_nexthop((struct rt6_info *)dst); + neigh = __ipv6_neigh_lookup_noref(dst->dev, nexthop); + if (unlikely(!neigh)) + neigh = __neigh_create(&nd_tbl, nexthop, dst->dev, false); +@@ -898,7 +898,7 @@ + */ + rt = (struct rt6_info *) *dst; + rcu_read_lock_bh(); +- n = __ipv6_neigh_lookup_noref(rt->dst.dev, rt6_nexthop(rt, &fl6->daddr)); ++ n = __ipv6_neigh_lookup_noref(rt->dst.dev, rt6_nexthop(rt)); + err = n && !(n->nud_state & NUD_VALID) ? -EINVAL : 0; + rcu_read_unlock_bh(); + +Index: linux-3.10-3.10.11/net/ipv6/route.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/route.c 2014-04-27 23:37:54.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/route.c 2014-04-28 00:40:44.000000000 +0000 +@@ -848,7 +848,6 @@ + if (ort->rt6i_dst.plen != 128 && + ipv6_addr_equal(&ort->rt6i_dst.addr, daddr)) + rt->rt6i_flags |= RTF_ANYCAST; +- rt->rt6i_gateway = *daddr; + } + + rt->rt6i_flags |= RTF_CACHE; +@@ -1245,6 +1244,7 @@ + rt->dst.flags |= DST_HOST; + rt->dst.output = ip6_output; + atomic_set(&rt->dst.__refcnt, 1); ++ rt->rt6i_gateway = fl6->daddr; + rt->rt6i_dst.addr = fl6->daddr; + rt->rt6i_dst.plen = 128; + rt->rt6i_idev = idev; +@@ -1801,7 +1801,10 @@ + in6_dev_hold(rt->rt6i_idev); + rt->dst.lastuse = jiffies; + +- rt->rt6i_gateway = ort->rt6i_gateway; ++ if (ort->rt6i_flags & RTF_GATEWAY) ++ rt->rt6i_gateway = ort->rt6i_gateway; ++ else ++ rt->rt6i_gateway = *dest; + rt->rt6i_flags = ort->rt6i_flags; + if ((ort->rt6i_flags & (RTF_DEFAULT | RTF_ADDRCONF)) == + (RTF_DEFAULT | RTF_ADDRCONF)) +@@ -2088,6 +2091,7 @@ + else + rt->rt6i_flags |= RTF_LOCAL; + ++ rt->rt6i_gateway = *addr; + rt->rt6i_dst.addr = *addr; + rt->rt6i_dst.plen = 128; + rt->rt6i_table = fib6_get_table(net, RT6_TABLE_LOCAL); +Index: linux-3.10-3.10.11/dummy/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1477_044d6efb797bfa1131bfb510102505ba41bfec52.txt 2014-04-28 00:40:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.patch --- linux-3.10.11/debian/patches/rpi/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.patch 2014-04-28 00:40:46.000000000 +0000 @@ -0,0 +1,39 @@ +commit 2332d212926aaa92d4164482f6f7583c0f796647 +Author: Julian Anastasov +Date: Sun Oct 20 15:43:05 2013 +0300 + + netfilter: nf_conntrack: fix rt6i_gateway checks for H.323 helper + + [ Upstream commit 56e42441ed54b092d6c7411138ce60d049e7c731 ] + + Now when rt6_nexthop() can return nexthop address we can use it + for proper nexthop comparison of directly connected destinations. + For more information refer to commit bbb5823cf742a7 + ("netfilter: nf_conntrack: fix rt_gateway checks for H.323 helper"). + + Signed-off-by: Julian Anastasov + Acked-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/netfilter/nf_conntrack_h323_main.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/netfilter/nf_conntrack_h323_main.c 2014-04-27 23:37:53.000000000 +0000 ++++ linux-3.10-3.10.11/net/netfilter/nf_conntrack_h323_main.c 2014-04-28 00:40:45.000000000 +0000 +@@ -778,8 +778,8 @@ + flowi6_to_flowi(&fl1), false)) { + if (!afinfo->route(&init_net, (struct dst_entry **)&rt2, + flowi6_to_flowi(&fl2), false)) { +- if (!memcmp(&rt1->rt6i_gateway, &rt2->rt6i_gateway, +- sizeof(rt1->rt6i_gateway)) && ++ if (ipv6_addr_equal(rt6_nexthop(rt1), ++ rt6_nexthop(rt2)) && + rt1->dst.dev == rt2->dst.dev) + ret = 1; + dst_release(&rt2->dst); +Index: linux-3.10-3.10.11/dummy/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1478_2332d212926aaa92d4164482f6f7583c0f796647.txt 2014-04-28 00:40:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.patch 2014-04-28 00:40:47.000000000 +0000 @@ -0,0 +1,86 @@ +commit 8df627daa0bde7de4236ab68ef2dded12ab624c8 +Author: Hannes Frederic Sowa +Date: Mon Oct 21 06:17:15 2013 +0200 + + ipv6: probe routes asynchronous in rt6_probe + + [ Upstream commit c2f17e827b419918c856131f592df9521e1a38e3 ] + + Routes need to be probed asynchronous otherwise the call stack gets + exhausted when the kernel attemps to deliver another skb inline, like + e.g. xt_TEE does, and we probe at the same time. + + We update neigh->updated still at once, otherwise we would send to + many probes. + + Cc: Julian Anastasov + Signed-off-by: Hannes Frederic Sowa + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/ipv6/route.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/ipv6/route.c 2014-04-28 00:40:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/ipv6/route.c 2014-04-28 00:40:46.000000000 +0000 +@@ -473,6 +473,24 @@ + } + + #ifdef CONFIG_IPV6_ROUTER_PREF ++struct __rt6_probe_work { ++ struct work_struct work; ++ struct in6_addr target; ++ struct net_device *dev; ++}; ++ ++static void rt6_probe_deferred(struct work_struct *w) ++{ ++ struct in6_addr mcaddr; ++ struct __rt6_probe_work *work = ++ container_of(w, struct __rt6_probe_work, work); ++ ++ addrconf_addr_solict_mult(&work->target, &mcaddr); ++ ndisc_send_ns(work->dev, NULL, &work->target, &mcaddr, NULL); ++ dev_put(work->dev); ++ kfree(w); ++} ++ + static void rt6_probe(struct rt6_info *rt) + { + struct neighbour *neigh; +@@ -496,17 +514,23 @@ + + if (!neigh || + time_after(jiffies, neigh->updated + rt->rt6i_idev->cnf.rtr_probe_interval)) { +- struct in6_addr mcaddr; +- struct in6_addr *target; ++ struct __rt6_probe_work *work; + +- if (neigh) { ++ work = kmalloc(sizeof(*work), GFP_ATOMIC); ++ ++ if (neigh && work) + neigh->updated = jiffies; ++ ++ if (neigh) + write_unlock(&neigh->lock); +- } + +- target = (struct in6_addr *)&rt->rt6i_gateway; +- addrconf_addr_solict_mult(target, &mcaddr); +- ndisc_send_ns(rt->dst.dev, NULL, target, &mcaddr, NULL); ++ if (work) { ++ INIT_WORK(&work->work, rt6_probe_deferred); ++ work->target = rt->rt6i_gateway; ++ dev_hold(rt->dst.dev); ++ work->dev = rt->dst.dev; ++ schedule_work(&work->work); ++ } + } else { + out: + write_unlock(&neigh->lock); +Index: linux-3.10-3.10.11/dummy/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1479_8df627daa0bde7de4236ab68ef2dded12ab624c8.txt 2014-04-28 00:40:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.patch --- linux-3.10.11/debian/patches/rpi/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.patch 2014-04-28 00:40:48.000000000 +0000 @@ -0,0 +1,46 @@ +commit 9babd8ab0192070535fe1bab8b86d1c7b1e71943 +Author: Mariusz Ceier +Date: Mon Oct 21 19:45:04 2013 +0200 + + davinci_emac.c: Fix IFF_ALLMULTI setup + + [ Upstream commit d69e0f7ea95fef8059251325a79c004bac01f018 ] + + When IFF_ALLMULTI flag is set on interface and IFF_PROMISC isn't, + emac_dev_mcast_set should only enable RX of multicasts and reset + MACHASH registers. + + It does this, but afterwards it either sets up multicast MACs + filtering or disables RX of multicasts and resets MACHASH registers + again, rendering IFF_ALLMULTI flag useless. + + This patch fixes emac_dev_mcast_set, so that multicast MACs filtering and + disabling of RX of multicasts are skipped when IFF_ALLMULTI flag is set. + + Tested with kernel 2.6.37. + + Signed-off-by: Mariusz Ceier + Acked-by: Mugunthan V N + Signed-off-by: David S. Miller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/ethernet/ti/davinci_emac.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/ethernet/ti/davinci_emac.c 2014-04-27 23:37:53.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/ethernet/ti/davinci_emac.c 2014-04-28 00:40:47.000000000 +0000 +@@ -876,8 +876,7 @@ + netdev_mc_count(ndev) > EMAC_DEF_MAX_MULTICAST_ADDRESSES) { + mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); + emac_add_mcast(priv, EMAC_ALL_MULTI_SET, NULL); +- } +- if (!netdev_mc_empty(ndev)) { ++ } else if (!netdev_mc_empty(ndev)) { + struct netdev_hw_addr *ha; + + mbp_enable = (mbp_enable | EMAC_MBP_RXMCAST); +Index: linux-3.10-3.10.11/dummy/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1480_9babd8ab0192070535fe1bab8b86d1c7b1e71943.txt 2014-04-28 00:40:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.patch 2014-04-28 00:40:48.000000000 +0000 @@ -0,0 +1,56 @@ +commit 4a402463a7a4a4243c9c66600fd01ae800f959e3 +Author: AKASHI Takahiro +Date: Wed Oct 9 15:58:29 2013 +0100 + + ARM: 7851/1: check for number of arguments in syscall_get/set_arguments() + + commit 3c1532df5c1b54b5f6246cdef94eeb73a39fe43a upstream. + + In ftrace_syscall_enter(), + syscall_get_arguments(..., 0, n, ...) + if (i == 0) { ...; n--;} + memcpy(..., n * sizeof(args[0])); + If 'number of arguments(n)' is zero and 'argument index(i)' is also zero in + syscall_get_arguments(), none of arguments should be copied by memcpy(). + Otherwise 'n--' can be a big positive number and unexpected amount of data + will be copied. Tracing system calls which take no argument, say sync(void), + may hit this case and eventually make the system corrupted. + This patch fixes the issue both in syscall_get_arguments() and + syscall_set_arguments(). + + Acked-by: Will Deacon + Signed-off-by: AKASHI Takahiro + Signed-off-by: Will Deacon + Signed-off-by: Russell King + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/include/asm/syscall.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/include/asm/syscall.h 2014-04-27 23:37:52.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/include/asm/syscall.h 2014-04-28 00:40:48.000000000 +0000 +@@ -57,6 +57,9 @@ + unsigned int i, unsigned int n, + unsigned long *args) + { ++ if (n == 0) ++ return; ++ + if (i + n > SYSCALL_MAX_ARGS) { + unsigned long *args_bad = args + SYSCALL_MAX_ARGS - i; + unsigned int n_bad = n + i - SYSCALL_MAX_ARGS; +@@ -81,6 +84,9 @@ + unsigned int i, unsigned int n, + const unsigned long *args) + { ++ if (n == 0) ++ return; ++ + if (i + n > SYSCALL_MAX_ARGS) { + pr_warning("%s called with max args %d, handling only %d\n", + __func__, i + n, SYSCALL_MAX_ARGS); +Index: linux-3.10-3.10.11/dummy/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1481_4a402463a7a4a4243c9c66600fd01ae800f959e3.txt 2014-04-28 00:40:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.patch 2014-04-28 00:40:49.000000000 +0000 @@ -0,0 +1,81 @@ +commit 77fc96c899a5c926dd8ba6f340f1e04933e7bfd2 +Author: Linus Walleij +Date: Mon Oct 7 15:19:53 2013 +0200 + + ARM: integrator: deactivate timer0 on the Integrator/CP + + commit 29114fd7db2fc82a34da8340d29b8fa413e03dca upstream. + + This fixes a long-standing Integrator/CP regression from + commit 870e2928cf3368ca9b06bc925d0027b0a56bcd8e + "ARM: integrator-cp: convert use CLKSRC_OF for timer init" + + When this code was introduced, the both aliases pointing the + system to use timer1 as primary (clocksource) and timer2 + as secondary (clockevent) was ignored, and the system would + simply use the first two timers found as clocksource and + clockevent. + + However this made the system timeline accelerate by a + factor x25, as it turns out that the way the clocking + actually works (totally undocumented and found after some + trial-and-error) is that timer0 runs @ 25MHz and timer1 + and timer2 runs @ 1MHz. Presumably this divider setting + is a boot-on default and configurable albeit the way to + configure it is not documented. + + So as a quick fix to the problem, let's mark timer0 as + disabled, so the code will chose timer1 and timer2 as it + used to. + + This also deletes the two aliases for the primary and + secondary timer as they have been superceded by the + auto-selection + + Cc: Rob Herring + Cc: Russell King + Signed-off-by: Linus Walleij + Signed-off-by: Olof Johansson + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arm/boot/dts/integratorcp.dts +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/boot/dts/integratorcp.dts 2014-04-27 23:37:52.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/boot/dts/integratorcp.dts 2014-04-28 00:40:49.000000000 +0000 +@@ -9,11 +9,6 @@ + model = "ARM Integrator/CP"; + compatible = "arm,integrator-cp"; + +- aliases { +- arm,timer-primary = &timer2; +- arm,timer-secondary = &timer1; +- }; +- + chosen { + bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk"; + }; +@@ -24,14 +19,18 @@ + }; + + timer0: timer@13000000 { ++ /* TIMER0 runs @ 25MHz */ + compatible = "arm,integrator-cp-timer"; ++ status = "disabled"; + }; + + timer1: timer@13000100 { ++ /* TIMER1 runs @ 1MHz */ + compatible = "arm,integrator-cp-timer"; + }; + + timer2: timer@13000200 { ++ /* TIMER2 runs @ 1MHz */ + compatible = "arm,integrator-cp-timer"; + }; + +Index: linux-3.10-3.10.11/dummy/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1482_77fc96c899a5c926dd8ba6f340f1e04933e7bfd2.txt 2014-04-28 00:40:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.patch 2014-04-28 00:40:50.000000000 +0000 @@ -0,0 +1,47 @@ +commit 5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd +Author: Mika Westerberg +Date: Tue Oct 1 17:35:43 2013 +0300 + + gpio/lynxpoint: check if the interrupt is enabled in IRQ handler + + commit 03d152d5582abc8a1c19cb107164c3724bbd4be4 upstream. + + Checking LP_INT_STAT is not enough in the interrupt handler because its + contents get updated regardless of whether the pin has interrupt enabled or + not. This causes the driver to loop forever for GPIOs that are pulled up. + + Fix this by checking the interrupt enable bit for the pin as well. + + Signed-off-by: Mika Westerberg + Acked-by: Mathias Nyman + Signed-off-by: Linus Walleij + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpio/gpio-lynxpoint.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpio/gpio-lynxpoint.c 2014-04-27 23:37:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpio/gpio-lynxpoint.c 2014-04-28 00:40:49.000000000 +0000 +@@ -248,14 +248,15 @@ + struct lp_gpio *lg = irq_data_get_irq_handler_data(data); + struct irq_chip *chip = irq_data_get_irq_chip(data); + u32 base, pin, mask; +- unsigned long reg, pending; ++ unsigned long reg, ena, pending; + unsigned virq; + + /* check from GPIO controller which pin triggered the interrupt */ + for (base = 0; base < lg->chip.ngpio; base += 32) { + reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT); ++ ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE); + +- while ((pending = inl(reg))) { ++ while ((pending = (inl(reg) & inl(ena)))) { + pin = __ffs(pending); + mask = BIT(pin); + /* Clear before handling so we don't lose an edge */ +Index: linux-3.10-3.10.11/dummy/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1483_5e2672132dbdb79a7d70711ca5c4bd1fa770b7bd.txt 2014-04-28 00:40:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.patch 2014-04-28 00:40:51.000000000 +0000 @@ -0,0 +1,91 @@ +commit 2d99b6dd66b5778d92fc411b48037084528e1ae2 +Author: Mikulas Patocka +Date: Wed Oct 16 03:17:47 2013 +0100 + + dm snapshot: fix data corruption + + commit e9c6a182649f4259db704ae15a91ac820e63b0ca upstream. + + This patch fixes a particular type of data corruption that has been + encountered when loading a snapshot's metadata from disk. + + When we allocate a new chunk in persistent_prepare, we increment + ps->next_free and we make sure that it doesn't point to a metadata area + by further incrementing it if necessary. + + When we load metadata from disk on device activation, ps->next_free is + positioned after the last used data chunk. However, if this last used + data chunk is followed by a metadata area, ps->next_free is positioned + erroneously to the metadata area. A newly-allocated chunk is placed at + the same location as the metadata area, resulting in data or metadata + corruption. + + This patch changes the code so that ps->next_free skips the metadata + area when metadata are loaded in function read_exceptions. + + The patch also moves a piece of code from persistent_prepare_exception + to a separate function skip_metadata to avoid code duplication. + + CVE-2013-4299 + + Signed-off-by: Mikulas Patocka + Cc: Mike Snitzer + Signed-off-by: Alasdair G Kergon + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/dm-snap-persistent.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/dm-snap-persistent.c 2014-04-28 00:37:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/dm-snap-persistent.c 2014-04-28 00:40:50.000000000 +0000 +@@ -269,6 +269,14 @@ + return NUM_SNAPSHOT_HDR_CHUNKS + ((ps->exceptions_per_area + 1) * area); + } + ++static void skip_metadata(struct pstore *ps) ++{ ++ uint32_t stride = ps->exceptions_per_area + 1; ++ chunk_t next_free = ps->next_free; ++ if (sector_div(next_free, stride) == NUM_SNAPSHOT_HDR_CHUNKS) ++ ps->next_free++; ++} ++ + /* + * Read or write a metadata area. Remembering to skip the first + * chunk which holds the header. +@@ -502,6 +510,8 @@ + + ps->current_area--; + ++ skip_metadata(ps); ++ + return 0; + } + +@@ -616,8 +626,6 @@ + struct dm_exception *e) + { + struct pstore *ps = get_info(store); +- uint32_t stride; +- chunk_t next_free; + sector_t size = get_dev_size(dm_snap_cow(store->snap)->bdev); + + /* Is there enough room ? */ +@@ -630,10 +638,8 @@ + * Move onto the next free pending, making sure to take + * into account the location of the metadata chunks. + */ +- stride = (ps->exceptions_per_area + 1); +- next_free = ++ps->next_free; +- if (sector_div(next_free, stride) == 1) +- ps->next_free++; ++ ps->next_free++; ++ skip_metadata(ps); + + atomic_inc(&ps->pending_count); + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1484_2d99b6dd66b5778d92fc411b48037084528e1ae2.txt 2014-04-28 00:40:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.patch --- linux-3.10.11/debian/patches/rpi/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.patch 2014-04-28 00:40:52.000000000 +0000 @@ -0,0 +1,37 @@ +commit fe0051d83cb951fbeab6712633ca2e31de22ee11 +Author: James Ralston +Date: Tue Sep 24 16:47:55 2013 -0700 + + i2c: ismt: initialize DMA buffer + + commit bf4169100c909667ede6af67668b3ecce6928343 upstream. + + This patch adds code to initialize the DMA buffer to compensate for + possible hardware data corruption. + + Signed-off-by: James Ralston + [wsa: changed to use 'sizeof'] + Signed-off-by: Wolfram Sang + Cc: Jean Delvare + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-ismt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-ismt.c 2014-04-27 23:37:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-ismt.c 2014-04-28 00:40:51.000000000 +0000 +@@ -393,6 +393,9 @@ + + desc = &priv->hw[priv->head]; + ++ /* Initialize the DMA buffer */ ++ memset(priv->dma_buffer, 0, sizeof(priv->dma_buffer)); ++ + /* Initialize the descriptor */ + memset(desc, 0, sizeof(struct ismt_desc)); + desc->tgtaddr_rw = ISMT_DESC_ADDR_RW(addr, read_write); +Index: linux-3.10-3.10.11/dummy/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1485_fe0051d83cb951fbeab6712633ca2e31de22ee11.txt 2014-04-28 00:40:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.patch --- linux-3.10.11/debian/patches/rpi/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.patch 2014-04-28 00:40:52.000000000 +0000 @@ -0,0 +1,60 @@ +commit 7ed008638ee15991b79d8867d382e141fee89a69 +Author: Hugh Dickins +Date: Wed Oct 16 13:47:08 2013 -0700 + + mm: fix BUG in __split_huge_page_pmd + + commit 750e8165f5e87b6a142be953640eabb13a9d350a upstream. + + Occasionally we hit the BUG_ON(pmd_trans_huge(*pmd)) at the end of + __split_huge_page_pmd(): seen when doing madvise(,,MADV_DONTNEED). + + It's invalid: we don't always have down_write of mmap_sem there: a racing + do_huge_pmd_wp_page() might have copied-on-write to another huge page + before our split_huge_page() got the anon_vma lock. + + Forget the BUG_ON, just go back and try again if this happens. + + Signed-off-by: Hugh Dickins + Acked-by: Kirill A. Shutemov + Cc: Andrea Arcangeli + Cc: Naoya Horiguchi + Cc: David Rientjes + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:36:01.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:40:52.000000000 +0000 +@@ -2699,6 +2699,7 @@ + + mmun_start = haddr; + mmun_end = haddr + HPAGE_PMD_SIZE; ++again: + mmu_notifier_invalidate_range_start(mm, mmun_start, mmun_end); + spin_lock(&mm->page_table_lock); + if (unlikely(!pmd_trans_huge(*pmd))) { +@@ -2721,7 +2722,14 @@ + split_huge_page(page); + + put_page(page); +- BUG_ON(pmd_trans_huge(*pmd)); ++ ++ /* ++ * We don't always have down_write of mmap_sem here: a racing ++ * do_huge_pmd_wp_page() might have copied-on-write to another ++ * huge page before our split_huge_page() got the anon_vma lock. ++ */ ++ if (unlikely(pmd_trans_huge(*pmd))) ++ goto again; + } + + void split_huge_page_pmd_mm(struct mm_struct *mm, unsigned long address, +Index: linux-3.10-3.10.11/dummy/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1486_7ed008638ee15991b79d8867d382e141fee89a69.txt 2014-04-28 00:40:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.patch --- linux-3.10.11/debian/patches/rpi/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.patch 2014-04-28 00:40:53.000000000 +0000 @@ -0,0 +1,43 @@ +commit 1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91 +Author: Takashi Iwai +Date: Mon Oct 14 16:02:15 2013 +0200 + + ALSA: us122l: Fix pcm_usb_stream mmapping regression + + commit ac536a848a1643e4b87e8fbd376a63091afc2ccc upstream. + + The pcm_usb_stream plugin requires the mremap explicitly for the read + buffer, as it expands itself once after reading the required size. + But the commit [314e51b9: mm: kill vma flag VM_RESERVED and + mm->reserved_vm counter] converted blindly to a combination of + VM_DONTEXPAND | VM_DONTDUMP like other normal drivers, and this + resulted in the failure of mremap(). + + For fixing this regression, we need to remove VM_DONTEXPAND for the + read-buffer mmap. + + Reported-and-tested-by: James Miller + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/usb/usx2y/us122l.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/usb/usx2y/us122l.c 2014-04-27 23:37:50.000000000 +0000 ++++ linux-3.10-3.10.11/sound/usb/usx2y/us122l.c 2014-04-28 00:40:53.000000000 +0000 +@@ -262,7 +262,9 @@ + } + + area->vm_ops = &usb_stream_hwdep_vm_ops; +- area->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; ++ area->vm_flags |= VM_DONTDUMP; ++ if (!read) ++ area->vm_flags |= VM_DONTEXPAND; + area->vm_private_data = us122l; + atomic_inc(&us122l->mmap_count); + out: +Index: linux-3.10-3.10.11/dummy/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1487_1f931f65de9d04daf024eeb4dd6a8fe93b7a8e91.txt 2014-04-28 00:40:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.patch --- linux-3.10.11/debian/patches/rpi/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.patch 2014-04-28 00:40:54.000000000 +0000 @@ -0,0 +1,45 @@ +commit 1c4bd2b14d14f524c51839c64aa3f79a81622562 +Author: David Henningsson +Date: Mon Oct 14 10:16:22 2013 +0200 + + ALSA: hda - Fix inverted internal mic not indicated on some machines + + commit ccb041571b73888785ef7828a276e380125891a4 upstream. + + The create_bind_cap_vol_ctl does not create any control indicating + that an inverted dmic is present. Therefore, create multiple + capture volumes in this scenario, so we always have some indication + that the internal mic is inverted. + + This happens on the Lenovo Ideapad U310 as well as the Lenovo Yoga 13 + (both are based on the CX20590 codec), but the fix is generic and + could be needed for other codecs/machines too. + + Thanks to Szymon AcedaÅ„ski for the pointer and a draft patch. + + BugLink: https://bugs.launchpad.net/bugs/1239392 + BugLink: https://bugs.launchpad.net/bugs/1227491 + Reported-by: Szymon AcedaÅ„ski + Signed-off-by: David Henningsson + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/hda_generic.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/hda_generic.c 2014-04-27 23:37:50.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/hda_generic.c 2014-04-28 00:40:53.000000000 +0000 +@@ -3474,7 +3474,7 @@ + if (!multi) + err = create_single_cap_vol_ctl(codec, n, vol, sw, + inv_dmic); +- else if (!multi_cap_vol) ++ else if (!multi_cap_vol && !inv_dmic) + err = create_bind_cap_vol_ctl(codec, n, vol, sw); + else + err = create_multi_cap_vol_ctl(codec); +Index: linux-3.10-3.10.11/dummy/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1488_1c4bd2b14d14f524c51839c64aa3f79a81622562.txt 2014-04-28 00:40:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.patch 2014-04-28 00:40:55.000000000 +0000 @@ -0,0 +1,96 @@ +commit 71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa +Author: Fengguang Wu +Date: Wed Oct 16 13:47:03 2013 -0700 + + writeback: fix negative bdi max pause + + commit e3b6c655b91e01a1dade056cfa358581b47a5351 upstream. + + Toralf runs trinity on UML/i386. After some time it hangs and the last + message line is + + BUG: soft lockup - CPU#0 stuck for 22s! [trinity-child0:1521] + + It's found that pages_dirtied becomes very large. More than 1000000000 + pages in this case: + + period = HZ * pages_dirtied / task_ratelimit; + BUG_ON(pages_dirtied > 2000000000); + BUG_ON(pages_dirtied > 1000000000); <--------- + + UML debug printf shows that we got negative pause here: + + ick: pause : -984 + ick: pages_dirtied : 0 + ick: task_ratelimit: 0 + + pause: + + if (pause < 0) { + + extern int printf(char *, ...); + + printf("ick : pause : %li\n", pause); + + printf("ick: pages_dirtied : %lu\n", pages_dirtied); + + printf("ick: task_ratelimit: %lu\n", task_ratelimit); + + BUG_ON(1); + + } + trace_balance_dirty_pages(bdi, + + Since pause is bounded by [min_pause, max_pause] where min_pause is also + bounded by max_pause. It's suspected and demonstrated that the + max_pause calculation goes wrong: + + ick: pause : -717 + ick: min_pause : -177 + ick: max_pause : -717 + ick: pages_dirtied : 14 + ick: task_ratelimit: 0 + + The problem lies in the two "long = unsigned long" assignments in + bdi_max_pause() which might go negative if the highest bit is 1, and the + min_t(long, ...) check failed to protect it falling under 0. Fix all of + them by using "unsigned long" throughout the function. + + Signed-off-by: Fengguang Wu + Reported-by: Toralf Förster + Tested-by: Toralf Förster + Reviewed-by: Jan Kara + Cc: Richard Weinberger + Cc: Geert Uytterhoeven + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/page-writeback.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/page-writeback.c 2014-04-27 23:37:50.000000000 +0000 ++++ linux-3.10-3.10.11/mm/page-writeback.c 2014-04-28 00:40:54.000000000 +0000 +@@ -1104,11 +1104,11 @@ + return 1; + } + +-static long bdi_max_pause(struct backing_dev_info *bdi, +- unsigned long bdi_dirty) ++static unsigned long bdi_max_pause(struct backing_dev_info *bdi, ++ unsigned long bdi_dirty) + { +- long bw = bdi->avg_write_bandwidth; +- long t; ++ unsigned long bw = bdi->avg_write_bandwidth; ++ unsigned long t; + + /* + * Limit pause time for small memory systems. If sleeping for too long +@@ -1120,7 +1120,7 @@ + t = bdi_dirty / (1 + bw / roundup_pow_of_two(1 + HZ / 8)); + t++; + +- return min_t(long, t, MAX_PAUSE); ++ return min_t(unsigned long, t, MAX_PAUSE); + } + + static long bdi_min_pause(struct backing_dev_info *bdi, +Index: linux-3.10-3.10.11/dummy/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1489_71c908a0e5c0bbc2e8ad5f9578b9529a1e6ec8aa.txt 2014-04-28 00:40:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.patch 2014-04-28 00:40:55.000000000 +0000 @@ -0,0 +1,57 @@ +commit add8ec07b2a000af11be64a89b99afc8c90797e5 +Author: Johannes Berg +Date: Fri Oct 11 14:47:05 2013 +0200 + + wireless: radiotap: fix parsing buffer overrun + + commit f5563318ff1bde15b10e736e97ffce13be08bc1a upstream. + + When parsing an invalid radiotap header, the parser can overrun + the buffer that is passed in because it doesn't correctly check + 1) the minimum radiotap header size + 2) the space for extended bitmaps + + The first issue doesn't affect any in-kernel user as they all + check the minimum size before calling the radiotap function. + The second issue could potentially affect the kernel if an skb + is passed in that consists only of the radiotap header with a + lot of extended bitmaps that extend past the SKB. In that case + a read-only buffer overrun by at most 4 bytes is possible. + + Fix this by adding the appropriate checks to the parser. + + Reported-by: Evan Huus + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/wireless/radiotap.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/wireless/radiotap.c 2014-04-27 23:37:49.000000000 +0000 ++++ linux-3.10-3.10.11/net/wireless/radiotap.c 2014-04-28 00:40:55.000000000 +0000 +@@ -97,6 +97,10 @@ + struct ieee80211_radiotap_header *radiotap_header, + int max_length, const struct ieee80211_radiotap_vendor_namespaces *vns) + { ++ /* check the radiotap header can actually be present */ ++ if (max_length < sizeof(struct ieee80211_radiotap_header)) ++ return -EINVAL; ++ + /* Linux only supports version 0 radiotap format */ + if (radiotap_header->it_version) + return -EINVAL; +@@ -131,7 +135,8 @@ + */ + + if ((unsigned long)iterator->_arg - +- (unsigned long)iterator->_rtheader > ++ (unsigned long)iterator->_rtheader + ++ sizeof(uint32_t) > + (unsigned long)iterator->_max_length) + return -EINVAL; + } +Index: linux-3.10-3.10.11/dummy/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1490_add8ec07b2a000af11be64a89b99afc8c90797e5.txt 2014-04-28 00:40:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.patch 2014-04-28 00:40:56.000000000 +0000 @@ -0,0 +1,45 @@ +commit bfddde1b4056f5b7d0d365606000df3442b82cd0 +Author: Roel Kluin +Date: Mon Oct 14 23:21:15 2013 +0200 + + serial: vt8500: add missing braces + + commit d969de8d83401683420638c8107dcfedb2146f37 upstream. + + Due to missing braces on an if statement, in presence of a device_node a + port was always assigned -1, regardless of any alias entries in the + device tree. Conversely, if device_node was NULL, an unitialized port + ended up being used. + + This patch adds the missing braces, fixing the issues. + + Signed-off-by: Roel Kluin + Acked-by: Tony Prisk + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/tty/serial/vt8500_serial.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/vt8500_serial.c 2014-04-27 23:37:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/vt8500_serial.c 2014-04-28 00:40:56.000000000 +0000 +@@ -559,12 +559,13 @@ + if (!mmres || !irqres) + return -ENODEV; + +- if (np) ++ if (np) { + port = of_alias_get_id(np, "serial"); + if (port >= VT8500_MAX_PORTS) + port = -1; +- else ++ } else { + port = -1; ++ } + + if (port < 0) { + /* calculate the port id */ +Index: linux-3.10-3.10.11/dummy/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1491_bfddde1b4056f5b7d0d365606000df3442b82cd0.txt 2014-04-28 00:40:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.patch 2014-04-28 00:40:57.000000000 +0000 @@ -0,0 +1,32 @@ +commit e81e74f12005c5303cc26558b1b5c4294a0be4e0 +Author: Diego Elio Pettenò +Date: Tue Oct 8 20:03:37 2013 +0100 + + USB: serial: ti_usb_3410_5052: add Abbott strip port ID to combined table as well. + + commit c9d09dc7ad106492c17c587b6eeb99fe3f43e522 upstream. + + Without this change, the USB cable for Freestyle Option and compatible + glucometers will not be detected by the driver. + + Signed-off-by: Diego Elio Pettenò + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/ti_usb_3410_5052.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/ti_usb_3410_5052.c 2014-04-28 00:32:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/ti_usb_3410_5052.c 2014-04-28 00:40:56.000000000 +0000 +@@ -203,6 +203,7 @@ + { USB_DEVICE(IBM_VENDOR_ID, IBM_454B_PRODUCT_ID) }, + { USB_DEVICE(IBM_VENDOR_ID, IBM_454C_PRODUCT_ID) }, + { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_PRODUCT_ID) }, ++ { USB_DEVICE(ABBOTT_VENDOR_ID, ABBOTT_STRIP_PORT_ID) }, + { USB_DEVICE(TI_VENDOR_ID, FRI2_PRODUCT_ID) }, + { } + }; +Index: linux-3.10-3.10.11/dummy/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1492_e81e74f12005c5303cc26558b1b5c4294a0be4e0.txt 2014-04-28 00:40:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.patch --- linux-3.10.11/debian/patches/rpi/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.patch 2014-04-28 00:40:58.000000000 +0000 @@ -0,0 +1,43 @@ +commit 961e551e0f2e2acf2adc7465544ef25c5852a0ac +Author: Greg Kroah-Hartman +Date: Sat Oct 5 18:14:18 2013 -0700 + + USB: serial: option: add support for Inovia SEW858 device + + commit f4c19b8e165cff1a6607c21f8809441d61cab7ec upstream. + + This patch adds the device id for the Inovia SEW858 device to the option driver. + + Reported-by: Pavel Parkhomenko + Tested-by: Pavel Parkhomenko + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/option.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/option.c 2014-04-28 00:38:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/option.c 2014-04-28 00:40:57.000000000 +0000 +@@ -451,6 +451,10 @@ + #define CHANGHONG_VENDOR_ID 0x2077 + #define CHANGHONG_PRODUCT_CH690 0x7001 + ++/* Inovia */ ++#define INOVIA_VENDOR_ID 0x20a6 ++#define INOVIA_SEW858 0x1105 ++ + /* some devices interfaces need special handling due to a number of reasons */ + enum option_blacklist_reason { + OPTION_BLACKLIST_NONE = 0, +@@ -1345,6 +1349,7 @@ + { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x7d03, 0xff, 0x00, 0x00) }, + { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e01, 0xff, 0xff, 0xff) }, /* D-Link DWM-152/C1 */ + { USB_DEVICE_AND_INTERFACE_INFO(0x07d1, 0x3e02, 0xff, 0xff, 0xff) }, /* D-Link DWM-156/C1 */ ++ { USB_DEVICE(INOVIA_VENDOR_ID, INOVIA_SEW858) }, + { } /* Terminating entry */ + }; + MODULE_DEVICE_TABLE(usb, option_ids); +Index: linux-3.10-3.10.11/dummy/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1493_961e551e0f2e2acf2adc7465544ef25c5852a0ac.txt 2014-04-28 00:40:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.patch 2014-04-28 00:40:59.000000000 +0000 @@ -0,0 +1,37 @@ +commit adc6b15872611b75ae523d6784074d2ed84b1c4e +Author: Enrico Mioso +Date: Tue Oct 15 15:06:47 2013 +0200 + + usb: serial: option: blacklist Olivetti Olicard200 + + commit fd8573f5828873343903215f203f14dc82de397c upstream. + + Interface 6 of this device speaks QMI as per tests done by us. + Credits go to Antonella for providing the hardware. + + Signed-off-by: Enrico Mioso + Signed-off-by: Antonella Pellizzari + Tested-by: Dan Williams + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/option.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/option.c 2014-04-28 00:40:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/option.c 2014-04-28 00:40:58.000000000 +0000 +@@ -1261,7 +1261,9 @@ + + { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) }, + { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD145) }, +- { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200) }, ++ { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD200), ++ .driver_info = (kernel_ulong_t)&net_intf6_blacklist ++ }, + { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ + { USB_DEVICE_AND_INTERFACE_INFO(SAMSUNG_VENDOR_ID, SAMSUNG_PRODUCT_GT_B3730, USB_CLASS_CDC_DATA, 0x00, 0x00) }, /* Samsung GT-B3730 LTE USB modem.*/ + { USB_DEVICE(YUGA_VENDOR_ID, YUGA_PRODUCT_CEM600) }, +Index: linux-3.10-3.10.11/dummy/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1494_adc6b15872611b75ae523d6784074d2ed84b1c4e.txt 2014-04-28 00:40:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.patch --- linux-3.10.11/debian/patches/rpi/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.patch 2014-04-28 00:40:59.000000000 +0000 @@ -0,0 +1,24 @@ +commit 4e77f7f1261f65cff06918bc5e66d02a418fc842 +Author: Greg Kroah-Hartman +Date: Mon Nov 4 04:31:29 2013 -0800 + + Linux 3.10.18 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:40:14.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:40:59.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 17 ++SUBLEVEL = 18 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1495_4e77f7f1261f65cff06918bc5e66d02a418fc842.txt 2014-04-28 00:40:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.patch 2014-04-28 00:41:00.000000000 +0000 @@ -0,0 +1,74 @@ +commit b910ef250be4f872e383c62d1dfc40641b6f1c5b +Author: Oliver Neukum +Date: Mon Oct 14 15:24:55 2013 +0200 + + usb-storage: add quirk for mandatory READ_CAPACITY_16 + + commit 32c37fc30c52508711ea6a108cfd5855b8a07176 upstream. + + Some USB drive enclosures do not correctly report an + overflow condition if they hold a drive with a capacity + over 2TB and are confronted with a READ_CAPACITY_10. + They answer with their capacity modulo 2TB. + The generic layer cannot cope with that. It must be told + to use READ_CAPACITY_16 from the beginning. + + Signed-off-by: Oliver Neukum + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/storage/scsiglue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/storage/scsiglue.c 2014-04-27 23:37:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/storage/scsiglue.c 2014-04-28 00:41:00.000000000 +0000 +@@ -211,8 +211,11 @@ + /* + * Many devices do not respond properly to READ_CAPACITY_16. + * Tell the SCSI layer to try READ_CAPACITY_10 first. ++ * However some USB 3.0 drive enclosures return capacity ++ * modulo 2TB. Those must use READ_CAPACITY_16 + */ +- sdev->try_rc_10_first = 1; ++ if (!(us->fflags & US_FL_NEEDS_CAP16)) ++ sdev->try_rc_10_first = 1; + + /* assume SPC3 or latter devices support sense size > 18 */ + if (sdev->scsi_level > SCSI_SPC_2) +Index: linux-3.10-3.10.11/drivers/usb/storage/unusual_devs.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/storage/unusual_devs.h 2014-04-27 23:37:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/storage/unusual_devs.h 2014-04-28 00:41:00.000000000 +0000 +@@ -1925,6 +1925,13 @@ + USB_SC_DEVICE, USB_PR_DEVICE, NULL, + US_FL_IGNORE_RESIDUE ), + ++/* Reported by Oliver Neukum */ ++UNUSUAL_DEV( 0x174c, 0x55aa, 0x0100, 0x0100, ++ "ASMedia", ++ "AS2105", ++ USB_SC_DEVICE, USB_PR_DEVICE, NULL, ++ US_FL_NEEDS_CAP16), ++ + /* Reported by Jesse Feddema */ + UNUSUAL_DEV( 0x177f, 0x0400, 0x0000, 0x0000, + "Yarvik", +Index: linux-3.10-3.10.11/include/linux/usb_usual.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/usb_usual.h 2014-04-27 23:37:47.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/usb_usual.h 2014-04-28 00:41:00.000000000 +0000 +@@ -66,7 +66,9 @@ + US_FLAG(INITIAL_READ10, 0x00100000) \ + /* Initial READ(10) (and others) must be retried */ \ + US_FLAG(WRITE_CACHE, 0x00200000) \ +- /* Write Cache status is not available */ ++ /* Write Cache status is not available */ \ ++ US_FLAG(NEEDS_CAP16, 0x00400000) ++ /* cannot handle READ_CAPACITY_10 */ + + #define US_FLAG(name, value) US_FL_##name = value , + enum { US_DO_ALL_FLAGS }; +Index: linux-3.10-3.10.11/dummy/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1496_b910ef250be4f872e383c62d1dfc40641b6f1c5b.txt 2014-04-28 00:41:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.patch --- linux-3.10.11/debian/patches/rpi/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.patch 2014-04-28 00:41:01.000000000 +0000 @@ -0,0 +1,247 @@ +commit 75094c77c2e413cf85ca797f9f352ecc4c3533ad +Author: Fangxiaozhi (Franko) +Date: Fri Oct 11 03:48:21 2013 +0000 + + USB: support new huawei devices in option.c + + commit d544db293a44a2a3b09feab7dbd59668b692de71 upstream. + + Add new supporting declarations to option.c, to support Huawei new + devices with new bInterfaceSubClass value. + + Signed-off-by: fangxiaozhi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/option.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/option.c 2014-04-28 00:40:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/option.c 2014-04-28 00:41:01.000000000 +0000 +@@ -693,6 +693,222 @@ + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7A) }, + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7B) }, + { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x02, 0x7C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x01) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x02) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x03) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x04) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x05) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x06) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x0F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x10) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x12) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x13) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x14) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x15) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x17) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x18) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x19) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x1C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x31) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x32) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x33) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x34) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x35) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x36) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x3F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x48) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x49) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x4C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x61) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x62) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x63) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x64) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x65) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x66) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x6F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x78) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x79) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x03, 0x7C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x01) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x02) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x03) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x04) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x05) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x06) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x0F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x10) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x12) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x13) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x14) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x15) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x17) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x18) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x19) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x1C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x31) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x32) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x33) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x34) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x35) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x36) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x3F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x48) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x49) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x4C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x61) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x62) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x63) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x64) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x65) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x66) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x6F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x78) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x79) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x04, 0x7C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x01) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x02) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x03) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x04) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x05) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x06) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x0F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x10) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x12) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x13) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x14) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x15) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x17) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x18) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x19) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x1C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x31) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x32) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x33) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x34) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x35) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x36) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x3F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x48) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x49) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x4C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x61) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x62) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x63) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x64) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x65) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x66) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x6F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x78) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x79) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x05, 0x7C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x01) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x02) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x03) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x04) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x05) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x06) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x0F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x10) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x12) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x13) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x14) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x15) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x17) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x18) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x19) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x1C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x31) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x32) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x33) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x34) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x35) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x36) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x3F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x48) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x49) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x4C) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x61) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x62) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x63) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x64) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x65) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x66) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6D) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6E) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x6F) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x78) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x79) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7A) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7B) }, ++ { USB_VENDOR_AND_INTERFACE_INFO(HUAWEI_VENDOR_ID, 0xff, 0x06, 0x7C) }, + + + { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_V640) }, +Index: linux-3.10-3.10.11/dummy/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1497_75094c77c2e413cf85ca797f9f352ecc4c3533ad.txt 2014-04-28 00:41:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.patch 2014-04-28 00:41:02.000000000 +0000 @@ -0,0 +1,33 @@ +commit ac1acaf7b6cb48562f6466e4f793d0f24a5726d8 +Author: Oliver Neukum +Date: Mon Oct 14 16:22:40 2013 +0200 + + USB: quirks.c: add one device that cannot deal with suspension + + commit 4294bca7b423d1a5aa24307e3d112a04075e3763 upstream. + + The device is not responsive when resumed, unless it is reset. + + Signed-off-by: Oliver Neukum + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/quirks.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/quirks.c 2014-04-27 23:37:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/quirks.c 2014-04-28 00:41:01.000000000 +0000 +@@ -130,6 +130,9 @@ + /* Broadcom BCM92035DGROM BT dongle */ + { USB_DEVICE(0x0a5c, 0x2021), .driver_info = USB_QUIRK_RESET_RESUME }, + ++ /* MAYA44USB sound device */ ++ { USB_DEVICE(0x0a92, 0x0091), .driver_info = USB_QUIRK_RESET_RESUME }, ++ + /* Action Semiconductor flash disk */ + { USB_DEVICE(0x10d6, 0x2200), .driver_info = + USB_QUIRK_STRING_FETCH_255 }, +Index: linux-3.10-3.10.11/dummy/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1498_ac1acaf7b6cb48562f6466e4f793d0f24a5726d8.txt 2014-04-28 00:41:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.patch --- linux-3.10.11/debian/patches/rpi/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.patch 2014-04-28 00:41:02.000000000 +0000 @@ -0,0 +1,33 @@ +commit 59fa93ea76e2de29910bab0a49dbb14f56b79aea +Author: Oliver Neukum +Date: Wed Oct 16 12:26:07 2013 +0200 + + USB: quirks: add touchscreen that is dazzeled by remote wakeup + + commit 614ced91fc6fbb5a1cdd12f0f1b6c9197d9f1350 upstream. + + The device descriptors are messed up after remote wakeup + + Signed-off-by: Oliver Neukum + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/core/quirks.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/quirks.c 2014-04-28 00:41:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/quirks.c 2014-04-28 00:41:02.000000000 +0000 +@@ -97,6 +97,9 @@ + /* Alcor Micro Corp. Hub */ + { USB_DEVICE(0x058f, 0x9254), .driver_info = USB_QUIRK_RESET_RESUME }, + ++ /* MicroTouch Systems touchscreen */ ++ { USB_DEVICE(0x0596, 0x051e), .driver_info = USB_QUIRK_RESET_RESUME }, ++ + /* appletouch */ + { USB_DEVICE(0x05ac, 0x021a), .driver_info = USB_QUIRK_RESET_RESUME }, + +Index: linux-3.10-3.10.11/dummy/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1499_59fa93ea76e2de29910bab0a49dbb14f56b79aea.txt 2014-04-28 00:41:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.patch 2014-04-28 00:41:03.000000000 +0000 @@ -0,0 +1,45 @@ +commit a73e47ff525d2a69d61767a5928ba00937f77e1b +Author: ÐлекÑей Крамаренко +Date: Fri Nov 1 17:26:38 2013 +0400 + + USB: serial: ftdi_sio: add id for Z3X Box device + + commit e1466ad5b1aeda303f9282463d55798d2eda218c upstream. + + Custom VID/PID for Z3X Box device, popular tool for cellphone flashing. + + Signed-off-by: Alexey E. Kramarenko + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/usb/serial/ftdi_sio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/ftdi_sio.c 2014-04-27 23:37:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/ftdi_sio.c 2014-04-28 00:41:03.000000000 +0000 +@@ -906,6 +906,7 @@ + { USB_DEVICE(FTDI_VID, FTDI_LUMEL_PD12_PID) }, + /* Crucible Devices */ + { USB_DEVICE(FTDI_VID, FTDI_CT_COMET_PID) }, ++ { USB_DEVICE(FTDI_VID, FTDI_Z3X_PID) }, + { }, /* Optional parameter entry */ + { } /* Terminating entry */ + }; +Index: linux-3.10-3.10.11/drivers/usb/serial/ftdi_sio_ids.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/serial/ftdi_sio_ids.h 2014-04-27 23:37:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/serial/ftdi_sio_ids.h 2014-04-28 00:41:03.000000000 +0000 +@@ -1307,3 +1307,9 @@ + * Manufacturer: Crucible Technologies + */ + #define FTDI_CT_COMET_PID 0x8e08 ++ ++/* ++ * Product: Z3X Box ++ * Manufacturer: Smart GSM Team ++ */ ++#define FTDI_Z3X_PID 0x0011 +Index: linux-3.10-3.10.11/dummy/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1500_a73e47ff525d2a69d61767a5928ba00937f77e1b.txt 2014-04-28 00:41:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.patch --- linux-3.10.11/debian/patches/rpi/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.patch 2014-04-28 00:41:04.000000000 +0000 @@ -0,0 +1,35 @@ +commit 40f3a9e5aea1753ececbcbbfe483b0c05788b001 +Author: Russ Anderson +Date: Mon Oct 14 11:17:34 2013 -0500 + + x86: Update UV3 hub revision ID + + commit dd3c9c4b603c664fedc12facf180db0f1794aafe upstream. + + The UV3 hub revision ID is different than expected. The first + revision was supposed to start at 1 but instead will start at 0. + + Signed-off-by: Russ Anderson + Link: http://lkml.kernel.org/r/20131014161733.GA6274@sgi.com + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/x86/kernel/apic/x2apic_uv_x.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/x86/kernel/apic/x2apic_uv_x.c 2014-04-27 23:37:46.000000000 +0000 ++++ linux-3.10-3.10.11/arch/x86/kernel/apic/x2apic_uv_x.c 2014-04-28 00:41:04.000000000 +0000 +@@ -98,7 +98,7 @@ + break; + case UV3_HUB_PART_NUMBER: + case UV3_HUB_PART_NUMBER_X: +- uv_min_hub_revision_id += UV3_HUB_REVISION_BASE - 1; ++ uv_min_hub_revision_id += UV3_HUB_REVISION_BASE; + break; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1501_40f3a9e5aea1753ececbcbbfe483b0c05788b001.txt 2014-04-28 00:41:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.patch --- linux-3.10.11/debian/patches/rpi/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.patch 2014-04-28 00:41:05.000000000 +0000 @@ -0,0 +1,50 @@ +commit f606b358df6e174cd57f0509e5f5299bd4a73854 +Author: Dirk Brandewie +Date: Tue Oct 15 11:06:14 2013 -0700 + + cpufreq / intel_pstate: Fix max_perf_pct on resume + + commit 52e0a509e5d6f902ec26bc2a8bb02b137dc453be upstream. + + If the system is suspended while max_perf_pct is less than 100 percent + or no_turbo set policy->{min,max} will be set incorrectly with scaled + values which turn the scaled values into hard limits. + + References: https://bugzilla.kernel.org/show_bug.cgi?id=61241 + Reported-by: Patrick Bartels + Signed-off-by: Dirk Brandewie + Signed-off-by: Rafael J. Wysocki + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/cpufreq/intel_pstate.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpufreq/intel_pstate.c 2014-04-27 23:37:45.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpufreq/intel_pstate.c 2014-04-28 00:41:04.000000000 +0000 +@@ -629,8 +629,8 @@ + + static int __cpuinit intel_pstate_cpu_init(struct cpufreq_policy *policy) + { +- int rc, min_pstate, max_pstate; + struct cpudata *cpu; ++ int rc; + + rc = intel_pstate_init_cpu(policy->cpu); + if (rc) +@@ -644,9 +644,8 @@ + else + policy->policy = CPUFREQ_POLICY_POWERSAVE; + +- intel_pstate_get_min_max(cpu, &min_pstate, &max_pstate); +- policy->min = min_pstate * 100000; +- policy->max = max_pstate * 100000; ++ policy->min = cpu->pstate.min_pstate * 100000; ++ policy->max = cpu->pstate.turbo_pstate * 100000; + + /* cpuinfo and default policy values */ + policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000; +Index: linux-3.10-3.10.11/dummy/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1502_f606b358df6e174cd57f0509e5f5299bd4a73854.txt 2014-04-28 00:41:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.patch 2014-04-28 00:41:06.000000000 +0000 @@ -0,0 +1,31 @@ +commit 955a23e181561a792d6e4c1572848b7ba306499f +Author: Kent Overstreet +Date: Tue Oct 22 15:35:50 2013 -0700 + + bcache: Fixed incorrect order of arguments to bio_alloc_bioset() + + commit d4eddd42f592a0cf06818fae694a3d271f842e4d upstream. + + Signed-off-by: Kent Overstreet + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/bcache/request.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/bcache/request.c 2014-04-28 00:39:16.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/bcache/request.c 2014-04-28 00:41:05.000000000 +0000 +@@ -1059,7 +1059,7 @@ + + if (bio->bi_rw & REQ_FLUSH) { + /* Also need to send a flush to the backing device */ +- struct bio *flush = bio_alloc_bioset(0, GFP_NOIO, ++ struct bio *flush = bio_alloc_bioset(GFP_NOIO, 0, + dc->disk.bio_split); + + flush->bi_rw = WRITE_FLUSH; +Index: linux-3.10-3.10.11/dummy/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1503_955a23e181561a792d6e4c1572848b7ba306499f.txt 2014-04-28 00:41:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.patch --- linux-3.10.11/debian/patches/rpi/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.patch 2014-04-28 00:41:07.000000000 +0000 @@ -0,0 +1,79 @@ +commit 5be794dc4bb66266acc91eb589ace48e82a6c77e +Author: Anjana V Kumar +Date: Sat Oct 12 10:59:17 2013 +0800 + + cgroup: fix to break the while loop in cgroup_attach_task() correctly + + commit ea84753c98a7ac6b74e530b64c444a912b3835ca upstream. + + Both Anjana and Eunki reported a stall in the while_each_thread loop + in cgroup_attach_task(). + + It's because, when we attach a single thread to a cgroup, if the cgroup + is exiting or is already in that cgroup, we won't break the loop. + + If the task is already in the cgroup, the bug can lead to another thread + being attached to the cgroup unexpectedly: + + # echo 5207 > tasks + # cat tasks + 5207 + # echo 5207 > tasks + # cat tasks + 5207 + 5215 + + What's worse, if the task to be attached isn't the leader of the thread + group, we might never exit the loop, hence cpu stall. Thanks for Oleg's + analysis. + + This bug was introduced by commit 081aa458c38ba576bdd4265fc807fa95b48b9e79 + ("cgroup: consolidate cgroup_attach_task() and cgroup_attach_proc()") + + [ lizf: - fixed the first continue, pointed out by Oleg, + - rewrote changelog. ] + + Reported-by: Eunki Kim + Reported-by: Anjana V Kumar + Signed-off-by: Anjana V Kumar + Signed-off-by: Li Zefan + Signed-off-by: Tejun Heo + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/cgroup.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/cgroup.c 2014-04-27 23:37:45.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/cgroup.c 2014-04-28 00:41:06.000000000 +0000 +@@ -1995,7 +1995,7 @@ + + /* @tsk either already exited or can't exit until the end */ + if (tsk->flags & PF_EXITING) +- continue; ++ goto next; + + /* as per above, nr_threads may decrease, but not increase. */ + BUG_ON(i >= group_size); +@@ -2003,7 +2003,7 @@ + ent.cgrp = task_cgroup_from_root(tsk, root); + /* nothing to do if this task is already in the cgroup */ + if (ent.cgrp == cgrp) +- continue; ++ goto next; + /* + * saying GFP_ATOMIC has no effect here because we did prealloc + * earlier, but it's good form to communicate our expectations. +@@ -2011,7 +2011,7 @@ + retval = flex_array_put(group, i, &ent, GFP_ATOMIC); + BUG_ON(retval != 0); + i++; +- ++ next: + if (!threadgroup) + break; + } while_each_thread(leader, tsk); +Index: linux-3.10-3.10.11/dummy/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1504_5be794dc4bb66266acc91eb589ace48e82a6c77e.txt 2014-04-28 00:41:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.patch 2014-04-28 00:41:08.000000000 +0000 @@ -0,0 +1,92 @@ +commit 715a606d73f63e94259e6251565e6e12e3271d0f +Author: Emmanuel Grumbach +Date: Mon Sep 16 11:12:07 2013 +0300 + + mac80211: correctly close cancelled scans + + commit a754055a1296fcbe6f32de3a5eaca6efb2fd1865 upstream. + + __ieee80211_scan_completed is called from a worker. This + means that the following flow is possible. + + * driver calls ieee80211_scan_completed + * mac80211 cancels the scan (that is already complete) + * __ieee80211_scan_completed runs + + When scan_work will finally run, it will see that the scan + hasn't been aborted and might even trigger another scan on + another band. This leads to a situation where cfg80211's + scan is not done and no further scan can be issued. + + Fix this by setting a new flag when a HW scan is being + cancelled so that no other scan will be triggered. + + Signed-off-by: Emmanuel Grumbach + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/mac80211/ieee80211_i.h +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/ieee80211_i.h 2014-04-27 23:37:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/ieee80211_i.h 2014-04-28 00:41:07.000000000 +0000 +@@ -842,6 +842,8 @@ + * that the scan completed. + * @SCAN_ABORTED: Set for our scan work function when the driver reported + * a scan complete for an aborted scan. ++ * @SCAN_HW_CANCELLED: Set for our scan work function when the scan is being ++ * cancelled. + */ + enum { + SCAN_SW_SCANNING, +@@ -849,6 +851,7 @@ + SCAN_ONCHANNEL_SCANNING, + SCAN_COMPLETED, + SCAN_ABORTED, ++ SCAN_HW_CANCELLED, + }; + + /** +Index: linux-3.10-3.10.11/net/mac80211/scan.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/scan.c 2014-04-27 23:37:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/scan.c 2014-04-28 00:41:07.000000000 +0000 +@@ -202,6 +202,9 @@ + enum ieee80211_band band; + int i, ielen, n_chans; + ++ if (test_bit(SCAN_HW_CANCELLED, &local->scanning)) ++ return false; ++ + do { + if (local->hw_scan_band == IEEE80211_NUM_BANDS) + return false; +@@ -878,7 +881,23 @@ + if (!local->scan_req) + goto out; + ++ /* ++ * We have a scan running and the driver already reported completion, ++ * but the worker hasn't run yet or is stuck on the mutex - mark it as ++ * cancelled. ++ */ ++ if (test_bit(SCAN_HW_SCANNING, &local->scanning) && ++ test_bit(SCAN_COMPLETED, &local->scanning)) { ++ set_bit(SCAN_HW_CANCELLED, &local->scanning); ++ goto out; ++ } ++ + if (test_bit(SCAN_HW_SCANNING, &local->scanning)) { ++ /* ++ * Make sure that __ieee80211_scan_completed doesn't trigger a ++ * scan on another band. ++ */ ++ set_bit(SCAN_HW_CANCELLED, &local->scanning); + if (local->ops->cancel_hw_scan) + drv_cancel_hw_scan(local, + rcu_dereference_protected(local->scan_sdata, +Index: linux-3.10-3.10.11/dummy/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1505_715a606d73f63e94259e6251565e6e12e3271d0f.txt 2014-04-28 00:41:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.patch 2014-04-28 00:41:08.000000000 +0000 @@ -0,0 +1,43 @@ +commit d7da0fc72d073181e65970edad0a9461542e02c6 +Author: Felix Fietkau +Date: Tue Sep 17 11:15:43 2013 +0200 + + mac80211: drop spoofed packets in ad-hoc mode + + commit 6329b8d917adc077caa60c2447385554130853a3 upstream. + + If an Ad-Hoc node receives packets with the Cell ID or its own MAC + address as source address, it hits a WARN_ON in sta_info_insert_check() + With many packets, this can massively spam the logs. One way that this + can easily happen is through having Cisco APs in the area with rouge AP + detection and countermeasures enabled. + Such Cisco APs will regularly send fake beacons, disassoc and deauth + packets that trigger these warnings. + + To fix this issue, drop such spoofed packets early in the rx path. + + Reported-by: Thomas Huehn + Signed-off-by: Felix Fietkau + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/mac80211/rx.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/rx.c 2014-04-27 23:37:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/rx.c 2014-04-28 00:41:08.000000000 +0000 +@@ -3002,6 +3002,9 @@ + case NL80211_IFTYPE_ADHOC: + if (!bssid) + return 0; ++ if (ether_addr_equal(sdata->vif.addr, hdr->addr2) || ++ ether_addr_equal(sdata->u.ibss.bssid, hdr->addr2)) ++ return 0; + if (ieee80211_is_beacon(hdr->frame_control)) { + return 1; + } else if (!ieee80211_bssid_match(bssid, sdata->u.ibss.bssid)) { +Index: linux-3.10-3.10.11/dummy/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1506_d7da0fc72d073181e65970edad0a9461542e02c6.txt 2014-04-28 00:41:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.patch 2014-04-28 00:41:09.000000000 +0000 @@ -0,0 +1,47 @@ +commit 8d4f150d4e8d52a761e424f9f640c57cd118105f +Author: Felix Fietkau +Date: Sun Sep 29 21:39:33 2013 +0200 + + mac80211: use sta_info_get_bss() for nl80211 tx and client probing + + commit 03bb7f42765ce596604f03d179f3137d7df05bba upstream. + + This allows calls for clients in AP_VLANs (e.g. for 4-addr) to succeed + + Signed-off-by: Felix Fietkau + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/mac80211/cfg.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/cfg.c 2014-04-27 23:37:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/cfg.c 2014-04-28 00:41:09.000000000 +0000 +@@ -3315,7 +3315,7 @@ + return -EINVAL; + } + band = chanctx_conf->def.chan->band; +- sta = sta_info_get(sdata, peer); ++ sta = sta_info_get_bss(sdata, peer); + if (sta) { + qos = test_sta_flag(sta, WLAN_STA_WME); + } else { +Index: linux-3.10-3.10.11/net/mac80211/tx.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/tx.c 2014-04-27 23:37:44.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/tx.c 2014-04-28 00:41:09.000000000 +0000 +@@ -1100,7 +1100,8 @@ + tx->sta = rcu_dereference(sdata->u.vlan.sta); + if (!tx->sta && sdata->dev->ieee80211_ptr->use_4addr) + return TX_DROP; +- } else if (info->flags & IEEE80211_TX_CTL_INJECTED || ++ } else if (info->flags & (IEEE80211_TX_CTL_INJECTED | ++ IEEE80211_TX_INTFL_NL80211_FRAME_TX) || + tx->sdata->control_port_protocol == tx->skb->protocol) { + tx->sta = sta_info_get_bss(sdata, hdr->addr1); + } +Index: linux-3.10-3.10.11/dummy/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1507_8d4f150d4e8d52a761e424f9f640c57cd118105f.txt 2014-04-28 00:41:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.patch 2014-04-28 00:41:10.000000000 +0000 @@ -0,0 +1,40 @@ +commit 31da12cec6d7882acb2bd968566b1cfbbcae695a +Author: Felix Fietkau +Date: Sun Sep 29 21:39:34 2013 +0200 + + mac80211: update sta->last_rx on acked tx frames + + commit 0c5b93290b2f3c7a376567c03ae8d385b0e99851 upstream. + + When clients are idle for too long, hostapd sends nullfunc frames for + probing. When those are acked by the client, the idle time needs to be + updated. + + To make this work (and to avoid unnecessary probing), update sta->last_rx + whenever an ACK was received for a tx packet. Only do this if the flag + IEEE80211_HW_REPORTS_TX_ACK_STATUS is set. + + Signed-off-by: Felix Fietkau + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/mac80211/status.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/status.c 2014-04-27 23:37:43.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/status.c 2014-04-28 00:41:10.000000000 +0000 +@@ -180,6 +180,9 @@ + struct ieee80211_local *local = sta->local; + struct ieee80211_sub_if_data *sdata = sta->sdata; + ++ if (local->hw.flags & IEEE80211_HW_REPORTS_TX_ACK_STATUS) ++ sta->last_rx = jiffies; ++ + if (ieee80211_is_data_qos(mgmt->frame_control)) { + struct ieee80211_hdr *hdr = (void *) skb->data; + u8 *qc = ieee80211_get_qos_ctl(hdr); +Index: linux-3.10-3.10.11/dummy/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1508_31da12cec6d7882acb2bd968566b1cfbbcae695a.txt 2014-04-28 00:41:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.patch 2014-04-28 00:41:11.000000000 +0000 @@ -0,0 +1,39 @@ +commit 0b1621f62382e9b6f97b35861e9ade1a979b95b8 +Author: Johannes Berg +Date: Fri Oct 11 15:47:06 2013 +0200 + + mac80211: fix crash if bitrate calculation goes wrong + + commit d86aa4f8ca58898ec6a94c0635da20b948171ed7 upstream. + + If a frame's timestamp is calculated, and the bitrate + calculation goes wrong and returns zero, the system + will attempt to divide by zero and crash. Catch this + case and print the rate information that the driver + reported when this happens. + + Reported-by: Thomas Lindroth + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/mac80211/util.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/mac80211/util.c 2014-04-27 23:37:43.000000000 +0000 ++++ linux-3.10-3.10.11/net/mac80211/util.c 2014-04-28 00:41:10.000000000 +0000 +@@ -2174,6 +2174,10 @@ + } + + rate = cfg80211_calculate_bitrate(&ri); ++ if (WARN_ONCE(!rate, ++ "Invalid bitrate: flags=0x%x, idx=%d, vht_nss=%d\n", ++ status->flag, status->rate_idx, status->vht_nss)) ++ return 0; + + /* rewind from end of MPDU */ + if (status->flag & RX_FLAG_MACTIME_END) +Index: linux-3.10-3.10.11/dummy/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1509_0b1621f62382e9b6f97b35861e9ade1a979b95b8.txt 2014-04-28 00:41:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.patch 2014-04-28 00:41:12.000000000 +0000 @@ -0,0 +1,72 @@ +commit fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2 +Author: Felix Fietkau +Date: Sat Oct 5 14:09:30 2013 +0200 + + ath9k: fix tx queue scheduling after channel changes + + commit ec30326ea773900da210c495e14cfeb532550ba2 upstream. + + Otherwise, if queues are full during a scan, tx scheduling does not + resume after switching back to the home channel. + + Signed-off-by: Felix Fietkau + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/main.c 2014-04-27 23:37:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/main.c 2014-04-28 00:41:11.000000000 +0000 +@@ -209,6 +209,7 @@ + struct ath_hw *ah = sc->sc_ah; + struct ath_common *common = ath9k_hw_common(ah); + unsigned long flags; ++ int i; + + if (ath_startrecv(sc) != 0) { + ath_err(common, "Unable to restart recv logic\n"); +@@ -236,6 +237,15 @@ + } + work: + ath_restart_work(sc); ++ ++ for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { ++ if (!ATH_TXQ_SETUP(sc, i)) ++ continue; ++ ++ spin_lock_bh(&sc->tx.txq[i].axq_lock); ++ ath_txq_schedule(sc, &sc->tx.txq[i]); ++ spin_unlock_bh(&sc->tx.txq[i].axq_lock); ++ } + } + + if ((ah->caps.hw_caps & ATH9K_HW_CAP_ANT_DIV_COMB) && sc->ant_rx != 3) +@@ -543,21 +553,10 @@ + + static int ath_reset(struct ath_softc *sc) + { +- int i, r; ++ int r; + + ath9k_ps_wakeup(sc); +- + r = ath_reset_internal(sc, NULL); +- +- for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { +- if (!ATH_TXQ_SETUP(sc, i)) +- continue; +- +- spin_lock_bh(&sc->tx.txq[i].axq_lock); +- ath_txq_schedule(sc, &sc->tx.txq[i]); +- spin_unlock_bh(&sc->tx.txq[i].axq_lock); +- } +- + ath9k_ps_restore(sc); + + return r; +Index: linux-3.10-3.10.11/dummy/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1510_fc756d89ff073a9c7fb8e4788fa63705d3d8f2a2.txt 2014-04-28 00:41:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.patch --- linux-3.10.11/debian/patches/rpi/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.patch 2014-04-28 00:41:12.000000000 +0000 @@ -0,0 +1,46 @@ +commit e83301f88258e3f204392cf59b0ffd706a051a26 +Author: Bruno Randolf +Date: Thu Sep 26 16:55:28 2013 +0100 + + cfg80211: fix warning when using WEXT for IBSS + + commit f478f33a93f9353dcd1fe55445343d76b1c3f84a upstream. + + Fix kernel warning when using WEXT for configuring ad-hoc mode, + e.g. "iwconfig wlan0 essid test channel 1" + + WARNING: at net/wireless/chan.c:373 cfg80211_chandef_usable+0x50/0x21c [cfg80211]() + + The warning is caused by an uninitialized variable center_freq1. + + Signed-off-by: Bruno Randolf + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/net/wireless/ibss.c +=================================================================== +--- linux-3.10-3.10.11.orig/net/wireless/ibss.c 2014-04-27 23:37:43.000000000 +0000 ++++ linux-3.10-3.10.11/net/wireless/ibss.c 2014-04-28 00:41:12.000000000 +0000 +@@ -269,6 +269,8 @@ + if (chan->flags & IEEE80211_CHAN_DISABLED) + continue; + wdev->wext.ibss.chandef.chan = chan; ++ wdev->wext.ibss.chandef.center_freq1 = ++ chan->center_freq; + break; + } + +@@ -353,6 +355,7 @@ + if (chan) { + wdev->wext.ibss.chandef.chan = chan; + wdev->wext.ibss.chandef.width = NL80211_CHAN_WIDTH_20_NOHT; ++ wdev->wext.ibss.chandef.center_freq1 = freq; + wdev->wext.ibss.channel_fixed = true; + } else { + /* cfg80211_ibss_wext_join will pick one if needed */ +Index: linux-3.10-3.10.11/dummy/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1511_e83301f88258e3f204392cf59b0ffd706a051a26.txt 2014-04-28 00:41:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.patch --- linux-3.10.11/debian/patches/rpi/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.patch 2014-04-28 00:41:13.000000000 +0000 @@ -0,0 +1,58 @@ +commit 6f2c0ed7835fd30d6c137198cf1dc964f061f132 +Author: Amitkumar Karwar +Date: Fri Sep 27 10:55:38 2013 -0700 + + mwifiex: fix SDIO interrupt lost issue + + commit 453b0c3f6910672f79da354077af728d92f95c5b upstream. + + 601216e "mwifiex: process RX packets in SDIO IRQ thread directly" + introduced a command timeout issue which can be reproduced easily on + an AM33xx platform using a test application written by Daniel Mack: + + https://gist.github.com/zonque/6579314 + + mwifiex_main_process() is called from both the SDIO handler and + the workqueue. In case an interrupt occurs right after the + int_status check, but before updating the mwifiex_processing flag, + this interrupt gets lost, resulting in a command timeout and + consequently a card reset. + + Let main_proc_lock protect both int_status and mwifiex_processing + flag. This fixes the interrupt lost issue. + + Reported-by: Sven Neumann + Reported-by: Andreas Fenkart + Tested-by: Daniel Mack + Reviewed-by: Dylan Reid + Signed-off-by: Amitkumar Karwar + Signed-off-by: Bing Zhao + Signed-off-by: Paul Stewart + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:37:46.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/mwifiex/main.c 2014-04-28 00:41:13.000000000 +0000 +@@ -270,10 +270,12 @@ + } + } while (true); + +- if ((adapter->int_status) || IS_CARD_RX_RCVD(adapter)) ++ spin_lock_irqsave(&adapter->main_proc_lock, flags); ++ if ((adapter->int_status) || IS_CARD_RX_RCVD(adapter)) { ++ spin_unlock_irqrestore(&adapter->main_proc_lock, flags); + goto process_start; ++ } + +- spin_lock_irqsave(&adapter->main_proc_lock, flags); + adapter->mwifiex_processing = false; + spin_unlock_irqrestore(&adapter->main_proc_lock, flags); + +Index: linux-3.10-3.10.11/dummy/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1512_6f2c0ed7835fd30d6c137198cf1dc964f061f132.txt 2014-04-28 00:41:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.patch --- linux-3.10.11/debian/patches/rpi/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.patch 2014-04-28 00:41:14.000000000 +0000 @@ -0,0 +1,37 @@ +commit 3af669ca9923d504d5476bcfe04eaf4bbde03515 +Author: Mark Cave-Ayland +Date: Tue Oct 8 10:18:20 2013 -0500 + + rtlwifi: rtl8192cu: Fix error in pointer arithmetic + + commit 9473ca6e920a3b9ca902753ce52833657f9221cc upstream. + + An error in calculating the offset in an skb causes the driver to read + essential device info from the wrong locations. The main effect is that + automatic gain calculations are nonsense. + + Signed-off-by: Mark Cave-Ayland + Signed-off-by: Larry Finger + Signed-off-by: John W. Linville + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c 2014-04-27 23:37:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtlwifi/rtl8192cu/trx.c 2014-04-28 00:41:13.000000000 +0000 +@@ -343,7 +343,8 @@ + (bool)GET_RX_DESC_PAGGR(pdesc)); + rx_status->mactime = GET_RX_DESC_TSFL(pdesc); + if (phystatus) { +- p_drvinfo = (struct rx_fwinfo_92c *)(pdesc + RTL_RX_DESC_SIZE); ++ p_drvinfo = (struct rx_fwinfo_92c *)(skb->data + ++ stats->rx_bufshift); + rtl92c_translate_rx_signal_stuff(hw, skb, stats, pdesc, + p_drvinfo); + } +Index: linux-3.10-3.10.11/dummy/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1513_3af669ca9923d504d5476bcfe04eaf4bbde03515.txt 2014-04-28 00:41:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.patch 2014-04-28 00:41:15.000000000 +0000 @@ -0,0 +1,99 @@ +commit fa2025dc177d9bef300b48289b689a5d667f5ae9 +Author: Emmanuel Grumbach +Date: Tue Sep 24 19:34:26 2013 +0300 + + iwlwifi: pcie: add SKUs for 6000, 6005 and 6235 series + + commit 08a5dd3842f2ac61c6d69661d2d96022df8ae359 upstream. + + Add some new PCI IDs to the table for 6000, 6005 and 6235 series. + + Signed-off-by: Emmanuel Grumbach + Signed-off-by: Johannes Berg + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-6000.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlwifi/iwl-6000.c 2014-04-28 00:32:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-6000.c 2014-04-28 00:41:14.000000000 +0000 +@@ -268,6 +268,12 @@ + .ht_params = &iwl6000_ht_params, + }; + ++const struct iwl_cfg iwl6035_2agn_sff_cfg = { ++ .name = "Intel(R) Centrino(R) Ultimate-N 6235 AGN", ++ IWL_DEVICE_6035, ++ .ht_params = &iwl6000_ht_params, ++}; ++ + const struct iwl_cfg iwl1030_bgn_cfg = { + .name = "Intel(R) Centrino(R) Wireless-N 1030 BGN", + IWL_DEVICE_6030, +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-config.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlwifi/iwl-config.h 2014-04-27 23:37:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/iwl-config.h 2014-04-28 00:41:14.000000000 +0000 +@@ -316,6 +316,7 @@ + extern const struct iwl_cfg iwl2000_2bgn_d_cfg; + extern const struct iwl_cfg iwl2030_2bgn_cfg; + extern const struct iwl_cfg iwl6035_2agn_cfg; ++extern const struct iwl_cfg iwl6035_2agn_sff_cfg; + extern const struct iwl_cfg iwl105_bgn_cfg; + extern const struct iwl_cfg iwl105_bgn_d_cfg; + extern const struct iwl_cfg iwl135_bgn_cfg; +Index: linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/pcie/drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/iwlwifi/pcie/drv.c 2014-04-27 23:37:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/iwlwifi/pcie/drv.c 2014-04-28 00:41:14.000000000 +0000 +@@ -138,13 +138,16 @@ + + /* 6x00 Series */ + {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)}, ++ {IWL_PCI_DEVICE(0x422B, 0x1108, iwl6000_3agn_cfg)}, + {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)}, ++ {IWL_PCI_DEVICE(0x422B, 0x1128, iwl6000_3agn_cfg)}, + {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)}, + {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)}, + {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)}, + {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)}, + {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)}, + {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)}, ++ {IWL_PCI_DEVICE(0x4238, 0x1118, iwl6000_3agn_cfg)}, + {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)}, + {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)}, + +@@ -152,12 +155,16 @@ + {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)}, ++ {IWL_PCI_DEVICE(0x0082, 0x1308, iwl6005_2agn_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)}, ++ {IWL_PCI_DEVICE(0x0082, 0x1328, iwl6005_2agn_cfg)}, + {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)}, ++ {IWL_PCI_DEVICE(0x0085, 0x1318, iwl6005_2agn_cfg)}, + {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)}, ++ {IWL_PCI_DEVICE(0x0085, 0xC228, iwl6005_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x4820, iwl6005_2agn_d_cfg)}, + {IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_2agn_mow1_cfg)},/* low 5GHz active */ + {IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_2agn_mow2_cfg)},/* high 5GHz active */ +@@ -239,8 +246,11 @@ + + /* 6x35 Series */ + {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)}, ++ {IWL_PCI_DEVICE(0x088E, 0x406A, iwl6035_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)}, ++ {IWL_PCI_DEVICE(0x088F, 0x426A, iwl6035_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)}, ++ {IWL_PCI_DEVICE(0x088E, 0x446A, iwl6035_2agn_sff_cfg)}, + {IWL_PCI_DEVICE(0x088E, 0x4860, iwl6035_2agn_cfg)}, + {IWL_PCI_DEVICE(0x088F, 0x5260, iwl6035_2agn_cfg)}, + +Index: linux-3.10-3.10.11/dummy/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1514_fa2025dc177d9bef300b48289b689a5d667f5ae9.txt 2014-04-28 00:41:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.patch --- linux-3.10.11/debian/patches/rpi/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.patch 2014-04-28 00:41:16.000000000 +0000 @@ -0,0 +1,42 @@ +commit 4ac4eb6520aa52f77be36780bbe5b17ca3bce983 +Author: Dave Kleikamp +Date: Fri Sep 6 21:49:56 2013 -0500 + + jfs: fix error path in ialloc + + commit 8660998608cfa1077e560034db81885af8e1e885 upstream. + + If insert_inode_locked() fails, we shouldn't be calling + unlock_new_inode(). + + Signed-off-by: Dave Kleikamp + Tested-by: Michael L. Semon + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/jfs/jfs_inode.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/jfs/jfs_inode.c 2014-04-27 23:37:41.000000000 +0000 ++++ linux-3.10-3.10.11/fs/jfs/jfs_inode.c 2014-04-28 00:41:15.000000000 +0000 +@@ -95,7 +95,7 @@ + + if (insert_inode_locked(inode) < 0) { + rc = -EINVAL; +- goto fail_unlock; ++ goto fail_put; + } + + inode_init_owner(inode, parent, mode); +@@ -156,7 +156,6 @@ + fail_drop: + dquot_drop(inode); + inode->i_flags |= S_NOQUOTA; +-fail_unlock: + clear_nlink(inode); + unlock_new_inode(inode); + fail_put: +Index: linux-3.10-3.10.11/dummy/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1515_4ac4eb6520aa52f77be36780bbe5b17ca3bce983.txt 2014-04-28 00:41:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.patch --- linux-3.10.11/debian/patches/rpi/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.patch 2014-04-28 00:41:16.000000000 +0000 @@ -0,0 +1,46 @@ +commit 1a64b62db0883ba42db1c3860a8aa25aa398e020 +Author: Marc Kleine-Budde +Date: Wed Oct 9 12:19:19 2013 +0200 + + can: at91-can: fix device to driver data mapping for platform devices + + commit 5abbeea553c8260ed4e2ac4aae962aff800b6c6d upstream. + + In commit: + + 3078cde7 can: at91_can: add dt support + + device tree support was added to the at91_can driver. In this commit the + mapping of device to driver data was mixed up. This results in the sam9x5 + parameters being used for the sam9263 and the workaround for the broken mailbox + 0 on the sam9263 not being activated. + + This patch fixes the broken platform_device_id table. + + Cc: Ludovic Desroches + Signed-off-by: Marc Kleine-Budde + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/can/at91_can.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/can/at91_can.c 2014-04-27 23:37:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/can/at91_can.c 2014-04-28 00:41:16.000000000 +0000 +@@ -1409,10 +1409,10 @@ + + static const struct platform_device_id at91_can_id_table[] = { + { +- .name = "at91_can", ++ .name = "at91sam9x5_can", + .driver_data = (kernel_ulong_t)&at91_at91sam9x5_data, + }, { +- .name = "at91sam9x5_can", ++ .name = "at91_can", + .driver_data = (kernel_ulong_t)&at91_at91sam9263_data, + }, { + /* sentinel */ +Index: linux-3.10-3.10.11/dummy/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1516_1a64b62db0883ba42db1c3860a8aa25aa398e020.txt 2014-04-28 00:41:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.patch --- linux-3.10.11/debian/patches/rpi/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.patch 2014-04-28 00:41:17.000000000 +0000 @@ -0,0 +1,39 @@ +commit e350ff50bcd46d650d56015a1416c622d057ec90 +Author: Marc Kleine-Budde +Date: Thu Oct 3 23:51:55 2013 +0200 + + can: flexcan: fix mx28 detection by rearanging OF match table + + commit e358784297992b012e8071764d996191dd2b1a54 upstream. + + The current implemetation of of_match_device() relies that the of_device_id + table in the driver is sorted from most specific to least specific compatible. + + Without this patch the mx28 is detected as the less specific p1010. This leads + to a p1010 specific workaround is activated on the mx28, which is not needed. + + Signed-off-by: Marc Kleine-Budde + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/can/flexcan.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/can/flexcan.c 2014-04-27 23:37:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/can/flexcan.c 2014-04-28 00:41:17.000000000 +0000 +@@ -983,9 +983,9 @@ + } + + static const struct of_device_id flexcan_of_match[] = { +- { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, }, +- { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, }, + { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, }, ++ { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, }, ++ { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, }, + { /* sentinel */ }, + }; + MODULE_DEVICE_TABLE(of, flexcan_of_match); +Index: linux-3.10-3.10.11/dummy/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1517_e350ff50bcd46d650d56015a1416c622d057ec90.txt 2014-04-28 00:41:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.patch 2014-04-28 00:41:18.000000000 +0000 @@ -0,0 +1,76 @@ +commit d60241f65bdc363f1be2b099bd98ff13a96c1f0d +Author: Marc Kleine-Budde +Date: Fri Oct 4 10:52:36 2013 +0200 + + can: flexcan: flexcan_chip_start: fix regression, mark one MB for TX and abort pending TX + + commit d5a7b406c529e4595ce03dc8f6dcf7fa36f106fa upstream. + + In patch + + 0d1862e can: flexcan: fix flexcan_chip_start() on imx6 + + the loop in flexcan_chip_start() that iterates over all mailboxes after the + soft reset of the CAN core was removed. This loop put all mailboxes (even the + ones marked as reserved 1...7) into EMPTY/INACTIVE mode. On mailboxes 8...63, + this aborts any pending TX messages. + + After a cold boot there is random garbage in the mailboxes, which leads to + spontaneous transmit of CAN frames during first activation. Further if the + interface was disabled with a pending message (usually due to an error + condition on the CAN bus), this message is retransmitted after enabling the + interface again. + + This patch fixes the regression by: + 1) Limiting the maximum number of used mailboxes to 8, 0...7 are used by the RX + FIFO, 8 is used by TX. + 2) Marking the TX mailbox as EMPTY/INACTIVE, so that any pending TX of that + mailbox is aborted. + + Cc: Lothar Waßmann + Signed-off-by: Marc Kleine-Budde + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/net/can/flexcan.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/can/flexcan.c 2014-04-28 00:41:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/can/flexcan.c 2014-04-28 00:41:18.000000000 +0000 +@@ -63,7 +63,7 @@ + #define FLEXCAN_MCR_BCC BIT(16) + #define FLEXCAN_MCR_LPRIO_EN BIT(13) + #define FLEXCAN_MCR_AEN BIT(12) +-#define FLEXCAN_MCR_MAXMB(x) ((x) & 0xf) ++#define FLEXCAN_MCR_MAXMB(x) ((x) & 0x1f) + #define FLEXCAN_MCR_IDAM_A (0 << 8) + #define FLEXCAN_MCR_IDAM_B (1 << 8) + #define FLEXCAN_MCR_IDAM_C (2 << 8) +@@ -745,9 +745,11 @@ + * + */ + reg_mcr = flexcan_read(®s->mcr); ++ reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff); + reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | + FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | +- FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS; ++ FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_SRX_DIS | ++ FLEXCAN_MCR_MAXMB(FLEXCAN_TX_BUF_ID); + netdev_dbg(dev, "%s: writing mcr=0x%08x", __func__, reg_mcr); + flexcan_write(reg_mcr, ®s->mcr); + +@@ -792,6 +794,10 @@ + ®s->cantxfg[i].can_ctrl); + } + ++ /* Abort any pending TX, mark Mailbox as INACTIVE */ ++ flexcan_write(FLEXCAN_MB_CNT_CODE(0x4), ++ ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); ++ + /* acceptance mask/acceptance code (accept everything) */ + flexcan_write(0x0, ®s->rxgmask); + flexcan_write(0x0, ®s->rx14mask); +Index: linux-3.10-3.10.11/dummy/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1518_d60241f65bdc363f1be2b099bd98ff13a96c1f0d.txt 2014-04-28 00:41:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.patch --- linux-3.10.11/debian/patches/rpi/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.patch 2014-04-28 00:41:19.000000000 +0000 @@ -0,0 +1,73 @@ +commit da0d4136d107d926273c227fdeaf805159044f66 +Author: Aaron Lu +Date: Thu Oct 10 13:22:36 2013 +0800 + + SCSI: sd: call blk_pm_runtime_init before add_disk + + commit 10c580e4239df5c3344ca00322eca86ab2de880b upstream. + + Sujit has found a race condition that would make q->nr_pending + unbalanced, it occurs as Sujit explained: + + " + sd_probe_async() -> + add_disk() -> + disk_add_event() -> + schedule(disk_events_workfn) + sd_revalidate_disk() + blk_pm_runtime_init() + return; + + Let's say the disk_events_workfn() calls sd_check_events() which tries + to send test_unit_ready() and because of sd_revalidate_disk() trying to + send another commands the test_unit_ready() might be re-queued as the + tagged command queuing is disabled. + + So the race condition is - + + Thread 1 | Thread 2 + sd_revalidate_disk() | sd_check_events() + ...nr_pending = 0 as q->dev = NULL| scsi_queue_insert() + blk_runtime_pm_init() | blk_pm_requeue_request() -> + | nr_pending = -1 since + | q->dev != NULL + " + + The problem is, the test_unit_ready request doesn't get counted the + first time it is queued, so the later decrement of q->nr_pending in + blk_pm_requeue_request makes it unbalanced. + + Fix this by calling blk_pm_runtime_init before add_disk so that all + requests initiated there will all be counted. + + Signed-off-by: Aaron Lu + Reported-and-tested-by: Sujit Reddy Thumma + Signed-off-by: James Bottomley + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/scsi/sd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/sd.c 2014-04-28 00:34:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/sd.c 2014-04-28 00:41:18.000000000 +0000 +@@ -2843,6 +2843,7 @@ + gd->events |= DISK_EVENT_MEDIA_CHANGE; + } + ++ blk_pm_runtime_init(sdp->request_queue, dev); + add_disk(gd); + if (sdkp->capacity) + sd_dif_config_host(sdkp); +@@ -2851,7 +2852,6 @@ + + sd_printk(KERN_NOTICE, sdkp, "Attached SCSI %sdisk\n", + sdp->removable ? "removable " : ""); +- blk_pm_runtime_init(sdp->request_queue, dev); + scsi_autopm_put_device(sdp); + put_device(&sdkp->dev); + } +Index: linux-3.10-3.10.11/dummy/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1519_da0d4136d107d926273c227fdeaf805159044f66.txt 2014-04-28 00:41:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.patch --- linux-3.10.11/debian/patches/rpi/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.patch 2014-04-28 00:41:19.000000000 +0000 @@ -0,0 +1,43 @@ +commit 4053771449476d9c323bd00c0c87bbd390588e55 +Author: Geyslan G. Bem +Date: Fri Oct 11 16:49:16 2013 -0300 + + ecryptfs: Fix memory leakage in keystore.c + + commit 3edc8376c06133e3386265a824869cad03a4efd4 upstream. + + In 'decrypt_pki_encrypted_session_key' function: + + Initializes 'payload' pointer and releases it on exit. + + Signed-off-by: Geyslan G. Bem + Signed-off-by: Tyler Hicks + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/ecryptfs/keystore.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/ecryptfs/keystore.c 2014-04-27 23:37:39.000000000 +0000 ++++ linux-3.10-3.10.11/fs/ecryptfs/keystore.c 2014-04-28 00:41:19.000000000 +0000 +@@ -1149,7 +1149,7 @@ + struct ecryptfs_msg_ctx *msg_ctx; + struct ecryptfs_message *msg = NULL; + char *auth_tok_sig; +- char *payload; ++ char *payload = NULL; + size_t payload_len = 0; + int rc; + +@@ -1203,6 +1203,7 @@ + } + out: + kfree(msg); ++ kfree(payload); + return rc; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1520_4053771449476d9c323bd00c0c87bbd390588e55.txt 2014-04-28 00:41:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.patch 2014-04-28 00:41:20.000000000 +0000 @@ -0,0 +1,56 @@ +commit 7e44a92662ce582268c4f35e68aad1f632ada8f8 +Author: Shaohua Li +Date: Sat Oct 19 14:50:28 2013 +0800 + + raid5: set bio bi_vcnt 0 for discard request + + commit 37c61ff31e9b5e3fcf3cc6579f5c68f6ad40c4b1 upstream. + + SCSI layer will add new payload for discard request. If two bios are merged + to one, the second bio has bi_vcnt 1 which is set in raid5. This will confuse + SCSI and cause oops. + + Suitable for backport to 3.7+ + + Reported-by: Jes Sorensen + Signed-off-by: Shaohua Li + Signed-off-by: NeilBrown + Acked-by: Martin K. Petersen + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/raid5.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/raid5.c 2014-04-27 23:37:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/raid5.c 2014-04-28 00:41:20.000000000 +0000 +@@ -668,6 +668,12 @@ + bi->bi_io_vec[0].bv_len = STRIPE_SIZE; + bi->bi_io_vec[0].bv_offset = 0; + bi->bi_size = STRIPE_SIZE; ++ /* ++ * If this is discard request, set bi_vcnt 0. We don't ++ * want to confuse SCSI because SCSI will replace payload ++ */ ++ if (rw & REQ_DISCARD) ++ bi->bi_vcnt = 0; + if (rrdev) + set_bit(R5_DOUBLE_LOCKED, &sh->dev[i].flags); + +@@ -706,6 +712,12 @@ + rbi->bi_io_vec[0].bv_len = STRIPE_SIZE; + rbi->bi_io_vec[0].bv_offset = 0; + rbi->bi_size = STRIPE_SIZE; ++ /* ++ * If this is discard request, set bi_vcnt 0. We don't ++ * want to confuse SCSI because SCSI will replace payload ++ */ ++ if (rw & REQ_DISCARD) ++ rbi->bi_vcnt = 0; + if (conf->mddev->gendisk) + trace_block_bio_remap(bdev_get_queue(rbi->bi_bdev), + rbi, disk_devt(conf->mddev->gendisk), +Index: linux-3.10-3.10.11/dummy/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1521_7e44a92662ce582268c4f35e68aad1f632ada8f8.txt 2014-04-28 00:41:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.patch --- linux-3.10.11/debian/patches/rpi/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.patch 2014-04-28 00:41:21.000000000 +0000 @@ -0,0 +1,44 @@ +commit 01e608d7276508fcafb76f2092db89885e62ef66 +Author: Shaohua Li +Date: Sat Oct 19 14:51:42 2013 +0800 + + raid5: avoid finding "discard" stripe + + commit d47648fcf0611812286f68131b40251c6fa54f5e upstream. + + SCSI discard will damage discard stripe bio setting, eg, some fields are + changed. If the stripe is reused very soon, we have wrong bios setting. We + remove discard stripe from hash list, so next time the strip will be fully + initialized. + + Suitable for backport to 3.7+. + + Signed-off-by: Shaohua Li + Signed-off-by: NeilBrown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/raid5.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/raid5.c 2014-04-28 00:41:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/raid5.c 2014-04-28 00:41:21.000000000 +0000 +@@ -2812,6 +2812,14 @@ + } + /* now that discard is done we can proceed with any sync */ + clear_bit(STRIPE_DISCARD, &sh->state); ++ /* ++ * SCSI discard will change some bio fields and the stripe has ++ * no updated data, so remove it from hash list and the stripe ++ * will be reinitialized ++ */ ++ spin_lock_irq(&conf->device_lock); ++ remove_hash(sh); ++ spin_unlock_irq(&conf->device_lock); + if (test_bit(STRIPE_SYNC_REQUESTED, &sh->state)) + set_bit(STRIPE_HANDLE, &sh->state); + +Index: linux-3.10-3.10.11/dummy/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1522_01e608d7276508fcafb76f2092db89885e62ef66.txt 2014-04-28 00:41:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.patch --- linux-3.10.11/debian/patches/rpi/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.patch 2014-04-28 00:41:22.000000000 +0000 @@ -0,0 +1,52 @@ +commit 1946436e87d13b44bbf69a37cb7fe07477bb5117 +Author: Gwendal Grignou +Date: Fri Aug 7 16:17:49 2009 -0700 + + libata: make ata_eh_qc_retry() bump scmd->allowed on bogus failures + + commit f13e220161e738c2710b9904dcb3cf8bb0bcce61 upstream. + + libata EH decrements scmd->retries when the command failed for reasons + unrelated to the command itself so that, for example, commands aborted + due to suspend / resume cycle don't get penalized; however, + decrementing scmd->retries isn't enough for ATA passthrough commands. + + Without this fix, ATA passthrough commands are not resend to the + drive, and no error is signalled to the caller because: + + - allowed retry count is 1 + - ata_eh_qc_complete fill the sense data, so result is valid + - sense data is filled with untouched ATA registers. + + Signed-off-by: Gwendal Grignou + Signed-off-by: Tejun Heo + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/ata/libata-eh.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ata/libata-eh.c 2014-04-27 23:37:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ata/libata-eh.c 2014-04-28 00:41:22.000000000 +0000 +@@ -1322,14 +1322,14 @@ + * should be retried. To be used from EH. + * + * SCSI midlayer limits the number of retries to scmd->allowed. +- * scmd->retries is decremented for commands which get retried ++ * scmd->allowed is incremented for commands which get retried + * due to unrelated failures (qc->err_mask is zero). + */ + void ata_eh_qc_retry(struct ata_queued_cmd *qc) + { + struct scsi_cmnd *scmd = qc->scsicmd; +- if (!qc->err_mask && scmd->retries) +- scmd->retries--; ++ if (!qc->err_mask) ++ scmd->allowed++; + __ata_eh_qc_complete(qc); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1523_1946436e87d13b44bbf69a37cb7fe07477bb5117.txt 2014-04-28 00:41:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.patch 2014-04-28 00:41:23.000000000 +0000 @@ -0,0 +1,113 @@ +commit 0465496671f4769e0f4f00481ce5bc5598c5caa2 +Author: Bian Yu +Date: Sat Oct 12 01:10:03 2013 -0400 + + md: avoid deadlock when md_set_badblocks. + + commit 905b0297a9533d7a6ee00a01a990456636877dd6 upstream. + + When operate harddisk and hit errors, md_set_badblocks is called after + scsi_restart_operations which already disabled the irq. but md_set_badblocks + will call write_sequnlock_irq and enable irq. so softirq can preempt the + current thread and that may cause a deadlock. I think this situation should + use write_sequnlock_irqsave/irqrestore instead. + + I met the situation and the call trace is below: + [ 638.919974] BUG: spinlock recursion on CPU#0, scsi_eh_13/1010 + [ 638.921923] lock: 0xffff8800d4d51fc8, .magic: dead4ead, .owner: scsi_eh_13/1010, .owner_cpu: 0 + [ 638.923890] CPU: 0 PID: 1010 Comm: scsi_eh_13 Not tainted 3.12.0-rc5+ #37 + [ 638.925844] Hardware name: To be filled by O.E.M. To be filled by O.E.M./MAHOBAY, BIOS 4.6.5 03/05/2013 + [ 638.927816] ffff880037ad4640 ffff880118c03d50 ffffffff8172ff85 0000000000000007 + [ 638.929829] ffff8800d4d51fc8 ffff880118c03d70 ffffffff81730030 ffff8800d4d51fc8 + [ 638.931848] ffffffff81a72eb0 ffff880118c03d90 ffffffff81730056 ffff8800d4d51fc8 + [ 638.933884] Call Trace: + [ 638.935867] [] dump_stack+0x55/0x76 + [ 638.937878] [] spin_dump+0x8a/0x8f + [ 638.939861] [] spin_bug+0x21/0x26 + [ 638.941836] [] do_raw_spin_lock+0xa4/0xc0 + [ 638.943801] [] _raw_spin_lock+0x66/0x80 + [ 638.945747] [] ? scsi_device_unbusy+0x9d/0xd0 + [ 638.947672] [] ? _raw_spin_unlock+0x2b/0x50 + [ 638.949595] [] scsi_device_unbusy+0x9d/0xd0 + [ 638.951504] [] scsi_finish_command+0x37/0xe0 + [ 638.953388] [] scsi_softirq_done+0xa8/0x140 + [ 638.955248] [] blk_done_softirq+0x7b/0x90 + [ 638.957116] [] __do_softirq+0xfd/0x330 + [ 638.958987] [] ? __lock_release+0x6f/0x100 + [ 638.960861] [] call_softirq+0x1c/0x30 + [ 638.962724] [] do_softirq+0x8d/0xc0 + [ 638.964565] [] irq_exit+0x10e/0x150 + [ 638.966390] [] smp_apic_timer_interrupt+0x4a/0x60 + [ 638.968223] [] apic_timer_interrupt+0x6f/0x80 + [ 638.970079] [] ? __lock_release+0x6f/0x100 + [ 638.971899] [] ? _raw_spin_unlock_irq+0x3a/0x50 + [ 638.973691] [] ? _raw_spin_unlock_irq+0x30/0x50 + [ 638.975475] [] md_set_badblocks+0x1f3/0x4a0 + [ 638.977243] [] rdev_set_badblocks+0x27/0x80 + [ 638.978988] [] raid5_end_read_request+0x36b/0x4e0 [raid456] + [ 638.980723] [] bio_endio+0x1d/0x40 + [ 638.982463] [] req_bio_endio.isra.65+0x83/0xa0 + [ 638.984214] [] blk_update_request+0x7f/0x350 + [ 638.985967] [] blk_update_bidi_request+0x31/0x90 + [ 638.987710] [] __blk_end_bidi_request+0x20/0x50 + [ 638.989439] [] __blk_end_request_all+0x1f/0x30 + [ 638.991149] [] blk_peek_request+0x106/0x250 + [ 638.992861] [] ? scsi_kill_request.isra.32+0xe9/0x130 + [ 638.994561] [] scsi_request_fn+0x4a/0x3d0 + [ 638.996251] [] __blk_run_queue+0x37/0x50 + [ 638.997900] [] blk_run_queue+0x2f/0x50 + [ 638.999553] [] scsi_run_queue+0xe0/0x1c0 + [ 639.001185] [] scsi_run_host_queues+0x21/0x40 + [ 639.002798] [] scsi_restart_operations+0x177/0x200 + [ 639.004391] [] scsi_error_handler+0xc9/0xe0 + [ 639.005996] [] ? scsi_unjam_host+0xd0/0xd0 + [ 639.007600] [] kthread+0xdb/0xe0 + [ 639.009205] [] ? flush_kthread_worker+0x170/0x170 + [ 639.010821] [] ret_from_fork+0x7c/0xb0 + [ 639.012437] [] ? flush_kthread_worker+0x170/0x170 + + This bug was introduce in commit 2e8ac30312973dd20e68073653 + (the first time rdev_set_badblock was call from interrupt context), + so this patch is appropriate for 3.5 and subsequent kernels. + + Signed-off-by: Bian Yu + Reviewed-by: Jianpeng Ma + Signed-off-by: NeilBrown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/md.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/md.c 2014-04-27 23:37:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/md.c 2014-04-28 00:41:22.000000000 +0000 +@@ -8072,6 +8072,7 @@ + u64 *p; + int lo, hi; + int rv = 1; ++ unsigned long flags; + + if (bb->shift < 0) + /* badblocks are disabled */ +@@ -8086,7 +8087,7 @@ + sectors = next - s; + } + +- write_seqlock_irq(&bb->lock); ++ write_seqlock_irqsave(&bb->lock, flags); + + p = bb->page; + lo = 0; +@@ -8202,7 +8203,7 @@ + bb->changed = 1; + if (!acknowledged) + bb->unacked_exist = 1; +- write_sequnlock_irq(&bb->lock); ++ write_sequnlock_irqrestore(&bb->lock, flags); + + return rv; + } +Index: linux-3.10-3.10.11/dummy/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1524_0465496671f4769e0f4f00481ce5bc5598c5caa2.txt 2014-04-28 00:41:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.patch 2014-04-28 00:41:24.000000000 +0000 @@ -0,0 +1,60 @@ +commit ed840bec21c6f2f99ca34e974a5905e4f2116c1b +Author: Lukasz Dorau +Date: Thu Oct 24 12:55:17 2013 +1100 + + md: Fix skipping recovery for read-only arrays. + + commit 61e4947c99c4494336254ec540c50186d186150b upstream. + + Since: + commit 7ceb17e87bde79d285a8b988cfed9eaeebe60b86 + md: Allow devices to be re-added to a read-only array. + + spares are activated on a read-only array. In case of raid1 and raid10 + personalities it causes that not-in-sync devices are marked in-sync + without checking if recovery has been finished. + + If a read-only array is degraded and one of its devices is not in-sync + (because the array has been only partially recovered) recovery will be skipped. + + This patch adds checking if recovery has been finished before marking a device + in-sync for raid1 and raid10 personalities. In case of raid5 personality + such condition is already present (at raid5.c:6029). + + Bug was introduced in 3.10 and causes data corruption. + + Signed-off-by: Pawel Baldysiak + Signed-off-by: Lukasz Dorau + Signed-off-by: NeilBrown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/md/raid1.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/raid1.c 2014-04-27 23:37:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/raid1.c 2014-04-28 00:41:23.000000000 +0000 +@@ -1479,6 +1479,7 @@ + } + } + if (rdev ++ && rdev->recovery_offset == MaxSector + && !test_bit(Faulty, &rdev->flags) + && !test_and_set_bit(In_sync, &rdev->flags)) { + count++; +Index: linux-3.10-3.10.11/drivers/md/raid10.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/md/raid10.c 2014-04-27 23:37:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/md/raid10.c 2014-04-28 00:41:23.000000000 +0000 +@@ -1762,6 +1762,7 @@ + } + sysfs_notify_dirent_safe(tmp->replacement->sysfs_state); + } else if (tmp->rdev ++ && tmp->rdev->recovery_offset == MaxSector + && !test_bit(Faulty, &tmp->rdev->flags) + && !test_and_set_bit(In_sync, &tmp->rdev->flags)) { + count++; +Index: linux-3.10-3.10.11/dummy/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1525_ed840bec21c6f2f99ca34e974a5905e4f2116c1b.txt 2014-04-28 00:41:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.patch --- linux-3.10.11/debian/patches/rpi/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.patch 2014-04-28 00:41:25.000000000 +0000 @@ -0,0 +1,52 @@ +commit f21abb623ac78e2e9248057282d0de4e9b82e616 +Author: Wei Yongjun +Date: Fri Oct 25 21:53:33 2013 +0800 + + target/pscsi: fix return value check + + commit 58932e96e438cd78f75e765d7b87ef39d3533d15 upstream. + + In case of error, the function scsi_host_lookup() returns NULL + pointer not ERR_PTR(). The IS_ERR() test in the return value check + should be replaced with NULL test. + + Signed-off-by: Wei Yongjun + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/target/target_core_pscsi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/target/target_core_pscsi.c 2014-04-27 23:37:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/target/target_core_pscsi.c 2014-04-28 00:41:24.000000000 +0000 +@@ -134,10 +134,10 @@ + * pSCSI Host ID and enable for phba mode + */ + sh = scsi_host_lookup(phv->phv_host_id); +- if (IS_ERR(sh)) { ++ if (!sh) { + pr_err("pSCSI: Unable to locate SCSI Host for" + " phv_host_id: %d\n", phv->phv_host_id); +- return PTR_ERR(sh); ++ return -EINVAL; + } + + phv->phv_lld_host = sh; +@@ -515,10 +515,10 @@ + sh = phv->phv_lld_host; + } else { + sh = scsi_host_lookup(pdv->pdv_host_id); +- if (IS_ERR(sh)) { ++ if (!sh) { + pr_err("pSCSI: Unable to locate" + " pdv_host_id: %d\n", pdv->pdv_host_id); +- return PTR_ERR(sh); ++ return -EINVAL; + } + } + } else { +Index: linux-3.10-3.10.11/dummy/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1526_f21abb623ac78e2e9248057282d0de4e9b82e616.txt 2014-04-28 00:41:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.patch 2014-04-28 00:41:26.000000000 +0000 @@ -0,0 +1,46 @@ +commit 722b78bc8a42b6910c291266e87abe2e63dc750f +Author: Nicholas Bellinger +Date: Fri Oct 25 10:44:15 2013 -0700 + + vhost/scsi: Fix incorrect usage of get_user_pages_fast write parameter + + commit 60a01f558af9c48b0bb31f303c479e32721add3f upstream. + + This patch addresses a long-standing bug where the get_user_pages_fast() + write parameter used for setting the underlying page table entry permission + bits was incorrectly set to write=1 for data_direction=DMA_TO_DEVICE, and + passed into get_user_pages_fast() via vhost_scsi_map_iov_to_sgl(). + + However, this parameter is intended to signal WRITEs to pinned userspace + PTEs for the virtio-scsi DMA_FROM_DEVICE -> READ payload case, and *not* + for the virtio-scsi DMA_TO_DEVICE -> WRITE payload case. + + This bug would manifest itself as random process segmentation faults on + KVM host after repeated vhost starts + stops and/or with lots of vhost + endpoints + LUNs. + + Cc: Stefan Hajnoczi + Cc: Michael S. Tsirkin + Cc: Asias He + Signed-off-by: Nicholas Bellinger + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/vhost/scsi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/vhost/scsi.c 2014-04-27 23:37:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/vhost/scsi.c 2014-04-28 00:41:25.000000000 +0000 +@@ -1017,7 +1017,7 @@ + if (data_direction != DMA_NONE) { + ret = vhost_scsi_map_iov_to_sgl(tv_cmd, + &vq->iov[data_first], data_num, +- data_direction == DMA_TO_DEVICE); ++ data_direction == DMA_FROM_DEVICE); + if (unlikely(ret)) { + vq_err(vq, "Failed to map iov to sgl\n"); + goto err_free; +Index: linux-3.10-3.10.11/dummy/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1527_722b78bc8a42b6910c291266e87abe2e63dc750f.txt 2014-04-28 00:41:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.patch --- linux-3.10.11/debian/patches/rpi/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.patch 2014-04-28 00:41:26.000000000 +0000 @@ -0,0 +1,165 @@ +commit b5b02b140665d016236918cb88b88f6249050605 +Author: Thomas Gleixner +Date: Tue Sep 24 21:50:23 2013 +0200 + + clockevents: Sanitize ticks to nsec conversion + + commit 97b9410643475d6557d2517c2aff9fd2221141a9 upstream. + + Marc Kleine-Budde pointed out, that commit 77cc982 "clocksource: use + clockevents_config_and_register() where possible" caused a regression + for some of the converted subarchs. + + The reason is, that the clockevents core code converts the minimal + hardware tick delta to a nanosecond value for core internal + usage. This conversion is affected by integer math rounding loss, so + the backwards conversion to hardware ticks will likely result in a + value which is less than the configured hardware limitation. The + affected subarchs used their own workaround (SIGH!) which got lost in + the conversion. + + The solution for the issue at hand is simple: adding evt->mult - 1 to + the shifted value before the integer divison in the core conversion + function takes care of it. But this only works for the case where for + the scaled math mult/shift pair "mult <= 1 << shift" is true. For the + case where "mult > 1 << shift" we can apply the rounding add only for + the minimum delta value to make sure that the backward conversion is + not less than the given hardware limit. For the upper bound we need to + omit the rounding add, because the backwards conversion is always + larger than the original latch value. That would violate the upper + bound of the hardware device. + + Though looking closer at the details of that function reveals another + bogosity: The upper bounds check is broken as well. Checking for a + resulting "clc" value greater than KTIME_MAX after the conversion is + pointless. The conversion does: + + u64 clc = (latch << evt->shift) / evt->mult; + + So there is no sanity check for (latch << evt->shift) exceeding the + 64bit boundary. The latch argument is "unsigned long", so on a 64bit + arch the handed in argument could easily lead to an unnoticed shift + overflow. With the above rounding fix applied the calculation before + the divison is: + + u64 clc = (latch << evt->shift) + evt->mult - 1; + + So we need to make sure, that neither the shift nor the rounding add + is overflowing the u64 boundary. + + [ukl: move assignment to rnd after eventually changing mult, fix build + issue and correct comment with the right math] + + Signed-off-by: Thomas Gleixner + Cc: Russell King - ARM Linux + Cc: Marc Kleine-Budde + Cc: nicolas.ferre@atmel.com + Cc: Marc Pignat + Cc: john.stultz@linaro.org + Cc: kernel@pengutronix.de + Cc: Ronald Wahl + Cc: LAK + Cc: Ludovic Desroches + Link: http://lkml.kernel.org/r/1380052223-24139-1-git-send-email-u.kleine-koenig@pengutronix.de + Signed-off-by: Uwe Kleine-König + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/kernel/time/clockevents.c +=================================================================== +--- linux-3.10-3.10.11.orig/kernel/time/clockevents.c 2014-04-27 23:37:37.000000000 +0000 ++++ linux-3.10-3.10.11/kernel/time/clockevents.c 2014-04-28 00:41:26.000000000 +0000 +@@ -30,29 +30,64 @@ + /* Protection for the above */ + static DEFINE_RAW_SPINLOCK(clockevents_lock); + +-/** +- * clockevents_delta2ns - Convert a latch value (device ticks) to nanoseconds +- * @latch: value to convert +- * @evt: pointer to clock event device descriptor +- * +- * Math helper, returns latch value converted to nanoseconds (bound checked) +- */ +-u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt) ++static u64 cev_delta2ns(unsigned long latch, struct clock_event_device *evt, ++ bool ismax) + { + u64 clc = (u64) latch << evt->shift; ++ u64 rnd; + + if (unlikely(!evt->mult)) { + evt->mult = 1; + WARN_ON(1); + } ++ rnd = (u64) evt->mult - 1; ++ ++ /* ++ * Upper bound sanity check. If the backwards conversion is ++ * not equal latch, we know that the above shift overflowed. ++ */ ++ if ((clc >> evt->shift) != (u64)latch) ++ clc = ~0ULL; ++ ++ /* ++ * Scaled math oddities: ++ * ++ * For mult <= (1 << shift) we can safely add mult - 1 to ++ * prevent integer rounding loss. So the backwards conversion ++ * from nsec to device ticks will be correct. ++ * ++ * For mult > (1 << shift), i.e. device frequency is > 1GHz we ++ * need to be careful. Adding mult - 1 will result in a value ++ * which when converted back to device ticks can be larger ++ * than latch by up to (mult - 1) >> shift. For the min_delta ++ * calculation we still want to apply this in order to stay ++ * above the minimum device ticks limit. For the upper limit ++ * we would end up with a latch value larger than the upper ++ * limit of the device, so we omit the add to stay below the ++ * device upper boundary. ++ * ++ * Also omit the add if it would overflow the u64 boundary. ++ */ ++ if ((~0ULL - clc > rnd) && ++ (!ismax || evt->mult <= (1U << evt->shift))) ++ clc += rnd; + + do_div(clc, evt->mult); +- if (clc < 1000) +- clc = 1000; +- if (clc > KTIME_MAX) +- clc = KTIME_MAX; + +- return clc; ++ /* Deltas less than 1usec are pointless noise */ ++ return clc > 1000 ? clc : 1000; ++} ++ ++/** ++ * clockevents_delta2ns - Convert a latch value (device ticks) to nanoseconds ++ * @latch: value to convert ++ * @evt: pointer to clock event device descriptor ++ * ++ * Math helper, returns latch value converted to nanoseconds (bound checked) ++ */ ++u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt) ++{ ++ return cev_delta2ns(latch, evt, false); + } + EXPORT_SYMBOL_GPL(clockevent_delta2ns); + +@@ -317,8 +352,8 @@ + sec = 600; + + clockevents_calc_mult_shift(dev, freq, sec); +- dev->min_delta_ns = clockevent_delta2ns(dev->min_delta_ticks, dev); +- dev->max_delta_ns = clockevent_delta2ns(dev->max_delta_ticks, dev); ++ dev->min_delta_ns = cev_delta2ns(dev->min_delta_ticks, dev, false); ++ dev->max_delta_ns = cev_delta2ns(dev->max_delta_ticks, dev, true); + } + + /** +Index: linux-3.10-3.10.11/dummy/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1528_b5b02b140665d016236918cb88b88f6249050605.txt 2014-04-28 00:41:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.patch 2014-04-28 00:41:27.000000000 +0000 @@ -0,0 +1,73 @@ +commit daa73ffb82d3e6135de12ca879c373bbd5a9f41b +Author: Helge Deller +Date: Sat Oct 26 23:19:25 2013 +0200 + + parisc: Do not crash 64bit SMP kernels on machines with >= 4GB RAM + + commit 54e181e073fc1415e41917d725ebdbd7de956455 upstream. + + Since the beginning of the parisc-linux port, sometimes 64bit SMP kernels were + not able to bring up other CPUs than the monarch CPU and instead crashed the + kernel. The reason was unclear, esp. since it involved various machines (e.g. + J5600, J6750 and SuperDome). Testing showed, that those crashes didn't happened + when less than 4GB were installed, or if a 32bit Linux kernel was booted. + + In the end, the fix for those SMP problems is trivial: + During the early phase of the initialization of the CPUs, including the monarch + CPU, the PDC_PSW firmware function to enable WIDE (=64bit) mode is called. + It's documented that this firmware function may clobber various registers, and + one one of those possibly clobbered registers is %cr30 which holds the task + thread info pointer. + + Now, if %cr30 would always have been clobbered, then this bug would have been + detected much earlier. But lots of testing finally showed, that - at least for + %cr30 - on some machines only the upper 32bits of the 64bit register suddenly + turned zero after the firmware call. + + So, after finding the root cause, the explanation for the various crashes + became clear: + - On 32bit SMP Linux kernels all upper 32bit were zero, so we didn't faced this + problem. + - Monarch CPUs in 64bit mode always booted sucessfully, because the inital task + thread info pointer was below 4GB. + - Secondary CPUs booted sucessfully on machines with less than 4GB RAM because + the upper 32bit were zero anyay. + - Secondary CPus failed to boot if we had more than 4GB RAM and the task thread + info pointer was located above the 4GB boundary. + + Finally, the patch to fix this problem is trivial by saving the %cr30 register + before the firmware call and restoring it afterwards. + + Signed-off-by: Helge Deller + Signed-off-by: John David Anglin + Signed-off-by: Helge Deller + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/parisc/kernel/head.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/parisc/kernel/head.S 2014-04-27 23:37:36.000000000 +0000 ++++ linux-3.10-3.10.11/arch/parisc/kernel/head.S 2014-04-28 00:41:27.000000000 +0000 +@@ -195,6 +195,8 @@ + ldw MEM_PDC_HI(%r0),%r6 + depd %r6, 31, 32, %r3 /* move to upper word */ + ++ mfctl %cr30,%r6 /* PCX-W2 firmware bug */ ++ + ldo PDC_PSW(%r0),%arg0 /* 21 */ + ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */ + ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */ +@@ -203,6 +205,8 @@ + copy %r0,%arg3 + + stext_pdc_ret: ++ mtctl %r6,%cr30 /* restore task thread info */ ++ + /* restore rfi target address*/ + ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10 + tophys_r1 %r10 +Index: linux-3.10-3.10.11/dummy/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1529_daa73ffb82d3e6135de12ca879c373bbd5a9f41b.txt 2014-04-28 00:41:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.patch 2014-04-28 00:41:28.000000000 +0000 @@ -0,0 +1,88 @@ +commit 27b840ea211f8a36fadabaa07ef94fb1b45730c3 +Author: Ming Lei +Date: Sat Nov 2 09:11:33 2013 +1030 + + scripts/kallsyms: filter symbols not in kernel address space + + commit f6537f2f0eba4eba3354e48dbe3047db6d8b6254 upstream. + + This patch uses CONFIG_PAGE_OFFSET to filter symbols which + are not in kernel address space because these symbols are + generally for generating code purpose and can't be run at + kernel mode, so we needn't keep them in /proc/kallsyms. + + For example, on ARM there are some symbols which may be + linked in relocatable code section, then perf can't parse + symbols any more from /proc/kallsyms, this patch fixes the + problem (introduced b9b32bf70f2fb710b07c94e13afbc729afe221da) + + Cc: Russell King + Cc: linux-arm-kernel@lists.infradead.org + Cc: Michal Marek + Signed-off-by: Ming Lei + Signed-off-by: Rusty Russell + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/scripts/kallsyms.c +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/kallsyms.c 2014-04-27 23:37:36.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/kallsyms.c 2014-04-28 00:41:27.000000000 +0000 +@@ -55,6 +55,7 @@ + static unsigned int table_size, table_cnt; + static int all_symbols = 0; + static char symbol_prefix_char = '\0'; ++static unsigned long long kernel_start_addr = 0; + + int token_profit[0x10000]; + +@@ -65,7 +66,10 @@ + + static void usage(void) + { +- fprintf(stderr, "Usage: kallsyms [--all-symbols] [--symbol-prefix=] < in.map > out.S\n"); ++ fprintf(stderr, "Usage: kallsyms [--all-symbols] " ++ "[--symbol-prefix=] " ++ "[--page-offset=] " ++ "< in.map > out.S\n"); + exit(1); + } + +@@ -194,6 +198,9 @@ + int i; + int offset = 1; + ++ if (s->addr < kernel_start_addr) ++ return 0; ++ + /* skip prefix char */ + if (symbol_prefix_char && *(s->sym + 1) == symbol_prefix_char) + offset++; +@@ -646,6 +653,9 @@ + if ((*p == '"' && *(p+2) == '"') || (*p == '\'' && *(p+2) == '\'')) + p++; + symbol_prefix_char = *p; ++ } else if (strncmp(argv[i], "--page-offset=", 14) == 0) { ++ const char *p = &argv[i][14]; ++ kernel_start_addr = strtoull(p, NULL, 16); + } else + usage(); + } +Index: linux-3.10-3.10.11/scripts/link-vmlinux.sh +=================================================================== +--- linux-3.10-3.10.11.orig/scripts/link-vmlinux.sh 2014-04-27 23:37:36.000000000 +0000 ++++ linux-3.10-3.10.11/scripts/link-vmlinux.sh 2014-04-28 00:41:27.000000000 +0000 +@@ -82,6 +82,8 @@ + kallsymopt="${kallsymopt} --all-symbols" + fi + ++ kallsymopt="${kallsymopt} --page-offset=$CONFIG_PAGE_OFFSET" ++ + local aflags="${KBUILD_AFLAGS} ${KBUILD_AFLAGS_KERNEL} \ + ${NOSTDINC_FLAGS} ${LINUXINCLUDE} ${KBUILD_CPPFLAGS}" + +Index: linux-3.10-3.10.11/dummy/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1530_27b840ea211f8a36fadabaa07ef94fb1b45730c3.txt 2014-04-28 00:41:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.patch --- linux-3.10.11/debian/patches/rpi/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.patch 2014-04-28 00:41:29.000000000 +0000 @@ -0,0 +1,68 @@ +commit 40a894023d9a4c58379eb4f2ac12e40a2fe014d3 +Author: Vineet Gupta +Date: Sat Nov 2 17:47:49 2013 +0530 + + ARC: Incorrect mm reference used in vmalloc fault handler + + commit 9c41f4eeb9d51f3ece20428d35a3ea32cf3b5622 upstream. + + A vmalloc fault needs to sync up PGD/PTE entry from init_mm to current + task's "active_mm". ARC vmalloc fault handler however was using mm. + + A vmalloc fault for non user task context (actually pre-userland, from + init thread's open for /dev/console) caused the handler to deref NULL mm + (for mm->pgd) + + The reasons it worked so far is amazing: + + 1. By default (!SMP), vmalloc fault handler uses a cached value of PGD. + In SMP that MMU register is repurposed hence need for mm pointer deref. + + 2. In pre-3.12 SMP kernel, the problem triggering vmalloc didn't exist in + pre-userland code path - it was introduced with commit 20bafb3d23d108bc + "n_tty: Move buffers into n_tty_data" + + Signed-off-by: Vineet Gupta + Cc: Gilad Ben-Yossef + Cc: Noam Camus + Cc: Peter Hurley + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/arc/mm/fault.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arc/mm/fault.c 2014-04-27 23:37:36.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arc/mm/fault.c 2014-04-28 00:41:28.000000000 +0000 +@@ -16,7 +16,7 @@ + #include + #include + +-static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long address) ++static int handle_vmalloc_fault(unsigned long address) + { + /* + * Synchronize this task's top level page-table +@@ -26,7 +26,7 @@ + pud_t *pud, *pud_k; + pmd_t *pmd, *pmd_k; + +- pgd = pgd_offset_fast(mm, address); ++ pgd = pgd_offset_fast(current->active_mm, address); + pgd_k = pgd_offset_k(address); + + if (!pgd_present(*pgd_k)) +@@ -72,7 +72,7 @@ + * nothing more. + */ + if (address >= VMALLOC_START && address <= VMALLOC_END) { +- ret = handle_vmalloc_fault(mm, address); ++ ret = handle_vmalloc_fault(address); + if (unlikely(ret)) + goto bad_area_nosemaphore; + else +Index: linux-3.10-3.10.11/dummy/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1531_40a894023d9a4c58379eb4f2ac12e40a2fe014d3.txt 2014-04-28 00:41:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.patch --- linux-3.10.11/debian/patches/rpi/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.patch 2014-04-28 00:41:30.000000000 +0000 @@ -0,0 +1,44 @@ +commit 8fde18bd74c8f30094bc47edf2c9ed19478661de +Author: Takashi Iwai +Date: Fri Oct 25 23:43:10 2013 +0200 + + ALSA: hda - Add missing initial vmaster hook at build_controls callback + + commit b63eae0a6c84839275a4638a7baa391be965cd0e upstream. + + The generic parser has a support of vmaster hook, but this is + initialized only in the init callback with the check of the presence + of the corresponding kctl. However, since kctl is NULL at the very + first init callback that is called before build_controls callback, the + vmaster hook sync is skipped there. Eventually this leads to the + uninitialized state depending on the hook implementation. + + This patch adds a simple workaround, just calling the sync function + explicitly at build_controls callback. + + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/hda_generic.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/hda_generic.c 2014-04-28 00:40:53.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/hda_generic.c 2014-04-28 00:41:29.000000000 +0000 +@@ -4383,9 +4383,11 @@ + true, &spec->vmaster_mute.sw_kctl); + if (err < 0) + return err; +- if (spec->vmaster_mute.hook) ++ if (spec->vmaster_mute.hook) { + snd_hda_add_vmaster_hook(codec, &spec->vmaster_mute, + spec->vmaster_mute_enum); ++ snd_hda_sync_vmaster_hook(&spec->vmaster_mute); ++ } + } + + free_kctls(spec); /* no longer needed */ +Index: linux-3.10-3.10.11/dummy/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1532_8fde18bd74c8f30094bc47edf2c9ed19478661de.txt 2014-04-28 00:41:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.patch 2014-04-28 00:41:30.000000000 +0000 @@ -0,0 +1,40 @@ +commit c9e32ffdbe042276914daac9cdc737b8896eace6 +Author: Takashi Iwai +Date: Thu Oct 24 01:20:24 2013 +0200 + + ALSA: hda - Fix unbalanced runtime PM refcount after S3/S4 + + commit e6bbe666673ab044a3d39ddb74e4d9a401cf1d6f upstream. + + When a machine goes to S3/S4 after power-save is enabled, the runtime + PM refcount might be incorrectly decreased because the power-down + triggered soon after resume assumes that the controller was already + powered up, and issues the pm_notify down. + + This patch fixes the incorrect pm_notify call simply by checking the + current value properly. + + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/hda_codec.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/hda_codec.c 2014-04-27 23:37:35.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/hda_codec.c 2014-04-28 00:41:30.000000000 +0000 +@@ -4789,8 +4789,8 @@ + spin_unlock(&codec->power_lock); + + state = hda_call_codec_suspend(codec, true); +- codec->pm_down_notified = 0; +- if (!bus->power_keep_link_on && (state & AC_PWRST_CLK_STOP_OK)) { ++ if (!codec->pm_down_notified && ++ !bus->power_keep_link_on && (state & AC_PWRST_CLK_STOP_OK)) { + codec->pm_down_notified = 1; + hda_call_pm_notify(bus, false); + } +Index: linux-3.10-3.10.11/dummy/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1533_c9e32ffdbe042276914daac9cdc737b8896eace6.txt 2014-04-28 00:41:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.patch --- linux-3.10.11/debian/patches/rpi/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.patch 2014-04-28 00:41:31.000000000 +0000 @@ -0,0 +1,33 @@ +commit f08830dbf7af3b9c551d3112425a2d1b3c2757df +Author: Takashi Iwai +Date: Wed Oct 30 12:29:40 2013 +0100 + + ALSA: hda - Add a fixup for ASUS N76VZ + + commit 6fc16e58adf50c0f1e4478538983fb5ff6f453d4 upstream. + + ASUS N76VZ needs the same fixup as N56VZ for supporting the boost + speaker. + + Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=846529 + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/pci/hda/patch_realtek.c 2014-04-28 00:39:37.000000000 +0000 ++++ linux-3.10-3.10.11/sound/pci/hda/patch_realtek.c 2014-04-28 00:41:31.000000000 +0000 +@@ -4253,6 +4253,7 @@ + SND_PCI_QUIRK(0x1028, 0x05db, "Dell", ALC668_FIXUP_DELL_MIC_NO_PRESENCE), + SND_PCI_QUIRK(0x103c, 0x1632, "HP RP5800", ALC662_FIXUP_HP_RP5800), + SND_PCI_QUIRK(0x1043, 0x1477, "ASUS N56VZ", ALC662_FIXUP_ASUS_MODE4), ++ SND_PCI_QUIRK(0x1043, 0x1bf3, "ASUS N76VZ", ALC662_FIXUP_ASUS_MODE4), + SND_PCI_QUIRK(0x1043, 0x8469, "ASUS mobo", ALC662_FIXUP_NO_JACK_DETECT), + SND_PCI_QUIRK(0x105b, 0x0cd6, "Foxconn", ALC662_FIXUP_ASUS_MODE2), + SND_PCI_QUIRK(0x144d, 0xc051, "Samsung R720", ALC662_FIXUP_IDEAPAD), +Index: linux-3.10-3.10.11/dummy/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1534_f08830dbf7af3b9c551d3112425a2d1b3c2757df.txt 2014-04-28 00:41:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.patch --- linux-3.10.11/debian/patches/rpi/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.patch 2014-04-28 00:41:32.000000000 +0000 @@ -0,0 +1,74 @@ +commit 58dc7706bb9becb535e8861c7b8f33d604381710 +Author: Russell King +Date: Thu Oct 31 15:01:37 2013 +0000 + + ALSA: fix oops in snd_pcm_info() caused by ASoC DPCM + + commit a4461f41b94cb52e0141af717dcf4ef6558c8e2e upstream. + + Unable to handle kernel NULL pointer dereference at virtual address 00000008 + pgd = d5300000 + [00000008] *pgd=0d265831, *pte=00000000, *ppte=00000000 + Internal error: Oops: 17 [#1] PREEMPT ARM + CPU: 0 PID: 2295 Comm: vlc Not tainted 3.11.0+ #755 + task: dee74800 ti: e213c000 task.ti: e213c000 + PC is at snd_pcm_info+0xc8/0xd8 + LR is at 0x30232065 + pc : [] lr : [<30232065>] psr: a0070013 + sp : e213dea8 ip : d81cb0d0 fp : c05f7678 + r10: c05f7770 r9 : fffffdfd r8 : 00000000 + r7 : d8a968a8 r6 : d8a96800 r5 : d8a96200 r4 : d81cb000 + r3 : 00000000 r2 : d81cb000 r1 : 00000001 r0 : d8a96200 + Flags: NzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user + Control: 10c5387d Table: 15300019 DAC: 00000015 + Process vlc (pid: 2295, stack limit = 0xe213c248) + [] (snd_pcm_info) from [] (snd_pcm_info_user+0x34/0x9c) + [] (snd_pcm_info_user) from [] (snd_pcm_control_ioctl+0x274/0x280) + [] (snd_pcm_control_ioctl) from [] (snd_ctl_ioctl+0xc0/0x55c) + [] (snd_ctl_ioctl) from [] (do_vfs_ioctl+0x80/0x31c) + [] (do_vfs_ioctl) from [] (SyS_ioctl+0x3c/0x60) + [] (SyS_ioctl) from [] (ret_fast_syscall+0x0/0x48) + Code: e1a00005 e59530dc e3a01001 e1a02004 (e5933008) + ---[ end trace cb3d9bdb8dfefb3c ]--- + + This is provoked when the ASoC front end is open along with its backend, + (which causes the backend to have a runtime assigned to it) and then the + SNDRV_CTL_IOCTL_PCM_INFO is requested for the (visible) backend device. + + Resolve this by ensuring that ASoC internal backend devices are not + visible to userspace, just as the commentry for snd_pcm_new_internal() + says it should be. + + Signed-off-by: Russell King + Acked-by: Mark Brown + Signed-off-by: Takashi Iwai + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/core/pcm.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/core/pcm.c 2014-04-27 23:37:34.000000000 +0000 ++++ linux-3.10-3.10.11/sound/core/pcm.c 2014-04-28 00:41:31.000000000 +0000 +@@ -49,6 +49,8 @@ + struct snd_pcm *pcm; + + list_for_each_entry(pcm, &snd_pcm_devices, list) { ++ if (pcm->internal) ++ continue; + if (pcm->card == card && pcm->device == device) + return pcm; + } +@@ -60,6 +62,8 @@ + struct snd_pcm *pcm; + + list_for_each_entry(pcm, &snd_pcm_devices, list) { ++ if (pcm->internal) ++ continue; + if (pcm->card == card && pcm->device > device) + return pcm->device; + else if (pcm->card->number > card->number) +Index: linux-3.10-3.10.11/dummy/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1535_58dc7706bb9becb535e8861c7b8f33d604381710.txt 2014-04-28 00:41:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.patch 2014-04-28 00:41:33.000000000 +0000 @@ -0,0 +1,32 @@ +commit 0492665d67bb7bdff10f3027a26b9c145fe73ddb +Author: Takashi Iwai +Date: Wed Oct 30 08:35:02 2013 +0100 + + ASoC: wm_hubs: Add missing break in hp_supply_event() + + commit 268ff14525edba31da29a12a9dd693cdd6a7872e upstream. + + Spotted by coverity CID 115170. + + Signed-off-by: Takashi Iwai + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/codecs/wm_hubs.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/codecs/wm_hubs.c 2014-04-27 23:37:34.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/codecs/wm_hubs.c 2014-04-28 00:41:32.000000000 +0000 +@@ -530,6 +530,7 @@ + hubs->hp_startup_mode); + break; + } ++ break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, +Index: linux-3.10-3.10.11/dummy/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1536_0492665d67bb7bdff10f3027a26b9c145fe73ddb.txt 2014-04-28 00:41:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.patch 2014-04-28 00:41:33.000000000 +0000 @@ -0,0 +1,35 @@ +commit 2ca317899d45d60805b0b5dc9b6f879a8f93f7c6 +Author: Takashi Iwai +Date: Mon Oct 28 14:21:49 2013 +0100 + + ASoC: dapm: Fix source list debugfs outputs + + commit ff18620c2157671a8ee21ebb8e6a3520ea209b1f upstream. + + ... due to a copy & paste error. + + Spotted by coverity CID 710923. + + Signed-off-by: Takashi Iwai + Signed-off-by: Mark Brown + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/sound/soc/soc-dapm.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/soc/soc-dapm.c 2014-04-27 23:37:34.000000000 +0000 ++++ linux-3.10-3.10.11/sound/soc/soc-dapm.c 2014-04-28 00:41:33.000000000 +0000 +@@ -1797,7 +1797,7 @@ + w->active ? "active" : "inactive"); + + list_for_each_entry(p, &w->sources, list_sink) { +- if (p->connected && !p->connected(w, p->sink)) ++ if (p->connected && !p->connected(w, p->source)) + continue; + + if (p->connect) +Index: linux-3.10-3.10.11/dummy/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1537_2ca317899d45d60805b0b5dc9b6f879a8f93f7c6.txt 2014-04-28 00:41:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.patch --- linux-3.10.11/debian/patches/rpi/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.patch 2014-04-28 00:41:34.000000000 +0000 @@ -0,0 +1,36 @@ +commit a2f8eb6acf8b40793f3b798b0a63800f38707444 +Author: Dan Carpenter +Date: Tue Oct 29 22:07:47 2013 +0300 + + staging: ozwpan: prevent overflow in oz_cdev_write() + + commit c2c65cd2e14ada6de44cb527e7f1990bede24e15 upstream. + + We need to check "count" so we don't overflow the ei->data buffer. + + Reported-by: Nico Golde + Reported-by: Fabian Yamaguchi + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/ozwpan/ozcdev.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/ozwpan/ozcdev.c 2014-04-27 23:37:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/ozwpan/ozcdev.c 2014-04-28 00:41:34.000000000 +0000 +@@ -153,6 +153,9 @@ + struct oz_app_hdr *app_hdr; + struct oz_serial_ctx *ctx; + ++ if (count > sizeof(ei->data) - sizeof(*elt) - sizeof(*app_hdr)) ++ return -EINVAL; ++ + spin_lock_bh(&g_cdev.lock); + pd = g_cdev.active_pd; + if (pd) +Index: linux-3.10-3.10.11/dummy/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1538_a2f8eb6acf8b40793f3b798b0a63800f38707444.txt 2014-04-28 00:41:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.patch --- linux-3.10.11/debian/patches/rpi/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.patch 2014-04-28 00:41:35.000000000 +0000 @@ -0,0 +1,35 @@ +commit 421a5dcd03c36833cfe3923b6943e999c3770973 +Author: Dan Carpenter +Date: Tue Oct 29 23:01:11 2013 +0300 + + Staging: bcm: info leak in ioctl + + commit 8d1e72250c847fa96498ec029891de4dc638a5ba upstream. + + The DevInfo.u32Reserved[] array isn't initialized so it leaks kernel + information to user space. + + Reported-by: Nico Golde + Reported-by: Fabian Yamaguchi + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/bcm/Bcmchar.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/bcm/Bcmchar.c 2014-04-27 23:37:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/bcm/Bcmchar.c 2014-04-28 00:41:34.000000000 +0000 +@@ -1960,6 +1960,7 @@ + + BCM_DEBUG_PRINT(Adapter, DBG_TYPE_OTHERS, OSAL_DBG, DBG_LVL_ALL, "Called IOCTL_BCM_GET_DEVICE_DRIVER_INFO\n"); + ++ memset(&DevInfo, 0, sizeof(DevInfo)); + DevInfo.MaxRDMBufferSize = BUFFER_4K; + DevInfo.u32DSDStartOffset = EEPROM_CALPARAM_START; + DevInfo.u32RxAlignmentCorrection = 0; +Index: linux-3.10-3.10.11/dummy/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1539_421a5dcd03c36833cfe3923b6943e999c3770973.txt 2014-04-28 00:41:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.patch --- linux-3.10.11/debian/patches/rpi/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.patch 2014-04-28 00:41:36.000000000 +0000 @@ -0,0 +1,36 @@ +commit 2958a1199ee79b5ad4cb80a4bf8da95ac602d796 +Author: Dan Carpenter +Date: Tue Oct 29 23:01:43 2013 +0300 + + Staging: sb105x: info leak in mp_get_count() + + commit a8b33654b1e3b0c74d4a1fed041c9aae50b3c427 upstream. + + The icount.reserved[] array isn't initialized so it leaks stack + information to userspace. + + Reported-by: Nico Golde + Reported-by: Fabian Yamaguchi + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/sb105x/sb_pci_mp.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/sb105x/sb_pci_mp.c 2014-04-27 23:37:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/sb105x/sb_pci_mp.c 2014-04-28 00:41:35.000000000 +0000 +@@ -1063,7 +1063,7 @@ + + static int mp_get_count(struct sb_uart_state *state, struct serial_icounter_struct *icnt) + { +- struct serial_icounter_struct icount; ++ struct serial_icounter_struct icount = {}; + struct sb_uart_icount cnow; + struct sb_uart_port *port = state->port; + +Index: linux-3.10-3.10.11/dummy/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1540_2958a1199ee79b5ad4cb80a4bf8da95ac602d796.txt 2014-04-28 00:41:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.patch 2014-04-28 00:41:37.000000000 +0000 @@ -0,0 +1,67 @@ +commit e668dd8e47c2bc39c7bc31529dbe21c6169290bf +Author: Dan Carpenter +Date: Tue Oct 29 23:00:15 2013 +0300 + + staging: wlags49_h2: buffer overflow setting station name + + commit b5e2f339865fb443107e5b10603e53bbc92dc054 upstream. + + We need to check the length parameter before doing the memcpy(). I've + actually changed it to strlcpy() as well so that it's NUL terminated. + + You need CAP_NET_ADMIN to trigger these so it's not the end of the + world. + + Reported-by: Nico Golde + Reported-by: Fabian Yamaguchi + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/staging/wlags49_h2/wl_priv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/wlags49_h2/wl_priv.c 2014-04-27 23:37:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/wlags49_h2/wl_priv.c 2014-04-28 00:41:36.000000000 +0000 +@@ -570,6 +570,7 @@ + ltv_t *pLtv; + bool_t ltvAllocated = FALSE; + ENCSTRCT sEncryption; ++ size_t len; + + #ifdef USE_WDS + hcf_16 hcfPort = HCF_PORT_0; +@@ -686,7 +687,8 @@ + break; + case CFG_CNF_OWN_NAME: + memset(lp->StationName, 0, sizeof(lp->StationName)); +- memcpy((void *)lp->StationName, (void *)&pLtv->u.u8[2], (size_t)pLtv->u.u16[0]); ++ len = min_t(size_t, pLtv->u.u16[0], sizeof(lp->StationName)); ++ strlcpy(lp->StationName, &pLtv->u.u8[2], len); + pLtv->u.u16[0] = CNV_INT_TO_LITTLE(pLtv->u.u16[0]); + break; + case CFG_CNF_LOAD_BALANCING: +@@ -1783,6 +1785,7 @@ + { + struct wl_private *lp = wl_priv(dev); + unsigned long flags; ++ size_t len; + int ret = 0; + /*------------------------------------------------------------------------*/ + +@@ -1793,8 +1796,8 @@ + wl_lock(lp, &flags); + + memset(lp->StationName, 0, sizeof(lp->StationName)); +- +- memcpy(lp->StationName, extra, wrqu->data.length); ++ len = min_t(size_t, wrqu->data.length, sizeof(lp->StationName)); ++ strlcpy(lp->StationName, extra, len); + + /* Commit the adapter parameters */ + wl_apply(lp); +Index: linux-3.10-3.10.11/dummy/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1541_e668dd8e47c2bc39c7bc31529dbe21c6169290bf.txt 2014-04-28 00:41:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.patch 2014-04-28 00:41:38.000000000 +0000 @@ -0,0 +1,40 @@ +commit 079584656265347f310c75fac6f863a6280a17e4 +Author: Dan Carpenter +Date: Tue Oct 29 22:06:04 2013 +0300 + + uml: check length in exitcode_proc_write() + + commit 201f99f170df14ba52ea4c52847779042b7a623b upstream. + + We don't cap the size of buffer from the user so we could write past the + end of the array here. Only root can write to this file. + + Reported-by: Nico Golde + Reported-by: Fabian Yamaguchi + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/um/kernel/exitcode.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/um/kernel/exitcode.c 2014-04-27 23:37:32.000000000 +0000 ++++ linux-3.10-3.10.11/arch/um/kernel/exitcode.c 2014-04-28 00:41:37.000000000 +0000 +@@ -40,9 +40,11 @@ + const char __user *buffer, size_t count, loff_t *pos) + { + char *end, buf[sizeof("nnnnn\0")]; ++ size_t size; + int tmp; + +- if (copy_from_user(buf, buffer, count)) ++ size = min(count, sizeof(buf)); ++ if (copy_from_user(buf, buffer, size)) + return -EFAULT; + + tmp = simple_strtol(buf, &end, 0); +Index: linux-3.10-3.10.11/dummy/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1542_079584656265347f310c75fac6f863a6280a17e4.txt 2014-04-28 00:41:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.patch --- linux-3.10.11/debian/patches/rpi/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.patch 2014-04-28 00:41:38.000000000 +0000 @@ -0,0 +1,41 @@ +commit 54a702cb065e49976f61d2130c16f585bfba6c44 +Author: Baruch Siach +Date: Tue Oct 15 02:22:43 2013 +0400 + + xtensa: don't use alternate signal stack on threads + + commit cba9a90053e3b7973eff4f1946f33032e98eeed5 upstream. + + According to create_thread(3): "The new thread does not inherit the creating + thread's alternate signal stack". Since commit f9a3879a (Fix sigaltstack + corruption among cloned threads), current->sas_ss_size is set to 0 for cloned + processes sharing VM with their parent. Don't use the (nonexistent) alternate + signal stack in this case. This has been broken since commit 29c4dfd9 ([XTENSA] + Remove non-rt signal handling). + + Fixes the SA_ONSTACK part of the nptl/tst-cancel20 test from uClibc. + + Signed-off-by: Baruch Siach + Signed-off-by: Max Filippov + Signed-off-by: Chris Zankel + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/arch/xtensa/kernel/signal.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/xtensa/kernel/signal.c 2014-04-27 23:37:32.000000000 +0000 ++++ linux-3.10-3.10.11/arch/xtensa/kernel/signal.c 2014-04-28 00:41:38.000000000 +0000 +@@ -341,7 +341,7 @@ + + sp = regs->areg[1]; + +- if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && ! on_sig_stack(sp)) { ++ if ((ka->sa.sa_flags & SA_ONSTACK) != 0 && sas_ss_flags(sp) == 0) { + sp = current->sas_ss_sp + current->sas_ss_size; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1543_54a702cb065e49976f61d2130c16f585bfba6c44.txt 2014-04-28 00:41:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.patch 2014-04-28 00:41:39.000000000 +0000 @@ -0,0 +1,31 @@ +commit f80d1c35d87072b46bf47f323f8051c4a5073fb4 +Author: Uwe Kleine-König +Date: Wed Aug 7 13:02:52 2013 +0200 + + mm: make generic_access_phys available for modules + + commit 5a73633ef01cd8772defa6a3c34a588376a1df4c upstream. + + In the next commit this function will be used in the uio subsystem + + Signed-off-by: Uwe Kleine-König + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/memory.c 2014-04-27 23:37:32.000000000 +0000 ++++ linux-3.10-3.10.11/mm/memory.c 2014-04-28 00:41:39.000000000 +0000 +@@ -4074,6 +4074,7 @@ + + return len; + } ++EXPORT_SYMBOL_GPL(generic_access_phys); + #endif + + /* +Index: linux-3.10-3.10.11/dummy/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1544_f80d1c35d87072b46bf47f323f8051c4a5073fb4.txt 2014-04-28 00:41:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.patch --- linux-3.10.11/debian/patches/rpi/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.patch 2014-04-28 00:41:40.000000000 +0000 @@ -0,0 +1,79 @@ +commit 5fa25ee0bde3ad47e99e9877313a36a9ace95b72 +Author: Uwe Kleine-König +Date: Wed Aug 7 13:02:53 2013 +0200 + + uio: provide vm access to UIO_MEM_PHYS maps + + commit 7294151d0592e0ff48c61fca9fd7c93d613134da upstream. + + This makes it possible to let gdb access mappings of the process that is + being debugged. + + uio_mmap_logical was moved and uio_vm_ops renamed to group related code + and differentiate to new stuff. + + Signed-off-by: Uwe Kleine-König + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/uio/uio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/uio/uio.c 2014-04-27 23:37:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/uio/uio.c 2014-04-28 00:41:39.000000000 +0000 +@@ -630,12 +630,26 @@ + return 0; + } + +-static const struct vm_operations_struct uio_vm_ops = { ++static const struct vm_operations_struct uio_logical_vm_ops = { + .open = uio_vma_open, + .close = uio_vma_close, + .fault = uio_vma_fault, + }; + ++static int uio_mmap_logical(struct vm_area_struct *vma) ++{ ++ vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; ++ vma->vm_ops = &uio_logical_vm_ops; ++ uio_vma_open(vma); ++ return 0; ++} ++ ++static const struct vm_operations_struct uio_physical_vm_ops = { ++#ifdef CONFIG_HAVE_IOREMAP_PROT ++ .access = generic_access_phys, ++#endif ++}; ++ + static int uio_mmap_physical(struct vm_area_struct *vma) + { + struct uio_device *idev = vma->vm_private_data; +@@ -643,6 +657,8 @@ + if (mi < 0) + return -EINVAL; + ++ vma->vm_ops = &uio_physical_vm_ops; ++ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + return remap_pfn_range(vma, +@@ -652,14 +668,6 @@ + vma->vm_page_prot); + } + +-static int uio_mmap_logical(struct vm_area_struct *vma) +-{ +- vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP; +- vma->vm_ops = &uio_vm_ops; +- uio_vma_open(vma); +- return 0; +-} +- + static int uio_mmap(struct file *filep, struct vm_area_struct *vma) + { + struct uio_listener *listener = filep->private_data; +Index: linux-3.10-3.10.11/dummy/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1545_5fa25ee0bde3ad47e99e9877313a36a9ace95b72.txt 2014-04-28 00:41:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.patch 2014-04-28 00:41:41.000000000 +0000 @@ -0,0 +1,30 @@ +commit a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5 +Author: Al Viro +Date: Sat May 11 12:38:38 2013 -0400 + + au1100fb: VM_IO is set by io_remap_pfn_range() + + commit c607f450f6e49f5794f27617bedc638b51044d2e upstream. + + Signed-off-by: Al Viro + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/video/au1100fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/au1100fb.c 2014-04-27 23:37:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/au1100fb.c 2014-04-28 00:41:40.000000000 +0000 +@@ -385,8 +385,6 @@ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6 + +- vma->vm_flags |= VM_IO; +- + if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) { +Index: linux-3.10-3.10.11/dummy/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1546_a4c8ae2e72bdb85f6dfdfad82bec0df1e2749ac5.txt 2014-04-28 00:41:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.patch --- linux-3.10.11/debian/patches/rpi/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.patch 2014-04-28 00:41:42.000000000 +0000 @@ -0,0 +1,37 @@ +commit f1e65e494c7914220ac6d87caa126114f46ac462 +Author: Al Viro +Date: Sat May 11 12:37:38 2013 -0400 + + au1200fb: io_remap_pfn_range() sets VM_IO + + commit 1fca06fafb235a88c4fa91294aa1726c0e22855b upstream. + + ... and single return is quite sufficient to get out of function, TYVM + + Signed-off-by: Al Viro + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/video/au1200fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/au1200fb.c 2014-04-27 23:37:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/au1200fb.c 2014-04-28 00:41:41.000000000 +0000 +@@ -1258,13 +1258,9 @@ + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pgprot_val(vma->vm_page_prot) |= _CACHE_MASK; /* CCA=7 */ + +- vma->vm_flags |= VM_IO; +- + return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); +- +- return 0; + } + + static void set_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata) +Index: linux-3.10-3.10.11/dummy/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1547_f1e65e494c7914220ac6d87caa126114f46ac462.txt 2014-04-28 00:41:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.patch 2014-04-28 00:41:42.000000000 +0000 @@ -0,0 +1,143 @@ +commit c79c7ad9d1398787f907f85afc44cf7d6623027d +Author: Linus Torvalds +Date: Tue Oct 29 10:21:34 2013 -0700 + + Fix a few incorrectly checked [io_]remap_pfn_range() calls + + commit 7314e613d5ff9f0934f7a0f74ed7973b903315d1 upstream. + + Nico Golde reports a few straggling uses of [io_]remap_pfn_range() that + really should use the vm_iomap_memory() helper. This trivially converts + two of them to the helper, and comments about why the third one really + needs to continue to use remap_pfn_range(), and adds the missing size + check. + + Reported-by: Nico Golde + Signed-off-by: Linus Torvalds + +Index: linux-3.10-3.10.11/drivers/uio/uio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/uio/uio.c 2014-04-28 00:41:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/uio/uio.c 2014-04-28 00:41:42.000000000 +0000 +@@ -654,16 +654,29 @@ + { + struct uio_device *idev = vma->vm_private_data; + int mi = uio_find_mem_index(vma); ++ struct uio_mem *mem; + if (mi < 0) + return -EINVAL; ++ mem = idev->info->mem + mi; + +- vma->vm_ops = &uio_physical_vm_ops; ++ if (vma->vm_end - vma->vm_start > mem->size) ++ return -EINVAL; + ++ vma->vm_ops = &uio_physical_vm_ops; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + ++ /* ++ * We cannot use the vm_iomap_memory() helper here, ++ * because vma->vm_pgoff is the map index we looked ++ * up above in uio_find_mem_index(), rather than an ++ * actual page offset into the mmap. ++ * ++ * So we just do the physical mmap without a page ++ * offset. ++ */ + return remap_pfn_range(vma, + vma->vm_start, +- idev->info->mem[mi].addr >> PAGE_SHIFT, ++ mem->addr >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot); + } +Index: linux-3.10-3.10.11/drivers/video/au1100fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/au1100fb.c 2014-04-28 00:41:40.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/au1100fb.c 2014-04-28 00:41:42.000000000 +0000 +@@ -361,37 +361,13 @@ + int au1100fb_fb_mmap(struct fb_info *fbi, struct vm_area_struct *vma) + { + struct au1100fb_device *fbdev; +- unsigned int len; +- unsigned long start=0, off; + + fbdev = to_au1100fb_device(fbi); + +- if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) { +- return -EINVAL; +- } +- +- start = fbdev->fb_phys & PAGE_MASK; +- len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len); +- +- off = vma->vm_pgoff << PAGE_SHIFT; +- +- if ((vma->vm_end - vma->vm_start + off) > len) { +- return -EINVAL; +- } +- +- off += start; +- vma->vm_pgoff = off >> PAGE_SHIFT; +- + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pgprot_val(vma->vm_page_prot) |= (6 << 9); //CCA=6 + +- if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, +- vma->vm_end - vma->vm_start, +- vma->vm_page_prot)) { +- return -EAGAIN; +- } +- +- return 0; ++ return vm_iomap_memory(vma, fbdev->fb_phys, fbdev->fb_len); + } + + static struct fb_ops au1100fb_ops = +Index: linux-3.10-3.10.11/drivers/video/au1200fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/au1200fb.c 2014-04-28 00:41:41.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/au1200fb.c 2014-04-28 00:41:42.000000000 +0000 +@@ -1233,34 +1233,13 @@ + * method mainly to allow the use of the TLB streaming flag (CCA=6) + */ + static int au1200fb_fb_mmap(struct fb_info *info, struct vm_area_struct *vma) +- + { +- unsigned int len; +- unsigned long start=0, off; + struct au1200fb_device *fbdev = info->par; + +- if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT)) { +- return -EINVAL; +- } +- +- start = fbdev->fb_phys & PAGE_MASK; +- len = PAGE_ALIGN((start & ~PAGE_MASK) + fbdev->fb_len); +- +- off = vma->vm_pgoff << PAGE_SHIFT; +- +- if ((vma->vm_end - vma->vm_start + off) > len) { +- return -EINVAL; +- } +- +- off += start; +- vma->vm_pgoff = off >> PAGE_SHIFT; +- + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + pgprot_val(vma->vm_page_prot) |= _CACHE_MASK; /* CCA=7 */ + +- return io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, +- vma->vm_end - vma->vm_start, +- vma->vm_page_prot); ++ return vm_iomap_memory(vma, fbdev->fb_phys, fbdev->fb_len); + } + + static void set_global(u_int cmd, struct au1200_lcd_global_regs_t *pdata) +Index: linux-3.10-3.10.11/dummy/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1548_c79c7ad9d1398787f907f85afc44cf7d6623027d.txt 2014-04-28 00:41:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.patch 2014-04-28 00:41:43.000000000 +0000 @@ -0,0 +1,65 @@ +commit e14594cd658f655ae3384fcc3ec8c345b36cd4d0 +Author: Ming Lei +Date: Thu Oct 31 16:34:17 2013 -0700 + + lib/scatterlist.c: don't flush_kernel_dcache_page on slab page + + commit 3d77b50c5874b7e923be946ba793644f82336b75 upstream. + + Commit b1adaf65ba03 ("[SCSI] block: add sg buffer copy helper + functions") introduces two sg buffer copy helpers, and calls + flush_kernel_dcache_page() on pages in SG list after these pages are + written to. + + Unfortunately, the commit may introduce a potential bug: + + - Before sending some SCSI commands, kmalloc() buffer may be passed to + block layper, so flush_kernel_dcache_page() can see a slab page + finally + + - According to cachetlb.txt, flush_kernel_dcache_page() is only called + on "a user page", which surely can't be a slab page. + + - ARCH's implementation of flush_kernel_dcache_page() may use page + mapping information to do optimization so page_mapping() will see the + slab page, then VM_BUG_ON() is triggered. + + Aaro Koskinen reported the bug on ARM/kirkwood when DEBUG_VM is enabled, + and this patch fixes the bug by adding test of '!PageSlab(miter->page)' + before calling flush_kernel_dcache_page(). + + Signed-off-by: Ming Lei + Reported-by: Aaro Koskinen + Tested-by: Simon Baatz + Cc: Russell King - ARM Linux + Cc: Will Deacon + Cc: Aaro Koskinen + Acked-by: Catalin Marinas + Cc: FUJITA Tomonori + Cc: Tejun Heo + Cc: "James E.J. Bottomley" + Cc: Jens Axboe + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/lib/scatterlist.c +=================================================================== +--- linux-3.10-3.10.11.orig/lib/scatterlist.c 2014-04-27 23:37:30.000000000 +0000 ++++ linux-3.10-3.10.11/lib/scatterlist.c 2014-04-28 00:41:43.000000000 +0000 +@@ -529,7 +529,8 @@ + miter->__offset += miter->consumed; + miter->__remaining -= miter->consumed; + +- if (miter->__flags & SG_MITER_TO_SG) ++ if ((miter->__flags & SG_MITER_TO_SG) && ++ !PageSlab(miter->page)) + flush_kernel_dcache_page(miter->page); + + if (miter->__flags & SG_MITER_ATOMIC) { +Index: linux-3.10-3.10.11/dummy/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1549_e14594cd658f655ae3384fcc3ec8c345b36cd4d0.txt 2014-04-28 00:41:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.patch --- linux-3.10.11/debian/patches/rpi/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.patch 2014-04-28 00:41:44.000000000 +0000 @@ -0,0 +1,35 @@ +commit a33ed3974e7b75af36553589e7810da9d8b22382 +Author: Dan Carpenter +Date: Tue Oct 29 22:11:06 2013 +0300 + + aacraid: missing capable() check in compat ioctl + + commit f856567b930dfcdbc3323261bf77240ccdde01f5 upstream. + + In commit d496f94d22d1 ('[SCSI] aacraid: fix security weakness') we + added a check on CAP_SYS_RAWIO to the ioctl. The compat ioctls need the + check as well. + + Signed-off-by: Dan Carpenter + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/scsi/aacraid/linit.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/scsi/aacraid/linit.c 2014-04-27 23:37:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/scsi/aacraid/linit.c 2014-04-28 00:41:44.000000000 +0000 +@@ -771,6 +771,8 @@ + static int aac_compat_ioctl(struct scsi_device *sdev, int cmd, void __user *arg) + { + struct aac_dev *dev = (struct aac_dev *)sdev->host->hostdata; ++ if (!capable(CAP_SYS_RAWIO)) ++ return -EPERM; + return aac_compat_do_ioctl(dev, cmd, (unsigned long)arg); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1550_a33ed3974e7b75af36553589e7810da9d8b22382.txt 2014-04-28 00:41:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.patch 2014-04-28 00:41:45.000000000 +0000 @@ -0,0 +1,39 @@ +commit 165b4f8bf37ba929924e9099bd9a1ee5031cf4e7 +Author: Jonathan Austin +Date: Tue Jul 23 16:42:18 2013 +0100 + + clk: fixup argument order when setting VCO parameters + + commit 2f9f64bc5aa31836810cd25301aa4772ad73ebab upstream. + + The order of arguments in the call to vco_set() for the ICST clocks appears to + have been switched in error, which results in the VCO not being initialised + correctly. This in turn stops the integrated LCD on things like Integrator/CP + from working correctly. + + This patch fixes the order and restores the expected functionality. + + Reviewed-by: Linus Walleij + Signed-off-by: Jonathan Austin + Signed-off-by: Mike Turquette + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/clk/versatile/clk-icst.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/clk/versatile/clk-icst.c 2014-04-27 23:37:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/clk/versatile/clk-icst.c 2014-04-28 00:41:44.000000000 +0000 +@@ -107,7 +107,7 @@ + + vco = icst_hz_to_vco(icst->params, rate); + icst->rate = icst_hz(icst->params, vco); +- vco_set(icst->vcoreg, icst->lockreg, vco); ++ vco_set(icst->lockreg, icst->vcoreg, vco); + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1551_165b4f8bf37ba929924e9099bd9a1ee5031cf4e7.txt 2014-04-28 00:41:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.patch --- linux-3.10.11/debian/patches/rpi/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.patch 2014-04-28 00:41:46.000000000 +0000 @@ -0,0 +1,44 @@ +commit 699ba929e88a0c2b172e7beebf10fd37ef120142 +Author: Mel Gorman +Date: Mon Oct 7 11:28:42 2013 +0100 + + mm: numa: Do not account for a hinting fault if we raced + + commit 1dd49bfa3465756b3ce72214b58a33e4afb67aa3 upstream. + + If another task handled a hinting fault in parallel then do not double + account for it. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-5-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:40:52.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:41:45.000000000 +0000 +@@ -1335,8 +1335,11 @@ + + check_same: + spin_lock(&mm->page_table_lock); +- if (unlikely(!pmd_same(pmd, *pmdp))) ++ if (unlikely(!pmd_same(pmd, *pmdp))) { ++ /* Someone else took our fault */ ++ current_nid = -1; + goto out_unlock; ++ } + clear_pmdnuma: + pmd = pmd_mknonnuma(pmd); + set_pmd_at(mm, haddr, pmdp, pmd); +Index: linux-3.10-3.10.11/dummy/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1552_699ba929e88a0c2b172e7beebf10fd37ef120142.txt 2014-04-28 00:41:45.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.patch --- linux-3.10.11/debian/patches/rpi/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.patch 2014-04-28 00:41:46.000000000 +0000 @@ -0,0 +1,84 @@ +commit 2e39395e03fe936171a8b45894cbf75ccfae0375 +Author: Mel Gorman +Date: Mon Oct 7 11:28:43 2013 +0100 + + mm: Wait for THP migrations to complete during NUMA hinting faults + + commit 42836f5f8baa33085f547098b74aa98991ee9216 upstream. + + The locking for migrating THP is unusual. While normal page migration + prevents parallel accesses using a migration PTE, THP migration relies on + a combination of the page_table_lock, the page lock and the existance of + the NUMA hinting PTE to guarantee safety but there is a bug in the scheme. + + If a THP page is currently being migrated and another thread traps a + fault on the same page it checks if the page is misplaced. If it is not, + then pmd_numa is cleared. The problem is that it checks if the page is + misplaced without holding the page lock meaning that the racing thread + can be migrating the THP when the second thread clears the NUMA bit + and faults a stale page. + + This patch checks if the page is potentially being migrated and stalls + using the lock_page if it is potentially being migrated before checking + if the page is misplaced or not. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-6-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:41:45.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:41:46.000000000 +0000 +@@ -1305,13 +1305,14 @@ + if (current_nid == numa_node_id()) + count_vm_numa_event(NUMA_HINT_FAULTS_LOCAL); + +- target_nid = mpol_misplaced(page, vma, haddr); +- if (target_nid == -1) { +- put_page(page); +- goto clear_pmdnuma; +- } ++ /* ++ * Acquire the page lock to serialise THP migrations but avoid dropping ++ * page_table_lock if at all possible ++ */ ++ if (trylock_page(page)) ++ goto got_lock; + +- /* Acquire the page lock to serialise THP migrations */ ++ /* Serialise against migrationa and check placement check placement */ + spin_unlock(&mm->page_table_lock); + lock_page(page); + +@@ -1322,9 +1323,17 @@ + put_page(page); + goto out_unlock; + } +- spin_unlock(&mm->page_table_lock); ++ ++got_lock: ++ target_nid = mpol_misplaced(page, vma, haddr); ++ if (target_nid == -1) { ++ unlock_page(page); ++ put_page(page); ++ goto clear_pmdnuma; ++ } + + /* Migrate the THP to the requested node */ ++ spin_unlock(&mm->page_table_lock); + migrated = migrate_misplaced_transhuge_page(mm, vma, + pmdp, pmd, addr, page, target_nid); + if (!migrated) +Index: linux-3.10-3.10.11/dummy/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1553_2e39395e03fe936171a8b45894cbf75ccfae0375.txt 2014-04-28 00:41:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.patch 2014-04-28 00:41:47.000000000 +0000 @@ -0,0 +1,125 @@ +commit 299723f2297726ca4c0a9d8ef3548ece5466431d +Author: Mel Gorman +Date: Mon Oct 7 11:28:44 2013 +0100 + + mm: Prevent parallel splits during THP migration + + commit 587fe586f44a48f9691001ba6c45b86c8e4ba21f upstream. + + THP migrations are serialised by the page lock but on its own that does + not prevent THP splits. If the page is split during THP migration then + the pmd_same checks will prevent page table corruption but the unlock page + and other fix-ups potentially will cause corruption. This patch takes the + anon_vma lock to prevent parallel splits during migration. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-7-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:41:46.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:41:46.000000000 +0000 +@@ -1288,18 +1288,18 @@ + int do_huge_pmd_numa_page(struct mm_struct *mm, struct vm_area_struct *vma, + unsigned long addr, pmd_t pmd, pmd_t *pmdp) + { ++ struct anon_vma *anon_vma = NULL; + struct page *page; + unsigned long haddr = addr & HPAGE_PMD_MASK; + int target_nid; + int current_nid = -1; +- bool migrated; ++ bool migrated, page_locked; + + spin_lock(&mm->page_table_lock); + if (unlikely(!pmd_same(pmd, *pmdp))) + goto out_unlock; + + page = pmd_page(pmd); +- get_page(page); + current_nid = page_to_nid(page); + count_vm_numa_event(NUMA_HINT_FAULTS); + if (current_nid == numa_node_id()) +@@ -1309,12 +1309,29 @@ + * Acquire the page lock to serialise THP migrations but avoid dropping + * page_table_lock if at all possible + */ +- if (trylock_page(page)) +- goto got_lock; ++ page_locked = trylock_page(page); ++ target_nid = mpol_misplaced(page, vma, haddr); ++ if (target_nid == -1) { ++ /* If the page was locked, there are no parallel migrations */ ++ if (page_locked) { ++ unlock_page(page); ++ goto clear_pmdnuma; ++ } ++ ++ /* Otherwise wait for potential migrations and retry fault */ ++ spin_unlock(&mm->page_table_lock); ++ wait_on_page_locked(page); ++ goto out; ++ } + +- /* Serialise against migrationa and check placement check placement */ ++ /* Page is misplaced, serialise migrations and parallel THP splits */ ++ get_page(page); + spin_unlock(&mm->page_table_lock); +- lock_page(page); ++ if (!page_locked) { ++ lock_page(page); ++ page_locked = true; ++ } ++ anon_vma = page_lock_anon_vma_read(page); + + /* Confirm the PTE did not while locked */ + spin_lock(&mm->page_table_lock); +@@ -1324,14 +1341,6 @@ + goto out_unlock; + } + +-got_lock: +- target_nid = mpol_misplaced(page, vma, haddr); +- if (target_nid == -1) { +- unlock_page(page); +- put_page(page); +- goto clear_pmdnuma; +- } +- + /* Migrate the THP to the requested node */ + spin_unlock(&mm->page_table_lock); + migrated = migrate_misplaced_transhuge_page(mm, vma, +@@ -1340,6 +1349,8 @@ + goto check_same; + + task_numa_fault(target_nid, HPAGE_PMD_NR, true); ++ if (anon_vma) ++ page_unlock_anon_vma_read(anon_vma); + return 0; + + check_same: +@@ -1356,6 +1367,11 @@ + update_mmu_cache_pmd(vma, addr, pmdp); + out_unlock: + spin_unlock(&mm->page_table_lock); ++ ++out: ++ if (anon_vma) ++ page_unlock_anon_vma_read(anon_vma); ++ + if (current_nid != -1) + task_numa_fault(current_nid, HPAGE_PMD_NR, false); + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1554_299723f2297726ca4c0a9d8ef3548ece5466431d.txt 2014-04-28 00:41:46.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.patch 2014-04-28 00:41:48.000000000 +0000 @@ -0,0 +1,234 @@ +commit 174dfa40d63b2250e299d5376937d200e4662b7c +Author: Mel Gorman +Date: Mon Oct 7 11:28:45 2013 +0100 + + mm: numa: Sanitize task_numa_fault() callsites + + commit c61109e34f60f6e85bb43c5a1cd51c0e3db40847 upstream. + + There are three callers of task_numa_fault(): + + - do_huge_pmd_numa_page(): + Accounts against the current node, not the node where the + page resides, unless we migrated, in which case it accounts + against the node we migrated to. + + - do_numa_page(): + Accounts against the current node, not the node where the + page resides, unless we migrated, in which case it accounts + against the node we migrated to. + + - do_pmd_numa_page(): + Accounts not at all when the page isn't migrated, otherwise + accounts against the node we migrated towards. + + This seems wrong to me; all three sites should have the same + sementaics, furthermore we should accounts against where the page + really is, we already know where the task is. + + So modify all three sites to always account; we did after all receive + the fault; and always account to where the page is after migration, + regardless of success. + + They all still differ on when they clear the PTE/PMD; ideally that + would get sorted too. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-8-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:41:46.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:41:47.000000000 +0000 +@@ -1291,18 +1291,19 @@ + struct anon_vma *anon_vma = NULL; + struct page *page; + unsigned long haddr = addr & HPAGE_PMD_MASK; ++ int page_nid = -1, this_nid = numa_node_id(); + int target_nid; +- int current_nid = -1; +- bool migrated, page_locked; ++ bool page_locked; ++ bool migrated = false; + + spin_lock(&mm->page_table_lock); + if (unlikely(!pmd_same(pmd, *pmdp))) + goto out_unlock; + + page = pmd_page(pmd); +- current_nid = page_to_nid(page); ++ page_nid = page_to_nid(page); + count_vm_numa_event(NUMA_HINT_FAULTS); +- if (current_nid == numa_node_id()) ++ if (page_nid == this_nid) + count_vm_numa_event(NUMA_HINT_FAULTS_LOCAL); + + /* +@@ -1345,19 +1346,18 @@ + spin_unlock(&mm->page_table_lock); + migrated = migrate_misplaced_transhuge_page(mm, vma, + pmdp, pmd, addr, page, target_nid); +- if (!migrated) ++ if (migrated) ++ page_nid = target_nid; ++ else + goto check_same; + +- task_numa_fault(target_nid, HPAGE_PMD_NR, true); +- if (anon_vma) +- page_unlock_anon_vma_read(anon_vma); +- return 0; ++ goto out; + + check_same: + spin_lock(&mm->page_table_lock); + if (unlikely(!pmd_same(pmd, *pmdp))) { + /* Someone else took our fault */ +- current_nid = -1; ++ page_nid = -1; + goto out_unlock; + } + clear_pmdnuma: +@@ -1372,8 +1372,9 @@ + if (anon_vma) + page_unlock_anon_vma_read(anon_vma); + +- if (current_nid != -1) +- task_numa_fault(current_nid, HPAGE_PMD_NR, false); ++ if (page_nid != -1) ++ task_numa_fault(page_nid, HPAGE_PMD_NR, migrated); ++ + return 0; + } + +Index: linux-3.10-3.10.11/mm/memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/memory.c 2014-04-28 00:41:39.000000000 +0000 ++++ linux-3.10-3.10.11/mm/memory.c 2014-04-28 00:41:47.000000000 +0000 +@@ -3525,12 +3525,12 @@ + } + + int numa_migrate_prep(struct page *page, struct vm_area_struct *vma, +- unsigned long addr, int current_nid) ++ unsigned long addr, int page_nid) + { + get_page(page); + + count_vm_numa_event(NUMA_HINT_FAULTS); +- if (current_nid == numa_node_id()) ++ if (page_nid == numa_node_id()) + count_vm_numa_event(NUMA_HINT_FAULTS_LOCAL); + + return mpol_misplaced(page, vma, addr); +@@ -3541,7 +3541,7 @@ + { + struct page *page = NULL; + spinlock_t *ptl; +- int current_nid = -1; ++ int page_nid = -1; + int target_nid; + bool migrated = false; + +@@ -3571,15 +3571,10 @@ + return 0; + } + +- current_nid = page_to_nid(page); +- target_nid = numa_migrate_prep(page, vma, addr, current_nid); ++ page_nid = page_to_nid(page); ++ target_nid = numa_migrate_prep(page, vma, addr, page_nid); + pte_unmap_unlock(ptep, ptl); + if (target_nid == -1) { +- /* +- * Account for the fault against the current node if it not +- * being replaced regardless of where the page is located. +- */ +- current_nid = numa_node_id(); + put_page(page); + goto out; + } +@@ -3587,11 +3582,11 @@ + /* Migrate to the requested node */ + migrated = migrate_misplaced_page(page, target_nid); + if (migrated) +- current_nid = target_nid; ++ page_nid = target_nid; + + out: +- if (current_nid != -1) +- task_numa_fault(current_nid, 1, migrated); ++ if (page_nid != -1) ++ task_numa_fault(page_nid, 1, migrated); + return 0; + } + +@@ -3606,7 +3601,6 @@ + unsigned long offset; + spinlock_t *ptl; + bool numa = false; +- int local_nid = numa_node_id(); + + spin_lock(&mm->page_table_lock); + pmd = *pmdp; +@@ -3629,9 +3623,10 @@ + for (addr = _addr + offset; addr < _addr + PMD_SIZE; pte++, addr += PAGE_SIZE) { + pte_t pteval = *pte; + struct page *page; +- int curr_nid = local_nid; ++ int page_nid = -1; + int target_nid; +- bool migrated; ++ bool migrated = false; ++ + if (!pte_present(pteval)) + continue; + if (!pte_numa(pteval)) +@@ -3653,25 +3648,19 @@ + if (unlikely(page_mapcount(page) != 1)) + continue; + +- /* +- * Note that the NUMA fault is later accounted to either +- * the node that is currently running or where the page is +- * migrated to. +- */ +- curr_nid = local_nid; +- target_nid = numa_migrate_prep(page, vma, addr, +- page_to_nid(page)); +- if (target_nid == -1) { ++ page_nid = page_to_nid(page); ++ target_nid = numa_migrate_prep(page, vma, addr, page_nid); ++ pte_unmap_unlock(pte, ptl); ++ if (target_nid != -1) { ++ migrated = migrate_misplaced_page(page, target_nid); ++ if (migrated) ++ page_nid = target_nid; ++ } else { + put_page(page); +- continue; + } + +- /* Migrate to the requested node */ +- pte_unmap_unlock(pte, ptl); +- migrated = migrate_misplaced_page(page, target_nid); +- if (migrated) +- curr_nid = target_nid; +- task_numa_fault(curr_nid, 1, migrated); ++ if (page_nid != -1) ++ task_numa_fault(page_nid, 1, migrated); + + pte = pte_offset_map_lock(mm, pmdp, addr, &ptl); + } +Index: linux-3.10-3.10.11/dummy/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1555_174dfa40d63b2250e299d5376937d200e4662b7c.txt 2014-04-28 00:41:47.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.patch 2014-04-28 00:41:49.000000000 +0000 @@ -0,0 +1,177 @@ +commit a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0 +Author: Mel Gorman +Date: Mon Oct 7 11:28:46 2013 +0100 + + mm: Close races between THP migration and PMD numa clearing + + commit 3f926ab945b60a5824369d21add7710622a2eac0 upstream. + + THP migration uses the page lock to guard against parallel allocations + but there are cases like this still open + + Task A Task B + --------------------- --------------------- + do_huge_pmd_numa_page do_huge_pmd_numa_page + lock_page + mpol_misplaced == -1 + unlock_page + goto clear_pmdnuma + lock_page + mpol_misplaced == 2 + migrate_misplaced_transhuge + pmd = pmd_mknonnuma + set_pmd_at + + During hours of testing, one crashed with weird errors and while I have + no direct evidence, I suspect something like the race above happened. + This patch extends the page lock to being held until the pmd_numa is + cleared to prevent migration starting in parallel while the pmd_numa is + being cleared. It also flushes the old pmd entry and orders pagetable + insertion before rmap insertion. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-9-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/huge_memory.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/huge_memory.c 2014-04-28 00:41:47.000000000 +0000 ++++ linux-3.10-3.10.11/mm/huge_memory.c 2014-04-28 00:41:48.000000000 +0000 +@@ -1314,24 +1314,25 @@ + target_nid = mpol_misplaced(page, vma, haddr); + if (target_nid == -1) { + /* If the page was locked, there are no parallel migrations */ +- if (page_locked) { +- unlock_page(page); ++ if (page_locked) + goto clear_pmdnuma; +- } + +- /* Otherwise wait for potential migrations and retry fault */ ++ /* ++ * Otherwise wait for potential migrations and retry. We do ++ * relock and check_same as the page may no longer be mapped. ++ * As the fault is being retried, do not account for it. ++ */ + spin_unlock(&mm->page_table_lock); + wait_on_page_locked(page); ++ page_nid = -1; + goto out; + } + + /* Page is misplaced, serialise migrations and parallel THP splits */ + get_page(page); + spin_unlock(&mm->page_table_lock); +- if (!page_locked) { ++ if (!page_locked) + lock_page(page); +- page_locked = true; +- } + anon_vma = page_lock_anon_vma_read(page); + + /* Confirm the PTE did not while locked */ +@@ -1339,32 +1340,28 @@ + if (unlikely(!pmd_same(pmd, *pmdp))) { + unlock_page(page); + put_page(page); ++ page_nid = -1; + goto out_unlock; + } + +- /* Migrate the THP to the requested node */ ++ /* ++ * Migrate the THP to the requested node, returns with page unlocked ++ * and pmd_numa cleared. ++ */ + spin_unlock(&mm->page_table_lock); + migrated = migrate_misplaced_transhuge_page(mm, vma, + pmdp, pmd, addr, page, target_nid); + if (migrated) + page_nid = target_nid; +- else +- goto check_same; + + goto out; +- +-check_same: +- spin_lock(&mm->page_table_lock); +- if (unlikely(!pmd_same(pmd, *pmdp))) { +- /* Someone else took our fault */ +- page_nid = -1; +- goto out_unlock; +- } + clear_pmdnuma: ++ BUG_ON(!PageLocked(page)); + pmd = pmd_mknonnuma(pmd); + set_pmd_at(mm, haddr, pmdp, pmd); + VM_BUG_ON(pmd_numa(*pmdp)); + update_mmu_cache_pmd(vma, addr, pmdp); ++ unlock_page(page); + out_unlock: + spin_unlock(&mm->page_table_lock); + +Index: linux-3.10-3.10.11/mm/migrate.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/migrate.c 2014-04-28 00:38:58.000000000 +0000 ++++ linux-3.10-3.10.11/mm/migrate.c 2014-04-28 00:41:48.000000000 +0000 +@@ -1710,12 +1710,12 @@ + unlock_page(new_page); + put_page(new_page); /* Free it */ + +- unlock_page(page); ++ /* Retake the callers reference and putback on LRU */ ++ get_page(page); + putback_lru_page(page); +- +- count_vm_events(PGMIGRATE_FAIL, HPAGE_PMD_NR); +- isolated = 0; +- goto out; ++ mod_zone_page_state(page_zone(page), ++ NR_ISOLATED_ANON + page_lru, -HPAGE_PMD_NR); ++ goto out_fail; + } + + /* +@@ -1732,9 +1732,9 @@ + entry = maybe_pmd_mkwrite(pmd_mkdirty(entry), vma); + entry = pmd_mkhuge(entry); + +- page_add_new_anon_rmap(new_page, vma, haddr); +- ++ pmdp_clear_flush(vma, haddr, pmd); + set_pmd_at(mm, haddr, pmd, entry); ++ page_add_new_anon_rmap(new_page, vma, haddr); + update_mmu_cache_pmd(vma, address, &entry); + page_remove_rmap(page); + /* +@@ -1753,7 +1753,6 @@ + count_vm_events(PGMIGRATE_SUCCESS, HPAGE_PMD_NR); + count_vm_numa_events(NUMA_PAGE_MIGRATE, HPAGE_PMD_NR); + +-out: + mod_zone_page_state(page_zone(page), + NR_ISOLATED_ANON + page_lru, + -HPAGE_PMD_NR); +@@ -1762,6 +1761,10 @@ + out_fail: + count_vm_events(PGMIGRATE_FAIL, HPAGE_PMD_NR); + out_dropref: ++ entry = pmd_mknonnuma(entry); ++ set_pmd_at(mm, haddr, pmd, entry); ++ update_mmu_cache_pmd(vma, address, &entry); ++ + unlock_page(page); + put_page(page); + return 0; +Index: linux-3.10-3.10.11/dummy/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1556_a490bb33b51d0fc625c87ed5fff1edfd3a2afeb0.txt 2014-04-28 00:41:48.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.patch --- linux-3.10.11/debian/patches/rpi/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.patch 2014-04-28 00:41:50.000000000 +0000 @@ -0,0 +1,42 @@ +commit e86100b54cd487c13956f09f2c38955f1a1a0909 +Author: Mel Gorman +Date: Mon Oct 7 11:28:47 2013 +0100 + + mm: Account for a THP NUMA hinting update as one PTE update + + commit 0255d491848032f6c601b6410c3b8ebded3a37b1 upstream. + + A THP PMD update is accounted for as 512 pages updated in vmstat. This is + large difference when estimating the cost of automatic NUMA balancing and + can be misleading when comparing results that had collapsed versus split + THP. This patch addresses the accounting issue. + + Signed-off-by: Mel Gorman + Reviewed-by: Rik van Riel + Cc: Andrea Arcangeli + Cc: Johannes Weiner + Cc: Srikar Dronamraju + Signed-off-by: Peter Zijlstra + Link: http://lkml.kernel.org/r/1381141781-10992-10-git-send-email-mgorman@suse.de + Signed-off-by: Ingo Molnar + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/mprotect.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/mprotect.c 2014-04-27 23:37:28.000000000 +0000 ++++ linux-3.10-3.10.11/mm/mprotect.c 2014-04-28 00:41:49.000000000 +0000 +@@ -145,7 +145,7 @@ + split_huge_page_pmd(vma, addr, pmd); + else if (change_huge_pmd(vma, pmd, addr, newprot, + prot_numa)) { +- pages += HPAGE_PMD_NR; ++ pages++; + continue; + } + /* fall through */ +Index: linux-3.10-3.10.11/dummy/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1557_e86100b54cd487c13956f09f2c38955f1a1a0909.txt 2014-04-28 00:41:49.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.patch 2014-04-28 00:41:50.000000000 +0000 @@ -0,0 +1,56 @@ +commit 18b683a2334848c003fe89e3002244ca298544f4 +Author: Chen LinX +Date: Wed Oct 30 13:56:18 2013 -0700 + + mm/pagewalk.c: fix walk_page_range() access of wrong PTEs + + commit 3017f079efd6af199b0852b5c425364513db460e upstream. + + When walk_page_range walk a memory map's page tables, it'll skip + VM_PFNMAP area, then variable 'next' will to assign to vma->vm_end, it + maybe larger than 'end'. In next loop, 'addr' will be larger than + 'next'. Then in /proc/XXXX/pagemap file reading procedure, the 'addr' + will growing forever in pagemap_pte_range, pte_to_pagemap_entry will + access the wrong pte. + + BUG: Bad page map in process procrank pte:8437526f pmd:785de067 + addr:9108d000 vm_flags:00200073 anon_vma:f0d99020 mapping: (null) index:9108d + CPU: 1 PID: 4974 Comm: procrank Tainted: G B W O 3.10.1+ #1 + Call Trace: + dump_stack+0x16/0x18 + print_bad_pte+0x114/0x1b0 + vm_normal_page+0x56/0x60 + pagemap_pte_range+0x17a/0x1d0 + walk_page_range+0x19e/0x2c0 + pagemap_read+0x16e/0x200 + vfs_read+0x84/0x150 + SyS_read+0x4a/0x80 + syscall_call+0x7/0xb + + Signed-off-by: Liu ShuoX + Signed-off-by: Chen LinX + Acked-by: Kirill A. Shutemov + Reviewed-by: Naoya Horiguchi + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/pagewalk.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/pagewalk.c 2014-04-27 23:37:27.000000000 +0000 ++++ linux-3.10-3.10.11/mm/pagewalk.c 2014-04-28 00:41:50.000000000 +0000 +@@ -242,7 +242,7 @@ + if (err) + break; + pgd++; +- } while (addr = next, addr != end); ++ } while (addr = next, addr < end); + + return err; + } +Index: linux-3.10-3.10.11/dummy/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1558_18b683a2334848c003fe89e3002244ca298544f4.txt 2014-04-28 00:41:50.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.patch --- linux-3.10.11/debian/patches/rpi/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.patch 2014-04-28 00:41:51.000000000 +0000 @@ -0,0 +1,68 @@ +commit 7bff7accd427da171501b558457ef8fa81ee2767 +Author: Zhang Yanfei +Date: Mon Jul 8 16:00:19 2013 -0700 + + mm/vmalloc.c: fix an overflow bug in alloc_vmap_area() + + commit bcb615a81b1765864c71c50afb56631e7a1e5283 upstream. + + When searching a vmap area in the vmalloc space, we use (addr + size - + 1) to check if the value is less than addr, which is an overflow. But + we assign (addr + size) to vmap_area->va_end. + + So if we come across the below case: + + (addr + size - 1) : not overflow + (addr + size) : overflow + + we will assign an overflow value (e.g 0) to vmap_area->va_end, And this + will trigger BUG in __insert_vmap_area, causing system panic. + + So using (addr + size) to check the overflow should be the correct + behaviour, not (addr + size - 1). + + Signed-off-by: Zhang Yanfei + Reported-by: Ghennadi Procopciuc + Tested-by: Daniel Baluta + Cc: David Rientjes + Cc: Minchan Kim + Cc: KOSAKI Motohiro + Signed-off-by: Andrew Morton + Signed-off-by: Linus Torvalds + Cc: Anatoly Muliarski + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/mm/vmalloc.c +=================================================================== +--- linux-3.10-3.10.11.orig/mm/vmalloc.c 2014-04-27 23:37:27.000000000 +0000 ++++ linux-3.10-3.10.11/mm/vmalloc.c 2014-04-28 00:41:51.000000000 +0000 +@@ -388,12 +388,12 @@ + addr = ALIGN(first->va_end, align); + if (addr < vstart) + goto nocache; +- if (addr + size - 1 < addr) ++ if (addr + size < addr) + goto overflow; + + } else { + addr = ALIGN(vstart, align); +- if (addr + size - 1 < addr) ++ if (addr + size < addr) + goto overflow; + + n = vmap_area_root.rb_node; +@@ -420,7 +420,7 @@ + if (addr + cached_hole_size < first->va_start) + cached_hole_size = first->va_start - addr; + addr = ALIGN(first->va_end, align); +- if (addr + size - 1 < addr) ++ if (addr + size < addr) + goto overflow; + + if (list_is_last(&first->list, &vmap_area_list)) +Index: linux-3.10-3.10.11/dummy/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1559_7bff7accd427da171501b558457ef8fa81ee2767.txt 2014-04-28 00:41:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.patch --- linux-3.10.11/debian/patches/rpi/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.patch 2014-04-28 00:41:52.000000000 +0000 @@ -0,0 +1,35 @@ +commit 0d6d09974ba93877afa53f5ce5ce89f20b3dfe20 +Author: Thomas Hellstrom +Date: Wed Oct 9 01:42:50 2013 -0700 + + drm/vmwgfx: Don't put resources with invalid id's on lru list + + commit 26682480c202e7360cbcdc3bc9e962bf749c6b8d upstream. + + The evict code may try to swap them out causing a BUG in the destroy + function. + + Signed-off-by: Thomas Hellstrom + Reviewed-by: Jakob Bornecrantz + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c 2014-04-27 23:37:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/vmwgfx/vmwgfx_resource.c 2014-04-28 00:41:51.000000000 +0000 +@@ -970,7 +970,7 @@ + if (new_backup) + res->backup_offset = new_backup_offset; + +- if (!res->func->may_evict) ++ if (!res->func->may_evict || res->id == -1) + return; + + write_lock(&dev_priv->resource_lock); +Index: linux-3.10-3.10.11/dummy/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1560_0d6d09974ba93877afa53f5ce5ce89f20b3dfe20.txt 2014-04-28 00:41:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.patch --- linux-3.10.11/debian/patches/rpi/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.patch 2014-04-28 00:41:53.000000000 +0000 @@ -0,0 +1,65 @@ +commit 09c2c79ce6e82b226262e667971db7f4a666e430 +Author: Thomas Hellstrom +Date: Wed Oct 9 01:42:51 2013 -0700 + + drm/vmwgfx: Don't kill clients on VT switch + + commit c4249855ac5b2a383704d31e040d3831d6a25c6f upstream. + + DRI clients that tried to grab the TTM lock when the master (X server) was + switched away during a VT switch were sent the SIGTERM signal by the + kernel. Fix this so that they are only sent that signal when the master has + exited. + + Signed-off-by: Thomas Hellstrom + Reviewed-by: Jakob Bornecrantz + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c 2014-04-27 23:37:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c 2014-04-28 00:41:52.000000000 +0000 +@@ -740,9 +740,17 @@ + struct vmw_fpriv *vmw_fp; + + vmw_fp = vmw_fpriv(file_priv); +- ttm_object_file_release(&vmw_fp->tfile); +- if (vmw_fp->locked_master) ++ ++ if (vmw_fp->locked_master) { ++ struct vmw_master *vmaster = ++ vmw_master(vmw_fp->locked_master); ++ ++ ttm_lock_set_kill(&vmaster->lock, true, SIGTERM); ++ ttm_vt_unlock(&vmaster->lock); + drm_master_put(&vmw_fp->locked_master); ++ } ++ ++ ttm_object_file_release(&vmw_fp->tfile); + kfree(vmw_fp); + } + +@@ -942,14 +950,13 @@ + + vmw_fp->locked_master = drm_master_get(file_priv->master); + ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile); +- vmw_execbuf_release_pinned_bo(dev_priv); +- + if (unlikely((ret != 0))) { + DRM_ERROR("Unable to lock TTM at VT switch.\n"); + drm_master_put(&vmw_fp->locked_master); + } + +- ttm_lock_set_kill(&vmaster->lock, true, SIGTERM); ++ ttm_lock_set_kill(&vmaster->lock, false, SIGTERM); ++ vmw_execbuf_release_pinned_bo(dev_priv); + + if (!dev_priv->enable_fb) { + ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM); +Index: linux-3.10-3.10.11/dummy/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1561_09c2c79ce6e82b226262e667971db7f4a666e430.txt 2014-04-28 00:41:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.patch --- linux-3.10.11/debian/patches/rpi/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.patch 2014-04-28 00:41:53.000000000 +0000 @@ -0,0 +1,55 @@ +commit 45da934f7431181cd1ccc33b4d138dc41c2cd1ba +Author: Chris Wilson +Date: Wed Oct 16 11:22:44 2013 +0100 + + drm: Prevent overwriting from userspace underallocating core ioctl structs + + commit b062672e305ce071f21eb9e18b102c2a430e0999 upstream. + + Apply the protections from + + commit 1b2f1489633888d4a06028315dc19d65768a1c05 + Author: Dave Airlie + Date: Sat Aug 14 20:20:34 2010 +1000 + + drm: block userspace under allocating buffer and having drivers overwrite it (v2) + + to the core ioctl structs as well, for we found one instance where there + is a 32-/64-bit size mismatch and were guilty of writing beyond the end + of the user's buffer. + + Signed-off-by: Chris Wilson + Cc: Dave Airlie + Reviewed-by: Ville Syrjälä + Cc: dri-devel@lists.freedesktop.org + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/drm_drv.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/drm_drv.c 2014-04-27 23:37:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/drm_drv.c 2014-04-28 00:41:53.000000000 +0000 +@@ -406,9 +406,16 @@ + cmd = ioctl->cmd_drv; + } + else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE)) { ++ u32 drv_size; ++ + ioctl = &drm_ioctls[nr]; +- cmd = ioctl->cmd; ++ ++ drv_size = _IOC_SIZE(ioctl->cmd); + usize = asize = _IOC_SIZE(cmd); ++ if (drv_size > asize) ++ asize = drv_size; ++ ++ cmd = ioctl->cmd; + } else + goto err_i1; + +Index: linux-3.10-3.10.11/dummy/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1562_45da934f7431181cd1ccc33b4d138dc41c2cd1ba.txt 2014-04-28 00:41:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.patch 2014-04-28 00:41:54.000000000 +0000 @@ -0,0 +1,55 @@ +commit 9c1aab0da00ed04f096fabc4136241cb45f92cc1 +Author: Chris Wilson +Date: Wed Oct 16 09:49:02 2013 +0100 + + drm: Pad drm_mode_get_connector to 64-bit boundary + + commit bc5bd37ce48c66e9192ad2e7231e9678880f6f8e upstream. + + Pavel Roskin reported that DRM_IOCTL_MODE_GETCONNECTOR was overwritting + the 4 bytes beyond the end of its structure with a 32-bit userspace + running on a 64-bit kernel. This is due to the padding gcc inserts as + the drm_mode_get_connector struct includes a u64 and its size is not a + natural multiple of u64s. + + 64-bit kernel: + + sizeof(drm_mode_get_connector)=80, alignof=8 + sizeof(drm_mode_get_encoder)=20, alignof=4 + sizeof(drm_mode_modeinfo)=68, alignof=4 + + 32-bit userspace: + + sizeof(drm_mode_get_connector)=76, alignof=4 + sizeof(drm_mode_get_encoder)=20, alignof=4 + sizeof(drm_mode_modeinfo)=68, alignof=4 + + Fortuituously we can insert explicit padding to the tail of our + structures without breaking ABI. + + Reported-by: Pavel Roskin + Signed-off-by: Chris Wilson + Cc: Dave Airlie + Cc: dri-devel@lists.freedesktop.org + Signed-off-by: Dave Airlie + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/include/uapi/drm/drm_mode.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/drm/drm_mode.h 2014-04-27 23:37:26.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/drm/drm_mode.h 2014-04-28 00:41:54.000000000 +0000 +@@ -223,6 +223,8 @@ + __u32 connection; + __u32 mm_width, mm_height; /**< HxW in millimeters */ + __u32 subpixel; ++ ++ __u32 pad; + }; + + #define DRM_MODE_PROP_PENDING (1<<0) +Index: linux-3.10-3.10.11/dummy/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1563_9c1aab0da00ed04f096fabc4136241cb45f92cc1.txt 2014-04-28 00:41:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.patch 2014-04-28 00:41:55.000000000 +0000 @@ -0,0 +1,38 @@ +commit 2233b4db914786e69960d717a3019c87ba3bb5a5 +Author: Alex Deucher +Date: Thu Oct 10 16:45:27 2013 -0400 + + drm/radeon/atom: workaround vbios bug in transmitter table on rs780 + + commit c23632d4e57c0dd20bf50eca08fa0eb8ad3ff680 upstream. + + Some rs780 asics seem to be affected as well. + + See: + http://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=91f3a6aaf280294b07c05dfe606e6c27b7ba3c72 + + Fixes: + https://bugzilla.kernel.org/show_bug.cgi?id=60791 + + Signed-off-by: Alex Deucher + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_encoders.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/gpu/drm/radeon/atombios_encoders.c 2014-04-28 00:36:44.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/gpu/drm/radeon/atombios_encoders.c 2014-04-28 00:41:54.000000000 +0000 +@@ -1641,7 +1641,7 @@ + * does the same thing and more. + */ + if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730) && +- (rdev->family != CHIP_RS880)) ++ (rdev->family != CHIP_RS780) && (rdev->family != CHIP_RS880)) + atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); + } + if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { +Index: linux-3.10-3.10.11/dummy/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1564_2233b4db914786e69960d717a3019c87ba3bb5a5.txt 2014-04-28 00:41:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.patch 2014-04-28 00:41:56.000000000 +0000 @@ -0,0 +1,73 @@ +commit dad483b78d280665a110591fd418535e0f9791dc +Author: Gu Zheng +Date: Fri Oct 25 18:15:06 2013 +0800 + + seq_file: always update file->f_pos in seq_lseek() + + commit 05e16745c0c471bba313961b605b6da3b21a853d upstream. + + This issue was first pointed out by Jiaxing Wang several months ago, but no + further comments: + https://lkml.org/lkml/2013/6/29/41 + + As we know pread() does not change f_pos, so after pread(), file->f_pos + and m->read_pos become different. And seq_lseek() does not update file->f_pos + if offset equals to m->read_pos, so after pread() and seq_lseek()(lseek to + m->read_pos), then a subsequent read may read from a wrong position, the + following program produces the problem: + + char str1[32] = { 0 }; + char str2[32] = { 0 }; + int poffset = 10; + int count = 20; + + /*open any seq file*/ + int fd = open("/proc/modules", O_RDONLY); + + pread(fd, str1, count, poffset); + printf("pread:%s\n", str1); + + /*seek to where m->read_pos is*/ + lseek(fd, poffset+count, SEEK_SET); + + /*supposed to read from poffset+count, but this read from position 0*/ + read(fd, str2, count); + printf("read:%s\n", str2); + + out put: + pread: + ck_netbios_ns 12665 + read: + nf_conntrack_netbios + + /proc/modules: + nf_conntrack_netbios_ns 12665 0 - Live 0xffffffffa038b000 + nf_conntrack_broadcast 12589 1 nf_conntrack_netbios_ns, Live 0xffffffffa0386000 + + So we always update file->f_pos to offset in seq_lseek() to fix this issue. + + Signed-off-by: Jiaxing Wang + Signed-off-by: Gu Zheng + Signed-off-by: Al Viro + Cc: Jonghwan Choi + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/fs/seq_file.c +=================================================================== +--- linux-3.10-3.10.11.orig/fs/seq_file.c 2014-04-27 23:37:25.000000000 +0000 ++++ linux-3.10-3.10.11/fs/seq_file.c 2014-04-28 00:41:55.000000000 +0000 +@@ -328,6 +328,8 @@ + m->read_pos = offset; + retval = file->f_pos = offset; + } ++ } else { ++ file->f_pos = offset; + } + } + file->f_version = m->version; +Index: linux-3.10-3.10.11/dummy/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1565_dad483b78d280665a110591fd418535e0f9791dc.txt 2014-04-28 00:41:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.patch 2014-04-28 00:41:56.000000000 +0000 @@ -0,0 +1,43 @@ +commit 21720562911f038d7406654e7ea0c171cfac47b8 +Author: Jon Mason +Date: Mon Jul 15 13:23:47 2013 -0700 + + NTB: Add Error Handling in ntb_device_setup + + commit 3b12a0d15bd1559e72ad21d9d807fd2a6706f0ab upstream. + + If an error is encountered in ntb_device_setup, it is possible that the + spci_cmd isn't populated. Writes to the offset can result in a NULL + pointer dereference. This issue is easily encountered by running in + NTB-RP mode, as it currently is not supported and will generate an + error. To get around this issue, return if an error is encountered + prior to attempting to write to the spci_cmd offset. + + Signed-off-by: Jon Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/ntb/ntb_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_hw.c 2014-04-27 23:37:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_hw.c 2014-04-28 00:41:56.000000000 +0000 +@@ -644,10 +644,13 @@ + rc = -ENODEV; + } + ++ if (rc) ++ return rc; ++ + /* Enable Bus Master and Memory Space on the secondary side */ + writew(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, ndev->reg_ofs.spci_cmd); + +- return rc; ++ return 0; + } + + static void ntb_device_free(struct ntb_device *ndev) +Index: linux-3.10-3.10.11/dummy/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1566_21720562911f038d7406654e7ea0c171cfac47b8.txt 2014-04-28 00:41:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.patch --- linux-3.10.11/debian/patches/rpi/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.patch 2014-04-28 00:41:57.000000000 +0000 @@ -0,0 +1,49 @@ +commit 576db18cb68483e6e54f18dfda4b9c24f7e07dfe +Author: Jon Mason +Date: Mon Jul 15 15:26:14 2013 -0700 + + NTB: Correct Number of Scratch Pad Registers + + commit 87034511519815259e37336f52edf06d114d43b6 upstream. + + The NTB Xeon hardware has 16 scratch pad registers and 16 back-to-back + scratch pad registers. Correct the #define to represent this and update + the variable names to reflect their usage. + + Signed-off-by: Jon Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/ntb/ntb_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_hw.c 2014-04-28 00:41:56.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_hw.c 2014-04-28 00:41:57.000000000 +0000 +@@ -547,7 +547,7 @@ + if (ndev->conn_type == NTB_CONN_B2B) { + ndev->reg_ofs.sdb = ndev->reg_base + SNB_B2B_DOORBELL_OFFSET; + ndev->reg_ofs.spad_write = ndev->reg_base + SNB_B2B_SPAD_OFFSET; +- ndev->limits.max_spads = SNB_MAX_SPADS; ++ ndev->limits.max_spads = SNB_MAX_B2B_SPADS; + } else { + ndev->reg_ofs.sdb = ndev->reg_base + SNB_SDOORBELL_OFFSET; + ndev->reg_ofs.spad_write = ndev->reg_base + SNB_SPAD_OFFSET; +Index: linux-3.10-3.10.11/drivers/ntb/ntb_regs.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_regs.h 2014-04-27 23:37:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_regs.h 2014-04-28 00:41:57.000000000 +0000 +@@ -53,8 +53,8 @@ + #define NTB_LINK_WIDTH_MASK 0x03f0 + + #define SNB_MSIX_CNT 4 +-#define SNB_MAX_SPADS 16 +-#define SNB_MAX_COMPAT_SPADS 8 ++#define SNB_MAX_B2B_SPADS 16 ++#define SNB_MAX_COMPAT_SPADS 16 + /* Reserve the uppermost bit for link interrupt */ + #define SNB_MAX_DB_BITS 15 + #define SNB_DB_BITS_PER_VEC 5 +Index: linux-3.10-3.10.11/dummy/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1567_576db18cb68483e6e54f18dfda4b9c24f7e07dfe.txt 2014-04-28 00:41:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.patch 2014-04-28 00:41:58.000000000 +0000 @@ -0,0 +1,47 @@ +commit 8293fc2416f0eb13ff81501b31f0206c5331b9cb +Author: Jon Mason +Date: Fri May 31 14:05:53 2013 -0700 + + NTB: Correct USD/DSD Identification + + commit b6750cfe0710a14fd147ba27fddbecae8ba88c77 upstream. + + Due to ambiguous documentation, the USD/DSD identification is backward + when compared to the setting in BIOS. Correct the bits to match the + BIOS setting. + + Signed-off-by: Jon Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/ntb/ntb_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_hw.c 2014-04-28 00:41:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_hw.c 2014-04-28 00:41:57.000000000 +0000 +@@ -531,9 +531,9 @@ + } + + if (val & SNB_PPD_DEV_TYPE) +- ndev->dev_type = NTB_DEV_DSD; +- else + ndev->dev_type = NTB_DEV_USD; ++ else ++ ndev->dev_type = NTB_DEV_DSD; + + ndev->reg_ofs.pdb = ndev->reg_base + SNB_PDOORBELL_OFFSET; + ndev->reg_ofs.pdb_mask = ndev->reg_base + SNB_PDBMSK_OFFSET; +@@ -647,6 +647,9 @@ + if (rc) + return rc; + ++ dev_info(&ndev->pdev->dev, "Device Type = %s\n", ++ ndev->dev_type == NTB_DEV_USD ? "USD/DSP" : "DSD/USP"); ++ + /* Enable Bus Master and Memory Space on the secondary side */ + writew(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, ndev->reg_ofs.spci_cmd); + +Index: linux-3.10-3.10.11/dummy/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1568_8293fc2416f0eb13ff81501b31f0206c5331b9cb.txt 2014-04-28 00:41:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.patch --- linux-3.10.11/debian/patches/rpi/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.patch 2014-04-28 00:41:59.000000000 +0000 @@ -0,0 +1,192 @@ +commit cfa234b144de51eb96e877ee0bee47a3420e8bed +Author: Jon Mason +Date: Tue Jul 30 15:58:49 2013 -0700 + + NTB: Correct debugfs to work with more than 1 NTB Device + + commit 1517a3f21a1dd321f16bcf44204bddff9d21abd0 upstream. + + Debugfs was setup in NTB to only have a single debugfs directory. This + resulted in the leaking of debugfs directories and files when multiple + NTB devices were present, due to each device stomping on the variables + containing the previous device's values (thus preventing them from being + freed on cleanup). Correct this by creating a secondary directory of + the PCI BDF for each device present, and nesting the previously existing + information in those directories. + + Signed-off-by: Jon Mason + Signed-off-by: Greg Kroah-Hartman + +Index: linux-3.10-3.10.11/drivers/ntb/ntb_hw.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_hw.c 2014-04-28 00:41:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_hw.c 2014-04-28 00:41:58.000000000 +0000 +@@ -78,6 +78,8 @@ + BWD_HW, + }; + ++static struct dentry *debugfs_dir; ++ + /* Translate memory window 0,1 to BAR 2,4 */ + #define MW_TO_BAR(mw) (mw * 2 + 2) + +@@ -998,6 +1000,28 @@ + kfree(ndev->db_cb); + } + ++static void ntb_setup_debugfs(struct ntb_device *ndev) ++{ ++ if (!debugfs_initialized()) ++ return; ++ ++ if (!debugfs_dir) ++ debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL); ++ ++ ndev->debugfs_dir = debugfs_create_dir(pci_name(ndev->pdev), ++ debugfs_dir); ++} ++ ++static void ntb_free_debugfs(struct ntb_device *ndev) ++{ ++ debugfs_remove_recursive(ndev->debugfs_dir); ++ ++ if (debugfs_dir && simple_empty(debugfs_dir)) { ++ debugfs_remove_recursive(debugfs_dir); ++ debugfs_dir = NULL; ++ } ++} ++ + static int ntb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) + { + struct ntb_device *ndev; +@@ -1010,6 +1034,7 @@ + ndev->pdev = pdev; + ndev->link_status = NTB_LINK_DOWN; + pci_set_drvdata(pdev, ndev); ++ ntb_setup_debugfs(ndev); + + rc = pci_enable_device(pdev); + if (rc) +@@ -1106,6 +1131,7 @@ + err1: + pci_disable_device(pdev); + err: ++ ntb_free_debugfs(ndev); + kfree(ndev); + + dev_err(&pdev->dev, "Error loading %s module\n", KBUILD_MODNAME); +@@ -1135,6 +1161,7 @@ + iounmap(ndev->reg_base); + pci_release_selected_regions(pdev, NTB_BAR_MASK); + pci_disable_device(pdev); ++ ntb_free_debugfs(ndev); + kfree(ndev); + } + +Index: linux-3.10-3.10.11/drivers/ntb/ntb_hw.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_hw.h 2014-04-27 23:37:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_hw.h 2014-04-28 00:41:58.000000000 +0000 +@@ -127,6 +127,8 @@ + unsigned char link_status; + struct delayed_work hb_timer; + unsigned long last_ts; ++ ++ struct dentry *debugfs_dir; + }; + + /** +@@ -155,6 +157,20 @@ + return ndev->pdev; + } + ++/** ++ * ntb_query_debugfs() - return the debugfs pointer ++ * @ndev: pointer to ntb_device instance ++ * ++ * Given the ntb pointer, return the debugfs directory pointer for the NTB ++ * hardware device ++ * ++ * RETURNS: a pointer to the debugfs directory ++ */ ++static inline struct dentry *ntb_query_debugfs(struct ntb_device *ndev) ++{ ++ return ndev->debugfs_dir; ++} ++ + struct ntb_device *ntb_register_transport(struct pci_dev *pdev, + void *transport); + void ntb_unregister_transport(struct ntb_device *ndev); +Index: linux-3.10-3.10.11/drivers/ntb/ntb_transport.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/ntb/ntb_transport.c 2014-04-27 23:37:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/ntb/ntb_transport.c 2014-04-28 00:41:58.000000000 +0000 +@@ -157,7 +157,6 @@ + bool transport_link; + struct delayed_work link_work; + struct work_struct link_cleanup; +- struct dentry *debugfs_dir; + }; + + enum { +@@ -824,12 +823,12 @@ + qp->tx_max_frame = min(transport_mtu, tx_size / 2); + qp->tx_max_entry = tx_size / qp->tx_max_frame; + +- if (nt->debugfs_dir) { ++ if (ntb_query_debugfs(nt->ndev)) { + char debugfs_name[4]; + + snprintf(debugfs_name, 4, "qp%d", qp_num); + qp->debugfs_dir = debugfs_create_dir(debugfs_name, +- nt->debugfs_dir); ++ ntb_query_debugfs(nt->ndev)); + + qp->debugfs_stats = debugfs_create_file("stats", S_IRUSR, + qp->debugfs_dir, qp, +@@ -857,11 +856,6 @@ + if (!nt) + return -ENOMEM; + +- if (debugfs_initialized()) +- nt->debugfs_dir = debugfs_create_dir(KBUILD_MODNAME, NULL); +- else +- nt->debugfs_dir = NULL; +- + nt->ndev = ntb_register_transport(pdev, nt); + if (!nt->ndev) { + rc = -EIO; +@@ -907,7 +901,6 @@ + err1: + ntb_unregister_transport(nt->ndev); + err: +- debugfs_remove_recursive(nt->debugfs_dir); + kfree(nt); + return rc; + } +@@ -921,16 +914,16 @@ + nt->transport_link = NTB_LINK_DOWN; + + /* verify that all the qp's are freed */ +- for (i = 0; i < nt->max_qps; i++) ++ for (i = 0; i < nt->max_qps; i++) { + if (!test_bit(i, &nt->qp_bitmap)) + ntb_transport_free_queue(&nt->qps[i]); ++ debugfs_remove_recursive(nt->qps[i].debugfs_dir); ++ } + + ntb_bus_remove(nt); + + cancel_delayed_work_sync(&nt->link_work); + +- debugfs_remove_recursive(nt->debugfs_dir); +- + ntb_unregister_event_callback(nt->ndev); + + pdev = ntb_query_pdev(nt->ndev); +Index: linux-3.10-3.10.11/dummy/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1569_cfa234b144de51eb96e877ee0bee47a3420e8bed.txt 2014-04-28 00:41:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.patch 2014-04-28 00:42:00.000000000 +0000 @@ -0,0 +1,24 @@ +commit 3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5 +Author: Greg Kroah-Hartman +Date: Wed Nov 13 12:05:59 2013 +0900 + + Linux 3.10.19 + +Index: linux-3.10-3.10.11/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/Makefile 2014-04-28 00:40:59.000000000 +0000 ++++ linux-3.10-3.10.11/Makefile 2014-04-28 00:41:59.000000000 +0000 +@@ -1,6 +1,6 @@ + VERSION = 3 + PATCHLEVEL = 10 +-SUBLEVEL = 18 ++SUBLEVEL = 19 + EXTRAVERSION = + NAME = TOSSUG Baby Fish + +Index: linux-3.10-3.10.11/dummy/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1570_3729ed7c6aa8c5b9eee8f832e4a246b8fa1d56b5.txt 2014-04-28 00:41:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.patch 2014-04-28 00:42:04.000000000 +0000 @@ -0,0 +1,8450 @@ +commit 464ff6a40a8e684ebc730b5ede44c646b1d4e6c9 +Author: popcornmix +Date: Sun May 12 12:24:19 2013 +0100 + + Main bcm2708 linux port + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/arch/arm/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/Kconfig 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/Kconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -361,6 +361,21 @@ + This enables support for systems based on Atmel + AT91RM9200 and AT91SAM9* processors. + ++config ARCH_BCM2708 ++ bool "Broadcom BCM2708 family" ++ select CPU_V6 ++ select ARM_AMBA ++ select HAVE_CLK ++ select HAVE_SCHED_CLOCK ++ select NEED_MACH_MEMORY_H ++ select CLKDEV_LOOKUP ++ select GENERIC_CLOCKEVENTS ++ select ARM_ERRATA_411920 ++ select MACH_BCM2708 ++ select VC4 ++ help ++ This enables support for Broadcom BCM2708 boards. ++ + config ARCH_CLPS711X + bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" + select ARCH_REQUIRE_GPIOLIB +@@ -1025,6 +1040,7 @@ + source "arch/arm/mach-vt8500/Kconfig" + + source "arch/arm/mach-w90x900/Kconfig" ++source "arch/arm/mach-bcm2708/Kconfig" + + source "arch/arm/mach-zynq/Kconfig" + +Index: linux-3.10-3.10.11/arch/arm/Kconfig.debug +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/Kconfig.debug 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/Kconfig.debug 2014-04-28 00:42:00.000000000 +0000 +@@ -519,6 +519,14 @@ + For more details about semihosting, please see + chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. + ++ config DEBUG_BCM2708_UART0 ++ bool "Broadcom BCM2708 UART0 (PL011)" ++ depends on MACH_BCM2708 ++ help ++ Say Y here if you want the debug print routines to direct ++ their output to UART 0. The port must have been initialised ++ by the boot-loader before use. ++ + endchoice + + config DEBUG_EXYNOS_UART +Index: linux-3.10-3.10.11/arch/arm/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/Makefile 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/Makefile 2014-04-28 00:42:00.000000000 +0000 +@@ -139,6 +139,7 @@ + # by CONFIG_* macro name. + machine-$(CONFIG_ARCH_AT91) += at91 + machine-$(CONFIG_ARCH_BCM) += bcm ++machine-$(CONFIG_ARCH_BCM2708) += bcm2708 + machine-$(CONFIG_ARCH_BCM2835) += bcm2835 + machine-$(CONFIG_ARCH_CLPS711X) += clps711x + machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,474 @@ ++CONFIG_EXPERIMENTAL=y ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++# CONFIG_UID16 is not set ++# CONFIG_KALLSYMS is not set ++CONFIG_EMBEDDED=y ++# CONFIG_VM_EVENT_COUNTERS is not set ++# CONFIG_COMPAT_BRK is not set ++CONFIG_SLAB=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_ARCH_BCM2708=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_AEABI=y ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" ++CONFIG_CPU_IDLE=y ++CONFIG_VFP=y ++CONFIG_BINFMT_MISC=m ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_SYN_COOKIES=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++CONFIG_NET_PKTGEN=m ++CONFIG_IRDA=m ++CONFIG_IRLAN=m ++CONFIG_IRCOMM=m ++CONFIG_IRDA_ULTRA=y ++CONFIG_IRDA_CACHE_LAST_LSAP=y ++CONFIG_IRDA_FAST_RR=y ++CONFIG_IRTTY_SIR=m ++CONFIG_KINGSUN_DONGLE=m ++CONFIG_KSDAZZLE_DONGLE=m ++CONFIG_KS959_DONGLE=m ++CONFIG_USB_IRDA=m ++CONFIG_SIGMATEL_FIR=m ++CONFIG_MCS_FIR=m ++CONFIG_BT=m ++CONFIG_BT_L2CAP=y ++CONFIG_BT_SCO=y ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_RC_PID=y ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_NFC_PN533=m ++CONFIG_DEVTMPFS=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_MISC_DEVICES=y ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=m ++CONFIG_BLK_DEV_SR=m ++CONFIG_SCSI_MULTI_LUN=y ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_NETDEVICES=y ++CONFIG_TUN=m ++CONFIG_PHYLIB=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_NET_ETHERNET=y ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_AT76C50X_USB=m ++CONFIG_USB_ZD1201=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_RTL8187=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_ATH_COMMON=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_B43=m ++CONFIG_B43LEGACY=m ++CONFIG_HOSTAP=m ++CONFIG_IWM=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RTL8192CU=m ++CONFIG_WL1251=m ++CONFIG_WL12XX_MENU=m ++CONFIG_ZD1211RW=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_KC2190=y ++# CONFIG_USB_NET_ZAURUS is not set ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_PPP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_NETCONSOLE=m ++CONFIG_INPUT_POLLDEV=m ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_HW_RANDOM is not set ++CONFIG_RAW_DRIVER=y ++CONFIG_GPIO_SYSFS=y ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++CONFIG_BCM2708_WDT=m ++# CONFIG_MFD_SUPPORT is not set ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_QUANTA=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=m ++CONFIG_USB_LIBUSUAL=y ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_FUNSOFT=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_MOTOROLA=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_HP4X=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIEMENS_MPI=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m ++CONFIG_USB_SERIAL_ZIO=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_LED=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_BCM2708=y ++CONFIG_MMC_SDHCI_BCM2708_DMA=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=m ++CONFIG_LEDS_TRIGGER_HEARTBEAT=m ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=m ++CONFIG_UIO=m ++CONFIG_UIO_PDRV=m ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_FSCACHE=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_9P_FS=m ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_EFI_PARTITION=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_NLS_UTF8=m ++# CONFIG_SCHED_DEBUG is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_FTRACE is not set ++# CONFIG_ARM_UNWIND is not set ++CONFIG_CRYPTO_AUTHENC=m ++CONFIG_CRYPTO_SEQIV=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,510 @@ ++CONFIG_EXPERIMENTAL=y ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_FHANDLE=y ++CONFIG_AUDIT=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_RESOURCE_COUNTERS=y ++CONFIG_BLK_CGROUP=y ++CONFIG_NAMESPACES=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_EMBEDDED=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_SLAB=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_CFQ_GROUP_IOSCHED=y ++CONFIG_ARCH_BCM2708=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_AEABI=y ++CONFIG_SECCOMP=y ++CONFIG_CC_STACKPROTECTOR=y ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" ++CONFIG_KEXEC=y ++CONFIG_CPU_IDLE=y ++CONFIG_VFP=y ++CONFIG_BINFMT_MISC=m ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_SYN_COOKIES=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++CONFIG_NET_PKTGEN=m ++CONFIG_IRDA=m ++CONFIG_IRLAN=m ++CONFIG_IRCOMM=m ++CONFIG_IRDA_ULTRA=y ++CONFIG_IRDA_CACHE_LAST_LSAP=y ++CONFIG_IRDA_FAST_RR=y ++CONFIG_IRTTY_SIR=m ++CONFIG_KINGSUN_DONGLE=m ++CONFIG_KSDAZZLE_DONGLE=m ++CONFIG_KS959_DONGLE=m ++CONFIG_USB_IRDA=m ++CONFIG_SIGMATEL_FIR=m ++CONFIG_MCS_FIR=m ++CONFIG_BT=m ++CONFIG_BT_L2CAP=y ++CONFIG_BT_SCO=y ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_RC_PID=y ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_NFC_PN533=m ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_MISC_DEVICES=y ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=m ++CONFIG_BLK_DEV_SR=m ++CONFIG_SCSI_MULTI_LUN=y ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_MD=y ++CONFIG_NETDEVICES=y ++CONFIG_TUN=m ++CONFIG_PHYLIB=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_NET_ETHERNET=y ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_AT76C50X_USB=m ++CONFIG_USB_ZD1201=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_RTL8187=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_ATH_COMMON=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_B43=m ++CONFIG_B43LEGACY=m ++CONFIG_HOSTAP=m ++CONFIG_IWM=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RTL8192CU=m ++CONFIG_WL1251=m ++CONFIG_WL12XX_MENU=m ++CONFIG_ZD1211RW=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_KC2190=y ++# CONFIG_USB_NET_ZAURUS is not set ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_PPP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_NETCONSOLE=m ++CONFIG_INPUT_POLLDEV=m ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_HW_RANDOM is not set ++CONFIG_RAW_DRIVER=y ++CONFIG_GPIO_SYSFS=y ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++CONFIG_BCM2708_WDT=m ++# CONFIG_MFD_SUPPORT is not set ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_QUANTA=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=m ++CONFIG_USB_LIBUSUAL=y ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_FUNSOFT=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_MOTOROLA=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_HP4X=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIEMENS_MPI=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m ++CONFIG_USB_SERIAL_ZIO=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_LED=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_BCM2708=y ++CONFIG_MMC_SDHCI_BCM2708_DMA=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=m ++CONFIG_LEDS_TRIGGER_HEARTBEAT=m ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=m ++CONFIG_UIO=m ++CONFIG_UIO_PDRV=m ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_FANOTIFY=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_FSCACHE=y ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_HISTOGRAM=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_9P_FS=m ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_EFI_PARTITION=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_NLS_UTF8=m ++CONFIG_PRINTK_TIME=y ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_TIMER_STATS=y ++CONFIG_DEBUG_STACK_USAGE=y ++CONFIG_DEBUG_INFO=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_LATENCYTOP=y ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y ++CONFIG_STRICT_DEVMEM=y ++CONFIG_CRYPTO_AUTHENC=m ++CONFIG_CRYPTO_SEQIV=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_emergency_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_emergency_defconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,532 @@ ++CONFIG_EXPERIMENTAL=y ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_FHANDLE=y ++CONFIG_AUDIT=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="../target_fs" ++CONFIG_CGROUP_FREEZER=y ++CONFIG_CGROUP_DEVICE=y ++CONFIG_CGROUP_CPUACCT=y ++CONFIG_RESOURCE_COUNTERS=y ++CONFIG_BLK_CGROUP=y ++CONFIG_NAMESPACES=y ++CONFIG_SCHED_AUTOGROUP=y ++CONFIG_EMBEDDED=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_SLAB=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_CFQ_GROUP_IOSCHED=y ++CONFIG_ARCH_BCM2708=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_AEABI=y ++CONFIG_SECCOMP=y ++CONFIG_CC_STACKPROTECTOR=y ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" ++CONFIG_KEXEC=y ++CONFIG_CPU_IDLE=y ++CONFIG_VFP=y ++CONFIG_BINFMT_MISC=m ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_XFRM_USER=y ++CONFIG_NET_KEY=m ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_SYN_COOKIES=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++CONFIG_NET_PKTGEN=m ++CONFIG_IRDA=m ++CONFIG_IRLAN=m ++CONFIG_IRCOMM=m ++CONFIG_IRDA_ULTRA=y ++CONFIG_IRDA_CACHE_LAST_LSAP=y ++CONFIG_IRDA_FAST_RR=y ++CONFIG_IRTTY_SIR=m ++CONFIG_KINGSUN_DONGLE=m ++CONFIG_KSDAZZLE_DONGLE=m ++CONFIG_KS959_DONGLE=m ++CONFIG_USB_IRDA=m ++CONFIG_SIGMATEL_FIR=m ++CONFIG_MCS_FIR=m ++CONFIG_BT=m ++CONFIG_BT_L2CAP=y ++CONFIG_BT_SCO=y ++CONFIG_BT_RFCOMM=m ++CONFIG_BT_RFCOMM_TTY=y ++CONFIG_BT_BNEP=m ++CONFIG_BT_BNEP_MC_FILTER=y ++CONFIG_BT_BNEP_PROTO_FILTER=y ++CONFIG_BT_HIDP=m ++CONFIG_BT_HCIBTUSB=m ++CONFIG_BT_HCIBCM203X=m ++CONFIG_BT_HCIBPA10X=m ++CONFIG_BT_HCIBFUSB=m ++CONFIG_BT_HCIVHCI=m ++CONFIG_BT_MRVL=m ++CONFIG_BT_MRVL_SDIO=m ++CONFIG_BT_ATH3K=m ++CONFIG_CFG80211=m ++CONFIG_MAC80211=m ++CONFIG_MAC80211_RC_PID=y ++CONFIG_MAC80211_MESH=y ++CONFIG_WIMAX=m ++CONFIG_NET_9P=m ++CONFIG_NFC=m ++CONFIG_NFC_PN533=m ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=y ++CONFIG_CDROM_PKTCDVD=m ++CONFIG_MISC_DEVICES=y ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++CONFIG_BLK_DEV_SD=y ++CONFIG_BLK_DEV_SR=m ++CONFIG_SCSI_MULTI_LUN=y ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_MD=y ++CONFIG_NETDEVICES=y ++CONFIG_TUN=m ++CONFIG_PHYLIB=m ++CONFIG_MDIO_BITBANG=m ++CONFIG_NET_ETHERNET=y ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++CONFIG_LIBERTAS_THINFIRM=m ++CONFIG_LIBERTAS_THINFIRM_USB=m ++CONFIG_AT76C50X_USB=m ++CONFIG_USB_ZD1201=m ++CONFIG_USB_NET_RNDIS_WLAN=m ++CONFIG_RTL8187=m ++CONFIG_MAC80211_HWSIM=m ++CONFIG_ATH_COMMON=m ++CONFIG_ATH9K=m ++CONFIG_ATH9K_HTC=m ++CONFIG_CARL9170=m ++CONFIG_B43=m ++CONFIG_B43LEGACY=m ++CONFIG_HOSTAP=m ++CONFIG_IWM=m ++CONFIG_LIBERTAS=m ++CONFIG_LIBERTAS_USB=m ++CONFIG_LIBERTAS_SDIO=m ++CONFIG_P54_COMMON=m ++CONFIG_P54_USB=m ++CONFIG_RT2X00=m ++CONFIG_RT2500USB=m ++CONFIG_RT73USB=m ++CONFIG_RT2800USB=m ++CONFIG_RT2800USB_RT53XX=y ++CONFIG_RTL8192CU=m ++CONFIG_WL1251=m ++CONFIG_WL12XX_MENU=m ++CONFIG_ZD1211RW=m ++CONFIG_MWIFIEX=m ++CONFIG_MWIFIEX_SDIO=m ++CONFIG_WIMAX_I2400M_USB=m ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_KC2190=y ++# CONFIG_USB_NET_ZAURUS is not set ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m ++CONFIG_PPP=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_NETCONSOLE=m ++CONFIG_INPUT_POLLDEV=m ++# CONFIG_INPUT_MOUSEDEV_PSAUX is not set ++CONFIG_INPUT_JOYDEV=m ++CONFIG_INPUT_EVDEV=m ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_MISC=y ++CONFIG_INPUT_AD714X=m ++CONFIG_INPUT_ATI_REMOTE=m ++CONFIG_INPUT_ATI_REMOTE2=m ++CONFIG_INPUT_KEYSPAN_REMOTE=m ++CONFIG_INPUT_POWERMATE=m ++CONFIG_INPUT_YEALINK=m ++CONFIG_INPUT_CM109=m ++CONFIG_INPUT_UINPUT=m ++CONFIG_INPUT_GPIO_ROTARY_ENCODER=m ++CONFIG_INPUT_ADXL34X=m ++CONFIG_INPUT_CMA3000=m ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++# CONFIG_HW_RANDOM is not set ++CONFIG_RAW_DRIVER=y ++CONFIG_GPIO_SYSFS=y ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++CONFIG_BCM2708_WDT=m ++# CONFIG_MFD_SUPPORT is not set ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_SEQUENCER_OSS=y ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_BCM2835=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SOUND_PRIME=m ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y ++CONFIG_HID_A4TECH=m ++CONFIG_HID_ACRUX=m ++CONFIG_HID_APPLE=m ++CONFIG_HID_BELKIN=m ++CONFIG_HID_CHERRY=m ++CONFIG_HID_CHICONY=m ++CONFIG_HID_CYPRESS=m ++CONFIG_HID_DRAGONRISE=m ++CONFIG_HID_EMS_FF=m ++CONFIG_HID_ELECOM=m ++CONFIG_HID_EZKEY=m ++CONFIG_HID_HOLTEK=m ++CONFIG_HID_KEYTOUCH=m ++CONFIG_HID_KYE=m ++CONFIG_HID_UCLOGIC=m ++CONFIG_HID_WALTOP=m ++CONFIG_HID_GYRATION=m ++CONFIG_HID_TWINHAN=m ++CONFIG_HID_KENSINGTON=m ++CONFIG_HID_LCPOWER=m ++CONFIG_HID_LOGITECH=m ++CONFIG_HID_MAGICMOUSE=m ++CONFIG_HID_MICROSOFT=m ++CONFIG_HID_MONTEREY=m ++CONFIG_HID_MULTITOUCH=m ++CONFIG_HID_NTRIG=m ++CONFIG_HID_ORTEK=m ++CONFIG_HID_PANTHERLORD=m ++CONFIG_HID_PETALYNX=m ++CONFIG_HID_PICOLCD=m ++CONFIG_HID_QUANTA=m ++CONFIG_HID_ROCCAT=m ++CONFIG_HID_SAMSUNG=m ++CONFIG_HID_SONY=m ++CONFIG_HID_SPEEDLINK=m ++CONFIG_HID_SUNPLUS=m ++CONFIG_HID_GREENASIA=m ++CONFIG_HID_SMARTJOYPLUS=m ++CONFIG_HID_TOPSEED=m ++CONFIG_HID_THRUSTMASTER=m ++CONFIG_HID_WACOM=m ++CONFIG_HID_WIIMOTE=m ++CONFIG_HID_ZEROPLUS=m ++CONFIG_HID_ZYDACRON=m ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_MON=m ++CONFIG_USB_DWCOTG=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_STORAGE_REALTEK=m ++CONFIG_USB_STORAGE_DATAFAB=m ++CONFIG_USB_STORAGE_FREECOM=m ++CONFIG_USB_STORAGE_ISD200=m ++CONFIG_USB_STORAGE_USBAT=m ++CONFIG_USB_STORAGE_SDDR09=m ++CONFIG_USB_STORAGE_SDDR55=m ++CONFIG_USB_STORAGE_JUMPSHOT=m ++CONFIG_USB_STORAGE_ALAUDA=m ++CONFIG_USB_STORAGE_ONETOUCH=m ++CONFIG_USB_STORAGE_KARMA=m ++CONFIG_USB_STORAGE_CYPRESS_ATACB=m ++CONFIG_USB_STORAGE_ENE_UB6250=m ++CONFIG_USB_UAS=y ++CONFIG_USB_LIBUSUAL=y ++CONFIG_USB_MDC800=m ++CONFIG_USB_MICROTEK=m ++CONFIG_USB_SERIAL=m ++CONFIG_USB_SERIAL_GENERIC=y ++CONFIG_USB_SERIAL_AIRCABLE=m ++CONFIG_USB_SERIAL_ARK3116=m ++CONFIG_USB_SERIAL_BELKIN=m ++CONFIG_USB_SERIAL_CH341=m ++CONFIG_USB_SERIAL_WHITEHEAT=m ++CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m ++CONFIG_USB_SERIAL_CP210X=m ++CONFIG_USB_SERIAL_CYPRESS_M8=m ++CONFIG_USB_SERIAL_EMPEG=m ++CONFIG_USB_SERIAL_FTDI_SIO=m ++CONFIG_USB_SERIAL_FUNSOFT=m ++CONFIG_USB_SERIAL_VISOR=m ++CONFIG_USB_SERIAL_IPAQ=m ++CONFIG_USB_SERIAL_IR=m ++CONFIG_USB_SERIAL_EDGEPORT=m ++CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_GARMIN=m ++CONFIG_USB_SERIAL_IPW=m ++CONFIG_USB_SERIAL_IUU=m ++CONFIG_USB_SERIAL_KEYSPAN_PDA=m ++CONFIG_USB_SERIAL_KEYSPAN=m ++CONFIG_USB_SERIAL_KLSI=m ++CONFIG_USB_SERIAL_KOBIL_SCT=m ++CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_MOS7720=m ++CONFIG_USB_SERIAL_MOS7840=m ++CONFIG_USB_SERIAL_MOTOROLA=m ++CONFIG_USB_SERIAL_NAVMAN=m ++CONFIG_USB_SERIAL_PL2303=m ++CONFIG_USB_SERIAL_OTI6858=m ++CONFIG_USB_SERIAL_QCAUX=m ++CONFIG_USB_SERIAL_QUALCOMM=m ++CONFIG_USB_SERIAL_SPCP8X5=m ++CONFIG_USB_SERIAL_HP4X=m ++CONFIG_USB_SERIAL_SAFE=m ++CONFIG_USB_SERIAL_SIEMENS_MPI=m ++CONFIG_USB_SERIAL_SIERRAWIRELESS=m ++CONFIG_USB_SERIAL_SYMBOL=m ++CONFIG_USB_SERIAL_TI=m ++CONFIG_USB_SERIAL_CYBERJACK=m ++CONFIG_USB_SERIAL_XIRCOM=m ++CONFIG_USB_SERIAL_OPTION=m ++CONFIG_USB_SERIAL_OMNINET=m ++CONFIG_USB_SERIAL_OPTICON=m ++CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m ++CONFIG_USB_SERIAL_ZIO=m ++CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_DEBUG=m ++CONFIG_USB_EMI62=m ++CONFIG_USB_EMI26=m ++CONFIG_USB_ADUTUX=m ++CONFIG_USB_SEVSEG=m ++CONFIG_USB_RIO500=m ++CONFIG_USB_LEGOTOWER=m ++CONFIG_USB_LCD=m ++CONFIG_USB_LED=m ++CONFIG_USB_CYPRESS_CY7C63=m ++CONFIG_USB_CYTHERM=m ++CONFIG_USB_IDMOUSE=m ++CONFIG_USB_FTDI_ELAN=m ++CONFIG_USB_APPLEDISPLAY=m ++CONFIG_USB_LD=m ++CONFIG_USB_TRANCEVIBRATOR=m ++CONFIG_USB_IOWARRIOR=m ++CONFIG_USB_TEST=m ++CONFIG_USB_ISIGHTFW=m ++CONFIG_USB_YUREX=m ++CONFIG_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_BCM2708=y ++CONFIG_MMC_SDHCI_BCM2708_DMA=y ++CONFIG_LEDS_GPIO=y ++CONFIG_LEDS_TRIGGER_TIMER=m ++CONFIG_LEDS_TRIGGER_HEARTBEAT=m ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=m ++CONFIG_UIO=m ++CONFIG_UIO_PDRV=m ++CONFIG_UIO_PDRV_GENIRQ=m ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_REISERFS_FS=m ++CONFIG_REISERFS_FS_XATTR=y ++CONFIG_REISERFS_FS_POSIX_ACL=y ++CONFIG_REISERFS_FS_SECURITY=y ++CONFIG_JFS_FS=m ++CONFIG_JFS_POSIX_ACL=y ++CONFIG_JFS_SECURITY=y ++CONFIG_JFS_STATISTICS=y ++CONFIG_XFS_FS=m ++CONFIG_XFS_QUOTA=y ++CONFIG_XFS_POSIX_ACL=y ++CONFIG_XFS_RT=y ++CONFIG_GFS2_FS=m ++CONFIG_OCFS2_FS=m ++CONFIG_BTRFS_FS=m ++CONFIG_BTRFS_FS_POSIX_ACL=y ++CONFIG_NILFS2_FS=m ++CONFIG_FANOTIFY=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FUSE_FS=m ++CONFIG_CUSE=m ++CONFIG_FSCACHE=y ++CONFIG_FSCACHE_STATS=y ++CONFIG_FSCACHE_HISTOGRAM=y ++CONFIG_CACHEFILES=y ++CONFIG_ISO9660_FS=m ++CONFIG_JOLIET=y ++CONFIG_ZISOFS=y ++CONFIG_UDF_FS=m ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_NTFS_FS=m ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_CONFIGFS_FS=y ++CONFIG_SQUASHFS=m ++CONFIG_SQUASHFS_XATTR=y ++CONFIG_SQUASHFS_LZO=y ++CONFIG_SQUASHFS_XZ=y ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_CIFS=m ++CONFIG_CIFS_WEAK_PW_HASH=y ++CONFIG_CIFS_XATTR=y ++CONFIG_CIFS_POSIX=y ++CONFIG_9P_FS=m ++CONFIG_9P_FS_POSIX_ACL=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y ++CONFIG_EFI_PARTITION=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=m ++CONFIG_NLS_CODEPAGE_775=m ++CONFIG_NLS_CODEPAGE_850=m ++CONFIG_NLS_CODEPAGE_852=m ++CONFIG_NLS_CODEPAGE_855=m ++CONFIG_NLS_CODEPAGE_857=m ++CONFIG_NLS_CODEPAGE_860=m ++CONFIG_NLS_CODEPAGE_861=m ++CONFIG_NLS_CODEPAGE_862=m ++CONFIG_NLS_CODEPAGE_863=m ++CONFIG_NLS_CODEPAGE_864=m ++CONFIG_NLS_CODEPAGE_865=m ++CONFIG_NLS_CODEPAGE_866=m ++CONFIG_NLS_CODEPAGE_869=m ++CONFIG_NLS_CODEPAGE_936=m ++CONFIG_NLS_CODEPAGE_950=m ++CONFIG_NLS_CODEPAGE_932=m ++CONFIG_NLS_CODEPAGE_949=m ++CONFIG_NLS_CODEPAGE_874=m ++CONFIG_NLS_ISO8859_8=m ++CONFIG_NLS_CODEPAGE_1250=m ++CONFIG_NLS_CODEPAGE_1251=m ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=m ++CONFIG_NLS_ISO8859_2=m ++CONFIG_NLS_ISO8859_3=m ++CONFIG_NLS_ISO8859_4=m ++CONFIG_NLS_ISO8859_5=m ++CONFIG_NLS_ISO8859_6=m ++CONFIG_NLS_ISO8859_7=m ++CONFIG_NLS_ISO8859_9=m ++CONFIG_NLS_ISO8859_13=m ++CONFIG_NLS_ISO8859_14=m ++CONFIG_NLS_ISO8859_15=m ++CONFIG_NLS_KOI8_R=m ++CONFIG_NLS_KOI8_U=m ++CONFIG_NLS_UTF8=m ++CONFIG_PRINTK_TIME=y ++CONFIG_DETECT_HUNG_TASK=y ++CONFIG_TIMER_STATS=y ++CONFIG_DEBUG_STACK_USAGE=y ++CONFIG_DEBUG_INFO=y ++CONFIG_DEBUG_MEMORY_INIT=y ++CONFIG_BOOT_PRINTK_DELAY=y ++CONFIG_LATENCYTOP=y ++CONFIG_SYSCTL_SYSCALL_CHECK=y ++CONFIG_IRQSOFF_TRACER=y ++CONFIG_SCHED_TRACER=y ++CONFIG_STACK_TRACER=y ++CONFIG_BLK_DEV_IO_TRACE=y ++CONFIG_FUNCTION_PROFILER=y ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++CONFIG_KDB_KEYBOARD=y ++CONFIG_STRICT_DEVMEM=y ++CONFIG_CRYPTO_AUTHENC=m ++CONFIG_CRYPTO_SEQIV=m ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XCBC=m ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA256=m ++CONFIG_CRYPTO_SHA512=m ++CONFIG_CRYPTO_TGR192=m ++CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_CAST5=m ++CONFIG_CRYPTO_DES=y ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y +Index: linux-3.10-3.10.11/arch/arm/kernel/process.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/process.c 2014-04-28 00:39:28.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/process.c 2014-04-28 00:42:00.000000000 +0000 +@@ -174,7 +174,7 @@ + default_idle(); + } + +-static char reboot_mode = 'h'; ++char reboot_mode = 'h'; + + int __init reboot_setup(char *str) + { +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,34 @@ ++menu "Broadcom BCM2708 Implementations" ++ depends on ARCH_BCM2708 ++ ++config MACH_BCM2708 ++ bool "Broadcom BCM2708 Development Platform" ++ select NEED_MACH_MEMORY_H ++ select NEED_MACH_IO_H ++ select CPU_V6 ++ help ++ Include support for the Broadcom(R) BCM2708 platform. ++ ++config BCM2708_GPIO ++ bool "BCM2708 gpio support" ++ depends on MACH_BCM2708 ++ select ARCH_REQUIRE_GPIOLIB ++ default y ++ help ++ Include support for the Broadcom(R) BCM2708 gpio. ++ ++config BCM2708_VCMEM ++ bool "Videocore Memory" ++ depends on MACH_BCM2708 ++ default y ++ help ++ Helper for videocore memory access and total size allocation. ++ ++config BCM2708_NOL2CACHE ++ bool "Videocore L2 cache disable" ++ depends on MACH_BCM2708 ++ default n ++ help ++ Do not allow ARM to use GPU's L2 cache. Requires disable_l2cache in config.txt. ++ ++endmenu +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,8 @@ ++# ++# Makefile for the linux kernel. ++# ++ ++obj-$(CONFIG_MACH_BCM2708) += clock.o bcm2708.o armctrl.o vcio.o power.o dma.o ++obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o ++obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile.boot +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile.boot 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,3 @@ ++ zreladdr-y := 0x00008000 ++params_phys-y := 0x00000100 ++initrd_phys-y := 0x00800000 +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,208 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/armctrl.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include "armctrl.h" ++ ++/* For support of kernels >= 3.0 assume only one VIC for now*/ ++static unsigned int remap_irqs[(INTERRUPT_ARASANSDIO + 1) - INTERRUPT_JPEG] = { ++ INTERRUPT_VC_JPEG, ++ INTERRUPT_VC_USB, ++ INTERRUPT_VC_3D, ++ INTERRUPT_VC_DMA2, ++ INTERRUPT_VC_DMA3, ++ INTERRUPT_VC_I2C, ++ INTERRUPT_VC_SPI, ++ INTERRUPT_VC_I2SPCM, ++ INTERRUPT_VC_SDIO, ++ INTERRUPT_VC_UART, ++ INTERRUPT_VC_ARASANSDIO ++}; ++ ++static void armctrl_mask_irq(struct irq_data *d) ++{ ++ static const unsigned int disables[4] = { ++ ARM_IRQ_DIBL1, ++ ARM_IRQ_DIBL2, ++ ARM_IRQ_DIBL3, ++ 0 ++ }; ++ ++ unsigned int data = (unsigned int)irq_get_chip_data(d->irq); ++ writel(1 << (data & 0x1f), __io_address(disables[(data >> 5) & 0x3])); ++} ++ ++static void armctrl_unmask_irq(struct irq_data *d) ++{ ++ static const unsigned int enables[4] = { ++ ARM_IRQ_ENBL1, ++ ARM_IRQ_ENBL2, ++ ARM_IRQ_ENBL3, ++ 0 ++ }; ++ ++ unsigned int data = (unsigned int)irq_get_chip_data(d->irq); ++ writel(1 << (data & 0x1f), __io_address(enables[(data >> 5) & 0x3])); ++} ++ ++#if defined(CONFIG_PM) ++ ++/* for kernels 3.xx use the new syscore_ops apis but for older kernels use the sys dev class */ ++ ++/* Static defines ++ * struct armctrl_device - VIC PM device (< 3.xx) ++ * @sysdev: The system device which is registered. (< 3.xx) ++ * @irq: The IRQ number for the base of the VIC. ++ * @base: The register base for the VIC. ++ * @resume_sources: A bitmask of interrupts for resume. ++ * @resume_irqs: The IRQs enabled for resume. ++ * @int_select: Save for VIC_INT_SELECT. ++ * @int_enable: Save for VIC_INT_ENABLE. ++ * @soft_int: Save for VIC_INT_SOFT. ++ * @protect: Save for VIC_PROTECT. ++ */ ++struct armctrl_info { ++ void __iomem *base; ++ int irq; ++ u32 resume_sources; ++ u32 resume_irqs; ++ u32 int_select; ++ u32 int_enable; ++ u32 soft_int; ++ u32 protect; ++} armctrl; ++ ++static int armctrl_suspend(void) ++{ ++ return 0; ++} ++ ++static void armctrl_resume(void) ++{ ++ return; ++} ++ ++/** ++ * armctrl_pm_register - Register a VIC for later power management control ++ * @base: The base address of the VIC. ++ * @irq: The base IRQ for the VIC. ++ * @resume_sources: bitmask of interrupts allowed for resume sources. ++ * ++ * For older kernels (< 3.xx) do - ++ * Register the VIC with the system device tree so that it can be notified ++ * of suspend and resume requests and ensure that the correct actions are ++ * taken to re-instate the settings on resume. ++ */ ++static void __init armctrl_pm_register(void __iomem * base, unsigned int irq, ++ u32 resume_sources) ++{ ++ armctrl.base = base; ++ armctrl.resume_sources = resume_sources; ++ armctrl.irq = irq; ++} ++ ++static int armctrl_set_wake(struct irq_data *d, unsigned int on) ++{ ++ unsigned int off = d->irq & 31; ++ u32 bit = 1 << off; ++ ++ if (!(bit & armctrl.resume_sources)) ++ return -EINVAL; ++ ++ if (on) ++ armctrl.resume_irqs |= bit; ++ else ++ armctrl.resume_irqs &= ~bit; ++ ++ return 0; ++} ++ ++#else ++static inline void armctrl_pm_register(void __iomem * base, unsigned int irq, ++ u32 arg1) ++{ ++} ++ ++#define armctrl_suspend NULL ++#define armctrl_resume NULL ++#define armctrl_set_wake NULL ++#endif /* CONFIG_PM */ ++ ++static struct syscore_ops armctrl_syscore_ops = { ++ .suspend = armctrl_suspend, ++ .resume = armctrl_resume, ++}; ++ ++/** ++ * armctrl_syscore_init - initicall to register VIC pm functions ++ * ++ * This is called via late_initcall() to register ++ * the resources for the VICs due to the early ++ * nature of the VIC's registration. ++*/ ++static int __init armctrl_syscore_init(void) ++{ ++ register_syscore_ops(&armctrl_syscore_ops); ++ return 0; ++} ++ ++late_initcall(armctrl_syscore_init); ++ ++static struct irq_chip armctrl_chip = { ++ .name = "ARMCTRL", ++ .irq_ack = armctrl_mask_irq, ++ .irq_mask = armctrl_mask_irq, ++ .irq_unmask = armctrl_unmask_irq, ++ .irq_set_wake = armctrl_set_wake, ++}; ++ ++/** ++ * armctrl_init - initialise a vectored interrupt controller ++ * @base: iomem base address ++ * @irq_start: starting interrupt number, must be muliple of 32 ++ * @armctrl_sources: bitmask of interrupt sources to allow ++ * @resume_sources: bitmask of interrupt sources to allow for resume ++ */ ++int __init armctrl_init(void __iomem * base, unsigned int irq_start, ++ u32 armctrl_sources, u32 resume_sources) ++{ ++ unsigned int irq; ++ ++ for (irq = 0; irq < NR_IRQS; irq++) { ++ unsigned int data = irq; ++ if (irq >= INTERRUPT_JPEG && irq <= INTERRUPT_ARASANSDIO) ++ data = remap_irqs[irq - INTERRUPT_JPEG]; ++ ++ irq_set_chip(irq, &armctrl_chip); ++ irq_set_chip_data(irq, (void *)data); ++ irq_set_handler(irq, handle_level_irq); ++ set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_DISABLED); ++ } ++ ++ armctrl_pm_register(base, irq_start, resume_sources); ++ return 0; ++} +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,27 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/armctrl.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef __BCM2708_ARMCTRL_H ++#define __BCM2708_ARMCTRL_H ++ ++extern int __init armctrl_init(void __iomem * base, unsigned int irq_start, ++ u32 armctrl_sources, u32 resume_sources); ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,695 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/bcm2708.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "bcm2708.h" ++#include "armctrl.h" ++#include "clock.h" ++ ++/* Effectively we have an IOMMU (ARM<->VideoCore map) that is set up to ++ * give us IO access only to 64Mbytes of physical memory (26 bits). We could ++ * represent this window by setting our dmamasks to 26 bits but, in fact ++ * we're not going to use addresses outside this range (they're not in real ++ * memory) so we don't bother. ++ * ++ * In the future we might include code to use this IOMMU to remap other ++ * physical addresses onto VideoCore memory then the use of 32-bits would be ++ * more legitimate. ++ */ ++#define DMA_MASK_BITS_COMMON 32 ++ ++/* command line parameters */ ++static unsigned boardrev, serial; ++static unsigned uart_clock; ++static unsigned reboot_part = 0; ++ ++static void __init bcm2708_init_led(void); ++ ++void __init bcm2708_init_irq(void) ++{ ++ armctrl_init(__io_address(ARMCTRL_IC_BASE), 0, 0, 0); ++} ++ ++static struct map_desc bcm2708_io_desc[] __initdata = { ++ { ++ .virtual = IO_ADDRESS(ARMCTRL_BASE), ++ .pfn = __phys_to_pfn(ARMCTRL_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(UART0_BASE), ++ .pfn = __phys_to_pfn(UART0_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(UART1_BASE), ++ .pfn = __phys_to_pfn(UART1_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(DMA_BASE), ++ .pfn = __phys_to_pfn(DMA_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(MCORE_BASE), ++ .pfn = __phys_to_pfn(MCORE_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(ST_BASE), ++ .pfn = __phys_to_pfn(ST_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(USB_BASE), ++ .pfn = __phys_to_pfn(USB_BASE), ++ .length = SZ_128K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(PM_BASE), ++ .pfn = __phys_to_pfn(PM_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE}, ++ { ++ .virtual = IO_ADDRESS(GPIO_BASE), ++ .pfn = __phys_to_pfn(GPIO_BASE), ++ .length = SZ_4K, ++ .type = MT_DEVICE} ++}; ++ ++void __init bcm2708_map_io(void) ++{ ++ iotable_init(bcm2708_io_desc, ARRAY_SIZE(bcm2708_io_desc)); ++} ++ ++/* The STC is a free running counter that increments at the rate of 1MHz */ ++#define STC_FREQ_HZ 1000000 ++ ++static inline uint32_t timer_read(void) ++{ ++ /* STC: a free running counter that increments at the rate of 1MHz */ ++ return readl(__io_address(ST_BASE + 0x04)); ++} ++ ++static unsigned long bcm2708_read_current_timer(void) ++{ ++ return timer_read(); ++} ++ ++static u32 notrace bcm2708_read_sched_clock(void) ++{ ++ return timer_read(); ++} ++ ++static cycle_t clksrc_read(struct clocksource *cs) ++{ ++ return timer_read(); ++} ++ ++static struct clocksource clocksource_stc = { ++ .name = "stc", ++ .rating = 300, ++ .read = clksrc_read, ++ .mask = CLOCKSOURCE_MASK(32), ++ .flags = CLOCK_SOURCE_IS_CONTINUOUS, ++}; ++ ++unsigned long frc_clock_ticks32(void) ++{ ++ return timer_read(); ++} ++ ++static void __init bcm2708_clocksource_init(void) ++{ ++ if (clocksource_register_hz(&clocksource_stc, STC_FREQ_HZ)) { ++ printk(KERN_ERR "timer: failed to initialize clock " ++ "source %s\n", clocksource_stc.name); ++ } ++} ++ ++ ++/* ++ * These are fixed clocks. ++ */ ++static struct clk ref24_clk = { ++ .rate = UART0_CLOCK, /* The UART is clocked at 3MHz via APB_CLK */ ++}; ++ ++static struct clk osc_clk = { ++#ifdef CONFIG_ARCH_BCM2708_CHIPIT ++ .rate = 27000000, ++#else ++ .rate = 500000000, /* ARM clock is set from the VideoCore booter */ ++#endif ++}; ++ ++/* warning - the USB needs a clock > 34MHz */ ++ ++#ifdef CONFIG_MMC_BCM2708 ++static struct clk sdhost_clk = { ++#ifdef CONFIG_ARCH_BCM2708_CHIPIT ++ .rate = 4000000, /* 4MHz */ ++#else ++ .rate = 250000000, /* 250MHz */ ++#endif ++}; ++#endif ++ ++static struct clk_lookup lookups[] = { ++ { /* UART0 */ ++ .dev_id = "dev:f1", ++ .clk = &ref24_clk, ++ }, ++ { /* USB */ ++ .dev_id = "bcm2708_usb", ++ .clk = &osc_clk, ++ } ++}; ++ ++#define UART0_IRQ { IRQ_UART, 0 /*NO_IRQ*/ } ++#define UART0_DMA { 15, 14 } ++ ++AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); ++ ++static struct amba_device *amba_devs[] __initdata = { ++ &uart0_device, ++}; ++ ++static struct resource bcm2708_dmaman_resources[] = { ++ { ++ .start = DMA_BASE, ++ .end = DMA_BASE + SZ_4K - 1, ++ .flags = IORESOURCE_MEM, ++ } ++}; ++ ++static struct platform_device bcm2708_dmaman_device = { ++ .name = BCM_DMAMAN_DRIVER_NAME, ++ .id = 0, /* first bcm2708_dma */ ++ .resource = bcm2708_dmaman_resources, ++ .num_resources = ARRAY_SIZE(bcm2708_dmaman_resources), ++}; ++ ++static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++static struct platform_device bcm2708_fb_device = { ++ .name = "bcm2708_fb", ++ .id = -1, /* only one bcm2708_fb */ ++ .resource = NULL, ++ .num_resources = 0, ++ .dev = { ++ .dma_mask = &fb_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), ++ }, ++}; ++ ++static struct plat_serial8250_port bcm2708_uart1_platform_data[] = { ++ { ++ .mapbase = UART1_BASE + 0x40, ++ .irq = IRQ_AUX, ++ .uartclk = 125000000, ++ .regshift = 2, ++ .iotype = UPIO_MEM, ++ .flags = UPF_FIXED_TYPE | UPF_IOREMAP | UPF_SKIP_TEST, ++ .type = PORT_8250, ++ }, ++ {}, ++}; ++ ++static struct platform_device bcm2708_uart1_device = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM, ++ .dev = { ++ .platform_data = bcm2708_uart1_platform_data, ++ }, ++}; ++ ++static struct resource bcm2708_usb_resources[] = { ++ [0] = { ++ .start = USB_BASE, ++ .end = USB_BASE + SZ_128K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = IRQ_USB, ++ .end = IRQ_USB, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++static struct platform_device bcm2708_usb_device = { ++ .name = "bcm2708_usb", ++ .id = -1, /* only one bcm2708_usb */ ++ .resource = bcm2708_usb_resources, ++ .num_resources = ARRAY_SIZE(bcm2708_usb_resources), ++ .dev = { ++ .dma_mask = &usb_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), ++ }, ++}; ++ ++static struct resource bcm2708_vcio_resources[] = { ++ [0] = { /* mailbox/semaphore/doorbell access */ ++ .start = MCORE_BASE, ++ .end = MCORE_BASE + SZ_4K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static u64 vcio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++static struct platform_device bcm2708_vcio_device = { ++ .name = BCM_VCIO_DRIVER_NAME, ++ .id = -1, /* only one VideoCore I/O area */ ++ .resource = bcm2708_vcio_resources, ++ .num_resources = ARRAY_SIZE(bcm2708_vcio_resources), ++ .dev = { ++ .dma_mask = &vcio_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), ++ }, ++}; ++ ++#ifdef CONFIG_BCM2708_GPIO ++#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" ++ ++static struct resource bcm2708_gpio_resources[] = { ++ [0] = { /* general purpose I/O */ ++ .start = GPIO_BASE, ++ .end = GPIO_BASE + SZ_4K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++static struct platform_device bcm2708_gpio_device = { ++ .name = BCM_GPIO_DRIVER_NAME, ++ .id = -1, /* only one VideoCore I/O area */ ++ .resource = bcm2708_gpio_resources, ++ .num_resources = ARRAY_SIZE(bcm2708_gpio_resources), ++ .dev = { ++ .dma_mask = &gpio_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), ++ }, ++}; ++#endif ++ ++static struct resource bcm2708_systemtimer_resources[] = { ++ [0] = { /* system timer access */ ++ .start = ST_BASE, ++ .end = ST_BASE + SZ_4K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = IRQ_TIMER3, ++ .end = IRQ_TIMER3, ++ .flags = IORESOURCE_IRQ, ++ } ++ ++}; ++ ++static u64 systemtimer_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++static struct platform_device bcm2708_systemtimer_device = { ++ .name = "bcm2708_systemtimer", ++ .id = -1, /* only one VideoCore I/O area */ ++ .resource = bcm2708_systemtimer_resources, ++ .num_resources = ARRAY_SIZE(bcm2708_systemtimer_resources), ++ .dev = { ++ .dma_mask = &systemtimer_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), ++ }, ++}; ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708 /* Arasan emmc SD */ ++static struct resource bcm2708_emmc_resources[] = { ++ [0] = { ++ .start = EMMC_BASE, ++ .end = EMMC_BASE + SZ_256 - 1, /* we only need this area */ ++ /* the memory map actually makes SZ_4K available */ ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = IRQ_ARASANSDIO, ++ .end = IRQ_ARASANSDIO, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 bcm2708_emmc_dmamask = 0xffffffffUL; ++ ++struct platform_device bcm2708_emmc_device = { ++ .name = "bcm2708_sdhci", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(bcm2708_emmc_resources), ++ .resource = bcm2708_emmc_resources, ++ .dev = { ++ .dma_mask = &bcm2708_emmc_dmamask, ++ .coherent_dma_mask = 0xffffffffUL}, ++}; ++#endif /* CONFIG_MMC_SDHCI_BCM2708 */ ++ ++static struct resource bcm2708_powerman_resources[] = { ++ [0] = { ++ .start = PM_BASE, ++ .end = PM_BASE + SZ_256 - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static u64 powerman_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++ ++struct platform_device bcm2708_powerman_device = { ++ .name = "bcm2708_powerman", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(bcm2708_powerman_resources), ++ .resource = bcm2708_powerman_resources, ++ .dev = { ++ .dma_mask = &powerman_dmamask, ++ .coherent_dma_mask = 0xffffffffUL}, ++}; ++ ++int __init bcm_register_device(struct platform_device *pdev) ++{ ++ int ret; ++ ++ ret = platform_device_register(pdev); ++ if (ret) ++ pr_debug("Unable to register platform device '%s': %d\n", ++ pdev->name, ret); ++ ++ return ret; ++} ++ ++int calc_rsts(int partition) ++{ ++ return PM_PASSWORD | ++ ((partition & (1 << 0)) << 0) | ++ ((partition & (1 << 1)) << 1) | ++ ((partition & (1 << 2)) << 2) | ++ ((partition & (1 << 3)) << 3) | ++ ((partition & (1 << 4)) << 4) | ++ ((partition & (1 << 5)) << 5); ++} ++ ++static void bcm2708_restart(char mode, const char *cmd) ++{ ++ uint32_t pm_rstc, pm_wdog; ++ uint32_t timeout = 10; ++ uint32_t pm_rsts = 0; ++ ++ if(mode == 'q') ++ { ++ // NOOBS < 1.3 booting with reboot=q ++ pm_rsts = readl(__io_address(PM_RSTS)); ++ pm_rsts = PM_PASSWORD | pm_rsts | PM_RSTS_HADWRQ_SET; ++ } ++ else if(mode == 'p') ++ { ++ // NOOBS < 1.3 halting ++ pm_rsts = readl(__io_address(PM_RSTS)); ++ pm_rsts = PM_PASSWORD | pm_rsts | PM_RSTS_HADWRH_SET; ++ } ++ else ++ { ++ pm_rsts = calc_rsts(reboot_part); ++ } ++ ++ writel(pm_rsts, __io_address(PM_RSTS)); ++ ++ /* Setup watchdog for reset */ ++ pm_rstc = readl(__io_address(PM_RSTC)); ++ ++ pm_wdog = PM_PASSWORD | (timeout & PM_WDOG_TIME_SET); // watchdog timer = timer clock / 16; need password (31:16) + value (11:0) ++ pm_rstc = PM_PASSWORD | (pm_rstc & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET; ++ ++ writel(pm_wdog, __io_address(PM_WDOG)); ++ writel(pm_rstc, __io_address(PM_RSTC)); ++} ++ ++/* We can't really power off, but if we do the normal reset scheme, and indicate to bootcode.bin not to reboot, then most of the chip will be powered off */ ++static void bcm2708_power_off(void) ++{ ++ extern char reboot_mode; ++ ++ if(reboot_mode == 'q') ++ { ++ // NOOBS < v1.3 ++ bcm2708_restart('p', ""); ++ } ++ else ++ { ++ /* partition 63 is special code for HALT the bootloader knows not to boot*/ ++ reboot_part = 63; ++ /* continue with normal reset mechanism */ ++ bcm2708_restart(0, ""); ++ } ++} ++ ++void __init bcm2708_init(void) ++{ ++ int i; ++ ++ printk("bcm2708.uart_clock = %d\n", uart_clock); ++ pm_power_off = bcm2708_power_off; ++ ++ if (uart_clock) ++ lookups[0].clk->rate = uart_clock; ++ ++ for (i = 0; i < ARRAY_SIZE(lookups); i++) ++ clkdev_add(&lookups[i]); ++ ++ bcm_register_device(&bcm2708_dmaman_device); ++ bcm_register_device(&bcm2708_vcio_device); ++#ifdef CONFIG_BCM2708_GPIO ++ bcm_register_device(&bcm2708_gpio_device); ++#endif ++ bcm_register_device(&bcm2708_systemtimer_device); ++ bcm_register_device(&bcm2708_fb_device); ++ bcm_register_device(&bcm2708_usb_device); ++ bcm_register_device(&bcm2708_uart1_device); ++ bcm_register_device(&bcm2708_powerman_device); ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708 ++ bcm_register_device(&bcm2708_emmc_device); ++#endif ++ bcm2708_init_led(); ++ ++ for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { ++ struct amba_device *d = amba_devs[i]; ++ amba_device_register(d, &iomem_resource); ++ } ++ system_rev = boardrev; ++ system_serial_low = serial; ++} ++ ++static void timer_set_mode(enum clock_event_mode mode, ++ struct clock_event_device *clk) ++{ ++ switch (mode) { ++ case CLOCK_EVT_MODE_ONESHOT: /* Leave the timer disabled, .set_next_event will enable it */ ++ case CLOCK_EVT_MODE_SHUTDOWN: ++ break; ++ case CLOCK_EVT_MODE_PERIODIC: ++ ++ case CLOCK_EVT_MODE_UNUSED: ++ case CLOCK_EVT_MODE_RESUME: ++ ++ default: ++ printk(KERN_ERR "timer_set_mode: unhandled mode:%d\n", ++ (int)mode); ++ break; ++ } ++ ++} ++ ++static int timer_set_next_event(unsigned long cycles, ++ struct clock_event_device *unused) ++{ ++ unsigned long stc; ++ ++ stc = readl(__io_address(ST_BASE + 0x04)); ++ writel(stc + cycles, __io_address(ST_BASE + 0x18)); /* stc3 */ ++ return 0; ++} ++ ++static struct clock_event_device timer0_clockevent = { ++ .name = "timer0", ++ .shift = 32, ++ .features = CLOCK_EVT_FEAT_ONESHOT, ++ .set_mode = timer_set_mode, ++ .set_next_event = timer_set_next_event, ++}; ++ ++/* ++ * IRQ handler for the timer ++ */ ++static irqreturn_t bcm2708_timer_interrupt(int irq, void *dev_id) ++{ ++ struct clock_event_device *evt = &timer0_clockevent; ++ ++ writel(1 << 3, __io_address(ST_BASE + 0x00)); /* stcs clear timer int */ ++ ++ evt->event_handler(evt); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bcm2708_timer_irq = { ++ .name = "BCM2708 Timer Tick", ++ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, ++ .handler = bcm2708_timer_interrupt, ++}; ++ ++/* ++ * Set up timer interrupt, and return the current time in seconds. ++ */ ++ ++static struct delay_timer bcm2708_delay_timer = { ++ .read_current_timer = bcm2708_read_current_timer, ++ .freq = STC_FREQ_HZ, ++}; ++ ++static void __init bcm2708_timer_init(void) ++{ ++ /* init high res timer */ ++ bcm2708_clocksource_init(); ++ ++ /* ++ * Initialise to a known state (all timers off) ++ */ ++ writel(0, __io_address(ARM_T_CONTROL)); ++ /* ++ * Make irqs happen for the system timer ++ */ ++ setup_irq(IRQ_TIMER3, &bcm2708_timer_irq); ++ ++ setup_sched_clock(bcm2708_read_sched_clock, 32, STC_FREQ_HZ); ++ ++ timer0_clockevent.mult = ++ div_sc(STC_FREQ_HZ, NSEC_PER_SEC, timer0_clockevent.shift); ++ timer0_clockevent.max_delta_ns = ++ clockevent_delta2ns(0xffffffff, &timer0_clockevent); ++ timer0_clockevent.min_delta_ns = ++ clockevent_delta2ns(0xf, &timer0_clockevent); ++ ++ timer0_clockevent.cpumask = cpumask_of(0); ++ clockevents_register_device(&timer0_clockevent); ++ ++ register_current_timer_delay(&bcm2708_delay_timer); ++} ++ ++#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) ++#include ++ ++static struct gpio_led bcm2708_leds[] = { ++ [0] = { ++ .gpio = 16, ++ .name = "led0", ++ .default_trigger = "mmc0", ++ .active_low = 1, ++ }, ++}; ++ ++static struct gpio_led_platform_data bcm2708_led_pdata = { ++ .num_leds = ARRAY_SIZE(bcm2708_leds), ++ .leds = bcm2708_leds, ++}; ++ ++static struct platform_device bcm2708_led_device = { ++ .name = "leds-gpio", ++ .id = -1, ++ .dev = { ++ .platform_data = &bcm2708_led_pdata, ++ }, ++}; ++ ++static void __init bcm2708_init_led(void) ++{ ++ platform_device_register(&bcm2708_led_device); ++} ++#else ++static inline void bcm2708_init_led(void) ++{ ++} ++#endif ++ ++void __init bcm2708_init_early(void) ++{ ++ /* ++ * Some devices allocate their coherent buffers from atomic ++ * context. Increase size of atomic coherent pool to make sure such ++ * the allocations won't fail. ++ */ ++ init_dma_coherent_pool_size(SZ_4M); ++} ++ ++MACHINE_START(BCM2708, "BCM2708") ++ /* Maintainer: Broadcom Europe Ltd. */ ++ .map_io = bcm2708_map_io, ++ .init_irq = bcm2708_init_irq, ++ .init_time = bcm2708_timer_init, ++ .init_machine = bcm2708_init, ++ .init_early = bcm2708_init_early, ++ .restart = bcm2708_restart, ++MACHINE_END ++ ++module_param(boardrev, uint, 0644); ++module_param(serial, uint, 0644); ++module_param(uart_clock, uint, 0644); ++module_param(reboot_part, uint, 0644); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,51 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/bcm2708.h ++ * ++ * BCM2708 machine support header ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef __BCM2708_BCM2708_H ++#define __BCM2708_BCM2708_H ++ ++#include ++ ++extern void __init bcm2708_init(void); ++extern void __init bcm2708_init_irq(void); ++extern void __init bcm2708_map_io(void); ++extern struct sys_timer bcm2708_timer; ++extern unsigned int mmc_status(struct device *dev); ++ ++#define AMBA_DEVICE(name, busid, base, plat) \ ++static struct amba_device name##_device = { \ ++ .dev = { \ ++ .coherent_dma_mask = ~0, \ ++ .init_name = busid, \ ++ .platform_data = plat, \ ++ }, \ ++ .res = { \ ++ .start = base##_BASE, \ ++ .end = (base##_BASE) + SZ_4K - 1,\ ++ .flags = IORESOURCE_MEM, \ ++ }, \ ++ .dma_mask = ~0, \ ++ .irq = base##_IRQ, \ ++ /* .dma = base##_DMA,*/ \ ++} ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708_gpio.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708_gpio.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,339 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/bcm2708_gpio.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" ++#define DRIVER_NAME BCM_GPIO_DRIVER_NAME ++#define BCM_GPIO_USE_IRQ 1 ++ ++#define GPIOFSEL(x) (0x00+(x)*4) ++#define GPIOSET(x) (0x1c+(x)*4) ++#define GPIOCLR(x) (0x28+(x)*4) ++#define GPIOLEV(x) (0x34+(x)*4) ++#define GPIOEDS(x) (0x40+(x)*4) ++#define GPIOREN(x) (0x4c+(x)*4) ++#define GPIOFEN(x) (0x58+(x)*4) ++#define GPIOHEN(x) (0x64+(x)*4) ++#define GPIOLEN(x) (0x70+(x)*4) ++#define GPIOAREN(x) (0x7c+(x)*4) ++#define GPIOAFEN(x) (0x88+(x)*4) ++#define GPIOUD(x) (0x94+(x)*4) ++#define GPIOUDCLK(x) (0x98+(x)*4) ++ ++enum { GPIO_FSEL_INPUT, GPIO_FSEL_OUTPUT, ++ GPIO_FSEL_ALT5, GPIO_FSEL_ALT_4, ++ GPIO_FSEL_ALT0, GPIO_FSEL_ALT1, ++ GPIO_FSEL_ALT2, GPIO_FSEL_ALT3, ++}; ++ ++ /* Each of the two spinlocks protects a different set of hardware ++ * regiters and data structurs. This decouples the code of the IRQ from ++ * the GPIO code. This also makes the case of a GPIO routine call from ++ * the IRQ code simpler. ++ */ ++static DEFINE_SPINLOCK(lock); /* GPIO registers */ ++ ++struct bcm2708_gpio { ++ struct list_head list; ++ void __iomem *base; ++ struct gpio_chip gc; ++ unsigned long rising; ++ unsigned long falling; ++}; ++ ++static int bcm2708_set_function(struct gpio_chip *gc, unsigned offset, ++ int function) ++{ ++ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); ++ unsigned long flags; ++ unsigned gpiodir; ++ unsigned gpio_bank = offset / 10; ++ unsigned gpio_field_offset = (offset - 10 * gpio_bank) * 3; ++ ++//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set_function %p (%d,%d)\n", gc, offset, function); ++ if (offset >= ARCH_NR_GPIOS) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); ++ gpiodir &= ~(7 << gpio_field_offset); ++ gpiodir |= function << gpio_field_offset; ++ writel(gpiodir, gpio->base + GPIOFSEL(gpio_bank)); ++ spin_unlock_irqrestore(&lock, flags); ++ gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); ++ ++ return 0; ++} ++ ++static int bcm2708_gpio_dir_in(struct gpio_chip *gc, unsigned offset) ++{ ++ return bcm2708_set_function(gc, offset, GPIO_FSEL_INPUT); ++} ++ ++static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value); ++static int bcm2708_gpio_dir_out(struct gpio_chip *gc, unsigned offset, ++ int value) ++{ ++ int ret; ++ ret = bcm2708_set_function(gc, offset, GPIO_FSEL_OUTPUT); ++ if (ret >= 0) ++ bcm2708_gpio_set(gc, offset, value); ++ return ret; ++} ++ ++static int bcm2708_gpio_get(struct gpio_chip *gc, unsigned offset) ++{ ++ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); ++ unsigned gpio_bank = offset / 32; ++ unsigned gpio_field_offset = (offset - 32 * gpio_bank); ++ unsigned lev; ++ ++ if (offset >= ARCH_NR_GPIOS) ++ return 0; ++ lev = readl(gpio->base + GPIOLEV(gpio_bank)); ++//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_get %p (%d)=%d\n", gc, offset, 0x1 & (lev>>gpio_field_offset)); ++ return 0x1 & (lev >> gpio_field_offset); ++} ++ ++static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value) ++{ ++ struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); ++ unsigned gpio_bank = offset / 32; ++ unsigned gpio_field_offset = (offset - 32 * gpio_bank); ++//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set %p (%d=%d)\n", gc, offset, value); ++ if (offset >= ARCH_NR_GPIOS) ++ return; ++ if (value) ++ writel(1 << gpio_field_offset, gpio->base + GPIOSET(gpio_bank)); ++ else ++ writel(1 << gpio_field_offset, gpio->base + GPIOCLR(gpio_bank)); ++} ++ ++/************************************************************************************************************************* ++ * bcm2708 GPIO IRQ ++ */ ++ ++#if BCM_GPIO_USE_IRQ ++ ++static int bcm2708_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ return gpio_to_irq(gpio); ++} ++ ++static int bcm2708_gpio_irq_set_type(struct irq_data *d, unsigned type) ++{ ++ unsigned irq = d->irq; ++ struct bcm2708_gpio *gpio = irq_get_chip_data(irq); ++ ++ if (type & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) ++ return -EINVAL; ++ ++ if (type & IRQ_TYPE_EDGE_RISING) { ++ gpio->rising |= (1 << irq_to_gpio(irq)); ++ } else { ++ gpio->rising &= ~(1 << irq_to_gpio(irq)); ++ } ++ ++ if (type & IRQ_TYPE_EDGE_FALLING) { ++ gpio->falling |= (1 << irq_to_gpio(irq)); ++ } else { ++ gpio->falling &= ~(1 << irq_to_gpio(irq)); ++ } ++ return 0; ++} ++ ++static void bcm2708_gpio_irq_mask(struct irq_data *d) ++{ ++ unsigned irq = d->irq; ++ struct bcm2708_gpio *gpio = irq_get_chip_data(irq); ++ unsigned gn = irq_to_gpio(irq); ++ unsigned gb = gn / 32; ++ unsigned long rising = readl(gpio->base + GPIOREN(gb)); ++ unsigned long falling = readl(gpio->base + GPIOFEN(gb)); ++ ++ gn = gn % 32; ++ ++ writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb)); ++ writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb)); ++} ++ ++static void bcm2708_gpio_irq_unmask(struct irq_data *d) ++{ ++ unsigned irq = d->irq; ++ struct bcm2708_gpio *gpio = irq_get_chip_data(irq); ++ unsigned gn = irq_to_gpio(irq); ++ unsigned gb = gn / 32; ++ unsigned long rising = readl(gpio->base + GPIOREN(gb)); ++ unsigned long falling = readl(gpio->base + GPIOFEN(gb)); ++ ++ gn = gn % 32; ++ ++ writel(1 << gn, gpio->base + GPIOEDS(gb)); ++ ++ if (gpio->rising & (1 << gn)) { ++ writel(rising | (1 << gn), gpio->base + GPIOREN(gb)); ++ } else { ++ writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb)); ++ } ++ ++ if (gpio->falling & (1 << gn)) { ++ writel(falling | (1 << gn), gpio->base + GPIOFEN(gb)); ++ } else { ++ writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb)); ++ } ++} ++ ++static struct irq_chip bcm2708_irqchip = { ++ .name = "GPIO", ++ .irq_enable = bcm2708_gpio_irq_unmask, ++ .irq_disable = bcm2708_gpio_irq_mask, ++ .irq_unmask = bcm2708_gpio_irq_unmask, ++ .irq_mask = bcm2708_gpio_irq_mask, ++ .irq_set_type = bcm2708_gpio_irq_set_type, ++}; ++ ++static irqreturn_t bcm2708_gpio_interrupt(int irq, void *dev_id) ++{ ++ unsigned long edsr; ++ unsigned bank; ++ int i; ++ unsigned gpio; ++ for (bank = 0; bank <= 1; bank++) { ++ edsr = readl(__io_address(GPIO_BASE) + GPIOEDS(bank)); ++ for_each_set_bit(i, &edsr, 32) { ++ gpio = i + bank * 32; ++ generic_handle_irq(gpio_to_irq(gpio)); ++ } ++ writel(0xffffffff, __io_address(GPIO_BASE) + GPIOEDS(bank)); ++ } ++ return IRQ_HANDLED; ++} ++ ++static struct irqaction bcm2708_gpio_irq = { ++ .name = "BCM2708 GPIO catchall handler", ++ .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, ++ .handler = bcm2708_gpio_interrupt, ++}; ++ ++static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb) ++{ ++ unsigned irq; ++ ++ ucb->gc.to_irq = bcm2708_gpio_to_irq; ++ ++ for (irq = GPIO_IRQ_START; irq < (GPIO_IRQ_START + GPIO_IRQS); irq++) { ++ irq_set_chip_data(irq, ucb); ++ irq_set_chip(irq, &bcm2708_irqchip); ++ set_irq_flags(irq, IRQF_VALID); ++ } ++ setup_irq(IRQ_GPIO3, &bcm2708_gpio_irq); ++} ++ ++#else ++ ++static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb) ++{ ++} ++ ++#endif /* #if BCM_GPIO_USE_IRQ ***************************************************************************************************************** */ ++ ++static int bcm2708_gpio_probe(struct platform_device *dev) ++{ ++ struct bcm2708_gpio *ucb; ++ struct resource *res; ++ int err = 0; ++ ++ printk(KERN_INFO DRIVER_NAME ": bcm2708_gpio_probe %p\n", dev); ++ ++ ucb = kzalloc(sizeof(*ucb), GFP_KERNEL); ++ if (NULL == ucb) { ++ printk(KERN_ERR DRIVER_NAME ": failed to allocate " ++ "mailbox memory\n"); ++ err = -ENOMEM; ++ goto err; ++ } ++ ++ res = platform_get_resource(dev, IORESOURCE_MEM, 0); ++ ++ platform_set_drvdata(dev, ucb); ++ ucb->base = __io_address(GPIO_BASE); ++ ++ ucb->gc.label = "bcm2708_gpio"; ++ ucb->gc.base = 0; ++ ucb->gc.ngpio = ARCH_NR_GPIOS; ++ ucb->gc.owner = THIS_MODULE; ++ ++ ucb->gc.direction_input = bcm2708_gpio_dir_in; ++ ucb->gc.direction_output = bcm2708_gpio_dir_out; ++ ucb->gc.get = bcm2708_gpio_get; ++ ucb->gc.set = bcm2708_gpio_set; ++ ucb->gc.can_sleep = 0; ++ ++ bcm2708_gpio_irq_init(ucb); ++ ++ err = gpiochip_add(&ucb->gc); ++ if (err) ++ goto err; ++ ++err: ++ return err; ++ ++} ++ ++static int bcm2708_gpio_remove(struct platform_device *dev) ++{ ++ int err = 0; ++ struct bcm2708_gpio *ucb = platform_get_drvdata(dev); ++ ++ printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_remove %p\n", dev); ++ ++ err = gpiochip_remove(&ucb->gc); ++ ++ platform_set_drvdata(dev, NULL); ++ kfree(ucb); ++ ++ return err; ++} ++ ++static struct platform_driver bcm2708_gpio_driver = { ++ .probe = bcm2708_gpio_probe, ++ .remove = bcm2708_gpio_remove, ++ .driver = { ++ .name = "bcm2708_gpio"}, ++}; ++ ++static int __init bcm2708_gpio_init(void) ++{ ++ return platform_driver_register(&bcm2708_gpio_driver); ++} ++ ++static void __exit bcm2708_gpio_exit(void) ++{ ++ platform_driver_unregister(&bcm2708_gpio_driver); ++} ++ ++module_init(bcm2708_gpio_init); ++module_exit(bcm2708_gpio_exit); ++ ++MODULE_DESCRIPTION("Broadcom BCM2708 GPIO driver"); ++MODULE_LICENSE("GPL"); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/clock.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/clock.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,61 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/clock.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include "clock.h" ++ ++int clk_enable(struct clk *clk) ++{ ++ return 0; ++} ++EXPORT_SYMBOL(clk_enable); ++ ++void clk_disable(struct clk *clk) ++{ ++} ++EXPORT_SYMBOL(clk_disable); ++ ++unsigned long clk_get_rate(struct clk *clk) ++{ ++ return clk->rate; ++} ++EXPORT_SYMBOL(clk_get_rate); ++ ++long clk_round_rate(struct clk *clk, unsigned long rate) ++{ ++ return clk->rate; ++} ++EXPORT_SYMBOL(clk_round_rate); ++ ++int clk_set_rate(struct clk *clk, unsigned long rate) ++{ ++ return -EIO; ++} ++EXPORT_SYMBOL(clk_set_rate); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/clock.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/clock.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,24 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/clock.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++struct module; ++ ++struct clk { ++ unsigned long rate; ++}; +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/dma.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/dma.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,399 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/dma.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++/*****************************************************************************\ ++ * * ++ * Configuration * ++ * * ++\*****************************************************************************/ ++ ++#define CACHE_LINE_MASK 31 ++#define DRIVER_NAME BCM_DMAMAN_DRIVER_NAME ++#define DEFAULT_DMACHAN_BITMAP 0x10 /* channel 4 only */ ++ ++/* valid only for channels 0 - 14, 15 has its own base address */ ++#define BCM2708_DMA_CHAN(n) ((n)<<8) /* base address */ ++#define BCM2708_DMA_CHANIO(dma_base, n) \ ++ ((void __iomem *)((char *)(dma_base)+BCM2708_DMA_CHAN(n))) ++ ++ ++/*****************************************************************************\ ++ * * ++ * DMA Auxilliary Functions * ++ * * ++\*****************************************************************************/ ++ ++/* A DMA buffer on an arbitrary boundary may separate a cache line into a ++ section inside the DMA buffer and another section outside it. ++ Even if we flush DMA buffers from the cache there is always the chance that ++ during a DMA someone will access the part of a cache line that is outside ++ the DMA buffer - which will then bring in unwelcome data. ++ Without being able to dictate our own buffer pools we must insist that ++ DMA buffers consist of a whole number of cache lines. ++*/ ++ ++extern int ++bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len) ++{ ++ int i; ++ ++ for (i = 0; i < sg_len; i++) { ++ if (sg_ptr[i].offset & CACHE_LINE_MASK || ++ sg_ptr[i].length & CACHE_LINE_MASK) ++ return 0; ++ } ++ ++ return 1; ++} ++EXPORT_SYMBOL_GPL(bcm_sg_suitable_for_dma); ++ ++extern void ++bcm_dma_start(void __iomem *dma_chan_base, dma_addr_t control_block) ++{ ++ dsb(); /* ARM data synchronization (push) operation */ ++ ++ writel(control_block, dma_chan_base + BCM2708_DMA_ADDR); ++ writel(BCM2708_DMA_ACTIVE, dma_chan_base + BCM2708_DMA_CS); ++} ++ ++extern void bcm_dma_wait_idle(void __iomem *dma_chan_base) ++{ ++ dsb(); ++ ++ /* ugly busy wait only option for now */ ++ while (readl(dma_chan_base + BCM2708_DMA_CS) & BCM2708_DMA_ACTIVE) ++ cpu_relax(); ++} ++ ++EXPORT_SYMBOL_GPL(bcm_dma_start); ++ ++/* Complete an ongoing DMA (assuming its results are to be ignored) ++ Does nothing if there is no DMA in progress. ++ This routine waits for the current AXI transfer to complete before ++ terminating the current DMA. If the current transfer is hung on a DREQ used ++ by an uncooperative peripheral the AXI transfer may never complete. In this ++ case the routine times out and return a non-zero error code. ++ Use of this routine doesn't guarantee that the ongoing or aborted DMA ++ does not produce an interrupt. ++*/ ++extern int ++bcm_dma_abort(void __iomem *dma_chan_base) ++{ ++ unsigned long int cs; ++ int rc = 0; ++ ++ cs = readl(dma_chan_base + BCM2708_DMA_CS); ++ ++ if (BCM2708_DMA_ACTIVE & cs) { ++ long int timeout = 10000; ++ ++ /* write 0 to the active bit - pause the DMA */ ++ writel(0, dma_chan_base + BCM2708_DMA_CS); ++ ++ /* wait for any current AXI transfer to complete */ ++ while (0 != (cs & BCM2708_DMA_ISPAUSED) && --timeout >= 0) ++ cs = readl(dma_chan_base + BCM2708_DMA_CS); ++ ++ if (0 != (cs & BCM2708_DMA_ISPAUSED)) { ++ /* we'll un-pause when we set of our next DMA */ ++ rc = -ETIMEDOUT; ++ ++ } else if (BCM2708_DMA_ACTIVE & cs) { ++ /* terminate the control block chain */ ++ writel(0, dma_chan_base + BCM2708_DMA_NEXTCB); ++ ++ /* abort the whole DMA */ ++ writel(BCM2708_DMA_ABORT | BCM2708_DMA_ACTIVE, ++ dma_chan_base + BCM2708_DMA_CS); ++ } ++ } ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(bcm_dma_abort); ++ ++ ++/***************************************************************************** \ ++ * * ++ * DMA Manager Device Methods * ++ * * ++\*****************************************************************************/ ++ ++struct vc_dmaman { ++ void __iomem *dma_base; ++ u32 chan_available; /* bitmap of available channels */ ++ u32 has_feature[BCM_DMA_FEATURE_COUNT]; /* bitmap of feature presence */ ++}; ++ ++static void vc_dmaman_init(struct vc_dmaman *dmaman, void __iomem *dma_base, ++ u32 chans_available) ++{ ++ dmaman->dma_base = dma_base; ++ dmaman->chan_available = chans_available; ++ dmaman->has_feature[BCM_DMA_FEATURE_FAST_ORD] = 0x0c; /* chans 2 & 3 */ ++ dmaman->has_feature[BCM_DMA_FEATURE_BULK_ORD] = 0x01; /* chan 0 */ ++} ++ ++static int vc_dmaman_chan_alloc(struct vc_dmaman *dmaman, ++ unsigned preferred_feature_set) ++{ ++ u32 chans; ++ int feature; ++ ++ chans = dmaman->chan_available; ++ for (feature = 0; feature < BCM_DMA_FEATURE_COUNT; feature++) ++ /* select the subset of available channels with the desired ++ feature so long as some of the candidate channels have that ++ feature */ ++ if ((preferred_feature_set & (1 << feature)) && ++ (chans & dmaman->has_feature[feature])) ++ chans &= dmaman->has_feature[feature]; ++ ++ if (chans) { ++ int chan = 0; ++ /* return the ordinal of the first channel in the bitmap */ ++ while (chans != 0 && (chans & 1) == 0) { ++ chans >>= 1; ++ chan++; ++ } ++ /* claim the channel */ ++ dmaman->chan_available &= ~(1 << chan); ++ return chan; ++ } else ++ return -ENOMEM; ++} ++ ++static int vc_dmaman_chan_free(struct vc_dmaman *dmaman, int chan) ++{ ++ if (chan < 0) ++ return -EINVAL; ++ else if ((1 << chan) & dmaman->chan_available) ++ return -EIDRM; ++ else { ++ dmaman->chan_available |= (1 << chan); ++ return 0; ++ } ++} ++ ++/*****************************************************************************\ ++ * * ++ * DMA IRQs * ++ * * ++\*****************************************************************************/ ++ ++static unsigned char bcm_dma_irqs[] = { ++ IRQ_DMA0, ++ IRQ_DMA1, ++ IRQ_DMA2, ++ IRQ_DMA3, ++ IRQ_DMA4, ++ IRQ_DMA5, ++ IRQ_DMA6, ++ IRQ_DMA7, ++ IRQ_DMA8, ++ IRQ_DMA9, ++ IRQ_DMA10, ++ IRQ_DMA11, ++ IRQ_DMA12 ++}; ++ ++ ++/***************************************************************************** \ ++ * * ++ * DMA Manager Monitor * ++ * * ++\*****************************************************************************/ ++ ++static struct device *dmaman_dev; /* we assume there's only one! */ ++ ++extern int bcm_dma_chan_alloc(unsigned preferred_feature_set, ++ void __iomem **out_dma_base, int *out_dma_irq) ++{ ++ if (!dmaman_dev) ++ return -ENODEV; ++ else { ++ struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev); ++ int rc; ++ ++ device_lock(dmaman_dev); ++ rc = vc_dmaman_chan_alloc(dmaman, preferred_feature_set); ++ if (rc >= 0) { ++ *out_dma_base = BCM2708_DMA_CHANIO(dmaman->dma_base, ++ rc); ++ *out_dma_irq = bcm_dma_irqs[rc]; ++ } ++ device_unlock(dmaman_dev); ++ ++ return rc; ++ } ++} ++EXPORT_SYMBOL_GPL(bcm_dma_chan_alloc); ++ ++extern int bcm_dma_chan_free(int channel) ++{ ++ if (dmaman_dev) { ++ struct vc_dmaman *dmaman = dev_get_drvdata(dmaman_dev); ++ int rc; ++ ++ device_lock(dmaman_dev); ++ rc = vc_dmaman_chan_free(dmaman, channel); ++ device_unlock(dmaman_dev); ++ ++ return rc; ++ } else ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(bcm_dma_chan_free); ++ ++static int dev_dmaman_register(const char *dev_name, struct device *dev) ++{ ++ int rc = dmaman_dev ? -EINVAL : 0; ++ dmaman_dev = dev; ++ return rc; ++} ++ ++static void dev_dmaman_deregister(const char *dev_name, struct device *dev) ++{ ++ dmaman_dev = NULL; ++} ++ ++/*****************************************************************************\ ++ * * ++ * DMA Device * ++ * * ++\*****************************************************************************/ ++ ++static int dmachans = -1; /* module parameter */ ++ ++static int bcm_dmaman_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct vc_dmaman *dmaman; ++ struct resource *dma_res = NULL; ++ void __iomem *dma_base = NULL; ++ int have_dma_region = 0; ++ ++ dmaman = kzalloc(sizeof(*dmaman), GFP_KERNEL); ++ if (NULL == dmaman) { ++ printk(KERN_ERR DRIVER_NAME ": failed to allocate " ++ "DMA management memory\n"); ++ ret = -ENOMEM; ++ } else { ++ ++ dma_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (dma_res == NULL) { ++ printk(KERN_ERR DRIVER_NAME ": failed to obtain memory " ++ "resource\n"); ++ ret = -ENODEV; ++ } else if (!request_mem_region(dma_res->start, ++ resource_size(dma_res), ++ DRIVER_NAME)) { ++ dev_err(&pdev->dev, "cannot obtain DMA region\n"); ++ ret = -EBUSY; ++ } else { ++ have_dma_region = 1; ++ dma_base = ioremap(dma_res->start, ++ resource_size(dma_res)); ++ if (!dma_base) { ++ dev_err(&pdev->dev, "cannot map DMA region\n"); ++ ret = -ENOMEM; ++ } else { ++ /* use module parameter if one was provided */ ++ if (dmachans > 0) ++ vc_dmaman_init(dmaman, dma_base, ++ dmachans); ++ else ++ vc_dmaman_init(dmaman, dma_base, ++ DEFAULT_DMACHAN_BITMAP); ++ ++ platform_set_drvdata(pdev, dmaman); ++ dev_dmaman_register(DRIVER_NAME, &pdev->dev); ++ ++ printk(KERN_INFO DRIVER_NAME ": DMA manager " ++ "at %p\n", dma_base); ++ } ++ } ++ } ++ if (ret != 0) { ++ if (dma_base) ++ iounmap(dma_base); ++ if (dma_res && have_dma_region) ++ release_mem_region(dma_res->start, ++ resource_size(dma_res)); ++ if (dmaman) ++ kfree(dmaman); ++ } ++ return ret; ++} ++ ++static int bcm_dmaman_remove(struct platform_device *pdev) ++{ ++ struct vc_dmaman *dmaman = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ dev_dmaman_deregister(DRIVER_NAME, &pdev->dev); ++ kfree(dmaman); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm_dmaman_driver = { ++ .probe = bcm_dmaman_probe, ++ .remove = bcm_dmaman_remove, ++ ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++/*****************************************************************************\ ++ * * ++ * Driver init/exit * ++ * * ++\*****************************************************************************/ ++ ++static int __init bcm_dmaman_drv_init(void) ++{ ++ int ret; ++ ++ ret = platform_driver_register(&bcm_dmaman_driver); ++ if (ret != 0) { ++ printk(KERN_ERR DRIVER_NAME ": failed to register " ++ "on platform\n"); ++ } ++ ++ return ret; ++} ++ ++static void __exit bcm_dmaman_drv_exit(void) ++{ ++ platform_driver_unregister(&bcm_dmaman_driver); ++} ++ ++module_init(bcm_dmaman_drv_init); ++module_exit(bcm_dmaman_drv_exit); ++ ++module_param(dmachans, int, 0644); ++ ++MODULE_AUTHOR("Gray Girling "); ++MODULE_DESCRIPTION("DMA channel manager driver"); ++MODULE_LICENSE("GPL"); ++ ++MODULE_PARM_DESC(dmachans, "Bitmap of DMA channels available to the ARM"); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/arm_control.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/arm_control.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,419 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/arm_control.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef __BCM2708_ARM_CONTROL_H ++#define __BCM2708_ARM_CONTROL_H ++ ++/* ++ * Definitions and addresses for the ARM CONTROL logic ++ * This file is manually generated. ++ */ ++ ++#define ARM_BASE 0x7E00B000 ++ ++/* Basic configuration */ ++#define ARM_CONTROL0 HW_REGISTER_RW(ARM_BASE+0x000) ++#define ARM_C0_SIZ128M 0x00000000 ++#define ARM_C0_SIZ256M 0x00000001 ++#define ARM_C0_SIZ512M 0x00000002 ++#define ARM_C0_SIZ1G 0x00000003 ++#define ARM_C0_BRESP0 0x00000000 ++#define ARM_C0_BRESP1 0x00000004 ++#define ARM_C0_BRESP2 0x00000008 ++#define ARM_C0_BOOTHI 0x00000010 ++#define ARM_C0_UNUSED05 0x00000020 /* free */ ++#define ARM_C0_FULLPERI 0x00000040 ++#define ARM_C0_UNUSED78 0x00000180 /* free */ ++#define ARM_C0_JTAGMASK 0x00000E00 ++#define ARM_C0_JTAGOFF 0x00000000 ++#define ARM_C0_JTAGBASH 0x00000800 /* Debug on GPIO off */ ++#define ARM_C0_JTAGGPIO 0x00000C00 /* Debug on GPIO on */ ++#define ARM_C0_APROTMSK 0x0000F000 ++#define ARM_C0_DBG0SYNC 0x00010000 /* VPU0 halt sync */ ++#define ARM_C0_DBG1SYNC 0x00020000 /* VPU1 halt sync */ ++#define ARM_C0_SWDBGREQ 0x00040000 /* HW debug request */ ++#define ARM_C0_PASSHALT 0x00080000 /* ARM halt passed to debugger */ ++#define ARM_C0_PRIO_PER 0x00F00000 /* per priority mask */ ++#define ARM_C0_PRIO_L2 0x0F000000 ++#define ARM_C0_PRIO_UC 0xF0000000 ++ ++#define ARM_C0_APROTPASS 0x0000A000 /* Translate 1:1 */ ++#define ARM_C0_APROTUSER 0x00000000 /* Only user mode */ ++#define ARM_C0_APROTSYST 0x0000F000 /* Only system mode */ ++ ++ ++#define ARM_CONTROL1 HW_REGISTER_RW(ARM_BASE+0x440) ++#define ARM_C1_TIMER 0x00000001 /* re-route timer IRQ to VC */ ++#define ARM_C1_MAIL 0x00000002 /* re-route Mail IRQ to VC */ ++#define ARM_C1_BELL0 0x00000004 /* re-route Doorbell 0 to VC */ ++#define ARM_C1_BELL1 0x00000008 /* re-route Doorbell 1 to VC */ ++#define ARM_C1_PERSON 0x00000100 /* peripherals on */ ++#define ARM_C1_REQSTOP 0x00000200 /* ASYNC bridge request stop */ ++ ++#define ARM_STATUS HW_REGISTER_RW(ARM_BASE+0x444) ++#define ARM_S_ACKSTOP 0x80000000 /* Bridge stopped */ ++#define ARM_S_READPEND 0x000003FF /* pending reads counter */ ++#define ARM_S_WRITPEND 0x000FFC00 /* pending writes counter */ ++ ++#define ARM_ERRHALT HW_REGISTER_RW(ARM_BASE+0x448) ++#define ARM_EH_PERIBURST 0x00000001 /* Burst write seen on peri bus */ ++#define ARM_EH_ILLADDRS1 0x00000002 /* Address bits 25-27 error */ ++#define ARM_EH_ILLADDRS2 0x00000004 /* Address bits 31-28 error */ ++#define ARM_EH_VPU0HALT 0x00000008 /* VPU0 halted & in debug mode */ ++#define ARM_EH_VPU1HALT 0x00000010 /* VPU1 halted & in debug mode */ ++#define ARM_EH_ARMHALT 0x00000020 /* ARM in halted debug mode */ ++ ++#define ARM_ID_SECURE HW_REGISTER_RW(ARM_BASE+0x00C) ++#define ARM_ID HW_REGISTER_RW(ARM_BASE+0x44C) ++#define ARM_IDVAL 0x364D5241 ++ ++/* Translation memory */ ++#define ARM_TRANSLATE HW_REGISTER_RW(ARM_BASE+0x100) ++/* 32 locations: 0x100.. 0x17F */ ++/* 32 spare means we CAN go to 64 pages.... */ ++ ++ ++/* Interrupts */ ++#define ARM_IRQ_PEND0 HW_REGISTER_RW(ARM_BASE+0x200) /* Top IRQ bits */ ++#define ARM_I0_TIMER 0x00000001 /* timer IRQ */ ++#define ARM_I0_MAIL 0x00000002 /* Mail IRQ */ ++#define ARM_I0_BELL0 0x00000004 /* Doorbell 0 */ ++#define ARM_I0_BELL1 0x00000008 /* Doorbell 1 */ ++#define ARM_I0_BANK1 0x00000100 /* Bank1 IRQ */ ++#define ARM_I0_BANK2 0x00000200 /* Bank2 IRQ */ ++ ++#define ARM_IRQ_PEND1 HW_REGISTER_RW(ARM_BASE+0x204) /* All bank1 IRQ bits */ ++/* todo: all I1_interrupt sources */ ++#define ARM_IRQ_PEND2 HW_REGISTER_RW(ARM_BASE+0x208) /* All bank2 IRQ bits */ ++/* todo: all I2_interrupt sources */ ++ ++#define ARM_IRQ_FAST HW_REGISTER_RW(ARM_BASE+0x20C) /* FIQ control */ ++#define ARM_IF_INDEX 0x0000007F /* FIQ select */ ++#define ARM_IF_ENABLE 0x00000080 /* FIQ enable */ ++#define ARM_IF_VCMASK 0x0000003F /* FIQ = (index from VC source) */ ++#define ARM_IF_TIMER 0x00000040 /* FIQ = ARM timer */ ++#define ARM_IF_MAIL 0x00000041 /* FIQ = ARM Mail */ ++#define ARM_IF_BELL0 0x00000042 /* FIQ = ARM Doorbell 0 */ ++#define ARM_IF_BELL1 0x00000043 /* FIQ = ARM Doorbell 1 */ ++#define ARM_IF_VP0HALT 0x00000044 /* FIQ = VPU0 Halt seen */ ++#define ARM_IF_VP1HALT 0x00000045 /* FIQ = VPU1 Halt seen */ ++#define ARM_IF_ILLEGAL 0x00000046 /* FIQ = Illegal access seen */ ++ ++#define ARM_IRQ_ENBL1 HW_REGISTER_RW(ARM_BASE+0x210) /* Bank1 enable bits */ ++#define ARM_IRQ_ENBL2 HW_REGISTER_RW(ARM_BASE+0x214) /* Bank2 enable bits */ ++#define ARM_IRQ_ENBL3 HW_REGISTER_RW(ARM_BASE+0x218) /* ARM irqs enable bits */ ++#define ARM_IRQ_DIBL1 HW_REGISTER_RW(ARM_BASE+0x21C) /* Bank1 disable bits */ ++#define ARM_IRQ_DIBL2 HW_REGISTER_RW(ARM_BASE+0x220) /* Bank2 disable bits */ ++#define ARM_IRQ_DIBL3 HW_REGISTER_RW(ARM_BASE+0x224) /* ARM irqs disable bits */ ++#define ARM_IE_TIMER 0x00000001 /* Timer IRQ */ ++#define ARM_IE_MAIL 0x00000002 /* Mail IRQ */ ++#define ARM_IE_BELL0 0x00000004 /* Doorbell 0 */ ++#define ARM_IE_BELL1 0x00000008 /* Doorbell 1 */ ++#define ARM_IE_VP0HALT 0x00000010 /* VPU0 Halt */ ++#define ARM_IE_VP1HALT 0x00000020 /* VPU1 Halt */ ++#define ARM_IE_ILLEGAL 0x00000040 /* Illegal access seen */ ++ ++/* Timer */ ++/* For reg. fields see sp804 spec. */ ++#define ARM_T_LOAD HW_REGISTER_RW(ARM_BASE+0x400) ++#define ARM_T_VALUE HW_REGISTER_RW(ARM_BASE+0x404) ++#define ARM_T_CONTROL HW_REGISTER_RW(ARM_BASE+0x408) ++#define ARM_T_IRQCNTL HW_REGISTER_RW(ARM_BASE+0x40C) ++#define ARM_T_RAWIRQ HW_REGISTER_RW(ARM_BASE+0x410) ++#define ARM_T_MSKIRQ HW_REGISTER_RW(ARM_BASE+0x414) ++#define ARM_T_RELOAD HW_REGISTER_RW(ARM_BASE+0x418) ++#define ARM_T_PREDIV HW_REGISTER_RW(ARM_BASE+0x41c) ++#define ARM_T_FREECNT HW_REGISTER_RW(ARM_BASE+0x420) ++ ++#define TIMER_CTRL_ONESHOT (1 << 0) ++#define TIMER_CTRL_32BIT (1 << 1) ++#define TIMER_CTRL_DIV1 (0 << 2) ++#define TIMER_CTRL_DIV16 (1 << 2) ++#define TIMER_CTRL_DIV256 (2 << 2) ++#define TIMER_CTRL_IE (1 << 5) ++#define TIMER_CTRL_PERIODIC (1 << 6) ++#define TIMER_CTRL_ENABLE (1 << 7) ++#define TIMER_CTRL_DBGHALT (1 << 8) ++#define TIMER_CTRL_ENAFREE (1 << 9) ++#define TIMER_CTRL_FREEDIV_SHIFT 16) ++#define TIMER_CTRL_FREEDIV_MASK 0xff ++ ++/* Semaphores, Doorbells, Mailboxes */ ++#define ARM_SBM_OWN0 (ARM_BASE+0x800) ++#define ARM_SBM_OWN1 (ARM_BASE+0x900) ++#define ARM_SBM_OWN2 (ARM_BASE+0xA00) ++#define ARM_SBM_OWN3 (ARM_BASE+0xB00) ++ ++/* MAILBOXES ++ * Register flags are common across all ++ * owner registers. See end of this section ++ * ++ * Semaphores, Doorbells, Mailboxes Owner 0 ++ * ++ */ ++ ++#define ARM_0_SEMS HW_REGISTER_RW(ARM_SBM_OWN0+0x00) ++#define ARM_0_SEM0 HW_REGISTER_RW(ARM_SBM_OWN0+0x00) ++#define ARM_0_SEM1 HW_REGISTER_RW(ARM_SBM_OWN0+0x04) ++#define ARM_0_SEM2 HW_REGISTER_RW(ARM_SBM_OWN0+0x08) ++#define ARM_0_SEM3 HW_REGISTER_RW(ARM_SBM_OWN0+0x0C) ++#define ARM_0_SEM4 HW_REGISTER_RW(ARM_SBM_OWN0+0x10) ++#define ARM_0_SEM5 HW_REGISTER_RW(ARM_SBM_OWN0+0x14) ++#define ARM_0_SEM6 HW_REGISTER_RW(ARM_SBM_OWN0+0x18) ++#define ARM_0_SEM7 HW_REGISTER_RW(ARM_SBM_OWN0+0x1C) ++#define ARM_0_BELL0 HW_REGISTER_RW(ARM_SBM_OWN0+0x40) ++#define ARM_0_BELL1 HW_REGISTER_RW(ARM_SBM_OWN0+0x44) ++#define ARM_0_BELL2 HW_REGISTER_RW(ARM_SBM_OWN0+0x48) ++#define ARM_0_BELL3 HW_REGISTER_RW(ARM_SBM_OWN0+0x4C) ++/* MAILBOX 0 access in Owner 0 area */ ++/* Some addresses should ONLY be used by owner 0 */ ++#define ARM_0_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) */ ++#define ARM_0_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) Normal read */ ++#define ARM_0_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN0+0x90) /* none-pop read */ ++#define ARM_0_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN0+0x94) /* Sender read (only LS 2 bits) */ ++#define ARM_0_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN0+0x98) /* Status read */ ++#define ARM_0_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0x9C) /* Config read/write */ ++/* MAILBOX 1 access in Owner 0 area */ ++/* Owner 0 should only WRITE to this mailbox */ ++#define ARM_0_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) /* .. 0xAC (4 locations) */ ++/*#define ARM_0_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_0_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN0+0xB0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_0_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN0+0xB4) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_0_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN0+0xB8) /* Status read */ ++/*#define ARM_0_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0xBC) */ /* DO NOT USE THIS !!!!! */ ++/* General SEM, BELL, MAIL config/status */ ++#define ARM_0_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE0) /* semaphore clear/debug register */ ++#define ARM_0_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE4) /* Doorbells clear/debug register */ ++#define ARM_0_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xF8) /* ALL interrupts */ ++#define ARM_0_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xFC) /* IRQS pending for owner 0 */ ++ ++/* Semaphores, Doorbells, Mailboxes Owner 1 */ ++#define ARM_1_SEMS HW_REGISTER_RW(ARM_SBM_OWN1+0x00) ++#define ARM_1_SEM0 HW_REGISTER_RW(ARM_SBM_OWN1+0x00) ++#define ARM_1_SEM1 HW_REGISTER_RW(ARM_SBM_OWN1+0x04) ++#define ARM_1_SEM2 HW_REGISTER_RW(ARM_SBM_OWN1+0x08) ++#define ARM_1_SEM3 HW_REGISTER_RW(ARM_SBM_OWN1+0x0C) ++#define ARM_1_SEM4 HW_REGISTER_RW(ARM_SBM_OWN1+0x10) ++#define ARM_1_SEM5 HW_REGISTER_RW(ARM_SBM_OWN1+0x14) ++#define ARM_1_SEM6 HW_REGISTER_RW(ARM_SBM_OWN1+0x18) ++#define ARM_1_SEM7 HW_REGISTER_RW(ARM_SBM_OWN1+0x1C) ++#define ARM_1_BELL0 HW_REGISTER_RW(ARM_SBM_OWN1+0x40) ++#define ARM_1_BELL1 HW_REGISTER_RW(ARM_SBM_OWN1+0x44) ++#define ARM_1_BELL2 HW_REGISTER_RW(ARM_SBM_OWN1+0x48) ++#define ARM_1_BELL3 HW_REGISTER_RW(ARM_SBM_OWN1+0x4C) ++/* MAILBOX 0 access in Owner 0 area */ ++/* Owner 1 should only WRITE to this mailbox */ ++#define ARM_1_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0x80) /* .. 0x8C (4 locations) */ ++/*#define ARM_1_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN1+0x80) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_1_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN1+0x90) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_1_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN1+0x94) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_1_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN1+0x98) /* Status read */ ++/*#define ARM_1_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0x9C) */ /* DO NOT USE THIS !!!!! */ ++/* MAILBOX 1 access in Owner 0 area */ ++#define ARM_1_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) */ ++#define ARM_1_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) Normal read */ ++#define ARM_1_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN1+0xB0) /* none-pop read */ ++#define ARM_1_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN1+0xB4) /* Sender read (only LS 2 bits) */ ++#define ARM_1_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN1+0xB8) /* Status read */ ++#define ARM_1_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0xBC) ++/* General SEM, BELL, MAIL config/status */ ++#define ARM_1_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE0) /* semaphore clear/debug register */ ++#define ARM_1_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE4) /* Doorbells clear/debug register */ ++#define ARM_1_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xFC) /* IRQS pending for owner 1 */ ++#define ARM_1_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xF8) /* ALL interrupts */ ++ ++/* Semaphores, Doorbells, Mailboxes Owner 2 */ ++#define ARM_2_SEMS HW_REGISTER_RW(ARM_SBM_OWN2+0x00) ++#define ARM_2_SEM0 HW_REGISTER_RW(ARM_SBM_OWN2+0x00) ++#define ARM_2_SEM1 HW_REGISTER_RW(ARM_SBM_OWN2+0x04) ++#define ARM_2_SEM2 HW_REGISTER_RW(ARM_SBM_OWN2+0x08) ++#define ARM_2_SEM3 HW_REGISTER_RW(ARM_SBM_OWN2+0x0C) ++#define ARM_2_SEM4 HW_REGISTER_RW(ARM_SBM_OWN2+0x10) ++#define ARM_2_SEM5 HW_REGISTER_RW(ARM_SBM_OWN2+0x14) ++#define ARM_2_SEM6 HW_REGISTER_RW(ARM_SBM_OWN2+0x18) ++#define ARM_2_SEM7 HW_REGISTER_RW(ARM_SBM_OWN2+0x1C) ++#define ARM_2_BELL0 HW_REGISTER_RW(ARM_SBM_OWN2+0x40) ++#define ARM_2_BELL1 HW_REGISTER_RW(ARM_SBM_OWN2+0x44) ++#define ARM_2_BELL2 HW_REGISTER_RW(ARM_SBM_OWN2+0x48) ++#define ARM_2_BELL3 HW_REGISTER_RW(ARM_SBM_OWN2+0x4C) ++/* MAILBOX 0 access in Owner 2 area */ ++/* Owner 2 should only WRITE to this mailbox */ ++#define ARM_2_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0x80) /* .. 0x8C (4 locations) */ ++/*#define ARM_2_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN2+0x80) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_2_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN2+0x90) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_2_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN2+0x94) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_2_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN2+0x98) /* Status read */ ++/*#define ARM_2_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0x9C) */ /* DO NOT USE THIS !!!!! */ ++/* MAILBOX 1 access in Owner 2 area */ ++/* Owner 2 should only WRITE to this mailbox */ ++#define ARM_2_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) /* .. 0xAC (4 locations) */ ++/*#define ARM_2_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_2_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN2+0xB0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_2_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN2+0xB4) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_2_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN2+0xB8) /* Status read */ ++/*#define ARM_2_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0xBC) */ /* DO NOT USE THIS !!!!! */ ++/* General SEM, BELL, MAIL config/status */ ++#define ARM_2_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE0) /* semaphore clear/debug register */ ++#define ARM_2_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE4) /* Doorbells clear/debug register */ ++#define ARM_2_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xFC) /* IRQS pending for owner 2 */ ++#define ARM_2_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xF8) /* ALL interrupts */ ++ ++/* Semaphores, Doorbells, Mailboxes Owner 3 */ ++#define ARM_3_SEMS HW_REGISTER_RW(ARM_SBM_OWN3+0x00) ++#define ARM_3_SEM0 HW_REGISTER_RW(ARM_SBM_OWN3+0x00) ++#define ARM_3_SEM1 HW_REGISTER_RW(ARM_SBM_OWN3+0x04) ++#define ARM_3_SEM2 HW_REGISTER_RW(ARM_SBM_OWN3+0x08) ++#define ARM_3_SEM3 HW_REGISTER_RW(ARM_SBM_OWN3+0x0C) ++#define ARM_3_SEM4 HW_REGISTER_RW(ARM_SBM_OWN3+0x10) ++#define ARM_3_SEM5 HW_REGISTER_RW(ARM_SBM_OWN3+0x14) ++#define ARM_3_SEM6 HW_REGISTER_RW(ARM_SBM_OWN3+0x18) ++#define ARM_3_SEM7 HW_REGISTER_RW(ARM_SBM_OWN3+0x1C) ++#define ARM_3_BELL0 HW_REGISTER_RW(ARM_SBM_OWN3+0x40) ++#define ARM_3_BELL1 HW_REGISTER_RW(ARM_SBM_OWN3+0x44) ++#define ARM_3_BELL2 HW_REGISTER_RW(ARM_SBM_OWN3+0x48) ++#define ARM_3_BELL3 HW_REGISTER_RW(ARM_SBM_OWN3+0x4C) ++/* MAILBOX 0 access in Owner 3 area */ ++/* Owner 3 should only WRITE to this mailbox */ ++#define ARM_3_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0x80) /* .. 0x8C (4 locations) */ ++/*#define ARM_3_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN3+0x80) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_3_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN3+0x90) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_3_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN3+0x94) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_3_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN3+0x98) /* Status read */ ++/*#define ARM_3_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0x9C) */ /* DO NOT USE THIS !!!!! */ ++/* MAILBOX 1 access in Owner 3 area */ ++/* Owner 3 should only WRITE to this mailbox */ ++#define ARM_3_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) /* .. 0xAC (4 locations) */ ++/*#define ARM_3_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_3_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN3+0xB0) */ /* DO NOT USE THIS !!!!! */ ++/*#define ARM_3_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN3+0xB4) */ /* DO NOT USE THIS !!!!! */ ++#define ARM_3_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN3+0xB8) /* Status read */ ++/*#define ARM_3_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0xBC) */ /* DO NOT USE THIS !!!!! */ ++/* General SEM, BELL, MAIL config/status */ ++#define ARM_3_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE0) /* semaphore clear/debug register */ ++#define ARM_3_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE4) /* Doorbells clear/debug register */ ++#define ARM_3_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xFC) /* IRQS pending for owner 3 */ ++#define ARM_3_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xF8) /* ALL interrupts */ ++ ++ ++ ++/* Mailbox flags. Valid for all owners */ ++ ++/* Mailbox status register (...0x98) */ ++#define ARM_MS_FULL 0x80000000 ++#define ARM_MS_EMPTY 0x40000000 ++#define ARM_MS_LEVEL 0x400000FF /* Max. value depdnds on mailbox depth parameter */ ++ ++/* MAILBOX config/status register (...0x9C) */ ++/* ANY write to this register clears the error bits! */ ++#define ARM_MC_IHAVEDATAIRQEN 0x00000001 /* mailbox irq enable: has data */ ++#define ARM_MC_IHAVESPACEIRQEN 0x00000002 /* mailbox irq enable: has space */ ++#define ARM_MC_OPPISEMPTYIRQEN 0x00000004 /* mailbox irq enable: Opp. is empty */ ++#define ARM_MC_MAIL_CLEAR 0x00000008 /* mailbox clear write 1, then 0 */ ++#define ARM_MC_IHAVEDATAIRQPEND 0x00000010 /* mailbox irq pending: has space */ ++#define ARM_MC_IHAVESPACEIRQPEND 0x00000020 /* mailbox irq pending: Opp. is empty */ ++#define ARM_MC_OPPISEMPTYIRQPEND 0x00000040 /* mailbox irq pending */ ++/* Bit 7 is unused */ ++#define ARM_MC_ERRNOOWN 0x00000100 /* error : none owner read from mailbox */ ++#define ARM_MC_ERROVERFLW 0x00000200 /* error : write to fill mailbox */ ++#define ARM_MC_ERRUNDRFLW 0x00000400 /* error : read from empty mailbox */ ++ ++/* Semaphore clear/debug register (...0xE0) */ ++#define ARM_SD_OWN0 0x00000003 /* Owner of sem 0 */ ++#define ARM_SD_OWN1 0x0000000C /* Owner of sem 1 */ ++#define ARM_SD_OWN2 0x00000030 /* Owner of sem 2 */ ++#define ARM_SD_OWN3 0x000000C0 /* Owner of sem 3 */ ++#define ARM_SD_OWN4 0x00000300 /* Owner of sem 4 */ ++#define ARM_SD_OWN5 0x00000C00 /* Owner of sem 5 */ ++#define ARM_SD_OWN6 0x00003000 /* Owner of sem 6 */ ++#define ARM_SD_OWN7 0x0000C000 /* Owner of sem 7 */ ++#define ARM_SD_SEM0 0x00010000 /* Status of sem 0 */ ++#define ARM_SD_SEM1 0x00020000 /* Status of sem 1 */ ++#define ARM_SD_SEM2 0x00040000 /* Status of sem 2 */ ++#define ARM_SD_SEM3 0x00080000 /* Status of sem 3 */ ++#define ARM_SD_SEM4 0x00100000 /* Status of sem 4 */ ++#define ARM_SD_SEM5 0x00200000 /* Status of sem 5 */ ++#define ARM_SD_SEM6 0x00400000 /* Status of sem 6 */ ++#define ARM_SD_SEM7 0x00800000 /* Status of sem 7 */ ++ ++/* Doorbells clear/debug register (...0xE4) */ ++#define ARM_BD_OWN0 0x00000003 /* Owner of doorbell 0 */ ++#define ARM_BD_OWN1 0x0000000C /* Owner of doorbell 1 */ ++#define ARM_BD_OWN2 0x00000030 /* Owner of doorbell 2 */ ++#define ARM_BD_OWN3 0x000000C0 /* Owner of doorbell 3 */ ++#define ARM_BD_BELL0 0x00000100 /* Status of doorbell 0 */ ++#define ARM_BD_BELL1 0x00000200 /* Status of doorbell 1 */ ++#define ARM_BD_BELL2 0x00000400 /* Status of doorbell 2 */ ++#define ARM_BD_BELL3 0x00000800 /* Status of doorbell 3 */ ++ ++/* MY IRQS register (...0xF8) */ ++#define ARM_MYIRQ_BELL 0x00000001 /* This owner has a doorbell IRQ */ ++#define ARM_MYIRQ_MAIL 0x00000002 /* This owner has a mailbox IRQ */ ++ ++/* ALL IRQS register (...0xF8) */ ++#define ARM_AIS_BELL0 0x00000001 /* Doorbell 0 IRQ pending */ ++#define ARM_AIS_BELL1 0x00000002 /* Doorbell 1 IRQ pending */ ++#define ARM_AIS_BELL2 0x00000004 /* Doorbell 2 IRQ pending */ ++#define ARM_AIS_BELL3 0x00000008 /* Doorbell 3 IRQ pending */ ++#define ARM_AIS0_HAVEDATA 0x00000010 /* MAIL 0 has data IRQ pending */ ++#define ARM_AIS0_HAVESPAC 0x00000020 /* MAIL 0 has space IRQ pending */ ++#define ARM_AIS0_OPPEMPTY 0x00000040 /* MAIL 0 opposite is empty IRQ */ ++#define ARM_AIS1_HAVEDATA 0x00000080 /* MAIL 1 has data IRQ pending */ ++#define ARM_AIS1_HAVESPAC 0x00000100 /* MAIL 1 has space IRQ pending */ ++#define ARM_AIS1_OPPEMPTY 0x00000200 /* MAIL 1 opposite is empty IRQ */ ++/* Note that bell-0, bell-1 and MAIL0 IRQ go only to the ARM */ ++/* Whilst that bell-2, bell-3 and MAIL1 IRQ go only to the VC */ ++/* */ ++/* ARM JTAG BASH */ ++/* */ ++#define AJB_BASE 0x7e2000c0 ++ ++#define AJBCONF HW_REGISTER_RW(AJB_BASE+0x00) ++#define AJB_BITS0 0x000000 ++#define AJB_BITS4 0x000004 ++#define AJB_BITS8 0x000008 ++#define AJB_BITS12 0x00000C ++#define AJB_BITS16 0x000010 ++#define AJB_BITS20 0x000014 ++#define AJB_BITS24 0x000018 ++#define AJB_BITS28 0x00001C ++#define AJB_BITS32 0x000020 ++#define AJB_BITS34 0x000022 ++#define AJB_OUT_MS 0x000040 ++#define AJB_OUT_LS 0x000000 ++#define AJB_INV_CLK 0x000080 ++#define AJB_D0_RISE 0x000100 ++#define AJB_D0_FALL 0x000000 ++#define AJB_D1_RISE 0x000200 ++#define AJB_D1_FALL 0x000000 ++#define AJB_IN_RISE 0x000400 ++#define AJB_IN_FALL 0x000000 ++#define AJB_ENABLE 0x000800 ++#define AJB_HOLD0 0x000000 ++#define AJB_HOLD1 0x001000 ++#define AJB_HOLD2 0x002000 ++#define AJB_HOLD3 0x003000 ++#define AJB_RESETN 0x004000 ++#define AJB_CLKSHFT 16 ++#define AJB_BUSY 0x80000000 ++#define AJBTMS HW_REGISTER_RW(AJB_BASE+0x04) ++#define AJBTDI HW_REGISTER_RW(AJB_BASE+0x08) ++#define AJBTDO HW_REGISTER_RW(AJB_BASE+0x0c) ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/arm_power.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/arm_power.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,60 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/include/mach/arm_power.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef _ARM_POWER_H ++#define _ARM_POWER_H ++ ++/* Use meaningful names on each side */ ++#ifdef __VIDEOCORE__ ++#define PREFIX(x) ARM_##x ++#else ++#define PREFIX(x) BCM_##x ++#endif ++ ++enum { ++ PREFIX(POWER_SDCARD_BIT), ++ PREFIX(POWER_UART_BIT), ++ PREFIX(POWER_MINIUART_BIT), ++ PREFIX(POWER_USB_BIT), ++ PREFIX(POWER_I2C0_BIT), ++ PREFIX(POWER_I2C1_BIT), ++ PREFIX(POWER_I2C2_BIT), ++ PREFIX(POWER_SPI_BIT), ++ PREFIX(POWER_CCP2TX_BIT), ++ ++ PREFIX(POWER_MAX) ++}; ++ ++enum { ++ PREFIX(POWER_SDCARD) = (1 << PREFIX(POWER_SDCARD_BIT)), ++ PREFIX(POWER_UART) = (1 << PREFIX(POWER_UART_BIT)), ++ PREFIX(POWER_MINIUART) = (1 << PREFIX(POWER_MINIUART_BIT)), ++ PREFIX(POWER_USB) = (1 << PREFIX(POWER_USB_BIT)), ++ PREFIX(POWER_I2C0) = (1 << PREFIX(POWER_I2C0_BIT)), ++ PREFIX(POWER_I2C1_MASK) = (1 << PREFIX(POWER_I2C1_BIT)), ++ PREFIX(POWER_I2C2_MASK) = (1 << PREFIX(POWER_I2C2_BIT)), ++ PREFIX(POWER_SPI_MASK) = (1 << PREFIX(POWER_SPI_BIT)), ++ PREFIX(POWER_CCP2TX_MASK) = (1 << PREFIX(POWER_CCP2TX_BIT)), ++ ++ PREFIX(POWER_MASK) = (1 << PREFIX(POWER_MAX)) - 1, ++ PREFIX(POWER_NONE) = 0 ++}; ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/clkdev.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/clkdev.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,7 @@ ++#ifndef __ASM_MACH_CLKDEV_H ++#define __ASM_MACH_CLKDEV_H ++ ++#define __clk_get(clk) ({ 1; }) ++#define __clk_put(clk) do { } while (0) ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/debug-macro.S +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/debug-macro.S 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,22 @@ ++/* arch/arm/mach-bcm2708/include/mach/debug-macro.S ++ * ++ * Debugging macro include header ++ * ++ * Copyright (C) 2010 Broadcom ++ * Copyright (C) 1994-1999 Russell King ++ * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++*/ ++ ++#include ++ ++ .macro addruart, rp, rv, tmp ++ ldr \rp, =UART0_BASE ++ ldr \rv, =IO_ADDRESS(UART0_BASE) ++ .endm ++ ++#include +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/dma.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/dma.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,86 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/include/mach/dma.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++ ++#ifndef _MACH_BCM2708_DMA_H ++#define _MACH_BCM2708_DMA_H ++ ++#define BCM_DMAMAN_DRIVER_NAME "bcm2708_dma" ++ ++/* DMA CS Control and Status bits */ ++#define BCM2708_DMA_ACTIVE (1 << 0) ++#define BCM2708_DMA_INT (1 << 2) ++#define BCM2708_DMA_ISPAUSED (1 << 4) /* Pause requested or not active */ ++#define BCM2708_DMA_ISHELD (1 << 5) /* Is held by DREQ flow control */ ++#define BCM2708_DMA_ERR (1 << 8) ++#define BCM2708_DMA_ABORT (1 << 30) /* stop current CB, go to next, WO */ ++#define BCM2708_DMA_RESET (1 << 31) /* WO, self clearing */ ++ ++/* DMA control block "info" field bits */ ++#define BCM2708_DMA_INT_EN (1 << 0) ++#define BCM2708_DMA_TDMODE (1 << 1) ++#define BCM2708_DMA_WAIT_RESP (1 << 3) ++#define BCM2708_DMA_D_INC (1 << 4) ++#define BCM2708_DMA_D_WIDTH (1 << 5) ++#define BCM2708_DMA_D_DREQ (1 << 6) ++#define BCM2708_DMA_S_INC (1 << 8) ++#define BCM2708_DMA_S_WIDTH (1 << 9) ++#define BCM2708_DMA_S_DREQ (1 << 10) ++ ++#define BCM2708_DMA_BURST(x) (((x)&0xf) << 12) ++#define BCM2708_DMA_PER_MAP(x) ((x) << 16) ++#define BCM2708_DMA_WAITS(x) (((x)&0x1f) << 21) ++ ++#define BCM2708_DMA_DREQ_EMMC 11 ++#define BCM2708_DMA_DREQ_SDHOST 13 ++ ++#define BCM2708_DMA_CS 0x00 /* Control and Status */ ++#define BCM2708_DMA_ADDR 0x04 ++/* the current control block appears in the following registers - read only */ ++#define BCM2708_DMA_INFO 0x08 ++#define BCM2708_DMA_NEXTCB 0x1C ++#define BCM2708_DMA_DEBUG 0x20 ++ ++#define BCM2708_DMA4_CS (BCM2708_DMA_CHAN(4)+BCM2708_DMA_CS) ++#define BCM2708_DMA4_ADDR (BCM2708_DMA_CHAN(4)+BCM2708_DMA_ADDR) ++ ++#define BCM2708_DMA_TDMODE_LEN(w, h) ((h) << 16 | (w)) ++ ++struct bcm2708_dma_cb { ++ unsigned long info; ++ unsigned long src; ++ unsigned long dst; ++ unsigned long length; ++ unsigned long stride; ++ unsigned long next; ++ unsigned long pad[2]; ++}; ++ ++extern int bcm_sg_suitable_for_dma(struct scatterlist *sg_ptr, int sg_len); ++extern void bcm_dma_start(void __iomem *dma_chan_base, ++ dma_addr_t control_block); ++extern void bcm_dma_wait_idle(void __iomem *dma_chan_base); ++extern int /*rc*/ bcm_dma_abort(void __iomem *dma_chan_base); ++ ++/* When listing features we can ask for when allocating DMA channels give ++ those with higher priority smaller ordinal numbers */ ++#define BCM_DMA_FEATURE_FAST_ORD 0 ++#define BCM_DMA_FEATURE_BULK_ORD 1 ++#define BCM_DMA_FEATURE_FAST (1< ++ ++ .macro disable_fiq ++ .endm ++ ++ .macro get_irqnr_preamble, base, tmp ++ ldr \base, =IO_ADDRESS(ARMCTRL_IC_BASE) ++ .endm ++ ++ .macro arch_ret_to_user, tmp1, tmp2 ++ .endm ++ ++ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ++ /* get masked status */ ++ ldr \irqstat, [\base, #(ARM_IRQ_PEND0 - ARMCTRL_IC_BASE)] ++ mov \irqnr, #(ARM_IRQ0_BASE + 31) ++ and \tmp, \irqstat, #0x300 @ save bits 8 and 9 ++ /* clear bits 8 and 9, and test */ ++ bics \irqstat, \irqstat, #0x300 ++ bne 1010f ++ ++ tst \tmp, #0x100 ++ ldrne \irqstat, [\base, #(ARM_IRQ_PEND1 - ARMCTRL_IC_BASE)] ++ movne \irqnr, #(ARM_IRQ1_BASE + 31) ++ @ Mask out the interrupts also present in PEND0 - see SW-5809 ++ bicne \irqstat, #((1<<7) | (1<<9) | (1<<10)) ++ bicne \irqstat, #((1<<18) | (1<<19)) ++ bne 1010f ++ ++ tst \tmp, #0x200 ++ ldrne \irqstat, [\base, #(ARM_IRQ_PEND2 - ARMCTRL_IC_BASE)] ++ movne \irqnr, #(ARM_IRQ2_BASE + 31) ++ @ Mask out the interrupts also present in PEND0 - see SW-5809 ++ bicne \irqstat, #((1<<21) | (1<<22) | (1<<23) | (1<<24) | (1<<25)) ++ bicne \irqstat, #((1<<30)) ++ beq 1020f ++ ++1010: ++ @ For non-zero x, LSB(x) = 31 - CLZ(x^(x-1)) ++ @ N.B. CLZ is an ARM5 instruction. ++ sub \tmp, \irqstat, #1 ++ eor \irqstat, \irqstat, \tmp ++ clz \tmp, \irqstat ++ sub \irqnr, \tmp ++ ++1020: @ EQ will be set if no irqs pending ++ ++ .endm +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/frc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/frc.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,38 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/timex.h ++ * ++ * BCM2708 free running counter (timer) ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef _MACH_FRC_H ++#define _MACH_FRC_H ++ ++#define FRC_TICK_RATE (1000000) ++ ++/*! Free running counter incrementing at the CLOCK_TICK_RATE ++ (slightly faster than frc_clock_ticks63() ++ */ ++extern unsigned long frc_clock_ticks32(void); ++ ++/*! Free running counter incrementing at the CLOCK_TICK_RATE ++ * Note - top bit should be ignored (see cnt32_to_63) ++ */ ++extern unsigned long long frc_clock_ticks63(void); ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/gpio.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/gpio.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,18 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/gpio.h ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#ifndef __ASM_ARCH_GPIO_H ++#define __ASM_ARCH_GPIO_H ++ ++#define ARCH_NR_GPIOS 54 // number of gpio lines ++ ++#define gpio_to_irq(x) ((x) + GPIO_IRQ_START) ++#define irq_to_gpio(x) ((x) - GPIO_IRQ_START) ++ ++#endif ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/hardware.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/hardware.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,28 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/hardware.h ++ * ++ * This file contains the hardware definitions of the BCM2708 devices. ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef __ASM_ARCH_HARDWARE_H ++#define __ASM_ARCH_HARDWARE_H ++ ++#include ++#include ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/io.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/io.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,27 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/io.h ++ * ++ * Copyright (C) 2003 ARM Limited ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef __ASM_ARM_ARCH_IO_H ++#define __ASM_ARM_ARCH_IO_H ++ ++#define IO_SPACE_LIMIT 0xffffffff ++ ++#define __io(a) __typesafe_io(a) ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/irqs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/irqs.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,196 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/irqs.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * Copyright (C) 2003 ARM Limited ++ * Copyright (C) 2000 Deep Blue Solutions Ltd. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef _BCM2708_IRQS_H_ ++#define _BCM2708_IRQS_H_ ++ ++#include ++ ++/* ++ * IRQ interrupts definitions are the same as the INT definitions ++ * held within platform.h ++ */ ++#define IRQ_ARMCTRL_START 0 ++#define IRQ_TIMER0 (IRQ_ARMCTRL_START + INTERRUPT_TIMER0) ++#define IRQ_TIMER1 (IRQ_ARMCTRL_START + INTERRUPT_TIMER1) ++#define IRQ_TIMER2 (IRQ_ARMCTRL_START + INTERRUPT_TIMER2) ++#define IRQ_TIMER3 (IRQ_ARMCTRL_START + INTERRUPT_TIMER3) ++#define IRQ_CODEC0 (IRQ_ARMCTRL_START + INTERRUPT_CODEC0) ++#define IRQ_CODEC1 (IRQ_ARMCTRL_START + INTERRUPT_CODEC1) ++#define IRQ_CODEC2 (IRQ_ARMCTRL_START + INTERRUPT_CODEC2) ++#define IRQ_JPEG (IRQ_ARMCTRL_START + INTERRUPT_JPEG) ++#define IRQ_ISP (IRQ_ARMCTRL_START + INTERRUPT_ISP) ++#define IRQ_USB (IRQ_ARMCTRL_START + INTERRUPT_USB) ++#define IRQ_3D (IRQ_ARMCTRL_START + INTERRUPT_3D) ++#define IRQ_TRANSPOSER (IRQ_ARMCTRL_START + INTERRUPT_TRANSPOSER) ++#define IRQ_MULTICORESYNC0 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC0) ++#define IRQ_MULTICORESYNC1 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC1) ++#define IRQ_MULTICORESYNC2 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC2) ++#define IRQ_MULTICORESYNC3 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC3) ++#define IRQ_DMA0 (IRQ_ARMCTRL_START + INTERRUPT_DMA0) ++#define IRQ_DMA1 (IRQ_ARMCTRL_START + INTERRUPT_DMA1) ++#define IRQ_DMA2 (IRQ_ARMCTRL_START + INTERRUPT_DMA2) ++#define IRQ_DMA3 (IRQ_ARMCTRL_START + INTERRUPT_DMA3) ++#define IRQ_DMA4 (IRQ_ARMCTRL_START + INTERRUPT_DMA4) ++#define IRQ_DMA5 (IRQ_ARMCTRL_START + INTERRUPT_DMA5) ++#define IRQ_DMA6 (IRQ_ARMCTRL_START + INTERRUPT_DMA6) ++#define IRQ_DMA7 (IRQ_ARMCTRL_START + INTERRUPT_DMA7) ++#define IRQ_DMA8 (IRQ_ARMCTRL_START + INTERRUPT_DMA8) ++#define IRQ_DMA9 (IRQ_ARMCTRL_START + INTERRUPT_DMA9) ++#define IRQ_DMA10 (IRQ_ARMCTRL_START + INTERRUPT_DMA10) ++#define IRQ_DMA11 (IRQ_ARMCTRL_START + INTERRUPT_DMA11) ++#define IRQ_DMA12 (IRQ_ARMCTRL_START + INTERRUPT_DMA12) ++#define IRQ_AUX (IRQ_ARMCTRL_START + INTERRUPT_AUX) ++#define IRQ_ARM (IRQ_ARMCTRL_START + INTERRUPT_ARM) ++#define IRQ_VPUDMA (IRQ_ARMCTRL_START + INTERRUPT_VPUDMA) ++#define IRQ_HOSTPORT (IRQ_ARMCTRL_START + INTERRUPT_HOSTPORT) ++#define IRQ_VIDEOSCALER (IRQ_ARMCTRL_START + INTERRUPT_VIDEOSCALER) ++#define IRQ_CCP2TX (IRQ_ARMCTRL_START + INTERRUPT_CCP2TX) ++#define IRQ_SDC (IRQ_ARMCTRL_START + INTERRUPT_SDC) ++#define IRQ_DSI0 (IRQ_ARMCTRL_START + INTERRUPT_DSI0) ++#define IRQ_AVE (IRQ_ARMCTRL_START + INTERRUPT_AVE) ++#define IRQ_CAM0 (IRQ_ARMCTRL_START + INTERRUPT_CAM0) ++#define IRQ_CAM1 (IRQ_ARMCTRL_START + INTERRUPT_CAM1) ++#define IRQ_HDMI0 (IRQ_ARMCTRL_START + INTERRUPT_HDMI0) ++#define IRQ_HDMI1 (IRQ_ARMCTRL_START + INTERRUPT_HDMI1) ++#define IRQ_PIXELVALVE1 (IRQ_ARMCTRL_START + INTERRUPT_PIXELVALVE1) ++#define IRQ_I2CSPISLV (IRQ_ARMCTRL_START + INTERRUPT_I2CSPISLV) ++#define IRQ_DSI1 (IRQ_ARMCTRL_START + INTERRUPT_DSI1) ++#define IRQ_PWA0 (IRQ_ARMCTRL_START + INTERRUPT_PWA0) ++#define IRQ_PWA1 (IRQ_ARMCTRL_START + INTERRUPT_PWA1) ++#define IRQ_CPR (IRQ_ARMCTRL_START + INTERRUPT_CPR) ++#define IRQ_SMI (IRQ_ARMCTRL_START + INTERRUPT_SMI) ++#define IRQ_GPIO0 (IRQ_ARMCTRL_START + INTERRUPT_GPIO0) ++#define IRQ_GPIO1 (IRQ_ARMCTRL_START + INTERRUPT_GPIO1) ++#define IRQ_GPIO2 (IRQ_ARMCTRL_START + INTERRUPT_GPIO2) ++#define IRQ_GPIO3 (IRQ_ARMCTRL_START + INTERRUPT_GPIO3) ++#define IRQ_I2C (IRQ_ARMCTRL_START + INTERRUPT_I2C) ++#define IRQ_SPI (IRQ_ARMCTRL_START + INTERRUPT_SPI) ++#define IRQ_I2SPCM (IRQ_ARMCTRL_START + INTERRUPT_I2SPCM) ++#define IRQ_SDIO (IRQ_ARMCTRL_START + INTERRUPT_SDIO) ++#define IRQ_UART (IRQ_ARMCTRL_START + INTERRUPT_UART) ++#define IRQ_SLIMBUS (IRQ_ARMCTRL_START + INTERRUPT_SLIMBUS) ++#define IRQ_VEC (IRQ_ARMCTRL_START + INTERRUPT_VEC) ++#define IRQ_CPG (IRQ_ARMCTRL_START + INTERRUPT_CPG) ++#define IRQ_RNG (IRQ_ARMCTRL_START + INTERRUPT_RNG) ++#define IRQ_ARASANSDIO (IRQ_ARMCTRL_START + INTERRUPT_ARASANSDIO) ++#define IRQ_AVSPMON (IRQ_ARMCTRL_START + INTERRUPT_AVSPMON) ++ ++#define IRQ_ARM_TIMER (IRQ_ARMCTRL_START + INTERRUPT_ARM_TIMER) ++#define IRQ_ARM_MAILBOX (IRQ_ARMCTRL_START + INTERRUPT_ARM_MAILBOX) ++#define IRQ_ARM_DOORBELL_0 (IRQ_ARMCTRL_START + INTERRUPT_ARM_DOORBELL_0) ++#define IRQ_ARM_DOORBELL_1 (IRQ_ARMCTRL_START + INTERRUPT_ARM_DOORBELL_1) ++#define IRQ_VPU0_HALTED (IRQ_ARMCTRL_START + INTERRUPT_VPU0_HALTED) ++#define IRQ_VPU1_HALTED (IRQ_ARMCTRL_START + INTERRUPT_VPU1_HALTED) ++#define IRQ_ILLEGAL_TYPE0 (IRQ_ARMCTRL_START + INTERRUPT_ILLEGAL_TYPE0) ++#define IRQ_ILLEGAL_TYPE1 (IRQ_ARMCTRL_START + INTERRUPT_ILLEGAL_TYPE1) ++#define IRQ_PENDING1 (IRQ_ARMCTRL_START + INTERRUPT_PENDING1) ++#define IRQ_PENDING2 (IRQ_ARMCTRL_START + INTERRUPT_PENDING2) ++ ++/* ++ * FIQ interrupts definitions are the same as the INT definitions. ++ */ ++#define FIQ_TIMER0 INT_TIMER0 ++#define FIQ_TIMER1 INT_TIMER1 ++#define FIQ_TIMER2 INT_TIMER2 ++#define FIQ_TIMER3 INT_TIMER3 ++#define FIQ_CODEC0 INT_CODEC0 ++#define FIQ_CODEC1 INT_CODEC1 ++#define FIQ_CODEC2 INT_CODEC2 ++#define FIQ_JPEG INT_JPEG ++#define FIQ_ISP INT_ISP ++#define FIQ_USB INT_USB ++#define FIQ_3D INT_3D ++#define FIQ_TRANSPOSER INT_TRANSPOSER ++#define FIQ_MULTICORESYNC0 INT_MULTICORESYNC0 ++#define FIQ_MULTICORESYNC1 INT_MULTICORESYNC1 ++#define FIQ_MULTICORESYNC2 INT_MULTICORESYNC2 ++#define FIQ_MULTICORESYNC3 INT_MULTICORESYNC3 ++#define FIQ_DMA0 INT_DMA0 ++#define FIQ_DMA1 INT_DMA1 ++#define FIQ_DMA2 INT_DMA2 ++#define FIQ_DMA3 INT_DMA3 ++#define FIQ_DMA4 INT_DMA4 ++#define FIQ_DMA5 INT_DMA5 ++#define FIQ_DMA6 INT_DMA6 ++#define FIQ_DMA7 INT_DMA7 ++#define FIQ_DMA8 INT_DMA8 ++#define FIQ_DMA9 INT_DMA9 ++#define FIQ_DMA10 INT_DMA10 ++#define FIQ_DMA11 INT_DMA11 ++#define FIQ_DMA12 INT_DMA12 ++#define FIQ_AUX INT_AUX ++#define FIQ_ARM INT_ARM ++#define FIQ_VPUDMA INT_VPUDMA ++#define FIQ_HOSTPORT INT_HOSTPORT ++#define FIQ_VIDEOSCALER INT_VIDEOSCALER ++#define FIQ_CCP2TX INT_CCP2TX ++#define FIQ_SDC INT_SDC ++#define FIQ_DSI0 INT_DSI0 ++#define FIQ_AVE INT_AVE ++#define FIQ_CAM0 INT_CAM0 ++#define FIQ_CAM1 INT_CAM1 ++#define FIQ_HDMI0 INT_HDMI0 ++#define FIQ_HDMI1 INT_HDMI1 ++#define FIQ_PIXELVALVE1 INT_PIXELVALVE1 ++#define FIQ_I2CSPISLV INT_I2CSPISLV ++#define FIQ_DSI1 INT_DSI1 ++#define FIQ_PWA0 INT_PWA0 ++#define FIQ_PWA1 INT_PWA1 ++#define FIQ_CPR INT_CPR ++#define FIQ_SMI INT_SMI ++#define FIQ_GPIO0 INT_GPIO0 ++#define FIQ_GPIO1 INT_GPIO1 ++#define FIQ_GPIO2 INT_GPIO2 ++#define FIQ_GPIO3 INT_GPIO3 ++#define FIQ_I2C INT_I2C ++#define FIQ_SPI INT_SPI ++#define FIQ_I2SPCM INT_I2SPCM ++#define FIQ_SDIO INT_SDIO ++#define FIQ_UART INT_UART ++#define FIQ_SLIMBUS INT_SLIMBUS ++#define FIQ_VEC INT_VEC ++#define FIQ_CPG INT_CPG ++#define FIQ_RNG INT_RNG ++#define FIQ_ARASANSDIO INT_ARASANSDIO ++#define FIQ_AVSPMON INT_AVSPMON ++ ++#define FIQ_ARM_TIMER INT_ARM_TIMER ++#define FIQ_ARM_MAILBOX INT_ARM_MAILBOX ++#define FIQ_ARM_DOORBELL_0 INT_ARM_DOORBELL_0 ++#define FIQ_ARM_DOORBELL_1 INT_ARM_DOORBELL_1 ++#define FIQ_VPU0_HALTED INT_VPU0_HALTED ++#define FIQ_VPU1_HALTED INT_VPU1_HALTED ++#define FIQ_ILLEGAL_TYPE0 INT_ILLEGAL_TYPE0 ++#define FIQ_ILLEGAL_TYPE1 INT_ILLEGAL_TYPE1 ++#define FIQ_PENDING1 INT_PENDING1 ++#define FIQ_PENDING2 INT_PENDING2 ++ ++#define HARD_IRQS (64 + 21) ++#define GPIO_IRQ_START HARD_IRQS ++ ++#define GPIO_IRQS 32*5 ++ ++#define NR_IRQS HARD_IRQS+GPIO_IRQS ++ ++ ++#endif /* _BCM2708_IRQS_H_ */ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/memory.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/memory.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,57 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/memory.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef __ASM_ARCH_MEMORY_H ++#define __ASM_ARCH_MEMORY_H ++ ++/* Memory overview: ++ ++ [ARMcore] <--virtual addr--> ++ [ARMmmu] <--physical addr--> ++ [GERTmap] <--bus add--> ++ [VCperiph] ++ ++*/ ++ ++/* ++ * Physical DRAM offset. ++ */ ++#define PLAT_PHYS_OFFSET UL(0x00000000) ++#define VC_ARMMEM_OFFSET UL(0x00000000) /* offset in VC of ARM memory */ ++ ++#ifdef CONFIG_BCM2708_NOL2CACHE ++ #define _REAL_BUS_OFFSET UL(0xC0000000) /* don't use L1 or L2 caches */ ++#else ++ #define _REAL_BUS_OFFSET UL(0x40000000) /* use L2 cache */ ++#endif ++ ++/* We're using the memory at 64M in the VideoCore for Linux - this adjustment ++ * will provide the offset into this area as well as setting the bits that ++ * stop the L1 and L2 cache from being used ++ * ++ * WARNING: this only works because the ARM is given memory at a fixed location ++ * (ARMMEM_OFFSET) ++ */ ++#define BUS_OFFSET (VC_ARMMEM_OFFSET + _REAL_BUS_OFFSET) ++#define __virt_to_bus(x) ((x) + (BUS_OFFSET - PAGE_OFFSET)) ++#define __bus_to_virt(x) ((x) - (BUS_OFFSET - PAGE_OFFSET)) ++#define __pfn_to_bus(x) (__pfn_to_phys(x) + (BUS_OFFSET - PLAT_PHYS_OFFSET)) ++#define __bus_to_pfn(x) __phys_to_pfn((x) - (BUS_OFFSET - PLAT_PHYS_OFFSET)) ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,220 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/platform.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#ifndef _BCM2708_PLATFORM_H ++#define _BCM2708_PLATFORM_H ++ ++ ++/* macros to get at IO space when running virtually */ ++#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) ++ ++#define __io_address(n) IOMEM(IO_ADDRESS(n)) ++ ++ ++/* ++ * SDRAM ++ */ ++#define BCM2708_SDRAM_BASE 0x00000000 ++ ++/* ++ * Logic expansion modules ++ * ++ */ ++ ++ ++/* ------------------------------------------------------------------------ ++ * BCM2708 ARMCTRL Registers ++ * ------------------------------------------------------------------------ ++ */ ++ ++#define HW_REGISTER_RW(addr) (addr) ++#define HW_REGISTER_RO(addr) (addr) ++ ++#include "arm_control.h" ++#undef ARM_BASE ++ ++/* ++ * Definitions and addresses for the ARM CONTROL logic ++ * This file is manually generated. ++ */ ++ ++#define BCM2708_PERI_BASE 0x20000000 ++#define ST_BASE (BCM2708_PERI_BASE + 0x3000) /* System Timer */ ++#define DMA_BASE (BCM2708_PERI_BASE + 0x7000) /* DMA controller */ ++#define ARM_BASE (BCM2708_PERI_BASE + 0xB000) /* BCM2708 ARM control block */ ++#define PM_BASE (BCM2708_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */ ++#define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO */ ++#define UART0_BASE (BCM2708_PERI_BASE + 0x201000) /* Uart 0 */ ++#define MMCI0_BASE (BCM2708_PERI_BASE + 0x202000) /* MMC interface */ ++#define UART1_BASE (BCM2708_PERI_BASE + 0x215000) /* Uart 1 */ ++#define EMMC_BASE (BCM2708_PERI_BASE + 0x300000) /* eMMC interface */ ++#define SMI_BASE (BCM2708_PERI_BASE + 0x600000) /* SMI */ ++#define USB_BASE (BCM2708_PERI_BASE + 0x980000) /* DTC_OTG USB controller */ ++#define MCORE_BASE (BCM2708_PERI_BASE + 0x0000) /* Fake frame buffer device (actually the multicore sync block*/ ++ ++#define ARMCTRL_BASE (ARM_BASE + 0x000) ++#define ARMCTRL_IC_BASE (ARM_BASE + 0x200) /* ARM interrupt controller */ ++#define ARMCTRL_TIMER0_1_BASE (ARM_BASE + 0x400) /* Timer 0 and 1 */ ++#define ARMCTRL_0_SBM_BASE (ARM_BASE + 0x800) /* User 0 (ARM)'s Semaphores Doorbells and Mailboxes */ ++ ++ ++/* ++ * Interrupt assignments ++ */ ++ ++#define ARM_IRQ1_BASE 0 ++#define INTERRUPT_TIMER0 (ARM_IRQ1_BASE + 0) ++#define INTERRUPT_TIMER1 (ARM_IRQ1_BASE + 1) ++#define INTERRUPT_TIMER2 (ARM_IRQ1_BASE + 2) ++#define INTERRUPT_TIMER3 (ARM_IRQ1_BASE + 3) ++#define INTERRUPT_CODEC0 (ARM_IRQ1_BASE + 4) ++#define INTERRUPT_CODEC1 (ARM_IRQ1_BASE + 5) ++#define INTERRUPT_CODEC2 (ARM_IRQ1_BASE + 6) ++#define INTERRUPT_VC_JPEG (ARM_IRQ1_BASE + 7) ++#define INTERRUPT_ISP (ARM_IRQ1_BASE + 8) ++#define INTERRUPT_VC_USB (ARM_IRQ1_BASE + 9) ++#define INTERRUPT_VC_3D (ARM_IRQ1_BASE + 10) ++#define INTERRUPT_TRANSPOSER (ARM_IRQ1_BASE + 11) ++#define INTERRUPT_MULTICORESYNC0 (ARM_IRQ1_BASE + 12) ++#define INTERRUPT_MULTICORESYNC1 (ARM_IRQ1_BASE + 13) ++#define INTERRUPT_MULTICORESYNC2 (ARM_IRQ1_BASE + 14) ++#define INTERRUPT_MULTICORESYNC3 (ARM_IRQ1_BASE + 15) ++#define INTERRUPT_DMA0 (ARM_IRQ1_BASE + 16) ++#define INTERRUPT_DMA1 (ARM_IRQ1_BASE + 17) ++#define INTERRUPT_VC_DMA2 (ARM_IRQ1_BASE + 18) ++#define INTERRUPT_VC_DMA3 (ARM_IRQ1_BASE + 19) ++#define INTERRUPT_DMA4 (ARM_IRQ1_BASE + 20) ++#define INTERRUPT_DMA5 (ARM_IRQ1_BASE + 21) ++#define INTERRUPT_DMA6 (ARM_IRQ1_BASE + 22) ++#define INTERRUPT_DMA7 (ARM_IRQ1_BASE + 23) ++#define INTERRUPT_DMA8 (ARM_IRQ1_BASE + 24) ++#define INTERRUPT_DMA9 (ARM_IRQ1_BASE + 25) ++#define INTERRUPT_DMA10 (ARM_IRQ1_BASE + 26) ++#define INTERRUPT_DMA11 (ARM_IRQ1_BASE + 27) ++#define INTERRUPT_DMA12 (ARM_IRQ1_BASE + 28) ++#define INTERRUPT_AUX (ARM_IRQ1_BASE + 29) ++#define INTERRUPT_ARM (ARM_IRQ1_BASE + 30) ++#define INTERRUPT_VPUDMA (ARM_IRQ1_BASE + 31) ++ ++#define ARM_IRQ2_BASE 32 ++#define INTERRUPT_HOSTPORT (ARM_IRQ2_BASE + 0) ++#define INTERRUPT_VIDEOSCALER (ARM_IRQ2_BASE + 1) ++#define INTERRUPT_CCP2TX (ARM_IRQ2_BASE + 2) ++#define INTERRUPT_SDC (ARM_IRQ2_BASE + 3) ++#define INTERRUPT_DSI0 (ARM_IRQ2_BASE + 4) ++#define INTERRUPT_AVE (ARM_IRQ2_BASE + 5) ++#define INTERRUPT_CAM0 (ARM_IRQ2_BASE + 6) ++#define INTERRUPT_CAM1 (ARM_IRQ2_BASE + 7) ++#define INTERRUPT_HDMI0 (ARM_IRQ2_BASE + 8) ++#define INTERRUPT_HDMI1 (ARM_IRQ2_BASE + 9) ++#define INTERRUPT_PIXELVALVE1 (ARM_IRQ2_BASE + 10) ++#define INTERRUPT_I2CSPISLV (ARM_IRQ2_BASE + 11) ++#define INTERRUPT_DSI1 (ARM_IRQ2_BASE + 12) ++#define INTERRUPT_PWA0 (ARM_IRQ2_BASE + 13) ++#define INTERRUPT_PWA1 (ARM_IRQ2_BASE + 14) ++#define INTERRUPT_CPR (ARM_IRQ2_BASE + 15) ++#define INTERRUPT_SMI (ARM_IRQ2_BASE + 16) ++#define INTERRUPT_GPIO0 (ARM_IRQ2_BASE + 17) ++#define INTERRUPT_GPIO1 (ARM_IRQ2_BASE + 18) ++#define INTERRUPT_GPIO2 (ARM_IRQ2_BASE + 19) ++#define INTERRUPT_GPIO3 (ARM_IRQ2_BASE + 20) ++#define INTERRUPT_VC_I2C (ARM_IRQ2_BASE + 21) ++#define INTERRUPT_VC_SPI (ARM_IRQ2_BASE + 22) ++#define INTERRUPT_VC_I2SPCM (ARM_IRQ2_BASE + 23) ++#define INTERRUPT_VC_SDIO (ARM_IRQ2_BASE + 24) ++#define INTERRUPT_VC_UART (ARM_IRQ2_BASE + 25) ++#define INTERRUPT_SLIMBUS (ARM_IRQ2_BASE + 26) ++#define INTERRUPT_VEC (ARM_IRQ2_BASE + 27) ++#define INTERRUPT_CPG (ARM_IRQ2_BASE + 28) ++#define INTERRUPT_RNG (ARM_IRQ2_BASE + 29) ++#define INTERRUPT_VC_ARASANSDIO (ARM_IRQ2_BASE + 30) ++#define INTERRUPT_AVSPMON (ARM_IRQ2_BASE + 31) ++ ++#define ARM_IRQ0_BASE 64 ++#define INTERRUPT_ARM_TIMER (ARM_IRQ0_BASE + 0) ++#define INTERRUPT_ARM_MAILBOX (ARM_IRQ0_BASE + 1) ++#define INTERRUPT_ARM_DOORBELL_0 (ARM_IRQ0_BASE + 2) ++#define INTERRUPT_ARM_DOORBELL_1 (ARM_IRQ0_BASE + 3) ++#define INTERRUPT_VPU0_HALTED (ARM_IRQ0_BASE + 4) ++#define INTERRUPT_VPU1_HALTED (ARM_IRQ0_BASE + 5) ++#define INTERRUPT_ILLEGAL_TYPE0 (ARM_IRQ0_BASE + 6) ++#define INTERRUPT_ILLEGAL_TYPE1 (ARM_IRQ0_BASE + 7) ++#define INTERRUPT_PENDING1 (ARM_IRQ0_BASE + 8) ++#define INTERRUPT_PENDING2 (ARM_IRQ0_BASE + 9) ++#define INTERRUPT_JPEG (ARM_IRQ0_BASE + 10) ++#define INTERRUPT_USB (ARM_IRQ0_BASE + 11) ++#define INTERRUPT_3D (ARM_IRQ0_BASE + 12) ++#define INTERRUPT_DMA2 (ARM_IRQ0_BASE + 13) ++#define INTERRUPT_DMA3 (ARM_IRQ0_BASE + 14) ++#define INTERRUPT_I2C (ARM_IRQ0_BASE + 15) ++#define INTERRUPT_SPI (ARM_IRQ0_BASE + 16) ++#define INTERRUPT_I2SPCM (ARM_IRQ0_BASE + 17) ++#define INTERRUPT_SDIO (ARM_IRQ0_BASE + 18) ++#define INTERRUPT_UART (ARM_IRQ0_BASE + 19) ++#define INTERRUPT_ARASANSDIO (ARM_IRQ0_BASE + 20) ++ ++#define MAXIRQNUM (32 + 32 + 20) ++#define MAXFIQNUM (32 + 32 + 20) ++ ++#define MAX_TIMER 2 ++#define MAX_PERIOD 699050 ++#define TICKS_PER_uSEC 1 ++ ++/* ++ * These are useconds NOT ticks. ++ * ++ */ ++#define mSEC_1 1000 ++#define mSEC_5 (mSEC_1 * 5) ++#define mSEC_10 (mSEC_1 * 10) ++#define mSEC_25 (mSEC_1 * 25) ++#define SEC_1 (mSEC_1 * 1000) ++ ++/* ++ * Watchdog ++ */ ++#define PM_RSTC (PM_BASE+0x1c) ++#define PM_RSTS (PM_BASE+0x20) ++#define PM_WDOG (PM_BASE+0x24) ++ ++#define PM_WDOG_RESET 0000000000 ++#define PM_PASSWORD 0x5a000000 ++#define PM_WDOG_TIME_SET 0x000fffff ++#define PM_RSTC_WRCFG_CLR 0xffffffcf ++#define PM_RSTC_WRCFG_SET 0x00000030 ++#define PM_RSTC_WRCFG_FULL_RESET 0x00000020 ++#define PM_RSTC_RESET 0x00000102 ++ ++#define PM_RSTS_HADPOR_SET 0x00001000 ++#define PM_RSTS_HADSRH_SET 0x00000400 ++#define PM_RSTS_HADSRF_SET 0x00000200 ++#define PM_RSTS_HADSRQ_SET 0x00000100 ++#define PM_RSTS_HADWRH_SET 0x00000040 ++#define PM_RSTS_HADWRF_SET 0x00000020 ++#define PM_RSTS_HADWRQ_SET 0x00000010 ++#define PM_RSTS_HADDRH_SET 0x00000004 ++#define PM_RSTS_HADDRF_SET 0x00000002 ++#define PM_RSTS_HADDRQ_SET 0x00000001 ++ ++#define UART0_CLOCK 3000000 ++ ++#endif ++ ++/* END */ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/power.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/power.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,26 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/power.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This device provides a shared mechanism for controlling the power to ++ * VideoCore subsystems. ++ */ ++ ++#ifndef _MACH_BCM2708_POWER_H ++#define _MACH_BCM2708_POWER_H ++ ++#include ++#include ++ ++typedef unsigned int BCM_POWER_HANDLE_T; ++ ++extern int bcm_power_open(BCM_POWER_HANDLE_T *handle); ++extern int bcm_power_request(BCM_POWER_HANDLE_T handle, uint32_t request); ++extern int bcm_power_close(BCM_POWER_HANDLE_T handle); ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/system.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/system.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,38 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/system.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * Copyright (C) 2003 ARM Limited ++ * Copyright (C) 2000 Deep Blue Solutions Ltd ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef __ASM_ARCH_SYSTEM_H ++#define __ASM_ARCH_SYSTEM_H ++ ++#include ++#include ++#include ++ ++static inline void arch_idle(void) ++{ ++ /* ++ * This should do all the clock switching ++ * and wait for interrupt tricks ++ */ ++ cpu_do_idle(); ++} ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/timex.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/timex.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,23 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/timex.h ++ * ++ * BCM2708 sysem clock frequency ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#define CLOCK_TICK_RATE (1000000) +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/uncompress.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/uncompress.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,85 @@ ++/* ++ * arch/arm/mach-bcn2708/include/mach/uncompress.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * Copyright (C) 2003 ARM Limited ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++ ++#define UART_BAUD 115200 ++ ++#define BCM2708_UART_DR __io(UART0_BASE + UART01x_DR) ++#define BCM2708_UART_FR __io(UART0_BASE + UART01x_FR) ++#define BCM2708_UART_IBRD __io(UART0_BASE + UART011_IBRD) ++#define BCM2708_UART_FBRD __io(UART0_BASE + UART011_FBRD) ++#define BCM2708_UART_LCRH __io(UART0_BASE + UART011_LCRH) ++#define BCM2708_UART_CR __io(UART0_BASE + UART011_CR) ++ ++/* ++ * This does not append a newline ++ */ ++static inline void putc(int c) ++{ ++ while (__raw_readl(BCM2708_UART_FR) & UART01x_FR_TXFF) ++ barrier(); ++ ++ __raw_writel(c, BCM2708_UART_DR); ++} ++ ++static inline void flush(void) ++{ ++ int fr; ++ ++ do { ++ fr = __raw_readl(BCM2708_UART_FR); ++ barrier(); ++ } while ((fr & (UART011_FR_TXFE | UART01x_FR_BUSY)) != UART011_FR_TXFE); ++} ++ ++static inline void arch_decomp_setup(void) ++{ ++ int temp, div, rem, frac; ++ ++ temp = 16 * UART_BAUD; ++ div = UART0_CLOCK / temp; ++ rem = UART0_CLOCK % temp; ++ temp = (8 * rem) / UART_BAUD; ++ frac = (temp >> 1) + (temp & 1); ++ ++ /* Make sure the UART is disabled before we start */ ++ __raw_writel(0, BCM2708_UART_CR); ++ ++ /* Set the baud rate */ ++ __raw_writel(div, BCM2708_UART_IBRD); ++ __raw_writel(frac, BCM2708_UART_FBRD); ++ ++ /* Set the UART to 8n1, FIFO enabled */ ++ __raw_writel(UART01x_LCRH_WLEN_8 | UART01x_LCRH_FEN, BCM2708_UART_LCRH); ++ ++ /* Enable the UART */ ++ __raw_writel(UART01x_CR_UARTEN | UART011_CR_TXE | UART011_CR_RXE, ++ BCM2708_UART_CR); ++} ++ ++/* ++ * nothing to do ++ */ ++#define arch_decomp_wdog() ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vc_mem.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vc_mem.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,36 @@ ++/***************************************************************************** ++* Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#if !defined( VC_MEM_H ) ++#define VC_MEM_H ++ ++#include ++ ++#define VC_MEM_IOC_MAGIC 'v' ++ ++#define VC_MEM_IOC_MEM_PHYS_ADDR _IOR( VC_MEM_IOC_MAGIC, 0, unsigned long ) ++#define VC_MEM_IOC_MEM_SIZE _IOR( VC_MEM_IOC_MAGIC, 1, unsigned int ) ++#define VC_MEM_IOC_MEM_BASE _IOR( VC_MEM_IOC_MAGIC, 2, unsigned int ) ++#define VC_MEM_IOC_MEM_LOAD _IOR( VC_MEM_IOC_MAGIC, 3, unsigned int ) ++ ++#if defined( __KERNEL__ ) ++#define VC_MEM_TO_ARM_ADDR_MASK 0x3FFFFFFF ++ ++extern unsigned long mm_vc_mem_phys_addr; ++extern unsigned int mm_vc_mem_size; ++extern int vc_mem_get_current_size( void ); ++#endif ++ ++#endif /* VC_MEM_H */ ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vcio.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vcio.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,141 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/vcio.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#ifndef _MACH_BCM2708_VCIO_H ++#define _MACH_BCM2708_VCIO_H ++ ++/* Routines to handle I/O via the VideoCore "ARM control" registers ++ * (semaphores, doorbells, mailboxes) ++ */ ++ ++#define BCM_VCIO_DRIVER_NAME "bcm2708_vcio" ++ ++/* Constants shared with the ARM identifying separate mailbox channels */ ++#define MBOX_CHAN_POWER 0 /* for use by the power management interface */ ++#define MBOX_CHAN_FB 1 /* for use by the frame buffer */ ++#define MBOX_CHAN_VCHIQ 3 /* for use by the VCHIQ interface */ ++#define MBOX_CHAN_PROPERTY 8 /* for use by the property channel */ ++#define MBOX_CHAN_COUNT 9 ++ ++/* Mailbox property tags */ ++enum { ++ VCMSG_PROPERTY_END = 0x00000000, ++ VCMSG_GET_FIRMWARE_REVISION = 0x00000001, ++ VCMSG_GET_BOARD_MODEL = 0x00010001, ++ VCMSG_GET_BOARD_REVISION = 0x00020002, ++ VCMSG_GET_BOARD_MAC_ADDRESS = 0x00020003, ++ VCMSG_GET_BOARD_SERIAL = 0x00020004, ++ VCMSG_GET_ARM_MEMORY = 0x00020005, ++ VCMSG_GET_VC_MEMORY = 0x00020006, ++ VCMSG_GET_CLOCKS = 0x00020007, ++ VCMSG_GET_COMMAND_LINE = 0x00050001, ++ VCMSG_GET_DMA_CHANNELS = 0x00060001, ++ VCMSG_GET_POWER_STATE = 0x00020001, ++ VCMSG_GET_TIMING = 0x00020002, ++ VCMSG_SET_POWER_STATE = 0x00028001, ++ VCMSG_GET_CLOCK_STATE = 0x00030001, ++ VCMSG_SET_CLOCK_STATE = 0x00038001, ++ VCMSG_GET_CLOCK_RATE = 0x00030002, ++ VCMSG_SET_CLOCK_RATE = 0x00038002, ++ VCMSG_GET_VOLTAGE = 0x00030003, ++ VCMSG_SET_VOLTAGE = 0x00038003, ++ VCMSG_GET_MAX_CLOCK = 0x00030004, ++ VCMSG_GET_MAX_VOLTAGE = 0x00030005, ++ VCMSG_GET_TEMPERATURE = 0x00030006, ++ VCMSG_GET_MIN_CLOCK = 0x00030007, ++ VCMSG_GET_MIN_VOLTAGE = 0x00030008, ++ VCMSG_GET_TURBO = 0x00030009, ++ VCMSG_SET_TURBO = 0x00038009, ++ VCMSG_SET_ALLOCATE_BUFFER = 0x00040001, ++ VCMSG_SET_RELEASE_BUFFER = 0x00048001, ++ VCMSG_SET_BLANK_SCREEN = 0x00040002, ++ VCMSG_TST_BLANK_SCREEN = 0x00044002, ++ VCMSG_GET_PHYSICAL_WIDTH_HEIGHT = 0x00040003, ++ VCMSG_TST_PHYSICAL_WIDTH_HEIGHT = 0x00044003, ++ VCMSG_SET_PHYSICAL_WIDTH_HEIGHT = 0x00048003, ++ VCMSG_GET_VIRTUAL_WIDTH_HEIGHT = 0x00040004, ++ VCMSG_TST_VIRTUAL_WIDTH_HEIGHT = 0x00044004, ++ VCMSG_SET_VIRTUAL_WIDTH_HEIGHT = 0x00048004, ++ VCMSG_GET_DEPTH = 0x00040005, ++ VCMSG_TST_DEPTH = 0x00044005, ++ VCMSG_SET_DEPTH = 0x00048005, ++ VCMSG_GET_PIXEL_ORDER = 0x00040006, ++ VCMSG_TST_PIXEL_ORDER = 0x00044006, ++ VCMSG_SET_PIXEL_ORDER = 0x00048006, ++ VCMSG_GET_ALPHA_MODE = 0x00040007, ++ VCMSG_TST_ALPHA_MODE = 0x00044007, ++ VCMSG_SET_ALPHA_MODE = 0x00048007, ++ VCMSG_GET_PITCH = 0x00040008, ++ VCMSG_TST_PITCH = 0x00044008, ++ VCMSG_SET_PITCH = 0x00048008, ++ VCMSG_GET_VIRTUAL_OFFSET = 0x00040009, ++ VCMSG_TST_VIRTUAL_OFFSET = 0x00044009, ++ VCMSG_SET_VIRTUAL_OFFSET = 0x00048009, ++ VCMSG_GET_OVERSCAN = 0x0004000a, ++ VCMSG_TST_OVERSCAN = 0x0004400a, ++ VCMSG_SET_OVERSCAN = 0x0004800a, ++ VCMSG_GET_PALETTE = 0x0004000b, ++ VCMSG_TST_PALETTE = 0x0004400b, ++ VCMSG_SET_PALETTE = 0x0004800b, ++ VCMSG_GET_LAYER = 0x0004000c, ++ VCMSG_TST_LAYER = 0x0004400c, ++ VCMSG_SET_LAYER = 0x0004800c, ++ VCMSG_GET_TRANSFORM = 0x0004000d, ++ VCMSG_TST_TRANSFORM = 0x0004400d, ++ VCMSG_SET_TRANSFORM = 0x0004800d, ++}; ++ ++extern int /*rc*/ bcm_mailbox_read(unsigned chan, uint32_t *data28); ++extern int /*rc*/ bcm_mailbox_write(unsigned chan, uint32_t data28); ++extern int /*rc*/ bcm_mailbox_property(void *data, int size); ++ ++#include ++ ++/* ++ * The major device number. We can't rely on dynamic ++ * registration any more, because ioctls need to know ++ * it. ++ */ ++#define MAJOR_NUM 100 ++ ++/* ++ * Set the message of the device driver ++ */ ++#define IOCTL_MBOX_PROPERTY _IOWR(MAJOR_NUM, 0, char *) ++/* ++ * _IOWR means that we're creating an ioctl command ++ * number for passing information from a user process ++ * to the kernel module and from the kernel module to user process ++ * ++ * The first arguments, MAJOR_NUM, is the major device ++ * number we're using. ++ * ++ * The second argument is the number of the command ++ * (there could be several with different meanings). ++ * ++ * The third argument is the type we want to get from ++ * the process to the kernel. ++ */ ++ ++/* ++ * The name of the device file ++ */ ++#define DEVICE_FILE_NAME "char_dev" ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vmalloc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vmalloc.h 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,20 @@ ++/* ++ * arch/arm/mach-bcm2708/include/mach/vmalloc.h ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++#define VMALLOC_END (0xe8000000) +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/power.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/power.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,194 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/power.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This device provides a shared mechanism for controlling the power to ++ * VideoCore subsystems. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "bcm2708_power" ++ ++#define BCM_POWER_MAXCLIENTS 4 ++#define BCM_POWER_NOCLIENT (1<<31) ++ ++/* Some drivers expect there devices to be permanently powered */ ++#define BCM_POWER_ALWAYS_ON (BCM_POWER_USB) ++ ++#if 1 ++#define DPRINTK printk ++#else ++#define DPRINTK if (0) printk ++#endif ++ ++struct state_struct { ++ uint32_t global_request; ++ uint32_t client_request[BCM_POWER_MAXCLIENTS]; ++ struct semaphore client_mutex; ++ struct semaphore mutex; ++} g_state; ++ ++int bcm_power_open(BCM_POWER_HANDLE_T *handle) ++{ ++ BCM_POWER_HANDLE_T i; ++ int ret = -EBUSY; ++ ++ down(&g_state.client_mutex); ++ ++ for (i = 0; i < BCM_POWER_MAXCLIENTS; i++) { ++ if (g_state.client_request[i] == BCM_POWER_NOCLIENT) { ++ g_state.client_request[i] = BCM_POWER_NONE; ++ *handle = i; ++ ret = 0; ++ break; ++ } ++ } ++ ++ up(&g_state.client_mutex); ++ ++ DPRINTK("bcm_power_open() -> %d\n", *handle); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(bcm_power_open); ++ ++int bcm_power_request(BCM_POWER_HANDLE_T handle, uint32_t request) ++{ ++ int rc = 0; ++ ++ DPRINTK("bcm_power_request(%d, %x)\n", handle, request); ++ ++ if ((handle < BCM_POWER_MAXCLIENTS) && ++ (g_state.client_request[handle] != BCM_POWER_NOCLIENT)) { ++ if (down_interruptible(&g_state.mutex) != 0) { ++ DPRINTK("bcm_power_request -> interrupted\n"); ++ return -EINTR; ++ } ++ ++ if (request != g_state.client_request[handle]) { ++ uint32_t others_request = 0; ++ uint32_t global_request; ++ BCM_POWER_HANDLE_T i; ++ ++ for (i = 0; i < BCM_POWER_MAXCLIENTS; i++) { ++ if (i != handle) ++ others_request |= ++ g_state.client_request[i]; ++ } ++ others_request &= ~BCM_POWER_NOCLIENT; ++ ++ global_request = request | others_request; ++ if (global_request != g_state.global_request) { ++ uint32_t actual; ++ ++ /* Send a request to VideoCore */ ++ bcm_mailbox_write(MBOX_CHAN_POWER, ++ global_request << 4); ++ ++ /* Wait for a response during power-up */ ++ if (global_request & ~g_state.global_request) { ++ rc = bcm_mailbox_read(MBOX_CHAN_POWER, ++ &actual); ++ DPRINTK ++ ("bcm_mailbox_read -> %08x, %d\n", ++ actual, rc); ++ actual >>= 4; ++ } else { ++ rc = 0; ++ actual = global_request; ++ } ++ ++ if (rc == 0) { ++ if (actual != global_request) { ++ printk(KERN_ERR ++ "%s: prev global %x, new global %x, actual %x, request %x, others_request %x\n", ++ __func__, ++ g_state.global_request, ++ global_request, actual, request, others_request); ++ /* A failure */ ++ BUG_ON((others_request & actual) ++ != others_request); ++ request &= actual; ++ rc = -EIO; ++ } ++ ++ g_state.global_request = actual; ++ g_state.client_request[handle] = ++ request; ++ } ++ } ++ } ++ up(&g_state.mutex); ++ } else { ++ rc = -EINVAL; ++ } ++ DPRINTK("bcm_power_request -> %d\n", rc); ++ return rc; ++} ++EXPORT_SYMBOL_GPL(bcm_power_request); ++ ++int bcm_power_close(BCM_POWER_HANDLE_T handle) ++{ ++ int rc; ++ ++ DPRINTK("bcm_power_close(%d)\n", handle); ++ ++ rc = bcm_power_request(handle, BCM_POWER_NONE); ++ if (rc == 0) ++ g_state.client_request[handle] = BCM_POWER_NOCLIENT; ++ ++ return rc; ++} ++EXPORT_SYMBOL_GPL(bcm_power_close); ++ ++static int __init bcm_power_init(void) ++{ ++#if defined(BCM_POWER_ALWAYS_ON) ++ BCM_POWER_HANDLE_T always_on_handle; ++#endif ++ int rc = 0; ++ int i; ++ ++ printk(KERN_INFO "bcm_power: Broadcom power driver\n"); ++ bcm_mailbox_write(MBOX_CHAN_POWER, 0); ++ ++ for (i = 0; i < BCM_POWER_MAXCLIENTS; i++) ++ g_state.client_request[i] = BCM_POWER_NOCLIENT; ++ ++ sema_init(&g_state.client_mutex, 1); ++ sema_init(&g_state.mutex, 1); ++ ++ g_state.global_request = 0; ++ ++#if defined(BCM_POWER_ALWAYS_ON) ++ if (BCM_POWER_ALWAYS_ON) { ++ bcm_power_open(&always_on_handle); ++ bcm_power_request(always_on_handle, BCM_POWER_ALWAYS_ON); ++ } ++#endif ++ ++ return rc; ++} ++ ++static void __exit bcm_power_exit(void) ++{ ++ bcm_mailbox_write(MBOX_CHAN_POWER, 0); ++} ++ ++arch_initcall(bcm_power_init); /* Initialize early */ ++module_exit(bcm_power_exit); ++ ++MODULE_AUTHOR("Phil Elwell"); ++MODULE_DESCRIPTION("Interface to BCM2708 power management"); ++MODULE_LICENSE("GPL"); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/vc_mem.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/vc_mem.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,462 @@ ++/***************************************************************************** ++* Copyright 2010 - 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_ARCH_KONA ++#include ++#elif CONFIG_ARCH_BCM2708 ++#else ++#include ++#endif ++ ++#include "mach/vc_mem.h" ++#include ++ ++#define DRIVER_NAME "vc-mem" ++ ++// Uncomment to enable debug logging ++// #define ENABLE_DBG ++ ++#if defined(ENABLE_DBG) ++#define LOG_DBG( fmt, ... ) printk( KERN_INFO fmt "\n", ##__VA_ARGS__ ) ++#else ++#define LOG_DBG( fmt, ... ) ++#endif ++#define LOG_ERR( fmt, ... ) printk( KERN_ERR fmt "\n", ##__VA_ARGS__ ) ++ ++// Device (/dev) related variables ++static dev_t vc_mem_devnum = 0; ++static struct class *vc_mem_class = NULL; ++static struct cdev vc_mem_cdev; ++static int vc_mem_inited = 0; ++ ++// Proc entry ++static struct proc_dir_entry *vc_mem_proc_entry; ++ ++/* ++ * Videocore memory addresses and size ++ * ++ * Drivers that wish to know the videocore memory addresses and sizes should ++ * use these variables instead of the MM_IO_BASE and MM_ADDR_IO defines in ++ * headers. This allows the other drivers to not be tied down to a a certain ++ * address/size at compile time. ++ * ++ * In the future, the goal is to have the videocore memory virtual address and ++ * size be calculated at boot time rather than at compile time. The decision of ++ * where the videocore memory resides and its size would be in the hands of the ++ * bootloader (and/or kernel). When that happens, the values of these variables ++ * would be calculated and assigned in the init function. ++ */ ++// in the 2835 VC in mapped above ARM, but ARM has full access to VC space ++unsigned long mm_vc_mem_phys_addr = 0x00000000; ++unsigned int mm_vc_mem_size = 0; ++unsigned int mm_vc_mem_base = 0; ++ ++EXPORT_SYMBOL(mm_vc_mem_phys_addr); ++EXPORT_SYMBOL(mm_vc_mem_size); ++EXPORT_SYMBOL(mm_vc_mem_base); ++ ++static uint phys_addr = 0; ++static uint mem_size = 0; ++static uint mem_base = 0; ++ ++ ++/**************************************************************************** ++* ++* vc_mem_open ++* ++***************************************************************************/ ++ ++static int ++vc_mem_open(struct inode *inode, struct file *file) ++{ ++ (void) inode; ++ (void) file; ++ ++ LOG_DBG("%s: called file = 0x%p", __func__, file); ++ ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_release ++* ++***************************************************************************/ ++ ++static int ++vc_mem_release(struct inode *inode, struct file *file) ++{ ++ (void) inode; ++ (void) file; ++ ++ LOG_DBG("%s: called file = 0x%p", __func__, file); ++ ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_get_size ++* ++***************************************************************************/ ++ ++static void ++vc_mem_get_size(void) ++{ ++} ++ ++/**************************************************************************** ++* ++* vc_mem_get_base ++* ++***************************************************************************/ ++ ++static void ++vc_mem_get_base(void) ++{ ++} ++ ++/**************************************************************************** ++* ++* vc_mem_get_current_size ++* ++***************************************************************************/ ++ ++int ++vc_mem_get_current_size(void) ++{ ++ return mm_vc_mem_size; ++} ++ ++EXPORT_SYMBOL_GPL(vc_mem_get_current_size); ++ ++/**************************************************************************** ++* ++* vc_mem_ioctl ++* ++***************************************************************************/ ++ ++static long ++vc_mem_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int rc = 0; ++ ++ (void) cmd; ++ (void) arg; ++ ++ LOG_DBG("%s: called file = 0x%p", __func__, file); ++ ++ switch (cmd) { ++ case VC_MEM_IOC_MEM_PHYS_ADDR: ++ { ++ LOG_DBG("%s: VC_MEM_IOC_MEM_PHYS_ADDR=0x%p", ++ __func__, (void *) mm_vc_mem_phys_addr); ++ ++ if (copy_to_user((void *) arg, &mm_vc_mem_phys_addr, ++ sizeof (mm_vc_mem_phys_addr)) != 0) { ++ rc = -EFAULT; ++ } ++ break; ++ } ++ case VC_MEM_IOC_MEM_SIZE: ++ { ++ // Get the videocore memory size first ++ vc_mem_get_size(); ++ ++ LOG_DBG("%s: VC_MEM_IOC_MEM_SIZE=%u", __func__, ++ mm_vc_mem_size); ++ ++ if (copy_to_user((void *) arg, &mm_vc_mem_size, ++ sizeof (mm_vc_mem_size)) != 0) { ++ rc = -EFAULT; ++ } ++ break; ++ } ++ case VC_MEM_IOC_MEM_BASE: ++ { ++ // Get the videocore memory base ++ vc_mem_get_base(); ++ ++ LOG_DBG("%s: VC_MEM_IOC_MEM_BASE=%u", __func__, ++ mm_vc_mem_base); ++ ++ if (copy_to_user((void *) arg, &mm_vc_mem_base, ++ sizeof (mm_vc_mem_base)) != 0) { ++ rc = -EFAULT; ++ } ++ break; ++ } ++ case VC_MEM_IOC_MEM_LOAD: ++ { ++ // Get the videocore memory base ++ vc_mem_get_base(); ++ ++ LOG_DBG("%s: VC_MEM_IOC_MEM_LOAD=%u", __func__, ++ mm_vc_mem_base); ++ ++ if (copy_to_user((void *) arg, &mm_vc_mem_base, ++ sizeof (mm_vc_mem_base)) != 0) { ++ rc = -EFAULT; ++ } ++ break; ++ } ++ default: ++ { ++ return -ENOTTY; ++ } ++ } ++ LOG_DBG("%s: file = 0x%p returning %d", __func__, file, rc); ++ ++ return rc; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_mmap ++* ++***************************************************************************/ ++ ++static int ++vc_mem_mmap(struct file *filp, struct vm_area_struct *vma) ++{ ++ int rc = 0; ++ unsigned long length = vma->vm_end - vma->vm_start; ++ unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; ++ ++ LOG_DBG("%s: vm_start = 0x%08lx vm_end = 0x%08lx vm_pgoff = 0x%08lx", ++ __func__, (long) vma->vm_start, (long) vma->vm_end, ++ (long) vma->vm_pgoff); ++ ++ if (offset + length > mm_vc_mem_size) { ++ LOG_ERR("%s: length %ld is too big", __func__, length); ++ return -EINVAL; ++ } ++ // Do not cache the memory map ++ vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); ++ ++ rc = remap_pfn_range(vma, vma->vm_start, ++ (mm_vc_mem_phys_addr >> PAGE_SHIFT) + ++ vma->vm_pgoff, length, vma->vm_page_prot); ++ if (rc != 0) { ++ LOG_ERR("%s: remap_pfn_range failed (rc=%d)", __func__, rc); ++ } ++ ++ return rc; ++} ++ ++/**************************************************************************** ++* ++* File Operations for the driver. ++* ++***************************************************************************/ ++ ++static const struct file_operations vc_mem_fops = { ++ .owner = THIS_MODULE, ++ .open = vc_mem_open, ++ .release = vc_mem_release, ++ .unlocked_ioctl = vc_mem_ioctl, ++ .mmap = vc_mem_mmap, ++}; ++ ++/**************************************************************************** ++* ++* vc_mem_proc_read ++* ++***************************************************************************/ ++ ++static int ++vc_mem_proc_read(char *buf, char **start, off_t offset, int count, int *eof, ++ void *data) ++{ ++ char *p = buf; ++ ++ (void) start; ++ (void) count; ++ (void) data; ++ ++ if (offset > 0) { ++ *eof = 1; ++ return 0; ++ } ++ // Get the videocore memory size first ++ vc_mem_get_size(); ++ ++ p += sprintf(p, "Videocore memory:\n"); ++ if (mm_vc_mem_phys_addr != 0) ++ p += sprintf(p, " Physical address: 0x%p\n", ++ (void *) mm_vc_mem_phys_addr); ++ else ++ p += sprintf(p, " Physical address: 0x00000000\n"); ++ p += sprintf(p, " Length (bytes): %u\n", mm_vc_mem_size); ++ ++ *eof = 1; ++ return p - buf; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_proc_write ++* ++***************************************************************************/ ++ ++static int ++vc_mem_proc_write(struct file *file, const char __user * buffer, ++ unsigned long count, void *data) ++{ ++ int rc = -EFAULT; ++ char input_str[10]; ++ ++ memset(input_str, 0, sizeof (input_str)); ++ ++ if (count > sizeof (input_str)) { ++ LOG_ERR("%s: input string length too long", __func__); ++ goto out; ++ } ++ ++ if (copy_from_user(input_str, buffer, count - 1)) { ++ LOG_ERR("%s: failed to get input string", __func__); ++ goto out; ++ } ++ ++ if (strncmp(input_str, "connect", strlen("connect")) == 0) { ++ // Get the videocore memory size from the videocore ++ vc_mem_get_size(); ++ } ++ ++ out: ++ return rc; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_init ++* ++***************************************************************************/ ++ ++static int __init ++vc_mem_init(void) ++{ ++ int rc = -EFAULT; ++ struct device *dev; ++ ++ LOG_DBG("%s: called", __func__); ++ ++ mm_vc_mem_phys_addr = phys_addr; ++ mm_vc_mem_size = mem_size; ++ mm_vc_mem_base = mem_base; ++ ++ vc_mem_get_size(); ++ ++ printk("vc-mem: phys_addr:0x%08lx mem_base=0x%08x mem_size:0x%08x(%u MiB)\n", ++ mm_vc_mem_phys_addr, mm_vc_mem_base, mm_vc_mem_size, mm_vc_mem_size / (1024 * 1024)); ++ ++ if ((rc = alloc_chrdev_region(&vc_mem_devnum, 0, 1, DRIVER_NAME)) < 0) { ++ LOG_ERR("%s: alloc_chrdev_region failed (rc=%d)", __func__, rc); ++ goto out_err; ++ } ++ ++ cdev_init(&vc_mem_cdev, &vc_mem_fops); ++ if ((rc = cdev_add(&vc_mem_cdev, vc_mem_devnum, 1)) != 0) { ++ LOG_ERR("%s: cdev_add failed (rc=%d)", __func__, rc); ++ goto out_unregister; ++ } ++ ++ vc_mem_class = class_create(THIS_MODULE, DRIVER_NAME); ++ if (IS_ERR(vc_mem_class)) { ++ rc = PTR_ERR(vc_mem_class); ++ LOG_ERR("%s: class_create failed (rc=%d)", __func__, rc); ++ goto out_cdev_del; ++ } ++ ++ dev = device_create(vc_mem_class, NULL, vc_mem_devnum, NULL, ++ DRIVER_NAME); ++ if (IS_ERR(dev)) { ++ rc = PTR_ERR(dev); ++ LOG_ERR("%s: device_create failed (rc=%d)", __func__, rc); ++ goto out_class_destroy; ++ } ++ ++#if 0 ++ vc_mem_proc_entry = create_proc_entry(DRIVER_NAME, 0444, NULL); ++ if (vc_mem_proc_entry == NULL) { ++ rc = -EFAULT; ++ LOG_ERR("%s: create_proc_entry failed", __func__); ++ goto out_device_destroy; ++ } ++ vc_mem_proc_entry->read_proc = vc_mem_proc_read; ++ vc_mem_proc_entry->write_proc = vc_mem_proc_write; ++#endif ++ ++ vc_mem_inited = 1; ++ return 0; ++ ++ out_device_destroy: ++ device_destroy(vc_mem_class, vc_mem_devnum); ++ ++ out_class_destroy: ++ class_destroy(vc_mem_class); ++ vc_mem_class = NULL; ++ ++ out_cdev_del: ++ cdev_del(&vc_mem_cdev); ++ ++ out_unregister: ++ unregister_chrdev_region(vc_mem_devnum, 1); ++ ++ out_err: ++ return -1; ++} ++ ++/**************************************************************************** ++* ++* vc_mem_exit ++* ++***************************************************************************/ ++ ++static void __exit ++vc_mem_exit(void) ++{ ++ LOG_DBG("%s: called", __func__); ++ ++ if (vc_mem_inited) { ++#if 0 ++ remove_proc_entry(vc_mem_proc_entry->name, NULL); ++#endif ++ device_destroy(vc_mem_class, vc_mem_devnum); ++ class_destroy(vc_mem_class); ++ cdev_del(&vc_mem_cdev); ++ unregister_chrdev_region(vc_mem_devnum, 1); ++ } ++} ++ ++module_init(vc_mem_init); ++module_exit(vc_mem_exit); ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Broadcom Corporation"); ++ ++module_param(phys_addr, uint, 0644); ++module_param(mem_size, uint, 0644); ++module_param(mem_base, uint, 0644); ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/vcio.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/vcio.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,474 @@ ++/* ++ * linux/arch/arm/mach-bcm2708/vcio.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This device provides a shared mechanism for writing to the mailboxes, ++ * semaphores, doorbells etc. that are shared between the ARM and the ++ * VideoCore processor ++ */ ++ ++#if defined(CONFIG_SERIAL_BCM_MBOX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) ++#define SUPPORT_SYSRQ ++#endif ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++#include ++ ++ ++#define DRIVER_NAME BCM_VCIO_DRIVER_NAME ++ ++/* ---------------------------------------------------------------------- ++ * Mailbox ++ * -------------------------------------------------------------------- */ ++ ++/* offsets from a mail box base address */ ++#define MAIL_WRT 0x00 /* write - and next 4 words */ ++#define MAIL_RD 0x00 /* read - and next 4 words */ ++#define MAIL_POL 0x10 /* read without popping the fifo */ ++#define MAIL_SND 0x14 /* sender ID (bottom two bits) */ ++#define MAIL_STA 0x18 /* status */ ++#define MAIL_CNF 0x1C /* configuration */ ++ ++#define MBOX_MSG(chan, data28) (((data28) & ~0xf) | ((chan) & 0xf)) ++#define MBOX_MSG_LSB(chan, data28) (((data28) << 4) | ((chan) & 0xf)) ++#define MBOX_CHAN(msg) ((msg) & 0xf) ++#define MBOX_DATA28(msg) ((msg) & ~0xf) ++#define MBOX_DATA28_LSB(msg) (((uint32_t)msg) >> 4) ++ ++#define MBOX_MAGIC 0xd0d0c0de ++ ++struct vc_mailbox { ++ struct device *dev; /* parent device */ ++ void __iomem *status; ++ void __iomem *config; ++ void __iomem *read; ++ void __iomem *write; ++ uint32_t msg[MBOX_CHAN_COUNT]; ++ struct semaphore sema[MBOX_CHAN_COUNT]; ++ uint32_t magic; ++}; ++ ++static void mbox_init(struct vc_mailbox *mbox_out, struct device *dev, ++ uint32_t addr_mbox) ++{ ++ int i; ++ ++ mbox_out->dev = dev; ++ mbox_out->status = __io_address(addr_mbox + MAIL_STA); ++ mbox_out->config = __io_address(addr_mbox + MAIL_CNF); ++ mbox_out->read = __io_address(addr_mbox + MAIL_RD); ++ /* Write to the other mailbox */ ++ mbox_out->write = ++ __io_address((addr_mbox ^ ARM_0_MAIL0_WRT ^ ARM_0_MAIL1_WRT) + ++ MAIL_WRT); ++ ++ for (i = 0; i < MBOX_CHAN_COUNT; i++) { ++ mbox_out->msg[i] = 0; ++ sema_init(&mbox_out->sema[i], 0); ++ } ++ ++ /* Enable the interrupt on data reception */ ++ writel(ARM_MC_IHAVEDATAIRQEN, mbox_out->config); ++ ++ mbox_out->magic = MBOX_MAGIC; ++} ++ ++static int mbox_write(struct vc_mailbox *mbox, unsigned chan, uint32_t data28) ++{ ++ int rc; ++ ++ if (mbox->magic != MBOX_MAGIC) ++ rc = -EINVAL; ++ else { ++ /* wait for the mailbox FIFO to have some space in it */ ++ while (0 != (readl(mbox->status) & ARM_MS_FULL)) ++ cpu_relax(); ++ ++ writel(MBOX_MSG(chan, data28), mbox->write); ++ rc = 0; ++ } ++ return rc; ++} ++ ++static int mbox_read(struct vc_mailbox *mbox, unsigned chan, uint32_t *data28) ++{ ++ int rc; ++ ++ if (mbox->magic != MBOX_MAGIC) ++ rc = -EINVAL; ++ else { ++ down(&mbox->sema[chan]); ++ *data28 = MBOX_DATA28(mbox->msg[chan]); ++ mbox->msg[chan] = 0; ++ rc = 0; ++ } ++ return rc; ++} ++ ++static irqreturn_t mbox_irq(int irq, void *dev_id) ++{ ++ /* wait for the mailbox FIFO to have some data in it */ ++ struct vc_mailbox *mbox = (struct vc_mailbox *) dev_id; ++ int status = readl(mbox->status); ++ int ret = IRQ_NONE; ++ ++ while (!(status & ARM_MS_EMPTY)) { ++ uint32_t msg = readl(mbox->read); ++ int chan = MBOX_CHAN(msg); ++ if (chan < MBOX_CHAN_COUNT) { ++ if (mbox->msg[chan]) { ++ /* Overflow */ ++ printk(KERN_ERR DRIVER_NAME ++ ": mbox chan %d overflow - drop %08x\n", ++ chan, msg); ++ } else { ++ mbox->msg[chan] = (msg | 0xf); ++ up(&mbox->sema[chan]); ++ } ++ } else { ++ printk(KERN_ERR DRIVER_NAME ++ ": invalid channel selector (msg %08x)\n", msg); ++ } ++ ret = IRQ_HANDLED; ++ status = readl(mbox->status); ++ } ++ return ret; ++} ++ ++static struct irqaction mbox_irqaction = { ++ .name = "ARM Mailbox IRQ", ++ .flags = IRQF_DISABLED | IRQF_IRQPOLL, ++ .handler = mbox_irq, ++}; ++ ++/* ---------------------------------------------------------------------- ++ * Mailbox Methods ++ * -------------------------------------------------------------------- */ ++ ++static struct device *mbox_dev; /* we assume there's only one! */ ++ ++static int dev_mbox_write(struct device *dev, unsigned chan, uint32_t data28) ++{ ++ int rc; ++ ++ struct vc_mailbox *mailbox = dev_get_drvdata(dev); ++ device_lock(dev); ++ rc = mbox_write(mailbox, chan, data28); ++ device_unlock(dev); ++ ++ return rc; ++} ++ ++static int dev_mbox_read(struct device *dev, unsigned chan, uint32_t *data28) ++{ ++ int rc; ++ ++ struct vc_mailbox *mailbox = dev_get_drvdata(dev); ++ device_lock(dev); ++ rc = mbox_read(mailbox, chan, data28); ++ device_unlock(dev); ++ ++ return rc; ++} ++ ++extern int bcm_mailbox_write(unsigned chan, uint32_t data28) ++{ ++ if (mbox_dev) ++ return dev_mbox_write(mbox_dev, chan, data28); ++ else ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(bcm_mailbox_write); ++ ++extern int bcm_mailbox_read(unsigned chan, uint32_t *data28) ++{ ++ if (mbox_dev) ++ return dev_mbox_read(mbox_dev, chan, data28); ++ else ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(bcm_mailbox_read); ++ ++static void dev_mbox_register(const char *dev_name, struct device *dev) ++{ ++ mbox_dev = dev; ++} ++ ++static int mbox_copy_from_user(void *dst, const void *src, int size) ++{ ++ if ( (uint32_t)src < TASK_SIZE) ++ { ++ return copy_from_user(dst, src, size); ++ } ++ else ++ { ++ memcpy( dst, src, size ); ++ return 0; ++ } ++} ++ ++static int mbox_copy_to_user(void *dst, const void *src, int size) ++{ ++ if ( (uint32_t)dst < TASK_SIZE) ++ { ++ return copy_to_user(dst, src, size); ++ } ++ else ++ { ++ memcpy( dst, src, size ); ++ return 0; ++ } ++} ++ ++static DEFINE_MUTEX(mailbox_lock); ++extern int bcm_mailbox_property(void *data, int size) ++{ ++ uint32_t success; ++ dma_addr_t mem_bus; /* the memory address accessed from videocore */ ++ void *mem_kern; /* the memory address accessed from driver */ ++ int s = 0; ++ ++ mutex_lock(&mailbox_lock); ++ /* allocate some memory for the messages communicating with GPU */ ++ mem_kern = dma_alloc_coherent(NULL, PAGE_ALIGN(size), &mem_bus, GFP_ATOMIC); ++ if (mem_kern) { ++ /* create the message */ ++ mbox_copy_from_user(mem_kern, data, size); ++ ++ /* send the message */ ++ wmb(); ++ s = bcm_mailbox_write(MBOX_CHAN_PROPERTY, (uint32_t)mem_bus); ++ if (s == 0) { ++ s = bcm_mailbox_read(MBOX_CHAN_PROPERTY, &success); ++ } ++ if (s == 0) { ++ /* copy the response */ ++ rmb(); ++ mbox_copy_to_user(data, mem_kern, size); ++ } ++ dma_free_coherent(NULL, PAGE_ALIGN(size), mem_kern, mem_bus); ++ } else { ++ s = -ENOMEM; ++ } ++ if (s != 0) ++ printk(KERN_ERR DRIVER_NAME ": %s failed (%d)\n", __func__, s); ++ ++ mutex_unlock(&mailbox_lock); ++ return s; ++} ++EXPORT_SYMBOL_GPL(bcm_mailbox_property); ++ ++/* ---------------------------------------------------------------------- ++ * Platform Device for Mailbox ++ * -------------------------------------------------------------------- */ ++ ++/* ++ * Is the device open right now? Used to prevent ++ * concurent access into the same device ++ */ ++static int Device_Open = 0; ++ ++/* ++ * This is called whenever a process attempts to open the device file ++ */ ++static int device_open(struct inode *inode, struct file *file) ++{ ++ /* ++ * We don't want to talk to two processes at the same time ++ */ ++ if (Device_Open) ++ return -EBUSY; ++ ++ Device_Open++; ++ /* ++ * Initialize the message ++ */ ++ try_module_get(THIS_MODULE); ++ return 0; ++} ++ ++static int device_release(struct inode *inode, struct file *file) ++{ ++ /* ++ * We're now ready for our next caller ++ */ ++ Device_Open--; ++ ++ module_put(THIS_MODULE); ++ return 0; ++} ++ ++/* ++ * This function is called whenever a process tries to do an ioctl on our ++ * device file. We get two extra parameters (additional to the inode and file ++ * structures, which all device functions get): the number of the ioctl called ++ * and the parameter given to the ioctl function. ++ * ++ * If the ioctl is write or read/write (meaning output is returned to the ++ * calling process), the ioctl call returns the output of this function. ++ * ++ */ ++static long device_ioctl(struct file *file, /* see include/linux/fs.h */ ++ unsigned int ioctl_num, /* number and param for ioctl */ ++ unsigned long ioctl_param) ++{ ++ unsigned size; ++ /* ++ * Switch according to the ioctl called ++ */ ++ switch (ioctl_num) { ++ case IOCTL_MBOX_PROPERTY: ++ /* ++ * Receive a pointer to a message (in user space) and set that ++ * to be the device's message. Get the parameter given to ++ * ioctl by the process. ++ */ ++ mbox_copy_from_user(&size, (void *)ioctl_param, sizeof size); ++ return bcm_mailbox_property((void *)ioctl_param, size); ++ break; ++ default: ++ printk(KERN_ERR DRIVER_NAME "unknown ioctl: %d\n", ioctl_num); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/* Module Declarations */ ++ ++/* ++ * This structure will hold the functions to be called ++ * when a process does something to the device we ++ * created. Since a pointer to this structure is kept in ++ * the devices table, it can't be local to ++ * init_module. NULL is for unimplemented functios. ++ */ ++struct file_operations fops = { ++ .unlocked_ioctl = device_ioctl, ++ .open = device_open, ++ .release = device_release, /* a.k.a. close */ ++}; ++ ++static int bcm_vcio_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct vc_mailbox *mailbox; ++ ++ mailbox = kzalloc(sizeof(*mailbox), GFP_KERNEL); ++ if (NULL == mailbox) { ++ printk(KERN_ERR DRIVER_NAME ": failed to allocate " ++ "mailbox memory\n"); ++ ret = -ENOMEM; ++ } else { ++ struct resource *res; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (res == NULL) { ++ printk(KERN_ERR DRIVER_NAME ": failed to obtain memory " ++ "resource\n"); ++ ret = -ENODEV; ++ kfree(mailbox); ++ } else { ++ /* should be based on the registers from res really */ ++ mbox_init(mailbox, &pdev->dev, ARM_0_MAIL0_RD); ++ ++ platform_set_drvdata(pdev, mailbox); ++ dev_mbox_register(DRIVER_NAME, &pdev->dev); ++ ++ mbox_irqaction.dev_id = mailbox; ++ setup_irq(IRQ_ARM_MAILBOX, &mbox_irqaction); ++ printk(KERN_INFO DRIVER_NAME ": mailbox at %p\n", ++ __io_address(ARM_0_MAIL0_RD)); ++ } ++ } ++ ++ if (ret == 0) { ++ /* ++ * Register the character device ++ */ ++ ret = register_chrdev(MAJOR_NUM, DEVICE_FILE_NAME, &fops); ++ ++ /* ++ * Negative values signify an error ++ */ ++ if (ret < 0) { ++ printk(KERN_ERR DRIVER_NAME ++ "Failed registering the character device %d\n", ret); ++ return ret; ++ } ++ } ++ return ret; ++} ++ ++static int bcm_vcio_remove(struct platform_device *pdev) ++{ ++ struct vc_mailbox *mailbox = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ kfree(mailbox); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm_mbox_driver = { ++ .probe = bcm_vcio_probe, ++ .remove = bcm_vcio_remove, ++ ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init bcm_mbox_init(void) ++{ ++ int ret; ++ ++ printk(KERN_INFO "mailbox: Broadcom VideoCore Mailbox driver\n"); ++ ++ ret = platform_driver_register(&bcm_mbox_driver); ++ if (ret != 0) { ++ printk(KERN_ERR DRIVER_NAME ": failed to register " ++ "on platform\n"); ++ } ++ ++ return ret; ++} ++ ++static void __exit bcm_mbox_exit(void) ++{ ++ platform_driver_unregister(&bcm_mbox_driver); ++} ++ ++arch_initcall(bcm_mbox_init); /* Initialize early */ ++module_exit(bcm_mbox_exit); ++ ++MODULE_AUTHOR("Gray Girling"); ++MODULE_DESCRIPTION("ARM I/O to VideoCore processor"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:bcm-mbox"); +Index: linux-3.10-3.10.11/arch/arm/mm/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mm/Kconfig 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mm/Kconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -358,7 +358,7 @@ + + # ARMv6 + config CPU_V6 +- bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX ++ bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX || MACH_BCM2708 + select CPU_32v6 + select CPU_ABRT_EV6 + select CPU_CACHE_V6 +Index: linux-3.10-3.10.11/arch/arm/mm/proc-v6.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mm/proc-v6.S 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mm/proc-v6.S 2014-04-28 00:42:00.000000000 +0000 +@@ -73,10 +73,19 @@ + * + * IRQs are already disabled. + */ ++ ++/* See jira SW-5991 for details of this workaround */ + ENTRY(cpu_v6_do_idle) +- mov r1, #0 +- mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode +- mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt ++ .align 5 ++ mov r1, #2 ++1: subs r1, #1 ++ nop ++ mcreq p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode ++ mcreq p15, 0, r1, c7, c0, 4 @ wait for interrupt ++ nop ++ nop ++ nop ++ bne 1b + mov pc, lr + + ENTRY(cpu_v6_dcache_clean_area) +Index: linux-3.10-3.10.11/arch/arm/tools/mach-types +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/tools/mach-types 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/tools/mach-types 2014-04-28 00:42:00.000000000 +0000 +@@ -522,6 +522,7 @@ + prima2_evb MACH_PRIMA2_EVB PRIMA2_EVB 3103 + paz00 MACH_PAZ00 PAZ00 3128 + acmenetusfoxg20 MACH_ACMENETUSFOXG20 ACMENETUSFOXG20 3129 ++bcm2708 MACH_BCM2708 BCM2708 3138 + ag5evm MACH_AG5EVM AG5EVM 3189 + ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206 + wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207 +Index: linux-3.10-3.10.11/drivers/mmc/host/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/Kconfig 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/Kconfig 2014-04-28 00:42:00.000000000 +0000 +@@ -249,6 +249,27 @@ + + YMMV. + ++config MMC_SDHCI_BCM2708 ++ tristate "SDHCI support on BCM2708" ++ depends on MMC_SDHCI && MACH_BCM2708 ++ select MMC_SDHCI_IO_ACCESSORS ++ help ++ This selects the Secure Digital Host Controller Interface (SDHCI) ++ often referrered to as the eMMC block. ++ ++ If you have a controller with this interface, say Y or M here. ++ ++ If unsure, say N. ++ ++config MMC_SDHCI_BCM2708_DMA ++ bool "DMA support on BCM2708 Arasan controller" ++ depends on MMC_SDHCI_BCM2708 ++ help ++ Enable DMA support on the Arasan SDHCI controller in Broadcom 2708 ++ based chips. ++ ++ If unsure, say N. ++ + config MMC_SDHCI_BCM2835 + tristate "SDHCI platform support for the BCM2835 SD/MMC Controller" + depends on ARCH_BCM2835 +Index: linux-3.10-3.10.11/drivers/mmc/host/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/Makefile 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/Makefile 2014-04-28 00:42:00.000000000 +0000 +@@ -15,6 +15,7 @@ + obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o + obj-$(CONFIG_MMC_SDHCI_SIRF) += sdhci-sirf.o + obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o ++obj-$(CONFIG_MMC_SDHCI_BCM2708) += sdhci-bcm2708.o + obj-$(CONFIG_MMC_WBSD) += wbsd.o + obj-$(CONFIG_MMC_AU1X) += au1xmmc.o + obj-$(CONFIG_MMC_OMAP) += omap.o +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1,1425 @@ ++/* ++ * sdhci-bcm2708.c Support for SDHCI device on BCM2708 ++ * Copyright (c) 2010 Broadcom ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++ ++/* Supports: ++ * SDHCI platform device - Arasan SD controller in BCM2708 ++ * ++ * Inspired by sdhci-pci.c, by Pierre Ossman ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#include "sdhci.h" ++ ++/*****************************************************************************\ ++ * * ++ * Configuration * ++ * * ++\*****************************************************************************/ ++ ++#define DRIVER_NAME "bcm2708_sdhci" ++ ++/* for the time being insist on DMA mode - PIO seems not to work */ ++#ifndef CONFIG_MMC_SDHCI_BCM2708_DMA ++#warning Non-DMA (PIO) version of this driver currently unavailable ++#endif ++#undef CONFIG_MMC_SDHCI_BCM2708_DMA ++#define CONFIG_MMC_SDHCI_BCM2708_DMA y ++ ++#define USE_SYNC_AFTER_DMA ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++/* #define CHECK_DMA_USE */ ++#endif ++//#define LOG_REGISTERS ++ ++#define USE_SCHED_TIME ++#define USE_SPACED_WRITES_2CLK 1 /* space consecutive register writes */ ++#define USE_SOFTWARE_TIMEOUTS 1 /* not hardware timeouts */ ++#define SOFTWARE_ERASE_TIMEOUT_SEC 30 ++ ++#define SDHCI_BCM_DMA_CHAN 4 /* this default is normally overriden */ ++#define SDHCI_BCM_DMA_WAITS 0 /* delays slowing DMA transfers: 0-31 */ ++/* We are worried that SD card DMA use may be blocking the AXI bus for others */ ++ ++/*! TODO: obtain these from the physical address */ ++#define DMA_SDHCI_BASE 0x7e300000 /* EMMC register block on Videocore */ ++#define DMA_SDHCI_BUFFER (DMA_SDHCI_BASE + SDHCI_BUFFER) ++ ++#define BCM2708_SDHCI_SLEEP_TIMEOUT 1000 /* msecs */ ++ ++/* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */ ++#define BCM2708_EMMC_CLOCK_FREQ 80000000 ++ ++/*****************************************************************************\ ++ * * ++ * Debug * ++ * * ++\*****************************************************************************/ ++ ++ ++ ++#define DBG(f, x...) \ ++ pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x) ++// printk(KERN_INFO DRIVER_NAME " [%s()]: " f, __func__,## x)//GRAYG ++ ++ ++/*****************************************************************************\ ++ * * ++ * High Precision Time * ++ * * ++\*****************************************************************************/ ++ ++#ifdef USE_SCHED_TIME ++ ++#include ++ ++typedef unsigned long hptime_t; ++ ++#define FMT_HPT "lu" ++ ++static inline hptime_t hptime(void) ++{ ++ return frc_clock_ticks32(); ++} ++ ++#define HPTIME_CLK_NS 1000ul ++ ++#else ++ ++typedef unsigned long hptime_t; ++ ++#define FMT_HPT "lu" ++ ++static inline hptime_t hptime(void) ++{ ++ return jiffies; ++} ++ ++#define HPTIME_CLK_NS (1000000000ul/HZ) ++ ++#endif ++ ++static inline unsigned long int since_ns(hptime_t t) ++{ ++ return (unsigned long)((hptime() - t) * HPTIME_CLK_NS); ++} ++ ++#if 0 ++static void hptime_test(void) ++{ ++ hptime_t now; ++ hptime_t later; ++ ++ now = hptime(); ++ msleep(10); ++ later = hptime(); ++ ++ printk(KERN_INFO DRIVER_NAME": 10ms = %"FMT_HPT" clks " ++ "(from %"FMT_HPT" to %"FMT_HPT") = %luns\n", ++ later-now, now, later, ++ (unsigned long)(HPTIME_CLK_NS * (later - now))); ++ ++ now = hptime(); ++ msleep(1000); ++ later = hptime(); ++ ++ printk(KERN_INFO DRIVER_NAME": 1s = %"FMT_HPT" clks " ++ "(from %"FMT_HPT" to %"FMT_HPT") = %luns\n", ++ later-now, now, later, ++ (unsigned long)(HPTIME_CLK_NS * (later - now))); ++} ++#endif ++ ++/*****************************************************************************\ ++ * * ++ * SDHCI core callbacks * ++ * * ++\*****************************************************************************/ ++ ++ ++#ifdef CHECK_DMA_USE ++/*#define CHECK_DMA_REG_USE*/ ++#endif ++ ++#ifdef CHECK_DMA_REG_USE ++/* we don't expect anything to be using these registers during a ++ DMA (except the IRQ status) - so check */ ++static void check_dma_reg_use(struct sdhci_host *host, int reg); ++#else ++#define check_dma_reg_use(host, reg) ++#endif ++ ++ ++static inline u32 sdhci_bcm2708_raw_readl(struct sdhci_host *host, int reg) ++{ ++ return readl(host->ioaddr + reg); ++} ++ ++u32 sdhci_bcm2708_readl(struct sdhci_host *host, int reg) ++{ ++ u32 l = sdhci_bcm2708_raw_readl(host, reg); ++ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: readl from 0x%02x, value 0x%08x\n", ++ mmc_hostname(host->mmc), reg, l); ++#endif ++ check_dma_reg_use(host, reg); ++ ++ return l; ++} ++ ++u16 sdhci_bcm2708_readw(struct sdhci_host *host, int reg) ++{ ++ u32 l = sdhci_bcm2708_raw_readl(host, reg & ~3); ++ u32 w = l >> (reg << 3 & 0x18) & 0xffff; ++ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: readw from 0x%02x, value 0x%04x\n", ++ mmc_hostname(host->mmc), reg, w); ++#endif ++ check_dma_reg_use(host, reg); ++ ++ return (u16)w; ++} ++ ++u8 sdhci_bcm2708_readb(struct sdhci_host *host, int reg) ++{ ++ u32 l = sdhci_bcm2708_raw_readl(host, reg & ~3); ++ u32 b = l >> (reg << 3 & 0x18) & 0xff; ++ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: readb from 0x%02x, value 0x%02x\n", ++ mmc_hostname(host->mmc), reg, b); ++#endif ++ check_dma_reg_use(host, reg); ++ ++ return (u8)b; ++} ++ ++ ++static void sdhci_bcm2708_raw_writel(struct sdhci_host *host, u32 val, int reg) ++{ ++ u32 ier; ++ ++#if USE_SPACED_WRITES_2CLK ++ static bool timeout_disabled = false; ++ unsigned int ns_2clk = 0; ++ ++ /* The Arasan has a bugette whereby it may lose the content of ++ * successive writes to registers that are within two SD-card clock ++ * cycles of each other (a clock domain crossing problem). ++ * It seems, however, that the data register does not have this problem. ++ * (Which is just as well - otherwise we'd have to nobble the DMA engine ++ * too) ++ */ ++ if (reg != SDHCI_BUFFER && host->clock != 0) { ++ /* host->clock is the clock freq in Hz */ ++ static hptime_t last_write_hpt; ++ hptime_t now = hptime(); ++ ns_2clk = 2000000000/host->clock; ++ ++ if (now == last_write_hpt || now == last_write_hpt+1) { ++ /* we can't guarantee any significant time has ++ * passed - we'll have to wait anyway ! */ ++ udelay((ns_2clk+1000-1)/1000); ++ } else ++ { ++ /* we must have waited at least this many ns: */ ++ unsigned int ns_wait = HPTIME_CLK_NS * ++ (last_write_hpt - now - 1); ++ if (ns_wait < ns_2clk) ++ udelay((ns_2clk-ns_wait+500)/1000); ++ } ++ last_write_hpt = now; ++ } ++#if USE_SOFTWARE_TIMEOUTS ++ /* The Arasan is clocked for timeouts using the SD clock which is too ++ * fast for ERASE commands and causes issues. So we disable timeouts ++ * for ERASE */ ++ if (host->cmd != NULL && host->cmd->opcode == MMC_ERASE && ++ reg == (SDHCI_COMMAND & ~3)) { ++ mod_timer(&host->timer, ++ jiffies + SOFTWARE_ERASE_TIMEOUT_SEC * HZ); ++ ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); ++ ier &= ~SDHCI_INT_DATA_TIMEOUT; ++ writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); ++ timeout_disabled = true; ++ udelay((ns_2clk+1000-1)/1000); ++ } else if (timeout_disabled) { ++ ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); ++ ier |= SDHCI_INT_DATA_TIMEOUT; ++ writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); ++ timeout_disabled = false; ++ udelay((ns_2clk+1000-1)/1000); ++ } ++#endif ++ writel(val, host->ioaddr + reg); ++#else ++ void __iomem * regaddr = host->ioaddr + reg; ++ ++ writel(val, regaddr); ++ ++ if (reg != SDHCI_BUFFER && reg != SDHCI_INT_STATUS && host->clock != 0) ++ { ++ int timeout = 100000; ++ while (val != readl(regaddr) && --timeout > 0) ++ continue; ++ ++ if (timeout <= 0) ++ printk(KERN_ERR "%s: writing 0x%X to reg 0x%X " ++ "always gives 0x%X\n", ++ mmc_hostname(host->mmc), ++ val, reg, readl(regaddr)); ++ BUG_ON(timeout <= 0); ++ } ++#endif ++} ++ ++ ++void sdhci_bcm2708_writel(struct sdhci_host *host, u32 val, int reg) ++{ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: writel to 0x%02x, value 0x%08x\n", ++ mmc_hostname(host->mmc), reg, val); ++#endif ++ check_dma_reg_use(host, reg); ++ ++ sdhci_bcm2708_raw_writel(host, val, reg); ++} ++ ++void sdhci_bcm2708_writew(struct sdhci_host *host, u16 val, int reg) ++{ ++ static u32 shadow = 0; ++ ++ u32 p = reg == SDHCI_COMMAND ? shadow : ++ sdhci_bcm2708_raw_readl(host, reg & ~3); ++ u32 s = reg << 3 & 0x18; ++ u32 l = val << s; ++ u32 m = 0xffff << s; ++ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: writew to 0x%02x, value 0x%04x\n", ++ mmc_hostname(host->mmc), reg, val); ++#endif ++ ++ if (reg == SDHCI_TRANSFER_MODE) ++ shadow = (p & ~m) | l; ++ else { ++ check_dma_reg_use(host, reg); ++ sdhci_bcm2708_raw_writel(host, (p & ~m) | l, reg & ~3); ++ } ++} ++ ++void sdhci_bcm2708_writeb(struct sdhci_host *host, u8 val, int reg) ++{ ++ u32 p = sdhci_bcm2708_raw_readl(host, reg & ~3); ++ u32 s = reg << 3 & 0x18; ++ u32 l = val << s; ++ u32 m = 0xff << s; ++ ++#ifdef LOG_REGISTERS ++ printk(KERN_ERR "%s: writeb to 0x%02x, value 0x%02x\n", ++ mmc_hostname(host->mmc), reg, val); ++#endif ++ ++ check_dma_reg_use(host, reg); ++ sdhci_bcm2708_raw_writel(host, (p & ~m) | l, reg & ~3); ++} ++ ++static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host) ++{ ++ return 20000000; // this value is in Hz (20MHz) ++} ++ ++static unsigned int sdhci_bcm2708_get_timeout_clock(struct sdhci_host *host) ++{ ++ if(host->clock) ++ return (host->clock / 1000); // this value is in kHz (100MHz) ++ else ++ return (sdhci_bcm2708_get_max_clock(host) / 1000); ++} ++ ++static void sdhci_bcm2708_set_clock(struct sdhci_host *host, unsigned int clock) ++{ ++ int div = 0; ++ u16 clk = 0; ++ unsigned long timeout; ++ ++ if (clock == host->clock) ++ return; ++ ++ sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); ++ ++ if (clock == 0) ++ goto out; ++ ++ if (BCM2708_EMMC_CLOCK_FREQ <= clock) ++ div = 1; ++ else { ++ for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { ++ if ((BCM2708_EMMC_CLOCK_FREQ / div) <= clock) ++ break; ++ } ++ } ++ ++ DBG( "desired SD clock: %d, actual: %d\n", ++ clock, BCM2708_EMMC_CLOCK_FREQ / div); ++ ++ clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; ++ clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) ++ << SDHCI_DIVIDER_HI_SHIFT; ++ clk |= SDHCI_CLOCK_INT_EN; ++ ++ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); ++ ++ timeout = 20; ++ while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) ++ & SDHCI_CLOCK_INT_STABLE)) { ++ if (timeout == 0) { ++ printk(KERN_ERR "%s: Internal clock never " ++ "stabilised.\n", mmc_hostname(host->mmc)); ++ return; ++ } ++ timeout--; ++ mdelay(1); ++ } ++ ++ clk |= SDHCI_CLOCK_CARD_EN; ++ sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); ++out: ++ host->clock = clock; ++ } ++ ++/*****************************************************************************\ ++ * * ++ * DMA Operation * ++ * * ++\*****************************************************************************/ ++ ++struct sdhci_bcm2708_priv { ++ int dma_chan; ++ int dma_irq; ++ void __iomem *dma_chan_base; ++ struct bcm2708_dma_cb *cb_base; /* DMA control blocks */ ++ dma_addr_t cb_handle; ++ /* tracking scatter gather progress */ ++ unsigned sg_ix; /* scatter gather list index */ ++ unsigned sg_done; /* bytes in current sg_ix done */ ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ unsigned char dma_wanted; /* DMA transfer requested */ ++ unsigned char dma_waits; /* wait states in DMAs */ ++#ifdef CHECK_DMA_USE ++ unsigned char dmas_pending; /* no of unfinished DMAs */ ++ hptime_t when_started; ++ hptime_t when_reset; ++ hptime_t when_stopped; ++#endif ++#endif ++ /* signalling the end of a transfer */ ++ void (*complete)(struct sdhci_host *); ++}; ++ ++#define SDHCI_HOST_PRIV(host) \ ++ (struct sdhci_bcm2708_priv *)((struct sdhci_host *)(host)+1) ++ ++ ++ ++#ifdef CHECK_DMA_REG_USE ++static void check_dma_reg_use(struct sdhci_host *host, int reg) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ if (host_priv->dma_wanted && reg != SDHCI_INT_STATUS) { ++ printk(KERN_INFO"%s: accessing register 0x%x during DMA\n", ++ mmc_hostname(host->mmc), reg); ++ } ++} ++#endif ++ ++ ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ ++static void sdhci_clear_set_irqgen(struct sdhci_host *host, u32 clear, u32 set) ++{ ++ u32 ier; ++ ++ ier = sdhci_bcm2708_raw_readl(host, SDHCI_SIGNAL_ENABLE); ++ ier &= ~clear; ++ ier |= set; ++ /* change which requests generate IRQs - makes no difference to ++ the content of SDHCI_INT_STATUS, or the need to acknowledge IRQs */ ++ sdhci_bcm2708_raw_writel(host, ier, SDHCI_SIGNAL_ENABLE); ++} ++ ++static void sdhci_signal_irqs(struct sdhci_host *host, u32 irqs) ++{ ++ sdhci_clear_set_irqgen(host, 0, irqs); ++} ++ ++static void sdhci_unsignal_irqs(struct sdhci_host *host, u32 irqs) ++{ ++ sdhci_clear_set_irqgen(host, irqs, 0); ++} ++ ++ ++ ++static void schci_bcm2708_cb_read(struct sdhci_bcm2708_priv *host, ++ int ix, ++ dma_addr_t dma_addr, unsigned len, ++ int /*bool*/ is_last) ++{ ++ struct bcm2708_dma_cb *cb = &host->cb_base[ix]; ++ unsigned char dmawaits = host->dma_waits; ++ ++ cb->info = BCM2708_DMA_PER_MAP(BCM2708_DMA_DREQ_EMMC) | ++ BCM2708_DMA_WAITS(dmawaits) | ++ BCM2708_DMA_S_DREQ | ++ BCM2708_DMA_D_WIDTH | ++ BCM2708_DMA_D_INC; ++ cb->src = DMA_SDHCI_BUFFER; /* DATA register DMA address */ ++ cb->dst = dma_addr; ++ cb->length = len; ++ cb->stride = 0; ++ ++ if (is_last) { ++ cb->info |= BCM2708_DMA_INT_EN | ++ BCM2708_DMA_WAIT_RESP; ++ cb->next = 0; ++ } else ++ cb->next = host->cb_handle + ++ (ix+1)*sizeof(struct bcm2708_dma_cb); ++ ++ cb->pad[0] = 0; ++ cb->pad[1] = 0; ++} ++ ++static void schci_bcm2708_cb_write(struct sdhci_bcm2708_priv *host, ++ int ix, ++ dma_addr_t dma_addr, unsigned len, ++ int /*bool*/ is_last) ++{ ++ struct bcm2708_dma_cb *cb = &host->cb_base[ix]; ++ unsigned char dmawaits = host->dma_waits; ++ ++ /* We can make arbitrarily large writes as long as we specify DREQ to ++ pace the delivery of bytes to the Arasan hardware */ ++ cb->info = BCM2708_DMA_PER_MAP(BCM2708_DMA_DREQ_EMMC) | ++ BCM2708_DMA_WAITS(dmawaits) | ++ BCM2708_DMA_D_DREQ | ++ BCM2708_DMA_S_WIDTH | ++ BCM2708_DMA_S_INC; ++ cb->src = dma_addr; ++ cb->dst = DMA_SDHCI_BUFFER; /* DATA register DMA address */ ++ cb->length = len; ++ cb->stride = 0; ++ ++ if (is_last) { ++ cb->info |= BCM2708_DMA_INT_EN | ++ BCM2708_DMA_WAIT_RESP; ++ cb->next = 0; ++ } else ++ cb->next = host->cb_handle + ++ (ix+1)*sizeof(struct bcm2708_dma_cb); ++ ++ cb->pad[0] = 0; ++ cb->pad[1] = 0; ++} ++ ++ ++static void schci_bcm2708_dma_go(struct sdhci_host *host) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ void __iomem *dma_chan_base = host_priv->dma_chan_base; ++ ++ BUG_ON(host_priv->dma_wanted); ++#ifdef CHECK_DMA_USE ++ if (host_priv->dma_wanted) ++ printk(KERN_ERR "%s: DMA already in progress - " ++ "now %"FMT_HPT", last started %lu " ++ "reset %lu stopped %lu\n", ++ mmc_hostname(host->mmc), ++ hptime(), since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ else if (host_priv->dmas_pending > 0) ++ printk(KERN_INFO "%s: note - new DMA when %d reset DMAs " ++ "already in progress - " ++ "now %"FMT_HPT", started %lu reset %lu stopped %lu\n", ++ mmc_hostname(host->mmc), ++ host_priv->dmas_pending, ++ hptime(), since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ host_priv->dmas_pending += 1; ++ host_priv->when_started = hptime(); ++#endif ++ host_priv->dma_wanted = 1; ++ DBG("PDMA go - base %p handle %08X\n", dma_chan_base, ++ host_priv->cb_handle); ++ bcm_dma_start(dma_chan_base, host_priv->cb_handle); ++} ++ ++ ++static void ++sdhci_platdma_read(struct sdhci_host *host, dma_addr_t dma_addr, size_t len) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ ++ DBG("PDMA to read %d bytes\n", len); ++ host_priv->sg_done += len; ++ schci_bcm2708_cb_read(host_priv, 0, dma_addr, len, 1/*TRUE*/); ++ schci_bcm2708_dma_go(host); ++} ++ ++ ++static void ++sdhci_platdma_write(struct sdhci_host *host, dma_addr_t dma_addr, size_t len) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ ++ DBG("PDMA to write %d bytes\n", len); ++ //BUG_ON(0 != (len & 0x1ff)); ++ ++ host_priv->sg_done += len; ++ schci_bcm2708_cb_write(host_priv, 0, dma_addr, len, 1/*TRUE*/); ++ schci_bcm2708_dma_go(host); ++} ++ ++/*! space is avaiable to receive into or data is available to write ++ Platform DMA exported function ++*/ ++void ++sdhci_bcm2708_platdma_avail(struct sdhci_host *host, unsigned int *ref_intmask, ++ void(*completion_callback)(struct sdhci_host *host)) ++{ ++ struct mmc_data *data = host->data; ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ int sg_ix; ++ size_t bytes; ++ dma_addr_t addr; ++ ++ BUG_ON(NULL == data); ++ BUG_ON(0 == data->blksz); ++ ++ host_priv->complete = completion_callback; ++ ++ sg_ix = host_priv->sg_ix; ++ BUG_ON(sg_ix >= data->sg_len); ++ ++ /* we can DMA blocks larger than blksz - it may hang the DMA ++ channel but we are its only user */ ++ bytes = sg_dma_len(&data->sg[sg_ix]) - host_priv->sg_done; ++ addr = sg_dma_address(&data->sg[sg_ix]) + host_priv->sg_done; ++ ++ if (bytes > 0) { ++ /* We're going to poll for read/write available state until ++ we finish this DMA ++ */ ++ ++ if (data->flags & MMC_DATA_READ) { ++ if (*ref_intmask & SDHCI_INT_DATA_AVAIL) { ++ sdhci_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL | ++ SDHCI_INT_SPACE_AVAIL); ++ sdhci_platdma_read(host, addr, bytes); ++ } ++ } else { ++ if (*ref_intmask & SDHCI_INT_SPACE_AVAIL) { ++ sdhci_unsignal_irqs(host, SDHCI_INT_DATA_AVAIL | ++ SDHCI_INT_SPACE_AVAIL); ++ sdhci_platdma_write(host, addr, bytes); ++ } ++ } ++ } ++ /* else: ++ we have run out of bytes that need transferring (e.g. we may be in ++ the middle of the last DMA transfer), or ++ it is also possible that we've been called when another IRQ is ++ signalled, even though we've turned off signalling of our own IRQ */ ++ ++ *ref_intmask &= ~SDHCI_INT_DATA_END; ++ /* don't let the main sdhci driver act on this .. we'll deal with it ++ when we respond to the DMA - if one is currently in progress */ ++} ++ ++/* is it possible to DMA the given mmc_data structure? ++ Platform DMA exported function ++*/ ++int /*bool*/ ++sdhci_bcm2708_platdma_dmaable(struct sdhci_host *host, struct mmc_data *data) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ int ok = bcm_sg_suitable_for_dma(data->sg, data->sg_len); ++ ++ if (!ok) ++ DBG("Reverting to PIO - bad cache alignment\n"); ++ ++ else { ++ host_priv->sg_ix = 0; /* first SG index */ ++ host_priv->sg_done = 0; /* no bytes done */ ++ } ++ ++ return ok; ++} ++ ++#include //GRAYG ++/*! the current SD transacton has been abandonned ++ We need to tidy up if we were in the middle of a DMA ++ Platform DMA exported function ++*/ ++void ++sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ unsigned long flags; ++ ++ BUG_ON(NULL == host); ++ ++ spin_lock_irqsave(&host->lock, flags); ++ ++ if (host_priv->dma_wanted) { ++ if (NULL == data) { ++ printk(KERN_ERR "%s: ongoing DMA reset - no data!\n", ++ mmc_hostname(host->mmc)); ++ BUG_ON(NULL == data); ++ } else { ++ struct scatterlist *sg; ++ int sg_len; ++ int sg_todo; ++ int rc; ++ unsigned long cs; ++ ++ sg = data->sg; ++ sg_len = data->sg_len; ++ sg_todo = sg_dma_len(&sg[host_priv->sg_ix]); ++ ++ cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); ++ ++ if (!(BCM2708_DMA_ACTIVE & cs)) ++ printk(KERN_INFO "%s: missed completion of " ++ "cmd %d DMA (%d/%d [%d]/[%d]) - " ++ "ignoring it\n", ++ mmc_hostname(host->mmc), ++ host->last_cmdop, ++ host_priv->sg_done, sg_todo, ++ host_priv->sg_ix+1, sg_len); ++ else ++ printk(KERN_INFO "%s: resetting ongoing cmd %d" ++ "DMA before %d/%d [%d]/[%d] complete\n", ++ mmc_hostname(host->mmc), ++ host->last_cmdop, ++ host_priv->sg_done, sg_todo, ++ host_priv->sg_ix+1, sg_len); ++#ifdef CHECK_DMA_USE ++ printk(KERN_INFO "%s: now %"FMT_HPT" started %lu " ++ "last reset %lu last stopped %lu\n", ++ mmc_hostname(host->mmc), ++ hptime(), since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ { unsigned long info, debug; ++ void __iomem *base; ++ unsigned long pend0, pend1, pend2; ++ ++ base = host_priv->dma_chan_base; ++ cs = readl(base + BCM2708_DMA_CS); ++ info = readl(base + BCM2708_DMA_INFO); ++ debug = readl(base + BCM2708_DMA_DEBUG); ++ printk(KERN_INFO "%s: DMA%d CS=%08lX TI=%08lX " ++ "DEBUG=%08lX\n", ++ mmc_hostname(host->mmc), ++ host_priv->dma_chan, ++ cs, info, debug); ++ pend0 = readl(__io_address(ARM_IRQ_PEND0)); ++ pend1 = readl(__io_address(ARM_IRQ_PEND1)); ++ pend2 = readl(__io_address(ARM_IRQ_PEND2)); ++ ++ printk(KERN_INFO "%s: PEND0=%08lX " ++ "PEND1=%08lX PEND2=%08lX\n", ++ mmc_hostname(host->mmc), ++ pend0, pend1, pend2); ++ ++ //gintsts = readl(__io_address(GINTSTS)); ++ //gintmsk = readl(__io_address(GINTMSK)); ++ //printk(KERN_INFO "%s: USB GINTSTS=%08lX" ++ // "GINTMSK=%08lX\n", ++ // mmc_hostname(host->mmc), gintsts, gintmsk); ++ } ++#endif ++ rc = bcm_dma_abort(host_priv->dma_chan_base); ++ BUG_ON(rc != 0); ++ } ++ host_priv->dma_wanted = 0; ++#ifdef CHECK_DMA_USE ++ host_priv->when_reset = hptime(); ++#endif ++ } ++ ++ spin_unlock_irqrestore(&host->lock, flags); ++} ++ ++ ++static void sdhci_bcm2708_dma_complete_irq(struct sdhci_host *host, ++ u32 dma_cs) ++{ ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ struct mmc_data *data; ++ struct scatterlist *sg; ++ int sg_len; ++ int sg_ix; ++ int sg_todo; ++ unsigned long flags; ++ ++ BUG_ON(NULL == host); ++ ++ spin_lock_irqsave(&host->lock, flags); ++ data = host->data; ++ ++#ifdef CHECK_DMA_USE ++ if (host_priv->dmas_pending <= 0) ++ DBG("on completion no DMA in progress - " ++ "now %"FMT_HPT" started %lu reset %lu stopped %lu\n", ++ hptime(), since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ else if (host_priv->dmas_pending > 1) ++ DBG("still %d DMA in progress after completion - " ++ "now %"FMT_HPT" started %lu reset %lu stopped %lu\n", ++ host_priv->dmas_pending - 1, ++ hptime(), since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ BUG_ON(host_priv->dmas_pending <= 0); ++ host_priv->dmas_pending -= 1; ++ host_priv->when_stopped = hptime(); ++#endif ++ host_priv->dma_wanted = 0; ++ ++ if (NULL == data) { ++ DBG("PDMA unused completion - status 0x%X\n", dma_cs); ++ spin_unlock_irqrestore(&host->lock, flags); ++ return; ++ } ++ sg = data->sg; ++ sg_len = data->sg_len; ++ sg_todo = sg_dma_len(&sg[host_priv->sg_ix]); ++ ++ DBG("PDMA complete %d/%d [%d]/[%d]..\n", ++ host_priv->sg_done, sg_todo, ++ host_priv->sg_ix+1, sg_len); ++ ++ BUG_ON(host_priv->sg_done > sg_todo); ++ ++ if (host_priv->sg_done >= sg_todo) { ++ host_priv->sg_ix++; ++ host_priv->sg_done = 0; ++ } ++ ++ sg_ix = host_priv->sg_ix; ++ if (sg_ix < sg_len) { ++ u32 irq_mask; ++ /* Set off next DMA if we've got the capacity */ ++ ++ if (data->flags & MMC_DATA_READ) ++ irq_mask = SDHCI_INT_DATA_AVAIL; ++ else ++ irq_mask = SDHCI_INT_SPACE_AVAIL; ++ ++ /* We have to use the interrupt status register on the BCM2708 ++ rather than the SDHCI_PRESENT_STATE register because latency ++ in the glue logic means that the information retrieved from ++ the latter is not always up-to-date w.r.t the DMA engine - ++ it may not indicate that a read or a write is ready yet */ ++ if (sdhci_bcm2708_raw_readl(host, SDHCI_INT_STATUS) & ++ irq_mask) { ++ size_t bytes = sg_dma_len(&sg[sg_ix]) - ++ host_priv->sg_done; ++ dma_addr_t addr = sg_dma_address(&data->sg[sg_ix]) + ++ host_priv->sg_done; ++ ++ /* acknowledge interrupt */ ++ sdhci_bcm2708_raw_writel(host, irq_mask, ++ SDHCI_INT_STATUS); ++ ++ BUG_ON(0 == bytes); ++ ++ if (data->flags & MMC_DATA_READ) ++ sdhci_platdma_read(host, addr, bytes); ++ else ++ sdhci_platdma_write(host, addr, bytes); ++ } else { ++ DBG("PDMA - wait avail\n"); ++ /* may generate an IRQ if already present */ ++ sdhci_signal_irqs(host, SDHCI_INT_DATA_AVAIL | ++ SDHCI_INT_SPACE_AVAIL); ++ } ++ } else { ++#ifdef USE_SYNC_AFTER_DMA ++ /* On the Arasan controller the stop command (which will be ++ scheduled after this completes) does not seem to work ++ properly if we allow it to be issued when we are ++ transferring data to/from the SD card. ++ We get CRC and DEND errors unless we wait for ++ the SD controller to finish reading/writing to the card. */ ++ u32 state_mask; ++ int timeout=1000000; ++ hptime_t now = hptime(); ++ ++ DBG("PDMA over - sync card\n"); ++ if (data->flags & MMC_DATA_READ) ++ state_mask = SDHCI_DOING_READ; ++ else ++ state_mask = SDHCI_DOING_WRITE; ++ ++ while (0 != (sdhci_bcm2708_raw_readl(host, ++ SDHCI_PRESENT_STATE) & ++ state_mask) && --timeout > 0) ++ continue; ++ ++ if (1000000-timeout > 4000) /*ave. is about 3250*/ ++ DBG("%s: note - long %s sync %luns - " ++ "%d its.\n", ++ mmc_hostname(host->mmc), ++ data->flags & MMC_DATA_READ? "read": "write", ++ since_ns(now), 1000000-timeout); ++ if (timeout <= 0) ++ printk(KERN_ERR"%s: final %s to SD card still " ++ "running\n", ++ mmc_hostname(host->mmc), ++ data->flags & MMC_DATA_READ? "read": "write"); ++#endif ++ if (host_priv->complete) { ++ (*host_priv->complete)(host); ++ DBG("PDMA %s complete\n", ++ data->flags & MMC_DATA_READ?"read":"write"); ++ sdhci_signal_irqs(host, SDHCI_INT_DATA_AVAIL | ++ SDHCI_INT_SPACE_AVAIL); ++ } ++ } ++ spin_unlock_irqrestore(&host->lock, flags); ++} ++ ++static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) ++{ ++ irqreturn_t result = IRQ_NONE; ++ struct sdhci_host *host = dev_id; ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ u32 dma_cs; /* control and status register */ ++ unsigned long flags; ++ ++ BUG_ON(NULL == dev_id); ++ BUG_ON(NULL == host_priv->dma_chan_base); ++ ++ spin_lock_irqsave(&host->lock, flags); ++ ++ dma_cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); ++ ++ if (dma_cs & BCM2708_DMA_ERR) { ++ unsigned long debug; ++ debug = readl(host_priv->dma_chan_base + ++ BCM2708_DMA_DEBUG); ++ printk(KERN_ERR "%s: DMA error - CS %lX DEBUG %lX\n", ++ mmc_hostname(host->mmc), (unsigned long)dma_cs, ++ (unsigned long)debug); ++ /* reset error */ ++ writel(debug, host_priv->dma_chan_base + ++ BCM2708_DMA_DEBUG); ++ } ++ if (dma_cs & BCM2708_DMA_INT) { ++ /* acknowledge interrupt */ ++ writel(BCM2708_DMA_INT, ++ host_priv->dma_chan_base + BCM2708_DMA_CS); ++ ++ dsb(); /* ARM data synchronization (push) operation */ ++ ++ if (!host_priv->dma_wanted) { ++ /* ignore this interrupt - it was reset */ ++ printk(KERN_INFO "%s: DMA IRQ %X ignored - " ++ "results were reset\n", ++ mmc_hostname(host->mmc), dma_cs); ++#ifdef CHECK_DMA_USE ++ printk(KERN_INFO "%s: now %"FMT_HPT ++ " started %lu reset %lu stopped %lu\n", ++ mmc_hostname(host->mmc), hptime(), ++ since_ns(host_priv->when_started), ++ since_ns(host_priv->when_reset), ++ since_ns(host_priv->when_stopped)); ++ host_priv->dmas_pending--; ++#endif ++ } else ++ sdhci_bcm2708_dma_complete_irq(host, dma_cs); ++ ++ result = IRQ_HANDLED; ++ } ++ ++ spin_unlock_irqrestore(&host->lock, flags); ++ ++ return result; ++} ++#endif /* CONFIG_MMC_SDHCI_BCM2708_DMA */ ++ ++ ++/***************************************************************************** \ ++ * * ++ * Device Attributes * ++ * * ++\*****************************************************************************/ ++ ++ ++/** ++ * Show the DMA-using status ++ */ ++static ssize_t attr_dma_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct sdhci_host *host = (struct sdhci_host *)dev_get_drvdata(_dev); ++ ++ if (host) { ++ int use_dma = (host->flags & SDHCI_USE_PLATDMA? 1:0); ++ return sprintf(buf, "%d\n", use_dma); ++ } else ++ return -EINVAL; ++} ++ ++/** ++ * Set the DMA-using status ++ */ ++static ssize_t attr_dma_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct sdhci_host *host = (struct sdhci_host *)dev_get_drvdata(_dev); ++ ++ if (host) { ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ int on = simple_strtol(buf, NULL, 0); ++ if (on) { ++ host->flags |= SDHCI_USE_PLATDMA; ++ printk(KERN_INFO "%s: DMA enabled\n", ++ mmc_hostname(host->mmc)); ++ } else { ++ host->flags &= ~(SDHCI_USE_PLATDMA | SDHCI_REQ_USE_DMA); ++ printk(KERN_INFO "%s: DMA disabled\n", ++ mmc_hostname(host->mmc)); ++ } ++#endif ++ return count; ++ } else ++ return -EINVAL; ++} ++ ++static DEVICE_ATTR(use_dma, S_IRUGO | S_IWUGO, attr_dma_show, attr_dma_store); ++ ++ ++/** ++ * Show the DMA wait states used ++ */ ++static ssize_t attr_dmawait_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct sdhci_host *host = (struct sdhci_host *)dev_get_drvdata(_dev); ++ ++ if (host) { ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ int dmawait = host_priv->dma_waits; ++ return sprintf(buf, "%d\n", dmawait); ++ } else ++ return -EINVAL; ++} ++ ++/** ++ * Set the DMA wait state used ++ */ ++static ssize_t attr_dmawait_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ struct sdhci_host *host = (struct sdhci_host *)dev_get_drvdata(_dev); ++ ++ if (host) { ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ int dma_waits = simple_strtol(buf, NULL, 0); ++ if (dma_waits >= 0 && dma_waits < 32) ++ host_priv->dma_waits = dma_waits; ++ else ++ printk(KERN_ERR "%s: illegal dma_waits value - %d", ++ mmc_hostname(host->mmc), dma_waits); ++#endif ++ return count; ++ } else ++ return -EINVAL; ++} ++ ++static DEVICE_ATTR(dma_wait, S_IRUGO | S_IWUGO, ++ attr_dmawait_show, attr_dmawait_store); ++ ++ ++/** ++ * Show the DMA-using status ++ */ ++static ssize_t attr_status_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct sdhci_host *host = (struct sdhci_host *)dev_get_drvdata(_dev); ++ ++ if (host) { ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ return sprintf(buf, ++ "present: yes\n" ++ "power: %s\n" ++ "clock: %u Hz\n" ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ "dma: %s (%d waits)\n", ++#else ++ "dma: unconfigured\n", ++#endif ++ "always on", ++ host->clock ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ , (host->flags & SDHCI_USE_PLATDMA)? "on": "off" ++ , host_priv->dma_waits ++#endif ++ ); ++ } else ++ return -EINVAL; ++} ++ ++static DEVICE_ATTR(status, S_IRUGO, attr_status_show, NULL); ++ ++/***************************************************************************** \ ++ * * ++ * Power Management * ++ * * ++\*****************************************************************************/ ++ ++ ++#ifdef CONFIG_PM ++static int sdhci_bcm2708_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ struct sdhci_host *host = (struct sdhci_host *) ++ platform_get_drvdata(dev); ++ int ret = 0; ++ ++ if (host->mmc) { ++ ret = mmc_suspend_host(host->mmc); ++ } ++ ++ return ret; ++} ++ ++static int sdhci_bcm2708_resume(struct platform_device *dev) ++{ ++ struct sdhci_host *host = (struct sdhci_host *) ++ platform_get_drvdata(dev); ++ int ret = 0; ++ ++ if (host->mmc) { ++ ret = mmc_resume_host(host->mmc); ++ } ++ ++ return ret; ++} ++#endif ++ ++ ++/*****************************************************************************\ ++ * * ++ * Device quirk functions. Implemented as local ops because the flags * ++ * field is out of space with newer kernels. This implementation can be * ++ * back ported to older kernels as well. * ++\****************************************************************************/ ++static unsigned int sdhci_bcm2708_quirk_extra_ints(struct sdhci_host *host) ++{ ++ return 1; ++} ++ ++static unsigned int sdhci_bcm2708_quirk_spurious_crc(struct sdhci_host *host) ++{ ++ return 1; ++} ++ ++static unsigned int sdhci_bcm2708_quirk_voltage_broken(struct sdhci_host *host) ++{ ++ return 1; ++} ++ ++static unsigned int sdhci_bcm2708_uhs_broken(struct sdhci_host *host) ++{ ++ return 1; ++} ++ ++/***************************************************************************** \ ++ * * ++ * Device ops * ++ * * ++\*****************************************************************************/ ++ ++static struct sdhci_ops sdhci_bcm2708_ops = { ++#ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS ++ .read_l = sdhci_bcm2708_readl, ++ .read_w = sdhci_bcm2708_readw, ++ .read_b = sdhci_bcm2708_readb, ++ .write_l = sdhci_bcm2708_writel, ++ .write_w = sdhci_bcm2708_writew, ++ .write_b = sdhci_bcm2708_writeb, ++#else ++#error The BCM2708 SDHCI driver needs CONFIG_MMC_SDHCI_IO_ACCESSORS to be set ++#endif ++ //.enable_dma = NULL, ++ .set_clock = sdhci_bcm2708_set_clock, ++ .get_max_clock = sdhci_bcm2708_get_max_clock, ++ //.get_min_clock = NULL, ++ .get_timeout_clock = sdhci_bcm2708_get_timeout_clock, ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ // Platform DMA operations ++ .pdma_able = sdhci_bcm2708_platdma_dmaable, ++ .pdma_avail = sdhci_bcm2708_platdma_avail, ++ .pdma_reset = sdhci_bcm2708_platdma_reset, ++#endif ++ .extra_ints = sdhci_bcm2708_quirk_extra_ints, ++ .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc, ++ .voltage_broken = sdhci_bcm2708_quirk_voltage_broken, ++ .uhs_broken = sdhci_bcm2708_uhs_broken, ++}; ++ ++/*****************************************************************************\ ++ * * ++ * Device probing/removal * ++ * * ++\*****************************************************************************/ ++ ++static int sdhci_bcm2708_probe(struct platform_device *pdev) ++{ ++ struct sdhci_host *host; ++ struct resource *iomem; ++ struct sdhci_bcm2708_priv *host_priv; ++ int ret; ++ ++ BUG_ON(pdev == NULL); ++ ++ iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!iomem) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ if (resource_size(iomem) != 0x100) ++ dev_err(&pdev->dev, "Invalid iomem size. You may " ++ "experience problems.\n"); ++ ++ if (pdev->dev.parent) ++ host = sdhci_alloc_host(pdev->dev.parent, ++ sizeof(struct sdhci_bcm2708_priv)); ++ else ++ host = sdhci_alloc_host(&pdev->dev, ++ sizeof(struct sdhci_bcm2708_priv)); ++ ++ if (IS_ERR(host)) { ++ ret = PTR_ERR(host); ++ goto err; ++ } ++ ++ host->hw_name = "BCM2708_Arasan"; ++ host->ops = &sdhci_bcm2708_ops; ++ host->irq = platform_get_irq(pdev, 0); ++ ++ host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | ++ SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | ++ SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | ++ SDHCI_QUIRK_NONSTANDARD_CLOCK; ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ host->flags = SDHCI_USE_PLATDMA; ++#endif ++ ++ if (!request_mem_region(iomem->start, resource_size(iomem), ++ mmc_hostname(host->mmc))) { ++ dev_err(&pdev->dev, "cannot request region\n"); ++ ret = -EBUSY; ++ goto err_request; ++ } ++ ++ host->ioaddr = ioremap(iomem->start, resource_size(iomem)); ++ if (!host->ioaddr) { ++ dev_err(&pdev->dev, "failed to remap registers\n"); ++ ret = -ENOMEM; ++ goto err_remap; ++ } ++ ++ host_priv = SDHCI_HOST_PRIV(host); ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ host_priv->dma_wanted = 0; ++#ifdef CHECK_DMA_USE ++ host_priv->dmas_pending = 0; ++ host_priv->when_started = 0; ++ host_priv->when_reset = 0; ++ host_priv->when_stopped = 0; ++#endif ++ host_priv->sg_ix = 0; ++ host_priv->sg_done = 0; ++ host_priv->complete = NULL; ++ host_priv->dma_waits = SDHCI_BCM_DMA_WAITS; ++ ++ host_priv->cb_base = dma_alloc_writecombine(&pdev->dev, SZ_4K, ++ &host_priv->cb_handle, ++ GFP_KERNEL); ++ if (!host_priv->cb_base) { ++ dev_err(&pdev->dev, "cannot allocate DMA CBs\n"); ++ ret = -ENOMEM; ++ goto err_alloc_cb; ++ } ++ ++ ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_FAST, ++ &host_priv->dma_chan_base, ++ &host_priv->dma_irq); ++ if (ret < 0) { ++ dev_err(&pdev->dev, "couldn't allocate a DMA channel\n"); ++ goto err_add_dma; ++ } ++ host_priv->dma_chan = ret; ++ ++ ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq, ++ IRQF_SHARED, DRIVER_NAME " (dma)", host); ++ if (ret) { ++ dev_err(&pdev->dev, "cannot set DMA IRQ\n"); ++ goto err_add_dma_irq; ++ } ++ DBG("DMA CBs %p handle %08X DMA%d %p DMA IRQ %d\n", ++ host_priv->cb_base, (unsigned)host_priv->cb_handle, ++ host_priv->dma_chan, host_priv->dma_chan_base, ++ host_priv->dma_irq); ++ ++ host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; ++#endif ++ ++ ret = sdhci_add_host(host); ++ if (ret) ++ goto err_add_host; ++ ++ platform_set_drvdata(pdev, host); ++ ret = device_create_file(&pdev->dev, &dev_attr_use_dma); ++ ret = device_create_file(&pdev->dev, &dev_attr_dma_wait); ++ ret = device_create_file(&pdev->dev, &dev_attr_status); ++ ++ printk(KERN_INFO "%s: BCM2708 SDHC host at 0x%08llx DMA %d IRQ %d\n", ++ mmc_hostname(host->mmc), (unsigned long long)iomem->start, ++ host_priv->dma_chan, host_priv->dma_irq); ++ ++ return 0; ++ ++err_add_host: ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ free_irq(host_priv->dma_irq, host); ++err_add_dma_irq: ++ bcm_dma_chan_free(host_priv->dma_chan); ++err_add_dma: ++ dma_free_writecombine(&pdev->dev, SZ_4K, host_priv->cb_base, ++ host_priv->cb_handle); ++err_alloc_cb: ++#endif ++ iounmap(host->ioaddr); ++err_remap: ++ release_mem_region(iomem->start, resource_size(iomem)); ++err_request: ++ sdhci_free_host(host); ++err: ++ dev_err(&pdev->dev, "probe failed, err %d\n", ret); ++ return ret; ++} ++ ++static int sdhci_bcm2708_remove(struct platform_device *pdev) ++{ ++ struct sdhci_host *host = platform_get_drvdata(pdev); ++ struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); ++ int dead; ++ u32 scratch; ++ ++ dead = 0; ++ scratch = sdhci_bcm2708_readl(host, SDHCI_INT_STATUS); ++ if (scratch == (u32)-1) ++ dead = 1; ++ ++ device_remove_file(&pdev->dev, &dev_attr_status); ++ device_remove_file(&pdev->dev, &dev_attr_dma_wait); ++ device_remove_file(&pdev->dev, &dev_attr_use_dma); ++ ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ free_irq(host_priv->dma_irq, host); ++ dma_free_writecombine(&pdev->dev, SZ_4K, host_priv->cb_base, ++ host_priv->cb_handle); ++#endif ++ sdhci_remove_host(host, dead); ++ iounmap(host->ioaddr); ++ release_mem_region(iomem->start, resource_size(iomem)); ++ sdhci_free_host(host); ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++static struct platform_driver sdhci_bcm2708_driver = { ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = sdhci_bcm2708_probe, ++ .remove = sdhci_bcm2708_remove, ++ ++#ifdef CONFIG_PM ++ .suspend = sdhci_bcm2708_suspend, ++ .resume = sdhci_bcm2708_resume, ++#endif ++ ++}; ++ ++/*****************************************************************************\ ++ * * ++ * Driver init/exit * ++ * * ++\*****************************************************************************/ ++ ++static int __init sdhci_drv_init(void) ++{ ++ return platform_driver_register(&sdhci_bcm2708_driver); ++} ++ ++static void __exit sdhci_drv_exit(void) ++{ ++ platform_driver_unregister(&sdhci_bcm2708_driver); ++} ++ ++module_init(sdhci_drv_init); ++module_exit(sdhci_drv_exit); ++ ++MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); ++MODULE_AUTHOR("Broadcom "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:"DRIVER_NAME); ++ +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci.c 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci.c 2014-04-28 00:42:00.000000000 +0000 +@@ -28,6 +28,7 @@ + #include + #include + #include ++#include + #include + + #include "sdhci.h" +@@ -315,7 +316,7 @@ + u32 uninitialized_var(scratch); + u8 *buf; + +- DBG("PIO reading\n"); ++ DBG("PIO reading %db\n", host->data->blksz); + + blksize = host->data->blksz; + chunk = 0; +@@ -360,7 +361,7 @@ + u32 scratch; + u8 *buf; + +- DBG("PIO writing\n"); ++ DBG("PIO writing %db\n", host->data->blksz); + + blksize = host->data->blksz; + chunk = 0; +@@ -399,19 +400,28 @@ + local_irq_restore(flags); + } + +-static void sdhci_transfer_pio(struct sdhci_host *host) ++static void sdhci_transfer_pio(struct sdhci_host *host, u32 intstate) + { + u32 mask; ++ u32 state = 0; ++ u32 intmask; ++ int available; + + BUG_ON(!host->data); + + if (host->blocks == 0) + return; + +- if (host->data->flags & MMC_DATA_READ) ++ if (host->data->flags & MMC_DATA_READ) { + mask = SDHCI_DATA_AVAILABLE; +- else ++ intmask = SDHCI_INT_DATA_AVAIL; ++ } else { + mask = SDHCI_SPACE_AVAILABLE; ++ intmask = SDHCI_INT_SPACE_AVAIL; ++ } ++ ++ /* initially we can see whether we can procede using intstate */ ++ available = (intstate & intmask); + + /* + * Some controllers (JMicron JMB38x) mess up the buffer bits +@@ -422,7 +432,7 @@ + (host->data->blocks == 1)) + mask = ~0; + +- while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { ++ while (available) { + if (host->quirks & SDHCI_QUIRK_PIO_NEEDS_DELAY) + udelay(100); + +@@ -434,9 +444,11 @@ + host->blocks--; + if (host->blocks == 0) + break; ++ state = sdhci_readl(host, SDHCI_PRESENT_STATE); ++ available = state & mask; + } + +- DBG("PIO transfer complete.\n"); ++ DBG("PIO transfer complete - %d blocks left.\n", host->blocks); + } + + static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags) +@@ -709,7 +721,9 @@ + u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL; + u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR; + +- if (host->flags & SDHCI_REQ_USE_DMA) ++ /* platform DMA will begin on receipt of PIO irqs */ ++ if ((host->flags & SDHCI_REQ_USE_DMA) && ++ !(host->flags & SDHCI_USE_PLATDMA)) + sdhci_clear_set_irqs(host, pio_irqs, dma_irqs); + else + sdhci_clear_set_irqs(host, dma_irqs, pio_irqs); +@@ -741,44 +755,25 @@ + host->data_early = 0; + host->data->bytes_xfered = 0; + +- if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) ++ if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA | SDHCI_USE_PLATDMA)) + host->flags |= SDHCI_REQ_USE_DMA; + + /* + * FIXME: This doesn't account for merging when mapping the + * scatterlist. + */ +- if (host->flags & SDHCI_REQ_USE_DMA) { +- int broken, i; +- struct scatterlist *sg; +- +- broken = 0; +- if (host->flags & SDHCI_USE_ADMA) { +- if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE) +- broken = 1; +- } else { +- if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE) +- broken = 1; +- } +- +- if (unlikely(broken)) { +- for_each_sg(data->sg, sg, data->sg_len, i) { +- if (sg->length & 0x3) { +- DBG("Reverting to PIO because of " +- "transfer size (%d)\n", +- sg->length); +- host->flags &= ~SDHCI_REQ_USE_DMA; +- break; +- } +- } +- } +- } + + /* + * The assumption here being that alignment is the same after + * translation to device address space. + */ +- if (host->flags & SDHCI_REQ_USE_DMA) { ++ if ((host->flags & (SDHCI_REQ_USE_DMA | SDHCI_USE_PLATDMA)) == ++ (SDHCI_REQ_USE_DMA | SDHCI_USE_PLATDMA)) { ++ ++ if (! sdhci_platdma_dmaable(host, data)) ++ host->flags &= ~SDHCI_REQ_USE_DMA; ++ ++ } else if (host->flags & SDHCI_REQ_USE_DMA) { + int broken, i; + struct scatterlist *sg; + +@@ -837,7 +832,8 @@ + */ + WARN_ON(1); + host->flags &= ~SDHCI_REQ_USE_DMA; +- } else { ++ } else ++ if (!(host->flags & SDHCI_USE_PLATDMA)) { + WARN_ON(sg_cnt != 1); + sdhci_writel(host, sg_dma_address(data->sg), + SDHCI_DMA_ADDRESS); +@@ -853,11 +849,13 @@ + if (host->version >= SDHCI_SPEC_200) { + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL); + ctrl &= ~SDHCI_CTRL_DMA_MASK; ++ if (! (host->flags & SDHCI_USE_PLATDMA)) { + if ((host->flags & SDHCI_REQ_USE_DMA) && + (host->flags & SDHCI_USE_ADMA)) + ctrl |= SDHCI_CTRL_ADMA32; + else + ctrl |= SDHCI_CTRL_SDMA; ++ } + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL); + } + +@@ -909,7 +907,8 @@ + + if (data->flags & MMC_DATA_READ) + mode |= SDHCI_TRNS_READ; +- if (host->flags & SDHCI_REQ_USE_DMA) ++ if ((host->flags & SDHCI_REQ_USE_DMA) && ++ !(host->flags & SDHCI_USE_PLATDMA)) + mode |= SDHCI_TRNS_DMA; + + sdhci_writew(host, mode, SDHCI_TRANSFER_MODE); +@@ -925,13 +924,16 @@ + host->data = NULL; + + if (host->flags & SDHCI_REQ_USE_DMA) { +- if (host->flags & SDHCI_USE_ADMA) +- sdhci_adma_table_post(host, data); +- else { ++ /* we may have to abandon an ongoing platform DMA */ ++ if (host->flags & SDHCI_USE_PLATDMA) ++ sdhci_platdma_reset(host, data); ++ ++ if (host->flags & (SDHCI_USE_PLATDMA | SDHCI_USE_SDMA)) { + dma_unmap_sg(mmc_dev(host->mmc), data->sg, + data->sg_len, (data->flags & MMC_DATA_READ) ? + DMA_FROM_DEVICE : DMA_TO_DEVICE); +- } ++ } else if (host->flags & SDHCI_USE_ADMA) ++ sdhci_adma_table_post(host, data); + } + + /* +@@ -984,6 +986,12 @@ + if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY)) + mask |= SDHCI_DATA_INHIBIT; + ++ if(host->ops->missing_status && (cmd->opcode == MMC_SEND_STATUS)) { ++ timeout = 5000; // Really obscenely large delay to send the status, due to bug in controller ++ // which might cause the STATUS command to get stuck when a data operation is in flow ++ mask |= SDHCI_DATA_INHIBIT; ++ } ++ + /* We shouldn't wait for data inihibit for stop commands, even + though they might use busy signaling */ + if (host->mrq->data && (cmd == host->mrq->data->stop)) +@@ -1001,10 +1009,16 @@ + timeout--; + mdelay(1); + } ++ DBG("send cmd %d - wait 0x%X irq 0x%x\n", cmd->opcode, mask, ++ sdhci_readl(host, SDHCI_INT_STATUS)); + + mod_timer(&host->timer, jiffies + 10 * HZ); + + host->cmd = cmd; ++ if (host->last_cmdop == MMC_APP_CMD) ++ host->last_cmdop = -cmd->opcode; ++ else ++ host->last_cmdop = cmd->opcode; + + sdhci_prepare_data(host, cmd); + +@@ -1470,7 +1484,7 @@ + else + ctrl &= ~SDHCI_CTRL_HISPD; + +- if (host->version >= SDHCI_SPEC_300) { ++ if (host->version >= SDHCI_SPEC_300 && !(host->ops->uhs_broken)) { + u16 clk, ctrl_2; + + /* In case of UHS-I modes, set High Speed Enable */ +@@ -2164,7 +2178,7 @@ + + if (host->mrq) { + pr_err("%s: Timeout waiting for hardware " +- "interrupt.\n", mmc_hostname(host->mmc)); ++ "interrupt - cmd%d.\n", mmc_hostname(host->mmc), host->last_cmdop); + sdhci_dumpregs(host); + + if (host->data) { +@@ -2209,10 +2223,13 @@ + BUG_ON(intmask == 0); + + if (!host->cmd) { ++ if (!(host->ops->extra_ints)) { + pr_err("%s: Got command interrupt 0x%08x even " + "though no command operation was in progress.\n", + mmc_hostname(host->mmc), (unsigned)intmask); + sdhci_dumpregs(host); ++ } else ++ DBG("cmd irq 0x%08x cmd complete\n", (unsigned)intmask); + return; + } + +@@ -2282,6 +2299,19 @@ + static void sdhci_show_adma_error(struct sdhci_host *host) { } + #endif + ++static void sdhci_data_end(struct sdhci_host *host) ++{ ++ if (host->cmd) { ++ /* ++ * Data managed to finish before the ++ * command completed. Make sure we do ++ * things in the proper order. ++ */ ++ host->data_early = 1; ++ } else ++ sdhci_finish_data(host); ++} ++ + static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) + { + u32 command; +@@ -2311,23 +2341,39 @@ + } + } + ++ if (!(host->ops->extra_ints)) { + pr_err("%s: Got data interrupt 0x%08x even " + "though no data operation was in progress.\n", + mmc_hostname(host->mmc), (unsigned)intmask); + sdhci_dumpregs(host); ++ } else ++ DBG("data irq 0x%08x but no data\n", (unsigned)intmask); + + return; + } + + if (intmask & SDHCI_INT_DATA_TIMEOUT) + host->data->error = -ETIMEDOUT; +- else if (intmask & SDHCI_INT_DATA_END_BIT) ++ else if (intmask & SDHCI_INT_DATA_END_BIT) { ++ DBG("end error in cmd %d\n", host->last_cmdop); ++ if (host->ops->spurious_crc_acmd51 && ++ host->last_cmdop == -SD_APP_SEND_SCR) { ++ DBG("ignoring spurious data_end_bit error\n"); ++ intmask = SDHCI_INT_DATA_AVAIL|SDHCI_INT_DATA_END; ++ } else + host->data->error = -EILSEQ; +- else if ((intmask & SDHCI_INT_DATA_CRC) && ++ } else if ((intmask & SDHCI_INT_DATA_CRC) && + SDHCI_GET_CMD(sdhci_readw(host, SDHCI_COMMAND)) +- != MMC_BUS_TEST_R) ++ != MMC_BUS_TEST_R) { ++ DBG("crc error in cmd %d\n", host->last_cmdop); ++ if (host->ops->spurious_crc_acmd51 && ++ host->last_cmdop == -SD_APP_SEND_SCR) { ++ DBG("ignoring spurious data_crc_bit error\n"); ++ intmask = SDHCI_INT_DATA_AVAIL|SDHCI_INT_DATA_END; ++ } else { + host->data->error = -EILSEQ; +- else if (intmask & SDHCI_INT_ADMA_ERROR) { ++ } ++ } else if (intmask & SDHCI_INT_ADMA_ERROR) { + pr_err("%s: ADMA error\n", mmc_hostname(host->mmc)); + sdhci_show_adma_error(host); + host->data->error = -EIO; +@@ -2335,11 +2381,18 @@ + host->ops->adma_workaround(host, intmask); + } + +- if (host->data->error) ++ if (host->data->error) { ++ DBG("finish request early on error %d\n", host->data->error); + sdhci_finish_data(host); +- else { +- if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) +- sdhci_transfer_pio(host); ++ } else { ++ if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL)) { ++ if (host->flags & SDHCI_REQ_USE_DMA) { ++ /* possible only in PLATDMA mode */ ++ sdhci_platdma_avail(host, &intmask, ++ &sdhci_data_end); ++ } else ++ sdhci_transfer_pio(host, intmask); ++ } + + /* + * We currently don't do anything fancy with DMA +@@ -2368,18 +2421,8 @@ + sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); + } + +- if (intmask & SDHCI_INT_DATA_END) { +- if (host->cmd) { +- /* +- * Data managed to finish before the +- * command completed. Make sure we do +- * things in the proper order. +- */ +- host->data_early = 1; +- } else { +- sdhci_finish_data(host); +- } +- } ++ if (intmask & SDHCI_INT_DATA_END) ++ sdhci_data_end(host); + } + } + +@@ -2435,6 +2478,22 @@ + tasklet_schedule(&host->card_tasklet); + } + ++ if (intmask & SDHCI_INT_ERROR_MASK & ~SDHCI_INT_ERROR) ++ DBG("controller reports error 0x%x -" ++ "%s%s%s%s%s%s%s%s%s%s", ++ intmask, ++ intmask & SDHCI_INT_TIMEOUT? " timeout": "", ++ intmask & SDHCI_INT_CRC ? " crc": "", ++ intmask & SDHCI_INT_END_BIT? " endbit": "", ++ intmask & SDHCI_INT_INDEX? " index": "", ++ intmask & SDHCI_INT_DATA_TIMEOUT? " data_timeout": "", ++ intmask & SDHCI_INT_DATA_CRC? " data_crc": "", ++ intmask & SDHCI_INT_DATA_END_BIT? " data_endbit": "", ++ intmask & SDHCI_INT_BUS_POWER? " buspower": "", ++ intmask & SDHCI_INT_ACMD12ERR? " acmd12": "", ++ intmask & SDHCI_INT_ADMA_ERROR? " adma": "" ++ ); ++ + if (intmask & SDHCI_INT_CMD_MASK) { + sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK, + SDHCI_INT_STATUS); +@@ -2449,7 +2508,13 @@ + + intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK); + +- intmask &= ~SDHCI_INT_ERROR; ++ if (intmask & SDHCI_INT_ERROR_MASK) { ++ /* collect any uncovered errors */ ++ sdhci_writel(host, intmask & SDHCI_INT_ERROR_MASK, ++ SDHCI_INT_STATUS); ++ } ++ ++ intmask &= ~SDHCI_INT_ERROR_MASK; + + if (intmask & SDHCI_INT_BUS_POWER) { + pr_err("%s: Card is consuming too much power!\n", +@@ -2569,7 +2634,8 @@ + { + int ret; + +- if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { ++ if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA | ++ SDHCI_USE_PLATDMA)) { + if (host->ops->enable_dma) + host->ops->enable_dma(host); + } +@@ -2785,14 +2851,16 @@ + host->flags &= ~SDHCI_USE_ADMA; + } + +- if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA)) { ++ if (host->flags & (SDHCI_USE_SDMA | SDHCI_USE_ADMA | ++ SDHCI_USE_PLATDMA)) { + if (host->ops->enable_dma) { + if (host->ops->enable_dma(host)) { + pr_warning("%s: No suitable DMA " + "available. Falling back to PIO.\n", + mmc_hostname(mmc)); + host->flags &= +- ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA); ++ ~(SDHCI_USE_SDMA | SDHCI_USE_ADMA | ++ SDHCI_USE_PLATDMA); + } + } + } +@@ -3080,6 +3148,12 @@ + SDHCI_MAX_CURRENT_MULTIPLIER; + } + ++ if(host->ops->voltage_broken) { ++ ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; ++ // Cannot support UHS modes if we are stuck at 3.3V; ++ mmc->caps &= ~(MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50); ++ } ++ + mmc->ocr_avail = ocr_avail; + mmc->ocr_avail_sdio = ocr_avail; + if (host->ocr_avail_sdio) +@@ -3210,6 +3284,7 @@ + + pr_info("%s: SDHCI controller on %s [%s] using %s\n", + mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)), ++ (host->flags & SDHCI_USE_PLATDMA) ? "platform's DMA" : + (host->flags & SDHCI_USE_ADMA) ? "ADMA" : + (host->flags & SDHCI_USE_SDMA) ? "DMA" : "PIO"); + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci.h 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci.h 2014-04-28 00:42:00.000000000 +0000 +@@ -289,6 +289,20 @@ + void (*platform_reset_enter)(struct sdhci_host *host, u8 mask); + void (*platform_reset_exit)(struct sdhci_host *host, u8 mask); + int (*set_uhs_signaling)(struct sdhci_host *host, unsigned int uhs); ++ ++ int (*pdma_able)(struct sdhci_host *host, ++ struct mmc_data *data); ++ void (*pdma_avail)(struct sdhci_host *host, ++ unsigned int *ref_intmask, ++ void(*complete)(struct sdhci_host *)); ++ void (*pdma_reset)(struct sdhci_host *host, ++ struct mmc_data *data); ++ unsigned int (*extra_ints)(struct sdhci_host *host); ++ unsigned int (*spurious_crc_acmd51)(struct sdhci_host *host); ++ unsigned int (*voltage_broken)(struct sdhci_host *host); ++ unsigned int (*uhs_broken)(struct sdhci_host *host); ++ unsigned int (*missing_status)(struct sdhci_host *host); ++ + void (*hw_reset)(struct sdhci_host *host); + void (*platform_suspend)(struct sdhci_host *host); + void (*platform_resume)(struct sdhci_host *host); +@@ -399,6 +413,29 @@ + extern void sdhci_enable_irq_wakeups(struct sdhci_host *host); + #endif + ++static inline int /*bool*/ ++sdhci_platdma_dmaable(struct sdhci_host *host, struct mmc_data *data) ++{ ++ if (host->ops->pdma_able) ++ return host->ops->pdma_able(host, data); ++ else ++ return 1; ++} ++static inline void ++sdhci_platdma_avail(struct sdhci_host *host, unsigned int *ref_intmask, ++ void(*completion_callback)(struct sdhci_host *)) ++{ ++ if (host->ops->pdma_avail) ++ host->ops->pdma_avail(host, ref_intmask, completion_callback); ++} ++ ++static inline void ++sdhci_platdma_reset(struct sdhci_host *host, struct mmc_data *data) ++{ ++ if (host->ops->pdma_reset) ++ host->ops->pdma_reset(host, data); ++} ++ + #ifdef CONFIG_PM_RUNTIME + extern int sdhci_runtime_suspend_host(struct sdhci_host *host); + extern int sdhci_runtime_resume_host(struct sdhci_host *host); +Index: linux-3.10-3.10.11/include/linux/mmc/sdhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/mmc/sdhci.h 2014-04-27 23:37:23.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/mmc/sdhci.h 2014-04-28 00:42:00.000000000 +0000 +@@ -128,6 +128,7 @@ + #define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */ + #define SDHCI_HS200_NEEDS_TUNING (1<<10) /* HS200 needs tuning */ + #define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */ ++#define SDHCI_USE_PLATDMA (1<<12) /* Host uses 3rd party DMA */ + + unsigned int version; /* SDHCI spec. version */ + +@@ -142,6 +143,7 @@ + + struct mmc_request *mrq; /* Current request */ + struct mmc_command *cmd; /* Current command */ ++ int last_cmdop; /* Opcode of last cmd sent */ + struct mmc_data *data; /* Current data request */ + unsigned int data_early:1; /* Data finished before cmd */ + +Index: linux-3.10-3.10.11/dummy/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1571_464ff6a40a8e684ebc730b5ede44c646b1d4e6c9.txt 2014-04-28 00:42:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.patch --- linux-3.10.11/debian/patches/rpi/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.patch 2014-04-28 00:42:11.000000000 +0000 @@ -0,0 +1,56902 @@ +commit a0b25b587dfcc4c6816b655fa452eb4b03d55e33 +Author: popcornmix +Date: Wed May 1 19:46:17 2013 +0100 + + Add dwc_otg driver + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/usb/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/Makefile 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/Makefile 2014-04-28 00:42:05.000000000 +0000 +@@ -23,6 +23,7 @@ + obj-$(CONFIG_USB_R8A66597_HCD) += host/ + obj-$(CONFIG_USB_HWA_HCD) += host/ + obj-$(CONFIG_USB_ISP1760_HCD) += host/ ++obj-$(CONFIG_USB_DWCOTG) += host/ + obj-$(CONFIG_USB_IMX21_HCD) += host/ + obj-$(CONFIG_USB_FSL_MPH_DR_OF) += host/ + +Index: linux-3.10-3.10.11/drivers/usb/core/generic.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/generic.c 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/generic.c 2014-04-28 00:42:05.000000000 +0000 +@@ -152,6 +152,7 @@ + dev_warn(&udev->dev, + "no configuration chosen from %d choice%s\n", + num_configs, plural(num_configs)); ++ dev_warn(&udev->dev, "No support over %dmA\n", udev->bus_mA); + } + return i; + } +Index: linux-3.10-3.10.11/drivers/usb/core/message.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/message.c 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/message.c 2014-04-28 00:42:05.000000000 +0000 +@@ -1875,6 +1875,85 @@ + if (cp->string == NULL && + !(dev->quirks & USB_QUIRK_CONFIG_INTF_STRINGS)) + cp->string = usb_cache_string(dev, cp->desc.iConfiguration); ++/* Uncomment this define to enable the HS Electrical Test support */ ++#define DWC_HS_ELECT_TST 1 ++#ifdef DWC_HS_ELECT_TST ++ /* Here we implement the HS Electrical Test support. The ++ * tester uses a vendor ID of 0x1A0A to indicate we should ++ * run a special test sequence. The product ID tells us ++ * which sequence to run. We invoke the test sequence by ++ * sending a non-standard SetFeature command to our root ++ * hub port. Our dwc_otg_hcd_hub_control() routine will ++ * recognize the command and perform the desired test ++ * sequence. ++ */ ++ if (dev->descriptor.idVendor == 0x1A0A) { ++ /* HSOTG Electrical Test */ ++ dev_warn(&dev->dev, "VID from HSOTG Electrical Test Fixture\n"); ++ ++ if (dev->bus && dev->bus->root_hub) { ++ struct usb_device *hdev = dev->bus->root_hub; ++ dev_warn(&dev->dev, "Got PID 0x%x\n", dev->descriptor.idProduct); ++ ++ switch (dev->descriptor.idProduct) { ++ case 0x0101: /* TEST_SE0_NAK */ ++ dev_warn(&dev->dev, "TEST_SE0_NAK\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x300, NULL, 0, HZ); ++ break; ++ ++ case 0x0102: /* TEST_J */ ++ dev_warn(&dev->dev, "TEST_J\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x100, NULL, 0, HZ); ++ break; ++ ++ case 0x0103: /* TEST_K */ ++ dev_warn(&dev->dev, "TEST_K\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x200, NULL, 0, HZ); ++ break; ++ ++ case 0x0104: /* TEST_PACKET */ ++ dev_warn(&dev->dev, "TEST_PACKET\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x400, NULL, 0, HZ); ++ break; ++ ++ case 0x0105: /* TEST_FORCE_ENABLE */ ++ dev_warn(&dev->dev, "TEST_FORCE_ENABLE\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x500, NULL, 0, HZ); ++ break; ++ ++ case 0x0106: /* HS_HOST_PORT_SUSPEND_RESUME */ ++ dev_warn(&dev->dev, "HS_HOST_PORT_SUSPEND_RESUME\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x600, NULL, 0, 40 * HZ); ++ break; ++ ++ case 0x0107: /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */ ++ dev_warn(&dev->dev, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x700, NULL, 0, 40 * HZ); ++ break; ++ ++ case 0x0108: /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */ ++ dev_warn(&dev->dev, "SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute\n"); ++ usb_control_msg(hdev, usb_sndctrlpipe(hdev, 0), ++ USB_REQ_SET_FEATURE, USB_RT_PORT, ++ USB_PORT_FEAT_TEST, 0x800, NULL, 0, 40 * HZ); ++ } ++ } ++ } ++#endif /* DWC_HS_ELECT_TST */ + + /* Now that the interfaces are installed, re-enable LPM. */ + usb_unlocked_enable_lpm(dev); +Index: linux-3.10-3.10.11/drivers/usb/core/otg_whitelist.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/core/otg_whitelist.h 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/core/otg_whitelist.h 2014-04-28 00:42:05.000000000 +0000 +@@ -19,33 +19,82 @@ + static struct usb_device_id whitelist_table [] = { + + /* hubs are optional in OTG, but very handy ... */ ++#define CERT_WITHOUT_HUBS ++#if defined(CERT_WITHOUT_HUBS) ++{ USB_DEVICE( 0x0000, 0x0000 ), }, /* Root HUB Only*/ ++#else + { USB_DEVICE_INFO(USB_CLASS_HUB, 0, 0), }, + { USB_DEVICE_INFO(USB_CLASS_HUB, 0, 1), }, ++{ USB_DEVICE_INFO(USB_CLASS_HUB, 0, 2), }, ++#endif + + #ifdef CONFIG_USB_PRINTER /* ignoring nonstatic linkage! */ + /* FIXME actually, printers are NOT supposed to use device classes; + * they're supposed to use interface classes... + */ +-{ USB_DEVICE_INFO(7, 1, 1) }, +-{ USB_DEVICE_INFO(7, 1, 2) }, +-{ USB_DEVICE_INFO(7, 1, 3) }, ++//{ USB_DEVICE_INFO(7, 1, 1) }, ++//{ USB_DEVICE_INFO(7, 1, 2) }, ++//{ USB_DEVICE_INFO(7, 1, 3) }, + #endif + + #ifdef CONFIG_USB_NET_CDCETHER + /* Linux-USB CDC Ethernet gadget */ +-{ USB_DEVICE(0x0525, 0xa4a1), }, ++//{ USB_DEVICE(0x0525, 0xa4a1), }, + /* Linux-USB CDC Ethernet + RNDIS gadget */ +-{ USB_DEVICE(0x0525, 0xa4a2), }, ++//{ USB_DEVICE(0x0525, 0xa4a2), }, + #endif + + #if defined(CONFIG_USB_TEST) || defined(CONFIG_USB_TEST_MODULE) + /* gadget zero, for testing */ +-{ USB_DEVICE(0x0525, 0xa4a0), }, ++//{ USB_DEVICE(0x0525, 0xa4a0), }, + #endif ++ ++/* OPT Tester */ ++{ USB_DEVICE( 0x1a0a, 0x0101 ), }, /* TEST_SE0_NAK */ ++{ USB_DEVICE( 0x1a0a, 0x0102 ), }, /* Test_J */ ++{ USB_DEVICE( 0x1a0a, 0x0103 ), }, /* Test_K */ ++{ USB_DEVICE( 0x1a0a, 0x0104 ), }, /* Test_PACKET */ ++{ USB_DEVICE( 0x1a0a, 0x0105 ), }, /* Test_FORCE_ENABLE */ ++{ USB_DEVICE( 0x1a0a, 0x0106 ), }, /* HS_PORT_SUSPEND_RESUME */ ++{ USB_DEVICE( 0x1a0a, 0x0107 ), }, /* SINGLE_STEP_GET_DESCRIPTOR setup */ ++{ USB_DEVICE( 0x1a0a, 0x0108 ), }, /* SINGLE_STEP_GET_DESCRIPTOR execute */ ++ ++/* Sony cameras */ ++{ USB_DEVICE_VER(0x054c,0x0010,0x0410, 0x0500), }, ++ ++/* Memory Devices */ ++//{ USB_DEVICE( 0x0781, 0x5150 ), }, /* SanDisk */ ++//{ USB_DEVICE( 0x05DC, 0x0080 ), }, /* Lexar */ ++//{ USB_DEVICE( 0x4146, 0x9281 ), }, /* IOMEGA */ ++//{ USB_DEVICE( 0x067b, 0x2507 ), }, /* Hammer 20GB External HD */ ++{ USB_DEVICE( 0x0EA0, 0x2168 ), }, /* Ours Technology Inc. (BUFFALO ClipDrive)*/ ++//{ USB_DEVICE( 0x0457, 0x0150 ), }, /* Silicon Integrated Systems Corp. */ ++ ++/* HP Printers */ ++//{ USB_DEVICE( 0x03F0, 0x1102 ), }, /* HP Photosmart 245 */ ++//{ USB_DEVICE( 0x03F0, 0x1302 ), }, /* HP Photosmart 370 Series */ ++ ++/* Speakers */ ++//{ USB_DEVICE( 0x0499, 0x3002 ), }, /* YAMAHA YST-MS35D USB Speakers */ ++//{ USB_DEVICE( 0x0672, 0x1041 ), }, /* Labtec USB Headset */ + + { } /* Terminating entry */ + }; + ++static inline void report_errors(struct usb_device *dev) ++{ ++ /* OTG MESSAGE: report errors here, customize to match your product */ ++ dev_info(&dev->dev, "device Vendor:%04x Product:%04x is not supported\n", ++ le16_to_cpu(dev->descriptor.idVendor), ++ le16_to_cpu(dev->descriptor.idProduct)); ++ if (USB_CLASS_HUB == dev->descriptor.bDeviceClass){ ++ dev_printk(KERN_CRIT, &dev->dev, "Unsupported Hub Topology\n"); ++ } else { ++ dev_printk(KERN_CRIT, &dev->dev, "Attached Device is not Supported\n"); ++ } ++} ++ ++ + static int is_targeted(struct usb_device *dev) + { + struct usb_device_id *id = whitelist_table; +@@ -55,58 +104,83 @@ + return 1; + + /* HNP test device is _never_ targeted (see OTG spec 6.6.6) */ +- if ((le16_to_cpu(dev->descriptor.idVendor) == 0x1a0a && +- le16_to_cpu(dev->descriptor.idProduct) == 0xbadd)) +- return 0; ++ if (dev->descriptor.idVendor == 0x1a0a && ++ dev->descriptor.idProduct == 0xbadd) { ++ return 0; ++ } else if (!enable_whitelist) { ++ return 1; ++ } else { + +- /* NOTE: can't use usb_match_id() since interface caches +- * aren't set up yet. this is cut/paste from that code. +- */ +- for (id = whitelist_table; id->match_flags; id++) { +- if ((id->match_flags & USB_DEVICE_ID_MATCH_VENDOR) && +- id->idVendor != le16_to_cpu(dev->descriptor.idVendor)) +- continue; +- +- if ((id->match_flags & USB_DEVICE_ID_MATCH_PRODUCT) && +- id->idProduct != le16_to_cpu(dev->descriptor.idProduct)) +- continue; +- +- /* No need to test id->bcdDevice_lo != 0, since 0 is never +- greater than any unsigned number. */ +- if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_LO) && +- (id->bcdDevice_lo > le16_to_cpu(dev->descriptor.bcdDevice))) +- continue; +- +- if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_HI) && +- (id->bcdDevice_hi < le16_to_cpu(dev->descriptor.bcdDevice))) +- continue; +- +- if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_CLASS) && +- (id->bDeviceClass != dev->descriptor.bDeviceClass)) +- continue; +- +- if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_SUBCLASS) && +- (id->bDeviceSubClass != dev->descriptor.bDeviceSubClass)) +- continue; +- +- if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_PROTOCOL) && +- (id->bDeviceProtocol != dev->descriptor.bDeviceProtocol)) +- continue; ++#ifdef DEBUG ++ dev_dbg(&dev->dev, "device V:%04x P:%04x DC:%04x SC:%04x PR:%04x \n", ++ dev->descriptor.idVendor, ++ dev->descriptor.idProduct, ++ dev->descriptor.bDeviceClass, ++ dev->descriptor.bDeviceSubClass, ++ dev->descriptor.bDeviceProtocol); ++#endif + + return 1; ++ /* NOTE: can't use usb_match_id() since interface caches ++ * aren't set up yet. this is cut/paste from that code. ++ */ ++ for (id = whitelist_table; id->match_flags; id++) { ++#ifdef DEBUG ++ dev_dbg(&dev->dev, ++ "ID: V:%04x P:%04x DC:%04x SC:%04x PR:%04x \n", ++ id->idVendor, ++ id->idProduct, ++ id->bDeviceClass, ++ id->bDeviceSubClass, ++ id->bDeviceProtocol); ++#endif ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_VENDOR) && ++ id->idVendor != le16_to_cpu(dev->descriptor.idVendor)) ++ continue; ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_PRODUCT) && ++ id->idProduct != le16_to_cpu(dev->descriptor.idProduct)) ++ continue; ++ ++ /* No need to test id->bcdDevice_lo != 0, since 0 is never ++ greater than any unsigned number. */ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_LO) && ++ (id->bcdDevice_lo > le16_to_cpu(dev->descriptor.bcdDevice))) ++ continue; ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_HI) && ++ (id->bcdDevice_hi < le16_to_cpu(dev->descriptor.bcdDevice))) ++ continue; ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_CLASS) && ++ (id->bDeviceClass != dev->descriptor.bDeviceClass)) ++ continue; ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_SUBCLASS) && ++ (id->bDeviceSubClass != dev->descriptor.bDeviceSubClass)) ++ continue; ++ ++ if ((id->match_flags & USB_DEVICE_ID_MATCH_DEV_PROTOCOL) && ++ (id->bDeviceProtocol != dev->descriptor.bDeviceProtocol)) ++ continue; ++ ++ return 1; ++ } + } + + /* add other match criteria here ... */ + +- +- /* OTG MESSAGE: report errors here, customize to match your product */ +- dev_err(&dev->dev, "device v%04x p%04x is not supported\n", +- le16_to_cpu(dev->descriptor.idVendor), +- le16_to_cpu(dev->descriptor.idProduct)); + #ifdef CONFIG_USB_OTG_WHITELIST ++ report_errors(dev); + return 0; + #else +- return 1; ++ if (enable_whitelist) { ++ report_errors(dev); ++ return 0; ++ } else { ++ return 1; ++ } + #endif + } + +Index: linux-3.10-3.10.11/drivers/usb/gadget/file_storage.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/gadget/file_storage.c 2014-04-28 00:42:05.000000000 +0000 +@@ -0,0 +1,3676 @@ ++/* ++ * file_storage.c -- File-backed USB Storage Gadget, for USB development ++ * ++ * Copyright (C) 2003-2008 Alan Stern ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") as published by the Free Software ++ * Foundation, either version 2 of that License or (at your option) any ++ * later version. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++ ++/* ++ * The File-backed Storage Gadget acts as a USB Mass Storage device, ++ * appearing to the host as a disk drive or as a CD-ROM drive. In addition ++ * to providing an example of a genuinely useful gadget driver for a USB ++ * device, it also illustrates a technique of double-buffering for increased ++ * throughput. Last but not least, it gives an easy way to probe the ++ * behavior of the Mass Storage drivers in a USB host. ++ * ++ * Backing storage is provided by a regular file or a block device, specified ++ * by the "file" module parameter. Access can be limited to read-only by ++ * setting the optional "ro" module parameter. (For CD-ROM emulation, ++ * access is always read-only.) The gadget will indicate that it has ++ * removable media if the optional "removable" module parameter is set. ++ * ++ * The gadget supports the Control-Bulk (CB), Control-Bulk-Interrupt (CBI), ++ * and Bulk-Only (also known as Bulk-Bulk-Bulk or BBB) transports, selected ++ * by the optional "transport" module parameter. It also supports the ++ * following protocols: RBC (0x01), ATAPI or SFF-8020i (0x02), QIC-157 (0c03), ++ * UFI (0x04), SFF-8070i (0x05), and transparent SCSI (0x06), selected by ++ * the optional "protocol" module parameter. In addition, the default ++ * Vendor ID, Product ID, release number and serial number can be overridden. ++ * ++ * There is support for multiple logical units (LUNs), each of which has ++ * its own backing file. The number of LUNs can be set using the optional ++ * "luns" module parameter (anywhere from 1 to 8), and the corresponding ++ * files are specified using comma-separated lists for "file" and "ro". ++ * The default number of LUNs is taken from the number of "file" elements; ++ * it is 1 if "file" is not given. If "removable" is not set then a backing ++ * file must be specified for each LUN. If it is set, then an unspecified ++ * or empty backing filename means the LUN's medium is not loaded. Ideally ++ * each LUN would be settable independently as a disk drive or a CD-ROM ++ * drive, but currently all LUNs have to be the same type. The CD-ROM ++ * emulation includes a single data track and no audio tracks; hence there ++ * need be only one backing file per LUN. ++ * ++ * Requirements are modest; only a bulk-in and a bulk-out endpoint are ++ * needed (an interrupt-out endpoint is also needed for CBI). The memory ++ * requirement amounts to two 16K buffers, size configurable by a parameter. ++ * Support is included for both full-speed and high-speed operation. ++ * ++ * Note that the driver is slightly non-portable in that it assumes a ++ * single memory/DMA buffer will be useable for bulk-in, bulk-out, and ++ * interrupt-in endpoints. With most device controllers this isn't an ++ * issue, but there may be some with hardware restrictions that prevent ++ * a buffer from being used by more than one endpoint. ++ * ++ * Module options: ++ * ++ * file=filename[,filename...] ++ * Required if "removable" is not set, names of ++ * the files or block devices used for ++ * backing storage ++ * serial=HHHH... Required serial number (string of hex chars) ++ * ro=b[,b...] Default false, booleans for read-only access ++ * removable Default false, boolean for removable media ++ * luns=N Default N = number of filenames, number of ++ * LUNs to support ++ * nofua=b[,b...] Default false, booleans for ignore FUA flag ++ * in SCSI WRITE(10,12) commands ++ * stall Default determined according to the type of ++ * USB device controller (usually true), ++ * boolean to permit the driver to halt ++ * bulk endpoints ++ * cdrom Default false, boolean for whether to emulate ++ * a CD-ROM drive ++ * transport=XXX Default BBB, transport name (CB, CBI, or BBB) ++ * protocol=YYY Default SCSI, protocol name (RBC, 8020 or ++ * ATAPI, QIC, UFI, 8070, or SCSI; ++ * also 1 - 6) ++ * vendor=0xVVVV Default 0x0525 (NetChip), USB Vendor ID ++ * product=0xPPPP Default 0xa4a5 (FSG), USB Product ID ++ * release=0xRRRR Override the USB release number (bcdDevice) ++ * buflen=N Default N=16384, buffer size used (will be ++ * rounded down to a multiple of ++ * PAGE_CACHE_SIZE) ++ * ++ * If CONFIG_USB_FILE_STORAGE_TEST is not set, only the "file", "serial", "ro", ++ * "removable", "luns", "nofua", "stall", and "cdrom" options are available; ++ * default values are used for everything else. ++ * ++ * The pathnames of the backing files and the ro settings are available in ++ * the attribute files "file", "nofua", and "ro" in the lun subdirectory of ++ * the gadget's sysfs directory. If the "removable" option is set, writing to ++ * these files will simulate ejecting/loading the medium (writing an empty ++ * line means eject) and adjusting a write-enable tab. Changes to the ro ++ * setting are not allowed when the medium is loaded or if CD-ROM emulation ++ * is being used. ++ * ++ * This gadget driver is heavily based on "Gadget Zero" by David Brownell. ++ * The driver's SCSI command interface was based on the "Information ++ * technology - Small Computer System Interface - 2" document from ++ * X3T9.2 Project 375D, Revision 10L, 7-SEP-93, available at ++ * . The single exception ++ * is opcode 0x23 (READ FORMAT CAPACITIES), which was based on the ++ * "Universal Serial Bus Mass Storage Class UFI Command Specification" ++ * document, Revision 1.0, December 14, 1998, available at ++ * . ++ */ ++ ++ ++/* ++ * Driver Design ++ * ++ * The FSG driver is fairly straightforward. There is a main kernel ++ * thread that handles most of the work. Interrupt routines field ++ * callbacks from the controller driver: bulk- and interrupt-request ++ * completion notifications, endpoint-0 events, and disconnect events. ++ * Completion events are passed to the main thread by wakeup calls. Many ++ * ep0 requests are handled at interrupt time, but SetInterface, ++ * SetConfiguration, and device reset requests are forwarded to the ++ * thread in the form of "exceptions" using SIGUSR1 signals (since they ++ * should interrupt any ongoing file I/O operations). ++ * ++ * The thread's main routine implements the standard command/data/status ++ * parts of a SCSI interaction. It and its subroutines are full of tests ++ * for pending signals/exceptions -- all this polling is necessary since ++ * the kernel has no setjmp/longjmp equivalents. (Maybe this is an ++ * indication that the driver really wants to be running in userspace.) ++ * An important point is that so long as the thread is alive it keeps an ++ * open reference to the backing file. This will prevent unmounting ++ * the backing file's underlying filesystem and could cause problems ++ * during system shutdown, for example. To prevent such problems, the ++ * thread catches INT, TERM, and KILL signals and converts them into ++ * an EXIT exception. ++ * ++ * In normal operation the main thread is started during the gadget's ++ * fsg_bind() callback and stopped during fsg_unbind(). But it can also ++ * exit when it receives a signal, and there's no point leaving the ++ * gadget running when the thread is dead. So just before the thread ++ * exits, it deregisters the gadget driver. This makes things a little ++ * tricky: The driver is deregistered at two places, and the exiting ++ * thread can indirectly call fsg_unbind() which in turn can tell the ++ * thread to exit. The first problem is resolved through the use of the ++ * REGISTERED atomic bitflag; the driver will only be deregistered once. ++ * The second problem is resolved by having fsg_unbind() check ++ * fsg->state; it won't try to stop the thread if the state is already ++ * FSG_STATE_TERMINATED. ++ * ++ * To provide maximum throughput, the driver uses a circular pipeline of ++ * buffer heads (struct fsg_buffhd). In principle the pipeline can be ++ * arbitrarily long; in practice the benefits don't justify having more ++ * than 2 stages (i.e., double buffering). But it helps to think of the ++ * pipeline as being a long one. Each buffer head contains a bulk-in and ++ * a bulk-out request pointer (since the buffer can be used for both ++ * output and input -- directions always are given from the host's ++ * point of view) as well as a pointer to the buffer and various state ++ * variables. ++ * ++ * Use of the pipeline follows a simple protocol. There is a variable ++ * (fsg->next_buffhd_to_fill) that points to the next buffer head to use. ++ * At any time that buffer head may still be in use from an earlier ++ * request, so each buffer head has a state variable indicating whether ++ * it is EMPTY, FULL, or BUSY. Typical use involves waiting for the ++ * buffer head to be EMPTY, filling the buffer either by file I/O or by ++ * USB I/O (during which the buffer head is BUSY), and marking the buffer ++ * head FULL when the I/O is complete. Then the buffer will be emptied ++ * (again possibly by USB I/O, during which it is marked BUSY) and ++ * finally marked EMPTY again (possibly by a completion routine). ++ * ++ * A module parameter tells the driver to avoid stalling the bulk ++ * endpoints wherever the transport specification allows. This is ++ * necessary for some UDCs like the SuperH, which cannot reliably clear a ++ * halt on a bulk endpoint. However, under certain circumstances the ++ * Bulk-only specification requires a stall. In such cases the driver ++ * will halt the endpoint and set a flag indicating that it should clear ++ * the halt in software during the next device reset. Hopefully this ++ * will permit everything to work correctly. Furthermore, although the ++ * specification allows the bulk-out endpoint to halt when the host sends ++ * too much data, implementing this would cause an unavoidable race. ++ * The driver will always use the "no-stall" approach for OUT transfers. ++ * ++ * One subtle point concerns sending status-stage responses for ep0 ++ * requests. Some of these requests, such as device reset, can involve ++ * interrupting an ongoing file I/O operation, which might take an ++ * arbitrarily long time. During that delay the host might give up on ++ * the original ep0 request and issue a new one. When that happens the ++ * driver should not notify the host about completion of the original ++ * request, as the host will no longer be waiting for it. So the driver ++ * assigns to each ep0 request a unique tag, and it keeps track of the ++ * tag value of the request associated with a long-running exception ++ * (device-reset, interface-change, or configuration-change). When the ++ * exception handler is finished, the status-stage response is submitted ++ * only if the current ep0 request tag is equal to the exception request ++ * tag. Thus only the most recently received ep0 request will get a ++ * status-stage response. ++ * ++ * Warning: This driver source file is too long. It ought to be split up ++ * into a header file plus about 3 separate .c files, to handle the details ++ * of the Gadget, USB Mass Storage, and SCSI protocols. ++ */ ++ ++ ++/* #define VERBOSE_DEBUG */ ++/* #define DUMP_MSGS */ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include "gadget_chips.h" ++ ++ ++ ++/* ++ * Kbuild is not very cooperative with respect to linking separately ++ * compiled library objects into one module. So for now we won't use ++ * separate compilation ... ensuring init/exit sections work to shrink ++ * the runtime footprint, and giving us at least some parts of what ++ * a "gcc --combine ... part1.c part2.c part3.c ... " build would. ++ */ ++#include "usbstring.c" ++#include "config.c" ++#include "epautoconf.c" ++ ++/*-------------------------------------------------------------------------*/ ++ ++#define DRIVER_DESC "File-backed Storage Gadget" ++#define DRIVER_NAME "g_file_storage" ++#define DRIVER_VERSION "1 September 2010" ++ ++static char fsg_string_manufacturer[64]; ++static const char fsg_string_product[] = DRIVER_DESC; ++static const char fsg_string_config[] = "Self-powered"; ++static const char fsg_string_interface[] = "Mass Storage"; ++ ++ ++#include "storage_common.c" ++ ++ ++MODULE_DESCRIPTION(DRIVER_DESC); ++MODULE_AUTHOR("Alan Stern"); ++MODULE_LICENSE("Dual BSD/GPL"); ++ ++/* ++ * This driver assumes self-powered hardware and has no way for users to ++ * trigger remote wakeup. It uses autoconfiguration to select endpoints ++ * and endpoint addresses. ++ */ ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++ ++/* Encapsulate the module parameter settings */ ++ ++static struct { ++ char *file[FSG_MAX_LUNS]; ++ char *serial; ++ bool ro[FSG_MAX_LUNS]; ++ bool nofua[FSG_MAX_LUNS]; ++ unsigned int num_filenames; ++ unsigned int num_ros; ++ unsigned int num_nofuas; ++ unsigned int nluns; ++ ++ bool removable; ++ bool can_stall; ++ bool cdrom; ++ ++ char *transport_parm; ++ char *protocol_parm; ++ unsigned short vendor; ++ unsigned short product; ++ unsigned short release; ++ unsigned int buflen; ++ ++ int transport_type; ++ char *transport_name; ++ int protocol_type; ++ char *protocol_name; ++ ++} mod_data = { // Default values ++ .transport_parm = "BBB", ++ .protocol_parm = "SCSI", ++ .removable = 0, ++ .can_stall = 1, ++ .cdrom = 0, ++ .vendor = FSG_VENDOR_ID, ++ .product = FSG_PRODUCT_ID, ++ .release = 0xffff, // Use controller chip type ++ .buflen = 16384, ++ }; ++ ++ ++module_param_array_named(file, mod_data.file, charp, &mod_data.num_filenames, ++ S_IRUGO); ++MODULE_PARM_DESC(file, "names of backing files or devices"); ++ ++module_param_named(serial, mod_data.serial, charp, S_IRUGO); ++MODULE_PARM_DESC(serial, "USB serial number"); ++ ++module_param_array_named(ro, mod_data.ro, bool, &mod_data.num_ros, S_IRUGO); ++MODULE_PARM_DESC(ro, "true to force read-only"); ++ ++module_param_array_named(nofua, mod_data.nofua, bool, &mod_data.num_nofuas, ++ S_IRUGO); ++MODULE_PARM_DESC(nofua, "true to ignore SCSI WRITE(10,12) FUA bit"); ++ ++module_param_named(luns, mod_data.nluns, uint, S_IRUGO); ++MODULE_PARM_DESC(luns, "number of LUNs"); ++ ++module_param_named(removable, mod_data.removable, bool, S_IRUGO); ++MODULE_PARM_DESC(removable, "true to simulate removable media"); ++ ++module_param_named(stall, mod_data.can_stall, bool, S_IRUGO); ++MODULE_PARM_DESC(stall, "false to prevent bulk stalls"); ++ ++module_param_named(cdrom, mod_data.cdrom, bool, S_IRUGO); ++MODULE_PARM_DESC(cdrom, "true to emulate cdrom instead of disk"); ++ ++/* In the non-TEST version, only the module parameters listed above ++ * are available. */ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++ ++module_param_named(transport, mod_data.transport_parm, charp, S_IRUGO); ++MODULE_PARM_DESC(transport, "type of transport (BBB, CBI, or CB)"); ++ ++module_param_named(protocol, mod_data.protocol_parm, charp, S_IRUGO); ++MODULE_PARM_DESC(protocol, "type of protocol (RBC, 8020, QIC, UFI, " ++ "8070, or SCSI)"); ++ ++module_param_named(vendor, mod_data.vendor, ushort, S_IRUGO); ++MODULE_PARM_DESC(vendor, "USB Vendor ID"); ++ ++module_param_named(product, mod_data.product, ushort, S_IRUGO); ++MODULE_PARM_DESC(product, "USB Product ID"); ++ ++module_param_named(release, mod_data.release, ushort, S_IRUGO); ++MODULE_PARM_DESC(release, "USB release number"); ++ ++module_param_named(buflen, mod_data.buflen, uint, S_IRUGO); ++MODULE_PARM_DESC(buflen, "I/O buffer size"); ++ ++#endif /* CONFIG_USB_FILE_STORAGE_TEST */ ++ ++ ++/* ++ * These definitions will permit the compiler to avoid generating code for ++ * parts of the driver that aren't used in the non-TEST version. Even gcc ++ * can recognize when a test of a constant expression yields a dead code ++ * path. ++ */ ++ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++ ++#define transport_is_bbb() (mod_data.transport_type == USB_PR_BULK) ++#define transport_is_cbi() (mod_data.transport_type == USB_PR_CBI) ++#define protocol_is_scsi() (mod_data.protocol_type == USB_SC_SCSI) ++ ++#else ++ ++#define transport_is_bbb() 1 ++#define transport_is_cbi() 0 ++#define protocol_is_scsi() 1 ++ ++#endif /* CONFIG_USB_FILE_STORAGE_TEST */ ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++ ++struct fsg_dev { ++ /* lock protects: state, all the req_busy's, and cbbuf_cmnd */ ++ spinlock_t lock; ++ struct usb_gadget *gadget; ++ ++ /* filesem protects: backing files in use */ ++ struct rw_semaphore filesem; ++ ++ /* reference counting: wait until all LUNs are released */ ++ struct kref ref; ++ ++ struct usb_ep *ep0; // Handy copy of gadget->ep0 ++ struct usb_request *ep0req; // For control responses ++ unsigned int ep0_req_tag; ++ const char *ep0req_name; ++ ++ struct usb_request *intreq; // For interrupt responses ++ int intreq_busy; ++ struct fsg_buffhd *intr_buffhd; ++ ++ unsigned int bulk_out_maxpacket; ++ enum fsg_state state; // For exception handling ++ unsigned int exception_req_tag; ++ ++ u8 config, new_config; ++ ++ unsigned int running : 1; ++ unsigned int bulk_in_enabled : 1; ++ unsigned int bulk_out_enabled : 1; ++ unsigned int intr_in_enabled : 1; ++ unsigned int phase_error : 1; ++ unsigned int short_packet_received : 1; ++ unsigned int bad_lun_okay : 1; ++ ++ unsigned long atomic_bitflags; ++#define REGISTERED 0 ++#define IGNORE_BULK_OUT 1 ++#define SUSPENDED 2 ++ ++ struct usb_ep *bulk_in; ++ struct usb_ep *bulk_out; ++ struct usb_ep *intr_in; ++ ++ struct fsg_buffhd *next_buffhd_to_fill; ++ struct fsg_buffhd *next_buffhd_to_drain; ++ ++ int thread_wakeup_needed; ++ struct completion thread_notifier; ++ struct task_struct *thread_task; ++ ++ int cmnd_size; ++ u8 cmnd[MAX_COMMAND_SIZE]; ++ enum data_direction data_dir; ++ u32 data_size; ++ u32 data_size_from_cmnd; ++ u32 tag; ++ unsigned int lun; ++ u32 residue; ++ u32 usb_amount_left; ++ ++ /* The CB protocol offers no way for a host to know when a command ++ * has completed. As a result the next command may arrive early, ++ * and we will still have to handle it. For that reason we need ++ * a buffer to store new commands when using CB (or CBI, which ++ * does not oblige a host to wait for command completion either). */ ++ int cbbuf_cmnd_size; ++ u8 cbbuf_cmnd[MAX_COMMAND_SIZE]; ++ ++ unsigned int nluns; ++ struct fsg_lun *luns; ++ struct fsg_lun *curlun; ++ /* Must be the last entry */ ++ struct fsg_buffhd buffhds[]; ++}; ++ ++typedef void (*fsg_routine_t)(struct fsg_dev *); ++ ++static int exception_in_progress(struct fsg_dev *fsg) ++{ ++ return (fsg->state > FSG_STATE_IDLE); ++} ++ ++/* Make bulk-out requests be divisible by the maxpacket size */ ++static void set_bulk_out_req_length(struct fsg_dev *fsg, ++ struct fsg_buffhd *bh, unsigned int length) ++{ ++ unsigned int rem; ++ ++ bh->bulk_out_intended_length = length; ++ rem = length % fsg->bulk_out_maxpacket; ++ if (rem > 0) ++ length += fsg->bulk_out_maxpacket - rem; ++ bh->outreq->length = length; ++} ++ ++static struct fsg_dev *the_fsg; ++static struct usb_gadget_driver fsg_driver; ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int fsg_set_halt(struct fsg_dev *fsg, struct usb_ep *ep) ++{ ++ const char *name; ++ ++ if (ep == fsg->bulk_in) ++ name = "bulk-in"; ++ else if (ep == fsg->bulk_out) ++ name = "bulk-out"; ++ else ++ name = ep->name; ++ DBG(fsg, "%s set halt\n", name); ++ return usb_ep_set_halt(ep); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * DESCRIPTORS ... most are static, but strings and (full) configuration ++ * descriptors are built on demand. Also the (static) config and interface ++ * descriptors are adjusted during fsg_bind(). ++ */ ++ ++/* There is only one configuration. */ ++#define CONFIG_VALUE 1 ++ ++static struct usb_device_descriptor ++device_desc = { ++ .bLength = sizeof device_desc, ++ .bDescriptorType = USB_DT_DEVICE, ++ ++ .bcdUSB = cpu_to_le16(0x0200), ++ .bDeviceClass = USB_CLASS_PER_INTERFACE, ++ ++ /* The next three values can be overridden by module parameters */ ++ .idVendor = cpu_to_le16(FSG_VENDOR_ID), ++ .idProduct = cpu_to_le16(FSG_PRODUCT_ID), ++ .bcdDevice = cpu_to_le16(0xffff), ++ ++ .iManufacturer = FSG_STRING_MANUFACTURER, ++ .iProduct = FSG_STRING_PRODUCT, ++ .iSerialNumber = FSG_STRING_SERIAL, ++ .bNumConfigurations = 1, ++}; ++ ++static struct usb_config_descriptor ++config_desc = { ++ .bLength = sizeof config_desc, ++ .bDescriptorType = USB_DT_CONFIG, ++ ++ /* wTotalLength computed by usb_gadget_config_buf() */ ++ .bNumInterfaces = 1, ++ .bConfigurationValue = CONFIG_VALUE, ++ .iConfiguration = FSG_STRING_CONFIG, ++ .bmAttributes = USB_CONFIG_ATT_ONE | USB_CONFIG_ATT_SELFPOWER, ++ .bMaxPower = CONFIG_USB_GADGET_VBUS_DRAW / 2, ++}; ++ ++ ++static struct usb_qualifier_descriptor ++dev_qualifier = { ++ .bLength = sizeof dev_qualifier, ++ .bDescriptorType = USB_DT_DEVICE_QUALIFIER, ++ ++ .bcdUSB = cpu_to_le16(0x0200), ++ .bDeviceClass = USB_CLASS_PER_INTERFACE, ++ ++ .bNumConfigurations = 1, ++}; ++ ++static int populate_bos(struct fsg_dev *fsg, u8 *buf) ++{ ++ memcpy(buf, &fsg_bos_desc, USB_DT_BOS_SIZE); ++ buf += USB_DT_BOS_SIZE; ++ ++ memcpy(buf, &fsg_ext_cap_desc, USB_DT_USB_EXT_CAP_SIZE); ++ buf += USB_DT_USB_EXT_CAP_SIZE; ++ ++ memcpy(buf, &fsg_ss_cap_desc, USB_DT_USB_SS_CAP_SIZE); ++ ++ return USB_DT_BOS_SIZE + USB_DT_USB_SS_CAP_SIZE ++ + USB_DT_USB_EXT_CAP_SIZE; ++} ++ ++/* ++ * Config descriptors must agree with the code that sets configurations ++ * and with code managing interfaces and their altsettings. They must ++ * also handle different speeds and other-speed requests. ++ */ ++static int populate_config_buf(struct usb_gadget *gadget, ++ u8 *buf, u8 type, unsigned index) ++{ ++ enum usb_device_speed speed = gadget->speed; ++ int len; ++ const struct usb_descriptor_header **function; ++ ++ if (index > 0) ++ return -EINVAL; ++ ++ if (gadget_is_dualspeed(gadget) && type == USB_DT_OTHER_SPEED_CONFIG) ++ speed = (USB_SPEED_FULL + USB_SPEED_HIGH) - speed; ++ function = gadget_is_dualspeed(gadget) && speed == USB_SPEED_HIGH ++ ? (const struct usb_descriptor_header **)fsg_hs_function ++ : (const struct usb_descriptor_header **)fsg_fs_function; ++ ++ /* for now, don't advertise srp-only devices */ ++ if (!gadget_is_otg(gadget)) ++ function++; ++ ++ len = usb_gadget_config_buf(&config_desc, buf, EP0_BUFSIZE, function); ++ ((struct usb_config_descriptor *) buf)->bDescriptorType = type; ++ return len; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* These routines may be called in process context or in_irq */ ++ ++/* Caller must hold fsg->lock */ ++static void wakeup_thread(struct fsg_dev *fsg) ++{ ++ /* Tell the main thread that something has happened */ ++ fsg->thread_wakeup_needed = 1; ++ if (fsg->thread_task) ++ wake_up_process(fsg->thread_task); ++} ++ ++ ++static void raise_exception(struct fsg_dev *fsg, enum fsg_state new_state) ++{ ++ unsigned long flags; ++ ++ /* Do nothing if a higher-priority exception is already in progress. ++ * If a lower-or-equal priority exception is in progress, preempt it ++ * and notify the main thread by sending it a signal. */ ++ spin_lock_irqsave(&fsg->lock, flags); ++ if (fsg->state <= new_state) { ++ fsg->exception_req_tag = fsg->ep0_req_tag; ++ fsg->state = new_state; ++ if (fsg->thread_task) ++ send_sig_info(SIGUSR1, SEND_SIG_FORCED, ++ fsg->thread_task); ++ } ++ spin_unlock_irqrestore(&fsg->lock, flags); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* The disconnect callback and ep0 routines. These always run in_irq, ++ * except that ep0_queue() is called in the main thread to acknowledge ++ * completion of various requests: set config, set interface, and ++ * Bulk-only device reset. */ ++ ++static void fsg_disconnect(struct usb_gadget *gadget) ++{ ++ struct fsg_dev *fsg = get_gadget_data(gadget); ++ ++ DBG(fsg, "disconnect or port reset\n"); ++ raise_exception(fsg, FSG_STATE_DISCONNECT); ++} ++ ++ ++static int ep0_queue(struct fsg_dev *fsg) ++{ ++ int rc; ++ ++ rc = usb_ep_queue(fsg->ep0, fsg->ep0req, GFP_ATOMIC); ++ if (rc != 0 && rc != -ESHUTDOWN) { ++ ++ /* We can't do much more than wait for a reset */ ++ WARNING(fsg, "error in submission: %s --> %d\n", ++ fsg->ep0->name, rc); ++ } ++ return rc; ++} ++ ++static void ep0_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ struct fsg_dev *fsg = ep->driver_data; ++ ++ if (req->actual > 0) ++ dump_msg(fsg, fsg->ep0req_name, req->buf, req->actual); ++ if (req->status || req->actual != req->length) ++ DBG(fsg, "%s --> %d, %u/%u\n", __func__, ++ req->status, req->actual, req->length); ++ if (req->status == -ECONNRESET) // Request was cancelled ++ usb_ep_fifo_flush(ep); ++ ++ if (req->status == 0 && req->context) ++ ((fsg_routine_t) (req->context))(fsg); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Bulk and interrupt endpoint completion handlers. ++ * These always run in_irq. */ ++ ++static void bulk_in_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ struct fsg_dev *fsg = ep->driver_data; ++ struct fsg_buffhd *bh = req->context; ++ ++ if (req->status || req->actual != req->length) ++ DBG(fsg, "%s --> %d, %u/%u\n", __func__, ++ req->status, req->actual, req->length); ++ if (req->status == -ECONNRESET) // Request was cancelled ++ usb_ep_fifo_flush(ep); ++ ++ /* Hold the lock while we update the request and buffer states */ ++ smp_wmb(); ++ spin_lock(&fsg->lock); ++ bh->inreq_busy = 0; ++ bh->state = BUF_STATE_EMPTY; ++ wakeup_thread(fsg); ++ spin_unlock(&fsg->lock); ++} ++ ++static void bulk_out_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ struct fsg_dev *fsg = ep->driver_data; ++ struct fsg_buffhd *bh = req->context; ++ ++ dump_msg(fsg, "bulk-out", req->buf, req->actual); ++ if (req->status || req->actual != bh->bulk_out_intended_length) ++ DBG(fsg, "%s --> %d, %u/%u\n", __func__, ++ req->status, req->actual, ++ bh->bulk_out_intended_length); ++ if (req->status == -ECONNRESET) // Request was cancelled ++ usb_ep_fifo_flush(ep); ++ ++ /* Hold the lock while we update the request and buffer states */ ++ smp_wmb(); ++ spin_lock(&fsg->lock); ++ bh->outreq_busy = 0; ++ bh->state = BUF_STATE_FULL; ++ wakeup_thread(fsg); ++ spin_unlock(&fsg->lock); ++} ++ ++ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++static void intr_in_complete(struct usb_ep *ep, struct usb_request *req) ++{ ++ struct fsg_dev *fsg = ep->driver_data; ++ struct fsg_buffhd *bh = req->context; ++ ++ if (req->status || req->actual != req->length) ++ DBG(fsg, "%s --> %d, %u/%u\n", __func__, ++ req->status, req->actual, req->length); ++ if (req->status == -ECONNRESET) // Request was cancelled ++ usb_ep_fifo_flush(ep); ++ ++ /* Hold the lock while we update the request and buffer states */ ++ smp_wmb(); ++ spin_lock(&fsg->lock); ++ fsg->intreq_busy = 0; ++ bh->state = BUF_STATE_EMPTY; ++ wakeup_thread(fsg); ++ spin_unlock(&fsg->lock); ++} ++ ++#else ++static void intr_in_complete(struct usb_ep *ep, struct usb_request *req) ++{} ++#endif /* CONFIG_USB_FILE_STORAGE_TEST */ ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Ep0 class-specific handlers. These always run in_irq. */ ++ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++static void received_cbi_adsc(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct usb_request *req = fsg->ep0req; ++ static u8 cbi_reset_cmnd[6] = { ++ SEND_DIAGNOSTIC, 4, 0xff, 0xff, 0xff, 0xff}; ++ ++ /* Error in command transfer? */ ++ if (req->status || req->length != req->actual || ++ req->actual < 6 || req->actual > MAX_COMMAND_SIZE) { ++ ++ /* Not all controllers allow a protocol stall after ++ * receiving control-out data, but we'll try anyway. */ ++ fsg_set_halt(fsg, fsg->ep0); ++ return; // Wait for reset ++ } ++ ++ /* Is it the special reset command? */ ++ if (req->actual >= sizeof cbi_reset_cmnd && ++ memcmp(req->buf, cbi_reset_cmnd, ++ sizeof cbi_reset_cmnd) == 0) { ++ ++ /* Raise an exception to stop the current operation ++ * and reinitialize our state. */ ++ DBG(fsg, "cbi reset request\n"); ++ raise_exception(fsg, FSG_STATE_RESET); ++ return; ++ } ++ ++ VDBG(fsg, "CB[I] accept device-specific command\n"); ++ spin_lock(&fsg->lock); ++ ++ /* Save the command for later */ ++ if (fsg->cbbuf_cmnd_size) ++ WARNING(fsg, "CB[I] overwriting previous command\n"); ++ fsg->cbbuf_cmnd_size = req->actual; ++ memcpy(fsg->cbbuf_cmnd, req->buf, fsg->cbbuf_cmnd_size); ++ ++ wakeup_thread(fsg); ++ spin_unlock(&fsg->lock); ++} ++ ++#else ++static void received_cbi_adsc(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{} ++#endif /* CONFIG_USB_FILE_STORAGE_TEST */ ++ ++ ++static int class_setup_req(struct fsg_dev *fsg, ++ const struct usb_ctrlrequest *ctrl) ++{ ++ struct usb_request *req = fsg->ep0req; ++ int value = -EOPNOTSUPP; ++ u16 w_index = le16_to_cpu(ctrl->wIndex); ++ u16 w_value = le16_to_cpu(ctrl->wValue); ++ u16 w_length = le16_to_cpu(ctrl->wLength); ++ ++ if (!fsg->config) ++ return value; ++ ++ /* Handle Bulk-only class-specific requests */ ++ if (transport_is_bbb()) { ++ switch (ctrl->bRequest) { ++ ++ case US_BULK_RESET_REQUEST: ++ if (ctrl->bRequestType != (USB_DIR_OUT | ++ USB_TYPE_CLASS | USB_RECIP_INTERFACE)) ++ break; ++ if (w_index != 0 || w_value != 0 || w_length != 0) { ++ value = -EDOM; ++ break; ++ } ++ ++ /* Raise an exception to stop the current operation ++ * and reinitialize our state. */ ++ DBG(fsg, "bulk reset request\n"); ++ raise_exception(fsg, FSG_STATE_RESET); ++ value = DELAYED_STATUS; ++ break; ++ ++ case US_BULK_GET_MAX_LUN: ++ if (ctrl->bRequestType != (USB_DIR_IN | ++ USB_TYPE_CLASS | USB_RECIP_INTERFACE)) ++ break; ++ if (w_index != 0 || w_value != 0 || w_length != 1) { ++ value = -EDOM; ++ break; ++ } ++ VDBG(fsg, "get max LUN\n"); ++ *(u8 *) req->buf = fsg->nluns - 1; ++ value = 1; ++ break; ++ } ++ } ++ ++ /* Handle CBI class-specific requests */ ++ else { ++ switch (ctrl->bRequest) { ++ ++ case USB_CBI_ADSC_REQUEST: ++ if (ctrl->bRequestType != (USB_DIR_OUT | ++ USB_TYPE_CLASS | USB_RECIP_INTERFACE)) ++ break; ++ if (w_index != 0 || w_value != 0) { ++ value = -EDOM; ++ break; ++ } ++ if (w_length > MAX_COMMAND_SIZE) { ++ value = -EOVERFLOW; ++ break; ++ } ++ value = w_length; ++ fsg->ep0req->context = received_cbi_adsc; ++ break; ++ } ++ } ++ ++ if (value == -EOPNOTSUPP) ++ VDBG(fsg, ++ "unknown class-specific control req " ++ "%02x.%02x v%04x i%04x l%u\n", ++ ctrl->bRequestType, ctrl->bRequest, ++ le16_to_cpu(ctrl->wValue), w_index, w_length); ++ return value; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Ep0 standard request handlers. These always run in_irq. */ ++ ++static int standard_setup_req(struct fsg_dev *fsg, ++ const struct usb_ctrlrequest *ctrl) ++{ ++ struct usb_request *req = fsg->ep0req; ++ int value = -EOPNOTSUPP; ++ u16 w_index = le16_to_cpu(ctrl->wIndex); ++ u16 w_value = le16_to_cpu(ctrl->wValue); ++ ++ /* Usually this just stores reply data in the pre-allocated ep0 buffer, ++ * but config change events will also reconfigure hardware. */ ++ switch (ctrl->bRequest) { ++ ++ case USB_REQ_GET_DESCRIPTOR: ++ if (ctrl->bRequestType != (USB_DIR_IN | USB_TYPE_STANDARD | ++ USB_RECIP_DEVICE)) ++ break; ++ switch (w_value >> 8) { ++ ++ case USB_DT_DEVICE: ++ VDBG(fsg, "get device descriptor\n"); ++ device_desc.bMaxPacketSize0 = fsg->ep0->maxpacket; ++ value = sizeof device_desc; ++ memcpy(req->buf, &device_desc, value); ++ break; ++ case USB_DT_DEVICE_QUALIFIER: ++ VDBG(fsg, "get device qualifier\n"); ++ if (!gadget_is_dualspeed(fsg->gadget) || ++ fsg->gadget->speed == USB_SPEED_SUPER) ++ break; ++ /* ++ * Assume ep0 uses the same maxpacket value for both ++ * speeds ++ */ ++ dev_qualifier.bMaxPacketSize0 = fsg->ep0->maxpacket; ++ value = sizeof dev_qualifier; ++ memcpy(req->buf, &dev_qualifier, value); ++ break; ++ ++ case USB_DT_OTHER_SPEED_CONFIG: ++ VDBG(fsg, "get other-speed config descriptor\n"); ++ if (!gadget_is_dualspeed(fsg->gadget) || ++ fsg->gadget->speed == USB_SPEED_SUPER) ++ break; ++ goto get_config; ++ case USB_DT_CONFIG: ++ VDBG(fsg, "get configuration descriptor\n"); ++get_config: ++ value = populate_config_buf(fsg->gadget, ++ req->buf, ++ w_value >> 8, ++ w_value & 0xff); ++ break; ++ ++ case USB_DT_STRING: ++ VDBG(fsg, "get string descriptor\n"); ++ ++ /* wIndex == language code */ ++ value = usb_gadget_get_string(&fsg_stringtab, ++ w_value & 0xff, req->buf); ++ break; ++ ++ case USB_DT_BOS: ++ VDBG(fsg, "get bos descriptor\n"); ++ ++ if (gadget_is_superspeed(fsg->gadget)) ++ value = populate_bos(fsg, req->buf); ++ break; ++ } ++ ++ break; ++ ++ /* One config, two speeds */ ++ case USB_REQ_SET_CONFIGURATION: ++ if (ctrl->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD | ++ USB_RECIP_DEVICE)) ++ break; ++ VDBG(fsg, "set configuration\n"); ++ if (w_value == CONFIG_VALUE || w_value == 0) { ++ fsg->new_config = w_value; ++ ++ /* Raise an exception to wipe out previous transaction ++ * state (queued bufs, etc) and set the new config. */ ++ raise_exception(fsg, FSG_STATE_CONFIG_CHANGE); ++ value = DELAYED_STATUS; ++ } ++ break; ++ case USB_REQ_GET_CONFIGURATION: ++ if (ctrl->bRequestType != (USB_DIR_IN | USB_TYPE_STANDARD | ++ USB_RECIP_DEVICE)) ++ break; ++ VDBG(fsg, "get configuration\n"); ++ *(u8 *) req->buf = fsg->config; ++ value = 1; ++ break; ++ ++ case USB_REQ_SET_INTERFACE: ++ if (ctrl->bRequestType != (USB_DIR_OUT| USB_TYPE_STANDARD | ++ USB_RECIP_INTERFACE)) ++ break; ++ if (fsg->config && w_index == 0) { ++ ++ /* Raise an exception to wipe out previous transaction ++ * state (queued bufs, etc) and install the new ++ * interface altsetting. */ ++ raise_exception(fsg, FSG_STATE_INTERFACE_CHANGE); ++ value = DELAYED_STATUS; ++ } ++ break; ++ case USB_REQ_GET_INTERFACE: ++ if (ctrl->bRequestType != (USB_DIR_IN | USB_TYPE_STANDARD | ++ USB_RECIP_INTERFACE)) ++ break; ++ if (!fsg->config) ++ break; ++ if (w_index != 0) { ++ value = -EDOM; ++ break; ++ } ++ VDBG(fsg, "get interface\n"); ++ *(u8 *) req->buf = 0; ++ value = 1; ++ break; ++ ++ default: ++ VDBG(fsg, ++ "unknown control req %02x.%02x v%04x i%04x l%u\n", ++ ctrl->bRequestType, ctrl->bRequest, ++ w_value, w_index, le16_to_cpu(ctrl->wLength)); ++ } ++ ++ return value; ++} ++ ++ ++static int fsg_setup(struct usb_gadget *gadget, ++ const struct usb_ctrlrequest *ctrl) ++{ ++ struct fsg_dev *fsg = get_gadget_data(gadget); ++ int rc; ++ int w_length = le16_to_cpu(ctrl->wLength); ++ ++ ++fsg->ep0_req_tag; // Record arrival of a new request ++ fsg->ep0req->context = NULL; ++ fsg->ep0req->length = 0; ++ dump_msg(fsg, "ep0-setup", (u8 *) ctrl, sizeof(*ctrl)); ++ ++ if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_CLASS) ++ rc = class_setup_req(fsg, ctrl); ++ else ++ rc = standard_setup_req(fsg, ctrl); ++ ++ /* Respond with data/status or defer until later? */ ++ if (rc >= 0 && rc != DELAYED_STATUS) { ++ rc = min(rc, w_length); ++ fsg->ep0req->length = rc; ++ fsg->ep0req->zero = rc < w_length; ++ fsg->ep0req_name = (ctrl->bRequestType & USB_DIR_IN ? ++ "ep0-in" : "ep0-out"); ++ rc = ep0_queue(fsg); ++ } ++ ++ /* Device either stalls (rc < 0) or reports success */ ++ return rc; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* All the following routines run in process context */ ++ ++ ++/* Use this for bulk or interrupt transfers, not ep0 */ ++static void start_transfer(struct fsg_dev *fsg, struct usb_ep *ep, ++ struct usb_request *req, int *pbusy, ++ enum fsg_buffer_state *state) ++{ ++ int rc; ++ ++ if (ep == fsg->bulk_in) ++ dump_msg(fsg, "bulk-in", req->buf, req->length); ++ else if (ep == fsg->intr_in) ++ dump_msg(fsg, "intr-in", req->buf, req->length); ++ ++ spin_lock_irq(&fsg->lock); ++ *pbusy = 1; ++ *state = BUF_STATE_BUSY; ++ spin_unlock_irq(&fsg->lock); ++ rc = usb_ep_queue(ep, req, GFP_KERNEL); ++ if (rc != 0) { ++ *pbusy = 0; ++ *state = BUF_STATE_EMPTY; ++ ++ /* We can't do much more than wait for a reset */ ++ ++ /* Note: currently the net2280 driver fails zero-length ++ * submissions if DMA is enabled. */ ++ if (rc != -ESHUTDOWN && !(rc == -EOPNOTSUPP && ++ req->length == 0)) ++ WARNING(fsg, "error in submission: %s --> %d\n", ++ ep->name, rc); ++ } ++} ++ ++ ++static int sleep_thread(struct fsg_dev *fsg) ++{ ++ int rc = 0; ++ ++ /* Wait until a signal arrives or we are woken up */ ++ for (;;) { ++ try_to_freeze(); ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (signal_pending(current)) { ++ rc = -EINTR; ++ break; ++ } ++ if (fsg->thread_wakeup_needed) ++ break; ++ schedule(); ++ } ++ __set_current_state(TASK_RUNNING); ++ fsg->thread_wakeup_needed = 0; ++ return rc; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int do_read(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u32 lba; ++ struct fsg_buffhd *bh; ++ int rc; ++ u32 amount_left; ++ loff_t file_offset, file_offset_tmp; ++ unsigned int amount; ++ ssize_t nread; ++ ++ /* Get the starting Logical Block Address and check that it's ++ * not too big */ ++ if (fsg->cmnd[0] == READ_6) ++ lba = get_unaligned_be24(&fsg->cmnd[1]); ++ else { ++ lba = get_unaligned_be32(&fsg->cmnd[2]); ++ ++ /* We allow DPO (Disable Page Out = don't save data in the ++ * cache) and FUA (Force Unit Access = don't read from the ++ * cache), but we don't implement them. */ ++ if ((fsg->cmnd[1] & ~0x18) != 0) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ } ++ if (lba >= curlun->num_sectors) { ++ curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ return -EINVAL; ++ } ++ file_offset = ((loff_t) lba) << curlun->blkbits; ++ ++ /* Carry out the file reads */ ++ amount_left = fsg->data_size_from_cmnd; ++ if (unlikely(amount_left == 0)) ++ return -EIO; // No default reply ++ ++ for (;;) { ++ ++ /* Figure out how much we need to read: ++ * Try to read the remaining amount. ++ * But don't read more than the buffer size. ++ * And don't try to read past the end of the file. ++ */ ++ amount = min((unsigned int) amount_left, mod_data.buflen); ++ amount = min((loff_t) amount, ++ curlun->file_length - file_offset); ++ ++ /* Wait for the next buffer to become available */ ++ bh = fsg->next_buffhd_to_fill; ++ while (bh->state != BUF_STATE_EMPTY) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ ++ /* If we were asked to read past the end of file, ++ * end with an empty buffer. */ ++ if (amount == 0) { ++ curlun->sense_data = ++ SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ bh->inreq->length = 0; ++ bh->state = BUF_STATE_FULL; ++ break; ++ } ++ ++ /* Perform the read */ ++ file_offset_tmp = file_offset; ++ nread = vfs_read(curlun->filp, ++ (char __user *) bh->buf, ++ amount, &file_offset_tmp); ++ VLDBG(curlun, "file read %u @ %llu -> %d\n", amount, ++ (unsigned long long) file_offset, ++ (int) nread); ++ if (signal_pending(current)) ++ return -EINTR; ++ ++ if (nread < 0) { ++ LDBG(curlun, "error in file read: %d\n", ++ (int) nread); ++ nread = 0; ++ } else if (nread < amount) { ++ LDBG(curlun, "partial file read: %d/%u\n", ++ (int) nread, amount); ++ nread = round_down(nread, curlun->blksize); ++ } ++ file_offset += nread; ++ amount_left -= nread; ++ fsg->residue -= nread; ++ ++ /* Except at the end of the transfer, nread will be ++ * equal to the buffer size, which is divisible by the ++ * bulk-in maxpacket size. ++ */ ++ bh->inreq->length = nread; ++ bh->state = BUF_STATE_FULL; ++ ++ /* If an error occurred, report it and its position */ ++ if (nread < amount) { ++ curlun->sense_data = SS_UNRECOVERED_READ_ERROR; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ break; ++ } ++ ++ if (amount_left == 0) ++ break; // No more left to read ++ ++ /* Send this buffer and go read some more */ ++ bh->inreq->zero = 0; ++ start_transfer(fsg, fsg->bulk_in, bh->inreq, ++ &bh->inreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ } ++ ++ return -EIO; // No default reply ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int do_write(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u32 lba; ++ struct fsg_buffhd *bh; ++ int get_some_more; ++ u32 amount_left_to_req, amount_left_to_write; ++ loff_t usb_offset, file_offset, file_offset_tmp; ++ unsigned int amount; ++ ssize_t nwritten; ++ int rc; ++ ++ if (curlun->ro) { ++ curlun->sense_data = SS_WRITE_PROTECTED; ++ return -EINVAL; ++ } ++ spin_lock(&curlun->filp->f_lock); ++ curlun->filp->f_flags &= ~O_SYNC; // Default is not to wait ++ spin_unlock(&curlun->filp->f_lock); ++ ++ /* Get the starting Logical Block Address and check that it's ++ * not too big */ ++ if (fsg->cmnd[0] == WRITE_6) ++ lba = get_unaligned_be24(&fsg->cmnd[1]); ++ else { ++ lba = get_unaligned_be32(&fsg->cmnd[2]); ++ ++ /* We allow DPO (Disable Page Out = don't save data in the ++ * cache) and FUA (Force Unit Access = write directly to the ++ * medium). We don't implement DPO; we implement FUA by ++ * performing synchronous output. */ ++ if ((fsg->cmnd[1] & ~0x18) != 0) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ /* FUA */ ++ if (!curlun->nofua && (fsg->cmnd[1] & 0x08)) { ++ spin_lock(&curlun->filp->f_lock); ++ curlun->filp->f_flags |= O_DSYNC; ++ spin_unlock(&curlun->filp->f_lock); ++ } ++ } ++ if (lba >= curlun->num_sectors) { ++ curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ return -EINVAL; ++ } ++ ++ /* Carry out the file writes */ ++ get_some_more = 1; ++ file_offset = usb_offset = ((loff_t) lba) << curlun->blkbits; ++ amount_left_to_req = amount_left_to_write = fsg->data_size_from_cmnd; ++ ++ while (amount_left_to_write > 0) { ++ ++ /* Queue a request for more data from the host */ ++ bh = fsg->next_buffhd_to_fill; ++ if (bh->state == BUF_STATE_EMPTY && get_some_more) { ++ ++ /* Figure out how much we want to get: ++ * Try to get the remaining amount, ++ * but not more than the buffer size. ++ */ ++ amount = min(amount_left_to_req, mod_data.buflen); ++ ++ /* Beyond the end of the backing file? */ ++ if (usb_offset >= curlun->file_length) { ++ get_some_more = 0; ++ curlun->sense_data = ++ SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ curlun->sense_data_info = usb_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ continue; ++ } ++ ++ /* Get the next buffer */ ++ usb_offset += amount; ++ fsg->usb_amount_left -= amount; ++ amount_left_to_req -= amount; ++ if (amount_left_to_req == 0) ++ get_some_more = 0; ++ ++ /* Except at the end of the transfer, amount will be ++ * equal to the buffer size, which is divisible by ++ * the bulk-out maxpacket size. ++ */ ++ set_bulk_out_req_length(fsg, bh, amount); ++ start_transfer(fsg, fsg->bulk_out, bh->outreq, ++ &bh->outreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ continue; ++ } ++ ++ /* Write the received data to the backing file */ ++ bh = fsg->next_buffhd_to_drain; ++ if (bh->state == BUF_STATE_EMPTY && !get_some_more) ++ break; // We stopped early ++ if (bh->state == BUF_STATE_FULL) { ++ smp_rmb(); ++ fsg->next_buffhd_to_drain = bh->next; ++ bh->state = BUF_STATE_EMPTY; ++ ++ /* Did something go wrong with the transfer? */ ++ if (bh->outreq->status != 0) { ++ curlun->sense_data = SS_COMMUNICATION_FAILURE; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ break; ++ } ++ ++ amount = bh->outreq->actual; ++ if (curlun->file_length - file_offset < amount) { ++ LERROR(curlun, ++ "write %u @ %llu beyond end %llu\n", ++ amount, (unsigned long long) file_offset, ++ (unsigned long long) curlun->file_length); ++ amount = curlun->file_length - file_offset; ++ } ++ ++ /* Don't accept excess data. The spec doesn't say ++ * what to do in this case. We'll ignore the error. ++ */ ++ amount = min(amount, bh->bulk_out_intended_length); ++ ++ /* Don't write a partial block */ ++ amount = round_down(amount, curlun->blksize); ++ if (amount == 0) ++ goto empty_write; ++ ++ /* Perform the write */ ++ file_offset_tmp = file_offset; ++ nwritten = vfs_write(curlun->filp, ++ (char __user *) bh->buf, ++ amount, &file_offset_tmp); ++ VLDBG(curlun, "file write %u @ %llu -> %d\n", amount, ++ (unsigned long long) file_offset, ++ (int) nwritten); ++ if (signal_pending(current)) ++ return -EINTR; // Interrupted! ++ ++ if (nwritten < 0) { ++ LDBG(curlun, "error in file write: %d\n", ++ (int) nwritten); ++ nwritten = 0; ++ } else if (nwritten < amount) { ++ LDBG(curlun, "partial file write: %d/%u\n", ++ (int) nwritten, amount); ++ nwritten = round_down(nwritten, curlun->blksize); ++ } ++ file_offset += nwritten; ++ amount_left_to_write -= nwritten; ++ fsg->residue -= nwritten; ++ ++ /* If an error occurred, report it and its position */ ++ if (nwritten < amount) { ++ curlun->sense_data = SS_WRITE_ERROR; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ break; ++ } ++ ++ empty_write: ++ /* Did the host decide to stop early? */ ++ if (bh->outreq->actual < bh->bulk_out_intended_length) { ++ fsg->short_packet_received = 1; ++ break; ++ } ++ continue; ++ } ++ ++ /* Wait for something to happen */ ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ ++ return -EIO; // No default reply ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int do_synchronize_cache(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int rc; ++ ++ /* We ignore the requested LBA and write out all file's ++ * dirty data buffers. */ ++ rc = fsg_lun_fsync_sub(curlun); ++ if (rc) ++ curlun->sense_data = SS_WRITE_ERROR; ++ return 0; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void invalidate_sub(struct fsg_lun *curlun) ++{ ++ struct file *filp = curlun->filp; ++ struct inode *inode = filp->f_path.dentry->d_inode; ++ unsigned long rc; ++ ++ rc = invalidate_mapping_pages(inode->i_mapping, 0, -1); ++ VLDBG(curlun, "invalidate_mapping_pages -> %ld\n", rc); ++} ++ ++static int do_verify(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u32 lba; ++ u32 verification_length; ++ struct fsg_buffhd *bh = fsg->next_buffhd_to_fill; ++ loff_t file_offset, file_offset_tmp; ++ u32 amount_left; ++ unsigned int amount; ++ ssize_t nread; ++ ++ /* Get the starting Logical Block Address and check that it's ++ * not too big */ ++ lba = get_unaligned_be32(&fsg->cmnd[2]); ++ if (lba >= curlun->num_sectors) { ++ curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ return -EINVAL; ++ } ++ ++ /* We allow DPO (Disable Page Out = don't save data in the ++ * cache) but we don't implement it. */ ++ if ((fsg->cmnd[1] & ~0x10) != 0) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ verification_length = get_unaligned_be16(&fsg->cmnd[7]); ++ if (unlikely(verification_length == 0)) ++ return -EIO; // No default reply ++ ++ /* Prepare to carry out the file verify */ ++ amount_left = verification_length << curlun->blkbits; ++ file_offset = ((loff_t) lba) << curlun->blkbits; ++ ++ /* Write out all the dirty buffers before invalidating them */ ++ fsg_lun_fsync_sub(curlun); ++ if (signal_pending(current)) ++ return -EINTR; ++ ++ invalidate_sub(curlun); ++ if (signal_pending(current)) ++ return -EINTR; ++ ++ /* Just try to read the requested blocks */ ++ while (amount_left > 0) { ++ ++ /* Figure out how much we need to read: ++ * Try to read the remaining amount, but not more than ++ * the buffer size. ++ * And don't try to read past the end of the file. ++ */ ++ amount = min((unsigned int) amount_left, mod_data.buflen); ++ amount = min((loff_t) amount, ++ curlun->file_length - file_offset); ++ if (amount == 0) { ++ curlun->sense_data = ++ SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ break; ++ } ++ ++ /* Perform the read */ ++ file_offset_tmp = file_offset; ++ nread = vfs_read(curlun->filp, ++ (char __user *) bh->buf, ++ amount, &file_offset_tmp); ++ VLDBG(curlun, "file read %u @ %llu -> %d\n", amount, ++ (unsigned long long) file_offset, ++ (int) nread); ++ if (signal_pending(current)) ++ return -EINTR; ++ ++ if (nread < 0) { ++ LDBG(curlun, "error in file verify: %d\n", ++ (int) nread); ++ nread = 0; ++ } else if (nread < amount) { ++ LDBG(curlun, "partial file verify: %d/%u\n", ++ (int) nread, amount); ++ nread = round_down(nread, curlun->blksize); ++ } ++ if (nread == 0) { ++ curlun->sense_data = SS_UNRECOVERED_READ_ERROR; ++ curlun->sense_data_info = file_offset >> curlun->blkbits; ++ curlun->info_valid = 1; ++ break; ++ } ++ file_offset += nread; ++ amount_left -= nread; ++ } ++ return 0; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int do_inquiry(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ u8 *buf = (u8 *) bh->buf; ++ ++ static char vendor_id[] = "Linux "; ++ static char product_disk_id[] = "File-Stor Gadget"; ++ static char product_cdrom_id[] = "File-CD Gadget "; ++ ++ if (!fsg->curlun) { // Unsupported LUNs are okay ++ fsg->bad_lun_okay = 1; ++ memset(buf, 0, 36); ++ buf[0] = 0x7f; // Unsupported, no device-type ++ buf[4] = 31; // Additional length ++ return 36; ++ } ++ ++ memset(buf, 0, 8); ++ buf[0] = (mod_data.cdrom ? TYPE_ROM : TYPE_DISK); ++ if (mod_data.removable) ++ buf[1] = 0x80; ++ buf[2] = 2; // ANSI SCSI level 2 ++ buf[3] = 2; // SCSI-2 INQUIRY data format ++ buf[4] = 31; // Additional length ++ // No special options ++ sprintf(buf + 8, "%-8s%-16s%04x", vendor_id, ++ (mod_data.cdrom ? product_cdrom_id : ++ product_disk_id), ++ mod_data.release); ++ return 36; ++} ++ ++ ++static int do_request_sense(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u8 *buf = (u8 *) bh->buf; ++ u32 sd, sdinfo; ++ int valid; ++ ++ /* ++ * From the SCSI-2 spec., section 7.9 (Unit attention condition): ++ * ++ * If a REQUEST SENSE command is received from an initiator ++ * with a pending unit attention condition (before the target ++ * generates the contingent allegiance condition), then the ++ * target shall either: ++ * a) report any pending sense data and preserve the unit ++ * attention condition on the logical unit, or, ++ * b) report the unit attention condition, may discard any ++ * pending sense data, and clear the unit attention ++ * condition on the logical unit for that initiator. ++ * ++ * FSG normally uses option a); enable this code to use option b). ++ */ ++#if 0 ++ if (curlun && curlun->unit_attention_data != SS_NO_SENSE) { ++ curlun->sense_data = curlun->unit_attention_data; ++ curlun->unit_attention_data = SS_NO_SENSE; ++ } ++#endif ++ ++ if (!curlun) { // Unsupported LUNs are okay ++ fsg->bad_lun_okay = 1; ++ sd = SS_LOGICAL_UNIT_NOT_SUPPORTED; ++ sdinfo = 0; ++ valid = 0; ++ } else { ++ sd = curlun->sense_data; ++ sdinfo = curlun->sense_data_info; ++ valid = curlun->info_valid << 7; ++ curlun->sense_data = SS_NO_SENSE; ++ curlun->sense_data_info = 0; ++ curlun->info_valid = 0; ++ } ++ ++ memset(buf, 0, 18); ++ buf[0] = valid | 0x70; // Valid, current error ++ buf[2] = SK(sd); ++ put_unaligned_be32(sdinfo, &buf[3]); /* Sense information */ ++ buf[7] = 18 - 8; // Additional sense length ++ buf[12] = ASC(sd); ++ buf[13] = ASCQ(sd); ++ return 18; ++} ++ ++ ++static int do_read_capacity(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u32 lba = get_unaligned_be32(&fsg->cmnd[2]); ++ int pmi = fsg->cmnd[8]; ++ u8 *buf = (u8 *) bh->buf; ++ ++ /* Check the PMI and LBA fields */ ++ if (pmi > 1 || (pmi == 0 && lba != 0)) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ put_unaligned_be32(curlun->num_sectors - 1, &buf[0]); ++ /* Max logical block */ ++ put_unaligned_be32(curlun->blksize, &buf[4]); /* Block length */ ++ return 8; ++} ++ ++ ++static int do_read_header(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int msf = fsg->cmnd[1] & 0x02; ++ u32 lba = get_unaligned_be32(&fsg->cmnd[2]); ++ u8 *buf = (u8 *) bh->buf; ++ ++ if ((fsg->cmnd[1] & ~0x02) != 0) { /* Mask away MSF */ ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ if (lba >= curlun->num_sectors) { ++ curlun->sense_data = SS_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE; ++ return -EINVAL; ++ } ++ ++ memset(buf, 0, 8); ++ buf[0] = 0x01; /* 2048 bytes of user data, rest is EC */ ++ store_cdrom_address(&buf[4], msf, lba); ++ return 8; ++} ++ ++ ++static int do_read_toc(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int msf = fsg->cmnd[1] & 0x02; ++ int start_track = fsg->cmnd[6]; ++ u8 *buf = (u8 *) bh->buf; ++ ++ if ((fsg->cmnd[1] & ~0x02) != 0 || /* Mask away MSF */ ++ start_track > 1) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ memset(buf, 0, 20); ++ buf[1] = (20-2); /* TOC data length */ ++ buf[2] = 1; /* First track number */ ++ buf[3] = 1; /* Last track number */ ++ buf[5] = 0x16; /* Data track, copying allowed */ ++ buf[6] = 0x01; /* Only track is number 1 */ ++ store_cdrom_address(&buf[8], msf, 0); ++ ++ buf[13] = 0x16; /* Lead-out track is data */ ++ buf[14] = 0xAA; /* Lead-out track number */ ++ store_cdrom_address(&buf[16], msf, curlun->num_sectors); ++ return 20; ++} ++ ++ ++static int do_mode_sense(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int mscmnd = fsg->cmnd[0]; ++ u8 *buf = (u8 *) bh->buf; ++ u8 *buf0 = buf; ++ int pc, page_code; ++ int changeable_values, all_pages; ++ int valid_page = 0; ++ int len, limit; ++ ++ if ((fsg->cmnd[1] & ~0x08) != 0) { // Mask away DBD ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ pc = fsg->cmnd[2] >> 6; ++ page_code = fsg->cmnd[2] & 0x3f; ++ if (pc == 3) { ++ curlun->sense_data = SS_SAVING_PARAMETERS_NOT_SUPPORTED; ++ return -EINVAL; ++ } ++ changeable_values = (pc == 1); ++ all_pages = (page_code == 0x3f); ++ ++ /* Write the mode parameter header. Fixed values are: default ++ * medium type, no cache control (DPOFUA), and no block descriptors. ++ * The only variable value is the WriteProtect bit. We will fill in ++ * the mode data length later. */ ++ memset(buf, 0, 8); ++ if (mscmnd == MODE_SENSE) { ++ buf[2] = (curlun->ro ? 0x80 : 0x00); // WP, DPOFUA ++ buf += 4; ++ limit = 255; ++ } else { // MODE_SENSE_10 ++ buf[3] = (curlun->ro ? 0x80 : 0x00); // WP, DPOFUA ++ buf += 8; ++ limit = 65535; // Should really be mod_data.buflen ++ } ++ ++ /* No block descriptors */ ++ ++ /* The mode pages, in numerical order. The only page we support ++ * is the Caching page. */ ++ if (page_code == 0x08 || all_pages) { ++ valid_page = 1; ++ buf[0] = 0x08; // Page code ++ buf[1] = 10; // Page length ++ memset(buf+2, 0, 10); // None of the fields are changeable ++ ++ if (!changeable_values) { ++ buf[2] = 0x04; // Write cache enable, ++ // Read cache not disabled ++ // No cache retention priorities ++ put_unaligned_be16(0xffff, &buf[4]); ++ /* Don't disable prefetch */ ++ /* Minimum prefetch = 0 */ ++ put_unaligned_be16(0xffff, &buf[8]); ++ /* Maximum prefetch */ ++ put_unaligned_be16(0xffff, &buf[10]); ++ /* Maximum prefetch ceiling */ ++ } ++ buf += 12; ++ } ++ ++ /* Check that a valid page was requested and the mode data length ++ * isn't too long. */ ++ len = buf - buf0; ++ if (!valid_page || len > limit) { ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ /* Store the mode data length */ ++ if (mscmnd == MODE_SENSE) ++ buf0[0] = len - 1; ++ else ++ put_unaligned_be16(len - 2, buf0); ++ return len; ++} ++ ++ ++static int do_start_stop(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int loej, start; ++ ++ if (!mod_data.removable) { ++ curlun->sense_data = SS_INVALID_COMMAND; ++ return -EINVAL; ++ } ++ ++ // int immed = fsg->cmnd[1] & 0x01; ++ loej = fsg->cmnd[4] & 0x02; ++ start = fsg->cmnd[4] & 0x01; ++ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++ if ((fsg->cmnd[1] & ~0x01) != 0 || // Mask away Immed ++ (fsg->cmnd[4] & ~0x03) != 0) { // Mask LoEj, Start ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ if (!start) { ++ ++ /* Are we allowed to unload the media? */ ++ if (curlun->prevent_medium_removal) { ++ LDBG(curlun, "unload attempt prevented\n"); ++ curlun->sense_data = SS_MEDIUM_REMOVAL_PREVENTED; ++ return -EINVAL; ++ } ++ if (loej) { // Simulate an unload/eject ++ up_read(&fsg->filesem); ++ down_write(&fsg->filesem); ++ fsg_lun_close(curlun); ++ up_write(&fsg->filesem); ++ down_read(&fsg->filesem); ++ } ++ } else { ++ ++ /* Our emulation doesn't support mounting; the medium is ++ * available for use as soon as it is loaded. */ ++ if (!fsg_lun_is_open(curlun)) { ++ curlun->sense_data = SS_MEDIUM_NOT_PRESENT; ++ return -EINVAL; ++ } ++ } ++#endif ++ return 0; ++} ++ ++ ++static int do_prevent_allow(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ int prevent; ++ ++ if (!mod_data.removable) { ++ curlun->sense_data = SS_INVALID_COMMAND; ++ return -EINVAL; ++ } ++ ++ prevent = fsg->cmnd[4] & 0x01; ++ if ((fsg->cmnd[4] & ~0x01) != 0) { // Mask away Prevent ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ ++ if (curlun->prevent_medium_removal && !prevent) ++ fsg_lun_fsync_sub(curlun); ++ curlun->prevent_medium_removal = prevent; ++ return 0; ++} ++ ++ ++static int do_read_format_capacities(struct fsg_dev *fsg, ++ struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ u8 *buf = (u8 *) bh->buf; ++ ++ buf[0] = buf[1] = buf[2] = 0; ++ buf[3] = 8; // Only the Current/Maximum Capacity Descriptor ++ buf += 4; ++ ++ put_unaligned_be32(curlun->num_sectors, &buf[0]); ++ /* Number of blocks */ ++ put_unaligned_be32(curlun->blksize, &buf[4]); /* Block length */ ++ buf[4] = 0x02; /* Current capacity */ ++ return 12; ++} ++ ++ ++static int do_mode_select(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ ++ /* We don't support MODE SELECT */ ++ curlun->sense_data = SS_INVALID_COMMAND; ++ return -EINVAL; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int halt_bulk_in_endpoint(struct fsg_dev *fsg) ++{ ++ int rc; ++ ++ rc = fsg_set_halt(fsg, fsg->bulk_in); ++ if (rc == -EAGAIN) ++ VDBG(fsg, "delayed bulk-in endpoint halt\n"); ++ while (rc != 0) { ++ if (rc != -EAGAIN) { ++ WARNING(fsg, "usb_ep_set_halt -> %d\n", rc); ++ rc = 0; ++ break; ++ } ++ ++ /* Wait for a short time and then try again */ ++ if (msleep_interruptible(100) != 0) ++ return -EINTR; ++ rc = usb_ep_set_halt(fsg->bulk_in); ++ } ++ return rc; ++} ++ ++static int wedge_bulk_in_endpoint(struct fsg_dev *fsg) ++{ ++ int rc; ++ ++ DBG(fsg, "bulk-in set wedge\n"); ++ rc = usb_ep_set_wedge(fsg->bulk_in); ++ if (rc == -EAGAIN) ++ VDBG(fsg, "delayed bulk-in endpoint wedge\n"); ++ while (rc != 0) { ++ if (rc != -EAGAIN) { ++ WARNING(fsg, "usb_ep_set_wedge -> %d\n", rc); ++ rc = 0; ++ break; ++ } ++ ++ /* Wait for a short time and then try again */ ++ if (msleep_interruptible(100) != 0) ++ return -EINTR; ++ rc = usb_ep_set_wedge(fsg->bulk_in); ++ } ++ return rc; ++} ++ ++static int throw_away_data(struct fsg_dev *fsg) ++{ ++ struct fsg_buffhd *bh; ++ u32 amount; ++ int rc; ++ ++ while ((bh = fsg->next_buffhd_to_drain)->state != BUF_STATE_EMPTY || ++ fsg->usb_amount_left > 0) { ++ ++ /* Throw away the data in a filled buffer */ ++ if (bh->state == BUF_STATE_FULL) { ++ smp_rmb(); ++ bh->state = BUF_STATE_EMPTY; ++ fsg->next_buffhd_to_drain = bh->next; ++ ++ /* A short packet or an error ends everything */ ++ if (bh->outreq->actual < bh->bulk_out_intended_length || ++ bh->outreq->status != 0) { ++ raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT); ++ return -EINTR; ++ } ++ continue; ++ } ++ ++ /* Try to submit another request if we need one */ ++ bh = fsg->next_buffhd_to_fill; ++ if (bh->state == BUF_STATE_EMPTY && fsg->usb_amount_left > 0) { ++ amount = min(fsg->usb_amount_left, ++ (u32) mod_data.buflen); ++ ++ /* Except at the end of the transfer, amount will be ++ * equal to the buffer size, which is divisible by ++ * the bulk-out maxpacket size. ++ */ ++ set_bulk_out_req_length(fsg, bh, amount); ++ start_transfer(fsg, fsg->bulk_out, bh->outreq, ++ &bh->outreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ fsg->usb_amount_left -= amount; ++ continue; ++ } ++ ++ /* Otherwise wait for something to happen */ ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ return 0; ++} ++ ++ ++static int finish_reply(struct fsg_dev *fsg) ++{ ++ struct fsg_buffhd *bh = fsg->next_buffhd_to_fill; ++ int rc = 0; ++ ++ switch (fsg->data_dir) { ++ case DATA_DIR_NONE: ++ break; // Nothing to send ++ ++ /* If we don't know whether the host wants to read or write, ++ * this must be CB or CBI with an unknown command. We mustn't ++ * try to send or receive any data. So stall both bulk pipes ++ * if we can and wait for a reset. */ ++ case DATA_DIR_UNKNOWN: ++ if (mod_data.can_stall) { ++ fsg_set_halt(fsg, fsg->bulk_out); ++ rc = halt_bulk_in_endpoint(fsg); ++ } ++ break; ++ ++ /* All but the last buffer of data must have already been sent */ ++ case DATA_DIR_TO_HOST: ++ if (fsg->data_size == 0) ++ ; // Nothing to send ++ ++ /* If there's no residue, simply send the last buffer */ ++ else if (fsg->residue == 0) { ++ bh->inreq->zero = 0; ++ start_transfer(fsg, fsg->bulk_in, bh->inreq, ++ &bh->inreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ } ++ ++ /* There is a residue. For CB and CBI, simply mark the end ++ * of the data with a short packet. However, if we are ++ * allowed to stall, there was no data at all (residue == ++ * data_size), and the command failed (invalid LUN or ++ * sense data is set), then halt the bulk-in endpoint ++ * instead. */ ++ else if (!transport_is_bbb()) { ++ if (mod_data.can_stall && ++ fsg->residue == fsg->data_size && ++ (!fsg->curlun || fsg->curlun->sense_data != SS_NO_SENSE)) { ++ bh->state = BUF_STATE_EMPTY; ++ rc = halt_bulk_in_endpoint(fsg); ++ } else { ++ bh->inreq->zero = 1; ++ start_transfer(fsg, fsg->bulk_in, bh->inreq, ++ &bh->inreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ } ++ } ++ ++ /* ++ * For Bulk-only, mark the end of the data with a short ++ * packet. If we are allowed to stall, halt the bulk-in ++ * endpoint. (Note: This violates the Bulk-Only Transport ++ * specification, which requires us to pad the data if we ++ * don't halt the endpoint. Presumably nobody will mind.) ++ */ ++ else { ++ bh->inreq->zero = 1; ++ start_transfer(fsg, fsg->bulk_in, bh->inreq, ++ &bh->inreq_busy, &bh->state); ++ fsg->next_buffhd_to_fill = bh->next; ++ if (mod_data.can_stall) ++ rc = halt_bulk_in_endpoint(fsg); ++ } ++ break; ++ ++ /* We have processed all we want from the data the host has sent. ++ * There may still be outstanding bulk-out requests. */ ++ case DATA_DIR_FROM_HOST: ++ if (fsg->residue == 0) ++ ; // Nothing to receive ++ ++ /* Did the host stop sending unexpectedly early? */ ++ else if (fsg->short_packet_received) { ++ raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT); ++ rc = -EINTR; ++ } ++ ++ /* We haven't processed all the incoming data. Even though ++ * we may be allowed to stall, doing so would cause a race. ++ * The controller may already have ACK'ed all the remaining ++ * bulk-out packets, in which case the host wouldn't see a ++ * STALL. Not realizing the endpoint was halted, it wouldn't ++ * clear the halt -- leading to problems later on. */ ++#if 0 ++ else if (mod_data.can_stall) { ++ fsg_set_halt(fsg, fsg->bulk_out); ++ raise_exception(fsg, FSG_STATE_ABORT_BULK_OUT); ++ rc = -EINTR; ++ } ++#endif ++ ++ /* We can't stall. Read in the excess data and throw it ++ * all away. */ ++ else ++ rc = throw_away_data(fsg); ++ break; ++ } ++ return rc; ++} ++ ++ ++static int send_status(struct fsg_dev *fsg) ++{ ++ struct fsg_lun *curlun = fsg->curlun; ++ struct fsg_buffhd *bh; ++ int rc; ++ u8 status = US_BULK_STAT_OK; ++ u32 sd, sdinfo = 0; ++ ++ /* Wait for the next buffer to become available */ ++ bh = fsg->next_buffhd_to_fill; ++ while (bh->state != BUF_STATE_EMPTY) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ ++ if (curlun) { ++ sd = curlun->sense_data; ++ sdinfo = curlun->sense_data_info; ++ } else if (fsg->bad_lun_okay) ++ sd = SS_NO_SENSE; ++ else ++ sd = SS_LOGICAL_UNIT_NOT_SUPPORTED; ++ ++ if (fsg->phase_error) { ++ DBG(fsg, "sending phase-error status\n"); ++ status = US_BULK_STAT_PHASE; ++ sd = SS_INVALID_COMMAND; ++ } else if (sd != SS_NO_SENSE) { ++ DBG(fsg, "sending command-failure status\n"); ++ status = US_BULK_STAT_FAIL; ++ VDBG(fsg, " sense data: SK x%02x, ASC x%02x, ASCQ x%02x;" ++ " info x%x\n", ++ SK(sd), ASC(sd), ASCQ(sd), sdinfo); ++ } ++ ++ if (transport_is_bbb()) { ++ struct bulk_cs_wrap *csw = bh->buf; ++ ++ /* Store and send the Bulk-only CSW */ ++ csw->Signature = cpu_to_le32(US_BULK_CS_SIGN); ++ csw->Tag = fsg->tag; ++ csw->Residue = cpu_to_le32(fsg->residue); ++ csw->Status = status; ++ ++ bh->inreq->length = US_BULK_CS_WRAP_LEN; ++ bh->inreq->zero = 0; ++ start_transfer(fsg, fsg->bulk_in, bh->inreq, ++ &bh->inreq_busy, &bh->state); ++ ++ } else if (mod_data.transport_type == USB_PR_CB) { ++ ++ /* Control-Bulk transport has no status phase! */ ++ return 0; ++ ++ } else { // USB_PR_CBI ++ struct interrupt_data *buf = bh->buf; ++ ++ /* Store and send the Interrupt data. UFI sends the ASC ++ * and ASCQ bytes. Everything else sends a Type (which ++ * is always 0) and the status Value. */ ++ if (mod_data.protocol_type == USB_SC_UFI) { ++ buf->bType = ASC(sd); ++ buf->bValue = ASCQ(sd); ++ } else { ++ buf->bType = 0; ++ buf->bValue = status; ++ } ++ fsg->intreq->length = CBI_INTERRUPT_DATA_LEN; ++ ++ fsg->intr_buffhd = bh; // Point to the right buffhd ++ fsg->intreq->buf = bh->inreq->buf; ++ fsg->intreq->context = bh; ++ start_transfer(fsg, fsg->intr_in, fsg->intreq, ++ &fsg->intreq_busy, &bh->state); ++ } ++ ++ fsg->next_buffhd_to_fill = bh->next; ++ return 0; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Check whether the command is properly formed and whether its data size ++ * and direction agree with the values we already have. */ ++static int check_command(struct fsg_dev *fsg, int cmnd_size, ++ enum data_direction data_dir, unsigned int mask, ++ int needs_medium, const char *name) ++{ ++ int i; ++ int lun = fsg->cmnd[1] >> 5; ++ static const char dirletter[4] = {'u', 'o', 'i', 'n'}; ++ char hdlen[20]; ++ struct fsg_lun *curlun; ++ ++ /* Adjust the expected cmnd_size for protocol encapsulation padding. ++ * Transparent SCSI doesn't pad. */ ++ if (protocol_is_scsi()) ++ ; ++ ++ /* There's some disagreement as to whether RBC pads commands or not. ++ * We'll play it safe and accept either form. */ ++ else if (mod_data.protocol_type == USB_SC_RBC) { ++ if (fsg->cmnd_size == 12) ++ cmnd_size = 12; ++ ++ /* All the other protocols pad to 12 bytes */ ++ } else ++ cmnd_size = 12; ++ ++ hdlen[0] = 0; ++ if (fsg->data_dir != DATA_DIR_UNKNOWN) ++ sprintf(hdlen, ", H%c=%u", dirletter[(int) fsg->data_dir], ++ fsg->data_size); ++ VDBG(fsg, "SCSI command: %s; Dc=%d, D%c=%u; Hc=%d%s\n", ++ name, cmnd_size, dirletter[(int) data_dir], ++ fsg->data_size_from_cmnd, fsg->cmnd_size, hdlen); ++ ++ /* We can't reply at all until we know the correct data direction ++ * and size. */ ++ if (fsg->data_size_from_cmnd == 0) ++ data_dir = DATA_DIR_NONE; ++ if (fsg->data_dir == DATA_DIR_UNKNOWN) { // CB or CBI ++ fsg->data_dir = data_dir; ++ fsg->data_size = fsg->data_size_from_cmnd; ++ ++ } else { // Bulk-only ++ if (fsg->data_size < fsg->data_size_from_cmnd) { ++ ++ /* Host data size < Device data size is a phase error. ++ * Carry out the command, but only transfer as much ++ * as we are allowed. */ ++ fsg->data_size_from_cmnd = fsg->data_size; ++ fsg->phase_error = 1; ++ } ++ } ++ fsg->residue = fsg->usb_amount_left = fsg->data_size; ++ ++ /* Conflicting data directions is a phase error */ ++ if (fsg->data_dir != data_dir && fsg->data_size_from_cmnd > 0) { ++ fsg->phase_error = 1; ++ return -EINVAL; ++ } ++ ++ /* Verify the length of the command itself */ ++ if (cmnd_size != fsg->cmnd_size) { ++ ++ /* Special case workaround: There are plenty of buggy SCSI ++ * implementations. Many have issues with cbw->Length ++ * field passing a wrong command size. For those cases we ++ * always try to work around the problem by using the length ++ * sent by the host side provided it is at least as large ++ * as the correct command length. ++ * Examples of such cases would be MS-Windows, which issues ++ * REQUEST SENSE with cbw->Length == 12 where it should ++ * be 6, and xbox360 issuing INQUIRY, TEST UNIT READY and ++ * REQUEST SENSE with cbw->Length == 10 where it should ++ * be 6 as well. ++ */ ++ if (cmnd_size <= fsg->cmnd_size) { ++ DBG(fsg, "%s is buggy! Expected length %d " ++ "but we got %d\n", name, ++ cmnd_size, fsg->cmnd_size); ++ cmnd_size = fsg->cmnd_size; ++ } else { ++ fsg->phase_error = 1; ++ return -EINVAL; ++ } ++ } ++ ++ /* Check that the LUN values are consistent */ ++ if (transport_is_bbb()) { ++ if (fsg->lun != lun) ++ DBG(fsg, "using LUN %d from CBW, " ++ "not LUN %d from CDB\n", ++ fsg->lun, lun); ++ } ++ ++ /* Check the LUN */ ++ curlun = fsg->curlun; ++ if (curlun) { ++ if (fsg->cmnd[0] != REQUEST_SENSE) { ++ curlun->sense_data = SS_NO_SENSE; ++ curlun->sense_data_info = 0; ++ curlun->info_valid = 0; ++ } ++ } else { ++ fsg->bad_lun_okay = 0; ++ ++ /* INQUIRY and REQUEST SENSE commands are explicitly allowed ++ * to use unsupported LUNs; all others may not. */ ++ if (fsg->cmnd[0] != INQUIRY && ++ fsg->cmnd[0] != REQUEST_SENSE) { ++ DBG(fsg, "unsupported LUN %d\n", fsg->lun); ++ return -EINVAL; ++ } ++ } ++ ++ /* If a unit attention condition exists, only INQUIRY and ++ * REQUEST SENSE commands are allowed; anything else must fail. */ ++ if (curlun && curlun->unit_attention_data != SS_NO_SENSE && ++ fsg->cmnd[0] != INQUIRY && ++ fsg->cmnd[0] != REQUEST_SENSE) { ++ curlun->sense_data = curlun->unit_attention_data; ++ curlun->unit_attention_data = SS_NO_SENSE; ++ return -EINVAL; ++ } ++ ++ /* Check that only command bytes listed in the mask are non-zero */ ++ fsg->cmnd[1] &= 0x1f; // Mask away the LUN ++ for (i = 1; i < cmnd_size; ++i) { ++ if (fsg->cmnd[i] && !(mask & (1 << i))) { ++ if (curlun) ++ curlun->sense_data = SS_INVALID_FIELD_IN_CDB; ++ return -EINVAL; ++ } ++ } ++ ++ /* If the medium isn't mounted and the command needs to access ++ * it, return an error. */ ++ if (curlun && !fsg_lun_is_open(curlun) && needs_medium) { ++ curlun->sense_data = SS_MEDIUM_NOT_PRESENT; ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/* wrapper of check_command for data size in blocks handling */ ++static int check_command_size_in_blocks(struct fsg_dev *fsg, int cmnd_size, ++ enum data_direction data_dir, unsigned int mask, ++ int needs_medium, const char *name) ++{ ++ if (fsg->curlun) ++ fsg->data_size_from_cmnd <<= fsg->curlun->blkbits; ++ return check_command(fsg, cmnd_size, data_dir, ++ mask, needs_medium, name); ++} ++ ++static int do_scsi_command(struct fsg_dev *fsg) ++{ ++ struct fsg_buffhd *bh; ++ int rc; ++ int reply = -EINVAL; ++ int i; ++ static char unknown[16]; ++ ++ dump_cdb(fsg); ++ ++ /* Wait for the next buffer to become available for data or status */ ++ bh = fsg->next_buffhd_to_drain = fsg->next_buffhd_to_fill; ++ while (bh->state != BUF_STATE_EMPTY) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ fsg->phase_error = 0; ++ fsg->short_packet_received = 0; ++ ++ down_read(&fsg->filesem); // We're using the backing file ++ switch (fsg->cmnd[0]) { ++ ++ case INQUIRY: ++ fsg->data_size_from_cmnd = fsg->cmnd[4]; ++ if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST, ++ (1<<4), 0, ++ "INQUIRY")) == 0) ++ reply = do_inquiry(fsg, bh); ++ break; ++ ++ case MODE_SELECT: ++ fsg->data_size_from_cmnd = fsg->cmnd[4]; ++ if ((reply = check_command(fsg, 6, DATA_DIR_FROM_HOST, ++ (1<<1) | (1<<4), 0, ++ "MODE SELECT(6)")) == 0) ++ reply = do_mode_select(fsg, bh); ++ break; ++ ++ case MODE_SELECT_10: ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command(fsg, 10, DATA_DIR_FROM_HOST, ++ (1<<1) | (3<<7), 0, ++ "MODE SELECT(10)")) == 0) ++ reply = do_mode_select(fsg, bh); ++ break; ++ ++ case MODE_SENSE: ++ fsg->data_size_from_cmnd = fsg->cmnd[4]; ++ if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST, ++ (1<<1) | (1<<2) | (1<<4), 0, ++ "MODE SENSE(6)")) == 0) ++ reply = do_mode_sense(fsg, bh); ++ break; ++ ++ case MODE_SENSE_10: ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, ++ (1<<1) | (1<<2) | (3<<7), 0, ++ "MODE SENSE(10)")) == 0) ++ reply = do_mode_sense(fsg, bh); ++ break; ++ ++ case ALLOW_MEDIUM_REMOVAL: ++ fsg->data_size_from_cmnd = 0; ++ if ((reply = check_command(fsg, 6, DATA_DIR_NONE, ++ (1<<4), 0, ++ "PREVENT-ALLOW MEDIUM REMOVAL")) == 0) ++ reply = do_prevent_allow(fsg); ++ break; ++ ++ case READ_6: ++ i = fsg->cmnd[4]; ++ fsg->data_size_from_cmnd = (i == 0) ? 256 : i; ++ if ((reply = check_command_size_in_blocks(fsg, 6, ++ DATA_DIR_TO_HOST, ++ (7<<1) | (1<<4), 1, ++ "READ(6)")) == 0) ++ reply = do_read(fsg); ++ break; ++ ++ case READ_10: ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command_size_in_blocks(fsg, 10, ++ DATA_DIR_TO_HOST, ++ (1<<1) | (0xf<<2) | (3<<7), 1, ++ "READ(10)")) == 0) ++ reply = do_read(fsg); ++ break; ++ ++ case READ_12: ++ fsg->data_size_from_cmnd = get_unaligned_be32(&fsg->cmnd[6]); ++ if ((reply = check_command_size_in_blocks(fsg, 12, ++ DATA_DIR_TO_HOST, ++ (1<<1) | (0xf<<2) | (0xf<<6), 1, ++ "READ(12)")) == 0) ++ reply = do_read(fsg); ++ break; ++ ++ case READ_CAPACITY: ++ fsg->data_size_from_cmnd = 8; ++ if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, ++ (0xf<<2) | (1<<8), 1, ++ "READ CAPACITY")) == 0) ++ reply = do_read_capacity(fsg, bh); ++ break; ++ ++ case READ_HEADER: ++ if (!mod_data.cdrom) ++ goto unknown_cmnd; ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, ++ (3<<7) | (0x1f<<1), 1, ++ "READ HEADER")) == 0) ++ reply = do_read_header(fsg, bh); ++ break; ++ ++ case READ_TOC: ++ if (!mod_data.cdrom) ++ goto unknown_cmnd; ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, ++ (7<<6) | (1<<1), 1, ++ "READ TOC")) == 0) ++ reply = do_read_toc(fsg, bh); ++ break; ++ ++ case READ_FORMAT_CAPACITIES: ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command(fsg, 10, DATA_DIR_TO_HOST, ++ (3<<7), 1, ++ "READ FORMAT CAPACITIES")) == 0) ++ reply = do_read_format_capacities(fsg, bh); ++ break; ++ ++ case REQUEST_SENSE: ++ fsg->data_size_from_cmnd = fsg->cmnd[4]; ++ if ((reply = check_command(fsg, 6, DATA_DIR_TO_HOST, ++ (1<<4), 0, ++ "REQUEST SENSE")) == 0) ++ reply = do_request_sense(fsg, bh); ++ break; ++ ++ case START_STOP: ++ fsg->data_size_from_cmnd = 0; ++ if ((reply = check_command(fsg, 6, DATA_DIR_NONE, ++ (1<<1) | (1<<4), 0, ++ "START-STOP UNIT")) == 0) ++ reply = do_start_stop(fsg); ++ break; ++ ++ case SYNCHRONIZE_CACHE: ++ fsg->data_size_from_cmnd = 0; ++ if ((reply = check_command(fsg, 10, DATA_DIR_NONE, ++ (0xf<<2) | (3<<7), 1, ++ "SYNCHRONIZE CACHE")) == 0) ++ reply = do_synchronize_cache(fsg); ++ break; ++ ++ case TEST_UNIT_READY: ++ fsg->data_size_from_cmnd = 0; ++ reply = check_command(fsg, 6, DATA_DIR_NONE, ++ 0, 1, ++ "TEST UNIT READY"); ++ break; ++ ++ /* Although optional, this command is used by MS-Windows. We ++ * support a minimal version: BytChk must be 0. */ ++ case VERIFY: ++ fsg->data_size_from_cmnd = 0; ++ if ((reply = check_command(fsg, 10, DATA_DIR_NONE, ++ (1<<1) | (0xf<<2) | (3<<7), 1, ++ "VERIFY")) == 0) ++ reply = do_verify(fsg); ++ break; ++ ++ case WRITE_6: ++ i = fsg->cmnd[4]; ++ fsg->data_size_from_cmnd = (i == 0) ? 256 : i; ++ if ((reply = check_command_size_in_blocks(fsg, 6, ++ DATA_DIR_FROM_HOST, ++ (7<<1) | (1<<4), 1, ++ "WRITE(6)")) == 0) ++ reply = do_write(fsg); ++ break; ++ ++ case WRITE_10: ++ fsg->data_size_from_cmnd = get_unaligned_be16(&fsg->cmnd[7]); ++ if ((reply = check_command_size_in_blocks(fsg, 10, ++ DATA_DIR_FROM_HOST, ++ (1<<1) | (0xf<<2) | (3<<7), 1, ++ "WRITE(10)")) == 0) ++ reply = do_write(fsg); ++ break; ++ ++ case WRITE_12: ++ fsg->data_size_from_cmnd = get_unaligned_be32(&fsg->cmnd[6]); ++ if ((reply = check_command_size_in_blocks(fsg, 12, ++ DATA_DIR_FROM_HOST, ++ (1<<1) | (0xf<<2) | (0xf<<6), 1, ++ "WRITE(12)")) == 0) ++ reply = do_write(fsg); ++ break; ++ ++ /* Some mandatory commands that we recognize but don't implement. ++ * They don't mean much in this setting. It's left as an exercise ++ * for anyone interested to implement RESERVE and RELEASE in terms ++ * of Posix locks. */ ++ case FORMAT_UNIT: ++ case RELEASE: ++ case RESERVE: ++ case SEND_DIAGNOSTIC: ++ // Fall through ++ ++ default: ++ unknown_cmnd: ++ fsg->data_size_from_cmnd = 0; ++ sprintf(unknown, "Unknown x%02x", fsg->cmnd[0]); ++ if ((reply = check_command(fsg, fsg->cmnd_size, ++ DATA_DIR_UNKNOWN, ~0, 0, unknown)) == 0) { ++ fsg->curlun->sense_data = SS_INVALID_COMMAND; ++ reply = -EINVAL; ++ } ++ break; ++ } ++ up_read(&fsg->filesem); ++ ++ if (reply == -EINTR || signal_pending(current)) ++ return -EINTR; ++ ++ /* Set up the single reply buffer for finish_reply() */ ++ if (reply == -EINVAL) ++ reply = 0; // Error reply length ++ if (reply >= 0 && fsg->data_dir == DATA_DIR_TO_HOST) { ++ reply = min((u32) reply, fsg->data_size_from_cmnd); ++ bh->inreq->length = reply; ++ bh->state = BUF_STATE_FULL; ++ fsg->residue -= reply; ++ } // Otherwise it's already set ++ ++ return 0; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int received_cbw(struct fsg_dev *fsg, struct fsg_buffhd *bh) ++{ ++ struct usb_request *req = bh->outreq; ++ struct bulk_cb_wrap *cbw = req->buf; ++ ++ /* Was this a real packet? Should it be ignored? */ ++ if (req->status || test_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags)) ++ return -EINVAL; ++ ++ /* Is the CBW valid? */ ++ if (req->actual != US_BULK_CB_WRAP_LEN || ++ cbw->Signature != cpu_to_le32( ++ US_BULK_CB_SIGN)) { ++ DBG(fsg, "invalid CBW: len %u sig 0x%x\n", ++ req->actual, ++ le32_to_cpu(cbw->Signature)); ++ ++ /* The Bulk-only spec says we MUST stall the IN endpoint ++ * (6.6.1), so it's unavoidable. It also says we must ++ * retain this state until the next reset, but there's ++ * no way to tell the controller driver it should ignore ++ * Clear-Feature(HALT) requests. ++ * ++ * We aren't required to halt the OUT endpoint; instead ++ * we can simply accept and discard any data received ++ * until the next reset. */ ++ wedge_bulk_in_endpoint(fsg); ++ set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); ++ return -EINVAL; ++ } ++ ++ /* Is the CBW meaningful? */ ++ if (cbw->Lun >= FSG_MAX_LUNS || cbw->Flags & ~US_BULK_FLAG_IN || ++ cbw->Length <= 0 || cbw->Length > MAX_COMMAND_SIZE) { ++ DBG(fsg, "non-meaningful CBW: lun = %u, flags = 0x%x, " ++ "cmdlen %u\n", ++ cbw->Lun, cbw->Flags, cbw->Length); ++ ++ /* We can do anything we want here, so let's stall the ++ * bulk pipes if we are allowed to. */ ++ if (mod_data.can_stall) { ++ fsg_set_halt(fsg, fsg->bulk_out); ++ halt_bulk_in_endpoint(fsg); ++ } ++ return -EINVAL; ++ } ++ ++ /* Save the command for later */ ++ fsg->cmnd_size = cbw->Length; ++ memcpy(fsg->cmnd, cbw->CDB, fsg->cmnd_size); ++ if (cbw->Flags & US_BULK_FLAG_IN) ++ fsg->data_dir = DATA_DIR_TO_HOST; ++ else ++ fsg->data_dir = DATA_DIR_FROM_HOST; ++ fsg->data_size = le32_to_cpu(cbw->DataTransferLength); ++ if (fsg->data_size == 0) ++ fsg->data_dir = DATA_DIR_NONE; ++ fsg->lun = cbw->Lun; ++ fsg->tag = cbw->Tag; ++ return 0; ++} ++ ++ ++static int get_next_command(struct fsg_dev *fsg) ++{ ++ struct fsg_buffhd *bh; ++ int rc = 0; ++ ++ if (transport_is_bbb()) { ++ ++ /* Wait for the next buffer to become available */ ++ bh = fsg->next_buffhd_to_fill; ++ while (bh->state != BUF_STATE_EMPTY) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ ++ /* Queue a request to read a Bulk-only CBW */ ++ set_bulk_out_req_length(fsg, bh, US_BULK_CB_WRAP_LEN); ++ start_transfer(fsg, fsg->bulk_out, bh->outreq, ++ &bh->outreq_busy, &bh->state); ++ ++ /* We will drain the buffer in software, which means we ++ * can reuse it for the next filling. No need to advance ++ * next_buffhd_to_fill. */ ++ ++ /* Wait for the CBW to arrive */ ++ while (bh->state != BUF_STATE_FULL) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ smp_rmb(); ++ rc = received_cbw(fsg, bh); ++ bh->state = BUF_STATE_EMPTY; ++ ++ } else { // USB_PR_CB or USB_PR_CBI ++ ++ /* Wait for the next command to arrive */ ++ while (fsg->cbbuf_cmnd_size == 0) { ++ rc = sleep_thread(fsg); ++ if (rc) ++ return rc; ++ } ++ ++ /* Is the previous status interrupt request still busy? ++ * The host is allowed to skip reading the status, ++ * so we must cancel it. */ ++ if (fsg->intreq_busy) ++ usb_ep_dequeue(fsg->intr_in, fsg->intreq); ++ ++ /* Copy the command and mark the buffer empty */ ++ fsg->data_dir = DATA_DIR_UNKNOWN; ++ spin_lock_irq(&fsg->lock); ++ fsg->cmnd_size = fsg->cbbuf_cmnd_size; ++ memcpy(fsg->cmnd, fsg->cbbuf_cmnd, fsg->cmnd_size); ++ fsg->cbbuf_cmnd_size = 0; ++ spin_unlock_irq(&fsg->lock); ++ ++ /* Use LUN from the command */ ++ fsg->lun = fsg->cmnd[1] >> 5; ++ } ++ ++ /* Update current lun */ ++ if (fsg->lun >= 0 && fsg->lun < fsg->nluns) ++ fsg->curlun = &fsg->luns[fsg->lun]; ++ else ++ fsg->curlun = NULL; ++ ++ return rc; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int enable_endpoint(struct fsg_dev *fsg, struct usb_ep *ep, ++ const struct usb_endpoint_descriptor *d) ++{ ++ int rc; ++ ++ ep->driver_data = fsg; ++ ep->desc = d; ++ rc = usb_ep_enable(ep); ++ if (rc) ++ ERROR(fsg, "can't enable %s, result %d\n", ep->name, rc); ++ return rc; ++} ++ ++static int alloc_request(struct fsg_dev *fsg, struct usb_ep *ep, ++ struct usb_request **preq) ++{ ++ *preq = usb_ep_alloc_request(ep, GFP_ATOMIC); ++ if (*preq) ++ return 0; ++ ERROR(fsg, "can't allocate request for %s\n", ep->name); ++ return -ENOMEM; ++} ++ ++/* ++ * Reset interface setting and re-init endpoint state (toggle etc). ++ * Call with altsetting < 0 to disable the interface. The only other ++ * available altsetting is 0, which enables the interface. ++ */ ++static int do_set_interface(struct fsg_dev *fsg, int altsetting) ++{ ++ int rc = 0; ++ int i; ++ const struct usb_endpoint_descriptor *d; ++ ++ if (fsg->running) ++ DBG(fsg, "reset interface\n"); ++ ++reset: ++ /* Deallocate the requests */ ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ struct fsg_buffhd *bh = &fsg->buffhds[i]; ++ ++ if (bh->inreq) { ++ usb_ep_free_request(fsg->bulk_in, bh->inreq); ++ bh->inreq = NULL; ++ } ++ if (bh->outreq) { ++ usb_ep_free_request(fsg->bulk_out, bh->outreq); ++ bh->outreq = NULL; ++ } ++ } ++ if (fsg->intreq) { ++ usb_ep_free_request(fsg->intr_in, fsg->intreq); ++ fsg->intreq = NULL; ++ } ++ ++ /* Disable the endpoints */ ++ if (fsg->bulk_in_enabled) { ++ usb_ep_disable(fsg->bulk_in); ++ fsg->bulk_in_enabled = 0; ++ } ++ if (fsg->bulk_out_enabled) { ++ usb_ep_disable(fsg->bulk_out); ++ fsg->bulk_out_enabled = 0; ++ } ++ if (fsg->intr_in_enabled) { ++ usb_ep_disable(fsg->intr_in); ++ fsg->intr_in_enabled = 0; ++ } ++ ++ fsg->running = 0; ++ if (altsetting < 0 || rc != 0) ++ return rc; ++ ++ DBG(fsg, "set interface %d\n", altsetting); ++ ++ /* Enable the endpoints */ ++ d = fsg_ep_desc(fsg->gadget, ++ &fsg_fs_bulk_in_desc, &fsg_hs_bulk_in_desc, ++ &fsg_ss_bulk_in_desc); ++ if ((rc = enable_endpoint(fsg, fsg->bulk_in, d)) != 0) ++ goto reset; ++ fsg->bulk_in_enabled = 1; ++ ++ d = fsg_ep_desc(fsg->gadget, ++ &fsg_fs_bulk_out_desc, &fsg_hs_bulk_out_desc, ++ &fsg_ss_bulk_out_desc); ++ if ((rc = enable_endpoint(fsg, fsg->bulk_out, d)) != 0) ++ goto reset; ++ fsg->bulk_out_enabled = 1; ++ fsg->bulk_out_maxpacket = usb_endpoint_maxp(d); ++ clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); ++ ++ if (transport_is_cbi()) { ++ d = fsg_ep_desc(fsg->gadget, ++ &fsg_fs_intr_in_desc, &fsg_hs_intr_in_desc, ++ &fsg_ss_intr_in_desc); ++ if ((rc = enable_endpoint(fsg, fsg->intr_in, d)) != 0) ++ goto reset; ++ fsg->intr_in_enabled = 1; ++ } ++ ++ /* Allocate the requests */ ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ struct fsg_buffhd *bh = &fsg->buffhds[i]; ++ ++ if ((rc = alloc_request(fsg, fsg->bulk_in, &bh->inreq)) != 0) ++ goto reset; ++ if ((rc = alloc_request(fsg, fsg->bulk_out, &bh->outreq)) != 0) ++ goto reset; ++ bh->inreq->buf = bh->outreq->buf = bh->buf; ++ bh->inreq->context = bh->outreq->context = bh; ++ bh->inreq->complete = bulk_in_complete; ++ bh->outreq->complete = bulk_out_complete; ++ } ++ if (transport_is_cbi()) { ++ if ((rc = alloc_request(fsg, fsg->intr_in, &fsg->intreq)) != 0) ++ goto reset; ++ fsg->intreq->complete = intr_in_complete; ++ } ++ ++ fsg->running = 1; ++ for (i = 0; i < fsg->nluns; ++i) ++ fsg->luns[i].unit_attention_data = SS_RESET_OCCURRED; ++ return rc; ++} ++ ++ ++/* ++ * Change our operational configuration. This code must agree with the code ++ * that returns config descriptors, and with interface altsetting code. ++ * ++ * It's also responsible for power management interactions. Some ++ * configurations might not work with our current power sources. ++ * For now we just assume the gadget is always self-powered. ++ */ ++static int do_set_config(struct fsg_dev *fsg, u8 new_config) ++{ ++ int rc = 0; ++ ++ /* Disable the single interface */ ++ if (fsg->config != 0) { ++ DBG(fsg, "reset config\n"); ++ fsg->config = 0; ++ rc = do_set_interface(fsg, -1); ++ } ++ ++ /* Enable the interface */ ++ if (new_config != 0) { ++ fsg->config = new_config; ++ if ((rc = do_set_interface(fsg, 0)) != 0) ++ fsg->config = 0; // Reset on errors ++ else ++ INFO(fsg, "%s config #%d\n", ++ usb_speed_string(fsg->gadget->speed), ++ fsg->config); ++ } ++ return rc; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void handle_exception(struct fsg_dev *fsg) ++{ ++ siginfo_t info; ++ int sig; ++ int i; ++ int num_active; ++ struct fsg_buffhd *bh; ++ enum fsg_state old_state; ++ u8 new_config; ++ struct fsg_lun *curlun; ++ unsigned int exception_req_tag; ++ int rc; ++ ++ /* Clear the existing signals. Anything but SIGUSR1 is converted ++ * into a high-priority EXIT exception. */ ++ for (;;) { ++ sig = dequeue_signal_lock(current, ¤t->blocked, &info); ++ if (!sig) ++ break; ++ if (sig != SIGUSR1) { ++ if (fsg->state < FSG_STATE_EXIT) ++ DBG(fsg, "Main thread exiting on signal\n"); ++ raise_exception(fsg, FSG_STATE_EXIT); ++ } ++ } ++ ++ /* Cancel all the pending transfers */ ++ if (fsg->intreq_busy) ++ usb_ep_dequeue(fsg->intr_in, fsg->intreq); ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ bh = &fsg->buffhds[i]; ++ if (bh->inreq_busy) ++ usb_ep_dequeue(fsg->bulk_in, bh->inreq); ++ if (bh->outreq_busy) ++ usb_ep_dequeue(fsg->bulk_out, bh->outreq); ++ } ++ ++ /* Wait until everything is idle */ ++ for (;;) { ++ num_active = fsg->intreq_busy; ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ bh = &fsg->buffhds[i]; ++ num_active += bh->inreq_busy + bh->outreq_busy; ++ } ++ if (num_active == 0) ++ break; ++ if (sleep_thread(fsg)) ++ return; ++ } ++ ++ /* Clear out the controller's fifos */ ++ if (fsg->bulk_in_enabled) ++ usb_ep_fifo_flush(fsg->bulk_in); ++ if (fsg->bulk_out_enabled) ++ usb_ep_fifo_flush(fsg->bulk_out); ++ if (fsg->intr_in_enabled) ++ usb_ep_fifo_flush(fsg->intr_in); ++ ++ /* Reset the I/O buffer states and pointers, the SCSI ++ * state, and the exception. Then invoke the handler. */ ++ spin_lock_irq(&fsg->lock); ++ ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ bh = &fsg->buffhds[i]; ++ bh->state = BUF_STATE_EMPTY; ++ } ++ fsg->next_buffhd_to_fill = fsg->next_buffhd_to_drain = ++ &fsg->buffhds[0]; ++ ++ exception_req_tag = fsg->exception_req_tag; ++ new_config = fsg->new_config; ++ old_state = fsg->state; ++ ++ if (old_state == FSG_STATE_ABORT_BULK_OUT) ++ fsg->state = FSG_STATE_STATUS_PHASE; ++ else { ++ for (i = 0; i < fsg->nluns; ++i) { ++ curlun = &fsg->luns[i]; ++ curlun->prevent_medium_removal = 0; ++ curlun->sense_data = curlun->unit_attention_data = ++ SS_NO_SENSE; ++ curlun->sense_data_info = 0; ++ curlun->info_valid = 0; ++ } ++ fsg->state = FSG_STATE_IDLE; ++ } ++ spin_unlock_irq(&fsg->lock); ++ ++ /* Carry out any extra actions required for the exception */ ++ switch (old_state) { ++ default: ++ break; ++ ++ case FSG_STATE_ABORT_BULK_OUT: ++ send_status(fsg); ++ spin_lock_irq(&fsg->lock); ++ if (fsg->state == FSG_STATE_STATUS_PHASE) ++ fsg->state = FSG_STATE_IDLE; ++ spin_unlock_irq(&fsg->lock); ++ break; ++ ++ case FSG_STATE_RESET: ++ /* In case we were forced against our will to halt a ++ * bulk endpoint, clear the halt now. (The SuperH UDC ++ * requires this.) */ ++ if (test_and_clear_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags)) ++ usb_ep_clear_halt(fsg->bulk_in); ++ ++ if (transport_is_bbb()) { ++ if (fsg->ep0_req_tag == exception_req_tag) ++ ep0_queue(fsg); // Complete the status stage ++ ++ } else if (transport_is_cbi()) ++ send_status(fsg); // Status by interrupt pipe ++ ++ /* Technically this should go here, but it would only be ++ * a waste of time. Ditto for the INTERFACE_CHANGE and ++ * CONFIG_CHANGE cases. */ ++ // for (i = 0; i < fsg->nluns; ++i) ++ // fsg->luns[i].unit_attention_data = SS_RESET_OCCURRED; ++ break; ++ ++ case FSG_STATE_INTERFACE_CHANGE: ++ rc = do_set_interface(fsg, 0); ++ if (fsg->ep0_req_tag != exception_req_tag) ++ break; ++ if (rc != 0) // STALL on errors ++ fsg_set_halt(fsg, fsg->ep0); ++ else // Complete the status stage ++ ep0_queue(fsg); ++ break; ++ ++ case FSG_STATE_CONFIG_CHANGE: ++ rc = do_set_config(fsg, new_config); ++ if (fsg->ep0_req_tag != exception_req_tag) ++ break; ++ if (rc != 0) // STALL on errors ++ fsg_set_halt(fsg, fsg->ep0); ++ else // Complete the status stage ++ ep0_queue(fsg); ++ break; ++ ++ case FSG_STATE_DISCONNECT: ++ for (i = 0; i < fsg->nluns; ++i) ++ fsg_lun_fsync_sub(fsg->luns + i); ++ do_set_config(fsg, 0); // Unconfigured state ++ break; ++ ++ case FSG_STATE_EXIT: ++ case FSG_STATE_TERMINATED: ++ do_set_config(fsg, 0); // Free resources ++ spin_lock_irq(&fsg->lock); ++ fsg->state = FSG_STATE_TERMINATED; // Stop the thread ++ spin_unlock_irq(&fsg->lock); ++ break; ++ } ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static int fsg_main_thread(void *fsg_) ++{ ++ struct fsg_dev *fsg = fsg_; ++ ++ /* Allow the thread to be killed by a signal, but set the signal mask ++ * to block everything but INT, TERM, KILL, and USR1. */ ++ allow_signal(SIGINT); ++ allow_signal(SIGTERM); ++ allow_signal(SIGKILL); ++ allow_signal(SIGUSR1); ++ ++ /* Allow the thread to be frozen */ ++ set_freezable(); ++ ++ /* Arrange for userspace references to be interpreted as kernel ++ * pointers. That way we can pass a kernel pointer to a routine ++ * that expects a __user pointer and it will work okay. */ ++ set_fs(get_ds()); ++ ++ /* The main loop */ ++ while (fsg->state != FSG_STATE_TERMINATED) { ++ if (exception_in_progress(fsg) || signal_pending(current)) { ++ handle_exception(fsg); ++ continue; ++ } ++ ++ if (!fsg->running) { ++ sleep_thread(fsg); ++ continue; ++ } ++ ++ if (get_next_command(fsg)) ++ continue; ++ ++ spin_lock_irq(&fsg->lock); ++ if (!exception_in_progress(fsg)) ++ fsg->state = FSG_STATE_DATA_PHASE; ++ spin_unlock_irq(&fsg->lock); ++ ++ if (do_scsi_command(fsg) || finish_reply(fsg)) ++ continue; ++ ++ spin_lock_irq(&fsg->lock); ++ if (!exception_in_progress(fsg)) ++ fsg->state = FSG_STATE_STATUS_PHASE; ++ spin_unlock_irq(&fsg->lock); ++ ++ if (send_status(fsg)) ++ continue; ++ ++ spin_lock_irq(&fsg->lock); ++ if (!exception_in_progress(fsg)) ++ fsg->state = FSG_STATE_IDLE; ++ spin_unlock_irq(&fsg->lock); ++ } ++ ++ spin_lock_irq(&fsg->lock); ++ fsg->thread_task = NULL; ++ spin_unlock_irq(&fsg->lock); ++ ++ /* If we are exiting because of a signal, unregister the ++ * gadget driver. */ ++ if (test_and_clear_bit(REGISTERED, &fsg->atomic_bitflags)) ++ usb_gadget_unregister_driver(&fsg_driver); ++ ++ /* Let the unbind and cleanup routines know the thread has exited */ ++ complete_and_exit(&fsg->thread_notifier, 0); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++ ++/* The write permissions and store_xxx pointers are set in fsg_bind() */ ++static DEVICE_ATTR(ro, 0444, fsg_show_ro, NULL); ++static DEVICE_ATTR(nofua, 0644, fsg_show_nofua, NULL); ++static DEVICE_ATTR(file, 0444, fsg_show_file, NULL); ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void fsg_release(struct kref *ref) ++{ ++ struct fsg_dev *fsg = container_of(ref, struct fsg_dev, ref); ++ ++ kfree(fsg->luns); ++ kfree(fsg); ++} ++ ++static void lun_release(struct device *dev) ++{ ++ struct rw_semaphore *filesem = dev_get_drvdata(dev); ++ struct fsg_dev *fsg = ++ container_of(filesem, struct fsg_dev, filesem); ++ ++ kref_put(&fsg->ref, fsg_release); ++} ++ ++static void /* __init_or_exit */ fsg_unbind(struct usb_gadget *gadget) ++{ ++ struct fsg_dev *fsg = get_gadget_data(gadget); ++ int i; ++ struct fsg_lun *curlun; ++ struct usb_request *req = fsg->ep0req; ++ ++ DBG(fsg, "unbind\n"); ++ clear_bit(REGISTERED, &fsg->atomic_bitflags); ++ ++ /* If the thread isn't already dead, tell it to exit now */ ++ if (fsg->state != FSG_STATE_TERMINATED) { ++ raise_exception(fsg, FSG_STATE_EXIT); ++ wait_for_completion(&fsg->thread_notifier); ++ ++ /* The cleanup routine waits for this completion also */ ++ complete(&fsg->thread_notifier); ++ } ++ ++ /* Unregister the sysfs attribute files and the LUNs */ ++ for (i = 0; i < fsg->nluns; ++i) { ++ curlun = &fsg->luns[i]; ++ if (curlun->registered) { ++ device_remove_file(&curlun->dev, &dev_attr_nofua); ++ device_remove_file(&curlun->dev, &dev_attr_ro); ++ device_remove_file(&curlun->dev, &dev_attr_file); ++ fsg_lun_close(curlun); ++ device_unregister(&curlun->dev); ++ curlun->registered = 0; ++ } ++ } ++ ++ /* Free the data buffers */ ++ for (i = 0; i < fsg_num_buffers; ++i) ++ kfree(fsg->buffhds[i].buf); ++ ++ /* Free the request and buffer for endpoint 0 */ ++ if (req) { ++ kfree(req->buf); ++ usb_ep_free_request(fsg->ep0, req); ++ } ++ ++ set_gadget_data(gadget, NULL); ++} ++ ++ ++static int __init check_parameters(struct fsg_dev *fsg) ++{ ++ int prot; ++ int gcnum; ++ ++ /* Store the default values */ ++ mod_data.transport_type = USB_PR_BULK; ++ mod_data.transport_name = "Bulk-only"; ++ mod_data.protocol_type = USB_SC_SCSI; ++ mod_data.protocol_name = "Transparent SCSI"; ++ ++ /* Some peripheral controllers are known not to be able to ++ * halt bulk endpoints correctly. If one of them is present, ++ * disable stalls. ++ */ ++ if (gadget_is_at91(fsg->gadget)) ++ mod_data.can_stall = 0; ++ ++ if (mod_data.release == 0xffff) { // Parameter wasn't set ++ gcnum = usb_gadget_controller_number(fsg->gadget); ++ if (gcnum >= 0) ++ mod_data.release = 0x0300 + gcnum; ++ else { ++ WARNING(fsg, "controller '%s' not recognized\n", ++ fsg->gadget->name); ++ mod_data.release = 0x0399; ++ } ++ } ++ ++ prot = simple_strtol(mod_data.protocol_parm, NULL, 0); ++ ++#ifdef CONFIG_USB_FILE_STORAGE_TEST ++ if (strnicmp(mod_data.transport_parm, "BBB", 10) == 0) { ++ ; // Use default setting ++ } else if (strnicmp(mod_data.transport_parm, "CB", 10) == 0) { ++ mod_data.transport_type = USB_PR_CB; ++ mod_data.transport_name = "Control-Bulk"; ++ } else if (strnicmp(mod_data.transport_parm, "CBI", 10) == 0) { ++ mod_data.transport_type = USB_PR_CBI; ++ mod_data.transport_name = "Control-Bulk-Interrupt"; ++ } else { ++ ERROR(fsg, "invalid transport: %s\n", mod_data.transport_parm); ++ return -EINVAL; ++ } ++ ++ if (strnicmp(mod_data.protocol_parm, "SCSI", 10) == 0 || ++ prot == USB_SC_SCSI) { ++ ; // Use default setting ++ } else if (strnicmp(mod_data.protocol_parm, "RBC", 10) == 0 || ++ prot == USB_SC_RBC) { ++ mod_data.protocol_type = USB_SC_RBC; ++ mod_data.protocol_name = "RBC"; ++ } else if (strnicmp(mod_data.protocol_parm, "8020", 4) == 0 || ++ strnicmp(mod_data.protocol_parm, "ATAPI", 10) == 0 || ++ prot == USB_SC_8020) { ++ mod_data.protocol_type = USB_SC_8020; ++ mod_data.protocol_name = "8020i (ATAPI)"; ++ } else if (strnicmp(mod_data.protocol_parm, "QIC", 3) == 0 || ++ prot == USB_SC_QIC) { ++ mod_data.protocol_type = USB_SC_QIC; ++ mod_data.protocol_name = "QIC-157"; ++ } else if (strnicmp(mod_data.protocol_parm, "UFI", 10) == 0 || ++ prot == USB_SC_UFI) { ++ mod_data.protocol_type = USB_SC_UFI; ++ mod_data.protocol_name = "UFI"; ++ } else if (strnicmp(mod_data.protocol_parm, "8070", 4) == 0 || ++ prot == USB_SC_8070) { ++ mod_data.protocol_type = USB_SC_8070; ++ mod_data.protocol_name = "8070i"; ++ } else { ++ ERROR(fsg, "invalid protocol: %s\n", mod_data.protocol_parm); ++ return -EINVAL; ++ } ++ ++ mod_data.buflen &= PAGE_CACHE_MASK; ++ if (mod_data.buflen <= 0) { ++ ERROR(fsg, "invalid buflen\n"); ++ return -ETOOSMALL; ++ } ++ ++#endif /* CONFIG_USB_FILE_STORAGE_TEST */ ++ ++ /* Serial string handling. ++ * On a real device, the serial string would be loaded ++ * from permanent storage. */ ++ if (mod_data.serial) { ++ const char *ch; ++ unsigned len = 0; ++ ++ /* Sanity check : ++ * The CB[I] specification limits the serial string to ++ * 12 uppercase hexadecimal characters. ++ * BBB need at least 12 uppercase hexadecimal characters, ++ * with a maximum of 126. */ ++ for (ch = mod_data.serial; *ch; ++ch) { ++ ++len; ++ if ((*ch < '0' || *ch > '9') && ++ (*ch < 'A' || *ch > 'F')) { /* not uppercase hex */ ++ WARNING(fsg, ++ "Invalid serial string character: %c\n", ++ *ch); ++ goto no_serial; ++ } ++ } ++ if (len > 126 || ++ (mod_data.transport_type == USB_PR_BULK && len < 12) || ++ (mod_data.transport_type != USB_PR_BULK && len > 12)) { ++ WARNING(fsg, "Invalid serial string length!\n"); ++ goto no_serial; ++ } ++ fsg_strings[FSG_STRING_SERIAL - 1].s = mod_data.serial; ++ } else { ++ WARNING(fsg, "No serial-number string provided!\n"); ++ no_serial: ++ device_desc.iSerialNumber = 0; ++ } ++ ++ return 0; ++} ++ ++ ++static int __init fsg_bind(struct usb_gadget *gadget) ++{ ++ struct fsg_dev *fsg = the_fsg; ++ int rc; ++ int i; ++ struct fsg_lun *curlun; ++ struct usb_ep *ep; ++ struct usb_request *req; ++ char *pathbuf, *p; ++ ++ fsg->gadget = gadget; ++ set_gadget_data(gadget, fsg); ++ fsg->ep0 = gadget->ep0; ++ fsg->ep0->driver_data = fsg; ++ ++ if ((rc = check_parameters(fsg)) != 0) ++ goto out; ++ ++ if (mod_data.removable) { // Enable the store_xxx attributes ++ dev_attr_file.attr.mode = 0644; ++ dev_attr_file.store = fsg_store_file; ++ if (!mod_data.cdrom) { ++ dev_attr_ro.attr.mode = 0644; ++ dev_attr_ro.store = fsg_store_ro; ++ } ++ } ++ ++ /* Only for removable media? */ ++ dev_attr_nofua.attr.mode = 0644; ++ dev_attr_nofua.store = fsg_store_nofua; ++ ++ /* Find out how many LUNs there should be */ ++ i = mod_data.nluns; ++ if (i == 0) ++ i = max(mod_data.num_filenames, 1u); ++ if (i > FSG_MAX_LUNS) { ++ ERROR(fsg, "invalid number of LUNs: %d\n", i); ++ rc = -EINVAL; ++ goto out; ++ } ++ ++ /* Create the LUNs, open their backing files, and register the ++ * LUN devices in sysfs. */ ++ fsg->luns = kzalloc(i * sizeof(struct fsg_lun), GFP_KERNEL); ++ if (!fsg->luns) { ++ rc = -ENOMEM; ++ goto out; ++ } ++ fsg->nluns = i; ++ ++ for (i = 0; i < fsg->nluns; ++i) { ++ curlun = &fsg->luns[i]; ++ curlun->cdrom = !!mod_data.cdrom; ++ curlun->ro = mod_data.cdrom || mod_data.ro[i]; ++ curlun->initially_ro = curlun->ro; ++ curlun->removable = mod_data.removable; ++ curlun->nofua = mod_data.nofua[i]; ++ curlun->dev.release = lun_release; ++ curlun->dev.parent = &gadget->dev; ++ curlun->dev.driver = &fsg_driver.driver; ++ dev_set_drvdata(&curlun->dev, &fsg->filesem); ++ dev_set_name(&curlun->dev,"%s-lun%d", ++ dev_name(&gadget->dev), i); ++ ++ kref_get(&fsg->ref); ++ rc = device_register(&curlun->dev); ++ if (rc) { ++ INFO(fsg, "failed to register LUN%d: %d\n", i, rc); ++ put_device(&curlun->dev); ++ goto out; ++ } ++ curlun->registered = 1; ++ ++ rc = device_create_file(&curlun->dev, &dev_attr_ro); ++ if (rc) ++ goto out; ++ rc = device_create_file(&curlun->dev, &dev_attr_nofua); ++ if (rc) ++ goto out; ++ rc = device_create_file(&curlun->dev, &dev_attr_file); ++ if (rc) ++ goto out; ++ ++ if (mod_data.file[i] && *mod_data.file[i]) { ++ rc = fsg_lun_open(curlun, mod_data.file[i]); ++ if (rc) ++ goto out; ++ } else if (!mod_data.removable) { ++ ERROR(fsg, "no file given for LUN%d\n", i); ++ rc = -EINVAL; ++ goto out; ++ } ++ } ++ ++ /* Find all the endpoints we will use */ ++ usb_ep_autoconfig_reset(gadget); ++ ep = usb_ep_autoconfig(gadget, &fsg_fs_bulk_in_desc); ++ if (!ep) ++ goto autoconf_fail; ++ ep->driver_data = fsg; // claim the endpoint ++ fsg->bulk_in = ep; ++ ++ ep = usb_ep_autoconfig(gadget, &fsg_fs_bulk_out_desc); ++ if (!ep) ++ goto autoconf_fail; ++ ep->driver_data = fsg; // claim the endpoint ++ fsg->bulk_out = ep; ++ ++ if (transport_is_cbi()) { ++ ep = usb_ep_autoconfig(gadget, &fsg_fs_intr_in_desc); ++ if (!ep) ++ goto autoconf_fail; ++ ep->driver_data = fsg; // claim the endpoint ++ fsg->intr_in = ep; ++ } ++ ++ /* Fix up the descriptors */ ++ device_desc.idVendor = cpu_to_le16(mod_data.vendor); ++ device_desc.idProduct = cpu_to_le16(mod_data.product); ++ device_desc.bcdDevice = cpu_to_le16(mod_data.release); ++ ++ i = (transport_is_cbi() ? 3 : 2); // Number of endpoints ++ fsg_intf_desc.bNumEndpoints = i; ++ fsg_intf_desc.bInterfaceSubClass = mod_data.protocol_type; ++ fsg_intf_desc.bInterfaceProtocol = mod_data.transport_type; ++ fsg_fs_function[i + FSG_FS_FUNCTION_PRE_EP_ENTRIES] = NULL; ++ ++ if (gadget_is_dualspeed(gadget)) { ++ fsg_hs_function[i + FSG_HS_FUNCTION_PRE_EP_ENTRIES] = NULL; ++ ++ /* Assume endpoint addresses are the same for both speeds */ ++ fsg_hs_bulk_in_desc.bEndpointAddress = ++ fsg_fs_bulk_in_desc.bEndpointAddress; ++ fsg_hs_bulk_out_desc.bEndpointAddress = ++ fsg_fs_bulk_out_desc.bEndpointAddress; ++ fsg_hs_intr_in_desc.bEndpointAddress = ++ fsg_fs_intr_in_desc.bEndpointAddress; ++ } ++ ++ if (gadget_is_superspeed(gadget)) { ++ unsigned max_burst; ++ ++ fsg_ss_function[i + FSG_SS_FUNCTION_PRE_EP_ENTRIES] = NULL; ++ ++ /* Calculate bMaxBurst, we know packet size is 1024 */ ++ max_burst = min_t(unsigned, mod_data.buflen / 1024, 15); ++ ++ /* Assume endpoint addresses are the same for both speeds */ ++ fsg_ss_bulk_in_desc.bEndpointAddress = ++ fsg_fs_bulk_in_desc.bEndpointAddress; ++ fsg_ss_bulk_in_comp_desc.bMaxBurst = max_burst; ++ ++ fsg_ss_bulk_out_desc.bEndpointAddress = ++ fsg_fs_bulk_out_desc.bEndpointAddress; ++ fsg_ss_bulk_out_comp_desc.bMaxBurst = max_burst; ++ } ++ ++ if (gadget_is_otg(gadget)) ++ fsg_otg_desc.bmAttributes |= USB_OTG_HNP; ++ ++ rc = -ENOMEM; ++ ++ /* Allocate the request and buffer for endpoint 0 */ ++ fsg->ep0req = req = usb_ep_alloc_request(fsg->ep0, GFP_KERNEL); ++ if (!req) ++ goto out; ++ req->buf = kmalloc(EP0_BUFSIZE, GFP_KERNEL); ++ if (!req->buf) ++ goto out; ++ req->complete = ep0_complete; ++ ++ /* Allocate the data buffers */ ++ for (i = 0; i < fsg_num_buffers; ++i) { ++ struct fsg_buffhd *bh = &fsg->buffhds[i]; ++ ++ /* Allocate for the bulk-in endpoint. We assume that ++ * the buffer will also work with the bulk-out (and ++ * interrupt-in) endpoint. */ ++ bh->buf = kmalloc(mod_data.buflen, GFP_KERNEL); ++ if (!bh->buf) ++ goto out; ++ bh->next = bh + 1; ++ } ++ fsg->buffhds[fsg_num_buffers - 1].next = &fsg->buffhds[0]; ++ ++ /* This should reflect the actual gadget power source */ ++ usb_gadget_set_selfpowered(gadget); ++ ++ snprintf(fsg_string_manufacturer, sizeof fsg_string_manufacturer, ++ "%s %s with %s", ++ init_utsname()->sysname, init_utsname()->release, ++ gadget->name); ++ ++ fsg->thread_task = kthread_create(fsg_main_thread, fsg, ++ "file-storage-gadget"); ++ if (IS_ERR(fsg->thread_task)) { ++ rc = PTR_ERR(fsg->thread_task); ++ goto out; ++ } ++ ++ INFO(fsg, DRIVER_DESC ", version: " DRIVER_VERSION "\n"); ++ INFO(fsg, "NOTE: This driver is deprecated. " ++ "Consider using g_mass_storage instead.\n"); ++ INFO(fsg, "Number of LUNs=%d\n", fsg->nluns); ++ ++ pathbuf = kmalloc(PATH_MAX, GFP_KERNEL); ++ for (i = 0; i < fsg->nluns; ++i) { ++ curlun = &fsg->luns[i]; ++ if (fsg_lun_is_open(curlun)) { ++ p = NULL; ++ if (pathbuf) { ++ p = d_path(&curlun->filp->f_path, ++ pathbuf, PATH_MAX); ++ if (IS_ERR(p)) ++ p = NULL; ++ } ++ LINFO(curlun, "ro=%d, nofua=%d, file: %s\n", ++ curlun->ro, curlun->nofua, (p ? p : "(error)")); ++ } ++ } ++ kfree(pathbuf); ++ ++ DBG(fsg, "transport=%s (x%02x)\n", ++ mod_data.transport_name, mod_data.transport_type); ++ DBG(fsg, "protocol=%s (x%02x)\n", ++ mod_data.protocol_name, mod_data.protocol_type); ++ DBG(fsg, "VendorID=x%04x, ProductID=x%04x, Release=x%04x\n", ++ mod_data.vendor, mod_data.product, mod_data.release); ++ DBG(fsg, "removable=%d, stall=%d, cdrom=%d, buflen=%u\n", ++ mod_data.removable, mod_data.can_stall, ++ mod_data.cdrom, mod_data.buflen); ++ DBG(fsg, "I/O thread pid: %d\n", task_pid_nr(fsg->thread_task)); ++ ++ set_bit(REGISTERED, &fsg->atomic_bitflags); ++ ++ /* Tell the thread to start working */ ++ wake_up_process(fsg->thread_task); ++ return 0; ++ ++autoconf_fail: ++ ERROR(fsg, "unable to autoconfigure all endpoints\n"); ++ rc = -ENOTSUPP; ++ ++out: ++ fsg->state = FSG_STATE_TERMINATED; // The thread is dead ++ fsg_unbind(gadget); ++ complete(&fsg->thread_notifier); ++ return rc; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void fsg_suspend(struct usb_gadget *gadget) ++{ ++ struct fsg_dev *fsg = get_gadget_data(gadget); ++ ++ DBG(fsg, "suspend\n"); ++ set_bit(SUSPENDED, &fsg->atomic_bitflags); ++} ++ ++static void fsg_resume(struct usb_gadget *gadget) ++{ ++ struct fsg_dev *fsg = get_gadget_data(gadget); ++ ++ DBG(fsg, "resume\n"); ++ clear_bit(SUSPENDED, &fsg->atomic_bitflags); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct usb_gadget_driver fsg_driver = { ++ .max_speed = USB_SPEED_SUPER, ++ .function = (char *) fsg_string_product, ++ .unbind = fsg_unbind, ++ .disconnect = fsg_disconnect, ++ .setup = fsg_setup, ++ .suspend = fsg_suspend, ++ .resume = fsg_resume, ++ ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ // .release = ... ++ // .suspend = ... ++ // .resume = ... ++ }, ++}; ++ ++ ++static int __init fsg_alloc(void) ++{ ++ struct fsg_dev *fsg; ++ ++ fsg = kzalloc(sizeof *fsg + ++ fsg_num_buffers * sizeof *(fsg->buffhds), GFP_KERNEL); ++ ++ if (!fsg) ++ return -ENOMEM; ++ spin_lock_init(&fsg->lock); ++ init_rwsem(&fsg->filesem); ++ kref_init(&fsg->ref); ++ init_completion(&fsg->thread_notifier); ++ ++ the_fsg = fsg; ++ return 0; ++} ++ ++ ++static int __init fsg_init(void) ++{ ++ int rc; ++ struct fsg_dev *fsg; ++ ++ rc = fsg_num_buffers_validate(); ++ if (rc != 0) ++ return rc; ++ ++ if ((rc = fsg_alloc()) != 0) ++ return rc; ++ fsg = the_fsg; ++ if ((rc = usb_gadget_probe_driver(&fsg_driver, fsg_bind)) != 0) ++ kref_put(&fsg->ref, fsg_release); ++ return rc; ++} ++module_init(fsg_init); ++ ++ ++static void __exit fsg_cleanup(void) ++{ ++ struct fsg_dev *fsg = the_fsg; ++ ++ /* Unregister the driver iff the thread hasn't already done so */ ++ if (test_and_clear_bit(REGISTERED, &fsg->atomic_bitflags)) ++ usb_gadget_unregister_driver(&fsg_driver); ++ ++ /* Wait for the thread to finish up */ ++ wait_for_completion(&fsg->thread_notifier); ++ ++ kref_put(&fsg->ref, fsg_release); ++} ++module_exit(fsg_cleanup); +Index: linux-3.10-3.10.11/drivers/usb/host/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/Kconfig 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/Kconfig 2014-04-28 00:42:05.000000000 +0000 +@@ -663,6 +663,19 @@ + To compile this driver a module, choose M here: the module + will be called "hwa-hc". + ++config USB_DWCOTG ++ tristate "Synopsis DWC host support" ++ depends on USB ++ help ++ The Synopsis DWC controller is a dual-role ++ host/peripheral/OTG ("On The Go") USB controllers. ++ ++ Enable this option to support this IP in host controller mode. ++ If unsure, say N. ++ ++ To compile this driver as a module, choose M here: the ++ modules built will be called dwc_otg and dwc_common_port. ++ + config USB_IMX21_HCD + tristate "i.MX21 HCD support" + depends on ARM && ARCH_MXC +Index: linux-3.10-3.10.11/drivers/usb/host/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/Makefile 2014-04-27 23:37:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/Makefile 2014-04-28 00:42:05.000000000 +0000 +@@ -47,6 +47,8 @@ + obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o + obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o + obj-$(CONFIG_USB_HWA_HCD) += hwa-hc.o ++ ++obj-$(CONFIG_USB_DWCOTG) += dwc_otg/ dwc_common_port/ + obj-$(CONFIG_USB_IMX21_HCD) += imx21-hcd.o + obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-mph-dr-of.o + obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,58 @@ ++# ++# Makefile for DWC_common library ++# ++ ++ifneq ($(KERNELRELEASE),) ++ ++EXTRA_CFLAGS += -DDWC_LINUX ++#EXTRA_CFLAGS += -DDEBUG ++#EXTRA_CFLAGS += -DDWC_DEBUG_REGS ++#EXTRA_CFLAGS += -DDWC_DEBUG_MEMORY ++ ++EXTRA_CFLAGS += -DDWC_LIBMODULE ++EXTRA_CFLAGS += -DDWC_CCLIB ++#EXTRA_CFLAGS += -DDWC_CRYPTOLIB ++EXTRA_CFLAGS += -DDWC_NOTIFYLIB ++EXTRA_CFLAGS += -DDWC_UTFLIB ++ ++obj-$(CONFIG_USB_DWCOTG) += dwc_common_port_lib.o ++dwc_common_port_lib-objs := dwc_cc.o dwc_modpow.o dwc_dh.o \ ++ dwc_crypto.o dwc_notifier.o \ ++ dwc_common_linux.o dwc_mem.o ++ ++kernrelwd := $(subst ., ,$(KERNELRELEASE)) ++kernrel3 := $(word 1,$(kernrelwd)).$(word 2,$(kernrelwd)).$(word 3,$(kernrelwd)) ++ ++ifneq ($(kernrel3),2.6.20) ++# grayg - I only know that we use EXTRA_CFLAGS in 2.6.31 actually ++EXTRA_CFLAGS += $(CPPFLAGS) ++endif ++ ++else ++ ++#ifeq ($(KDIR),) ++#$(error Must give "KDIR=/path/to/kernel/source" on command line or in environment) ++#endif ++ ++ifeq ($(ARCH),) ++$(error Must give "ARCH=" on command line or in environment. Also, if \ ++ cross-compiling, must give "CROSS_COMPILE=/path/to/compiler/plus/tool-prefix-") ++endif ++ ++ifeq ($(DOXYGEN),) ++DOXYGEN := doxygen ++endif ++ ++default: ++ $(MAKE) -C$(KDIR) M=$(PWD) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) modules ++ ++docs: $(wildcard *.[hc]) doc/doxygen.cfg ++ $(DOXYGEN) doc/doxygen.cfg ++ ++tags: $(wildcard *.[hc]) ++ $(CTAGS) -e $(wildcard *.[hc]) $(wildcard linux/*.[hc]) $(wildcard $(KDIR)/include/linux/usb*.h) ++ ++endif ++ ++clean: ++ rm -rf *.o *.ko .*.cmd *.mod.c .*.o.d .*.o.tmp modules.order Module.markers Module.symvers .tmp_versions/ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile.fbsd +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile.fbsd 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,17 @@ ++CFLAGS += -I/sys/i386/compile/GENERIC -I/sys/i386/include -I/usr/include ++CFLAGS += -DDWC_FREEBSD ++CFLAGS += -DDEBUG ++#CFLAGS += -DDWC_DEBUG_REGS ++#CFLAGS += -DDWC_DEBUG_MEMORY ++ ++#CFLAGS += -DDWC_LIBMODULE ++#CFLAGS += -DDWC_CCLIB ++#CFLAGS += -DDWC_CRYPTOLIB ++#CFLAGS += -DDWC_NOTIFYLIB ++#CFLAGS += -DDWC_UTFLIB ++ ++KMOD = dwc_common_port_lib ++SRCS = dwc_cc.c dwc_modpow.c dwc_dh.c dwc_crypto.c dwc_notifier.c \ ++ dwc_common_fbsd.c dwc_mem.c ++ ++.include +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile.linux +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/Makefile.linux 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,49 @@ ++# ++# Makefile for DWC_common library ++# ++ifneq ($(KERNELRELEASE),) ++ ++EXTRA_CFLAGS += -DDWC_LINUX ++#EXTRA_CFLAGS += -DDEBUG ++#EXTRA_CFLAGS += -DDWC_DEBUG_REGS ++#EXTRA_CFLAGS += -DDWC_DEBUG_MEMORY ++ ++EXTRA_CFLAGS += -DDWC_LIBMODULE ++EXTRA_CFLAGS += -DDWC_CCLIB ++EXTRA_CFLAGS += -DDWC_CRYPTOLIB ++EXTRA_CFLAGS += -DDWC_NOTIFYLIB ++EXTRA_CFLAGS += -DDWC_UTFLIB ++ ++obj-m := dwc_common_port_lib.o ++dwc_common_port_lib-objs := dwc_cc.o dwc_modpow.o dwc_dh.o \ ++ dwc_crypto.o dwc_notifier.o \ ++ dwc_common_linux.o dwc_mem.o ++ ++else ++ ++ifeq ($(KDIR),) ++$(error Must give "KDIR=/path/to/kernel/source" on command line or in environment) ++endif ++ ++ifeq ($(ARCH),) ++$(error Must give "ARCH=" on command line or in environment. Also, if \ ++ cross-compiling, must give "CROSS_COMPILE=/path/to/compiler/plus/tool-prefix-") ++endif ++ ++ifeq ($(DOXYGEN),) ++DOXYGEN := doxygen ++endif ++ ++default: ++ $(MAKE) -C$(KDIR) M=$(PWD) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) modules ++ ++docs: $(wildcard *.[hc]) doc/doxygen.cfg ++ $(DOXYGEN) doc/doxygen.cfg ++ ++tags: $(wildcard *.[hc]) ++ $(CTAGS) -e $(wildcard *.[hc]) $(wildcard linux/*.[hc]) $(wildcard $(KDIR)/include/linux/usb*.h) ++ ++endif ++ ++clean: ++ rm -rf *.o *.ko .*.cmd *.mod.c .*.o.d .*.o.tmp modules.order Module.markers Module.symvers .tmp_versions/ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/changes.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/changes.txt 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,174 @@ ++ ++dwc_read_reg32() and friends now take an additional parameter, a pointer to an ++IO context struct. The IO context struct should live in an os-dependent struct ++in your driver. As an example, the dwc_usb3 driver has an os-dependent struct ++named 'os_dep' embedded in the main device struct. So there these calls look ++like this: ++ ++ dwc_read_reg32(&usb3_dev->os_dep.ioctx, &pcd->dev_global_regs->dcfg); ++ ++ dwc_write_reg32(&usb3_dev->os_dep.ioctx, ++ &pcd->dev_global_regs->dcfg, 0); ++ ++Note that for the existing Linux driver ports, it is not necessary to actually ++define the 'ioctx' member in the os-dependent struct. Since Linux does not ++require an IO context, its macros for dwc_read_reg32() and friends do not ++use the context pointer, so it is optimized away by the compiler. But it is ++necessary to add the pointer parameter to all of the call sites, to be ready ++for any future ports (such as FreeBSD) which do require an IO context. ++ ++ ++Similarly, dwc_alloc(), dwc_alloc_atomic(), dwc_strdup(), and dwc_free() now ++take an additional parameter, a pointer to a memory context. Examples: ++ ++ addr = dwc_alloc(&usb3_dev->os_dep.memctx, size); ++ ++ dwc_free(&usb3_dev->os_dep.memctx, addr); ++ ++Again, for the Linux ports, it is not necessary to actually define the memctx ++member, but it is necessary to add the pointer parameter to all of the call ++sites. ++ ++ ++Same for dwc_dma_alloc() and dwc_dma_free(). Examples: ++ ++ virt_addr = dwc_dma_alloc(&usb3_dev->os_dep.dmactx, size, &phys_addr); ++ ++ dwc_dma_free(&usb3_dev->os_dep.dmactx, size, virt_addr, phys_addr); ++ ++ ++Same for dwc_mutex_alloc() and dwc_mutex_free(). Examples: ++ ++ mutex = dwc_mutex_alloc(&usb3_dev->os_dep.mtxctx); ++ ++ dwc_mutex_free(&usb3_dev->os_dep.mtxctx, mutex); ++ ++ ++Same for dwc_spinlock_alloc() and dwc_spinlock_free(). Examples: ++ ++ lock = dwc_spinlock_alloc(&usb3_dev->osdep.splctx); ++ ++ dwc_spinlock_free(&usb3_dev->osdep.splctx, lock); ++ ++ ++Same for dwc_timer_alloc(). Example: ++ ++ timer = dwc_timer_alloc(&usb3_dev->os_dep.tmrctx, "dwc_usb3_tmr1", ++ cb_func, cb_data); ++ ++ ++Same for dwc_waitq_alloc(). Example: ++ ++ waitq = dwc_waitq_alloc(&usb3_dev->os_dep.wtqctx); ++ ++ ++Same for dwc_thread_run(). Example: ++ ++ thread = dwc_thread_run(&usb3_dev->os_dep.thdctx, func, ++ "dwc_usb3_thd1", data); ++ ++ ++Same for dwc_workq_alloc(). Example: ++ ++ workq = dwc_workq_alloc(&usb3_dev->osdep.wkqctx, "dwc_usb3_wkq1"); ++ ++ ++Same for dwc_task_alloc(). Example: ++ ++ task = dwc_task_alloc(&usb3_dev->os_dep.tskctx, "dwc_usb3_tsk1", ++ cb_func, cb_data); ++ ++ ++In addition to the context pointer additions, a few core functions have had ++other changes made to their parameters: ++ ++The 'flags' parameter to dwc_spinlock_irqsave() and dwc_spinunlock_irqrestore() ++has been changed from a uint64_t to a dwc_irqflags_t. ++ ++dwc_thread_should_stop() now takes a 'dwc_thread_t *' parameter, because the ++FreeBSD equivalent of that function requires it. ++ ++And, in addition to the context pointer, dwc_task_alloc() also adds a ++'char *name' parameter, to be consistent with dwc_thread_run() and ++dwc_workq_alloc(), and because the FreeBSD equivalent of that function ++requires a unique name. ++ ++ ++Here is a complete list of the core functions that now take a pointer to a ++context as their first parameter: ++ ++ dwc_read_reg32 ++ dwc_read_reg64 ++ dwc_write_reg32 ++ dwc_write_reg64 ++ dwc_modify_reg32 ++ dwc_modify_reg64 ++ dwc_alloc ++ dwc_alloc_atomic ++ dwc_strdup ++ dwc_free ++ dwc_dma_alloc ++ dwc_dma_free ++ dwc_mutex_alloc ++ dwc_mutex_free ++ dwc_spinlock_alloc ++ dwc_spinlock_free ++ dwc_timer_alloc ++ dwc_waitq_alloc ++ dwc_thread_run ++ dwc_workq_alloc ++ dwc_task_alloc Also adds a 'char *name' as its 2nd parameter ++ ++And here are the core functions that have other changes to their parameters: ++ ++ dwc_spinlock_irqsave 'flags' param is now a 'dwc_irqflags_t *' ++ dwc_spinunlock_irqrestore 'flags' param is now a 'dwc_irqflags_t' ++ dwc_thread_should_stop Adds a 'dwc_thread_t *' parameter ++ ++ ++ ++The changes to the core functions also require some of the other library ++functions to change: ++ ++ dwc_cc_if_alloc() and dwc_cc_if_free() now take a 'void *memctx' ++ (for memory allocation) as the 1st param and a 'void *mtxctx' ++ (for mutex allocation) as the 2nd param. ++ ++ dwc_cc_clear(), dwc_cc_add(), dwc_cc_change(), dwc_cc_remove(), ++ dwc_cc_data_for_save(), and dwc_cc_restore_from_data() now take a ++ 'void *memctx' as the 1st param. ++ ++ dwc_dh_modpow(), dwc_dh_pk(), and dwc_dh_derive_keys() now take a ++ 'void *memctx' as the 1st param. ++ ++ dwc_modpow() now takes a 'void *memctx' as the 1st param. ++ ++ dwc_alloc_notification_manager() now takes a 'void *memctx' as the ++ 1st param and a 'void *wkqctx' (for work queue allocation) as the 2nd ++ param, and also now returns an integer value that is non-zero if ++ allocation of its data structures or work queue fails. ++ ++ dwc_register_notifier() now takes a 'void *memctx' as the 1st param. ++ ++ dwc_memory_debug_start() now takes a 'void *mem_ctx' as the first ++ param, and also now returns an integer value that is non-zero if ++ allocation of its data structures fails. ++ ++ ++ ++Other miscellaneous changes: ++ ++The DEBUG_MEMORY and DEBUG_REGS #define's have been renamed to ++DWC_DEBUG_MEMORY and DWC_DEBUG_REGS. ++ ++The following #define's have been added to allow selectively compiling library ++features: ++ ++ DWC_CCLIB ++ DWC_CRYPTOLIB ++ DWC_NOTIFYLIB ++ DWC_UTFLIB ++ ++A DWC_LIBMODULE #define has also been added. If this is not defined, then the ++module code in dwc_common_linux.c is not compiled in. This allows linking the ++library code directly into a driver module, instead of as a standalone module. +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/doc/doxygen.cfg +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/doc/doxygen.cfg 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,270 @@ ++# Doxyfile 1.4.5 ++ ++#--------------------------------------------------------------------------- ++# Project related configuration options ++#--------------------------------------------------------------------------- ++PROJECT_NAME = "Synopsys DWC Portability and Common Library for UWB" ++PROJECT_NUMBER = ++OUTPUT_DIRECTORY = doc ++CREATE_SUBDIRS = NO ++OUTPUT_LANGUAGE = English ++BRIEF_MEMBER_DESC = YES ++REPEAT_BRIEF = YES ++ABBREVIATE_BRIEF = "The $name class" \ ++ "The $name widget" \ ++ "The $name file" \ ++ is \ ++ provides \ ++ specifies \ ++ contains \ ++ represents \ ++ a \ ++ an \ ++ the ++ALWAYS_DETAILED_SEC = YES ++INLINE_INHERITED_MEMB = NO ++FULL_PATH_NAMES = NO ++STRIP_FROM_PATH = .. ++STRIP_FROM_INC_PATH = ++SHORT_NAMES = NO ++JAVADOC_AUTOBRIEF = YES ++MULTILINE_CPP_IS_BRIEF = NO ++DETAILS_AT_TOP = YES ++INHERIT_DOCS = YES ++SEPARATE_MEMBER_PAGES = NO ++TAB_SIZE = 8 ++ALIASES = ++OPTIMIZE_OUTPUT_FOR_C = YES ++OPTIMIZE_OUTPUT_JAVA = NO ++BUILTIN_STL_SUPPORT = NO ++DISTRIBUTE_GROUP_DOC = NO ++SUBGROUPING = NO ++#--------------------------------------------------------------------------- ++# Build related configuration options ++#--------------------------------------------------------------------------- ++EXTRACT_ALL = NO ++EXTRACT_PRIVATE = NO ++EXTRACT_STATIC = YES ++EXTRACT_LOCAL_CLASSES = NO ++EXTRACT_LOCAL_METHODS = NO ++HIDE_UNDOC_MEMBERS = NO ++HIDE_UNDOC_CLASSES = NO ++HIDE_FRIEND_COMPOUNDS = NO ++HIDE_IN_BODY_DOCS = NO ++INTERNAL_DOCS = NO ++CASE_SENSE_NAMES = YES ++HIDE_SCOPE_NAMES = NO ++SHOW_INCLUDE_FILES = NO ++INLINE_INFO = YES ++SORT_MEMBER_DOCS = NO ++SORT_BRIEF_DOCS = NO ++SORT_BY_SCOPE_NAME = NO ++GENERATE_TODOLIST = YES ++GENERATE_TESTLIST = YES ++GENERATE_BUGLIST = YES ++GENERATE_DEPRECATEDLIST= YES ++ENABLED_SECTIONS = ++MAX_INITIALIZER_LINES = 30 ++SHOW_USED_FILES = YES ++SHOW_DIRECTORIES = YES ++FILE_VERSION_FILTER = ++#--------------------------------------------------------------------------- ++# configuration options related to warning and progress messages ++#--------------------------------------------------------------------------- ++QUIET = YES ++WARNINGS = YES ++WARN_IF_UNDOCUMENTED = NO ++WARN_IF_DOC_ERROR = YES ++WARN_NO_PARAMDOC = YES ++WARN_FORMAT = "$file:$line: $text" ++WARN_LOGFILE = ++#--------------------------------------------------------------------------- ++# configuration options related to the input files ++#--------------------------------------------------------------------------- ++INPUT = . ++FILE_PATTERNS = *.c \ ++ *.cc \ ++ *.cxx \ ++ *.cpp \ ++ *.c++ \ ++ *.d \ ++ *.java \ ++ *.ii \ ++ *.ixx \ ++ *.ipp \ ++ *.i++ \ ++ *.inl \ ++ *.h \ ++ *.hh \ ++ *.hxx \ ++ *.hpp \ ++ *.h++ \ ++ *.idl \ ++ *.odl \ ++ *.cs \ ++ *.php \ ++ *.php3 \ ++ *.inc \ ++ *.m \ ++ *.mm \ ++ *.dox \ ++ *.py \ ++ *.C \ ++ *.CC \ ++ *.C++ \ ++ *.II \ ++ *.I++ \ ++ *.H \ ++ *.HH \ ++ *.H++ \ ++ *.CS \ ++ *.PHP \ ++ *.PHP3 \ ++ *.M \ ++ *.MM \ ++ *.PY ++RECURSIVE = NO ++EXCLUDE = ++EXCLUDE_SYMLINKS = NO ++EXCLUDE_PATTERNS = ++EXAMPLE_PATH = ++EXAMPLE_PATTERNS = * ++EXAMPLE_RECURSIVE = NO ++IMAGE_PATH = ++INPUT_FILTER = ++FILTER_PATTERNS = ++FILTER_SOURCE_FILES = NO ++#--------------------------------------------------------------------------- ++# configuration options related to source browsing ++#--------------------------------------------------------------------------- ++SOURCE_BROWSER = NO ++INLINE_SOURCES = NO ++STRIP_CODE_COMMENTS = YES ++REFERENCED_BY_RELATION = YES ++REFERENCES_RELATION = YES ++USE_HTAGS = NO ++VERBATIM_HEADERS = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the alphabetical class index ++#--------------------------------------------------------------------------- ++ALPHABETICAL_INDEX = NO ++COLS_IN_ALPHA_INDEX = 5 ++IGNORE_PREFIX = ++#--------------------------------------------------------------------------- ++# configuration options related to the HTML output ++#--------------------------------------------------------------------------- ++GENERATE_HTML = YES ++HTML_OUTPUT = html ++HTML_FILE_EXTENSION = .html ++HTML_HEADER = ++HTML_FOOTER = ++HTML_STYLESHEET = ++HTML_ALIGN_MEMBERS = YES ++GENERATE_HTMLHELP = NO ++CHM_FILE = ++HHC_LOCATION = ++GENERATE_CHI = NO ++BINARY_TOC = NO ++TOC_EXPAND = NO ++DISABLE_INDEX = NO ++ENUM_VALUES_PER_LINE = 4 ++GENERATE_TREEVIEW = YES ++TREEVIEW_WIDTH = 250 ++#--------------------------------------------------------------------------- ++# configuration options related to the LaTeX output ++#--------------------------------------------------------------------------- ++GENERATE_LATEX = NO ++LATEX_OUTPUT = latex ++LATEX_CMD_NAME = latex ++MAKEINDEX_CMD_NAME = makeindex ++COMPACT_LATEX = NO ++PAPER_TYPE = a4wide ++EXTRA_PACKAGES = ++LATEX_HEADER = ++PDF_HYPERLINKS = NO ++USE_PDFLATEX = NO ++LATEX_BATCHMODE = NO ++LATEX_HIDE_INDICES = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the RTF output ++#--------------------------------------------------------------------------- ++GENERATE_RTF = NO ++RTF_OUTPUT = rtf ++COMPACT_RTF = NO ++RTF_HYPERLINKS = NO ++RTF_STYLESHEET_FILE = ++RTF_EXTENSIONS_FILE = ++#--------------------------------------------------------------------------- ++# configuration options related to the man page output ++#--------------------------------------------------------------------------- ++GENERATE_MAN = NO ++MAN_OUTPUT = man ++MAN_EXTENSION = .3 ++MAN_LINKS = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the XML output ++#--------------------------------------------------------------------------- ++GENERATE_XML = NO ++XML_OUTPUT = xml ++XML_SCHEMA = ++XML_DTD = ++XML_PROGRAMLISTING = YES ++#--------------------------------------------------------------------------- ++# configuration options for the AutoGen Definitions output ++#--------------------------------------------------------------------------- ++GENERATE_AUTOGEN_DEF = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the Perl module output ++#--------------------------------------------------------------------------- ++GENERATE_PERLMOD = NO ++PERLMOD_LATEX = NO ++PERLMOD_PRETTY = YES ++PERLMOD_MAKEVAR_PREFIX = ++#--------------------------------------------------------------------------- ++# Configuration options related to the preprocessor ++#--------------------------------------------------------------------------- ++ENABLE_PREPROCESSING = YES ++MACRO_EXPANSION = NO ++EXPAND_ONLY_PREDEF = NO ++SEARCH_INCLUDES = YES ++INCLUDE_PATH = ++INCLUDE_FILE_PATTERNS = ++PREDEFINED = DEBUG DEBUG_MEMORY ++EXPAND_AS_DEFINED = ++SKIP_FUNCTION_MACROS = YES ++#--------------------------------------------------------------------------- ++# Configuration::additions related to external references ++#--------------------------------------------------------------------------- ++TAGFILES = ++GENERATE_TAGFILE = ++ALLEXTERNALS = NO ++EXTERNAL_GROUPS = YES ++PERL_PATH = /usr/bin/perl ++#--------------------------------------------------------------------------- ++# Configuration options related to the dot tool ++#--------------------------------------------------------------------------- ++CLASS_DIAGRAMS = YES ++HIDE_UNDOC_RELATIONS = YES ++HAVE_DOT = NO ++CLASS_GRAPH = YES ++COLLABORATION_GRAPH = YES ++GROUP_GRAPHS = YES ++UML_LOOK = NO ++TEMPLATE_RELATIONS = NO ++INCLUDE_GRAPH = NO ++INCLUDED_BY_GRAPH = YES ++CALL_GRAPH = NO ++GRAPHICAL_HIERARCHY = YES ++DIRECTORY_GRAPH = YES ++DOT_IMAGE_FORMAT = png ++DOT_PATH = ++DOTFILE_DIRS = ++MAX_DOT_GRAPH_DEPTH = 1000 ++DOT_TRANSPARENT = NO ++DOT_MULTI_TARGETS = NO ++GENERATE_LEGEND = YES ++DOT_CLEANUP = YES ++#--------------------------------------------------------------------------- ++# Configuration::additions related to the search engine ++#--------------------------------------------------------------------------- ++SEARCHENGINE = NO +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_cc.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_cc.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,532 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_cc.c $ ++ * $Revision: #4 $ ++ * $Date: 2010/11/04 $ ++ * $Change: 1621692 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++#ifdef DWC_CCLIB ++ ++#include "dwc_cc.h" ++ ++typedef struct dwc_cc ++{ ++ uint32_t uid; ++ uint8_t chid[16]; ++ uint8_t cdid[16]; ++ uint8_t ck[16]; ++ uint8_t *name; ++ uint8_t length; ++ DWC_CIRCLEQ_ENTRY(dwc_cc) list_entry; ++} dwc_cc_t; ++ ++DWC_CIRCLEQ_HEAD(context_list, dwc_cc); ++ ++/** The main structure for CC management. */ ++struct dwc_cc_if ++{ ++ dwc_mutex_t *mutex; ++ char *filename; ++ ++ unsigned is_host:1; ++ ++ dwc_notifier_t *notifier; ++ ++ struct context_list list; ++}; ++ ++#ifdef DEBUG ++static inline void dump_bytes(char *name, uint8_t *bytes, int len) ++{ ++ int i; ++ DWC_PRINTF("%s: ", name); ++ for (i=0; ilength = length; ++ cc->name = dwc_alloc(mem_ctx, length); ++ if (!cc->name) { ++ dwc_free(mem_ctx, cc); ++ return NULL; ++ } ++ ++ DWC_MEMCPY(cc->name, name, length); ++ } ++ ++ return cc; ++} ++ ++static void free_cc(void *mem_ctx, dwc_cc_t *cc) ++{ ++ if (cc->name) { ++ dwc_free(mem_ctx, cc->name); ++ } ++ dwc_free(mem_ctx, cc); ++} ++ ++static uint32_t next_uid(dwc_cc_if_t *cc_if) ++{ ++ uint32_t uid = 0; ++ dwc_cc_t *cc; ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ if (cc->uid > uid) { ++ uid = cc->uid; ++ } ++ } ++ ++ if (uid == 0) { ++ uid = 255; ++ } ++ ++ return uid + 1; ++} ++ ++static dwc_cc_t *cc_find(dwc_cc_if_t *cc_if, uint32_t uid) ++{ ++ dwc_cc_t *cc; ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ if (cc->uid == uid) { ++ return cc; ++ } ++ } ++ return NULL; ++} ++ ++static unsigned int cc_data_size(dwc_cc_if_t *cc_if) ++{ ++ unsigned int size = 0; ++ dwc_cc_t *cc; ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ size += (48 + 1); ++ if (cc->name) { ++ size += cc->length; ++ } ++ } ++ return size; ++} ++ ++static uint32_t cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid) ++{ ++ uint32_t uid = 0; ++ dwc_cc_t *cc; ++ ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ if (DWC_MEMCMP(cc->chid, chid, 16) == 0) { ++ uid = cc->uid; ++ break; ++ } ++ } ++ return uid; ++} ++static uint32_t cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid) ++{ ++ uint32_t uid = 0; ++ dwc_cc_t *cc; ++ ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ if (DWC_MEMCMP(cc->cdid, cdid, 16) == 0) { ++ uid = cc->uid; ++ break; ++ } ++ } ++ return uid; ++} ++ ++/* Internal cc_add */ ++static int32_t cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid, ++ uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length) ++{ ++ dwc_cc_t *cc; ++ uint32_t uid; ++ ++ if (cc_if->is_host) { ++ uid = cc_match_cdid(cc_if, cdid); ++ } ++ else { ++ uid = cc_match_chid(cc_if, chid); ++ } ++ ++ if (uid) { ++ DWC_DEBUGC("Replacing previous connection context id=%d name=%p name_len=%d", uid, name, length); ++ cc = cc_find(cc_if, uid); ++ } ++ else { ++ cc = alloc_cc(mem_ctx, name, length); ++ cc->uid = next_uid(cc_if); ++ DWC_CIRCLEQ_INSERT_TAIL(&cc_if->list, cc, list_entry); ++ } ++ ++ DWC_MEMCPY(&(cc->chid[0]), chid, 16); ++ DWC_MEMCPY(&(cc->cdid[0]), cdid, 16); ++ DWC_MEMCPY(&(cc->ck[0]), ck, 16); ++ ++ DWC_DEBUGC("Added connection context id=%d name=%p name_len=%d", cc->uid, name, length); ++ dump_bytes("CHID", cc->chid, 16); ++ dump_bytes("CDID", cc->cdid, 16); ++ dump_bytes("CK", cc->ck, 16); ++ return cc->uid; ++} ++ ++/* Internal cc_clear */ ++static void cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if) ++{ ++ while (!DWC_CIRCLEQ_EMPTY(&cc_if->list)) { ++ dwc_cc_t *cc = DWC_CIRCLEQ_FIRST(&cc_if->list); ++ DWC_CIRCLEQ_REMOVE_INIT(&cc_if->list, cc, list_entry); ++ free_cc(mem_ctx, cc); ++ } ++} ++ ++dwc_cc_if_t *dwc_cc_if_alloc(void *mem_ctx, void *mtx_ctx, ++ dwc_notifier_t *notifier, unsigned is_host) ++{ ++ dwc_cc_if_t *cc_if = NULL; ++ ++ /* Allocate a common_cc_if structure */ ++ cc_if = dwc_alloc(mem_ctx, sizeof(dwc_cc_if_t)); ++ ++ if (!cc_if) ++ return NULL; ++ ++#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)) ++ DWC_MUTEX_ALLOC_LINUX_DEBUG(cc_if->mutex); ++#else ++ cc_if->mutex = dwc_mutex_alloc(mtx_ctx); ++#endif ++ if (!cc_if->mutex) { ++ dwc_free(mem_ctx, cc_if); ++ return NULL; ++ } ++ ++ DWC_CIRCLEQ_INIT(&cc_if->list); ++ cc_if->is_host = is_host; ++ cc_if->notifier = notifier; ++ return cc_if; ++} ++ ++void dwc_cc_if_free(void *mem_ctx, void *mtx_ctx, dwc_cc_if_t *cc_if) ++{ ++#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)) ++ DWC_MUTEX_FREE(cc_if->mutex); ++#else ++ dwc_mutex_free(mtx_ctx, cc_if->mutex); ++#endif ++ cc_clear(mem_ctx, cc_if); ++ dwc_free(mem_ctx, cc_if); ++} ++ ++static void cc_changed(dwc_cc_if_t *cc_if) ++{ ++ if (cc_if->notifier) { ++ dwc_notify(cc_if->notifier, DWC_CC_LIST_CHANGED_NOTIFICATION, cc_if); ++ } ++} ++ ++void dwc_cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if) ++{ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc_clear(mem_ctx, cc_if); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ cc_changed(cc_if); ++} ++ ++int32_t dwc_cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid, ++ uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length) ++{ ++ uint32_t uid; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ uid = cc_add(mem_ctx, cc_if, chid, cdid, ck, name, length); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ cc_changed(cc_if); ++ ++ return uid; ++} ++ ++void dwc_cc_change(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id, uint8_t *chid, ++ uint8_t *cdid, uint8_t *ck, uint8_t *name, uint8_t length) ++{ ++ dwc_cc_t* cc; ++ ++ DWC_DEBUGC("Change connection context %d", id); ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc = cc_find(cc_if, id); ++ if (!cc) { ++ DWC_ERROR("Uid %d not found in cc list\n", id); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return; ++ } ++ ++ if (chid) { ++ DWC_MEMCPY(&(cc->chid[0]), chid, 16); ++ } ++ if (cdid) { ++ DWC_MEMCPY(&(cc->cdid[0]), cdid, 16); ++ } ++ if (ck) { ++ DWC_MEMCPY(&(cc->ck[0]), ck, 16); ++ } ++ ++ if (name) { ++ if (cc->name) { ++ dwc_free(mem_ctx, cc->name); ++ } ++ cc->name = dwc_alloc(mem_ctx, length); ++ if (!cc->name) { ++ DWC_ERROR("Out of memory in dwc_cc_change()\n"); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return; ++ } ++ cc->length = length; ++ DWC_MEMCPY(cc->name, name, length); ++ } ++ ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ cc_changed(cc_if); ++ ++ DWC_DEBUGC("Changed connection context id=%d\n", id); ++ dump_bytes("New CHID", cc->chid, 16); ++ dump_bytes("New CDID", cc->cdid, 16); ++ dump_bytes("New CK", cc->ck, 16); ++} ++ ++void dwc_cc_remove(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id) ++{ ++ dwc_cc_t *cc; ++ ++ DWC_DEBUGC("Removing connection context %d", id); ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc = cc_find(cc_if, id); ++ if (!cc) { ++ DWC_ERROR("Uid %d not found in cc list\n", id); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return; ++ } ++ ++ DWC_CIRCLEQ_REMOVE_INIT(&cc_if->list, cc, list_entry); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ free_cc(mem_ctx, cc); ++ ++ cc_changed(cc_if); ++} ++ ++uint8_t *dwc_cc_data_for_save(void *mem_ctx, dwc_cc_if_t *cc_if, unsigned int *length) ++{ ++ uint8_t *buf, *x; ++ uint8_t zero = 0; ++ dwc_cc_t *cc; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ *length = cc_data_size(cc_if); ++ if (!(*length)) { ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return NULL; ++ } ++ ++ DWC_DEBUGC("Creating data for saving (length=%d)", *length); ++ ++ buf = dwc_alloc(mem_ctx, *length); ++ if (!buf) { ++ *length = 0; ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return NULL; ++ } ++ ++ x = buf; ++ DWC_CIRCLEQ_FOREACH(cc, &cc_if->list, list_entry) { ++ DWC_MEMCPY(x, cc->chid, 16); ++ x += 16; ++ DWC_MEMCPY(x, cc->cdid, 16); ++ x += 16; ++ DWC_MEMCPY(x, cc->ck, 16); ++ x += 16; ++ if (cc->name) { ++ DWC_MEMCPY(x, &cc->length, 1); ++ x += 1; ++ DWC_MEMCPY(x, cc->name, cc->length); ++ x += cc->length; ++ } ++ else { ++ DWC_MEMCPY(x, &zero, 1); ++ x += 1; ++ } ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ return buf; ++} ++ ++void dwc_cc_restore_from_data(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *data, uint32_t length) ++{ ++ uint8_t name_length; ++ uint8_t *name; ++ uint8_t *chid; ++ uint8_t *cdid; ++ uint8_t *ck; ++ uint32_t i = 0; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc_clear(mem_ctx, cc_if); ++ ++ while (i < length) { ++ chid = &data[i]; ++ i += 16; ++ cdid = &data[i]; ++ i += 16; ++ ck = &data[i]; ++ i += 16; ++ ++ name_length = data[i]; ++ i ++; ++ ++ if (name_length) { ++ name = &data[i]; ++ i += name_length; ++ } ++ else { ++ name = NULL; ++ } ++ ++ /* check to see if we haven't overflown the buffer */ ++ if (i > length) { ++ DWC_ERROR("Data format error while attempting to load CCs " ++ "(nlen=%d, iter=%d, buflen=%d).\n", name_length, i, length); ++ break; ++ } ++ ++ cc_add(mem_ctx, cc_if, chid, cdid, ck, name, name_length); ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ cc_changed(cc_if); ++} ++ ++uint32_t dwc_cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid) ++{ ++ uint32_t uid = 0; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ uid = cc_match_chid(cc_if, chid); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return uid; ++} ++uint32_t dwc_cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid) ++{ ++ uint32_t uid = 0; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ uid = cc_match_cdid(cc_if, cdid); ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ return uid; ++} ++ ++uint8_t *dwc_cc_ck(dwc_cc_if_t *cc_if, int32_t id) ++{ ++ uint8_t *ck = NULL; ++ dwc_cc_t *cc; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc = cc_find(cc_if, id); ++ if (cc) { ++ ck = cc->ck; ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ return ck; ++ ++} ++ ++uint8_t *dwc_cc_chid(dwc_cc_if_t *cc_if, int32_t id) ++{ ++ uint8_t *retval = NULL; ++ dwc_cc_t *cc; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc = cc_find(cc_if, id); ++ if (cc) { ++ retval = cc->chid; ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ return retval; ++} ++ ++uint8_t *dwc_cc_cdid(dwc_cc_if_t *cc_if, int32_t id) ++{ ++ uint8_t *retval = NULL; ++ dwc_cc_t *cc; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ cc = cc_find(cc_if, id); ++ if (cc) { ++ retval = cc->cdid; ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ return retval; ++} ++ ++uint8_t *dwc_cc_name(dwc_cc_if_t *cc_if, int32_t id, uint8_t *length) ++{ ++ uint8_t *retval = NULL; ++ dwc_cc_t *cc; ++ ++ DWC_MUTEX_LOCK(cc_if->mutex); ++ *length = 0; ++ cc = cc_find(cc_if, id); ++ if (cc) { ++ *length = cc->length; ++ retval = cc->name; ++ } ++ DWC_MUTEX_UNLOCK(cc_if->mutex); ++ ++ return retval; ++} ++ ++#endif /* DWC_CCLIB */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_cc.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_cc.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,225 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_cc.h $ ++ * $Revision: #4 $ ++ * $Date: 2010/09/28 $ ++ * $Change: 1596182 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++#ifndef _DWC_CC_H_ ++#define _DWC_CC_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/** @file ++ * ++ * This file defines the Context Context library. ++ * ++ * The main data structure is dwc_cc_if_t which is returned by either the ++ * dwc_cc_if_alloc function or returned by the module to the user via a provided ++ * function. The data structure is opaque and should only be manipulated via the ++ * functions provied in this API. ++ * ++ * It manages a list of connection contexts and operations can be performed to ++ * add, remove, query, search, and change, those contexts. Additionally, ++ * a dwc_notifier_t object can be requested from the manager so that ++ * the user can be notified whenever the context list has changed. ++ */ ++ ++#include "dwc_os.h" ++#include "dwc_list.h" ++#include "dwc_notifier.h" ++ ++ ++/* Notifications */ ++#define DWC_CC_LIST_CHANGED_NOTIFICATION "DWC_CC_LIST_CHANGED_NOTIFICATION" ++ ++struct dwc_cc_if; ++typedef struct dwc_cc_if dwc_cc_if_t; ++ ++ ++/** @name Connection Context Operations */ ++/** @{ */ ++ ++/** This function allocates memory for a dwc_cc_if_t structure, initializes ++ * fields to default values, and returns a pointer to the structure or NULL on ++ * error. */ ++extern dwc_cc_if_t *dwc_cc_if_alloc(void *mem_ctx, void *mtx_ctx, ++ dwc_notifier_t *notifier, unsigned is_host); ++ ++/** Frees the memory for the specified CC structure allocated from ++ * dwc_cc_if_alloc(). */ ++extern void dwc_cc_if_free(void *mem_ctx, void *mtx_ctx, dwc_cc_if_t *cc_if); ++ ++/** Removes all contexts from the connection context list */ ++extern void dwc_cc_clear(void *mem_ctx, dwc_cc_if_t *cc_if); ++ ++/** Adds a connection context (CHID, CK, CDID, Name) to the connection context list. ++ * If a CHID already exists, the CK and name are overwritten. Statistics are ++ * not overwritten. ++ * ++ * @param cc_if The cc_if structure. ++ * @param chid A pointer to the 16-byte CHID. This value will be copied. ++ * @param ck A pointer to the 16-byte CK. This value will be copied. ++ * @param cdid A pointer to the 16-byte CDID. This value will be copied. ++ * @param name An optional host friendly name as defined in the association model ++ * spec. Must be a UTF16-LE unicode string. Can be NULL to indicated no name. ++ * @param length The length othe unicode string. ++ * @return A unique identifier used to refer to this context that is valid for ++ * as long as this context is still in the list. */ ++extern int32_t dwc_cc_add(void *mem_ctx, dwc_cc_if_t *cc_if, uint8_t *chid, ++ uint8_t *cdid, uint8_t *ck, uint8_t *name, ++ uint8_t length); ++ ++/** Changes the CHID, CK, CDID, or Name values of a connection context in the ++ * list, preserving any accumulated statistics. This would typically be called ++ * if the host decideds to change the context with a SET_CONNECTION request. ++ * ++ * @param cc_if The cc_if structure. ++ * @param id The identifier of the connection context. ++ * @param chid A pointer to the 16-byte CHID. This value will be copied. NULL ++ * indicates no change. ++ * @param cdid A pointer to the 16-byte CDID. This value will be copied. NULL ++ * indicates no change. ++ * @param ck A pointer to the 16-byte CK. This value will be copied. NULL ++ * indicates no change. ++ * @param name Host friendly name UTF16-LE. NULL indicates no change. ++ * @param length Length of name. */ ++extern void dwc_cc_change(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id, ++ uint8_t *chid, uint8_t *cdid, uint8_t *ck, ++ uint8_t *name, uint8_t length); ++ ++/** Remove the specified connection context. ++ * @param cc_if The cc_if structure. ++ * @param id The identifier of the connection context to remove. */ ++extern void dwc_cc_remove(void *mem_ctx, dwc_cc_if_t *cc_if, int32_t id); ++ ++/** Get a binary block of data for the connection context list and attributes. ++ * This data can be used by the OS specific driver to save the connection ++ * context list into non-volatile memory. ++ * ++ * @param cc_if The cc_if structure. ++ * @param length Return the length of the data buffer. ++ * @return A pointer to the data buffer. The memory for this buffer should be ++ * freed with DWC_FREE() after use. */ ++extern uint8_t *dwc_cc_data_for_save(void *mem_ctx, dwc_cc_if_t *cc_if, ++ unsigned int *length); ++ ++/** Restore the connection context list from the binary data that was previously ++ * returned from a call to dwc_cc_data_for_save. This can be used by the OS specific ++ * driver to load a connection context list from non-volatile memory. ++ * ++ * @param cc_if The cc_if structure. ++ * @param data The data bytes as returned from dwc_cc_data_for_save. ++ * @param length The length of the data. */ ++extern void dwc_cc_restore_from_data(void *mem_ctx, dwc_cc_if_t *cc_if, ++ uint8_t *data, unsigned int length); ++ ++/** Find the connection context from the specified CHID. ++ * ++ * @param cc_if The cc_if structure. ++ * @param chid A pointer to the CHID data. ++ * @return A non-zero identifier of the connection context if the CHID matches. ++ * Otherwise returns 0. */ ++extern uint32_t dwc_cc_match_chid(dwc_cc_if_t *cc_if, uint8_t *chid); ++ ++/** Find the connection context from the specified CDID. ++ * ++ * @param cc_if The cc_if structure. ++ * @param cdid A pointer to the CDID data. ++ * @return A non-zero identifier of the connection context if the CHID matches. ++ * Otherwise returns 0. */ ++extern uint32_t dwc_cc_match_cdid(dwc_cc_if_t *cc_if, uint8_t *cdid); ++ ++/** Retrieve the CK from the specified connection context. ++ * ++ * @param cc_if The cc_if structure. ++ * @param id The identifier of the connection context. ++ * @return A pointer to the CK data. The memory does not need to be freed. */ ++extern uint8_t *dwc_cc_ck(dwc_cc_if_t *cc_if, int32_t id); ++ ++/** Retrieve the CHID from the specified connection context. ++ * ++ * @param cc_if The cc_if structure. ++ * @param id The identifier of the connection context. ++ * @return A pointer to the CHID data. The memory does not need to be freed. */ ++extern uint8_t *dwc_cc_chid(dwc_cc_if_t *cc_if, int32_t id); ++ ++/** Retrieve the CDID from the specified connection context. ++ * ++ * @param cc_if The cc_if structure. ++ * @param id The identifier of the connection context. ++ * @return A pointer to the CDID data. The memory does not need to be freed. */ ++extern uint8_t *dwc_cc_cdid(dwc_cc_if_t *cc_if, int32_t id); ++ ++extern uint8_t *dwc_cc_name(dwc_cc_if_t *cc_if, int32_t id, uint8_t *length); ++ ++/** Checks a buffer for non-zero. ++ * @param id A pointer to a 16 byte buffer. ++ * @return true if the 16 byte value is non-zero. */ ++static inline unsigned dwc_assoc_is_not_zero_id(uint8_t *id) { ++ int i; ++ for (i=0; i<16; i++) { ++ if (id[i]) return 1; ++ } ++ return 0; ++} ++ ++/** Checks a buffer for zero. ++ * @param id A pointer to a 16 byte buffer. ++ * @return true if the 16 byte value is zero. */ ++static inline unsigned dwc_assoc_is_zero_id(uint8_t *id) { ++ return !dwc_assoc_is_not_zero_id(id); ++} ++ ++/** Prints an ASCII representation for the 16-byte chid, cdid, or ck, into ++ * buffer. */ ++static inline int dwc_print_id_string(char *buffer, uint8_t *id) { ++ char *ptr = buffer; ++ int i; ++ for (i=0; i<16; i++) { ++ ptr += DWC_SPRINTF(ptr, "%02x", id[i]); ++ if (i < 15) { ++ ptr += DWC_SPRINTF(ptr, " "); ++ } ++ } ++ return ptr - buffer; ++} ++ ++/** @} */ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DWC_CC_H_ */ ++ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_fbsd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_fbsd.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1308 @@ ++#include "dwc_os.h" ++#include "dwc_list.h" ++ ++#ifdef DWC_CCLIB ++# include "dwc_cc.h" ++#endif ++ ++#ifdef DWC_CRYPTOLIB ++# include "dwc_modpow.h" ++# include "dwc_dh.h" ++# include "dwc_crypto.h" ++#endif ++ ++#ifdef DWC_NOTIFYLIB ++# include "dwc_notifier.h" ++#endif ++ ++/* OS-Level Implementations */ ++ ++/* This is the FreeBSD 7.0 kernel implementation of the DWC platform library. */ ++ ++ ++/* MISC */ ++ ++void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size) ++{ ++ return memset(dest, byte, size); ++} ++ ++void *DWC_MEMCPY(void *dest, void const *src, uint32_t size) ++{ ++ return memcpy(dest, src, size); ++} ++ ++void *DWC_MEMMOVE(void *dest, void *src, uint32_t size) ++{ ++ bcopy(src, dest, size); ++ return dest; ++} ++ ++int DWC_MEMCMP(void *m1, void *m2, uint32_t size) ++{ ++ return memcmp(m1, m2, size); ++} ++ ++int DWC_STRNCMP(void *s1, void *s2, uint32_t size) ++{ ++ return strncmp(s1, s2, size); ++} ++ ++int DWC_STRCMP(void *s1, void *s2) ++{ ++ return strcmp(s1, s2); ++} ++ ++int DWC_STRLEN(char const *str) ++{ ++ return strlen(str); ++} ++ ++char *DWC_STRCPY(char *to, char const *from) ++{ ++ return strcpy(to, from); ++} ++ ++char *DWC_STRDUP(char const *str) ++{ ++ int len = DWC_STRLEN(str) + 1; ++ char *new = DWC_ALLOC_ATOMIC(len); ++ ++ if (!new) { ++ return NULL; ++ } ++ ++ DWC_MEMCPY(new, str, len); ++ return new; ++} ++ ++int DWC_ATOI(char *str, int32_t *value) ++{ ++ char *end = NULL; ++ ++ *value = strtol(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++int DWC_ATOUI(char *str, uint32_t *value) ++{ ++ char *end = NULL; ++ ++ *value = strtoul(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++ ++#ifdef DWC_UTFLIB ++/* From usbstring.c */ ++ ++int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len) ++{ ++ int count = 0; ++ u8 c; ++ u16 uchar; ++ ++ /* this insists on correct encodings, though not minimal ones. ++ * BUT it currently rejects legit 4-byte UTF-8 code points, ++ * which need surrogate pairs. (Unicode 3.1 can use them.) ++ */ ++ while (len != 0 && (c = (u8) *s++) != 0) { ++ if (unlikely(c & 0x80)) { ++ // 2-byte sequence: ++ // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx ++ if ((c & 0xe0) == 0xc0) { ++ uchar = (c & 0x1f) << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ // 3-byte sequence (most CJKV characters): ++ // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx ++ } else if ((c & 0xf0) == 0xe0) { ++ uchar = (c & 0x0f) << 12; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ /* no bogus surrogates */ ++ if (0xd800 <= uchar && uchar <= 0xdfff) ++ goto fail; ++ ++ // 4-byte sequence (surrogate pairs, currently rare): ++ // 11101110wwwwzzzzyy + 110111yyyyxxxxxx ++ // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx ++ // (uuuuu = wwww + 1) ++ // FIXME accept the surrogate code points (only) ++ } else ++ goto fail; ++ } else ++ uchar = c; ++ put_unaligned (cpu_to_le16 (uchar), cp++); ++ count++; ++ len--; ++ } ++ return count; ++fail: ++ return -1; ++} ++ ++#endif /* DWC_UTFLIB */ ++ ++ ++/* dwc_debug.h */ ++ ++dwc_bool_t DWC_IN_IRQ(void) ++{ ++// return in_irq(); ++ return 0; ++} ++ ++dwc_bool_t DWC_IN_BH(void) ++{ ++// return in_softirq(); ++ return 0; ++} ++ ++void DWC_VPRINTF(char *format, va_list args) ++{ ++ vprintf(format, args); ++} ++ ++int DWC_VSNPRINTF(char *str, int size, char *format, va_list args) ++{ ++ return vsnprintf(str, size, format, args); ++} ++ ++void DWC_PRINTF(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++int DWC_SPRINTF(char *buffer, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsprintf(buffer, format, args); ++ va_end(args); ++ return retval; ++} ++ ++int DWC_SNPRINTF(char *buffer, int size, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsnprintf(buffer, size, format, args); ++ va_end(args); ++ return retval; ++} ++ ++void __DWC_WARN(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void __DWC_ERROR(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void DWC_EXCEPTION(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++// BUG_ON(1); ??? ++} ++ ++#ifdef DEBUG ++void __DWC_DEBUG(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++#endif ++ ++ ++/* dwc_mem.h */ ++ ++#if 0 ++dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size, ++ uint32_t align, ++ uint32_t alloc) ++{ ++ struct dma_pool *pool = dma_pool_create("Pool", NULL, ++ size, align, alloc); ++ return (dwc_pool_t *)pool; ++} ++ ++void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool) ++{ ++ dma_pool_destroy((struct dma_pool *)pool); ++} ++ ++void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++// return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr); ++ return dma_pool_alloc((struct dma_pool *)pool, M_WAITOK, dma_addr); ++} ++ ++void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++ void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr); ++ memset(..); ++} ++ ++void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr) ++{ ++ dma_pool_free(pool, vaddr, daddr); ++} ++#endif ++ ++static void dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error) ++{ ++ if (error) ++ return; ++ *(bus_addr_t *)arg = segs[0].ds_addr; ++} ++ ++void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr) ++{ ++ dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx; ++ int error; ++ ++ error = bus_dma_tag_create( ++#if __FreeBSD_version >= 700000 ++ bus_get_dma_tag(dma->dev), /* parent */ ++#else ++ NULL, /* parent */ ++#endif ++ 4, 0, /* alignment, bounds */ ++ BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ ++ BUS_SPACE_MAXADDR, /* highaddr */ ++ NULL, NULL, /* filter, filterarg */ ++ size, /* maxsize */ ++ 1, /* nsegments */ ++ size, /* maxsegsize */ ++ 0, /* flags */ ++ NULL, /* lockfunc */ ++ NULL, /* lockarg */ ++ &dma->dma_tag); ++ if (error) { ++ device_printf(dma->dev, "%s: bus_dma_tag_create failed: %d\n", ++ __func__, error); ++ goto fail_0; ++ } ++ ++ error = bus_dmamem_alloc(dma->dma_tag, &dma->dma_vaddr, ++ BUS_DMA_NOWAIT | BUS_DMA_COHERENT, &dma->dma_map); ++ if (error) { ++ device_printf(dma->dev, "%s: bus_dmamem_alloc(%ju) failed: %d\n", ++ __func__, (uintmax_t)size, error); ++ goto fail_1; ++ } ++ ++ dma->dma_paddr = 0; ++ error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, size, ++ dmamap_cb, &dma->dma_paddr, BUS_DMA_NOWAIT); ++ if (error || dma->dma_paddr == 0) { ++ device_printf(dma->dev, "%s: bus_dmamap_load failed: %d\n", ++ __func__, error); ++ goto fail_2; ++ } ++ ++ *dma_addr = dma->dma_paddr; ++ return dma->dma_vaddr; ++ ++fail_2: ++ bus_dmamap_unload(dma->dma_tag, dma->dma_map); ++fail_1: ++ bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); ++ bus_dma_tag_destroy(dma->dma_tag); ++fail_0: ++ dma->dma_map = NULL; ++ dma->dma_tag = NULL; ++ ++ return NULL; ++} ++ ++void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr) ++{ ++ dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx; ++ ++ if (dma->dma_tag == NULL) ++ return; ++ if (dma->dma_map != NULL) { ++ bus_dmamap_sync(dma->dma_tag, dma->dma_map, ++ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); ++ bus_dmamap_unload(dma->dma_tag, dma->dma_map); ++ bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map); ++ dma->dma_map = NULL; ++ } ++ ++ bus_dma_tag_destroy(dma->dma_tag); ++ dma->dma_tag = NULL; ++} ++ ++void *__DWC_ALLOC(void *mem_ctx, uint32_t size) ++{ ++ return malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); ++} ++ ++void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size) ++{ ++ return malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); ++} ++ ++void __DWC_FREE(void *mem_ctx, void *addr) ++{ ++ free(addr, M_DEVBUF); ++} ++ ++ ++#ifdef DWC_CRYPTOLIB ++/* dwc_crypto.h */ ++ ++void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length) ++{ ++ get_random_bytes(buffer, length); ++} ++ ++int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out) ++{ ++ struct crypto_blkcipher *tfm; ++ struct blkcipher_desc desc; ++ struct scatterlist sgd; ++ struct scatterlist sgs; ++ ++ tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC); ++ if (tfm == NULL) { ++ printk("failed to load transform for aes CBC\n"); ++ return -1; ++ } ++ ++ crypto_blkcipher_setkey(tfm, key, keylen); ++ crypto_blkcipher_set_iv(tfm, iv, 16); ++ ++ sg_init_one(&sgd, out, messagelen); ++ sg_init_one(&sgs, message, messagelen); ++ ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) { ++ crypto_free_blkcipher(tfm); ++ DWC_ERROR("AES CBC encryption failed"); ++ return -1; ++ } ++ ++ crypto_free_blkcipher(tfm); ++ return 0; ++} ++ ++int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for sha256: %ld", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, len); ++ crypto_hash_digest(&desc, &sg, len, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++ ++int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen, ++ uint8_t *key, uint32_t keylen, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for hmac(sha256): %ld", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, messagelen); ++ crypto_hash_setkey(tfm, key, keylen); ++ crypto_hash_digest(&desc, &sg, messagelen, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++ ++#endif /* DWC_CRYPTOLIB */ ++ ++ ++/* Byte Ordering Conversions */ ++ ++uint32_t DWC_CPU_TO_LE32(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_CPU_TO_BE32(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_LE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_BE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_LE16(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_BE16(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_LE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_BE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++ ++/* Registers */ ++ ++uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ return bus_space_read_4(io->iot, io->ioh, ior); ++} ++ ++#if 0 ++uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ return bus_space_read_8(io->iot, io->ioh, ior); ++} ++#endif ++ ++void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_4(io->iot, io->ioh, ior, value); ++} ++ ++#if 0 ++void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_8(io->iot, io->ioh, ior, value); ++} ++#endif ++ ++void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask, ++ uint32_t set_mask) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_4(io->iot, io->ioh, ior, ++ (bus_space_read_4(io->iot, io->ioh, ior) & ++ ~clear_mask) | set_mask); ++} ++ ++#if 0 ++void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask, ++ uint64_t set_mask) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_8(io->iot, io->ioh, ior, ++ (bus_space_read_8(io->iot, io->ioh, ior) & ++ ~clear_mask) | set_mask); ++} ++#endif ++ ++ ++/* Locking */ ++ ++dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void) ++{ ++ struct mtx *sl = DWC_ALLOC(sizeof(*sl)); ++ ++ if (!sl) { ++ DWC_ERROR("Cannot allocate memory for spinlock"); ++ return NULL; ++ } ++ ++ mtx_init(sl, "dw3spn", NULL, MTX_SPIN); ++ return (dwc_spinlock_t *)sl; ++} ++ ++void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock) ++{ ++ struct mtx *sl = (struct mtx *)lock; ++ ++ mtx_destroy(sl); ++ DWC_FREE(sl); ++} ++ ++void DWC_SPINLOCK(dwc_spinlock_t *lock) ++{ ++ mtx_lock_spin((struct mtx *)lock); // ??? ++} ++ ++void DWC_SPINUNLOCK(dwc_spinlock_t *lock) ++{ ++ mtx_unlock_spin((struct mtx *)lock); // ??? ++} ++ ++void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags) ++{ ++ mtx_lock_spin((struct mtx *)lock); ++} ++ ++void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags) ++{ ++ mtx_unlock_spin((struct mtx *)lock); ++} ++ ++dwc_mutex_t *DWC_MUTEX_ALLOC(void) ++{ ++ struct mtx *m; ++ dwc_mutex_t *mutex = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mtx)); ++ ++ if (!mutex) { ++ DWC_ERROR("Cannot allocate memory for mutex"); ++ return NULL; ++ } ++ ++ m = (struct mtx *)mutex; ++ mtx_init(m, "dw3mtx", NULL, MTX_DEF); ++ return mutex; ++} ++ ++#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)) ++#else ++void DWC_MUTEX_FREE(dwc_mutex_t *mutex) ++{ ++ mtx_destroy((struct mtx *)mutex); ++ DWC_FREE(mutex); ++} ++#endif ++ ++void DWC_MUTEX_LOCK(dwc_mutex_t *mutex) ++{ ++ struct mtx *m = (struct mtx *)mutex; ++ ++ mtx_lock(m); ++} ++ ++int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex) ++{ ++ struct mtx *m = (struct mtx *)mutex; ++ ++ return mtx_trylock(m); ++} ++ ++void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex) ++{ ++ struct mtx *m = (struct mtx *)mutex; ++ ++ mtx_unlock(m); ++} ++ ++ ++/* Timing */ ++ ++void DWC_UDELAY(uint32_t usecs) ++{ ++ DELAY(usecs); ++} ++ ++void DWC_MDELAY(uint32_t msecs) ++{ ++ do { ++ DELAY(1000); ++ } while (--msecs); ++} ++ ++void DWC_MSLEEP(uint32_t msecs) ++{ ++ struct timeval tv; ++ ++ tv.tv_sec = msecs / 1000; ++ tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000; ++ pause("dw3slp", tvtohz(&tv)); ++} ++ ++uint32_t DWC_TIME(void) ++{ ++ struct timeval tv; ++ ++ microuptime(&tv); // or getmicrouptime? (less precise, but faster) ++ return tv.tv_sec * 1000 + tv.tv_usec / 1000; ++} ++ ++ ++/* Timers */ ++ ++struct dwc_timer { ++ struct callout t; ++ char *name; ++ dwc_spinlock_t *lock; ++ dwc_timer_callback_t cb; ++ void *data; ++}; ++ ++dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data) ++{ ++ dwc_timer_t *t = DWC_ALLOC(sizeof(*t)); ++ ++ if (!t) { ++ DWC_ERROR("Cannot allocate memory for timer"); ++ return NULL; ++ } ++ ++ callout_init(&t->t, 1); ++ ++ t->name = DWC_STRDUP(name); ++ if (!t->name) { ++ DWC_ERROR("Cannot allocate memory for timer->name"); ++ goto no_name; ++ } ++ ++ t->lock = DWC_SPINLOCK_ALLOC(); ++ if (!t->lock) { ++ DWC_ERROR("Cannot allocate memory for lock"); ++ goto no_lock; ++ } ++ ++ t->cb = cb; ++ t->data = data; ++ ++ return t; ++ ++ no_lock: ++ DWC_FREE(t->name); ++ no_name: ++ DWC_FREE(t); ++ ++ return NULL; ++} ++ ++void DWC_TIMER_FREE(dwc_timer_t *timer) ++{ ++ callout_stop(&timer->t); ++ DWC_SPINLOCK_FREE(timer->lock); ++ DWC_FREE(timer->name); ++ DWC_FREE(timer); ++} ++ ++void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time) ++{ ++ struct timeval tv; ++ ++ tv.tv_sec = time / 1000; ++ tv.tv_usec = (time - tv.tv_sec * 1000) * 1000; ++ callout_reset(&timer->t, tvtohz(&tv), timer->cb, timer->data); ++} ++ ++void DWC_TIMER_CANCEL(dwc_timer_t *timer) ++{ ++ callout_stop(&timer->t); ++} ++ ++ ++/* Wait Queues */ ++ ++struct dwc_waitq { ++ struct mtx lock; ++ int abort; ++}; ++ ++dwc_waitq_t *DWC_WAITQ_ALLOC(void) ++{ ++ dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ DWC_ERROR("Cannot allocate memory for waitqueue"); ++ return NULL; ++ } ++ ++ mtx_init(&wq->lock, "dw3wtq", NULL, MTX_DEF); ++ wq->abort = 0; ++ ++ return wq; ++} ++ ++void DWC_WAITQ_FREE(dwc_waitq_t *wq) ++{ ++ mtx_destroy(&wq->lock); ++ DWC_FREE(wq); ++} ++ ++int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data) ++{ ++// intrmask_t ipl; ++ int result = 0; ++ ++ mtx_lock(&wq->lock); ++// ipl = splbio(); ++ ++ /* Skip the sleep if already aborted or triggered */ ++ if (!wq->abort && !cond(data)) { ++// splx(ipl); ++ result = msleep(wq, &wq->lock, PCATCH, "dw3wat", 0); // infinite timeout ++// ipl = splbio(); ++ } ++ ++ if (result == ERESTART) { // signaled - restart ++ result = -DWC_E_RESTART; ++ ++ } else if (result == EINTR) { // signaled - interrupt ++ result = -DWC_E_ABORT; ++ ++ } else if (wq->abort) { ++ result = -DWC_E_ABORT; ++ ++ } else { ++ result = 0; ++ } ++ ++ wq->abort = 0; ++// splx(ipl); ++ mtx_unlock(&wq->lock); ++ return result; ++} ++ ++int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, ++ void *data, int32_t msecs) ++{ ++ struct timeval tv, tv1, tv2; ++// intrmask_t ipl; ++ int result = 0; ++ ++ tv.tv_sec = msecs / 1000; ++ tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000; ++ ++ mtx_lock(&wq->lock); ++// ipl = splbio(); ++ ++ /* Skip the sleep if already aborted or triggered */ ++ if (!wq->abort && !cond(data)) { ++// splx(ipl); ++ getmicrouptime(&tv1); ++ result = msleep(wq, &wq->lock, PCATCH, "dw3wto", tvtohz(&tv)); ++ getmicrouptime(&tv2); ++// ipl = splbio(); ++ } ++ ++ if (result == 0) { // awoken ++ if (wq->abort) { ++ result = -DWC_E_ABORT; ++ } else { ++ tv2.tv_usec -= tv1.tv_usec; ++ if (tv2.tv_usec < 0) { ++ tv2.tv_usec += 1000000; ++ tv2.tv_sec--; ++ } ++ ++ tv2.tv_sec -= tv1.tv_sec; ++ result = tv2.tv_sec * 1000 + tv2.tv_usec / 1000; ++ result = msecs - result; ++ if (result <= 0) ++ result = 1; ++ } ++ } else if (result == ERESTART) { // signaled - restart ++ result = -DWC_E_RESTART; ++ ++ } else if (result == EINTR) { // signaled - interrupt ++ result = -DWC_E_ABORT; ++ ++ } else { // timed out ++ result = -DWC_E_TIMEOUT; ++ } ++ ++ wq->abort = 0; ++// splx(ipl); ++ mtx_unlock(&wq->lock); ++ return result; ++} ++ ++void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq) ++{ ++ wakeup(wq); ++} ++ ++void DWC_WAITQ_ABORT(dwc_waitq_t *wq) ++{ ++// intrmask_t ipl; ++ ++ mtx_lock(&wq->lock); ++// ipl = splbio(); ++ wq->abort = 1; ++ wakeup(wq); ++// splx(ipl); ++ mtx_unlock(&wq->lock); ++} ++ ++ ++/* Threading */ ++ ++struct dwc_thread { ++ struct proc *proc; ++ int abort; ++}; ++ ++dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data) ++{ ++ int retval; ++ dwc_thread_t *thread = DWC_ALLOC(sizeof(*thread)); ++ ++ if (!thread) { ++ return NULL; ++ } ++ ++ thread->abort = 0; ++ retval = kthread_create((void (*)(void *))func, data, &thread->proc, ++ RFPROC | RFNOWAIT, 0, "%s", name); ++ if (retval) { ++ DWC_FREE(thread); ++ return NULL; ++ } ++ ++ return thread; ++} ++ ++int DWC_THREAD_STOP(dwc_thread_t *thread) ++{ ++ int retval; ++ ++ thread->abort = 1; ++ retval = tsleep(&thread->abort, 0, "dw3stp", 60 * hz); ++ ++ if (retval == 0) { ++ /* DWC_THREAD_EXIT() will free the thread struct */ ++ return 0; ++ } ++ ++ /* NOTE: We leak the thread struct if thread doesn't die */ ++ ++ if (retval == EWOULDBLOCK) { ++ return -DWC_E_TIMEOUT; ++ } ++ ++ return -DWC_E_UNKNOWN; ++} ++ ++dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread) ++{ ++ return thread->abort; ++} ++ ++void DWC_THREAD_EXIT(dwc_thread_t *thread) ++{ ++ wakeup(&thread->abort); ++ DWC_FREE(thread); ++ kthread_exit(0); ++} ++ ++ ++/* tasklets ++ - Runs in interrupt context (cannot sleep) ++ - Each tasklet runs on a single CPU [ How can we ensure this on FreeBSD? Does it matter? ] ++ - Different tasklets can be running simultaneously on different CPUs [ shouldn't matter ] ++ */ ++struct dwc_tasklet { ++ struct task t; ++ dwc_tasklet_callback_t cb; ++ void *data; ++}; ++ ++static void tasklet_callback(void *data, int pending) // what to do with pending ??? ++{ ++ dwc_tasklet_t *task = (dwc_tasklet_t *)data; ++ ++ task->cb(task->data); ++} ++ ++dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data) ++{ ++ dwc_tasklet_t *task = DWC_ALLOC(sizeof(*task)); ++ ++ if (task) { ++ task->cb = cb; ++ task->data = data; ++ TASK_INIT(&task->t, 0, tasklet_callback, task); ++ } else { ++ DWC_ERROR("Cannot allocate memory for tasklet"); ++ } ++ ++ return task; ++} ++ ++void DWC_TASK_FREE(dwc_tasklet_t *task) ++{ ++ taskqueue_drain(taskqueue_fast, &task->t); // ??? ++ DWC_FREE(task); ++} ++ ++void DWC_TASK_SCHEDULE(dwc_tasklet_t *task) ++{ ++ /* Uses predefined system queue */ ++ taskqueue_enqueue_fast(taskqueue_fast, &task->t); ++} ++ ++ ++/* workqueues ++ - Runs in process context (can sleep) ++ */ ++typedef struct work_container { ++ dwc_work_callback_t cb; ++ void *data; ++ dwc_workq_t *wq; ++ char *name; ++ int hz; ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_ENTRY(work_container) entry; ++#endif ++ struct task task; ++} work_container_t; ++ ++#ifdef DEBUG ++DWC_CIRCLEQ_HEAD(work_container_queue, work_container); ++#endif ++ ++struct dwc_workq { ++ struct taskqueue *taskq; ++ dwc_spinlock_t *lock; ++ dwc_waitq_t *waitq; ++ int pending; ++ ++#ifdef DEBUG ++ struct work_container_queue entries; ++#endif ++}; ++ ++static void do_work(void *data, int pending) // what to do with pending ??? ++{ ++ work_container_t *container = (work_container_t *)data; ++ dwc_workq_t *wq = container->wq; ++ dwc_irqflags_t flags; ++ ++ if (container->hz) { ++ pause("dw3wrk", container->hz); ++ } ++ ++ container->cb(container->data); ++ DWC_DEBUG("Work done: %s, container=%p", container->name, container); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_REMOVE(&wq->entries, container, entry); ++#endif ++ if (container->name) ++ DWC_FREE(container->name); ++ DWC_FREE(container); ++ wq->pending--; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++} ++ ++static int work_done(void *data) ++{ ++ dwc_workq_t *workq = (dwc_workq_t *)data; ++ ++ return workq->pending == 0; ++} ++ ++int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout) ++{ ++ return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout); ++} ++ ++dwc_workq_t *DWC_WORKQ_ALLOC(char *name) ++{ ++ dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ DWC_ERROR("Cannot allocate memory for workqueue"); ++ return NULL; ++ } ++ ++ wq->taskq = taskqueue_create(name, M_NOWAIT, taskqueue_thread_enqueue, &wq->taskq); ++ if (!wq->taskq) { ++ DWC_ERROR("Cannot allocate memory for taskqueue"); ++ goto no_taskq; ++ } ++ ++ wq->pending = 0; ++ ++ wq->lock = DWC_SPINLOCK_ALLOC(); ++ if (!wq->lock) { ++ DWC_ERROR("Cannot allocate memory for spinlock"); ++ goto no_lock; ++ } ++ ++ wq->waitq = DWC_WAITQ_ALLOC(); ++ if (!wq->waitq) { ++ DWC_ERROR("Cannot allocate memory for waitqueue"); ++ goto no_waitq; ++ } ++ ++ taskqueue_start_threads(&wq->taskq, 1, PWAIT, "%s taskq", "dw3tsk"); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INIT(&wq->entries); ++#endif ++ return wq; ++ ++ no_waitq: ++ DWC_SPINLOCK_FREE(wq->lock); ++ no_lock: ++ taskqueue_free(wq->taskq); ++ no_taskq: ++ DWC_FREE(wq); ++ ++ return NULL; ++} ++ ++void DWC_WORKQ_FREE(dwc_workq_t *wq) ++{ ++#ifdef DEBUG ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ ++ if (wq->pending != 0) { ++ struct work_container *container; ++ ++ DWC_ERROR("Destroying work queue with pending work"); ++ ++ DWC_CIRCLEQ_FOREACH(container, &wq->entries, entry) { ++ DWC_ERROR("Work %s still pending", container->name); ++ } ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++#endif ++ DWC_WAITQ_FREE(wq->waitq); ++ DWC_SPINLOCK_FREE(wq->lock); ++ taskqueue_free(wq->taskq); ++ DWC_FREE(wq); ++} ++ ++void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data, ++ char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ container->hz = 0; ++ ++ DWC_DEBUG("Queueing work: %s, container=%p", container->name, container); ++ ++ TASK_INIT(&container->task, 0, do_work, container); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry); ++#endif ++ taskqueue_enqueue_fast(wq->taskq, &container->task); ++} ++ ++void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb, ++ void *data, uint32_t time, char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ struct timeval tv; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ ++ tv.tv_sec = time / 1000; ++ tv.tv_usec = (time - tv.tv_sec * 1000) * 1000; ++ container->hz = tvtohz(&tv); ++ ++ DWC_DEBUG("Queueing work: %s, container=%p", container->name, container); ++ ++ TASK_INIT(&container->task, 0, do_work, container); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry); ++#endif ++ taskqueue_enqueue_fast(wq->taskq, &container->task); ++} ++ ++int DWC_WORKQ_PENDING(dwc_workq_t *wq) ++{ ++ return wq->pending; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1421 @@ ++#include ++#include ++#include ++#include ++ ++#ifdef DWC_CCLIB ++# include "dwc_cc.h" ++#endif ++ ++#ifdef DWC_CRYPTOLIB ++# include "dwc_modpow.h" ++# include "dwc_dh.h" ++# include "dwc_crypto.h" ++#endif ++ ++#ifdef DWC_NOTIFYLIB ++# include "dwc_notifier.h" ++#endif ++ ++/* OS-Level Implementations */ ++ ++/* This is the Linux kernel implementation of the DWC platform library. */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) ++# include ++#else ++# include ++#endif ++ ++#include ++#include ++#include ++#include ++ ++#include "dwc_os.h" ++#include "dwc_list.h" ++ ++ ++/* MISC */ ++ ++void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size) ++{ ++ return memset(dest, byte, size); ++} ++ ++void *DWC_MEMCPY(void *dest, void const *src, uint32_t size) ++{ ++ return memcpy(dest, src, size); ++} ++ ++void *DWC_MEMMOVE(void *dest, void *src, uint32_t size) ++{ ++ return memmove(dest, src, size); ++} ++ ++int DWC_MEMCMP(void *m1, void *m2, uint32_t size) ++{ ++ return memcmp(m1, m2, size); ++} ++ ++int DWC_STRNCMP(void *s1, void *s2, uint32_t size) ++{ ++ return strncmp(s1, s2, size); ++} ++ ++int DWC_STRCMP(void *s1, void *s2) ++{ ++ return strcmp(s1, s2); ++} ++ ++int DWC_STRLEN(char const *str) ++{ ++ return strlen(str); ++} ++ ++char *DWC_STRCPY(char *to, char const *from) ++{ ++ return strcpy(to, from); ++} ++ ++char *DWC_STRDUP(char const *str) ++{ ++ int len = DWC_STRLEN(str) + 1; ++ char *new = DWC_ALLOC_ATOMIC(len); ++ ++ if (!new) { ++ return NULL; ++ } ++ ++ DWC_MEMCPY(new, str, len); ++ return new; ++} ++ ++int DWC_ATOI(const char *str, int32_t *value) ++{ ++ char *end = NULL; ++ ++ *value = simple_strtol(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++int DWC_ATOUI(const char *str, uint32_t *value) ++{ ++ char *end = NULL; ++ ++ *value = simple_strtoul(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++ ++#ifdef DWC_UTFLIB ++/* From usbstring.c */ ++ ++int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len) ++{ ++ int count = 0; ++ u8 c; ++ u16 uchar; ++ ++ /* this insists on correct encodings, though not minimal ones. ++ * BUT it currently rejects legit 4-byte UTF-8 code points, ++ * which need surrogate pairs. (Unicode 3.1 can use them.) ++ */ ++ while (len != 0 && (c = (u8) *s++) != 0) { ++ if (unlikely(c & 0x80)) { ++ // 2-byte sequence: ++ // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx ++ if ((c & 0xe0) == 0xc0) { ++ uchar = (c & 0x1f) << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ // 3-byte sequence (most CJKV characters): ++ // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx ++ } else if ((c & 0xf0) == 0xe0) { ++ uchar = (c & 0x0f) << 12; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ /* no bogus surrogates */ ++ if (0xd800 <= uchar && uchar <= 0xdfff) ++ goto fail; ++ ++ // 4-byte sequence (surrogate pairs, currently rare): ++ // 11101110wwwwzzzzyy + 110111yyyyxxxxxx ++ // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx ++ // (uuuuu = wwww + 1) ++ // FIXME accept the surrogate code points (only) ++ } else ++ goto fail; ++ } else ++ uchar = c; ++ put_unaligned (cpu_to_le16 (uchar), cp++); ++ count++; ++ len--; ++ } ++ return count; ++fail: ++ return -1; ++} ++#endif /* DWC_UTFLIB */ ++ ++ ++/* dwc_debug.h */ ++ ++dwc_bool_t DWC_IN_IRQ(void) ++{ ++ return in_irq(); ++} ++ ++dwc_bool_t DWC_IN_BH(void) ++{ ++ return in_softirq(); ++} ++ ++void DWC_VPRINTF(char *format, va_list args) ++{ ++ vprintk(format, args); ++} ++ ++int DWC_VSNPRINTF(char *str, int size, char *format, va_list args) ++{ ++ return vsnprintf(str, size, format, args); ++} ++ ++void DWC_PRINTF(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++int DWC_SPRINTF(char *buffer, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsprintf(buffer, format, args); ++ va_end(args); ++ return retval; ++} ++ ++int DWC_SNPRINTF(char *buffer, int size, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsnprintf(buffer, size, format, args); ++ va_end(args); ++ return retval; ++} ++ ++void __DWC_WARN(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_PRINTF(KERN_WARNING); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void __DWC_ERROR(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_PRINTF(KERN_ERR); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void DWC_EXCEPTION(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_PRINTF(KERN_ERR); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++ BUG_ON(1); ++} ++ ++#ifdef DEBUG ++void __DWC_DEBUG(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_PRINTF(KERN_DEBUG); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++#endif ++ ++ ++/* dwc_mem.h */ ++ ++#if 0 ++dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size, ++ uint32_t align, ++ uint32_t alloc) ++{ ++ struct dma_pool *pool = dma_pool_create("Pool", NULL, ++ size, align, alloc); ++ return (dwc_pool_t *)pool; ++} ++ ++void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool) ++{ ++ dma_pool_destroy((struct dma_pool *)pool); ++} ++ ++void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++ return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr); ++} ++ ++void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++ void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr); ++ memset(..); ++} ++ ++void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr) ++{ ++ dma_pool_free(pool, vaddr, daddr); ++} ++#endif ++ ++void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr) ++{ ++#ifdef xxCOSIM /* Only works for 32-bit cosim */ ++ void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL); ++#else ++ void *buf = dma_alloc_coherent(dma_ctx, (size_t)size, dma_addr, GFP_KERNEL | GFP_DMA32); ++#endif ++ if (!buf) { ++ return NULL; ++ } ++ ++ memset(buf, 0, (size_t)size); ++ return buf; ++} ++ ++void *__DWC_DMA_ALLOC_ATOMIC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr) ++{ ++ void *buf = dma_alloc_coherent(NULL, (size_t)size, dma_addr, GFP_ATOMIC); ++ if (!buf) { ++ return NULL; ++ } ++ memset(buf, 0, (size_t)size); ++ return buf; ++} ++ ++void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr) ++{ ++ dma_free_coherent(dma_ctx, size, virt_addr, dma_addr); ++} ++ ++void *__DWC_ALLOC(void *mem_ctx, uint32_t size) ++{ ++ return kzalloc(size, GFP_KERNEL); ++} ++ ++void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size) ++{ ++ return kzalloc(size, GFP_ATOMIC); ++} ++ ++void __DWC_FREE(void *mem_ctx, void *addr) ++{ ++ kfree(addr); ++} ++ ++ ++#ifdef DWC_CRYPTOLIB ++/* dwc_crypto.h */ ++ ++void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length) ++{ ++ get_random_bytes(buffer, length); ++} ++ ++int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out) ++{ ++ struct crypto_blkcipher *tfm; ++ struct blkcipher_desc desc; ++ struct scatterlist sgd; ++ struct scatterlist sgs; ++ ++ tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC); ++ if (tfm == NULL) { ++ printk("failed to load transform for aes CBC\n"); ++ return -1; ++ } ++ ++ crypto_blkcipher_setkey(tfm, key, keylen); ++ crypto_blkcipher_set_iv(tfm, iv, 16); ++ ++ sg_init_one(&sgd, out, messagelen); ++ sg_init_one(&sgs, message, messagelen); ++ ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) { ++ crypto_free_blkcipher(tfm); ++ DWC_ERROR("AES CBC encryption failed"); ++ return -1; ++ } ++ ++ crypto_free_blkcipher(tfm); ++ return 0; ++} ++ ++int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for sha256: %ld\n", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, len); ++ crypto_hash_digest(&desc, &sg, len, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++ ++int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen, ++ uint8_t *key, uint32_t keylen, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for hmac(sha256): %ld\n", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, messagelen); ++ crypto_hash_setkey(tfm, key, keylen); ++ crypto_hash_digest(&desc, &sg, messagelen, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++#endif /* DWC_CRYPTOLIB */ ++ ++ ++/* Byte Ordering Conversions */ ++ ++uint32_t DWC_CPU_TO_LE32(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_CPU_TO_BE32(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_LE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_BE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_LE16(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_BE16(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_LE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_BE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++ ++/* Registers */ ++ ++uint32_t DWC_READ_REG32(uint32_t volatile *reg) ++{ ++ return readl(reg); ++} ++ ++#if 0 ++uint64_t DWC_READ_REG64(uint64_t volatile *reg) ++{ ++} ++#endif ++ ++void DWC_WRITE_REG32(uint32_t volatile *reg, uint32_t value) ++{ ++ writel(value, reg); ++} ++ ++#if 0 ++void DWC_WRITE_REG64(uint64_t volatile *reg, uint64_t value) ++{ ++} ++#endif ++ ++void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask) ++{ ++ writel((readl(reg) & ~clear_mask) | set_mask, reg); ++} ++ ++#if 0 ++void DWC_MODIFY_REG64(uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask) ++{ ++} ++#endif ++ ++ ++/* Locking */ ++ ++dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void) ++{ ++ spinlock_t *sl = (spinlock_t *)1; ++ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ sl = DWC_ALLOC(sizeof(*sl)); ++ if (!sl) { ++ DWC_ERROR("Cannot allocate memory for spinlock\n"); ++ return NULL; ++ } ++ ++ spin_lock_init(sl); ++#endif ++ return (dwc_spinlock_t *)sl; ++} ++ ++void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock) ++{ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ DWC_FREE(lock); ++#endif ++} ++ ++void DWC_SPINLOCK(dwc_spinlock_t *lock) ++{ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ spin_lock((spinlock_t *)lock); ++#endif ++} ++ ++void DWC_SPINUNLOCK(dwc_spinlock_t *lock) ++{ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ spin_unlock((spinlock_t *)lock); ++#endif ++} ++ ++void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags) ++{ ++ dwc_irqflags_t f; ++ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ spin_lock_irqsave((spinlock_t *)lock, f); ++#else ++ local_irq_save(f); ++#endif ++ *flags = f; ++} ++ ++void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags) ++{ ++#if defined(CONFIG_PREEMPT) || defined(CONFIG_SMP) ++ spin_unlock_irqrestore((spinlock_t *)lock, flags); ++#else ++ local_irq_restore(flags); ++#endif ++} ++ ++dwc_mutex_t *DWC_MUTEX_ALLOC(void) ++{ ++ struct mutex *m; ++ dwc_mutex_t *mutex = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mutex)); ++ ++ if (!mutex) { ++ DWC_ERROR("Cannot allocate memory for mutex\n"); ++ return NULL; ++ } ++ ++ m = (struct mutex *)mutex; ++ mutex_init(m); ++ return mutex; ++} ++ ++#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)) ++#else ++void DWC_MUTEX_FREE(dwc_mutex_t *mutex) ++{ ++ mutex_destroy((struct mutex *)mutex); ++ DWC_FREE(mutex); ++} ++#endif ++ ++void DWC_MUTEX_LOCK(dwc_mutex_t *mutex) ++{ ++ struct mutex *m = (struct mutex *)mutex; ++ mutex_lock(m); ++} ++ ++int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex) ++{ ++ struct mutex *m = (struct mutex *)mutex; ++ return mutex_trylock(m); ++} ++ ++void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex) ++{ ++ struct mutex *m = (struct mutex *)mutex; ++ mutex_unlock(m); ++} ++ ++ ++/* Timing */ ++ ++void DWC_UDELAY(uint32_t usecs) ++{ ++ udelay(usecs); ++} ++ ++void DWC_MDELAY(uint32_t msecs) ++{ ++ mdelay(msecs); ++} ++ ++void DWC_MSLEEP(uint32_t msecs) ++{ ++ msleep(msecs); ++} ++ ++uint32_t DWC_TIME(void) ++{ ++ return jiffies_to_msecs(jiffies); ++} ++ ++ ++/* Timers */ ++ ++struct dwc_timer { ++ struct timer_list *t; ++ char *name; ++ dwc_timer_callback_t cb; ++ void *data; ++ uint8_t scheduled; ++ dwc_spinlock_t *lock; ++}; ++ ++static void timer_callback(unsigned long data) ++{ ++ dwc_timer_t *timer = (dwc_timer_t *)data; ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(timer->lock, &flags); ++ timer->scheduled = 0; ++ DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags); ++ DWC_DEBUGC("Timer %s callback", timer->name); ++ timer->cb(timer->data); ++} ++ ++dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data) ++{ ++ dwc_timer_t *t = DWC_ALLOC(sizeof(*t)); ++ ++ if (!t) { ++ DWC_ERROR("Cannot allocate memory for timer"); ++ return NULL; ++ } ++ ++ t->t = DWC_ALLOC(sizeof(*t->t)); ++ if (!t->t) { ++ DWC_ERROR("Cannot allocate memory for timer->t"); ++ goto no_timer; ++ } ++ ++ t->name = DWC_STRDUP(name); ++ if (!t->name) { ++ DWC_ERROR("Cannot allocate memory for timer->name"); ++ goto no_name; ++ } ++ ++ t->lock = DWC_SPINLOCK_ALLOC(); ++ if (!t->lock) { ++ DWC_ERROR("Cannot allocate memory for lock"); ++ goto no_lock; ++ } ++ ++ t->scheduled = 0; ++ t->t->base = &boot_tvec_bases; ++ t->t->expires = jiffies; ++ setup_timer(t->t, timer_callback, (unsigned long)t); ++ ++ t->cb = cb; ++ t->data = data; ++ ++ return t; ++ ++ no_lock: ++ DWC_FREE(t->name); ++ no_name: ++ DWC_FREE(t->t); ++ no_timer: ++ DWC_FREE(t); ++ return NULL; ++} ++ ++void DWC_TIMER_FREE(dwc_timer_t *timer) ++{ ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(timer->lock, &flags); ++ ++ if (timer->scheduled) { ++ del_timer(timer->t); ++ timer->scheduled = 0; ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags); ++ DWC_SPINLOCK_FREE(timer->lock); ++ DWC_FREE(timer->t); ++ DWC_FREE(timer->name); ++ DWC_FREE(timer); ++} ++ ++void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time) ++{ ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(timer->lock, &flags); ++ ++ if (!timer->scheduled) { ++ timer->scheduled = 1; ++ DWC_DEBUGC("Scheduling timer %s to expire in +%d msec", timer->name, time); ++ timer->t->expires = jiffies + msecs_to_jiffies(time); ++ add_timer(timer->t); ++ } else { ++ DWC_DEBUGC("Modifying timer %s to expire in +%d msec", timer->name, time); ++ mod_timer(timer->t, jiffies + msecs_to_jiffies(time)); ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(timer->lock, flags); ++} ++ ++void DWC_TIMER_CANCEL(dwc_timer_t *timer) ++{ ++ del_timer(timer->t); ++} ++ ++ ++/* Wait Queues */ ++ ++struct dwc_waitq { ++ wait_queue_head_t queue; ++ int abort; ++}; ++ ++dwc_waitq_t *DWC_WAITQ_ALLOC(void) ++{ ++ dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ DWC_ERROR("Cannot allocate memory for waitqueue\n"); ++ return NULL; ++ } ++ ++ init_waitqueue_head(&wq->queue); ++ wq->abort = 0; ++ return wq; ++} ++ ++void DWC_WAITQ_FREE(dwc_waitq_t *wq) ++{ ++ DWC_FREE(wq); ++} ++ ++int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data) ++{ ++ int result = wait_event_interruptible(wq->queue, ++ cond(data) || wq->abort); ++ if (result == -ERESTARTSYS) { ++ wq->abort = 0; ++ return -DWC_E_RESTART; ++ } ++ ++ if (wq->abort == 1) { ++ wq->abort = 0; ++ return -DWC_E_ABORT; ++ } ++ ++ wq->abort = 0; ++ ++ if (result == 0) { ++ return 0; ++ } ++ ++ return -DWC_E_UNKNOWN; ++} ++ ++int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, ++ void *data, int32_t msecs) ++{ ++ int32_t tmsecs; ++ int result = wait_event_interruptible_timeout(wq->queue, ++ cond(data) || wq->abort, ++ msecs_to_jiffies(msecs)); ++ if (result == -ERESTARTSYS) { ++ wq->abort = 0; ++ return -DWC_E_RESTART; ++ } ++ ++ if (wq->abort == 1) { ++ wq->abort = 0; ++ return -DWC_E_ABORT; ++ } ++ ++ wq->abort = 0; ++ ++ if (result > 0) { ++ tmsecs = jiffies_to_msecs(result); ++ if (!tmsecs) { ++ return 1; ++ } ++ ++ return tmsecs; ++ } ++ ++ if (result == 0) { ++ return -DWC_E_TIMEOUT; ++ } ++ ++ return -DWC_E_UNKNOWN; ++} ++ ++void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq) ++{ ++ wq->abort = 0; ++ wake_up_interruptible(&wq->queue); ++} ++ ++void DWC_WAITQ_ABORT(dwc_waitq_t *wq) ++{ ++ wq->abort = 1; ++ wake_up_interruptible(&wq->queue); ++} ++ ++ ++/* Threading */ ++ ++dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data) ++{ ++ struct task_struct *thread = kthread_run(func, data, name); ++ ++ if (thread == ERR_PTR(-ENOMEM)) { ++ return NULL; ++ } ++ ++ return (dwc_thread_t *)thread; ++} ++ ++int DWC_THREAD_STOP(dwc_thread_t *thread) ++{ ++ return kthread_stop((struct task_struct *)thread); ++} ++ ++dwc_bool_t DWC_THREAD_SHOULD_STOP(void) ++{ ++ return kthread_should_stop(); ++} ++ ++ ++/* tasklets ++ - run in interrupt context (cannot sleep) ++ - each tasklet runs on a single CPU ++ - different tasklets can be running simultaneously on different CPUs ++ */ ++struct dwc_tasklet { ++ struct tasklet_struct t; ++ dwc_tasklet_callback_t cb; ++ void *data; ++}; ++ ++static void tasklet_callback(unsigned long data) ++{ ++ dwc_tasklet_t *t = (dwc_tasklet_t *)data; ++ t->cb(t->data); ++} ++ ++dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data) ++{ ++ dwc_tasklet_t *t = DWC_ALLOC(sizeof(*t)); ++ ++ if (t) { ++ t->cb = cb; ++ t->data = data; ++ tasklet_init(&t->t, tasklet_callback, (unsigned long)t); ++ } else { ++ DWC_ERROR("Cannot allocate memory for tasklet\n"); ++ } ++ ++ return t; ++} ++ ++void DWC_TASK_FREE(dwc_tasklet_t *task) ++{ ++ DWC_FREE(task); ++} ++ ++void DWC_TASK_SCHEDULE(dwc_tasklet_t *task) ++{ ++ tasklet_schedule(&task->t); ++} ++ ++ ++/* workqueues ++ - run in process context (can sleep) ++ */ ++typedef struct work_container { ++ dwc_work_callback_t cb; ++ void *data; ++ dwc_workq_t *wq; ++ char *name; ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_ENTRY(work_container) entry; ++#endif ++ struct delayed_work work; ++} work_container_t; ++ ++#ifdef DEBUG ++DWC_CIRCLEQ_HEAD(work_container_queue, work_container); ++#endif ++ ++struct dwc_workq { ++ struct workqueue_struct *wq; ++ dwc_spinlock_t *lock; ++ dwc_waitq_t *waitq; ++ int pending; ++ ++#ifdef DEBUG ++ struct work_container_queue entries; ++#endif ++}; ++ ++static void do_work(struct work_struct *work) ++{ ++ dwc_irqflags_t flags; ++ struct delayed_work *dw = container_of(work, struct delayed_work, work); ++ work_container_t *container = container_of(dw, struct work_container, work); ++ dwc_workq_t *wq = container->wq; ++ ++ container->cb(container->data); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_REMOVE(&wq->entries, container, entry); ++#endif ++ DWC_DEBUGC("Work done: %s, container=%p", container->name, container); ++ if (container->name) { ++ DWC_FREE(container->name); ++ } ++ DWC_FREE(container); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending--; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++} ++ ++static int work_done(void *data) ++{ ++ dwc_workq_t *workq = (dwc_workq_t *)data; ++ return workq->pending == 0; ++} ++ ++int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout) ++{ ++ return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout); ++} ++ ++dwc_workq_t *DWC_WORKQ_ALLOC(char *name) ++{ ++ dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ return NULL; ++ } ++ ++ wq->wq = create_singlethread_workqueue(name); ++ if (!wq->wq) { ++ goto no_wq; ++ } ++ ++ wq->pending = 0; ++ ++ wq->lock = DWC_SPINLOCK_ALLOC(); ++ if (!wq->lock) { ++ goto no_lock; ++ } ++ ++ wq->waitq = DWC_WAITQ_ALLOC(); ++ if (!wq->waitq) { ++ goto no_waitq; ++ } ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INIT(&wq->entries); ++#endif ++ return wq; ++ ++ no_waitq: ++ DWC_SPINLOCK_FREE(wq->lock); ++ no_lock: ++ destroy_workqueue(wq->wq); ++ no_wq: ++ DWC_FREE(wq); ++ ++ return NULL; ++} ++ ++void DWC_WORKQ_FREE(dwc_workq_t *wq) ++{ ++#ifdef DEBUG ++ if (wq->pending != 0) { ++ struct work_container *wc; ++ DWC_ERROR("Destroying work queue with pending work"); ++ DWC_CIRCLEQ_FOREACH(wc, &wq->entries, entry) { ++ DWC_ERROR("Work %s still pending", wc->name); ++ } ++ } ++#endif ++ destroy_workqueue(wq->wq); ++ DWC_SPINLOCK_FREE(wq->lock); ++ DWC_WAITQ_FREE(wq->waitq); ++ DWC_FREE(wq); ++} ++ ++void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data, ++ char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container\n"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name\n"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ DWC_DEBUGC("Queueing work: %s, container=%p", container->name, container); ++ INIT_WORK(&container->work.work, do_work); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry); ++#endif ++ queue_work(wq->wq, &container->work.work); ++} ++ ++void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb, ++ void *data, uint32_t time, char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container\n"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name\n"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ DWC_DEBUGC("Queueing work: %s, container=%p", container->name, container); ++ INIT_DELAYED_WORK(&container->work, do_work); ++ ++#ifdef DEBUG ++ DWC_CIRCLEQ_INSERT_TAIL(&wq->entries, container, entry); ++#endif ++ queue_delayed_work(wq->wq, &container->work, msecs_to_jiffies(time)); ++} ++ ++int DWC_WORKQ_PENDING(dwc_workq_t *wq) ++{ ++ return wq->pending; ++} ++ ++ ++#ifdef DWC_LIBMODULE ++ ++#ifdef DWC_CCLIB ++/* CC */ ++EXPORT_SYMBOL(dwc_cc_if_alloc); ++EXPORT_SYMBOL(dwc_cc_if_free); ++EXPORT_SYMBOL(dwc_cc_clear); ++EXPORT_SYMBOL(dwc_cc_add); ++EXPORT_SYMBOL(dwc_cc_remove); ++EXPORT_SYMBOL(dwc_cc_change); ++EXPORT_SYMBOL(dwc_cc_data_for_save); ++EXPORT_SYMBOL(dwc_cc_restore_from_data); ++EXPORT_SYMBOL(dwc_cc_match_chid); ++EXPORT_SYMBOL(dwc_cc_match_cdid); ++EXPORT_SYMBOL(dwc_cc_ck); ++EXPORT_SYMBOL(dwc_cc_chid); ++EXPORT_SYMBOL(dwc_cc_cdid); ++EXPORT_SYMBOL(dwc_cc_name); ++#endif /* DWC_CCLIB */ ++ ++#ifdef DWC_CRYPTOLIB ++# ifndef CONFIG_MACH_IPMATE ++/* Modpow */ ++EXPORT_SYMBOL(dwc_modpow); ++ ++/* DH */ ++EXPORT_SYMBOL(dwc_dh_modpow); ++EXPORT_SYMBOL(dwc_dh_derive_keys); ++EXPORT_SYMBOL(dwc_dh_pk); ++# endif /* CONFIG_MACH_IPMATE */ ++ ++/* Crypto */ ++EXPORT_SYMBOL(dwc_wusb_aes_encrypt); ++EXPORT_SYMBOL(dwc_wusb_cmf); ++EXPORT_SYMBOL(dwc_wusb_prf); ++EXPORT_SYMBOL(dwc_wusb_fill_ccm_nonce); ++EXPORT_SYMBOL(dwc_wusb_gen_nonce); ++EXPORT_SYMBOL(dwc_wusb_gen_key); ++EXPORT_SYMBOL(dwc_wusb_gen_mic); ++#endif /* DWC_CRYPTOLIB */ ++ ++/* Notification */ ++#ifdef DWC_NOTIFYLIB ++EXPORT_SYMBOL(dwc_alloc_notification_manager); ++EXPORT_SYMBOL(dwc_free_notification_manager); ++EXPORT_SYMBOL(dwc_register_notifier); ++EXPORT_SYMBOL(dwc_unregister_notifier); ++EXPORT_SYMBOL(dwc_add_observer); ++EXPORT_SYMBOL(dwc_remove_observer); ++EXPORT_SYMBOL(dwc_notify); ++#endif ++ ++/* Memory Debugging Routines */ ++#ifdef DWC_DEBUG_MEMORY ++EXPORT_SYMBOL(dwc_alloc_debug); ++EXPORT_SYMBOL(dwc_alloc_atomic_debug); ++EXPORT_SYMBOL(dwc_free_debug); ++EXPORT_SYMBOL(dwc_dma_alloc_debug); ++EXPORT_SYMBOL(dwc_dma_free_debug); ++#endif ++ ++EXPORT_SYMBOL(DWC_MEMSET); ++EXPORT_SYMBOL(DWC_MEMCPY); ++EXPORT_SYMBOL(DWC_MEMMOVE); ++EXPORT_SYMBOL(DWC_MEMCMP); ++EXPORT_SYMBOL(DWC_STRNCMP); ++EXPORT_SYMBOL(DWC_STRCMP); ++EXPORT_SYMBOL(DWC_STRLEN); ++EXPORT_SYMBOL(DWC_STRCPY); ++EXPORT_SYMBOL(DWC_STRDUP); ++EXPORT_SYMBOL(DWC_ATOI); ++EXPORT_SYMBOL(DWC_ATOUI); ++ ++#ifdef DWC_UTFLIB ++EXPORT_SYMBOL(DWC_UTF8_TO_UTF16LE); ++#endif /* DWC_UTFLIB */ ++ ++EXPORT_SYMBOL(DWC_IN_IRQ); ++EXPORT_SYMBOL(DWC_IN_BH); ++EXPORT_SYMBOL(DWC_VPRINTF); ++EXPORT_SYMBOL(DWC_VSNPRINTF); ++EXPORT_SYMBOL(DWC_PRINTF); ++EXPORT_SYMBOL(DWC_SPRINTF); ++EXPORT_SYMBOL(DWC_SNPRINTF); ++EXPORT_SYMBOL(__DWC_WARN); ++EXPORT_SYMBOL(__DWC_ERROR); ++EXPORT_SYMBOL(DWC_EXCEPTION); ++ ++#ifdef DEBUG ++EXPORT_SYMBOL(__DWC_DEBUG); ++#endif ++ ++EXPORT_SYMBOL(__DWC_DMA_ALLOC); ++EXPORT_SYMBOL(__DWC_DMA_ALLOC_ATOMIC); ++EXPORT_SYMBOL(__DWC_DMA_FREE); ++EXPORT_SYMBOL(__DWC_ALLOC); ++EXPORT_SYMBOL(__DWC_ALLOC_ATOMIC); ++EXPORT_SYMBOL(__DWC_FREE); ++ ++#ifdef DWC_CRYPTOLIB ++EXPORT_SYMBOL(DWC_RANDOM_BYTES); ++EXPORT_SYMBOL(DWC_AES_CBC); ++EXPORT_SYMBOL(DWC_SHA256); ++EXPORT_SYMBOL(DWC_HMAC_SHA256); ++#endif ++ ++EXPORT_SYMBOL(DWC_CPU_TO_LE32); ++EXPORT_SYMBOL(DWC_CPU_TO_BE32); ++EXPORT_SYMBOL(DWC_LE32_TO_CPU); ++EXPORT_SYMBOL(DWC_BE32_TO_CPU); ++EXPORT_SYMBOL(DWC_CPU_TO_LE16); ++EXPORT_SYMBOL(DWC_CPU_TO_BE16); ++EXPORT_SYMBOL(DWC_LE16_TO_CPU); ++EXPORT_SYMBOL(DWC_BE16_TO_CPU); ++EXPORT_SYMBOL(DWC_READ_REG32); ++EXPORT_SYMBOL(DWC_WRITE_REG32); ++EXPORT_SYMBOL(DWC_MODIFY_REG32); ++ ++#if 0 ++EXPORT_SYMBOL(DWC_READ_REG64); ++EXPORT_SYMBOL(DWC_WRITE_REG64); ++EXPORT_SYMBOL(DWC_MODIFY_REG64); ++#endif ++ ++EXPORT_SYMBOL(DWC_SPINLOCK_ALLOC); ++EXPORT_SYMBOL(DWC_SPINLOCK_FREE); ++EXPORT_SYMBOL(DWC_SPINLOCK); ++EXPORT_SYMBOL(DWC_SPINUNLOCK); ++EXPORT_SYMBOL(DWC_SPINLOCK_IRQSAVE); ++EXPORT_SYMBOL(DWC_SPINUNLOCK_IRQRESTORE); ++EXPORT_SYMBOL(DWC_MUTEX_ALLOC); ++ ++#if (!defined(DWC_LINUX) || !defined(CONFIG_DEBUG_MUTEXES)) ++EXPORT_SYMBOL(DWC_MUTEX_FREE); ++#endif ++ ++EXPORT_SYMBOL(DWC_MUTEX_LOCK); ++EXPORT_SYMBOL(DWC_MUTEX_TRYLOCK); ++EXPORT_SYMBOL(DWC_MUTEX_UNLOCK); ++EXPORT_SYMBOL(DWC_UDELAY); ++EXPORT_SYMBOL(DWC_MDELAY); ++EXPORT_SYMBOL(DWC_MSLEEP); ++EXPORT_SYMBOL(DWC_TIME); ++EXPORT_SYMBOL(DWC_TIMER_ALLOC); ++EXPORT_SYMBOL(DWC_TIMER_FREE); ++EXPORT_SYMBOL(DWC_TIMER_SCHEDULE); ++EXPORT_SYMBOL(DWC_TIMER_CANCEL); ++EXPORT_SYMBOL(DWC_WAITQ_ALLOC); ++EXPORT_SYMBOL(DWC_WAITQ_FREE); ++EXPORT_SYMBOL(DWC_WAITQ_WAIT); ++EXPORT_SYMBOL(DWC_WAITQ_WAIT_TIMEOUT); ++EXPORT_SYMBOL(DWC_WAITQ_TRIGGER); ++EXPORT_SYMBOL(DWC_WAITQ_ABORT); ++EXPORT_SYMBOL(DWC_THREAD_RUN); ++EXPORT_SYMBOL(DWC_THREAD_STOP); ++EXPORT_SYMBOL(DWC_THREAD_SHOULD_STOP); ++EXPORT_SYMBOL(DWC_TASK_ALLOC); ++EXPORT_SYMBOL(DWC_TASK_FREE); ++EXPORT_SYMBOL(DWC_TASK_SCHEDULE); ++EXPORT_SYMBOL(DWC_WORKQ_WAIT_WORK_DONE); ++EXPORT_SYMBOL(DWC_WORKQ_ALLOC); ++EXPORT_SYMBOL(DWC_WORKQ_FREE); ++EXPORT_SYMBOL(DWC_WORKQ_SCHEDULE); ++EXPORT_SYMBOL(DWC_WORKQ_SCHEDULE_DELAYED); ++EXPORT_SYMBOL(DWC_WORKQ_PENDING); ++ ++static int dwc_common_port_init_module(void) ++{ ++ int result = 0; ++ ++ printk(KERN_DEBUG "Module dwc_common_port init\n" ); ++ ++#ifdef DWC_DEBUG_MEMORY ++ result = dwc_memory_debug_start(NULL); ++ if (result) { ++ printk(KERN_ERR ++ "dwc_memory_debug_start() failed with error %d\n", ++ result); ++ return result; ++ } ++#endif ++ ++#ifdef DWC_NOTIFYLIB ++ result = dwc_alloc_notification_manager(NULL, NULL); ++ if (result) { ++ printk(KERN_ERR ++ "dwc_alloc_notification_manager() failed with error %d\n", ++ result); ++ return result; ++ } ++#endif ++ return result; ++} ++ ++static void dwc_common_port_exit_module(void) ++{ ++ printk(KERN_DEBUG "Module dwc_common_port exit\n" ); ++ ++#ifdef DWC_NOTIFYLIB ++ dwc_free_notification_manager(); ++#endif ++ ++#ifdef DWC_DEBUG_MEMORY ++ dwc_memory_debug_stop(); ++#endif ++} ++ ++module_init(dwc_common_port_init_module); ++module_exit(dwc_common_port_exit_module); ++ ++MODULE_DESCRIPTION("DWC Common Library - Portable version"); ++MODULE_AUTHOR("Synopsys Inc."); ++MODULE_LICENSE ("GPL"); ++ ++#endif /* DWC_LIBMODULE */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_nbsd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_nbsd.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1275 @@ ++#include "dwc_os.h" ++#include "dwc_list.h" ++ ++#ifdef DWC_CCLIB ++# include "dwc_cc.h" ++#endif ++ ++#ifdef DWC_CRYPTOLIB ++# include "dwc_modpow.h" ++# include "dwc_dh.h" ++# include "dwc_crypto.h" ++#endif ++ ++#ifdef DWC_NOTIFYLIB ++# include "dwc_notifier.h" ++#endif ++ ++/* OS-Level Implementations */ ++ ++/* This is the NetBSD 4.0.1 kernel implementation of the DWC platform library. */ ++ ++ ++/* MISC */ ++ ++void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size) ++{ ++ return memset(dest, byte, size); ++} ++ ++void *DWC_MEMCPY(void *dest, void const *src, uint32_t size) ++{ ++ return memcpy(dest, src, size); ++} ++ ++void *DWC_MEMMOVE(void *dest, void *src, uint32_t size) ++{ ++ bcopy(src, dest, size); ++ return dest; ++} ++ ++int DWC_MEMCMP(void *m1, void *m2, uint32_t size) ++{ ++ return memcmp(m1, m2, size); ++} ++ ++int DWC_STRNCMP(void *s1, void *s2, uint32_t size) ++{ ++ return strncmp(s1, s2, size); ++} ++ ++int DWC_STRCMP(void *s1, void *s2) ++{ ++ return strcmp(s1, s2); ++} ++ ++int DWC_STRLEN(char const *str) ++{ ++ return strlen(str); ++} ++ ++char *DWC_STRCPY(char *to, char const *from) ++{ ++ return strcpy(to, from); ++} ++ ++char *DWC_STRDUP(char const *str) ++{ ++ int len = DWC_STRLEN(str) + 1; ++ char *new = DWC_ALLOC_ATOMIC(len); ++ ++ if (!new) { ++ return NULL; ++ } ++ ++ DWC_MEMCPY(new, str, len); ++ return new; ++} ++ ++int DWC_ATOI(char *str, int32_t *value) ++{ ++ char *end = NULL; ++ ++ /* NetBSD doesn't have 'strtol' in the kernel, but 'strtoul' ++ * should be equivalent on 2's complement machines ++ */ ++ *value = strtoul(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++int DWC_ATOUI(char *str, uint32_t *value) ++{ ++ char *end = NULL; ++ ++ *value = strtoul(str, &end, 0); ++ if (*end == '\0') { ++ return 0; ++ } ++ ++ return -1; ++} ++ ++ ++#ifdef DWC_UTFLIB ++/* From usbstring.c */ ++ ++int DWC_UTF8_TO_UTF16LE(uint8_t const *s, uint16_t *cp, unsigned len) ++{ ++ int count = 0; ++ u8 c; ++ u16 uchar; ++ ++ /* this insists on correct encodings, though not minimal ones. ++ * BUT it currently rejects legit 4-byte UTF-8 code points, ++ * which need surrogate pairs. (Unicode 3.1 can use them.) ++ */ ++ while (len != 0 && (c = (u8) *s++) != 0) { ++ if (unlikely(c & 0x80)) { ++ // 2-byte sequence: ++ // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx ++ if ((c & 0xe0) == 0xc0) { ++ uchar = (c & 0x1f) << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ // 3-byte sequence (most CJKV characters): ++ // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx ++ } else if ((c & 0xf0) == 0xe0) { ++ uchar = (c & 0x0f) << 12; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ /* no bogus surrogates */ ++ if (0xd800 <= uchar && uchar <= 0xdfff) ++ goto fail; ++ ++ // 4-byte sequence (surrogate pairs, currently rare): ++ // 11101110wwwwzzzzyy + 110111yyyyxxxxxx ++ // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx ++ // (uuuuu = wwww + 1) ++ // FIXME accept the surrogate code points (only) ++ } else ++ goto fail; ++ } else ++ uchar = c; ++ put_unaligned (cpu_to_le16 (uchar), cp++); ++ count++; ++ len--; ++ } ++ return count; ++fail: ++ return -1; ++} ++ ++#endif /* DWC_UTFLIB */ ++ ++ ++/* dwc_debug.h */ ++ ++dwc_bool_t DWC_IN_IRQ(void) ++{ ++// return in_irq(); ++ return 0; ++} ++ ++dwc_bool_t DWC_IN_BH(void) ++{ ++// return in_softirq(); ++ return 0; ++} ++ ++void DWC_VPRINTF(char *format, va_list args) ++{ ++ vprintf(format, args); ++} ++ ++int DWC_VSNPRINTF(char *str, int size, char *format, va_list args) ++{ ++ return vsnprintf(str, size, format, args); ++} ++ ++void DWC_PRINTF(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++int DWC_SPRINTF(char *buffer, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsprintf(buffer, format, args); ++ va_end(args); ++ return retval; ++} ++ ++int DWC_SNPRINTF(char *buffer, int size, char *format, ...) ++{ ++ int retval; ++ va_list args; ++ ++ va_start(args, format); ++ retval = vsnprintf(buffer, size, format, args); ++ va_end(args); ++ return retval; ++} ++ ++void __DWC_WARN(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void __DWC_ERROR(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++ ++void DWC_EXCEPTION(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++// BUG_ON(1); ??? ++} ++ ++#ifdef DEBUG ++void __DWC_DEBUG(char *format, ...) ++{ ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VPRINTF(format, args); ++ va_end(args); ++} ++#endif ++ ++ ++/* dwc_mem.h */ ++ ++#if 0 ++dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size, ++ uint32_t align, ++ uint32_t alloc) ++{ ++ struct dma_pool *pool = dma_pool_create("Pool", NULL, ++ size, align, alloc); ++ return (dwc_pool_t *)pool; ++} ++ ++void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool) ++{ ++ dma_pool_destroy((struct dma_pool *)pool); ++} ++ ++void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++// return dma_pool_alloc((struct dma_pool *)pool, GFP_KERNEL, dma_addr); ++ return dma_pool_alloc((struct dma_pool *)pool, M_WAITOK, dma_addr); ++} ++ ++void *DWC_DMA_POOL_ZALLOC(dwc_pool_t *pool, uint64_t *dma_addr) ++{ ++ void *vaddr = DWC_DMA_POOL_ALLOC(pool, dma_addr); ++ memset(..); ++} ++ ++void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr) ++{ ++ dma_pool_free(pool, vaddr, daddr); ++} ++#endif ++ ++void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr) ++{ ++ dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx; ++ int error; ++ ++ error = bus_dmamem_alloc(dma->dma_tag, size, 1, size, dma->segs, ++ sizeof(dma->segs) / sizeof(dma->segs[0]), ++ &dma->nsegs, BUS_DMA_NOWAIT); ++ if (error) { ++ printf("%s: bus_dmamem_alloc(%ju) failed: %d\n", __func__, ++ (uintmax_t)size, error); ++ goto fail_0; ++ } ++ ++ error = bus_dmamem_map(dma->dma_tag, dma->segs, dma->nsegs, size, ++ (caddr_t *)&dma->dma_vaddr, ++ BUS_DMA_NOWAIT | BUS_DMA_COHERENT); ++ if (error) { ++ printf("%s: bus_dmamem_map failed: %d\n", __func__, error); ++ goto fail_1; ++ } ++ ++ error = bus_dmamap_create(dma->dma_tag, size, 1, size, 0, ++ BUS_DMA_NOWAIT, &dma->dma_map); ++ if (error) { ++ printf("%s: bus_dmamap_create failed: %d\n", __func__, error); ++ goto fail_2; ++ } ++ ++ error = bus_dmamap_load(dma->dma_tag, dma->dma_map, dma->dma_vaddr, ++ size, NULL, BUS_DMA_NOWAIT); ++ if (error) { ++ printf("%s: bus_dmamap_load failed: %d\n", __func__, error); ++ goto fail_3; ++ } ++ ++ dma->dma_paddr = (bus_addr_t)dma->segs[0].ds_addr; ++ *dma_addr = dma->dma_paddr; ++ return dma->dma_vaddr; ++ ++fail_3: ++ bus_dmamap_destroy(dma->dma_tag, dma->dma_map); ++fail_2: ++ bus_dmamem_unmap(dma->dma_tag, dma->dma_vaddr, size); ++fail_1: ++ bus_dmamem_free(dma->dma_tag, dma->segs, dma->nsegs); ++fail_0: ++ dma->dma_map = NULL; ++ dma->dma_vaddr = NULL; ++ dma->nsegs = 0; ++ ++ return NULL; ++} ++ ++void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr) ++{ ++ dwc_dmactx_t *dma = (dwc_dmactx_t *)dma_ctx; ++ ++ if (dma->dma_map != NULL) { ++ bus_dmamap_sync(dma->dma_tag, dma->dma_map, 0, size, ++ BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); ++ bus_dmamap_unload(dma->dma_tag, dma->dma_map); ++ bus_dmamap_destroy(dma->dma_tag, dma->dma_map); ++ bus_dmamem_unmap(dma->dma_tag, dma->dma_vaddr, size); ++ bus_dmamem_free(dma->dma_tag, dma->segs, dma->nsegs); ++ dma->dma_paddr = 0; ++ dma->dma_map = NULL; ++ dma->dma_vaddr = NULL; ++ dma->nsegs = 0; ++ } ++} ++ ++void *__DWC_ALLOC(void *mem_ctx, uint32_t size) ++{ ++ return malloc(size, M_DEVBUF, M_WAITOK | M_ZERO); ++} ++ ++void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size) ++{ ++ return malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO); ++} ++ ++void __DWC_FREE(void *mem_ctx, void *addr) ++{ ++ free(addr, M_DEVBUF); ++} ++ ++ ++#ifdef DWC_CRYPTOLIB ++/* dwc_crypto.h */ ++ ++void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length) ++{ ++ get_random_bytes(buffer, length); ++} ++ ++int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out) ++{ ++ struct crypto_blkcipher *tfm; ++ struct blkcipher_desc desc; ++ struct scatterlist sgd; ++ struct scatterlist sgs; ++ ++ tfm = crypto_alloc_blkcipher("cbc(aes)", 0, CRYPTO_ALG_ASYNC); ++ if (tfm == NULL) { ++ printk("failed to load transform for aes CBC\n"); ++ return -1; ++ } ++ ++ crypto_blkcipher_setkey(tfm, key, keylen); ++ crypto_blkcipher_set_iv(tfm, iv, 16); ++ ++ sg_init_one(&sgd, out, messagelen); ++ sg_init_one(&sgs, message, messagelen); ++ ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ if (crypto_blkcipher_encrypt(&desc, &sgd, &sgs, messagelen)) { ++ crypto_free_blkcipher(tfm); ++ DWC_ERROR("AES CBC encryption failed"); ++ return -1; ++ } ++ ++ crypto_free_blkcipher(tfm); ++ return 0; ++} ++ ++int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("sha256", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for sha256: %ld", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, len); ++ crypto_hash_digest(&desc, &sg, len, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++ ++int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen, ++ uint8_t *key, uint32_t keylen, uint8_t *out) ++{ ++ struct crypto_hash *tfm; ++ struct hash_desc desc; ++ struct scatterlist sg; ++ ++ tfm = crypto_alloc_hash("hmac(sha256)", 0, CRYPTO_ALG_ASYNC); ++ if (IS_ERR(tfm)) { ++ DWC_ERROR("Failed to load transform for hmac(sha256): %ld", PTR_ERR(tfm)); ++ return 0; ++ } ++ desc.tfm = tfm; ++ desc.flags = 0; ++ ++ sg_init_one(&sg, message, messagelen); ++ crypto_hash_setkey(tfm, key, keylen); ++ crypto_hash_digest(&desc, &sg, messagelen, out); ++ crypto_free_hash(tfm); ++ ++ return 1; ++} ++ ++#endif /* DWC_CRYPTOLIB */ ++ ++ ++/* Byte Ordering Conversions */ ++ ++uint32_t DWC_CPU_TO_LE32(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_CPU_TO_BE32(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_LE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint32_t DWC_BE32_TO_CPU(uint32_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ ++ return (u_p[3] | (u_p[2] << 8) | (u_p[1] << 16) | (u_p[0] << 24)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_LE16(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_CPU_TO_BE16(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_LE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __LITTLE_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++uint16_t DWC_BE16_TO_CPU(uint16_t *p) ++{ ++#ifdef __BIG_ENDIAN ++ return *p; ++#else ++ uint8_t *u_p = (uint8_t *)p; ++ return (u_p[1] | (u_p[0] << 8)); ++#endif ++} ++ ++ ++/* Registers */ ++ ++uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ return bus_space_read_4(io->iot, io->ioh, ior); ++} ++ ++#if 0 ++uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ return bus_space_read_8(io->iot, io->ioh, ior); ++} ++#endif ++ ++void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_4(io->iot, io->ioh, ior, value); ++} ++ ++#if 0 ++void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_8(io->iot, io->ioh, ior, value); ++} ++#endif ++ ++void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask, ++ uint32_t set_mask) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_4(io->iot, io->ioh, ior, ++ (bus_space_read_4(io->iot, io->ioh, ior) & ++ ~clear_mask) | set_mask); ++} ++ ++#if 0 ++void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask, ++ uint64_t set_mask) ++{ ++ dwc_ioctx_t *io = (dwc_ioctx_t *)io_ctx; ++ bus_size_t ior = (bus_size_t)reg; ++ ++ bus_space_write_8(io->iot, io->ioh, ior, ++ (bus_space_read_8(io->iot, io->ioh, ior) & ++ ~clear_mask) | set_mask); ++} ++#endif ++ ++ ++/* Locking */ ++ ++dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void) ++{ ++ struct simplelock *sl = DWC_ALLOC(sizeof(*sl)); ++ ++ if (!sl) { ++ DWC_ERROR("Cannot allocate memory for spinlock"); ++ return NULL; ++ } ++ ++ simple_lock_init(sl); ++ return (dwc_spinlock_t *)sl; ++} ++ ++void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock) ++{ ++ struct simplelock *sl = (struct simplelock *)lock; ++ ++ DWC_FREE(sl); ++} ++ ++void DWC_SPINLOCK(dwc_spinlock_t *lock) ++{ ++ simple_lock((struct simplelock *)lock); ++} ++ ++void DWC_SPINUNLOCK(dwc_spinlock_t *lock) ++{ ++ simple_unlock((struct simplelock *)lock); ++} ++ ++void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags) ++{ ++ simple_lock((struct simplelock *)lock); ++ *flags = splbio(); ++} ++ ++void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags) ++{ ++ splx(flags); ++ simple_unlock((struct simplelock *)lock); ++} ++ ++dwc_mutex_t *DWC_MUTEX_ALLOC(void) ++{ ++ dwc_mutex_t *mutex = DWC_ALLOC(sizeof(struct lock)); ++ ++ if (!mutex) { ++ DWC_ERROR("Cannot allocate memory for mutex"); ++ return NULL; ++ } ++ ++ lockinit((struct lock *)mutex, 0, "dw3mtx", 0, 0); ++ return mutex; ++} ++ ++#if (defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES)) ++#else ++void DWC_MUTEX_FREE(dwc_mutex_t *mutex) ++{ ++ DWC_FREE(mutex); ++} ++#endif ++ ++void DWC_MUTEX_LOCK(dwc_mutex_t *mutex) ++{ ++ lockmgr((struct lock *)mutex, LK_EXCLUSIVE, NULL); ++} ++ ++int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex) ++{ ++ int status; ++ ++ status = lockmgr((struct lock *)mutex, LK_EXCLUSIVE | LK_NOWAIT, NULL); ++ return status == 0; ++} ++ ++void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex) ++{ ++ lockmgr((struct lock *)mutex, LK_RELEASE, NULL); ++} ++ ++ ++/* Timing */ ++ ++void DWC_UDELAY(uint32_t usecs) ++{ ++ DELAY(usecs); ++} ++ ++void DWC_MDELAY(uint32_t msecs) ++{ ++ do { ++ DELAY(1000); ++ } while (--msecs); ++} ++ ++void DWC_MSLEEP(uint32_t msecs) ++{ ++ struct timeval tv; ++ ++ tv.tv_sec = msecs / 1000; ++ tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000; ++ tsleep(&tv, 0, "dw3slp", tvtohz(&tv)); ++} ++ ++uint32_t DWC_TIME(void) ++{ ++ struct timeval tv; ++ ++ microuptime(&tv); // or getmicrouptime? (less precise, but faster) ++ return tv.tv_sec * 1000 + tv.tv_usec / 1000; ++} ++ ++ ++/* Timers */ ++ ++struct dwc_timer { ++ struct callout t; ++ char *name; ++ dwc_spinlock_t *lock; ++ dwc_timer_callback_t cb; ++ void *data; ++}; ++ ++dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data) ++{ ++ dwc_timer_t *t = DWC_ALLOC(sizeof(*t)); ++ ++ if (!t) { ++ DWC_ERROR("Cannot allocate memory for timer"); ++ return NULL; ++ } ++ ++ callout_init(&t->t); ++ ++ t->name = DWC_STRDUP(name); ++ if (!t->name) { ++ DWC_ERROR("Cannot allocate memory for timer->name"); ++ goto no_name; ++ } ++ ++ t->lock = DWC_SPINLOCK_ALLOC(); ++ if (!t->lock) { ++ DWC_ERROR("Cannot allocate memory for timer->lock"); ++ goto no_lock; ++ } ++ ++ t->cb = cb; ++ t->data = data; ++ ++ return t; ++ ++ no_lock: ++ DWC_FREE(t->name); ++ no_name: ++ DWC_FREE(t); ++ ++ return NULL; ++} ++ ++void DWC_TIMER_FREE(dwc_timer_t *timer) ++{ ++ callout_stop(&timer->t); ++ DWC_SPINLOCK_FREE(timer->lock); ++ DWC_FREE(timer->name); ++ DWC_FREE(timer); ++} ++ ++void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time) ++{ ++ struct timeval tv; ++ ++ tv.tv_sec = time / 1000; ++ tv.tv_usec = (time - tv.tv_sec * 1000) * 1000; ++ callout_reset(&timer->t, tvtohz(&tv), timer->cb, timer->data); ++} ++ ++void DWC_TIMER_CANCEL(dwc_timer_t *timer) ++{ ++ callout_stop(&timer->t); ++} ++ ++ ++/* Wait Queues */ ++ ++struct dwc_waitq { ++ struct simplelock lock; ++ int abort; ++}; ++ ++dwc_waitq_t *DWC_WAITQ_ALLOC(void) ++{ ++ dwc_waitq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ DWC_ERROR("Cannot allocate memory for waitqueue"); ++ return NULL; ++ } ++ ++ simple_lock_init(&wq->lock); ++ wq->abort = 0; ++ ++ return wq; ++} ++ ++void DWC_WAITQ_FREE(dwc_waitq_t *wq) ++{ ++ DWC_FREE(wq); ++} ++ ++int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data) ++{ ++ int ipl; ++ int result = 0; ++ ++ simple_lock(&wq->lock); ++ ipl = splbio(); ++ ++ /* Skip the sleep if already aborted or triggered */ ++ if (!wq->abort && !cond(data)) { ++ splx(ipl); ++ result = ltsleep(wq, PCATCH, "dw3wat", 0, &wq->lock); // infinite timeout ++ ipl = splbio(); ++ } ++ ++ if (result == 0) { // awoken ++ if (wq->abort) { ++ wq->abort = 0; ++ result = -DWC_E_ABORT; ++ } else { ++ result = 0; ++ } ++ ++ splx(ipl); ++ simple_unlock(&wq->lock); ++ } else { ++ wq->abort = 0; ++ splx(ipl); ++ simple_unlock(&wq->lock); ++ ++ if (result == ERESTART) { // signaled - restart ++ result = -DWC_E_RESTART; ++ } else { // signaled - must be EINTR ++ result = -DWC_E_ABORT; ++ } ++ } ++ ++ return result; ++} ++ ++int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, ++ void *data, int32_t msecs) ++{ ++ struct timeval tv, tv1, tv2; ++ int ipl; ++ int result = 0; ++ ++ tv.tv_sec = msecs / 1000; ++ tv.tv_usec = (msecs - tv.tv_sec * 1000) * 1000; ++ ++ simple_lock(&wq->lock); ++ ipl = splbio(); ++ ++ /* Skip the sleep if already aborted or triggered */ ++ if (!wq->abort && !cond(data)) { ++ splx(ipl); ++ getmicrouptime(&tv1); ++ result = ltsleep(wq, PCATCH, "dw3wto", tvtohz(&tv), &wq->lock); ++ getmicrouptime(&tv2); ++ ipl = splbio(); ++ } ++ ++ if (result == 0) { // awoken ++ if (wq->abort) { ++ wq->abort = 0; ++ splx(ipl); ++ simple_unlock(&wq->lock); ++ result = -DWC_E_ABORT; ++ } else { ++ splx(ipl); ++ simple_unlock(&wq->lock); ++ ++ tv2.tv_usec -= tv1.tv_usec; ++ if (tv2.tv_usec < 0) { ++ tv2.tv_usec += 1000000; ++ tv2.tv_sec--; ++ } ++ ++ tv2.tv_sec -= tv1.tv_sec; ++ result = tv2.tv_sec * 1000 + tv2.tv_usec / 1000; ++ result = msecs - result; ++ if (result <= 0) ++ result = 1; ++ } ++ } else { ++ wq->abort = 0; ++ splx(ipl); ++ simple_unlock(&wq->lock); ++ ++ if (result == ERESTART) { // signaled - restart ++ result = -DWC_E_RESTART; ++ ++ } else if (result == EINTR) { // signaled - interrupt ++ result = -DWC_E_ABORT; ++ ++ } else { // timed out ++ result = -DWC_E_TIMEOUT; ++ } ++ } ++ ++ return result; ++} ++ ++void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq) ++{ ++ wakeup(wq); ++} ++ ++void DWC_WAITQ_ABORT(dwc_waitq_t *wq) ++{ ++ int ipl; ++ ++ simple_lock(&wq->lock); ++ ipl = splbio(); ++ wq->abort = 1; ++ wakeup(wq); ++ splx(ipl); ++ simple_unlock(&wq->lock); ++} ++ ++ ++/* Threading */ ++ ++struct dwc_thread { ++ struct proc *proc; ++ int abort; ++}; ++ ++dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data) ++{ ++ int retval; ++ dwc_thread_t *thread = DWC_ALLOC(sizeof(*thread)); ++ ++ if (!thread) { ++ return NULL; ++ } ++ ++ thread->abort = 0; ++ retval = kthread_create1((void (*)(void *))func, data, &thread->proc, ++ "%s", name); ++ if (retval) { ++ DWC_FREE(thread); ++ return NULL; ++ } ++ ++ return thread; ++} ++ ++int DWC_THREAD_STOP(dwc_thread_t *thread) ++{ ++ int retval; ++ ++ thread->abort = 1; ++ retval = tsleep(&thread->abort, 0, "dw3stp", 60 * hz); ++ ++ if (retval == 0) { ++ /* DWC_THREAD_EXIT() will free the thread struct */ ++ return 0; ++ } ++ ++ /* NOTE: We leak the thread struct if thread doesn't die */ ++ ++ if (retval == EWOULDBLOCK) { ++ return -DWC_E_TIMEOUT; ++ } ++ ++ return -DWC_E_UNKNOWN; ++} ++ ++dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread) ++{ ++ return thread->abort; ++} ++ ++void DWC_THREAD_EXIT(dwc_thread_t *thread) ++{ ++ wakeup(&thread->abort); ++ DWC_FREE(thread); ++ kthread_exit(0); ++} ++ ++/* tasklets ++ - Runs in interrupt context (cannot sleep) ++ - Each tasklet runs on a single CPU ++ - Different tasklets can be running simultaneously on different CPUs ++ [ On NetBSD there is no corresponding mechanism, drivers don't have bottom- ++ halves. So we just call the callback directly from DWC_TASK_SCHEDULE() ] ++ */ ++struct dwc_tasklet { ++ dwc_tasklet_callback_t cb; ++ void *data; ++}; ++ ++static void tasklet_callback(void *data) ++{ ++ dwc_tasklet_t *task = (dwc_tasklet_t *)data; ++ ++ task->cb(task->data); ++} ++ ++dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data) ++{ ++ dwc_tasklet_t *task = DWC_ALLOC(sizeof(*task)); ++ ++ if (task) { ++ task->cb = cb; ++ task->data = data; ++ } else { ++ DWC_ERROR("Cannot allocate memory for tasklet"); ++ } ++ ++ return task; ++} ++ ++void DWC_TASK_FREE(dwc_tasklet_t *task) ++{ ++ DWC_FREE(task); ++} ++ ++void DWC_TASK_SCHEDULE(dwc_tasklet_t *task) ++{ ++ tasklet_callback(task); ++} ++ ++ ++/* workqueues ++ - Runs in process context (can sleep) ++ */ ++typedef struct work_container { ++ dwc_work_callback_t cb; ++ void *data; ++ dwc_workq_t *wq; ++ char *name; ++ int hz; ++ struct work task; ++} work_container_t; ++ ++struct dwc_workq { ++ struct workqueue *taskq; ++ dwc_spinlock_t *lock; ++ dwc_waitq_t *waitq; ++ int pending; ++ struct work_container *container; ++}; ++ ++static void do_work(struct work *task, void *data) ++{ ++ dwc_workq_t *wq = (dwc_workq_t *)data; ++ work_container_t *container = wq->container; ++ dwc_irqflags_t flags; ++ ++ if (container->hz) { ++ tsleep(container, 0, "dw3wrk", container->hz); ++ } ++ ++ container->cb(container->data); ++ DWC_DEBUG("Work done: %s, container=%p", container->name, container); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ if (container->name) ++ DWC_FREE(container->name); ++ DWC_FREE(container); ++ wq->pending--; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++} ++ ++static int work_done(void *data) ++{ ++ dwc_workq_t *workq = (dwc_workq_t *)data; ++ ++ return workq->pending == 0; ++} ++ ++int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout) ++{ ++ return DWC_WAITQ_WAIT_TIMEOUT(workq->waitq, work_done, workq, timeout); ++} ++ ++dwc_workq_t *DWC_WORKQ_ALLOC(char *name) ++{ ++ int result; ++ dwc_workq_t *wq = DWC_ALLOC(sizeof(*wq)); ++ ++ if (!wq) { ++ DWC_ERROR("Cannot allocate memory for workqueue"); ++ return NULL; ++ } ++ ++ result = workqueue_create(&wq->taskq, name, do_work, wq, 0 /*PWAIT*/, ++ IPL_BIO, 0); ++ if (result) { ++ DWC_ERROR("Cannot create workqueue"); ++ goto no_taskq; ++ } ++ ++ wq->pending = 0; ++ ++ wq->lock = DWC_SPINLOCK_ALLOC(); ++ if (!wq->lock) { ++ DWC_ERROR("Cannot allocate memory for spinlock"); ++ goto no_lock; ++ } ++ ++ wq->waitq = DWC_WAITQ_ALLOC(); ++ if (!wq->waitq) { ++ DWC_ERROR("Cannot allocate memory for waitqueue"); ++ goto no_waitq; ++ } ++ ++ return wq; ++ ++ no_waitq: ++ DWC_SPINLOCK_FREE(wq->lock); ++ no_lock: ++ workqueue_destroy(wq->taskq); ++ no_taskq: ++ DWC_FREE(wq); ++ ++ return NULL; ++} ++ ++void DWC_WORKQ_FREE(dwc_workq_t *wq) ++{ ++#ifdef DEBUG ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ ++ if (wq->pending != 0) { ++ struct work_container *container = wq->container; ++ ++ DWC_ERROR("Destroying work queue with pending work"); ++ ++ if (container && container->name) { ++ DWC_ERROR("Work %s still pending", container->name); ++ } ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++#endif ++ DWC_WAITQ_FREE(wq->waitq); ++ DWC_SPINLOCK_FREE(wq->lock); ++ workqueue_destroy(wq->taskq); ++ DWC_FREE(wq); ++} ++ ++void DWC_WORKQ_SCHEDULE(dwc_workq_t *wq, dwc_work_callback_t cb, void *data, ++ char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ container->hz = 0; ++ wq->container = container; ++ ++ DWC_DEBUG("Queueing work: %s, container=%p", container->name, container); ++ workqueue_enqueue(wq->taskq, &container->task); ++} ++ ++void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *wq, dwc_work_callback_t cb, ++ void *data, uint32_t time, char *format, ...) ++{ ++ dwc_irqflags_t flags; ++ work_container_t *container; ++ static char name[128]; ++ struct timeval tv; ++ va_list args; ++ ++ va_start(args, format); ++ DWC_VSNPRINTF(name, 128, format, args); ++ va_end(args); ++ ++ DWC_SPINLOCK_IRQSAVE(wq->lock, &flags); ++ wq->pending++; ++ DWC_SPINUNLOCK_IRQRESTORE(wq->lock, flags); ++ DWC_WAITQ_TRIGGER(wq->waitq); ++ ++ container = DWC_ALLOC_ATOMIC(sizeof(*container)); ++ if (!container) { ++ DWC_ERROR("Cannot allocate memory for container"); ++ return; ++ } ++ ++ container->name = DWC_STRDUP(name); ++ if (!container->name) { ++ DWC_ERROR("Cannot allocate memory for container->name"); ++ DWC_FREE(container); ++ return; ++ } ++ ++ container->cb = cb; ++ container->data = data; ++ container->wq = wq; ++ tv.tv_sec = time / 1000; ++ tv.tv_usec = (time - tv.tv_sec * 1000) * 1000; ++ container->hz = tvtohz(&tv); ++ wq->container = container; ++ ++ DWC_DEBUG("Queueing work: %s, container=%p", container->name, container); ++ workqueue_enqueue(wq->taskq, &container->task); ++} ++ ++int DWC_WORKQ_PENDING(dwc_workq_t *wq) ++{ ++ return wq->pending; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_crypto.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_crypto.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,308 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_crypto.c $ ++ * $Revision: #5 $ ++ * $Date: 2010/09/28 $ ++ * $Change: 1596182 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++ ++/** @file ++ * This file contains the WUSB cryptographic routines. ++ */ ++ ++#ifdef DWC_CRYPTOLIB ++ ++#include "dwc_crypto.h" ++#include "usb.h" ++ ++#ifdef DEBUG ++static inline void dump_bytes(char *name, uint8_t *bytes, int len) ++{ ++ int i; ++ DWC_PRINTF("%s: ", name); ++ for (i=0; idst == src, then the bytes will be encrypted ++ * in-place. ++ * ++ * @return 0 on success, negative error code on error. ++ */ ++int dwc_wusb_aes_encrypt(u8 *src, u8 *key, u8 *dst) ++{ ++ u8 block_t[16]; ++ DWC_MEMSET(block_t, 0, 16); ++ ++ return DWC_AES_CBC(src, 16, key, 16, block_t, dst); ++} ++ ++/** ++ * The CCM-MAC-FUNCTION described in section 6.5 of the WUSB spec. ++ * This function takes a data string and returns the encrypted CBC ++ * Counter-mode MIC. ++ * ++ * @param key The 128-bit symmetric key. ++ * @param nonce The CCM nonce. ++ * @param label The unique 14-byte ASCII text label. ++ * @param bytes The byte array to be encrypted. ++ * @param len Length of the byte array. ++ * @param result Byte array to receive the 8-byte encrypted MIC. ++ */ ++void dwc_wusb_cmf(u8 *key, u8 *nonce, ++ char *label, u8 *bytes, int len, u8 *result) ++{ ++ u8 block_m[16]; ++ u8 block_x[16]; ++ u8 block_t[8]; ++ int idx, blkNum; ++ u16 la = (u16)(len + 14); ++ ++ /* Set the AES-128 key */ ++ //dwc_aes_setkey(tfm, key, 16); ++ ++ /* Fill block B0 from flags = 0x59, N, and l(m) = 0 */ ++ block_m[0] = 0x59; ++ for (idx = 0; idx < 13; idx++) ++ block_m[idx + 1] = nonce[idx]; ++ block_m[14] = 0; ++ block_m[15] = 0; ++ ++ /* Produce the CBC IV */ ++ dwc_wusb_aes_encrypt(block_m, key, block_x); ++ show_block(block_m, "CBC IV in: ", "\n", 0); ++ show_block(block_x, "CBC IV out:", "\n", 0); ++ ++ /* Fill block B1 from l(a) = Blen + 14, and A */ ++ block_x[0] ^= (u8)(la >> 8); ++ block_x[1] ^= (u8)la; ++ for (idx = 0; idx < 14; idx++) ++ block_x[idx + 2] ^= label[idx]; ++ show_block(block_x, "After xor: ", "b1\n", 16); ++ ++ dwc_wusb_aes_encrypt(block_x, key, block_x); ++ show_block(block_x, "After AES: ", "b1\n", 16); ++ ++ idx = 0; ++ blkNum = 0; ++ ++ /* Fill remaining blocks with B */ ++ while (len-- > 0) { ++ block_x[idx] ^= *bytes++; ++ if (++idx >= 16) { ++ idx = 0; ++ show_block(block_x, "After xor: ", "\n", blkNum); ++ dwc_wusb_aes_encrypt(block_x, key, block_x); ++ show_block(block_x, "After AES: ", "\n", blkNum); ++ blkNum++; ++ } ++ } ++ ++ /* Handle partial last block */ ++ if (idx > 0) { ++ show_block(block_x, "After xor: ", "\n", blkNum); ++ dwc_wusb_aes_encrypt(block_x, key, block_x); ++ show_block(block_x, "After AES: ", "\n", blkNum); ++ } ++ ++ /* Save the MIC tag */ ++ DWC_MEMCPY(block_t, block_x, 8); ++ show_block(block_t, "MIC tag : ", NULL, 8); ++ ++ /* Fill block A0 from flags = 0x01, N, and counter = 0 */ ++ block_m[0] = 0x01; ++ block_m[14] = 0; ++ block_m[15] = 0; ++ ++ /* Encrypt the counter */ ++ dwc_wusb_aes_encrypt(block_m, key, block_x); ++ show_block(block_x, "CTR[MIC] : ", NULL, 8); ++ ++ /* XOR with MIC tag */ ++ for (idx = 0; idx < 8; idx++) { ++ block_t[idx] ^= block_x[idx]; ++ } ++ ++ /* Return result to caller */ ++ DWC_MEMCPY(result, block_t, 8); ++ show_block(result, "CCM-MIC : ", NULL, 8); ++ ++} ++ ++/** ++ * The PRF function described in section 6.5 of the WUSB spec. This function ++ * concatenates MIC values returned from dwc_cmf() to create a value of ++ * the requested length. ++ * ++ * @param prf_len Length of the PRF function in bits (64, 128, or 256). ++ * @param key, nonce, label, bytes, len Same as for dwc_cmf(). ++ * @param result Byte array to receive the result. ++ */ ++void dwc_wusb_prf(int prf_len, u8 *key, ++ u8 *nonce, char *label, u8 *bytes, int len, u8 *result) ++{ ++ int i; ++ ++ nonce[0] = 0; ++ for (i = 0; i < prf_len >> 6; i++, nonce[0]++) { ++ dwc_wusb_cmf(key, nonce, label, bytes, len, result); ++ result += 8; ++ } ++} ++ ++/** ++ * Fills in CCM Nonce per the WUSB spec. ++ * ++ * @param[in] haddr Host address. ++ * @param[in] daddr Device address. ++ * @param[in] tkid Session Key(PTK) identifier. ++ * @param[out] nonce Pointer to where the CCM Nonce output is to be written. ++ */ ++void dwc_wusb_fill_ccm_nonce(uint16_t haddr, uint16_t daddr, uint8_t *tkid, ++ uint8_t *nonce) ++{ ++ ++ DWC_DEBUG("%s %x %x\n", __func__, daddr, haddr); ++ ++ DWC_MEMSET(&nonce[0], 0, 16); ++ ++ DWC_MEMCPY(&nonce[6], tkid, 3); ++ nonce[9] = daddr & 0xFF; ++ nonce[10] = (daddr >> 8) & 0xFF; ++ nonce[11] = haddr & 0xFF; ++ nonce[12] = (haddr >> 8) & 0xFF; ++ ++ dump_bytes("CCM nonce", nonce, 16); ++} ++ ++/** ++ * Generates a 16-byte cryptographic-grade random number for the Host/Device ++ * Nonce. ++ */ ++void dwc_wusb_gen_nonce(uint16_t addr, uint8_t *nonce) ++{ ++ uint8_t inonce[16]; ++ uint32_t temp[4]; ++ ++ /* Fill in the Nonce */ ++ DWC_MEMSET(&inonce[0], 0, sizeof(inonce)); ++ inonce[9] = addr & 0xFF; ++ inonce[10] = (addr >> 8) & 0xFF; ++ inonce[11] = inonce[9]; ++ inonce[12] = inonce[10]; ++ ++ /* Collect "randomness samples" */ ++ DWC_RANDOM_BYTES((uint8_t *)temp, 16); ++ ++ dwc_wusb_prf_128((uint8_t *)temp, nonce, ++ "Random Numbers", (uint8_t *)temp, sizeof(temp), ++ nonce); ++} ++ ++/** ++ * Generates the Session Key (PTK) and Key Confirmation Key (KCK) per the ++ * WUSB spec. ++ * ++ * @param[in] ccm_nonce Pointer to CCM Nonce. ++ * @param[in] mk Master Key to derive the session from ++ * @param[in] hnonce Pointer to Host Nonce. ++ * @param[in] dnonce Pointer to Device Nonce. ++ * @param[out] kck Pointer to where the KCK output is to be written. ++ * @param[out] ptk Pointer to where the PTK output is to be written. ++ */ ++void dwc_wusb_gen_key(uint8_t *ccm_nonce, uint8_t *mk, uint8_t *hnonce, ++ uint8_t *dnonce, uint8_t *kck, uint8_t *ptk) ++{ ++ uint8_t idata[32]; ++ uint8_t odata[32]; ++ ++ dump_bytes("ck", mk, 16); ++ dump_bytes("hnonce", hnonce, 16); ++ dump_bytes("dnonce", dnonce, 16); ++ ++ /* The data is the HNonce and DNonce concatenated */ ++ DWC_MEMCPY(&idata[0], hnonce, 16); ++ DWC_MEMCPY(&idata[16], dnonce, 16); ++ ++ dwc_wusb_prf_256(mk, ccm_nonce, "Pair-wise keys", idata, 32, odata); ++ ++ /* Low 16 bytes of the result is the KCK, high 16 is the PTK */ ++ DWC_MEMCPY(kck, &odata[0], 16); ++ DWC_MEMCPY(ptk, &odata[16], 16); ++ ++ dump_bytes("kck", kck, 16); ++ dump_bytes("ptk", ptk, 16); ++} ++ ++/** ++ * Generates the Message Integrity Code over the Handshake data per the ++ * WUSB spec. ++ * ++ * @param ccm_nonce Pointer to CCM Nonce. ++ * @param kck Pointer to Key Confirmation Key. ++ * @param data Pointer to Handshake data to be checked. ++ * @param mic Pointer to where the MIC output is to be written. ++ */ ++void dwc_wusb_gen_mic(uint8_t *ccm_nonce, uint8_t *kck, ++ uint8_t *data, uint8_t *mic) ++{ ++ ++ dwc_wusb_prf_64(kck, ccm_nonce, "out-of-bandMIC", ++ data, WUSB_HANDSHAKE_LEN_FOR_MIC, mic); ++} ++ ++#endif /* DWC_CRYPTOLIB */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_crypto.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_crypto.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,111 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_crypto.h $ ++ * $Revision: #3 $ ++ * $Date: 2010/09/28 $ ++ * $Change: 1596182 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++ ++#ifndef _DWC_CRYPTO_H_ ++#define _DWC_CRYPTO_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/** @file ++ * ++ * This file contains declarations for the WUSB Cryptographic routines as ++ * defined in the WUSB spec. They are only to be used internally by the DWC UWB ++ * modules. ++ */ ++ ++#include "dwc_os.h" ++ ++int dwc_wusb_aes_encrypt(u8 *src, u8 *key, u8 *dst); ++ ++void dwc_wusb_cmf(u8 *key, u8 *nonce, ++ char *label, u8 *bytes, int len, u8 *result); ++void dwc_wusb_prf(int prf_len, u8 *key, ++ u8 *nonce, char *label, u8 *bytes, int len, u8 *result); ++ ++/** ++ * The PRF-64 function described in section 6.5 of the WUSB spec. ++ * ++ * @param key, nonce, label, bytes, len, result Same as for dwc_prf(). ++ */ ++static inline void dwc_wusb_prf_64(u8 *key, u8 *nonce, ++ char *label, u8 *bytes, int len, u8 *result) ++{ ++ dwc_wusb_prf(64, key, nonce, label, bytes, len, result); ++} ++ ++/** ++ * The PRF-128 function described in section 6.5 of the WUSB spec. ++ * ++ * @param key, nonce, label, bytes, len, result Same as for dwc_prf(). ++ */ ++static inline void dwc_wusb_prf_128(u8 *key, u8 *nonce, ++ char *label, u8 *bytes, int len, u8 *result) ++{ ++ dwc_wusb_prf(128, key, nonce, label, bytes, len, result); ++} ++ ++/** ++ * The PRF-256 function described in section 6.5 of the WUSB spec. ++ * ++ * @param key, nonce, label, bytes, len, result Same as for dwc_prf(). ++ */ ++static inline void dwc_wusb_prf_256(u8 *key, u8 *nonce, ++ char *label, u8 *bytes, int len, u8 *result) ++{ ++ dwc_wusb_prf(256, key, nonce, label, bytes, len, result); ++} ++ ++ ++void dwc_wusb_fill_ccm_nonce(uint16_t haddr, uint16_t daddr, uint8_t *tkid, ++ uint8_t *nonce); ++void dwc_wusb_gen_nonce(uint16_t addr, ++ uint8_t *nonce); ++ ++void dwc_wusb_gen_key(uint8_t *ccm_nonce, uint8_t *mk, ++ uint8_t *hnonce, uint8_t *dnonce, ++ uint8_t *kck, uint8_t *ptk); ++ ++ ++void dwc_wusb_gen_mic(uint8_t *ccm_nonce, uint8_t ++ *kck, uint8_t *data, uint8_t *mic); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DWC_CRYPTO_H_ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_dh.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_dh.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,291 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_dh.c $ ++ * $Revision: #3 $ ++ * $Date: 2010/09/28 $ ++ * $Change: 1596182 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++#ifdef DWC_CRYPTOLIB ++ ++#ifndef CONFIG_MACH_IPMATE ++ ++#include "dwc_dh.h" ++#include "dwc_modpow.h" ++ ++#ifdef DEBUG ++/* This function prints out a buffer in the format described in the Association ++ * Model specification. */ ++static void dh_dump(char *str, void *_num, int len) ++{ ++ uint8_t *num = _num; ++ int i; ++ DWC_PRINTF("%s\n", str); ++ for (i = 0; i < len; i ++) { ++ DWC_PRINTF("%02x", num[i]); ++ if (((i + 1) % 2) == 0) DWC_PRINTF(" "); ++ if (((i + 1) % 26) == 0) DWC_PRINTF("\n"); ++ } ++ ++ DWC_PRINTF("\n"); ++} ++#else ++#define dh_dump(_x...) do {; } while(0) ++#endif ++ ++/* Constant g value */ ++static __u32 dh_g[] = { ++ 0x02000000, ++}; ++ ++/* Constant p value */ ++static __u32 dh_p[] = { ++ 0xFFFFFFFF, 0xFFFFFFFF, 0xA2DA0FC9, 0x34C26821, 0x8B62C6C4, 0xD11CDC80, 0x084E0229, 0x74CC678A, ++ 0xA6BE0B02, 0x229B133B, 0x79084A51, 0xDD04348E, 0xB31995EF, 0x1B433ACD, 0x6D0A2B30, 0x37145FF2, ++ 0x6D35E14F, 0x45C2516D, 0x76B585E4, 0xC67E5E62, 0xE9424CF4, 0x6BED37A6, 0xB65CFF0B, 0xEDB706F4, ++ 0xFB6B38EE, 0xA59F895A, 0x11249FAE, 0xE61F4B7C, 0x51662849, 0x3D5BE4EC, 0xB87C00C2, 0x05BF63A1, ++ 0x3648DA98, 0x9AD3551C, 0xA83F1669, 0x5FCF24FD, 0x235D6583, 0x96ADA3DC, 0x56F3621C, 0xBB528520, ++ 0x0729D59E, 0x6D969670, 0x4E350C67, 0x0498BC4A, 0x086C74F1, 0x7C2118CA, 0x465E9032, 0x3BCE362E, ++ 0x2C779EE3, 0x03860E18, 0xA283279B, 0x8FA207EC, 0xF05DC5B5, 0xC9524C6F, 0xF6CB2BDE, 0x18175895, ++ 0x7C499539, 0xE56A95EA, 0x1826D215, 0x1005FA98, 0x5A8E7215, 0x2DC4AA8A, 0x0D1733AD, 0x337A5004, ++ 0xAB2155A8, 0x64BA1CDF, 0x0485FBEC, 0x0AEFDB58, 0x5771EA8A, 0x7D0C065D, 0x850F97B3, 0xC7E4E1A6, ++ 0x8CAEF5AB, 0xD73309DB, 0xE0948C1E, 0x9D61254A, 0x26D2E3CE, 0x6BEED21A, 0x06FA2FF1, 0x64088AD9, ++ 0x730276D8, 0x646AC83E, 0x182B1F52, 0x0C207B17, 0x5717E1BB, 0x6C5D617A, 0xC0880977, 0xE246D9BA, ++ 0xA04FE208, 0x31ABE574, 0xFC5BDB43, 0x8E10FDE0, 0x20D1824B, 0xCAD23AA9, 0xFFFFFFFF, 0xFFFFFFFF, ++}; ++ ++static void dh_swap_bytes(void *_in, void *_out, uint32_t len) ++{ ++ uint8_t *in = _in; ++ uint8_t *out = _out; ++ int i; ++ for (i=0; inext = (link); \ ++ (link)->prev = (link); \ ++} while (0) ++ ++#define DWC_LIST_FIRST(link) ((link)->next) ++#define DWC_LIST_LAST(link) ((link)->prev) ++#define DWC_LIST_END(link) (link) ++#define DWC_LIST_NEXT(link) ((link)->next) ++#define DWC_LIST_PREV(link) ((link)->prev) ++#define DWC_LIST_EMPTY(link) \ ++ (DWC_LIST_FIRST(link) == DWC_LIST_END(link)) ++#define DWC_LIST_ENTRY(link, type, field) \ ++ (type *)((uint8_t *)(link) - (size_t)(&((type *)0)->field)) ++ ++#if 0 ++#define DWC_LIST_INSERT_HEAD(list, link) do { \ ++ (link)->next = (list)->next; \ ++ (link)->prev = (list); \ ++ (list)->next->prev = (link); \ ++ (list)->next = (link); \ ++} while (0) ++ ++#define DWC_LIST_INSERT_TAIL(list, link) do { \ ++ (link)->next = (list); \ ++ (link)->prev = (list)->prev; \ ++ (list)->prev->next = (link); \ ++ (list)->prev = (link); \ ++} while (0) ++#else ++#define DWC_LIST_INSERT_HEAD(list, link) do { \ ++ dwc_list_link_t *__next__ = (list)->next; \ ++ __next__->prev = (link); \ ++ (link)->next = __next__; \ ++ (link)->prev = (list); \ ++ (list)->next = (link); \ ++} while (0) ++ ++#define DWC_LIST_INSERT_TAIL(list, link) do { \ ++ dwc_list_link_t *__prev__ = (list)->prev; \ ++ (list)->prev = (link); \ ++ (link)->next = (list); \ ++ (link)->prev = __prev__; \ ++ __prev__->next = (link); \ ++} while (0) ++#endif ++ ++#if 0 ++static inline void __list_add(struct list_head *new, ++ struct list_head *prev, ++ struct list_head *next) ++{ ++ next->prev = new; ++ new->next = next; ++ new->prev = prev; ++ prev->next = new; ++} ++ ++static inline void list_add(struct list_head *new, struct list_head *head) ++{ ++ __list_add(new, head, head->next); ++} ++ ++static inline void list_add_tail(struct list_head *new, struct list_head *head) ++{ ++ __list_add(new, head->prev, head); ++} ++ ++static inline void __list_del(struct list_head * prev, struct list_head * next) ++{ ++ next->prev = prev; ++ prev->next = next; ++} ++ ++static inline void list_del(struct list_head *entry) ++{ ++ __list_del(entry->prev, entry->next); ++ entry->next = LIST_POISON1; ++ entry->prev = LIST_POISON2; ++} ++#endif ++ ++#define DWC_LIST_REMOVE(link) do { \ ++ (link)->next->prev = (link)->prev; \ ++ (link)->prev->next = (link)->next; \ ++} while (0) ++ ++#define DWC_LIST_REMOVE_INIT(link) do { \ ++ DWC_LIST_REMOVE(link); \ ++ DWC_LIST_INIT(link); \ ++} while (0) ++ ++#define DWC_LIST_MOVE_HEAD(list, link) do { \ ++ DWC_LIST_REMOVE(link); \ ++ DWC_LIST_INSERT_HEAD(list, link); \ ++} while (0) ++ ++#define DWC_LIST_MOVE_TAIL(list, link) do { \ ++ DWC_LIST_REMOVE(link); \ ++ DWC_LIST_INSERT_TAIL(list, link); \ ++} while (0) ++ ++#define DWC_LIST_FOREACH(var, list) \ ++ for((var) = DWC_LIST_FIRST(list); \ ++ (var) != DWC_LIST_END(list); \ ++ (var) = DWC_LIST_NEXT(var)) ++ ++#define DWC_LIST_FOREACH_SAFE(var, var2, list) \ ++ for((var) = DWC_LIST_FIRST(list), (var2) = DWC_LIST_NEXT(var); \ ++ (var) != DWC_LIST_END(list); \ ++ (var) = (var2), (var2) = DWC_LIST_NEXT(var2)) ++ ++#define DWC_LIST_FOREACH_REVERSE(var, list) \ ++ for((var) = DWC_LIST_LAST(list); \ ++ (var) != DWC_LIST_END(list); \ ++ (var) = DWC_LIST_PREV(var)) ++ ++/* ++ * Singly-linked List definitions. ++ */ ++#define DWC_SLIST_HEAD(name, type) \ ++struct name { \ ++ struct type *slh_first; /* first element */ \ ++} ++ ++#define DWC_SLIST_HEAD_INITIALIZER(head) \ ++ { NULL } ++ ++#define DWC_SLIST_ENTRY(type) \ ++struct { \ ++ struct type *sle_next; /* next element */ \ ++} ++ ++/* ++ * Singly-linked List access methods. ++ */ ++#define DWC_SLIST_FIRST(head) ((head)->slh_first) ++#define DWC_SLIST_END(head) NULL ++#define DWC_SLIST_EMPTY(head) (SLIST_FIRST(head) == SLIST_END(head)) ++#define DWC_SLIST_NEXT(elm, field) ((elm)->field.sle_next) ++ ++#define DWC_SLIST_FOREACH(var, head, field) \ ++ for((var) = SLIST_FIRST(head); \ ++ (var) != SLIST_END(head); \ ++ (var) = SLIST_NEXT(var, field)) ++ ++#define DWC_SLIST_FOREACH_PREVPTR(var, varp, head, field) \ ++ for((varp) = &SLIST_FIRST((head)); \ ++ ((var) = *(varp)) != SLIST_END(head); \ ++ (varp) = &SLIST_NEXT((var), field)) ++ ++/* ++ * Singly-linked List functions. ++ */ ++#define DWC_SLIST_INIT(head) { \ ++ SLIST_FIRST(head) = SLIST_END(head); \ ++} ++ ++#define DWC_SLIST_INSERT_AFTER(slistelm, elm, field) do { \ ++ (elm)->field.sle_next = (slistelm)->field.sle_next; \ ++ (slistelm)->field.sle_next = (elm); \ ++} while (0) ++ ++#define DWC_SLIST_INSERT_HEAD(head, elm, field) do { \ ++ (elm)->field.sle_next = (head)->slh_first; \ ++ (head)->slh_first = (elm); \ ++} while (0) ++ ++#define DWC_SLIST_REMOVE_NEXT(head, elm, field) do { \ ++ (elm)->field.sle_next = (elm)->field.sle_next->field.sle_next; \ ++} while (0) ++ ++#define DWC_SLIST_REMOVE_HEAD(head, field) do { \ ++ (head)->slh_first = (head)->slh_first->field.sle_next; \ ++} while (0) ++ ++#define DWC_SLIST_REMOVE(head, elm, type, field) do { \ ++ if ((head)->slh_first == (elm)) { \ ++ SLIST_REMOVE_HEAD((head), field); \ ++ } \ ++ else { \ ++ struct type *curelm = (head)->slh_first; \ ++ while( curelm->field.sle_next != (elm) ) \ ++ curelm = curelm->field.sle_next; \ ++ curelm->field.sle_next = \ ++ curelm->field.sle_next->field.sle_next; \ ++ } \ ++} while (0) ++ ++/* ++ * Simple queue definitions. ++ */ ++#define DWC_SIMPLEQ_HEAD(name, type) \ ++struct name { \ ++ struct type *sqh_first; /* first element */ \ ++ struct type **sqh_last; /* addr of last next element */ \ ++} ++ ++#define DWC_SIMPLEQ_HEAD_INITIALIZER(head) \ ++ { NULL, &(head).sqh_first } ++ ++#define DWC_SIMPLEQ_ENTRY(type) \ ++struct { \ ++ struct type *sqe_next; /* next element */ \ ++} ++ ++/* ++ * Simple queue access methods. ++ */ ++#define DWC_SIMPLEQ_FIRST(head) ((head)->sqh_first) ++#define DWC_SIMPLEQ_END(head) NULL ++#define DWC_SIMPLEQ_EMPTY(head) (SIMPLEQ_FIRST(head) == SIMPLEQ_END(head)) ++#define DWC_SIMPLEQ_NEXT(elm, field) ((elm)->field.sqe_next) ++ ++#define DWC_SIMPLEQ_FOREACH(var, head, field) \ ++ for((var) = SIMPLEQ_FIRST(head); \ ++ (var) != SIMPLEQ_END(head); \ ++ (var) = SIMPLEQ_NEXT(var, field)) ++ ++/* ++ * Simple queue functions. ++ */ ++#define DWC_SIMPLEQ_INIT(head) do { \ ++ (head)->sqh_first = NULL; \ ++ (head)->sqh_last = &(head)->sqh_first; \ ++} while (0) ++ ++#define DWC_SIMPLEQ_INSERT_HEAD(head, elm, field) do { \ ++ if (((elm)->field.sqe_next = (head)->sqh_first) == NULL) \ ++ (head)->sqh_last = &(elm)->field.sqe_next; \ ++ (head)->sqh_first = (elm); \ ++} while (0) ++ ++#define DWC_SIMPLEQ_INSERT_TAIL(head, elm, field) do { \ ++ (elm)->field.sqe_next = NULL; \ ++ *(head)->sqh_last = (elm); \ ++ (head)->sqh_last = &(elm)->field.sqe_next; \ ++} while (0) ++ ++#define DWC_SIMPLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ ++ if (((elm)->field.sqe_next = (listelm)->field.sqe_next) == NULL)\ ++ (head)->sqh_last = &(elm)->field.sqe_next; \ ++ (listelm)->field.sqe_next = (elm); \ ++} while (0) ++ ++#define DWC_SIMPLEQ_REMOVE_HEAD(head, field) do { \ ++ if (((head)->sqh_first = (head)->sqh_first->field.sqe_next) == NULL) \ ++ (head)->sqh_last = &(head)->sqh_first; \ ++} while (0) ++ ++/* ++ * Tail queue definitions. ++ */ ++#define DWC_TAILQ_HEAD(name, type) \ ++struct name { \ ++ struct type *tqh_first; /* first element */ \ ++ struct type **tqh_last; /* addr of last next element */ \ ++} ++ ++#define DWC_TAILQ_HEAD_INITIALIZER(head) \ ++ { NULL, &(head).tqh_first } ++ ++#define DWC_TAILQ_ENTRY(type) \ ++struct { \ ++ struct type *tqe_next; /* next element */ \ ++ struct type **tqe_prev; /* address of previous next element */ \ ++} ++ ++/* ++ * tail queue access methods ++ */ ++#define DWC_TAILQ_FIRST(head) ((head)->tqh_first) ++#define DWC_TAILQ_END(head) NULL ++#define DWC_TAILQ_NEXT(elm, field) ((elm)->field.tqe_next) ++#define DWC_TAILQ_LAST(head, headname) \ ++ (*(((struct headname *)((head)->tqh_last))->tqh_last)) ++/* XXX */ ++#define DWC_TAILQ_PREV(elm, headname, field) \ ++ (*(((struct headname *)((elm)->field.tqe_prev))->tqh_last)) ++#define DWC_TAILQ_EMPTY(head) \ ++ (TAILQ_FIRST(head) == TAILQ_END(head)) ++ ++#define DWC_TAILQ_FOREACH(var, head, field) \ ++ for((var) = TAILQ_FIRST(head); \ ++ (var) != TAILQ_END(head); \ ++ (var) = TAILQ_NEXT(var, field)) ++ ++#define DWC_TAILQ_FOREACH_REVERSE(var, head, headname, field) \ ++ for((var) = TAILQ_LAST(head, headname); \ ++ (var) != TAILQ_END(head); \ ++ (var) = TAILQ_PREV(var, headname, field)) ++ ++/* ++ * Tail queue functions. ++ */ ++#define DWC_TAILQ_INIT(head) do { \ ++ (head)->tqh_first = NULL; \ ++ (head)->tqh_last = &(head)->tqh_first; \ ++} while (0) ++ ++#define DWC_TAILQ_INSERT_HEAD(head, elm, field) do { \ ++ if (((elm)->field.tqe_next = (head)->tqh_first) != NULL) \ ++ (head)->tqh_first->field.tqe_prev = \ ++ &(elm)->field.tqe_next; \ ++ else \ ++ (head)->tqh_last = &(elm)->field.tqe_next; \ ++ (head)->tqh_first = (elm); \ ++ (elm)->field.tqe_prev = &(head)->tqh_first; \ ++} while (0) ++ ++#define DWC_TAILQ_INSERT_TAIL(head, elm, field) do { \ ++ (elm)->field.tqe_next = NULL; \ ++ (elm)->field.tqe_prev = (head)->tqh_last; \ ++ *(head)->tqh_last = (elm); \ ++ (head)->tqh_last = &(elm)->field.tqe_next; \ ++} while (0) ++ ++#define DWC_TAILQ_INSERT_AFTER(head, listelm, elm, field) do { \ ++ if (((elm)->field.tqe_next = (listelm)->field.tqe_next) != NULL)\ ++ (elm)->field.tqe_next->field.tqe_prev = \ ++ &(elm)->field.tqe_next; \ ++ else \ ++ (head)->tqh_last = &(elm)->field.tqe_next; \ ++ (listelm)->field.tqe_next = (elm); \ ++ (elm)->field.tqe_prev = &(listelm)->field.tqe_next; \ ++} while (0) ++ ++#define DWC_TAILQ_INSERT_BEFORE(listelm, elm, field) do { \ ++ (elm)->field.tqe_prev = (listelm)->field.tqe_prev; \ ++ (elm)->field.tqe_next = (listelm); \ ++ *(listelm)->field.tqe_prev = (elm); \ ++ (listelm)->field.tqe_prev = &(elm)->field.tqe_next; \ ++} while (0) ++ ++#define DWC_TAILQ_REMOVE(head, elm, field) do { \ ++ if (((elm)->field.tqe_next) != NULL) \ ++ (elm)->field.tqe_next->field.tqe_prev = \ ++ (elm)->field.tqe_prev; \ ++ else \ ++ (head)->tqh_last = (elm)->field.tqe_prev; \ ++ *(elm)->field.tqe_prev = (elm)->field.tqe_next; \ ++} while (0) ++ ++#define DWC_TAILQ_REPLACE(head, elm, elm2, field) do { \ ++ if (((elm2)->field.tqe_next = (elm)->field.tqe_next) != NULL) \ ++ (elm2)->field.tqe_next->field.tqe_prev = \ ++ &(elm2)->field.tqe_next; \ ++ else \ ++ (head)->tqh_last = &(elm2)->field.tqe_next; \ ++ (elm2)->field.tqe_prev = (elm)->field.tqe_prev; \ ++ *(elm2)->field.tqe_prev = (elm2); \ ++} while (0) ++ ++/* ++ * Circular queue definitions. ++ */ ++#define DWC_CIRCLEQ_HEAD(name, type) \ ++struct name { \ ++ struct type *cqh_first; /* first element */ \ ++ struct type *cqh_last; /* last element */ \ ++} ++ ++#define DWC_CIRCLEQ_HEAD_INITIALIZER(head) \ ++ { DWC_CIRCLEQ_END(&head), DWC_CIRCLEQ_END(&head) } ++ ++#define DWC_CIRCLEQ_ENTRY(type) \ ++struct { \ ++ struct type *cqe_next; /* next element */ \ ++ struct type *cqe_prev; /* previous element */ \ ++} ++ ++/* ++ * Circular queue access methods ++ */ ++#define DWC_CIRCLEQ_FIRST(head) ((head)->cqh_first) ++#define DWC_CIRCLEQ_LAST(head) ((head)->cqh_last) ++#define DWC_CIRCLEQ_END(head) ((void *)(head)) ++#define DWC_CIRCLEQ_NEXT(elm, field) ((elm)->field.cqe_next) ++#define DWC_CIRCLEQ_PREV(elm, field) ((elm)->field.cqe_prev) ++#define DWC_CIRCLEQ_EMPTY(head) \ ++ (DWC_CIRCLEQ_FIRST(head) == DWC_CIRCLEQ_END(head)) ++ ++#define DWC_CIRCLEQ_EMPTY_ENTRY(elm, field) (((elm)->field.cqe_next == NULL) && ((elm)->field.cqe_prev == NULL)) ++ ++#define DWC_CIRCLEQ_FOREACH(var, head, field) \ ++ for((var) = DWC_CIRCLEQ_FIRST(head); \ ++ (var) != DWC_CIRCLEQ_END(head); \ ++ (var) = DWC_CIRCLEQ_NEXT(var, field)) ++ ++#define DWC_CIRCLEQ_FOREACH_SAFE(var, var2, head, field) \ ++ for((var) = DWC_CIRCLEQ_FIRST(head), var2 = DWC_CIRCLEQ_NEXT(var, field); \ ++ (var) != DWC_CIRCLEQ_END(head); \ ++ (var) = var2, var2 = DWC_CIRCLEQ_NEXT(var, field)) ++ ++#define DWC_CIRCLEQ_FOREACH_REVERSE(var, head, field) \ ++ for((var) = DWC_CIRCLEQ_LAST(head); \ ++ (var) != DWC_CIRCLEQ_END(head); \ ++ (var) = DWC_CIRCLEQ_PREV(var, field)) ++ ++/* ++ * Circular queue functions. ++ */ ++#define DWC_CIRCLEQ_INIT(head) do { \ ++ (head)->cqh_first = DWC_CIRCLEQ_END(head); \ ++ (head)->cqh_last = DWC_CIRCLEQ_END(head); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_INIT_ENTRY(elm, field) do { \ ++ (elm)->field.cqe_next = NULL; \ ++ (elm)->field.cqe_prev = NULL; \ ++} while (0) ++ ++#define DWC_CIRCLEQ_INSERT_AFTER(head, listelm, elm, field) do { \ ++ (elm)->field.cqe_next = (listelm)->field.cqe_next; \ ++ (elm)->field.cqe_prev = (listelm); \ ++ if ((listelm)->field.cqe_next == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_last = (elm); \ ++ else \ ++ (listelm)->field.cqe_next->field.cqe_prev = (elm); \ ++ (listelm)->field.cqe_next = (elm); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_INSERT_BEFORE(head, listelm, elm, field) do { \ ++ (elm)->field.cqe_next = (listelm); \ ++ (elm)->field.cqe_prev = (listelm)->field.cqe_prev; \ ++ if ((listelm)->field.cqe_prev == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_first = (elm); \ ++ else \ ++ (listelm)->field.cqe_prev->field.cqe_next = (elm); \ ++ (listelm)->field.cqe_prev = (elm); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_INSERT_HEAD(head, elm, field) do { \ ++ (elm)->field.cqe_next = (head)->cqh_first; \ ++ (elm)->field.cqe_prev = DWC_CIRCLEQ_END(head); \ ++ if ((head)->cqh_last == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_last = (elm); \ ++ else \ ++ (head)->cqh_first->field.cqe_prev = (elm); \ ++ (head)->cqh_first = (elm); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_INSERT_TAIL(head, elm, field) do { \ ++ (elm)->field.cqe_next = DWC_CIRCLEQ_END(head); \ ++ (elm)->field.cqe_prev = (head)->cqh_last; \ ++ if ((head)->cqh_first == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_first = (elm); \ ++ else \ ++ (head)->cqh_last->field.cqe_next = (elm); \ ++ (head)->cqh_last = (elm); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_REMOVE(head, elm, field) do { \ ++ if ((elm)->field.cqe_next == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_last = (elm)->field.cqe_prev; \ ++ else \ ++ (elm)->field.cqe_next->field.cqe_prev = \ ++ (elm)->field.cqe_prev; \ ++ if ((elm)->field.cqe_prev == DWC_CIRCLEQ_END(head)) \ ++ (head)->cqh_first = (elm)->field.cqe_next; \ ++ else \ ++ (elm)->field.cqe_prev->field.cqe_next = \ ++ (elm)->field.cqe_next; \ ++} while (0) ++ ++#define DWC_CIRCLEQ_REMOVE_INIT(head, elm, field) do { \ ++ DWC_CIRCLEQ_REMOVE(head, elm, field); \ ++ DWC_CIRCLEQ_INIT_ENTRY(elm, field); \ ++} while (0) ++ ++#define DWC_CIRCLEQ_REPLACE(head, elm, elm2, field) do { \ ++ if (((elm2)->field.cqe_next = (elm)->field.cqe_next) == \ ++ DWC_CIRCLEQ_END(head)) \ ++ (head).cqh_last = (elm2); \ ++ else \ ++ (elm2)->field.cqe_next->field.cqe_prev = (elm2); \ ++ if (((elm2)->field.cqe_prev = (elm)->field.cqe_prev) == \ ++ DWC_CIRCLEQ_END(head)) \ ++ (head).cqh_first = (elm2); \ ++ else \ ++ (elm2)->field.cqe_prev->field.cqe_next = (elm2); \ ++} while (0) ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DWC_LIST_H_ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_mem.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_mem.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,245 @@ ++/* Memory Debugging */ ++#ifdef DWC_DEBUG_MEMORY ++ ++#include "dwc_os.h" ++#include "dwc_list.h" ++ ++struct allocation { ++ void *addr; ++ void *ctx; ++ char *func; ++ int line; ++ uint32_t size; ++ int dma; ++ DWC_CIRCLEQ_ENTRY(allocation) entry; ++}; ++ ++DWC_CIRCLEQ_HEAD(allocation_queue, allocation); ++ ++struct allocation_manager { ++ void *mem_ctx; ++ struct allocation_queue allocations; ++ ++ /* statistics */ ++ int num; ++ int num_freed; ++ int num_active; ++ uint32_t total; ++ uint32_t cur; ++ uint32_t max; ++}; ++ ++static struct allocation_manager *manager = NULL; ++ ++static int add_allocation(void *ctx, uint32_t size, char const *func, int line, void *addr, ++ int dma) ++{ ++ struct allocation *a; ++ ++ DWC_ASSERT(manager != NULL, "manager not allocated"); ++ ++ a = __DWC_ALLOC_ATOMIC(manager->mem_ctx, sizeof(*a)); ++ if (!a) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ a->func = __DWC_ALLOC_ATOMIC(manager->mem_ctx, DWC_STRLEN(func) + 1); ++ if (!a->func) { ++ __DWC_FREE(manager->mem_ctx, a); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ DWC_MEMCPY(a->func, func, DWC_STRLEN(func) + 1); ++ a->addr = addr; ++ a->ctx = ctx; ++ a->line = line; ++ a->size = size; ++ a->dma = dma; ++ DWC_CIRCLEQ_INSERT_TAIL(&manager->allocations, a, entry); ++ ++ /* Update stats */ ++ manager->num++; ++ manager->num_active++; ++ manager->total += size; ++ manager->cur += size; ++ ++ if (manager->max < manager->cur) { ++ manager->max = manager->cur; ++ } ++ ++ return 0; ++} ++ ++static struct allocation *find_allocation(void *ctx, void *addr) ++{ ++ struct allocation *a; ++ ++ DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) { ++ if (a->ctx == ctx && a->addr == addr) { ++ return a; ++ } ++ } ++ ++ return NULL; ++} ++ ++static void free_allocation(void *ctx, void *addr, char const *func, int line) ++{ ++ struct allocation *a = find_allocation(ctx, addr); ++ ++ if (!a) { ++ DWC_ASSERT(0, ++ "Free of address %p that was never allocated or already freed %s:%d", ++ addr, func, line); ++ return; ++ } ++ ++ DWC_CIRCLEQ_REMOVE(&manager->allocations, a, entry); ++ ++ manager->num_active--; ++ manager->num_freed++; ++ manager->cur -= a->size; ++ __DWC_FREE(manager->mem_ctx, a->func); ++ __DWC_FREE(manager->mem_ctx, a); ++} ++ ++int dwc_memory_debug_start(void *mem_ctx) ++{ ++ DWC_ASSERT(manager == NULL, "Memory debugging has already started\n"); ++ ++ if (manager) { ++ return -DWC_E_BUSY; ++ } ++ ++ manager = __DWC_ALLOC(mem_ctx, sizeof(*manager)); ++ if (!manager) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ DWC_CIRCLEQ_INIT(&manager->allocations); ++ manager->mem_ctx = mem_ctx; ++ manager->num = 0; ++ manager->num_freed = 0; ++ manager->num_active = 0; ++ manager->total = 0; ++ manager->cur = 0; ++ manager->max = 0; ++ ++ return 0; ++} ++ ++void dwc_memory_debug_stop(void) ++{ ++ struct allocation *a; ++ ++ dwc_memory_debug_report(); ++ ++ DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) { ++ DWC_ERROR("Memory leaked from %s:%d\n", a->func, a->line); ++ free_allocation(a->ctx, a->addr, NULL, -1); ++ } ++ ++ __DWC_FREE(manager->mem_ctx, manager); ++} ++ ++void dwc_memory_debug_report(void) ++{ ++ struct allocation *a; ++ ++ DWC_PRINTF("\n\n\n----------------- Memory Debugging Report -----------------\n\n"); ++ DWC_PRINTF("Num Allocations = %d\n", manager->num); ++ DWC_PRINTF("Freed = %d\n", manager->num_freed); ++ DWC_PRINTF("Active = %d\n", manager->num_active); ++ DWC_PRINTF("Current Memory Used = %d\n", manager->cur); ++ DWC_PRINTF("Total Memory Used = %d\n", manager->total); ++ DWC_PRINTF("Maximum Memory Used at Once = %d\n", manager->max); ++ DWC_PRINTF("Unfreed allocations:\n"); ++ ++ DWC_CIRCLEQ_FOREACH(a, &manager->allocations, entry) { ++ DWC_PRINTF(" addr=%p, size=%d from %s:%d, DMA=%d\n", ++ a->addr, a->size, a->func, a->line, a->dma); ++ } ++} ++ ++/* The replacement functions */ ++void *dwc_alloc_debug(void *mem_ctx, uint32_t size, char const *func, int line) ++{ ++ void *addr = __DWC_ALLOC(mem_ctx, size); ++ ++ if (!addr) { ++ return NULL; ++ } ++ ++ if (add_allocation(mem_ctx, size, func, line, addr, 0)) { ++ __DWC_FREE(mem_ctx, addr); ++ return NULL; ++ } ++ ++ return addr; ++} ++ ++void *dwc_alloc_atomic_debug(void *mem_ctx, uint32_t size, char const *func, ++ int line) ++{ ++ void *addr = __DWC_ALLOC_ATOMIC(mem_ctx, size); ++ ++ if (!addr) { ++ return NULL; ++ } ++ ++ if (add_allocation(mem_ctx, size, func, line, addr, 0)) { ++ __DWC_FREE(mem_ctx, addr); ++ return NULL; ++ } ++ ++ return addr; ++} ++ ++void dwc_free_debug(void *mem_ctx, void *addr, char const *func, int line) ++{ ++ free_allocation(mem_ctx, addr, func, line); ++ __DWC_FREE(mem_ctx, addr); ++} ++ ++void *dwc_dma_alloc_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr, ++ char const *func, int line) ++{ ++ void *addr = __DWC_DMA_ALLOC(dma_ctx, size, dma_addr); ++ ++ if (!addr) { ++ return NULL; ++ } ++ ++ if (add_allocation(dma_ctx, size, func, line, addr, 1)) { ++ __DWC_DMA_FREE(dma_ctx, size, addr, *dma_addr); ++ return NULL; ++ } ++ ++ return addr; ++} ++ ++void *dwc_dma_alloc_atomic_debug(void *dma_ctx, uint32_t size, ++ dwc_dma_t *dma_addr, char const *func, int line) ++{ ++ void *addr = __DWC_DMA_ALLOC_ATOMIC(dma_ctx, size, dma_addr); ++ ++ if (!addr) { ++ return NULL; ++ } ++ ++ if (add_allocation(dma_ctx, size, func, line, addr, 1)) { ++ __DWC_DMA_FREE(dma_ctx, size, addr, *dma_addr); ++ return NULL; ++ } ++ ++ return addr; ++} ++ ++void dwc_dma_free_debug(void *dma_ctx, uint32_t size, void *virt_addr, ++ dwc_dma_t dma_addr, char const *func, int line) ++{ ++ free_allocation(dma_ctx, virt_addr, func, line); ++ __DWC_DMA_FREE(dma_ctx, size, virt_addr, dma_addr); ++} ++ ++#endif /* DWC_DEBUG_MEMORY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_modpow.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_modpow.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,636 @@ ++/* Bignum routines adapted from PUTTY sources. PuTTY copyright notice follows. ++ * ++ * PuTTY is copyright 1997-2007 Simon Tatham. ++ * ++ * Portions copyright Robert de Bath, Joris van Rantwijk, Delian ++ * Delchev, Andreas Schultz, Jeroen Massar, Wez Furlong, Nicolas Barry, ++ * Justin Bradford, Ben Harris, Malcolm Smith, Ahmad Khalifa, Markus ++ * Kuhn, and CORE SDI S.A. ++ * ++ * Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation files ++ * (the "Software"), to deal in the Software without restriction, ++ * including without limitation the rights to use, copy, modify, merge, ++ * publish, distribute, sublicense, and/or sell copies of the Software, ++ * and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE ++ * FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF ++ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION ++ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ */ ++#ifdef DWC_CRYPTOLIB ++ ++#ifndef CONFIG_MACH_IPMATE ++ ++#include "dwc_modpow.h" ++ ++#define BIGNUM_INT_MASK 0xFFFFFFFFUL ++#define BIGNUM_TOP_BIT 0x80000000UL ++#define BIGNUM_INT_BITS 32 ++ ++ ++static void *snmalloc(void *mem_ctx, size_t n, size_t size) ++{ ++ void *p; ++ size *= n; ++ if (size == 0) size = 1; ++ p = dwc_alloc(mem_ctx, size); ++ return p; ++} ++ ++#define snewn(ctx, n, type) ((type *)snmalloc((ctx), (n), sizeof(type))) ++#define sfree dwc_free ++ ++/* ++ * Usage notes: ++ * * Do not call the DIVMOD_WORD macro with expressions such as array ++ * subscripts, as some implementations object to this (see below). ++ * * Note that none of the division methods below will cope if the ++ * quotient won't fit into BIGNUM_INT_BITS. Callers should be careful ++ * to avoid this case. ++ * If this condition occurs, in the case of the x86 DIV instruction, ++ * an overflow exception will occur, which (according to a correspondent) ++ * will manifest on Windows as something like ++ * 0xC0000095: Integer overflow ++ * The C variant won't give the right answer, either. ++ */ ++ ++#define MUL_WORD(w1, w2) ((BignumDblInt)w1 * w2) ++ ++#if defined __GNUC__ && defined __i386__ ++#define DIVMOD_WORD(q, r, hi, lo, w) \ ++ __asm__("div %2" : \ ++ "=d" (r), "=a" (q) : \ ++ "r" (w), "d" (hi), "a" (lo)) ++#else ++#define DIVMOD_WORD(q, r, hi, lo, w) do { \ ++ BignumDblInt n = (((BignumDblInt)hi) << BIGNUM_INT_BITS) | lo; \ ++ q = n / w; \ ++ r = n % w; \ ++} while (0) ++#endif ++ ++// q = n / w; ++// r = n % w; ++ ++#define BIGNUM_INT_BYTES (BIGNUM_INT_BITS / 8) ++ ++#define BIGNUM_INTERNAL ++ ++static Bignum newbn(void *mem_ctx, int length) ++{ ++ Bignum b = snewn(mem_ctx, length + 1, BignumInt); ++ //if (!b) ++ //abort(); /* FIXME */ ++ DWC_MEMSET(b, 0, (length + 1) * sizeof(*b)); ++ b[0] = length; ++ return b; ++} ++ ++void freebn(void *mem_ctx, Bignum b) ++{ ++ /* ++ * Burn the evidence, just in case. ++ */ ++ DWC_MEMSET(b, 0, sizeof(b[0]) * (b[0] + 1)); ++ sfree(mem_ctx, b); ++} ++ ++/* ++ * Compute c = a * b. ++ * Input is in the first len words of a and b. ++ * Result is returned in the first 2*len words of c. ++ */ ++static void internal_mul(BignumInt *a, BignumInt *b, ++ BignumInt *c, int len) ++{ ++ int i, j; ++ BignumDblInt t; ++ ++ for (j = 0; j < 2 * len; j++) ++ c[j] = 0; ++ ++ for (i = len - 1; i >= 0; i--) { ++ t = 0; ++ for (j = len - 1; j >= 0; j--) { ++ t += MUL_WORD(a[i], (BignumDblInt) b[j]); ++ t += (BignumDblInt) c[i + j + 1]; ++ c[i + j + 1] = (BignumInt) t; ++ t = t >> BIGNUM_INT_BITS; ++ } ++ c[i] = (BignumInt) t; ++ } ++} ++ ++static void internal_add_shifted(BignumInt *number, ++ unsigned n, int shift) ++{ ++ int word = 1 + (shift / BIGNUM_INT_BITS); ++ int bshift = shift % BIGNUM_INT_BITS; ++ BignumDblInt addend; ++ ++ addend = (BignumDblInt)n << bshift; ++ ++ while (addend) { ++ addend += number[word]; ++ number[word] = (BignumInt) addend & BIGNUM_INT_MASK; ++ addend >>= BIGNUM_INT_BITS; ++ word++; ++ } ++} ++ ++/* ++ * Compute a = a % m. ++ * Input in first alen words of a and first mlen words of m. ++ * Output in first alen words of a ++ * (of which first alen-mlen words will be zero). ++ * The MSW of m MUST have its high bit set. ++ * Quotient is accumulated in the `quotient' array, which is a Bignum ++ * rather than the internal bigendian format. Quotient parts are shifted ++ * left by `qshift' before adding into quot. ++ */ ++static void internal_mod(BignumInt *a, int alen, ++ BignumInt *m, int mlen, ++ BignumInt *quot, int qshift) ++{ ++ BignumInt m0, m1; ++ unsigned int h; ++ int i, k; ++ ++ m0 = m[0]; ++ if (mlen > 1) ++ m1 = m[1]; ++ else ++ m1 = 0; ++ ++ for (i = 0; i <= alen - mlen; i++) { ++ BignumDblInt t; ++ unsigned int q, r, c, ai1; ++ ++ if (i == 0) { ++ h = 0; ++ } else { ++ h = a[i - 1]; ++ a[i - 1] = 0; ++ } ++ ++ if (i == alen - 1) ++ ai1 = 0; ++ else ++ ai1 = a[i + 1]; ++ ++ /* Find q = h:a[i] / m0 */ ++ if (h >= m0) { ++ /* ++ * Special case. ++ * ++ * To illustrate it, suppose a BignumInt is 8 bits, and ++ * we are dividing (say) A1:23:45:67 by A1:B2:C3. Then ++ * our initial division will be 0xA123 / 0xA1, which ++ * will give a quotient of 0x100 and a divide overflow. ++ * However, the invariants in this division algorithm ++ * are not violated, since the full number A1:23:... is ++ * _less_ than the quotient prefix A1:B2:... and so the ++ * following correction loop would have sorted it out. ++ * ++ * In this situation we set q to be the largest ++ * quotient we _can_ stomach (0xFF, of course). ++ */ ++ q = BIGNUM_INT_MASK; ++ } else { ++ /* Macro doesn't want an array subscript expression passed ++ * into it (see definition), so use a temporary. */ ++ BignumInt tmplo = a[i]; ++ DIVMOD_WORD(q, r, h, tmplo, m0); ++ ++ /* Refine our estimate of q by looking at ++ h:a[i]:a[i+1] / m0:m1 */ ++ t = MUL_WORD(m1, q); ++ if (t > ((BignumDblInt) r << BIGNUM_INT_BITS) + ai1) { ++ q--; ++ t -= m1; ++ r = (r + m0) & BIGNUM_INT_MASK; /* overflow? */ ++ if (r >= (BignumDblInt) m0 && ++ t > ((BignumDblInt) r << BIGNUM_INT_BITS) + ai1) q--; ++ } ++ } ++ ++ /* Subtract q * m from a[i...] */ ++ c = 0; ++ for (k = mlen - 1; k >= 0; k--) { ++ t = MUL_WORD(q, m[k]); ++ t += c; ++ c = (unsigned)(t >> BIGNUM_INT_BITS); ++ if ((BignumInt) t > a[i + k]) ++ c++; ++ a[i + k] -= (BignumInt) t; ++ } ++ ++ /* Add back m in case of borrow */ ++ if (c != h) { ++ t = 0; ++ for (k = mlen - 1; k >= 0; k--) { ++ t += m[k]; ++ t += a[i + k]; ++ a[i + k] = (BignumInt) t; ++ t = t >> BIGNUM_INT_BITS; ++ } ++ q--; ++ } ++ if (quot) ++ internal_add_shifted(quot, q, qshift + BIGNUM_INT_BITS * (alen - mlen - i)); ++ } ++} ++ ++/* ++ * Compute p % mod. ++ * The most significant word of mod MUST be non-zero. ++ * We assume that the result array is the same size as the mod array. ++ * We optionally write out a quotient if `quotient' is non-NULL. ++ * We can avoid writing out the result if `result' is NULL. ++ */ ++void bigdivmod(void *mem_ctx, Bignum p, Bignum mod, Bignum result, Bignum quotient) ++{ ++ BignumInt *n, *m; ++ int mshift; ++ int plen, mlen, i, j; ++ ++ /* Allocate m of size mlen, copy mod to m */ ++ /* We use big endian internally */ ++ mlen = mod[0]; ++ m = snewn(mem_ctx, mlen, BignumInt); ++ //if (!m) ++ //abort(); /* FIXME */ ++ for (j = 0; j < mlen; j++) ++ m[j] = mod[mod[0] - j]; ++ ++ /* Shift m left to make msb bit set */ ++ for (mshift = 0; mshift < BIGNUM_INT_BITS-1; mshift++) ++ if ((m[0] << mshift) & BIGNUM_TOP_BIT) ++ break; ++ if (mshift) { ++ for (i = 0; i < mlen - 1; i++) ++ m[i] = (m[i] << mshift) | (m[i + 1] >> (BIGNUM_INT_BITS - mshift)); ++ m[mlen - 1] = m[mlen - 1] << mshift; ++ } ++ ++ plen = p[0]; ++ /* Ensure plen > mlen */ ++ if (plen <= mlen) ++ plen = mlen + 1; ++ ++ /* Allocate n of size plen, copy p to n */ ++ n = snewn(mem_ctx, plen, BignumInt); ++ //if (!n) ++ //abort(); /* FIXME */ ++ for (j = 0; j < plen; j++) ++ n[j] = 0; ++ for (j = 1; j <= (int)p[0]; j++) ++ n[plen - j] = p[j]; ++ ++ /* Main computation */ ++ internal_mod(n, plen, m, mlen, quotient, mshift); ++ ++ /* Fixup result in case the modulus was shifted */ ++ if (mshift) { ++ for (i = plen - mlen - 1; i < plen - 1; i++) ++ n[i] = (n[i] << mshift) | (n[i + 1] >> (BIGNUM_INT_BITS - mshift)); ++ n[plen - 1] = n[plen - 1] << mshift; ++ internal_mod(n, plen, m, mlen, quotient, 0); ++ for (i = plen - 1; i >= plen - mlen; i--) ++ n[i] = (n[i] >> mshift) | (n[i - 1] << (BIGNUM_INT_BITS - mshift)); ++ } ++ ++ /* Copy result to buffer */ ++ if (result) { ++ for (i = 1; i <= (int)result[0]; i++) { ++ int j = plen - i; ++ result[i] = j >= 0 ? n[j] : 0; ++ } ++ } ++ ++ /* Free temporary arrays */ ++ for (i = 0; i < mlen; i++) ++ m[i] = 0; ++ sfree(mem_ctx, m); ++ for (i = 0; i < plen; i++) ++ n[i] = 0; ++ sfree(mem_ctx, n); ++} ++ ++/* ++ * Simple remainder. ++ */ ++Bignum bigmod(void *mem_ctx, Bignum a, Bignum b) ++{ ++ Bignum r = newbn(mem_ctx, b[0]); ++ bigdivmod(mem_ctx, a, b, r, NULL); ++ return r; ++} ++ ++/* ++ * Compute (base ^ exp) % mod. ++ */ ++Bignum dwc_modpow(void *mem_ctx, Bignum base_in, Bignum exp, Bignum mod) ++{ ++ BignumInt *a, *b, *n, *m; ++ int mshift; ++ int mlen, i, j; ++ Bignum base, result; ++ ++ /* ++ * The most significant word of mod needs to be non-zero. It ++ * should already be, but let's make sure. ++ */ ++ //assert(mod[mod[0]] != 0); ++ ++ /* ++ * Make sure the base is smaller than the modulus, by reducing ++ * it modulo the modulus if not. ++ */ ++ base = bigmod(mem_ctx, base_in, mod); ++ ++ /* Allocate m of size mlen, copy mod to m */ ++ /* We use big endian internally */ ++ mlen = mod[0]; ++ m = snewn(mem_ctx, mlen, BignumInt); ++ //if (!m) ++ //abort(); /* FIXME */ ++ for (j = 0; j < mlen; j++) ++ m[j] = mod[mod[0] - j]; ++ ++ /* Shift m left to make msb bit set */ ++ for (mshift = 0; mshift < BIGNUM_INT_BITS - 1; mshift++) ++ if ((m[0] << mshift) & BIGNUM_TOP_BIT) ++ break; ++ if (mshift) { ++ for (i = 0; i < mlen - 1; i++) ++ m[i] = ++ (m[i] << mshift) | (m[i + 1] >> ++ (BIGNUM_INT_BITS - mshift)); ++ m[mlen - 1] = m[mlen - 1] << mshift; ++ } ++ ++ /* Allocate n of size mlen, copy base to n */ ++ n = snewn(mem_ctx, mlen, BignumInt); ++ //if (!n) ++ //abort(); /* FIXME */ ++ i = mlen - base[0]; ++ for (j = 0; j < i; j++) ++ n[j] = 0; ++ for (j = 0; j < base[0]; j++) ++ n[i + j] = base[base[0] - j]; ++ ++ /* Allocate a and b of size 2*mlen. Set a = 1 */ ++ a = snewn(mem_ctx, 2 * mlen, BignumInt); ++ //if (!a) ++ //abort(); /* FIXME */ ++ b = snewn(mem_ctx, 2 * mlen, BignumInt); ++ //if (!b) ++ //abort(); /* FIXME */ ++ for (i = 0; i < 2 * mlen; i++) ++ a[i] = 0; ++ a[2 * mlen - 1] = 1; ++ ++ /* Skip leading zero bits of exp. */ ++ i = 0; ++ j = BIGNUM_INT_BITS - 1; ++ while (i < exp[0] && (exp[exp[0] - i] & (1 << j)) == 0) { ++ j--; ++ if (j < 0) { ++ i++; ++ j = BIGNUM_INT_BITS - 1; ++ } ++ } ++ ++ /* Main computation */ ++ while (i < exp[0]) { ++ while (j >= 0) { ++ internal_mul(a + mlen, a + mlen, b, mlen); ++ internal_mod(b, mlen * 2, m, mlen, NULL, 0); ++ if ((exp[exp[0] - i] & (1 << j)) != 0) { ++ internal_mul(b + mlen, n, a, mlen); ++ internal_mod(a, mlen * 2, m, mlen, NULL, 0); ++ } else { ++ BignumInt *t; ++ t = a; ++ a = b; ++ b = t; ++ } ++ j--; ++ } ++ i++; ++ j = BIGNUM_INT_BITS - 1; ++ } ++ ++ /* Fixup result in case the modulus was shifted */ ++ if (mshift) { ++ for (i = mlen - 1; i < 2 * mlen - 1; i++) ++ a[i] = ++ (a[i] << mshift) | (a[i + 1] >> ++ (BIGNUM_INT_BITS - mshift)); ++ a[2 * mlen - 1] = a[2 * mlen - 1] << mshift; ++ internal_mod(a, mlen * 2, m, mlen, NULL, 0); ++ for (i = 2 * mlen - 1; i >= mlen; i--) ++ a[i] = ++ (a[i] >> mshift) | (a[i - 1] << ++ (BIGNUM_INT_BITS - mshift)); ++ } ++ ++ /* Copy result to buffer */ ++ result = newbn(mem_ctx, mod[0]); ++ for (i = 0; i < mlen; i++) ++ result[result[0] - i] = a[i + mlen]; ++ while (result[0] > 1 && result[result[0]] == 0) ++ result[0]--; ++ ++ /* Free temporary arrays */ ++ for (i = 0; i < 2 * mlen; i++) ++ a[i] = 0; ++ sfree(mem_ctx, a); ++ for (i = 0; i < 2 * mlen; i++) ++ b[i] = 0; ++ sfree(mem_ctx, b); ++ for (i = 0; i < mlen; i++) ++ m[i] = 0; ++ sfree(mem_ctx, m); ++ for (i = 0; i < mlen; i++) ++ n[i] = 0; ++ sfree(mem_ctx, n); ++ ++ freebn(mem_ctx, base); ++ ++ return result; ++} ++ ++ ++#ifdef UNITTEST ++ ++static __u32 dh_p[] = { ++ 96, ++ 0xFFFFFFFF, ++ 0xFFFFFFFF, ++ 0xA93AD2CA, ++ 0x4B82D120, ++ 0xE0FD108E, ++ 0x43DB5BFC, ++ 0x74E5AB31, ++ 0x08E24FA0, ++ 0xBAD946E2, ++ 0x770988C0, ++ 0x7A615D6C, ++ 0xBBE11757, ++ 0x177B200C, ++ 0x521F2B18, ++ 0x3EC86A64, ++ 0xD8760273, ++ 0xD98A0864, ++ 0xF12FFA06, ++ 0x1AD2EE6B, ++ 0xCEE3D226, ++ 0x4A25619D, ++ 0x1E8C94E0, ++ 0xDB0933D7, ++ 0xABF5AE8C, ++ 0xA6E1E4C7, ++ 0xB3970F85, ++ 0x5D060C7D, ++ 0x8AEA7157, ++ 0x58DBEF0A, ++ 0xECFB8504, ++ 0xDF1CBA64, ++ 0xA85521AB, ++ 0x04507A33, ++ 0xAD33170D, ++ 0x8AAAC42D, ++ 0x15728E5A, ++ 0x98FA0510, ++ 0x15D22618, ++ 0xEA956AE5, ++ 0x3995497C, ++ 0x95581718, ++ 0xDE2BCBF6, ++ 0x6F4C52C9, ++ 0xB5C55DF0, ++ 0xEC07A28F, ++ 0x9B2783A2, ++ 0x180E8603, ++ 0xE39E772C, ++ 0x2E36CE3B, ++ 0x32905E46, ++ 0xCA18217C, ++ 0xF1746C08, ++ 0x4ABC9804, ++ 0x670C354E, ++ 0x7096966D, ++ 0x9ED52907, ++ 0x208552BB, ++ 0x1C62F356, ++ 0xDCA3AD96, ++ 0x83655D23, ++ 0xFD24CF5F, ++ 0x69163FA8, ++ 0x1C55D39A, ++ 0x98DA4836, ++ 0xA163BF05, ++ 0xC2007CB8, ++ 0xECE45B3D, ++ 0x49286651, ++ 0x7C4B1FE6, ++ 0xAE9F2411, ++ 0x5A899FA5, ++ 0xEE386BFB, ++ 0xF406B7ED, ++ 0x0BFF5CB6, ++ 0xA637ED6B, ++ 0xF44C42E9, ++ 0x625E7EC6, ++ 0xE485B576, ++ 0x6D51C245, ++ 0x4FE1356D, ++ 0xF25F1437, ++ 0x302B0A6D, ++ 0xCD3A431B, ++ 0xEF9519B3, ++ 0x8E3404DD, ++ 0x514A0879, ++ 0x3B139B22, ++ 0x020BBEA6, ++ 0x8A67CC74, ++ 0x29024E08, ++ 0x80DC1CD1, ++ 0xC4C6628B, ++ 0x2168C234, ++ 0xC90FDAA2, ++ 0xFFFFFFFF, ++ 0xFFFFFFFF, ++}; ++ ++static __u32 dh_a[] = { ++ 8, ++ 0xdf367516, ++ 0x86459caa, ++ 0xe2d459a4, ++ 0xd910dae0, ++ 0x8a8b5e37, ++ 0x67ab31c6, ++ 0xf0b55ea9, ++ 0x440051d6, ++}; ++ ++static __u32 dh_b[] = { ++ 8, ++ 0xded92656, ++ 0xe07a048a, ++ 0x6fa452cd, ++ 0x2df89d30, ++ 0xc75f1b0f, ++ 0x8ce3578f, ++ 0x7980a324, ++ 0x5daec786, ++}; ++ ++static __u32 dh_g[] = { ++ 1, ++ 2, ++}; ++ ++int main(void) ++{ ++ int i; ++ __u32 *k; ++ k = dwc_modpow(NULL, dh_g, dh_a, dh_p); ++ ++ printf("\n\n"); ++ for (i=0; i> 16; ++ printf("%04x %04x ", m, l); ++ if (!((i + 1)%13)) printf("\n"); ++ } ++ printf("\n\n"); ++ ++ if ((k[0] == 0x60) && (k[1] == 0x28e490e5) && (k[0x60] == 0x5a0d3d4e)) { ++ printf("PASS\n\n"); ++ } ++ else { ++ printf("FAIL\n\n"); ++ } ++ ++} ++ ++#endif /* UNITTEST */ ++ ++#endif /* CONFIG_MACH_IPMATE */ ++ ++#endif /*DWC_CRYPTOLIB */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_modpow.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_modpow.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,34 @@ ++/* ++ * dwc_modpow.h ++ * See dwc_modpow.c for license and changes ++ */ ++#ifndef _DWC_MODPOW_H ++#define _DWC_MODPOW_H ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "dwc_os.h" ++ ++/** @file ++ * ++ * This file defines the module exponentiation function which is only used ++ * internally by the DWC UWB modules for calculation of PKs during numeric ++ * association. The routine is taken from the PUTTY, an open source terminal ++ * emulator. The PUTTY License is preserved in the dwc_modpow.c file. ++ * ++ */ ++ ++typedef uint32_t BignumInt; ++typedef uint64_t BignumDblInt; ++typedef BignumInt *Bignum; ++ ++/* Compute modular exponentiaion */ ++extern Bignum dwc_modpow(void *mem_ctx, Bignum base_in, Bignum exp, Bignum mod); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _LINUX_BIGNUM_H */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_notifier.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_notifier.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,319 @@ ++#ifdef DWC_NOTIFYLIB ++ ++#include "dwc_notifier.h" ++#include "dwc_list.h" ++ ++typedef struct dwc_observer { ++ void *observer; ++ dwc_notifier_callback_t callback; ++ void *data; ++ char *notification; ++ DWC_CIRCLEQ_ENTRY(dwc_observer) list_entry; ++} observer_t; ++ ++DWC_CIRCLEQ_HEAD(observer_queue, dwc_observer); ++ ++typedef struct dwc_notifier { ++ void *mem_ctx; ++ void *object; ++ struct observer_queue observers; ++ DWC_CIRCLEQ_ENTRY(dwc_notifier) list_entry; ++} notifier_t; ++ ++DWC_CIRCLEQ_HEAD(notifier_queue, dwc_notifier); ++ ++typedef struct manager { ++ void *mem_ctx; ++ void *wkq_ctx; ++ dwc_workq_t *wq; ++// dwc_mutex_t *mutex; ++ struct notifier_queue notifiers; ++} manager_t; ++ ++static manager_t *manager = NULL; ++ ++static int create_manager(void *mem_ctx, void *wkq_ctx) ++{ ++ manager = dwc_alloc(mem_ctx, sizeof(manager_t)); ++ if (!manager) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ DWC_CIRCLEQ_INIT(&manager->notifiers); ++ ++ manager->wq = dwc_workq_alloc(wkq_ctx, "DWC Notification WorkQ"); ++ if (!manager->wq) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ return 0; ++} ++ ++static void free_manager(void) ++{ ++ dwc_workq_free(manager->wq); ++ ++ /* All notifiers must have unregistered themselves before this module ++ * can be removed. Hitting this assertion indicates a programmer ++ * error. */ ++ DWC_ASSERT(DWC_CIRCLEQ_EMPTY(&manager->notifiers), ++ "Notification manager being freed before all notifiers have been removed"); ++ dwc_free(manager->mem_ctx, manager); ++} ++ ++#ifdef DEBUG ++static void dump_manager(void) ++{ ++ notifier_t *n; ++ observer_t *o; ++ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ DWC_DEBUG("List of all notifiers and observers:\n"); ++ DWC_CIRCLEQ_FOREACH(n, &manager->notifiers, list_entry) { ++ DWC_DEBUG("Notifier %p has observers:\n", n->object); ++ DWC_CIRCLEQ_FOREACH(o, &n->observers, list_entry) { ++ DWC_DEBUG(" %p watching %s\n", o->observer, o->notification); ++ } ++ } ++} ++#else ++#define dump_manager(...) ++#endif ++ ++static observer_t *alloc_observer(void *mem_ctx, void *observer, char *notification, ++ dwc_notifier_callback_t callback, void *data) ++{ ++ observer_t *new_observer = dwc_alloc(mem_ctx, sizeof(observer_t)); ++ ++ if (!new_observer) { ++ return NULL; ++ } ++ ++ DWC_CIRCLEQ_INIT_ENTRY(new_observer, list_entry); ++ new_observer->observer = observer; ++ new_observer->notification = notification; ++ new_observer->callback = callback; ++ new_observer->data = data; ++ return new_observer; ++} ++ ++static void free_observer(void *mem_ctx, observer_t *observer) ++{ ++ dwc_free(mem_ctx, observer); ++} ++ ++static notifier_t *alloc_notifier(void *mem_ctx, void *object) ++{ ++ notifier_t *notifier; ++ ++ if (!object) { ++ return NULL; ++ } ++ ++ notifier = dwc_alloc(mem_ctx, sizeof(notifier_t)); ++ if (!notifier) { ++ return NULL; ++ } ++ ++ DWC_CIRCLEQ_INIT(¬ifier->observers); ++ DWC_CIRCLEQ_INIT_ENTRY(notifier, list_entry); ++ ++ notifier->mem_ctx = mem_ctx; ++ notifier->object = object; ++ return notifier; ++} ++ ++static void free_notifier(notifier_t *notifier) ++{ ++ observer_t *observer; ++ ++ DWC_CIRCLEQ_FOREACH(observer, ¬ifier->observers, list_entry) { ++ free_observer(notifier->mem_ctx, observer); ++ } ++ ++ dwc_free(notifier->mem_ctx, notifier); ++} ++ ++static notifier_t *find_notifier(void *object) ++{ ++ notifier_t *notifier; ++ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ if (!object) { ++ return NULL; ++ } ++ ++ DWC_CIRCLEQ_FOREACH(notifier, &manager->notifiers, list_entry) { ++ if (notifier->object == object) { ++ return notifier; ++ } ++ } ++ ++ return NULL; ++} ++ ++int dwc_alloc_notification_manager(void *mem_ctx, void *wkq_ctx) ++{ ++ return create_manager(mem_ctx, wkq_ctx); ++} ++ ++void dwc_free_notification_manager(void) ++{ ++ free_manager(); ++} ++ ++dwc_notifier_t *dwc_register_notifier(void *mem_ctx, void *object) ++{ ++ notifier_t *notifier; ++ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ notifier = find_notifier(object); ++ if (notifier) { ++ DWC_ERROR("Notifier %p is already registered\n", object); ++ return NULL; ++ } ++ ++ notifier = alloc_notifier(mem_ctx, object); ++ if (!notifier) { ++ return NULL; ++ } ++ ++ DWC_CIRCLEQ_INSERT_TAIL(&manager->notifiers, notifier, list_entry); ++ ++ DWC_INFO("Notifier %p registered", object); ++ dump_manager(); ++ ++ return notifier; ++} ++ ++void dwc_unregister_notifier(dwc_notifier_t *notifier) ++{ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ if (!DWC_CIRCLEQ_EMPTY(¬ifier->observers)) { ++ observer_t *o; ++ ++ DWC_ERROR("Notifier %p has active observers when removing\n", notifier->object); ++ DWC_CIRCLEQ_FOREACH(o, ¬ifier->observers, list_entry) { ++ DWC_DEBUGC(" %p watching %s\n", o->observer, o->notification); ++ } ++ ++ DWC_ASSERT(DWC_CIRCLEQ_EMPTY(¬ifier->observers), ++ "Notifier %p has active observers when removing", notifier); ++ } ++ ++ DWC_CIRCLEQ_REMOVE_INIT(&manager->notifiers, notifier, list_entry); ++ free_notifier(notifier); ++ ++ DWC_INFO("Notifier unregistered"); ++ dump_manager(); ++} ++ ++/* Add an observer to observe the notifier for a particular state, event, or notification. */ ++int dwc_add_observer(void *observer, void *object, char *notification, ++ dwc_notifier_callback_t callback, void *data) ++{ ++ notifier_t *notifier = find_notifier(object); ++ observer_t *new_observer; ++ ++ if (!notifier) { ++ DWC_ERROR("Notifier %p is not found when adding observer\n", object); ++ return -DWC_E_INVALID; ++ } ++ ++ new_observer = alloc_observer(notifier->mem_ctx, observer, notification, callback, data); ++ if (!new_observer) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ DWC_CIRCLEQ_INSERT_TAIL(¬ifier->observers, new_observer, list_entry); ++ ++ DWC_INFO("Added observer %p to notifier %p observing notification %s, callback=%p, data=%p", ++ observer, object, notification, callback, data); ++ ++ dump_manager(); ++ return 0; ++} ++ ++int dwc_remove_observer(void *observer) ++{ ++ notifier_t *n; ++ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ DWC_CIRCLEQ_FOREACH(n, &manager->notifiers, list_entry) { ++ observer_t *o; ++ observer_t *o2; ++ ++ DWC_CIRCLEQ_FOREACH_SAFE(o, o2, &n->observers, list_entry) { ++ if (o->observer == observer) { ++ DWC_CIRCLEQ_REMOVE_INIT(&n->observers, o, list_entry); ++ DWC_INFO("Removing observer %p from notifier %p watching notification %s:", ++ o->observer, n->object, o->notification); ++ free_observer(n->mem_ctx, o); ++ } ++ } ++ } ++ ++ dump_manager(); ++ return 0; ++} ++ ++typedef struct callback_data { ++ void *mem_ctx; ++ dwc_notifier_callback_t cb; ++ void *observer; ++ void *data; ++ void *object; ++ char *notification; ++ void *notification_data; ++} cb_data_t; ++ ++static void cb_task(void *data) ++{ ++ cb_data_t *cb = (cb_data_t *)data; ++ ++ cb->cb(cb->object, cb->notification, cb->observer, cb->notification_data, cb->data); ++ dwc_free(cb->mem_ctx, cb); ++} ++ ++void dwc_notify(dwc_notifier_t *notifier, char *notification, void *notification_data) ++{ ++ observer_t *o; ++ ++ DWC_ASSERT(manager, "Notification manager not found"); ++ ++ DWC_CIRCLEQ_FOREACH(o, ¬ifier->observers, list_entry) { ++ int len = DWC_STRLEN(notification); ++ ++ if (DWC_STRLEN(o->notification) != len) { ++ continue; ++ } ++ ++ if (DWC_STRNCMP(o->notification, notification, len) == 0) { ++ cb_data_t *cb_data = dwc_alloc(notifier->mem_ctx, sizeof(cb_data_t)); ++ ++ if (!cb_data) { ++ DWC_ERROR("Failed to allocate callback data\n"); ++ return; ++ } ++ ++ cb_data->mem_ctx = notifier->mem_ctx; ++ cb_data->cb = o->callback; ++ cb_data->observer = o->observer; ++ cb_data->data = o->data; ++ cb_data->object = notifier->object; ++ cb_data->notification = notification; ++ cb_data->notification_data = notification_data; ++ DWC_DEBUGC("Observer found %p for notification %s\n", o->observer, notification); ++ DWC_WORKQ_SCHEDULE(manager->wq, cb_task, cb_data, ++ "Notify callback from %p for Notification %s, to observer %p", ++ cb_data->object, notification, cb_data->observer); ++ } ++ } ++} ++ ++#endif /* DWC_NOTIFYLIB */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_notifier.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_notifier.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,122 @@ ++ ++#ifndef __DWC_NOTIFIER_H__ ++#define __DWC_NOTIFIER_H__ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++#include "dwc_os.h" ++ ++/** @file ++ * ++ * A simple implementation of the Observer pattern. Any "module" can ++ * register as an observer or notifier. The notion of "module" is abstract and ++ * can mean anything used to identify either an observer or notifier. Usually ++ * it will be a pointer to a data structure which contains some state, ie an ++ * object. ++ * ++ * Before any notifiers can be added, the global notification manager must be ++ * brought up with dwc_alloc_notification_manager(). ++ * dwc_free_notification_manager() will bring it down and free all resources. ++ * These would typically be called upon module load and unload. The ++ * notification manager is a single global instance that handles all registered ++ * observable modules and observers so this should be done only once. ++ * ++ * A module can be observable by using Notifications to publicize some general ++ * information about it's state or operation. It does not care who listens, or ++ * even if anyone listens, or what they do with the information. The observable ++ * modules do not need to know any information about it's observers or their ++ * interface, or their state or data. ++ * ++ * Any module can register to emit Notifications. It should publish a list of ++ * notifications that it can emit and their behavior, such as when they will get ++ * triggered, and what information will be provided to the observer. Then it ++ * should register itself as an observable module. See dwc_register_notifier(). ++ * ++ * Any module can observe any observable, registered module, provided it has a ++ * handle to the other module and knows what notifications to observe. See ++ * dwc_add_observer(). ++ * ++ * A function of type dwc_notifier_callback_t is called whenever a notification ++ * is triggered with one or more observers observing it. This function is ++ * called in it's own process so it may sleep or block if needed. It is ++ * guaranteed to be called sometime after the notification has occurred and will ++ * be called once per each time the notification is triggered. It will NOT be ++ * called in the same process context used to trigger the notification. ++ * ++ * @section Limitiations ++ * ++ * Keep in mind that Notifications that can be triggered in rapid sucession may ++ * schedule too many processes too handle. Be aware of this limitation when ++ * designing to use notifications, and only add notifications for appropriate ++ * observable information. ++ * ++ * Also Notification callbacks are not synchronous. If you need to synchronize ++ * the behavior between module/observer you must use other means. And perhaps ++ * that will mean Notifications are not the proper solution. ++ */ ++ ++struct dwc_notifier; ++typedef struct dwc_notifier dwc_notifier_t; ++ ++/** The callback function must be of this type. ++ * ++ * @param object This is the object that is being observed. ++ * @param notification This is the notification that was triggered. ++ * @param observer This is the observer ++ * @param notification_data This is notification-specific data that the notifier ++ * has included in this notification. The value of this should be published in ++ * the documentation of the observable module with the notifications. ++ * @param user_data This is any custom data that the observer provided when ++ * adding itself as an observer to the notification. */ ++typedef void (*dwc_notifier_callback_t)(void *object, char *notification, void *observer, ++ void *notification_data, void *user_data); ++ ++/** Brings up the notification manager. */ ++extern int dwc_alloc_notification_manager(void *mem_ctx, void *wkq_ctx); ++/** Brings down the notification manager. */ ++extern void dwc_free_notification_manager(void); ++ ++/** This function registers an observable module. A dwc_notifier_t object is ++ * returned to the observable module. This is an opaque object that is used by ++ * the observable module to trigger notifications. This object should only be ++ * accessible to functions that are authorized to trigger notifications for this ++ * module. Observers do not need this object. */ ++extern dwc_notifier_t *dwc_register_notifier(void *mem_ctx, void *object); ++ ++/** This function unregisters an observable module. All observers have to be ++ * removed prior to unregistration. */ ++extern void dwc_unregister_notifier(dwc_notifier_t *notifier); ++ ++/** Add a module as an observer to the observable module. The observable module ++ * needs to have previously registered with the notification manager. ++ * ++ * @param observer The observer module ++ * @param object The module to observe ++ * @param notification The notification to observe ++ * @param callback The callback function to call ++ * @param user_data Any additional user data to pass into the callback function */ ++extern int dwc_add_observer(void *observer, void *object, char *notification, ++ dwc_notifier_callback_t callback, void *user_data); ++ ++/** Removes the specified observer from all notifications that it is currently ++ * observing. */ ++extern int dwc_remove_observer(void *observer); ++ ++/** This function triggers a Notification. It should be called by the ++ * observable module, or any module or library which the observable module ++ * allows to trigger notification on it's behalf. Such as the dwc_cc_t. ++ * ++ * dwc_notify is a non-blocking function. Callbacks are scheduled called in ++ * their own process context for each trigger. Callbacks can be blocking. ++ * dwc_notify can be called from interrupt context if needed. ++ * ++ */ ++void dwc_notify(dwc_notifier_t *notifier, char *notification, void *notification_data); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* __DWC_NOTIFIER_H__ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_os.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_os.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1260 @@ ++/* ========================================================================= ++ * $File: //dwh/usb_iip/dev/software/dwc_common_port_2/dwc_os.h $ ++ * $Revision: #14 $ ++ * $Date: 2010/11/04 $ ++ * $Change: 1621695 $ ++ * ++ * Synopsys Portability Library Software and documentation ++ * (hereinafter, "Software") is an Unsupported proprietary work of ++ * Synopsys, Inc. unless otherwise expressly agreed to in writing ++ * between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product ++ * under any End User Software License Agreement or Agreement for ++ * Licensed Product with Synopsys or any supplement thereto. You are ++ * permitted to use and redistribute this Software in source and binary ++ * forms, with or without modification, provided that redistributions ++ * of source code must retain this notice. You may not view, use, ++ * disclose, copy or distribute this file or any information contained ++ * herein except pursuant to this license grant from Synopsys. If you ++ * do not agree with this notice, including the disclaimer below, then ++ * you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" ++ * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS ++ * FOR A PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL ++ * SYNOPSYS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY ++ * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE ++ * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================= */ ++#ifndef _DWC_OS_H_ ++#define _DWC_OS_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/** @file ++ * ++ * DWC portability library, low level os-wrapper functions ++ * ++ */ ++ ++/* These basic types need to be defined by some OS header file or custom header ++ * file for your specific target architecture. ++ * ++ * uint8_t, int8_t, uint16_t, int16_t, uint32_t, int32_t, uint64_t, int64_t ++ * ++ * Any custom or alternate header file must be added and enabled here. ++ */ ++ ++#ifdef DWC_LINUX ++# include ++# ifdef CONFIG_DEBUG_MUTEXES ++# include ++# endif ++# include ++# include ++#endif ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++# include ++#endif ++ ++ ++/** @name Primitive Types and Values */ ++ ++/** We define a boolean type for consistency. Can be either YES or NO */ ++typedef uint8_t dwc_bool_t; ++#define YES 1 ++#define NO 0 ++ ++#ifdef DWC_LINUX ++ ++/** @name Error Codes */ ++#define DWC_E_INVALID EINVAL ++#define DWC_E_NO_MEMORY ENOMEM ++#define DWC_E_NO_DEVICE ENODEV ++#define DWC_E_NOT_SUPPORTED EOPNOTSUPP ++#define DWC_E_TIMEOUT ETIMEDOUT ++#define DWC_E_BUSY EBUSY ++#define DWC_E_AGAIN EAGAIN ++#define DWC_E_RESTART ERESTART ++#define DWC_E_ABORT ECONNABORTED ++#define DWC_E_SHUTDOWN ESHUTDOWN ++#define DWC_E_NO_DATA ENODATA ++#define DWC_E_DISCONNECT ECONNRESET ++#define DWC_E_UNKNOWN EINVAL ++#define DWC_E_NO_STREAM_RES ENOSR ++#define DWC_E_COMMUNICATION ECOMM ++#define DWC_E_OVERFLOW EOVERFLOW ++#define DWC_E_PROTOCOL EPROTO ++#define DWC_E_IN_PROGRESS EINPROGRESS ++#define DWC_E_PIPE EPIPE ++#define DWC_E_IO EIO ++#define DWC_E_NO_SPACE ENOSPC ++ ++#else ++ ++/** @name Error Codes */ ++#define DWC_E_INVALID 1001 ++#define DWC_E_NO_MEMORY 1002 ++#define DWC_E_NO_DEVICE 1003 ++#define DWC_E_NOT_SUPPORTED 1004 ++#define DWC_E_TIMEOUT 1005 ++#define DWC_E_BUSY 1006 ++#define DWC_E_AGAIN 1007 ++#define DWC_E_RESTART 1008 ++#define DWC_E_ABORT 1009 ++#define DWC_E_SHUTDOWN 1010 ++#define DWC_E_NO_DATA 1011 ++#define DWC_E_DISCONNECT 2000 ++#define DWC_E_UNKNOWN 3000 ++#define DWC_E_NO_STREAM_RES 4001 ++#define DWC_E_COMMUNICATION 4002 ++#define DWC_E_OVERFLOW 4003 ++#define DWC_E_PROTOCOL 4004 ++#define DWC_E_IN_PROGRESS 4005 ++#define DWC_E_PIPE 4006 ++#define DWC_E_IO 4007 ++#define DWC_E_NO_SPACE 4008 ++ ++#endif ++ ++ ++/** @name Tracing/Logging Functions ++ * ++ * These function provide the capability to add tracing, debugging, and error ++ * messages, as well exceptions as assertions. The WUDEV uses these ++ * extensively. These could be logged to the main console, the serial port, an ++ * internal buffer, etc. These functions could also be no-op if they are too ++ * expensive on your system. By default undefining the DEBUG macro already ++ * no-ops some of these functions. */ ++ ++/** Returns non-zero if in interrupt context. */ ++extern dwc_bool_t DWC_IN_IRQ(void); ++#define dwc_in_irq DWC_IN_IRQ ++ ++/** Returns "IRQ" if DWC_IN_IRQ is true. */ ++static inline char *dwc_irq(void) { ++ return DWC_IN_IRQ() ? "IRQ" : ""; ++} ++ ++/** Returns non-zero if in bottom-half context. */ ++extern dwc_bool_t DWC_IN_BH(void); ++#define dwc_in_bh DWC_IN_BH ++ ++/** Returns "BH" if DWC_IN_BH is true. */ ++static inline char *dwc_bh(void) { ++ return DWC_IN_BH() ? "BH" : ""; ++} ++ ++/** ++ * A vprintf() clone. Just call vprintf if you've got it. ++ */ ++extern void DWC_VPRINTF(char *format, va_list args); ++#define dwc_vprintf DWC_VPRINTF ++ ++/** ++ * A vsnprintf() clone. Just call vprintf if you've got it. ++ */ ++extern int DWC_VSNPRINTF(char *str, int size, char *format, va_list args); ++#define dwc_vsnprintf DWC_VSNPRINTF ++ ++/** ++ * printf() clone. Just call printf if you've go it. ++ */ ++extern void DWC_PRINTF(char *format, ...) ++/* This provides compiler level static checking of the parameters if you're ++ * using GCC. */ ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 1, 2))); ++#else ++ ; ++#endif ++#define dwc_printf DWC_PRINTF ++ ++/** ++ * sprintf() clone. Just call sprintf if you've got it. ++ */ ++extern int DWC_SPRINTF(char *string, char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 2, 3))); ++#else ++ ; ++#endif ++#define dwc_sprintf DWC_SPRINTF ++ ++/** ++ * snprintf() clone. Just call snprintf if you've got it. ++ */ ++extern int DWC_SNPRINTF(char *string, int size, char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 3, 4))); ++#else ++ ; ++#endif ++#define dwc_snprintf DWC_SNPRINTF ++ ++/** ++ * Prints a WARNING message. On systems that don't differentiate between ++ * warnings and regular log messages, just print it. Indicates that something ++ * may be wrong with the driver. Works like printf(). ++ * ++ * Use the DWC_WARN macro to call this function. ++ */ ++extern void __DWC_WARN(char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 1, 2))); ++#else ++ ; ++#endif ++ ++/** ++ * Prints an error message. On systems that don't differentiate between errors ++ * and regular log messages, just print it. Indicates that something went wrong ++ * with the driver. Works like printf(). ++ * ++ * Use the DWC_ERROR macro to call this function. ++ */ ++extern void __DWC_ERROR(char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 1, 2))); ++#else ++ ; ++#endif ++ ++/** ++ * Prints an exception error message and takes some user-defined action such as ++ * print out a backtrace or trigger a breakpoint. Indicates that something went ++ * abnormally wrong with the driver such as programmer error, or other ++ * exceptional condition. It should not be ignored so even on systems without ++ * printing capability, some action should be taken to notify the developer of ++ * it. Works like printf(). ++ */ ++extern void DWC_EXCEPTION(char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 1, 2))); ++#else ++ ; ++#endif ++#define dwc_exception DWC_EXCEPTION ++ ++#ifndef DWC_OTG_DEBUG_LEV ++#define DWC_OTG_DEBUG_LEV 0 ++#endif ++ ++#ifdef DEBUG ++/** ++ * Prints out a debug message. Used for logging/trace messages. ++ * ++ * Use the DWC_DEBUG macro to call this function ++ */ ++extern void __DWC_DEBUG(char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 1, 2))); ++#else ++ ; ++#endif ++#else ++#define __DWC_DEBUG printk ++#endif ++ ++/** ++ * Prints out a Debug message. ++ */ ++#define DWC_DEBUG(_format, _args...) __DWC_DEBUG("DEBUG:%s:%s: " _format "\n", \ ++ __func__, dwc_irq(), ## _args) ++#define dwc_debug DWC_DEBUG ++/** ++ * Prints out a Debug message if enabled at compile time. ++ */ ++#if DWC_OTG_DEBUG_LEV > 0 ++#define DWC_DEBUGC(_format, _args...) DWC_DEBUG(_format, ##_args ) ++#else ++#define DWC_DEBUGC(_format, _args...) ++#endif ++#define dwc_debugc DWC_DEBUGC ++/** ++ * Prints out an informative message. ++ */ ++#define DWC_INFO(_format, _args...) DWC_PRINTF("INFO:%s: " _format "\n", \ ++ dwc_irq(), ## _args) ++#define dwc_info DWC_INFO ++/** ++ * Prints out an informative message if enabled at compile time. ++ */ ++#if DWC_OTG_DEBUG_LEV > 1 ++#define DWC_INFOC(_format, _args...) DWC_INFO(_format, ##_args ) ++#else ++#define DWC_INFOC(_format, _args...) ++#endif ++#define dwc_infoc DWC_INFOC ++/** ++ * Prints out a warning message. ++ */ ++#define DWC_WARN(_format, _args...) __DWC_WARN("WARN:%s:%s:%d: " _format "\n", \ ++ dwc_irq(), __func__, __LINE__, ## _args) ++#define dwc_warn DWC_WARN ++/** ++ * Prints out an error message. ++ */ ++#define DWC_ERROR(_format, _args...) __DWC_ERROR("ERROR:%s:%s:%d: " _format "\n", \ ++ dwc_irq(), __func__, __LINE__, ## _args) ++#define dwc_error DWC_ERROR ++ ++#define DWC_PROTO_ERROR(_format, _args...) __DWC_WARN("ERROR:%s:%s:%d: " _format "\n", \ ++ dwc_irq(), __func__, __LINE__, ## _args) ++#define dwc_proto_error DWC_PROTO_ERROR ++ ++#ifdef DEBUG ++/** Prints out a exception error message if the _expr expression fails. Disabled ++ * if DEBUG is not enabled. */ ++#define DWC_ASSERT(_expr, _format, _args...) do { \ ++ if (!(_expr)) { DWC_EXCEPTION("%s:%s:%d: " _format "\n", dwc_irq(), \ ++ __FILE__, __LINE__, ## _args); } \ ++ } while (0) ++#else ++#define DWC_ASSERT(_x...) ++#endif ++#define dwc_assert DWC_ASSERT ++ ++ ++/** @name Byte Ordering ++ * The following functions are for conversions between processor's byte ordering ++ * and specific ordering you want. ++ */ ++ ++/** Converts 32 bit data in CPU byte ordering to little endian. */ ++extern uint32_t DWC_CPU_TO_LE32(uint32_t *p); ++#define dwc_cpu_to_le32 DWC_CPU_TO_LE32 ++ ++/** Converts 32 bit data in CPU byte orderint to big endian. */ ++extern uint32_t DWC_CPU_TO_BE32(uint32_t *p); ++#define dwc_cpu_to_be32 DWC_CPU_TO_BE32 ++ ++/** Converts 32 bit little endian data to CPU byte ordering. */ ++extern uint32_t DWC_LE32_TO_CPU(uint32_t *p); ++#define dwc_le32_to_cpu DWC_LE32_TO_CPU ++ ++/** Converts 32 bit big endian data to CPU byte ordering. */ ++extern uint32_t DWC_BE32_TO_CPU(uint32_t *p); ++#define dwc_be32_to_cpu DWC_BE32_TO_CPU ++ ++/** Converts 16 bit data in CPU byte ordering to little endian. */ ++extern uint16_t DWC_CPU_TO_LE16(uint16_t *p); ++#define dwc_cpu_to_le16 DWC_CPU_TO_LE16 ++ ++/** Converts 16 bit data in CPU byte orderint to big endian. */ ++extern uint16_t DWC_CPU_TO_BE16(uint16_t *p); ++#define dwc_cpu_to_be16 DWC_CPU_TO_BE16 ++ ++/** Converts 16 bit little endian data to CPU byte ordering. */ ++extern uint16_t DWC_LE16_TO_CPU(uint16_t *p); ++#define dwc_le16_to_cpu DWC_LE16_TO_CPU ++ ++/** Converts 16 bit bi endian data to CPU byte ordering. */ ++extern uint16_t DWC_BE16_TO_CPU(uint16_t *p); ++#define dwc_be16_to_cpu DWC_BE16_TO_CPU ++ ++ ++/** @name Register Read/Write ++ * ++ * The following six functions should be implemented to read/write registers of ++ * 32-bit and 64-bit sizes. All modules use this to read/write register values. ++ * The reg value is a pointer to the register calculated from the void *base ++ * variable passed into the driver when it is started. */ ++ ++#ifdef DWC_LINUX ++/* Linux doesn't need any extra parameters for register read/write, so we ++ * just throw away the IO context parameter. ++ */ ++/** Reads the content of a 32-bit register. */ ++extern uint32_t DWC_READ_REG32(uint32_t volatile *reg); ++#define dwc_read_reg32(_ctx_,_reg_) DWC_READ_REG32(_reg_) ++ ++/** Reads the content of a 64-bit register. */ ++extern uint64_t DWC_READ_REG64(uint64_t volatile *reg); ++#define dwc_read_reg64(_ctx_,_reg_) DWC_READ_REG64(_reg_) ++ ++/** Writes to a 32-bit register. */ ++extern void DWC_WRITE_REG32(uint32_t volatile *reg, uint32_t value); ++#define dwc_write_reg32(_ctx_,_reg_,_val_) DWC_WRITE_REG32(_reg_, _val_) ++ ++/** Writes to a 64-bit register. */ ++extern void DWC_WRITE_REG64(uint64_t volatile *reg, uint64_t value); ++#define dwc_write_reg64(_ctx_,_reg_,_val_) DWC_WRITE_REG64(_reg_, _val_) ++ ++/** ++ * Modify bit values in a register. Using the ++ * algorithm: (reg_contents & ~clear_mask) | set_mask. ++ */ ++extern void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask); ++#define dwc_modify_reg32(_ctx_,_reg_,_cmsk_,_smsk_) DWC_MODIFY_REG32(_reg_,_cmsk_,_smsk_) ++extern void DWC_MODIFY_REG64(uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask); ++#define dwc_modify_reg64(_ctx_,_reg_,_cmsk_,_smsk_) DWC_MODIFY_REG64(_reg_,_cmsk_,_smsk_) ++ ++#endif /* DWC_LINUX */ ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++typedef struct dwc_ioctx { ++ struct device *dev; ++ bus_space_tag_t iot; ++ bus_space_handle_t ioh; ++} dwc_ioctx_t; ++ ++/** BSD needs two extra parameters for register read/write, so we pass ++ * them in using the IO context parameter. ++ */ ++/** Reads the content of a 32-bit register. */ ++extern uint32_t DWC_READ_REG32(void *io_ctx, uint32_t volatile *reg); ++#define dwc_read_reg32 DWC_READ_REG32 ++ ++/** Reads the content of a 64-bit register. */ ++extern uint64_t DWC_READ_REG64(void *io_ctx, uint64_t volatile *reg); ++#define dwc_read_reg64 DWC_READ_REG64 ++ ++/** Writes to a 32-bit register. */ ++extern void DWC_WRITE_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t value); ++#define dwc_write_reg32 DWC_WRITE_REG32 ++ ++/** Writes to a 64-bit register. */ ++extern void DWC_WRITE_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t value); ++#define dwc_write_reg64 DWC_WRITE_REG64 ++ ++/** ++ * Modify bit values in a register. Using the ++ * algorithm: (reg_contents & ~clear_mask) | set_mask. ++ */ ++extern void DWC_MODIFY_REG32(void *io_ctx, uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask); ++#define dwc_modify_reg32 DWC_MODIFY_REG32 ++extern void DWC_MODIFY_REG64(void *io_ctx, uint64_t volatile *reg, uint64_t clear_mask, uint64_t set_mask); ++#define dwc_modify_reg64 DWC_MODIFY_REG64 ++ ++#endif /* DWC_FREEBSD || DWC_NETBSD */ ++ ++/** @cond */ ++ ++/** @name Some convenience MACROS used internally. Define DWC_DEBUG_REGS to log the ++ * register writes. */ ++ ++#ifdef DWC_LINUX ++ ++# ifdef DWC_DEBUG_REGS ++ ++#define dwc_define_read_write_reg_n(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg##_n(_container_type *container, int num) { \ ++ return DWC_READ_REG32(&container->regs->_reg[num]); \ ++} \ ++static inline void dwc_write_##_reg##_n(_container_type *container, int num, uint32_t data) { \ ++ DWC_DEBUG("WRITING %8s[%d]: %p: %08x", #_reg, num, \ ++ &(((uint32_t*)container->regs->_reg)[num]), data); \ ++ DWC_WRITE_REG32(&(((uint32_t*)container->regs->_reg)[num]), data); \ ++} ++ ++#define dwc_define_read_write_reg(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg(_container_type *container) { \ ++ return DWC_READ_REG32(&container->regs->_reg); \ ++} \ ++static inline void dwc_write_##_reg(_container_type *container, uint32_t data) { \ ++ DWC_DEBUG("WRITING %11s: %p: %08x", #_reg, &container->regs->_reg, data); \ ++ DWC_WRITE_REG32(&container->regs->_reg, data); \ ++} ++ ++# else /* DWC_DEBUG_REGS */ ++ ++#define dwc_define_read_write_reg_n(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg##_n(_container_type *container, int num) { \ ++ return DWC_READ_REG32(&container->regs->_reg[num]); \ ++} \ ++static inline void dwc_write_##_reg##_n(_container_type *container, int num, uint32_t data) { \ ++ DWC_WRITE_REG32(&(((uint32_t*)container->regs->_reg)[num]), data); \ ++} ++ ++#define dwc_define_read_write_reg(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg(_container_type *container) { \ ++ return DWC_READ_REG32(&container->regs->_reg); \ ++} \ ++static inline void dwc_write_##_reg(_container_type *container, uint32_t data) { \ ++ DWC_WRITE_REG32(&container->regs->_reg, data); \ ++} ++ ++# endif /* DWC_DEBUG_REGS */ ++ ++#endif /* DWC_LINUX */ ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++ ++# ifdef DWC_DEBUG_REGS ++ ++#define dwc_define_read_write_reg_n(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg##_n(void *io_ctx, _container_type *container, int num) { \ ++ return DWC_READ_REG32(io_ctx, &container->regs->_reg[num]); \ ++} \ ++static inline void dwc_write_##_reg##_n(void *io_ctx, _container_type *container, int num, uint32_t data) { \ ++ DWC_DEBUG("WRITING %8s[%d]: %p: %08x", #_reg, num, \ ++ &(((uint32_t*)container->regs->_reg)[num]), data); \ ++ DWC_WRITE_REG32(io_ctx, &(((uint32_t*)container->regs->_reg)[num]), data); \ ++} ++ ++#define dwc_define_read_write_reg(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg(void *io_ctx, _container_type *container) { \ ++ return DWC_READ_REG32(io_ctx, &container->regs->_reg); \ ++} \ ++static inline void dwc_write_##_reg(void *io_ctx, _container_type *container, uint32_t data) { \ ++ DWC_DEBUG("WRITING %11s: %p: %08x", #_reg, &container->regs->_reg, data); \ ++ DWC_WRITE_REG32(io_ctx, &container->regs->_reg, data); \ ++} ++ ++# else /* DWC_DEBUG_REGS */ ++ ++#define dwc_define_read_write_reg_n(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg##_n(void *io_ctx, _container_type *container, int num) { \ ++ return DWC_READ_REG32(io_ctx, &container->regs->_reg[num]); \ ++} \ ++static inline void dwc_write_##_reg##_n(void *io_ctx, _container_type *container, int num, uint32_t data) { \ ++ DWC_WRITE_REG32(io_ctx, &(((uint32_t*)container->regs->_reg)[num]), data); \ ++} ++ ++#define dwc_define_read_write_reg(_reg,_container_type) \ ++static inline uint32_t dwc_read_##_reg(void *io_ctx, _container_type *container) { \ ++ return DWC_READ_REG32(io_ctx, &container->regs->_reg); \ ++} \ ++static inline void dwc_write_##_reg(void *io_ctx, _container_type *container, uint32_t data) { \ ++ DWC_WRITE_REG32(io_ctx, &container->regs->_reg, data); \ ++} ++ ++# endif /* DWC_DEBUG_REGS */ ++ ++#endif /* DWC_FREEBSD || DWC_NETBSD */ ++ ++/** @endcond */ ++ ++ ++#ifdef DWC_CRYPTOLIB ++/** @name Crypto Functions ++ * ++ * These are the low-level cryptographic functions used by the driver. */ ++ ++/** Perform AES CBC */ ++extern int DWC_AES_CBC(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t iv[16], uint8_t *out); ++#define dwc_aes_cbc DWC_AES_CBC ++ ++/** Fill the provided buffer with random bytes. These should be cryptographic grade random numbers. */ ++extern void DWC_RANDOM_BYTES(uint8_t *buffer, uint32_t length); ++#define dwc_random_bytes DWC_RANDOM_BYTES ++ ++/** Perform the SHA-256 hash function */ ++extern int DWC_SHA256(uint8_t *message, uint32_t len, uint8_t *out); ++#define dwc_sha256 DWC_SHA256 ++ ++/** Calculated the HMAC-SHA256 */ ++extern int DWC_HMAC_SHA256(uint8_t *message, uint32_t messagelen, uint8_t *key, uint32_t keylen, uint8_t *out); ++#define dwc_hmac_sha256 DWC_HMAC_SHA256 ++ ++#endif /* DWC_CRYPTOLIB */ ++ ++ ++/** @name Memory Allocation ++ * ++ * These function provide access to memory allocation. There are only 2 DMA ++ * functions and 3 Regular memory functions that need to be implemented. None ++ * of the memory debugging routines need to be implemented. The allocation ++ * routines all ZERO the contents of the memory. ++ * ++ * Defining DWC_DEBUG_MEMORY turns on memory debugging and statistic gathering. ++ * This checks for memory leaks, keeping track of alloc/free pairs. It also ++ * keeps track of how much memory the driver is using at any given time. */ ++ ++#define DWC_PAGE_SIZE 4096 ++#define DWC_PAGE_OFFSET(addr) (((uint32_t)addr) & 0xfff) ++#define DWC_PAGE_ALIGNED(addr) ((((uint32_t)addr) & 0xfff) == 0) ++ ++#define DWC_INVALID_DMA_ADDR 0x0 ++ ++#ifdef DWC_LINUX ++/** Type for a DMA address */ ++typedef dma_addr_t dwc_dma_t; ++#endif ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++typedef bus_addr_t dwc_dma_t; ++#endif ++ ++#ifdef DWC_FREEBSD ++typedef struct dwc_dmactx { ++ struct device *dev; ++ bus_dma_tag_t dma_tag; ++ bus_dmamap_t dma_map; ++ bus_addr_t dma_paddr; ++ void *dma_vaddr; ++} dwc_dmactx_t; ++#endif ++ ++#ifdef DWC_NETBSD ++typedef struct dwc_dmactx { ++ struct device *dev; ++ bus_dma_tag_t dma_tag; ++ bus_dmamap_t dma_map; ++ bus_dma_segment_t segs[1]; ++ int nsegs; ++ bus_addr_t dma_paddr; ++ void *dma_vaddr; ++} dwc_dmactx_t; ++#endif ++ ++/* @todo these functions will be added in the future */ ++#if 0 ++/** ++ * Creates a DMA pool from which you can allocate DMA buffers. Buffers ++ * allocated from this pool will be guaranteed to meet the size, alignment, and ++ * boundary requirements specified. ++ * ++ * @param[in] size Specifies the size of the buffers that will be allocated from ++ * this pool. ++ * @param[in] align Specifies the byte alignment requirements of the buffers ++ * allocated from this pool. Must be a power of 2. ++ * @param[in] boundary Specifies the N-byte boundary that buffers allocated from ++ * this pool must not cross. ++ * ++ * @returns A pointer to an internal opaque structure which is not to be ++ * accessed outside of these library functions. Use this handle to specify ++ * which pools to allocate/free DMA buffers from and also to destroy the pool, ++ * when you are done with it. ++ */ ++extern dwc_pool_t *DWC_DMA_POOL_CREATE(uint32_t size, uint32_t align, uint32_t boundary); ++ ++/** ++ * Destroy a DMA pool. All buffers allocated from that pool must be freed first. ++ */ ++extern void DWC_DMA_POOL_DESTROY(dwc_pool_t *pool); ++ ++/** ++ * Allocate a buffer from the specified DMA pool and zeros its contents. ++ */ ++extern void *DWC_DMA_POOL_ALLOC(dwc_pool_t *pool, uint64_t *dma_addr); ++ ++/** ++ * Free a previously allocated buffer from the DMA pool. ++ */ ++extern void DWC_DMA_POOL_FREE(dwc_pool_t *pool, void *vaddr, void *daddr); ++#endif ++ ++/** Allocates a DMA capable buffer and zeroes its contents. */ ++extern void *__DWC_DMA_ALLOC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr); ++ ++/** Allocates a DMA capable buffer and zeroes its contents in atomic contest */ ++extern void *__DWC_DMA_ALLOC_ATOMIC(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr); ++ ++/** Frees a previously allocated buffer. */ ++extern void __DWC_DMA_FREE(void *dma_ctx, uint32_t size, void *virt_addr, dwc_dma_t dma_addr); ++ ++/** Allocates a block of memory and zeroes its contents. */ ++extern void *__DWC_ALLOC(void *mem_ctx, uint32_t size); ++ ++/** Allocates a block of memory and zeroes its contents, in an atomic manner ++ * which can be used inside interrupt context. The size should be sufficiently ++ * small, a few KB at most, such that failures are not likely to occur. Can just call ++ * __DWC_ALLOC if it is atomic. */ ++extern void *__DWC_ALLOC_ATOMIC(void *mem_ctx, uint32_t size); ++ ++/** Frees a previously allocated buffer. */ ++extern void __DWC_FREE(void *mem_ctx, void *addr); ++ ++#ifndef DWC_DEBUG_MEMORY ++ ++#define DWC_ALLOC(_size_) __DWC_ALLOC(NULL, _size_) ++#define DWC_ALLOC_ATOMIC(_size_) __DWC_ALLOC_ATOMIC(NULL, _size_) ++#define DWC_FREE(_addr_) __DWC_FREE(NULL, _addr_) ++ ++# ifdef DWC_LINUX ++#define DWC_DMA_ALLOC(_size_,_dma_) __DWC_DMA_ALLOC(NULL, _size_, _dma_) ++#define DWC_DMA_ALLOC_ATOMIC(_size_,_dma_) __DWC_DMA_ALLOC_ATOMIC(NULL, _size_,_dma_) ++#define DWC_DMA_FREE(_size_,_virt_,_dma_) __DWC_DMA_FREE(NULL, _size_, _virt_, _dma_) ++# endif ++ ++# if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++#define DWC_DMA_ALLOC __DWC_DMA_ALLOC ++#define DWC_DMA_FREE __DWC_DMA_FREE ++# endif ++extern void *dwc_dma_alloc_atomic_debug(uint32_t size, dwc_dma_t *dma_addr, char const *func, int line); ++ ++#else /* DWC_DEBUG_MEMORY */ ++ ++extern void *dwc_alloc_debug(void *mem_ctx, uint32_t size, char const *func, int line); ++extern void *dwc_alloc_atomic_debug(void *mem_ctx, uint32_t size, char const *func, int line); ++extern void dwc_free_debug(void *mem_ctx, void *addr, char const *func, int line); ++extern void *dwc_dma_alloc_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr, ++ char const *func, int line); ++extern void *dwc_dma_alloc_atomic_debug(void *dma_ctx, uint32_t size, dwc_dma_t *dma_addr, ++ char const *func, int line); ++extern void dwc_dma_free_debug(void *dma_ctx, uint32_t size, void *virt_addr, ++ dwc_dma_t dma_addr, char const *func, int line); ++ ++extern int dwc_memory_debug_start(void *mem_ctx); ++extern void dwc_memory_debug_stop(void); ++extern void dwc_memory_debug_report(void); ++ ++#define DWC_ALLOC(_size_) dwc_alloc_debug(NULL, _size_, __func__, __LINE__) ++#define DWC_ALLOC_ATOMIC(_size_) dwc_alloc_atomic_debug(NULL, _size_, \ ++ __func__, __LINE__) ++#define DWC_FREE(_addr_) dwc_free_debug(NULL, _addr_, __func__, __LINE__) ++ ++# ifdef DWC_LINUX ++#define DWC_DMA_ALLOC(_size_,_dma_) dwc_dma_alloc_debug(NULL, _size_, \ ++ _dma_, __func__, __LINE__) ++#define DWC_DMA_ALLOC_ATOMIC(_size_,_dma_) dwc_dma_alloc_atomic_debug(NULL, _size_, \ ++ _dma_, __func__, __LINE__) ++#define DWC_DMA_FREE(_size_,_virt_,_dma_) dwc_dma_free_debug(NULL, _size_, \ ++ _virt_, _dma_, __func__, __LINE__) ++# endif ++ ++# if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++#define DWC_DMA_ALLOC(_ctx_,_size_,_dma_) dwc_dma_alloc_debug(_ctx_, _size_, \ ++ _dma_, __func__, __LINE__) ++#define DWC_DMA_FREE(_ctx_,_size_,_virt_,_dma_) dwc_dma_free_debug(_ctx_, _size_, \ ++ _virt_, _dma_, __func__, __LINE__) ++# endif ++ ++#endif /* DWC_DEBUG_MEMORY */ ++ ++#define dwc_alloc(_ctx_,_size_) DWC_ALLOC(_size_) ++#define dwc_alloc_atomic(_ctx_,_size_) DWC_ALLOC_ATOMIC(_size_) ++#define dwc_free(_ctx_,_addr_) DWC_FREE(_addr_) ++ ++#ifdef DWC_LINUX ++/* Linux doesn't need any extra parameters for DMA buffer allocation, so we ++ * just throw away the DMA context parameter. ++ */ ++#define dwc_dma_alloc(_ctx_,_size_,_dma_) DWC_DMA_ALLOC(_size_, _dma_) ++#define dwc_dma_alloc_atomic(_ctx_,_size_,_dma_) DWC_DMA_ALLOC_ATOMIC(_size_, _dma_) ++#define dwc_dma_free(_ctx_,_size_,_virt_,_dma_) DWC_DMA_FREE(_size_, _virt_, _dma_) ++#endif ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++/** BSD needs several extra parameters for DMA buffer allocation, so we pass ++ * them in using the DMA context parameter. ++ */ ++#define dwc_dma_alloc DWC_DMA_ALLOC ++#define dwc_dma_free DWC_DMA_FREE ++#endif ++ ++ ++/** @name Memory and String Processing */ ++ ++/** memset() clone */ ++extern void *DWC_MEMSET(void *dest, uint8_t byte, uint32_t size); ++#define dwc_memset DWC_MEMSET ++ ++/** memcpy() clone */ ++extern void *DWC_MEMCPY(void *dest, void const *src, uint32_t size); ++#define dwc_memcpy DWC_MEMCPY ++ ++/** memmove() clone */ ++extern void *DWC_MEMMOVE(void *dest, void *src, uint32_t size); ++#define dwc_memmove DWC_MEMMOVE ++ ++/** memcmp() clone */ ++extern int DWC_MEMCMP(void *m1, void *m2, uint32_t size); ++#define dwc_memcmp DWC_MEMCMP ++ ++/** strcmp() clone */ ++extern int DWC_STRCMP(void *s1, void *s2); ++#define dwc_strcmp DWC_STRCMP ++ ++/** strncmp() clone */ ++extern int DWC_STRNCMP(void *s1, void *s2, uint32_t size); ++#define dwc_strncmp DWC_STRNCMP ++ ++/** strlen() clone, for NULL terminated ASCII strings */ ++extern int DWC_STRLEN(char const *str); ++#define dwc_strlen DWC_STRLEN ++ ++/** strcpy() clone, for NULL terminated ASCII strings */ ++extern char *DWC_STRCPY(char *to, const char *from); ++#define dwc_strcpy DWC_STRCPY ++ ++/** strdup() clone. If you wish to use memory allocation debugging, this ++ * implementation of strdup should use the DWC_* memory routines instead of ++ * calling a predefined strdup. Otherwise the memory allocated by this routine ++ * will not be seen by the debugging routines. */ ++extern char *DWC_STRDUP(char const *str); ++#define dwc_strdup(_ctx_,_str_) DWC_STRDUP(_str_) ++ ++/** NOT an atoi() clone. Read the description carefully. Returns an integer ++ * converted from the string str in base 10 unless the string begins with a "0x" ++ * in which case it is base 16. String must be a NULL terminated sequence of ++ * ASCII characters and may optionally begin with whitespace, a + or -, and a ++ * "0x" prefix if base 16. The remaining characters must be valid digits for ++ * the number and end with a NULL character. If any invalid characters are ++ * encountered or it returns with a negative error code and the results of the ++ * conversion are undefined. On sucess it returns 0. Overflow conditions are ++ * undefined. An example implementation using atoi() can be referenced from the ++ * Linux implementation. */ ++extern int DWC_ATOI(const char *str, int32_t *value); ++#define dwc_atoi DWC_ATOI ++ ++/** Same as above but for unsigned. */ ++extern int DWC_ATOUI(const char *str, uint32_t *value); ++#define dwc_atoui DWC_ATOUI ++ ++#ifdef DWC_UTFLIB ++/** This routine returns a UTF16LE unicode encoded string from a UTF8 string. */ ++extern int DWC_UTF8_TO_UTF16LE(uint8_t const *utf8string, uint16_t *utf16string, unsigned len); ++#define dwc_utf8_to_utf16le DWC_UTF8_TO_UTF16LE ++#endif ++ ++ ++/** @name Wait queues ++ * ++ * Wait queues provide a means of synchronizing between threads or processes. A ++ * process can block on a waitq if some condition is not true, waiting for it to ++ * become true. When the waitq is triggered all waiting process will get ++ * unblocked and the condition will be check again. Waitqs should be triggered ++ * every time a condition can potentially change.*/ ++struct dwc_waitq; ++ ++/** Type for a waitq */ ++typedef struct dwc_waitq dwc_waitq_t; ++ ++/** The type of waitq condition callback function. This is called every time ++ * condition is evaluated. */ ++typedef int (*dwc_waitq_condition_t)(void *data); ++ ++/** Allocate a waitq */ ++extern dwc_waitq_t *DWC_WAITQ_ALLOC(void); ++#define dwc_waitq_alloc(_ctx_) DWC_WAITQ_ALLOC() ++ ++/** Free a waitq */ ++extern void DWC_WAITQ_FREE(dwc_waitq_t *wq); ++#define dwc_waitq_free DWC_WAITQ_FREE ++ ++/** Check the condition and if it is false, block on the waitq. When unblocked, check the ++ * condition again. The function returns when the condition becomes true. The return value ++ * is 0 on condition true, DWC_WAITQ_ABORTED on abort or killed, or DWC_WAITQ_UNKNOWN on error. */ ++extern int32_t DWC_WAITQ_WAIT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, void *data); ++#define dwc_waitq_wait DWC_WAITQ_WAIT ++ ++/** Check the condition and if it is false, block on the waitq. When unblocked, ++ * check the condition again. The function returns when the condition become ++ * true or the timeout has passed. The return value is 0 on condition true or ++ * DWC_TIMED_OUT on timeout, or DWC_WAITQ_ABORTED, or DWC_WAITQ_UNKNOWN on ++ * error. */ ++extern int32_t DWC_WAITQ_WAIT_TIMEOUT(dwc_waitq_t *wq, dwc_waitq_condition_t cond, ++ void *data, int32_t msecs); ++#define dwc_waitq_wait_timeout DWC_WAITQ_WAIT_TIMEOUT ++ ++/** Trigger a waitq, unblocking all processes. This should be called whenever a condition ++ * has potentially changed. */ ++extern void DWC_WAITQ_TRIGGER(dwc_waitq_t *wq); ++#define dwc_waitq_trigger DWC_WAITQ_TRIGGER ++ ++/** Unblock all processes waiting on the waitq with an ABORTED result. */ ++extern void DWC_WAITQ_ABORT(dwc_waitq_t *wq); ++#define dwc_waitq_abort DWC_WAITQ_ABORT ++ ++ ++/** @name Threads ++ * ++ * A thread must be explicitly stopped. It must check DWC_THREAD_SHOULD_STOP ++ * whenever it is woken up, and then return. The DWC_THREAD_STOP function ++ * returns the value from the thread. ++ */ ++ ++struct dwc_thread; ++ ++/** Type for a thread */ ++typedef struct dwc_thread dwc_thread_t; ++ ++/** The thread function */ ++typedef int (*dwc_thread_function_t)(void *data); ++ ++/** Create a thread and start it running the thread_function. Returns a handle ++ * to the thread */ ++extern dwc_thread_t *DWC_THREAD_RUN(dwc_thread_function_t func, char *name, void *data); ++#define dwc_thread_run(_ctx_,_func_,_name_,_data_) DWC_THREAD_RUN(_func_, _name_, _data_) ++ ++/** Stops a thread. Return the value returned by the thread. Or will return ++ * DWC_ABORT if the thread never started. */ ++extern int DWC_THREAD_STOP(dwc_thread_t *thread); ++#define dwc_thread_stop DWC_THREAD_STOP ++ ++/** Signifies to the thread that it must stop. */ ++#ifdef DWC_LINUX ++/* Linux doesn't need any parameters for kthread_should_stop() */ ++extern dwc_bool_t DWC_THREAD_SHOULD_STOP(void); ++#define dwc_thread_should_stop(_thrd_) DWC_THREAD_SHOULD_STOP() ++ ++/* No thread_exit function in Linux */ ++#define dwc_thread_exit(_thrd_) ++#endif ++ ++#if defined(DWC_FREEBSD) || defined(DWC_NETBSD) ++/** BSD needs the thread pointer for kthread_suspend_check() */ ++extern dwc_bool_t DWC_THREAD_SHOULD_STOP(dwc_thread_t *thread); ++#define dwc_thread_should_stop DWC_THREAD_SHOULD_STOP ++ ++/** The thread must call this to exit. */ ++extern void DWC_THREAD_EXIT(dwc_thread_t *thread); ++#define dwc_thread_exit DWC_THREAD_EXIT ++#endif ++ ++ ++/** @name Work queues ++ * ++ * Workqs are used to queue a callback function to be called at some later time, ++ * in another thread. */ ++struct dwc_workq; ++ ++/** Type for a workq */ ++typedef struct dwc_workq dwc_workq_t; ++ ++/** The type of the callback function to be called. */ ++typedef void (*dwc_work_callback_t)(void *data); ++ ++/** Allocate a workq */ ++extern dwc_workq_t *DWC_WORKQ_ALLOC(char *name); ++#define dwc_workq_alloc(_ctx_,_name_) DWC_WORKQ_ALLOC(_name_) ++ ++/** Free a workq. All work must be completed before being freed. */ ++extern void DWC_WORKQ_FREE(dwc_workq_t *workq); ++#define dwc_workq_free DWC_WORKQ_FREE ++ ++/** Schedule a callback on the workq, passing in data. The function will be ++ * scheduled at some later time. */ ++extern void DWC_WORKQ_SCHEDULE(dwc_workq_t *workq, dwc_work_callback_t cb, ++ void *data, char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 4, 5))); ++#else ++ ; ++#endif ++#define dwc_workq_schedule DWC_WORKQ_SCHEDULE ++ ++/** Schedule a callback on the workq, that will be called until at least ++ * given number miliseconds have passed. */ ++extern void DWC_WORKQ_SCHEDULE_DELAYED(dwc_workq_t *workq, dwc_work_callback_t cb, ++ void *data, uint32_t time, char *format, ...) ++#ifdef __GNUC__ ++ __attribute__ ((format(printf, 5, 6))); ++#else ++ ; ++#endif ++#define dwc_workq_schedule_delayed DWC_WORKQ_SCHEDULE_DELAYED ++ ++/** The number of processes in the workq */ ++extern int DWC_WORKQ_PENDING(dwc_workq_t *workq); ++#define dwc_workq_pending DWC_WORKQ_PENDING ++ ++/** Blocks until all the work in the workq is complete or timed out. Returns < ++ * 0 on timeout. */ ++extern int DWC_WORKQ_WAIT_WORK_DONE(dwc_workq_t *workq, int timeout); ++#define dwc_workq_wait_work_done DWC_WORKQ_WAIT_WORK_DONE ++ ++ ++/** @name Tasklets ++ * ++ */ ++struct dwc_tasklet; ++ ++/** Type for a tasklet */ ++typedef struct dwc_tasklet dwc_tasklet_t; ++ ++/** The type of the callback function to be called */ ++typedef void (*dwc_tasklet_callback_t)(void *data); ++ ++/** Allocates a tasklet */ ++extern dwc_tasklet_t *DWC_TASK_ALLOC(char *name, dwc_tasklet_callback_t cb, void *data); ++#define dwc_task_alloc(_ctx_,_name_,_cb_,_data_) DWC_TASK_ALLOC(_name_, _cb_, _data_) ++ ++/** Frees a tasklet */ ++extern void DWC_TASK_FREE(dwc_tasklet_t *task); ++#define dwc_task_free DWC_TASK_FREE ++ ++/** Schedules a tasklet to run */ ++extern void DWC_TASK_SCHEDULE(dwc_tasklet_t *task); ++#define dwc_task_schedule DWC_TASK_SCHEDULE ++ ++ ++/** @name Timer ++ * ++ * Callbacks must be small and atomic. ++ */ ++struct dwc_timer; ++ ++/** Type for a timer */ ++typedef struct dwc_timer dwc_timer_t; ++ ++/** The type of the callback function to be called */ ++typedef void (*dwc_timer_callback_t)(void *data); ++ ++/** Allocates a timer */ ++extern dwc_timer_t *DWC_TIMER_ALLOC(char *name, dwc_timer_callback_t cb, void *data); ++#define dwc_timer_alloc(_ctx_,_name_,_cb_,_data_) DWC_TIMER_ALLOC(_name_,_cb_,_data_) ++ ++/** Frees a timer */ ++extern void DWC_TIMER_FREE(dwc_timer_t *timer); ++#define dwc_timer_free DWC_TIMER_FREE ++ ++/** Schedules the timer to run at time ms from now. And will repeat at every ++ * repeat_interval msec therafter ++ * ++ * Modifies a timer that is still awaiting execution to a new expiration time. ++ * The mod_time is added to the old time. */ ++extern void DWC_TIMER_SCHEDULE(dwc_timer_t *timer, uint32_t time); ++#define dwc_timer_schedule DWC_TIMER_SCHEDULE ++ ++/** Disables the timer from execution. */ ++extern void DWC_TIMER_CANCEL(dwc_timer_t *timer); ++#define dwc_timer_cancel DWC_TIMER_CANCEL ++ ++ ++/** @name Spinlocks ++ * ++ * These locks are used when the work between the lock/unlock is atomic and ++ * short. Interrupts are also disabled during the lock/unlock and thus they are ++ * suitable to lock between interrupt/non-interrupt context. They also lock ++ * between processes if you have multiple CPUs or Preemption. If you don't have ++ * multiple CPUS or Preemption, then the you can simply implement the ++ * DWC_SPINLOCK and DWC_SPINUNLOCK to disable and enable interrupts. Because ++ * the work between the lock/unlock is atomic, the process context will never ++ * change, and so you never have to lock between processes. */ ++ ++struct dwc_spinlock; ++ ++/** Type for a spinlock */ ++typedef struct dwc_spinlock dwc_spinlock_t; ++ ++/** Type for the 'flags' argument to spinlock funtions */ ++typedef unsigned long dwc_irqflags_t; ++ ++/** Returns an initialized lock variable. This function should allocate and ++ * initialize the OS-specific data structure used for locking. This data ++ * structure is to be used for the DWC_LOCK and DWC_UNLOCK functions and should ++ * be freed by the DWC_FREE_LOCK when it is no longer used. */ ++extern dwc_spinlock_t *DWC_SPINLOCK_ALLOC(void); ++#define dwc_spinlock_alloc(_ctx_) DWC_SPINLOCK_ALLOC() ++ ++/** Frees an initialized lock variable. */ ++extern void DWC_SPINLOCK_FREE(dwc_spinlock_t *lock); ++#define dwc_spinlock_free(_ctx_,_lock_) DWC_SPINLOCK_FREE(_lock_) ++ ++/** Disables interrupts and blocks until it acquires the lock. ++ * ++ * @param lock Pointer to the spinlock. ++ * @param flags Unsigned long for irq flags storage. ++ */ ++extern void DWC_SPINLOCK_IRQSAVE(dwc_spinlock_t *lock, dwc_irqflags_t *flags); ++#define dwc_spinlock_irqsave DWC_SPINLOCK_IRQSAVE ++ ++/** Re-enables the interrupt and releases the lock. ++ * ++ * @param lock Pointer to the spinlock. ++ * @param flags Unsigned long for irq flags storage. Must be the same as was ++ * passed into DWC_LOCK. ++ */ ++extern void DWC_SPINUNLOCK_IRQRESTORE(dwc_spinlock_t *lock, dwc_irqflags_t flags); ++#define dwc_spinunlock_irqrestore DWC_SPINUNLOCK_IRQRESTORE ++ ++/** Blocks until it acquires the lock. ++ * ++ * @param lock Pointer to the spinlock. ++ */ ++extern void DWC_SPINLOCK(dwc_spinlock_t *lock); ++#define dwc_spinlock DWC_SPINLOCK ++ ++/** Releases the lock. ++ * ++ * @param lock Pointer to the spinlock. ++ */ ++extern void DWC_SPINUNLOCK(dwc_spinlock_t *lock); ++#define dwc_spinunlock DWC_SPINUNLOCK ++ ++ ++/** @name Mutexes ++ * ++ * Unlike spinlocks Mutexes lock only between processes and the work between the ++ * lock/unlock CAN block, therefore it CANNOT be called from interrupt context. ++ */ ++ ++struct dwc_mutex; ++ ++/** Type for a mutex */ ++typedef struct dwc_mutex dwc_mutex_t; ++ ++/* For Linux Mutex Debugging make it inline because the debugging routines use ++ * the symbol to determine recursive locking. This makes it falsely think ++ * recursive locking occurs. */ ++#if defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES) ++#define DWC_MUTEX_ALLOC_LINUX_DEBUG(__mutexp) ({ \ ++ __mutexp = (dwc_mutex_t *)DWC_ALLOC(sizeof(struct mutex)); \ ++ mutex_init((struct mutex *)__mutexp); \ ++}) ++#endif ++ ++/** Allocate a mutex */ ++extern dwc_mutex_t *DWC_MUTEX_ALLOC(void); ++#define dwc_mutex_alloc(_ctx_) DWC_MUTEX_ALLOC() ++ ++/* For memory leak debugging when using Linux Mutex Debugging */ ++#if defined(DWC_LINUX) && defined(CONFIG_DEBUG_MUTEXES) ++#define DWC_MUTEX_FREE(__mutexp) do { \ ++ mutex_destroy((struct mutex *)__mutexp); \ ++ DWC_FREE(__mutexp); \ ++} while(0) ++#else ++/** Free a mutex */ ++extern void DWC_MUTEX_FREE(dwc_mutex_t *mutex); ++#define dwc_mutex_free(_ctx_,_mutex_) DWC_MUTEX_FREE(_mutex_) ++#endif ++ ++/** Lock a mutex */ ++extern void DWC_MUTEX_LOCK(dwc_mutex_t *mutex); ++#define dwc_mutex_lock DWC_MUTEX_LOCK ++ ++/** Non-blocking lock returns 1 on successful lock. */ ++extern int DWC_MUTEX_TRYLOCK(dwc_mutex_t *mutex); ++#define dwc_mutex_trylock DWC_MUTEX_TRYLOCK ++ ++/** Unlock a mutex */ ++extern void DWC_MUTEX_UNLOCK(dwc_mutex_t *mutex); ++#define dwc_mutex_unlock DWC_MUTEX_UNLOCK ++ ++ ++/** @name Time */ ++ ++/** Microsecond delay. ++ * ++ * @param usecs Microseconds to delay. ++ */ ++extern void DWC_UDELAY(uint32_t usecs); ++#define dwc_udelay DWC_UDELAY ++ ++/** Millisecond delay. ++ * ++ * @param msecs Milliseconds to delay. ++ */ ++extern void DWC_MDELAY(uint32_t msecs); ++#define dwc_mdelay DWC_MDELAY ++ ++/** Non-busy waiting. ++ * Sleeps for specified number of milliseconds. ++ * ++ * @param msecs Milliseconds to sleep. ++ */ ++extern void DWC_MSLEEP(uint32_t msecs); ++#define dwc_msleep DWC_MSLEEP ++ ++/** ++ * Returns number of milliseconds since boot. ++ */ ++extern uint32_t DWC_TIME(void); ++#define dwc_time DWC_TIME ++ ++ ++ ++ ++/* @mainpage DWC Portability and Common Library ++ * ++ * This is the documentation for the DWC Portability and Common Library. ++ * ++ * @section intro Introduction ++ * ++ * The DWC Portability library consists of wrapper calls and data structures to ++ * all low-level functions which are typically provided by the OS. The WUDEV ++ * driver uses only these functions. In order to port the WUDEV driver, only ++ * the functions in this library need to be re-implemented, with the same ++ * behavior as documented here. ++ * ++ * The Common library consists of higher level functions, which rely only on ++ * calling the functions from the DWC Portability library. These common ++ * routines are shared across modules. Some of the common libraries need to be ++ * used directly by the driver programmer when porting WUDEV. Such as the ++ * parameter and notification libraries. ++ * ++ * @section low Portability Library OS Wrapper Functions ++ * ++ * Any function starting with DWC and in all CAPS is a low-level OS-wrapper that ++ * needs to be implemented when porting, for example DWC_MUTEX_ALLOC(). All of ++ * these functions are included in the dwc_os.h file. ++ * ++ * There are many functions here covering a wide array of OS services. Please ++ * see dwc_os.h for details, and implementation notes for each function. ++ * ++ * @section common Common Library Functions ++ * ++ * Any function starting with dwc and in all lowercase is a common library ++ * routine. These functions have a portable implementation and do not need to ++ * be reimplemented when porting. The common routines can be used by any ++ * driver, and some must be used by the end user to control the drivers. For ++ * example, you must use the Parameter common library in order to set the ++ * parameters in the WUDEV module. ++ * ++ * The common libraries consist of the following: ++ * ++ * - Connection Contexts - Used internally and can be used by end-user. See dwc_cc.h ++ * - Parameters - Used internally and can be used by end-user. See dwc_params.h ++ * - Notifications - Used internally and can be used by end-user. See dwc_notifier.h ++ * - Lists - Used internally and can be used by end-user. See dwc_list.h ++ * - Memory Debugging - Used internally and can be used by end-user. See dwc_os.h ++ * - Modpow - Used internally only. See dwc_modpow.h ++ * - DH - Used internally only. See dwc_dh.h ++ * - Crypto - Used internally only. See dwc_crypto.h ++ * ++ * ++ * @section prereq Prerequistes For dwc_os.h ++ * @subsection types Data Types ++ * ++ * The dwc_os.h file assumes that several low-level data types are pre defined for the ++ * compilation environment. These data types are: ++ * ++ * - uint8_t - unsigned 8-bit data type ++ * - int8_t - signed 8-bit data type ++ * - uint16_t - unsigned 16-bit data type ++ * - int16_t - signed 16-bit data type ++ * - uint32_t - unsigned 32-bit data type ++ * - int32_t - signed 32-bit data type ++ * - uint64_t - unsigned 64-bit data type ++ * - int64_t - signed 64-bit data type ++ * ++ * Ensure that these are defined before using dwc_os.h. The easiest way to do ++ * that is to modify the top of the file to include the appropriate header. ++ * This is already done for the Linux environment. If the DWC_LINUX macro is ++ * defined, the correct header will be added. A standard header is ++ * also used for environments where standard C headers are available. ++ * ++ * @subsection stdarg Variable Arguments ++ * ++ * Variable arguments are provided by a standard C header . it is ++ * available in Both the Linux and ANSI C enviornment. An equivalent must be ++ * provided in your enviornment in order to use dwc_os.h with the debug and ++ * tracing message functionality. ++ * ++ * @subsection thread Threading ++ * ++ * WUDEV Core must be run on an operating system that provides for multiple ++ * threads/processes. Threading can be implemented in many ways, even in ++ * embedded systems without an operating system. At the bare minimum, the ++ * system should be able to start any number of processes at any time to handle ++ * special work. It need not be a pre-emptive system. Process context can ++ * change upon a call to a blocking function. The hardware interrupt context ++ * that calls the module's ISR() function must be differentiable from process ++ * context, even if your processes are impemented via a hardware interrupt. ++ * Further locking mechanism between process must exist (or be implemented), and ++ * process context must have a way to disable interrupts for a period of time to ++ * lock them out. If all of this exists, the functions in dwc_os.h related to ++ * threading should be able to be implemented with the defined behavior. ++ * ++ */ ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _DWC_OS_H_ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/usb.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/usb.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,946 @@ ++/* ++ * Copyright (c) 1998 The NetBSD Foundation, Inc. ++ * All rights reserved. ++ * ++ * This code is derived from software contributed to The NetBSD Foundation ++ * by Lennart Augustsson (lennart@augustsson.net) at ++ * Carlstedt Research & Technology. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. All advertising materials mentioning features or use of this software ++ * must display the following acknowledgement: ++ * This product includes software developed by the NetBSD ++ * Foundation, Inc. and its contributors. ++ * 4. Neither the name of The NetBSD Foundation nor the names of its ++ * contributors may be used to endorse or promote products derived ++ * from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS ++ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED ++ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS ++ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR ++ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF ++ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS ++ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN ++ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ++ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE ++ * POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/* Modified by Synopsys, Inc, 12/12/2007 */ ++ ++ ++#ifndef _USB_H_ ++#define _USB_H_ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++/* ++ * The USB records contain some unaligned little-endian word ++ * components. The U[SG]ETW macros take care of both the alignment ++ * and endian problem and should always be used to access non-byte ++ * values. ++ */ ++typedef u_int8_t uByte; ++typedef u_int8_t uWord[2]; ++typedef u_int8_t uDWord[4]; ++ ++#define USETW2(w,h,l) ((w)[0] = (u_int8_t)(l), (w)[1] = (u_int8_t)(h)) ++#define UCONSTW(x) { (x) & 0xff, ((x) >> 8) & 0xff } ++#define UCONSTDW(x) { (x) & 0xff, ((x) >> 8) & 0xff, \ ++ ((x) >> 16) & 0xff, ((x) >> 24) & 0xff } ++ ++#if 1 ++#define UGETW(w) ((w)[0] | ((w)[1] << 8)) ++#define USETW(w,v) ((w)[0] = (u_int8_t)(v), (w)[1] = (u_int8_t)((v) >> 8)) ++#define UGETDW(w) ((w)[0] | ((w)[1] << 8) | ((w)[2] << 16) | ((w)[3] << 24)) ++#define USETDW(w,v) ((w)[0] = (u_int8_t)(v), \ ++ (w)[1] = (u_int8_t)((v) >> 8), \ ++ (w)[2] = (u_int8_t)((v) >> 16), \ ++ (w)[3] = (u_int8_t)((v) >> 24)) ++#else ++/* ++ * On little-endian machines that can handle unanliged accesses ++ * (e.g. i386) these macros can be replaced by the following. ++ */ ++#define UGETW(w) (*(u_int16_t *)(w)) ++#define USETW(w,v) (*(u_int16_t *)(w) = (v)) ++#define UGETDW(w) (*(u_int32_t *)(w)) ++#define USETDW(w,v) (*(u_int32_t *)(w) = (v)) ++#endif ++ ++/* ++ * Macros for accessing UAS IU fields, which are big-endian ++ */ ++#define IUSETW2(w,h,l) ((w)[0] = (u_int8_t)(h), (w)[1] = (u_int8_t)(l)) ++#define IUCONSTW(x) { ((x) >> 8) & 0xff, (x) & 0xff } ++#define IUCONSTDW(x) { ((x) >> 24) & 0xff, ((x) >> 16) & 0xff, \ ++ ((x) >> 8) & 0xff, (x) & 0xff } ++#define IUGETW(w) (((w)[0] << 8) | (w)[1]) ++#define IUSETW(w,v) ((w)[0] = (u_int8_t)((v) >> 8), (w)[1] = (u_int8_t)(v)) ++#define IUGETDW(w) (((w)[0] << 24) | ((w)[1] << 16) | ((w)[2] << 8) | (w)[3]) ++#define IUSETDW(w,v) ((w)[0] = (u_int8_t)((v) >> 24), \ ++ (w)[1] = (u_int8_t)((v) >> 16), \ ++ (w)[2] = (u_int8_t)((v) >> 8), \ ++ (w)[3] = (u_int8_t)(v)) ++ ++#define UPACKED __attribute__((__packed__)) ++ ++typedef struct { ++ uByte bmRequestType; ++ uByte bRequest; ++ uWord wValue; ++ uWord wIndex; ++ uWord wLength; ++} UPACKED usb_device_request_t; ++ ++#define UT_GET_DIR(a) ((a) & 0x80) ++#define UT_WRITE 0x00 ++#define UT_READ 0x80 ++ ++#define UT_GET_TYPE(a) ((a) & 0x60) ++#define UT_STANDARD 0x00 ++#define UT_CLASS 0x20 ++#define UT_VENDOR 0x40 ++ ++#define UT_GET_RECIPIENT(a) ((a) & 0x1f) ++#define UT_DEVICE 0x00 ++#define UT_INTERFACE 0x01 ++#define UT_ENDPOINT 0x02 ++#define UT_OTHER 0x03 ++ ++#define UT_READ_DEVICE (UT_READ | UT_STANDARD | UT_DEVICE) ++#define UT_READ_INTERFACE (UT_READ | UT_STANDARD | UT_INTERFACE) ++#define UT_READ_ENDPOINT (UT_READ | UT_STANDARD | UT_ENDPOINT) ++#define UT_WRITE_DEVICE (UT_WRITE | UT_STANDARD | UT_DEVICE) ++#define UT_WRITE_INTERFACE (UT_WRITE | UT_STANDARD | UT_INTERFACE) ++#define UT_WRITE_ENDPOINT (UT_WRITE | UT_STANDARD | UT_ENDPOINT) ++#define UT_READ_CLASS_DEVICE (UT_READ | UT_CLASS | UT_DEVICE) ++#define UT_READ_CLASS_INTERFACE (UT_READ | UT_CLASS | UT_INTERFACE) ++#define UT_READ_CLASS_OTHER (UT_READ | UT_CLASS | UT_OTHER) ++#define UT_READ_CLASS_ENDPOINT (UT_READ | UT_CLASS | UT_ENDPOINT) ++#define UT_WRITE_CLASS_DEVICE (UT_WRITE | UT_CLASS | UT_DEVICE) ++#define UT_WRITE_CLASS_INTERFACE (UT_WRITE | UT_CLASS | UT_INTERFACE) ++#define UT_WRITE_CLASS_OTHER (UT_WRITE | UT_CLASS | UT_OTHER) ++#define UT_WRITE_CLASS_ENDPOINT (UT_WRITE | UT_CLASS | UT_ENDPOINT) ++#define UT_READ_VENDOR_DEVICE (UT_READ | UT_VENDOR | UT_DEVICE) ++#define UT_READ_VENDOR_INTERFACE (UT_READ | UT_VENDOR | UT_INTERFACE) ++#define UT_READ_VENDOR_OTHER (UT_READ | UT_VENDOR | UT_OTHER) ++#define UT_READ_VENDOR_ENDPOINT (UT_READ | UT_VENDOR | UT_ENDPOINT) ++#define UT_WRITE_VENDOR_DEVICE (UT_WRITE | UT_VENDOR | UT_DEVICE) ++#define UT_WRITE_VENDOR_INTERFACE (UT_WRITE | UT_VENDOR | UT_INTERFACE) ++#define UT_WRITE_VENDOR_OTHER (UT_WRITE | UT_VENDOR | UT_OTHER) ++#define UT_WRITE_VENDOR_ENDPOINT (UT_WRITE | UT_VENDOR | UT_ENDPOINT) ++ ++/* Requests */ ++#define UR_GET_STATUS 0x00 ++#define USTAT_STANDARD_STATUS 0x00 ++#define WUSTAT_WUSB_FEATURE 0x01 ++#define WUSTAT_CHANNEL_INFO 0x02 ++#define WUSTAT_RECEIVED_DATA 0x03 ++#define WUSTAT_MAS_AVAILABILITY 0x04 ++#define WUSTAT_CURRENT_TRANSMIT_POWER 0x05 ++#define UR_CLEAR_FEATURE 0x01 ++#define UR_SET_FEATURE 0x03 ++#define UR_SET_AND_TEST_FEATURE 0x0c ++#define UR_SET_ADDRESS 0x05 ++#define UR_GET_DESCRIPTOR 0x06 ++#define UDESC_DEVICE 0x01 ++#define UDESC_CONFIG 0x02 ++#define UDESC_STRING 0x03 ++#define UDESC_INTERFACE 0x04 ++#define UDESC_ENDPOINT 0x05 ++#define UDESC_SS_USB_COMPANION 0x30 ++#define UDESC_DEVICE_QUALIFIER 0x06 ++#define UDESC_OTHER_SPEED_CONFIGURATION 0x07 ++#define UDESC_INTERFACE_POWER 0x08 ++#define UDESC_OTG 0x09 ++#define WUDESC_SECURITY 0x0c ++#define WUDESC_KEY 0x0d ++#define WUD_GET_KEY_INDEX(_wValue_) ((_wValue_) & 0xf) ++#define WUD_GET_KEY_TYPE(_wValue_) (((_wValue_) & 0x30) >> 4) ++#define WUD_KEY_TYPE_ASSOC 0x01 ++#define WUD_KEY_TYPE_GTK 0x02 ++#define WUD_GET_KEY_ORIGIN(_wValue_) (((_wValue_) & 0x40) >> 6) ++#define WUD_KEY_ORIGIN_HOST 0x00 ++#define WUD_KEY_ORIGIN_DEVICE 0x01 ++#define WUDESC_ENCRYPTION_TYPE 0x0e ++#define WUDESC_BOS 0x0f ++#define WUDESC_DEVICE_CAPABILITY 0x10 ++#define WUDESC_WIRELESS_ENDPOINT_COMPANION 0x11 ++#define UDESC_BOS 0x0f ++#define UDESC_DEVICE_CAPABILITY 0x10 ++#define UDESC_CS_DEVICE 0x21 /* class specific */ ++#define UDESC_CS_CONFIG 0x22 ++#define UDESC_CS_STRING 0x23 ++#define UDESC_CS_INTERFACE 0x24 ++#define UDESC_CS_ENDPOINT 0x25 ++#define UDESC_HUB 0x29 ++#define UR_SET_DESCRIPTOR 0x07 ++#define UR_GET_CONFIG 0x08 ++#define UR_SET_CONFIG 0x09 ++#define UR_GET_INTERFACE 0x0a ++#define UR_SET_INTERFACE 0x0b ++#define UR_SYNCH_FRAME 0x0c ++#define WUR_SET_ENCRYPTION 0x0d ++#define WUR_GET_ENCRYPTION 0x0e ++#define WUR_SET_HANDSHAKE 0x0f ++#define WUR_GET_HANDSHAKE 0x10 ++#define WUR_SET_CONNECTION 0x11 ++#define WUR_SET_SECURITY_DATA 0x12 ++#define WUR_GET_SECURITY_DATA 0x13 ++#define WUR_SET_WUSB_DATA 0x14 ++#define WUDATA_DRPIE_INFO 0x01 ++#define WUDATA_TRANSMIT_DATA 0x02 ++#define WUDATA_TRANSMIT_PARAMS 0x03 ++#define WUDATA_RECEIVE_PARAMS 0x04 ++#define WUDATA_TRANSMIT_POWER 0x05 ++#define WUR_LOOPBACK_DATA_WRITE 0x15 ++#define WUR_LOOPBACK_DATA_READ 0x16 ++#define WUR_SET_INTERFACE_DS 0x17 ++ ++/* Feature numbers */ ++#define UF_ENDPOINT_HALT 0 ++#define UF_DEVICE_REMOTE_WAKEUP 1 ++#define UF_TEST_MODE 2 ++#define UF_DEVICE_B_HNP_ENABLE 3 ++#define UF_DEVICE_A_HNP_SUPPORT 4 ++#define UF_DEVICE_A_ALT_HNP_SUPPORT 5 ++#define WUF_WUSB 3 ++#define WUF_TX_DRPIE 0x0 ++#define WUF_DEV_XMIT_PACKET 0x1 ++#define WUF_COUNT_PACKETS 0x2 ++#define WUF_CAPTURE_PACKETS 0x3 ++#define UF_FUNCTION_SUSPEND 0 ++#define UF_U1_ENABLE 48 ++#define UF_U2_ENABLE 49 ++#define UF_LTM_ENABLE 50 ++ ++/* Class requests from the USB 2.0 hub spec, table 11-15 */ ++#define UCR_CLEAR_HUB_FEATURE (0x2000 | UR_CLEAR_FEATURE) ++#define UCR_CLEAR_PORT_FEATURE (0x2300 | UR_CLEAR_FEATURE) ++#define UCR_GET_HUB_DESCRIPTOR (0xa000 | UR_GET_DESCRIPTOR) ++#define UCR_GET_HUB_STATUS (0xa000 | UR_GET_STATUS) ++#define UCR_GET_PORT_STATUS (0xa300 | UR_GET_STATUS) ++#define UCR_SET_HUB_FEATURE (0x2000 | UR_SET_FEATURE) ++#define UCR_SET_PORT_FEATURE (0x2300 | UR_SET_FEATURE) ++#define UCR_SET_AND_TEST_PORT_FEATURE (0xa300 | UR_SET_AND_TEST_FEATURE) ++ ++#ifdef _MSC_VER ++#include ++#endif ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDescriptorSubtype; ++} UPACKED usb_descriptor_t; ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++} UPACKED usb_descriptor_header_t; ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord bcdUSB; ++#define UD_USB_2_0 0x0200 ++#define UD_IS_USB2(d) (UGETW((d)->bcdUSB) >= UD_USB_2_0) ++ uByte bDeviceClass; ++ uByte bDeviceSubClass; ++ uByte bDeviceProtocol; ++ uByte bMaxPacketSize; ++ /* The fields below are not part of the initial descriptor. */ ++ uWord idVendor; ++ uWord idProduct; ++ uWord bcdDevice; ++ uByte iManufacturer; ++ uByte iProduct; ++ uByte iSerialNumber; ++ uByte bNumConfigurations; ++} UPACKED usb_device_descriptor_t; ++#define USB_DEVICE_DESCRIPTOR_SIZE 18 ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord wTotalLength; ++ uByte bNumInterface; ++ uByte bConfigurationValue; ++ uByte iConfiguration; ++#define UC_ATT_ONE (1 << 7) /* must be set */ ++#define UC_ATT_SELFPOWER (1 << 6) /* self powered */ ++#define UC_ATT_WAKEUP (1 << 5) /* can wakeup */ ++#define UC_ATT_BATTERY (1 << 4) /* battery powered */ ++ uByte bmAttributes; ++#define UC_BUS_POWERED 0x80 ++#define UC_SELF_POWERED 0x40 ++#define UC_REMOTE_WAKEUP 0x20 ++ uByte bMaxPower; /* max current in 2 mA units */ ++#define UC_POWER_FACTOR 2 ++} UPACKED usb_config_descriptor_t; ++#define USB_CONFIG_DESCRIPTOR_SIZE 9 ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bInterfaceNumber; ++ uByte bAlternateSetting; ++ uByte bNumEndpoints; ++ uByte bInterfaceClass; ++ uByte bInterfaceSubClass; ++ uByte bInterfaceProtocol; ++ uByte iInterface; ++} UPACKED usb_interface_descriptor_t; ++#define USB_INTERFACE_DESCRIPTOR_SIZE 9 ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bEndpointAddress; ++#define UE_GET_DIR(a) ((a) & 0x80) ++#define UE_SET_DIR(a,d) ((a) | (((d)&1) << 7)) ++#define UE_DIR_IN 0x80 ++#define UE_DIR_OUT 0x00 ++#define UE_ADDR 0x0f ++#define UE_GET_ADDR(a) ((a) & UE_ADDR) ++ uByte bmAttributes; ++#define UE_XFERTYPE 0x03 ++#define UE_CONTROL 0x00 ++#define UE_ISOCHRONOUS 0x01 ++#define UE_BULK 0x02 ++#define UE_INTERRUPT 0x03 ++#define UE_GET_XFERTYPE(a) ((a) & UE_XFERTYPE) ++#define UE_ISO_TYPE 0x0c ++#define UE_ISO_ASYNC 0x04 ++#define UE_ISO_ADAPT 0x08 ++#define UE_ISO_SYNC 0x0c ++#define UE_GET_ISO_TYPE(a) ((a) & UE_ISO_TYPE) ++ uWord wMaxPacketSize; ++ uByte bInterval; ++} UPACKED usb_endpoint_descriptor_t; ++#define USB_ENDPOINT_DESCRIPTOR_SIZE 7 ++ ++typedef struct ss_endpoint_companion_descriptor { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bMaxBurst; ++#define USSE_GET_MAX_STREAMS(a) ((a) & 0x1f) ++#define USSE_SET_MAX_STREAMS(a, b) ((a) | ((b) & 0x1f)) ++#define USSE_GET_MAX_PACKET_NUM(a) ((a) & 0x03) ++#define USSE_SET_MAX_PACKET_NUM(a, b) ((a) | ((b) & 0x03)) ++ uByte bmAttributes; ++ uWord wBytesPerInterval; ++} UPACKED ss_endpoint_companion_descriptor_t; ++#define USB_SS_ENDPOINT_COMPANION_DESCRIPTOR_SIZE 6 ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord bString[127]; ++} UPACKED usb_string_descriptor_t; ++#define USB_MAX_STRING_LEN 128 ++#define USB_LANGUAGE_TABLE 0 /* # of the string language id table */ ++ ++/* Hub specific request */ ++#define UR_GET_BUS_STATE 0x02 ++#define UR_CLEAR_TT_BUFFER 0x08 ++#define UR_RESET_TT 0x09 ++#define UR_GET_TT_STATE 0x0a ++#define UR_STOP_TT 0x0b ++ ++/* Hub features */ ++#define UHF_C_HUB_LOCAL_POWER 0 ++#define UHF_C_HUB_OVER_CURRENT 1 ++#define UHF_PORT_CONNECTION 0 ++#define UHF_PORT_ENABLE 1 ++#define UHF_PORT_SUSPEND 2 ++#define UHF_PORT_OVER_CURRENT 3 ++#define UHF_PORT_RESET 4 ++#define UHF_PORT_L1 5 ++#define UHF_PORT_POWER 8 ++#define UHF_PORT_LOW_SPEED 9 ++#define UHF_PORT_HIGH_SPEED 10 ++#define UHF_C_PORT_CONNECTION 16 ++#define UHF_C_PORT_ENABLE 17 ++#define UHF_C_PORT_SUSPEND 18 ++#define UHF_C_PORT_OVER_CURRENT 19 ++#define UHF_C_PORT_RESET 20 ++#define UHF_C_PORT_L1 23 ++#define UHF_PORT_TEST 21 ++#define UHF_PORT_INDICATOR 22 ++ ++typedef struct { ++ uByte bDescLength; ++ uByte bDescriptorType; ++ uByte bNbrPorts; ++ uWord wHubCharacteristics; ++#define UHD_PWR 0x0003 ++#define UHD_PWR_GANGED 0x0000 ++#define UHD_PWR_INDIVIDUAL 0x0001 ++#define UHD_PWR_NO_SWITCH 0x0002 ++#define UHD_COMPOUND 0x0004 ++#define UHD_OC 0x0018 ++#define UHD_OC_GLOBAL 0x0000 ++#define UHD_OC_INDIVIDUAL 0x0008 ++#define UHD_OC_NONE 0x0010 ++#define UHD_TT_THINK 0x0060 ++#define UHD_TT_THINK_8 0x0000 ++#define UHD_TT_THINK_16 0x0020 ++#define UHD_TT_THINK_24 0x0040 ++#define UHD_TT_THINK_32 0x0060 ++#define UHD_PORT_IND 0x0080 ++ uByte bPwrOn2PwrGood; /* delay in 2 ms units */ ++#define UHD_PWRON_FACTOR 2 ++ uByte bHubContrCurrent; ++ uByte DeviceRemovable[32]; /* max 255 ports */ ++#define UHD_NOT_REMOV(desc, i) \ ++ (((desc)->DeviceRemovable[(i)/8] >> ((i) % 8)) & 1) ++ /* deprecated */ uByte PortPowerCtrlMask[1]; ++} UPACKED usb_hub_descriptor_t; ++#define USB_HUB_DESCRIPTOR_SIZE 9 /* includes deprecated PortPowerCtrlMask */ ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord bcdUSB; ++ uByte bDeviceClass; ++ uByte bDeviceSubClass; ++ uByte bDeviceProtocol; ++ uByte bMaxPacketSize0; ++ uByte bNumConfigurations; ++ uByte bReserved; ++} UPACKED usb_device_qualifier_t; ++#define USB_DEVICE_QUALIFIER_SIZE 10 ++ ++typedef struct { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bmAttributes; ++#define UOTG_SRP 0x01 ++#define UOTG_HNP 0x02 ++} UPACKED usb_otg_descriptor_t; ++ ++/* OTG feature selectors */ ++#define UOTG_B_HNP_ENABLE 3 ++#define UOTG_A_HNP_SUPPORT 4 ++#define UOTG_A_ALT_HNP_SUPPORT 5 ++ ++typedef struct { ++ uWord wStatus; ++/* Device status flags */ ++#define UDS_SELF_POWERED 0x0001 ++#define UDS_REMOTE_WAKEUP 0x0002 ++/* Endpoint status flags */ ++#define UES_HALT 0x0001 ++} UPACKED usb_status_t; ++ ++typedef struct { ++ uWord wHubStatus; ++#define UHS_LOCAL_POWER 0x0001 ++#define UHS_OVER_CURRENT 0x0002 ++ uWord wHubChange; ++} UPACKED usb_hub_status_t; ++ ++typedef struct { ++ uWord wPortStatus; ++#define UPS_CURRENT_CONNECT_STATUS 0x0001 ++#define UPS_PORT_ENABLED 0x0002 ++#define UPS_SUSPEND 0x0004 ++#define UPS_OVERCURRENT_INDICATOR 0x0008 ++#define UPS_RESET 0x0010 ++#define UPS_PORT_POWER 0x0100 ++#define UPS_LOW_SPEED 0x0200 ++#define UPS_HIGH_SPEED 0x0400 ++#define UPS_PORT_TEST 0x0800 ++#define UPS_PORT_INDICATOR 0x1000 ++ uWord wPortChange; ++#define UPS_C_CONNECT_STATUS 0x0001 ++#define UPS_C_PORT_ENABLED 0x0002 ++#define UPS_C_SUSPEND 0x0004 ++#define UPS_C_OVERCURRENT_INDICATOR 0x0008 ++#define UPS_C_PORT_RESET 0x0010 ++} UPACKED usb_port_status_t; ++ ++#ifdef _MSC_VER ++#include ++#endif ++ ++/* Device class codes */ ++#define UDCLASS_IN_INTERFACE 0x00 ++#define UDCLASS_COMM 0x02 ++#define UDCLASS_HUB 0x09 ++#define UDSUBCLASS_HUB 0x00 ++#define UDPROTO_FSHUB 0x00 ++#define UDPROTO_HSHUBSTT 0x01 ++#define UDPROTO_HSHUBMTT 0x02 ++#define UDCLASS_DIAGNOSTIC 0xdc ++#define UDCLASS_WIRELESS 0xe0 ++#define UDSUBCLASS_RF 0x01 ++#define UDPROTO_BLUETOOTH 0x01 ++#define UDCLASS_VENDOR 0xff ++ ++/* Interface class codes */ ++#define UICLASS_UNSPEC 0x00 ++ ++#define UICLASS_AUDIO 0x01 ++#define UISUBCLASS_AUDIOCONTROL 1 ++#define UISUBCLASS_AUDIOSTREAM 2 ++#define UISUBCLASS_MIDISTREAM 3 ++ ++#define UICLASS_CDC 0x02 /* communication */ ++#define UISUBCLASS_DIRECT_LINE_CONTROL_MODEL 1 ++#define UISUBCLASS_ABSTRACT_CONTROL_MODEL 2 ++#define UISUBCLASS_TELEPHONE_CONTROL_MODEL 3 ++#define UISUBCLASS_MULTICHANNEL_CONTROL_MODEL 4 ++#define UISUBCLASS_CAPI_CONTROLMODEL 5 ++#define UISUBCLASS_ETHERNET_NETWORKING_CONTROL_MODEL 6 ++#define UISUBCLASS_ATM_NETWORKING_CONTROL_MODEL 7 ++#define UIPROTO_CDC_AT 1 ++ ++#define UICLASS_HID 0x03 ++#define UISUBCLASS_BOOT 1 ++#define UIPROTO_BOOT_KEYBOARD 1 ++ ++#define UICLASS_PHYSICAL 0x05 ++ ++#define UICLASS_IMAGE 0x06 ++ ++#define UICLASS_PRINTER 0x07 ++#define UISUBCLASS_PRINTER 1 ++#define UIPROTO_PRINTER_UNI 1 ++#define UIPROTO_PRINTER_BI 2 ++#define UIPROTO_PRINTER_1284 3 ++ ++#define UICLASS_MASS 0x08 ++#define UISUBCLASS_RBC 1 ++#define UISUBCLASS_SFF8020I 2 ++#define UISUBCLASS_QIC157 3 ++#define UISUBCLASS_UFI 4 ++#define UISUBCLASS_SFF8070I 5 ++#define UISUBCLASS_SCSI 6 ++#define UIPROTO_MASS_CBI_I 0 ++#define UIPROTO_MASS_CBI 1 ++#define UIPROTO_MASS_BBB_OLD 2 /* Not in the spec anymore */ ++#define UIPROTO_MASS_BBB 80 /* 'P' for the Iomega Zip drive */ ++ ++#define UICLASS_HUB 0x09 ++#define UISUBCLASS_HUB 0 ++#define UIPROTO_FSHUB 0 ++#define UIPROTO_HSHUBSTT 0 /* Yes, same as previous */ ++#define UIPROTO_HSHUBMTT 1 ++ ++#define UICLASS_CDC_DATA 0x0a ++#define UISUBCLASS_DATA 0 ++#define UIPROTO_DATA_ISDNBRI 0x30 /* Physical iface */ ++#define UIPROTO_DATA_HDLC 0x31 /* HDLC */ ++#define UIPROTO_DATA_TRANSPARENT 0x32 /* Transparent */ ++#define UIPROTO_DATA_Q921M 0x50 /* Management for Q921 */ ++#define UIPROTO_DATA_Q921 0x51 /* Data for Q921 */ ++#define UIPROTO_DATA_Q921TM 0x52 /* TEI multiplexer for Q921 */ ++#define UIPROTO_DATA_V42BIS 0x90 /* Data compression */ ++#define UIPROTO_DATA_Q931 0x91 /* Euro-ISDN */ ++#define UIPROTO_DATA_V120 0x92 /* V.24 rate adaption */ ++#define UIPROTO_DATA_CAPI 0x93 /* CAPI 2.0 commands */ ++#define UIPROTO_DATA_HOST_BASED 0xfd /* Host based driver */ ++#define UIPROTO_DATA_PUF 0xfe /* see Prot. Unit Func. Desc.*/ ++#define UIPROTO_DATA_VENDOR 0xff /* Vendor specific */ ++ ++#define UICLASS_SMARTCARD 0x0b ++ ++/*#define UICLASS_FIRM_UPD 0x0c*/ ++ ++#define UICLASS_SECURITY 0x0d ++ ++#define UICLASS_DIAGNOSTIC 0xdc ++ ++#define UICLASS_WIRELESS 0xe0 ++#define UISUBCLASS_RF 0x01 ++#define UIPROTO_BLUETOOTH 0x01 ++ ++#define UICLASS_APPL_SPEC 0xfe ++#define UISUBCLASS_FIRMWARE_DOWNLOAD 1 ++#define UISUBCLASS_IRDA 2 ++#define UIPROTO_IRDA 0 ++ ++#define UICLASS_VENDOR 0xff ++ ++#define USB_HUB_MAX_DEPTH 5 ++ ++/* ++ * Minimum time a device needs to be powered down to go through ++ * a power cycle. XXX Are these time in the spec? ++ */ ++#define USB_POWER_DOWN_TIME 200 /* ms */ ++#define USB_PORT_POWER_DOWN_TIME 100 /* ms */ ++ ++#if 0 ++/* These are the values from the spec. */ ++#define USB_PORT_RESET_DELAY 10 /* ms */ ++#define USB_PORT_ROOT_RESET_DELAY 50 /* ms */ ++#define USB_PORT_RESET_RECOVERY 10 /* ms */ ++#define USB_PORT_POWERUP_DELAY 100 /* ms */ ++#define USB_SET_ADDRESS_SETTLE 2 /* ms */ ++#define USB_RESUME_DELAY (20*5) /* ms */ ++#define USB_RESUME_WAIT 10 /* ms */ ++#define USB_RESUME_RECOVERY 10 /* ms */ ++#define USB_EXTRA_POWER_UP_TIME 0 /* ms */ ++#else ++/* Allow for marginal (i.e. non-conforming) devices. */ ++#define USB_PORT_RESET_DELAY 50 /* ms */ ++#define USB_PORT_ROOT_RESET_DELAY 250 /* ms */ ++#define USB_PORT_RESET_RECOVERY 250 /* ms */ ++#define USB_PORT_POWERUP_DELAY 300 /* ms */ ++#define USB_SET_ADDRESS_SETTLE 10 /* ms */ ++#define USB_RESUME_DELAY (50*5) /* ms */ ++#define USB_RESUME_WAIT 50 /* ms */ ++#define USB_RESUME_RECOVERY 50 /* ms */ ++#define USB_EXTRA_POWER_UP_TIME 20 /* ms */ ++#endif ++ ++#define USB_MIN_POWER 100 /* mA */ ++#define USB_MAX_POWER 500 /* mA */ ++ ++#define USB_BUS_RESET_DELAY 100 /* ms XXX?*/ ++ ++#define USB_UNCONFIG_NO 0 ++#define USB_UNCONFIG_INDEX (-1) ++ ++/*** ioctl() related stuff ***/ ++ ++struct usb_ctl_request { ++ int ucr_addr; ++ usb_device_request_t ucr_request; ++ void *ucr_data; ++ int ucr_flags; ++#define USBD_SHORT_XFER_OK 0x04 /* allow short reads */ ++ int ucr_actlen; /* actual length transferred */ ++}; ++ ++struct usb_alt_interface { ++ int uai_config_index; ++ int uai_interface_index; ++ int uai_alt_no; ++}; ++ ++#define USB_CURRENT_CONFIG_INDEX (-1) ++#define USB_CURRENT_ALT_INDEX (-1) ++ ++struct usb_config_desc { ++ int ucd_config_index; ++ usb_config_descriptor_t ucd_desc; ++}; ++ ++struct usb_interface_desc { ++ int uid_config_index; ++ int uid_interface_index; ++ int uid_alt_index; ++ usb_interface_descriptor_t uid_desc; ++}; ++ ++struct usb_endpoint_desc { ++ int ued_config_index; ++ int ued_interface_index; ++ int ued_alt_index; ++ int ued_endpoint_index; ++ usb_endpoint_descriptor_t ued_desc; ++}; ++ ++struct usb_full_desc { ++ int ufd_config_index; ++ u_int ufd_size; ++ u_char *ufd_data; ++}; ++ ++struct usb_string_desc { ++ int usd_string_index; ++ int usd_language_id; ++ usb_string_descriptor_t usd_desc; ++}; ++ ++struct usb_ctl_report_desc { ++ int ucrd_size; ++ u_char ucrd_data[1024]; /* filled data size will vary */ ++}; ++ ++typedef struct { u_int32_t cookie; } usb_event_cookie_t; ++ ++#define USB_MAX_DEVNAMES 4 ++#define USB_MAX_DEVNAMELEN 16 ++struct usb_device_info { ++ u_int8_t udi_bus; ++ u_int8_t udi_addr; /* device address */ ++ usb_event_cookie_t udi_cookie; ++ char udi_product[USB_MAX_STRING_LEN]; ++ char udi_vendor[USB_MAX_STRING_LEN]; ++ char udi_release[8]; ++ u_int16_t udi_productNo; ++ u_int16_t udi_vendorNo; ++ u_int16_t udi_releaseNo; ++ u_int8_t udi_class; ++ u_int8_t udi_subclass; ++ u_int8_t udi_protocol; ++ u_int8_t udi_config; ++ u_int8_t udi_speed; ++#define USB_SPEED_UNKNOWN 0 ++#define USB_SPEED_LOW 1 ++#define USB_SPEED_FULL 2 ++#define USB_SPEED_HIGH 3 ++#define USB_SPEED_VARIABLE 4 ++#define USB_SPEED_SUPER 5 ++ int udi_power; /* power consumption in mA, 0 if selfpowered */ ++ int udi_nports; ++ char udi_devnames[USB_MAX_DEVNAMES][USB_MAX_DEVNAMELEN]; ++ u_int8_t udi_ports[16];/* hub only: addresses of devices on ports */ ++#define USB_PORT_ENABLED 0xff ++#define USB_PORT_SUSPENDED 0xfe ++#define USB_PORT_POWERED 0xfd ++#define USB_PORT_DISABLED 0xfc ++}; ++ ++struct usb_ctl_report { ++ int ucr_report; ++ u_char ucr_data[1024]; /* filled data size will vary */ ++}; ++ ++struct usb_device_stats { ++ u_long uds_requests[4]; /* indexed by transfer type UE_* */ ++}; ++ ++#define WUSB_MIN_IE 0x80 ++#define WUSB_WCTA_IE 0x80 ++#define WUSB_WCONNECTACK_IE 0x81 ++#define WUSB_WHOSTINFO_IE 0x82 ++#define WUHI_GET_CA(_bmAttributes_) ((_bmAttributes_) & 0x3) ++#define WUHI_CA_RECONN 0x00 ++#define WUHI_CA_LIMITED 0x01 ++#define WUHI_CA_ALL 0x03 ++#define WUHI_GET_MLSI(_bmAttributes_) (((_bmAttributes_) & 0x38) >> 3) ++#define WUSB_WCHCHANGEANNOUNCE_IE 0x83 ++#define WUSB_WDEV_DISCONNECT_IE 0x84 ++#define WUSB_WHOST_DISCONNECT_IE 0x85 ++#define WUSB_WRELEASE_CHANNEL_IE 0x86 ++#define WUSB_WWORK_IE 0x87 ++#define WUSB_WCHANNEL_STOP_IE 0x88 ++#define WUSB_WDEV_KEEPALIVE_IE 0x89 ++#define WUSB_WISOCH_DISCARD_IE 0x8A ++#define WUSB_WRESETDEVICE_IE 0x8B ++#define WUSB_WXMIT_PACKET_ADJUST_IE 0x8C ++#define WUSB_MAX_IE 0x8C ++ ++/* Device Notification Types */ ++ ++#define WUSB_DN_MIN 0x01 ++#define WUSB_DN_CONNECT 0x01 ++# define WUSB_DA_OLDCONN 0x00 ++# define WUSB_DA_NEWCONN 0x01 ++# define WUSB_DA_SELF_BEACON 0x02 ++# define WUSB_DA_DIR_BEACON 0x04 ++# define WUSB_DA_NO_BEACON 0x06 ++#define WUSB_DN_DISCONNECT 0x02 ++#define WUSB_DN_EPRDY 0x03 ++#define WUSB_DN_MASAVAILCHANGED 0x04 ++#define WUSB_DN_REMOTEWAKEUP 0x05 ++#define WUSB_DN_SLEEP 0x06 ++#define WUSB_DN_ALIVE 0x07 ++#define WUSB_DN_MAX 0x07 ++ ++#ifdef _MSC_VER ++#include ++#endif ++ ++/* WUSB Handshake Data. Used during the SET/GET HANDSHAKE requests */ ++typedef struct wusb_hndshk_data { ++ uByte bMessageNumber; ++ uByte bStatus; ++ uByte tTKID[3]; ++ uByte bReserved; ++ uByte CDID[16]; ++ uByte Nonce[16]; ++ uByte MIC[8]; ++} UPACKED wusb_hndshk_data_t; ++#define WUSB_HANDSHAKE_LEN_FOR_MIC 38 ++ ++/* WUSB Connection Context */ ++typedef struct wusb_conn_context { ++ uByte CHID [16]; ++ uByte CDID [16]; ++ uByte CK [16]; ++} UPACKED wusb_conn_context_t; ++ ++/* WUSB Security Descriptor */ ++typedef struct wusb_security_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord wTotalLength; ++ uByte bNumEncryptionTypes; ++} UPACKED wusb_security_desc_t; ++ ++/* WUSB Encryption Type Descriptor */ ++typedef struct wusb_encrypt_type_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ ++ uByte bEncryptionType; ++#define WUETD_UNSECURE 0 ++#define WUETD_WIRED 1 ++#define WUETD_CCM_1 2 ++#define WUETD_RSA_1 3 ++ ++ uByte bEncryptionValue; ++ uByte bAuthKeyIndex; ++} UPACKED wusb_encrypt_type_desc_t; ++ ++/* WUSB Key Descriptor */ ++typedef struct wusb_key_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte tTKID[3]; ++ uByte bReserved; ++ uByte KeyData[1]; /* variable length */ ++} UPACKED wusb_key_desc_t; ++ ++/* WUSB BOS Descriptor (Binary device Object Store) */ ++typedef struct wusb_bos_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uWord wTotalLength; ++ uByte bNumDeviceCaps; ++} UPACKED wusb_bos_desc_t; ++ ++#define USB_DEVICE_CAPABILITY_20_EXTENSION 0x02 ++typedef struct usb_dev_cap_20_ext_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDevCapabilityType; ++#define USB_20_EXT_LPM 0x02 ++ uDWord bmAttributes; ++} UPACKED usb_dev_cap_20_ext_desc_t; ++ ++#define USB_DEVICE_CAPABILITY_SS_USB 0x03 ++typedef struct usb_dev_cap_ss_usb { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDevCapabilityType; ++#define USB_DC_SS_USB_LTM_CAPABLE 0x02 ++ uByte bmAttributes; ++#define USB_DC_SS_USB_SPEED_SUPPORT_LOW 0x01 ++#define USB_DC_SS_USB_SPEED_SUPPORT_FULL 0x02 ++#define USB_DC_SS_USB_SPEED_SUPPORT_HIGH 0x04 ++#define USB_DC_SS_USB_SPEED_SUPPORT_SS 0x08 ++ uWord wSpeedsSupported; ++ uByte bFunctionalitySupport; ++ uByte bU1DevExitLat; ++ uWord wU2DevExitLat; ++} UPACKED usb_dev_cap_ss_usb_t; ++ ++#define USB_DEVICE_CAPABILITY_CONTAINER_ID 0x04 ++typedef struct usb_dev_cap_container_id { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDevCapabilityType; ++ uByte bReserved; ++ uByte containerID[16]; ++} UPACKED usb_dev_cap_container_id_t; ++ ++/* Device Capability Type Codes */ ++#define WUSB_DEVICE_CAPABILITY_WIRELESS_USB 0x01 ++ ++/* Device Capability Descriptor */ ++typedef struct wusb_dev_cap_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDevCapabilityType; ++ uByte caps[1]; /* Variable length */ ++} UPACKED wusb_dev_cap_desc_t; ++ ++/* Device Capability Descriptor */ ++typedef struct wusb_dev_cap_uwb_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bDevCapabilityType; ++ uByte bmAttributes; ++ uWord wPHYRates; /* Bitmap */ ++ uByte bmTFITXPowerInfo; ++ uByte bmFFITXPowerInfo; ++ uWord bmBandGroup; ++ uByte bReserved; ++} UPACKED wusb_dev_cap_uwb_desc_t; ++ ++/* Wireless USB Endpoint Companion Descriptor */ ++typedef struct wusb_endpoint_companion_desc { ++ uByte bLength; ++ uByte bDescriptorType; ++ uByte bMaxBurst; ++ uByte bMaxSequence; ++ uWord wMaxStreamDelay; ++ uWord wOverTheAirPacketSize; ++ uByte bOverTheAirInterval; ++ uByte bmCompAttributes; ++} UPACKED wusb_endpoint_companion_desc_t; ++ ++/* Wireless USB Numeric Association M1 Data Structure */ ++typedef struct wusb_m1_data { ++ uByte version; ++ uWord langId; ++ uByte deviceFriendlyNameLength; ++ uByte sha_256_m3[32]; ++ uByte deviceFriendlyName[256]; ++} UPACKED wusb_m1_data_t; ++ ++typedef struct wusb_m2_data { ++ uByte version; ++ uWord langId; ++ uByte hostFriendlyNameLength; ++ uByte pkh[384]; ++ uByte hostFriendlyName[256]; ++} UPACKED wusb_m2_data_t; ++ ++typedef struct wusb_m3_data { ++ uByte pkd[384]; ++ uByte nd; ++} UPACKED wusb_m3_data_t; ++ ++typedef struct wusb_m4_data { ++ uDWord _attributeTypeIdAndLength_1; ++ uWord associationTypeId; ++ ++ uDWord _attributeTypeIdAndLength_2; ++ uWord associationSubTypeId; ++ ++ uDWord _attributeTypeIdAndLength_3; ++ uDWord length; ++ ++ uDWord _attributeTypeIdAndLength_4; ++ uDWord associationStatus; ++ ++ uDWord _attributeTypeIdAndLength_5; ++ uByte chid[16]; ++ ++ uDWord _attributeTypeIdAndLength_6; ++ uByte cdid[16]; ++ ++ uDWord _attributeTypeIdAndLength_7; ++ uByte bandGroups[2]; ++} UPACKED wusb_m4_data_t; ++ ++#ifdef _MSC_VER ++#include ++#endif ++ ++#ifdef __cplusplus ++} ++#endif ++ ++#endif /* _USB_H_ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/Makefile 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,80 @@ ++# ++# Makefile for DWC_otg Highspeed USB controller driver ++# ++ ++ifneq ($(KERNELRELEASE),) ++ ++# Use the BUS_INTERFACE variable to compile the software for either ++# PCI(PCI_INTERFACE) or LM(LM_INTERFACE) bus. ++ifeq ($(BUS_INTERFACE),) ++# BUS_INTERFACE = -DPCI_INTERFACE ++# BUS_INTERFACE = -DLM_INTERFACE ++ BUS_INTERFACE = -DPLATFORM_INTERFACE ++endif ++ ++#EXTRA_CFLAGS += -DDEBUG ++#EXTRA_CFLAGS += -DDWC_OTG_DEBUGLEV=1 # reduce common debug msgs ++ ++# Use one of the following flags to compile the software in host-only or ++# device-only mode. ++#EXTRA_CFLAGS += -DDWC_HOST_ONLY ++#EXTRA_CFLAGS += -DDWC_DEVICE_ONLY ++ ++EXTRA_CFLAGS += -Dlinux -DDWC_HS_ELECT_TST ++#EXTRA_CFLAGS += -DDWC_EN_ISOC ++EXTRA_CFLAGS += -I$(obj)/../dwc_common_port ++#EXTRA_CFLAGS += -I$(PORTLIB) ++EXTRA_CFLAGS += -DDWC_LINUX ++EXTRA_CFLAGS += $(CFI) ++EXTRA_CFLAGS += $(BUS_INTERFACE) ++#EXTRA_CFLAGS += -DDWC_DEV_SRPCAP ++ ++obj-$(CONFIG_USB_DWCOTG) += dwc_otg.o ++ ++dwc_otg-objs := dwc_otg_driver.o dwc_otg_attr.o ++dwc_otg-objs += dwc_otg_cil.o dwc_otg_cil_intr.o ++dwc_otg-objs += dwc_otg_pcd_linux.o dwc_otg_pcd.o dwc_otg_pcd_intr.o ++dwc_otg-objs += dwc_otg_hcd.o dwc_otg_hcd_linux.o dwc_otg_hcd_intr.o dwc_otg_hcd_queue.o dwc_otg_hcd_ddma.o ++dwc_otg-objs += dwc_otg_adp.o ++ifneq ($(CFI),) ++dwc_otg-objs += dwc_otg_cfi.o ++endif ++ ++kernrelwd := $(subst ., ,$(KERNELRELEASE)) ++kernrel3 := $(word 1,$(kernrelwd)).$(word 2,$(kernrelwd)).$(word 3,$(kernrelwd)) ++ ++ifneq ($(kernrel3),2.6.20) ++EXTRA_CFLAGS += $(CPPFLAGS) ++endif ++ ++else ++ ++PWD := $(shell pwd) ++PORTLIB := $(PWD)/../dwc_common_port ++ ++# Command paths ++CTAGS := $(CTAGS) ++DOXYGEN := $(DOXYGEN) ++ ++default: portlib ++ $(MAKE) -C$(KDIR) M=$(PWD) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) modules ++ ++install: default ++ $(MAKE) -C$(KDIR) M=$(PORTLIB) modules_install ++ $(MAKE) -C$(KDIR) M=$(PWD) modules_install ++ ++portlib: ++ $(MAKE) -C$(KDIR) M=$(PORTLIB) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) modules ++ cp $(PORTLIB)/Module.symvers $(PWD)/ ++ ++docs: $(wildcard *.[hc]) doc/doxygen.cfg ++ $(DOXYGEN) doc/doxygen.cfg ++ ++tags: $(wildcard *.[hc]) ++ $(CTAGS) -e $(wildcard *.[hc]) $(wildcard linux/*.[hc]) $(wildcard $(KDIR)/include/linux/usb*.h) ++ ++ ++clean: ++ rm -rf *.o *.ko .*cmd *.mod.c .tmp_versions Module.symvers ++ ++endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/doc/doxygen.cfg +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/doc/doxygen.cfg 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,224 @@ ++# Doxyfile 1.3.9.1 ++ ++#--------------------------------------------------------------------------- ++# Project related configuration options ++#--------------------------------------------------------------------------- ++PROJECT_NAME = "DesignWare USB 2.0 OTG Controller (DWC_otg) Device Driver" ++PROJECT_NUMBER = v3.00a ++OUTPUT_DIRECTORY = ./doc/ ++CREATE_SUBDIRS = NO ++OUTPUT_LANGUAGE = English ++BRIEF_MEMBER_DESC = YES ++REPEAT_BRIEF = YES ++ABBREVIATE_BRIEF = "The $name class" \ ++ "The $name widget" \ ++ "The $name file" \ ++ is \ ++ provides \ ++ specifies \ ++ contains \ ++ represents \ ++ a \ ++ an \ ++ the ++ALWAYS_DETAILED_SEC = NO ++INLINE_INHERITED_MEMB = NO ++FULL_PATH_NAMES = NO ++STRIP_FROM_PATH = ++STRIP_FROM_INC_PATH = ++SHORT_NAMES = NO ++JAVADOC_AUTOBRIEF = YES ++MULTILINE_CPP_IS_BRIEF = NO ++INHERIT_DOCS = YES ++DISTRIBUTE_GROUP_DOC = NO ++TAB_SIZE = 8 ++ALIASES = ++OPTIMIZE_OUTPUT_FOR_C = YES ++OPTIMIZE_OUTPUT_JAVA = NO ++SUBGROUPING = YES ++#--------------------------------------------------------------------------- ++# Build related configuration options ++#--------------------------------------------------------------------------- ++EXTRACT_ALL = NO ++EXTRACT_PRIVATE = YES ++EXTRACT_STATIC = YES ++EXTRACT_LOCAL_CLASSES = YES ++EXTRACT_LOCAL_METHODS = NO ++HIDE_UNDOC_MEMBERS = NO ++HIDE_UNDOC_CLASSES = NO ++HIDE_FRIEND_COMPOUNDS = NO ++HIDE_IN_BODY_DOCS = NO ++INTERNAL_DOCS = NO ++CASE_SENSE_NAMES = NO ++HIDE_SCOPE_NAMES = NO ++SHOW_INCLUDE_FILES = YES ++INLINE_INFO = YES ++SORT_MEMBER_DOCS = NO ++SORT_BRIEF_DOCS = NO ++SORT_BY_SCOPE_NAME = NO ++GENERATE_TODOLIST = YES ++GENERATE_TESTLIST = YES ++GENERATE_BUGLIST = YES ++GENERATE_DEPRECATEDLIST= YES ++ENABLED_SECTIONS = ++MAX_INITIALIZER_LINES = 30 ++SHOW_USED_FILES = YES ++SHOW_DIRECTORIES = YES ++#--------------------------------------------------------------------------- ++# configuration options related to warning and progress messages ++#--------------------------------------------------------------------------- ++QUIET = YES ++WARNINGS = YES ++WARN_IF_UNDOCUMENTED = NO ++WARN_IF_DOC_ERROR = YES ++WARN_FORMAT = "$file:$line: $text" ++WARN_LOGFILE = ++#--------------------------------------------------------------------------- ++# configuration options related to the input files ++#--------------------------------------------------------------------------- ++INPUT = . ++FILE_PATTERNS = *.c \ ++ *.h \ ++ ./linux/*.c \ ++ ./linux/*.h ++RECURSIVE = NO ++EXCLUDE = ./test/ \ ++ ./dwc_otg/.AppleDouble/ ++EXCLUDE_SYMLINKS = YES ++EXCLUDE_PATTERNS = *.mod.* ++EXAMPLE_PATH = ++EXAMPLE_PATTERNS = * ++EXAMPLE_RECURSIVE = NO ++IMAGE_PATH = ++INPUT_FILTER = ++FILTER_PATTERNS = ++FILTER_SOURCE_FILES = NO ++#--------------------------------------------------------------------------- ++# configuration options related to source browsing ++#--------------------------------------------------------------------------- ++SOURCE_BROWSER = YES ++INLINE_SOURCES = NO ++STRIP_CODE_COMMENTS = YES ++REFERENCED_BY_RELATION = NO ++REFERENCES_RELATION = NO ++VERBATIM_HEADERS = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the alphabetical class index ++#--------------------------------------------------------------------------- ++ALPHABETICAL_INDEX = NO ++COLS_IN_ALPHA_INDEX = 5 ++IGNORE_PREFIX = ++#--------------------------------------------------------------------------- ++# configuration options related to the HTML output ++#--------------------------------------------------------------------------- ++GENERATE_HTML = YES ++HTML_OUTPUT = html ++HTML_FILE_EXTENSION = .html ++HTML_HEADER = ++HTML_FOOTER = ++HTML_STYLESHEET = ++HTML_ALIGN_MEMBERS = YES ++GENERATE_HTMLHELP = NO ++CHM_FILE = ++HHC_LOCATION = ++GENERATE_CHI = NO ++BINARY_TOC = NO ++TOC_EXPAND = NO ++DISABLE_INDEX = NO ++ENUM_VALUES_PER_LINE = 4 ++GENERATE_TREEVIEW = YES ++TREEVIEW_WIDTH = 250 ++#--------------------------------------------------------------------------- ++# configuration options related to the LaTeX output ++#--------------------------------------------------------------------------- ++GENERATE_LATEX = NO ++LATEX_OUTPUT = latex ++LATEX_CMD_NAME = latex ++MAKEINDEX_CMD_NAME = makeindex ++COMPACT_LATEX = NO ++PAPER_TYPE = a4wide ++EXTRA_PACKAGES = ++LATEX_HEADER = ++PDF_HYPERLINKS = NO ++USE_PDFLATEX = NO ++LATEX_BATCHMODE = NO ++LATEX_HIDE_INDICES = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the RTF output ++#--------------------------------------------------------------------------- ++GENERATE_RTF = NO ++RTF_OUTPUT = rtf ++COMPACT_RTF = NO ++RTF_HYPERLINKS = NO ++RTF_STYLESHEET_FILE = ++RTF_EXTENSIONS_FILE = ++#--------------------------------------------------------------------------- ++# configuration options related to the man page output ++#--------------------------------------------------------------------------- ++GENERATE_MAN = NO ++MAN_OUTPUT = man ++MAN_EXTENSION = .3 ++MAN_LINKS = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the XML output ++#--------------------------------------------------------------------------- ++GENERATE_XML = NO ++XML_OUTPUT = xml ++XML_SCHEMA = ++XML_DTD = ++XML_PROGRAMLISTING = YES ++#--------------------------------------------------------------------------- ++# configuration options for the AutoGen Definitions output ++#--------------------------------------------------------------------------- ++GENERATE_AUTOGEN_DEF = NO ++#--------------------------------------------------------------------------- ++# configuration options related to the Perl module output ++#--------------------------------------------------------------------------- ++GENERATE_PERLMOD = NO ++PERLMOD_LATEX = NO ++PERLMOD_PRETTY = YES ++PERLMOD_MAKEVAR_PREFIX = ++#--------------------------------------------------------------------------- ++# Configuration options related to the preprocessor ++#--------------------------------------------------------------------------- ++ENABLE_PREPROCESSING = YES ++MACRO_EXPANSION = YES ++EXPAND_ONLY_PREDEF = YES ++SEARCH_INCLUDES = YES ++INCLUDE_PATH = ++INCLUDE_FILE_PATTERNS = ++PREDEFINED = DEVICE_ATTR DWC_EN_ISOC ++EXPAND_AS_DEFINED = DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW DWC_OTG_DEVICE_ATTR_BITFIELD_STORE DWC_OTG_DEVICE_ATTR_BITFIELD_RW DWC_OTG_DEVICE_ATTR_BITFIELD_RO DWC_OTG_DEVICE_ATTR_REG_SHOW DWC_OTG_DEVICE_ATTR_REG_STORE DWC_OTG_DEVICE_ATTR_REG32_RW DWC_OTG_DEVICE_ATTR_REG32_RO DWC_EN_ISOC ++SKIP_FUNCTION_MACROS = NO ++#--------------------------------------------------------------------------- ++# Configuration::additions related to external references ++#--------------------------------------------------------------------------- ++TAGFILES = ++GENERATE_TAGFILE = ++ALLEXTERNALS = NO ++EXTERNAL_GROUPS = YES ++PERL_PATH = /usr/bin/perl ++#--------------------------------------------------------------------------- ++# Configuration options related to the dot tool ++#--------------------------------------------------------------------------- ++CLASS_DIAGRAMS = YES ++HIDE_UNDOC_RELATIONS = YES ++HAVE_DOT = NO ++CLASS_GRAPH = YES ++COLLABORATION_GRAPH = YES ++UML_LOOK = NO ++TEMPLATE_RELATIONS = NO ++INCLUDE_GRAPH = YES ++INCLUDED_BY_GRAPH = YES ++CALL_GRAPH = NO ++GRAPHICAL_HIERARCHY = YES ++DOT_IMAGE_FORMAT = png ++DOT_PATH = ++DOTFILE_DIRS = ++MAX_DOT_GRAPH_DEPTH = 1000 ++GENERATE_LEGEND = YES ++DOT_CLEANUP = YES ++#--------------------------------------------------------------------------- ++# Configuration::additions related to the search engine ++#--------------------------------------------------------------------------- ++SEARCHENGINE = NO +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dummy_audio.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dummy_audio.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1575 @@ ++/* ++ * zero.c -- Gadget Zero, for USB development ++ * ++ * Copyright (C) 2003-2004 David Brownell ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") as published by the Free Software ++ * Foundation, either version 2 of that License or (at your option) any ++ * later version. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++ ++/* ++ * Gadget Zero only needs two bulk endpoints, and is an example of how you ++ * can write a hardware-agnostic gadget driver running inside a USB device. ++ * ++ * Hardware details are visible (see CONFIG_USB_ZERO_* below) but don't ++ * affect most of the driver. ++ * ++ * Use it with the Linux host/master side "usbtest" driver to get a basic ++ * functional test of your device-side usb stack, or with "usb-skeleton". ++ * ++ * It supports two similar configurations. One sinks whatever the usb host ++ * writes, and in return sources zeroes. The other loops whatever the host ++ * writes back, so the host can read it. Module options include: ++ * ++ * buflen=N default N=4096, buffer size used ++ * qlen=N default N=32, how many buffers in the loopback queue ++ * loopdefault default false, list loopback config first ++ * ++ * Many drivers will only have one configuration, letting them be much ++ * simpler if they also don't support high speed operation (like this ++ * driver does). ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) ++# include ++#else ++# include ++#endif ++ ++#include ++ ++ ++/*-------------------------------------------------------------------------*/ ++/*-------------------------------------------------------------------------*/ ++ ++ ++static int utf8_to_utf16le(const char *s, u16 *cp, unsigned len) ++{ ++ int count = 0; ++ u8 c; ++ u16 uchar; ++ ++ /* this insists on correct encodings, though not minimal ones. ++ * BUT it currently rejects legit 4-byte UTF-8 code points, ++ * which need surrogate pairs. (Unicode 3.1 can use them.) ++ */ ++ while (len != 0 && (c = (u8) *s++) != 0) { ++ if (unlikely(c & 0x80)) { ++ // 2-byte sequence: ++ // 00000yyyyyxxxxxx = 110yyyyy 10xxxxxx ++ if ((c & 0xe0) == 0xc0) { ++ uchar = (c & 0x1f) << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ // 3-byte sequence (most CJKV characters): ++ // zzzzyyyyyyxxxxxx = 1110zzzz 10yyyyyy 10xxxxxx ++ } else if ((c & 0xf0) == 0xe0) { ++ uchar = (c & 0x0f) << 12; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c << 6; ++ ++ c = (u8) *s++; ++ if ((c & 0xc0) != 0xc0) ++ goto fail; ++ c &= 0x3f; ++ uchar |= c; ++ ++ /* no bogus surrogates */ ++ if (0xd800 <= uchar && uchar <= 0xdfff) ++ goto fail; ++ ++ // 4-byte sequence (surrogate pairs, currently rare): ++ // 11101110wwwwzzzzyy + 110111yyyyxxxxxx ++ // = 11110uuu 10uuzzzz 10yyyyyy 10xxxxxx ++ // (uuuuu = wwww + 1) ++ // FIXME accept the surrogate code points (only) ++ ++ } else ++ goto fail; ++ } else ++ uchar = c; ++ put_unaligned (cpu_to_le16 (uchar), cp++); ++ count++; ++ len--; ++ } ++ return count; ++fail: ++ return -1; ++} ++ ++ ++/** ++ * usb_gadget_get_string - fill out a string descriptor ++ * @table: of c strings encoded using UTF-8 ++ * @id: string id, from low byte of wValue in get string descriptor ++ * @buf: at least 256 bytes ++ * ++ * Finds the UTF-8 string matching the ID, and converts it into a ++ * string descriptor in utf16-le. ++ * Returns length of descriptor (always even) or negative errno ++ * ++ * If your driver needs stings in multiple languages, you'll probably ++ * "switch (wIndex) { ... }" in your ep0 string descriptor logic, ++ * using this routine after choosing which set of UTF-8 strings to use. ++ * Note that US-ASCII is a strict subset of UTF-8; any string bytes with ++ * the eighth bit set will be multibyte UTF-8 characters, not ISO-8859/1 ++ * characters (which are also widely used in C strings). ++ */ ++int ++usb_gadget_get_string (struct usb_gadget_strings *table, int id, u8 *buf) ++{ ++ struct usb_string *s; ++ int len; ++ ++ /* descriptor 0 has the language id */ ++ if (id == 0) { ++ buf [0] = 4; ++ buf [1] = USB_DT_STRING; ++ buf [2] = (u8) table->language; ++ buf [3] = (u8) (table->language >> 8); ++ return 4; ++ } ++ for (s = table->strings; s && s->s; s++) ++ if (s->id == id) ++ break; ++ ++ /* unrecognized: stall. */ ++ if (!s || !s->s) ++ return -EINVAL; ++ ++ /* string descriptors have length, tag, then UTF16-LE text */ ++ len = min ((size_t) 126, strlen (s->s)); ++ memset (buf + 2, 0, 2 * len); /* zero all the bytes */ ++ len = utf8_to_utf16le(s->s, (u16 *)&buf[2], len); ++ if (len < 0) ++ return -EINVAL; ++ buf [0] = (len + 1) * 2; ++ buf [1] = USB_DT_STRING; ++ return buf [0]; ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++/*-------------------------------------------------------------------------*/ ++ ++ ++/** ++ * usb_descriptor_fillbuf - fill buffer with descriptors ++ * @buf: Buffer to be filled ++ * @buflen: Size of buf ++ * @src: Array of descriptor pointers, terminated by null pointer. ++ * ++ * Copies descriptors into the buffer, returning the length or a ++ * negative error code if they can't all be copied. Useful when ++ * assembling descriptors for an associated set of interfaces used ++ * as part of configuring a composite device; or in other cases where ++ * sets of descriptors need to be marshaled. ++ */ ++int ++usb_descriptor_fillbuf(void *buf, unsigned buflen, ++ const struct usb_descriptor_header **src) ++{ ++ u8 *dest = buf; ++ ++ if (!src) ++ return -EINVAL; ++ ++ /* fill buffer from src[] until null descriptor ptr */ ++ for (; 0 != *src; src++) { ++ unsigned len = (*src)->bLength; ++ ++ if (len > buflen) ++ return -EINVAL; ++ memcpy(dest, *src, len); ++ buflen -= len; ++ dest += len; ++ } ++ return dest - (u8 *)buf; ++} ++ ++ ++/** ++ * usb_gadget_config_buf - builts a complete configuration descriptor ++ * @config: Header for the descriptor, including characteristics such ++ * as power requirements and number of interfaces. ++ * @desc: Null-terminated vector of pointers to the descriptors (interface, ++ * endpoint, etc) defining all functions in this device configuration. ++ * @buf: Buffer for the resulting configuration descriptor. ++ * @length: Length of buffer. If this is not big enough to hold the ++ * entire configuration descriptor, an error code will be returned. ++ * ++ * This copies descriptors into the response buffer, building a descriptor ++ * for that configuration. It returns the buffer length or a negative ++ * status code. The config.wTotalLength field is set to match the length ++ * of the result, but other descriptor fields (including power usage and ++ * interface count) must be set by the caller. ++ * ++ * Gadget drivers could use this when constructing a config descriptor ++ * in response to USB_REQ_GET_DESCRIPTOR. They will need to patch the ++ * resulting bDescriptorType value if USB_DT_OTHER_SPEED_CONFIG is needed. ++ */ ++int usb_gadget_config_buf( ++ const struct usb_config_descriptor *config, ++ void *buf, ++ unsigned length, ++ const struct usb_descriptor_header **desc ++) ++{ ++ struct usb_config_descriptor *cp = buf; ++ int len; ++ ++ /* config descriptor first */ ++ if (length < USB_DT_CONFIG_SIZE || !desc) ++ return -EINVAL; ++ *cp = *config; ++ ++ /* then interface/endpoint/class/vendor/... */ ++ len = usb_descriptor_fillbuf(USB_DT_CONFIG_SIZE + (u8*)buf, ++ length - USB_DT_CONFIG_SIZE, desc); ++ if (len < 0) ++ return len; ++ len += USB_DT_CONFIG_SIZE; ++ if (len > 0xffff) ++ return -EINVAL; ++ ++ /* patch up the config descriptor */ ++ cp->bLength = USB_DT_CONFIG_SIZE; ++ cp->bDescriptorType = USB_DT_CONFIG; ++ cp->wTotalLength = cpu_to_le16(len); ++ cp->bmAttributes |= USB_CONFIG_ATT_ONE; ++ return len; ++} ++ ++/*-------------------------------------------------------------------------*/ ++/*-------------------------------------------------------------------------*/ ++ ++ ++#define RBUF_LEN (1024*1024) ++static int rbuf_start; ++static int rbuf_len; ++static __u8 rbuf[RBUF_LEN]; ++ ++/*-------------------------------------------------------------------------*/ ++ ++#define DRIVER_VERSION "St Patrick's Day 2004" ++ ++static const char shortname [] = "zero"; ++static const char longname [] = "YAMAHA YST-MS35D USB Speaker "; ++ ++static const char source_sink [] = "source and sink data"; ++static const char loopback [] = "loop input to output"; ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * driver assumes self-powered hardware, and ++ * has no way for users to trigger remote wakeup. ++ * ++ * this version autoconfigures as much as possible, ++ * which is reasonable for most "bulk-only" drivers. ++ */ ++static const char *EP_IN_NAME; /* source */ ++static const char *EP_OUT_NAME; /* sink */ ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* big enough to hold our biggest descriptor */ ++#define USB_BUFSIZ 512 ++ ++struct zero_dev { ++ spinlock_t lock; ++ struct usb_gadget *gadget; ++ struct usb_request *req; /* for control responses */ ++ ++ /* when configured, we have one of two configs: ++ * - source data (in to host) and sink it (out from host) ++ * - or loop it back (out from host back in to host) ++ */ ++ u8 config; ++ struct usb_ep *in_ep, *out_ep; ++ ++ /* autoresume timer */ ++ struct timer_list resume; ++}; ++ ++#define xprintk(d,level,fmt,args...) \ ++ dev_printk(level , &(d)->gadget->dev , fmt , ## args) ++ ++#ifdef DEBUG ++#define DBG(dev,fmt,args...) \ ++ xprintk(dev , KERN_DEBUG , fmt , ## args) ++#else ++#define DBG(dev,fmt,args...) \ ++ do { } while (0) ++#endif /* DEBUG */ ++ ++#ifdef VERBOSE ++#define VDBG DBG ++#else ++#define VDBG(dev,fmt,args...) \ ++ do { } while (0) ++#endif /* VERBOSE */ ++ ++#define ERROR(dev,fmt,args...) \ ++ xprintk(dev , KERN_ERR , fmt , ## args) ++#define WARN(dev,fmt,args...) \ ++ xprintk(dev , KERN_WARNING , fmt , ## args) ++#define INFO(dev,fmt,args...) \ ++ xprintk(dev , KERN_INFO , fmt , ## args) ++ ++/*-------------------------------------------------------------------------*/ ++ ++static unsigned buflen = 4096; ++static unsigned qlen = 32; ++static unsigned pattern = 0; ++ ++module_param (buflen, uint, S_IRUGO|S_IWUSR); ++module_param (qlen, uint, S_IRUGO|S_IWUSR); ++module_param (pattern, uint, S_IRUGO|S_IWUSR); ++ ++/* ++ * if it's nonzero, autoresume says how many seconds to wait ++ * before trying to wake up the host after suspend. ++ */ ++static unsigned autoresume = 0; ++module_param (autoresume, uint, 0); ++ ++/* ++ * Normally the "loopback" configuration is second (index 1) so ++ * it's not the default. Here's where to change that order, to ++ * work better with hosts where config changes are problematic. ++ * Or controllers (like superh) that only support one config. ++ */ ++static int loopdefault = 0; ++ ++module_param (loopdefault, bool, S_IRUGO|S_IWUSR); ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* Thanks to NetChip Technologies for donating this product ID. ++ * ++ * DO NOT REUSE THESE IDs with a protocol-incompatible driver!! Ever!! ++ * Instead: allocate your own, using normal USB-IF procedures. ++ */ ++#ifndef CONFIG_USB_ZERO_HNPTEST ++#define DRIVER_VENDOR_NUM 0x0525 /* NetChip */ ++#define DRIVER_PRODUCT_NUM 0xa4a0 /* Linux-USB "Gadget Zero" */ ++#else ++#define DRIVER_VENDOR_NUM 0x1a0a /* OTG test device IDs */ ++#define DRIVER_PRODUCT_NUM 0xbadd ++#endif ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* ++ * DESCRIPTORS ... most are static, but strings and (full) ++ * configuration descriptors are built on demand. ++ */ ++ ++/* ++#define STRING_MANUFACTURER 25 ++#define STRING_PRODUCT 42 ++#define STRING_SERIAL 101 ++*/ ++#define STRING_MANUFACTURER 1 ++#define STRING_PRODUCT 2 ++#define STRING_SERIAL 3 ++ ++#define STRING_SOURCE_SINK 250 ++#define STRING_LOOPBACK 251 ++ ++/* ++ * This device advertises two configurations; these numbers work ++ * on a pxa250 as well as more flexible hardware. ++ */ ++#define CONFIG_SOURCE_SINK 3 ++#define CONFIG_LOOPBACK 2 ++ ++/* ++static struct usb_device_descriptor ++device_desc = { ++ .bLength = sizeof device_desc, ++ .bDescriptorType = USB_DT_DEVICE, ++ ++ .bcdUSB = __constant_cpu_to_le16 (0x0200), ++ .bDeviceClass = USB_CLASS_VENDOR_SPEC, ++ ++ .idVendor = __constant_cpu_to_le16 (DRIVER_VENDOR_NUM), ++ .idProduct = __constant_cpu_to_le16 (DRIVER_PRODUCT_NUM), ++ .iManufacturer = STRING_MANUFACTURER, ++ .iProduct = STRING_PRODUCT, ++ .iSerialNumber = STRING_SERIAL, ++ .bNumConfigurations = 2, ++}; ++*/ ++static struct usb_device_descriptor ++device_desc = { ++ .bLength = sizeof device_desc, ++ .bDescriptorType = USB_DT_DEVICE, ++ .bcdUSB = __constant_cpu_to_le16 (0x0100), ++ .bDeviceClass = USB_CLASS_PER_INTERFACE, ++ .bDeviceSubClass = 0, ++ .bDeviceProtocol = 0, ++ .bMaxPacketSize0 = 64, ++ .bcdDevice = __constant_cpu_to_le16 (0x0100), ++ .idVendor = __constant_cpu_to_le16 (0x0499), ++ .idProduct = __constant_cpu_to_le16 (0x3002), ++ .iManufacturer = STRING_MANUFACTURER, ++ .iProduct = STRING_PRODUCT, ++ .iSerialNumber = STRING_SERIAL, ++ .bNumConfigurations = 1, ++}; ++ ++static struct usb_config_descriptor ++z_config = { ++ .bLength = sizeof z_config, ++ .bDescriptorType = USB_DT_CONFIG, ++ ++ /* compute wTotalLength on the fly */ ++ .bNumInterfaces = 2, ++ .bConfigurationValue = 1, ++ .iConfiguration = 0, ++ .bmAttributes = 0x40, ++ .bMaxPower = 0, /* self-powered */ ++}; ++ ++ ++static struct usb_otg_descriptor ++otg_descriptor = { ++ .bLength = sizeof otg_descriptor, ++ .bDescriptorType = USB_DT_OTG, ++ ++ .bmAttributes = USB_OTG_SRP, ++}; ++ ++/* one interface in each configuration */ ++#ifdef CONFIG_USB_GADGET_DUALSPEED ++ ++/* ++ * usb 2.0 devices need to expose both high speed and full speed ++ * descriptors, unless they only run at full speed. ++ * ++ * that means alternate endpoint descriptors (bigger packets) ++ * and a "device qualifier" ... plus more construction options ++ * for the config descriptor. ++ */ ++ ++static struct usb_qualifier_descriptor ++dev_qualifier = { ++ .bLength = sizeof dev_qualifier, ++ .bDescriptorType = USB_DT_DEVICE_QUALIFIER, ++ ++ .bcdUSB = __constant_cpu_to_le16 (0x0200), ++ .bDeviceClass = USB_CLASS_VENDOR_SPEC, ++ ++ .bNumConfigurations = 2, ++}; ++ ++ ++struct usb_cs_as_general_descriptor { ++ __u8 bLength; ++ __u8 bDescriptorType; ++ ++ __u8 bDescriptorSubType; ++ __u8 bTerminalLink; ++ __u8 bDelay; ++ __u16 wFormatTag; ++} __attribute__ ((packed)); ++ ++struct usb_cs_as_format_descriptor { ++ __u8 bLength; ++ __u8 bDescriptorType; ++ ++ __u8 bDescriptorSubType; ++ __u8 bFormatType; ++ __u8 bNrChannels; ++ __u8 bSubframeSize; ++ __u8 bBitResolution; ++ __u8 bSamfreqType; ++ __u8 tLowerSamFreq[3]; ++ __u8 tUpperSamFreq[3]; ++} __attribute__ ((packed)); ++ ++static const struct usb_interface_descriptor ++z_audio_control_if_desc = { ++ .bLength = sizeof z_audio_control_if_desc, ++ .bDescriptorType = USB_DT_INTERFACE, ++ .bInterfaceNumber = 0, ++ .bAlternateSetting = 0, ++ .bNumEndpoints = 0, ++ .bInterfaceClass = USB_CLASS_AUDIO, ++ .bInterfaceSubClass = 0x1, ++ .bInterfaceProtocol = 0, ++ .iInterface = 0, ++}; ++ ++static const struct usb_interface_descriptor ++z_audio_if_desc = { ++ .bLength = sizeof z_audio_if_desc, ++ .bDescriptorType = USB_DT_INTERFACE, ++ .bInterfaceNumber = 1, ++ .bAlternateSetting = 0, ++ .bNumEndpoints = 0, ++ .bInterfaceClass = USB_CLASS_AUDIO, ++ .bInterfaceSubClass = 0x2, ++ .bInterfaceProtocol = 0, ++ .iInterface = 0, ++}; ++ ++static const struct usb_interface_descriptor ++z_audio_if_desc2 = { ++ .bLength = sizeof z_audio_if_desc, ++ .bDescriptorType = USB_DT_INTERFACE, ++ .bInterfaceNumber = 1, ++ .bAlternateSetting = 1, ++ .bNumEndpoints = 1, ++ .bInterfaceClass = USB_CLASS_AUDIO, ++ .bInterfaceSubClass = 0x2, ++ .bInterfaceProtocol = 0, ++ .iInterface = 0, ++}; ++ ++static const struct usb_cs_as_general_descriptor ++z_audio_cs_as_if_desc = { ++ .bLength = 7, ++ .bDescriptorType = 0x24, ++ ++ .bDescriptorSubType = 0x01, ++ .bTerminalLink = 0x01, ++ .bDelay = 0x0, ++ .wFormatTag = __constant_cpu_to_le16 (0x0001) ++}; ++ ++ ++static const struct usb_cs_as_format_descriptor ++z_audio_cs_as_format_desc = { ++ .bLength = 0xe, ++ .bDescriptorType = 0x24, ++ ++ .bDescriptorSubType = 2, ++ .bFormatType = 1, ++ .bNrChannels = 1, ++ .bSubframeSize = 1, ++ .bBitResolution = 8, ++ .bSamfreqType = 0, ++ .tLowerSamFreq = {0x7e, 0x13, 0x00}, ++ .tUpperSamFreq = {0xe2, 0xd6, 0x00}, ++}; ++ ++static const struct usb_endpoint_descriptor ++z_iso_ep = { ++ .bLength = 0x09, ++ .bDescriptorType = 0x05, ++ .bEndpointAddress = 0x04, ++ .bmAttributes = 0x09, ++ .wMaxPacketSize = 0x0038, ++ .bInterval = 0x01, ++ .bRefresh = 0x00, ++ .bSynchAddress = 0x00, ++}; ++ ++static char z_iso_ep2[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++// 9 bytes ++static char z_ac_interface_header_desc[] = ++{ 0x09, 0x24, 0x01, 0x00, 0x01, 0x2b, 0x00, 0x01, 0x01 }; ++ ++// 12 bytes ++static char z_0[] = {0x0c, 0x24, 0x02, 0x01, 0x01, 0x01, 0x00, 0x02, ++ 0x03, 0x00, 0x00, 0x00}; ++// 13 bytes ++static char z_1[] = {0x0d, 0x24, 0x06, 0x02, 0x01, 0x02, 0x15, 0x00, ++ 0x02, 0x00, 0x02, 0x00, 0x00}; ++// 9 bytes ++static char z_2[] = {0x09, 0x24, 0x03, 0x03, 0x01, 0x03, 0x00, 0x02, ++ 0x00}; ++ ++static char za_0[] = {0x09, 0x04, 0x01, 0x02, 0x01, 0x01, 0x02, 0x00, ++ 0x00}; ++ ++static char za_1[] = {0x07, 0x24, 0x01, 0x01, 0x00, 0x01, 0x00}; ++ ++static char za_2[] = {0x0e, 0x24, 0x02, 0x01, 0x02, 0x01, 0x08, 0x00, ++ 0x7e, 0x13, 0x00, 0xe2, 0xd6, 0x00}; ++ ++static char za_3[] = {0x09, 0x05, 0x04, 0x09, 0x70, 0x00, 0x01, 0x00, ++ 0x00}; ++ ++static char za_4[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++static char za_5[] = {0x09, 0x04, 0x01, 0x03, 0x01, 0x01, 0x02, 0x00, ++ 0x00}; ++ ++static char za_6[] = {0x07, 0x24, 0x01, 0x01, 0x00, 0x01, 0x00}; ++ ++static char za_7[] = {0x0e, 0x24, 0x02, 0x01, 0x01, 0x02, 0x10, 0x00, ++ 0x7e, 0x13, 0x00, 0xe2, 0xd6, 0x00}; ++ ++static char za_8[] = {0x09, 0x05, 0x04, 0x09, 0x70, 0x00, 0x01, 0x00, ++ 0x00}; ++ ++static char za_9[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++static char za_10[] = {0x09, 0x04, 0x01, 0x04, 0x01, 0x01, 0x02, 0x00, ++ 0x00}; ++ ++static char za_11[] = {0x07, 0x24, 0x01, 0x01, 0x00, 0x01, 0x00}; ++ ++static char za_12[] = {0x0e, 0x24, 0x02, 0x01, 0x02, 0x02, 0x10, 0x00, ++ 0x73, 0x13, 0x00, 0xe2, 0xd6, 0x00}; ++ ++static char za_13[] = {0x09, 0x05, 0x04, 0x09, 0xe0, 0x00, 0x01, 0x00, ++ 0x00}; ++ ++static char za_14[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++static char za_15[] = {0x09, 0x04, 0x01, 0x05, 0x01, 0x01, 0x02, 0x00, ++ 0x00}; ++ ++static char za_16[] = {0x07, 0x24, 0x01, 0x01, 0x00, 0x01, 0x00}; ++ ++static char za_17[] = {0x0e, 0x24, 0x02, 0x01, 0x01, 0x03, 0x14, 0x00, ++ 0x7e, 0x13, 0x00, 0xe2, 0xd6, 0x00}; ++ ++static char za_18[] = {0x09, 0x05, 0x04, 0x09, 0xa8, 0x00, 0x01, 0x00, ++ 0x00}; ++ ++static char za_19[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++static char za_20[] = {0x09, 0x04, 0x01, 0x06, 0x01, 0x01, 0x02, 0x00, ++ 0x00}; ++ ++static char za_21[] = {0x07, 0x24, 0x01, 0x01, 0x00, 0x01, 0x00}; ++ ++static char za_22[] = {0x0e, 0x24, 0x02, 0x01, 0x02, 0x03, 0x14, 0x00, ++ 0x7e, 0x13, 0x00, 0xe2, 0xd6, 0x00}; ++ ++static char za_23[] = {0x09, 0x05, 0x04, 0x09, 0x50, 0x01, 0x01, 0x00, ++ 0x00}; ++ ++static char za_24[] = {0x07, 0x25, 0x01, 0x00, 0x02, 0x00, 0x02}; ++ ++ ++ ++static const struct usb_descriptor_header *z_function [] = { ++ (struct usb_descriptor_header *) &z_audio_control_if_desc, ++ (struct usb_descriptor_header *) &z_ac_interface_header_desc, ++ (struct usb_descriptor_header *) &z_0, ++ (struct usb_descriptor_header *) &z_1, ++ (struct usb_descriptor_header *) &z_2, ++ (struct usb_descriptor_header *) &z_audio_if_desc, ++ (struct usb_descriptor_header *) &z_audio_if_desc2, ++ (struct usb_descriptor_header *) &z_audio_cs_as_if_desc, ++ (struct usb_descriptor_header *) &z_audio_cs_as_format_desc, ++ (struct usb_descriptor_header *) &z_iso_ep, ++ (struct usb_descriptor_header *) &z_iso_ep2, ++ (struct usb_descriptor_header *) &za_0, ++ (struct usb_descriptor_header *) &za_1, ++ (struct usb_descriptor_header *) &za_2, ++ (struct usb_descriptor_header *) &za_3, ++ (struct usb_descriptor_header *) &za_4, ++ (struct usb_descriptor_header *) &za_5, ++ (struct usb_descriptor_header *) &za_6, ++ (struct usb_descriptor_header *) &za_7, ++ (struct usb_descriptor_header *) &za_8, ++ (struct usb_descriptor_header *) &za_9, ++ (struct usb_descriptor_header *) &za_10, ++ (struct usb_descriptor_header *) &za_11, ++ (struct usb_descriptor_header *) &za_12, ++ (struct usb_descriptor_header *) &za_13, ++ (struct usb_descriptor_header *) &za_14, ++ (struct usb_descriptor_header *) &za_15, ++ (struct usb_descriptor_header *) &za_16, ++ (struct usb_descriptor_header *) &za_17, ++ (struct usb_descriptor_header *) &za_18, ++ (struct usb_descriptor_header *) &za_19, ++ (struct usb_descriptor_header *) &za_20, ++ (struct usb_descriptor_header *) &za_21, ++ (struct usb_descriptor_header *) &za_22, ++ (struct usb_descriptor_header *) &za_23, ++ (struct usb_descriptor_header *) &za_24, ++ NULL, ++}; ++ ++/* maxpacket and other transfer characteristics vary by speed. */ ++#define ep_desc(g,hs,fs) (((g)->speed==USB_SPEED_HIGH)?(hs):(fs)) ++ ++#else ++ ++/* if there's no high speed support, maxpacket doesn't change. */ ++#define ep_desc(g,hs,fs) fs ++ ++#endif /* !CONFIG_USB_GADGET_DUALSPEED */ ++ ++static char manufacturer [40]; ++//static char serial [40]; ++static char serial [] = "Ser 00 em"; ++ ++/* static strings, in UTF-8 */ ++static struct usb_string strings [] = { ++ { STRING_MANUFACTURER, manufacturer, }, ++ { STRING_PRODUCT, longname, }, ++ { STRING_SERIAL, serial, }, ++ { STRING_LOOPBACK, loopback, }, ++ { STRING_SOURCE_SINK, source_sink, }, ++ { } /* end of list */ ++}; ++ ++static struct usb_gadget_strings stringtab = { ++ .language = 0x0409, /* en-us */ ++ .strings = strings, ++}; ++ ++/* ++ * config descriptors are also handcrafted. these must agree with code ++ * that sets configurations, and with code managing interfaces and their ++ * altsettings. other complexity may come from: ++ * ++ * - high speed support, including "other speed config" rules ++ * - multiple configurations ++ * - interfaces with alternate settings ++ * - embedded class or vendor-specific descriptors ++ * ++ * this handles high speed, and has a second config that could as easily ++ * have been an alternate interface setting (on most hardware). ++ * ++ * NOTE: to demonstrate (and test) more USB capabilities, this driver ++ * should include an altsetting to test interrupt transfers, including ++ * high bandwidth modes at high speed. (Maybe work like Intel's test ++ * device?) ++ */ ++static int ++config_buf (struct usb_gadget *gadget, u8 *buf, u8 type, unsigned index) ++{ ++ int len; ++ const struct usb_descriptor_header **function; ++ ++ function = z_function; ++ len = usb_gadget_config_buf (&z_config, buf, USB_BUFSIZ, function); ++ if (len < 0) ++ return len; ++ ((struct usb_config_descriptor *) buf)->bDescriptorType = type; ++ return len; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct usb_request * ++alloc_ep_req (struct usb_ep *ep, unsigned length) ++{ ++ struct usb_request *req; ++ ++ req = usb_ep_alloc_request (ep, GFP_ATOMIC); ++ if (req) { ++ req->length = length; ++ req->buf = usb_ep_alloc_buffer (ep, length, ++ &req->dma, GFP_ATOMIC); ++ if (!req->buf) { ++ usb_ep_free_request (ep, req); ++ req = NULL; ++ } ++ } ++ return req; ++} ++ ++static void free_ep_req (struct usb_ep *ep, struct usb_request *req) ++{ ++ if (req->buf) ++ usb_ep_free_buffer (ep, req->buf, req->dma, req->length); ++ usb_ep_free_request (ep, req); ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++/* optionally require specific source/sink data patterns */ ++ ++static int ++check_read_data ( ++ struct zero_dev *dev, ++ struct usb_ep *ep, ++ struct usb_request *req ++) ++{ ++ unsigned i; ++ u8 *buf = req->buf; ++ ++ for (i = 0; i < req->actual; i++, buf++) { ++ switch (pattern) { ++ /* all-zeroes has no synchronization issues */ ++ case 0: ++ if (*buf == 0) ++ continue; ++ break; ++ /* mod63 stays in sync with short-terminated transfers, ++ * or otherwise when host and gadget agree on how large ++ * each usb transfer request should be. resync is done ++ * with set_interface or set_config. ++ */ ++ case 1: ++ if (*buf == (u8)(i % 63)) ++ continue; ++ break; ++ } ++ ERROR (dev, "bad OUT byte, buf [%d] = %d\n", i, *buf); ++ usb_ep_set_halt (ep); ++ return -EINVAL; ++ } ++ return 0; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void zero_reset_config (struct zero_dev *dev) ++{ ++ if (dev->config == 0) ++ return; ++ ++ DBG (dev, "reset config\n"); ++ ++ /* just disable endpoints, forcing completion of pending i/o. ++ * all our completion handlers free their requests in this case. ++ */ ++ if (dev->in_ep) { ++ usb_ep_disable (dev->in_ep); ++ dev->in_ep = NULL; ++ } ++ if (dev->out_ep) { ++ usb_ep_disable (dev->out_ep); ++ dev->out_ep = NULL; ++ } ++ dev->config = 0; ++ del_timer (&dev->resume); ++} ++ ++#define _write(f, buf, sz) (f->f_op->write(f, buf, sz, &f->f_pos)) ++ ++static void ++zero_isoc_complete (struct usb_ep *ep, struct usb_request *req) ++{ ++ struct zero_dev *dev = ep->driver_data; ++ int status = req->status; ++ int i, j; ++ ++ switch (status) { ++ ++ case 0: /* normal completion? */ ++ //printk ("\nzero ---------------> isoc normal completion %d bytes\n", req->actual); ++ for (i=0, j=rbuf_start; iactual; i++) { ++ //printk ("%02x ", ((__u8*)req->buf)[i]); ++ rbuf[j] = ((__u8*)req->buf)[i]; ++ j++; ++ if (j >= RBUF_LEN) j=0; ++ } ++ rbuf_start = j; ++ //printk ("\n\n"); ++ ++ if (rbuf_len < RBUF_LEN) { ++ rbuf_len += req->actual; ++ if (rbuf_len > RBUF_LEN) { ++ rbuf_len = RBUF_LEN; ++ } ++ } ++ ++ break; ++ ++ /* this endpoint is normally active while we're configured */ ++ case -ECONNABORTED: /* hardware forced ep reset */ ++ case -ECONNRESET: /* request dequeued */ ++ case -ESHUTDOWN: /* disconnect from host */ ++ VDBG (dev, "%s gone (%d), %d/%d\n", ep->name, status, ++ req->actual, req->length); ++ if (ep == dev->out_ep) ++ check_read_data (dev, ep, req); ++ free_ep_req (ep, req); ++ return; ++ ++ case -EOVERFLOW: /* buffer overrun on read means that ++ * we didn't provide a big enough ++ * buffer. ++ */ ++ default: ++#if 1 ++ DBG (dev, "%s complete --> %d, %d/%d\n", ep->name, ++ status, req->actual, req->length); ++#endif ++ case -EREMOTEIO: /* short read */ ++ break; ++ } ++ ++ status = usb_ep_queue (ep, req, GFP_ATOMIC); ++ if (status) { ++ ERROR (dev, "kill %s: resubmit %d bytes --> %d\n", ++ ep->name, req->length, status); ++ usb_ep_set_halt (ep); ++ /* FIXME recover later ... somehow */ ++ } ++} ++ ++static struct usb_request * ++zero_start_isoc_ep (struct usb_ep *ep, int gfp_flags) ++{ ++ struct usb_request *req; ++ int status; ++ ++ req = alloc_ep_req (ep, 512); ++ if (!req) ++ return NULL; ++ ++ req->complete = zero_isoc_complete; ++ ++ status = usb_ep_queue (ep, req, gfp_flags); ++ if (status) { ++ struct zero_dev *dev = ep->driver_data; ++ ++ ERROR (dev, "start %s --> %d\n", ep->name, status); ++ free_ep_req (ep, req); ++ req = NULL; ++ } ++ ++ return req; ++} ++ ++/* change our operational config. this code must agree with the code ++ * that returns config descriptors, and altsetting code. ++ * ++ * it's also responsible for power management interactions. some ++ * configurations might not work with our current power sources. ++ * ++ * note that some device controller hardware will constrain what this ++ * code can do, perhaps by disallowing more than one configuration or ++ * by limiting configuration choices (like the pxa2xx). ++ */ ++static int ++zero_set_config (struct zero_dev *dev, unsigned number, int gfp_flags) ++{ ++ int result = 0; ++ struct usb_gadget *gadget = dev->gadget; ++ const struct usb_endpoint_descriptor *d; ++ struct usb_ep *ep; ++ ++ if (number == dev->config) ++ return 0; ++ ++ zero_reset_config (dev); ++ ++ gadget_for_each_ep (ep, gadget) { ++ ++ if (strcmp (ep->name, "ep4") == 0) { ++ ++ d = (struct usb_endpoint_descripter *)&za_23; // isoc ep desc for audio i/f alt setting 6 ++ result = usb_ep_enable (ep, d); ++ ++ if (result == 0) { ++ ep->driver_data = dev; ++ dev->in_ep = ep; ++ ++ if (zero_start_isoc_ep (ep, gfp_flags) != 0) { ++ ++ dev->in_ep = ep; ++ continue; ++ } ++ ++ usb_ep_disable (ep); ++ result = -EIO; ++ } ++ } ++ ++ } ++ ++ dev->config = number; ++ return result; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void zero_setup_complete (struct usb_ep *ep, struct usb_request *req) ++{ ++ if (req->status || req->actual != req->length) ++ DBG ((struct zero_dev *) ep->driver_data, ++ "setup complete --> %d, %d/%d\n", ++ req->status, req->actual, req->length); ++} ++ ++/* ++ * The setup() callback implements all the ep0 functionality that's ++ * not handled lower down, in hardware or the hardware driver (like ++ * device and endpoint feature flags, and their status). It's all ++ * housekeeping for the gadget function we're implementing. Most of ++ * the work is in config-specific setup. ++ */ ++static int ++zero_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) ++{ ++ struct zero_dev *dev = get_gadget_data (gadget); ++ struct usb_request *req = dev->req; ++ int value = -EOPNOTSUPP; ++ ++ /* usually this stores reply data in the pre-allocated ep0 buffer, ++ * but config change events will reconfigure hardware. ++ */ ++ req->zero = 0; ++ switch (ctrl->bRequest) { ++ ++ case USB_REQ_GET_DESCRIPTOR: ++ ++ switch (ctrl->wValue >> 8) { ++ ++ case USB_DT_DEVICE: ++ value = min (ctrl->wLength, (u16) sizeof device_desc); ++ memcpy (req->buf, &device_desc, value); ++ break; ++#ifdef CONFIG_USB_GADGET_DUALSPEED ++ case USB_DT_DEVICE_QUALIFIER: ++ if (!gadget->is_dualspeed) ++ break; ++ value = min (ctrl->wLength, (u16) sizeof dev_qualifier); ++ memcpy (req->buf, &dev_qualifier, value); ++ break; ++ ++ case USB_DT_OTHER_SPEED_CONFIG: ++ if (!gadget->is_dualspeed) ++ break; ++ // FALLTHROUGH ++#endif /* CONFIG_USB_GADGET_DUALSPEED */ ++ case USB_DT_CONFIG: ++ value = config_buf (gadget, req->buf, ++ ctrl->wValue >> 8, ++ ctrl->wValue & 0xff); ++ if (value >= 0) ++ value = min (ctrl->wLength, (u16) value); ++ break; ++ ++ case USB_DT_STRING: ++ /* wIndex == language code. ++ * this driver only handles one language, you can ++ * add string tables for other languages, using ++ * any UTF-8 characters ++ */ ++ value = usb_gadget_get_string (&stringtab, ++ ctrl->wValue & 0xff, req->buf); ++ if (value >= 0) { ++ value = min (ctrl->wLength, (u16) value); ++ } ++ break; ++ } ++ break; ++ ++ /* currently two configs, two speeds */ ++ case USB_REQ_SET_CONFIGURATION: ++ if (ctrl->bRequestType != 0) ++ goto unknown; ++ ++ spin_lock (&dev->lock); ++ value = zero_set_config (dev, ctrl->wValue, GFP_ATOMIC); ++ spin_unlock (&dev->lock); ++ break; ++ case USB_REQ_GET_CONFIGURATION: ++ if (ctrl->bRequestType != USB_DIR_IN) ++ goto unknown; ++ *(u8 *)req->buf = dev->config; ++ value = min (ctrl->wLength, (u16) 1); ++ break; ++ ++ /* until we add altsetting support, or other interfaces, ++ * only 0/0 are possible. pxa2xx only supports 0/0 (poorly) ++ * and already killed pending endpoint I/O. ++ */ ++ case USB_REQ_SET_INTERFACE: ++ ++ if (ctrl->bRequestType != USB_RECIP_INTERFACE) ++ goto unknown; ++ spin_lock (&dev->lock); ++ if (dev->config) { ++ u8 config = dev->config; ++ ++ /* resets interface configuration, forgets about ++ * previous transaction state (queued bufs, etc) ++ * and re-inits endpoint state (toggle etc) ++ * no response queued, just zero status == success. ++ * if we had more than one interface we couldn't ++ * use this "reset the config" shortcut. ++ */ ++ zero_reset_config (dev); ++ zero_set_config (dev, config, GFP_ATOMIC); ++ value = 0; ++ } ++ spin_unlock (&dev->lock); ++ break; ++ case USB_REQ_GET_INTERFACE: ++ if ((ctrl->bRequestType == 0x21) && (ctrl->wIndex == 0x02)) { ++ value = ctrl->wLength; ++ break; ++ } ++ else { ++ if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE)) ++ goto unknown; ++ if (!dev->config) ++ break; ++ if (ctrl->wIndex != 0) { ++ value = -EDOM; ++ break; ++ } ++ *(u8 *)req->buf = 0; ++ value = min (ctrl->wLength, (u16) 1); ++ } ++ break; ++ ++ /* ++ * These are the same vendor-specific requests supported by ++ * Intel's USB 2.0 compliance test devices. We exceed that ++ * device spec by allowing multiple-packet requests. ++ */ ++ case 0x5b: /* control WRITE test -- fill the buffer */ ++ if (ctrl->bRequestType != (USB_DIR_OUT|USB_TYPE_VENDOR)) ++ goto unknown; ++ if (ctrl->wValue || ctrl->wIndex) ++ break; ++ /* just read that many bytes into the buffer */ ++ if (ctrl->wLength > USB_BUFSIZ) ++ break; ++ value = ctrl->wLength; ++ break; ++ case 0x5c: /* control READ test -- return the buffer */ ++ if (ctrl->bRequestType != (USB_DIR_IN|USB_TYPE_VENDOR)) ++ goto unknown; ++ if (ctrl->wValue || ctrl->wIndex) ++ break; ++ /* expect those bytes are still in the buffer; send back */ ++ if (ctrl->wLength > USB_BUFSIZ ++ || ctrl->wLength != req->length) ++ break; ++ value = ctrl->wLength; ++ break; ++ ++ case 0x01: // SET_CUR ++ case 0x02: ++ case 0x03: ++ case 0x04: ++ case 0x05: ++ value = ctrl->wLength; ++ break; ++ case 0x81: ++ switch (ctrl->wValue) { ++ case 0x0201: ++ case 0x0202: ++ ((u8*)req->buf)[0] = 0x00; ++ ((u8*)req->buf)[1] = 0xe3; ++ break; ++ case 0x0300: ++ case 0x0500: ++ ((u8*)req->buf)[0] = 0x00; ++ break; ++ } ++ //((u8*)req->buf)[0] = 0x81; ++ //((u8*)req->buf)[1] = 0x81; ++ value = ctrl->wLength; ++ break; ++ case 0x82: ++ switch (ctrl->wValue) { ++ case 0x0201: ++ case 0x0202: ++ ((u8*)req->buf)[0] = 0x00; ++ ((u8*)req->buf)[1] = 0xc3; ++ break; ++ case 0x0300: ++ case 0x0500: ++ ((u8*)req->buf)[0] = 0x00; ++ break; ++ } ++ //((u8*)req->buf)[0] = 0x82; ++ //((u8*)req->buf)[1] = 0x82; ++ value = ctrl->wLength; ++ break; ++ case 0x83: ++ switch (ctrl->wValue) { ++ case 0x0201: ++ case 0x0202: ++ ((u8*)req->buf)[0] = 0x00; ++ ((u8*)req->buf)[1] = 0x00; ++ break; ++ case 0x0300: ++ ((u8*)req->buf)[0] = 0x60; ++ break; ++ case 0x0500: ++ ((u8*)req->buf)[0] = 0x18; ++ break; ++ } ++ //((u8*)req->buf)[0] = 0x83; ++ //((u8*)req->buf)[1] = 0x83; ++ value = ctrl->wLength; ++ break; ++ case 0x84: ++ switch (ctrl->wValue) { ++ case 0x0201: ++ case 0x0202: ++ ((u8*)req->buf)[0] = 0x00; ++ ((u8*)req->buf)[1] = 0x01; ++ break; ++ case 0x0300: ++ case 0x0500: ++ ((u8*)req->buf)[0] = 0x08; ++ break; ++ } ++ //((u8*)req->buf)[0] = 0x84; ++ //((u8*)req->buf)[1] = 0x84; ++ value = ctrl->wLength; ++ break; ++ case 0x85: ++ ((u8*)req->buf)[0] = 0x85; ++ ((u8*)req->buf)[1] = 0x85; ++ value = ctrl->wLength; ++ break; ++ ++ ++ default: ++unknown: ++ printk("unknown control req%02x.%02x v%04x i%04x l%d\n", ++ ctrl->bRequestType, ctrl->bRequest, ++ ctrl->wValue, ctrl->wIndex, ctrl->wLength); ++ } ++ ++ /* respond with data transfer before status phase? */ ++ if (value >= 0) { ++ req->length = value; ++ req->zero = value < ctrl->wLength ++ && (value % gadget->ep0->maxpacket) == 0; ++ value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); ++ if (value < 0) { ++ DBG (dev, "ep_queue < 0 --> %d\n", value); ++ req->status = 0; ++ zero_setup_complete (gadget->ep0, req); ++ } ++ } ++ ++ /* device either stalls (value < 0) or reports success */ ++ return value; ++} ++ ++static void ++zero_disconnect (struct usb_gadget *gadget) ++{ ++ struct zero_dev *dev = get_gadget_data (gadget); ++ unsigned long flags; ++ ++ spin_lock_irqsave (&dev->lock, flags); ++ zero_reset_config (dev); ++ ++ /* a more significant application might have some non-usb ++ * activities to quiesce here, saving resources like power ++ * or pushing the notification up a network stack. ++ */ ++ spin_unlock_irqrestore (&dev->lock, flags); ++ ++ /* next we may get setup() calls to enumerate new connections; ++ * or an unbind() during shutdown (including removing module). ++ */ ++} ++ ++static void ++zero_autoresume (unsigned long _dev) ++{ ++ struct zero_dev *dev = (struct zero_dev *) _dev; ++ int status; ++ ++ /* normally the host would be woken up for something ++ * more significant than just a timer firing... ++ */ ++ if (dev->gadget->speed != USB_SPEED_UNKNOWN) { ++ status = usb_gadget_wakeup (dev->gadget); ++ DBG (dev, "wakeup --> %d\n", status); ++ } ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void ++zero_unbind (struct usb_gadget *gadget) ++{ ++ struct zero_dev *dev = get_gadget_data (gadget); ++ ++ DBG (dev, "unbind\n"); ++ ++ /* we've already been disconnected ... no i/o is active */ ++ if (dev->req) ++ free_ep_req (gadget->ep0, dev->req); ++ del_timer_sync (&dev->resume); ++ kfree (dev); ++ set_gadget_data (gadget, NULL); ++} ++ ++static int ++zero_bind (struct usb_gadget *gadget) ++{ ++ struct zero_dev *dev; ++ //struct usb_ep *ep; ++ ++ printk("binding\n"); ++ /* ++ * DRIVER POLICY CHOICE: you may want to do this differently. ++ * One thing to avoid is reusing a bcdDevice revision code ++ * with different host-visible configurations or behavior ++ * restrictions -- using ep1in/ep2out vs ep1out/ep3in, etc ++ */ ++ //device_desc.bcdDevice = __constant_cpu_to_le16 (0x0201); ++ ++ ++ /* ok, we made sense of the hardware ... */ ++ dev = kmalloc (sizeof *dev, SLAB_KERNEL); ++ if (!dev) ++ return -ENOMEM; ++ memset (dev, 0, sizeof *dev); ++ spin_lock_init (&dev->lock); ++ dev->gadget = gadget; ++ set_gadget_data (gadget, dev); ++ ++ /* preallocate control response and buffer */ ++ dev->req = usb_ep_alloc_request (gadget->ep0, GFP_KERNEL); ++ if (!dev->req) ++ goto enomem; ++ dev->req->buf = usb_ep_alloc_buffer (gadget->ep0, USB_BUFSIZ, ++ &dev->req->dma, GFP_KERNEL); ++ if (!dev->req->buf) ++ goto enomem; ++ ++ dev->req->complete = zero_setup_complete; ++ ++ device_desc.bMaxPacketSize0 = gadget->ep0->maxpacket; ++ ++#ifdef CONFIG_USB_GADGET_DUALSPEED ++ /* assume ep0 uses the same value for both speeds ... */ ++ dev_qualifier.bMaxPacketSize0 = device_desc.bMaxPacketSize0; ++ ++ /* and that all endpoints are dual-speed */ ++ //hs_source_desc.bEndpointAddress = fs_source_desc.bEndpointAddress; ++ //hs_sink_desc.bEndpointAddress = fs_sink_desc.bEndpointAddress; ++#endif ++ ++ usb_gadget_set_selfpowered (gadget); ++ ++ init_timer (&dev->resume); ++ dev->resume.function = zero_autoresume; ++ dev->resume.data = (unsigned long) dev; ++ ++ gadget->ep0->driver_data = dev; ++ ++ INFO (dev, "%s, version: " DRIVER_VERSION "\n", longname); ++ INFO (dev, "using %s, OUT %s IN %s\n", gadget->name, ++ EP_OUT_NAME, EP_IN_NAME); ++ ++ snprintf (manufacturer, sizeof manufacturer, ++ UTS_SYSNAME " " UTS_RELEASE " with %s", ++ gadget->name); ++ ++ return 0; ++ ++enomem: ++ zero_unbind (gadget); ++ return -ENOMEM; ++} ++ ++/*-------------------------------------------------------------------------*/ ++ ++static void ++zero_suspend (struct usb_gadget *gadget) ++{ ++ struct zero_dev *dev = get_gadget_data (gadget); ++ ++ if (gadget->speed == USB_SPEED_UNKNOWN) ++ return; ++ ++ if (autoresume) { ++ mod_timer (&dev->resume, jiffies + (HZ * autoresume)); ++ DBG (dev, "suspend, wakeup in %d seconds\n", autoresume); ++ } else ++ DBG (dev, "suspend\n"); ++} ++ ++static void ++zero_resume (struct usb_gadget *gadget) ++{ ++ struct zero_dev *dev = get_gadget_data (gadget); ++ ++ DBG (dev, "resume\n"); ++ del_timer (&dev->resume); ++} ++ ++ ++/*-------------------------------------------------------------------------*/ ++ ++static struct usb_gadget_driver zero_driver = { ++#ifdef CONFIG_USB_GADGET_DUALSPEED ++ .speed = USB_SPEED_HIGH, ++#else ++ .speed = USB_SPEED_FULL, ++#endif ++ .function = (char *) longname, ++ .bind = zero_bind, ++ .unbind = zero_unbind, ++ ++ .setup = zero_setup, ++ .disconnect = zero_disconnect, ++ ++ .suspend = zero_suspend, ++ .resume = zero_resume, ++ ++ .driver = { ++ .name = (char *) shortname, ++ // .shutdown = ... ++ // .suspend = ... ++ // .resume = ... ++ }, ++}; ++ ++MODULE_AUTHOR ("David Brownell"); ++MODULE_LICENSE ("Dual BSD/GPL"); ++ ++static struct proc_dir_entry *pdir, *pfile; ++ ++static int isoc_read_data (char *page, char **start, ++ off_t off, int count, ++ int *eof, void *data) ++{ ++ int i; ++ static int c = 0; ++ static int done = 0; ++ static int s = 0; ++ ++/* ++ printk ("\ncount: %d\n", count); ++ printk ("rbuf_start: %d\n", rbuf_start); ++ printk ("rbuf_len: %d\n", rbuf_len); ++ printk ("off: %d\n", off); ++ printk ("start: %p\n\n", *start); ++*/ ++ if (done) { ++ c = 0; ++ done = 0; ++ *eof = 1; ++ return 0; ++ } ++ ++ if (c == 0) { ++ if (rbuf_len == RBUF_LEN) ++ s = rbuf_start; ++ else s = 0; ++ } ++ ++ for (i=0; i= rbuf_len) { ++ *eof = 1; ++ done = 1; ++ } ++ ++ ++ return i; ++} ++ ++static int __init init (void) ++{ ++ ++ int retval = 0; ++ ++ pdir = proc_mkdir("isoc_test", NULL); ++ if(pdir == NULL) { ++ retval = -ENOMEM; ++ printk("Error creating dir\n"); ++ goto done; ++ } ++ pdir->owner = THIS_MODULE; ++ ++ pfile = create_proc_read_entry("isoc_data", ++ 0444, pdir, ++ isoc_read_data, ++ NULL); ++ if (pfile == NULL) { ++ retval = -ENOMEM; ++ printk("Error creating file\n"); ++ goto no_file; ++ } ++ pfile->owner = THIS_MODULE; ++ ++ return usb_gadget_register_driver (&zero_driver); ++ ++ no_file: ++ remove_proc_entry("isoc_data", NULL); ++ done: ++ return retval; ++} ++module_init (init); ++ ++static void __exit cleanup (void) ++{ ++ ++ usb_gadget_unregister_driver (&zero_driver); ++ ++ remove_proc_entry("isoc_data", pdir); ++ remove_proc_entry("isoc_test", NULL); ++} ++module_exit (cleanup); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_cfi_common.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_cfi_common.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,142 @@ ++/* ========================================================================== ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#if !defined(__DWC_CFI_COMMON_H__) ++#define __DWC_CFI_COMMON_H__ ++ ++//#include ++ ++/** ++ * @file ++ * ++ * This file contains the CFI specific common constants, interfaces ++ * (functions and macros) and structures for Linux. No PCD specific ++ * data structure or definition is to be included in this file. ++ * ++ */ ++ ++/** This is a request for all Core Features */ ++#define VEN_CORE_GET_FEATURES 0xB1 ++ ++/** This is a request to get the value of a specific Core Feature */ ++#define VEN_CORE_GET_FEATURE 0xB2 ++ ++/** This command allows the host to set the value of a specific Core Feature */ ++#define VEN_CORE_SET_FEATURE 0xB3 ++ ++/** This command allows the host to set the default values of ++ * either all or any specific Core Feature ++ */ ++#define VEN_CORE_RESET_FEATURES 0xB4 ++ ++/** This command forces the PCD to write the deferred values of a Core Features */ ++#define VEN_CORE_ACTIVATE_FEATURES 0xB5 ++ ++/** This request reads a DWORD value from a register at the specified offset */ ++#define VEN_CORE_READ_REGISTER 0xB6 ++ ++/** This request writes a DWORD value into a register at the specified offset */ ++#define VEN_CORE_WRITE_REGISTER 0xB7 ++ ++/** This structure is the header of the Core Features dataset returned to ++ * the Host ++ */ ++struct cfi_all_features_header { ++/** The features header structure length is */ ++#define CFI_ALL_FEATURES_HDR_LEN 8 ++ /** ++ * The total length of the features dataset returned to the Host ++ */ ++ uint16_t wTotalLen; ++ ++ /** ++ * CFI version number inBinary-Coded Decimal (i.e., 1.00 is 100H). ++ * This field identifies the version of the CFI Specification with which ++ * the device is compliant. ++ */ ++ uint16_t wVersion; ++ ++ /** The ID of the Core */ ++ uint16_t wCoreID; ++#define CFI_CORE_ID_UDC 1 ++#define CFI_CORE_ID_OTG 2 ++#define CFI_CORE_ID_WUDEV 3 ++ ++ /** Number of features returned by VEN_CORE_GET_FEATURES request */ ++ uint16_t wNumFeatures; ++} UPACKED; ++ ++typedef struct cfi_all_features_header cfi_all_features_header_t; ++ ++/** This structure is a header of the Core Feature descriptor dataset returned to ++ * the Host after the VEN_CORE_GET_FEATURES request ++ */ ++struct cfi_feature_desc_header { ++#define CFI_FEATURE_DESC_HDR_LEN 8 ++ ++ /** The feature ID */ ++ uint16_t wFeatureID; ++ ++ /** Length of this feature descriptor in bytes - including the ++ * length of the feature name string ++ */ ++ uint16_t wLength; ++ ++ /** The data length of this feature in bytes */ ++ uint16_t wDataLength; ++ ++ /** ++ * Attributes of this features ++ * D0: Access rights ++ * 0 - Read/Write ++ * 1 - Read only ++ */ ++ uint8_t bmAttributes; ++#define CFI_FEATURE_ATTR_RO 1 ++#define CFI_FEATURE_ATTR_RW 0 ++ ++ /** Length of the feature name in bytes */ ++ uint8_t bNameLen; ++ ++ /** The feature name buffer */ ++ //uint8_t *name; ++} UPACKED; ++ ++typedef struct cfi_feature_desc_header cfi_feature_desc_header_t; ++ ++/** ++ * This structure describes a NULL terminated string referenced by its id field. ++ * It is very similar to usb_string structure but has the id field type set to 16-bit. ++ */ ++struct cfi_string { ++ uint16_t id; ++ const uint8_t *s; ++}; ++typedef struct cfi_string cfi_string_t; ++ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_adp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_adp.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,854 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_adp.c $ ++ * $Revision: #12 $ ++ * $Date: 2011/10/26 $ ++ * $Change: 1873028 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#include "dwc_os.h" ++#include "dwc_otg_regs.h" ++#include "dwc_otg_cil.h" ++#include "dwc_otg_adp.h" ++ ++/** @file ++ * ++ * This file contains the most of the Attach Detect Protocol implementation for ++ * the driver to support OTG Rev2.0. ++ * ++ */ ++ ++void dwc_otg_adp_write_reg(dwc_otg_core_if_t * core_if, uint32_t value) ++{ ++ adpctl_data_t adpctl; ++ ++ adpctl.d32 = value; ++ adpctl.b.ar = 0x2; ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->adpctl, adpctl.d32); ++ ++ while (adpctl.b.ar) { ++ adpctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->adpctl); ++ } ++ ++} ++ ++/** ++ * Function is called to read ADP registers ++ */ ++uint32_t dwc_otg_adp_read_reg(dwc_otg_core_if_t * core_if) ++{ ++ adpctl_data_t adpctl; ++ ++ adpctl.d32 = 0; ++ adpctl.b.ar = 0x1; ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->adpctl, adpctl.d32); ++ ++ while (adpctl.b.ar) { ++ adpctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->adpctl); ++ } ++ ++ return adpctl.d32; ++} ++ ++/** ++ * Function is called to read ADPCTL register and filter Write-clear bits ++ */ ++uint32_t dwc_otg_adp_read_reg_filter(dwc_otg_core_if_t * core_if) ++{ ++ adpctl_data_t adpctl; ++ ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ adpctl.b.adp_tmout_int = 0; ++ adpctl.b.adp_prb_int = 0; ++ adpctl.b.adp_tmout_int = 0; ++ ++ return adpctl.d32; ++} ++ ++/** ++ * Function is called to write ADP registers ++ */ ++void dwc_otg_adp_modify_reg(dwc_otg_core_if_t * core_if, uint32_t clr, ++ uint32_t set) ++{ ++ dwc_otg_adp_write_reg(core_if, ++ (dwc_otg_adp_read_reg(core_if) & (~clr)) | set); ++} ++ ++static void adp_sense_timeout(void *ptr) ++{ ++ dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr; ++ core_if->adp.sense_timer_started = 0; ++ DWC_PRINTF("ADP SENSE TIMEOUT\n"); ++ if (core_if->adp_enable) { ++ dwc_otg_adp_sense_stop(core_if); ++ dwc_otg_adp_probe_start(core_if); ++ } ++} ++ ++/** ++ * This function is called when the ADP vbus timer expires. Timeout is 1.1s. ++ */ ++static void adp_vbuson_timeout(void *ptr) ++{ ++ gpwrdn_data_t gpwrdn; ++ dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr; ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ DWC_PRINTF("%s: 1.1 seconds expire after turning on VBUS\n",__FUNCTION__); ++ if (core_if) { ++ core_if->adp.vbuson_timer_started = 0; ++ /* Turn off vbus */ ++ hprt0.b.prtpwr = 1; ++ DWC_MODIFY_REG32(core_if->host_if->hprt0, hprt0.d32, 0); ++ gpwrdn.d32 = 0; ++ ++ /* Power off the core */ ++ if (core_if->power_down == 2) { ++ /* Enable Wakeup Logic */ ++// gpwrdn.b.wkupactiv = 1; ++ gpwrdn.b.pmuactv = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, ++ gpwrdn.d32); ++ ++ /* Suspend the Phy Clock */ ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ ++ /* Switch on VDD */ ++// gpwrdn.b.wkupactiv = 1; ++ gpwrdn.b.pmuactv = 1; ++ gpwrdn.b.pwrdnrstn = 1; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, ++ gpwrdn.d32); ++ } else { ++ /* Enable Power Down Logic */ ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ } ++ ++ /* Power off the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, ++ gpwrdn.d32, 0); ++ } ++ ++ /* Unmask SRP detected interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.srp_det_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ ++ dwc_otg_adp_probe_start(core_if); ++ dwc_otg_dump_global_registers(core_if); ++ dwc_otg_dump_host_registers(core_if); ++ } ++ ++} ++ ++/** ++ * Start the ADP Initial Probe timer to detect if Port Connected interrupt is ++ * not asserted within 1.1 seconds. ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++void dwc_otg_adp_vbuson_timer_start(dwc_otg_core_if_t * core_if) ++{ ++ core_if->adp.vbuson_timer_started = 1; ++ if (core_if->adp.vbuson_timer) ++ { ++ DWC_PRINTF("SCHEDULING VBUSON TIMER\n"); ++ /* 1.1 secs + 60ms necessary for cil_hcd_start*/ ++ DWC_TIMER_SCHEDULE(core_if->adp.vbuson_timer, 1160); ++ } else { ++ DWC_WARN("VBUSON_TIMER = %p\n",core_if->adp.vbuson_timer); ++ } ++} ++ ++#if 0 ++/** ++ * Masks all DWC OTG core interrupts ++ * ++ */ ++static void mask_all_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ int i; ++ gahbcfg_data_t ahbcfg = {.d32 = 0 }; ++ ++ /* Mask Host Interrupts */ ++ ++ /* Clear and disable HCINTs */ ++ for (i = 0; i < core_if->core_params->host_channels; i++) { ++ DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcintmsk, 0); ++ DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcint, 0xFFFFFFFF); ++ ++ } ++ ++ /* Clear and disable HAINT */ ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haintmsk, 0x0000); ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haint, 0xFFFFFFFF); ++ ++ /* Mask Device Interrupts */ ++ if (!core_if->multiproc_int_enable) { ++ /* Clear and disable IN Endpoint interrupts */ ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->diepmsk, 0); ++ for (i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]-> ++ diepint, 0xFFFFFFFF); ++ } ++ ++ /* Clear and disable OUT Endpoint interrupts */ ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->doepmsk, 0); ++ for (i = 0; i <= core_if->dev_if->num_out_eps; i++) { ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]-> ++ doepint, 0xFFFFFFFF); ++ } ++ ++ /* Clear and disable DAINT */ ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daint, ++ 0xFFFFFFFF); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daintmsk, 0); ++ } else { ++ for (i = 0; i < core_if->dev_if->num_in_eps; ++i) { ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs-> ++ diepeachintmsk[i], 0); ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]-> ++ diepint, 0xFFFFFFFF); ++ } ++ ++ for (i = 0; i < core_if->dev_if->num_out_eps; ++i) { ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs-> ++ doepeachintmsk[i], 0); ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]-> ++ doepint, 0xFFFFFFFF); ++ } ++ ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->deachintmsk, ++ 0); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->deachint, ++ 0xFFFFFFFF); ++ ++ } ++ ++ /* Disable interrupts */ ++ ahbcfg.b.glblintrmsk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, ahbcfg.d32, 0); ++ ++ /* Disable all interrupts. */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, 0); ++ ++ /* Clear any pending interrupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Clear any pending OTG Interrupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gotgint, 0xFFFFFFFF); ++} ++ ++/** ++ * Unmask Port Connection Detected interrupt ++ * ++ */ ++static void unmask_conn_det_intr(dwc_otg_core_if_t * core_if) ++{ ++ gintmsk_data_t gintmsk = {.d32 = 0,.b.portintr = 1 }; ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32); ++} ++#endif ++ ++/** ++ * Starts the ADP Probing ++ * ++ * @param core_if the pointer to core_if structure. ++ */ ++uint32_t dwc_otg_adp_probe_start(dwc_otg_core_if_t * core_if) ++{ ++ ++ adpctl_data_t adpctl = {.d32 = 0}; ++ gpwrdn_data_t gpwrdn; ++#if 0 ++ adpctl_data_t adpctl_int = {.d32 = 0, .b.adp_prb_int = 1, ++ .b.adp_sns_int = 1, b.adp_tmout_int}; ++#endif ++ dwc_otg_disable_global_interrupts(core_if); ++ DWC_PRINTF("ADP Probe Start\n"); ++ core_if->adp.probe_enabled = 1; ++ ++ adpctl.b.adpres = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ while (adpctl.b.adpres) { ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ } ++ ++ adpctl.d32 = 0; ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ ++ /* In Host mode unmask SRP detected interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.sts_chngint_msk = 1; ++ if (!gpwrdn.b.idsts) { ++ gpwrdn.b.srp_det_msk = 1; ++ } ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ ++ adpctl.b.adp_tmout_int_msk = 1; ++ adpctl.b.adp_prb_int_msk = 1; ++ adpctl.b.prb_dschg = 1; ++ adpctl.b.prb_delta = 1; ++ adpctl.b.prb_per = 1; ++ adpctl.b.adpen = 1; ++ adpctl.b.enaprb = 1; ++ ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ DWC_PRINTF("ADP Probe Finish\n"); ++ return 0; ++} ++ ++/** ++ * Starts the ADP Sense timer to detect if ADP Sense interrupt is not asserted ++ * within 3 seconds. ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++void dwc_otg_adp_sense_timer_start(dwc_otg_core_if_t * core_if) ++{ ++ core_if->adp.sense_timer_started = 1; ++ DWC_TIMER_SCHEDULE(core_if->adp.sense_timer, 3000 /* 3 secs */ ); ++} ++ ++/** ++ * Starts the ADP Sense ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++uint32_t dwc_otg_adp_sense_start(dwc_otg_core_if_t * core_if) ++{ ++ adpctl_data_t adpctl; ++ ++ DWC_PRINTF("ADP Sense Start\n"); ++ ++ /* Unmask ADP sense interrupt and mask all other from the core */ ++ adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if); ++ adpctl.b.adp_sns_int_msk = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ dwc_otg_disable_global_interrupts(core_if); // vahrama ++ ++ /* Set ADP reset bit*/ ++ adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if); ++ adpctl.b.adpres = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ while (adpctl.b.adpres) { ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ } ++ ++ adpctl.b.adpres = 0; ++ adpctl.b.adpen = 1; ++ adpctl.b.enasns = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ dwc_otg_adp_sense_timer_start(core_if); ++ ++ return 0; ++} ++ ++/** ++ * Stops the ADP Probing ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++uint32_t dwc_otg_adp_probe_stop(dwc_otg_core_if_t * core_if) ++{ ++ ++ adpctl_data_t adpctl; ++ DWC_PRINTF("Stop ADP probe\n"); ++ core_if->adp.probe_enabled = 0; ++ core_if->adp.probe_counter = 0; ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ ++ adpctl.b.adpen = 0; ++ adpctl.b.adp_prb_int = 1; ++ adpctl.b.adp_tmout_int = 1; ++ adpctl.b.adp_sns_int = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ return 0; ++} ++ ++/** ++ * Stops the ADP Sensing ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++uint32_t dwc_otg_adp_sense_stop(dwc_otg_core_if_t * core_if) ++{ ++ adpctl_data_t adpctl; ++ ++ core_if->adp.sense_enabled = 0; ++ ++ adpctl.d32 = dwc_otg_adp_read_reg_filter(core_if); ++ adpctl.b.enasns = 0; ++ adpctl.b.adp_sns_int = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ return 0; ++} ++ ++/** ++ * Called to turn on the VBUS after initial ADP probe in host mode. ++ * If port power was already enabled in cil_hcd_start function then ++ * only schedule a timer. ++ * ++ * @param core_if the pointer to core_if structure. ++ */ ++void dwc_otg_adp_turnon_vbus(dwc_otg_core_if_t * core_if) ++{ ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ DWC_PRINTF("Turn on VBUS for 1.1s, port power is %d\n", hprt0.b.prtpwr); ++ ++ if (hprt0.b.prtpwr == 0) { ++ hprt0.b.prtpwr = 1; ++ //DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ } ++ ++ dwc_otg_adp_vbuson_timer_start(core_if); ++} ++ ++/** ++ * Called right after driver is loaded ++ * to perform initial actions for ADP ++ * ++ * @param core_if the pointer to core_if structure. ++ * @param is_host - flag for current mode of operation either from GINTSTS or GPWRDN ++ */ ++void dwc_otg_adp_start(dwc_otg_core_if_t * core_if, uint8_t is_host) ++{ ++ gpwrdn_data_t gpwrdn; ++ ++ DWC_PRINTF("ADP Initial Start\n"); ++ core_if->adp.adp_started = 1; ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ dwc_otg_disable_global_interrupts(core_if); ++ if (is_host) { ++ DWC_PRINTF("HOST MODE\n"); ++ /* Enable Power Down Logic Interrupt*/ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ /* Initialize first ADP probe to obtain Ramp Time value */ ++ core_if->adp.initial_probe = 1; ++ dwc_otg_adp_probe_start(core_if); ++ } else { ++ gotgctl_data_t gotgctl; ++ gotgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ DWC_PRINTF("DEVICE MODE\n"); ++ if (gotgctl.b.bsesvld == 0) { ++ /* Enable Power Down Logic Interrupt*/ ++ gpwrdn.d32 = 0; ++ DWC_PRINTF("VBUS is not valid - start ADP probe\n"); ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ core_if->adp.initial_probe = 1; ++ dwc_otg_adp_probe_start(core_if); ++ } else { ++ DWC_PRINTF("VBUS is valid - initialize core as a Device\n"); ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ dwc_otg_dump_global_registers(core_if); ++ dwc_otg_dump_dev_registers(core_if); ++ } ++ } ++} ++ ++void dwc_otg_adp_init(dwc_otg_core_if_t * core_if) ++{ ++ core_if->adp.adp_started = 0; ++ core_if->adp.initial_probe = 0; ++ core_if->adp.probe_timer_values[0] = -1; ++ core_if->adp.probe_timer_values[1] = -1; ++ core_if->adp.probe_enabled = 0; ++ core_if->adp.sense_enabled = 0; ++ core_if->adp.sense_timer_started = 0; ++ core_if->adp.vbuson_timer_started = 0; ++ core_if->adp.probe_counter = 0; ++ core_if->adp.gpwrdn = 0; ++ core_if->adp.attached = DWC_OTG_ADP_UNKOWN; ++ /* Initialize timers */ ++ core_if->adp.sense_timer = ++ DWC_TIMER_ALLOC("ADP SENSE TIMER", adp_sense_timeout, core_if); ++ core_if->adp.vbuson_timer = ++ DWC_TIMER_ALLOC("ADP VBUS ON TIMER", adp_vbuson_timeout, core_if); ++ if (!core_if->adp.sense_timer || !core_if->adp.vbuson_timer) ++ { ++ DWC_ERROR("Could not allocate memory for ADP timers\n"); ++ } ++} ++ ++void dwc_otg_adp_remove(dwc_otg_core_if_t * core_if) ++{ ++ gpwrdn_data_t gpwrdn = { .d32 = 0 }; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ if (core_if->adp.probe_enabled) ++ dwc_otg_adp_probe_stop(core_if); ++ if (core_if->adp.sense_enabled) ++ dwc_otg_adp_sense_stop(core_if); ++ if (core_if->adp.sense_timer_started) ++ DWC_TIMER_CANCEL(core_if->adp.sense_timer); ++ if (core_if->adp.vbuson_timer_started) ++ DWC_TIMER_CANCEL(core_if->adp.vbuson_timer); ++ DWC_TIMER_FREE(core_if->adp.sense_timer); ++ DWC_TIMER_FREE(core_if->adp.vbuson_timer); ++} ++ ++///////////////////////////////////////////////////////////////////// ++////////////// ADP Interrupt Handlers /////////////////////////////// ++///////////////////////////////////////////////////////////////////// ++/** ++ * This function sets Ramp Timer values ++ */ ++static uint32_t set_timer_value(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ if (core_if->adp.probe_timer_values[0] == -1) { ++ core_if->adp.probe_timer_values[0] = val; ++ core_if->adp.probe_timer_values[1] = -1; ++ return 1; ++ } else { ++ core_if->adp.probe_timer_values[1] = ++ core_if->adp.probe_timer_values[0]; ++ core_if->adp.probe_timer_values[0] = val; ++ return 0; ++ } ++} ++ ++/** ++ * This function compares Ramp Timer values ++ */ ++static uint32_t compare_timer_values(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t diff; ++ if (core_if->adp.probe_timer_values[0]>=core_if->adp.probe_timer_values[1]) ++ diff = core_if->adp.probe_timer_values[0]-core_if->adp.probe_timer_values[1]; ++ else ++ diff = core_if->adp.probe_timer_values[1]-core_if->adp.probe_timer_values[0]; ++ if(diff < 2) { ++ return 0; ++ } else { ++ return 1; ++ } ++} ++ ++/** ++ * This function handles ADP Probe Interrupts ++ */ ++static int32_t dwc_otg_adp_handle_prb_intr(dwc_otg_core_if_t * core_if, ++ uint32_t val) ++{ ++ adpctl_data_t adpctl = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn, temp; ++ adpctl.d32 = val; ++ ++ temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ core_if->adp.probe_counter++; ++ core_if->adp.gpwrdn = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (adpctl.b.rtim == 0 && !temp.b.idsts){ ++ DWC_PRINTF("RTIM value is 0\n"); ++ goto exit; ++ } ++ if (set_timer_value(core_if, adpctl.b.rtim) && ++ core_if->adp.initial_probe) { ++ core_if->adp.initial_probe = 0; ++ dwc_otg_adp_probe_stop(core_if); ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* check which value is for device mode and which for Host mode */ ++ if (!temp.b.idsts) { /* considered host mode value is 0 */ ++ /* ++ * Turn on VBUS after initial ADP probe. ++ */ ++ core_if->op_state = A_HOST; ++ dwc_otg_enable_global_interrupts(core_if); ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_hcd_start(core_if); ++ dwc_otg_adp_turnon_vbus(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ } else { ++ /* ++ * Initiate SRP after initial ADP probe. ++ */ ++ dwc_otg_enable_global_interrupts(core_if); ++ dwc_otg_initiate_srp(core_if); ++ } ++ } else if (core_if->adp.probe_counter > 2){ ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (compare_timer_values(core_if)) { ++ DWC_PRINTF("Difference in timer values !!! \n"); ++// core_if->adp.attached = DWC_OTG_ADP_ATTACHED; ++ dwc_otg_adp_probe_stop(core_if); ++ ++ /* Power on the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ } ++ ++ /* check which value is for device mode and which for Host mode */ ++ if (!temp.b.idsts) { /* considered host mode value is 0 */ ++ /* Disable Interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, gpwrdn.d32, 0); ++ ++ /* ++ * Initialize the Core for Host mode. ++ */ ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ } else { ++ gotgctl_data_t gotgctl; ++ /* Mask SRP detected interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.srp_det_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, gpwrdn.d32, 0); ++ ++ /* Disable Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, gpwrdn.d32, 0); ++ ++ /* ++ * Initialize the Core for Device mode. ++ */ ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ ++ gotgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ if (!gotgctl.b.bsesvld) { ++ dwc_otg_initiate_srp(core_if); ++ } ++ } ++ } ++ if (core_if->power_down == 2) { ++ if (gpwrdn.b.bsessvld) { ++ /* Mask SRP detected interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.srp_det_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Disable Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* ++ * Initialize the Core for Device mode. ++ */ ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } ++ } ++ } ++exit: ++ /* Clear interrupt */ ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ adpctl.b.adp_prb_int = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ return 0; ++} ++ ++/** ++ * This function hadles ADP Sense Interrupt ++ */ ++static int32_t dwc_otg_adp_handle_sns_intr(dwc_otg_core_if_t * core_if) ++{ ++ adpctl_data_t adpctl; ++ /* Stop ADP Sense timer */ ++ DWC_TIMER_CANCEL(core_if->adp.sense_timer); ++ ++ /* Restart ADP Sense timer */ ++ dwc_otg_adp_sense_timer_start(core_if); ++ ++ /* Clear interrupt */ ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ adpctl.b.adp_sns_int = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ return 0; ++} ++ ++/** ++ * This function handles ADP Probe Interrupts ++ */ ++static int32_t dwc_otg_adp_handle_prb_tmout_intr(dwc_otg_core_if_t * core_if, ++ uint32_t val) ++{ ++ adpctl_data_t adpctl = {.d32 = 0 }; ++ adpctl.d32 = val; ++ set_timer_value(core_if, adpctl.b.rtim); ++ ++ /* Clear interrupt */ ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ adpctl.b.adp_tmout_int = 1; ++ dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ ++ return 0; ++} ++ ++/** ++ * ADP Interrupt handler. ++ * ++ */ ++int32_t dwc_otg_adp_handle_intr(dwc_otg_core_if_t * core_if) ++{ ++ int retval = 0; ++ adpctl_data_t adpctl = {.d32 = 0}; ++ ++ adpctl.d32 = dwc_otg_adp_read_reg(core_if); ++ DWC_PRINTF("ADPCTL = %08x\n",adpctl.d32); ++ ++ if (adpctl.b.adp_sns_int & adpctl.b.adp_sns_int_msk) { ++ DWC_PRINTF("ADP Sense interrupt\n"); ++ retval |= dwc_otg_adp_handle_sns_intr(core_if); ++ } ++ if (adpctl.b.adp_tmout_int & adpctl.b.adp_tmout_int_msk) { ++ DWC_PRINTF("ADP timeout interrupt\n"); ++ retval |= dwc_otg_adp_handle_prb_tmout_intr(core_if, adpctl.d32); ++ } ++ if (adpctl.b.adp_prb_int & adpctl.b.adp_prb_int_msk) { ++ DWC_PRINTF("ADP Probe interrupt\n"); ++ adpctl.b.adp_prb_int = 1; ++ retval |= dwc_otg_adp_handle_prb_intr(core_if, adpctl.d32); ++ } ++ ++// dwc_otg_adp_modify_reg(core_if, adpctl.d32, 0); ++ //dwc_otg_adp_write_reg(core_if, adpctl.d32); ++ DWC_PRINTF("RETURN FROM ADP ISR\n"); ++ ++ return retval; ++} ++ ++/** ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++int32_t dwc_otg_adp_handle_srp_intr(dwc_otg_core_if_t * core_if) ++{ ++ ++#ifndef DWC_HOST_ONLY ++ hprt0_data_t hprt0; ++ gpwrdn_data_t gpwrdn; ++ DWC_DEBUGPL(DBG_ANY, "++ Power Down Logic Session Request Interrupt++\n"); ++ ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ /* check which value is for device mode and which for Host mode */ ++ if (!gpwrdn.b.idsts) { /* considered host mode value is 0 */ ++ DWC_PRINTF("SRP: Host mode\n"); ++ ++ if (core_if->adp_enable) { ++ dwc_otg_adp_probe_stop(core_if); ++ ++ /* Power on the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ } ++ ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ } ++ ++ /* Turn on the port power bit. */ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ /* Start the Connection timer. So a message can be displayed ++ * if connect does not occur within 10 seconds. */ ++ cil_hcd_session_start(core_if); ++ } else { ++ DWC_PRINTF("SRP: Device mode %s\n", __FUNCTION__); ++ if (core_if->adp_enable) { ++ dwc_otg_adp_probe_stop(core_if); ++ ++ /* Power on the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ } ++ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 0; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, ++ gpwrdn.d32); ++ ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } ++ } ++#endif ++ return 1; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_adp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_adp.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,80 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_adp.h $ ++ * $Revision: #7 $ ++ * $Date: 2011/10/24 $ ++ * $Change: 1871159 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#ifndef __DWC_OTG_ADP_H__ ++#define __DWC_OTG_ADP_H__ ++ ++/** ++ * @file ++ * ++ * This file contains the Attach Detect Protocol interfaces and defines ++ * (functions) and structures for Linux. ++ * ++ */ ++ ++#define DWC_OTG_ADP_UNATTACHED 0 ++#define DWC_OTG_ADP_ATTACHED 1 ++#define DWC_OTG_ADP_UNKOWN 2 ++ ++typedef struct dwc_otg_adp { ++ uint32_t adp_started; ++ uint32_t initial_probe; ++ int32_t probe_timer_values[2]; ++ uint32_t probe_enabled; ++ uint32_t sense_enabled; ++ dwc_timer_t *sense_timer; ++ uint32_t sense_timer_started; ++ dwc_timer_t *vbuson_timer; ++ uint32_t vbuson_timer_started; ++ uint32_t attached; ++ uint32_t probe_counter; ++ uint32_t gpwrdn; ++} dwc_otg_adp_t; ++ ++/** ++ * Attach Detect Protocol functions ++ */ ++ ++extern void dwc_otg_adp_write_reg(dwc_otg_core_if_t * core_if, uint32_t value); ++extern uint32_t dwc_otg_adp_read_reg(dwc_otg_core_if_t * core_if); ++extern uint32_t dwc_otg_adp_probe_start(dwc_otg_core_if_t * core_if); ++extern uint32_t dwc_otg_adp_sense_start(dwc_otg_core_if_t * core_if); ++extern uint32_t dwc_otg_adp_probe_stop(dwc_otg_core_if_t * core_if); ++extern uint32_t dwc_otg_adp_sense_stop(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_adp_start(dwc_otg_core_if_t * core_if, uint8_t is_host); ++extern void dwc_otg_adp_init(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_adp_remove(dwc_otg_core_if_t * core_if); ++extern int32_t dwc_otg_adp_handle_intr(dwc_otg_core_if_t * core_if); ++extern int32_t dwc_otg_adp_handle_srp_intr(dwc_otg_core_if_t * core_if); ++ ++#endif //__DWC_OTG_ADP_H__ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1210 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.c $ ++ * $Revision: #44 $ ++ * $Date: 2010/11/29 $ ++ * $Change: 1636033 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++/** @file ++ * ++ * The diagnostic interface will provide access to the controller for ++ * bringing up the hardware and testing. The Linux driver attributes ++ * feature will be used to provide the Linux Diagnostic ++ * Interface. These attributes are accessed through sysfs. ++ */ ++ ++/** @page "Linux Module Attributes" ++ * ++ * The Linux module attributes feature is used to provide the Linux ++ * Diagnostic Interface. These attributes are accessed through sysfs. ++ * The diagnostic interface will provide access to the controller for ++ * bringing up the hardware and testing. ++ ++ The following table shows the attributes. ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++
Name Description Access
mode Returns the current mode: 0 for device mode, 1 for host mode Read
hnpcapable Gets or sets the "HNP-capable" bit in the Core USB Configuraton Register. ++ Read returns the current value. Read/Write
srpcapable Gets or sets the "SRP-capable" bit in the Core USB Configuraton Register. ++ Read returns the current value. Read/Write
hsic_connect Gets or sets the "HSIC-Connect" bit in the GLPMCFG Register. ++ Read returns the current value. Read/Write
inv_sel_hsic Gets or sets the "Invert Select HSIC" bit in the GLPMFG Register. ++ Read returns the current value. Read/Write
hnp Initiates the Host Negotiation Protocol. Read returns the status. Read/Write
srp Initiates the Session Request Protocol. Read returns the status. Read/Write
buspower Gets or sets the Power State of the bus (0 - Off or 1 - On) Read/Write
bussuspend Suspends the USB bus. Read/Write
busconnected Gets the connection status of the bus Read
gotgctl Gets or sets the Core Control Status Register. Read/Write
gusbcfg Gets or sets the Core USB Configuration Register Read/Write
grxfsiz Gets or sets the Receive FIFO Size Register Read/Write
gnptxfsiz Gets or sets the non-periodic Transmit Size Register Read/Write
gpvndctl Gets or sets the PHY Vendor Control Register Read/Write
ggpio Gets the value in the lower 16-bits of the General Purpose IO Register ++ or sets the upper 16 bits. Read/Write
guid Gets or sets the value of the User ID Register Read/Write
gsnpsid Gets the value of the Synopsys ID Regester Read
devspeed Gets or sets the device speed setting in the DCFG register Read/Write
enumspeed Gets the device enumeration Speed. Read
hptxfsiz Gets the value of the Host Periodic Transmit FIFO Read
hprt0 Gets or sets the value in the Host Port Control and Status Register Read/Write
regoffset Sets the register offset for the next Register Access Read/Write
regvalue Gets or sets the value of the register at the offset in the regoffset attribute. Read/Write
remote_wakeup On read, shows the status of Remote Wakeup. On write, initiates a remote ++ wakeup of the host. When bit 0 is 1 and Remote Wakeup is enabled, the Remote ++ Wakeup signalling bit in the Device Control Register is set for 1 ++ milli-second. Read/Write
rem_wakeup_pwrdn On read, shows the status core - hibernated or not. On write, initiates ++ a remote wakeup of the device from Hibernation. Read/Write
mode_ch_tim_en This bit is used to enable or disable the host core to wait for 200 PHY ++ clock cycles at the end of Resume to change the opmode signal to the PHY to 00 ++ after Suspend or LPM. Read/Write
fr_interval On read, shows the value of HFIR Frame Interval. On write, dynamically ++ reload HFIR register during runtime. The application can write a value to this ++ register only after the Port Enable bit of the Host Port Control and Status ++ register (HPRT.PrtEnaPort) has been set Read/Write
disconnect_us On read, shows the status of disconnect_device_us. On write, sets disconnect_us ++ which causes soft disconnect for 100us. Applicable only for device mode of operation. Read/Write
regdump Dumps the contents of core registers. Read
spramdump Dumps the contents of core registers. Read
hcddump Dumps the current HCD state. Read
hcd_frrem Shows the average value of the Frame Remaining ++ field in the Host Frame Number/Frame Remaining register when an SOF interrupt ++ occurs. This can be used to determine the average interrupt latency. Also ++ shows the average Frame Remaining value for start_transfer and the "a" and ++ "b" sample points. The "a" and "b" sample points may be used during debugging ++ bto determine how long it takes to execute a section of the HCD code. Read
rd_reg_test Displays the time required to read the GNPTXFSIZ register many times ++ (the output shows the number of times the register is read). ++ Read
wr_reg_test Displays the time required to write the GNPTXFSIZ register many times ++ (the output shows the number of times the register is written). ++ Read
lpm_response Gets or sets lpm_response mode. Applicable only in device mode. ++ Write
sleep_status Shows sleep status of device. ++ Read
++ ++ Example usage: ++ To get the current mode: ++ cat /sys/devices/lm0/mode ++ ++ To power down the USB: ++ echo 0 > /sys/devices/lm0/buspower ++ */ ++ ++#include "dwc_otg_os_dep.h" ++#include "dwc_os.h" ++#include "dwc_otg_driver.h" ++#include "dwc_otg_attr.h" ++#include "dwc_otg_core_if.h" ++#include "dwc_otg_pcd_if.h" ++#include "dwc_otg_hcd_if.h" ++ ++/* ++ * MACROs for defining sysfs attribute ++ */ ++#ifdef LM_INTERFACE ++ ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ ++ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ ++ uint32_t val; \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ ++ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ ++ uint32_t set = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\ ++ return count; \ ++} ++ ++#elif defined(PCI_INTERFACE) ++ ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev); \ ++ uint32_t val; \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev); \ ++ uint32_t set = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\ ++ return count; \ ++} ++ ++#elif defined(PLATFORM_INTERFACE) ++ ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ struct platform_device *platform_dev = \ ++ container_of(_dev, struct platform_device, dev); \ ++ dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev); \ ++ uint32_t val; \ ++ DWC_PRINTF("%s(%p) -> platform_dev %p, otg_dev %p\n", \ ++ __func__, _dev, platform_dev, otg_dev); \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ struct platform_device *platform_dev = container_of(_dev, struct platform_device, dev); \ ++ dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev); \ ++ uint32_t set = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_(otg_dev->core_if, set);\ ++ return count; \ ++} ++#endif ++ ++/* ++ * MACROs for defining sysfs attribute for 32-bit registers ++ */ ++#ifdef LM_INTERFACE ++#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ ++ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ ++ uint32_t val; \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%08x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev); \ ++ dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev); \ ++ uint32_t val = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \ ++ return count; \ ++} ++#elif defined(PCI_INTERFACE) ++#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev); \ ++ uint32_t val; \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%08x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev); \ ++ uint32_t val = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \ ++ return count; \ ++} ++ ++#elif defined(PLATFORM_INTERFACE) ++#include "dwc_otg_dbg.h" ++#define DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_show (struct device *_dev, struct device_attribute *attr, char *buf) \ ++{ \ ++ struct platform_device *platform_dev = container_of(_dev, struct platform_device, dev); \ ++ dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev); \ ++ uint32_t val; \ ++ DWC_PRINTF("%s(%p) -> platform_dev %p, otg_dev %p\n", \ ++ __func__, _dev, platform_dev, otg_dev); \ ++ val = dwc_otg_get_##_otg_attr_name_ (otg_dev->core_if); \ ++ return sprintf (buf, "%s = 0x%08x\n", _string_, val); \ ++} ++#define DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \ ++static ssize_t _otg_attr_name_##_store (struct device *_dev, struct device_attribute *attr, \ ++ const char *buf, size_t count) \ ++{ \ ++ struct platform_device *platform_dev = container_of(_dev, struct platform_device, dev); \ ++ dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev); \ ++ uint32_t val = simple_strtoul(buf, NULL, 16); \ ++ dwc_otg_set_##_otg_attr_name_ (otg_dev->core_if, val); \ ++ return count; \ ++} ++ ++#endif ++ ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_RW(_otg_attr_name_,_string_) \ ++DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \ ++DWC_OTG_DEVICE_ATTR_BITFIELD_STORE(_otg_attr_name_,_string_) \ ++DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store); ++ ++#define DWC_OTG_DEVICE_ATTR_BITFIELD_RO(_otg_attr_name_,_string_) \ ++DWC_OTG_DEVICE_ATTR_BITFIELD_SHOW(_otg_attr_name_,_string_) \ ++DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL); ++ ++#define DWC_OTG_DEVICE_ATTR_REG32_RW(_otg_attr_name_,_addr_,_string_) \ ++DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \ ++DWC_OTG_DEVICE_ATTR_REG_STORE(_otg_attr_name_,_string_) \ ++DEVICE_ATTR(_otg_attr_name_,0644,_otg_attr_name_##_show,_otg_attr_name_##_store); ++ ++#define DWC_OTG_DEVICE_ATTR_REG32_RO(_otg_attr_name_,_addr_,_string_) \ ++DWC_OTG_DEVICE_ATTR_REG_SHOW(_otg_attr_name_,_string_) \ ++DEVICE_ATTR(_otg_attr_name_,0444,_otg_attr_name_##_show,NULL); ++ ++/** @name Functions for Show/Store of Attributes */ ++/**@{*/ ++ ++/** ++ * Helper function returning the otg_device structure of the given device ++ */ ++static dwc_otg_device_t *dwc_otg_drvdev(struct device *_dev) ++{ ++ dwc_otg_device_t *otg_dev; ++ DWC_OTG_GETDRVDEV(otg_dev, _dev); ++ return otg_dev; ++} ++ ++/** ++ * Show the register offset of the Register Access. ++ */ ++static ssize_t regoffset_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return snprintf(buf, sizeof("0xFFFFFFFF\n") + 1, "0x%08x\n", ++ otg_dev->os_dep.reg_offset); ++} ++ ++/** ++ * Set the register offset for the next Register Access Read/Write ++ */ ++static ssize_t regoffset_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t offset = simple_strtoul(buf, NULL, 16); ++#if defined(LM_INTERFACE) || defined(PLATFORM_INTERFACE) ++ if (offset < SZ_256K) { ++#elif defined(PCI_INTERFACE) ++ if (offset < 0x00040000) { ++#endif ++ otg_dev->os_dep.reg_offset = offset; ++ } else { ++ dev_err(_dev, "invalid offset\n"); ++ } ++ ++ return count; ++} ++ ++DEVICE_ATTR(regoffset, S_IRUGO | S_IWUSR, regoffset_show, regoffset_store); ++ ++/** ++ * Show the value of the register at the offset in the reg_offset ++ * attribute. ++ */ ++static ssize_t regvalue_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t val; ++ volatile uint32_t *addr; ++ ++ if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) { ++ /* Calculate the address */ ++ addr = (uint32_t *) (otg_dev->os_dep.reg_offset + ++ (uint8_t *) otg_dev->os_dep.base); ++ val = DWC_READ_REG32(addr); ++ return snprintf(buf, ++ sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1, ++ "Reg@0x%06x = 0x%08x\n", otg_dev->os_dep.reg_offset, ++ val); ++ } else { ++ dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->os_dep.reg_offset); ++ return sprintf(buf, "invalid offset\n"); ++ } ++} ++ ++/** ++ * Store the value in the register at the offset in the reg_offset ++ * attribute. ++ * ++ */ ++static ssize_t regvalue_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ volatile uint32_t *addr; ++ uint32_t val = simple_strtoul(buf, NULL, 16); ++ //dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n", otg_dev->reg_offset, val); ++ if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) { ++ /* Calculate the address */ ++ addr = (uint32_t *) (otg_dev->os_dep.reg_offset + ++ (uint8_t *) otg_dev->os_dep.base); ++ DWC_WRITE_REG32(addr, val); ++ } else { ++ dev_err(_dev, "Invalid Register Offset (0x%08x)\n", ++ otg_dev->os_dep.reg_offset); ++ } ++ return count; ++} ++ ++DEVICE_ATTR(regvalue, S_IRUGO | S_IWUSR, regvalue_show, regvalue_store); ++ ++/* ++ * Attributes ++ */ ++DWC_OTG_DEVICE_ATTR_BITFIELD_RO(mode, "Mode"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hnpcapable, "HNPCapable"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RW(srpcapable, "SRPCapable"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hsic_connect, "HSIC Connect"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RW(inv_sel_hsic, "Invert Select HSIC"); ++ ++//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode"); ++//DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RO(busconnected, "Bus Connected"); ++ ++DWC_OTG_DEVICE_ATTR_REG32_RW(gotgctl, 0, "GOTGCTL"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(gusbcfg, ++ &(otg_dev->core_if->core_global_regs->gusbcfg), ++ "GUSBCFG"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(grxfsiz, ++ &(otg_dev->core_if->core_global_regs->grxfsiz), ++ "GRXFSIZ"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(gnptxfsiz, ++ &(otg_dev->core_if->core_global_regs->gnptxfsiz), ++ "GNPTXFSIZ"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(gpvndctl, ++ &(otg_dev->core_if->core_global_regs->gpvndctl), ++ "GPVNDCTL"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(ggpio, ++ &(otg_dev->core_if->core_global_regs->ggpio), ++ "GGPIO"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(guid, &(otg_dev->core_if->core_global_regs->guid), ++ "GUID"); ++DWC_OTG_DEVICE_ATTR_REG32_RO(gsnpsid, ++ &(otg_dev->core_if->core_global_regs->gsnpsid), ++ "GSNPSID"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RW(devspeed, "Device Speed"); ++DWC_OTG_DEVICE_ATTR_BITFIELD_RO(enumspeed, "Device Enumeration Speed"); ++ ++DWC_OTG_DEVICE_ATTR_REG32_RO(hptxfsiz, ++ &(otg_dev->core_if->core_global_regs->hptxfsiz), ++ "HPTXFSIZ"); ++DWC_OTG_DEVICE_ATTR_REG32_RW(hprt0, otg_dev->core_if->host_if->hprt0, "HPRT0"); ++ ++/** ++ * @todo Add code to initiate the HNP. ++ */ ++/** ++ * Show the HNP status bit ++ */ ++static ssize_t hnp_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "HstNegScs = 0x%x\n", ++ dwc_otg_get_hnpstatus(otg_dev->core_if)); ++} ++ ++/** ++ * Set the HNP Request bit ++ */ ++static ssize_t hnp_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t in = simple_strtoul(buf, NULL, 16); ++ dwc_otg_set_hnpreq(otg_dev->core_if, in); ++ return count; ++} ++ ++DEVICE_ATTR(hnp, 0644, hnp_show, hnp_store); ++ ++/** ++ * @todo Add code to initiate the SRP. ++ */ ++/** ++ * Show the SRP status bit ++ */ ++static ssize_t srp_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "SesReqScs = 0x%x\n", ++ dwc_otg_get_srpstatus(otg_dev->core_if)); ++#else ++ return sprintf(buf, "Host Only Mode!\n"); ++#endif ++} ++ ++/** ++ * Set the SRP Request bit ++ */ ++static ssize_t srp_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ dwc_otg_pcd_initiate_srp(otg_dev->pcd); ++#endif ++ return count; ++} ++ ++DEVICE_ATTR(srp, 0644, srp_show, srp_store); ++ ++/** ++ * @todo Need to do more for power on/off? ++ */ ++/** ++ * Show the Bus Power status ++ */ ++static ssize_t buspower_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "Bus Power = 0x%x\n", ++ dwc_otg_get_prtpower(otg_dev->core_if)); ++} ++ ++/** ++ * Set the Bus Power status ++ */ ++static ssize_t buspower_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t on = simple_strtoul(buf, NULL, 16); ++ dwc_otg_set_prtpower(otg_dev->core_if, on); ++ return count; ++} ++ ++DEVICE_ATTR(buspower, 0644, buspower_show, buspower_store); ++ ++/** ++ * @todo Need to do more for suspend? ++ */ ++/** ++ * Show the Bus Suspend status ++ */ ++static ssize_t bussuspend_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "Bus Suspend = 0x%x\n", ++ dwc_otg_get_prtsuspend(otg_dev->core_if)); ++} ++ ++/** ++ * Set the Bus Suspend status ++ */ ++static ssize_t bussuspend_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t in = simple_strtoul(buf, NULL, 16); ++ dwc_otg_set_prtsuspend(otg_dev->core_if, in); ++ return count; ++} ++ ++DEVICE_ATTR(bussuspend, 0644, bussuspend_show, bussuspend_store); ++ ++/** ++ * Show the Mode Change Ready Timer status ++ */ ++static ssize_t mode_ch_tim_en_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "Mode Change Ready Timer Enable = 0x%x\n", ++ dwc_otg_get_mode_ch_tim(otg_dev->core_if)); ++} ++ ++/** ++ * Set the Mode Change Ready Timer status ++ */ ++static ssize_t mode_ch_tim_en_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t in = simple_strtoul(buf, NULL, 16); ++ dwc_otg_set_mode_ch_tim(otg_dev->core_if, in); ++ return count; ++} ++ ++DEVICE_ATTR(mode_ch_tim_en, 0644, mode_ch_tim_en_show, mode_ch_tim_en_store); ++ ++/** ++ * Show the value of HFIR Frame Interval bitfield ++ */ ++static ssize_t fr_interval_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "Frame Interval = 0x%x\n", ++ dwc_otg_get_fr_interval(otg_dev->core_if)); ++} ++ ++/** ++ * Set the HFIR Frame Interval value ++ */ ++static ssize_t fr_interval_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t in = simple_strtoul(buf, NULL, 10); ++ dwc_otg_set_fr_interval(otg_dev->core_if, in); ++ return count; ++} ++ ++DEVICE_ATTR(fr_interval, 0644, fr_interval_show, fr_interval_store); ++ ++/** ++ * Show the status of Remote Wakeup. ++ */ ++static ssize_t remote_wakeup_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ return sprintf(buf, ++ "Remote Wakeup Sig = %d Enabled = %d LPM Remote Wakeup = %d\n", ++ dwc_otg_get_remotewakesig(otg_dev->core_if), ++ dwc_otg_pcd_get_rmwkup_enable(otg_dev->pcd), ++ dwc_otg_get_lpm_remotewakeenabled(otg_dev->core_if)); ++#else ++ return sprintf(buf, "Host Only Mode!\n"); ++#endif /* DWC_HOST_ONLY */ ++} ++ ++/** ++ * Initiate a remote wakeup of the host. The Device control register ++ * Remote Wakeup Signal bit is written if the PCD Remote wakeup enable ++ * flag is set. ++ * ++ */ ++static ssize_t remote_wakeup_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t val = simple_strtoul(buf, NULL, 16); ++ ++ if (val & 1) { ++ dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 1); ++ } else { ++ dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 0); ++ } ++#endif /* DWC_HOST_ONLY */ ++ return count; ++} ++ ++DEVICE_ATTR(remote_wakeup, S_IRUGO | S_IWUSR, remote_wakeup_show, ++ remote_wakeup_store); ++ ++/** ++ * Show the whether core is hibernated or not. ++ */ ++static ssize_t rem_wakeup_pwrdn_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ if (dwc_otg_get_core_state(otg_dev->core_if)) { ++ DWC_PRINTF("Core is in hibernation\n"); ++ } else { ++ DWC_PRINTF("Core is not in hibernation\n"); ++ } ++#endif /* DWC_HOST_ONLY */ ++ return 0; ++} ++ ++extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if, ++ int rem_wakeup, int reset); ++ ++/** ++ * Initiate a remote wakeup of the device to exit from hibernation. ++ */ ++static ssize_t rem_wakeup_pwrdn_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ dwc_otg_device_hibernation_restore(otg_dev->core_if, 1, 0); ++#endif ++ return count; ++} ++ ++DEVICE_ATTR(rem_wakeup_pwrdn, S_IRUGO | S_IWUSR, rem_wakeup_pwrdn_show, ++ rem_wakeup_pwrdn_store); ++ ++static ssize_t disconnect_us(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ ++#ifndef DWC_HOST_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t val = simple_strtoul(buf, NULL, 16); ++ DWC_PRINTF("The Passed value is %04x\n", val); ++ ++ dwc_otg_pcd_disconnect_us(otg_dev->pcd, 50); ++ ++#endif /* DWC_HOST_ONLY */ ++ return count; ++} ++ ++DEVICE_ATTR(disconnect_us, S_IWUSR, 0, disconnect_us); ++ ++/** ++ * Dump global registers and either host or device registers (depending on the ++ * current mode of the core). ++ */ ++static ssize_t regdump_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ dwc_otg_dump_global_registers(otg_dev->core_if); ++ if (dwc_otg_is_host_mode(otg_dev->core_if)) { ++ dwc_otg_dump_host_registers(otg_dev->core_if); ++ } else { ++ dwc_otg_dump_dev_registers(otg_dev->core_if); ++ ++ } ++ return sprintf(buf, "Register Dump\n"); ++} ++ ++DEVICE_ATTR(regdump, S_IRUGO | S_IWUSR, regdump_show, 0); ++ ++/** ++ * Dump global registers and either host or device registers (depending on the ++ * current mode of the core). ++ */ ++static ssize_t spramdump_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ dwc_otg_dump_spram(otg_dev->core_if); ++ ++ return sprintf(buf, "SPRAM Dump\n"); ++} ++ ++DEVICE_ATTR(spramdump, S_IRUGO | S_IWUSR, spramdump_show, 0); ++ ++/** ++ * Dump the current hcd state. ++ */ ++static ssize_t hcddump_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++#ifndef DWC_DEVICE_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ dwc_otg_hcd_dump_state(otg_dev->hcd); ++#endif /* DWC_DEVICE_ONLY */ ++ return sprintf(buf, "HCD Dump\n"); ++} ++ ++DEVICE_ATTR(hcddump, S_IRUGO | S_IWUSR, hcddump_show, 0); ++ ++/** ++ * Dump the average frame remaining at SOF. This can be used to ++ * determine average interrupt latency. Frame remaining is also shown for ++ * start transfer and two additional sample points. ++ */ ++static ssize_t hcd_frrem_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++#ifndef DWC_DEVICE_ONLY ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ dwc_otg_hcd_dump_frrem(otg_dev->hcd); ++#endif /* DWC_DEVICE_ONLY */ ++ return sprintf(buf, "HCD Dump Frame Remaining\n"); ++} ++ ++DEVICE_ATTR(hcd_frrem, S_IRUGO | S_IWUSR, hcd_frrem_show, 0); ++ ++/** ++ * Displays the time required to read the GNPTXFSIZ register many times (the ++ * output shows the number of times the register is read). ++ */ ++#define RW_REG_COUNT 10000000 ++#define MSEC_PER_JIFFIE 1000/HZ ++static ssize_t rd_reg_test_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ int i; ++ int time; ++ int start_jiffies; ++ ++ printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n", ++ HZ, MSEC_PER_JIFFIE, loops_per_jiffy); ++ start_jiffies = jiffies; ++ for (i = 0; i < RW_REG_COUNT; i++) { ++ dwc_otg_get_gnptxfsiz(otg_dev->core_if); ++ } ++ time = jiffies - start_jiffies; ++ return sprintf(buf, ++ "Time to read GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n", ++ RW_REG_COUNT, time * MSEC_PER_JIFFIE, time); ++} ++ ++DEVICE_ATTR(rd_reg_test, S_IRUGO | S_IWUSR, rd_reg_test_show, 0); ++ ++/** ++ * Displays the time required to write the GNPTXFSIZ register many times (the ++ * output shows the number of times the register is written). ++ */ ++static ssize_t wr_reg_test_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t reg_val; ++ int i; ++ int time; ++ int start_jiffies; ++ ++ printk("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n", ++ HZ, MSEC_PER_JIFFIE, loops_per_jiffy); ++ reg_val = dwc_otg_get_gnptxfsiz(otg_dev->core_if); ++ start_jiffies = jiffies; ++ for (i = 0; i < RW_REG_COUNT; i++) { ++ dwc_otg_set_gnptxfsiz(otg_dev->core_if, reg_val); ++ } ++ time = jiffies - start_jiffies; ++ return sprintf(buf, ++ "Time to write GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n", ++ RW_REG_COUNT, time * MSEC_PER_JIFFIE, time); ++} ++ ++DEVICE_ATTR(wr_reg_test, S_IRUGO | S_IWUSR, wr_reg_test_show, 0); ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ ++/** ++* Show the lpm_response attribute. ++*/ ++static ssize_t lpmresp_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ ++ if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) ++ return sprintf(buf, "** LPM is DISABLED **\n"); ++ ++ if (!dwc_otg_is_device_mode(otg_dev->core_if)) { ++ return sprintf(buf, "** Current mode is not device mode\n"); ++ } ++ return sprintf(buf, "lpm_response = %d\n", ++ dwc_otg_get_lpmresponse(otg_dev->core_if)); ++} ++ ++/** ++* Store the lpm_response attribute. ++*/ ++static ssize_t lpmresp_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ uint32_t val = simple_strtoul(buf, NULL, 16); ++ ++ if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if)) { ++ return 0; ++ } ++ ++ if (!dwc_otg_is_device_mode(otg_dev->core_if)) { ++ return 0; ++ } ++ ++ dwc_otg_set_lpmresponse(otg_dev->core_if, val); ++ return count; ++} ++ ++DEVICE_ATTR(lpm_response, S_IRUGO | S_IWUSR, lpmresp_show, lpmresp_store); ++ ++/** ++* Show the sleep_status attribute. ++*/ ++static ssize_t sleepstatus_show(struct device *_dev, ++ struct device_attribute *attr, char *buf) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ return sprintf(buf, "Sleep Status = %d\n", ++ dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if)); ++} ++ ++/** ++ * Store the sleep_status attribure. ++ */ ++static ssize_t sleepstatus_store(struct device *_dev, ++ struct device_attribute *attr, ++ const char *buf, size_t count) ++{ ++ dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); ++ dwc_otg_core_if_t *core_if = otg_dev->core_if; ++ ++ if (dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if)) { ++ if (dwc_otg_is_host_mode(core_if)) { ++ ++ DWC_PRINTF("Host initiated resume\n"); ++ dwc_otg_set_prtresume(otg_dev->core_if, 1); ++ } ++ } ++ ++ return count; ++} ++ ++DEVICE_ATTR(sleep_status, S_IRUGO | S_IWUSR, sleepstatus_show, ++ sleepstatus_store); ++ ++#endif /* CONFIG_USB_DWC_OTG_LPM_ENABLE */ ++ ++/**@}*/ ++ ++/** ++ * Create the device files ++ */ ++void dwc_otg_attr_create( ++#ifdef LM_INTERFACE ++ struct lm_device *dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ) ++{ ++ int error; ++ ++ error = device_create_file(&dev->dev, &dev_attr_regoffset); ++ error = device_create_file(&dev->dev, &dev_attr_regvalue); ++ error = device_create_file(&dev->dev, &dev_attr_mode); ++ error = device_create_file(&dev->dev, &dev_attr_hnpcapable); ++ error = device_create_file(&dev->dev, &dev_attr_srpcapable); ++ error = device_create_file(&dev->dev, &dev_attr_hsic_connect); ++ error = device_create_file(&dev->dev, &dev_attr_inv_sel_hsic); ++ error = device_create_file(&dev->dev, &dev_attr_hnp); ++ error = device_create_file(&dev->dev, &dev_attr_srp); ++ error = device_create_file(&dev->dev, &dev_attr_buspower); ++ error = device_create_file(&dev->dev, &dev_attr_bussuspend); ++ error = device_create_file(&dev->dev, &dev_attr_mode_ch_tim_en); ++ error = device_create_file(&dev->dev, &dev_attr_fr_interval); ++ error = device_create_file(&dev->dev, &dev_attr_busconnected); ++ error = device_create_file(&dev->dev, &dev_attr_gotgctl); ++ error = device_create_file(&dev->dev, &dev_attr_gusbcfg); ++ error = device_create_file(&dev->dev, &dev_attr_grxfsiz); ++ error = device_create_file(&dev->dev, &dev_attr_gnptxfsiz); ++ error = device_create_file(&dev->dev, &dev_attr_gpvndctl); ++ error = device_create_file(&dev->dev, &dev_attr_ggpio); ++ error = device_create_file(&dev->dev, &dev_attr_guid); ++ error = device_create_file(&dev->dev, &dev_attr_gsnpsid); ++ error = device_create_file(&dev->dev, &dev_attr_devspeed); ++ error = device_create_file(&dev->dev, &dev_attr_enumspeed); ++ error = device_create_file(&dev->dev, &dev_attr_hptxfsiz); ++ error = device_create_file(&dev->dev, &dev_attr_hprt0); ++ error = device_create_file(&dev->dev, &dev_attr_remote_wakeup); ++ error = device_create_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn); ++ error = device_create_file(&dev->dev, &dev_attr_disconnect_us); ++ error = device_create_file(&dev->dev, &dev_attr_regdump); ++ error = device_create_file(&dev->dev, &dev_attr_spramdump); ++ error = device_create_file(&dev->dev, &dev_attr_hcddump); ++ error = device_create_file(&dev->dev, &dev_attr_hcd_frrem); ++ error = device_create_file(&dev->dev, &dev_attr_rd_reg_test); ++ error = device_create_file(&dev->dev, &dev_attr_wr_reg_test); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ error = device_create_file(&dev->dev, &dev_attr_lpm_response); ++ error = device_create_file(&dev->dev, &dev_attr_sleep_status); ++#endif ++} ++ ++/** ++ * Remove the device files ++ */ ++void dwc_otg_attr_remove( ++#ifdef LM_INTERFACE ++ struct lm_device *dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ) ++{ ++ device_remove_file(&dev->dev, &dev_attr_regoffset); ++ device_remove_file(&dev->dev, &dev_attr_regvalue); ++ device_remove_file(&dev->dev, &dev_attr_mode); ++ device_remove_file(&dev->dev, &dev_attr_hnpcapable); ++ device_remove_file(&dev->dev, &dev_attr_srpcapable); ++ device_remove_file(&dev->dev, &dev_attr_hsic_connect); ++ device_remove_file(&dev->dev, &dev_attr_inv_sel_hsic); ++ device_remove_file(&dev->dev, &dev_attr_hnp); ++ device_remove_file(&dev->dev, &dev_attr_srp); ++ device_remove_file(&dev->dev, &dev_attr_buspower); ++ device_remove_file(&dev->dev, &dev_attr_bussuspend); ++ device_remove_file(&dev->dev, &dev_attr_mode_ch_tim_en); ++ device_remove_file(&dev->dev, &dev_attr_fr_interval); ++ device_remove_file(&dev->dev, &dev_attr_busconnected); ++ device_remove_file(&dev->dev, &dev_attr_gotgctl); ++ device_remove_file(&dev->dev, &dev_attr_gusbcfg); ++ device_remove_file(&dev->dev, &dev_attr_grxfsiz); ++ device_remove_file(&dev->dev, &dev_attr_gnptxfsiz); ++ device_remove_file(&dev->dev, &dev_attr_gpvndctl); ++ device_remove_file(&dev->dev, &dev_attr_ggpio); ++ device_remove_file(&dev->dev, &dev_attr_guid); ++ device_remove_file(&dev->dev, &dev_attr_gsnpsid); ++ device_remove_file(&dev->dev, &dev_attr_devspeed); ++ device_remove_file(&dev->dev, &dev_attr_enumspeed); ++ device_remove_file(&dev->dev, &dev_attr_hptxfsiz); ++ device_remove_file(&dev->dev, &dev_attr_hprt0); ++ device_remove_file(&dev->dev, &dev_attr_remote_wakeup); ++ device_remove_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn); ++ device_remove_file(&dev->dev, &dev_attr_disconnect_us); ++ device_remove_file(&dev->dev, &dev_attr_regdump); ++ device_remove_file(&dev->dev, &dev_attr_spramdump); ++ device_remove_file(&dev->dev, &dev_attr_hcddump); ++ device_remove_file(&dev->dev, &dev_attr_hcd_frrem); ++ device_remove_file(&dev->dev, &dev_attr_rd_reg_test); ++ device_remove_file(&dev->dev, &dev_attr_wr_reg_test); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ device_remove_file(&dev->dev, &dev_attr_lpm_response); ++ device_remove_file(&dev->dev, &dev_attr_sleep_status); ++#endif ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,89 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_attr.h $ ++ * $Revision: #13 $ ++ * $Date: 2010/06/21 $ ++ * $Change: 1532021 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#if !defined(__DWC_OTG_ATTR_H__) ++#define __DWC_OTG_ATTR_H__ ++ ++/** @file ++ * This file contains the interface to the Linux device attributes. ++ */ ++extern struct device_attribute dev_attr_regoffset; ++extern struct device_attribute dev_attr_regvalue; ++ ++extern struct device_attribute dev_attr_mode; ++extern struct device_attribute dev_attr_hnpcapable; ++extern struct device_attribute dev_attr_srpcapable; ++extern struct device_attribute dev_attr_hnp; ++extern struct device_attribute dev_attr_srp; ++extern struct device_attribute dev_attr_buspower; ++extern struct device_attribute dev_attr_bussuspend; ++extern struct device_attribute dev_attr_mode_ch_tim_en; ++extern struct device_attribute dev_attr_fr_interval; ++extern struct device_attribute dev_attr_busconnected; ++extern struct device_attribute dev_attr_gotgctl; ++extern struct device_attribute dev_attr_gusbcfg; ++extern struct device_attribute dev_attr_grxfsiz; ++extern struct device_attribute dev_attr_gnptxfsiz; ++extern struct device_attribute dev_attr_gpvndctl; ++extern struct device_attribute dev_attr_ggpio; ++extern struct device_attribute dev_attr_guid; ++extern struct device_attribute dev_attr_gsnpsid; ++extern struct device_attribute dev_attr_devspeed; ++extern struct device_attribute dev_attr_enumspeed; ++extern struct device_attribute dev_attr_hptxfsiz; ++extern struct device_attribute dev_attr_hprt0; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++extern struct device_attribute dev_attr_lpm_response; ++extern struct device_attribute devi_attr_sleep_status; ++#endif ++ ++void dwc_otg_attr_create( ++#ifdef LM_INTERFACE ++ struct lm_device *dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ); ++ ++void dwc_otg_attr_remove( ++#ifdef LM_INTERFACE ++ struct lm_device *dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ); ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cfi.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cfi.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1876 @@ ++/* ========================================================================== ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++/** @file ++ * ++ * This file contains the most of the CFI(Core Feature Interface) ++ * implementation for the OTG. ++ */ ++ ++#ifdef DWC_UTE_CFI ++ ++#include "dwc_otg_pcd.h" ++#include "dwc_otg_cfi.h" ++ ++/** This definition should actually migrate to the Portability Library */ ++#define DWC_CONSTANT_CPU_TO_LE16(x) (x) ++ ++extern dwc_otg_pcd_ep_t *get_ep_by_addr(dwc_otg_pcd_t * pcd, u16 wIndex); ++ ++static int cfi_core_features_buf(uint8_t * buf, uint16_t buflen); ++static int cfi_get_feature_value(uint8_t * buf, uint16_t buflen, ++ struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *ctrl_req); ++static int cfi_set_feature_value(struct dwc_otg_pcd *pcd); ++static int cfi_ep_get_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req); ++static int cfi_ep_get_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req); ++static int cfi_ep_get_align_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req); ++static int cfi_preproc_reset(struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req); ++static void cfi_free_ep_bs_dyn_data(cfi_ep_t * cfiep); ++ ++static uint16_t get_dfifo_size(dwc_otg_core_if_t * core_if); ++static int32_t get_rxfifo_size(dwc_otg_core_if_t * core_if, uint16_t wValue); ++static int32_t get_txfifo_size(struct dwc_otg_pcd *pcd, uint16_t wValue); ++ ++static uint8_t resize_fifos(dwc_otg_core_if_t * core_if); ++ ++/** This is the header of the all features descriptor */ ++static cfi_all_features_header_t all_props_desc_header = { ++ .wVersion = DWC_CONSTANT_CPU_TO_LE16(0x100), ++ .wCoreID = DWC_CONSTANT_CPU_TO_LE16(CFI_CORE_ID_OTG), ++ .wNumFeatures = DWC_CONSTANT_CPU_TO_LE16(9), ++}; ++ ++/** This is an array of statically allocated feature descriptors */ ++static cfi_feature_desc_header_t prop_descs[] = { ++ ++ /* FT_ID_DMA_MODE */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_MODE), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(1), ++ }, ++ ++ /* FT_ID_DMA_BUFFER_SETUP */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_BUFFER_SETUP), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6), ++ }, ++ ++ /* FT_ID_DMA_BUFF_ALIGN */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_BUFF_ALIGN), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2), ++ }, ++ ++ /* FT_ID_DMA_CONCAT_SETUP */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_CONCAT_SETUP), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ //.wDataLength = DWC_CONSTANT_CPU_TO_LE16(6), ++ }, ++ ++ /* FT_ID_DMA_CIRCULAR */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DMA_CIRCULAR), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6), ++ }, ++ ++ /* FT_ID_THRESHOLD_SETUP */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_THRESHOLD_SETUP), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(6), ++ }, ++ ++ /* FT_ID_DFIFO_DEPTH */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_DFIFO_DEPTH), ++ .bmAttributes = CFI_FEATURE_ATTR_RO, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2), ++ }, ++ ++ /* FT_ID_TX_FIFO_DEPTH */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_TX_FIFO_DEPTH), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2), ++ }, ++ ++ /* FT_ID_RX_FIFO_DEPTH */ ++ { ++ .wFeatureID = DWC_CONSTANT_CPU_TO_LE16(FT_ID_RX_FIFO_DEPTH), ++ .bmAttributes = CFI_FEATURE_ATTR_RW, ++ .wDataLength = DWC_CONSTANT_CPU_TO_LE16(2), ++ } ++}; ++ ++/** The table of feature names */ ++cfi_string_t prop_name_table[] = { ++ {FT_ID_DMA_MODE, "dma_mode"}, ++ {FT_ID_DMA_BUFFER_SETUP, "buffer_setup"}, ++ {FT_ID_DMA_BUFF_ALIGN, "buffer_align"}, ++ {FT_ID_DMA_CONCAT_SETUP, "concat_setup"}, ++ {FT_ID_DMA_CIRCULAR, "buffer_circular"}, ++ {FT_ID_THRESHOLD_SETUP, "threshold_setup"}, ++ {FT_ID_DFIFO_DEPTH, "dfifo_depth"}, ++ {FT_ID_TX_FIFO_DEPTH, "txfifo_depth"}, ++ {FT_ID_RX_FIFO_DEPTH, "rxfifo_depth"}, ++ {} ++}; ++ ++/************************************************************************/ ++ ++/** ++ * Returns the name of the feature by its ID ++ * or NULL if no featute ID matches. ++ * ++ */ ++const uint8_t *get_prop_name(uint16_t prop_id, int *len) ++{ ++ cfi_string_t *pstr; ++ *len = 0; ++ ++ for (pstr = prop_name_table; pstr && pstr->s; pstr++) { ++ if (pstr->id == prop_id) { ++ *len = DWC_STRLEN(pstr->s); ++ return pstr->s; ++ } ++ } ++ return NULL; ++} ++ ++/** ++ * This function handles all CFI specific control requests. ++ * ++ * Return a negative value to stall the DCE. ++ */ ++int cfi_setup(struct dwc_otg_pcd *pcd, struct cfi_usb_ctrlrequest *ctrl) ++{ ++ int retval = 0; ++ dwc_otg_pcd_ep_t *ep = NULL; ++ cfiobject_t *cfi = pcd->cfi; ++ struct dwc_otg_core_if *coreif = GET_CORE_IF(pcd); ++ uint16_t wLen = DWC_LE16_TO_CPU(&ctrl->wLength); ++ uint16_t wValue = DWC_LE16_TO_CPU(&ctrl->wValue); ++ uint16_t wIndex = DWC_LE16_TO_CPU(&ctrl->wIndex); ++ uint32_t regaddr = 0; ++ uint32_t regval = 0; ++ ++ /* Save this Control Request in the CFI object. ++ * The data field will be assigned in the data stage completion CB function. ++ */ ++ cfi->ctrl_req = *ctrl; ++ cfi->ctrl_req.data = NULL; ++ ++ cfi->need_gadget_att = 0; ++ cfi->need_status_in_complete = 0; ++ ++ switch (ctrl->bRequest) { ++ case VEN_CORE_GET_FEATURES: ++ retval = cfi_core_features_buf(cfi->buf_in.buf, CFI_IN_BUF_LEN); ++ if (retval >= 0) { ++ //dump_msg(cfi->buf_in.buf, retval); ++ ep = &pcd->ep0; ++ ++ retval = min((uint16_t) retval, wLen); ++ /* Transfer this buffer to the host through the EP0-IN EP */ ++ ep->dwc_ep.dma_addr = cfi->buf_in.addr; ++ ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_len = retval; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ pcd->ep0_pending = 1; ++ dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep); ++ } ++ retval = 0; ++ break; ++ ++ case VEN_CORE_GET_FEATURE: ++ CFI_INFO("VEN_CORE_GET_FEATURE\n"); ++ retval = cfi_get_feature_value(cfi->buf_in.buf, CFI_IN_BUF_LEN, ++ pcd, ctrl); ++ if (retval >= 0) { ++ ep = &pcd->ep0; ++ ++ retval = min((uint16_t) retval, wLen); ++ /* Transfer this buffer to the host through the EP0-IN EP */ ++ ep->dwc_ep.dma_addr = cfi->buf_in.addr; ++ ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_len = retval; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ pcd->ep0_pending = 1; ++ dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep); ++ } ++ CFI_INFO("VEN_CORE_GET_FEATURE=%d\n", retval); ++ dump_msg(cfi->buf_in.buf, retval); ++ break; ++ ++ case VEN_CORE_SET_FEATURE: ++ CFI_INFO("VEN_CORE_SET_FEATURE\n"); ++ /* Set up an XFER to get the data stage of the control request, ++ * which is the new value of the feature to be modified. ++ */ ++ ep = &pcd->ep0; ++ ep->dwc_ep.is_in = 0; ++ ep->dwc_ep.dma_addr = cfi->buf_out.addr; ++ ep->dwc_ep.start_xfer_buff = cfi->buf_out.buf; ++ ep->dwc_ep.xfer_buff = cfi->buf_out.buf; ++ ep->dwc_ep.xfer_len = wLen; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ pcd->ep0_pending = 1; ++ /* Read the control write's data stage */ ++ dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep); ++ retval = 0; ++ break; ++ ++ case VEN_CORE_RESET_FEATURES: ++ CFI_INFO("VEN_CORE_RESET_FEATURES\n"); ++ cfi->need_gadget_att = 1; ++ cfi->need_status_in_complete = 1; ++ retval = cfi_preproc_reset(pcd, ctrl); ++ CFI_INFO("VEN_CORE_RESET_FEATURES = (%d)\n", retval); ++ break; ++ ++ case VEN_CORE_ACTIVATE_FEATURES: ++ CFI_INFO("VEN_CORE_ACTIVATE_FEATURES\n"); ++ break; ++ ++ case VEN_CORE_READ_REGISTER: ++ CFI_INFO("VEN_CORE_READ_REGISTER\n"); ++ /* wValue optionally contains the HI WORD of the register offset and ++ * wIndex contains the LOW WORD of the register offset ++ */ ++ if (wValue == 0) { ++ /* @TODO - MAS - fix the access to the base field */ ++ regaddr = 0; ++ //regaddr = (uint32_t) pcd->otg_dev->os_dep.base; ++ //GET_CORE_IF(pcd)->co ++ regaddr |= wIndex; ++ } else { ++ regaddr = (wValue << 16) | wIndex; ++ } ++ ++ /* Read a 32-bit value of the memory at the regaddr */ ++ regval = DWC_READ_REG32((uint32_t *) regaddr); ++ ++ ep = &pcd->ep0; ++ dwc_memcpy(cfi->buf_in.buf, ®val, sizeof(uint32_t)); ++ ep->dwc_ep.is_in = 1; ++ ep->dwc_ep.dma_addr = cfi->buf_in.addr; ++ ep->dwc_ep.start_xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_buff = cfi->buf_in.buf; ++ ep->dwc_ep.xfer_len = wLen; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ pcd->ep0_pending = 1; ++ dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep); ++ cfi->need_gadget_att = 0; ++ retval = 0; ++ break; ++ ++ case VEN_CORE_WRITE_REGISTER: ++ CFI_INFO("VEN_CORE_WRITE_REGISTER\n"); ++ /* Set up an XFER to get the data stage of the control request, ++ * which is the new value of the register to be modified. ++ */ ++ ep = &pcd->ep0; ++ ep->dwc_ep.is_in = 0; ++ ep->dwc_ep.dma_addr = cfi->buf_out.addr; ++ ep->dwc_ep.start_xfer_buff = cfi->buf_out.buf; ++ ep->dwc_ep.xfer_buff = cfi->buf_out.buf; ++ ep->dwc_ep.xfer_len = wLen; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ pcd->ep0_pending = 1; ++ /* Read the control write's data stage */ ++ dwc_otg_ep0_start_transfer(coreif, &ep->dwc_ep); ++ retval = 0; ++ break; ++ ++ default: ++ retval = -DWC_E_NOT_SUPPORTED; ++ break; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function prepares the core features descriptors and copies its ++ * raw representation into the buffer . ++ * ++ * The buffer structure is as follows: ++ * all_features_header (8 bytes) ++ * features_#1 (8 bytes + feature name string length) ++ * features_#2 (8 bytes + feature name string length) ++ * ..... ++ * features_#n - where n=the total count of feature descriptors ++ */ ++static int cfi_core_features_buf(uint8_t * buf, uint16_t buflen) ++{ ++ cfi_feature_desc_header_t *prop_hdr = prop_descs; ++ cfi_feature_desc_header_t *prop; ++ cfi_all_features_header_t *all_props_hdr = &all_props_desc_header; ++ cfi_all_features_header_t *tmp; ++ uint8_t *tmpbuf = buf; ++ const uint8_t *pname = NULL; ++ int i, j, namelen = 0, totlen; ++ ++ /* Prepare and copy the core features into the buffer */ ++ CFI_INFO("%s:\n", __func__); ++ ++ tmp = (cfi_all_features_header_t *) tmpbuf; ++ *tmp = *all_props_hdr; ++ tmpbuf += CFI_ALL_FEATURES_HDR_LEN; ++ ++ j = sizeof(prop_descs) / sizeof(cfi_all_features_header_t); ++ for (i = 0; i < j; i++, prop_hdr++) { ++ pname = get_prop_name(prop_hdr->wFeatureID, &namelen); ++ prop = (cfi_feature_desc_header_t *) tmpbuf; ++ *prop = *prop_hdr; ++ ++ prop->bNameLen = namelen; ++ prop->wLength = ++ DWC_CONSTANT_CPU_TO_LE16(CFI_FEATURE_DESC_HDR_LEN + ++ namelen); ++ ++ tmpbuf += CFI_FEATURE_DESC_HDR_LEN; ++ dwc_memcpy(tmpbuf, pname, namelen); ++ tmpbuf += namelen; ++ } ++ ++ totlen = tmpbuf - buf; ++ ++ if (totlen > 0) { ++ tmp = (cfi_all_features_header_t *) buf; ++ tmp->wTotalLen = DWC_CONSTANT_CPU_TO_LE16(totlen); ++ } ++ ++ return totlen; ++} ++ ++/** ++ * This function releases all the dynamic memory in the CFI object. ++ */ ++static void cfi_release(cfiobject_t * cfiobj) ++{ ++ cfi_ep_t *cfiep; ++ dwc_list_link_t *tmp; ++ ++ CFI_INFO("%s\n", __func__); ++ ++ if (cfiobj->buf_in.buf) { ++ DWC_DMA_FREE(CFI_IN_BUF_LEN, cfiobj->buf_in.buf, ++ cfiobj->buf_in.addr); ++ cfiobj->buf_in.buf = NULL; ++ } ++ ++ if (cfiobj->buf_out.buf) { ++ DWC_DMA_FREE(CFI_OUT_BUF_LEN, cfiobj->buf_out.buf, ++ cfiobj->buf_out.addr); ++ cfiobj->buf_out.buf = NULL; ++ } ++ ++ /* Free the Buffer Setup values for each EP */ ++ //list_for_each_entry(cfiep, &cfiobj->active_eps, lh) { ++ DWC_LIST_FOREACH(tmp, &cfiobj->active_eps) { ++ cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ cfi_free_ep_bs_dyn_data(cfiep); ++ } ++} ++ ++/** ++ * This function frees the dynamically allocated EP buffer setup data. ++ */ ++static void cfi_free_ep_bs_dyn_data(cfi_ep_t * cfiep) ++{ ++ if (cfiep->bm_sg) { ++ DWC_FREE(cfiep->bm_sg); ++ cfiep->bm_sg = NULL; ++ } ++ ++ if (cfiep->bm_align) { ++ DWC_FREE(cfiep->bm_align); ++ cfiep->bm_align = NULL; ++ } ++ ++ if (cfiep->bm_concat) { ++ if (NULL != cfiep->bm_concat->wTxBytes) { ++ DWC_FREE(cfiep->bm_concat->wTxBytes); ++ cfiep->bm_concat->wTxBytes = NULL; ++ } ++ DWC_FREE(cfiep->bm_concat); ++ cfiep->bm_concat = NULL; ++ } ++} ++ ++/** ++ * This function initializes the default values of the features ++ * for a specific endpoint and should be called only once when ++ * the EP is enabled first time. ++ */ ++static int cfi_ep_init_defaults(struct dwc_otg_pcd *pcd, cfi_ep_t * cfiep) ++{ ++ int retval = 0; ++ ++ cfiep->bm_sg = DWC_ALLOC(sizeof(ddma_sg_buffer_setup_t)); ++ if (NULL == cfiep->bm_sg) { ++ CFI_INFO("Failed to allocate memory for SG feature value\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++ dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t)); ++ ++ /* For the Concatenation feature's default value we do not allocate ++ * memory for the wTxBytes field - it will be done in the set_feature_value ++ * request handler. ++ */ ++ cfiep->bm_concat = DWC_ALLOC(sizeof(ddma_concat_buffer_setup_t)); ++ if (NULL == cfiep->bm_concat) { ++ CFI_INFO ++ ("Failed to allocate memory for CONCATENATION feature value\n"); ++ DWC_FREE(cfiep->bm_sg); ++ return -DWC_E_NO_MEMORY; ++ } ++ dwc_memset(cfiep->bm_concat, 0, sizeof(ddma_concat_buffer_setup_t)); ++ ++ cfiep->bm_align = DWC_ALLOC(sizeof(ddma_align_buffer_setup_t)); ++ if (NULL == cfiep->bm_align) { ++ CFI_INFO ++ ("Failed to allocate memory for Alignment feature value\n"); ++ DWC_FREE(cfiep->bm_sg); ++ DWC_FREE(cfiep->bm_concat); ++ return -DWC_E_NO_MEMORY; ++ } ++ dwc_memset(cfiep->bm_align, 0, sizeof(ddma_align_buffer_setup_t)); ++ ++ return retval; ++} ++ ++/** ++ * The callback function that notifies the CFI on the activation of ++ * an endpoint in the PCD. The following steps are done in this function: ++ * ++ * Create a dynamically allocated cfi_ep_t object (a CFI wrapper to the PCD's ++ * active endpoint) ++ * Create MAX_DMA_DESCS_PER_EP count DMA Descriptors for the EP ++ * Set the Buffer Mode to standard ++ * Initialize the default values for all EP modes (SG, Circular, Concat, Align) ++ * Add the cfi_ep_t object to the list of active endpoints in the CFI object ++ */ ++static int cfi_ep_enable(struct cfiobject *cfi, struct dwc_otg_pcd *pcd, ++ struct dwc_otg_pcd_ep *ep) ++{ ++ cfi_ep_t *cfiep; ++ int retval = -DWC_E_NOT_SUPPORTED; ++ ++ CFI_INFO("%s: epname=%s; epnum=0x%02x\n", __func__, ++ "EP_" /*ep->ep.name */ , ep->desc->bEndpointAddress); ++ /* MAS - Check whether this endpoint already is in the list */ ++ cfiep = get_cfi_ep_by_pcd_ep(cfi, ep); ++ ++ if (NULL == cfiep) { ++ /* Allocate a cfi_ep_t object */ ++ cfiep = DWC_ALLOC(sizeof(cfi_ep_t)); ++ if (NULL == cfiep) { ++ CFI_INFO ++ ("Unable to allocate memory for in function %s\n", ++ __func__); ++ return -DWC_E_NO_MEMORY; ++ } ++ dwc_memset(cfiep, 0, sizeof(cfi_ep_t)); ++ ++ /* Save the dwc_otg_pcd_ep pointer in the cfiep object */ ++ cfiep->ep = ep; ++ ++ /* Allocate the DMA Descriptors chain of MAX_DMA_DESCS_PER_EP count */ ++ ep->dwc_ep.descs = ++ DWC_DMA_ALLOC(MAX_DMA_DESCS_PER_EP * ++ sizeof(dwc_otg_dma_desc_t), ++ &ep->dwc_ep.descs_dma_addr); ++ ++ if (NULL == ep->dwc_ep.descs) { ++ DWC_FREE(cfiep); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ DWC_LIST_INIT(&cfiep->lh); ++ ++ /* Set the buffer mode to BM_STANDARD. It will be modified ++ * when building descriptors for a specific buffer mode */ ++ ep->dwc_ep.buff_mode = BM_STANDARD; ++ ++ /* Create and initialize the default values for this EP's Buffer modes */ ++ if ((retval = cfi_ep_init_defaults(pcd, cfiep)) < 0) ++ return retval; ++ ++ /* Add the cfi_ep_t object to the CFI object's list of active endpoints */ ++ DWC_LIST_INSERT_TAIL(&cfi->active_eps, &cfiep->lh); ++ retval = 0; ++ } else { /* The sought EP already is in the list */ ++ CFI_INFO("%s: The sought EP already is in the list\n", ++ __func__); ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function is called when the data stage of a 3-stage Control Write request ++ * is complete. ++ * ++ */ ++static int cfi_ctrl_write_complete(struct cfiobject *cfi, ++ struct dwc_otg_pcd *pcd) ++{ ++ uint32_t addr, reg_value; ++ uint16_t wIndex, wValue; ++ uint8_t bRequest; ++ uint8_t *buf = cfi->buf_out.buf; ++ //struct usb_ctrlrequest *ctrl_req = &cfi->ctrl_req_saved; ++ struct cfi_usb_ctrlrequest *ctrl_req = &cfi->ctrl_req; ++ int retval = -DWC_E_NOT_SUPPORTED; ++ ++ CFI_INFO("%s\n", __func__); ++ ++ bRequest = ctrl_req->bRequest; ++ wIndex = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wIndex); ++ wValue = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wValue); ++ ++ /* ++ * Save the pointer to the data stage in the ctrl_req's field. ++ * The request should be already saved in the command stage by now. ++ */ ++ ctrl_req->data = cfi->buf_out.buf; ++ cfi->need_status_in_complete = 0; ++ cfi->need_gadget_att = 0; ++ ++ switch (bRequest) { ++ case VEN_CORE_WRITE_REGISTER: ++ /* The buffer contains raw data of the new value for the register */ ++ reg_value = *((uint32_t *) buf); ++ if (wValue == 0) { ++ addr = 0; ++ //addr = (uint32_t) pcd->otg_dev->os_dep.base; ++ addr += wIndex; ++ } else { ++ addr = (wValue << 16) | wIndex; ++ } ++ ++ //writel(reg_value, addr); ++ ++ retval = 0; ++ cfi->need_status_in_complete = 1; ++ break; ++ ++ case VEN_CORE_SET_FEATURE: ++ /* The buffer contains raw data of the new value of the feature */ ++ retval = cfi_set_feature_value(pcd); ++ if (retval < 0) ++ return retval; ++ ++ cfi->need_status_in_complete = 1; ++ break; ++ ++ default: ++ break; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function builds the DMA descriptors for the SG buffer mode. ++ */ ++static void cfi_build_sg_descs(struct cfiobject *cfi, cfi_ep_t * cfiep, ++ dwc_otg_pcd_request_t * req) ++{ ++ struct dwc_otg_pcd_ep *ep = cfiep->ep; ++ ddma_sg_buffer_setup_t *sgval = cfiep->bm_sg; ++ struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs; ++ struct dwc_otg_dma_desc *desc_last = cfiep->ep->dwc_ep.descs; ++ dma_addr_t buff_addr = req->dma; ++ int i; ++ uint32_t txsize, off; ++ ++ txsize = sgval->wSize; ++ off = sgval->bOffset; ++ ++// CFI_INFO("%s: %s TXSIZE=0x%08x; OFFSET=0x%08x\n", ++// __func__, cfiep->ep->ep.name, txsize, off); ++ ++ for (i = 0; i < sgval->bCount; i++) { ++ desc->status.b.bs = BS_HOST_BUSY; ++ desc->buf = buff_addr; ++ desc->status.b.l = 0; ++ desc->status.b.ioc = 0; ++ desc->status.b.sp = 0; ++ desc->status.b.bytes = txsize; ++ desc->status.b.bs = BS_HOST_READY; ++ ++ /* Set the next address of the buffer */ ++ buff_addr += txsize + off; ++ desc_last = desc; ++ desc++; ++ } ++ ++ /* Set the last, ioc and sp bits on the Last DMA Descriptor */ ++ desc_last->status.b.l = 1; ++ desc_last->status.b.ioc = 1; ++ desc_last->status.b.sp = ep->dwc_ep.sent_zlp; ++ /* Save the last DMA descriptor pointer */ ++ cfiep->dma_desc_last = desc_last; ++ cfiep->desc_count = sgval->bCount; ++} ++ ++/** ++ * This function builds the DMA descriptors for the Concatenation buffer mode. ++ */ ++static void cfi_build_concat_descs(struct cfiobject *cfi, cfi_ep_t * cfiep, ++ dwc_otg_pcd_request_t * req) ++{ ++ struct dwc_otg_pcd_ep *ep = cfiep->ep; ++ ddma_concat_buffer_setup_t *concatval = cfiep->bm_concat; ++ struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs; ++ struct dwc_otg_dma_desc *desc_last = cfiep->ep->dwc_ep.descs; ++ dma_addr_t buff_addr = req->dma; ++ int i; ++ uint16_t *txsize; ++ ++ txsize = concatval->wTxBytes; ++ ++ for (i = 0; i < concatval->hdr.bDescCount; i++) { ++ desc->buf = buff_addr; ++ desc->status.b.bs = BS_HOST_BUSY; ++ desc->status.b.l = 0; ++ desc->status.b.ioc = 0; ++ desc->status.b.sp = 0; ++ desc->status.b.bytes = *txsize; ++ desc->status.b.bs = BS_HOST_READY; ++ ++ txsize++; ++ /* Set the next address of the buffer */ ++ buff_addr += UGETW(ep->desc->wMaxPacketSize); ++ desc_last = desc; ++ desc++; ++ } ++ ++ /* Set the last, ioc and sp bits on the Last DMA Descriptor */ ++ desc_last->status.b.l = 1; ++ desc_last->status.b.ioc = 1; ++ desc_last->status.b.sp = ep->dwc_ep.sent_zlp; ++ cfiep->dma_desc_last = desc_last; ++ cfiep->desc_count = concatval->hdr.bDescCount; ++} ++ ++/** ++ * This function builds the DMA descriptors for the Circular buffer mode ++ */ ++static void cfi_build_circ_descs(struct cfiobject *cfi, cfi_ep_t * cfiep, ++ dwc_otg_pcd_request_t * req) ++{ ++ /* @todo: MAS - add implementation when this feature needs to be tested */ ++} ++ ++/** ++ * This function builds the DMA descriptors for the Alignment buffer mode ++ */ ++static void cfi_build_align_descs(struct cfiobject *cfi, cfi_ep_t * cfiep, ++ dwc_otg_pcd_request_t * req) ++{ ++ struct dwc_otg_pcd_ep *ep = cfiep->ep; ++ ddma_align_buffer_setup_t *alignval = cfiep->bm_align; ++ struct dwc_otg_dma_desc *desc = cfiep->ep->dwc_ep.descs; ++ dma_addr_t buff_addr = req->dma; ++ ++ desc->status.b.bs = BS_HOST_BUSY; ++ desc->status.b.l = 1; ++ desc->status.b.ioc = 1; ++ desc->status.b.sp = ep->dwc_ep.sent_zlp; ++ desc->status.b.bytes = req->length; ++ /* Adjust the buffer alignment */ ++ desc->buf = (buff_addr + alignval->bAlign); ++ desc->status.b.bs = BS_HOST_READY; ++ cfiep->dma_desc_last = desc; ++ cfiep->desc_count = 1; ++} ++ ++/** ++ * This function builds the DMA descriptors chain for different modes of the ++ * buffer setup of an endpoint. ++ */ ++static void cfi_build_descriptors(struct cfiobject *cfi, ++ struct dwc_otg_pcd *pcd, ++ struct dwc_otg_pcd_ep *ep, ++ dwc_otg_pcd_request_t * req) ++{ ++ cfi_ep_t *cfiep; ++ ++ /* Get the cfiep by the dwc_otg_pcd_ep */ ++ cfiep = get_cfi_ep_by_pcd_ep(cfi, ep); ++ if (NULL == cfiep) { ++ CFI_INFO("%s: Unable to find a matching active endpoint\n", ++ __func__); ++ return; ++ } ++ ++ cfiep->xfer_len = req->length; ++ ++ /* Iterate through all the DMA descriptors */ ++ switch (cfiep->ep->dwc_ep.buff_mode) { ++ case BM_SG: ++ cfi_build_sg_descs(cfi, cfiep, req); ++ break; ++ ++ case BM_CONCAT: ++ cfi_build_concat_descs(cfi, cfiep, req); ++ break; ++ ++ case BM_CIRCULAR: ++ cfi_build_circ_descs(cfi, cfiep, req); ++ break; ++ ++ case BM_ALIGN: ++ cfi_build_align_descs(cfi, cfiep, req); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++/** ++ * Allocate DMA buffer for different Buffer modes. ++ */ ++static void *cfi_ep_alloc_buf(struct cfiobject *cfi, struct dwc_otg_pcd *pcd, ++ struct dwc_otg_pcd_ep *ep, dma_addr_t * dma, ++ unsigned size, gfp_t flags) ++{ ++ return DWC_DMA_ALLOC(size, dma); ++} ++ ++/** ++ * This function initializes the CFI object. ++ */ ++int init_cfi(cfiobject_t * cfiobj) ++{ ++ CFI_INFO("%s\n", __func__); ++ ++ /* Allocate a buffer for IN XFERs */ ++ cfiobj->buf_in.buf = ++ DWC_DMA_ALLOC(CFI_IN_BUF_LEN, &cfiobj->buf_in.addr); ++ if (NULL == cfiobj->buf_in.buf) { ++ CFI_INFO("Unable to allocate buffer for INs\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ /* Allocate a buffer for OUT XFERs */ ++ cfiobj->buf_out.buf = ++ DWC_DMA_ALLOC(CFI_OUT_BUF_LEN, &cfiobj->buf_out.addr); ++ if (NULL == cfiobj->buf_out.buf) { ++ CFI_INFO("Unable to allocate buffer for OUT\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ /* Initialize the callback function pointers */ ++ cfiobj->ops.release = cfi_release; ++ cfiobj->ops.ep_enable = cfi_ep_enable; ++ cfiobj->ops.ctrl_write_complete = cfi_ctrl_write_complete; ++ cfiobj->ops.build_descriptors = cfi_build_descriptors; ++ cfiobj->ops.ep_alloc_buf = cfi_ep_alloc_buf; ++ ++ /* Initialize the list of active endpoints in the CFI object */ ++ DWC_LIST_INIT(&cfiobj->active_eps); ++ ++ return 0; ++} ++ ++/** ++ * This function reads the required feature's current value into the buffer ++ * ++ * @retval: Returns negative as error, or the data length of the feature ++ */ ++static int cfi_get_feature_value(uint8_t * buf, uint16_t buflen, ++ struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *ctrl_req) ++{ ++ int retval = -DWC_E_NOT_SUPPORTED; ++ struct dwc_otg_core_if *coreif = GET_CORE_IF(pcd); ++ uint16_t dfifo, rxfifo, txfifo; ++ ++ switch (ctrl_req->wIndex) { ++ /* Whether the DDMA is enabled or not */ ++ case FT_ID_DMA_MODE: ++ *buf = (coreif->dma_enable && coreif->dma_desc_enable) ? 1 : 0; ++ retval = 1; ++ break; ++ ++ case FT_ID_DMA_BUFFER_SETUP: ++ retval = cfi_ep_get_sg_val(buf, pcd, ctrl_req); ++ break; ++ ++ case FT_ID_DMA_BUFF_ALIGN: ++ retval = cfi_ep_get_align_val(buf, pcd, ctrl_req); ++ break; ++ ++ case FT_ID_DMA_CONCAT_SETUP: ++ retval = cfi_ep_get_concat_val(buf, pcd, ctrl_req); ++ break; ++ ++ case FT_ID_DMA_CIRCULAR: ++ CFI_INFO("GetFeature value (FT_ID_DMA_CIRCULAR)\n"); ++ break; ++ ++ case FT_ID_THRESHOLD_SETUP: ++ CFI_INFO("GetFeature value (FT_ID_THRESHOLD_SETUP)\n"); ++ break; ++ ++ case FT_ID_DFIFO_DEPTH: ++ dfifo = get_dfifo_size(coreif); ++ *((uint16_t *) buf) = dfifo; ++ retval = sizeof(uint16_t); ++ break; ++ ++ case FT_ID_TX_FIFO_DEPTH: ++ retval = get_txfifo_size(pcd, ctrl_req->wValue); ++ if (retval >= 0) { ++ txfifo = retval; ++ *((uint16_t *) buf) = txfifo; ++ retval = sizeof(uint16_t); ++ } ++ break; ++ ++ case FT_ID_RX_FIFO_DEPTH: ++ retval = get_rxfifo_size(coreif, ctrl_req->wValue); ++ if (retval >= 0) { ++ rxfifo = retval; ++ *((uint16_t *) buf) = rxfifo; ++ retval = sizeof(uint16_t); ++ } ++ break; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function resets the SG for the specified EP to its default value ++ */ ++static int cfi_reset_sg_val(cfi_ep_t * cfiep) ++{ ++ dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t)); ++ return 0; ++} ++ ++/** ++ * This function resets the Alignment for the specified EP to its default value ++ */ ++static int cfi_reset_align_val(cfi_ep_t * cfiep) ++{ ++ dwc_memset(cfiep->bm_sg, 0, sizeof(ddma_sg_buffer_setup_t)); ++ return 0; ++} ++ ++/** ++ * This function resets the Concatenation for the specified EP to its default value ++ * This function will also set the value of the wTxBytes field to NULL after ++ * freeing the memory previously allocated for this field. ++ */ ++static int cfi_reset_concat_val(cfi_ep_t * cfiep) ++{ ++ /* First we need to free the wTxBytes field */ ++ if (cfiep->bm_concat->wTxBytes) { ++ DWC_FREE(cfiep->bm_concat->wTxBytes); ++ cfiep->bm_concat->wTxBytes = NULL; ++ } ++ ++ dwc_memset(cfiep->bm_concat, 0, sizeof(ddma_concat_buffer_setup_t)); ++ return 0; ++} ++ ++/** ++ * This function resets all the buffer setups of the specified endpoint ++ */ ++static int cfi_ep_reset_all_setup_vals(cfi_ep_t * cfiep) ++{ ++ cfi_reset_sg_val(cfiep); ++ cfi_reset_align_val(cfiep); ++ cfi_reset_concat_val(cfiep); ++ return 0; ++} ++ ++static int cfi_handle_reset_fifo_val(struct dwc_otg_pcd *pcd, uint8_t ep_addr, ++ uint8_t rx_rst, uint8_t tx_rst) ++{ ++ int retval = -DWC_E_INVALID; ++ uint16_t tx_siz[15]; ++ uint16_t rx_siz = 0; ++ dwc_otg_pcd_ep_t *ep = NULL; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params; ++ ++ if (rx_rst) { ++ rx_siz = params->dev_rx_fifo_size; ++ params->dev_rx_fifo_size = GET_CORE_IF(pcd)->init_rxfsiz; ++ } ++ ++ if (tx_rst) { ++ if (ep_addr == 0) { ++ int i; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ tx_siz[i] = ++ core_if->core_params->dev_tx_fifo_size[i]; ++ core_if->core_params->dev_tx_fifo_size[i] = ++ core_if->init_txfsiz[i]; ++ } ++ } else { ++ ++ ep = get_ep_by_addr(pcd, ep_addr); ++ ++ if (NULL == ep) { ++ CFI_INFO ++ ("%s: Unable to get the endpoint addr=0x%02x\n", ++ __func__, ep_addr); ++ return -DWC_E_INVALID; ++ } ++ ++ tx_siz[0] = ++ params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - ++ 1]; ++ params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] = ++ GET_CORE_IF(pcd)->init_txfsiz[ep-> ++ dwc_ep.tx_fifo_num - ++ 1]; ++ } ++ } ++ ++ if (resize_fifos(GET_CORE_IF(pcd))) { ++ retval = 0; ++ } else { ++ CFI_INFO ++ ("%s: Error resetting the feature Reset All(FIFO size)\n", ++ __func__); ++ if (rx_rst) { ++ params->dev_rx_fifo_size = rx_siz; ++ } ++ ++ if (tx_rst) { ++ if (ep_addr == 0) { ++ int i; ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; ++ i++) { ++ core_if-> ++ core_params->dev_tx_fifo_size[i] = ++ tx_siz[i]; ++ } ++ } else { ++ params->dev_tx_fifo_size[ep-> ++ dwc_ep.tx_fifo_num - ++ 1] = tx_siz[0]; ++ } ++ } ++ retval = -DWC_E_INVALID; ++ } ++ return retval; ++} ++ ++static int cfi_handle_reset_all(struct dwc_otg_pcd *pcd, uint8_t addr) ++{ ++ int retval = 0; ++ cfi_ep_t *cfiep; ++ cfiobject_t *cfi = pcd->cfi; ++ dwc_list_link_t *tmp; ++ ++ retval = cfi_handle_reset_fifo_val(pcd, addr, 1, 1); ++ if (retval < 0) { ++ return retval; ++ } ++ ++ /* If the EP address is known then reset the features for only that EP */ ++ if (addr) { ++ cfiep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == cfiep) { ++ CFI_INFO("%s: Error getting the EP address 0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ retval = cfi_ep_reset_all_setup_vals(cfiep); ++ cfiep->ep->dwc_ep.buff_mode = BM_STANDARD; ++ } ++ /* Otherwise (wValue == 0), reset all features of all EP's */ ++ else { ++ /* Traverse all the active EP's and reset the feature(s) value(s) */ ++ //list_for_each_entry(cfiep, &cfi->active_eps, lh) { ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ retval = cfi_ep_reset_all_setup_vals(cfiep); ++ cfiep->ep->dwc_ep.buff_mode = BM_STANDARD; ++ if (retval < 0) { ++ CFI_INFO ++ ("%s: Error resetting the feature Reset All\n", ++ __func__); ++ return retval; ++ } ++ } ++ } ++ return retval; ++} ++ ++static int cfi_handle_reset_dma_buff_setup(struct dwc_otg_pcd *pcd, ++ uint8_t addr) ++{ ++ int retval = 0; ++ cfi_ep_t *cfiep; ++ cfiobject_t *cfi = pcd->cfi; ++ dwc_list_link_t *tmp; ++ ++ /* If the EP address is known then reset the features for only that EP */ ++ if (addr) { ++ cfiep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == cfiep) { ++ CFI_INFO("%s: Error getting the EP address 0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ retval = cfi_reset_sg_val(cfiep); ++ } ++ /* Otherwise (wValue == 0), reset all features of all EP's */ ++ else { ++ /* Traverse all the active EP's and reset the feature(s) value(s) */ ++ //list_for_each_entry(cfiep, &cfi->active_eps, lh) { ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ retval = cfi_reset_sg_val(cfiep); ++ if (retval < 0) { ++ CFI_INFO ++ ("%s: Error resetting the feature Buffer Setup\n", ++ __func__); ++ return retval; ++ } ++ } ++ } ++ return retval; ++} ++ ++static int cfi_handle_reset_concat_val(struct dwc_otg_pcd *pcd, uint8_t addr) ++{ ++ int retval = 0; ++ cfi_ep_t *cfiep; ++ cfiobject_t *cfi = pcd->cfi; ++ dwc_list_link_t *tmp; ++ ++ /* If the EP address is known then reset the features for only that EP */ ++ if (addr) { ++ cfiep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == cfiep) { ++ CFI_INFO("%s: Error getting the EP address 0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ retval = cfi_reset_concat_val(cfiep); ++ } ++ /* Otherwise (wValue == 0), reset all features of all EP's */ ++ else { ++ /* Traverse all the active EP's and reset the feature(s) value(s) */ ++ //list_for_each_entry(cfiep, &cfi->active_eps, lh) { ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ retval = cfi_reset_concat_val(cfiep); ++ if (retval < 0) { ++ CFI_INFO ++ ("%s: Error resetting the feature Concatenation Value\n", ++ __func__); ++ return retval; ++ } ++ } ++ } ++ return retval; ++} ++ ++static int cfi_handle_reset_align_val(struct dwc_otg_pcd *pcd, uint8_t addr) ++{ ++ int retval = 0; ++ cfi_ep_t *cfiep; ++ cfiobject_t *cfi = pcd->cfi; ++ dwc_list_link_t *tmp; ++ ++ /* If the EP address is known then reset the features for only that EP */ ++ if (addr) { ++ cfiep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == cfiep) { ++ CFI_INFO("%s: Error getting the EP address 0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ retval = cfi_reset_align_val(cfiep); ++ } ++ /* Otherwise (wValue == 0), reset all features of all EP's */ ++ else { ++ /* Traverse all the active EP's and reset the feature(s) value(s) */ ++ //list_for_each_entry(cfiep, &cfi->active_eps, lh) { ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ cfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ retval = cfi_reset_align_val(cfiep); ++ if (retval < 0) { ++ CFI_INFO ++ ("%s: Error resetting the feature Aliignment Value\n", ++ __func__); ++ return retval; ++ } ++ } ++ } ++ return retval; ++ ++} ++ ++static int cfi_preproc_reset(struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req) ++{ ++ int retval = 0; ++ ++ switch (req->wIndex) { ++ case 0: ++ /* Reset all features */ ++ retval = cfi_handle_reset_all(pcd, req->wValue & 0xff); ++ break; ++ ++ case FT_ID_DMA_BUFFER_SETUP: ++ /* Reset the SG buffer setup */ ++ retval = ++ cfi_handle_reset_dma_buff_setup(pcd, req->wValue & 0xff); ++ break; ++ ++ case FT_ID_DMA_CONCAT_SETUP: ++ /* Reset the Concatenation buffer setup */ ++ retval = cfi_handle_reset_concat_val(pcd, req->wValue & 0xff); ++ break; ++ ++ case FT_ID_DMA_BUFF_ALIGN: ++ /* Reset the Alignment buffer setup */ ++ retval = cfi_handle_reset_align_val(pcd, req->wValue & 0xff); ++ break; ++ ++ case FT_ID_TX_FIFO_DEPTH: ++ retval = ++ cfi_handle_reset_fifo_val(pcd, req->wValue & 0xff, 0, 1); ++ pcd->cfi->need_gadget_att = 0; ++ break; ++ ++ case FT_ID_RX_FIFO_DEPTH: ++ retval = cfi_handle_reset_fifo_val(pcd, 0, 1, 0); ++ pcd->cfi->need_gadget_att = 0; ++ break; ++ default: ++ break; ++ } ++ return retval; ++} ++ ++/** ++ * This function sets a new value for the SG buffer setup. ++ */ ++static int cfi_ep_set_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd) ++{ ++ uint8_t inaddr, outaddr; ++ cfi_ep_t *epin, *epout; ++ ddma_sg_buffer_setup_t *psgval; ++ uint32_t desccount, size; ++ ++ CFI_INFO("%s\n", __func__); ++ ++ psgval = (ddma_sg_buffer_setup_t *) buf; ++ desccount = (uint32_t) psgval->bCount; ++ size = (uint32_t) psgval->wSize; ++ ++ /* Check the DMA descriptor count */ ++ if ((desccount > MAX_DMA_DESCS_PER_EP) || (desccount == 0)) { ++ CFI_INFO ++ ("%s: The count of DMA Descriptors should be between 1 and %d\n", ++ __func__, MAX_DMA_DESCS_PER_EP); ++ return -DWC_E_INVALID; ++ } ++ ++ /* Check the DMA descriptor count */ ++ ++ if (size == 0) { ++ ++ CFI_INFO("%s: The transfer size should be at least 1 byte\n", ++ __func__); ++ ++ return -DWC_E_INVALID; ++ ++ } ++ ++ inaddr = psgval->bInEndpointAddress; ++ outaddr = psgval->bOutEndpointAddress; ++ ++ epin = get_cfi_ep_by_addr(pcd->cfi, inaddr); ++ epout = get_cfi_ep_by_addr(pcd->cfi, outaddr); ++ ++ if (NULL == epin || NULL == epout) { ++ CFI_INFO ++ ("%s: Unable to get the endpoints inaddr=0x%02x outaddr=0x%02x\n", ++ __func__, inaddr, outaddr); ++ return -DWC_E_INVALID; ++ } ++ ++ epin->ep->dwc_ep.buff_mode = BM_SG; ++ dwc_memcpy(epin->bm_sg, psgval, sizeof(ddma_sg_buffer_setup_t)); ++ ++ epout->ep->dwc_ep.buff_mode = BM_SG; ++ dwc_memcpy(epout->bm_sg, psgval, sizeof(ddma_sg_buffer_setup_t)); ++ ++ return 0; ++} ++ ++/** ++ * This function sets a new value for the buffer Alignment setup. ++ */ ++static int cfi_ep_set_alignment_val(uint8_t * buf, struct dwc_otg_pcd *pcd) ++{ ++ cfi_ep_t *ep; ++ uint8_t addr; ++ ddma_align_buffer_setup_t *palignval; ++ ++ palignval = (ddma_align_buffer_setup_t *) buf; ++ addr = palignval->bEndpointAddress; ++ ++ ep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ ++ ep->ep->dwc_ep.buff_mode = BM_ALIGN; ++ dwc_memcpy(ep->bm_align, palignval, sizeof(ddma_align_buffer_setup_t)); ++ ++ return 0; ++} ++ ++/** ++ * This function sets a new value for the Concatenation buffer setup. ++ */ ++static int cfi_ep_set_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd) ++{ ++ uint8_t addr; ++ cfi_ep_t *ep; ++ struct _ddma_concat_buffer_setup_hdr *pConcatValHdr; ++ uint16_t *pVals; ++ uint32_t desccount; ++ int i; ++ uint16_t mps; ++ ++ pConcatValHdr = (struct _ddma_concat_buffer_setup_hdr *)buf; ++ desccount = (uint32_t) pConcatValHdr->bDescCount; ++ pVals = (uint16_t *) (buf + BS_CONCAT_VAL_HDR_LEN); ++ ++ /* Check the DMA descriptor count */ ++ if (desccount > MAX_DMA_DESCS_PER_EP) { ++ CFI_INFO("%s: Maximum DMA Descriptor count should be %d\n", ++ __func__, MAX_DMA_DESCS_PER_EP); ++ return -DWC_E_INVALID; ++ } ++ ++ addr = pConcatValHdr->bEndpointAddress; ++ ep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n", ++ __func__, addr); ++ return -DWC_E_INVALID; ++ } ++ ++ mps = UGETW(ep->ep->desc->wMaxPacketSize); ++ ++#if 0 ++ for (i = 0; i < desccount; i++) { ++ CFI_INFO("%s: wTxSize[%d]=0x%04x\n", __func__, i, pVals[i]); ++ } ++ CFI_INFO("%s: epname=%s; mps=%d\n", __func__, ep->ep->ep.name, mps); ++#endif ++ ++ /* Check the wTxSizes to be less than or equal to the mps */ ++ for (i = 0; i < desccount; i++) { ++ if (pVals[i] > mps) { ++ CFI_INFO ++ ("%s: ERROR - the wTxSize[%d] should be <= MPS (wTxSize=%d)\n", ++ __func__, i, pVals[i]); ++ return -DWC_E_INVALID; ++ } ++ } ++ ++ ep->ep->dwc_ep.buff_mode = BM_CONCAT; ++ dwc_memcpy(ep->bm_concat, pConcatValHdr, BS_CONCAT_VAL_HDR_LEN); ++ ++ /* Free the previously allocated storage for the wTxBytes */ ++ if (ep->bm_concat->wTxBytes) { ++ DWC_FREE(ep->bm_concat->wTxBytes); ++ } ++ ++ /* Allocate a new storage for the wTxBytes field */ ++ ep->bm_concat->wTxBytes = ++ DWC_ALLOC(sizeof(uint16_t) * pConcatValHdr->bDescCount); ++ if (NULL == ep->bm_concat->wTxBytes) { ++ CFI_INFO("%s: Unable to allocate memory\n", __func__); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ /* Copy the new values into the wTxBytes filed */ ++ dwc_memcpy(ep->bm_concat->wTxBytes, buf + BS_CONCAT_VAL_HDR_LEN, ++ sizeof(uint16_t) * pConcatValHdr->bDescCount); ++ ++ return 0; ++} ++ ++/** ++ * This function calculates the total of all FIFO sizes ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ * @return The total of data FIFO sizes. ++ * ++ */ ++static uint16_t get_dfifo_size(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_params_t *params = core_if->core_params; ++ uint16_t dfifo_total = 0; ++ int i; ++ ++ /* The shared RxFIFO size */ ++ dfifo_total = ++ params->dev_rx_fifo_size + params->dev_nperio_tx_fifo_size; ++ ++ /* Add up each TxFIFO size to the total */ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ dfifo_total += params->dev_tx_fifo_size[i]; ++ } ++ ++ return dfifo_total; ++} ++ ++/** ++ * This function returns Rx FIFO size ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ * @return The total of data FIFO sizes. ++ * ++ */ ++static int32_t get_rxfifo_size(dwc_otg_core_if_t * core_if, uint16_t wValue) ++{ ++ switch (wValue >> 8) { ++ case 0: ++ return (core_if->pwron_rxfsiz < ++ 32768) ? core_if->pwron_rxfsiz : 32768; ++ break; ++ case 1: ++ return core_if->core_params->dev_rx_fifo_size; ++ break; ++ default: ++ return -DWC_E_INVALID; ++ break; ++ } ++} ++ ++/** ++ * This function returns Tx FIFO size for IN EP ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ * @return The total of data FIFO sizes. ++ * ++ */ ++static int32_t get_txfifo_size(struct dwc_otg_pcd *pcd, uint16_t wValue) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ ++ ep = get_ep_by_addr(pcd, wValue & 0xff); ++ ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n", ++ __func__, wValue & 0xff); ++ return -DWC_E_INVALID; ++ } ++ ++ if (!ep->dwc_ep.is_in) { ++ CFI_INFO ++ ("%s: No Tx FIFO assingned to the Out endpoint addr=0x%02x\n", ++ __func__, wValue & 0xff); ++ return -DWC_E_INVALID; ++ } ++ ++ switch (wValue >> 8) { ++ case 0: ++ return (GET_CORE_IF(pcd)->pwron_txfsiz ++ [ep->dwc_ep.tx_fifo_num - 1] < ++ 768) ? GET_CORE_IF(pcd)->pwron_txfsiz[ep-> ++ dwc_ep.tx_fifo_num ++ - 1] : 32768; ++ break; ++ case 1: ++ return GET_CORE_IF(pcd)->core_params-> ++ dev_tx_fifo_size[ep->dwc_ep.num - 1]; ++ break; ++ default: ++ return -DWC_E_INVALID; ++ break; ++ } ++} ++ ++/** ++ * This function checks if the submitted combination of ++ * device mode FIFO sizes is possible or not. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ * @return 1 if possible, 0 otherwise. ++ * ++ */ ++static uint8_t check_fifo_sizes(dwc_otg_core_if_t * core_if) ++{ ++ uint16_t dfifo_actual = 0; ++ dwc_otg_core_params_t *params = core_if->core_params; ++ uint16_t start_addr = 0; ++ int i; ++ ++ dfifo_actual = ++ params->dev_rx_fifo_size + params->dev_nperio_tx_fifo_size; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ dfifo_actual += params->dev_tx_fifo_size[i]; ++ } ++ ++ if (dfifo_actual > core_if->total_fifo_size) { ++ return 0; ++ } ++ ++ if (params->dev_rx_fifo_size > 32768 || params->dev_rx_fifo_size < 16) ++ return 0; ++ ++ if (params->dev_nperio_tx_fifo_size > 32768 ++ || params->dev_nperio_tx_fifo_size < 16) ++ return 0; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ ++ if (params->dev_tx_fifo_size[i] > 768 ++ || params->dev_tx_fifo_size[i] < 4) ++ return 0; ++ } ++ ++ if (params->dev_rx_fifo_size > core_if->pwron_rxfsiz) ++ return 0; ++ start_addr = params->dev_rx_fifo_size; ++ ++ if (params->dev_nperio_tx_fifo_size > core_if->pwron_gnptxfsiz) ++ return 0; ++ start_addr += params->dev_nperio_tx_fifo_size; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ ++ if (params->dev_tx_fifo_size[i] > core_if->pwron_txfsiz[i]) ++ return 0; ++ start_addr += params->dev_tx_fifo_size[i]; ++ } ++ ++ return 1; ++} ++ ++/** ++ * This function resizes Device mode FIFOs ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ * @return 1 if successful, 0 otherwise ++ * ++ */ ++static uint8_t resize_fifos(dwc_otg_core_if_t * core_if) ++{ ++ int i = 0; ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ dwc_otg_core_params_t *params = core_if->core_params; ++ uint32_t rx_fifo_size; ++ fifosize_data_t nptxfifosize; ++ fifosize_data_t txfifosize[15]; ++ ++ uint32_t rx_fsz_bak; ++ uint32_t nptxfsz_bak; ++ uint32_t txfsz_bak[15]; ++ ++ uint16_t start_address; ++ uint8_t retval = 1; ++ ++ if (!check_fifo_sizes(core_if)) { ++ return 0; ++ } ++ ++ /* Configure data FIFO sizes */ ++ if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) { ++ rx_fsz_bak = DWC_READ_REG32(&global_regs->grxfsiz); ++ rx_fifo_size = params->dev_rx_fifo_size; ++ DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fifo_size); ++ ++ /* ++ * Tx FIFOs These FIFOs are numbered from 1 to 15. ++ * Indexes of the FIFO size module parameters in the ++ * dev_tx_fifo_size array and the FIFO size registers in ++ * the dtxfsiz array run from 0 to 14. ++ */ ++ ++ /* Non-periodic Tx FIFO */ ++ nptxfsz_bak = DWC_READ_REG32(&global_regs->gnptxfsiz); ++ nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size; ++ start_address = params->dev_rx_fifo_size; ++ nptxfifosize.b.startaddr = start_address; ++ ++ DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfifosize.d32); ++ ++ start_address += nptxfifosize.b.depth; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ txfsz_bak[i] = DWC_READ_REG32(&global_regs->dtxfsiz[i]); ++ ++ txfifosize[i].b.depth = params->dev_tx_fifo_size[i]; ++ txfifosize[i].b.startaddr = start_address; ++ DWC_WRITE_REG32(&global_regs->dtxfsiz[i], ++ txfifosize[i].d32); ++ ++ start_address += txfifosize[i].b.depth; ++ } ++ ++ /** Check if register values are set correctly */ ++ if (rx_fifo_size != DWC_READ_REG32(&global_regs->grxfsiz)) { ++ retval = 0; ++ } ++ ++ if (nptxfifosize.d32 != DWC_READ_REG32(&global_regs->gnptxfsiz)) { ++ retval = 0; ++ } ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ if (txfifosize[i].d32 != ++ DWC_READ_REG32(&global_regs->dtxfsiz[i])) { ++ retval = 0; ++ } ++ } ++ ++ /** If register values are not set correctly, reset old values */ ++ if (retval == 0) { ++ DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fsz_bak); ++ ++ /* Non-periodic Tx FIFO */ ++ DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfsz_bak); ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ DWC_WRITE_REG32(&global_regs->dtxfsiz[i], ++ txfsz_bak[i]); ++ } ++ } ++ } else { ++ return 0; ++ } ++ ++ /* Flush the FIFOs */ ++ dwc_otg_flush_tx_fifo(core_if, 0x10); /* all Tx FIFOs */ ++ dwc_otg_flush_rx_fifo(core_if); ++ ++ return retval; ++} ++ ++/** ++ * This function sets a new value for the buffer Alignment setup. ++ */ ++static int cfi_ep_set_tx_fifo_val(uint8_t * buf, dwc_otg_pcd_t * pcd) ++{ ++ int retval; ++ uint32_t fsiz; ++ uint16_t size; ++ uint16_t ep_addr; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params; ++ tx_fifo_size_setup_t *ptxfifoval; ++ ++ ptxfifoval = (tx_fifo_size_setup_t *) buf; ++ ep_addr = ptxfifoval->bEndpointAddress; ++ size = ptxfifoval->wDepth; ++ ++ ep = get_ep_by_addr(pcd, ep_addr); ++ ++ CFI_INFO ++ ("%s: Set Tx FIFO size: endpoint addr=0x%02x, depth=%d, FIFO Num=%d\n", ++ __func__, ep_addr, size, ep->dwc_ep.tx_fifo_num); ++ ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint addr=0x%02x\n", ++ __func__, ep_addr); ++ return -DWC_E_INVALID; ++ } ++ ++ fsiz = params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1]; ++ params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] = size; ++ ++ if (resize_fifos(GET_CORE_IF(pcd))) { ++ retval = 0; ++ } else { ++ CFI_INFO ++ ("%s: Error setting the feature Tx FIFO Size for EP%d\n", ++ __func__, ep_addr); ++ params->dev_tx_fifo_size[ep->dwc_ep.tx_fifo_num - 1] = fsiz; ++ retval = -DWC_E_INVALID; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function sets a new value for the buffer Alignment setup. ++ */ ++static int cfi_set_rx_fifo_val(uint8_t * buf, dwc_otg_pcd_t * pcd) ++{ ++ int retval; ++ uint32_t fsiz; ++ uint16_t size; ++ dwc_otg_core_params_t *params = GET_CORE_IF(pcd)->core_params; ++ rx_fifo_size_setup_t *prxfifoval; ++ ++ prxfifoval = (rx_fifo_size_setup_t *) buf; ++ size = prxfifoval->wDepth; ++ ++ fsiz = params->dev_rx_fifo_size; ++ params->dev_rx_fifo_size = size; ++ ++ if (resize_fifos(GET_CORE_IF(pcd))) { ++ retval = 0; ++ } else { ++ CFI_INFO("%s: Error setting the feature Rx FIFO Size\n", ++ __func__); ++ params->dev_rx_fifo_size = fsiz; ++ retval = -DWC_E_INVALID; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function reads the SG of an EP's buffer setup into the buffer buf ++ */ ++static int cfi_ep_get_sg_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req) ++{ ++ int retval = -DWC_E_INVALID; ++ uint8_t addr; ++ cfi_ep_t *ep; ++ ++ /* The Low Byte of the wValue contains a non-zero address of the endpoint */ ++ addr = req->wValue & 0xFF; ++ if (addr == 0) /* The address should be non-zero */ ++ return retval; ++ ++ ep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n", ++ __func__, addr); ++ return retval; ++ } ++ ++ dwc_memcpy(buf, ep->bm_sg, BS_SG_VAL_DESC_LEN); ++ retval = BS_SG_VAL_DESC_LEN; ++ return retval; ++} ++ ++/** ++ * This function reads the Concatenation value of an EP's buffer mode into ++ * the buffer buf ++ */ ++static int cfi_ep_get_concat_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req) ++{ ++ int retval = -DWC_E_INVALID; ++ uint8_t addr; ++ cfi_ep_t *ep; ++ uint8_t desc_count; ++ ++ /* The Low Byte of the wValue contains a non-zero address of the endpoint */ ++ addr = req->wValue & 0xFF; ++ if (addr == 0) /* The address should be non-zero */ ++ return retval; ++ ++ ep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n", ++ __func__, addr); ++ return retval; ++ } ++ ++ /* Copy the header to the buffer */ ++ dwc_memcpy(buf, ep->bm_concat, BS_CONCAT_VAL_HDR_LEN); ++ /* Advance the buffer pointer by the header size */ ++ buf += BS_CONCAT_VAL_HDR_LEN; ++ ++ desc_count = ep->bm_concat->hdr.bDescCount; ++ /* Copy alll the wTxBytes to the buffer */ ++ dwc_memcpy(buf, ep->bm_concat->wTxBytes, sizeof(uid16_t) * desc_count); ++ ++ retval = BS_CONCAT_VAL_HDR_LEN + sizeof(uid16_t) * desc_count; ++ return retval; ++} ++ ++/** ++ * This function reads the buffer Alignment value of an EP's buffer mode into ++ * the buffer buf ++ * ++ * @return The total number of bytes copied to the buffer or negative error code. ++ */ ++static int cfi_ep_get_align_val(uint8_t * buf, struct dwc_otg_pcd *pcd, ++ struct cfi_usb_ctrlrequest *req) ++{ ++ int retval = -DWC_E_INVALID; ++ uint8_t addr; ++ cfi_ep_t *ep; ++ ++ /* The Low Byte of the wValue contains a non-zero address of the endpoint */ ++ addr = req->wValue & 0xFF; ++ if (addr == 0) /* The address should be non-zero */ ++ return retval; ++ ++ ep = get_cfi_ep_by_addr(pcd->cfi, addr); ++ if (NULL == ep) { ++ CFI_INFO("%s: Unable to get the endpoint address(0x%02x)\n", ++ __func__, addr); ++ return retval; ++ } ++ ++ dwc_memcpy(buf, ep->bm_align, BS_ALIGN_VAL_HDR_LEN); ++ retval = BS_ALIGN_VAL_HDR_LEN; ++ ++ return retval; ++} ++ ++/** ++ * This function sets a new value for the specified feature ++ * ++ * @param pcd A pointer to the PCD object ++ * ++ * @return 0 if successful, negative error code otherwise to stall the DCE. ++ */ ++static int cfi_set_feature_value(struct dwc_otg_pcd *pcd) ++{ ++ int retval = -DWC_E_NOT_SUPPORTED; ++ uint16_t wIndex, wValue; ++ uint8_t bRequest; ++ struct dwc_otg_core_if *coreif; ++ cfiobject_t *cfi = pcd->cfi; ++ struct cfi_usb_ctrlrequest *ctrl_req; ++ uint8_t *buf; ++ ctrl_req = &cfi->ctrl_req; ++ ++ buf = pcd->cfi->ctrl_req.data; ++ ++ coreif = GET_CORE_IF(pcd); ++ bRequest = ctrl_req->bRequest; ++ wIndex = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wIndex); ++ wValue = DWC_CONSTANT_CPU_TO_LE16(ctrl_req->wValue); ++ ++ /* See which feature is to be modified */ ++ switch (wIndex) { ++ case FT_ID_DMA_BUFFER_SETUP: ++ /* Modify the feature */ ++ if ((retval = cfi_ep_set_sg_val(buf, pcd)) < 0) ++ return retval; ++ ++ /* And send this request to the gadget */ ++ cfi->need_gadget_att = 1; ++ break; ++ ++ case FT_ID_DMA_BUFF_ALIGN: ++ if ((retval = cfi_ep_set_alignment_val(buf, pcd)) < 0) ++ return retval; ++ cfi->need_gadget_att = 1; ++ break; ++ ++ case FT_ID_DMA_CONCAT_SETUP: ++ /* Modify the feature */ ++ if ((retval = cfi_ep_set_concat_val(buf, pcd)) < 0) ++ return retval; ++ cfi->need_gadget_att = 1; ++ break; ++ ++ case FT_ID_DMA_CIRCULAR: ++ CFI_INFO("FT_ID_DMA_CIRCULAR\n"); ++ break; ++ ++ case FT_ID_THRESHOLD_SETUP: ++ CFI_INFO("FT_ID_THRESHOLD_SETUP\n"); ++ break; ++ ++ case FT_ID_DFIFO_DEPTH: ++ CFI_INFO("FT_ID_DFIFO_DEPTH\n"); ++ break; ++ ++ case FT_ID_TX_FIFO_DEPTH: ++ CFI_INFO("FT_ID_TX_FIFO_DEPTH\n"); ++ if ((retval = cfi_ep_set_tx_fifo_val(buf, pcd)) < 0) ++ return retval; ++ cfi->need_gadget_att = 0; ++ break; ++ ++ case FT_ID_RX_FIFO_DEPTH: ++ CFI_INFO("FT_ID_RX_FIFO_DEPTH\n"); ++ if ((retval = cfi_set_rx_fifo_val(buf, pcd)) < 0) ++ return retval; ++ cfi->need_gadget_att = 0; ++ break; ++ } ++ ++ return retval; ++} ++ ++#endif //DWC_UTE_CFI +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cfi.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cfi.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,320 @@ ++/* ========================================================================== ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#if !defined(__DWC_OTG_CFI_H__) ++#define __DWC_OTG_CFI_H__ ++ ++#include "dwc_otg_pcd.h" ++#include "dwc_cfi_common.h" ++ ++/** ++ * @file ++ * This file contains the CFI related OTG PCD specific common constants, ++ * interfaces(functions and macros) and data structures.The CFI Protocol is an ++ * optional interface for internal testing purposes that a DUT may implement to ++ * support testing of configurable features. ++ * ++ */ ++ ++struct dwc_otg_pcd; ++struct dwc_otg_pcd_ep; ++ ++/** OTG CFI Features (properties) ID constants */ ++/** This is a request for all Core Features */ ++#define FT_ID_DMA_MODE 0x0001 ++#define FT_ID_DMA_BUFFER_SETUP 0x0002 ++#define FT_ID_DMA_BUFF_ALIGN 0x0003 ++#define FT_ID_DMA_CONCAT_SETUP 0x0004 ++#define FT_ID_DMA_CIRCULAR 0x0005 ++#define FT_ID_THRESHOLD_SETUP 0x0006 ++#define FT_ID_DFIFO_DEPTH 0x0007 ++#define FT_ID_TX_FIFO_DEPTH 0x0008 ++#define FT_ID_RX_FIFO_DEPTH 0x0009 ++ ++/**********************************************************/ ++#define CFI_INFO_DEF ++ ++#ifdef CFI_INFO_DEF ++#define CFI_INFO(fmt...) DWC_PRINTF("CFI: " fmt); ++#else ++#define CFI_INFO(fmt...) ++#endif ++ ++#define min(x,y) ({ \ ++ x < y ? x : y; }) ++ ++#define max(x,y) ({ \ ++ x > y ? x : y; }) ++ ++/** ++ * Descriptor DMA SG Buffer setup structure (SG buffer). This structure is ++ * also used for setting up a buffer for Circular DDMA. ++ */ ++struct _ddma_sg_buffer_setup { ++#define BS_SG_VAL_DESC_LEN 6 ++ /* The OUT EP address */ ++ uint8_t bOutEndpointAddress; ++ /* The IN EP address */ ++ uint8_t bInEndpointAddress; ++ /* Number of bytes to put between transfer segments (must be DWORD boundaries) */ ++ uint8_t bOffset; ++ /* The number of transfer segments (a DMA descriptors per each segment) */ ++ uint8_t bCount; ++ /* Size (in byte) of each transfer segment */ ++ uint16_t wSize; ++} __attribute__ ((packed)); ++typedef struct _ddma_sg_buffer_setup ddma_sg_buffer_setup_t; ++ ++/** Descriptor DMA Concatenation Buffer setup structure */ ++struct _ddma_concat_buffer_setup_hdr { ++#define BS_CONCAT_VAL_HDR_LEN 4 ++ /* The endpoint for which the buffer is to be set up */ ++ uint8_t bEndpointAddress; ++ /* The count of descriptors to be used */ ++ uint8_t bDescCount; ++ /* The total size of the transfer */ ++ uint16_t wSize; ++} __attribute__ ((packed)); ++typedef struct _ddma_concat_buffer_setup_hdr ddma_concat_buffer_setup_hdr_t; ++ ++/** Descriptor DMA Concatenation Buffer setup structure */ ++struct _ddma_concat_buffer_setup { ++ /* The SG header */ ++ ddma_concat_buffer_setup_hdr_t hdr; ++ ++ /* The XFER sizes pointer (allocated dynamically) */ ++ uint16_t *wTxBytes; ++} __attribute__ ((packed)); ++typedef struct _ddma_concat_buffer_setup ddma_concat_buffer_setup_t; ++ ++/** Descriptor DMA Alignment Buffer setup structure */ ++struct _ddma_align_buffer_setup { ++#define BS_ALIGN_VAL_HDR_LEN 2 ++ uint8_t bEndpointAddress; ++ uint8_t bAlign; ++} __attribute__ ((packed)); ++typedef struct _ddma_align_buffer_setup ddma_align_buffer_setup_t; ++ ++/** Transmit FIFO Size setup structure */ ++struct _tx_fifo_size_setup { ++ uint8_t bEndpointAddress; ++ uint16_t wDepth; ++} __attribute__ ((packed)); ++typedef struct _tx_fifo_size_setup tx_fifo_size_setup_t; ++ ++/** Transmit FIFO Size setup structure */ ++struct _rx_fifo_size_setup { ++ uint16_t wDepth; ++} __attribute__ ((packed)); ++typedef struct _rx_fifo_size_setup rx_fifo_size_setup_t; ++ ++/** ++ * struct cfi_usb_ctrlrequest - the CFI implementation of the struct usb_ctrlrequest ++ * This structure encapsulates the standard usb_ctrlrequest and adds a pointer ++ * to the data returned in the data stage of a 3-stage Control Write requests. ++ */ ++struct cfi_usb_ctrlrequest { ++ uint8_t bRequestType; ++ uint8_t bRequest; ++ uint16_t wValue; ++ uint16_t wIndex; ++ uint16_t wLength; ++ uint8_t *data; ++} UPACKED; ++ ++/*---------------------------------------------------------------------------*/ ++ ++/** ++ * The CFI wrapper of the enabled and activated dwc_otg_pcd_ep structures. ++ * This structure is used to store the buffer setup data for any ++ * enabled endpoint in the PCD. ++ */ ++struct cfi_ep { ++ /* Entry for the list container */ ++ dwc_list_link_t lh; ++ /* Pointer to the active PCD endpoint structure */ ++ struct dwc_otg_pcd_ep *ep; ++ /* The last descriptor in the chain of DMA descriptors of the endpoint */ ++ struct dwc_otg_dma_desc *dma_desc_last; ++ /* The SG feature value */ ++ ddma_sg_buffer_setup_t *bm_sg; ++ /* The Circular feature value */ ++ ddma_sg_buffer_setup_t *bm_circ; ++ /* The Concatenation feature value */ ++ ddma_concat_buffer_setup_t *bm_concat; ++ /* The Alignment feature value */ ++ ddma_align_buffer_setup_t *bm_align; ++ /* XFER length */ ++ uint32_t xfer_len; ++ /* ++ * Count of DMA descriptors currently used. ++ * The total should not exceed the MAX_DMA_DESCS_PER_EP value ++ * defined in the dwc_otg_cil.h ++ */ ++ uint32_t desc_count; ++}; ++typedef struct cfi_ep cfi_ep_t; ++ ++typedef struct cfi_dma_buff { ++#define CFI_IN_BUF_LEN 1024 ++#define CFI_OUT_BUF_LEN 1024 ++ dma_addr_t addr; ++ uint8_t *buf; ++} cfi_dma_buff_t; ++ ++struct cfiobject; ++ ++/** ++ * This is the interface for the CFI operations. ++ * ++ * @param ep_enable Called when any endpoint is enabled and activated. ++ * @param release Called when the CFI object is released and it needs to correctly ++ * deallocate the dynamic memory ++ * @param ctrl_write_complete Called when the data stage of the request is complete ++ */ ++typedef struct cfi_ops { ++ int (*ep_enable) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd, ++ struct dwc_otg_pcd_ep * ep); ++ void *(*ep_alloc_buf) (struct cfiobject * cfi, struct dwc_otg_pcd * pcd, ++ struct dwc_otg_pcd_ep * ep, dma_addr_t * dma, ++ unsigned size, gfp_t flags); ++ void (*release) (struct cfiobject * cfi); ++ int (*ctrl_write_complete) (struct cfiobject * cfi, ++ struct dwc_otg_pcd * pcd); ++ void (*build_descriptors) (struct cfiobject * cfi, ++ struct dwc_otg_pcd * pcd, ++ struct dwc_otg_pcd_ep * ep, ++ dwc_otg_pcd_request_t * req); ++} cfi_ops_t; ++ ++struct cfiobject { ++ cfi_ops_t ops; ++ struct dwc_otg_pcd *pcd; ++ struct usb_gadget *gadget; ++ ++ /* Buffers used to send/receive CFI-related request data */ ++ cfi_dma_buff_t buf_in; ++ cfi_dma_buff_t buf_out; ++ ++ /* CFI specific Control request wrapper */ ++ struct cfi_usb_ctrlrequest ctrl_req; ++ ++ /* The list of active EP's in the PCD of type cfi_ep_t */ ++ dwc_list_link_t active_eps; ++ ++ /* This flag shall control the propagation of a specific request ++ * to the gadget's processing routines. ++ * 0 - no gadget handling ++ * 1 - the gadget needs to know about this request (w/o completing a status ++ * phase - just return a 0 to the _setup callback) ++ */ ++ uint8_t need_gadget_att; ++ ++ /* Flag indicating whether the status IN phase needs to be ++ * completed by the PCD ++ */ ++ uint8_t need_status_in_complete; ++}; ++typedef struct cfiobject cfiobject_t; ++ ++#define DUMP_MSG ++ ++#if defined(DUMP_MSG) ++static inline void dump_msg(const u8 * buf, unsigned int length) ++{ ++ unsigned int start, num, i; ++ char line[52], *p; ++ ++ if (length >= 512) ++ return; ++ ++ start = 0; ++ while (length > 0) { ++ num = min(length, 16u); ++ p = line; ++ for (i = 0; i < num; ++i) { ++ if (i == 8) ++ *p++ = ' '; ++ DWC_SPRINTF(p, " %02x", buf[i]); ++ p += 3; ++ } ++ *p = 0; ++ DWC_DEBUG("%6x: %s\n", start, line); ++ buf += num; ++ start += num; ++ length -= num; ++ } ++} ++#else ++static inline void dump_msg(const u8 * buf, unsigned int length) ++{ ++} ++#endif ++ ++/** ++ * This function returns a pointer to cfi_ep_t object with the addr address. ++ */ ++static inline struct cfi_ep *get_cfi_ep_by_addr(struct cfiobject *cfi, ++ uint8_t addr) ++{ ++ struct cfi_ep *pcfiep; ++ dwc_list_link_t *tmp; ++ ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ ++ if (pcfiep->ep->desc->bEndpointAddress == addr) { ++ return pcfiep; ++ } ++ } ++ ++ return NULL; ++} ++ ++/** ++ * This function returns a pointer to cfi_ep_t object that matches ++ * the dwc_otg_pcd_ep object. ++ */ ++static inline struct cfi_ep *get_cfi_ep_by_pcd_ep(struct cfiobject *cfi, ++ struct dwc_otg_pcd_ep *ep) ++{ ++ struct cfi_ep *pcfiep = NULL; ++ dwc_list_link_t *tmp; ++ ++ DWC_LIST_FOREACH(tmp, &cfi->active_eps) { ++ pcfiep = DWC_LIST_ENTRY(tmp, struct cfi_ep, lh); ++ if (pcfiep->ep == ep) { ++ return pcfiep; ++ } ++ } ++ return NULL; ++} ++ ++int cfi_setup(struct dwc_otg_pcd *pcd, struct cfi_usb_ctrlrequest *ctrl); ++ ++#endif /* (__DWC_OTG_CFI_H__) */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,7151 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil.c $ ++ * $Revision: #191 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++/** @file ++ * ++ * The Core Interface Layer provides basic services for accessing and ++ * managing the DWC_otg hardware. These services are used by both the ++ * Host Controller Driver and the Peripheral Controller Driver. ++ * ++ * The CIL manages the memory map for the core so that the HCD and PCD ++ * don't have to do this separately. It also handles basic tasks like ++ * reading/writing the registers and data FIFOs in the controller. ++ * Some of the data access functions provide encapsulation of several ++ * operations required to perform a task, such as writing multiple ++ * registers to start a transfer. Finally, the CIL performs basic ++ * services that are not specific to either the host or device modes ++ * of operation. These services include management of the OTG Host ++ * Negotiation Protocol (HNP) and Session Request Protocol (SRP). A ++ * Diagnostic API is also provided to allow testing of the controller ++ * hardware. ++ * ++ * The Core Interface Layer has the following requirements: ++ * - Provides basic controller operations. ++ * - Minimal use of OS services. ++ * - The OS services used will be abstracted by using inline functions ++ * or macros. ++ * ++ */ ++ ++#include "dwc_os.h" ++#include "dwc_otg_regs.h" ++#include "dwc_otg_cil.h" ++ ++static int dwc_otg_setup_params(dwc_otg_core_if_t * core_if); ++ ++/** ++ * This function is called to initialize the DWC_otg CSR data ++ * structures. The register addresses in the device and host ++ * structures are initialized from the base address supplied by the ++ * caller. The calling function must make the OS calls to get the ++ * base address of the DWC_otg controller registers. The core_params ++ * argument holds the parameters that specify how the core should be ++ * configured. ++ * ++ * @param reg_base_addr Base address of DWC_otg core registers ++ * ++ */ ++dwc_otg_core_if_t *dwc_otg_cil_init(const uint32_t * reg_base_addr) ++{ ++ dwc_otg_core_if_t *core_if = 0; ++ dwc_otg_dev_if_t *dev_if = 0; ++ dwc_otg_host_if_t *host_if = 0; ++ uint8_t *reg_base = (uint8_t *) reg_base_addr; ++ int i = 0; ++ ++ DWC_DEBUGPL(DBG_CILV, "%s(%p)\n", __func__, reg_base_addr); ++ ++ core_if = DWC_ALLOC(sizeof(dwc_otg_core_if_t)); ++ ++ if (core_if == NULL) { ++ DWC_DEBUGPL(DBG_CIL, ++ "Allocation of dwc_otg_core_if_t failed\n"); ++ return 0; ++ } ++ core_if->core_global_regs = (dwc_otg_core_global_regs_t *) reg_base; ++ ++ /* ++ * Allocate the Device Mode structures. ++ */ ++ dev_if = DWC_ALLOC(sizeof(dwc_otg_dev_if_t)); ++ ++ if (dev_if == NULL) { ++ DWC_DEBUGPL(DBG_CIL, "Allocation of dwc_otg_dev_if_t failed\n"); ++ DWC_FREE(core_if); ++ return 0; ++ } ++ ++ dev_if->dev_global_regs = ++ (dwc_otg_device_global_regs_t *) (reg_base + ++ DWC_DEV_GLOBAL_REG_OFFSET); ++ ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ dev_if->in_ep_regs[i] = (dwc_otg_dev_in_ep_regs_t *) ++ (reg_base + DWC_DEV_IN_EP_REG_OFFSET + ++ (i * DWC_EP_REG_OFFSET)); ++ ++ dev_if->out_ep_regs[i] = (dwc_otg_dev_out_ep_regs_t *) ++ (reg_base + DWC_DEV_OUT_EP_REG_OFFSET + ++ (i * DWC_EP_REG_OFFSET)); ++ DWC_DEBUGPL(DBG_CILV, "in_ep_regs[%d]->diepctl=%p\n", ++ i, &dev_if->in_ep_regs[i]->diepctl); ++ DWC_DEBUGPL(DBG_CILV, "out_ep_regs[%d]->doepctl=%p\n", ++ i, &dev_if->out_ep_regs[i]->doepctl); ++ } ++ ++ dev_if->speed = 0; // unknown ++ ++ core_if->dev_if = dev_if; ++ ++ /* ++ * Allocate the Host Mode structures. ++ */ ++ host_if = DWC_ALLOC(sizeof(dwc_otg_host_if_t)); ++ ++ if (host_if == NULL) { ++ DWC_DEBUGPL(DBG_CIL, ++ "Allocation of dwc_otg_host_if_t failed\n"); ++ DWC_FREE(dev_if); ++ DWC_FREE(core_if); ++ return 0; ++ } ++ ++ host_if->host_global_regs = (dwc_otg_host_global_regs_t *) ++ (reg_base + DWC_OTG_HOST_GLOBAL_REG_OFFSET); ++ ++ host_if->hprt0 = ++ (uint32_t *) (reg_base + DWC_OTG_HOST_PORT_REGS_OFFSET); ++ ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ host_if->hc_regs[i] = (dwc_otg_hc_regs_t *) ++ (reg_base + DWC_OTG_HOST_CHAN_REGS_OFFSET + ++ (i * DWC_OTG_CHAN_REGS_OFFSET)); ++ DWC_DEBUGPL(DBG_CILV, "hc_reg[%d]->hcchar=%p\n", ++ i, &host_if->hc_regs[i]->hcchar); ++ } ++ ++ host_if->num_host_channels = MAX_EPS_CHANNELS; ++ core_if->host_if = host_if; ++ ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ core_if->data_fifo[i] = ++ (uint32_t *) (reg_base + DWC_OTG_DATA_FIFO_OFFSET + ++ (i * DWC_OTG_DATA_FIFO_SIZE)); ++ DWC_DEBUGPL(DBG_CILV, "data_fifo[%d]=0x%08lx\n", ++ i, (unsigned long)core_if->data_fifo[i]); ++ } ++ ++ core_if->pcgcctl = (uint32_t *) (reg_base + DWC_OTG_PCGCCTL_OFFSET); ++ ++ /* Initiate lx_state to L3 disconnected state */ ++ core_if->lx_state = DWC_OTG_L3; ++ /* ++ * Store the contents of the hardware configuration registers here for ++ * easy access later. ++ */ ++ core_if->hwcfg1.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->ghwcfg1); ++ core_if->hwcfg2.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->ghwcfg2); ++ core_if->hwcfg3.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->ghwcfg3); ++ core_if->hwcfg4.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->ghwcfg4); ++ ++ /* Force host mode to get HPTXFSIZ exact power on value */ ++ { ++ gusbcfg_data_t gusbcfg = {.d32 = 0 }; ++ gusbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ gusbcfg.b.force_host_mode = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32); ++ dwc_mdelay(100); ++ core_if->hptxfsiz.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz); ++ gusbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ gusbcfg.b.force_host_mode = 0; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32); ++ dwc_mdelay(100); ++ } ++ ++ DWC_DEBUGPL(DBG_CILV, "hwcfg1=%08x\n", core_if->hwcfg1.d32); ++ DWC_DEBUGPL(DBG_CILV, "hwcfg2=%08x\n", core_if->hwcfg2.d32); ++ DWC_DEBUGPL(DBG_CILV, "hwcfg3=%08x\n", core_if->hwcfg3.d32); ++ DWC_DEBUGPL(DBG_CILV, "hwcfg4=%08x\n", core_if->hwcfg4.d32); ++ ++ core_if->hcfg.d32 = ++ DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg); ++ core_if->dcfg.d32 = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ ++ DWC_DEBUGPL(DBG_CILV, "hcfg=%08x\n", core_if->hcfg.d32); ++ DWC_DEBUGPL(DBG_CILV, "dcfg=%08x\n", core_if->dcfg.d32); ++ ++ DWC_DEBUGPL(DBG_CILV, "op_mode=%0x\n", core_if->hwcfg2.b.op_mode); ++ DWC_DEBUGPL(DBG_CILV, "arch=%0x\n", core_if->hwcfg2.b.architecture); ++ DWC_DEBUGPL(DBG_CILV, "num_dev_ep=%d\n", core_if->hwcfg2.b.num_dev_ep); ++ DWC_DEBUGPL(DBG_CILV, "num_host_chan=%d\n", ++ core_if->hwcfg2.b.num_host_chan); ++ DWC_DEBUGPL(DBG_CILV, "nonperio_tx_q_depth=0x%0x\n", ++ core_if->hwcfg2.b.nonperio_tx_q_depth); ++ DWC_DEBUGPL(DBG_CILV, "host_perio_tx_q_depth=0x%0x\n", ++ core_if->hwcfg2.b.host_perio_tx_q_depth); ++ DWC_DEBUGPL(DBG_CILV, "dev_token_q_depth=0x%0x\n", ++ core_if->hwcfg2.b.dev_token_q_depth); ++ ++ DWC_DEBUGPL(DBG_CILV, "Total FIFO SZ=%d\n", ++ core_if->hwcfg3.b.dfifo_depth); ++ DWC_DEBUGPL(DBG_CILV, "xfer_size_cntr_width=%0x\n", ++ core_if->hwcfg3.b.xfer_size_cntr_width); ++ ++ /* ++ * Set the SRP sucess bit for FS-I2c ++ */ ++ core_if->srp_success = 0; ++ core_if->srp_timer_started = 0; ++ ++ /* ++ * Create new workqueue and init works ++ */ ++ core_if->wq_otg = DWC_WORKQ_ALLOC("dwc_otg"); ++ if (core_if->wq_otg == 0) { ++ DWC_WARN("DWC_WORKQ_ALLOC failed\n"); ++ DWC_FREE(host_if); ++ DWC_FREE(dev_if); ++ DWC_FREE(core_if); ++ return 0; ++ } ++ ++ core_if->snpsid = DWC_READ_REG32(&core_if->core_global_regs->gsnpsid); ++ ++ DWC_PRINTF("Core Release: %x.%x%x%x\n", ++ (core_if->snpsid >> 12 & 0xF), ++ (core_if->snpsid >> 8 & 0xF), ++ (core_if->snpsid >> 4 & 0xF), (core_if->snpsid & 0xF)); ++ ++ core_if->wkp_timer = DWC_TIMER_ALLOC("Wake Up Timer", ++ w_wakeup_detected, core_if); ++ if (core_if->wkp_timer == 0) { ++ DWC_WARN("DWC_TIMER_ALLOC failed\n"); ++ DWC_FREE(host_if); ++ DWC_FREE(dev_if); ++ DWC_WORKQ_FREE(core_if->wq_otg); ++ DWC_FREE(core_if); ++ return 0; ++ } ++ ++ if (dwc_otg_setup_params(core_if)) { ++ DWC_WARN("Error while setting core params\n"); ++ } ++ ++ core_if->hibernation_suspend = 0; ++ ++ /** ADP initialization */ ++ dwc_otg_adp_init(core_if); ++ ++ return core_if; ++} ++ ++/** ++ * This function frees the structures allocated by dwc_otg_cil_init(). ++ * ++ * @param core_if The core interface pointer returned from ++ * dwc_otg_cil_init(). ++ * ++ */ ++void dwc_otg_cil_remove(dwc_otg_core_if_t * core_if) ++{ ++ dctl_data_t dctl = {.d32 = 0 }; ++ DWC_DEBUGPL(DBG_CILV, "%s(%p)\n", __func__, core_if); ++ ++ /* Disable all interrupts */ ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, 1, 0); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, 0); ++ ++ dctl.b.sftdiscon = 1; ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, ++ dctl.d32); ++ } ++ ++ if (core_if->wq_otg) { ++ DWC_WORKQ_WAIT_WORK_DONE(core_if->wq_otg, 500); ++ DWC_WORKQ_FREE(core_if->wq_otg); ++ } ++ if (core_if->dev_if) { ++ DWC_FREE(core_if->dev_if); ++ } ++ if (core_if->host_if) { ++ DWC_FREE(core_if->host_if); ++ } ++ ++ /** Remove ADP Stuff */ ++ dwc_otg_adp_remove(core_if); ++ if (core_if->core_params) { ++ DWC_FREE(core_if->core_params); ++ } ++ if (core_if->wkp_timer) { ++ DWC_TIMER_FREE(core_if->wkp_timer); ++ } ++ if (core_if->srp_timer) { ++ DWC_TIMER_FREE(core_if->srp_timer); ++ } ++ DWC_FREE(core_if); ++} ++ ++/** ++ * This function enables the controller's Global Interrupt in the AHB Config ++ * register. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_enable_global_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ gahbcfg_data_t ahbcfg = {.d32 = 0 }; ++ ahbcfg.b.glblintrmsk = 1; /* Enable interrupts */ ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, 0, ahbcfg.d32); ++} ++ ++/** ++ * This function disables the controller's Global Interrupt in the AHB Config ++ * register. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_disable_global_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ gahbcfg_data_t ahbcfg = {.d32 = 0 }; ++ ahbcfg.b.glblintrmsk = 1; /* Disable interrupts */ ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gahbcfg, ahbcfg.d32, 0); ++} ++ ++/** ++ * This function initializes the commmon interrupts, used in both ++ * device and host modes. ++ * ++ * @param core_if Programming view of the DWC_otg controller ++ * ++ */ ++static void dwc_otg_enable_common_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ /* Clear any pending OTG Interrupts */ ++ DWC_WRITE_REG32(&global_regs->gotgint, 0xFFFFFFFF); ++ ++ /* Clear any pending interrupts */ ++ DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* ++ * Enable the interrupts in the GINTMSK. ++ */ ++ intr_mask.b.modemismatch = 1; ++ intr_mask.b.otgintr = 1; ++ ++ if (!core_if->dma_enable) { ++ intr_mask.b.rxstsqlvl = 1; ++ } ++ ++ intr_mask.b.conidstschng = 1; ++ intr_mask.b.wkupintr = 1; ++ intr_mask.b.disconnect = 0; ++ intr_mask.b.usbsuspend = 1; ++ intr_mask.b.sessreqintr = 1; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ if (core_if->core_params->lpm_enable) { ++ intr_mask.b.lpmtranrcvd = 1; ++ } ++#endif ++ DWC_WRITE_REG32(&global_regs->gintmsk, intr_mask.d32); ++} ++ ++/* ++ * The restore operation is modified to support Synopsys Emulated Powerdown and ++ * Hibernation. This function is for exiting from Device mode hibernation by ++ * Host Initiated Resume/Reset and Device Initiated Remote-Wakeup. ++ * @param core_if Programming view of DWC_otg controller. ++ * @param rem_wakeup - indicates whether resume is initiated by Device or Host. ++ * @param reset - indicates whether resume is initiated by Reset. ++ */ ++int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if, ++ int rem_wakeup, int reset) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ dctl_data_t dctl = {.d32 = 0 }; ++ ++ int timeout = 2000; ++ ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "%s called\n", __FUNCTION__); ++ /* Switch-on voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Assert Restore signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.restore = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ if (rem_wakeup) { ++ dwc_udelay(70); ++ } ++ ++ /* Deassert Reset core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Mask interrupts from gpwrdn */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.connect_det_msk = 1; ++ gpwrdn.b.srp_det_msk = 1; ++ gpwrdn.b.disconn_det_msk = 1; ++ gpwrdn.b.rst_det_msk = 1; ++ gpwrdn.b.lnstchng_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Indicates that we are going out from hibernation */ ++ core_if->hibernation_suspend = 0; ++ ++ /* ++ * Set Restore Essential Regs bit in PCGCCTL register, restore_mode = 1 ++ * indicates restore from remote_wakeup ++ */ ++ restore_essential_regs(core_if, rem_wakeup, 0); ++ ++ /* ++ * Wait a little for seeing new value of variable hibernation_suspend if ++ * Restore done interrupt received before polling ++ */ ++ dwc_udelay(10); ++ ++ if (core_if->hibernation_suspend == 0) { ++ /* ++ * Wait For Restore_done Interrupt. This mechanism of polling the ++ * interrupt is introduced to avoid any possible race conditions ++ */ ++ do { ++ gintsts_data_t gintsts; ++ gintsts.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ if (gintsts.b.restoredone) { ++ gintsts.d32 = 0; ++ gintsts.b.restoredone = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs-> ++ gintsts, gintsts.d32); ++ DWC_PRINTF("Restore Done Interrupt seen\n"); ++ break; ++ } ++ dwc_udelay(10); ++ } while (--timeout); ++ if (!timeout) { ++ DWC_PRINTF("Restore Done interrupt wasn't generated here\n"); ++ } ++ } ++ /* Clear all pending interupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* De-assert Restore */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.restore = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ if (!rem_wakeup) { ++ pcgcctl.d32 = 0; ++ pcgcctl.b.rstpdwnmodule = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ } ++ ++ /* Restore GUSBCFG and DCFG */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, ++ core_if->gr_backup->gusbcfg_local); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, ++ core_if->dr_backup->dcfg); ++ ++ /* De-assert Wakeup Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ if (!rem_wakeup) { ++ /* Set Device programming done bit */ ++ dctl.b.pwronprgdone = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ } else { ++ /* Start Remote Wakeup Signaling */ ++ dctl.d32 = core_if->dr_backup->dctl; ++ dctl.b.rmtwkupsig = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32); ++ } ++ ++ dwc_mdelay(2); ++ /* Clear all pending interupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Restore global registers */ ++ dwc_otg_restore_global_regs(core_if); ++ /* Restore device global registers */ ++ dwc_otg_restore_dev_regs(core_if, rem_wakeup); ++ ++ if (rem_wakeup) { ++ dwc_mdelay(7); ++ dctl.d32 = 0; ++ dctl.b.rmtwkupsig = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, 0); ++ } ++ ++ core_if->hibernation_suspend = 0; ++ /* The core will be in ON STATE */ ++ core_if->lx_state = DWC_OTG_L0; ++ DWC_PRINTF("Hibernation recovery completes here\n"); ++ ++ return 1; ++} ++ ++/* ++ * The restore operation is modified to support Synopsys Emulated Powerdown and ++ * Hibernation. This function is for exiting from Host mode hibernation by ++ * Host Initiated Resume/Reset and Device Initiated Remote-Wakeup. ++ * @param core_if Programming view of DWC_otg controller. ++ * @param rem_wakeup - indicates whether resume is initiated by Device or Host. ++ * @param reset - indicates whether resume is initiated by Reset. ++ */ ++int dwc_otg_host_hibernation_restore(dwc_otg_core_if_t * core_if, ++ int rem_wakeup, int reset) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ ++ int timeout = 2000; ++ ++ DWC_DEBUGPL(DBG_HCD, "%s called\n", __FUNCTION__); ++ /* Switch-on voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Assert Restore signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.restore = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ if (!rem_wakeup) { ++ dwc_udelay(50); ++ } ++ ++ /* Deassert Reset core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.connect_det_msk = 1; ++ gpwrdn.b.srp_det_msk = 1; ++ gpwrdn.b.disconn_det_msk = 1; ++ gpwrdn.b.rst_det_msk = 1; ++ gpwrdn.b.lnstchng_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Indicates that we are going out from hibernation */ ++ core_if->hibernation_suspend = 0; ++ ++ /* Set Restore Essential Regs bit in PCGCCTL register */ ++ restore_essential_regs(core_if, rem_wakeup, 1); ++ ++ /* Wait a little for seeing new value of variable hibernation_suspend if ++ * Restore done interrupt received before polling */ ++ dwc_udelay(10); ++ ++ if (core_if->hibernation_suspend == 0) { ++ /* Wait For Restore_done Interrupt. This mechanism of polling the ++ * interrupt is introduced to avoid any possible race conditions ++ */ ++ do { ++ gintsts_data_t gintsts; ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ if (gintsts.b.restoredone) { ++ gintsts.d32 = 0; ++ gintsts.b.restoredone = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ DWC_DEBUGPL(DBG_HCD,"Restore Done Interrupt seen\n"); ++ break; ++ } ++ dwc_udelay(10); ++ } while (--timeout); ++ if (!timeout) { ++ DWC_WARN("Restore Done interrupt wasn't generated\n"); ++ } ++ } ++ ++ /* Set the flag's value to 0 again after receiving restore done interrupt */ ++ core_if->hibernation_suspend = 0; ++ ++ /* This step is not described in functional spec but if not wait for this ++ * delay, mismatch interrupts occurred because just after restore core is ++ * in Device mode(gintsts.curmode == 0) */ ++ dwc_mdelay(100); ++ ++ /* Clear all pending interrupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* De-assert Restore */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.restore = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Restore GUSBCFG and HCFG */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, ++ core_if->gr_backup->gusbcfg_local); ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, ++ core_if->hr_backup->hcfg_local); ++ ++ /* De-assert Wakeup Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Start the Resume operation by programming HPRT0 */ ++ hprt0.d32 = core_if->hr_backup->hprt0_local; ++ hprt0.b.prtpwr = 1; ++ hprt0.b.prtena = 0; ++ hprt0.b.prtsusp = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ DWC_PRINTF("Resume Starts Now\n"); ++ if (!reset) { // Indicates it is Resume Operation ++ hprt0.d32 = core_if->hr_backup->hprt0_local; ++ hprt0.b.prtres = 1; ++ hprt0.b.prtpwr = 1; ++ hprt0.b.prtena = 0; ++ hprt0.b.prtsusp = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ if (!rem_wakeup) ++ hprt0.b.prtres = 0; ++ /* Wait for Resume time and then program HPRT again */ ++ dwc_mdelay(100); ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ } else { // Indicates it is Reset Operation ++ hprt0.d32 = core_if->hr_backup->hprt0_local; ++ hprt0.b.prtrst = 1; ++ hprt0.b.prtpwr = 1; ++ hprt0.b.prtena = 0; ++ hprt0.b.prtsusp = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ /* Wait for Reset time and then program HPRT again */ ++ dwc_mdelay(60); ++ hprt0.b.prtrst = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ } ++ /* Clear all interrupt status */ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtconndet = 1; ++ hprt0.b.prtenchng = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ /* Clear all pending interupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Restore global registers */ ++ dwc_otg_restore_global_regs(core_if); ++ /* Restore host global registers */ ++ dwc_otg_restore_host_regs(core_if, reset); ++ ++ /* The core will be in ON STATE */ ++ core_if->lx_state = DWC_OTG_L0; ++ DWC_PRINTF("Hibernation recovery is complete here\n"); ++ return 0; ++} ++ ++/** Saves some register values into system memory. */ ++int dwc_otg_save_global_regs(dwc_otg_core_if_t * core_if) ++{ ++ struct dwc_otg_global_regs_backup *gr; ++ int i; ++ ++ gr = core_if->gr_backup; ++ if (!gr) { ++ gr = DWC_ALLOC(sizeof(*gr)); ++ if (!gr) { ++ return -DWC_E_NO_MEMORY; ++ } ++ core_if->gr_backup = gr; ++ } ++ ++ gr->gotgctl_local = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ gr->gintmsk_local = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ gr->gahbcfg_local = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg); ++ gr->gusbcfg_local = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ gr->grxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz); ++ gr->gnptxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz); ++ gr->hptxfsiz_local = DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ gr->glpmcfg_local = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++#endif ++ gr->gi2cctl_local = DWC_READ_REG32(&core_if->core_global_regs->gi2cctl); ++ gr->pcgcctl_local = DWC_READ_REG32(core_if->pcgcctl); ++ gr->gdfifocfg_local = ++ DWC_READ_REG32(&core_if->core_global_regs->gdfifocfg); ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ gr->dtxfsiz_local[i] = ++ DWC_READ_REG32(&(core_if->core_global_regs->dtxfsiz[i])); ++ } ++ ++ DWC_DEBUGPL(DBG_ANY, "===========Backing Global registers==========\n"); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gotgctl = %08x\n", gr->gotgctl_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gintmsk = %08x\n", gr->gintmsk_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gahbcfg = %08x\n", gr->gahbcfg_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gusbcfg = %08x\n", gr->gusbcfg_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up grxfsiz = %08x\n", gr->grxfsiz_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gnptxfsiz = %08x\n", ++ gr->gnptxfsiz_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up hptxfsiz = %08x\n", ++ gr->hptxfsiz_local); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ DWC_DEBUGPL(DBG_ANY, "Backed up glpmcfg = %08x\n", gr->glpmcfg_local); ++#endif ++ DWC_DEBUGPL(DBG_ANY, "Backed up gi2cctl = %08x\n", gr->gi2cctl_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up pcgcctl = %08x\n", gr->pcgcctl_local); ++ DWC_DEBUGPL(DBG_ANY,"Backed up gdfifocfg = %08x\n",gr->gdfifocfg_local); ++ ++ return 0; ++} ++ ++/** Saves GINTMSK register before setting the msk bits. */ ++int dwc_otg_save_gintmsk_reg(dwc_otg_core_if_t * core_if) ++{ ++ struct dwc_otg_global_regs_backup *gr; ++ ++ gr = core_if->gr_backup; ++ if (!gr) { ++ gr = DWC_ALLOC(sizeof(*gr)); ++ if (!gr) { ++ return -DWC_E_NO_MEMORY; ++ } ++ core_if->gr_backup = gr; ++ } ++ ++ gr->gintmsk_local = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ ++ DWC_DEBUGPL(DBG_ANY,"=============Backing GINTMSK registers============\n"); ++ DWC_DEBUGPL(DBG_ANY, "Backed up gintmsk = %08x\n", gr->gintmsk_local); ++ ++ return 0; ++} ++ ++int dwc_otg_save_dev_regs(dwc_otg_core_if_t * core_if) ++{ ++ struct dwc_otg_dev_regs_backup *dr; ++ int i; ++ ++ dr = core_if->dr_backup; ++ if (!dr) { ++ dr = DWC_ALLOC(sizeof(*dr)); ++ if (!dr) { ++ return -DWC_E_NO_MEMORY; ++ } ++ core_if->dr_backup = dr; ++ } ++ ++ dr->dcfg = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ dr->dctl = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl); ++ dr->daintmsk = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk); ++ dr->diepmsk = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->diepmsk); ++ dr->doepmsk = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->doepmsk); ++ ++ for (i = 0; i < core_if->dev_if->num_in_eps; ++i) { ++ dr->diepctl[i] = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl); ++ dr->dieptsiz[i] = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->dieptsiz); ++ dr->diepdma[i] = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepdma); ++ } ++ ++ DWC_DEBUGPL(DBG_ANY, ++ "=============Backing Host registers==============\n"); ++ DWC_DEBUGPL(DBG_ANY, "Backed up dcfg = %08x\n", dr->dcfg); ++ DWC_DEBUGPL(DBG_ANY, "Backed up dctl = %08x\n", dr->dctl); ++ DWC_DEBUGPL(DBG_ANY, "Backed up daintmsk = %08x\n", ++ dr->daintmsk); ++ DWC_DEBUGPL(DBG_ANY, "Backed up diepmsk = %08x\n", dr->diepmsk); ++ DWC_DEBUGPL(DBG_ANY, "Backed up doepmsk = %08x\n", dr->doepmsk); ++ for (i = 0; i < core_if->dev_if->num_in_eps; ++i) { ++ DWC_DEBUGPL(DBG_ANY, "Backed up diepctl[%d] = %08x\n", i, ++ dr->diepctl[i]); ++ DWC_DEBUGPL(DBG_ANY, "Backed up dieptsiz[%d] = %08x\n", ++ i, dr->dieptsiz[i]); ++ DWC_DEBUGPL(DBG_ANY, "Backed up diepdma[%d] = %08x\n", i, ++ dr->diepdma[i]); ++ } ++ ++ return 0; ++} ++ ++int dwc_otg_save_host_regs(dwc_otg_core_if_t * core_if) ++{ ++ struct dwc_otg_host_regs_backup *hr; ++ int i; ++ ++ hr = core_if->hr_backup; ++ if (!hr) { ++ hr = DWC_ALLOC(sizeof(*hr)); ++ if (!hr) { ++ return -DWC_E_NO_MEMORY; ++ } ++ core_if->hr_backup = hr; ++ } ++ ++ hr->hcfg_local = ++ DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg); ++ hr->haintmsk_local = ++ DWC_READ_REG32(&core_if->host_if->host_global_regs->haintmsk); ++ for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) { ++ hr->hcintmsk_local[i] = ++ DWC_READ_REG32(&core_if->host_if->hc_regs[i]->hcintmsk); ++ } ++ hr->hprt0_local = DWC_READ_REG32(core_if->host_if->hprt0); ++ hr->hfir_local = ++ DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir); ++ ++ DWC_DEBUGPL(DBG_ANY, ++ "=============Backing Host registers===============\n"); ++ DWC_DEBUGPL(DBG_ANY, "Backed up hcfg = %08x\n", ++ hr->hcfg_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up haintmsk = %08x\n", hr->haintmsk_local); ++ for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) { ++ DWC_DEBUGPL(DBG_ANY, "Backed up hcintmsk[%02d]=%08x\n", i, ++ hr->hcintmsk_local[i]); ++ } ++ DWC_DEBUGPL(DBG_ANY, "Backed up hprt0 = %08x\n", ++ hr->hprt0_local); ++ DWC_DEBUGPL(DBG_ANY, "Backed up hfir = %08x\n", ++ hr->hfir_local); ++ ++ return 0; ++} ++ ++int dwc_otg_restore_global_regs(dwc_otg_core_if_t *core_if) ++{ ++ struct dwc_otg_global_regs_backup *gr; ++ int i; ++ ++ gr = core_if->gr_backup; ++ if (!gr) { ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, gr->gotgctl_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gr->gintmsk_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gr->gusbcfg_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, gr->gahbcfg_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->grxfsiz, gr->grxfsiz_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gnptxfsiz, ++ gr->gnptxfsiz_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->hptxfsiz, ++ gr->hptxfsiz_local); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gdfifocfg, ++ gr->gdfifocfg_local); ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ DWC_WRITE_REG32(&core_if->core_global_regs->dtxfsiz[i], ++ gr->dtxfsiz_local[i]); ++ } ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ DWC_WRITE_REG32(core_if->host_if->hprt0, 0x0000100A); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, ++ (gr->gahbcfg_local)); ++ return 0; ++} ++ ++int dwc_otg_restore_dev_regs(dwc_otg_core_if_t * core_if, int rem_wakeup) ++{ ++ struct dwc_otg_dev_regs_backup *dr; ++ int i; ++ ++ dr = core_if->dr_backup; ++ ++ if (!dr) { ++ return -DWC_E_INVALID; ++ } ++ ++ if (!rem_wakeup) { ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, ++ dr->dctl); ++ } ++ ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->daintmsk, dr->daintmsk); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->diepmsk, dr->diepmsk); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->doepmsk, dr->doepmsk); ++ ++ for (i = 0; i < core_if->dev_if->num_in_eps; ++i) { ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->dieptsiz, dr->dieptsiz[i]); ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->diepdma, dr->diepdma[i]); ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl, dr->diepctl[i]); ++ } ++ ++ return 0; ++} ++ ++int dwc_otg_restore_host_regs(dwc_otg_core_if_t * core_if, int reset) ++{ ++ struct dwc_otg_host_regs_backup *hr; ++ int i; ++ hr = core_if->hr_backup; ++ ++ if (!hr) { ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hr->hcfg_local); ++ //if (!reset) ++ //{ ++ // DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hfir, hr->hfir_local); ++ //} ++ ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->haintmsk, ++ hr->haintmsk_local); ++ for (i = 0; i < dwc_otg_get_param_host_channels(core_if); ++i) { ++ DWC_WRITE_REG32(&core_if->host_if->hc_regs[i]->hcintmsk, ++ hr->hcintmsk_local[i]); ++ } ++ ++ return 0; ++} ++ ++int restore_lpm_i2c_regs(dwc_otg_core_if_t * core_if) ++{ ++ struct dwc_otg_global_regs_backup *gr; ++ ++ gr = core_if->gr_backup; ++ ++ /* Restore values for LPM and I2C */ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, gr->glpmcfg_local); ++#endif ++ DWC_WRITE_REG32(&core_if->core_global_regs->gi2cctl, gr->gi2cctl_local); ++ ++ return 0; ++} ++ ++int restore_essential_regs(dwc_otg_core_if_t * core_if, int rmode, int is_host) ++{ ++ struct dwc_otg_global_regs_backup *gr; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ gahbcfg_data_t gahbcfg = {.d32 = 0 }; ++ gusbcfg_data_t gusbcfg = {.d32 = 0 }; ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ ++ /* Restore LPM and I2C registers */ ++ restore_lpm_i2c_regs(core_if); ++ ++ /* Set PCGCCTL to 0 */ ++ DWC_WRITE_REG32(core_if->pcgcctl, 0x00000000); ++ ++ gr = core_if->gr_backup; ++ /* Load restore values for [31:14] bits */ ++ DWC_WRITE_REG32(core_if->pcgcctl, ++ ((gr->pcgcctl_local & 0xffffc000) | 0x00020000)); ++ ++ /* Umnask global Interrupt in GAHBCFG and restore it */ ++ gahbcfg.d32 = gr->gahbcfg_local; ++ gahbcfg.b.glblintrmsk = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, gahbcfg.d32); ++ ++ /* Clear all pending interupts */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Unmask restore done interrupt */ ++ gintmsk.b.restoredone = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32); ++ ++ /* Restore GUSBCFG and HCFG/DCFG */ ++ gusbcfg.d32 = core_if->gr_backup->gusbcfg_local; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, gusbcfg.d32); ++ ++ if (is_host) { ++ hcfg_data_t hcfg = {.d32 = 0 }; ++ hcfg.d32 = core_if->hr_backup->hcfg_local; ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, ++ hcfg.d32); ++ ++ /* Load restore values for [31:14] bits */ ++ pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000; ++ pcgcctl.d32 = gr->pcgcctl_local | 0x00020000; ++ ++ if (rmode) ++ pcgcctl.b.restoremode = 1; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ dwc_udelay(10); ++ ++ /* Load restore values for [31:14] bits and set EssRegRestored bit */ ++ pcgcctl.d32 = gr->pcgcctl_local | 0xffffc000; ++ pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000; ++ pcgcctl.b.ess_reg_restored = 1; ++ if (rmode) ++ pcgcctl.b.restoremode = 1; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ } else { ++ dcfg_data_t dcfg = {.d32 = 0 }; ++ dcfg.d32 = core_if->dr_backup->dcfg; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ /* Load restore values for [31:14] bits */ ++ pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000; ++ pcgcctl.d32 = gr->pcgcctl_local | 0x00020000; ++ if (!rmode) { ++ pcgcctl.d32 |= 0x208; ++ } ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ dwc_udelay(10); ++ ++ /* Load restore values for [31:14] bits */ ++ pcgcctl.d32 = gr->pcgcctl_local & 0xffffc000; ++ pcgcctl.d32 = gr->pcgcctl_local | 0x00020000; ++ pcgcctl.b.ess_reg_restored = 1; ++ if (!rmode) ++ pcgcctl.d32 |= 0x208; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ } ++ ++ return 0; ++} ++ ++/** ++ * Initializes the FSLSPClkSel field of the HCFG register depending on the PHY ++ * type. ++ */ ++static void init_fslspclksel(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t val; ++ hcfg_data_t hcfg; ++ ++ if (((core_if->hwcfg2.b.hs_phy_type == 2) && ++ (core_if->hwcfg2.b.fs_phy_type == 1) && ++ (core_if->core_params->ulpi_fs_ls)) || ++ (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) { ++ /* Full speed PHY */ ++ val = DWC_HCFG_48_MHZ; ++ } else { ++ /* High speed PHY running at full speed or high speed */ ++ val = DWC_HCFG_30_60_MHZ; ++ } ++ ++ DWC_DEBUGPL(DBG_CIL, "Initializing HCFG.FSLSPClkSel to 0x%1x\n", val); ++ hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg); ++ hcfg.b.fslspclksel = val; ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hcfg.d32); ++} ++ ++/** ++ * Initializes the DevSpd field of the DCFG register depending on the PHY type ++ * and the enumeration speed of the device. ++ */ ++static void init_devspd(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t val; ++ dcfg_data_t dcfg; ++ ++ if (((core_if->hwcfg2.b.hs_phy_type == 2) && ++ (core_if->hwcfg2.b.fs_phy_type == 1) && ++ (core_if->core_params->ulpi_fs_ls)) || ++ (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) { ++ /* Full speed PHY */ ++ val = 0x3; ++ } else if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL) { ++ /* High speed PHY running at full speed */ ++ val = 0x1; ++ } else { ++ /* High speed PHY running at high speed */ ++ val = 0x0; ++ } ++ ++ DWC_DEBUGPL(DBG_CIL, "Initializing DCFG.DevSpd to 0x%1x\n", val); ++ ++ dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ dcfg.b.devspd = val; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32); ++} ++ ++/** ++ * This function calculates the number of IN EPS ++ * using GHWCFG1 and GHWCFG2 registers values ++ * ++ * @param core_if Programming view of the DWC_otg controller ++ */ ++static uint32_t calc_num_in_eps(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t num_in_eps = 0; ++ uint32_t num_eps = core_if->hwcfg2.b.num_dev_ep; ++ uint32_t hwcfg1 = core_if->hwcfg1.d32 >> 3; ++ uint32_t num_tx_fifos = core_if->hwcfg4.b.num_in_eps; ++ int i; ++ ++ for (i = 0; i < num_eps; ++i) { ++ if (!(hwcfg1 & 0x1)) ++ num_in_eps++; ++ ++ hwcfg1 >>= 2; ++ } ++ ++ if (core_if->hwcfg4.b.ded_fifo_en) { ++ num_in_eps = ++ (num_in_eps > num_tx_fifos) ? num_tx_fifos : num_in_eps; ++ } ++ ++ return num_in_eps; ++} ++ ++/** ++ * This function calculates the number of OUT EPS ++ * using GHWCFG1 and GHWCFG2 registers values ++ * ++ * @param core_if Programming view of the DWC_otg controller ++ */ ++static uint32_t calc_num_out_eps(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t num_out_eps = 0; ++ uint32_t num_eps = core_if->hwcfg2.b.num_dev_ep; ++ uint32_t hwcfg1 = core_if->hwcfg1.d32 >> 2; ++ int i; ++ ++ for (i = 0; i < num_eps; ++i) { ++ if (!(hwcfg1 & 0x1)) ++ num_out_eps++; ++ ++ hwcfg1 >>= 2; ++ } ++ return num_out_eps; ++} ++ ++/** ++ * This function initializes the DWC_otg controller registers and ++ * prepares the core for device mode or host mode operation. ++ * ++ * @param core_if Programming view of the DWC_otg controller ++ * ++ */ ++void dwc_otg_core_init(dwc_otg_core_if_t * core_if) ++{ ++ int i = 0; ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ gahbcfg_data_t ahbcfg = {.d32 = 0 }; ++ gusbcfg_data_t usbcfg = {.d32 = 0 }; ++ gi2cctl_data_t i2cctl = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_CILV, "dwc_otg_core_init(%p) regs at %p\n", ++ core_if, global_regs); ++ ++ /* Common Initialization */ ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ ++ /* Program the ULPI External VBUS bit if needed */ ++ usbcfg.b.ulpi_ext_vbus_drv = ++ (core_if->core_params->phy_ulpi_ext_vbus == ++ DWC_PHY_ULPI_EXTERNAL_VBUS) ? 1 : 0; ++ ++ /* Set external TS Dline pulsing */ ++ usbcfg.b.term_sel_dl_pulse = ++ (core_if->core_params->ts_dline == 1) ? 1 : 0; ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ ++ /* Reset the Controller */ ++ dwc_otg_core_reset(core_if); ++ ++ core_if->adp_enable = core_if->core_params->adp_supp_enable; ++ core_if->power_down = core_if->core_params->power_down; ++ core_if->otg_sts = 0; ++ ++ /* Initialize parameters from Hardware configuration registers. */ ++ dev_if->num_in_eps = calc_num_in_eps(core_if); ++ dev_if->num_out_eps = calc_num_out_eps(core_if); ++ ++ DWC_DEBUGPL(DBG_CIL, "num_dev_perio_in_ep=%d\n", ++ core_if->hwcfg4.b.num_dev_perio_in_ep); ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; i++) { ++ dev_if->perio_tx_fifo_size[i] = ++ DWC_READ_REG32(&global_regs->dtxfsiz[i]) >> 16; ++ DWC_DEBUGPL(DBG_CIL, "Periodic Tx FIFO SZ #%d=0x%0x\n", ++ i, dev_if->perio_tx_fifo_size[i]); ++ } ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ dev_if->tx_fifo_size[i] = ++ DWC_READ_REG32(&global_regs->dtxfsiz[i]) >> 16; ++ DWC_DEBUGPL(DBG_CIL, "Tx FIFO SZ #%d=0x%0x\n", ++ i, dev_if->tx_fifo_size[i]); ++ } ++ ++ core_if->total_fifo_size = core_if->hwcfg3.b.dfifo_depth; ++ core_if->rx_fifo_size = DWC_READ_REG32(&global_regs->grxfsiz); ++ core_if->nperio_tx_fifo_size = ++ DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16; ++ ++ DWC_DEBUGPL(DBG_CIL, "Total FIFO SZ=%d\n", core_if->total_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "Rx FIFO SZ=%d\n", core_if->rx_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO SZ=%d\n", ++ core_if->nperio_tx_fifo_size); ++ ++ /* This programming sequence needs to happen in FS mode before any other ++ * programming occurs */ ++ if ((core_if->core_params->speed == DWC_SPEED_PARAM_FULL) && ++ (core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS)) { ++ /* If FS mode with FS PHY */ ++ ++ /* core_init() is now called on every switch so only call the ++ * following for the first time through. */ ++ if (!core_if->phy_init_done) { ++ core_if->phy_init_done = 1; ++ DWC_DEBUGPL(DBG_CIL, "FS_PHY detected\n"); ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ usbcfg.b.physel = 1; ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ ++ /* Reset after a PHY select */ ++ dwc_otg_core_reset(core_if); ++ } ++ ++ /* Program DCFG.DevSpd or HCFG.FSLSPclkSel to 48Mhz in FS. Also ++ * do this on HNP Dev/Host mode switches (done in dev_init and ++ * host_init). */ ++ if (dwc_otg_is_host_mode(core_if)) { ++ init_fslspclksel(core_if); ++ } else { ++ init_devspd(core_if); ++ } ++ ++ if (core_if->core_params->i2c_enable) { ++ DWC_DEBUGPL(DBG_CIL, "FS_PHY Enabling I2c\n"); ++ /* Program GUSBCFG.OtgUtmifsSel to I2C */ ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ usbcfg.b.otgutmifssel = 1; ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ ++ /* Program GI2CCTL.I2CEn */ ++ i2cctl.d32 = DWC_READ_REG32(&global_regs->gi2cctl); ++ i2cctl.b.i2cdevaddr = 1; ++ i2cctl.b.i2cen = 0; ++ DWC_WRITE_REG32(&global_regs->gi2cctl, i2cctl.d32); ++ i2cctl.b.i2cen = 1; ++ DWC_WRITE_REG32(&global_regs->gi2cctl, i2cctl.d32); ++ } ++ ++ } /* endif speed == DWC_SPEED_PARAM_FULL */ ++ else { ++ /* High speed PHY. */ ++ if (!core_if->phy_init_done) { ++ core_if->phy_init_done = 1; ++ /* HS PHY parameters. These parameters are preserved ++ * during soft reset so only program the first time. Do ++ * a soft reset immediately after setting phyif. */ ++ ++ if (core_if->core_params->phy_type == 2) { ++ /* ULPI interface */ ++ usbcfg.b.ulpi_utmi_sel = 1; ++ usbcfg.b.phyif = 0; ++ usbcfg.b.ddrsel = ++ core_if->core_params->phy_ulpi_ddr; ++ } else if (core_if->core_params->phy_type == 1) { ++ /* UTMI+ interface */ ++ usbcfg.b.ulpi_utmi_sel = 0; ++ if (core_if->core_params->phy_utmi_width == 16) { ++ usbcfg.b.phyif = 1; ++ ++ } else { ++ usbcfg.b.phyif = 0; ++ } ++ } else { ++ DWC_ERROR("FS PHY TYPE\n"); ++ } ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ /* Reset after setting the PHY parameters */ ++ dwc_otg_core_reset(core_if); ++ } ++ } ++ ++ if ((core_if->hwcfg2.b.hs_phy_type == 2) && ++ (core_if->hwcfg2.b.fs_phy_type == 1) && ++ (core_if->core_params->ulpi_fs_ls)) { ++ DWC_DEBUGPL(DBG_CIL, "Setting ULPI FSLS\n"); ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ usbcfg.b.ulpi_fsls = 1; ++ usbcfg.b.ulpi_clk_sus_m = 1; ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ } else { ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ usbcfg.b.ulpi_fsls = 0; ++ usbcfg.b.ulpi_clk_sus_m = 0; ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ } ++ ++ /* Program the GAHBCFG Register. */ ++ switch (core_if->hwcfg2.b.architecture) { ++ ++ case DWC_SLAVE_ONLY_ARCH: ++ DWC_DEBUGPL(DBG_CIL, "Slave Only Mode\n"); ++ ahbcfg.b.nptxfemplvl_txfemplvl = ++ DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY; ++ ahbcfg.b.ptxfemplvl = DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY; ++ core_if->dma_enable = 0; ++ core_if->dma_desc_enable = 0; ++ break; ++ ++ case DWC_EXT_DMA_ARCH: ++ DWC_DEBUGPL(DBG_CIL, "External DMA Mode\n"); ++ { ++ uint8_t brst_sz = core_if->core_params->dma_burst_size; ++ ahbcfg.b.hburstlen = 0; ++ while (brst_sz > 1) { ++ ahbcfg.b.hburstlen++; ++ brst_sz >>= 1; ++ } ++ } ++ core_if->dma_enable = (core_if->core_params->dma_enable != 0); ++ core_if->dma_desc_enable = ++ (core_if->core_params->dma_desc_enable != 0); ++ break; ++ ++ case DWC_INT_DMA_ARCH: ++ DWC_DEBUGPL(DBG_CIL, "Internal DMA Mode\n"); ++ /* Old value was DWC_GAHBCFG_INT_DMA_BURST_INCR - done for ++ Host mode ISOC in issue fix - vahrama */ ++ /* Broadcom had altered to (1<<3)|(0<<0) - WRESP=1, max 4 beats */ ++ ahbcfg.b.hburstlen = (1<<3)|(0<<0);//DWC_GAHBCFG_INT_DMA_BURST_INCR4; ++ core_if->dma_enable = (core_if->core_params->dma_enable != 0); ++ core_if->dma_desc_enable = ++ (core_if->core_params->dma_desc_enable != 0); ++ break; ++ ++ } ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable) { ++ DWC_PRINTF("Using Descriptor DMA mode\n"); ++ } else { ++ DWC_PRINTF("Using Buffer DMA mode\n"); ++ ++ } ++ } else { ++ DWC_PRINTF("Using Slave mode\n"); ++ core_if->dma_desc_enable = 0; ++ } ++ ++ if (core_if->core_params->ahb_single) { ++ ahbcfg.b.ahbsingle = 1; ++ } ++ ++ ahbcfg.b.dmaenable = core_if->dma_enable; ++ DWC_WRITE_REG32(&global_regs->gahbcfg, ahbcfg.d32); ++ ++ core_if->en_multiple_tx_fifo = core_if->hwcfg4.b.ded_fifo_en; ++ ++ core_if->pti_enh_enable = core_if->core_params->pti_enable != 0; ++ core_if->multiproc_int_enable = core_if->core_params->mpi_enable; ++ DWC_PRINTF("Periodic Transfer Interrupt Enhancement - %s\n", ++ ((core_if->pti_enh_enable) ? "enabled" : "disabled")); ++ DWC_PRINTF("Multiprocessor Interrupt Enhancement - %s\n", ++ ((core_if->multiproc_int_enable) ? "enabled" : "disabled")); ++ ++ /* ++ * Program the GUSBCFG register. ++ */ ++ usbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ ++ switch (core_if->hwcfg2.b.op_mode) { ++ case DWC_MODE_HNP_SRP_CAPABLE: ++ usbcfg.b.hnpcap = (core_if->core_params->otg_cap == ++ DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE); ++ usbcfg.b.srpcap = (core_if->core_params->otg_cap != ++ DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE); ++ break; ++ ++ case DWC_MODE_SRP_ONLY_CAPABLE: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = (core_if->core_params->otg_cap != ++ DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE); ++ break; ++ ++ case DWC_MODE_NO_HNP_SRP_CAPABLE: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = 0; ++ break; ++ ++ case DWC_MODE_SRP_CAPABLE_DEVICE: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = (core_if->core_params->otg_cap != ++ DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE); ++ break; ++ ++ case DWC_MODE_NO_SRP_CAPABLE_DEVICE: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = 0; ++ break; ++ ++ case DWC_MODE_SRP_CAPABLE_HOST: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = (core_if->core_params->otg_cap != ++ DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE); ++ break; ++ ++ case DWC_MODE_NO_SRP_CAPABLE_HOST: ++ usbcfg.b.hnpcap = 0; ++ usbcfg.b.srpcap = 0; ++ break; ++ } ++ ++ DWC_WRITE_REG32(&global_regs->gusbcfg, usbcfg.d32); ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ if (core_if->core_params->lpm_enable) { ++ glpmcfg_data_t lpmcfg = {.d32 = 0 }; ++ ++ /* To enable LPM support set lpm_cap_en bit */ ++ lpmcfg.b.lpm_cap_en = 1; ++ ++ /* Make AppL1Res ACK */ ++ lpmcfg.b.appl_resp = 1; ++ ++ /* Retry 3 times */ ++ lpmcfg.b.retry_count = 3; ++ ++ DWC_MODIFY_REG32(&core_if->core_global_regs->glpmcfg, ++ 0, lpmcfg.d32); ++ ++ } ++#endif ++ if (core_if->core_params->ic_usb_cap) { ++ gusbcfg_data_t gusbcfg = {.d32 = 0 }; ++ gusbcfg.b.ic_usb_cap = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gusbcfg, ++ 0, gusbcfg.d32); ++ } ++ { ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ gotgctl.b.otgver = core_if->core_params->otg_ver; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gotgctl, 0, ++ gotgctl.d32); ++ /* Set OTG version supported */ ++ core_if->otg_ver = core_if->core_params->otg_ver; ++ DWC_PRINTF("OTG VER PARAM: %d, OTG VER FLAG: %d\n", ++ core_if->core_params->otg_ver, core_if->otg_ver); ++ } ++ ++ ++ /* Enable common interrupts */ ++ dwc_otg_enable_common_interrupts(core_if); ++ ++ /* Do device or host intialization based on mode during PCD ++ * and HCD initialization */ ++ if (dwc_otg_is_host_mode(core_if)) { ++ DWC_DEBUGPL(DBG_ANY, "Host Mode\n"); ++ core_if->op_state = A_HOST; ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "Device Mode\n"); ++ core_if->op_state = B_PERIPHERAL; ++#ifdef DWC_DEVICE_ONLY ++ dwc_otg_core_dev_init(core_if); ++#endif ++ } ++} ++ ++/** ++ * This function enables the Device mode interrupts. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ */ ++void dwc_otg_enable_device_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ ++ DWC_DEBUGPL(DBG_CIL, "%s()\n", __func__); ++ ++ /* Disable all interrupts. */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, 0); ++ ++ /* Clear any pending interrupts */ ++ DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Enable the common interrupts */ ++ dwc_otg_enable_common_interrupts(core_if); ++ ++ /* Enable interrupts */ ++ intr_mask.b.usbreset = 1; ++ intr_mask.b.enumdone = 1; ++ /* Disable Disconnect interrupt in Device mode */ ++ intr_mask.b.disconnect = 0; ++ ++ if (!core_if->multiproc_int_enable) { ++ intr_mask.b.inepintr = 1; ++ intr_mask.b.outepintr = 1; ++ } ++ ++ intr_mask.b.erlysuspend = 1; ++ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ intr_mask.b.epmismatch = 1; ++ } ++ ++ //intr_mask.b.incomplisoout = 1; ++ intr_mask.b.incomplisoin = 1; ++ ++/* Enable the ignore frame number for ISOC xfers - MAS */ ++/* Disable to support high bandwith ISOC transfers - manukz */ ++#if 0 ++#ifdef DWC_UTE_PER_IO ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable) { ++ dctl_data_t dctl1 = {.d32 = 0 }; ++ dctl1.b.ifrmnum = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ dctl, 0, dctl1.d32); ++ DWC_DEBUG("----Enabled Ignore frame number (0x%08x)", ++ DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->dctl)); ++ } ++ } ++#endif ++#endif ++#ifdef DWC_EN_ISOC ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable == 0) { ++ if (core_if->pti_enh_enable) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ dctl.b.ifrmnum = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ dev_if->dev_global_regs->dctl, ++ 0, dctl.d32); ++ } else { ++ intr_mask.b.incomplisoin = 1; ++ intr_mask.b.incomplisoout = 1; ++ } ++ } ++ } else { ++ intr_mask.b.incomplisoin = 1; ++ intr_mask.b.incomplisoout = 1; ++ } ++#endif /* DWC_EN_ISOC */ ++ ++ /** @todo NGS: Should this be a module parameter? */ ++#ifdef USE_PERIODIC_EP ++ intr_mask.b.isooutdrop = 1; ++ intr_mask.b.eopframe = 1; ++ intr_mask.b.incomplisoin = 1; ++ intr_mask.b.incomplisoout = 1; ++#endif ++ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, intr_mask.d32); ++ ++ DWC_DEBUGPL(DBG_CIL, "%s() gintmsk=%0x\n", __func__, ++ DWC_READ_REG32(&global_regs->gintmsk)); ++} ++ ++/** ++ * This function initializes the DWC_otg controller registers for ++ * device mode. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ */ ++void dwc_otg_core_dev_init(dwc_otg_core_if_t * core_if) ++{ ++ int i; ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dwc_otg_core_params_t *params = core_if->core_params; ++ dcfg_data_t dcfg = {.d32 = 0 }; ++ depctl_data_t diepctl = {.d32 = 0 }; ++ grstctl_t resetctl = {.d32 = 0 }; ++ uint32_t rx_fifo_size; ++ fifosize_data_t nptxfifosize; ++ fifosize_data_t txfifosize; ++ dthrctl_data_t dthrctl; ++ fifosize_data_t ptxfifosize; ++ uint16_t rxfsiz, nptxfsiz; ++ gdfifocfg_data_t gdfifocfg = {.d32 = 0 }; ++ hwcfg3_data_t hwcfg3 = {.d32 = 0 }; ++ ++ /* Restart the Phy Clock */ ++ DWC_WRITE_REG32(core_if->pcgcctl, 0); ++ ++ /* Device configuration register */ ++ init_devspd(core_if); ++ dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg); ++ dcfg.b.descdma = (core_if->dma_desc_enable) ? 1 : 0; ++ dcfg.b.perfrint = DWC_DCFG_FRAME_INTERVAL_80; ++ /* Enable Device OUT NAK in case of DDMA mode*/ ++ if (core_if->core_params->dev_out_nak) { ++ dcfg.b.endevoutnak = 1; ++ } ++ ++ if (core_if->core_params->cont_on_bna) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ dctl.b.encontonbna = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ } ++ ++ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ /* Configure data FIFO sizes */ ++ if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) { ++ DWC_DEBUGPL(DBG_CIL, "Total FIFO Size=%d\n", ++ core_if->total_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "Rx FIFO Size=%d\n", ++ params->dev_rx_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO Size=%d\n", ++ params->dev_nperio_tx_fifo_size); ++ ++ /* Rx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial grxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->grxfsiz)); ++ ++#ifdef DWC_UTE_CFI ++ core_if->pwron_rxfsiz = DWC_READ_REG32(&global_regs->grxfsiz); ++ core_if->init_rxfsiz = params->dev_rx_fifo_size; ++#endif ++ rx_fifo_size = params->dev_rx_fifo_size; ++ DWC_WRITE_REG32(&global_regs->grxfsiz, rx_fifo_size); ++ ++ DWC_DEBUGPL(DBG_CIL, "new grxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->grxfsiz)); ++ ++ /** Set Periodic Tx FIFO Mask all bits 0 */ ++ core_if->p_tx_msk = 0; ++ ++ /** Set Tx FIFO Mask all bits 0 */ ++ core_if->tx_msk = 0; ++ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ /* Non-periodic Tx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ ++ nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size; ++ nptxfifosize.b.startaddr = params->dev_rx_fifo_size; ++ ++ DWC_WRITE_REG32(&global_regs->gnptxfsiz, ++ nptxfifosize.d32); ++ ++ DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ ++ /**@todo NGS: Fix Periodic FIFO Sizing! */ ++ /* ++ * Periodic Tx FIFOs These FIFOs are numbered from 1 to 15. ++ * Indexes of the FIFO size module parameters in the ++ * dev_perio_tx_fifo_size array and the FIFO size registers in ++ * the dptxfsiz array run from 0 to 14. ++ */ ++ /** @todo Finish debug of this */ ++ ptxfifosize.b.startaddr = ++ nptxfifosize.b.startaddr + nptxfifosize.b.depth; ++ for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; i++) { ++ ptxfifosize.b.depth = ++ params->dev_perio_tx_fifo_size[i]; ++ DWC_DEBUGPL(DBG_CIL, ++ "initial dtxfsiz[%d]=%08x\n", i, ++ DWC_READ_REG32(&global_regs->dtxfsiz ++ [i])); ++ DWC_WRITE_REG32(&global_regs->dtxfsiz[i], ++ ptxfifosize.d32); ++ DWC_DEBUGPL(DBG_CIL, "new dtxfsiz[%d]=%08x\n", ++ i, ++ DWC_READ_REG32(&global_regs->dtxfsiz ++ [i])); ++ ptxfifosize.b.startaddr += ptxfifosize.b.depth; ++ } ++ } else { ++ /* ++ * Tx FIFOs These FIFOs are numbered from 1 to 15. ++ * Indexes of the FIFO size module parameters in the ++ * dev_tx_fifo_size array and the FIFO size registers in ++ * the dtxfsiz array run from 0 to 14. ++ */ ++ ++ /* Non-periodic Tx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ ++#ifdef DWC_UTE_CFI ++ core_if->pwron_gnptxfsiz = ++ (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16); ++ core_if->init_gnptxfsiz = ++ params->dev_nperio_tx_fifo_size; ++#endif ++ nptxfifosize.b.depth = params->dev_nperio_tx_fifo_size; ++ nptxfifosize.b.startaddr = params->dev_rx_fifo_size; ++ ++ DWC_WRITE_REG32(&global_regs->gnptxfsiz, ++ nptxfifosize.d32); ++ ++ DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ ++ txfifosize.b.startaddr = ++ nptxfifosize.b.startaddr + nptxfifosize.b.depth; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; i++) { ++ ++ txfifosize.b.depth = ++ params->dev_tx_fifo_size[i]; ++ ++ DWC_DEBUGPL(DBG_CIL, ++ "initial dtxfsiz[%d]=%08x\n", ++ i, ++ DWC_READ_REG32(&global_regs->dtxfsiz ++ [i])); ++ ++#ifdef DWC_UTE_CFI ++ core_if->pwron_txfsiz[i] = ++ (DWC_READ_REG32 ++ (&global_regs->dtxfsiz[i]) >> 16); ++ core_if->init_txfsiz[i] = ++ params->dev_tx_fifo_size[i]; ++#endif ++ DWC_WRITE_REG32(&global_regs->dtxfsiz[i], ++ txfifosize.d32); ++ ++ DWC_DEBUGPL(DBG_CIL, ++ "new dtxfsiz[%d]=%08x\n", ++ i, ++ DWC_READ_REG32(&global_regs->dtxfsiz ++ [i])); ++ ++ txfifosize.b.startaddr += txfifosize.b.depth; ++ } ++ if (core_if->snpsid <= OTG_CORE_REV_2_94a) { ++ /* Calculating DFIFOCFG for Device mode to include RxFIFO and NPTXFIFO */ ++ gdfifocfg.d32 = DWC_READ_REG32(&global_regs->gdfifocfg); ++ hwcfg3.d32 = DWC_READ_REG32(&global_regs->ghwcfg3); ++ gdfifocfg.b.gdfifocfg = (DWC_READ_REG32(&global_regs->ghwcfg3) >> 16); ++ DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32); ++ rxfsiz = (DWC_READ_REG32(&global_regs->grxfsiz) & 0x0000ffff); ++ nptxfsiz = (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16); ++ gdfifocfg.b.epinfobase = rxfsiz + nptxfsiz; ++ DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32); ++ } ++ } ++ ++ /* Flush the FIFOs */ ++ dwc_otg_flush_tx_fifo(core_if, 0x10); /* all Tx FIFOs */ ++ dwc_otg_flush_rx_fifo(core_if); ++ ++ /* Flush the Learning Queue. */ ++ resetctl.b.intknqflsh = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32); ++ ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) { ++ core_if->start_predict = 0; ++ for (i = 0; i<= core_if->dev_if->num_in_eps; ++i) { ++ core_if->nextep_seq[i] = 0xff; // 0xff - EP not active ++ } ++ core_if->nextep_seq[0] = 0; ++ core_if->first_in_nextep_seq = 0; ++ diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl); ++ diepctl.b.nextep = 0; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32); ++ ++ /* Update IN Endpoint Mismatch Count by active IN NP EP count + 1 */ ++ dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg); ++ dcfg.b.epmscnt = 2; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ DWC_DEBUGPL(DBG_CILV,"%s first_in_nextep_seq= %2d; nextep_seq[]:\n", ++ __func__, core_if->first_in_nextep_seq); ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_DEBUGPL(DBG_CILV, "%2d ", core_if->nextep_seq[i]); ++ } ++ DWC_DEBUGPL(DBG_CILV,"\n"); ++ } ++ ++ /* Clear all pending Device Interrupts */ ++ /** @todo - if the condition needed to be checked ++ * or in any case all pending interrutps should be cleared? ++ */ ++ if (core_if->multiproc_int_enable) { ++ for (i = 0; i < core_if->dev_if->num_in_eps; ++i) { ++ DWC_WRITE_REG32(&dev_if-> ++ dev_global_regs->diepeachintmsk[i], 0); ++ } ++ } ++ ++ for (i = 0; i < core_if->dev_if->num_out_eps; ++i) { ++ DWC_WRITE_REG32(&dev_if-> ++ dev_global_regs->doepeachintmsk[i], 0); ++ } ++ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->deachint, 0xFFFFFFFF); ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->deachintmsk, 0); ++ } else { ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->diepmsk, 0); ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->doepmsk, 0); ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->daint, 0xFFFFFFFF); ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->daintmsk, 0); ++ } ++ ++ for (i = 0; i <= dev_if->num_in_eps; i++) { ++ depctl_data_t depctl; ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (depctl.b.epena) { ++ depctl.d32 = 0; ++ depctl.b.epdis = 1; ++ depctl.b.snak = 1; ++ } else { ++ depctl.d32 = 0; ++ } ++ ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32); ++ ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->dieptsiz, 0); ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepdma, 0); ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepint, 0xFF); ++ } ++ ++ for (i = 0; i <= dev_if->num_out_eps; i++) { ++ depctl_data_t depctl; ++ depctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[i]->doepctl); ++ if (depctl.b.epena) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ gintmsk_data_t gintsts = {.d32 = 0 }; ++ doepint_data_t doepint = {.d32 = 0 }; ++ dctl.b.sgoutnak = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ do { ++ dwc_udelay(10); ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ } while (!gintsts.b.goutnakeff); ++ gintsts.d32 = 0; ++ gintsts.b.goutnakeff = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ depctl.d32 = 0; ++ depctl.b.epdis = 1; ++ depctl.b.snak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]->doepctl, depctl.d32); ++ do { ++ dwc_udelay(10); ++ doepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[i]->doepint); ++ } while (!doepint.b.epdisabled); ++ ++ doepint.b.epdisabled = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[i]->doepint, doepint.d32); ++ ++ dctl.d32 = 0; ++ dctl.b.cgoutnak = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ } else { ++ depctl.d32 = 0; ++ } ++ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, depctl.d32); ++ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doeptsiz, 0); ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepdma, 0); ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepint, 0xFF); ++ } ++ ++ if (core_if->en_multiple_tx_fifo && core_if->dma_enable) { ++ dev_if->non_iso_tx_thr_en = params->thr_ctl & 0x1; ++ dev_if->iso_tx_thr_en = (params->thr_ctl >> 1) & 0x1; ++ dev_if->rx_thr_en = (params->thr_ctl >> 2) & 0x1; ++ ++ dev_if->rx_thr_length = params->rx_thr_length; ++ dev_if->tx_thr_length = params->tx_thr_length; ++ ++ dev_if->setup_desc_index = 0; ++ ++ dthrctl.d32 = 0; ++ dthrctl.b.non_iso_thr_en = dev_if->non_iso_tx_thr_en; ++ dthrctl.b.iso_thr_en = dev_if->iso_tx_thr_en; ++ dthrctl.b.tx_thr_len = dev_if->tx_thr_length; ++ dthrctl.b.rx_thr_en = dev_if->rx_thr_en; ++ dthrctl.b.rx_thr_len = dev_if->rx_thr_length; ++ dthrctl.b.ahb_thr_ratio = params->ahb_thr_ratio; ++ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dtknqr3_dthrctl, ++ dthrctl.d32); ++ ++ DWC_DEBUGPL(DBG_CIL, ++ "Non ISO Tx Thr - %d\nISO Tx Thr - %d\nRx Thr - %d\nTx Thr Len - %d\nRx Thr Len - %d\n", ++ dthrctl.b.non_iso_thr_en, dthrctl.b.iso_thr_en, ++ dthrctl.b.rx_thr_en, dthrctl.b.tx_thr_len, ++ dthrctl.b.rx_thr_len); ++ ++ } ++ ++ dwc_otg_enable_device_interrupts(core_if); ++ ++ { ++ diepmsk_data_t msk = {.d32 = 0 }; ++ msk.b.txfifoundrn = 1; ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs-> ++ diepeachintmsk[0], msk.d32, msk.d32); ++ } else { ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->diepmsk, ++ msk.d32, msk.d32); ++ } ++ } ++ ++ if (core_if->multiproc_int_enable) { ++ /* Set NAK on Babble */ ++ dctl_data_t dctl = {.d32 = 0 }; ++ dctl.b.nakonbble = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ } ++ ++ if (core_if->snpsid >= OTG_CORE_REV_2_94a) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ dctl.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dctl); ++ dctl.b.sftdiscon = 0; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dctl, dctl.d32); ++ } ++} ++ ++/** ++ * This function enables the Host mode interrupts. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ */ ++void dwc_otg_enable_host_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_CIL, "%s(%p)\n", __func__, core_if); ++ ++ /* Disable all interrupts. */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, 0); ++ ++ /* Clear any pending interrupts. */ ++ DWC_WRITE_REG32(&global_regs->gintsts, 0xFFFFFFFF); ++ ++ /* Enable the common interrupts */ ++ dwc_otg_enable_common_interrupts(core_if); ++ ++ /* ++ * Enable host mode interrupts without disturbing common ++ * interrupts. ++ */ ++ ++ intr_mask.b.disconnect = 1; ++ intr_mask.b.portintr = 1; ++ intr_mask.b.hcintr = 1; ++ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, intr_mask.d32); ++} ++ ++/** ++ * This function disables the Host Mode interrupts. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ */ ++void dwc_otg_disable_host_interrupts(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_CILV, "%s()\n", __func__); ++ ++ /* ++ * Disable host mode interrupts without disturbing common ++ * interrupts. ++ */ ++ intr_mask.b.sofintr = 1; ++ intr_mask.b.portintr = 1; ++ intr_mask.b.hcintr = 1; ++ intr_mask.b.ptxfempty = 1; ++ intr_mask.b.nptxfempty = 1; ++ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, 0); ++} ++ ++/** ++ * This function initializes the DWC_otg controller registers for ++ * host mode. ++ * ++ * This function flushes the Tx and Rx FIFOs and it flushes any entries in the ++ * request queues. Host channels are reset to ensure that they are ready for ++ * performing transfers. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * ++ */ ++void dwc_otg_core_host_init(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ dwc_otg_host_if_t *host_if = core_if->host_if; ++ dwc_otg_core_params_t *params = core_if->core_params; ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ fifosize_data_t nptxfifosize; ++ fifosize_data_t ptxfifosize; ++ uint16_t rxfsiz, nptxfsiz, hptxfsiz; ++ gdfifocfg_data_t gdfifocfg = {.d32 = 0 }; ++ int i; ++ hcchar_data_t hcchar; ++ hcfg_data_t hcfg; ++ hfir_data_t hfir; ++ dwc_otg_hc_regs_t *hc_regs; ++ int num_channels; ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_CILV, "%s(%p)\n", __func__, core_if); ++ ++ /* Restart the Phy Clock */ ++ DWC_WRITE_REG32(core_if->pcgcctl, 0); ++ ++ /* Initialize Host Configuration Register */ ++ init_fslspclksel(core_if); ++ if (core_if->core_params->speed == DWC_SPEED_PARAM_FULL) { ++ hcfg.d32 = DWC_READ_REG32(&host_if->host_global_regs->hcfg); ++ hcfg.b.fslssupp = 1; ++ DWC_WRITE_REG32(&host_if->host_global_regs->hcfg, hcfg.d32); ++ ++ } ++ ++ /* This bit allows dynamic reloading of the HFIR register ++ * during runtime. This bit needs to be programmed during ++ * initial configuration and its value must not be changed ++ * during runtime.*/ ++ if (core_if->core_params->reload_ctl == 1) { ++ hfir.d32 = DWC_READ_REG32(&host_if->host_global_regs->hfir); ++ hfir.b.hfirrldctrl = 1; ++ DWC_WRITE_REG32(&host_if->host_global_regs->hfir, hfir.d32); ++ } ++ ++ if (core_if->core_params->dma_desc_enable) { ++ uint8_t op_mode = core_if->hwcfg2.b.op_mode; ++ if (! ++ (core_if->hwcfg4.b.desc_dma ++ && (core_if->snpsid >= OTG_CORE_REV_2_90a) ++ && ((op_mode == DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) ++ || (op_mode == DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG) ++ || (op_mode == ++ DWC_HWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE_OTG) ++ || (op_mode == DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST) ++ || (op_mode == ++ DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST)))) { ++ ++ DWC_ERROR("Host can't operate in Descriptor DMA mode.\n" ++ "Either core version is below 2.90a or " ++ "GHWCFG2, GHWCFG4 registers' values do not allow Descriptor DMA in host mode.\n" ++ "To run the driver in Buffer DMA host mode set dma_desc_enable " ++ "module parameter to 0.\n"); ++ return; ++ } ++ hcfg.d32 = DWC_READ_REG32(&host_if->host_global_regs->hcfg); ++ hcfg.b.descdma = 1; ++ DWC_WRITE_REG32(&host_if->host_global_regs->hcfg, hcfg.d32); ++ } ++ ++ /* Configure data FIFO sizes */ ++ if (core_if->hwcfg2.b.dynamic_fifo && params->enable_dynamic_fifo) { ++ DWC_DEBUGPL(DBG_CIL, "Total FIFO Size=%d\n", ++ core_if->total_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "Rx FIFO Size=%d\n", ++ params->host_rx_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "NP Tx FIFO Size=%d\n", ++ params->host_nperio_tx_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "P Tx FIFO Size=%d\n", ++ params->host_perio_tx_fifo_size); ++ ++ /* Rx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial grxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->grxfsiz)); ++ DWC_WRITE_REG32(&global_regs->grxfsiz, ++ params->host_rx_fifo_size); ++ DWC_DEBUGPL(DBG_CIL, "new grxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->grxfsiz)); ++ ++ /* Non-periodic Tx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ nptxfifosize.b.depth = params->host_nperio_tx_fifo_size; ++ nptxfifosize.b.startaddr = params->host_rx_fifo_size; ++ DWC_WRITE_REG32(&global_regs->gnptxfsiz, nptxfifosize.d32); ++ DWC_DEBUGPL(DBG_CIL, "new gnptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxfsiz)); ++ ++ /* Periodic Tx FIFO */ ++ DWC_DEBUGPL(DBG_CIL, "initial hptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->hptxfsiz)); ++ ptxfifosize.b.depth = params->host_perio_tx_fifo_size; ++ ptxfifosize.b.startaddr = ++ nptxfifosize.b.startaddr + nptxfifosize.b.depth; ++ DWC_WRITE_REG32(&global_regs->hptxfsiz, ptxfifosize.d32); ++ DWC_DEBUGPL(DBG_CIL, "new hptxfsiz=%08x\n", ++ DWC_READ_REG32(&global_regs->hptxfsiz)); ++ ++ if (core_if->en_multiple_tx_fifo ++ && core_if->snpsid <= OTG_CORE_REV_2_94a) { ++ /* Global DFIFOCFG calculation for Host mode - include RxFIFO, NPTXFIFO and HPTXFIFO */ ++ gdfifocfg.d32 = DWC_READ_REG32(&global_regs->gdfifocfg); ++ rxfsiz = (DWC_READ_REG32(&global_regs->grxfsiz) & 0x0000ffff); ++ nptxfsiz = (DWC_READ_REG32(&global_regs->gnptxfsiz) >> 16); ++ hptxfsiz = (DWC_READ_REG32(&global_regs->hptxfsiz) >> 16); ++ gdfifocfg.b.epinfobase = rxfsiz + nptxfsiz + hptxfsiz; ++ DWC_WRITE_REG32(&global_regs->gdfifocfg, gdfifocfg.d32); ++ } ++ } ++ ++ /* TODO - check this */ ++ /* Clear Host Set HNP Enable in the OTG Control Register */ ++ gotgctl.b.hstsethnpen = 1; ++ DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0); ++ /* Make sure the FIFOs are flushed. */ ++ dwc_otg_flush_tx_fifo(core_if, 0x10 /* all TX FIFOs */ ); ++ dwc_otg_flush_rx_fifo(core_if); ++ ++ /* Clear Host Set HNP Enable in the OTG Control Register */ ++ gotgctl.b.hstsethnpen = 1; ++ DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0); ++ ++ if (!core_if->core_params->dma_desc_enable) { ++ /* Flush out any leftover queued requests. */ ++ num_channels = core_if->core_params->host_channels; ++ ++ for (i = 0; i < num_channels; i++) { ++ hc_regs = core_if->host_if->hc_regs[i]; ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.chen = 0; ++ hcchar.b.chdis = 1; ++ hcchar.b.epdir = 0; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ } ++ ++ /* Halt all channels to put them into a known state. */ ++ for (i = 0; i < num_channels; i++) { ++ int count = 0; ++ hc_regs = core_if->host_if->hc_regs[i]; ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 1; ++ hcchar.b.epdir = 0; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ DWC_DEBUGPL(DBG_HCDV, "%s: Halt channel %d regs %p\n", __func__, i, hc_regs); ++ do { ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (++count > 1000) { ++ DWC_ERROR ++ ("%s: Unable to clear halt on channel %d (timeout HCCHAR 0x%X @%p)\n", ++ __func__, i, hcchar.d32, &hc_regs->hcchar); ++ break; ++ } ++ dwc_udelay(1); ++ } while (hcchar.b.chen); ++ } ++ } ++ ++ /* Turn on the vbus power. */ ++ DWC_PRINTF("Init: Port Power? op_state=%d\n", core_if->op_state); ++ if (core_if->op_state == A_HOST) { ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ DWC_PRINTF("Init: Power Port (%d)\n", hprt0.b.prtpwr); ++ if (hprt0.b.prtpwr == 0) { ++ hprt0.b.prtpwr = 1; ++ DWC_WRITE_REG32(host_if->hprt0, hprt0.d32); ++ } ++ } ++ ++ dwc_otg_enable_host_interrupts(core_if); ++} ++ ++/** ++ * Prepares a host channel for transferring packets to/from a specific ++ * endpoint. The HCCHARn register is set up with the characteristics specified ++ * in _hc. Host channel interrupts that may need to be serviced while this ++ * transfer is in progress are enabled. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ * @param hc Information needed to initialize the host channel ++ */ ++void dwc_otg_hc_init(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ uint32_t intr_enable; ++ hcintmsk_data_t hc_intr_mask; ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ hcchar_data_t hcchar; ++ hcsplt_data_t hcsplt; ++ ++ uint8_t hc_num = hc->hc_num; ++ dwc_otg_host_if_t *host_if = core_if->host_if; ++ dwc_otg_hc_regs_t *hc_regs = host_if->hc_regs[hc_num]; ++ ++ /* Clear old interrupt conditions for this host channel. */ ++ hc_intr_mask.d32 = 0xFFFFFFFF; ++ hc_intr_mask.b.reserved14_31 = 0; ++ DWC_WRITE_REG32(&hc_regs->hcint, hc_intr_mask.d32); ++ ++ /* Enable channel interrupts required for this transfer. */ ++ hc_intr_mask.d32 = 0; ++ hc_intr_mask.b.chhltd = 1; ++ if (core_if->dma_enable) { ++ /* For Descriptor DMA mode core halts the channel on AHB error. Interrupt is not required */ ++ if (!core_if->dma_desc_enable) ++ hc_intr_mask.b.ahberr = 1; ++ else { ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) ++ hc_intr_mask.b.xfercompl = 1; ++ } ++ ++ if (hc->error_state && !hc->do_split && ++ hc->ep_type != DWC_OTG_EP_TYPE_ISOC) { ++ hc_intr_mask.b.ack = 1; ++ if (hc->ep_is_in) { ++ hc_intr_mask.b.datatglerr = 1; ++ if (hc->ep_type != DWC_OTG_EP_TYPE_INTR) { ++ hc_intr_mask.b.nak = 1; ++ } ++ } ++ } ++ } else { ++ switch (hc->ep_type) { ++ case DWC_OTG_EP_TYPE_CONTROL: ++ case DWC_OTG_EP_TYPE_BULK: ++ hc_intr_mask.b.xfercompl = 1; ++ hc_intr_mask.b.stall = 1; ++ hc_intr_mask.b.xacterr = 1; ++ hc_intr_mask.b.datatglerr = 1; ++ if (hc->ep_is_in) { ++ hc_intr_mask.b.bblerr = 1; ++ } else { ++ hc_intr_mask.b.nak = 1; ++ hc_intr_mask.b.nyet = 1; ++ if (hc->do_ping) { ++ hc_intr_mask.b.ack = 1; ++ } ++ } ++ ++ if (hc->do_split) { ++ hc_intr_mask.b.nak = 1; ++ if (hc->complete_split) { ++ hc_intr_mask.b.nyet = 1; ++ } else { ++ hc_intr_mask.b.ack = 1; ++ } ++ } ++ ++ if (hc->error_state) { ++ hc_intr_mask.b.ack = 1; ++ } ++ break; ++ case DWC_OTG_EP_TYPE_INTR: ++ hc_intr_mask.b.xfercompl = 1; ++ hc_intr_mask.b.nak = 1; ++ hc_intr_mask.b.stall = 1; ++ hc_intr_mask.b.xacterr = 1; ++ hc_intr_mask.b.datatglerr = 1; ++ hc_intr_mask.b.frmovrun = 1; ++ ++ if (hc->ep_is_in) { ++ hc_intr_mask.b.bblerr = 1; ++ } ++ if (hc->error_state) { ++ hc_intr_mask.b.ack = 1; ++ } ++ if (hc->do_split) { ++ if (hc->complete_split) { ++ hc_intr_mask.b.nyet = 1; ++ } else { ++ hc_intr_mask.b.ack = 1; ++ } ++ } ++ break; ++ case DWC_OTG_EP_TYPE_ISOC: ++ hc_intr_mask.b.xfercompl = 1; ++ hc_intr_mask.b.frmovrun = 1; ++ hc_intr_mask.b.ack = 1; ++ ++ if (hc->ep_is_in) { ++ hc_intr_mask.b.xacterr = 1; ++ hc_intr_mask.b.bblerr = 1; ++ } ++ break; ++ } ++ } ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, hc_intr_mask.d32); ++ ++ /* Enable the top level host channel interrupt. */ ++ intr_enable = (1 << hc_num); ++ DWC_MODIFY_REG32(&host_if->host_global_regs->haintmsk, 0, intr_enable); ++ ++ /* Make sure host channel interrupts are enabled. */ ++ gintmsk.b.hcintr = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, gintmsk.d32); ++ ++ /* ++ * Program the HCCHARn register with the endpoint characteristics for ++ * the current transfer. ++ */ ++ hcchar.d32 = 0; ++ hcchar.b.devaddr = hc->dev_addr; ++ hcchar.b.epnum = hc->ep_num; ++ hcchar.b.epdir = hc->ep_is_in; ++ hcchar.b.lspddev = (hc->speed == DWC_OTG_EP_SPEED_LOW); ++ hcchar.b.eptype = hc->ep_type; ++ hcchar.b.mps = hc->max_packet; ++ ++ DWC_WRITE_REG32(&host_if->hc_regs[hc_num]->hcchar, hcchar.d32); ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d, Dev Addr %d, EP #%d\n", ++ __func__, hc->hc_num, hcchar.b.devaddr, hcchar.b.epnum); ++ DWC_DEBUGPL(DBG_HCDV, " Is In %d, Is Low Speed %d, EP Type %d, " ++ "Max Pkt %d, Multi Cnt %d\n", ++ hcchar.b.epdir, hcchar.b.lspddev, hcchar.b.eptype, ++ hcchar.b.mps, hcchar.b.multicnt); ++ ++ /* ++ * Program the HCSPLIT register for SPLITs ++ */ ++ hcsplt.d32 = 0; ++ if (hc->do_split) { ++ DWC_DEBUGPL(DBG_HCDV, "Programming HC %d with split --> %s\n", ++ hc->hc_num, ++ hc->complete_split ? "CSPLIT" : "SSPLIT"); ++ hcsplt.b.compsplt = hc->complete_split; ++ hcsplt.b.xactpos = hc->xact_pos; ++ hcsplt.b.hubaddr = hc->hub_addr; ++ hcsplt.b.prtaddr = hc->port_addr; ++ DWC_DEBUGPL(DBG_HCDV, "\t comp split %d\n", hc->complete_split); ++ DWC_DEBUGPL(DBG_HCDV, "\t xact pos %d\n", hc->xact_pos); ++ DWC_DEBUGPL(DBG_HCDV, "\t hub addr %d\n", hc->hub_addr); ++ DWC_DEBUGPL(DBG_HCDV, "\t port addr %d\n", hc->port_addr); ++ DWC_DEBUGPL(DBG_HCDV, "\t is_in %d\n", hc->ep_is_in); ++ DWC_DEBUGPL(DBG_HCDV, "\t Max Pkt: %d\n", hcchar.b.mps); ++ DWC_DEBUGPL(DBG_HCDV, "\t xferlen: %d\n", hc->xfer_len); ++ } ++ DWC_WRITE_REG32(&host_if->hc_regs[hc_num]->hcsplt, hcsplt.d32); ++ ++} ++ ++/** ++ * Attempts to halt a host channel. This function should only be called in ++ * Slave mode or to abort a transfer in either Slave mode or DMA mode. Under ++ * normal circumstances in DMA mode, the controller halts the channel when the ++ * transfer is complete or a condition occurs that requires application ++ * intervention. ++ * ++ * In slave mode, checks for a free request queue entry, then sets the Channel ++ * Enable and Channel Disable bits of the Host Channel Characteristics ++ * register of the specified channel to intiate the halt. If there is no free ++ * request queue entry, sets only the Channel Disable bit of the HCCHARn ++ * register to flush requests for this channel. In the latter case, sets a ++ * flag to indicate that the host channel needs to be halted when a request ++ * queue slot is open. ++ * ++ * In DMA mode, always sets the Channel Enable and Channel Disable bits of the ++ * HCCHARn register. The controller ensures there is space in the request ++ * queue before submitting the halt request. ++ * ++ * Some time may elapse before the core flushes any posted requests for this ++ * host channel and halts. The Channel Halted interrupt handler completes the ++ * deactivation of the host channel. ++ * ++ * @param core_if Controller register interface. ++ * @param hc Host channel to halt. ++ * @param halt_status Reason for halting the channel. ++ */ ++void dwc_otg_hc_halt(dwc_otg_core_if_t * core_if, ++ dwc_hc_t * hc, dwc_otg_halt_status_e halt_status) ++{ ++ gnptxsts_data_t nptxsts; ++ hptxsts_data_t hptxsts; ++ hcchar_data_t hcchar; ++ dwc_otg_hc_regs_t *hc_regs; ++ dwc_otg_core_global_regs_t *global_regs; ++ dwc_otg_host_global_regs_t *host_global_regs; ++ ++ hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ global_regs = core_if->core_global_regs; ++ host_global_regs = core_if->host_if->host_global_regs; ++ ++ DWC_ASSERT(!(halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS), ++ "halt_status = %d\n", halt_status); ++ ++ if (halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE || ++ halt_status == DWC_OTG_HC_XFER_AHB_ERR) { ++ /* ++ * Disable all channel interrupts except Ch Halted. The QTD ++ * and QH state associated with this transfer has been cleared ++ * (in the case of URB_DEQUEUE), so the channel needs to be ++ * shut down carefully to prevent crashes. ++ */ ++ hcintmsk_data_t hcintmsk; ++ hcintmsk.d32 = 0; ++ hcintmsk.b.chhltd = 1; ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, hcintmsk.d32); ++ ++ /* ++ * Make sure no other interrupts besides halt are currently ++ * pending. Handling another interrupt could cause a crash due ++ * to the QTD and QH state. ++ */ ++ DWC_WRITE_REG32(&hc_regs->hcint, ~hcintmsk.d32); ++ ++ /* ++ * Make sure the halt status is set to URB_DEQUEUE or AHB_ERR ++ * even if the channel was already halted for some other ++ * reason. ++ */ ++ hc->halt_status = halt_status; ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen == 0) { ++ /* ++ * The channel is either already halted or it hasn't ++ * started yet. In DMA mode, the transfer may halt if ++ * it finishes normally or a condition occurs that ++ * requires driver intervention. Don't want to halt ++ * the channel again. In either Slave or DMA mode, ++ * it's possible that the transfer has been assigned ++ * to a channel, but not started yet when an URB is ++ * dequeued. Don't want to halt a channel that hasn't ++ * started yet. ++ */ ++ return; ++ } ++ } ++ if (hc->halt_pending) { ++ /* ++ * A halt has already been issued for this channel. This might ++ * happen when a transfer is aborted by a higher level in ++ * the stack. ++ */ ++#ifdef DEBUG ++ DWC_PRINTF ++ ("*** %s: Channel %d, _hc->halt_pending already set ***\n", ++ __func__, hc->hc_num); ++ ++#endif ++ return; ++ } ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* No need to set the bit in DDMA for disabling the channel */ ++ //TODO check it everywhere channel is disabled ++ if (!core_if->core_params->dma_desc_enable) ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 1; ++ ++ if (!core_if->dma_enable) { ++ /* Check for space in the request queue to issue the halt. */ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL || ++ hc->ep_type == DWC_OTG_EP_TYPE_BULK) { ++ nptxsts.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ if (nptxsts.b.nptxqspcavail == 0) { ++ hcchar.b.chen = 0; ++ } ++ } else { ++ hptxsts.d32 = ++ DWC_READ_REG32(&host_global_regs->hptxsts); ++ if ((hptxsts.b.ptxqspcavail == 0) ++ || (core_if->queuing_high_bandwidth)) { ++ hcchar.b.chen = 0; ++ } ++ } ++ } ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ hc->halt_status = halt_status; ++ ++ if (hcchar.b.chen) { ++ hc->halt_pending = 1; ++ hc->halt_on_queue = 0; ++ } else { ++ hc->halt_on_queue = 1; ++ } ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num); ++ DWC_DEBUGPL(DBG_HCDV, " hcchar: 0x%08x\n", hcchar.d32); ++ DWC_DEBUGPL(DBG_HCDV, " halt_pending: %d\n", hc->halt_pending); ++ DWC_DEBUGPL(DBG_HCDV, " halt_on_queue: %d\n", hc->halt_on_queue); ++ DWC_DEBUGPL(DBG_HCDV, " halt_status: %d\n", hc->halt_status); ++ ++ return; ++} ++ ++/** ++ * Clears the transfer state for a host channel. This function is normally ++ * called after a transfer is done and the host channel is being released. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param hc Identifies the host channel to clean up. ++ */ ++void dwc_otg_hc_cleanup(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ dwc_otg_hc_regs_t *hc_regs; ++ ++ hc->xfer_started = 0; ++ ++ /* ++ * Clear channel interrupt enables and any unhandled channel interrupt ++ * conditions. ++ */ ++ hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, 0); ++ DWC_WRITE_REG32(&hc_regs->hcint, 0xFFFFFFFF); ++#ifdef DEBUG ++ DWC_TIMER_CANCEL(core_if->hc_xfer_timer[hc->hc_num]); ++#endif ++} ++ ++/** ++ * Sets the channel property that indicates in which frame a periodic transfer ++ * should occur. This is always set to the _next_ frame. This function has no ++ * effect on non-periodic transfers. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param hc Identifies the host channel to set up and its properties. ++ * @param hcchar Current value of the HCCHAR register for the specified host ++ * channel. ++ */ ++static inline void hc_set_even_odd_frame(dwc_otg_core_if_t * core_if, ++ dwc_hc_t * hc, hcchar_data_t * hcchar) ++{ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ hfnum_data_t hfnum; ++ hfnum.d32 = ++ DWC_READ_REG32(&core_if->host_if->host_global_regs->hfnum); ++ ++ /* 1 if _next_ frame is odd, 0 if it's even */ ++ hcchar->b.oddfrm = (hfnum.b.frnum & 0x1) ? 0 : 1; ++#ifdef DEBUG ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR && hc->do_split ++ && !hc->complete_split) { ++ switch (hfnum.b.frnum & 0x7) { ++ case 7: ++ core_if->hfnum_7_samples++; ++ core_if->hfnum_7_frrem_accum += hfnum.b.frrem; ++ break; ++ case 0: ++ core_if->hfnum_0_samples++; ++ core_if->hfnum_0_frrem_accum += hfnum.b.frrem; ++ break; ++ default: ++ core_if->hfnum_other_samples++; ++ core_if->hfnum_other_frrem_accum += ++ hfnum.b.frrem; ++ break; ++ } ++ } ++#endif ++ } ++} ++ ++#ifdef DEBUG ++void hc_xfer_timeout(void *ptr) ++{ ++ hc_xfer_info_t *xfer_info = NULL; ++ int hc_num = 0; ++ ++ if (ptr) ++ xfer_info = (hc_xfer_info_t *) ptr; ++ ++ if (!xfer_info->hc) { ++ DWC_ERROR("xfer_info->hc = %p\n", xfer_info->hc); ++ return; ++ } ++ ++ hc_num = xfer_info->hc->hc_num; ++ DWC_WARN("%s: timeout on channel %d\n", __func__, hc_num); ++ DWC_WARN(" start_hcchar_val 0x%08x\n", ++ xfer_info->core_if->start_hcchar_val[hc_num]); ++} ++#endif ++ ++void ep_xfer_timeout(void *ptr) ++{ ++ ep_xfer_info_t *xfer_info = NULL; ++ int ep_num = 0; ++ dctl_data_t dctl = {.d32 = 0 }; ++ gintsts_data_t gintsts = {.d32 = 0 }; ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ ++ if (ptr) ++ xfer_info = (ep_xfer_info_t *) ptr; ++ ++ if (!xfer_info->ep) { ++ DWC_ERROR("xfer_info->ep = %p\n", xfer_info->ep); ++ return; ++ } ++ ++ ep_num = xfer_info->ep->num; ++ DWC_WARN("%s: timeout on endpoit %d\n", __func__, ep_num); ++ /* Put the sate to 2 as it was time outed */ ++ xfer_info->state = 2; ++ ++ dctl.d32 = ++ DWC_READ_REG32(&xfer_info->core_if->dev_if->dev_global_regs->dctl); ++ gintsts.d32 = ++ DWC_READ_REG32(&xfer_info->core_if->core_global_regs->gintsts); ++ gintmsk.d32 = ++ DWC_READ_REG32(&xfer_info->core_if->core_global_regs->gintmsk); ++ ++ if (!gintmsk.b.goutnakeff) { ++ /* Unmask it */ ++ gintmsk.b.goutnakeff = 1; ++ DWC_WRITE_REG32(&xfer_info->core_if->core_global_regs->gintmsk, ++ gintmsk.d32); ++ ++ } ++ ++ if (!gintsts.b.goutnakeff) { ++ dctl.b.sgoutnak = 1; ++ } ++ DWC_WRITE_REG32(&xfer_info->core_if->dev_if->dev_global_regs->dctl, ++ dctl.d32); ++ ++} ++ ++void set_pid_isoc(dwc_hc_t * hc) ++{ ++ /* Set up the initial PID for the transfer. */ ++ if (hc->speed == DWC_OTG_EP_SPEED_HIGH) { ++ if (hc->ep_is_in) { ++ if (hc->multi_count == 1) { ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA0; ++ } else if (hc->multi_count == 2) { ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA1; ++ } else { ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA2; ++ } ++ } else { ++ if (hc->multi_count == 1) { ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA0; ++ } else { ++ hc->data_pid_start = DWC_OTG_HC_PID_MDATA; ++ } ++ } ++ } else { ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA0; ++ } ++} ++ ++/** ++ * This function does the setup for a data transfer for a host channel and ++ * starts the transfer. May be called in either Slave mode or DMA mode. In ++ * Slave mode, the caller must ensure that there is sufficient space in the ++ * request queue and Tx Data FIFO. ++ * ++ * For an OUT transfer in Slave mode, it loads a data packet into the ++ * appropriate FIFO. If necessary, additional data packets will be loaded in ++ * the Host ISR. ++ * ++ * For an IN transfer in Slave mode, a data packet is requested. The data ++ * packets are unloaded from the Rx FIFO in the Host ISR. If necessary, ++ * additional data packets are requested in the Host ISR. ++ * ++ * For a PING transfer in Slave mode, the Do Ping bit is set in the HCTSIZ ++ * register along with a packet count of 1 and the channel is enabled. This ++ * causes a single PING transaction to occur. Other fields in HCTSIZ are ++ * simply set to 0 since no data transfer occurs in this case. ++ * ++ * For a PING transfer in DMA mode, the HCTSIZ register is initialized with ++ * all the information required to perform the subsequent data transfer. In ++ * addition, the Do Ping bit is set in the HCTSIZ register. In this case, the ++ * controller performs the entire PING protocol, then starts the data ++ * transfer. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param hc Information needed to initialize the host channel. The xfer_len ++ * value may be reduced to accommodate the max widths of the XferSize and ++ * PktCnt fields in the HCTSIZn register. The multi_count value may be changed ++ * to reflect the final xfer_len value. ++ */ ++void dwc_otg_hc_start_transfer(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ hcchar_data_t hcchar; ++ hctsiz_data_t hctsiz; ++ uint16_t num_packets; ++ uint32_t max_hc_xfer_size = core_if->core_params->max_transfer_size; ++ uint16_t max_hc_pkt_count = core_if->core_params->max_packet_count; ++ dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ ++ hctsiz.d32 = 0; ++ ++ if (hc->do_ping) { ++ if (!core_if->dma_enable) { ++ dwc_otg_hc_do_ping(core_if, hc); ++ hc->xfer_started = 1; ++ return; ++ } else { ++ hctsiz.b.dopng = 1; ++ } ++ } ++ ++ if (hc->do_split) { ++ num_packets = 1; ++ ++ if (hc->complete_split && !hc->ep_is_in) { ++ /* For CSPLIT OUT Transfer, set the size to 0 so the ++ * core doesn't expect any data written to the FIFO */ ++ hc->xfer_len = 0; ++ } else if (hc->ep_is_in || (hc->xfer_len > hc->max_packet)) { ++ hc->xfer_len = hc->max_packet; ++ } else if (!hc->ep_is_in && (hc->xfer_len > 188)) { ++ hc->xfer_len = 188; ++ } ++ ++ hctsiz.b.xfersize = hc->xfer_len; ++ } else { ++ /* ++ * Ensure that the transfer length and packet count will fit ++ * in the widths allocated for them in the HCTSIZn register. ++ */ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * Make sure the transfer size is no larger than one ++ * (micro)frame's worth of data. (A check was done ++ * when the periodic transfer was accepted to ensure ++ * that a (micro)frame's worth of data can be ++ * programmed into a channel.) ++ */ ++ uint32_t max_periodic_len = ++ hc->multi_count * hc->max_packet; ++ if (hc->xfer_len > max_periodic_len) { ++ hc->xfer_len = max_periodic_len; ++ } else { ++ } ++ } else if (hc->xfer_len > max_hc_xfer_size) { ++ /* Make sure that xfer_len is a multiple of max packet size. */ ++ hc->xfer_len = max_hc_xfer_size - hc->max_packet + 1; ++ } ++ ++ if (hc->xfer_len > 0) { ++ num_packets = ++ (hc->xfer_len + hc->max_packet - ++ 1) / hc->max_packet; ++ if (num_packets > max_hc_pkt_count) { ++ num_packets = max_hc_pkt_count; ++ hc->xfer_len = num_packets * hc->max_packet; ++ } ++ } else { ++ /* Need 1 packet for transfer length of 0. */ ++ num_packets = 1; ++ } ++ ++ if (hc->ep_is_in) { ++ /* Always program an integral # of max packets for IN transfers. */ ++ hc->xfer_len = num_packets * hc->max_packet; ++ } ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * Make sure that the multi_count field matches the ++ * actual transfer length. ++ */ ++ hc->multi_count = num_packets; ++ } ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) ++ set_pid_isoc(hc); ++ ++ hctsiz.b.xfersize = hc->xfer_len; ++ } ++ ++ hc->start_pkt_count = num_packets; ++ hctsiz.b.pktcnt = num_packets; ++ hctsiz.b.pid = hc->data_pid_start; ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num); ++ DWC_DEBUGPL(DBG_HCDV, " Xfer Size: %d\n", hctsiz.b.xfersize); ++ DWC_DEBUGPL(DBG_HCDV, " Num Pkts: %d\n", hctsiz.b.pktcnt); ++ DWC_DEBUGPL(DBG_HCDV, " Start PID: %d\n", hctsiz.b.pid); ++ ++ if (core_if->dma_enable) { ++ dwc_dma_t dma_addr; ++ if (hc->align_buff) { ++ dma_addr = hc->align_buff; ++ } else { ++ dma_addr = ((unsigned long)hc->xfer_buff & 0xffffffff); ++ } ++ DWC_WRITE_REG32(&hc_regs->hcdma, dma_addr); ++ } ++ ++ /* Start the split */ ++ if (hc->do_split) { ++ hcsplt_data_t hcsplt; ++ hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt); ++ hcsplt.b.spltena = 1; ++ DWC_WRITE_REG32(&hc_regs->hcsplt, hcsplt.d32); ++ } ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.multicnt = hc->multi_count; ++ hc_set_even_odd_frame(core_if, hc, &hcchar); ++#ifdef DEBUG ++ core_if->start_hcchar_val[hc->hc_num] = hcchar.d32; ++ if (hcchar.b.chdis) { ++ DWC_WARN("%s: chdis set, channel %d, hcchar 0x%08x\n", ++ __func__, hc->hc_num, hcchar.d32); ++ } ++#endif ++ ++ /* Set host channel enable after all other setup is complete. */ ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 0; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ hc->xfer_started = 1; ++ hc->requests++; ++ ++ if (!core_if->dma_enable && !hc->ep_is_in && hc->xfer_len > 0) { ++ /* Load OUT packet into the appropriate Tx FIFO. */ ++ dwc_otg_hc_write_packet(core_if, hc); ++ } ++#ifdef DEBUG ++ if (hc->ep_type != DWC_OTG_EP_TYPE_INTR) { ++ DWC_DEBUGPL(DBG_HCDV, "transfer %d from core_if %p\n", ++ hc->hc_num, core_if);//GRAYG ++ core_if->hc_xfer_info[hc->hc_num].core_if = core_if; ++ core_if->hc_xfer_info[hc->hc_num].hc = hc; ++ ++ /* Start a timer for this transfer. */ ++ DWC_TIMER_SCHEDULE(core_if->hc_xfer_timer[hc->hc_num], 10000); ++ } ++#endif ++} ++ ++/** ++ * This function does the setup for a data transfer for a host channel ++ * and starts the transfer in Descriptor DMA mode. ++ * ++ * Initializes HCTSIZ register. For a PING transfer the Do Ping bit is set. ++ * Sets PID and NTD values. For periodic transfers ++ * initializes SCHED_INFO field with micro-frame bitmap. ++ * ++ * Initializes HCDMA register with descriptor list address and CTD value ++ * then starts the transfer via enabling the channel. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param hc Information needed to initialize the host channel. ++ */ ++void dwc_otg_hc_start_transfer_ddma(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ hcchar_data_t hcchar; ++ hctsiz_data_t hctsiz; ++ hcdma_data_t hcdma; ++ ++ hctsiz.d32 = 0; ++ ++ if (hc->do_ping) ++ hctsiz.b_ddma.dopng = 1; ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) ++ set_pid_isoc(hc); ++ ++ /* Packet Count and Xfer Size are not used in Descriptor DMA mode */ ++ hctsiz.b_ddma.pid = hc->data_pid_start; ++ hctsiz.b_ddma.ntd = hc->ntd - 1; /* 0 - 1 descriptor, 1 - 2 descriptors, etc. */ ++ hctsiz.b_ddma.schinfo = hc->schinfo; /* Non-zero only for high-speed interrupt endpoints */ ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num); ++ DWC_DEBUGPL(DBG_HCDV, " Start PID: %d\n", hctsiz.b.pid); ++ DWC_DEBUGPL(DBG_HCDV, " NTD: %d\n", hctsiz.b_ddma.ntd); ++ ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ hcdma.d32 = 0; ++ hcdma.b.dma_addr = ((uint32_t) hc->desc_list_addr) >> 11; ++ ++ /* Always start from first descriptor. */ ++ hcdma.b.ctd = 0; ++ DWC_WRITE_REG32(&hc_regs->hcdma, hcdma.d32); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.multicnt = hc->multi_count; ++ ++#ifdef DEBUG ++ core_if->start_hcchar_val[hc->hc_num] = hcchar.d32; ++ if (hcchar.b.chdis) { ++ DWC_WARN("%s: chdis set, channel %d, hcchar 0x%08x\n", ++ __func__, hc->hc_num, hcchar.d32); ++ } ++#endif ++ ++ /* Set host channel enable after all other setup is complete. */ ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 0; ++ ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ hc->xfer_started = 1; ++ hc->requests++; ++ ++#ifdef DEBUG ++ if ((hc->ep_type != DWC_OTG_EP_TYPE_INTR) ++ && (hc->ep_type != DWC_OTG_EP_TYPE_ISOC)) { ++ DWC_DEBUGPL(DBG_HCDV, "DMA transfer %d from core_if %p\n", ++ hc->hc_num, core_if);//GRAYG ++ core_if->hc_xfer_info[hc->hc_num].core_if = core_if; ++ core_if->hc_xfer_info[hc->hc_num].hc = hc; ++ /* Start a timer for this transfer. */ ++ DWC_TIMER_SCHEDULE(core_if->hc_xfer_timer[hc->hc_num], 10000); ++ } ++#endif ++ ++} ++ ++/** ++ * This function continues a data transfer that was started by previous call ++ * to dwc_otg_hc_start_transfer. The caller must ensure there is ++ * sufficient space in the request queue and Tx Data FIFO. This function ++ * should only be called in Slave mode. In DMA mode, the controller acts ++ * autonomously to complete transfers programmed to a host channel. ++ * ++ * For an OUT transfer, a new data packet is loaded into the appropriate FIFO ++ * if there is any data remaining to be queued. For an IN transfer, another ++ * data packet is always requested. For the SETUP phase of a control transfer, ++ * this function does nothing. ++ * ++ * @return 1 if a new request is queued, 0 if no more requests are required ++ * for this transfer. ++ */ ++int dwc_otg_hc_continue_transfer(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num); ++ ++ if (hc->do_split) { ++ /* SPLITs always queue just once per channel */ ++ return 0; ++ } else if (hc->data_pid_start == DWC_OTG_HC_PID_SETUP) { ++ /* SETUPs are queued only once since they can't be NAKed. */ ++ return 0; ++ } else if (hc->ep_is_in) { ++ /* ++ * Always queue another request for other IN transfers. If ++ * back-to-back INs are issued and NAKs are received for both, ++ * the driver may still be processing the first NAK when the ++ * second NAK is received. When the interrupt handler clears ++ * the NAK interrupt for the first NAK, the second NAK will ++ * not be seen. So we can't depend on the NAK interrupt ++ * handler to requeue a NAKed request. Instead, IN requests ++ * are issued each time this function is called. When the ++ * transfer completes, the extra requests for the channel will ++ * be flushed. ++ */ ++ hcchar_data_t hcchar; ++ dwc_otg_hc_regs_t *hc_regs = ++ core_if->host_if->hc_regs[hc->hc_num]; ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hc_set_even_odd_frame(core_if, hc, &hcchar); ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 0; ++ DWC_DEBUGPL(DBG_HCDV, " IN xfer: hcchar = 0x%08x\n", ++ hcchar.d32); ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ hc->requests++; ++ return 1; ++ } else { ++ /* OUT transfers. */ ++ if (hc->xfer_count < hc->xfer_len) { ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ hcchar_data_t hcchar; ++ dwc_otg_hc_regs_t *hc_regs; ++ hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hc_set_even_odd_frame(core_if, hc, &hcchar); ++ } ++ ++ /* Load OUT packet into the appropriate Tx FIFO. */ ++ dwc_otg_hc_write_packet(core_if, hc); ++ hc->requests++; ++ return 1; ++ } else { ++ return 0; ++ } ++ } ++} ++ ++/** ++ * Starts a PING transfer. This function should only be called in Slave mode. ++ * The Do Ping bit is set in the HCTSIZ register, then the channel is enabled. ++ */ ++void dwc_otg_hc_do_ping(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ hcchar_data_t hcchar; ++ hctsiz_data_t hctsiz; ++ dwc_otg_hc_regs_t *hc_regs = core_if->host_if->hc_regs[hc->hc_num]; ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s: Channel %d\n", __func__, hc->hc_num); ++ ++ hctsiz.d32 = 0; ++ hctsiz.b.dopng = 1; ++ hctsiz.b.pktcnt = 1; ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.chen = 1; ++ hcchar.b.chdis = 0; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++} ++ ++/* ++ * This function writes a packet into the Tx FIFO associated with the Host ++ * Channel. For a channel associated with a non-periodic EP, the non-periodic ++ * Tx FIFO is written. For a channel associated with a periodic EP, the ++ * periodic Tx FIFO is written. This function should only be called in Slave ++ * mode. ++ * ++ * Upon return the xfer_buff and xfer_count fields in _hc are incremented by ++ * then number of bytes written to the Tx FIFO. ++ */ ++void dwc_otg_hc_write_packet(dwc_otg_core_if_t * core_if, dwc_hc_t * hc) ++{ ++ uint32_t i; ++ uint32_t remaining_count; ++ uint32_t byte_count; ++ uint32_t dword_count; ++ ++ uint32_t *data_buff = (uint32_t *) (hc->xfer_buff); ++ uint32_t *data_fifo = core_if->data_fifo[hc->hc_num]; ++ ++ remaining_count = hc->xfer_len - hc->xfer_count; ++ if (remaining_count > hc->max_packet) { ++ byte_count = hc->max_packet; ++ } else { ++ byte_count = remaining_count; ++ } ++ ++ dword_count = (byte_count + 3) / 4; ++ ++ if ((((unsigned long)data_buff) & 0x3) == 0) { ++ /* xfer_buff is DWORD aligned. */ ++ for (i = 0; i < dword_count; i++, data_buff++) { ++ DWC_WRITE_REG32(data_fifo, *data_buff); ++ } ++ } else { ++ /* xfer_buff is not DWORD aligned. */ ++ for (i = 0; i < dword_count; i++, data_buff++) { ++ uint32_t data; ++ data = ++ (data_buff[0] | data_buff[1] << 8 | data_buff[2] << ++ 16 | data_buff[3] << 24); ++ DWC_WRITE_REG32(data_fifo, data); ++ } ++ } ++ ++ hc->xfer_count += byte_count; ++ hc->xfer_buff += byte_count; ++} ++ ++/** ++ * Gets the current USB frame number. This is the frame number from the last ++ * SOF packet. ++ */ ++uint32_t dwc_otg_get_frame_number(dwc_otg_core_if_t * core_if) ++{ ++ dsts_data_t dsts; ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ++ /* read current frame/microframe number from DSTS register */ ++ return dsts.b.soffn; ++} ++ ++/** ++ * Calculates and gets the frame Interval value of HFIR register according PHY ++ * type and speed.The application can modify a value of HFIR register only after ++ * the Port Enable bit of the Host Port Control and Status register ++ * (HPRT.PrtEnaPort) has been set. ++*/ ++ ++uint32_t calc_frame_interval(dwc_otg_core_if_t * core_if) ++{ ++ gusbcfg_data_t usbcfg; ++ hwcfg2_data_t hwcfg2; ++ hprt0_data_t hprt0; ++ int clock = 60; // default value ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ hwcfg2.d32 = DWC_READ_REG32(&core_if->core_global_regs->ghwcfg2); ++ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0); ++ if (!usbcfg.b.physel && usbcfg.b.ulpi_utmi_sel && !usbcfg.b.phyif) ++ clock = 60; ++ if (usbcfg.b.physel && hwcfg2.b.fs_phy_type == 3) ++ clock = 48; ++ if (!usbcfg.b.phylpwrclksel && !usbcfg.b.physel && ++ !usbcfg.b.ulpi_utmi_sel && usbcfg.b.phyif) ++ clock = 30; ++ if (!usbcfg.b.phylpwrclksel && !usbcfg.b.physel && ++ !usbcfg.b.ulpi_utmi_sel && !usbcfg.b.phyif) ++ clock = 60; ++ if (usbcfg.b.phylpwrclksel && !usbcfg.b.physel && ++ !usbcfg.b.ulpi_utmi_sel && usbcfg.b.phyif) ++ clock = 48; ++ if (usbcfg.b.physel && !usbcfg.b.phyif && hwcfg2.b.fs_phy_type == 2) ++ clock = 48; ++ if (usbcfg.b.physel && hwcfg2.b.fs_phy_type == 1) ++ clock = 48; ++ if (hprt0.b.prtspd == 0) ++ /* High speed case */ ++ return 125 * clock; ++ else ++ /* FS/LS case */ ++ return 1000 * clock; ++} ++ ++/** ++ * This function reads a setup packet from the Rx FIFO into the destination ++ * buffer. This function is called from the Rx Status Queue Level (RxStsQLvl) ++ * Interrupt routine when a SETUP packet has been received in Slave mode. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dest Destination buffer for packet data. ++ */ ++void dwc_otg_read_setup_packet(dwc_otg_core_if_t * core_if, uint32_t * dest) ++{ ++ device_grxsts_data_t status; ++ /* Get the 8 bytes of a setup transaction data */ ++ ++ /* Pop 2 DWORDS off the receive data FIFO into memory */ ++ dest[0] = DWC_READ_REG32(core_if->data_fifo[0]); ++ dest[1] = DWC_READ_REG32(core_if->data_fifo[0]); ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ status.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->grxstsp); ++ DWC_DEBUGPL(DBG_ANY, ++ "EP:%d BCnt:%d " "pktsts:%x Frame:%d(0x%0x)\n", ++ status.b.epnum, status.b.bcnt, status.b.pktsts, ++ status.b.fn, status.b.fn); ++ } ++} ++ ++/** ++ * This function enables EP0 OUT to receive SETUP packets and configures EP0 ++ * IN for transmitting packets. It is normally called when the ++ * "Enumeration Done" interrupt occurs. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP0 data. ++ */ ++void dwc_otg_ep0_activate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dsts_data_t dsts; ++ depctl_data_t diepctl; ++ depctl_data_t doepctl; ++ dctl_data_t dctl = {.d32 = 0 }; ++ ++ ep->stp_rollover = 0; ++ /* Read the Device Status and Endpoint 0 Control registers */ ++ dsts.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dsts); ++ diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl); ++ doepctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl); ++ ++ /* Set the MPS of the IN EP based on the enumeration speed */ ++ switch (dsts.b.enumspd) { ++ case DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ: ++ case DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ: ++ case DWC_DSTS_ENUMSPD_FS_PHY_48MHZ: ++ diepctl.b.mps = DWC_DEP0CTL_MPS_64; ++ break; ++ case DWC_DSTS_ENUMSPD_LS_PHY_6MHZ: ++ diepctl.b.mps = DWC_DEP0CTL_MPS_8; ++ break; ++ } ++ ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32); ++ ++ /* Enable OUT EP for receive */ ++ if (core_if->snpsid <= OTG_CORE_REV_2_94a) { ++ doepctl.b.epena = 1; ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepctl, doepctl.d32); ++ } ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, "doepctl0=%0x\n", ++ DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl)); ++ DWC_DEBUGPL(DBG_PCDV, "diepctl0=%0x\n", ++ DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl)); ++#endif ++ dctl.b.cgnpinnak = 1; ++ ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); ++ DWC_DEBUGPL(DBG_PCDV, "dctl=%0x\n", ++ DWC_READ_REG32(&dev_if->dev_global_regs->dctl)); ++ ++} ++ ++/** ++ * This function activates an EP. The Device EP control register for ++ * the EP is configured as defined in the ep structure. Note: This ++ * function is not used for EP0. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to activate. ++ */ ++void dwc_otg_ep_activate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ depctl_data_t depctl; ++ volatile uint32_t *addr; ++ daint_data_t daintmsk = {.d32 = 0 }; ++ dcfg_data_t dcfg; ++ uint8_t i; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s() EP%d-%s\n", __func__, ep->num, ++ (ep->is_in ? "IN" : "OUT")); ++ ++#ifdef DWC_UTE_PER_IO ++ ep->xiso_frame_num = 0xFFFFFFFF; ++ ep->xiso_active_xfers = 0; ++ ep->xiso_queued_xfers = 0; ++#endif ++ /* Read DEPCTLn register */ ++ if (ep->is_in == 1) { ++ addr = &dev_if->in_ep_regs[ep->num]->diepctl; ++ daintmsk.ep.in = 1 << ep->num; ++ } else { ++ addr = &dev_if->out_ep_regs[ep->num]->doepctl; ++ daintmsk.ep.out = 1 << ep->num; ++ } ++ ++ /* If the EP is already active don't change the EP Control ++ * register. */ ++ depctl.d32 = DWC_READ_REG32(addr); ++ if (!depctl.b.usbactep) { ++ depctl.b.mps = ep->maxpacket; ++ depctl.b.eptype = ep->type; ++ depctl.b.txfnum = ep->tx_fifo_num; ++ ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ depctl.b.setd0pid = 1; // ??? ++ } else { ++ depctl.b.setd0pid = 1; ++ } ++ depctl.b.usbactep = 1; ++ ++ /* Update nextep_seq array and EPMSCNT in DCFG*/ ++ if (!(depctl.b.eptype & 1) && (ep->is_in == 1)) { // NP IN EP ++ for (i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ if (core_if->nextep_seq[i] == core_if->first_in_nextep_seq) ++ break; ++ } ++ core_if->nextep_seq[i] = ep->num; ++ core_if->nextep_seq[ep->num] = core_if->first_in_nextep_seq; ++ depctl.b.nextep = core_if->nextep_seq[ep->num]; ++ dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg); ++ dcfg.b.epmscnt++; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "%s first_in_nextep_seq= %2d; nextep_seq[]:\n", ++ __func__, core_if->first_in_nextep_seq); ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_DEBUGPL(DBG_PCDV, "%2d\n", ++ core_if->nextep_seq[i]); ++ } ++ ++ } ++ ++ ++ DWC_WRITE_REG32(addr, depctl.d32); ++ DWC_DEBUGPL(DBG_PCDV, "DEPCTL=%08x\n", DWC_READ_REG32(addr)); ++ } ++ ++ /* Enable the Interrupt for this EP */ ++ if (core_if->multiproc_int_enable) { ++ if (ep->is_in == 1) { ++ diepmsk_data_t diepmsk = {.d32 = 0 }; ++ diepmsk.b.xfercompl = 1; ++ diepmsk.b.timeout = 1; ++ diepmsk.b.epdisabled = 1; ++ diepmsk.b.ahberr = 1; ++ diepmsk.b.intknepmis = 1; ++ if (!core_if->en_multiple_tx_fifo && core_if->dma_enable) ++ diepmsk.b.intknepmis = 0; ++ diepmsk.b.txfifoundrn = 1; //????? ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ diepmsk.b.nak = 1; ++ } ++ ++ ++ ++/* ++ if (core_if->dma_desc_enable) { ++ diepmsk.b.bna = 1; ++ } ++*/ ++/* ++ if (core_if->dma_enable) { ++ doepmsk.b.nak = 1; ++ } ++*/ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs-> ++ diepeachintmsk[ep->num], diepmsk.d32); ++ ++ } else { ++ doepmsk_data_t doepmsk = {.d32 = 0 }; ++ doepmsk.b.xfercompl = 1; ++ doepmsk.b.ahberr = 1; ++ doepmsk.b.epdisabled = 1; ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) ++ doepmsk.b.outtknepdis = 1; ++ ++/* ++ ++ if (core_if->dma_desc_enable) { ++ doepmsk.b.bna = 1; ++ } ++*/ ++/* ++ doepmsk.b.babble = 1; ++ doepmsk.b.nyet = 1; ++ doepmsk.b.nak = 1; ++*/ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs-> ++ doepeachintmsk[ep->num], doepmsk.d32); ++ } ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->deachintmsk, ++ 0, daintmsk.d32); ++ } else { ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ if (ep->is_in) { ++ diepmsk_data_t diepmsk = {.d32 = 0 }; ++ diepmsk.b.nak = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->diepmsk, 0, diepmsk.d32); ++ } else { ++ doepmsk_data_t doepmsk = {.d32 = 0 }; ++ doepmsk.b.outtknepdis = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->doepmsk, 0, doepmsk.d32); ++ } ++ } ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->daintmsk, ++ 0, daintmsk.d32); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "DAINTMSK=%0x\n", ++ DWC_READ_REG32(&dev_if->dev_global_regs->daintmsk)); ++ ++ ep->stall_clear_flag = 0; ++ ++ return; ++} ++ ++/** ++ * This function deactivates an EP. This is done by clearing the USB Active ++ * EP bit in the Device EP control register. Note: This function is not used ++ * for EP0. EP0 cannot be deactivated. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to deactivate. ++ */ ++void dwc_otg_ep_deactivate(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl = {.d32 = 0 }; ++ volatile uint32_t *addr; ++ daint_data_t daintmsk = {.d32 = 0 }; ++ dcfg_data_t dcfg; ++ uint8_t i = 0; ++ ++#ifdef DWC_UTE_PER_IO ++ ep->xiso_frame_num = 0xFFFFFFFF; ++ ep->xiso_active_xfers = 0; ++ ep->xiso_queued_xfers = 0; ++#endif ++ ++ /* Read DEPCTLn register */ ++ if (ep->is_in == 1) { ++ addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl; ++ daintmsk.ep.in = 1 << ep->num; ++ } else { ++ addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl; ++ daintmsk.ep.out = 1 << ep->num; ++ } ++ ++ depctl.d32 = DWC_READ_REG32(addr); ++ ++ depctl.b.usbactep = 0; ++ ++ /* Update nextep_seq array and EPMSCNT in DCFG*/ ++ if (!(depctl.b.eptype & 1) && ep->is_in == 1) { // NP EP IN ++ for (i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ if (core_if->nextep_seq[i] == ep->num) ++ break; ++ } ++ core_if->nextep_seq[i] = core_if->nextep_seq[ep->num]; ++ if (core_if->first_in_nextep_seq == ep->num) ++ core_if->first_in_nextep_seq = i; ++ core_if->nextep_seq[ep->num] = 0xff; ++ depctl.b.nextep = 0; ++ dcfg.d32 = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ dcfg.b.epmscnt--; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, ++ dcfg.d32); ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "%s first_in_nextep_seq= %2d; nextep_seq[]:\n", ++ __func__, core_if->first_in_nextep_seq); ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_DEBUGPL(DBG_PCDV, "%2d\n", core_if->nextep_seq[i]); ++ } ++ } ++ ++ if (ep->is_in == 1) ++ depctl.b.txfnum = 0; ++ ++ if (core_if->dma_desc_enable) ++ depctl.b.epdis = 1; ++ ++ DWC_WRITE_REG32(addr, depctl.d32); ++ depctl.d32 = DWC_READ_REG32(addr); ++ if (core_if->dma_enable && ep->type == DWC_OTG_EP_TYPE_ISOC ++ && depctl.b.epena) { ++ depctl_data_t depctl = {.d32 = 0}; ++ if (ep->is_in) { ++ diepint_data_t diepint = {.d32 = 0}; ++ ++ depctl.b.snak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ diepctl, depctl.d32); ++ do { ++ dwc_udelay(10); ++ diepint.d32 = ++ DWC_READ_REG32(&core_if-> ++ dev_if->in_ep_regs[ep->num]-> ++ diepint); ++ } while (!diepint.b.inepnakeff); ++ diepint.b.inepnakeff = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ diepint, diepint.d32); ++ depctl.d32 = 0; ++ depctl.b.epdis = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ diepctl, depctl.d32); ++ do { ++ dwc_udelay(10); ++ diepint.d32 = ++ DWC_READ_REG32(&core_if-> ++ dev_if->in_ep_regs[ep->num]-> ++ diepint); ++ } while (!diepint.b.epdisabled); ++ diepint.b.epdisabled = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ diepint, diepint.d32); ++ } else { ++ dctl_data_t dctl = {.d32 = 0}; ++ gintmsk_data_t gintsts = {.d32 = 0}; ++ doepint_data_t doepint = {.d32 = 0}; ++ dctl.b.sgoutnak = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ dctl, 0, dctl.d32); ++ do { ++ dwc_udelay(10); ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ } while (!gintsts.b.goutnakeff); ++ gintsts.d32 = 0; ++ gintsts.b.goutnakeff = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ depctl.d32 = 0; ++ depctl.b.epdis = 1; ++ depctl.b.snak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]->doepctl, depctl.d32); ++ do ++ { ++ dwc_udelay(10); ++ doepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->num]->doepint); ++ } while (!doepint.b.epdisabled); ++ ++ doepint.b.epdisabled = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]->doepint, doepint.d32); ++ ++ dctl.d32 = 0; ++ dctl.b.cgoutnak = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ } ++ } ++ ++ /* Disable the Interrupt for this EP */ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->deachintmsk, ++ daintmsk.d32, 0); ++ ++ if (ep->is_in == 1) { ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs-> ++ diepeachintmsk[ep->num], 0); ++ } else { ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs-> ++ doepeachintmsk[ep->num], 0); ++ } ++ } else { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->daintmsk, ++ daintmsk.d32, 0); ++ } ++ ++} ++ ++/** ++ * This function initializes dma descriptor chain. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ */ ++static void init_dma_desc_chain(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ uint32_t offset; ++ uint32_t xfer_est; ++ int i; ++ unsigned maxxfer_local, total_len; ++ ++ if (!ep->is_in && ep->type == DWC_OTG_EP_TYPE_INTR && ++ (ep->maxpacket%4)) { ++ maxxfer_local = ep->maxpacket; ++ total_len = ep->xfer_len; ++ } else { ++ maxxfer_local = ep->maxxfer; ++ total_len = ep->total_len; ++ } ++ ++ ep->desc_cnt = (total_len / maxxfer_local) + ++ ((total_len % maxxfer_local) ? 1 : 0); ++ ++ if (!ep->desc_cnt) ++ ep->desc_cnt = 1; ++ ++ if (ep->desc_cnt > MAX_DMA_DESC_CNT) ++ ep->desc_cnt = MAX_DMA_DESC_CNT; ++ ++ dma_desc = ep->desc_addr; ++ if (maxxfer_local == ep->maxpacket) { ++ if ((total_len % maxxfer_local) && ++ (total_len/maxxfer_local < MAX_DMA_DESC_CNT)) { ++ xfer_est = (ep->desc_cnt - 1) * maxxfer_local + ++ (total_len % maxxfer_local); ++ } else ++ xfer_est = ep->desc_cnt * maxxfer_local; ++ } else ++ xfer_est = total_len; ++ offset = 0; ++ for (i = 0; i < ep->desc_cnt; ++i) { ++ /** DMA Descriptor Setup */ ++ if (xfer_est > maxxfer_local) { ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ dma_desc->status.b.l = 0; ++ dma_desc->status.b.ioc = 0; ++ dma_desc->status.b.sp = 0; ++ dma_desc->status.b.bytes = maxxfer_local; ++ dma_desc->buf = ep->dma_addr + offset; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ xfer_est -= maxxfer_local; ++ offset += maxxfer_local; ++ } else { ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ if (ep->is_in) { ++ dma_desc->status.b.sp = ++ (xfer_est % ++ ep->maxpacket) ? 1 : ((ep-> ++ sent_zlp) ? 1 : 0); ++ dma_desc->status.b.bytes = xfer_est; ++ } else { ++ if (maxxfer_local == ep->maxpacket) ++ dma_desc->status.b.bytes = xfer_est; ++ else ++ dma_desc->status.b.bytes = ++ xfer_est + ((4 - (xfer_est & 0x3)) & 0x3); ++ } ++ ++ dma_desc->buf = ep->dma_addr + offset; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ } ++ dma_desc++; ++ } ++} ++/** ++ * This function is called when to write ISOC data into appropriate dedicated ++ * periodic FIFO. ++ */ ++static int32_t write_isoc_tx_fifo(dwc_otg_core_if_t * core_if, dwc_ep_t * dwc_ep) ++{ ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dwc_otg_dev_in_ep_regs_t *ep_regs; ++ dtxfsts_data_t txstatus = {.d32 = 0 }; ++ uint32_t len = 0; ++ int epnum = dwc_ep->num; ++ int dwords; ++ ++ DWC_DEBUGPL(DBG_PCD, "Dedicated TxFifo Empty: %d \n", epnum); ++ ++ ep_regs = core_if->dev_if->in_ep_regs[epnum]; ++ ++ len = dwc_ep->xfer_len - dwc_ep->xfer_count; ++ ++ if (len > dwc_ep->maxpacket) { ++ len = dwc_ep->maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ ++ /* While there is space in the queue and space in the FIFO and ++ * More data to tranfer, Write packets to the Tx FIFO */ ++ txstatus.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum, txstatus.d32); ++ ++ while (txstatus.b.txfspcavail > dwords && ++ dwc_ep->xfer_count < dwc_ep->xfer_len && dwc_ep->xfer_len != 0) { ++ /* Write the FIFO */ ++ dwc_otg_ep_write_packet(core_if, dwc_ep, 0); ++ ++ len = dwc_ep->xfer_len - dwc_ep->xfer_count; ++ if (len > dwc_ep->maxpacket) { ++ len = dwc_ep->maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ txstatus.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "dtxfsts[%d]=0x%08x\n", epnum, ++ txstatus.d32); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum, ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts)); ++ ++ return 1; ++} ++/** ++ * This function does the setup for a data transfer for an EP and ++ * starts the transfer. For an IN transfer, the packets will be ++ * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers, ++ * the packets are unloaded from the Rx FIFO in the ISR. the ISR. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ */ ++ ++void dwc_otg_ep_start_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl; ++ deptsiz_data_t deptsiz; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s()\n", __func__); ++ DWC_DEBUGPL(DBG_PCD, "ep%d-%s xfer_len=%d xfer_cnt=%d " ++ "xfer_buff=%p start_xfer_buff=%p, total_len = %d\n", ++ ep->num, (ep->is_in ? "IN" : "OUT"), ep->xfer_len, ++ ep->xfer_count, ep->xfer_buff, ep->start_xfer_buff, ++ ep->total_len); ++ /* IN endpoint */ ++ if (ep->is_in == 1) { ++ dwc_otg_dev_in_ep_regs_t *in_regs = ++ core_if->dev_if->in_ep_regs[ep->num]; ++ ++ gnptxsts_data_t gtxstatus; ++ ++ gtxstatus.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gnptxsts); ++ ++ if (core_if->en_multiple_tx_fifo == 0 ++ && gtxstatus.b.nptxqspcavail == 0 && !core_if->dma_enable) { ++#ifdef DEBUG ++ DWC_PRINTF("TX Queue Full (0x%0x)\n", gtxstatus.d32); ++#endif ++ return; ++ } ++ ++ depctl.d32 = DWC_READ_REG32(&(in_regs->diepctl)); ++ deptsiz.d32 = DWC_READ_REG32(&(in_regs->dieptsiz)); ++ ++ if (ep->maxpacket > ep->maxxfer / MAX_PKT_CNT) ++ ep->xfer_len += (ep->maxxfer < (ep->total_len - ep->xfer_len)) ? ++ ep->maxxfer : (ep->total_len - ep->xfer_len); ++ else ++ ep->xfer_len += (MAX_PKT_CNT * ep->maxpacket < (ep->total_len - ep->xfer_len)) ? ++ MAX_PKT_CNT * ep->maxpacket : (ep->total_len - ep->xfer_len); ++ ++ ++ /* Zero Length Packet? */ ++ if ((ep->xfer_len - ep->xfer_count) == 0) { ++ deptsiz.b.xfersize = 0; ++ deptsiz.b.pktcnt = 1; ++ } else { ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ deptsiz.b.xfersize = ep->xfer_len - ep->xfer_count; ++ deptsiz.b.pktcnt = ++ (ep->xfer_len - ep->xfer_count - 1 + ++ ep->maxpacket) / ep->maxpacket; ++ if (deptsiz.b.pktcnt > MAX_PKT_CNT) { ++ deptsiz.b.pktcnt = MAX_PKT_CNT; ++ deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket; ++ } ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) ++ deptsiz.b.mc = deptsiz.b.pktcnt; ++ } ++ ++ /* Write the DMA register */ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable == 0) { ++ if (ep->type != DWC_OTG_EP_TYPE_ISOC) ++ deptsiz.b.mc = 1; ++ DWC_WRITE_REG32(&in_regs->dieptsiz, ++ deptsiz.d32); ++ DWC_WRITE_REG32(&(in_regs->diepdma), ++ (uint32_t) ep->dma_addr); ++ } else { ++#ifdef DWC_UTE_CFI ++ /* The descriptor chain should be already initialized by now */ ++ if (ep->buff_mode != BM_STANDARD) { ++ DWC_WRITE_REG32(&in_regs->diepdma, ++ ep->descs_dma_addr); ++ } else { ++#endif ++ init_dma_desc_chain(core_if, ep); ++ /** DIEPDMAn Register write */ ++ DWC_WRITE_REG32(&in_regs->diepdma, ++ ep->dma_desc_addr); ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ } ++ } else { ++ DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32); ++ if (ep->type != DWC_OTG_EP_TYPE_ISOC) { ++ /** ++ * Enable the Non-Periodic Tx FIFO empty interrupt, ++ * or the Tx FIFO epmty interrupt in dedicated Tx FIFO mode, ++ * the data will be written into the fifo by the ISR. ++ */ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32 ++ (&core_if->core_global_regs->gintmsk, ++ intr_mask.d32, intr_mask.d32); ++ } else { ++ /* Enable the Tx FIFO Empty Interrupt for this EP */ ++ if (ep->xfer_len > 0) { ++ uint32_t fifoemptymsk = 0; ++ fifoemptymsk = 1 << ep->num; ++ DWC_MODIFY_REG32 ++ (&core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk, ++ 0, fifoemptymsk); ++ ++ } ++ } ++ } else { ++ write_isoc_tx_fifo(core_if, ep); ++ } ++ } ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) ++ depctl.b.nextep = core_if->nextep_seq[ep->num]; ++ ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ dsts_data_t dsts = {.d32 = 0}; ++ if (ep->bInterval == 1) { ++ dsts.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->dsts); ++ ep->frame_num = dsts.b.soffn + ep->bInterval; ++ if (ep->frame_num > 0x3FFF) { ++ ep->frm_overrun = 1; ++ ep->frame_num &= 0x3FFF; ++ } else ++ ep->frm_overrun = 0; ++ if (ep->frame_num & 0x1) { ++ depctl.b.setd1pid = 1; ++ } else { ++ depctl.b.setd0pid = 1; ++ } ++ } ++ } ++ /* EP enable, IN data in FIFO */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32); ++ ++ } else { ++ /* OUT endpoint */ ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[ep->num]; ++ ++ depctl.d32 = DWC_READ_REG32(&(out_regs->doepctl)); ++ deptsiz.d32 = DWC_READ_REG32(&(out_regs->doeptsiz)); ++ ++ if (!core_if->dma_desc_enable) { ++ if (ep->maxpacket > ep->maxxfer / MAX_PKT_CNT) ++ ep->xfer_len += (ep->maxxfer < (ep->total_len - ep->xfer_len)) ? ++ ep->maxxfer : (ep->total_len - ep->xfer_len); ++ else ++ ep->xfer_len += (MAX_PKT_CNT * ep->maxpacket < (ep->total_len ++ - ep->xfer_len)) ? MAX_PKT_CNT * ep->maxpacket : (ep->total_len - ep->xfer_len); ++ } ++ ++ /* Program the transfer size and packet count as follows: ++ * ++ * pktcnt = N ++ * xfersize = N * maxpacket ++ */ ++ if ((ep->xfer_len - ep->xfer_count) == 0) { ++ /* Zero Length Packet */ ++ deptsiz.b.xfersize = ep->maxpacket; ++ deptsiz.b.pktcnt = 1; ++ } else { ++ deptsiz.b.pktcnt = ++ (ep->xfer_len - ep->xfer_count + ++ (ep->maxpacket - 1)) / ep->maxpacket; ++ if (deptsiz.b.pktcnt > MAX_PKT_CNT) { ++ deptsiz.b.pktcnt = MAX_PKT_CNT; ++ } ++ if (!core_if->dma_desc_enable) { ++ ep->xfer_len = ++ deptsiz.b.pktcnt * ep->maxpacket + ep->xfer_count; ++ } ++ deptsiz.b.xfersize = ep->xfer_len - ep->xfer_count; ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "ep%d xfersize=%d pktcnt=%d\n", ++ ep->num, deptsiz.b.xfersize, deptsiz.b.pktcnt); ++ ++ if (core_if->dma_enable) { ++ if (!core_if->dma_desc_enable) { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, ++ deptsiz.d32); ++ ++ DWC_WRITE_REG32(&(out_regs->doepdma), ++ (uint32_t) ep->dma_addr); ++ } else { ++#ifdef DWC_UTE_CFI ++ /* The descriptor chain should be already initialized by now */ ++ if (ep->buff_mode != BM_STANDARD) { ++ DWC_WRITE_REG32(&out_regs->doepdma, ++ ep->descs_dma_addr); ++ } else { ++#endif ++ /** This is used for interrupt out transfers*/ ++ if (!ep->xfer_len) ++ ep->xfer_len = ep->total_len; ++ init_dma_desc_chain(core_if, ep); ++ ++ if (core_if->core_params->dev_out_nak) { ++ if (ep->type == DWC_OTG_EP_TYPE_BULK) { ++ deptsiz.b.pktcnt = (ep->total_len + ++ (ep->maxpacket - 1)) / ep->maxpacket; ++ deptsiz.b.xfersize = ep->total_len; ++ /* Remember initial value of doeptsiz */ ++ core_if->start_doeptsiz_val[ep->num] = deptsiz.d32; ++ DWC_WRITE_REG32(&out_regs->doeptsiz, ++ deptsiz.d32); ++ } ++ } ++ /** DOEPDMAn Register write */ ++ DWC_WRITE_REG32(&out_regs->doepdma, ++ ep->dma_desc_addr); ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ } ++ } else { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32); ++ } ++ ++ if (ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ dsts_data_t dsts = {.d32 = 0}; ++ if (ep->bInterval == 1) { ++ dsts.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->dsts); ++ ep->frame_num = dsts.b.soffn + ep->bInterval; ++ if (ep->frame_num > 0x3FFF) { ++ ep->frm_overrun = 1; ++ ep->frame_num &= 0x3FFF; ++ } else ++ ep->frm_overrun = 0; ++ ++ if (ep->frame_num & 0x1) { ++ depctl.b.setd1pid = 1; ++ } else { ++ depctl.b.setd0pid = 1; ++ } ++ } ++ } ++ ++ /* EP enable */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ ++ DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32); ++ ++ DWC_DEBUGPL(DBG_PCD, "DOEPCTL=%08x DOEPTSIZ=%08x\n", ++ DWC_READ_REG32(&out_regs->doepctl), ++ DWC_READ_REG32(&out_regs->doeptsiz)); ++ DWC_DEBUGPL(DBG_PCD, "DAINTMSK=%08x GINTMSK=%08x\n", ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs-> ++ daintmsk), ++ DWC_READ_REG32(&core_if->core_global_regs-> ++ gintmsk)); ++ ++ /* Timer is scheduling only for out bulk transfers for ++ * "Device DDMA OUT NAK Enhancement" feature to inform user ++ * about received data payload in case of timeout ++ */ ++ if (core_if->core_params->dev_out_nak) { ++ if (ep->type == DWC_OTG_EP_TYPE_BULK) { ++ core_if->ep_xfer_info[ep->num].core_if = core_if; ++ core_if->ep_xfer_info[ep->num].ep = ep; ++ core_if->ep_xfer_info[ep->num].state = 1; ++ ++ /* Start a timer for this transfer. */ ++ DWC_TIMER_SCHEDULE(core_if->ep_xfer_timer[ep->num], 10000); ++ } ++ } ++ } ++} ++ ++/** ++ * This function setup a zero length transfer in Buffer DMA and ++ * Slave modes for usb requests with zero field set ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++void dwc_otg_ep_start_zl_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ ++ depctl_data_t depctl; ++ deptsiz_data_t deptsiz; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s()\n", __func__); ++ DWC_PRINTF("zero length transfer is called\n"); ++ ++ /* IN endpoint */ ++ if (ep->is_in == 1) { ++ dwc_otg_dev_in_ep_regs_t *in_regs = ++ core_if->dev_if->in_ep_regs[ep->num]; ++ ++ depctl.d32 = DWC_READ_REG32(&(in_regs->diepctl)); ++ deptsiz.d32 = DWC_READ_REG32(&(in_regs->dieptsiz)); ++ ++ deptsiz.b.xfersize = 0; ++ deptsiz.b.pktcnt = 1; ++ ++ /* Write the DMA register */ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable == 0) { ++ deptsiz.b.mc = 1; ++ DWC_WRITE_REG32(&in_regs->dieptsiz, ++ deptsiz.d32); ++ DWC_WRITE_REG32(&(in_regs->diepdma), ++ (uint32_t) ep->dma_addr); ++ } ++ } else { ++ DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32); ++ /** ++ * Enable the Non-Periodic Tx FIFO empty interrupt, ++ * or the Tx FIFO epmty interrupt in dedicated Tx FIFO mode, ++ * the data will be written into the fifo by the ISR. ++ */ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gintmsk, ++ intr_mask.d32, intr_mask.d32); ++ } else { ++ /* Enable the Tx FIFO Empty Interrupt for this EP */ ++ if (ep->xfer_len > 0) { ++ uint32_t fifoemptymsk = 0; ++ fifoemptymsk = 1 << ep->num; ++ DWC_MODIFY_REG32(&core_if-> ++ dev_if->dev_global_regs->dtknqr4_fifoemptymsk, ++ 0, fifoemptymsk); ++ } ++ } ++ } ++ ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) ++ depctl.b.nextep = core_if->nextep_seq[ep->num]; ++ /* EP enable, IN data in FIFO */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32); ++ ++ } else { ++ /* OUT endpoint */ ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[ep->num]; ++ ++ depctl.d32 = DWC_READ_REG32(&(out_regs->doepctl)); ++ deptsiz.d32 = DWC_READ_REG32(&(out_regs->doeptsiz)); ++ ++ /* Zero Length Packet */ ++ deptsiz.b.xfersize = ep->maxpacket; ++ deptsiz.b.pktcnt = 1; ++ ++ if (core_if->dma_enable) { ++ if (!core_if->dma_desc_enable) { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, ++ deptsiz.d32); ++ ++ DWC_WRITE_REG32(&(out_regs->doepdma), ++ (uint32_t) ep->dma_addr); ++ } ++ } else { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32); ++ } ++ ++ /* EP enable */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ ++ DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32); ++ ++ } ++} ++ ++/** ++ * This function does the setup for a data transfer for EP0 and starts ++ * the transfer. For an IN transfer, the packets will be loaded into ++ * the appropriate Tx FIFO in the ISR. For OUT transfers, the packets are ++ * unloaded from the Rx FIFO in the ISR. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP0 data. ++ */ ++void dwc_otg_ep0_start_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl; ++ deptsiz0_data_t deptsiz; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ ++ DWC_DEBUGPL(DBG_PCD, "ep%d-%s xfer_len=%d xfer_cnt=%d " ++ "xfer_buff=%p start_xfer_buff=%p \n", ++ ep->num, (ep->is_in ? "IN" : "OUT"), ep->xfer_len, ++ ep->xfer_count, ep->xfer_buff, ep->start_xfer_buff); ++ ++ ep->total_len = ep->xfer_len; ++ ++ /* IN endpoint */ ++ if (ep->is_in == 1) { ++ dwc_otg_dev_in_ep_regs_t *in_regs = ++ core_if->dev_if->in_ep_regs[0]; ++ ++ gnptxsts_data_t gtxstatus; ++ ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ depctl.d32 = DWC_READ_REG32(&in_regs->diepctl); ++ if (depctl.b.epena) ++ return; ++ } ++ ++ gtxstatus.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gnptxsts); ++ ++ /* If dedicated FIFO every time flush fifo before enable ep*/ ++ if (core_if->en_multiple_tx_fifo && core_if->snpsid >= OTG_CORE_REV_3_00a) ++ dwc_otg_flush_tx_fifo(core_if, ep->tx_fifo_num); ++ ++ if (core_if->en_multiple_tx_fifo == 0 ++ && gtxstatus.b.nptxqspcavail == 0 ++ && !core_if->dma_enable) { ++#ifdef DEBUG ++ deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz); ++ DWC_DEBUGPL(DBG_PCD, "DIEPCTL0=%0x\n", ++ DWC_READ_REG32(&in_regs->diepctl)); ++ DWC_DEBUGPL(DBG_PCD, "DIEPTSIZ0=%0x (sz=%d, pcnt=%d)\n", ++ deptsiz.d32, ++ deptsiz.b.xfersize, deptsiz.b.pktcnt); ++ DWC_PRINTF("TX Queue or FIFO Full (0x%0x)\n", ++ gtxstatus.d32); ++#endif ++ return; ++ } ++ ++ depctl.d32 = DWC_READ_REG32(&in_regs->diepctl); ++ deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz); ++ ++ /* Zero Length Packet? */ ++ if (ep->xfer_len == 0) { ++ deptsiz.b.xfersize = 0; ++ deptsiz.b.pktcnt = 1; ++ } else { ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ if (ep->xfer_len > ep->maxpacket) { ++ ep->xfer_len = ep->maxpacket; ++ deptsiz.b.xfersize = ep->maxpacket; ++ } else { ++ deptsiz.b.xfersize = ep->xfer_len; ++ } ++ deptsiz.b.pktcnt = 1; ++ ++ } ++ DWC_DEBUGPL(DBG_PCDV, ++ "IN len=%d xfersize=%d pktcnt=%d [%08x]\n", ++ ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt, ++ deptsiz.d32); ++ ++ /* Write the DMA register */ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable == 0) { ++ DWC_WRITE_REG32(&in_regs->dieptsiz, ++ deptsiz.d32); ++ ++ DWC_WRITE_REG32(&(in_regs->diepdma), ++ (uint32_t) ep->dma_addr); ++ } else { ++ dma_desc = core_if->dev_if->in_desc_addr; ++ ++ /** DMA Descriptor Setup */ ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ dma_desc->status.b.sp = ++ (ep->xfer_len == ep->maxpacket) ? 0 : 1; ++ dma_desc->status.b.bytes = ep->xfer_len; ++ dma_desc->buf = ep->dma_addr; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ /** DIEPDMA0 Register write */ ++ DWC_WRITE_REG32(&in_regs->diepdma, ++ core_if-> ++ dev_if->dma_in_desc_addr); ++ } ++ } else { ++ DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32); ++ } ++ ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) ++ depctl.b.nextep = core_if->nextep_seq[ep->num]; ++ /* EP enable, IN data in FIFO */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32); ++ ++ /** ++ * Enable the Non-Periodic Tx FIFO empty interrupt, the ++ * data will be written into the fifo by the ISR. ++ */ ++ if (!core_if->dma_enable) { ++ if (core_if->en_multiple_tx_fifo == 0) { ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gintmsk, ++ intr_mask.d32, intr_mask.d32); ++ } else { ++ /* Enable the Tx FIFO Empty Interrupt for this EP */ ++ if (ep->xfer_len > 0) { ++ uint32_t fifoemptymsk = 0; ++ fifoemptymsk |= 1 << ep->num; ++ DWC_MODIFY_REG32(&core_if-> ++ dev_if->dev_global_regs->dtknqr4_fifoemptymsk, ++ 0, fifoemptymsk); ++ } ++ } ++ } ++ } else { ++ /* OUT endpoint */ ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[0]; ++ ++ depctl.d32 = DWC_READ_REG32(&out_regs->doepctl); ++ deptsiz.d32 = DWC_READ_REG32(&out_regs->doeptsiz); ++ ++ /* Program the transfer size and packet count as follows: ++ * xfersize = N * (maxpacket + 4 - (maxpacket % 4)) ++ * pktcnt = N */ ++ /* Zero Length Packet */ ++ deptsiz.b.xfersize = ep->maxpacket; ++ deptsiz.b.pktcnt = 1; ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) ++ deptsiz.b.supcnt = 3; ++ ++ DWC_DEBUGPL(DBG_PCDV, "len=%d xfersize=%d pktcnt=%d\n", ++ ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt); ++ ++ if (core_if->dma_enable) { ++ if (!core_if->dma_desc_enable) { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, ++ deptsiz.d32); ++ ++ DWC_WRITE_REG32(&(out_regs->doepdma), ++ (uint32_t) ep->dma_addr); ++ } else { ++ dma_desc = core_if->dev_if->out_desc_addr; ++ ++ /** DMA Descriptor Setup */ ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ dma_desc->status.b.mtrf = 0; ++ dma_desc->status.b.sr = 0; ++ } ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ dma_desc->status.b.bytes = ep->maxpacket; ++ dma_desc->buf = ep->dma_addr; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ /** DOEPDMA0 Register write */ ++ DWC_WRITE_REG32(&out_regs->doepdma, ++ core_if->dev_if-> ++ dma_out_desc_addr); ++ } ++ } else { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32); ++ } ++ ++ /* EP enable */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&(out_regs->doepctl), depctl.d32); ++ } ++} ++ ++/** ++ * This function continues control IN transfers started by ++ * dwc_otg_ep0_start_transfer, when the transfer does not fit in a ++ * single packet. NOTE: The DIEPCTL0/DOEPCTL0 registers only have one ++ * bit for the packet count. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP0 data. ++ */ ++void dwc_otg_ep0_continue_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl; ++ deptsiz0_data_t deptsiz; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ ++ if (ep->is_in == 1) { ++ dwc_otg_dev_in_ep_regs_t *in_regs = ++ core_if->dev_if->in_ep_regs[0]; ++ gnptxsts_data_t tx_status = {.d32 = 0 }; ++ ++ tx_status.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gnptxsts); ++ /** @todo Should there be check for room in the Tx ++ * Status Queue. If not remove the code above this comment. */ ++ ++ depctl.d32 = DWC_READ_REG32(&in_regs->diepctl); ++ deptsiz.d32 = DWC_READ_REG32(&in_regs->dieptsiz); ++ ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ ++ if (core_if->dma_desc_enable == 0) { ++ deptsiz.b.xfersize = ++ (ep->total_len - ep->xfer_count) > ++ ep->maxpacket ? ep->maxpacket : (ep->total_len - ++ ep->xfer_count); ++ deptsiz.b.pktcnt = 1; ++ if (core_if->dma_enable == 0) { ++ ep->xfer_len += deptsiz.b.xfersize; ++ } else { ++ ep->xfer_len = deptsiz.b.xfersize; ++ } ++ DWC_WRITE_REG32(&in_regs->dieptsiz, deptsiz.d32); ++ } else { ++ ep->xfer_len = ++ (ep->total_len - ep->xfer_count) > ++ ep->maxpacket ? ep->maxpacket : (ep->total_len - ++ ep->xfer_count); ++ ++ dma_desc = core_if->dev_if->in_desc_addr; ++ ++ /** DMA Descriptor Setup */ ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ dma_desc->status.b.sp = ++ (ep->xfer_len == ep->maxpacket) ? 0 : 1; ++ dma_desc->status.b.bytes = ep->xfer_len; ++ dma_desc->buf = ep->dma_addr; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ /** DIEPDMA0 Register write */ ++ DWC_WRITE_REG32(&in_regs->diepdma, ++ core_if->dev_if->dma_in_desc_addr); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "IN len=%d xfersize=%d pktcnt=%d [%08x]\n", ++ ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt, ++ deptsiz.d32); ++ ++ /* Write the DMA register */ ++ if (core_if->hwcfg2.b.architecture == DWC_INT_DMA_ARCH) { ++ if (core_if->dma_desc_enable == 0) ++ DWC_WRITE_REG32(&(in_regs->diepdma), ++ (uint32_t) ep->dma_addr); ++ } ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) ++ depctl.b.nextep = core_if->nextep_seq[ep->num]; ++ /* EP enable, IN data in FIFO */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&in_regs->diepctl, depctl.d32); ++ ++ /** ++ * Enable the Non-Periodic Tx FIFO empty interrupt, the ++ * data will be written into the fifo by the ISR. ++ */ ++ if (!core_if->dma_enable) { ++ if (core_if->en_multiple_tx_fifo == 0) { ++ /* First clear it from GINTSTS */ ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gintmsk, ++ intr_mask.d32, intr_mask.d32); ++ ++ } else { ++ /* Enable the Tx FIFO Empty Interrupt for this EP */ ++ if (ep->xfer_len > 0) { ++ uint32_t fifoemptymsk = 0; ++ fifoemptymsk |= 1 << ep->num; ++ DWC_MODIFY_REG32(&core_if-> ++ dev_if->dev_global_regs->dtknqr4_fifoemptymsk, ++ 0, fifoemptymsk); ++ } ++ } ++ } ++ } else { ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[0]; ++ ++ depctl.d32 = DWC_READ_REG32(&out_regs->doepctl); ++ deptsiz.d32 = DWC_READ_REG32(&out_regs->doeptsiz); ++ ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ deptsiz.b.xfersize = ep->maxpacket; ++ deptsiz.b.pktcnt = 1; ++ ++ if (core_if->dma_desc_enable == 0) { ++ DWC_WRITE_REG32(&out_regs->doeptsiz, deptsiz.d32); ++ } else { ++ dma_desc = core_if->dev_if->out_desc_addr; ++ ++ /** DMA Descriptor Setup */ ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ dma_desc->status.b.bytes = ep->maxpacket; ++ dma_desc->buf = ep->dma_addr; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ /** DOEPDMA0 Register write */ ++ DWC_WRITE_REG32(&out_regs->doepdma, ++ core_if->dev_if->dma_out_desc_addr); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "IN len=%d xfersize=%d pktcnt=%d [%08x]\n", ++ ep->xfer_len, deptsiz.b.xfersize, deptsiz.b.pktcnt, ++ deptsiz.d32); ++ ++ /* Write the DMA register */ ++ if (core_if->hwcfg2.b.architecture == DWC_INT_DMA_ARCH) { ++ if (core_if->dma_desc_enable == 0) ++ DWC_WRITE_REG32(&(out_regs->doepdma), ++ (uint32_t) ep->dma_addr); ++ ++ } ++ ++ /* EP enable, IN data in FIFO */ ++ depctl.b.cnak = 1; ++ depctl.b.epena = 1; ++ DWC_WRITE_REG32(&out_regs->doepctl, depctl.d32); ++ ++ } ++} ++ ++#ifdef DEBUG ++void dump_msg(const u8 * buf, unsigned int length) ++{ ++ unsigned int start, num, i; ++ char line[52], *p; ++ ++ if (length >= 512) ++ return; ++ start = 0; ++ while (length > 0) { ++ num = length < 16u ? length : 16u; ++ p = line; ++ for (i = 0; i < num; ++i) { ++ if (i == 8) ++ *p++ = ' '; ++ DWC_SPRINTF(p, " %02x", buf[i]); ++ p += 3; ++ } ++ *p = 0; ++ DWC_PRINTF("%6x: %s\n", start, line); ++ buf += num; ++ start += num; ++ length -= num; ++ } ++} ++#else ++static inline void dump_msg(const u8 * buf, unsigned int length) ++{ ++} ++#endif ++ ++/** ++ * This function writes a packet into the Tx FIFO associated with the ++ * EP. For non-periodic EPs the non-periodic Tx FIFO is written. For ++ * periodic EPs the periodic Tx FIFO associated with the EP is written ++ * with all packets for the next micro-frame. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to write packet for. ++ * @param dma Indicates if DMA is being used. ++ */ ++void dwc_otg_ep_write_packet(dwc_otg_core_if_t * core_if, dwc_ep_t * ep, ++ int dma) ++{ ++ /** ++ * The buffer is padded to DWORD on a per packet basis in ++ * slave/dma mode if the MPS is not DWORD aligned. The last ++ * packet, if short, is also padded to a multiple of DWORD. ++ * ++ * ep->xfer_buff always starts DWORD aligned in memory and is a ++ * multiple of DWORD in length ++ * ++ * ep->xfer_len can be any number of bytes ++ * ++ * ep->xfer_count is a multiple of ep->maxpacket until the last ++ * packet ++ * ++ * FIFO access is DWORD */ ++ ++ uint32_t i; ++ uint32_t byte_count; ++ uint32_t dword_count; ++ uint32_t *fifo; ++ uint32_t *data_buff = (uint32_t *) ep->xfer_buff; ++ ++ DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s(%p,%p)\n", __func__, core_if, ++ ep); ++ if (ep->xfer_count >= ep->xfer_len) { ++ DWC_WARN("%s() No data for EP%d!!!\n", __func__, ep->num); ++ return; ++ } ++ ++ /* Find the byte length of the packet either short packet or MPS */ ++ if ((ep->xfer_len - ep->xfer_count) < ep->maxpacket) { ++ byte_count = ep->xfer_len - ep->xfer_count; ++ } else { ++ byte_count = ep->maxpacket; ++ } ++ ++ /* Find the DWORD length, padded by extra bytes as neccessary if MPS ++ * is not a multiple of DWORD */ ++ dword_count = (byte_count + 3) / 4; ++ ++#ifdef VERBOSE ++ dump_msg(ep->xfer_buff, byte_count); ++#endif ++ ++ /**@todo NGS Where are the Periodic Tx FIFO addresses ++ * intialized? What should this be? */ ++ ++ fifo = core_if->data_fifo[ep->num]; ++ ++ DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "fifo=%p buff=%p *p=%08x bc=%d\n", ++ fifo, data_buff, *data_buff, byte_count); ++ ++ if (!dma) { ++ for (i = 0; i < dword_count; i++, data_buff++) { ++ DWC_WRITE_REG32(fifo, *data_buff); ++ } ++ } ++ ++ ep->xfer_count += byte_count; ++ ep->xfer_buff += byte_count; ++ ep->dma_addr += byte_count; ++} ++ ++/** ++ * Set the EP STALL. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to set the stall on. ++ */ ++void dwc_otg_ep_set_stall(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl; ++ volatile uint32_t *depctl_addr; ++ ++ DWC_DEBUGPL(DBG_PCD, "%s ep%d-%s\n", __func__, ep->num, ++ (ep->is_in ? "IN" : "OUT")); ++ ++ if (ep->is_in == 1) { ++ depctl_addr = &(core_if->dev_if->in_ep_regs[ep->num]->diepctl); ++ depctl.d32 = DWC_READ_REG32(depctl_addr); ++ ++ /* set the disable and stall bits */ ++ if (depctl.b.epena) { ++ depctl.b.epdis = 1; ++ } ++ depctl.b.stall = 1; ++ DWC_WRITE_REG32(depctl_addr, depctl.d32); ++ } else { ++ depctl_addr = &(core_if->dev_if->out_ep_regs[ep->num]->doepctl); ++ depctl.d32 = DWC_READ_REG32(depctl_addr); ++ ++ /* set the stall bit */ ++ depctl.b.stall = 1; ++ DWC_WRITE_REG32(depctl_addr, depctl.d32); ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "DEPCTL=%0x\n", DWC_READ_REG32(depctl_addr)); ++ ++ return; ++} ++ ++/** ++ * Clear the EP STALL. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to clear stall from. ++ */ ++void dwc_otg_ep_clear_stall(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl; ++ volatile uint32_t *depctl_addr; ++ ++ DWC_DEBUGPL(DBG_PCD, "%s ep%d-%s\n", __func__, ep->num, ++ (ep->is_in ? "IN" : "OUT")); ++ ++ if (ep->is_in == 1) { ++ depctl_addr = &(core_if->dev_if->in_ep_regs[ep->num]->diepctl); ++ } else { ++ depctl_addr = &(core_if->dev_if->out_ep_regs[ep->num]->doepctl); ++ } ++ ++ depctl.d32 = DWC_READ_REG32(depctl_addr); ++ ++ /* clear the stall bits */ ++ depctl.b.stall = 0; ++ ++ /* ++ * USB Spec 9.4.5: For endpoints using data toggle, regardless ++ * of whether an endpoint has the Halt feature set, a ++ * ClearFeature(ENDPOINT_HALT) request always results in the ++ * data toggle being reinitialized to DATA0. ++ */ ++ if (ep->type == DWC_OTG_EP_TYPE_INTR || ++ ep->type == DWC_OTG_EP_TYPE_BULK) { ++ depctl.b.setd0pid = 1; /* DATA0 */ ++ } ++ ++ DWC_WRITE_REG32(depctl_addr, depctl.d32); ++ DWC_DEBUGPL(DBG_PCD, "DEPCTL=%0x\n", DWC_READ_REG32(depctl_addr)); ++ return; ++} ++ ++/** ++ * This function reads a packet from the Rx FIFO into the destination ++ * buffer. To read SETUP data use dwc_otg_read_setup_packet. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dest Destination buffer for the packet. ++ * @param bytes Number of bytes to copy to the destination. ++ */ ++void dwc_otg_read_packet(dwc_otg_core_if_t * core_if, ++ uint8_t * dest, uint16_t bytes) ++{ ++ int i; ++ int word_count = (bytes + 3) / 4; ++ ++ volatile uint32_t *fifo = core_if->data_fifo[0]; ++ uint32_t *data_buff = (uint32_t *) dest; ++ ++ /** ++ * @todo Account for the case where _dest is not dword aligned. This ++ * requires reading data from the FIFO into a uint32_t temp buffer, ++ * then moving it into the data buffer. ++ */ ++ ++ DWC_DEBUGPL((DBG_PCDV | DBG_CILV), "%s(%p,%p,%d)\n", __func__, ++ core_if, dest, bytes); ++ ++ for (i = 0; i < word_count; i++, data_buff++) { ++ *data_buff = DWC_READ_REG32(fifo); ++ } ++ ++ return; ++} ++ ++/** ++ * This functions reads the device registers and prints them ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_dump_dev_registers(dwc_otg_core_if_t * core_if) ++{ ++ int i; ++ volatile uint32_t *addr; ++ ++ DWC_PRINTF("Device Global Registers\n"); ++ addr = &core_if->dev_if->dev_global_regs->dcfg; ++ DWC_PRINTF("DCFG @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->dctl; ++ DWC_PRINTF("DCTL @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->dsts; ++ DWC_PRINTF("DSTS @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->diepmsk; ++ DWC_PRINTF("DIEPMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->doepmsk; ++ DWC_PRINTF("DOEPMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->daint; ++ DWC_PRINTF("DAINT @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->daintmsk; ++ DWC_PRINTF("DAINTMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->dtknqr1; ++ DWC_PRINTF("DTKNQR1 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ if (core_if->hwcfg2.b.dev_token_q_depth > 6) { ++ addr = &core_if->dev_if->dev_global_regs->dtknqr2; ++ DWC_PRINTF("DTKNQR2 @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ ++ addr = &core_if->dev_if->dev_global_regs->dvbusdis; ++ DWC_PRINTF("DVBUSID @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ ++ addr = &core_if->dev_if->dev_global_regs->dvbuspulse; ++ DWC_PRINTF("DVBUSPULSE @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ ++ addr = &core_if->dev_if->dev_global_regs->dtknqr3_dthrctl; ++ DWC_PRINTF("DTKNQR3_DTHRCTL @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ ++ if (core_if->hwcfg2.b.dev_token_q_depth > 22) { ++ addr = &core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk; ++ DWC_PRINTF("DTKNQR4 @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ ++ addr = &core_if->dev_if->dev_global_regs->dtknqr4_fifoemptymsk; ++ DWC_PRINTF("FIFOEMPMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ ++ if (core_if->hwcfg2.b.multi_proc_int) { ++ ++ addr = &core_if->dev_if->dev_global_regs->deachint; ++ DWC_PRINTF("DEACHINT @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->dev_global_regs->deachintmsk; ++ DWC_PRINTF("DEACHINTMSK @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ ++ for (i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ addr = ++ &core_if->dev_if-> ++ dev_global_regs->diepeachintmsk[i]; ++ DWC_PRINTF("DIEPEACHINTMSK[%d] @0x%08lX : 0x%08X\n", ++ i, (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ } ++ ++ for (i = 0; i <= core_if->dev_if->num_out_eps; i++) { ++ addr = ++ &core_if->dev_if-> ++ dev_global_regs->doepeachintmsk[i]; ++ DWC_PRINTF("DOEPEACHINTMSK[%d] @0x%08lX : 0x%08X\n", ++ i, (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ } ++ } ++ ++ for (i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_PRINTF("Device IN EP %d Registers\n", i); ++ addr = &core_if->dev_if->in_ep_regs[i]->diepctl; ++ DWC_PRINTF("DIEPCTL @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->in_ep_regs[i]->diepint; ++ DWC_PRINTF("DIEPINT @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->in_ep_regs[i]->dieptsiz; ++ DWC_PRINTF("DIETSIZ @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->in_ep_regs[i]->diepdma; ++ DWC_PRINTF("DIEPDMA @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->in_ep_regs[i]->dtxfsts; ++ DWC_PRINTF("DTXFSTS @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->in_ep_regs[i]->diepdmab; ++ DWC_PRINTF("DIEPDMAB @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, 0 /*DWC_READ_REG32(addr) */ ); ++ } ++ ++ for (i = 0; i <= core_if->dev_if->num_out_eps; i++) { ++ DWC_PRINTF("Device OUT EP %d Registers\n", i); ++ addr = &core_if->dev_if->out_ep_regs[i]->doepctl; ++ DWC_PRINTF("DOEPCTL @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->out_ep_regs[i]->doepint; ++ DWC_PRINTF("DOEPINT @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->out_ep_regs[i]->doeptsiz; ++ DWC_PRINTF("DOETSIZ @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->dev_if->out_ep_regs[i]->doepdma; ++ DWC_PRINTF("DOEPDMA @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ if (core_if->dma_enable) { /* Don't access this register in SLAVE mode */ ++ addr = &core_if->dev_if->out_ep_regs[i]->doepdmab; ++ DWC_PRINTF("DOEPDMAB @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ ++ } ++} ++ ++/** ++ * This functions reads the SPRAM and prints its content ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_dump_spram(dwc_otg_core_if_t * core_if) ++{ ++ volatile uint8_t *addr, *start_addr, *end_addr; ++ ++ DWC_PRINTF("SPRAM Data:\n"); ++ start_addr = (void *)core_if->core_global_regs; ++ DWC_PRINTF("Base Address: 0x%8lX\n", (unsigned long)start_addr); ++ start_addr += 0x00028000; ++ end_addr = (void *)core_if->core_global_regs; ++ end_addr += 0x000280e0; ++ ++ for (addr = start_addr; addr < end_addr; addr += 16) { ++ DWC_PRINTF ++ ("0x%8lX:\t%2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X %2X\n", ++ (unsigned long)addr, addr[0], addr[1], addr[2], addr[3], ++ addr[4], addr[5], addr[6], addr[7], addr[8], addr[9], ++ addr[10], addr[11], addr[12], addr[13], addr[14], addr[15] ++ ); ++ } ++ ++ return; ++} ++ ++/** ++ * This function reads the host registers and prints them ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_dump_host_registers(dwc_otg_core_if_t * core_if) ++{ ++ int i; ++ volatile uint32_t *addr; ++ ++ DWC_PRINTF("Host Global Registers\n"); ++ addr = &core_if->host_if->host_global_regs->hcfg; ++ DWC_PRINTF("HCFG @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->host_global_regs->hfir; ++ DWC_PRINTF("HFIR @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->host_global_regs->hfnum; ++ DWC_PRINTF("HFNUM @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->host_global_regs->hptxsts; ++ DWC_PRINTF("HPTXSTS @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->host_global_regs->haint; ++ DWC_PRINTF("HAINT @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->host_global_regs->haintmsk; ++ DWC_PRINTF("HAINTMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ if (core_if->dma_desc_enable) { ++ addr = &core_if->host_if->host_global_regs->hflbaddr; ++ DWC_PRINTF("HFLBADDR @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ ++ addr = core_if->host_if->hprt0; ++ DWC_PRINTF("HPRT0 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ ++ for (i = 0; i < core_if->core_params->host_channels; i++) { ++ DWC_PRINTF("Host Channel %d Specific Registers\n", i); ++ addr = &core_if->host_if->hc_regs[i]->hcchar; ++ DWC_PRINTF("HCCHAR @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->hc_regs[i]->hcsplt; ++ DWC_PRINTF("HCSPLT @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->hc_regs[i]->hcint; ++ DWC_PRINTF("HCINT @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->hc_regs[i]->hcintmsk; ++ DWC_PRINTF("HCINTMSK @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->hc_regs[i]->hctsiz; ++ DWC_PRINTF("HCTSIZ @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->host_if->hc_regs[i]->hcdma; ++ DWC_PRINTF("HCDMA @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ if (core_if->dma_desc_enable) { ++ addr = &core_if->host_if->hc_regs[i]->hcdmab; ++ DWC_PRINTF("HCDMAB @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ ++ } ++ return; ++} ++ ++/** ++ * This function reads the core global registers and prints them ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_dump_global_registers(dwc_otg_core_if_t * core_if) ++{ ++ int i, ep_num; ++ volatile uint32_t *addr; ++ char *txfsiz; ++ ++ DWC_PRINTF("Core Global Registers\n"); ++ addr = &core_if->core_global_regs->gotgctl; ++ DWC_PRINTF("GOTGCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gotgint; ++ DWC_PRINTF("GOTGINT @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gahbcfg; ++ DWC_PRINTF("GAHBCFG @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gusbcfg; ++ DWC_PRINTF("GUSBCFG @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->grstctl; ++ DWC_PRINTF("GRSTCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gintsts; ++ DWC_PRINTF("GINTSTS @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gintmsk; ++ DWC_PRINTF("GINTMSK @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->grxstsr; ++ DWC_PRINTF("GRXSTSR @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->grxfsiz; ++ DWC_PRINTF("GRXFSIZ @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gnptxfsiz; ++ DWC_PRINTF("GNPTXFSIZ @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gnptxsts; ++ DWC_PRINTF("GNPTXSTS @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gi2cctl; ++ DWC_PRINTF("GI2CCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gpvndctl; ++ DWC_PRINTF("GPVNDCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->ggpio; ++ DWC_PRINTF("GGPIO @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->guid; ++ DWC_PRINTF("GUID @0x%08lX : 0x%08X\n", ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gsnpsid; ++ DWC_PRINTF("GSNPSID @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->ghwcfg1; ++ DWC_PRINTF("GHWCFG1 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->ghwcfg2; ++ DWC_PRINTF("GHWCFG2 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->ghwcfg3; ++ DWC_PRINTF("GHWCFG3 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->ghwcfg4; ++ DWC_PRINTF("GHWCFG4 @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->glpmcfg; ++ DWC_PRINTF("GLPMCFG @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gpwrdn; ++ DWC_PRINTF("GPWRDN @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->gdfifocfg; ++ DWC_PRINTF("GDFIFOCFG @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ addr = &core_if->core_global_regs->adpctl; ++ DWC_PRINTF("ADPCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ dwc_otg_adp_read_reg(core_if)); ++ addr = &core_if->core_global_regs->hptxfsiz; ++ DWC_PRINTF("HPTXFSIZ @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ ep_num = core_if->hwcfg4.b.num_dev_perio_in_ep; ++ txfsiz = "DPTXFSIZ"; ++ } else { ++ ep_num = core_if->hwcfg4.b.num_in_eps; ++ txfsiz = "DIENPTXF"; ++ } ++ for (i = 0; i < ep_num; i++) { ++ addr = &core_if->core_global_regs->dtxfsiz[i]; ++ DWC_PRINTF("%s[%d] @0x%08lX : 0x%08X\n", txfsiz, i + 1, ++ (unsigned long)addr, DWC_READ_REG32(addr)); ++ } ++ addr = core_if->pcgcctl; ++ DWC_PRINTF("PCGCCTL @0x%08lX : 0x%08X\n", (unsigned long)addr, ++ DWC_READ_REG32(addr)); ++} ++ ++/** ++ * Flush a Tx FIFO. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param num Tx FIFO to flush. ++ */ ++void dwc_otg_flush_tx_fifo(dwc_otg_core_if_t * core_if, const int num) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ volatile grstctl_t greset = {.d32 = 0 }; ++ int count = 0; ++ ++ DWC_DEBUGPL((DBG_CIL | DBG_PCDV), "Flush Tx FIFO %d\n", num); ++ ++ greset.b.txfflsh = 1; ++ greset.b.txfnum = num; ++ DWC_WRITE_REG32(&global_regs->grstctl, greset.d32); ++ ++ do { ++ greset.d32 = DWC_READ_REG32(&global_regs->grstctl); ++ if (++count > 10000) { ++ DWC_WARN("%s() HANG! GRSTCTL=%0x GNPTXSTS=0x%08x\n", ++ __func__, greset.d32, ++ DWC_READ_REG32(&global_regs->gnptxsts)); ++ break; ++ } ++ dwc_udelay(1); ++ } while (greset.b.txfflsh == 1); ++ ++ /* Wait for 3 PHY Clocks */ ++ dwc_udelay(1); ++} ++ ++/** ++ * Flush Rx FIFO. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++void dwc_otg_flush_rx_fifo(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ volatile grstctl_t greset = {.d32 = 0 }; ++ int count = 0; ++ ++ DWC_DEBUGPL((DBG_CIL | DBG_PCDV), "%s\n", __func__); ++ /* ++ * ++ */ ++ greset.b.rxfflsh = 1; ++ DWC_WRITE_REG32(&global_regs->grstctl, greset.d32); ++ ++ do { ++ greset.d32 = DWC_READ_REG32(&global_regs->grstctl); ++ if (++count > 10000) { ++ DWC_WARN("%s() HANG! GRSTCTL=%0x\n", __func__, ++ greset.d32); ++ break; ++ } ++ dwc_udelay(1); ++ } while (greset.b.rxfflsh == 1); ++ ++ /* Wait for 3 PHY Clocks */ ++ dwc_udelay(1); ++} ++ ++/** ++ * Do core a soft reset of the core. Be careful with this because it ++ * resets all the internal state machines of the core. ++ */ ++void dwc_otg_core_reset(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ volatile grstctl_t greset = {.d32 = 0 }; ++ int count = 0; ++ ++ DWC_DEBUGPL(DBG_CILV, "%s\n", __func__); ++ /* Wait for AHB master IDLE state. */ ++ do { ++ dwc_udelay(10); ++ greset.d32 = DWC_READ_REG32(&global_regs->grstctl); ++ if (++count > 100000) { ++ DWC_WARN("%s() HANG! AHB Idle GRSTCTL=%0x\n", __func__, ++ greset.d32); ++ return; ++ } ++ } ++ while (greset.b.ahbidle == 0); ++ ++ /* Core Soft Reset */ ++ count = 0; ++ greset.b.csftrst = 1; ++ DWC_WRITE_REG32(&global_regs->grstctl, greset.d32); ++ do { ++ greset.d32 = DWC_READ_REG32(&global_regs->grstctl); ++ if (++count > 10000) { ++ DWC_WARN("%s() HANG! Soft Reset GRSTCTL=%0x\n", ++ __func__, greset.d32); ++ break; ++ } ++ dwc_udelay(1); ++ } ++ while (greset.b.csftrst == 1); ++ ++ /* Wait for 3 PHY Clocks */ ++ dwc_mdelay(100); ++} ++ ++uint8_t dwc_otg_is_device_mode(dwc_otg_core_if_t * _core_if) ++{ ++ return (dwc_otg_mode(_core_if) != DWC_HOST_MODE); ++} ++ ++uint8_t dwc_otg_is_host_mode(dwc_otg_core_if_t * _core_if) ++{ ++ return (dwc_otg_mode(_core_if) == DWC_HOST_MODE); ++} ++ ++/** ++ * Register HCD callbacks. The callbacks are used to start and stop ++ * the HCD for interrupt processing. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param cb the HCD callback structure. ++ * @param p pointer to be passed to callback function (usb_hcd*). ++ */ ++void dwc_otg_cil_register_hcd_callbacks(dwc_otg_core_if_t * core_if, ++ dwc_otg_cil_callbacks_t * cb, void *p) ++{ ++ core_if->hcd_cb = cb; ++ cb->p = p; ++} ++ ++/** ++ * Register PCD callbacks. The callbacks are used to start and stop ++ * the PCD for interrupt processing. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param cb the PCD callback structure. ++ * @param p pointer to be passed to callback function (pcd*). ++ */ ++void dwc_otg_cil_register_pcd_callbacks(dwc_otg_core_if_t * core_if, ++ dwc_otg_cil_callbacks_t * cb, void *p) ++{ ++ core_if->pcd_cb = cb; ++ cb->p = p; ++} ++ ++#ifdef DWC_EN_ISOC ++ ++/** ++ * This function writes isoc data per 1 (micro)frame into tx fifo ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++void write_isoc_frame_data(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ dwc_otg_dev_in_ep_regs_t *ep_regs; ++ dtxfsts_data_t txstatus = {.d32 = 0 }; ++ uint32_t len = 0; ++ uint32_t dwords; ++ ++ ep->xfer_len = ep->data_per_frame; ++ ep->xfer_count = 0; ++ ++ ep_regs = core_if->dev_if->in_ep_regs[ep->num]; ++ ++ len = ep->xfer_len - ep->xfer_count; ++ ++ if (len > ep->maxpacket) { ++ len = ep->maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ ++ /* While there is space in the queue and space in the FIFO and ++ * More data to tranfer, Write packets to the Tx FIFO */ ++ txstatus.d32 = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[ep->num]->dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", ep->num, txstatus.d32); ++ ++ while (txstatus.b.txfspcavail > dwords && ++ ep->xfer_count < ep->xfer_len && ep->xfer_len != 0) { ++ /* Write the FIFO */ ++ dwc_otg_ep_write_packet(core_if, ep, 0); ++ ++ len = ep->xfer_len - ep->xfer_count; ++ if (len > ep->maxpacket) { ++ len = ep->maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ txstatus.d32 = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "dtxfsts[%d]=0x%08x\n", ep->num, ++ txstatus.d32); ++ } ++} ++ ++/** ++ * This function initializes a descriptor chain for Isochronous transfer ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++void dwc_otg_iso_ep_start_frm_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep) ++{ ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dsts_data_t dsts = {.d32 = 0 }; ++ volatile uint32_t *addr; ++ ++ if (ep->is_in) { ++ addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl; ++ } else { ++ addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl; ++ } ++ ++ ep->xfer_len = ep->data_per_frame; ++ ep->xfer_count = 0; ++ ep->xfer_buff = ep->cur_pkt_addr; ++ ep->dma_addr = ep->cur_pkt_dma_addr; ++ ++ if (ep->is_in) { ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ deptsiz.b.xfersize = ep->xfer_len; ++ deptsiz.b.pktcnt = ++ (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket; ++ deptsiz.b.mc = deptsiz.b.pktcnt; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]->dieptsiz, ++ deptsiz.d32); ++ ++ /* Write the DMA register */ ++ if (core_if->dma_enable) { ++ DWC_WRITE_REG32(& ++ (core_if->dev_if->in_ep_regs[ep->num]-> ++ diepdma), (uint32_t) ep->dma_addr); ++ } ++ } else { ++ deptsiz.b.pktcnt = ++ (ep->xfer_len + (ep->maxpacket - 1)) / ep->maxpacket; ++ deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket; ++ ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->num]->doeptsiz, deptsiz.d32); ++ ++ if (core_if->dma_enable) { ++ DWC_WRITE_REG32(& ++ (core_if->dev_if-> ++ out_ep_regs[ep->num]->doepdma), ++ (uint32_t) ep->dma_addr); ++ } ++ } ++ ++ /** Enable endpoint, clear nak */ ++ ++ depctl.d32 = 0; ++ if (ep->bInterval == 1) { ++ dsts.d32 = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ep->next_frame = dsts.b.soffn + ep->bInterval; ++ ++ if (ep->next_frame & 0x1) { ++ depctl.b.setd1pid = 1; ++ } else { ++ depctl.b.setd0pid = 1; ++ } ++ } else { ++ ep->next_frame += ep->bInterval; ++ ++ if (ep->next_frame & 0x1) { ++ depctl.b.setd1pid = 1; ++ } else { ++ depctl.b.setd0pid = 1; ++ } ++ } ++ depctl.b.epena = 1; ++ depctl.b.cnak = 1; ++ ++ DWC_MODIFY_REG32(addr, 0, depctl.d32); ++ depctl.d32 = DWC_READ_REG32(addr); ++ ++ if (ep->is_in && core_if->dma_enable == 0) { ++ write_isoc_frame_data(core_if, ep); ++ } ++ ++} ++#endif /* DWC_EN_ISOC */ ++ ++static void dwc_otg_set_uninitialized(int32_t * p, int size) ++{ ++ int i; ++ for (i = 0; i < size; i++) { ++ p[i] = -1; ++ } ++} ++ ++static int dwc_otg_param_initialized(int32_t val) ++{ ++ return val != -1; ++} ++ ++static int dwc_otg_setup_params(dwc_otg_core_if_t * core_if) ++{ ++ int i; ++ core_if->core_params = DWC_ALLOC(sizeof(*core_if->core_params)); ++ if (!core_if->core_params) { ++ return -DWC_E_NO_MEMORY; ++ } ++ dwc_otg_set_uninitialized((int32_t *) core_if->core_params, ++ sizeof(*core_if->core_params) / ++ sizeof(int32_t)); ++ DWC_PRINTF("Setting default values for core params\n"); ++ dwc_otg_set_param_otg_cap(core_if, dwc_param_otg_cap_default); ++ dwc_otg_set_param_dma_enable(core_if, dwc_param_dma_enable_default); ++ dwc_otg_set_param_dma_desc_enable(core_if, ++ dwc_param_dma_desc_enable_default); ++ dwc_otg_set_param_opt(core_if, dwc_param_opt_default); ++ dwc_otg_set_param_dma_burst_size(core_if, ++ dwc_param_dma_burst_size_default); ++ dwc_otg_set_param_host_support_fs_ls_low_power(core_if, ++ dwc_param_host_support_fs_ls_low_power_default); ++ dwc_otg_set_param_enable_dynamic_fifo(core_if, ++ dwc_param_enable_dynamic_fifo_default); ++ dwc_otg_set_param_data_fifo_size(core_if, ++ dwc_param_data_fifo_size_default); ++ dwc_otg_set_param_dev_rx_fifo_size(core_if, ++ dwc_param_dev_rx_fifo_size_default); ++ dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if, ++ dwc_param_dev_nperio_tx_fifo_size_default); ++ dwc_otg_set_param_host_rx_fifo_size(core_if, ++ dwc_param_host_rx_fifo_size_default); ++ dwc_otg_set_param_host_nperio_tx_fifo_size(core_if, ++ dwc_param_host_nperio_tx_fifo_size_default); ++ dwc_otg_set_param_host_perio_tx_fifo_size(core_if, ++ dwc_param_host_perio_tx_fifo_size_default); ++ dwc_otg_set_param_max_transfer_size(core_if, ++ dwc_param_max_transfer_size_default); ++ dwc_otg_set_param_max_packet_count(core_if, ++ dwc_param_max_packet_count_default); ++ dwc_otg_set_param_host_channels(core_if, ++ dwc_param_host_channels_default); ++ dwc_otg_set_param_dev_endpoints(core_if, ++ dwc_param_dev_endpoints_default); ++ dwc_otg_set_param_phy_type(core_if, dwc_param_phy_type_default); ++ dwc_otg_set_param_speed(core_if, dwc_param_speed_default); ++ dwc_otg_set_param_host_ls_low_power_phy_clk(core_if, ++ dwc_param_host_ls_low_power_phy_clk_default); ++ dwc_otg_set_param_phy_ulpi_ddr(core_if, dwc_param_phy_ulpi_ddr_default); ++ dwc_otg_set_param_phy_ulpi_ext_vbus(core_if, ++ dwc_param_phy_ulpi_ext_vbus_default); ++ dwc_otg_set_param_phy_utmi_width(core_if, ++ dwc_param_phy_utmi_width_default); ++ dwc_otg_set_param_ts_dline(core_if, dwc_param_ts_dline_default); ++ dwc_otg_set_param_i2c_enable(core_if, dwc_param_i2c_enable_default); ++ dwc_otg_set_param_ulpi_fs_ls(core_if, dwc_param_ulpi_fs_ls_default); ++ dwc_otg_set_param_en_multiple_tx_fifo(core_if, ++ dwc_param_en_multiple_tx_fifo_default); ++ for (i = 0; i < 15; i++) { ++ dwc_otg_set_param_dev_perio_tx_fifo_size(core_if, ++ dwc_param_dev_perio_tx_fifo_size_default, ++ i); ++ } ++ ++ for (i = 0; i < 15; i++) { ++ dwc_otg_set_param_dev_tx_fifo_size(core_if, ++ dwc_param_dev_tx_fifo_size_default, ++ i); ++ } ++ dwc_otg_set_param_thr_ctl(core_if, dwc_param_thr_ctl_default); ++ dwc_otg_set_param_mpi_enable(core_if, dwc_param_mpi_enable_default); ++ dwc_otg_set_param_pti_enable(core_if, dwc_param_pti_enable_default); ++ dwc_otg_set_param_lpm_enable(core_if, dwc_param_lpm_enable_default); ++ dwc_otg_set_param_ic_usb_cap(core_if, dwc_param_ic_usb_cap_default); ++ dwc_otg_set_param_tx_thr_length(core_if, ++ dwc_param_tx_thr_length_default); ++ dwc_otg_set_param_rx_thr_length(core_if, ++ dwc_param_rx_thr_length_default); ++ dwc_otg_set_param_ahb_thr_ratio(core_if, ++ dwc_param_ahb_thr_ratio_default); ++ dwc_otg_set_param_power_down(core_if, dwc_param_power_down_default); ++ dwc_otg_set_param_reload_ctl(core_if, dwc_param_reload_ctl_default); ++ dwc_otg_set_param_dev_out_nak(core_if, dwc_param_dev_out_nak_default); ++ dwc_otg_set_param_cont_on_bna(core_if, dwc_param_cont_on_bna_default); ++ dwc_otg_set_param_ahb_single(core_if, dwc_param_ahb_single_default); ++ dwc_otg_set_param_otg_ver(core_if, dwc_param_otg_ver_default); ++ dwc_otg_set_param_adp_enable(core_if, dwc_param_adp_enable_default); ++ DWC_PRINTF("Finished setting default values for core params\n"); ++ ++ return 0; ++} ++ ++uint8_t dwc_otg_is_dma_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->dma_enable; ++} ++ ++/* Checks if the parameter is outside of its valid range of values */ ++#define DWC_OTG_PARAM_TEST(_param_, _low_, _high_) \ ++ (((_param_) < (_low_)) || \ ++ ((_param_) > (_high_))) ++ ++/* Parameter access functions */ ++int dwc_otg_set_param_otg_cap(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int valid; ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 2)) { ++ DWC_WARN("Wrong value for otg_cap parameter\n"); ++ DWC_WARN("otg_cap parameter must be 0,1 or 2\n"); ++ retval = -DWC_E_INVALID; ++ goto out; ++ } ++ ++ valid = 1; ++ switch (val) { ++ case DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE: ++ if (core_if->hwcfg2.b.op_mode != ++ DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) ++ valid = 0; ++ break; ++ case DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE: ++ if ((core_if->hwcfg2.b.op_mode != ++ DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) ++ && (core_if->hwcfg2.b.op_mode != ++ DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG) ++ && (core_if->hwcfg2.b.op_mode != ++ DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ++ && (core_if->hwcfg2.b.op_mode != ++ DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) { ++ valid = 0; ++ } ++ break; ++ case DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE: ++ /* always valid */ ++ break; ++ } ++ if (!valid) { ++ if (dwc_otg_param_initialized(core_if->core_params->otg_cap)) { ++ DWC_ERROR ++ ("%d invalid for otg_cap paremter. Check HW configuration.\n", ++ val); ++ } ++ val = ++ (((core_if->hwcfg2.b.op_mode == ++ DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG) ++ || (core_if->hwcfg2.b.op_mode == ++ DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG) ++ || (core_if->hwcfg2.b.op_mode == ++ DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE) ++ || (core_if->hwcfg2.b.op_mode == ++ DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST)) ? ++ DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE : ++ DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->otg_cap = val; ++out: ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_otg_cap(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->otg_cap; ++} ++ ++int dwc_otg_set_param_opt(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for opt parameter\n"); ++ return -DWC_E_INVALID; ++ } ++ core_if->core_params->opt = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_opt(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->opt; ++} ++ ++int dwc_otg_set_param_dma_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for dma enable\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && (core_if->hwcfg2.b.architecture == 0)) { ++ if (dwc_otg_param_initialized(core_if->core_params->dma_enable)) { ++ DWC_ERROR ++ ("%d invalid for dma_enable paremter. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dma_enable = val; ++ if (val == 0) { ++ dwc_otg_set_param_dma_desc_enable(core_if, 0); ++ } ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dma_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dma_enable; ++} ++ ++int dwc_otg_set_param_dma_desc_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for dma_enable\n"); ++ DWC_WARN("dma_desc_enable must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) ++ && ((dwc_otg_get_param_dma_enable(core_if) == 0) ++ || (core_if->hwcfg4.b.desc_dma == 0))) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->dma_desc_enable)) { ++ DWC_ERROR ++ ("%d invalid for dma_desc_enable paremter. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ core_if->core_params->dma_desc_enable = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dma_desc_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dma_desc_enable; ++} ++ ++int dwc_otg_set_param_host_support_fs_ls_low_power(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for host_support_fs_low_power\n"); ++ DWC_WARN("host_support_fs_low_power must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ core_if->core_params->host_support_fs_ls_low_power = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_host_support_fs_ls_low_power(dwc_otg_core_if_t * ++ core_if) ++{ ++ return core_if->core_params->host_support_fs_ls_low_power; ++} ++ ++int dwc_otg_set_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for enable_dynamic_fifo\n"); ++ DWC_WARN("enable_dynamic_fifo must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && (core_if->hwcfg2.b.dynamic_fifo == 0)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->enable_dynamic_fifo)) { ++ DWC_ERROR ++ ("%d invalid for enable_dynamic_fifo paremter. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ core_if->core_params->enable_dynamic_fifo = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->enable_dynamic_fifo; ++} ++ ++int dwc_otg_set_param_data_fifo_size(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 32, 32768)) { ++ DWC_WARN("Wrong value for data_fifo_size\n"); ++ DWC_WARN("data_fifo_size must be 32-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > core_if->hwcfg3.b.dfifo_depth) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->data_fifo_size)) { ++ DWC_ERROR ++ ("%d invalid for data_fifo_size parameter. Check HW configuration.\n", ++ val); ++ } ++ val = core_if->hwcfg3.b.dfifo_depth; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->data_fifo_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_data_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->data_fifo_size; ++} ++ ++int dwc_otg_set_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 16, 32768)) { ++ DWC_WARN("Wrong value for dev_rx_fifo_size\n"); ++ DWC_WARN("dev_rx_fifo_size must be 16-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > DWC_READ_REG32(&core_if->core_global_regs->grxfsiz)) { ++ if (dwc_otg_param_initialized(core_if->core_params->dev_rx_fifo_size)) { ++ DWC_WARN("%d invalid for dev_rx_fifo_size parameter\n", val); ++ } ++ val = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dev_rx_fifo_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dev_rx_fifo_size; ++} ++ ++int dwc_otg_set_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 16, 32768)) { ++ DWC_WARN("Wrong value for dev_nperio_tx_fifo\n"); ++ DWC_WARN("dev_nperio_tx_fifo must be 16-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> 16)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->dev_nperio_tx_fifo_size)) { ++ DWC_ERROR ++ ("%d invalid for dev_nperio_tx_fifo_size. Check HW configuration.\n", ++ val); ++ } ++ val = ++ (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> ++ 16); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dev_nperio_tx_fifo_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dev_nperio_tx_fifo_size; ++} ++ ++int dwc_otg_set_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 16, 32768)) { ++ DWC_WARN("Wrong value for host_rx_fifo_size\n"); ++ DWC_WARN("host_rx_fifo_size must be 16-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > DWC_READ_REG32(&core_if->core_global_regs->grxfsiz)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->host_rx_fifo_size)) { ++ DWC_ERROR ++ ("%d invalid for host_rx_fifo_size. Check HW configuration.\n", ++ val); ++ } ++ val = DWC_READ_REG32(&core_if->core_global_regs->grxfsiz); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->host_rx_fifo_size = val; ++ return retval; ++ ++} ++ ++int32_t dwc_otg_get_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->host_rx_fifo_size; ++} ++ ++int dwc_otg_set_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 16, 32768)) { ++ DWC_WARN("Wrong value for host_nperio_tx_fifo_size\n"); ++ DWC_WARN("host_nperio_tx_fifo_size must be 16-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> 16)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->host_nperio_tx_fifo_size)) { ++ DWC_ERROR ++ ("%d invalid for host_nperio_tx_fifo_size. Check HW configuration.\n", ++ val); ++ } ++ val = ++ (DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz) >> ++ 16); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->host_nperio_tx_fifo_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->host_nperio_tx_fifo_size; ++} ++ ++int dwc_otg_set_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 16, 32768)) { ++ DWC_WARN("Wrong value for host_perio_tx_fifo_size\n"); ++ DWC_WARN("host_perio_tx_fifo_size must be 16-32768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > ((core_if->hptxfsiz.d32) >> 16)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->host_perio_tx_fifo_size)) { ++ DWC_ERROR ++ ("%d invalid for host_perio_tx_fifo_size. Check HW configuration.\n", ++ val); ++ } ++ val = (core_if->hptxfsiz.d32) >> 16; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->host_perio_tx_fifo_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->host_perio_tx_fifo_size; ++} ++ ++int dwc_otg_set_param_max_transfer_size(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 2047, 524288)) { ++ DWC_WARN("Wrong value for max_transfer_size\n"); ++ DWC_WARN("max_transfer_size must be 2047-524288\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val >= (1 << (core_if->hwcfg3.b.xfer_size_cntr_width + 11))) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->max_transfer_size)) { ++ DWC_ERROR ++ ("%d invalid for max_transfer_size. Check HW configuration.\n", ++ val); ++ } ++ val = ++ ((1 << (core_if->hwcfg3.b.packet_size_cntr_width + 11)) - ++ 1); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->max_transfer_size = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_max_transfer_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->max_transfer_size; ++} ++ ++int dwc_otg_set_param_max_packet_count(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 15, 511)) { ++ DWC_WARN("Wrong value for max_packet_count\n"); ++ DWC_WARN("max_packet_count must be 15-511\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > (1 << (core_if->hwcfg3.b.packet_size_cntr_width + 4))) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->max_packet_count)) { ++ DWC_ERROR ++ ("%d invalid for max_packet_count. Check HW configuration.\n", ++ val); ++ } ++ val = ++ ((1 << (core_if->hwcfg3.b.packet_size_cntr_width + 4)) - 1); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->max_packet_count = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_max_packet_count(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->max_packet_count; ++} ++ ++int dwc_otg_set_param_host_channels(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 1, 16)) { ++ DWC_WARN("Wrong value for host_channels\n"); ++ DWC_WARN("host_channels must be 1-16\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > (core_if->hwcfg2.b.num_host_chan + 1)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->host_channels)) { ++ DWC_ERROR ++ ("%d invalid for host_channels. Check HW configurations.\n", ++ val); ++ } ++ val = (core_if->hwcfg2.b.num_host_chan + 1); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->host_channels = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_host_channels(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->host_channels; ++} ++ ++int dwc_otg_set_param_dev_endpoints(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 1, 15)) { ++ DWC_WARN("Wrong value for dev_endpoints\n"); ++ DWC_WARN("dev_endpoints must be 1-15\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > (core_if->hwcfg2.b.num_dev_ep)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->dev_endpoints)) { ++ DWC_ERROR ++ ("%d invalid for dev_endpoints. Check HW configurations.\n", ++ val); ++ } ++ val = core_if->hwcfg2.b.num_dev_ep; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dev_endpoints = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_endpoints(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dev_endpoints; ++} ++ ++int dwc_otg_set_param_phy_type(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 2)) { ++ DWC_WARN("Wrong value for phy_type\n"); ++ DWC_WARN("phy_type must be 0,1 or 2\n"); ++ return -DWC_E_INVALID; ++ } ++#ifndef NO_FS_PHY_HW_CHECKS ++ if ((val == DWC_PHY_TYPE_PARAM_UTMI) && ++ ((core_if->hwcfg2.b.hs_phy_type == 1) || ++ (core_if->hwcfg2.b.hs_phy_type == 3))) { ++ valid = 1; ++ } else if ((val == DWC_PHY_TYPE_PARAM_ULPI) && ++ ((core_if->hwcfg2.b.hs_phy_type == 2) || ++ (core_if->hwcfg2.b.hs_phy_type == 3))) { ++ valid = 1; ++ } else if ((val == DWC_PHY_TYPE_PARAM_FS) && ++ (core_if->hwcfg2.b.fs_phy_type == 1)) { ++ valid = 1; ++ } ++ if (!valid) { ++ if (dwc_otg_param_initialized(core_if->core_params->phy_type)) { ++ DWC_ERROR ++ ("%d invalid for phy_type. Check HW configurations.\n", ++ val); ++ } ++ if (core_if->hwcfg2.b.hs_phy_type) { ++ if ((core_if->hwcfg2.b.hs_phy_type == 3) || ++ (core_if->hwcfg2.b.hs_phy_type == 1)) { ++ val = DWC_PHY_TYPE_PARAM_UTMI; ++ } else { ++ val = DWC_PHY_TYPE_PARAM_ULPI; ++ } ++ } ++ retval = -DWC_E_INVALID; ++ } ++#endif ++ core_if->core_params->phy_type = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_phy_type(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->phy_type; ++} ++ ++int dwc_otg_set_param_speed(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for speed parameter\n"); ++ DWC_WARN("max_speed parameter must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ if ((val == 0) ++ && dwc_otg_get_param_phy_type(core_if) == DWC_PHY_TYPE_PARAM_FS) { ++ if (dwc_otg_param_initialized(core_if->core_params->speed)) { ++ DWC_ERROR ++ ("%d invalid for speed paremter. Check HW configuration.\n", ++ val); ++ } ++ val = ++ (dwc_otg_get_param_phy_type(core_if) == ++ DWC_PHY_TYPE_PARAM_FS ? 1 : 0); ++ retval = -DWC_E_INVALID; ++ } ++ core_if->core_params->speed = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_speed(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->speed; ++} ++ ++int dwc_otg_set_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN ++ ("Wrong value for host_ls_low_power_phy_clk parameter\n"); ++ DWC_WARN("host_ls_low_power_phy_clk must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ) ++ && (dwc_otg_get_param_phy_type(core_if) == DWC_PHY_TYPE_PARAM_FS)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->host_ls_low_power_phy_clk)) { ++ DWC_ERROR ++ ("%d invalid for host_ls_low_power_phy_clk. Check HW configuration.\n", ++ val); ++ } ++ val = ++ (dwc_otg_get_param_phy_type(core_if) == ++ DWC_PHY_TYPE_PARAM_FS) ? ++ DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ : ++ DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->host_ls_low_power_phy_clk = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->host_ls_low_power_phy_clk; ++} ++ ++int dwc_otg_set_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for phy_ulpi_ddr\n"); ++ DWC_WARN("phy_upli_ddr must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->phy_ulpi_ddr = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->phy_ulpi_ddr; ++} ++ ++int dwc_otg_set_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong valaue for phy_ulpi_ext_vbus\n"); ++ DWC_WARN("phy_ulpi_ext_vbus must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->phy_ulpi_ext_vbus = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->phy_ulpi_ext_vbus; ++} ++ ++int dwc_otg_set_param_phy_utmi_width(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 8, 8) && DWC_OTG_PARAM_TEST(val, 16, 16)) { ++ DWC_WARN("Wrong valaue for phy_utmi_width\n"); ++ DWC_WARN("phy_utmi_width must be 8 or 16\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->phy_utmi_width = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_phy_utmi_width(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->phy_utmi_width; ++} ++ ++int dwc_otg_set_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong valaue for ulpi_fs_ls\n"); ++ DWC_WARN("ulpi_fs_ls must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->ulpi_fs_ls = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->ulpi_fs_ls; ++} ++ ++int dwc_otg_set_param_ts_dline(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong valaue for ts_dline\n"); ++ DWC_WARN("ts_dline must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->ts_dline = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_ts_dline(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->ts_dline; ++} ++ ++int dwc_otg_set_param_i2c_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong valaue for i2c_enable\n"); ++ DWC_WARN("i2c_enable must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++#ifndef NO_FS_PHY_HW_CHECK ++ if (val == 1 && core_if->hwcfg3.b.i2c == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->i2c_enable)) { ++ DWC_ERROR ++ ("%d invalid for i2c_enable. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++#endif ++ ++ core_if->core_params->i2c_enable = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_i2c_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->i2c_enable; ++} ++ ++int dwc_otg_set_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val, int fifo_num) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 4, 768)) { ++ DWC_WARN("Wrong value for dev_perio_tx_fifo_size\n"); ++ DWC_WARN("dev_perio_tx_fifo_size must be 4-768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > ++ (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]))) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->dev_perio_tx_fifo_size[fifo_num])) { ++ DWC_ERROR ++ ("`%d' invalid for parameter `dev_perio_fifo_size_%d'. Check HW configuration.\n", ++ val, fifo_num); ++ } ++ val = (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num])); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dev_perio_tx_fifo_size[fifo_num] = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int fifo_num) ++{ ++ return core_if->core_params->dev_perio_tx_fifo_size[fifo_num]; ++} ++ ++int dwc_otg_set_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if, ++ int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong valaue for en_multiple_tx_fifo,\n"); ++ DWC_WARN("en_multiple_tx_fifo must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val == 1 && core_if->hwcfg4.b.ded_fifo_en == 0) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->en_multiple_tx_fifo)) { ++ DWC_ERROR ++ ("%d invalid for parameter en_multiple_tx_fifo. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->en_multiple_tx_fifo = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->en_multiple_tx_fifo; ++} ++ ++int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, int32_t val, ++ int fifo_num) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 4, 768)) { ++ DWC_WARN("Wrong value for dev_tx_fifo_size\n"); ++ DWC_WARN("dev_tx_fifo_size must be 4-768\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val > ++ (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num]))) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->dev_tx_fifo_size[fifo_num])) { ++ DWC_ERROR ++ ("`%d' invalid for parameter `dev_tx_fifo_size_%d'. Check HW configuration.\n", ++ val, fifo_num); ++ } ++ val = (DWC_READ_REG32(&core_if->core_global_regs->dtxfsiz[fifo_num])); ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->dev_tx_fifo_size[fifo_num] = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int fifo_num) ++{ ++ return core_if->core_params->dev_tx_fifo_size[fifo_num]; ++} ++ ++int dwc_otg_set_param_thr_ctl(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 7)) { ++ DWC_WARN("Wrong value for thr_ctl\n"); ++ DWC_WARN("thr_ctl must be 0-7\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val != 0) && ++ (!dwc_otg_get_param_dma_enable(core_if) || ++ !core_if->hwcfg4.b.ded_fifo_en)) { ++ if (dwc_otg_param_initialized(core_if->core_params->thr_ctl)) { ++ DWC_ERROR ++ ("%d invalid for parameter thr_ctl. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->thr_ctl = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_thr_ctl(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->thr_ctl; ++} ++ ++int dwc_otg_set_param_lpm_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("Wrong value for lpm_enable\n"); ++ DWC_WARN("lpm_enable must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val && !core_if->hwcfg3.b.otg_lpm_en) { ++ if (dwc_otg_param_initialized(core_if->core_params->lpm_enable)) { ++ DWC_ERROR ++ ("%d invalid for parameter lpm_enable. Check HW configuration.\n", ++ val); ++ } ++ val = 0; ++ retval = -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->lpm_enable = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_lpm_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->lpm_enable; ++} ++ ++int dwc_otg_set_param_tx_thr_length(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 8, 128)) { ++ DWC_WARN("Wrong valaue for tx_thr_length\n"); ++ DWC_WARN("tx_thr_length must be 8 - 128\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->tx_thr_length = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_tx_thr_length(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->tx_thr_length; ++} ++ ++int dwc_otg_set_param_rx_thr_length(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 8, 128)) { ++ DWC_WARN("Wrong valaue for rx_thr_length\n"); ++ DWC_WARN("rx_thr_length must be 8 - 128\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->rx_thr_length = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_rx_thr_length(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->rx_thr_length; ++} ++ ++int dwc_otg_set_param_dma_burst_size(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ if (DWC_OTG_PARAM_TEST(val, 1, 1) && ++ DWC_OTG_PARAM_TEST(val, 4, 4) && ++ DWC_OTG_PARAM_TEST(val, 8, 8) && ++ DWC_OTG_PARAM_TEST(val, 16, 16) && ++ DWC_OTG_PARAM_TEST(val, 32, 32) && ++ DWC_OTG_PARAM_TEST(val, 64, 64) && ++ DWC_OTG_PARAM_TEST(val, 128, 128) && ++ DWC_OTG_PARAM_TEST(val, 256, 256)) { ++ DWC_WARN("`%d' invalid for parameter `dma_burst_size'\n", val); ++ return -DWC_E_INVALID; ++ } ++ core_if->core_params->dma_burst_size = val; ++ return 0; ++} ++ ++int32_t dwc_otg_get_param_dma_burst_size(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dma_burst_size; ++} ++ ++int dwc_otg_set_param_pti_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `pti_enable'\n", val); ++ return -DWC_E_INVALID; ++ } ++ if (val && (core_if->snpsid < OTG_CORE_REV_2_72a)) { ++ if (dwc_otg_param_initialized(core_if->core_params->pti_enable)) { ++ DWC_ERROR ++ ("%d invalid for parameter pti_enable. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->pti_enable = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_pti_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->pti_enable; ++} ++ ++int dwc_otg_set_param_mpi_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `mpi_enable'\n", val); ++ return -DWC_E_INVALID; ++ } ++ if (val && (core_if->hwcfg2.b.multi_proc_int == 0)) { ++ if (dwc_otg_param_initialized(core_if->core_params->mpi_enable)) { ++ DWC_ERROR ++ ("%d invalid for parameter mpi_enable. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->mpi_enable = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_mpi_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->mpi_enable; ++} ++ ++int dwc_otg_set_param_adp_enable(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `adp_enable'\n", val); ++ return -DWC_E_INVALID; ++ } ++ if (val && (core_if->hwcfg3.b.adp_supp == 0)) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->adp_supp_enable)) { ++ DWC_ERROR ++ ("%d invalid for parameter adp_enable. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->adp_supp_enable = val; ++ /*Set OTG version 2.0 in case of enabling ADP*/ ++ if (val) ++ dwc_otg_set_param_otg_ver(core_if, 1); ++ ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_adp_enable(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->adp_supp_enable; ++} ++ ++int dwc_otg_set_param_ic_usb_cap(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `ic_usb_cap'\n", val); ++ DWC_WARN("ic_usb_cap must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val && (core_if->hwcfg2.b.otg_enable_ic_usb == 0)) { ++ if (dwc_otg_param_initialized(core_if->core_params->ic_usb_cap)) { ++ DWC_ERROR ++ ("%d invalid for parameter ic_usb_cap. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->ic_usb_cap = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_ic_usb_cap(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->ic_usb_cap; ++} ++ ++int dwc_otg_set_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 3)) { ++ DWC_WARN("`%d' invalid for parameter `ahb_thr_ratio'\n", val); ++ DWC_WARN("ahb_thr_ratio must be 0 - 3\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (val ++ && (core_if->snpsid < OTG_CORE_REV_2_81a ++ || !dwc_otg_get_param_thr_ctl(core_if))) { ++ valid = 0; ++ } else if (val ++ && ((dwc_otg_get_param_tx_thr_length(core_if) / (1 << val)) < ++ 4)) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized ++ (core_if->core_params->ahb_thr_ratio)) { ++ DWC_ERROR ++ ("%d invalid for parameter ahb_thr_ratio. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ ++ core_if->core_params->ahb_thr_ratio = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->ahb_thr_ratio; ++} ++ ++int dwc_otg_set_param_power_down(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ hwcfg4_data_t hwcfg4 = {.d32 = 0 }; ++ hwcfg4.d32 = DWC_READ_REG32(&core_if->core_global_regs->ghwcfg4); ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 3)) { ++ DWC_WARN("`%d' invalid for parameter `power_down'\n", val); ++ DWC_WARN("power_down must be 0 - 2\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 2) && (core_if->snpsid < OTG_CORE_REV_2_91a)) { ++ valid = 0; ++ } ++ if ((val == 3) ++ && ((core_if->snpsid < OTG_CORE_REV_3_00a) ++ || (hwcfg4.b.xhiber == 0))) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->power_down)) { ++ DWC_ERROR ++ ("%d invalid for parameter power_down. Check HW configuration.\n", ++ val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->power_down = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_power_down(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->power_down; ++} ++ ++int dwc_otg_set_param_reload_ctl(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `reload_ctl'\n", val); ++ DWC_WARN("reload_ctl must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && (core_if->snpsid < OTG_CORE_REV_2_92a)) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->reload_ctl)) { ++ DWC_ERROR("%d invalid for parameter reload_ctl." ++ "Check HW configuration.\n", val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->reload_ctl = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_reload_ctl(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->reload_ctl; ++} ++ ++int dwc_otg_set_param_dev_out_nak(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `dev_out_nak'\n", val); ++ DWC_WARN("dev_out_nak must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && ((core_if->snpsid < OTG_CORE_REV_2_93a) || ++ !(core_if->core_params->dma_desc_enable))) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->dev_out_nak)) { ++ DWC_ERROR("%d invalid for parameter dev_out_nak." ++ "Check HW configuration.\n", val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->dev_out_nak = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_dev_out_nak(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->dev_out_nak; ++} ++ ++int dwc_otg_set_param_cont_on_bna(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `cont_on_bna'\n", val); ++ DWC_WARN("cont_on_bna must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && ((core_if->snpsid < OTG_CORE_REV_2_94a) || ++ !(core_if->core_params->dma_desc_enable))) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->cont_on_bna)) { ++ DWC_ERROR("%d invalid for parameter cont_on_bna." ++ "Check HW configuration.\n", val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->cont_on_bna = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_cont_on_bna(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->cont_on_bna; ++} ++ ++int dwc_otg_set_param_ahb_single(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ int valid = 1; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `ahb_single'\n", val); ++ DWC_WARN("ahb_single must be 0 or 1\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if ((val == 1) && (core_if->snpsid < OTG_CORE_REV_2_94a)) { ++ valid = 0; ++ } ++ if (valid == 0) { ++ if (dwc_otg_param_initialized(core_if->core_params->ahb_single)) { ++ DWC_ERROR("%d invalid for parameter ahb_single." ++ "Check HW configuration.\n", val); ++ } ++ retval = -DWC_E_INVALID; ++ val = 0; ++ } ++ core_if->core_params->ahb_single = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_ahb_single(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->ahb_single; ++} ++ ++int dwc_otg_set_param_otg_ver(dwc_otg_core_if_t * core_if, int32_t val) ++{ ++ int retval = 0; ++ ++ if (DWC_OTG_PARAM_TEST(val, 0, 1)) { ++ DWC_WARN("`%d' invalid for parameter `otg_ver'\n", val); ++ DWC_WARN ++ ("otg_ver must be 0(for OTG 1.3 support) or 1(for OTG 2.0 support)\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ core_if->core_params->otg_ver = val; ++ return retval; ++} ++ ++int32_t dwc_otg_get_param_otg_ver(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->core_params->otg_ver; ++} ++ ++uint32_t dwc_otg_get_hnpstatus(dwc_otg_core_if_t * core_if) ++{ ++ gotgctl_data_t otgctl; ++ otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ return otgctl.b.hstnegscs; ++} ++ ++uint32_t dwc_otg_get_srpstatus(dwc_otg_core_if_t * core_if) ++{ ++ gotgctl_data_t otgctl; ++ otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ return otgctl.b.sesreqscs; ++} ++ ++void dwc_otg_set_hnpreq(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ if(core_if->otg_ver == 0) { ++ gotgctl_data_t otgctl; ++ otgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ otgctl.b.hnpreq = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, otgctl.d32); ++ } else { ++ core_if->otg_sts = val; ++ } ++} ++ ++uint32_t dwc_otg_get_gsnpsid(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->snpsid; ++} ++ ++uint32_t dwc_otg_get_mode(dwc_otg_core_if_t * core_if) ++{ ++ gintsts_data_t gintsts; ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ return gintsts.b.curmode; ++} ++ ++uint32_t dwc_otg_get_hnpcapable(dwc_otg_core_if_t * core_if) ++{ ++ gusbcfg_data_t usbcfg; ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ return usbcfg.b.hnpcap; ++} ++ ++void dwc_otg_set_hnpcapable(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ gusbcfg_data_t usbcfg; ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ usbcfg.b.hnpcap = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, usbcfg.d32); ++} ++ ++uint32_t dwc_otg_get_srpcapable(dwc_otg_core_if_t * core_if) ++{ ++ gusbcfg_data_t usbcfg; ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ return usbcfg.b.srpcap; ++} ++ ++void dwc_otg_set_srpcapable(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ gusbcfg_data_t usbcfg; ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ usbcfg.b.srpcap = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, usbcfg.d32); ++} ++ ++uint32_t dwc_otg_get_devspeed(dwc_otg_core_if_t * core_if) ++{ ++ dcfg_data_t dcfg; ++ /* originally: dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); */ ++ ++ dcfg.d32 = -1; //GRAYG ++ DWC_DEBUGPL(DBG_CILV, "%s - core_if(%p)\n", __func__, core_if); ++ if (NULL == core_if) ++ DWC_ERROR("reg request with NULL core_if\n"); ++ DWC_DEBUGPL(DBG_CILV, "%s - core_if(%p)->dev_if(%p)\n", __func__, ++ core_if, core_if->dev_if); ++ if (NULL == core_if->dev_if) ++ DWC_ERROR("reg request with NULL dev_if\n"); ++ DWC_DEBUGPL(DBG_CILV, "%s - core_if(%p)->dev_if(%p)->" ++ "dev_global_regs(%p)\n", __func__, ++ core_if, core_if->dev_if, ++ core_if->dev_if->dev_global_regs); ++ if (NULL == core_if->dev_if->dev_global_regs) ++ DWC_ERROR("reg request with NULL dev_global_regs\n"); ++ else { ++ DWC_DEBUGPL(DBG_CILV, "%s - &core_if(%p)->dev_if(%p)->" ++ "dev_global_regs(%p)->dcfg = %p\n", __func__, ++ core_if, core_if->dev_if, ++ core_if->dev_if->dev_global_regs, ++ &core_if->dev_if->dev_global_regs->dcfg); ++ dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ } ++ return dcfg.b.devspd; ++} ++ ++void dwc_otg_set_devspeed(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ dcfg_data_t dcfg; ++ dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ dcfg.b.devspd = val; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, dcfg.d32); ++} ++ ++uint32_t dwc_otg_get_busconnected(dwc_otg_core_if_t * core_if) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0); ++ return hprt0.b.prtconnsts; ++} ++ ++uint32_t dwc_otg_get_enumspeed(dwc_otg_core_if_t * core_if) ++{ ++ dsts_data_t dsts; ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ return dsts.b.enumspd; ++} ++ ++uint32_t dwc_otg_get_prtpower(dwc_otg_core_if_t * core_if) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0); ++ return hprt0.b.prtpwr; ++ ++} ++ ++uint32_t dwc_otg_get_core_state(dwc_otg_core_if_t * core_if) ++{ ++ return core_if->hibernation_suspend; ++} ++ ++void dwc_otg_set_prtpower(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = val; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++} ++ ++uint32_t dwc_otg_get_prtsuspend(dwc_otg_core_if_t * core_if) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0); ++ return hprt0.b.prtsusp; ++ ++} ++ ++void dwc_otg_set_prtsuspend(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtsusp = val; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++} ++ ++uint32_t dwc_otg_get_fr_interval(dwc_otg_core_if_t * core_if) ++{ ++ hfir_data_t hfir; ++ hfir.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir); ++ return hfir.b.frint; ++ ++} ++ ++void dwc_otg_set_fr_interval(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ hfir_data_t hfir; ++ uint32_t fram_int; ++ fram_int = calc_frame_interval(core_if); ++ hfir.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hfir); ++ if (!core_if->core_params->reload_ctl) { ++ DWC_WARN("\nCannot reload HFIR register.HFIR.HFIRRldCtrl bit is" ++ "not set to 1.\nShould load driver with reload_ctl=1" ++ " module parameter\n"); ++ return; ++ } ++ switch (fram_int) { ++ case 3750: ++ if ((val < 3350) || (val > 4150)) { ++ DWC_WARN("HFIR interval for HS core and 30 MHz" ++ "clock freq should be from 3350 to 4150\n"); ++ return; ++ } ++ break; ++ case 30000: ++ if ((val < 26820) || (val > 33180)) { ++ DWC_WARN("HFIR interval for FS/LS core and 30 MHz" ++ "clock freq should be from 26820 to 33180\n"); ++ return; ++ } ++ break; ++ case 6000: ++ if ((val < 5360) || (val > 6640)) { ++ DWC_WARN("HFIR interval for HS core and 48 MHz" ++ "clock freq should be from 5360 to 6640\n"); ++ return; ++ } ++ break; ++ case 48000: ++ if ((val < 42912) || (val > 53088)) { ++ DWC_WARN("HFIR interval for FS/LS core and 48 MHz" ++ "clock freq should be from 42912 to 53088\n"); ++ return; ++ } ++ break; ++ case 7500: ++ if ((val < 6700) || (val > 8300)) { ++ DWC_WARN("HFIR interval for HS core and 60 MHz" ++ "clock freq should be from 6700 to 8300\n"); ++ return; ++ } ++ break; ++ case 60000: ++ if ((val < 53640) || (val > 65536)) { ++ DWC_WARN("HFIR interval for FS/LS core and 60 MHz" ++ "clock freq should be from 53640 to 65536\n"); ++ return; ++ } ++ break; ++ default: ++ DWC_WARN("Unknown frame interval\n"); ++ return; ++ break; ++ ++ } ++ hfir.b.frint = val; ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hfir, hfir.d32); ++} ++ ++uint32_t dwc_otg_get_mode_ch_tim(dwc_otg_core_if_t * core_if) ++{ ++ hcfg_data_t hcfg; ++ hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg); ++ return hcfg.b.modechtimen; ++ ++} ++ ++void dwc_otg_set_mode_ch_tim(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ hcfg_data_t hcfg; ++ hcfg.d32 = DWC_READ_REG32(&core_if->host_if->host_global_regs->hcfg); ++ hcfg.b.modechtimen = val; ++ DWC_WRITE_REG32(&core_if->host_if->host_global_regs->hcfg, hcfg.d32); ++} ++ ++void dwc_otg_set_prtresume(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtres = val; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++} ++ ++uint32_t dwc_otg_get_remotewakesig(dwc_otg_core_if_t * core_if) ++{ ++ dctl_data_t dctl; ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl); ++ return dctl.b.rmtwkupsig; ++} ++ ++uint32_t dwc_otg_get_lpm_portsleepstatus(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ ++ DWC_ASSERT(! ++ ((core_if->lx_state == DWC_OTG_L1) ^ lpmcfg.b.prt_sleep_sts), ++ "lx_state = %d, lmpcfg.prt_sleep_sts = %d\n", ++ core_if->lx_state, lpmcfg.b.prt_sleep_sts); ++ ++ return lpmcfg.b.prt_sleep_sts; ++} ++ ++uint32_t dwc_otg_get_lpm_remotewakeenabled(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ return lpmcfg.b.rem_wkup_en; ++} ++ ++uint32_t dwc_otg_get_lpmresponse(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ return lpmcfg.b.appl_resp; ++} ++ ++void dwc_otg_set_lpmresponse(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ lpmcfg.b.appl_resp = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++} ++ ++uint32_t dwc_otg_get_hsic_connect(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ return lpmcfg.b.hsic_connect; ++} ++ ++void dwc_otg_set_hsic_connect(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ lpmcfg.b.hsic_connect = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++} ++ ++uint32_t dwc_otg_get_inv_sel_hsic(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ return lpmcfg.b.inv_sel_hsic; ++ ++} ++ ++void dwc_otg_set_inv_sel_hsic(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ lpmcfg.b.inv_sel_hsic = val; ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++} ++ ++uint32_t dwc_otg_get_gotgctl(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++} ++ ++void dwc_otg_set_gotgctl(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gotgctl, val); ++} ++ ++uint32_t dwc_otg_get_gusbcfg(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++} ++ ++void dwc_otg_set_gusbcfg(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, val); ++} ++ ++uint32_t dwc_otg_get_grxfsiz(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->grxfsiz); ++} ++ ++void dwc_otg_set_grxfsiz(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->grxfsiz, val); ++} ++ ++uint32_t dwc_otg_get_gnptxfsiz(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->gnptxfsiz); ++} ++ ++void dwc_otg_set_gnptxfsiz(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gnptxfsiz, val); ++} ++ ++uint32_t dwc_otg_get_gpvndctl(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->gpvndctl); ++} ++ ++void dwc_otg_set_gpvndctl(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gpvndctl, val); ++} ++ ++uint32_t dwc_otg_get_ggpio(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->ggpio); ++} ++ ++void dwc_otg_set_ggpio(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->ggpio, val); ++} ++ ++uint32_t dwc_otg_get_hprt0(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(core_if->host_if->hprt0); ++ ++} ++ ++void dwc_otg_set_hprt0(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(core_if->host_if->hprt0, val); ++} ++ ++uint32_t dwc_otg_get_guid(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->guid); ++} ++ ++void dwc_otg_set_guid(dwc_otg_core_if_t * core_if, uint32_t val) ++{ ++ DWC_WRITE_REG32(&core_if->core_global_regs->guid, val); ++} ++ ++uint32_t dwc_otg_get_hptxfsiz(dwc_otg_core_if_t * core_if) ++{ ++ return DWC_READ_REG32(&core_if->core_global_regs->hptxfsiz); ++} ++ ++uint16_t dwc_otg_get_otg_version(dwc_otg_core_if_t * core_if) ++{ ++ return ((core_if->otg_ver == 1) ? (uint16_t)0x0200 : (uint16_t)0x0103); ++} ++ ++/** ++ * Start the SRP timer to detect when the SRP does not complete within ++ * 6 seconds. ++ * ++ * @param core_if the pointer to core_if strucure. ++ */ ++void dwc_otg_pcd_start_srp_timer(dwc_otg_core_if_t * core_if) ++{ ++ core_if->srp_timer_started = 1; ++ DWC_TIMER_SCHEDULE(core_if->srp_timer, 6000 /* 6 secs */ ); ++} ++ ++void dwc_otg_initiate_srp(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t *addr = (uint32_t *) & (core_if->core_global_regs->gotgctl); ++ gotgctl_data_t mem; ++ gotgctl_data_t val; ++ ++ val.d32 = DWC_READ_REG32(addr); ++ if (val.b.sesreq) { ++ DWC_ERROR("Session Request Already active!\n"); ++ return; ++ } ++ ++ DWC_INFO("Session Request Initated\n"); //NOTICE ++ mem.d32 = DWC_READ_REG32(addr); ++ mem.b.sesreq = 1; ++ DWC_WRITE_REG32(addr, mem.d32); ++ ++ /* Start the SRP timer */ ++ dwc_otg_pcd_start_srp_timer(core_if); ++ return; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1464 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil.h $ ++ * $Revision: #123 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#if !defined(__DWC_CIL_H__) ++#define __DWC_CIL_H__ ++ ++#include "dwc_list.h" ++#include "dwc_otg_dbg.h" ++#include "dwc_otg_regs.h" ++ ++#include "dwc_otg_core_if.h" ++#include "dwc_otg_adp.h" ++ ++/** ++ * @file ++ * This file contains the interface to the Core Interface Layer. ++ */ ++ ++#ifdef DWC_UTE_CFI ++ ++#define MAX_DMA_DESCS_PER_EP 256 ++ ++/** ++ * Enumeration for the data buffer mode ++ */ ++typedef enum _data_buffer_mode { ++ BM_STANDARD = 0, /* data buffer is in normal mode */ ++ BM_SG = 1, /* data buffer uses the scatter/gather mode */ ++ BM_CONCAT = 2, /* data buffer uses the concatenation mode */ ++ BM_CIRCULAR = 3, /* data buffer uses the circular DMA mode */ ++ BM_ALIGN = 4 /* data buffer is in buffer alignment mode */ ++} data_buffer_mode_e; ++#endif //DWC_UTE_CFI ++ ++/** Macros defined for DWC OTG HW Release version */ ++ ++#define OTG_CORE_REV_2_60a 0x4F54260A ++#define OTG_CORE_REV_2_71a 0x4F54271A ++#define OTG_CORE_REV_2_72a 0x4F54272A ++#define OTG_CORE_REV_2_80a 0x4F54280A ++#define OTG_CORE_REV_2_81a 0x4F54281A ++#define OTG_CORE_REV_2_90a 0x4F54290A ++#define OTG_CORE_REV_2_91a 0x4F54291A ++#define OTG_CORE_REV_2_92a 0x4F54292A ++#define OTG_CORE_REV_2_93a 0x4F54293A ++#define OTG_CORE_REV_2_94a 0x4F54294A ++#define OTG_CORE_REV_3_00a 0x4F54300A ++ ++/** ++ * Information for each ISOC packet. ++ */ ++typedef struct iso_pkt_info { ++ uint32_t offset; ++ uint32_t length; ++ int32_t status; ++} iso_pkt_info_t; ++ ++/** ++ * The dwc_ep structure represents the state of a single ++ * endpoint when acting in device mode. It contains the data items ++ * needed for an endpoint to be activated and transfer packets. ++ */ ++typedef struct dwc_ep { ++ /** EP number used for register address lookup */ ++ uint8_t num; ++ /** EP direction 0 = OUT */ ++ unsigned is_in:1; ++ /** EP active. */ ++ unsigned active:1; ++ ++ /** ++ * Periodic Tx FIFO # for IN EPs For INTR EP set to 0 to use non-periodic ++ * Tx FIFO. If dedicated Tx FIFOs are enabled Tx FIFO # FOR IN EPs*/ ++ unsigned tx_fifo_num:4; ++ /** EP type: 0 - Control, 1 - ISOC, 2 - BULK, 3 - INTR */ ++ unsigned type:2; ++#define DWC_OTG_EP_TYPE_CONTROL 0 ++#define DWC_OTG_EP_TYPE_ISOC 1 ++#define DWC_OTG_EP_TYPE_BULK 2 ++#define DWC_OTG_EP_TYPE_INTR 3 ++ ++ /** DATA start PID for INTR and BULK EP */ ++ unsigned data_pid_start:1; ++ /** Frame (even/odd) for ISOC EP */ ++ unsigned even_odd_frame:1; ++ /** Max Packet bytes */ ++ unsigned maxpacket:11; ++ ++ /** Max Transfer size */ ++ uint32_t maxxfer; ++ ++ /** @name Transfer state */ ++ /** @{ */ ++ ++ /** ++ * Pointer to the beginning of the transfer buffer -- do not modify ++ * during transfer. ++ */ ++ ++ dwc_dma_t dma_addr; ++ ++ dwc_dma_t dma_desc_addr; ++ dwc_otg_dev_dma_desc_t *desc_addr; ++ ++ uint8_t *start_xfer_buff; ++ /** pointer to the transfer buffer */ ++ uint8_t *xfer_buff; ++ /** Number of bytes to transfer */ ++ unsigned xfer_len:19; ++ /** Number of bytes transferred. */ ++ unsigned xfer_count:19; ++ /** Sent ZLP */ ++ unsigned sent_zlp:1; ++ /** Total len for control transfer */ ++ unsigned total_len:19; ++ ++ /** stall clear flag */ ++ unsigned stall_clear_flag:1; ++ ++ /** SETUP pkt cnt rollover flag for EP0 out*/ ++ unsigned stp_rollover; ++ ++#ifdef DWC_UTE_CFI ++ /* The buffer mode */ ++ data_buffer_mode_e buff_mode; ++ ++ /* The chain of DMA descriptors. ++ * MAX_DMA_DESCS_PER_EP will be allocated for each active EP. ++ */ ++ dwc_otg_dma_desc_t *descs; ++ ++ /* The DMA address of the descriptors chain start */ ++ dma_addr_t descs_dma_addr; ++ /** This variable stores the length of the last enqueued request */ ++ uint32_t cfi_req_len; ++#endif //DWC_UTE_CFI ++ ++/** Max DMA Descriptor count for any EP */ ++#define MAX_DMA_DESC_CNT 256 ++ /** Allocated DMA Desc count */ ++ uint32_t desc_cnt; ++ ++ /** bInterval */ ++ uint32_t bInterval; ++ /** Next frame num to setup next ISOC transfer */ ++ uint32_t frame_num; ++ /** Indicates SOF number overrun in DSTS */ ++ uint8_t frm_overrun; ++ ++#ifdef DWC_UTE_PER_IO ++ /** Next frame num for which will be setup DMA Desc */ ++ uint32_t xiso_frame_num; ++ /** bInterval */ ++ uint32_t xiso_bInterval; ++ /** Count of currently active transfers - shall be either 0 or 1 */ ++ int xiso_active_xfers; ++ int xiso_queued_xfers; ++#endif ++#ifdef DWC_EN_ISOC ++ /** ++ * Variables specific for ISOC EPs ++ * ++ */ ++ /** DMA addresses of ISOC buffers */ ++ dwc_dma_t dma_addr0; ++ dwc_dma_t dma_addr1; ++ ++ dwc_dma_t iso_dma_desc_addr; ++ dwc_otg_dev_dma_desc_t *iso_desc_addr; ++ ++ /** pointer to the transfer buffers */ ++ uint8_t *xfer_buff0; ++ uint8_t *xfer_buff1; ++ ++ /** number of ISOC Buffer is processing */ ++ uint32_t proc_buf_num; ++ /** Interval of ISOC Buffer processing */ ++ uint32_t buf_proc_intrvl; ++ /** Data size for regular frame */ ++ uint32_t data_per_frame; ++ ++ /* todo - pattern data support is to be implemented in the future */ ++ /** Data size for pattern frame */ ++ uint32_t data_pattern_frame; ++ /** Frame number of pattern data */ ++ uint32_t sync_frame; ++ ++ /** bInterval */ ++ uint32_t bInterval; ++ /** ISO Packet number per frame */ ++ uint32_t pkt_per_frm; ++ /** Next frame num for which will be setup DMA Desc */ ++ uint32_t next_frame; ++ /** Number of packets per buffer processing */ ++ uint32_t pkt_cnt; ++ /** Info for all isoc packets */ ++ iso_pkt_info_t *pkt_info; ++ /** current pkt number */ ++ uint32_t cur_pkt; ++ /** current pkt number */ ++ uint8_t *cur_pkt_addr; ++ /** current pkt number */ ++ uint32_t cur_pkt_dma_addr; ++#endif /* DWC_EN_ISOC */ ++ ++/** @} */ ++} dwc_ep_t; ++ ++/* ++ * Reasons for halting a host channel. ++ */ ++typedef enum dwc_otg_halt_status { ++ DWC_OTG_HC_XFER_NO_HALT_STATUS, ++ DWC_OTG_HC_XFER_COMPLETE, ++ DWC_OTG_HC_XFER_URB_COMPLETE, ++ DWC_OTG_HC_XFER_ACK, ++ DWC_OTG_HC_XFER_NAK, ++ DWC_OTG_HC_XFER_NYET, ++ DWC_OTG_HC_XFER_STALL, ++ DWC_OTG_HC_XFER_XACT_ERR, ++ DWC_OTG_HC_XFER_FRAME_OVERRUN, ++ DWC_OTG_HC_XFER_BABBLE_ERR, ++ DWC_OTG_HC_XFER_DATA_TOGGLE_ERR, ++ DWC_OTG_HC_XFER_AHB_ERR, ++ DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE, ++ DWC_OTG_HC_XFER_URB_DEQUEUE ++} dwc_otg_halt_status_e; ++ ++/** ++ * Host channel descriptor. This structure represents the state of a single ++ * host channel when acting in host mode. It contains the data items needed to ++ * transfer packets to an endpoint via a host channel. ++ */ ++typedef struct dwc_hc { ++ /** Host channel number used for register address lookup */ ++ uint8_t hc_num; ++ ++ /** Device to access */ ++ unsigned dev_addr:7; ++ ++ /** EP to access */ ++ unsigned ep_num:4; ++ ++ /** EP direction. 0: OUT, 1: IN */ ++ unsigned ep_is_in:1; ++ ++ /** ++ * EP speed. ++ * One of the following values: ++ * - DWC_OTG_EP_SPEED_LOW ++ * - DWC_OTG_EP_SPEED_FULL ++ * - DWC_OTG_EP_SPEED_HIGH ++ */ ++ unsigned speed:2; ++#define DWC_OTG_EP_SPEED_LOW 0 ++#define DWC_OTG_EP_SPEED_FULL 1 ++#define DWC_OTG_EP_SPEED_HIGH 2 ++ ++ /** ++ * Endpoint type. ++ * One of the following values: ++ * - DWC_OTG_EP_TYPE_CONTROL: 0 ++ * - DWC_OTG_EP_TYPE_ISOC: 1 ++ * - DWC_OTG_EP_TYPE_BULK: 2 ++ * - DWC_OTG_EP_TYPE_INTR: 3 ++ */ ++ unsigned ep_type:2; ++ ++ /** Max packet size in bytes */ ++ unsigned max_packet:11; ++ ++ /** ++ * PID for initial transaction. ++ * 0: DATA0,
++ * 1: DATA2,
++ * 2: DATA1,
++ * 3: MDATA (non-Control EP), ++ * SETUP (Control EP) ++ */ ++ unsigned data_pid_start:2; ++#define DWC_OTG_HC_PID_DATA0 0 ++#define DWC_OTG_HC_PID_DATA2 1 ++#define DWC_OTG_HC_PID_DATA1 2 ++#define DWC_OTG_HC_PID_MDATA 3 ++#define DWC_OTG_HC_PID_SETUP 3 ++ ++ /** Number of periodic transactions per (micro)frame */ ++ unsigned multi_count:2; ++ ++ /** @name Transfer State */ ++ /** @{ */ ++ ++ /** Pointer to the current transfer buffer position. */ ++ uint8_t *xfer_buff; ++ /** ++ * In Buffer DMA mode this buffer will be used ++ * if xfer_buff is not DWORD aligned. ++ */ ++ dwc_dma_t align_buff; ++ /** Total number of bytes to transfer. */ ++ uint32_t xfer_len; ++ /** Number of bytes transferred so far. */ ++ uint32_t xfer_count; ++ /** Packet count at start of transfer.*/ ++ uint16_t start_pkt_count; ++ ++ /** ++ * Flag to indicate whether the transfer has been started. Set to 1 if ++ * it has been started, 0 otherwise. ++ */ ++ uint8_t xfer_started; ++ ++ /** ++ * Set to 1 to indicate that a PING request should be issued on this ++ * channel. If 0, process normally. ++ */ ++ uint8_t do_ping; ++ ++ /** ++ * Set to 1 to indicate that the error count for this transaction is ++ * non-zero. Set to 0 if the error count is 0. ++ */ ++ uint8_t error_state; ++ ++ /** ++ * Set to 1 to indicate that this channel should be halted the next ++ * time a request is queued for the channel. This is necessary in ++ * slave mode if no request queue space is available when an attempt ++ * is made to halt the channel. ++ */ ++ uint8_t halt_on_queue; ++ ++ /** ++ * Set to 1 if the host channel has been halted, but the core is not ++ * finished flushing queued requests. Otherwise 0. ++ */ ++ uint8_t halt_pending; ++ ++ /** ++ * Reason for halting the host channel. ++ */ ++ dwc_otg_halt_status_e halt_status; ++ ++ /* ++ * Split settings for the host channel ++ */ ++ uint8_t do_split; /**< Enable split for the channel */ ++ uint8_t complete_split; /**< Enable complete split */ ++ uint8_t hub_addr; /**< Address of high speed hub */ ++ ++ uint8_t port_addr; /**< Port of the low/full speed device */ ++ /** Split transaction position ++ * One of the following values: ++ * - DWC_HCSPLIT_XACTPOS_MID ++ * - DWC_HCSPLIT_XACTPOS_BEGIN ++ * - DWC_HCSPLIT_XACTPOS_END ++ * - DWC_HCSPLIT_XACTPOS_ALL */ ++ uint8_t xact_pos; ++ ++ /** Set when the host channel does a short read. */ ++ uint8_t short_read; ++ ++ /** ++ * Number of requests issued for this channel since it was assigned to ++ * the current transfer (not counting PINGs). ++ */ ++ uint8_t requests; ++ ++ /** ++ * Queue Head for the transfer being processed by this channel. ++ */ ++ struct dwc_otg_qh *qh; ++ ++ /** @} */ ++ ++ /** Entry in list of host channels. */ ++ DWC_CIRCLEQ_ENTRY(dwc_hc) hc_list_entry; ++ ++ /** @name Descriptor DMA support */ ++ /** @{ */ ++ ++ /** Number of Transfer Descriptors */ ++ uint16_t ntd; ++ ++ /** Descriptor List DMA address */ ++ dwc_dma_t desc_list_addr; ++ ++ /** Scheduling micro-frame bitmap. */ ++ uint8_t schinfo; ++ ++ /** @} */ ++} dwc_hc_t; ++ ++/** ++ * The following parameters may be specified when starting the module. These ++ * parameters define how the DWC_otg controller should be configured. ++ */ ++typedef struct dwc_otg_core_params { ++ int32_t opt; ++ ++ /** ++ * Specifies the OTG capabilities. The driver will automatically ++ * detect the value for this parameter if none is specified. ++ * 0 - HNP and SRP capable (default) ++ * 1 - SRP Only capable ++ * 2 - No HNP/SRP capable ++ */ ++ int32_t otg_cap; ++ ++ /** ++ * Specifies whether to use slave or DMA mode for accessing the data ++ * FIFOs. The driver will automatically detect the value for this ++ * parameter if none is specified. ++ * 0 - Slave ++ * 1 - DMA (default, if available) ++ */ ++ int32_t dma_enable; ++ ++ /** ++ * When DMA mode is enabled specifies whether to use address DMA or DMA ++ * Descriptor mode for accessing the data FIFOs in device mode. The driver ++ * will automatically detect the value for this if none is specified. ++ * 0 - address DMA ++ * 1 - DMA Descriptor(default, if available) ++ */ ++ int32_t dma_desc_enable; ++ /** The DMA Burst size (applicable only for External DMA ++ * Mode). 1, 4, 8 16, 32, 64, 128, 256 (default 32) ++ */ ++ int32_t dma_burst_size; /* Translate this to GAHBCFG values */ ++ ++ /** ++ * Specifies the maximum speed of operation in host and device mode. ++ * The actual speed depends on the speed of the attached device and ++ * the value of phy_type. The actual speed depends on the speed of the ++ * attached device. ++ * 0 - High Speed (default) ++ * 1 - Full Speed ++ */ ++ int32_t speed; ++ /** Specifies whether low power mode is supported when attached ++ * to a Full Speed or Low Speed device in host mode. ++ * 0 - Don't support low power mode (default) ++ * 1 - Support low power mode ++ */ ++ int32_t host_support_fs_ls_low_power; ++ ++ /** Specifies the PHY clock rate in low power mode when connected to a ++ * Low Speed device in host mode. This parameter is applicable only if ++ * HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS ++ * then defaults to 6 MHZ otherwise 48 MHZ. ++ * ++ * 0 - 48 MHz ++ * 1 - 6 MHz ++ */ ++ int32_t host_ls_low_power_phy_clk; ++ ++ /** ++ * 0 - Use cC FIFO size parameters ++ * 1 - Allow dynamic FIFO sizing (default) ++ */ ++ int32_t enable_dynamic_fifo; ++ ++ /** Total number of 4-byte words in the data FIFO memory. This ++ * memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic ++ * Tx FIFOs. ++ * 32 to 32768 (default 8192) ++ * Note: The total FIFO memory depth in the FPGA configuration is 8192. ++ */ ++ int32_t data_fifo_size; ++ ++ /** Number of 4-byte words in the Rx FIFO in device mode when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1064) ++ */ ++ int32_t dev_rx_fifo_size; ++ ++ /** Number of 4-byte words in the non-periodic Tx FIFO in device mode ++ * when dynamic FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++ int32_t dev_nperio_tx_fifo_size; ++ ++ /** Number of 4-byte words in each of the periodic Tx FIFOs in device ++ * mode when dynamic FIFO sizing is enabled. ++ * 4 to 768 (default 256) ++ */ ++ uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS]; ++ ++ /** Number of 4-byte words in the Rx FIFO in host mode when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++ int32_t host_rx_fifo_size; ++ ++ /** Number of 4-byte words in the non-periodic Tx FIFO in host mode ++ * when Dynamic FIFO sizing is enabled in the core. ++ * 16 to 32768 (default 1024) ++ */ ++ int32_t host_nperio_tx_fifo_size; ++ ++ /** Number of 4-byte words in the host periodic Tx FIFO when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++ int32_t host_perio_tx_fifo_size; ++ ++ /** The maximum transfer size supported in bytes. ++ * 2047 to 65,535 (default 65,535) ++ */ ++ int32_t max_transfer_size; ++ ++ /** The maximum number of packets in a transfer. ++ * 15 to 511 (default 511) ++ */ ++ int32_t max_packet_count; ++ ++ /** The number of host channel registers to use. ++ * 1 to 16 (default 12) ++ * Note: The FPGA configuration supports a maximum of 12 host channels. ++ */ ++ int32_t host_channels; ++ ++ /** The number of endpoints in addition to EP0 available for device ++ * mode operations. ++ * 1 to 15 (default 6 IN and OUT) ++ * Note: The FPGA configuration supports a maximum of 6 IN and OUT ++ * endpoints in addition to EP0. ++ */ ++ int32_t dev_endpoints; ++ ++ /** ++ * Specifies the type of PHY interface to use. By default, the driver ++ * will automatically detect the phy_type. ++ * ++ * 0 - Full Speed PHY ++ * 1 - UTMI+ (default) ++ * 2 - ULPI ++ */ ++ int32_t phy_type; ++ ++ /** ++ * Specifies the UTMI+ Data Width. This parameter is ++ * applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI ++ * PHY_TYPE, this parameter indicates the data width between ++ * the MAC and the ULPI Wrapper.) Also, this parameter is ++ * applicable only if the OTG_HSPHY_WIDTH cC parameter was set ++ * to "8 and 16 bits", meaning that the core has been ++ * configured to work at either data path width. ++ * ++ * 8 or 16 bits (default 16) ++ */ ++ int32_t phy_utmi_width; ++ ++ /** ++ * Specifies whether the ULPI operates at double or single ++ * data rate. This parameter is only applicable if PHY_TYPE is ++ * ULPI. ++ * ++ * 0 - single data rate ULPI interface with 8 bit wide data ++ * bus (default) ++ * 1 - double data rate ULPI interface with 4 bit wide data ++ * bus ++ */ ++ int32_t phy_ulpi_ddr; ++ ++ /** ++ * Specifies whether to use the internal or external supply to ++ * drive the vbus with a ULPI phy. ++ */ ++ int32_t phy_ulpi_ext_vbus; ++ ++ /** ++ * Specifies whether to use the I2Cinterface for full speed PHY. This ++ * parameter is only applicable if PHY_TYPE is FS. ++ * 0 - No (default) ++ * 1 - Yes ++ */ ++ int32_t i2c_enable; ++ ++ int32_t ulpi_fs_ls; ++ ++ int32_t ts_dline; ++ ++ /** ++ * Specifies whether dedicated transmit FIFOs are ++ * enabled for non periodic IN endpoints in device mode ++ * 0 - No ++ * 1 - Yes ++ */ ++ int32_t en_multiple_tx_fifo; ++ ++ /** Number of 4-byte words in each of the Tx FIFOs in device ++ * mode when dynamic FIFO sizing is enabled. ++ * 4 to 768 (default 256) ++ */ ++ uint32_t dev_tx_fifo_size[MAX_TX_FIFOS]; ++ ++ /** Thresholding enable flag- ++ * bit 0 - enable non-ISO Tx thresholding ++ * bit 1 - enable ISO Tx thresholding ++ * bit 2 - enable Rx thresholding ++ */ ++ uint32_t thr_ctl; ++ ++ /** Thresholding length for Tx ++ * FIFOs in 32 bit DWORDs ++ */ ++ uint32_t tx_thr_length; ++ ++ /** Thresholding length for Rx ++ * FIFOs in 32 bit DWORDs ++ */ ++ uint32_t rx_thr_length; ++ ++ /** ++ * Specifies whether LPM (Link Power Management) support is enabled ++ */ ++ int32_t lpm_enable; ++ ++ /** Per Transfer Interrupt ++ * mode enable flag ++ * 1 - Enabled ++ * 0 - Disabled ++ */ ++ int32_t pti_enable; ++ ++ /** Multi Processor Interrupt ++ * mode enable flag ++ * 1 - Enabled ++ * 0 - Disabled ++ */ ++ int32_t mpi_enable; ++ ++ /** IS_USB Capability ++ * 1 - Enabled ++ * 0 - Disabled ++ */ ++ int32_t ic_usb_cap; ++ ++ /** AHB Threshold Ratio ++ * 2'b00 AHB Threshold = MAC Threshold ++ * 2'b01 AHB Threshold = 1/2 MAC Threshold ++ * 2'b10 AHB Threshold = 1/4 MAC Threshold ++ * 2'b11 AHB Threshold = 1/8 MAC Threshold ++ */ ++ int32_t ahb_thr_ratio; ++ ++ /** ADP Support ++ * 1 - Enabled ++ * 0 - Disabled ++ */ ++ int32_t adp_supp_enable; ++ ++ /** HFIR Reload Control ++ * 0 - The HFIR cannot be reloaded dynamically. ++ * 1 - Allow dynamic reloading of the HFIR register during runtime. ++ */ ++ int32_t reload_ctl; ++ ++ /** DCFG: Enable device Out NAK ++ * 0 - The core does not set NAK after Bulk Out transfer complete. ++ * 1 - The core sets NAK after Bulk OUT transfer complete. ++ */ ++ int32_t dev_out_nak; ++ ++ /** DCFG: Enable Continue on BNA ++ * After receiving BNA interrupt the core disables the endpoint,when the ++ * endpoint is re-enabled by the application the core starts processing ++ * 0 - from the DOEPDMA descriptor ++ * 1 - from the descriptor which received the BNA. ++ */ ++ int32_t cont_on_bna; ++ ++ /** GAHBCFG: AHB Single Support ++ * This bit when programmed supports SINGLE transfers for remainder ++ * data in a transfer for DMA mode of operation. ++ * 0 - in this case the remainder data will be sent using INCR burst size. ++ * 1 - in this case the remainder data will be sent using SINGLE burst size. ++ */ ++ int32_t ahb_single; ++ ++ /** Core Power down mode ++ * 0 - No Power Down is enabled ++ * 1 - Reserved ++ * 2 - Complete Power Down (Hibernation) ++ */ ++ int32_t power_down; ++ ++ /** OTG revision supported ++ * 0 - OTG 1.3 revision ++ * 1 - OTG 2.0 revision ++ */ ++ int32_t otg_ver; ++ ++} dwc_otg_core_params_t; ++ ++#ifdef DEBUG ++struct dwc_otg_core_if; ++typedef struct hc_xfer_info { ++ struct dwc_otg_core_if *core_if; ++ dwc_hc_t *hc; ++} hc_xfer_info_t; ++#endif ++ ++typedef struct ep_xfer_info { ++ struct dwc_otg_core_if *core_if; ++ dwc_ep_t *ep; ++ uint8_t state; ++} ep_xfer_info_t; ++/* ++ * Device States ++ */ ++typedef enum dwc_otg_lx_state { ++ /** On state */ ++ DWC_OTG_L0, ++ /** LPM sleep state*/ ++ DWC_OTG_L1, ++ /** USB suspend state*/ ++ DWC_OTG_L2, ++ /** Off state*/ ++ DWC_OTG_L3 ++} dwc_otg_lx_state_e; ++ ++struct dwc_otg_global_regs_backup { ++ uint32_t gotgctl_local; ++ uint32_t gintmsk_local; ++ uint32_t gahbcfg_local; ++ uint32_t gusbcfg_local; ++ uint32_t grxfsiz_local; ++ uint32_t gnptxfsiz_local; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ uint32_t glpmcfg_local; ++#endif ++ uint32_t gi2cctl_local; ++ uint32_t hptxfsiz_local; ++ uint32_t pcgcctl_local; ++ uint32_t gdfifocfg_local; ++ uint32_t dtxfsiz_local[MAX_EPS_CHANNELS]; ++ uint32_t gpwrdn_local; ++ uint32_t xhib_pcgcctl; ++ uint32_t xhib_gpwrdn; ++}; ++ ++struct dwc_otg_host_regs_backup { ++ uint32_t hcfg_local; ++ uint32_t haintmsk_local; ++ uint32_t hcintmsk_local[MAX_EPS_CHANNELS]; ++ uint32_t hprt0_local; ++ uint32_t hfir_local; ++}; ++ ++struct dwc_otg_dev_regs_backup { ++ uint32_t dcfg; ++ uint32_t dctl; ++ uint32_t daintmsk; ++ uint32_t diepmsk; ++ uint32_t doepmsk; ++ uint32_t diepctl[MAX_EPS_CHANNELS]; ++ uint32_t dieptsiz[MAX_EPS_CHANNELS]; ++ uint32_t diepdma[MAX_EPS_CHANNELS]; ++}; ++/** ++ * The dwc_otg_core_if structure contains information needed to manage ++ * the DWC_otg controller acting in either host or device mode. It ++ * represents the programming view of the controller as a whole. ++ */ ++struct dwc_otg_core_if { ++ /** Parameters that define how the core should be configured.*/ ++ dwc_otg_core_params_t *core_params; ++ ++ /** Core Global registers starting at offset 000h. */ ++ dwc_otg_core_global_regs_t *core_global_regs; ++ ++ /** Device-specific information */ ++ dwc_otg_dev_if_t *dev_if; ++ /** Host-specific information */ ++ dwc_otg_host_if_t *host_if; ++ ++ /** Value from SNPSID register */ ++ uint32_t snpsid; ++ ++ /* ++ * Set to 1 if the core PHY interface bits in USBCFG have been ++ * initialized. ++ */ ++ uint8_t phy_init_done; ++ ++ /* ++ * SRP Success flag, set by srp success interrupt in FS I2C mode ++ */ ++ uint8_t srp_success; ++ uint8_t srp_timer_started; ++ /** Timer for SRP. If it expires before SRP is successful ++ * clear the SRP. */ ++ dwc_timer_t *srp_timer; ++ ++#ifdef DWC_DEV_SRPCAP ++ /* This timer is needed to power on the hibernated host core if SRP is not ++ * initiated on connected SRP capable device for limited period of time ++ */ ++ uint8_t pwron_timer_started; ++ dwc_timer_t *pwron_timer; ++#endif ++ /* Common configuration information */ ++ /** Power and Clock Gating Control Register */ ++ volatile uint32_t *pcgcctl; ++#define DWC_OTG_PCGCCTL_OFFSET 0xE00 ++ ++ /** Push/pop addresses for endpoints or host channels.*/ ++ uint32_t *data_fifo[MAX_EPS_CHANNELS]; ++#define DWC_OTG_DATA_FIFO_OFFSET 0x1000 ++#define DWC_OTG_DATA_FIFO_SIZE 0x1000 ++ ++ /** Total RAM for FIFOs (Bytes) */ ++ uint16_t total_fifo_size; ++ /** Size of Rx FIFO (Bytes) */ ++ uint16_t rx_fifo_size; ++ /** Size of Non-periodic Tx FIFO (Bytes) */ ++ uint16_t nperio_tx_fifo_size; ++ ++ /** 1 if DMA is enabled, 0 otherwise. */ ++ uint8_t dma_enable; ++ ++ /** 1 if DMA descriptor is enabled, 0 otherwise. */ ++ uint8_t dma_desc_enable; ++ ++ /** 1 if PTI Enhancement mode is enabled, 0 otherwise. */ ++ uint8_t pti_enh_enable; ++ ++ /** 1 if MPI Enhancement mode is enabled, 0 otherwise. */ ++ uint8_t multiproc_int_enable; ++ ++ /** 1 if dedicated Tx FIFOs are enabled, 0 otherwise. */ ++ uint8_t en_multiple_tx_fifo; ++ ++ /** Set to 1 if multiple packets of a high-bandwidth transfer is in ++ * process of being queued */ ++ uint8_t queuing_high_bandwidth; ++ ++ /** Hardware Configuration -- stored here for convenience.*/ ++ hwcfg1_data_t hwcfg1; ++ hwcfg2_data_t hwcfg2; ++ hwcfg3_data_t hwcfg3; ++ hwcfg4_data_t hwcfg4; ++ fifosize_data_t hptxfsiz; ++ ++ /** Host and Device Configuration -- stored here for convenience.*/ ++ hcfg_data_t hcfg; ++ dcfg_data_t dcfg; ++ ++ /** The operational State, during transations ++ * (a_host>>a_peripherial and b_device=>b_host) this may not ++ * match the core but allows the software to determine ++ * transitions. ++ */ ++ uint8_t op_state; ++ ++ /** ++ * Set to 1 if the HCD needs to be restarted on a session request ++ * interrupt. This is required if no connector ID status change has ++ * occurred since the HCD was last disconnected. ++ */ ++ uint8_t restart_hcd_on_session_req; ++ ++ /** HCD callbacks */ ++ /** A-Device is a_host */ ++#define A_HOST (1) ++ /** A-Device is a_suspend */ ++#define A_SUSPEND (2) ++ /** A-Device is a_peripherial */ ++#define A_PERIPHERAL (3) ++ /** B-Device is operating as a Peripheral. */ ++#define B_PERIPHERAL (4) ++ /** B-Device is operating as a Host. */ ++#define B_HOST (5) ++ ++ /** HCD callbacks */ ++ struct dwc_otg_cil_callbacks *hcd_cb; ++ /** PCD callbacks */ ++ struct dwc_otg_cil_callbacks *pcd_cb; ++ ++ /** Device mode Periodic Tx FIFO Mask */ ++ uint32_t p_tx_msk; ++ /** Device mode Periodic Tx FIFO Mask */ ++ uint32_t tx_msk; ++ ++ /** Workqueue object used for handling several interrupts */ ++ dwc_workq_t *wq_otg; ++ ++ /** Timer object used for handling "Wakeup Detected" Interrupt */ ++ dwc_timer_t *wkp_timer; ++ /** This arrays used for debug purposes for DEV OUT NAK enhancement */ ++ uint32_t start_doeptsiz_val[MAX_EPS_CHANNELS]; ++ ep_xfer_info_t ep_xfer_info[MAX_EPS_CHANNELS]; ++ dwc_timer_t *ep_xfer_timer[MAX_EPS_CHANNELS]; ++#ifdef DEBUG ++ uint32_t start_hcchar_val[MAX_EPS_CHANNELS]; ++ ++ hc_xfer_info_t hc_xfer_info[MAX_EPS_CHANNELS]; ++ dwc_timer_t *hc_xfer_timer[MAX_EPS_CHANNELS]; ++ ++ uint32_t hfnum_7_samples; ++ uint64_t hfnum_7_frrem_accum; ++ uint32_t hfnum_0_samples; ++ uint64_t hfnum_0_frrem_accum; ++ uint32_t hfnum_other_samples; ++ uint64_t hfnum_other_frrem_accum; ++#endif ++ ++#ifdef DWC_UTE_CFI ++ uint16_t pwron_rxfsiz; ++ uint16_t pwron_gnptxfsiz; ++ uint16_t pwron_txfsiz[15]; ++ ++ uint16_t init_rxfsiz; ++ uint16_t init_gnptxfsiz; ++ uint16_t init_txfsiz[15]; ++#endif ++ ++ /** Lx state of device */ ++ dwc_otg_lx_state_e lx_state; ++ ++ /** Saved Core Global registers */ ++ struct dwc_otg_global_regs_backup *gr_backup; ++ /** Saved Host registers */ ++ struct dwc_otg_host_regs_backup *hr_backup; ++ /** Saved Device registers */ ++ struct dwc_otg_dev_regs_backup *dr_backup; ++ ++ /** Power Down Enable */ ++ uint32_t power_down; ++ ++ /** ADP support Enable */ ++ uint32_t adp_enable; ++ ++ /** ADP structure object */ ++ dwc_otg_adp_t adp; ++ ++ /** hibernation/suspend flag */ ++ int hibernation_suspend; ++ ++ /** Device mode extended hibernation flag */ ++ int xhib; ++ ++ /** OTG revision supported */ ++ uint32_t otg_ver; ++ ++ /** OTG status flag used for HNP polling */ ++ uint8_t otg_sts; ++ ++ /** Pointer to either hcd->lock or pcd->lock */ ++ dwc_spinlock_t *lock; ++ ++ /** Start predict NextEP based on Learning Queue if equal 1, ++ * also used as counter of disabled NP IN EP's */ ++ uint8_t start_predict; ++ ++ /** NextEp sequence, including EP0: nextep_seq[] = EP if non-periodic and ++ * active, 0xff otherwise */ ++ uint8_t nextep_seq[MAX_EPS_CHANNELS]; ++ ++ /** Index of fisrt EP in nextep_seq array which should be re-enabled **/ ++ uint8_t first_in_nextep_seq; ++ ++ /** Frame number while entering to ISR - needed for ISOCs **/ ++ uint32_t frame_num; ++ ++}; ++ ++#ifdef DEBUG ++/* ++ * This function is called when transfer is timed out. ++ */ ++extern void hc_xfer_timeout(void *ptr); ++#endif ++ ++/* ++ * This function is called when transfer is timed out on endpoint. ++ */ ++extern void ep_xfer_timeout(void *ptr); ++ ++/* ++ * The following functions are functions for works ++ * using during handling some interrupts ++ */ ++extern void w_conn_id_status_change(void *p); ++ ++extern void w_wakeup_detected(void *p); ++ ++/** Saves global register values into system memory. */ ++extern int dwc_otg_save_global_regs(dwc_otg_core_if_t * core_if); ++/** Saves device register values into system memory. */ ++extern int dwc_otg_save_dev_regs(dwc_otg_core_if_t * core_if); ++/** Saves host register values into system memory. */ ++extern int dwc_otg_save_host_regs(dwc_otg_core_if_t * core_if); ++/** Restore global register values. */ ++extern int dwc_otg_restore_global_regs(dwc_otg_core_if_t * core_if); ++/** Restore host register values. */ ++extern int dwc_otg_restore_host_regs(dwc_otg_core_if_t * core_if, int reset); ++/** Restore device register values. */ ++extern int dwc_otg_restore_dev_regs(dwc_otg_core_if_t * core_if, ++ int rem_wakeup); ++extern int restore_lpm_i2c_regs(dwc_otg_core_if_t * core_if); ++extern int restore_essential_regs(dwc_otg_core_if_t * core_if, int rmode, ++ int is_host); ++ ++extern int dwc_otg_host_hibernation_restore(dwc_otg_core_if_t * core_if, ++ int restore_mode, int reset); ++extern int dwc_otg_device_hibernation_restore(dwc_otg_core_if_t * core_if, ++ int rem_wakeup, int reset); ++ ++/* ++ * The following functions support initialization of the CIL driver component ++ * and the DWC_otg controller. ++ */ ++extern void dwc_otg_core_host_init(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_core_dev_init(dwc_otg_core_if_t * _core_if); ++ ++/** @name Device CIL Functions ++ * The following functions support managing the DWC_otg controller in device ++ * mode. ++ */ ++/**@{*/ ++extern void dwc_otg_wakeup(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_read_setup_packet(dwc_otg_core_if_t * _core_if, ++ uint32_t * _dest); ++extern uint32_t dwc_otg_get_frame_number(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_ep0_activate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep); ++extern void dwc_otg_ep_activate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep); ++extern void dwc_otg_ep_deactivate(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep); ++extern void dwc_otg_ep_start_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep); ++extern void dwc_otg_ep_start_zl_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep); ++extern void dwc_otg_ep0_start_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep); ++extern void dwc_otg_ep0_continue_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep); ++extern void dwc_otg_ep_write_packet(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep, int _dma); ++extern void dwc_otg_ep_set_stall(dwc_otg_core_if_t * _core_if, dwc_ep_t * _ep); ++extern void dwc_otg_ep_clear_stall(dwc_otg_core_if_t * _core_if, ++ dwc_ep_t * _ep); ++extern void dwc_otg_enable_device_interrupts(dwc_otg_core_if_t * _core_if); ++ ++#ifdef DWC_EN_ISOC ++extern void dwc_otg_iso_ep_start_frm_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep); ++extern void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep); ++#endif /* DWC_EN_ISOC */ ++/**@}*/ ++ ++/** @name Host CIL Functions ++ * The following functions support managing the DWC_otg controller in host ++ * mode. ++ */ ++/**@{*/ ++extern void dwc_otg_hc_init(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc); ++extern void dwc_otg_hc_halt(dwc_otg_core_if_t * _core_if, ++ dwc_hc_t * _hc, dwc_otg_halt_status_e _halt_status); ++extern void dwc_otg_hc_cleanup(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc); ++extern void dwc_otg_hc_start_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_hc_t * _hc); ++extern int dwc_otg_hc_continue_transfer(dwc_otg_core_if_t * _core_if, ++ dwc_hc_t * _hc); ++extern void dwc_otg_hc_do_ping(dwc_otg_core_if_t * _core_if, dwc_hc_t * _hc); ++extern void dwc_otg_hc_write_packet(dwc_otg_core_if_t * _core_if, ++ dwc_hc_t * _hc); ++extern void dwc_otg_enable_host_interrupts(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_disable_host_interrupts(dwc_otg_core_if_t * _core_if); ++ ++extern void dwc_otg_hc_start_transfer_ddma(dwc_otg_core_if_t * core_if, ++ dwc_hc_t * hc); ++ ++extern uint32_t calc_frame_interval(dwc_otg_core_if_t * core_if); ++ ++/* Macro used to clear one channel interrupt */ ++#define clear_hc_int(_hc_regs_, _intr_) \ ++do { \ ++ hcint_data_t hcint_clear = {.d32 = 0}; \ ++ hcint_clear.b._intr_ = 1; \ ++ DWC_WRITE_REG32(&(_hc_regs_)->hcint, hcint_clear.d32); \ ++} while (0) ++ ++/* ++ * Macro used to disable one channel interrupt. Channel interrupts are ++ * disabled when the channel is halted or released by the interrupt handler. ++ * There is no need to handle further interrupts of that type until the ++ * channel is re-assigned. In fact, subsequent handling may cause crashes ++ * because the channel structures are cleaned up when the channel is released. ++ */ ++#define disable_hc_int(_hc_regs_, _intr_) \ ++do { \ ++ hcintmsk_data_t hcintmsk = {.d32 = 0}; \ ++ hcintmsk.b._intr_ = 1; \ ++ DWC_MODIFY_REG32(&(_hc_regs_)->hcintmsk, hcintmsk.d32, 0); \ ++} while (0) ++ ++/** ++ * This function Reads HPRT0 in preparation to modify. It keeps the ++ * WC bits 0 so that if they are read as 1, they won't clear when you ++ * write it back ++ */ ++static inline uint32_t dwc_otg_read_hprt0(dwc_otg_core_if_t * _core_if) ++{ ++ hprt0_data_t hprt0; ++ hprt0.d32 = DWC_READ_REG32(_core_if->host_if->hprt0); ++ hprt0.b.prtena = 0; ++ hprt0.b.prtconndet = 0; ++ hprt0.b.prtenchng = 0; ++ hprt0.b.prtovrcurrchng = 0; ++ return hprt0.d32; ++} ++ ++/**@}*/ ++ ++/** @name Common CIL Functions ++ * The following functions support managing the DWC_otg controller in either ++ * device or host mode. ++ */ ++/**@{*/ ++ ++extern void dwc_otg_read_packet(dwc_otg_core_if_t * core_if, ++ uint8_t * dest, uint16_t bytes); ++ ++extern void dwc_otg_flush_tx_fifo(dwc_otg_core_if_t * _core_if, const int _num); ++extern void dwc_otg_flush_rx_fifo(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_core_reset(dwc_otg_core_if_t * _core_if); ++ ++/** ++ * This function returns the Core Interrupt register. ++ */ ++static inline uint32_t dwc_otg_read_core_intr(dwc_otg_core_if_t * core_if) ++{ ++ return (DWC_READ_REG32(&core_if->core_global_regs->gintsts) & ++ DWC_READ_REG32(&core_if->core_global_regs->gintmsk)); ++} ++ ++/** ++ * This function returns the OTG Interrupt register. ++ */ ++static inline uint32_t dwc_otg_read_otg_intr(dwc_otg_core_if_t * core_if) ++{ ++ return (DWC_READ_REG32(&core_if->core_global_regs->gotgint)); ++} ++ ++/** ++ * This function reads the Device All Endpoints Interrupt register and ++ * returns the IN endpoint interrupt bits. ++ */ ++static inline uint32_t dwc_otg_read_dev_all_in_ep_intr(dwc_otg_core_if_t * ++ core_if) ++{ ++ ++ uint32_t v; ++ ++ if (core_if->multiproc_int_enable) { ++ v = DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->deachint) & ++ DWC_READ_REG32(&core_if-> ++ dev_if->dev_global_regs->deachintmsk); ++ } else { ++ v = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daint) & ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk); ++ } ++ return (v & 0xffff); ++} ++ ++/** ++ * This function reads the Device All Endpoints Interrupt register and ++ * returns the OUT endpoint interrupt bits. ++ */ ++static inline uint32_t dwc_otg_read_dev_all_out_ep_intr(dwc_otg_core_if_t * ++ core_if) ++{ ++ uint32_t v; ++ ++ if (core_if->multiproc_int_enable) { ++ v = DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->deachint) & ++ DWC_READ_REG32(&core_if-> ++ dev_if->dev_global_regs->deachintmsk); ++ } else { ++ v = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daint) & ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->daintmsk); ++ } ++ ++ return ((v & 0xffff0000) >> 16); ++} ++ ++/** ++ * This function returns the Device IN EP Interrupt register ++ */ ++static inline uint32_t dwc_otg_read_dev_in_ep_intr(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep) ++{ ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ uint32_t v, msk, emp; ++ ++ if (core_if->multiproc_int_enable) { ++ msk = ++ DWC_READ_REG32(&dev_if-> ++ dev_global_regs->diepeachintmsk[ep->num]); ++ emp = ++ DWC_READ_REG32(&dev_if-> ++ dev_global_regs->dtknqr4_fifoemptymsk); ++ msk |= ((emp >> ep->num) & 0x1) << 7; ++ v = DWC_READ_REG32(&dev_if->in_ep_regs[ep->num]->diepint) & msk; ++ } else { ++ msk = DWC_READ_REG32(&dev_if->dev_global_regs->diepmsk); ++ emp = ++ DWC_READ_REG32(&dev_if-> ++ dev_global_regs->dtknqr4_fifoemptymsk); ++ msk |= ((emp >> ep->num) & 0x1) << 7; ++ v = DWC_READ_REG32(&dev_if->in_ep_regs[ep->num]->diepint) & msk; ++ } ++ ++ return v; ++} ++ ++/** ++ * This function returns the Device OUT EP Interrupt register ++ */ ++static inline uint32_t dwc_otg_read_dev_out_ep_intr(dwc_otg_core_if_t * ++ _core_if, dwc_ep_t * _ep) ++{ ++ dwc_otg_dev_if_t *dev_if = _core_if->dev_if; ++ uint32_t v; ++ doepmsk_data_t msk = {.d32 = 0 }; ++ ++ if (_core_if->multiproc_int_enable) { ++ msk.d32 = ++ DWC_READ_REG32(&dev_if-> ++ dev_global_regs->doepeachintmsk[_ep->num]); ++ if (_core_if->pti_enh_enable) { ++ msk.b.pktdrpsts = 1; ++ } ++ v = DWC_READ_REG32(&dev_if-> ++ out_ep_regs[_ep->num]->doepint) & msk.d32; ++ } else { ++ msk.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->doepmsk); ++ if (_core_if->pti_enh_enable) { ++ msk.b.pktdrpsts = 1; ++ } ++ v = DWC_READ_REG32(&dev_if-> ++ out_ep_regs[_ep->num]->doepint) & msk.d32; ++ } ++ return v; ++} ++ ++/** ++ * This function returns the Host All Channel Interrupt register ++ */ ++static inline uint32_t dwc_otg_read_host_all_channels_intr(dwc_otg_core_if_t * ++ _core_if) ++{ ++ return (DWC_READ_REG32(&_core_if->host_if->host_global_regs->haint)); ++} ++ ++static inline uint32_t dwc_otg_read_host_channel_intr(dwc_otg_core_if_t * ++ _core_if, dwc_hc_t * _hc) ++{ ++ return (DWC_READ_REG32 ++ (&_core_if->host_if->hc_regs[_hc->hc_num]->hcint)); ++} ++ ++/** ++ * This function returns the mode of the operation, host or device. ++ * ++ * @return 0 - Device Mode, 1 - Host Mode ++ */ ++static inline uint32_t dwc_otg_mode(dwc_otg_core_if_t * _core_if) ++{ ++ return (DWC_READ_REG32(&_core_if->core_global_regs->gintsts) & 0x1); ++} ++ ++/**@}*/ ++ ++/** ++ * DWC_otg CIL callback structure. This structure allows the HCD and ++ * PCD to register functions used for starting and stopping the PCD ++ * and HCD for role change on for a DRD. ++ */ ++typedef struct dwc_otg_cil_callbacks { ++ /** Start function for role change */ ++ int (*start) (void *_p); ++ /** Stop Function for role change */ ++ int (*stop) (void *_p); ++ /** Disconnect Function for role change */ ++ int (*disconnect) (void *_p); ++ /** Resume/Remote wakeup Function */ ++ int (*resume_wakeup) (void *_p); ++ /** Suspend function */ ++ int (*suspend) (void *_p); ++ /** Session Start (SRP) */ ++ int (*session_start) (void *_p); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ /** Sleep (switch to L0 state) */ ++ int (*sleep) (void *_p); ++#endif ++ /** Pointer passed to start() and stop() */ ++ void *p; ++} dwc_otg_cil_callbacks_t; ++ ++extern void dwc_otg_cil_register_pcd_callbacks(dwc_otg_core_if_t * _core_if, ++ dwc_otg_cil_callbacks_t * _cb, ++ void *_p); ++extern void dwc_otg_cil_register_hcd_callbacks(dwc_otg_core_if_t * _core_if, ++ dwc_otg_cil_callbacks_t * _cb, ++ void *_p); ++ ++void dwc_otg_initiate_srp(dwc_otg_core_if_t * core_if); ++ ++////////////////////////////////////////////////////////////////////// ++/** Start the HCD. Helper function for using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_start(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->start) { ++ core_if->hcd_cb->start(core_if->hcd_cb->p); ++ } ++} ++ ++/** Stop the HCD. Helper function for using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_stop(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->stop) { ++ core_if->hcd_cb->stop(core_if->hcd_cb->p); ++ } ++} ++ ++/** Disconnect the HCD. Helper function for using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_disconnect(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->disconnect) { ++ core_if->hcd_cb->disconnect(core_if->hcd_cb->p); ++ } ++} ++ ++/** Inform the HCD the a New Session has begun. Helper function for ++ * using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_session_start(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->session_start) { ++ core_if->hcd_cb->session_start(core_if->hcd_cb->p); ++ } ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++/** ++ * Inform the HCD about LPM sleep. ++ * Helper function for using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_sleep(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->sleep) { ++ core_if->hcd_cb->sleep(core_if->hcd_cb->p); ++ } ++} ++#endif ++ ++/** Resume the HCD. Helper function for using the HCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_hcd_resume(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->hcd_cb && core_if->hcd_cb->resume_wakeup) { ++ core_if->hcd_cb->resume_wakeup(core_if->hcd_cb->p); ++ } ++} ++ ++/** Start the PCD. Helper function for using the PCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_pcd_start(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->pcd_cb && core_if->pcd_cb->start) { ++ core_if->pcd_cb->start(core_if->pcd_cb->p); ++ } ++} ++ ++/** Stop the PCD. Helper function for using the PCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_pcd_stop(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->pcd_cb && core_if->pcd_cb->stop) { ++ core_if->pcd_cb->stop(core_if->pcd_cb->p); ++ } ++} ++ ++/** Suspend the PCD. Helper function for using the PCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_pcd_suspend(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->pcd_cb && core_if->pcd_cb->suspend) { ++ core_if->pcd_cb->suspend(core_if->pcd_cb->p); ++ } ++} ++ ++/** Resume the PCD. Helper function for using the PCD callbacks. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static inline void cil_pcd_resume(dwc_otg_core_if_t * core_if) ++{ ++ if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) { ++ core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p); ++ } ++} ++ ++////////////////////////////////////////////////////////////////////// ++ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1563 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_cil_intr.c $ ++ * $Revision: #32 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++/** @file ++ * ++ * The Core Interface Layer provides basic services for accessing and ++ * managing the DWC_otg hardware. These services are used by both the ++ * Host Controller Driver and the Peripheral Controller Driver. ++ * ++ * This file contains the Common Interrupt handlers. ++ */ ++#include "dwc_os.h" ++#include "dwc_otg_regs.h" ++#include "dwc_otg_cil.h" ++#include "dwc_otg_driver.h" ++#include "dwc_otg_pcd.h" ++#include "dwc_otg_hcd.h" ++ ++#ifdef DEBUG ++inline const char *op_state_str(dwc_otg_core_if_t * core_if) ++{ ++ return (core_if->op_state == A_HOST ? "a_host" : ++ (core_if->op_state == A_SUSPEND ? "a_suspend" : ++ (core_if->op_state == A_PERIPHERAL ? "a_peripheral" : ++ (core_if->op_state == B_PERIPHERAL ? "b_peripheral" : ++ (core_if->op_state == B_HOST ? "b_host" : "unknown"))))); ++} ++#endif ++ ++/** This function will log a debug message ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++int32_t dwc_otg_handle_mode_mismatch_intr(dwc_otg_core_if_t * core_if) ++{ ++ gintsts_data_t gintsts; ++ DWC_WARN("Mode Mismatch Interrupt: currently in %s mode\n", ++ dwc_otg_mode(core_if) ? "Host" : "Device"); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.modemismatch = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ return 1; ++} ++ ++/** ++ * This function handles the OTG Interrupts. It reads the OTG ++ * Interrupt Register (GOTGINT) to determine what interrupt has ++ * occurred. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++int32_t dwc_otg_handle_otg_intr(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ gotgint_data_t gotgint; ++ gotgctl_data_t gotgctl; ++ gintmsk_data_t gintmsk; ++ gpwrdn_data_t gpwrdn; ++ ++ gotgint.d32 = DWC_READ_REG32(&global_regs->gotgint); ++ gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl); ++ DWC_DEBUGPL(DBG_CIL, "++OTG Interrupt gotgint=%0x [%s]\n", gotgint.d32, ++ op_state_str(core_if)); ++ ++ if (gotgint.b.sesenddet) { ++ DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " ++ "Session End Detected++ (%s)\n", ++ op_state_str(core_if)); ++ gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl); ++ ++ if (core_if->op_state == B_HOST) { ++ cil_pcd_start(core_if); ++ core_if->op_state = B_PERIPHERAL; ++ } else { ++ /* If not B_HOST and Device HNP still set. HNP ++ * Did not succeed!*/ ++ if (gotgctl.b.devhnpen) { ++ DWC_DEBUGPL(DBG_ANY, "Session End Detected\n"); ++ __DWC_ERROR("Device Not Connected/Responding!\n"); ++ } ++ ++ /* If Session End Detected the B-Cable has ++ * been disconnected. */ ++ /* Reset PCD and Gadget driver to a ++ * clean state. */ ++ core_if->lx_state = DWC_OTG_L0; ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_pcd_stop(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ ++ if (core_if->adp_enable) { ++ if (core_if->power_down == 2) { ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs-> ++ gpwrdn, gpwrdn.d32, 0); ++ } ++ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ ++ dwc_otg_adp_sense_start(core_if); ++ } ++ } ++ ++ gotgctl.d32 = 0; ++ gotgctl.b.devhnpen = 1; ++ DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0); ++ } ++ if (gotgint.b.sesreqsucstschng) { ++ DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " ++ "Session Reqeust Success Status Change++\n"); ++ gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl); ++ if (gotgctl.b.sesreqscs) { ++ ++ if ((core_if->core_params->phy_type == ++ DWC_PHY_TYPE_PARAM_FS) && (core_if->core_params->i2c_enable)) { ++ core_if->srp_success = 1; ++ } else { ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_pcd_resume(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ /* Clear Session Request */ ++ gotgctl.d32 = 0; ++ gotgctl.b.sesreq = 1; ++ DWC_MODIFY_REG32(&global_regs->gotgctl, ++ gotgctl.d32, 0); ++ } ++ } ++ } ++ if (gotgint.b.hstnegsucstschng) { ++ /* Print statements during the HNP interrupt handling ++ * can cause it to fail.*/ ++ gotgctl.d32 = DWC_READ_REG32(&global_regs->gotgctl); ++ /* WA for 3.00a- HW is not setting cur_mode, even sometimes ++ * this does not help*/ ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) ++ dwc_udelay(100); ++ if (gotgctl.b.hstnegscs) { ++ if (dwc_otg_is_host_mode(core_if)) { ++ core_if->op_state = B_HOST; ++ /* ++ * Need to disable SOF interrupt immediately. ++ * When switching from device to host, the PCD ++ * interrupt handler won't handle the ++ * interrupt if host mode is already set. The ++ * HCD interrupt handler won't get called if ++ * the HCD state is HALT. This means that the ++ * interrupt does not get handled and Linux ++ * complains loudly. ++ */ ++ gintmsk.d32 = 0; ++ gintmsk.b.sofintr = 1; ++ DWC_MODIFY_REG32(&global_regs->gintmsk, ++ gintmsk.d32, 0); ++ /* Call callback function with spin lock released */ ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_pcd_stop(core_if); ++ /* ++ * Initialize the Core for Host mode. ++ */ ++ cil_hcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = B_HOST; ++ } ++ } else { ++ gotgctl.d32 = 0; ++ gotgctl.b.hnpreq = 1; ++ gotgctl.b.devhnpen = 1; ++ DWC_MODIFY_REG32(&global_regs->gotgctl, gotgctl.d32, 0); ++ DWC_DEBUGPL(DBG_ANY, "HNP Failed\n"); ++ __DWC_ERROR("Device Not Connected/Responding\n"); ++ } ++ } ++ if (gotgint.b.hstnegdet) { ++ /* The disconnect interrupt is set at the same time as ++ * Host Negotiation Detected. During the mode ++ * switch all interrupts are cleared so the disconnect ++ * interrupt handler will not get executed. ++ */ ++ DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " ++ "Host Negotiation Detected++ (%s)\n", ++ (dwc_otg_is_host_mode(core_if) ? "Host" : ++ "Device")); ++ if (dwc_otg_is_device_mode(core_if)) { ++ DWC_DEBUGPL(DBG_ANY, "a_suspend->a_peripheral (%d)\n", ++ core_if->op_state); ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_hcd_disconnect(core_if); ++ cil_pcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = A_PERIPHERAL; ++ } else { ++ /* ++ * Need to disable SOF interrupt immediately. When ++ * switching from device to host, the PCD interrupt ++ * handler won't handle the interrupt if host mode is ++ * already set. The HCD interrupt handler won't get ++ * called if the HCD state is HALT. This means that ++ * the interrupt does not get handled and Linux ++ * complains loudly. ++ */ ++ gintmsk.d32 = 0; ++ gintmsk.b.sofintr = 1; ++ DWC_MODIFY_REG32(&global_regs->gintmsk, gintmsk.d32, 0); ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_pcd_stop(core_if); ++ cil_hcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = A_HOST; ++ } ++ } ++ if (gotgint.b.adevtoutchng) { ++ DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " ++ "A-Device Timeout Change++\n"); ++ } ++ if (gotgint.b.debdone) { ++ DWC_DEBUGPL(DBG_ANY, " ++OTG Interrupt: " "Debounce Done++\n"); ++ } ++ ++ /* Clear GOTGINT */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gotgint, gotgint.d32); ++ ++ return 1; ++} ++ ++void w_conn_id_status_change(void *p) ++{ ++ dwc_otg_core_if_t *core_if = p; ++ uint32_t count = 0; ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ ++ gotgctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ DWC_DEBUGPL(DBG_CIL, "gotgctl=%0x\n", gotgctl.d32); ++ DWC_DEBUGPL(DBG_CIL, "gotgctl.b.conidsts=%d\n", gotgctl.b.conidsts); ++ ++ /* B-Device connector (Device Mode) */ ++ if (gotgctl.b.conidsts) { ++ /* Wait for switch to device mode. */ ++ while (!dwc_otg_is_device_mode(core_if)) { ++ DWC_PRINTF("Waiting for Peripheral Mode, Mode=%s\n", ++ (dwc_otg_is_host_mode(core_if) ? "Host" : ++ "Peripheral")); ++ dwc_mdelay(100); ++ if (++count > 10000) ++ break; ++ } ++ DWC_ASSERT(++count < 10000, ++ "Connection id status change timed out"); ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } else { ++ /* A-Device connector (Host Mode) */ ++ while (!dwc_otg_is_host_mode(core_if)) { ++ DWC_PRINTF("Waiting for Host Mode, Mode=%s\n", ++ (dwc_otg_is_host_mode(core_if) ? "Host" : ++ "Peripheral")); ++ dwc_mdelay(100); ++ if (++count > 10000) ++ break; ++ } ++ DWC_ASSERT(++count < 10000, ++ "Connection id status change timed out"); ++ core_if->op_state = A_HOST; ++ /* ++ * Initialize the Core for Host mode. ++ */ ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ } ++} ++ ++/** ++ * This function handles the Connector ID Status Change Interrupt. It ++ * reads the OTG Interrupt Register (GOTCTL) to determine whether this ++ * is a Device to Host Mode transition or a Host Mode to Device ++ * Transition. ++ * ++ * This only occurs when the cable is connected/removed from the PHY ++ * connector. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++int32_t dwc_otg_handle_conn_id_status_change_intr(dwc_otg_core_if_t * core_if) ++{ ++ ++ /* ++ * Need to disable SOF interrupt immediately. If switching from device ++ * to host, the PCD interrupt handler won't handle the interrupt if ++ * host mode is already set. The HCD interrupt handler won't get ++ * called if the HCD state is HALT. This means that the interrupt does ++ * not get handled and Linux complains loudly. ++ */ ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ gintsts_data_t gintsts = {.d32 = 0 }; ++ ++ gintmsk.b.sofintr = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32, 0); ++ ++ DWC_DEBUGPL(DBG_CIL, ++ " ++Connector ID Status Change Interrupt++ (%s)\n", ++ (dwc_otg_is_host_mode(core_if) ? "Host" : "Device")); ++ ++ DWC_SPINUNLOCK(core_if->lock); ++ ++ /* ++ * Need to schedule a work, as there are possible DELAY function calls ++ * Release lock before scheduling workq as it holds spinlock during scheduling ++ */ ++ ++ DWC_WORKQ_SCHEDULE(core_if->wq_otg, w_conn_id_status_change, ++ core_if, "connection id status change"); ++ DWC_SPINLOCK(core_if->lock); ++ ++ /* Set flag and clear interrupt */ ++ gintsts.b.conidstschng = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that a device is initiating the Session ++ * Request Protocol to request the host to turn on bus power so a new ++ * session can begin. The handler responds by turning on bus power. If ++ * the DWC_otg controller is in low power mode, the handler brings the ++ * controller out of low power mode before turning on bus power. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++int32_t dwc_otg_handle_session_req_intr(dwc_otg_core_if_t * core_if) ++{ ++ gintsts_data_t gintsts; ++ ++#ifndef DWC_HOST_ONLY ++ DWC_DEBUGPL(DBG_ANY, "++Session Request Interrupt++\n"); ++ ++ if (dwc_otg_is_device_mode(core_if)) { ++ DWC_PRINTF("SRP: Device mode\n"); ++ } else { ++ hprt0_data_t hprt0; ++ DWC_PRINTF("SRP: Host mode\n"); ++ ++ /* Turn on the port power bit. */ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ /* Start the Connection timer. So a message can be displayed ++ * if connect does not occur within 10 seconds. */ ++ cil_hcd_session_start(core_if); ++ } ++#endif ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.sessreqintr = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++void w_wakeup_detected(void *p) ++{ ++ dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) p; ++ /* ++ * Clear the Resume after 70ms. (Need 20 ms minimum. Use 70 ms ++ * so that OPT tests pass with all PHYs). ++ */ ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++#if 0 ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ /* Restart the Phy Clock */ ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ dwc_udelay(10); ++#endif //0 ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ DWC_DEBUGPL(DBG_ANY, "Resume: HPRT0=%0x\n", hprt0.d32); ++// dwc_mdelay(70); ++ hprt0.b.prtres = 0; /* Resume */ ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ DWC_DEBUGPL(DBG_ANY, "Clear Resume: HPRT0=%0x\n", ++ DWC_READ_REG32(core_if->host_if->hprt0)); ++ ++ cil_hcd_resume(core_if); ++ ++ /** Change to L0 state*/ ++ core_if->lx_state = DWC_OTG_L0; ++} ++ ++/** ++ * This interrupt indicates that the DWC_otg controller has detected a ++ * resume or remote wakeup sequence. If the DWC_otg controller is in ++ * low power mode, the handler must brings the controller out of low ++ * power mode. The controller automatically begins resume ++ * signaling. The handler schedules a time to stop resume signaling. ++ */ ++int32_t dwc_otg_handle_wakeup_detected_intr(dwc_otg_core_if_t * core_if) ++{ ++ gintsts_data_t gintsts; ++ ++ DWC_DEBUGPL(DBG_ANY, ++ "++Resume and Remote Wakeup Detected Interrupt++\n"); ++ ++ DWC_PRINTF("%s lxstate = %d\n", __func__, core_if->lx_state); ++ ++ if (dwc_otg_is_device_mode(core_if)) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ DWC_DEBUGPL(DBG_PCD, "DSTS=0x%0x\n", ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs-> ++ dsts)); ++ if (core_if->lx_state == DWC_OTG_L2) { ++#ifdef PARTIAL_POWER_DOWN ++ if (core_if->hwcfg4.b.power_optimiz) { ++ pcgcctl_data_t power = {.d32 = 0 }; ++ ++ power.d32 = DWC_READ_REG32(core_if->pcgcctl); ++ DWC_DEBUGPL(DBG_CIL, "PCGCCTL=%0x\n", ++ power.d32); ++ ++ power.b.stoppclk = 0; ++ DWC_WRITE_REG32(core_if->pcgcctl, power.d32); ++ ++ power.b.pwrclmp = 0; ++ DWC_WRITE_REG32(core_if->pcgcctl, power.d32); ++ ++ power.b.rstpdwnmodule = 0; ++ DWC_WRITE_REG32(core_if->pcgcctl, power.d32); ++ } ++#endif ++ /* Clear the Remote Wakeup Signaling */ ++ dctl.b.rmtwkupsig = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ dctl, dctl.d32, 0); ++ ++ DWC_SPINUNLOCK(core_if->lock); ++ if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) { ++ core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p); ++ } ++ DWC_SPINLOCK(core_if->lock); ++ } else { ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ lpmcfg.b.hird_thres &= (~(1 << 4)); ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, ++ lpmcfg.d32); ++ } ++ /** Change to L0 state*/ ++ core_if->lx_state = DWC_OTG_L0; ++ } else { ++ if (core_if->lx_state != DWC_OTG_L1) { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ ++ /* Restart the Phy Clock */ ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ DWC_TIMER_SCHEDULE(core_if->wkp_timer, 71); ++ } else { ++ /** Change to L0 state*/ ++ core_if->lx_state = DWC_OTG_L0; ++ } ++ } ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.wkupintr = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that the Wakeup Logic has detected a ++ * Device disconnect. ++ */ ++static int32_t dwc_otg_handle_pwrdn_disconnect_intr(dwc_otg_core_if_t *core_if) ++{ ++ gpwrdn_data_t gpwrdn = { .d32 = 0 }; ++ gpwrdn_data_t gpwrdn_temp = { .d32 = 0 }; ++ gpwrdn_temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ ++ DWC_PRINTF("%s called\n", __FUNCTION__); ++ ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++ ++ /* Switch on the voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Disable power clamps*/ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Remove reset the core signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ core_if->hibernation_suspend = 0; ++ ++ /* Disable PMU */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ if (gpwrdn_temp.b.idsts) { ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } else { ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ } ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that the Wakeup Logic has detected a ++ * remote wakeup sequence. ++ */ ++static int32_t dwc_otg_handle_pwrdn_wakeup_detected_intr(dwc_otg_core_if_t * core_if) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ DWC_DEBUGPL(DBG_ANY, ++ "++Powerdown Remote Wakeup Detected Interrupt++\n"); ++ ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++ ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (gpwrdn.b.idsts) { // Device Mode ++ if ((core_if->power_down == 2) ++ && (core_if->hibernation_suspend == 1)) { ++ dwc_otg_device_hibernation_restore(core_if, 0, 0); ++ } ++ } else { ++ if ((core_if->power_down == 2) ++ && (core_if->hibernation_suspend == 1)) { ++ dwc_otg_host_hibernation_restore(core_if, 1, 0); ++ } ++ } ++ return 1; ++} ++ ++static int32_t dwc_otg_handle_pwrdn_idsts_change(dwc_otg_device_t *otg_dev) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn_temp = {.d32 = 0 }; ++ dwc_otg_core_if_t *core_if = otg_dev->core_if; ++ ++ DWC_DEBUGPL(DBG_ANY, "%s called\n", __FUNCTION__); ++ gpwrdn_temp.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (core_if->power_down == 2) { ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++ DWC_DEBUGPL(DBG_ANY, "Exit from hibernation on ID sts change\n"); ++ /* Switch on the voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Remove reset the core signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /*Indicates that we are exiting from hibernation */ ++ core_if->hibernation_suspend = 0; ++ ++ /* Disable PMU */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ gpwrdn.d32 = core_if->gr_backup->gpwrdn_local; ++ if (gpwrdn.b.dis_vbus == 1) { ++ gpwrdn.d32 = 0; ++ gpwrdn.b.dis_vbus = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ } ++ ++ if (gpwrdn_temp.b.idsts) { ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } else { ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ } ++ } ++ ++ if (core_if->adp_enable) { ++ uint8_t is_host = 0; ++ DWC_SPINUNLOCK(core_if->lock); ++ /* Change the core_if's lock to hcd/pcd lock depend on mode? */ ++#ifndef DWC_HOST_ONLY ++ if (gpwrdn_temp.b.idsts) ++ core_if->lock = otg_dev->pcd->lock; ++#endif ++#ifndef DWC_DEVICE_ONLY ++ if (!gpwrdn_temp.b.idsts) { ++ core_if->lock = otg_dev->hcd->lock; ++ is_host = 1; ++ } ++#endif ++ DWC_PRINTF("RESTART ADP\n"); ++ if (core_if->adp.probe_enabled) ++ dwc_otg_adp_probe_stop(core_if); ++ if (core_if->adp.sense_enabled) ++ dwc_otg_adp_sense_stop(core_if); ++ if (core_if->adp.sense_timer_started) ++ DWC_TIMER_CANCEL(core_if->adp.sense_timer); ++ if (core_if->adp.vbuson_timer_started) ++ DWC_TIMER_CANCEL(core_if->adp.vbuson_timer); ++ core_if->adp.probe_timer_values[0] = -1; ++ core_if->adp.probe_timer_values[1] = -1; ++ core_if->adp.sense_timer_started = 0; ++ core_if->adp.vbuson_timer_started = 0; ++ core_if->adp.probe_counter = 0; ++ core_if->adp.gpwrdn = 0; ++ ++ /* Disable PMU and restart ADP */ ++ gpwrdn_temp.d32 = 0; ++ gpwrdn_temp.b.pmuactv = 1; ++ gpwrdn_temp.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ DWC_PRINTF("Check point 1\n"); ++ dwc_mdelay(110); ++ dwc_otg_adp_start(core_if, is_host); ++ DWC_SPINLOCK(core_if->lock); ++ } ++ ++ ++ return 1; ++} ++ ++static int32_t dwc_otg_handle_pwrdn_session_change(dwc_otg_core_if_t * core_if) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ int32_t otg_cap_param = core_if->core_params->otg_cap; ++ DWC_DEBUGPL(DBG_ANY, "%s called\n", __FUNCTION__); ++ ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (core_if->power_down == 2) { ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++ ++ if ((otg_cap_param != DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE || ++ otg_cap_param != DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE) && ++ gpwrdn.b.bsessvld == 0) { ++ /* Save gpwrdn register for further usage if stschng interrupt */ ++ core_if->gr_backup->gpwrdn_local = ++ DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ /*Exit from ISR and wait for stschng interrupt with bsessvld = 1 */ ++ return 1; ++ } ++ ++ /* Switch on the voltage to the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Remove reset the core signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /*Indicates that we are exiting from hibernation */ ++ core_if->hibernation_suspend = 0; ++ ++ /* Disable PMU */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ ++ if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE || ++ otg_cap_param == DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE) { ++ /* ++ * Initiate SRP after initial ADP probe. ++ */ ++ dwc_otg_initiate_srp(core_if); ++ } ++ } ++ ++ return 1; ++} ++/** ++ * This interrupt indicates that the Wakeup Logic has detected a ++ * status change either on IDDIG or BSessVld. ++ */ ++static uint32_t dwc_otg_handle_pwrdn_stschng_intr(dwc_otg_device_t *otg_dev) ++{ ++ int retval; ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn_temp = {.d32 = 0 }; ++ dwc_otg_core_if_t *core_if = otg_dev->core_if; ++ ++ DWC_PRINTF("%s called\n", __FUNCTION__); ++ ++ if (core_if->power_down == 2) { ++ if (core_if->hibernation_suspend <= 0) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } else ++ gpwrdn_temp.d32 = core_if->gr_backup->gpwrdn_local; ++ ++ } else { ++ gpwrdn_temp.d32 = core_if->adp.gpwrdn; ++ } ++ ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ ++ if (gpwrdn.b.idsts ^ gpwrdn_temp.b.idsts) { ++ retval = dwc_otg_handle_pwrdn_idsts_change(otg_dev); ++ } else if (gpwrdn.b.bsessvld ^ gpwrdn_temp.b.bsessvld) { ++ retval = dwc_otg_handle_pwrdn_session_change(core_if); ++ } ++ ++ return retval; ++} ++ ++/** ++ * This interrupt indicates that the Wakeup Logic has detected a ++ * SRP. ++ */ ++static int32_t dwc_otg_handle_pwrdn_srp_intr(dwc_otg_core_if_t * core_if) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ ++ DWC_PRINTF("%s called\n", __FUNCTION__); ++ ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return 1; ++ } ++#ifdef DWC_DEV_SRPCAP ++ if (core_if->pwron_timer_started) { ++ core_if->pwron_timer_started = 0; ++ DWC_TIMER_CANCEL(core_if->pwron_timer); ++ } ++#endif ++ ++ /* Switch on the voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Remove reset the core signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Indicates that we are exiting from hibernation */ ++ core_if->hibernation_suspend = 0; ++ ++ /* Disable PMU */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Programm Disable VBUS to 0 */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.dis_vbus = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /*Initialize the core as Host */ ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++ ++ return 1; ++} ++ ++/** This interrupt indicates that restore command after Hibernation ++ * was completed by the core. */ ++int32_t dwc_otg_handle_restore_done_intr(dwc_otg_core_if_t * core_if) ++{ ++ pcgcctl_data_t pcgcctl; ++ DWC_DEBUGPL(DBG_ANY, "++Restore Done Interrupt++\n"); ++ ++ //TODO De-assert restore signal. 8.a ++ pcgcctl.d32 = DWC_READ_REG32(core_if->pcgcctl); ++ if (pcgcctl.b.restoremode == 1) { ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ /* ++ * If restore mode is Remote Wakeup, ++ * unmask Remote Wakeup interrupt. ++ */ ++ gintmsk.b.wkupintr = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, ++ 0, gintmsk.d32); ++ } ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that a device has been disconnected from ++ * the root port. ++ */ ++int32_t dwc_otg_handle_disconnect_intr(dwc_otg_core_if_t * core_if) ++{ ++ gintsts_data_t gintsts; ++ ++ DWC_DEBUGPL(DBG_ANY, "++Disconnect Detected Interrupt++ (%s) %s\n", ++ (dwc_otg_is_host_mode(core_if) ? "Host" : "Device"), ++ op_state_str(core_if)); ++ ++/** @todo Consolidate this if statement. */ ++#ifndef DWC_HOST_ONLY ++ if (core_if->op_state == B_HOST) { ++ /* If in device mode Disconnect and stop the HCD, then ++ * start the PCD. */ ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_hcd_disconnect(core_if); ++ cil_pcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = B_PERIPHERAL; ++ } else if (dwc_otg_is_device_mode(core_if)) { ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ gotgctl.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gotgctl); ++ if (gotgctl.b.hstsethnpen == 1) { ++ /* Do nothing, if HNP in process the OTG ++ * interrupt "Host Negotiation Detected" ++ * interrupt will do the mode switch. ++ */ ++ } else if (gotgctl.b.devhnpen == 0) { ++ /* If in device mode Disconnect and stop the HCD, then ++ * start the PCD. */ ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_hcd_disconnect(core_if); ++ cil_pcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = B_PERIPHERAL; ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "!a_peripheral && !devhnpen\n"); ++ } ++ } else { ++ if (core_if->op_state == A_HOST) { ++ /* A-Cable still connected but device disconnected. */ ++ cil_hcd_disconnect(core_if); ++ if (core_if->adp_enable) { ++ gpwrdn_data_t gpwrdn = { .d32 = 0 }; ++ cil_hcd_stop(core_if); ++ /* Enable Power Down Logic */ ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_otg_adp_probe_start(core_if); ++ ++ /* Power off the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32 ++ (&core_if->core_global_regs->gpwrdn, ++ gpwrdn.d32, 0); ++ } ++ } ++ } ++ } ++#endif ++ /* Change to L3(OFF) state */ ++ core_if->lx_state = DWC_OTG_L3; ++ ++ gintsts.d32 = 0; ++ gintsts.b.disconnect = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that SUSPEND state has been detected on ++ * the USB. ++ * ++ * For HNP the USB Suspend interrupt signals the change from ++ * "a_peripheral" to "a_host". ++ * ++ * When power management is enabled the core will be put in low power ++ * mode. ++ */ ++int32_t dwc_otg_handle_usb_suspend_intr(dwc_otg_core_if_t * core_if) ++{ ++ dsts_data_t dsts; ++ gintsts_data_t gintsts; ++ dcfg_data_t dcfg; ++ ++ DWC_DEBUGPL(DBG_ANY, "USB SUSPEND\n"); ++ ++ if (dwc_otg_is_device_mode(core_if)) { ++ /* Check the Device status register to determine if the Suspend ++ * state is active. */ ++ dsts.d32 = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ DWC_DEBUGPL(DBG_PCD, "DSTS=0x%0x\n", dsts.d32); ++ DWC_DEBUGPL(DBG_PCD, "DSTS.Suspend Status=%d " ++ "HWCFG4.power Optimize=%d\n", ++ dsts.b.suspsts, core_if->hwcfg4.b.power_optimiz); ++ ++#ifdef PARTIAL_POWER_DOWN ++/** @todo Add a module parameter for power management. */ ++ ++ if (dsts.b.suspsts && core_if->hwcfg4.b.power_optimiz) { ++ pcgcctl_data_t power = {.d32 = 0 }; ++ DWC_DEBUGPL(DBG_CIL, "suspend\n"); ++ ++ power.b.pwrclmp = 1; ++ DWC_WRITE_REG32(core_if->pcgcctl, power.d32); ++ ++ power.b.rstpdwnmodule = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, power.d32); ++ ++ power.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, power.d32); ++ ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "disconnect?\n"); ++ } ++#endif ++ /* PCD callback for suspend. Release the lock inside of callback function */ ++ cil_pcd_suspend(core_if); ++ if (core_if->power_down == 2) ++ { ++ dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ DWC_DEBUGPL(DBG_ANY,"lx_state = %08x\n",core_if->lx_state); ++ DWC_DEBUGPL(DBG_ANY," device address = %08d\n",dcfg.b.devaddr); ++ ++ if (core_if->lx_state != DWC_OTG_L3 && dcfg.b.devaddr) { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ gusbcfg_data_t gusbcfg = {.d32 = 0 }; ++ ++ /* Change to L2(suspend) state */ ++ core_if->lx_state = DWC_OTG_L2; ++ ++ /* Clear interrupt in gintsts */ ++ gintsts.d32 = 0; ++ gintsts.b.usbsuspend = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs-> ++ gintsts, gintsts.d32); ++ DWC_PRINTF("Start of hibernation completed\n"); ++ dwc_otg_save_global_regs(core_if); ++ dwc_otg_save_dev_regs(core_if); ++ ++ gusbcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs-> ++ gusbcfg); ++ if (gusbcfg.b.ulpi_utmi_sel == 1) { ++ /* ULPI interface */ ++ /* Suspend the Phy Clock */ ++ pcgcctl.d32 = 0; ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, ++ pcgcctl.d32); ++ dwc_udelay(10); ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ } else { ++ /* UTMI+ Interface */ ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, ++ pcgcctl.d32); ++ dwc_udelay(10); ++ } ++ ++ /* Set flag to indicate that we are in hibernation */ ++ core_if->hibernation_suspend = 1; ++ /* Enable interrupts from wake up logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Unmask device mode interrupts in GPWRDN */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.rst_det_msk = 1; ++ gpwrdn.b.lnstchng_msk = 1; ++ gpwrdn.b.sts_chngint_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Enable Power Down Clamp */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Switch off VDD */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ ++ /* Save gpwrdn register for further usage if stschng interrupt */ ++ core_if->gr_backup->gpwrdn_local = ++ DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ DWC_PRINTF("Hibernation completed\n"); ++ ++ return 1; ++ } ++ } else if (core_if->power_down == 3) { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ dcfg.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dcfg); ++ DWC_DEBUGPL(DBG_ANY, "lx_state = %08x\n",core_if->lx_state); ++ DWC_DEBUGPL(DBG_ANY, " device address = %08d\n",dcfg.b.devaddr); ++ ++ if (core_if->lx_state != DWC_OTG_L3 && dcfg.b.devaddr) { ++ DWC_DEBUGPL(DBG_ANY, "Start entering to extended hibernation\n"); ++ core_if->xhib = 1; ++ ++ /* Clear interrupt in gintsts */ ++ gintsts.d32 = 0; ++ gintsts.b.usbsuspend = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs-> ++ gintsts, gintsts.d32); ++ ++ dwc_otg_save_global_regs(core_if); ++ dwc_otg_save_dev_regs(core_if); ++ ++ /* Wait for 10 PHY clocks */ ++ dwc_udelay(10); ++ ++ /* Program GPIO register while entering to xHib */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->ggpio, 0x1); ++ ++ pcgcctl.b.enbl_extnd_hiber = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ ++ pcgcctl.d32 = 0; ++ pcgcctl.b.extnd_hiber_pwrclmp = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ ++ pcgcctl.d32 = 0; ++ pcgcctl.b.extnd_hiber_switch = 1; ++ core_if->gr_backup->xhib_gpwrdn = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ core_if->gr_backup->xhib_pcgcctl = DWC_READ_REG32(core_if->pcgcctl) | pcgcctl.d32; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ ++ DWC_DEBUGPL(DBG_ANY, "Finished entering to extended hibernation\n"); ++ ++ return 1; ++ } ++ } ++ } else { ++ if (core_if->op_state == A_PERIPHERAL) { ++ DWC_DEBUGPL(DBG_ANY, "a_peripheral->a_host\n"); ++ /* Clear the a_peripheral flag, back to a_host. */ ++ DWC_SPINUNLOCK(core_if->lock); ++ cil_pcd_stop(core_if); ++ cil_hcd_start(core_if); ++ DWC_SPINLOCK(core_if->lock); ++ core_if->op_state = A_HOST; ++ } ++ } ++ ++ /* Change to L2(suspend) state */ ++ core_if->lx_state = DWC_OTG_L2; ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.usbsuspend = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++static int32_t dwc_otg_handle_xhib_exit_intr(dwc_otg_core_if_t * core_if) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ gahbcfg_data_t gahbcfg = {.d32 = 0 }; ++ ++ dwc_udelay(10); ++ ++ /* Program GPIO register while entering to xHib */ ++ DWC_WRITE_REG32(&core_if->core_global_regs->ggpio, 0x0); ++ ++ pcgcctl.d32 = core_if->gr_backup->xhib_pcgcctl; ++ pcgcctl.b.extnd_hiber_pwrclmp = 0; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ dwc_udelay(10); ++ ++ gpwrdn.d32 = core_if->gr_backup->xhib_gpwrdn; ++ gpwrdn.b.restore = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ restore_lpm_i2c_regs(core_if); ++ ++ pcgcctl.d32 = core_if->gr_backup->pcgcctl_local & (0x3FFFF << 14); ++ pcgcctl.b.max_xcvrselect = 1; ++ pcgcctl.b.ess_reg_restored = 0; ++ pcgcctl.b.extnd_hiber_switch = 0; ++ pcgcctl.b.extnd_hiber_pwrclmp = 0; ++ pcgcctl.b.enbl_extnd_hiber = 1; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ ++ gahbcfg.d32 = core_if->gr_backup->gahbcfg_local; ++ gahbcfg.b.glblintrmsk = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gahbcfg, gahbcfg.d32); ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, 0xFFFFFFFF); ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, 0x1 << 16); ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, ++ core_if->gr_backup->gusbcfg_local); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, ++ core_if->dr_backup->dcfg); ++ ++ pcgcctl.d32 = 0; ++ pcgcctl.d32 = core_if->gr_backup->pcgcctl_local & (0x3FFFF << 14); ++ pcgcctl.b.max_xcvrselect = 1; ++ pcgcctl.d32 |= 0x608; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ dwc_udelay(10); ++ ++ pcgcctl.d32 = 0; ++ pcgcctl.d32 = core_if->gr_backup->pcgcctl_local & (0x3FFFF << 14); ++ pcgcctl.b.max_xcvrselect = 1; ++ pcgcctl.b.ess_reg_restored = 1; ++ pcgcctl.b.enbl_extnd_hiber = 1; ++ pcgcctl.b.rstpdwnmodule = 1; ++ pcgcctl.b.restoremode = 1; ++ DWC_WRITE_REG32(core_if->pcgcctl, pcgcctl.d32); ++ ++ DWC_DEBUGPL(DBG_ANY, "%s called\n", __FUNCTION__); ++ ++ return 1; ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++/** ++ * This function hadles LPM transaction received interrupt. ++ */ ++static int32_t dwc_otg_handle_lpm_intr(dwc_otg_core_if_t * core_if) ++{ ++ glpmcfg_data_t lpmcfg; ++ gintsts_data_t gintsts; ++ ++ if (!core_if->core_params->lpm_enable) { ++ DWC_PRINTF("Unexpected LPM interrupt\n"); ++ } ++ ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ DWC_PRINTF("LPM config register = 0x%08x\n", lpmcfg.d32); ++ ++ if (dwc_otg_is_host_mode(core_if)) { ++ cil_hcd_sleep(core_if); ++ } else { ++ lpmcfg.b.hird_thres |= (1 << 4); ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, ++ lpmcfg.d32); ++ } ++ ++ /* Examine prt_sleep_sts after TL1TokenTetry period max (10 us) */ ++ dwc_udelay(10); ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ if (lpmcfg.b.prt_sleep_sts) { ++ /* Save the current state */ ++ core_if->lx_state = DWC_OTG_L1; ++ } ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.lpmtranrcvd = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ return 1; ++} ++#endif /* CONFIG_USB_DWC_OTG_LPM */ ++ ++/** ++ * This function returns the Core Interrupt register. ++ */ ++static inline uint32_t dwc_otg_read_common_intr(dwc_otg_core_if_t * core_if) ++{ ++ gahbcfg_data_t gahbcfg = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ gintmsk_data_t gintmsk; ++ gintmsk_data_t gintmsk_common = {.d32 = 0 }; ++ gintmsk_common.b.wkupintr = 1; ++ gintmsk_common.b.sessreqintr = 1; ++ gintmsk_common.b.conidstschng = 1; ++ gintmsk_common.b.otgintr = 1; ++ gintmsk_common.b.modemismatch = 1; ++ gintmsk_common.b.disconnect = 1; ++ gintmsk_common.b.usbsuspend = 1; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ gintmsk_common.b.lpmtranrcvd = 1; ++#endif ++ gintmsk_common.b.restoredone = 1; ++ /** @todo: The port interrupt occurs while in device ++ * mode. Added code to CIL to clear the interrupt for now! ++ */ ++ gintmsk_common.b.portintr = 1; ++ ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ gahbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg); ++ ++#ifdef DEBUG ++ /* if any common interrupts set */ ++ if (gintsts.d32 & gintmsk_common.d32) { ++ DWC_DEBUGPL(DBG_ANY, "gintsts=%08x gintmsk=%08x\n", ++ gintsts.d32, gintmsk.d32); ++ } ++#endif ++ if (gahbcfg.b.glblintrmsk) ++ return ((gintsts.d32 & gintmsk.d32) & gintmsk_common.d32); ++ else ++ return 0; ++ ++} ++ ++/* MACRO for clearing interupt bits in GPWRDN register */ ++#define CLEAR_GPWRDN_INTR(__core_if,__intr) \ ++do { \ ++ gpwrdn_data_t gpwrdn = {.d32=0}; \ ++ gpwrdn.b.__intr = 1; \ ++ DWC_MODIFY_REG32(&__core_if->core_global_regs->gpwrdn, \ ++ 0, gpwrdn.d32); \ ++} while (0) ++ ++/** ++ * Common interrupt handler. ++ * ++ * The common interrupts are those that occur in both Host and Device mode. ++ * This handler handles the following interrupts: ++ * - Mode Mismatch Interrupt ++ * - Disconnect Interrupt ++ * - OTG Interrupt ++ * - Connector ID Status Change Interrupt ++ * - Session Request Interrupt. ++ * - Resume / Remote Wakeup Detected Interrupt. ++ * - LPM Transaction Received Interrupt ++ * - ADP Transaction Received Interrupt ++ * ++ */ ++int32_t dwc_otg_handle_common_intr(void *dev) ++{ ++ int retval = 0; ++ gintsts_data_t gintsts; ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ dwc_otg_device_t *otg_dev = dev; ++ dwc_otg_core_if_t *core_if = otg_dev->core_if; ++ gpwrdn.d32 = DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ if (dwc_otg_is_device_mode(core_if)) ++ core_if->frame_num = dwc_otg_get_frame_number(core_if); ++ ++ if (core_if->lock) ++ DWC_SPINLOCK(core_if->lock); ++ ++ if (core_if->power_down == 3 && core_if->xhib == 1) { ++ DWC_DEBUGPL(DBG_ANY, "Exiting from xHIB state\n"); ++ retval |= dwc_otg_handle_xhib_exit_intr(core_if); ++ core_if->xhib = 2; ++ if (core_if->lock) ++ DWC_SPINUNLOCK(core_if->lock); ++ ++ return retval; ++ } ++ ++ if (core_if->hibernation_suspend <= 0) { ++ gintsts.d32 = dwc_otg_read_common_intr(core_if); ++ ++ if (gintsts.b.modemismatch) { ++ retval |= dwc_otg_handle_mode_mismatch_intr(core_if); ++ } ++ if (gintsts.b.otgintr) { ++ retval |= dwc_otg_handle_otg_intr(core_if); ++ } ++ if (gintsts.b.conidstschng) { ++ retval |= ++ dwc_otg_handle_conn_id_status_change_intr(core_if); ++ } ++ if (gintsts.b.disconnect) { ++ retval |= dwc_otg_handle_disconnect_intr(core_if); ++ } ++ if (gintsts.b.sessreqintr) { ++ retval |= dwc_otg_handle_session_req_intr(core_if); ++ } ++ if (gintsts.b.wkupintr) { ++ retval |= dwc_otg_handle_wakeup_detected_intr(core_if); ++ } ++ if (gintsts.b.usbsuspend) { ++ retval |= dwc_otg_handle_usb_suspend_intr(core_if); ++ } ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ if (gintsts.b.lpmtranrcvd) { ++ retval |= dwc_otg_handle_lpm_intr(core_if); ++ } ++#endif ++ if (gintsts.b.restoredone) { ++ gintsts.d32 = 0; ++ if (core_if->power_down == 2) ++ core_if->hibernation_suspend = -1; ++ else if (core_if->power_down == 3 && core_if->xhib == 2) { ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ dctl_data_t dctl = {.d32 = 0 }; ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs-> ++ gintsts, 0xFFFFFFFF); ++ ++ DWC_DEBUGPL(DBG_ANY, ++ "RESTORE DONE generated\n"); ++ ++ gpwrdn.b.restore = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ pcgcctl.b.rstpdwnmodule = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gusbcfg, core_if->gr_backup->gusbcfg_local); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dcfg, core_if->dr_backup->dcfg); ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, core_if->dr_backup->dctl); ++ dwc_udelay(50); ++ ++ dctl.b.pwronprgdone = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ dwc_udelay(10); ++ ++ dwc_otg_restore_global_regs(core_if); ++ dwc_otg_restore_dev_regs(core_if, 0); ++ ++ dctl.d32 = 0; ++ dctl.b.pwronprgdone = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, 0); ++ dwc_udelay(10); ++ ++ pcgcctl.d32 = 0; ++ pcgcctl.b.enbl_extnd_hiber = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ ++ /* The core will be in ON STATE */ ++ core_if->lx_state = DWC_OTG_L0; ++ core_if->xhib = 0; ++ ++ DWC_SPINUNLOCK(core_if->lock); ++ if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) { ++ core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p); ++ } ++ DWC_SPINLOCK(core_if->lock); ++ ++ } ++ ++ gintsts.b.restoredone = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,gintsts.d32); ++ DWC_PRINTF(" --Restore done interrupt received-- \n"); ++ retval |= 1; ++ } ++ if (gintsts.b.portintr && dwc_otg_is_device_mode(core_if)) { ++ /* The port interrupt occurs while in device mode with HPRT0 ++ * Port Enable/Disable. ++ */ ++ gintsts.d32 = 0; ++ gintsts.b.portintr = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,gintsts.d32); ++ retval |= 1; ++ ++ } ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "gpwrdn=%08x\n", gpwrdn.d32); ++ ++ if (gpwrdn.b.disconn_det && gpwrdn.b.disconn_det_msk) { ++ CLEAR_GPWRDN_INTR(core_if, disconn_det); ++ if (gpwrdn.b.linestate == 0) { ++ dwc_otg_handle_pwrdn_disconnect_intr(core_if); ++ } else { ++ DWC_PRINTF("Disconnect detected while linestate is not 0\n"); ++ } ++ ++ retval |= 1; ++ } ++ if (gpwrdn.b.lnstschng && gpwrdn.b.lnstchng_msk) { ++ CLEAR_GPWRDN_INTR(core_if, lnstschng); ++ /* remote wakeup from hibernation */ ++ if (gpwrdn.b.linestate == 2 || gpwrdn.b.linestate == 1) { ++ dwc_otg_handle_pwrdn_wakeup_detected_intr(core_if); ++ } else { ++ DWC_PRINTF("gpwrdn.linestate = %d\n", gpwrdn.b.linestate); ++ } ++ retval |= 1; ++ } ++ if (gpwrdn.b.rst_det && gpwrdn.b.rst_det_msk) { ++ CLEAR_GPWRDN_INTR(core_if, rst_det); ++ if (gpwrdn.b.linestate == 0) { ++ DWC_PRINTF("Reset detected\n"); ++ retval |= dwc_otg_device_hibernation_restore(core_if, 0, 1); ++ } ++ } ++ if (gpwrdn.b.srp_det && gpwrdn.b.srp_det_msk) { ++ CLEAR_GPWRDN_INTR(core_if, srp_det); ++ dwc_otg_handle_pwrdn_srp_intr(core_if); ++ retval |= 1; ++ } ++ } ++ /* Handle ADP interrupt here */ ++ if (gpwrdn.b.adp_int) { ++ DWC_PRINTF("ADP interrupt\n"); ++ CLEAR_GPWRDN_INTR(core_if, adp_int); ++ dwc_otg_adp_handle_intr(core_if); ++ retval |= 1; ++ } ++ if (gpwrdn.b.sts_chngint && gpwrdn.b.sts_chngint_msk) { ++ DWC_PRINTF("STS CHNG interrupt asserted\n"); ++ CLEAR_GPWRDN_INTR(core_if, sts_chngint); ++ dwc_otg_handle_pwrdn_stschng_intr(otg_dev); ++ ++ retval |= 1; ++ } ++ if (core_if->lock) ++ DWC_SPINUNLOCK(core_if->lock); ++ ++ return retval; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_core_if.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_core_if.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,705 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_core_if.h $ ++ * $Revision: #13 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#if !defined(__DWC_CORE_IF_H__) ++#define __DWC_CORE_IF_H__ ++ ++#include "dwc_os.h" ++ ++/** @file ++ * This file defines DWC_OTG Core API ++ */ ++ ++struct dwc_otg_core_if; ++typedef struct dwc_otg_core_if dwc_otg_core_if_t; ++ ++/** Maximum number of Periodic FIFOs */ ++#define MAX_PERIO_FIFOS 15 ++/** Maximum number of Periodic FIFOs */ ++#define MAX_TX_FIFOS 15 ++ ++/** Maximum number of Endpoints/HostChannels */ ++#define MAX_EPS_CHANNELS 16 ++ ++extern dwc_otg_core_if_t *dwc_otg_cil_init(const uint32_t * _reg_base_addr); ++extern void dwc_otg_core_init(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_cil_remove(dwc_otg_core_if_t * _core_if); ++ ++extern void dwc_otg_enable_global_interrupts(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_disable_global_interrupts(dwc_otg_core_if_t * _core_if); ++ ++extern uint8_t dwc_otg_is_device_mode(dwc_otg_core_if_t * _core_if); ++extern uint8_t dwc_otg_is_host_mode(dwc_otg_core_if_t * _core_if); ++ ++extern uint8_t dwc_otg_is_dma_enable(dwc_otg_core_if_t * core_if); ++ ++/** This function should be called on every hardware interrupt. */ ++extern int32_t dwc_otg_handle_common_intr(void *otg_dev); ++ ++/** @name OTG Core Parameters */ ++/** @{ */ ++ ++/** ++ * Specifies the OTG capabilities. The driver will automatically ++ * detect the value for this parameter if none is specified. ++ * 0 - HNP and SRP capable (default) ++ * 1 - SRP Only capable ++ * 2 - No HNP/SRP capable ++ */ ++extern int dwc_otg_set_param_otg_cap(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_otg_cap(dwc_otg_core_if_t * core_if); ++#define DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE 0 ++#define DWC_OTG_CAP_PARAM_SRP_ONLY_CAPABLE 1 ++#define DWC_OTG_CAP_PARAM_NO_HNP_SRP_CAPABLE 2 ++#define dwc_param_otg_cap_default DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE ++ ++extern int dwc_otg_set_param_opt(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_opt(dwc_otg_core_if_t * core_if); ++#define dwc_param_opt_default 1 ++ ++/** ++ * Specifies whether to use slave or DMA mode for accessing the data ++ * FIFOs. The driver will automatically detect the value for this ++ * parameter if none is specified. ++ * 0 - Slave ++ * 1 - DMA (default, if available) ++ */ ++extern int dwc_otg_set_param_dma_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dma_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_dma_enable_default 1 ++ ++/** ++ * When DMA mode is enabled specifies whether to use ++ * address DMA or DMA Descritor mode for accessing the data ++ * FIFOs in device mode. The driver will automatically detect ++ * the value for this parameter if none is specified. ++ * 0 - address DMA ++ * 1 - DMA Descriptor(default, if available) ++ */ ++extern int dwc_otg_set_param_dma_desc_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dma_desc_enable(dwc_otg_core_if_t * core_if); ++//#define dwc_param_dma_desc_enable_default 1 ++#define dwc_param_dma_desc_enable_default 0 // Broadcom BCM2708 ++ ++/** The DMA Burst size (applicable only for External DMA ++ * Mode). 1, 4, 8 16, 32, 64, 128, 256 (default 32) ++ */ ++extern int dwc_otg_set_param_dma_burst_size(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dma_burst_size(dwc_otg_core_if_t * core_if); ++#define dwc_param_dma_burst_size_default 32 ++ ++/** ++ * Specifies the maximum speed of operation in host and device mode. ++ * The actual speed depends on the speed of the attached device and ++ * the value of phy_type. The actual speed depends on the speed of the ++ * attached device. ++ * 0 - High Speed (default) ++ * 1 - Full Speed ++ */ ++extern int dwc_otg_set_param_speed(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_speed(dwc_otg_core_if_t * core_if); ++#define dwc_param_speed_default 0 ++#define DWC_SPEED_PARAM_HIGH 0 ++#define DWC_SPEED_PARAM_FULL 1 ++ ++/** Specifies whether low power mode is supported when attached ++ * to a Full Speed or Low Speed device in host mode. ++ * 0 - Don't support low power mode (default) ++ * 1 - Support low power mode ++ */ ++extern int dwc_otg_set_param_host_support_fs_ls_low_power(dwc_otg_core_if_t * ++ core_if, int32_t val); ++extern int32_t dwc_otg_get_param_host_support_fs_ls_low_power(dwc_otg_core_if_t ++ * core_if); ++#define dwc_param_host_support_fs_ls_low_power_default 0 ++ ++/** Specifies the PHY clock rate in low power mode when connected to a ++ * Low Speed device in host mode. This parameter is applicable only if ++ * HOST_SUPPORT_FS_LS_LOW_POWER is enabled. If PHY_TYPE is set to FS ++ * then defaults to 6 MHZ otherwise 48 MHZ. ++ * ++ * 0 - 48 MHz ++ * 1 - 6 MHz ++ */ ++extern int dwc_otg_set_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * ++ core_if, int32_t val); ++extern int32_t dwc_otg_get_param_host_ls_low_power_phy_clk(dwc_otg_core_if_t * ++ core_if); ++#define dwc_param_host_ls_low_power_phy_clk_default 0 ++#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_48MHZ 0 ++#define DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ 1 ++ ++/** ++ * 0 - Use cC FIFO size parameters ++ * 1 - Allow dynamic FIFO sizing (default) ++ */ ++extern int dwc_otg_set_param_enable_dynamic_fifo(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_enable_dynamic_fifo(dwc_otg_core_if_t * ++ core_if); ++#define dwc_param_enable_dynamic_fifo_default 1 ++ ++/** Total number of 4-byte words in the data FIFO memory. This ++ * memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic ++ * Tx FIFOs. ++ * 32 to 32768 (default 8192) ++ * Note: The total FIFO memory depth in the FPGA configuration is 8192. ++ */ ++extern int dwc_otg_set_param_data_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_data_fifo_size(dwc_otg_core_if_t * core_if); ++//#define dwc_param_data_fifo_size_default 8192 ++#define dwc_param_data_fifo_size_default 0xFF0 // Broadcom BCM2708 ++ ++/** Number of 4-byte words in the Rx FIFO in device mode when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1064) ++ */ ++extern int dwc_otg_set_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dev_rx_fifo_size(dwc_otg_core_if_t * core_if); ++#define dwc_param_dev_rx_fifo_size_default 1064 ++ ++/** Number of 4-byte words in the non-periodic Tx FIFO in device mode ++ * when dynamic FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++extern int dwc_otg_set_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if, int32_t val); ++extern int32_t dwc_otg_get_param_dev_nperio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if); ++#define dwc_param_dev_nperio_tx_fifo_size_default 1024 ++ ++/** Number of 4-byte words in each of the periodic Tx FIFOs in device ++ * mode when dynamic FIFO sizing is enabled. ++ * 4 to 768 (default 256) ++ */ ++extern int dwc_otg_set_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val, int fifo_num); ++extern int32_t dwc_otg_get_param_dev_perio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if, int fifo_num); ++#define dwc_param_dev_perio_tx_fifo_size_default 256 ++ ++/** Number of 4-byte words in the Rx FIFO in host mode when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++extern int dwc_otg_set_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_host_rx_fifo_size(dwc_otg_core_if_t * core_if); ++//#define dwc_param_host_rx_fifo_size_default 1024 ++#define dwc_param_host_rx_fifo_size_default 774 // Broadcom BCM2708 ++ ++/** Number of 4-byte words in the non-periodic Tx FIFO in host mode ++ * when Dynamic FIFO sizing is enabled in the core. ++ * 16 to 32768 (default 1024) ++ */ ++extern int dwc_otg_set_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if, int32_t val); ++extern int32_t dwc_otg_get_param_host_nperio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if); ++//#define dwc_param_host_nperio_tx_fifo_size_default 1024 ++#define dwc_param_host_nperio_tx_fifo_size_default 0x100 // Broadcom BCM2708 ++ ++/** Number of 4-byte words in the host periodic Tx FIFO when dynamic ++ * FIFO sizing is enabled. ++ * 16 to 32768 (default 1024) ++ */ ++extern int dwc_otg_set_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if, int32_t val); ++extern int32_t dwc_otg_get_param_host_perio_tx_fifo_size(dwc_otg_core_if_t * ++ core_if); ++//#define dwc_param_host_perio_tx_fifo_size_default 1024 ++#define dwc_param_host_perio_tx_fifo_size_default 0x200 // Broadcom BCM2708 ++ ++/** The maximum transfer size supported in bytes. ++ * 2047 to 65,535 (default 65,535) ++ */ ++extern int dwc_otg_set_param_max_transfer_size(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_max_transfer_size(dwc_otg_core_if_t * core_if); ++#define dwc_param_max_transfer_size_default 65535 ++ ++/** The maximum number of packets in a transfer. ++ * 15 to 511 (default 511) ++ */ ++extern int dwc_otg_set_param_max_packet_count(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_max_packet_count(dwc_otg_core_if_t * core_if); ++#define dwc_param_max_packet_count_default 511 ++ ++/** The number of host channel registers to use. ++ * 1 to 16 (default 12) ++ * Note: The FPGA configuration supports a maximum of 12 host channels. ++ */ ++extern int dwc_otg_set_param_host_channels(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_host_channels(dwc_otg_core_if_t * core_if); ++//#define dwc_param_host_channels_default 12 ++#define dwc_param_host_channels_default 8 // Broadcom BCM2708 ++ ++/** The number of endpoints in addition to EP0 available for device ++ * mode operations. ++ * 1 to 15 (default 6 IN and OUT) ++ * Note: The FPGA configuration supports a maximum of 6 IN and OUT ++ * endpoints in addition to EP0. ++ */ ++extern int dwc_otg_set_param_dev_endpoints(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dev_endpoints(dwc_otg_core_if_t * core_if); ++#define dwc_param_dev_endpoints_default 6 ++ ++/** ++ * Specifies the type of PHY interface to use. By default, the driver ++ * will automatically detect the phy_type. ++ * ++ * 0 - Full Speed PHY ++ * 1 - UTMI+ (default) ++ * 2 - ULPI ++ */ ++extern int dwc_otg_set_param_phy_type(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_phy_type(dwc_otg_core_if_t * core_if); ++#define DWC_PHY_TYPE_PARAM_FS 0 ++#define DWC_PHY_TYPE_PARAM_UTMI 1 ++#define DWC_PHY_TYPE_PARAM_ULPI 2 ++#define dwc_param_phy_type_default DWC_PHY_TYPE_PARAM_UTMI ++ ++/** ++ * Specifies the UTMI+ Data Width. This parameter is ++ * applicable for a PHY_TYPE of UTMI+ or ULPI. (For a ULPI ++ * PHY_TYPE, this parameter indicates the data width between ++ * the MAC and the ULPI Wrapper.) Also, this parameter is ++ * applicable only if the OTG_HSPHY_WIDTH cC parameter was set ++ * to "8 and 16 bits", meaning that the core has been ++ * configured to work at either data path width. ++ * ++ * 8 or 16 bits (default 16) ++ */ ++extern int dwc_otg_set_param_phy_utmi_width(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_phy_utmi_width(dwc_otg_core_if_t * core_if); ++//#define dwc_param_phy_utmi_width_default 16 ++#define dwc_param_phy_utmi_width_default 8 // Broadcom BCM2708 ++ ++/** ++ * Specifies whether the ULPI operates at double or single ++ * data rate. This parameter is only applicable if PHY_TYPE is ++ * ULPI. ++ * ++ * 0 - single data rate ULPI interface with 8 bit wide data ++ * bus (default) ++ * 1 - double data rate ULPI interface with 4 bit wide data ++ * bus ++ */ ++extern int dwc_otg_set_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_phy_ulpi_ddr(dwc_otg_core_if_t * core_if); ++#define dwc_param_phy_ulpi_ddr_default 0 ++ ++/** ++ * Specifies whether to use the internal or external supply to ++ * drive the vbus with a ULPI phy. ++ */ ++extern int dwc_otg_set_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_phy_ulpi_ext_vbus(dwc_otg_core_if_t * core_if); ++#define DWC_PHY_ULPI_INTERNAL_VBUS 0 ++#define DWC_PHY_ULPI_EXTERNAL_VBUS 1 ++#define dwc_param_phy_ulpi_ext_vbus_default DWC_PHY_ULPI_INTERNAL_VBUS ++ ++/** ++ * Specifies whether to use the I2Cinterface for full speed PHY. This ++ * parameter is only applicable if PHY_TYPE is FS. ++ * 0 - No (default) ++ * 1 - Yes ++ */ ++extern int dwc_otg_set_param_i2c_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_i2c_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_i2c_enable_default 0 ++ ++extern int dwc_otg_set_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_ulpi_fs_ls(dwc_otg_core_if_t * core_if); ++#define dwc_param_ulpi_fs_ls_default 0 ++ ++extern int dwc_otg_set_param_ts_dline(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_ts_dline(dwc_otg_core_if_t * core_if); ++#define dwc_param_ts_dline_default 0 ++ ++/** ++ * Specifies whether dedicated transmit FIFOs are ++ * enabled for non periodic IN endpoints in device mode ++ * 0 - No ++ * 1 - Yes ++ */ ++extern int dwc_otg_set_param_en_multiple_tx_fifo(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_en_multiple_tx_fifo(dwc_otg_core_if_t * ++ core_if); ++#define dwc_param_en_multiple_tx_fifo_default 1 ++ ++/** Number of 4-byte words in each of the Tx FIFOs in device ++ * mode when dynamic FIFO sizing is enabled. ++ * 4 to 768 (default 256) ++ */ ++extern int dwc_otg_set_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int fifo_num, int32_t val); ++extern int32_t dwc_otg_get_param_dev_tx_fifo_size(dwc_otg_core_if_t * core_if, ++ int fifo_num); ++#define dwc_param_dev_tx_fifo_size_default 768 ++ ++/** Thresholding enable flag- ++ * bit 0 - enable non-ISO Tx thresholding ++ * bit 1 - enable ISO Tx thresholding ++ * bit 2 - enable Rx thresholding ++ */ ++extern int dwc_otg_set_param_thr_ctl(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_thr_ctl(dwc_otg_core_if_t * core_if, int fifo_num); ++#define dwc_param_thr_ctl_default 0 ++ ++/** Thresholding length for Tx ++ * FIFOs in 32 bit DWORDs ++ */ ++extern int dwc_otg_set_param_tx_thr_length(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_tx_thr_length(dwc_otg_core_if_t * core_if); ++#define dwc_param_tx_thr_length_default 64 ++ ++/** Thresholding length for Rx ++ * FIFOs in 32 bit DWORDs ++ */ ++extern int dwc_otg_set_param_rx_thr_length(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_rx_thr_length(dwc_otg_core_if_t * core_if); ++#define dwc_param_rx_thr_length_default 64 ++ ++/** ++ * Specifies whether LPM (Link Power Management) support is enabled ++ */ ++extern int dwc_otg_set_param_lpm_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_lpm_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_lpm_enable_default 1 ++ ++/** ++ * Specifies whether PTI enhancement is enabled ++ */ ++extern int dwc_otg_set_param_pti_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_pti_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_pti_enable_default 0 ++ ++/** ++ * Specifies whether MPI enhancement is enabled ++ */ ++extern int dwc_otg_set_param_mpi_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_mpi_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_mpi_enable_default 0 ++ ++/** ++ * Specifies whether ADP capability is enabled ++ */ ++extern int dwc_otg_set_param_adp_enable(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_adp_enable(dwc_otg_core_if_t * core_if); ++#define dwc_param_adp_enable_default 0 ++ ++/** ++ * Specifies whether IC_USB capability is enabled ++ */ ++ ++extern int dwc_otg_set_param_ic_usb_cap(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_ic_usb_cap(dwc_otg_core_if_t * core_if); ++#define dwc_param_ic_usb_cap_default 0 ++ ++extern int dwc_otg_set_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_ahb_thr_ratio(dwc_otg_core_if_t * core_if); ++#define dwc_param_ahb_thr_ratio_default 0 ++ ++extern int dwc_otg_set_param_power_down(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_power_down(dwc_otg_core_if_t * core_if); ++#define dwc_param_power_down_default 0 ++ ++extern int dwc_otg_set_param_reload_ctl(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_reload_ctl(dwc_otg_core_if_t * core_if); ++#define dwc_param_reload_ctl_default 0 ++ ++extern int dwc_otg_set_param_dev_out_nak(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_dev_out_nak(dwc_otg_core_if_t * core_if); ++#define dwc_param_dev_out_nak_default 0 ++ ++extern int dwc_otg_set_param_cont_on_bna(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_cont_on_bna(dwc_otg_core_if_t * core_if); ++#define dwc_param_cont_on_bna_default 0 ++ ++extern int dwc_otg_set_param_ahb_single(dwc_otg_core_if_t * core_if, ++ int32_t val); ++extern int32_t dwc_otg_get_param_ahb_single(dwc_otg_core_if_t * core_if); ++#define dwc_param_ahb_single_default 0 ++ ++extern int dwc_otg_set_param_otg_ver(dwc_otg_core_if_t * core_if, int32_t val); ++extern int32_t dwc_otg_get_param_otg_ver(dwc_otg_core_if_t * core_if); ++#define dwc_param_otg_ver_default 0 ++ ++/** @} */ ++ ++/** @name Access to registers and bit-fields */ ++ ++/** ++ * Dump core registers and SPRAM ++ */ ++extern void dwc_otg_dump_dev_registers(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_dump_spram(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_dump_host_registers(dwc_otg_core_if_t * _core_if); ++extern void dwc_otg_dump_global_registers(dwc_otg_core_if_t * _core_if); ++ ++/** ++ * Get host negotiation status. ++ */ ++extern uint32_t dwc_otg_get_hnpstatus(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get srp status ++ */ ++extern uint32_t dwc_otg_get_srpstatus(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Set hnpreq bit in the GOTGCTL register. ++ */ ++extern void dwc_otg_set_hnpreq(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get Content of SNPSID register. ++ */ ++extern uint32_t dwc_otg_get_gsnpsid(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get current mode. ++ * Returns 0 if in device mode, and 1 if in host mode. ++ */ ++extern uint32_t dwc_otg_get_mode(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of hnpcapable field in the GUSBCFG register ++ */ ++extern uint32_t dwc_otg_get_hnpcapable(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of hnpcapable field in the GUSBCFG register ++ */ ++extern void dwc_otg_set_hnpcapable(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of srpcapable field in the GUSBCFG register ++ */ ++extern uint32_t dwc_otg_get_srpcapable(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of srpcapable field in the GUSBCFG register ++ */ ++extern void dwc_otg_set_srpcapable(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of devspeed field in the DCFG register ++ */ ++extern uint32_t dwc_otg_get_devspeed(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of devspeed field in the DCFG register ++ */ ++extern void dwc_otg_set_devspeed(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get the value of busconnected field from the HPRT0 register ++ */ ++extern uint32_t dwc_otg_get_busconnected(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Gets the device enumeration Speed. ++ */ ++extern uint32_t dwc_otg_get_enumspeed(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of prtpwr field from the HPRT0 register ++ */ ++extern uint32_t dwc_otg_get_prtpower(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of flag indicating core state - hibernated or not ++ */ ++extern uint32_t dwc_otg_get_core_state(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Set value of prtpwr field from the HPRT0 register ++ */ ++extern void dwc_otg_set_prtpower(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of prtsusp field from the HPRT0 regsiter ++ */ ++extern uint32_t dwc_otg_get_prtsuspend(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of prtpwr field from the HPRT0 register ++ */ ++extern void dwc_otg_set_prtsuspend(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of ModeChTimEn field from the HCFG regsiter ++ */ ++extern uint32_t dwc_otg_get_mode_ch_tim(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of ModeChTimEn field from the HCFG regsiter ++ */ ++extern void dwc_otg_set_mode_ch_tim(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of Fram Interval field from the HFIR regsiter ++ */ ++extern uint32_t dwc_otg_get_fr_interval(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of Frame Interval field from the HFIR regsiter ++ */ ++extern void dwc_otg_set_fr_interval(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Set value of prtres field from the HPRT0 register ++ *FIXME Remove? ++ */ ++extern void dwc_otg_set_prtresume(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of rmtwkupsig bit in DCTL register ++ */ ++extern uint32_t dwc_otg_get_remotewakesig(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of prt_sleep_sts field from the GLPMCFG register ++ */ ++extern uint32_t dwc_otg_get_lpm_portsleepstatus(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of rem_wkup_en field from the GLPMCFG register ++ */ ++extern uint32_t dwc_otg_get_lpm_remotewakeenabled(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Get value of appl_resp field from the GLPMCFG register ++ */ ++extern uint32_t dwc_otg_get_lpmresponse(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of appl_resp field from the GLPMCFG register ++ */ ++extern void dwc_otg_set_lpmresponse(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of hsic_connect field from the GLPMCFG register ++ */ ++extern uint32_t dwc_otg_get_hsic_connect(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of hsic_connect field from the GLPMCFG register ++ */ ++extern void dwc_otg_set_hsic_connect(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * Get value of inv_sel_hsic field from the GLPMCFG register. ++ */ ++extern uint32_t dwc_otg_get_inv_sel_hsic(dwc_otg_core_if_t * core_if); ++/** ++ * Set value of inv_sel_hsic field from the GLPMFG register. ++ */ ++extern void dwc_otg_set_inv_sel_hsic(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/* ++ * Some functions for accessing registers ++ */ ++ ++/** ++ * GOTGCTL register ++ */ ++extern uint32_t dwc_otg_get_gotgctl(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_gotgctl(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GUSBCFG register ++ */ ++extern uint32_t dwc_otg_get_gusbcfg(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_gusbcfg(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GRXFSIZ register ++ */ ++extern uint32_t dwc_otg_get_grxfsiz(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_grxfsiz(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GNPTXFSIZ register ++ */ ++extern uint32_t dwc_otg_get_gnptxfsiz(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_gnptxfsiz(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++extern uint32_t dwc_otg_get_gpvndctl(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_gpvndctl(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GGPIO register ++ */ ++extern uint32_t dwc_otg_get_ggpio(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_ggpio(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GUID register ++ */ ++extern uint32_t dwc_otg_get_guid(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_guid(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * HPRT0 register ++ */ ++extern uint32_t dwc_otg_get_hprt0(dwc_otg_core_if_t * core_if); ++extern void dwc_otg_set_hprt0(dwc_otg_core_if_t * core_if, uint32_t val); ++ ++/** ++ * GHPTXFSIZE ++ */ ++extern uint32_t dwc_otg_get_hptxfsiz(dwc_otg_core_if_t * core_if); ++ ++/** @} */ ++ ++#endif /* __DWC_CORE_IF_H__ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_dbg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_dbg.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,116 @@ ++/* ========================================================================== ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#ifndef __DWC_OTG_DBG_H__ ++#define __DWC_OTG_DBG_H__ ++ ++/** @file ++ * This file defines debug levels. ++ * Debugging support vanishes in non-debug builds. ++ */ ++ ++/** ++ * The Debug Level bit-mask variable. ++ */ ++extern uint32_t g_dbg_lvl; ++/** ++ * Set the Debug Level variable. ++ */ ++static inline uint32_t SET_DEBUG_LEVEL(const uint32_t new) ++{ ++ uint32_t old = g_dbg_lvl; ++ g_dbg_lvl = new; ++ return old; ++} ++ ++/** When debug level has the DBG_CIL bit set, display CIL Debug messages. */ ++#define DBG_CIL (0x2) ++/** When debug level has the DBG_CILV bit set, display CIL Verbose debug ++ * messages */ ++#define DBG_CILV (0x20) ++/** When debug level has the DBG_PCD bit set, display PCD (Device) debug ++ * messages */ ++#define DBG_PCD (0x4) ++/** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug ++ * messages */ ++#define DBG_PCDV (0x40) ++/** When debug level has the DBG_HCD bit set, display Host debug messages */ ++#define DBG_HCD (0x8) ++/** When debug level has the DBG_HCDV bit set, display Verbose Host debug ++ * messages */ ++#define DBG_HCDV (0x80) ++/** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host ++ * mode. */ ++#define DBG_HCD_URB (0x800) ++/** When debug level has the DBG_HCDI bit set, display host interrupt ++ * messages. */ ++#define DBG_HCDI (0x1000) ++ ++/** When debug level has any bit set, display debug messages */ ++#define DBG_ANY (0xFF) ++ ++/** All debug messages off */ ++#define DBG_OFF 0 ++ ++/** Prefix string for DWC_DEBUG print macros. */ ++#define USB_DWC "DWC_otg: " ++ ++/** ++ * Print a debug message when the Global debug level variable contains ++ * the bit defined in lvl. ++ * ++ * @param[in] lvl - Debug level, use one of the DBG_ constants above. ++ * @param[in] x - like printf ++ * ++ * Example:

++ * ++ * DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr); ++ * ++ *
++ * results in:
++ * ++ * usb-DWC_otg: dwc_otg_cil_init(ca867000) ++ * ++ */ ++#ifdef DEBUG ++ ++# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)__DWC_DEBUG(USB_DWC x ); }while(0) ++# define DWC_DEBUGP(x...) DWC_DEBUGPL(DBG_ANY, x ) ++ ++# define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl) ++ ++#else ++ ++# define DWC_DEBUGPL(lvl, x...) do{}while(0) ++# define DWC_DEBUGP(x...) ++ ++# define CHK_DEBUG_LEVEL(level) (0) ++ ++#endif /*DEBUG*/ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1700 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.c $ ++ * $Revision: #92 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++/** @file ++ * The dwc_otg_driver module provides the initialization and cleanup entry ++ * points for the DWC_otg driver. This module will be dynamically installed ++ * after Linux is booted using the insmod command. When the module is ++ * installed, the dwc_otg_driver_init function is called. When the module is ++ * removed (using rmmod), the dwc_otg_driver_cleanup function is called. ++ * ++ * This module also defines a data structure for the dwc_otg_driver, which is ++ * used in conjunction with the standard ARM lm_device structure. These ++ * structures allow the OTG driver to comply with the standard Linux driver ++ * model in which devices and drivers are registered with a bus driver. This ++ * has the benefit that Linux can expose attributes of the driver and device ++ * in its special sysfs file system. Users can then read or write files in ++ * this file system to perform diagnostics on the driver components or the ++ * device. ++ */ ++ ++#include "dwc_otg_os_dep.h" ++#include "dwc_os.h" ++#include "dwc_otg_dbg.h" ++#include "dwc_otg_driver.h" ++#include "dwc_otg_attr.h" ++#include "dwc_otg_core_if.h" ++#include "dwc_otg_pcd_if.h" ++#include "dwc_otg_hcd_if.h" ++ ++#define DWC_DRIVER_VERSION "3.00a 10-AUG-2012" ++#define DWC_DRIVER_DESC "HS OTG USB Controller driver" ++ ++bool microframe_schedule=true; ++ ++static const char dwc_driver_name[] = "dwc_otg"; ++ ++extern int pcd_init( ++#ifdef LM_INTERFACE ++ struct lm_device *_dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *_dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ); ++extern int hcd_init( ++#ifdef LM_INTERFACE ++ struct lm_device *_dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *_dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *dev ++#endif ++ ); ++ ++extern int pcd_remove( ++#ifdef LM_INTERFACE ++ struct lm_device *_dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *_dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *_dev ++#endif ++ ); ++ ++extern void hcd_remove( ++#ifdef LM_INTERFACE ++ struct lm_device *_dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *_dev ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *_dev ++#endif ++ ); ++ ++extern void dwc_otg_adp_start(dwc_otg_core_if_t * core_if, uint8_t is_host); ++ ++/*-------------------------------------------------------------------------*/ ++/* Encapsulate the module parameter settings */ ++ ++struct dwc_otg_driver_module_params { ++ int32_t opt; ++ int32_t otg_cap; ++ int32_t dma_enable; ++ int32_t dma_desc_enable; ++ int32_t dma_burst_size; ++ int32_t speed; ++ int32_t host_support_fs_ls_low_power; ++ int32_t host_ls_low_power_phy_clk; ++ int32_t enable_dynamic_fifo; ++ int32_t data_fifo_size; ++ int32_t dev_rx_fifo_size; ++ int32_t dev_nperio_tx_fifo_size; ++ uint32_t dev_perio_tx_fifo_size[MAX_PERIO_FIFOS]; ++ int32_t host_rx_fifo_size; ++ int32_t host_nperio_tx_fifo_size; ++ int32_t host_perio_tx_fifo_size; ++ int32_t max_transfer_size; ++ int32_t max_packet_count; ++ int32_t host_channels; ++ int32_t dev_endpoints; ++ int32_t phy_type; ++ int32_t phy_utmi_width; ++ int32_t phy_ulpi_ddr; ++ int32_t phy_ulpi_ext_vbus; ++ int32_t i2c_enable; ++ int32_t ulpi_fs_ls; ++ int32_t ts_dline; ++ int32_t en_multiple_tx_fifo; ++ uint32_t dev_tx_fifo_size[MAX_TX_FIFOS]; ++ uint32_t thr_ctl; ++ uint32_t tx_thr_length; ++ uint32_t rx_thr_length; ++ int32_t pti_enable; ++ int32_t mpi_enable; ++ int32_t lpm_enable; ++ int32_t ic_usb_cap; ++ int32_t ahb_thr_ratio; ++ int32_t power_down; ++ int32_t reload_ctl; ++ int32_t dev_out_nak; ++ int32_t cont_on_bna; ++ int32_t ahb_single; ++ int32_t otg_ver; ++ int32_t adp_enable; ++}; ++ ++static struct dwc_otg_driver_module_params dwc_otg_module_params = { ++ .opt = -1, ++ .otg_cap = -1, ++ .dma_enable = -1, ++ .dma_desc_enable = -1, ++ .dma_burst_size = -1, ++ .speed = -1, ++ .host_support_fs_ls_low_power = -1, ++ .host_ls_low_power_phy_clk = -1, ++ .enable_dynamic_fifo = -1, ++ .data_fifo_size = -1, ++ .dev_rx_fifo_size = -1, ++ .dev_nperio_tx_fifo_size = -1, ++ .dev_perio_tx_fifo_size = { ++ /* dev_perio_tx_fifo_size_1 */ ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1 ++ /* 15 */ ++ }, ++ .host_rx_fifo_size = -1, ++ .host_nperio_tx_fifo_size = -1, ++ .host_perio_tx_fifo_size = -1, ++ .max_transfer_size = -1, ++ .max_packet_count = -1, ++ .host_channels = -1, ++ .dev_endpoints = -1, ++ .phy_type = -1, ++ .phy_utmi_width = -1, ++ .phy_ulpi_ddr = -1, ++ .phy_ulpi_ext_vbus = -1, ++ .i2c_enable = -1, ++ .ulpi_fs_ls = -1, ++ .ts_dline = -1, ++ .en_multiple_tx_fifo = -1, ++ .dev_tx_fifo_size = { ++ /* dev_tx_fifo_size */ ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1, ++ -1 ++ /* 15 */ ++ }, ++ .thr_ctl = -1, ++ .tx_thr_length = -1, ++ .rx_thr_length = -1, ++ .pti_enable = -1, ++ .mpi_enable = -1, ++ .lpm_enable = -1, ++ .ic_usb_cap = -1, ++ .ahb_thr_ratio = -1, ++ .power_down = -1, ++ .reload_ctl = -1, ++ .dev_out_nak = -1, ++ .cont_on_bna = -1, ++ .ahb_single = -1, ++ .otg_ver = -1, ++ .adp_enable = -1, ++}; ++ ++/** ++ * This function shows the Driver Version. ++ */ ++static ssize_t version_show(struct device_driver *dev, char *buf) ++{ ++ return snprintf(buf, sizeof(DWC_DRIVER_VERSION) + 2, "%s\n", ++ DWC_DRIVER_VERSION); ++} ++ ++static DRIVER_ATTR(version, S_IRUGO, version_show, NULL); ++ ++/** ++ * Global Debug Level Mask. ++ */ ++uint32_t g_dbg_lvl = 0; /* OFF */ ++ ++/** ++ * This function shows the driver Debug Level. ++ */ ++static ssize_t dbg_level_show(struct device_driver *drv, char *buf) ++{ ++ return sprintf(buf, "0x%0x\n", g_dbg_lvl); ++} ++ ++/** ++ * This function stores the driver Debug Level. ++ */ ++static ssize_t dbg_level_store(struct device_driver *drv, const char *buf, ++ size_t count) ++{ ++ g_dbg_lvl = simple_strtoul(buf, NULL, 16); ++ return count; ++} ++ ++static DRIVER_ATTR(debuglevel, S_IRUGO | S_IWUSR, dbg_level_show, ++ dbg_level_store); ++ ++/** ++ * This function is called during module intialization ++ * to pass module parameters to the DWC_OTG CORE. ++ */ ++static int set_parameters(dwc_otg_core_if_t * core_if) ++{ ++ int retval = 0; ++ int i; ++ ++ if (dwc_otg_module_params.otg_cap != -1) { ++ retval += ++ dwc_otg_set_param_otg_cap(core_if, ++ dwc_otg_module_params.otg_cap); ++ } ++ if (dwc_otg_module_params.dma_enable != -1) { ++ retval += ++ dwc_otg_set_param_dma_enable(core_if, ++ dwc_otg_module_params. ++ dma_enable); ++ } ++ if (dwc_otg_module_params.dma_desc_enable != -1) { ++ retval += ++ dwc_otg_set_param_dma_desc_enable(core_if, ++ dwc_otg_module_params. ++ dma_desc_enable); ++ } ++ if (dwc_otg_module_params.opt != -1) { ++ retval += ++ dwc_otg_set_param_opt(core_if, dwc_otg_module_params.opt); ++ } ++ if (dwc_otg_module_params.dma_burst_size != -1) { ++ retval += ++ dwc_otg_set_param_dma_burst_size(core_if, ++ dwc_otg_module_params. ++ dma_burst_size); ++ } ++ if (dwc_otg_module_params.host_support_fs_ls_low_power != -1) { ++ retval += ++ dwc_otg_set_param_host_support_fs_ls_low_power(core_if, ++ dwc_otg_module_params. ++ host_support_fs_ls_low_power); ++ } ++ if (dwc_otg_module_params.enable_dynamic_fifo != -1) { ++ retval += ++ dwc_otg_set_param_enable_dynamic_fifo(core_if, ++ dwc_otg_module_params. ++ enable_dynamic_fifo); ++ } ++ if (dwc_otg_module_params.data_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_data_fifo_size(core_if, ++ dwc_otg_module_params. ++ data_fifo_size); ++ } ++ if (dwc_otg_module_params.dev_rx_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_dev_rx_fifo_size(core_if, ++ dwc_otg_module_params. ++ dev_rx_fifo_size); ++ } ++ if (dwc_otg_module_params.dev_nperio_tx_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_dev_nperio_tx_fifo_size(core_if, ++ dwc_otg_module_params. ++ dev_nperio_tx_fifo_size); ++ } ++ if (dwc_otg_module_params.host_rx_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_host_rx_fifo_size(core_if, ++ dwc_otg_module_params.host_rx_fifo_size); ++ } ++ if (dwc_otg_module_params.host_nperio_tx_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_host_nperio_tx_fifo_size(core_if, ++ dwc_otg_module_params. ++ host_nperio_tx_fifo_size); ++ } ++ if (dwc_otg_module_params.host_perio_tx_fifo_size != -1) { ++ retval += ++ dwc_otg_set_param_host_perio_tx_fifo_size(core_if, ++ dwc_otg_module_params. ++ host_perio_tx_fifo_size); ++ } ++ if (dwc_otg_module_params.max_transfer_size != -1) { ++ retval += ++ dwc_otg_set_param_max_transfer_size(core_if, ++ dwc_otg_module_params. ++ max_transfer_size); ++ } ++ if (dwc_otg_module_params.max_packet_count != -1) { ++ retval += ++ dwc_otg_set_param_max_packet_count(core_if, ++ dwc_otg_module_params. ++ max_packet_count); ++ } ++ if (dwc_otg_module_params.host_channels != -1) { ++ retval += ++ dwc_otg_set_param_host_channels(core_if, ++ dwc_otg_module_params. ++ host_channels); ++ } ++ if (dwc_otg_module_params.dev_endpoints != -1) { ++ retval += ++ dwc_otg_set_param_dev_endpoints(core_if, ++ dwc_otg_module_params. ++ dev_endpoints); ++ } ++ if (dwc_otg_module_params.phy_type != -1) { ++ retval += ++ dwc_otg_set_param_phy_type(core_if, ++ dwc_otg_module_params.phy_type); ++ } ++ if (dwc_otg_module_params.speed != -1) { ++ retval += ++ dwc_otg_set_param_speed(core_if, ++ dwc_otg_module_params.speed); ++ } ++ if (dwc_otg_module_params.host_ls_low_power_phy_clk != -1) { ++ retval += ++ dwc_otg_set_param_host_ls_low_power_phy_clk(core_if, ++ dwc_otg_module_params. ++ host_ls_low_power_phy_clk); ++ } ++ if (dwc_otg_module_params.phy_ulpi_ddr != -1) { ++ retval += ++ dwc_otg_set_param_phy_ulpi_ddr(core_if, ++ dwc_otg_module_params. ++ phy_ulpi_ddr); ++ } ++ if (dwc_otg_module_params.phy_ulpi_ext_vbus != -1) { ++ retval += ++ dwc_otg_set_param_phy_ulpi_ext_vbus(core_if, ++ dwc_otg_module_params. ++ phy_ulpi_ext_vbus); ++ } ++ if (dwc_otg_module_params.phy_utmi_width != -1) { ++ retval += ++ dwc_otg_set_param_phy_utmi_width(core_if, ++ dwc_otg_module_params. ++ phy_utmi_width); ++ } ++ if (dwc_otg_module_params.ulpi_fs_ls != -1) { ++ retval += ++ dwc_otg_set_param_ulpi_fs_ls(core_if, ++ dwc_otg_module_params.ulpi_fs_ls); ++ } ++ if (dwc_otg_module_params.ts_dline != -1) { ++ retval += ++ dwc_otg_set_param_ts_dline(core_if, ++ dwc_otg_module_params.ts_dline); ++ } ++ if (dwc_otg_module_params.i2c_enable != -1) { ++ retval += ++ dwc_otg_set_param_i2c_enable(core_if, ++ dwc_otg_module_params. ++ i2c_enable); ++ } ++ if (dwc_otg_module_params.en_multiple_tx_fifo != -1) { ++ retval += ++ dwc_otg_set_param_en_multiple_tx_fifo(core_if, ++ dwc_otg_module_params. ++ en_multiple_tx_fifo); ++ } ++ for (i = 0; i < 15; i++) { ++ if (dwc_otg_module_params.dev_perio_tx_fifo_size[i] != -1) { ++ retval += ++ dwc_otg_set_param_dev_perio_tx_fifo_size(core_if, ++ dwc_otg_module_params. ++ dev_perio_tx_fifo_size ++ [i], i); ++ } ++ } ++ ++ for (i = 0; i < 15; i++) { ++ if (dwc_otg_module_params.dev_tx_fifo_size[i] != -1) { ++ retval += dwc_otg_set_param_dev_tx_fifo_size(core_if, ++ dwc_otg_module_params. ++ dev_tx_fifo_size ++ [i], i); ++ } ++ } ++ if (dwc_otg_module_params.thr_ctl != -1) { ++ retval += ++ dwc_otg_set_param_thr_ctl(core_if, ++ dwc_otg_module_params.thr_ctl); ++ } ++ if (dwc_otg_module_params.mpi_enable != -1) { ++ retval += ++ dwc_otg_set_param_mpi_enable(core_if, ++ dwc_otg_module_params. ++ mpi_enable); ++ } ++ if (dwc_otg_module_params.pti_enable != -1) { ++ retval += ++ dwc_otg_set_param_pti_enable(core_if, ++ dwc_otg_module_params. ++ pti_enable); ++ } ++ if (dwc_otg_module_params.lpm_enable != -1) { ++ retval += ++ dwc_otg_set_param_lpm_enable(core_if, ++ dwc_otg_module_params. ++ lpm_enable); ++ } ++ if (dwc_otg_module_params.ic_usb_cap != -1) { ++ retval += ++ dwc_otg_set_param_ic_usb_cap(core_if, ++ dwc_otg_module_params. ++ ic_usb_cap); ++ } ++ if (dwc_otg_module_params.tx_thr_length != -1) { ++ retval += ++ dwc_otg_set_param_tx_thr_length(core_if, ++ dwc_otg_module_params.tx_thr_length); ++ } ++ if (dwc_otg_module_params.rx_thr_length != -1) { ++ retval += ++ dwc_otg_set_param_rx_thr_length(core_if, ++ dwc_otg_module_params. ++ rx_thr_length); ++ } ++ if (dwc_otg_module_params.ahb_thr_ratio != -1) { ++ retval += ++ dwc_otg_set_param_ahb_thr_ratio(core_if, ++ dwc_otg_module_params.ahb_thr_ratio); ++ } ++ if (dwc_otg_module_params.power_down != -1) { ++ retval += ++ dwc_otg_set_param_power_down(core_if, ++ dwc_otg_module_params.power_down); ++ } ++ if (dwc_otg_module_params.reload_ctl != -1) { ++ retval += ++ dwc_otg_set_param_reload_ctl(core_if, ++ dwc_otg_module_params.reload_ctl); ++ } ++ ++ if (dwc_otg_module_params.dev_out_nak != -1) { ++ retval += ++ dwc_otg_set_param_dev_out_nak(core_if, ++ dwc_otg_module_params.dev_out_nak); ++ } ++ ++ if (dwc_otg_module_params.cont_on_bna != -1) { ++ retval += ++ dwc_otg_set_param_cont_on_bna(core_if, ++ dwc_otg_module_params.cont_on_bna); ++ } ++ ++ if (dwc_otg_module_params.ahb_single != -1) { ++ retval += ++ dwc_otg_set_param_ahb_single(core_if, ++ dwc_otg_module_params.ahb_single); ++ } ++ ++ if (dwc_otg_module_params.otg_ver != -1) { ++ retval += ++ dwc_otg_set_param_otg_ver(core_if, ++ dwc_otg_module_params.otg_ver); ++ } ++ if (dwc_otg_module_params.adp_enable != -1) { ++ retval += ++ dwc_otg_set_param_adp_enable(core_if, ++ dwc_otg_module_params. ++ adp_enable); ++ } ++ return retval; ++} ++ ++/** ++ * This function is the top level interrupt handler for the Common ++ * (Device and host modes) interrupts. ++ */ ++static irqreturn_t dwc_otg_common_irq(int irq, void *dev) ++{ ++ int32_t retval = IRQ_NONE; ++ ++ retval = dwc_otg_handle_common_intr(dev); ++ if (retval != 0) { ++ S3C2410X_CLEAR_EINTPEND(); ++ } ++ return IRQ_RETVAL(retval); ++} ++ ++/** ++ * This function is called when a lm_device is unregistered with the ++ * dwc_otg_driver. This happens, for example, when the rmmod command is ++ * executed. The device may or may not be electrically present. If it is ++ * present, the driver stops device processing. Any resources used on behalf ++ * of this device are freed. ++ * ++ * @param _dev ++ */ ++#ifdef LM_INTERFACE ++#define REM_RETVAL(n) ++static void dwc_otg_driver_remove( struct lm_device *_dev ) ++{ dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev); ++#elif defined(PCI_INTERFACE) ++#define REM_RETVAL(n) ++static void dwc_otg_driver_remove( struct pci_dev *_dev ) ++{ dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev); ++#elif defined(PLATFORM_INTERFACE) ++#define REM_RETVAL(n) n ++static int dwc_otg_driver_remove( struct platform_device *_dev ) ++{ dwc_otg_device_t *otg_dev = platform_get_drvdata(_dev); ++#endif ++ ++ DWC_DEBUGPL(DBG_ANY, "%s(%p) otg_dev %p\n", __func__, _dev, otg_dev); ++ ++ if (!otg_dev) { ++ /* Memory allocation for the dwc_otg_device failed. */ ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__); ++ return REM_RETVAL(-ENOMEM); ++ } ++#ifndef DWC_DEVICE_ONLY ++ if (otg_dev->hcd) { ++ hcd_remove(_dev); ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__); ++ return REM_RETVAL(-EINVAL); ++ } ++#endif ++ ++#ifndef DWC_HOST_ONLY ++ if (otg_dev->pcd) { ++ pcd_remove(_dev); ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->pcd NULL!\n", __func__); ++ return REM_RETVAL(-EINVAL); ++ } ++#endif ++ /* ++ * Free the IRQ ++ */ ++ if (otg_dev->common_irq_installed) { ++#ifdef PLATFORM_INTERFACE ++ free_irq(platform_get_irq(_dev, 0), otg_dev); ++#else ++ free_irq(_dev->irq, otg_dev); ++#endif ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "%s: There is no installed irq!\n", __func__); ++ return REM_RETVAL(-ENXIO); ++ } ++ ++ if (otg_dev->core_if) { ++ dwc_otg_cil_remove(otg_dev->core_if); ++ } else { ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->core_if NULL!\n", __func__); ++ return REM_RETVAL(-ENXIO); ++ } ++ ++ /* ++ * Remove the device attributes ++ */ ++ dwc_otg_attr_remove(_dev); ++ ++ /* ++ * Return the memory. ++ */ ++ if (otg_dev->os_dep.base) { ++ iounmap(otg_dev->os_dep.base); ++ } ++ DWC_FREE(otg_dev); ++ ++ /* ++ * Clear the drvdata pointer. ++ */ ++#ifdef LM_INTERFACE ++ lm_set_drvdata(_dev, 0); ++#elif defined(PCI_INTERFACE) ++ release_mem_region(otg_dev->os_dep.rsrc_start, ++ otg_dev->os_dep.rsrc_len); ++ pci_set_drvdata(_dev, 0); ++#elif defined(PLATFORM_INTERFACE) ++ platform_set_drvdata(_dev, 0); ++#endif ++ return REM_RETVAL(0); ++} ++ ++/** ++ * This function is called when an lm_device is bound to a ++ * dwc_otg_driver. It creates the driver components required to ++ * control the device (CIL, HCD, and PCD) and it initializes the ++ * device. The driver components are stored in a dwc_otg_device ++ * structure. A reference to the dwc_otg_device is saved in the ++ * lm_device. This allows the driver to access the dwc_otg_device ++ * structure on subsequent calls to driver methods for this device. ++ * ++ * @param _dev Bus device ++ */ ++static int dwc_otg_driver_probe( ++#ifdef LM_INTERFACE ++ struct lm_device *_dev ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *_dev, ++ const struct pci_device_id *id ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *_dev ++#endif ++ ) ++{ ++ int retval = 0; ++ dwc_otg_device_t *dwc_otg_device; ++ int devirq; ++ ++ dev_dbg(&_dev->dev, "dwc_otg_driver_probe(%p)\n", _dev); ++#ifdef LM_INTERFACE ++ dev_dbg(&_dev->dev, "start=0x%08x\n", (unsigned)_dev->resource.start); ++#elif defined(PCI_INTERFACE) ++ if (!id) { ++ DWC_ERROR("Invalid pci_device_id %p", id); ++ return -EINVAL; ++ } ++ ++ if (!_dev || (pci_enable_device(_dev) < 0)) { ++ DWC_ERROR("Invalid pci_device %p", _dev); ++ return -ENODEV; ++ } ++ dev_dbg(&_dev->dev, "start=0x%08x\n", (unsigned)pci_resource_start(_dev,0)); ++ /* other stuff needed as well? */ ++ ++#elif defined(PLATFORM_INTERFACE) ++ dev_dbg(&_dev->dev, "start=0x%08x (len 0x%x)\n", ++ (unsigned)_dev->resource->start, ++ (unsigned)(_dev->resource->end - _dev->resource->start)); ++#endif ++ ++ dwc_otg_device = DWC_ALLOC(sizeof(dwc_otg_device_t)); ++ ++ if (!dwc_otg_device) { ++ dev_err(&_dev->dev, "kmalloc of dwc_otg_device failed\n"); ++ return -ENOMEM; ++ } ++ ++ memset(dwc_otg_device, 0, sizeof(*dwc_otg_device)); ++ dwc_otg_device->os_dep.reg_offset = 0xFFFFFFFF; ++ ++ /* ++ * Map the DWC_otg Core memory into virtual address space. ++ */ ++#ifdef LM_INTERFACE ++ dwc_otg_device->os_dep.base = ioremap(_dev->resource.start, SZ_256K); ++ ++ if (!dwc_otg_device->os_dep.base) { ++ dev_err(&_dev->dev, "ioremap() failed\n"); ++ DWC_FREE(dwc_otg_device); ++ return -ENOMEM; ++ } ++ dev_dbg(&_dev->dev, "base=0x%08x\n", ++ (unsigned)dwc_otg_device->os_dep.base); ++#elif defined(PCI_INTERFACE) ++ _dev->current_state = PCI_D0; ++ _dev->dev.power.power_state = PMSG_ON; ++ ++ if (!_dev->irq) { ++ DWC_ERROR("Found HC with no IRQ. Check BIOS/PCI %s setup!", ++ pci_name(_dev)); ++ iounmap(dwc_otg_device->os_dep.base); ++ DWC_FREE(dwc_otg_device); ++ return -ENODEV; ++ } ++ ++ dwc_otg_device->os_dep.rsrc_start = pci_resource_start(_dev, 0); ++ dwc_otg_device->os_dep.rsrc_len = pci_resource_len(_dev, 0); ++ DWC_DEBUGPL(DBG_ANY, "PCI resource: start=%08x, len=%08x\n", ++ (unsigned)dwc_otg_device->os_dep.rsrc_start, ++ (unsigned)dwc_otg_device->os_dep.rsrc_len); ++ if (!request_mem_region ++ (dwc_otg_device->os_dep.rsrc_start, dwc_otg_device->os_dep.rsrc_len, ++ "dwc_otg")) { ++ dev_dbg(&_dev->dev, "error requesting memory\n"); ++ iounmap(dwc_otg_device->os_dep.base); ++ DWC_FREE(dwc_otg_device); ++ return -EFAULT; ++ } ++ ++ dwc_otg_device->os_dep.base = ++ ioremap_nocache(dwc_otg_device->os_dep.rsrc_start, ++ dwc_otg_device->os_dep.rsrc_len); ++ if (dwc_otg_device->os_dep.base == NULL) { ++ dev_dbg(&_dev->dev, "error mapping memory\n"); ++ release_mem_region(dwc_otg_device->os_dep.rsrc_start, ++ dwc_otg_device->os_dep.rsrc_len); ++ iounmap(dwc_otg_device->os_dep.base); ++ DWC_FREE(dwc_otg_device); ++ return -EFAULT; ++ } ++ dev_dbg(&_dev->dev, "base=0x%p (before adjust) \n", ++ dwc_otg_device->os_dep.base); ++ dwc_otg_device->os_dep.base = (char *)dwc_otg_device->os_dep.base; ++ dev_dbg(&_dev->dev, "base=0x%p (after adjust) \n", ++ dwc_otg_device->os_dep.base); ++ dev_dbg(&_dev->dev, "%s: mapped PA 0x%x to VA 0x%p\n", __func__, ++ (unsigned)dwc_otg_device->os_dep.rsrc_start, ++ dwc_otg_device->os_dep.base); ++ ++ pci_set_master(_dev); ++ pci_set_drvdata(_dev, dwc_otg_device); ++#elif defined(PLATFORM_INTERFACE) ++ DWC_DEBUGPL(DBG_ANY,"Platform resource: start=%08x, len=%08x\n", ++ _dev->resource->start, ++ _dev->resource->end - _dev->resource->start + 1); ++#if 1 ++ if (!request_mem_region(_dev->resource->start, ++ _dev->resource->end - _dev->resource->start + 1, ++ "dwc_otg")) { ++ dev_dbg(&_dev->dev, "error reserving mapped memory\n"); ++ retval = -EFAULT; ++ goto fail; ++ } ++ ++ dwc_otg_device->os_dep.base = ioremap_nocache(_dev->resource->start, ++ _dev->resource->end - ++ _dev->resource->start+1); ++#else ++ { ++ struct map_desc desc = { ++ .virtual = IO_ADDRESS((unsigned)_dev->resource->start), ++ .pfn = __phys_to_pfn((unsigned)_dev->resource->start), ++ .length = SZ_128K, ++ .type = MT_DEVICE ++ }; ++ iotable_init(&desc, 1); ++ dwc_otg_device->os_dep.base = (void *)desc.virtual; ++ } ++#endif ++ if (!dwc_otg_device->os_dep.base) { ++ dev_err(&_dev->dev, "ioremap() failed\n"); ++ retval = -ENOMEM; ++ goto fail; ++ } ++ dev_dbg(&_dev->dev, "base=0x%08x\n", ++ (unsigned)dwc_otg_device->os_dep.base); ++#endif ++ ++ /* ++ * Initialize driver data to point to the global DWC_otg ++ * Device structure. ++ */ ++#ifdef LM_INTERFACE ++ lm_set_drvdata(_dev, dwc_otg_device); ++#elif defined(PLATFORM_INTERFACE) ++ platform_set_drvdata(_dev, dwc_otg_device); ++#endif ++ dev_dbg(&_dev->dev, "dwc_otg_device=0x%p\n", dwc_otg_device); ++ ++ dwc_otg_device->core_if = dwc_otg_cil_init(dwc_otg_device->os_dep.base); ++ DWC_DEBUGPL(DBG_HCDV, "probe of device %p given core_if %p\n", ++ dwc_otg_device, dwc_otg_device->core_if);//GRAYG ++ ++ if (!dwc_otg_device->core_if) { ++ dev_err(&_dev->dev, "CIL initialization failed!\n"); ++ retval = -ENOMEM; ++ goto fail; ++ } ++ ++ dev_dbg(&_dev->dev, "Calling get_gsnpsid\n"); ++ /* ++ * Attempt to ensure this device is really a DWC_otg Controller. ++ * Read and verify the SNPSID register contents. The value should be ++ * 0x45F42XXX or 0x45F42XXX, which corresponds to either "OT2" or "OTG3", ++ * as in "OTG version 2.XX" or "OTG version 3.XX". ++ */ ++ ++ if (((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F542000) && ++ ((dwc_otg_get_gsnpsid(dwc_otg_device->core_if) & 0xFFFFF000) != 0x4F543000)) { ++ dev_err(&_dev->dev, "Bad value for SNPSID: 0x%08x\n", ++ dwc_otg_get_gsnpsid(dwc_otg_device->core_if)); ++ retval = -EINVAL; ++ goto fail; ++ } ++ ++ /* ++ * Validate parameter values. ++ */ ++ dev_dbg(&_dev->dev, "Calling set_parameters\n"); ++ if (set_parameters(dwc_otg_device->core_if)) { ++ retval = -EINVAL; ++ goto fail; ++ } ++ ++ /* ++ * Create Device Attributes in sysfs ++ */ ++ dev_dbg(&_dev->dev, "Calling attr_create\n"); ++ dwc_otg_attr_create(_dev); ++ ++ /* ++ * Disable the global interrupt until all the interrupt ++ * handlers are installed. ++ */ ++ dev_dbg(&_dev->dev, "Calling disable_global_interrupts\n"); ++ dwc_otg_disable_global_interrupts(dwc_otg_device->core_if); ++ ++ /* ++ * Install the interrupt handler for the common interrupts before ++ * enabling common interrupts in core_init below. ++ */ ++ ++#if defined(PLATFORM_INTERFACE) ++ devirq = platform_get_irq(_dev, 0); ++#else ++ devirq = _dev->irq; ++#endif ++ DWC_DEBUGPL(DBG_CIL, "registering (common) handler for irq%d\n", ++ devirq); ++ dev_dbg(&_dev->dev, "Calling request_irq(%d)\n", devirq); ++ retval = request_irq(devirq, dwc_otg_common_irq, ++ IRQF_SHARED, ++ "dwc_otg", dwc_otg_device); ++ if (retval) { ++ DWC_ERROR("request of irq%d failed\n", devirq); ++ retval = -EBUSY; ++ goto fail; ++ } else { ++ dwc_otg_device->common_irq_installed = 1; ++ } ++ ++#ifndef IRQF_TRIGGER_LOW ++#if defined(LM_INTERFACE) || defined(PLATFORM_INTERFACE) ++ dev_dbg(&_dev->dev, "Calling set_irq_type\n"); ++ set_irq_type(devirq, ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) ++ IRQT_LOW ++#else ++ IRQ_TYPE_LEVEL_LOW ++#endif ++ ); ++#endif ++#endif /*IRQF_TRIGGER_LOW*/ ++ ++ /* ++ * Initialize the DWC_otg core. ++ */ ++ dev_dbg(&_dev->dev, "Calling dwc_otg_core_init\n"); ++ dwc_otg_core_init(dwc_otg_device->core_if); ++ ++#ifndef DWC_HOST_ONLY ++ /* ++ * Initialize the PCD ++ */ ++ dev_dbg(&_dev->dev, "Calling pcd_init\n"); ++ retval = pcd_init(_dev); ++ if (retval != 0) { ++ DWC_ERROR("pcd_init failed\n"); ++ dwc_otg_device->pcd = NULL; ++ goto fail; ++ } ++#endif ++#ifndef DWC_DEVICE_ONLY ++ /* ++ * Initialize the HCD ++ */ ++ dev_dbg(&_dev->dev, "Calling hcd_init\n"); ++ retval = hcd_init(_dev); ++ if (retval != 0) { ++ DWC_ERROR("hcd_init failed\n"); ++ dwc_otg_device->hcd = NULL; ++ goto fail; ++ } ++#endif ++ /* Recover from drvdata having been overwritten by hcd_init() */ ++#ifdef LM_INTERFACE ++ lm_set_drvdata(_dev, dwc_otg_device); ++#elif defined(PLATFORM_INTERFACE) ++ platform_set_drvdata(_dev, dwc_otg_device); ++#elif defined(PCI_INTERFACE) ++ pci_set_drvdata(_dev, dwc_otg_device); ++ dwc_otg_device->os_dep.pcidev = _dev; ++#endif ++ ++ /* ++ * Enable the global interrupt after all the interrupt ++ * handlers are installed if there is no ADP support else ++ * perform initial actions required for Internal ADP logic. ++ */ ++ if (!dwc_otg_get_param_adp_enable(dwc_otg_device->core_if)) { ++ dev_dbg(&_dev->dev, "Calling enable_global_interrupts\n"); ++ dwc_otg_enable_global_interrupts(dwc_otg_device->core_if); ++ dev_dbg(&_dev->dev, "Done\n"); ++ } else ++ dwc_otg_adp_start(dwc_otg_device->core_if, ++ dwc_otg_is_host_mode(dwc_otg_device->core_if)); ++ ++ return 0; ++ ++fail: ++ dwc_otg_driver_remove(_dev); ++ return retval; ++} ++ ++/** ++ * This structure defines the methods to be called by a bus driver ++ * during the lifecycle of a device on that bus. Both drivers and ++ * devices are registered with a bus driver. The bus driver matches ++ * devices to drivers based on information in the device and driver ++ * structures. ++ * ++ * The probe function is called when the bus driver matches a device ++ * to this driver. The remove function is called when a device is ++ * unregistered with the bus driver. ++ */ ++#ifdef LM_INTERFACE ++static struct lm_driver dwc_otg_driver = { ++ .drv = {.name = (char *)dwc_driver_name,}, ++ .probe = dwc_otg_driver_probe, ++ .remove = dwc_otg_driver_remove, ++ // 'suspend' and 'resume' absent ++}; ++#elif defined(PCI_INTERFACE) ++static const struct pci_device_id pci_ids[] = { { ++ PCI_DEVICE(0x16c3, 0xabcd), ++ .driver_data = ++ (unsigned long)0xdeadbeef, ++ }, { /* end: all zeroes */ } ++}; ++ ++MODULE_DEVICE_TABLE(pci, pci_ids); ++ ++/* pci driver glue; this is a "new style" PCI driver module */ ++static struct pci_driver dwc_otg_driver = { ++ .name = "dwc_otg", ++ .id_table = pci_ids, ++ ++ .probe = dwc_otg_driver_probe, ++ .remove = dwc_otg_driver_remove, ++ ++ .driver = { ++ .name = (char *)dwc_driver_name, ++ }, ++}; ++#elif defined(PLATFORM_INTERFACE) ++static struct platform_device_id platform_ids[] = { ++ { ++ .name = "bcm2708_usb", ++ .driver_data = (kernel_ulong_t) 0xdeadbeef, ++ }, ++ { /* end: all zeroes */ } ++}; ++MODULE_DEVICE_TABLE(platform, platform_ids); ++ ++static struct platform_driver dwc_otg_driver = { ++ .driver = { ++ .name = (char *)dwc_driver_name, ++ }, ++ .id_table = platform_ids, ++ ++ .probe = dwc_otg_driver_probe, ++ .remove = dwc_otg_driver_remove, ++ // no 'shutdown', 'suspend', 'resume', 'suspend_late' or 'resume_early' ++}; ++#endif ++ ++/** ++ * This function is called when the dwc_otg_driver is installed with the ++ * insmod command. It registers the dwc_otg_driver structure with the ++ * appropriate bus driver. This will cause the dwc_otg_driver_probe function ++ * to be called. In addition, the bus driver will automatically expose ++ * attributes defined for the device and driver in the special sysfs file ++ * system. ++ * ++ * @return ++ */ ++static int __init dwc_otg_driver_init(void) ++{ ++ int retval = 0; ++ int error; ++ struct device_driver *drv; ++ printk(KERN_INFO "%s: version %s (%s bus)\n", dwc_driver_name, ++ DWC_DRIVER_VERSION, ++#ifdef LM_INTERFACE ++ "logicmodule"); ++ retval = lm_driver_register(&dwc_otg_driver); ++ drv = &dwc_otg_driver.drv; ++#elif defined(PCI_INTERFACE) ++ "pci"); ++ retval = pci_register_driver(&dwc_otg_driver); ++ drv = &dwc_otg_driver.driver; ++#elif defined(PLATFORM_INTERFACE) ++ "platform"); ++ retval = platform_driver_register(&dwc_otg_driver); ++ drv = &dwc_otg_driver.driver; ++#endif ++ if (retval < 0) { ++ printk(KERN_ERR "%s retval=%d\n", __func__, retval); ++ return retval; ++ } ++ ++ error = driver_create_file(drv, &driver_attr_version); ++#ifdef DEBUG ++ error = driver_create_file(drv, &driver_attr_debuglevel); ++#endif ++ return retval; ++} ++ ++module_init(dwc_otg_driver_init); ++ ++/** ++ * This function is called when the driver is removed from the kernel ++ * with the rmmod command. The driver unregisters itself with its bus ++ * driver. ++ * ++ */ ++static void __exit dwc_otg_driver_cleanup(void) ++{ ++ printk(KERN_DEBUG "dwc_otg_driver_cleanup()\n"); ++ ++#ifdef LM_INTERFACE ++ driver_remove_file(&dwc_otg_driver.drv, &driver_attr_debuglevel); ++ driver_remove_file(&dwc_otg_driver.drv, &driver_attr_version); ++ lm_driver_unregister(&dwc_otg_driver); ++#elif defined(PCI_INTERFACE) ++ driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel); ++ driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version); ++ pci_unregister_driver(&dwc_otg_driver); ++#elif defined(PLATFORM_INTERFACE) ++ driver_remove_file(&dwc_otg_driver.driver, &driver_attr_debuglevel); ++ driver_remove_file(&dwc_otg_driver.driver, &driver_attr_version); ++ platform_driver_unregister(&dwc_otg_driver); ++#endif ++ ++ printk(KERN_INFO "%s module removed\n", dwc_driver_name); ++} ++ ++module_exit(dwc_otg_driver_cleanup); ++ ++MODULE_DESCRIPTION(DWC_DRIVER_DESC); ++MODULE_AUTHOR("Synopsys Inc."); ++MODULE_LICENSE("GPL"); ++ ++module_param_named(otg_cap, dwc_otg_module_params.otg_cap, int, 0444); ++MODULE_PARM_DESC(otg_cap, "OTG Capabilities 0=HNP&SRP 1=SRP Only 2=None"); ++module_param_named(opt, dwc_otg_module_params.opt, int, 0444); ++MODULE_PARM_DESC(opt, "OPT Mode"); ++module_param_named(dma_enable, dwc_otg_module_params.dma_enable, int, 0444); ++MODULE_PARM_DESC(dma_enable, "DMA Mode 0=Slave 1=DMA enabled"); ++ ++module_param_named(dma_desc_enable, dwc_otg_module_params.dma_desc_enable, int, ++ 0444); ++MODULE_PARM_DESC(dma_desc_enable, ++ "DMA Desc Mode 0=Address DMA 1=DMA Descriptor enabled"); ++ ++module_param_named(dma_burst_size, dwc_otg_module_params.dma_burst_size, int, ++ 0444); ++MODULE_PARM_DESC(dma_burst_size, ++ "DMA Burst Size 1, 4, 8, 16, 32, 64, 128, 256"); ++module_param_named(speed, dwc_otg_module_params.speed, int, 0444); ++MODULE_PARM_DESC(speed, "Speed 0=High Speed 1=Full Speed"); ++module_param_named(host_support_fs_ls_low_power, ++ dwc_otg_module_params.host_support_fs_ls_low_power, int, ++ 0444); ++MODULE_PARM_DESC(host_support_fs_ls_low_power, ++ "Support Low Power w/FS or LS 0=Support 1=Don't Support"); ++module_param_named(host_ls_low_power_phy_clk, ++ dwc_otg_module_params.host_ls_low_power_phy_clk, int, 0444); ++MODULE_PARM_DESC(host_ls_low_power_phy_clk, ++ "Low Speed Low Power Clock 0=48Mhz 1=6Mhz"); ++module_param_named(enable_dynamic_fifo, ++ dwc_otg_module_params.enable_dynamic_fifo, int, 0444); ++MODULE_PARM_DESC(enable_dynamic_fifo, "0=cC Setting 1=Allow Dynamic Sizing"); ++module_param_named(data_fifo_size, dwc_otg_module_params.data_fifo_size, int, ++ 0444); ++MODULE_PARM_DESC(data_fifo_size, ++ "Total number of words in the data FIFO memory 32-32768"); ++module_param_named(dev_rx_fifo_size, dwc_otg_module_params.dev_rx_fifo_size, ++ int, 0444); ++MODULE_PARM_DESC(dev_rx_fifo_size, "Number of words in the Rx FIFO 16-32768"); ++module_param_named(dev_nperio_tx_fifo_size, ++ dwc_otg_module_params.dev_nperio_tx_fifo_size, int, 0444); ++MODULE_PARM_DESC(dev_nperio_tx_fifo_size, ++ "Number of words in the non-periodic Tx FIFO 16-32768"); ++module_param_named(dev_perio_tx_fifo_size_1, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[0], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_1, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_2, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[1], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_2, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_3, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[2], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_3, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_4, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[3], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_4, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_5, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[4], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_5, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_6, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[5], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_6, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_7, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[6], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_7, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_8, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[7], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_8, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_9, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[8], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_9, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_10, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[9], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_10, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_11, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[10], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_11, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_12, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[11], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_12, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_13, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[12], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_13, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_14, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[13], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_14, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(dev_perio_tx_fifo_size_15, ++ dwc_otg_module_params.dev_perio_tx_fifo_size[14], int, 0444); ++MODULE_PARM_DESC(dev_perio_tx_fifo_size_15, ++ "Number of words in the periodic Tx FIFO 4-768"); ++module_param_named(host_rx_fifo_size, dwc_otg_module_params.host_rx_fifo_size, ++ int, 0444); ++MODULE_PARM_DESC(host_rx_fifo_size, "Number of words in the Rx FIFO 16-32768"); ++module_param_named(host_nperio_tx_fifo_size, ++ dwc_otg_module_params.host_nperio_tx_fifo_size, int, 0444); ++MODULE_PARM_DESC(host_nperio_tx_fifo_size, ++ "Number of words in the non-periodic Tx FIFO 16-32768"); ++module_param_named(host_perio_tx_fifo_size, ++ dwc_otg_module_params.host_perio_tx_fifo_size, int, 0444); ++MODULE_PARM_DESC(host_perio_tx_fifo_size, ++ "Number of words in the host periodic Tx FIFO 16-32768"); ++module_param_named(max_transfer_size, dwc_otg_module_params.max_transfer_size, ++ int, 0444); ++/** @todo Set the max to 512K, modify checks */ ++MODULE_PARM_DESC(max_transfer_size, ++ "The maximum transfer size supported in bytes 2047-65535"); ++module_param_named(max_packet_count, dwc_otg_module_params.max_packet_count, ++ int, 0444); ++MODULE_PARM_DESC(max_packet_count, ++ "The maximum number of packets in a transfer 15-511"); ++module_param_named(host_channels, dwc_otg_module_params.host_channels, int, ++ 0444); ++MODULE_PARM_DESC(host_channels, ++ "The number of host channel registers to use 1-16"); ++module_param_named(dev_endpoints, dwc_otg_module_params.dev_endpoints, int, ++ 0444); ++MODULE_PARM_DESC(dev_endpoints, ++ "The number of endpoints in addition to EP0 available for device mode 1-15"); ++module_param_named(phy_type, dwc_otg_module_params.phy_type, int, 0444); ++MODULE_PARM_DESC(phy_type, "0=Reserved 1=UTMI+ 2=ULPI"); ++module_param_named(phy_utmi_width, dwc_otg_module_params.phy_utmi_width, int, ++ 0444); ++MODULE_PARM_DESC(phy_utmi_width, "Specifies the UTMI+ Data Width 8 or 16 bits"); ++module_param_named(phy_ulpi_ddr, dwc_otg_module_params.phy_ulpi_ddr, int, 0444); ++MODULE_PARM_DESC(phy_ulpi_ddr, ++ "ULPI at double or single data rate 0=Single 1=Double"); ++module_param_named(phy_ulpi_ext_vbus, dwc_otg_module_params.phy_ulpi_ext_vbus, ++ int, 0444); ++MODULE_PARM_DESC(phy_ulpi_ext_vbus, ++ "ULPI PHY using internal or external vbus 0=Internal"); ++module_param_named(i2c_enable, dwc_otg_module_params.i2c_enable, int, 0444); ++MODULE_PARM_DESC(i2c_enable, "FS PHY Interface"); ++module_param_named(ulpi_fs_ls, dwc_otg_module_params.ulpi_fs_ls, int, 0444); ++MODULE_PARM_DESC(ulpi_fs_ls, "ULPI PHY FS/LS mode only"); ++module_param_named(ts_dline, dwc_otg_module_params.ts_dline, int, 0444); ++MODULE_PARM_DESC(ts_dline, "Term select Dline pulsing for all PHYs"); ++module_param_named(debug, g_dbg_lvl, int, 0444); ++MODULE_PARM_DESC(debug, ""); ++ ++module_param_named(en_multiple_tx_fifo, ++ dwc_otg_module_params.en_multiple_tx_fifo, int, 0444); ++MODULE_PARM_DESC(en_multiple_tx_fifo, ++ "Dedicated Non Periodic Tx FIFOs 0=disabled 1=enabled"); ++module_param_named(dev_tx_fifo_size_1, ++ dwc_otg_module_params.dev_tx_fifo_size[0], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_1, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_2, ++ dwc_otg_module_params.dev_tx_fifo_size[1], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_2, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_3, ++ dwc_otg_module_params.dev_tx_fifo_size[2], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_3, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_4, ++ dwc_otg_module_params.dev_tx_fifo_size[3], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_4, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_5, ++ dwc_otg_module_params.dev_tx_fifo_size[4], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_5, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_6, ++ dwc_otg_module_params.dev_tx_fifo_size[5], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_6, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_7, ++ dwc_otg_module_params.dev_tx_fifo_size[6], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_7, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_8, ++ dwc_otg_module_params.dev_tx_fifo_size[7], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_8, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_9, ++ dwc_otg_module_params.dev_tx_fifo_size[8], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_9, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_10, ++ dwc_otg_module_params.dev_tx_fifo_size[9], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_10, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_11, ++ dwc_otg_module_params.dev_tx_fifo_size[10], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_11, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_12, ++ dwc_otg_module_params.dev_tx_fifo_size[11], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_12, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_13, ++ dwc_otg_module_params.dev_tx_fifo_size[12], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_13, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_14, ++ dwc_otg_module_params.dev_tx_fifo_size[13], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_14, "Number of words in the Tx FIFO 4-768"); ++module_param_named(dev_tx_fifo_size_15, ++ dwc_otg_module_params.dev_tx_fifo_size[14], int, 0444); ++MODULE_PARM_DESC(dev_tx_fifo_size_15, "Number of words in the Tx FIFO 4-768"); ++ ++module_param_named(thr_ctl, dwc_otg_module_params.thr_ctl, int, 0444); ++MODULE_PARM_DESC(thr_ctl, ++ "Thresholding enable flag bit 0 - non ISO Tx thr., 1 - ISO Tx thr., 2 - Rx thr.- bit 0=disabled 1=enabled"); ++module_param_named(tx_thr_length, dwc_otg_module_params.tx_thr_length, int, ++ 0444); ++MODULE_PARM_DESC(tx_thr_length, "Tx Threshold length in 32 bit DWORDs"); ++module_param_named(rx_thr_length, dwc_otg_module_params.rx_thr_length, int, ++ 0444); ++MODULE_PARM_DESC(rx_thr_length, "Rx Threshold length in 32 bit DWORDs"); ++ ++module_param_named(pti_enable, dwc_otg_module_params.pti_enable, int, 0444); ++module_param_named(mpi_enable, dwc_otg_module_params.mpi_enable, int, 0444); ++module_param_named(lpm_enable, dwc_otg_module_params.lpm_enable, int, 0444); ++MODULE_PARM_DESC(lpm_enable, "LPM Enable 0=LPM Disabled 1=LPM Enabled"); ++module_param_named(ic_usb_cap, dwc_otg_module_params.ic_usb_cap, int, 0444); ++MODULE_PARM_DESC(ic_usb_cap, ++ "IC_USB Capability 0=IC_USB Disabled 1=IC_USB Enabled"); ++module_param_named(ahb_thr_ratio, dwc_otg_module_params.ahb_thr_ratio, int, ++ 0444); ++MODULE_PARM_DESC(ahb_thr_ratio, "AHB Threshold Ratio"); ++module_param_named(power_down, dwc_otg_module_params.power_down, int, 0444); ++MODULE_PARM_DESC(power_down, "Power Down Mode"); ++module_param_named(reload_ctl, dwc_otg_module_params.reload_ctl, int, 0444); ++MODULE_PARM_DESC(reload_ctl, "HFIR Reload Control"); ++module_param_named(dev_out_nak, dwc_otg_module_params.dev_out_nak, int, 0444); ++MODULE_PARM_DESC(dev_out_nak, "Enable Device OUT NAK"); ++module_param_named(cont_on_bna, dwc_otg_module_params.cont_on_bna, int, 0444); ++MODULE_PARM_DESC(cont_on_bna, "Enable Enable Continue on BNA"); ++module_param_named(ahb_single, dwc_otg_module_params.ahb_single, int, 0444); ++MODULE_PARM_DESC(ahb_single, "Enable AHB Single Support"); ++module_param_named(adp_enable, dwc_otg_module_params.adp_enable, int, 0444); ++MODULE_PARM_DESC(adp_enable, "ADP Enable 0=ADP Disabled 1=ADP Enabled"); ++module_param_named(otg_ver, dwc_otg_module_params.otg_ver, int, 0444); ++MODULE_PARM_DESC(otg_ver, "OTG revision supported 0=OTG 1.3 1=OTG 2.0"); ++module_param(microframe_schedule, bool, 0444); ++MODULE_PARM_DESC(microframe_schedule, "Enable the microframe scheduler"); ++ ++/** @page "Module Parameters" ++ * ++ * The following parameters may be specified when starting the module. ++ * These parameters define how the DWC_otg controller should be ++ * configured. Parameter values are passed to the CIL initialization ++ * function dwc_otg_cil_init ++ * ++ * Example: modprobe dwc_otg speed=1 otg_cap=1 ++ * ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ ++*/ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,86 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_driver.h $ ++ * $Revision: #19 $ ++ * $Date: 2010/11/15 $ ++ * $Change: 1627671 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#ifndef __DWC_OTG_DRIVER_H__ ++#define __DWC_OTG_DRIVER_H__ ++ ++/** @file ++ * This file contains the interface to the Linux driver. ++ */ ++#include "dwc_otg_os_dep.h" ++#include "dwc_otg_core_if.h" ++ ++/* Type declarations */ ++struct dwc_otg_pcd; ++struct dwc_otg_hcd; ++ ++/** ++ * This structure is a wrapper that encapsulates the driver components used to ++ * manage a single DWC_otg controller. ++ */ ++typedef struct dwc_otg_device { ++ /** Structure containing OS-dependent stuff. KEEP THIS STRUCT AT THE ++ * VERY BEGINNING OF THE DEVICE STRUCT. OSes such as FreeBSD and NetBSD ++ * require this. */ ++ struct os_dependent os_dep; ++ ++ /** Pointer to the core interface structure. */ ++ dwc_otg_core_if_t *core_if; ++ ++ /** Pointer to the PCD structure. */ ++ struct dwc_otg_pcd *pcd; ++ ++ /** Pointer to the HCD structure. */ ++ struct dwc_otg_hcd *hcd; ++ ++ /** Flag to indicate whether the common IRQ handler is installed. */ ++ uint8_t common_irq_installed; ++ ++} dwc_otg_device_t; ++ ++/*We must clear S3C24XX_EINTPEND external interrupt register ++ * because after clearing in this register trigerred IRQ from ++ * H/W core in kernel interrupt can be occured again before OTG ++ * handlers clear all IRQ sources of Core registers because of ++ * timing latencies and Low Level IRQ Type. ++ */ ++#ifdef CONFIG_MACH_IPMATE ++#define S3C2410X_CLEAR_EINTPEND() \ ++do { \ ++ __raw_writel(1UL << 11,S3C24XX_EINTPEND); \ ++} while (0) ++#else ++#define S3C2410X_CLEAR_EINTPEND() do { } while (0) ++#endif ++ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,3473 @@ ++ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.c $ ++ * $Revision: #104 $ ++ * $Date: 2011/10/24 $ ++ * $Change: 1871159 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++ ++/** @file ++ * This file implements HCD Core. All code in this file is portable and doesn't ++ * use any OS specific functions. ++ * Interface provided by HCD Core is defined in ++ * header file. ++ */ ++ ++#include "dwc_otg_hcd.h" ++#include "dwc_otg_regs.h" ++ ++extern bool microframe_schedule; ++ ++//#define DEBUG_HOST_CHANNELS ++#ifdef DEBUG_HOST_CHANNELS ++static int last_sel_trans_num_per_scheduled = 0; ++static int last_sel_trans_num_nonper_scheduled = 0; ++static int last_sel_trans_num_avail_hc_at_start = 0; ++static int last_sel_trans_num_avail_hc_at_end = 0; ++#endif /* DEBUG_HOST_CHANNELS */ ++ ++dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void) ++{ ++ return DWC_ALLOC(sizeof(dwc_otg_hcd_t)); ++} ++ ++/** ++ * Connection timeout function. An OTG host is required to display a ++ * message if the device does not connect within 10 seconds. ++ */ ++void dwc_otg_hcd_connect_timeout(void *ptr) ++{ ++ DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, ptr); ++ DWC_PRINTF("Connect Timeout\n"); ++ __DWC_ERROR("Device Not Connected/Responding\n"); ++} ++ ++#if defined(DEBUG) ++static void dump_channel_info(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ if (qh->channel != NULL) { ++ dwc_hc_t *hc = qh->channel; ++ dwc_list_link_t *item; ++ dwc_otg_qh_t *qh_item; ++ int num_channels = hcd->core_if->core_params->host_channels; ++ int i; ++ ++ dwc_otg_hc_regs_t *hc_regs; ++ hcchar_data_t hcchar; ++ hcsplt_data_t hcsplt; ++ hctsiz_data_t hctsiz; ++ uint32_t hcdma; ++ ++ hc_regs = hcd->core_if->host_if->hc_regs[hc->hc_num]; ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt); ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ hcdma = DWC_READ_REG32(&hc_regs->hcdma); ++ ++ DWC_PRINTF(" Assigned to channel %p:\n", hc); ++ DWC_PRINTF(" hcchar 0x%08x, hcsplt 0x%08x\n", hcchar.d32, ++ hcsplt.d32); ++ DWC_PRINTF(" hctsiz 0x%08x, hcdma 0x%08x\n", hctsiz.d32, ++ hcdma); ++ DWC_PRINTF(" dev_addr: %d, ep_num: %d, ep_is_in: %d\n", ++ hc->dev_addr, hc->ep_num, hc->ep_is_in); ++ DWC_PRINTF(" ep_type: %d\n", hc->ep_type); ++ DWC_PRINTF(" max_packet: %d\n", hc->max_packet); ++ DWC_PRINTF(" data_pid_start: %d\n", hc->data_pid_start); ++ DWC_PRINTF(" xfer_started: %d\n", hc->xfer_started); ++ DWC_PRINTF(" halt_status: %d\n", hc->halt_status); ++ DWC_PRINTF(" xfer_buff: %p\n", hc->xfer_buff); ++ DWC_PRINTF(" xfer_len: %d\n", hc->xfer_len); ++ DWC_PRINTF(" qh: %p\n", hc->qh); ++ DWC_PRINTF(" NP inactive sched:\n"); ++ DWC_LIST_FOREACH(item, &hcd->non_periodic_sched_inactive) { ++ qh_item = ++ DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry); ++ DWC_PRINTF(" %p\n", qh_item); ++ } ++ DWC_PRINTF(" NP active sched:\n"); ++ DWC_LIST_FOREACH(item, &hcd->non_periodic_sched_active) { ++ qh_item = ++ DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry); ++ DWC_PRINTF(" %p\n", qh_item); ++ } ++ DWC_PRINTF(" Channels: \n"); ++ for (i = 0; i < num_channels; i++) { ++ dwc_hc_t *hc = hcd->hc_ptr_array[i]; ++ DWC_PRINTF(" %2d: %p\n", i, hc); ++ } ++ } ++} ++#else ++#define dump_channel_info(hcd, qh) ++#endif /* DEBUG */ ++ ++/** ++ * Work queue function for starting the HCD when A-Cable is connected. ++ * The hcd_start() must be called in a process context. ++ */ ++static void hcd_start_func(void *_vp) ++{ ++ dwc_otg_hcd_t *hcd = (dwc_otg_hcd_t *) _vp; ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s() %p\n", __func__, hcd); ++ if (hcd) { ++ hcd->fops->start(hcd); ++ } ++} ++ ++static void del_xfer_timers(dwc_otg_hcd_t * hcd) ++{ ++#ifdef DEBUG ++ int i; ++ int num_channels = hcd->core_if->core_params->host_channels; ++ for (i = 0; i < num_channels; i++) { ++ DWC_TIMER_CANCEL(hcd->core_if->hc_xfer_timer[i]); ++ } ++#endif ++} ++ ++static void del_timers(dwc_otg_hcd_t * hcd) ++{ ++ del_xfer_timers(hcd); ++ DWC_TIMER_CANCEL(hcd->conn_timer); ++} ++ ++/** ++ * Processes all the URBs in a single list of QHs. Completes them with ++ * -ETIMEDOUT and frees the QTD. ++ */ ++static void kill_urbs_in_qh_list(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list) ++{ ++ dwc_list_link_t *qh_item; ++ dwc_otg_qh_t *qh; ++ dwc_otg_qtd_t *qtd, *qtd_tmp; ++ ++ DWC_LIST_FOREACH(qh_item, qh_list) { ++ qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry); ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, ++ &qh->qtd_list, qtd_list_entry) { ++ qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); ++ if (qtd->urb != NULL) { ++ hcd->fops->complete(hcd, qtd->urb->priv, ++ qtd->urb, -DWC_E_TIMEOUT); ++ dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); ++ } ++ ++ } ++ } ++} ++ ++/** ++ * Responds with an error status of ETIMEDOUT to all URBs in the non-periodic ++ * and periodic schedules. The QTD associated with each URB is removed from ++ * the schedule and freed. This function may be called when a disconnect is ++ * detected or when the HCD is being stopped. ++ */ ++static void kill_all_urbs(dwc_otg_hcd_t * hcd) ++{ ++ kill_urbs_in_qh_list(hcd, &hcd->non_periodic_sched_inactive); ++ kill_urbs_in_qh_list(hcd, &hcd->non_periodic_sched_active); ++ kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_inactive); ++ kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_ready); ++ kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_assigned); ++ kill_urbs_in_qh_list(hcd, &hcd->periodic_sched_queued); ++} ++ ++/** ++ * Start the connection timer. An OTG host is required to display a ++ * message if the device does not connect within 10 seconds. The ++ * timer is deleted if a port connect interrupt occurs before the ++ * timer expires. ++ */ ++static void dwc_otg_hcd_start_connect_timer(dwc_otg_hcd_t * hcd) ++{ ++ DWC_TIMER_SCHEDULE(hcd->conn_timer, 10000 /* 10 secs */ ); ++} ++ ++/** ++ * HCD Callback function for disconnect of the HCD. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int32_t dwc_otg_hcd_session_start_cb(void *p) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd; ++ DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, p); ++ dwc_otg_hcd = p; ++ dwc_otg_hcd_start_connect_timer(dwc_otg_hcd); ++ return 1; ++} ++ ++/** ++ * HCD Callback function for starting the HCD when A-Cable is ++ * connected. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int32_t dwc_otg_hcd_start_cb(void *p) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = p; ++ dwc_otg_core_if_t *core_if; ++ hprt0_data_t hprt0; ++ ++ core_if = dwc_otg_hcd->core_if; ++ ++ if (core_if->op_state == B_HOST) { ++ /* ++ * Reset the port. During a HNP mode switch the reset ++ * needs to occur within 1ms and have a duration of at ++ * least 50ms. ++ */ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtrst = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ } ++ DWC_WORKQ_SCHEDULE_DELAYED(core_if->wq_otg, ++ hcd_start_func, dwc_otg_hcd, 50, ++ "start hcd"); ++ ++ return 1; ++} ++ ++/** ++ * HCD Callback function for disconnect of the HCD. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int32_t dwc_otg_hcd_disconnect_cb(void *p) ++{ ++ gintsts_data_t intr; ++ dwc_otg_hcd_t *dwc_otg_hcd = p; ++ ++ /* ++ * Set status flags for the hub driver. ++ */ ++ dwc_otg_hcd->flags.b.port_connect_status_change = 1; ++ dwc_otg_hcd->flags.b.port_connect_status = 0; ++ ++ /* ++ * Shutdown any transfers in process by clearing the Tx FIFO Empty ++ * interrupt mask and status bits and disabling subsequent host ++ * channel interrupts. ++ */ ++ intr.d32 = 0; ++ intr.b.nptxfempty = 1; ++ intr.b.ptxfempty = 1; ++ intr.b.hcintr = 1; ++ DWC_MODIFY_REG32(&dwc_otg_hcd->core_if->core_global_regs->gintmsk, ++ intr.d32, 0); ++ DWC_MODIFY_REG32(&dwc_otg_hcd->core_if->core_global_regs->gintsts, ++ intr.d32, 0); ++ ++ del_timers(dwc_otg_hcd); ++ ++ /* ++ * Turn off the vbus power only if the core has transitioned to device ++ * mode. If still in host mode, need to keep power on to detect a ++ * reconnection. ++ */ ++ if (dwc_otg_is_device_mode(dwc_otg_hcd->core_if)) { ++ if (dwc_otg_hcd->core_if->op_state != A_SUSPEND) { ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ DWC_PRINTF("Disconnect: PortPower off\n"); ++ hprt0.b.prtpwr = 0; ++ DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0, ++ hprt0.d32); ++ } ++ ++ dwc_otg_disable_host_interrupts(dwc_otg_hcd->core_if); ++ } ++ ++ /* Respond with an error status to all URBs in the schedule. */ ++ kill_all_urbs(dwc_otg_hcd); ++ ++ if (dwc_otg_is_host_mode(dwc_otg_hcd->core_if)) { ++ /* Clean up any host channels that were in use. */ ++ int num_channels; ++ int i; ++ dwc_hc_t *channel; ++ dwc_otg_hc_regs_t *hc_regs; ++ hcchar_data_t hcchar; ++ ++ num_channels = dwc_otg_hcd->core_if->core_params->host_channels; ++ ++ if (!dwc_otg_hcd->core_if->dma_enable) { ++ /* Flush out any channel requests in slave mode. */ ++ for (i = 0; i < num_channels; i++) { ++ channel = dwc_otg_hcd->hc_ptr_array[i]; ++ if (DWC_CIRCLEQ_EMPTY_ENTRY ++ (channel, hc_list_entry)) { ++ hc_regs = ++ dwc_otg_hcd->core_if-> ++ host_if->hc_regs[i]; ++ hcchar.d32 = ++ DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen) { ++ hcchar.b.chen = 0; ++ hcchar.b.chdis = 1; ++ hcchar.b.epdir = 0; ++ DWC_WRITE_REG32 ++ (&hc_regs->hcchar, ++ hcchar.d32); ++ } ++ } ++ } ++ } ++ ++ for (i = 0; i < num_channels; i++) { ++ channel = dwc_otg_hcd->hc_ptr_array[i]; ++ if (DWC_CIRCLEQ_EMPTY_ENTRY(channel, hc_list_entry)) { ++ hc_regs = ++ dwc_otg_hcd->core_if->host_if->hc_regs[i]; ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen) { ++ /* Halt the channel. */ ++ hcchar.b.chdis = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, ++ hcchar.d32); ++ } ++ ++ dwc_otg_hc_cleanup(dwc_otg_hcd->core_if, ++ channel); ++ DWC_CIRCLEQ_INSERT_TAIL ++ (&dwc_otg_hcd->free_hc_list, channel, ++ hc_list_entry); ++ /* ++ * Added for Descriptor DMA to prevent channel double cleanup ++ * in release_channel_ddma(). Which called from ep_disable ++ * when device disconnect. ++ */ ++ channel->qh = NULL; ++ } ++ } ++ } ++ ++ if (dwc_otg_hcd->fops->disconnect) { ++ dwc_otg_hcd->fops->disconnect(dwc_otg_hcd); ++ } ++ ++ return 1; ++} ++ ++/** ++ * HCD Callback function for stopping the HCD. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int32_t dwc_otg_hcd_stop_cb(void *p) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = p; ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s(%p)\n", __func__, p); ++ dwc_otg_hcd_stop(dwc_otg_hcd); ++ return 1; ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++/** ++ * HCD Callback function for sleep of HCD. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int dwc_otg_hcd_sleep_cb(void *p) ++{ ++ dwc_otg_hcd_t *hcd = p; ++ ++ dwc_otg_hcd_free_hc_from_lpm(hcd); ++ ++ return 0; ++} ++#endif ++ ++/** ++ * HCD Callback function for Remote Wakeup. ++ * ++ * @param p void pointer to the struct usb_hcd ++ */ ++static int dwc_otg_hcd_rem_wakeup_cb(void *p) ++{ ++ dwc_otg_hcd_t *hcd = p; ++ ++ if (hcd->core_if->lx_state == DWC_OTG_L2) { ++ hcd->flags.b.port_suspend_change = 1; ++ } ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ else { ++ hcd->flags.b.port_l1_change = 1; ++ } ++#endif ++ return 0; ++} ++ ++/** ++ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are ++ * stopped. ++ */ ++void dwc_otg_hcd_stop(dwc_otg_hcd_t * hcd) ++{ ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD STOP\n"); ++ ++ /* ++ * The root hub should be disconnected before this function is called. ++ * The disconnect will clear the QTD lists (via ..._hcd_urb_dequeue) ++ * and the QH lists (via ..._hcd_endpoint_disable). ++ */ ++ ++ /* Turn off all host-specific interrupts. */ ++ dwc_otg_disable_host_interrupts(hcd->core_if); ++ ++ /* Turn off the vbus power */ ++ DWC_PRINTF("PortPower off\n"); ++ hprt0.b.prtpwr = 0; ++ DWC_WRITE_REG32(hcd->core_if->host_if->hprt0, hprt0.d32); ++ dwc_mdelay(1); ++} ++ ++int dwc_otg_hcd_urb_enqueue(dwc_otg_hcd_t * hcd, ++ dwc_otg_hcd_urb_t * dwc_otg_urb, void **ep_handle, ++ int atomic_alloc) ++{ ++ dwc_irqflags_t flags; ++ int retval = 0; ++ dwc_otg_qtd_t *qtd; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++#ifdef DEBUG /* integrity checks (Broadcom) */ ++ if (NULL == hcd->core_if) { ++ DWC_ERROR("**** DWC OTG HCD URB Enqueue - HCD has NULL core_if\n"); ++ /* No longer connected. */ ++ return -DWC_E_INVALID; ++ } ++#endif ++ if (!hcd->flags.b.port_connect_status) { ++ /* No longer connected. */ ++ DWC_ERROR("Not connected\n"); ++ return -DWC_E_NO_DEVICE; ++ } ++ ++ qtd = dwc_otg_hcd_qtd_create(dwc_otg_urb, atomic_alloc); ++ if (qtd == NULL) { ++ DWC_ERROR("DWC OTG HCD URB Enqueue failed creating QTD\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++#ifdef DEBUG /* integrity checks (Broadcom) */ ++ if (qtd->urb == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Enqueue created QTD with no URBs\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++ if (qtd->urb->priv == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Enqueue created QTD URB with no URB handle\n"); ++ return -DWC_E_NO_MEMORY; ++ } ++#endif ++ retval = ++ dwc_otg_hcd_qtd_add(qtd, hcd, (dwc_otg_qh_t **) ep_handle, atomic_alloc); ++ // creates a new queue in ep_handle if it doesn't exist already ++ if (retval < 0) { ++ DWC_ERROR("DWC OTG HCD URB Enqueue failed adding QTD. " ++ "Error status %d\n", retval); ++ dwc_otg_hcd_qtd_free(qtd); ++ } else { ++ qtd->qh = *ep_handle; ++ } ++ intr_mask.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->gintmsk); ++ if (!intr_mask.b.sofintr && retval == 0) { ++ dwc_otg_transaction_type_e tr_type; ++ if ((qtd->qh->ep_type == UE_BULK) ++ && !(qtd->urb->flags & URB_GIVEBACK_ASAP)) { ++ /* Do not schedule SG transactions until qtd has URB_GIVEBACK_ASAP set */ ++ return 0; ++ } ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ tr_type = dwc_otg_hcd_select_transactions(hcd); ++ if (tr_type != DWC_OTG_TRANSACTION_NONE) { ++ dwc_otg_hcd_queue_transactions(hcd, tr_type); ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ } ++ ++ return retval; ++} ++ ++int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_t * hcd, ++ dwc_otg_hcd_urb_t * dwc_otg_urb) ++{ ++ dwc_otg_qh_t *qh; ++ dwc_otg_qtd_t *urb_qtd; ++ ++#ifdef DEBUG /* integrity checks (Broadcom) */ ++ ++ if (hcd == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Dequeue has NULL HCD\n"); ++ return -DWC_E_INVALID; ++ } ++ if (dwc_otg_urb == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Dequeue has NULL URB\n"); ++ return -DWC_E_INVALID; ++ } ++ if (dwc_otg_urb->qtd == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Dequeue with NULL QTD\n"); ++ return -DWC_E_INVALID; ++ } ++ urb_qtd = dwc_otg_urb->qtd; ++ if (urb_qtd->qh == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Dequeue with QTD with NULL Q handler\n"); ++ return -DWC_E_INVALID; ++ } ++#else ++ urb_qtd = dwc_otg_urb->qtd; ++#endif ++ qh = urb_qtd->qh; ++ if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { ++ if (urb_qtd->in_process) { ++ dump_channel_info(hcd, qh); ++ } ++ } ++#ifdef DEBUG /* integrity checks (Broadcom) */ ++ if (hcd->core_if == NULL) { ++ DWC_ERROR("**** DWC OTG HCD URB Dequeue HCD has NULL core_if\n"); ++ return -DWC_E_INVALID; ++ } ++#endif ++ if (urb_qtd->in_process && qh->channel) { ++ /* The QTD is in process (it has been assigned to a channel). */ ++ if (hcd->flags.b.port_connect_status) { ++ /* ++ * If still connected (i.e. in host mode), halt the ++ * channel so it can be used for other transfers. If ++ * no longer connected, the host registers can't be ++ * written to halt the channel since the core is in ++ * device mode. ++ */ ++ dwc_otg_hc_halt(hcd->core_if, qh->channel, ++ DWC_OTG_HC_XFER_URB_DEQUEUE); ++ } ++ } ++ ++ /* ++ * Free the QTD and clean up the associated QH. Leave the QH in the ++ * schedule if it has any remaining QTDs. ++ */ ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue - " ++ "delete %sQueue handler\n", ++ hcd->core_if->dma_desc_enable?"DMA ":""); ++ if (!hcd->core_if->dma_desc_enable) { ++ uint8_t b = urb_qtd->in_process; ++ dwc_otg_hcd_qtd_remove_and_free(hcd, urb_qtd, qh); ++ if (b) { ++ dwc_otg_hcd_qh_deactivate(hcd, qh, 0); ++ qh->channel = NULL; ++ } else if (DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ } ++ } else { ++ dwc_otg_hcd_qtd_remove_and_free(hcd, urb_qtd, qh); ++ } ++ return 0; ++} ++ ++int dwc_otg_hcd_endpoint_disable(dwc_otg_hcd_t * hcd, void *ep_handle, ++ int retry) ++{ ++ dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle; ++ int retval = 0; ++ dwc_irqflags_t flags; ++ ++ if (retry < 0) { ++ retval = -DWC_E_INVALID; ++ goto done; ++ } ++ ++ if (!qh) { ++ retval = -DWC_E_INVALID; ++ goto done; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ ++ while (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list) && retry) { ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ retry--; ++ dwc_msleep(5); ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ } ++ ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ /* ++ * Split dwc_otg_hcd_qh_remove_and_free() into qh_remove ++ * and qh_free to prevent stack dump on DWC_DMA_FREE() with ++ * irq_disabled (spinlock_irqsave) in dwc_otg_hcd_desc_list_free() ++ * and dwc_otg_hcd_frame_list_alloc(). ++ */ ++ dwc_otg_hcd_qh_free(hcd, qh); ++ ++done: ++ return retval; ++} ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30) ++int dwc_otg_hcd_endpoint_reset(dwc_otg_hcd_t * hcd, void *ep_handle) ++{ ++ int retval = 0; ++ dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle; ++ if (!qh) ++ return -DWC_E_INVALID; ++ ++ qh->data_toggle = DWC_OTG_HC_PID_DATA0; ++ return retval; ++} ++#endif ++ ++/** ++ * HCD Callback structure for handling mode switching. ++ */ ++static dwc_otg_cil_callbacks_t hcd_cil_callbacks = { ++ .start = dwc_otg_hcd_start_cb, ++ .stop = dwc_otg_hcd_stop_cb, ++ .disconnect = dwc_otg_hcd_disconnect_cb, ++ .session_start = dwc_otg_hcd_session_start_cb, ++ .resume_wakeup = dwc_otg_hcd_rem_wakeup_cb, ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ .sleep = dwc_otg_hcd_sleep_cb, ++#endif ++ .p = 0, ++}; ++ ++/** ++ * Reset tasklet function ++ */ ++static void reset_tasklet_func(void *data) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = (dwc_otg_hcd_t *) data; ++ dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if; ++ hprt0_data_t hprt0; ++ ++ DWC_DEBUGPL(DBG_HCDV, "USB RESET tasklet called\n"); ++ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtrst = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ dwc_mdelay(60); ++ ++ hprt0.b.prtrst = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ dwc_otg_hcd->flags.b.port_reset_change = 1; ++} ++ ++static void qh_list_free(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list) ++{ ++ dwc_list_link_t *item; ++ dwc_otg_qh_t *qh; ++ dwc_irqflags_t flags; ++ ++ if (!qh_list->next) { ++ /* The list hasn't been initialized yet. */ ++ return; ++ } ++ /* ++ * Hold spinlock here. Not needed in that case if bellow ++ * function is being called from ISR ++ */ ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ /* Ensure there are no QTDs or URBs left. */ ++ kill_urbs_in_qh_list(hcd, qh_list); ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ ++ DWC_LIST_FOREACH(item, qh_list) { ++ qh = DWC_LIST_ENTRY(item, dwc_otg_qh_t, qh_list_entry); ++ dwc_otg_hcd_qh_remove_and_free(hcd, qh); ++ } ++} ++ ++/** ++ * Exit from Hibernation if Host did not detect SRP from connected SRP capable ++ * Device during SRP time by host power up. ++ */ ++void dwc_otg_hcd_power_up(void *ptr) ++{ ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr; ++ ++ DWC_PRINTF("%s called\n", __FUNCTION__); ++ ++ if (!core_if->hibernation_suspend) { ++ DWC_PRINTF("Already exited from Hibernation\n"); ++ return; ++ } ++ ++ /* Switch on the voltage to the core */ ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Reset the core */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Disable power clamps */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ /* Remove reset the core signal */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnrstn = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Disable PMU interrupt */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ core_if->hibernation_suspend = 0; ++ ++ /* Disable PMU */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ dwc_udelay(10); ++ ++ /* Enable VBUS */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.dis_vbus = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, gpwrdn.d32, 0); ++ ++ core_if->op_state = A_HOST; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_hcd_start(core_if); ++} ++ ++/** ++ * Frees secondary storage associated with the dwc_otg_hcd structure contained ++ * in the struct usb_hcd field. ++ */ ++static void dwc_otg_hcd_free(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ int i; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD FREE\n"); ++ ++ del_timers(dwc_otg_hcd); ++ ++ /* Free memory for QH/QTD lists */ ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->non_periodic_sched_inactive); ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->non_periodic_sched_active); ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_inactive); ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_ready); ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_assigned); ++ qh_list_free(dwc_otg_hcd, &dwc_otg_hcd->periodic_sched_queued); ++ ++ /* Free memory for the host channels. */ ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ dwc_hc_t *hc = dwc_otg_hcd->hc_ptr_array[i]; ++ ++#ifdef DEBUG ++ if (dwc_otg_hcd->core_if->hc_xfer_timer[i]) { ++ DWC_TIMER_FREE(dwc_otg_hcd->core_if->hc_xfer_timer[i]); ++ } ++#endif ++ if (hc != NULL) { ++ DWC_DEBUGPL(DBG_HCDV, "HCD Free channel #%i, hc=%p\n", ++ i, hc); ++ DWC_FREE(hc); ++ } ++ } ++ ++ if (dwc_otg_hcd->core_if->dma_enable) { ++ if (dwc_otg_hcd->status_buf_dma) { ++ DWC_DMA_FREE(DWC_OTG_HCD_STATUS_BUF_SIZE, ++ dwc_otg_hcd->status_buf, ++ dwc_otg_hcd->status_buf_dma); ++ } ++ } else if (dwc_otg_hcd->status_buf != NULL) { ++ DWC_FREE(dwc_otg_hcd->status_buf); ++ } ++ DWC_SPINLOCK_FREE(dwc_otg_hcd->lock); ++ /* Set core_if's lock pointer to NULL */ ++ dwc_otg_hcd->core_if->lock = NULL; ++ ++ DWC_TIMER_FREE(dwc_otg_hcd->conn_timer); ++ DWC_TASK_FREE(dwc_otg_hcd->reset_tasklet); ++ ++#ifdef DWC_DEV_SRPCAP ++ if (dwc_otg_hcd->core_if->power_down == 2 && ++ dwc_otg_hcd->core_if->pwron_timer) { ++ DWC_TIMER_FREE(dwc_otg_hcd->core_if->pwron_timer); ++ } ++#endif ++ DWC_FREE(dwc_otg_hcd); ++} ++ ++int init_hcd_usecs(dwc_otg_hcd_t *_hcd); ++ ++int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if) ++{ ++ int retval = 0; ++ int num_channels; ++ int i; ++ dwc_hc_t *channel; ++ ++ hcd->lock = DWC_SPINLOCK_ALLOC(); ++ DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n", ++ hcd, core_if); ++ if (!hcd->lock) { ++ DWC_ERROR("Could not allocate lock for pcd"); ++ DWC_FREE(hcd); ++ retval = -DWC_E_NO_MEMORY; ++ goto out; ++ } ++ hcd->core_if = core_if; ++ ++ /* Register the HCD CIL Callbacks */ ++ dwc_otg_cil_register_hcd_callbacks(hcd->core_if, ++ &hcd_cil_callbacks, hcd); ++ ++ /* Initialize the non-periodic schedule. */ ++ DWC_LIST_INIT(&hcd->non_periodic_sched_inactive); ++ DWC_LIST_INIT(&hcd->non_periodic_sched_active); ++ ++ /* Initialize the periodic schedule. */ ++ DWC_LIST_INIT(&hcd->periodic_sched_inactive); ++ DWC_LIST_INIT(&hcd->periodic_sched_ready); ++ DWC_LIST_INIT(&hcd->periodic_sched_assigned); ++ DWC_LIST_INIT(&hcd->periodic_sched_queued); ++ ++ /* ++ * Create a host channel descriptor for each host channel implemented ++ * in the controller. Initialize the channel descriptor array. ++ */ ++ DWC_CIRCLEQ_INIT(&hcd->free_hc_list); ++ num_channels = hcd->core_if->core_params->host_channels; ++ DWC_MEMSET(hcd->hc_ptr_array, 0, sizeof(hcd->hc_ptr_array)); ++ for (i = 0; i < num_channels; i++) { ++ channel = DWC_ALLOC(sizeof(dwc_hc_t)); ++ if (channel == NULL) { ++ retval = -DWC_E_NO_MEMORY; ++ DWC_ERROR("%s: host channel allocation failed\n", ++ __func__); ++ dwc_otg_hcd_free(hcd); ++ goto out; ++ } ++ channel->hc_num = i; ++ hcd->hc_ptr_array[i] = channel; ++#ifdef DEBUG ++ hcd->core_if->hc_xfer_timer[i] = ++ DWC_TIMER_ALLOC("hc timer", hc_xfer_timeout, ++ &hcd->core_if->hc_xfer_info[i]); ++#endif ++ DWC_DEBUGPL(DBG_HCDV, "HCD Added channel #%d, hc=%p\n", i, ++ channel); ++ } ++ ++ /* Initialize the Connection timeout timer. */ ++ hcd->conn_timer = DWC_TIMER_ALLOC("Connection timer", ++ dwc_otg_hcd_connect_timeout, 0); ++ ++ printk(KERN_DEBUG "dwc_otg: Microframe scheduler %s\n", microframe_schedule ? "enabled":"disabled"); ++ if (microframe_schedule) ++ init_hcd_usecs(hcd); ++ ++ /* Initialize reset tasklet. */ ++ hcd->reset_tasklet = DWC_TASK_ALLOC("reset_tasklet", reset_tasklet_func, hcd); ++#ifdef DWC_DEV_SRPCAP ++ if (hcd->core_if->power_down == 2) { ++ /* Initialize Power on timer for Host power up in case hibernation */ ++ hcd->core_if->pwron_timer = DWC_TIMER_ALLOC("PWRON TIMER", ++ dwc_otg_hcd_power_up, core_if); ++ } ++#endif ++ ++ /* ++ * Allocate space for storing data on status transactions. Normally no ++ * data is sent, but this space acts as a bit bucket. This must be ++ * done after usb_add_hcd since that function allocates the DMA buffer ++ * pool. ++ */ ++ if (hcd->core_if->dma_enable) { ++ hcd->status_buf = ++ DWC_DMA_ALLOC(DWC_OTG_HCD_STATUS_BUF_SIZE, ++ &hcd->status_buf_dma); ++ } else { ++ hcd->status_buf = DWC_ALLOC(DWC_OTG_HCD_STATUS_BUF_SIZE); ++ } ++ if (!hcd->status_buf) { ++ retval = -DWC_E_NO_MEMORY; ++ DWC_ERROR("%s: status_buf allocation failed\n", __func__); ++ dwc_otg_hcd_free(hcd); ++ goto out; ++ } ++ ++ hcd->otg_port = 1; ++ hcd->frame_list = NULL; ++ hcd->frame_list_dma = 0; ++ hcd->periodic_qh_count = 0; ++out: ++ return retval; ++} ++ ++void dwc_otg_hcd_remove(dwc_otg_hcd_t * hcd) ++{ ++ /* Turn off all host-specific interrupts. */ ++ dwc_otg_disable_host_interrupts(hcd->core_if); ++ ++ dwc_otg_hcd_free(hcd); ++} ++ ++/** ++ * Initializes dynamic portions of the DWC_otg HCD state. ++ */ ++static void dwc_otg_hcd_reinit(dwc_otg_hcd_t * hcd) ++{ ++ int num_channels; ++ int i; ++ dwc_hc_t *channel; ++ dwc_hc_t *channel_tmp; ++ ++ hcd->flags.d32 = 0; ++ ++ hcd->non_periodic_qh_ptr = &hcd->non_periodic_sched_active; ++ if (!microframe_schedule) { ++ hcd->non_periodic_channels = 0; ++ hcd->periodic_channels = 0; ++ } else { ++ hcd->available_host_channels = hcd->core_if->core_params->host_channels; ++ } ++ /* ++ * Put all channels in the free channel list and clean up channel ++ * states. ++ */ ++ DWC_CIRCLEQ_FOREACH_SAFE(channel, channel_tmp, ++ &hcd->free_hc_list, hc_list_entry) { ++ DWC_CIRCLEQ_REMOVE(&hcd->free_hc_list, channel, hc_list_entry); ++ } ++ ++ num_channels = hcd->core_if->core_params->host_channels; ++ for (i = 0; i < num_channels; i++) { ++ channel = hcd->hc_ptr_array[i]; ++ DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, channel, ++ hc_list_entry); ++ dwc_otg_hc_cleanup(hcd->core_if, channel); ++ } ++ ++ /* Initialize the DWC core for host mode operation. */ ++ dwc_otg_core_host_init(hcd->core_if); ++ ++ /* Set core_if's lock pointer to the hcd->lock */ ++ hcd->core_if->lock = hcd->lock; ++} ++ ++/** ++ * Assigns transactions from a QTD to a free host channel and initializes the ++ * host channel to perform the transactions. The host channel is removed from ++ * the free list. ++ * ++ * @param hcd The HCD state structure. ++ * @param qh Transactions from the first QTD for this QH are selected and ++ * assigned to a free host channel. ++ */ ++static void assign_and_init_hc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ dwc_hc_t *hc; ++ dwc_otg_qtd_t *qtd; ++ dwc_otg_hcd_urb_t *urb; ++ void* ptr = NULL; ++ ++ qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); ++ ++ urb = qtd->urb; ++ ++ DWC_DEBUGPL(DBG_HCDV, "%s(%p,%p) - urb %x, actual_length %d\n", __func__, hcd, qh, (unsigned int)urb, urb->actual_length); ++ ++ if (((urb->actual_length < 0) || (urb->actual_length > urb->length)) && !dwc_otg_hcd_is_pipe_in(&urb->pipe_info)) ++ urb->actual_length = urb->length; ++ ++ ++ hc = DWC_CIRCLEQ_FIRST(&hcd->free_hc_list); ++ ++ /* Remove the host channel from the free list. */ ++ DWC_CIRCLEQ_REMOVE_INIT(&hcd->free_hc_list, hc, hc_list_entry); ++ ++ qh->channel = hc; ++ ++ qtd->in_process = 1; ++ ++ /* ++ * Use usb_pipedevice to determine device address. This address is ++ * 0 before the SET_ADDRESS command and the correct address afterward. ++ */ ++ hc->dev_addr = dwc_otg_hcd_get_dev_addr(&urb->pipe_info); ++ hc->ep_num = dwc_otg_hcd_get_ep_num(&urb->pipe_info); ++ hc->speed = qh->dev_speed; ++ hc->max_packet = dwc_max_packet(qh->maxp); ++ ++ hc->xfer_started = 0; ++ hc->halt_status = DWC_OTG_HC_XFER_NO_HALT_STATUS; ++ hc->error_state = (qtd->error_count > 0); ++ hc->halt_on_queue = 0; ++ hc->halt_pending = 0; ++ hc->requests = 0; ++ ++ /* ++ * The following values may be modified in the transfer type section ++ * below. The xfer_len value may be reduced when the transfer is ++ * started to accommodate the max widths of the XferSize and PktCnt ++ * fields in the HCTSIZn register. ++ */ ++ ++ hc->ep_is_in = (dwc_otg_hcd_is_pipe_in(&urb->pipe_info) != 0); ++ if (hc->ep_is_in) { ++ hc->do_ping = 0; ++ } else { ++ hc->do_ping = qh->ping_state; ++ } ++ ++ hc->data_pid_start = qh->data_toggle; ++ hc->multi_count = 1; ++ ++ if (hcd->core_if->dma_enable) { ++ hc->xfer_buff = (uint8_t *) urb->dma + urb->actual_length; ++ ++ /* For non-dword aligned case */ ++ if (((unsigned long)hc->xfer_buff & 0x3) ++ && !hcd->core_if->dma_desc_enable) { ++ ptr = (uint8_t *) urb->buf + urb->actual_length; ++ } ++ } else { ++ hc->xfer_buff = (uint8_t *) urb->buf + urb->actual_length; ++ } ++ hc->xfer_len = urb->length - urb->actual_length; ++ hc->xfer_count = 0; ++ ++ /* ++ * Set the split attributes ++ */ ++ hc->do_split = 0; ++ if (qh->do_split) { ++ uint32_t hub_addr, port_addr; ++ hc->do_split = 1; ++ hc->xact_pos = qtd->isoc_split_pos; ++ hc->complete_split = qtd->complete_split; ++ hcd->fops->hub_info(hcd, urb->priv, &hub_addr, &port_addr); ++ hc->hub_addr = (uint8_t) hub_addr; ++ hc->port_addr = (uint8_t) port_addr; ++ } ++ ++ switch (dwc_otg_hcd_get_pipe_type(&urb->pipe_info)) { ++ case UE_CONTROL: ++ hc->ep_type = DWC_OTG_EP_TYPE_CONTROL; ++ switch (qtd->control_phase) { ++ case DWC_OTG_CONTROL_SETUP: ++ DWC_DEBUGPL(DBG_HCDV, " Control setup transaction\n"); ++ hc->do_ping = 0; ++ hc->ep_is_in = 0; ++ hc->data_pid_start = DWC_OTG_HC_PID_SETUP; ++ if (hcd->core_if->dma_enable) { ++ hc->xfer_buff = (uint8_t *) urb->setup_dma; ++ } else { ++ hc->xfer_buff = (uint8_t *) urb->setup_packet; ++ } ++ hc->xfer_len = 8; ++ ptr = NULL; ++ break; ++ case DWC_OTG_CONTROL_DATA: ++ DWC_DEBUGPL(DBG_HCDV, " Control data transaction\n"); ++ hc->data_pid_start = qtd->data_toggle; ++ break; ++ case DWC_OTG_CONTROL_STATUS: ++ /* ++ * Direction is opposite of data direction or IN if no ++ * data. ++ */ ++ DWC_DEBUGPL(DBG_HCDV, " Control status transaction\n"); ++ if (urb->length == 0) { ++ hc->ep_is_in = 1; ++ } else { ++ hc->ep_is_in = ++ dwc_otg_hcd_is_pipe_out(&urb->pipe_info); ++ } ++ if (hc->ep_is_in) { ++ hc->do_ping = 0; ++ } ++ ++ hc->data_pid_start = DWC_OTG_HC_PID_DATA1; ++ ++ hc->xfer_len = 0; ++ if (hcd->core_if->dma_enable) { ++ hc->xfer_buff = (uint8_t *) hcd->status_buf_dma; ++ } else { ++ hc->xfer_buff = (uint8_t *) hcd->status_buf; ++ } ++ ptr = NULL; ++ break; ++ } ++ break; ++ case UE_BULK: ++ hc->ep_type = DWC_OTG_EP_TYPE_BULK; ++ break; ++ case UE_INTERRUPT: ++ hc->ep_type = DWC_OTG_EP_TYPE_INTR; ++ break; ++ case UE_ISOCHRONOUS: ++ { ++ struct dwc_otg_hcd_iso_packet_desc *frame_desc; ++ ++ hc->ep_type = DWC_OTG_EP_TYPE_ISOC; ++ ++ if (hcd->core_if->dma_desc_enable) ++ break; ++ ++ frame_desc = &urb->iso_descs[qtd->isoc_frame_index]; ++ ++ frame_desc->status = 0; ++ ++ if (hcd->core_if->dma_enable) { ++ hc->xfer_buff = (uint8_t *) urb->dma; ++ } else { ++ hc->xfer_buff = (uint8_t *) urb->buf; ++ } ++ hc->xfer_buff += ++ frame_desc->offset + qtd->isoc_split_offset; ++ hc->xfer_len = ++ frame_desc->length - qtd->isoc_split_offset; ++ ++ /* For non-dword aligned buffers */ ++ if (((unsigned long)hc->xfer_buff & 0x3) ++ && hcd->core_if->dma_enable) { ++ ptr = ++ (uint8_t *) urb->buf + frame_desc->offset + ++ qtd->isoc_split_offset; ++ } else ++ ptr = NULL; ++ ++ if (hc->xact_pos == DWC_HCSPLIT_XACTPOS_ALL) { ++ if (hc->xfer_len <= 188) { ++ hc->xact_pos = DWC_HCSPLIT_XACTPOS_ALL; ++ } else { ++ hc->xact_pos = ++ DWC_HCSPLIT_XACTPOS_BEGIN; ++ } ++ } ++ } ++ break; ++ } ++ /* non DWORD-aligned buffer case */ ++ if (ptr) { ++ uint32_t buf_size; ++ if (hc->ep_type != DWC_OTG_EP_TYPE_ISOC) { ++ buf_size = hcd->core_if->core_params->max_transfer_size; ++ } else { ++ buf_size = 4096; ++ } ++ if (!qh->dw_align_buf) { ++ qh->dw_align_buf = DWC_DMA_ALLOC_ATOMIC(buf_size, ++ &qh->dw_align_buf_dma); ++ if (!qh->dw_align_buf) { ++ DWC_ERROR ++ ("%s: Failed to allocate memory to handle " ++ "non-dword aligned buffer case\n", ++ __func__); ++ return; ++ } ++ } ++ if (!hc->ep_is_in) { ++ dwc_memcpy(qh->dw_align_buf, ptr, hc->xfer_len); ++ } ++ hc->align_buff = qh->dw_align_buf_dma; ++ } else { ++ hc->align_buff = 0; ++ } ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * This value may be modified when the transfer is started to ++ * reflect the actual transfer length. ++ */ ++ hc->multi_count = dwc_hb_mult(qh->maxp); ++ } ++ ++ if (hcd->core_if->dma_desc_enable) ++ hc->desc_list_addr = qh->desc_list_dma; ++ ++ dwc_otg_hc_init(hcd->core_if, hc); ++ hc->qh = qh; ++} ++ ++/** ++ * This function selects transactions from the HCD transfer schedule and ++ * assigns them to available host channels. It is called from HCD interrupt ++ * handler functions. ++ * ++ * @param hcd The HCD state structure. ++ * ++ * @return The types of new transactions that were assigned to host channels. ++ */ ++dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t * hcd) ++{ ++ dwc_list_link_t *qh_ptr; ++ dwc_otg_qh_t *qh; ++ int num_channels; ++ dwc_irqflags_t flags; ++ dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; ++ ++#ifdef DEBUG_SOF ++ DWC_DEBUGPL(DBG_HCD, " Select Transactions\n"); ++#endif ++ ++#ifdef DEBUG_HOST_CHANNELS ++ last_sel_trans_num_per_scheduled = 0; ++ last_sel_trans_num_nonper_scheduled = 0; ++ last_sel_trans_num_avail_hc_at_start = hcd->available_host_channels; ++#endif /* DEBUG_HOST_CHANNELS */ ++ ++ /* Process entries in the periodic ready list. */ ++ qh_ptr = DWC_LIST_FIRST(&hcd->periodic_sched_ready); ++ ++ while (qh_ptr != &hcd->periodic_sched_ready && ++ !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) { ++ if (microframe_schedule) { ++ // Make sure we leave one channel for non periodic transactions. ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ if (hcd->available_host_channels <= 1) { ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ break; ++ } ++ hcd->available_host_channels--; ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++#ifdef DEBUG_HOST_CHANNELS ++ last_sel_trans_num_per_scheduled++; ++#endif /* DEBUG_HOST_CHANNELS */ ++ } ++ qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); ++ assign_and_init_hc(hcd, qh); ++ ++ /* ++ * Move the QH from the periodic ready schedule to the ++ * periodic assigned schedule. ++ */ ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, ++ &qh->qh_list_entry); ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ ++ ret_val = DWC_OTG_TRANSACTION_PERIODIC; ++ } ++ ++ /* ++ * Process entries in the inactive portion of the non-periodic ++ * schedule. Some free host channels may not be used if they are ++ * reserved for periodic transfers. ++ */ ++ qh_ptr = hcd->non_periodic_sched_inactive.next; ++ num_channels = hcd->core_if->core_params->host_channels; ++ while (qh_ptr != &hcd->non_periodic_sched_inactive && ++ (microframe_schedule || hcd->non_periodic_channels < ++ num_channels - hcd->periodic_channels) && ++ !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) { ++ ++ if (microframe_schedule) { ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ if (hcd->available_host_channels < 1) { ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ break; ++ } ++ hcd->available_host_channels--; ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++#ifdef DEBUG_HOST_CHANNELS ++ last_sel_trans_num_nonper_scheduled++; ++#endif /* DEBUG_HOST_CHANNELS */ ++ } ++ qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); ++ ++ assign_and_init_hc(hcd, qh); ++ ++ /* ++ * Move the QH from the non-periodic inactive schedule to the ++ * non-periodic active schedule. ++ */ ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ DWC_LIST_MOVE_HEAD(&hcd->non_periodic_sched_active, ++ &qh->qh_list_entry); ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ ++ if (ret_val == DWC_OTG_TRANSACTION_NONE) { ++ ret_val = DWC_OTG_TRANSACTION_NON_PERIODIC; ++ } else { ++ ret_val = DWC_OTG_TRANSACTION_ALL; ++ } ++ ++ if (!microframe_schedule) ++ hcd->non_periodic_channels++; ++ } ++ ++#ifdef DEBUG_HOST_CHANNELS ++ last_sel_trans_num_avail_hc_at_end = hcd->available_host_channels; ++#endif /* DEBUG_HOST_CHANNELS */ ++ ++ DWC_SPINLOCK_FREE(channel_lock); ++ return ret_val; ++} ++ ++/** ++ * Attempts to queue a single transaction request for a host channel ++ * associated with either a periodic or non-periodic transfer. This function ++ * assumes that there is space available in the appropriate request queue. For ++ * an OUT transfer or SETUP transaction in Slave mode, it checks whether space ++ * is available in the appropriate Tx FIFO. ++ * ++ * @param hcd The HCD state structure. ++ * @param hc Host channel descriptor associated with either a periodic or ++ * non-periodic transfer. ++ * @param fifo_dwords_avail Number of DWORDs available in the periodic Tx ++ * FIFO for periodic transfers or the non-periodic Tx FIFO for non-periodic ++ * transfers. ++ * ++ * @return 1 if a request is queued and more requests may be needed to ++ * complete the transfer, 0 if no more requests are required for this ++ * transfer, -1 if there is insufficient space in the Tx FIFO. ++ */ ++static int queue_transaction(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, uint16_t fifo_dwords_avail) ++{ ++ int retval; ++ ++ if (hcd->core_if->dma_enable) { ++ if (hcd->core_if->dma_desc_enable) { ++ if (!hc->xfer_started ++ || (hc->ep_type == DWC_OTG_EP_TYPE_ISOC)) { ++ dwc_otg_hcd_start_xfer_ddma(hcd, hc->qh); ++ hc->qh->ping_state = 0; ++ } ++ } else if (!hc->xfer_started) { ++ dwc_otg_hc_start_transfer(hcd->core_if, hc); ++ hc->qh->ping_state = 0; ++ } ++ retval = 0; ++ } else if (hc->halt_pending) { ++ /* Don't queue a request if the channel has been halted. */ ++ retval = 0; ++ } else if (hc->halt_on_queue) { ++ dwc_otg_hc_halt(hcd->core_if, hc, hc->halt_status); ++ retval = 0; ++ } else if (hc->do_ping) { ++ if (!hc->xfer_started) { ++ dwc_otg_hc_start_transfer(hcd->core_if, hc); ++ } ++ retval = 0; ++ } else if (!hc->ep_is_in || hc->data_pid_start == DWC_OTG_HC_PID_SETUP) { ++ if ((fifo_dwords_avail * 4) >= hc->max_packet) { ++ if (!hc->xfer_started) { ++ dwc_otg_hc_start_transfer(hcd->core_if, hc); ++ retval = 1; ++ } else { ++ retval = ++ dwc_otg_hc_continue_transfer(hcd->core_if, ++ hc); ++ } ++ } else { ++ retval = -1; ++ } ++ } else { ++ if (!hc->xfer_started) { ++ dwc_otg_hc_start_transfer(hcd->core_if, hc); ++ retval = 1; ++ } else { ++ retval = dwc_otg_hc_continue_transfer(hcd->core_if, hc); ++ } ++ } ++ ++ return retval; ++} ++ ++/** ++ * Processes periodic channels for the next frame and queues transactions for ++ * these channels to the DWC_otg controller. After queueing transactions, the ++ * Periodic Tx FIFO Empty interrupt is enabled if there are more transactions ++ * to queue as Periodic Tx FIFO or request queue space becomes available. ++ * Otherwise, the Periodic Tx FIFO Empty interrupt is disabled. ++ */ ++static void process_periodic_channels(dwc_otg_hcd_t * hcd) ++{ ++ hptxsts_data_t tx_status; ++ dwc_list_link_t *qh_ptr; ++ dwc_otg_qh_t *qh; ++ int status; ++ int no_queue_space = 0; ++ int no_fifo_space = 0; ++ ++ dwc_otg_host_global_regs_t *host_regs; ++ host_regs = hcd->core_if->host_if->host_global_regs; ++ ++ DWC_DEBUGPL(DBG_HCDV, "Queue periodic transactions\n"); ++#ifdef DEBUG ++ tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts); ++ DWC_DEBUGPL(DBG_HCDV, ++ " P Tx Req Queue Space Avail (before queue): %d\n", ++ tx_status.b.ptxqspcavail); ++ DWC_DEBUGPL(DBG_HCDV, " P Tx FIFO Space Avail (before queue): %d\n", ++ tx_status.b.ptxfspcavail); ++#endif ++ ++ qh_ptr = hcd->periodic_sched_assigned.next; ++ while (qh_ptr != &hcd->periodic_sched_assigned) { ++ tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts); ++ if (tx_status.b.ptxqspcavail == 0) { ++ no_queue_space = 1; ++ break; ++ } ++ ++ qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); ++ ++ /* ++ * Set a flag if we're queuing high-bandwidth in slave mode. ++ * The flag prevents any halts to get into the request queue in ++ * the middle of multiple high-bandwidth packets getting queued. ++ */ ++ if (!hcd->core_if->dma_enable && qh->channel->multi_count > 1) { ++ hcd->core_if->queuing_high_bandwidth = 1; ++ } ++ status = ++ queue_transaction(hcd, qh->channel, ++ tx_status.b.ptxfspcavail); ++ if (status < 0) { ++ no_fifo_space = 1; ++ break; ++ } ++ ++ /* ++ * In Slave mode, stay on the current transfer until there is ++ * nothing more to do or the high-bandwidth request count is ++ * reached. In DMA mode, only need to queue one request. The ++ * controller automatically handles multiple packets for ++ * high-bandwidth transfers. ++ */ ++ if (hcd->core_if->dma_enable || status == 0 || ++ qh->channel->requests == qh->channel->multi_count) { ++ qh_ptr = qh_ptr->next; ++ /* ++ * Move the QH from the periodic assigned schedule to ++ * the periodic queued schedule. ++ */ ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_queued, ++ &qh->qh_list_entry); ++ ++ /* done queuing high bandwidth */ ++ hcd->core_if->queuing_high_bandwidth = 0; ++ } ++ } ++ ++ if (!hcd->core_if->dma_enable) { ++ dwc_otg_core_global_regs_t *global_regs; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ global_regs = hcd->core_if->core_global_regs; ++ intr_mask.b.ptxfempty = 1; ++#ifdef DEBUG ++ tx_status.d32 = DWC_READ_REG32(&host_regs->hptxsts); ++ DWC_DEBUGPL(DBG_HCDV, ++ " P Tx Req Queue Space Avail (after queue): %d\n", ++ tx_status.b.ptxqspcavail); ++ DWC_DEBUGPL(DBG_HCDV, ++ " P Tx FIFO Space Avail (after queue): %d\n", ++ tx_status.b.ptxfspcavail); ++#endif ++ if (!DWC_LIST_EMPTY(&hcd->periodic_sched_assigned) || ++ no_queue_space || no_fifo_space) { ++ /* ++ * May need to queue more transactions as the request ++ * queue or Tx FIFO empties. Enable the periodic Tx ++ * FIFO empty interrupt. (Always use the half-empty ++ * level to ensure that new requests are loaded as ++ * soon as possible.) ++ */ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, 0, ++ intr_mask.d32); ++ } else { ++ /* ++ * Disable the Tx FIFO empty interrupt since there are ++ * no more transactions that need to be queued right ++ * now. This function is called from interrupt ++ * handlers to queue more transactions as transfer ++ * states change. ++ */ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, ++ 0); ++ } ++ } ++} ++ ++/** ++ * Processes active non-periodic channels and queues transactions for these ++ * channels to the DWC_otg controller. After queueing transactions, the NP Tx ++ * FIFO Empty interrupt is enabled if there are more transactions to queue as ++ * NP Tx FIFO or request queue space becomes available. Otherwise, the NP Tx ++ * FIFO Empty interrupt is disabled. ++ */ ++static void process_non_periodic_channels(dwc_otg_hcd_t * hcd) ++{ ++ gnptxsts_data_t tx_status; ++ dwc_list_link_t *orig_qh_ptr; ++ dwc_otg_qh_t *qh; ++ int status; ++ int no_queue_space = 0; ++ int no_fifo_space = 0; ++ int more_to_do = 0; ++ ++ dwc_otg_core_global_regs_t *global_regs = ++ hcd->core_if->core_global_regs; ++ ++ DWC_DEBUGPL(DBG_HCDV, "Queue non-periodic transactions\n"); ++#ifdef DEBUG ++ tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ DWC_DEBUGPL(DBG_HCDV, ++ " NP Tx Req Queue Space Avail (before queue): %d\n", ++ tx_status.b.nptxqspcavail); ++ DWC_DEBUGPL(DBG_HCDV, " NP Tx FIFO Space Avail (before queue): %d\n", ++ tx_status.b.nptxfspcavail); ++#endif ++ /* ++ * Keep track of the starting point. Skip over the start-of-list ++ * entry. ++ */ ++ if (hcd->non_periodic_qh_ptr == &hcd->non_periodic_sched_active) { ++ hcd->non_periodic_qh_ptr = hcd->non_periodic_qh_ptr->next; ++ } ++ orig_qh_ptr = hcd->non_periodic_qh_ptr; ++ ++ /* ++ * Process once through the active list or until no more space is ++ * available in the request queue or the Tx FIFO. ++ */ ++ do { ++ tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ if (!hcd->core_if->dma_enable && tx_status.b.nptxqspcavail == 0) { ++ no_queue_space = 1; ++ break; ++ } ++ ++ qh = DWC_LIST_ENTRY(hcd->non_periodic_qh_ptr, dwc_otg_qh_t, ++ qh_list_entry); ++ status = ++ queue_transaction(hcd, qh->channel, ++ tx_status.b.nptxfspcavail); ++ ++ if (status > 0) { ++ more_to_do = 1; ++ } else if (status < 0) { ++ no_fifo_space = 1; ++ break; ++ } ++ ++ /* Advance to next QH, skipping start-of-list entry. */ ++ hcd->non_periodic_qh_ptr = hcd->non_periodic_qh_ptr->next; ++ if (hcd->non_periodic_qh_ptr == &hcd->non_periodic_sched_active) { ++ hcd->non_periodic_qh_ptr = ++ hcd->non_periodic_qh_ptr->next; ++ } ++ ++ } while (hcd->non_periodic_qh_ptr != orig_qh_ptr); ++ ++ if (!hcd->core_if->dma_enable) { ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ intr_mask.b.nptxfempty = 1; ++ ++#ifdef DEBUG ++ tx_status.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ DWC_DEBUGPL(DBG_HCDV, ++ " NP Tx Req Queue Space Avail (after queue): %d\n", ++ tx_status.b.nptxqspcavail); ++ DWC_DEBUGPL(DBG_HCDV, ++ " NP Tx FIFO Space Avail (after queue): %d\n", ++ tx_status.b.nptxfspcavail); ++#endif ++ if (more_to_do || no_queue_space || no_fifo_space) { ++ /* ++ * May need to queue more transactions as the request ++ * queue or Tx FIFO empties. Enable the non-periodic ++ * Tx FIFO empty interrupt. (Always use the half-empty ++ * level to ensure that new requests are loaded as ++ * soon as possible.) ++ */ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, 0, ++ intr_mask.d32); ++ } else { ++ /* ++ * Disable the Tx FIFO empty interrupt since there are ++ * no more transactions that need to be queued right ++ * now. This function is called from interrupt ++ * handlers to queue more transactions as transfer ++ * states change. ++ */ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, intr_mask.d32, ++ 0); ++ } ++ } ++} ++ ++/** ++ * This function processes the currently active host channels and queues ++ * transactions for these channels to the DWC_otg controller. It is called ++ * from HCD interrupt handler functions. ++ * ++ * @param hcd The HCD state structure. ++ * @param tr_type The type(s) of transactions to queue (non-periodic, ++ * periodic, or both). ++ */ ++void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd, ++ dwc_otg_transaction_type_e tr_type) ++{ ++#ifdef DEBUG_SOF ++ DWC_DEBUGPL(DBG_HCD, "Queue Transactions\n"); ++#endif ++ /* Process host channels associated with periodic transfers. */ ++ if ((tr_type == DWC_OTG_TRANSACTION_PERIODIC || ++ tr_type == DWC_OTG_TRANSACTION_ALL) && ++ !DWC_LIST_EMPTY(&hcd->periodic_sched_assigned)) { ++ ++ process_periodic_channels(hcd); ++ } ++ ++ /* Process host channels associated with non-periodic transfers. */ ++ if (tr_type == DWC_OTG_TRANSACTION_NON_PERIODIC || ++ tr_type == DWC_OTG_TRANSACTION_ALL) { ++ if (!DWC_LIST_EMPTY(&hcd->non_periodic_sched_active)) { ++ process_non_periodic_channels(hcd); ++ } else { ++ /* ++ * Ensure NP Tx FIFO empty interrupt is disabled when ++ * there are no non-periodic transfers to process. ++ */ ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ gintmsk.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&hcd->core_if-> ++ core_global_regs->gintmsk, gintmsk.d32, ++ 0); ++ } ++ } ++} ++ ++#ifdef DWC_HS_ELECT_TST ++/* ++ * Quick and dirty hack to implement the HS Electrical Test ++ * SINGLE_STEP_GET_DEVICE_DESCRIPTOR feature. ++ * ++ * This code was copied from our userspace app "hset". It sends a ++ * Get Device Descriptor control sequence in two parts, first the ++ * Setup packet by itself, followed some time later by the In and ++ * Ack packets. Rather than trying to figure out how to add this ++ * functionality to the normal driver code, we just hijack the ++ * hardware, using these two function to drive the hardware ++ * directly. ++ */ ++ ++static dwc_otg_core_global_regs_t *global_regs; ++static dwc_otg_host_global_regs_t *hc_global_regs; ++static dwc_otg_hc_regs_t *hc_regs; ++static uint32_t *data_fifo; ++ ++static void do_setup(void) ++{ ++ gintsts_data_t gintsts; ++ hctsiz_data_t hctsiz; ++ hcchar_data_t hcchar; ++ haint_data_t haint; ++ hcint_data_t hcint; ++ ++ /* Enable HAINTs */ ++ DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0001); ++ ++ /* Enable HCINTs */ ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x04a3); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* ++ * Send Setup packet (Get Device Descriptor) ++ */ ++ ++ /* Make sure channel is disabled */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen) { ++ hcchar.b.chdis = 1; ++// hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ //sleep(1); ++ dwc_mdelay(1000); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ } ++ ++ /* Set HCTSIZ */ ++ hctsiz.d32 = 0; ++ hctsiz.b.xfersize = 8; ++ hctsiz.b.pktcnt = 1; ++ hctsiz.b.pid = DWC_OTG_HC_PID_SETUP; ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ /* Set HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL; ++ hcchar.b.epdir = 0; ++ hcchar.b.epnum = 0; ++ hcchar.b.mps = 8; ++ hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ /* Fill FIFO with Setup data for Get Device Descriptor */ ++ data_fifo = (uint32_t *) ((char *)global_regs + 0x1000); ++ DWC_WRITE_REG32(data_fifo++, 0x01000680); ++ DWC_WRITE_REG32(data_fifo++, 0x00080000); ++ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Wait for host channel interrupt */ ++ do { ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ } while (gintsts.b.hcintr == 0); ++ ++ /* Disable HCINTs */ ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x0000); ++ ++ /* Disable HAINTs */ ++ DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0000); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++} ++ ++static void do_in_ack(void) ++{ ++ gintsts_data_t gintsts; ++ hctsiz_data_t hctsiz; ++ hcchar_data_t hcchar; ++ haint_data_t haint; ++ hcint_data_t hcint; ++ host_grxsts_data_t grxsts; ++ ++ /* Enable HAINTs */ ++ DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0001); ++ ++ /* Enable HCINTs */ ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x04a3); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* ++ * Receive Control In packet ++ */ ++ ++ /* Make sure channel is disabled */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen) { ++ hcchar.b.chdis = 1; ++ hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ //sleep(1); ++ dwc_mdelay(1000); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ } ++ ++ /* Set HCTSIZ */ ++ hctsiz.d32 = 0; ++ hctsiz.b.xfersize = 8; ++ hctsiz.b.pktcnt = 1; ++ hctsiz.b.pid = DWC_OTG_HC_PID_DATA1; ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ /* Set HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL; ++ hcchar.b.epdir = 1; ++ hcchar.b.epnum = 0; ++ hcchar.b.mps = 8; ++ hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Wait for receive status queue interrupt */ ++ do { ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ } while (gintsts.b.rxstsqlvl == 0); ++ ++ /* Read RXSTS */ ++ grxsts.d32 = DWC_READ_REG32(&global_regs->grxstsp); ++ ++ /* Clear RXSTSQLVL in GINTSTS */ ++ gintsts.d32 = 0; ++ gintsts.b.rxstsqlvl = 1; ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ switch (grxsts.b.pktsts) { ++ case DWC_GRXSTS_PKTSTS_IN: ++ /* Read the data into the host buffer */ ++ if (grxsts.b.bcnt > 0) { ++ int i; ++ int word_count = (grxsts.b.bcnt + 3) / 4; ++ ++ data_fifo = (uint32_t *) ((char *)global_regs + 0x1000); ++ ++ for (i = 0; i < word_count; i++) { ++ (void)DWC_READ_REG32(data_fifo++); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Wait for receive status queue interrupt */ ++ do { ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ } while (gintsts.b.rxstsqlvl == 0); ++ ++ /* Read RXSTS */ ++ grxsts.d32 = DWC_READ_REG32(&global_regs->grxstsp); ++ ++ /* Clear RXSTSQLVL in GINTSTS */ ++ gintsts.d32 = 0; ++ gintsts.b.rxstsqlvl = 1; ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ switch (grxsts.b.pktsts) { ++ case DWC_GRXSTS_PKTSTS_IN_XFER_COMP: ++ break; ++ ++ default: ++ break; ++ } ++ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Wait for host channel interrupt */ ++ do { ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ } while (gintsts.b.hcintr == 0); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++// usleep(100000); ++// mdelay(100); ++ dwc_mdelay(1); ++ ++ /* ++ * Send handshake packet ++ */ ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Make sure channel is disabled */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chen) { ++ hcchar.b.chdis = 1; ++ hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ //sleep(1); ++ dwc_mdelay(1000); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ } ++ ++ /* Set HCTSIZ */ ++ hctsiz.d32 = 0; ++ hctsiz.b.xfersize = 0; ++ hctsiz.b.pktcnt = 1; ++ hctsiz.b.pid = DWC_OTG_HC_PID_DATA1; ++ DWC_WRITE_REG32(&hc_regs->hctsiz, hctsiz.d32); ++ ++ /* Set HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL; ++ hcchar.b.epdir = 0; ++ hcchar.b.epnum = 0; ++ hcchar.b.mps = 8; ++ hcchar.b.chen = 1; ++ DWC_WRITE_REG32(&hc_regs->hcchar, hcchar.d32); ++ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ ++ /* Wait for host channel interrupt */ ++ do { ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++ } while (gintsts.b.hcintr == 0); ++ ++ /* Disable HCINTs */ ++ DWC_WRITE_REG32(&hc_regs->hcintmsk, 0x0000); ++ ++ /* Disable HAINTs */ ++ DWC_WRITE_REG32(&hc_global_regs->haintmsk, 0x0000); ++ ++ /* Read HAINT */ ++ haint.d32 = DWC_READ_REG32(&hc_global_regs->haint); ++ ++ /* Read HCINT */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ ++ /* Read HCCHAR */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ ++ /* Clear HCINT */ ++ DWC_WRITE_REG32(&hc_regs->hcint, hcint.d32); ++ ++ /* Clear HAINT */ ++ DWC_WRITE_REG32(&hc_global_regs->haint, haint.d32); ++ ++ /* Clear GINTSTS */ ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ /* Read GINTSTS */ ++ gintsts.d32 = DWC_READ_REG32(&global_regs->gintsts); ++} ++#endif ++ ++/** Handles hub class-specific requests. */ ++int dwc_otg_hcd_hub_control(dwc_otg_hcd_t * dwc_otg_hcd, ++ uint16_t typeReq, ++ uint16_t wValue, ++ uint16_t wIndex, uint8_t * buf, uint16_t wLength) ++{ ++ int retval = 0; ++ ++ dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if; ++ usb_hub_descriptor_t *hub_desc; ++ hprt0_data_t hprt0 = {.d32 = 0 }; ++ ++ uint32_t port_status; ++ ++ switch (typeReq) { ++ case UCR_CLEAR_HUB_FEATURE: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearHubFeature 0x%x\n", wValue); ++ switch (wValue) { ++ case UHF_C_HUB_LOCAL_POWER: ++ case UHF_C_HUB_OVER_CURRENT: ++ /* Nothing required here */ ++ break; ++ default: ++ retval = -DWC_E_INVALID; ++ DWC_ERROR("DWC OTG HCD - " ++ "ClearHubFeature request %xh unknown\n", ++ wValue); ++ } ++ break; ++ case UCR_CLEAR_PORT_FEATURE: ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ if (wValue != UHF_PORT_L1) ++#endif ++ if (!wIndex || wIndex > 1) ++ goto error; ++ ++ switch (wValue) { ++ case UHF_PORT_ENABLE: ++ DWC_DEBUGPL(DBG_ANY, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_ENABLE\n"); ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtena = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ break; ++ case UHF_PORT_SUSPEND: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_SUSPEND\n"); ++ ++ if (core_if->power_down == 2) { ++ dwc_otg_host_hibernation_restore(core_if, 0, 0); ++ } else { ++ DWC_WRITE_REG32(core_if->pcgcctl, 0); ++ dwc_mdelay(5); ++ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtres = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ hprt0.b.prtsusp = 0; ++ /* Clear Resume bit */ ++ dwc_mdelay(100); ++ hprt0.b.prtres = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ } ++ break; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ case UHF_PORT_L1: ++ { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ glpmcfg_data_t lpmcfg = {.d32 = 0 }; ++ ++ lpmcfg.d32 = ++ DWC_READ_REG32(&core_if-> ++ core_global_regs->glpmcfg); ++ lpmcfg.b.en_utmi_sleep = 0; ++ lpmcfg.b.hird_thres &= (~(1 << 4)); ++ lpmcfg.b.prt_sleep_sts = 1; ++ DWC_WRITE_REG32(&core_if-> ++ core_global_regs->glpmcfg, ++ lpmcfg.d32); ++ ++ /* Clear Enbl_L1Gating bit. */ ++ pcgcctl.b.enbl_sleep_gating = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, ++ 0); ++ ++ dwc_mdelay(5); ++ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtres = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, ++ hprt0.d32); ++ /* This bit will be cleared in wakeup interrupt handle */ ++ break; ++ } ++#endif ++ case UHF_PORT_POWER: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_POWER\n"); ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ break; ++ case UHF_PORT_INDICATOR: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_INDICATOR\n"); ++ /* Port inidicator not supported */ ++ break; ++ case UHF_C_PORT_CONNECTION: ++ /* Clears drivers internal connect status change ++ * flag */ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_C_CONNECTION\n"); ++ dwc_otg_hcd->flags.b.port_connect_status_change = 0; ++ break; ++ case UHF_C_PORT_RESET: ++ /* Clears the driver's internal Port Reset Change ++ * flag */ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_C_RESET\n"); ++ dwc_otg_hcd->flags.b.port_reset_change = 0; ++ break; ++ case UHF_C_PORT_ENABLE: ++ /* Clears the driver's internal Port ++ * Enable/Disable Change flag */ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_C_ENABLE\n"); ++ dwc_otg_hcd->flags.b.port_enable_change = 0; ++ break; ++ case UHF_C_PORT_SUSPEND: ++ /* Clears the driver's internal Port Suspend ++ * Change flag, which is set when resume signaling on ++ * the host port is complete */ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_C_SUSPEND\n"); ++ dwc_otg_hcd->flags.b.port_suspend_change = 0; ++ break; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ case UHF_C_PORT_L1: ++ dwc_otg_hcd->flags.b.port_l1_change = 0; ++ break; ++#endif ++ case UHF_C_PORT_OVER_CURRENT: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "ClearPortFeature USB_PORT_FEAT_C_OVER_CURRENT\n"); ++ dwc_otg_hcd->flags.b.port_over_current_change = 0; ++ break; ++ default: ++ retval = -DWC_E_INVALID; ++ DWC_ERROR("DWC OTG HCD - " ++ "ClearPortFeature request %xh " ++ "unknown or unsupported\n", wValue); ++ } ++ break; ++ case UCR_GET_HUB_DESCRIPTOR: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "GetHubDescriptor\n"); ++ hub_desc = (usb_hub_descriptor_t *) buf; ++ hub_desc->bDescLength = 9; ++ hub_desc->bDescriptorType = 0x29; ++ hub_desc->bNbrPorts = 1; ++ USETW(hub_desc->wHubCharacteristics, 0x08); ++ hub_desc->bPwrOn2PwrGood = 1; ++ hub_desc->bHubContrCurrent = 0; ++ hub_desc->DeviceRemovable[0] = 0; ++ hub_desc->DeviceRemovable[1] = 0xff; ++ break; ++ case UCR_GET_HUB_STATUS: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "GetHubStatus\n"); ++ DWC_MEMSET(buf, 0, 4); ++ break; ++ case UCR_GET_PORT_STATUS: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "GetPortStatus wIndex = 0x%04x FLAGS=0x%08x\n", ++ wIndex, dwc_otg_hcd->flags.d32); ++ if (!wIndex || wIndex > 1) ++ goto error; ++ ++ port_status = 0; ++ ++ if (dwc_otg_hcd->flags.b.port_connect_status_change) ++ port_status |= (1 << UHF_C_PORT_CONNECTION); ++ ++ if (dwc_otg_hcd->flags.b.port_enable_change) ++ port_status |= (1 << UHF_C_PORT_ENABLE); ++ ++ if (dwc_otg_hcd->flags.b.port_suspend_change) ++ port_status |= (1 << UHF_C_PORT_SUSPEND); ++ ++ if (dwc_otg_hcd->flags.b.port_l1_change) ++ port_status |= (1 << UHF_C_PORT_L1); ++ ++ if (dwc_otg_hcd->flags.b.port_reset_change) { ++ port_status |= (1 << UHF_C_PORT_RESET); ++ } ++ ++ if (dwc_otg_hcd->flags.b.port_over_current_change) { ++ DWC_WARN("Overcurrent change detected\n"); ++ port_status |= (1 << UHF_C_PORT_OVER_CURRENT); ++ } ++ ++ if (!dwc_otg_hcd->flags.b.port_connect_status) { ++ /* ++ * The port is disconnected, which means the core is ++ * either in device mode or it soon will be. Just ++ * return 0's for the remainder of the port status ++ * since the port register can't be read if the core ++ * is in device mode. ++ */ ++ *((__le32 *) buf) = dwc_cpu_to_le32(&port_status); ++ break; ++ } ++ ++ hprt0.d32 = DWC_READ_REG32(core_if->host_if->hprt0); ++ DWC_DEBUGPL(DBG_HCDV, " HPRT0: 0x%08x\n", hprt0.d32); ++ ++ if (hprt0.b.prtconnsts) ++ port_status |= (1 << UHF_PORT_CONNECTION); ++ ++ if (hprt0.b.prtena) ++ port_status |= (1 << UHF_PORT_ENABLE); ++ ++ if (hprt0.b.prtsusp) ++ port_status |= (1 << UHF_PORT_SUSPEND); ++ ++ if (hprt0.b.prtovrcurract) ++ port_status |= (1 << UHF_PORT_OVER_CURRENT); ++ ++ if (hprt0.b.prtrst) ++ port_status |= (1 << UHF_PORT_RESET); ++ ++ if (hprt0.b.prtpwr) ++ port_status |= (1 << UHF_PORT_POWER); ++ ++ if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) ++ port_status |= (1 << UHF_PORT_HIGH_SPEED); ++ else if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_LOW_SPEED) ++ port_status |= (1 << UHF_PORT_LOW_SPEED); ++ ++ if (hprt0.b.prttstctl) ++ port_status |= (1 << UHF_PORT_TEST); ++ if (dwc_otg_get_lpm_portsleepstatus(dwc_otg_hcd->core_if)) { ++ port_status |= (1 << UHF_PORT_L1); ++ } ++ /* ++ For Synopsys HW emulation of Power down wkup_control asserts the ++ hreset_n and prst_n on suspned. This causes the HPRT0 to be zero. ++ We intentionally tell the software that port is in L2Suspend state. ++ Only for STE. ++ */ ++ if ((core_if->power_down == 2) ++ && (core_if->hibernation_suspend == 1)) { ++ port_status |= (1 << UHF_PORT_SUSPEND); ++ } ++ /* USB_PORT_FEAT_INDICATOR unsupported always 0 */ ++ ++ *((__le32 *) buf) = dwc_cpu_to_le32(&port_status); ++ ++ break; ++ case UCR_SET_HUB_FEATURE: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "SetHubFeature\n"); ++ /* No HUB features supported */ ++ break; ++ case UCR_SET_PORT_FEATURE: ++ if (wValue != UHF_PORT_TEST && (!wIndex || wIndex > 1)) ++ goto error; ++ ++ if (!dwc_otg_hcd->flags.b.port_connect_status) { ++ /* ++ * The port is disconnected, which means the core is ++ * either in device mode or it soon will be. Just ++ * return without doing anything since the port ++ * register can't be written if the core is in device ++ * mode. ++ */ ++ break; ++ } ++ ++ switch (wValue) { ++ case UHF_PORT_SUSPEND: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "SetPortFeature - USB_PORT_FEAT_SUSPEND\n"); ++ if (dwc_otg_hcd_otg_port(dwc_otg_hcd) != wIndex) { ++ goto error; ++ } ++ if (core_if->power_down == 2) { ++ int timeout = 300; ++ dwc_irqflags_t flags; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ gusbcfg_data_t gusbcfg = {.d32 = 0 }; ++#ifdef DWC_DEV_SRPCAP ++ int32_t otg_cap_param = core_if->core_params->otg_cap; ++#endif ++ DWC_PRINTF("Preparing for complete power-off\n"); ++ ++ /* Save registers before hibernation */ ++ dwc_otg_save_global_regs(core_if); ++ dwc_otg_save_host_regs(core_if); ++ ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtsusp = 1; ++ hprt0.b.prtena = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ /* Spin hprt0.b.prtsusp to became 1 */ ++ do { ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ if (hprt0.b.prtsusp) { ++ break; ++ } ++ dwc_mdelay(1); ++ } while (--timeout); ++ if (!timeout) { ++ DWC_WARN("Suspend wasn't genereted\n"); ++ } ++ dwc_udelay(10); ++ ++ /* ++ * We need to disable interrupts to prevent servicing of any IRQ ++ * during going to hibernation ++ */ ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); ++ core_if->lx_state = DWC_OTG_L2; ++#ifdef DWC_DEV_SRPCAP ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = 0; ++ hprt0.b.prtena = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, ++ hprt0.d32); ++#endif ++ gusbcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs-> ++ gusbcfg); ++ if (gusbcfg.b.ulpi_utmi_sel == 1) { ++ /* ULPI interface */ ++ /* Suspend the Phy Clock */ ++ pcgcctl.d32 = 0; ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, ++ pcgcctl.d32); ++ dwc_udelay(10); ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ } else { ++ /* UTMI+ Interface */ ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, pcgcctl.d32); ++ dwc_udelay(10); ++ } ++#ifdef DWC_DEV_SRPCAP ++ gpwrdn.d32 = 0; ++ gpwrdn.b.dis_vbus = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++#endif ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ gpwrdn.d32 = 0; ++#ifdef DWC_DEV_SRPCAP ++ gpwrdn.b.srp_det_msk = 1; ++#endif ++ gpwrdn.b.disconn_det_msk = 1; ++ gpwrdn.b.lnstchng_msk = 1; ++ gpwrdn.b.sts_chngint_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Enable Power Down Clamp and all interrupts in GPWRDN */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnclmp = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ dwc_udelay(10); ++ ++ /* Switch off VDD */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ ++#ifdef DWC_DEV_SRPCAP ++ if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) ++ { ++ core_if->pwron_timer_started = 1; ++ DWC_TIMER_SCHEDULE(core_if->pwron_timer, 6000 /* 6 secs */ ); ++ } ++#endif ++ /* Save gpwrdn register for further usage if stschng interrupt */ ++ core_if->gr_backup->gpwrdn_local = ++ DWC_READ_REG32(&core_if->core_global_regs->gpwrdn); ++ ++ /* Set flag to indicate that we are in hibernation */ ++ core_if->hibernation_suspend = 1; ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock,flags); ++ ++ DWC_PRINTF("Host hibernation completed\n"); ++ // Exit from case statement ++ break; ++ ++ } ++ if (dwc_otg_hcd_otg_port(dwc_otg_hcd) == wIndex && ++ dwc_otg_hcd->fops->get_b_hnp_enable(dwc_otg_hcd)) { ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ gotgctl.b.hstsethnpen = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gotgctl, 0, gotgctl.d32); ++ core_if->op_state = A_SUSPEND; ++ } ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtsusp = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ { ++ dwc_irqflags_t flags; ++ /* Update lx_state */ ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); ++ core_if->lx_state = DWC_OTG_L2; ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags); ++ } ++ /* Suspend the Phy Clock */ ++ { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, 0, ++ pcgcctl.d32); ++ dwc_udelay(10); ++ } ++ ++ /* For HNP the bus must be suspended for at least 200ms. */ ++ if (dwc_otg_hcd->fops->get_b_hnp_enable(dwc_otg_hcd)) { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ dwc_mdelay(200); ++ } ++ ++ /** @todo - check how sw can wait for 1 sec to check asesvld??? */ ++#if 0 //vahrama !!!!!!!!!!!!!!!!!! ++ if (core_if->adp_enable) { ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ gpwrdn_data_t gpwrdn; ++ ++ while (gotgctl.b.asesvld == 1) { ++ gotgctl.d32 = ++ DWC_READ_REG32(&core_if-> ++ core_global_regs-> ++ gotgctl); ++ dwc_mdelay(100); ++ } ++ ++ /* Enable Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ ++ /* Unmask SRP detected interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.srp_det_msk = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs-> ++ gpwrdn, 0, gpwrdn.d32); ++ ++ dwc_otg_adp_probe_start(core_if); ++ } ++#endif ++ break; ++ case UHF_PORT_POWER: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "SetPortFeature - USB_PORT_FEAT_POWER\n"); ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtpwr = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ break; ++ case UHF_PORT_RESET: ++ if ((core_if->power_down == 2) ++ && (core_if->hibernation_suspend == 1)) { ++ /* If we are going to exit from Hibernated ++ * state via USB RESET. ++ */ ++ dwc_otg_host_hibernation_restore(core_if, 0, 1); ++ } else { ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ ++ DWC_DEBUGPL(DBG_HCD, ++ "DWC OTG HCD HUB CONTROL - " ++ "SetPortFeature - USB_PORT_FEAT_RESET\n"); ++ { ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ pcgcctl.b.enbl_sleep_gating = 1; ++ pcgcctl.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, pcgcctl.d32, 0); ++ DWC_WRITE_REG32(core_if->pcgcctl, 0); ++ } ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ { ++ glpmcfg_data_t lpmcfg; ++ lpmcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ if (lpmcfg.b.prt_sleep_sts) { ++ lpmcfg.b.en_utmi_sleep = 0; ++ lpmcfg.b.hird_thres &= (~(1 << 4)); ++ DWC_WRITE_REG32 ++ (&core_if->core_global_regs->glpmcfg, ++ lpmcfg.d32); ++ dwc_mdelay(1); ++ } ++ } ++#endif ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ /* Clear suspend bit if resetting from suspended state. */ ++ hprt0.b.prtsusp = 0; ++ /* When B-Host the Port reset bit is set in ++ * the Start HCD Callback function, so that ++ * the reset is started within 1ms of the HNP ++ * success interrupt. */ ++ if (!dwc_otg_hcd_is_b_host(dwc_otg_hcd)) { ++ hprt0.b.prtpwr = 1; ++ hprt0.b.prtrst = 1; ++ DWC_PRINTF("Indeed it is in host mode hprt0 = %08x\n",hprt0.d32); ++ DWC_WRITE_REG32(core_if->host_if->hprt0, ++ hprt0.d32); ++ } ++ /* Clear reset bit in 10ms (FS/LS) or 50ms (HS) */ ++ dwc_mdelay(60); ++ hprt0.b.prtrst = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ core_if->lx_state = DWC_OTG_L0; /* Now back to the on state */ ++ } ++ break; ++#ifdef DWC_HS_ELECT_TST ++ case UHF_PORT_TEST: ++ { ++ uint32_t t; ++ gintmsk_data_t gintmsk; ++ ++ t = (wIndex >> 8); /* MSB wIndex USB */ ++ DWC_DEBUGPL(DBG_HCD, ++ "DWC OTG HCD HUB CONTROL - " ++ "SetPortFeature - USB_PORT_FEAT_TEST %d\n", ++ t); ++ DWC_WARN("USB_PORT_FEAT_TEST %d\n", t); ++ if (t < 6) { ++ hprt0.d32 = dwc_otg_read_hprt0(core_if); ++ hprt0.b.prttstctl = t; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, ++ hprt0.d32); ++ } else { ++ /* Setup global vars with reg addresses (quick and ++ * dirty hack, should be cleaned up) ++ */ ++ global_regs = core_if->core_global_regs; ++ hc_global_regs = ++ core_if->host_if->host_global_regs; ++ hc_regs = ++ (dwc_otg_hc_regs_t *) ((char *) ++ global_regs + ++ 0x500); ++ data_fifo = ++ (uint32_t *) ((char *)global_regs + ++ 0x1000); ++ ++ if (t == 6) { /* HS_HOST_PORT_SUSPEND_RESUME */ ++ /* Save current interrupt mask */ ++ gintmsk.d32 = ++ DWC_READ_REG32 ++ (&global_regs->gintmsk); ++ ++ /* Disable all interrupts while we muck with ++ * the hardware directly ++ */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, 0); ++ ++ /* 15 second delay per the test spec */ ++ dwc_mdelay(15000); ++ ++ /* Drive suspend on the root port */ ++ hprt0.d32 = ++ dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtsusp = 1; ++ hprt0.b.prtres = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ /* 15 second delay per the test spec */ ++ dwc_mdelay(15000); ++ ++ /* Drive resume on the root port */ ++ hprt0.d32 = ++ dwc_otg_read_hprt0(core_if); ++ hprt0.b.prtsusp = 0; ++ hprt0.b.prtres = 1; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ dwc_mdelay(100); ++ ++ /* Clear the resume bit */ ++ hprt0.b.prtres = 0; ++ DWC_WRITE_REG32(core_if->host_if->hprt0, hprt0.d32); ++ ++ /* Restore interrupts */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32); ++ } else if (t == 7) { /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR setup */ ++ /* Save current interrupt mask */ ++ gintmsk.d32 = ++ DWC_READ_REG32 ++ (&global_regs->gintmsk); ++ ++ /* Disable all interrupts while we muck with ++ * the hardware directly ++ */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, 0); ++ ++ /* 15 second delay per the test spec */ ++ dwc_mdelay(15000); ++ ++ /* Send the Setup packet */ ++ do_setup(); ++ ++ /* 15 second delay so nothing else happens for awhile */ ++ dwc_mdelay(15000); ++ ++ /* Restore interrupts */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32); ++ } else if (t == 8) { /* SINGLE_STEP_GET_DEVICE_DESCRIPTOR execute */ ++ /* Save current interrupt mask */ ++ gintmsk.d32 = ++ DWC_READ_REG32 ++ (&global_regs->gintmsk); ++ ++ /* Disable all interrupts while we muck with ++ * the hardware directly ++ */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, 0); ++ ++ /* Send the Setup packet */ ++ do_setup(); ++ ++ /* 15 second delay so nothing else happens for awhile */ ++ dwc_mdelay(15000); ++ ++ /* Send the In and Ack packets */ ++ do_in_ack(); ++ ++ /* 15 second delay so nothing else happens for awhile */ ++ dwc_mdelay(15000); ++ ++ /* Restore interrupts */ ++ DWC_WRITE_REG32(&global_regs->gintmsk, gintmsk.d32); ++ } ++ } ++ break; ++ } ++#endif /* DWC_HS_ELECT_TST */ ++ ++ case UHF_PORT_INDICATOR: ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB CONTROL - " ++ "SetPortFeature - USB_PORT_FEAT_INDICATOR\n"); ++ /* Not supported */ ++ break; ++ default: ++ retval = -DWC_E_INVALID; ++ DWC_ERROR("DWC OTG HCD - " ++ "SetPortFeature request %xh " ++ "unknown or unsupported\n", wValue); ++ break; ++ } ++ break; ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ case UCR_SET_AND_TEST_PORT_FEATURE: ++ if (wValue != UHF_PORT_L1) { ++ goto error; ++ } ++ { ++ int portnum, hird, devaddr, remwake; ++ glpmcfg_data_t lpmcfg; ++ uint32_t time_usecs; ++ gintsts_data_t gintsts; ++ gintmsk_data_t gintmsk; ++ ++ if (!dwc_otg_get_param_lpm_enable(core_if)) { ++ goto error; ++ } ++ if (wValue != UHF_PORT_L1 || wLength != 1) { ++ goto error; ++ } ++ /* Check if the port currently is in SLEEP state */ ++ lpmcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ if (lpmcfg.b.prt_sleep_sts) { ++ DWC_INFO("Port is already in sleep mode\n"); ++ buf[0] = 0; /* Return success */ ++ break; ++ } ++ ++ portnum = wIndex & 0xf; ++ hird = (wIndex >> 4) & 0xf; ++ devaddr = (wIndex >> 8) & 0x7f; ++ remwake = (wIndex >> 15); ++ ++ if (portnum != 1) { ++ retval = -DWC_E_INVALID; ++ DWC_WARN ++ ("Wrong port number(%d) in SetandTestPortFeature request\n", ++ portnum); ++ break; ++ } ++ ++ DWC_PRINTF ++ ("SetandTestPortFeature request: portnum = %d, hird = %d, devaddr = %d, rewake = %d\n", ++ portnum, hird, devaddr, remwake); ++ /* Disable LPM interrupt */ ++ gintmsk.d32 = 0; ++ gintmsk.b.lpmtranrcvd = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, ++ gintmsk.d32, 0); ++ ++ if (dwc_otg_hcd_send_lpm ++ (dwc_otg_hcd, devaddr, hird, remwake)) { ++ retval = -DWC_E_INVALID; ++ break; ++ } ++ ++ time_usecs = 10 * (lpmcfg.b.retry_count + 1); ++ /* We will consider timeout if time_usecs microseconds pass, ++ * and we don't receive LPM transaction status. ++ * After receiving non-error responce(ACK/NYET/STALL) from device, ++ * core will set lpmtranrcvd bit. ++ */ ++ do { ++ gintsts.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ if (gintsts.b.lpmtranrcvd) { ++ break; ++ } ++ dwc_udelay(1); ++ } while (--time_usecs); ++ /* lpm_int bit will be cleared in LPM interrupt handler */ ++ ++ /* Now fill status ++ * 0x00 - Success ++ * 0x10 - NYET ++ * 0x11 - Timeout ++ */ ++ if (!gintsts.b.lpmtranrcvd) { ++ buf[0] = 0x3; /* Completion code is Timeout */ ++ dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd); ++ } else { ++ lpmcfg.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ if (lpmcfg.b.lpm_resp == 0x3) { ++ /* ACK responce from the device */ ++ buf[0] = 0x00; /* Success */ ++ } else if (lpmcfg.b.lpm_resp == 0x2) { ++ /* NYET responce from the device */ ++ buf[0] = 0x2; ++ } else { ++ /* Otherwise responce with Timeout */ ++ buf[0] = 0x3; ++ } ++ } ++ DWC_PRINTF("Device responce to LPM trans is %x\n", ++ lpmcfg.b.lpm_resp); ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, ++ gintmsk.d32); ++ ++ break; ++ } ++#endif /* CONFIG_USB_DWC_OTG_LPM */ ++ default: ++error: ++ retval = -DWC_E_INVALID; ++ DWC_WARN("DWC OTG HCD - " ++ "Unknown hub control request type or invalid typeReq: %xh wIndex: %xh wValue: %xh\n", ++ typeReq, wIndex, wValue); ++ break; ++ } ++ ++ return retval; ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++/** Returns index of host channel to perform LPM transaction. */ ++int dwc_otg_hcd_get_hc_for_lpm_tran(dwc_otg_hcd_t * hcd, uint8_t devaddr) ++{ ++ dwc_otg_core_if_t *core_if = hcd->core_if; ++ dwc_hc_t *hc; ++ hcchar_data_t hcchar; ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ ++ if (DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) { ++ DWC_PRINTF("No free channel to select for LPM transaction\n"); ++ return -1; ++ } ++ ++ hc = DWC_CIRCLEQ_FIRST(&hcd->free_hc_list); ++ ++ /* Mask host channel interrupts. */ ++ gintmsk.b.hcintr = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, gintmsk.d32, 0); ++ ++ /* Fill fields that core needs for LPM transaction */ ++ hcchar.b.devaddr = devaddr; ++ hcchar.b.epnum = 0; ++ hcchar.b.eptype = DWC_OTG_EP_TYPE_CONTROL; ++ hcchar.b.mps = 64; ++ hcchar.b.lspddev = (hc->speed == DWC_OTG_EP_SPEED_LOW); ++ hcchar.b.epdir = 0; /* OUT */ ++ DWC_WRITE_REG32(&core_if->host_if->hc_regs[hc->hc_num]->hcchar, ++ hcchar.d32); ++ ++ /* Remove the host channel from the free list. */ ++ DWC_CIRCLEQ_REMOVE_INIT(&hcd->free_hc_list, hc, hc_list_entry); ++ ++ DWC_PRINTF("hcnum = %d devaddr = %d\n", hc->hc_num, devaddr); ++ ++ return hc->hc_num; ++} ++ ++/** Release hc after performing LPM transaction */ ++void dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd_t * hcd) ++{ ++ dwc_hc_t *hc; ++ glpmcfg_data_t lpmcfg; ++ uint8_t hc_num; ++ ++ lpmcfg.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->glpmcfg); ++ hc_num = lpmcfg.b.lpm_chan_index; ++ ++ hc = hcd->hc_ptr_array[hc_num]; ++ ++ DWC_PRINTF("Freeing channel %d after LPM\n", hc_num); ++ /* Return host channel to free list */ ++ DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry); ++} ++ ++int dwc_otg_hcd_send_lpm(dwc_otg_hcd_t * hcd, uint8_t devaddr, uint8_t hird, ++ uint8_t bRemoteWake) ++{ ++ glpmcfg_data_t lpmcfg; ++ pcgcctl_data_t pcgcctl = {.d32 = 0 }; ++ int channel; ++ ++ channel = dwc_otg_hcd_get_hc_for_lpm_tran(hcd, devaddr); ++ if (channel < 0) { ++ return channel; ++ } ++ ++ pcgcctl.b.enbl_sleep_gating = 1; ++ DWC_MODIFY_REG32(hcd->core_if->pcgcctl, 0, pcgcctl.d32); ++ ++ /* Read LPM config register */ ++ lpmcfg.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->glpmcfg); ++ ++ /* Program LPM transaction fields */ ++ lpmcfg.b.rem_wkup_en = bRemoteWake; ++ lpmcfg.b.hird = hird; ++ lpmcfg.b.hird_thres = 0x1c; ++ lpmcfg.b.lpm_chan_index = channel; ++ lpmcfg.b.en_utmi_sleep = 1; ++ /* Program LPM config register */ ++ DWC_WRITE_REG32(&hcd->core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++ ++ /* Send LPM transaction */ ++ lpmcfg.b.send_lpm = 1; ++ DWC_WRITE_REG32(&hcd->core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++ ++ return 0; ++} ++ ++#endif /* CONFIG_USB_DWC_OTG_LPM */ ++ ++int dwc_otg_hcd_is_status_changed(dwc_otg_hcd_t * hcd, int port) ++{ ++ int retval; ++ ++ if (port != 1) { ++ return -DWC_E_INVALID; ++ } ++ ++ retval = (hcd->flags.b.port_connect_status_change || ++ hcd->flags.b.port_reset_change || ++ hcd->flags.b.port_enable_change || ++ hcd->flags.b.port_suspend_change || ++ hcd->flags.b.port_over_current_change); ++#ifdef DEBUG ++ if (retval) { ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD HUB STATUS DATA:" ++ " Root port status changed\n"); ++ DWC_DEBUGPL(DBG_HCDV, " port_connect_status_change: %d\n", ++ hcd->flags.b.port_connect_status_change); ++ DWC_DEBUGPL(DBG_HCDV, " port_reset_change: %d\n", ++ hcd->flags.b.port_reset_change); ++ DWC_DEBUGPL(DBG_HCDV, " port_enable_change: %d\n", ++ hcd->flags.b.port_enable_change); ++ DWC_DEBUGPL(DBG_HCDV, " port_suspend_change: %d\n", ++ hcd->flags.b.port_suspend_change); ++ DWC_DEBUGPL(DBG_HCDV, " port_over_current_change: %d\n", ++ hcd->flags.b.port_over_current_change); ++ } ++#endif ++ return retval; ++} ++ ++int dwc_otg_hcd_get_frame_number(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ hfnum_data_t hfnum; ++ hfnum.d32 = ++ DWC_READ_REG32(&dwc_otg_hcd->core_if->host_if->host_global_regs-> ++ hfnum); ++ ++#ifdef DEBUG_SOF ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD GET FRAME NUMBER %d\n", ++ hfnum.b.frnum); ++#endif ++ return hfnum.b.frnum; ++} ++ ++int dwc_otg_hcd_start(dwc_otg_hcd_t * hcd, ++ struct dwc_otg_hcd_function_ops *fops) ++{ ++ int retval = 0; ++ ++ hcd->fops = fops; ++ if (!dwc_otg_is_device_mode(hcd->core_if) && ++ (!hcd->core_if->adp_enable || hcd->core_if->adp.adp_started)) { ++ dwc_otg_hcd_reinit(hcd); ++ } else { ++ retval = -DWC_E_NO_DEVICE; ++ } ++ ++ return retval; ++} ++ ++void *dwc_otg_hcd_get_priv_data(dwc_otg_hcd_t * hcd) ++{ ++ return hcd->priv; ++} ++ ++void dwc_otg_hcd_set_priv_data(dwc_otg_hcd_t * hcd, void *priv_data) ++{ ++ hcd->priv = priv_data; ++} ++ ++uint32_t dwc_otg_hcd_otg_port(dwc_otg_hcd_t * hcd) ++{ ++ return hcd->otg_port; ++} ++ ++uint32_t dwc_otg_hcd_is_b_host(dwc_otg_hcd_t * hcd) ++{ ++ uint32_t is_b_host; ++ if (hcd->core_if->op_state == B_HOST) { ++ is_b_host = 1; ++ } else { ++ is_b_host = 0; ++ } ++ ++ return is_b_host; ++} ++ ++dwc_otg_hcd_urb_t *dwc_otg_hcd_urb_alloc(dwc_otg_hcd_t * hcd, ++ int iso_desc_count, int atomic_alloc) ++{ ++ dwc_otg_hcd_urb_t *dwc_otg_urb; ++ uint32_t size; ++ ++ size = ++ sizeof(*dwc_otg_urb) + ++ iso_desc_count * sizeof(struct dwc_otg_hcd_iso_packet_desc); ++ if (atomic_alloc) ++ dwc_otg_urb = DWC_ALLOC_ATOMIC(size); ++ else ++ dwc_otg_urb = DWC_ALLOC(size); ++ ++ if (NULL != dwc_otg_urb) ++ dwc_otg_urb->packet_count = iso_desc_count; ++ else { ++ dwc_otg_urb->packet_count = 0; ++ if (size != 0) { ++ DWC_ERROR("**** DWC OTG HCD URB alloc - " ++ "%salloc of %db failed\n", ++ atomic_alloc?"atomic ":"", size); ++ } ++ } ++ ++ return dwc_otg_urb; ++} ++ ++void dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_hcd_urb_t * dwc_otg_urb, ++ uint8_t dev_addr, uint8_t ep_num, ++ uint8_t ep_type, uint8_t ep_dir, uint16_t mps) ++{ ++ dwc_otg_hcd_fill_pipe(&dwc_otg_urb->pipe_info, dev_addr, ep_num, ++ ep_type, ep_dir, mps); ++#if 0 ++ DWC_PRINTF ++ ("addr = %d, ep_num = %d, ep_dir = 0x%x, ep_type = 0x%x, mps = %d\n", ++ dev_addr, ep_num, ep_dir, ep_type, mps); ++#endif ++} ++ ++void dwc_otg_hcd_urb_set_params(dwc_otg_hcd_urb_t * dwc_otg_urb, ++ void *urb_handle, void *buf, dwc_dma_t dma, ++ uint32_t buflen, void *setup_packet, ++ dwc_dma_t setup_dma, uint32_t flags, ++ uint16_t interval) ++{ ++ dwc_otg_urb->priv = urb_handle; ++ dwc_otg_urb->buf = buf; ++ dwc_otg_urb->dma = dma; ++ dwc_otg_urb->length = buflen; ++ dwc_otg_urb->setup_packet = setup_packet; ++ dwc_otg_urb->setup_dma = setup_dma; ++ dwc_otg_urb->flags = flags; ++ dwc_otg_urb->interval = interval; ++ dwc_otg_urb->status = -DWC_E_IN_PROGRESS; ++} ++ ++uint32_t dwc_otg_hcd_urb_get_status(dwc_otg_hcd_urb_t * dwc_otg_urb) ++{ ++ return dwc_otg_urb->status; ++} ++ ++uint32_t dwc_otg_hcd_urb_get_actual_length(dwc_otg_hcd_urb_t * dwc_otg_urb) ++{ ++ return dwc_otg_urb->actual_length; ++} ++ ++uint32_t dwc_otg_hcd_urb_get_error_count(dwc_otg_hcd_urb_t * dwc_otg_urb) ++{ ++ return dwc_otg_urb->error_count; ++} ++ ++void dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_hcd_urb_t * dwc_otg_urb, ++ int desc_num, uint32_t offset, ++ uint32_t length) ++{ ++ dwc_otg_urb->iso_descs[desc_num].offset = offset; ++ dwc_otg_urb->iso_descs[desc_num].length = length; ++} ++ ++uint32_t dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_hcd_urb_t * dwc_otg_urb, ++ int desc_num) ++{ ++ return dwc_otg_urb->iso_descs[desc_num].status; ++} ++ ++uint32_t dwc_otg_hcd_urb_get_iso_desc_actual_length(dwc_otg_hcd_urb_t * ++ dwc_otg_urb, int desc_num) ++{ ++ return dwc_otg_urb->iso_descs[desc_num].actual_length; ++} ++ ++int dwc_otg_hcd_is_bandwidth_allocated(dwc_otg_hcd_t * hcd, void *ep_handle) ++{ ++ int allocated = 0; ++ dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle; ++ ++ if (qh) { ++ if (!DWC_LIST_EMPTY(&qh->qh_list_entry)) { ++ allocated = 1; ++ } ++ } ++ return allocated; ++} ++ ++int dwc_otg_hcd_is_bandwidth_freed(dwc_otg_hcd_t * hcd, void *ep_handle) ++{ ++ dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle; ++ int freed = 0; ++ DWC_ASSERT(qh, "qh is not allocated\n"); ++ ++ if (DWC_LIST_EMPTY(&qh->qh_list_entry)) { ++ freed = 1; ++ } ++ ++ return freed; ++} ++ ++uint8_t dwc_otg_hcd_get_ep_bandwidth(dwc_otg_hcd_t * hcd, void *ep_handle) ++{ ++ dwc_otg_qh_t *qh = (dwc_otg_qh_t *) ep_handle; ++ DWC_ASSERT(qh, "qh is not allocated\n"); ++ return qh->usecs; ++} ++ ++void dwc_otg_hcd_dump_state(dwc_otg_hcd_t * hcd) ++{ ++#ifdef DEBUG ++ int num_channels; ++ int i; ++ gnptxsts_data_t np_tx_status; ++ hptxsts_data_t p_tx_status; ++ ++ num_channels = hcd->core_if->core_params->host_channels; ++ DWC_PRINTF("\n"); ++ DWC_PRINTF ++ ("************************************************************\n"); ++ DWC_PRINTF("HCD State:\n"); ++ DWC_PRINTF(" Num channels: %d\n", num_channels); ++ for (i = 0; i < num_channels; i++) { ++ dwc_hc_t *hc = hcd->hc_ptr_array[i]; ++ DWC_PRINTF(" Channel %d:\n", i); ++ DWC_PRINTF(" dev_addr: %d, ep_num: %d, ep_is_in: %d\n", ++ hc->dev_addr, hc->ep_num, hc->ep_is_in); ++ DWC_PRINTF(" speed: %d\n", hc->speed); ++ DWC_PRINTF(" ep_type: %d\n", hc->ep_type); ++ DWC_PRINTF(" max_packet: %d\n", hc->max_packet); ++ DWC_PRINTF(" data_pid_start: %d\n", hc->data_pid_start); ++ DWC_PRINTF(" multi_count: %d\n", hc->multi_count); ++ DWC_PRINTF(" xfer_started: %d\n", hc->xfer_started); ++ DWC_PRINTF(" xfer_buff: %p\n", hc->xfer_buff); ++ DWC_PRINTF(" xfer_len: %d\n", hc->xfer_len); ++ DWC_PRINTF(" xfer_count: %d\n", hc->xfer_count); ++ DWC_PRINTF(" halt_on_queue: %d\n", hc->halt_on_queue); ++ DWC_PRINTF(" halt_pending: %d\n", hc->halt_pending); ++ DWC_PRINTF(" halt_status: %d\n", hc->halt_status); ++ DWC_PRINTF(" do_split: %d\n", hc->do_split); ++ DWC_PRINTF(" complete_split: %d\n", hc->complete_split); ++ DWC_PRINTF(" hub_addr: %d\n", hc->hub_addr); ++ DWC_PRINTF(" port_addr: %d\n", hc->port_addr); ++ DWC_PRINTF(" xact_pos: %d\n", hc->xact_pos); ++ DWC_PRINTF(" requests: %d\n", hc->requests); ++ DWC_PRINTF(" qh: %p\n", hc->qh); ++ if (hc->xfer_started) { ++ hfnum_data_t hfnum; ++ hcchar_data_t hcchar; ++ hctsiz_data_t hctsiz; ++ hcint_data_t hcint; ++ hcintmsk_data_t hcintmsk; ++ hfnum.d32 = ++ DWC_READ_REG32(&hcd->core_if-> ++ host_if->host_global_regs->hfnum); ++ hcchar.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if-> ++ hc_regs[i]->hcchar); ++ hctsiz.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if-> ++ hc_regs[i]->hctsiz); ++ hcint.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if-> ++ hc_regs[i]->hcint); ++ hcintmsk.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if-> ++ hc_regs[i]->hcintmsk); ++ DWC_PRINTF(" hfnum: 0x%08x\n", hfnum.d32); ++ DWC_PRINTF(" hcchar: 0x%08x\n", hcchar.d32); ++ DWC_PRINTF(" hctsiz: 0x%08x\n", hctsiz.d32); ++ DWC_PRINTF(" hcint: 0x%08x\n", hcint.d32); ++ DWC_PRINTF(" hcintmsk: 0x%08x\n", hcintmsk.d32); ++ } ++ if (hc->xfer_started && hc->qh) { ++ dwc_otg_qtd_t *qtd; ++ dwc_otg_hcd_urb_t *urb; ++ ++ DWC_CIRCLEQ_FOREACH(qtd, &hc->qh->qtd_list, qtd_list_entry) { ++ if (!qtd->in_process) ++ break; ++ ++ urb = qtd->urb; ++ DWC_PRINTF(" URB Info:\n"); ++ DWC_PRINTF(" qtd: %p, urb: %p\n", qtd, urb); ++ if (urb) { ++ DWC_PRINTF(" Dev: %d, EP: %d %s\n", ++ dwc_otg_hcd_get_dev_addr(&urb-> ++ pipe_info), ++ dwc_otg_hcd_get_ep_num(&urb-> ++ pipe_info), ++ dwc_otg_hcd_is_pipe_in(&urb-> ++ pipe_info) ? ++ "IN" : "OUT"); ++ DWC_PRINTF(" Max packet size: %d\n", ++ dwc_otg_hcd_get_mps(&urb-> ++ pipe_info)); ++ DWC_PRINTF(" transfer_buffer: %p\n", ++ urb->buf); ++ DWC_PRINTF(" transfer_dma: %p\n", ++ (void *)urb->dma); ++ DWC_PRINTF(" transfer_buffer_length: %d\n", ++ urb->length); ++ DWC_PRINTF(" actual_length: %d\n", ++ urb->actual_length); ++ } ++ } ++ } ++ } ++ DWC_PRINTF(" non_periodic_channels: %d\n", hcd->non_periodic_channels); ++ DWC_PRINTF(" periodic_channels: %d\n", hcd->periodic_channels); ++ DWC_PRINTF(" periodic_usecs: %d\n", hcd->periodic_usecs); ++ np_tx_status.d32 = ++ DWC_READ_REG32(&hcd->core_if->core_global_regs->gnptxsts); ++ DWC_PRINTF(" NP Tx Req Queue Space Avail: %d\n", ++ np_tx_status.b.nptxqspcavail); ++ DWC_PRINTF(" NP Tx FIFO Space Avail: %d\n", ++ np_tx_status.b.nptxfspcavail); ++ p_tx_status.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hptxsts); ++ DWC_PRINTF(" P Tx Req Queue Space Avail: %d\n", ++ p_tx_status.b.ptxqspcavail); ++ DWC_PRINTF(" P Tx FIFO Space Avail: %d\n", p_tx_status.b.ptxfspcavail); ++ dwc_otg_hcd_dump_frrem(hcd); ++ dwc_otg_dump_global_registers(hcd->core_if); ++ dwc_otg_dump_host_registers(hcd->core_if); ++ DWC_PRINTF ++ ("************************************************************\n"); ++ DWC_PRINTF("\n"); ++#endif ++} ++ ++#ifdef DEBUG ++void dwc_print_setup_data(uint8_t * setup) ++{ ++ int i; ++ if (CHK_DEBUG_LEVEL(DBG_HCD)) { ++ DWC_PRINTF("Setup Data = MSB "); ++ for (i = 7; i >= 0; i--) ++ DWC_PRINTF("%02x ", setup[i]); ++ DWC_PRINTF("\n"); ++ DWC_PRINTF(" bmRequestType Tranfer = %s\n", ++ (setup[0] & 0x80) ? "Device-to-Host" : ++ "Host-to-Device"); ++ DWC_PRINTF(" bmRequestType Type = "); ++ switch ((setup[0] & 0x60) >> 5) { ++ case 0: ++ DWC_PRINTF("Standard\n"); ++ break; ++ case 1: ++ DWC_PRINTF("Class\n"); ++ break; ++ case 2: ++ DWC_PRINTF("Vendor\n"); ++ break; ++ case 3: ++ DWC_PRINTF("Reserved\n"); ++ break; ++ } ++ DWC_PRINTF(" bmRequestType Recipient = "); ++ switch (setup[0] & 0x1f) { ++ case 0: ++ DWC_PRINTF("Device\n"); ++ break; ++ case 1: ++ DWC_PRINTF("Interface\n"); ++ break; ++ case 2: ++ DWC_PRINTF("Endpoint\n"); ++ break; ++ case 3: ++ DWC_PRINTF("Other\n"); ++ break; ++ default: ++ DWC_PRINTF("Reserved\n"); ++ break; ++ } ++ DWC_PRINTF(" bRequest = 0x%0x\n", setup[1]); ++ DWC_PRINTF(" wValue = 0x%0x\n", *((uint16_t *) & setup[2])); ++ DWC_PRINTF(" wIndex = 0x%0x\n", *((uint16_t *) & setup[4])); ++ DWC_PRINTF(" wLength = 0x%0x\n\n", *((uint16_t *) & setup[6])); ++ } ++} ++#endif ++ ++void dwc_otg_hcd_dump_frrem(dwc_otg_hcd_t * hcd) ++{ ++#if 0 ++ DWC_PRINTF("Frame remaining at SOF:\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->frrem_samples, hcd->frrem_accum, ++ (hcd->frrem_samples > 0) ? ++ hcd->frrem_accum / hcd->frrem_samples : 0); ++ ++ DWC_PRINTF("\n"); ++ DWC_PRINTF("Frame remaining at start_transfer (uframe 7):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->core_if->hfnum_7_samples, ++ hcd->core_if->hfnum_7_frrem_accum, ++ (hcd->core_if->hfnum_7_samples > ++ 0) ? hcd->core_if->hfnum_7_frrem_accum / ++ hcd->core_if->hfnum_7_samples : 0); ++ DWC_PRINTF("Frame remaining at start_transfer (uframe 0):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->core_if->hfnum_0_samples, ++ hcd->core_if->hfnum_0_frrem_accum, ++ (hcd->core_if->hfnum_0_samples > ++ 0) ? hcd->core_if->hfnum_0_frrem_accum / ++ hcd->core_if->hfnum_0_samples : 0); ++ DWC_PRINTF("Frame remaining at start_transfer (uframe 1-6):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->core_if->hfnum_other_samples, ++ hcd->core_if->hfnum_other_frrem_accum, ++ (hcd->core_if->hfnum_other_samples > ++ 0) ? hcd->core_if->hfnum_other_frrem_accum / ++ hcd->core_if->hfnum_other_samples : 0); ++ ++ DWC_PRINTF("\n"); ++ DWC_PRINTF("Frame remaining at sample point A (uframe 7):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_7_samples_a, hcd->hfnum_7_frrem_accum_a, ++ (hcd->hfnum_7_samples_a > 0) ? ++ hcd->hfnum_7_frrem_accum_a / hcd->hfnum_7_samples_a : 0); ++ DWC_PRINTF("Frame remaining at sample point A (uframe 0):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_0_samples_a, hcd->hfnum_0_frrem_accum_a, ++ (hcd->hfnum_0_samples_a > 0) ? ++ hcd->hfnum_0_frrem_accum_a / hcd->hfnum_0_samples_a : 0); ++ DWC_PRINTF("Frame remaining at sample point A (uframe 1-6):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_other_samples_a, hcd->hfnum_other_frrem_accum_a, ++ (hcd->hfnum_other_samples_a > 0) ? ++ hcd->hfnum_other_frrem_accum_a / ++ hcd->hfnum_other_samples_a : 0); ++ ++ DWC_PRINTF("\n"); ++ DWC_PRINTF("Frame remaining at sample point B (uframe 7):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_7_samples_b, hcd->hfnum_7_frrem_accum_b, ++ (hcd->hfnum_7_samples_b > 0) ? ++ hcd->hfnum_7_frrem_accum_b / hcd->hfnum_7_samples_b : 0); ++ DWC_PRINTF("Frame remaining at sample point B (uframe 0):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_0_samples_b, hcd->hfnum_0_frrem_accum_b, ++ (hcd->hfnum_0_samples_b > 0) ? ++ hcd->hfnum_0_frrem_accum_b / hcd->hfnum_0_samples_b : 0); ++ DWC_PRINTF("Frame remaining at sample point B (uframe 1-6):\n"); ++ DWC_PRINTF(" samples %u, accum %llu, avg %llu\n", ++ hcd->hfnum_other_samples_b, hcd->hfnum_other_frrem_accum_b, ++ (hcd->hfnum_other_samples_b > 0) ? ++ hcd->hfnum_other_frrem_accum_b / ++ hcd->hfnum_other_samples_b : 0); ++#endif ++} ++ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,824 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd.h $ ++ * $Revision: #58 $ ++ * $Date: 2011/09/15 $ ++ * $Change: 1846647 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++#ifndef __DWC_HCD_H__ ++#define __DWC_HCD_H__ ++ ++#include "dwc_otg_os_dep.h" ++#include "usb.h" ++#include "dwc_otg_hcd_if.h" ++#include "dwc_otg_core_if.h" ++#include "dwc_list.h" ++#include "dwc_otg_cil.h" ++ ++/** ++ * @file ++ * ++ * This file contains the structures, constants, and interfaces for ++ * the Host Contoller Driver (HCD). ++ * ++ * The Host Controller Driver (HCD) is responsible for translating requests ++ * from the USB Driver into the appropriate actions on the DWC_otg controller. ++ * It isolates the USBD from the specifics of the controller by providing an ++ * API to the USBD. ++ */ ++ ++struct dwc_otg_hcd_pipe_info { ++ uint8_t dev_addr; ++ uint8_t ep_num; ++ uint8_t pipe_type; ++ uint8_t pipe_dir; ++ uint16_t mps; ++}; ++ ++struct dwc_otg_hcd_iso_packet_desc { ++ uint32_t offset; ++ uint32_t length; ++ uint32_t actual_length; ++ uint32_t status; ++}; ++ ++struct dwc_otg_qtd; ++ ++struct dwc_otg_hcd_urb { ++ void *priv; ++ struct dwc_otg_qtd *qtd; ++ void *buf; ++ dwc_dma_t dma; ++ void *setup_packet; ++ dwc_dma_t setup_dma; ++ uint32_t length; ++ uint32_t actual_length; ++ uint32_t status; ++ uint32_t error_count; ++ uint32_t packet_count; ++ uint32_t flags; ++ uint16_t interval; ++ struct dwc_otg_hcd_pipe_info pipe_info; ++ struct dwc_otg_hcd_iso_packet_desc iso_descs[0]; ++}; ++ ++static inline uint8_t dwc_otg_hcd_get_ep_num(struct dwc_otg_hcd_pipe_info *pipe) ++{ ++ return pipe->ep_num; ++} ++ ++static inline uint8_t dwc_otg_hcd_get_pipe_type(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return pipe->pipe_type; ++} ++ ++static inline uint16_t dwc_otg_hcd_get_mps(struct dwc_otg_hcd_pipe_info *pipe) ++{ ++ return pipe->mps; ++} ++ ++static inline uint8_t dwc_otg_hcd_get_dev_addr(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return pipe->dev_addr; ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_isoc(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return (pipe->pipe_type == UE_ISOCHRONOUS); ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_int(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return (pipe->pipe_type == UE_INTERRUPT); ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_bulk(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return (pipe->pipe_type == UE_BULK); ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_control(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return (pipe->pipe_type == UE_CONTROL); ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_in(struct dwc_otg_hcd_pipe_info *pipe) ++{ ++ return (pipe->pipe_dir == UE_DIR_IN); ++} ++ ++static inline uint8_t dwc_otg_hcd_is_pipe_out(struct dwc_otg_hcd_pipe_info ++ *pipe) ++{ ++ return (!dwc_otg_hcd_is_pipe_in(pipe)); ++} ++ ++static inline void dwc_otg_hcd_fill_pipe(struct dwc_otg_hcd_pipe_info *pipe, ++ uint8_t devaddr, uint8_t ep_num, ++ uint8_t pipe_type, uint8_t pipe_dir, ++ uint16_t mps) ++{ ++ pipe->dev_addr = devaddr; ++ pipe->ep_num = ep_num; ++ pipe->pipe_type = pipe_type; ++ pipe->pipe_dir = pipe_dir; ++ pipe->mps = mps; ++} ++ ++/** ++ * Phases for control transfers. ++ */ ++typedef enum dwc_otg_control_phase { ++ DWC_OTG_CONTROL_SETUP, ++ DWC_OTG_CONTROL_DATA, ++ DWC_OTG_CONTROL_STATUS ++} dwc_otg_control_phase_e; ++ ++/** Transaction types. */ ++typedef enum dwc_otg_transaction_type { ++ DWC_OTG_TRANSACTION_NONE, ++ DWC_OTG_TRANSACTION_PERIODIC, ++ DWC_OTG_TRANSACTION_NON_PERIODIC, ++ DWC_OTG_TRANSACTION_ALL ++} dwc_otg_transaction_type_e; ++ ++struct dwc_otg_qh; ++ ++/** ++ * A Queue Transfer Descriptor (QTD) holds the state of a bulk, control, ++ * interrupt, or isochronous transfer. A single QTD is created for each URB ++ * (of one of these types) submitted to the HCD. The transfer associated with ++ * a QTD may require one or multiple transactions. ++ * ++ * A QTD is linked to a Queue Head, which is entered in either the ++ * non-periodic or periodic schedule for execution. When a QTD is chosen for ++ * execution, some or all of its transactions may be executed. After ++ * execution, the state of the QTD is updated. The QTD may be retired if all ++ * its transactions are complete or if an error occurred. Otherwise, it ++ * remains in the schedule so more transactions can be executed later. ++ */ ++typedef struct dwc_otg_qtd { ++ /** ++ * Determines the PID of the next data packet for the data phase of ++ * control transfers. Ignored for other transfer types.
++ * One of the following values: ++ * - DWC_OTG_HC_PID_DATA0 ++ * - DWC_OTG_HC_PID_DATA1 ++ */ ++ uint8_t data_toggle; ++ ++ /** Current phase for control transfers (Setup, Data, or Status). */ ++ dwc_otg_control_phase_e control_phase; ++ ++ /** Keep track of the current split type ++ * for FS/LS endpoints on a HS Hub */ ++ uint8_t complete_split; ++ ++ /** How many bytes transferred during SSPLIT OUT */ ++ uint32_t ssplit_out_xfer_count; ++ ++ /** ++ * Holds the number of bus errors that have occurred for a transaction ++ * within this transfer. ++ */ ++ uint8_t error_count; ++ ++ /** ++ * Index of the next frame descriptor for an isochronous transfer. A ++ * frame descriptor describes the buffer position and length of the ++ * data to be transferred in the next scheduled (micro)frame of an ++ * isochronous transfer. It also holds status for that transaction. ++ * The frame index starts at 0. ++ */ ++ uint16_t isoc_frame_index; ++ ++ /** Position of the ISOC split on full/low speed */ ++ uint8_t isoc_split_pos; ++ ++ /** Position of the ISOC split in the buffer for the current frame */ ++ uint16_t isoc_split_offset; ++ ++ /** URB for this transfer */ ++ struct dwc_otg_hcd_urb *urb; ++ ++ struct dwc_otg_qh *qh; ++ ++ /** This list of QTDs */ ++ DWC_CIRCLEQ_ENTRY(dwc_otg_qtd) qtd_list_entry; ++ ++ /** Indicates if this QTD is currently processed by HW. */ ++ uint8_t in_process; ++ ++ /** Number of DMA descriptors for this QTD */ ++ uint8_t n_desc; ++ ++ /** ++ * Last activated frame(packet) index. ++ * Used in Descriptor DMA mode only. ++ */ ++ uint16_t isoc_frame_index_last; ++ ++} dwc_otg_qtd_t; ++ ++DWC_CIRCLEQ_HEAD(dwc_otg_qtd_list, dwc_otg_qtd); ++ ++/** ++ * A Queue Head (QH) holds the static characteristics of an endpoint and ++ * maintains a list of transfers (QTDs) for that endpoint. A QH structure may ++ * be entered in either the non-periodic or periodic schedule. ++ */ ++typedef struct dwc_otg_qh { ++ /** ++ * Endpoint type. ++ * One of the following values: ++ * - UE_CONTROL ++ * - UE_BULK ++ * - UE_INTERRUPT ++ * - UE_ISOCHRONOUS ++ */ ++ uint8_t ep_type; ++ uint8_t ep_is_in; ++ ++ /** wMaxPacketSize Field of Endpoint Descriptor. */ ++ uint16_t maxp; ++ ++ /** ++ * Device speed. ++ * One of the following values: ++ * - DWC_OTG_EP_SPEED_LOW ++ * - DWC_OTG_EP_SPEED_FULL ++ * - DWC_OTG_EP_SPEED_HIGH ++ */ ++ uint8_t dev_speed; ++ ++ /** ++ * Determines the PID of the next data packet for non-control ++ * transfers. Ignored for control transfers.
++ * One of the following values: ++ * - DWC_OTG_HC_PID_DATA0 ++ * - DWC_OTG_HC_PID_DATA1 ++ */ ++ uint8_t data_toggle; ++ ++ /** Ping state if 1. */ ++ uint8_t ping_state; ++ ++ /** ++ * List of QTDs for this QH. ++ */ ++ struct dwc_otg_qtd_list qtd_list; ++ ++ /** Host channel currently processing transfers for this QH. */ ++ struct dwc_hc *channel; ++ ++ /** Full/low speed endpoint on high-speed hub requires split. */ ++ uint8_t do_split; ++ ++ /** @name Periodic schedule information */ ++ /** @{ */ ++ ++ /** Bandwidth in microseconds per (micro)frame. */ ++ uint16_t usecs; ++ ++ /** Interval between transfers in (micro)frames. */ ++ uint16_t interval; ++ ++ /** ++ * (micro)frame to initialize a periodic transfer. The transfer ++ * executes in the following (micro)frame. ++ */ ++ uint16_t sched_frame; ++ ++ /** (micro)frame at which last start split was initialized. */ ++ uint16_t start_split_frame; ++ ++ /** @} */ ++ ++ /** ++ * Used instead of original buffer if ++ * it(physical address) is not dword-aligned. ++ */ ++ uint8_t *dw_align_buf; ++ dwc_dma_t dw_align_buf_dma; ++ ++ /** Entry for QH in either the periodic or non-periodic schedule. */ ++ dwc_list_link_t qh_list_entry; ++ ++ /** @name Descriptor DMA support */ ++ /** @{ */ ++ ++ /** Descriptor List. */ ++ dwc_otg_host_dma_desc_t *desc_list; ++ ++ /** Descriptor List physical address. */ ++ dwc_dma_t desc_list_dma; ++ ++ /** ++ * Xfer Bytes array. ++ * Each element corresponds to a descriptor and indicates ++ * original XferSize size value for the descriptor. ++ */ ++ uint32_t *n_bytes; ++ ++ /** Actual number of transfer descriptors in a list. */ ++ uint16_t ntd; ++ ++ /** First activated isochronous transfer descriptor index. */ ++ uint8_t td_first; ++ /** Last activated isochronous transfer descriptor index. */ ++ uint8_t td_last; ++ ++ /** @} */ ++ ++ ++ uint16_t speed; ++ uint16_t frame_usecs[8]; ++} dwc_otg_qh_t; ++ ++DWC_CIRCLEQ_HEAD(hc_list, dwc_hc); ++ ++/** ++ * This structure holds the state of the HCD, including the non-periodic and ++ * periodic schedules. ++ */ ++struct dwc_otg_hcd { ++ /** The DWC otg device pointer */ ++ struct dwc_otg_device *otg_dev; ++ /** DWC OTG Core Interface Layer */ ++ dwc_otg_core_if_t *core_if; ++ ++ /** Function HCD driver callbacks */ ++ struct dwc_otg_hcd_function_ops *fops; ++ ++ /** Internal DWC HCD Flags */ ++ volatile union dwc_otg_hcd_internal_flags { ++ uint32_t d32; ++ struct { ++ unsigned port_connect_status_change:1; ++ unsigned port_connect_status:1; ++ unsigned port_reset_change:1; ++ unsigned port_enable_change:1; ++ unsigned port_suspend_change:1; ++ unsigned port_over_current_change:1; ++ unsigned port_l1_change:1; ++ unsigned reserved:26; ++ } b; ++ } flags; ++ ++ /** ++ * Inactive items in the non-periodic schedule. This is a list of ++ * Queue Heads. Transfers associated with these Queue Heads are not ++ * currently assigned to a host channel. ++ */ ++ dwc_list_link_t non_periodic_sched_inactive; ++ ++ /** ++ * Active items in the non-periodic schedule. This is a list of ++ * Queue Heads. Transfers associated with these Queue Heads are ++ * currently assigned to a host channel. ++ */ ++ dwc_list_link_t non_periodic_sched_active; ++ ++ /** ++ * Pointer to the next Queue Head to process in the active ++ * non-periodic schedule. ++ */ ++ dwc_list_link_t *non_periodic_qh_ptr; ++ ++ /** ++ * Inactive items in the periodic schedule. This is a list of QHs for ++ * periodic transfers that are _not_ scheduled for the next frame. ++ * Each QH in the list has an interval counter that determines when it ++ * needs to be scheduled for execution. This scheduling mechanism ++ * allows only a simple calculation for periodic bandwidth used (i.e. ++ * must assume that all periodic transfers may need to execute in the ++ * same frame). However, it greatly simplifies scheduling and should ++ * be sufficient for the vast majority of OTG hosts, which need to ++ * connect to a small number of peripherals at one time. ++ * ++ * Items move from this list to periodic_sched_ready when the QH ++ * interval counter is 0 at SOF. ++ */ ++ dwc_list_link_t periodic_sched_inactive; ++ ++ /** ++ * List of periodic QHs that are ready for execution in the next ++ * frame, but have not yet been assigned to host channels. ++ * ++ * Items move from this list to periodic_sched_assigned as host ++ * channels become available during the current frame. ++ */ ++ dwc_list_link_t periodic_sched_ready; ++ ++ /** ++ * List of periodic QHs to be executed in the next frame that are ++ * assigned to host channels. ++ * ++ * Items move from this list to periodic_sched_queued as the ++ * transactions for the QH are queued to the DWC_otg controller. ++ */ ++ dwc_list_link_t periodic_sched_assigned; ++ ++ /** ++ * List of periodic QHs that have been queued for execution. ++ * ++ * Items move from this list to either periodic_sched_inactive or ++ * periodic_sched_ready when the channel associated with the transfer ++ * is released. If the interval for the QH is 1, the item moves to ++ * periodic_sched_ready because it must be rescheduled for the next ++ * frame. Otherwise, the item moves to periodic_sched_inactive. ++ */ ++ dwc_list_link_t periodic_sched_queued; ++ ++ /** ++ * Total bandwidth claimed so far for periodic transfers. This value ++ * is in microseconds per (micro)frame. The assumption is that all ++ * periodic transfers may occur in the same (micro)frame. ++ */ ++ uint16_t periodic_usecs; ++ ++ /** ++ * Total bandwidth claimed so far for all periodic transfers ++ * in a frame. ++ * This will include a mixture of HS and FS transfers. ++ * Units are microseconds per (micro)frame. ++ * We have a budget per frame and have to schedule ++ * transactions accordingly. ++ * Watch out for the fact that things are actually scheduled for the ++ * "next frame". ++ */ ++ uint16_t frame_usecs[8]; ++ ++ ++ /** ++ * Frame number read from the core at SOF. The value ranges from 0 to ++ * DWC_HFNUM_MAX_FRNUM. ++ */ ++ uint16_t frame_number; ++ ++ /** ++ * Count of periodic QHs, if using several eps. For SOF enable/disable. ++ */ ++ uint16_t periodic_qh_count; ++ ++ /** ++ * Free host channels in the controller. This is a list of ++ * dwc_hc_t items. ++ */ ++ struct hc_list free_hc_list; ++ /** ++ * Number of host channels assigned to periodic transfers. Currently ++ * assuming that there is a dedicated host channel for each periodic ++ * transaction and at least one host channel available for ++ * non-periodic transactions. ++ */ ++ int periodic_channels; /* microframe_schedule==0 */ ++ ++ /** ++ * Number of host channels assigned to non-periodic transfers. ++ */ ++ int non_periodic_channels; /* microframe_schedule==0 */ ++ ++ /** ++ * Number of host channels assigned to non-periodic transfers. ++ */ ++ int available_host_channels; ++ ++ /** ++ * Array of pointers to the host channel descriptors. Allows accessing ++ * a host channel descriptor given the host channel number. This is ++ * useful in interrupt handlers. ++ */ ++ struct dwc_hc *hc_ptr_array[MAX_EPS_CHANNELS]; ++ ++ /** ++ * Buffer to use for any data received during the status phase of a ++ * control transfer. Normally no data is transferred during the status ++ * phase. This buffer is used as a bit bucket. ++ */ ++ uint8_t *status_buf; ++ ++ /** ++ * DMA address for status_buf. ++ */ ++ dma_addr_t status_buf_dma; ++#define DWC_OTG_HCD_STATUS_BUF_SIZE 64 ++ ++ /** ++ * Connection timer. An OTG host must display a message if the device ++ * does not connect. Started when the VBus power is turned on via ++ * sysfs attribute "buspower". ++ */ ++ dwc_timer_t *conn_timer; ++ ++ /* Tasket to do a reset */ ++ dwc_tasklet_t *reset_tasklet; ++ ++ /* */ ++ dwc_spinlock_t *lock; ++ ++ /** ++ * Private data that could be used by OS wrapper. ++ */ ++ void *priv; ++ ++ uint8_t otg_port; ++ ++ /** Frame List */ ++ uint32_t *frame_list; ++ ++ /** Frame List DMA address */ ++ dma_addr_t frame_list_dma; ++ ++#ifdef DEBUG ++ uint32_t frrem_samples; ++ uint64_t frrem_accum; ++ ++ uint32_t hfnum_7_samples_a; ++ uint64_t hfnum_7_frrem_accum_a; ++ uint32_t hfnum_0_samples_a; ++ uint64_t hfnum_0_frrem_accum_a; ++ uint32_t hfnum_other_samples_a; ++ uint64_t hfnum_other_frrem_accum_a; ++ ++ uint32_t hfnum_7_samples_b; ++ uint64_t hfnum_7_frrem_accum_b; ++ uint32_t hfnum_0_samples_b; ++ uint64_t hfnum_0_frrem_accum_b; ++ uint32_t hfnum_other_samples_b; ++ uint64_t hfnum_other_frrem_accum_b; ++#endif ++}; ++ ++/** @name Transaction Execution Functions */ ++/** @{ */ ++extern dwc_otg_transaction_type_e dwc_otg_hcd_select_transactions(dwc_otg_hcd_t ++ * hcd); ++extern void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd, ++ dwc_otg_transaction_type_e tr_type); ++ ++/** @} */ ++ ++/** @name Interrupt Handler Functions */ ++/** @{ */ ++extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_incomplete_periodic_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_port_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_conn_id_status_change_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_disconnect_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd, ++ uint32_t num); ++extern int32_t dwc_otg_hcd_handle_session_req_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_wakeup_detected_intr(dwc_otg_hcd_t * ++ dwc_otg_hcd); ++/** @} */ ++ ++/** @name Schedule Queue Functions */ ++/** @{ */ ++ ++/* Implemented in dwc_otg_hcd_queue.c */ ++extern dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * hcd, ++ dwc_otg_hcd_urb_t * urb, int atomic_alloc); ++extern void dwc_otg_hcd_qh_free(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++extern int dwc_otg_hcd_qh_add(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++extern void dwc_otg_hcd_qh_remove(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++extern void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, ++ int sched_csplit); ++ ++/** Remove and free a QH */ ++static inline void dwc_otg_hcd_qh_remove_and_free(dwc_otg_hcd_t * hcd, ++ dwc_otg_qh_t * qh) ++{ ++ dwc_irqflags_t flags; ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ dwc_otg_hcd_qh_free(hcd, qh); ++} ++ ++/** Allocates memory for a QH structure. ++ * @return Returns the memory allocate or NULL on error. */ ++static inline dwc_otg_qh_t *dwc_otg_hcd_qh_alloc(int atomic_alloc) ++{ ++ if (atomic_alloc) ++ return (dwc_otg_qh_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qh_t)); ++ else ++ return (dwc_otg_qh_t *) DWC_ALLOC(sizeof(dwc_otg_qh_t)); ++} ++ ++extern dwc_otg_qtd_t *dwc_otg_hcd_qtd_create(dwc_otg_hcd_urb_t * urb, ++ int atomic_alloc); ++extern void dwc_otg_hcd_qtd_init(dwc_otg_qtd_t * qtd, dwc_otg_hcd_urb_t * urb); ++extern int dwc_otg_hcd_qtd_add(dwc_otg_qtd_t * qtd, dwc_otg_hcd_t * dwc_otg_hcd, ++ dwc_otg_qh_t ** qh, int atomic_alloc); ++ ++/** Allocates memory for a QTD structure. ++ * @return Returns the memory allocate or NULL on error. */ ++static inline dwc_otg_qtd_t *dwc_otg_hcd_qtd_alloc(int atomic_alloc) ++{ ++ if (atomic_alloc) ++ return (dwc_otg_qtd_t *) DWC_ALLOC_ATOMIC(sizeof(dwc_otg_qtd_t)); ++ else ++ return (dwc_otg_qtd_t *) DWC_ALLOC(sizeof(dwc_otg_qtd_t)); ++} ++ ++/** Frees the memory for a QTD structure. QTD should already be removed from ++ * list. ++ * @param qtd QTD to free.*/ ++static inline void dwc_otg_hcd_qtd_free(dwc_otg_qtd_t * qtd) ++{ ++ DWC_FREE(qtd); ++} ++ ++/** Removes a QTD from list. ++ * @param hcd HCD instance. ++ * @param qtd QTD to remove from list. ++ * @param qh QTD belongs to. ++ */ ++static inline void dwc_otg_hcd_qtd_remove(dwc_otg_hcd_t * hcd, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_qh_t * qh) ++{ ++ DWC_CIRCLEQ_REMOVE(&qh->qtd_list, qtd, qtd_list_entry); ++} ++ ++/** Remove and free a QTD ++ * Need to disable IRQ and hold hcd lock while calling this function out of ++ * interrupt servicing chain */ ++static inline void dwc_otg_hcd_qtd_remove_and_free(dwc_otg_hcd_t * hcd, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_qh_t * qh) ++{ ++ dwc_otg_hcd_qtd_remove(hcd, qtd, qh); ++ dwc_otg_hcd_qtd_free(qtd); ++} ++ ++/** @} */ ++ ++/** @name Descriptor DMA Supporting Functions */ ++/** @{ */ ++ ++extern void dwc_otg_hcd_start_xfer_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++extern void dwc_otg_hcd_complete_xfer_ddma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_halt_status_e halt_status); ++ ++extern int dwc_otg_hcd_qh_init_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++extern void dwc_otg_hcd_qh_free_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh); ++ ++/** @} */ ++ ++/** @name Internal Functions */ ++/** @{ */ ++dwc_otg_qh_t *dwc_urb_to_qh(dwc_otg_hcd_urb_t * urb); ++/** @} */ ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++extern int dwc_otg_hcd_get_hc_for_lpm_tran(dwc_otg_hcd_t * hcd, ++ uint8_t devaddr); ++extern void dwc_otg_hcd_free_hc_from_lpm(dwc_otg_hcd_t * hcd); ++#endif ++ ++/** Gets the QH that contains the list_head */ ++#define dwc_list_to_qh(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qh_t, qh_list_entry) ++ ++/** Gets the QTD that contains the list_head */ ++#define dwc_list_to_qtd(_list_head_ptr_) container_of(_list_head_ptr_, dwc_otg_qtd_t, qtd_list_entry) ++ ++/** Check if QH is non-periodic */ ++#define dwc_qh_is_non_per(_qh_ptr_) ((_qh_ptr_->ep_type == UE_BULK) || \ ++ (_qh_ptr_->ep_type == UE_CONTROL)) ++ ++/** High bandwidth multiplier as encoded in highspeed endpoint descriptors */ ++#define dwc_hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03)) ++ ++/** Packet size for any kind of endpoint descriptor */ ++#define dwc_max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff) ++ ++/** ++ * Returns true if _frame1 is less than or equal to _frame2. The comparison is ++ * done modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the ++ * frame number when the max frame number is reached. ++ */ ++static inline int dwc_frame_num_le(uint16_t frame1, uint16_t frame2) ++{ ++ return ((frame2 - frame1) & DWC_HFNUM_MAX_FRNUM) <= ++ (DWC_HFNUM_MAX_FRNUM >> 1); ++} ++ ++/** ++ * Returns true if _frame1 is greater than _frame2. The comparison is done ++ * modulo DWC_HFNUM_MAX_FRNUM. This accounts for the rollover of the frame ++ * number when the max frame number is reached. ++ */ ++static inline int dwc_frame_num_gt(uint16_t frame1, uint16_t frame2) ++{ ++ return (frame1 != frame2) && ++ (((frame1 - frame2) & DWC_HFNUM_MAX_FRNUM) < ++ (DWC_HFNUM_MAX_FRNUM >> 1)); ++} ++ ++/** ++ * Increments _frame by the amount specified by _inc. The addition is done ++ * modulo DWC_HFNUM_MAX_FRNUM. Returns the incremented value. ++ */ ++static inline uint16_t dwc_frame_num_inc(uint16_t frame, uint16_t inc) ++{ ++ return (frame + inc) & DWC_HFNUM_MAX_FRNUM; ++} ++ ++static inline uint16_t dwc_full_frame_num(uint16_t frame) ++{ ++ return (frame & DWC_HFNUM_MAX_FRNUM) >> 3; ++} ++ ++static inline uint16_t dwc_micro_frame_num(uint16_t frame) ++{ ++ return frame & 0x7; ++} ++ ++void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd); ++ ++#ifdef DEBUG ++/** ++ * Macro to sample the remaining PHY clocks left in the current frame. This ++ * may be used during debugging to determine the average time it takes to ++ * execute sections of code. There are two possible sample points, "a" and ++ * "b", so the _letter argument must be one of these values. ++ * ++ * To dump the average sample times, read the "hcd_frrem" sysfs attribute. For ++ * example, "cat /sys/devices/lm0/hcd_frrem". ++ */ ++#define dwc_sample_frrem(_hcd, _qh, _letter) \ ++{ \ ++ hfnum_data_t hfnum; \ ++ dwc_otg_qtd_t *qtd; \ ++ qtd = list_entry(_qh->qtd_list.next, dwc_otg_qtd_t, qtd_list_entry); \ ++ if (usb_pipeint(qtd->urb->pipe) && _qh->start_split_frame != 0 && !qtd->complete_split) { \ ++ hfnum.d32 = DWC_READ_REG32(&_hcd->core_if->host_if->host_global_regs->hfnum); \ ++ switch (hfnum.b.frnum & 0x7) { \ ++ case 7: \ ++ _hcd->hfnum_7_samples_##_letter++; \ ++ _hcd->hfnum_7_frrem_accum_##_letter += hfnum.b.frrem; \ ++ break; \ ++ case 0: \ ++ _hcd->hfnum_0_samples_##_letter++; \ ++ _hcd->hfnum_0_frrem_accum_##_letter += hfnum.b.frrem; \ ++ break; \ ++ default: \ ++ _hcd->hfnum_other_samples_##_letter++; \ ++ _hcd->hfnum_other_frrem_accum_##_letter += hfnum.b.frrem; \ ++ break; \ ++ } \ ++ } \ ++} ++#else ++#define dwc_sample_frrem(_hcd, _qh, _letter) ++#endif ++#endif ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1133 @@ ++/*========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_ddma.c $ ++ * $Revision: #10 $ ++ * $Date: 2011/10/20 $ ++ * $Change: 1869464 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++ ++/** @file ++ * This file contains Descriptor DMA support implementation for host mode. ++ */ ++ ++#include "dwc_otg_hcd.h" ++#include "dwc_otg_regs.h" ++ ++extern bool microframe_schedule; ++ ++static inline uint8_t frame_list_idx(uint16_t frame) ++{ ++ return (frame & (MAX_FRLIST_EN_NUM - 1)); ++} ++ ++static inline uint16_t desclist_idx_inc(uint16_t idx, uint16_t inc, uint8_t speed) ++{ ++ return (idx + inc) & ++ (((speed == ++ DWC_OTG_EP_SPEED_HIGH) ? MAX_DMA_DESC_NUM_HS_ISOC : ++ MAX_DMA_DESC_NUM_GENERIC) - 1); ++} ++ ++static inline uint16_t desclist_idx_dec(uint16_t idx, uint16_t inc, uint8_t speed) ++{ ++ return (idx - inc) & ++ (((speed == ++ DWC_OTG_EP_SPEED_HIGH) ? MAX_DMA_DESC_NUM_HS_ISOC : ++ MAX_DMA_DESC_NUM_GENERIC) - 1); ++} ++ ++static inline uint16_t max_desc_num(dwc_otg_qh_t * qh) ++{ ++ return (((qh->ep_type == UE_ISOCHRONOUS) ++ && (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH)) ++ ? MAX_DMA_DESC_NUM_HS_ISOC : MAX_DMA_DESC_NUM_GENERIC); ++} ++static inline uint16_t frame_incr_val(dwc_otg_qh_t * qh) ++{ ++ return ((qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) ++ ? ((qh->interval + 8 - 1) / 8) ++ : qh->interval); ++} ++ ++static int desc_list_alloc(dwc_otg_qh_t * qh) ++{ ++ int retval = 0; ++ ++ qh->desc_list = (dwc_otg_host_dma_desc_t *) ++ DWC_DMA_ALLOC(sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh), ++ &qh->desc_list_dma); ++ ++ if (!qh->desc_list) { ++ retval = -DWC_E_NO_MEMORY; ++ DWC_ERROR("%s: DMA descriptor list allocation failed\n", __func__); ++ ++ } ++ ++ dwc_memset(qh->desc_list, 0x00, ++ sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh)); ++ ++ qh->n_bytes = ++ (uint32_t *) DWC_ALLOC(sizeof(uint32_t) * max_desc_num(qh)); ++ ++ if (!qh->n_bytes) { ++ retval = -DWC_E_NO_MEMORY; ++ DWC_ERROR ++ ("%s: Failed to allocate array for descriptors' size actual values\n", ++ __func__); ++ ++ } ++ return retval; ++ ++} ++ ++static void desc_list_free(dwc_otg_qh_t * qh) ++{ ++ if (qh->desc_list) { ++ DWC_DMA_FREE(max_desc_num(qh), qh->desc_list, ++ qh->desc_list_dma); ++ qh->desc_list = NULL; ++ } ++ ++ if (qh->n_bytes) { ++ DWC_FREE(qh->n_bytes); ++ qh->n_bytes = NULL; ++ } ++} ++ ++static int frame_list_alloc(dwc_otg_hcd_t * hcd) ++{ ++ int retval = 0; ++ if (hcd->frame_list) ++ return 0; ++ ++ hcd->frame_list = DWC_DMA_ALLOC(4 * MAX_FRLIST_EN_NUM, ++ &hcd->frame_list_dma); ++ if (!hcd->frame_list) { ++ retval = -DWC_E_NO_MEMORY; ++ DWC_ERROR("%s: Frame List allocation failed\n", __func__); ++ } ++ ++ dwc_memset(hcd->frame_list, 0x00, 4 * MAX_FRLIST_EN_NUM); ++ ++ return retval; ++} ++ ++static void frame_list_free(dwc_otg_hcd_t * hcd) ++{ ++ if (!hcd->frame_list) ++ return; ++ ++ DWC_DMA_FREE(4 * MAX_FRLIST_EN_NUM, hcd->frame_list, hcd->frame_list_dma); ++ hcd->frame_list = NULL; ++} ++ ++static void per_sched_enable(dwc_otg_hcd_t * hcd, uint16_t fr_list_en) ++{ ++ ++ hcfg_data_t hcfg; ++ ++ hcfg.d32 = DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hcfg); ++ ++ if (hcfg.b.perschedena) { ++ /* already enabled */ ++ return; ++ } ++ ++ DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hflbaddr, ++ hcd->frame_list_dma); ++ ++ switch (fr_list_en) { ++ case 64: ++ hcfg.b.frlisten = 3; ++ break; ++ case 32: ++ hcfg.b.frlisten = 2; ++ break; ++ case 16: ++ hcfg.b.frlisten = 1; ++ break; ++ case 8: ++ hcfg.b.frlisten = 0; ++ break; ++ default: ++ break; ++ } ++ ++ hcfg.b.perschedena = 1; ++ ++ DWC_DEBUGPL(DBG_HCD, "Enabling Periodic schedule\n"); ++ DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hcfg, hcfg.d32); ++ ++} ++ ++static void per_sched_disable(dwc_otg_hcd_t * hcd) ++{ ++ hcfg_data_t hcfg; ++ ++ hcfg.d32 = DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hcfg); ++ ++ if (!hcfg.b.perschedena) { ++ /* already disabled */ ++ return; ++ } ++ hcfg.b.perschedena = 0; ++ ++ DWC_DEBUGPL(DBG_HCD, "Disabling Periodic schedule\n"); ++ DWC_WRITE_REG32(&hcd->core_if->host_if->host_global_regs->hcfg, hcfg.d32); ++} ++ ++/* ++ * Activates/Deactivates FrameList entries for the channel ++ * based on endpoint servicing period. ++ */ ++void update_frame_list(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, uint8_t enable) ++{ ++ uint16_t i, j, inc; ++ dwc_hc_t *hc = NULL; ++ ++ if (!qh->channel) { ++ DWC_ERROR("qh->channel = %p", qh->channel); ++ return; ++ } ++ ++ if (!hcd) { ++ DWC_ERROR("------hcd = %p", hcd); ++ return; ++ } ++ ++ if (!hcd->frame_list) { ++ DWC_ERROR("-------hcd->frame_list = %p", hcd->frame_list); ++ return; ++ } ++ ++ hc = qh->channel; ++ inc = frame_incr_val(qh); ++ if (qh->ep_type == UE_ISOCHRONOUS) ++ i = frame_list_idx(qh->sched_frame); ++ else ++ i = 0; ++ ++ j = i; ++ do { ++ if (enable) ++ hcd->frame_list[j] |= (1 << hc->hc_num); ++ else ++ hcd->frame_list[j] &= ~(1 << hc->hc_num); ++ j = (j + inc) & (MAX_FRLIST_EN_NUM - 1); ++ } ++ while (j != i); ++ if (!enable) ++ return; ++ hc->schinfo = 0; ++ if (qh->channel->speed == DWC_OTG_EP_SPEED_HIGH) { ++ j = 1; ++ /* TODO - check this */ ++ inc = (8 + qh->interval - 1) / qh->interval; ++ for (i = 0; i < inc; i++) { ++ hc->schinfo |= j; ++ j = j << qh->interval; ++ } ++ } else { ++ hc->schinfo = 0xff; ++ } ++} ++ ++#if 1 ++void dump_frame_list(dwc_otg_hcd_t * hcd) ++{ ++ int i = 0; ++ DWC_PRINTF("--FRAME LIST (hex) --\n"); ++ for (i = 0; i < MAX_FRLIST_EN_NUM; i++) { ++ DWC_PRINTF("%x\t", hcd->frame_list[i]); ++ if (!(i % 8) && i) ++ DWC_PRINTF("\n"); ++ } ++ DWC_PRINTF("\n----\n"); ++ ++} ++#endif ++ ++static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ dwc_irqflags_t flags; ++ dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ ++ dwc_hc_t *hc = qh->channel; ++ if (dwc_qh_is_non_per(qh)) { ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ if (!microframe_schedule) ++ hcd->non_periodic_channels--; ++ else ++ hcd->available_host_channels++; ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ } else ++ update_frame_list(hcd, qh, 0); ++ ++ /* ++ * The condition is added to prevent double cleanup try in case of device ++ * disconnect. See channel cleanup in dwc_otg_hcd_disconnect_cb(). ++ */ ++ if (hc->qh) { ++ dwc_otg_hc_cleanup(hcd->core_if, hc); ++ DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry); ++ hc->qh = NULL; ++ } ++ ++ qh->channel = NULL; ++ qh->ntd = 0; ++ ++ if (qh->desc_list) { ++ dwc_memset(qh->desc_list, 0x00, ++ sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh)); ++ } ++ DWC_SPINLOCK_FREE(channel_lock); ++} ++ ++/** ++ * Initializes a QH structure's Descriptor DMA related members. ++ * Allocates memory for descriptor list. ++ * On first periodic QH, allocates memory for FrameList ++ * and enables periodic scheduling. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh The QH to init. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++int dwc_otg_hcd_qh_init_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int retval = 0; ++ ++ if (qh->do_split) { ++ DWC_ERROR("SPLIT Transfers are not supported in Descriptor DMA.\n"); ++ return -1; ++ } ++ ++ retval = desc_list_alloc(qh); ++ ++ if ((retval == 0) ++ && (qh->ep_type == UE_ISOCHRONOUS || qh->ep_type == UE_INTERRUPT)) { ++ if (!hcd->frame_list) { ++ retval = frame_list_alloc(hcd); ++ /* Enable periodic schedule on first periodic QH */ ++ if (retval == 0) ++ per_sched_enable(hcd, MAX_FRLIST_EN_NUM); ++ } ++ } ++ ++ qh->ntd = 0; ++ ++ return retval; ++} ++ ++/** ++ * Frees descriptor list memory associated with the QH. ++ * If QH is periodic and the last, frees FrameList memory ++ * and disables periodic scheduling. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh The QH to init. ++ */ ++void dwc_otg_hcd_qh_free_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ desc_list_free(qh); ++ ++ /* ++ * Channel still assigned due to some reasons. ++ * Seen on Isoc URB dequeue. Channel halted but no subsequent ++ * ChHalted interrupt to release the channel. Afterwards ++ * when it comes here from endpoint disable routine ++ * channel remains assigned. ++ */ ++ if (qh->channel) ++ release_channel_ddma(hcd, qh); ++ ++ if ((qh->ep_type == UE_ISOCHRONOUS || qh->ep_type == UE_INTERRUPT) ++ && (microframe_schedule || !hcd->periodic_channels) && hcd->frame_list) { ++ ++ per_sched_disable(hcd); ++ frame_list_free(hcd); ++ } ++} ++ ++static uint8_t frame_to_desc_idx(dwc_otg_qh_t * qh, uint16_t frame_idx) ++{ ++ if (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) { ++ /* ++ * Descriptor set(8 descriptors) index ++ * which is 8-aligned. ++ */ ++ return (frame_idx & ((MAX_DMA_DESC_NUM_HS_ISOC / 8) - 1)) * 8; ++ } else { ++ return (frame_idx & (MAX_DMA_DESC_NUM_GENERIC - 1)); ++ } ++} ++ ++/* ++ * Determine starting frame for Isochronous transfer. ++ * Few frames skipped to prevent race condition with HC. ++ */ ++static uint8_t calc_starting_frame(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, ++ uint8_t * skip_frames) ++{ ++ uint16_t frame = 0; ++ hcd->frame_number = dwc_otg_hcd_get_frame_number(hcd); ++ ++ /* sched_frame is always frame number(not uFrame) both in FS and HS !! */ ++ ++ /* ++ * skip_frames is used to limit activated descriptors number ++ * to avoid the situation when HC services the last activated ++ * descriptor firstly. ++ * Example for FS: ++ * Current frame is 1, scheduled frame is 3. Since HC always fetches the descriptor ++ * corresponding to curr_frame+1, the descriptor corresponding to frame 2 ++ * will be fetched. If the number of descriptors is max=64 (or greather) the ++ * list will be fully programmed with Active descriptors and it is possible ++ * case(rare) that the latest descriptor(considering rollback) corresponding ++ * to frame 2 will be serviced first. HS case is more probable because, in fact, ++ * up to 11 uframes(16 in the code) may be skipped. ++ */ ++ if (qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) { ++ /* ++ * Consider uframe counter also, to start xfer asap. ++ * If half of the frame elapsed skip 2 frames otherwise ++ * just 1 frame. ++ * Starting descriptor index must be 8-aligned, so ++ * if the current frame is near to complete the next one ++ * is skipped as well. ++ */ ++ ++ if (dwc_micro_frame_num(hcd->frame_number) >= 5) { ++ *skip_frames = 2 * 8; ++ frame = dwc_frame_num_inc(hcd->frame_number, *skip_frames); ++ } else { ++ *skip_frames = 1 * 8; ++ frame = dwc_frame_num_inc(hcd->frame_number, *skip_frames); ++ } ++ ++ frame = dwc_full_frame_num(frame); ++ } else { ++ /* ++ * Two frames are skipped for FS - the current and the next. ++ * But for descriptor programming, 1 frame(descriptor) is enough, ++ * see example above. ++ */ ++ *skip_frames = 1; ++ frame = dwc_frame_num_inc(hcd->frame_number, 2); ++ } ++ ++ return frame; ++} ++ ++/* ++ * Calculate initial descriptor index for isochronous transfer ++ * based on scheduled frame. ++ */ ++static uint8_t recalc_initial_desc_idx(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ uint16_t frame = 0, fr_idx, fr_idx_tmp; ++ uint8_t skip_frames = 0; ++ /* ++ * With current ISOC processing algorithm the channel is being ++ * released when no more QTDs in the list(qh->ntd == 0). ++ * Thus this function is called only when qh->ntd == 0 and qh->channel == 0. ++ * ++ * So qh->channel != NULL branch is not used and just not removed from the ++ * source file. It is required for another possible approach which is, ++ * do not disable and release the channel when ISOC session completed, ++ * just move QH to inactive schedule until new QTD arrives. ++ * On new QTD, the QH moved back to 'ready' schedule, ++ * starting frame and therefore starting desc_index are recalculated. ++ * In this case channel is released only on ep_disable. ++ */ ++ ++ /* Calculate starting descriptor index. For INTERRUPT endpoint it is always 0. */ ++ if (qh->channel) { ++ frame = calc_starting_frame(hcd, qh, &skip_frames); ++ /* ++ * Calculate initial descriptor index based on FrameList current bitmap ++ * and servicing period. ++ */ ++ fr_idx_tmp = frame_list_idx(frame); ++ fr_idx = ++ (MAX_FRLIST_EN_NUM + frame_list_idx(qh->sched_frame) - ++ fr_idx_tmp) ++ % frame_incr_val(qh); ++ fr_idx = (fr_idx + fr_idx_tmp) % MAX_FRLIST_EN_NUM; ++ } else { ++ qh->sched_frame = calc_starting_frame(hcd, qh, &skip_frames); ++ fr_idx = frame_list_idx(qh->sched_frame); ++ } ++ ++ qh->td_first = qh->td_last = frame_to_desc_idx(qh, fr_idx); ++ ++ return skip_frames; ++} ++ ++#define ISOC_URB_GIVEBACK_ASAP ++ ++#define MAX_ISOC_XFER_SIZE_FS 1023 ++#define MAX_ISOC_XFER_SIZE_HS 3072 ++#define DESCNUM_THRESHOLD 4 ++ ++static void init_isoc_dma_desc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, ++ uint8_t skip_frames) ++{ ++ struct dwc_otg_hcd_iso_packet_desc *frame_desc; ++ dwc_otg_qtd_t *qtd; ++ dwc_otg_host_dma_desc_t *dma_desc; ++ uint16_t idx, inc, n_desc, ntd_max, max_xfer_size; ++ ++ idx = qh->td_last; ++ inc = qh->interval; ++ n_desc = 0; ++ ++ ntd_max = (max_desc_num(qh) + qh->interval - 1) / qh->interval; ++ if (skip_frames && !qh->channel) ++ ntd_max = ntd_max - skip_frames / qh->interval; ++ ++ max_xfer_size = ++ (qh->dev_speed == ++ DWC_OTG_EP_SPEED_HIGH) ? MAX_ISOC_XFER_SIZE_HS : ++ MAX_ISOC_XFER_SIZE_FS; ++ ++ DWC_CIRCLEQ_FOREACH(qtd, &qh->qtd_list, qtd_list_entry) { ++ while ((qh->ntd < ntd_max) ++ && (qtd->isoc_frame_index_last < ++ qtd->urb->packet_count)) { ++ ++ dma_desc = &qh->desc_list[idx]; ++ dwc_memset(dma_desc, 0x00, sizeof(dwc_otg_host_dma_desc_t)); ++ ++ frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index_last]; ++ ++ if (frame_desc->length > max_xfer_size) ++ qh->n_bytes[idx] = max_xfer_size; ++ else ++ qh->n_bytes[idx] = frame_desc->length; ++ dma_desc->status.b_isoc.n_bytes = qh->n_bytes[idx]; ++ dma_desc->status.b_isoc.a = 1; ++ dma_desc->status.b_isoc.sts = 0; ++ ++ dma_desc->buf = qtd->urb->dma + frame_desc->offset; ++ ++ qh->ntd++; ++ ++ qtd->isoc_frame_index_last++; ++ ++#ifdef ISOC_URB_GIVEBACK_ASAP ++ /* ++ * Set IOC for each descriptor corresponding to the ++ * last frame of the URB. ++ */ ++ if (qtd->isoc_frame_index_last == ++ qtd->urb->packet_count) ++ dma_desc->status.b_isoc.ioc = 1; ++ ++#endif ++ idx = desclist_idx_inc(idx, inc, qh->dev_speed); ++ n_desc++; ++ ++ } ++ qtd->in_process = 1; ++ } ++ ++ qh->td_last = idx; ++ ++#ifdef ISOC_URB_GIVEBACK_ASAP ++ /* Set IOC for the last descriptor if descriptor list is full */ ++ if (qh->ntd == ntd_max) { ++ idx = desclist_idx_dec(qh->td_last, inc, qh->dev_speed); ++ qh->desc_list[idx].status.b_isoc.ioc = 1; ++ } ++#else ++ /* ++ * Set IOC bit only for one descriptor. ++ * Always try to be ahead of HW processing, ++ * i.e. on IOC generation driver activates next descriptors but ++ * core continues to process descriptors followed the one with IOC set. ++ */ ++ ++ if (n_desc > DESCNUM_THRESHOLD) { ++ /* ++ * Move IOC "up". Required even if there is only one QTD ++ * in the list, cause QTDs migth continue to be queued, ++ * but during the activation it was only one queued. ++ * Actually more than one QTD might be in the list if this function called ++ * from XferCompletion - QTDs was queued during HW processing of the previous ++ * descriptor chunk. ++ */ ++ idx = dwc_desclist_idx_dec(idx, inc * ((qh->ntd + 1) / 2), qh->dev_speed); ++ } else { ++ /* ++ * Set the IOC for the latest descriptor ++ * if either number of descriptor is not greather than threshold ++ * or no more new descriptors activated. ++ */ ++ idx = dwc_desclist_idx_dec(qh->td_last, inc, qh->dev_speed); ++ } ++ ++ qh->desc_list[idx].status.b_isoc.ioc = 1; ++#endif ++} ++ ++static void init_non_isoc_dma_desc(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ ++ dwc_hc_t *hc; ++ dwc_otg_host_dma_desc_t *dma_desc; ++ dwc_otg_qtd_t *qtd; ++ int num_packets, len, n_desc = 0; ++ ++ hc = qh->channel; ++ ++ /* ++ * Start with hc->xfer_buff initialized in ++ * assign_and_init_hc(), then if SG transfer consists of multiple URBs, ++ * this pointer re-assigned to the buffer of the currently processed QTD. ++ * For non-SG request there is always one QTD active. ++ */ ++ ++ DWC_CIRCLEQ_FOREACH(qtd, &qh->qtd_list, qtd_list_entry) { ++ ++ if (n_desc) { ++ /* SG request - more than 1 QTDs */ ++ hc->xfer_buff = (uint8_t *)qtd->urb->dma + qtd->urb->actual_length; ++ hc->xfer_len = qtd->urb->length - qtd->urb->actual_length; ++ } ++ ++ qtd->n_desc = 0; ++ ++ do { ++ dma_desc = &qh->desc_list[n_desc]; ++ len = hc->xfer_len; ++ ++ if (len > MAX_DMA_DESC_SIZE) ++ len = MAX_DMA_DESC_SIZE - hc->max_packet + 1; ++ ++ if (hc->ep_is_in) { ++ if (len > 0) { ++ num_packets = (len + hc->max_packet - 1) / hc->max_packet; ++ } else { ++ /* Need 1 packet for transfer length of 0. */ ++ num_packets = 1; ++ } ++ /* Always program an integral # of max packets for IN transfers. */ ++ len = num_packets * hc->max_packet; ++ } ++ ++ dma_desc->status.b.n_bytes = len; ++ ++ qh->n_bytes[n_desc] = len; ++ ++ if ((qh->ep_type == UE_CONTROL) ++ && (qtd->control_phase == DWC_OTG_CONTROL_SETUP)) ++ dma_desc->status.b.sup = 1; /* Setup Packet */ ++ ++ dma_desc->status.b.a = 1; /* Active descriptor */ ++ dma_desc->status.b.sts = 0; ++ ++ dma_desc->buf = ++ ((unsigned long)hc->xfer_buff & 0xffffffff); ++ ++ /* ++ * Last descriptor(or single) of IN transfer ++ * with actual size less than MaxPacket. ++ */ ++ if (len > hc->xfer_len) { ++ hc->xfer_len = 0; ++ } else { ++ hc->xfer_buff += len; ++ hc->xfer_len -= len; ++ } ++ ++ qtd->n_desc++; ++ n_desc++; ++ } ++ while ((hc->xfer_len > 0) && (n_desc != MAX_DMA_DESC_NUM_GENERIC)); ++ ++ ++ qtd->in_process = 1; ++ ++ if (qh->ep_type == UE_CONTROL) ++ break; ++ ++ if (n_desc == MAX_DMA_DESC_NUM_GENERIC) ++ break; ++ } ++ ++ if (n_desc) { ++ /* Request Transfer Complete interrupt for the last descriptor */ ++ qh->desc_list[n_desc - 1].status.b.ioc = 1; ++ /* End of List indicator */ ++ qh->desc_list[n_desc - 1].status.b.eol = 1; ++ ++ hc->ntd = n_desc; ++ } ++} ++ ++/** ++ * For Control and Bulk endpoints initializes descriptor list ++ * and starts the transfer. ++ * ++ * For Interrupt and Isochronous endpoints initializes descriptor list ++ * then updates FrameList, marking appropriate entries as active. ++ * In case of Isochronous, the starting descriptor index is calculated based ++ * on the scheduled frame, but only on the first transfer descriptor within a session. ++ * Then starts the transfer via enabling the channel. ++ * For Isochronous endpoint the channel is not halted on XferComplete ++ * interrupt so remains assigned to the endpoint(QH) until session is done. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh The QH to init. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++void dwc_otg_hcd_start_xfer_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ /* Channel is already assigned */ ++ dwc_hc_t *hc = qh->channel; ++ uint8_t skip_frames = 0; ++ ++ switch (hc->ep_type) { ++ case DWC_OTG_EP_TYPE_CONTROL: ++ case DWC_OTG_EP_TYPE_BULK: ++ init_non_isoc_dma_desc(hcd, qh); ++ ++ dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc); ++ break; ++ case DWC_OTG_EP_TYPE_INTR: ++ init_non_isoc_dma_desc(hcd, qh); ++ ++ update_frame_list(hcd, qh, 1); ++ ++ dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc); ++ break; ++ case DWC_OTG_EP_TYPE_ISOC: ++ ++ if (!qh->ntd) ++ skip_frames = recalc_initial_desc_idx(hcd, qh); ++ ++ init_isoc_dma_desc(hcd, qh, skip_frames); ++ ++ if (!hc->xfer_started) { ++ ++ update_frame_list(hcd, qh, 1); ++ ++ /* ++ * Always set to max, instead of actual size. ++ * Otherwise ntd will be changed with ++ * channel being enabled. Not recommended. ++ * ++ */ ++ hc->ntd = max_desc_num(qh); ++ /* Enable channel only once for ISOC */ ++ dwc_otg_hc_start_transfer_ddma(hcd->core_if, hc); ++ } ++ ++ break; ++ default: ++ ++ break; ++ } ++} ++ ++static void complete_isoc_xfer_ddma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_halt_status_e halt_status) ++{ ++ struct dwc_otg_hcd_iso_packet_desc *frame_desc; ++ dwc_otg_qtd_t *qtd, *qtd_tmp; ++ dwc_otg_qh_t *qh; ++ dwc_otg_host_dma_desc_t *dma_desc; ++ uint16_t idx, remain; ++ uint8_t urb_compl; ++ ++ qh = hc->qh; ++ idx = qh->td_first; ++ ++ if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) { ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) ++ qtd->in_process = 0; ++ return; ++ } else if ((halt_status == DWC_OTG_HC_XFER_AHB_ERR) || ++ (halt_status == DWC_OTG_HC_XFER_BABBLE_ERR)) { ++ /* ++ * Channel is halted in these error cases. ++ * Considered as serious issues. ++ * Complete all URBs marking all frames as failed, ++ * irrespective whether some of the descriptors(frames) succeeded or no. ++ * Pass error code to completion routine as well, to ++ * update urb->status, some of class drivers might use it to stop ++ * queing transfer requests. ++ */ ++ int err = (halt_status == DWC_OTG_HC_XFER_AHB_ERR) ++ ? (-DWC_E_IO) ++ : (-DWC_E_OVERFLOW); ++ ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) { ++ for (idx = 0; idx < qtd->urb->packet_count; idx++) { ++ frame_desc = &qtd->urb->iso_descs[idx]; ++ frame_desc->status = err; ++ } ++ hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, err); ++ dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); ++ } ++ return; ++ } ++ ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) { ++ ++ if (!qtd->in_process) ++ break; ++ ++ urb_compl = 0; ++ ++ do { ++ ++ dma_desc = &qh->desc_list[idx]; ++ ++ frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index]; ++ remain = hc->ep_is_in ? dma_desc->status.b_isoc.n_bytes : 0; ++ ++ if (dma_desc->status.b_isoc.sts == DMA_DESC_STS_PKTERR) { ++ /* ++ * XactError or, unable to complete all the transactions ++ * in the scheduled micro-frame/frame, ++ * both indicated by DMA_DESC_STS_PKTERR. ++ */ ++ qtd->urb->error_count++; ++ frame_desc->actual_length = qh->n_bytes[idx] - remain; ++ frame_desc->status = -DWC_E_PROTOCOL; ++ } else { ++ /* Success */ ++ ++ frame_desc->actual_length = qh->n_bytes[idx] - remain; ++ frame_desc->status = 0; ++ } ++ ++ if (++qtd->isoc_frame_index == qtd->urb->packet_count) { ++ /* ++ * urb->status is not used for isoc transfers here. ++ * The individual frame_desc status are used instead. ++ */ ++ ++ hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0); ++ dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); ++ ++ /* ++ * This check is necessary because urb_dequeue can be called ++ * from urb complete callback(sound driver example). ++ * All pending URBs are dequeued there, so no need for ++ * further processing. ++ */ ++ if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) { ++ return; ++ } ++ ++ urb_compl = 1; ++ ++ } ++ ++ qh->ntd--; ++ ++ /* Stop if IOC requested descriptor reached */ ++ if (dma_desc->status.b_isoc.ioc) { ++ idx = desclist_idx_inc(idx, qh->interval, hc->speed); ++ goto stop_scan; ++ } ++ ++ idx = desclist_idx_inc(idx, qh->interval, hc->speed); ++ ++ if (urb_compl) ++ break; ++ } ++ while (idx != qh->td_first); ++ } ++stop_scan: ++ qh->td_first = idx; ++} ++ ++uint8_t update_non_isoc_urb_state_ddma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_host_dma_desc_t * dma_desc, ++ dwc_otg_halt_status_e halt_status, ++ uint32_t n_bytes, uint8_t * xfer_done) ++{ ++ ++ uint16_t remain = hc->ep_is_in ? dma_desc->status.b.n_bytes : 0; ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ ++ if (halt_status == DWC_OTG_HC_XFER_AHB_ERR) { ++ urb->status = -DWC_E_IO; ++ return 1; ++ } ++ if (dma_desc->status.b.sts == DMA_DESC_STS_PKTERR) { ++ switch (halt_status) { ++ case DWC_OTG_HC_XFER_STALL: ++ urb->status = -DWC_E_PIPE; ++ break; ++ case DWC_OTG_HC_XFER_BABBLE_ERR: ++ urb->status = -DWC_E_OVERFLOW; ++ break; ++ case DWC_OTG_HC_XFER_XACT_ERR: ++ urb->status = -DWC_E_PROTOCOL; ++ break; ++ default: ++ DWC_ERROR("%s: Unhandled descriptor error status (%d)\n", __func__, ++ halt_status); ++ break; ++ } ++ return 1; ++ } ++ ++ if (dma_desc->status.b.a == 1) { ++ DWC_DEBUGPL(DBG_HCDV, ++ "Active descriptor encountered on channel %d\n", ++ hc->hc_num); ++ return 0; ++ } ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL) { ++ if (qtd->control_phase == DWC_OTG_CONTROL_DATA) { ++ urb->actual_length += n_bytes - remain; ++ if (remain || urb->actual_length == urb->length) { ++ /* ++ * For Control Data stage do not set urb->status=0 to prevent ++ * URB callback. Set it when Status phase done. See below. ++ */ ++ *xfer_done = 1; ++ } ++ ++ } else if (qtd->control_phase == DWC_OTG_CONTROL_STATUS) { ++ urb->status = 0; ++ *xfer_done = 1; ++ } ++ /* No handling for SETUP stage */ ++ } else { ++ /* BULK and INTR */ ++ urb->actual_length += n_bytes - remain; ++ if (remain || urb->actual_length == urb->length) { ++ urb->status = 0; ++ *xfer_done = 1; ++ } ++ } ++ ++ return 0; ++} ++ ++static void complete_non_isoc_xfer_ddma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_halt_status_e halt_status) ++{ ++ dwc_otg_hcd_urb_t *urb = NULL; ++ dwc_otg_qtd_t *qtd, *qtd_tmp; ++ dwc_otg_qh_t *qh; ++ dwc_otg_host_dma_desc_t *dma_desc; ++ uint32_t n_bytes, n_desc, i; ++ uint8_t failed = 0, xfer_done; ++ ++ n_desc = 0; ++ ++ qh = hc->qh; ++ ++ if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) { ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &hc->qh->qtd_list, qtd_list_entry) { ++ qtd->in_process = 0; ++ } ++ return; ++ } ++ ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) { ++ ++ urb = qtd->urb; ++ ++ n_bytes = 0; ++ xfer_done = 0; ++ ++ for (i = 0; i < qtd->n_desc; i++) { ++ dma_desc = &qh->desc_list[n_desc]; ++ ++ n_bytes = qh->n_bytes[n_desc]; ++ ++ failed = ++ update_non_isoc_urb_state_ddma(hcd, hc, qtd, ++ dma_desc, ++ halt_status, n_bytes, ++ &xfer_done); ++ ++ if (failed ++ || (xfer_done ++ && (urb->status != -DWC_E_IN_PROGRESS))) { ++ ++ hcd->fops->complete(hcd, urb->priv, urb, ++ urb->status); ++ dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); ++ ++ if (failed) ++ goto stop_scan; ++ } else if (qh->ep_type == UE_CONTROL) { ++ if (qtd->control_phase == DWC_OTG_CONTROL_SETUP) { ++ if (urb->length > 0) { ++ qtd->control_phase = DWC_OTG_CONTROL_DATA; ++ } else { ++ qtd->control_phase = DWC_OTG_CONTROL_STATUS; ++ } ++ DWC_DEBUGPL(DBG_HCDV, " Control setup transaction done\n"); ++ } else if (qtd->control_phase == DWC_OTG_CONTROL_DATA) { ++ if (xfer_done) { ++ qtd->control_phase = DWC_OTG_CONTROL_STATUS; ++ DWC_DEBUGPL(DBG_HCDV, " Control data transfer done\n"); ++ } else if (i + 1 == qtd->n_desc) { ++ /* ++ * Last descriptor for Control data stage which is ++ * not completed yet. ++ */ ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ } ++ } ++ } ++ ++ n_desc++; ++ } ++ ++ } ++ ++stop_scan: ++ ++ if (qh->ep_type != UE_CONTROL) { ++ /* ++ * Resetting the data toggle for bulk ++ * and interrupt endpoints in case of stall. See handle_hc_stall_intr() ++ */ ++ if (halt_status == DWC_OTG_HC_XFER_STALL) ++ qh->data_toggle = DWC_OTG_HC_PID_DATA0; ++ else ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ } ++ ++ if (halt_status == DWC_OTG_HC_XFER_COMPLETE) { ++ hcint_data_t hcint; ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ if (hcint.b.nyet) { ++ /* ++ * Got a NYET on the last transaction of the transfer. It ++ * means that the endpoint should be in the PING state at the ++ * beginning of the next transfer. ++ */ ++ qh->ping_state = 1; ++ clear_hc_int(hc_regs, nyet); ++ } ++ ++ } ++ ++} ++ ++/** ++ * This function is called from interrupt handlers. ++ * Scans the descriptor list, updates URB's status and ++ * calls completion routine for the URB if it's done. ++ * Releases the channel to be used by other transfers. ++ * In case of Isochronous endpoint the channel is not halted until ++ * the end of the session, i.e. QTD list is empty. ++ * If periodic channel released the FrameList is updated accordingly. ++ * ++ * Calls transaction selection routines to activate pending transfers. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param hc Host channel, the transfer is completed on. ++ * @param hc_regs Host channel registers. ++ * @param halt_status Reason the channel is being halted, ++ * or just XferComplete for isochronous transfer ++ */ ++void dwc_otg_hcd_complete_xfer_ddma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_halt_status_e halt_status) ++{ ++ uint8_t continue_isoc_xfer = 0; ++ dwc_otg_transaction_type_e tr_type; ++ dwc_otg_qh_t *qh = hc->qh; ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ ++ complete_isoc_xfer_ddma(hcd, hc, hc_regs, halt_status); ++ ++ /* Release the channel if halted or session completed */ ++ if (halt_status != DWC_OTG_HC_XFER_COMPLETE || ++ DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { ++ ++ /* Halt the channel if session completed */ ++ if (halt_status == DWC_OTG_HC_XFER_COMPLETE) { ++ dwc_otg_hc_halt(hcd->core_if, hc, halt_status); ++ } ++ ++ release_channel_ddma(hcd, qh); ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ } else { ++ /* Keep in assigned schedule to continue transfer */ ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, ++ &qh->qh_list_entry); ++ continue_isoc_xfer = 1; ++ ++ } ++ /** @todo Consider the case when period exceeds FrameList size. ++ * Frame Rollover interrupt should be used. ++ */ ++ } else { ++ /* Scan descriptor list to complete the URB(s), then release the channel */ ++ complete_non_isoc_xfer_ddma(hcd, hc, hc_regs, halt_status); ++ ++ release_channel_ddma(hcd, qh); ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ ++ if (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { ++ /* Add back to inactive non-periodic schedule on normal completion */ ++ dwc_otg_hcd_qh_add(hcd, qh); ++ } ++ ++ } ++ tr_type = dwc_otg_hcd_select_transactions(hcd); ++ if (tr_type != DWC_OTG_TRANSACTION_NONE || continue_isoc_xfer) { ++ if (continue_isoc_xfer) { ++ if (tr_type == DWC_OTG_TRANSACTION_NONE) { ++ tr_type = DWC_OTG_TRANSACTION_PERIODIC; ++ } else if (tr_type == DWC_OTG_TRANSACTION_NON_PERIODIC) { ++ tr_type = DWC_OTG_TRANSACTION_ALL; ++ } ++ } ++ dwc_otg_hcd_queue_transactions(hcd, tr_type); ++ } ++} ++ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,412 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_if.h $ ++ * $Revision: #12 $ ++ * $Date: 2011/10/26 $ ++ * $Change: 1873028 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++#ifndef __DWC_HCD_IF_H__ ++#define __DWC_HCD_IF_H__ ++ ++#include "dwc_otg_core_if.h" ++ ++/** @file ++ * This file defines DWC_OTG HCD Core API. ++ */ ++ ++struct dwc_otg_hcd; ++typedef struct dwc_otg_hcd dwc_otg_hcd_t; ++ ++struct dwc_otg_hcd_urb; ++typedef struct dwc_otg_hcd_urb dwc_otg_hcd_urb_t; ++ ++/** @name HCD Function Driver Callbacks */ ++/** @{ */ ++ ++/** This function is called whenever core switches to host mode. */ ++typedef int (*dwc_otg_hcd_start_cb_t) (dwc_otg_hcd_t * hcd); ++ ++/** This function is called when device has been disconnected */ ++typedef int (*dwc_otg_hcd_disconnect_cb_t) (dwc_otg_hcd_t * hcd); ++ ++/** Wrapper provides this function to HCD to core, so it can get hub information to which device is connected */ ++typedef int (*dwc_otg_hcd_hub_info_from_urb_cb_t) (dwc_otg_hcd_t * hcd, ++ void *urb_handle, ++ uint32_t * hub_addr, ++ uint32_t * port_addr); ++/** Via this function HCD core gets device speed */ ++typedef int (*dwc_otg_hcd_speed_from_urb_cb_t) (dwc_otg_hcd_t * hcd, ++ void *urb_handle); ++ ++/** This function is called when urb is completed */ ++typedef int (*dwc_otg_hcd_complete_urb_cb_t) (dwc_otg_hcd_t * hcd, ++ void *urb_handle, ++ dwc_otg_hcd_urb_t * dwc_otg_urb, ++ int32_t status); ++ ++/** Via this function HCD core gets b_hnp_enable parameter */ ++typedef int (*dwc_otg_hcd_get_b_hnp_enable) (dwc_otg_hcd_t * hcd); ++ ++struct dwc_otg_hcd_function_ops { ++ dwc_otg_hcd_start_cb_t start; ++ dwc_otg_hcd_disconnect_cb_t disconnect; ++ dwc_otg_hcd_hub_info_from_urb_cb_t hub_info; ++ dwc_otg_hcd_speed_from_urb_cb_t speed; ++ dwc_otg_hcd_complete_urb_cb_t complete; ++ dwc_otg_hcd_get_b_hnp_enable get_b_hnp_enable; ++}; ++/** @} */ ++ ++/** @name HCD Core API */ ++/** @{ */ ++/** This function allocates dwc_otg_hcd structure and returns pointer on it. */ ++extern dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void); ++ ++/** This function should be called to initiate HCD Core. ++ * ++ * @param hcd The HCD ++ * @param core_if The DWC_OTG Core ++ * ++ * Returns -DWC_E_NO_MEMORY if no enough memory. ++ * Returns 0 on success ++ */ ++extern int dwc_otg_hcd_init(dwc_otg_hcd_t * hcd, dwc_otg_core_if_t * core_if); ++ ++/** Frees HCD ++ * ++ * @param hcd The HCD ++ */ ++extern void dwc_otg_hcd_remove(dwc_otg_hcd_t * hcd); ++ ++/** This function should be called on every hardware interrupt. ++ * ++ * @param dwc_otg_hcd The HCD ++ * ++ * Returns non zero if interrupt is handled ++ * Return 0 if interrupt is not handled ++ */ ++extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++ ++/** ++ * Returns private data set by ++ * dwc_otg_hcd_set_priv_data function. ++ * ++ * @param hcd The HCD ++ */ ++extern void *dwc_otg_hcd_get_priv_data(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Set private data. ++ * ++ * @param hcd The HCD ++ * @param priv_data pointer to be stored in private data ++ */ ++extern void dwc_otg_hcd_set_priv_data(dwc_otg_hcd_t * hcd, void *priv_data); ++ ++/** ++ * This function initializes the HCD Core. ++ * ++ * @param hcd The HCD ++ * @param fops The Function Driver Operations data structure containing pointers to all callbacks. ++ * ++ * Returns -DWC_E_NO_DEVICE if Core is currently is in device mode. ++ * Returns 0 on success ++ */ ++extern int dwc_otg_hcd_start(dwc_otg_hcd_t * hcd, ++ struct dwc_otg_hcd_function_ops *fops); ++ ++/** ++ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are ++ * stopped. ++ * ++ * @param hcd The HCD ++ */ ++extern void dwc_otg_hcd_stop(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Handles hub class-specific requests. ++ * ++ * @param dwc_otg_hcd The HCD ++ * @param typeReq Request Type ++ * @param wValue wValue from control request ++ * @param wIndex wIndex from control request ++ * @param buf data buffer ++ * @param wLength data buffer length ++ * ++ * Returns -DWC_E_INVALID if invalid argument is passed ++ * Returns 0 on success ++ */ ++extern int dwc_otg_hcd_hub_control(dwc_otg_hcd_t * dwc_otg_hcd, ++ uint16_t typeReq, uint16_t wValue, ++ uint16_t wIndex, uint8_t * buf, ++ uint16_t wLength); ++ ++/** ++ * Returns otg port number. ++ * ++ * @param hcd The HCD ++ */ ++extern uint32_t dwc_otg_hcd_otg_port(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Returns OTG version - either 1.3 or 2.0. ++ * ++ * @param core_if The core_if structure pointer ++ */ ++extern uint16_t dwc_otg_get_otg_version(dwc_otg_core_if_t * core_if); ++ ++/** ++ * Returns 1 if currently core is acting as B host, and 0 otherwise. ++ * ++ * @param hcd The HCD ++ */ ++extern uint32_t dwc_otg_hcd_is_b_host(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Returns current frame number. ++ * ++ * @param hcd The HCD ++ */ ++extern int dwc_otg_hcd_get_frame_number(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Dumps hcd state. ++ * ++ * @param hcd The HCD ++ */ ++extern void dwc_otg_hcd_dump_state(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Dump the average frame remaining at SOF. This can be used to ++ * determine average interrupt latency. Frame remaining is also shown for ++ * start transfer and two additional sample points. ++ * Currently this function is not implemented. ++ * ++ * @param hcd The HCD ++ */ ++extern void dwc_otg_hcd_dump_frrem(dwc_otg_hcd_t * hcd); ++ ++/** ++ * Sends LPM transaction to the local device. ++ * ++ * @param hcd The HCD ++ * @param devaddr Device Address ++ * @param hird Host initiated resume duration ++ * @param bRemoteWake Value of bRemoteWake field in LPM transaction ++ * ++ * Returns negative value if sending LPM transaction was not succeeded. ++ * Returns 0 on success. ++ */ ++extern int dwc_otg_hcd_send_lpm(dwc_otg_hcd_t * hcd, uint8_t devaddr, ++ uint8_t hird, uint8_t bRemoteWake); ++ ++/* URB interface */ ++ ++/** ++ * Allocates memory for dwc_otg_hcd_urb structure. ++ * Allocated memory should be freed by call of DWC_FREE. ++ * ++ * @param hcd The HCD ++ * @param iso_desc_count Count of ISOC descriptors ++ * @param atomic_alloc Specefies whether to perform atomic allocation. ++ */ ++extern dwc_otg_hcd_urb_t *dwc_otg_hcd_urb_alloc(dwc_otg_hcd_t * hcd, ++ int iso_desc_count, ++ int atomic_alloc); ++ ++/** ++ * Set pipe information in URB. ++ * ++ * @param hcd_urb DWC_OTG URB ++ * @param devaddr Device Address ++ * @param ep_num Endpoint Number ++ * @param ep_type Endpoint Type ++ * @param ep_dir Endpoint Direction ++ * @param mps Max Packet Size ++ */ ++extern void dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_hcd_urb_t * hcd_urb, ++ uint8_t devaddr, uint8_t ep_num, ++ uint8_t ep_type, uint8_t ep_dir, ++ uint16_t mps); ++ ++/* Transfer flags */ ++#define URB_GIVEBACK_ASAP 0x1 ++#define URB_SEND_ZERO_PACKET 0x2 ++ ++/** ++ * Sets dwc_otg_hcd_urb parameters. ++ * ++ * @param urb DWC_OTG URB allocated by dwc_otg_hcd_urb_alloc function. ++ * @param urb_handle Unique handle for request, this will be passed back ++ * to function driver in completion callback. ++ * @param buf The buffer for the data ++ * @param dma The DMA buffer for the data ++ * @param buflen Transfer length ++ * @param sp Buffer for setup data ++ * @param sp_dma DMA address of setup data buffer ++ * @param flags Transfer flags ++ * @param interval Polling interval for interrupt or isochronous transfers. ++ */ ++extern void dwc_otg_hcd_urb_set_params(dwc_otg_hcd_urb_t * urb, ++ void *urb_handle, void *buf, ++ dwc_dma_t dma, uint32_t buflen, void *sp, ++ dwc_dma_t sp_dma, uint32_t flags, ++ uint16_t interval); ++ ++/** Gets status from dwc_otg_hcd_urb ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ */ ++extern uint32_t dwc_otg_hcd_urb_get_status(dwc_otg_hcd_urb_t * dwc_otg_urb); ++ ++/** Gets actual length from dwc_otg_hcd_urb ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ */ ++extern uint32_t dwc_otg_hcd_urb_get_actual_length(dwc_otg_hcd_urb_t * ++ dwc_otg_urb); ++ ++/** Gets error count from dwc_otg_hcd_urb. Only for ISOC URBs ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ */ ++extern uint32_t dwc_otg_hcd_urb_get_error_count(dwc_otg_hcd_urb_t * ++ dwc_otg_urb); ++ ++/** Set ISOC descriptor offset and length ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ * @param desc_num ISOC descriptor number ++ * @param offset Offset from beginig of buffer. ++ * @param length Transaction length ++ */ ++extern void dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_hcd_urb_t * dwc_otg_urb, ++ int desc_num, uint32_t offset, ++ uint32_t length); ++ ++/** Get status of ISOC descriptor, specified by desc_num ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ * @param desc_num ISOC descriptor number ++ */ ++extern uint32_t dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_hcd_urb_t * ++ dwc_otg_urb, int desc_num); ++ ++/** Get actual length of ISOC descriptor, specified by desc_num ++ * ++ * @param dwc_otg_urb DWC_OTG URB ++ * @param desc_num ISOC descriptor number ++ */ ++extern uint32_t dwc_otg_hcd_urb_get_iso_desc_actual_length(dwc_otg_hcd_urb_t * ++ dwc_otg_urb, ++ int desc_num); ++ ++/** Queue URB. After transfer is completes, the complete callback will be called with the URB status ++ * ++ * @param dwc_otg_hcd The HCD ++ * @param dwc_otg_urb DWC_OTG URB ++ * @param ep_handle Out parameter for returning endpoint handle ++ * @param atomic_alloc Flag to do atomic allocation if needed ++ * ++ * Returns -DWC_E_NO_DEVICE if no device is connected. ++ * Returns -DWC_E_NO_MEMORY if there is no enough memory. ++ * Returns 0 on success. ++ */ ++extern int dwc_otg_hcd_urb_enqueue(dwc_otg_hcd_t * dwc_otg_hcd, ++ dwc_otg_hcd_urb_t * dwc_otg_urb, ++ void **ep_handle, int atomic_alloc); ++ ++/** De-queue the specified URB ++ * ++ * @param dwc_otg_hcd The HCD ++ * @param dwc_otg_urb DWC_OTG URB ++ */ ++extern int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_t * dwc_otg_hcd, ++ dwc_otg_hcd_urb_t * dwc_otg_urb); ++ ++/** Frees resources in the DWC_otg controller related to a given endpoint. ++ * Any URBs for the endpoint must already be dequeued. ++ * ++ * @param hcd The HCD ++ * @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function ++ * @param retry Number of retries if there are queued transfers. ++ * ++ * Returns -DWC_E_INVALID if invalid arguments are passed. ++ * Returns 0 on success ++ */ ++extern int dwc_otg_hcd_endpoint_disable(dwc_otg_hcd_t * hcd, void *ep_handle, ++ int retry); ++ ++/* Resets the data toggle in qh structure. This function can be called from ++ * usb_clear_halt routine. ++ * ++ * @param hcd The HCD ++ * @param ep_handle Endpoint handle, returned by dwc_otg_hcd_urb_enqueue function ++ * ++ * Returns -DWC_E_INVALID if invalid arguments are passed. ++ * Returns 0 on success ++ */ ++extern int dwc_otg_hcd_endpoint_reset(dwc_otg_hcd_t * hcd, void *ep_handle); ++ ++/** Returns 1 if status of specified port is changed and 0 otherwise. ++ * ++ * @param hcd The HCD ++ * @param port Port number ++ */ ++extern int dwc_otg_hcd_is_status_changed(dwc_otg_hcd_t * hcd, int port); ++ ++/** Call this function to check if bandwidth was allocated for specified endpoint. ++ * Only for ISOC and INTERRUPT endpoints. ++ * ++ * @param hcd The HCD ++ * @param ep_handle Endpoint handle ++ */ ++extern int dwc_otg_hcd_is_bandwidth_allocated(dwc_otg_hcd_t * hcd, ++ void *ep_handle); ++ ++/** Call this function to check if bandwidth was freed for specified endpoint. ++ * ++ * @param hcd The HCD ++ * @param ep_handle Endpoint handle ++ */ ++extern int dwc_otg_hcd_is_bandwidth_freed(dwc_otg_hcd_t * hcd, void *ep_handle); ++ ++/** Returns bandwidth allocated for specified endpoint in microseconds. ++ * Only for ISOC and INTERRUPT endpoints. ++ * ++ * @param hcd The HCD ++ * @param ep_handle Endpoint handle ++ */ ++extern uint8_t dwc_otg_hcd_get_ep_bandwidth(dwc_otg_hcd_t * hcd, ++ void *ep_handle); ++ ++/** @} */ ++ ++#endif /* __DWC_HCD_IF_H__ */ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,2106 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_intr.c $ ++ * $Revision: #89 $ ++ * $Date: 2011/10/20 $ ++ * $Change: 1869487 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++ ++#include "dwc_otg_hcd.h" ++#include "dwc_otg_regs.h" ++ ++extern bool microframe_schedule; ++ ++/** @file ++ * This file contains the implementation of the HCD Interrupt handlers. ++ */ ++ ++/** This function handles interrupts for the HCD. */ ++int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ int retval = 0; ++ ++ dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if; ++ gintsts_data_t gintsts; ++#ifdef DEBUG ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ ++ //GRAYG: debugging ++ if (NULL == global_regs) { ++ DWC_DEBUGPL(DBG_HCD, "**** NULL regs: dwc_otg_hcd=%p " ++ "core_if=%p\n", ++ dwc_otg_hcd, global_regs); ++ return retval; ++ } ++#endif ++ ++ /* Exit from ISR if core is hibernated */ ++ if (core_if->hibernation_suspend == 1) { ++ return retval; ++ } ++ DWC_SPINLOCK(dwc_otg_hcd->lock); ++ /* Check if HOST Mode */ ++ if (dwc_otg_is_host_mode(core_if)) { ++ gintsts.d32 = dwc_otg_read_core_intr(core_if); ++ if (!gintsts.d32) { ++ DWC_SPINUNLOCK(dwc_otg_hcd->lock); ++ return 0; ++ } ++#ifdef DEBUG ++ /* Don't print debug message in the interrupt handler on SOF */ ++#ifndef DEBUG_SOF ++ if (gintsts.d32 != DWC_SOF_INTR_MASK) ++#endif ++ DWC_DEBUGPL(DBG_HCDI, "\n"); ++#endif ++ ++#ifdef DEBUG ++#ifndef DEBUG_SOF ++ if (gintsts.d32 != DWC_SOF_INTR_MASK) ++#endif ++ DWC_DEBUGPL(DBG_HCDI, ++ "DWC OTG HCD Interrupt Detected gintsts&gintmsk=0x%08x core_if=%p\n", ++ gintsts.d32, core_if); ++#endif ++ ++ if (gintsts.b.sofintr) { ++ retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd); ++ } ++ if (gintsts.b.rxstsqlvl) { ++ retval |= ++ dwc_otg_hcd_handle_rx_status_q_level_intr ++ (dwc_otg_hcd); ++ } ++ if (gintsts.b.nptxfempty) { ++ retval |= ++ dwc_otg_hcd_handle_np_tx_fifo_empty_intr ++ (dwc_otg_hcd); ++ } ++ if (gintsts.b.i2cintr) { ++ /** @todo Implement i2cintr handler. */ ++ } ++ if (gintsts.b.portintr) { ++ retval |= dwc_otg_hcd_handle_port_intr(dwc_otg_hcd); ++ } ++ if (gintsts.b.hcintr) { ++ retval |= dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd); ++ } ++ if (gintsts.b.ptxfempty) { ++ retval |= ++ dwc_otg_hcd_handle_perio_tx_fifo_empty_intr ++ (dwc_otg_hcd); ++ } ++#ifdef DEBUG ++#ifndef DEBUG_SOF ++ if (gintsts.d32 != DWC_SOF_INTR_MASK) ++#endif ++ { ++ DWC_DEBUGPL(DBG_HCDI, ++ "DWC OTG HCD Finished Servicing Interrupts\n"); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD gintsts=0x%08x\n", ++ DWC_READ_REG32(&global_regs->gintsts)); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD gintmsk=0x%08x\n", ++ DWC_READ_REG32(&global_regs->gintmsk)); ++ } ++#endif ++ ++#ifdef DEBUG ++#ifndef DEBUG_SOF ++ if (gintsts.d32 != DWC_SOF_INTR_MASK) ++#endif ++ DWC_DEBUGPL(DBG_HCDI, "\n"); ++#endif ++ ++ } ++ DWC_SPINUNLOCK(dwc_otg_hcd->lock); ++ return retval; ++} ++ ++#ifdef DWC_TRACK_MISSED_SOFS ++#warning Compiling code to track missed SOFs ++#define FRAME_NUM_ARRAY_SIZE 1000 ++/** ++ * This function is for debug only. ++ */ ++static inline void track_missed_sofs(uint16_t curr_frame_number) ++{ ++ static uint16_t frame_num_array[FRAME_NUM_ARRAY_SIZE]; ++ static uint16_t last_frame_num_array[FRAME_NUM_ARRAY_SIZE]; ++ static int frame_num_idx = 0; ++ static uint16_t last_frame_num = DWC_HFNUM_MAX_FRNUM; ++ static int dumped_frame_num_array = 0; ++ ++ if (frame_num_idx < FRAME_NUM_ARRAY_SIZE) { ++ if (((last_frame_num + 1) & DWC_HFNUM_MAX_FRNUM) != ++ curr_frame_number) { ++ frame_num_array[frame_num_idx] = curr_frame_number; ++ last_frame_num_array[frame_num_idx++] = last_frame_num; ++ } ++ } else if (!dumped_frame_num_array) { ++ int i; ++ DWC_PRINTF("Frame Last Frame\n"); ++ DWC_PRINTF("----- ----------\n"); ++ for (i = 0; i < FRAME_NUM_ARRAY_SIZE; i++) { ++ DWC_PRINTF("0x%04x 0x%04x\n", ++ frame_num_array[i], last_frame_num_array[i]); ++ } ++ dumped_frame_num_array = 1; ++ } ++ last_frame_num = curr_frame_number; ++} ++#endif ++ ++/** ++ * Handles the start-of-frame interrupt in host mode. Non-periodic ++ * transactions may be queued to the DWC_otg controller for the current ++ * (micro)frame. Periodic transactions may be queued to the controller for the ++ * next (micro)frame. ++ */ ++int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd) ++{ ++ hfnum_data_t hfnum; ++ dwc_list_link_t *qh_entry; ++ dwc_otg_qh_t *qh; ++ dwc_otg_transaction_type_e tr_type; ++ gintsts_data_t gintsts = {.d32 = 0 }; ++ ++ hfnum.d32 = ++ DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hfnum); ++ ++#ifdef DEBUG_SOF ++ DWC_DEBUGPL(DBG_HCD, "--Start of Frame Interrupt--\n"); ++#endif ++ hcd->frame_number = hfnum.b.frnum; ++ ++#ifdef DEBUG ++ hcd->frrem_accum += hfnum.b.frrem; ++ hcd->frrem_samples++; ++#endif ++ ++#ifdef DWC_TRACK_MISSED_SOFS ++ track_missed_sofs(hcd->frame_number); ++#endif ++ /* Determine whether any periodic QHs should be executed. */ ++ qh_entry = DWC_LIST_FIRST(&hcd->periodic_sched_inactive); ++ while (qh_entry != &hcd->periodic_sched_inactive) { ++ qh = DWC_LIST_ENTRY(qh_entry, dwc_otg_qh_t, qh_list_entry); ++ qh_entry = qh_entry->next; ++ if (dwc_frame_num_le(qh->sched_frame, hcd->frame_number)) { ++ /* ++ * Move QH to the ready list to be executed next ++ * (micro)frame. ++ */ ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready, ++ &qh->qh_list_entry); ++ } ++ } ++ tr_type = dwc_otg_hcd_select_transactions(hcd); ++ if (tr_type != DWC_OTG_TRANSACTION_NONE) { ++ dwc_otg_hcd_queue_transactions(hcd, tr_type); ++ } ++ ++ /* Clear interrupt */ ++ gintsts.b.sofintr = 1; ++ DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** Handles the Rx Status Queue Level Interrupt, which indicates that there is at ++ * least one packet in the Rx FIFO. The packets are moved from the FIFO to ++ * memory if the DWC_otg controller is operating in Slave mode. */ ++int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ host_grxsts_data_t grxsts; ++ dwc_hc_t *hc = NULL; ++ ++ DWC_DEBUGPL(DBG_HCD, "--RxStsQ Level Interrupt--\n"); ++ ++ grxsts.d32 = ++ DWC_READ_REG32(&dwc_otg_hcd->core_if->core_global_regs->grxstsp); ++ ++ hc = dwc_otg_hcd->hc_ptr_array[grxsts.b.chnum]; ++ if (!hc) { ++ DWC_ERROR("Unable to get corresponding channel\n"); ++ return 0; ++ } ++ ++ /* Packet Status */ ++ DWC_DEBUGPL(DBG_HCDV, " Ch num = %d\n", grxsts.b.chnum); ++ DWC_DEBUGPL(DBG_HCDV, " Count = %d\n", grxsts.b.bcnt); ++ DWC_DEBUGPL(DBG_HCDV, " DPID = %d, hc.dpid = %d\n", grxsts.b.dpid, ++ hc->data_pid_start); ++ DWC_DEBUGPL(DBG_HCDV, " PStatus = %d\n", grxsts.b.pktsts); ++ ++ switch (grxsts.b.pktsts) { ++ case DWC_GRXSTS_PKTSTS_IN: ++ /* Read the data into the host buffer. */ ++ if (grxsts.b.bcnt > 0) { ++ dwc_otg_read_packet(dwc_otg_hcd->core_if, ++ hc->xfer_buff, grxsts.b.bcnt); ++ ++ /* Update the HC fields for the next packet received. */ ++ hc->xfer_count += grxsts.b.bcnt; ++ hc->xfer_buff += grxsts.b.bcnt; ++ } ++ ++ case DWC_GRXSTS_PKTSTS_IN_XFER_COMP: ++ case DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR: ++ case DWC_GRXSTS_PKTSTS_CH_HALTED: ++ /* Handled in interrupt, just ignore data */ ++ break; ++ default: ++ DWC_ERROR("RX_STS_Q Interrupt: Unknown status %d\n", ++ grxsts.b.pktsts); ++ break; ++ } ++ ++ return 1; ++} ++ ++/** This interrupt occurs when the non-periodic Tx FIFO is half-empty. More ++ * data packets may be written to the FIFO for OUT transfers. More requests ++ * may be written to the non-periodic request queue for IN transfers. This ++ * interrupt is enabled only in Slave mode. */ ++int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ DWC_DEBUGPL(DBG_HCD, "--Non-Periodic TxFIFO Empty Interrupt--\n"); ++ dwc_otg_hcd_queue_transactions(dwc_otg_hcd, ++ DWC_OTG_TRANSACTION_NON_PERIODIC); ++ return 1; ++} ++ ++/** This interrupt occurs when the periodic Tx FIFO is half-empty. More data ++ * packets may be written to the FIFO for OUT transfers. More requests may be ++ * written to the periodic request queue for IN transfers. This interrupt is ++ * enabled only in Slave mode. */ ++int32_t dwc_otg_hcd_handle_perio_tx_fifo_empty_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ DWC_DEBUGPL(DBG_HCD, "--Periodic TxFIFO Empty Interrupt--\n"); ++ dwc_otg_hcd_queue_transactions(dwc_otg_hcd, ++ DWC_OTG_TRANSACTION_PERIODIC); ++ return 1; ++} ++ ++/** There are multiple conditions that can cause a port interrupt. This function ++ * determines which interrupt conditions have occurred and handles them ++ * appropriately. */ ++int32_t dwc_otg_hcd_handle_port_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ int retval = 0; ++ hprt0_data_t hprt0; ++ hprt0_data_t hprt0_modify; ++ ++ hprt0.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0); ++ hprt0_modify.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0); ++ ++ /* Clear appropriate bits in HPRT0 to clear the interrupt bit in ++ * GINTSTS */ ++ ++ hprt0_modify.b.prtena = 0; ++ hprt0_modify.b.prtconndet = 0; ++ hprt0_modify.b.prtenchng = 0; ++ hprt0_modify.b.prtovrcurrchng = 0; ++ ++ /* Port Connect Detected ++ * Set flag and clear if detected */ ++ if (dwc_otg_hcd->core_if->hibernation_suspend == 1) { ++ // Dont modify port status if we are in hibernation state ++ hprt0_modify.b.prtconndet = 1; ++ hprt0_modify.b.prtenchng = 1; ++ DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0_modify.d32); ++ hprt0.d32 = DWC_READ_REG32(dwc_otg_hcd->core_if->host_if->hprt0); ++ return retval; ++ } ++ ++ if (hprt0.b.prtconndet) { ++ /** @todo - check if steps performed in 'else' block should be perfromed regardles adp */ ++ if (dwc_otg_hcd->core_if->adp_enable && ++ dwc_otg_hcd->core_if->adp.vbuson_timer_started == 1) { ++ DWC_PRINTF("PORT CONNECT DETECTED ----------------\n"); ++ DWC_TIMER_CANCEL(dwc_otg_hcd->core_if->adp.vbuson_timer); ++ dwc_otg_hcd->core_if->adp.vbuson_timer_started = 0; ++ /* TODO - check if this is required, as ++ * host initialization was already performed ++ * after initial ADP probing ++ */ ++ /*dwc_otg_hcd->core_if->adp.vbuson_timer_started = 0; ++ dwc_otg_core_init(dwc_otg_hcd->core_if); ++ dwc_otg_enable_global_interrupts(dwc_otg_hcd->core_if); ++ cil_hcd_start(dwc_otg_hcd->core_if);*/ ++ } else { ++ ++ DWC_DEBUGPL(DBG_HCD, "--Port Interrupt HPRT0=0x%08x " ++ "Port Connect Detected--\n", hprt0.d32); ++ dwc_otg_hcd->flags.b.port_connect_status_change = 1; ++ dwc_otg_hcd->flags.b.port_connect_status = 1; ++ hprt0_modify.b.prtconndet = 1; ++ ++ /* B-Device has connected, Delete the connection timer. */ ++ DWC_TIMER_CANCEL(dwc_otg_hcd->conn_timer); ++ } ++ /* The Hub driver asserts a reset when it sees port connect ++ * status change flag */ ++ retval |= 1; ++ } ++ ++ /* Port Enable Changed ++ * Clear if detected - Set internal flag if disabled */ ++ if (hprt0.b.prtenchng) { ++ DWC_DEBUGPL(DBG_HCD, " --Port Interrupt HPRT0=0x%08x " ++ "Port Enable Changed--\n", hprt0.d32); ++ hprt0_modify.b.prtenchng = 1; ++ if (hprt0.b.prtena == 1) { ++ hfir_data_t hfir; ++ int do_reset = 0; ++ dwc_otg_core_params_t *params = ++ dwc_otg_hcd->core_if->core_params; ++ dwc_otg_core_global_regs_t *global_regs = ++ dwc_otg_hcd->core_if->core_global_regs; ++ dwc_otg_host_if_t *host_if = ++ dwc_otg_hcd->core_if->host_if; ++ ++ /* Every time when port enables calculate ++ * HFIR.FrInterval ++ */ ++ hfir.d32 = DWC_READ_REG32(&host_if->host_global_regs->hfir); ++ hfir.b.frint = calc_frame_interval(dwc_otg_hcd->core_if); ++ DWC_WRITE_REG32(&host_if->host_global_regs->hfir, hfir.d32); ++ ++ /* Check if we need to adjust the PHY clock speed for ++ * low power and adjust it */ ++ if (params->host_support_fs_ls_low_power) { ++ gusbcfg_data_t usbcfg; ++ ++ usbcfg.d32 = ++ DWC_READ_REG32(&global_regs->gusbcfg); ++ ++ if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_LOW_SPEED ++ || hprt0.b.prtspd == ++ DWC_HPRT0_PRTSPD_FULL_SPEED) { ++ /* ++ * Low power ++ */ ++ hcfg_data_t hcfg; ++ if (usbcfg.b.phylpwrclksel == 0) { ++ /* Set PHY low power clock select for FS/LS devices */ ++ usbcfg.b.phylpwrclksel = 1; ++ DWC_WRITE_REG32 ++ (&global_regs->gusbcfg, ++ usbcfg.d32); ++ do_reset = 1; ++ } ++ ++ hcfg.d32 = ++ DWC_READ_REG32 ++ (&host_if->host_global_regs->hcfg); ++ ++ if (hprt0.b.prtspd == ++ DWC_HPRT0_PRTSPD_LOW_SPEED ++ && params->host_ls_low_power_phy_clk ++ == ++ DWC_HOST_LS_LOW_POWER_PHY_CLK_PARAM_6MHZ) ++ { ++ /* 6 MHZ */ ++ DWC_DEBUGPL(DBG_CIL, ++ "FS_PHY programming HCFG to 6 MHz (Low Power)\n"); ++ if (hcfg.b.fslspclksel != ++ DWC_HCFG_6_MHZ) { ++ hcfg.b.fslspclksel = ++ DWC_HCFG_6_MHZ; ++ DWC_WRITE_REG32 ++ (&host_if->host_global_regs->hcfg, ++ hcfg.d32); ++ do_reset = 1; ++ } ++ } else { ++ /* 48 MHZ */ ++ DWC_DEBUGPL(DBG_CIL, ++ "FS_PHY programming HCFG to 48 MHz ()\n"); ++ if (hcfg.b.fslspclksel != ++ DWC_HCFG_48_MHZ) { ++ hcfg.b.fslspclksel = ++ DWC_HCFG_48_MHZ; ++ DWC_WRITE_REG32 ++ (&host_if->host_global_regs->hcfg, ++ hcfg.d32); ++ do_reset = 1; ++ } ++ } ++ } else { ++ /* ++ * Not low power ++ */ ++ if (usbcfg.b.phylpwrclksel == 1) { ++ usbcfg.b.phylpwrclksel = 0; ++ DWC_WRITE_REG32 ++ (&global_regs->gusbcfg, ++ usbcfg.d32); ++ do_reset = 1; ++ } ++ } ++ ++ if (do_reset) { ++ DWC_TASK_SCHEDULE(dwc_otg_hcd->reset_tasklet); ++ } ++ } ++ ++ if (!do_reset) { ++ /* Port has been enabled set the reset change flag */ ++ dwc_otg_hcd->flags.b.port_reset_change = 1; ++ } ++ } else { ++ dwc_otg_hcd->flags.b.port_enable_change = 1; ++ } ++ retval |= 1; ++ } ++ ++ /** Overcurrent Change Interrupt */ ++ if (hprt0.b.prtovrcurrchng) { ++ DWC_DEBUGPL(DBG_HCD, " --Port Interrupt HPRT0=0x%08x " ++ "Port Overcurrent Changed--\n", hprt0.d32); ++ dwc_otg_hcd->flags.b.port_over_current_change = 1; ++ hprt0_modify.b.prtovrcurrchng = 1; ++ retval |= 1; ++ } ++ ++ /* Clear Port Interrupts */ ++ DWC_WRITE_REG32(dwc_otg_hcd->core_if->host_if->hprt0, hprt0_modify.d32); ++ ++ return retval; ++} ++ ++/** This interrupt indicates that one or more host channels has a pending ++ * interrupt. There are multiple conditions that can cause each host channel ++ * interrupt. This function determines which conditions have occurred for each ++ * host channel interrupt and handles them appropriately. */ ++int32_t dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ int i; ++ int retval = 0; ++ haint_data_t haint; ++ ++ /* Clear appropriate bits in HCINTn to clear the interrupt bit in ++ * GINTSTS */ ++ ++ haint.d32 = dwc_otg_read_host_all_channels_intr(dwc_otg_hcd->core_if); ++ ++ for (i = 0; i < dwc_otg_hcd->core_if->core_params->host_channels; i++) { ++ if (haint.b2.chint & (1 << i)) { ++ retval |= dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd, i); ++ } ++ } ++ ++ return retval; ++} ++ ++/** ++ * Gets the actual length of a transfer after the transfer halts. _halt_status ++ * holds the reason for the halt. ++ * ++ * For IN transfers where halt_status is DWC_OTG_HC_XFER_COMPLETE, ++ * *short_read is set to 1 upon return if less than the requested ++ * number of bytes were transferred. Otherwise, *short_read is set to 0 upon ++ * return. short_read may also be NULL on entry, in which case it remains ++ * unchanged. ++ */ ++static uint32_t get_actual_xfer_length(dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_halt_status_e halt_status, ++ int *short_read) ++{ ++ hctsiz_data_t hctsiz; ++ uint32_t length; ++ ++ if (short_read != NULL) { ++ *short_read = 0; ++ } ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ ++ if (halt_status == DWC_OTG_HC_XFER_COMPLETE) { ++ if (hc->ep_is_in) { ++ length = hc->xfer_len - hctsiz.b.xfersize; ++ if (short_read != NULL) { ++ *short_read = (hctsiz.b.xfersize != 0); ++ } ++ } else if (hc->qh->do_split) { ++ length = qtd->ssplit_out_xfer_count; ++ } else { ++ length = hc->xfer_len; ++ } ++ } else { ++ /* ++ * Must use the hctsiz.pktcnt field to determine how much data ++ * has been transferred. This field reflects the number of ++ * packets that have been transferred via the USB. This is ++ * always an integral number of packets if the transfer was ++ * halted before its normal completion. (Can't use the ++ * hctsiz.xfersize field because that reflects the number of ++ * bytes transferred via the AHB, not the USB). ++ */ ++ length = ++ (hc->start_pkt_count - hctsiz.b.pktcnt) * hc->max_packet; ++ } ++ ++ return length; ++} ++ ++/** ++ * Updates the state of the URB after a Transfer Complete interrupt on the ++ * host channel. Updates the actual_length field of the URB based on the ++ * number of bytes transferred via the host channel. Sets the URB status ++ * if the data transfer is finished. ++ * ++ * @return 1 if the data transfer specified by the URB is completely finished, ++ * 0 otherwise. ++ */ ++static int update_urb_state_xfer_comp(dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_hcd_urb_t * urb, ++ dwc_otg_qtd_t * qtd) ++{ ++ int xfer_done = 0; ++ int short_read = 0; ++ ++ int xfer_length; ++ ++ xfer_length = get_actual_xfer_length(hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_COMPLETE, ++ &short_read); ++ ++ ++ /* non DWORD-aligned buffer case handling. */ ++ if (hc->align_buff && xfer_length && hc->ep_is_in) { ++ dwc_memcpy(urb->buf + urb->actual_length, hc->qh->dw_align_buf, ++ xfer_length); ++ } ++ ++ urb->actual_length += xfer_length; ++ ++ if (xfer_length && (hc->ep_type == DWC_OTG_EP_TYPE_BULK) && ++ (urb->flags & URB_SEND_ZERO_PACKET) ++ && (urb->actual_length == urb->length) ++ && !(urb->length % hc->max_packet)) { ++ xfer_done = 0; ++ } else if (short_read || urb->actual_length >= urb->length) { ++ xfer_done = 1; ++ urb->status = 0; ++ } ++ ++#ifdef DEBUG ++ { ++ hctsiz_data_t hctsiz; ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ DWC_DEBUGPL(DBG_HCDV, "DWC_otg: %s: %s, channel %d\n", ++ __func__, (hc->ep_is_in ? "IN" : "OUT"), ++ hc->hc_num); ++ DWC_DEBUGPL(DBG_HCDV, " hc->xfer_len %d\n", hc->xfer_len); ++ DWC_DEBUGPL(DBG_HCDV, " hctsiz.xfersize %d\n", ++ hctsiz.b.xfersize); ++ DWC_DEBUGPL(DBG_HCDV, " urb->transfer_buffer_length %d\n", ++ urb->length); ++ DWC_DEBUGPL(DBG_HCDV, " urb->actual_length %d\n", ++ urb->actual_length); ++ DWC_DEBUGPL(DBG_HCDV, " short_read %d, xfer_done %d\n", ++ short_read, xfer_done); ++ } ++#endif ++ ++ return xfer_done; ++} ++ ++/* ++ * Save the starting data toggle for the next transfer. The data toggle is ++ * saved in the QH for non-control transfers and it's saved in the QTD for ++ * control transfers. ++ */ ++void dwc_otg_hcd_save_data_toggle(dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, dwc_otg_qtd_t * qtd) ++{ ++ hctsiz_data_t hctsiz; ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ ++ if (hc->ep_type != DWC_OTG_EP_TYPE_CONTROL) { ++ dwc_otg_qh_t *qh = hc->qh; ++ if (hctsiz.b.pid == DWC_HCTSIZ_DATA0) { ++ qh->data_toggle = DWC_OTG_HC_PID_DATA0; ++ } else { ++ qh->data_toggle = DWC_OTG_HC_PID_DATA1; ++ } ++ } else { ++ if (hctsiz.b.pid == DWC_HCTSIZ_DATA0) { ++ qtd->data_toggle = DWC_OTG_HC_PID_DATA0; ++ } else { ++ qtd->data_toggle = DWC_OTG_HC_PID_DATA1; ++ } ++ } ++} ++ ++/** ++ * Updates the state of an Isochronous URB when the transfer is stopped for ++ * any reason. The fields of the current entry in the frame descriptor array ++ * are set based on the transfer state and the input _halt_status. Completes ++ * the Isochronous URB if all the URB frames have been completed. ++ * ++ * @return DWC_OTG_HC_XFER_COMPLETE if there are more frames remaining to be ++ * transferred in the URB. Otherwise return DWC_OTG_HC_XFER_URB_COMPLETE. ++ */ ++static dwc_otg_halt_status_e ++update_isoc_urb_state(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd, dwc_otg_halt_status_e halt_status) ++{ ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ dwc_otg_halt_status_e ret_val = halt_status; ++ struct dwc_otg_hcd_iso_packet_desc *frame_desc; ++ ++ frame_desc = &urb->iso_descs[qtd->isoc_frame_index]; ++ switch (halt_status) { ++ case DWC_OTG_HC_XFER_COMPLETE: ++ frame_desc->status = 0; ++ frame_desc->actual_length = ++ get_actual_xfer_length(hc, hc_regs, qtd, halt_status, NULL); ++ ++ /* non DWORD-aligned buffer case handling. */ ++ if (hc->align_buff && frame_desc->actual_length && hc->ep_is_in) { ++ dwc_memcpy(urb->buf + frame_desc->offset + qtd->isoc_split_offset, ++ hc->qh->dw_align_buf, frame_desc->actual_length); ++ } ++ ++ break; ++ case DWC_OTG_HC_XFER_FRAME_OVERRUN: ++ urb->error_count++; ++ if (hc->ep_is_in) { ++ frame_desc->status = -DWC_E_NO_STREAM_RES; ++ } else { ++ frame_desc->status = -DWC_E_COMMUNICATION; ++ } ++ frame_desc->actual_length = 0; ++ break; ++ case DWC_OTG_HC_XFER_BABBLE_ERR: ++ urb->error_count++; ++ frame_desc->status = -DWC_E_OVERFLOW; ++ /* Don't need to update actual_length in this case. */ ++ break; ++ case DWC_OTG_HC_XFER_XACT_ERR: ++ urb->error_count++; ++ frame_desc->status = -DWC_E_PROTOCOL; ++ frame_desc->actual_length = ++ get_actual_xfer_length(hc, hc_regs, qtd, halt_status, NULL); ++ ++ /* non DWORD-aligned buffer case handling. */ ++ if (hc->align_buff && frame_desc->actual_length && hc->ep_is_in) { ++ dwc_memcpy(urb->buf + frame_desc->offset + qtd->isoc_split_offset, ++ hc->qh->dw_align_buf, frame_desc->actual_length); ++ } ++ /* Skip whole frame */ ++ if (hc->qh->do_split && (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) && ++ hc->ep_is_in && hcd->core_if->dma_enable) { ++ qtd->complete_split = 0; ++ qtd->isoc_split_offset = 0; ++ } ++ ++ break; ++ default: ++ DWC_ASSERT(1, "Unhandled _halt_status (%d)\n", halt_status); ++ break; ++ } ++ if (++qtd->isoc_frame_index == urb->packet_count) { ++ /* ++ * urb->status is not used for isoc transfers. ++ * The individual frame_desc statuses are used instead. ++ */ ++ hcd->fops->complete(hcd, urb->priv, urb, 0); ++ ret_val = DWC_OTG_HC_XFER_URB_COMPLETE; ++ } else { ++ ret_val = DWC_OTG_HC_XFER_COMPLETE; ++ } ++ return ret_val; ++} ++ ++/** ++ * Frees the first QTD in the QH's list if free_qtd is 1. For non-periodic ++ * QHs, removes the QH from the active non-periodic schedule. If any QTDs are ++ * still linked to the QH, the QH is added to the end of the inactive ++ * non-periodic schedule. For periodic QHs, removes the QH from the periodic ++ * schedule if no more QTDs are linked to the QH. ++ */ ++static void deactivate_qh(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, int free_qtd) ++{ ++ int continue_split = 0; ++ dwc_otg_qtd_t *qtd; ++ ++ DWC_DEBUGPL(DBG_HCDV, " %s(%p,%p,%d)\n", __func__, hcd, qh, free_qtd); ++ ++ qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); ++ ++ if (qtd->complete_split) { ++ continue_split = 1; ++ } else if (qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_MID || ++ qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_END) { ++ continue_split = 1; ++ } ++ ++ if (free_qtd) { ++ dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); ++ continue_split = 0; ++ } ++ ++ qh->channel = NULL; ++ dwc_otg_hcd_qh_deactivate(hcd, qh, continue_split); ++} ++ ++/** ++ * Releases a host channel for use by other transfers. Attempts to select and ++ * queue more transactions since at least one host channel is available. ++ * ++ * @param hcd The HCD state structure. ++ * @param hc The host channel to release. ++ * @param qtd The QTD associated with the host channel. This QTD may be freed ++ * if the transfer is complete or an error has occurred. ++ * @param halt_status Reason the channel is being released. This status ++ * determines the actions taken by this function. ++ */ ++static void release_channel(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_halt_status_e halt_status) ++{ ++ dwc_otg_transaction_type_e tr_type; ++ int free_qtd; ++ dwc_irqflags_t flags; ++ dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ ++ DWC_DEBUGPL(DBG_HCDV, " %s: channel %d, halt_status %d, xfer_len %d\n", ++ __func__, hc->hc_num, halt_status, hc->xfer_len); ++ ++ switch (halt_status) { ++ case DWC_OTG_HC_XFER_URB_COMPLETE: ++ free_qtd = 1; ++ break; ++ case DWC_OTG_HC_XFER_AHB_ERR: ++ case DWC_OTG_HC_XFER_STALL: ++ case DWC_OTG_HC_XFER_BABBLE_ERR: ++ free_qtd = 1; ++ break; ++ case DWC_OTG_HC_XFER_XACT_ERR: ++ if (qtd->error_count >= 3) { ++ DWC_DEBUGPL(DBG_HCDV, ++ " Complete URB with transaction error\n"); ++ free_qtd = 1; ++ qtd->urb->status = -DWC_E_PROTOCOL; ++ hcd->fops->complete(hcd, qtd->urb->priv, ++ qtd->urb, -DWC_E_PROTOCOL); ++ } else { ++ free_qtd = 0; ++ } ++ break; ++ case DWC_OTG_HC_XFER_URB_DEQUEUE: ++ /* ++ * The QTD has already been removed and the QH has been ++ * deactivated. Don't want to do anything except release the ++ * host channel and try to queue more transfers. ++ */ ++ goto cleanup; ++ case DWC_OTG_HC_XFER_NO_HALT_STATUS: ++ free_qtd = 0; ++ break; ++ case DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE: ++ DWC_DEBUGPL(DBG_HCDV, ++ " Complete URB with I/O error\n"); ++ free_qtd = 1; ++ qtd->urb->status = -DWC_E_IO; ++ hcd->fops->complete(hcd, qtd->urb->priv, ++ qtd->urb, -DWC_E_IO); ++ break; ++ default: ++ free_qtd = 0; ++ break; ++ } ++ ++ deactivate_qh(hcd, hc->qh, free_qtd); ++ ++cleanup: ++ /* ++ * Release the host channel for use by other transfers. The cleanup ++ * function clears the channel interrupt enables and conditions, so ++ * there's no need to clear the Channel Halted interrupt separately. ++ */ ++ dwc_otg_hc_cleanup(hcd->core_if, hc); ++ DWC_CIRCLEQ_INSERT_TAIL(&hcd->free_hc_list, hc, hc_list_entry); ++ ++ if (!microframe_schedule) { ++ switch (hc->ep_type) { ++ case DWC_OTG_EP_TYPE_CONTROL: ++ case DWC_OTG_EP_TYPE_BULK: ++ hcd->non_periodic_channels--; ++ break; ++ ++ default: ++ /* ++ * Don't release reservations for periodic channels here. ++ * That's done when a periodic transfer is descheduled (i.e. ++ * when the QH is removed from the periodic schedule). ++ */ ++ break; ++ } ++ } else { ++ ++ DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); ++ hcd->available_host_channels++; ++ DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ } ++ ++ /* Try to queue more transfers now that there's a free channel. */ ++ tr_type = dwc_otg_hcd_select_transactions(hcd); ++ if (tr_type != DWC_OTG_TRANSACTION_NONE) { ++ dwc_otg_hcd_queue_transactions(hcd, tr_type); ++ } ++ DWC_SPINLOCK_FREE(channel_lock); ++} ++ ++/** ++ * Halts a host channel. If the channel cannot be halted immediately because ++ * the request queue is full, this function ensures that the FIFO empty ++ * interrupt for the appropriate queue is enabled so that the halt request can ++ * be queued when there is space in the request queue. ++ * ++ * This function may also be called in DMA mode. In that case, the channel is ++ * simply released since the core always halts the channel automatically in ++ * DMA mode. ++ */ ++static void halt_channel(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_qtd_t * qtd, dwc_otg_halt_status_e halt_status) ++{ ++ if (hcd->core_if->dma_enable) { ++ release_channel(hcd, hc, qtd, halt_status); ++ return; ++ } ++ ++ /* Slave mode processing... */ ++ dwc_otg_hc_halt(hcd->core_if, hc, halt_status); ++ ++ if (hc->halt_on_queue) { ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ dwc_otg_core_global_regs_t *global_regs; ++ global_regs = hcd->core_if->core_global_regs; ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL || ++ hc->ep_type == DWC_OTG_EP_TYPE_BULK) { ++ /* ++ * Make sure the Non-periodic Tx FIFO empty interrupt ++ * is enabled so that the non-periodic schedule will ++ * be processed. ++ */ ++ gintmsk.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmsk.d32); ++ } else { ++ /* ++ * Move the QH from the periodic queued schedule to ++ * the periodic assigned schedule. This allows the ++ * halt to be queued when the periodic schedule is ++ * processed. ++ */ ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, ++ &hc->qh->qh_list_entry); ++ ++ /* ++ * Make sure the Periodic Tx FIFO Empty interrupt is ++ * enabled so that the periodic schedule will be ++ * processed. ++ */ ++ gintmsk.b.ptxfempty = 1; ++ DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmsk.d32); ++ } ++ } ++} ++ ++/** ++ * Performs common cleanup for non-periodic transfers after a Transfer ++ * Complete interrupt. This function should be called after any endpoint type ++ * specific handling is finished to release the host channel. ++ */ ++static void complete_non_periodic_xfer(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_halt_status_e halt_status) ++{ ++ hcint_data_t hcint; ++ ++ qtd->error_count = 0; ++ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ if (hcint.b.nyet) { ++ /* ++ * Got a NYET on the last transaction of the transfer. This ++ * means that the endpoint should be in the PING state at the ++ * beginning of the next transfer. ++ */ ++ hc->qh->ping_state = 1; ++ clear_hc_int(hc_regs, nyet); ++ } ++ ++ /* ++ * Always halt and release the host channel to make it available for ++ * more transfers. There may still be more phases for a control ++ * transfer or more data packets for a bulk transfer at this point, ++ * but the host channel is still halted. A channel will be reassigned ++ * to the transfer when the non-periodic schedule is processed after ++ * the channel is released. This allows transactions to be queued ++ * properly via dwc_otg_hcd_queue_transactions, which also enables the ++ * Tx FIFO Empty interrupt if necessary. ++ */ ++ if (hc->ep_is_in) { ++ /* ++ * IN transfers in Slave mode require an explicit disable to ++ * halt the channel. (In DMA mode, this call simply releases ++ * the channel.) ++ */ ++ halt_channel(hcd, hc, qtd, halt_status); ++ } else { ++ /* ++ * The channel is automatically disabled by the core for OUT ++ * transfers in Slave mode. ++ */ ++ release_channel(hcd, hc, qtd, halt_status); ++ } ++} ++ ++/** ++ * Performs common cleanup for periodic transfers after a Transfer Complete ++ * interrupt. This function should be called after any endpoint type specific ++ * handling is finished to release the host channel. ++ */ ++static void complete_periodic_xfer(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_halt_status_e halt_status) ++{ ++ hctsiz_data_t hctsiz; ++ qtd->error_count = 0; ++ ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ if (!hc->ep_is_in || hctsiz.b.pktcnt == 0) { ++ /* Core halts channel in these cases. */ ++ release_channel(hcd, hc, qtd, halt_status); ++ } else { ++ /* Flush any outstanding requests from the Tx queue. */ ++ halt_channel(hcd, hc, qtd, halt_status); ++ } ++} ++ ++static int32_t handle_xfercomp_isoc_split_in(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ uint32_t len; ++ struct dwc_otg_hcd_iso_packet_desc *frame_desc; ++ frame_desc = &qtd->urb->iso_descs[qtd->isoc_frame_index]; ++ ++ len = get_actual_xfer_length(hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_COMPLETE, NULL); ++ ++ if (!len) { ++ qtd->complete_split = 0; ++ qtd->isoc_split_offset = 0; ++ return 0; ++ } ++ frame_desc->actual_length += len; ++ ++ if (hc->align_buff && len) ++ dwc_memcpy(qtd->urb->buf + frame_desc->offset + ++ qtd->isoc_split_offset, hc->qh->dw_align_buf, len); ++ qtd->isoc_split_offset += len; ++ ++ if (frame_desc->length == frame_desc->actual_length) { ++ frame_desc->status = 0; ++ qtd->isoc_frame_index++; ++ qtd->complete_split = 0; ++ qtd->isoc_split_offset = 0; ++ } ++ ++ if (qtd->isoc_frame_index == qtd->urb->packet_count) { ++ hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0); ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE); ++ } else { ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS); ++ } ++ ++ return 1; /* Indicates that channel released */ ++} ++ ++/** ++ * Handles a host channel Transfer Complete interrupt. This handler may be ++ * called in either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_xfercomp_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ int urb_xfer_done; ++ dwc_otg_halt_status_e halt_status = DWC_OTG_HC_XFER_COMPLETE; ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ int pipe_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info); ++ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Transfer Complete--\n", hc->hc_num); ++ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, halt_status); ++ if (pipe_type == UE_ISOCHRONOUS) { ++ /* Do not disable the interrupt, just clear it */ ++ clear_hc_int(hc_regs, xfercomp); ++ return 1; ++ } ++ goto handle_xfercomp_done; ++ } ++ ++ /* ++ * Handle xfer complete on CSPLIT. ++ */ ++ ++ if (hc->qh->do_split) { ++ if ((hc->ep_type == DWC_OTG_EP_TYPE_ISOC) && hc->ep_is_in ++ && hcd->core_if->dma_enable) { ++ if (qtd->complete_split ++ && handle_xfercomp_isoc_split_in(hcd, hc, hc_regs, ++ qtd)) ++ goto handle_xfercomp_done; ++ } else { ++ qtd->complete_split = 0; ++ } ++ } ++ ++ /* Update the QTD and URB states. */ ++ switch (pipe_type) { ++ case UE_CONTROL: ++ switch (qtd->control_phase) { ++ case DWC_OTG_CONTROL_SETUP: ++ if (urb->length > 0) { ++ qtd->control_phase = DWC_OTG_CONTROL_DATA; ++ } else { ++ qtd->control_phase = DWC_OTG_CONTROL_STATUS; ++ } ++ DWC_DEBUGPL(DBG_HCDV, ++ " Control setup transaction done\n"); ++ halt_status = DWC_OTG_HC_XFER_COMPLETE; ++ break; ++ case DWC_OTG_CONTROL_DATA:{ ++ urb_xfer_done = ++ update_urb_state_xfer_comp(hc, hc_regs, urb, ++ qtd); ++ if (urb_xfer_done) { ++ qtd->control_phase = ++ DWC_OTG_CONTROL_STATUS; ++ DWC_DEBUGPL(DBG_HCDV, ++ " Control data transfer done\n"); ++ } else { ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ } ++ halt_status = DWC_OTG_HC_XFER_COMPLETE; ++ break; ++ } ++ case DWC_OTG_CONTROL_STATUS: ++ DWC_DEBUGPL(DBG_HCDV, " Control transfer complete\n"); ++ if (urb->status == -DWC_E_IN_PROGRESS) { ++ urb->status = 0; ++ } ++ hcd->fops->complete(hcd, urb->priv, urb, urb->status); ++ halt_status = DWC_OTG_HC_XFER_URB_COMPLETE; ++ break; ++ } ++ ++ complete_non_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status); ++ break; ++ case UE_BULK: ++ DWC_DEBUGPL(DBG_HCDV, " Bulk transfer complete\n"); ++ urb_xfer_done = ++ update_urb_state_xfer_comp(hc, hc_regs, urb, qtd); ++ if (urb_xfer_done) { ++ hcd->fops->complete(hcd, urb->priv, urb, urb->status); ++ halt_status = DWC_OTG_HC_XFER_URB_COMPLETE; ++ } else { ++ halt_status = DWC_OTG_HC_XFER_COMPLETE; ++ } ++ ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ complete_non_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status); ++ break; ++ case UE_INTERRUPT: ++ DWC_DEBUGPL(DBG_HCDV, " Interrupt transfer complete\n"); ++ urb_xfer_done = ++ update_urb_state_xfer_comp(hc, hc_regs, urb, qtd); ++ ++ /* ++ * Interrupt URB is done on the first transfer complete ++ * interrupt. ++ */ ++ if (urb_xfer_done) { ++ hcd->fops->complete(hcd, urb->priv, urb, urb->status); ++ halt_status = DWC_OTG_HC_XFER_URB_COMPLETE; ++ } else { ++ halt_status = DWC_OTG_HC_XFER_COMPLETE; ++ } ++ ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ complete_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status); ++ break; ++ case UE_ISOCHRONOUS: ++ DWC_DEBUGPL(DBG_HCDV, " Isochronous transfer complete\n"); ++ if (qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_ALL) { ++ halt_status = ++ update_isoc_urb_state(hcd, hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_COMPLETE); ++ } ++ complete_periodic_xfer(hcd, hc, hc_regs, qtd, halt_status); ++ break; ++ } ++ ++handle_xfercomp_done: ++ disable_hc_int(hc_regs, xfercompl); ++ ++ return 1; ++} ++ ++/** ++ * Handles a host channel STALL interrupt. This handler may be called in ++ * either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_stall_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ int pipe_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info); ++ ++ DWC_DEBUGPL(DBG_HCD, "--Host Channel %d Interrupt: " ++ "STALL Received--\n", hc->hc_num); ++ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, DWC_OTG_HC_XFER_STALL); ++ goto handle_stall_done; ++ } ++ ++ if (pipe_type == UE_CONTROL) { ++ hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_PIPE); ++ } ++ ++ if (pipe_type == UE_BULK || pipe_type == UE_INTERRUPT) { ++ hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_PIPE); ++ /* ++ * USB protocol requires resetting the data toggle for bulk ++ * and interrupt endpoints when a CLEAR_FEATURE(ENDPOINT_HALT) ++ * setup command is issued to the endpoint. Anticipate the ++ * CLEAR_FEATURE command since a STALL has occurred and reset ++ * the data toggle now. ++ */ ++ hc->qh->data_toggle = 0; ++ } ++ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_STALL); ++ ++handle_stall_done: ++ disable_hc_int(hc_regs, stall); ++ ++ return 1; ++} ++ ++/* ++ * Updates the state of the URB when a transfer has been stopped due to an ++ * abnormal condition before the transfer completes. Modifies the ++ * actual_length field of the URB to reflect the number of bytes that have ++ * actually been transferred via the host channel. ++ */ ++static void update_urb_state_xfer_intr(dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_hcd_urb_t * urb, ++ dwc_otg_qtd_t * qtd, ++ dwc_otg_halt_status_e halt_status) ++{ ++ uint32_t bytes_transferred = get_actual_xfer_length(hc, hc_regs, qtd, ++ halt_status, NULL); ++ /* non DWORD-aligned buffer case handling. */ ++ if (hc->align_buff && bytes_transferred && hc->ep_is_in) { ++ dwc_memcpy(urb->buf + urb->actual_length, hc->qh->dw_align_buf, ++ bytes_transferred); ++ } ++ ++ urb->actual_length += bytes_transferred; ++ ++#ifdef DEBUG ++ { ++ hctsiz_data_t hctsiz; ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ DWC_DEBUGPL(DBG_HCDV, "DWC_otg: %s: %s, channel %d\n", ++ __func__, (hc->ep_is_in ? "IN" : "OUT"), ++ hc->hc_num); ++ DWC_DEBUGPL(DBG_HCDV, " hc->start_pkt_count %d\n", ++ hc->start_pkt_count); ++ DWC_DEBUGPL(DBG_HCDV, " hctsiz.pktcnt %d\n", hctsiz.b.pktcnt); ++ DWC_DEBUGPL(DBG_HCDV, " hc->max_packet %d\n", hc->max_packet); ++ DWC_DEBUGPL(DBG_HCDV, " bytes_transferred %d\n", ++ bytes_transferred); ++ DWC_DEBUGPL(DBG_HCDV, " urb->actual_length %d\n", ++ urb->actual_length); ++ DWC_DEBUGPL(DBG_HCDV, " urb->transfer_buffer_length %d\n", ++ urb->length); ++ } ++#endif ++} ++ ++/** ++ * Handles a host channel NAK interrupt. This handler may be called in either ++ * DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_nak_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "NAK Received--\n", hc->hc_num); ++ ++ /* ++ * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and ++ * interrupt. Re-start the SSPLIT transfer. ++ */ ++ if (hc->do_split) { ++ if (hc->complete_split) { ++ qtd->error_count = 0; ++ } ++ qtd->complete_split = 0; ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK); ++ goto handle_nak_done; ++ } ++ ++ switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) { ++ case UE_CONTROL: ++ case UE_BULK: ++ if (hcd->core_if->dma_enable && hc->ep_is_in) { ++ /* ++ * NAK interrupts are enabled on bulk/control IN ++ * transfers in DMA mode for the sole purpose of ++ * resetting the error count after a transaction error ++ * occurs. The core will continue transferring data. ++ */ ++ qtd->error_count = 0; ++ goto handle_nak_done; ++ } ++ ++ /* ++ * NAK interrupts normally occur during OUT transfers in DMA ++ * or Slave mode. For IN transfers, more requests will be ++ * queued as request queue space is available. ++ */ ++ qtd->error_count = 0; ++ ++ if (!hc->qh->ping_state) { ++ update_urb_state_xfer_intr(hc, hc_regs, ++ qtd->urb, qtd, ++ DWC_OTG_HC_XFER_NAK); ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ ++ if (hc->speed == DWC_OTG_EP_SPEED_HIGH) ++ hc->qh->ping_state = 1; ++ } ++ ++ /* ++ * Halt the channel so the transfer can be re-started from ++ * the appropriate point or the PING protocol will ++ * start/continue. ++ */ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK); ++ break; ++ case UE_INTERRUPT: ++ qtd->error_count = 0; ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NAK); ++ break; ++ case UE_ISOCHRONOUS: ++ /* Should never get called for isochronous transfers. */ ++ DWC_ASSERT(1, "NACK interrupt for ISOC transfer\n"); ++ break; ++ } ++ ++handle_nak_done: ++ disable_hc_int(hc_regs, nak); ++ ++ return 1; ++} ++ ++/** ++ * Handles a host channel ACK interrupt. This interrupt is enabled when ++ * performing the PING protocol in Slave mode, when errors occur during ++ * either Slave mode or DMA mode, and during Start Split transactions. ++ */ ++static int32_t handle_hc_ack_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "ACK Received--\n", hc->hc_num); ++ ++ if (hc->do_split) { ++ /* ++ * Handle ACK on SSPLIT. ++ * ACK should not occur in CSPLIT. ++ */ ++ if (!hc->ep_is_in && hc->data_pid_start != DWC_OTG_HC_PID_SETUP) { ++ qtd->ssplit_out_xfer_count = hc->xfer_len; ++ } ++ if (!(hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in)) { ++ /* Don't need complete for isochronous out transfers. */ ++ qtd->complete_split = 1; ++ } ++ ++ /* ISOC OUT */ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in) { ++ switch (hc->xact_pos) { ++ case DWC_HCSPLIT_XACTPOS_ALL: ++ break; ++ case DWC_HCSPLIT_XACTPOS_END: ++ qtd->isoc_split_pos = DWC_HCSPLIT_XACTPOS_ALL; ++ qtd->isoc_split_offset = 0; ++ break; ++ case DWC_HCSPLIT_XACTPOS_BEGIN: ++ case DWC_HCSPLIT_XACTPOS_MID: ++ /* ++ * For BEGIN or MID, calculate the length for ++ * the next microframe to determine the correct ++ * SSPLIT token, either MID or END. ++ */ ++ { ++ struct dwc_otg_hcd_iso_packet_desc ++ *frame_desc; ++ ++ frame_desc = ++ &qtd->urb-> ++ iso_descs[qtd->isoc_frame_index]; ++ qtd->isoc_split_offset += 188; ++ ++ if ((frame_desc->length - ++ qtd->isoc_split_offset) <= 188) { ++ qtd->isoc_split_pos = ++ DWC_HCSPLIT_XACTPOS_END; ++ } else { ++ qtd->isoc_split_pos = ++ DWC_HCSPLIT_XACTPOS_MID; ++ } ++ ++ } ++ break; ++ } ++ } else { ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK); ++ } ++ } else { ++ qtd->error_count = 0; ++ ++ if (hc->qh->ping_state) { ++ hc->qh->ping_state = 0; ++ /* ++ * Halt the channel so the transfer can be re-started ++ * from the appropriate point. This only happens in ++ * Slave mode. In DMA mode, the ping_state is cleared ++ * when the transfer is started because the core ++ * automatically executes the PING, then the transfer. ++ */ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK); ++ } ++ } ++ ++ /* ++ * If the ACK occurred when _not_ in the PING state, let the channel ++ * continue transferring data after clearing the error count. ++ */ ++ ++ disable_hc_int(hc_regs, ack); ++ ++ return 1; ++} ++ ++/** ++ * Handles a host channel NYET interrupt. This interrupt should only occur on ++ * Bulk and Control OUT endpoints and for complete split transactions. If a ++ * NYET occurs at the same time as a Transfer Complete interrupt, it is ++ * handled in the xfercomp interrupt handler, not here. This handler may be ++ * called in either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_nyet_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "NYET Received--\n", hc->hc_num); ++ ++ /* ++ * NYET on CSPLIT ++ * re-do the CSPLIT immediately on non-periodic ++ */ ++ if (hc->do_split && hc->complete_split) { ++ if (hc->ep_is_in && (hc->ep_type == DWC_OTG_EP_TYPE_ISOC) ++ && hcd->core_if->dma_enable) { ++ qtd->complete_split = 0; ++ qtd->isoc_split_offset = 0; ++ if (++qtd->isoc_frame_index == qtd->urb->packet_count) { ++ hcd->fops->complete(hcd, qtd->urb->priv, qtd->urb, 0); ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_URB_COMPLETE); ++ } ++ else ++ release_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NO_HALT_STATUS); ++ goto handle_nyet_done; ++ } ++ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ int frnum = dwc_otg_hcd_get_frame_number(hcd); ++ ++ if (dwc_full_frame_num(frnum) != ++ dwc_full_frame_num(hc->qh->sched_frame)) { ++ /* ++ * No longer in the same full speed frame. ++ * Treat this as a transaction error. ++ */ ++#if 0 ++ /** @todo Fix system performance so this can ++ * be treated as an error. Right now complete ++ * splits cannot be scheduled precisely enough ++ * due to other system activity, so this error ++ * occurs regularly in Slave mode. ++ */ ++ qtd->error_count++; ++#endif ++ qtd->complete_split = 0; ++ halt_channel(hcd, hc, qtd, ++ DWC_OTG_HC_XFER_XACT_ERR); ++ /** @todo add support for isoc release */ ++ goto handle_nyet_done; ++ } ++ } ++ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET); ++ goto handle_nyet_done; ++ } ++ ++ hc->qh->ping_state = 1; ++ qtd->error_count = 0; ++ ++ update_urb_state_xfer_intr(hc, hc_regs, qtd->urb, qtd, ++ DWC_OTG_HC_XFER_NYET); ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ ++ /* ++ * Halt the channel and re-start the transfer so the PING ++ * protocol will start. ++ */ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_NYET); ++ ++handle_nyet_done: ++ disable_hc_int(hc_regs, nyet); ++ return 1; ++} ++ ++/** ++ * Handles a host channel babble interrupt. This handler may be called in ++ * either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_babble_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Babble Error--\n", hc->hc_num); ++ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, ++ DWC_OTG_HC_XFER_BABBLE_ERR); ++ goto handle_babble_done; ++ } ++ ++ if (hc->ep_type != DWC_OTG_EP_TYPE_ISOC) { ++ hcd->fops->complete(hcd, qtd->urb->priv, ++ qtd->urb, -DWC_E_OVERFLOW); ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_BABBLE_ERR); ++ } else { ++ dwc_otg_halt_status_e halt_status; ++ halt_status = update_isoc_urb_state(hcd, hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_BABBLE_ERR); ++ halt_channel(hcd, hc, qtd, halt_status); ++ } ++ ++handle_babble_done: ++ disable_hc_int(hc_regs, bblerr); ++ return 1; ++} ++ ++/** ++ * Handles a host channel AHB error interrupt. This handler is only called in ++ * DMA mode. ++ */ ++static int32_t handle_hc_ahberr_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ hcchar_data_t hcchar; ++ hcsplt_data_t hcsplt; ++ hctsiz_data_t hctsiz; ++ uint32_t hcdma; ++ char *pipetype, *speed; ++ ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "AHB Error--\n", hc->hc_num); ++ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt); ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ hcdma = DWC_READ_REG32(&hc_regs->hcdma); ++ ++ DWC_ERROR("AHB ERROR, Channel %d\n", hc->hc_num); ++ DWC_ERROR(" hcchar 0x%08x, hcsplt 0x%08x\n", hcchar.d32, hcsplt.d32); ++ DWC_ERROR(" hctsiz 0x%08x, hcdma 0x%08x\n", hctsiz.d32, hcdma); ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Enqueue\n"); ++ DWC_ERROR(" Device address: %d\n", ++ dwc_otg_hcd_get_dev_addr(&urb->pipe_info)); ++ DWC_ERROR(" Endpoint: %d, %s\n", ++ dwc_otg_hcd_get_ep_num(&urb->pipe_info), ++ (dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT")); ++ ++ switch (dwc_otg_hcd_get_pipe_type(&urb->pipe_info)) { ++ case UE_CONTROL: ++ pipetype = "CONTROL"; ++ break; ++ case UE_BULK: ++ pipetype = "BULK"; ++ break; ++ case UE_INTERRUPT: ++ pipetype = "INTERRUPT"; ++ break; ++ case UE_ISOCHRONOUS: ++ pipetype = "ISOCHRONOUS"; ++ break; ++ default: ++ pipetype = "UNKNOWN"; ++ break; ++ } ++ ++ DWC_ERROR(" Endpoint type: %s\n", pipetype); ++ ++ switch (hc->speed) { ++ case DWC_OTG_EP_SPEED_HIGH: ++ speed = "HIGH"; ++ break; ++ case DWC_OTG_EP_SPEED_FULL: ++ speed = "FULL"; ++ break; ++ case DWC_OTG_EP_SPEED_LOW: ++ speed = "LOW"; ++ break; ++ default: ++ speed = "UNKNOWN"; ++ break; ++ }; ++ ++ DWC_ERROR(" Speed: %s\n", speed); ++ ++ DWC_ERROR(" Max packet size: %d\n", ++ dwc_otg_hcd_get_mps(&urb->pipe_info)); ++ DWC_ERROR(" Data buffer length: %d\n", urb->length); ++ DWC_ERROR(" Transfer buffer: %p, Transfer DMA: %p\n", ++ urb->buf, (void *)urb->dma); ++ DWC_ERROR(" Setup buffer: %p, Setup DMA: %p\n", ++ urb->setup_packet, (void *)urb->setup_dma); ++ DWC_ERROR(" Interval: %d\n", urb->interval); ++ ++ /* Core haltes the channel for Descriptor DMA mode */ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, ++ DWC_OTG_HC_XFER_AHB_ERR); ++ goto handle_ahberr_done; ++ } ++ ++ hcd->fops->complete(hcd, urb->priv, urb, -DWC_E_IO); ++ ++ /* ++ * Force a channel halt. Don't call halt_channel because that won't ++ * write to the HCCHARn register in DMA mode to force the halt. ++ */ ++ dwc_otg_hc_halt(hcd->core_if, hc, DWC_OTG_HC_XFER_AHB_ERR); ++handle_ahberr_done: ++ disable_hc_int(hc_regs, ahberr); ++ return 1; ++} ++ ++/** ++ * Handles a host channel transaction error interrupt. This handler may be ++ * called in either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_xacterr_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Transaction Error--\n", hc->hc_num); ++ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, ++ DWC_OTG_HC_XFER_XACT_ERR); ++ goto handle_xacterr_done; ++ } ++ ++ switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) { ++ case UE_CONTROL: ++ case UE_BULK: ++ qtd->error_count++; ++ if (!hc->qh->ping_state) { ++ ++ update_urb_state_xfer_intr(hc, hc_regs, ++ qtd->urb, qtd, ++ DWC_OTG_HC_XFER_XACT_ERR); ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ if (!hc->ep_is_in && hc->speed == DWC_OTG_EP_SPEED_HIGH) { ++ hc->qh->ping_state = 1; ++ } ++ } ++ ++ /* ++ * Halt the channel so the transfer can be re-started from ++ * the appropriate point or the PING protocol will start. ++ */ ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ break; ++ case UE_INTERRUPT: ++ qtd->error_count++; ++ if (hc->do_split && hc->complete_split) { ++ qtd->complete_split = 0; ++ } ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ break; ++ case UE_ISOCHRONOUS: ++ { ++ dwc_otg_halt_status_e halt_status; ++ halt_status = ++ update_isoc_urb_state(hcd, hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_XACT_ERR); ++ ++ halt_channel(hcd, hc, qtd, halt_status); ++ } ++ break; ++ } ++handle_xacterr_done: ++ disable_hc_int(hc_regs, xacterr); ++ ++ return 1; ++} ++ ++/** ++ * Handles a host channel frame overrun interrupt. This handler may be called ++ * in either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_frmovrun_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Frame Overrun--\n", hc->hc_num); ++ ++ switch (dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) { ++ case UE_CONTROL: ++ case UE_BULK: ++ break; ++ case UE_INTERRUPT: ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_FRAME_OVERRUN); ++ break; ++ case UE_ISOCHRONOUS: ++ { ++ dwc_otg_halt_status_e halt_status; ++ halt_status = ++ update_isoc_urb_state(hcd, hc, hc_regs, qtd, ++ DWC_OTG_HC_XFER_FRAME_OVERRUN); ++ ++ halt_channel(hcd, hc, qtd, halt_status); ++ } ++ break; ++ } ++ ++ disable_hc_int(hc_regs, frmovrun); ++ ++ return 1; ++} ++ ++/** ++ * Handles a host channel data toggle error interrupt. This handler may be ++ * called in either DMA mode or Slave mode. ++ */ ++static int32_t handle_hc_datatglerr_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Data Toggle Error--\n", hc->hc_num); ++ ++ if (hc->ep_is_in) { ++ qtd->error_count = 0; ++ } else { ++ DWC_ERROR("Data Toggle Error on OUT transfer," ++ "channel %d\n", hc->hc_num); ++ } ++ ++ disable_hc_int(hc_regs, datatglerr); ++ ++ return 1; ++} ++ ++#ifdef DEBUG ++/** ++ * This function is for debug only. It checks that a valid halt status is set ++ * and that HCCHARn.chdis is clear. If there's a problem, corrective action is ++ * taken and a warning is issued. ++ * @return 1 if halt status is ok, 0 otherwise. ++ */ ++static inline int halt_status_ok(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ hcchar_data_t hcchar; ++ hctsiz_data_t hctsiz; ++ hcint_data_t hcint; ++ hcintmsk_data_t hcintmsk; ++ hcsplt_data_t hcsplt; ++ ++ if (hc->halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS) { ++ /* ++ * This code is here only as a check. This condition should ++ * never happen. Ignore the halt if it does occur. ++ */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ hctsiz.d32 = DWC_READ_REG32(&hc_regs->hctsiz); ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); ++ hcsplt.d32 = DWC_READ_REG32(&hc_regs->hcsplt); ++ DWC_WARN ++ ("%s: hc->halt_status == DWC_OTG_HC_XFER_NO_HALT_STATUS, " ++ "channel %d, hcchar 0x%08x, hctsiz 0x%08x, " ++ "hcint 0x%08x, hcintmsk 0x%08x, " ++ "hcsplt 0x%08x, qtd->complete_split %d\n", __func__, ++ hc->hc_num, hcchar.d32, hctsiz.d32, hcint.d32, ++ hcintmsk.d32, hcsplt.d32, qtd->complete_split); ++ ++ DWC_WARN("%s: no halt status, channel %d, ignoring interrupt\n", ++ __func__, hc->hc_num); ++ DWC_WARN("\n"); ++ clear_hc_int(hc_regs, chhltd); ++ return 0; ++ } ++ ++ /* ++ * This code is here only as a check. hcchar.chdis should ++ * never be set when the halt interrupt occurs. Halt the ++ * channel again if it does occur. ++ */ ++ hcchar.d32 = DWC_READ_REG32(&hc_regs->hcchar); ++ if (hcchar.b.chdis) { ++ DWC_WARN("%s: hcchar.chdis set unexpectedly, " ++ "hcchar 0x%08x, trying to halt again\n", ++ __func__, hcchar.d32); ++ clear_hc_int(hc_regs, chhltd); ++ hc->halt_pending = 0; ++ halt_channel(hcd, hc, qtd, hc->halt_status); ++ return 0; ++ } ++ ++ return 1; ++} ++#endif ++ ++/** ++ * Handles a host Channel Halted interrupt in DMA mode. This handler ++ * determines the reason the channel halted and proceeds accordingly. ++ */ ++static void handle_hc_chhltd_intr_dma(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ hcint_data_t hcint; ++ hcintmsk_data_t hcintmsk; ++ int out_nak_enh = 0; ++ ++ /* For core with OUT NAK enhancement, the flow for high- ++ * speed CONTROL/BULK OUT is handled a little differently. ++ */ ++ if (hcd->core_if->snpsid >= OTG_CORE_REV_2_71a) { ++ if (hc->speed == DWC_OTG_EP_SPEED_HIGH && !hc->ep_is_in && ++ (hc->ep_type == DWC_OTG_EP_TYPE_CONTROL || ++ hc->ep_type == DWC_OTG_EP_TYPE_BULK)) { ++ out_nak_enh = 1; ++ } ++ } ++ ++ if (hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE || ++ (hc->halt_status == DWC_OTG_HC_XFER_AHB_ERR ++ && !hcd->core_if->dma_desc_enable)) { ++ /* ++ * Just release the channel. A dequeue can happen on a ++ * transfer timeout. In the case of an AHB Error, the channel ++ * was forced to halt because there's no way to gracefully ++ * recover. ++ */ ++ if (hcd->core_if->dma_desc_enable) ++ dwc_otg_hcd_complete_xfer_ddma(hcd, hc, hc_regs, ++ hc->halt_status); ++ else ++ release_channel(hcd, hc, qtd, hc->halt_status); ++ return; ++ } ++ ++ /* Read the HCINTn register to determine the cause for the halt. */ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); ++ ++ if (hcint.b.xfercomp) { ++ /** @todo This is here because of a possible hardware bug. Spec ++ * says that on SPLIT-ISOC OUT transfers in DMA mode that a HALT ++ * interrupt w/ACK bit set should occur, but I only see the ++ * XFERCOMP bit, even with it masked out. This is a workaround ++ * for that behavior. Should fix this when hardware is fixed. ++ */ ++ if (hc->ep_type == DWC_OTG_EP_TYPE_ISOC && !hc->ep_is_in) { ++ handle_hc_ack_intr(hcd, hc, hc_regs, qtd); ++ } ++ handle_hc_xfercomp_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.stall) { ++ handle_hc_stall_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.xacterr && !hcd->core_if->dma_desc_enable) { ++ if (out_nak_enh) { ++ if (hcint.b.nyet || hcint.b.nak || hcint.b.ack) { ++ DWC_DEBUGPL(DBG_HCD, "XactErr with NYET/NAK/ACK\n"); ++ qtd->error_count = 0; ++ } else { ++ DWC_DEBUGPL(DBG_HCD, "XactErr without NYET/NAK/ACK\n"); ++ } ++ } ++ ++ /* ++ * Must handle xacterr before nak or ack. Could get a xacterr ++ * at the same time as either of these on a BULK/CONTROL OUT ++ * that started with a PING. The xacterr takes precedence. ++ */ ++ handle_hc_xacterr_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.xcs_xact && hcd->core_if->dma_desc_enable) { ++ handle_hc_xacterr_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.ahberr && hcd->core_if->dma_desc_enable) { ++ handle_hc_ahberr_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.bblerr) { ++ handle_hc_babble_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.frmovrun) { ++ handle_hc_frmovrun_intr(hcd, hc, hc_regs, qtd); ++ } else if (!out_nak_enh) { ++ if (hcint.b.nyet) { ++ /* ++ * Must handle nyet before nak or ack. Could get a nyet at the ++ * same time as either of those on a BULK/CONTROL OUT that ++ * started with a PING. The nyet takes precedence. ++ */ ++ handle_hc_nyet_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.nak && !hcintmsk.b.nak) { ++ /* ++ * If nak is not masked, it's because a non-split IN transfer ++ * is in an error state. In that case, the nak is handled by ++ * the nak interrupt handler, not here. Handle nak here for ++ * BULK/CONTROL OUT transfers, which halt on a NAK to allow ++ * rewinding the buffer pointer. ++ */ ++ handle_hc_nak_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.ack && !hcintmsk.b.ack) { ++ /* ++ * If ack is not masked, it's because a non-split IN transfer ++ * is in an error state. In that case, the ack is handled by ++ * the ack interrupt handler, not here. Handle ack here for ++ * split transfers. Start splits halt on ACK. ++ */ ++ handle_hc_ack_intr(hcd, hc, hc_regs, qtd); ++ } else { ++ if (hc->ep_type == DWC_OTG_EP_TYPE_INTR || ++ hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * A periodic transfer halted with no other channel ++ * interrupts set. Assume it was halted by the core ++ * because it could not be completed in its scheduled ++ * (micro)frame. ++ */ ++#ifdef DEBUG ++ DWC_PRINTF ++ ("%s: Halt channel %d (assume incomplete periodic transfer)\n", ++ __func__, hc->hc_num); ++#endif ++ halt_channel(hcd, hc, qtd, ++ DWC_OTG_HC_XFER_PERIODIC_INCOMPLETE); ++ } else { ++ DWC_ERROR ++ ("%s: Channel %d, DMA Mode -- ChHltd set, but reason " ++ "for halting is unknown, hcint 0x%08x, intsts 0x%08x\n", ++ __func__, hc->hc_num, hcint.d32, ++ DWC_READ_REG32(&hcd-> ++ core_if->core_global_regs-> ++ gintsts)); ++ } ++ ++ } ++ } else { ++ DWC_PRINTF("NYET/NAK/ACK/other in non-error case, 0x%08x\n", ++ hcint.d32); ++ } ++} ++ ++/** ++ * Handles a host channel Channel Halted interrupt. ++ * ++ * In slave mode, this handler is called only when the driver specifically ++ * requests a halt. This occurs during handling other host channel interrupts ++ * (e.g. nak, xacterr, stall, nyet, etc.). ++ * ++ * In DMA mode, this is the interrupt that occurs when the core has finished ++ * processing a transfer on a channel. Other host channel interrupts (except ++ * ahberr) are disabled in DMA mode. ++ */ ++static int32_t handle_hc_chhltd_intr(dwc_otg_hcd_t * hcd, ++ dwc_hc_t * hc, ++ dwc_otg_hc_regs_t * hc_regs, ++ dwc_otg_qtd_t * qtd) ++{ ++ DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " ++ "Channel Halted--\n", hc->hc_num); ++ ++ if (hcd->core_if->dma_enable) { ++ handle_hc_chhltd_intr_dma(hcd, hc, hc_regs, qtd); ++ } else { ++#ifdef DEBUG ++ if (!halt_status_ok(hcd, hc, hc_regs, qtd)) { ++ return 1; ++ } ++#endif ++ release_channel(hcd, hc, qtd, hc->halt_status); ++ } ++ ++ return 1; ++} ++ ++/** Handles interrupt for a specific Host Channel */ ++int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd, uint32_t num) ++{ ++ int retval = 0; ++ hcint_data_t hcint; ++ hcintmsk_data_t hcintmsk; ++ dwc_hc_t *hc; ++ dwc_otg_hc_regs_t *hc_regs; ++ dwc_otg_qtd_t *qtd; ++ ++ DWC_DEBUGPL(DBG_HCDV, "--Host Channel Interrupt--, Channel %d\n", num); ++ ++ hc = dwc_otg_hcd->hc_ptr_array[num]; ++ hc_regs = dwc_otg_hcd->core_if->host_if->hc_regs[num]; ++ qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); ++ ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); ++ DWC_DEBUGPL(DBG_HCDV, ++ " hcint 0x%08x, hcintmsk 0x%08x, hcint&hcintmsk 0x%08x\n", ++ hcint.d32, hcintmsk.d32, (hcint.d32 & hcintmsk.d32)); ++ hcint.d32 = hcint.d32 & hcintmsk.d32; ++ ++ if (!dwc_otg_hcd->core_if->dma_enable) { ++ if (hcint.b.chhltd && hcint.d32 != 0x2) { ++ hcint.b.chhltd = 0; ++ } ++ } ++ ++ if (hcint.b.xfercomp) { ++ retval |= ++ handle_hc_xfercomp_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ /* ++ * If NYET occurred at same time as Xfer Complete, the NYET is ++ * handled by the Xfer Complete interrupt handler. Don't want ++ * to call the NYET interrupt handler in this case. ++ */ ++ hcint.b.nyet = 0; ++ } ++ if (hcint.b.chhltd) { ++ retval |= handle_hc_chhltd_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.ahberr) { ++ retval |= handle_hc_ahberr_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.stall) { ++ retval |= handle_hc_stall_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.nak) { ++ retval |= handle_hc_nak_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.ack) { ++ retval |= handle_hc_ack_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.nyet) { ++ retval |= handle_hc_nyet_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.xacterr) { ++ retval |= handle_hc_xacterr_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.bblerr) { ++ retval |= handle_hc_babble_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.frmovrun) { ++ retval |= ++ handle_hc_frmovrun_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ if (hcint.b.datatglerr) { ++ retval |= ++ handle_hc_datatglerr_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ } ++ ++ return retval; ++} ++ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,893 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_linux.c $ ++ * $Revision: #20 $ ++ * $Date: 2011/10/26 $ ++ * $Change: 1872981 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++ ++/** ++ * @file ++ * ++ * This file contains the implementation of the HCD. In Linux, the HCD ++ * implements the hc_driver API. ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ++#include <../drivers/usb/core/hcd.h> ++#else ++#include ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) ++#define USB_URB_EP_LINKING 1 ++#else ++#define USB_URB_EP_LINKING 0 ++#endif ++ ++#include "dwc_otg_hcd_if.h" ++#include "dwc_otg_dbg.h" ++#include "dwc_otg_driver.h" ++#include "dwc_otg_hcd.h" ++/** ++ * Gets the endpoint number from a _bEndpointAddress argument. The endpoint is ++ * qualified with its direction (possible 32 endpoints per device). ++ */ ++#define dwc_ep_addr_to_endpoint(_bEndpointAddress_) ((_bEndpointAddress_ & USB_ENDPOINT_NUMBER_MASK) | \ ++ ((_bEndpointAddress_ & USB_DIR_IN) != 0) << 4) ++ ++static const char dwc_otg_hcd_name[] = "dwc_otg_hcd"; ++ ++/** @name Linux HC Driver API Functions */ ++/** @{ */ ++/* manage i/o requests, device state */ ++static int dwc_otg_urb_enqueue(struct usb_hcd *hcd, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ struct usb_host_endpoint *ep, ++#endif ++ struct urb *urb, gfp_t mem_flags); ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++static int dwc_otg_urb_dequeue(struct usb_hcd *hcd, struct urb *urb); ++#endif ++#else /* kernels at or post 2.6.30 */ ++static int dwc_otg_urb_dequeue(struct usb_hcd *hcd, ++ struct urb *urb, int status); ++#endif /* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) */ ++ ++static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30) ++static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep); ++#endif ++static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd); ++extern int hcd_start(struct usb_hcd *hcd); ++extern void hcd_stop(struct usb_hcd *hcd); ++static int get_frame_number(struct usb_hcd *hcd); ++extern int hub_status_data(struct usb_hcd *hcd, char *buf); ++extern int hub_control(struct usb_hcd *hcd, ++ u16 typeReq, ++ u16 wValue, u16 wIndex, char *buf, u16 wLength); ++ ++struct wrapper_priv_data { ++ dwc_otg_hcd_t *dwc_otg_hcd; ++}; ++ ++/** @} */ ++ ++static struct hc_driver dwc_otg_hc_driver = { ++ ++ .description = dwc_otg_hcd_name, ++ .product_desc = "DWC OTG Controller", ++ .hcd_priv_size = sizeof(struct wrapper_priv_data), ++ ++ .irq = dwc_otg_hcd_irq, ++ ++ .flags = HCD_MEMORY | HCD_USB2, ++ ++ //.reset = ++ .start = hcd_start, ++ //.suspend = ++ //.resume = ++ .stop = hcd_stop, ++ ++ .urb_enqueue = dwc_otg_urb_enqueue, ++ .urb_dequeue = dwc_otg_urb_dequeue, ++ .endpoint_disable = endpoint_disable, ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30) ++ .endpoint_reset = endpoint_reset, ++#endif ++ .get_frame_number = get_frame_number, ++ ++ .hub_status_data = hub_status_data, ++ .hub_control = hub_control, ++ //.bus_suspend = ++ //.bus_resume = ++}; ++ ++/** Gets the dwc_otg_hcd from a struct usb_hcd */ ++static inline dwc_otg_hcd_t *hcd_to_dwc_otg_hcd(struct usb_hcd *hcd) ++{ ++ struct wrapper_priv_data *p; ++ p = (struct wrapper_priv_data *)(hcd->hcd_priv); ++ return p->dwc_otg_hcd; ++} ++ ++/** Gets the struct usb_hcd that contains a dwc_otg_hcd_t. */ ++static inline struct usb_hcd *dwc_otg_hcd_to_hcd(dwc_otg_hcd_t * dwc_otg_hcd) ++{ ++ return dwc_otg_hcd_get_priv_data(dwc_otg_hcd); ++} ++ ++/** Gets the usb_host_endpoint associated with an URB. */ ++inline struct usb_host_endpoint *dwc_urb_to_endpoint(struct urb *urb) ++{ ++ struct usb_device *dev = urb->dev; ++ int ep_num = usb_pipeendpoint(urb->pipe); ++ ++ if (usb_pipein(urb->pipe)) ++ return dev->ep_in[ep_num]; ++ else ++ return dev->ep_out[ep_num]; ++} ++ ++static int _disconnect(dwc_otg_hcd_t * hcd) ++{ ++ struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd); ++ ++ usb_hcd->self.is_b_host = 0; ++ return 0; ++} ++ ++static int _start(dwc_otg_hcd_t * hcd) ++{ ++ struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd); ++ ++ usb_hcd->self.is_b_host = dwc_otg_hcd_is_b_host(hcd); ++ hcd_start(usb_hcd); ++ ++ return 0; ++} ++ ++static int _hub_info(dwc_otg_hcd_t * hcd, void *urb_handle, uint32_t * hub_addr, ++ uint32_t * port_addr) ++{ ++ struct urb *urb = (struct urb *)urb_handle; ++ struct usb_bus *bus; ++#if 1 //GRAYG - temporary ++ if (NULL == urb_handle) ++ DWC_ERROR("**** %s - NULL URB handle\n", __func__);//GRAYG ++ if (NULL == urb->dev) ++ DWC_ERROR("**** %s - URB has no device\n", __func__);//GRAYG ++ if (NULL == port_addr) ++ DWC_ERROR("**** %s - NULL port_address\n", __func__);//GRAYG ++#endif ++ if (urb->dev->tt) { ++ if (NULL == urb->dev->tt->hub) { ++ DWC_ERROR("**** %s - (URB's transactor has no TT - giving no hub)\n", ++ __func__); //GRAYG ++ //*hub_addr = (u8)usb_pipedevice(urb->pipe); //GRAYG ++ *hub_addr = 0; //GRAYG ++ // we probably shouldn't have a transaction translator if ++ // there's no associated hub? ++ } else { ++ bus = hcd_to_bus(dwc_otg_hcd_to_hcd(hcd)); ++ if (urb->dev->tt->hub == bus->root_hub) ++ *hub_addr = 0; ++ else ++ *hub_addr = urb->dev->tt->hub->devnum; ++ } ++ *port_addr = urb->dev->tt->multi ? urb->dev->ttport : 1; ++ } else { ++ *hub_addr = 0; ++ *port_addr = urb->dev->ttport; ++ } ++ return 0; ++} ++ ++static int _speed(dwc_otg_hcd_t * hcd, void *urb_handle) ++{ ++ struct urb *urb = (struct urb *)urb_handle; ++ return urb->dev->speed; ++} ++ ++static int _get_b_hnp_enable(dwc_otg_hcd_t * hcd) ++{ ++ struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd); ++ return usb_hcd->self.b_hnp_enable; ++} ++ ++static void allocate_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw, ++ struct urb *urb) ++{ ++ hcd_to_bus(hcd)->bandwidth_allocated += bw / urb->interval; ++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { ++ hcd_to_bus(hcd)->bandwidth_isoc_reqs++; ++ } else { ++ hcd_to_bus(hcd)->bandwidth_int_reqs++; ++ } ++} ++ ++static void free_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw, ++ struct urb *urb) ++{ ++ hcd_to_bus(hcd)->bandwidth_allocated -= bw / urb->interval; ++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { ++ hcd_to_bus(hcd)->bandwidth_isoc_reqs--; ++ } else { ++ hcd_to_bus(hcd)->bandwidth_int_reqs--; ++ } ++} ++ ++/** ++ * Sets the final status of an URB and returns it to the device driver. Any ++ * required cleanup of the URB is performed. ++ */ ++static int _complete(dwc_otg_hcd_t * hcd, void *urb_handle, ++ dwc_otg_hcd_urb_t * dwc_otg_urb, int32_t status) ++{ ++ struct urb *urb = (struct urb *)urb_handle; ++ ++ if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { ++ DWC_PRINTF("%s: urb %p, device %d, ep %d %s, status=%d\n", ++ __func__, urb, usb_pipedevice(urb->pipe), ++ usb_pipeendpoint(urb->pipe), ++ usb_pipein(urb->pipe) ? "IN" : "OUT", status); ++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { ++ int i; ++ for (i = 0; i < urb->number_of_packets; i++) { ++ DWC_PRINTF(" ISO Desc %d status: %d\n", ++ i, urb->iso_frame_desc[i].status); ++ } ++ } ++ } ++ ++ urb->actual_length = dwc_otg_hcd_urb_get_actual_length(dwc_otg_urb); ++ /* Convert status value. */ ++ switch (status) { ++ case -DWC_E_PROTOCOL: ++ status = -EPROTO; ++ break; ++ case -DWC_E_IN_PROGRESS: ++ status = -EINPROGRESS; ++ break; ++ case -DWC_E_PIPE: ++ status = -EPIPE; ++ break; ++ case -DWC_E_IO: ++ status = -EIO; ++ break; ++ case -DWC_E_TIMEOUT: ++ status = -ETIMEDOUT; ++ break; ++ case -DWC_E_OVERFLOW: ++ status = -EOVERFLOW; ++ break; ++ default: ++ if (status) { ++ DWC_PRINTF("Uknown urb status %d\n", status); ++ ++ } ++ } ++ ++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { ++ int i; ++ ++ urb->error_count = dwc_otg_hcd_urb_get_error_count(dwc_otg_urb); ++ for (i = 0; i < urb->number_of_packets; ++i) { ++ urb->iso_frame_desc[i].actual_length = ++ dwc_otg_hcd_urb_get_iso_desc_actual_length ++ (dwc_otg_urb, i); ++ urb->iso_frame_desc[i].status = ++ dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_urb, i); ++ } ++ } ++ ++ urb->status = status; ++ urb->hcpriv = NULL; ++ if (!status) { ++ if ((urb->transfer_flags & URB_SHORT_NOT_OK) && ++ (urb->actual_length < urb->transfer_buffer_length)) { ++ urb->status = -EREMOTEIO; ++ } ++ } ++ ++ if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) || ++ (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) { ++ struct usb_host_endpoint *ep = dwc_urb_to_endpoint(urb); ++ if (ep) { ++ free_bus_bandwidth(dwc_otg_hcd_to_hcd(hcd), ++ dwc_otg_hcd_get_ep_bandwidth(hcd, ++ ep->hcpriv), ++ urb); ++ } ++ } ++ ++ DWC_FREE(dwc_otg_urb); ++ ++#if USB_URB_EP_LINKING ++ usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(hcd), urb); ++#endif ++ DWC_SPINUNLOCK(hcd->lock); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb); ++#else ++ usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb, status); ++#endif ++ DWC_SPINLOCK(hcd->lock); ++ ++ return 0; ++} ++ ++static struct dwc_otg_hcd_function_ops hcd_fops = { ++ .start = _start, ++ .disconnect = _disconnect, ++ .hub_info = _hub_info, ++ .speed = _speed, ++ .complete = _complete, ++ .get_b_hnp_enable = _get_b_hnp_enable, ++}; ++ ++/** ++ * Initializes the HCD. This function allocates memory for and initializes the ++ * static parts of the usb_hcd and dwc_otg_hcd structures. It also registers the ++ * USB bus with the core and calls the hc_driver->start() function. It returns ++ * a negative error on failure. ++ */ ++int hcd_init(dwc_bus_dev_t *_dev) ++{ ++ struct usb_hcd *hcd = NULL; ++ dwc_otg_hcd_t *dwc_otg_hcd = NULL; ++ dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); ++ int retval = 0; ++ u64 dmamask; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD INIT otg_dev=%p\n", otg_dev); ++ ++ /* Set device flags indicating whether the HCD supports DMA. */ ++ if (dwc_otg_is_dma_enable(otg_dev->core_if)) ++ dmamask = DMA_BIT_MASK(32); ++ else ++ dmamask = 0; ++ ++#if defined(LM_INTERFACE) || defined(PLATFORM_INTERFACE) ++ dma_set_mask(&_dev->dev, dmamask); ++ dma_set_coherent_mask(&_dev->dev, dmamask); ++#elif defined(PCI_INTERFACE) ++ pci_set_dma_mask(_dev, dmamask); ++ pci_set_consistent_dma_mask(_dev, dmamask); ++#endif ++ ++ /* ++ * Allocate memory for the base HCD plus the DWC OTG HCD. ++ * Initialize the base HCD. ++ */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) ++ hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, _dev->dev.bus_id); ++#else ++ hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, dev_name(&_dev->dev)); ++ hcd->has_tt = 1; ++// hcd->uses_new_polling = 1; ++// hcd->poll_rh = 0; ++#endif ++ if (!hcd) { ++ retval = -ENOMEM; ++ goto error1; ++ } ++ ++ hcd->regs = otg_dev->os_dep.base; ++ ++ /* Initialize the DWC OTG HCD. */ ++ dwc_otg_hcd = dwc_otg_hcd_alloc_hcd(); ++ if (!dwc_otg_hcd) { ++ goto error2; ++ } ++ ((struct wrapper_priv_data *)(hcd->hcd_priv))->dwc_otg_hcd = ++ dwc_otg_hcd; ++ otg_dev->hcd = dwc_otg_hcd; ++ ++ if (dwc_otg_hcd_init(dwc_otg_hcd, otg_dev->core_if)) { ++ goto error2; ++ } ++ ++ otg_dev->hcd->otg_dev = otg_dev; ++ hcd->self.otg_port = dwc_otg_hcd_otg_port(dwc_otg_hcd); ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33) //don't support for LM(with 2.6.20.1 kernel) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) //version field absent later ++ hcd->self.otg_version = dwc_otg_get_otg_version(otg_dev->core_if); ++#endif ++ /* Don't support SG list at this point */ ++ hcd->self.sg_tablesize = 0; ++#endif ++ /* ++ * Finish generic HCD initialization and start the HCD. This function ++ * allocates the DMA buffer pool, registers the USB bus, requests the ++ * IRQ line, and calls hcd_start method. ++ */ ++#ifdef PLATFORM_INTERFACE ++ retval = usb_add_hcd(hcd, platform_get_irq(_dev, 0), IRQF_SHARED | IRQF_DISABLED); ++#else ++ retval = usb_add_hcd(hcd, _dev->irq, IRQF_SHARED | IRQF_DISABLED); ++#endif ++ if (retval < 0) { ++ goto error2; ++ } ++ ++ dwc_otg_hcd_set_priv_data(dwc_otg_hcd, hcd); ++ return 0; ++ ++error2: ++ usb_put_hcd(hcd); ++error1: ++ return retval; ++} ++ ++/** ++ * Removes the HCD. ++ * Frees memory and resources associated with the HCD and deregisters the bus. ++ */ ++void hcd_remove(dwc_bus_dev_t *_dev) ++{ ++ dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); ++ dwc_otg_hcd_t *dwc_otg_hcd; ++ struct usb_hcd *hcd; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD REMOVE otg_dev=%p\n", otg_dev); ++ ++ if (!otg_dev) { ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__); ++ return; ++ } ++ ++ dwc_otg_hcd = otg_dev->hcd; ++ ++ if (!dwc_otg_hcd) { ++ DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__); ++ return; ++ } ++ ++ hcd = dwc_otg_hcd_to_hcd(dwc_otg_hcd); ++ ++ if (!hcd) { ++ DWC_DEBUGPL(DBG_ANY, ++ "%s: dwc_otg_hcd_to_hcd(dwc_otg_hcd) NULL!\n", ++ __func__); ++ return; ++ } ++ usb_remove_hcd(hcd); ++ dwc_otg_hcd_set_priv_data(dwc_otg_hcd, NULL); ++ dwc_otg_hcd_remove(dwc_otg_hcd); ++ usb_put_hcd(hcd); ++} ++ ++/* ========================================================================= ++ * Linux HC Driver Functions ++ * ========================================================================= */ ++ ++/** Initializes the DWC_otg controller and its root hub and prepares it for host ++ * mode operation. Activates the root port. Returns 0 on success and a negative ++ * error code on failure. */ ++int hcd_start(struct usb_hcd *hcd) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ struct usb_bus *bus; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD START\n"); ++ bus = hcd_to_bus(hcd); ++ ++ hcd->state = HC_STATE_RUNNING; ++ if (dwc_otg_hcd_start(dwc_otg_hcd, &hcd_fops)) { ++ return 0; ++ } ++ ++ /* Initialize and connect root hub if one is not already attached */ ++ if (bus->root_hub) { ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD Has Root Hub\n"); ++ /* Inform the HUB driver to resume. */ ++ usb_hcd_resume_root_hub(hcd); ++ } ++ ++ return 0; ++} ++ ++/** ++ * Halts the DWC_otg host mode operations in a clean manner. USB transfers are ++ * stopped. ++ */ ++void hcd_stop(struct usb_hcd *hcd) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ ++ dwc_otg_hcd_stop(dwc_otg_hcd); ++} ++ ++/** Returns the current frame number. */ ++static int get_frame_number(struct usb_hcd *hcd) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ ++ return dwc_otg_hcd_get_frame_number(dwc_otg_hcd); ++} ++ ++#ifdef DEBUG ++static void dump_urb_info(struct urb *urb, char *fn_name) ++{ ++ DWC_PRINTF("%s, urb %p\n", fn_name, urb); ++ DWC_PRINTF(" Device address: %d\n", usb_pipedevice(urb->pipe)); ++ DWC_PRINTF(" Endpoint: %d, %s\n", usb_pipeendpoint(urb->pipe), ++ (usb_pipein(urb->pipe) ? "IN" : "OUT")); ++ DWC_PRINTF(" Endpoint type: %s\n", ( { ++ char *pipetype; ++ switch (usb_pipetype(urb->pipe)) { ++case PIPE_CONTROL: ++pipetype = "CONTROL"; break; case PIPE_BULK: ++pipetype = "BULK"; break; case PIPE_INTERRUPT: ++pipetype = "INTERRUPT"; break; case PIPE_ISOCHRONOUS: ++pipetype = "ISOCHRONOUS"; break; default: ++ pipetype = "UNKNOWN"; break;}; ++ pipetype;} ++ )) ; ++ DWC_PRINTF(" Speed: %s\n", ( { ++ char *speed; switch (urb->dev->speed) { ++case USB_SPEED_HIGH: ++speed = "HIGH"; break; case USB_SPEED_FULL: ++speed = "FULL"; break; case USB_SPEED_LOW: ++speed = "LOW"; break; default: ++ speed = "UNKNOWN"; break;}; ++ speed;} ++ )) ; ++ DWC_PRINTF(" Max packet size: %d\n", ++ usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe))); ++ DWC_PRINTF(" Data buffer length: %d\n", urb->transfer_buffer_length); ++ DWC_PRINTF(" Transfer buffer: %p, Transfer DMA: %p\n", ++ urb->transfer_buffer, (void *)urb->transfer_dma); ++ DWC_PRINTF(" Setup buffer: %p, Setup DMA: %p\n", ++ urb->setup_packet, (void *)urb->setup_dma); ++ DWC_PRINTF(" Interval: %d\n", urb->interval); ++ if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { ++ int i; ++ for (i = 0; i < urb->number_of_packets; i++) { ++ DWC_PRINTF(" ISO Desc %d:\n", i); ++ DWC_PRINTF(" offset: %d, length %d\n", ++ urb->iso_frame_desc[i].offset, ++ urb->iso_frame_desc[i].length); ++ } ++ } ++} ++#endif ++ ++/** Starts processing a USB transfer request specified by a USB Request Block ++ * (URB). mem_flags indicates the type of memory allocation to use while ++ * processing this URB. */ ++static int dwc_otg_urb_enqueue(struct usb_hcd *hcd, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ struct usb_host_endpoint *ep, ++#endif ++ struct urb *urb, gfp_t mem_flags) ++{ ++ int retval = 0; ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) ++ struct usb_host_endpoint *ep = urb->ep; ++#endif ++#if USB_URB_EP_LINKING ++ dwc_irqflags_t irqflags; ++#endif ++ void **ref_ep_hcpriv = &ep->hcpriv; ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ dwc_otg_hcd_urb_t *dwc_otg_urb; ++ int i; ++ int alloc_bandwidth = 0; ++ uint8_t ep_type = 0; ++ uint32_t flags = 0; ++ void *buf; ++ ++#ifdef DEBUG ++ if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { ++ dump_urb_info(urb, "dwc_otg_urb_enqueue"); ++ } ++#endif ++ ++ if (!urb->transfer_buffer && urb->transfer_buffer_length) ++ return -EINVAL; ++ ++ if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) ++ || (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) { ++ if (!dwc_otg_hcd_is_bandwidth_allocated ++ (dwc_otg_hcd, ref_ep_hcpriv)) { ++ alloc_bandwidth = 1; ++ } ++ } ++ ++ switch (usb_pipetype(urb->pipe)) { ++ case PIPE_CONTROL: ++ ep_type = USB_ENDPOINT_XFER_CONTROL; ++ break; ++ case PIPE_ISOCHRONOUS: ++ ep_type = USB_ENDPOINT_XFER_ISOC; ++ break; ++ case PIPE_BULK: ++ ep_type = USB_ENDPOINT_XFER_BULK; ++ break; ++ case PIPE_INTERRUPT: ++ ep_type = USB_ENDPOINT_XFER_INT; ++ break; ++ default: ++ DWC_WARN("Wrong EP type - %d\n", usb_pipetype(urb->pipe)); ++ } ++ ++ /* # of packets is often 0 - do we really need to call this then? */ ++ dwc_otg_urb = dwc_otg_hcd_urb_alloc(dwc_otg_hcd, ++ urb->number_of_packets, ++ mem_flags == GFP_ATOMIC ? 1 : 0); ++ ++ if(dwc_otg_urb == NULL) ++ return -ENOMEM; ++ ++ urb->hcpriv = dwc_otg_urb; ++ if (!dwc_otg_urb && urb->number_of_packets) ++ return -ENOMEM; ++ ++ dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_urb, usb_pipedevice(urb->pipe), ++ usb_pipeendpoint(urb->pipe), ep_type, ++ usb_pipein(urb->pipe), ++ usb_maxpacket(urb->dev, urb->pipe, ++ !(usb_pipein(urb->pipe)))); ++ ++ buf = urb->transfer_buffer; ++ if (hcd->self.uses_dma) { ++ /* ++ * Calculate virtual address from physical address, ++ * because some class driver may not fill transfer_buffer. ++ * In Buffer DMA mode virual address is used, ++ * when handling non DWORD aligned buffers. ++ */ ++ //buf = phys_to_virt(urb->transfer_dma); ++ // DMA addresses are bus addresses not physical addresses! ++ buf = dma_to_virt(&urb->dev->dev, urb->transfer_dma); ++ } ++ ++ if (!(urb->transfer_flags & URB_NO_INTERRUPT)) ++ flags |= URB_GIVEBACK_ASAP; ++ if (urb->transfer_flags & URB_ZERO_PACKET) ++ flags |= URB_SEND_ZERO_PACKET; ++ ++ dwc_otg_hcd_urb_set_params(dwc_otg_urb, urb, buf, ++ urb->transfer_dma, ++ urb->transfer_buffer_length, ++ urb->setup_packet, ++ urb->setup_dma, flags, urb->interval); ++ ++ for (i = 0; i < urb->number_of_packets; ++i) { ++ dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_urb, i, ++ urb-> ++ iso_frame_desc[i].offset, ++ urb-> ++ iso_frame_desc[i].length); ++ } ++ ++#if USB_URB_EP_LINKING ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++ retval = usb_hcd_link_urb_to_ep(hcd, urb); ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); ++ if (0 == retval) ++#endif ++ { ++ retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, ++ /*(dwc_otg_qh_t **)*/ ++ ref_ep_hcpriv, ++ mem_flags == GFP_ATOMIC ? 1 : 0); ++ if (0 == retval) { ++ if (alloc_bandwidth) { ++ allocate_bus_bandwidth(hcd, ++ dwc_otg_hcd_get_ep_bandwidth( ++ dwc_otg_hcd, *ref_ep_hcpriv), ++ urb); ++ } ++ } else { ++#if USB_URB_EP_LINKING ++ dwc_irqflags_t irqflags; ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG dwc_otg_hcd_urb_enqueue failed rc %d\n", retval); ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++ usb_hcd_unlink_urb_from_ep(hcd, urb); ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); ++#endif ++ if (retval == -DWC_E_NO_DEVICE) { ++ retval = -ENODEV; ++ } ++ } ++ } ++ return retval; ++} ++ ++/** Aborts/cancels a USB transfer request. Always returns 0 to indicate ++ * success. */ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++static int dwc_otg_urb_dequeue(struct usb_hcd *hcd, struct urb *urb) ++#else ++static int dwc_otg_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) ++#endif ++{ ++ dwc_irqflags_t flags; ++ dwc_otg_hcd_t *dwc_otg_hcd; ++ int rc; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue\n"); ++ ++ dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ ++#ifdef DEBUG ++ if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { ++ dump_urb_info(urb, "dwc_otg_urb_dequeue"); ++ } ++#endif ++ ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); ++ rc = usb_hcd_check_unlink_urb(hcd, urb, status); ++ if (0 == rc) { ++ if(urb->hcpriv != NULL) { ++ dwc_otg_hcd_urb_dequeue(dwc_otg_hcd, ++ (dwc_otg_hcd_urb_t *)urb->hcpriv); ++ ++ DWC_FREE(urb->hcpriv); ++ urb->hcpriv = NULL; ++ } ++ } ++ ++ if (0 == rc) { ++ /* Higher layer software sets URB status. */ ++#if USB_URB_EP_LINKING ++ usb_hcd_unlink_urb_from_ep(hcd, urb); ++#endif ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ usb_hcd_giveback_urb(hcd, urb); ++#else ++ usb_hcd_giveback_urb(hcd, urb, status); ++#endif ++ if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { ++ DWC_PRINTF("Called usb_hcd_giveback_urb() \n"); ++ DWC_PRINTF(" 1urb->status = %d\n", urb->status); ++ } ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue OK\n"); ++ } else { ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags); ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue failed - rc %d\n", ++ rc); ++ } ++ ++ return rc; ++} ++ ++/* Frees resources in the DWC_otg controller related to a given endpoint. Also ++ * clears state in the HCD related to the endpoint. Any URBs for the endpoint ++ * must already be dequeued. */ ++static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ ++ DWC_DEBUGPL(DBG_HCD, ++ "DWC OTG HCD EP DISABLE: _bEndpointAddress=0x%02x, " ++ "endpoint=%d\n", ep->desc.bEndpointAddress, ++ dwc_ep_addr_to_endpoint(ep->desc.bEndpointAddress)); ++ dwc_otg_hcd_endpoint_disable(dwc_otg_hcd, ep->hcpriv, 250); ++ ep->hcpriv = NULL; ++} ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30) ++/* Resets endpoint specific parameter values, in current version used to reset ++ * the data toggle(as a WA). This function can be called from usb_clear_halt routine */ ++static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep) ++{ ++ dwc_irqflags_t flags; ++ struct usb_device *udev = NULL; ++ int epnum = usb_endpoint_num(&ep->desc); ++ int is_out = usb_endpoint_dir_out(&ep->desc); ++ int is_control = usb_endpoint_xfer_control(&ep->desc); ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ struct device *dev = DWC_OTG_OS_GETDEV(dwc_otg_hcd->otg_dev->os_dep); ++ ++ if (dev) ++ udev = to_usb_device(dev); ++ else ++ return; ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", epnum); ++ ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags); ++ usb_settoggle(udev, epnum, is_out, 0); ++ if (is_control) ++ usb_settoggle(udev, epnum, !is_out, 0); ++ ++ if (ep->hcpriv) { ++ dwc_otg_hcd_endpoint_reset(dwc_otg_hcd, ep->hcpriv); ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags); ++} ++#endif ++ ++/** Handles host mode interrupts for the DWC_otg controller. Returns IRQ_NONE if ++ * there was no interrupt to handle. Returns IRQ_HANDLED if there was a valid ++ * interrupt. ++ * ++ * This function is called by the USB core when an interrupt occurs */ ++static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ int32_t retval = dwc_otg_hcd_handle_intr(dwc_otg_hcd); ++ if (retval != 0) { ++ S3C2410X_CLEAR_EINTPEND(); ++ } ++ return IRQ_RETVAL(retval); ++} ++ ++/** Creates Status Change bitmap for the root hub and root port. The bitmap is ++ * returned in buf. Bit 0 is the status change indicator for the root hub. Bit 1 ++ * is the status change indicator for the single root port. Returns 1 if either ++ * change indicator is 1, otherwise returns 0. */ ++int hub_status_data(struct usb_hcd *hcd, char *buf) ++{ ++ dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); ++ ++ buf[0] = 0; ++ buf[0] |= (dwc_otg_hcd_is_status_changed(dwc_otg_hcd, 1)) << 1; ++ ++ return (buf[0] != 0); ++} ++ ++/** Handles hub class-specific requests. */ ++int hub_control(struct usb_hcd *hcd, ++ u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength) ++{ ++ int retval; ++ ++ retval = dwc_otg_hcd_hub_control(hcd_to_dwc_otg_hcd(hcd), ++ typeReq, wValue, wIndex, buf, wLength); ++ ++ switch (retval) { ++ case -DWC_E_INVALID: ++ retval = -EINVAL; ++ break; ++ } ++ ++ return retval; ++} ++ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,922 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_queue.c $ ++ * $Revision: #44 $ ++ * $Date: 2011/10/26 $ ++ * $Change: 1873028 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_DEVICE_ONLY ++ ++/** ++ * @file ++ * ++ * This file contains the functions to manage Queue Heads and Queue ++ * Transfer Descriptors. ++ */ ++ ++#include "dwc_otg_hcd.h" ++#include "dwc_otg_regs.h" ++ ++extern bool microframe_schedule; ++ ++/** ++ * Free each QTD in the QH's QTD-list then free the QH. QH should already be ++ * removed from a list. QTD list should already be empty if called from URB ++ * Dequeue. ++ * ++ * @param hcd HCD instance. ++ * @param qh The QH to free. ++ */ ++void dwc_otg_hcd_qh_free(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ dwc_otg_qtd_t *qtd, *qtd_tmp; ++ ++ /* Free each QTD in the QTD list */ ++ DWC_SPINLOCK(hcd->lock); ++ DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, &qh->qtd_list, qtd_list_entry) { ++ DWC_CIRCLEQ_REMOVE(&qh->qtd_list, qtd, qtd_list_entry); ++ dwc_otg_hcd_qtd_free(qtd); ++ } ++ ++ if (hcd->core_if->dma_desc_enable) { ++ dwc_otg_hcd_qh_free_ddma(hcd, qh); ++ } else if (qh->dw_align_buf) { ++ uint32_t buf_size; ++ if (qh->ep_type == UE_ISOCHRONOUS) { ++ buf_size = 4096; ++ } else { ++ buf_size = hcd->core_if->core_params->max_transfer_size; ++ } ++ DWC_DMA_FREE(buf_size, qh->dw_align_buf, qh->dw_align_buf_dma); ++ } ++ ++ DWC_FREE(qh); ++ DWC_SPINUNLOCK(hcd->lock); ++ return; ++} ++ ++#define BitStuffTime(bytecount) ((8 * 7* bytecount) / 6) ++#define HS_HOST_DELAY 5 /* nanoseconds */ ++#define FS_LS_HOST_DELAY 1000 /* nanoseconds */ ++#define HUB_LS_SETUP 333 /* nanoseconds */ ++#define NS_TO_US(ns) ((ns + 500) / 1000) ++ /* convert & round nanoseconds to microseconds */ ++ ++static uint32_t calc_bus_time(int speed, int is_in, int is_isoc, int bytecount) ++{ ++ unsigned long retval; ++ ++ switch (speed) { ++ case USB_SPEED_HIGH: ++ if (is_isoc) { ++ retval = ++ ((38 * 8 * 2083) + ++ (2083 * (3 + BitStuffTime(bytecount)))) / 1000 + ++ HS_HOST_DELAY; ++ } else { ++ retval = ++ ((55 * 8 * 2083) + ++ (2083 * (3 + BitStuffTime(bytecount)))) / 1000 + ++ HS_HOST_DELAY; ++ } ++ break; ++ case USB_SPEED_FULL: ++ if (is_isoc) { ++ retval = ++ (8354 * (31 + 10 * BitStuffTime(bytecount))) / 1000; ++ if (is_in) { ++ retval = 7268 + FS_LS_HOST_DELAY + retval; ++ } else { ++ retval = 6265 + FS_LS_HOST_DELAY + retval; ++ } ++ } else { ++ retval = ++ (8354 * (31 + 10 * BitStuffTime(bytecount))) / 1000; ++ retval = 9107 + FS_LS_HOST_DELAY + retval; ++ } ++ break; ++ case USB_SPEED_LOW: ++ if (is_in) { ++ retval = ++ (67667 * (31 + 10 * BitStuffTime(bytecount))) / ++ 1000; ++ retval = ++ 64060 + (2 * HUB_LS_SETUP) + FS_LS_HOST_DELAY + ++ retval; ++ } else { ++ retval = ++ (66700 * (31 + 10 * BitStuffTime(bytecount))) / ++ 1000; ++ retval = ++ 64107 + (2 * HUB_LS_SETUP) + FS_LS_HOST_DELAY + ++ retval; ++ } ++ break; ++ default: ++ DWC_WARN("Unknown device speed\n"); ++ retval = -1; ++ } ++ ++ return NS_TO_US(retval); ++} ++ ++/** ++ * Initializes a QH structure. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh The QH to init. ++ * @param urb Holds the information about the device/endpoint that we need ++ * to initialize the QH. ++ */ ++#define SCHEDULE_SLOP 10 ++void qh_init(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, dwc_otg_hcd_urb_t * urb) ++{ ++ char *speed, *type; ++ int dev_speed; ++ uint32_t hub_addr, hub_port; ++ ++ dwc_memset(qh, 0, sizeof(dwc_otg_qh_t)); ++ ++ /* Initialize QH */ ++ qh->ep_type = dwc_otg_hcd_get_pipe_type(&urb->pipe_info); ++ qh->ep_is_in = dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? 1 : 0; ++ ++ qh->data_toggle = DWC_OTG_HC_PID_DATA0; ++ qh->maxp = dwc_otg_hcd_get_mps(&urb->pipe_info); ++ DWC_CIRCLEQ_INIT(&qh->qtd_list); ++ DWC_LIST_INIT(&qh->qh_list_entry); ++ qh->channel = NULL; ++ ++ /* FS/LS Enpoint on HS Hub ++ * NOT virtual root hub */ ++ dev_speed = hcd->fops->speed(hcd, urb->priv); ++ ++ hcd->fops->hub_info(hcd, urb->priv, &hub_addr, &hub_port); ++ qh->do_split = 0; ++ if (microframe_schedule) ++ qh->speed = dev_speed; ++ ++ ++ if (((dev_speed == USB_SPEED_LOW) || ++ (dev_speed == USB_SPEED_FULL)) && ++ (hub_addr != 0 && hub_addr != 1)) { ++ DWC_DEBUGPL(DBG_HCD, ++ "QH init: EP %d: TT found at hub addr %d, for port %d\n", ++ dwc_otg_hcd_get_ep_num(&urb->pipe_info), hub_addr, ++ hub_port); ++ qh->do_split = 1; ++ } ++ ++ if (qh->ep_type == UE_INTERRUPT || qh->ep_type == UE_ISOCHRONOUS) { ++ /* Compute scheduling parameters once and save them. */ ++ hprt0_data_t hprt; ++ ++ /** @todo Account for split transfers in the bus time. */ ++ int bytecount = ++ dwc_hb_mult(qh->maxp) * dwc_max_packet(qh->maxp); ++ ++ qh->usecs = ++ calc_bus_time((qh->do_split ? USB_SPEED_HIGH : dev_speed), ++ qh->ep_is_in, (qh->ep_type == UE_ISOCHRONOUS), ++ bytecount); ++ /* Start in a slightly future (micro)frame. */ ++ qh->sched_frame = dwc_frame_num_inc(hcd->frame_number, ++ SCHEDULE_SLOP); ++ qh->interval = urb->interval; ++ ++#if 0 ++ /* Increase interrupt polling rate for debugging. */ ++ if (qh->ep_type == UE_INTERRUPT) { ++ qh->interval = 8; ++ } ++#endif ++ hprt.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0); ++ if ((hprt.b.prtspd == DWC_HPRT0_PRTSPD_HIGH_SPEED) && ++ ((dev_speed == USB_SPEED_LOW) || ++ (dev_speed == USB_SPEED_FULL))) { ++ qh->interval *= 8; ++ qh->sched_frame |= 0x7; ++ qh->start_split_frame = qh->sched_frame; ++ } ++ ++ } ++ ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD QH Initialized\n"); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - qh = %p\n", qh); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Device Address = %d\n", ++ dwc_otg_hcd_get_dev_addr(&urb->pipe_info)); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Endpoint %d, %s\n", ++ dwc_otg_hcd_get_ep_num(&urb->pipe_info), ++ dwc_otg_hcd_is_pipe_in(&urb->pipe_info) ? "IN" : "OUT"); ++ switch (dev_speed) { ++ case USB_SPEED_LOW: ++ qh->dev_speed = DWC_OTG_EP_SPEED_LOW; ++ speed = "low"; ++ break; ++ case USB_SPEED_FULL: ++ qh->dev_speed = DWC_OTG_EP_SPEED_FULL; ++ speed = "full"; ++ break; ++ case USB_SPEED_HIGH: ++ qh->dev_speed = DWC_OTG_EP_SPEED_HIGH; ++ speed = "high"; ++ break; ++ default: ++ speed = "?"; ++ break; ++ } ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Speed = %s\n", speed); ++ ++ switch (qh->ep_type) { ++ case UE_ISOCHRONOUS: ++ type = "isochronous"; ++ break; ++ case UE_INTERRUPT: ++ type = "interrupt"; ++ break; ++ case UE_CONTROL: ++ type = "control"; ++ break; ++ case UE_BULK: ++ type = "bulk"; ++ break; ++ default: ++ type = "?"; ++ break; ++ } ++ ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - Type = %s\n", type); ++ ++#ifdef DEBUG ++ if (qh->ep_type == UE_INTERRUPT) { ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - usecs = %d\n", ++ qh->usecs); ++ DWC_DEBUGPL(DBG_HCDV, "DWC OTG HCD QH - interval = %d\n", ++ qh->interval); ++ } ++#endif ++ ++} ++ ++/** ++ * This function allocates and initializes a QH. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param urb Holds the information about the device/endpoint that we need ++ * to initialize the QH. ++ * @param atomic_alloc Flag to do atomic allocation if needed ++ * ++ * @return Returns pointer to the newly allocated QH, or NULL on error. */ ++dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * hcd, ++ dwc_otg_hcd_urb_t * urb, int atomic_alloc) ++{ ++ dwc_otg_qh_t *qh; ++ ++ /* Allocate memory */ ++ /** @todo add memflags argument */ ++ qh = dwc_otg_hcd_qh_alloc(atomic_alloc); ++ if (qh == NULL) { ++ DWC_ERROR("qh allocation failed"); ++ return NULL; ++ } ++ ++ qh_init(hcd, qh, urb); ++ ++ if (hcd->core_if->dma_desc_enable ++ && (dwc_otg_hcd_qh_init_ddma(hcd, qh) < 0)) { ++ dwc_otg_hcd_qh_free(hcd, qh); ++ return NULL; ++ } ++ ++ return qh; ++} ++ ++/* microframe_schedule=0 start */ ++ ++/** ++ * Checks that a channel is available for a periodic transfer. ++ * ++ * @return 0 if successful, negative error code otherise. ++ */ ++static int periodic_channel_available(dwc_otg_hcd_t * hcd) ++{ ++ /* ++ * Currently assuming that there is a dedicated host channnel for each ++ * periodic transaction plus at least one host channel for ++ * non-periodic transactions. ++ */ ++ int status; ++ int num_channels; ++ ++ num_channels = hcd->core_if->core_params->host_channels; ++ if ((hcd->periodic_channels + hcd->non_periodic_channels < num_channels) ++ && (hcd->periodic_channels < num_channels - 1)) { ++ status = 0; ++ } else { ++ DWC_INFO("%s: Total channels: %d, Periodic: %d, Non-periodic: %d\n", ++ __func__, num_channels, hcd->periodic_channels, hcd->non_periodic_channels); //NOTICE ++ status = -DWC_E_NO_SPACE; ++ } ++ ++ return status; ++} ++ ++/** ++ * Checks that there is sufficient bandwidth for the specified QH in the ++ * periodic schedule. For simplicity, this calculation assumes that all the ++ * transfers in the periodic schedule may occur in the same (micro)frame. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh QH containing periodic bandwidth required. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++static int check_periodic_bandwidth(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int status; ++ int16_t max_claimed_usecs; ++ ++ status = 0; ++ ++ if ((qh->dev_speed == DWC_OTG_EP_SPEED_HIGH) || qh->do_split) { ++ /* ++ * High speed mode. ++ * Max periodic usecs is 80% x 125 usec = 100 usec. ++ */ ++ ++ max_claimed_usecs = 100 - qh->usecs; ++ } else { ++ /* ++ * Full speed mode. ++ * Max periodic usecs is 90% x 1000 usec = 900 usec. ++ */ ++ max_claimed_usecs = 900 - qh->usecs; ++ } ++ ++ if (hcd->periodic_usecs > max_claimed_usecs) { ++ DWC_INFO("%s: already claimed usecs %d, required usecs %d\n", __func__, hcd->periodic_usecs, qh->usecs); //NOTICE ++ status = -DWC_E_NO_SPACE; ++ } ++ ++ return status; ++} ++ ++/* microframe_schedule=0 end */ ++ ++/** ++ * Microframe scheduler ++ * track the total use in hcd->frame_usecs ++ * keep each qh use in qh->frame_usecs ++ * when surrendering the qh then donate the time back ++ */ ++const unsigned short max_uframe_usecs[]={ 100, 100, 100, 100, 100, 100, 30, 0 }; ++ ++/* ++ * called from dwc_otg_hcd.c:dwc_otg_hcd_init ++ */ ++int init_hcd_usecs(dwc_otg_hcd_t *_hcd) ++{ ++ int i; ++ for (i=0; i<8; i++) { ++ _hcd->frame_usecs[i] = max_uframe_usecs[i]; ++ } ++ return 0; ++} ++ ++static int find_single_uframe(dwc_otg_hcd_t * _hcd, dwc_otg_qh_t * _qh) ++{ ++ int i; ++ unsigned short utime; ++ int t_left; ++ int ret; ++ int done; ++ ++ ret = -1; ++ utime = _qh->usecs; ++ t_left = utime; ++ i = 0; ++ done = 0; ++ while (done == 0) { ++ /* At the start _hcd->frame_usecs[i] = max_uframe_usecs[i]; */ ++ if (utime <= _hcd->frame_usecs[i]) { ++ _hcd->frame_usecs[i] -= utime; ++ _qh->frame_usecs[i] += utime; ++ t_left -= utime; ++ ret = i; ++ done = 1; ++ return ret; ++ } else { ++ i++; ++ if (i == 8) { ++ done = 1; ++ ret = -1; ++ } ++ } ++ } ++ return ret; ++ } ++ ++/* ++ * use this for FS apps that can span multiple uframes ++ */ ++static int find_multi_uframe(dwc_otg_hcd_t * _hcd, dwc_otg_qh_t * _qh) ++{ ++ int i; ++ int j; ++ unsigned short utime; ++ int t_left; ++ int ret; ++ int done; ++ unsigned short xtime; ++ ++ ret = -1; ++ utime = _qh->usecs; ++ t_left = utime; ++ i = 0; ++ done = 0; ++loop: ++ while (done == 0) { ++ if(_hcd->frame_usecs[i] <= 0) { ++ i++; ++ if (i == 8) { ++ done = 1; ++ ret = -1; ++ } ++ goto loop; ++ } ++ ++ /* ++ * we need n consecutive slots ++ * so use j as a start slot j plus j+1 must be enough time (for now) ++ */ ++ xtime= _hcd->frame_usecs[i]; ++ for (j = i+1 ; j < 8 ; j++ ) { ++ /* ++ * if we add this frame remaining time to xtime we may ++ * be OK, if not we need to test j for a complete frame ++ */ ++ if ((xtime+_hcd->frame_usecs[j]) < utime) { ++ if (_hcd->frame_usecs[j] < max_uframe_usecs[j]) { ++ j = 8; ++ ret = -1; ++ continue; ++ } ++ } ++ if (xtime >= utime) { ++ ret = i; ++ j = 8; /* stop loop with a good value ret */ ++ continue; ++ } ++ /* add the frame time to x time */ ++ xtime += _hcd->frame_usecs[j]; ++ /* we must have a fully available next frame or break */ ++ if ((xtime < utime) ++ && (_hcd->frame_usecs[j] == max_uframe_usecs[j])) { ++ ret = -1; ++ j = 8; /* stop loop with a bad value ret */ ++ continue; ++ } ++ } ++ if (ret >= 0) { ++ t_left = utime; ++ for (j = i; (t_left>0) && (j < 8); j++ ) { ++ t_left -= _hcd->frame_usecs[j]; ++ if ( t_left <= 0 ) { ++ _qh->frame_usecs[j] += _hcd->frame_usecs[j] + t_left; ++ _hcd->frame_usecs[j]= -t_left; ++ ret = i; ++ done = 1; ++ } else { ++ _qh->frame_usecs[j] += _hcd->frame_usecs[j]; ++ _hcd->frame_usecs[j] = 0; ++ } ++ } ++ } else { ++ i++; ++ if (i == 8) { ++ done = 1; ++ ret = -1; ++ } ++ } ++ } ++ return ret; ++} ++ ++static int find_uframe(dwc_otg_hcd_t * _hcd, dwc_otg_qh_t * _qh) ++{ ++ int ret; ++ ret = -1; ++ ++ if (_qh->speed == USB_SPEED_HIGH) { ++ /* if this is a hs transaction we need a full frame */ ++ ret = find_single_uframe(_hcd, _qh); ++ } else { ++ /* if this is a fs transaction we may need a sequence of frames */ ++ ret = find_multi_uframe(_hcd, _qh); ++ } ++ return ret; ++} ++ ++/** ++ * Checks that the max transfer size allowed in a host channel is large enough ++ * to handle the maximum data transfer in a single (micro)frame for a periodic ++ * transfer. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh QH for a periodic endpoint. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++static int check_max_xfer_size(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int status; ++ uint32_t max_xfer_size; ++ uint32_t max_channel_xfer_size; ++ ++ status = 0; ++ ++ max_xfer_size = dwc_max_packet(qh->maxp) * dwc_hb_mult(qh->maxp); ++ max_channel_xfer_size = hcd->core_if->core_params->max_transfer_size; ++ ++ if (max_xfer_size > max_channel_xfer_size) { ++ DWC_INFO("%s: Periodic xfer length %d > " "max xfer length for channel %d\n", ++ __func__, max_xfer_size, max_channel_xfer_size); //NOTICE ++ status = -DWC_E_NO_SPACE; ++ } ++ ++ return status; ++} ++ ++/** ++ * Schedules an interrupt or isochronous transfer in the periodic schedule. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh QH for the periodic transfer. The QH should already contain the ++ * scheduling information. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++static int schedule_periodic(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int status = 0; ++ ++ if (microframe_schedule) { ++ int frame; ++ status = find_uframe(hcd, qh); ++ frame = -1; ++ if (status == 0) { ++ frame = 7; ++ } else { ++ if (status > 0 ) ++ frame = status-1; ++ } ++ ++ /* Set the new frame up */ ++ if (frame > -1) { ++ qh->sched_frame &= ~0x7; ++ qh->sched_frame |= (frame & 7); ++ } ++ ++ if (status != -1) ++ status = 0; ++ } else { ++ status = periodic_channel_available(hcd); ++ if (status) { ++ DWC_INFO("%s: No host channel available for periodic " "transfer.\n", __func__); //NOTICE ++ return status; ++ } ++ ++ status = check_periodic_bandwidth(hcd, qh); ++ } ++ if (status) { ++ DWC_INFO("%s: Insufficient periodic bandwidth for " ++ "periodic transfer.\n", __func__); ++ return status; ++ } ++ status = check_max_xfer_size(hcd, qh); ++ if (status) { ++ DWC_INFO("%s: Channel max transfer size too small " ++ "for periodic transfer.\n", __func__); ++ return status; ++ } ++ ++ if (hcd->core_if->dma_desc_enable) { ++ /* Don't rely on SOF and start in ready schedule */ ++ DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_ready, &qh->qh_list_entry); ++ } ++ else { ++ /* Always start in the inactive schedule. */ ++ DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_inactive, &qh->qh_list_entry); ++ } ++ ++ if (!microframe_schedule) { ++ /* Reserve the periodic channel. */ ++ hcd->periodic_channels++; ++ } ++ ++ /* Update claimed usecs per (micro)frame. */ ++ hcd->periodic_usecs += qh->usecs; ++ ++ return status; ++} ++ ++/** ++ * This function adds a QH to either the non periodic or periodic schedule if ++ * it is not already in the schedule. If the QH is already in the schedule, no ++ * action is taken. ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++int dwc_otg_hcd_qh_add(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int status = 0; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ if (!DWC_LIST_EMPTY(&qh->qh_list_entry)) { ++ /* QH already in a schedule. */ ++ return status; ++ } ++ ++ /* Add the new QH to the appropriate schedule */ ++ if (dwc_qh_is_non_per(qh)) { ++ /* Always start in the inactive schedule. */ ++ DWC_LIST_INSERT_TAIL(&hcd->non_periodic_sched_inactive, ++ &qh->qh_list_entry); ++ } else { ++ status = schedule_periodic(hcd, qh); ++ if ( !hcd->periodic_qh_count ) { ++ intr_mask.b.sofintr = 1; ++ DWC_MODIFY_REG32(&hcd->core_if->core_global_regs->gintmsk, ++ intr_mask.d32, intr_mask.d32); ++ } ++ hcd->periodic_qh_count++; ++ } ++ ++ return status; ++} ++ ++/** ++ * Removes an interrupt or isochronous transfer from the periodic schedule. ++ * ++ * @param hcd The HCD state structure for the DWC OTG controller. ++ * @param qh QH for the periodic transfer. ++ */ ++static void deschedule_periodic(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ int i; ++ DWC_LIST_REMOVE_INIT(&qh->qh_list_entry); ++ ++ /* Update claimed usecs per (micro)frame. */ ++ hcd->periodic_usecs -= qh->usecs; ++ ++ if (!microframe_schedule) { ++ /* Release the periodic channel reservation. */ ++ hcd->periodic_channels--; ++ } else { ++ for (i = 0; i < 8; i++) { ++ hcd->frame_usecs[i] += qh->frame_usecs[i]; ++ qh->frame_usecs[i] = 0; ++ } ++ } ++} ++ ++/** ++ * Removes a QH from either the non-periodic or periodic schedule. Memory is ++ * not freed. ++ * ++ * @param hcd The HCD state structure. ++ * @param qh QH to remove from schedule. */ ++void dwc_otg_hcd_qh_remove(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) ++{ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ if (DWC_LIST_EMPTY(&qh->qh_list_entry)) { ++ /* QH is not in a schedule. */ ++ return; ++ } ++ ++ if (dwc_qh_is_non_per(qh)) { ++ if (hcd->non_periodic_qh_ptr == &qh->qh_list_entry) { ++ hcd->non_periodic_qh_ptr = ++ hcd->non_periodic_qh_ptr->next; ++ } ++ DWC_LIST_REMOVE_INIT(&qh->qh_list_entry); ++ } else { ++ deschedule_periodic(hcd, qh); ++ hcd->periodic_qh_count--; ++ if( !hcd->periodic_qh_count ) { ++ intr_mask.b.sofintr = 1; ++ DWC_MODIFY_REG32(&hcd->core_if->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ } ++ } ++} ++ ++/** ++ * Deactivates a QH. For non-periodic QHs, removes the QH from the active ++ * non-periodic schedule. The QH is added to the inactive non-periodic ++ * schedule if any QTDs are still attached to the QH. ++ * ++ * For periodic QHs, the QH is removed from the periodic queued schedule. If ++ * there are any QTDs still attached to the QH, the QH is added to either the ++ * periodic inactive schedule or the periodic ready schedule and its next ++ * scheduled frame is calculated. The QH is placed in the ready schedule if ++ * the scheduled frame has been reached already. Otherwise it's placed in the ++ * inactive schedule. If there are no QTDs attached to the QH, the QH is ++ * completely removed from the periodic schedule. ++ */ ++void dwc_otg_hcd_qh_deactivate(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh, ++ int sched_next_periodic_split) ++{ ++ if (dwc_qh_is_non_per(qh)) { ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ if (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { ++ /* Add back to inactive non-periodic schedule. */ ++ dwc_otg_hcd_qh_add(hcd, qh); ++ } ++ } else { ++ uint16_t frame_number = dwc_otg_hcd_get_frame_number(hcd); ++ ++ if (qh->do_split) { ++ /* Schedule the next continuing periodic split transfer */ ++ if (sched_next_periodic_split) { ++ ++ qh->sched_frame = frame_number; ++ if (dwc_frame_num_le(frame_number, ++ dwc_frame_num_inc ++ (qh->start_split_frame, ++ 1))) { ++ /* ++ * Allow one frame to elapse after start ++ * split microframe before scheduling ++ * complete split, but DONT if we are ++ * doing the next start split in the ++ * same frame for an ISOC out. ++ */ ++ if ((qh->ep_type != UE_ISOCHRONOUS) || ++ (qh->ep_is_in != 0)) { ++ qh->sched_frame = ++ dwc_frame_num_inc(qh->sched_frame, 1); ++ } ++ } ++ } else { ++ qh->sched_frame = ++ dwc_frame_num_inc(qh->start_split_frame, ++ qh->interval); ++ if (dwc_frame_num_le ++ (qh->sched_frame, frame_number)) { ++ qh->sched_frame = frame_number; ++ } ++ qh->sched_frame |= 0x7; ++ qh->start_split_frame = qh->sched_frame; ++ } ++ } else { ++ qh->sched_frame = ++ dwc_frame_num_inc(qh->sched_frame, qh->interval); ++ if (dwc_frame_num_le(qh->sched_frame, frame_number)) { ++ qh->sched_frame = frame_number; ++ } ++ } ++ ++ if (DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { ++ dwc_otg_hcd_qh_remove(hcd, qh); ++ } else { ++ /* ++ * Remove from periodic_sched_queued and move to ++ * appropriate queue. ++ */ ++ if ((microframe_schedule && dwc_frame_num_le(qh->sched_frame, frame_number)) || ++ (!microframe_schedule && qh->sched_frame == frame_number)) { ++ DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready, ++ &qh->qh_list_entry); ++ } else { ++ DWC_LIST_MOVE_HEAD ++ (&hcd->periodic_sched_inactive, ++ &qh->qh_list_entry); ++ } ++ } ++ } ++} ++ ++/** ++ * This function allocates and initializes a QTD. ++ * ++ * @param urb The URB to create a QTD from. Each URB-QTD pair will end up ++ * pointing to each other so each pair should have a unique correlation. ++ * @param atomic_alloc Flag to do atomic alloc if needed ++ * ++ * @return Returns pointer to the newly allocated QTD, or NULL on error. */ ++dwc_otg_qtd_t *dwc_otg_hcd_qtd_create(dwc_otg_hcd_urb_t * urb, int atomic_alloc) ++{ ++ dwc_otg_qtd_t *qtd; ++ ++ qtd = dwc_otg_hcd_qtd_alloc(atomic_alloc); ++ if (qtd == NULL) { ++ return NULL; ++ } ++ ++ dwc_otg_hcd_qtd_init(qtd, urb); ++ return qtd; ++} ++ ++/** ++ * Initializes a QTD structure. ++ * ++ * @param qtd The QTD to initialize. ++ * @param urb The URB to use for initialization. */ ++void dwc_otg_hcd_qtd_init(dwc_otg_qtd_t * qtd, dwc_otg_hcd_urb_t * urb) ++{ ++ dwc_memset(qtd, 0, sizeof(dwc_otg_qtd_t)); ++ qtd->urb = urb; ++ if (dwc_otg_hcd_get_pipe_type(&urb->pipe_info) == UE_CONTROL) { ++ /* ++ * The only time the QTD data toggle is used is on the data ++ * phase of control transfers. This phase always starts with ++ * DATA1. ++ */ ++ qtd->data_toggle = DWC_OTG_HC_PID_DATA1; ++ qtd->control_phase = DWC_OTG_CONTROL_SETUP; ++ } ++ ++ /* start split */ ++ qtd->complete_split = 0; ++ qtd->isoc_split_pos = DWC_HCSPLIT_XACTPOS_ALL; ++ qtd->isoc_split_offset = 0; ++ qtd->in_process = 0; ++ ++ /* Store the qtd ptr in the urb to reference what QTD. */ ++ urb->qtd = qtd; ++ return; ++} ++ ++/** ++ * This function adds a QTD to the QTD-list of a QH. It will find the correct ++ * QH to place the QTD into. If it does not find a QH, then it will create a ++ * new QH. If the QH to which the QTD is added is not currently scheduled, it ++ * is placed into the proper schedule based on its EP type. ++ * ++ * @param[in] qtd The QTD to add ++ * @param[in] hcd The DWC HCD structure ++ * @param[out] qh out parameter to return queue head ++ * @param atomic_alloc Flag to do atomic alloc if needed ++ * ++ * @return 0 if successful, negative error code otherwise. ++ */ ++int dwc_otg_hcd_qtd_add(dwc_otg_qtd_t * qtd, ++ dwc_otg_hcd_t * hcd, dwc_otg_qh_t ** qh, int atomic_alloc) ++{ ++ int retval = 0; ++ dwc_irqflags_t flags; ++ ++ dwc_otg_hcd_urb_t *urb = qtd->urb; ++ ++ /* ++ * Get the QH which holds the QTD-list to insert to. Create QH if it ++ * doesn't exist. ++ */ ++ if (*qh == NULL) { ++ *qh = dwc_otg_hcd_qh_create(hcd, urb, atomic_alloc); ++ if (*qh == NULL) { ++ retval = -1; ++ goto done; ++ } ++ } ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ retval = dwc_otg_hcd_qh_add(hcd, *qh); ++ if (retval == 0) { ++ DWC_CIRCLEQ_INSERT_TAIL(&((*qh)->qtd_list), qtd, ++ qtd_list_entry); ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ ++done: ++ ++ return retval; ++} ++ ++#endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,185 @@ ++#ifndef _DWC_OS_DEP_H_ ++#define _DWC_OS_DEP_H_ ++ ++/** ++ * @file ++ * ++ * This file contains OS dependent structures. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) ++# include ++#endif ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) ++# include ++#else ++# include ++#endif ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) ++# include ++#else ++# include ++#endif ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) ++# include ++#endif ++ ++#ifdef PCI_INTERFACE ++# include ++#endif ++ ++#ifdef LM_INTERFACE ++# include ++# include ++# include ++# include ++# if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)) ++# include ++# include ++# include ++# include ++# else ++/* in 2.6.31, at least, we seem to have lost the generic LM infrastructure - ++ here we assume that the machine architecture provides definitions ++ in its own header ++*/ ++# include ++# include ++# endif ++#endif ++ ++#ifdef PLATFORM_INTERFACE ++#include ++#include ++#endif ++ ++/** The OS page size */ ++#define DWC_OS_PAGE_SIZE PAGE_SIZE ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,14) ++typedef int gfp_t; ++#endif ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) ++# define IRQF_SHARED SA_SHIRQ ++#endif ++ ++typedef struct os_dependent { ++ /** Base address returned from ioremap() */ ++ void *base; ++ ++ /** Register offset for Diagnostic API */ ++ uint32_t reg_offset; ++ ++#ifdef LM_INTERFACE ++ struct lm_device *lmdev; ++#elif defined(PCI_INTERFACE) ++ struct pci_dev *pcidev; ++ ++ /** Start address of a PCI region */ ++ resource_size_t rsrc_start; ++ ++ /** Length address of a PCI region */ ++ resource_size_t rsrc_len; ++#elif defined(PLATFORM_INTERFACE) ++ struct platform_device *platformdev; ++#endif ++ ++} os_dependent_t; ++ ++#ifdef __cplusplus ++} ++#endif ++ ++ ++ ++/* Type for the our device on the chosen bus */ ++#if defined(LM_INTERFACE) ++typedef struct lm_device dwc_bus_dev_t; ++#elif defined(PCI_INTERFACE) ++typedef struct pci_dev dwc_bus_dev_t; ++#elif defined(PLATFORM_INTERFACE) ++typedef struct platform_device dwc_bus_dev_t; ++#endif ++ ++/* Helper macro to retrieve drvdata from the device on the chosen bus */ ++#if defined(LM_INTERFACE) ++#define DWC_OTG_BUSDRVDATA(_dev) lm_get_drvdata(_dev) ++#elif defined(PCI_INTERFACE) ++#define DWC_OTG_BUSDRVDATA(_dev) pci_get_drvdata(_dev) ++#elif defined(PLATFORM_INTERFACE) ++#define DWC_OTG_BUSDRVDATA(_dev) platform_get_drvdata(_dev) ++#endif ++ ++/** ++ * Helper macro returning the otg_device structure of a given struct device ++ * ++ * c.f. static dwc_otg_device_t *dwc_otg_drvdev(struct device *_dev) ++ */ ++#ifdef LM_INTERFACE ++#define DWC_OTG_GETDRVDEV(_var, _dev) do { \ ++ struct lm_device *lm_dev = \ ++ container_of(_dev, struct lm_device, dev); \ ++ _var = lm_get_drvdata(lm_dev); \ ++ } while (0) ++ ++#elif defined(PCI_INTERFACE) ++#define DWC_OTG_GETDRVDEV(_var, _dev) do { \ ++ _var = dev_get_drvdata(_dev); \ ++ } while (0) ++ ++#elif defined(PLATFORM_INTERFACE) ++#define DWC_OTG_GETDRVDEV(_var, _dev) do { \ ++ struct platform_device *platform_dev = \ ++ container_of(_dev, struct platform_device, dev); \ ++ _var = platform_get_drvdata(platform_dev); \ ++ } while (0) ++#endif ++ ++ ++/** ++ * Helper macro returning the struct dev of the given struct os_dependent ++ * ++ * c.f. static struct device *dwc_otg_getdev(struct os_dependent *osdep) ++ */ ++#ifdef LM_INTERFACE ++#define DWC_OTG_OS_GETDEV(_osdep) \ ++ ((_osdep).lmdev == NULL? NULL: &(_osdep).lmdev->dev) ++#elif defined(PCI_INTERFACE) ++#define DWC_OTG_OS_GETDEV(_osdep) \ ++ ((_osdep).pci_dev == NULL? NULL: &(_osdep).pci_dev->dev) ++#elif defined(PLATFORM_INTERFACE) ++#define DWC_OTG_OS_GETDEV(_osdep) \ ++ ((_osdep).platformdev == NULL? NULL: &(_osdep).platformdev->dev) ++#endif ++ ++ ++ ++ ++#endif /* _DWC_OS_DEP_H_ */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,2708 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.c $ ++ * $Revision: #101 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_HOST_ONLY ++ ++/** @file ++ * This file implements PCD Core. All code in this file is portable and doesn't ++ * use any OS specific functions. ++ * PCD Core provides Interface, defined in ++ * header file, which can be used to implement OS specific PCD interface. ++ * ++ * An important function of the PCD is managing interrupts generated ++ * by the DWC_otg controller. The implementation of the DWC_otg device ++ * mode interrupt service routines is in dwc_otg_pcd_intr.c. ++ * ++ * @todo Add Device Mode test modes (Test J mode, Test K mode, etc). ++ * @todo Does it work when the request size is greater than DEPTSIZ ++ * transfer size ++ * ++ */ ++ ++#include "dwc_otg_pcd.h" ++ ++#ifdef DWC_UTE_CFI ++#include "dwc_otg_cfi.h" ++ ++extern int init_cfi(cfiobject_t * cfiobj); ++#endif ++ ++/** ++ * Choose endpoint from ep arrays using usb_ep structure. ++ */ ++static dwc_otg_pcd_ep_t *get_ep_from_handle(dwc_otg_pcd_t * pcd, void *handle) ++{ ++ int i; ++ if (pcd->ep0.priv == handle) { ++ return &pcd->ep0; ++ } ++ for (i = 0; i < MAX_EPS_CHANNELS - 1; i++) { ++ if (pcd->in_ep[i].priv == handle) ++ return &pcd->in_ep[i]; ++ if (pcd->out_ep[i].priv == handle) ++ return &pcd->out_ep[i]; ++ } ++ ++ return NULL; ++} ++ ++/** ++ * This function completes a request. It call's the request call back. ++ */ ++void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep, dwc_otg_pcd_request_t * req, ++ int32_t status) ++{ ++ unsigned stopped = ep->stopped; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(ep %p req %p)\n", __func__, ep, req); ++ DWC_CIRCLEQ_REMOVE_INIT(&ep->queue, req, queue_entry); ++ ++ /* don't modify queue heads during completion callback */ ++ ep->stopped = 1; ++ /* spin_unlock/spin_lock now done in fops->complete() */ ++ ep->pcd->fops->complete(ep->pcd, ep->priv, req->priv, status, ++ req->actual); ++ ++ if (ep->pcd->request_pending > 0) { ++ --ep->pcd->request_pending; ++ } ++ ++ ep->stopped = stopped; ++ DWC_FREE(req); ++} ++ ++/** ++ * This function terminates all the requsts in the EP request queue. ++ */ ++void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_pcd_request_t *req; ++ ++ ep->stopped = 1; ++ ++ /* called with irqs blocked?? */ ++ while (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ dwc_otg_request_done(ep, req, -DWC_E_SHUTDOWN); ++ } ++} ++ ++void dwc_otg_pcd_start(dwc_otg_pcd_t * pcd, ++ const struct dwc_otg_pcd_function_ops *fops) ++{ ++ pcd->fops = fops; ++} ++ ++/** ++ * PCD Callback function for initializing the PCD when switching to ++ * device mode. ++ * ++ * @param p void pointer to the dwc_otg_pcd_t ++ */ ++static int32_t dwc_otg_pcd_start_cb(void *p) ++{ ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++ /* ++ * Initialized the Core for Device mode. ++ */ ++ if (dwc_otg_is_device_mode(core_if)) { ++ dwc_otg_core_dev_init(core_if); ++ /* Set core_if's lock pointer to the pcd->lock */ ++ core_if->lock = pcd->lock; ++ } ++ return 1; ++} ++ ++/** CFI-specific buffer allocation function for EP */ ++#ifdef DWC_UTE_CFI ++uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep, dwc_dma_t * addr, ++ size_t buflen, int flags) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ ep = get_ep_from_handle(pcd, pep); ++ if (!ep) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ return pcd->cfi->ops.ep_alloc_buf(pcd->cfi, pcd, ep, addr, buflen, ++ flags); ++} ++#else ++uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep, dwc_dma_t * addr, ++ size_t buflen, int flags); ++#endif ++ ++/** ++ * PCD Callback function for notifying the PCD when resuming from ++ * suspend. ++ * ++ * @param p void pointer to the dwc_otg_pcd_t ++ */ ++static int32_t dwc_otg_pcd_resume_cb(void *p) ++{ ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p; ++ ++ if (pcd->fops->resume) { ++ pcd->fops->resume(pcd); ++ } ++ ++ /* Stop the SRP timeout timer. */ ++ if ((GET_CORE_IF(pcd)->core_params->phy_type != DWC_PHY_TYPE_PARAM_FS) ++ || (!GET_CORE_IF(pcd)->core_params->i2c_enable)) { ++ if (GET_CORE_IF(pcd)->srp_timer_started) { ++ GET_CORE_IF(pcd)->srp_timer_started = 0; ++ DWC_TIMER_CANCEL(GET_CORE_IF(pcd)->srp_timer); ++ } ++ } ++ return 1; ++} ++ ++/** ++ * PCD Callback function for notifying the PCD device is suspended. ++ * ++ * @param p void pointer to the dwc_otg_pcd_t ++ */ ++static int32_t dwc_otg_pcd_suspend_cb(void *p) ++{ ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p; ++ ++ if (pcd->fops->suspend) { ++ DWC_SPINUNLOCK(pcd->lock); ++ pcd->fops->suspend(pcd); ++ DWC_SPINLOCK(pcd->lock); ++ } ++ ++ return 1; ++} ++ ++/** ++ * PCD Callback function for stopping the PCD when switching to Host ++ * mode. ++ * ++ * @param p void pointer to the dwc_otg_pcd_t ++ */ ++static int32_t dwc_otg_pcd_stop_cb(void *p) ++{ ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) p; ++ extern void dwc_otg_pcd_stop(dwc_otg_pcd_t * _pcd); ++ ++ dwc_otg_pcd_stop(pcd); ++ return 1; ++} ++ ++/** ++ * PCD Callback structure for handling mode switching. ++ */ ++static dwc_otg_cil_callbacks_t pcd_callbacks = { ++ .start = dwc_otg_pcd_start_cb, ++ .stop = dwc_otg_pcd_stop_cb, ++ .suspend = dwc_otg_pcd_suspend_cb, ++ .resume_wakeup = dwc_otg_pcd_resume_cb, ++ .p = 0, /* Set at registration */ ++}; ++ ++/** ++ * This function allocates a DMA Descriptor chain for the Endpoint ++ * buffer to be used for a transfer to/from the specified endpoint. ++ */ ++dwc_otg_dev_dma_desc_t *dwc_otg_ep_alloc_desc_chain(dwc_dma_t * dma_desc_addr, ++ uint32_t count) ++{ ++ return DWC_DMA_ALLOC_ATOMIC(count * sizeof(dwc_otg_dev_dma_desc_t), ++ dma_desc_addr); ++} ++ ++/** ++ * This function frees a DMA Descriptor chain that was allocated by ep_alloc_desc. ++ */ ++void dwc_otg_ep_free_desc_chain(dwc_otg_dev_dma_desc_t * desc_addr, ++ uint32_t dma_desc_addr, uint32_t count) ++{ ++ DWC_DMA_FREE(count * sizeof(dwc_otg_dev_dma_desc_t), desc_addr, ++ dma_desc_addr); ++} ++ ++#ifdef DWC_EN_ISOC ++ ++/** ++ * This function initializes a descriptor chain for Isochronous transfer ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dwc_ep The EP to start the transfer on. ++ * ++ */ ++void dwc_otg_iso_ep_start_ddma_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * dwc_ep) ++{ ++ ++ dsts_data_t dsts = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ volatile uint32_t *addr; ++ int i, j; ++ uint32_t len; ++ ++ if (dwc_ep->is_in) ++ dwc_ep->desc_cnt = dwc_ep->buf_proc_intrvl / dwc_ep->bInterval; ++ else ++ dwc_ep->desc_cnt = ++ dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / ++ dwc_ep->bInterval; ++ ++ /** Allocate descriptors for double buffering */ ++ dwc_ep->iso_desc_addr = ++ dwc_otg_ep_alloc_desc_chain(&dwc_ep->iso_dma_desc_addr, ++ dwc_ep->desc_cnt * 2); ++ if (dwc_ep->desc_addr) { ++ DWC_WARN("%s, can't allocate DMA descriptor chain\n", __func__); ++ return; ++ } ++ ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ++ /** ISO OUT EP */ ++ if (dwc_ep->is_in == 0) { ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ dwc_otg_dev_dma_desc_t *dma_desc = dwc_ep->iso_desc_addr; ++ dma_addr_t dma_ad; ++ uint32_t data_per_desc; ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[dwc_ep->num]; ++ int offset; ++ ++ addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl; ++ dma_ad = (dma_addr_t) DWC_READ_REG32(&(out_regs->doepdma)); ++ ++ /** Buffer 0 descriptors setup */ ++ dma_ad = dwc_ep->dma_addr0; ++ ++ sts.b_iso_out.bs = BS_HOST_READY; ++ sts.b_iso_out.rxsts = 0; ++ sts.b_iso_out.l = 0; ++ sts.b_iso_out.sp = 0; ++ sts.b_iso_out.ioc = 0; ++ sts.b_iso_out.pid = 0; ++ sts.b_iso_out.framenum = 0; ++ ++ offset = 0; ++ for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; ++ i += dwc_ep->pkt_per_frm) { ++ ++ for (j = 0; j < dwc_ep->pkt_per_frm; ++j) { ++ uint32_t len = (j + 1) * dwc_ep->maxpacket; ++ if (len > dwc_ep->data_per_frame) ++ data_per_desc = ++ dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket; ++ else ++ data_per_desc = dwc_ep->maxpacket; ++ len = data_per_desc % 4; ++ if (len) ++ data_per_desc += 4 - len; ++ ++ sts.b_iso_out.rxbytes = data_per_desc; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ offset += data_per_desc; ++ dma_desc++; ++ dma_ad += data_per_desc; ++ } ++ } ++ ++ for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) { ++ uint32_t len = (j + 1) * dwc_ep->maxpacket; ++ if (len > dwc_ep->data_per_frame) ++ data_per_desc = ++ dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket; ++ else ++ data_per_desc = dwc_ep->maxpacket; ++ len = data_per_desc % 4; ++ if (len) ++ data_per_desc += 4 - len; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ offset += data_per_desc; ++ dma_desc++; ++ dma_ad += data_per_desc; ++ } ++ ++ sts.b_iso_out.ioc = 1; ++ len = (j + 1) * dwc_ep->maxpacket; ++ if (len > dwc_ep->data_per_frame) ++ data_per_desc = ++ dwc_ep->data_per_frame - j * dwc_ep->maxpacket; ++ else ++ data_per_desc = dwc_ep->maxpacket; ++ len = data_per_desc % 4; ++ if (len) ++ data_per_desc += 4 - len; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ dma_desc++; ++ ++ /** Buffer 1 descriptors setup */ ++ sts.b_iso_out.ioc = 0; ++ dma_ad = dwc_ep->dma_addr1; ++ ++ offset = 0; ++ for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; ++ i += dwc_ep->pkt_per_frm) { ++ for (j = 0; j < dwc_ep->pkt_per_frm; ++j) { ++ uint32_t len = (j + 1) * dwc_ep->maxpacket; ++ if (len > dwc_ep->data_per_frame) ++ data_per_desc = ++ dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket; ++ else ++ data_per_desc = dwc_ep->maxpacket; ++ len = data_per_desc % 4; ++ if (len) ++ data_per_desc += 4 - len; ++ ++ data_per_desc = ++ sts.b_iso_out.rxbytes = data_per_desc; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ offset += data_per_desc; ++ dma_desc++; ++ dma_ad += data_per_desc; ++ } ++ } ++ for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) { ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep->data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ offset += data_per_desc; ++ dma_desc++; ++ dma_ad += data_per_desc; ++ } ++ ++ sts.b_iso_out.ioc = 1; ++ sts.b_iso_out.l = 1; ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep->data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ dwc_ep->next_frame = 0; ++ ++ /** Write dma_ad into DOEPDMA register */ ++ DWC_WRITE_REG32(&(out_regs->doepdma), ++ (uint32_t) dwc_ep->iso_dma_desc_addr); ++ ++ } ++ /** ISO IN EP */ ++ else { ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ dwc_otg_dev_dma_desc_t *dma_desc = dwc_ep->iso_desc_addr; ++ dma_addr_t dma_ad; ++ dwc_otg_dev_in_ep_regs_t *in_regs = ++ core_if->dev_if->in_ep_regs[dwc_ep->num]; ++ unsigned int frmnumber; ++ fifosize_data_t txfifosize, rxfifosize; ++ ++ txfifosize.d32 = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[dwc_ep->num]-> ++ dtxfsts); ++ rxfifosize.d32 = ++ DWC_READ_REG32(&core_if->core_global_regs->grxfsiz); ++ ++ addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl; ++ ++ dma_ad = dwc_ep->dma_addr0; ++ ++ dsts.d32 = ++ DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ++ sts.b_iso_in.bs = BS_HOST_READY; ++ sts.b_iso_in.txsts = 0; ++ sts.b_iso_in.sp = ++ (dwc_ep->data_per_frame % dwc_ep->maxpacket) ? 1 : 0; ++ sts.b_iso_in.ioc = 0; ++ sts.b_iso_in.pid = dwc_ep->pkt_per_frm; ++ ++ frmnumber = dwc_ep->next_frame; ++ ++ sts.b_iso_in.framenum = frmnumber; ++ sts.b_iso_in.txbytes = dwc_ep->data_per_frame; ++ sts.b_iso_in.l = 0; ++ ++ /** Buffer 0 descriptors setup */ ++ for (i = 0; i < dwc_ep->desc_cnt - 1; i++) { ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ dma_desc++; ++ ++ dma_ad += dwc_ep->data_per_frame; ++ sts.b_iso_in.framenum += dwc_ep->bInterval; ++ } ++ ++ sts.b_iso_in.ioc = 1; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++dma_desc; ++ ++ /** Buffer 1 descriptors setup */ ++ sts.b_iso_in.ioc = 0; ++ dma_ad = dwc_ep->dma_addr1; ++ ++ for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; ++ i += dwc_ep->pkt_per_frm) { ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ dma_desc++; ++ ++ dma_ad += dwc_ep->data_per_frame; ++ sts.b_iso_in.framenum += dwc_ep->bInterval; ++ ++ sts.b_iso_in.ioc = 0; ++ } ++ sts.b_iso_in.ioc = 1; ++ sts.b_iso_in.l = 1; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ dwc_ep->next_frame = sts.b_iso_in.framenum + dwc_ep->bInterval; ++ ++ /** Write dma_ad into diepdma register */ ++ DWC_WRITE_REG32(&(in_regs->diepdma), ++ (uint32_t) dwc_ep->iso_dma_desc_addr); ++ } ++ /** Enable endpoint, clear nak */ ++ depctl.d32 = 0; ++ depctl.b.epena = 1; ++ depctl.b.usbactep = 1; ++ depctl.b.cnak = 1; ++ ++ DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32); ++ depctl.d32 = DWC_READ_REG32(addr); ++} ++ ++/** ++ * This function initializes a descriptor chain for Isochronous transfer ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++void dwc_otg_iso_ep_start_buf_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep) ++{ ++ depctl_data_t depctl = {.d32 = 0 }; ++ volatile uint32_t *addr; ++ ++ if (ep->is_in) { ++ addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl; ++ } else { ++ addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl; ++ } ++ ++ if (core_if->dma_enable == 0 || core_if->dma_desc_enable != 0) { ++ return; ++ } else { ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ ++ ep->xfer_len = ++ ep->data_per_frame * ep->buf_proc_intrvl / ep->bInterval; ++ ep->pkt_cnt = ++ (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket; ++ ep->xfer_count = 0; ++ ep->xfer_buff = ++ (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0; ++ ep->dma_addr = ++ (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0; ++ ++ if (ep->is_in) { ++ /* Program the transfer size and packet count ++ * as follows: xfersize = N * maxpacket + ++ * short_packet pktcnt = N + (short_packet ++ * exist ? 1 : 0) ++ */ ++ deptsiz.b.mc = ep->pkt_per_frm; ++ deptsiz.b.xfersize = ep->xfer_len; ++ deptsiz.b.pktcnt = ++ (ep->xfer_len - 1 + ep->maxpacket) / ep->maxpacket; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ dieptsiz, deptsiz.d32); ++ ++ /* Write the DMA register */ ++ DWC_WRITE_REG32(& ++ (core_if->dev_if->in_ep_regs[ep->num]-> ++ diepdma), (uint32_t) ep->dma_addr); ++ ++ } else { ++ deptsiz.b.pktcnt = ++ (ep->xfer_len + (ep->maxpacket - 1)) / ++ ep->maxpacket; ++ deptsiz.b.xfersize = deptsiz.b.pktcnt * ep->maxpacket; ++ ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[ep->num]-> ++ doeptsiz, deptsiz.d32); ++ ++ /* Write the DMA register */ ++ DWC_WRITE_REG32(& ++ (core_if->dev_if->out_ep_regs[ep->num]-> ++ doepdma), (uint32_t) ep->dma_addr); ++ ++ } ++ /** Enable endpoint, clear nak */ ++ depctl.d32 = 0; ++ depctl.b.epena = 1; ++ depctl.b.cnak = 1; ++ ++ DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32); ++ } ++} ++ ++/** ++ * This function does the setup for a data transfer for an EP and ++ * starts the transfer. For an IN transfer, the packets will be ++ * loaded into the appropriate Tx FIFO in the ISR. For OUT transfers, ++ * the packets are unloaded from the Rx FIFO in the ISR. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ */ ++ ++static void dwc_otg_iso_ep_start_transfer(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * ep) ++{ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable) { ++ if (ep->is_in) { ++ ep->desc_cnt = ep->pkt_cnt / ep->pkt_per_frm; ++ } else { ++ ep->desc_cnt = ep->pkt_cnt; ++ } ++ dwc_otg_iso_ep_start_ddma_transfer(core_if, ep); ++ } else { ++ if (core_if->pti_enh_enable) { ++ dwc_otg_iso_ep_start_buf_transfer(core_if, ep); ++ } else { ++ ep->cur_pkt_addr = ++ (ep->proc_buf_num) ? ep->xfer_buff1 : ep-> ++ xfer_buff0; ++ ep->cur_pkt_dma_addr = ++ (ep->proc_buf_num) ? ep->dma_addr1 : ep-> ++ dma_addr0; ++ dwc_otg_iso_ep_start_frm_transfer(core_if, ep); ++ } ++ } ++ } else { ++ ep->cur_pkt_addr = ++ (ep->proc_buf_num) ? ep->xfer_buff1 : ep->xfer_buff0; ++ ep->cur_pkt_dma_addr = ++ (ep->proc_buf_num) ? ep->dma_addr1 : ep->dma_addr0; ++ dwc_otg_iso_ep_start_frm_transfer(core_if, ep); ++ } ++} ++ ++/** ++ * This function stops transfer for an EP and ++ * resets the ep's variables. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ */ ++ ++void dwc_otg_iso_ep_stop_transfer(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ depctl_data_t depctl = {.d32 = 0 }; ++ volatile uint32_t *addr; ++ ++ if (ep->is_in == 1) { ++ addr = &core_if->dev_if->in_ep_regs[ep->num]->diepctl; ++ } else { ++ addr = &core_if->dev_if->out_ep_regs[ep->num]->doepctl; ++ } ++ ++ /* disable the ep */ ++ depctl.d32 = DWC_READ_REG32(addr); ++ ++ depctl.b.epdis = 1; ++ depctl.b.snak = 1; ++ ++ DWC_WRITE_REG32(addr, depctl.d32); ++ ++ if (core_if->dma_desc_enable && ++ ep->iso_desc_addr && ep->iso_dma_desc_addr) { ++ dwc_otg_ep_free_desc_chain(ep->iso_desc_addr, ++ ep->iso_dma_desc_addr, ++ ep->desc_cnt * 2); ++ } ++ ++ /* reset varibales */ ++ ep->dma_addr0 = 0; ++ ep->dma_addr1 = 0; ++ ep->xfer_buff0 = 0; ++ ep->xfer_buff1 = 0; ++ ep->data_per_frame = 0; ++ ep->data_pattern_frame = 0; ++ ep->sync_frame = 0; ++ ep->buf_proc_intrvl = 0; ++ ep->bInterval = 0; ++ ep->proc_buf_num = 0; ++ ep->pkt_per_frm = 0; ++ ep->pkt_per_frm = 0; ++ ep->desc_cnt = 0; ++ ep->iso_desc_addr = 0; ++ ep->iso_dma_desc_addr = 0; ++} ++ ++int dwc_otg_pcd_iso_ep_start(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf0, uint8_t * buf1, dwc_dma_t dma0, ++ dwc_dma_t dma1, int sync_frame, int dp_frame, ++ int data_per_frame, int start_frame, ++ int buf_proc_intrvl, void *req_handle, ++ int atomic_alloc) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_irqflags_t flags = 0; ++ dwc_ep_t *dwc_ep; ++ int32_t frm_data; ++ dsts_data_t dsts; ++ dwc_otg_core_if_t *core_if; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ ++ if (!ep || !ep->desc || ep->dwc_ep.num == 0) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ core_if = GET_CORE_IF(pcd); ++ dwc_ep = &ep->dwc_ep; ++ ++ if (ep->iso_req_handle) { ++ DWC_WARN("ISO request in progress\n"); ++ } ++ ++ dwc_ep->dma_addr0 = dma0; ++ dwc_ep->dma_addr1 = dma1; ++ ++ dwc_ep->xfer_buff0 = buf0; ++ dwc_ep->xfer_buff1 = buf1; ++ ++ dwc_ep->data_per_frame = data_per_frame; ++ ++ /** @todo - pattern data support is to be implemented in the future */ ++ dwc_ep->data_pattern_frame = dp_frame; ++ dwc_ep->sync_frame = sync_frame; ++ ++ dwc_ep->buf_proc_intrvl = buf_proc_intrvl; ++ ++ dwc_ep->bInterval = 1 << (ep->desc->bInterval - 1); ++ ++ dwc_ep->proc_buf_num = 0; ++ ++ dwc_ep->pkt_per_frm = 0; ++ frm_data = ep->dwc_ep.data_per_frame; ++ while (frm_data > 0) { ++ dwc_ep->pkt_per_frm++; ++ frm_data -= ep->dwc_ep.maxpacket; ++ } ++ ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ++ if (start_frame == -1) { ++ dwc_ep->next_frame = dsts.b.soffn + 1; ++ if (dwc_ep->bInterval != 1) { ++ dwc_ep->next_frame = ++ dwc_ep->next_frame + (dwc_ep->bInterval - 1 - ++ dwc_ep->next_frame % ++ dwc_ep->bInterval); ++ } ++ } else { ++ dwc_ep->next_frame = start_frame; ++ } ++ ++ if (!core_if->pti_enh_enable) { ++ dwc_ep->pkt_cnt = ++ dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / ++ dwc_ep->bInterval; ++ } else { ++ dwc_ep->pkt_cnt = ++ (dwc_ep->data_per_frame * ++ (dwc_ep->buf_proc_intrvl / dwc_ep->bInterval) ++ - 1 + dwc_ep->maxpacket) / dwc_ep->maxpacket; ++ } ++ ++ if (core_if->dma_desc_enable) { ++ dwc_ep->desc_cnt = ++ dwc_ep->buf_proc_intrvl * dwc_ep->pkt_per_frm / ++ dwc_ep->bInterval; ++ } ++ ++ if (atomic_alloc) { ++ dwc_ep->pkt_info = ++ DWC_ALLOC_ATOMIC(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt); ++ } else { ++ dwc_ep->pkt_info = ++ DWC_ALLOC(sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt); ++ } ++ if (!dwc_ep->pkt_info) { ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ return -DWC_E_NO_MEMORY; ++ } ++ if (core_if->pti_enh_enable) { ++ dwc_memset(dwc_ep->pkt_info, 0, ++ sizeof(iso_pkt_info_t) * dwc_ep->pkt_cnt); ++ } ++ ++ dwc_ep->cur_pkt = 0; ++ ep->iso_req_handle = req_handle; ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ dwc_otg_iso_ep_start_transfer(core_if, dwc_ep); ++ return 0; ++} ++ ++int dwc_otg_pcd_iso_ep_stop(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle) ++{ ++ dwc_irqflags_t flags = 0; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep || !ep->desc || ep->dwc_ep.num == 0) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ dwc_ep = &ep->dwc_ep; ++ ++ dwc_otg_iso_ep_stop_transfer(GET_CORE_IF(pcd), dwc_ep); ++ ++ DWC_FREE(dwc_ep->pkt_info); ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ if (ep->iso_req_handle != req_handle) { ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ ep->iso_req_handle = 0; ++ return 0; ++} ++ ++/** ++ * This function is used for perodical data exchnage between PCD and gadget drivers. ++ * for Isochronous EPs ++ * ++ * - Every time a sync period completes this function is called to ++ * perform data exchange between PCD and gadget ++ */ ++void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep, ++ void *req_handle) ++{ ++ int i; ++ dwc_ep_t *dwc_ep; ++ ++ dwc_ep = &ep->dwc_ep; ++ ++ DWC_SPINUNLOCK(ep->pcd->lock); ++ pcd->fops->isoc_complete(pcd, ep->priv, ep->iso_req_handle, ++ dwc_ep->proc_buf_num ^ 0x1); ++ DWC_SPINLOCK(ep->pcd->lock); ++ ++ for (i = 0; i < dwc_ep->pkt_cnt; ++i) { ++ dwc_ep->pkt_info[i].status = 0; ++ dwc_ep->pkt_info[i].offset = 0; ++ dwc_ep->pkt_info[i].length = 0; ++ } ++} ++ ++int dwc_otg_pcd_get_iso_packet_count(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *iso_req_handle) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep->desc || ep->dwc_ep.num == 0) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ dwc_ep = &ep->dwc_ep; ++ ++ return dwc_ep->pkt_cnt; ++} ++ ++void dwc_otg_pcd_get_iso_packet_params(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *iso_req_handle, int packet, ++ int *status, int *actual, int *offset) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep) ++ DWC_WARN("bad ep\n"); ++ ++ dwc_ep = &ep->dwc_ep; ++ ++ *status = dwc_ep->pkt_info[packet].status; ++ *actual = dwc_ep->pkt_info[packet].length; ++ *offset = dwc_ep->pkt_info[packet].offset; ++} ++ ++#endif /* DWC_EN_ISOC */ ++ ++static void dwc_otg_pcd_init_ep(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * pcd_ep, ++ uint32_t is_in, uint32_t ep_num) ++{ ++ /* Init EP structure */ ++ pcd_ep->desc = 0; ++ pcd_ep->pcd = pcd; ++ pcd_ep->stopped = 1; ++ pcd_ep->queue_sof = 0; ++ ++ /* Init DWC ep structure */ ++ pcd_ep->dwc_ep.is_in = is_in; ++ pcd_ep->dwc_ep.num = ep_num; ++ pcd_ep->dwc_ep.active = 0; ++ pcd_ep->dwc_ep.tx_fifo_num = 0; ++ /* Control until ep is actvated */ ++ pcd_ep->dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL; ++ pcd_ep->dwc_ep.maxpacket = MAX_PACKET_SIZE; ++ pcd_ep->dwc_ep.dma_addr = 0; ++ pcd_ep->dwc_ep.start_xfer_buff = 0; ++ pcd_ep->dwc_ep.xfer_buff = 0; ++ pcd_ep->dwc_ep.xfer_len = 0; ++ pcd_ep->dwc_ep.xfer_count = 0; ++ pcd_ep->dwc_ep.sent_zlp = 0; ++ pcd_ep->dwc_ep.total_len = 0; ++ pcd_ep->dwc_ep.desc_addr = 0; ++ pcd_ep->dwc_ep.dma_desc_addr = 0; ++ DWC_CIRCLEQ_INIT(&pcd_ep->queue); ++} ++ ++/** ++ * Initialize ep's ++ */ ++static void dwc_otg_pcd_reinit(dwc_otg_pcd_t * pcd) ++{ ++ int i; ++ uint32_t hwcfg1; ++ dwc_otg_pcd_ep_t *ep; ++ int in_ep_cntr, out_ep_cntr; ++ uint32_t num_in_eps = (GET_CORE_IF(pcd))->dev_if->num_in_eps; ++ uint32_t num_out_eps = (GET_CORE_IF(pcd))->dev_if->num_out_eps; ++ ++ /** ++ * Initialize the EP0 structure. ++ */ ++ ep = &pcd->ep0; ++ dwc_otg_pcd_init_ep(pcd, ep, 0, 0); ++ ++ in_ep_cntr = 0; ++ hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 3; ++ for (i = 1; in_ep_cntr < num_in_eps; i++) { ++ if ((hwcfg1 & 0x1) == 0) { ++ dwc_otg_pcd_ep_t *ep = &pcd->in_ep[in_ep_cntr]; ++ in_ep_cntr++; ++ /** ++ * @todo NGS: Add direction to EP, based on contents ++ * of HWCFG1. Need a copy of HWCFG1 in pcd structure? ++ * sprintf(";r ++ */ ++ dwc_otg_pcd_init_ep(pcd, ep, 1 /* IN */ , i); ++ ++ DWC_CIRCLEQ_INIT(&ep->queue); ++ } ++ hwcfg1 >>= 2; ++ } ++ ++ out_ep_cntr = 0; ++ hwcfg1 = (GET_CORE_IF(pcd))->hwcfg1.d32 >> 2; ++ for (i = 1; out_ep_cntr < num_out_eps; i++) { ++ if ((hwcfg1 & 0x1) == 0) { ++ dwc_otg_pcd_ep_t *ep = &pcd->out_ep[out_ep_cntr]; ++ out_ep_cntr++; ++ /** ++ * @todo NGS: Add direction to EP, based on contents ++ * of HWCFG1. Need a copy of HWCFG1 in pcd structure? ++ * sprintf(";r ++ */ ++ dwc_otg_pcd_init_ep(pcd, ep, 0 /* OUT */ , i); ++ DWC_CIRCLEQ_INIT(&ep->queue); ++ } ++ hwcfg1 >>= 2; ++ } ++ ++ pcd->ep0state = EP0_DISCONNECT; ++ pcd->ep0.dwc_ep.maxpacket = MAX_EP0_SIZE; ++ pcd->ep0.dwc_ep.type = DWC_OTG_EP_TYPE_CONTROL; ++} ++ ++/** ++ * This function is called when the SRP timer expires. The SRP should ++ * complete within 6 seconds. ++ */ ++static void srp_timeout(void *ptr) ++{ ++ gotgctl_data_t gotgctl; ++ dwc_otg_core_if_t *core_if = (dwc_otg_core_if_t *) ptr; ++ volatile uint32_t *addr = &core_if->core_global_regs->gotgctl; ++ ++ gotgctl.d32 = DWC_READ_REG32(addr); ++ ++ core_if->srp_timer_started = 0; ++ ++ if (core_if->adp_enable) { ++ if (gotgctl.b.bsesvld == 0) { ++ gpwrdn_data_t gpwrdn = {.d32 = 0 }; ++ DWC_PRINTF("SRP Timeout BSESSVLD = 0\n"); ++ /* Power off the core */ ++ if (core_if->power_down == 2) { ++ gpwrdn.b.pwrdnswtch = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gpwrdn, ++ gpwrdn.d32, 0); ++ } ++ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuintsel = 1; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gpwrdn, 0, ++ gpwrdn.d32); ++ dwc_otg_adp_probe_start(core_if); ++ } else { ++ DWC_PRINTF("SRP Timeout BSESSVLD = 1\n"); ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ } ++ } ++ ++ if ((core_if->core_params->phy_type == DWC_PHY_TYPE_PARAM_FS) && ++ (core_if->core_params->i2c_enable)) { ++ DWC_PRINTF("SRP Timeout\n"); ++ ++ if ((core_if->srp_success) && (gotgctl.b.bsesvld)) { ++ if (core_if->pcd_cb && core_if->pcd_cb->resume_wakeup) { ++ core_if->pcd_cb->resume_wakeup(core_if->pcd_cb->p); ++ } ++ ++ /* Clear Session Request */ ++ gotgctl.d32 = 0; ++ gotgctl.b.sesreq = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gotgctl, ++ gotgctl.d32, 0); ++ ++ core_if->srp_success = 0; ++ } else { ++ __DWC_ERROR("Device not connected/responding\n"); ++ gotgctl.b.sesreq = 0; ++ DWC_WRITE_REG32(addr, gotgctl.d32); ++ } ++ } else if (gotgctl.b.sesreq) { ++ DWC_PRINTF("SRP Timeout\n"); ++ ++ __DWC_ERROR("Device not connected/responding\n"); ++ gotgctl.b.sesreq = 0; ++ DWC_WRITE_REG32(addr, gotgctl.d32); ++ } else { ++ DWC_PRINTF(" SRP GOTGCTL=%0x\n", gotgctl.d32); ++ } ++} ++ ++/** ++ * Tasklet ++ * ++ */ ++extern void start_next_request(dwc_otg_pcd_ep_t * ep); ++ ++static void start_xfer_tasklet_func(void *data) ++{ ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) data; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++ int i; ++ depctl_data_t diepctl; ++ ++ DWC_DEBUGPL(DBG_PCDV, "Start xfer tasklet\n"); ++ ++ diepctl.d32 = DWC_READ_REG32(&core_if->dev_if->in_ep_regs[0]->diepctl); ++ ++ if (pcd->ep0.queue_sof) { ++ pcd->ep0.queue_sof = 0; ++ start_next_request(&pcd->ep0); ++ // break; ++ } ++ ++ for (i = 0; i < core_if->dev_if->num_in_eps; i++) { ++ depctl_data_t diepctl; ++ diepctl.d32 = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[i]->diepctl); ++ ++ if (pcd->in_ep[i].queue_sof) { ++ pcd->in_ep[i].queue_sof = 0; ++ start_next_request(&pcd->in_ep[i]); ++ // break; ++ } ++ } ++ ++ return; ++} ++ ++/** ++ * This function initialized the PCD portion of the driver. ++ * ++ */ ++dwc_otg_pcd_t *dwc_otg_pcd_init(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_pcd_t *pcd = NULL; ++ dwc_otg_dev_if_t *dev_if; ++ int i; ++ ++ /* ++ * Allocate PCD structure ++ */ ++ pcd = DWC_ALLOC(sizeof(dwc_otg_pcd_t)); ++ ++ if (pcd == NULL) { ++ return NULL; ++ } ++ ++ pcd->lock = DWC_SPINLOCK_ALLOC(); ++ DWC_DEBUGPL(DBG_HCDV, "Init of PCD %p given core_if %p\n", ++ pcd, core_if);//GRAYG ++ if (!pcd->lock) { ++ DWC_ERROR("Could not allocate lock for pcd"); ++ DWC_FREE(pcd); ++ return NULL; ++ } ++ /* Set core_if's lock pointer to hcd->lock */ ++ core_if->lock = pcd->lock; ++ pcd->core_if = core_if; ++ ++ dev_if = core_if->dev_if; ++ dev_if->isoc_ep = NULL; ++ ++ if (core_if->hwcfg4.b.ded_fifo_en) { ++ DWC_PRINTF("Dedicated Tx FIFOs mode\n"); ++ } else { ++ DWC_PRINTF("Shared Tx FIFO mode\n"); ++ } ++ ++ /* ++ * Initialized the Core for Device mode here if there is nod ADP support. ++ * Otherwise it will be done later in dwc_otg_adp_start routine. ++ */ ++ if (dwc_otg_is_device_mode(core_if) /*&& !core_if->adp_enable*/) { ++ dwc_otg_core_dev_init(core_if); ++ } ++ ++ /* ++ * Register the PCD Callbacks. ++ */ ++ dwc_otg_cil_register_pcd_callbacks(core_if, &pcd_callbacks, pcd); ++ ++ /* ++ * Initialize the DMA buffer for SETUP packets ++ */ ++ if (GET_CORE_IF(pcd)->dma_enable) { ++ pcd->setup_pkt = ++ DWC_DMA_ALLOC(sizeof(*pcd->setup_pkt) * 5, ++ &pcd->setup_pkt_dma_handle); ++ if (pcd->setup_pkt == NULL) { ++ DWC_FREE(pcd); ++ return NULL; ++ } ++ ++ pcd->status_buf = ++ DWC_DMA_ALLOC(sizeof(uint16_t), ++ &pcd->status_buf_dma_handle); ++ if (pcd->status_buf == NULL) { ++ DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5, ++ pcd->setup_pkt, pcd->setup_pkt_dma_handle); ++ DWC_FREE(pcd); ++ return NULL; ++ } ++ ++ if (GET_CORE_IF(pcd)->dma_desc_enable) { ++ dev_if->setup_desc_addr[0] = ++ dwc_otg_ep_alloc_desc_chain ++ (&dev_if->dma_setup_desc_addr[0], 1); ++ dev_if->setup_desc_addr[1] = ++ dwc_otg_ep_alloc_desc_chain ++ (&dev_if->dma_setup_desc_addr[1], 1); ++ dev_if->in_desc_addr = ++ dwc_otg_ep_alloc_desc_chain ++ (&dev_if->dma_in_desc_addr, 1); ++ dev_if->out_desc_addr = ++ dwc_otg_ep_alloc_desc_chain ++ (&dev_if->dma_out_desc_addr, 1); ++ pcd->data_terminated = 0; ++ ++ if (dev_if->setup_desc_addr[0] == 0 ++ || dev_if->setup_desc_addr[1] == 0 ++ || dev_if->in_desc_addr == 0 ++ || dev_if->out_desc_addr == 0) { ++ ++ if (dev_if->out_desc_addr) ++ dwc_otg_ep_free_desc_chain ++ (dev_if->out_desc_addr, ++ dev_if->dma_out_desc_addr, 1); ++ if (dev_if->in_desc_addr) ++ dwc_otg_ep_free_desc_chain ++ (dev_if->in_desc_addr, ++ dev_if->dma_in_desc_addr, 1); ++ if (dev_if->setup_desc_addr[1]) ++ dwc_otg_ep_free_desc_chain ++ (dev_if->setup_desc_addr[1], ++ dev_if->dma_setup_desc_addr[1], 1); ++ if (dev_if->setup_desc_addr[0]) ++ dwc_otg_ep_free_desc_chain ++ (dev_if->setup_desc_addr[0], ++ dev_if->dma_setup_desc_addr[0], 1); ++ ++ DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5, ++ pcd->setup_pkt, ++ pcd->setup_pkt_dma_handle); ++ DWC_DMA_FREE(sizeof(*pcd->status_buf), ++ pcd->status_buf, ++ pcd->status_buf_dma_handle); ++ ++ DWC_FREE(pcd); ++ ++ return NULL; ++ } ++ } ++ } else { ++ pcd->setup_pkt = DWC_ALLOC(sizeof(*pcd->setup_pkt) * 5); ++ if (pcd->setup_pkt == NULL) { ++ DWC_FREE(pcd); ++ return NULL; ++ } ++ ++ pcd->status_buf = DWC_ALLOC(sizeof(uint16_t)); ++ if (pcd->status_buf == NULL) { ++ DWC_FREE(pcd->setup_pkt); ++ DWC_FREE(pcd); ++ return NULL; ++ } ++ } ++ ++ dwc_otg_pcd_reinit(pcd); ++ ++ /* Allocate the cfi object for the PCD */ ++#ifdef DWC_UTE_CFI ++ pcd->cfi = DWC_ALLOC(sizeof(cfiobject_t)); ++ if (NULL == pcd->cfi) ++ goto fail; ++ if (init_cfi(pcd->cfi)) { ++ CFI_INFO("%s: Failed to init the CFI object\n", __func__); ++ goto fail; ++ } ++#endif ++ ++ /* Initialize tasklets */ ++ pcd->start_xfer_tasklet = DWC_TASK_ALLOC("xfer_tasklet", ++ start_xfer_tasklet_func, pcd); ++ pcd->test_mode_tasklet = DWC_TASK_ALLOC("test_mode_tasklet", ++ do_test_mode, pcd); ++ ++ /* Initialize SRP timer */ ++ core_if->srp_timer = DWC_TIMER_ALLOC("SRP TIMER", srp_timeout, core_if); ++ ++ if (core_if->core_params->dev_out_nak) { ++ /** ++ * Initialize xfer timeout timer. Implemented for ++ * 2.93a feature "Device DDMA OUT NAK Enhancement" ++ */ ++ for(i = 0; i < MAX_EPS_CHANNELS; i++) { ++ pcd->core_if->ep_xfer_timer[i] = ++ DWC_TIMER_ALLOC("ep timer", ep_xfer_timeout, ++ &pcd->core_if->ep_xfer_info[i]); ++ } ++ } ++ ++ return pcd; ++#ifdef DWC_UTE_CFI ++fail: ++#endif ++ if (pcd->setup_pkt) ++ DWC_FREE(pcd->setup_pkt); ++ if (pcd->status_buf) ++ DWC_FREE(pcd->status_buf); ++#ifdef DWC_UTE_CFI ++ if (pcd->cfi) ++ DWC_FREE(pcd->cfi); ++#endif ++ if (pcd) ++ DWC_FREE(pcd); ++ return NULL; ++ ++} ++ ++/** ++ * Remove PCD specific data ++ */ ++void dwc_otg_pcd_remove(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if; ++ int i; ++ if (pcd->core_if->core_params->dev_out_nak) { ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[i]); ++ pcd->core_if->ep_xfer_info[i].state = 0; ++ } ++ } ++ ++ if (GET_CORE_IF(pcd)->dma_enable) { ++ DWC_DMA_FREE(sizeof(*pcd->setup_pkt) * 5, pcd->setup_pkt, ++ pcd->setup_pkt_dma_handle); ++ DWC_DMA_FREE(sizeof(uint16_t), pcd->status_buf, ++ pcd->status_buf_dma_handle); ++ if (GET_CORE_IF(pcd)->dma_desc_enable) { ++ dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[0], ++ dev_if->dma_setup_desc_addr ++ [0], 1); ++ dwc_otg_ep_free_desc_chain(dev_if->setup_desc_addr[1], ++ dev_if->dma_setup_desc_addr ++ [1], 1); ++ dwc_otg_ep_free_desc_chain(dev_if->in_desc_addr, ++ dev_if->dma_in_desc_addr, 1); ++ dwc_otg_ep_free_desc_chain(dev_if->out_desc_addr, ++ dev_if->dma_out_desc_addr, ++ 1); ++ } ++ } else { ++ DWC_FREE(pcd->setup_pkt); ++ DWC_FREE(pcd->status_buf); ++ } ++ DWC_SPINLOCK_FREE(pcd->lock); ++ /* Set core_if's lock pointer to NULL */ ++ pcd->core_if->lock = NULL; ++ ++ DWC_TASK_FREE(pcd->start_xfer_tasklet); ++ DWC_TASK_FREE(pcd->test_mode_tasklet); ++ if (pcd->core_if->core_params->dev_out_nak) { ++ for (i = 0; i < MAX_EPS_CHANNELS; i++) { ++ if (pcd->core_if->ep_xfer_timer[i]) { ++ DWC_TIMER_FREE(pcd->core_if->ep_xfer_timer[i]); ++ } ++ } ++ } ++ ++/* Release the CFI object's dynamic memory */ ++#ifdef DWC_UTE_CFI ++ if (pcd->cfi->ops.release) { ++ pcd->cfi->ops.release(pcd->cfi); ++ } ++#endif ++ ++ DWC_FREE(pcd); ++} ++ ++/** ++ * Returns whether registered pcd is dual speed or not ++ */ ++uint32_t dwc_otg_pcd_is_dualspeed(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++ if ((core_if->core_params->speed == DWC_SPEED_PARAM_FULL) || ++ ((core_if->hwcfg2.b.hs_phy_type == 2) && ++ (core_if->hwcfg2.b.fs_phy_type == 1) && ++ (core_if->core_params->ulpi_fs_ls))) { ++ return 0; ++ } ++ ++ return 1; ++} ++ ++/** ++ * Returns whether registered pcd is OTG capable or not ++ */ ++uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ gusbcfg_data_t usbcfg = {.d32 = 0 }; ++ ++ usbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gusbcfg); ++ if (!usbcfg.b.srpcap || !usbcfg.b.hnpcap) { ++ return 0; ++ } ++ ++ return 1; ++} ++ ++/** ++ * This function assigns periodic Tx FIFO to an periodic EP ++ * in shared Tx FIFO mode ++ */ ++static uint32_t assign_tx_fifo(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t TxMsk = 1; ++ int i; ++ ++ for (i = 0; i < core_if->hwcfg4.b.num_in_eps; ++i) { ++ if ((TxMsk & core_if->tx_msk) == 0) { ++ core_if->tx_msk |= TxMsk; ++ return i + 1; ++ } ++ TxMsk <<= 1; ++ } ++ return 0; ++} ++ ++/** ++ * This function assigns periodic Tx FIFO to an periodic EP ++ * in shared Tx FIFO mode ++ */ ++static uint32_t assign_perio_tx_fifo(dwc_otg_core_if_t * core_if) ++{ ++ uint32_t PerTxMsk = 1; ++ int i; ++ for (i = 0; i < core_if->hwcfg4.b.num_dev_perio_in_ep; ++i) { ++ if ((PerTxMsk & core_if->p_tx_msk) == 0) { ++ core_if->p_tx_msk |= PerTxMsk; ++ return i + 1; ++ } ++ PerTxMsk <<= 1; ++ } ++ return 0; ++} ++ ++/** ++ * This function releases periodic Tx FIFO ++ * in shared Tx FIFO mode ++ */ ++static void release_perio_tx_fifo(dwc_otg_core_if_t * core_if, ++ uint32_t fifo_num) ++{ ++ core_if->p_tx_msk = ++ (core_if->p_tx_msk & (1 << (fifo_num - 1))) ^ core_if->p_tx_msk; ++} ++ ++/** ++ * This function releases periodic Tx FIFO ++ * in shared Tx FIFO mode ++ */ ++static void release_tx_fifo(dwc_otg_core_if_t * core_if, uint32_t fifo_num) ++{ ++ core_if->tx_msk = ++ (core_if->tx_msk & (1 << (fifo_num - 1))) ^ core_if->tx_msk; ++} ++ ++/** ++ * This function is being called from gadget ++ * to enable PCD endpoint. ++ */ ++int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t * pcd, ++ const uint8_t * ep_desc, void *usb_ep) ++{ ++ int num, dir; ++ dwc_otg_pcd_ep_t *ep = NULL; ++ const usb_endpoint_descriptor_t *desc; ++ dwc_irqflags_t flags; ++ fifosize_data_t dptxfsiz = {.d32 = 0 }; ++ gdfifocfg_data_t gdfifocfg = {.d32 = 0 }; ++ gdfifocfg_data_t gdfifocfgbase = {.d32 = 0 }; ++ int retval = 0; ++ int i, epcount; ++ ++ desc = (const usb_endpoint_descriptor_t *)ep_desc; ++ ++ if (!desc) { ++ pcd->ep0.priv = usb_ep; ++ ep = &pcd->ep0; ++ retval = -DWC_E_INVALID; ++ goto out; ++ } ++ ++ num = UE_GET_ADDR(desc->bEndpointAddress); ++ dir = UE_GET_DIR(desc->bEndpointAddress); ++ ++ if (!desc->wMaxPacketSize) { ++ DWC_WARN("bad maxpacketsize\n"); ++ retval = -DWC_E_INVALID; ++ goto out; ++ } ++ ++ if (dir == UE_DIR_IN) { ++ epcount = pcd->core_if->dev_if->num_in_eps; ++ for (i = 0; i < epcount; i++) { ++ if (num == pcd->in_ep[i].dwc_ep.num) { ++ ep = &pcd->in_ep[i]; ++ break; ++ } ++ } ++ } else { ++ epcount = pcd->core_if->dev_if->num_out_eps; ++ for (i = 0; i < epcount; i++) { ++ if (num == pcd->out_ep[i].dwc_ep.num) { ++ ep = &pcd->out_ep[i]; ++ break; ++ } ++ } ++ } ++ ++ if (!ep) { ++ DWC_WARN("bad address\n"); ++ retval = -DWC_E_INVALID; ++ goto out; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ++ ep->desc = desc; ++ ep->priv = usb_ep; ++ ++ /* ++ * Activate the EP ++ */ ++ ep->stopped = 0; ++ ++ ep->dwc_ep.is_in = (dir == UE_DIR_IN); ++ ep->dwc_ep.maxpacket = UGETW(desc->wMaxPacketSize); ++ ++ ep->dwc_ep.type = desc->bmAttributes & UE_XFERTYPE; ++ ++ if (ep->dwc_ep.is_in) { ++ if (!GET_CORE_IF(pcd)->en_multiple_tx_fifo) { ++ ep->dwc_ep.tx_fifo_num = 0; ++ ++ if (ep->dwc_ep.type == UE_ISOCHRONOUS) { ++ /* ++ * if ISOC EP then assign a Periodic Tx FIFO. ++ */ ++ ep->dwc_ep.tx_fifo_num = ++ assign_perio_tx_fifo(GET_CORE_IF(pcd)); ++ } ++ } else { ++ /* ++ * if Dedicated FIFOs mode is on then assign a Tx FIFO. ++ */ ++ ep->dwc_ep.tx_fifo_num = ++ assign_tx_fifo(GET_CORE_IF(pcd)); ++ } ++ ++ /* Calculating EP info controller base address */ ++ if (ep->dwc_ep.tx_fifo_num ++ && GET_CORE_IF(pcd)->en_multiple_tx_fifo) { ++ gdfifocfg.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)-> ++ core_global_regs->gdfifocfg); ++ gdfifocfgbase.d32 = gdfifocfg.d32 >> 16; ++ dptxfsiz.d32 = ++ (DWC_READ_REG32 ++ (&GET_CORE_IF(pcd)->core_global_regs-> ++ dtxfsiz[ep->dwc_ep.tx_fifo_num - 1]) >> 16); ++ gdfifocfg.b.epinfobase = ++ gdfifocfgbase.d32 + dptxfsiz.d32; ++ if (GET_CORE_IF(pcd)->snpsid <= OTG_CORE_REV_2_94a) { ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)-> ++ core_global_regs->gdfifocfg, ++ gdfifocfg.d32); ++ } ++ } ++ } ++ /* Set initial data PID. */ ++ if (ep->dwc_ep.type == UE_BULK) { ++ ep->dwc_ep.data_pid_start = 0; ++ } ++ ++ /* Alloc DMA Descriptors */ ++ if (GET_CORE_IF(pcd)->dma_desc_enable) { ++#ifndef DWC_UTE_PER_IO ++ if (ep->dwc_ep.type != UE_ISOCHRONOUS) { ++#endif ++ ep->dwc_ep.desc_addr = ++ dwc_otg_ep_alloc_desc_chain(&ep-> ++ dwc_ep.dma_desc_addr, ++ MAX_DMA_DESC_CNT); ++ if (!ep->dwc_ep.desc_addr) { ++ DWC_WARN("%s, can't allocate DMA descriptor\n", ++ __func__); ++ retval = -DWC_E_SHUTDOWN; ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ goto out; ++ } ++#ifndef DWC_UTE_PER_IO ++ } ++#endif ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "Activate %s: type=%d, mps=%d desc=%p\n", ++ (ep->dwc_ep.is_in ? "IN" : "OUT"), ++ ep->dwc_ep.type, ep->dwc_ep.maxpacket, ep->desc); ++#ifdef DWC_UTE_PER_IO ++ ep->dwc_ep.xiso_bInterval = 1 << (ep->desc->bInterval - 1); ++#endif ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ ep->dwc_ep.bInterval = 1 << (ep->desc->bInterval - 1); ++ ep->dwc_ep.frame_num = 0xFFFFFFFF; ++ } ++ ++ dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep); ++ ++#ifdef DWC_UTE_CFI ++ if (pcd->cfi->ops.ep_enable) { ++ pcd->cfi->ops.ep_enable(pcd->cfi, pcd, ep); ++ } ++#endif ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++out: ++ return retval; ++} ++ ++/** ++ * This function is being called from gadget ++ * to disable PCD endpoint. ++ */ ++int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t * pcd, void *ep_handle) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_irqflags_t flags; ++ dwc_otg_dev_dma_desc_t *desc_addr; ++ dwc_dma_t dma_desc_addr; ++ gdfifocfg_data_t gdfifocfgbase = {.d32 = 0 }; ++ gdfifocfg_data_t gdfifocfg = {.d32 = 0 }; ++ fifosize_data_t dptxfsiz = {.d32 = 0 }; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ ++ if (!ep || !ep->desc) { ++ DWC_DEBUGPL(DBG_PCD, "bad ep address\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ++ dwc_otg_request_nuke(ep); ++ ++ dwc_otg_ep_deactivate(GET_CORE_IF(pcd), &ep->dwc_ep); ++ if (pcd->core_if->core_params->dev_out_nak) { ++ DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[ep->dwc_ep.num]); ++ pcd->core_if->ep_xfer_info[ep->dwc_ep.num].state = 0; ++ } ++ ep->desc = NULL; ++ ep->stopped = 1; ++ ++ gdfifocfg.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)->core_global_regs->gdfifocfg); ++ gdfifocfgbase.d32 = gdfifocfg.d32 >> 16; ++ ++ if (ep->dwc_ep.is_in) { ++ if (GET_CORE_IF(pcd)->en_multiple_tx_fifo) { ++ /* Flush the Tx FIFO */ ++ dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd), ++ ep->dwc_ep.tx_fifo_num); ++ } ++ release_perio_tx_fifo(GET_CORE_IF(pcd), ep->dwc_ep.tx_fifo_num); ++ release_tx_fifo(GET_CORE_IF(pcd), ep->dwc_ep.tx_fifo_num); ++ if (GET_CORE_IF(pcd)->en_multiple_tx_fifo) { ++ /* Decreasing EPinfo Base Addr */ ++ dptxfsiz.d32 = ++ (DWC_READ_REG32 ++ (&GET_CORE_IF(pcd)-> ++ core_global_regs->dtxfsiz[ep->dwc_ep.tx_fifo_num-1]) >> 16); ++ gdfifocfg.b.epinfobase = gdfifocfgbase.d32 - dptxfsiz.d32; ++ if (GET_CORE_IF(pcd)->snpsid <= OTG_CORE_REV_2_94a) { ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gdfifocfg, ++ gdfifocfg.d32); ++ } ++ } ++ } ++ ++ /* Free DMA Descriptors */ ++ if (GET_CORE_IF(pcd)->dma_desc_enable) { ++ if (ep->dwc_ep.type != UE_ISOCHRONOUS) { ++ desc_addr = ep->dwc_ep.desc_addr; ++ dma_desc_addr = ep->dwc_ep.dma_desc_addr; ++ ++ /* Cannot call dma_free_coherent() with IRQs disabled */ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ dwc_otg_ep_free_desc_chain(desc_addr, dma_desc_addr, ++ MAX_DMA_DESC_CNT); ++ ++ goto out_unlocked; ++ } ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++out_unlocked: ++ DWC_DEBUGPL(DBG_PCD, "%d %s disabled\n", ep->dwc_ep.num, ++ ep->dwc_ep.is_in ? "IN" : "OUT"); ++ return 0; ++ ++} ++ ++/******************************************************************************/ ++#ifdef DWC_UTE_PER_IO ++ ++/** ++ * Free the request and its extended parts ++ * ++ */ ++void dwc_pcd_xiso_ereq_free(dwc_otg_pcd_ep_t * ep, dwc_otg_pcd_request_t * req) ++{ ++ DWC_FREE(req->ext_req.per_io_frame_descs); ++ DWC_FREE(req); ++} ++ ++/** ++ * Start the next request in the endpoint's queue. ++ * ++ */ ++int dwc_otg_pcd_xiso_start_next_request(dwc_otg_pcd_t * pcd, ++ dwc_otg_pcd_ep_t * ep) ++{ ++ int i; ++ dwc_otg_pcd_request_t *req = NULL; ++ dwc_ep_t *dwcep = NULL; ++ struct dwc_iso_xreq_port *ereq = NULL; ++ struct dwc_iso_pkt_desc_port *ddesc_iso; ++ uint16_t nat; ++ depctl_data_t diepctl; ++ ++ dwcep = &ep->dwc_ep; ++ ++ if (dwcep->xiso_active_xfers > 0) { ++#if 0 //Disable this to decrease s/w overhead that is crucial for Isoc transfers ++ DWC_WARN("There are currently active transfers for EP%d \ ++ (active=%d; queued=%d)", dwcep->num, dwcep->xiso_active_xfers, ++ dwcep->xiso_queued_xfers); ++#endif ++ return 0; ++ } ++ ++ nat = UGETW(ep->desc->wMaxPacketSize); ++ nat = (nat >> 11) & 0x03; ++ ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ ereq = &req->ext_req; ++ ep->stopped = 0; ++ ++ /* Get the frame number */ ++ dwcep->xiso_frame_num = ++ dwc_otg_get_frame_number(GET_CORE_IF(pcd)); ++ DWC_DEBUG("FRM_NUM=%d", dwcep->xiso_frame_num); ++ ++ ddesc_iso = ereq->per_io_frame_descs; ++ ++ if (dwcep->is_in) { ++ /* Setup DMA Descriptor chain for IN Isoc request */ ++ for (i = 0; i < ereq->pio_pkt_count; i++) { ++ //if ((i % (nat + 1)) == 0) ++ if ( i > 0 ) ++ dwcep->xiso_frame_num = ++ (dwcep->xiso_bInterval + ++ dwcep->xiso_frame_num) & 0x3FFF; ++ dwcep->desc_addr[i].buf = ++ req->dma + ddesc_iso[i].offset; ++ dwcep->desc_addr[i].status.b_iso_in.txbytes = ++ ddesc_iso[i].length; ++ dwcep->desc_addr[i].status.b_iso_in.framenum = ++ dwcep->xiso_frame_num; ++ dwcep->desc_addr[i].status.b_iso_in.bs = ++ BS_HOST_READY; ++ dwcep->desc_addr[i].status.b_iso_in.txsts = 0; ++ dwcep->desc_addr[i].status.b_iso_in.sp = ++ (ddesc_iso[i].length % ++ dwcep->maxpacket) ? 1 : 0; ++ dwcep->desc_addr[i].status.b_iso_in.ioc = 0; ++ dwcep->desc_addr[i].status.b_iso_in.pid = nat + 1; ++ dwcep->desc_addr[i].status.b_iso_in.l = 0; ++ ++ /* Process the last descriptor */ ++ if (i == ereq->pio_pkt_count - 1) { ++ dwcep->desc_addr[i].status.b_iso_in.ioc = 1; ++ dwcep->desc_addr[i].status.b_iso_in.l = 1; ++ } ++ } ++ ++ /* Setup and start the transfer for this endpoint */ ++ dwcep->xiso_active_xfers++; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->dev_if-> ++ in_ep_regs[dwcep->num]->diepdma, ++ dwcep->dma_desc_addr); ++ diepctl.d32 = 0; ++ diepctl.b.epena = 1; ++ diepctl.b.cnak = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->dev_if-> ++ in_ep_regs[dwcep->num]->diepctl, 0, ++ diepctl.d32); ++ } else { ++ /* Setup DMA Descriptor chain for OUT Isoc request */ ++ for (i = 0; i < ereq->pio_pkt_count; i++) { ++ //if ((i % (nat + 1)) == 0) ++ dwcep->xiso_frame_num = (dwcep->xiso_bInterval + ++ dwcep->xiso_frame_num) & 0x3FFF; ++ dwcep->desc_addr[i].buf = ++ req->dma + ddesc_iso[i].offset; ++ dwcep->desc_addr[i].status.b_iso_out.rxbytes = ++ ddesc_iso[i].length; ++ dwcep->desc_addr[i].status.b_iso_out.framenum = ++ dwcep->xiso_frame_num; ++ dwcep->desc_addr[i].status.b_iso_out.bs = ++ BS_HOST_READY; ++ dwcep->desc_addr[i].status.b_iso_out.rxsts = 0; ++ dwcep->desc_addr[i].status.b_iso_out.sp = ++ (ddesc_iso[i].length % ++ dwcep->maxpacket) ? 1 : 0; ++ dwcep->desc_addr[i].status.b_iso_out.ioc = 0; ++ dwcep->desc_addr[i].status.b_iso_out.pid = nat + 1; ++ dwcep->desc_addr[i].status.b_iso_out.l = 0; ++ ++ /* Process the last descriptor */ ++ if (i == ereq->pio_pkt_count - 1) { ++ dwcep->desc_addr[i].status.b_iso_out.ioc = 1; ++ dwcep->desc_addr[i].status.b_iso_out.l = 1; ++ } ++ } ++ ++ /* Setup and start the transfer for this endpoint */ ++ dwcep->xiso_active_xfers++; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)-> ++ dev_if->out_ep_regs[dwcep->num]-> ++ doepdma, dwcep->dma_desc_addr); ++ diepctl.d32 = 0; ++ diepctl.b.epena = 1; ++ diepctl.b.cnak = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)-> ++ dev_if->out_ep_regs[dwcep->num]-> ++ doepctl, 0, diepctl.d32); ++ } ++ ++ } else { ++ ep->stopped = 1; ++ } ++ ++ return 0; ++} ++ ++/** ++ * - Remove the request from the queue ++ */ ++void complete_xiso_ep(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_pcd_request_t *req = NULL; ++ struct dwc_iso_xreq_port *ereq = NULL; ++ struct dwc_iso_pkt_desc_port *ddesc_iso = NULL; ++ dwc_ep_t *dwcep = NULL; ++ int i; ++ ++ //DWC_DEBUG(); ++ dwcep = &ep->dwc_ep; ++ ++ /* Get the first pending request from the queue */ ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ if (!req) { ++ DWC_PRINTF("complete_ep 0x%p, req = NULL!\n", ep); ++ return; ++ } ++ dwcep->xiso_active_xfers--; ++ dwcep->xiso_queued_xfers--; ++ /* Remove this request from the queue */ ++ DWC_CIRCLEQ_REMOVE_INIT(&ep->queue, req, queue_entry); ++ } else { ++ DWC_PRINTF("complete_ep 0x%p, ep->queue empty!\n", ep); ++ return; ++ } ++ ++ ep->stopped = 1; ++ ereq = &req->ext_req; ++ ddesc_iso = ereq->per_io_frame_descs; ++ ++ if (dwcep->xiso_active_xfers < 0) { ++ DWC_WARN("EP#%d (xiso_active_xfers=%d)", dwcep->num, ++ dwcep->xiso_active_xfers); ++ } ++ ++ /* Fill the Isoc descs of portable extended req from dma descriptors */ ++ for (i = 0; i < ereq->pio_pkt_count; i++) { ++ if (dwcep->is_in) { /* IN endpoints */ ++ ddesc_iso[i].actual_length = ddesc_iso[i].length - ++ dwcep->desc_addr[i].status.b_iso_in.txbytes; ++ ddesc_iso[i].status = ++ dwcep->desc_addr[i].status.b_iso_in.txsts; ++ } else { /* OUT endpoints */ ++ ddesc_iso[i].actual_length = ddesc_iso[i].length - ++ dwcep->desc_addr[i].status.b_iso_out.rxbytes; ++ ddesc_iso[i].status = ++ dwcep->desc_addr[i].status.b_iso_out.rxsts; ++ } ++ } ++ ++ DWC_SPINUNLOCK(ep->pcd->lock); ++ ++ /* Call the completion function in the non-portable logic */ ++ ep->pcd->fops->xisoc_complete(ep->pcd, ep->priv, req->priv, 0, ++ &req->ext_req); ++ ++ DWC_SPINLOCK(ep->pcd->lock); ++ ++ /* Free the request - specific freeing needed for extended request object */ ++ dwc_pcd_xiso_ereq_free(ep, req); ++ ++ /* Start the next request */ ++ dwc_otg_pcd_xiso_start_next_request(ep->pcd, ep); ++ ++ return; ++} ++ ++/** ++ * Create and initialize the Isoc pkt descriptors of the extended request. ++ * ++ */ ++static int dwc_otg_pcd_xiso_create_pkt_descs(dwc_otg_pcd_request_t * req, ++ void *ereq_nonport, ++ int atomic_alloc) ++{ ++ struct dwc_iso_xreq_port *ereq = NULL; ++ struct dwc_iso_xreq_port *req_mapped = NULL; ++ struct dwc_iso_pkt_desc_port *ipds = NULL; /* To be created in this function */ ++ uint32_t pkt_count; ++ int i; ++ ++ ereq = &req->ext_req; ++ req_mapped = (struct dwc_iso_xreq_port *)ereq_nonport; ++ pkt_count = req_mapped->pio_pkt_count; ++ ++ /* Create the isoc descs */ ++ if (atomic_alloc) { ++ ipds = DWC_ALLOC_ATOMIC(sizeof(*ipds) * pkt_count); ++ } else { ++ ipds = DWC_ALLOC(sizeof(*ipds) * pkt_count); ++ } ++ ++ if (!ipds) { ++ DWC_ERROR("Failed to allocate isoc descriptors"); ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ /* Initialize the extended request fields */ ++ ereq->per_io_frame_descs = ipds; ++ ereq->error_count = 0; ++ ereq->pio_alloc_pkt_count = pkt_count; ++ ereq->pio_pkt_count = pkt_count; ++ ereq->tr_sub_flags = req_mapped->tr_sub_flags; ++ ++ /* Init the Isoc descriptors */ ++ for (i = 0; i < pkt_count; i++) { ++ ipds[i].length = req_mapped->per_io_frame_descs[i].length; ++ ipds[i].offset = req_mapped->per_io_frame_descs[i].offset; ++ ipds[i].status = req_mapped->per_io_frame_descs[i].status; /* 0 */ ++ ipds[i].actual_length = ++ req_mapped->per_io_frame_descs[i].actual_length; ++ } ++ ++ return 0; ++} ++ ++static void prn_ext_request(struct dwc_iso_xreq_port *ereq) ++{ ++ struct dwc_iso_pkt_desc_port *xfd = NULL; ++ int i; ++ ++ DWC_DEBUG("per_io_frame_descs=%p", ereq->per_io_frame_descs); ++ DWC_DEBUG("tr_sub_flags=%d", ereq->tr_sub_flags); ++ DWC_DEBUG("error_count=%d", ereq->error_count); ++ DWC_DEBUG("pio_alloc_pkt_count=%d", ereq->pio_alloc_pkt_count); ++ DWC_DEBUG("pio_pkt_count=%d", ereq->pio_pkt_count); ++ DWC_DEBUG("res=%d", ereq->res); ++ ++ for (i = 0; i < ereq->pio_pkt_count; i++) { ++ xfd = &ereq->per_io_frame_descs[0]; ++ DWC_DEBUG("FD #%d", i); ++ ++ DWC_DEBUG("xfd->actual_length=%d", xfd->actual_length); ++ DWC_DEBUG("xfd->length=%d", xfd->length); ++ DWC_DEBUG("xfd->offset=%d", xfd->offset); ++ DWC_DEBUG("xfd->status=%d", xfd->status); ++ } ++} ++ ++/** ++ * ++ */ ++int dwc_otg_pcd_xiso_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf, dwc_dma_t dma_buf, uint32_t buflen, ++ int zero, void *req_handle, int atomic_alloc, ++ void *ereq_nonport) ++{ ++ dwc_otg_pcd_request_t *req = NULL; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_irqflags_t flags; ++ int res; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ /* We support this extension only for DDMA mode */ ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) ++ if (!GET_CORE_IF(pcd)->dma_desc_enable) ++ return -DWC_E_INVALID; ++ ++ /* Create a dwc_otg_pcd_request_t object */ ++ if (atomic_alloc) { ++ req = DWC_ALLOC_ATOMIC(sizeof(*req)); ++ } else { ++ req = DWC_ALLOC(sizeof(*req)); ++ } ++ ++ if (!req) { ++ return -DWC_E_NO_MEMORY; ++ } ++ ++ /* Create the Isoc descs for this request which shall be the exact match ++ * of the structure sent to us from the non-portable logic */ ++ res = ++ dwc_otg_pcd_xiso_create_pkt_descs(req, ereq_nonport, atomic_alloc); ++ if (res) { ++ DWC_WARN("Failed to init the Isoc descriptors"); ++ DWC_FREE(req); ++ return res; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ++ DWC_CIRCLEQ_INIT_ENTRY(req, queue_entry); ++ req->buf = buf; ++ req->dma = dma_buf; ++ req->length = buflen; ++ req->sent_zlp = zero; ++ req->priv = req_handle; ++ ++ //DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ep->dwc_ep.dma_addr = dma_buf; ++ ep->dwc_ep.start_xfer_buff = buf; ++ ep->dwc_ep.xfer_buff = buf; ++ ep->dwc_ep.xfer_len = 0; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = buflen; ++ ++ /* Add this request to the tail */ ++ DWC_CIRCLEQ_INSERT_TAIL(&ep->queue, req, queue_entry); ++ ep->dwc_ep.xiso_queued_xfers++; ++ ++//DWC_DEBUG("CP_0"); ++//DWC_DEBUG("req->ext_req.tr_sub_flags=%d", req->ext_req.tr_sub_flags); ++//prn_ext_request((struct dwc_iso_xreq_port *) ereq_nonport); ++//prn_ext_request(&req->ext_req); ++ ++ //DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ /* If the req->status == ASAP then check if there is any active transfer ++ * for this endpoint. If no active transfers, then get the first entry ++ * from the queue and start that transfer ++ */ ++ if (req->ext_req.tr_sub_flags == DWC_EREQ_TF_ASAP) { ++ res = dwc_otg_pcd_xiso_start_next_request(pcd, ep); ++ if (res) { ++ DWC_WARN("Failed to start the next Isoc transfer"); ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ DWC_FREE(req); ++ return res; ++ } ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ return 0; ++} ++ ++#endif ++/* END ifdef DWC_UTE_PER_IO ***************************************************/ ++int dwc_otg_pcd_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf, dwc_dma_t dma_buf, uint32_t buflen, ++ int zero, void *req_handle, int atomic_alloc) ++{ ++ dwc_irqflags_t flags; ++ dwc_otg_pcd_request_t *req; ++ dwc_otg_pcd_ep_t *ep; ++ uint32_t max_transfer; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep || (!ep->desc && ep->dwc_ep.num != 0)) { ++ DWC_WARN("bad ep\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ if (atomic_alloc) { ++ req = DWC_ALLOC_ATOMIC(sizeof(*req)); ++ } else { ++ req = DWC_ALLOC(sizeof(*req)); ++ } ++ ++ if (!req) { ++ return -DWC_E_NO_MEMORY; ++ } ++ DWC_CIRCLEQ_INIT_ENTRY(req, queue_entry); ++ if (!GET_CORE_IF(pcd)->core_params->opt) { ++ if (ep->dwc_ep.num != 0) { ++ DWC_ERROR("queue req %p, len %d buf %p\n", ++ req_handle, buflen, buf); ++ } ++ } ++ ++ req->buf = buf; ++ req->dma = dma_buf; ++ req->length = buflen; ++ req->sent_zlp = zero; ++ req->priv = req_handle; ++ req->dw_align_buf = NULL; ++ if ((dma_buf & 0x3) && GET_CORE_IF(pcd)->dma_enable ++ && !GET_CORE_IF(pcd)->dma_desc_enable) ++ req->dw_align_buf = DWC_DMA_ALLOC(buflen, ++ &req->dw_align_buf_dma); ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ++ /* ++ * After adding request to the queue for IN ISOC wait for In Token Received ++ * when TX FIFO is empty interrupt and for OUT ISOC wait for OUT Token ++ * Received when EP is disabled interrupt to obtain starting microframe ++ * (odd/even) start transfer ++ */ ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ if (req != 0) { ++ depctl_data_t depctl = {.d32 = ++ DWC_READ_REG32(&pcd->core_if->dev_if-> ++ in_ep_regs[ep->dwc_ep.num]-> ++ diepctl) }; ++ ++pcd->request_pending; ++ ++ DWC_CIRCLEQ_INSERT_TAIL(&ep->queue, req, queue_entry); ++ if (ep->dwc_ep.is_in) { ++ depctl.b.cnak = 1; ++ DWC_WRITE_REG32(&pcd->core_if->dev_if-> ++ in_ep_regs[ep->dwc_ep.num]-> ++ diepctl, depctl.d32); ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ } ++ return 0; ++ } ++ ++ /* ++ * For EP0 IN without premature status, zlp is required? ++ */ ++ if (ep->dwc_ep.num == 0 && ep->dwc_ep.is_in) { ++ DWC_DEBUGPL(DBG_PCDV, "%d-OUT ZLP\n", ep->dwc_ep.num); ++ //_req->zero = 1; ++ } ++ ++ /* Start the transfer */ ++ if (DWC_CIRCLEQ_EMPTY(&ep->queue) && !ep->stopped) { ++ /* EP0 Transfer? */ ++ if (ep->dwc_ep.num == 0) { ++ switch (pcd->ep0state) { ++ case EP0_IN_DATA_PHASE: ++ DWC_DEBUGPL(DBG_PCD, ++ "%s ep0: EP0_IN_DATA_PHASE\n", ++ __func__); ++ break; ++ ++ case EP0_OUT_DATA_PHASE: ++ DWC_DEBUGPL(DBG_PCD, ++ "%s ep0: EP0_OUT_DATA_PHASE\n", ++ __func__); ++ if (pcd->request_config) { ++ /* Complete STATUS PHASE */ ++ ep->dwc_ep.is_in = 1; ++ pcd->ep0state = EP0_IN_STATUS_PHASE; ++ } ++ break; ++ ++ case EP0_IN_STATUS_PHASE: ++ DWC_DEBUGPL(DBG_PCD, ++ "%s ep0: EP0_IN_STATUS_PHASE\n", ++ __func__); ++ break; ++ ++ default: ++ DWC_DEBUGPL(DBG_ANY, "ep0: odd state %d\n", ++ pcd->ep0state); ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ return -DWC_E_SHUTDOWN; ++ } ++ ++ ep->dwc_ep.dma_addr = dma_buf; ++ ep->dwc_ep.start_xfer_buff = buf; ++ ep->dwc_ep.xfer_buff = buf; ++ ep->dwc_ep.xfer_len = buflen; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = ep->dwc_ep.xfer_len; ++ ++ if (zero) { ++ if ((ep->dwc_ep.xfer_len % ++ ep->dwc_ep.maxpacket == 0) ++ && (ep->dwc_ep.xfer_len != 0)) { ++ ep->dwc_ep.sent_zlp = 1; ++ } ++ ++ } ++ ++ dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), ++ &ep->dwc_ep); ++ } // non-ep0 endpoints ++ else { ++#ifdef DWC_UTE_CFI ++ if (ep->dwc_ep.buff_mode != BM_STANDARD) { ++ /* store the request length */ ++ ep->dwc_ep.cfi_req_len = buflen; ++ pcd->cfi->ops.build_descriptors(pcd->cfi, pcd, ++ ep, req); ++ } else { ++#endif ++ max_transfer = ++ GET_CORE_IF(ep->pcd)->core_params-> ++ max_transfer_size; ++ ++ /* Setup and start the Transfer */ ++ if (req->dw_align_buf){ ++ if (ep->dwc_ep.is_in) ++ dwc_memcpy(req->dw_align_buf, ++ buf, buflen); ++ ep->dwc_ep.dma_addr = ++ req->dw_align_buf_dma; ++ ep->dwc_ep.start_xfer_buff = ++ req->dw_align_buf; ++ ep->dwc_ep.xfer_buff = ++ req->dw_align_buf; ++ } else { ++ ep->dwc_ep.dma_addr = dma_buf; ++ ep->dwc_ep.start_xfer_buff = buf; ++ ep->dwc_ep.xfer_buff = buf; ++ } ++ ep->dwc_ep.xfer_len = 0; ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = buflen; ++ ++ ep->dwc_ep.maxxfer = max_transfer; ++ if (GET_CORE_IF(pcd)->dma_desc_enable) { ++ uint32_t out_max_xfer = ++ DDMA_MAX_TRANSFER_SIZE - ++ (DDMA_MAX_TRANSFER_SIZE % 4); ++ if (ep->dwc_ep.is_in) { ++ if (ep->dwc_ep.maxxfer > ++ DDMA_MAX_TRANSFER_SIZE) { ++ ep->dwc_ep.maxxfer = ++ DDMA_MAX_TRANSFER_SIZE; ++ } ++ } else { ++ if (ep->dwc_ep.maxxfer > ++ out_max_xfer) { ++ ep->dwc_ep.maxxfer = ++ out_max_xfer; ++ } ++ } ++ } ++ if (ep->dwc_ep.maxxfer < ep->dwc_ep.total_len) { ++ ep->dwc_ep.maxxfer -= ++ (ep->dwc_ep.maxxfer % ++ ep->dwc_ep.maxpacket); ++ } ++ ++ if (zero) { ++ if ((ep->dwc_ep.total_len % ++ ep->dwc_ep.maxpacket == 0) ++ && (ep->dwc_ep.total_len != 0)) { ++ ep->dwc_ep.sent_zlp = 1; ++ } ++ } ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ dwc_otg_ep_start_transfer(GET_CORE_IF(pcd), ++ &ep->dwc_ep); ++ } ++ } ++ ++ if (req != 0) { ++ ++pcd->request_pending; ++ DWC_CIRCLEQ_INSERT_TAIL(&ep->queue, req, queue_entry); ++ if (ep->dwc_ep.is_in && ep->stopped ++ && !(GET_CORE_IF(pcd)->dma_enable)) { ++ /** @todo NGS Create a function for this. */ ++ diepmsk_data_t diepmsk = {.d32 = 0 }; ++ diepmsk.b.intktxfemp = 1; ++ if (GET_CORE_IF(pcd)->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)-> ++ dev_if->dev_global_regs->diepeachintmsk ++ [ep->dwc_ep.num], 0, ++ diepmsk.d32); ++ } else { ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)-> ++ dev_if->dev_global_regs-> ++ diepmsk, 0, diepmsk.d32); ++ } ++ ++ } ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ return 0; ++} ++ ++int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle) ++{ ++ dwc_irqflags_t flags; ++ dwc_otg_pcd_request_t *req; ++ dwc_otg_pcd_ep_t *ep; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ if (!ep || (!ep->desc && ep->dwc_ep.num != 0)) { ++ DWC_WARN("bad argument\n"); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ ++ /* make sure it's actually queued on this endpoint */ ++ DWC_CIRCLEQ_FOREACH(req, &ep->queue, queue_entry) { ++ if (req->priv == (void *)req_handle) { ++ break; ++ } ++ } ++ ++ if (req->priv != (void *)req_handle) { ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ return -DWC_E_INVALID; ++ } ++ ++ if (!DWC_CIRCLEQ_EMPTY_ENTRY(req, queue_entry)) { ++ dwc_otg_request_done(ep, req, -DWC_E_RESTART); ++ } else { ++ req = NULL; ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ return req ? 0 : -DWC_E_SHUTDOWN; ++ ++} ++ ++/** ++ * dwc_otg_pcd_ep_wedge - sets the halt feature and ignores clear requests ++ * ++ * Use this to stall an endpoint and ignore CLEAR_FEATURE(HALT_ENDPOINT) ++ * requests. If the gadget driver clears the halt status, it will ++ * automatically unwedge the endpoint. ++ * ++ * Returns zero on success, else negative DWC error code. ++ */ ++int dwc_otg_pcd_ep_wedge(dwc_otg_pcd_t * pcd, void *ep_handle) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_irqflags_t flags; ++ int retval = 0; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ ++ if ((!ep->desc && ep != &pcd->ep0) || ++ (ep->desc && (ep->desc->bmAttributes == UE_ISOCHRONOUS))) { ++ DWC_WARN("%s, bad ep\n", __func__); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ DWC_WARN("%d %s XFer In process\n", ep->dwc_ep.num, ++ ep->dwc_ep.is_in ? "IN" : "OUT"); ++ retval = -DWC_E_AGAIN; ++ } else { ++ /* This code needs to be reviewed */ ++ if (ep->dwc_ep.is_in == 1 && GET_CORE_IF(pcd)->dma_desc_enable) { ++ dtxfsts_data_t txstatus; ++ fifosize_data_t txfifosize; ++ ++ txfifosize.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)-> ++ core_global_regs->dtxfsiz[ep->dwc_ep. ++ tx_fifo_num]); ++ txstatus.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)-> ++ dev_if->in_ep_regs[ep->dwc_ep.num]-> ++ dtxfsts); ++ ++ if (txstatus.b.txfspcavail < txfifosize.b.depth) { ++ DWC_WARN("%s() Data In Tx Fifo\n", __func__); ++ retval = -DWC_E_AGAIN; ++ } else { ++ if (ep->dwc_ep.num == 0) { ++ pcd->ep0state = EP0_STALL; ++ } ++ ++ ep->stopped = 1; ++ dwc_otg_ep_set_stall(GET_CORE_IF(pcd), ++ &ep->dwc_ep); ++ } ++ } else { ++ if (ep->dwc_ep.num == 0) { ++ pcd->ep0state = EP0_STALL; ++ } ++ ++ ep->stopped = 1; ++ dwc_otg_ep_set_stall(GET_CORE_IF(pcd), &ep->dwc_ep); ++ } ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ return retval; ++} ++ ++int dwc_otg_pcd_ep_halt(dwc_otg_pcd_t * pcd, void *ep_handle, int value) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ dwc_irqflags_t flags; ++ int retval = 0; ++ ++ ep = get_ep_from_handle(pcd, ep_handle); ++ ++ if (!ep || (!ep->desc && ep != &pcd->ep0) || ++ (ep->desc && (ep->desc->bmAttributes == UE_ISOCHRONOUS))) { ++ DWC_WARN("%s, bad ep\n", __func__); ++ return -DWC_E_INVALID; ++ } ++ ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ DWC_WARN("%d %s XFer In process\n", ep->dwc_ep.num, ++ ep->dwc_ep.is_in ? "IN" : "OUT"); ++ retval = -DWC_E_AGAIN; ++ } else if (value == 0) { ++ dwc_otg_ep_clear_stall(GET_CORE_IF(pcd), &ep->dwc_ep); ++ } else if (value == 1) { ++ if (ep->dwc_ep.is_in == 1 && GET_CORE_IF(pcd)->dma_desc_enable) { ++ dtxfsts_data_t txstatus; ++ fifosize_data_t txfifosize; ++ ++ txfifosize.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)->core_global_regs-> ++ dtxfsiz[ep->dwc_ep.tx_fifo_num]); ++ txstatus.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if-> ++ in_ep_regs[ep->dwc_ep.num]->dtxfsts); ++ ++ if (txstatus.b.txfspcavail < txfifosize.b.depth) { ++ DWC_WARN("%s() Data In Tx Fifo\n", __func__); ++ retval = -DWC_E_AGAIN; ++ } else { ++ if (ep->dwc_ep.num == 0) { ++ pcd->ep0state = EP0_STALL; ++ } ++ ++ ep->stopped = 1; ++ dwc_otg_ep_set_stall(GET_CORE_IF(pcd), ++ &ep->dwc_ep); ++ } ++ } else { ++ if (ep->dwc_ep.num == 0) { ++ pcd->ep0state = EP0_STALL; ++ } ++ ++ ep->stopped = 1; ++ dwc_otg_ep_set_stall(GET_CORE_IF(pcd), &ep->dwc_ep); ++ } ++ } else if (value == 2) { ++ ep->dwc_ep.stall_clear_flag = 0; ++ } else if (value == 3) { ++ ep->dwc_ep.stall_clear_flag = 1; ++ } ++ ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ ++ return retval; ++} ++ ++/** ++ * This function initiates remote wakeup of the host from suspend state. ++ */ ++void dwc_otg_pcd_rem_wkup_from_suspend(dwc_otg_pcd_t * pcd, int set) ++{ ++ dctl_data_t dctl = { 0 }; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dsts_data_t dsts; ++ ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ if (!dsts.b.suspsts) { ++ DWC_WARN("Remote wakeup while is not in suspend state\n"); ++ } ++ /* Check if DEVICE_REMOTE_WAKEUP feature enabled */ ++ if (pcd->remote_wakeup_enable) { ++ if (set) { ++ ++ if (core_if->adp_enable) { ++ gpwrdn_data_t gpwrdn; ++ ++ dwc_otg_adp_probe_stop(core_if); ++ ++ /* Mask SRP detected interrupt from Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.srp_det_msk = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gpwrdn, ++ gpwrdn.d32, 0); ++ ++ /* Disable Power Down Logic */ ++ gpwrdn.d32 = 0; ++ gpwrdn.b.pmuactv = 1; ++ DWC_MODIFY_REG32(&core_if-> ++ core_global_regs->gpwrdn, ++ gpwrdn.d32, 0); ++ ++ /* ++ * Initialize the Core for Device mode. ++ */ ++ core_if->op_state = B_PERIPHERAL; ++ dwc_otg_core_init(core_if); ++ dwc_otg_enable_global_interrupts(core_if); ++ cil_pcd_start(core_if); ++ ++ dwc_otg_initiate_srp(core_if); ++ } ++ ++ dctl.b.rmtwkupsig = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ dctl, 0, dctl.d32); ++ DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n"); ++ ++ dwc_mdelay(2); ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ dctl, dctl.d32, 0); ++ DWC_DEBUGPL(DBG_PCD, "Clear Remote Wakeup\n"); ++ } ++ } else { ++ DWC_DEBUGPL(DBG_PCD, "Remote Wakeup is disabled\n"); ++ } ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++/** ++ * This function initiates remote wakeup of the host from L1 sleep state. ++ */ ++void dwc_otg_pcd_rem_wkup_from_sleep(dwc_otg_pcd_t * pcd, int set) ++{ ++ glpmcfg_data_t lpmcfg; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ ++ /* Check if we are in L1 state */ ++ if (!lpmcfg.b.prt_sleep_sts) { ++ DWC_DEBUGPL(DBG_PCD, "Device is not in sleep state\n"); ++ return; ++ } ++ ++ /* Check if host allows remote wakeup */ ++ if (!lpmcfg.b.rem_wkup_en) { ++ DWC_DEBUGPL(DBG_PCD, "Host does not allow remote wakeup\n"); ++ return; ++ } ++ ++ /* Check if Resume OK */ ++ if (!lpmcfg.b.sleep_state_resumeok) { ++ DWC_DEBUGPL(DBG_PCD, "Sleep state resume is not OK\n"); ++ return; ++ } ++ ++ lpmcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->glpmcfg); ++ lpmcfg.b.en_utmi_sleep = 0; ++ lpmcfg.b.hird_thres &= (~(1 << 4)); ++ DWC_WRITE_REG32(&core_if->core_global_regs->glpmcfg, lpmcfg.d32); ++ ++ if (set) { ++ dctl_data_t dctl = {.d32 = 0 }; ++ dctl.b.rmtwkupsig = 1; ++ /* Set RmtWkUpSig bit to start remote wakup signaling. ++ * Hardware will automatically clear this bit. ++ */ ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, ++ 0, dctl.d32); ++ DWC_DEBUGPL(DBG_PCD, "Set Remote Wakeup\n"); ++ } ++ ++} ++#endif ++ ++/** ++ * Performs remote wakeup. ++ */ ++void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t * pcd, int set) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_irqflags_t flags; ++ if (dwc_otg_is_device_mode(core_if)) { ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ if (core_if->lx_state == DWC_OTG_L1) { ++ dwc_otg_pcd_rem_wkup_from_sleep(pcd, set); ++ } else { ++#endif ++ dwc_otg_pcd_rem_wkup_from_suspend(pcd, set); ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ } ++#endif ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++ } ++ return; ++} ++ ++void dwc_otg_pcd_disconnect_us(dwc_otg_pcd_t * pcd, int no_of_usecs) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dctl_data_t dctl = { 0 }; ++ ++ if (dwc_otg_is_device_mode(core_if)) { ++ dctl.b.sftdiscon = 1; ++ DWC_PRINTF("Soft disconnect for %d useconds\n",no_of_usecs); ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, 0, dctl.d32); ++ dwc_udelay(no_of_usecs); ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32,0); ++ ++ } else{ ++ DWC_PRINTF("NOT SUPPORTED IN HOST MODE\n"); ++ } ++ return; ++ ++} ++ ++int dwc_otg_pcd_wakeup(dwc_otg_pcd_t * pcd) ++{ ++ dsts_data_t dsts; ++ gotgctl_data_t gotgctl; ++ ++ /* ++ * This function starts the Protocol if no session is in progress. If ++ * a session is already in progress, but the device is suspended, ++ * remote wakeup signaling is started. ++ */ ++ ++ /* Check if valid session */ ++ gotgctl.d32 = ++ DWC_READ_REG32(&(GET_CORE_IF(pcd)->core_global_regs->gotgctl)); ++ if (gotgctl.b.bsesvld) { ++ /* Check if suspend state */ ++ dsts.d32 = ++ DWC_READ_REG32(& ++ (GET_CORE_IF(pcd)->dev_if-> ++ dev_global_regs->dsts)); ++ if (dsts.b.suspsts) { ++ dwc_otg_pcd_remote_wakeup(pcd, 1); ++ } ++ } else { ++ dwc_otg_pcd_initiate_srp(pcd); ++ } ++ ++ return 0; ++ ++} ++ ++/** ++ * Start the SRP timer to detect when the SRP does not complete within ++ * 6 seconds. ++ * ++ * @param pcd the pcd structure. ++ */ ++void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t * pcd) ++{ ++ dwc_irqflags_t flags; ++ DWC_SPINLOCK_IRQSAVE(pcd->lock, &flags); ++ dwc_otg_initiate_srp(GET_CORE_IF(pcd)); ++ DWC_SPINUNLOCK_IRQRESTORE(pcd->lock, flags); ++} ++ ++int dwc_otg_pcd_get_frame_number(dwc_otg_pcd_t * pcd) ++{ ++ return dwc_otg_get_frame_number(GET_CORE_IF(pcd)); ++} ++ ++int dwc_otg_pcd_is_lpm_enabled(dwc_otg_pcd_t * pcd) ++{ ++ return GET_CORE_IF(pcd)->core_params->lpm_enable; ++} ++ ++uint32_t get_b_hnp_enable(dwc_otg_pcd_t * pcd) ++{ ++ return pcd->b_hnp_enable; ++} ++ ++uint32_t get_a_hnp_support(dwc_otg_pcd_t * pcd) ++{ ++ return pcd->a_hnp_support; ++} ++ ++uint32_t get_a_alt_hnp_support(dwc_otg_pcd_t * pcd) ++{ ++ return pcd->a_alt_hnp_support; ++} ++ ++int dwc_otg_pcd_get_rmwkup_enable(dwc_otg_pcd_t * pcd) ++{ ++ return pcd->remote_wakeup_enable; ++} ++ ++#endif /* DWC_HOST_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,266 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd.h $ ++ * $Revision: #48 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_HOST_ONLY ++#if !defined(__DWC_PCD_H__) ++#define __DWC_PCD_H__ ++ ++#include "dwc_otg_os_dep.h" ++#include "usb.h" ++#include "dwc_otg_cil.h" ++#include "dwc_otg_pcd_if.h" ++struct cfiobject; ++ ++/** ++ * @file ++ * ++ * This file contains the structures, constants, and interfaces for ++ * the Perpherial Contoller Driver (PCD). ++ * ++ * The Peripheral Controller Driver (PCD) for Linux will implement the ++ * Gadget API, so that the existing Gadget drivers can be used. For ++ * the Mass Storage Function driver the File-backed USB Storage Gadget ++ * (FBS) driver will be used. The FBS driver supports the ++ * Control-Bulk (CB), Control-Bulk-Interrupt (CBI), and Bulk-Only ++ * transports. ++ * ++ */ ++ ++/** Invalid DMA Address */ ++#define DWC_DMA_ADDR_INVALID (~(dwc_dma_t)0) ++ ++/** Max Transfer size for any EP */ ++#define DDMA_MAX_TRANSFER_SIZE 65535 ++ ++/** ++ * Get the pointer to the core_if from the pcd pointer. ++ */ ++#define GET_CORE_IF( _pcd ) (_pcd->core_if) ++ ++/** ++ * States of EP0. ++ */ ++typedef enum ep0_state { ++ EP0_DISCONNECT, /* no host */ ++ EP0_IDLE, ++ EP0_IN_DATA_PHASE, ++ EP0_OUT_DATA_PHASE, ++ EP0_IN_STATUS_PHASE, ++ EP0_OUT_STATUS_PHASE, ++ EP0_STALL, ++} ep0state_e; ++ ++/** Fordward declaration.*/ ++struct dwc_otg_pcd; ++ ++/** DWC_otg iso request structure. ++ * ++ */ ++typedef struct usb_iso_request dwc_otg_pcd_iso_request_t; ++ ++#ifdef DWC_UTE_PER_IO ++ ++/** ++ * This shall be the exact analogy of the same type structure defined in the ++ * usb_gadget.h. Each descriptor contains ++ */ ++struct dwc_iso_pkt_desc_port { ++ uint32_t offset; ++ uint32_t length; /* expected length */ ++ uint32_t actual_length; ++ uint32_t status; ++}; ++ ++struct dwc_iso_xreq_port { ++ /** transfer/submission flag */ ++ uint32_t tr_sub_flags; ++ /** Start the request ASAP */ ++#define DWC_EREQ_TF_ASAP 0x00000002 ++ /** Just enqueue the request w/o initiating a transfer */ ++#define DWC_EREQ_TF_ENQUEUE 0x00000004 ++ ++ /** ++ * count of ISO packets attached to this request - shall ++ * not exceed the pio_alloc_pkt_count ++ */ ++ uint32_t pio_pkt_count; ++ /** count of ISO packets allocated for this request */ ++ uint32_t pio_alloc_pkt_count; ++ /** number of ISO packet errors */ ++ uint32_t error_count; ++ /** reserved for future extension */ ++ uint32_t res; ++ /** Will be allocated and freed in the UTE gadget and based on the CFC value */ ++ struct dwc_iso_pkt_desc_port *per_io_frame_descs; ++}; ++#endif ++/** DWC_otg request structure. ++ * This structure is a list of requests. ++ */ ++typedef struct dwc_otg_pcd_request { ++ void *priv; ++ void *buf; ++ dwc_dma_t dma; ++ uint32_t length; ++ uint32_t actual; ++ unsigned sent_zlp:1; ++ /** ++ * Used instead of original buffer if ++ * it(physical address) is not dword-aligned. ++ **/ ++ uint8_t *dw_align_buf; ++ dwc_dma_t dw_align_buf_dma; ++ ++ DWC_CIRCLEQ_ENTRY(dwc_otg_pcd_request) queue_entry; ++#ifdef DWC_UTE_PER_IO ++ struct dwc_iso_xreq_port ext_req; ++ //void *priv_ereq_nport; /* */ ++#endif ++} dwc_otg_pcd_request_t; ++ ++DWC_CIRCLEQ_HEAD(req_list, dwc_otg_pcd_request); ++ ++/** PCD EP structure. ++ * This structure describes an EP, there is an array of EPs in the PCD ++ * structure. ++ */ ++typedef struct dwc_otg_pcd_ep { ++ /** USB EP Descriptor */ ++ const usb_endpoint_descriptor_t *desc; ++ ++ /** queue of dwc_otg_pcd_requests. */ ++ struct req_list queue; ++ unsigned stopped:1; ++ unsigned disabling:1; ++ unsigned dma:1; ++ unsigned queue_sof:1; ++ ++#ifdef DWC_EN_ISOC ++ /** ISOC req handle passed */ ++ void *iso_req_handle; ++#endif //_EN_ISOC_ ++ ++ /** DWC_otg ep data. */ ++ dwc_ep_t dwc_ep; ++ ++ /** Pointer to PCD */ ++ struct dwc_otg_pcd *pcd; ++ ++ void *priv; ++} dwc_otg_pcd_ep_t; ++ ++/** DWC_otg PCD Structure. ++ * This structure encapsulates the data for the dwc_otg PCD. ++ */ ++struct dwc_otg_pcd { ++ const struct dwc_otg_pcd_function_ops *fops; ++ /** The DWC otg device pointer */ ++ struct dwc_otg_device *otg_dev; ++ /** Core Interface */ ++ dwc_otg_core_if_t *core_if; ++ /** State of EP0 */ ++ ep0state_e ep0state; ++ /** EP0 Request is pending */ ++ unsigned ep0_pending:1; ++ /** Indicates when SET CONFIGURATION Request is in process */ ++ unsigned request_config:1; ++ /** The state of the Remote Wakeup Enable. */ ++ unsigned remote_wakeup_enable:1; ++ /** The state of the B-Device HNP Enable. */ ++ unsigned b_hnp_enable:1; ++ /** The state of A-Device HNP Support. */ ++ unsigned a_hnp_support:1; ++ /** The state of the A-Device Alt HNP support. */ ++ unsigned a_alt_hnp_support:1; ++ /** Count of pending Requests */ ++ unsigned request_pending; ++ ++ /** SETUP packet for EP0 ++ * This structure is allocated as a DMA buffer on PCD initialization ++ * with enough space for up to 3 setup packets. ++ */ ++ union { ++ usb_device_request_t req; ++ uint32_t d32[2]; ++ } *setup_pkt; ++ ++ dwc_dma_t setup_pkt_dma_handle; ++ ++ /* Additional buffer and flag for CTRL_WR premature case */ ++ uint8_t *backup_buf; ++ unsigned data_terminated; ++ ++ /** 2-byte dma buffer used to return status from GET_STATUS */ ++ uint16_t *status_buf; ++ dwc_dma_t status_buf_dma_handle; ++ ++ /** EP0 */ ++ dwc_otg_pcd_ep_t ep0; ++ ++ /** Array of IN EPs. */ ++ dwc_otg_pcd_ep_t in_ep[MAX_EPS_CHANNELS - 1]; ++ /** Array of OUT EPs. */ ++ dwc_otg_pcd_ep_t out_ep[MAX_EPS_CHANNELS - 1]; ++ /** number of valid EPs in the above array. */ ++// unsigned num_eps : 4; ++ dwc_spinlock_t *lock; ++ ++ /** Tasklet to defer starting of TEST mode transmissions until ++ * Status Phase has been completed. ++ */ ++ dwc_tasklet_t *test_mode_tasklet; ++ ++ /** Tasklet to delay starting of xfer in DMA mode */ ++ dwc_tasklet_t *start_xfer_tasklet; ++ ++ /** The test mode to enter when the tasklet is executed. */ ++ unsigned test_mode; ++ /** The cfi_api structure that implements most of the CFI API ++ * and OTG specific core configuration functionality ++ */ ++#ifdef DWC_UTE_CFI ++ struct cfiobject *cfi; ++#endif ++ ++}; ++ ++//FIXME this functions should be static, and this prototypes should be removed ++extern void dwc_otg_request_nuke(dwc_otg_pcd_ep_t * ep); ++extern void dwc_otg_request_done(dwc_otg_pcd_ep_t * ep, ++ dwc_otg_pcd_request_t * req, int32_t status); ++ ++void dwc_otg_iso_buffer_done(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep, ++ void *req_handle); ++ ++extern void do_test_mode(void *data); ++#endif ++#endif /* DWC_HOST_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_if.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_if.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,360 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_if.h $ ++ * $Revision: #11 $ ++ * $Date: 2011/10/26 $ ++ * $Change: 1873028 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_HOST_ONLY ++ ++#if !defined(__DWC_PCD_IF_H__) ++#define __DWC_PCD_IF_H__ ++ ++//#include "dwc_os.h" ++#include "dwc_otg_core_if.h" ++ ++/** @file ++ * This file defines DWC_OTG PCD Core API. ++ */ ++ ++struct dwc_otg_pcd; ++typedef struct dwc_otg_pcd dwc_otg_pcd_t; ++ ++/** Maxpacket size for EP0 */ ++#define MAX_EP0_SIZE 64 ++/** Maxpacket size for any EP */ ++#define MAX_PACKET_SIZE 1024 ++ ++/** @name Function Driver Callbacks */ ++/** @{ */ ++ ++/** This function will be called whenever a previously queued request has ++ * completed. The status value will be set to -DWC_E_SHUTDOWN to indicated a ++ * failed or aborted transfer, or -DWC_E_RESTART to indicate the device was reset, ++ * or -DWC_E_TIMEOUT to indicate it timed out, or -DWC_E_INVALID to indicate invalid ++ * parameters. */ ++typedef int (*dwc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int32_t status, ++ uint32_t actual); ++/** ++ * This function will be called whenever a previousle queued ISOC request has ++ * completed. Count of ISOC packets could be read using dwc_otg_pcd_get_iso_packet_count ++ * function. ++ * The status of each ISOC packet could be read using dwc_otg_pcd_get_iso_packet_* ++ * functions. ++ */ ++typedef int (*dwc_isoc_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int proc_buf_num); ++/** This function should handle any SETUP request that cannot be handled by the ++ * PCD Core. This includes most GET_DESCRIPTORs, SET_CONFIGS, Any ++ * class-specific requests, etc. The function must non-blocking. ++ * ++ * Returns 0 on success. ++ * Returns -DWC_E_NOT_SUPPORTED if the request is not supported. ++ * Returns -DWC_E_INVALID if the setup request had invalid parameters or bytes. ++ * Returns -DWC_E_SHUTDOWN on any other error. */ ++typedef int (*dwc_setup_cb_t) (dwc_otg_pcd_t * pcd, uint8_t * bytes); ++/** This is called whenever the device has been disconnected. The function ++ * driver should take appropriate action to clean up all pending requests in the ++ * PCD Core, remove all endpoints (except ep0), and initialize back to reset ++ * state. */ ++typedef int (*dwc_disconnect_cb_t) (dwc_otg_pcd_t * pcd); ++/** This function is called when device has been connected. */ ++typedef int (*dwc_connect_cb_t) (dwc_otg_pcd_t * pcd, int speed); ++/** This function is called when device has been suspended */ ++typedef int (*dwc_suspend_cb_t) (dwc_otg_pcd_t * pcd); ++/** This function is called when device has received LPM tokens, i.e. ++ * device has been sent to sleep state. */ ++typedef int (*dwc_sleep_cb_t) (dwc_otg_pcd_t * pcd); ++/** This function is called when device has been resumed ++ * from suspend(L2) or L1 sleep state. */ ++typedef int (*dwc_resume_cb_t) (dwc_otg_pcd_t * pcd); ++/** This function is called whenever hnp params has been changed. ++ * User can call get_b_hnp_enable, get_a_hnp_support, get_a_alt_hnp_support functions ++ * to get hnp parameters. */ ++typedef int (*dwc_hnp_params_changed_cb_t) (dwc_otg_pcd_t * pcd); ++/** This function is called whenever USB RESET is detected. */ ++typedef int (*dwc_reset_cb_t) (dwc_otg_pcd_t * pcd); ++ ++typedef int (*cfi_setup_cb_t) (dwc_otg_pcd_t * pcd, void *ctrl_req_bytes); ++ ++/** ++ * ++ * @param ep_handle Void pointer to the usb_ep structure ++ * @param ereq_port Pointer to the extended request structure created in the ++ * portable part. ++ */ ++typedef int (*xiso_completion_cb_t) (dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int32_t status, ++ void *ereq_port); ++/** Function Driver Ops Data Structure */ ++struct dwc_otg_pcd_function_ops { ++ dwc_connect_cb_t connect; ++ dwc_disconnect_cb_t disconnect; ++ dwc_setup_cb_t setup; ++ dwc_completion_cb_t complete; ++ dwc_isoc_completion_cb_t isoc_complete; ++ dwc_suspend_cb_t suspend; ++ dwc_sleep_cb_t sleep; ++ dwc_resume_cb_t resume; ++ dwc_reset_cb_t reset; ++ dwc_hnp_params_changed_cb_t hnp_changed; ++ cfi_setup_cb_t cfi_setup; ++#ifdef DWC_UTE_PER_IO ++ xiso_completion_cb_t xisoc_complete; ++#endif ++}; ++/** @} */ ++ ++/** @name Function Driver Functions */ ++/** @{ */ ++ ++/** Call this function to get pointer on dwc_otg_pcd_t, ++ * this pointer will be used for all PCD API functions. ++ * ++ * @param core_if The DWC_OTG Core ++ */ ++extern dwc_otg_pcd_t *dwc_otg_pcd_init(dwc_otg_core_if_t * core_if); ++ ++/** Frees PCD allocated by dwc_otg_pcd_init ++ * ++ * @param pcd The PCD ++ */ ++extern void dwc_otg_pcd_remove(dwc_otg_pcd_t * pcd); ++ ++/** Call this to bind the function driver to the PCD Core. ++ * ++ * @param pcd Pointer on dwc_otg_pcd_t returned by dwc_otg_pcd_init function. ++ * @param fops The Function Driver Ops data structure containing pointers to all callbacks. ++ */ ++extern void dwc_otg_pcd_start(dwc_otg_pcd_t * pcd, ++ const struct dwc_otg_pcd_function_ops *fops); ++ ++/** Enables an endpoint for use. This function enables an endpoint in ++ * the PCD. The endpoint is described by the ep_desc which has the ++ * same format as a USB ep descriptor. The ep_handle parameter is used to refer ++ * to the endpoint from other API functions and in callbacks. Normally this ++ * should be called after a SET_CONFIGURATION/SET_INTERFACE to configure the ++ * core for that interface. ++ * ++ * Returns -DWC_E_INVALID if invalid parameters were passed. ++ * Returns -DWC_E_SHUTDOWN if any other error ocurred. ++ * Returns 0 on success. ++ * ++ * @param pcd The PCD ++ * @param ep_desc Endpoint descriptor ++ * @param usb_ep Handle on endpoint, that will be used to identify endpoint. ++ */ ++extern int dwc_otg_pcd_ep_enable(dwc_otg_pcd_t * pcd, ++ const uint8_t * ep_desc, void *usb_ep); ++ ++/** Disable the endpoint referenced by ep_handle. ++ * ++ * Returns -DWC_E_INVALID if invalid parameters were passed. ++ * Returns -DWC_E_SHUTDOWN if any other error occurred. ++ * Returns 0 on success. */ ++extern int dwc_otg_pcd_ep_disable(dwc_otg_pcd_t * pcd, void *ep_handle); ++ ++/** Queue a data transfer request on the endpoint referenced by ep_handle. ++ * After the transfer is completes, the complete callback will be called with ++ * the request status. ++ * ++ * @param pcd The PCD ++ * @param ep_handle The handle of the endpoint ++ * @param buf The buffer for the data ++ * @param dma_buf The DMA buffer for the data ++ * @param buflen The length of the data transfer ++ * @param zero Specifies whether to send zero length last packet. ++ * @param req_handle Set this handle to any value to use to reference this ++ * request in the ep_dequeue function or from the complete callback ++ * @param atomic_alloc If driver need to perform atomic allocations ++ * for internal data structures. ++ * ++ * Returns -DWC_E_INVALID if invalid parameters were passed. ++ * Returns -DWC_E_SHUTDOWN if any other error ocurred. ++ * Returns 0 on success. */ ++extern int dwc_otg_pcd_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf, dwc_dma_t dma_buf, ++ uint32_t buflen, int zero, void *req_handle, ++ int atomic_alloc); ++#ifdef DWC_UTE_PER_IO ++/** ++ * ++ * @param ereq_nonport Pointer to the extended request part of the ++ * usb_request structure defined in usb_gadget.h file. ++ */ ++extern int dwc_otg_pcd_xiso_ep_queue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf, dwc_dma_t dma_buf, ++ uint32_t buflen, int zero, ++ void *req_handle, int atomic_alloc, ++ void *ereq_nonport); ++ ++#endif ++ ++/** De-queue the specified data transfer that has not yet completed. ++ * ++ * Returns -DWC_E_INVALID if invalid parameters were passed. ++ * Returns -DWC_E_SHUTDOWN if any other error ocurred. ++ * Returns 0 on success. */ ++extern int dwc_otg_pcd_ep_dequeue(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle); ++ ++/** Halt (STALL) an endpoint or clear it. ++ * ++ * Returns -DWC_E_INVALID if invalid parameters were passed. ++ * Returns -DWC_E_SHUTDOWN if any other error ocurred. ++ * Returns -DWC_E_AGAIN if the STALL cannot be sent and must be tried again later ++ * Returns 0 on success. */ ++extern int dwc_otg_pcd_ep_halt(dwc_otg_pcd_t * pcd, void *ep_handle, int value); ++ ++/** This function */ ++extern int dwc_otg_pcd_ep_wedge(dwc_otg_pcd_t * pcd, void *ep_handle); ++ ++/** This function should be called on every hardware interrupt */ ++extern int32_t dwc_otg_pcd_handle_intr(dwc_otg_pcd_t * pcd); ++ ++/** This function returns current frame number */ ++extern int dwc_otg_pcd_get_frame_number(dwc_otg_pcd_t * pcd); ++ ++/** ++ * Start isochronous transfers on the endpoint referenced by ep_handle. ++ * For isochronous transfers duble buffering is used. ++ * After processing each of buffers comlete callback will be called with ++ * status for each transaction. ++ * ++ * @param pcd The PCD ++ * @param ep_handle The handle of the endpoint ++ * @param buf0 The virtual address of first data buffer ++ * @param buf1 The virtual address of second data buffer ++ * @param dma0 The DMA address of first data buffer ++ * @param dma1 The DMA address of second data buffer ++ * @param sync_frame Data pattern frame number ++ * @param dp_frame Data size for pattern frame ++ * @param data_per_frame Data size for regular frame ++ * @param start_frame Frame number to start transfers, if -1 then start transfers ASAP. ++ * @param buf_proc_intrvl Interval of ISOC Buffer processing ++ * @param req_handle Handle of ISOC request ++ * @param atomic_alloc Specefies whether to perform atomic allocation for ++ * internal data structures. ++ * ++ * Returns -DWC_E_NO_MEMORY if there is no enough memory. ++ * Returns -DWC_E_INVALID if incorrect arguments are passed to the function. ++ * Returns -DW_E_SHUTDOWN for any other error. ++ * Returns 0 on success ++ */ ++extern int dwc_otg_pcd_iso_ep_start(dwc_otg_pcd_t * pcd, void *ep_handle, ++ uint8_t * buf0, uint8_t * buf1, ++ dwc_dma_t dma0, dwc_dma_t dma1, ++ int sync_frame, int dp_frame, ++ int data_per_frame, int start_frame, ++ int buf_proc_intrvl, void *req_handle, ++ int atomic_alloc); ++ ++/** Stop ISOC transfers on endpoint referenced by ep_handle. ++ * ++ * @param pcd The PCD ++ * @param ep_handle The handle of the endpoint ++ * @param req_handle Handle of ISOC request ++ * ++ * Returns -DWC_E_INVALID if incorrect arguments are passed to the function ++ * Returns 0 on success ++ */ ++int dwc_otg_pcd_iso_ep_stop(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle); ++ ++/** Get ISOC packet status. ++ * ++ * @param pcd The PCD ++ * @param ep_handle The handle of the endpoint ++ * @param iso_req_handle Isochronoush request handle ++ * @param packet Number of packet ++ * @param status Out parameter for returning status ++ * @param actual Out parameter for returning actual length ++ * @param offset Out parameter for returning offset ++ * ++ */ ++extern void dwc_otg_pcd_get_iso_packet_params(dwc_otg_pcd_t * pcd, ++ void *ep_handle, ++ void *iso_req_handle, int packet, ++ int *status, int *actual, ++ int *offset); ++ ++/** Get ISOC packet count. ++ * ++ * @param pcd The PCD ++ * @param ep_handle The handle of the endpoint ++ * @param iso_req_handle ++ */ ++extern int dwc_otg_pcd_get_iso_packet_count(dwc_otg_pcd_t * pcd, ++ void *ep_handle, ++ void *iso_req_handle); ++ ++/** This function starts the SRP Protocol if no session is in progress. If ++ * a session is already in progress, but the device is suspended, ++ * remote wakeup signaling is started. ++ */ ++extern int dwc_otg_pcd_wakeup(dwc_otg_pcd_t * pcd); ++ ++/** This function returns 1 if LPM support is enabled, and 0 otherwise. */ ++extern int dwc_otg_pcd_is_lpm_enabled(dwc_otg_pcd_t * pcd); ++ ++/** This function returns 1 if remote wakeup is allowed and 0, otherwise. */ ++extern int dwc_otg_pcd_get_rmwkup_enable(dwc_otg_pcd_t * pcd); ++ ++/** Initiate SRP */ ++extern void dwc_otg_pcd_initiate_srp(dwc_otg_pcd_t * pcd); ++ ++/** Starts remote wakeup signaling. */ ++extern void dwc_otg_pcd_remote_wakeup(dwc_otg_pcd_t * pcd, int set); ++ ++/** Starts micorsecond soft disconnect. */ ++extern void dwc_otg_pcd_disconnect_us(dwc_otg_pcd_t * pcd, int no_of_usecs); ++/** This function returns whether device is dualspeed.*/ ++extern uint32_t dwc_otg_pcd_is_dualspeed(dwc_otg_pcd_t * pcd); ++ ++/** This function returns whether device is otg. */ ++extern uint32_t dwc_otg_pcd_is_otg(dwc_otg_pcd_t * pcd); ++ ++/** These functions allow to get hnp parameters */ ++extern uint32_t get_b_hnp_enable(dwc_otg_pcd_t * pcd); ++extern uint32_t get_a_hnp_support(dwc_otg_pcd_t * pcd); ++extern uint32_t get_a_alt_hnp_support(dwc_otg_pcd_t * pcd); ++ ++/** CFI specific Interface functions */ ++/** Allocate a cfi buffer */ ++extern uint8_t *cfiw_ep_alloc_buffer(dwc_otg_pcd_t * pcd, void *pep, ++ dwc_dma_t * addr, size_t buflen, ++ int flags); ++ ++/******************************************************************************/ ++ ++/** @} */ ++ ++#endif /* __DWC_PCD_IF_H__ */ ++ ++#endif /* DWC_HOST_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,5147 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_intr.c $ ++ * $Revision: #116 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_HOST_ONLY ++ ++#include "dwc_otg_pcd.h" ++ ++#ifdef DWC_UTE_CFI ++#include "dwc_otg_cfi.h" ++#endif ++ ++#ifdef DWC_UTE_PER_IO ++extern void complete_xiso_ep(dwc_otg_pcd_ep_t * ep); ++#endif ++//#define PRINT_CFI_DMA_DESCS ++ ++#define DEBUG_EP0 ++ ++/** ++ * This function updates OTG. ++ */ ++static void dwc_otg_pcd_update_otg(dwc_otg_pcd_t * pcd, const unsigned reset) ++{ ++ ++ if (reset) { ++ pcd->b_hnp_enable = 0; ++ pcd->a_hnp_support = 0; ++ pcd->a_alt_hnp_support = 0; ++ } ++ ++ if (pcd->fops->hnp_changed) { ++ pcd->fops->hnp_changed(pcd); ++ } ++} ++ ++/** @file ++ * This file contains the implementation of the PCD Interrupt handlers. ++ * ++ * The PCD handles the device interrupts. Many conditions can cause a ++ * device interrupt. When an interrupt occurs, the device interrupt ++ * service routine determines the cause of the interrupt and ++ * dispatches handling to the appropriate function. These interrupt ++ * handling functions are described below. ++ * All interrupt registers are processed from LSB to MSB. ++ */ ++ ++/** ++ * This function prints the ep0 state for debug purposes. ++ */ ++static inline void print_ep0_state(dwc_otg_pcd_t * pcd) ++{ ++#ifdef DEBUG ++ char str[40]; ++ ++ switch (pcd->ep0state) { ++ case EP0_DISCONNECT: ++ dwc_strcpy(str, "EP0_DISCONNECT"); ++ break; ++ case EP0_IDLE: ++ dwc_strcpy(str, "EP0_IDLE"); ++ break; ++ case EP0_IN_DATA_PHASE: ++ dwc_strcpy(str, "EP0_IN_DATA_PHASE"); ++ break; ++ case EP0_OUT_DATA_PHASE: ++ dwc_strcpy(str, "EP0_OUT_DATA_PHASE"); ++ break; ++ case EP0_IN_STATUS_PHASE: ++ dwc_strcpy(str, "EP0_IN_STATUS_PHASE"); ++ break; ++ case EP0_OUT_STATUS_PHASE: ++ dwc_strcpy(str, "EP0_OUT_STATUS_PHASE"); ++ break; ++ case EP0_STALL: ++ dwc_strcpy(str, "EP0_STALL"); ++ break; ++ default: ++ dwc_strcpy(str, "EP0_INVALID"); ++ } ++ ++ DWC_DEBUGPL(DBG_ANY, "%s(%d)\n", str, pcd->ep0state); ++#endif ++} ++ ++/** ++ * This function calculate the size of the payload in the memory ++ * for out endpoints and prints size for debug purposes(used in ++ * 2.93a DevOutNak feature). ++ */ ++static inline void print_memory_payload(dwc_otg_pcd_t * pcd, dwc_ep_t * ep) ++{ ++#ifdef DEBUG ++ deptsiz_data_t deptsiz_init = {.d32 = 0 }; ++ deptsiz_data_t deptsiz_updt = {.d32 = 0 }; ++ int pack_num; ++ unsigned payload; ++ ++ deptsiz_init.d32 = pcd->core_if->start_doeptsiz_val[ep->num]; ++ deptsiz_updt.d32 = ++ DWC_READ_REG32(&pcd->core_if->dev_if-> ++ out_ep_regs[ep->num]->doeptsiz); ++ /* Payload will be */ ++ payload = deptsiz_init.b.xfersize - deptsiz_updt.b.xfersize; ++ /* Packet count is decremented every time a packet ++ * is written to the RxFIFO not in to the external memory ++ * So, if payload == 0, then it means no packet was sent to ext memory*/ ++ pack_num = (!payload) ? 0 : (deptsiz_init.b.pktcnt - deptsiz_updt.b.pktcnt); ++ DWC_DEBUGPL(DBG_PCDV, ++ "Payload for EP%d-%s\n", ++ ep->num, (ep->is_in ? "IN" : "OUT")); ++ DWC_DEBUGPL(DBG_PCDV, ++ "Number of transfered bytes = 0x%08x\n", payload); ++ DWC_DEBUGPL(DBG_PCDV, ++ "Number of transfered packets = %d\n", pack_num); ++#endif ++} ++ ++ ++#ifdef DWC_UTE_CFI ++static inline void print_desc(struct dwc_otg_dma_desc *ddesc, ++ const uint8_t * epname, int descnum) ++{ ++ CFI_INFO ++ ("%s DMA_DESC(%d) buf=0x%08x bytes=0x%04x; sp=0x%x; l=0x%x; sts=0x%02x; bs=0x%02x\n", ++ epname, descnum, ddesc->buf, ddesc->status.b.bytes, ++ ddesc->status.b.sp, ddesc->status.b.l, ddesc->status.b.sts, ++ ddesc->status.b.bs); ++} ++#endif ++ ++/** ++ * This function returns pointer to in ep struct with number ep_num ++ */ ++static inline dwc_otg_pcd_ep_t *get_in_ep(dwc_otg_pcd_t * pcd, uint32_t ep_num) ++{ ++ int i; ++ int num_in_eps = GET_CORE_IF(pcd)->dev_if->num_in_eps; ++ if (ep_num == 0) { ++ return &pcd->ep0; ++ } else { ++ for (i = 0; i < num_in_eps; ++i) { ++ if (pcd->in_ep[i].dwc_ep.num == ep_num) ++ return &pcd->in_ep[i]; ++ } ++ return 0; ++ } ++} ++ ++/** ++ * This function returns pointer to out ep struct with number ep_num ++ */ ++static inline dwc_otg_pcd_ep_t *get_out_ep(dwc_otg_pcd_t * pcd, uint32_t ep_num) ++{ ++ int i; ++ int num_out_eps = GET_CORE_IF(pcd)->dev_if->num_out_eps; ++ if (ep_num == 0) { ++ return &pcd->ep0; ++ } else { ++ for (i = 0; i < num_out_eps; ++i) { ++ if (pcd->out_ep[i].dwc_ep.num == ep_num) ++ return &pcd->out_ep[i]; ++ } ++ return 0; ++ } ++} ++ ++/** ++ * This functions gets a pointer to an EP from the wIndex address ++ * value of the control request. ++ */ ++dwc_otg_pcd_ep_t *get_ep_by_addr(dwc_otg_pcd_t * pcd, u16 wIndex) ++{ ++ dwc_otg_pcd_ep_t *ep; ++ uint32_t ep_num = UE_GET_ADDR(wIndex); ++ ++ if (ep_num == 0) { ++ ep = &pcd->ep0; ++ } else if (UE_GET_DIR(wIndex) == UE_DIR_IN) { /* in ep */ ++ ep = &pcd->in_ep[ep_num - 1]; ++ } else { ++ ep = &pcd->out_ep[ep_num - 1]; ++ } ++ ++ return ep; ++} ++ ++/** ++ * This function checks the EP request queue, if the queue is not ++ * empty the next request is started. ++ */ ++void start_next_request(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_pcd_request_t *req = 0; ++ uint32_t max_transfer = ++ GET_CORE_IF(ep->pcd)->core_params->max_transfer_size; ++ ++#ifdef DWC_UTE_CFI ++ struct dwc_otg_pcd *pcd; ++ pcd = ep->pcd; ++#endif ++ ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ ++#ifdef DWC_UTE_CFI ++ if (ep->dwc_ep.buff_mode != BM_STANDARD) { ++ ep->dwc_ep.cfi_req_len = req->length; ++ pcd->cfi->ops.build_descriptors(pcd->cfi, pcd, ep, req); ++ } else { ++#endif ++ /* Setup and start the Transfer */ ++ if (req->dw_align_buf) { ++ ep->dwc_ep.dma_addr = req->dw_align_buf_dma; ++ ep->dwc_ep.start_xfer_buff = req->dw_align_buf; ++ ep->dwc_ep.xfer_buff = req->dw_align_buf; ++ } else { ++ ep->dwc_ep.dma_addr = req->dma; ++ ep->dwc_ep.start_xfer_buff = req->buf; ++ ep->dwc_ep.xfer_buff = req->buf; ++ } ++ ep->dwc_ep.sent_zlp = 0; ++ ep->dwc_ep.total_len = req->length; ++ ep->dwc_ep.xfer_len = 0; ++ ep->dwc_ep.xfer_count = 0; ++ ++ ep->dwc_ep.maxxfer = max_transfer; ++ if (GET_CORE_IF(ep->pcd)->dma_desc_enable) { ++ uint32_t out_max_xfer = DDMA_MAX_TRANSFER_SIZE ++ - (DDMA_MAX_TRANSFER_SIZE % 4); ++ if (ep->dwc_ep.is_in) { ++ if (ep->dwc_ep.maxxfer > ++ DDMA_MAX_TRANSFER_SIZE) { ++ ep->dwc_ep.maxxfer = ++ DDMA_MAX_TRANSFER_SIZE; ++ } ++ } else { ++ if (ep->dwc_ep.maxxfer > out_max_xfer) { ++ ep->dwc_ep.maxxfer = ++ out_max_xfer; ++ } ++ } ++ } ++ if (ep->dwc_ep.maxxfer < ep->dwc_ep.total_len) { ++ ep->dwc_ep.maxxfer -= ++ (ep->dwc_ep.maxxfer % ep->dwc_ep.maxpacket); ++ } ++ if (req->sent_zlp) { ++ if ((ep->dwc_ep.total_len % ++ ep->dwc_ep.maxpacket == 0) ++ && (ep->dwc_ep.total_len != 0)) { ++ ep->dwc_ep.sent_zlp = 1; ++ } ++ ++ } ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ dwc_otg_ep_start_transfer(GET_CORE_IF(ep->pcd), &ep->dwc_ep); ++ } else if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ DWC_PRINTF("There are no more ISOC requests \n"); ++ ep->dwc_ep.frame_num = 0xFFFFFFFF; ++ } ++} ++ ++/** ++ * This function handles the SOF Interrupts. At this time the SOF ++ * Interrupt is disabled. ++ */ ++int32_t dwc_otg_pcd_handle_sof_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++ gintsts_data_t gintsts; ++ ++ DWC_DEBUGPL(DBG_PCD, "SOF\n"); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.sofintr = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This function handles the Rx Status Queue Level Interrupt, which ++ * indicates that there is a least one packet in the Rx FIFO. The ++ * packets are moved from the FIFO to memory, where they will be ++ * processed when the Endpoint Interrupt Register indicates Transfer ++ * Complete or SETUP Phase Done. ++ * ++ * Repeat the following until the Rx Status Queue is empty: ++ * -# Read the Receive Status Pop Register (GRXSTSP) to get Packet ++ * info ++ * -# If Receive FIFO is empty then skip to step Clear the interrupt ++ * and exit ++ * -# If SETUP Packet call dwc_otg_read_setup_packet to copy the ++ * SETUP data to the buffer ++ * -# If OUT Data Packet call dwc_otg_read_packet to copy the data ++ * to the destination buffer ++ */ ++int32_t dwc_otg_pcd_handle_rx_status_q_level_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ gintmsk_data_t gintmask = {.d32 = 0 }; ++ device_grxsts_data_t status; ++ dwc_otg_pcd_ep_t *ep; ++ gintsts_data_t gintsts; ++#ifdef DEBUG ++ static char *dpid_str[] = { "D0", "D2", "D1", "MDATA" }; ++#endif ++ ++ //DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, _pcd); ++ /* Disable the Rx Status Queue Level interrupt */ ++ gintmask.b.rxstsqlvl = 1; ++ DWC_MODIFY_REG32(&global_regs->gintmsk, gintmask.d32, 0); ++ ++ /* Get the Status from the top of the FIFO */ ++ status.d32 = DWC_READ_REG32(&global_regs->grxstsp); ++ ++ DWC_DEBUGPL(DBG_PCD, "EP:%d BCnt:%d DPID:%s " ++ "pktsts:%x Frame:%d(0x%0x)\n", ++ status.b.epnum, status.b.bcnt, ++ dpid_str[status.b.dpid], ++ status.b.pktsts, status.b.fn, status.b.fn); ++ /* Get pointer to EP structure */ ++ ep = get_out_ep(pcd, status.b.epnum); ++ ++ switch (status.b.pktsts) { ++ case DWC_DSTS_GOUT_NAK: ++ DWC_DEBUGPL(DBG_PCDV, "Global OUT NAK\n"); ++ break; ++ case DWC_STS_DATA_UPDT: ++ DWC_DEBUGPL(DBG_PCDV, "OUT Data Packet\n"); ++ if (status.b.bcnt && ep->dwc_ep.xfer_buff) { ++ /** @todo NGS Check for buffer overflow? */ ++ dwc_otg_read_packet(core_if, ++ ep->dwc_ep.xfer_buff, ++ status.b.bcnt); ++ ep->dwc_ep.xfer_count += status.b.bcnt; ++ ep->dwc_ep.xfer_buff += status.b.bcnt; ++ } ++ break; ++ case DWC_STS_XFER_COMP: ++ DWC_DEBUGPL(DBG_PCDV, "OUT Complete\n"); ++ break; ++ case DWC_DSTS_SETUP_COMP: ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "Setup Complete\n"); ++#endif ++ break; ++ case DWC_DSTS_SETUP_UPDT: ++ dwc_otg_read_setup_packet(core_if, pcd->setup_pkt->d32); ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, ++ "SETUP PKT: %02x.%02x v%04x i%04x l%04x\n", ++ pcd->setup_pkt->req.bmRequestType, ++ pcd->setup_pkt->req.bRequest, ++ UGETW(pcd->setup_pkt->req.wValue), ++ UGETW(pcd->setup_pkt->req.wIndex), ++ UGETW(pcd->setup_pkt->req.wLength)); ++#endif ++ ep->dwc_ep.xfer_count += status.b.bcnt; ++ break; ++ default: ++ DWC_DEBUGPL(DBG_PCDV, "Invalid Packet Status (0x%0x)\n", ++ status.b.pktsts); ++ break; ++ } ++ ++ /* Enable the Rx Status Queue Level interrupt */ ++ DWC_MODIFY_REG32(&global_regs->gintmsk, 0, gintmask.d32); ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.rxstsqlvl = 1; ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ //DWC_DEBUGPL(DBG_PCDV, "EXIT: %s\n", __func__); ++ return 1; ++} ++ ++/** ++ * This function examines the Device IN Token Learning Queue to ++ * determine the EP number of the last IN token received. This ++ * implementation is for the Mass Storage device where there are only ++ * 2 IN EPs (Control-IN and BULK-IN). ++ * ++ * The EP numbers for the first six IN Tokens are in DTKNQR1 and there ++ * are 8 EP Numbers in each of the other possible DTKNQ Registers. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * ++ */ ++static inline int get_ep_of_last_in_token(dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_device_global_regs_t *dev_global_regs = ++ core_if->dev_if->dev_global_regs; ++ const uint32_t TOKEN_Q_DEPTH = core_if->hwcfg2.b.dev_token_q_depth; ++ /* Number of Token Queue Registers */ ++ const int DTKNQ_REG_CNT = (TOKEN_Q_DEPTH + 7) / 8; ++ dtknq1_data_t dtknqr1; ++ uint32_t in_tkn_epnums[4]; ++ int ndx = 0; ++ int i = 0; ++ volatile uint32_t *addr = &dev_global_regs->dtknqr1; ++ int epnum = 0; ++ ++ //DWC_DEBUGPL(DBG_PCD,"dev_token_q_depth=%d\n",TOKEN_Q_DEPTH); ++ ++ /* Read the DTKNQ Registers */ ++ for (i = 0; i < DTKNQ_REG_CNT; i++) { ++ in_tkn_epnums[i] = DWC_READ_REG32(addr); ++ DWC_DEBUGPL(DBG_PCDV, "DTKNQR%d=0x%08x\n", i + 1, ++ in_tkn_epnums[i]); ++ if (addr == &dev_global_regs->dvbusdis) { ++ addr = &dev_global_regs->dtknqr3_dthrctl; ++ } else { ++ ++addr; ++ } ++ ++ } ++ ++ /* Copy the DTKNQR1 data to the bit field. */ ++ dtknqr1.d32 = in_tkn_epnums[0]; ++ /* Get the EP numbers */ ++ in_tkn_epnums[0] = dtknqr1.b.epnums0_5; ++ ndx = dtknqr1.b.intknwptr - 1; ++ ++ //DWC_DEBUGPL(DBG_PCDV,"ndx=%d\n",ndx); ++ if (ndx == -1) { ++ /** @todo Find a simpler way to calculate the max ++ * queue position.*/ ++ int cnt = TOKEN_Q_DEPTH; ++ if (TOKEN_Q_DEPTH <= 6) { ++ cnt = TOKEN_Q_DEPTH - 1; ++ } else if (TOKEN_Q_DEPTH <= 14) { ++ cnt = TOKEN_Q_DEPTH - 7; ++ } else if (TOKEN_Q_DEPTH <= 22) { ++ cnt = TOKEN_Q_DEPTH - 15; ++ } else { ++ cnt = TOKEN_Q_DEPTH - 23; ++ } ++ epnum = (in_tkn_epnums[DTKNQ_REG_CNT - 1] >> (cnt * 4)) & 0xF; ++ } else { ++ if (ndx <= 5) { ++ epnum = (in_tkn_epnums[0] >> (ndx * 4)) & 0xF; ++ } else if (ndx <= 13) { ++ ndx -= 6; ++ epnum = (in_tkn_epnums[1] >> (ndx * 4)) & 0xF; ++ } else if (ndx <= 21) { ++ ndx -= 14; ++ epnum = (in_tkn_epnums[2] >> (ndx * 4)) & 0xF; ++ } else if (ndx <= 29) { ++ ndx -= 22; ++ epnum = (in_tkn_epnums[3] >> (ndx * 4)) & 0xF; ++ } ++ } ++ //DWC_DEBUGPL(DBG_PCD,"epnum=%d\n",epnum); ++ return epnum; ++} ++ ++/** ++ * This interrupt occurs when the non-periodic Tx FIFO is half-empty. ++ * The active request is checked for the next packet to be loaded into ++ * the non-periodic Tx FIFO. ++ */ ++int32_t dwc_otg_pcd_handle_np_tx_fifo_empty_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ dwc_otg_dev_in_ep_regs_t *ep_regs; ++ gnptxsts_data_t txstatus = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ ++ int epnum = 0; ++ dwc_otg_pcd_ep_t *ep = 0; ++ uint32_t len = 0; ++ int dwords; ++ ++ /* Get the epnum from the IN Token Learning Queue. */ ++ epnum = get_ep_of_last_in_token(core_if); ++ ep = get_in_ep(pcd, epnum); ++ ++ DWC_DEBUGPL(DBG_PCD, "NP TxFifo Empty: %d \n", epnum); ++ ++ ep_regs = core_if->dev_if->in_ep_regs[epnum]; ++ ++ len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count; ++ if (len > ep->dwc_ep.maxpacket) { ++ len = ep->dwc_ep.maxpacket; ++ } ++ dwords = (len + 3) / 4; ++ ++ /* While there is space in the queue and space in the FIFO and ++ * More data to tranfer, Write packets to the Tx FIFO */ ++ txstatus.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ DWC_DEBUGPL(DBG_PCDV, "b4 GNPTXSTS=0x%08x\n", txstatus.d32); ++ ++ while (txstatus.b.nptxqspcavail > 0 && ++ txstatus.b.nptxfspcavail > dwords && ++ ep->dwc_ep.xfer_count < ep->dwc_ep.xfer_len) { ++ /* Write the FIFO */ ++ dwc_otg_ep_write_packet(core_if, &ep->dwc_ep, 0); ++ len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count; ++ ++ if (len > ep->dwc_ep.maxpacket) { ++ len = ep->dwc_ep.maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ txstatus.d32 = DWC_READ_REG32(&global_regs->gnptxsts); ++ DWC_DEBUGPL(DBG_PCDV, "GNPTXSTS=0x%08x\n", txstatus.d32); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "GNPTXSTS=0x%08x\n", ++ DWC_READ_REG32(&global_regs->gnptxsts)); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.nptxfempty = 1; ++ DWC_WRITE_REG32(&global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This function is called when dedicated Tx FIFO Empty interrupt occurs. ++ * The active request is checked for the next packet to be loaded into ++ * apropriate Tx FIFO. ++ */ ++static int32_t write_empty_tx_fifo(dwc_otg_pcd_t * pcd, uint32_t epnum) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dwc_otg_dev_in_ep_regs_t *ep_regs; ++ dtxfsts_data_t txstatus = {.d32 = 0 }; ++ dwc_otg_pcd_ep_t *ep = 0; ++ uint32_t len = 0; ++ int dwords; ++ ++ ep = get_in_ep(pcd, epnum); ++ ++ DWC_DEBUGPL(DBG_PCD, "Dedicated TxFifo Empty: %d \n", epnum); ++ ++ ep_regs = core_if->dev_if->in_ep_regs[epnum]; ++ ++ len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count; ++ ++ if (len > ep->dwc_ep.maxpacket) { ++ len = ep->dwc_ep.maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ ++ /* While there is space in the queue and space in the FIFO and ++ * More data to tranfer, Write packets to the Tx FIFO */ ++ txstatus.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum, txstatus.d32); ++ ++ while (txstatus.b.txfspcavail > dwords && ++ ep->dwc_ep.xfer_count < ep->dwc_ep.xfer_len && ++ ep->dwc_ep.xfer_len != 0) { ++ /* Write the FIFO */ ++ dwc_otg_ep_write_packet(core_if, &ep->dwc_ep, 0); ++ ++ len = ep->dwc_ep.xfer_len - ep->dwc_ep.xfer_count; ++ if (len > ep->dwc_ep.maxpacket) { ++ len = ep->dwc_ep.maxpacket; ++ } ++ ++ dwords = (len + 3) / 4; ++ txstatus.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts); ++ DWC_DEBUGPL(DBG_PCDV, "dtxfsts[%d]=0x%08x\n", epnum, ++ txstatus.d32); ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "b4 dtxfsts[%d]=0x%08x\n", epnum, ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dtxfsts)); ++ ++ return 1; ++} ++ ++/** ++ * This function is called when the Device is disconnected. It stops ++ * any active requests and informs the Gadget driver of the ++ * disconnect. ++ */ ++void dwc_otg_pcd_stop(dwc_otg_pcd_t * pcd) ++{ ++ int i, num_in_eps, num_out_eps; ++ dwc_otg_pcd_ep_t *ep; ++ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_SPINLOCK(pcd->lock); ++ ++ num_in_eps = GET_CORE_IF(pcd)->dev_if->num_in_eps; ++ num_out_eps = GET_CORE_IF(pcd)->dev_if->num_out_eps; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s() \n", __func__); ++ /* don't disconnect drivers more than once */ ++ if (pcd->ep0state == EP0_DISCONNECT) { ++ DWC_DEBUGPL(DBG_ANY, "%s() Already Disconnected\n", __func__); ++ DWC_SPINUNLOCK(pcd->lock); ++ return; ++ } ++ pcd->ep0state = EP0_DISCONNECT; ++ ++ /* Reset the OTG state. */ ++ dwc_otg_pcd_update_otg(pcd, 1); ++ ++ /* Disable the NP Tx Fifo Empty Interrupt. */ ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* Flush the FIFOs */ ++ /**@todo NGS Flush Periodic FIFOs */ ++ dwc_otg_flush_tx_fifo(GET_CORE_IF(pcd), 0x10); ++ dwc_otg_flush_rx_fifo(GET_CORE_IF(pcd)); ++ ++ /* prevent new request submissions, kill any outstanding requests */ ++ ep = &pcd->ep0; ++ dwc_otg_request_nuke(ep); ++ /* prevent new request submissions, kill any outstanding requests */ ++ for (i = 0; i < num_in_eps; i++) { ++ dwc_otg_pcd_ep_t *ep = &pcd->in_ep[i]; ++ dwc_otg_request_nuke(ep); ++ } ++ /* prevent new request submissions, kill any outstanding requests */ ++ for (i = 0; i < num_out_eps; i++) { ++ dwc_otg_pcd_ep_t *ep = &pcd->out_ep[i]; ++ dwc_otg_request_nuke(ep); ++ } ++ ++ /* report disconnect; the driver is already quiesced */ ++ if (pcd->fops->disconnect) { ++ DWC_SPINUNLOCK(pcd->lock); ++ pcd->fops->disconnect(pcd); ++ DWC_SPINLOCK(pcd->lock); ++ } ++ DWC_SPINUNLOCK(pcd->lock); ++} ++ ++/** ++ * This interrupt indicates that ... ++ */ ++int32_t dwc_otg_pcd_handle_i2c_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "i2cintr"); ++ intr_mask.b.i2cintr = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.i2cintr = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that ... ++ */ ++int32_t dwc_otg_pcd_handle_early_suspend_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintsts_data_t gintsts; ++#if defined(VERBOSE) ++ DWC_PRINTF("Early Suspend Detected\n"); ++#endif ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.erlysuspend = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ return 1; ++} ++ ++/** ++ * This function configures EPO to receive SETUP packets. ++ * ++ * @todo NGS: Update the comments from the HW FS. ++ * ++ * -# Program the following fields in the endpoint specific registers ++ * for Control OUT EP 0, in order to receive a setup packet ++ * - DOEPTSIZ0.Packet Count = 3 (To receive up to 3 back to back ++ * setup packets) ++ * - DOEPTSIZE0.Transfer Size = 24 Bytes (To receive up to 3 back ++ * to back setup packets) ++ * - In DMA mode, DOEPDMA0 Register with a memory address to ++ * store any setup packets received ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param pcd Programming view of the PCD. ++ */ ++static inline void ep0_out_start(dwc_otg_core_if_t * core_if, ++ dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ deptsiz0_data_t doeptsize0 = {.d32 = 0 }; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ depctl_data_t doepctl = {.d32 = 0 }; ++ ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, "%s() doepctl0=%0x\n", __func__, ++ DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl)); ++#endif ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ doepctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl); ++ if (doepctl.b.epena) { ++ return; ++ } ++ } ++ ++ doeptsize0.b.supcnt = 3; ++ doeptsize0.b.pktcnt = 1; ++ doeptsize0.b.xfersize = 8 * 3; ++ ++ if (core_if->dma_enable) { ++ if (!core_if->dma_desc_enable) { ++ /** put here as for Hermes mode deptisz register should not be written */ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doeptsiz, ++ doeptsize0.d32); ++ ++ /** @todo dma needs to handle multiple setup packets (up to 3) */ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepdma, ++ pcd->setup_pkt_dma_handle); ++ } else { ++ dev_if->setup_desc_index = ++ (dev_if->setup_desc_index + 1) & 1; ++ dma_desc = ++ dev_if->setup_desc_addr[dev_if->setup_desc_index]; ++ ++ /** DMA Descriptor Setup */ ++ dma_desc->status.b.bs = BS_HOST_BUSY; ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ dma_desc->status.b.sr = 0; ++ dma_desc->status.b.mtrf = 0; ++ } ++ dma_desc->status.b.l = 1; ++ dma_desc->status.b.ioc = 1; ++ dma_desc->status.b.bytes = pcd->ep0.dwc_ep.maxpacket; ++ dma_desc->buf = pcd->setup_pkt_dma_handle; ++ dma_desc->status.b.sts = 0; ++ dma_desc->status.b.bs = BS_HOST_READY; ++ ++ /** DOEPDMA0 Register write */ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepdma, ++ dev_if->dma_setup_desc_addr ++ [dev_if->setup_desc_index]); ++ } ++ ++ } else { ++ /** put here as for Hermes mode deptisz register should not be written */ ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doeptsiz, ++ doeptsize0.d32); ++ } ++ ++ /** DOEPCTL0 Register write cnak will be set after setup interrupt */ ++ doepctl.d32 = 0; ++ doepctl.b.epena = 1; ++ if (core_if->snpsid <= OTG_CORE_REV_2_94a) { ++ doepctl.b.cnak = 1; ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[0]->doepctl, doepctl.d32); ++ } else { ++ DWC_MODIFY_REG32(&dev_if->out_ep_regs[0]->doepctl, 0, doepctl.d32); ++ } ++ ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, "doepctl0=%0x\n", ++ DWC_READ_REG32(&dev_if->out_ep_regs[0]->doepctl)); ++ DWC_DEBUGPL(DBG_PCDV, "diepctl0=%0x\n", ++ DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl)); ++#endif ++} ++ ++/** ++ * This interrupt occurs when a USB Reset is detected. When the USB ++ * Reset Interrupt occurs the device state is set to DEFAULT and the ++ * EP0 state is set to IDLE. ++ * -# Set the NAK bit for all OUT endpoints (DOEPCTLn.SNAK = 1) ++ * -# Unmask the following interrupt bits ++ * - DAINTMSK.INEP0 = 1 (Control 0 IN endpoint) ++ * - DAINTMSK.OUTEP0 = 1 (Control 0 OUT endpoint) ++ * - DOEPMSK.SETUP = 1 ++ * - DOEPMSK.XferCompl = 1 ++ * - DIEPMSK.XferCompl = 1 ++ * - DIEPMSK.TimeOut = 1 ++ * -# Program the following fields in the endpoint specific registers ++ * for Control OUT EP 0, in order to receive a setup packet ++ * - DOEPTSIZ0.Packet Count = 3 (To receive up to 3 back to back ++ * setup packets) ++ * - DOEPTSIZE0.Transfer Size = 24 Bytes (To receive up to 3 back ++ * to back setup packets) ++ * - In DMA mode, DOEPDMA0 Register with a memory address to ++ * store any setup packets received ++ * At this point, all the required initialization, except for enabling ++ * the control 0 OUT endpoint is done, for receiving SETUP packets. ++ */ ++int32_t dwc_otg_pcd_handle_usb_reset_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ depctl_data_t doepctl = {.d32 = 0 }; ++ depctl_data_t diepctl = {.d32 = 0 }; ++ daint_data_t daintmsk = {.d32 = 0 }; ++ doepmsk_data_t doepmsk = {.d32 = 0 }; ++ diepmsk_data_t diepmsk = {.d32 = 0 }; ++ dcfg_data_t dcfg = {.d32 = 0 }; ++ grstctl_t resetctl = {.d32 = 0 }; ++ dctl_data_t dctl = {.d32 = 0 }; ++ int i = 0; ++ gintsts_data_t gintsts; ++ pcgcctl_data_t power = {.d32 = 0 }; ++ ++ power.d32 = DWC_READ_REG32(core_if->pcgcctl); ++ if (power.b.stoppclk) { ++ power.d32 = 0; ++ power.b.stoppclk = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0); ++ ++ power.b.pwrclmp = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0); ++ ++ power.b.rstpdwnmodule = 1; ++ DWC_MODIFY_REG32(core_if->pcgcctl, power.d32, 0); ++ } ++ ++ core_if->lx_state = DWC_OTG_L0; ++ ++ DWC_PRINTF("USB RESET\n"); ++#ifdef DWC_EN_ISOC ++ for (i = 1; i < 16; ++i) { ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ ep = get_in_ep(pcd, i); ++ if (ep != 0) { ++ dwc_ep = &ep->dwc_ep; ++ dwc_ep->next_frame = 0xffffffff; ++ } ++ } ++#endif /* DWC_EN_ISOC */ ++ ++ /* reset the HNP settings */ ++ dwc_otg_pcd_update_otg(pcd, 1); ++ ++ /* Clear the Remote Wakeup Signalling */ ++ dctl.b.rmtwkupsig = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, 0); ++ ++ /* Set NAK for all OUT EPs */ ++ doepctl.b.snak = 1; ++ for (i = 0; i <= dev_if->num_out_eps; i++) { ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, doepctl.d32); ++ } ++ ++ /* Flush the NP Tx FIFO */ ++ dwc_otg_flush_tx_fifo(core_if, 0x10); ++ /* Flush the Learning Queue */ ++ resetctl.b.intknqflsh = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32); ++ ++ if (!core_if->core_params->en_multiple_tx_fifo && core_if->dma_enable) { ++ core_if->start_predict = 0; ++ for (i = 0; i<= core_if->dev_if->num_in_eps; ++i) { ++ core_if->nextep_seq[i] = 0xff; // 0xff - EP not active ++ } ++ core_if->nextep_seq[0] = 0; ++ core_if->first_in_nextep_seq = 0; ++ diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[0]->diepctl); ++ diepctl.b.nextep = 0; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[0]->diepctl, diepctl.d32); ++ ++ /* Update IN Endpoint Mismatch Count by active IN NP EP count + 1 */ ++ dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg); ++ dcfg.b.epmscnt = 2; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "%s first_in_nextep_seq= %2d; nextep_seq[]:\n", ++ __func__, core_if->first_in_nextep_seq); ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_DEBUGPL(DBG_PCDV, "%2d\n", core_if->nextep_seq[i]); ++ } ++ } ++ ++ if (core_if->multiproc_int_enable) { ++ daintmsk.b.inep0 = 1; ++ daintmsk.b.outep0 = 1; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->deachintmsk, ++ daintmsk.d32); ++ ++ doepmsk.b.setup = 1; ++ doepmsk.b.xfercompl = 1; ++ doepmsk.b.ahberr = 1; ++ doepmsk.b.epdisabled = 1; ++ ++ if ((core_if->dma_desc_enable) || ++ (core_if->dma_enable ++ && core_if->snpsid >= OTG_CORE_REV_3_00a)) { ++ doepmsk.b.stsphsercvd = 1; ++ } ++ if (core_if->dma_desc_enable) ++ doepmsk.b.bna = 1; ++/* ++ doepmsk.b.babble = 1; ++ doepmsk.b.nyet = 1; ++ ++ if (core_if->dma_enable) { ++ doepmsk.b.nak = 1; ++ } ++*/ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->doepeachintmsk[0], ++ doepmsk.d32); ++ ++ diepmsk.b.xfercompl = 1; ++ diepmsk.b.timeout = 1; ++ diepmsk.b.epdisabled = 1; ++ diepmsk.b.ahberr = 1; ++ diepmsk.b.intknepmis = 1; ++ if (!core_if->en_multiple_tx_fifo && core_if->dma_enable) ++ diepmsk.b.intknepmis = 0; ++ ++/* if (core_if->dma_desc_enable) { ++ diepmsk.b.bna = 1; ++ } ++*/ ++/* ++ if (core_if->dma_enable) { ++ diepmsk.b.nak = 1; ++ } ++*/ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->diepeachintmsk[0], ++ diepmsk.d32); ++ } else { ++ daintmsk.b.inep0 = 1; ++ daintmsk.b.outep0 = 1; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->daintmsk, ++ daintmsk.d32); ++ ++ doepmsk.b.setup = 1; ++ doepmsk.b.xfercompl = 1; ++ doepmsk.b.ahberr = 1; ++ doepmsk.b.epdisabled = 1; ++ ++ if ((core_if->dma_desc_enable) || ++ (core_if->dma_enable ++ && core_if->snpsid >= OTG_CORE_REV_3_00a)) { ++ doepmsk.b.stsphsercvd = 1; ++ } ++ if (core_if->dma_desc_enable) ++ doepmsk.b.bna = 1; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->doepmsk, doepmsk.d32); ++ ++ diepmsk.b.xfercompl = 1; ++ diepmsk.b.timeout = 1; ++ diepmsk.b.epdisabled = 1; ++ diepmsk.b.ahberr = 1; ++ if (!core_if->en_multiple_tx_fifo && core_if->dma_enable) ++ diepmsk.b.intknepmis = 0; ++/* ++ if (core_if->dma_desc_enable) { ++ diepmsk.b.bna = 1; ++ } ++*/ ++ ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->diepmsk, diepmsk.d32); ++ } ++ ++ /* Reset Device Address */ ++ dcfg.d32 = DWC_READ_REG32(&dev_if->dev_global_regs->dcfg); ++ dcfg.b.devaddr = 0; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dcfg, dcfg.d32); ++ ++ /* setup EP0 to receive SETUP packets */ ++ if (core_if->snpsid <= OTG_CORE_REV_2_94a) ++ ep0_out_start(core_if, pcd); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.usbreset = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * Get the device speed from the device status register and convert it ++ * to USB speed constant. ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ */ ++static int get_device_speed(dwc_otg_core_if_t * core_if) ++{ ++ dsts_data_t dsts; ++ int speed = 0; ++ dsts.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dsts); ++ ++ switch (dsts.b.enumspd) { ++ case DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ: ++ speed = USB_SPEED_HIGH; ++ break; ++ case DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ: ++ case DWC_DSTS_ENUMSPD_FS_PHY_48MHZ: ++ speed = USB_SPEED_FULL; ++ break; ++ ++ case DWC_DSTS_ENUMSPD_LS_PHY_6MHZ: ++ speed = USB_SPEED_LOW; ++ break; ++ } ++ ++ return speed; ++} ++ ++/** ++ * Read the device status register and set the device speed in the ++ * data structure. ++ * Set up EP0 to receive SETUP packets by calling dwc_ep0_activate. ++ */ ++int32_t dwc_otg_pcd_handle_enum_done_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ gintsts_data_t gintsts; ++ gusbcfg_data_t gusbcfg; ++ dwc_otg_core_global_regs_t *global_regs = ++ GET_CORE_IF(pcd)->core_global_regs; ++ uint8_t utmi16b, utmi8b; ++ int speed; ++ DWC_DEBUGPL(DBG_PCD, "SPEED ENUM\n"); ++ ++ if (GET_CORE_IF(pcd)->snpsid >= OTG_CORE_REV_2_60a) { ++ utmi16b = 6; //vahrama old value was 6; ++ utmi8b = 9; ++ } else { ++ utmi16b = 4; ++ utmi8b = 8; ++ } ++ dwc_otg_ep0_activate(GET_CORE_IF(pcd), &ep0->dwc_ep); ++ if (GET_CORE_IF(pcd)->snpsid >= OTG_CORE_REV_3_00a) { ++ ep0_out_start(GET_CORE_IF(pcd), pcd); ++ } ++ ++#ifdef DEBUG_EP0 ++ print_ep0_state(pcd); ++#endif ++ ++ if (pcd->ep0state == EP0_DISCONNECT) { ++ pcd->ep0state = EP0_IDLE; ++ } else if (pcd->ep0state == EP0_STALL) { ++ pcd->ep0state = EP0_IDLE; ++ } ++ ++ pcd->ep0state = EP0_IDLE; ++ ++ ep0->stopped = 0; ++ ++ speed = get_device_speed(GET_CORE_IF(pcd)); ++ pcd->fops->connect(pcd, speed); ++ ++ /* Set USB turnaround time based on device speed and PHY interface. */ ++ gusbcfg.d32 = DWC_READ_REG32(&global_regs->gusbcfg); ++ if (speed == USB_SPEED_HIGH) { ++ if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == ++ DWC_HWCFG2_HS_PHY_TYPE_ULPI) { ++ /* ULPI interface */ ++ gusbcfg.b.usbtrdtim = 9; ++ } ++ if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == ++ DWC_HWCFG2_HS_PHY_TYPE_UTMI) { ++ /* UTMI+ interface */ ++ if (GET_CORE_IF(pcd)->hwcfg4.b.utmi_phy_data_width == 0) { ++ gusbcfg.b.usbtrdtim = utmi8b; ++ } else if (GET_CORE_IF(pcd)->hwcfg4. ++ b.utmi_phy_data_width == 1) { ++ gusbcfg.b.usbtrdtim = utmi16b; ++ } else if (GET_CORE_IF(pcd)-> ++ core_params->phy_utmi_width == 8) { ++ gusbcfg.b.usbtrdtim = utmi8b; ++ } else { ++ gusbcfg.b.usbtrdtim = utmi16b; ++ } ++ } ++ if (GET_CORE_IF(pcd)->hwcfg2.b.hs_phy_type == ++ DWC_HWCFG2_HS_PHY_TYPE_UTMI_ULPI) { ++ /* UTMI+ OR ULPI interface */ ++ if (gusbcfg.b.ulpi_utmi_sel == 1) { ++ /* ULPI interface */ ++ gusbcfg.b.usbtrdtim = 9; ++ } else { ++ /* UTMI+ interface */ ++ if (GET_CORE_IF(pcd)-> ++ core_params->phy_utmi_width == 16) { ++ gusbcfg.b.usbtrdtim = utmi16b; ++ } else { ++ gusbcfg.b.usbtrdtim = utmi8b; ++ } ++ } ++ } ++ } else { ++ /* Full or low speed */ ++ gusbcfg.b.usbtrdtim = 9; ++ } ++ DWC_WRITE_REG32(&global_regs->gusbcfg, gusbcfg.d32); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.enumdone = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that the ISO OUT Packet was dropped due to ++ * Rx FIFO full or Rx Status Queue Full. If this interrupt occurs ++ * read all the data from the Rx FIFO. ++ */ ++int32_t dwc_otg_pcd_handle_isoc_out_packet_dropped_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ ++ DWC_WARN("INTERRUPT Handler not implemented for %s\n", ++ "ISOC Out Dropped"); ++ ++ intr_mask.b.isooutdrop = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.isooutdrop = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates the end of the portion of the micro-frame ++ * for periodic transactions. If there is a periodic transaction for ++ * the next frame, load the packets into the EP periodic Tx FIFO. ++ */ ++int32_t dwc_otg_pcd_handle_end_periodic_frame_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "EOP"); ++ ++ intr_mask.b.eopframe = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.eopframe = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that EP of the packet on the top of the ++ * non-periodic Tx FIFO does not match EP of the IN Token received. ++ * ++ * The "Device IN Token Queue" Registers are read to determine the ++ * order the IN Tokens have been received. The non-periodic Tx FIFO ++ * is flushed, so it can be reloaded in the order seen in the IN Token ++ * Queue. ++ */ ++int32_t dwc_otg_pcd_handle_ep_mismatch_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintsts_data_t gintsts; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dctl_data_t dctl; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ if (!core_if->en_multiple_tx_fifo && core_if->dma_enable) { ++ core_if->start_predict = 1; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, core_if); ++ ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ if (!gintsts.b.ginnakeff) { ++ /* Disable EP Mismatch interrupt */ ++ intr_mask.d32 = 0; ++ intr_mask.b.epmismatch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, intr_mask.d32, 0); ++ /* Enable the Global IN NAK Effective Interrupt */ ++ intr_mask.d32 = 0; ++ intr_mask.b.ginnakeff = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, intr_mask.d32); ++ /* Set the global non-periodic IN NAK handshake */ ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl); ++ dctl.b.sgnpinnak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32); ++ } else { ++ DWC_PRINTF("gintsts.b.ginnakeff = 1! dctl.b.sgnpinnak not set\n"); ++ } ++ /* Disabling of all EP's will be done in dwc_otg_pcd_handle_in_nak_effective() ++ * handler after Global IN NAK Effective interrupt will be asserted */ ++ } ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.epmismatch = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This interrupt is valid only in DMA mode. This interrupt indicates that the ++ * core has stopped fetching data for IN endpoints due to the unavailability of ++ * TxFIFO space or Request Queue space. This interrupt is used by the ++ * application for an endpoint mismatch algorithm. ++ * ++ * @param pcd The PCD ++ */ ++int32_t dwc_otg_pcd_handle_ep_fetsusp_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintsts_data_t gintsts; ++ gintmsk_data_t gintmsk_data; ++ dctl_data_t dctl; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, core_if); ++ ++ /* Clear the global non-periodic IN NAK handshake */ ++ dctl.d32 = 0; ++ dctl.b.cgnpinnak = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); ++ ++ /* Mask GINTSTS.FETSUSP interrupt */ ++ gintmsk_data.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ gintmsk_data.b.fetsusp = 0; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, gintmsk_data.d32); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.fetsusp = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintsts, gintsts.d32); ++ ++ return 1; ++} ++/** ++ * This funcion stalls EP0. ++ */ ++static inline void ep0_do_stall(dwc_otg_pcd_t * pcd, const int err_val) ++{ ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ usb_device_request_t *ctrl = &pcd->setup_pkt->req; ++ DWC_WARN("req %02x.%02x protocol STALL; err %d\n", ++ ctrl->bmRequestType, ctrl->bRequest, err_val); ++ ++ ep0->dwc_ep.is_in = 1; ++ dwc_otg_ep_set_stall(GET_CORE_IF(pcd), &ep0->dwc_ep); ++ pcd->ep0.stopped = 1; ++ pcd->ep0state = EP0_IDLE; ++ ep0_out_start(GET_CORE_IF(pcd), pcd); ++} ++ ++/** ++ * This functions delegates the setup command to the gadget driver. ++ */ ++static inline void do_gadget_setup(dwc_otg_pcd_t * pcd, ++ usb_device_request_t * ctrl) ++{ ++ int ret = 0; ++ DWC_SPINUNLOCK(pcd->lock); ++ ret = pcd->fops->setup(pcd, (uint8_t *) ctrl); ++ DWC_SPINLOCK(pcd->lock); ++ if (ret < 0) { ++ ep0_do_stall(pcd, ret); ++ } ++ ++ /** @todo This is a g_file_storage gadget driver specific ++ * workaround: a DELAYED_STATUS result from the fsg_setup ++ * routine will result in the gadget queueing a EP0 IN status ++ * phase for a two-stage control transfer. Exactly the same as ++ * a SET_CONFIGURATION/SET_INTERFACE except that this is a class ++ * specific request. Need a generic way to know when the gadget ++ * driver will queue the status phase. Can we assume when we ++ * call the gadget driver setup() function that it will always ++ * queue and require the following flag? Need to look into ++ * this. ++ */ ++ ++ if (ret == 256 + 999) { ++ pcd->request_config = 1; ++ } ++} ++ ++#ifdef DWC_UTE_CFI ++/** ++ * This functions delegates the CFI setup commands to the gadget driver. ++ * This function will return a negative value to indicate a failure. ++ */ ++static inline int cfi_gadget_setup(dwc_otg_pcd_t * pcd, ++ struct cfi_usb_ctrlrequest *ctrl_req) ++{ ++ int ret = 0; ++ ++ if (pcd->fops && pcd->fops->cfi_setup) { ++ DWC_SPINUNLOCK(pcd->lock); ++ ret = pcd->fops->cfi_setup(pcd, ctrl_req); ++ DWC_SPINLOCK(pcd->lock); ++ if (ret < 0) { ++ ep0_do_stall(pcd, ret); ++ return ret; ++ } ++ } ++ ++ return ret; ++} ++#endif ++ ++/** ++ * This function starts the Zero-Length Packet for the IN status phase ++ * of a 2 stage control transfer. ++ */ ++static inline void do_setup_in_status_phase(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ if (pcd->ep0state == EP0_STALL) { ++ return; ++ } ++ ++ pcd->ep0state = EP0_IN_STATUS_PHASE; ++ ++ /* Prepare for more SETUP Packets */ ++ DWC_DEBUGPL(DBG_PCD, "EP0 IN ZLP\n"); ++ if ((GET_CORE_IF(pcd)->snpsid >= OTG_CORE_REV_3_00a) ++ && (pcd->core_if->dma_desc_enable) ++ && (ep0->dwc_ep.xfer_count < ep0->dwc_ep.total_len)) { ++ DWC_DEBUGPL(DBG_PCDV, ++ "Data terminated wait next packet in out_desc_addr\n"); ++ pcd->backup_buf = phys_to_virt(ep0->dwc_ep.dma_addr); ++ pcd->data_terminated = 1; ++ } ++ ep0->dwc_ep.xfer_len = 0; ++ ep0->dwc_ep.xfer_count = 0; ++ ep0->dwc_ep.is_in = 1; ++ ep0->dwc_ep.dma_addr = pcd->setup_pkt_dma_handle; ++ dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep); ++ ++ /* Prepare for more SETUP Packets */ ++ //ep0_out_start(GET_CORE_IF(pcd), pcd); ++} ++ ++/** ++ * This function starts the Zero-Length Packet for the OUT status phase ++ * of a 2 stage control transfer. ++ */ ++static inline void do_setup_out_status_phase(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ if (pcd->ep0state == EP0_STALL) { ++ DWC_DEBUGPL(DBG_PCD, "EP0 STALLED\n"); ++ return; ++ } ++ pcd->ep0state = EP0_OUT_STATUS_PHASE; ++ ++ DWC_DEBUGPL(DBG_PCD, "EP0 OUT ZLP\n"); ++ ep0->dwc_ep.xfer_len = 0; ++ ep0->dwc_ep.xfer_count = 0; ++ ep0->dwc_ep.is_in = 0; ++ ep0->dwc_ep.dma_addr = pcd->setup_pkt_dma_handle; ++ dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep); ++ ++ /* Prepare for more SETUP Packets */ ++ if (GET_CORE_IF(pcd)->dma_enable == 0) { ++ ep0_out_start(GET_CORE_IF(pcd), pcd); ++ } ++} ++ ++/** ++ * Clear the EP halt (STALL) and if pending requests start the ++ * transfer. ++ */ ++static inline void pcd_clear_halt(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep) ++{ ++ if (ep->dwc_ep.stall_clear_flag == 0) ++ dwc_otg_ep_clear_stall(GET_CORE_IF(pcd), &ep->dwc_ep); ++ ++ /* Reactive the EP */ ++ dwc_otg_ep_activate(GET_CORE_IF(pcd), &ep->dwc_ep); ++ if (ep->stopped) { ++ ep->stopped = 0; ++ /* If there is a request in the EP queue start it */ ++ ++ /** @todo FIXME: this causes an EP mismatch in DMA mode. ++ * epmismatch not yet implemented. */ ++ ++ /* ++ * Above fixme is solved by implmenting a tasklet to call the ++ * start_next_request(), outside of interrupt context at some ++ * time after the current time, after a clear-halt setup packet. ++ * Still need to implement ep mismatch in the future if a gadget ++ * ever uses more than one endpoint at once ++ */ ++ ep->queue_sof = 1; ++ DWC_TASK_SCHEDULE(pcd->start_xfer_tasklet); ++ } ++ /* Start Control Status Phase */ ++ do_setup_in_status_phase(pcd); ++} ++ ++/** ++ * This function is called when the SET_FEATURE TEST_MODE Setup packet ++ * is sent from the host. The Device Control register is written with ++ * the Test Mode bits set to the specified Test Mode. This is done as ++ * a tasklet so that the "Status" phase of the control transfer ++ * completes before transmitting the TEST packets. ++ * ++ * @todo This has not been tested since the tasklet struct was put ++ * into the PCD struct! ++ * ++ */ ++void do_test_mode(void *data) ++{ ++ dctl_data_t dctl; ++ dwc_otg_pcd_t *pcd = (dwc_otg_pcd_t *) data; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ int test_mode = pcd->test_mode; ++ ++// DWC_WARN("%s() has not been tested since being rewritten!\n", __func__); ++ ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl); ++ switch (test_mode) { ++ case 1: // TEST_J ++ dctl.b.tstctl = 1; ++ break; ++ ++ case 2: // TEST_K ++ dctl.b.tstctl = 2; ++ break; ++ ++ case 3: // TEST_SE0_NAK ++ dctl.b.tstctl = 3; ++ break; ++ ++ case 4: // TEST_PACKET ++ dctl.b.tstctl = 4; ++ break; ++ ++ case 5: // TEST_FORCE_ENABLE ++ dctl.b.tstctl = 5; ++ break; ++ } ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32); ++} ++ ++/** ++ * This function process the GET_STATUS Setup Commands. ++ */ ++static inline void do_get_status(dwc_otg_pcd_t * pcd) ++{ ++ usb_device_request_t ctrl = pcd->setup_pkt->req; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ uint16_t *status = pcd->status_buf; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, ++ "GET_STATUS %02x.%02x v%04x i%04x l%04x\n", ++ ctrl.bmRequestType, ctrl.bRequest, ++ UGETW(ctrl.wValue), UGETW(ctrl.wIndex), ++ UGETW(ctrl.wLength)); ++#endif ++ ++ switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) { ++ case UT_DEVICE: ++ if(UGETW(ctrl.wIndex) == 0xF000) { /* OTG Status selector */ ++ DWC_PRINTF("wIndex - %d\n", UGETW(ctrl.wIndex)); ++ DWC_PRINTF("OTG VERSION - %d\n", core_if->otg_ver); ++ DWC_PRINTF("OTG CAP - %d, %d\n", ++ core_if->core_params->otg_cap, ++ DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE); ++ if (core_if->otg_ver == 1 ++ && core_if->core_params->otg_cap == ++ DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) { ++ uint8_t *otgsts = (uint8_t*)pcd->status_buf; ++ *otgsts = (core_if->otg_sts & 0x1); ++ pcd->ep0_pending = 1; ++ ep0->dwc_ep.start_xfer_buff = ++ (uint8_t *) otgsts; ++ ep0->dwc_ep.xfer_buff = (uint8_t *) otgsts; ++ ep0->dwc_ep.dma_addr = ++ pcd->status_buf_dma_handle; ++ ep0->dwc_ep.xfer_len = 1; ++ ep0->dwc_ep.xfer_count = 0; ++ ep0->dwc_ep.total_len = ep0->dwc_ep.xfer_len; ++ dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), ++ &ep0->dwc_ep); ++ return; ++ } else { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ break; ++ } else { ++ *status = 0x1; /* Self powered */ ++ *status |= pcd->remote_wakeup_enable << 1; ++ break; ++ } ++ case UT_INTERFACE: ++ *status = 0; ++ break; ++ ++ case UT_ENDPOINT: ++ ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex)); ++ if (ep == 0 || UGETW(ctrl.wLength) > 2) { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ /** @todo check for EP stall */ ++ *status = ep->stopped; ++ break; ++ } ++ pcd->ep0_pending = 1; ++ ep0->dwc_ep.start_xfer_buff = (uint8_t *) status; ++ ep0->dwc_ep.xfer_buff = (uint8_t *) status; ++ ep0->dwc_ep.dma_addr = pcd->status_buf_dma_handle; ++ ep0->dwc_ep.xfer_len = 2; ++ ep0->dwc_ep.xfer_count = 0; ++ ep0->dwc_ep.total_len = ep0->dwc_ep.xfer_len; ++ dwc_otg_ep0_start_transfer(GET_CORE_IF(pcd), &ep0->dwc_ep); ++} ++ ++/** ++ * This function process the SET_FEATURE Setup Commands. ++ */ ++static inline void do_set_feature(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++ usb_device_request_t ctrl = pcd->setup_pkt->req; ++ dwc_otg_pcd_ep_t *ep = 0; ++ int32_t otg_cap_param = core_if->core_params->otg_cap; ++ gotgctl_data_t gotgctl = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_PCD, "SET_FEATURE:%02x.%02x v%04x i%04x l%04x\n", ++ ctrl.bmRequestType, ctrl.bRequest, ++ UGETW(ctrl.wValue), UGETW(ctrl.wIndex), ++ UGETW(ctrl.wLength)); ++ DWC_DEBUGPL(DBG_PCD, "otg_cap=%d\n", otg_cap_param); ++ ++ switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) { ++ case UT_DEVICE: ++ switch (UGETW(ctrl.wValue)) { ++ case UF_DEVICE_REMOTE_WAKEUP: ++ pcd->remote_wakeup_enable = 1; ++ break; ++ ++ case UF_TEST_MODE: ++ /* Setup the Test Mode tasklet to do the Test ++ * Packet generation after the SETUP Status ++ * phase has completed. */ ++ ++ /** @todo This has not been tested since the ++ * tasklet struct was put into the PCD ++ * struct! */ ++ pcd->test_mode = UGETW(ctrl.wIndex) >> 8; ++ DWC_TASK_SCHEDULE(pcd->test_mode_tasklet); ++ break; ++ ++ case UF_DEVICE_B_HNP_ENABLE: ++ DWC_DEBUGPL(DBG_PCDV, ++ "SET_FEATURE: USB_DEVICE_B_HNP_ENABLE\n"); ++ ++ /* dev may initiate HNP */ ++ if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) { ++ pcd->b_hnp_enable = 1; ++ dwc_otg_pcd_update_otg(pcd, 0); ++ DWC_DEBUGPL(DBG_PCD, "Request B HNP\n"); ++ /**@todo Is the gotgctl.devhnpen cleared ++ * by a USB Reset? */ ++ gotgctl.b.devhnpen = 1; ++ gotgctl.b.hnpreq = 1; ++ DWC_WRITE_REG32(&global_regs->gotgctl, ++ gotgctl.d32); ++ } else { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ break; ++ ++ case UF_DEVICE_A_HNP_SUPPORT: ++ /* RH port supports HNP */ ++ DWC_DEBUGPL(DBG_PCDV, ++ "SET_FEATURE: USB_DEVICE_A_HNP_SUPPORT\n"); ++ if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) { ++ pcd->a_hnp_support = 1; ++ dwc_otg_pcd_update_otg(pcd, 0); ++ } else { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ break; ++ ++ case UF_DEVICE_A_ALT_HNP_SUPPORT: ++ /* other RH port does */ ++ DWC_DEBUGPL(DBG_PCDV, ++ "SET_FEATURE: USB_DEVICE_A_ALT_HNP_SUPPORT\n"); ++ if (otg_cap_param == DWC_OTG_CAP_PARAM_HNP_SRP_CAPABLE) { ++ pcd->a_alt_hnp_support = 1; ++ dwc_otg_pcd_update_otg(pcd, 0); ++ } else { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ break; ++ ++ default: ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ ++ } ++ do_setup_in_status_phase(pcd); ++ break; ++ ++ case UT_INTERFACE: ++ do_gadget_setup(pcd, &ctrl); ++ break; ++ ++ case UT_ENDPOINT: ++ if (UGETW(ctrl.wValue) == UF_ENDPOINT_HALT) { ++ ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex)); ++ if (ep == 0) { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ ep->stopped = 1; ++ dwc_otg_ep_set_stall(core_if, &ep->dwc_ep); ++ } ++ do_setup_in_status_phase(pcd); ++ break; ++ } ++} ++ ++/** ++ * This function process the CLEAR_FEATURE Setup Commands. ++ */ ++static inline void do_clear_feature(dwc_otg_pcd_t * pcd) ++{ ++ usb_device_request_t ctrl = pcd->setup_pkt->req; ++ dwc_otg_pcd_ep_t *ep = 0; ++ ++ DWC_DEBUGPL(DBG_PCD, ++ "CLEAR_FEATURE:%02x.%02x v%04x i%04x l%04x\n", ++ ctrl.bmRequestType, ctrl.bRequest, ++ UGETW(ctrl.wValue), UGETW(ctrl.wIndex), ++ UGETW(ctrl.wLength)); ++ ++ switch (UT_GET_RECIPIENT(ctrl.bmRequestType)) { ++ case UT_DEVICE: ++ switch (UGETW(ctrl.wValue)) { ++ case UF_DEVICE_REMOTE_WAKEUP: ++ pcd->remote_wakeup_enable = 0; ++ break; ++ ++ case UF_TEST_MODE: ++ /** @todo Add CLEAR_FEATURE for TEST modes. */ ++ break; ++ ++ default: ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ do_setup_in_status_phase(pcd); ++ break; ++ ++ case UT_ENDPOINT: ++ ep = get_ep_by_addr(pcd, UGETW(ctrl.wIndex)); ++ if (ep == 0) { ++ ep0_do_stall(pcd, -DWC_E_NOT_SUPPORTED); ++ return; ++ } ++ ++ pcd_clear_halt(pcd, ep); ++ ++ break; ++ } ++} ++ ++/** ++ * This function process the SET_ADDRESS Setup Commands. ++ */ ++static inline void do_set_address(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if; ++ usb_device_request_t ctrl = pcd->setup_pkt->req; ++ ++ if (ctrl.bmRequestType == UT_DEVICE) { ++ dcfg_data_t dcfg = {.d32 = 0 }; ++ ++#ifdef DEBUG_EP0 ++// DWC_DEBUGPL(DBG_PCDV, "SET_ADDRESS:%d\n", ctrl.wValue); ++#endif ++ dcfg.b.devaddr = UGETW(ctrl.wValue); ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dcfg, 0, dcfg.d32); ++ do_setup_in_status_phase(pcd); ++ } ++} ++ ++/** ++ * This function processes SETUP commands. In Linux, the USB Command ++ * processing is done in two places - the first being the PCD and the ++ * second in the Gadget Driver (for example, the File-Backed Storage ++ * Gadget Driver). ++ * ++ *
Parameter NameMeaning
otg_capSpecifies the OTG capabilities. The driver will automatically detect the ++ value for this parameter if none is specified. ++ - 0: HNP and SRP capable (default, if available) ++ - 1: SRP Only capable ++ - 2: No HNP/SRP capable ++
dma_enableSpecifies whether to use slave or DMA mode for accessing the data FIFOs. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: Slave ++ - 1: DMA (default, if available) ++
dma_burst_sizeThe DMA Burst size (applicable only for External DMA Mode). ++ - Values: 1, 4, 8 16, 32, 64, 128, 256 (default 32) ++
speedSpecifies the maximum speed of operation in host and device mode. The ++ actual speed depends on the speed of the attached device and the value of ++ phy_type. ++ - 0: High Speed (default) ++ - 1: Full Speed ++
host_support_fs_ls_low_powerSpecifies whether low power mode is supported when attached to a Full ++ Speed or Low Speed device in host mode. ++ - 0: Don't support low power mode (default) ++ - 1: Support low power mode ++
host_ls_low_power_phy_clkSpecifies the PHY clock rate in low power mode when connected to a Low ++ Speed device in host mode. This parameter is applicable only if ++ HOST_SUPPORT_FS_LS_LOW_POWER is enabled. ++ - 0: 48 MHz (default) ++ - 1: 6 MHz ++
enable_dynamic_fifo Specifies whether FIFOs may be resized by the driver software. ++ - 0: Use cC FIFO size parameters ++ - 1: Allow dynamic FIFO sizing (default) ++
data_fifo_sizeTotal number of 4-byte words in the data FIFO memory. This memory ++ includes the Rx FIFO, non-periodic Tx FIFO, and periodic Tx FIFOs. ++ - Values: 32 to 32768 (default 8192) ++ ++ Note: The total FIFO memory depth in the FPGA configuration is 8192. ++
dev_rx_fifo_sizeNumber of 4-byte words in the Rx FIFO in device mode when dynamic ++ FIFO sizing is enabled. ++ - Values: 16 to 32768 (default 1064) ++
dev_nperio_tx_fifo_sizeNumber of 4-byte words in the non-periodic Tx FIFO in device mode when ++ dynamic FIFO sizing is enabled. ++ - Values: 16 to 32768 (default 1024) ++
dev_perio_tx_fifo_size_n (n = 1 to 15)Number of 4-byte words in each of the periodic Tx FIFOs in device mode ++ when dynamic FIFO sizing is enabled. ++ - Values: 4 to 768 (default 256) ++
host_rx_fifo_sizeNumber of 4-byte words in the Rx FIFO in host mode when dynamic FIFO ++ sizing is enabled. ++ - Values: 16 to 32768 (default 1024) ++
host_nperio_tx_fifo_sizeNumber of 4-byte words in the non-periodic Tx FIFO in host mode when ++ dynamic FIFO sizing is enabled in the core. ++ - Values: 16 to 32768 (default 1024) ++
host_perio_tx_fifo_sizeNumber of 4-byte words in the host periodic Tx FIFO when dynamic FIFO ++ sizing is enabled. ++ - Values: 16 to 32768 (default 1024) ++
max_transfer_sizeThe maximum transfer size supported in bytes. ++ - Values: 2047 to 65,535 (default 65,535) ++
max_packet_countThe maximum number of packets in a transfer. ++ - Values: 15 to 511 (default 511) ++
host_channelsThe number of host channel registers to use. ++ - Values: 1 to 16 (default 12) ++ ++ Note: The FPGA configuration supports a maximum of 12 host channels. ++
dev_endpointsThe number of endpoints in addition to EP0 available for device mode ++ operations. ++ - Values: 1 to 15 (default 6 IN and OUT) ++ ++ Note: The FPGA configuration supports a maximum of 6 IN and OUT endpoints in ++ addition to EP0. ++
phy_typeSpecifies the type of PHY interface to use. By default, the driver will ++ automatically detect the phy_type. ++ - 0: Full Speed ++ - 1: UTMI+ (default, if available) ++ - 2: ULPI ++
phy_utmi_widthSpecifies the UTMI+ Data Width. This parameter is applicable for a ++ phy_type of UTMI+. Also, this parameter is applicable only if the ++ OTG_HSPHY_WIDTH cC parameter was set to "8 and 16 bits", meaning that the ++ core has been configured to work at either data path width. ++ - Values: 8 or 16 bits (default 16) ++
phy_ulpi_ddrSpecifies whether the ULPI operates at double or single data rate. This ++ parameter is only applicable if phy_type is ULPI. ++ - 0: single data rate ULPI interface with 8 bit wide data bus (default) ++ - 1: double data rate ULPI interface with 4 bit wide data bus ++
i2c_enableSpecifies whether to use the I2C interface for full speed PHY. This ++ parameter is only applicable if PHY_TYPE is FS. ++ - 0: Disabled (default) ++ - 1: Enabled ++
ulpi_fs_lsSpecifies whether to use ULPI FS/LS mode only. ++ - 0: Disabled (default) ++ - 1: Enabled ++
ts_dlineSpecifies whether term select D-Line pulsing for all PHYs is enabled. ++ - 0: Disabled (default) ++ - 1: Enabled ++
en_multiple_tx_fifoSpecifies whether dedicatedto tx fifos are enabled for non periodic IN EPs. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: Disabled ++ - 1: Enabled (default, if available) ++
dev_tx_fifo_size_n (n = 1 to 15)Number of 4-byte words in each of the Tx FIFOs in device mode ++ when dynamic FIFO sizing is enabled. ++ - Values: 4 to 768 (default 256) ++
tx_thr_lengthTransmit Threshold length in 32 bit double words ++ - Values: 8 to 128 (default 64) ++
rx_thr_lengthReceive Threshold length in 32 bit double words ++ - Values: 8 to 128 (default 64) ++
thr_ctlSpecifies whether to enable Thresholding for Device mode. Bits 0, 1, 2 of ++ this parmater specifies if thresholding is enabled for non-Iso Tx, Iso Tx and ++ Rx transfers accordingly. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - Values: 0 to 7 (default 0) ++ Bit values indicate: ++ - 0: Thresholding disabled ++ - 1: Thresholding enabled ++
dma_desc_enableSpecifies whether to enable Descriptor DMA mode. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: Descriptor DMA disabled ++ - 1: Descriptor DMA (default, if available) ++
mpi_enableSpecifies whether to enable MPI enhancement mode. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: MPI disabled (default) ++ - 1: MPI enable ++
pti_enableSpecifies whether to enable PTI enhancement support. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: PTI disabled (default) ++ - 1: PTI enable ++
lpm_enableSpecifies whether to enable LPM support. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: LPM disabled ++ - 1: LPM enable (default, if available) ++
ic_usb_capSpecifies whether to enable IC_USB capability. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: IC_USB disabled (default, if available) ++ - 1: IC_USB enable ++
ahb_thr_ratioSpecifies AHB Threshold ratio. ++ - Values: 0 to 3 (default 0) ++
power_downSpecifies Power Down(Hibernation) Mode. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: Power Down disabled (default) ++ - 2: Power Down enabled ++
reload_ctlSpecifies whether dynamic reloading of the HFIR register is allowed during ++ run time. The driver will automatically detect the value for this parameter if ++ none is specified. In case the HFIR value is reloaded when HFIR.RldCtrl == 1'b0 ++ the core might misbehave. ++ - 0: Reload Control disabled (default) ++ - 1: Reload Control enabled ++
dev_out_nakSpecifies whether Device OUT NAK enhancement enabled or no. ++ The driver will automatically detect the value for this parameter if ++ none is specified. This parameter is valid only when OTG_EN_DESC_DMA == 1b1. ++ - 0: The core does not set NAK after Bulk OUT transfer complete (default) ++ - 1: The core sets NAK after Bulk OUT transfer complete ++
cont_on_bnaSpecifies whether Enable Continue on BNA enabled or no. ++ After receiving BNA interrupt the core disables the endpoint,when the ++ endpoint is re-enabled by the application the ++ - 0: Core starts processing from the DOEPDMA descriptor (default) ++ - 1: Core starts processing from the descriptor which received the BNA. ++ This parameter is valid only when OTG_EN_DESC_DMA == 1b1. ++
ahb_singleThis bit when programmed supports SINGLE transfers for remainder data ++ in a transfer for DMA mode of operation. ++ - 0: The remainder data will be sent using INCR burst size (default) ++ - 1: The remainder data will be sent using SINGLE burst size. ++
adp_enableSpecifies whether ADP feature is enabled. ++ The driver will automatically detect the value for this parameter if none is ++ specified. ++ - 0: ADP feature disabled (default) ++ - 1: ADP feature enabled ++
otg_verSpecifies whether OTG is performing as USB OTG Revision 2.0 or Revision 1.3 ++ USB OTG device. ++ - 0: OTG 2.0 support disabled (default) ++ - 1: OTG 2.0 support enabled ++
++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ * ++ *
Command Driver Description
GET_STATUS PCD Command is processed as ++ * defined in chapter 9 of the USB 2.0 Specification chapter 9 ++ *
CLEAR_FEATURE PCD The Device and Endpoint ++ * requests are the ENDPOINT_HALT feature is procesed, all others the ++ * interface requests are ignored.
SET_FEATURE PCD The Device and Endpoint ++ * requests are processed by the PCD. Interface requests are passed ++ * to the Gadget Driver.
SET_ADDRESS PCD Program the DCFG reg, ++ * with device address received
GET_DESCRIPTOR Gadget Driver Return the ++ * requested descriptor
SET_DESCRIPTOR Gadget Driver Optional - ++ * not implemented by any of the existing Gadget Drivers.
SET_CONFIGURATION Gadget Driver Disable ++ * all EPs and enable EPs for new configuration.
GET_CONFIGURATION Gadget Driver Return ++ * the current configuration
SET_INTERFACE Gadget Driver Disable all ++ * EPs and enable EPs for new configuration.
GET_INTERFACE Gadget Driver Return the ++ * current interface.
SYNC_FRAME PCD Display debug ++ * message.
++ * ++ * When the SETUP Phase Done interrupt occurs, the PCD SETUP commands are ++ * processed by pcd_setup. Calling the Function Driver's setup function from ++ * pcd_setup processes the gadget SETUP commands. ++ */ ++static inline void pcd_setup(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ usb_device_request_t ctrl = pcd->setup_pkt->req; ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ ++ deptsiz0_data_t doeptsize0 = {.d32 = 0 }; ++ ++#ifdef DWC_UTE_CFI ++ int retval = 0; ++ struct cfi_usb_ctrlrequest cfi_req; ++#endif ++ ++ doeptsize0.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[0]->doeptsiz); ++ ++ /** In BDMA more then 1 setup packet is not supported till 3.00a */ ++ if (core_if->dma_enable && core_if->dma_desc_enable == 0 ++ && (doeptsize0.b.supcnt < 2) ++ && (core_if->snpsid < OTG_CORE_REV_2_94a)) { ++ DWC_ERROR ++ ("\n\n----------- CANNOT handle > 1 setup packet in DMA mode\n\n"); ++ } ++ if ((core_if->snpsid >= OTG_CORE_REV_3_00a) ++ && (core_if->dma_enable == 1) && (core_if->dma_desc_enable == 0)) { ++ ctrl = ++ (pcd->setup_pkt + ++ (3 - doeptsize0.b.supcnt - 1 + ++ ep0->dwc_ep.stp_rollover))->req; ++ } ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, "SETUP %02x.%02x v%04x i%04x l%04x\n", ++ ctrl.bmRequestType, ctrl.bRequest, ++ UGETW(ctrl.wValue), UGETW(ctrl.wIndex), ++ UGETW(ctrl.wLength)); ++#endif ++ ++ /* Clean up the request queue */ ++ dwc_otg_request_nuke(ep0); ++ ep0->stopped = 0; ++ ++ if (ctrl.bmRequestType & UE_DIR_IN) { ++ ep0->dwc_ep.is_in = 1; ++ pcd->ep0state = EP0_IN_DATA_PHASE; ++ } else { ++ ep0->dwc_ep.is_in = 0; ++ pcd->ep0state = EP0_OUT_DATA_PHASE; ++ } ++ ++ if (UGETW(ctrl.wLength) == 0) { ++ ep0->dwc_ep.is_in = 1; ++ pcd->ep0state = EP0_IN_STATUS_PHASE; ++ } ++ ++ if (UT_GET_TYPE(ctrl.bmRequestType) != UT_STANDARD) { ++ ++#ifdef DWC_UTE_CFI ++ DWC_MEMCPY(&cfi_req, &ctrl, sizeof(usb_device_request_t)); ++ ++ //printk(KERN_ALERT "CFI: req_type=0x%02x; req=0x%02x\n", ++ ctrl.bRequestType, ctrl.bRequest); ++ if (UT_GET_TYPE(cfi_req.bRequestType) == UT_VENDOR) { ++ if (cfi_req.bRequest > 0xB0 && cfi_req.bRequest < 0xBF) { ++ retval = cfi_setup(pcd, &cfi_req); ++ if (retval < 0) { ++ ep0_do_stall(pcd, retval); ++ pcd->ep0_pending = 0; ++ return; ++ } ++ ++ /* if need gadget setup then call it and check the retval */ ++ if (pcd->cfi->need_gadget_att) { ++ retval = ++ cfi_gadget_setup(pcd, ++ &pcd-> ++ cfi->ctrl_req); ++ if (retval < 0) { ++ pcd->ep0_pending = 0; ++ return; ++ } ++ } ++ ++ if (pcd->cfi->need_status_in_complete) { ++ do_setup_in_status_phase(pcd); ++ } ++ return; ++ } ++ } ++#endif ++ ++ /* handle non-standard (class/vendor) requests in the gadget driver */ ++ do_gadget_setup(pcd, &ctrl); ++ return; ++ } ++ ++ /** @todo NGS: Handle bad setup packet? */ ++ ++/////////////////////////////////////////// ++//// --- Standard Request handling --- //// ++ ++ switch (ctrl.bRequest) { ++ case UR_GET_STATUS: ++ do_get_status(pcd); ++ break; ++ ++ case UR_CLEAR_FEATURE: ++ do_clear_feature(pcd); ++ break; ++ ++ case UR_SET_FEATURE: ++ do_set_feature(pcd); ++ break; ++ ++ case UR_SET_ADDRESS: ++ do_set_address(pcd); ++ break; ++ ++ case UR_SET_INTERFACE: ++ case UR_SET_CONFIG: ++// _pcd->request_config = 1; /* Configuration changed */ ++ do_gadget_setup(pcd, &ctrl); ++ break; ++ ++ case UR_SYNCH_FRAME: ++ do_gadget_setup(pcd, &ctrl); ++ break; ++ ++ default: ++ /* Call the Gadget Driver's setup functions */ ++ do_gadget_setup(pcd, &ctrl); ++ break; ++ } ++} ++ ++/** ++ * This function completes the ep0 control transfer. ++ */ ++static int32_t ep0_complete_request(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dwc_otg_dev_in_ep_regs_t *in_ep_regs = ++ dev_if->in_ep_regs[ep->dwc_ep.num]; ++#ifdef DEBUG_EP0 ++ dwc_otg_dev_out_ep_regs_t *out_ep_regs = ++ dev_if->out_ep_regs[ep->dwc_ep.num]; ++#endif ++ deptsiz0_data_t deptsiz; ++ dev_dma_desc_sts_t desc_sts; ++ dwc_otg_pcd_request_t *req; ++ int is_last = 0; ++ dwc_otg_pcd_t *pcd = ep->pcd; ++ ++#ifdef DWC_UTE_CFI ++ struct cfi_usb_ctrlrequest *ctrlreq; ++ int retval = -DWC_E_NOT_SUPPORTED; ++#endif ++ ++ desc_sts.b.bytes = 0; ++ ++ if (pcd->ep0_pending && DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ if (ep->dwc_ep.is_in) { ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "Do setup OUT status phase\n"); ++#endif ++ do_setup_out_status_phase(pcd); ++ } else { ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "Do setup IN status phase\n"); ++#endif ++ ++#ifdef DWC_UTE_CFI ++ ctrlreq = &pcd->cfi->ctrl_req; ++ ++ if (UT_GET_TYPE(ctrlreq->bRequestType) == UT_VENDOR) { ++ if (ctrlreq->bRequest > 0xB0 ++ && ctrlreq->bRequest < 0xBF) { ++ ++ /* Return if the PCD failed to handle the request */ ++ if ((retval = ++ pcd->cfi->ops. ++ ctrl_write_complete(pcd->cfi, ++ pcd)) < 0) { ++ CFI_INFO ++ ("ERROR setting a new value in the PCD(%d)\n", ++ retval); ++ ep0_do_stall(pcd, retval); ++ pcd->ep0_pending = 0; ++ return 0; ++ } ++ ++ /* If the gadget needs to be notified on the request */ ++ if (pcd->cfi->need_gadget_att == 1) { ++ //retval = do_gadget_setup(pcd, &pcd->cfi->ctrl_req); ++ retval = ++ cfi_gadget_setup(pcd, ++ &pcd->cfi-> ++ ctrl_req); ++ ++ /* Return from the function if the gadget failed to process ++ * the request properly - this should never happen !!! ++ */ ++ if (retval < 0) { ++ CFI_INFO ++ ("ERROR setting a new value in the gadget(%d)\n", ++ retval); ++ pcd->ep0_pending = 0; ++ return 0; ++ } ++ } ++ ++ CFI_INFO("%s: RETVAL=%d\n", __func__, ++ retval); ++ /* If we hit here then the PCD and the gadget has properly ++ * handled the request - so send the ZLP IN to the host. ++ */ ++ /* @todo: MAS - decide whether we need to start the setup ++ * stage based on the need_setup value of the cfi object ++ */ ++ do_setup_in_status_phase(pcd); ++ pcd->ep0_pending = 0; ++ return 1; ++ } ++ } ++#endif ++ ++ do_setup_in_status_phase(pcd); ++ } ++ pcd->ep0_pending = 0; ++ return 1; ++ } ++ ++ if (DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ return 0; ++ } ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ ++ if (pcd->ep0state == EP0_OUT_STATUS_PHASE ++ || pcd->ep0state == EP0_IN_STATUS_PHASE) { ++ is_last = 1; ++ } else if (ep->dwc_ep.is_in) { ++ deptsiz.d32 = DWC_READ_REG32(&in_ep_regs->dieptsiz); ++ if (core_if->dma_desc_enable != 0) ++ desc_sts = dev_if->in_desc_addr->status; ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "%d len=%d xfersize=%d pktcnt=%d\n", ++ ep->dwc_ep.num, ep->dwc_ep.xfer_len, ++ deptsiz.b.xfersize, deptsiz.b.pktcnt); ++#endif ++ ++ if (((core_if->dma_desc_enable == 0) ++ && (deptsiz.b.xfersize == 0)) ++ || ((core_if->dma_desc_enable != 0) ++ && (desc_sts.b.bytes == 0))) { ++ req->actual = ep->dwc_ep.xfer_count; ++ /* Is a Zero Len Packet needed? */ ++ if (req->sent_zlp) { ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, "Setup Rx ZLP\n"); ++#endif ++ req->sent_zlp = 0; ++ } ++ do_setup_out_status_phase(pcd); ++ } ++ } else { ++ /* ep0-OUT */ ++#ifdef DEBUG_EP0 ++ deptsiz.d32 = DWC_READ_REG32(&out_ep_regs->doeptsiz); ++ DWC_DEBUGPL(DBG_PCDV, "%d len=%d xsize=%d pktcnt=%d\n", ++ ep->dwc_ep.num, ep->dwc_ep.xfer_len, ++ deptsiz.b.xfersize, deptsiz.b.pktcnt); ++#endif ++ req->actual = ep->dwc_ep.xfer_count; ++ ++ /* Is a Zero Len Packet needed? */ ++ if (req->sent_zlp) { ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "Setup Tx ZLP\n"); ++#endif ++ req->sent_zlp = 0; ++ } ++ /* For older cores do setup in status phase in Slave/BDMA modes, ++ * starting from 3.00 do that only in slave, and for DMA modes ++ * just re-enable ep 0 OUT here*/ ++ if (core_if->dma_enable == 0 ++ || (core_if->dma_desc_enable == 0 ++ && core_if->snpsid <= OTG_CORE_REV_2_94a)) { ++ do_setup_in_status_phase(pcd); ++ } else if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ DWC_DEBUGPL(DBG_PCDV, ++ "Enable out ep before in status phase\n"); ++ ep0_out_start(core_if, pcd); ++ } ++ } ++ ++ /* Complete the request */ ++ if (is_last) { ++ dwc_otg_request_done(ep, req, 0); ++ ep->dwc_ep.start_xfer_buff = 0; ++ ep->dwc_ep.xfer_buff = 0; ++ ep->dwc_ep.xfer_len = 0; ++ return 1; ++ } ++ return 0; ++} ++ ++#ifdef DWC_UTE_CFI ++/** ++ * This function calculates traverses all the CFI DMA descriptors and ++ * and accumulates the bytes that are left to be transfered. ++ * ++ * @return The total bytes left to transfered, or a negative value as failure ++ */ ++static inline int cfi_calc_desc_residue(dwc_otg_pcd_ep_t * ep) ++{ ++ int32_t ret = 0; ++ int i; ++ struct dwc_otg_dma_desc *ddesc = NULL; ++ struct cfi_ep *cfiep; ++ ++ /* See if the pcd_ep has its respective cfi_ep mapped */ ++ cfiep = get_cfi_ep_by_pcd_ep(ep->pcd->cfi, ep); ++ if (!cfiep) { ++ CFI_INFO("%s: Failed to find ep\n", __func__); ++ return -1; ++ } ++ ++ ddesc = ep->dwc_ep.descs; ++ ++ for (i = 0; (i < cfiep->desc_count) && (i < MAX_DMA_DESCS_PER_EP); i++) { ++ ++#if defined(PRINT_CFI_DMA_DESCS) ++ print_desc(ddesc, ep->ep.name, i); ++#endif ++ ret += ddesc->status.b.bytes; ++ ddesc++; ++ } ++ ++ if (ret) ++ CFI_INFO("!!!!!!!!!! WARNING (%s) - residue=%d\n", __func__, ++ ret); ++ ++ return ret; ++} ++#endif ++ ++/** ++ * This function completes the request for the EP. If there are ++ * additional requests for the EP in the queue they will be started. ++ */ ++static void complete_ep(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ dwc_otg_dev_in_ep_regs_t *in_ep_regs = ++ dev_if->in_ep_regs[ep->dwc_ep.num]; ++ deptsiz_data_t deptsiz; ++ dev_dma_desc_sts_t desc_sts; ++ dwc_otg_pcd_request_t *req = 0; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ uint32_t byte_count = 0; ++ int is_last = 0; ++ int i; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s() %d-%s\n", __func__, ep->dwc_ep.num, ++ (ep->dwc_ep.is_in ? "IN" : "OUT")); ++ ++ /* Get any pending requests */ ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ if (!req) { ++ DWC_PRINTF("complete_ep 0x%p, req = NULL!\n", ep); ++ return; ++ } ++ } else { ++ DWC_PRINTF("complete_ep 0x%p, ep->queue empty!\n", ep); ++ return; ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "Requests %d\n", ep->pcd->request_pending); ++ ++ if (ep->dwc_ep.is_in) { ++ deptsiz.d32 = DWC_READ_REG32(&in_ep_regs->dieptsiz); ++ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable == 0) { ++ if (deptsiz.b.xfersize == 0 ++ && deptsiz.b.pktcnt == 0) { ++ byte_count = ++ ep->dwc_ep.xfer_len - ++ ep->dwc_ep.xfer_count; ++ ++ ep->dwc_ep.xfer_buff += byte_count; ++ ep->dwc_ep.dma_addr += byte_count; ++ ep->dwc_ep.xfer_count += byte_count; ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "%d-%s len=%d xfersize=%d pktcnt=%d\n", ++ ep->dwc_ep.num, ++ (ep->dwc_ep. ++ is_in ? "IN" : "OUT"), ++ ep->dwc_ep.xfer_len, ++ deptsiz.b.xfersize, ++ deptsiz.b.pktcnt); ++ ++ if (ep->dwc_ep.xfer_len < ++ ep->dwc_ep.total_len) { ++ dwc_otg_ep_start_transfer ++ (core_if, &ep->dwc_ep); ++ } else if (ep->dwc_ep.sent_zlp) { ++ /* ++ * This fragment of code should initiate 0 ++ * length transfer in case if it is queued ++ * a transfer with size divisible to EPs max ++ * packet size and with usb_request zero field ++ * is set, which means that after data is transfered, ++ * it is also should be transfered ++ * a 0 length packet at the end. For Slave and ++ * Buffer DMA modes in this case SW has ++ * to initiate 2 transfers one with transfer size, ++ * and the second with 0 size. For Descriptor ++ * DMA mode SW is able to initiate a transfer, ++ * which will handle all the packets including ++ * the last 0 length. ++ */ ++ ep->dwc_ep.sent_zlp = 0; ++ dwc_otg_ep_start_zl_transfer ++ (core_if, &ep->dwc_ep); ++ } else { ++ is_last = 1; ++ } ++ } else { ++ if (ep->dwc_ep.type == ++ DWC_OTG_EP_TYPE_ISOC) { ++ req->actual = 0; ++ dwc_otg_request_done(ep, req, 0); ++ ++ ep->dwc_ep.start_xfer_buff = 0; ++ ep->dwc_ep.xfer_buff = 0; ++ ep->dwc_ep.xfer_len = 0; ++ ++ /* If there is a request in the queue start it. */ ++ start_next_request(ep); ++ } else ++ DWC_WARN ++ ("Incomplete transfer (%d - %s [siz=%d pkt=%d])\n", ++ ep->dwc_ep.num, ++ (ep->dwc_ep.is_in ? "IN" : "OUT"), ++ deptsiz.b.xfersize, ++ deptsiz.b.pktcnt); ++ } ++ } else { ++ dma_desc = ep->dwc_ep.desc_addr; ++ byte_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ++#ifdef DWC_UTE_CFI ++ CFI_INFO("%s: BUFFER_MODE=%d\n", __func__, ++ ep->dwc_ep.buff_mode); ++ if (ep->dwc_ep.buff_mode != BM_STANDARD) { ++ int residue; ++ ++ residue = cfi_calc_desc_residue(ep); ++ if (residue < 0) ++ return; ++ ++ byte_count = residue; ++ } else { ++#endif ++ for (i = 0; i < ep->dwc_ep.desc_cnt; ++ ++i) { ++ desc_sts = dma_desc->status; ++ byte_count += desc_sts.b.bytes; ++ dma_desc++; ++ } ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ if (byte_count == 0) { ++ ep->dwc_ep.xfer_count = ++ ep->dwc_ep.total_len; ++ is_last = 1; ++ } else { ++ DWC_WARN("Incomplete transfer\n"); ++ } ++ } ++ } else { ++ if (deptsiz.b.xfersize == 0 && deptsiz.b.pktcnt == 0) { ++ DWC_DEBUGPL(DBG_PCDV, ++ "%d-%s len=%d xfersize=%d pktcnt=%d\n", ++ ep->dwc_ep.num, ++ ep->dwc_ep.is_in ? "IN" : "OUT", ++ ep->dwc_ep.xfer_len, ++ deptsiz.b.xfersize, ++ deptsiz.b.pktcnt); ++ ++ /* Check if the whole transfer was completed, ++ * if no, setup transfer for next portion of data ++ */ ++ if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) { ++ dwc_otg_ep_start_transfer(core_if, ++ &ep->dwc_ep); ++ } else if (ep->dwc_ep.sent_zlp) { ++ /* ++ * This fragment of code should initiate 0 ++ * length trasfer in case if it is queued ++ * a trasfer with size divisible to EPs max ++ * packet size and with usb_request zero field ++ * is set, which means that after data is transfered, ++ * it is also should be transfered ++ * a 0 length packet at the end. For Slave and ++ * Buffer DMA modes in this case SW has ++ * to initiate 2 transfers one with transfer size, ++ * and the second with 0 size. For Desriptor ++ * DMA mode SW is able to initiate a transfer, ++ * which will handle all the packets including ++ * the last 0 legth. ++ */ ++ ep->dwc_ep.sent_zlp = 0; ++ dwc_otg_ep_start_zl_transfer(core_if, ++ &ep->dwc_ep); ++ } else { ++ is_last = 1; ++ } ++ } else { ++ DWC_WARN ++ ("Incomplete transfer (%d-%s [siz=%d pkt=%d])\n", ++ ep->dwc_ep.num, ++ (ep->dwc_ep.is_in ? "IN" : "OUT"), ++ deptsiz.b.xfersize, deptsiz.b.pktcnt); ++ } ++ } ++ } else { ++ dwc_otg_dev_out_ep_regs_t *out_ep_regs = ++ dev_if->out_ep_regs[ep->dwc_ep.num]; ++ desc_sts.d32 = 0; ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable) { ++ dma_desc = ep->dwc_ep.desc_addr; ++ byte_count = 0; ++ ep->dwc_ep.sent_zlp = 0; ++ ++#ifdef DWC_UTE_CFI ++ CFI_INFO("%s: BUFFER_MODE=%d\n", __func__, ++ ep->dwc_ep.buff_mode); ++ if (ep->dwc_ep.buff_mode != BM_STANDARD) { ++ int residue; ++ residue = cfi_calc_desc_residue(ep); ++ if (residue < 0) ++ return; ++ byte_count = residue; ++ } else { ++#endif ++ ++ for (i = 0; i < ep->dwc_ep.desc_cnt; ++ ++i) { ++ desc_sts = dma_desc->status; ++ byte_count += desc_sts.b.bytes; ++ dma_desc++; ++ } ++ ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ /* Checking for interrupt Out transfers with not ++ * dword aligned mps sizes ++ */ ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_INTR && ++ (ep->dwc_ep.maxpacket%4)) { ++ ep->dwc_ep.xfer_count = ++ ep->dwc_ep.total_len - byte_count; ++ if ((ep->dwc_ep.xfer_len % ++ ep->dwc_ep.maxpacket) ++ && (ep->dwc_ep.xfer_len / ++ ep->dwc_ep.maxpacket < ++ MAX_DMA_DESC_CNT)) ++ ep->dwc_ep.xfer_len -= ++ (ep->dwc_ep.desc_cnt - ++ 1) * ep->dwc_ep.maxpacket + ++ ep->dwc_ep.xfer_len % ++ ep->dwc_ep.maxpacket; ++ else ++ ep->dwc_ep.xfer_len -= ++ ep->dwc_ep.desc_cnt * ++ ep->dwc_ep.maxpacket; ++ if (ep->dwc_ep.xfer_len > 0) { ++ dwc_otg_ep_start_transfer ++ (core_if, &ep->dwc_ep); ++ } else { ++ is_last = 1; ++ } ++ } else { ++ ep->dwc_ep.xfer_count = ++ ep->dwc_ep.total_len - byte_count + ++ ((4 - ++ (ep->dwc_ep. ++ total_len & 0x3)) & 0x3); ++ is_last = 1; ++ } ++ } else { ++ deptsiz.d32 = 0; ++ deptsiz.d32 = ++ DWC_READ_REG32(&out_ep_regs->doeptsiz); ++ ++ byte_count = (ep->dwc_ep.xfer_len - ++ ep->dwc_ep.xfer_count - ++ deptsiz.b.xfersize); ++ ep->dwc_ep.xfer_buff += byte_count; ++ ep->dwc_ep.dma_addr += byte_count; ++ ep->dwc_ep.xfer_count += byte_count; ++ ++ /* Check if the whole transfer was completed, ++ * if no, setup transfer for next portion of data ++ */ ++ if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) { ++ dwc_otg_ep_start_transfer(core_if, ++ &ep->dwc_ep); ++ } else if (ep->dwc_ep.sent_zlp) { ++ /* ++ * This fragment of code should initiate 0 ++ * length trasfer in case if it is queued ++ * a trasfer with size divisible to EPs max ++ * packet size and with usb_request zero field ++ * is set, which means that after data is transfered, ++ * it is also should be transfered ++ * a 0 length packet at the end. For Slave and ++ * Buffer DMA modes in this case SW has ++ * to initiate 2 transfers one with transfer size, ++ * and the second with 0 size. For Desriptor ++ * DMA mode SW is able to initiate a transfer, ++ * which will handle all the packets including ++ * the last 0 legth. ++ */ ++ ep->dwc_ep.sent_zlp = 0; ++ dwc_otg_ep_start_zl_transfer(core_if, ++ &ep->dwc_ep); ++ } else { ++ is_last = 1; ++ } ++ } ++ } else { ++ /* Check if the whole transfer was completed, ++ * if no, setup transfer for next portion of data ++ */ ++ if (ep->dwc_ep.xfer_len < ep->dwc_ep.total_len) { ++ dwc_otg_ep_start_transfer(core_if, &ep->dwc_ep); ++ } else if (ep->dwc_ep.sent_zlp) { ++ /* ++ * This fragment of code should initiate 0 ++ * length transfer in case if it is queued ++ * a transfer with size divisible to EPs max ++ * packet size and with usb_request zero field ++ * is set, which means that after data is transfered, ++ * it is also should be transfered ++ * a 0 length packet at the end. For Slave and ++ * Buffer DMA modes in this case SW has ++ * to initiate 2 transfers one with transfer size, ++ * and the second with 0 size. For Descriptor ++ * DMA mode SW is able to initiate a transfer, ++ * which will handle all the packets including ++ * the last 0 length. ++ */ ++ ep->dwc_ep.sent_zlp = 0; ++ dwc_otg_ep_start_zl_transfer(core_if, ++ &ep->dwc_ep); ++ } else { ++ is_last = 1; ++ } ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "addr %p, %d-%s len=%d cnt=%d xsize=%d pktcnt=%d\n", ++ &out_ep_regs->doeptsiz, ep->dwc_ep.num, ++ ep->dwc_ep.is_in ? "IN" : "OUT", ++ ep->dwc_ep.xfer_len, ep->dwc_ep.xfer_count, ++ deptsiz.b.xfersize, deptsiz.b.pktcnt); ++ } ++ ++ /* Complete the request */ ++ if (is_last) { ++#ifdef DWC_UTE_CFI ++ if (ep->dwc_ep.buff_mode != BM_STANDARD) { ++ req->actual = ep->dwc_ep.cfi_req_len - byte_count; ++ } else { ++#endif ++ req->actual = ep->dwc_ep.xfer_count; ++#ifdef DWC_UTE_CFI ++ } ++#endif ++ if (req->dw_align_buf) { ++ if (!ep->dwc_ep.is_in) { ++ dwc_memcpy(req->buf, req->dw_align_buf, req->length); ++ } ++ DWC_DMA_FREE(req->length, req->dw_align_buf, ++ req->dw_align_buf_dma); ++ } ++ ++ dwc_otg_request_done(ep, req, 0); ++ ++ ep->dwc_ep.start_xfer_buff = 0; ++ ep->dwc_ep.xfer_buff = 0; ++ ep->dwc_ep.xfer_len = 0; ++ ++ /* If there is a request in the queue start it. */ ++ start_next_request(ep); ++ } ++} ++ ++#ifdef DWC_EN_ISOC ++ ++/** ++ * This function BNA interrupt for Isochronous EPs ++ * ++ */ ++static void dwc_otg_pcd_handle_iso_bna(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_ep_t *dwc_ep = &ep->dwc_ep; ++ volatile uint32_t *addr; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dwc_otg_pcd_t *pcd = ep->pcd; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ int i; ++ ++ dma_desc = ++ dwc_ep->iso_desc_addr + dwc_ep->desc_cnt * (dwc_ep->proc_buf_num); ++ ++ if (dwc_ep->is_in) { ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ for (i = 0; i < dwc_ep->desc_cnt; ++i, ++dma_desc) { ++ sts.d32 = dma_desc->status.d32; ++ sts.b_iso_in.bs = BS_HOST_READY; ++ dma_desc->status.d32 = sts.d32; ++ } ++ } else { ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ for (i = 0; i < dwc_ep->desc_cnt; ++i, ++dma_desc) { ++ sts.d32 = dma_desc->status.d32; ++ sts.b_iso_out.bs = BS_HOST_READY; ++ dma_desc->status.d32 = sts.d32; ++ } ++ } ++ ++ if (dwc_ep->is_in == 0) { ++ addr = ++ &GET_CORE_IF(pcd)->dev_if->out_ep_regs[dwc_ep-> ++ num]->doepctl; ++ } else { ++ addr = ++ &GET_CORE_IF(pcd)->dev_if->in_ep_regs[dwc_ep->num]->diepctl; ++ } ++ depctl.b.epena = 1; ++ DWC_MODIFY_REG32(addr, depctl.d32, depctl.d32); ++} ++ ++/** ++ * This function sets latest iso packet information(non-PTI mode) ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++void set_current_pkt_info(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ dma_addr_t dma_addr; ++ uint32_t offset; ++ ++ if (ep->proc_buf_num) ++ dma_addr = ep->dma_addr1; ++ else ++ dma_addr = ep->dma_addr0; ++ ++ if (ep->is_in) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[ep->num]->dieptsiz); ++ offset = ep->data_per_frame; ++ } else { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->num]->doeptsiz); ++ offset = ++ ep->data_per_frame + ++ (0x4 & (0x4 - (ep->data_per_frame & 0x3))); ++ } ++ ++ if (!deptsiz.b.xfersize) { ++ ep->pkt_info[ep->cur_pkt].length = ep->data_per_frame; ++ ep->pkt_info[ep->cur_pkt].offset = ++ ep->cur_pkt_dma_addr - dma_addr; ++ ep->pkt_info[ep->cur_pkt].status = 0; ++ } else { ++ ep->pkt_info[ep->cur_pkt].length = ep->data_per_frame; ++ ep->pkt_info[ep->cur_pkt].offset = ++ ep->cur_pkt_dma_addr - dma_addr; ++ ep->pkt_info[ep->cur_pkt].status = -DWC_E_NO_DATA; ++ } ++ ep->cur_pkt_addr += offset; ++ ep->cur_pkt_dma_addr += offset; ++ ep->cur_pkt++; ++} ++ ++/** ++ * This function sets latest iso packet information(DDMA mode) ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dwc_ep The EP to start the transfer on. ++ * ++ */ ++static void set_ddma_iso_pkts_info(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * dwc_ep) ++{ ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ iso_pkt_info_t *iso_packet; ++ uint32_t data_per_desc; ++ uint32_t offset; ++ int i, j; ++ ++ iso_packet = dwc_ep->pkt_info; ++ ++ /** Reinit closed DMA Descriptors*/ ++ /** ISO OUT EP */ ++ if (dwc_ep->is_in == 0) { ++ dma_desc = ++ dwc_ep->iso_desc_addr + ++ dwc_ep->desc_cnt * dwc_ep->proc_buf_num; ++ offset = 0; ++ ++ for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; ++ i += dwc_ep->pkt_per_frm) { ++ for (j = 0; j < dwc_ep->pkt_per_frm; ++j) { ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep-> ++ data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - ++ data_per_desc % ++ 4) : 0; ++ ++ sts.d32 = dma_desc->status.d32; ++ ++ /* Write status in iso_packet_decsriptor */ ++ iso_packet->status = ++ sts.b_iso_out.rxsts + ++ (sts.b_iso_out.bs ^ BS_DMA_DONE); ++ if (iso_packet->status) { ++ iso_packet->status = -DWC_E_NO_DATA; ++ } ++ ++ /* Received data length */ ++ if (!sts.b_iso_out.rxbytes) { ++ iso_packet->length = ++ data_per_desc - ++ sts.b_iso_out.rxbytes; ++ } else { ++ iso_packet->length = ++ data_per_desc - ++ sts.b_iso_out.rxbytes + (4 - ++ dwc_ep->data_per_frame ++ % 4); ++ } ++ ++ iso_packet->offset = offset; ++ ++ offset += data_per_desc; ++ dma_desc++; ++ iso_packet++; ++ } ++ } ++ ++ for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) { ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep->data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0; ++ ++ sts.d32 = dma_desc->status.d32; ++ ++ /* Write status in iso_packet_decsriptor */ ++ iso_packet->status = ++ sts.b_iso_out.rxsts + ++ (sts.b_iso_out.bs ^ BS_DMA_DONE); ++ if (iso_packet->status) { ++ iso_packet->status = -DWC_E_NO_DATA; ++ } ++ ++ /* Received data length */ ++ iso_packet->length = ++ dwc_ep->data_per_frame - sts.b_iso_out.rxbytes; ++ ++ iso_packet->offset = offset; ++ ++ offset += data_per_desc; ++ iso_packet++; ++ dma_desc++; ++ } ++ ++ sts.d32 = dma_desc->status.d32; ++ ++ /* Write status in iso_packet_decsriptor */ ++ iso_packet->status = ++ sts.b_iso_out.rxsts + (sts.b_iso_out.bs ^ BS_DMA_DONE); ++ if (iso_packet->status) { ++ iso_packet->status = -DWC_E_NO_DATA; ++ } ++ /* Received data length */ ++ if (!sts.b_iso_out.rxbytes) { ++ iso_packet->length = ++ dwc_ep->data_per_frame - sts.b_iso_out.rxbytes; ++ } else { ++ iso_packet->length = ++ dwc_ep->data_per_frame - sts.b_iso_out.rxbytes + ++ (4 - dwc_ep->data_per_frame % 4); ++ } ++ ++ iso_packet->offset = offset; ++ } else { ++/** ISO IN EP */ ++ ++ dma_desc = ++ dwc_ep->iso_desc_addr + ++ dwc_ep->desc_cnt * dwc_ep->proc_buf_num; ++ ++ for (i = 0; i < dwc_ep->desc_cnt - 1; i++) { ++ sts.d32 = dma_desc->status.d32; ++ ++ /* Write status in iso packet descriptor */ ++ iso_packet->status = ++ sts.b_iso_in.txsts + ++ (sts.b_iso_in.bs ^ BS_DMA_DONE); ++ if (iso_packet->status != 0) { ++ iso_packet->status = -DWC_E_NO_DATA; ++ ++ } ++ /* Bytes has been transfered */ ++ iso_packet->length = ++ dwc_ep->data_per_frame - sts.b_iso_in.txbytes; ++ ++ dma_desc++; ++ iso_packet++; ++ } ++ ++ sts.d32 = dma_desc->status.d32; ++ while (sts.b_iso_in.bs == BS_DMA_BUSY) { ++ sts.d32 = dma_desc->status.d32; ++ } ++ ++ /* Write status in iso packet descriptor ??? do be done with ERROR codes */ ++ iso_packet->status = ++ sts.b_iso_in.txsts + (sts.b_iso_in.bs ^ BS_DMA_DONE); ++ if (iso_packet->status != 0) { ++ iso_packet->status = -DWC_E_NO_DATA; ++ } ++ ++ /* Bytes has been transfered */ ++ iso_packet->length = ++ dwc_ep->data_per_frame - sts.b_iso_in.txbytes; ++ } ++} ++ ++/** ++ * This function reinitialize DMA Descriptors for Isochronous transfer ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dwc_ep The EP to start the transfer on. ++ * ++ */ ++static void reinit_ddma_iso_xfer(dwc_otg_core_if_t * core_if, dwc_ep_t * dwc_ep) ++{ ++ int i, j; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ dma_addr_t dma_ad; ++ volatile uint32_t *addr; ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ uint32_t data_per_desc; ++ ++ if (dwc_ep->is_in == 0) { ++ addr = &core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl; ++ } else { ++ addr = &core_if->dev_if->in_ep_regs[dwc_ep->num]->diepctl; ++ } ++ ++ if (dwc_ep->proc_buf_num == 0) { ++ /** Buffer 0 descriptors setup */ ++ dma_ad = dwc_ep->dma_addr0; ++ } else { ++ /** Buffer 1 descriptors setup */ ++ dma_ad = dwc_ep->dma_addr1; ++ } ++ ++ /** Reinit closed DMA Descriptors*/ ++ /** ISO OUT EP */ ++ if (dwc_ep->is_in == 0) { ++ dma_desc = ++ dwc_ep->iso_desc_addr + ++ dwc_ep->desc_cnt * dwc_ep->proc_buf_num; ++ ++ sts.b_iso_out.bs = BS_HOST_READY; ++ sts.b_iso_out.rxsts = 0; ++ sts.b_iso_out.l = 0; ++ sts.b_iso_out.sp = 0; ++ sts.b_iso_out.ioc = 0; ++ sts.b_iso_out.pid = 0; ++ sts.b_iso_out.framenum = 0; ++ ++ for (i = 0; i < dwc_ep->desc_cnt - dwc_ep->pkt_per_frm; ++ i += dwc_ep->pkt_per_frm) { ++ for (j = 0; j < dwc_ep->pkt_per_frm; ++j) { ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep-> ++ data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - ++ data_per_desc % ++ 4) : 0; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ dma_ad += data_per_desc; ++ dma_desc++; ++ } ++ } ++ ++ for (j = 0; j < dwc_ep->pkt_per_frm - 1; ++j) { ++ ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep->data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ dma_desc++; ++ dma_ad += data_per_desc; ++ } ++ ++ sts.b_iso_out.ioc = 1; ++ sts.b_iso_out.l = dwc_ep->proc_buf_num; ++ ++ data_per_desc = ++ ((j + 1) * dwc_ep->maxpacket > ++ dwc_ep->data_per_frame) ? dwc_ep->data_per_frame - ++ j * dwc_ep->maxpacket : dwc_ep->maxpacket; ++ data_per_desc += ++ (data_per_desc % 4) ? (4 - data_per_desc % 4) : 0; ++ sts.b_iso_out.rxbytes = data_per_desc; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ } else { ++/** ISO IN EP */ ++ ++ dma_desc = ++ dwc_ep->iso_desc_addr + ++ dwc_ep->desc_cnt * dwc_ep->proc_buf_num; ++ ++ sts.b_iso_in.bs = BS_HOST_READY; ++ sts.b_iso_in.txsts = 0; ++ sts.b_iso_in.sp = 0; ++ sts.b_iso_in.ioc = 0; ++ sts.b_iso_in.pid = dwc_ep->pkt_per_frm; ++ sts.b_iso_in.framenum = dwc_ep->next_frame; ++ sts.b_iso_in.txbytes = dwc_ep->data_per_frame; ++ sts.b_iso_in.l = 0; ++ ++ for (i = 0; i < dwc_ep->desc_cnt - 1; i++) { ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ sts.b_iso_in.framenum += dwc_ep->bInterval; ++ dma_ad += dwc_ep->data_per_frame; ++ dma_desc++; ++ } ++ ++ sts.b_iso_in.ioc = 1; ++ sts.b_iso_in.l = dwc_ep->proc_buf_num; ++ ++ dma_desc->buf = dma_ad; ++ dma_desc->status.d32 = sts.d32; ++ ++ dwc_ep->next_frame = ++ sts.b_iso_in.framenum + dwc_ep->bInterval * 1; ++ } ++ dwc_ep->proc_buf_num = (dwc_ep->proc_buf_num ^ 1) & 0x1; ++} ++ ++/** ++ * This function is to handle Iso EP transfer complete interrupt ++ * in case Iso out packet was dropped ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param dwc_ep The EP for wihich transfer complete was asserted ++ * ++ */ ++static uint32_t handle_iso_out_pkt_dropped(dwc_otg_core_if_t * core_if, ++ dwc_ep_t * dwc_ep) ++{ ++ uint32_t dma_addr; ++ uint32_t drp_pkt; ++ uint32_t drp_pkt_cnt; ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ int i; ++ ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[dwc_ep->num]->doeptsiz); ++ ++ drp_pkt = dwc_ep->pkt_cnt - deptsiz.b.pktcnt; ++ drp_pkt_cnt = dwc_ep->pkt_per_frm - (drp_pkt % dwc_ep->pkt_per_frm); ++ ++ /* Setting dropped packets status */ ++ for (i = 0; i < drp_pkt_cnt; ++i) { ++ dwc_ep->pkt_info[drp_pkt].status = -DWC_E_NO_DATA; ++ drp_pkt++; ++ deptsiz.b.pktcnt--; ++ } ++ ++ if (deptsiz.b.pktcnt > 0) { ++ deptsiz.b.xfersize = ++ dwc_ep->xfer_len - (dwc_ep->pkt_cnt - ++ deptsiz.b.pktcnt) * dwc_ep->maxpacket; ++ } else { ++ deptsiz.b.xfersize = 0; ++ deptsiz.b.pktcnt = 0; ++ } ++ ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doeptsiz, ++ deptsiz.d32); ++ ++ if (deptsiz.b.pktcnt > 0) { ++ if (dwc_ep->proc_buf_num) { ++ dma_addr = ++ dwc_ep->dma_addr1 + dwc_ep->xfer_len - ++ deptsiz.b.xfersize; ++ } else { ++ dma_addr = ++ dwc_ep->dma_addr0 + dwc_ep->xfer_len - ++ deptsiz.b.xfersize;; ++ } ++ ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ out_ep_regs[dwc_ep->num]->doepdma, dma_addr); ++ ++ /** Re-enable endpoint, clear nak */ ++ depctl.d32 = 0; ++ depctl.b.epena = 1; ++ depctl.b.cnak = 1; ++ ++ DWC_MODIFY_REG32(&core_if->dev_if-> ++ out_ep_regs[dwc_ep->num]->doepctl, depctl.d32, ++ depctl.d32); ++ return 0; ++ } else { ++ return 1; ++ } ++} ++ ++/** ++ * This function sets iso packets information(PTI mode) ++ * ++ * @param core_if Programming view of DWC_otg controller. ++ * @param ep The EP to start the transfer on. ++ * ++ */ ++static uint32_t set_iso_pkts_info(dwc_otg_core_if_t * core_if, dwc_ep_t * ep) ++{ ++ int i, j; ++ dma_addr_t dma_ad; ++ iso_pkt_info_t *packet_info = ep->pkt_info; ++ uint32_t offset; ++ uint32_t frame_data; ++ deptsiz_data_t deptsiz; ++ ++ if (ep->proc_buf_num == 0) { ++ /** Buffer 0 descriptors setup */ ++ dma_ad = ep->dma_addr0; ++ } else { ++ /** Buffer 1 descriptors setup */ ++ dma_ad = ep->dma_addr1; ++ } ++ ++ if (ep->is_in) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if->in_ep_regs[ep->num]-> ++ dieptsiz); ++ } else { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if->out_ep_regs[ep->num]-> ++ doeptsiz); ++ } ++ ++ if (!deptsiz.b.xfersize) { ++ offset = 0; ++ for (i = 0; i < ep->pkt_cnt; i += ep->pkt_per_frm) { ++ frame_data = ep->data_per_frame; ++ for (j = 0; j < ep->pkt_per_frm; ++j) { ++ ++ /* Packet status - is not set as initially ++ * it is set to 0 and if packet was sent ++ successfully, status field will remain 0*/ ++ ++ /* Bytes has been transfered */ ++ packet_info->length = ++ (ep->maxpacket < ++ frame_data) ? ep->maxpacket : frame_data; ++ ++ /* Received packet offset */ ++ packet_info->offset = offset; ++ offset += packet_info->length; ++ frame_data -= packet_info->length; ++ ++ packet_info++; ++ } ++ } ++ return 1; ++ } else { ++ /* This is a workaround for in case of Transfer Complete with ++ * PktDrpSts interrupts merging - in this case Transfer complete ++ * interrupt for Isoc Out Endpoint is asserted without PktDrpSts ++ * set and with DOEPTSIZ register non zero. Investigations showed, ++ * that this happens when Out packet is dropped, but because of ++ * interrupts merging during first interrupt handling PktDrpSts ++ * bit is cleared and for next merged interrupts it is not reset. ++ * In this case SW hadles the interrupt as if PktDrpSts bit is set. ++ */ ++ if (ep->is_in) { ++ return 1; ++ } else { ++ return handle_iso_out_pkt_dropped(core_if, ep); ++ } ++ } ++} ++ ++/** ++ * This function is to handle Iso EP transfer complete interrupt ++ * ++ * @param pcd The PCD ++ * @param ep The EP for which transfer complete was asserted ++ * ++ */ ++static void complete_iso_ep(dwc_otg_pcd_t * pcd, dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(ep->pcd); ++ dwc_ep_t *dwc_ep = &ep->dwc_ep; ++ uint8_t is_last = 0; ++ ++ if (ep->dwc_ep.next_frame == 0xffffffff) { ++ DWC_WARN("Next frame is not set!\n"); ++ return; ++ } ++ ++ if (core_if->dma_enable) { ++ if (core_if->dma_desc_enable) { ++ set_ddma_iso_pkts_info(core_if, dwc_ep); ++ reinit_ddma_iso_xfer(core_if, dwc_ep); ++ is_last = 1; ++ } else { ++ if (core_if->pti_enh_enable) { ++ if (set_iso_pkts_info(core_if, dwc_ep)) { ++ dwc_ep->proc_buf_num = ++ (dwc_ep->proc_buf_num ^ 1) & 0x1; ++ dwc_otg_iso_ep_start_buf_transfer ++ (core_if, dwc_ep); ++ is_last = 1; ++ } ++ } else { ++ set_current_pkt_info(core_if, dwc_ep); ++ if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) { ++ is_last = 1; ++ dwc_ep->cur_pkt = 0; ++ dwc_ep->proc_buf_num = ++ (dwc_ep->proc_buf_num ^ 1) & 0x1; ++ if (dwc_ep->proc_buf_num) { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff1; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr1; ++ } else { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff0; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr0; ++ } ++ ++ } ++ dwc_otg_iso_ep_start_frm_transfer(core_if, ++ dwc_ep); ++ } ++ } ++ } else { ++ set_current_pkt_info(core_if, dwc_ep); ++ if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) { ++ is_last = 1; ++ dwc_ep->cur_pkt = 0; ++ dwc_ep->proc_buf_num = (dwc_ep->proc_buf_num ^ 1) & 0x1; ++ if (dwc_ep->proc_buf_num) { ++ dwc_ep->cur_pkt_addr = dwc_ep->xfer_buff1; ++ dwc_ep->cur_pkt_dma_addr = dwc_ep->dma_addr1; ++ } else { ++ dwc_ep->cur_pkt_addr = dwc_ep->xfer_buff0; ++ dwc_ep->cur_pkt_dma_addr = dwc_ep->dma_addr0; ++ } ++ ++ } ++ dwc_otg_iso_ep_start_frm_transfer(core_if, dwc_ep); ++ } ++ if (is_last) ++ dwc_otg_iso_buffer_done(pcd, ep, ep->iso_req_handle); ++} ++#endif /* DWC_EN_ISOC */ ++ ++/** ++ * This function handle BNA interrupt for Non Isochronous EPs ++ * ++ */ ++static void dwc_otg_pcd_handle_noniso_bna(dwc_otg_pcd_ep_t * ep) ++{ ++ dwc_ep_t *dwc_ep = &ep->dwc_ep; ++ volatile uint32_t *addr; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dwc_otg_pcd_t *pcd = ep->pcd; ++ dwc_otg_dev_dma_desc_t *dma_desc; ++ dev_dma_desc_sts_t sts = {.d32 = 0 }; ++ dwc_otg_core_if_t *core_if = ep->pcd->core_if; ++ int i, start; ++ ++ if (!dwc_ep->desc_cnt) ++ DWC_WARN("Ep%d %s Descriptor count = %d \n", dwc_ep->num, ++ (dwc_ep->is_in ? "IN" : "OUT"), dwc_ep->desc_cnt); ++ ++ if (core_if->core_params->cont_on_bna && !dwc_ep->is_in ++ && dwc_ep->type != DWC_OTG_EP_TYPE_CONTROL) { ++ uint32_t doepdma; ++ dwc_otg_dev_out_ep_regs_t *out_regs = ++ core_if->dev_if->out_ep_regs[dwc_ep->num]; ++ doepdma = DWC_READ_REG32(&(out_regs->doepdma)); ++ start = (doepdma - dwc_ep->dma_desc_addr)/sizeof(dwc_otg_dev_dma_desc_t); ++ dma_desc = &(dwc_ep->desc_addr[start]); ++ } else { ++ start = 0; ++ dma_desc = dwc_ep->desc_addr; ++ } ++ ++ ++ for (i = start; i < dwc_ep->desc_cnt; ++i, ++dma_desc) { ++ sts.d32 = dma_desc->status.d32; ++ sts.b.bs = BS_HOST_READY; ++ dma_desc->status.d32 = sts.d32; ++ } ++ ++ if (dwc_ep->is_in == 0) { ++ addr = ++ &GET_CORE_IF(pcd)->dev_if->out_ep_regs[dwc_ep->num]-> ++ doepctl; ++ } else { ++ addr = ++ &GET_CORE_IF(pcd)->dev_if->in_ep_regs[dwc_ep->num]->diepctl; ++ } ++ depctl.b.epena = 1; ++ depctl.b.cnak = 1; ++ DWC_MODIFY_REG32(addr, 0, depctl.d32); ++} ++ ++/** ++ * This function handles EP0 Control transfers. ++ * ++ * The state of the control transfers are tracked in ++ * ep0state. ++ */ ++static void handle_ep0(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_pcd_ep_t *ep0 = &pcd->ep0; ++ dev_dma_desc_sts_t desc_sts; ++ deptsiz0_data_t deptsiz; ++ uint32_t byte_count; ++ ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCDV, "%s()\n", __func__); ++ print_ep0_state(pcd); ++#endif ++ ++// DWC_PRINTF("HANDLE EP0\n"); ++ ++ switch (pcd->ep0state) { ++ case EP0_DISCONNECT: ++ break; ++ ++ case EP0_IDLE: ++ pcd->request_config = 0; ++ ++ pcd_setup(pcd); ++ break; ++ ++ case EP0_IN_DATA_PHASE: ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, "DATA_IN EP%d-%s: type=%d, mps=%d\n", ++ ep0->dwc_ep.num, (ep0->dwc_ep.is_in ? "IN" : "OUT"), ++ ep0->dwc_ep.type, ep0->dwc_ep.maxpacket); ++#endif ++ ++ if (core_if->dma_enable != 0) { ++ /* ++ * For EP0 we can only program 1 packet at a time so we ++ * need to do the make calculations after each complete. ++ * Call write_packet to make the calculations, as in ++ * slave mode, and use those values to determine if we ++ * can complete. ++ */ ++ if (core_if->dma_desc_enable == 0) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if-> ++ dev_if->in_ep_regs[0]-> ++ dieptsiz); ++ byte_count = ++ ep0->dwc_ep.xfer_len - deptsiz.b.xfersize; ++ } else { ++ desc_sts = ++ core_if->dev_if->in_desc_addr->status; ++ byte_count = ++ ep0->dwc_ep.xfer_len - desc_sts.b.bytes; ++ } ++ ep0->dwc_ep.xfer_count += byte_count; ++ ep0->dwc_ep.xfer_buff += byte_count; ++ ep0->dwc_ep.dma_addr += byte_count; ++ } ++ if (ep0->dwc_ep.xfer_count < ep0->dwc_ep.total_len) { ++ dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd), ++ &ep0->dwc_ep); ++ DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n"); ++ } else if (ep0->dwc_ep.sent_zlp) { ++ dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd), ++ &ep0->dwc_ep); ++ ep0->dwc_ep.sent_zlp = 0; ++ DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER sent zlp\n"); ++ } else { ++ ep0_complete_request(ep0); ++ DWC_DEBUGPL(DBG_PCD, "COMPLETE TRANSFER\n"); ++ } ++ break; ++ case EP0_OUT_DATA_PHASE: ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, "DATA_OUT EP%d-%s: type=%d, mps=%d\n", ++ ep0->dwc_ep.num, (ep0->dwc_ep.is_in ? "IN" : "OUT"), ++ ep0->dwc_ep.type, ep0->dwc_ep.maxpacket); ++#endif ++ if (core_if->dma_enable != 0) { ++ if (core_if->dma_desc_enable == 0) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if-> ++ dev_if->out_ep_regs[0]-> ++ doeptsiz); ++ byte_count = ++ ep0->dwc_ep.maxpacket - deptsiz.b.xfersize; ++ } else { ++ desc_sts = ++ core_if->dev_if->out_desc_addr->status; ++ byte_count = ++ ep0->dwc_ep.maxpacket - desc_sts.b.bytes; ++ } ++ ep0->dwc_ep.xfer_count += byte_count; ++ ep0->dwc_ep.xfer_buff += byte_count; ++ ep0->dwc_ep.dma_addr += byte_count; ++ } ++ if (ep0->dwc_ep.xfer_count < ep0->dwc_ep.total_len) { ++ dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd), ++ &ep0->dwc_ep); ++ DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER\n"); ++ } else if (ep0->dwc_ep.sent_zlp) { ++ dwc_otg_ep0_continue_transfer(GET_CORE_IF(pcd), ++ &ep0->dwc_ep); ++ ep0->dwc_ep.sent_zlp = 0; ++ DWC_DEBUGPL(DBG_PCD, "CONTINUE TRANSFER sent zlp\n"); ++ } else { ++ ep0_complete_request(ep0); ++ DWC_DEBUGPL(DBG_PCD, "COMPLETE TRANSFER\n"); ++ } ++ break; ++ ++ case EP0_IN_STATUS_PHASE: ++ case EP0_OUT_STATUS_PHASE: ++ DWC_DEBUGPL(DBG_PCD, "CASE: EP0_STATUS\n"); ++ ep0_complete_request(ep0); ++ pcd->ep0state = EP0_IDLE; ++ ep0->stopped = 1; ++ ep0->dwc_ep.is_in = 0; /* OUT for next SETUP */ ++ ++ /* Prepare for more SETUP Packets */ ++ if (core_if->dma_enable) { ++ ep0_out_start(core_if, pcd); ++ } ++ break; ++ ++ case EP0_STALL: ++ DWC_ERROR("EP0 STALLed, should not get here pcd_setup()\n"); ++ break; ++ } ++#ifdef DEBUG_EP0 ++ print_ep0_state(pcd); ++#endif ++} ++ ++/** ++ * Restart transfer ++ */ ++static void restart_transfer(dwc_otg_pcd_t * pcd, const uint32_t epnum) ++{ ++ dwc_otg_core_if_t *core_if; ++ dwc_otg_dev_if_t *dev_if; ++ deptsiz_data_t dieptsiz = {.d32 = 0 }; ++ dwc_otg_pcd_ep_t *ep; ++ ++ ep = get_in_ep(pcd, epnum); ++ ++#ifdef DWC_EN_ISOC ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ return; ++ } ++#endif /* DWC_EN_ISOC */ ++ ++ core_if = GET_CORE_IF(pcd); ++ dev_if = core_if->dev_if; ++ ++ dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dieptsiz); ++ ++ DWC_DEBUGPL(DBG_PCD, "xfer_buff=%p xfer_count=%0x xfer_len=%0x" ++ " stopped=%d\n", ep->dwc_ep.xfer_buff, ++ ep->dwc_ep.xfer_count, ep->dwc_ep.xfer_len, ep->stopped); ++ /* ++ * If xfersize is 0 and pktcnt in not 0, resend the last packet. ++ */ ++ if (dieptsiz.b.pktcnt && dieptsiz.b.xfersize == 0 && ++ ep->dwc_ep.start_xfer_buff != 0) { ++ if (ep->dwc_ep.total_len <= ep->dwc_ep.maxpacket) { ++ ep->dwc_ep.xfer_count = 0; ++ ep->dwc_ep.xfer_buff = ep->dwc_ep.start_xfer_buff; ++ ep->dwc_ep.xfer_len = ep->dwc_ep.xfer_count; ++ } else { ++ ep->dwc_ep.xfer_count -= ep->dwc_ep.maxpacket; ++ /* convert packet size to dwords. */ ++ ep->dwc_ep.xfer_buff -= ep->dwc_ep.maxpacket; ++ ep->dwc_ep.xfer_len = ep->dwc_ep.xfer_count; ++ } ++ ep->stopped = 0; ++ DWC_DEBUGPL(DBG_PCD, "xfer_buff=%p xfer_count=%0x " ++ "xfer_len=%0x stopped=%d\n", ++ ep->dwc_ep.xfer_buff, ++ ep->dwc_ep.xfer_count, ep->dwc_ep.xfer_len, ++ ep->stopped); ++ if (epnum == 0) { ++ dwc_otg_ep0_start_transfer(core_if, &ep->dwc_ep); ++ } else { ++ dwc_otg_ep_start_transfer(core_if, &ep->dwc_ep); ++ } ++ } ++} ++ ++/* ++ * This function create new nextep sequnce based on Learn Queue. ++ * ++ * @param core_if Programming view of DWC_otg controller ++ */ ++void predict_nextep_seq( dwc_otg_core_if_t * core_if) ++{ ++ dwc_otg_device_global_regs_t *dev_global_regs = ++ core_if->dev_if->dev_global_regs; ++ const uint32_t TOKEN_Q_DEPTH = core_if->hwcfg2.b.dev_token_q_depth; ++ /* Number of Token Queue Registers */ ++ const int DTKNQ_REG_CNT = (TOKEN_Q_DEPTH + 7) / 8; ++ dtknq1_data_t dtknqr1; ++ uint32_t in_tkn_epnums[4]; ++ uint8_t seqnum[MAX_EPS_CHANNELS]; ++ uint8_t intkn_seq[TOKEN_Q_DEPTH]; ++ grstctl_t resetctl = {.d32 = 0 }; ++ uint8_t temp; ++ int ndx = 0; ++ int start = 0; ++ int end = 0; ++ int sort_done = 0; ++ int i = 0; ++ volatile uint32_t *addr = &dev_global_regs->dtknqr1; ++ ++ ++ DWC_DEBUGPL(DBG_PCD,"dev_token_q_depth=%d\n",TOKEN_Q_DEPTH); ++ ++ /* Read the DTKNQ Registers */ ++ for (i = 0; i < DTKNQ_REG_CNT; i++) { ++ in_tkn_epnums[i] = DWC_READ_REG32(addr); ++ DWC_DEBUGPL(DBG_PCDV, "DTKNQR%d=0x%08x\n", i + 1, ++ in_tkn_epnums[i]); ++ if (addr == &dev_global_regs->dvbusdis) { ++ addr = &dev_global_regs->dtknqr3_dthrctl; ++ } else { ++ ++addr; ++ } ++ ++ } ++ ++ /* Copy the DTKNQR1 data to the bit field. */ ++ dtknqr1.d32 = in_tkn_epnums[0]; ++ if (dtknqr1.b.wrap_bit) { ++ ndx = dtknqr1.b.intknwptr; ++ end = ndx -1; ++ if (end < 0) ++ end = TOKEN_Q_DEPTH -1; ++ } else { ++ ndx = 0; ++ end = dtknqr1.b.intknwptr -1; ++ if (end < 0) ++ end = 0; ++ } ++ start = ndx; ++ ++ /* Fill seqnum[] by initial values: EP number + 31 */ ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ seqnum[i] = i +31; ++ } ++ ++ /* Fill intkn_seq[] from in_tkn_epnums[0] */ ++ for (i=0; i < 6; i++) ++ intkn_seq[i] = (in_tkn_epnums[0] >> ((7-i) * 4)) & 0xf; ++ ++ if (TOKEN_Q_DEPTH > 6) { ++ /* Fill intkn_seq[] from in_tkn_epnums[1] */ ++ for (i=6; i < 14; i++) ++ intkn_seq[i] = ++ (in_tkn_epnums[1] >> ((7 - (i - 6)) * 4)) & 0xf; ++ } ++ ++ if (TOKEN_Q_DEPTH > 14) { ++ /* Fill intkn_seq[] from in_tkn_epnums[1] */ ++ for (i=14; i < 22; i++) ++ intkn_seq[i] = ++ (in_tkn_epnums[2] >> ((7 - (i - 14)) * 4)) & 0xf; ++ } ++ ++ if (TOKEN_Q_DEPTH > 22) { ++ /* Fill intkn_seq[] from in_tkn_epnums[1] */ ++ for (i=22; i < 30; i++) ++ intkn_seq[i] = ++ (in_tkn_epnums[3] >> ((7 - (i - 22)) * 4)) & 0xf; ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s start=%d end=%d intkn_seq[]:\n", __func__, ++ start, end); ++ for (i=0; idev_if->num_in_eps; i++) { ++ if (core_if->nextep_seq[i] == 0xff ) ++ seqnum[i] = 0xff; ++ } ++ ++ /* Sort seqnum[] */ ++ sort_done = 0; ++ while (!sort_done) { ++ sort_done = 1; ++ for (i=0; idev_if->num_in_eps; i++) { ++ if (seqnum[i] > seqnum[i+1]) { ++ temp = seqnum[i]; ++ seqnum[i] = seqnum[i+1]; ++ seqnum[i+1] = temp; ++ sort_done = 0; ++ } ++ } ++ } ++ ++ ndx = start + seqnum[0]; ++ if (ndx >= TOKEN_Q_DEPTH) ++ ndx = ndx % TOKEN_Q_DEPTH; ++ core_if->first_in_nextep_seq = intkn_seq[ndx]; ++ ++ /* Update seqnum[] by EP numbers */ ++ for (i=0; i<=core_if->dev_if->num_in_eps; i++) { ++ ndx = start + i; ++ if (seqnum[i] < 31) { ++ ndx = start + seqnum[i]; ++ if (ndx >= TOKEN_Q_DEPTH) ++ ndx = ndx % TOKEN_Q_DEPTH; ++ seqnum[i] = intkn_seq[ndx]; ++ } else { ++ if (seqnum[i] < 0xff) { ++ seqnum[i] = seqnum[i] - 31; ++ } else { ++ break; ++ } ++ } ++ } ++ ++ /* Update nextep_seq[] based on seqnum[] */ ++ for (i=0; idev_if->num_in_eps; i++) { ++ if (seqnum[i] != 0xff) { ++ if (seqnum[i+1] != 0xff) { ++ core_if->nextep_seq[seqnum[i]] = seqnum[i+1]; ++ } else { ++ core_if->nextep_seq[seqnum[i]] = core_if->first_in_nextep_seq; ++ break; ++ } ++ } else { ++ break; ++ } ++ } ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s first_in_nextep_seq= %2d; nextep_seq[]:\n", ++ __func__, core_if->first_in_nextep_seq); ++ for (i=0; i <= core_if->dev_if->num_in_eps; i++) { ++ DWC_DEBUGPL(DBG_PCDV,"%2d\n", core_if->nextep_seq[i]); ++ } ++ ++ /* Flush the Learning Queue */ ++ resetctl.d32 = DWC_READ_REG32(&core_if->core_global_regs->grstctl); ++ resetctl.b.intknqflsh = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->grstctl, resetctl.d32); ++ ++ ++} ++ ++/** ++ * handle the IN EP disable interrupt. ++ */ ++static inline void handle_in_ep_disable_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ deptsiz_data_t dieptsiz = {.d32 = 0 }; ++ dctl_data_t dctl = {.d32 = 0 }; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ gintmsk_data_t gintmsk_data; ++ depctl_data_t depctl; ++ uint32_t diepdma; ++ uint32_t remain_to_transfer = 0; ++ uint8_t i; ++ uint32_t xfer_size; ++ ++ ep = get_in_ep(pcd, epnum); ++ dwc_ep = &ep->dwc_ep; ++ ++ if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ dwc_otg_flush_tx_fifo(core_if, dwc_ep->tx_fifo_num); ++ complete_ep(ep); ++ return; ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "diepctl%d=%0x\n", epnum, ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl)); ++ dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->dieptsiz); ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl); ++ ++ DWC_DEBUGPL(DBG_ANY, "pktcnt=%d size=%d\n", ++ dieptsiz.b.pktcnt, dieptsiz.b.xfersize); ++ ++ if ((core_if->start_predict == 0) || (depctl.b.eptype & 1)) { ++ if (ep->stopped) { ++ if (core_if->en_multiple_tx_fifo) ++ /* Flush the Tx FIFO */ ++ dwc_otg_flush_tx_fifo(core_if, dwc_ep->tx_fifo_num); ++ /* Clear the Global IN NP NAK */ ++ dctl.d32 = 0; ++ dctl.b.cgnpinnak = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); ++ /* Restart the transaction */ ++ if (dieptsiz.b.pktcnt != 0 || dieptsiz.b.xfersize != 0) { ++ restart_transfer(pcd, epnum); ++ } ++ } else { ++ /* Restart the transaction */ ++ if (dieptsiz.b.pktcnt != 0 || dieptsiz.b.xfersize != 0) { ++ restart_transfer(pcd, epnum); ++ } ++ DWC_DEBUGPL(DBG_ANY, "STOPPED!!!\n"); ++ } ++ return; ++ } ++ ++ if (core_if->start_predict > 2) { // NP IN EP ++ core_if->start_predict--; ++ return; ++ } ++ ++ core_if->start_predict--; ++ ++ if (core_if->start_predict == 1) { // All NP IN Ep's disabled now ++ ++ predict_nextep_seq(core_if); ++ ++ /* Update all active IN EP's NextEP field based of nextep_seq[] */ ++ for ( i = 0; i <= core_if->dev_if->num_in_eps; i++) { ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (core_if->nextep_seq[i] != 0xff) { // Active NP IN EP ++ depctl.b.nextep = core_if->nextep_seq[i]; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32); ++ } ++ } ++ /* Flush Shared NP TxFIFO */ ++ dwc_otg_flush_tx_fifo(core_if, 0); ++ /* Rewind buffers */ ++ if (!core_if->dma_desc_enable) { ++ i = core_if->first_in_nextep_seq; ++ do { ++ ep = get_in_ep(pcd, i); ++ dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz); ++ xfer_size = ep->dwc_ep.total_len - ep->dwc_ep.xfer_count; ++ if (xfer_size > ep->dwc_ep.maxxfer) ++ xfer_size = ep->dwc_ep.maxxfer; ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (dieptsiz.b.pktcnt != 0) { ++ if (xfer_size == 0) { ++ remain_to_transfer = 0; ++ } else { ++ if ((xfer_size % ep->dwc_ep.maxpacket) == 0) { ++ remain_to_transfer = ++ dieptsiz.b.pktcnt * ep->dwc_ep.maxpacket; ++ } else { ++ remain_to_transfer = ((dieptsiz.b.pktcnt -1) * ep->dwc_ep.maxpacket) ++ + (xfer_size % ep->dwc_ep.maxpacket); ++ } ++ } ++ diepdma = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepdma); ++ dieptsiz.b.xfersize = remain_to_transfer; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->dieptsiz, dieptsiz.d32); ++ diepdma = ep->dwc_ep.dma_addr + (xfer_size - remain_to_transfer); ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepdma, diepdma); ++ } ++ i = core_if->nextep_seq[i]; ++ } while (i != core_if->first_in_nextep_seq); ++ } else { // dma_desc_enable ++ DWC_PRINTF("%s Learning Queue not supported in DDMA\n", __func__); ++ } ++ ++ /* Restart transfers in predicted sequences */ ++ i = core_if->first_in_nextep_seq; ++ do { ++ dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz); ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (dieptsiz.b.pktcnt != 0) { ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ depctl.b.epena = 1; ++ depctl.b.cnak = 1; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32); ++ } ++ i = core_if->nextep_seq[i]; ++ } while (i != core_if->first_in_nextep_seq); ++ ++ /* Clear the global non-periodic IN NAK handshake */ ++ dctl.d32 = 0; ++ dctl.b.cgnpinnak = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); ++ ++ /* Unmask EP Mismatch interrupt */ ++ gintmsk_data.d32 = 0; ++ gintmsk_data.b.epmismatch = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, gintmsk_data.d32); ++ ++ core_if->start_predict = 0; ++ ++ } ++} ++ ++/** ++ * Handler for the IN EP timeout handshake interrupt. ++ */ ++static inline void handle_in_ep_timeout_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ ++#ifdef DEBUG ++ deptsiz_data_t dieptsiz = {.d32 = 0 }; ++ uint32_t num = 0; ++#endif ++ dctl_data_t dctl = {.d32 = 0 }; ++ dwc_otg_pcd_ep_t *ep; ++ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ ep = get_in_ep(pcd, epnum); ++ ++ /* Disable the NP Tx Fifo Empty Interrrupt */ ++ if (!core_if->dma_enable) { ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ } ++ /** @todo NGS Check EP type. ++ * Implement for Periodic EPs */ ++ /* ++ * Non-periodic EP ++ */ ++ /* Enable the Global IN NAK Effective Interrupt */ ++ intr_mask.b.ginnakeff = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, intr_mask.d32); ++ ++ /* Set Global IN NAK */ ++ dctl.b.sgnpinnak = 1; ++ DWC_MODIFY_REG32(&dev_if->dev_global_regs->dctl, dctl.d32, dctl.d32); ++ ++ ep->stopped = 1; ++ ++#ifdef DEBUG ++ dieptsiz.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[num]->dieptsiz); ++ DWC_DEBUGPL(DBG_ANY, "pktcnt=%d size=%d\n", ++ dieptsiz.b.pktcnt, dieptsiz.b.xfersize); ++#endif ++ ++#ifdef DISABLE_PERIODIC_EP ++ /* ++ * Set the NAK bit for this EP to ++ * start the disable process. ++ */ ++ diepctl.d32 = 0; ++ diepctl.b.snak = 1; ++ DWC_MODIFY_REG32(&dev_if->in_ep_regs[num]->diepctl, diepctl.d32, ++ diepctl.d32); ++ ep->disabling = 1; ++ ep->stopped = 1; ++#endif ++} ++ ++/** ++ * Handler for the IN EP NAK interrupt. ++ */ ++static inline int32_t handle_in_ep_nak_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ /** @todo implement ISR */ ++ dwc_otg_core_if_t *core_if; ++ diepmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "IN EP NAK"); ++ core_if = GET_CORE_IF(pcd); ++ intr_mask.b.nak = 1; ++ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ diepeachintmsk[epnum], intr_mask.d32, 0); ++ } else { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->diepmsk, ++ intr_mask.d32, 0); ++ } ++ ++ return 1; ++} ++ ++/** ++ * Handler for the OUT EP Babble interrupt. ++ */ ++static inline int32_t handle_out_ep_babble_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ /** @todo implement ISR */ ++ dwc_otg_core_if_t *core_if; ++ doepmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", ++ "OUT EP Babble"); ++ core_if = GET_CORE_IF(pcd); ++ intr_mask.b.babble = 1; ++ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ doepeachintmsk[epnum], intr_mask.d32, 0); ++ } else { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk, ++ intr_mask.d32, 0); ++ } ++ ++ return 1; ++} ++ ++/** ++ * Handler for the OUT EP NAK interrupt. ++ */ ++static inline int32_t handle_out_ep_nak_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ /** @todo implement ISR */ ++ dwc_otg_core_if_t *core_if; ++ doepmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_ANY, "INTERRUPT Handler not implemented for %s\n", "OUT EP NAK"); ++ core_if = GET_CORE_IF(pcd); ++ intr_mask.b.nak = 1; ++ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ doepeachintmsk[epnum], intr_mask.d32, 0); ++ } else { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk, ++ intr_mask.d32, 0); ++ } ++ ++ return 1; ++} ++ ++/** ++ * Handler for the OUT EP NYET interrupt. ++ */ ++static inline int32_t handle_out_ep_nyet_intr(dwc_otg_pcd_t * pcd, ++ const uint32_t epnum) ++{ ++ /** @todo implement ISR */ ++ dwc_otg_core_if_t *core_if; ++ doepmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", "OUT EP NYET"); ++ core_if = GET_CORE_IF(pcd); ++ intr_mask.b.nyet = 1; ++ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs-> ++ doepeachintmsk[epnum], intr_mask.d32, 0); ++ } else { ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk, ++ intr_mask.d32, 0); ++ } ++ ++ return 1; ++} ++ ++/** ++ * This interrupt indicates that an IN EP has a pending Interrupt. ++ * The sequence for handling the IN EP interrupt is shown below: ++ * -# Read the Device All Endpoint Interrupt register ++ * -# Repeat the following for each IN EP interrupt bit set (from ++ * LSB to MSB). ++ * -# Read the Device Endpoint Interrupt (DIEPINTn) register ++ * -# If "Transfer Complete" call the request complete function ++ * -# If "Endpoint Disabled" complete the EP disable procedure. ++ * -# If "AHB Error Interrupt" log error ++ * -# If "Time-out Handshake" log error ++ * -# If "IN Token Received when TxFIFO Empty" write packet to Tx ++ * FIFO. ++ * -# If "IN Token EP Mismatch" (disable, this is handled by EP ++ * Mismatch Interrupt) ++ */ ++static int32_t dwc_otg_pcd_handle_in_ep_intr(dwc_otg_pcd_t * pcd) ++{ ++#define CLEAR_IN_EP_INTR(__core_if,__epnum,__intr) \ ++do { \ ++ diepint_data_t diepint = {.d32=0}; \ ++ diepint.b.__intr = 1; \ ++ DWC_WRITE_REG32(&__core_if->dev_if->in_ep_regs[__epnum]->diepint, \ ++ diepint.d32); \ ++} while (0) ++ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ dwc_otg_dev_if_t *dev_if = core_if->dev_if; ++ diepint_data_t diepint = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ uint32_t ep_intr; ++ uint32_t epnum = 0; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, pcd); ++ ++ /* Read in the device interrupt bits */ ++ ep_intr = dwc_otg_read_dev_all_in_ep_intr(core_if); ++ ++ /* Service the Device IN interrupts for each endpoint */ ++ while (ep_intr) { ++ if (ep_intr & 0x1) { ++ uint32_t empty_msk; ++ /* Get EP pointer */ ++ ep = get_in_ep(pcd, epnum); ++ dwc_ep = &ep->dwc_ep; ++ ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl); ++ empty_msk = ++ DWC_READ_REG32(&dev_if-> ++ dev_global_regs->dtknqr4_fifoemptymsk); ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "IN EP INTERRUPT - %d\nepmty_msk - %8x diepctl - %8x\n", ++ epnum, empty_msk, depctl.d32); ++ ++ DWC_DEBUGPL(DBG_PCD, ++ "EP%d-%s: type=%d, mps=%d\n", ++ dwc_ep->num, (dwc_ep->is_in ? "IN" : "OUT"), ++ dwc_ep->type, dwc_ep->maxpacket); ++ ++ diepint.d32 = ++ dwc_otg_read_dev_in_ep_intr(core_if, dwc_ep); ++ ++ DWC_DEBUGPL(DBG_PCDV, ++ "EP %d Interrupt Register - 0x%x\n", epnum, ++ diepint.d32); ++ /* Transfer complete */ ++ if (diepint.b.xfercompl) { ++ /* Disable the NP Tx FIFO Empty ++ * Interrupt */ ++ if (core_if->en_multiple_tx_fifo == 0) { ++ intr_mask.b.nptxfempty = 1; ++ DWC_MODIFY_REG32 ++ (&core_if->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ } else { ++ /* Disable the Tx FIFO Empty Interrupt for this EP */ ++ uint32_t fifoemptymsk = ++ 0x1 << dwc_ep->num; ++ DWC_MODIFY_REG32(&core_if-> ++ dev_if->dev_global_regs->dtknqr4_fifoemptymsk, ++ fifoemptymsk, 0); ++ } ++ /* Clear the bit in DIEPINTn for this interrupt */ ++ CLEAR_IN_EP_INTR(core_if, epnum, xfercompl); ++ ++ /* Complete the transfer */ ++ if (epnum == 0) { ++ handle_ep0(pcd); ++ } ++#ifdef DWC_EN_ISOC ++ else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ if (!ep->stopped) ++ complete_iso_ep(pcd, ep); ++ } ++#endif /* DWC_EN_ISOC */ ++#ifdef DWC_UTE_PER_IO ++ else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ if (!ep->stopped) ++ complete_xiso_ep(ep); ++ } ++#endif /* DWC_UTE_PER_IO */ ++ else { ++ if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC && ++ dwc_ep->bInterval > 1) { ++ dwc_ep->frame_num += dwc_ep->bInterval; ++ if (dwc_ep->frame_num > 0x3FFF) ++ { ++ dwc_ep->frm_overrun = 1; ++ dwc_ep->frame_num &= 0x3FFF; ++ } else ++ dwc_ep->frm_overrun = 0; ++ } ++ complete_ep(ep); ++ if(diepint.b.nak) ++ CLEAR_IN_EP_INTR(core_if, epnum, nak); ++ } ++ } ++ /* Endpoint disable */ ++ if (diepint.b.epdisabled) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d IN disabled\n", ++ epnum); ++ handle_in_ep_disable_intr(pcd, epnum); ++ ++ /* Clear the bit in DIEPINTn for this interrupt */ ++ CLEAR_IN_EP_INTR(core_if, epnum, epdisabled); ++ } ++ /* AHB Error */ ++ if (diepint.b.ahberr) { ++ DWC_ERROR("EP%d IN AHB Error\n", epnum); ++ /* Clear the bit in DIEPINTn for this interrupt */ ++ CLEAR_IN_EP_INTR(core_if, epnum, ahberr); ++ } ++ /* TimeOUT Handshake (non-ISOC IN EPs) */ ++ if (diepint.b.timeout) { ++ DWC_ERROR("EP%d IN Time-out\n", epnum); ++ handle_in_ep_timeout_intr(pcd, epnum); ++ ++ CLEAR_IN_EP_INTR(core_if, epnum, timeout); ++ } ++ /** IN Token received with TxF Empty */ ++ if (diepint.b.intktxfemp) { ++ DWC_DEBUGPL(DBG_ANY, ++ "EP%d IN TKN TxFifo Empty\n", ++ epnum); ++ if (!ep->stopped && epnum != 0) { ++ ++ diepmsk_data_t diepmsk = {.d32 = 0 }; ++ diepmsk.b.intktxfemp = 1; ++ ++ if (core_if->multiproc_int_enable) { ++ DWC_MODIFY_REG32 ++ (&dev_if->dev_global_regs->diepeachintmsk ++ [epnum], diepmsk.d32, 0); ++ } else { ++ DWC_MODIFY_REG32 ++ (&dev_if->dev_global_regs->diepmsk, ++ diepmsk.d32, 0); ++ } ++ } else if (core_if->dma_desc_enable ++ && epnum == 0 ++ && pcd->ep0state == ++ EP0_OUT_STATUS_PHASE) { ++ // EP0 IN set STALL ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs ++ [epnum]->diepctl); ++ ++ /* set the disable and stall bits */ ++ if (depctl.b.epena) { ++ depctl.b.epdis = 1; ++ } ++ depctl.b.stall = 1; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs ++ [epnum]->diepctl, ++ depctl.d32); ++ } ++ CLEAR_IN_EP_INTR(core_if, epnum, intktxfemp); ++ } ++ /** IN Token Received with EP mismatch */ ++ if (diepint.b.intknepmis) { ++ DWC_DEBUGPL(DBG_ANY, ++ "EP%d IN TKN EP Mismatch\n", epnum); ++ CLEAR_IN_EP_INTR(core_if, epnum, intknepmis); ++ } ++ /** IN Endpoint NAK Effective */ ++ if (diepint.b.inepnakeff) { ++ DWC_DEBUGPL(DBG_ANY, ++ "EP%d IN EP NAK Effective\n", ++ epnum); ++ /* Periodic EP */ ++ if (ep->disabling) { ++ depctl.d32 = 0; ++ depctl.b.snak = 1; ++ depctl.b.epdis = 1; ++ DWC_MODIFY_REG32(&dev_if->in_ep_regs ++ [epnum]->diepctl, ++ depctl.d32, ++ depctl.d32); ++ } ++ CLEAR_IN_EP_INTR(core_if, epnum, inepnakeff); ++ ++ } ++ ++ /** IN EP Tx FIFO Empty Intr */ ++ if (diepint.b.emptyintr) { ++ DWC_DEBUGPL(DBG_ANY, ++ "EP%d Tx FIFO Empty Intr \n", ++ epnum); ++ write_empty_tx_fifo(pcd, epnum); ++ ++ CLEAR_IN_EP_INTR(core_if, epnum, emptyintr); ++ ++ } ++ ++ /** IN EP BNA Intr */ ++ if (diepint.b.bna) { ++ CLEAR_IN_EP_INTR(core_if, epnum, bna); ++ if (core_if->dma_desc_enable) { ++#ifdef DWC_EN_ISOC ++ if (dwc_ep->type == ++ DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * This checking is performed to prevent first "false" BNA ++ * handling occuring right after reconnect ++ */ ++ if (dwc_ep->next_frame != ++ 0xffffffff) ++ dwc_otg_pcd_handle_iso_bna(ep); ++ } else ++#endif /* DWC_EN_ISOC */ ++ { ++ dwc_otg_pcd_handle_noniso_bna(ep); ++ } ++ } ++ } ++ /* NAK Interrutp */ ++ if (diepint.b.nak) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d IN NAK Interrupt\n", ++ epnum); ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ depctl_data_t depctl; ++ if (ep->dwc_ep.frame_num == 0xFFFFFFFF) { ++ ep->dwc_ep.frame_num = core_if->frame_num; ++ if (ep->dwc_ep.bInterval > 1) { ++ depctl.d32 = 0; ++ depctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[epnum]->diepctl); ++ if (ep->dwc_ep.frame_num & 0x1) { ++ depctl.b.setd1pid = 1; ++ depctl.b.setd0pid = 0; ++ } else { ++ depctl.b.setd0pid = 1; ++ depctl.b.setd1pid = 0; ++ } ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[epnum]->diepctl, depctl.d32); ++ } ++ start_next_request(ep); ++ } ++ ep->dwc_ep.frame_num += ep->dwc_ep.bInterval; ++ if (dwc_ep->frame_num > 0x3FFF) { ++ dwc_ep->frm_overrun = 1; ++ dwc_ep->frame_num &= 0x3FFF; ++ } else ++ dwc_ep->frm_overrun = 0; ++ } ++ ++ CLEAR_IN_EP_INTR(core_if, epnum, nak); ++ } ++ } ++ epnum++; ++ ep_intr >>= 1; ++ } ++ ++ return 1; ++#undef CLEAR_IN_EP_INTR ++} ++ ++/** ++ * This interrupt indicates that an OUT EP has a pending Interrupt. ++ * The sequence for handling the OUT EP interrupt is shown below: ++ * -# Read the Device All Endpoint Interrupt register ++ * -# Repeat the following for each OUT EP interrupt bit set (from ++ * LSB to MSB). ++ * -# Read the Device Endpoint Interrupt (DOEPINTn) register ++ * -# If "Transfer Complete" call the request complete function ++ * -# If "Endpoint Disabled" complete the EP disable procedure. ++ * -# If "AHB Error Interrupt" log error ++ * -# If "Setup Phase Done" process Setup Packet (See Standard USB ++ * Command Processing) ++ */ ++static int32_t dwc_otg_pcd_handle_out_ep_intr(dwc_otg_pcd_t * pcd) ++{ ++#define CLEAR_OUT_EP_INTR(__core_if,__epnum,__intr) \ ++do { \ ++ doepint_data_t doepint = {.d32=0}; \ ++ doepint.b.__intr = 1; \ ++ DWC_WRITE_REG32(&__core_if->dev_if->out_ep_regs[__epnum]->doepint, \ ++ doepint.d32); \ ++} while (0) ++ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ uint32_t ep_intr; ++ doepint_data_t doepint = {.d32 = 0 }; ++ uint32_t epnum = 0; ++ dwc_otg_pcd_ep_t *ep; ++ dwc_ep_t *dwc_ep; ++ dctl_data_t dctl = {.d32 = 0 }; ++ gintmsk_data_t gintmsk = {.d32 = 0 }; ++ ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s()\n", __func__); ++ ++ /* Read in the device interrupt bits */ ++ ep_intr = dwc_otg_read_dev_all_out_ep_intr(core_if); ++ ++ while (ep_intr) { ++ if (ep_intr & 0x1) { ++ /* Get EP pointer */ ++ ep = get_out_ep(pcd, epnum); ++ dwc_ep = &ep->dwc_ep; ++ ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, ++ "EP%d-%s: type=%d, mps=%d\n", ++ dwc_ep->num, (dwc_ep->is_in ? "IN" : "OUT"), ++ dwc_ep->type, dwc_ep->maxpacket); ++#endif ++ doepint.d32 = ++ dwc_otg_read_dev_out_ep_intr(core_if, dwc_ep); ++ /* Moved this interrupt upper due to core deffect of asserting ++ * OUT EP 0 xfercompl along with stsphsrcvd in BDMA */ ++ if (doepint.b.stsphsercvd) { ++ deptsiz0_data_t deptsiz; ++ CLEAR_OUT_EP_INTR(core_if, epnum, stsphsercvd); ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[0]->doeptsiz); ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a ++ && core_if->dma_enable ++ && core_if->dma_desc_enable == 0 ++ && doepint.b.xfercompl ++ && deptsiz.b.xfersize == 24) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, ++ xfercompl); ++ doepint.b.xfercompl = 0; ++ ep0_out_start(core_if, pcd); ++ } ++ if ((core_if->dma_desc_enable) || ++ (core_if->dma_enable ++ && core_if->snpsid >= ++ OTG_CORE_REV_3_00a)) { ++ do_setup_in_status_phase(pcd); ++ } ++ } ++ /* Transfer complete */ ++ if (doepint.b.xfercompl) { ++ ++ if (epnum == 0) { ++ /* Clear the bit in DOEPINTn for this interrupt */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, xfercompl); ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a) { ++ DWC_DEBUGPL(DBG_PCDV, "DOEPINT=%x doepint=%x\n", ++ DWC_READ_REG32(&core_if->dev_if->out_ep_regs[0]->doepint), ++ doepint.d32); ++ DWC_DEBUGPL(DBG_PCDV, "DOEPCTL=%x \n", ++ DWC_READ_REG32(&core_if->dev_if->out_ep_regs[0]->doepctl)); ++ ++ if (core_if->snpsid >= OTG_CORE_REV_3_00a ++ && core_if->dma_enable == 0) { ++ doepint_data_t doepint; ++ doepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[0]->doepint); ++ if (pcd->ep0state == EP0_IDLE && doepint.b.sr) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, sr); ++ goto exit_xfercompl; ++ } ++ } ++ /* In case of DDMA look at SR bit to go to the Data Stage */ ++ if (core_if->dma_desc_enable) { ++ dev_dma_desc_sts_t status = {.d32 = 0}; ++ if (pcd->ep0state == EP0_IDLE) { ++ status.d32 = core_if->dev_if->setup_desc_addr[core_if-> ++ dev_if->setup_desc_index]->status.d32; ++ if(pcd->data_terminated) { ++ pcd->data_terminated = 0; ++ status.d32 = core_if->dev_if->out_desc_addr->status.d32; ++ dwc_memcpy(&pcd->setup_pkt->req, pcd->backup_buf, 8); ++ } ++ if (status.b.sr) { ++ if (doepint.b.setup) { ++ DWC_DEBUGPL(DBG_PCDV, "DMA DESC EP0_IDLE SR=1 setup=1\n"); ++ /* Already started data stage, clear setup */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, setup); ++ doepint.b.setup = 0; ++ handle_ep0(pcd); ++ /* Prepare for more setup packets */ ++ if (pcd->ep0state == EP0_IN_STATUS_PHASE || ++ pcd->ep0state == EP0_IN_DATA_PHASE) { ++ ep0_out_start(core_if, pcd); ++ } ++ ++ goto exit_xfercompl; ++ } else { ++ /* Prepare for more setup packets */ ++ DWC_DEBUGPL(DBG_PCDV, ++ "EP0_IDLE SR=1 setup=0 new setup comes\n"); ++ ep0_out_start(core_if, pcd); ++ } ++ } ++ } else { ++ dwc_otg_pcd_request_t *req; ++ dev_dma_desc_sts_t status = {.d32 = 0}; ++ diepint_data_t diepint0; ++ diepint0.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint); ++ ++ if (pcd->ep0state == EP0_STALL || pcd->ep0state == EP0_DISCONNECT) { ++ DWC_ERROR("EP0 is stalled/disconnected\n"); ++ } ++ ++ /* Clear IN xfercompl if set */ ++ if (diepint0.b.xfercompl && (pcd->ep0state == EP0_IN_STATUS_PHASE ++ || pcd->ep0state == EP0_IN_DATA_PHASE)) { ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint, diepint0.d32); ++ } ++ ++ status.d32 = core_if->dev_if->setup_desc_addr[core_if-> ++ dev_if->setup_desc_index]->status.d32; ++ ++ if (ep->dwc_ep.xfer_count != ep->dwc_ep.total_len ++ && (pcd->ep0state == EP0_OUT_DATA_PHASE)) ++ status.d32 = core_if->dev_if->out_desc_addr->status.d32; ++ if (pcd->ep0state == EP0_OUT_STATUS_PHASE) ++ status.d32 = status.d32 = core_if->dev_if-> ++ out_desc_addr->status.d32; ++ ++ if (status.b.sr) { ++ if (DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ DWC_DEBUGPL(DBG_PCDV, "Request queue empty!!\n"); ++ } else { ++ DWC_DEBUGPL(DBG_PCDV, "complete req!!\n"); ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ if (ep->dwc_ep.xfer_count != ep->dwc_ep.total_len && ++ pcd->ep0state == EP0_OUT_DATA_PHASE) { ++ /* Read arrived setup packet from req->buf */ ++ dwc_memcpy(&pcd->setup_pkt->req, ++ req->buf + ep->dwc_ep.xfer_count, 8); ++ } ++ req->actual = ep->dwc_ep.xfer_count; ++ dwc_otg_request_done(ep, req, -ECONNRESET); ++ ep->dwc_ep.start_xfer_buff = 0; ++ ep->dwc_ep.xfer_buff = 0; ++ ep->dwc_ep.xfer_len = 0; ++ } ++ pcd->ep0state = EP0_IDLE; ++ if (doepint.b.setup) { ++ DWC_DEBUGPL(DBG_PCDV, "EP0_IDLE SR=1 setup=1\n"); ++ /* Data stage started, clear setup */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, setup); ++ doepint.b.setup = 0; ++ handle_ep0(pcd); ++ /* Prepare for setup packets if ep0in was enabled*/ ++ if (pcd->ep0state == EP0_IN_STATUS_PHASE) { ++ ep0_out_start(core_if, pcd); ++ } ++ ++ goto exit_xfercompl; ++ } else { ++ /* Prepare for more setup packets */ ++ DWC_DEBUGPL(DBG_PCDV, ++ "EP0_IDLE SR=1 setup=0 new setup comes 2\n"); ++ ep0_out_start(core_if, pcd); ++ } ++ } ++ } ++ } ++ if (core_if->snpsid >= OTG_CORE_REV_2_94a && core_if->dma_enable ++ && core_if->dma_desc_enable == 0) { ++ doepint_data_t doepint_temp = {.d32 = 0}; ++ deptsiz0_data_t doeptsize0 = {.d32 = 0 }; ++ doepint_temp.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->dwc_ep.num]->doepint); ++ doeptsize0.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->dwc_ep.num]->doeptsiz); ++ if (pcd->ep0state == EP0_IDLE) { ++ if (doepint_temp.b.sr) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, sr); ++ } ++ doepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[0]->doepint); ++ if (doeptsize0.b.supcnt == 3) { ++ DWC_DEBUGPL(DBG_ANY, "Rolling over!!!!!!!\n"); ++ ep->dwc_ep.stp_rollover = 1; ++ } ++ if (doepint.b.setup) { ++retry: ++ /* Already started data stage, clear setup */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, setup); ++ doepint.b.setup = 0; ++ handle_ep0(pcd); ++ ep->dwc_ep.stp_rollover = 0; ++ /* Prepare for more setup packets */ ++ if (pcd->ep0state == EP0_IN_STATUS_PHASE || ++ pcd->ep0state == EP0_IN_DATA_PHASE) { ++ ep0_out_start(core_if, pcd); ++ } ++ goto exit_xfercompl; ++ } else { ++ /* Prepare for more setup packets */ ++ DWC_DEBUGPL(DBG_ANY, ++ "EP0_IDLE SR=1 setup=0 new setup comes\n"); ++ doepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[0]->doepint); ++ if(doepint.b.setup) ++ goto retry; ++ ep0_out_start(core_if, pcd); ++ } ++ } else { ++ dwc_otg_pcd_request_t *req; ++ diepint_data_t diepint0 = {.d32 = 0}; ++ doepint_data_t doepint_temp = {.d32 = 0}; ++ depctl_data_t diepctl0; ++ diepint0.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint); ++ diepctl0.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepctl); ++ ++ if (pcd->ep0state == EP0_IN_DATA_PHASE ++ || pcd->ep0state == EP0_IN_STATUS_PHASE) { ++ if (diepint0.b.xfercompl) { ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint, diepint0.d32); ++ } ++ if (diepctl0.b.epena) { ++ diepint_data_t diepint = {.d32 = 0}; ++ diepctl0.b.snak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepctl, diepctl0.d32); ++ do { ++ dwc_udelay(10); ++ diepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint); ++ } while (!diepint.b.inepnakeff); ++ diepint.b.inepnakeff = 1; ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint, diepint.d32); ++ diepctl0.d32 = 0; ++ diepctl0.b.epdis = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[0]->diepctl, ++ diepctl0.d32); ++ do { ++ dwc_udelay(10); ++ diepint.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ in_ep_regs[0]->diepint); ++ } while (!diepint.b.epdisabled); ++ diepint.b.epdisabled = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->in_ep_regs[0]->diepint, ++ diepint.d32); ++ } ++ } ++ doepint_temp.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[ep->dwc_ep.num]->doepint); ++ if (doepint_temp.b.sr) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, sr); ++ if (DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ DWC_DEBUGPL(DBG_PCDV, "Request queue empty!!\n"); ++ } else { ++ DWC_DEBUGPL(DBG_PCDV, "complete req!!\n"); ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ if (ep->dwc_ep.xfer_count != ep->dwc_ep.total_len && ++ pcd->ep0state == EP0_OUT_DATA_PHASE) { ++ /* Read arrived setup packet from req->buf */ ++ dwc_memcpy(&pcd->setup_pkt->req, ++ req->buf + ep->dwc_ep.xfer_count, 8); ++ } ++ req->actual = ep->dwc_ep.xfer_count; ++ dwc_otg_request_done(ep, req, -ECONNRESET); ++ ep->dwc_ep.start_xfer_buff = 0; ++ ep->dwc_ep.xfer_buff = 0; ++ ep->dwc_ep.xfer_len = 0; ++ } ++ pcd->ep0state = EP0_IDLE; ++ if (doepint.b.setup) { ++ DWC_DEBUGPL(DBG_PCDV, "EP0_IDLE SR=1 setup=1\n"); ++ /* Data stage started, clear setup */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, setup); ++ doepint.b.setup = 0; ++ handle_ep0(pcd); ++ /* Prepare for setup packets if ep0in was enabled*/ ++ if (pcd->ep0state == EP0_IN_STATUS_PHASE) { ++ ep0_out_start(core_if, pcd); ++ } ++ goto exit_xfercompl; ++ } else { ++ /* Prepare for more setup packets */ ++ DWC_DEBUGPL(DBG_PCDV, ++ "EP0_IDLE SR=1 setup=0 new setup comes 2\n"); ++ ep0_out_start(core_if, pcd); ++ } ++ } ++ } ++ } ++ if (core_if->dma_enable == 0 || pcd->ep0state != EP0_IDLE) ++ handle_ep0(pcd); ++exit_xfercompl: ++ DWC_DEBUGPL(DBG_PCDV, "DOEPINT=%x doepint=%x\n", ++ dwc_otg_read_dev_out_ep_intr(core_if, dwc_ep), doepint.d32); ++ } else { ++ if (core_if->dma_desc_enable == 0 ++ || pcd->ep0state != EP0_IDLE) ++ handle_ep0(pcd); ++ } ++#ifdef DWC_EN_ISOC ++ } else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ if (doepint.b.pktdrpsts == 0) { ++ /* Clear the bit in DOEPINTn for this interrupt */ ++ CLEAR_OUT_EP_INTR(core_if, ++ epnum, ++ xfercompl); ++ complete_iso_ep(pcd, ep); ++ } else { ++ ++ doepint_data_t doepint = {.d32 = 0 }; ++ doepint.b.xfercompl = 1; ++ doepint.b.pktdrpsts = 1; ++ DWC_WRITE_REG32 ++ (&core_if->dev_if->out_ep_regs ++ [epnum]->doepint, ++ doepint.d32); ++ if (handle_iso_out_pkt_dropped ++ (core_if, dwc_ep)) { ++ complete_iso_ep(pcd, ++ ep); ++ } ++ } ++#endif /* DWC_EN_ISOC */ ++#ifdef DWC_UTE_PER_IO ++ } else if (dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, xfercompl); ++ if (!ep->stopped) ++ complete_xiso_ep(ep); ++#endif /* DWC_UTE_PER_IO */ ++ } else { ++ /* Clear the bit in DOEPINTn for this interrupt */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, ++ xfercompl); ++ ++ if (core_if->core_params->dev_out_nak) { ++ DWC_TIMER_CANCEL(pcd->core_if->ep_xfer_timer[epnum]); ++ pcd->core_if->ep_xfer_info[epnum].state = 0; ++#ifdef DEBUG ++ print_memory_payload(pcd, dwc_ep); ++#endif ++ } ++ complete_ep(ep); ++ } ++ ++ } ++ ++ /* Endpoint disable */ ++ if (doepint.b.epdisabled) { ++ ++ /* Clear the bit in DOEPINTn for this interrupt */ ++ CLEAR_OUT_EP_INTR(core_if, epnum, epdisabled); ++ if (core_if->core_params->dev_out_nak) { ++#ifdef DEBUG ++ print_memory_payload(pcd, dwc_ep); ++#endif ++ /* In case of timeout condition */ ++ if (core_if->ep_xfer_info[epnum].state == 2) { ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->dctl); ++ dctl.b.cgoutnak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, ++ dctl.d32); ++ /* Unmask goutnakeff interrupt which was masked ++ * during handle nak out interrupt */ ++ gintmsk.b.goutnakeff = 1; ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, ++ 0, gintmsk.d32); ++ ++ complete_ep(ep); ++ } ++ } ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) ++ { ++ dctl_data_t dctl; ++ gintmsk_data_t intr_mask = {.d32 = 0}; ++ dwc_otg_pcd_request_t *req = 0; ++ ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ dev_global_regs->dctl); ++ dctl.b.cgoutnak = 1; ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, ++ dctl.d32); ++ ++ intr_mask.d32 = 0; ++ intr_mask.b.incomplisoout = 1; ++ ++ /* Get any pending requests */ ++ if (!DWC_CIRCLEQ_EMPTY(&ep->queue)) { ++ req = DWC_CIRCLEQ_FIRST(&ep->queue); ++ if (!req) { ++ DWC_PRINTF("complete_ep 0x%p, req = NULL!\n", ep); ++ } else { ++ dwc_otg_request_done(ep, req, 0); ++ start_next_request(ep); ++ } ++ } else { ++ DWC_PRINTF("complete_ep 0x%p, ep->queue empty!\n", ep); ++ } ++ } ++ } ++ /* AHB Error */ ++ if (doepint.b.ahberr) { ++ DWC_ERROR("EP%d OUT AHB Error\n", epnum); ++ DWC_ERROR("EP%d DEPDMA=0x%08x \n", ++ epnum, core_if->dev_if->out_ep_regs[epnum]->doepdma); ++ CLEAR_OUT_EP_INTR(core_if, epnum, ahberr); ++ } ++ /* Setup Phase Done (contorl EPs) */ ++ if (doepint.b.setup) { ++#ifdef DEBUG_EP0 ++ DWC_DEBUGPL(DBG_PCD, "EP%d SETUP Done\n", epnum); ++#endif ++ CLEAR_OUT_EP_INTR(core_if, epnum, setup); ++ ++ handle_ep0(pcd); ++ } ++ ++ /** OUT EP BNA Intr */ ++ if (doepint.b.bna) { ++ CLEAR_OUT_EP_INTR(core_if, epnum, bna); ++ if (core_if->dma_desc_enable) { ++#ifdef DWC_EN_ISOC ++ if (dwc_ep->type == ++ DWC_OTG_EP_TYPE_ISOC) { ++ /* ++ * This checking is performed to prevent first "false" BNA ++ * handling occuring right after reconnect ++ */ ++ if (dwc_ep->next_frame != ++ 0xffffffff) ++ dwc_otg_pcd_handle_iso_bna(ep); ++ } else ++#endif /* DWC_EN_ISOC */ ++ { ++ dwc_otg_pcd_handle_noniso_bna(ep); ++ } ++ } ++ } ++ /* Babble Interrupt */ ++ if (doepint.b.babble) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d OUT Babble\n", ++ epnum); ++ handle_out_ep_babble_intr(pcd, epnum); ++ ++ CLEAR_OUT_EP_INTR(core_if, epnum, babble); ++ } ++ if (doepint.b.outtknepdis) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d OUT Token received when EP is \ ++ disabled\n",epnum); ++ if (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ doepmsk_data_t doepmsk = {.d32 = 0}; ++ ep->dwc_ep.frame_num = core_if->frame_num; ++ if (ep->dwc_ep.bInterval > 1) { ++ depctl_data_t depctl; ++ depctl.d32 = DWC_READ_REG32(&core_if->dev_if-> ++ out_ep_regs[epnum]->doepctl); ++ if (ep->dwc_ep.frame_num & 0x1) { ++ depctl.b.setd1pid = 1; ++ depctl.b.setd0pid = 0; ++ } else { ++ depctl.b.setd0pid = 1; ++ depctl.b.setd1pid = 0; ++ } ++ DWC_WRITE_REG32(&core_if->dev_if-> ++ out_ep_regs[epnum]->doepctl, depctl.d32); ++ } ++ start_next_request(ep); ++ doepmsk.b.outtknepdis = 1; ++ DWC_MODIFY_REG32(&core_if->dev_if->dev_global_regs->doepmsk, ++ doepmsk.d32, 0); ++ } ++ CLEAR_OUT_EP_INTR(core_if, epnum, outtknepdis); ++ } ++ ++ /* NAK Interrutp */ ++ if (doepint.b.nak) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d OUT NAK\n", epnum); ++ handle_out_ep_nak_intr(pcd, epnum); ++ ++ CLEAR_OUT_EP_INTR(core_if, epnum, nak); ++ } ++ /* NYET Interrutp */ ++ if (doepint.b.nyet) { ++ DWC_DEBUGPL(DBG_ANY, "EP%d OUT NYET\n", epnum); ++ handle_out_ep_nyet_intr(pcd, epnum); ++ ++ CLEAR_OUT_EP_INTR(core_if, epnum, nyet); ++ } ++ } ++ ++ epnum++; ++ ep_intr >>= 1; ++ } ++ ++ return 1; ++ ++#undef CLEAR_OUT_EP_INTR ++} ++static int drop_transfer(uint32_t trgt_fr, uint32_t curr_fr, uint8_t frm_overrun) ++{ ++ int retval = 0; ++ if(!frm_overrun && curr_fr >= trgt_fr) ++ retval = 1; ++ else if (frm_overrun ++ && (curr_fr >= trgt_fr && ((curr_fr - trgt_fr) < 0x3FFF / 2))) ++ retval = 1; ++ return retval; ++} ++/** ++ * Incomplete ISO IN Transfer Interrupt. ++ * This interrupt indicates one of the following conditions occurred ++ * while transmitting an ISOC transaction. ++ * - Corrupted IN Token for ISOC EP. ++ * - Packet not complete in FIFO. ++ * The follow actions will be taken: ++ * -# Determine the EP ++ * -# Set incomplete flag in dwc_ep structure ++ * -# Disable EP; when "Endpoint Disabled" interrupt is received ++ * Flush FIFO ++ */ ++int32_t dwc_otg_pcd_handle_incomplete_isoc_in_intr(dwc_otg_pcd_t * pcd) ++{ ++ gintsts_data_t gintsts; ++ ++#ifdef DWC_EN_ISOC ++ dwc_otg_dev_if_t *dev_if; ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dsts_data_t dsts = {.d32 = 0 }; ++ dwc_ep_t *dwc_ep; ++ int i; ++ ++ dev_if = GET_CORE_IF(pcd)->dev_if; ++ ++ for (i = 1; i <= dev_if->num_in_eps; ++i) { ++ dwc_ep = &pcd->in_ep[i].dwc_ep; ++ if (dwc_ep->active && dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[i]->dieptsiz); ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ ++ if (depctl.b.epdis && deptsiz.d32) { ++ set_current_pkt_info(GET_CORE_IF(pcd), dwc_ep); ++ if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) { ++ dwc_ep->cur_pkt = 0; ++ dwc_ep->proc_buf_num = ++ (dwc_ep->proc_buf_num ^ 1) & 0x1; ++ ++ if (dwc_ep->proc_buf_num) { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff1; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr1; ++ } else { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff0; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr0; ++ } ++ ++ } ++ ++ dsts.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if-> ++ dev_global_regs->dsts); ++ dwc_ep->next_frame = dsts.b.soffn; ++ ++ dwc_otg_iso_ep_start_frm_transfer(GET_CORE_IF ++ (pcd), ++ dwc_ep); ++ } ++ } ++ } ++ ++#else ++ depctl_data_t depctl = {.d32 = 0 }; ++ dwc_ep_t *dwc_ep; ++ dwc_otg_dev_if_t *dev_if; ++ int i; ++ dev_if = GET_CORE_IF(pcd)->dev_if; ++ ++ DWC_DEBUGPL(DBG_PCD,"Incomplete ISO IN \n"); ++ ++ for (i = 1; i <= dev_if->num_in_eps; ++i) { ++ dwc_ep = &pcd->in_ep[i-1].dwc_ep; ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (depctl.b.epena && dwc_ep->type == DWC_OTG_EP_TYPE_ISOC) { ++ if (drop_transfer(dwc_ep->frame_num, GET_CORE_IF(pcd)->frame_num, ++ dwc_ep->frm_overrun)) ++ { ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ depctl.b.snak = 1; ++ depctl.b.epdis = 1; ++ DWC_MODIFY_REG32(&dev_if->in_ep_regs[i]->diepctl, depctl.d32, depctl.d32); ++ } ++ } ++ } ++ ++ /*intr_mask.b.incomplisoin = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); */ ++#endif //DWC_EN_ISOC ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.incomplisoin = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * Incomplete ISO OUT Transfer Interrupt. ++ * ++ * This interrupt indicates that the core has dropped an ISO OUT ++ * packet. The following conditions can be the cause: ++ * - FIFO Full, the entire packet would not fit in the FIFO. ++ * - CRC Error ++ * - Corrupted Token ++ * The follow actions will be taken: ++ * -# Determine the EP ++ * -# Set incomplete flag in dwc_ep structure ++ * -# Read any data from the FIFO ++ * -# Disable EP. When "Endpoint Disabled" interrupt is received ++ * re-enable EP. ++ */ ++int32_t dwc_otg_pcd_handle_incomplete_isoc_out_intr(dwc_otg_pcd_t * pcd) ++{ ++ ++ gintsts_data_t gintsts; ++ ++#ifdef DWC_EN_ISOC ++ dwc_otg_dev_if_t *dev_if; ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dsts_data_t dsts = {.d32 = 0 }; ++ dwc_ep_t *dwc_ep; ++ int i; ++ ++ dev_if = GET_CORE_IF(pcd)->dev_if; ++ ++ for (i = 1; i <= dev_if->num_out_eps; ++i) { ++ dwc_ep = &pcd->in_ep[i].dwc_ep; ++ if (pcd->out_ep[i].dwc_ep.active && ++ pcd->out_ep[i].dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) { ++ deptsiz.d32 = ++ DWC_READ_REG32(&dev_if->out_ep_regs[i]->doeptsiz); ++ depctl.d32 = ++ DWC_READ_REG32(&dev_if->out_ep_regs[i]->doepctl); ++ ++ if (depctl.b.epdis && deptsiz.d32) { ++ set_current_pkt_info(GET_CORE_IF(pcd), ++ &pcd->out_ep[i].dwc_ep); ++ if (dwc_ep->cur_pkt >= dwc_ep->pkt_cnt) { ++ dwc_ep->cur_pkt = 0; ++ dwc_ep->proc_buf_num = ++ (dwc_ep->proc_buf_num ^ 1) & 0x1; ++ ++ if (dwc_ep->proc_buf_num) { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff1; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr1; ++ } else { ++ dwc_ep->cur_pkt_addr = ++ dwc_ep->xfer_buff0; ++ dwc_ep->cur_pkt_dma_addr = ++ dwc_ep->dma_addr0; ++ } ++ ++ } ++ ++ dsts.d32 = ++ DWC_READ_REG32(&GET_CORE_IF(pcd)->dev_if-> ++ dev_global_regs->dsts); ++ dwc_ep->next_frame = dsts.b.soffn; ++ ++ dwc_otg_iso_ep_start_frm_transfer(GET_CORE_IF ++ (pcd), ++ dwc_ep); ++ } ++ } ++ } ++#else ++ /** @todo implement ISR */ ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ dwc_otg_core_if_t *core_if; ++ deptsiz_data_t deptsiz = {.d32 = 0 }; ++ depctl_data_t depctl = {.d32 = 0 }; ++ dctl_data_t dctl = {.d32 = 0 }; ++ dwc_ep_t *dwc_ep = NULL; ++ int i; ++ core_if = GET_CORE_IF(pcd); ++ ++ for (i = 0; i < core_if->dev_if->num_out_eps; ++i) { ++ dwc_ep = &pcd->out_ep[i].dwc_ep; ++ depctl.d32 = ++ DWC_READ_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl); ++ if (depctl.b.epena && depctl.b.dpid == (core_if->frame_num & 0x1)) { ++ core_if->dev_if->isoc_ep = dwc_ep; ++ deptsiz.d32 = ++ DWC_READ_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doeptsiz); ++ break; ++ } ++ } ++ dctl.d32 = DWC_READ_REG32(&core_if->dev_if->dev_global_regs->dctl); ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ intr_mask.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ ++ if (!intr_mask.b.goutnakeff) { ++ /* Unmask it */ ++ intr_mask.b.goutnakeff = 1; ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, intr_mask.d32); ++ } ++ if (!gintsts.b.goutnakeff) { ++ dctl.b.sgoutnak = 1; ++ } ++ DWC_WRITE_REG32(&core_if->dev_if->dev_global_regs->dctl, dctl.d32); ++ ++ depctl.d32 = DWC_READ_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl); ++ if (depctl.b.epena) { ++ depctl.b.epdis = 1; ++ depctl.b.snak = 1; ++ } ++ DWC_WRITE_REG32(&core_if->dev_if->out_ep_regs[dwc_ep->num]->doepctl, depctl.d32); ++ ++ intr_mask.d32 = 0; ++ intr_mask.b.incomplisoout = 1; ++ ++#endif /* DWC_EN_ISOC */ ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.incomplisoout = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * This function handles the Global IN NAK Effective interrupt. ++ * ++ */ ++int32_t dwc_otg_pcd_handle_in_nak_effective(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if; ++ depctl_data_t diepctl = {.d32 = 0 }; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++ int i; ++ ++ DWC_DEBUGPL(DBG_PCD, "Global IN NAK Effective\n"); ++ ++ /* Disable all active IN EPs */ ++ for (i = 0; i <= dev_if->num_in_eps; i++) { ++ diepctl.d32 = DWC_READ_REG32(&dev_if->in_ep_regs[i]->diepctl); ++ if (!(diepctl.b.eptype & 1) && diepctl.b.epena) { ++ if (core_if->start_predict > 0) ++ core_if->start_predict++; ++ diepctl.b.epdis = 1; ++ diepctl.b.snak = 1; ++ DWC_WRITE_REG32(&dev_if->in_ep_regs[i]->diepctl, diepctl.d32); ++ } ++ } ++ ++ ++ /* Disable the Global IN NAK Effective Interrupt */ ++ intr_mask.b.ginnakeff = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.ginnakeff = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * OUT NAK Effective. ++ * ++ */ ++int32_t dwc_otg_pcd_handle_out_nak_effective(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_dev_if_t *dev_if = GET_CORE_IF(pcd)->dev_if; ++ gintmsk_data_t intr_mask = {.d32 = 0 }; ++ gintsts_data_t gintsts; ++ depctl_data_t doepctl; ++ int i; ++ ++ /* Disable the Global OUT NAK Effective Interrupt */ ++ intr_mask.b.goutnakeff = 1; ++ DWC_MODIFY_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintmsk, ++ intr_mask.d32, 0); ++ ++ /* If DEV OUT NAK enabled*/ ++ if (pcd->core_if->core_params->dev_out_nak) { ++ /* Run over all out endpoints to determine the ep number on ++ * which the timeout has happened ++ */ ++ for (i = 0; i <= dev_if->num_out_eps; i++) { ++ if ( pcd->core_if->ep_xfer_info[i].state == 2 ) ++ break; ++ } ++ if (i > dev_if->num_out_eps) { ++ dctl_data_t dctl; ++ dctl.d32 = ++ DWC_READ_REG32(&dev_if->dev_global_regs->dctl); ++ dctl.b.cgoutnak = 1; ++ DWC_WRITE_REG32(&dev_if->dev_global_regs->dctl, ++ dctl.d32); ++ goto out; ++ } ++ ++ /* Disable the endpoint */ ++ doepctl.d32 = DWC_READ_REG32(&dev_if->out_ep_regs[i]->doepctl); ++ if (doepctl.b.epena) { ++ doepctl.b.epdis = 1; ++ doepctl.b.snak = 1; ++ } ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[i]->doepctl, doepctl.d32); ++ return 1; ++ } ++ /* We come here from Incomplete ISO OUT handler */ ++ if (dev_if->isoc_ep) { ++ dwc_ep_t *dwc_ep = (dwc_ep_t *)dev_if->isoc_ep; ++ uint32_t epnum = dwc_ep->num; ++ doepint_data_t doepint; ++ doepint.d32 = ++ DWC_READ_REG32(&dev_if->out_ep_regs[dwc_ep->num]->doepint); ++ dev_if->isoc_ep = NULL; ++ doepctl.d32 = ++ DWC_READ_REG32(&dev_if->out_ep_regs[epnum]->doepctl); ++ DWC_PRINTF("Before disable DOEPCTL = %08x\n", doepctl.d32); ++ if (doepctl.b.epena) { ++ doepctl.b.epdis = 1; ++ doepctl.b.snak = 1; ++ } ++ DWC_WRITE_REG32(&dev_if->out_ep_regs[epnum]->doepctl, ++ doepctl.d32); ++ return 1; ++ } else ++ DWC_PRINTF("INTERRUPT Handler not implemented for %s\n", ++ "Global OUT NAK Effective\n"); ++ ++out: ++ /* Clear interrupt */ ++ gintsts.d32 = 0; ++ gintsts.b.goutnakeff = 1; ++ DWC_WRITE_REG32(&GET_CORE_IF(pcd)->core_global_regs->gintsts, ++ gintsts.d32); ++ ++ return 1; ++} ++ ++/** ++ * PCD interrupt handler. ++ * ++ * The PCD handles the device interrupts. Many conditions can cause a ++ * device interrupt. When an interrupt occurs, the device interrupt ++ * service routine determines the cause of the interrupt and ++ * dispatches handling to the appropriate function. These interrupt ++ * handling functions are described below. ++ * ++ * All interrupt registers are processed from LSB to MSB. ++ * ++ */ ++int32_t dwc_otg_pcd_handle_intr(dwc_otg_pcd_t * pcd) ++{ ++ dwc_otg_core_if_t *core_if = GET_CORE_IF(pcd); ++#ifdef VERBOSE ++ dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; ++#endif ++ gintsts_data_t gintr_status; ++ int32_t retval = 0; ++ ++ /* Exit from ISR if core is hibernated */ ++ if (core_if->hibernation_suspend == 1) { ++ return retval; ++ } ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_ANY, "%s() gintsts=%08x gintmsk=%08x\n", ++ __func__, ++ DWC_READ_REG32(&global_regs->gintsts), ++ DWC_READ_REG32(&global_regs->gintmsk)); ++#endif ++ ++ if (dwc_otg_is_device_mode(core_if)) { ++ DWC_SPINLOCK(pcd->lock); ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, "%s() gintsts=%08x gintmsk=%08x\n", ++ __func__, ++ DWC_READ_REG32(&global_regs->gintsts), ++ DWC_READ_REG32(&global_regs->gintmsk)); ++#endif ++ ++ gintr_status.d32 = dwc_otg_read_core_intr(core_if); ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s: gintsts&gintmsk=%08x\n", ++ __func__, gintr_status.d32); ++ ++ if (gintr_status.b.sofintr) { ++ retval |= dwc_otg_pcd_handle_sof_intr(pcd); ++ } ++ if (gintr_status.b.rxstsqlvl) { ++ retval |= ++ dwc_otg_pcd_handle_rx_status_q_level_intr(pcd); ++ } ++ if (gintr_status.b.nptxfempty) { ++ retval |= dwc_otg_pcd_handle_np_tx_fifo_empty_intr(pcd); ++ } ++ if (gintr_status.b.goutnakeff) { ++ retval |= dwc_otg_pcd_handle_out_nak_effective(pcd); ++ } ++ if (gintr_status.b.i2cintr) { ++ retval |= dwc_otg_pcd_handle_i2c_intr(pcd); ++ } ++ if (gintr_status.b.erlysuspend) { ++ retval |= dwc_otg_pcd_handle_early_suspend_intr(pcd); ++ } ++ if (gintr_status.b.usbreset) { ++ retval |= dwc_otg_pcd_handle_usb_reset_intr(pcd); ++ } ++ if (gintr_status.b.enumdone) { ++ retval |= dwc_otg_pcd_handle_enum_done_intr(pcd); ++ } ++ if (gintr_status.b.isooutdrop) { ++ retval |= ++ dwc_otg_pcd_handle_isoc_out_packet_dropped_intr ++ (pcd); ++ } ++ if (gintr_status.b.eopframe) { ++ retval |= ++ dwc_otg_pcd_handle_end_periodic_frame_intr(pcd); ++ } ++ if (gintr_status.b.inepint) { ++ if (!core_if->multiproc_int_enable) { ++ retval |= dwc_otg_pcd_handle_in_ep_intr(pcd); ++ } ++ } ++ if (gintr_status.b.outepintr) { ++ if (!core_if->multiproc_int_enable) { ++ retval |= dwc_otg_pcd_handle_out_ep_intr(pcd); ++ } ++ } ++ if (gintr_status.b.epmismatch) { ++ retval |= dwc_otg_pcd_handle_ep_mismatch_intr(pcd); ++ } ++ if (gintr_status.b.fetsusp) { ++ retval |= dwc_otg_pcd_handle_ep_fetsusp_intr(pcd); ++ } ++ if (gintr_status.b.ginnakeff) { ++ retval |= dwc_otg_pcd_handle_in_nak_effective(pcd); ++ } ++ if (gintr_status.b.incomplisoin) { ++ retval |= ++ dwc_otg_pcd_handle_incomplete_isoc_in_intr(pcd); ++ } ++ if (gintr_status.b.incomplisoout) { ++ retval |= ++ dwc_otg_pcd_handle_incomplete_isoc_out_intr(pcd); ++ } ++ ++ /* In MPI mode Device Endpoints interrupts are asserted ++ * without setting outepintr and inepint bits set, so these ++ * Interrupt handlers are called without checking these bit-fields ++ */ ++ if (core_if->multiproc_int_enable) { ++ retval |= dwc_otg_pcd_handle_in_ep_intr(pcd); ++ retval |= dwc_otg_pcd_handle_out_ep_intr(pcd); ++ } ++#ifdef VERBOSE ++ DWC_DEBUGPL(DBG_PCDV, "%s() gintsts=%0x\n", __func__, ++ DWC_READ_REG32(&global_regs->gintsts)); ++#endif ++ DWC_SPINUNLOCK(pcd->lock); ++ } ++ return retval; ++} ++ ++#endif /* DWC_HOST_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_linux.c 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,1358 @@ ++ /* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_pcd_linux.c $ ++ * $Revision: #21 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++#ifndef DWC_HOST_ONLY ++ ++/** @file ++ * This file implements the Peripheral Controller Driver. ++ * ++ * The Peripheral Controller Driver (PCD) is responsible for ++ * translating requests from the Function Driver into the appropriate ++ * actions on the DWC_otg controller. It isolates the Function Driver ++ * from the specifics of the controller by providing an API to the ++ * Function Driver. ++ * ++ * The Peripheral Controller Driver for Linux will implement the ++ * Gadget API, so that the existing Gadget drivers can be used. ++ * (Gadget Driver is the Linux terminology for a Function Driver.) ++ * ++ * The Linux Gadget API is defined in the header file ++ * . The USB EP operations API is ++ * defined in the structure usb_ep_ops and the USB ++ * Controller API is defined in the structure ++ * usb_gadget_ops. ++ * ++ */ ++ ++#include "dwc_otg_os_dep.h" ++#include "dwc_otg_pcd_if.h" ++#include "dwc_otg_pcd.h" ++#include "dwc_otg_driver.h" ++#include "dwc_otg_dbg.h" ++ ++static struct gadget_wrapper { ++ dwc_otg_pcd_t *pcd; ++ ++ struct usb_gadget gadget; ++ struct usb_gadget_driver *driver; ++ ++ struct usb_ep ep0; ++ struct usb_ep in_ep[16]; ++ struct usb_ep out_ep[16]; ++ ++} *gadget_wrapper; ++ ++/* Display the contents of the buffer */ ++extern void dump_msg(const u8 * buf, unsigned int length); ++/** ++ * Get the dwc_otg_pcd_ep_t* from usb_ep* pointer - NULL in case ++ * if the endpoint is not found ++ */ ++static struct dwc_otg_pcd_ep *ep_from_handle(dwc_otg_pcd_t * pcd, void *handle) ++{ ++ int i; ++ if (pcd->ep0.priv == handle) { ++ return &pcd->ep0; ++ } ++ ++ for (i = 0; i < MAX_EPS_CHANNELS - 1; i++) { ++ if (pcd->in_ep[i].priv == handle) ++ return &pcd->in_ep[i]; ++ if (pcd->out_ep[i].priv == handle) ++ return &pcd->out_ep[i]; ++ } ++ ++ return NULL; ++} ++ ++/* USB Endpoint Operations */ ++/* ++ * The following sections briefly describe the behavior of the Gadget ++ * API endpoint operations implemented in the DWC_otg driver ++ * software. Detailed descriptions of the generic behavior of each of ++ * these functions can be found in the Linux header file ++ * include/linux/usb_gadget.h. ++ * ++ * The Gadget API provides wrapper functions for each of the function ++ * pointers defined in usb_ep_ops. The Gadget Driver calls the wrapper ++ * function, which then calls the underlying PCD function. The ++ * following sections are named according to the wrapper ++ * functions. Within each section, the corresponding DWC_otg PCD ++ * function name is specified. ++ * ++ */ ++ ++/** ++ * This function is called by the Gadget Driver for each EP to be ++ * configured for the current configuration (SET_CONFIGURATION). ++ * ++ * This function initializes the dwc_otg_ep_t data structure, and then ++ * calls dwc_otg_ep_activate. ++ */ ++static int ep_enable(struct usb_ep *usb_ep, ++ const struct usb_endpoint_descriptor *ep_desc) ++{ ++ int retval; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, usb_ep, ep_desc); ++ ++ if (!usb_ep || !ep_desc || ep_desc->bDescriptorType != USB_DT_ENDPOINT) { ++ DWC_WARN("%s, bad ep or descriptor\n", __func__); ++ return -EINVAL; ++ } ++ if (usb_ep == &gadget_wrapper->ep0) { ++ DWC_WARN("%s, bad ep(0)\n", __func__); ++ return -EINVAL; ++ } ++ ++ /* Check FIFO size? */ ++ if (!ep_desc->wMaxPacketSize) { ++ DWC_WARN("%s, bad %s maxpacket\n", __func__, usb_ep->name); ++ return -ERANGE; ++ } ++ ++ if (!gadget_wrapper->driver || ++ gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) { ++ DWC_WARN("%s, bogus device state\n", __func__); ++ return -ESHUTDOWN; ++ } ++ ++ /* Delete after check - MAS */ ++#if 0 ++ nat = (uint32_t) ep_desc->wMaxPacketSize; ++ printk(KERN_ALERT "%s: nat (before) =%d\n", __func__, nat); ++ nat = (nat >> 11) & 0x03; ++ printk(KERN_ALERT "%s: nat (after) =%d\n", __func__, nat); ++#endif ++ retval = dwc_otg_pcd_ep_enable(gadget_wrapper->pcd, ++ (const uint8_t *)ep_desc, ++ (void *)usb_ep); ++ if (retval) { ++ DWC_WARN("dwc_otg_pcd_ep_enable failed\n"); ++ return -EINVAL; ++ } ++ ++ usb_ep->maxpacket = le16_to_cpu(ep_desc->wMaxPacketSize); ++ ++ return 0; ++} ++ ++/** ++ * This function is called when an EP is disabled due to disconnect or ++ * change in configuration. Any pending requests will terminate with a ++ * status of -ESHUTDOWN. ++ * ++ * This function modifies the dwc_otg_ep_t data structure for this EP, ++ * and then calls dwc_otg_ep_deactivate. ++ */ ++static int ep_disable(struct usb_ep *usb_ep) ++{ ++ int retval; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, usb_ep); ++ if (!usb_ep) { ++ DWC_DEBUGPL(DBG_PCD, "%s, %s not enabled\n", __func__, ++ usb_ep ? usb_ep->name : NULL); ++ return -EINVAL; ++ } ++ ++ retval = dwc_otg_pcd_ep_disable(gadget_wrapper->pcd, usb_ep); ++ if (retval) { ++ retval = -EINVAL; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function allocates a request object to use with the specified ++ * endpoint. ++ * ++ * @param ep The endpoint to be used with with the request ++ * @param gfp_flags the GFP_* flags to use. ++ */ ++static struct usb_request *dwc_otg_pcd_alloc_request(struct usb_ep *ep, ++ gfp_t gfp_flags) ++{ ++ struct usb_request *usb_req; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%d)\n", __func__, ep, gfp_flags); ++ if (0 == ep) { ++ DWC_WARN("%s() %s\n", __func__, "Invalid EP!\n"); ++ return 0; ++ } ++ usb_req = kmalloc(sizeof(*usb_req), gfp_flags); ++ if (0 == usb_req) { ++ DWC_WARN("%s() %s\n", __func__, "request allocation failed!\n"); ++ return 0; ++ } ++ memset(usb_req, 0, sizeof(*usb_req)); ++ usb_req->dma = DWC_DMA_ADDR_INVALID; ++ ++ return usb_req; ++} ++ ++/** ++ * This function frees a request object. ++ * ++ * @param ep The endpoint associated with the request ++ * @param req The request being freed ++ */ ++static void dwc_otg_pcd_free_request(struct usb_ep *ep, struct usb_request *req) ++{ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, ep, req); ++ ++ if (0 == ep || 0 == req) { ++ DWC_WARN("%s() %s\n", __func__, ++ "Invalid ep or req argument!\n"); ++ return; ++ } ++ ++ kfree(req); ++} ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++/** ++ * This function allocates an I/O buffer to be used for a transfer ++ * to/from the specified endpoint. ++ * ++ * @param usb_ep The endpoint to be used with with the request ++ * @param bytes The desired number of bytes for the buffer ++ * @param dma Pointer to the buffer's DMA address; must be valid ++ * @param gfp_flags the GFP_* flags to use. ++ * @return address of a new buffer or null is buffer could not be allocated. ++ */ ++static void *dwc_otg_pcd_alloc_buffer(struct usb_ep *usb_ep, unsigned bytes, ++ dma_addr_t * dma, gfp_t gfp_flags) ++{ ++ void *buf; ++ dwc_otg_pcd_t *pcd = 0; ++ ++ pcd = gadget_wrapper->pcd; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%d,%p,%0x)\n", __func__, usb_ep, bytes, ++ dma, gfp_flags); ++ ++ /* Check dword alignment */ ++ if ((bytes & 0x3UL) != 0) { ++ DWC_WARN("%s() Buffer size is not a multiple of" ++ "DWORD size (%d)", __func__, bytes); ++ } ++ ++ buf = dma_alloc_coherent(NULL, bytes, dma, gfp_flags); ++ ++ /* Check dword alignment */ ++ if (((int)buf & 0x3UL) != 0) { ++ DWC_WARN("%s() Buffer is not DWORD aligned (%p)", ++ __func__, buf); ++ } ++ ++ return buf; ++} ++ ++/** ++ * This function frees an I/O buffer that was allocated by alloc_buffer. ++ * ++ * @param usb_ep the endpoint associated with the buffer ++ * @param buf address of the buffer ++ * @param dma The buffer's DMA address ++ * @param bytes The number of bytes of the buffer ++ */ ++static void dwc_otg_pcd_free_buffer(struct usb_ep *usb_ep, void *buf, ++ dma_addr_t dma, unsigned bytes) ++{ ++ dwc_otg_pcd_t *pcd = 0; ++ ++ pcd = gadget_wrapper->pcd; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%0x,%d)\n", __func__, buf, dma, bytes); ++ ++ dma_free_coherent(NULL, bytes, buf, dma); ++} ++#endif ++ ++/** ++ * This function is used to submit an I/O Request to an EP. ++ * ++ * - When the request completes the request's completion callback ++ * is called to return the request to the driver. ++ * - An EP, except control EPs, may have multiple requests ++ * pending. ++ * - Once submitted the request cannot be examined or modified. ++ * - Each request is turned into one or more packets. ++ * - A BULK EP can queue any amount of data; the transfer is ++ * packetized. ++ * - Zero length Packets are specified with the request 'zero' ++ * flag. ++ */ ++static int ep_queue(struct usb_ep *usb_ep, struct usb_request *usb_req, ++ gfp_t gfp_flags) ++{ ++ dwc_otg_pcd_t *pcd; ++ struct dwc_otg_pcd_ep *ep = NULL; ++ int retval = 0, is_isoc_ep = 0; ++ dma_addr_t dma_addr = DWC_DMA_ADDR_INVALID; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p,%d)\n", ++ __func__, usb_ep, usb_req, gfp_flags); ++ ++ if (!usb_req || !usb_req->complete || !usb_req->buf) { ++ DWC_WARN("bad params\n"); ++ return -EINVAL; ++ } ++ ++ if (!usb_ep) { ++ DWC_WARN("bad ep\n"); ++ return -EINVAL; ++ } ++ ++ pcd = gadget_wrapper->pcd; ++ if (!gadget_wrapper->driver || ++ gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) { ++ DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", ++ gadget_wrapper->gadget.speed); ++ DWC_WARN("bogus device state\n"); ++ return -ESHUTDOWN; ++ } ++ ++ DWC_DEBUGPL(DBG_PCD, "%s queue req %p, len %d buf %p\n", ++ usb_ep->name, usb_req, usb_req->length, usb_req->buf); ++ ++ usb_req->status = -EINPROGRESS; ++ usb_req->actual = 0; ++ ++ ep = ep_from_handle(pcd, usb_ep); ++ if (ep == NULL) ++ is_isoc_ep = 0; ++ else ++ is_isoc_ep = (ep->dwc_ep.type == DWC_OTG_EP_TYPE_ISOC) ? 1 : 0; ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ dma_addr = usb_req->dma; ++#else ++ if (GET_CORE_IF(pcd)->dma_enable) { ++ dwc_otg_device_t *otg_dev = gadget_wrapper->pcd->otg_dev; ++ struct device *dev = NULL; ++ ++ if (otg_dev != NULL) ++ dev = DWC_OTG_OS_GETDEV(otg_dev->os_dep); ++ ++ if (usb_req->length != 0 && ++ usb_req->dma == DWC_DMA_ADDR_INVALID) { ++ dma_addr = dma_map_single(dev, usb_req->buf, ++ usb_req->length, ++ ep->dwc_ep.is_in ? ++ DMA_TO_DEVICE: ++ DMA_FROM_DEVICE); ++ } ++ } ++#endif ++ ++#ifdef DWC_UTE_PER_IO ++ if (is_isoc_ep == 1) { ++ retval = dwc_otg_pcd_xiso_ep_queue(pcd, usb_ep, usb_req->buf, dma_addr, ++ usb_req->length, usb_req->zero, usb_req, ++ gfp_flags == GFP_ATOMIC ? 1 : 0, &usb_req->ext_req); ++ if (retval) ++ return -EINVAL; ++ ++ return 0; ++ } ++#endif ++ retval = dwc_otg_pcd_ep_queue(pcd, usb_ep, usb_req->buf, dma_addr, ++ usb_req->length, usb_req->zero, usb_req, ++ gfp_flags == GFP_ATOMIC ? 1 : 0); ++ if (retval) { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/** ++ * This function cancels an I/O request from an EP. ++ */ ++static int ep_dequeue(struct usb_ep *usb_ep, struct usb_request *usb_req) ++{ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p,%p)\n", __func__, usb_ep, usb_req); ++ ++ if (!usb_ep || !usb_req) { ++ DWC_WARN("bad argument\n"); ++ return -EINVAL; ++ } ++ if (!gadget_wrapper->driver || ++ gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) { ++ DWC_WARN("bogus device state\n"); ++ return -ESHUTDOWN; ++ } ++ if (dwc_otg_pcd_ep_dequeue(gadget_wrapper->pcd, usb_ep, usb_req)) { ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++/** ++ * usb_ep_set_halt stalls an endpoint. ++ * ++ * usb_ep_clear_halt clears an endpoint halt and resets its data ++ * toggle. ++ * ++ * Both of these functions are implemented with the same underlying ++ * function. The behavior depends on the value argument. ++ * ++ * @param[in] usb_ep the Endpoint to halt or clear halt. ++ * @param[in] value ++ * - 0 means clear_halt. ++ * - 1 means set_halt, ++ * - 2 means clear stall lock flag. ++ * - 3 means set stall lock flag. ++ */ ++static int ep_halt(struct usb_ep *usb_ep, int value) ++{ ++ int retval = 0; ++ ++ DWC_DEBUGPL(DBG_PCD, "HALT %s %d\n", usb_ep->name, value); ++ ++ if (!usb_ep) { ++ DWC_WARN("bad ep\n"); ++ return -EINVAL; ++ } ++ ++ retval = dwc_otg_pcd_ep_halt(gadget_wrapper->pcd, usb_ep, value); ++ if (retval == -DWC_E_AGAIN) { ++ return -EAGAIN; ++ } else if (retval) { ++ retval = -EINVAL; ++ } ++ ++ return retval; ++} ++ ++//#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)) ++#if 0 ++/** ++ * ep_wedge: sets the halt feature and ignores clear requests ++ * ++ * @usb_ep: the endpoint being wedged ++ * ++ * Use this to stall an endpoint and ignore CLEAR_FEATURE(HALT_ENDPOINT) ++ * requests. If the gadget driver clears the halt status, it will ++ * automatically unwedge the endpoint. ++ * ++ * Returns zero on success, else negative errno. * ++ * Check usb_ep_set_wedge() at "usb_gadget.h" for details ++ */ ++static int ep_wedge(struct usb_ep *usb_ep) ++{ ++ int retval = 0; ++ ++ DWC_DEBUGPL(DBG_PCD, "WEDGE %s\n", usb_ep->name); ++ ++ if (!usb_ep) { ++ DWC_WARN("bad ep\n"); ++ return -EINVAL; ++ } ++ ++ retval = dwc_otg_pcd_ep_wedge(gadget_wrapper->pcd, usb_ep); ++ if (retval == -DWC_E_AGAIN) { ++ retval = -EAGAIN; ++ } else if (retval) { ++ retval = -EINVAL; ++ } ++ ++ return retval; ++} ++#endif ++ ++#ifdef DWC_EN_ISOC ++/** ++ * This function is used to submit an ISOC Transfer Request to an EP. ++ * ++ * - Every time a sync period completes the request's completion callback ++ * is called to provide data to the gadget driver. ++ * - Once submitted the request cannot be modified. ++ * - Each request is turned into periodic data packets untill ISO ++ * Transfer is stopped.. ++ */ ++static int iso_ep_start(struct usb_ep *usb_ep, struct usb_iso_request *req, ++ gfp_t gfp_flags) ++{ ++ int retval = 0; ++ ++ if (!req || !req->process_buffer || !req->buf0 || !req->buf1) { ++ DWC_WARN("bad params\n"); ++ return -EINVAL; ++ } ++ ++ if (!usb_ep) { ++ DWC_PRINTF("bad params\n"); ++ return -EINVAL; ++ } ++ ++ req->status = -EINPROGRESS; ++ ++ retval = ++ dwc_otg_pcd_iso_ep_start(gadget_wrapper->pcd, usb_ep, req->buf0, ++ req->buf1, req->dma0, req->dma1, ++ req->sync_frame, req->data_pattern_frame, ++ req->data_per_frame, ++ req-> ++ flags & USB_REQ_ISO_ASAP ? -1 : ++ req->start_frame, req->buf_proc_intrvl, ++ req, gfp_flags == GFP_ATOMIC ? 1 : 0); ++ ++ if (retval) { ++ return -EINVAL; ++ } ++ ++ return retval; ++} ++ ++/** ++ * This function stops ISO EP Periodic Data Transfer. ++ */ ++static int iso_ep_stop(struct usb_ep *usb_ep, struct usb_iso_request *req) ++{ ++ int retval = 0; ++ if (!usb_ep) { ++ DWC_WARN("bad ep\n"); ++ } ++ ++ if (!gadget_wrapper->driver || ++ gadget_wrapper->gadget.speed == USB_SPEED_UNKNOWN) { ++ DWC_DEBUGPL(DBG_PCDV, "gadget.speed=%d\n", ++ gadget_wrapper->gadget.speed); ++ DWC_WARN("bogus device state\n"); ++ } ++ ++ dwc_otg_pcd_iso_ep_stop(gadget_wrapper->pcd, usb_ep, req); ++ if (retval) { ++ retval = -EINVAL; ++ } ++ ++ return retval; ++} ++ ++static struct usb_iso_request *alloc_iso_request(struct usb_ep *ep, ++ int packets, gfp_t gfp_flags) ++{ ++ struct usb_iso_request *pReq = NULL; ++ uint32_t req_size; ++ ++ req_size = sizeof(struct usb_iso_request); ++ req_size += ++ (2 * packets * (sizeof(struct usb_gadget_iso_packet_descriptor))); ++ ++ pReq = kmalloc(req_size, gfp_flags); ++ if (!pReq) { ++ DWC_WARN("Can't allocate Iso Request\n"); ++ return 0; ++ } ++ pReq->iso_packet_desc0 = (void *)(pReq + 1); ++ ++ pReq->iso_packet_desc1 = pReq->iso_packet_desc0 + packets; ++ ++ return pReq; ++} ++ ++static void free_iso_request(struct usb_ep *ep, struct usb_iso_request *req) ++{ ++ kfree(req); ++} ++ ++static struct usb_isoc_ep_ops dwc_otg_pcd_ep_ops = { ++ .ep_ops = { ++ .enable = ep_enable, ++ .disable = ep_disable, ++ ++ .alloc_request = dwc_otg_pcd_alloc_request, ++ .free_request = dwc_otg_pcd_free_request, ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ .alloc_buffer = dwc_otg_pcd_alloc_buffer, ++ .free_buffer = dwc_otg_pcd_free_buffer, ++#endif ++ ++ .queue = ep_queue, ++ .dequeue = ep_dequeue, ++ ++ .set_halt = ep_halt, ++ .fifo_status = 0, ++ .fifo_flush = 0, ++ }, ++ .iso_ep_start = iso_ep_start, ++ .iso_ep_stop = iso_ep_stop, ++ .alloc_iso_request = alloc_iso_request, ++ .free_iso_request = free_iso_request, ++}; ++ ++#else ++ ++ int (*enable) (struct usb_ep *ep, ++ const struct usb_endpoint_descriptor *desc); ++ int (*disable) (struct usb_ep *ep); ++ ++ struct usb_request *(*alloc_request) (struct usb_ep *ep, ++ gfp_t gfp_flags); ++ void (*free_request) (struct usb_ep *ep, struct usb_request *req); ++ ++ int (*queue) (struct usb_ep *ep, struct usb_request *req, ++ gfp_t gfp_flags); ++ int (*dequeue) (struct usb_ep *ep, struct usb_request *req); ++ ++ int (*set_halt) (struct usb_ep *ep, int value); ++ int (*set_wedge) (struct usb_ep *ep); ++ ++ int (*fifo_status) (struct usb_ep *ep); ++ void (*fifo_flush) (struct usb_ep *ep); ++static struct usb_ep_ops dwc_otg_pcd_ep_ops = { ++ .enable = ep_enable, ++ .disable = ep_disable, ++ ++ .alloc_request = dwc_otg_pcd_alloc_request, ++ .free_request = dwc_otg_pcd_free_request, ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) ++ .alloc_buffer = dwc_otg_pcd_alloc_buffer, ++ .free_buffer = dwc_otg_pcd_free_buffer, ++#else ++ /* .set_wedge = ep_wedge, */ ++ .set_wedge = NULL, /* uses set_halt instead */ ++#endif ++ ++ .queue = ep_queue, ++ .dequeue = ep_dequeue, ++ ++ .set_halt = ep_halt, ++ .fifo_status = 0, ++ .fifo_flush = 0, ++ ++}; ++ ++#endif /* _EN_ISOC_ */ ++/* Gadget Operations */ ++/** ++ * The following gadget operations will be implemented in the DWC_otg ++ * PCD. Functions in the API that are not described below are not ++ * implemented. ++ * ++ * The Gadget API provides wrapper functions for each of the function ++ * pointers defined in usb_gadget_ops. The Gadget Driver calls the ++ * wrapper function, which then calls the underlying PCD function. The ++ * following sections are named according to the wrapper functions ++ * (except for ioctl, which doesn't have a wrapper function). Within ++ * each section, the corresponding DWC_otg PCD function name is ++ * specified. ++ * ++ */ ++ ++/** ++ *Gets the USB Frame number of the last SOF. ++ */ ++static int get_frame_number(struct usb_gadget *gadget) ++{ ++ struct gadget_wrapper *d; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, gadget); ++ ++ if (gadget == 0) { ++ return -ENODEV; ++ } ++ ++ d = container_of(gadget, struct gadget_wrapper, gadget); ++ return dwc_otg_pcd_get_frame_number(d->pcd); ++} ++ ++#ifdef CONFIG_USB_DWC_OTG_LPM ++static int test_lpm_enabled(struct usb_gadget *gadget) ++{ ++ struct gadget_wrapper *d; ++ ++ d = container_of(gadget, struct gadget_wrapper, gadget); ++ ++ return dwc_otg_pcd_is_lpm_enabled(d->pcd); ++} ++#endif ++ ++/** ++ * Initiates Session Request Protocol (SRP) to wakeup the host if no ++ * session is in progress. If a session is already in progress, but ++ * the device is suspended, remote wakeup signaling is started. ++ * ++ */ ++static int wakeup(struct usb_gadget *gadget) ++{ ++ struct gadget_wrapper *d; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, gadget); ++ ++ if (gadget == 0) { ++ return -ENODEV; ++ } else { ++ d = container_of(gadget, struct gadget_wrapper, gadget); ++ } ++ dwc_otg_pcd_wakeup(d->pcd); ++ return 0; ++} ++ ++static const struct usb_gadget_ops dwc_otg_pcd_ops = { ++ .get_frame = get_frame_number, ++ .wakeup = wakeup, ++#ifdef CONFIG_USB_DWC_OTG_LPM ++ .lpm_support = test_lpm_enabled, ++#endif ++ // current versions must always be self-powered ++}; ++ ++static int _setup(dwc_otg_pcd_t * pcd, uint8_t * bytes) ++{ ++ int retval = -DWC_E_NOT_SUPPORTED; ++ if (gadget_wrapper->driver && gadget_wrapper->driver->setup) { ++ retval = gadget_wrapper->driver->setup(&gadget_wrapper->gadget, ++ (struct usb_ctrlrequest ++ *)bytes); ++ } ++ ++ if (retval == -ENOTSUPP) { ++ retval = -DWC_E_NOT_SUPPORTED; ++ } else if (retval < 0) { ++ retval = -DWC_E_INVALID; ++ } ++ ++ return retval; ++} ++ ++#ifdef DWC_EN_ISOC ++static int _isoc_complete(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int proc_buf_num) ++{ ++ int i, packet_count; ++ struct usb_gadget_iso_packet_descriptor *iso_packet = 0; ++ struct usb_iso_request *iso_req = req_handle; ++ ++ if (proc_buf_num) { ++ iso_packet = iso_req->iso_packet_desc1; ++ } else { ++ iso_packet = iso_req->iso_packet_desc0; ++ } ++ packet_count = ++ dwc_otg_pcd_get_iso_packet_count(pcd, ep_handle, req_handle); ++ for (i = 0; i < packet_count; ++i) { ++ int status; ++ int actual; ++ int offset; ++ dwc_otg_pcd_get_iso_packet_params(pcd, ep_handle, req_handle, ++ i, &status, &actual, &offset); ++ switch (status) { ++ case -DWC_E_NO_DATA: ++ status = -ENODATA; ++ break; ++ default: ++ if (status) { ++ DWC_PRINTF("unknown status in isoc packet\n"); ++ } ++ ++ } ++ iso_packet[i].status = status; ++ iso_packet[i].offset = offset; ++ iso_packet[i].actual_length = actual; ++ } ++ ++ iso_req->status = 0; ++ iso_req->process_buffer(ep_handle, iso_req); ++ ++ return 0; ++} ++#endif /* DWC_EN_ISOC */ ++ ++#ifdef DWC_UTE_PER_IO ++/** ++ * Copy the contents of the extended request to the Linux usb_request's ++ * extended part and call the gadget's completion. ++ * ++ * @param pcd Pointer to the pcd structure ++ * @param ep_handle Void pointer to the usb_ep structure ++ * @param req_handle Void pointer to the usb_request structure ++ * @param status Request status returned from the portable logic ++ * @param ereq_port Void pointer to the extended request structure ++ * created in the the portable part that contains the ++ * results of the processed iso packets. ++ */ ++static int _xisoc_complete(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int32_t status, void *ereq_port) ++{ ++ struct dwc_ute_iso_req_ext *ereqorg = NULL; ++ struct dwc_iso_xreq_port *ereqport = NULL; ++ struct dwc_ute_iso_packet_descriptor *desc_org = NULL; ++ int i; ++ struct usb_request *req; ++ //struct dwc_ute_iso_packet_descriptor * ++ //int status = 0; ++ ++ req = (struct usb_request *)req_handle; ++ ereqorg = &req->ext_req; ++ ereqport = (struct dwc_iso_xreq_port *)ereq_port; ++ desc_org = ereqorg->per_io_frame_descs; ++ ++ if (req && req->complete) { ++ /* Copy the request data from the portable logic to our request */ ++ for (i = 0; i < ereqport->pio_pkt_count; i++) { ++ desc_org[i].actual_length = ++ ereqport->per_io_frame_descs[i].actual_length; ++ desc_org[i].status = ++ ereqport->per_io_frame_descs[i].status; ++ } ++ ++ switch (status) { ++ case -DWC_E_SHUTDOWN: ++ req->status = -ESHUTDOWN; ++ break; ++ case -DWC_E_RESTART: ++ req->status = -ECONNRESET; ++ break; ++ case -DWC_E_INVALID: ++ req->status = -EINVAL; ++ break; ++ case -DWC_E_TIMEOUT: ++ req->status = -ETIMEDOUT; ++ break; ++ default: ++ req->status = status; ++ } ++ ++ /* And call the gadget's completion */ ++ req->complete(ep_handle, req); ++ } ++ ++ return 0; ++} ++#endif /* DWC_UTE_PER_IO */ ++ ++static int _complete(dwc_otg_pcd_t * pcd, void *ep_handle, ++ void *req_handle, int32_t status, uint32_t actual) ++{ ++ struct usb_request *req = (struct usb_request *)req_handle; ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27) ++ struct dwc_otg_pcd_ep *ep = NULL; ++#endif ++ ++ if (req && req->complete) { ++ switch (status) { ++ case -DWC_E_SHUTDOWN: ++ req->status = -ESHUTDOWN; ++ break; ++ case -DWC_E_RESTART: ++ req->status = -ECONNRESET; ++ break; ++ case -DWC_E_INVALID: ++ req->status = -EINVAL; ++ break; ++ case -DWC_E_TIMEOUT: ++ req->status = -ETIMEDOUT; ++ break; ++ default: ++ req->status = status; ++ ++ } ++ ++ req->actual = actual; ++ DWC_SPINUNLOCK(pcd->lock); ++ req->complete(ep_handle, req); ++ DWC_SPINLOCK(pcd->lock); ++ } ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,27) ++ ep = ep_from_handle(pcd, ep_handle); ++ if (GET_CORE_IF(pcd)->dma_enable) { ++ if (req->length != 0) { ++ dwc_otg_device_t *otg_dev = gadget_wrapper->pcd->otg_dev; ++ struct device *dev = NULL; ++ ++ if (otg_dev != NULL) ++ dev = DWC_OTG_OS_GETDEV(otg_dev->os_dep); ++ ++ dma_unmap_single(dev, req->dma, req->length, ++ ep->dwc_ep.is_in ? ++ DMA_TO_DEVICE: DMA_FROM_DEVICE); ++ } ++ } ++#endif ++ ++ return 0; ++} ++ ++static int _connect(dwc_otg_pcd_t * pcd, int speed) ++{ ++ gadget_wrapper->gadget.speed = speed; ++ return 0; ++} ++ ++static int _disconnect(dwc_otg_pcd_t * pcd) ++{ ++ if (gadget_wrapper->driver && gadget_wrapper->driver->disconnect) { ++ gadget_wrapper->driver->disconnect(&gadget_wrapper->gadget); ++ } ++ return 0; ++} ++ ++static int _resume(dwc_otg_pcd_t * pcd) ++{ ++ if (gadget_wrapper->driver && gadget_wrapper->driver->resume) { ++ gadget_wrapper->driver->resume(&gadget_wrapper->gadget); ++ } ++ ++ return 0; ++} ++ ++static int _suspend(dwc_otg_pcd_t * pcd) ++{ ++ if (gadget_wrapper->driver && gadget_wrapper->driver->suspend) { ++ gadget_wrapper->driver->suspend(&gadget_wrapper->gadget); ++ } ++ return 0; ++} ++ ++/** ++ * This function updates the otg values in the gadget structure. ++ */ ++static int _hnp_changed(dwc_otg_pcd_t * pcd) ++{ ++ ++ if (!gadget_wrapper->gadget.is_otg) ++ return 0; ++ ++ gadget_wrapper->gadget.b_hnp_enable = get_b_hnp_enable(pcd); ++ gadget_wrapper->gadget.a_hnp_support = get_a_hnp_support(pcd); ++ gadget_wrapper->gadget.a_alt_hnp_support = get_a_alt_hnp_support(pcd); ++ return 0; ++} ++ ++static int _reset(dwc_otg_pcd_t * pcd) ++{ ++ return 0; ++} ++ ++#ifdef DWC_UTE_CFI ++static int _cfi_setup(dwc_otg_pcd_t * pcd, void *cfi_req) ++{ ++ int retval = -DWC_E_INVALID; ++ if (gadget_wrapper->driver->cfi_feature_setup) { ++ retval = ++ gadget_wrapper->driver-> ++ cfi_feature_setup(&gadget_wrapper->gadget, ++ (struct cfi_usb_ctrlrequest *)cfi_req); ++ } ++ ++ return retval; ++} ++#endif ++ ++static const struct dwc_otg_pcd_function_ops fops = { ++ .complete = _complete, ++#ifdef DWC_EN_ISOC ++ .isoc_complete = _isoc_complete, ++#endif ++ .setup = _setup, ++ .disconnect = _disconnect, ++ .connect = _connect, ++ .resume = _resume, ++ .suspend = _suspend, ++ .hnp_changed = _hnp_changed, ++ .reset = _reset, ++#ifdef DWC_UTE_CFI ++ .cfi_setup = _cfi_setup, ++#endif ++#ifdef DWC_UTE_PER_IO ++ .xisoc_complete = _xisoc_complete, ++#endif ++}; ++ ++/** ++ * This function is the top level PCD interrupt handler. ++ */ ++static irqreturn_t dwc_otg_pcd_irq(int irq, void *dev) ++{ ++ dwc_otg_pcd_t *pcd = dev; ++ int32_t retval = IRQ_NONE; ++ ++ retval = dwc_otg_pcd_handle_intr(pcd); ++ if (retval != 0) { ++ S3C2410X_CLEAR_EINTPEND(); ++ } ++ return IRQ_RETVAL(retval); ++} ++ ++/** ++ * This function initialized the usb_ep structures to there default ++ * state. ++ * ++ * @param d Pointer on gadget_wrapper. ++ */ ++void gadget_add_eps(struct gadget_wrapper *d) ++{ ++ static const char *names[] = { ++ ++ "ep0", ++ "ep1in", ++ "ep2in", ++ "ep3in", ++ "ep4in", ++ "ep5in", ++ "ep6in", ++ "ep7in", ++ "ep8in", ++ "ep9in", ++ "ep10in", ++ "ep11in", ++ "ep12in", ++ "ep13in", ++ "ep14in", ++ "ep15in", ++ "ep1out", ++ "ep2out", ++ "ep3out", ++ "ep4out", ++ "ep5out", ++ "ep6out", ++ "ep7out", ++ "ep8out", ++ "ep9out", ++ "ep10out", ++ "ep11out", ++ "ep12out", ++ "ep13out", ++ "ep14out", ++ "ep15out" ++ }; ++ ++ int i; ++ struct usb_ep *ep; ++ int8_t dev_endpoints; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s\n", __func__); ++ ++ INIT_LIST_HEAD(&d->gadget.ep_list); ++ d->gadget.ep0 = &d->ep0; ++ d->gadget.speed = USB_SPEED_UNKNOWN; ++ ++ INIT_LIST_HEAD(&d->gadget.ep0->ep_list); ++ ++ /** ++ * Initialize the EP0 structure. ++ */ ++ ep = &d->ep0; ++ ++ /* Init the usb_ep structure. */ ++ ep->name = names[0]; ++ ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops; ++ ++ /** ++ * @todo NGS: What should the max packet size be set to ++ * here? Before EP type is set? ++ */ ++ ep->maxpacket = MAX_PACKET_SIZE; ++ dwc_otg_pcd_ep_enable(d->pcd, NULL, ep); ++ ++ list_add_tail(&ep->ep_list, &d->gadget.ep_list); ++ ++ /** ++ * Initialize the EP structures. ++ */ ++ dev_endpoints = d->pcd->core_if->dev_if->num_in_eps; ++ ++ for (i = 0; i < dev_endpoints; i++) { ++ ep = &d->in_ep[i]; ++ ++ /* Init the usb_ep structure. */ ++ ep->name = names[d->pcd->in_ep[i].dwc_ep.num]; ++ ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops; ++ ++ /** ++ * @todo NGS: What should the max packet size be set to ++ * here? Before EP type is set? ++ */ ++ ep->maxpacket = MAX_PACKET_SIZE; ++ list_add_tail(&ep->ep_list, &d->gadget.ep_list); ++ } ++ ++ dev_endpoints = d->pcd->core_if->dev_if->num_out_eps; ++ ++ for (i = 0; i < dev_endpoints; i++) { ++ ep = &d->out_ep[i]; ++ ++ /* Init the usb_ep structure. */ ++ ep->name = names[15 + d->pcd->out_ep[i].dwc_ep.num]; ++ ep->ops = (struct usb_ep_ops *)&dwc_otg_pcd_ep_ops; ++ ++ /** ++ * @todo NGS: What should the max packet size be set to ++ * here? Before EP type is set? ++ */ ++ ep->maxpacket = MAX_PACKET_SIZE; ++ ++ list_add_tail(&ep->ep_list, &d->gadget.ep_list); ++ } ++ ++ /* remove ep0 from the list. There is a ep0 pointer. */ ++ list_del_init(&d->ep0.ep_list); ++ ++ d->ep0.maxpacket = MAX_EP0_SIZE; ++} ++ ++/** ++ * This function releases the Gadget device. ++ * required by device_unregister(). ++ * ++ * @todo Should this do something? Should it free the PCD? ++ */ ++static void dwc_otg_pcd_gadget_release(struct device *dev) ++{ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p)\n", __func__, dev); ++} ++ ++static struct gadget_wrapper *alloc_wrapper(dwc_bus_dev_t *_dev) ++{ ++ static char pcd_name[] = "dwc_otg_pcd"; ++ dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); ++ struct gadget_wrapper *d; ++ int retval; ++ ++ d = DWC_ALLOC(sizeof(*d)); ++ if (d == NULL) { ++ return NULL; ++ } ++ ++ memset(d, 0, sizeof(*d)); ++ ++ d->gadget.name = pcd_name; ++ d->pcd = otg_dev->pcd; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) ++ strcpy(d->gadget.dev.bus_id, "gadget"); ++#else ++ dev_set_name(&d->gadget.dev, "%s", "gadget"); ++#endif ++ ++ d->gadget.dev.parent = &_dev->dev; ++ d->gadget.dev.release = dwc_otg_pcd_gadget_release; ++ d->gadget.ops = &dwc_otg_pcd_ops; ++ d->gadget.max_speed = dwc_otg_pcd_is_dualspeed(otg_dev->pcd) ? USB_SPEED_HIGH:USB_SPEED_FULL; ++ d->gadget.is_otg = dwc_otg_pcd_is_otg(otg_dev->pcd); ++ ++ d->driver = 0; ++ /* Register the gadget device */ ++ retval = device_register(&d->gadget.dev); ++ if (retval != 0) { ++ DWC_ERROR("device_register failed\n"); ++ DWC_FREE(d); ++ return NULL; ++ } ++ ++ return d; ++} ++ ++static void free_wrapper(struct gadget_wrapper *d) ++{ ++ if (d->driver) { ++ /* should have been done already by driver model core */ ++ DWC_WARN("driver '%s' is still registered\n", ++ d->driver->driver.name); ++ usb_gadget_unregister_driver(d->driver); ++ } ++ ++ device_unregister(&d->gadget.dev); ++ DWC_FREE(d); ++} ++ ++/** ++ * This function initialized the PCD portion of the driver. ++ * ++ */ ++int pcd_init(dwc_bus_dev_t *_dev) ++{ ++ dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); ++ int retval = 0; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p) otg_dev=%p\n", __func__, _dev, otg_dev); ++ ++ otg_dev->pcd = dwc_otg_pcd_init(otg_dev->core_if); ++ ++ if (!otg_dev->pcd) { ++ DWC_ERROR("dwc_otg_pcd_init failed\n"); ++ return -ENOMEM; ++ } ++ ++ otg_dev->pcd->otg_dev = otg_dev; ++ gadget_wrapper = alloc_wrapper(_dev); ++ ++ /* ++ * Initialize EP structures ++ */ ++ gadget_add_eps(gadget_wrapper); ++ /* ++ * Setup interupt handler ++ */ ++#ifdef PLATFORM_INTERFACE ++ DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", ++ platform_get_irq(_dev, 0)); ++ retval = request_irq(platform_get_irq(_dev, 0), dwc_otg_pcd_irq, ++ IRQF_SHARED, gadget_wrapper->gadget.name, ++ otg_dev->pcd); ++ if (retval != 0) { ++ DWC_ERROR("request of irq%d failed\n", ++ platform_get_irq(_dev, 0)); ++ free_wrapper(gadget_wrapper); ++ return -EBUSY; ++ } ++#else ++ DWC_DEBUGPL(DBG_ANY, "registering handler for irq%d\n", ++ _dev->irq); ++ retval = request_irq(_dev->irq, dwc_otg_pcd_irq, ++ IRQF_SHARED | IRQF_DISABLED, ++ gadget_wrapper->gadget.name, otg_dev->pcd); ++ if (retval != 0) { ++ DWC_ERROR("request of irq%d failed\n", _dev->irq); ++ free_wrapper(gadget_wrapper); ++ return -EBUSY; ++ } ++#endif ++ ++ dwc_otg_pcd_start(gadget_wrapper->pcd, &fops); ++ ++ return retval; ++} ++ ++/** ++ * Cleanup the PCD. ++ */ ++void pcd_remove(dwc_bus_dev_t *_dev) ++{ ++ dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); ++ dwc_otg_pcd_t *pcd = otg_dev->pcd; ++ ++ DWC_DEBUGPL(DBG_PCDV, "%s(%p) otg_dev %p\n", __func__, _dev, otg_dev); ++ ++ /* ++ * Free the IRQ ++ */ ++#ifdef PLATFORM_INTERFACE ++ free_irq(platform_get_irq(_dev, 0), pcd); ++#else ++ free_irq(_dev->irq, pcd); ++#endif ++ dwc_otg_pcd_remove(otg_dev->pcd); ++ free_wrapper(gadget_wrapper); ++ otg_dev->pcd = 0; ++} ++ ++/** ++ * This function registers a gadget driver with the PCD. ++ * ++ * When a driver is successfully registered, it will receive control ++ * requests including set_configuration(), which enables non-control ++ * requests. then usb traffic follows until a disconnect is reported. ++ * then a host may connect again, or the driver might get unbound. ++ * ++ * @param driver The driver being registered ++ * @param bind The bind function of gadget driver ++ */ ++ ++int usb_gadget_probe_driver(struct usb_gadget_driver *driver) ++{ ++ int retval; ++ ++ DWC_DEBUGPL(DBG_PCD, "registering gadget driver '%s'\n", ++ driver->driver.name); ++ ++ if (!driver || driver->max_speed == USB_SPEED_UNKNOWN || ++ !driver->bind || ++ !driver->unbind || !driver->disconnect || !driver->setup) { ++ DWC_DEBUGPL(DBG_PCDV, "EINVAL\n"); ++ return -EINVAL; ++ } ++ if (gadget_wrapper == 0) { ++ DWC_DEBUGPL(DBG_PCDV, "ENODEV\n"); ++ return -ENODEV; ++ } ++ if (gadget_wrapper->driver != 0) { ++ DWC_DEBUGPL(DBG_PCDV, "EBUSY (%p)\n", gadget_wrapper->driver); ++ return -EBUSY; ++ } ++ ++ /* hook up the driver */ ++ gadget_wrapper->driver = driver; ++ gadget_wrapper->gadget.dev.driver = &driver->driver; ++ ++ DWC_DEBUGPL(DBG_PCD, "bind to driver %s\n", driver->driver.name); ++ retval = driver->bind(&gadget_wrapper->gadget, gadget_wrapper->driver); ++ if (retval) { ++ DWC_ERROR("bind to driver %s --> error %d\n", ++ driver->driver.name, retval); ++ gadget_wrapper->driver = 0; ++ gadget_wrapper->gadget.dev.driver = 0; ++ return retval; ++ } ++ DWC_DEBUGPL(DBG_ANY, "registered gadget driver '%s'\n", ++ driver->driver.name); ++ return 0; ++} ++EXPORT_SYMBOL(usb_gadget_probe_driver); ++ ++/** ++ * This function unregisters a gadget driver ++ * ++ * @param driver The driver being unregistered ++ */ ++int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) ++{ ++ //DWC_DEBUGPL(DBG_PCDV,"%s(%p)\n", __func__, _driver); ++ ++ if (gadget_wrapper == 0) { ++ DWC_DEBUGPL(DBG_ANY, "%s Return(%d): s_pcd==0\n", __func__, ++ -ENODEV); ++ return -ENODEV; ++ } ++ if (driver == 0 || driver != gadget_wrapper->driver) { ++ DWC_DEBUGPL(DBG_ANY, "%s Return(%d): driver?\n", __func__, ++ -EINVAL); ++ return -EINVAL; ++ } ++ ++ driver->unbind(&gadget_wrapper->gadget); ++ gadget_wrapper->driver = 0; ++ ++ DWC_DEBUGPL(DBG_ANY, "unregistered driver '%s'\n", driver->driver.name); ++ return 0; ++} ++ ++EXPORT_SYMBOL(usb_gadget_unregister_driver); ++ ++#endif /* DWC_HOST_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_regs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_regs.h 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,2550 @@ ++/* ========================================================================== ++ * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_regs.h $ ++ * $Revision: #98 $ ++ * $Date: 2012/08/10 $ ++ * $Change: 2047372 $ ++ * ++ * Synopsys HS OTG Linux Software Driver and documentation (hereinafter, ++ * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless ++ * otherwise expressly agreed to in writing between Synopsys and you. ++ * ++ * The Software IS NOT an item of Licensed Software or Licensed Product under ++ * any End User Software License Agreement or Agreement for Licensed Product ++ * with Synopsys or any supplement thereto. You are permitted to use and ++ * redistribute this Software in source and binary forms, with or without ++ * modification, provided that redistributions of source code must retain this ++ * notice. You may not view, use, disclose, copy or distribute this file or ++ * any information contained herein except pursuant to this license grant from ++ * Synopsys. If you do not agree with this notice, including the disclaimer ++ * below, then you are not authorized to use the Software. ++ * ++ * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS ++ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE ++ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ++ * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT, ++ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES ++ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR ++ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER ++ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT ++ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY ++ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH ++ * DAMAGE. ++ * ========================================================================== */ ++ ++#ifndef __DWC_OTG_REGS_H__ ++#define __DWC_OTG_REGS_H__ ++ ++#include "dwc_otg_core_if.h" ++ ++/** ++ * @file ++ * ++ * This file contains the data structures for accessing the DWC_otg core registers. ++ * ++ * The application interfaces with the HS OTG core by reading from and ++ * writing to the Control and Status Register (CSR) space through the ++ * AHB Slave interface. These registers are 32 bits wide, and the ++ * addresses are 32-bit-block aligned. ++ * CSRs are classified as follows: ++ * - Core Global Registers ++ * - Device Mode Registers ++ * - Device Global Registers ++ * - Device Endpoint Specific Registers ++ * - Host Mode Registers ++ * - Host Global Registers ++ * - Host Port CSRs ++ * - Host Channel Specific Registers ++ * ++ * Only the Core Global registers can be accessed in both Device and ++ * Host modes. When the HS OTG core is operating in one mode, either ++ * Device or Host, the application must not access registers from the ++ * other mode. When the core switches from one mode to another, the ++ * registers in the new mode of operation must be reprogrammed as they ++ * would be after a power-on reset. ++ */ ++ ++/****************************************************************************/ ++/** DWC_otg Core registers . ++ * The dwc_otg_core_global_regs structure defines the size ++ * and relative field offsets for the Core Global registers. ++ */ ++typedef struct dwc_otg_core_global_regs { ++ /** OTG Control and Status Register. Offset: 000h */ ++ volatile uint32_t gotgctl; ++ /** OTG Interrupt Register. Offset: 004h */ ++ volatile uint32_t gotgint; ++ /**Core AHB Configuration Register. Offset: 008h */ ++ volatile uint32_t gahbcfg; ++ ++#define DWC_GLBINTRMASK 0x0001 ++#define DWC_DMAENABLE 0x0020 ++#define DWC_NPTXEMPTYLVL_EMPTY 0x0080 ++#define DWC_NPTXEMPTYLVL_HALFEMPTY 0x0000 ++#define DWC_PTXEMPTYLVL_EMPTY 0x0100 ++#define DWC_PTXEMPTYLVL_HALFEMPTY 0x0000 ++ ++ /**Core USB Configuration Register. Offset: 00Ch */ ++ volatile uint32_t gusbcfg; ++ /**Core Reset Register. Offset: 010h */ ++ volatile uint32_t grstctl; ++ /**Core Interrupt Register. Offset: 014h */ ++ volatile uint32_t gintsts; ++ /**Core Interrupt Mask Register. Offset: 018h */ ++ volatile uint32_t gintmsk; ++ /**Receive Status Queue Read Register (Read Only). Offset: 01Ch */ ++ volatile uint32_t grxstsr; ++ /**Receive Status Queue Read & POP Register (Read Only). Offset: 020h*/ ++ volatile uint32_t grxstsp; ++ /**Receive FIFO Size Register. Offset: 024h */ ++ volatile uint32_t grxfsiz; ++ /**Non Periodic Transmit FIFO Size Register. Offset: 028h */ ++ volatile uint32_t gnptxfsiz; ++ /**Non Periodic Transmit FIFO/Queue Status Register (Read ++ * Only). Offset: 02Ch */ ++ volatile uint32_t gnptxsts; ++ /**I2C Access Register. Offset: 030h */ ++ volatile uint32_t gi2cctl; ++ /**PHY Vendor Control Register. Offset: 034h */ ++ volatile uint32_t gpvndctl; ++ /**General Purpose Input/Output Register. Offset: 038h */ ++ volatile uint32_t ggpio; ++ /**User ID Register. Offset: 03Ch */ ++ volatile uint32_t guid; ++ /**Synopsys ID Register (Read Only). Offset: 040h */ ++ volatile uint32_t gsnpsid; ++ /**User HW Config1 Register (Read Only). Offset: 044h */ ++ volatile uint32_t ghwcfg1; ++ /**User HW Config2 Register (Read Only). Offset: 048h */ ++ volatile uint32_t ghwcfg2; ++#define DWC_SLAVE_ONLY_ARCH 0 ++#define DWC_EXT_DMA_ARCH 1 ++#define DWC_INT_DMA_ARCH 2 ++ ++#define DWC_MODE_HNP_SRP_CAPABLE 0 ++#define DWC_MODE_SRP_ONLY_CAPABLE 1 ++#define DWC_MODE_NO_HNP_SRP_CAPABLE 2 ++#define DWC_MODE_SRP_CAPABLE_DEVICE 3 ++#define DWC_MODE_NO_SRP_CAPABLE_DEVICE 4 ++#define DWC_MODE_SRP_CAPABLE_HOST 5 ++#define DWC_MODE_NO_SRP_CAPABLE_HOST 6 ++ ++ /**User HW Config3 Register (Read Only). Offset: 04Ch */ ++ volatile uint32_t ghwcfg3; ++ /**User HW Config4 Register (Read Only). Offset: 050h*/ ++ volatile uint32_t ghwcfg4; ++ /** Core LPM Configuration register Offset: 054h*/ ++ volatile uint32_t glpmcfg; ++ /** Global PowerDn Register Offset: 058h */ ++ volatile uint32_t gpwrdn; ++ /** Global DFIFO SW Config Register Offset: 05Ch */ ++ volatile uint32_t gdfifocfg; ++ /** ADP Control Register Offset: 060h */ ++ volatile uint32_t adpctl; ++ /** Reserved Offset: 064h-0FFh */ ++ volatile uint32_t reserved39[39]; ++ /** Host Periodic Transmit FIFO Size Register. Offset: 100h */ ++ volatile uint32_t hptxfsiz; ++ /** Device Periodic Transmit FIFO#n Register if dedicated fifos are disabled, ++ otherwise Device Transmit FIFO#n Register. ++ * Offset: 104h + (FIFO_Number-1)*04h, 1 <= FIFO Number <= 15 (1<=n<=15). */ ++ volatile uint32_t dtxfsiz[15]; ++} dwc_otg_core_global_regs_t; ++ ++/** ++ * This union represents the bit fields of the Core OTG Control ++ * and Status Register (GOTGCTL). Set the bits using the bit ++ * fields then write the d32 value to the register. ++ */ ++typedef union gotgctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned sesreqscs:1; ++ unsigned sesreq:1; ++ unsigned vbvalidoven:1; ++ unsigned vbvalidovval:1; ++ unsigned avalidoven:1; ++ unsigned avalidovval:1; ++ unsigned bvalidoven:1; ++ unsigned bvalidovval:1; ++ unsigned hstnegscs:1; ++ unsigned hnpreq:1; ++ unsigned hstsethnpen:1; ++ unsigned devhnpen:1; ++ unsigned reserved12_15:4; ++ unsigned conidsts:1; ++ unsigned dbnctime:1; ++ unsigned asesvld:1; ++ unsigned bsesvld:1; ++ unsigned otgver:1; ++ unsigned reserved1:1; ++ unsigned multvalidbc:5; ++ unsigned chirpen:1; ++ unsigned reserved28_31:4; ++ } b; ++} gotgctl_data_t; ++ ++/** ++ * This union represents the bit fields of the Core OTG Interrupt Register ++ * (GOTGINT). Set/clear the bits using the bit fields then write the d32 ++ * value to the register. ++ */ ++typedef union gotgint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Current Mode */ ++ unsigned reserved0_1:2; ++ ++ /** Session End Detected */ ++ unsigned sesenddet:1; ++ ++ unsigned reserved3_7:5; ++ ++ /** Session Request Success Status Change */ ++ unsigned sesreqsucstschng:1; ++ /** Host Negotiation Success Status Change */ ++ unsigned hstnegsucstschng:1; ++ ++ unsigned reserved10_16:7; ++ ++ /** Host Negotiation Detected */ ++ unsigned hstnegdet:1; ++ /** A-Device Timeout Change */ ++ unsigned adevtoutchng:1; ++ /** Debounce Done */ ++ unsigned debdone:1; ++ /** Multi-Valued input changed */ ++ unsigned mvic:1; ++ ++ unsigned reserved31_21:11; ++ ++ } b; ++} gotgint_data_t; ++ ++/** ++ * This union represents the bit fields of the Core AHB Configuration ++ * Register (GAHBCFG). Set/clear the bits using the bit fields then ++ * write the d32 value to the register. ++ */ ++typedef union gahbcfg_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned glblintrmsk:1; ++#define DWC_GAHBCFG_GLBINT_ENABLE 1 ++ ++ unsigned hburstlen:4; ++#define DWC_GAHBCFG_INT_DMA_BURST_SINGLE 0 ++#define DWC_GAHBCFG_INT_DMA_BURST_INCR 1 ++#define DWC_GAHBCFG_INT_DMA_BURST_INCR4 3 ++#define DWC_GAHBCFG_INT_DMA_BURST_INCR8 5 ++#define DWC_GAHBCFG_INT_DMA_BURST_INCR16 7 ++ ++ unsigned dmaenable:1; ++#define DWC_GAHBCFG_DMAENABLE 1 ++ unsigned reserved:1; ++ unsigned nptxfemplvl_txfemplvl:1; ++ unsigned ptxfemplvl:1; ++#define DWC_GAHBCFG_TXFEMPTYLVL_EMPTY 1 ++#define DWC_GAHBCFG_TXFEMPTYLVL_HALFEMPTY 0 ++ unsigned reserved9_20:12; ++ unsigned remmemsupp:1; ++ unsigned notialldmawrit:1; ++ unsigned ahbsingle:1; ++ unsigned reserved24_31:8; ++ } b; ++} gahbcfg_data_t; ++ ++/** ++ * This union represents the bit fields of the Core USB Configuration ++ * Register (GUSBCFG). Set the bits using the bit fields then write ++ * the d32 value to the register. ++ */ ++typedef union gusbcfg_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned toutcal:3; ++ unsigned phyif:1; ++ unsigned ulpi_utmi_sel:1; ++ unsigned fsintf:1; ++ unsigned physel:1; ++ unsigned ddrsel:1; ++ unsigned srpcap:1; ++ unsigned hnpcap:1; ++ unsigned usbtrdtim:4; ++ unsigned reserved1:1; ++ unsigned phylpwrclksel:1; ++ unsigned otgutmifssel:1; ++ unsigned ulpi_fsls:1; ++ unsigned ulpi_auto_res:1; ++ unsigned ulpi_clk_sus_m:1; ++ unsigned ulpi_ext_vbus_drv:1; ++ unsigned ulpi_int_vbus_indicator:1; ++ unsigned term_sel_dl_pulse:1; ++ unsigned indicator_complement:1; ++ unsigned indicator_pass_through:1; ++ unsigned ulpi_int_prot_dis:1; ++ unsigned ic_usb_cap:1; ++ unsigned ic_traffic_pull_remove:1; ++ unsigned tx_end_delay:1; ++ unsigned force_host_mode:1; ++ unsigned force_dev_mode:1; ++ unsigned reserved31:1; ++ } b; ++} gusbcfg_data_t; ++ ++/** ++ * This union represents the bit fields of the Core Reset Register ++ * (GRSTCTL). Set/clear the bits using the bit fields then write the ++ * d32 value to the register. ++ */ ++typedef union grstctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Core Soft Reset (CSftRst) (Device and Host) ++ * ++ * The application can flush the control logic in the ++ * entire core using this bit. This bit resets the ++ * pipelines in the AHB Clock domain as well as the ++ * PHY Clock domain. ++ * ++ * The state machines are reset to an IDLE state, the ++ * control bits in the CSRs are cleared, all the ++ * transmit FIFOs and the receive FIFO are flushed. ++ * ++ * The status mask bits that control the generation of ++ * the interrupt, are cleared, to clear the ++ * interrupt. The interrupt status bits are not ++ * cleared, so the application can get the status of ++ * any events that occurred in the core after it has ++ * set this bit. ++ * ++ * Any transactions on the AHB are terminated as soon ++ * as possible following the protocol. Any ++ * transactions on the USB are terminated immediately. ++ * ++ * The configuration settings in the CSRs are ++ * unchanged, so the software doesn't have to ++ * reprogram these registers (Device ++ * Configuration/Host Configuration/Core System ++ * Configuration/Core PHY Configuration). ++ * ++ * The application can write to this bit, any time it ++ * wants to reset the core. This is a self clearing ++ * bit and the core clears this bit after all the ++ * necessary logic is reset in the core, which may ++ * take several clocks, depending on the current state ++ * of the core. ++ */ ++ unsigned csftrst:1; ++ /** Hclk Soft Reset ++ * ++ * The application uses this bit to reset the control logic in ++ * the AHB clock domain. Only AHB clock domain pipelines are ++ * reset. ++ */ ++ unsigned hsftrst:1; ++ /** Host Frame Counter Reset (Host Only)
++ * ++ * The application can reset the (micro)frame number ++ * counter inside the core, using this bit. When the ++ * (micro)frame counter is reset, the subsequent SOF ++ * sent out by the core, will have a (micro)frame ++ * number of 0. ++ */ ++ unsigned hstfrm:1; ++ /** In Token Sequence Learning Queue Flush ++ * (INTknQFlsh) (Device Only) ++ */ ++ unsigned intknqflsh:1; ++ /** RxFIFO Flush (RxFFlsh) (Device and Host) ++ * ++ * The application can flush the entire Receive FIFO ++ * using this bit. The application must first ++ * ensure that the core is not in the middle of a ++ * transaction. The application should write into ++ * this bit, only after making sure that neither the ++ * DMA engine is reading from the RxFIFO nor the MAC ++ * is writing the data in to the FIFO. The ++ * application should wait until the bit is cleared ++ * before performing any other operations. This bit ++ * will takes 8 clocks (slowest of PHY or AHB clock) ++ * to clear. ++ */ ++ unsigned rxfflsh:1; ++ /** TxFIFO Flush (TxFFlsh) (Device and Host). ++ * ++ * This bit is used to selectively flush a single or ++ * all transmit FIFOs. The application must first ++ * ensure that the core is not in the middle of a ++ * transaction. The application should write into ++ * this bit, only after making sure that neither the ++ * DMA engine is writing into the TxFIFO nor the MAC ++ * is reading the data out of the FIFO. The ++ * application should wait until the core clears this ++ * bit, before performing any operations. This bit ++ * will takes 8 clocks (slowest of PHY or AHB clock) ++ * to clear. ++ */ ++ unsigned txfflsh:1; ++ ++ /** TxFIFO Number (TxFNum) (Device and Host). ++ * ++ * This is the FIFO number which needs to be flushed, ++ * using the TxFIFO Flush bit. This field should not ++ * be changed until the TxFIFO Flush bit is cleared by ++ * the core. ++ * - 0x0 : Non Periodic TxFIFO Flush ++ * - 0x1 : Periodic TxFIFO #1 Flush in device mode ++ * or Periodic TxFIFO in host mode ++ * - 0x2 : Periodic TxFIFO #2 Flush in device mode. ++ * - ... ++ * - 0xF : Periodic TxFIFO #15 Flush in device mode ++ * - 0x10: Flush all the Transmit NonPeriodic and ++ * Transmit Periodic FIFOs in the core ++ */ ++ unsigned txfnum:5; ++ /** Reserved */ ++ unsigned reserved11_29:19; ++ /** DMA Request Signal. Indicated DMA request is in ++ * probress. Used for debug purpose. */ ++ unsigned dmareq:1; ++ /** AHB Master Idle. Indicates the AHB Master State ++ * Machine is in IDLE condition. */ ++ unsigned ahbidle:1; ++ } b; ++} grstctl_t; ++ ++/** ++ * This union represents the bit fields of the Core Interrupt Mask ++ * Register (GINTMSK). Set/clear the bits using the bit fields then ++ * write the d32 value to the register. ++ */ ++typedef union gintmsk_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned reserved0:1; ++ unsigned modemismatch:1; ++ unsigned otgintr:1; ++ unsigned sofintr:1; ++ unsigned rxstsqlvl:1; ++ unsigned nptxfempty:1; ++ unsigned ginnakeff:1; ++ unsigned goutnakeff:1; ++ unsigned ulpickint:1; ++ unsigned i2cintr:1; ++ unsigned erlysuspend:1; ++ unsigned usbsuspend:1; ++ unsigned usbreset:1; ++ unsigned enumdone:1; ++ unsigned isooutdrop:1; ++ unsigned eopframe:1; ++ unsigned restoredone:1; ++ unsigned epmismatch:1; ++ unsigned inepintr:1; ++ unsigned outepintr:1; ++ unsigned incomplisoin:1; ++ unsigned incomplisoout:1; ++ unsigned fetsusp:1; ++ unsigned resetdet:1; ++ unsigned portintr:1; ++ unsigned hcintr:1; ++ unsigned ptxfempty:1; ++ unsigned lpmtranrcvd:1; ++ unsigned conidstschng:1; ++ unsigned disconnect:1; ++ unsigned sessreqintr:1; ++ unsigned wkupintr:1; ++ } b; ++} gintmsk_data_t; ++/** ++ * This union represents the bit fields of the Core Interrupt Register ++ * (GINTSTS). Set/clear the bits using the bit fields then write the ++ * d32 value to the register. ++ */ ++typedef union gintsts_data { ++ /** raw register data */ ++ uint32_t d32; ++#define DWC_SOF_INTR_MASK 0x0008 ++ /** register bits */ ++ struct { ++#define DWC_HOST_MODE 1 ++ unsigned curmode:1; ++ unsigned modemismatch:1; ++ unsigned otgintr:1; ++ unsigned sofintr:1; ++ unsigned rxstsqlvl:1; ++ unsigned nptxfempty:1; ++ unsigned ginnakeff:1; ++ unsigned goutnakeff:1; ++ unsigned ulpickint:1; ++ unsigned i2cintr:1; ++ unsigned erlysuspend:1; ++ unsigned usbsuspend:1; ++ unsigned usbreset:1; ++ unsigned enumdone:1; ++ unsigned isooutdrop:1; ++ unsigned eopframe:1; ++ unsigned restoredone:1; ++ unsigned epmismatch:1; ++ unsigned inepint:1; ++ unsigned outepintr:1; ++ unsigned incomplisoin:1; ++ unsigned incomplisoout:1; ++ unsigned fetsusp:1; ++ unsigned resetdet:1; ++ unsigned portintr:1; ++ unsigned hcintr:1; ++ unsigned ptxfempty:1; ++ unsigned lpmtranrcvd:1; ++ unsigned conidstschng:1; ++ unsigned disconnect:1; ++ unsigned sessreqintr:1; ++ unsigned wkupintr:1; ++ } b; ++} gintsts_data_t; ++ ++/** ++ * This union represents the bit fields in the Device Receive Status Read and ++ * Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 ++ * element then read out the bits using the bit elements. ++ */ ++typedef union device_grxsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned epnum:4; ++ unsigned bcnt:11; ++ unsigned dpid:2; ++ ++#define DWC_STS_DATA_UPDT 0x2 // OUT Data Packet ++#define DWC_STS_XFER_COMP 0x3 // OUT Data Transfer Complete ++ ++#define DWC_DSTS_GOUT_NAK 0x1 // Global OUT NAK ++#define DWC_DSTS_SETUP_COMP 0x4 // Setup Phase Complete ++#define DWC_DSTS_SETUP_UPDT 0x6 // SETUP Packet ++ unsigned pktsts:4; ++ unsigned fn:4; ++ unsigned reserved25_31:7; ++ } b; ++} device_grxsts_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Receive Status Read and ++ * Pop Registers (GRXSTSR, GRXSTSP) Read the register into the d32 ++ * element then read out the bits using the bit elements. ++ */ ++typedef union host_grxsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned chnum:4; ++ unsigned bcnt:11; ++ unsigned dpid:2; ++ ++ unsigned pktsts:4; ++#define DWC_GRXSTS_PKTSTS_IN 0x2 ++#define DWC_GRXSTS_PKTSTS_IN_XFER_COMP 0x3 ++#define DWC_GRXSTS_PKTSTS_DATA_TOGGLE_ERR 0x5 ++#define DWC_GRXSTS_PKTSTS_CH_HALTED 0x7 ++ ++ unsigned reserved21_31:11; ++ } b; ++} host_grxsts_data_t; ++ ++/** ++ * This union represents the bit fields in the FIFO Size Registers (HPTXFSIZ, ++ * GNPTXFSIZ, DPTXFSIZn, DIEPTXFn). Read the register into the d32 element ++ * then read out the bits using the bit elements. ++ */ ++typedef union fifosize_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned startaddr:16; ++ unsigned depth:16; ++ } b; ++} fifosize_data_t; ++ ++/** ++ * This union represents the bit fields in the Non-Periodic Transmit ++ * FIFO/Queue Status Register (GNPTXSTS). Read the register into the ++ * d32 element then read out the bits using the bit ++ * elements. ++ */ ++typedef union gnptxsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned nptxfspcavail:16; ++ unsigned nptxqspcavail:8; ++ /** Top of the Non-Periodic Transmit Request Queue ++ * - bit 24 - Terminate (Last entry for the selected ++ * channel/EP) ++ * - bits 26:25 - Token Type ++ * - 2'b00 - IN/OUT ++ * - 2'b01 - Zero Length OUT ++ * - 2'b10 - PING/Complete Split ++ * - 2'b11 - Channel Halt ++ * - bits 30:27 - Channel/EP Number ++ */ ++ unsigned nptxqtop_terminate:1; ++ unsigned nptxqtop_token:2; ++ unsigned nptxqtop_chnep:4; ++ unsigned reserved:1; ++ } b; ++} gnptxsts_data_t; ++ ++/** ++ * This union represents the bit fields in the Transmit ++ * FIFO Status Register (DTXFSTS). Read the register into the ++ * d32 element then read out the bits using the bit ++ * elements. ++ */ ++typedef union dtxfsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned txfspcavail:16; ++ unsigned reserved:16; ++ } b; ++} dtxfsts_data_t; ++ ++/** ++ * This union represents the bit fields in the I2C Control Register ++ * (I2CCTL). Read the register into the d32 element then read out the ++ * bits using the bit elements. ++ */ ++typedef union gi2cctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned rwdata:8; ++ unsigned regaddr:8; ++ unsigned addr:7; ++ unsigned i2cen:1; ++ unsigned ack:1; ++ unsigned i2csuspctl:1; ++ unsigned i2cdevaddr:2; ++ unsigned i2cdatse0:1; ++ unsigned reserved:1; ++ unsigned rw:1; ++ unsigned bsydne:1; ++ } b; ++} gi2cctl_data_t; ++ ++/** ++ * This union represents the bit fields in the PHY Vendor Control Register ++ * (GPVNDCTL). Read the register into the d32 element then read out the ++ * bits using the bit elements. ++ */ ++typedef union gpvndctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned regdata:8; ++ unsigned vctrl:8; ++ unsigned regaddr16_21:6; ++ unsigned regwr:1; ++ unsigned reserved23_24:2; ++ unsigned newregreq:1; ++ unsigned vstsbsy:1; ++ unsigned vstsdone:1; ++ unsigned reserved28_30:3; ++ unsigned disulpidrvr:1; ++ } b; ++} gpvndctl_data_t; ++ ++/** ++ * This union represents the bit fields in the General Purpose ++ * Input/Output Register (GGPIO). ++ * Read the register into the d32 element then read out the ++ * bits using the bit elements. ++ */ ++typedef union ggpio_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned gpi:16; ++ unsigned gpo:16; ++ } b; ++} ggpio_data_t; ++ ++/** ++ * This union represents the bit fields in the User ID Register ++ * (GUID). Read the register into the d32 element then read out the ++ * bits using the bit elements. ++ */ ++typedef union guid_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned rwdata:32; ++ } b; ++} guid_data_t; ++ ++/** ++ * This union represents the bit fields in the Synopsys ID Register ++ * (GSNPSID). Read the register into the d32 element then read out the ++ * bits using the bit elements. ++ */ ++typedef union gsnpsid_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned rwdata:32; ++ } b; ++} gsnpsid_data_t; ++ ++/** ++ * This union represents the bit fields in the User HW Config1 ++ * Register. Read the register into the d32 element then read ++ * out the bits using the bit elements. ++ */ ++typedef union hwcfg1_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned ep_dir0:2; ++ unsigned ep_dir1:2; ++ unsigned ep_dir2:2; ++ unsigned ep_dir3:2; ++ unsigned ep_dir4:2; ++ unsigned ep_dir5:2; ++ unsigned ep_dir6:2; ++ unsigned ep_dir7:2; ++ unsigned ep_dir8:2; ++ unsigned ep_dir9:2; ++ unsigned ep_dir10:2; ++ unsigned ep_dir11:2; ++ unsigned ep_dir12:2; ++ unsigned ep_dir13:2; ++ unsigned ep_dir14:2; ++ unsigned ep_dir15:2; ++ } b; ++} hwcfg1_data_t; ++ ++/** ++ * This union represents the bit fields in the User HW Config2 ++ * Register. Read the register into the d32 element then read ++ * out the bits using the bit elements. ++ */ ++typedef union hwcfg2_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /* GHWCFG2 */ ++ unsigned op_mode:3; ++#define DWC_HWCFG2_OP_MODE_HNP_SRP_CAPABLE_OTG 0 ++#define DWC_HWCFG2_OP_MODE_SRP_ONLY_CAPABLE_OTG 1 ++#define DWC_HWCFG2_OP_MODE_NO_HNP_SRP_CAPABLE_OTG 2 ++#define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_DEVICE 3 ++#define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_DEVICE 4 ++#define DWC_HWCFG2_OP_MODE_SRP_CAPABLE_HOST 5 ++#define DWC_HWCFG2_OP_MODE_NO_SRP_CAPABLE_HOST 6 ++ ++ unsigned architecture:2; ++ unsigned point2point:1; ++ unsigned hs_phy_type:2; ++#define DWC_HWCFG2_HS_PHY_TYPE_NOT_SUPPORTED 0 ++#define DWC_HWCFG2_HS_PHY_TYPE_UTMI 1 ++#define DWC_HWCFG2_HS_PHY_TYPE_ULPI 2 ++#define DWC_HWCFG2_HS_PHY_TYPE_UTMI_ULPI 3 ++ ++ unsigned fs_phy_type:2; ++ unsigned num_dev_ep:4; ++ unsigned num_host_chan:4; ++ unsigned perio_ep_supported:1; ++ unsigned dynamic_fifo:1; ++ unsigned multi_proc_int:1; ++ unsigned reserved21:1; ++ unsigned nonperio_tx_q_depth:2; ++ unsigned host_perio_tx_q_depth:2; ++ unsigned dev_token_q_depth:5; ++ unsigned otg_enable_ic_usb:1; ++ } b; ++} hwcfg2_data_t; ++ ++/** ++ * This union represents the bit fields in the User HW Config3 ++ * Register. Read the register into the d32 element then read ++ * out the bits using the bit elements. ++ */ ++typedef union hwcfg3_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /* GHWCFG3 */ ++ unsigned xfer_size_cntr_width:4; ++ unsigned packet_size_cntr_width:3; ++ unsigned otg_func:1; ++ unsigned i2c:1; ++ unsigned vendor_ctrl_if:1; ++ unsigned optional_features:1; ++ unsigned synch_reset_type:1; ++ unsigned adp_supp:1; ++ unsigned otg_enable_hsic:1; ++ unsigned bc_support:1; ++ unsigned otg_lpm_en:1; ++ unsigned dfifo_depth:16; ++ } b; ++} hwcfg3_data_t; ++ ++/** ++ * This union represents the bit fields in the User HW Config4 ++ * Register. Read the register into the d32 element then read ++ * out the bits using the bit elements. ++ */ ++typedef union hwcfg4_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned num_dev_perio_in_ep:4; ++ unsigned power_optimiz:1; ++ unsigned min_ahb_freq:1; ++ unsigned hiber:1; ++ unsigned xhiber:1; ++ unsigned reserved:6; ++ unsigned utmi_phy_data_width:2; ++ unsigned num_dev_mode_ctrl_ep:4; ++ unsigned iddig_filt_en:1; ++ unsigned vbus_valid_filt_en:1; ++ unsigned a_valid_filt_en:1; ++ unsigned b_valid_filt_en:1; ++ unsigned session_end_filt_en:1; ++ unsigned ded_fifo_en:1; ++ unsigned num_in_eps:4; ++ unsigned desc_dma:1; ++ unsigned desc_dma_dyn:1; ++ } b; ++} hwcfg4_data_t; ++ ++/** ++ * This union represents the bit fields of the Core LPM Configuration ++ * Register (GLPMCFG). Set the bits using bit fields then write ++ * the d32 value to the register. ++ */ ++typedef union glpmctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** LPM-Capable (LPMCap) (Device and Host) ++ * The application uses this bit to control ++ * the DWC_otg core LPM capabilities. ++ */ ++ unsigned lpm_cap_en:1; ++ /** LPM response programmed by application (AppL1Res) (Device) ++ * Handshake response to LPM token pre-programmed ++ * by device application software. ++ */ ++ unsigned appl_resp:1; ++ /** Host Initiated Resume Duration (HIRD) (Device and Host) ++ * In Host mode this field indicates the value of HIRD ++ * to be sent in an LPM transaction. ++ * In Device mode this field is updated with the ++ * Received LPM Token HIRD bmAttribute ++ * when an ACK/NYET/STALL response is sent ++ * to an LPM transaction. ++ */ ++ unsigned hird:4; ++ /** RemoteWakeEnable (bRemoteWake) (Device and Host) ++ * In Host mode this bit indicates the value of remote ++ * wake up to be sent in wIndex field of LPM transaction. ++ * In Device mode this field is updated with the ++ * Received LPM Token bRemoteWake bmAttribute ++ * when an ACK/NYET/STALL response is sent ++ * to an LPM transaction. ++ */ ++ unsigned rem_wkup_en:1; ++ /** Enable utmi_sleep_n (EnblSlpM) (Device and Host) ++ * The application uses this bit to control ++ * the utmi_sleep_n assertion to the PHY when in L1 state. ++ */ ++ unsigned en_utmi_sleep:1; ++ /** HIRD Threshold (HIRD_Thres) (Device and Host) ++ */ ++ unsigned hird_thres:5; ++ /** LPM Response (CoreL1Res) (Device and Host) ++ * In Host mode this bit contains handsake response to ++ * LPM transaction. ++ * In Device mode the response of the core to ++ * LPM transaction received is reflected in these two bits. ++ - 0x0 : ERROR (No handshake response) ++ - 0x1 : STALL ++ - 0x2 : NYET ++ - 0x3 : ACK ++ */ ++ unsigned lpm_resp:2; ++ /** Port Sleep Status (SlpSts) (Device and Host) ++ * This bit is set as long as a Sleep condition ++ * is present on the USB bus. ++ */ ++ unsigned prt_sleep_sts:1; ++ /** Sleep State Resume OK (L1ResumeOK) (Device and Host) ++ * Indicates that the application or host ++ * can start resume from Sleep state. ++ */ ++ unsigned sleep_state_resumeok:1; ++ /** LPM channel Index (LPM_Chnl_Indx) (Host) ++ * The channel number on which the LPM transaction ++ * has to be applied while sending ++ * an LPM transaction to the local device. ++ */ ++ unsigned lpm_chan_index:4; ++ /** LPM Retry Count (LPM_Retry_Cnt) (Host) ++ * Number host retries that would be performed ++ * if the device response was not valid response. ++ */ ++ unsigned retry_count:3; ++ /** Send LPM Transaction (SndLPM) (Host) ++ * When set by application software, ++ * an LPM transaction containing two tokens ++ * is sent. ++ */ ++ unsigned send_lpm:1; ++ /** LPM Retry status (LPM_RetryCnt_Sts) (Host) ++ * Number of LPM Host Retries still remaining ++ * to be transmitted for the current LPM sequence ++ */ ++ unsigned retry_count_sts:3; ++ unsigned reserved28_29:2; ++ /** In host mode once this bit is set, the host ++ * configures to drive the HSIC Idle state on the bus. ++ * It then waits for the device to initiate the Connect sequence. ++ * In device mode once this bit is set, the device waits for ++ * the HSIC Idle line state on the bus. Upon receving the Idle ++ * line state, it initiates the HSIC Connect sequence. ++ */ ++ unsigned hsic_connect:1; ++ /** This bit overrides and functionally inverts ++ * the if_select_hsic input port signal. ++ */ ++ unsigned inv_sel_hsic:1; ++ } b; ++} glpmcfg_data_t; ++ ++/** ++ * This union represents the bit fields of the Core ADP Timer, Control and ++ * Status Register (ADPTIMCTLSTS). Set the bits using bit fields then write ++ * the d32 value to the register. ++ */ ++typedef union adpctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Probe Discharge (PRB_DSCHG) ++ * These bits set the times for TADP_DSCHG. ++ * These bits are defined as follows: ++ * 2'b00 - 4 msec ++ * 2'b01 - 8 msec ++ * 2'b10 - 16 msec ++ * 2'b11 - 32 msec ++ */ ++ unsigned prb_dschg:2; ++ /** Probe Delta (PRB_DELTA) ++ * These bits set the resolution for RTIM value. ++ * The bits are defined in units of 32 kHz clock cycles as follows: ++ * 2'b00 - 1 cycles ++ * 2'b01 - 2 cycles ++ * 2'b10 - 3 cycles ++ * 2'b11 - 4 cycles ++ * For example if this value is chosen to 2'b01, it means that RTIM ++ * increments for every 3(three) 32Khz clock cycles. ++ */ ++ unsigned prb_delta:2; ++ /** Probe Period (PRB_PER) ++ * These bits sets the TADP_PRD as shown in Figure 4 as follows: ++ * 2'b00 - 0.625 to 0.925 sec (typical 0.775 sec) ++ * 2'b01 - 1.25 to 1.85 sec (typical 1.55 sec) ++ * 2'b10 - 1.9 to 2.6 sec (typical 2.275 sec) ++ * 2'b11 - Reserved ++ */ ++ unsigned prb_per:2; ++ /** These bits capture the latest time it took for VBUS to ramp from ++ * VADP_SINK to VADP_PRB. ++ * 0x000 - 1 cycles ++ * 0x001 - 2 cycles ++ * 0x002 - 3 cycles ++ * etc ++ * 0x7FF - 2048 cycles ++ * A time of 1024 cycles at 32 kHz corresponds to a time of 32 msec. ++ */ ++ unsigned rtim:11; ++ /** Enable Probe (EnaPrb) ++ * When programmed to 1'b1, the core performs a probe operation. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned enaprb:1; ++ /** Enable Sense (EnaSns) ++ * When programmed to 1'b1, the core performs a Sense operation. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned enasns:1; ++ /** ADP Reset (ADPRes) ++ * When set, ADP controller is reset. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adpres:1; ++ /** ADP Enable (ADPEn) ++ * When set, the core performs either ADP probing or sensing ++ * based on EnaPrb or EnaSns. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adpen:1; ++ /** ADP Probe Interrupt (ADP_PRB_INT) ++ * When this bit is set, it means that the VBUS ++ * voltage is greater than VADP_PRB or VADP_PRB is reached. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_prb_int:1; ++ /** ++ * ADP Sense Interrupt (ADP_SNS_INT) ++ * When this bit is set, it means that the VBUS voltage is greater than ++ * VADP_SNS value or VADP_SNS is reached. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_sns_int:1; ++ /** ADP Tomeout Interrupt (ADP_TMOUT_INT) ++ * This bit is relevant only for an ADP probe. ++ * When this bit is set, it means that the ramp time has ++ * completed ie ADPCTL.RTIM has reached its terminal value ++ * of 0x7FF. This is a debug feature that allows software ++ * to read the ramp time after each cycle. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_tmout_int:1; ++ /** ADP Probe Interrupt Mask (ADP_PRB_INT_MSK) ++ * When this bit is set, it unmasks the interrupt due to ADP_PRB_INT. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_prb_int_msk:1; ++ /** ADP Sense Interrupt Mask (ADP_SNS_INT_MSK) ++ * When this bit is set, it unmasks the interrupt due to ADP_SNS_INT. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_sns_int_msk:1; ++ /** ADP Timoeout Interrupt Mask (ADP_TMOUT_MSK) ++ * When this bit is set, it unmasks the interrupt due to ADP_TMOUT_INT. ++ * This bit is valid only if OTG_Ver = 1'b1. ++ */ ++ unsigned adp_tmout_int_msk:1; ++ /** Access Request ++ * 2'b00 - Read/Write Valid (updated by the core) ++ * 2'b01 - Read ++ * 2'b00 - Write ++ * 2'b00 - Reserved ++ */ ++ unsigned ar:2; ++ /** Reserved */ ++ unsigned reserved29_31:3; ++ } b; ++} adpctl_data_t; ++ ++//////////////////////////////////////////// ++// Device Registers ++/** ++ * Device Global Registers. Offsets 800h-BFFh ++ * ++ * The following structures define the size and relative field offsets ++ * for the Device Mode Registers. ++ * ++ * These registers are visible only in Device mode and must not be ++ * accessed in Host mode, as the results are unknown. ++ */ ++typedef struct dwc_otg_dev_global_regs { ++ /** Device Configuration Register. Offset 800h */ ++ volatile uint32_t dcfg; ++ /** Device Control Register. Offset: 804h */ ++ volatile uint32_t dctl; ++ /** Device Status Register (Read Only). Offset: 808h */ ++ volatile uint32_t dsts; ++ /** Reserved. Offset: 80Ch */ ++ uint32_t unused; ++ /** Device IN Endpoint Common Interrupt Mask ++ * Register. Offset: 810h */ ++ volatile uint32_t diepmsk; ++ /** Device OUT Endpoint Common Interrupt Mask ++ * Register. Offset: 814h */ ++ volatile uint32_t doepmsk; ++ /** Device All Endpoints Interrupt Register. Offset: 818h */ ++ volatile uint32_t daint; ++ /** Device All Endpoints Interrupt Mask Register. Offset: ++ * 81Ch */ ++ volatile uint32_t daintmsk; ++ /** Device IN Token Queue Read Register-1 (Read Only). ++ * Offset: 820h */ ++ volatile uint32_t dtknqr1; ++ /** Device IN Token Queue Read Register-2 (Read Only). ++ * Offset: 824h */ ++ volatile uint32_t dtknqr2; ++ /** Device VBUS discharge Register. Offset: 828h */ ++ volatile uint32_t dvbusdis; ++ /** Device VBUS Pulse Register. Offset: 82Ch */ ++ volatile uint32_t dvbuspulse; ++ /** Device IN Token Queue Read Register-3 (Read Only). / ++ * Device Thresholding control register (Read/Write) ++ * Offset: 830h */ ++ volatile uint32_t dtknqr3_dthrctl; ++ /** Device IN Token Queue Read Register-4 (Read Only). / ++ * Device IN EPs empty Inr. Mask Register (Read/Write) ++ * Offset: 834h */ ++ volatile uint32_t dtknqr4_fifoemptymsk; ++ /** Device Each Endpoint Interrupt Register (Read Only). / ++ * Offset: 838h */ ++ volatile uint32_t deachint; ++ /** Device Each Endpoint Interrupt mask Register (Read/Write). / ++ * Offset: 83Ch */ ++ volatile uint32_t deachintmsk; ++ /** Device Each In Endpoint Interrupt mask Register (Read/Write). / ++ * Offset: 840h */ ++ volatile uint32_t diepeachintmsk[MAX_EPS_CHANNELS]; ++ /** Device Each Out Endpoint Interrupt mask Register (Read/Write). / ++ * Offset: 880h */ ++ volatile uint32_t doepeachintmsk[MAX_EPS_CHANNELS]; ++} dwc_otg_device_global_regs_t; ++ ++/** ++ * This union represents the bit fields in the Device Configuration ++ * Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. Write the ++ * d32 member to the dcfg register. ++ */ ++typedef union dcfg_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Device Speed */ ++ unsigned devspd:2; ++ /** Non Zero Length Status OUT Handshake */ ++ unsigned nzstsouthshk:1; ++#define DWC_DCFG_SEND_STALL 1 ++ ++ unsigned ena32khzs:1; ++ /** Device Addresses */ ++ unsigned devaddr:7; ++ /** Periodic Frame Interval */ ++ unsigned perfrint:2; ++#define DWC_DCFG_FRAME_INTERVAL_80 0 ++#define DWC_DCFG_FRAME_INTERVAL_85 1 ++#define DWC_DCFG_FRAME_INTERVAL_90 2 ++#define DWC_DCFG_FRAME_INTERVAL_95 3 ++ ++ /** Enable Device OUT NAK for bulk in DDMA mode */ ++ unsigned endevoutnak:1; ++ ++ unsigned reserved14_17:4; ++ /** In Endpoint Mis-match count */ ++ unsigned epmscnt:5; ++ /** Enable Descriptor DMA in Device mode */ ++ unsigned descdma:1; ++ unsigned perschintvl:2; ++ unsigned resvalid:6; ++ } b; ++} dcfg_data_t; ++ ++/** ++ * This union represents the bit fields in the Device Control ++ * Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union dctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Remote Wakeup */ ++ unsigned rmtwkupsig:1; ++ /** Soft Disconnect */ ++ unsigned sftdiscon:1; ++ /** Global Non-Periodic IN NAK Status */ ++ unsigned gnpinnaksts:1; ++ /** Global OUT NAK Status */ ++ unsigned goutnaksts:1; ++ /** Test Control */ ++ unsigned tstctl:3; ++ /** Set Global Non-Periodic IN NAK */ ++ unsigned sgnpinnak:1; ++ /** Clear Global Non-Periodic IN NAK */ ++ unsigned cgnpinnak:1; ++ /** Set Global OUT NAK */ ++ unsigned sgoutnak:1; ++ /** Clear Global OUT NAK */ ++ unsigned cgoutnak:1; ++ /** Power-On Programming Done */ ++ unsigned pwronprgdone:1; ++ /** Reserved */ ++ unsigned reserved:1; ++ /** Global Multi Count */ ++ unsigned gmc:2; ++ /** Ignore Frame Number for ISOC EPs */ ++ unsigned ifrmnum:1; ++ /** NAK on Babble */ ++ unsigned nakonbble:1; ++ /** Enable Continue on BNA */ ++ unsigned encontonbna:1; ++ ++ unsigned reserved18_31:14; ++ } b; ++} dctl_data_t; ++ ++/** ++ * This union represents the bit fields in the Device Status ++ * Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union dsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Suspend Status */ ++ unsigned suspsts:1; ++ /** Enumerated Speed */ ++ unsigned enumspd:2; ++#define DWC_DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ 0 ++#define DWC_DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ 1 ++#define DWC_DSTS_ENUMSPD_LS_PHY_6MHZ 2 ++#define DWC_DSTS_ENUMSPD_FS_PHY_48MHZ 3 ++ /** Erratic Error */ ++ unsigned errticerr:1; ++ unsigned reserved4_7:4; ++ /** Frame or Microframe Number of the received SOF */ ++ unsigned soffn:14; ++ unsigned reserved22_31:10; ++ } b; ++} dsts_data_t; ++ ++/** ++ * This union represents the bit fields in the Device IN EP Interrupt ++ * Register and the Device IN EP Common Mask Register. ++ * ++ * - Read the register into the d32 member then set/clear the ++ * bits using the bit elements. ++ */ ++typedef union diepint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Transfer complete mask */ ++ unsigned xfercompl:1; ++ /** Endpoint disable mask */ ++ unsigned epdisabled:1; ++ /** AHB Error mask */ ++ unsigned ahberr:1; ++ /** TimeOUT Handshake mask (non-ISOC EPs) */ ++ unsigned timeout:1; ++ /** IN Token received with TxF Empty mask */ ++ unsigned intktxfemp:1; ++ /** IN Token Received with EP mismatch mask */ ++ unsigned intknepmis:1; ++ /** IN Endpoint NAK Effective mask */ ++ unsigned inepnakeff:1; ++ /** Reserved */ ++ unsigned emptyintr:1; ++ ++ unsigned txfifoundrn:1; ++ ++ /** BNA Interrupt mask */ ++ unsigned bna:1; ++ ++ unsigned reserved10_12:3; ++ /** BNA Interrupt mask */ ++ unsigned nak:1; ++ ++ unsigned reserved14_31:18; ++ } b; ++} diepint_data_t; ++ ++/** ++ * This union represents the bit fields in the Device IN EP ++ * Common/Dedicated Interrupt Mask Register. ++ */ ++typedef union diepint_data diepmsk_data_t; ++ ++/** ++ * This union represents the bit fields in the Device OUT EP Interrupt ++ * Registerand Device OUT EP Common Interrupt Mask Register. ++ * ++ * - Read the register into the d32 member then set/clear the ++ * bits using the bit elements. ++ */ ++typedef union doepint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Transfer complete */ ++ unsigned xfercompl:1; ++ /** Endpoint disable */ ++ unsigned epdisabled:1; ++ /** AHB Error */ ++ unsigned ahberr:1; ++ /** Setup Phase Done (contorl EPs) */ ++ unsigned setup:1; ++ /** OUT Token Received when Endpoint Disabled */ ++ unsigned outtknepdis:1; ++ ++ unsigned stsphsercvd:1; ++ /** Back-to-Back SETUP Packets Received */ ++ unsigned back2backsetup:1; ++ ++ unsigned reserved7:1; ++ /** OUT packet Error */ ++ unsigned outpkterr:1; ++ /** BNA Interrupt */ ++ unsigned bna:1; ++ ++ unsigned reserved10:1; ++ /** Packet Drop Status */ ++ unsigned pktdrpsts:1; ++ /** Babble Interrupt */ ++ unsigned babble:1; ++ /** NAK Interrupt */ ++ unsigned nak:1; ++ /** NYET Interrupt */ ++ unsigned nyet:1; ++ /** Bit indicating setup packet received */ ++ unsigned sr:1; ++ ++ unsigned reserved16_31:16; ++ } b; ++} doepint_data_t; ++ ++/** ++ * This union represents the bit fields in the Device OUT EP ++ * Common/Dedicated Interrupt Mask Register. ++ */ ++typedef union doepint_data doepmsk_data_t; ++ ++/** ++ * This union represents the bit fields in the Device All EP Interrupt ++ * and Mask Registers. ++ * - Read the register into the d32 member then set/clear the ++ * bits using the bit elements. ++ */ ++typedef union daint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** IN Endpoint bits */ ++ unsigned in:16; ++ /** OUT Endpoint bits */ ++ unsigned out:16; ++ } ep; ++ struct { ++ /** IN Endpoint bits */ ++ unsigned inep0:1; ++ unsigned inep1:1; ++ unsigned inep2:1; ++ unsigned inep3:1; ++ unsigned inep4:1; ++ unsigned inep5:1; ++ unsigned inep6:1; ++ unsigned inep7:1; ++ unsigned inep8:1; ++ unsigned inep9:1; ++ unsigned inep10:1; ++ unsigned inep11:1; ++ unsigned inep12:1; ++ unsigned inep13:1; ++ unsigned inep14:1; ++ unsigned inep15:1; ++ /** OUT Endpoint bits */ ++ unsigned outep0:1; ++ unsigned outep1:1; ++ unsigned outep2:1; ++ unsigned outep3:1; ++ unsigned outep4:1; ++ unsigned outep5:1; ++ unsigned outep6:1; ++ unsigned outep7:1; ++ unsigned outep8:1; ++ unsigned outep9:1; ++ unsigned outep10:1; ++ unsigned outep11:1; ++ unsigned outep12:1; ++ unsigned outep13:1; ++ unsigned outep14:1; ++ unsigned outep15:1; ++ } b; ++} daint_data_t; ++ ++/** ++ * This union represents the bit fields in the Device IN Token Queue ++ * Read Registers. ++ * - Read the register into the d32 member. ++ * - READ-ONLY Register ++ */ ++typedef union dtknq1_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** In Token Queue Write Pointer */ ++ unsigned intknwptr:5; ++ /** Reserved */ ++ unsigned reserved05_06:2; ++ /** write pointer has wrapped. */ ++ unsigned wrap_bit:1; ++ /** EP Numbers of IN Tokens 0 ... 4 */ ++ unsigned epnums0_5:24; ++ } b; ++} dtknq1_data_t; ++ ++/** ++ * This union represents Threshold control Register ++ * - Read and write the register into the d32 member. ++ * - READ-WRITABLE Register ++ */ ++typedef union dthrctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** non ISO Tx Thr. Enable */ ++ unsigned non_iso_thr_en:1; ++ /** ISO Tx Thr. Enable */ ++ unsigned iso_thr_en:1; ++ /** Tx Thr. Length */ ++ unsigned tx_thr_len:9; ++ /** AHB Threshold ratio */ ++ unsigned ahb_thr_ratio:2; ++ /** Reserved */ ++ unsigned reserved13_15:3; ++ /** Rx Thr. Enable */ ++ unsigned rx_thr_en:1; ++ /** Rx Thr. Length */ ++ unsigned rx_thr_len:9; ++ unsigned reserved26:1; ++ /** Arbiter Parking Enable*/ ++ unsigned arbprken:1; ++ /** Reserved */ ++ unsigned reserved28_31:4; ++ } b; ++} dthrctl_data_t; ++ ++/** ++ * Device Logical IN Endpoint-Specific Registers. Offsets ++ * 900h-AFCh ++ * ++ * There will be one set of endpoint registers per logical endpoint ++ * implemented. ++ * ++ * These registers are visible only in Device mode and must not be ++ * accessed in Host mode, as the results are unknown. ++ */ ++typedef struct dwc_otg_dev_in_ep_regs { ++ /** Device IN Endpoint Control Register. Offset:900h + ++ * (ep_num * 20h) + 00h */ ++ volatile uint32_t diepctl; ++ /** Reserved. Offset:900h + (ep_num * 20h) + 04h */ ++ uint32_t reserved04; ++ /** Device IN Endpoint Interrupt Register. Offset:900h + ++ * (ep_num * 20h) + 08h */ ++ volatile uint32_t diepint; ++ /** Reserved. Offset:900h + (ep_num * 20h) + 0Ch */ ++ uint32_t reserved0C; ++ /** Device IN Endpoint Transfer Size ++ * Register. Offset:900h + (ep_num * 20h) + 10h */ ++ volatile uint32_t dieptsiz; ++ /** Device IN Endpoint DMA Address Register. Offset:900h + ++ * (ep_num * 20h) + 14h */ ++ volatile uint32_t diepdma; ++ /** Device IN Endpoint Transmit FIFO Status Register. Offset:900h + ++ * (ep_num * 20h) + 18h */ ++ volatile uint32_t dtxfsts; ++ /** Device IN Endpoint DMA Buffer Register. Offset:900h + ++ * (ep_num * 20h) + 1Ch */ ++ volatile uint32_t diepdmab; ++} dwc_otg_dev_in_ep_regs_t; ++ ++/** ++ * Device Logical OUT Endpoint-Specific Registers. Offsets: ++ * B00h-CFCh ++ * ++ * There will be one set of endpoint registers per logical endpoint ++ * implemented. ++ * ++ * These registers are visible only in Device mode and must not be ++ * accessed in Host mode, as the results are unknown. ++ */ ++typedef struct dwc_otg_dev_out_ep_regs { ++ /** Device OUT Endpoint Control Register. Offset:B00h + ++ * (ep_num * 20h) + 00h */ ++ volatile uint32_t doepctl; ++ /** Reserved. Offset:B00h + (ep_num * 20h) + 04h */ ++ uint32_t reserved04; ++ /** Device OUT Endpoint Interrupt Register. Offset:B00h + ++ * (ep_num * 20h) + 08h */ ++ volatile uint32_t doepint; ++ /** Reserved. Offset:B00h + (ep_num * 20h) + 0Ch */ ++ uint32_t reserved0C; ++ /** Device OUT Endpoint Transfer Size Register. Offset: ++ * B00h + (ep_num * 20h) + 10h */ ++ volatile uint32_t doeptsiz; ++ /** Device OUT Endpoint DMA Address Register. Offset:B00h ++ * + (ep_num * 20h) + 14h */ ++ volatile uint32_t doepdma; ++ /** Reserved. Offset:B00h + * (ep_num * 20h) + 18h */ ++ uint32_t unused; ++ /** Device OUT Endpoint DMA Buffer Register. Offset:B00h ++ * + (ep_num * 20h) + 1Ch */ ++ uint32_t doepdmab; ++} dwc_otg_dev_out_ep_regs_t; ++ ++/** ++ * This union represents the bit fields in the Device EP Control ++ * Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union depctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Maximum Packet Size ++ * IN/OUT EPn ++ * IN/OUT EP0 - 2 bits ++ * 2'b00: 64 Bytes ++ * 2'b01: 32 ++ * 2'b10: 16 ++ * 2'b11: 8 */ ++ unsigned mps:11; ++#define DWC_DEP0CTL_MPS_64 0 ++#define DWC_DEP0CTL_MPS_32 1 ++#define DWC_DEP0CTL_MPS_16 2 ++#define DWC_DEP0CTL_MPS_8 3 ++ ++ /** Next Endpoint ++ * IN EPn/IN EP0 ++ * OUT EPn/OUT EP0 - reserved */ ++ unsigned nextep:4; ++ ++ /** USB Active Endpoint */ ++ unsigned usbactep:1; ++ ++ /** Endpoint DPID (INTR/Bulk IN and OUT endpoints) ++ * This field contains the PID of the packet going to ++ * be received or transmitted on this endpoint. The ++ * application should program the PID of the first ++ * packet going to be received or transmitted on this ++ * endpoint , after the endpoint is ++ * activated. Application use the SetD1PID and ++ * SetD0PID fields of this register to program either ++ * D0 or D1 PID. ++ * ++ * The encoding for this field is ++ * - 0: D0 ++ * - 1: D1 ++ */ ++ unsigned dpid:1; ++ ++ /** NAK Status */ ++ unsigned naksts:1; ++ ++ /** Endpoint Type ++ * 2'b00: Control ++ * 2'b01: Isochronous ++ * 2'b10: Bulk ++ * 2'b11: Interrupt */ ++ unsigned eptype:2; ++ ++ /** Snoop Mode ++ * OUT EPn/OUT EP0 ++ * IN EPn/IN EP0 - reserved */ ++ unsigned snp:1; ++ ++ /** Stall Handshake */ ++ unsigned stall:1; ++ ++ /** Tx Fifo Number ++ * IN EPn/IN EP0 ++ * OUT EPn/OUT EP0 - reserved */ ++ unsigned txfnum:4; ++ ++ /** Clear NAK */ ++ unsigned cnak:1; ++ /** Set NAK */ ++ unsigned snak:1; ++ /** Set DATA0 PID (INTR/Bulk IN and OUT endpoints) ++ * Writing to this field sets the Endpoint DPID (DPID) ++ * field in this register to DATA0. Set Even ++ * (micro)frame (SetEvenFr) (ISO IN and OUT Endpoints) ++ * Writing to this field sets the Even/Odd ++ * (micro)frame (EO_FrNum) field to even (micro) ++ * frame. ++ */ ++ unsigned setd0pid:1; ++ /** Set DATA1 PID (INTR/Bulk IN and OUT endpoints) ++ * Writing to this field sets the Endpoint DPID (DPID) ++ * field in this register to DATA1 Set Odd ++ * (micro)frame (SetOddFr) (ISO IN and OUT Endpoints) ++ * Writing to this field sets the Even/Odd ++ * (micro)frame (EO_FrNum) field to odd (micro) frame. ++ */ ++ unsigned setd1pid:1; ++ ++ /** Endpoint Disable */ ++ unsigned epdis:1; ++ /** Endpoint Enable */ ++ unsigned epena:1; ++ } b; ++} depctl_data_t; ++ ++/** ++ * This union represents the bit fields in the Device EP Transfer ++ * Size Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union deptsiz_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Transfer size */ ++ unsigned xfersize:19; ++/** Max packet count for EP (pow(2,10)-1) */ ++#define MAX_PKT_CNT 1023 ++ /** Packet Count */ ++ unsigned pktcnt:10; ++ /** Multi Count - Periodic IN endpoints */ ++ unsigned mc:2; ++ unsigned reserved:1; ++ } b; ++} deptsiz_data_t; ++ ++/** ++ * This union represents the bit fields in the Device EP 0 Transfer ++ * Size Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union deptsiz0_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Transfer size */ ++ unsigned xfersize:7; ++ /** Reserved */ ++ unsigned reserved7_18:12; ++ /** Packet Count */ ++ unsigned pktcnt:2; ++ /** Reserved */ ++ unsigned reserved21_28:8; ++ /**Setup Packet Count (DOEPTSIZ0 Only) */ ++ unsigned supcnt:2; ++ unsigned reserved31; ++ } b; ++} deptsiz0_data_t; ++ ++///////////////////////////////////////////////// ++// DMA Descriptor Specific Structures ++// ++ ++/** Buffer status definitions */ ++ ++#define BS_HOST_READY 0x0 ++#define BS_DMA_BUSY 0x1 ++#define BS_DMA_DONE 0x2 ++#define BS_HOST_BUSY 0x3 ++ ++/** Receive/Transmit status definitions */ ++ ++#define RTS_SUCCESS 0x0 ++#define RTS_BUFFLUSH 0x1 ++#define RTS_RESERVED 0x2 ++#define RTS_BUFERR 0x3 ++ ++/** ++ * This union represents the bit fields in the DMA Descriptor ++ * status quadlet. Read the quadlet into the d32 member then ++ * set/clear the bits using the bit, b_iso_out and ++ * b_iso_in elements. ++ */ ++typedef union dev_dma_desc_sts { ++ /** raw register data */ ++ uint32_t d32; ++ /** quadlet bits */ ++ struct { ++ /** Received number of bytes */ ++ unsigned bytes:16; ++ /** NAK bit - only for OUT EPs */ ++ unsigned nak:1; ++ unsigned reserved17_22:6; ++ /** Multiple Transfer - only for OUT EPs */ ++ unsigned mtrf:1; ++ /** Setup Packet received - only for OUT EPs */ ++ unsigned sr:1; ++ /** Interrupt On Complete */ ++ unsigned ioc:1; ++ /** Short Packet */ ++ unsigned sp:1; ++ /** Last */ ++ unsigned l:1; ++ /** Receive Status */ ++ unsigned sts:2; ++ /** Buffer Status */ ++ unsigned bs:2; ++ } b; ++ ++//#ifdef DWC_EN_ISOC ++ /** iso out quadlet bits */ ++ struct { ++ /** Received number of bytes */ ++ unsigned rxbytes:11; ++ ++ unsigned reserved11:1; ++ /** Frame Number */ ++ unsigned framenum:11; ++ /** Received ISO Data PID */ ++ unsigned pid:2; ++ /** Interrupt On Complete */ ++ unsigned ioc:1; ++ /** Short Packet */ ++ unsigned sp:1; ++ /** Last */ ++ unsigned l:1; ++ /** Receive Status */ ++ unsigned rxsts:2; ++ /** Buffer Status */ ++ unsigned bs:2; ++ } b_iso_out; ++ ++ /** iso in quadlet bits */ ++ struct { ++ /** Transmited number of bytes */ ++ unsigned txbytes:12; ++ /** Frame Number */ ++ unsigned framenum:11; ++ /** Transmited ISO Data PID */ ++ unsigned pid:2; ++ /** Interrupt On Complete */ ++ unsigned ioc:1; ++ /** Short Packet */ ++ unsigned sp:1; ++ /** Last */ ++ unsigned l:1; ++ /** Transmit Status */ ++ unsigned txsts:2; ++ /** Buffer Status */ ++ unsigned bs:2; ++ } b_iso_in; ++//#endif /* DWC_EN_ISOC */ ++} dev_dma_desc_sts_t; ++ ++/** ++ * DMA Descriptor structure ++ * ++ * DMA Descriptor structure contains two quadlets: ++ * Status quadlet and Data buffer pointer. ++ */ ++typedef struct dwc_otg_dev_dma_desc { ++ /** DMA Descriptor status quadlet */ ++ dev_dma_desc_sts_t status; ++ /** DMA Descriptor data buffer pointer */ ++ uint32_t buf; ++} dwc_otg_dev_dma_desc_t; ++ ++/** ++ * The dwc_otg_dev_if structure contains information needed to manage ++ * the DWC_otg controller acting in device mode. It represents the ++ * programming view of the device-specific aspects of the controller. ++ */ ++typedef struct dwc_otg_dev_if { ++ /** Pointer to device Global registers. ++ * Device Global Registers starting at offset 800h ++ */ ++ dwc_otg_device_global_regs_t *dev_global_regs; ++#define DWC_DEV_GLOBAL_REG_OFFSET 0x800 ++ ++ /** ++ * Device Logical IN Endpoint-Specific Registers 900h-AFCh ++ */ ++ dwc_otg_dev_in_ep_regs_t *in_ep_regs[MAX_EPS_CHANNELS]; ++#define DWC_DEV_IN_EP_REG_OFFSET 0x900 ++#define DWC_EP_REG_OFFSET 0x20 ++ ++ /** Device Logical OUT Endpoint-Specific Registers B00h-CFCh */ ++ dwc_otg_dev_out_ep_regs_t *out_ep_regs[MAX_EPS_CHANNELS]; ++#define DWC_DEV_OUT_EP_REG_OFFSET 0xB00 ++ ++ /* Device configuration information */ ++ uint8_t speed; /**< Device Speed 0: Unknown, 1: LS, 2:FS, 3: HS */ ++ uint8_t num_in_eps; /**< Number # of Tx EP range: 0-15 exept ep0 */ ++ uint8_t num_out_eps; /**< Number # of Rx EP range: 0-15 exept ep 0*/ ++ ++ /** Size of periodic FIFOs (Bytes) */ ++ uint16_t perio_tx_fifo_size[MAX_PERIO_FIFOS]; ++ ++ /** Size of Tx FIFOs (Bytes) */ ++ uint16_t tx_fifo_size[MAX_TX_FIFOS]; ++ ++ /** Thresholding enable flags and length varaiables **/ ++ uint16_t rx_thr_en; ++ uint16_t iso_tx_thr_en; ++ uint16_t non_iso_tx_thr_en; ++ ++ uint16_t rx_thr_length; ++ uint16_t tx_thr_length; ++ ++ /** ++ * Pointers to the DMA Descriptors for EP0 Control ++ * transfers (virtual and physical) ++ */ ++ ++ /** 2 descriptors for SETUP packets */ ++ dwc_dma_t dma_setup_desc_addr[2]; ++ dwc_otg_dev_dma_desc_t *setup_desc_addr[2]; ++ ++ /** Pointer to Descriptor with latest SETUP packet */ ++ dwc_otg_dev_dma_desc_t *psetup; ++ ++ /** Index of current SETUP handler descriptor */ ++ uint32_t setup_desc_index; ++ ++ /** Descriptor for Data In or Status In phases */ ++ dwc_dma_t dma_in_desc_addr; ++ dwc_otg_dev_dma_desc_t *in_desc_addr; ++ ++ /** Descriptor for Data Out or Status Out phases */ ++ dwc_dma_t dma_out_desc_addr; ++ dwc_otg_dev_dma_desc_t *out_desc_addr; ++ ++ /** Setup Packet Detected - if set clear NAK when queueing */ ++ uint32_t spd; ++ /** Isoc ep pointer on which incomplete happens */ ++ void *isoc_ep; ++ ++} dwc_otg_dev_if_t; ++ ++///////////////////////////////////////////////// ++// Host Mode Register Structures ++// ++/** ++ * The Host Global Registers structure defines the size and relative ++ * field offsets for the Host Mode Global Registers. Host Global ++ * Registers offsets 400h-7FFh. ++*/ ++typedef struct dwc_otg_host_global_regs { ++ /** Host Configuration Register. Offset: 400h */ ++ volatile uint32_t hcfg; ++ /** Host Frame Interval Register. Offset: 404h */ ++ volatile uint32_t hfir; ++ /** Host Frame Number / Frame Remaining Register. Offset: 408h */ ++ volatile uint32_t hfnum; ++ /** Reserved. Offset: 40Ch */ ++ uint32_t reserved40C; ++ /** Host Periodic Transmit FIFO/ Queue Status Register. Offset: 410h */ ++ volatile uint32_t hptxsts; ++ /** Host All Channels Interrupt Register. Offset: 414h */ ++ volatile uint32_t haint; ++ /** Host All Channels Interrupt Mask Register. Offset: 418h */ ++ volatile uint32_t haintmsk; ++ /** Host Frame List Base Address Register . Offset: 41Ch */ ++ volatile uint32_t hflbaddr; ++} dwc_otg_host_global_regs_t; ++ ++/** ++ * This union represents the bit fields in the Host Configuration Register. ++ * Read the register into the d32 member then set/clear the bits using ++ * the bit elements. Write the d32 member to the hcfg register. ++ */ ++typedef union hcfg_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** FS/LS Phy Clock Select */ ++ unsigned fslspclksel:2; ++#define DWC_HCFG_30_60_MHZ 0 ++#define DWC_HCFG_48_MHZ 1 ++#define DWC_HCFG_6_MHZ 2 ++ ++ /** FS/LS Only Support */ ++ unsigned fslssupp:1; ++ unsigned reserved3_6:4; ++ /** Enable 32-KHz Suspend Mode */ ++ unsigned ena32khzs:1; ++ /** Resume Validation Periiod */ ++ unsigned resvalid:8; ++ unsigned reserved16_22:7; ++ /** Enable Scatter/gather DMA in Host mode */ ++ unsigned descdma:1; ++ /** Frame List Entries */ ++ unsigned frlisten:2; ++ /** Enable Periodic Scheduling */ ++ unsigned perschedena:1; ++ unsigned reserved27_30:4; ++ unsigned modechtimen:1; ++ } b; ++} hcfg_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Frame Remaing/Number ++ * Register. ++ */ ++typedef union hfir_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ unsigned frint:16; ++ unsigned hfirrldctrl:1; ++ unsigned reserved:15; ++ } b; ++} hfir_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Frame Remaing/Number ++ * Register. ++ */ ++typedef union hfnum_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ unsigned frnum:16; ++#define DWC_HFNUM_MAX_FRNUM 0x3FFF ++ unsigned frrem:16; ++ } b; ++} hfnum_data_t; ++ ++typedef union hptxsts_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ unsigned ptxfspcavail:16; ++ unsigned ptxqspcavail:8; ++ /** Top of the Periodic Transmit Request Queue ++ * - bit 24 - Terminate (last entry for the selected channel) ++ * - bits 26:25 - Token Type ++ * - 2'b00 - Zero length ++ * - 2'b01 - Ping ++ * - 2'b10 - Disable ++ * - bits 30:27 - Channel Number ++ * - bit 31 - Odd/even microframe ++ */ ++ unsigned ptxqtop_terminate:1; ++ unsigned ptxqtop_token:2; ++ unsigned ptxqtop_chnum:4; ++ unsigned ptxqtop_odd:1; ++ } b; ++} hptxsts_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Port Control and Status ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. Write the d32 member to the ++ * hprt0 register. ++ */ ++typedef union hprt0_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned prtconnsts:1; ++ unsigned prtconndet:1; ++ unsigned prtena:1; ++ unsigned prtenchng:1; ++ unsigned prtovrcurract:1; ++ unsigned prtovrcurrchng:1; ++ unsigned prtres:1; ++ unsigned prtsusp:1; ++ unsigned prtrst:1; ++ unsigned reserved9:1; ++ unsigned prtlnsts:2; ++ unsigned prtpwr:1; ++ unsigned prttstctl:4; ++ unsigned prtspd:2; ++#define DWC_HPRT0_PRTSPD_HIGH_SPEED 0 ++#define DWC_HPRT0_PRTSPD_FULL_SPEED 1 ++#define DWC_HPRT0_PRTSPD_LOW_SPEED 2 ++ unsigned reserved19_31:13; ++ } b; ++} hprt0_data_t; ++ ++/** ++ * This union represents the bit fields in the Host All Interrupt ++ * Register. ++ */ ++typedef union haint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned ch0:1; ++ unsigned ch1:1; ++ unsigned ch2:1; ++ unsigned ch3:1; ++ unsigned ch4:1; ++ unsigned ch5:1; ++ unsigned ch6:1; ++ unsigned ch7:1; ++ unsigned ch8:1; ++ unsigned ch9:1; ++ unsigned ch10:1; ++ unsigned ch11:1; ++ unsigned ch12:1; ++ unsigned ch13:1; ++ unsigned ch14:1; ++ unsigned ch15:1; ++ unsigned reserved:16; ++ } b; ++ ++ struct { ++ unsigned chint:16; ++ unsigned reserved:16; ++ } b2; ++} haint_data_t; ++ ++/** ++ * This union represents the bit fields in the Host All Interrupt ++ * Register. ++ */ ++typedef union haintmsk_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned ch0:1; ++ unsigned ch1:1; ++ unsigned ch2:1; ++ unsigned ch3:1; ++ unsigned ch4:1; ++ unsigned ch5:1; ++ unsigned ch6:1; ++ unsigned ch7:1; ++ unsigned ch8:1; ++ unsigned ch9:1; ++ unsigned ch10:1; ++ unsigned ch11:1; ++ unsigned ch12:1; ++ unsigned ch13:1; ++ unsigned ch14:1; ++ unsigned ch15:1; ++ unsigned reserved:16; ++ } b; ++ ++ struct { ++ unsigned chint:16; ++ unsigned reserved:16; ++ } b2; ++} haintmsk_data_t; ++ ++/** ++ * Host Channel Specific Registers. 500h-5FCh ++ */ ++typedef struct dwc_otg_hc_regs { ++ /** Host Channel 0 Characteristic Register. Offset: 500h + (chan_num * 20h) + 00h */ ++ volatile uint32_t hcchar; ++ /** Host Channel 0 Split Control Register. Offset: 500h + (chan_num * 20h) + 04h */ ++ volatile uint32_t hcsplt; ++ /** Host Channel 0 Interrupt Register. Offset: 500h + (chan_num * 20h) + 08h */ ++ volatile uint32_t hcint; ++ /** Host Channel 0 Interrupt Mask Register. Offset: 500h + (chan_num * 20h) + 0Ch */ ++ volatile uint32_t hcintmsk; ++ /** Host Channel 0 Transfer Size Register. Offset: 500h + (chan_num * 20h) + 10h */ ++ volatile uint32_t hctsiz; ++ /** Host Channel 0 DMA Address Register. Offset: 500h + (chan_num * 20h) + 14h */ ++ volatile uint32_t hcdma; ++ volatile uint32_t reserved; ++ /** Host Channel 0 DMA Buffer Address Register. Offset: 500h + (chan_num * 20h) + 1Ch */ ++ volatile uint32_t hcdmab; ++} dwc_otg_hc_regs_t; ++ ++/** ++ * This union represents the bit fields in the Host Channel Characteristics ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. Write the d32 member to the ++ * hcchar register. ++ */ ++typedef union hcchar_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** Maximum packet size in bytes */ ++ unsigned mps:11; ++ ++ /** Endpoint number */ ++ unsigned epnum:4; ++ ++ /** 0: OUT, 1: IN */ ++ unsigned epdir:1; ++ ++ unsigned reserved:1; ++ ++ /** 0: Full/high speed device, 1: Low speed device */ ++ unsigned lspddev:1; ++ ++ /** 0: Control, 1: Isoc, 2: Bulk, 3: Intr */ ++ unsigned eptype:2; ++ ++ /** Packets per frame for periodic transfers. 0 is reserved. */ ++ unsigned multicnt:2; ++ ++ /** Device address */ ++ unsigned devaddr:7; ++ ++ /** ++ * Frame to transmit periodic transaction. ++ * 0: even, 1: odd ++ */ ++ unsigned oddfrm:1; ++ ++ /** Channel disable */ ++ unsigned chdis:1; ++ ++ /** Channel enable */ ++ unsigned chen:1; ++ } b; ++} hcchar_data_t; ++ ++typedef union hcsplt_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** Port Address */ ++ unsigned prtaddr:7; ++ ++ /** Hub Address */ ++ unsigned hubaddr:7; ++ ++ /** Transaction Position */ ++ unsigned xactpos:2; ++#define DWC_HCSPLIT_XACTPOS_MID 0 ++#define DWC_HCSPLIT_XACTPOS_END 1 ++#define DWC_HCSPLIT_XACTPOS_BEGIN 2 ++#define DWC_HCSPLIT_XACTPOS_ALL 3 ++ ++ /** Do Complete Split */ ++ unsigned compsplt:1; ++ ++ /** Reserved */ ++ unsigned reserved:14; ++ ++ /** Split Enble */ ++ unsigned spltena:1; ++ } b; ++} hcsplt_data_t; ++ ++/** ++ * This union represents the bit fields in the Host All Interrupt ++ * Register. ++ */ ++typedef union hcint_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** Transfer Complete */ ++ unsigned xfercomp:1; ++ /** Channel Halted */ ++ unsigned chhltd:1; ++ /** AHB Error */ ++ unsigned ahberr:1; ++ /** STALL Response Received */ ++ unsigned stall:1; ++ /** NAK Response Received */ ++ unsigned nak:1; ++ /** ACK Response Received */ ++ unsigned ack:1; ++ /** NYET Response Received */ ++ unsigned nyet:1; ++ /** Transaction Err */ ++ unsigned xacterr:1; ++ /** Babble Error */ ++ unsigned bblerr:1; ++ /** Frame Overrun */ ++ unsigned frmovrun:1; ++ /** Data Toggle Error */ ++ unsigned datatglerr:1; ++ /** Buffer Not Available (only for DDMA mode) */ ++ unsigned bna:1; ++ /** Exessive transaction error (only for DDMA mode) */ ++ unsigned xcs_xact:1; ++ /** Frame List Rollover interrupt */ ++ unsigned frm_list_roll:1; ++ /** Reserved */ ++ unsigned reserved14_31:18; ++ } b; ++} hcint_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Channel Interrupt Mask ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. Write the d32 member to the ++ * hcintmsk register. ++ */ ++typedef union hcintmsk_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ unsigned xfercompl:1; ++ unsigned chhltd:1; ++ unsigned ahberr:1; ++ unsigned stall:1; ++ unsigned nak:1; ++ unsigned ack:1; ++ unsigned nyet:1; ++ unsigned xacterr:1; ++ unsigned bblerr:1; ++ unsigned frmovrun:1; ++ unsigned datatglerr:1; ++ unsigned bna:1; ++ unsigned xcs_xact:1; ++ unsigned frm_list_roll:1; ++ unsigned reserved14_31:18; ++ } b; ++} hcintmsk_data_t; ++ ++/** ++ * This union represents the bit fields in the Host Channel Transfer Size ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. Write the d32 member to the ++ * hcchar register. ++ */ ++ ++typedef union hctsiz_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** Total transfer size in bytes */ ++ unsigned xfersize:19; ++ ++ /** Data packets to transfer */ ++ unsigned pktcnt:10; ++ ++ /** ++ * Packet ID for next data packet ++ * 0: DATA0 ++ * 1: DATA2 ++ * 2: DATA1 ++ * 3: MDATA (non-Control), SETUP (Control) ++ */ ++ unsigned pid:2; ++#define DWC_HCTSIZ_DATA0 0 ++#define DWC_HCTSIZ_DATA1 2 ++#define DWC_HCTSIZ_DATA2 1 ++#define DWC_HCTSIZ_MDATA 3 ++#define DWC_HCTSIZ_SETUP 3 ++ ++ /** Do PING protocol when 1 */ ++ unsigned dopng:1; ++ } b; ++ ++ /** register bits */ ++ struct { ++ /** Scheduling information */ ++ unsigned schinfo:8; ++ ++ /** Number of transfer descriptors. ++ * Max value: ++ * 64 in general, ++ * 256 only for HS isochronous endpoint. ++ */ ++ unsigned ntd:8; ++ ++ /** Data packets to transfer */ ++ unsigned reserved16_28:13; ++ ++ /** ++ * Packet ID for next data packet ++ * 0: DATA0 ++ * 1: DATA2 ++ * 2: DATA1 ++ * 3: MDATA (non-Control) ++ */ ++ unsigned pid:2; ++ ++ /** Do PING protocol when 1 */ ++ unsigned dopng:1; ++ } b_ddma; ++} hctsiz_data_t; ++ ++/** ++ * This union represents the bit fields in the Host DMA Address ++ * Register used in Descriptor DMA mode. ++ */ ++typedef union hcdma_data { ++ /** raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ unsigned reserved0_2:3; ++ /** Current Transfer Descriptor. Not used for ISOC */ ++ unsigned ctd:8; ++ /** Start Address of Descriptor List */ ++ unsigned dma_addr:21; ++ } b; ++} hcdma_data_t; ++ ++/** ++ * This union represents the bit fields in the DMA Descriptor ++ * status quadlet for host mode. Read the quadlet into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union host_dma_desc_sts { ++ /** raw register data */ ++ uint32_t d32; ++ /** quadlet bits */ ++ ++ /* for non-isochronous */ ++ struct { ++ /** Number of bytes */ ++ unsigned n_bytes:17; ++ /** QTD offset to jump when Short Packet received - only for IN EPs */ ++ unsigned qtd_offset:6; ++ /** ++ * Set to request the core to jump to alternate QTD if ++ * Short Packet received - only for IN EPs ++ */ ++ unsigned a_qtd:1; ++ /** ++ * Setup Packet bit. When set indicates that buffer contains ++ * setup packet. ++ */ ++ unsigned sup:1; ++ /** Interrupt On Complete */ ++ unsigned ioc:1; ++ /** End of List */ ++ unsigned eol:1; ++ unsigned reserved27:1; ++ /** Rx/Tx Status */ ++ unsigned sts:2; ++#define DMA_DESC_STS_PKTERR 1 ++ unsigned reserved30:1; ++ /** Active Bit */ ++ unsigned a:1; ++ } b; ++ /* for isochronous */ ++ struct { ++ /** Number of bytes */ ++ unsigned n_bytes:12; ++ unsigned reserved12_24:13; ++ /** Interrupt On Complete */ ++ unsigned ioc:1; ++ unsigned reserved26_27:2; ++ /** Rx/Tx Status */ ++ unsigned sts:2; ++ unsigned reserved30:1; ++ /** Active Bit */ ++ unsigned a:1; ++ } b_isoc; ++} host_dma_desc_sts_t; ++ ++#define MAX_DMA_DESC_SIZE 131071 ++#define MAX_DMA_DESC_NUM_GENERIC 64 ++#define MAX_DMA_DESC_NUM_HS_ISOC 256 ++#define MAX_FRLIST_EN_NUM 64 ++/** ++ * Host-mode DMA Descriptor structure ++ * ++ * DMA Descriptor structure contains two quadlets: ++ * Status quadlet and Data buffer pointer. ++ */ ++typedef struct dwc_otg_host_dma_desc { ++ /** DMA Descriptor status quadlet */ ++ host_dma_desc_sts_t status; ++ /** DMA Descriptor data buffer pointer */ ++ uint32_t buf; ++} dwc_otg_host_dma_desc_t; ++ ++/** OTG Host Interface Structure. ++ * ++ * The OTG Host Interface Structure structure contains information ++ * needed to manage the DWC_otg controller acting in host mode. It ++ * represents the programming view of the host-specific aspects of the ++ * controller. ++ */ ++typedef struct dwc_otg_host_if { ++ /** Host Global Registers starting at offset 400h.*/ ++ dwc_otg_host_global_regs_t *host_global_regs; ++#define DWC_OTG_HOST_GLOBAL_REG_OFFSET 0x400 ++ ++ /** Host Port 0 Control and Status Register */ ++ volatile uint32_t *hprt0; ++#define DWC_OTG_HOST_PORT_REGS_OFFSET 0x440 ++ ++ /** Host Channel Specific Registers at offsets 500h-5FCh. */ ++ dwc_otg_hc_regs_t *hc_regs[MAX_EPS_CHANNELS]; ++#define DWC_OTG_HOST_CHAN_REGS_OFFSET 0x500 ++#define DWC_OTG_CHAN_REGS_OFFSET 0x20 ++ ++ /* Host configuration information */ ++ /** Number of Host Channels (range: 1-16) */ ++ uint8_t num_host_channels; ++ /** Periodic EPs supported (0: no, 1: yes) */ ++ uint8_t perio_eps_supported; ++ /** Periodic Tx FIFO Size (Only 1 host periodic Tx FIFO) */ ++ uint16_t perio_tx_fifo_size; ++ ++} dwc_otg_host_if_t; ++ ++/** ++ * This union represents the bit fields in the Power and Clock Gating Control ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. ++ */ ++typedef union pcgcctl_data { ++ /** raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** Stop Pclk */ ++ unsigned stoppclk:1; ++ /** Gate Hclk */ ++ unsigned gatehclk:1; ++ /** Power Clamp */ ++ unsigned pwrclmp:1; ++ /** Reset Power Down Modules */ ++ unsigned rstpdwnmodule:1; ++ /** Reserved */ ++ unsigned reserved:1; ++ /** Enable Sleep Clock Gating (Enbl_L1Gating) */ ++ unsigned enbl_sleep_gating:1; ++ /** PHY In Sleep (PhySleep) */ ++ unsigned phy_in_sleep:1; ++ /** Deep Sleep*/ ++ unsigned deep_sleep:1; ++ unsigned resetaftsusp:1; ++ unsigned restoremode:1; ++ unsigned enbl_extnd_hiber:1; ++ unsigned extnd_hiber_pwrclmp:1; ++ unsigned extnd_hiber_switch:1; ++ unsigned ess_reg_restored:1; ++ unsigned prt_clk_sel:2; ++ unsigned port_power:1; ++ unsigned max_xcvrselect:2; ++ unsigned max_termsel:1; ++ unsigned mac_dev_addr:7; ++ unsigned p2hd_dev_enum_spd:2; ++ unsigned p2hd_prt_spd:2; ++ unsigned if_dev_mode:1; ++ } b; ++} pcgcctl_data_t; ++ ++/** ++ * This union represents the bit fields in the Global Data FIFO Software ++ * Configuration Register. Read the register into the d32 member then ++ * set/clear the bits using the bit elements. ++ */ ++typedef union gdfifocfg_data { ++ /* raw register data */ ++ uint32_t d32; ++ /** register bits */ ++ struct { ++ /** OTG Data FIFO depth */ ++ unsigned gdfifocfg:16; ++ /** Start address of EP info controller */ ++ unsigned epinfobase:16; ++ } b; ++} gdfifocfg_data_t; ++ ++/** ++ * This union represents the bit fields in the Global Power Down Register ++ * Register. Read the register into the d32 member then set/clear the ++ * bits using the bit elements. ++ */ ++typedef union gpwrdn_data { ++ /* raw register data */ ++ uint32_t d32; ++ ++ /** register bits */ ++ struct { ++ /** PMU Interrupt Select */ ++ unsigned pmuintsel:1; ++ /** PMU Active */ ++ unsigned pmuactv:1; ++ /** Restore */ ++ unsigned restore:1; ++ /** Power Down Clamp */ ++ unsigned pwrdnclmp:1; ++ /** Power Down Reset */ ++ unsigned pwrdnrstn:1; ++ /** Power Down Switch */ ++ unsigned pwrdnswtch:1; ++ /** Disable VBUS */ ++ unsigned dis_vbus:1; ++ /** Line State Change */ ++ unsigned lnstschng:1; ++ /** Line state change mask */ ++ unsigned lnstchng_msk:1; ++ /** Reset Detected */ ++ unsigned rst_det:1; ++ /** Reset Detect mask */ ++ unsigned rst_det_msk:1; ++ /** Disconnect Detected */ ++ unsigned disconn_det:1; ++ /** Disconnect Detect mask */ ++ unsigned disconn_det_msk:1; ++ /** Connect Detected*/ ++ unsigned connect_det:1; ++ /** Connect Detected Mask*/ ++ unsigned connect_det_msk:1; ++ /** SRP Detected */ ++ unsigned srp_det:1; ++ /** SRP Detect mask */ ++ unsigned srp_det_msk:1; ++ /** Status Change Interrupt */ ++ unsigned sts_chngint:1; ++ /** Status Change Interrupt Mask */ ++ unsigned sts_chngint_msk:1; ++ /** Line State */ ++ unsigned linestate:2; ++ /** Indicates current mode(status of IDDIG signal) */ ++ unsigned idsts:1; ++ /** B Session Valid signal status*/ ++ unsigned bsessvld:1; ++ /** ADP Event Detected */ ++ unsigned adp_int:1; ++ /** Multi Valued ID pin */ ++ unsigned mult_val_id_bc:5; ++ /** Reserved 24_31 */ ++ unsigned reserved29_31:3; ++ } b; ++} gpwrdn_data_t; ++ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/Makefile 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,16 @@ ++ ++PERL=/usr/bin/perl ++PL_TESTS=test_sysfs.pl test_mod_param.pl ++ ++.PHONY : test ++test : perl_tests ++ ++perl_tests : ++ @echo ++ @echo Running perl tests ++ @for test in $(PL_TESTS); do \ ++ if $(PERL) ./$$test ; then \ ++ echo "=======> $$test, PASSED" ; \ ++ else echo "=======> $$test, FAILED" ; \ ++ fi \ ++ done +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/dwc_otg_test.pm +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/dwc_otg_test.pm 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,337 @@ ++package dwc_otg_test; ++ ++use strict; ++use Exporter (); ++ ++use vars qw(@ISA @EXPORT ++$sysfsdir $paramdir $errors $params ++); ++ ++@ISA = qw(Exporter); ++ ++# ++# Globals ++# ++$sysfsdir = "/sys/devices/lm0"; ++$paramdir = "/sys/module/dwc_otg"; ++$errors = 0; ++ ++$params = [ ++ { ++ NAME => "otg_cap", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 2 ++ }, ++ { ++ NAME => "dma_enable", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "dma_burst_size", ++ DEFAULT => 32, ++ ENUM => [1, 4, 8, 16, 32, 64, 128, 256], ++ LOW => 1, ++ HIGH => 256 ++ }, ++ { ++ NAME => "host_speed", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "host_support_fs_ls_low_power", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "host_ls_low_power_phy_clk", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "dev_speed", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "enable_dynamic_fifo", ++ DEFAULT => 1, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ { ++ NAME => "data_fifo_size", ++ DEFAULT => 8192, ++ ENUM => [], ++ LOW => 32, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "dev_rx_fifo_size", ++ DEFAULT => 1064, ++ ENUM => [], ++ LOW => 16, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "dev_nperio_tx_fifo_size", ++ DEFAULT => 1024, ++ ENUM => [], ++ LOW => 16, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_1", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_2", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_3", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_4", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_5", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_6", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_7", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_8", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_9", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_10", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_11", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_12", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_13", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_14", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "dev_perio_tx_fifo_size_15", ++ DEFAULT => 256, ++ ENUM => [], ++ LOW => 4, ++ HIGH => 768 ++ }, ++ { ++ NAME => "host_rx_fifo_size", ++ DEFAULT => 1024, ++ ENUM => [], ++ LOW => 16, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "host_nperio_tx_fifo_size", ++ DEFAULT => 1024, ++ ENUM => [], ++ LOW => 16, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "host_perio_tx_fifo_size", ++ DEFAULT => 1024, ++ ENUM => [], ++ LOW => 16, ++ HIGH => 32768 ++ }, ++ { ++ NAME => "max_transfer_size", ++ DEFAULT => 65535, ++ ENUM => [], ++ LOW => 2047, ++ HIGH => 65535 ++ }, ++ { ++ NAME => "max_packet_count", ++ DEFAULT => 511, ++ ENUM => [], ++ LOW => 15, ++ HIGH => 511 ++ }, ++ { ++ NAME => "host_channels", ++ DEFAULT => 12, ++ ENUM => [], ++ LOW => 1, ++ HIGH => 16 ++ }, ++ { ++ NAME => "dev_endpoints", ++ DEFAULT => 6, ++ ENUM => [], ++ LOW => 1, ++ HIGH => 15 ++ }, ++ { ++ NAME => "phy_type", ++ DEFAULT => 1, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 2 ++ }, ++ { ++ NAME => "phy_utmi_width", ++ DEFAULT => 16, ++ ENUM => [8, 16], ++ LOW => 8, ++ HIGH => 16 ++ }, ++ { ++ NAME => "phy_ulpi_ddr", ++ DEFAULT => 0, ++ ENUM => [], ++ LOW => 0, ++ HIGH => 1 ++ }, ++ ]; ++ ++ ++# ++# ++sub check_arch { ++ $_ = `uname -m`; ++ chomp; ++ unless (m/armv4tl/) { ++ warn "# \n# Can't execute on $_. Run on integrator platform.\n# \n"; ++ return 0; ++ } ++ return 1; ++} ++ ++# ++# ++sub load_module { ++ my $params = shift; ++ print "\nRemoving Module\n"; ++ system "rmmod dwc_otg"; ++ print "Loading Module\n"; ++ if ($params ne "") { ++ print "Module Parameters: $params\n"; ++ } ++ if (system("modprobe dwc_otg $params")) { ++ warn "Unable to load module\n"; ++ return 0; ++ } ++ return 1; ++} ++ ++# ++# ++sub test_status { ++ my $arg = shift; ++ ++ print "\n"; ++ ++ if (defined $arg) { ++ warn "WARNING: $arg\n"; ++ } ++ ++ if ($errors > 0) { ++ warn "TEST FAILED with $errors errors\n"; ++ return 0; ++ } else { ++ print "TEST PASSED\n"; ++ return 0 if (defined $arg); ++ } ++ return 1; ++} ++ ++# ++# ++@EXPORT = qw( ++$sysfsdir ++$paramdir ++$params ++$errors ++check_arch ++load_module ++test_status ++); ++ ++1; +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/test_mod_param.pl +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/test_mod_param.pl 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,133 @@ ++#!/usr/bin/perl -w ++# ++# Run this program on the integrator. ++# ++# - Tests module parameter default values. ++# - Tests setting of valid module parameter values via modprobe. ++# - Tests invalid module parameter values. ++# ----------------------------------------------------------------------------- ++use strict; ++use dwc_otg_test; ++ ++check_arch() or die; ++ ++# ++# ++sub test { ++ my ($param,$expected) = @_; ++ my $value = get($param); ++ ++ if ($value == $expected) { ++ print "$param = $value, okay\n"; ++ } ++ ++ else { ++ warn "ERROR: value of $param != $expected, $value\n"; ++ $errors ++; ++ } ++} ++ ++# ++# ++sub get { ++ my $param = shift; ++ my $tmp = `cat $paramdir/$param`; ++ chomp $tmp; ++ return $tmp; ++} ++ ++# ++# ++sub test_main { ++ ++ print "\nTesting Module Parameters\n"; ++ ++ load_module("") or die; ++ ++ # Test initial values ++ print "\nTesting Default Values\n"; ++ foreach (@{$params}) { ++ test ($_->{NAME}, $_->{DEFAULT}); ++ } ++ ++ # Test low value ++ print "\nTesting Low Value\n"; ++ my $cmd_params = ""; ++ foreach (@{$params}) { ++ $cmd_params = $cmd_params . "$_->{NAME}=$_->{LOW} "; ++ } ++ load_module($cmd_params) or die; ++ ++ foreach (@{$params}) { ++ test ($_->{NAME}, $_->{LOW}); ++ } ++ ++ # Test high value ++ print "\nTesting High Value\n"; ++ $cmd_params = ""; ++ foreach (@{$params}) { ++ $cmd_params = $cmd_params . "$_->{NAME}=$_->{HIGH} "; ++ } ++ load_module($cmd_params) or die; ++ ++ foreach (@{$params}) { ++ test ($_->{NAME}, $_->{HIGH}); ++ } ++ ++ # Test Enum ++ print "\nTesting Enumerated\n"; ++ foreach (@{$params}) { ++ if (defined $_->{ENUM}) { ++ my $value; ++ foreach $value (@{$_->{ENUM}}) { ++ $cmd_params = "$_->{NAME}=$value"; ++ load_module($cmd_params) or die; ++ test ($_->{NAME}, $value); ++ } ++ } ++ } ++ ++ # Test Invalid Values ++ print "\nTesting Invalid Values\n"; ++ $cmd_params = ""; ++ foreach (@{$params}) { ++ $cmd_params = $cmd_params . sprintf "$_->{NAME}=%d ", $_->{LOW}-1; ++ } ++ load_module($cmd_params) or die; ++ ++ foreach (@{$params}) { ++ test ($_->{NAME}, $_->{DEFAULT}); ++ } ++ ++ $cmd_params = ""; ++ foreach (@{$params}) { ++ $cmd_params = $cmd_params . sprintf "$_->{NAME}=%d ", $_->{HIGH}+1; ++ } ++ load_module($cmd_params) or die; ++ ++ foreach (@{$params}) { ++ test ($_->{NAME}, $_->{DEFAULT}); ++ } ++ ++ print "\nTesting Enumerated\n"; ++ foreach (@{$params}) { ++ if (defined $_->{ENUM}) { ++ my $value; ++ foreach $value (@{$_->{ENUM}}) { ++ $value = $value + 1; ++ $cmd_params = "$_->{NAME}=$value"; ++ load_module($cmd_params) or die; ++ test ($_->{NAME}, $_->{DEFAULT}); ++ $value = $value - 2; ++ $cmd_params = "$_->{NAME}=$value"; ++ load_module($cmd_params) or die; ++ test ($_->{NAME}, $_->{DEFAULT}); ++ } ++ } ++ } ++ ++ test_status() or die; ++} ++ ++test_main(); ++0; +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/test_sysfs.pl +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/test/test_sysfs.pl 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1,193 @@ ++#!/usr/bin/perl -w ++# ++# Run this program on the integrator ++# - Tests select sysfs attributes. ++# - Todo ... test more attributes, hnp/srp, buspower/bussuspend, etc. ++# ----------------------------------------------------------------------------- ++use strict; ++use dwc_otg_test; ++ ++check_arch() or die; ++ ++# ++# ++sub test { ++ my ($attr,$expected) = @_; ++ my $string = get($attr); ++ ++ if ($string eq $expected) { ++ printf("$attr = $string, okay\n"); ++ } ++ else { ++ warn "ERROR: value of $attr != $expected, $string\n"; ++ $errors ++; ++ } ++} ++ ++# ++# ++sub set { ++ my ($reg, $value) = @_; ++ system "echo $value > $sysfsdir/$reg"; ++} ++ ++# ++# ++sub get { ++ my $attr = shift; ++ my $string = `cat $sysfsdir/$attr`; ++ chomp $string; ++ if ($string =~ m/\s\=\s/) { ++ my $tmp; ++ ($tmp, $string) = split /\s=\s/, $string; ++ } ++ return $string; ++} ++ ++# ++# ++sub test_main { ++ print("\nTesting Sysfs Attributes\n"); ++ ++ load_module("") or die; ++ ++ # Test initial values of regoffset/regvalue/guid/gsnpsid ++ print("\nTesting Default Values\n"); ++ ++ test("regoffset", "0xffffffff"); ++ test("regvalue", "invalid offset"); ++ test("guid", "0x12345678"); # this will fail if it has been changed ++ test("gsnpsid", "0x4f54200a"); ++ ++ # Test operation of regoffset/regvalue ++ print("\nTesting regoffset\n"); ++ set('regoffset', '5a5a5a5a'); ++ test("regoffset", "0xffffffff"); ++ ++ set('regoffset', '0'); ++ test("regoffset", "0x00000000"); ++ ++ set('regoffset', '40000'); ++ test("regoffset", "0x00000000"); ++ ++ set('regoffset', '3ffff'); ++ test("regoffset", "0x0003ffff"); ++ ++ set('regoffset', '1'); ++ test("regoffset", "0x00000001"); ++ ++ print("\nTesting regvalue\n"); ++ set('regoffset', '3c'); ++ test("regvalue", "0x12345678"); ++ set('regvalue', '5a5a5a5a'); ++ test("regvalue", "0x5a5a5a5a"); ++ set('regvalue','a5a5a5a5'); ++ test("regvalue", "0xa5a5a5a5"); ++ set('guid','12345678'); ++ ++ # Test HNP Capable ++ print("\nTesting HNP Capable bit\n"); ++ set('hnpcapable', '1'); ++ test("hnpcapable", "0x1"); ++ set('hnpcapable','0'); ++ test("hnpcapable", "0x0"); ++ ++ set('regoffset','0c'); ++ ++ my $old = get('gusbcfg'); ++ print("setting hnpcapable\n"); ++ set('hnpcapable', '1'); ++ test("hnpcapable", "0x1"); ++ test('gusbcfg', sprintf "0x%08x", (oct ($old) | (1<<9))); ++ test('regvalue', sprintf "0x%08x", (oct ($old) | (1<<9))); ++ ++ $old = get('gusbcfg'); ++ print("clearing hnpcapable\n"); ++ set('hnpcapable', '0'); ++ test("hnpcapable", "0x0"); ++ test ('gusbcfg', sprintf "0x%08x", oct ($old) & (~(1<<9))); ++ test ('regvalue', sprintf "0x%08x", oct ($old) & (~(1<<9))); ++ ++ # Test SRP Capable ++ print("\nTesting SRP Capable bit\n"); ++ set('srpcapable', '1'); ++ test("srpcapable", "0x1"); ++ set('srpcapable','0'); ++ test("srpcapable", "0x0"); ++ ++ set('regoffset','0c'); ++ ++ $old = get('gusbcfg'); ++ print("setting srpcapable\n"); ++ set('srpcapable', '1'); ++ test("srpcapable", "0x1"); ++ test('gusbcfg', sprintf "0x%08x", (oct ($old) | (1<<8))); ++ test('regvalue', sprintf "0x%08x", (oct ($old) | (1<<8))); ++ ++ $old = get('gusbcfg'); ++ print("clearing srpcapable\n"); ++ set('srpcapable', '0'); ++ test("srpcapable", "0x0"); ++ test('gusbcfg', sprintf "0x%08x", oct ($old) & (~(1<<8))); ++ test('regvalue', sprintf "0x%08x", oct ($old) & (~(1<<8))); ++ ++ # Test GGPIO ++ print("\nTesting GGPIO\n"); ++ set('ggpio','5a5a5a5a'); ++ test('ggpio','0x5a5a0000'); ++ set('ggpio','a5a5a5a5'); ++ test('ggpio','0xa5a50000'); ++ set('ggpio','11110000'); ++ test('ggpio','0x11110000'); ++ set('ggpio','00001111'); ++ test('ggpio','0x00000000'); ++ ++ # Test DEVSPEED ++ print("\nTesting DEVSPEED\n"); ++ set('regoffset','800'); ++ $old = get('regvalue'); ++ set('devspeed','0'); ++ test('devspeed','0x0'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3))); ++ set('devspeed','1'); ++ test('devspeed','0x1'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3) | 1)); ++ set('devspeed','2'); ++ test('devspeed','0x2'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3) | 2)); ++ set('devspeed','3'); ++ test('devspeed','0x3'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3) | 3)); ++ set('devspeed','4'); ++ test('devspeed','0x0'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3))); ++ set('devspeed','5'); ++ test('devspeed','0x1'); ++ test('regvalue',sprintf("0x%08x", oct($old) & ~(0x3) | 1)); ++ ++ ++ # mode Returns the current mode:0 for device mode1 for host mode Read ++ # hnp Initiate the Host Negotiation Protocol. Read returns the status. Read/Write ++ # srp Initiate the Session Request Protocol. Read returns the status. Read/Write ++ # buspower Get or Set the Power State of the bus (0 - Off or 1 - On) Read/Write ++ # bussuspend Suspend the USB bus. Read/Write ++ # busconnected Get the connection status of the bus Read ++ ++ # gotgctl Get or set the Core Control Status Register. Read/Write ++ ## gusbcfg Get or set the Core USB Configuration Register Read/Write ++ # grxfsiz Get or set the Receive FIFO Size Register Read/Write ++ # gnptxfsiz Get or set the non-periodic Transmit Size Register Read/Write ++ # gpvndctl Get or set the PHY Vendor Control Register Read/Write ++ ## ggpio Get the value in the lower 16-bits of the General Purpose IO Register or Set the upper 16 bits. Read/Write ++ ## guid Get or set the value of the User ID Register Read/Write ++ ## gsnpsid Get the value of the Synopsys ID Regester Read ++ ## devspeed Get or set the device speed setting in the DCFG register Read/Write ++ # enumspeed Gets the device enumeration Speed. Read ++ # hptxfsiz Get the value of the Host Periodic Transmit FIFO Read ++ # hprt0 Get or Set the value in the Host Port Control and Status Register Read/Write ++ ++ test_status("TEST NYI") or die; ++} ++ ++test_main(); ++0; +Index: linux-3.10-3.10.11/dummy/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1572_a0b25b587dfcc4c6816b655fa452eb4b03d55e33.txt 2014-04-28 00:42:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.patch 2014-04-28 00:42:12.000000000 +0000 @@ -0,0 +1,433 @@ +commit 6f547e8f73eedc83fe224ef457ea55f48673776a +Author: popcornmix +Date: Wed May 1 19:54:32 2013 +0100 + + bcm2708 watchdog driver + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/watchdog/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/watchdog/Kconfig 2014-04-27 23:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/watchdog/Kconfig 2014-04-28 00:42:11.000000000 +0000 +@@ -391,6 +391,12 @@ + To compile this driver as a module, choose M here: the + module will be called retu_wdt. + ++config BCM2708_WDT ++ tristate "BCM2708 Watchdog" ++ depends on ARCH_BCM2708 ++ help ++ Enables BCM2708 watchdog support. ++ + # AVR32 Architecture + + config AT32AP700X_WDT +Index: linux-3.10-3.10.11/drivers/watchdog/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/watchdog/Makefile 2014-04-27 23:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/watchdog/Makefile 2014-04-28 00:42:11.000000000 +0000 +@@ -54,6 +54,7 @@ + obj-$(CONFIG_IMX2_WDT) += imx2_wdt.o + obj-$(CONFIG_UX500_WATCHDOG) += ux500_wdt.o + obj-$(CONFIG_RETU_WATCHDOG) += retu_wdt.o ++obj-$(CONFIG_BCM2708_WDT) += bcm2708_wdog.o + + # AVR32 Architecture + obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o +Index: linux-3.10-3.10.11/drivers/watchdog/bcm2708_wdog.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/watchdog/bcm2708_wdog.c 2014-04-28 00:42:11.000000000 +0000 +@@ -0,0 +1,385 @@ ++/* ++ * Broadcom BCM2708 watchdog driver. ++ * ++ * (c) Copyright 2010 Broadcom Europe Ltd ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ * ++ * BCM2708 watchdog driver. Loosely based on wdt driver. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#define SECS_TO_WDOG_TICKS(x) ((x) << 16) ++#define WDOG_TICKS_TO_SECS(x) ((x) >> 16) ++ ++static unsigned long wdog_is_open; ++static uint32_t wdog_ticks; /* Ticks to load into wdog timer */ ++static char expect_close; ++ ++/* ++ * Module parameters ++ */ ++ ++#define WD_TIMO 10 /* Default heartbeat = 60 seconds */ ++static int heartbeat = WD_TIMO; /* Heartbeat in seconds */ ++ ++module_param(heartbeat, int, 0); ++MODULE_PARM_DESC(heartbeat, ++ "Watchdog heartbeat in seconds. (0 < heartbeat < 65536, default=" ++ __MODULE_STRING(WD_TIMO) ")"); ++ ++static int nowayout = WATCHDOG_NOWAYOUT; ++module_param(nowayout, int, 0); ++MODULE_PARM_DESC(nowayout, ++ "Watchdog cannot be stopped once started (default=" ++ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); ++ ++static DEFINE_SPINLOCK(wdog_lock); ++ ++/** ++ * Start the watchdog driver. ++ */ ++ ++static int wdog_start(unsigned long timeout) ++{ ++ uint32_t cur; ++ unsigned long flags; ++ spin_lock_irqsave(&wdog_lock, flags); ++ ++ /* enable the watchdog */ ++ iowrite32(PM_PASSWORD | (timeout & PM_WDOG_TIME_SET), ++ __io_address(PM_WDOG)); ++ cur = ioread32(__io_address(PM_RSTC)); ++ iowrite32(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) | ++ PM_RSTC_WRCFG_FULL_RESET, __io_address(PM_RSTC)); ++ ++ spin_unlock_irqrestore(&wdog_lock, flags); ++ return 0; ++} ++ ++/** ++ * Stop the watchdog driver. ++ */ ++ ++static int wdog_stop(void) ++{ ++ iowrite32(PM_PASSWORD | PM_RSTC_RESET, __io_address(PM_RSTC)); ++ printk(KERN_INFO "watchdog stopped\n"); ++ return 0; ++} ++ ++/** ++ * Reload counter one with the watchdog heartbeat. We don't bother ++ * reloading the cascade counter. ++ */ ++ ++static void wdog_ping(void) ++{ ++ wdog_start(wdog_ticks); ++} ++ ++/** ++ * @t: the new heartbeat value that needs to be set. ++ * ++ * Set a new heartbeat value for the watchdog device. If the heartbeat ++ * value is incorrect we keep the old value and return -EINVAL. If ++ * successful we return 0. ++ */ ++ ++static int wdog_set_heartbeat(int t) ++{ ++ if (t < 1 || t > WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET)) ++ return -EINVAL; ++ ++ heartbeat = t; ++ wdog_ticks = SECS_TO_WDOG_TICKS(t); ++ return 0; ++} ++ ++/** ++ * @file: file handle to the watchdog ++ * @buf: buffer to write (unused as data does not matter here ++ * @count: count of bytes ++ * @ppos: pointer to the position to write. No seeks allowed ++ * ++ * A write to a watchdog device is defined as a keepalive signal. ++ * ++ * if 'nowayout' is set then normally a close() is ignored. But ++ * if you write 'V' first then the close() will stop the timer. ++ */ ++ ++static ssize_t wdog_write(struct file *file, const char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ if (count) { ++ if (!nowayout) { ++ size_t i; ++ ++ /* In case it was set long ago */ ++ expect_close = 0; ++ ++ for (i = 0; i != count; i++) { ++ char c; ++ if (get_user(c, buf + i)) ++ return -EFAULT; ++ if (c == 'V') ++ expect_close = 42; ++ } ++ } ++ wdog_ping(); ++ } ++ return count; ++} ++ ++static int wdog_get_status(void) ++{ ++ unsigned long flags; ++ int status = 0; ++ spin_lock_irqsave(&wdog_lock, flags); ++ /* FIXME: readback reset reason */ ++ spin_unlock_irqrestore(&wdog_lock, flags); ++ return status; ++} ++ ++static uint32_t wdog_get_remaining(void) ++{ ++ uint32_t ret = ioread32(__io_address(PM_WDOG)); ++ return ret & PM_WDOG_TIME_SET; ++} ++ ++/** ++ * @file: file handle to the device ++ * @cmd: watchdog command ++ * @arg: argument pointer ++ * ++ * The watchdog API defines a common set of functions for all watchdogs ++ * according to their available features. We only actually usefully support ++ * querying capabilities and current status. ++ */ ++ ++static long wdog_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ void __user *argp = (void __user *)arg; ++ int __user *p = argp; ++ int new_heartbeat; ++ int status; ++ int options; ++ uint32_t remaining; ++ ++ struct watchdog_info ident = { ++ .options = WDIOF_SETTIMEOUT| ++ WDIOF_MAGICCLOSE| ++ WDIOF_KEEPALIVEPING, ++ .firmware_version = 1, ++ .identity = "BCM2708", ++ }; ++ ++ switch (cmd) { ++ case WDIOC_GETSUPPORT: ++ return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; ++ case WDIOC_GETSTATUS: ++ status = wdog_get_status(); ++ return put_user(status, p); ++ case WDIOC_GETBOOTSTATUS: ++ return put_user(0, p); ++ case WDIOC_KEEPALIVE: ++ wdog_ping(); ++ return 0; ++ case WDIOC_SETTIMEOUT: ++ if (get_user(new_heartbeat, p)) ++ return -EFAULT; ++ if (wdog_set_heartbeat(new_heartbeat)) ++ return -EINVAL; ++ wdog_ping(); ++ /* Fall */ ++ case WDIOC_GETTIMEOUT: ++ return put_user(heartbeat, p); ++ case WDIOC_GETTIMELEFT: ++ remaining = WDOG_TICKS_TO_SECS(wdog_get_remaining()); ++ return put_user(remaining, p); ++ case WDIOC_SETOPTIONS: ++ if (get_user(options, p)) ++ return -EFAULT; ++ if (options & WDIOS_DISABLECARD) ++ wdog_stop(); ++ if (options & WDIOS_ENABLECARD) ++ wdog_start(wdog_ticks); ++ return 0; ++ default: ++ return -ENOTTY; ++ } ++} ++ ++/** ++ * @inode: inode of device ++ * @file: file handle to device ++ * ++ * The watchdog device has been opened. The watchdog device is single ++ * open and on opening we load the counters. ++ */ ++ ++static int wdog_open(struct inode *inode, struct file *file) ++{ ++ if (test_and_set_bit(0, &wdog_is_open)) ++ return -EBUSY; ++ /* ++ * Activate ++ */ ++ wdog_start(wdog_ticks); ++ return nonseekable_open(inode, file); ++} ++ ++/** ++ * @inode: inode to board ++ * @file: file handle to board ++ * ++ * The watchdog has a configurable API. There is a religious dispute ++ * between people who want their watchdog to be able to shut down and ++ * those who want to be sure if the watchdog manager dies the machine ++ * reboots. In the former case we disable the counters, in the latter ++ * case you have to open it again very soon. ++ */ ++ ++static int wdog_release(struct inode *inode, struct file *file) ++{ ++ if (expect_close == 42) { ++ wdog_stop(); ++ } else { ++ printk(KERN_CRIT ++ "wdt: WDT device closed unexpectedly. WDT will not stop!\n"); ++ wdog_ping(); ++ } ++ clear_bit(0, &wdog_is_open); ++ expect_close = 0; ++ return 0; ++} ++ ++/** ++ * @this: our notifier block ++ * @code: the event being reported ++ * @unused: unused ++ * ++ * Our notifier is called on system shutdowns. Turn the watchdog ++ * off so that it does not fire during the next reboot. ++ */ ++ ++static int wdog_notify_sys(struct notifier_block *this, unsigned long code, ++ void *unused) ++{ ++ if (code == SYS_DOWN || code == SYS_HALT) ++ wdog_stop(); ++ return NOTIFY_DONE; ++} ++ ++/* ++ * Kernel Interfaces ++ */ ++ ++ ++static const struct file_operations wdog_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .write = wdog_write, ++ .unlocked_ioctl = wdog_ioctl, ++ .open = wdog_open, ++ .release = wdog_release, ++}; ++ ++static struct miscdevice wdog_miscdev = { ++ .minor = WATCHDOG_MINOR, ++ .name = "watchdog", ++ .fops = &wdog_fops, ++}; ++ ++/* ++ * The WDT card needs to learn about soft shutdowns in order to ++ * turn the timebomb registers off. ++ */ ++ ++static struct notifier_block wdog_notifier = { ++ .notifier_call = wdog_notify_sys, ++}; ++ ++/** ++ * cleanup_module: ++ * ++ * Unload the watchdog. You cannot do this with any file handles open. ++ * If your watchdog is set to continue ticking on close and you unload ++ * it, well it keeps ticking. We won't get the interrupt but the board ++ * will not touch PC memory so all is fine. You just have to load a new ++ * module in 60 seconds or reboot. ++ */ ++ ++static void __exit wdog_exit(void) ++{ ++ misc_deregister(&wdog_miscdev); ++ unregister_reboot_notifier(&wdog_notifier); ++} ++ ++static int __init wdog_init(void) ++{ ++ int ret; ++ ++ /* Check that the heartbeat value is within it's range; ++ if not reset to the default */ ++ if (wdog_set_heartbeat(heartbeat)) { ++ wdog_set_heartbeat(WD_TIMO); ++ printk(KERN_INFO "bcm2708_wdog: heartbeat value must be " ++ "0 < heartbeat < %d, using %d\n", ++ WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET), ++ WD_TIMO); ++ } ++ ++ ret = register_reboot_notifier(&wdog_notifier); ++ if (ret) { ++ printk(KERN_ERR ++ "wdt: cannot register reboot notifier (err=%d)\n", ret); ++ goto out_reboot; ++ } ++ ++ ret = misc_register(&wdog_miscdev); ++ if (ret) { ++ printk(KERN_ERR ++ "wdt: cannot register miscdev on minor=%d (err=%d)\n", ++ WATCHDOG_MINOR, ret); ++ goto out_misc; ++ } ++ ++ printk(KERN_INFO "bcm2708 watchdog, heartbeat=%d sec (nowayout=%d)\n", ++ heartbeat, nowayout); ++ return 0; ++ ++out_misc: ++ unregister_reboot_notifier(&wdog_notifier); ++out_reboot: ++ return ret; ++} ++ ++module_init(wdog_init); ++module_exit(wdog_exit); ++ ++MODULE_AUTHOR("Luke Diamand"); ++MODULE_DESCRIPTION("Driver for BCM2708 watchdog"); ++MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); ++MODULE_ALIAS_MISCDEV(TEMP_MINOR); ++MODULE_LICENSE("GPL"); ++ +Index: linux-3.10-3.10.11/dummy/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1573_6f547e8f73eedc83fe224ef457ea55f48673776a.txt 2014-04-28 00:42:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.patch --- linux-3.10.11/debian/patches/rpi/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.patch 2014-04-28 00:42:13.000000000 +0000 @@ -0,0 +1,3037 @@ +commit 5ee582d3526b124b504d8dc353ced66b6c21ba00 +Author: popcornmix +Date: Wed May 1 19:55:09 2013 +0100 + + bcm2708 framebuffer driver + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/video/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/Kconfig 2014-04-27 23:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/Kconfig 2014-04-28 00:42:12.000000000 +0000 +@@ -310,6 +310,20 @@ + help + Support the Permedia2 FIFO disconnect feature. + ++config FB_BCM2708 ++ tristate "BCM2708 framebuffer support" ++ depends on FB && ARM ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ help ++ This framebuffer device driver is for the BCM2708 framebuffer. ++ ++ If you want to compile this as a module (=code which can be ++ inserted into and removed from the running kernel), say M ++ here and read . The module ++ will be called bcm2708_fb. ++ + config FB_ARMCLCD + tristate "ARM PrimeCell PL110 support" + depends on FB && ARM && ARM_AMBA +Index: linux-3.10-3.10.11/drivers/video/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/Makefile 2014-04-27 23:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/Makefile 2014-04-28 00:42:12.000000000 +0000 +@@ -98,6 +98,7 @@ + obj-$(CONFIG_FB_VOODOO1) += sstfb.o + obj-$(CONFIG_FB_ARMCLCD) += amba-clcd.o + obj-$(CONFIG_FB_GOLDFISH) += goldfishfb.o ++obj-$(CONFIG_FB_BCM2708) += bcm2708_fb.o + obj-$(CONFIG_FB_68328) += 68328fb.o + obj-$(CONFIG_FB_GBE) += gbefb.o + obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o +Index: linux-3.10-3.10.11/drivers/video/bcm2708_fb.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/bcm2708_fb.c 2014-04-28 00:42:12.000000000 +0000 +@@ -0,0 +1,491 @@ ++/* ++ * linux/drivers/video/bcm2708_fb.c ++ * ++ * Copyright (C) 2010 Broadcom ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive ++ * for more details. ++ * ++ * Broadcom simple framebuffer driver ++ * ++ * This file is derived from cirrusfb.c ++ * Copyright 1999-2001 Jeff Garzik ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++#include ++ ++#ifdef BCM2708_FB_DEBUG ++#define print_debug(fmt,...) pr_debug("%s:%s:%d: "fmt, MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) ++#else ++#define print_debug(fmt,...) ++#endif ++ ++/* This is limited to 16 characters when displayed by X startup */ ++static const char *bcm2708_name = "BCM2708 FB"; ++ ++#define DRIVER_NAME "bcm2708_fb" ++ ++/* this data structure describes each frame buffer device we find */ ++ ++struct fbinfo_s { ++ u32 xres, yres, xres_virtual, yres_virtual; ++ u32 pitch, bpp; ++ u32 xoffset, yoffset; ++ u32 base; ++ u32 screen_size; ++ u16 cmap[256]; ++}; ++ ++struct bcm2708_fb { ++ struct fb_info fb; ++ struct platform_device *dev; ++ struct fbinfo_s *info; ++ dma_addr_t dma; ++ u32 cmap[16]; ++}; ++ ++#define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) ++ ++static int bcm2708_fb_set_bitfields(struct fb_var_screeninfo *var) ++{ ++ int ret = 0; ++ ++ memset(&var->transp, 0, sizeof(var->transp)); ++ ++ var->red.msb_right = 0; ++ var->green.msb_right = 0; ++ var->blue.msb_right = 0; ++ ++ switch (var->bits_per_pixel) { ++ case 1: ++ case 2: ++ case 4: ++ case 8: ++ var->red.length = var->bits_per_pixel; ++ var->red.offset = 0; ++ var->green.length = var->bits_per_pixel; ++ var->green.offset = 0; ++ var->blue.length = var->bits_per_pixel; ++ var->blue.offset = 0; ++ break; ++ case 16: ++ var->red.length = 5; ++ var->blue.length = 5; ++ /* ++ * Green length can be 5 or 6 depending whether ++ * we're operating in RGB555 or RGB565 mode. ++ */ ++ if (var->green.length != 5 && var->green.length != 6) ++ var->green.length = 6; ++ break; ++ case 24: ++ var->red.length = 8; ++ var->blue.length = 8; ++ var->green.length = 8; ++ break; ++ case 32: ++ var->red.length = 8; ++ var->green.length = 8; ++ var->blue.length = 8; ++ var->transp.length = 8; ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ /* ++ * >= 16bpp displays have separate colour component bitfields ++ * encoded in the pixel data. Calculate their position from ++ * the bitfield length defined above. ++ */ ++ if (ret == 0 && var->bits_per_pixel >= 24) { ++ var->red.offset = 0; ++ var->green.offset = var->red.offset + var->red.length; ++ var->blue.offset = var->green.offset + var->green.length; ++ var->transp.offset = var->blue.offset + var->blue.length; ++ } else if (ret == 0 && var->bits_per_pixel >= 16) { ++ var->blue.offset = 0; ++ var->green.offset = var->blue.offset + var->blue.length; ++ var->red.offset = var->green.offset + var->green.length; ++ var->transp.offset = var->red.offset + var->red.length; ++ } ++ ++ return ret; ++} ++ ++static int bcm2708_fb_check_var(struct fb_var_screeninfo *var, ++ struct fb_info *info) ++{ ++ /* info input, var output */ ++ int yres; ++ ++ /* info input, var output */ ++ print_debug("bcm2708_fb_check_var info(%p) %dx%d (%dx%d), %d, %d\n", info, ++ info->var.xres, info->var.yres, info->var.xres_virtual, ++ info->var.yres_virtual, (int)info->screen_size, ++ info->var.bits_per_pixel); ++ print_debug("bcm2708_fb_check_var var(%p) %dx%d (%dx%d), %d\n", var, ++ var->xres, var->yres, var->xres_virtual, var->yres_virtual, ++ var->bits_per_pixel); ++ ++ if (!var->bits_per_pixel) ++ var->bits_per_pixel = 16; ++ ++ if (bcm2708_fb_set_bitfields(var) != 0) { ++ pr_err("bcm2708_fb_check_var: invalid bits_per_pixel %d\n", ++ var->bits_per_pixel); ++ return -EINVAL; ++ } ++ ++ ++ if (var->xres_virtual < var->xres) ++ var->xres_virtual = var->xres; ++ /* use highest possible virtual resolution */ ++ if (var->yres_virtual == -1) { ++ var->yres_virtual = 480; ++ ++ pr_err ++ ("bcm2708_fb_check_var: virtual resolution set to maximum of %dx%d\n", ++ var->xres_virtual, var->yres_virtual); ++ } ++ if (var->yres_virtual < var->yres) ++ var->yres_virtual = var->yres; ++ ++ if (var->xoffset < 0) ++ var->xoffset = 0; ++ if (var->yoffset < 0) ++ var->yoffset = 0; ++ ++ /* truncate xoffset and yoffset to maximum if too high */ ++ if (var->xoffset > var->xres_virtual - var->xres) ++ var->xoffset = var->xres_virtual - var->xres - 1; ++ if (var->yoffset > var->yres_virtual - var->yres) ++ var->yoffset = var->yres_virtual - var->yres - 1; ++ ++ yres = var->yres; ++ if (var->vmode & FB_VMODE_DOUBLE) ++ yres *= 2; ++ else if (var->vmode & FB_VMODE_INTERLACED) ++ yres = (yres + 1) / 2; ++ ++ if (yres > 1200) { ++ pr_err("bcm2708_fb_check_var: ERROR: VerticalTotal >= 1200; " ++ "special treatment required! (TODO)\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int bcm2708_fb_set_par(struct fb_info *info) ++{ ++ uint32_t val = 0; ++ struct bcm2708_fb *fb = to_bcm2708(info); ++ volatile struct fbinfo_s *fbinfo = fb->info; ++ fbinfo->xres = info->var.xres; ++ fbinfo->yres = info->var.yres; ++ fbinfo->xres_virtual = info->var.xres_virtual; ++ fbinfo->yres_virtual = info->var.yres_virtual; ++ fbinfo->bpp = info->var.bits_per_pixel; ++ fbinfo->xoffset = info->var.xoffset; ++ fbinfo->yoffset = info->var.yoffset; ++ fbinfo->base = 0; /* filled in by VC */ ++ fbinfo->pitch = 0; /* filled in by VC */ ++ ++ print_debug("bcm2708_fb_set_par info(%p) %dx%d (%dx%d), %d, %d\n", info, ++ info->var.xres, info->var.yres, info->var.xres_virtual, ++ info->var.yres_virtual, (int)info->screen_size, ++ info->var.bits_per_pixel); ++ ++ /* ensure last write to fbinfo is visible to GPU */ ++ wmb(); ++ ++ /* inform vc about new framebuffer */ ++ bcm_mailbox_write(MBOX_CHAN_FB, fb->dma); ++ ++ /* TODO: replace fb driver with vchiq version */ ++ /* wait for response */ ++ bcm_mailbox_read(MBOX_CHAN_FB, &val); ++ ++ /* ensure GPU writes are visible to us */ ++ rmb(); ++ ++ if (val == 0) { ++ fb->fb.fix.line_length = fbinfo->pitch; ++ ++ if (info->var.bits_per_pixel <= 8) ++ fb->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; ++ else ++ fb->fb.fix.visual = FB_VISUAL_TRUECOLOR; ++ ++ fb->fb.fix.smem_start = fbinfo->base; ++ fb->fb.fix.smem_len = fbinfo->pitch * fbinfo->yres_virtual; ++ fb->fb.screen_size = fbinfo->screen_size; ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ fb->fb.screen_base = ++ (void *)ioremap_wc(fb->fb.fix.smem_start, fb->fb.screen_size); ++ if (!fb->fb.screen_base) { ++ /* the console may currently be locked */ ++ console_trylock(); ++ console_unlock(); ++ ++ BUG(); /* what can we do here */ ++ } ++ } ++ print_debug ++ ("BCM2708FB: start = %p,%p width=%d, height=%d, bpp=%d, pitch=%d size=%d success=%d\n", ++ (void *)fb->fb.screen_base, (void *)fb->fb.fix.smem_start, ++ fbinfo->xres, fbinfo->yres, fbinfo->bpp, ++ fbinfo->pitch, (int)fb->fb.screen_size, val); ++ ++ return val; ++} ++ ++static inline u32 convert_bitfield(int val, struct fb_bitfield *bf) ++{ ++ unsigned int mask = (1 << bf->length) - 1; ++ ++ return (val >> (16 - bf->length) & mask) << bf->offset; ++} ++ ++ ++static int bcm2708_fb_setcolreg(unsigned int regno, unsigned int red, ++ unsigned int green, unsigned int blue, ++ unsigned int transp, struct fb_info *info) ++{ ++ struct bcm2708_fb *fb = to_bcm2708(info); ++ ++ /*print_debug("BCM2708FB: setcolreg %d:(%02x,%02x,%02x,%02x) %x\n", regno, red, green, blue, transp, fb->fb.fix.visual);*/ ++ if (fb->fb.var.bits_per_pixel <= 8) { ++ if (regno < 256) { ++ /* blue [0:4], green [5:10], red [11:15] */ ++ fb->info->cmap[regno] = ((red >> (16-5)) & 0x1f) << 11 | ++ ((green >> (16-6)) & 0x3f) << 5 | ++ ((blue >> (16-5)) & 0x1f) << 0; ++ } ++ /* Hack: we need to tell GPU the palette has changed, but currently bcm2708_fb_set_par takes noticable time when called for every (256) colour */ ++ /* So just call it for what looks like the last colour in a list for now. */ ++ if (regno == 15 || regno == 255) ++ bcm2708_fb_set_par(info); ++ } else if (regno < 16) { ++ fb->cmap[regno] = convert_bitfield(transp, &fb->fb.var.transp) | ++ convert_bitfield(blue, &fb->fb.var.blue) | ++ convert_bitfield(green, &fb->fb.var.green) | ++ convert_bitfield(red, &fb->fb.var.red); ++ } ++ return regno > 255; ++} ++ ++static int bcm2708_fb_blank(int blank_mode, struct fb_info *info) ++{ ++ /*print_debug("bcm2708_fb_blank\n"); */ ++ return -1; ++} ++ ++static void bcm2708_fb_fillrect(struct fb_info *info, ++ const struct fb_fillrect *rect) ++{ ++ /* (is called) print_debug("bcm2708_fb_fillrect\n"); */ ++ cfb_fillrect(info, rect); ++} ++ ++static void bcm2708_fb_copyarea(struct fb_info *info, ++ const struct fb_copyarea *region) ++{ ++ /*print_debug("bcm2708_fb_copyarea\n"); */ ++ cfb_copyarea(info, region); ++} ++ ++static void bcm2708_fb_imageblit(struct fb_info *info, ++ const struct fb_image *image) ++{ ++ /* (is called) print_debug("bcm2708_fb_imageblit\n"); */ ++ cfb_imageblit(info, image); ++} ++ ++static struct fb_ops bcm2708_fb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = bcm2708_fb_check_var, ++ .fb_set_par = bcm2708_fb_set_par, ++ .fb_setcolreg = bcm2708_fb_setcolreg, ++ .fb_blank = bcm2708_fb_blank, ++ .fb_fillrect = bcm2708_fb_fillrect, ++ .fb_copyarea = bcm2708_fb_copyarea, ++ .fb_imageblit = bcm2708_fb_imageblit, ++}; ++ ++static int fbwidth = 800; /* module parameter */ ++static int fbheight = 480; /* module parameter */ ++static int fbdepth = 16; /* module parameter */ ++ ++static int bcm2708_fb_register(struct bcm2708_fb *fb) ++{ ++ int ret; ++ dma_addr_t dma; ++ void *mem; ++ ++ mem = ++ dma_alloc_coherent(NULL, PAGE_ALIGN(sizeof(*fb->info)), &dma, ++ GFP_KERNEL); ++ ++ if (NULL == mem) { ++ pr_err(": unable to allocate fbinfo buffer\n"); ++ ret = -ENOMEM; ++ } else { ++ fb->info = (struct fbinfo_s *)mem; ++ fb->dma = dma; ++ } ++ fb->fb.fbops = &bcm2708_fb_ops; ++ fb->fb.flags = FBINFO_FLAG_DEFAULT; ++ fb->fb.pseudo_palette = fb->cmap; ++ ++ strncpy(fb->fb.fix.id, bcm2708_name, sizeof(fb->fb.fix.id)); ++ fb->fb.fix.type = FB_TYPE_PACKED_PIXELS; ++ fb->fb.fix.type_aux = 0; ++ fb->fb.fix.xpanstep = 0; ++ fb->fb.fix.ypanstep = 0; ++ fb->fb.fix.ywrapstep = 0; ++ fb->fb.fix.accel = FB_ACCEL_NONE; ++ ++ fb->fb.var.xres = fbwidth; ++ fb->fb.var.yres = fbheight; ++ fb->fb.var.xres_virtual = fbwidth; ++ fb->fb.var.yres_virtual = fbheight; ++ fb->fb.var.bits_per_pixel = fbdepth; ++ fb->fb.var.vmode = FB_VMODE_NONINTERLACED; ++ fb->fb.var.activate = FB_ACTIVATE_NOW; ++ fb->fb.var.nonstd = 0; ++ fb->fb.var.height = -1; /* height of picture in mm */ ++ fb->fb.var.width = -1; /* width of picture in mm */ ++ fb->fb.var.accel_flags = 0; ++ ++ fb->fb.monspecs.hfmin = 0; ++ fb->fb.monspecs.hfmax = 100000; ++ fb->fb.monspecs.vfmin = 0; ++ fb->fb.monspecs.vfmax = 400; ++ fb->fb.monspecs.dclkmin = 1000000; ++ fb->fb.monspecs.dclkmax = 100000000; ++ ++ bcm2708_fb_set_bitfields(&fb->fb.var); ++ ++ /* ++ * Allocate colourmap. ++ */ ++ ++ fb_set_var(&fb->fb, &fb->fb.var); ++ ++ print_debug("BCM2708FB: registering framebuffer (%dx%d@%d)\n", fbwidth, ++ fbheight, fbdepth); ++ ++ ret = register_framebuffer(&fb->fb); ++ print_debug("BCM2708FB: register framebuffer (%d)\n", ret); ++ if (ret == 0) ++ goto out; ++ ++ print_debug("BCM2708FB: cannot register framebuffer (%d)\n", ret); ++out: ++ return ret; ++} ++ ++static int bcm2708_fb_probe(struct platform_device *dev) ++{ ++ struct bcm2708_fb *fb; ++ int ret; ++ ++ fb = kmalloc(sizeof(struct bcm2708_fb), GFP_KERNEL); ++ if (!fb) { ++ dev_err(&dev->dev, ++ "could not allocate new bcm2708_fb struct\n"); ++ ret = -ENOMEM; ++ goto free_region; ++ } ++ memset(fb, 0, sizeof(struct bcm2708_fb)); ++ ++ fb->dev = dev; ++ ++ ret = bcm2708_fb_register(fb); ++ if (ret == 0) { ++ platform_set_drvdata(dev, fb); ++ goto out; ++ } ++ ++ kfree(fb); ++free_region: ++ dev_err(&dev->dev, "probe failed, err %d\n", ret); ++out: ++ return ret; ++} ++ ++static int bcm2708_fb_remove(struct platform_device *dev) ++{ ++ struct bcm2708_fb *fb = platform_get_drvdata(dev); ++ ++ platform_set_drvdata(dev, NULL); ++ ++ if (fb->fb.screen_base) ++ iounmap(fb->fb.screen_base); ++ unregister_framebuffer(&fb->fb); ++ ++ dma_free_coherent(NULL, PAGE_ALIGN(sizeof(*fb->info)), (void *)fb->info, ++ fb->dma); ++ kfree(fb); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm2708_fb_driver = { ++ .probe = bcm2708_fb_probe, ++ .remove = bcm2708_fb_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init bcm2708_fb_init(void) ++{ ++ return platform_driver_register(&bcm2708_fb_driver); ++} ++ ++module_init(bcm2708_fb_init); ++ ++static void __exit bcm2708_fb_exit(void) ++{ ++ platform_driver_unregister(&bcm2708_fb_driver); ++} ++ ++module_exit(bcm2708_fb_exit); ++ ++module_param(fbwidth, int, 0644); ++module_param(fbheight, int, 0644); ++module_param(fbdepth, int, 0644); ++ ++MODULE_DESCRIPTION("BCM2708 framebuffer driver"); ++MODULE_LICENSE("GPL"); ++ ++MODULE_PARM_DESC(fbwidth, "Width of ARM Framebuffer"); ++MODULE_PARM_DESC(fbheight, "Height of ARM Framebuffer"); ++MODULE_PARM_DESC(fbdepth, "Bit depth of ARM Framebuffer"); +Index: linux-3.10-3.10.11/drivers/video/logo/logo_linux_clut224.ppm +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/logo/logo_linux_clut224.ppm 2014-04-27 23:37:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/logo/logo_linux_clut224.ppm 2014-04-28 00:42:13.000000000 +0000 +@@ -1,1604 +1,883 @@ + P3 +-# Standard 224-color Linux logo +-80 80 ++63 80 + 255 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 6 6 6 10 10 10 10 10 10 +- 10 10 10 6 6 6 6 6 6 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 10 10 10 14 14 14 +- 22 22 22 26 26 26 30 30 30 34 34 34 +- 30 30 30 30 30 30 26 26 26 18 18 18 +- 14 14 14 10 10 10 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 14 14 14 26 26 26 42 42 42 +- 54 54 54 66 66 66 78 78 78 78 78 78 +- 78 78 78 74 74 74 66 66 66 54 54 54 +- 42 42 42 26 26 26 18 18 18 10 10 10 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 22 22 22 42 42 42 66 66 66 86 86 86 +- 66 66 66 38 38 38 38 38 38 22 22 22 +- 26 26 26 34 34 34 54 54 54 66 66 66 +- 86 86 86 70 70 70 46 46 46 26 26 26 +- 14 14 14 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 10 10 10 26 26 26 +- 50 50 50 82 82 82 58 58 58 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 6 6 6 54 54 54 86 86 86 66 66 66 +- 38 38 38 18 18 18 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 22 22 22 50 50 50 +- 78 78 78 34 34 34 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 6 6 6 70 70 70 +- 78 78 78 46 46 46 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 18 18 18 42 42 42 82 82 82 +- 26 26 26 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 14 14 14 +- 46 46 46 34 34 34 6 6 6 2 2 6 +- 42 42 42 78 78 78 42 42 42 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 0 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 10 10 10 30 30 30 66 66 66 58 58 58 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 26 26 26 +- 86 86 86 101 101 101 46 46 46 10 10 10 +- 2 2 6 58 58 58 70 70 70 34 34 34 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 14 14 14 42 42 42 86 86 86 10 10 10 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 30 30 30 +- 94 94 94 94 94 94 58 58 58 26 26 26 +- 2 2 6 6 6 6 78 78 78 54 54 54 +- 22 22 22 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 22 22 22 62 62 62 62 62 62 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 26 26 26 +- 54 54 54 38 38 38 18 18 18 10 10 10 +- 2 2 6 2 2 6 34 34 34 82 82 82 +- 38 38 38 14 14 14 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 30 30 30 78 78 78 30 30 30 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 10 10 10 +- 10 10 10 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 78 78 78 +- 50 50 50 18 18 18 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 38 38 38 86 86 86 14 14 14 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 54 54 54 +- 66 66 66 26 26 26 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 42 42 42 82 82 82 2 2 6 2 2 6 +- 2 2 6 6 6 6 10 10 10 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 6 6 6 +- 14 14 14 10 10 10 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 18 18 18 +- 82 82 82 34 34 34 10 10 10 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 46 46 46 86 86 86 2 2 6 2 2 6 +- 6 6 6 6 6 6 22 22 22 34 34 34 +- 6 6 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 18 18 18 34 34 34 +- 10 10 10 50 50 50 22 22 22 2 2 6 +- 2 2 6 2 2 6 2 2 6 10 10 10 +- 86 86 86 42 42 42 14 14 14 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 46 46 46 86 86 86 2 2 6 2 2 6 +- 38 38 38 116 116 116 94 94 94 22 22 22 +- 22 22 22 2 2 6 2 2 6 2 2 6 +- 14 14 14 86 86 86 138 138 138 162 162 162 +-154 154 154 38 38 38 26 26 26 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 86 86 86 46 46 46 14 14 14 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 46 46 46 86 86 86 2 2 6 14 14 14 +-134 134 134 198 198 198 195 195 195 116 116 116 +- 10 10 10 2 2 6 2 2 6 6 6 6 +-101 98 89 187 187 187 210 210 210 218 218 218 +-214 214 214 134 134 134 14 14 14 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 86 86 86 50 50 50 18 18 18 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 1 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 46 46 46 86 86 86 2 2 6 54 54 54 +-218 218 218 195 195 195 226 226 226 246 246 246 +- 58 58 58 2 2 6 2 2 6 30 30 30 +-210 210 210 253 253 253 174 174 174 123 123 123 +-221 221 221 234 234 234 74 74 74 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 70 70 70 58 58 58 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 46 46 46 82 82 82 2 2 6 106 106 106 +-170 170 170 26 26 26 86 86 86 226 226 226 +-123 123 123 10 10 10 14 14 14 46 46 46 +-231 231 231 190 190 190 6 6 6 70 70 70 +- 90 90 90 238 238 238 158 158 158 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 70 70 70 58 58 58 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 1 0 0 0 +- 0 0 1 0 0 1 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 42 42 42 86 86 86 6 6 6 116 116 116 +-106 106 106 6 6 6 70 70 70 149 149 149 +-128 128 128 18 18 18 38 38 38 54 54 54 +-221 221 221 106 106 106 2 2 6 14 14 14 +- 46 46 46 190 190 190 198 198 198 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 74 74 74 62 62 62 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 1 0 0 0 +- 0 0 1 0 0 0 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 42 42 42 94 94 94 14 14 14 101 101 101 +-128 128 128 2 2 6 18 18 18 116 116 116 +-118 98 46 121 92 8 121 92 8 98 78 10 +-162 162 162 106 106 106 2 2 6 2 2 6 +- 2 2 6 195 195 195 195 195 195 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 74 74 74 62 62 62 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 1 0 0 1 +- 0 0 1 0 0 0 0 0 1 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 38 38 38 90 90 90 14 14 14 58 58 58 +-210 210 210 26 26 26 54 38 6 154 114 10 +-226 170 11 236 186 11 225 175 15 184 144 12 +-215 174 15 175 146 61 37 26 9 2 2 6 +- 70 70 70 246 246 246 138 138 138 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 70 70 70 66 66 66 26 26 26 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 38 38 38 86 86 86 14 14 14 10 10 10 +-195 195 195 188 164 115 192 133 9 225 175 15 +-239 182 13 234 190 10 232 195 16 232 200 30 +-245 207 45 241 208 19 232 195 16 184 144 12 +-218 194 134 211 206 186 42 42 42 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 50 50 50 74 74 74 30 30 30 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 34 34 34 86 86 86 14 14 14 2 2 6 +-121 87 25 192 133 9 219 162 10 239 182 13 +-236 186 11 232 195 16 241 208 19 244 214 54 +-246 218 60 246 218 38 246 215 20 241 208 19 +-241 208 19 226 184 13 121 87 25 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 50 50 50 82 82 82 34 34 34 10 10 10 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 34 34 34 82 82 82 30 30 30 61 42 6 +-180 123 7 206 145 10 230 174 11 239 182 13 +-234 190 10 238 202 15 241 208 19 246 218 74 +-246 218 38 246 215 20 246 215 20 246 215 20 +-226 184 13 215 174 15 184 144 12 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 26 26 26 94 94 94 42 42 42 14 14 14 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 78 78 78 50 50 50 104 69 6 +-192 133 9 216 158 10 236 178 12 236 186 11 +-232 195 16 241 208 19 244 214 54 245 215 43 +-246 215 20 246 215 20 241 208 19 198 155 10 +-200 144 11 216 158 10 156 118 10 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 6 6 6 90 90 90 54 54 54 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 78 78 78 46 46 46 22 22 22 +-137 92 6 210 162 10 239 182 13 238 190 10 +-238 202 15 241 208 19 246 215 20 246 215 20 +-241 208 19 203 166 17 185 133 11 210 150 10 +-216 158 10 210 150 10 102 78 10 2 2 6 +- 6 6 6 54 54 54 14 14 14 2 2 6 +- 2 2 6 62 62 62 74 74 74 30 30 30 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 34 34 34 78 78 78 50 50 50 6 6 6 +- 94 70 30 139 102 15 190 146 13 226 184 13 +-232 200 30 232 195 16 215 174 15 190 146 13 +-168 122 10 192 133 9 210 150 10 213 154 11 +-202 150 34 182 157 106 101 98 89 2 2 6 +- 2 2 6 78 78 78 116 116 116 58 58 58 +- 2 2 6 22 22 22 90 90 90 46 46 46 +- 18 18 18 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 38 38 38 86 86 86 50 50 50 6 6 6 +-128 128 128 174 154 114 156 107 11 168 122 10 +-198 155 10 184 144 12 197 138 11 200 144 11 +-206 145 10 206 145 10 197 138 11 188 164 115 +-195 195 195 198 198 198 174 174 174 14 14 14 +- 2 2 6 22 22 22 116 116 116 116 116 116 +- 22 22 22 2 2 6 74 74 74 70 70 70 +- 30 30 30 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 50 50 50 101 101 101 26 26 26 10 10 10 +-138 138 138 190 190 190 174 154 114 156 107 11 +-197 138 11 200 144 11 197 138 11 192 133 9 +-180 123 7 190 142 34 190 178 144 187 187 187 +-202 202 202 221 221 221 214 214 214 66 66 66 +- 2 2 6 2 2 6 50 50 50 62 62 62 +- 6 6 6 2 2 6 10 10 10 90 90 90 +- 50 50 50 18 18 18 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 10 10 10 34 34 34 +- 74 74 74 74 74 74 2 2 6 6 6 6 +-144 144 144 198 198 198 190 190 190 178 166 146 +-154 121 60 156 107 11 156 107 11 168 124 44 +-174 154 114 187 187 187 190 190 190 210 210 210 +-246 246 246 253 253 253 253 253 253 182 182 182 +- 6 6 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 62 62 62 +- 74 74 74 34 34 34 14 14 14 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 10 10 10 22 22 22 54 54 54 +- 94 94 94 18 18 18 2 2 6 46 46 46 +-234 234 234 221 221 221 190 190 190 190 190 190 +-190 190 190 187 187 187 187 187 187 190 190 190 +-190 190 190 195 195 195 214 214 214 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +- 82 82 82 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 14 14 14 +- 86 86 86 54 54 54 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 18 18 18 46 46 46 90 90 90 +- 46 46 46 18 18 18 6 6 6 182 182 182 +-253 253 253 246 246 246 206 206 206 190 190 190 +-190 190 190 190 190 190 190 190 190 190 190 190 +-206 206 206 231 231 231 250 250 250 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-202 202 202 14 14 14 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 42 42 42 86 86 86 42 42 42 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 14 14 14 38 38 38 74 74 74 66 66 66 +- 2 2 6 6 6 6 90 90 90 250 250 250 +-253 253 253 253 253 253 238 238 238 198 198 198 +-190 190 190 190 190 190 195 195 195 221 221 221 +-246 246 246 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 82 82 82 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 78 78 78 70 70 70 34 34 34 +- 14 14 14 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 34 34 34 66 66 66 78 78 78 6 6 6 +- 2 2 6 18 18 18 218 218 218 253 253 253 +-253 253 253 253 253 253 253 253 253 246 246 246 +-226 226 226 231 231 231 246 246 246 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 178 178 178 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 18 18 18 90 90 90 62 62 62 +- 30 30 30 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 10 10 10 26 26 26 +- 58 58 58 90 90 90 18 18 18 2 2 6 +- 2 2 6 110 110 110 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-250 250 250 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 231 231 231 18 18 18 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 18 18 18 94 94 94 +- 54 54 54 26 26 26 10 10 10 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 22 22 22 50 50 50 +- 90 90 90 26 26 26 2 2 6 2 2 6 +- 14 14 14 195 195 195 250 250 250 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-250 250 250 242 242 242 54 54 54 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 38 38 38 +- 86 86 86 50 50 50 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 14 14 14 38 38 38 82 82 82 +- 34 34 34 2 2 6 2 2 6 2 2 6 +- 42 42 42 195 195 195 246 246 246 253 253 253 +-253 253 253 253 253 253 253 253 253 250 250 250 +-242 242 242 242 242 242 250 250 250 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 250 250 250 246 246 246 238 238 238 +-226 226 226 231 231 231 101 101 101 6 6 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 38 38 38 82 82 82 42 42 42 14 14 14 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 10 10 10 26 26 26 62 62 62 66 66 66 +- 2 2 6 2 2 6 2 2 6 6 6 6 +- 70 70 70 170 170 170 206 206 206 234 234 234 +-246 246 246 250 250 250 250 250 250 238 238 238 +-226 226 226 231 231 231 238 238 238 250 250 250 +-250 250 250 250 250 250 246 246 246 231 231 231 +-214 214 214 206 206 206 202 202 202 202 202 202 +-198 198 198 202 202 202 182 182 182 18 18 18 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 62 62 62 66 66 66 30 30 30 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 14 14 14 42 42 42 82 82 82 18 18 18 +- 2 2 6 2 2 6 2 2 6 10 10 10 +- 94 94 94 182 182 182 218 218 218 242 242 242 +-250 250 250 253 253 253 253 253 253 250 250 250 +-234 234 234 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 246 246 246 +-238 238 238 226 226 226 210 210 210 202 202 202 +-195 195 195 195 195 195 210 210 210 158 158 158 +- 6 6 6 14 14 14 50 50 50 14 14 14 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 6 6 6 86 86 86 46 46 46 +- 18 18 18 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 22 22 22 54 54 54 70 70 70 2 2 6 +- 2 2 6 10 10 10 2 2 6 22 22 22 +-166 166 166 231 231 231 250 250 250 253 253 253 +-253 253 253 253 253 253 253 253 253 250 250 250 +-242 242 242 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 246 246 246 +-231 231 231 206 206 206 198 198 198 226 226 226 +- 94 94 94 2 2 6 6 6 6 38 38 38 +- 30 30 30 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 62 62 62 66 66 66 +- 26 26 26 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 74 74 74 50 50 50 2 2 6 +- 26 26 26 26 26 26 2 2 6 106 106 106 +-238 238 238 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 246 246 246 218 218 218 202 202 202 +-210 210 210 14 14 14 2 2 6 2 2 6 +- 30 30 30 22 22 22 2 2 6 2 2 6 +- 2 2 6 2 2 6 18 18 18 86 86 86 +- 42 42 42 14 14 14 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 42 42 42 90 90 90 22 22 22 2 2 6 +- 42 42 42 2 2 6 18 18 18 218 218 218 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 250 250 250 221 221 221 +-218 218 218 101 101 101 2 2 6 14 14 14 +- 18 18 18 38 38 38 10 10 10 2 2 6 +- 2 2 6 2 2 6 2 2 6 78 78 78 +- 58 58 58 22 22 22 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 54 54 54 82 82 82 2 2 6 26 26 26 +- 22 22 22 2 2 6 123 123 123 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 250 250 250 +-238 238 238 198 198 198 6 6 6 38 38 38 +- 58 58 58 26 26 26 38 38 38 2 2 6 +- 2 2 6 2 2 6 2 2 6 46 46 46 +- 78 78 78 30 30 30 10 10 10 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 10 10 10 30 30 30 +- 74 74 74 58 58 58 2 2 6 42 42 42 +- 2 2 6 22 22 22 231 231 231 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 250 250 250 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 246 246 246 46 46 46 38 38 38 +- 42 42 42 14 14 14 38 38 38 14 14 14 +- 2 2 6 2 2 6 2 2 6 6 6 6 +- 86 86 86 46 46 46 14 14 14 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 14 14 14 42 42 42 +- 90 90 90 18 18 18 18 18 18 26 26 26 +- 2 2 6 116 116 116 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 250 250 250 238 238 238 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 94 94 94 6 6 6 +- 2 2 6 2 2 6 10 10 10 34 34 34 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 74 74 74 58 58 58 22 22 22 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 10 10 10 26 26 26 66 66 66 +- 82 82 82 2 2 6 38 38 38 6 6 6 +- 14 14 14 210 210 210 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 246 246 246 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 144 144 144 2 2 6 +- 2 2 6 2 2 6 2 2 6 46 46 46 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 42 42 42 74 74 74 30 30 30 10 10 10 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 14 14 14 42 42 42 90 90 90 +- 26 26 26 6 6 6 42 42 42 2 2 6 +- 74 74 74 250 250 250 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 242 242 242 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 182 182 182 2 2 6 +- 2 2 6 2 2 6 2 2 6 46 46 46 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 10 10 10 86 86 86 38 38 38 10 10 10 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 10 10 10 26 26 26 66 66 66 82 82 82 +- 2 2 6 22 22 22 18 18 18 2 2 6 +-149 149 149 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 234 234 234 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 206 206 206 2 2 6 +- 2 2 6 2 2 6 2 2 6 38 38 38 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 6 6 6 86 86 86 46 46 46 14 14 14 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 18 18 18 46 46 46 86 86 86 18 18 18 +- 2 2 6 34 34 34 10 10 10 6 6 6 +-210 210 210 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 234 234 234 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 221 221 221 6 6 6 +- 2 2 6 2 2 6 6 6 6 30 30 30 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 82 82 82 54 54 54 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 26 26 26 66 66 66 62 62 62 2 2 6 +- 2 2 6 38 38 38 10 10 10 26 26 26 +-238 238 238 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 238 238 238 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 6 6 6 +- 2 2 6 2 2 6 10 10 10 30 30 30 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 66 66 66 58 58 58 22 22 22 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 38 38 38 78 78 78 6 6 6 2 2 6 +- 2 2 6 46 46 46 14 14 14 42 42 42 +-246 246 246 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 234 234 234 10 10 10 +- 2 2 6 2 2 6 22 22 22 14 14 14 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 66 66 66 62 62 62 22 22 22 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 50 50 50 74 74 74 2 2 6 2 2 6 +- 14 14 14 70 70 70 34 34 34 62 62 62 +-250 250 250 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 246 246 246 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 234 234 234 14 14 14 +- 2 2 6 2 2 6 30 30 30 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 66 66 66 62 62 62 22 22 22 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 54 54 54 62 62 62 2 2 6 2 2 6 +- 2 2 6 30 30 30 46 46 46 70 70 70 +-250 250 250 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 246 246 246 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 226 226 226 10 10 10 +- 2 2 6 6 6 6 30 30 30 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 66 66 66 58 58 58 22 22 22 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 22 22 22 +- 58 58 58 62 62 62 2 2 6 2 2 6 +- 2 2 6 2 2 6 30 30 30 78 78 78 +-250 250 250 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 246 246 246 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 206 206 206 2 2 6 +- 22 22 22 34 34 34 18 14 6 22 22 22 +- 26 26 26 18 18 18 6 6 6 2 2 6 +- 2 2 6 82 82 82 54 54 54 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 26 26 26 +- 62 62 62 106 106 106 74 54 14 185 133 11 +-210 162 10 121 92 8 6 6 6 62 62 62 +-238 238 238 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 246 246 246 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 158 158 158 18 18 18 +- 14 14 14 2 2 6 2 2 6 2 2 6 +- 6 6 6 18 18 18 66 66 66 38 38 38 +- 6 6 6 94 94 94 50 50 50 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 10 10 10 10 10 10 18 18 18 38 38 38 +- 78 78 78 142 134 106 216 158 10 242 186 14 +-246 190 14 246 190 14 156 118 10 10 10 10 +- 90 90 90 238 238 238 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 250 250 250 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 246 230 190 +-238 204 91 238 204 91 181 142 44 37 26 9 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 38 38 38 46 46 46 +- 26 26 26 106 106 106 54 54 54 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 14 14 14 22 22 22 +- 30 30 30 38 38 38 50 50 50 70 70 70 +-106 106 106 190 142 34 226 170 11 242 186 14 +-246 190 14 246 190 14 246 190 14 154 114 10 +- 6 6 6 74 74 74 226 226 226 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 231 231 231 250 250 250 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 228 184 62 +-241 196 14 241 208 19 232 195 16 38 30 10 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 6 6 6 30 30 30 26 26 26 +-203 166 17 154 142 90 66 66 66 26 26 26 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 18 18 18 38 38 38 58 58 58 +- 78 78 78 86 86 86 101 101 101 123 123 123 +-175 146 61 210 150 10 234 174 13 246 186 14 +-246 190 14 246 190 14 246 190 14 238 190 10 +-102 78 10 2 2 6 46 46 46 198 198 198 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 234 234 234 242 242 242 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 224 178 62 +-242 186 14 241 196 14 210 166 10 22 18 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 6 6 6 121 92 8 +-238 202 15 232 195 16 82 82 82 34 34 34 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 14 14 14 38 38 38 70 70 70 154 122 46 +-190 142 34 200 144 11 197 138 11 197 138 11 +-213 154 11 226 170 11 242 186 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-225 175 15 46 32 6 2 2 6 22 22 22 +-158 158 158 250 250 250 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 250 250 250 242 242 242 224 178 62 +-239 182 13 236 186 11 213 154 11 46 32 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 61 42 6 225 175 15 +-238 190 10 236 186 11 112 100 78 42 42 42 +- 14 14 14 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 22 22 22 54 54 54 154 122 46 213 154 11 +-226 170 11 230 174 11 226 170 11 226 170 11 +-236 178 12 242 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-241 196 14 184 144 12 10 10 10 2 2 6 +- 6 6 6 116 116 116 242 242 242 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 231 231 231 198 198 198 214 170 54 +-236 178 12 236 178 12 210 150 10 137 92 6 +- 18 14 6 2 2 6 2 2 6 2 2 6 +- 6 6 6 70 47 6 200 144 11 236 178 12 +-239 182 13 239 182 13 124 112 88 58 58 58 +- 22 22 22 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 70 70 70 180 133 36 226 170 11 +-239 182 13 242 186 14 242 186 14 246 186 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 232 195 16 98 70 6 2 2 6 +- 2 2 6 2 2 6 66 66 66 221 221 221 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 206 206 206 198 198 198 214 166 58 +-230 174 11 230 174 11 216 158 10 192 133 9 +-163 110 8 116 81 8 102 78 10 116 81 8 +-167 114 7 197 138 11 226 170 11 239 182 13 +-242 186 14 242 186 14 162 146 94 78 78 78 +- 34 34 34 14 14 14 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 30 30 30 78 78 78 190 142 34 226 170 11 +-239 182 13 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 241 196 14 203 166 17 22 18 6 +- 2 2 6 2 2 6 2 2 6 38 38 38 +-218 218 218 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-250 250 250 206 206 206 198 198 198 202 162 69 +-226 170 11 236 178 12 224 166 10 210 150 10 +-200 144 11 197 138 11 192 133 9 197 138 11 +-210 150 10 226 170 11 242 186 14 246 190 14 +-246 190 14 246 186 14 225 175 15 124 112 88 +- 62 62 62 30 30 30 14 14 14 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 78 78 78 174 135 50 224 166 10 +-239 182 13 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 241 196 14 139 102 15 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 78 78 78 250 250 250 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-250 250 250 214 214 214 198 198 198 190 150 46 +-219 162 10 236 178 12 234 174 13 224 166 10 +-216 158 10 213 154 11 213 154 11 216 158 10 +-226 170 11 239 182 13 246 190 14 246 190 14 +-246 190 14 246 190 14 242 186 14 206 162 42 +-101 101 101 58 58 58 30 30 30 14 14 14 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 74 74 74 174 135 50 216 158 10 +-236 178 12 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 241 196 14 226 184 13 +- 61 42 6 2 2 6 2 2 6 2 2 6 +- 22 22 22 238 238 238 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 226 226 226 187 187 187 180 133 36 +-216 158 10 236 178 12 239 182 13 236 178 12 +-230 174 11 226 170 11 226 170 11 230 174 11 +-236 178 12 242 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 186 14 239 182 13 +-206 162 42 106 106 106 66 66 66 34 34 34 +- 14 14 14 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 26 26 26 70 70 70 163 133 67 213 154 11 +-236 178 12 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 241 196 14 +-190 146 13 18 14 6 2 2 6 2 2 6 +- 46 46 46 246 246 246 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 221 221 221 86 86 86 156 107 11 +-216 158 10 236 178 12 242 186 14 246 186 14 +-242 186 14 239 182 13 239 182 13 242 186 14 +-242 186 14 246 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-242 186 14 225 175 15 142 122 72 66 66 66 +- 30 30 30 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 26 26 26 70 70 70 163 133 67 210 150 10 +-236 178 12 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-232 195 16 121 92 8 34 34 34 106 106 106 +-221 221 221 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-242 242 242 82 82 82 18 14 6 163 110 8 +-216 158 10 236 178 12 242 186 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 242 186 14 163 133 67 +- 46 46 46 18 18 18 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 10 10 10 +- 30 30 30 78 78 78 163 133 67 210 150 10 +-236 178 12 246 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-241 196 14 215 174 15 190 178 144 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 218 218 218 +- 58 58 58 2 2 6 22 18 6 167 114 7 +-216 158 10 236 178 12 246 186 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 186 14 242 186 14 190 150 46 +- 54 54 54 22 22 22 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 38 38 38 86 86 86 180 133 36 213 154 11 +-236 178 12 246 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 232 195 16 190 146 13 214 214 214 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 250 250 250 170 170 170 26 26 26 +- 2 2 6 2 2 6 37 26 9 163 110 8 +-219 162 10 239 182 13 246 186 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 186 14 236 178 12 224 166 10 142 122 72 +- 46 46 46 18 18 18 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 50 50 50 109 106 95 192 133 9 224 166 10 +-242 186 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-242 186 14 226 184 13 210 162 10 142 110 46 +-226 226 226 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-253 253 253 253 253 253 253 253 253 253 253 253 +-198 198 198 66 66 66 2 2 6 2 2 6 +- 2 2 6 2 2 6 50 34 6 156 107 11 +-219 162 10 239 182 13 246 186 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 242 186 14 +-234 174 13 213 154 11 154 122 46 66 66 66 +- 30 30 30 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 22 22 22 +- 58 58 58 154 121 60 206 145 10 234 174 13 +-242 186 14 246 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 186 14 236 178 12 210 162 10 163 110 8 +- 61 42 6 138 138 138 218 218 218 250 250 250 +-253 253 253 253 253 253 253 253 253 250 250 250 +-242 242 242 210 210 210 144 144 144 66 66 66 +- 6 6 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 61 42 6 163 110 8 +-216 158 10 236 178 12 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 239 182 13 230 174 11 216 158 10 +-190 142 34 124 112 88 70 70 70 38 38 38 +- 18 18 18 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 22 22 22 +- 62 62 62 168 124 44 206 145 10 224 166 10 +-236 178 12 239 182 13 242 186 14 242 186 14 +-246 186 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 236 178 12 216 158 10 175 118 6 +- 80 54 7 2 2 6 6 6 6 30 30 30 +- 54 54 54 62 62 62 50 50 50 38 38 38 +- 14 14 14 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 6 6 6 80 54 7 167 114 7 +-213 154 11 236 178 12 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 190 14 242 186 14 239 182 13 239 182 13 +-230 174 11 210 150 10 174 135 50 124 112 88 +- 82 82 82 54 54 54 34 34 34 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 18 18 18 +- 50 50 50 158 118 36 192 133 9 200 144 11 +-216 158 10 219 162 10 224 166 10 226 170 11 +-230 174 11 236 178 12 239 182 13 239 182 13 +-242 186 14 246 186 14 246 190 14 246 190 14 +-246 190 14 246 190 14 246 190 14 246 190 14 +-246 186 14 230 174 11 210 150 10 163 110 8 +-104 69 6 10 10 10 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 6 6 6 91 60 6 167 114 7 +-206 145 10 230 174 11 242 186 14 246 190 14 +-246 190 14 246 190 14 246 186 14 242 186 14 +-239 182 13 230 174 11 224 166 10 213 154 11 +-180 133 36 124 112 88 86 86 86 58 58 58 +- 38 38 38 22 22 22 10 10 10 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 14 14 14 +- 34 34 34 70 70 70 138 110 50 158 118 36 +-167 114 7 180 123 7 192 133 9 197 138 11 +-200 144 11 206 145 10 213 154 11 219 162 10 +-224 166 10 230 174 11 239 182 13 242 186 14 +-246 186 14 246 186 14 246 186 14 246 186 14 +-239 182 13 216 158 10 185 133 11 152 99 6 +-104 69 6 18 14 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 2 2 6 2 2 6 2 2 6 +- 2 2 6 6 6 6 80 54 7 152 99 6 +-192 133 9 219 162 10 236 178 12 239 182 13 +-246 186 14 242 186 14 239 182 13 236 178 12 +-224 166 10 206 145 10 192 133 9 154 121 60 +- 94 94 94 62 62 62 42 42 42 22 22 22 +- 14 14 14 6 6 6 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 18 18 18 34 34 34 58 58 58 78 78 78 +-101 98 89 124 112 88 142 110 46 156 107 11 +-163 110 8 167 114 7 175 118 6 180 123 7 +-185 133 11 197 138 11 210 150 10 219 162 10 +-226 170 11 236 178 12 236 178 12 234 174 13 +-219 162 10 197 138 11 163 110 8 130 83 6 +- 91 60 6 10 10 10 2 2 6 2 2 6 +- 18 18 18 38 38 38 38 38 38 38 38 38 +- 38 38 38 38 38 38 38 38 38 38 38 38 +- 38 38 38 38 38 38 26 26 26 2 2 6 +- 2 2 6 6 6 6 70 47 6 137 92 6 +-175 118 6 200 144 11 219 162 10 230 174 11 +-234 174 13 230 174 11 219 162 10 210 150 10 +-192 133 9 163 110 8 124 112 88 82 82 82 +- 50 50 50 30 30 30 14 14 14 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 14 14 14 22 22 22 34 34 34 +- 42 42 42 58 58 58 74 74 74 86 86 86 +-101 98 89 122 102 70 130 98 46 121 87 25 +-137 92 6 152 99 6 163 110 8 180 123 7 +-185 133 11 197 138 11 206 145 10 200 144 11 +-180 123 7 156 107 11 130 83 6 104 69 6 +- 50 34 6 54 54 54 110 110 110 101 98 89 +- 86 86 86 82 82 82 78 78 78 78 78 78 +- 78 78 78 78 78 78 78 78 78 78 78 78 +- 78 78 78 82 82 82 86 86 86 94 94 94 +-106 106 106 101 101 101 86 66 34 124 80 6 +-156 107 11 180 123 7 192 133 9 200 144 11 +-206 145 10 200 144 11 192 133 9 175 118 6 +-139 102 15 109 106 95 70 70 70 42 42 42 +- 22 22 22 10 10 10 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 6 6 6 10 10 10 +- 14 14 14 22 22 22 30 30 30 38 38 38 +- 50 50 50 62 62 62 74 74 74 90 90 90 +-101 98 89 112 100 78 121 87 25 124 80 6 +-137 92 6 152 99 6 152 99 6 152 99 6 +-138 86 6 124 80 6 98 70 6 86 66 30 +-101 98 89 82 82 82 58 58 58 46 46 46 +- 38 38 38 34 34 34 34 34 34 34 34 34 +- 34 34 34 34 34 34 34 34 34 34 34 34 +- 34 34 34 34 34 34 38 38 38 42 42 42 +- 54 54 54 82 82 82 94 86 76 91 60 6 +-134 86 6 156 107 11 167 114 7 175 118 6 +-175 118 6 167 114 7 152 99 6 121 87 25 +-101 98 89 62 62 62 34 34 34 18 18 18 +- 6 6 6 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 6 6 6 10 10 10 +- 18 18 18 22 22 22 30 30 30 42 42 42 +- 50 50 50 66 66 66 86 86 86 101 98 89 +-106 86 58 98 70 6 104 69 6 104 69 6 +-104 69 6 91 60 6 82 62 34 90 90 90 +- 62 62 62 38 38 38 22 22 22 14 14 14 +- 10 10 10 10 10 10 10 10 10 10 10 10 +- 10 10 10 10 10 10 6 6 6 10 10 10 +- 10 10 10 10 10 10 10 10 10 14 14 14 +- 22 22 22 42 42 42 70 70 70 89 81 66 +- 80 54 7 104 69 6 124 80 6 137 92 6 +-134 86 6 116 81 8 100 82 52 86 86 86 +- 58 58 58 30 30 30 14 14 14 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 10 10 10 14 14 14 +- 18 18 18 26 26 26 38 38 38 54 54 54 +- 70 70 70 86 86 86 94 86 76 89 81 66 +- 89 81 66 86 86 86 74 74 74 50 50 50 +- 30 30 30 14 14 14 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 18 18 18 34 34 34 58 58 58 +- 82 82 82 89 81 66 89 81 66 89 81 66 +- 94 86 66 94 86 76 74 74 74 50 50 50 +- 26 26 26 14 14 14 6 6 6 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 6 6 6 6 6 6 14 14 14 18 18 18 +- 30 30 30 38 38 38 46 46 46 54 54 54 +- 50 50 50 42 42 42 30 30 30 18 18 18 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 6 6 6 14 14 14 26 26 26 +- 38 38 38 50 50 50 58 58 58 58 58 58 +- 54 54 54 42 42 42 30 30 30 18 18 18 +- 10 10 10 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 6 6 6 10 10 10 14 14 14 18 18 18 +- 18 18 18 14 14 14 10 10 10 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 6 6 6 +- 14 14 14 18 18 18 22 22 22 22 22 22 +- 18 18 18 14 14 14 10 10 10 6 6 6 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 +- 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 1 0 ++0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 ++0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 ++10 15 3 2 3 1 12 18 4 42 61 14 19 27 6 11 16 4 ++38 55 13 10 15 3 3 4 1 10 15 3 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 3 1 ++12 18 4 1 1 0 23 34 8 31 45 11 10 15 3 32 47 11 ++34 49 12 3 4 1 3 4 1 3 4 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 10 15 3 29 42 10 26 37 9 12 18 4 ++55 80 19 81 118 28 55 80 19 92 132 31 106 153 36 69 100 23 ++100 144 34 80 116 27 42 61 14 81 118 28 23 34 8 27 40 9 ++15 21 5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 1 1 0 29 42 10 15 21 5 50 72 17 ++74 107 25 45 64 15 102 148 35 80 116 27 84 121 28 111 160 38 ++69 100 23 65 94 22 81 118 28 29 42 10 17 25 6 29 42 10 ++23 34 8 2 3 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 1 ++15 21 5 15 21 5 34 49 12 101 146 34 111 161 38 97 141 33 ++97 141 33 119 172 41 117 170 40 116 167 40 118 170 40 118 171 40 ++117 169 40 118 170 40 111 160 38 118 170 40 96 138 32 89 128 30 ++81 118 28 11 16 4 10 15 3 1 1 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++3 4 1 3 4 1 34 49 12 101 146 34 79 115 27 111 160 38 ++114 165 39 113 163 39 118 170 40 117 169 40 118 171 40 117 169 40 ++116 167 40 119 172 41 113 163 39 92 132 31 105 151 36 113 163 39 ++75 109 26 19 27 6 16 23 5 11 16 4 0 1 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 15 3 ++80 116 27 106 153 36 105 151 36 114 165 39 118 170 40 118 171 40 ++118 171 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 170 40 117 169 40 118 170 40 118 170 40 ++117 170 40 75 109 26 75 109 26 34 49 12 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 4 1 ++64 92 22 65 94 22 100 144 34 118 171 40 118 170 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 118 171 41 118 170 40 117 169 40 ++109 158 37 105 151 36 104 150 35 47 69 16 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++42 61 14 115 167 39 118 170 40 117 169 40 117 169 40 117 169 40 ++117 170 40 117 170 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 118 170 40 96 138 32 17 25 6 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 47 69 16 ++114 165 39 117 168 40 117 170 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 118 170 40 117 169 40 117 169 40 117 169 40 ++117 170 40 119 172 41 96 138 32 12 18 4 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 15 3 ++32 47 11 105 151 36 118 170 40 117 169 40 117 169 40 116 168 40 ++109 157 37 111 160 38 117 169 40 118 171 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 118 171 40 69 100 23 2 3 1 ++0 0 0 0 0 0 0 0 0 0 0 0 19 27 6 101 146 34 ++118 171 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 170 40 ++118 171 40 115 166 39 107 154 36 111 161 38 117 169 40 117 169 40 ++117 169 40 118 171 40 75 109 26 19 27 6 2 3 1 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 16 23 5 ++89 128 30 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++111 160 38 92 132 31 79 115 27 96 138 32 115 166 39 119 171 41 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 118 170 40 109 157 37 26 37 9 ++0 0 0 0 0 0 0 0 0 0 0 0 64 92 22 118 171 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 118 170 40 118 171 40 109 157 37 ++89 128 30 81 118 28 100 144 34 115 166 39 117 169 40 117 169 40 ++117 169 40 117 170 40 113 163 39 60 86 20 1 1 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++27 40 9 96 138 32 118 170 40 117 169 40 117 169 40 117 169 40 ++117 170 40 117 169 40 101 146 34 67 96 23 55 80 19 84 121 28 ++113 163 39 119 171 41 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 119 171 41 65 94 22 ++0 0 0 0 0 0 0 0 0 15 21 5 101 146 34 118 171 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 118 170 40 118 171 40 104 150 35 69 100 23 53 76 18 ++81 118 28 111 160 38 118 170 40 117 169 40 117 169 40 117 169 40 ++117 169 40 114 165 39 69 100 23 10 15 3 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 ++31 45 11 77 111 26 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 118 170 40 116 168 40 92 132 31 47 69 16 ++38 55 13 81 118 28 113 163 39 119 171 41 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 118 171 41 92 132 31 ++10 15 3 0 0 0 0 0 0 36 52 12 115 166 39 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 118 170 40 ++118 171 40 102 148 35 64 92 22 34 49 12 65 94 22 106 153 36 ++118 171 40 117 170 40 117 169 40 117 169 40 117 169 40 117 169 40 ++118 170 40 107 154 36 55 80 19 15 21 5 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++29 42 10 101 146 34 118 171 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 118 171 40 113 163 39 ++75 109 26 27 40 9 36 52 12 89 128 30 116 167 40 118 171 40 ++117 169 40 117 169 40 117 169 40 117 169 40 118 170 40 104 150 35 ++16 23 5 0 0 0 0 0 0 53 76 18 118 171 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 119 171 41 109 157 37 ++67 96 23 23 34 8 42 61 14 96 138 32 118 170 40 118 170 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 74 107 25 10 15 3 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 31 45 11 101 146 34 118 170 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++119 171 41 102 148 35 47 69 16 14 20 5 50 72 17 102 148 35 ++118 171 40 117 169 40 117 169 40 117 169 40 118 170 40 102 148 35 ++15 21 5 0 0 0 0 0 0 50 72 17 118 170 40 117 169 40 ++117 169 40 117 169 40 118 170 40 116 167 40 84 121 28 27 40 9 ++19 27 6 74 107 25 114 165 39 118 171 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 75 109 26 10 15 4 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 38 55 13 102 148 35 118 171 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 118 170 40 115 167 39 77 111 26 17 25 6 19 27 6 ++77 111 26 115 166 39 118 170 40 117 169 40 119 172 41 81 118 28 ++3 4 1 0 0 0 0 0 0 27 40 9 111 160 38 118 170 40 ++117 169 40 118 171 40 105 151 36 50 72 17 10 15 3 38 55 13 ++100 144 34 118 171 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 79 115 27 15 21 5 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 10 15 3 64 92 22 111 160 38 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 118 171 40 96 138 32 32 47 11 ++3 4 1 50 72 17 107 154 36 120 173 41 105 151 36 31 45 11 ++0 0 0 0 0 0 0 0 0 3 4 1 65 94 22 117 169 40 ++118 170 40 89 128 30 26 37 9 3 4 1 60 86 20 111 161 38 ++118 171 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++97 141 33 36 52 12 1 1 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 14 20 5 75 109 26 117 168 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 118 171 40 107 154 36 ++45 64 15 2 3 1 31 45 11 75 109 26 32 47 11 0 1 0 ++0 0 0 0 0 0 0 0 0 0 0 0 10 15 3 55 80 19 ++65 94 22 11 16 4 11 16 4 75 109 26 116 168 40 118 170 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 118 170 40 107 154 36 ++47 69 16 3 4 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 12 18 4 69 100 23 111 161 38 118 171 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 118 170 40 ++111 160 38 50 72 17 2 3 1 2 3 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 ++1 1 0 12 18 4 81 118 28 118 170 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 170 40 118 171 40 101 146 34 ++42 61 14 2 3 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 3 4 1 36 52 12 89 128 30 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++118 171 41 101 146 34 14 20 5 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 47 69 16 118 170 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 170 40 111 160 38 69 100 23 19 27 6 ++0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 11 16 4 69 100 23 ++115 167 39 119 172 41 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++119 172 41 75 109 26 3 4 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 23 34 8 106 153 36 118 170 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++117 169 40 118 170 40 119 172 41 105 151 36 42 61 14 2 3 1 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 15 21 5 ++45 64 15 80 116 27 114 165 39 118 170 40 117 169 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 119 172 41 ++97 141 33 20 30 7 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 1 1 0 53 76 18 114 165 39 118 171 40 117 169 40 ++117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 117 169 40 ++118 171 40 104 150 35 64 92 22 31 45 11 10 15 3 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 36 52 12 97 141 33 109 158 37 113 163 39 116 168 40 ++117 169 40 117 170 40 118 170 40 119 172 41 115 167 39 84 121 28 ++23 34 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 4 1 50 72 17 102 148 35 118 171 40 ++119 171 41 118 170 40 117 169 40 117 169 40 115 166 39 111 161 38 ++109 157 37 79 115 27 12 18 4 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 3 4 1 15 21 5 23 34 8 45 64 15 106 153 36 ++116 167 40 111 160 38 101 146 34 79 115 27 42 61 14 10 15 3 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 1 1 0 20 30 7 60 86 20 ++89 128 30 106 153 36 113 163 39 117 169 40 84 121 28 29 42 10 ++19 27 6 10 15 3 2 3 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 16 23 5 38 55 13 ++36 52 12 26 37 9 12 18 4 2 3 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 1 0 0 19 2 7 52 5 18 ++78 7 27 88 8 31 81 7 29 56 5 19 25 2 9 3 0 1 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++3 4 1 19 27 6 31 45 11 38 55 13 32 47 11 3 4 1 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 1 ++9 0 3 12 1 4 9 0 3 4 0 1 0 0 0 0 0 0 ++0 0 0 0 0 0 28 3 10 99 9 35 156 14 55 182 16 64 ++189 17 66 190 17 67 189 17 66 184 17 65 166 15 58 118 13 41 ++45 4 16 3 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 11 1 4 52 5 18 101 9 35 134 12 47 ++151 14 53 154 14 54 151 14 53 113 10 40 11 1 4 0 0 0 ++3 0 1 67 6 24 159 14 56 190 17 67 190 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 191 17 67 ++174 16 61 101 9 35 14 1 5 0 0 0 35 3 12 108 10 38 ++122 11 43 122 11 43 112 10 39 87 8 30 50 5 17 13 1 5 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++3 0 1 56 5 19 141 13 49 182 16 64 191 17 67 191 17 67 ++190 17 67 190 17 67 191 17 67 113 10 40 3 0 1 1 0 0 ++79 7 28 180 16 63 190 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++189 17 66 188 17 66 122 11 43 11 1 4 41 4 14 176 16 62 ++191 17 67 191 17 67 191 17 67 190 17 67 181 16 63 146 13 51 ++75 7 26 10 1 4 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 7 1 2 ++90 8 32 178 16 62 191 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 190 17 67 141 13 49 22 2 8 0 0 0 41 4 14 ++173 16 61 190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 88 8 31 1 0 0 89 8 31 ++185 17 65 189 17 66 188 17 66 188 17 66 189 17 66 191 17 67 ++186 17 65 124 11 43 25 2 9 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 89 8 31 ++184 17 65 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++190 17 67 151 14 53 34 3 12 0 0 0 0 0 0 79 7 28 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 191 17 67 146 13 51 9 1 3 7 1 2 ++108 10 38 187 17 66 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 190 17 67 141 13 49 22 2 8 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 52 5 18 176 16 62 ++189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 ++151 14 53 38 3 13 0 0 0 0 0 0 0 0 0 50 5 17 ++180 16 63 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 191 17 67 141 13 49 7 1 3 0 0 0 ++11 1 4 112 10 39 187 17 66 189 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 190 17 67 113 10 40 5 0 2 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 7 1 3 132 12 46 191 17 67 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 146 13 51 ++35 3 12 0 0 0 0 0 0 0 0 0 0 0 0 5 0 2 ++101 9 35 185 17 65 190 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 190 17 67 180 16 63 67 6 24 0 0 0 0 0 0 ++0 0 0 11 1 4 108 10 38 186 17 65 189 17 66 188 17 66 ++188 17 66 188 17 66 189 17 66 180 16 63 56 5 19 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 44 4 15 177 16 62 189 17 66 ++188 17 66 188 17 66 189 17 66 189 17 66 134 12 47 28 3 10 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++8 1 3 79 7 28 159 14 56 188 17 66 191 17 67 190 17 67 ++189 17 66 189 17 66 189 17 66 189 17 66 190 17 67 191 17 67 ++188 17 66 158 14 55 72 7 25 4 0 1 0 0 0 0 0 0 ++0 0 0 0 0 0 8 1 3 95 9 33 182 16 64 189 17 67 ++188 17 66 188 17 66 188 17 66 191 17 67 122 11 43 3 0 1 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 88 8 31 190 17 67 188 17 66 ++188 17 66 189 17 66 185 17 65 113 10 40 18 2 6 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 1 0 0 24 2 8 77 7 27 124 11 43 154 14 54 ++168 15 59 173 16 61 173 16 61 168 15 59 154 14 54 124 11 43 ++77 7 27 22 2 8 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 5 0 2 77 7 27 173 16 61 ++190 17 67 188 17 66 188 17 66 190 17 67 164 15 57 23 2 8 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 1 0 0 118 13 41 191 17 67 188 17 66 ++190 17 67 174 16 61 87 8 30 8 1 3 0 0 0 0 0 0 ++0 0 0 0 0 0 10 1 4 29 3 10 40 4 14 36 3 13 ++18 2 6 2 0 1 0 0 0 0 0 0 3 0 1 14 1 5 ++26 2 9 33 3 11 32 3 11 25 2 9 13 1 5 3 0 1 ++0 0 0 14 1 5 56 5 19 95 9 33 109 10 38 101 9 35 ++77 7 27 35 3 12 5 0 2 0 0 0 1 0 0 56 5 19 ++156 14 55 190 17 67 188 17 66 188 17 66 182 16 64 50 5 17 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 5 0 2 134 12 47 191 17 67 189 17 66 ++151 14 53 52 5 18 2 0 1 0 0 0 0 0 0 1 0 0 ++28 3 10 90 8 32 146 13 51 170 15 60 178 16 62 174 16 61 ++158 14 55 112 10 39 40 4 14 1 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3 0 1 ++56 5 19 146 13 51 183 17 64 191 17 67 191 17 67 191 17 67 ++188 17 66 173 16 61 122 11 43 41 4 14 1 0 0 0 0 0 ++30 3 10 124 11 43 185 17 65 190 17 67 187 17 66 67 6 24 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 6 1 2 134 12 47 168 15 59 99 9 35 ++21 2 7 0 0 0 0 0 0 0 0 0 6 1 2 77 7 27 ++162 15 57 190 17 67 191 17 67 189 17 66 189 17 66 189 17 66 ++190 17 67 191 17 67 169 15 59 75 7 26 3 0 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 79 7 28 ++178 16 62 191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 191 17 67 170 15 60 79 7 28 5 0 2 ++0 0 0 10 1 3 78 7 27 159 14 56 188 17 66 75 7 26 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 1 0 0 35 3 12 29 3 10 2 0 1 ++0 0 0 0 0 0 0 0 0 9 1 3 101 9 35 183 17 64 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 190 17 67 178 16 63 67 6 23 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 52 5 18 174 16 61 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 190 17 67 182 16 64 89 8 31 ++4 0 1 0 0 0 0 0 0 25 2 9 73 7 26 31 3 11 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 4 0 1 98 9 34 187 17 66 189 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 190 17 67 158 14 55 25 2 9 ++0 0 0 0 0 0 0 0 0 8 1 3 134 12 47 191 17 67 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 180 16 63 ++68 6 24 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 6 1 2 19 2 7 3 0 1 0 0 0 0 0 0 ++0 0 0 0 0 0 65 6 23 180 16 63 189 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 83 8 29 ++0 0 0 0 0 0 0 0 0 41 4 14 177 16 62 189 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 ++159 14 56 28 3 10 0 0 0 0 0 0 0 0 0 23 2 8 ++41 4 14 5 0 2 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++23 2 8 113 10 40 159 14 56 65 6 23 0 0 0 0 0 0 ++0 0 0 16 1 6 146 13 51 191 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 191 17 67 132 12 46 ++5 0 2 0 0 0 0 0 0 77 7 27 189 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++190 17 67 98 9 34 0 0 0 0 0 0 12 1 4 134 12 47 ++178 16 63 108 10 38 16 1 6 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 30 3 10 ++141 13 49 190 17 67 191 17 67 134 12 47 6 1 2 0 0 0 ++0 0 0 68 6 24 186 17 65 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 156 14 55 ++14 1 5 0 0 0 0 0 0 98 9 34 191 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++190 17 67 156 14 55 19 2 7 0 0 0 47 4 16 181 16 63 ++190 17 67 189 17 66 126 14 44 17 2 6 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 16 1 6 134 12 47 ++191 17 67 188 17 66 190 17 67 162 15 57 19 2 7 0 0 0 ++3 0 1 123 11 43 191 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 163 15 57 ++20 2 7 0 0 0 0 0 0 101 9 35 191 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 182 16 64 52 5 18 0 0 0 73 7 26 188 17 66 ++188 17 66 188 17 66 189 17 66 109 10 38 5 0 2 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 95 9 33 189 17 66 ++188 17 66 188 17 66 189 17 66 171 15 60 29 3 10 0 0 0 ++16 1 6 156 14 55 190 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 158 14 55 ++17 2 6 0 0 0 0 0 0 85 8 30 190 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 81 7 29 0 0 0 85 8 30 190 17 67 ++188 17 66 188 17 66 189 17 66 180 16 63 56 5 19 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 25 2 9 162 15 57 190 17 67 ++188 17 66 188 17 66 189 17 66 173 16 61 31 3 11 0 0 0 ++30 3 10 171 15 60 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 191 17 67 141 13 49 ++7 1 2 0 0 0 0 0 0 56 5 19 183 17 64 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 191 17 67 98 9 34 0 0 0 88 8 31 190 17 67 ++188 17 66 188 17 66 188 17 66 191 17 67 124 11 43 5 0 2 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 68 6 24 187 17 66 188 17 66 ++188 17 66 188 17 66 189 17 66 170 15 60 28 3 10 0 0 0 ++34 3 12 174 16 61 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 191 17 67 101 9 35 ++0 0 0 0 0 0 0 0 0 21 2 7 159 14 56 190 17 67 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 191 17 67 98 9 34 0 0 0 81 7 29 189 17 66 ++188 17 66 188 17 66 188 17 66 189 17 66 168 15 59 28 3 10 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 109 10 38 191 17 67 188 17 66 ++188 17 66 188 17 66 190 17 67 163 15 57 21 2 7 0 0 0 ++26 2 9 168 15 59 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 189 17 66 180 16 63 47 4 16 ++0 0 0 0 0 0 0 0 0 0 0 0 108 10 38 190 17 67 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 78 7 27 0 0 0 68 6 24 187 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 183 17 64 56 5 19 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 0 1 131 12 46 191 17 67 188 17 66 ++188 17 66 188 17 66 190 17 67 151 14 53 12 1 4 0 0 0 ++11 1 4 146 13 51 190 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 191 17 67 126 14 44 7 1 2 ++0 0 0 0 0 0 0 0 0 0 0 0 32 3 11 164 15 58 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++189 17 66 178 16 62 44 4 15 0 0 0 50 5 17 182 16 64 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 72 7 25 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 5 0 2 134 12 47 191 17 67 188 17 66 ++188 17 66 188 17 66 191 17 67 131 12 46 3 0 1 0 0 0 ++0 0 0 101 9 35 190 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 190 17 67 170 15 60 44 4 15 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 77 7 27 ++183 17 64 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++191 17 67 134 12 47 9 1 3 0 0 0 31 3 11 171 15 60 ++189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 72 7 25 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 2 0 1 124 11 43 191 17 67 188 17 66 ++188 17 66 188 17 66 191 17 67 101 9 35 0 0 0 0 0 0 ++0 0 0 35 3 12 168 15 59 190 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 182 16 64 77 7 27 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 1 2 ++99 9 35 185 17 65 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 ++177 16 62 56 5 19 0 0 0 0 0 0 13 1 5 151 14 53 ++190 17 67 188 17 66 188 17 66 188 17 66 185 17 65 56 5 19 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 99 9 35 191 17 67 188 17 66 ++188 17 66 188 17 66 186 17 65 65 6 23 0 0 0 0 0 0 ++0 0 0 0 0 0 79 7 28 182 16 64 190 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++191 17 67 177 16 62 83 8 29 4 0 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++8 1 3 89 8 31 175 16 62 191 17 67 189 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 181 16 63 ++85 8 30 3 0 1 0 0 0 0 0 0 1 0 0 118 13 41 ++191 17 67 188 17 66 188 17 66 189 17 66 173 16 61 34 3 12 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 56 5 19 183 17 64 188 17 66 ++188 17 66 189 17 66 169 15 59 30 3 10 0 0 0 0 0 0 ++0 0 0 0 0 0 5 0 2 83 8 29 173 16 61 191 17 67 ++190 17 67 189 17 66 189 17 66 190 17 67 191 17 67 187 17 66 ++151 14 53 56 5 19 3 0 1 0 0 0 16 1 6 50 5 17 ++79 7 28 95 9 33 95 9 33 75 7 26 41 4 14 10 1 4 ++0 0 0 2 0 1 50 5 17 132 12 46 178 16 62 190 17 67 ++191 17 67 191 17 67 191 17 67 186 17 65 154 14 54 68 6 24 ++4 0 1 0 0 0 0 0 0 0 0 0 0 0 0 72 7 25 ++187 17 66 188 17 66 188 17 66 191 17 67 141 13 49 9 1 3 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 14 1 5 151 14 53 190 17 67 ++188 17 66 191 17 67 131 12 46 5 0 2 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 2 0 1 44 4 15 113 10 40 ++156 14 55 173 16 61 174 16 61 164 15 58 134 12 47 77 7 27 ++18 2 6 0 0 0 16 1 6 85 8 30 151 14 53 182 16 64 ++189 17 66 191 17 67 190 17 67 188 17 66 177 16 62 141 13 49 ++68 6 24 8 1 3 0 0 0 8 1 3 44 4 15 88 8 31 ++113 10 40 122 11 43 108 10 38 67 6 24 20 2 7 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 28 3 10 ++166 15 58 190 17 67 188 17 66 187 17 66 79 7 28 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 73 7 26 185 17 65 ++189 17 66 184 17 65 65 6 23 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 1 ++17 2 6 32 3 11 34 3 12 22 2 8 6 1 2 0 0 0 ++0 0 0 38 3 13 141 13 49 188 17 66 190 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 191 17 67 ++184 17 65 122 11 43 21 2 7 0 0 0 0 0 0 0 0 0 ++0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 ++108 10 38 191 17 67 191 17 67 141 13 49 16 1 6 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 8 1 3 112 10 39 ++186 17 65 124 11 43 10 1 4 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++36 3 13 156 14 55 191 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++189 17 66 190 17 67 134 12 47 18 2 6 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 7 1 2 41 4 14 75 7 26 66 5 23 19 2 7 ++26 2 9 144 13 50 154 14 54 40 4 14 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 1 5 ++56 5 19 19 2 7 0 0 0 7 1 2 29 3 10 35 3 12 ++19 2 7 2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13 1 5 ++134 12 47 191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 189 17 67 108 10 38 3 0 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 ++40 4 14 124 11 43 177 16 62 188 17 66 187 17 66 144 13 50 ++24 2 8 17 2 6 22 2 8 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 19 2 7 122 11 43 171 15 60 175 16 62 ++159 14 56 112 10 39 40 4 14 2 0 1 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 72 7 25 ++186 17 65 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 189 17 66 174 16 61 41 4 14 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 3 0 1 72 7 25 ++168 15 59 191 17 67 189 17 66 188 17 66 188 17 66 190 17 67 ++95 9 33 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 95 9 33 191 17 67 189 17 66 189 17 66 ++190 17 67 191 17 67 171 15 60 90 8 32 12 1 4 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 5 0 2 132 12 46 ++191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 190 17 67 98 9 34 0 0 0 ++0 0 0 0 0 0 0 0 0 5 0 2 88 8 31 180 16 63 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 191 17 67 ++146 13 51 11 1 4 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 9 1 3 144 13 50 191 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 189 17 66 187 17 66 123 11 43 20 2 7 ++0 0 0 0 0 0 0 0 0 0 0 0 21 2 7 163 15 57 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 191 17 67 134 12 47 5 0 2 ++0 0 0 0 0 0 3 0 1 88 8 31 182 16 64 189 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 ++171 15 60 31 3 11 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 20 2 7 162 15 57 190 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 132 12 46 ++20 2 7 0 0 0 0 0 0 0 0 0 32 3 11 173 16 61 ++189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 190 17 67 151 14 53 12 1 4 ++0 0 0 0 0 0 72 7 25 180 16 63 189 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++181 16 63 47 4 16 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 21 2 7 163 15 57 190 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 ++122 11 43 9 1 3 0 0 0 0 0 0 30 3 10 171 15 60 ++189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 190 17 67 146 13 51 10 1 4 ++0 0 0 38 3 13 166 15 58 190 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++183 17 64 52 5 18 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 13 1 5 154 14 54 190 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++186 17 65 79 7 28 0 0 0 0 0 0 14 1 5 156 14 54 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 191 17 67 124 11 43 2 0 1 ++5 0 2 122 11 43 191 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++182 16 64 47 4 16 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 3 0 1 126 14 44 191 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++190 17 67 158 14 55 23 2 8 0 0 0 1 0 0 113 10 40 ++191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 78 7 27 0 0 0 ++47 4 16 177 16 62 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 189 17 66 ++173 16 61 34 3 12 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 85 8 30 189 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 79 7 28 0 0 0 0 0 0 47 4 16 ++175 16 62 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 190 17 67 156 14 55 22 2 8 0 0 0 ++109 10 38 191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 ++151 14 53 13 1 5 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 35 3 12 173 16 61 189 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 191 17 67 134 12 47 7 1 2 0 0 0 3 0 1 ++99 9 35 188 17 66 189 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 181 16 63 68 6 24 0 0 0 18 2 6 ++156 14 55 190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 ++101 9 35 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 3 0 1 118 13 41 191 17 67 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 168 15 59 28 3 10 0 0 0 0 0 0 ++12 1 4 113 10 40 187 17 66 189 17 67 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++190 17 67 180 16 63 88 8 31 4 0 1 0 0 0 47 4 16 ++180 16 63 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 190 17 67 168 15 59 ++36 3 13 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 38 3 13 164 15 58 190 17 67 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 182 16 64 50 5 17 0 0 0 0 0 0 ++0 0 0 11 1 4 90 8 32 169 15 59 190 17 67 190 17 67 ++189 17 66 189 17 66 189 17 66 189 17 66 191 17 67 189 17 66 ++158 14 55 68 6 24 4 0 1 0 0 0 0 0 0 73 7 26 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 189 17 66 185 17 65 83 8 29 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 65 6 23 174 16 61 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 185 17 65 56 5 19 0 0 0 0 0 0 ++0 0 0 0 0 0 2 0 1 35 3 12 99 9 35 146 13 51 ++170 15 60 177 16 62 177 16 62 166 15 58 141 13 49 85 8 30 ++24 2 8 0 0 0 0 0 0 0 0 0 0 0 0 85 8 30 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 189 17 66 112 10 39 8 1 3 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 68 6 24 ++170 15 60 191 17 67 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 182 16 64 50 5 17 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 11 1 4 ++28 3 10 40 4 14 38 3 13 25 2 9 8 1 3 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 78 7 27 ++189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 187 17 66 113 10 40 14 1 5 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 ++47 4 16 141 13 49 186 17 65 191 17 67 190 17 67 189 17 66 ++189 17 66 191 17 67 156 14 55 20 2 7 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 44 4 15 ++178 16 62 190 17 67 188 17 66 188 17 66 188 17 66 190 17 67 ++191 17 67 173 16 61 90 8 32 10 1 4 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 14 1 5 68 6 24 131 12 46 162 15 57 174 16 61 ++171 15 60 146 13 51 56 5 19 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 3 0 1 14 1 5 29 3 10 ++41 4 14 47 4 16 50 5 17 45 4 16 34 3 12 18 2 6 ++5 0 2 0 0 0 0 0 0 0 0 0 0 0 0 5 0 2 ++90 8 32 169 15 59 185 17 65 187 17 66 182 16 64 163 15 57 ++113 10 40 41 4 14 2 0 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 5 0 2 21 2 7 34 3 12 ++29 3 10 11 1 4 0 0 0 0 0 0 0 0 0 0 0 0 ++3 0 1 32 3 11 79 7 28 124 11 43 154 14 54 171 15 60 ++180 16 63 182 16 64 182 16 64 180 16 63 174 16 61 159 14 56 ++132 12 46 88 8 31 34 3 12 3 0 1 0 0 0 0 0 0 ++3 0 1 29 3 10 56 5 19 65 6 23 50 5 17 23 2 8 ++3 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 25 2 9 ++109 10 38 169 15 59 189 17 66 191 17 67 190 17 67 189 17 66 ++189 17 66 188 17 66 188 17 66 188 17 66 189 17 66 190 17 67 ++191 17 67 190 17 67 171 15 60 98 9 34 10 1 3 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 14 1 5 141 13 49 ++191 17 67 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 189 17 67 186 17 65 65 6 23 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 23 2 8 166 15 58 ++190 17 67 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 189 17 66 176 16 62 45 4 16 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 83 8 29 ++183 17 64 189 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++188 17 66 189 17 66 185 17 65 95 9 33 3 0 1 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 5 0 2 ++85 8 30 176 16 62 191 17 67 188 17 66 188 17 66 188 17 66 ++188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 188 17 66 ++191 17 67 180 16 63 95 9 33 7 1 3 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++2 0 1 52 5 18 141 13 49 185 17 65 191 17 67 189 17 67 ++189 17 66 188 17 66 188 17 66 189 17 66 191 17 67 187 17 66 ++146 13 51 56 5 19 4 0 1 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 14 1 5 68 6 24 131 12 46 166 15 58 ++180 16 63 183 17 64 180 16 63 168 15 59 134 12 47 75 7 26 ++17 2 6 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 5 0 2 24 2 8 ++44 4 15 52 5 18 45 4 16 26 2 9 6 1 2 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ++0 0 0 0 0 0 0 0 0 +Index: linux-3.10-3.10.11/dummy/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1574_5ee582d3526b124b504d8dc353ced66b6c21ba00.txt 2014-04-28 00:42:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.patch --- linux-3.10.11/debian/patches/rpi/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.patch 2014-04-28 00:42:16.000000000 +0000 @@ -0,0 +1,12417 @@ +commit 6e071d83898b7165638d959c8732e030a83cbd60 +Author: popcornmix +Date: Tue Jul 2 23:42:01 2013 +0100 + + bcm2708 vchiq driver + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/misc/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/Kconfig 2014-04-28 00:33:39.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/Kconfig 2014-04-28 00:42:13.000000000 +0000 +@@ -536,4 +536,6 @@ + source "drivers/misc/altera-stapl/Kconfig" + source "drivers/misc/mei/Kconfig" + source "drivers/misc/vmw_vmci/Kconfig" ++source "drivers/misc/vc04_services/Kconfig" + endmenu ++ +Index: linux-3.10-3.10.11/drivers/misc/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/Makefile 2014-04-27 23:37:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/Makefile 2014-04-28 00:42:14.000000000 +0000 +@@ -53,3 +53,4 @@ + obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/ + obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o + obj-$(CONFIG_SRAM) += sram.o ++obj-y += vc04_services/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/Kconfig 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,10 @@ ++config BCM2708_VCHIQ ++ tristate "Videocore VCHIQ" ++ depends on MACH_BCM2708 ++ default y ++ help ++ Kernel to VideoCore communication interface for the ++ BCM2708 family of products. ++ Defaults to Y when the Broadcom Videocore services ++ are included in the build, N otherwise. ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/Makefile 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,18 @@ ++ifeq ($(CONFIG_MACH_BCM2708),y) ++ ++obj-$(CONFIG_BCM2708_VCHIQ) += vchiq.o ++ ++vchiq-objs := \ ++ interface/vchiq_arm/vchiq_core.o \ ++ interface/vchiq_arm/vchiq_arm.o \ ++ interface/vchiq_arm/vchiq_kern_lib.o \ ++ interface/vchiq_arm/vchiq_2835_arm.o \ ++ interface/vchiq_arm/vchiq_proc.o \ ++ interface/vchiq_arm/vchiq_shim.o \ ++ interface/vchiq_arm/vchiq_util.o \ ++ interface/vchiq_arm/vchiq_connected.o \ ++ ++EXTRA_CFLAGS += -DVCOS_VERIFY_BKPTS=1 -Idrivers/misc/vc04_services -DUSE_VCHIQ_ARM -D__VCCOREVER__=0x04000000 ++ ++endif ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/connections/connection.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/connections/connection.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,328 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef CONNECTION_H_ ++#define CONNECTION_H_ ++ ++#include ++#include ++#include ++ ++#include "interface/vchi/vchi_cfg_internal.h" ++#include "interface/vchi/vchi_common.h" ++#include "interface/vchi/message_drivers/message.h" ++ ++/****************************************************************************** ++ Global defs ++ *****************************************************************************/ ++ ++// Opaque handle for a connection / service pair ++typedef struct opaque_vchi_connection_connected_service_handle_t *VCHI_CONNECTION_SERVICE_HANDLE_T; ++ ++// opaque handle to the connection state information ++typedef struct opaque_vchi_connection_info_t VCHI_CONNECTION_STATE_T; ++ ++typedef struct vchi_connection_t VCHI_CONNECTION_T; ++ ++ ++/****************************************************************************** ++ API ++ *****************************************************************************/ ++ ++// Routine to init a connection with a particular low level driver ++typedef VCHI_CONNECTION_STATE_T * (*VCHI_CONNECTION_INIT_T)( struct vchi_connection_t * connection, ++ const VCHI_MESSAGE_DRIVER_T * driver ); ++ ++// Routine to control CRC enabling at a connection level ++typedef int32_t (*VCHI_CONNECTION_CRC_CONTROL_T)( VCHI_CONNECTION_STATE_T *state_handle, ++ VCHI_CRC_CONTROL_T control ); ++ ++// Routine to create a service ++typedef int32_t (*VCHI_CONNECTION_SERVICE_CONNECT_T)( VCHI_CONNECTION_STATE_T *state_handle, ++ int32_t service_id, ++ uint32_t rx_fifo_size, ++ uint32_t tx_fifo_size, ++ int server, ++ VCHI_CALLBACK_T callback, ++ void *callback_param, ++ int32_t want_crc, ++ int32_t want_unaligned_bulk_rx, ++ int32_t want_unaligned_bulk_tx, ++ VCHI_CONNECTION_SERVICE_HANDLE_T *service_handle ); ++ ++// Routine to close a service ++typedef int32_t (*VCHI_CONNECTION_SERVICE_DISCONNECT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle ); ++ ++// Routine to queue a message ++typedef int32_t (*VCHI_CONNECTION_SERVICE_QUEUE_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ const void *data, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *msg_handle ); ++ ++// scatter-gather (vector) message queueing ++typedef int32_t (*VCHI_CONNECTION_SERVICE_QUEUE_MESSAGEV_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ VCHI_MSG_VECTOR_T *vector, ++ uint32_t count, ++ VCHI_FLAGS_T flags, ++ void *msg_handle ); ++ ++// Routine to dequeue a message ++typedef int32_t (*VCHI_CONNECTION_SERVICE_DEQUEUE_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void *data, ++ uint32_t max_data_size_to_read, ++ uint32_t *actual_msg_size, ++ VCHI_FLAGS_T flags ); ++ ++// Routine to peek at a message ++typedef int32_t (*VCHI_CONNECTION_SERVICE_PEEK_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void **data, ++ uint32_t *msg_size, ++ VCHI_FLAGS_T flags ); ++ ++// Routine to hold a message ++typedef int32_t (*VCHI_CONNECTION_SERVICE_HOLD_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void **data, ++ uint32_t *msg_size, ++ VCHI_FLAGS_T flags, ++ void **message_handle ); ++ ++// Routine to initialise a received message iterator ++typedef int32_t (*VCHI_CONNECTION_SERVICE_LOOKAHEAD_MESSAGE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ VCHI_MSG_ITER_T *iter, ++ VCHI_FLAGS_T flags ); ++ ++// Routine to release a held message ++typedef int32_t (*VCHI_CONNECTION_HELD_MSG_RELEASE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void *message_handle ); ++ ++// Routine to get info on a held message ++typedef int32_t (*VCHI_CONNECTION_HELD_MSG_INFO_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void *message_handle, ++ void **data, ++ int32_t *msg_size, ++ uint32_t *tx_timestamp, ++ uint32_t *rx_timestamp ); ++ ++// Routine to check whether the iterator has a next message ++typedef int32_t (*VCHI_CONNECTION_MSG_ITER_HAS_NEXT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, ++ const VCHI_MSG_ITER_T *iter ); ++ ++// Routine to advance the iterator ++typedef int32_t (*VCHI_CONNECTION_MSG_ITER_NEXT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, ++ VCHI_MSG_ITER_T *iter, ++ void **data, ++ uint32_t *msg_size ); ++ ++// Routine to remove the last message returned by the iterator ++typedef int32_t (*VCHI_CONNECTION_MSG_ITER_REMOVE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, ++ VCHI_MSG_ITER_T *iter ); ++ ++// Routine to hold the last message returned by the iterator ++typedef int32_t (*VCHI_CONNECTION_MSG_ITER_HOLD_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service, ++ VCHI_MSG_ITER_T *iter, ++ void **msg_handle ); ++ ++// Routine to transmit bulk data ++typedef int32_t (*VCHI_CONNECTION_BULK_QUEUE_TRANSMIT_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ const void *data_src, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *bulk_handle ); ++ ++// Routine to receive data ++typedef int32_t (*VCHI_CONNECTION_BULK_QUEUE_RECEIVE_T)( VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, ++ void *data_dst, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *bulk_handle ); ++ ++// Routine to report if a server is available ++typedef int32_t (*VCHI_CONNECTION_SERVER_PRESENT)( VCHI_CONNECTION_STATE_T *state, int32_t service_id, int32_t peer_flags ); ++ ++// Routine to report the number of RX slots available ++typedef int (*VCHI_CONNECTION_RX_SLOTS_AVAILABLE)( const VCHI_CONNECTION_STATE_T *state ); ++ ++// Routine to report the RX slot size ++typedef uint32_t (*VCHI_CONNECTION_RX_SLOT_SIZE)( const VCHI_CONNECTION_STATE_T *state ); ++ ++// Callback to indicate that the other side has added a buffer to the rx bulk DMA FIFO ++typedef void (*VCHI_CONNECTION_RX_BULK_BUFFER_ADDED)(VCHI_CONNECTION_STATE_T *state, ++ int32_t service, ++ uint32_t length, ++ MESSAGE_TX_CHANNEL_T channel, ++ uint32_t channel_params, ++ uint32_t data_length, ++ uint32_t data_offset); ++ ++// Callback to inform a service that a Xon or Xoff message has been received ++typedef void (*VCHI_CONNECTION_FLOW_CONTROL)(VCHI_CONNECTION_STATE_T *state, int32_t service_id, int32_t xoff); ++ ++// Callback to inform a service that a server available reply message has been received ++typedef void (*VCHI_CONNECTION_SERVER_AVAILABLE_REPLY)(VCHI_CONNECTION_STATE_T *state, int32_t service_id, uint32_t flags); ++ ++// Callback to indicate that bulk auxiliary messages have arrived ++typedef void (*VCHI_CONNECTION_BULK_AUX_RECEIVED)(VCHI_CONNECTION_STATE_T *state); ++ ++// Callback to indicate that bulk auxiliary messages have arrived ++typedef void (*VCHI_CONNECTION_BULK_AUX_TRANSMITTED)(VCHI_CONNECTION_STATE_T *state, void *handle); ++ ++// Callback with all the connection info you require ++typedef void (*VCHI_CONNECTION_INFO)(VCHI_CONNECTION_STATE_T *state, uint32_t protocol_version, uint32_t slot_size, uint32_t num_slots, uint32_t min_bulk_size); ++ ++// Callback to inform of a disconnect ++typedef void (*VCHI_CONNECTION_DISCONNECT)(VCHI_CONNECTION_STATE_T *state, uint32_t flags); ++ ++// Callback to inform of a power control request ++typedef void (*VCHI_CONNECTION_POWER_CONTROL)(VCHI_CONNECTION_STATE_T *state, MESSAGE_TX_CHANNEL_T channel, int32_t enable); ++ ++// allocate memory suitably aligned for this connection ++typedef void * (*VCHI_BUFFER_ALLOCATE)(VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, uint32_t * length); ++ ++// free memory allocated by buffer_allocate ++typedef void (*VCHI_BUFFER_FREE)(VCHI_CONNECTION_SERVICE_HANDLE_T service_handle, void * address); ++ ++ ++/****************************************************************************** ++ System driver struct ++ *****************************************************************************/ ++ ++struct opaque_vchi_connection_api_t ++{ ++ // Routine to init the connection ++ VCHI_CONNECTION_INIT_T init; ++ ++ // Connection-level CRC control ++ VCHI_CONNECTION_CRC_CONTROL_T crc_control; ++ ++ // Routine to connect to or create service ++ VCHI_CONNECTION_SERVICE_CONNECT_T service_connect; ++ ++ // Routine to disconnect from a service ++ VCHI_CONNECTION_SERVICE_DISCONNECT_T service_disconnect; ++ ++ // Routine to queue a message ++ VCHI_CONNECTION_SERVICE_QUEUE_MESSAGE_T service_queue_msg; ++ ++ // scatter-gather (vector) message queue ++ VCHI_CONNECTION_SERVICE_QUEUE_MESSAGEV_T service_queue_msgv; ++ ++ // Routine to dequeue a message ++ VCHI_CONNECTION_SERVICE_DEQUEUE_MESSAGE_T service_dequeue_msg; ++ ++ // Routine to peek at a message ++ VCHI_CONNECTION_SERVICE_PEEK_MESSAGE_T service_peek_msg; ++ ++ // Routine to hold a message ++ VCHI_CONNECTION_SERVICE_HOLD_MESSAGE_T service_hold_msg; ++ ++ // Routine to initialise a received message iterator ++ VCHI_CONNECTION_SERVICE_LOOKAHEAD_MESSAGE_T service_look_ahead_msg; ++ ++ // Routine to release a message ++ VCHI_CONNECTION_HELD_MSG_RELEASE_T held_msg_release; ++ ++ // Routine to get information on a held message ++ VCHI_CONNECTION_HELD_MSG_INFO_T held_msg_info; ++ ++ // Routine to check for next message on iterator ++ VCHI_CONNECTION_MSG_ITER_HAS_NEXT_T msg_iter_has_next; ++ ++ // Routine to get next message on iterator ++ VCHI_CONNECTION_MSG_ITER_NEXT_T msg_iter_next; ++ ++ // Routine to remove the last message returned by iterator ++ VCHI_CONNECTION_MSG_ITER_REMOVE_T msg_iter_remove; ++ ++ // Routine to hold the last message returned by iterator ++ VCHI_CONNECTION_MSG_ITER_HOLD_T msg_iter_hold; ++ ++ // Routine to transmit bulk data ++ VCHI_CONNECTION_BULK_QUEUE_TRANSMIT_T bulk_queue_transmit; ++ ++ // Routine to receive data ++ VCHI_CONNECTION_BULK_QUEUE_RECEIVE_T bulk_queue_receive; ++ ++ // Routine to report the available servers ++ VCHI_CONNECTION_SERVER_PRESENT server_present; ++ ++ // Routine to report the number of RX slots available ++ VCHI_CONNECTION_RX_SLOTS_AVAILABLE connection_rx_slots_available; ++ ++ // Routine to report the RX slot size ++ VCHI_CONNECTION_RX_SLOT_SIZE connection_rx_slot_size; ++ ++ // Callback to indicate that the other side has added a buffer to the rx bulk DMA FIFO ++ VCHI_CONNECTION_RX_BULK_BUFFER_ADDED rx_bulk_buffer_added; ++ ++ // Callback to inform a service that a Xon or Xoff message has been received ++ VCHI_CONNECTION_FLOW_CONTROL flow_control; ++ ++ // Callback to inform a service that a server available reply message has been received ++ VCHI_CONNECTION_SERVER_AVAILABLE_REPLY server_available_reply; ++ ++ // Callback to indicate that bulk auxiliary messages have arrived ++ VCHI_CONNECTION_BULK_AUX_RECEIVED bulk_aux_received; ++ ++ // Callback to indicate that a bulk auxiliary message has been transmitted ++ VCHI_CONNECTION_BULK_AUX_TRANSMITTED bulk_aux_transmitted; ++ ++ // Callback to provide information about the connection ++ VCHI_CONNECTION_INFO connection_info; ++ ++ // Callback to notify that peer has requested disconnect ++ VCHI_CONNECTION_DISCONNECT disconnect; ++ ++ // Callback to notify that peer has requested power change ++ VCHI_CONNECTION_POWER_CONTROL power_control; ++ ++ // allocate memory suitably aligned for this connection ++ VCHI_BUFFER_ALLOCATE buffer_allocate; ++ ++ // free memory allocated by buffer_allocate ++ VCHI_BUFFER_FREE buffer_free; ++ ++}; ++ ++struct vchi_connection_t { ++ const VCHI_CONNECTION_API_T *api; ++ VCHI_CONNECTION_STATE_T *state; ++#ifdef VCHI_COARSE_LOCKING ++ struct semaphore sem; ++#endif ++}; ++ ++ ++#endif /* CONNECTION_H_ */ ++ ++/****************************** End of file **********************************/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/message_drivers/message.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/message_drivers/message.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,204 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef _VCHI_MESSAGE_H_ ++#define _VCHI_MESSAGE_H_ ++ ++#include ++#include ++#include ++ ++#include "interface/vchi/vchi_cfg_internal.h" ++#include "interface/vchi/vchi_common.h" ++ ++ ++typedef enum message_event_type { ++ MESSAGE_EVENT_NONE, ++ MESSAGE_EVENT_NOP, ++ MESSAGE_EVENT_MESSAGE, ++ MESSAGE_EVENT_SLOT_COMPLETE, ++ MESSAGE_EVENT_RX_BULK_PAUSED, ++ MESSAGE_EVENT_RX_BULK_COMPLETE, ++ MESSAGE_EVENT_TX_COMPLETE, ++ MESSAGE_EVENT_MSG_DISCARDED ++} MESSAGE_EVENT_TYPE_T; ++ ++typedef enum vchi_msg_flags ++{ ++ VCHI_MSG_FLAGS_NONE = 0x0, ++ VCHI_MSG_FLAGS_TERMINATE_DMA = 0x1 ++} VCHI_MSG_FLAGS_T; ++ ++typedef enum message_tx_channel ++{ ++ MESSAGE_TX_CHANNEL_MESSAGE = 0, ++ MESSAGE_TX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards ++} MESSAGE_TX_CHANNEL_T; ++ ++// Macros used for cycling through bulk channels ++#define MESSAGE_TX_CHANNEL_BULK_PREV(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION-1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) ++#define MESSAGE_TX_CHANNEL_BULK_NEXT(c) (MESSAGE_TX_CHANNEL_BULK+((c)-MESSAGE_TX_CHANNEL_BULK+1)%VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION) ++ ++typedef enum message_rx_channel ++{ ++ MESSAGE_RX_CHANNEL_MESSAGE = 0, ++ MESSAGE_RX_CHANNEL_BULK = 1 // drivers may provide multiple bulk channels, from 1 upwards ++} MESSAGE_RX_CHANNEL_T; ++ ++// Message receive slot information ++typedef struct rx_msg_slot_info { ++ ++ struct rx_msg_slot_info *next; ++ //struct slot_info *prev; ++#if !defined VCHI_COARSE_LOCKING ++ struct semaphore sem; ++#endif ++ ++ uint8_t *addr; // base address of slot ++ uint32_t len; // length of slot in bytes ++ ++ uint32_t write_ptr; // hardware causes this to advance ++ uint32_t read_ptr; // this module does the reading ++ int active; // is this slot in the hardware dma fifo? ++ uint32_t msgs_parsed; // count how many messages are in this slot ++ uint32_t msgs_released; // how many messages have been released ++ void *state; // connection state information ++ uint8_t ref_count[VCHI_MAX_SERVICES_PER_CONNECTION]; // reference count for slots held by services ++} RX_MSG_SLOTINFO_T; ++ ++// The message driver no longer needs to know about the fields of RX_BULK_SLOTINFO_T - sort this out. ++// In particular, it mustn't use addr and len - they're the client buffer, but the message ++// driver will be tasked with sending the aligned core section. ++typedef struct rx_bulk_slotinfo_t { ++ struct rx_bulk_slotinfo_t *next; ++ ++ struct semaphore *blocking; ++ ++ // needed by DMA ++ void *addr; ++ uint32_t len; ++ ++ // needed for the callback ++ void *service; ++ void *handle; ++ VCHI_FLAGS_T flags; ++} RX_BULK_SLOTINFO_T; ++ ++ ++/* ---------------------------------------------------------------------- ++ * each connection driver will have a pool of the following struct. ++ * ++ * the pool will be managed by vchi_qman_* ++ * this means there will be multiple queues (single linked lists) ++ * a given struct message_info will be on exactly one of these queues ++ * at any one time ++ * -------------------------------------------------------------------- */ ++typedef struct rx_message_info { ++ ++ struct message_info *next; ++ //struct message_info *prev; ++ ++ uint8_t *addr; ++ uint32_t len; ++ RX_MSG_SLOTINFO_T *slot; // points to whichever slot contains this message ++ uint32_t tx_timestamp; ++ uint32_t rx_timestamp; ++ ++} RX_MESSAGE_INFO_T; ++ ++typedef struct { ++ MESSAGE_EVENT_TYPE_T type; ++ ++ struct { ++ // for messages ++ void *addr; // address of message ++ uint16_t slot_delta; // whether this message indicated slot delta ++ uint32_t len; // length of message ++ RX_MSG_SLOTINFO_T *slot; // slot this message is in ++ int32_t service; // service id this message is destined for ++ uint32_t tx_timestamp; // timestamp from the header ++ uint32_t rx_timestamp; // timestamp when we parsed it ++ } message; ++ ++ // FIXME: cleanup slot reporting... ++ RX_MSG_SLOTINFO_T *rx_msg; ++ RX_BULK_SLOTINFO_T *rx_bulk; ++ void *tx_handle; ++ MESSAGE_TX_CHANNEL_T tx_channel; ++ ++} MESSAGE_EVENT_T; ++ ++ ++// callbacks ++typedef void VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T( void *state ); ++ ++typedef struct { ++ VCHI_MESSAGE_DRIVER_EVENT_CALLBACK_T *event_callback; ++} VCHI_MESSAGE_DRIVER_OPEN_T; ++ ++ ++// handle to this instance of message driver (as returned by ->open) ++typedef struct opaque_mhandle_t *VCHI_MDRIVER_HANDLE_T; ++ ++struct opaque_vchi_message_driver_t { ++ VCHI_MDRIVER_HANDLE_T *(*open)( VCHI_MESSAGE_DRIVER_OPEN_T *params, void *state ); ++ int32_t (*suspending)( VCHI_MDRIVER_HANDLE_T *handle ); ++ int32_t (*resumed)( VCHI_MDRIVER_HANDLE_T *handle ); ++ int32_t (*power_control)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T, int32_t enable ); ++ int32_t (*add_msg_rx_slot)( VCHI_MDRIVER_HANDLE_T *handle, RX_MSG_SLOTINFO_T *slot ); // rx message ++ int32_t (*add_bulk_rx)( VCHI_MDRIVER_HANDLE_T *handle, void *data, uint32_t len, RX_BULK_SLOTINFO_T *slot ); // rx data (bulk) ++ int32_t (*send)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, VCHI_MSG_FLAGS_T flags, void *send_handle ); // tx (message & bulk) ++ void (*next_event)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_EVENT_T *event ); // get the next event from message_driver ++ int32_t (*enable)( VCHI_MDRIVER_HANDLE_T *handle ); ++ int32_t (*form_message)( VCHI_MDRIVER_HANDLE_T *handle, int32_t service_id, VCHI_MSG_VECTOR_T *vector, uint32_t count, void ++ *address, uint32_t length_avail, uint32_t max_total_length, int32_t pad_to_fill, int32_t allow_partial ); ++ ++ int32_t (*update_message)( VCHI_MDRIVER_HANDLE_T *handle, void *dest, int16_t *slot_count ); ++ int32_t (*buffer_aligned)( VCHI_MDRIVER_HANDLE_T *handle, int tx, int uncached, const void *address, const uint32_t length ); ++ void * (*allocate_buffer)( VCHI_MDRIVER_HANDLE_T *handle, uint32_t *length ); ++ void (*free_buffer)( VCHI_MDRIVER_HANDLE_T *handle, void *address ); ++ int (*rx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); ++ int (*tx_slot_size)( VCHI_MDRIVER_HANDLE_T *handle, int msg_size ); ++ ++ int32_t (*tx_supports_terminate)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); ++ uint32_t (*tx_bulk_chunk_size)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); ++ int (*tx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel ); ++ int (*rx_alignment)( const VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_RX_CHANNEL_T channel ); ++ void (*form_bulk_aux)( VCHI_MDRIVER_HANDLE_T *handle, MESSAGE_TX_CHANNEL_T channel, const void *data, uint32_t len, uint32_t chunk_size, const void **aux_data, int32_t *aux_len ); ++ void (*debug)( VCHI_MDRIVER_HANDLE_T *handle ); ++}; ++ ++ ++#endif // _VCHI_MESSAGE_H_ ++ ++/****************************** End of file ***********************************/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,373 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHI_H_ ++#define VCHI_H_ ++ ++#include "interface/vchi/vchi_cfg.h" ++#include "interface/vchi/vchi_common.h" ++#include "interface/vchi/connections/connection.h" ++#include "vchi_mh.h" ++ ++ ++/****************************************************************************** ++ Global defs ++ *****************************************************************************/ ++ ++#define VCHI_BULK_ROUND_UP(x) ((((unsigned long)(x))+VCHI_BULK_ALIGN-1) & ~(VCHI_BULK_ALIGN-1)) ++#define VCHI_BULK_ROUND_DOWN(x) (((unsigned long)(x)) & ~(VCHI_BULK_ALIGN-1)) ++#define VCHI_BULK_ALIGN_NBYTES(x) (VCHI_BULK_ALIGNED(x) ? 0 : (VCHI_BULK_ALIGN - ((unsigned long)(x) & (VCHI_BULK_ALIGN-1)))) ++ ++#ifdef USE_VCHIQ_ARM ++#define VCHI_BULK_ALIGNED(x) 1 ++#else ++#define VCHI_BULK_ALIGNED(x) (((unsigned long)(x) & (VCHI_BULK_ALIGN-1)) == 0) ++#endif ++ ++struct vchi_version { ++ uint32_t version; ++ uint32_t version_min; ++}; ++#define VCHI_VERSION(v_) { v_, v_ } ++#define VCHI_VERSION_EX(v_, m_) { v_, m_ } ++ ++typedef enum ++{ ++ VCHI_VEC_POINTER, ++ VCHI_VEC_HANDLE, ++ VCHI_VEC_LIST ++} VCHI_MSG_VECTOR_TYPE_T; ++ ++typedef struct vchi_msg_vector_ex { ++ ++ VCHI_MSG_VECTOR_TYPE_T type; ++ union ++ { ++ // a memory handle ++ struct ++ { ++ VCHI_MEM_HANDLE_T handle; ++ uint32_t offset; ++ int32_t vec_len; ++ } handle; ++ ++ // an ordinary data pointer ++ struct ++ { ++ const void *vec_base; ++ int32_t vec_len; ++ } ptr; ++ ++ // a nested vector list ++ struct ++ { ++ struct vchi_msg_vector_ex *vec; ++ uint32_t vec_len; ++ } list; ++ } u; ++} VCHI_MSG_VECTOR_EX_T; ++ ++ ++// Construct an entry in a msg vector for a pointer (p) of length (l) ++#define VCHI_VEC_POINTER(p,l) VCHI_VEC_POINTER, { { (VCHI_MEM_HANDLE_T)(p), (l) } } ++ ++// Construct an entry in a msg vector for a message handle (h), starting at offset (o) of length (l) ++#define VCHI_VEC_HANDLE(h,o,l) VCHI_VEC_HANDLE, { { (h), (o), (l) } } ++ ++// Macros to manipulate 'FOURCC' values ++#define MAKE_FOURCC(x) ((int32_t)( (x[0] << 24) | (x[1] << 16) | (x[2] << 8) | x[3] )) ++#define FOURCC_TO_CHAR(x) (x >> 24) & 0xFF,(x >> 16) & 0xFF,(x >> 8) & 0xFF, x & 0xFF ++ ++ ++// Opaque service information ++struct opaque_vchi_service_t; ++ ++// Descriptor for a held message. Allocated by client, initialised by vchi_msg_hold, ++// vchi_msg_iter_hold or vchi_msg_iter_hold_next. Fields are for internal VCHI use only. ++typedef struct ++{ ++ struct opaque_vchi_service_t *service; ++ void *message; ++} VCHI_HELD_MSG_T; ++ ++ ++ ++// structure used to provide the information needed to open a server or a client ++typedef struct { ++ struct vchi_version version; ++ int32_t service_id; ++ VCHI_CONNECTION_T *connection; ++ uint32_t rx_fifo_size; ++ uint32_t tx_fifo_size; ++ VCHI_CALLBACK_T callback; ++ void *callback_param; ++ /* client intends to receive bulk transfers of ++ odd lengths or into unaligned buffers */ ++ int32_t want_unaligned_bulk_rx; ++ /* client intends to transmit bulk transfers of ++ odd lengths or out of unaligned buffers */ ++ int32_t want_unaligned_bulk_tx; ++ /* client wants to check CRCs on (bulk) xfers. ++ Only needs to be set at 1 end - will do both directions. */ ++ int32_t want_crc; ++} SERVICE_CREATION_T; ++ ++// Opaque handle for a VCHI instance ++typedef struct opaque_vchi_instance_handle_t *VCHI_INSTANCE_T; ++ ++// Opaque handle for a server or client ++typedef struct opaque_vchi_service_handle_t *VCHI_SERVICE_HANDLE_T; ++ ++// Service registration & startup ++typedef void (*VCHI_SERVICE_INIT)(VCHI_INSTANCE_T initialise_instance, VCHI_CONNECTION_T **connections, uint32_t num_connections); ++ ++typedef struct service_info_tag { ++ const char * const vll_filename; /* VLL to load to start this service. This is an empty string if VLL is "static" */ ++ VCHI_SERVICE_INIT init; /* Service initialisation function */ ++ void *vll_handle; /* VLL handle; NULL when unloaded or a "static VLL" in build */ ++} SERVICE_INFO_T; ++ ++/****************************************************************************** ++ Global funcs - implementation is specific to which side you are on (local / remote) ++ *****************************************************************************/ ++ ++#ifdef __cplusplus ++extern "C" { ++#endif ++ ++extern /*@observer@*/ VCHI_CONNECTION_T * vchi_create_connection( const VCHI_CONNECTION_API_T * function_table, ++ const VCHI_MESSAGE_DRIVER_T * low_level); ++ ++ ++// Routine used to initialise the vchi on both local + remote connections ++extern int32_t vchi_initialise( VCHI_INSTANCE_T *instance_handle ); ++ ++extern int32_t vchi_exit( void ); ++ ++extern int32_t vchi_connect( VCHI_CONNECTION_T **connections, ++ const uint32_t num_connections, ++ VCHI_INSTANCE_T instance_handle ); ++ ++//When this is called, ensure that all services have no data pending. ++//Bulk transfers can remain 'queued' ++extern int32_t vchi_disconnect( VCHI_INSTANCE_T instance_handle ); ++ ++// Global control over bulk CRC checking ++extern int32_t vchi_crc_control( VCHI_CONNECTION_T *connection, ++ VCHI_CRC_CONTROL_T control ); ++ ++// helper functions ++extern void * vchi_allocate_buffer(VCHI_SERVICE_HANDLE_T handle, uint32_t *length); ++extern void vchi_free_buffer(VCHI_SERVICE_HANDLE_T handle, void *address); ++extern uint32_t vchi_current_time(VCHI_INSTANCE_T instance_handle); ++ ++ ++/****************************************************************************** ++ Global service API ++ *****************************************************************************/ ++// Routine to create a named service ++extern int32_t vchi_service_create( VCHI_INSTANCE_T instance_handle, ++ SERVICE_CREATION_T *setup, ++ VCHI_SERVICE_HANDLE_T *handle ); ++ ++// Routine to destory a service ++extern int32_t vchi_service_destroy( const VCHI_SERVICE_HANDLE_T handle ); ++ ++// Routine to open a named service ++extern int32_t vchi_service_open( VCHI_INSTANCE_T instance_handle, ++ SERVICE_CREATION_T *setup, ++ VCHI_SERVICE_HANDLE_T *handle); ++ ++extern int32_t vchi_get_peer_version( const VCHI_SERVICE_HANDLE_T handle, ++ short *peer_version ); ++ ++// Routine to close a named service ++extern int32_t vchi_service_close( const VCHI_SERVICE_HANDLE_T handle ); ++ ++// Routine to increment ref count on a named service ++extern int32_t vchi_service_use( const VCHI_SERVICE_HANDLE_T handle ); ++ ++// Routine to decrement ref count on a named service ++extern int32_t vchi_service_release( const VCHI_SERVICE_HANDLE_T handle ); ++ ++// Routine to send a message accross a service ++extern int32_t vchi_msg_queue( VCHI_SERVICE_HANDLE_T handle, ++ const void *data, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *msg_handle ); ++ ++// scatter-gather (vector) and send message ++int32_t vchi_msg_queuev_ex( VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MSG_VECTOR_EX_T *vector, ++ uint32_t count, ++ VCHI_FLAGS_T flags, ++ void *msg_handle ); ++ ++// legacy scatter-gather (vector) and send message, only handles pointers ++int32_t vchi_msg_queuev( VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MSG_VECTOR_T *vector, ++ uint32_t count, ++ VCHI_FLAGS_T flags, ++ void *msg_handle ); ++ ++// Routine to receive a msg from a service ++// Dequeue is equivalent to hold, copy into client buffer, release ++extern int32_t vchi_msg_dequeue( VCHI_SERVICE_HANDLE_T handle, ++ void *data, ++ uint32_t max_data_size_to_read, ++ uint32_t *actual_msg_size, ++ VCHI_FLAGS_T flags ); ++ ++// Routine to look at a message in place. ++// The message is not dequeued, so a subsequent call to peek or dequeue ++// will return the same message. ++extern int32_t vchi_msg_peek( VCHI_SERVICE_HANDLE_T handle, ++ void **data, ++ uint32_t *msg_size, ++ VCHI_FLAGS_T flags ); ++ ++// Routine to remove a message after it has been read in place with peek ++// The first message on the queue is dequeued. ++extern int32_t vchi_msg_remove( VCHI_SERVICE_HANDLE_T handle ); ++ ++// Routine to look at a message in place. ++// The message is dequeued, so the caller is left holding it; the descriptor is ++// filled in and must be released when the user has finished with the message. ++extern int32_t vchi_msg_hold( VCHI_SERVICE_HANDLE_T handle, ++ void **data, // } may be NULL, as info can be ++ uint32_t *msg_size, // } obtained from HELD_MSG_T ++ VCHI_FLAGS_T flags, ++ VCHI_HELD_MSG_T *message_descriptor ); ++ ++// Initialise an iterator to look through messages in place ++extern int32_t vchi_msg_look_ahead( VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MSG_ITER_T *iter, ++ VCHI_FLAGS_T flags ); ++ ++/****************************************************************************** ++ Global service support API - operations on held messages and message iterators ++ *****************************************************************************/ ++ ++// Routine to get the address of a held message ++extern void *vchi_held_msg_ptr( const VCHI_HELD_MSG_T *message ); ++ ++// Routine to get the size of a held message ++extern int32_t vchi_held_msg_size( const VCHI_HELD_MSG_T *message ); ++ ++// Routine to get the transmit timestamp as written into the header by the peer ++extern uint32_t vchi_held_msg_tx_timestamp( const VCHI_HELD_MSG_T *message ); ++ ++// Routine to get the reception timestamp, written as we parsed the header ++extern uint32_t vchi_held_msg_rx_timestamp( const VCHI_HELD_MSG_T *message ); ++ ++// Routine to release a held message after it has been processed ++extern int32_t vchi_held_msg_release( VCHI_HELD_MSG_T *message ); ++ ++// Indicates whether the iterator has a next message. ++extern int32_t vchi_msg_iter_has_next( const VCHI_MSG_ITER_T *iter ); ++ ++// Return the pointer and length for the next message and advance the iterator. ++extern int32_t vchi_msg_iter_next( VCHI_MSG_ITER_T *iter, ++ void **data, ++ uint32_t *msg_size ); ++ ++// Remove the last message returned by vchi_msg_iter_next. ++// Can only be called once after each call to vchi_msg_iter_next. ++extern int32_t vchi_msg_iter_remove( VCHI_MSG_ITER_T *iter ); ++ ++// Hold the last message returned by vchi_msg_iter_next. ++// Can only be called once after each call to vchi_msg_iter_next. ++extern int32_t vchi_msg_iter_hold( VCHI_MSG_ITER_T *iter, ++ VCHI_HELD_MSG_T *message ); ++ ++// Return information for the next message, and hold it, advancing the iterator. ++extern int32_t vchi_msg_iter_hold_next( VCHI_MSG_ITER_T *iter, ++ void **data, // } may be NULL ++ uint32_t *msg_size, // } ++ VCHI_HELD_MSG_T *message ); ++ ++ ++/****************************************************************************** ++ Global bulk API ++ *****************************************************************************/ ++ ++// Routine to prepare interface for a transfer from the other side ++extern int32_t vchi_bulk_queue_receive( VCHI_SERVICE_HANDLE_T handle, ++ void *data_dst, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *transfer_handle ); ++ ++ ++// Prepare interface for a transfer from the other side into relocatable memory. ++int32_t vchi_bulk_queue_receive_reloc( const VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MEM_HANDLE_T h_dst, ++ uint32_t offset, ++ uint32_t data_size, ++ const VCHI_FLAGS_T flags, ++ void * const bulk_handle ); ++ ++// Routine to queue up data ready for transfer to the other (once they have signalled they are ready) ++extern int32_t vchi_bulk_queue_transmit( VCHI_SERVICE_HANDLE_T handle, ++ const void *data_src, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *transfer_handle ); ++ ++ ++/****************************************************************************** ++ Configuration plumbing ++ *****************************************************************************/ ++ ++// function prototypes for the different mid layers (the state info gives the different physical connections) ++extern const VCHI_CONNECTION_API_T *single_get_func_table( void ); ++//extern const VCHI_CONNECTION_API_T *local_server_get_func_table( void ); ++//extern const VCHI_CONNECTION_API_T *local_client_get_func_table( void ); ++ ++// declare all message drivers here ++const VCHI_MESSAGE_DRIVER_T *vchi_mphi_message_driver_func_table( void ); ++ ++#ifdef __cplusplus ++} ++#endif ++ ++extern int32_t vchi_bulk_queue_transmit_reloc( VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MEM_HANDLE_T h_src, ++ uint32_t offset, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *transfer_handle ); ++#endif /* VCHI_H_ */ ++ ++/****************************** End of file **********************************/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_cfg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_cfg.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,224 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHI_CFG_H_ ++#define VCHI_CFG_H_ ++ ++/**************************************************************************************** ++ * Defines in this first section are part of the VCHI API and may be examined by VCHI ++ * services. ++ ***************************************************************************************/ ++ ++/* Required alignment of base addresses for bulk transfer, if unaligned transfers are not enabled */ ++/* Really determined by the message driver, and should be available from a run-time call. */ ++#ifndef VCHI_BULK_ALIGN ++# if __VCCOREVER__ >= 0x04000000 ++# define VCHI_BULK_ALIGN 32 // Allows for the need to do cache cleans ++# else ++# define VCHI_BULK_ALIGN 16 ++# endif ++#endif ++ ++/* Required length multiple for bulk transfers, if unaligned transfers are not enabled */ ++/* May be less than or greater than VCHI_BULK_ALIGN */ ++/* Really determined by the message driver, and should be available from a run-time call. */ ++#ifndef VCHI_BULK_GRANULARITY ++# if __VCCOREVER__ >= 0x04000000 ++# define VCHI_BULK_GRANULARITY 32 // Allows for the need to do cache cleans ++# else ++# define VCHI_BULK_GRANULARITY 16 ++# endif ++#endif ++ ++/* The largest possible message to be queued with vchi_msg_queue. */ ++#ifndef VCHI_MAX_MSG_SIZE ++# if defined VCHI_LOCAL_HOST_PORT ++# define VCHI_MAX_MSG_SIZE 16384 // makes file transfers fast, but should they be using bulk? ++# else ++# define VCHI_MAX_MSG_SIZE 4096 // NOTE: THIS MUST BE LARGER THAN OR EQUAL TO THE SIZE OF THE KHRONOS MERGE BUFFER!! ++# endif ++#endif ++ ++/****************************************************************************************** ++ * Defines below are system configuration options, and should not be used by VCHI services. ++ *****************************************************************************************/ ++ ++/* How many connections can we support? A localhost implementation uses 2 connections, ++ * 1 for host-app, 1 for VMCS, and these are hooked together by a loopback MPHI VCFW ++ * driver. */ ++#ifndef VCHI_MAX_NUM_CONNECTIONS ++# define VCHI_MAX_NUM_CONNECTIONS 3 ++#endif ++ ++/* How many services can we open per connection? Extending this doesn't cost processing time, just a small ++ * amount of static memory. */ ++#ifndef VCHI_MAX_SERVICES_PER_CONNECTION ++# define VCHI_MAX_SERVICES_PER_CONNECTION 36 ++#endif ++ ++/* Adjust if using a message driver that supports more logical TX channels */ ++#ifndef VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION ++# define VCHI_MAX_BULK_TX_CHANNELS_PER_CONNECTION 9 // 1 MPHI + 8 CCP2 logical channels ++#endif ++ ++/* Adjust if using a message driver that supports more logical RX channels */ ++#ifndef VCHI_MAX_BULK_RX_CHANNELS_PER_CONNECTION ++# define VCHI_MAX_BULK_RX_CHANNELS_PER_CONNECTION 1 // 1 MPHI ++#endif ++ ++/* How many receive slots do we use. This times VCHI_MAX_MSG_SIZE gives the effective ++ * receive queue space, less message headers. */ ++#ifndef VCHI_NUM_READ_SLOTS ++# if defined(VCHI_LOCAL_HOST_PORT) ++# define VCHI_NUM_READ_SLOTS 4 ++# else ++# define VCHI_NUM_READ_SLOTS 48 ++# endif ++#endif ++ ++/* Do we utilise overrun facility for receive message slots? Can aid peer transmit ++ * performance. Only define on VideoCore end, talking to host. ++ */ ++//#define VCHI_MSG_RX_OVERRUN ++ ++/* How many transmit slots do we use. Generally don't need many, as the hardware driver ++ * underneath VCHI will usually have its own buffering. */ ++#ifndef VCHI_NUM_WRITE_SLOTS ++# define VCHI_NUM_WRITE_SLOTS 4 ++#endif ++ ++/* If a service has held or queued received messages in VCHI_XOFF_THRESHOLD or more slots, ++ * then it's taking up too much buffer space, and the peer service will be told to stop ++ * transmitting with an XOFF message. For this to be effective, the VCHI_NUM_READ_SLOTS ++ * needs to be considerably bigger than VCHI_NUM_WRITE_SLOTS, or the transmit latency ++ * is too high. */ ++#ifndef VCHI_XOFF_THRESHOLD ++# define VCHI_XOFF_THRESHOLD (VCHI_NUM_READ_SLOTS / 2) ++#endif ++ ++/* After we've sent an XOFF, the peer will be told to resume transmission once the local ++ * service has dequeued/released enough messages that it's now occupying ++ * VCHI_XON_THRESHOLD slots or fewer. */ ++#ifndef VCHI_XON_THRESHOLD ++# define VCHI_XON_THRESHOLD (VCHI_NUM_READ_SLOTS / 4) ++#endif ++ ++/* A size below which a bulk transfer omits the handshake completely and always goes ++ * via the message channel, if bulk auxiliary is being sent on that service. (The user ++ * can guarantee this by enabling unaligned transmits). ++ * Not API. */ ++#ifndef VCHI_MIN_BULK_SIZE ++# define VCHI_MIN_BULK_SIZE ( VCHI_MAX_MSG_SIZE / 2 < 4096 ? VCHI_MAX_MSG_SIZE / 2 : 4096 ) ++#endif ++ ++/* Maximum size of bulk transmission chunks, for each interface type. A trade-off between ++ * speed and latency; the smaller the chunk size the better change of messages and other ++ * bulk transmissions getting in when big bulk transfers are happening. Set to 0 to not ++ * break transmissions into chunks. ++ */ ++#ifndef VCHI_MAX_BULK_CHUNK_SIZE_MPHI ++# define VCHI_MAX_BULK_CHUNK_SIZE_MPHI (16 * 1024) ++#endif ++ ++/* NB Chunked CCP2 transmissions violate the letter of the CCP2 spec by using "JPEG8" mode ++ * with multiple-line frames. Only use if the receiver can cope. */ ++#ifndef VCHI_MAX_BULK_CHUNK_SIZE_CCP2 ++# define VCHI_MAX_BULK_CHUNK_SIZE_CCP2 0 ++#endif ++ ++/* How many TX messages can we have pending in our transmit slots. Once exhausted, ++ * vchi_msg_queue will be blocked. */ ++#ifndef VCHI_TX_MSG_QUEUE_SIZE ++# define VCHI_TX_MSG_QUEUE_SIZE 256 ++#endif ++ ++/* How many RX messages can we have parsed in the receive slots. Once exhausted, parsing ++ * will be suspended until older messages are dequeued/released. */ ++#ifndef VCHI_RX_MSG_QUEUE_SIZE ++# define VCHI_RX_MSG_QUEUE_SIZE 256 ++#endif ++ ++/* Really should be able to cope if we run out of received message descriptors, by ++ * suspending parsing as the comment above says, but we don't. This sweeps the issue ++ * under the carpet. */ ++#if VCHI_RX_MSG_QUEUE_SIZE < (VCHI_MAX_MSG_SIZE/16 + 1) * VCHI_NUM_READ_SLOTS ++# undef VCHI_RX_MSG_QUEUE_SIZE ++# define VCHI_RX_MSG_QUEUE_SIZE (VCHI_MAX_MSG_SIZE/16 + 1) * VCHI_NUM_READ_SLOTS ++#endif ++ ++/* How many bulk transmits can we have pending. Once exhausted, vchi_bulk_queue_transmit ++ * will be blocked. */ ++#ifndef VCHI_TX_BULK_QUEUE_SIZE ++# define VCHI_TX_BULK_QUEUE_SIZE 64 ++#endif ++ ++/* How many bulk receives can we have pending. Once exhausted, vchi_bulk_queue_receive ++ * will be blocked. */ ++#ifndef VCHI_RX_BULK_QUEUE_SIZE ++# define VCHI_RX_BULK_QUEUE_SIZE 64 ++#endif ++ ++/* A limit on how many outstanding bulk requests we expect the peer to give us. If ++ * the peer asks for more than this, VCHI will fail and assert. The number is determined ++ * by the peer's hardware - it's the number of outstanding requests that can be queued ++ * on all bulk channels. VC3's MPHI peripheral allows 16. */ ++#ifndef VCHI_MAX_PEER_BULK_REQUESTS ++# define VCHI_MAX_PEER_BULK_REQUESTS 32 ++#endif ++ ++/* Define VCHI_CCP2TX_MANUAL_POWER if the host tells us when to turn the CCP2 ++ * transmitter on and off. ++ */ ++/*#define VCHI_CCP2TX_MANUAL_POWER*/ ++ ++#ifndef VCHI_CCP2TX_MANUAL_POWER ++ ++/* Timeout (in milliseconds) for putting the CCP2TX interface into IDLE state. Set ++ * negative for no IDLE. ++ */ ++# ifndef VCHI_CCP2TX_IDLE_TIMEOUT ++# define VCHI_CCP2TX_IDLE_TIMEOUT 5 ++# endif ++ ++/* Timeout (in milliseconds) for putting the CCP2TX interface into OFF state. Set ++ * negative for no OFF. ++ */ ++# ifndef VCHI_CCP2TX_OFF_TIMEOUT ++# define VCHI_CCP2TX_OFF_TIMEOUT 1000 ++# endif ++ ++#endif /* VCHI_CCP2TX_MANUAL_POWER */ ++ ++#endif /* VCHI_CFG_H_ */ ++ ++/****************************** End of file **********************************/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_cfg_internal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_cfg_internal.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,71 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHI_CFG_INTERNAL_H_ ++#define VCHI_CFG_INTERNAL_H_ ++ ++/**************************************************************************************** ++ * Control optimisation attempts. ++ ***************************************************************************************/ ++ ++// Don't use lots of short-term locks - use great long ones, reducing the overall locks-per-second ++#define VCHI_COARSE_LOCKING ++ ++// Avoid lock then unlock on exit from blocking queue operations (msg tx, bulk rx/tx) ++// (only relevant if VCHI_COARSE_LOCKING) ++#define VCHI_ELIDE_BLOCK_EXIT_LOCK ++ ++// Avoid lock on non-blocking peek ++// (only relevant if VCHI_COARSE_LOCKING) ++#define VCHI_AVOID_PEEK_LOCK ++ ++// Use one slot-handler thread per connection, rather than 1 thread dealing with all connections in rotation. ++#define VCHI_MULTIPLE_HANDLER_THREADS ++ ++// Put free descriptors onto the head of the free queue, rather than the tail, so that we don't thrash ++// our way through the pool of descriptors. ++#define VCHI_PUSH_FREE_DESCRIPTORS_ONTO_HEAD ++ ++// Don't issue a MSG_AVAILABLE callback for every single message. Possibly only safe if VCHI_COARSE_LOCKING. ++#define VCHI_FEWER_MSG_AVAILABLE_CALLBACKS ++ ++// Don't use message descriptors for TX messages that don't need them ++#define VCHI_MINIMISE_TX_MSG_DESCRIPTORS ++ ++// Nano-locks for multiqueue ++//#define VCHI_MQUEUE_NANOLOCKS ++ ++// Lock-free(er) dequeuing ++//#define VCHI_RX_NANOLOCKS ++ ++#endif /*VCHI_CFG_INTERNAL_H_*/ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_common.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_common.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,163 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHI_COMMON_H_ ++#define VCHI_COMMON_H_ ++ ++ ++//flags used when sending messages (must be bitmapped) ++typedef enum ++{ ++ VCHI_FLAGS_NONE = 0x0, ++ VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE = 0x1, // waits for message to be received, or sent (NB. not the same as being seen on other side) ++ VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE = 0x2, // run a callback when message sent ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED = 0x4, // return once the transfer is in a queue ready to go ++ VCHI_FLAGS_ALLOW_PARTIAL = 0x8, ++ VCHI_FLAGS_BLOCK_UNTIL_DATA_READ = 0x10, ++ VCHI_FLAGS_CALLBACK_WHEN_DATA_READ = 0x20, ++ ++ VCHI_FLAGS_ALIGN_SLOT = 0x000080, // internal use only ++ VCHI_FLAGS_BULK_AUX_QUEUED = 0x010000, // internal use only ++ VCHI_FLAGS_BULK_AUX_COMPLETE = 0x020000, // internal use only ++ VCHI_FLAGS_BULK_DATA_QUEUED = 0x040000, // internal use only ++ VCHI_FLAGS_BULK_DATA_COMPLETE = 0x080000, // internal use only ++ VCHI_FLAGS_INTERNAL = 0xFF0000 ++} VCHI_FLAGS_T; ++ ++// constants for vchi_crc_control() ++typedef enum { ++ VCHI_CRC_NOTHING = -1, ++ VCHI_CRC_PER_SERVICE = 0, ++ VCHI_CRC_EVERYTHING = 1, ++} VCHI_CRC_CONTROL_T; ++ ++//callback reasons when an event occurs on a service ++typedef enum ++{ ++ VCHI_CALLBACK_REASON_MIN, ++ ++ //This indicates that there is data available ++ //handle is the msg id that was transmitted with the data ++ // When a message is received and there was no FULL message available previously, send callback ++ // Tasks get kicked by the callback, reset their event and try and read from the fifo until it fails ++ VCHI_CALLBACK_MSG_AVAILABLE, ++ VCHI_CALLBACK_MSG_SENT, ++ VCHI_CALLBACK_MSG_SPACE_AVAILABLE, // XXX not yet implemented ++ ++ // This indicates that a transfer from the other side has completed ++ VCHI_CALLBACK_BULK_RECEIVED, ++ //This indicates that data queued up to be sent has now gone ++ //handle is the msg id that was used when sending the data ++ VCHI_CALLBACK_BULK_SENT, ++ VCHI_CALLBACK_BULK_RX_SPACE_AVAILABLE, // XXX not yet implemented ++ VCHI_CALLBACK_BULK_TX_SPACE_AVAILABLE, // XXX not yet implemented ++ ++ VCHI_CALLBACK_SERVICE_CLOSED, ++ ++ // this side has sent XOFF to peer due to lack of data consumption by service ++ // (suggests the service may need to take some recovery action if it has ++ // been deliberately holding off consuming data) ++ VCHI_CALLBACK_SENT_XOFF, ++ VCHI_CALLBACK_SENT_XON, ++ ++ // indicates that a bulk transfer has finished reading the source buffer ++ VCHI_CALLBACK_BULK_DATA_READ, ++ ++ // power notification events (currently host side only) ++ VCHI_CALLBACK_PEER_OFF, ++ VCHI_CALLBACK_PEER_SUSPENDED, ++ VCHI_CALLBACK_PEER_ON, ++ VCHI_CALLBACK_PEER_RESUMED, ++ VCHI_CALLBACK_FORCED_POWER_OFF, ++ ++#ifdef USE_VCHIQ_ARM ++ // some extra notifications provided by vchiq_arm ++ VCHI_CALLBACK_SERVICE_OPENED, ++ VCHI_CALLBACK_BULK_RECEIVE_ABORTED, ++ VCHI_CALLBACK_BULK_TRANSMIT_ABORTED, ++#endif ++ ++ VCHI_CALLBACK_REASON_MAX ++} VCHI_CALLBACK_REASON_T; ++ ++//Calback used by all services / bulk transfers ++typedef void (*VCHI_CALLBACK_T)( void *callback_param, //my service local param ++ VCHI_CALLBACK_REASON_T reason, ++ void *handle ); //for transmitting msg's only ++ ++ ++ ++/* ++ * Define vector struct for scatter-gather (vector) operations ++ * Vectors can be nested - if a vector element has negative length, then ++ * the data pointer is treated as pointing to another vector array, with ++ * '-vec_len' elements. Thus to append a header onto an existing vector, ++ * you can do this: ++ * ++ * void foo(const VCHI_MSG_VECTOR_T *v, int n) ++ * { ++ * VCHI_MSG_VECTOR_T nv[2]; ++ * nv[0].vec_base = my_header; ++ * nv[0].vec_len = sizeof my_header; ++ * nv[1].vec_base = v; ++ * nv[1].vec_len = -n; ++ * ... ++ * ++ */ ++typedef struct vchi_msg_vector { ++ const void *vec_base; ++ int32_t vec_len; ++} VCHI_MSG_VECTOR_T; ++ ++// Opaque type for a connection API ++typedef struct opaque_vchi_connection_api_t VCHI_CONNECTION_API_T; ++ ++// Opaque type for a message driver ++typedef struct opaque_vchi_message_driver_t VCHI_MESSAGE_DRIVER_T; ++ ++ ++// Iterator structure for reading ahead through received message queue. Allocated by client, ++// initialised by vchi_msg_look_ahead. Fields are for internal VCHI use only. ++// Iterates over messages in queue at the instant of the call to vchi_msg_lookahead - ++// will not proceed to messages received since. Behaviour is undefined if an iterator ++// is used again after messages for that service are removed/dequeued by any ++// means other than vchi_msg_iter_... calls on the iterator itself. ++typedef struct { ++ struct opaque_vchi_service_t *service; ++ void *last; ++ void *next; ++ void *remove; ++} VCHI_MSG_ITER_T; ++ ++ ++#endif // VCHI_COMMON_H_ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_mh.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchi/vchi_mh.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,42 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHI_MH_H_ ++#define VCHI_MH_H_ ++ ++#include ++ ++typedef int32_t VCHI_MEM_HANDLE_T; ++#define VCHI_MEM_HANDLE_INVALID 0 ++ ++#endif +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,41 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_VCHIQ_H ++#define VCHIQ_VCHIQ_H ++ ++#include "vchiq_if.h" ++#include "vchiq_util.h" ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_2835.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_2835.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,42 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_2835_H ++#define VCHIQ_2835_H ++ ++#include "vchiq_pagelist.h" ++ ++#define VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX 0 ++#define VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX 1 ++ ++#endif /* VCHIQ_2835_H */ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_2835_arm.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,538 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#include ++#include ++ ++#define TOTAL_SLOTS (VCHIQ_SLOT_ZERO_SLOTS + 2 * 32) ++ ++#define VCHIQ_DOORBELL_IRQ IRQ_ARM_DOORBELL_0 ++#define VCHIQ_ARM_ADDRESS(x) ((void *)__virt_to_bus((unsigned)x)) ++ ++#include "vchiq_arm.h" ++#include "vchiq_2835.h" ++#include "vchiq_connected.h" ++ ++#define MAX_FRAGMENTS (VCHIQ_NUM_CURRENT_BULKS * 2) ++ ++typedef struct vchiq_2835_state_struct { ++ int inited; ++ VCHIQ_ARM_STATE_T arm_state; ++} VCHIQ_2835_ARM_STATE_T; ++ ++static char *g_slot_mem; ++static int g_slot_mem_size; ++dma_addr_t g_slot_phys; ++static FRAGMENTS_T *g_fragments_base; ++static FRAGMENTS_T *g_free_fragments; ++struct semaphore g_free_fragments_sema; ++ ++extern int vchiq_arm_log_level; ++ ++static DEFINE_SEMAPHORE(g_free_fragments_mutex); ++ ++static irqreturn_t ++vchiq_doorbell_irq(int irq, void *dev_id); ++ ++static int ++create_pagelist(char __user *buf, size_t count, unsigned short type, ++ struct task_struct *task, PAGELIST_T ** ppagelist); ++ ++static void ++free_pagelist(PAGELIST_T *pagelist, int actual); ++ ++int __init ++vchiq_platform_init(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_SLOT_ZERO_T *vchiq_slot_zero; ++ int frag_mem_size; ++ int err; ++ int i; ++ ++ /* Allocate space for the channels in coherent memory */ ++ g_slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE); ++ frag_mem_size = PAGE_ALIGN(sizeof(FRAGMENTS_T) * MAX_FRAGMENTS); ++ ++ g_slot_mem = dma_alloc_coherent(NULL, g_slot_mem_size + frag_mem_size, ++ &g_slot_phys, GFP_ATOMIC); ++ ++ if (!g_slot_mem) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unable to allocate channel memory"); ++ err = -ENOMEM; ++ goto failed_alloc; ++ } ++ ++ WARN_ON(((int)g_slot_mem & (PAGE_SIZE - 1)) != 0); ++ ++ vchiq_slot_zero = vchiq_init_slots(g_slot_mem, g_slot_mem_size); ++ if (!vchiq_slot_zero) { ++ err = -EINVAL; ++ goto failed_init_slots; ++ } ++ ++ vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_OFFSET_IDX] = ++ (int)g_slot_phys + g_slot_mem_size; ++ vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] = ++ MAX_FRAGMENTS; ++ ++ g_fragments_base = (FRAGMENTS_T *)(g_slot_mem + g_slot_mem_size); ++ g_slot_mem_size += frag_mem_size; ++ ++ g_free_fragments = g_fragments_base; ++ for (i = 0; i < (MAX_FRAGMENTS - 1); i++) { ++ *(FRAGMENTS_T **)&g_fragments_base[i] = ++ &g_fragments_base[i + 1]; ++ } ++ *(FRAGMENTS_T **)&g_fragments_base[i] = NULL; ++ sema_init(&g_free_fragments_sema, MAX_FRAGMENTS); ++ ++ if (vchiq_init_state(state, vchiq_slot_zero, 0/*slave*/) != ++ VCHIQ_SUCCESS) { ++ err = -EINVAL; ++ goto failed_vchiq_init; ++ } ++ ++ err = request_irq(VCHIQ_DOORBELL_IRQ, vchiq_doorbell_irq, ++ IRQF_IRQPOLL, "VCHIQ doorbell", ++ state); ++ if (err < 0) { ++ vchiq_log_error(vchiq_arm_log_level, "%s: failed to register " ++ "irq=%d err=%d", __func__, ++ VCHIQ_DOORBELL_IRQ, err); ++ goto failed_request_irq; ++ } ++ ++ /* Send the base address of the slots to VideoCore */ ++ ++ dsb(); /* Ensure all writes have completed */ ++ ++ bcm_mailbox_write(MBOX_CHAN_VCHIQ, (unsigned int)g_slot_phys); ++ ++ vchiq_log_info(vchiq_arm_log_level, ++ "vchiq_init - done (slots %x, phys %x)", ++ (unsigned int)vchiq_slot_zero, g_slot_phys); ++ ++ vchiq_call_connected_callbacks(); ++ ++ return 0; ++ ++failed_request_irq: ++failed_vchiq_init: ++failed_init_slots: ++ dma_free_coherent(NULL, g_slot_mem_size, g_slot_mem, g_slot_phys); ++ ++failed_alloc: ++ return err; ++} ++ ++void __exit ++vchiq_platform_exit(VCHIQ_STATE_T *state) ++{ ++ free_irq(VCHIQ_DOORBELL_IRQ, state); ++ dma_free_coherent(NULL, g_slot_mem_size, ++ g_slot_mem, g_slot_phys); ++} ++ ++ ++VCHIQ_STATUS_T ++vchiq_platform_init_state(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ state->platform_state = kzalloc(sizeof(VCHIQ_2835_ARM_STATE_T), GFP_KERNEL); ++ ((VCHIQ_2835_ARM_STATE_T*)state->platform_state)->inited = 1; ++ status = vchiq_arm_init_state(state, &((VCHIQ_2835_ARM_STATE_T*)state->platform_state)->arm_state); ++ if(status != VCHIQ_SUCCESS) ++ { ++ ((VCHIQ_2835_ARM_STATE_T*)state->platform_state)->inited = 0; ++ } ++ return status; ++} ++ ++VCHIQ_ARM_STATE_T* ++vchiq_platform_get_arm_state(VCHIQ_STATE_T *state) ++{ ++ if(!((VCHIQ_2835_ARM_STATE_T*)state->platform_state)->inited) ++ { ++ BUG(); ++ } ++ return &((VCHIQ_2835_ARM_STATE_T*)state->platform_state)->arm_state; ++} ++ ++void ++remote_event_signal(REMOTE_EVENT_T *event) ++{ ++ wmb(); ++ ++ event->fired = 1; ++ ++ dsb(); /* data barrier operation */ ++ ++ if (event->armed) { ++ /* trigger vc interrupt */ ++ ++ writel(0, __io_address(ARM_0_BELL2)); ++ } ++} ++ ++int ++vchiq_copy_from_user(void *dst, const void *src, int size) ++{ ++ if ((uint32_t)src < TASK_SIZE) { ++ return copy_from_user(dst, src, size); ++ } else { ++ memcpy(dst, src, size); ++ return 0; ++ } ++} ++ ++VCHIQ_STATUS_T ++vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, VCHI_MEM_HANDLE_T memhandle, ++ void *offset, int size, int dir) ++{ ++ PAGELIST_T *pagelist; ++ int ret; ++ ++ WARN_ON(memhandle != VCHI_MEM_HANDLE_INVALID); ++ ++ ret = create_pagelist((char __user *)offset, size, ++ (dir == VCHIQ_BULK_RECEIVE) ++ ? PAGELIST_READ ++ : PAGELIST_WRITE, ++ current, ++ &pagelist); ++ if (ret != 0) ++ return VCHIQ_ERROR; ++ ++ bulk->handle = memhandle; ++ bulk->data = VCHIQ_ARM_ADDRESS(pagelist); ++ ++ /* Store the pagelist address in remote_data, which isn't used by the ++ slave. */ ++ bulk->remote_data = pagelist; ++ ++ return VCHIQ_SUCCESS; ++} ++ ++void ++vchiq_complete_bulk(VCHIQ_BULK_T *bulk) ++{ ++ if (bulk && bulk->remote_data && bulk->actual) ++ free_pagelist((PAGELIST_T *)bulk->remote_data, bulk->actual); ++} ++ ++void ++vchiq_transfer_bulk(VCHIQ_BULK_T *bulk) ++{ ++ /* ++ * This should only be called on the master (VideoCore) side, but ++ * provide an implementation to avoid the need for ifdefery. ++ */ ++ BUG(); ++} ++ ++void ++vchiq_dump_platform_state(void *dump_context) ++{ ++ char buf[80]; ++ int len; ++ len = snprintf(buf, sizeof(buf), ++ " Platform: 2835 (VC master)"); ++ vchiq_dump(dump_context, buf, len + 1); ++} ++ ++VCHIQ_STATUS_T ++vchiq_platform_suspend(VCHIQ_STATE_T *state) ++{ ++ return VCHIQ_ERROR; ++} ++ ++VCHIQ_STATUS_T ++vchiq_platform_resume(VCHIQ_STATE_T *state) ++{ ++ return VCHIQ_SUCCESS; ++} ++ ++void ++vchiq_platform_paused(VCHIQ_STATE_T *state) ++{ ++} ++ ++void ++vchiq_platform_resumed(VCHIQ_STATE_T *state) ++{ ++} ++ ++int ++vchiq_platform_videocore_wanted(VCHIQ_STATE_T* state) ++{ ++ return 1; // autosuspend not supported - videocore always wanted ++} ++ ++int ++vchiq_platform_use_suspend_timer(void) ++{ ++ return 0; ++} ++void ++vchiq_dump_platform_use_state(VCHIQ_STATE_T *state) ++{ ++ vchiq_log_info((vchiq_arm_log_level>=VCHIQ_LOG_INFO),"Suspend timer not in use"); ++} ++void ++vchiq_platform_handle_timeout(VCHIQ_STATE_T *state) ++{ ++ (void)state; ++} ++/* ++ * Local functions ++ */ ++ ++static irqreturn_t ++vchiq_doorbell_irq(int irq, void *dev_id) ++{ ++ VCHIQ_STATE_T *state = dev_id; ++ irqreturn_t ret = IRQ_NONE; ++ unsigned int status; ++ ++ /* Read (and clear) the doorbell */ ++ status = readl(__io_address(ARM_0_BELL0)); ++ ++ if (status & 0x4) { /* Was the doorbell rung? */ ++ remote_event_pollall(state); ++ ret = IRQ_HANDLED; ++ } ++ ++ return ret; ++} ++ ++/* There is a potential problem with partial cache lines (pages?) ++** at the ends of the block when reading. If the CPU accessed anything in ++** the same line (page?) then it may have pulled old data into the cache, ++** obscuring the new data underneath. We can solve this by transferring the ++** partial cache lines separately, and allowing the ARM to copy into the ++** cached area. ++ ++** N.B. This implementation plays slightly fast and loose with the Linux ++** driver programming rules, e.g. its use of __virt_to_bus instead of ++** dma_map_single, but it isn't a multi-platform driver and it benefits ++** from increased speed as a result. ++*/ ++ ++static int ++create_pagelist(char __user *buf, size_t count, unsigned short type, ++ struct task_struct *task, PAGELIST_T ** ppagelist) ++{ ++ PAGELIST_T *pagelist; ++ struct page **pages; ++ struct page *page; ++ unsigned long *addrs; ++ unsigned int num_pages, offset, i; ++ char *addr, *base_addr, *next_addr; ++ int run, addridx, actual_pages; ++ ++ offset = (unsigned int)buf & (PAGE_SIZE - 1); ++ num_pages = (count + offset + PAGE_SIZE - 1) / PAGE_SIZE; ++ ++ *ppagelist = NULL; ++ ++ /* Allocate enough storage to hold the page pointers and the page ++ ** list ++ */ ++ pagelist = kmalloc(sizeof(PAGELIST_T) + ++ (num_pages * sizeof(unsigned long)) + ++ (num_pages * sizeof(pages[0])), ++ GFP_KERNEL); ++ ++ vchiq_log_trace(vchiq_arm_log_level, ++ "create_pagelist - %x", (unsigned int)pagelist); ++ if (!pagelist) ++ return -ENOMEM; ++ ++ addrs = pagelist->addrs; ++ pages = (struct page **)(addrs + num_pages); ++ ++ down_read(&task->mm->mmap_sem); ++ actual_pages = get_user_pages(task, task->mm, ++ (unsigned long)buf & ~(PAGE_SIZE - 1), num_pages, ++ (type == PAGELIST_READ) /*Write */ , 0 /*Force */ , ++ pages, NULL /*vmas */); ++ up_read(&task->mm->mmap_sem); ++ ++ if (actual_pages != num_pages) ++ { ++ /* This is probably due to the process being killed */ ++ while (actual_pages > 0) ++ { ++ actual_pages--; ++ page_cache_release(pages[actual_pages]); ++ } ++ kfree(pagelist); ++ if (actual_pages == 0) ++ actual_pages = -ENOMEM; ++ return actual_pages; ++ } ++ ++ pagelist->length = count; ++ pagelist->type = type; ++ pagelist->offset = offset; ++ ++ /* Group the pages into runs of contiguous pages */ ++ ++ base_addr = VCHIQ_ARM_ADDRESS(page_address(pages[0])); ++ next_addr = base_addr + PAGE_SIZE; ++ addridx = 0; ++ run = 0; ++ ++ for (i = 1; i < num_pages; i++) { ++ addr = VCHIQ_ARM_ADDRESS(page_address(pages[i])); ++ if ((addr == next_addr) && (run < (PAGE_SIZE - 1))) { ++ next_addr += PAGE_SIZE; ++ run++; ++ } else { ++ addrs[addridx] = (unsigned long)base_addr + run; ++ addridx++; ++ base_addr = addr; ++ next_addr = addr + PAGE_SIZE; ++ run = 0; ++ } ++ } ++ ++ addrs[addridx] = (unsigned long)base_addr + run; ++ addridx++; ++ ++ /* Partial cache lines (fragments) require special measures */ ++ if ((type == PAGELIST_READ) && ++ ((pagelist->offset & (CACHE_LINE_SIZE - 1)) || ++ ((pagelist->offset + pagelist->length) & ++ (CACHE_LINE_SIZE - 1)))) { ++ FRAGMENTS_T *fragments; ++ ++ if (down_interruptible(&g_free_fragments_sema) != 0) { ++ kfree(pagelist); ++ return -EINTR; ++ } ++ ++ WARN_ON(g_free_fragments == NULL); ++ ++ down(&g_free_fragments_mutex); ++ fragments = (FRAGMENTS_T *) g_free_fragments; ++ WARN_ON(fragments == NULL); ++ g_free_fragments = *(FRAGMENTS_T **) g_free_fragments; ++ up(&g_free_fragments_mutex); ++ pagelist->type = ++ PAGELIST_READ_WITH_FRAGMENTS + (fragments - ++ g_fragments_base); ++ } ++ ++ for (page = virt_to_page(pagelist); ++ page <= virt_to_page(addrs + num_pages - 1); page++) { ++ flush_dcache_page(page); ++ } ++ ++ *ppagelist = pagelist; ++ ++ return 0; ++} ++ ++static void ++free_pagelist(PAGELIST_T *pagelist, int actual) ++{ ++ struct page **pages; ++ unsigned int num_pages, i; ++ ++ vchiq_log_trace(vchiq_arm_log_level, ++ "free_pagelist - %x, %d", (unsigned int)pagelist, actual); ++ ++ num_pages = ++ (pagelist->length + pagelist->offset + PAGE_SIZE - 1) / ++ PAGE_SIZE; ++ ++ pages = (struct page **)(pagelist->addrs + num_pages); ++ ++ /* Deal with any partial cache lines (fragments) */ ++ if (pagelist->type >= PAGELIST_READ_WITH_FRAGMENTS) { ++ FRAGMENTS_T *fragments = g_fragments_base + ++ (pagelist->type - PAGELIST_READ_WITH_FRAGMENTS); ++ int head_bytes, tail_bytes; ++ head_bytes = (CACHE_LINE_SIZE - pagelist->offset) & ++ (CACHE_LINE_SIZE - 1); ++ tail_bytes = (pagelist->offset + actual) & ++ (CACHE_LINE_SIZE - 1); ++ ++ if ((actual >= 0) && (head_bytes != 0)) { ++ if (head_bytes > actual) ++ head_bytes = actual; ++ ++ memcpy((char *)page_address(pages[0]) + ++ pagelist->offset, ++ fragments->headbuf, ++ head_bytes); ++ } ++ if ((actual >= 0) && (head_bytes < actual) && ++ (tail_bytes != 0)) { ++ memcpy((char *)page_address(pages[num_pages - 1]) + ++ ((pagelist->offset + actual) & ++ (PAGE_SIZE - 1) & ~(CACHE_LINE_SIZE - 1)), ++ fragments->tailbuf, tail_bytes); ++ } ++ ++ down(&g_free_fragments_mutex); ++ *(FRAGMENTS_T **) fragments = g_free_fragments; ++ g_free_fragments = fragments; ++ up(&g_free_fragments_mutex); ++ up(&g_free_fragments_sema); ++ } ++ ++ for (i = 0; i < num_pages; i++) { ++ if (pagelist->type != PAGELIST_WRITE) ++ set_page_dirty(pages[i]); ++ page_cache_release(pages[i]); ++ } ++ ++ kfree(pagelist); ++} +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,2813 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vchiq_core.h" ++#include "vchiq_ioctl.h" ++#include "vchiq_arm.h" ++ ++#define DEVICE_NAME "vchiq" ++ ++/* Override the default prefix, which would be vchiq_arm (from the filename) */ ++#undef MODULE_PARAM_PREFIX ++#define MODULE_PARAM_PREFIX DEVICE_NAME "." ++ ++#define VCHIQ_MINOR 0 ++ ++/* Some per-instance constants */ ++#define MAX_COMPLETIONS 16 ++#define MAX_SERVICES 64 ++#define MAX_ELEMENTS 8 ++#define MSG_QUEUE_SIZE 64 ++ ++#define KEEPALIVE_VER 1 ++#define KEEPALIVE_VER_MIN KEEPALIVE_VER ++ ++/* Run time control of log level, based on KERN_XXX level. */ ++int vchiq_arm_log_level = VCHIQ_LOG_DEFAULT; ++int vchiq_susp_log_level = VCHIQ_LOG_ERROR; ++ ++#define SUSPEND_TIMER_TIMEOUT_MS 100 ++#define SUSPEND_RETRY_TIMER_TIMEOUT_MS 1000 ++ ++#define VC_SUSPEND_NUM_OFFSET 3 /* number of values before idle which are -ve */ ++static const char *const suspend_state_names[] = { ++ "VC_SUSPEND_FORCE_CANCELED", ++ "VC_SUSPEND_REJECTED", ++ "VC_SUSPEND_FAILED", ++ "VC_SUSPEND_IDLE", ++ "VC_SUSPEND_REQUESTED", ++ "VC_SUSPEND_IN_PROGRESS", ++ "VC_SUSPEND_SUSPENDED" ++}; ++#define VC_RESUME_NUM_OFFSET 1 /* number of values before idle which are -ve */ ++static const char *const resume_state_names[] = { ++ "VC_RESUME_FAILED", ++ "VC_RESUME_IDLE", ++ "VC_RESUME_REQUESTED", ++ "VC_RESUME_IN_PROGRESS", ++ "VC_RESUME_RESUMED" ++}; ++/* The number of times we allow force suspend to timeout before actually ++** _forcing_ suspend. This is to cater for SW which fails to release vchiq ++** correctly - we don't want to prevent ARM suspend indefinitely in this case. ++*/ ++#define FORCE_SUSPEND_FAIL_MAX 8 ++ ++/* The time in ms allowed for videocore to go idle when force suspend has been ++ * requested */ ++#define FORCE_SUSPEND_TIMEOUT_MS 200 ++ ++ ++static void suspend_timer_callback(unsigned long context); ++static int vchiq_proc_add_instance(VCHIQ_INSTANCE_T instance); ++static void vchiq_proc_remove_instance(VCHIQ_INSTANCE_T instance); ++ ++ ++typedef struct user_service_struct { ++ VCHIQ_SERVICE_T *service; ++ void *userdata; ++ VCHIQ_INSTANCE_T instance; ++ int is_vchi; ++ int dequeue_pending; ++ int message_available_pos; ++ int msg_insert; ++ int msg_remove; ++ struct semaphore insert_event; ++ struct semaphore remove_event; ++ VCHIQ_HEADER_T * msg_queue[MSG_QUEUE_SIZE]; ++} USER_SERVICE_T; ++ ++struct bulk_waiter_node { ++ struct bulk_waiter bulk_waiter; ++ int pid; ++ struct list_head list; ++}; ++ ++struct vchiq_instance_struct { ++ VCHIQ_STATE_T *state; ++ VCHIQ_COMPLETION_DATA_T completions[MAX_COMPLETIONS]; ++ int completion_insert; ++ int completion_remove; ++ struct semaphore insert_event; ++ struct semaphore remove_event; ++ struct mutex completion_mutex; ++ ++ int connected; ++ int closing; ++ int pid; ++ int mark; ++ ++ struct list_head bulk_waiter_list; ++ struct mutex bulk_waiter_list_mutex; ++ ++ struct proc_dir_entry *proc_entry; ++}; ++ ++typedef struct dump_context_struct { ++ char __user *buf; ++ size_t actual; ++ size_t space; ++ loff_t offset; ++} DUMP_CONTEXT_T; ++ ++static struct cdev vchiq_cdev; ++static dev_t vchiq_devid; ++static VCHIQ_STATE_T g_state; ++static struct class *vchiq_class; ++static struct device *vchiq_dev; ++static DEFINE_SPINLOCK(msg_queue_spinlock); ++ ++static const char *const ioctl_names[] = { ++ "CONNECT", ++ "SHUTDOWN", ++ "CREATE_SERVICE", ++ "REMOVE_SERVICE", ++ "QUEUE_MESSAGE", ++ "QUEUE_BULK_TRANSMIT", ++ "QUEUE_BULK_RECEIVE", ++ "AWAIT_COMPLETION", ++ "DEQUEUE_MESSAGE", ++ "GET_CLIENT_ID", ++ "GET_CONFIG", ++ "CLOSE_SERVICE", ++ "USE_SERVICE", ++ "RELEASE_SERVICE", ++ "SET_SERVICE_OPTION", ++ "DUMP_PHYS_MEM" ++}; ++ ++vchiq_static_assert((sizeof(ioctl_names)/sizeof(ioctl_names[0])) == ++ (VCHIQ_IOC_MAX + 1)); ++ ++static void ++dump_phys_mem(void *virt_addr, uint32_t num_bytes); ++ ++/**************************************************************************** ++* ++* add_completion ++* ++***************************************************************************/ ++ ++static VCHIQ_STATUS_T ++add_completion(VCHIQ_INSTANCE_T instance, VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T *header, USER_SERVICE_T *user_service, ++ void *bulk_userdata) ++{ ++ VCHIQ_COMPLETION_DATA_T *completion; ++ DEBUG_INITIALISE(g_state.local) ++ ++ while (instance->completion_insert == ++ (instance->completion_remove + MAX_COMPLETIONS)) { ++ /* Out of space - wait for the client */ ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ vchiq_log_trace(vchiq_arm_log_level, ++ "add_completion - completion queue full"); ++ DEBUG_COUNT(COMPLETION_QUEUE_FULL_COUNT); ++ if (down_interruptible(&instance->remove_event) != 0) { ++ vchiq_log_info(vchiq_arm_log_level, ++ "service_callback interrupted"); ++ return VCHIQ_RETRY; ++ } else if (instance->closing) { ++ vchiq_log_info(vchiq_arm_log_level, ++ "service_callback closing"); ++ return VCHIQ_ERROR; ++ } ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ } ++ ++ completion = ++ &instance->completions[instance->completion_insert & ++ (MAX_COMPLETIONS - 1)]; ++ ++ completion->header = header; ++ completion->reason = reason; ++ /* N.B. service_userdata is updated while processing AWAIT_COMPLETION */ ++ completion->service_userdata = user_service->service; ++ completion->bulk_userdata = bulk_userdata; ++ ++ if (reason == VCHIQ_SERVICE_CLOSED) ++ /* Take an extra reference, to be held until ++ this CLOSED notification is delivered. */ ++ lock_service(user_service->service); ++ ++ /* A write barrier is needed here to ensure that the entire completion ++ record is written out before the insert point. */ ++ wmb(); ++ ++ if (reason == VCHIQ_MESSAGE_AVAILABLE) ++ user_service->message_available_pos = ++ instance->completion_insert; ++ instance->completion_insert++; ++ ++ up(&instance->insert_event); ++ ++ return VCHIQ_SUCCESS; ++} ++ ++/**************************************************************************** ++* ++* service_callback ++* ++***************************************************************************/ ++ ++static VCHIQ_STATUS_T ++service_callback(VCHIQ_REASON_T reason, VCHIQ_HEADER_T *header, ++ VCHIQ_SERVICE_HANDLE_T handle, void *bulk_userdata) ++{ ++ /* How do we ensure the callback goes to the right client? ++ ** The service_user data points to a USER_SERVICE_T record containing ++ ** the original callback and the user state structure, which contains a ++ ** circular buffer for completion records. ++ */ ++ USER_SERVICE_T *user_service; ++ VCHIQ_SERVICE_T *service; ++ VCHIQ_INSTANCE_T instance; ++ DEBUG_INITIALISE(g_state.local) ++ ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ ++ service = handle_to_service(handle); ++ BUG_ON(!service); ++ user_service = (USER_SERVICE_T *)service->base.userdata; ++ instance = user_service->instance; ++ ++ if (!instance || instance->closing) ++ return VCHIQ_SUCCESS; ++ ++ vchiq_log_trace(vchiq_arm_log_level, ++ "service_callback - service %lx(%d), reason %d, header %lx, " ++ "instance %lx, bulk_userdata %lx", ++ (unsigned long)user_service, ++ service->localport, ++ reason, (unsigned long)header, ++ (unsigned long)instance, (unsigned long)bulk_userdata); ++ ++ if (header && user_service->is_vchi) { ++ spin_lock(&msg_queue_spinlock); ++ while (user_service->msg_insert == ++ (user_service->msg_remove + MSG_QUEUE_SIZE)) { ++ spin_unlock(&msg_queue_spinlock); ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ DEBUG_COUNT(MSG_QUEUE_FULL_COUNT); ++ vchiq_log_trace(vchiq_arm_log_level, ++ "service_callback - msg queue full"); ++ /* If there is no MESSAGE_AVAILABLE in the completion ++ ** queue, add one ++ */ ++ if ((user_service->message_available_pos - ++ instance->completion_remove) < 0) { ++ VCHIQ_STATUS_T status; ++ vchiq_log_info(vchiq_arm_log_level, ++ "Inserting extra MESSAGE_AVAILABLE"); ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ status = add_completion(instance, reason, ++ NULL, user_service, bulk_userdata); ++ if (status != VCHIQ_SUCCESS) { ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ return status; ++ } ++ } ++ ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ if (down_interruptible(&user_service->remove_event) ++ != 0) { ++ vchiq_log_info(vchiq_arm_log_level, ++ "service_callback interrupted"); ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ return VCHIQ_RETRY; ++ } else if (instance->closing) { ++ vchiq_log_info(vchiq_arm_log_level, ++ "service_callback closing"); ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ return VCHIQ_ERROR; ++ } ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ spin_lock(&msg_queue_spinlock); ++ } ++ ++ user_service->msg_queue[user_service->msg_insert & ++ (MSG_QUEUE_SIZE - 1)] = header; ++ user_service->msg_insert++; ++ spin_unlock(&msg_queue_spinlock); ++ ++ up(&user_service->insert_event); ++ ++ /* If there is a thread waiting in DEQUEUE_MESSAGE, or if ++ ** there is a MESSAGE_AVAILABLE in the completion queue then ++ ** bypass the completion queue. ++ */ ++ if (((user_service->message_available_pos - ++ instance->completion_remove) >= 0) || ++ user_service->dequeue_pending) { ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ user_service->dequeue_pending = 0; ++ return VCHIQ_SUCCESS; ++ } ++ ++ header = NULL; ++ } ++ DEBUG_TRACE(SERVICE_CALLBACK_LINE); ++ ++ return add_completion(instance, reason, header, user_service, ++ bulk_userdata); ++} ++ ++/**************************************************************************** ++* ++* user_service_free ++* ++***************************************************************************/ ++static void ++user_service_free(void *userdata) ++{ ++ kfree(userdata); ++} ++ ++/**************************************************************************** ++* ++* vchiq_ioctl ++* ++***************************************************************************/ ++ ++static long ++vchiq_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ VCHIQ_INSTANCE_T instance = file->private_data; ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ VCHIQ_SERVICE_T *service = NULL; ++ long ret = 0; ++ int i, rc; ++ DEBUG_INITIALISE(g_state.local) ++ ++ vchiq_log_trace(vchiq_arm_log_level, ++ "vchiq_ioctl - instance %x, cmd %s, arg %lx", ++ (unsigned int)instance, ++ ((_IOC_TYPE(cmd) == VCHIQ_IOC_MAGIC) && ++ (_IOC_NR(cmd) <= VCHIQ_IOC_MAX)) ? ++ ioctl_names[_IOC_NR(cmd)] : "", arg); ++ ++ switch (cmd) { ++ case VCHIQ_IOC_SHUTDOWN: ++ if (!instance->connected) ++ break; ++ ++ /* Remove all services */ ++ i = 0; ++ while ((service = next_service_by_instance(instance->state, ++ instance, &i)) != NULL) { ++ status = vchiq_remove_service(service->handle); ++ unlock_service(service); ++ if (status != VCHIQ_SUCCESS) ++ break; ++ } ++ service = NULL; ++ ++ if (status == VCHIQ_SUCCESS) { ++ /* Wake the completion thread and ask it to exit */ ++ instance->closing = 1; ++ up(&instance->insert_event); ++ } ++ ++ break; ++ ++ case VCHIQ_IOC_CONNECT: ++ if (instance->connected) { ++ ret = -EINVAL; ++ break; ++ } ++ rc = mutex_lock_interruptible(&instance->state->mutex); ++ if (rc != 0) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "vchiq: connect: could not lock mutex for " ++ "state %d: %d", ++ instance->state->id, rc); ++ ret = -EINTR; ++ break; ++ } ++ status = vchiq_connect_internal(instance->state, instance); ++ mutex_unlock(&instance->state->mutex); ++ ++ if (status == VCHIQ_SUCCESS) ++ instance->connected = 1; ++ else ++ vchiq_log_error(vchiq_arm_log_level, ++ "vchiq: could not connect: %d", status); ++ break; ++ ++ case VCHIQ_IOC_CREATE_SERVICE: { ++ VCHIQ_CREATE_SERVICE_T args; ++ USER_SERVICE_T *user_service = NULL; ++ void *userdata; ++ int srvstate; ++ ++ if (copy_from_user ++ (&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ user_service = kmalloc(sizeof(USER_SERVICE_T), GFP_KERNEL); ++ if (!user_service) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ if (args.is_open) { ++ if (!instance->connected) { ++ ret = -ENOTCONN; ++ kfree(user_service); ++ break; ++ } ++ srvstate = VCHIQ_SRVSTATE_OPENING; ++ } else { ++ srvstate = ++ instance->connected ? ++ VCHIQ_SRVSTATE_LISTENING : ++ VCHIQ_SRVSTATE_HIDDEN; ++ } ++ ++ userdata = args.params.userdata; ++ args.params.callback = service_callback; ++ args.params.userdata = user_service; ++ service = vchiq_add_service_internal( ++ instance->state, ++ &args.params, srvstate, ++ instance, user_service_free); ++ ++ if (service != NULL) { ++ user_service->service = service; ++ user_service->userdata = userdata; ++ user_service->instance = instance; ++ user_service->is_vchi = args.is_vchi; ++ user_service->dequeue_pending = 0; ++ user_service->message_available_pos = ++ instance->completion_remove - 1; ++ user_service->msg_insert = 0; ++ user_service->msg_remove = 0; ++ sema_init(&user_service->insert_event, 0); ++ sema_init(&user_service->remove_event, 0); ++ ++ if (args.is_open) { ++ status = vchiq_open_service_internal ++ (service, instance->pid); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_remove_service(service->handle); ++ service = NULL; ++ ret = (status == VCHIQ_RETRY) ? ++ -EINTR : -EIO; ++ break; ++ } ++ } ++ ++ if (copy_to_user((void __user *) ++ &(((VCHIQ_CREATE_SERVICE_T __user *) ++ arg)->handle), ++ (const void *)&service->handle, ++ sizeof(service->handle)) != 0) { ++ ret = -EFAULT; ++ vchiq_remove_service(service->handle); ++ } ++ ++ service = NULL; ++ } else { ++ ret = -EEXIST; ++ kfree(user_service); ++ } ++ } break; ++ ++ case VCHIQ_IOC_CLOSE_SERVICE: { ++ VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; ++ ++ service = find_service_for_instance(instance, handle); ++ if (service != NULL) ++ status = vchiq_close_service(service->handle); ++ else ++ ret = -EINVAL; ++ } break; ++ ++ case VCHIQ_IOC_REMOVE_SERVICE: { ++ VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; ++ ++ service = find_service_for_instance(instance, handle); ++ if (service != NULL) ++ status = vchiq_remove_service(service->handle); ++ else ++ ret = -EINVAL; ++ } break; ++ ++ case VCHIQ_IOC_USE_SERVICE: ++ case VCHIQ_IOC_RELEASE_SERVICE: { ++ VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; ++ ++ service = find_service_for_instance(instance, handle); ++ if (service != NULL) { ++ status = (cmd == VCHIQ_IOC_USE_SERVICE) ? ++ vchiq_use_service_internal(service) : ++ vchiq_release_service_internal(service); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s: cmd %s returned error %d for " ++ "service %c%c%c%c:%03d", ++ __func__, ++ (cmd == VCHIQ_IOC_USE_SERVICE) ? ++ "VCHIQ_IOC_USE_SERVICE" : ++ "VCHIQ_IOC_RELEASE_SERVICE", ++ status, ++ VCHIQ_FOURCC_AS_4CHARS( ++ service->base.fourcc), ++ service->client_id); ++ ret = -EINVAL; ++ } ++ } else ++ ret = -EINVAL; ++ } break; ++ ++ case VCHIQ_IOC_QUEUE_MESSAGE: { ++ VCHIQ_QUEUE_MESSAGE_T args; ++ if (copy_from_user ++ (&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ service = find_service_for_instance(instance, args.handle); ++ ++ if ((service != NULL) && (args.count <= MAX_ELEMENTS)) { ++ /* Copy elements into kernel space */ ++ VCHIQ_ELEMENT_T elements[MAX_ELEMENTS]; ++ if (copy_from_user(elements, args.elements, ++ args.count * sizeof(VCHIQ_ELEMENT_T)) == 0) ++ status = vchiq_queue_message ++ (args.handle, ++ elements, args.count); ++ else ++ ret = -EFAULT; ++ } else { ++ ret = -EINVAL; ++ } ++ } break; ++ ++ case VCHIQ_IOC_QUEUE_BULK_TRANSMIT: ++ case VCHIQ_IOC_QUEUE_BULK_RECEIVE: { ++ VCHIQ_QUEUE_BULK_TRANSFER_T args; ++ struct bulk_waiter_node *waiter = NULL; ++ VCHIQ_BULK_DIR_T dir = ++ (cmd == VCHIQ_IOC_QUEUE_BULK_TRANSMIT) ? ++ VCHIQ_BULK_TRANSMIT : VCHIQ_BULK_RECEIVE; ++ ++ if (copy_from_user ++ (&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ service = find_service_for_instance(instance, args.handle); ++ if (!service) { ++ ret = -EINVAL; ++ break; ++ } ++ ++ if (args.mode == VCHIQ_BULK_MODE_BLOCKING) { ++ waiter = kzalloc(sizeof(struct bulk_waiter_node), ++ GFP_KERNEL); ++ if (!waiter) { ++ ret = -ENOMEM; ++ break; ++ } ++ args.userdata = &waiter->bulk_waiter; ++ } else if (args.mode == VCHIQ_BULK_MODE_WAITING) { ++ struct list_head *pos; ++ mutex_lock(&instance->bulk_waiter_list_mutex); ++ list_for_each(pos, &instance->bulk_waiter_list) { ++ if (list_entry(pos, struct bulk_waiter_node, ++ list)->pid == current->pid) { ++ waiter = list_entry(pos, ++ struct bulk_waiter_node, ++ list); ++ list_del(pos); ++ break; ++ } ++ ++ } ++ mutex_unlock(&instance->bulk_waiter_list_mutex); ++ if (!waiter) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "no bulk_waiter found for pid %d", ++ current->pid); ++ ret = -ESRCH; ++ break; ++ } ++ vchiq_log_info(vchiq_arm_log_level, ++ "found bulk_waiter %x for pid %d", ++ (unsigned int)waiter, current->pid); ++ args.userdata = &waiter->bulk_waiter; ++ } ++ status = vchiq_bulk_transfer ++ (args.handle, ++ VCHI_MEM_HANDLE_INVALID, ++ args.data, args.size, ++ args.userdata, args.mode, ++ dir); ++ if (!waiter) ++ break; ++ if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || ++ !waiter->bulk_waiter.bulk) { ++ if (waiter->bulk_waiter.bulk) { ++ /* Cancel the signal when the transfer ++ ** completes. */ ++ spin_lock(&bulk_waiter_spinlock); ++ waiter->bulk_waiter.bulk->userdata = NULL; ++ spin_unlock(&bulk_waiter_spinlock); ++ } ++ kfree(waiter); ++ } else { ++ const VCHIQ_BULK_MODE_T mode_waiting = ++ VCHIQ_BULK_MODE_WAITING; ++ waiter->pid = current->pid; ++ mutex_lock(&instance->bulk_waiter_list_mutex); ++ list_add(&waiter->list, &instance->bulk_waiter_list); ++ mutex_unlock(&instance->bulk_waiter_list_mutex); ++ vchiq_log_info(vchiq_arm_log_level, ++ "saved bulk_waiter %x for pid %d", ++ (unsigned int)waiter, current->pid); ++ ++ if (copy_to_user((void __user *) ++ &(((VCHIQ_QUEUE_BULK_TRANSFER_T __user *) ++ arg)->mode), ++ (const void *)&mode_waiting, ++ sizeof(mode_waiting)) != 0) ++ ret = -EFAULT; ++ } ++ } break; ++ ++ case VCHIQ_IOC_AWAIT_COMPLETION: { ++ VCHIQ_AWAIT_COMPLETION_T args; ++ ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ if (!instance->connected) { ++ ret = -ENOTCONN; ++ break; ++ } ++ ++ if (copy_from_user(&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ mutex_lock(&instance->completion_mutex); ++ ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ while ((instance->completion_remove == ++ instance->completion_insert) ++ && !instance->closing) { ++ int rc; ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ mutex_unlock(&instance->completion_mutex); ++ rc = down_interruptible(&instance->insert_event); ++ mutex_lock(&instance->completion_mutex); ++ if (rc != 0) { ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ vchiq_log_info(vchiq_arm_log_level, ++ "AWAIT_COMPLETION interrupted"); ++ ret = -EINTR; ++ break; ++ } ++ } ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ ++ /* A read memory barrier is needed to stop prefetch of a stale ++ ** completion record ++ */ ++ rmb(); ++ ++ if (ret == 0) { ++ int msgbufcount = args.msgbufcount; ++ for (ret = 0; ret < args.count; ret++) { ++ VCHIQ_COMPLETION_DATA_T *completion; ++ VCHIQ_SERVICE_T *service; ++ USER_SERVICE_T *user_service; ++ VCHIQ_HEADER_T *header; ++ if (instance->completion_remove == ++ instance->completion_insert) ++ break; ++ completion = &instance->completions[ ++ instance->completion_remove & ++ (MAX_COMPLETIONS - 1)]; ++ ++ service = completion->service_userdata; ++ user_service = service->base.userdata; ++ completion->service_userdata = ++ user_service->userdata; ++ ++ header = completion->header; ++ if (header) { ++ void __user *msgbuf; ++ int msglen; ++ ++ msglen = header->size + ++ sizeof(VCHIQ_HEADER_T); ++ /* This must be a VCHIQ-style service */ ++ if (args.msgbufsize < msglen) { ++ vchiq_log_error( ++ vchiq_arm_log_level, ++ "header %x: msgbufsize" ++ " %x < msglen %x", ++ (unsigned int)header, ++ args.msgbufsize, ++ msglen); ++ WARN(1, "invalid message " ++ "size\n"); ++ if (ret == 0) ++ ret = -EMSGSIZE; ++ break; ++ } ++ if (msgbufcount <= 0) ++ /* Stall here for lack of a ++ ** buffer for the message. */ ++ break; ++ /* Get the pointer from user space */ ++ msgbufcount--; ++ if (copy_from_user(&msgbuf, ++ (const void __user *) ++ &args.msgbufs[msgbufcount], ++ sizeof(msgbuf)) != 0) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ ++ /* Copy the message to user space */ ++ if (copy_to_user(msgbuf, header, ++ msglen) != 0) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ ++ /* Now it has been copied, the message ++ ** can be released. */ ++ vchiq_release_message(service->handle, ++ header); ++ ++ /* The completion must point to the ++ ** msgbuf. */ ++ completion->header = msgbuf; ++ } ++ ++ if (completion->reason == ++ VCHIQ_SERVICE_CLOSED) ++ unlock_service(service); ++ ++ if (copy_to_user((void __user *)( ++ (size_t)args.buf + ++ ret * sizeof(VCHIQ_COMPLETION_DATA_T)), ++ completion, ++ sizeof(VCHIQ_COMPLETION_DATA_T)) != 0) { ++ if (ret == 0) ++ ret = -EFAULT; ++ break; ++ } ++ ++ instance->completion_remove++; ++ } ++ ++ if (msgbufcount != args.msgbufcount) { ++ if (copy_to_user((void __user *) ++ &((VCHIQ_AWAIT_COMPLETION_T *)arg)-> ++ msgbufcount, ++ &msgbufcount, ++ sizeof(msgbufcount)) != 0) { ++ ret = -EFAULT; ++ } ++ } ++ } ++ ++ if (ret != 0) ++ up(&instance->remove_event); ++ mutex_unlock(&instance->completion_mutex); ++ DEBUG_TRACE(AWAIT_COMPLETION_LINE); ++ } break; ++ ++ case VCHIQ_IOC_DEQUEUE_MESSAGE: { ++ VCHIQ_DEQUEUE_MESSAGE_T args; ++ USER_SERVICE_T *user_service; ++ VCHIQ_HEADER_T *header; ++ ++ DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); ++ if (copy_from_user ++ (&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ service = find_service_for_instance(instance, args.handle); ++ if (!service) { ++ ret = -EINVAL; ++ break; ++ } ++ user_service = (USER_SERVICE_T *)service->base.userdata; ++ if (user_service->is_vchi == 0) { ++ ret = -EINVAL; ++ break; ++ } ++ ++ spin_lock(&msg_queue_spinlock); ++ if (user_service->msg_remove == user_service->msg_insert) { ++ if (!args.blocking) { ++ spin_unlock(&msg_queue_spinlock); ++ DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); ++ ret = -EWOULDBLOCK; ++ break; ++ } ++ user_service->dequeue_pending = 1; ++ do { ++ spin_unlock(&msg_queue_spinlock); ++ DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); ++ if (down_interruptible( ++ &user_service->insert_event) != 0) { ++ vchiq_log_info(vchiq_arm_log_level, ++ "DEQUEUE_MESSAGE interrupted"); ++ ret = -EINTR; ++ break; ++ } ++ spin_lock(&msg_queue_spinlock); ++ } while (user_service->msg_remove == ++ user_service->msg_insert); ++ ++ if (ret) ++ break; ++ } ++ ++ BUG_ON((int)(user_service->msg_insert - ++ user_service->msg_remove) < 0); ++ ++ header = user_service->msg_queue[user_service->msg_remove & ++ (MSG_QUEUE_SIZE - 1)]; ++ user_service->msg_remove++; ++ spin_unlock(&msg_queue_spinlock); ++ ++ up(&user_service->remove_event); ++ if (header == NULL) ++ ret = -ENOTCONN; ++ else if (header->size <= args.bufsize) { ++ /* Copy to user space if msgbuf is not NULL */ ++ if ((args.buf == NULL) || ++ (copy_to_user((void __user *)args.buf, ++ header->data, ++ header->size) == 0)) { ++ ret = header->size; ++ vchiq_release_message( ++ service->handle, ++ header); ++ } else ++ ret = -EFAULT; ++ } else { ++ vchiq_log_error(vchiq_arm_log_level, ++ "header %x: bufsize %x < size %x", ++ (unsigned int)header, args.bufsize, ++ header->size); ++ WARN(1, "invalid size\n"); ++ ret = -EMSGSIZE; ++ } ++ DEBUG_TRACE(DEQUEUE_MESSAGE_LINE); ++ } break; ++ ++ case VCHIQ_IOC_GET_CLIENT_ID: { ++ VCHIQ_SERVICE_HANDLE_T handle = (VCHIQ_SERVICE_HANDLE_T)arg; ++ ++ ret = vchiq_get_client_id(handle); ++ } break; ++ ++ case VCHIQ_IOC_GET_CONFIG: { ++ VCHIQ_GET_CONFIG_T args; ++ VCHIQ_CONFIG_T config; ++ ++ if (copy_from_user(&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ if (args.config_size > sizeof(config)) { ++ ret = -EINVAL; ++ break; ++ } ++ status = vchiq_get_config(instance, args.config_size, &config); ++ if (status == VCHIQ_SUCCESS) { ++ if (copy_to_user((void __user *)args.pconfig, ++ &config, args.config_size) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ } ++ } break; ++ ++ case VCHIQ_IOC_SET_SERVICE_OPTION: { ++ VCHIQ_SET_SERVICE_OPTION_T args; ++ ++ if (copy_from_user( ++ &args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ ++ service = find_service_for_instance(instance, args.handle); ++ if (!service) { ++ ret = -EINVAL; ++ break; ++ } ++ ++ status = vchiq_set_service_option( ++ args.handle, args.option, args.value); ++ } break; ++ ++ case VCHIQ_IOC_DUMP_PHYS_MEM: { ++ VCHIQ_DUMP_MEM_T args; ++ ++ if (copy_from_user ++ (&args, (const void __user *)arg, ++ sizeof(args)) != 0) { ++ ret = -EFAULT; ++ break; ++ } ++ dump_phys_mem(args.virt_addr, args.num_bytes); ++ } break; ++ ++ default: ++ ret = -ENOTTY; ++ break; ++ } ++ ++ if (service) ++ unlock_service(service); ++ ++ if (ret == 0) { ++ if (status == VCHIQ_ERROR) ++ ret = -EIO; ++ else if (status == VCHIQ_RETRY) ++ ret = -EINTR; ++ } ++ ++ if ((status == VCHIQ_SUCCESS) && (ret < 0) && (ret != -EINTR) && ++ (ret != -EWOULDBLOCK)) ++ vchiq_log_info(vchiq_arm_log_level, ++ " ioctl instance %lx, cmd %s -> status %d, %ld", ++ (unsigned long)instance, ++ (_IOC_NR(cmd) <= VCHIQ_IOC_MAX) ? ++ ioctl_names[_IOC_NR(cmd)] : ++ "", ++ status, ret); ++ else ++ vchiq_log_trace(vchiq_arm_log_level, ++ " ioctl instance %lx, cmd %s -> status %d, %ld", ++ (unsigned long)instance, ++ (_IOC_NR(cmd) <= VCHIQ_IOC_MAX) ? ++ ioctl_names[_IOC_NR(cmd)] : ++ "", ++ status, ret); ++ ++ return ret; ++} ++ ++/**************************************************************************** ++* ++* vchiq_open ++* ++***************************************************************************/ ++ ++static int ++vchiq_open(struct inode *inode, struct file *file) ++{ ++ int dev = iminor(inode) & 0x0f; ++ vchiq_log_info(vchiq_arm_log_level, "vchiq_open"); ++ switch (dev) { ++ case VCHIQ_MINOR: { ++ int ret; ++ VCHIQ_STATE_T *state = vchiq_get_state(); ++ VCHIQ_INSTANCE_T instance; ++ ++ if (!state) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "vchiq has no connection to VideoCore"); ++ return -ENOTCONN; ++ } ++ ++ instance = kzalloc(sizeof(*instance), GFP_KERNEL); ++ if (!instance) ++ return -ENOMEM; ++ ++ instance->state = state; ++ instance->pid = current->tgid; ++ ++ ret = vchiq_proc_add_instance(instance); ++ if (ret != 0) { ++ kfree(instance); ++ return ret; ++ } ++ ++ sema_init(&instance->insert_event, 0); ++ sema_init(&instance->remove_event, 0); ++ mutex_init(&instance->completion_mutex); ++ mutex_init(&instance->bulk_waiter_list_mutex); ++ INIT_LIST_HEAD(&instance->bulk_waiter_list); ++ ++ file->private_data = instance; ++ } break; ++ ++ default: ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unknown minor device: %d", dev); ++ return -ENXIO; ++ } ++ ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vchiq_release ++* ++***************************************************************************/ ++ ++static int ++vchiq_release(struct inode *inode, struct file *file) ++{ ++ int dev = iminor(inode) & 0x0f; ++ int ret = 0; ++ switch (dev) { ++ case VCHIQ_MINOR: { ++ VCHIQ_INSTANCE_T instance = file->private_data; ++ VCHIQ_STATE_T *state = vchiq_get_state(); ++ VCHIQ_SERVICE_T *service; ++ int i; ++ ++ vchiq_log_info(vchiq_arm_log_level, ++ "vchiq_release: instance=%lx", ++ (unsigned long)instance); ++ ++ if (!state) { ++ ret = -EPERM; ++ goto out; ++ } ++ ++ /* Ensure videocore is awake to allow termination. */ ++ vchiq_use_internal(instance->state, NULL, ++ USE_TYPE_VCHIQ); ++ ++ mutex_lock(&instance->completion_mutex); ++ ++ /* Wake the completion thread and ask it to exit */ ++ instance->closing = 1; ++ up(&instance->insert_event); ++ ++ mutex_unlock(&instance->completion_mutex); ++ ++ /* Wake the slot handler if the completion queue is full. */ ++ up(&instance->remove_event); ++ ++ /* Mark all services for termination... */ ++ i = 0; ++ while ((service = next_service_by_instance(state, instance, ++ &i)) != NULL) { ++ USER_SERVICE_T *user_service = service->base.userdata; ++ ++ /* Wake the slot handler if the msg queue is full. */ ++ up(&user_service->remove_event); ++ ++ vchiq_terminate_service_internal(service); ++ unlock_service(service); ++ } ++ ++ /* ...and wait for them to die */ ++ i = 0; ++ while ((service = next_service_by_instance(state, instance, &i)) ++ != NULL) { ++ USER_SERVICE_T *user_service = service->base.userdata; ++ ++ down(&service->remove_event); ++ ++ BUG_ON(service->srvstate != VCHIQ_SRVSTATE_FREE); ++ ++ spin_lock(&msg_queue_spinlock); ++ ++ while (user_service->msg_remove != ++ user_service->msg_insert) { ++ VCHIQ_HEADER_T *header = user_service-> ++ msg_queue[user_service->msg_remove & ++ (MSG_QUEUE_SIZE - 1)]; ++ user_service->msg_remove++; ++ spin_unlock(&msg_queue_spinlock); ++ ++ if (header) ++ vchiq_release_message( ++ service->handle, ++ header); ++ spin_lock(&msg_queue_spinlock); ++ } ++ ++ spin_unlock(&msg_queue_spinlock); ++ ++ unlock_service(service); ++ } ++ ++ /* Release any closed services */ ++ while (instance->completion_remove != ++ instance->completion_insert) { ++ VCHIQ_COMPLETION_DATA_T *completion; ++ VCHIQ_SERVICE_T *service; ++ completion = &instance->completions[ ++ instance->completion_remove & ++ (MAX_COMPLETIONS - 1)]; ++ service = completion->service_userdata; ++ if (completion->reason == VCHIQ_SERVICE_CLOSED) ++ unlock_service(service); ++ instance->completion_remove++; ++ } ++ ++ /* Release the PEER service count. */ ++ vchiq_release_internal(instance->state, NULL); ++ ++ { ++ struct list_head *pos, *next; ++ list_for_each_safe(pos, next, ++ &instance->bulk_waiter_list) { ++ struct bulk_waiter_node *waiter; ++ waiter = list_entry(pos, ++ struct bulk_waiter_node, ++ list); ++ list_del(pos); ++ vchiq_log_info(vchiq_arm_log_level, ++ "bulk_waiter - cleaned up %x " ++ "for pid %d", ++ (unsigned int)waiter, waiter->pid); ++ kfree(waiter); ++ } ++ } ++ ++ vchiq_proc_remove_instance(instance); ++ ++ kfree(instance); ++ file->private_data = NULL; ++ } break; ++ ++ default: ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unknown minor device: %d", dev); ++ ret = -ENXIO; ++ } ++ ++out: ++ return ret; ++} ++ ++/**************************************************************************** ++* ++* vchiq_dump ++* ++***************************************************************************/ ++ ++void ++vchiq_dump(void *dump_context, const char *str, int len) ++{ ++ DUMP_CONTEXT_T *context = (DUMP_CONTEXT_T *)dump_context; ++ ++ if (context->actual < context->space) { ++ int copy_bytes; ++ if (context->offset > 0) { ++ int skip_bytes = min(len, (int)context->offset); ++ str += skip_bytes; ++ len -= skip_bytes; ++ context->offset -= skip_bytes; ++ if (context->offset > 0) ++ return; ++ } ++ copy_bytes = min(len, (int)(context->space - context->actual)); ++ if (copy_bytes == 0) ++ return; ++ if (copy_to_user(context->buf + context->actual, str, ++ copy_bytes)) ++ context->actual = -EFAULT; ++ context->actual += copy_bytes; ++ len -= copy_bytes; ++ ++ /* If tne terminating NUL is included in the length, then it ++ ** marks the end of a line and should be replaced with a ++ ** carriage return. */ ++ if ((len == 0) && (str[copy_bytes - 1] == '\0')) { ++ char cr = '\n'; ++ if (copy_to_user(context->buf + context->actual - 1, ++ &cr, 1)) ++ context->actual = -EFAULT; ++ } ++ } ++} ++ ++/**************************************************************************** ++* ++* vchiq_dump_platform_instance_state ++* ++***************************************************************************/ ++ ++void ++vchiq_dump_platform_instances(void *dump_context) ++{ ++ VCHIQ_STATE_T *state = vchiq_get_state(); ++ char buf[80]; ++ int len; ++ int i; ++ ++ /* There is no list of instances, so instead scan all services, ++ marking those that have been dumped. */ ++ ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = state->services[i]; ++ VCHIQ_INSTANCE_T instance; ++ ++ if (service && (service->base.callback == service_callback)) { ++ instance = service->instance; ++ if (instance) ++ instance->mark = 0; ++ } ++ } ++ ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = state->services[i]; ++ VCHIQ_INSTANCE_T instance; ++ ++ if (service && (service->base.callback == service_callback)) { ++ instance = service->instance; ++ if (instance && !instance->mark) { ++ len = snprintf(buf, sizeof(buf), ++ "Instance %x: pid %d,%s completions " ++ "%d/%d", ++ (unsigned int)instance, instance->pid, ++ instance->connected ? " connected, " : ++ "", ++ instance->completion_insert - ++ instance->completion_remove, ++ MAX_COMPLETIONS); ++ ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ instance->mark = 1; ++ } ++ } ++ } ++} ++ ++/**************************************************************************** ++* ++* vchiq_dump_platform_service_state ++* ++***************************************************************************/ ++ ++void ++vchiq_dump_platform_service_state(void *dump_context, VCHIQ_SERVICE_T *service) ++{ ++ USER_SERVICE_T *user_service = (USER_SERVICE_T *)service->base.userdata; ++ char buf[80]; ++ int len; ++ ++ len = snprintf(buf, sizeof(buf), " instance %x", ++ (unsigned int)service->instance); ++ ++ if ((service->base.callback == service_callback) && ++ user_service->is_vchi) { ++ len += snprintf(buf + len, sizeof(buf) - len, ++ ", %d/%d messages", ++ user_service->msg_insert - user_service->msg_remove, ++ MSG_QUEUE_SIZE); ++ ++ if (user_service->dequeue_pending) ++ len += snprintf(buf + len, sizeof(buf) - len, ++ " (dequeue pending)"); ++ } ++ ++ vchiq_dump(dump_context, buf, len + 1); ++} ++ ++/**************************************************************************** ++* ++* dump_user_mem ++* ++***************************************************************************/ ++ ++static void ++dump_phys_mem(void *virt_addr, uint32_t num_bytes) ++{ ++ int rc; ++ uint8_t *end_virt_addr = virt_addr + num_bytes; ++ int num_pages; ++ int offset; ++ int end_offset; ++ int page_idx; ++ int prev_idx; ++ struct page *page; ++ struct page **pages; ++ uint8_t *kmapped_virt_ptr; ++ ++ /* Align virtAddr and endVirtAddr to 16 byte boundaries. */ ++ ++ virt_addr = (void *)((unsigned long)virt_addr & ~0x0fuL); ++ end_virt_addr = (void *)(((unsigned long)end_virt_addr + 15uL) & ++ ~0x0fuL); ++ ++ offset = (int)(long)virt_addr & (PAGE_SIZE - 1); ++ end_offset = (int)(long)end_virt_addr & (PAGE_SIZE - 1); ++ ++ num_pages = (offset + num_bytes + PAGE_SIZE - 1) / PAGE_SIZE; ++ ++ pages = kmalloc(sizeof(struct page *) * num_pages, GFP_KERNEL); ++ if (pages == NULL) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unable to allocation memory for %d pages\n", ++ num_pages); ++ return; ++ } ++ ++ down_read(¤t->mm->mmap_sem); ++ rc = get_user_pages(current, /* task */ ++ current->mm, /* mm */ ++ (unsigned long)virt_addr, /* start */ ++ num_pages, /* len */ ++ 0, /* write */ ++ 0, /* force */ ++ pages, /* pages (array of page pointers) */ ++ NULL); /* vmas */ ++ up_read(¤t->mm->mmap_sem); ++ ++ prev_idx = -1; ++ page = NULL; ++ ++ while (offset < end_offset) { ++ ++ int page_offset = offset % PAGE_SIZE; ++ page_idx = offset / PAGE_SIZE; ++ ++ if (page_idx != prev_idx) { ++ ++ if (page != NULL) ++ kunmap(page); ++ page = pages[page_idx]; ++ kmapped_virt_ptr = kmap(page); ++ ++ prev_idx = page_idx; ++ } ++ ++ if (vchiq_arm_log_level >= VCHIQ_LOG_TRACE) ++ vchiq_log_dump_mem("ph", ++ (uint32_t)(unsigned long)&kmapped_virt_ptr[ ++ page_offset], ++ &kmapped_virt_ptr[page_offset], 16); ++ ++ offset += 16; ++ } ++ if (page != NULL) ++ kunmap(page); ++ ++ for (page_idx = 0; page_idx < num_pages; page_idx++) ++ page_cache_release(pages[page_idx]); ++ ++ kfree(pages); ++} ++ ++/**************************************************************************** ++* ++* vchiq_read ++* ++***************************************************************************/ ++ ++static ssize_t ++vchiq_read(struct file *file, char __user *buf, ++ size_t count, loff_t *ppos) ++{ ++ DUMP_CONTEXT_T context; ++ context.buf = buf; ++ context.actual = 0; ++ context.space = count; ++ context.offset = *ppos; ++ ++ vchiq_dump_state(&context, &g_state); ++ ++ *ppos += context.actual; ++ ++ return context.actual; ++} ++ ++VCHIQ_STATE_T * ++vchiq_get_state(void) ++{ ++ ++ if (g_state.remote == NULL) ++ printk(KERN_ERR "%s: g_state.remote == NULL\n", __func__); ++ else if (g_state.remote->initialised != 1) ++ printk(KERN_NOTICE "%s: g_state.remote->initialised != 1 (%d)\n", ++ __func__, g_state.remote->initialised); ++ ++ return ((g_state.remote != NULL) && ++ (g_state.remote->initialised == 1)) ? &g_state : NULL; ++} ++ ++static const struct file_operations ++vchiq_fops = { ++ .owner = THIS_MODULE, ++ .unlocked_ioctl = vchiq_ioctl, ++ .open = vchiq_open, ++ .release = vchiq_release, ++ .read = vchiq_read ++}; ++ ++/* ++ * Autosuspend related functionality ++ */ ++ ++int ++vchiq_videocore_wanted(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ if (!arm_state) ++ /* autosuspend not supported - always return wanted */ ++ return 1; ++ else if (arm_state->blocked_count) ++ return 1; ++ else if (!arm_state->videocore_use_count) ++ /* usage count zero - check for override unless we're forcing */ ++ if (arm_state->resume_blocked) ++ return 0; ++ else ++ return vchiq_platform_videocore_wanted(state); ++ else ++ /* non-zero usage count - videocore still required */ ++ return 1; ++} ++ ++static VCHIQ_STATUS_T ++vchiq_keepalive_vchiq_callback(VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T *header, ++ VCHIQ_SERVICE_HANDLE_T service_user, ++ void *bulk_user) ++{ ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s callback reason %d", __func__, reason); ++ return 0; ++} ++ ++static int ++vchiq_keepalive_thread_func(void *v) ++{ ++ VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ ++ VCHIQ_STATUS_T status; ++ VCHIQ_INSTANCE_T instance; ++ VCHIQ_SERVICE_HANDLE_T ka_handle; ++ ++ VCHIQ_SERVICE_PARAMS_T params = { ++ .fourcc = VCHIQ_MAKE_FOURCC('K', 'E', 'E', 'P'), ++ .callback = vchiq_keepalive_vchiq_callback, ++ .version = KEEPALIVE_VER, ++ .version_min = KEEPALIVE_VER_MIN ++ }; ++ ++ status = vchiq_initialise(&instance); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s vchiq_initialise failed %d", __func__, status); ++ goto exit; ++ } ++ ++ status = vchiq_connect(instance); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s vchiq_connect failed %d", __func__, status); ++ goto shutdown; ++ } ++ ++ status = vchiq_add_service(instance, ¶ms, &ka_handle); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s vchiq_open_service failed %d", __func__, status); ++ goto shutdown; ++ } ++ ++ while (1) { ++ long rc = 0, uc = 0; ++ if (wait_for_completion_interruptible(&arm_state->ka_evt) ++ != 0) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s interrupted", __func__); ++ flush_signals(current); ++ continue; ++ } ++ ++ /* read and clear counters. Do release_count then use_count to ++ * prevent getting more releases than uses */ ++ rc = atomic_xchg(&arm_state->ka_release_count, 0); ++ uc = atomic_xchg(&arm_state->ka_use_count, 0); ++ ++ /* Call use/release service the requisite number of times. ++ * Process use before release so use counts don't go negative */ ++ while (uc--) { ++ atomic_inc(&arm_state->ka_use_ack_count); ++ status = vchiq_use_service(ka_handle); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s vchiq_use_service error %d", ++ __func__, status); ++ } ++ } ++ while (rc--) { ++ status = vchiq_release_service(ka_handle); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s vchiq_release_service error %d", ++ __func__, status); ++ } ++ } ++ } ++ ++shutdown: ++ vchiq_shutdown(instance); ++exit: ++ return 0; ++} ++ ++ ++ ++VCHIQ_STATUS_T ++vchiq_arm_init_state(VCHIQ_STATE_T *state, VCHIQ_ARM_STATE_T *arm_state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ if (arm_state) { ++ rwlock_init(&arm_state->susp_res_lock); ++ ++ init_completion(&arm_state->ka_evt); ++ atomic_set(&arm_state->ka_use_count, 0); ++ atomic_set(&arm_state->ka_use_ack_count, 0); ++ atomic_set(&arm_state->ka_release_count, 0); ++ ++ init_completion(&arm_state->vc_suspend_complete); ++ ++ init_completion(&arm_state->vc_resume_complete); ++ /* Initialise to 'done' state. We only want to block on resume ++ * completion while videocore is suspended. */ ++ set_resume_state(arm_state, VC_RESUME_RESUMED); ++ ++ init_completion(&arm_state->resume_blocker); ++ /* Initialise to 'done' state. We only want to block on this ++ * completion while resume is blocked */ ++ complete_all(&arm_state->resume_blocker); ++ ++ init_completion(&arm_state->blocked_blocker); ++ /* Initialise to 'done' state. We only want to block on this ++ * completion while things are waiting on the resume blocker */ ++ complete_all(&arm_state->blocked_blocker); ++ ++ arm_state->suspend_timer_timeout = SUSPEND_TIMER_TIMEOUT_MS; ++ arm_state->suspend_timer_running = 0; ++ init_timer(&arm_state->suspend_timer); ++ arm_state->suspend_timer.data = (unsigned long)(state); ++ arm_state->suspend_timer.function = suspend_timer_callback; ++ ++ arm_state->first_connect = 0; ++ ++ } ++ return status; ++} ++ ++/* ++** Functions to modify the state variables; ++** set_suspend_state ++** set_resume_state ++** ++** There are more state variables than we might like, so ensure they remain in ++** step. Suspend and resume state are maintained separately, since most of ++** these state machines can operate independently. However, there are a few ++** states where state transitions in one state machine cause a reset to the ++** other state machine. In addition, there are some completion events which ++** need to occur on state machine reset and end-state(s), so these are also ++** dealt with in these functions. ++** ++** In all states we set the state variable according to the input, but in some ++** cases we perform additional steps outlined below; ++** ++** VC_SUSPEND_IDLE - Initialise the suspend completion at the same time. ++** The suspend completion is completed after any suspend ++** attempt. When we reset the state machine we also reset ++** the completion. This reset occurs when videocore is ++** resumed, and also if we initiate suspend after a suspend ++** failure. ++** ++** VC_SUSPEND_IN_PROGRESS - This state is considered the point of no return for ++** suspend - ie from this point on we must try to suspend ++** before resuming can occur. We therefore also reset the ++** resume state machine to VC_RESUME_IDLE in this state. ++** ++** VC_SUSPEND_SUSPENDED - Suspend has completed successfully. Also call ++** complete_all on the suspend completion to notify ++** anything waiting for suspend to happen. ++** ++** VC_SUSPEND_REJECTED - Videocore rejected suspend. Videocore will also ++** initiate resume, so no need to alter resume state. ++** We call complete_all on the suspend completion to notify ++** of suspend rejection. ++** ++** VC_SUSPEND_FAILED - We failed to initiate videocore suspend. We notify the ++** suspend completion and reset the resume state machine. ++** ++** VC_RESUME_IDLE - Initialise the resume completion at the same time. The ++** resume completion is in it's 'done' state whenever ++** videcore is running. Therfore, the VC_RESUME_IDLE state ++** implies that videocore is suspended. ++** Hence, any thread which needs to wait until videocore is ++** running can wait on this completion - it will only block ++** if videocore is suspended. ++** ++** VC_RESUME_RESUMED - Resume has completed successfully. Videocore is running. ++** Call complete_all on the resume completion to unblock ++** any threads waiting for resume. Also reset the suspend ++** state machine to it's idle state. ++** ++** VC_RESUME_FAILED - Currently unused - no mechanism to fail resume exists. ++*/ ++ ++inline void ++set_suspend_state(VCHIQ_ARM_STATE_T *arm_state, ++ enum vc_suspend_status new_state) ++{ ++ /* set the state in all cases */ ++ arm_state->vc_suspend_state = new_state; ++ ++ /* state specific additional actions */ ++ switch (new_state) { ++ case VC_SUSPEND_FORCE_CANCELED: ++ complete_all(&arm_state->vc_suspend_complete); ++ break; ++ case VC_SUSPEND_REJECTED: ++ complete_all(&arm_state->vc_suspend_complete); ++ break; ++ case VC_SUSPEND_FAILED: ++ complete_all(&arm_state->vc_suspend_complete); ++ arm_state->vc_resume_state = VC_RESUME_RESUMED; ++ complete_all(&arm_state->vc_resume_complete); ++ break; ++ case VC_SUSPEND_IDLE: ++ INIT_COMPLETION(arm_state->vc_suspend_complete); ++ break; ++ case VC_SUSPEND_REQUESTED: ++ break; ++ case VC_SUSPEND_IN_PROGRESS: ++ set_resume_state(arm_state, VC_RESUME_IDLE); ++ break; ++ case VC_SUSPEND_SUSPENDED: ++ complete_all(&arm_state->vc_suspend_complete); ++ break; ++ default: ++ BUG(); ++ break; ++ } ++} ++ ++inline void ++set_resume_state(VCHIQ_ARM_STATE_T *arm_state, ++ enum vc_resume_status new_state) ++{ ++ /* set the state in all cases */ ++ arm_state->vc_resume_state = new_state; ++ ++ /* state specific additional actions */ ++ switch (new_state) { ++ case VC_RESUME_FAILED: ++ break; ++ case VC_RESUME_IDLE: ++ INIT_COMPLETION(arm_state->vc_resume_complete); ++ break; ++ case VC_RESUME_REQUESTED: ++ break; ++ case VC_RESUME_IN_PROGRESS: ++ break; ++ case VC_RESUME_RESUMED: ++ complete_all(&arm_state->vc_resume_complete); ++ set_suspend_state(arm_state, VC_SUSPEND_IDLE); ++ break; ++ default: ++ BUG(); ++ break; ++ } ++} ++ ++ ++/* should be called with the write lock held */ ++inline void ++start_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) ++{ ++ del_timer(&arm_state->suspend_timer); ++ arm_state->suspend_timer.expires = jiffies + ++ msecs_to_jiffies(arm_state-> ++ suspend_timer_timeout); ++ add_timer(&arm_state->suspend_timer); ++ arm_state->suspend_timer_running = 1; ++} ++ ++/* should be called with the write lock held */ ++static inline void ++stop_suspend_timer(VCHIQ_ARM_STATE_T *arm_state) ++{ ++ if (arm_state->suspend_timer_running) { ++ del_timer(&arm_state->suspend_timer); ++ arm_state->suspend_timer_running = 0; ++ } ++} ++ ++static inline int ++need_resume(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ return (arm_state->vc_suspend_state > VC_SUSPEND_IDLE) && ++ (arm_state->vc_resume_state < VC_RESUME_REQUESTED) && ++ vchiq_videocore_wanted(state); ++} ++ ++static int ++block_resume(VCHIQ_ARM_STATE_T *arm_state) ++{ ++ int status = VCHIQ_SUCCESS; ++ const unsigned long timeout_val = ++ msecs_to_jiffies(FORCE_SUSPEND_TIMEOUT_MS); ++ int resume_count = 0; ++ ++ /* Allow any threads which were blocked by the last force suspend to ++ * complete if they haven't already. Only give this one shot; if ++ * blocked_count is incremented after blocked_blocker is completed ++ * (which only happens when blocked_count hits 0) then those threads ++ * will have to wait until next time around */ ++ if (arm_state->blocked_count) { ++ INIT_COMPLETION(arm_state->blocked_blocker); ++ write_unlock_bh(&arm_state->susp_res_lock); ++ vchiq_log_info(vchiq_susp_log_level, "%s wait for previously " ++ "blocked clients", __func__); ++ if (wait_for_completion_interruptible_timeout( ++ &arm_state->blocked_blocker, timeout_val) ++ <= 0) { ++ vchiq_log_error(vchiq_susp_log_level, "%s wait for " ++ "previously blocked clients failed" , __func__); ++ status = VCHIQ_ERROR; ++ write_lock_bh(&arm_state->susp_res_lock); ++ goto out; ++ } ++ vchiq_log_info(vchiq_susp_log_level, "%s previously blocked " ++ "clients resumed", __func__); ++ write_lock_bh(&arm_state->susp_res_lock); ++ } ++ ++ /* We need to wait for resume to complete if it's in process */ ++ while (arm_state->vc_resume_state != VC_RESUME_RESUMED && ++ arm_state->vc_resume_state > VC_RESUME_IDLE) { ++ if (resume_count > 1) { ++ status = VCHIQ_ERROR; ++ vchiq_log_error(vchiq_susp_log_level, "%s waited too " ++ "many times for resume" , __func__); ++ goto out; ++ } ++ write_unlock_bh(&arm_state->susp_res_lock); ++ vchiq_log_info(vchiq_susp_log_level, "%s wait for resume", ++ __func__); ++ if (wait_for_completion_interruptible_timeout( ++ &arm_state->vc_resume_complete, timeout_val) ++ <= 0) { ++ vchiq_log_error(vchiq_susp_log_level, "%s wait for " ++ "resume failed (%s)", __func__, ++ resume_state_names[arm_state->vc_resume_state + ++ VC_RESUME_NUM_OFFSET]); ++ status = VCHIQ_ERROR; ++ write_lock_bh(&arm_state->susp_res_lock); ++ goto out; ++ } ++ vchiq_log_info(vchiq_susp_log_level, "%s resumed", __func__); ++ write_lock_bh(&arm_state->susp_res_lock); ++ resume_count++; ++ } ++ INIT_COMPLETION(arm_state->resume_blocker); ++ arm_state->resume_blocked = 1; ++ ++out: ++ return status; ++} ++ ++static inline void ++unblock_resume(VCHIQ_ARM_STATE_T *arm_state) ++{ ++ complete_all(&arm_state->resume_blocker); ++ arm_state->resume_blocked = 0; ++} ++ ++/* Initiate suspend via slot handler. Should be called with the write lock ++ * held */ ++VCHIQ_STATUS_T ++vchiq_arm_vcsuspend(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ status = VCHIQ_SUCCESS; ++ ++ ++ switch (arm_state->vc_suspend_state) { ++ case VC_SUSPEND_REQUESTED: ++ vchiq_log_info(vchiq_susp_log_level, "%s: suspend already " ++ "requested", __func__); ++ break; ++ case VC_SUSPEND_IN_PROGRESS: ++ vchiq_log_info(vchiq_susp_log_level, "%s: suspend already in " ++ "progress", __func__); ++ break; ++ ++ default: ++ /* We don't expect to be in other states, so log but continue ++ * anyway */ ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s unexpected suspend state %s", __func__, ++ suspend_state_names[arm_state->vc_suspend_state + ++ VC_SUSPEND_NUM_OFFSET]); ++ /* fall through */ ++ case VC_SUSPEND_REJECTED: ++ case VC_SUSPEND_FAILED: ++ /* Ensure any idle state actions have been run */ ++ set_suspend_state(arm_state, VC_SUSPEND_IDLE); ++ /* fall through */ ++ case VC_SUSPEND_IDLE: ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s: suspending", __func__); ++ set_suspend_state(arm_state, VC_SUSPEND_REQUESTED); ++ /* kick the slot handler thread to initiate suspend */ ++ request_poll(state, NULL, 0); ++ break; ++ } ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit %d", __func__, status); ++ return status; ++} ++ ++void ++vchiq_platform_check_suspend(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ int susp = 0; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (arm_state->vc_suspend_state == VC_SUSPEND_REQUESTED && ++ arm_state->vc_resume_state == VC_RESUME_RESUMED) { ++ set_suspend_state(arm_state, VC_SUSPEND_IN_PROGRESS); ++ susp = 1; ++ } ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++ if (susp) ++ vchiq_platform_suspend(state); ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit", __func__); ++ return; ++} ++ ++ ++static void ++output_timeout_error(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ char service_err[50] = ""; ++ int vc_use_count = arm_state->videocore_use_count; ++ int active_services = state->unused_service; ++ int i; ++ ++ if (!arm_state->videocore_use_count) { ++ snprintf(service_err, 50, " Videocore usecount is 0"); ++ goto output_msg; ++ } ++ for (i = 0; i < active_services; i++) { ++ VCHIQ_SERVICE_T *service_ptr = state->services[i]; ++ if (service_ptr && service_ptr->service_use_count && ++ (service_ptr->srvstate != VCHIQ_SRVSTATE_FREE)) { ++ snprintf(service_err, 50, " %c%c%c%c(%d) service has " ++ "use count %d%s", VCHIQ_FOURCC_AS_4CHARS( ++ service_ptr->base.fourcc), ++ service_ptr->client_id, ++ service_ptr->service_use_count, ++ service_ptr->service_use_count == ++ vc_use_count ? "" : " (+ more)"); ++ break; ++ } ++ } ++ ++output_msg: ++ vchiq_log_error(vchiq_susp_log_level, ++ "timed out waiting for vc suspend (%d).%s", ++ arm_state->autosuspend_override, service_err); ++ ++} ++ ++/* Try to get videocore into suspended state, regardless of autosuspend state. ++** We don't actually force suspend, since videocore may get into a bad state ++** if we force suspend at a bad time. Instead, we wait for autosuspend to ++** determine a good point to suspend. If this doesn't happen within 100ms we ++** report failure. ++** ++** Returns VCHIQ_SUCCESS if videocore suspended successfully, VCHIQ_RETRY if ++** videocore failed to suspend in time or VCHIQ_ERROR if interrupted. ++*/ ++VCHIQ_STATUS_T ++vchiq_arm_force_suspend(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ long rc = 0; ++ int repeat = -1; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ ++ status = block_resume(arm_state); ++ if (status != VCHIQ_SUCCESS) ++ goto unlock; ++ if (arm_state->vc_suspend_state == VC_SUSPEND_SUSPENDED) { ++ /* Already suspended - just block resume and exit */ ++ vchiq_log_info(vchiq_susp_log_level, "%s already suspended", ++ __func__); ++ status = VCHIQ_SUCCESS; ++ goto unlock; ++ } else if (arm_state->vc_suspend_state <= VC_SUSPEND_IDLE) { ++ /* initiate suspend immediately in the case that we're waiting ++ * for the timeout */ ++ stop_suspend_timer(arm_state); ++ if (!vchiq_videocore_wanted(state)) { ++ vchiq_log_info(vchiq_susp_log_level, "%s videocore " ++ "idle, initiating suspend", __func__); ++ status = vchiq_arm_vcsuspend(state); ++ } else if (arm_state->autosuspend_override < ++ FORCE_SUSPEND_FAIL_MAX) { ++ vchiq_log_info(vchiq_susp_log_level, "%s letting " ++ "videocore go idle", __func__); ++ status = VCHIQ_SUCCESS; ++ } else { ++ vchiq_log_warning(vchiq_susp_log_level, "%s failed too " ++ "many times - attempting suspend", __func__); ++ status = vchiq_arm_vcsuspend(state); ++ } ++ } else { ++ vchiq_log_info(vchiq_susp_log_level, "%s videocore suspend " ++ "in progress - wait for completion", __func__); ++ status = VCHIQ_SUCCESS; ++ } ++ ++ /* Wait for suspend to happen due to system idle (not forced..) */ ++ if (status != VCHIQ_SUCCESS) ++ goto unblock_resume; ++ ++ do { ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++ rc = wait_for_completion_interruptible_timeout( ++ &arm_state->vc_suspend_complete, ++ msecs_to_jiffies(FORCE_SUSPEND_TIMEOUT_MS)); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (rc < 0) { ++ vchiq_log_warning(vchiq_susp_log_level, "%s " ++ "interrupted waiting for suspend", __func__); ++ status = VCHIQ_ERROR; ++ goto unblock_resume; ++ } else if (rc == 0) { ++ if (arm_state->vc_suspend_state > VC_SUSPEND_IDLE) { ++ /* Repeat timeout once if in progress */ ++ if (repeat < 0) { ++ repeat = 1; ++ continue; ++ } ++ } ++ arm_state->autosuspend_override++; ++ output_timeout_error(state); ++ ++ status = VCHIQ_RETRY; ++ goto unblock_resume; ++ } ++ } while (0 < (repeat--)); ++ ++ /* Check and report state in case we need to abort ARM suspend */ ++ if (arm_state->vc_suspend_state != VC_SUSPEND_SUSPENDED) { ++ status = VCHIQ_RETRY; ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s videocore suspend failed (state %s)", __func__, ++ suspend_state_names[arm_state->vc_suspend_state + ++ VC_SUSPEND_NUM_OFFSET]); ++ /* Reset the state only if it's still in an error state. ++ * Something could have already initiated another suspend. */ ++ if (arm_state->vc_suspend_state < VC_SUSPEND_IDLE) ++ set_suspend_state(arm_state, VC_SUSPEND_IDLE); ++ ++ goto unblock_resume; ++ } ++ ++ /* successfully suspended - unlock and exit */ ++ goto unlock; ++ ++unblock_resume: ++ /* all error states need to unblock resume before exit */ ++ unblock_resume(arm_state); ++ ++unlock: ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit %d", __func__, status); ++ return status; ++} ++ ++void ++vchiq_check_suspend(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (arm_state->vc_suspend_state != VC_SUSPEND_SUSPENDED && ++ arm_state->first_connect && ++ !vchiq_videocore_wanted(state)) { ++ vchiq_arm_vcsuspend(state); ++ } ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit", __func__); ++ return; ++} ++ ++ ++int ++vchiq_arm_allow_resume(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ int resume = 0; ++ int ret = -1; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ unblock_resume(arm_state); ++ resume = vchiq_check_resume(state); ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++ if (resume) { ++ if (wait_for_completion_interruptible( ++ &arm_state->vc_resume_complete) < 0) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s interrupted", __func__); ++ /* failed, cannot accurately derive suspend ++ * state, so exit early. */ ++ goto out; ++ } ++ } ++ ++ read_lock_bh(&arm_state->susp_res_lock); ++ if (arm_state->vc_suspend_state == VC_SUSPEND_SUSPENDED) { ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s: Videocore remains suspended", __func__); ++ } else { ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s: Videocore resumed", __func__); ++ ret = 0; ++ } ++ read_unlock_bh(&arm_state->susp_res_lock); ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit %d", __func__, ret); ++ return ret; ++} ++ ++/* This function should be called with the write lock held */ ++int ++vchiq_check_resume(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ int resume = 0; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ if (need_resume(state)) { ++ set_resume_state(arm_state, VC_RESUME_REQUESTED); ++ request_poll(state, NULL, 0); ++ resume = 1; ++ } ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit", __func__); ++ return resume; ++} ++ ++void ++vchiq_platform_check_resume(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ int res = 0; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (arm_state->wake_address == 0) { ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s: already awake", __func__); ++ goto unlock; ++ } ++ if (arm_state->vc_resume_state == VC_RESUME_IN_PROGRESS) { ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s: already resuming", __func__); ++ goto unlock; ++ } ++ ++ if (arm_state->vc_resume_state == VC_RESUME_REQUESTED) { ++ set_resume_state(arm_state, VC_RESUME_IN_PROGRESS); ++ res = 1; ++ } else ++ vchiq_log_trace(vchiq_susp_log_level, ++ "%s: not resuming (resume state %s)", __func__, ++ resume_state_names[arm_state->vc_resume_state + ++ VC_RESUME_NUM_OFFSET]); ++ ++unlock: ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++ if (res) ++ vchiq_platform_resume(state); ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit", __func__); ++ return; ++ ++} ++ ++ ++ ++VCHIQ_STATUS_T ++vchiq_use_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, ++ enum USE_TYPE_E use_type) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ VCHIQ_STATUS_T ret = VCHIQ_SUCCESS; ++ char entity[16]; ++ int *entity_uc; ++ int local_uc, local_entity_uc; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ if (use_type == USE_TYPE_VCHIQ) { ++ sprintf(entity, "VCHIQ: "); ++ entity_uc = &arm_state->peer_use_count; ++ } else if (service) { ++ sprintf(entity, "%c%c%c%c:%03d", ++ VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), ++ service->client_id); ++ entity_uc = &service->service_use_count; ++ } else { ++ vchiq_log_error(vchiq_susp_log_level, "%s null service " ++ "ptr", __func__); ++ ret = VCHIQ_ERROR; ++ goto out; ++ } ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ while (arm_state->resume_blocked) { ++ /* If we call 'use' while force suspend is waiting for suspend, ++ * then we're about to block the thread which the force is ++ * waiting to complete, so we're bound to just time out. In this ++ * case, set the suspend state such that the wait will be ++ * canceled, so we can complete as quickly as possible. */ ++ if (arm_state->resume_blocked && arm_state->vc_suspend_state == ++ VC_SUSPEND_IDLE) { ++ set_suspend_state(arm_state, VC_SUSPEND_FORCE_CANCELED); ++ break; ++ } ++ /* If suspend is already in progress then we need to block */ ++ if (!try_wait_for_completion(&arm_state->resume_blocker)) { ++ /* Indicate that there are threads waiting on the resume ++ * blocker. These need to be allowed to complete before ++ * a _second_ call to force suspend can complete, ++ * otherwise low priority threads might never actually ++ * continue */ ++ arm_state->blocked_count++; ++ write_unlock_bh(&arm_state->susp_res_lock); ++ vchiq_log_info(vchiq_susp_log_level, "%s %s resume " ++ "blocked - waiting...", __func__, entity); ++ if (wait_for_completion_killable( ++ &arm_state->resume_blocker) != 0) { ++ vchiq_log_error(vchiq_susp_log_level, "%s %s " ++ "wait for resume blocker interrupted", ++ __func__, entity); ++ ret = VCHIQ_ERROR; ++ write_lock_bh(&arm_state->susp_res_lock); ++ arm_state->blocked_count--; ++ write_unlock_bh(&arm_state->susp_res_lock); ++ goto out; ++ } ++ vchiq_log_info(vchiq_susp_log_level, "%s %s resume " ++ "unblocked", __func__, entity); ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (--arm_state->blocked_count == 0) ++ complete_all(&arm_state->blocked_blocker); ++ } ++ } ++ ++ stop_suspend_timer(arm_state); ++ ++ local_uc = ++arm_state->videocore_use_count; ++ local_entity_uc = ++(*entity_uc); ++ ++ /* If there's a pending request which hasn't yet been serviced then ++ * just clear it. If we're past VC_SUSPEND_REQUESTED state then ++ * vc_resume_complete will block until we either resume or fail to ++ * suspend */ ++ if (arm_state->vc_suspend_state <= VC_SUSPEND_REQUESTED) ++ set_suspend_state(arm_state, VC_SUSPEND_IDLE); ++ ++ if ((use_type != USE_TYPE_SERVICE_NO_RESUME) && need_resume(state)) { ++ set_resume_state(arm_state, VC_RESUME_REQUESTED); ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s %s count %d, state count %d", ++ __func__, entity, local_entity_uc, local_uc); ++ request_poll(state, NULL, 0); ++ } else ++ vchiq_log_trace(vchiq_susp_log_level, ++ "%s %s count %d, state count %d", ++ __func__, entity, *entity_uc, local_uc); ++ ++ ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++ /* Completion is in a done state when we're not suspended, so this won't ++ * block for the non-suspended case. */ ++ if (!try_wait_for_completion(&arm_state->vc_resume_complete)) { ++ vchiq_log_info(vchiq_susp_log_level, "%s %s wait for resume", ++ __func__, entity); ++ if (wait_for_completion_killable( ++ &arm_state->vc_resume_complete) != 0) { ++ vchiq_log_error(vchiq_susp_log_level, "%s %s wait for " ++ "resume interrupted", __func__, entity); ++ ret = VCHIQ_ERROR; ++ goto out; ++ } ++ vchiq_log_info(vchiq_susp_log_level, "%s %s resumed", __func__, ++ entity); ++ } ++ ++ if (ret == VCHIQ_SUCCESS) { ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ long ack_cnt = atomic_xchg(&arm_state->ka_use_ack_count, 0); ++ while (ack_cnt && (status == VCHIQ_SUCCESS)) { ++ /* Send the use notify to videocore */ ++ status = vchiq_send_remote_use_active(state); ++ if (status == VCHIQ_SUCCESS) ++ ack_cnt--; ++ else ++ atomic_add(ack_cnt, ++ &arm_state->ka_use_ack_count); ++ } ++ } ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit %d", __func__, ret); ++ return ret; ++} ++ ++VCHIQ_STATUS_T ++vchiq_release_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ VCHIQ_STATUS_T ret = VCHIQ_SUCCESS; ++ char entity[16]; ++ int *entity_uc; ++ int local_uc, local_entity_uc; ++ ++ if (!arm_state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ if (service) { ++ sprintf(entity, "%c%c%c%c:%03d", ++ VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), ++ service->client_id); ++ entity_uc = &service->service_use_count; ++ } else { ++ sprintf(entity, "PEER: "); ++ entity_uc = &arm_state->peer_use_count; ++ } ++ ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (!arm_state->videocore_use_count || !(*entity_uc)) { ++ /* Don't use BUG_ON - don't allow user thread to crash kernel */ ++ WARN_ON(!arm_state->videocore_use_count); ++ WARN_ON(!(*entity_uc)); ++ ret = VCHIQ_ERROR; ++ goto unlock; ++ } ++ local_uc = --arm_state->videocore_use_count; ++ local_entity_uc = --(*entity_uc); ++ ++ if (!vchiq_videocore_wanted(state)) { ++ if (vchiq_platform_use_suspend_timer() && ++ !arm_state->resume_blocked) { ++ /* Only use the timer if we're not trying to force ++ * suspend (=> resume_blocked) */ ++ start_suspend_timer(arm_state); ++ } else { ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s %s count %d, state count %d - suspending", ++ __func__, entity, *entity_uc, ++ arm_state->videocore_use_count); ++ vchiq_arm_vcsuspend(state); ++ } ++ } else ++ vchiq_log_trace(vchiq_susp_log_level, ++ "%s %s count %d, state count %d", ++ __func__, entity, *entity_uc, ++ arm_state->videocore_use_count); ++ ++unlock: ++ write_unlock_bh(&arm_state->susp_res_lock); ++ ++out: ++ vchiq_log_trace(vchiq_susp_log_level, "%s exit %d", __func__, ret); ++ return ret; ++} ++ ++void ++vchiq_on_remote_use(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ atomic_inc(&arm_state->ka_use_count); ++ complete(&arm_state->ka_evt); ++} ++ ++void ++vchiq_on_remote_release(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ atomic_inc(&arm_state->ka_release_count); ++ complete(&arm_state->ka_evt); ++} ++ ++VCHIQ_STATUS_T ++vchiq_use_service_internal(VCHIQ_SERVICE_T *service) ++{ ++ return vchiq_use_internal(service->state, service, USE_TYPE_SERVICE); ++} ++ ++VCHIQ_STATUS_T ++vchiq_release_service_internal(VCHIQ_SERVICE_T *service) ++{ ++ return vchiq_release_internal(service->state, service); ++} ++ ++static void suspend_timer_callback(unsigned long context) ++{ ++ VCHIQ_STATE_T *state = (VCHIQ_STATE_T *)context; ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ if (!arm_state) ++ goto out; ++ vchiq_log_info(vchiq_susp_log_level, ++ "%s - suspend timer expired - check suspend", __func__); ++ vchiq_check_suspend(state); ++out: ++ return; ++} ++ ++VCHIQ_STATUS_T ++vchiq_use_service_no_resume(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_STATUS_T ret = VCHIQ_ERROR; ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ if (service) { ++ ret = vchiq_use_internal(service->state, service, ++ USE_TYPE_SERVICE_NO_RESUME); ++ unlock_service(service); ++ } ++ return ret; ++} ++ ++VCHIQ_STATUS_T ++vchiq_use_service(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_STATUS_T ret = VCHIQ_ERROR; ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ if (service) { ++ ret = vchiq_use_internal(service->state, service, ++ USE_TYPE_SERVICE); ++ unlock_service(service); ++ } ++ return ret; ++} ++ ++VCHIQ_STATUS_T ++vchiq_release_service(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_STATUS_T ret = VCHIQ_ERROR; ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ if (service) { ++ ret = vchiq_release_internal(service->state, service); ++ unlock_service(service); ++ } ++ return ret; ++} ++ ++void ++vchiq_dump_service_use_state(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ int i, j = 0; ++ /* Only dump 64 services */ ++ static const int local_max_services = 64; ++ /* If there's more than 64 services, only dump ones with ++ * non-zero counts */ ++ int only_nonzero = 0; ++ static const char *nz = "<-- preventing suspend"; ++ ++ enum vc_suspend_status vc_suspend_state; ++ enum vc_resume_status vc_resume_state; ++ int peer_count; ++ int vc_use_count; ++ int active_services; ++ struct service_data_struct { ++ int fourcc; ++ int clientid; ++ int use_count; ++ } service_data[local_max_services]; ++ ++ if (!arm_state) ++ return; ++ ++ read_lock_bh(&arm_state->susp_res_lock); ++ vc_suspend_state = arm_state->vc_suspend_state; ++ vc_resume_state = arm_state->vc_resume_state; ++ peer_count = arm_state->peer_use_count; ++ vc_use_count = arm_state->videocore_use_count; ++ active_services = state->unused_service; ++ if (active_services > local_max_services) ++ only_nonzero = 1; ++ ++ for (i = 0; (i < active_services) && (j < local_max_services); i++) { ++ VCHIQ_SERVICE_T *service_ptr = state->services[i]; ++ if (!service_ptr) ++ continue; ++ ++ if (only_nonzero && !service_ptr->service_use_count) ++ continue; ++ ++ if (service_ptr->srvstate != VCHIQ_SRVSTATE_FREE) { ++ service_data[j].fourcc = service_ptr->base.fourcc; ++ service_data[j].clientid = service_ptr->client_id; ++ service_data[j++].use_count = service_ptr-> ++ service_use_count; ++ } ++ } ++ ++ read_unlock_bh(&arm_state->susp_res_lock); ++ ++ vchiq_log_warning(vchiq_susp_log_level, ++ "-- Videcore suspend state: %s --", ++ suspend_state_names[vc_suspend_state + VC_SUSPEND_NUM_OFFSET]); ++ vchiq_log_warning(vchiq_susp_log_level, ++ "-- Videcore resume state: %s --", ++ resume_state_names[vc_resume_state + VC_RESUME_NUM_OFFSET]); ++ ++ if (only_nonzero) ++ vchiq_log_warning(vchiq_susp_log_level, "Too many active " ++ "services (%d). Only dumping up to first %d services " ++ "with non-zero use-count", active_services, ++ local_max_services); ++ ++ for (i = 0; i < j; i++) { ++ vchiq_log_warning(vchiq_susp_log_level, ++ "----- %c%c%c%c:%d service count %d %s", ++ VCHIQ_FOURCC_AS_4CHARS(service_data[i].fourcc), ++ service_data[i].clientid, ++ service_data[i].use_count, ++ service_data[i].use_count ? nz : ""); ++ } ++ vchiq_log_warning(vchiq_susp_log_level, ++ "----- VCHIQ use count count %d", peer_count); ++ vchiq_log_warning(vchiq_susp_log_level, ++ "--- Overall vchiq instance use count %d", vc_use_count); ++ ++ vchiq_dump_platform_use_state(state); ++} ++ ++VCHIQ_STATUS_T ++vchiq_check_service(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_ARM_STATE_T *arm_state; ++ VCHIQ_STATUS_T ret = VCHIQ_ERROR; ++ ++ if (!service || !service->state) ++ goto out; ++ ++ vchiq_log_trace(vchiq_susp_log_level, "%s", __func__); ++ ++ arm_state = vchiq_platform_get_arm_state(service->state); ++ ++ read_lock_bh(&arm_state->susp_res_lock); ++ if (service->service_use_count) ++ ret = VCHIQ_SUCCESS; ++ read_unlock_bh(&arm_state->susp_res_lock); ++ ++ if (ret == VCHIQ_ERROR) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "%s ERROR - %c%c%c%c:%d service count %d, " ++ "state count %d, videocore suspend state %s", __func__, ++ VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), ++ service->client_id, service->service_use_count, ++ arm_state->videocore_use_count, ++ suspend_state_names[arm_state->vc_suspend_state + ++ VC_SUSPEND_NUM_OFFSET]); ++ vchiq_dump_service_use_state(service->state); ++ } ++out: ++ return ret; ++} ++ ++/* stub functions */ ++void vchiq_on_remote_use_active(VCHIQ_STATE_T *state) ++{ ++ (void)state; ++} ++ ++void vchiq_platform_conn_state_changed(VCHIQ_STATE_T *state, ++ VCHIQ_CONNSTATE_T oldstate, VCHIQ_CONNSTATE_T newstate) ++{ ++ VCHIQ_ARM_STATE_T *arm_state = vchiq_platform_get_arm_state(state); ++ vchiq_log_info(vchiq_susp_log_level, "%d: %s->%s", state->id, ++ get_conn_state_name(oldstate), get_conn_state_name(newstate)); ++ if (state->conn_state == VCHIQ_CONNSTATE_CONNECTED) { ++ write_lock_bh(&arm_state->susp_res_lock); ++ if (!arm_state->first_connect) { ++ char threadname[10]; ++ arm_state->first_connect = 1; ++ write_unlock_bh(&arm_state->susp_res_lock); ++ snprintf(threadname, sizeof(threadname), "VCHIQka-%d", ++ state->id); ++ arm_state->ka_thread = kthread_create( ++ &vchiq_keepalive_thread_func, ++ (void *)state, ++ threadname); ++ if (arm_state->ka_thread == NULL) { ++ vchiq_log_error(vchiq_susp_log_level, ++ "vchiq: FATAL: couldn't create thread %s", ++ threadname); ++ } else { ++ wake_up_process(arm_state->ka_thread); ++ } ++ } else ++ write_unlock_bh(&arm_state->susp_res_lock); ++ } ++} ++ ++ ++/**************************************************************************** ++* ++* vchiq_init - called when the module is loaded. ++* ++***************************************************************************/ ++ ++static int __init ++vchiq_init(void) ++{ ++ int err; ++ void *ptr_err; ++ ++ /* create proc entries */ ++ err = vchiq_proc_init(); ++ if (err != 0) ++ goto failed_proc_init; ++ ++ err = alloc_chrdev_region(&vchiq_devid, VCHIQ_MINOR, 1, DEVICE_NAME); ++ if (err != 0) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unable to allocate device number"); ++ goto failed_alloc_chrdev; ++ } ++ cdev_init(&vchiq_cdev, &vchiq_fops); ++ vchiq_cdev.owner = THIS_MODULE; ++ err = cdev_add(&vchiq_cdev, vchiq_devid, 1); ++ if (err != 0) { ++ vchiq_log_error(vchiq_arm_log_level, ++ "Unable to register device"); ++ goto failed_cdev_add; ++ } ++ ++ /* create sysfs entries */ ++ vchiq_class = class_create(THIS_MODULE, DEVICE_NAME); ++ ptr_err = vchiq_class; ++ if (IS_ERR(ptr_err)) ++ goto failed_class_create; ++ ++ vchiq_dev = device_create(vchiq_class, NULL, ++ vchiq_devid, NULL, "vchiq"); ++ ptr_err = vchiq_dev; ++ if (IS_ERR(ptr_err)) ++ goto failed_device_create; ++ ++ err = vchiq_platform_init(&g_state); ++ if (err != 0) ++ goto failed_platform_init; ++ ++ vchiq_log_info(vchiq_arm_log_level, ++ "vchiq: initialised - version %d (min %d), device %d.%d", ++ VCHIQ_VERSION, VCHIQ_VERSION_MIN, ++ MAJOR(vchiq_devid), MINOR(vchiq_devid)); ++ ++ return 0; ++ ++failed_platform_init: ++ device_destroy(vchiq_class, vchiq_devid); ++failed_device_create: ++ class_destroy(vchiq_class); ++failed_class_create: ++ cdev_del(&vchiq_cdev); ++ err = PTR_ERR(ptr_err); ++failed_cdev_add: ++ unregister_chrdev_region(vchiq_devid, 1); ++failed_alloc_chrdev: ++ vchiq_proc_deinit(); ++failed_proc_init: ++ vchiq_log_warning(vchiq_arm_log_level, "could not load vchiq"); ++ return err; ++} ++ ++static int vchiq_instance_get_use_count(VCHIQ_INSTANCE_T instance) ++{ ++ VCHIQ_SERVICE_T *service; ++ int use_count = 0, i; ++ i = 0; ++ while ((service = next_service_by_instance(instance->state, ++ instance, &i)) != NULL) { ++ use_count += service->service_use_count; ++ unlock_service(service); ++ } ++ return use_count; ++} ++ ++/* read the per-process use-count */ ++static int proc_read_use_count(char *page, char **start, ++ off_t off, int count, ++ int *eof, void *data) ++{ ++ VCHIQ_INSTANCE_T instance = data; ++ int len, use_count; ++ ++ use_count = vchiq_instance_get_use_count(instance); ++ len = snprintf(page+off, count, "%d\n", use_count); ++ ++ return len; ++} ++ ++/* add an instance (process) to the proc entries */ ++static int vchiq_proc_add_instance(VCHIQ_INSTANCE_T instance) ++{ ++#if 1 ++ return 0; ++#else ++ char pidstr[32]; ++ struct proc_dir_entry *top, *use_count; ++ struct proc_dir_entry *clients = vchiq_clients_top(); ++ int pid = instance->pid; ++ ++ snprintf(pidstr, sizeof(pidstr), "%d", pid); ++ top = proc_mkdir(pidstr, clients); ++ if (!top) ++ goto fail_top; ++ ++ use_count = create_proc_read_entry("use_count", ++ 0444, top, ++ proc_read_use_count, ++ instance); ++ if (!use_count) ++ goto fail_use_count; ++ ++ instance->proc_entry = top; ++ ++ return 0; ++ ++fail_use_count: ++ remove_proc_entry(top->name, clients); ++fail_top: ++ return -ENOMEM; ++#endif ++} ++ ++static void vchiq_proc_remove_instance(VCHIQ_INSTANCE_T instance) ++{ ++#if 0 ++ struct proc_dir_entry *clients = vchiq_clients_top(); ++ remove_proc_entry("use_count", instance->proc_entry); ++ remove_proc_entry(instance->proc_entry->name, clients); ++#endif ++} ++ ++/**************************************************************************** ++* ++* vchiq_exit - called when the module is unloaded. ++* ++***************************************************************************/ ++ ++static void __exit ++vchiq_exit(void) ++{ ++ vchiq_platform_exit(&g_state); ++ device_destroy(vchiq_class, vchiq_devid); ++ class_destroy(vchiq_class); ++ cdev_del(&vchiq_cdev); ++ unregister_chrdev_region(vchiq_devid, 1); ++} ++ ++module_init(vchiq_init); ++module_exit(vchiq_exit); ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Broadcom Corporation"); +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_arm.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,212 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_ARM_H ++#define VCHIQ_ARM_H ++ ++#include ++#include ++#include ++#include "vchiq_core.h" ++ ++ ++enum vc_suspend_status { ++ VC_SUSPEND_FORCE_CANCELED = -3, /* Force suspend canceled, too busy */ ++ VC_SUSPEND_REJECTED = -2, /* Videocore rejected suspend request */ ++ VC_SUSPEND_FAILED = -1, /* Videocore suspend failed */ ++ VC_SUSPEND_IDLE = 0, /* VC active, no suspend actions */ ++ VC_SUSPEND_REQUESTED, /* User has requested suspend */ ++ VC_SUSPEND_IN_PROGRESS, /* Slot handler has recvd suspend request */ ++ VC_SUSPEND_SUSPENDED /* Videocore suspend succeeded */ ++}; ++ ++enum vc_resume_status { ++ VC_RESUME_FAILED = -1, /* Videocore resume failed */ ++ VC_RESUME_IDLE = 0, /* VC suspended, no resume actions */ ++ VC_RESUME_REQUESTED, /* User has requested resume */ ++ VC_RESUME_IN_PROGRESS, /* Slot handler has received resume request */ ++ VC_RESUME_RESUMED /* Videocore resumed successfully (active) */ ++}; ++ ++ ++enum USE_TYPE_E { ++ USE_TYPE_SERVICE, ++ USE_TYPE_SERVICE_NO_RESUME, ++ USE_TYPE_VCHIQ ++}; ++ ++ ++ ++typedef struct vchiq_arm_state_struct { ++ /* Keepalive-related data */ ++ struct task_struct *ka_thread; ++ struct completion ka_evt; ++ atomic_t ka_use_count; ++ atomic_t ka_use_ack_count; ++ atomic_t ka_release_count; ++ ++ struct completion vc_suspend_complete; ++ struct completion vc_resume_complete; ++ ++ rwlock_t susp_res_lock; ++ enum vc_suspend_status vc_suspend_state; ++ enum vc_resume_status vc_resume_state; ++ ++ unsigned int wake_address; ++ ++ struct timer_list suspend_timer; ++ int suspend_timer_timeout; ++ int suspend_timer_running; ++ ++ /* Global use count for videocore. ++ ** This is equal to the sum of the use counts for all services. When ++ ** this hits zero the videocore suspend procedure will be initiated. ++ */ ++ int videocore_use_count; ++ ++ /* Use count to track requests from videocore peer. ++ ** This use count is not associated with a service, so needs to be ++ ** tracked separately with the state. ++ */ ++ int peer_use_count; ++ ++ /* Flag to indicate whether resume is blocked. This happens when the ++ ** ARM is suspending ++ */ ++ struct completion resume_blocker; ++ int resume_blocked; ++ struct completion blocked_blocker; ++ int blocked_count; ++ ++ int autosuspend_override; ++ ++ /* Flag to indicate that the first vchiq connect has made it through. ++ ** This means that both sides should be fully ready, and we should ++ ** be able to suspend after this point. ++ */ ++ int first_connect; ++ ++ unsigned long long suspend_start_time; ++ unsigned long long sleep_start_time; ++ unsigned long long resume_start_time; ++ unsigned long long last_wake_time; ++ ++} VCHIQ_ARM_STATE_T; ++ ++extern int vchiq_arm_log_level; ++extern int vchiq_susp_log_level; ++ ++extern int __init ++vchiq_platform_init(VCHIQ_STATE_T *state); ++ ++extern void __exit ++vchiq_platform_exit(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATE_T * ++vchiq_get_state(void); ++ ++extern VCHIQ_STATUS_T ++vchiq_arm_vcsuspend(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_arm_force_suspend(VCHIQ_STATE_T *state); ++ ++extern int ++vchiq_arm_allow_resume(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_arm_vcresume(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_arm_init_state(VCHIQ_STATE_T *state, VCHIQ_ARM_STATE_T *arm_state); ++ ++extern int ++vchiq_check_resume(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_check_suspend(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_use_service(VCHIQ_SERVICE_HANDLE_T handle); ++ ++extern VCHIQ_STATUS_T ++vchiq_release_service(VCHIQ_SERVICE_HANDLE_T handle); ++ ++extern VCHIQ_STATUS_T ++vchiq_check_service(VCHIQ_SERVICE_T *service); ++ ++extern VCHIQ_STATUS_T ++vchiq_platform_suspend(VCHIQ_STATE_T *state); ++ ++extern int ++vchiq_platform_videocore_wanted(VCHIQ_STATE_T *state); ++ ++extern int ++vchiq_platform_use_suspend_timer(void); ++ ++extern void ++vchiq_dump_platform_use_state(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_dump_service_use_state(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_ARM_STATE_T* ++vchiq_platform_get_arm_state(VCHIQ_STATE_T *state); ++ ++extern int ++vchiq_videocore_wanted(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_use_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, ++ enum USE_TYPE_E use_type); ++extern VCHIQ_STATUS_T ++vchiq_release_internal(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service); ++ ++void ++set_suspend_state(VCHIQ_ARM_STATE_T *arm_state, ++ enum vc_suspend_status new_state); ++ ++void ++set_resume_state(VCHIQ_ARM_STATE_T *arm_state, ++ enum vc_resume_status new_state); ++ ++void ++start_suspend_timer(VCHIQ_ARM_STATE_T *arm_state); ++ ++extern int vchiq_proc_init(void); ++extern void vchiq_proc_deinit(void); ++extern struct proc_dir_entry *vchiq_proc_top(void); ++extern struct proc_dir_entry *vchiq_clients_top(void); ++ ++ ++#endif /* VCHIQ_ARM_H */ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_build_info.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_build_info.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,37 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++const char *vchiq_get_build_hostname(void); ++const char *vchiq_get_build_version(void); ++const char *vchiq_get_build_time(void); ++const char *vchiq_get_build_date(void); +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_cfg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_cfg.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,60 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_CFG_H ++#define VCHIQ_CFG_H ++ ++#define VCHIQ_MAGIC VCHIQ_MAKE_FOURCC('V', 'C', 'H', 'I') ++/* The version of VCHIQ - change with any non-trivial change */ ++#define VCHIQ_VERSION 6 ++/* The minimum compatible version - update to match VCHIQ_VERSION with any ++** incompatible change */ ++#define VCHIQ_VERSION_MIN 3 ++ ++#define VCHIQ_MAX_STATES 1 ++#define VCHIQ_MAX_SERVICES 4096 ++#define VCHIQ_MAX_SLOTS 128 ++#define VCHIQ_MAX_SLOTS_PER_SIDE 64 ++ ++#define VCHIQ_NUM_CURRENT_BULKS 32 ++#define VCHIQ_NUM_SERVICE_BULKS 4 ++ ++#ifndef VCHIQ_ENABLE_DEBUG ++#define VCHIQ_ENABLE_DEBUG 1 ++#endif ++ ++#ifndef VCHIQ_ENABLE_STATS ++#define VCHIQ_ENABLE_STATS 1 ++#endif ++ ++#endif /* VCHIQ_CFG_H */ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_connected.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_connected.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,119 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "vchiq_connected.h" ++#include "vchiq_core.h" ++#include ++#include ++ ++#define MAX_CALLBACKS 10 ++ ++static int g_connected; ++static int g_num_deferred_callbacks; ++static VCHIQ_CONNECTED_CALLBACK_T g_deferred_callback[MAX_CALLBACKS]; ++static int g_once_init; ++static struct mutex g_connected_mutex; ++ ++/**************************************************************************** ++* ++* Function to initialize our lock. ++* ++***************************************************************************/ ++ ++static void connected_init(void) ++{ ++ if (!g_once_init) { ++ mutex_init(&g_connected_mutex); ++ g_once_init = 1; ++ } ++} ++ ++/**************************************************************************** ++* ++* This function is used to defer initialization until the vchiq stack is ++* initialized. If the stack is already initialized, then the callback will ++* be made immediately, otherwise it will be deferred until ++* vchiq_call_connected_callbacks is called. ++* ++***************************************************************************/ ++ ++void vchiq_add_connected_callback(VCHIQ_CONNECTED_CALLBACK_T callback) ++{ ++ connected_init(); ++ ++ if (mutex_lock_interruptible(&g_connected_mutex) != 0) ++ return; ++ ++ if (g_connected) ++ /* We're already connected. Call the callback immediately. */ ++ ++ callback(); ++ else { ++ if (g_num_deferred_callbacks >= MAX_CALLBACKS) ++ vchiq_log_error(vchiq_core_log_level, ++ "There already %d callback registered - " ++ "please increase MAX_CALLBACKS", ++ g_num_deferred_callbacks); ++ else { ++ g_deferred_callback[g_num_deferred_callbacks] = ++ callback; ++ g_num_deferred_callbacks++; ++ } ++ } ++ mutex_unlock(&g_connected_mutex); ++} ++ ++/**************************************************************************** ++* ++* This function is called by the vchiq stack once it has been connected to ++* the videocore and clients can start to use the stack. ++* ++***************************************************************************/ ++ ++void vchiq_call_connected_callbacks(void) ++{ ++ int i; ++ ++ connected_init(); ++ ++ if (mutex_lock_interruptible(&g_connected_mutex) != 0) ++ return; ++ ++ for (i = 0; i < g_num_deferred_callbacks; i++) ++ g_deferred_callback[i](); ++ ++ g_num_deferred_callbacks = 0; ++ g_connected = 1; ++ mutex_unlock(&g_connected_mutex); ++} ++EXPORT_SYMBOL(vchiq_add_connected_callback); +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_connected.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_connected.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,51 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_CONNECTED_H ++#define VCHIQ_CONNECTED_H ++ ++/* ---- Include Files ----------------------------------------------------- */ ++ ++/* ---- Constants and Types ---------------------------------------------- */ ++ ++typedef void (*VCHIQ_CONNECTED_CALLBACK_T)(void); ++ ++/* ---- Variable Externs ------------------------------------------------- */ ++ ++/* ---- Function Prototypes ---------------------------------------------- */ ++ ++void vchiq_add_connected_callback(VCHIQ_CONNECTED_CALLBACK_T callback); ++void vchiq_call_connected_callbacks(void); ++ ++#endif /* VCHIQ_CONNECTED_H */ ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,3824 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "vchiq_core.h" ++ ++#define VCHIQ_SLOT_HANDLER_STACK 8192 ++ ++#define HANDLE_STATE_SHIFT 12 ++ ++#define SLOT_INFO_FROM_INDEX(state, index) (state->slot_info + (index)) ++#define SLOT_DATA_FROM_INDEX(state, index) (state->slot_data + (index)) ++#define SLOT_INDEX_FROM_DATA(state, data) \ ++ (((unsigned int)((char *)data - (char *)state->slot_data)) / \ ++ VCHIQ_SLOT_SIZE) ++#define SLOT_INDEX_FROM_INFO(state, info) \ ++ ((unsigned int)(info - state->slot_info)) ++#define SLOT_QUEUE_INDEX_FROM_POS(pos) \ ++ ((int)((unsigned int)(pos) / VCHIQ_SLOT_SIZE)) ++ ++ ++#define BULK_INDEX(x) (x & (VCHIQ_NUM_SERVICE_BULKS - 1)) ++ ++ ++struct vchiq_open_payload { ++ int fourcc; ++ int client_id; ++ short version; ++ short version_min; ++}; ++ ++struct vchiq_openack_payload { ++ short version; ++}; ++ ++/* we require this for consistency between endpoints */ ++vchiq_static_assert(sizeof(VCHIQ_HEADER_T) == 8); ++vchiq_static_assert(IS_POW2(sizeof(VCHIQ_HEADER_T))); ++vchiq_static_assert(IS_POW2(VCHIQ_NUM_CURRENT_BULKS)); ++vchiq_static_assert(IS_POW2(VCHIQ_NUM_SERVICE_BULKS)); ++vchiq_static_assert(IS_POW2(VCHIQ_MAX_SERVICES)); ++vchiq_static_assert(VCHIQ_VERSION >= VCHIQ_VERSION_MIN); ++ ++/* Run time control of log level, based on KERN_XXX level. */ ++int vchiq_core_log_level = VCHIQ_LOG_DEFAULT; ++int vchiq_core_msg_log_level = VCHIQ_LOG_DEFAULT; ++int vchiq_sync_log_level = VCHIQ_LOG_DEFAULT; ++ ++static atomic_t pause_bulks_count = ATOMIC_INIT(0); ++ ++static DEFINE_SPINLOCK(service_spinlock); ++DEFINE_SPINLOCK(bulk_waiter_spinlock); ++DEFINE_SPINLOCK(quota_spinlock); ++ ++VCHIQ_STATE_T *vchiq_states[VCHIQ_MAX_STATES]; ++static unsigned int handle_seq; ++ ++static const char *const srvstate_names[] = { ++ "FREE", ++ "HIDDEN", ++ "LISTENING", ++ "OPENING", ++ "OPEN", ++ "OPENSYNC", ++ "CLOSESENT", ++ "CLOSERECVD", ++ "CLOSEWAIT", ++ "CLOSED" ++}; ++ ++static const char *const reason_names[] = { ++ "SERVICE_OPENED", ++ "SERVICE_CLOSED", ++ "MESSAGE_AVAILABLE", ++ "BULK_TRANSMIT_DONE", ++ "BULK_RECEIVE_DONE", ++ "BULK_TRANSMIT_ABORTED", ++ "BULK_RECEIVE_ABORTED" ++}; ++ ++static const char *const conn_state_names[] = { ++ "DISCONNECTED", ++ "CONNECTING", ++ "CONNECTED", ++ "PAUSING", ++ "PAUSE_SENT", ++ "PAUSED", ++ "RESUMING", ++ "PAUSE_TIMEOUT", ++ "RESUME_TIMEOUT" ++}; ++ ++ ++static void ++release_message_sync(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header); ++ ++static const char *msg_type_str(unsigned int msg_type) ++{ ++ switch (msg_type) { ++ case VCHIQ_MSG_PADDING: return "PADDING"; ++ case VCHIQ_MSG_CONNECT: return "CONNECT"; ++ case VCHIQ_MSG_OPEN: return "OPEN"; ++ case VCHIQ_MSG_OPENACK: return "OPENACK"; ++ case VCHIQ_MSG_CLOSE: return "CLOSE"; ++ case VCHIQ_MSG_DATA: return "DATA"; ++ case VCHIQ_MSG_BULK_RX: return "BULK_RX"; ++ case VCHIQ_MSG_BULK_TX: return "BULK_TX"; ++ case VCHIQ_MSG_BULK_RX_DONE: return "BULK_RX_DONE"; ++ case VCHIQ_MSG_BULK_TX_DONE: return "BULK_TX_DONE"; ++ case VCHIQ_MSG_PAUSE: return "PAUSE"; ++ case VCHIQ_MSG_RESUME: return "RESUME"; ++ case VCHIQ_MSG_REMOTE_USE: return "REMOTE_USE"; ++ case VCHIQ_MSG_REMOTE_RELEASE: return "REMOTE_RELEASE"; ++ case VCHIQ_MSG_REMOTE_USE_ACTIVE: return "REMOTE_USE_ACTIVE"; ++ } ++ return "???"; ++} ++ ++static inline void ++vchiq_set_service_state(VCHIQ_SERVICE_T *service, int newstate) ++{ ++ vchiq_log_info(vchiq_core_log_level, "%d: srv:%d %s->%s", ++ service->state->id, service->localport, ++ srvstate_names[service->srvstate], ++ srvstate_names[newstate]); ++ service->srvstate = newstate; ++} ++ ++VCHIQ_SERVICE_T * ++find_service_by_handle(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_SERVICE_T *service; ++ ++ spin_lock(&service_spinlock); ++ service = handle_to_service(handle); ++ if (service && (service->srvstate != VCHIQ_SRVSTATE_FREE) && ++ (service->handle == handle)) { ++ BUG_ON(service->ref_count == 0); ++ service->ref_count++; ++ } else ++ service = NULL; ++ spin_unlock(&service_spinlock); ++ ++ if (!service) ++ vchiq_log_info(vchiq_core_log_level, ++ "Invalid service handle 0x%x", handle); ++ ++ return service; ++} ++ ++VCHIQ_SERVICE_T * ++find_service_by_port(VCHIQ_STATE_T *state, int localport) ++{ ++ VCHIQ_SERVICE_T *service = NULL; ++ if ((unsigned int)localport <= VCHIQ_PORT_MAX) { ++ spin_lock(&service_spinlock); ++ service = state->services[localport]; ++ if (service && (service->srvstate != VCHIQ_SRVSTATE_FREE)) { ++ BUG_ON(service->ref_count == 0); ++ service->ref_count++; ++ } else ++ service = NULL; ++ spin_unlock(&service_spinlock); ++ } ++ ++ if (!service) ++ vchiq_log_info(vchiq_core_log_level, ++ "Invalid port %d", localport); ++ ++ return service; ++} ++ ++VCHIQ_SERVICE_T * ++find_service_for_instance(VCHIQ_INSTANCE_T instance, ++ VCHIQ_SERVICE_HANDLE_T handle) { ++ VCHIQ_SERVICE_T *service; ++ ++ spin_lock(&service_spinlock); ++ service = handle_to_service(handle); ++ if (service && (service->srvstate != VCHIQ_SRVSTATE_FREE) && ++ (service->handle == handle) && ++ (service->instance == instance)) { ++ BUG_ON(service->ref_count == 0); ++ service->ref_count++; ++ } else ++ service = NULL; ++ spin_unlock(&service_spinlock); ++ ++ if (!service) ++ vchiq_log_info(vchiq_core_log_level, ++ "Invalid service handle 0x%x", handle); ++ ++ return service; ++} ++ ++VCHIQ_SERVICE_T * ++next_service_by_instance(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance, ++ int *pidx) ++{ ++ VCHIQ_SERVICE_T *service = NULL; ++ int idx = *pidx; ++ ++ spin_lock(&service_spinlock); ++ while (idx < state->unused_service) { ++ VCHIQ_SERVICE_T *srv = state->services[idx++]; ++ if (srv && (srv->srvstate != VCHIQ_SRVSTATE_FREE) && ++ (srv->instance == instance)) { ++ service = srv; ++ BUG_ON(service->ref_count == 0); ++ service->ref_count++; ++ break; ++ } ++ } ++ spin_unlock(&service_spinlock); ++ ++ *pidx = idx; ++ ++ return service; ++} ++ ++void ++lock_service(VCHIQ_SERVICE_T *service) ++{ ++ spin_lock(&service_spinlock); ++ BUG_ON(!service || (service->ref_count == 0)); ++ if (service) ++ service->ref_count++; ++ spin_unlock(&service_spinlock); ++} ++ ++void ++unlock_service(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ spin_lock(&service_spinlock); ++ BUG_ON(!service || (service->ref_count == 0)); ++ if (service && service->ref_count) { ++ service->ref_count--; ++ if (!service->ref_count) { ++ BUG_ON(service->srvstate != VCHIQ_SRVSTATE_FREE); ++ state->services[service->localport] = NULL; ++ } else ++ service = NULL; ++ } ++ spin_unlock(&service_spinlock); ++ ++ if (service && service->userdata_term) ++ service->userdata_term(service->base.userdata); ++ ++ kfree(service); ++} ++ ++int ++vchiq_get_client_id(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ int id; ++ ++ id = service ? service->client_id : 0; ++ if (service) ++ unlock_service(service); ++ ++ return id; ++} ++ ++void * ++vchiq_get_service_userdata(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_SERVICE_T *service = handle_to_service(handle); ++ ++ return service ? service->base.userdata : NULL; ++} ++ ++int ++vchiq_get_service_fourcc(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_SERVICE_T *service = handle_to_service(handle); ++ ++ return service ? service->base.fourcc : 0; ++} ++ ++static void ++mark_service_closing_internal(VCHIQ_SERVICE_T *service, int sh_thread) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ VCHIQ_SERVICE_QUOTA_T *service_quota; ++ ++ service->closing = 1; ++ ++ /* Synchronise with other threads. */ ++ mutex_lock(&state->recycle_mutex); ++ mutex_unlock(&state->recycle_mutex); ++ if (!sh_thread || (state->conn_state != VCHIQ_CONNSTATE_PAUSE_SENT)) { ++ /* If we're pausing then the slot_mutex is held until resume ++ * by the slot handler. Therefore don't try to acquire this ++ * mutex if we're the slot handler and in the pause sent state. ++ * We don't need to in this case anyway. */ ++ mutex_lock(&state->slot_mutex); ++ mutex_unlock(&state->slot_mutex); ++ } ++ ++ /* Unblock any sending thread. */ ++ service_quota = &state->service_quotas[service->localport]; ++ up(&service_quota->quota_event); ++} ++ ++static void ++mark_service_closing(VCHIQ_SERVICE_T *service) ++{ ++ mark_service_closing_internal(service, 0); ++} ++ ++static inline VCHIQ_STATUS_T ++make_service_callback(VCHIQ_SERVICE_T *service, VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T *header, void *bulk_userdata) ++{ ++ VCHIQ_STATUS_T status; ++ vchiq_log_trace(vchiq_core_log_level, "%d: callback:%d (%s, %x, %x)", ++ service->state->id, service->localport, reason_names[reason], ++ (unsigned int)header, (unsigned int)bulk_userdata); ++ status = service->base.callback(reason, header, service->handle, ++ bulk_userdata); ++ if (status == VCHIQ_ERROR) { ++ vchiq_log_warning(vchiq_core_log_level, ++ "%d: ignoring ERROR from callback to service %x", ++ service->state->id, service->handle); ++ status = VCHIQ_SUCCESS; ++ } ++ return status; ++} ++ ++inline void ++vchiq_set_conn_state(VCHIQ_STATE_T *state, VCHIQ_CONNSTATE_T newstate) ++{ ++ VCHIQ_CONNSTATE_T oldstate = state->conn_state; ++ vchiq_log_info(vchiq_core_log_level, "%d: %s->%s", state->id, ++ conn_state_names[oldstate], ++ conn_state_names[newstate]); ++ state->conn_state = newstate; ++ vchiq_platform_conn_state_changed(state, oldstate, newstate); ++} ++ ++static inline void ++remote_event_create(REMOTE_EVENT_T *event) ++{ ++ event->armed = 0; ++ /* Don't clear the 'fired' flag because it may already have been set ++ ** by the other side. */ ++ sema_init(event->event, 0); ++} ++ ++static inline void ++remote_event_destroy(REMOTE_EVENT_T *event) ++{ ++ (void)event; ++} ++ ++static inline int ++remote_event_wait(REMOTE_EVENT_T *event) ++{ ++ if (!event->fired) { ++ event->armed = 1; ++ dsb(); ++ if (!event->fired) { ++ if (down_interruptible(event->event) != 0) { ++ event->armed = 0; ++ return 0; ++ } ++ } ++ event->armed = 0; ++ wmb(); ++ } ++ ++ event->fired = 0; ++ return 1; ++} ++ ++static inline void ++remote_event_signal_local(REMOTE_EVENT_T *event) ++{ ++ event->armed = 0; ++ up(event->event); ++} ++ ++static inline void ++remote_event_poll(REMOTE_EVENT_T *event) ++{ ++ if (event->fired && event->armed) ++ remote_event_signal_local(event); ++} ++ ++void ++remote_event_pollall(VCHIQ_STATE_T *state) ++{ ++ remote_event_poll(&state->local->sync_trigger); ++ remote_event_poll(&state->local->sync_release); ++ remote_event_poll(&state->local->trigger); ++ remote_event_poll(&state->local->recycle); ++} ++ ++/* Round up message sizes so that any space at the end of a slot is always big ++** enough for a header. This relies on header size being a power of two, which ++** has been verified earlier by a static assertion. */ ++ ++static inline unsigned int ++calc_stride(unsigned int size) ++{ ++ /* Allow room for the header */ ++ size += sizeof(VCHIQ_HEADER_T); ++ ++ /* Round up */ ++ return (size + sizeof(VCHIQ_HEADER_T) - 1) & ~(sizeof(VCHIQ_HEADER_T) ++ - 1); ++} ++ ++/* Called by the slot handler thread */ ++static VCHIQ_SERVICE_T * ++get_listening_service(VCHIQ_STATE_T *state, int fourcc) ++{ ++ int i; ++ ++ WARN_ON(fourcc == VCHIQ_FOURCC_INVALID); ++ ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = state->services[i]; ++ if (service && ++ (service->public_fourcc == fourcc) && ++ ((service->srvstate == VCHIQ_SRVSTATE_LISTENING) || ++ ((service->srvstate == VCHIQ_SRVSTATE_OPEN) && ++ (service->remoteport == VCHIQ_PORT_FREE)))) { ++ lock_service(service); ++ return service; ++ } ++ } ++ ++ return NULL; ++} ++ ++/* Called by the slot handler thread */ ++static VCHIQ_SERVICE_T * ++get_connected_service(VCHIQ_STATE_T *state, unsigned int port) ++{ ++ int i; ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = state->services[i]; ++ if (service && (service->srvstate == VCHIQ_SRVSTATE_OPEN) ++ && (service->remoteport == port)) { ++ lock_service(service); ++ return service; ++ } ++ } ++ return NULL; ++} ++ ++inline void ++request_poll(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, int poll_type) ++{ ++ uint32_t value; ++ ++ if (service) { ++ do { ++ value = atomic_read(&service->poll_flags); ++ } while (atomic_cmpxchg(&service->poll_flags, value, ++ value | (1 << poll_type)) != value); ++ ++ do { ++ value = atomic_read(&state->poll_services[ ++ service->localport>>5]); ++ } while (atomic_cmpxchg( ++ &state->poll_services[service->localport>>5], ++ value, value | (1 << (service->localport & 0x1f))) ++ != value); ++ } ++ ++ state->poll_needed = 1; ++ wmb(); ++ ++ /* ... and ensure the slot handler runs. */ ++ remote_event_signal_local(&state->local->trigger); ++} ++ ++/* Called from queue_message, by the slot handler and application threads, ++** with slot_mutex held */ ++static VCHIQ_HEADER_T * ++reserve_space(VCHIQ_STATE_T *state, int space, int is_blocking) ++{ ++ VCHIQ_SHARED_STATE_T *local = state->local; ++ int tx_pos = state->local_tx_pos; ++ int slot_space = VCHIQ_SLOT_SIZE - (tx_pos & VCHIQ_SLOT_MASK); ++ ++ if (space > slot_space) { ++ VCHIQ_HEADER_T *header; ++ /* Fill the remaining space with padding */ ++ WARN_ON(state->tx_data == NULL); ++ header = (VCHIQ_HEADER_T *) ++ (state->tx_data + (tx_pos & VCHIQ_SLOT_MASK)); ++ header->msgid = VCHIQ_MSGID_PADDING; ++ header->size = slot_space - sizeof(VCHIQ_HEADER_T); ++ ++ tx_pos += slot_space; ++ } ++ ++ /* If necessary, get the next slot. */ ++ if ((tx_pos & VCHIQ_SLOT_MASK) == 0) { ++ int slot_index; ++ ++ /* If there is no free slot... */ ++ ++ if (down_trylock(&state->slot_available_event) != 0) { ++ /* ...wait for one. */ ++ ++ VCHIQ_STATS_INC(state, slot_stalls); ++ ++ /* But first, flush through the last slot. */ ++ state->local_tx_pos = tx_pos; ++ local->tx_pos = tx_pos; ++ remote_event_signal(&state->remote->trigger); ++ ++ if (!is_blocking || ++ (down_interruptible( ++ &state->slot_available_event) != 0)) ++ return NULL; /* No space available */ ++ } ++ ++ BUG_ON(tx_pos == ++ (state->slot_queue_available * VCHIQ_SLOT_SIZE)); ++ ++ slot_index = local->slot_queue[ ++ SLOT_QUEUE_INDEX_FROM_POS(tx_pos) & ++ VCHIQ_SLOT_QUEUE_MASK]; ++ state->tx_data = ++ (char *)SLOT_DATA_FROM_INDEX(state, slot_index); ++ } ++ ++ state->local_tx_pos = tx_pos + space; ++ ++ return (VCHIQ_HEADER_T *)(state->tx_data + (tx_pos & VCHIQ_SLOT_MASK)); ++} ++ ++/* Called by the recycle thread. */ ++static void ++process_free_queue(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_SHARED_STATE_T *local = state->local; ++ BITSET_T service_found[BITSET_SIZE(VCHIQ_MAX_SERVICES)]; ++ int slot_queue_available; ++ ++ /* Use a read memory barrier to ensure that any state that may have ++ ** been modified by another thread is not masked by stale prefetched ++ ** values. */ ++ rmb(); ++ ++ /* Find slots which have been freed by the other side, and return them ++ ** to the available queue. */ ++ slot_queue_available = state->slot_queue_available; ++ ++ while (slot_queue_available != local->slot_queue_recycle) { ++ unsigned int pos; ++ int slot_index = local->slot_queue[slot_queue_available++ & ++ VCHIQ_SLOT_QUEUE_MASK]; ++ char *data = (char *)SLOT_DATA_FROM_INDEX(state, slot_index); ++ int data_found = 0; ++ ++ vchiq_log_trace(vchiq_core_log_level, "%d: pfq %d=%x %x %x", ++ state->id, slot_index, (unsigned int)data, ++ local->slot_queue_recycle, slot_queue_available); ++ ++ /* Initialise the bitmask for services which have used this ++ ** slot */ ++ BITSET_ZERO(service_found); ++ ++ pos = 0; ++ ++ while (pos < VCHIQ_SLOT_SIZE) { ++ VCHIQ_HEADER_T *header = ++ (VCHIQ_HEADER_T *)(data + pos); ++ int msgid = header->msgid; ++ if (VCHIQ_MSG_TYPE(msgid) == VCHIQ_MSG_DATA) { ++ int port = VCHIQ_MSG_SRCPORT(msgid); ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &state->service_quotas[port]; ++ int count; ++ spin_lock("a_spinlock); ++ count = service_quota->message_use_count; ++ if (count > 0) ++ service_quota->message_use_count = ++ count - 1; ++ spin_unlock("a_spinlock); ++ ++ if (count == service_quota->message_quota) ++ /* Signal the service that it ++ ** has dropped below its quota ++ */ ++ up(&service_quota->quota_event); ++ else if (count == 0) { ++ vchiq_log_error(vchiq_core_log_level, ++ "service %d " ++ "message_use_count=%d " ++ "(header %x, msgid %x, " ++ "header->msgid %x, " ++ "header->size %x)", ++ port, ++ service_quota-> ++ message_use_count, ++ (unsigned int)header, msgid, ++ header->msgid, ++ header->size); ++ WARN(1, "invalid message use count\n"); ++ } ++ if (!BITSET_IS_SET(service_found, port)) { ++ /* Set the found bit for this service */ ++ BITSET_SET(service_found, port); ++ ++ spin_lock("a_spinlock); ++ count = service_quota->slot_use_count; ++ if (count > 0) ++ service_quota->slot_use_count = ++ count - 1; ++ spin_unlock("a_spinlock); ++ ++ if (count > 0) { ++ /* Signal the service in case ++ ** it has dropped below its ++ ** quota */ ++ up(&service_quota->quota_event); ++ vchiq_log_trace( ++ vchiq_core_log_level, ++ "%d: pfq:%d %x@%x - " ++ "slot_use->%d", ++ state->id, port, ++ header->size, ++ (unsigned int)header, ++ count - 1); ++ } else { ++ vchiq_log_error( ++ vchiq_core_log_level, ++ "service %d " ++ "slot_use_count" ++ "=%d (header %x" ++ ", msgid %x, " ++ "header->msgid" ++ " %x, header->" ++ "size %x)", ++ port, count, ++ (unsigned int)header, ++ msgid, ++ header->msgid, ++ header->size); ++ WARN(1, "bad slot use count\n"); ++ } ++ } ++ ++ data_found = 1; ++ } ++ ++ pos += calc_stride(header->size); ++ if (pos > VCHIQ_SLOT_SIZE) { ++ vchiq_log_error(vchiq_core_log_level, ++ "pfq - pos %x: header %x, msgid %x, " ++ "header->msgid %x, header->size %x", ++ pos, (unsigned int)header, msgid, ++ header->msgid, header->size); ++ WARN(1, "invalid slot position\n"); ++ } ++ } ++ ++ if (data_found) { ++ int count; ++ spin_lock("a_spinlock); ++ count = state->data_use_count; ++ if (count > 0) ++ state->data_use_count = ++ count - 1; ++ spin_unlock("a_spinlock); ++ if (count == state->data_quota) ++ up(&state->data_quota_event); ++ } ++ ++ state->slot_queue_available = slot_queue_available; ++ up(&state->slot_available_event); ++ } ++} ++ ++/* Called by the slot handler and application threads */ ++static VCHIQ_STATUS_T ++queue_message(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, ++ int msgid, const VCHIQ_ELEMENT_T *elements, ++ int count, int size, int is_blocking) ++{ ++ VCHIQ_SHARED_STATE_T *local; ++ VCHIQ_SERVICE_QUOTA_T *service_quota = NULL; ++ VCHIQ_HEADER_T *header; ++ int type = VCHIQ_MSG_TYPE(msgid); ++ ++ unsigned int stride; ++ ++ local = state->local; ++ ++ stride = calc_stride(size); ++ ++ WARN_ON(!(stride <= VCHIQ_SLOT_SIZE)); ++ ++ if ((type != VCHIQ_MSG_RESUME) && ++ (mutex_lock_interruptible(&state->slot_mutex) != 0)) ++ return VCHIQ_RETRY; ++ ++ if (type == VCHIQ_MSG_DATA) { ++ int tx_end_index; ++ ++ BUG_ON(!service); ++ ++ if (service->closing) { ++ /* The service has been closed */ ++ mutex_unlock(&state->slot_mutex); ++ return VCHIQ_ERROR; ++ } ++ ++ service_quota = &state->service_quotas[service->localport]; ++ ++ spin_lock("a_spinlock); ++ ++ /* Ensure this service doesn't use more than its quota of ++ ** messages or slots */ ++ tx_end_index = SLOT_QUEUE_INDEX_FROM_POS( ++ state->local_tx_pos + stride - 1); ++ ++ /* Ensure data messages don't use more than their quota of ++ ** slots */ ++ while ((tx_end_index != state->previous_data_index) && ++ (state->data_use_count == state->data_quota)) { ++ VCHIQ_STATS_INC(state, data_stalls); ++ spin_unlock("a_spinlock); ++ mutex_unlock(&state->slot_mutex); ++ ++ if (down_interruptible(&state->data_quota_event) ++ != 0) ++ return VCHIQ_RETRY; ++ ++ mutex_lock(&state->slot_mutex); ++ spin_lock("a_spinlock); ++ tx_end_index = SLOT_QUEUE_INDEX_FROM_POS( ++ state->local_tx_pos + stride - 1); ++ if ((tx_end_index == state->previous_data_index) || ++ (state->data_use_count < state->data_quota)) { ++ /* Pass the signal on to other waiters */ ++ up(&state->data_quota_event); ++ break; ++ } ++ } ++ ++ while ((service_quota->message_use_count == ++ service_quota->message_quota) || ++ ((tx_end_index != service_quota->previous_tx_index) && ++ (service_quota->slot_use_count == ++ service_quota->slot_quota))) { ++ spin_unlock("a_spinlock); ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: qm:%d %s,%x - quota stall " ++ "(msg %d, slot %d)", ++ state->id, service->localport, ++ msg_type_str(type), size, ++ service_quota->message_use_count, ++ service_quota->slot_use_count); ++ VCHIQ_SERVICE_STATS_INC(service, quota_stalls); ++ mutex_unlock(&state->slot_mutex); ++ if (down_interruptible(&service_quota->quota_event) ++ != 0) ++ return VCHIQ_RETRY; ++ if (service->closing) ++ return VCHIQ_ERROR; ++ if (mutex_lock_interruptible(&state->slot_mutex) != 0) ++ return VCHIQ_RETRY; ++ if (service->srvstate != VCHIQ_SRVSTATE_OPEN) { ++ /* The service has been closed */ ++ mutex_unlock(&state->slot_mutex); ++ return VCHIQ_ERROR; ++ } ++ spin_lock("a_spinlock); ++ tx_end_index = SLOT_QUEUE_INDEX_FROM_POS( ++ state->local_tx_pos + stride - 1); ++ } ++ ++ spin_unlock("a_spinlock); ++ } ++ ++ header = reserve_space(state, stride, is_blocking); ++ ++ if (!header) { ++ if (service) ++ VCHIQ_SERVICE_STATS_INC(service, slot_stalls); ++ mutex_unlock(&state->slot_mutex); ++ return VCHIQ_RETRY; ++ } ++ ++ if (type == VCHIQ_MSG_DATA) { ++ int i, pos; ++ int tx_end_index; ++ int slot_use_count; ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: qm %s@%x,%x (%d->%d)", ++ state->id, ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ (unsigned int)header, size, ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid)); ++ ++ BUG_ON(!service); ++ ++ for (i = 0, pos = 0; i < (unsigned int)count; ++ pos += elements[i++].size) ++ if (elements[i].size) { ++ if (vchiq_copy_from_user ++ (header->data + pos, elements[i].data, ++ (size_t) elements[i].size) != ++ VCHIQ_SUCCESS) { ++ mutex_unlock(&state->slot_mutex); ++ VCHIQ_SERVICE_STATS_INC(service, ++ error_count); ++ return VCHIQ_ERROR; ++ } ++ if (i == 0) { ++ if (vchiq_core_msg_log_level >= ++ VCHIQ_LOG_INFO) ++ vchiq_log_dump_mem("Sent", 0, ++ header->data + pos, ++ min(64u, ++ elements[0].size)); ++ } ++ } ++ ++ spin_lock("a_spinlock); ++ service_quota->message_use_count++; ++ ++ tx_end_index = ++ SLOT_QUEUE_INDEX_FROM_POS(state->local_tx_pos - 1); ++ ++ /* If this transmission can't fit in the last slot used by any ++ ** service, the data_use_count must be increased. */ ++ if (tx_end_index != state->previous_data_index) { ++ state->previous_data_index = tx_end_index; ++ state->data_use_count++; ++ } ++ ++ /* If this isn't the same slot last used by this service, ++ ** the service's slot_use_count must be increased. */ ++ if (tx_end_index != service_quota->previous_tx_index) { ++ service_quota->previous_tx_index = tx_end_index; ++ slot_use_count = ++service_quota->slot_use_count; ++ } else { ++ slot_use_count = 0; ++ } ++ ++ spin_unlock("a_spinlock); ++ ++ if (slot_use_count) ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: qm:%d %s,%x - slot_use->%d (hdr %p)", ++ state->id, service->localport, ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), size, ++ slot_use_count, header); ++ ++ VCHIQ_SERVICE_STATS_INC(service, ctrl_tx_count); ++ VCHIQ_SERVICE_STATS_ADD(service, ctrl_tx_bytes, size); ++ } else { ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: qm %s@%x,%x (%d->%d)", state->id, ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ (unsigned int)header, size, ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid)); ++ if (size != 0) { ++ WARN_ON(!((count == 1) && (size == elements[0].size))); ++ memcpy(header->data, elements[0].data, ++ elements[0].size); ++ } ++ VCHIQ_STATS_INC(state, ctrl_tx_count); ++ } ++ ++ header->msgid = msgid; ++ header->size = size; ++ ++ { ++ int svc_fourcc; ++ ++ svc_fourcc = service ++ ? service->base.fourcc ++ : VCHIQ_MAKE_FOURCC('?', '?', '?', '?'); ++ ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "Sent Msg %s(%u) to %c%c%c%c s:%u d:%d len:%d", ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ VCHIQ_MSG_TYPE(msgid), ++ VCHIQ_FOURCC_AS_4CHARS(svc_fourcc), ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid), ++ size); ++ } ++ ++ /* Make sure the new header is visible to the peer. */ ++ wmb(); ++ ++ /* Make the new tx_pos visible to the peer. */ ++ local->tx_pos = state->local_tx_pos; ++ wmb(); ++ ++ if (service && (type == VCHIQ_MSG_CLOSE)) ++ vchiq_set_service_state(service, VCHIQ_SRVSTATE_CLOSESENT); ++ ++ if (VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_PAUSE) ++ mutex_unlock(&state->slot_mutex); ++ ++ remote_event_signal(&state->remote->trigger); ++ ++ return VCHIQ_SUCCESS; ++} ++ ++/* Called by the slot handler and application threads */ ++static VCHIQ_STATUS_T ++queue_message_sync(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, ++ int msgid, const VCHIQ_ELEMENT_T *elements, ++ int count, int size, int is_blocking) ++{ ++ VCHIQ_SHARED_STATE_T *local; ++ VCHIQ_HEADER_T *header; ++ ++ local = state->local; ++ ++ if ((VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_RESUME) && ++ (mutex_lock_interruptible(&state->sync_mutex) != 0)) ++ return VCHIQ_RETRY; ++ ++ remote_event_wait(&local->sync_release); ++ ++ rmb(); ++ ++ header = (VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, ++ local->slot_sync); ++ ++ { ++ int oldmsgid = header->msgid; ++ if (oldmsgid != VCHIQ_MSGID_PADDING) ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: qms - msgid %x, not PADDING", ++ state->id, oldmsgid); ++ } ++ ++ if (service) { ++ int i, pos; ++ ++ vchiq_log_info(vchiq_sync_log_level, ++ "%d: qms %s@%x,%x (%d->%d)", state->id, ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ (unsigned int)header, size, ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid)); ++ ++ for (i = 0, pos = 0; i < (unsigned int)count; ++ pos += elements[i++].size) ++ if (elements[i].size) { ++ if (vchiq_copy_from_user ++ (header->data + pos, elements[i].data, ++ (size_t) elements[i].size) != ++ VCHIQ_SUCCESS) { ++ mutex_unlock(&state->sync_mutex); ++ VCHIQ_SERVICE_STATS_INC(service, ++ error_count); ++ return VCHIQ_ERROR; ++ } ++ if (i == 0) { ++ if (vchiq_sync_log_level >= ++ VCHIQ_LOG_TRACE) ++ vchiq_log_dump_mem("Sent Sync", ++ 0, header->data + pos, ++ min(64u, ++ elements[0].size)); ++ } ++ } ++ ++ VCHIQ_SERVICE_STATS_INC(service, ctrl_tx_count); ++ VCHIQ_SERVICE_STATS_ADD(service, ctrl_tx_bytes, size); ++ } else { ++ vchiq_log_info(vchiq_sync_log_level, ++ "%d: qms %s@%x,%x (%d->%d)", state->id, ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ (unsigned int)header, size, ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid)); ++ if (size != 0) { ++ WARN_ON(!((count == 1) && (size == elements[0].size))); ++ memcpy(header->data, elements[0].data, ++ elements[0].size); ++ } ++ VCHIQ_STATS_INC(state, ctrl_tx_count); ++ } ++ ++ header->size = size; ++ header->msgid = msgid; ++ ++ if (vchiq_sync_log_level >= VCHIQ_LOG_TRACE) { ++ int svc_fourcc; ++ ++ svc_fourcc = service ++ ? service->base.fourcc ++ : VCHIQ_MAKE_FOURCC('?', '?', '?', '?'); ++ ++ vchiq_log_trace(vchiq_sync_log_level, ++ "Sent Sync Msg %s(%u) to %c%c%c%c s:%u d:%d len:%d", ++ msg_type_str(VCHIQ_MSG_TYPE(msgid)), ++ VCHIQ_MSG_TYPE(msgid), ++ VCHIQ_FOURCC_AS_4CHARS(svc_fourcc), ++ VCHIQ_MSG_SRCPORT(msgid), ++ VCHIQ_MSG_DSTPORT(msgid), ++ size); ++ } ++ ++ /* Make sure the new header is visible to the peer. */ ++ wmb(); ++ ++ remote_event_signal(&state->remote->sync_trigger); ++ ++ if (VCHIQ_MSG_TYPE(msgid) != VCHIQ_MSG_PAUSE) ++ mutex_unlock(&state->sync_mutex); ++ ++ return VCHIQ_SUCCESS; ++} ++ ++static inline void ++claim_slot(VCHIQ_SLOT_INFO_T *slot) ++{ ++ slot->use_count++; ++} ++ ++static void ++release_slot(VCHIQ_STATE_T *state, VCHIQ_SLOT_INFO_T *slot_info, ++ VCHIQ_HEADER_T *header, VCHIQ_SERVICE_T *service) ++{ ++ int release_count; ++ ++ mutex_lock(&state->recycle_mutex); ++ ++ if (header) { ++ int msgid = header->msgid; ++ if (((msgid & VCHIQ_MSGID_CLAIMED) == 0) || ++ (service && service->closing)) { ++ mutex_unlock(&state->recycle_mutex); ++ return; ++ } ++ ++ /* Rewrite the message header to prevent a double ++ ** release */ ++ header->msgid = msgid & ~VCHIQ_MSGID_CLAIMED; ++ } ++ ++ release_count = slot_info->release_count; ++ slot_info->release_count = ++release_count; ++ ++ if (release_count == slot_info->use_count) { ++ int slot_queue_recycle; ++ /* Add to the freed queue */ ++ ++ /* A read barrier is necessary here to prevent speculative ++ ** fetches of remote->slot_queue_recycle from overtaking the ++ ** mutex. */ ++ rmb(); ++ ++ slot_queue_recycle = state->remote->slot_queue_recycle; ++ state->remote->slot_queue[slot_queue_recycle & ++ VCHIQ_SLOT_QUEUE_MASK] = ++ SLOT_INDEX_FROM_INFO(state, slot_info); ++ state->remote->slot_queue_recycle = slot_queue_recycle + 1; ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: release_slot %d - recycle->%x", ++ state->id, SLOT_INDEX_FROM_INFO(state, slot_info), ++ state->remote->slot_queue_recycle); ++ ++ /* A write barrier is necessary, but remote_event_signal ++ ** contains one. */ ++ remote_event_signal(&state->remote->recycle); ++ } ++ ++ mutex_unlock(&state->recycle_mutex); ++} ++ ++/* Called by the slot handler - don't hold the bulk mutex */ ++static VCHIQ_STATUS_T ++notify_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue, ++ int retry_poll) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: nb:%d %cx - p=%x rn=%x r=%x", ++ service->state->id, service->localport, ++ (queue == &service->bulk_tx) ? 't' : 'r', ++ queue->process, queue->remote_notify, queue->remove); ++ ++ if (service->state->is_master) { ++ while (queue->remote_notify != queue->process) { ++ VCHIQ_BULK_T *bulk = ++ &queue->bulks[BULK_INDEX(queue->remote_notify)]; ++ int msgtype = (bulk->dir == VCHIQ_BULK_TRANSMIT) ? ++ VCHIQ_MSG_BULK_RX_DONE : VCHIQ_MSG_BULK_TX_DONE; ++ int msgid = VCHIQ_MAKE_MSG(msgtype, service->localport, ++ service->remoteport); ++ VCHIQ_ELEMENT_T element = { &bulk->actual, 4 }; ++ /* Only reply to non-dummy bulk requests */ ++ if (bulk->remote_data) { ++ status = queue_message(service->state, NULL, ++ msgid, &element, 1, 4, 0); ++ if (status != VCHIQ_SUCCESS) ++ break; ++ } ++ queue->remote_notify++; ++ } ++ } else { ++ queue->remote_notify = queue->process; ++ } ++ ++ if (status == VCHIQ_SUCCESS) { ++ while (queue->remove != queue->remote_notify) { ++ VCHIQ_BULK_T *bulk = ++ &queue->bulks[BULK_INDEX(queue->remove)]; ++ ++ /* Only generate callbacks for non-dummy bulk ++ ** requests, and non-terminated services */ ++ if (bulk->data && service->instance) { ++ if (bulk->actual != VCHIQ_BULK_ACTUAL_ABORTED) { ++ if (bulk->dir == VCHIQ_BULK_TRANSMIT) { ++ VCHIQ_SERVICE_STATS_INC(service, ++ bulk_tx_count); ++ VCHIQ_SERVICE_STATS_ADD(service, ++ bulk_tx_bytes, ++ bulk->actual); ++ } else { ++ VCHIQ_SERVICE_STATS_INC(service, ++ bulk_rx_count); ++ VCHIQ_SERVICE_STATS_ADD(service, ++ bulk_rx_bytes, ++ bulk->actual); ++ } ++ } else { ++ VCHIQ_SERVICE_STATS_INC(service, ++ bulk_aborted_count); ++ } ++ if (bulk->mode == VCHIQ_BULK_MODE_BLOCKING) { ++ struct bulk_waiter *waiter; ++ spin_lock(&bulk_waiter_spinlock); ++ waiter = bulk->userdata; ++ if (waiter) { ++ waiter->actual = bulk->actual; ++ up(&waiter->event); ++ } ++ spin_unlock(&bulk_waiter_spinlock); ++ } else if (bulk->mode == ++ VCHIQ_BULK_MODE_CALLBACK) { ++ VCHIQ_REASON_T reason = (bulk->dir == ++ VCHIQ_BULK_TRANSMIT) ? ++ ((bulk->actual == ++ VCHIQ_BULK_ACTUAL_ABORTED) ? ++ VCHIQ_BULK_TRANSMIT_ABORTED : ++ VCHIQ_BULK_TRANSMIT_DONE) : ++ ((bulk->actual == ++ VCHIQ_BULK_ACTUAL_ABORTED) ? ++ VCHIQ_BULK_RECEIVE_ABORTED : ++ VCHIQ_BULK_RECEIVE_DONE); ++ status = make_service_callback(service, ++ reason, NULL, bulk->userdata); ++ if (status == VCHIQ_RETRY) ++ break; ++ } ++ } ++ ++ queue->remove++; ++ up(&service->bulk_remove_event); ++ } ++ if (!retry_poll) ++ status = VCHIQ_SUCCESS; ++ } ++ ++ if (status == VCHIQ_RETRY) ++ request_poll(service->state, service, ++ (queue == &service->bulk_tx) ? ++ VCHIQ_POLL_TXNOTIFY : VCHIQ_POLL_RXNOTIFY); ++ ++ return status; ++} ++ ++/* Called by the slot handler thread */ ++static void ++poll_services(VCHIQ_STATE_T *state) ++{ ++ int group, i; ++ ++ for (group = 0; group < BITSET_SIZE(state->unused_service); group++) { ++ uint32_t flags; ++ flags = atomic_xchg(&state->poll_services[group], 0); ++ for (i = 0; flags; i++) { ++ if (flags & (1 << i)) { ++ VCHIQ_SERVICE_T *service = ++ find_service_by_port(state, ++ (group<<5) + i); ++ uint32_t service_flags; ++ flags &= ~(1 << i); ++ if (!service) ++ continue; ++ service_flags = ++ atomic_xchg(&service->poll_flags, 0); ++ if (service_flags & ++ (1 << VCHIQ_POLL_REMOVE)) { ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: ps - remove %d<->%d", ++ state->id, service->localport, ++ service->remoteport); ++ ++ /* Make it look like a client, because ++ it must be removed and not left in ++ the LISTENING state. */ ++ service->public_fourcc = ++ VCHIQ_FOURCC_INVALID; ++ ++ if (vchiq_close_service_internal( ++ service, 0/*!close_recvd*/) != ++ VCHIQ_SUCCESS) ++ request_poll(state, service, ++ VCHIQ_POLL_REMOVE); ++ } else if (service_flags & ++ (1 << VCHIQ_POLL_TERMINATE)) { ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: ps - terminate %d<->%d", ++ state->id, service->localport, ++ service->remoteport); ++ if (vchiq_close_service_internal( ++ service, 0/*!close_recvd*/) != ++ VCHIQ_SUCCESS) ++ request_poll(state, service, ++ VCHIQ_POLL_TERMINATE); ++ } ++ if (service_flags & (1 << VCHIQ_POLL_TXNOTIFY)) ++ notify_bulks(service, ++ &service->bulk_tx, ++ 1/*retry_poll*/); ++ if (service_flags & (1 << VCHIQ_POLL_RXNOTIFY)) ++ notify_bulks(service, ++ &service->bulk_rx, ++ 1/*retry_poll*/); ++ unlock_service(service); ++ } ++ } ++ } ++} ++ ++/* Called by the slot handler or application threads, holding the bulk mutex. */ ++static int ++resolve_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ int resolved = 0; ++ int rc; ++ ++ while ((queue->process != queue->local_insert) && ++ (queue->process != queue->remote_insert)) { ++ VCHIQ_BULK_T *bulk = &queue->bulks[BULK_INDEX(queue->process)]; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: rb:%d %cx - li=%x ri=%x p=%x", ++ state->id, service->localport, ++ (queue == &service->bulk_tx) ? 't' : 'r', ++ queue->local_insert, queue->remote_insert, ++ queue->process); ++ ++ WARN_ON(!((int)(queue->local_insert - queue->process) > 0)); ++ WARN_ON(!((int)(queue->remote_insert - queue->process) > 0)); ++ ++ rc = mutex_lock_interruptible(&state->bulk_transfer_mutex); ++ if (rc != 0) ++ break; ++ ++ vchiq_transfer_bulk(bulk); ++ mutex_unlock(&state->bulk_transfer_mutex); ++ ++ if (vchiq_core_msg_log_level >= VCHIQ_LOG_INFO) { ++ const char *header = (queue == &service->bulk_tx) ? ++ "Send Bulk to" : "Recv Bulk from"; ++ if (bulk->actual != VCHIQ_BULK_ACTUAL_ABORTED) ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "%s %c%c%c%c d:%d len:%d %x<->%x", ++ header, ++ VCHIQ_FOURCC_AS_4CHARS( ++ service->base.fourcc), ++ service->remoteport, ++ bulk->size, ++ (unsigned int)bulk->data, ++ (unsigned int)bulk->remote_data); ++ else ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "%s %c%c%c%c d:%d ABORTED - tx len:%d," ++ " rx len:%d %x<->%x", ++ header, ++ VCHIQ_FOURCC_AS_4CHARS( ++ service->base.fourcc), ++ service->remoteport, ++ bulk->size, ++ bulk->remote_size, ++ (unsigned int)bulk->data, ++ (unsigned int)bulk->remote_data); ++ } ++ ++ vchiq_complete_bulk(bulk); ++ queue->process++; ++ resolved++; ++ } ++ return resolved; ++} ++ ++/* Called with the bulk_mutex held */ ++static void ++abort_outstanding_bulks(VCHIQ_SERVICE_T *service, VCHIQ_BULK_QUEUE_T *queue) ++{ ++ int is_tx = (queue == &service->bulk_tx); ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: aob:%d %cx - li=%x ri=%x p=%x", ++ service->state->id, service->localport, is_tx ? 't' : 'r', ++ queue->local_insert, queue->remote_insert, queue->process); ++ ++ WARN_ON(!((int)(queue->local_insert - queue->process) >= 0)); ++ WARN_ON(!((int)(queue->remote_insert - queue->process) >= 0)); ++ ++ while ((queue->process != queue->local_insert) || ++ (queue->process != queue->remote_insert)) { ++ VCHIQ_BULK_T *bulk = &queue->bulks[BULK_INDEX(queue->process)]; ++ ++ if (queue->process == queue->remote_insert) { ++ /* fabricate a matching dummy bulk */ ++ bulk->remote_data = NULL; ++ bulk->remote_size = 0; ++ queue->remote_insert++; ++ } ++ ++ if (queue->process != queue->local_insert) { ++ vchiq_complete_bulk(bulk); ++ ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "%s %c%c%c%c d:%d ABORTED - tx len:%d, " ++ "rx len:%d", ++ is_tx ? "Send Bulk to" : "Recv Bulk from", ++ VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), ++ service->remoteport, ++ bulk->size, ++ bulk->remote_size); ++ } else { ++ /* fabricate a matching dummy bulk */ ++ bulk->data = NULL; ++ bulk->size = 0; ++ bulk->actual = VCHIQ_BULK_ACTUAL_ABORTED; ++ bulk->dir = is_tx ? VCHIQ_BULK_TRANSMIT : ++ VCHIQ_BULK_RECEIVE; ++ queue->local_insert++; ++ } ++ ++ queue->process++; ++ } ++} ++ ++/* Called from the slot handler thread */ ++static void ++pause_bulks(VCHIQ_STATE_T *state) ++{ ++ if (unlikely(atomic_inc_return(&pause_bulks_count) != 1)) { ++ WARN_ON_ONCE(1); ++ atomic_set(&pause_bulks_count, 1); ++ return; ++ } ++ ++ /* Block bulk transfers from all services */ ++ mutex_lock(&state->bulk_transfer_mutex); ++} ++ ++/* Called from the slot handler thread */ ++static void ++resume_bulks(VCHIQ_STATE_T *state) ++{ ++ int i; ++ if (unlikely(atomic_dec_return(&pause_bulks_count) != 0)) { ++ WARN_ON_ONCE(1); ++ atomic_set(&pause_bulks_count, 0); ++ return; ++ } ++ ++ /* Allow bulk transfers from all services */ ++ mutex_unlock(&state->bulk_transfer_mutex); ++ ++ if (state->deferred_bulks == 0) ++ return; ++ ++ /* Deal with any bulks which had to be deferred due to being in ++ * paused state. Don't try to match up to number of deferred bulks ++ * in case we've had something come and close the service in the ++ * interim - just process all bulk queues for all services */ ++ vchiq_log_info(vchiq_core_log_level, "%s: processing %d deferred bulks", ++ __func__, state->deferred_bulks); ++ ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = state->services[i]; ++ int resolved_rx = 0; ++ int resolved_tx = 0; ++ if (!service || (service->srvstate != VCHIQ_SRVSTATE_OPEN)) ++ continue; ++ ++ mutex_lock(&service->bulk_mutex); ++ resolved_rx = resolve_bulks(service, &service->bulk_rx); ++ resolved_tx = resolve_bulks(service, &service->bulk_tx); ++ mutex_unlock(&service->bulk_mutex); ++ if (resolved_rx) ++ notify_bulks(service, &service->bulk_rx, 1); ++ if (resolved_tx) ++ notify_bulks(service, &service->bulk_tx, 1); ++ } ++ state->deferred_bulks = 0; ++} ++ ++static int ++parse_open(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header) ++{ ++ VCHIQ_SERVICE_T *service = NULL; ++ int msgid, size; ++ int type; ++ unsigned int localport, remoteport; ++ ++ msgid = header->msgid; ++ size = header->size; ++ type = VCHIQ_MSG_TYPE(msgid); ++ localport = VCHIQ_MSG_DSTPORT(msgid); ++ remoteport = VCHIQ_MSG_SRCPORT(msgid); ++ if (size >= sizeof(struct vchiq_open_payload)) { ++ const struct vchiq_open_payload *payload = ++ (struct vchiq_open_payload *)header->data; ++ unsigned int fourcc; ++ ++ fourcc = payload->fourcc; ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs OPEN@%x (%d->'%c%c%c%c')", ++ state->id, (unsigned int)header, ++ localport, ++ VCHIQ_FOURCC_AS_4CHARS(fourcc)); ++ ++ service = get_listening_service(state, fourcc); ++ ++ if (service) { ++ /* A matching service exists */ ++ short version = payload->version; ++ short version_min = payload->version_min; ++ if ((service->version < version_min) || ++ (version < service->version_min)) { ++ /* Version mismatch */ ++ vchiq_loud_error_header(); ++ vchiq_loud_error("%d: service %d (%c%c%c%c) " ++ "version mismatch - local (%d, min %d)" ++ " vs. remote (%d, min %d)", ++ state->id, service->localport, ++ VCHIQ_FOURCC_AS_4CHARS(fourcc), ++ service->version, service->version_min, ++ version, version_min); ++ vchiq_loud_error_footer(); ++ unlock_service(service); ++ service = NULL; ++ goto fail_open; ++ } ++ service->peer_version = version; ++ ++ if (service->srvstate == VCHIQ_SRVSTATE_LISTENING) { ++ struct vchiq_openack_payload ack_payload = { ++ service->version ++ }; ++ VCHIQ_ELEMENT_T body = { ++ &ack_payload, ++ sizeof(ack_payload) ++ }; ++ ++ /* Acknowledge the OPEN */ ++ if (service->sync) { ++ if (queue_message_sync(state, NULL, ++ VCHIQ_MAKE_MSG( ++ VCHIQ_MSG_OPENACK, ++ service->localport, ++ remoteport), ++ &body, 1, sizeof(ack_payload), ++ 0) == VCHIQ_RETRY) ++ goto bail_not_ready; ++ } else { ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG( ++ VCHIQ_MSG_OPENACK, ++ service->localport, ++ remoteport), ++ &body, 1, sizeof(ack_payload), ++ 0) == VCHIQ_RETRY) ++ goto bail_not_ready; ++ } ++ ++ /* The service is now open */ ++ vchiq_set_service_state(service, ++ service->sync ? VCHIQ_SRVSTATE_OPENSYNC ++ : VCHIQ_SRVSTATE_OPEN); ++ } ++ ++ service->remoteport = remoteport; ++ service->client_id = ((int *)header->data)[1]; ++ if (make_service_callback(service, VCHIQ_SERVICE_OPENED, ++ NULL, NULL) == VCHIQ_RETRY) { ++ /* Bail out if not ready */ ++ service->remoteport = VCHIQ_PORT_FREE; ++ goto bail_not_ready; ++ } ++ ++ /* Success - the message has been dealt with */ ++ unlock_service(service); ++ return 1; ++ } ++ } ++ ++fail_open: ++ /* No available service, or an invalid request - send a CLOSE */ ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_CLOSE, 0, VCHIQ_MSG_SRCPORT(msgid)), ++ NULL, 0, 0, 0) == VCHIQ_RETRY) ++ goto bail_not_ready; ++ ++ return 1; ++ ++bail_not_ready: ++ if (service) ++ unlock_service(service); ++ ++ return 0; ++} ++ ++/* Called by the slot handler thread */ ++static void ++parse_rx_slots(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_SHARED_STATE_T *remote = state->remote; ++ VCHIQ_SERVICE_T *service = NULL; ++ int tx_pos; ++ DEBUG_INITIALISE(state->local) ++ ++ tx_pos = remote->tx_pos; ++ ++ while (state->rx_pos != tx_pos) { ++ VCHIQ_HEADER_T *header; ++ int msgid, size; ++ int type; ++ unsigned int localport, remoteport; ++ ++ DEBUG_TRACE(PARSE_LINE); ++ if (!state->rx_data) { ++ int rx_index; ++ WARN_ON(!((state->rx_pos & VCHIQ_SLOT_MASK) == 0)); ++ rx_index = remote->slot_queue[ ++ SLOT_QUEUE_INDEX_FROM_POS(state->rx_pos) & ++ VCHIQ_SLOT_QUEUE_MASK]; ++ state->rx_data = (char *)SLOT_DATA_FROM_INDEX(state, ++ rx_index); ++ state->rx_info = SLOT_INFO_FROM_INDEX(state, rx_index); ++ ++ /* Initialise use_count to one, and increment ++ ** release_count at the end of the slot to avoid ++ ** releasing the slot prematurely. */ ++ state->rx_info->use_count = 1; ++ state->rx_info->release_count = 0; ++ } ++ ++ header = (VCHIQ_HEADER_T *)(state->rx_data + ++ (state->rx_pos & VCHIQ_SLOT_MASK)); ++ DEBUG_VALUE(PARSE_HEADER, (int)header); ++ msgid = header->msgid; ++ DEBUG_VALUE(PARSE_MSGID, msgid); ++ size = header->size; ++ type = VCHIQ_MSG_TYPE(msgid); ++ localport = VCHIQ_MSG_DSTPORT(msgid); ++ remoteport = VCHIQ_MSG_SRCPORT(msgid); ++ ++ if (type != VCHIQ_MSG_DATA) ++ VCHIQ_STATS_INC(state, ctrl_rx_count); ++ ++ switch (type) { ++ case VCHIQ_MSG_OPENACK: ++ case VCHIQ_MSG_CLOSE: ++ case VCHIQ_MSG_DATA: ++ case VCHIQ_MSG_BULK_RX: ++ case VCHIQ_MSG_BULK_TX: ++ case VCHIQ_MSG_BULK_RX_DONE: ++ case VCHIQ_MSG_BULK_TX_DONE: ++ service = find_service_by_port(state, localport); ++ if ((!service || service->remoteport != remoteport) && ++ (localport == 0) && ++ (type == VCHIQ_MSG_CLOSE)) { ++ /* This could be a CLOSE from a client which ++ hadn't yet received the OPENACK - look for ++ the connected service */ ++ if (service) ++ unlock_service(service); ++ service = get_connected_service(state, ++ remoteport); ++ if (service) ++ vchiq_log_warning(vchiq_core_log_level, ++ "%d: prs %s@%x (%d->%d) - " ++ "found connected service %d", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, ++ service->localport); ++ } ++ ++ if (!service) { ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: prs %s@%x (%d->%d) - " ++ "invalid/closed service %d", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, localport); ++ goto skip_message; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ if (vchiq_core_msg_log_level >= VCHIQ_LOG_INFO) { ++ int svc_fourcc; ++ ++ svc_fourcc = service ++ ? service->base.fourcc ++ : VCHIQ_MAKE_FOURCC('?', '?', '?', '?'); ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "Rcvd Msg %s(%u) from %c%c%c%c s:%d d:%d " ++ "len:%d", ++ msg_type_str(type), type, ++ VCHIQ_FOURCC_AS_4CHARS(svc_fourcc), ++ remoteport, localport, size); ++ if (size > 0) ++ vchiq_log_dump_mem("Rcvd", 0, header->data, ++ min(64, size)); ++ } ++ ++ if (((unsigned int)header & VCHIQ_SLOT_MASK) + calc_stride(size) ++ > VCHIQ_SLOT_SIZE) { ++ vchiq_log_error(vchiq_core_log_level, ++ "header %x (msgid %x) - size %x too big for " ++ "slot", ++ (unsigned int)header, (unsigned int)msgid, ++ (unsigned int)size); ++ WARN(1, "oversized for slot\n"); ++ } ++ ++ switch (type) { ++ case VCHIQ_MSG_OPEN: ++ WARN_ON(!(VCHIQ_MSG_DSTPORT(msgid) == 0)); ++ if (!parse_open(state, header)) ++ goto bail_not_ready; ++ break; ++ case VCHIQ_MSG_OPENACK: ++ if (size >= sizeof(struct vchiq_openack_payload)) { ++ const struct vchiq_openack_payload *payload = ++ (struct vchiq_openack_payload *) ++ header->data; ++ service->peer_version = payload->version; ++ } ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs OPENACK@%x,%x (%d->%d) v:%d", ++ state->id, (unsigned int)header, size, ++ remoteport, localport, service->peer_version); ++ if (service->srvstate == ++ VCHIQ_SRVSTATE_OPENING) { ++ service->remoteport = remoteport; ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_OPEN); ++ up(&service->remove_event); ++ } else ++ vchiq_log_error(vchiq_core_log_level, ++ "OPENACK received in state %s", ++ srvstate_names[service->srvstate]); ++ break; ++ case VCHIQ_MSG_CLOSE: ++ WARN_ON(size != 0); /* There should be no data */ ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs CLOSE@%x (%d->%d)", ++ state->id, (unsigned int)header, ++ remoteport, localport); ++ ++ mark_service_closing_internal(service, 1); ++ ++ if (vchiq_close_service_internal(service, ++ 1/*close_recvd*/) == VCHIQ_RETRY) ++ goto bail_not_ready; ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "Close Service %c%c%c%c s:%u d:%d", ++ VCHIQ_FOURCC_AS_4CHARS(service->base.fourcc), ++ service->localport, ++ service->remoteport); ++ break; ++ case VCHIQ_MSG_DATA: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: prs DATA@%x,%x (%d->%d)", ++ state->id, (unsigned int)header, size, ++ remoteport, localport); ++ ++ if ((service->remoteport == remoteport) ++ && (service->srvstate == ++ VCHIQ_SRVSTATE_OPEN)) { ++ header->msgid = msgid | VCHIQ_MSGID_CLAIMED; ++ claim_slot(state->rx_info); ++ DEBUG_TRACE(PARSE_LINE); ++ if (make_service_callback(service, ++ VCHIQ_MESSAGE_AVAILABLE, header, ++ NULL) == VCHIQ_RETRY) { ++ DEBUG_TRACE(PARSE_LINE); ++ goto bail_not_ready; ++ } ++ VCHIQ_SERVICE_STATS_INC(service, ctrl_rx_count); ++ VCHIQ_SERVICE_STATS_ADD(service, ctrl_rx_bytes, ++ size); ++ } else { ++ VCHIQ_STATS_INC(state, error_count); ++ } ++ break; ++ case VCHIQ_MSG_CONNECT: ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs CONNECT@%x", ++ state->id, (unsigned int)header); ++ up(&state->connect); ++ break; ++ case VCHIQ_MSG_BULK_RX: ++ case VCHIQ_MSG_BULK_TX: { ++ VCHIQ_BULK_QUEUE_T *queue; ++ WARN_ON(!state->is_master); ++ queue = (type == VCHIQ_MSG_BULK_RX) ? ++ &service->bulk_tx : &service->bulk_rx; ++ if ((service->remoteport == remoteport) ++ && (service->srvstate == ++ VCHIQ_SRVSTATE_OPEN)) { ++ VCHIQ_BULK_T *bulk; ++ int resolved = 0; ++ ++ DEBUG_TRACE(PARSE_LINE); ++ if (mutex_lock_interruptible( ++ &service->bulk_mutex) != 0) { ++ DEBUG_TRACE(PARSE_LINE); ++ goto bail_not_ready; ++ } ++ ++ WARN_ON(!(queue->remote_insert < queue->remove + ++ VCHIQ_NUM_SERVICE_BULKS)); ++ bulk = &queue->bulks[ ++ BULK_INDEX(queue->remote_insert)]; ++ bulk->remote_data = ++ (void *)((int *)header->data)[0]; ++ bulk->remote_size = ((int *)header->data)[1]; ++ wmb(); ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs %s@%x (%d->%d) %x@%x", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, ++ bulk->remote_size, ++ (unsigned int)bulk->remote_data); ++ ++ queue->remote_insert++; ++ ++ if (atomic_read(&pause_bulks_count)) { ++ state->deferred_bulks++; ++ vchiq_log_info(vchiq_core_log_level, ++ "%s: deferring bulk (%d)", ++ __func__, ++ state->deferred_bulks); ++ if (state->conn_state != ++ VCHIQ_CONNSTATE_PAUSE_SENT) ++ vchiq_log_error( ++ vchiq_core_log_level, ++ "%s: bulks paused in " ++ "unexpected state %s", ++ __func__, ++ conn_state_names[ ++ state->conn_state]); ++ } else if (state->conn_state == ++ VCHIQ_CONNSTATE_CONNECTED) { ++ DEBUG_TRACE(PARSE_LINE); ++ resolved = resolve_bulks(service, ++ queue); ++ } ++ ++ mutex_unlock(&service->bulk_mutex); ++ if (resolved) ++ notify_bulks(service, queue, ++ 1/*retry_poll*/); ++ } ++ } break; ++ case VCHIQ_MSG_BULK_RX_DONE: ++ case VCHIQ_MSG_BULK_TX_DONE: ++ WARN_ON(state->is_master); ++ if ((service->remoteport == remoteport) ++ && (service->srvstate != ++ VCHIQ_SRVSTATE_FREE)) { ++ VCHIQ_BULK_QUEUE_T *queue; ++ VCHIQ_BULK_T *bulk; ++ ++ queue = (type == VCHIQ_MSG_BULK_RX_DONE) ? ++ &service->bulk_rx : &service->bulk_tx; ++ ++ DEBUG_TRACE(PARSE_LINE); ++ if (mutex_lock_interruptible( ++ &service->bulk_mutex) != 0) { ++ DEBUG_TRACE(PARSE_LINE); ++ goto bail_not_ready; ++ } ++ if ((int)(queue->remote_insert - ++ queue->local_insert) >= 0) { ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: prs %s@%x (%d->%d) " ++ "unexpected (ri=%d,li=%d)", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, ++ queue->remote_insert, ++ queue->local_insert); ++ mutex_unlock(&service->bulk_mutex); ++ break; ++ } ++ ++ BUG_ON(queue->process == queue->local_insert); ++ BUG_ON(queue->process != queue->remote_insert); ++ ++ bulk = &queue->bulks[ ++ BULK_INDEX(queue->remote_insert)]; ++ bulk->actual = *(int *)header->data; ++ queue->remote_insert++; ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: prs %s@%x (%d->%d) %x@%x", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, ++ bulk->actual, (unsigned int)bulk->data); ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: prs:%d %cx li=%x ri=%x p=%x", ++ state->id, localport, ++ (type == VCHIQ_MSG_BULK_RX_DONE) ? ++ 'r' : 't', ++ queue->local_insert, ++ queue->remote_insert, queue->process); ++ ++ DEBUG_TRACE(PARSE_LINE); ++ WARN_ON(queue->process == queue->local_insert); ++ vchiq_complete_bulk(bulk); ++ queue->process++; ++ mutex_unlock(&service->bulk_mutex); ++ DEBUG_TRACE(PARSE_LINE); ++ notify_bulks(service, queue, 1/*retry_poll*/); ++ DEBUG_TRACE(PARSE_LINE); ++ } ++ break; ++ case VCHIQ_MSG_PADDING: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: prs PADDING@%x,%x", ++ state->id, (unsigned int)header, size); ++ break; ++ case VCHIQ_MSG_PAUSE: ++ /* If initiated, signal the application thread */ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: prs PAUSE@%x,%x", ++ state->id, (unsigned int)header, size); ++ if (state->conn_state == VCHIQ_CONNSTATE_PAUSED) { ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: PAUSE received in state PAUSED", ++ state->id); ++ break; ++ } ++ if (state->conn_state != VCHIQ_CONNSTATE_PAUSE_SENT) { ++ /* Send a PAUSE in response */ ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_PAUSE, 0, 0), ++ NULL, 0, 0, 0) == VCHIQ_RETRY) ++ goto bail_not_ready; ++ if (state->is_master) ++ pause_bulks(state); ++ } ++ /* At this point slot_mutex is held */ ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_PAUSED); ++ vchiq_platform_paused(state); ++ break; ++ case VCHIQ_MSG_RESUME: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: prs RESUME@%x,%x", ++ state->id, (unsigned int)header, size); ++ /* Release the slot mutex */ ++ mutex_unlock(&state->slot_mutex); ++ if (state->is_master) ++ resume_bulks(state); ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); ++ vchiq_platform_resumed(state); ++ break; ++ ++ case VCHIQ_MSG_REMOTE_USE: ++ vchiq_on_remote_use(state); ++ break; ++ case VCHIQ_MSG_REMOTE_RELEASE: ++ vchiq_on_remote_release(state); ++ break; ++ case VCHIQ_MSG_REMOTE_USE_ACTIVE: ++ vchiq_on_remote_use_active(state); ++ break; ++ ++ default: ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: prs invalid msgid %x@%x,%x", ++ state->id, msgid, (unsigned int)header, size); ++ WARN(1, "invalid message\n"); ++ break; ++ } ++ ++skip_message: ++ if (service) { ++ unlock_service(service); ++ service = NULL; ++ } ++ ++ state->rx_pos += calc_stride(size); ++ ++ DEBUG_TRACE(PARSE_LINE); ++ /* Perform some housekeeping when the end of the slot is ++ ** reached. */ ++ if ((state->rx_pos & VCHIQ_SLOT_MASK) == 0) { ++ /* Remove the extra reference count. */ ++ release_slot(state, state->rx_info, NULL, NULL); ++ state->rx_data = NULL; ++ } ++ } ++ ++bail_not_ready: ++ if (service) ++ unlock_service(service); ++} ++ ++/* Called by the slot handler thread */ ++static int ++slot_handler_func(void *v) ++{ ++ VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; ++ VCHIQ_SHARED_STATE_T *local = state->local; ++ DEBUG_INITIALISE(local) ++ ++ while (1) { ++ DEBUG_COUNT(SLOT_HANDLER_COUNT); ++ DEBUG_TRACE(SLOT_HANDLER_LINE); ++ remote_event_wait(&local->trigger); ++ ++ rmb(); ++ ++ DEBUG_TRACE(SLOT_HANDLER_LINE); ++ if (state->poll_needed) { ++ /* Check if we need to suspend - may change our ++ * conn_state */ ++ vchiq_platform_check_suspend(state); ++ ++ state->poll_needed = 0; ++ ++ /* Handle service polling and other rare conditions here ++ ** out of the mainline code */ ++ switch (state->conn_state) { ++ case VCHIQ_CONNSTATE_CONNECTED: ++ /* Poll the services as requested */ ++ poll_services(state); ++ break; ++ ++ case VCHIQ_CONNSTATE_PAUSING: ++ if (state->is_master) ++ pause_bulks(state); ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_PAUSE, 0, 0), ++ NULL, 0, 0, 0) != VCHIQ_RETRY) { ++ vchiq_set_conn_state(state, ++ VCHIQ_CONNSTATE_PAUSE_SENT); ++ } else { ++ if (state->is_master) ++ resume_bulks(state); ++ /* Retry later */ ++ state->poll_needed = 1; ++ } ++ break; ++ ++ case VCHIQ_CONNSTATE_PAUSED: ++ vchiq_platform_resume(state); ++ break; ++ ++ case VCHIQ_CONNSTATE_RESUMING: ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_RESUME, 0, 0), ++ NULL, 0, 0, 0) != VCHIQ_RETRY) { ++ if (state->is_master) ++ resume_bulks(state); ++ vchiq_set_conn_state(state, ++ VCHIQ_CONNSTATE_CONNECTED); ++ vchiq_platform_resumed(state); ++ } else { ++ /* This should really be impossible, ++ ** since the PAUSE should have flushed ++ ** through outstanding messages. */ ++ vchiq_log_error(vchiq_core_log_level, ++ "Failed to send RESUME " ++ "message"); ++ BUG(); ++ } ++ break; ++ ++ case VCHIQ_CONNSTATE_PAUSE_TIMEOUT: ++ case VCHIQ_CONNSTATE_RESUME_TIMEOUT: ++ vchiq_platform_handle_timeout(state); ++ break; ++ default: ++ break; ++ } ++ ++ ++ } ++ ++ DEBUG_TRACE(SLOT_HANDLER_LINE); ++ parse_rx_slots(state); ++ } ++ return 0; ++} ++ ++ ++/* Called by the recycle thread */ ++static int ++recycle_func(void *v) ++{ ++ VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; ++ VCHIQ_SHARED_STATE_T *local = state->local; ++ ++ while (1) { ++ remote_event_wait(&local->recycle); ++ ++ process_free_queue(state); ++ } ++ return 0; ++} ++ ++ ++/* Called by the sync thread */ ++static int ++sync_func(void *v) ++{ ++ VCHIQ_STATE_T *state = (VCHIQ_STATE_T *) v; ++ VCHIQ_SHARED_STATE_T *local = state->local; ++ VCHIQ_HEADER_T *header = (VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, ++ state->remote->slot_sync); ++ ++ while (1) { ++ VCHIQ_SERVICE_T *service; ++ int msgid, size; ++ int type; ++ unsigned int localport, remoteport; ++ ++ remote_event_wait(&local->sync_trigger); ++ ++ rmb(); ++ ++ msgid = header->msgid; ++ size = header->size; ++ type = VCHIQ_MSG_TYPE(msgid); ++ localport = VCHIQ_MSG_DSTPORT(msgid); ++ remoteport = VCHIQ_MSG_SRCPORT(msgid); ++ ++ service = find_service_by_port(state, localport); ++ ++ if (!service) { ++ vchiq_log_error(vchiq_sync_log_level, ++ "%d: sf %s@%x (%d->%d) - " ++ "invalid/closed service %d", ++ state->id, msg_type_str(type), ++ (unsigned int)header, ++ remoteport, localport, localport); ++ release_message_sync(state, header); ++ continue; ++ } ++ ++ if (vchiq_sync_log_level >= VCHIQ_LOG_TRACE) { ++ int svc_fourcc; ++ ++ svc_fourcc = service ++ ? service->base.fourcc ++ : VCHIQ_MAKE_FOURCC('?', '?', '?', '?'); ++ vchiq_log_trace(vchiq_sync_log_level, ++ "Rcvd Msg %s from %c%c%c%c s:%d d:%d len:%d", ++ msg_type_str(type), ++ VCHIQ_FOURCC_AS_4CHARS(svc_fourcc), ++ remoteport, localport, size); ++ if (size > 0) ++ vchiq_log_dump_mem("Rcvd", 0, header->data, ++ min(64, size)); ++ } ++ ++ switch (type) { ++ case VCHIQ_MSG_OPENACK: ++ if (size >= sizeof(struct vchiq_openack_payload)) { ++ const struct vchiq_openack_payload *payload = ++ (struct vchiq_openack_payload *) ++ header->data; ++ service->peer_version = payload->version; ++ } ++ vchiq_log_info(vchiq_sync_log_level, ++ "%d: sf OPENACK@%x,%x (%d->%d) v:%d", ++ state->id, (unsigned int)header, size, ++ remoteport, localport, service->peer_version); ++ if (service->srvstate == VCHIQ_SRVSTATE_OPENING) { ++ service->remoteport = remoteport; ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_OPENSYNC); ++ up(&service->remove_event); ++ } ++ release_message_sync(state, header); ++ break; ++ ++ case VCHIQ_MSG_DATA: ++ vchiq_log_trace(vchiq_sync_log_level, ++ "%d: sf DATA@%x,%x (%d->%d)", ++ state->id, (unsigned int)header, size, ++ remoteport, localport); ++ ++ if ((service->remoteport == remoteport) && ++ (service->srvstate == ++ VCHIQ_SRVSTATE_OPENSYNC)) { ++ if (make_service_callback(service, ++ VCHIQ_MESSAGE_AVAILABLE, header, ++ NULL) == VCHIQ_RETRY) ++ vchiq_log_error(vchiq_sync_log_level, ++ "synchronous callback to " ++ "service %d returns " ++ "VCHIQ_RETRY", ++ localport); ++ } ++ break; ++ ++ default: ++ vchiq_log_error(vchiq_sync_log_level, ++ "%d: sf unexpected msgid %x@%x,%x", ++ state->id, msgid, (unsigned int)header, size); ++ release_message_sync(state, header); ++ break; ++ } ++ ++ unlock_service(service); ++ } ++ ++ return 0; ++} ++ ++ ++static void ++init_bulk_queue(VCHIQ_BULK_QUEUE_T *queue) ++{ ++ queue->local_insert = 0; ++ queue->remote_insert = 0; ++ queue->process = 0; ++ queue->remote_notify = 0; ++ queue->remove = 0; ++} ++ ++ ++inline const char * ++get_conn_state_name(VCHIQ_CONNSTATE_T conn_state) ++{ ++ return conn_state_names[conn_state]; ++} ++ ++ ++VCHIQ_SLOT_ZERO_T * ++vchiq_init_slots(void *mem_base, int mem_size) ++{ ++ int mem_align = (VCHIQ_SLOT_SIZE - (int)mem_base) & VCHIQ_SLOT_MASK; ++ VCHIQ_SLOT_ZERO_T *slot_zero = ++ (VCHIQ_SLOT_ZERO_T *)((char *)mem_base + mem_align); ++ int num_slots = (mem_size - mem_align)/VCHIQ_SLOT_SIZE; ++ int first_data_slot = VCHIQ_SLOT_ZERO_SLOTS; ++ ++ /* Ensure there is enough memory to run an absolutely minimum system */ ++ num_slots -= first_data_slot; ++ ++ if (num_slots < 4) { ++ vchiq_log_error(vchiq_core_log_level, ++ "vchiq_init_slots - insufficient memory %x bytes", ++ mem_size); ++ return NULL; ++ } ++ ++ memset(slot_zero, 0, sizeof(VCHIQ_SLOT_ZERO_T)); ++ ++ slot_zero->magic = VCHIQ_MAGIC; ++ slot_zero->version = VCHIQ_VERSION; ++ slot_zero->version_min = VCHIQ_VERSION_MIN; ++ slot_zero->slot_zero_size = sizeof(VCHIQ_SLOT_ZERO_T); ++ slot_zero->slot_size = VCHIQ_SLOT_SIZE; ++ slot_zero->max_slots = VCHIQ_MAX_SLOTS; ++ slot_zero->max_slots_per_side = VCHIQ_MAX_SLOTS_PER_SIDE; ++ ++ slot_zero->master.slot_sync = first_data_slot; ++ slot_zero->master.slot_first = first_data_slot + 1; ++ slot_zero->master.slot_last = first_data_slot + (num_slots/2) - 1; ++ slot_zero->slave.slot_sync = first_data_slot + (num_slots/2); ++ slot_zero->slave.slot_first = first_data_slot + (num_slots/2) + 1; ++ slot_zero->slave.slot_last = first_data_slot + num_slots - 1; ++ ++ return slot_zero; ++} ++ ++VCHIQ_STATUS_T ++vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, ++ int is_master) ++{ ++ VCHIQ_SHARED_STATE_T *local; ++ VCHIQ_SHARED_STATE_T *remote; ++ VCHIQ_STATUS_T status; ++ char threadname[10]; ++ static int id; ++ int i; ++ ++ vchiq_log_warning(vchiq_core_log_level, ++ "%s: slot_zero = 0x%08lx, is_master = %d", ++ __func__, (unsigned long)slot_zero, is_master); ++ ++ /* Check the input configuration */ ++ ++ if (slot_zero->magic != VCHIQ_MAGIC) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("Invalid VCHIQ magic value found."); ++ vchiq_loud_error("slot_zero=%x: magic=%x (expected %x)", ++ (unsigned int)slot_zero, slot_zero->magic, VCHIQ_MAGIC); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ ++ if (slot_zero->version < VCHIQ_VERSION_MIN) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("Incompatible VCHIQ versions found."); ++ vchiq_loud_error("slot_zero=%x: VideoCore version=%d " ++ "(minimum %d)", ++ (unsigned int)slot_zero, slot_zero->version, ++ VCHIQ_VERSION_MIN); ++ vchiq_loud_error("Restart with a newer VideoCore image."); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ ++ if (VCHIQ_VERSION < slot_zero->version_min) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("Incompatible VCHIQ versions found."); ++ vchiq_loud_error("slot_zero=%x: version=%d (VideoCore " ++ "minimum %d)", ++ (unsigned int)slot_zero, VCHIQ_VERSION, ++ slot_zero->version_min); ++ vchiq_loud_error("Restart with a newer kernel."); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ ++ if ((slot_zero->slot_zero_size != sizeof(VCHIQ_SLOT_ZERO_T)) || ++ (slot_zero->slot_size != VCHIQ_SLOT_SIZE) || ++ (slot_zero->max_slots != VCHIQ_MAX_SLOTS) || ++ (slot_zero->max_slots_per_side != VCHIQ_MAX_SLOTS_PER_SIDE)) { ++ vchiq_loud_error_header(); ++ if (slot_zero->slot_zero_size != sizeof(VCHIQ_SLOT_ZERO_T)) ++ vchiq_loud_error("slot_zero=%x: slot_zero_size=%x " ++ "(expected %x)", ++ (unsigned int)slot_zero, ++ slot_zero->slot_zero_size, ++ sizeof(VCHIQ_SLOT_ZERO_T)); ++ if (slot_zero->slot_size != VCHIQ_SLOT_SIZE) ++ vchiq_loud_error("slot_zero=%x: slot_size=%d " ++ "(expected %d", ++ (unsigned int)slot_zero, slot_zero->slot_size, ++ VCHIQ_SLOT_SIZE); ++ if (slot_zero->max_slots != VCHIQ_MAX_SLOTS) ++ vchiq_loud_error("slot_zero=%x: max_slots=%d " ++ "(expected %d)", ++ (unsigned int)slot_zero, slot_zero->max_slots, ++ VCHIQ_MAX_SLOTS); ++ if (slot_zero->max_slots_per_side != VCHIQ_MAX_SLOTS_PER_SIDE) ++ vchiq_loud_error("slot_zero=%x: max_slots_per_side=%d " ++ "(expected %d)", ++ (unsigned int)slot_zero, ++ slot_zero->max_slots_per_side, ++ VCHIQ_MAX_SLOTS_PER_SIDE); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ ++ if (is_master) { ++ local = &slot_zero->master; ++ remote = &slot_zero->slave; ++ } else { ++ local = &slot_zero->slave; ++ remote = &slot_zero->master; ++ } ++ ++ if (local->initialised) { ++ vchiq_loud_error_header(); ++ if (remote->initialised) ++ vchiq_loud_error("local state has already been " ++ "initialised"); ++ else ++ vchiq_loud_error("master/slave mismatch - two %ss", ++ is_master ? "master" : "slave"); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ ++ memset(state, 0, sizeof(VCHIQ_STATE_T)); ++ ++ state->id = id++; ++ state->is_master = is_master; ++ ++ /* ++ initialize shared state pointers ++ */ ++ ++ state->local = local; ++ state->remote = remote; ++ state->slot_data = (VCHIQ_SLOT_T *)slot_zero; ++ ++ /* ++ initialize events and mutexes ++ */ ++ ++ sema_init(&state->connect, 0); ++ mutex_init(&state->mutex); ++ sema_init(&state->trigger_event, 0); ++ sema_init(&state->recycle_event, 0); ++ sema_init(&state->sync_trigger_event, 0); ++ sema_init(&state->sync_release_event, 0); ++ ++ mutex_init(&state->slot_mutex); ++ mutex_init(&state->recycle_mutex); ++ mutex_init(&state->sync_mutex); ++ mutex_init(&state->bulk_transfer_mutex); ++ ++ sema_init(&state->slot_available_event, 0); ++ sema_init(&state->slot_remove_event, 0); ++ sema_init(&state->data_quota_event, 0); ++ ++ state->slot_queue_available = 0; ++ ++ for (i = 0; i < VCHIQ_MAX_SERVICES; i++) { ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &state->service_quotas[i]; ++ sema_init(&service_quota->quota_event, 0); ++ } ++ ++ for (i = local->slot_first; i <= local->slot_last; i++) { ++ local->slot_queue[state->slot_queue_available++] = i; ++ up(&state->slot_available_event); ++ } ++ ++ state->default_slot_quota = state->slot_queue_available/2; ++ state->default_message_quota = ++ min((unsigned short)(state->default_slot_quota * 256), ++ (unsigned short)~0); ++ ++ state->previous_data_index = -1; ++ state->data_use_count = 0; ++ state->data_quota = state->slot_queue_available - 1; ++ ++ local->trigger.event = &state->trigger_event; ++ remote_event_create(&local->trigger); ++ local->tx_pos = 0; ++ ++ local->recycle.event = &state->recycle_event; ++ remote_event_create(&local->recycle); ++ local->slot_queue_recycle = state->slot_queue_available; ++ ++ local->sync_trigger.event = &state->sync_trigger_event; ++ remote_event_create(&local->sync_trigger); ++ ++ local->sync_release.event = &state->sync_release_event; ++ remote_event_create(&local->sync_release); ++ ++ /* At start-of-day, the slot is empty and available */ ++ ((VCHIQ_HEADER_T *)SLOT_DATA_FROM_INDEX(state, local->slot_sync))->msgid ++ = VCHIQ_MSGID_PADDING; ++ remote_event_signal_local(&local->sync_release); ++ ++ local->debug[DEBUG_ENTRIES] = DEBUG_MAX; ++ ++ status = vchiq_platform_init_state(state); ++ ++ /* ++ bring up slot handler thread ++ */ ++ snprintf(threadname, sizeof(threadname), "VCHIQ-%d", state->id); ++ state->slot_handler_thread = kthread_create(&slot_handler_func, ++ (void *)state, ++ threadname); ++ ++ if (state->slot_handler_thread == NULL) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("couldn't create thread %s", threadname); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ set_user_nice(state->slot_handler_thread, -19); ++ wake_up_process(state->slot_handler_thread); ++ ++ snprintf(threadname, sizeof(threadname), "VCHIQr-%d", state->id); ++ state->recycle_thread = kthread_create(&recycle_func, ++ (void *)state, ++ threadname); ++ if (state->recycle_thread == NULL) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("couldn't create thread %s", threadname); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ set_user_nice(state->recycle_thread, -19); ++ wake_up_process(state->recycle_thread); ++ ++ snprintf(threadname, sizeof(threadname), "VCHIQs-%d", state->id); ++ state->sync_thread = kthread_create(&sync_func, ++ (void *)state, ++ threadname); ++ if (state->sync_thread == NULL) { ++ vchiq_loud_error_header(); ++ vchiq_loud_error("couldn't create thread %s", threadname); ++ vchiq_loud_error_footer(); ++ return VCHIQ_ERROR; ++ } ++ set_user_nice(state->sync_thread, -20); ++ wake_up_process(state->sync_thread); ++ ++ BUG_ON(state->id >= VCHIQ_MAX_STATES); ++ vchiq_states[state->id] = state; ++ ++ /* Indicate readiness to the other side */ ++ local->initialised = 1; ++ ++ return status; ++} ++ ++/* Called from application thread when a client or server service is created. */ ++VCHIQ_SERVICE_T * ++vchiq_add_service_internal(VCHIQ_STATE_T *state, ++ const VCHIQ_SERVICE_PARAMS_T *params, int srvstate, ++ VCHIQ_INSTANCE_T instance, VCHIQ_USERDATA_TERM_T userdata_term) ++{ ++ VCHIQ_SERVICE_T *service; ++ ++ service = kmalloc(sizeof(VCHIQ_SERVICE_T), GFP_KERNEL); ++ if (service) { ++ service->base.fourcc = params->fourcc; ++ service->base.callback = params->callback; ++ service->base.userdata = params->userdata; ++ service->handle = VCHIQ_SERVICE_HANDLE_INVALID; ++ service->ref_count = 1; ++ service->srvstate = VCHIQ_SRVSTATE_FREE; ++ service->userdata_term = userdata_term; ++ service->localport = VCHIQ_PORT_FREE; ++ service->remoteport = VCHIQ_PORT_FREE; ++ ++ service->public_fourcc = (srvstate == VCHIQ_SRVSTATE_OPENING) ? ++ VCHIQ_FOURCC_INVALID : params->fourcc; ++ service->client_id = 0; ++ service->auto_close = 1; ++ service->sync = 0; ++ service->closing = 0; ++ atomic_set(&service->poll_flags, 0); ++ service->version = params->version; ++ service->version_min = params->version_min; ++ service->state = state; ++ service->instance = instance; ++ service->service_use_count = 0; ++ init_bulk_queue(&service->bulk_tx); ++ init_bulk_queue(&service->bulk_rx); ++ sema_init(&service->remove_event, 0); ++ sema_init(&service->bulk_remove_event, 0); ++ mutex_init(&service->bulk_mutex); ++ memset(&service->stats, 0, sizeof(service->stats)); ++ } else { ++ vchiq_log_error(vchiq_core_log_level, ++ "Out of memory"); ++ } ++ ++ if (service) { ++ VCHIQ_SERVICE_T **pservice = NULL; ++ int i; ++ ++ /* Although it is perfectly possible to use service_spinlock ++ ** to protect the creation of services, it is overkill as it ++ ** disables interrupts while the array is searched. ++ ** The only danger is of another thread trying to create a ++ ** service - service deletion is safe. ++ ** Therefore it is preferable to use state->mutex which, ++ ** although slower to claim, doesn't block interrupts while ++ ** it is held. ++ */ ++ ++ mutex_lock(&state->mutex); ++ ++ /* Prepare to use a previously unused service */ ++ if (state->unused_service < VCHIQ_MAX_SERVICES) ++ pservice = &state->services[state->unused_service]; ++ ++ if (srvstate == VCHIQ_SRVSTATE_OPENING) { ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *srv = state->services[i]; ++ if (!srv) { ++ pservice = &state->services[i]; ++ break; ++ } ++ } ++ } else { ++ for (i = (state->unused_service - 1); i >= 0; i--) { ++ VCHIQ_SERVICE_T *srv = state->services[i]; ++ if (!srv) ++ pservice = &state->services[i]; ++ else if ((srv->public_fourcc == params->fourcc) ++ && ((srv->instance != instance) || ++ (srv->base.callback != ++ params->callback))) { ++ /* There is another server using this ++ ** fourcc which doesn't match. */ ++ pservice = NULL; ++ break; ++ } ++ } ++ } ++ ++ if (pservice) { ++ service->localport = (pservice - state->services); ++ if (!handle_seq) ++ handle_seq = VCHIQ_MAX_STATES * ++ VCHIQ_MAX_SERVICES; ++ service->handle = handle_seq | ++ (state->id * VCHIQ_MAX_SERVICES) | ++ service->localport; ++ handle_seq += VCHIQ_MAX_STATES * VCHIQ_MAX_SERVICES; ++ *pservice = service; ++ if (pservice == &state->services[state->unused_service]) ++ state->unused_service++; ++ } ++ ++ mutex_unlock(&state->mutex); ++ ++ if (!pservice) { ++ kfree(service); ++ service = NULL; ++ } ++ } ++ ++ if (service) { ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &state->service_quotas[service->localport]; ++ service_quota->slot_quota = state->default_slot_quota; ++ service_quota->message_quota = state->default_message_quota; ++ if (service_quota->slot_use_count == 0) ++ service_quota->previous_tx_index = ++ SLOT_QUEUE_INDEX_FROM_POS(state->local_tx_pos) ++ - 1; ++ ++ /* Bring this service online */ ++ vchiq_set_service_state(service, srvstate); ++ ++ vchiq_log_info(vchiq_core_msg_log_level, ++ "%s Service %c%c%c%c SrcPort:%d", ++ (srvstate == VCHIQ_SRVSTATE_OPENING) ++ ? "Open" : "Add", ++ VCHIQ_FOURCC_AS_4CHARS(params->fourcc), ++ service->localport); ++ } ++ ++ /* Don't unlock the service - leave it with a ref_count of 1. */ ++ ++ return service; ++} ++ ++VCHIQ_STATUS_T ++vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id) ++{ ++ struct vchiq_open_payload payload = { ++ service->base.fourcc, ++ client_id, ++ service->version, ++ service->version_min ++ }; ++ VCHIQ_ELEMENT_T body = { &payload, sizeof(payload) }; ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ service->client_id = client_id; ++ vchiq_use_service_internal(service); ++ status = queue_message(service->state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_OPEN, service->localport, 0), ++ &body, 1, sizeof(payload), 1); ++ if (status == VCHIQ_SUCCESS) { ++ if (down_interruptible(&service->remove_event) != 0) { ++ status = VCHIQ_RETRY; ++ vchiq_release_service_internal(service); ++ } else if ((service->srvstate != VCHIQ_SRVSTATE_OPEN) && ++ (service->srvstate != VCHIQ_SRVSTATE_OPENSYNC)) { ++ if (service->srvstate != VCHIQ_SRVSTATE_CLOSEWAIT) ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: osi - srvstate = %s (ref %d)", ++ service->state->id, ++ srvstate_names[service->srvstate], ++ service->ref_count); ++ status = VCHIQ_ERROR; ++ VCHIQ_SERVICE_STATS_INC(service, error_count); ++ vchiq_release_service_internal(service); ++ } ++ } ++ return status; ++} ++ ++static void ++release_service_messages(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ int slot_last = state->remote->slot_last; ++ int i; ++ ++ /* Release any claimed messages */ ++ for (i = state->remote->slot_first; i <= slot_last; i++) { ++ VCHIQ_SLOT_INFO_T *slot_info = ++ SLOT_INFO_FROM_INDEX(state, i); ++ if (slot_info->release_count != slot_info->use_count) { ++ char *data = ++ (char *)SLOT_DATA_FROM_INDEX(state, i); ++ unsigned int pos, end; ++ ++ end = VCHIQ_SLOT_SIZE; ++ if (data == state->rx_data) ++ /* This buffer is still being read from - stop ++ ** at the current read position */ ++ end = state->rx_pos & VCHIQ_SLOT_MASK; ++ ++ pos = 0; ++ ++ while (pos < end) { ++ VCHIQ_HEADER_T *header = ++ (VCHIQ_HEADER_T *)(data + pos); ++ int msgid = header->msgid; ++ int port = VCHIQ_MSG_DSTPORT(msgid); ++ if ((port == service->localport) && ++ (msgid & VCHIQ_MSGID_CLAIMED)) { ++ vchiq_log_info(vchiq_core_log_level, ++ " fsi - hdr %x", ++ (unsigned int)header); ++ release_slot(state, slot_info, header, ++ NULL); ++ } ++ pos += calc_stride(header->size); ++ if (pos > VCHIQ_SLOT_SIZE) { ++ vchiq_log_error(vchiq_core_log_level, ++ "fsi - pos %x: header %x, " ++ "msgid %x, header->msgid %x, " ++ "header->size %x", ++ pos, (unsigned int)header, ++ msgid, header->msgid, ++ header->size); ++ WARN(1, "invalid slot position\n"); ++ } ++ } ++ } ++ } ++} ++ ++static int ++do_abort_bulks(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_STATUS_T status; ++ ++ /* Abort any outstanding bulk transfers */ ++ if (mutex_lock_interruptible(&service->bulk_mutex) != 0) ++ return 0; ++ abort_outstanding_bulks(service, &service->bulk_tx); ++ abort_outstanding_bulks(service, &service->bulk_rx); ++ mutex_unlock(&service->bulk_mutex); ++ ++ status = notify_bulks(service, &service->bulk_tx, 0/*!retry_poll*/); ++ if (status == VCHIQ_SUCCESS) ++ status = notify_bulks(service, &service->bulk_rx, ++ 0/*!retry_poll*/); ++ return (status == VCHIQ_SUCCESS); ++} ++ ++static VCHIQ_STATUS_T ++close_service_complete(VCHIQ_SERVICE_T *service, int failstate) ++{ ++ VCHIQ_STATUS_T status; ++ int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); ++ int newstate; ++ ++ switch (service->srvstate) { ++ case VCHIQ_SRVSTATE_OPEN: ++ case VCHIQ_SRVSTATE_CLOSESENT: ++ case VCHIQ_SRVSTATE_CLOSERECVD: ++ if (is_server) { ++ if (service->auto_close) { ++ service->client_id = 0; ++ service->remoteport = VCHIQ_PORT_FREE; ++ newstate = VCHIQ_SRVSTATE_LISTENING; ++ } else ++ newstate = VCHIQ_SRVSTATE_CLOSEWAIT; ++ } else ++ newstate = VCHIQ_SRVSTATE_CLOSED; ++ vchiq_set_service_state(service, newstate); ++ break; ++ case VCHIQ_SRVSTATE_LISTENING: ++ break; ++ default: ++ vchiq_log_error(vchiq_core_log_level, ++ "close_service_complete(%x) called in state %s", ++ service->handle, srvstate_names[service->srvstate]); ++ WARN(1, "close_service_complete in unexpected state\n"); ++ return VCHIQ_ERROR; ++ } ++ ++ status = make_service_callback(service, ++ VCHIQ_SERVICE_CLOSED, NULL, NULL); ++ ++ if (status != VCHIQ_RETRY) { ++ int uc = service->service_use_count; ++ int i; ++ /* Complete the close process */ ++ for (i = 0; i < uc; i++) ++ /* cater for cases where close is forced and the ++ ** client may not close all it's handles */ ++ vchiq_release_service_internal(service); ++ ++ service->client_id = 0; ++ service->remoteport = VCHIQ_PORT_FREE; ++ ++ if (service->srvstate == VCHIQ_SRVSTATE_CLOSED) ++ vchiq_free_service_internal(service); ++ else if (service->srvstate != VCHIQ_SRVSTATE_CLOSEWAIT) { ++ if (is_server) ++ service->closing = 0; ++ ++ up(&service->remove_event); ++ } ++ } else ++ vchiq_set_service_state(service, failstate); ++ ++ return status; ++} ++ ++/* Called by the slot handler */ ++VCHIQ_STATUS_T ++vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ int is_server = (service->public_fourcc != VCHIQ_FOURCC_INVALID); ++ ++ vchiq_log_info(vchiq_core_log_level, "%d: csi:%d,%d (%s)", ++ service->state->id, service->localport, close_recvd, ++ srvstate_names[service->srvstate]); ++ ++ switch (service->srvstate) { ++ case VCHIQ_SRVSTATE_CLOSED: ++ case VCHIQ_SRVSTATE_HIDDEN: ++ case VCHIQ_SRVSTATE_LISTENING: ++ case VCHIQ_SRVSTATE_CLOSEWAIT: ++ if (close_recvd) ++ vchiq_log_error(vchiq_core_log_level, ++ "vchiq_close_service_internal(1) called " ++ "in state %s", ++ srvstate_names[service->srvstate]); ++ else if (is_server) { ++ if (service->srvstate == VCHIQ_SRVSTATE_LISTENING) { ++ status = VCHIQ_ERROR; ++ } else { ++ service->client_id = 0; ++ service->remoteport = VCHIQ_PORT_FREE; ++ if (service->srvstate == ++ VCHIQ_SRVSTATE_CLOSEWAIT) ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_LISTENING); ++ } ++ up(&service->remove_event); ++ } else ++ vchiq_free_service_internal(service); ++ break; ++ case VCHIQ_SRVSTATE_OPENING: ++ if (close_recvd) { ++ /* The open was rejected - tell the user */ ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_CLOSEWAIT); ++ up(&service->remove_event); ++ } else { ++ /* Shutdown mid-open - let the other side know */ ++ status = queue_message(state, service, ++ VCHIQ_MAKE_MSG ++ (VCHIQ_MSG_CLOSE, ++ service->localport, ++ VCHIQ_MSG_DSTPORT(service->remoteport)), ++ NULL, 0, 0, 0); ++ } ++ break; ++ ++ case VCHIQ_SRVSTATE_OPENSYNC: ++ mutex_lock(&state->sync_mutex); ++ /* Drop through */ ++ ++ case VCHIQ_SRVSTATE_OPEN: ++ if (state->is_master || close_recvd) { ++ if (!do_abort_bulks(service)) ++ status = VCHIQ_RETRY; ++ } ++ ++ release_service_messages(service); ++ ++ if (status == VCHIQ_SUCCESS) ++ status = queue_message(state, service, ++ VCHIQ_MAKE_MSG ++ (VCHIQ_MSG_CLOSE, ++ service->localport, ++ VCHIQ_MSG_DSTPORT(service->remoteport)), ++ NULL, 0, 0, 0); ++ ++ if (status == VCHIQ_SUCCESS) { ++ if (!close_recvd) ++ break; ++ } else if (service->srvstate == VCHIQ_SRVSTATE_OPENSYNC) { ++ mutex_unlock(&state->sync_mutex); ++ break; ++ } else ++ break; ++ ++ status = close_service_complete(service, ++ VCHIQ_SRVSTATE_CLOSERECVD); ++ break; ++ ++ case VCHIQ_SRVSTATE_CLOSESENT: ++ if (!close_recvd) ++ /* This happens when a process is killed mid-close */ ++ break; ++ ++ if (!state->is_master) { ++ if (!do_abort_bulks(service)) { ++ status = VCHIQ_RETRY; ++ break; ++ } ++ } ++ ++ if (status == VCHIQ_SUCCESS) ++ status = close_service_complete(service, ++ VCHIQ_SRVSTATE_CLOSERECVD); ++ break; ++ ++ case VCHIQ_SRVSTATE_CLOSERECVD: ++ if (!close_recvd && is_server) ++ /* Force into LISTENING mode */ ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_LISTENING); ++ status = close_service_complete(service, ++ VCHIQ_SRVSTATE_CLOSERECVD); ++ break; ++ ++ default: ++ vchiq_log_error(vchiq_core_log_level, ++ "vchiq_close_service_internal(%d) called in state %s", ++ close_recvd, srvstate_names[service->srvstate]); ++ break; ++ } ++ ++ return status; ++} ++ ++/* Called from the application process upon process death */ ++void ++vchiq_terminate_service_internal(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ ++ vchiq_log_info(vchiq_core_log_level, "%d: tsi - (%d<->%d)", ++ state->id, service->localport, service->remoteport); ++ ++ mark_service_closing(service); ++ ++ /* Mark the service for removal by the slot handler */ ++ request_poll(state, service, VCHIQ_POLL_REMOVE); ++} ++ ++/* Called from the slot handler */ ++void ++vchiq_free_service_internal(VCHIQ_SERVICE_T *service) ++{ ++ VCHIQ_STATE_T *state = service->state; ++ ++ vchiq_log_info(vchiq_core_log_level, "%d: fsi - (%d)", ++ state->id, service->localport); ++ ++ switch (service->srvstate) { ++ case VCHIQ_SRVSTATE_OPENING: ++ case VCHIQ_SRVSTATE_CLOSED: ++ case VCHIQ_SRVSTATE_HIDDEN: ++ case VCHIQ_SRVSTATE_LISTENING: ++ case VCHIQ_SRVSTATE_CLOSEWAIT: ++ break; ++ default: ++ vchiq_log_error(vchiq_core_log_level, ++ "%d: fsi - (%d) in state %s", ++ state->id, service->localport, ++ srvstate_names[service->srvstate]); ++ return; ++ } ++ ++ vchiq_set_service_state(service, VCHIQ_SRVSTATE_FREE); ++ ++ up(&service->remove_event); ++ ++ /* Release the initial lock */ ++ unlock_service(service); ++} ++ ++VCHIQ_STATUS_T ++vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) ++{ ++ VCHIQ_SERVICE_T *service; ++ int i; ++ ++ /* Find all services registered to this client and enable them. */ ++ i = 0; ++ while ((service = next_service_by_instance(state, instance, ++ &i)) != NULL) { ++ if (service->srvstate == VCHIQ_SRVSTATE_HIDDEN) ++ vchiq_set_service_state(service, ++ VCHIQ_SRVSTATE_LISTENING); ++ unlock_service(service); ++ } ++ ++ if (state->conn_state == VCHIQ_CONNSTATE_DISCONNECTED) { ++ if (queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_CONNECT, 0, 0), NULL, 0, ++ 0, 1) == VCHIQ_RETRY) ++ return VCHIQ_RETRY; ++ ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTING); ++ } ++ ++ if (state->conn_state == VCHIQ_CONNSTATE_CONNECTING) { ++ if (down_interruptible(&state->connect) != 0) ++ return VCHIQ_RETRY; ++ ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_CONNECTED); ++ up(&state->connect); ++ } ++ ++ return VCHIQ_SUCCESS; ++} ++ ++VCHIQ_STATUS_T ++vchiq_shutdown_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance) ++{ ++ VCHIQ_SERVICE_T *service; ++ int i; ++ ++ /* Find all services registered to this client and enable them. */ ++ i = 0; ++ while ((service = next_service_by_instance(state, instance, ++ &i)) != NULL) { ++ (void)vchiq_remove_service(service->handle); ++ unlock_service(service); ++ } ++ ++ return VCHIQ_SUCCESS; ++} ++ ++VCHIQ_STATUS_T ++vchiq_pause_internal(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ switch (state->conn_state) { ++ case VCHIQ_CONNSTATE_CONNECTED: ++ /* Request a pause */ ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_PAUSING); ++ request_poll(state, NULL, 0); ++ break; ++ default: ++ vchiq_log_error(vchiq_core_log_level, ++ "vchiq_pause_internal in state %s\n", ++ conn_state_names[state->conn_state]); ++ status = VCHIQ_ERROR; ++ VCHIQ_STATS_INC(state, error_count); ++ break; ++ } ++ ++ return status; ++} ++ ++VCHIQ_STATUS_T ++vchiq_resume_internal(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ if (state->conn_state == VCHIQ_CONNSTATE_PAUSED) { ++ vchiq_set_conn_state(state, VCHIQ_CONNSTATE_RESUMING); ++ request_poll(state, NULL, 0); ++ } else { ++ status = VCHIQ_ERROR; ++ VCHIQ_STATS_INC(state, error_count); ++ } ++ ++ return status; ++} ++ ++VCHIQ_STATUS_T ++vchiq_close_service(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ /* Unregister the service */ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ if (!service) ++ return VCHIQ_ERROR; ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: close_service:%d", ++ service->state->id, service->localport); ++ ++ if ((service->srvstate == VCHIQ_SRVSTATE_FREE) || ++ (service->srvstate == VCHIQ_SRVSTATE_LISTENING) || ++ (service->srvstate == VCHIQ_SRVSTATE_HIDDEN)) { ++ unlock_service(service); ++ return VCHIQ_ERROR; ++ } ++ ++ mark_service_closing(service); ++ ++ if (current == service->state->slot_handler_thread) { ++ status = vchiq_close_service_internal(service, ++ 0/*!close_recvd*/); ++ BUG_ON(status == VCHIQ_RETRY); ++ } else { ++ /* Mark the service for termination by the slot handler */ ++ request_poll(service->state, service, VCHIQ_POLL_TERMINATE); ++ } ++ ++ while (1) { ++ if (down_interruptible(&service->remove_event) != 0) { ++ status = VCHIQ_RETRY; ++ break; ++ } ++ ++ if ((service->srvstate == VCHIQ_SRVSTATE_FREE) || ++ (service->srvstate == VCHIQ_SRVSTATE_LISTENING) || ++ (service->srvstate == VCHIQ_SRVSTATE_OPEN)) ++ break; ++ ++ vchiq_log_warning(vchiq_core_log_level, ++ "%d: close_service:%d - waiting in state %s", ++ service->state->id, service->localport, ++ srvstate_names[service->srvstate]); ++ } ++ ++ if ((status == VCHIQ_SUCCESS) && ++ (service->srvstate != VCHIQ_SRVSTATE_FREE) && ++ (service->srvstate != VCHIQ_SRVSTATE_LISTENING)) ++ status = VCHIQ_ERROR; ++ ++ unlock_service(service); ++ ++ return status; ++} ++ ++VCHIQ_STATUS_T ++vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ /* Unregister the service */ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_STATUS_T status = VCHIQ_SUCCESS; ++ ++ if (!service) ++ return VCHIQ_ERROR; ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: remove_service:%d", ++ service->state->id, service->localport); ++ ++ if (service->srvstate == VCHIQ_SRVSTATE_FREE) { ++ unlock_service(service); ++ return VCHIQ_ERROR; ++ } ++ ++ mark_service_closing(service); ++ ++ if ((service->srvstate == VCHIQ_SRVSTATE_HIDDEN) || ++ (current == service->state->slot_handler_thread)) { ++ /* Make it look like a client, because it must be removed and ++ not left in the LISTENING state. */ ++ service->public_fourcc = VCHIQ_FOURCC_INVALID; ++ ++ status = vchiq_close_service_internal(service, ++ 0/*!close_recvd*/); ++ BUG_ON(status == VCHIQ_RETRY); ++ } else { ++ /* Mark the service for removal by the slot handler */ ++ request_poll(service->state, service, VCHIQ_POLL_REMOVE); ++ } ++ while (1) { ++ if (down_interruptible(&service->remove_event) != 0) { ++ status = VCHIQ_RETRY; ++ break; ++ } ++ ++ if ((service->srvstate == VCHIQ_SRVSTATE_FREE) || ++ (service->srvstate == VCHIQ_SRVSTATE_OPEN)) ++ break; ++ ++ vchiq_log_warning(vchiq_core_log_level, ++ "%d: remove_service:%d - waiting in state %s", ++ service->state->id, service->localport, ++ srvstate_names[service->srvstate]); ++ } ++ ++ if ((status == VCHIQ_SUCCESS) && ++ (service->srvstate != VCHIQ_SRVSTATE_FREE)) ++ status = VCHIQ_ERROR; ++ ++ unlock_service(service); ++ ++ return status; ++} ++ ++ ++/* This function may be called by kernel threads or user threads. ++ * User threads may receive VCHIQ_RETRY to indicate that a signal has been ++ * received and the call should be retried after being returned to user ++ * context. ++ * When called in blocking mode, the userdata field points to a bulk_waiter ++ * structure. ++ */ ++VCHIQ_STATUS_T ++vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, ++ VCHI_MEM_HANDLE_T memhandle, void *offset, int size, void *userdata, ++ VCHIQ_BULK_MODE_T mode, VCHIQ_BULK_DIR_T dir) ++{ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_BULK_QUEUE_T *queue; ++ VCHIQ_BULK_T *bulk; ++ VCHIQ_STATE_T *state; ++ struct bulk_waiter *bulk_waiter = NULL; ++ const char dir_char = (dir == VCHIQ_BULK_TRANSMIT) ? 't' : 'r'; ++ const int dir_msgtype = (dir == VCHIQ_BULK_TRANSMIT) ? ++ VCHIQ_MSG_BULK_TX : VCHIQ_MSG_BULK_RX; ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ ++ if (!service || ++ (service->srvstate != VCHIQ_SRVSTATE_OPEN) || ++ ((memhandle == VCHI_MEM_HANDLE_INVALID) && (offset == NULL)) || ++ (vchiq_check_service(service) != VCHIQ_SUCCESS)) ++ goto error_exit; ++ ++ switch (mode) { ++ case VCHIQ_BULK_MODE_NOCALLBACK: ++ case VCHIQ_BULK_MODE_CALLBACK: ++ break; ++ case VCHIQ_BULK_MODE_BLOCKING: ++ bulk_waiter = (struct bulk_waiter *)userdata; ++ sema_init(&bulk_waiter->event, 0); ++ bulk_waiter->actual = 0; ++ bulk_waiter->bulk = NULL; ++ break; ++ case VCHIQ_BULK_MODE_WAITING: ++ bulk_waiter = (struct bulk_waiter *)userdata; ++ bulk = bulk_waiter->bulk; ++ goto waiting; ++ default: ++ goto error_exit; ++ } ++ ++ state = service->state; ++ ++ queue = (dir == VCHIQ_BULK_TRANSMIT) ? ++ &service->bulk_tx : &service->bulk_rx; ++ ++ if (mutex_lock_interruptible(&service->bulk_mutex) != 0) { ++ status = VCHIQ_RETRY; ++ goto error_exit; ++ } ++ ++ if (queue->local_insert == queue->remove + VCHIQ_NUM_SERVICE_BULKS) { ++ VCHIQ_SERVICE_STATS_INC(service, bulk_stalls); ++ do { ++ mutex_unlock(&service->bulk_mutex); ++ if (down_interruptible(&service->bulk_remove_event) ++ != 0) { ++ status = VCHIQ_RETRY; ++ goto error_exit; ++ } ++ if (mutex_lock_interruptible(&service->bulk_mutex) ++ != 0) { ++ status = VCHIQ_RETRY; ++ goto error_exit; ++ } ++ } while (queue->local_insert == queue->remove + ++ VCHIQ_NUM_SERVICE_BULKS); ++ } ++ ++ bulk = &queue->bulks[BULK_INDEX(queue->local_insert)]; ++ ++ bulk->mode = mode; ++ bulk->dir = dir; ++ bulk->userdata = userdata; ++ bulk->size = size; ++ bulk->actual = VCHIQ_BULK_ACTUAL_ABORTED; ++ ++ if (vchiq_prepare_bulk_data(bulk, memhandle, offset, size, dir) != ++ VCHIQ_SUCCESS) ++ goto unlock_error_exit; ++ ++ wmb(); ++ ++ vchiq_log_info(vchiq_core_log_level, ++ "%d: bt (%d->%d) %cx %x@%x %x", ++ state->id, ++ service->localport, service->remoteport, dir_char, ++ size, (unsigned int)bulk->data, (unsigned int)userdata); ++ ++ if (state->is_master) { ++ queue->local_insert++; ++ if (resolve_bulks(service, queue)) ++ request_poll(state, service, ++ (dir == VCHIQ_BULK_TRANSMIT) ? ++ VCHIQ_POLL_TXNOTIFY : VCHIQ_POLL_RXNOTIFY); ++ } else { ++ int payload[2] = { (int)bulk->data, bulk->size }; ++ VCHIQ_ELEMENT_T element = { payload, sizeof(payload) }; ++ ++ status = queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(dir_msgtype, ++ service->localport, service->remoteport), ++ &element, 1, sizeof(payload), 1); ++ if (status != VCHIQ_SUCCESS) { ++ vchiq_complete_bulk(bulk); ++ goto unlock_error_exit; ++ } ++ queue->local_insert++; ++ } ++ ++ mutex_unlock(&service->bulk_mutex); ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%d: bt:%d %cx li=%x ri=%x p=%x", ++ state->id, ++ service->localport, dir_char, ++ queue->local_insert, queue->remote_insert, queue->process); ++ ++waiting: ++ unlock_service(service); ++ ++ status = VCHIQ_SUCCESS; ++ ++ if (bulk_waiter) { ++ bulk_waiter->bulk = bulk; ++ if (down_interruptible(&bulk_waiter->event) != 0) ++ status = VCHIQ_RETRY; ++ else if (bulk_waiter->actual == VCHIQ_BULK_ACTUAL_ABORTED) ++ status = VCHIQ_ERROR; ++ } ++ ++ return status; ++ ++unlock_error_exit: ++ mutex_unlock(&service->bulk_mutex); ++ ++error_exit: ++ if (service) ++ unlock_service(service); ++ return status; ++} ++ ++VCHIQ_STATUS_T ++vchiq_queue_message(VCHIQ_SERVICE_HANDLE_T handle, ++ const VCHIQ_ELEMENT_T *elements, unsigned int count) ++{ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ ++ unsigned int size = 0; ++ unsigned int i; ++ ++ if (!service || ++ (vchiq_check_service(service) != VCHIQ_SUCCESS)) ++ goto error_exit; ++ ++ for (i = 0; i < (unsigned int)count; i++) { ++ if (elements[i].size) { ++ if (elements[i].data == NULL) { ++ VCHIQ_SERVICE_STATS_INC(service, error_count); ++ goto error_exit; ++ } ++ size += elements[i].size; ++ } ++ } ++ ++ if (size > VCHIQ_MAX_MSG_SIZE) { ++ VCHIQ_SERVICE_STATS_INC(service, error_count); ++ goto error_exit; ++ } ++ ++ switch (service->srvstate) { ++ case VCHIQ_SRVSTATE_OPEN: ++ status = queue_message(service->state, service, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_DATA, ++ service->localport, ++ service->remoteport), ++ elements, count, size, 1); ++ break; ++ case VCHIQ_SRVSTATE_OPENSYNC: ++ status = queue_message_sync(service->state, service, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_DATA, ++ service->localport, ++ service->remoteport), ++ elements, count, size, 1); ++ break; ++ default: ++ status = VCHIQ_ERROR; ++ break; ++ } ++ ++error_exit: ++ if (service) ++ unlock_service(service); ++ ++ return status; ++} ++ ++void ++vchiq_release_message(VCHIQ_SERVICE_HANDLE_T handle, VCHIQ_HEADER_T *header) ++{ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_SHARED_STATE_T *remote; ++ VCHIQ_STATE_T *state; ++ int slot_index; ++ ++ if (!service) ++ return; ++ ++ state = service->state; ++ remote = state->remote; ++ ++ slot_index = SLOT_INDEX_FROM_DATA(state, (void *)header); ++ ++ if ((slot_index >= remote->slot_first) && ++ (slot_index <= remote->slot_last)) { ++ int msgid = header->msgid; ++ if (msgid & VCHIQ_MSGID_CLAIMED) { ++ VCHIQ_SLOT_INFO_T *slot_info = ++ SLOT_INFO_FROM_INDEX(state, slot_index); ++ ++ release_slot(state, slot_info, header, service); ++ } ++ } else if (slot_index == remote->slot_sync) ++ release_message_sync(state, header); ++ ++ unlock_service(service); ++} ++ ++static void ++release_message_sync(VCHIQ_STATE_T *state, VCHIQ_HEADER_T *header) ++{ ++ header->msgid = VCHIQ_MSGID_PADDING; ++ wmb(); ++ remote_event_signal(&state->remote->sync_release); ++} ++ ++VCHIQ_STATUS_T ++vchiq_get_peer_version(VCHIQ_SERVICE_HANDLE_T handle, short *peer_version) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ ++ if (!service || ++ (vchiq_check_service(service) != VCHIQ_SUCCESS) || ++ !peer_version) ++ goto exit; ++ *peer_version = service->peer_version; ++ status = VCHIQ_SUCCESS; ++ ++exit: ++ if (service) ++ unlock_service(service); ++ return status; ++} ++ ++VCHIQ_STATUS_T ++vchiq_get_config(VCHIQ_INSTANCE_T instance, ++ int config_size, VCHIQ_CONFIG_T *pconfig) ++{ ++ VCHIQ_CONFIG_T config; ++ ++ (void)instance; ++ ++ config.max_msg_size = VCHIQ_MAX_MSG_SIZE; ++ config.bulk_threshold = VCHIQ_MAX_MSG_SIZE; ++ config.max_outstanding_bulks = VCHIQ_NUM_SERVICE_BULKS; ++ config.max_services = VCHIQ_MAX_SERVICES; ++ config.version = VCHIQ_VERSION; ++ config.version_min = VCHIQ_VERSION_MIN; ++ ++ if (config_size > sizeof(VCHIQ_CONFIG_T)) ++ return VCHIQ_ERROR; ++ ++ memcpy(pconfig, &config, ++ min(config_size, (int)(sizeof(VCHIQ_CONFIG_T)))); ++ ++ return VCHIQ_SUCCESS; ++} ++ ++VCHIQ_STATUS_T ++vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T handle, ++ VCHIQ_SERVICE_OPTION_T option, int value) ++{ ++ VCHIQ_SERVICE_T *service = find_service_by_handle(handle); ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ ++ if (service) { ++ switch (option) { ++ case VCHIQ_SERVICE_OPTION_AUTOCLOSE: ++ service->auto_close = value; ++ status = VCHIQ_SUCCESS; ++ break; ++ ++ case VCHIQ_SERVICE_OPTION_SLOT_QUOTA: { ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &service->state->service_quotas[ ++ service->localport]; ++ if (value == 0) ++ value = service->state->default_slot_quota; ++ if ((value >= service_quota->slot_use_count) && ++ (value < (unsigned short)~0)) { ++ service_quota->slot_quota = value; ++ if ((value >= service_quota->slot_use_count) && ++ (service_quota->message_quota >= ++ service_quota->message_use_count)) { ++ /* Signal the service that it may have ++ ** dropped below its quota */ ++ up(&service_quota->quota_event); ++ } ++ status = VCHIQ_SUCCESS; ++ } ++ } break; ++ ++ case VCHIQ_SERVICE_OPTION_MESSAGE_QUOTA: { ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &service->state->service_quotas[ ++ service->localport]; ++ if (value == 0) ++ value = service->state->default_message_quota; ++ if ((value >= service_quota->message_use_count) && ++ (value < (unsigned short)~0)) { ++ service_quota->message_quota = value; ++ if ((value >= ++ service_quota->message_use_count) && ++ (service_quota->slot_quota >= ++ service_quota->slot_use_count)) ++ /* Signal the service that it may have ++ ** dropped below its quota */ ++ up(&service_quota->quota_event); ++ status = VCHIQ_SUCCESS; ++ } ++ } break; ++ ++ case VCHIQ_SERVICE_OPTION_SYNCHRONOUS: ++ if ((service->srvstate == VCHIQ_SRVSTATE_HIDDEN) || ++ (service->srvstate == ++ VCHIQ_SRVSTATE_LISTENING)) { ++ service->sync = value; ++ status = VCHIQ_SUCCESS; ++ } ++ break; ++ ++ default: ++ break; ++ } ++ unlock_service(service); ++ } ++ ++ return status; ++} ++ ++void ++vchiq_dump_shared_state(void *dump_context, VCHIQ_STATE_T *state, ++ VCHIQ_SHARED_STATE_T *shared, const char *label) ++{ ++ static const char *const debug_names[] = { ++ "", ++ "SLOT_HANDLER_COUNT", ++ "SLOT_HANDLER_LINE", ++ "PARSE_LINE", ++ "PARSE_HEADER", ++ "PARSE_MSGID", ++ "AWAIT_COMPLETION_LINE", ++ "DEQUEUE_MESSAGE_LINE", ++ "SERVICE_CALLBACK_LINE", ++ "MSG_QUEUE_FULL_COUNT", ++ "COMPLETION_QUEUE_FULL_COUNT" ++ }; ++ int i; ++ ++ char buf[80]; ++ int len; ++ len = snprintf(buf, sizeof(buf), ++ " %s: slots %d-%d tx_pos=%x recycle=%x", ++ label, shared->slot_first, shared->slot_last, ++ shared->tx_pos, shared->slot_queue_recycle); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " Slots claimed:"); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ for (i = shared->slot_first; i <= shared->slot_last; i++) { ++ VCHIQ_SLOT_INFO_T slot_info = *SLOT_INFO_FROM_INDEX(state, i); ++ if (slot_info.use_count != slot_info.release_count) { ++ len = snprintf(buf, sizeof(buf), ++ " %d: %d/%d", i, slot_info.use_count, ++ slot_info.release_count); ++ vchiq_dump(dump_context, buf, len + 1); ++ } ++ } ++ ++ for (i = 1; i < shared->debug[DEBUG_ENTRIES]; i++) { ++ len = snprintf(buf, sizeof(buf), " DEBUG: %s = %d(%x)", ++ debug_names[i], shared->debug[i], shared->debug[i]); ++ vchiq_dump(dump_context, buf, len + 1); ++ } ++} ++ ++void ++vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state) ++{ ++ char buf[80]; ++ int len; ++ int i; ++ ++ len = snprintf(buf, sizeof(buf), "State %d: %s", state->id, ++ conn_state_names[state->conn_state]); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " tx_pos=%x(@%x), rx_pos=%x(@%x)", ++ state->local->tx_pos, ++ (uint32_t)state->tx_data + ++ (state->local_tx_pos & VCHIQ_SLOT_MASK), ++ state->rx_pos, ++ (uint32_t)state->rx_data + ++ (state->rx_pos & VCHIQ_SLOT_MASK)); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " Version: %d (min %d)", ++ VCHIQ_VERSION, VCHIQ_VERSION_MIN); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ if (VCHIQ_ENABLE_STATS) { ++ len = snprintf(buf, sizeof(buf), ++ " Stats: ctrl_tx_count=%d, ctrl_rx_count=%d, " ++ "error_count=%d", ++ state->stats.ctrl_tx_count, state->stats.ctrl_rx_count, ++ state->stats.error_count); ++ vchiq_dump(dump_context, buf, len + 1); ++ } ++ ++ len = snprintf(buf, sizeof(buf), ++ " Slots: %d available (%d data), %d recyclable, %d stalls " ++ "(%d data)", ++ ((state->slot_queue_available * VCHIQ_SLOT_SIZE) - ++ state->local_tx_pos) / VCHIQ_SLOT_SIZE, ++ state->data_quota - state->data_use_count, ++ state->local->slot_queue_recycle - state->slot_queue_available, ++ state->stats.slot_stalls, state->stats.data_stalls); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ vchiq_dump_platform_state(dump_context); ++ ++ vchiq_dump_shared_state(dump_context, state, state->local, "Local"); ++ vchiq_dump_shared_state(dump_context, state, state->remote, "Remote"); ++ ++ vchiq_dump_platform_instances(dump_context); ++ ++ for (i = 0; i < state->unused_service; i++) { ++ VCHIQ_SERVICE_T *service = find_service_by_port(state, i); ++ ++ if (service) { ++ vchiq_dump_service_state(dump_context, service); ++ unlock_service(service); ++ } ++ } ++} ++ ++void ++vchiq_dump_service_state(void *dump_context, VCHIQ_SERVICE_T *service) ++{ ++ char buf[80]; ++ int len; ++ ++ len = snprintf(buf, sizeof(buf), "Service %d: %s (ref %u)", ++ service->localport, srvstate_names[service->srvstate], ++ service->ref_count - 1); /*Don't include the lock just taken*/ ++ ++ if (service->srvstate != VCHIQ_SRVSTATE_FREE) { ++ char remoteport[30]; ++ VCHIQ_SERVICE_QUOTA_T *service_quota = ++ &service->state->service_quotas[service->localport]; ++ int fourcc = service->base.fourcc; ++ int tx_pending, rx_pending; ++ if (service->remoteport != VCHIQ_PORT_FREE) { ++ int len2 = snprintf(remoteport, sizeof(remoteport), ++ "%d", service->remoteport); ++ if (service->public_fourcc != VCHIQ_FOURCC_INVALID) ++ snprintf(remoteport + len2, ++ sizeof(remoteport) - len2, ++ " (client %x)", service->client_id); ++ } else ++ strcpy(remoteport, "n/a"); ++ ++ len += snprintf(buf + len, sizeof(buf) - len, ++ " '%c%c%c%c' remote %s (msg use %d/%d, slot use %d/%d)", ++ VCHIQ_FOURCC_AS_4CHARS(fourcc), ++ remoteport, ++ service_quota->message_use_count, ++ service_quota->message_quota, ++ service_quota->slot_use_count, ++ service_quota->slot_quota); ++ ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ tx_pending = service->bulk_tx.local_insert - ++ service->bulk_tx.remote_insert; ++ ++ rx_pending = service->bulk_rx.local_insert - ++ service->bulk_rx.remote_insert; ++ ++ len = snprintf(buf, sizeof(buf), ++ " Bulk: tx_pending=%d (size %d)," ++ " rx_pending=%d (size %d)", ++ tx_pending, ++ tx_pending ? service->bulk_tx.bulks[ ++ BULK_INDEX(service->bulk_tx.remove)].size : 0, ++ rx_pending, ++ rx_pending ? service->bulk_rx.bulks[ ++ BULK_INDEX(service->bulk_rx.remove)].size : 0); ++ ++ if (VCHIQ_ENABLE_STATS) { ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " Ctrl: tx_count=%d, tx_bytes=%llu, " ++ "rx_count=%d, rx_bytes=%llu", ++ service->stats.ctrl_tx_count, ++ service->stats.ctrl_tx_bytes, ++ service->stats.ctrl_rx_count, ++ service->stats.ctrl_rx_bytes); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " Bulk: tx_count=%d, tx_bytes=%llu, " ++ "rx_count=%d, rx_bytes=%llu", ++ service->stats.bulk_tx_count, ++ service->stats.bulk_tx_bytes, ++ service->stats.bulk_rx_count, ++ service->stats.bulk_rx_bytes); ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ len = snprintf(buf, sizeof(buf), ++ " %d quota stalls, %d slot stalls, " ++ "%d bulk stalls, %d aborted, %d errors", ++ service->stats.quota_stalls, ++ service->stats.slot_stalls, ++ service->stats.bulk_stalls, ++ service->stats.bulk_aborted_count, ++ service->stats.error_count); ++ } ++ } ++ ++ vchiq_dump(dump_context, buf, len + 1); ++ ++ if (service->srvstate != VCHIQ_SRVSTATE_FREE) ++ vchiq_dump_platform_service_state(dump_context, service); ++} ++ ++ ++void ++vchiq_loud_error_header(void) ++{ ++ vchiq_log_error(vchiq_core_log_level, ++ "============================================================" ++ "================"); ++ vchiq_log_error(vchiq_core_log_level, ++ "============================================================" ++ "================"); ++ vchiq_log_error(vchiq_core_log_level, "====="); ++} ++ ++void ++vchiq_loud_error_footer(void) ++{ ++ vchiq_log_error(vchiq_core_log_level, "====="); ++ vchiq_log_error(vchiq_core_log_level, ++ "============================================================" ++ "================"); ++ vchiq_log_error(vchiq_core_log_level, ++ "============================================================" ++ "================"); ++} ++ ++ ++VCHIQ_STATUS_T vchiq_send_remote_use(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_RETRY; ++ if (state->conn_state != VCHIQ_CONNSTATE_DISCONNECTED) ++ status = queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_REMOTE_USE, 0, 0), ++ NULL, 0, 0, 0); ++ return status; ++} ++ ++VCHIQ_STATUS_T vchiq_send_remote_release(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_RETRY; ++ if (state->conn_state != VCHIQ_CONNSTATE_DISCONNECTED) ++ status = queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_REMOTE_RELEASE, 0, 0), ++ NULL, 0, 0, 0); ++ return status; ++} ++ ++VCHIQ_STATUS_T vchiq_send_remote_use_active(VCHIQ_STATE_T *state) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_RETRY; ++ if (state->conn_state != VCHIQ_CONNSTATE_DISCONNECTED) ++ status = queue_message(state, NULL, ++ VCHIQ_MAKE_MSG(VCHIQ_MSG_REMOTE_USE_ACTIVE, 0, 0), ++ NULL, 0, 0, 0); ++ return status; ++} ++ ++void vchiq_log_dump_mem(const char *label, uint32_t addr, const void *voidMem, ++ size_t numBytes) ++{ ++ const uint8_t *mem = (const uint8_t *)voidMem; ++ size_t offset; ++ char lineBuf[100]; ++ char *s; ++ ++ while (numBytes > 0) { ++ s = lineBuf; ++ ++ for (offset = 0; offset < 16; offset++) { ++ if (offset < numBytes) ++ s += snprintf(s, 4, "%02x ", mem[offset]); ++ else ++ s += snprintf(s, 4, " "); ++ } ++ ++ for (offset = 0; offset < 16; offset++) { ++ if (offset < numBytes) { ++ uint8_t ch = mem[offset]; ++ ++ if ((ch < ' ') || (ch > '~')) ++ ch = '.'; ++ *s++ = (char)ch; ++ } ++ } ++ *s++ = '\0'; ++ ++ if ((label != NULL) && (*label != '\0')) ++ vchiq_log_trace(VCHIQ_LOG_TRACE, ++ "%s: %08x: %s", label, addr, lineBuf); ++ else ++ vchiq_log_trace(VCHIQ_LOG_TRACE, ++ "%08x: %s", addr, lineBuf); ++ ++ addr += 16; ++ mem += 16; ++ if (numBytes > 16) ++ numBytes -= 16; ++ else ++ numBytes = 0; ++ } ++} +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_core.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,706 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_CORE_H ++#define VCHIQ_CORE_H ++ ++#include ++#include ++#include ++ ++#include "vchiq_cfg.h" ++ ++#include "vchiq.h" ++ ++/* Run time control of log level, based on KERN_XXX level. */ ++#define VCHIQ_LOG_DEFAULT 4 ++#define VCHIQ_LOG_ERROR 3 ++#define VCHIQ_LOG_WARNING 4 ++#define VCHIQ_LOG_INFO 6 ++#define VCHIQ_LOG_TRACE 7 ++ ++#define VCHIQ_LOG_PREFIX KERN_INFO "vchiq: " ++ ++#ifndef vchiq_log_error ++#define vchiq_log_error(cat, fmt, ...) \ ++ do { if (cat >= VCHIQ_LOG_ERROR) \ ++ printk(VCHIQ_LOG_PREFIX fmt "\n", ##__VA_ARGS__); } while (0) ++#endif ++#ifndef vchiq_log_warning ++#define vchiq_log_warning(cat, fmt, ...) \ ++ do { if (cat >= VCHIQ_LOG_WARNING) \ ++ printk(VCHIQ_LOG_PREFIX fmt "\n", ##__VA_ARGS__); } while (0) ++#endif ++#ifndef vchiq_log_info ++#define vchiq_log_info(cat, fmt, ...) \ ++ do { if (cat >= VCHIQ_LOG_INFO) \ ++ printk(VCHIQ_LOG_PREFIX fmt "\n", ##__VA_ARGS__); } while (0) ++#endif ++#ifndef vchiq_log_trace ++#define vchiq_log_trace(cat, fmt, ...) \ ++ do { if (cat >= VCHIQ_LOG_TRACE) \ ++ printk(VCHIQ_LOG_PREFIX fmt "\n", ##__VA_ARGS__); } while (0) ++#endif ++ ++#define vchiq_loud_error(...) \ ++ vchiq_log_error(vchiq_core_log_level, "===== " __VA_ARGS__) ++ ++#ifndef vchiq_static_assert ++#define vchiq_static_assert(cond) __attribute__((unused)) \ ++ extern int vchiq_static_assert[(cond) ? 1 : -1] ++#endif ++ ++#define IS_POW2(x) (x && ((x & (x - 1)) == 0)) ++ ++/* Ensure that the slot size and maximum number of slots are powers of 2 */ ++vchiq_static_assert(IS_POW2(VCHIQ_SLOT_SIZE)); ++vchiq_static_assert(IS_POW2(VCHIQ_MAX_SLOTS)); ++vchiq_static_assert(IS_POW2(VCHIQ_MAX_SLOTS_PER_SIDE)); ++ ++#define VCHIQ_SLOT_MASK (VCHIQ_SLOT_SIZE - 1) ++#define VCHIQ_SLOT_QUEUE_MASK (VCHIQ_MAX_SLOTS_PER_SIDE - 1) ++#define VCHIQ_SLOT_ZERO_SLOTS ((sizeof(VCHIQ_SLOT_ZERO_T) + \ ++ VCHIQ_SLOT_SIZE - 1) / VCHIQ_SLOT_SIZE) ++ ++#define VCHIQ_MSG_PADDING 0 /* - */ ++#define VCHIQ_MSG_CONNECT 1 /* - */ ++#define VCHIQ_MSG_OPEN 2 /* + (srcport, -), fourcc, client_id */ ++#define VCHIQ_MSG_OPENACK 3 /* + (srcport, dstport) */ ++#define VCHIQ_MSG_CLOSE 4 /* + (srcport, dstport) */ ++#define VCHIQ_MSG_DATA 5 /* + (srcport, dstport) */ ++#define VCHIQ_MSG_BULK_RX 6 /* + (srcport, dstport), data, size */ ++#define VCHIQ_MSG_BULK_TX 7 /* + (srcport, dstport), data, size */ ++#define VCHIQ_MSG_BULK_RX_DONE 8 /* + (srcport, dstport), actual */ ++#define VCHIQ_MSG_BULK_TX_DONE 9 /* + (srcport, dstport), actual */ ++#define VCHIQ_MSG_PAUSE 10 /* - */ ++#define VCHIQ_MSG_RESUME 11 /* - */ ++#define VCHIQ_MSG_REMOTE_USE 12 /* - */ ++#define VCHIQ_MSG_REMOTE_RELEASE 13 /* - */ ++#define VCHIQ_MSG_REMOTE_USE_ACTIVE 14 /* - */ ++ ++#define VCHIQ_PORT_MAX (VCHIQ_MAX_SERVICES - 1) ++#define VCHIQ_PORT_FREE 0x1000 ++#define VCHIQ_PORT_IS_VALID(port) (port < VCHIQ_PORT_FREE) ++#define VCHIQ_MAKE_MSG(type, srcport, dstport) \ ++ ((type<<24) | (srcport<<12) | (dstport<<0)) ++#define VCHIQ_MSG_TYPE(msgid) ((unsigned int)msgid >> 24) ++#define VCHIQ_MSG_SRCPORT(msgid) \ ++ (unsigned short)(((unsigned int)msgid >> 12) & 0xfff) ++#define VCHIQ_MSG_DSTPORT(msgid) \ ++ ((unsigned short)msgid & 0xfff) ++ ++#define VCHIQ_FOURCC_AS_4CHARS(fourcc) \ ++ ((fourcc) >> 24) & 0xff, \ ++ ((fourcc) >> 16) & 0xff, \ ++ ((fourcc) >> 8) & 0xff, \ ++ (fourcc) & 0xff ++ ++/* Ensure the fields are wide enough */ ++vchiq_static_assert(VCHIQ_MSG_SRCPORT(VCHIQ_MAKE_MSG(0, 0, VCHIQ_PORT_MAX)) ++ == 0); ++vchiq_static_assert(VCHIQ_MSG_TYPE(VCHIQ_MAKE_MSG(0, VCHIQ_PORT_MAX, 0)) == 0); ++vchiq_static_assert((unsigned int)VCHIQ_PORT_MAX < ++ (unsigned int)VCHIQ_PORT_FREE); ++ ++#define VCHIQ_MSGID_PADDING VCHIQ_MAKE_MSG(VCHIQ_MSG_PADDING, 0, 0) ++#define VCHIQ_MSGID_CLAIMED 0x40000000 ++ ++#define VCHIQ_FOURCC_INVALID 0x00000000 ++#define VCHIQ_FOURCC_IS_LEGAL(fourcc) (fourcc != VCHIQ_FOURCC_INVALID) ++ ++#define VCHIQ_BULK_ACTUAL_ABORTED -1 ++ ++typedef uint32_t BITSET_T; ++ ++vchiq_static_assert((sizeof(BITSET_T) * 8) == 32); ++ ++#define BITSET_SIZE(b) ((b + 31) >> 5) ++#define BITSET_WORD(b) (b >> 5) ++#define BITSET_BIT(b) (1 << (b & 31)) ++#define BITSET_ZERO(bs) memset(bs, 0, sizeof(bs)) ++#define BITSET_IS_SET(bs, b) (bs[BITSET_WORD(b)] & BITSET_BIT(b)) ++#define BITSET_SET(bs, b) (bs[BITSET_WORD(b)] |= BITSET_BIT(b)) ++#define BITSET_CLR(bs, b) (bs[BITSET_WORD(b)] &= ~BITSET_BIT(b)) ++ ++#if VCHIQ_ENABLE_STATS ++#define VCHIQ_STATS_INC(state, stat) (state->stats. stat++) ++#define VCHIQ_SERVICE_STATS_INC(service, stat) (service->stats. stat++) ++#define VCHIQ_SERVICE_STATS_ADD(service, stat, addend) \ ++ (service->stats. stat += addend) ++#else ++#define VCHIQ_STATS_INC(state, stat) ((void)0) ++#define VCHIQ_SERVICE_STATS_INC(service, stat) ((void)0) ++#define VCHIQ_SERVICE_STATS_ADD(service, stat, addend) ((void)0) ++#endif ++ ++enum { ++ DEBUG_ENTRIES, ++#if VCHIQ_ENABLE_DEBUG ++ DEBUG_SLOT_HANDLER_COUNT, ++ DEBUG_SLOT_HANDLER_LINE, ++ DEBUG_PARSE_LINE, ++ DEBUG_PARSE_HEADER, ++ DEBUG_PARSE_MSGID, ++ DEBUG_AWAIT_COMPLETION_LINE, ++ DEBUG_DEQUEUE_MESSAGE_LINE, ++ DEBUG_SERVICE_CALLBACK_LINE, ++ DEBUG_MSG_QUEUE_FULL_COUNT, ++ DEBUG_COMPLETION_QUEUE_FULL_COUNT, ++#endif ++ DEBUG_MAX ++}; ++ ++#if VCHIQ_ENABLE_DEBUG ++ ++#define DEBUG_INITIALISE(local) int *debug_ptr = (local)->debug; ++#define DEBUG_TRACE(d) \ ++ do { debug_ptr[DEBUG_ ## d] = __LINE__; dsb(); } while (0) ++#define DEBUG_VALUE(d, v) \ ++ do { debug_ptr[DEBUG_ ## d] = (v); dsb(); } while (0) ++#define DEBUG_COUNT(d) \ ++ do { debug_ptr[DEBUG_ ## d]++; dsb(); } while (0) ++ ++#else /* VCHIQ_ENABLE_DEBUG */ ++ ++#define DEBUG_INITIALISE(local) ++#define DEBUG_TRACE(d) ++#define DEBUG_VALUE(d, v) ++#define DEBUG_COUNT(d) ++ ++#endif /* VCHIQ_ENABLE_DEBUG */ ++ ++typedef enum { ++ VCHIQ_CONNSTATE_DISCONNECTED, ++ VCHIQ_CONNSTATE_CONNECTING, ++ VCHIQ_CONNSTATE_CONNECTED, ++ VCHIQ_CONNSTATE_PAUSING, ++ VCHIQ_CONNSTATE_PAUSE_SENT, ++ VCHIQ_CONNSTATE_PAUSED, ++ VCHIQ_CONNSTATE_RESUMING, ++ VCHIQ_CONNSTATE_PAUSE_TIMEOUT, ++ VCHIQ_CONNSTATE_RESUME_TIMEOUT ++} VCHIQ_CONNSTATE_T; ++ ++enum { ++ VCHIQ_SRVSTATE_FREE, ++ VCHIQ_SRVSTATE_HIDDEN, ++ VCHIQ_SRVSTATE_LISTENING, ++ VCHIQ_SRVSTATE_OPENING, ++ VCHIQ_SRVSTATE_OPEN, ++ VCHIQ_SRVSTATE_OPENSYNC, ++ VCHIQ_SRVSTATE_CLOSESENT, ++ VCHIQ_SRVSTATE_CLOSERECVD, ++ VCHIQ_SRVSTATE_CLOSEWAIT, ++ VCHIQ_SRVSTATE_CLOSED ++}; ++ ++enum { ++ VCHIQ_POLL_TERMINATE, ++ VCHIQ_POLL_REMOVE, ++ VCHIQ_POLL_TXNOTIFY, ++ VCHIQ_POLL_RXNOTIFY, ++ VCHIQ_POLL_COUNT ++}; ++ ++typedef enum { ++ VCHIQ_BULK_TRANSMIT, ++ VCHIQ_BULK_RECEIVE ++} VCHIQ_BULK_DIR_T; ++ ++typedef void (*VCHIQ_USERDATA_TERM_T)(void *userdata); ++ ++typedef struct vchiq_bulk_struct { ++ short mode; ++ short dir; ++ void *userdata; ++ VCHI_MEM_HANDLE_T handle; ++ void *data; ++ int size; ++ void *remote_data; ++ int remote_size; ++ int actual; ++} VCHIQ_BULK_T; ++ ++typedef struct vchiq_bulk_queue_struct { ++ int local_insert; /* Where to insert the next local bulk */ ++ int remote_insert; /* Where to insert the next remote bulk (master) */ ++ int process; /* Bulk to transfer next */ ++ int remote_notify; /* Bulk to notify the remote client of next (mstr) */ ++ int remove; /* Bulk to notify the local client of, and remove, ++ ** next */ ++ VCHIQ_BULK_T bulks[VCHIQ_NUM_SERVICE_BULKS]; ++} VCHIQ_BULK_QUEUE_T; ++ ++typedef struct remote_event_struct { ++ int armed; ++ int fired; ++ struct semaphore *event; ++} REMOTE_EVENT_T; ++ ++typedef struct opaque_platform_state_t *VCHIQ_PLATFORM_STATE_T; ++ ++typedef struct vchiq_state_struct VCHIQ_STATE_T; ++ ++typedef struct vchiq_slot_struct { ++ char data[VCHIQ_SLOT_SIZE]; ++} VCHIQ_SLOT_T; ++ ++typedef struct vchiq_slot_info_struct { ++ /* Use two counters rather than one to avoid the need for a mutex. */ ++ short use_count; ++ short release_count; ++} VCHIQ_SLOT_INFO_T; ++ ++typedef struct vchiq_service_struct { ++ VCHIQ_SERVICE_BASE_T base; ++ VCHIQ_SERVICE_HANDLE_T handle; ++ unsigned int ref_count; ++ int srvstate; ++ VCHIQ_USERDATA_TERM_T userdata_term; ++ unsigned int localport; ++ unsigned int remoteport; ++ int public_fourcc; ++ int client_id; ++ char auto_close; ++ char sync; ++ char closing; ++ atomic_t poll_flags; ++ short version; ++ short version_min; ++ short peer_version; ++ ++ VCHIQ_STATE_T *state; ++ VCHIQ_INSTANCE_T instance; ++ ++ int service_use_count; ++ ++ VCHIQ_BULK_QUEUE_T bulk_tx; ++ VCHIQ_BULK_QUEUE_T bulk_rx; ++ ++ struct semaphore remove_event; ++ struct semaphore bulk_remove_event; ++ struct mutex bulk_mutex; ++ ++ struct service_stats_struct { ++ int quota_stalls; ++ int slot_stalls; ++ int bulk_stalls; ++ int error_count; ++ int ctrl_tx_count; ++ int ctrl_rx_count; ++ int bulk_tx_count; ++ int bulk_rx_count; ++ int bulk_aborted_count; ++ uint64_t ctrl_tx_bytes; ++ uint64_t ctrl_rx_bytes; ++ uint64_t bulk_tx_bytes; ++ uint64_t bulk_rx_bytes; ++ } stats; ++} VCHIQ_SERVICE_T; ++ ++/* The quota information is outside VCHIQ_SERVICE_T so that it can be ++ statically allocated, since for accounting reasons a service's slot ++ usage is carried over between users of the same port number. ++ */ ++typedef struct vchiq_service_quota_struct { ++ unsigned short slot_quota; ++ unsigned short slot_use_count; ++ unsigned short message_quota; ++ unsigned short message_use_count; ++ struct semaphore quota_event; ++ int previous_tx_index; ++} VCHIQ_SERVICE_QUOTA_T; ++ ++typedef struct vchiq_shared_state_struct { ++ ++ /* A non-zero value here indicates that the content is valid. */ ++ int initialised; ++ ++ /* The first and last (inclusive) slots allocated to the owner. */ ++ int slot_first; ++ int slot_last; ++ ++ /* The slot allocated to synchronous messages from the owner. */ ++ int slot_sync; ++ ++ /* Signalling this event indicates that owner's slot handler thread ++ ** should run. */ ++ REMOTE_EVENT_T trigger; ++ ++ /* Indicates the byte position within the stream where the next message ++ ** will be written. The least significant bits are an index into the ++ ** slot. The next bits are the index of the slot in slot_queue. */ ++ int tx_pos; ++ ++ /* This event should be signalled when a slot is recycled. */ ++ REMOTE_EVENT_T recycle; ++ ++ /* The slot_queue index where the next recycled slot will be written. */ ++ int slot_queue_recycle; ++ ++ /* This event should be signalled when a synchronous message is sent. */ ++ REMOTE_EVENT_T sync_trigger; ++ ++ /* This event should be signalled when a synchronous message has been ++ ** released. */ ++ REMOTE_EVENT_T sync_release; ++ ++ /* A circular buffer of slot indexes. */ ++ int slot_queue[VCHIQ_MAX_SLOTS_PER_SIDE]; ++ ++ /* Debugging state */ ++ int debug[DEBUG_MAX]; ++} VCHIQ_SHARED_STATE_T; ++ ++typedef struct vchiq_slot_zero_struct { ++ int magic; ++ short version; ++ short version_min; ++ int slot_zero_size; ++ int slot_size; ++ int max_slots; ++ int max_slots_per_side; ++ int platform_data[2]; ++ VCHIQ_SHARED_STATE_T master; ++ VCHIQ_SHARED_STATE_T slave; ++ VCHIQ_SLOT_INFO_T slots[VCHIQ_MAX_SLOTS]; ++} VCHIQ_SLOT_ZERO_T; ++ ++struct vchiq_state_struct { ++ int id; ++ int initialised; ++ VCHIQ_CONNSTATE_T conn_state; ++ int is_master; ++ ++ VCHIQ_SHARED_STATE_T *local; ++ VCHIQ_SHARED_STATE_T *remote; ++ VCHIQ_SLOT_T *slot_data; ++ ++ unsigned short default_slot_quota; ++ unsigned short default_message_quota; ++ ++ /* Event indicating connect message received */ ++ struct semaphore connect; ++ ++ /* Mutex protecting services */ ++ struct mutex mutex; ++ VCHIQ_INSTANCE_T *instance; ++ ++ /* Processes incoming messages */ ++ struct task_struct *slot_handler_thread; ++ ++ /* Processes recycled slots */ ++ struct task_struct *recycle_thread; ++ ++ /* Processes synchronous messages */ ++ struct task_struct *sync_thread; ++ ++ /* Local implementation of the trigger remote event */ ++ struct semaphore trigger_event; ++ ++ /* Local implementation of the recycle remote event */ ++ struct semaphore recycle_event; ++ ++ /* Local implementation of the sync trigger remote event */ ++ struct semaphore sync_trigger_event; ++ ++ /* Local implementation of the sync release remote event */ ++ struct semaphore sync_release_event; ++ ++ char *tx_data; ++ char *rx_data; ++ VCHIQ_SLOT_INFO_T *rx_info; ++ ++ struct mutex slot_mutex; ++ ++ struct mutex recycle_mutex; ++ ++ struct mutex sync_mutex; ++ ++ struct mutex bulk_transfer_mutex; ++ ++ /* Indicates the byte position within the stream from where the next ++ ** message will be read. The least significant bits are an index into ++ ** the slot.The next bits are the index of the slot in ++ ** remote->slot_queue. */ ++ int rx_pos; ++ ++ /* A cached copy of local->tx_pos. Only write to local->tx_pos, and read ++ from remote->tx_pos. */ ++ int local_tx_pos; ++ ++ /* The slot_queue index of the slot to become available next. */ ++ int slot_queue_available; ++ ++ /* A flag to indicate if any poll has been requested */ ++ int poll_needed; ++ ++ /* Ths index of the previous slot used for data messages. */ ++ int previous_data_index; ++ ++ /* The number of slots occupied by data messages. */ ++ unsigned short data_use_count; ++ ++ /* The maximum number of slots to be occupied by data messages. */ ++ unsigned short data_quota; ++ ++ /* An array of bit sets indicating which services must be polled. */ ++ atomic_t poll_services[BITSET_SIZE(VCHIQ_MAX_SERVICES)]; ++ ++ /* The number of the first unused service */ ++ int unused_service; ++ ++ /* Signalled when a free slot becomes available. */ ++ struct semaphore slot_available_event; ++ ++ struct semaphore slot_remove_event; ++ ++ /* Signalled when a free data slot becomes available. */ ++ struct semaphore data_quota_event; ++ ++ /* Incremented when there are bulk transfers which cannot be processed ++ * whilst paused and must be processed on resume */ ++ int deferred_bulks; ++ ++ struct state_stats_struct { ++ int slot_stalls; ++ int data_stalls; ++ int ctrl_tx_count; ++ int ctrl_rx_count; ++ int error_count; ++ } stats; ++ ++ VCHIQ_SERVICE_T * services[VCHIQ_MAX_SERVICES]; ++ VCHIQ_SERVICE_QUOTA_T service_quotas[VCHIQ_MAX_SERVICES]; ++ VCHIQ_SLOT_INFO_T slot_info[VCHIQ_MAX_SLOTS]; ++ ++ VCHIQ_PLATFORM_STATE_T platform_state; ++}; ++ ++struct bulk_waiter { ++ VCHIQ_BULK_T *bulk; ++ struct semaphore event; ++ int actual; ++}; ++ ++extern spinlock_t bulk_waiter_spinlock; ++ ++extern int vchiq_core_log_level; ++extern int vchiq_core_msg_log_level; ++extern int vchiq_sync_log_level; ++ ++extern VCHIQ_STATE_T *vchiq_states[VCHIQ_MAX_STATES]; ++ ++extern const char * ++get_conn_state_name(VCHIQ_CONNSTATE_T conn_state); ++ ++extern VCHIQ_SLOT_ZERO_T * ++vchiq_init_slots(void *mem_base, int mem_size); ++ ++extern VCHIQ_STATUS_T ++vchiq_init_state(VCHIQ_STATE_T *state, VCHIQ_SLOT_ZERO_T *slot_zero, ++ int is_master); ++ ++extern VCHIQ_STATUS_T ++vchiq_connect_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance); ++ ++extern VCHIQ_SERVICE_T * ++vchiq_add_service_internal(VCHIQ_STATE_T *state, ++ const VCHIQ_SERVICE_PARAMS_T *params, int srvstate, ++ VCHIQ_INSTANCE_T instance, VCHIQ_USERDATA_TERM_T userdata_term); ++ ++extern VCHIQ_STATUS_T ++vchiq_open_service_internal(VCHIQ_SERVICE_T *service, int client_id); ++ ++extern VCHIQ_STATUS_T ++vchiq_close_service_internal(VCHIQ_SERVICE_T *service, int close_recvd); ++ ++extern void ++vchiq_terminate_service_internal(VCHIQ_SERVICE_T *service); ++ ++extern void ++vchiq_free_service_internal(VCHIQ_SERVICE_T *service); ++ ++extern VCHIQ_STATUS_T ++vchiq_shutdown_internal(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance); ++ ++extern VCHIQ_STATUS_T ++vchiq_pause_internal(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_resume_internal(VCHIQ_STATE_T *state); ++ ++extern void ++remote_event_pollall(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, ++ VCHI_MEM_HANDLE_T memhandle, void *offset, int size, void *userdata, ++ VCHIQ_BULK_MODE_T mode, VCHIQ_BULK_DIR_T dir); ++ ++extern void ++vchiq_dump_state(void *dump_context, VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_dump_service_state(void *dump_context, VCHIQ_SERVICE_T *service); ++ ++extern void ++vchiq_loud_error_header(void); ++ ++extern void ++vchiq_loud_error_footer(void); ++ ++extern void ++request_poll(VCHIQ_STATE_T *state, VCHIQ_SERVICE_T *service, int poll_type); ++ ++static inline VCHIQ_SERVICE_T * ++handle_to_service(VCHIQ_SERVICE_HANDLE_T handle) ++{ ++ VCHIQ_STATE_T *state = vchiq_states[(handle / VCHIQ_MAX_SERVICES) & ++ (VCHIQ_MAX_STATES - 1)]; ++ if (!state) ++ return NULL; ++ ++ return state->services[handle & (VCHIQ_MAX_SERVICES - 1)]; ++} ++ ++extern VCHIQ_SERVICE_T * ++find_service_by_handle(VCHIQ_SERVICE_HANDLE_T handle); ++ ++extern VCHIQ_SERVICE_T * ++find_service_by_port(VCHIQ_STATE_T *state, int localport); ++ ++extern VCHIQ_SERVICE_T * ++find_service_for_instance(VCHIQ_INSTANCE_T instance, ++ VCHIQ_SERVICE_HANDLE_T handle); ++ ++extern VCHIQ_SERVICE_T * ++next_service_by_instance(VCHIQ_STATE_T *state, VCHIQ_INSTANCE_T instance, ++ int *pidx); ++ ++extern void ++lock_service(VCHIQ_SERVICE_T *service); ++ ++extern void ++unlock_service(VCHIQ_SERVICE_T *service); ++ ++/* The following functions are called from vchiq_core, and external ++** implementations must be provided. */ ++ ++extern VCHIQ_STATUS_T ++vchiq_prepare_bulk_data(VCHIQ_BULK_T *bulk, ++ VCHI_MEM_HANDLE_T memhandle, void *offset, int size, int dir); ++ ++extern void ++vchiq_transfer_bulk(VCHIQ_BULK_T *bulk); ++ ++extern void ++vchiq_complete_bulk(VCHIQ_BULK_T *bulk); ++ ++extern VCHIQ_STATUS_T ++vchiq_copy_from_user(void *dst, const void *src, int size); ++ ++extern void ++remote_event_signal(REMOTE_EVENT_T *event); ++ ++void ++vchiq_platform_check_suspend(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_platform_paused(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_platform_resume(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_platform_resumed(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_dump(void *dump_context, const char *str, int len); ++ ++extern void ++vchiq_dump_platform_state(void *dump_context); ++ ++extern void ++vchiq_dump_platform_instances(void *dump_context); ++ ++extern void ++vchiq_dump_platform_service_state(void *dump_context, ++ VCHIQ_SERVICE_T *service); ++ ++extern VCHIQ_STATUS_T ++vchiq_use_service_internal(VCHIQ_SERVICE_T *service); ++ ++extern VCHIQ_STATUS_T ++vchiq_release_service_internal(VCHIQ_SERVICE_T *service); ++ ++extern void ++vchiq_on_remote_use(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_on_remote_release(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_platform_init_state(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_check_service(VCHIQ_SERVICE_T *service); ++ ++extern void ++vchiq_on_remote_use_active(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_send_remote_use(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_send_remote_release(VCHIQ_STATE_T *state); ++ ++extern VCHIQ_STATUS_T ++vchiq_send_remote_use_active(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_platform_conn_state_changed(VCHIQ_STATE_T *state, ++ VCHIQ_CONNSTATE_T oldstate, VCHIQ_CONNSTATE_T newstate); ++ ++extern void ++vchiq_platform_handle_timeout(VCHIQ_STATE_T *state); ++ ++extern void ++vchiq_set_conn_state(VCHIQ_STATE_T *state, VCHIQ_CONNSTATE_T newstate); ++ ++ ++extern void ++vchiq_log_dump_mem(const char *label, uint32_t addr, const void *voidMem, ++ size_t numBytes); ++ ++#endif +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_genversion +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_genversion 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,89 @@ ++#!/usr/bin/perl -w ++ ++use strict; ++ ++# ++# Generate a version from available information ++# ++ ++my $prefix = shift @ARGV; ++my $root = shift @ARGV; ++ ++ ++if ( not defined $root ) { ++ die "usage: $0 prefix root-dir\n"; ++} ++ ++if ( ! -d $root ) { ++ die "root directory $root not found\n"; ++} ++ ++my $version = "unknown"; ++my $tainted = ""; ++ ++if ( -d "$root/.git" ) { ++ # attempt to work out git version. only do so ++ # on a linux build host, as cygwin builds are ++ # already slow enough ++ ++ if ( -f "/usr/bin/git" || -f "/usr/local/bin/git" ) { ++ if (not open(F, "git --git-dir $root/.git rev-parse --verify HEAD|")) { ++ $version = "no git version"; ++ } ++ else { ++ $version = ; ++ $version =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). ++ $version =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). ++ } ++ ++ if (open(G, "git --git-dir $root/.git status --porcelain|")) { ++ $tainted = ; ++ $tainted =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). ++ $tainted =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). ++ if (length $tainted) { ++ $version = join ' ', $version, "(tainted)"; ++ } ++ else { ++ $version = join ' ', $version, "(clean)"; ++ } ++ } ++ } ++} ++ ++my $hostname = `hostname`; ++$hostname =~ s/[ \r\n]*$//; # chomp may not be enough (cygwin). ++$hostname =~ s/^[ \r\n]*//; # chomp may not be enough (cygwin). ++ ++ ++print STDERR "Version $version\n"; ++print < ++ ++VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_hostname, "$hostname" ); ++VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_version, "$version" ); ++VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_time, __TIME__ ); ++VC_DEBUG_DECLARE_STRING_VAR( ${prefix}_build_date, __DATE__ ); ++ ++const char *vchiq_get_build_hostname( void ) ++{ ++ return vchiq_build_hostname; ++} ++ ++const char *vchiq_get_build_version( void ) ++{ ++ return vchiq_build_version; ++} ++ ++const char *vchiq_get_build_date( void ) ++{ ++ return vchiq_build_date; ++} ++ ++const char *vchiq_get_build_time( void ) ++{ ++ return vchiq_build_time; ++} ++EOF ++ ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_if.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_if.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,188 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_IF_H ++#define VCHIQ_IF_H ++ ++#include "interface/vchi/vchi_mh.h" ++ ++#define VCHIQ_SERVICE_HANDLE_INVALID 0 ++ ++#define VCHIQ_SLOT_SIZE 4096 ++#define VCHIQ_MAX_MSG_SIZE (VCHIQ_SLOT_SIZE - sizeof(VCHIQ_HEADER_T)) ++#define VCHIQ_CHANNEL_SIZE VCHIQ_MAX_MSG_SIZE /* For backwards compatibility */ ++ ++#define VCHIQ_MAKE_FOURCC(x0, x1, x2, x3) \ ++ (((x0) << 24) | ((x1) << 16) | ((x2) << 8) | (x3)) ++#define VCHIQ_GET_SERVICE_USERDATA(service) vchiq_get_service_userdata(service) ++#define VCHIQ_GET_SERVICE_FOURCC(service) vchiq_get_service_fourcc(service) ++ ++typedef enum { ++ VCHIQ_SERVICE_OPENED, /* service, -, - */ ++ VCHIQ_SERVICE_CLOSED, /* service, -, - */ ++ VCHIQ_MESSAGE_AVAILABLE, /* service, header, - */ ++ VCHIQ_BULK_TRANSMIT_DONE, /* service, -, bulk_userdata */ ++ VCHIQ_BULK_RECEIVE_DONE, /* service, -, bulk_userdata */ ++ VCHIQ_BULK_TRANSMIT_ABORTED, /* service, -, bulk_userdata */ ++ VCHIQ_BULK_RECEIVE_ABORTED /* service, -, bulk_userdata */ ++} VCHIQ_REASON_T; ++ ++typedef enum { ++ VCHIQ_ERROR = -1, ++ VCHIQ_SUCCESS = 0, ++ VCHIQ_RETRY = 1 ++} VCHIQ_STATUS_T; ++ ++typedef enum { ++ VCHIQ_BULK_MODE_CALLBACK, ++ VCHIQ_BULK_MODE_BLOCKING, ++ VCHIQ_BULK_MODE_NOCALLBACK, ++ VCHIQ_BULK_MODE_WAITING /* Reserved for internal use */ ++} VCHIQ_BULK_MODE_T; ++ ++typedef enum { ++ VCHIQ_SERVICE_OPTION_AUTOCLOSE, ++ VCHIQ_SERVICE_OPTION_SLOT_QUOTA, ++ VCHIQ_SERVICE_OPTION_MESSAGE_QUOTA, ++ VCHIQ_SERVICE_OPTION_SYNCHRONOUS ++} VCHIQ_SERVICE_OPTION_T; ++ ++typedef struct vchiq_header_struct { ++ /* The message identifier - opaque to applications. */ ++ int msgid; ++ ++ /* Size of message data. */ ++ unsigned int size; ++ ++ char data[0]; /* message */ ++} VCHIQ_HEADER_T; ++ ++typedef struct { ++ const void *data; ++ unsigned int size; ++} VCHIQ_ELEMENT_T; ++ ++typedef unsigned int VCHIQ_SERVICE_HANDLE_T; ++ ++typedef VCHIQ_STATUS_T (*VCHIQ_CALLBACK_T)(VCHIQ_REASON_T, VCHIQ_HEADER_T *, ++ VCHIQ_SERVICE_HANDLE_T, void *); ++ ++typedef struct vchiq_service_base_struct { ++ int fourcc; ++ VCHIQ_CALLBACK_T callback; ++ void *userdata; ++} VCHIQ_SERVICE_BASE_T; ++ ++typedef struct vchiq_service_params_struct { ++ int fourcc; ++ VCHIQ_CALLBACK_T callback; ++ void *userdata; ++ short version; /* Increment for non-trivial changes */ ++ short version_min; /* Update for incompatible changes */ ++} VCHIQ_SERVICE_PARAMS_T; ++ ++typedef struct vchiq_config_struct { ++ unsigned int max_msg_size; ++ unsigned int bulk_threshold; /* The message size above which it ++ is better to use a bulk transfer ++ (<= max_msg_size) */ ++ unsigned int max_outstanding_bulks; ++ unsigned int max_services; ++ short version; /* The version of VCHIQ */ ++ short version_min; /* The minimum compatible version of VCHIQ */ ++} VCHIQ_CONFIG_T; ++ ++typedef struct vchiq_instance_struct *VCHIQ_INSTANCE_T; ++typedef void (*VCHIQ_REMOTE_USE_CALLBACK_T)(void *cb_arg); ++ ++extern VCHIQ_STATUS_T vchiq_initialise(VCHIQ_INSTANCE_T *pinstance); ++extern VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance); ++extern VCHIQ_STATUS_T vchiq_connect(VCHIQ_INSTANCE_T instance); ++extern VCHIQ_STATUS_T vchiq_add_service(VCHIQ_INSTANCE_T instance, ++ const VCHIQ_SERVICE_PARAMS_T *params, ++ VCHIQ_SERVICE_HANDLE_T *pservice); ++extern VCHIQ_STATUS_T vchiq_open_service(VCHIQ_INSTANCE_T instance, ++ const VCHIQ_SERVICE_PARAMS_T *params, ++ VCHIQ_SERVICE_HANDLE_T *pservice); ++extern VCHIQ_STATUS_T vchiq_close_service(VCHIQ_SERVICE_HANDLE_T service); ++extern VCHIQ_STATUS_T vchiq_remove_service(VCHIQ_SERVICE_HANDLE_T service); ++extern VCHIQ_STATUS_T vchiq_use_service(VCHIQ_SERVICE_HANDLE_T service); ++extern VCHIQ_STATUS_T vchiq_use_service_no_resume( ++ VCHIQ_SERVICE_HANDLE_T service); ++extern VCHIQ_STATUS_T vchiq_release_service(VCHIQ_SERVICE_HANDLE_T service); ++ ++extern VCHIQ_STATUS_T vchiq_queue_message(VCHIQ_SERVICE_HANDLE_T service, ++ const VCHIQ_ELEMENT_T *elements, unsigned int count); ++extern void vchiq_release_message(VCHIQ_SERVICE_HANDLE_T service, ++ VCHIQ_HEADER_T *header); ++extern VCHIQ_STATUS_T vchiq_queue_bulk_transmit(VCHIQ_SERVICE_HANDLE_T service, ++ const void *data, unsigned int size, void *userdata); ++extern VCHIQ_STATUS_T vchiq_queue_bulk_receive(VCHIQ_SERVICE_HANDLE_T service, ++ void *data, unsigned int size, void *userdata); ++extern VCHIQ_STATUS_T vchiq_queue_bulk_transmit_handle( ++ VCHIQ_SERVICE_HANDLE_T service, VCHI_MEM_HANDLE_T handle, ++ const void *offset, unsigned int size, void *userdata); ++extern VCHIQ_STATUS_T vchiq_queue_bulk_receive_handle( ++ VCHIQ_SERVICE_HANDLE_T service, VCHI_MEM_HANDLE_T handle, ++ void *offset, unsigned int size, void *userdata); ++extern VCHIQ_STATUS_T vchiq_bulk_transmit(VCHIQ_SERVICE_HANDLE_T service, ++ const void *data, unsigned int size, void *userdata, ++ VCHIQ_BULK_MODE_T mode); ++extern VCHIQ_STATUS_T vchiq_bulk_receive(VCHIQ_SERVICE_HANDLE_T service, ++ void *data, unsigned int size, void *userdata, ++ VCHIQ_BULK_MODE_T mode); ++extern VCHIQ_STATUS_T vchiq_bulk_transmit_handle(VCHIQ_SERVICE_HANDLE_T service, ++ VCHI_MEM_HANDLE_T handle, const void *offset, unsigned int size, ++ void *userdata, VCHIQ_BULK_MODE_T mode); ++extern VCHIQ_STATUS_T vchiq_bulk_receive_handle(VCHIQ_SERVICE_HANDLE_T service, ++ VCHI_MEM_HANDLE_T handle, void *offset, unsigned int size, ++ void *userdata, VCHIQ_BULK_MODE_T mode); ++extern int vchiq_get_client_id(VCHIQ_SERVICE_HANDLE_T service); ++extern void *vchiq_get_service_userdata(VCHIQ_SERVICE_HANDLE_T service); ++extern int vchiq_get_service_fourcc(VCHIQ_SERVICE_HANDLE_T service); ++extern VCHIQ_STATUS_T vchiq_get_config(VCHIQ_INSTANCE_T instance, ++ int config_size, VCHIQ_CONFIG_T *pconfig); ++extern VCHIQ_STATUS_T vchiq_set_service_option(VCHIQ_SERVICE_HANDLE_T service, ++ VCHIQ_SERVICE_OPTION_T option, int value); ++ ++extern VCHIQ_STATUS_T vchiq_remote_use(VCHIQ_INSTANCE_T instance, ++ VCHIQ_REMOTE_USE_CALLBACK_T callback, void *cb_arg); ++extern VCHIQ_STATUS_T vchiq_remote_release(VCHIQ_INSTANCE_T instance); ++ ++extern VCHIQ_STATUS_T vchiq_dump_phys_mem(VCHIQ_SERVICE_HANDLE_T service, ++ void *ptr, size_t num_bytes); ++ ++extern VCHIQ_STATUS_T vchiq_get_peer_version(VCHIQ_SERVICE_HANDLE_T handle, ++ short *peer_version); ++ ++#endif /* VCHIQ_IF_H */ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_ioctl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_ioctl.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,129 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_IOCTLS_H ++#define VCHIQ_IOCTLS_H ++ ++#include ++#include "vchiq_if.h" ++ ++#define VCHIQ_IOC_MAGIC 0xc4 ++#define VCHIQ_INVALID_HANDLE (~0) ++ ++typedef struct { ++ VCHIQ_SERVICE_PARAMS_T params; ++ int is_open; ++ int is_vchi; ++ unsigned int handle; /* OUT */ ++} VCHIQ_CREATE_SERVICE_T; ++ ++typedef struct { ++ unsigned int handle; ++ unsigned int count; ++ const VCHIQ_ELEMENT_T *elements; ++} VCHIQ_QUEUE_MESSAGE_T; ++ ++typedef struct { ++ unsigned int handle; ++ void *data; ++ unsigned int size; ++ void *userdata; ++ VCHIQ_BULK_MODE_T mode; ++} VCHIQ_QUEUE_BULK_TRANSFER_T; ++ ++typedef struct { ++ VCHIQ_REASON_T reason; ++ VCHIQ_HEADER_T *header; ++ void *service_userdata; ++ void *bulk_userdata; ++} VCHIQ_COMPLETION_DATA_T; ++ ++typedef struct { ++ unsigned int count; ++ VCHIQ_COMPLETION_DATA_T *buf; ++ unsigned int msgbufsize; ++ unsigned int msgbufcount; /* IN/OUT */ ++ void **msgbufs; ++} VCHIQ_AWAIT_COMPLETION_T; ++ ++typedef struct { ++ unsigned int handle; ++ int blocking; ++ unsigned int bufsize; ++ void *buf; ++} VCHIQ_DEQUEUE_MESSAGE_T; ++ ++typedef struct { ++ unsigned int config_size; ++ VCHIQ_CONFIG_T *pconfig; ++} VCHIQ_GET_CONFIG_T; ++ ++typedef struct { ++ unsigned int handle; ++ VCHIQ_SERVICE_OPTION_T option; ++ int value; ++} VCHIQ_SET_SERVICE_OPTION_T; ++ ++typedef struct { ++ void *virt_addr; ++ size_t num_bytes; ++} VCHIQ_DUMP_MEM_T; ++ ++#define VCHIQ_IOC_CONNECT _IO(VCHIQ_IOC_MAGIC, 0) ++#define VCHIQ_IOC_SHUTDOWN _IO(VCHIQ_IOC_MAGIC, 1) ++#define VCHIQ_IOC_CREATE_SERVICE \ ++ _IOWR(VCHIQ_IOC_MAGIC, 2, VCHIQ_CREATE_SERVICE_T) ++#define VCHIQ_IOC_REMOVE_SERVICE _IO(VCHIQ_IOC_MAGIC, 3) ++#define VCHIQ_IOC_QUEUE_MESSAGE \ ++ _IOW(VCHIQ_IOC_MAGIC, 4, VCHIQ_QUEUE_MESSAGE_T) ++#define VCHIQ_IOC_QUEUE_BULK_TRANSMIT \ ++ _IOWR(VCHIQ_IOC_MAGIC, 5, VCHIQ_QUEUE_BULK_TRANSFER_T) ++#define VCHIQ_IOC_QUEUE_BULK_RECEIVE \ ++ _IOWR(VCHIQ_IOC_MAGIC, 6, VCHIQ_QUEUE_BULK_TRANSFER_T) ++#define VCHIQ_IOC_AWAIT_COMPLETION \ ++ _IOWR(VCHIQ_IOC_MAGIC, 7, VCHIQ_AWAIT_COMPLETION_T) ++#define VCHIQ_IOC_DEQUEUE_MESSAGE \ ++ _IOWR(VCHIQ_IOC_MAGIC, 8, VCHIQ_DEQUEUE_MESSAGE_T) ++#define VCHIQ_IOC_GET_CLIENT_ID _IO(VCHIQ_IOC_MAGIC, 9) ++#define VCHIQ_IOC_GET_CONFIG \ ++ _IOWR(VCHIQ_IOC_MAGIC, 10, VCHIQ_GET_CONFIG_T) ++#define VCHIQ_IOC_CLOSE_SERVICE _IO(VCHIQ_IOC_MAGIC, 11) ++#define VCHIQ_IOC_USE_SERVICE _IO(VCHIQ_IOC_MAGIC, 12) ++#define VCHIQ_IOC_RELEASE_SERVICE _IO(VCHIQ_IOC_MAGIC, 13) ++#define VCHIQ_IOC_SET_SERVICE_OPTION \ ++ _IOW(VCHIQ_IOC_MAGIC, 14, VCHIQ_SET_SERVICE_OPTION_T) ++#define VCHIQ_IOC_DUMP_PHYS_MEM \ ++ _IOW(VCHIQ_IOC_MAGIC, 15, VCHIQ_DUMP_MEM_T) ++#define VCHIQ_IOC_MAX 15 ++ ++#endif +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_kern_lib.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_kern_lib.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,456 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++/* ---- Include Files ---------------------------------------------------- */ ++ ++#include ++#include ++#include ++ ++#include "vchiq_core.h" ++#include "vchiq_arm.h" ++ ++/* ---- Public Variables ------------------------------------------------- */ ++ ++/* ---- Private Constants and Types -------------------------------------- */ ++ ++struct bulk_waiter_node { ++ struct bulk_waiter bulk_waiter; ++ int pid; ++ struct list_head list; ++}; ++ ++struct vchiq_instance_struct { ++ VCHIQ_STATE_T *state; ++ ++ int connected; ++ ++ struct list_head bulk_waiter_list; ++ struct mutex bulk_waiter_list_mutex; ++}; ++ ++static VCHIQ_STATUS_T ++vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, ++ unsigned int size, VCHIQ_BULK_DIR_T dir); ++ ++/**************************************************************************** ++* ++* vchiq_initialise ++* ++***************************************************************************/ ++#define VCHIQ_INIT_RETRIES 10 ++VCHIQ_STATUS_T vchiq_initialise(VCHIQ_INSTANCE_T *instanceOut) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ VCHIQ_STATE_T *state; ++ VCHIQ_INSTANCE_T instance = NULL; ++ int i; ++ ++ vchiq_log_trace(vchiq_core_log_level, "%s called", __func__); ++ ++ /* VideoCore may not be ready due to boot up timing. ++ It may never be ready if kernel and firmware are mismatched, so don't block forever. */ ++ for (i=0; i0) { ++ vchiq_log_warning(vchiq_core_log_level, ++ "%s: videocore initialized after %d retries\n", __func__, i); ++ } ++ ++ instance = kzalloc(sizeof(*instance), GFP_KERNEL); ++ if (!instance) { ++ vchiq_log_error(vchiq_core_log_level, ++ "%s: error allocating vchiq instance\n", __func__); ++ goto failed; ++ } ++ ++ instance->connected = 0; ++ instance->state = state; ++ mutex_init(&instance->bulk_waiter_list_mutex); ++ INIT_LIST_HEAD(&instance->bulk_waiter_list); ++ ++ *instanceOut = instance; ++ ++ status = VCHIQ_SUCCESS; ++ ++failed: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p): returning %d", __func__, instance, status); ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_initialise); ++ ++/**************************************************************************** ++* ++* vchiq_shutdown ++* ++***************************************************************************/ ++ ++VCHIQ_STATUS_T vchiq_shutdown(VCHIQ_INSTANCE_T instance) ++{ ++ VCHIQ_STATUS_T status; ++ VCHIQ_STATE_T *state = instance->state; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p) called", __func__, instance); ++ ++ if (mutex_lock_interruptible(&state->mutex) != 0) ++ return VCHIQ_RETRY; ++ ++ /* Remove all services */ ++ status = vchiq_shutdown_internal(state, instance); ++ ++ mutex_unlock(&state->mutex); ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p): returning %d", __func__, instance, status); ++ ++ if (status == VCHIQ_SUCCESS) { ++ struct list_head *pos, *next; ++ list_for_each_safe(pos, next, ++ &instance->bulk_waiter_list) { ++ struct bulk_waiter_node *waiter; ++ waiter = list_entry(pos, ++ struct bulk_waiter_node, ++ list); ++ list_del(pos); ++ vchiq_log_info(vchiq_arm_log_level, ++ "bulk_waiter - cleaned up %x " ++ "for pid %d", ++ (unsigned int)waiter, waiter->pid); ++ kfree(waiter); ++ } ++ kfree(instance); ++ } ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_shutdown); ++ ++/**************************************************************************** ++* ++* vchiq_is_connected ++* ++***************************************************************************/ ++ ++int vchiq_is_connected(VCHIQ_INSTANCE_T instance) ++{ ++ return instance->connected; ++} ++ ++/**************************************************************************** ++* ++* vchiq_connect ++* ++***************************************************************************/ ++ ++VCHIQ_STATUS_T vchiq_connect(VCHIQ_INSTANCE_T instance) ++{ ++ VCHIQ_STATUS_T status; ++ VCHIQ_STATE_T *state = instance->state; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p) called", __func__, instance); ++ ++ if (mutex_lock_interruptible(&state->mutex) != 0) { ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s: call to mutex_lock failed", __func__); ++ status = VCHIQ_RETRY; ++ goto failed; ++ } ++ status = vchiq_connect_internal(state, instance); ++ ++ if (status == VCHIQ_SUCCESS) ++ instance->connected = 1; ++ ++ mutex_unlock(&state->mutex); ++ ++failed: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p): returning %d", __func__, instance, status); ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_connect); ++ ++/**************************************************************************** ++* ++* vchiq_add_service ++* ++***************************************************************************/ ++ ++VCHIQ_STATUS_T vchiq_add_service( ++ VCHIQ_INSTANCE_T instance, ++ const VCHIQ_SERVICE_PARAMS_T *params, ++ VCHIQ_SERVICE_HANDLE_T *phandle) ++{ ++ VCHIQ_STATUS_T status; ++ VCHIQ_STATE_T *state = instance->state; ++ VCHIQ_SERVICE_T *service = NULL; ++ int srvstate; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p) called", __func__, instance); ++ ++ *phandle = VCHIQ_SERVICE_HANDLE_INVALID; ++ ++ srvstate = vchiq_is_connected(instance) ++ ? VCHIQ_SRVSTATE_LISTENING ++ : VCHIQ_SRVSTATE_HIDDEN; ++ ++ service = vchiq_add_service_internal( ++ state, ++ params, ++ srvstate, ++ instance, ++ NULL); ++ ++ if (service) { ++ *phandle = service->handle; ++ status = VCHIQ_SUCCESS; ++ } else ++ status = VCHIQ_ERROR; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p): returning %d", __func__, instance, status); ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_add_service); ++ ++/**************************************************************************** ++* ++* vchiq_open_service ++* ++***************************************************************************/ ++ ++VCHIQ_STATUS_T vchiq_open_service( ++ VCHIQ_INSTANCE_T instance, ++ const VCHIQ_SERVICE_PARAMS_T *params, ++ VCHIQ_SERVICE_HANDLE_T *phandle) ++{ ++ VCHIQ_STATUS_T status = VCHIQ_ERROR; ++ VCHIQ_STATE_T *state = instance->state; ++ VCHIQ_SERVICE_T *service = NULL; ++ ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p) called", __func__, instance); ++ ++ *phandle = VCHIQ_SERVICE_HANDLE_INVALID; ++ ++ if (!vchiq_is_connected(instance)) ++ goto failed; ++ ++ service = vchiq_add_service_internal(state, ++ params, ++ VCHIQ_SRVSTATE_OPENING, ++ instance, ++ NULL); ++ ++ if (service) { ++ status = vchiq_open_service_internal(service, current->pid); ++ if (status == VCHIQ_SUCCESS) ++ *phandle = service->handle; ++ else ++ vchiq_remove_service(service->handle); ++ } ++ ++failed: ++ vchiq_log_trace(vchiq_core_log_level, ++ "%s(%p): returning %d", __func__, instance, status); ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_open_service); ++ ++VCHIQ_STATUS_T ++vchiq_queue_bulk_transmit(VCHIQ_SERVICE_HANDLE_T handle, ++ const void *data, unsigned int size, void *userdata) ++{ ++ return vchiq_bulk_transfer(handle, ++ VCHI_MEM_HANDLE_INVALID, (void *)data, size, userdata, ++ VCHIQ_BULK_MODE_CALLBACK, VCHIQ_BULK_TRANSMIT); ++} ++EXPORT_SYMBOL(vchiq_queue_bulk_transmit); ++ ++VCHIQ_STATUS_T ++vchiq_queue_bulk_receive(VCHIQ_SERVICE_HANDLE_T handle, void *data, ++ unsigned int size, void *userdata) ++{ ++ return vchiq_bulk_transfer(handle, ++ VCHI_MEM_HANDLE_INVALID, data, size, userdata, ++ VCHIQ_BULK_MODE_CALLBACK, VCHIQ_BULK_RECEIVE); ++} ++EXPORT_SYMBOL(vchiq_queue_bulk_receive); ++ ++VCHIQ_STATUS_T ++vchiq_bulk_transmit(VCHIQ_SERVICE_HANDLE_T handle, const void *data, ++ unsigned int size, void *userdata, VCHIQ_BULK_MODE_T mode) ++{ ++ VCHIQ_STATUS_T status; ++ ++ switch (mode) { ++ case VCHIQ_BULK_MODE_NOCALLBACK: ++ case VCHIQ_BULK_MODE_CALLBACK: ++ status = vchiq_bulk_transfer(handle, ++ VCHI_MEM_HANDLE_INVALID, (void *)data, size, userdata, ++ mode, VCHIQ_BULK_TRANSMIT); ++ break; ++ case VCHIQ_BULK_MODE_BLOCKING: ++ status = vchiq_blocking_bulk_transfer(handle, ++ (void *)data, size, VCHIQ_BULK_TRANSMIT); ++ break; ++ default: ++ return VCHIQ_ERROR; ++ } ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_bulk_transmit); ++ ++VCHIQ_STATUS_T ++vchiq_bulk_receive(VCHIQ_SERVICE_HANDLE_T handle, void *data, ++ unsigned int size, void *userdata, VCHIQ_BULK_MODE_T mode) ++{ ++ VCHIQ_STATUS_T status; ++ ++ switch (mode) { ++ case VCHIQ_BULK_MODE_NOCALLBACK: ++ case VCHIQ_BULK_MODE_CALLBACK: ++ status = vchiq_bulk_transfer(handle, ++ VCHI_MEM_HANDLE_INVALID, data, size, userdata, ++ mode, VCHIQ_BULK_RECEIVE); ++ break; ++ case VCHIQ_BULK_MODE_BLOCKING: ++ status = vchiq_blocking_bulk_transfer(handle, ++ (void *)data, size, VCHIQ_BULK_RECEIVE); ++ break; ++ default: ++ return VCHIQ_ERROR; ++ } ++ ++ return status; ++} ++EXPORT_SYMBOL(vchiq_bulk_receive); ++ ++static VCHIQ_STATUS_T ++vchiq_blocking_bulk_transfer(VCHIQ_SERVICE_HANDLE_T handle, void *data, ++ unsigned int size, VCHIQ_BULK_DIR_T dir) ++{ ++ VCHIQ_INSTANCE_T instance; ++ VCHIQ_SERVICE_T *service; ++ VCHIQ_STATUS_T status; ++ struct bulk_waiter_node *waiter = NULL; ++ struct list_head *pos; ++ ++ service = find_service_by_handle(handle); ++ if (!service) ++ return VCHIQ_ERROR; ++ ++ instance = service->instance; ++ ++ unlock_service(service); ++ ++ mutex_lock(&instance->bulk_waiter_list_mutex); ++ list_for_each(pos, &instance->bulk_waiter_list) { ++ if (list_entry(pos, struct bulk_waiter_node, ++ list)->pid == current->pid) { ++ waiter = list_entry(pos, ++ struct bulk_waiter_node, ++ list); ++ list_del(pos); ++ break; ++ } ++ } ++ mutex_unlock(&instance->bulk_waiter_list_mutex); ++ ++ if (waiter) { ++ VCHIQ_BULK_T *bulk = waiter->bulk_waiter.bulk; ++ if (bulk) { ++ /* This thread has an outstanding bulk transfer. */ ++ if ((bulk->data != data) || ++ (bulk->size != size)) { ++ /* This is not a retry of the previous one. ++ ** Cancel the signal when the transfer ++ ** completes. */ ++ spin_lock(&bulk_waiter_spinlock); ++ bulk->userdata = NULL; ++ spin_unlock(&bulk_waiter_spinlock); ++ } ++ } ++ } ++ ++ if (!waiter) { ++ waiter = kzalloc(sizeof(struct bulk_waiter_node), GFP_KERNEL); ++ if (!waiter) { ++ vchiq_log_error(vchiq_core_log_level, ++ "%s - out of memory", __func__); ++ return VCHIQ_ERROR; ++ } ++ } ++ ++ status = vchiq_bulk_transfer(handle, VCHI_MEM_HANDLE_INVALID, ++ data, size, &waiter->bulk_waiter, VCHIQ_BULK_MODE_BLOCKING, ++ dir); ++ if ((status != VCHIQ_RETRY) || fatal_signal_pending(current) || ++ !waiter->bulk_waiter.bulk) { ++ VCHIQ_BULK_T *bulk = waiter->bulk_waiter.bulk; ++ if (bulk) { ++ /* Cancel the signal when the transfer ++ ** completes. */ ++ spin_lock(&bulk_waiter_spinlock); ++ bulk->userdata = NULL; ++ spin_unlock(&bulk_waiter_spinlock); ++ } ++ kfree(waiter); ++ } else { ++ waiter->pid = current->pid; ++ mutex_lock(&instance->bulk_waiter_list_mutex); ++ list_add(&waiter->list, &instance->bulk_waiter_list); ++ mutex_unlock(&instance->bulk_waiter_list_mutex); ++ vchiq_log_info(vchiq_arm_log_level, ++ "saved bulk_waiter %x for pid %d", ++ (unsigned int)waiter, current->pid); ++ } ++ ++ return status; ++} +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_memdrv.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_memdrv.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,71 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_MEMDRV_H ++#define VCHIQ_MEMDRV_H ++ ++/* ---- Include Files ----------------------------------------------------- */ ++ ++#include ++#include "vchiq_if.h" ++ ++/* ---- Constants and Types ---------------------------------------------- */ ++ ++typedef struct { ++ void *armSharedMemVirt; ++ dma_addr_t armSharedMemPhys; ++ size_t armSharedMemSize; ++ ++ void *vcSharedMemVirt; ++ dma_addr_t vcSharedMemPhys; ++ size_t vcSharedMemSize; ++} VCHIQ_SHARED_MEM_INFO_T; ++ ++/* ---- Variable Externs ------------------------------------------------- */ ++ ++/* ---- Function Prototypes ---------------------------------------------- */ ++ ++void vchiq_get_shared_mem_info(VCHIQ_SHARED_MEM_INFO_T *info); ++ ++VCHIQ_STATUS_T vchiq_memdrv_initialise(void); ++ ++VCHIQ_STATUS_T vchiq_userdrv_create_instance( ++ const VCHIQ_PLATFORM_DATA_T * platform_data); ++ ++VCHIQ_STATUS_T vchiq_userdrv_suspend( ++ const VCHIQ_PLATFORM_DATA_T * platform_data); ++ ++VCHIQ_STATUS_T vchiq_userdrv_resume( ++ const VCHIQ_PLATFORM_DATA_T * platform_data); ++ ++#endif +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_pagelist.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_pagelist.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,58 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_PAGELIST_H ++#define VCHIQ_PAGELIST_H ++ ++#ifndef PAGE_SIZE ++#define PAGE_SIZE 4096 ++#endif ++#define CACHE_LINE_SIZE 32 ++#define PAGELIST_WRITE 0 ++#define PAGELIST_READ 1 ++#define PAGELIST_READ_WITH_FRAGMENTS 2 ++ ++typedef struct pagelist_struct { ++ unsigned long length; ++ unsigned short type; ++ unsigned short offset; ++ unsigned long addrs[1]; /* N.B. 12 LSBs hold the number of following ++ pages at consecutive addresses. */ ++} PAGELIST_T; ++ ++typedef struct fragments_struct { ++ char headbuf[CACHE_LINE_SIZE]; ++ char tailbuf[CACHE_LINE_SIZE]; ++} FRAGMENTS_T; ++ ++#endif /* VCHIQ_PAGELIST_H */ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_proc.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_proc.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,254 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++ ++#include ++#include "vchiq_core.h" ++#include "vchiq_arm.h" ++ ++#if 1 ++ ++int vchiq_proc_init(void) ++{ ++ return 0; ++} ++ ++void vchiq_proc_deinit(void) ++{ ++} ++ ++#else ++ ++struct vchiq_proc_info { ++ /* Global 'vc' proc entry used by all instances */ ++ struct proc_dir_entry *vc_cfg_dir; ++ ++ /* one entry per client process */ ++ struct proc_dir_entry *clients; ++ ++ /* log categories */ ++ struct proc_dir_entry *log_categories; ++}; ++ ++static struct vchiq_proc_info proc_info; ++ ++struct proc_dir_entry *vchiq_proc_top(void) ++{ ++ BUG_ON(proc_info.vc_cfg_dir == NULL); ++ return proc_info.vc_cfg_dir; ++} ++ ++/**************************************************************************** ++* ++* log category entries ++* ++***************************************************************************/ ++#define PROC_WRITE_BUF_SIZE 256 ++ ++#define VCHIQ_LOG_ERROR_STR "error" ++#define VCHIQ_LOG_WARNING_STR "warning" ++#define VCHIQ_LOG_INFO_STR "info" ++#define VCHIQ_LOG_TRACE_STR "trace" ++ ++static int log_cfg_read(char *buffer, ++ char **start, ++ off_t off, ++ int count, ++ int *eof, ++ void *data) ++{ ++ int len = 0; ++ char *log_value = NULL; ++ ++ switch (*((int *)data)) { ++ case VCHIQ_LOG_ERROR: ++ log_value = VCHIQ_LOG_ERROR_STR; ++ break; ++ case VCHIQ_LOG_WARNING: ++ log_value = VCHIQ_LOG_WARNING_STR; ++ break; ++ case VCHIQ_LOG_INFO: ++ log_value = VCHIQ_LOG_INFO_STR; ++ break; ++ case VCHIQ_LOG_TRACE: ++ log_value = VCHIQ_LOG_TRACE_STR; ++ break; ++ default: ++ break; ++ } ++ ++ len += sprintf(buffer + len, ++ "%s\n", ++ log_value ? log_value : "(null)"); ++ ++ return len; ++} ++ ++ ++static int log_cfg_write(struct file *file, ++ const char __user *buffer, ++ unsigned long count, ++ void *data) ++{ ++ int *log_module = data; ++ char kbuf[PROC_WRITE_BUF_SIZE + 1]; ++ ++ (void)file; ++ ++ memset(kbuf, 0, PROC_WRITE_BUF_SIZE + 1); ++ if (count >= PROC_WRITE_BUF_SIZE) ++ count = PROC_WRITE_BUF_SIZE; ++ ++ if (copy_from_user(kbuf, ++ buffer, ++ count) != 0) ++ return -EFAULT; ++ kbuf[count - 1] = 0; ++ ++ if (strncmp("error", kbuf, strlen("error")) == 0) ++ *log_module = VCHIQ_LOG_ERROR; ++ else if (strncmp("warning", kbuf, strlen("warning")) == 0) ++ *log_module = VCHIQ_LOG_WARNING; ++ else if (strncmp("info", kbuf, strlen("info")) == 0) ++ *log_module = VCHIQ_LOG_INFO; ++ else if (strncmp("trace", kbuf, strlen("trace")) == 0) ++ *log_module = VCHIQ_LOG_TRACE; ++ else ++ *log_module = VCHIQ_LOG_DEFAULT; ++ ++ return count; ++} ++ ++/* Log category proc entries */ ++struct vchiq_proc_log_entry { ++ const char *name; ++ int *plevel; ++ struct proc_dir_entry *dir; ++}; ++ ++static struct vchiq_proc_log_entry vchiq_proc_log_entries[] = { ++ { "core", &vchiq_core_log_level }, ++ { "msg", &vchiq_core_msg_log_level }, ++ { "sync", &vchiq_sync_log_level }, ++ { "susp", &vchiq_susp_log_level }, ++ { "arm", &vchiq_arm_log_level }, ++}; ++static int n_log_entries = ++ sizeof(vchiq_proc_log_entries)/sizeof(vchiq_proc_log_entries[0]); ++ ++/* create an entry under /proc/vc/log for each log category */ ++static int vchiq_proc_create_log_entries(struct proc_dir_entry *top) ++{ ++ struct proc_dir_entry *dir; ++ size_t i; ++ int ret = 0; ++ dir = proc_mkdir("log", proc_info.vc_cfg_dir); ++ if (!dir) ++ return -ENOMEM; ++ proc_info.log_categories = dir; ++ ++ for (i = 0; i < n_log_entries; i++) { ++ dir = create_proc_entry(vchiq_proc_log_entries[i].name, ++ 0644, ++ proc_info.log_categories); ++ if (!dir) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ dir->read_proc = &log_cfg_read; ++ dir->write_proc = &log_cfg_write; ++ dir->data = (void *)vchiq_proc_log_entries[i].plevel; ++ ++ vchiq_proc_log_entries[i].dir = dir; ++ } ++ return ret; ++} ++ ++ ++int vchiq_proc_init(void) ++{ ++ BUG_ON(proc_info.vc_cfg_dir != NULL); ++ ++ proc_info.vc_cfg_dir = proc_mkdir("vc", NULL); ++ if (proc_info.vc_cfg_dir == NULL) ++ goto fail; ++ ++ proc_info.clients = proc_mkdir("clients", ++ proc_info.vc_cfg_dir); ++ if (!proc_info.clients) ++ goto fail; ++ ++ if (vchiq_proc_create_log_entries(proc_info.vc_cfg_dir) != 0) ++ goto fail; ++ ++ return 0; ++ ++fail: ++ vchiq_proc_deinit(); ++ vchiq_log_error(vchiq_arm_log_level, ++ "%s: failed to create proc directory", ++ __func__); ++ ++ return -ENOMEM; ++} ++ ++/* remove all the proc entries */ ++void vchiq_proc_deinit(void) ++{ ++ /* log category entries */ ++ if (proc_info.log_categories) { ++ size_t i; ++ for (i = 0; i < n_log_entries; i++) ++ if (vchiq_proc_log_entries[i].dir) ++ remove_proc_entry( ++ vchiq_proc_log_entries[i].name, ++ proc_info.log_categories); ++ ++ remove_proc_entry(proc_info.log_categories->name, ++ proc_info.vc_cfg_dir); ++ } ++ if (proc_info.clients) ++ remove_proc_entry(proc_info.clients->name, ++ proc_info.vc_cfg_dir); ++ if (proc_info.vc_cfg_dir) ++ remove_proc_entry(proc_info.vc_cfg_dir->name, NULL); ++} ++ ++struct proc_dir_entry *vchiq_clients_top(void) ++{ ++ return proc_info.clients; ++} ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_shim.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_shim.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,815 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#include ++#include ++ ++#include "interface/vchi/vchi.h" ++#include "vchiq.h" ++#include "vchiq_core.h" ++ ++#include "vchiq_util.h" ++ ++#include ++ ++#define vchiq_status_to_vchi(status) ((int32_t)status) ++ ++typedef struct { ++ VCHIQ_SERVICE_HANDLE_T handle; ++ ++ VCHIU_QUEUE_T queue; ++ ++ VCHI_CALLBACK_T callback; ++ void *callback_param; ++} SHIM_SERVICE_T; ++ ++/* ---------------------------------------------------------------------- ++ * return pointer to the mphi message driver function table ++ * -------------------------------------------------------------------- */ ++const VCHI_MESSAGE_DRIVER_T * ++vchi_mphi_message_driver_func_table(void) ++{ ++ return NULL; ++} ++ ++/* ---------------------------------------------------------------------- ++ * return a pointer to the 'single' connection driver fops ++ * -------------------------------------------------------------------- */ ++const VCHI_CONNECTION_API_T * ++single_get_func_table(void) ++{ ++ return NULL; ++} ++ ++VCHI_CONNECTION_T *vchi_create_connection( ++ const VCHI_CONNECTION_API_T *function_table, ++ const VCHI_MESSAGE_DRIVER_T *low_level) ++{ ++ (void)function_table; ++ (void)low_level; ++ return NULL; ++} ++ ++/*********************************************************** ++ * Name: vchi_msg_peek ++ * ++ * Arguments: const VCHI_SERVICE_HANDLE_T handle, ++ * void **data, ++ * uint32_t *msg_size, ++ ++ ++ * VCHI_FLAGS_T flags ++ * ++ * Description: Routine to return a pointer to the current message (to allow in ++ * place processing). The message can be removed using ++ * vchi_msg_remove when you're finished ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_msg_peek(VCHI_SERVICE_HANDLE_T handle, ++ void **data, ++ uint32_t *msg_size, ++ VCHI_FLAGS_T flags) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_HEADER_T *header; ++ ++ WARN_ON((flags != VCHI_FLAGS_NONE) && ++ (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); ++ ++ if (flags == VCHI_FLAGS_NONE) ++ if (vchiu_queue_is_empty(&service->queue)) ++ return -1; ++ ++ header = vchiu_queue_peek(&service->queue); ++ ++ *data = header->data; ++ *msg_size = header->size; ++ ++ return 0; ++} ++EXPORT_SYMBOL(vchi_msg_peek); ++ ++/*********************************************************** ++ * Name: vchi_msg_remove ++ * ++ * Arguments: const VCHI_SERVICE_HANDLE_T handle, ++ * ++ * Description: Routine to remove a message (after it has been read with ++ * vchi_msg_peek) ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_msg_remove(VCHI_SERVICE_HANDLE_T handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_HEADER_T *header; ++ ++ header = vchiu_queue_pop(&service->queue); ++ ++ vchiq_release_message(service->handle, header); ++ ++ return 0; ++} ++EXPORT_SYMBOL(vchi_msg_remove); ++ ++/*********************************************************** ++ * Name: vchi_msg_queue ++ * ++ * Arguments: VCHI_SERVICE_HANDLE_T handle, ++ * const void *data, ++ * uint32_t data_size, ++ * VCHI_FLAGS_T flags, ++ * void *msg_handle, ++ * ++ * Description: Thin wrapper to queue a message onto a connection ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_msg_queue(VCHI_SERVICE_HANDLE_T handle, ++ const void *data, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *msg_handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_ELEMENT_T element = {data, data_size}; ++ VCHIQ_STATUS_T status; ++ ++ (void)msg_handle; ++ ++ WARN_ON(flags != VCHI_FLAGS_BLOCK_UNTIL_QUEUED); ++ ++ status = vchiq_queue_message(service->handle, &element, 1); ++ ++ /* vchiq_queue_message() may return VCHIQ_RETRY, so we need to ++ ** implement a retry mechanism since this function is supposed ++ ** to block until queued ++ */ ++ while (status == VCHIQ_RETRY) { ++ msleep(1); ++ status = vchiq_queue_message(service->handle, &element, 1); ++ } ++ ++ return vchiq_status_to_vchi(status); ++} ++EXPORT_SYMBOL(vchi_msg_queue); ++ ++/*********************************************************** ++ * Name: vchi_bulk_queue_receive ++ * ++ * Arguments: VCHI_BULK_HANDLE_T handle, ++ * void *data_dst, ++ * const uint32_t data_size, ++ * VCHI_FLAGS_T flags ++ * void *bulk_handle ++ * ++ * Description: Routine to setup a rcv buffer ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_bulk_queue_receive(VCHI_SERVICE_HANDLE_T handle, ++ void *data_dst, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *bulk_handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_BULK_MODE_T mode; ++ VCHIQ_STATUS_T status; ++ ++ switch ((int)flags) { ++ case VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE ++ | VCHI_FLAGS_BLOCK_UNTIL_QUEUED: ++ WARN_ON(!service->callback); ++ mode = VCHIQ_BULK_MODE_CALLBACK; ++ break; ++ case VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE: ++ mode = VCHIQ_BULK_MODE_BLOCKING; ++ break; ++ case VCHI_FLAGS_BLOCK_UNTIL_QUEUED: ++ case VCHI_FLAGS_NONE: ++ mode = VCHIQ_BULK_MODE_NOCALLBACK; ++ break; ++ default: ++ WARN(1, "unsupported message\n"); ++ return vchiq_status_to_vchi(VCHIQ_ERROR); ++ } ++ ++ status = vchiq_bulk_receive(service->handle, data_dst, data_size, ++ bulk_handle, mode); ++ ++ /* vchiq_bulk_receive() may return VCHIQ_RETRY, so we need to ++ ** implement a retry mechanism since this function is supposed ++ ** to block until queued ++ */ ++ while (status == VCHIQ_RETRY) { ++ msleep(1); ++ status = vchiq_bulk_receive(service->handle, data_dst, ++ data_size, bulk_handle, mode); ++ } ++ ++ return vchiq_status_to_vchi(status); ++} ++EXPORT_SYMBOL(vchi_bulk_queue_receive); ++ ++/*********************************************************** ++ * Name: vchi_bulk_queue_transmit ++ * ++ * Arguments: VCHI_BULK_HANDLE_T handle, ++ * const void *data_src, ++ * uint32_t data_size, ++ * VCHI_FLAGS_T flags, ++ * void *bulk_handle ++ * ++ * Description: Routine to transmit some data ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_bulk_queue_transmit(VCHI_SERVICE_HANDLE_T handle, ++ const void *data_src, ++ uint32_t data_size, ++ VCHI_FLAGS_T flags, ++ void *bulk_handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_BULK_MODE_T mode; ++ VCHIQ_STATUS_T status; ++ ++ switch ((int)flags) { ++ case VCHI_FLAGS_CALLBACK_WHEN_OP_COMPLETE ++ | VCHI_FLAGS_BLOCK_UNTIL_QUEUED: ++ WARN_ON(!service->callback); ++ mode = VCHIQ_BULK_MODE_CALLBACK; ++ break; ++ case VCHI_FLAGS_BLOCK_UNTIL_DATA_READ: ++ case VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE: ++ mode = VCHIQ_BULK_MODE_BLOCKING; ++ break; ++ case VCHI_FLAGS_BLOCK_UNTIL_QUEUED: ++ case VCHI_FLAGS_NONE: ++ mode = VCHIQ_BULK_MODE_NOCALLBACK; ++ break; ++ default: ++ WARN(1, "unsupported message\n"); ++ return vchiq_status_to_vchi(VCHIQ_ERROR); ++ } ++ ++ status = vchiq_bulk_transmit(service->handle, data_src, data_size, ++ bulk_handle, mode); ++ ++ /* vchiq_bulk_transmit() may return VCHIQ_RETRY, so we need to ++ ** implement a retry mechanism since this function is supposed ++ ** to block until queued ++ */ ++ while (status == VCHIQ_RETRY) { ++ msleep(1); ++ status = vchiq_bulk_transmit(service->handle, data_src, ++ data_size, bulk_handle, mode); ++ } ++ ++ return vchiq_status_to_vchi(status); ++} ++EXPORT_SYMBOL(vchi_bulk_queue_transmit); ++ ++/*********************************************************** ++ * Name: vchi_msg_dequeue ++ * ++ * Arguments: VCHI_SERVICE_HANDLE_T handle, ++ * void *data, ++ * uint32_t max_data_size_to_read, ++ * uint32_t *actual_msg_size ++ * VCHI_FLAGS_T flags ++ * ++ * Description: Routine to dequeue a message into the supplied buffer ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_msg_dequeue(VCHI_SERVICE_HANDLE_T handle, ++ void *data, ++ uint32_t max_data_size_to_read, ++ uint32_t *actual_msg_size, ++ VCHI_FLAGS_T flags) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_HEADER_T *header; ++ ++ WARN_ON((flags != VCHI_FLAGS_NONE) && ++ (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); ++ ++ if (flags == VCHI_FLAGS_NONE) ++ if (vchiu_queue_is_empty(&service->queue)) ++ return -1; ++ ++ header = vchiu_queue_pop(&service->queue); ++ ++ memcpy(data, header->data, header->size < max_data_size_to_read ? ++ header->size : max_data_size_to_read); ++ ++ *actual_msg_size = header->size; ++ ++ vchiq_release_message(service->handle, header); ++ ++ return 0; ++} ++EXPORT_SYMBOL(vchi_msg_dequeue); ++ ++/*********************************************************** ++ * Name: vchi_msg_queuev ++ * ++ * Arguments: VCHI_SERVICE_HANDLE_T handle, ++ * VCHI_MSG_VECTOR_T *vector, ++ * uint32_t count, ++ * VCHI_FLAGS_T flags, ++ * void *msg_handle ++ * ++ * Description: Thin wrapper to queue a message onto a connection ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++ ++vchiq_static_assert(sizeof(VCHI_MSG_VECTOR_T) == sizeof(VCHIQ_ELEMENT_T)); ++vchiq_static_assert(offsetof(VCHI_MSG_VECTOR_T, vec_base) == ++ offsetof(VCHIQ_ELEMENT_T, data)); ++vchiq_static_assert(offsetof(VCHI_MSG_VECTOR_T, vec_len) == ++ offsetof(VCHIQ_ELEMENT_T, size)); ++ ++int32_t vchi_msg_queuev(VCHI_SERVICE_HANDLE_T handle, ++ VCHI_MSG_VECTOR_T *vector, ++ uint32_t count, ++ VCHI_FLAGS_T flags, ++ void *msg_handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ ++ (void)msg_handle; ++ ++ WARN_ON(flags != VCHI_FLAGS_BLOCK_UNTIL_QUEUED); ++ ++ return vchiq_status_to_vchi(vchiq_queue_message(service->handle, ++ (const VCHIQ_ELEMENT_T *)vector, count)); ++} ++EXPORT_SYMBOL(vchi_msg_queuev); ++ ++/*********************************************************** ++ * Name: vchi_held_msg_release ++ * ++ * Arguments: VCHI_HELD_MSG_T *message ++ * ++ * Description: Routine to release a held message (after it has been read with ++ * vchi_msg_hold) ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_held_msg_release(VCHI_HELD_MSG_T *message) ++{ ++ vchiq_release_message((VCHIQ_SERVICE_HANDLE_T)message->service, ++ (VCHIQ_HEADER_T *)message->message); ++ ++ return 0; ++} ++ ++/*********************************************************** ++ * Name: vchi_msg_hold ++ * ++ * Arguments: VCHI_SERVICE_HANDLE_T handle, ++ * void **data, ++ * uint32_t *msg_size, ++ * VCHI_FLAGS_T flags, ++ * VCHI_HELD_MSG_T *message_handle ++ * ++ * Description: Routine to return a pointer to the current message (to allow ++ * in place processing). The message is dequeued - don't forget ++ * to release the message using vchi_held_msg_release when you're ++ * finished. ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++int32_t vchi_msg_hold(VCHI_SERVICE_HANDLE_T handle, ++ void **data, ++ uint32_t *msg_size, ++ VCHI_FLAGS_T flags, ++ VCHI_HELD_MSG_T *message_handle) ++{ ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ VCHIQ_HEADER_T *header; ++ ++ WARN_ON((flags != VCHI_FLAGS_NONE) && ++ (flags != VCHI_FLAGS_BLOCK_UNTIL_OP_COMPLETE)); ++ ++ if (flags == VCHI_FLAGS_NONE) ++ if (vchiu_queue_is_empty(&service->queue)) ++ return -1; ++ ++ header = vchiu_queue_pop(&service->queue); ++ ++ *data = header->data; ++ *msg_size = header->size; ++ ++ message_handle->service = ++ (struct opaque_vchi_service_t *)service->handle; ++ message_handle->message = header; ++ ++ return 0; ++} ++ ++/*********************************************************** ++ * Name: vchi_initialise ++ * ++ * Arguments: VCHI_INSTANCE_T *instance_handle ++ * VCHI_CONNECTION_T **connections ++ * const uint32_t num_connections ++ * ++ * Description: Initialises the hardware but does not transmit anything ++ * When run as a Host App this will be called twice hence the need ++ * to malloc the state information ++ * ++ * Returns: 0 if successful, failure otherwise ++ * ++ ***********************************************************/ ++ ++int32_t vchi_initialise(VCHI_INSTANCE_T *instance_handle) ++{ ++ VCHIQ_INSTANCE_T instance; ++ VCHIQ_STATUS_T status; ++ ++ status = vchiq_initialise(&instance); ++ ++ *instance_handle = (VCHI_INSTANCE_T)instance; ++ ++ return vchiq_status_to_vchi(status); ++} ++EXPORT_SYMBOL(vchi_initialise); ++ ++/*********************************************************** ++ * Name: vchi_connect ++ * ++ * Arguments: VCHI_CONNECTION_T **connections ++ * const uint32_t num_connections ++ * VCHI_INSTANCE_T instance_handle) ++ * ++ * Description: Starts the command service on each connection, ++ * causing INIT messages to be pinged back and forth ++ * ++ * Returns: 0 if successful, failure otherwise ++ * ++ ***********************************************************/ ++int32_t vchi_connect(VCHI_CONNECTION_T **connections, ++ const uint32_t num_connections, ++ VCHI_INSTANCE_T instance_handle) ++{ ++ VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; ++ ++ (void)connections; ++ (void)num_connections; ++ ++ return vchiq_connect(instance); ++} ++EXPORT_SYMBOL(vchi_connect); ++ ++ ++/*********************************************************** ++ * Name: vchi_disconnect ++ * ++ * Arguments: VCHI_INSTANCE_T instance_handle ++ * ++ * Description: Stops the command service on each connection, ++ * causing DE-INIT messages to be pinged back and forth ++ * ++ * Returns: 0 if successful, failure otherwise ++ * ++ ***********************************************************/ ++int32_t vchi_disconnect(VCHI_INSTANCE_T instance_handle) ++{ ++ VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; ++ return vchiq_status_to_vchi(vchiq_shutdown(instance)); ++} ++EXPORT_SYMBOL(vchi_disconnect); ++ ++ ++/*********************************************************** ++ * Name: vchi_service_open ++ * Name: vchi_service_create ++ * ++ * Arguments: VCHI_INSTANCE_T *instance_handle ++ * SERVICE_CREATION_T *setup, ++ * VCHI_SERVICE_HANDLE_T *handle ++ * ++ * Description: Routine to open a service ++ * ++ * Returns: int32_t - success == 0 ++ * ++ ***********************************************************/ ++ ++static VCHIQ_STATUS_T shim_callback(VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T *header, VCHIQ_SERVICE_HANDLE_T handle, void *bulk_user) ++{ ++ SHIM_SERVICE_T *service = ++ (SHIM_SERVICE_T *)VCHIQ_GET_SERVICE_USERDATA(handle); ++ ++ switch (reason) { ++ case VCHIQ_MESSAGE_AVAILABLE: ++ vchiu_queue_push(&service->queue, header); ++ ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_MSG_AVAILABLE, NULL); ++ break; ++ case VCHIQ_BULK_TRANSMIT_DONE: ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_BULK_SENT, bulk_user); ++ break; ++ case VCHIQ_BULK_RECEIVE_DONE: ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_BULK_RECEIVED, bulk_user); ++ break; ++ case VCHIQ_SERVICE_CLOSED: ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_SERVICE_CLOSED, NULL); ++ break; ++ case VCHIQ_SERVICE_OPENED: ++ /* No equivalent VCHI reason */ ++ break; ++ case VCHIQ_BULK_TRANSMIT_ABORTED: ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_BULK_TRANSMIT_ABORTED, bulk_user); ++ break; ++ case VCHIQ_BULK_RECEIVE_ABORTED: ++ if (service->callback) ++ service->callback(service->callback_param, ++ VCHI_CALLBACK_BULK_RECEIVE_ABORTED, bulk_user); ++ break; ++ default: ++ WARN(1, "not supported\n"); ++ break; ++ } ++ ++ return VCHIQ_SUCCESS; ++} ++ ++static SHIM_SERVICE_T *service_alloc(VCHIQ_INSTANCE_T instance, ++ SERVICE_CREATION_T *setup) ++{ ++ SHIM_SERVICE_T *service = kzalloc(sizeof(SHIM_SERVICE_T), GFP_KERNEL); ++ ++ (void)instance; ++ ++ if (service) { ++ if (vchiu_queue_init(&service->queue, 64)) { ++ service->callback = setup->callback; ++ service->callback_param = setup->callback_param; ++ } else { ++ kfree(service); ++ service = NULL; ++ } ++ } ++ ++ return service; ++} ++ ++static void service_free(SHIM_SERVICE_T *service) ++{ ++ if (service) { ++ vchiu_queue_delete(&service->queue); ++ kfree(service); ++ } ++} ++ ++int32_t vchi_service_open(VCHI_INSTANCE_T instance_handle, ++ SERVICE_CREATION_T *setup, ++ VCHI_SERVICE_HANDLE_T *handle) ++{ ++ VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; ++ SHIM_SERVICE_T *service = service_alloc(instance, setup); ++ if (service) { ++ VCHIQ_SERVICE_PARAMS_T params; ++ VCHIQ_STATUS_T status; ++ ++ memset(¶ms, 0, sizeof(params)); ++ params.fourcc = setup->service_id; ++ params.callback = shim_callback; ++ params.userdata = service; ++ params.version = setup->version.version; ++ params.version_min = setup->version.version_min; ++ ++ status = vchiq_open_service(instance, ¶ms, ++ &service->handle); ++ if (status != VCHIQ_SUCCESS) { ++ service_free(service); ++ service = NULL; ++ } ++ } ++ ++ *handle = (VCHI_SERVICE_HANDLE_T)service; ++ ++ return (service != NULL) ? 0 : -1; ++} ++EXPORT_SYMBOL(vchi_service_open); ++ ++int32_t vchi_service_create(VCHI_INSTANCE_T instance_handle, ++ SERVICE_CREATION_T *setup, ++ VCHI_SERVICE_HANDLE_T *handle) ++{ ++ VCHIQ_INSTANCE_T instance = (VCHIQ_INSTANCE_T)instance_handle; ++ SHIM_SERVICE_T *service = service_alloc(instance, setup); ++ if (service) { ++ VCHIQ_SERVICE_PARAMS_T params; ++ VCHIQ_STATUS_T status; ++ ++ memset(¶ms, 0, sizeof(params)); ++ params.fourcc = setup->service_id; ++ params.callback = shim_callback; ++ params.userdata = service; ++ params.version = setup->version.version; ++ params.version_min = setup->version.version_min; ++ status = vchiq_add_service(instance, ¶ms, &service->handle); ++ ++ if (status != VCHIQ_SUCCESS) { ++ service_free(service); ++ service = NULL; ++ } ++ } ++ ++ *handle = (VCHI_SERVICE_HANDLE_T)service; ++ ++ return (service != NULL) ? 0 : -1; ++} ++EXPORT_SYMBOL(vchi_service_create); ++ ++int32_t vchi_service_close(const VCHI_SERVICE_HANDLE_T handle) ++{ ++ int32_t ret = -1; ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ if (service) { ++ VCHIQ_STATUS_T status = vchiq_close_service(service->handle); ++ if (status == VCHIQ_SUCCESS) { ++ service_free(service); ++ service = NULL; ++ } ++ ++ ret = vchiq_status_to_vchi(status); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(vchi_service_close); ++ ++int32_t vchi_service_destroy(const VCHI_SERVICE_HANDLE_T handle) ++{ ++ int32_t ret = -1; ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ if (service) { ++ VCHIQ_STATUS_T status = vchiq_remove_service(service->handle); ++ if (status == VCHIQ_SUCCESS) { ++ service_free(service); ++ service = NULL; ++ } ++ ++ ret = vchiq_status_to_vchi(status); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(vchi_service_destroy); ++ ++int32_t vchi_get_peer_version( const VCHI_SERVICE_HANDLE_T handle, short *peer_version ) ++{ ++ int32_t ret = -1; ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ if(service) ++ { ++ VCHIQ_STATUS_T status = vchiq_get_peer_version(service->handle, peer_version); ++ ret = vchiq_status_to_vchi( status ); ++ } ++ return ret; ++} ++EXPORT_SYMBOL(vchi_get_peer_version); ++ ++/* ---------------------------------------------------------------------- ++ * read a uint32_t from buffer. ++ * network format is defined to be little endian ++ * -------------------------------------------------------------------- */ ++uint32_t ++vchi_readbuf_uint32(const void *_ptr) ++{ ++ const unsigned char *ptr = _ptr; ++ return ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24); ++} ++ ++/* ---------------------------------------------------------------------- ++ * write a uint32_t to buffer. ++ * network format is defined to be little endian ++ * -------------------------------------------------------------------- */ ++void ++vchi_writebuf_uint32(void *_ptr, uint32_t value) ++{ ++ unsigned char *ptr = _ptr; ++ ptr[0] = (unsigned char)((value >> 0) & 0xFF); ++ ptr[1] = (unsigned char)((value >> 8) & 0xFF); ++ ptr[2] = (unsigned char)((value >> 16) & 0xFF); ++ ptr[3] = (unsigned char)((value >> 24) & 0xFF); ++} ++ ++/* ---------------------------------------------------------------------- ++ * read a uint16_t from buffer. ++ * network format is defined to be little endian ++ * -------------------------------------------------------------------- */ ++uint16_t ++vchi_readbuf_uint16(const void *_ptr) ++{ ++ const unsigned char *ptr = _ptr; ++ return ptr[0] | (ptr[1] << 8); ++} ++ ++/* ---------------------------------------------------------------------- ++ * write a uint16_t into the buffer. ++ * network format is defined to be little endian ++ * -------------------------------------------------------------------- */ ++void ++vchi_writebuf_uint16(void *_ptr, uint16_t value) ++{ ++ unsigned char *ptr = _ptr; ++ ptr[0] = (value >> 0) & 0xFF; ++ ptr[1] = (value >> 8) & 0xFF; ++} ++ ++/*********************************************************** ++ * Name: vchi_service_use ++ * ++ * Arguments: const VCHI_SERVICE_HANDLE_T handle ++ * ++ * Description: Routine to increment refcount on a service ++ * ++ * Returns: void ++ * ++ ***********************************************************/ ++int32_t vchi_service_use(const VCHI_SERVICE_HANDLE_T handle) ++{ ++ int32_t ret = -1; ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ if (service) ++ ret = vchiq_status_to_vchi(vchiq_use_service(service->handle)); ++ return ret; ++} ++EXPORT_SYMBOL(vchi_service_use); ++ ++/*********************************************************** ++ * Name: vchi_service_release ++ * ++ * Arguments: const VCHI_SERVICE_HANDLE_T handle ++ * ++ * Description: Routine to decrement refcount on a service ++ * ++ * Returns: void ++ * ++ ***********************************************************/ ++int32_t vchi_service_release(const VCHI_SERVICE_HANDLE_T handle) ++{ ++ int32_t ret = -1; ++ SHIM_SERVICE_T *service = (SHIM_SERVICE_T *)handle; ++ if (service) ++ ret = vchiq_status_to_vchi( ++ vchiq_release_service(service->handle)); ++ return ret; ++} ++EXPORT_SYMBOL(vchi_service_release); +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_util.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_util.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,151 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include "vchiq_util.h" ++ ++static inline int is_pow2(int i) ++{ ++ return i && !(i & (i - 1)); ++} ++ ++int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size) ++{ ++ WARN_ON(!is_pow2(size)); ++ ++ queue->size = size; ++ queue->read = 0; ++ queue->write = 0; ++ ++ sema_init(&queue->pop, 0); ++ sema_init(&queue->push, 0); ++ ++ queue->storage = kzalloc(size * sizeof(VCHIQ_HEADER_T *), GFP_KERNEL); ++ if (queue->storage == NULL) { ++ vchiu_queue_delete(queue); ++ return 0; ++ } ++ return 1; ++} ++ ++void vchiu_queue_delete(VCHIU_QUEUE_T *queue) ++{ ++ if (queue->storage != NULL) ++ kfree(queue->storage); ++} ++ ++int vchiu_queue_is_empty(VCHIU_QUEUE_T *queue) ++{ ++ return queue->read == queue->write; ++} ++ ++int vchiu_queue_is_full(VCHIU_QUEUE_T *queue) ++{ ++ return queue->write == queue->read + queue->size; ++} ++ ++void vchiu_queue_push(VCHIU_QUEUE_T *queue, VCHIQ_HEADER_T *header) ++{ ++ while (queue->write == queue->read + queue->size) { ++ if (down_interruptible(&queue->pop) != 0) { ++ flush_signals(current); ++ } ++ } ++ ++ /* ++ * Write to queue->storage must be visible after read from ++ * queue->read ++ */ ++ smp_mb(); ++ ++ queue->storage[queue->write & (queue->size - 1)] = header; ++ ++ /* ++ * Write to queue->storage must be visible before write to ++ * queue->write ++ */ ++ smp_wmb(); ++ ++ queue->write++; ++ ++ up(&queue->push); ++} ++ ++VCHIQ_HEADER_T *vchiu_queue_peek(VCHIU_QUEUE_T *queue) ++{ ++ while (queue->write == queue->read) { ++ if (down_interruptible(&queue->push) != 0) { ++ flush_signals(current); ++ } ++ } ++ ++ up(&queue->push); // We haven't removed anything from the queue. ++ ++ /* ++ * Read from queue->storage must be visible after read from ++ * queue->write ++ */ ++ smp_rmb(); ++ ++ return queue->storage[queue->read & (queue->size - 1)]; ++} ++ ++VCHIQ_HEADER_T *vchiu_queue_pop(VCHIU_QUEUE_T *queue) ++{ ++ VCHIQ_HEADER_T *header; ++ ++ while (queue->write == queue->read) { ++ if (down_interruptible(&queue->push) != 0) { ++ flush_signals(current); ++ } ++ } ++ ++ /* ++ * Read from queue->storage must be visible after read from ++ * queue->write ++ */ ++ smp_rmb(); ++ ++ header = queue->storage[queue->read & (queue->size - 1)]; ++ ++ /* ++ * Read from queue->storage must be visible before write to ++ * queue->read ++ */ ++ smp_mb(); ++ ++ queue->read++; ++ ++ up(&queue->pop); ++ ++ return header; ++} +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_util.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_util.h 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,82 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#ifndef VCHIQ_UTIL_H ++#define VCHIQ_UTIL_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include /* for time_t */ ++#include ++#include ++ ++#include "vchiq_if.h" ++ ++typedef struct { ++ int size; ++ int read; ++ int write; ++ ++ struct semaphore pop; ++ struct semaphore push; ++ ++ VCHIQ_HEADER_T **storage; ++} VCHIU_QUEUE_T; ++ ++extern int vchiu_queue_init(VCHIU_QUEUE_T *queue, int size); ++extern void vchiu_queue_delete(VCHIU_QUEUE_T *queue); ++ ++extern int vchiu_queue_is_empty(VCHIU_QUEUE_T *queue); ++extern int vchiu_queue_is_full(VCHIU_QUEUE_T *queue); ++ ++extern void vchiu_queue_push(VCHIU_QUEUE_T *queue, VCHIQ_HEADER_T *header); ++ ++extern VCHIQ_HEADER_T *vchiu_queue_peek(VCHIU_QUEUE_T *queue); ++extern VCHIQ_HEADER_T *vchiu_queue_pop(VCHIU_QUEUE_T *queue); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_version.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/vc04_services/interface/vchiq_arm/vchiq_version.c 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1,59 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++#include "vchiq_build_info.h" ++#include ++ ++VC_DEBUG_DECLARE_STRING_VAR( vchiq_build_hostname, "dc4-arm-01" ); ++VC_DEBUG_DECLARE_STRING_VAR( vchiq_build_version, "9245b4c35b99b3870e1f7dc598c5692b3c66a6f0 (tainted)" ); ++VC_DEBUG_DECLARE_STRING_VAR( vchiq_build_time, __TIME__ ); ++VC_DEBUG_DECLARE_STRING_VAR( vchiq_build_date, __DATE__ ); ++ ++const char *vchiq_get_build_hostname( void ) ++{ ++ return vchiq_build_hostname; ++} ++ ++const char *vchiq_get_build_version( void ) ++{ ++ return vchiq_build_version; ++} ++ ++const char *vchiq_get_build_date( void ) ++{ ++ return vchiq_build_date; ++} ++ ++const char *vchiq_get_build_time( void ) ++{ ++ return vchiq_build_time; ++} +Index: linux-3.10-3.10.11/dummy/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1575_6e071d83898b7165638d959c8732e030a83cbd60.txt 2014-04-28 00:42:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.patch --- linux-3.10.11/debian/patches/rpi/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.patch 2014-04-28 00:42:18.000000000 +0000 @@ -0,0 +1,1279 @@ +commit 1bddcfc76fc58e302c683ac837078c5ad77c6ffe +Author: popcornmix +Date: Wed Jul 3 00:31:47 2013 +0100 + + cma: Add vc_cma driver to enable use of CMA + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/char/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/Kconfig 2014-04-27 23:37:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/Kconfig 2014-04-28 00:42:17.000000000 +0000 +@@ -586,6 +586,8 @@ + + source "drivers/s390/char/Kconfig" + ++source "drivers/char/broadcom/Kconfig" ++ + config MSM_SMD_PKT + bool "Enable device interface for some SMD packet ports" + default n +Index: linux-3.10-3.10.11/drivers/char/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/Makefile 2014-04-27 23:37:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/Makefile 2014-04-28 00:42:17.000000000 +0000 +@@ -62,3 +62,6 @@ + js-rtc-y = rtc.o + + obj-$(CONFIG_TILE_SROM) += tile-srom.o ++ ++obj-$(CONFIG_BRCM_CHAR_DRIVERS) += broadcom/ ++ +Index: linux-3.10-3.10.11/drivers/char/broadcom/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/broadcom/Kconfig 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1,16 @@ ++# ++# Broadcom char driver config ++# ++ ++menuconfig BRCM_CHAR_DRIVERS ++ bool "Broadcom Char Drivers" ++ help ++ Broadcom's char drivers ++ ++config BCM_VC_CMA ++ bool "Videocore CMA" ++ depends on CMA && BRCM_CHAR_DRIVERS ++ default n ++ help ++ Helper for videocore CMA access. ++ +Index: linux-3.10-3.10.11/drivers/char/broadcom/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/broadcom/Makefile 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1,2 @@ ++obj-$(CONFIG_BCM_VC_CMA) += vc_cma/ ++ +Index: linux-3.10-3.10.11/drivers/char/broadcom/vc_cma/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/broadcom/vc_cma/Makefile 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1,15 @@ ++EXTRA_CFLAGS += -Wall -Wstrict-prototypes -Wno-trigraphs ++EXTRA_CFLAGS += -Werror ++EXTRA_CFLAGS += -I"include/linux/broadcom" ++EXTRA_CFLAGS += -I"drivers/misc/vc04_services" ++EXTRA_CFLAGS += -I"drivers/misc/vc04_services/interface/vchi" ++EXTRA_CFLAGS += -I"drivers/misc/vc04_services/interface/vchiq_arm" ++ ++EXTRA_CFLAGS += -D__KERNEL__ ++EXTRA_CFLAGS += -D__linux__ ++EXTRA_CFLAGS += -Werror ++ ++obj-$(CONFIG_BCM_VC_CMA) += vc-cma.o ++ ++vc-cma-objs := vc_cma.o ++ +Index: linux-3.10-3.10.11/drivers/char/broadcom/vc_cma/vc_cma.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/broadcom/vc_cma/vc_cma.c 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1,1143 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "vc_cma.h" ++ ++#include "vchiq_util.h" ++#include "vchiq_connected.h" ++//#include "debug_sym.h" ++//#include "vc_mem.h" ++ ++#define DRIVER_NAME "vc-cma" ++ ++#define LOG_DBG(fmt, ...) \ ++ if (vc_cma_debug) \ ++ printk(KERN_INFO fmt "\n", ##__VA_ARGS__) ++#define LOG_ERR(fmt, ...) \ ++ printk(KERN_ERR fmt "\n", ##__VA_ARGS__) ++ ++#define VC_CMA_FOURCC VCHIQ_MAKE_FOURCC('C', 'M', 'A', ' ') ++#define VC_CMA_VERSION 2 ++ ++#define VC_CMA_CHUNK_ORDER 6 /* 256K */ ++#define VC_CMA_CHUNK_SIZE (4096 << VC_CMA_CHUNK_ORDER) ++#define VC_CMA_MAX_PARAMS_PER_MSG \ ++ ((VCHIQ_MAX_MSG_SIZE - sizeof(unsigned short))/sizeof(unsigned short)) ++#define VC_CMA_RESERVE_COUNT_MAX 16 ++ ++#define PAGES_PER_CHUNK (VC_CMA_CHUNK_SIZE / PAGE_SIZE) ++ ++#define VCADDR_TO_PHYSADDR(vcaddr) (mm_vc_mem_phys_addr + vcaddr) ++ ++#define loud_error(...) \ ++ LOG_ERR("===== " __VA_ARGS__) ++ ++enum { ++ VC_CMA_MSG_QUIT, ++ VC_CMA_MSG_OPEN, ++ VC_CMA_MSG_TICK, ++ VC_CMA_MSG_ALLOC, /* chunk count */ ++ VC_CMA_MSG_FREE, /* chunk, chunk, ... */ ++ VC_CMA_MSG_ALLOCATED, /* chunk, chunk, ... */ ++ VC_CMA_MSG_REQUEST_ALLOC, /* chunk count */ ++ VC_CMA_MSG_REQUEST_FREE, /* chunk count */ ++ VC_CMA_MSG_RESERVE, /* bytes lo, bytes hi */ ++ VC_CMA_MSG_UPDATE_RESERVE, ++ VC_CMA_MSG_MAX ++}; ++ ++struct cma_msg { ++ unsigned short type; ++ unsigned short params[VC_CMA_MAX_PARAMS_PER_MSG]; ++}; ++ ++struct vc_cma_reserve_user { ++ unsigned int pid; ++ unsigned int reserve; ++}; ++ ++/* Device (/dev) related variables */ ++static dev_t vc_cma_devnum; ++static struct class *vc_cma_class; ++static struct cdev vc_cma_cdev; ++static int vc_cma_inited; ++static int vc_cma_debug; ++ ++/* Proc entry */ ++static struct proc_dir_entry *vc_cma_proc_entry; ++ ++phys_addr_t vc_cma_base; ++struct page *vc_cma_base_page; ++unsigned int vc_cma_size; ++EXPORT_SYMBOL(vc_cma_size); ++unsigned int vc_cma_initial; ++unsigned int vc_cma_chunks; ++unsigned int vc_cma_chunks_used; ++unsigned int vc_cma_chunks_reserved; ++ ++static int in_loud_error; ++ ++unsigned int vc_cma_reserve_total; ++unsigned int vc_cma_reserve_count; ++struct vc_cma_reserve_user vc_cma_reserve_users[VC_CMA_RESERVE_COUNT_MAX]; ++static DEFINE_SEMAPHORE(vc_cma_reserve_mutex); ++static DEFINE_SEMAPHORE(vc_cma_worker_queue_push_mutex); ++ ++static u64 vc_cma_dma_mask = DMA_BIT_MASK(32); ++static struct platform_device vc_cma_device = { ++ .name = "vc-cma", ++ .id = 0, ++ .dev = { ++ .dma_mask = &vc_cma_dma_mask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++static VCHIQ_INSTANCE_T cma_instance; ++static VCHIQ_SERVICE_HANDLE_T cma_service; ++static VCHIU_QUEUE_T cma_msg_queue; ++static struct task_struct *cma_worker; ++ ++static int vc_cma_set_reserve(unsigned int reserve, unsigned int pid); ++static int vc_cma_alloc_chunks(int num_chunks, struct cma_msg *reply); ++static VCHIQ_STATUS_T cma_service_callback(VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T * header, ++ VCHIQ_SERVICE_HANDLE_T service, ++ void *bulk_userdata); ++static void send_vc_msg(unsigned short type, ++ unsigned short param1, unsigned short param2); ++static bool send_worker_msg(VCHIQ_HEADER_T * msg); ++ ++static int early_vc_cma_mem(char *p) ++{ ++ unsigned int new_size; ++ printk(KERN_NOTICE "early_vc_cma_mem(%s)", p); ++ vc_cma_size = memparse(p, &p); ++ vc_cma_initial = vc_cma_size; ++ if (*p == '/') ++ vc_cma_size = memparse(p + 1, &p); ++ if (*p == '@') ++ vc_cma_base = memparse(p + 1, &p); ++ ++ new_size = (vc_cma_size - ((-vc_cma_base) & (VC_CMA_CHUNK_SIZE - 1))) ++ & ~(VC_CMA_CHUNK_SIZE - 1); ++ if (new_size > vc_cma_size) ++ vc_cma_size = 0; ++ vc_cma_initial = (vc_cma_initial + VC_CMA_CHUNK_SIZE - 1) ++ & ~(VC_CMA_CHUNK_SIZE - 1); ++ if (vc_cma_initial > vc_cma_size) ++ vc_cma_initial = vc_cma_size; ++ vc_cma_base = (vc_cma_base + VC_CMA_CHUNK_SIZE - 1) ++ & ~(VC_CMA_CHUNK_SIZE - 1); ++ ++ printk(KERN_NOTICE " -> initial %x, size %x, base %x", vc_cma_initial, ++ vc_cma_size, (unsigned int)vc_cma_base); ++ ++ return 0; ++} ++ ++early_param("vc-cma-mem", early_vc_cma_mem); ++ ++void vc_cma_early_init(void) ++{ ++ LOG_DBG("vc_cma_early_init - vc_cma_chunks = %d", vc_cma_chunks); ++ if (vc_cma_size) { ++ int rc = platform_device_register(&vc_cma_device); ++ LOG_DBG("platform_device_register -> %d", rc); ++ } ++} ++ ++void vc_cma_reserve(void) ++{ ++ /* if vc_cma_size is set, then declare vc CMA area of the same ++ * size from the end of memory ++ */ ++ if (vc_cma_size) { ++ if (dma_declare_contiguous(NULL /*&vc_cma_device.dev*/, vc_cma_size, ++ vc_cma_base, 0) == 0) { ++ } else { ++ LOG_ERR("vc_cma: dma_declare_contiguous(%x,%x) failed", ++ vc_cma_size, (unsigned int)vc_cma_base); ++ vc_cma_size = 0; ++ } ++ } ++ vc_cma_chunks = vc_cma_size / VC_CMA_CHUNK_SIZE; ++} ++ ++/**************************************************************************** ++* ++* vc_cma_open ++* ++***************************************************************************/ ++ ++static int vc_cma_open(struct inode *inode, struct file *file) ++{ ++ (void)inode; ++ (void)file; ++ ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vc_cma_release ++* ++***************************************************************************/ ++ ++static int vc_cma_release(struct inode *inode, struct file *file) ++{ ++ (void)inode; ++ (void)file; ++ ++ vc_cma_set_reserve(0, current->tgid); ++ ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vc_cma_ioctl ++* ++***************************************************************************/ ++ ++static long vc_cma_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int rc = 0; ++ ++ (void)cmd; ++ (void)arg; ++ ++ switch (cmd) { ++ case VC_CMA_IOC_RESERVE: ++ rc = vc_cma_set_reserve((unsigned int)arg, current->tgid); ++ if (rc >= 0) ++ rc = 0; ++ break; ++ default: ++ LOG_ERR("vc-cma: Unknown ioctl %x", cmd); ++ return -ENOTTY; ++ } ++ ++ return rc; ++} ++ ++/**************************************************************************** ++* ++* File Operations for the driver. ++* ++***************************************************************************/ ++ ++static const struct file_operations vc_cma_fops = { ++ .owner = THIS_MODULE, ++ .open = vc_cma_open, ++ .release = vc_cma_release, ++ .unlocked_ioctl = vc_cma_ioctl, ++}; ++ ++/**************************************************************************** ++* ++* vc_cma_proc_open ++* ++***************************************************************************/ ++ ++static int vc_cma_show_info(struct seq_file *m, void *v) ++{ ++ int i; ++ ++ seq_printf(m, "Videocore CMA:\n"); ++ seq_printf(m, " Base : %08x\n", (unsigned int)vc_cma_base); ++ seq_printf(m, " Length : %08x\n", vc_cma_size); ++ seq_printf(m, " Initial : %08x\n", vc_cma_initial); ++ seq_printf(m, " Chunk size : %08x\n", VC_CMA_CHUNK_SIZE); ++ seq_printf(m, " Chunks : %4d (%d bytes)\n", ++ (int)vc_cma_chunks, ++ (int)(vc_cma_chunks * VC_CMA_CHUNK_SIZE)); ++ seq_printf(m, " Used : %4d (%d bytes)\n", ++ (int)vc_cma_chunks_used, ++ (int)(vc_cma_chunks_used * VC_CMA_CHUNK_SIZE)); ++ seq_printf(m, " Reserved : %4d (%d bytes)\n", ++ (unsigned int)vc_cma_chunks_reserved, ++ (int)(vc_cma_chunks_reserved * VC_CMA_CHUNK_SIZE)); ++ ++ for (i = 0; i < vc_cma_reserve_count; i++) { ++ struct vc_cma_reserve_user *user = &vc_cma_reserve_users[i]; ++ seq_printf(m, " PID %5d: %d bytes\n", user->pid, ++ user->reserve); ++ } ++ ++ seq_printf(m, "\n"); ++ ++ return 0; ++} ++ ++static int vc_cma_proc_open(struct inode *inode, struct file *file) ++{ ++ return single_open(file, vc_cma_show_info, NULL); ++} ++ ++/**************************************************************************** ++* ++* vc_cma_proc_write ++* ++***************************************************************************/ ++ ++static int vc_cma_proc_write(struct file *file, ++ const char __user *buffer, ++ size_t size, loff_t *ppos) ++{ ++ int rc = -EFAULT; ++ char input_str[20]; ++ ++ memset(input_str, 0, sizeof(input_str)); ++ ++ if (size > sizeof(input_str)) { ++ LOG_ERR("%s: input string length too long", __func__); ++ goto out; ++ } ++ ++ if (copy_from_user(input_str, buffer, size - 1)) { ++ LOG_ERR("%s: failed to get input string", __func__); ++ goto out; ++ } ++#define ALLOC_STR "alloc" ++#define FREE_STR "free" ++#define DEBUG_STR "debug" ++#define RESERVE_STR "reserve" ++ if (strncmp(input_str, ALLOC_STR, strlen(ALLOC_STR)) == 0) { ++ int size; ++ char *p = input_str + strlen(ALLOC_STR); ++ ++ while (*p == ' ') ++ p++; ++ size = memparse(p, NULL); ++ LOG_ERR("/proc/vc-cma: alloc %d", size); ++ if (size) ++ send_vc_msg(VC_CMA_MSG_REQUEST_FREE, ++ size / VC_CMA_CHUNK_SIZE, 0); ++ else ++ LOG_ERR("invalid size '%s'", p); ++ rc = size; ++ } else if (strncmp(input_str, FREE_STR, strlen(FREE_STR)) == 0) { ++ int size; ++ char *p = input_str + strlen(FREE_STR); ++ ++ while (*p == ' ') ++ p++; ++ size = memparse(p, NULL); ++ LOG_ERR("/proc/vc-cma: free %d", size); ++ if (size) ++ send_vc_msg(VC_CMA_MSG_REQUEST_ALLOC, ++ size / VC_CMA_CHUNK_SIZE, 0); ++ else ++ LOG_ERR("invalid size '%s'", p); ++ rc = size; ++ } else if (strncmp(input_str, DEBUG_STR, strlen(DEBUG_STR)) == 0) { ++ char *p = input_str + strlen(DEBUG_STR); ++ while (*p == ' ') ++ p++; ++ if ((strcmp(p, "on") == 0) || (strcmp(p, "1") == 0)) ++ vc_cma_debug = 1; ++ else if ((strcmp(p, "off") == 0) || (strcmp(p, "0") == 0)) ++ vc_cma_debug = 0; ++ LOG_ERR("/proc/vc-cma: debug %s", vc_cma_debug ? "on" : "off"); ++ rc = size; ++ } else if (strncmp(input_str, RESERVE_STR, strlen(RESERVE_STR)) == 0) { ++ int size; ++ int reserved; ++ char *p = input_str + strlen(RESERVE_STR); ++ while (*p == ' ') ++ p++; ++ size = memparse(p, NULL); ++ ++ reserved = vc_cma_set_reserve(size, current->tgid); ++ rc = (reserved >= 0) ? size : reserved; ++ } ++ ++out: ++ return rc; ++} ++ ++/**************************************************************************** ++* ++* File Operations for /proc interface. ++* ++***************************************************************************/ ++ ++static const struct file_operations vc_cma_proc_fops = { ++ .open = vc_cma_proc_open, ++ .read = seq_read, ++ .write = vc_cma_proc_write, ++ .llseek = seq_lseek, ++ .release = single_release ++}; ++ ++static int vc_cma_set_reserve(unsigned int reserve, unsigned int pid) ++{ ++ struct vc_cma_reserve_user *user = NULL; ++ int delta = 0; ++ int i; ++ ++ if (down_interruptible(&vc_cma_reserve_mutex)) ++ return -ERESTARTSYS; ++ ++ for (i = 0; i < vc_cma_reserve_count; i++) { ++ if (pid == vc_cma_reserve_users[i].pid) { ++ user = &vc_cma_reserve_users[i]; ++ delta = reserve - user->reserve; ++ if (reserve) ++ user->reserve = reserve; ++ else { ++ /* Remove this entry by copying downwards */ ++ while ((i + 1) < vc_cma_reserve_count) { ++ user[0].pid = user[1].pid; ++ user[0].reserve = user[1].reserve; ++ user++; ++ i++; ++ } ++ vc_cma_reserve_count--; ++ user = NULL; ++ } ++ break; ++ } ++ } ++ ++ if (reserve && !user) { ++ if (vc_cma_reserve_count == VC_CMA_RESERVE_COUNT_MAX) { ++ LOG_ERR("vc-cma: Too many reservations - " ++ "increase CMA_RESERVE_COUNT_MAX"); ++ up(&vc_cma_reserve_mutex); ++ return -EBUSY; ++ } ++ user = &vc_cma_reserve_users[vc_cma_reserve_count]; ++ user->pid = pid; ++ user->reserve = reserve; ++ delta = reserve; ++ vc_cma_reserve_count++; ++ } ++ ++ vc_cma_reserve_total += delta; ++ ++ send_vc_msg(VC_CMA_MSG_RESERVE, ++ vc_cma_reserve_total & 0xffff, vc_cma_reserve_total >> 16); ++ ++ send_worker_msg((VCHIQ_HEADER_T *) VC_CMA_MSG_UPDATE_RESERVE); ++ ++ LOG_DBG("/proc/vc-cma: reserve %d (PID %d) - total %u", ++ reserve, pid, vc_cma_reserve_total); ++ ++ up(&vc_cma_reserve_mutex); ++ ++ return vc_cma_reserve_total; ++} ++ ++static VCHIQ_STATUS_T cma_service_callback(VCHIQ_REASON_T reason, ++ VCHIQ_HEADER_T * header, ++ VCHIQ_SERVICE_HANDLE_T service, ++ void *bulk_userdata) ++{ ++ switch (reason) { ++ case VCHIQ_MESSAGE_AVAILABLE: ++ if (!send_worker_msg(header)) ++ return VCHIQ_RETRY; ++ break; ++ case VCHIQ_SERVICE_CLOSED: ++ LOG_DBG("CMA service closed"); ++ break; ++ default: ++ LOG_ERR("Unexpected CMA callback reason %d", reason); ++ break; ++ } ++ return VCHIQ_SUCCESS; ++} ++ ++static void send_vc_msg(unsigned short type, ++ unsigned short param1, unsigned short param2) ++{ ++ unsigned short msg[] = { type, param1, param2 }; ++ VCHIQ_ELEMENT_T elem = { &msg, sizeof(msg) }; ++ VCHIQ_STATUS_T ret; ++ vchiq_use_service(cma_service); ++ ret = vchiq_queue_message(cma_service, &elem, 1); ++ vchiq_release_service(cma_service); ++ if (ret != VCHIQ_SUCCESS) ++ LOG_ERR("vchiq_queue_message returned %x", ret); ++} ++ ++static bool send_worker_msg(VCHIQ_HEADER_T * msg) ++{ ++ if (down_interruptible(&vc_cma_worker_queue_push_mutex)) ++ return false; ++ vchiu_queue_push(&cma_msg_queue, msg); ++ up(&vc_cma_worker_queue_push_mutex); ++ return true; ++} ++ ++static int vc_cma_alloc_chunks(int num_chunks, struct cma_msg *reply) ++{ ++ int i; ++ for (i = 0; i < num_chunks; i++) { ++ struct page *chunk; ++ unsigned int chunk_num; ++ uint8_t *chunk_addr; ++ size_t chunk_size = PAGES_PER_CHUNK << PAGE_SHIFT; ++ ++ chunk = dma_alloc_from_contiguous(NULL /*&vc_cma_device.dev*/, ++ PAGES_PER_CHUNK, ++ VC_CMA_CHUNK_ORDER); ++ if (!chunk) ++ break; ++ ++ chunk_addr = page_address(chunk); ++ dmac_flush_range(chunk_addr, chunk_addr + chunk_size); ++ outer_inv_range(__pa(chunk_addr), __pa(chunk_addr) + ++ chunk_size); ++ ++ chunk_num = ++ (page_to_phys(chunk) - vc_cma_base) / VC_CMA_CHUNK_SIZE; ++ BUG_ON(((page_to_phys(chunk) - vc_cma_base) % ++ VC_CMA_CHUNK_SIZE) != 0); ++ if (chunk_num >= vc_cma_chunks) { ++ LOG_ERR("%s: ===============================", ++ __func__); ++ LOG_ERR("%s: chunk phys %x, vc_cma %x-%x - " ++ "bad SPARSEMEM configuration?", ++ __func__, (unsigned int)page_to_phys(chunk), ++ vc_cma_base, vc_cma_base + vc_cma_size - 1); ++ LOG_ERR("%s: dev->cma_area = %p\n", __func__, ++ vc_cma_device.dev.cma_area); ++ LOG_ERR("%s: ===============================", ++ __func__); ++ break; ++ } ++ reply->params[i] = chunk_num; ++ vc_cma_chunks_used++; ++ } ++ ++ if (i < num_chunks) { ++ LOG_ERR("%s: dma_alloc_from_contiguous failed " ++ "for %x bytes (alloc %d of %d, %d free)", ++ __func__, VC_CMA_CHUNK_SIZE, i, ++ num_chunks, vc_cma_chunks - vc_cma_chunks_used); ++ num_chunks = i; ++ } ++ ++ LOG_DBG("CMA allocated %d chunks -> %d used", ++ num_chunks, vc_cma_chunks_used); ++ reply->type = VC_CMA_MSG_ALLOCATED; ++ ++ { ++ VCHIQ_ELEMENT_T elem = { ++ reply, ++ offsetof(struct cma_msg, params[0]) + ++ num_chunks * sizeof(reply->params[0]) ++ }; ++ VCHIQ_STATUS_T ret; ++ vchiq_use_service(cma_service); ++ ret = vchiq_queue_message(cma_service, &elem, 1); ++ vchiq_release_service(cma_service); ++ if (ret != VCHIQ_SUCCESS) ++ LOG_ERR("vchiq_queue_message return " "%x", ret); ++ } ++ ++ return num_chunks; ++} ++ ++static int cma_worker_proc(void *param) ++{ ++ static struct cma_msg reply; ++ (void)param; ++ ++ while (1) { ++ VCHIQ_HEADER_T *msg; ++ static struct cma_msg msg_copy; ++ struct cma_msg *cma_msg = &msg_copy; ++ int type, msg_size; ++ ++ msg = vchiu_queue_pop(&cma_msg_queue); ++ if ((unsigned int)msg >= VC_CMA_MSG_MAX) { ++ msg_size = msg->size; ++ memcpy(&msg_copy, msg->data, msg_size); ++ type = cma_msg->type; ++ vchiq_release_message(cma_service, msg); ++ } else { ++ msg_size = 0; ++ type = (int)msg; ++ if (type == VC_CMA_MSG_QUIT) ++ break; ++ else if (type == VC_CMA_MSG_UPDATE_RESERVE) { ++ msg = NULL; ++ cma_msg = NULL; ++ } else { ++ BUG(); ++ continue; ++ } ++ } ++ ++ switch (type) { ++ case VC_CMA_MSG_ALLOC:{ ++ int num_chunks, free_chunks; ++ num_chunks = cma_msg->params[0]; ++ free_chunks = ++ vc_cma_chunks - vc_cma_chunks_used; ++ LOG_DBG("CMA_MSG_ALLOC(%d chunks)", num_chunks); ++ if (num_chunks > VC_CMA_MAX_PARAMS_PER_MSG) { ++ LOG_ERR ++ ("CMA_MSG_ALLOC - chunk count (%d) " ++ "exceeds VC_CMA_MAX_PARAMS_PER_MSG (%d)", ++ num_chunks, ++ VC_CMA_MAX_PARAMS_PER_MSG); ++ num_chunks = VC_CMA_MAX_PARAMS_PER_MSG; ++ } ++ ++ if (num_chunks > free_chunks) { ++ LOG_ERR ++ ("CMA_MSG_ALLOC - chunk count (%d) " ++ "exceeds free chunks (%d)", ++ num_chunks, free_chunks); ++ num_chunks = free_chunks; ++ } ++ ++ vc_cma_alloc_chunks(num_chunks, &reply); ++ } ++ break; ++ ++ case VC_CMA_MSG_FREE:{ ++ int chunk_count = ++ (msg_size - ++ offsetof(struct cma_msg, ++ params)) / ++ sizeof(cma_msg->params[0]); ++ int i; ++ BUG_ON(chunk_count <= 0); ++ ++ LOG_DBG("CMA_MSG_FREE(%d chunks - %x, ...)", ++ chunk_count, cma_msg->params[0]); ++ for (i = 0; i < chunk_count; i++) { ++ int chunk_num = cma_msg->params[i]; ++ struct page *page = vc_cma_base_page + ++ chunk_num * PAGES_PER_CHUNK; ++ if (chunk_num >= vc_cma_chunks) { ++ LOG_ERR ++ ("CMA_MSG_FREE - chunk %d of %d" ++ " (value %x) exceeds maximum " ++ "(%x)", i, chunk_count, ++ chunk_num, ++ vc_cma_chunks - 1); ++ break; ++ } ++ ++ if (!dma_release_from_contiguous ++ (NULL /*&vc_cma_device.dev*/, page, ++ PAGES_PER_CHUNK)) { ++ LOG_ERR ++ ("CMA_MSG_FREE - failed to " ++ "release chunk %d (phys %x, " ++ "page %x)", chunk_num, ++ page_to_phys(page), ++ (unsigned int)page); ++ } ++ vc_cma_chunks_used--; ++ } ++ LOG_DBG("CMA released %d chunks -> %d used", ++ i, vc_cma_chunks_used); ++ } ++ break; ++ ++ case VC_CMA_MSG_UPDATE_RESERVE:{ ++ int chunks_needed = ++ ((vc_cma_reserve_total + VC_CMA_CHUNK_SIZE - ++ 1) ++ / VC_CMA_CHUNK_SIZE) - ++ vc_cma_chunks_reserved; ++ ++ LOG_DBG ++ ("CMA_MSG_UPDATE_RESERVE(%d chunks needed)", ++ chunks_needed); ++ ++ /* Cap the reservations to what is available */ ++ if (chunks_needed > 0) { ++ if (chunks_needed > ++ (vc_cma_chunks - ++ vc_cma_chunks_used)) ++ chunks_needed = ++ (vc_cma_chunks - ++ vc_cma_chunks_used); ++ ++ chunks_needed = ++ vc_cma_alloc_chunks(chunks_needed, ++ &reply); ++ } ++ ++ LOG_DBG ++ ("CMA_MSG_UPDATE_RESERVE(%d chunks allocated)", ++ chunks_needed); ++ vc_cma_chunks_reserved += chunks_needed; ++ } ++ break; ++ ++ default: ++ LOG_ERR("unexpected msg type %d", type); ++ break; ++ } ++ } ++ ++ LOG_DBG("quitting..."); ++ return 0; ++} ++ ++/**************************************************************************** ++* ++* vc_cma_connected_init ++* ++* This function is called once the videocore has been connected. ++* ++***************************************************************************/ ++ ++static void vc_cma_connected_init(void) ++{ ++ VCHIQ_SERVICE_PARAMS_T service_params; ++ ++ LOG_DBG("vc_cma_connected_init"); ++ ++ if (!vchiu_queue_init(&cma_msg_queue, 16)) { ++ LOG_ERR("could not create CMA msg queue"); ++ goto fail_queue; ++ } ++ ++ if (vchiq_initialise(&cma_instance) != VCHIQ_SUCCESS) ++ goto fail_vchiq_init; ++ ++ vchiq_connect(cma_instance); ++ ++ service_params.fourcc = VC_CMA_FOURCC; ++ service_params.callback = cma_service_callback; ++ service_params.userdata = NULL; ++ service_params.version = VC_CMA_VERSION; ++ service_params.version_min = VC_CMA_VERSION; ++ ++ if (vchiq_open_service(cma_instance, &service_params, ++ &cma_service) != VCHIQ_SUCCESS) { ++ LOG_ERR("failed to open service - already in use?"); ++ goto fail_vchiq_open; ++ } ++ ++ vchiq_release_service(cma_service); ++ ++ cma_worker = kthread_create(cma_worker_proc, NULL, "cma_worker"); ++ if (!cma_worker) { ++ LOG_ERR("could not create CMA worker thread"); ++ goto fail_worker; ++ } ++ set_user_nice(cma_worker, -20); ++ wake_up_process(cma_worker); ++ ++ return; ++ ++fail_worker: ++ vchiq_close_service(cma_service); ++fail_vchiq_open: ++ vchiq_shutdown(cma_instance); ++fail_vchiq_init: ++ vchiu_queue_delete(&cma_msg_queue); ++fail_queue: ++ return; ++} ++ ++void ++loud_error_header(void) ++{ ++ if (in_loud_error) ++ return; ++ ++ LOG_ERR("============================================================" ++ "================"); ++ LOG_ERR("============================================================" ++ "================"); ++ LOG_ERR("====="); ++ ++ in_loud_error = 1; ++} ++ ++void ++loud_error_footer(void) ++{ ++ if (!in_loud_error) ++ return; ++ ++ LOG_ERR("====="); ++ LOG_ERR("============================================================" ++ "================"); ++ LOG_ERR("============================================================" ++ "================"); ++ ++ in_loud_error = 0; ++} ++ ++#if 1 ++static int check_cma_config(void) { return 1; } ++#else ++static int ++read_vc_debug_var(VC_MEM_ACCESS_HANDLE_T handle, ++ const char *symbol, ++ void *buf, size_t bufsize) ++{ ++ VC_MEM_ADDR_T vcMemAddr; ++ size_t vcMemSize; ++ uint8_t *mapAddr; ++ off_t vcMapAddr; ++ ++ if (!LookupVideoCoreSymbol(handle, symbol, ++ &vcMemAddr, ++ &vcMemSize)) { ++ loud_error_header(); ++ loud_error( ++ "failed to find VC symbol \"%s\".", ++ symbol); ++ loud_error_footer(); ++ return 0; ++ } ++ ++ if (vcMemSize != bufsize) { ++ loud_error_header(); ++ loud_error( ++ "VC symbol \"%s\" is the wrong size.", ++ symbol); ++ loud_error_footer(); ++ return 0; ++ } ++ ++ vcMapAddr = (off_t)vcMemAddr & VC_MEM_TO_ARM_ADDR_MASK; ++ vcMapAddr += mm_vc_mem_phys_addr; ++ mapAddr = ioremap_nocache(vcMapAddr, vcMemSize); ++ if (mapAddr == 0) { ++ loud_error_header(); ++ loud_error( ++ "failed to ioremap \"%s\" @ 0x%x " ++ "(phys: 0x%x, size: %u).", ++ symbol, ++ (unsigned int)vcMapAddr, ++ (unsigned int)vcMemAddr, ++ (unsigned int)vcMemSize); ++ loud_error_footer(); ++ return 0; ++ } ++ ++ memcpy(buf, mapAddr, bufsize); ++ iounmap(mapAddr); ++ ++ return 1; ++} ++ ++ ++static int ++check_cma_config(void) ++{ ++ VC_MEM_ACCESS_HANDLE_T mem_hndl; ++ VC_MEM_ADDR_T mempool_start; ++ VC_MEM_ADDR_T mempool_end; ++ VC_MEM_ADDR_T mempool_offline_start; ++ VC_MEM_ADDR_T mempool_offline_end; ++ VC_MEM_ADDR_T cam_alloc_base; ++ VC_MEM_ADDR_T cam_alloc_size; ++ VC_MEM_ADDR_T cam_alloc_end; ++ int success = 0; ++ ++ if (OpenVideoCoreMemory(&mem_hndl) != 0) ++ goto out; ++ ++ /* Read the relevant VideoCore variables */ ++ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_START", ++ &mempool_start, ++ sizeof(mempool_start))) ++ goto close; ++ ++ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_END", ++ &mempool_end, ++ sizeof(mempool_end))) ++ goto close; ++ ++ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_OFFLINE_START", ++ &mempool_offline_start, ++ sizeof(mempool_offline_start))) ++ goto close; ++ ++ if (!read_vc_debug_var(mem_hndl, "__MEMPOOL_OFFLINE_END", ++ &mempool_offline_end, ++ sizeof(mempool_offline_end))) ++ goto close; ++ ++ if (!read_vc_debug_var(mem_hndl, "cam_alloc_base", ++ &cam_alloc_base, ++ sizeof(cam_alloc_base))) ++ goto close; ++ ++ if (!read_vc_debug_var(mem_hndl, "cam_alloc_size", ++ &cam_alloc_size, ++ sizeof(cam_alloc_size))) ++ goto close; ++ ++ cam_alloc_end = cam_alloc_base + cam_alloc_size; ++ ++ success = 1; ++ ++ /* Now the sanity checks */ ++ if (!mempool_offline_start) ++ mempool_offline_start = mempool_start; ++ if (!mempool_offline_end) ++ mempool_offline_end = mempool_end; ++ ++ if (VCADDR_TO_PHYSADDR(mempool_offline_start) != vc_cma_base) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_OFFLINE_START(%x -> %lx) doesn't match " ++ "vc_cma_base(%x)", ++ mempool_offline_start, ++ VCADDR_TO_PHYSADDR(mempool_offline_start), ++ vc_cma_base); ++ success = 0; ++ } ++ ++ if (VCADDR_TO_PHYSADDR(mempool_offline_end) != ++ (vc_cma_base + vc_cma_size)) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_OFFLINE_END(%x -> %lx) doesn't match " ++ "vc_cma_base(%x) + vc_cma_size(%x) = %x", ++ mempool_offline_start, ++ VCADDR_TO_PHYSADDR(mempool_offline_end), ++ vc_cma_base, vc_cma_size, vc_cma_base + vc_cma_size); ++ success = 0; ++ } ++ ++ if (mempool_end < mempool_start) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_END(%x) must not be before " ++ "__MEMPOOL_START(%x)", ++ mempool_end, ++ mempool_start); ++ success = 0; ++ } ++ ++ if (mempool_offline_end < mempool_offline_start) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_OFFLINE_END(%x) must not be before " ++ "__MEMPOOL_OFFLINE_START(%x)", ++ mempool_offline_end, ++ mempool_offline_start); ++ success = 0; ++ } ++ ++ if (mempool_offline_start < mempool_start) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_OFFLINE_START(%x) must not be before " ++ "__MEMPOOL_START(%x)", ++ mempool_offline_start, ++ mempool_start); ++ success = 0; ++ } ++ ++ if (mempool_offline_end > mempool_end) { ++ loud_error_header(); ++ loud_error( ++ "__MEMPOOL_OFFLINE_END(%x) must not be after " ++ "__MEMPOOL_END(%x)", ++ mempool_offline_end, ++ mempool_end); ++ success = 0; ++ } ++ ++ if ((cam_alloc_base < mempool_end) && ++ (cam_alloc_end > mempool_start)) { ++ loud_error_header(); ++ loud_error( ++ "cam_alloc pool(%x-%x) overlaps " ++ "mempool(%x-%x)", ++ cam_alloc_base, cam_alloc_end, ++ mempool_start, mempool_end); ++ success = 0; ++ } ++ ++ loud_error_footer(); ++ ++close: ++ CloseVideoCoreMemory(mem_hndl); ++ ++out: ++ return success; ++} ++#endif ++ ++static int vc_cma_init(void) ++{ ++ int rc = -EFAULT; ++ struct device *dev; ++ ++ if (!check_cma_config()) ++ goto out_release; ++ ++ printk(KERN_INFO "vc-cma: Videocore CMA driver\n"); ++ printk(KERN_INFO "vc-cma: vc_cma_base = 0x%08x\n", vc_cma_base); ++ printk(KERN_INFO "vc-cma: vc_cma_size = 0x%08x (%u MiB)\n", ++ vc_cma_size, vc_cma_size / (1024 * 1024)); ++ printk(KERN_INFO "vc-cma: vc_cma_initial = 0x%08x (%u MiB)\n", ++ vc_cma_initial, vc_cma_initial / (1024 * 1024)); ++ ++ vc_cma_base_page = phys_to_page(vc_cma_base); ++ ++ if (vc_cma_chunks) { ++ int chunks_needed = vc_cma_initial / VC_CMA_CHUNK_SIZE; ++ ++ for (vc_cma_chunks_used = 0; ++ vc_cma_chunks_used < chunks_needed; vc_cma_chunks_used++) { ++ struct page *chunk; ++ chunk = dma_alloc_from_contiguous(NULL /*&vc_cma_device.dev*/, ++ PAGES_PER_CHUNK, ++ VC_CMA_CHUNK_ORDER); ++ if (!chunk) ++ break; ++ BUG_ON(((page_to_phys(chunk) - vc_cma_base) % ++ VC_CMA_CHUNK_SIZE) != 0); ++ } ++ if (vc_cma_chunks_used != chunks_needed) { ++ LOG_ERR("%s: dma_alloc_from_contiguous failed (%d " ++ "bytes, allocation %d of %d)", ++ __func__, VC_CMA_CHUNK_SIZE, ++ vc_cma_chunks_used, chunks_needed); ++ goto out_release; ++ } ++ ++ vchiq_add_connected_callback(vc_cma_connected_init); ++ } ++ ++ rc = alloc_chrdev_region(&vc_cma_devnum, 0, 1, DRIVER_NAME); ++ if (rc < 0) { ++ LOG_ERR("%s: alloc_chrdev_region failed (rc=%d)", __func__, rc); ++ goto out_release; ++ } ++ ++ cdev_init(&vc_cma_cdev, &vc_cma_fops); ++ rc = cdev_add(&vc_cma_cdev, vc_cma_devnum, 1); ++ if (rc != 0) { ++ LOG_ERR("%s: cdev_add failed (rc=%d)", __func__, rc); ++ goto out_unregister; ++ } ++ ++ vc_cma_class = class_create(THIS_MODULE, DRIVER_NAME); ++ if (IS_ERR(vc_cma_class)) { ++ rc = PTR_ERR(vc_cma_class); ++ LOG_ERR("%s: class_create failed (rc=%d)", __func__, rc); ++ goto out_cdev_del; ++ } ++ ++ dev = device_create(vc_cma_class, NULL, vc_cma_devnum, NULL, ++ DRIVER_NAME); ++ if (IS_ERR(dev)) { ++ rc = PTR_ERR(dev); ++ LOG_ERR("%s: device_create failed (rc=%d)", __func__, rc); ++ goto out_class_destroy; ++ } ++ ++ vc_cma_proc_entry = proc_create(DRIVER_NAME, 0444, NULL, &vc_cma_proc_fops); ++ if (vc_cma_proc_entry == NULL) { ++ rc = -EFAULT; ++ LOG_ERR("%s: proc_create failed", __func__); ++ goto out_device_destroy; ++ } ++ ++ vc_cma_inited = 1; ++ return 0; ++ ++out_device_destroy: ++ device_destroy(vc_cma_class, vc_cma_devnum); ++ ++out_class_destroy: ++ class_destroy(vc_cma_class); ++ vc_cma_class = NULL; ++ ++out_cdev_del: ++ cdev_del(&vc_cma_cdev); ++ ++out_unregister: ++ unregister_chrdev_region(vc_cma_devnum, 1); ++ ++out_release: ++ /* It is tempting to try to clean up by calling ++ dma_release_from_contiguous for all allocated chunks, but it isn't ++ a very safe thing to do. If vc_cma_initial is non-zero it is because ++ VideoCore is already using that memory, so giving it back to Linux ++ is likely to be fatal. ++ */ ++ return -1; ++} ++ ++/**************************************************************************** ++* ++* vc_cma_exit ++* ++***************************************************************************/ ++ ++static void __exit vc_cma_exit(void) ++{ ++ LOG_DBG("%s: called", __func__); ++ ++ if (vc_cma_inited) { ++ remove_proc_entry(DRIVER_NAME, NULL); ++ device_destroy(vc_cma_class, vc_cma_devnum); ++ class_destroy(vc_cma_class); ++ cdev_del(&vc_cma_cdev); ++ unregister_chrdev_region(vc_cma_devnum, 1); ++ } ++} ++ ++module_init(vc_cma_init); ++module_exit(vc_cma_exit); ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Broadcom Corporation"); +Index: linux-3.10-3.10.11/drivers/misc/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/misc/Makefile 2014-04-28 00:42:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/misc/Makefile 2014-04-28 00:42:17.000000000 +0000 +@@ -53,4 +53,4 @@ + obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/ + obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o + obj-$(CONFIG_SRAM) += sram.o +-obj-y += vc04_services/ ++obj-$(CONFIG_BCM2708_VCHIQ) += vc04_services/ +Index: linux-3.10-3.10.11/include/linux/broadcom/vc_cma.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/broadcom/vc_cma.h 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1,30 @@ ++/***************************************************************************** ++* Copyright 2012 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#if !defined( VC_CMA_H ) ++#define VC_CMA_H ++ ++#include ++ ++#define VC_CMA_IOC_MAGIC 0xc5 ++ ++#define VC_CMA_IOC_RESERVE _IO(VC_CMA_IOC_MAGIC, 0) ++ ++#ifdef __KERNEL__ ++extern void __init vc_cma_early_init(void); ++extern void __init vc_cma_reserve(void); ++#endif ++ ++#endif /* VC_CMA_H */ ++ +Index: linux-3.10-3.10.11/dummy/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1576_1bddcfc76fc58e302c683ac837078c5ad77c6ffe.txt 2014-04-28 00:42:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.patch --- linux-3.10.11/debian/patches/rpi/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.patch 2014-04-28 00:42:19.000000000 +0000 @@ -0,0 +1,2304 @@ +commit ec5998409495ec0e203e331ff2d60feb101be629 +Author: popcornmix +Date: Mon Mar 26 22:15:50 2012 +0100 + + bcm2708: alsa sound driver + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_cutdown_defconfig 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig 2014-04-28 00:42:18.000000000 +0000 +@@ -208,6 +208,26 @@ + CONFIG_LOGO=y + # CONFIG_LOGO_LINUX_MONO is not set + # CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_SEQUENCER_OSS=y ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_BCM2835=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SOUND_PRIME=m + CONFIG_HID_PID=y + CONFIG_USB_HIDDEV=y + CONFIG_HID_A4TECH=m +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:18.000000000 +0000 +@@ -225,6 +225,26 @@ + CONFIG_LOGO=y + # CONFIG_LOGO_LINUX_MONO is not set + # CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=m ++CONFIG_SND_SEQUENCER=m ++CONFIG_SND_SEQ_DUMMY=m ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_SEQUENCER_OSS=y ++CONFIG_SND_HRTIMER=m ++CONFIG_SND_DUMMY=m ++CONFIG_SND_ALOOP=m ++CONFIG_SND_VIRMIDI=m ++CONFIG_SND_MTPAV=m ++CONFIG_SND_SERIAL_U16550=m ++CONFIG_SND_MPU401=m ++CONFIG_SND_BCM2835=m ++CONFIG_SND_USB_AUDIO=m ++CONFIG_SND_USB_UA101=m ++CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_6FIRE=m ++CONFIG_SOUND_PRIME=m + CONFIG_HID_PID=y + CONFIG_USB_HIDDEV=y + CONFIG_HID_A4TECH=m +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:18.000000000 +0000 +@@ -424,6 +424,16 @@ + .coherent_dma_mask = 0xffffffffUL}, + }; + ++ ++static struct platform_device bcm2708_alsa_devices[] = { ++ [0] = { ++ .name = "bcm2835_AUD0", ++ .id = 0, /* first audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++}; ++ + int __init bcm_register_device(struct platform_device *pdev) + { + int ret; +@@ -529,6 +539,8 @@ + bcm_register_device(&bcm2708_emmc_device); + #endif + bcm2708_init_led(); ++ for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++) ++ bcm_register_device(&bcm2708_alsa_devices[i]); + + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; +Index: linux-3.10-3.10.11/sound/arm/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/Kconfig 2014-04-27 23:37:19.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/Kconfig 2014-04-28 00:42:18.000000000 +0000 +@@ -39,5 +39,12 @@ + Say Y or M if you want to support any AC97 codec attached to + the PXA2xx AC97 interface. + ++config SND_BCM2835 ++ tristate "BCM2835 ALSA driver" ++ depends on ARCH_BCM2708 && BCM2708_VCHIQ && SND ++ select SND_PCM ++ help ++ Say Y or M if you want to support BCM2835 Alsa pcm card driver ++ + endif # SND_ARM + +Index: linux-3.10-3.10.11/sound/arm/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/Makefile 2014-04-27 23:37:19.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/Makefile 2014-04-28 00:42:18.000000000 +0000 +@@ -14,3 +14,9 @@ + + obj-$(CONFIG_SND_PXA2XX_AC97) += snd-pxa2xx-ac97.o + snd-pxa2xx-ac97-objs := pxa2xx-ac97.o ++ ++obj-$(CONFIG_SND_BCM2835) += snd-bcm2835.o ++snd-bcm2835-objs := bcm2835.o bcm2835-ctl.o bcm2835-pcm.o bcm2835-vchiq.o ++ ++EXTRA_CFLAGS += -Idrivers/misc/vc04_services -Idrivers/misc/vc04_services/interface/vcos/linuxkernel -D__VCCOREVER__=0x04000000 ++ +Index: linux-3.10-3.10.11/sound/arm/bcm2835-ctl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835-ctl.c 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,200 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "bcm2835.h" ++ ++/* volume maximum and minimum in terms of 0.01dB */ ++#define CTRL_VOL_MAX 400 ++#define CTRL_VOL_MIN -10239 /* originally -10240 */ ++ ++ ++static int snd_bcm2835_ctl_info(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_info *uinfo) ++{ ++ audio_info(" ... IN\n"); ++ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = CTRL_VOL_MIN; ++ uinfo->value.integer.max = CTRL_VOL_MAX; /* 2303 */ ++ } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = 1; ++ } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { ++ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; ++ uinfo->count = 1; ++ uinfo->value.integer.min = 0; ++ uinfo->value.integer.max = AUDIO_DEST_MAX-1; ++ } ++ audio_info(" ... OUT\n"); ++ return 0; ++} ++ ++/* toggles mute on or off depending on the value of nmute, and returns ++ * 1 if the mute value was changed, otherwise 0 ++ */ ++static int toggle_mute(struct bcm2835_chip *chip, int nmute) ++{ ++ /* if settings are ok, just return 0 */ ++ if(chip->mute == nmute) ++ return 0; ++ ++ /* if the sound is muted then we need to unmute */ ++ if(chip->mute == CTRL_VOL_MUTE) ++ { ++ chip->volume = chip->old_volume; /* copy the old volume back */ ++ audio_info("Unmuting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); ++ } ++ else /* otherwise we mute */ ++ { ++ chip->old_volume = chip->volume; ++ chip->volume = 26214; /* set volume to minimum level AKA mute */ ++ audio_info("Muting, old_volume = %d, volume = %d ...\n", chip->old_volume, chip->volume); ++ } ++ ++ chip->mute = nmute; ++ return 1; ++} ++ ++static int snd_bcm2835_ctl_get(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); ++ ++ BUG_ON(!chip && !(chip->avail_substreams & AVAIL_SUBSTREAMS_MASK)); ++ ++ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) ++ ucontrol->value.integer.value[0] = chip2alsa(chip->volume); ++ else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) ++ ucontrol->value.integer.value[0] = chip->mute; ++ else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) ++ ucontrol->value.integer.value[0] = chip->dest; ++ ++ return 0; ++} ++ ++static int snd_bcm2835_ctl_put(struct snd_kcontrol *kcontrol, ++ struct snd_ctl_elem_value *ucontrol) ++{ ++ struct bcm2835_chip *chip = snd_kcontrol_chip(kcontrol); ++ int changed = 0; ++ ++ if (kcontrol->private_value == PCM_PLAYBACK_VOLUME) { ++ audio_info("Volume change attempted.. volume = %d new_volume = %d\n", chip->volume, (int)ucontrol->value.integer.value[0]); ++ if (chip->mute == CTRL_VOL_MUTE) { ++ /* changed = toggle_mute(chip, CTRL_VOL_UNMUTE); */ ++ return 1; /* should return 0 to signify no change but the mixer takes this as the opposite sign (no idea why) */ ++ } ++ if (changed ++ || (ucontrol->value.integer.value[0] != chip2alsa(chip->volume))) { ++ ++ chip->volume = alsa2chip(ucontrol->value.integer.value[0]); ++ changed = 1; ++ } ++ ++ } else if (kcontrol->private_value == PCM_PLAYBACK_MUTE) { ++ /* Now implemented */ ++ audio_info(" Mute attempted\n"); ++ changed = toggle_mute(chip, ucontrol->value.integer.value[0]); ++ ++ } else if (kcontrol->private_value == PCM_PLAYBACK_DEVICE) { ++ if (ucontrol->value.integer.value[0] != chip->dest) { ++ chip->dest = ucontrol->value.integer.value[0]; ++ changed = 1; ++ } ++ } ++ ++ if (changed) { ++ if (bcm2835_audio_set_ctls(chip)) ++ printk(KERN_ERR "Failed to set ALSA controls..\n"); ++ } ++ ++ return changed; ++} ++ ++static DECLARE_TLV_DB_SCALE(snd_bcm2835_db_scale, CTRL_VOL_MIN, 1, 1); ++ ++static struct snd_kcontrol_new snd_bcm2835_ctl[] = { ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PCM Playback Volume", ++ .index = 0, ++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, ++ .private_value = PCM_PLAYBACK_VOLUME, ++ .info = snd_bcm2835_ctl_info, ++ .get = snd_bcm2835_ctl_get, ++ .put = snd_bcm2835_ctl_put, ++ .count = 1, ++ .tlv = {.p = snd_bcm2835_db_scale} ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PCM Playback Switch", ++ .index = 0, ++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, ++ .private_value = PCM_PLAYBACK_MUTE, ++ .info = snd_bcm2835_ctl_info, ++ .get = snd_bcm2835_ctl_get, ++ .put = snd_bcm2835_ctl_put, ++ .count = 1, ++ }, ++ { ++ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, ++ .name = "PCM Playback Route", ++ .index = 0, ++ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE, ++ .private_value = PCM_PLAYBACK_DEVICE, ++ .info = snd_bcm2835_ctl_info, ++ .get = snd_bcm2835_ctl_get, ++ .put = snd_bcm2835_ctl_put, ++ .count = 1, ++ }, ++}; ++ ++int snd_bcm2835_new_ctl(bcm2835_chip_t * chip) ++{ ++ int err; ++ unsigned int idx; ++ ++ strcpy(chip->card->mixername, "Broadcom Mixer"); ++ for (idx = 0; idx < ARRAY_SIZE(snd_bcm2835_ctl); idx++) { ++ err = ++ snd_ctl_add(chip->card, ++ snd_ctl_new1(&snd_bcm2835_ctl[idx], chip)); ++ if (err < 0) ++ return err; ++ } ++ return 0; ++} +Index: linux-3.10-3.10.11/sound/arm/bcm2835-pcm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835-pcm.c 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,409 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++ ++#include "bcm2835.h" ++ ++/* hardware definition */ ++static struct snd_pcm_hardware snd_bcm2835_playback_hw = { ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER), ++ .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, ++ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, ++ .rate_min = 8000, ++ .rate_max = 48000, ++ .channels_min = 1, ++ .channels_max = 2, ++ .buffer_bytes_max = 128 * 1024, ++ .period_bytes_min = 1 * 1024, ++ .period_bytes_max = 128 * 1024, ++ .periods_min = 1, ++ .periods_max = 128, ++}; ++ ++static void snd_bcm2835_playback_free(struct snd_pcm_runtime *runtime) ++{ ++ audio_info("Freeing up alsa stream here ..\n"); ++ if (runtime->private_data) ++ kfree(runtime->private_data); ++ runtime->private_data = NULL; ++} ++ ++static irqreturn_t bcm2835_playback_fifo_irq(int irq, void *dev_id) ++{ ++ bcm2835_alsa_stream_t *alsa_stream = (bcm2835_alsa_stream_t *) dev_id; ++ uint32_t consumed = 0; ++ int new_period = 0; ++ ++ audio_info(" .. IN\n"); ++ ++ audio_info("alsa_stream=%p substream=%p\n", alsa_stream, ++ alsa_stream ? alsa_stream->substream : 0); ++ ++ if (alsa_stream->open) ++ consumed = bcm2835_audio_retrieve_buffers(alsa_stream); ++ ++ /* We get called only if playback was triggered, So, the number of buffers we retrieve in ++ * each iteration are the buffers that have been played out already ++ */ ++ ++ if (alsa_stream->period_size) { ++ if ((alsa_stream->pos / alsa_stream->period_size) != ++ ((alsa_stream->pos + consumed) / alsa_stream->period_size)) ++ new_period = 1; ++ } ++ audio_debug("updating pos cur: %d + %d max:%d period_bytes:%d, hw_ptr: %d new_period:%d\n", ++ alsa_stream->pos, ++ consumed, ++ alsa_stream->buffer_size, ++ (int)(alsa_stream->period_size*alsa_stream->substream->runtime->periods), ++ frames_to_bytes(alsa_stream->substream->runtime, alsa_stream->substream->runtime->status->hw_ptr), ++ new_period); ++ if (alsa_stream->buffer_size) { ++ alsa_stream->pos += consumed &~ (1<<30); ++ alsa_stream->pos %= alsa_stream->buffer_size; ++ } ++ ++ if (alsa_stream->substream) { ++ if (new_period) ++ snd_pcm_period_elapsed(alsa_stream->substream); ++ } else { ++ audio_warning(" unexpected NULL substream\n"); ++ } ++ audio_info(" .. OUT\n"); ++ ++ return IRQ_HANDLED; ++} ++ ++/* open callback */ ++static int snd_bcm2835_playback_open(struct snd_pcm_substream *substream) ++{ ++ bcm2835_chip_t *chip = snd_pcm_substream_chip(substream); ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream; ++ int idx; ++ int err; ++ ++ audio_info(" .. IN (%d)\n", substream->number); ++ ++ audio_info("Alsa open (%d)\n", substream->number); ++ idx = substream->number; ++ ++ if (idx > MAX_SUBSTREAMS) { ++ audio_error ++ ("substream(%d) device doesn't exist max(%d) substreams allowed\n", ++ idx, MAX_SUBSTREAMS); ++ err = -ENODEV; ++ goto out; ++ } ++ ++ /* Check if we are ready */ ++ if (!(chip->avail_substreams & (1 << idx))) { ++ /* We are not ready yet */ ++ audio_error("substream(%d) device is not ready yet\n", idx); ++ err = -EAGAIN; ++ goto out; ++ } ++ ++ alsa_stream = kzalloc(sizeof(bcm2835_alsa_stream_t), GFP_KERNEL); ++ if (alsa_stream == NULL) { ++ return -ENOMEM; ++ } ++ ++ /* Initialise alsa_stream */ ++ alsa_stream->chip = chip; ++ alsa_stream->substream = substream; ++ alsa_stream->idx = idx; ++ chip->alsa_stream[idx] = alsa_stream; ++ ++ sema_init(&alsa_stream->buffers_update_sem, 0); ++ sema_init(&alsa_stream->control_sem, 0); ++ spin_lock_init(&alsa_stream->lock); ++ ++ /* Enabled in start trigger, called on each "fifo irq" after that */ ++ alsa_stream->enable_fifo_irq = 0; ++ alsa_stream->fifo_irq_handler = bcm2835_playback_fifo_irq; ++ ++ runtime->private_data = alsa_stream; ++ runtime->private_free = snd_bcm2835_playback_free; ++ runtime->hw = snd_bcm2835_playback_hw; ++ /* minimum 16 bytes alignment (for vchiq bulk transfers) */ ++ snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, ++ 16); ++ ++ err = bcm2835_audio_open(alsa_stream); ++ if (err != 0) { ++ kfree(alsa_stream); ++ return err; ++ } ++ ++ alsa_stream->open = 1; ++ alsa_stream->draining = 1; ++ ++out: ++ audio_info(" .. OUT =%d\n", err); ++ ++ return err; ++} ++ ++/* close callback */ ++static int snd_bcm2835_playback_close(struct snd_pcm_substream *substream) ++{ ++ /* the hardware-specific codes will be here */ ++ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ ++ audio_info(" .. IN\n"); ++ audio_info("Alsa close\n"); ++ ++ /* ++ * Call stop if it's still running. This happens when app ++ * is force killed and we don't get a stop trigger. ++ */ ++ if (alsa_stream->running) { ++ int err; ++ err = bcm2835_audio_stop(alsa_stream); ++ alsa_stream->running = 0; ++ if (err != 0) ++ audio_error(" Failed to STOP alsa device\n"); ++ } ++ ++ alsa_stream->period_size = 0; ++ alsa_stream->buffer_size = 0; ++ ++ if (alsa_stream->open) { ++ alsa_stream->open = 0; ++ bcm2835_audio_close(alsa_stream); ++ } ++ if (alsa_stream->chip) ++ alsa_stream->chip->alsa_stream[alsa_stream->idx] = NULL; ++ /* ++ * Do not free up alsa_stream here, it will be freed up by ++ * runtime->private_free callback we registered in *_open above ++ */ ++ ++ audio_info(" .. OUT\n"); ++ ++ return 0; ++} ++ ++/* hw_params callback */ ++static int snd_bcm2835_pcm_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ int err; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = ++ (bcm2835_alsa_stream_t *) runtime->private_data; ++ ++ audio_info(" .. IN\n"); ++ ++ err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params)); ++ if (err < 0) { ++ audio_error ++ (" pcm_lib_malloc failed to allocated pages for buffers\n"); ++ return err; ++ } ++ ++ err = bcm2835_audio_set_params(alsa_stream, params_channels(params), ++ params_rate(params), ++ snd_pcm_format_width(params_format ++ (params))); ++ if (err < 0) { ++ audio_error(" error setting hw params\n"); ++ } ++ ++ bcm2835_audio_setup(alsa_stream); ++ ++ /* in preparation of the stream, set the controls (volume level) of the stream */ ++ bcm2835_audio_set_ctls(alsa_stream->chip); ++ ++ audio_info(" .. OUT\n"); ++ ++ return err; ++} ++ ++/* hw_free callback */ ++static int snd_bcm2835_pcm_hw_free(struct snd_pcm_substream *substream) ++{ ++ audio_info(" .. IN\n"); ++ return snd_pcm_lib_free_pages(substream); ++} ++ ++/* prepare callback */ ++static int snd_bcm2835_pcm_prepare(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ ++ audio_info(" .. IN\n"); ++ ++ alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); ++ alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); ++ alsa_stream->pos = 0; ++ ++ audio_debug("buffer_size=%d, period_size=%d pos=%d frame_bits=%d\n", ++ alsa_stream->buffer_size, alsa_stream->period_size, ++ alsa_stream->pos, runtime->frame_bits); ++ ++ audio_info(" .. OUT\n"); ++ return 0; ++} ++ ++/* trigger callback */ ++static int snd_bcm2835_pcm_trigger(struct snd_pcm_substream *substream, int cmd) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ int err = 0; ++ ++ audio_info(" .. IN\n"); ++ ++ switch (cmd) { ++ case SNDRV_PCM_TRIGGER_START: ++ audio_debug("bcm2835_AUDIO_TRIGGER_START running=%d\n", ++ alsa_stream->running); ++ if (!alsa_stream->running) { ++ err = bcm2835_audio_start(alsa_stream); ++ if (err == 0) { ++ alsa_stream->running = 1; ++ alsa_stream->draining = 1; ++ } else { ++ audio_error(" Failed to START alsa device (%d)\n", err); ++ } ++ } ++ break; ++ case SNDRV_PCM_TRIGGER_STOP: ++ audio_debug ++ ("bcm2835_AUDIO_TRIGGER_STOP running=%d draining=%d\n", ++ alsa_stream->running, runtime->status->state == SNDRV_PCM_STATE_DRAINING); ++ if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) { ++ audio_info("DRAINING\n"); ++ alsa_stream->draining = 1; ++ } else { ++ audio_info("DROPPING\n"); ++ alsa_stream->draining = 0; ++ } ++ if (alsa_stream->running) { ++ err = bcm2835_audio_stop(alsa_stream); ++ if (err != 0) ++ audio_error(" Failed to STOP alsa device (%d)\n", err); ++ alsa_stream->running = 0; ++ } ++ break; ++ default: ++ err = -EINVAL; ++ } ++ ++ audio_info(" .. OUT\n"); ++ return err; ++} ++ ++/* pointer callback */ ++static snd_pcm_uframes_t ++snd_bcm2835_pcm_pointer(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ ++ audio_info(" .. IN\n"); ++ ++ audio_debug("pcm_pointer... (%d) hwptr=%d appl=%d pos=%d\n", 0, ++ frames_to_bytes(runtime, runtime->status->hw_ptr), ++ frames_to_bytes(runtime, runtime->control->appl_ptr), ++ alsa_stream->pos); ++ ++ audio_info(" .. OUT\n"); ++ return bytes_to_frames(runtime, alsa_stream->pos); ++} ++ ++static int snd_bcm2835_pcm_copy(struct snd_pcm_substream *substream, ++ int channel, snd_pcm_uframes_t pos, void *src, ++ snd_pcm_uframes_t count) ++{ ++ int ret; ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ ++ audio_info(" .. IN\n"); ++ audio_debug("copy.......... (%d) hwptr=%d appl=%d pos=%d\n", ++ frames_to_bytes(runtime, count), frames_to_bytes(runtime, ++ runtime-> ++ status-> ++ hw_ptr), ++ frames_to_bytes(runtime, runtime->control->appl_ptr), ++ alsa_stream->pos); ++ ret = ++ bcm2835_audio_write(alsa_stream, frames_to_bytes(runtime, count), ++ src); ++ audio_info(" .. OUT\n"); ++ return ret; ++} ++ ++static int snd_bcm2835_pcm_lib_ioctl(struct snd_pcm_substream *substream, ++ unsigned int cmd, void *arg) ++{ ++ int ret = snd_pcm_lib_ioctl(substream, cmd, arg); ++ audio_info(" .. substream=%p, cmd=%d, arg=%p (%x) ret=%d\n", substream, ++ cmd, arg, arg ? *(unsigned *)arg : 0, ret); ++ return ret; ++} ++ ++/* operators */ ++static struct snd_pcm_ops snd_bcm2835_playback_ops = { ++ .open = snd_bcm2835_playback_open, ++ .close = snd_bcm2835_playback_close, ++ .ioctl = snd_bcm2835_pcm_lib_ioctl, ++ .hw_params = snd_bcm2835_pcm_hw_params, ++ .hw_free = snd_bcm2835_pcm_hw_free, ++ .prepare = snd_bcm2835_pcm_prepare, ++ .trigger = snd_bcm2835_pcm_trigger, ++ .pointer = snd_bcm2835_pcm_pointer, ++ .copy = snd_bcm2835_pcm_copy, ++}; ++ ++/* create a pcm device */ ++int snd_bcm2835_new_pcm(bcm2835_chip_t * chip) ++{ ++ struct snd_pcm *pcm; ++ int err; ++ ++ audio_info(" .. IN\n"); ++ err = ++ snd_pcm_new(chip->card, "bcm2835 ALSA", 0, MAX_SUBSTREAMS, 0, &pcm); ++ if (err < 0) ++ return err; ++ pcm->private_data = chip; ++ strcpy(pcm->name, "bcm2835 ALSA"); ++ chip->pcm = pcm; ++ chip->dest = AUDIO_DEST_AUTO; ++ chip->volume = alsa2chip(0); ++ chip->mute = CTRL_VOL_UNMUTE; /*disable mute on startup */ ++ /* set operators */ ++ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, ++ &snd_bcm2835_playback_ops); ++ ++ /* pre-allocation of buffers */ ++ /* NOTE: this may fail */ ++ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_CONTINUOUS, ++ snd_dma_continuous_data ++ (GFP_KERNEL), 64 * 1024, ++ 64 * 1024); ++ ++ audio_info(" .. OUT\n"); ++ ++ return 0; ++} +Index: linux-3.10-3.10.11/sound/arm/bcm2835-vchiq.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835-vchiq.c 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,844 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "bcm2835.h" ++ ++/* ---- Include Files -------------------------------------------------------- */ ++ ++#include "interface/vchi/vchi.h" ++#include "vc_vchi_audioserv_defs.h" ++ ++/* ---- Private Constants and Types ------------------------------------------ */ ++ ++/* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ ++#ifdef AUDIO_DEBUG_ENABLE ++ #define LOG_ERR( fmt, arg... ) pr_err( "%s:%d " fmt, __func__, __LINE__, ##arg) ++ #define LOG_WARN( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) ++ #define LOG_INFO( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) ++ #define LOG_DBG( fmt, arg... ) pr_info( "%s:%d " fmt, __func__, __LINE__, ##arg) ++#else ++ #define LOG_ERR( fmt, arg... ) pr_err( "%s:%d " fmt, __func__, __LINE__, ##arg) ++ #define LOG_WARN( fmt, arg... ) ++ #define LOG_INFO( fmt, arg... ) ++ #define LOG_DBG( fmt, arg... ) ++#endif ++ ++typedef struct opaque_AUDIO_INSTANCE_T { ++ uint32_t num_connections; ++ VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; ++ struct semaphore msg_avail_event; ++ struct mutex vchi_mutex; ++ bcm2835_alsa_stream_t *alsa_stream; ++ int32_t result; ++ short peer_version; ++} AUDIO_INSTANCE_T; ++ ++bool force_bulk = false; ++ ++/* ---- Private Variables ---------------------------------------------------- */ ++ ++/* ---- Private Function Prototypes ------------------------------------------ */ ++ ++/* ---- Private Functions ---------------------------------------------------- */ ++ ++static int bcm2835_audio_stop_worker(bcm2835_alsa_stream_t * alsa_stream); ++static int bcm2835_audio_start_worker(bcm2835_alsa_stream_t * alsa_stream); ++ ++typedef struct { ++ struct work_struct my_work; ++ bcm2835_alsa_stream_t *alsa_stream; ++ int x; ++} my_work_t; ++ ++static void my_wq_function(struct work_struct *work) ++{ ++ my_work_t *w = (my_work_t *) work; ++ int ret = -9; ++ LOG_DBG(" .. IN %p:%d\n", w->alsa_stream, w->x); ++ switch (w->x) { ++ case 1: ++ ret = bcm2835_audio_start_worker(w->alsa_stream); ++ break; ++ case 2: ++ ret = bcm2835_audio_stop_worker(w->alsa_stream); ++ break; ++ default: ++ LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->x); ++ break; ++ } ++ kfree((void *)work); ++ LOG_DBG(" .. OUT %d\n", ret); ++} ++ ++int bcm2835_audio_start(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ int ret = -1; ++ LOG_DBG(" .. IN\n"); ++ if (alsa_stream->my_wq) { ++ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); ++ /*--- Queue some work (item 1) ---*/ ++ if (work) { ++ INIT_WORK((struct work_struct *)work, my_wq_function); ++ work->alsa_stream = alsa_stream; ++ work->x = 1; ++ if (queue_work ++ (alsa_stream->my_wq, (struct work_struct *)work)) ++ ret = 0; ++ } else ++ LOG_ERR(" .. Error: NULL work kmalloc\n"); ++ } ++ LOG_DBG(" .. OUT %d\n", ret); ++ return ret; ++} ++ ++int bcm2835_audio_stop(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ int ret = -1; ++ LOG_DBG(" .. IN\n"); ++ if (alsa_stream->my_wq) { ++ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); ++ /*--- Queue some work (item 1) ---*/ ++ if (work) { ++ INIT_WORK((struct work_struct *)work, my_wq_function); ++ work->alsa_stream = alsa_stream; ++ work->x = 2; ++ if (queue_work ++ (alsa_stream->my_wq, (struct work_struct *)work)) ++ ret = 0; ++ } else ++ LOG_ERR(" .. Error: NULL work kmalloc\n"); ++ } ++ LOG_DBG(" .. OUT %d\n", ret); ++ return ret; ++} ++ ++void my_workqueue_init(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ alsa_stream->my_wq = create_workqueue("my_queue"); ++ return; ++} ++ ++void my_workqueue_quit(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ if (alsa_stream->my_wq) { ++ flush_workqueue(alsa_stream->my_wq); ++ destroy_workqueue(alsa_stream->my_wq); ++ alsa_stream->my_wq = NULL; ++ } ++ return; ++} ++ ++static void audio_vchi_callback(void *param, ++ const VCHI_CALLBACK_REASON_T reason, ++ void *msg_handle) ++{ ++ AUDIO_INSTANCE_T *instance = (AUDIO_INSTANCE_T *) param; ++ int32_t status; ++ int32_t msg_len; ++ VC_AUDIO_MSG_T m; ++ bcm2835_alsa_stream_t *alsa_stream = 0; ++ LOG_DBG(" .. IN instance=%p, param=%p, reason=%d, handle=%p\n", ++ instance, param, reason, msg_handle); ++ ++ if (!instance || reason != VCHI_CALLBACK_MSG_AVAILABLE) { ++ return; ++ } ++ alsa_stream = instance->alsa_stream; ++ status = vchi_msg_dequeue(instance->vchi_handle[0], ++ &m, sizeof m, &msg_len, VCHI_FLAGS_NONE); ++ if (m.type == VC_AUDIO_MSG_TYPE_RESULT) { ++ LOG_DBG ++ (" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", ++ instance, m.u.result.success); ++ instance->result = m.u.result.success; ++ up(&instance->msg_avail_event); ++ } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { ++ irq_handler_t callback = (irq_handler_t) m.u.complete.callback; ++ LOG_DBG ++ (" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_COMPLETE, complete=%d\n", ++ instance, m.u.complete.count); ++ if (alsa_stream && callback) { ++ atomic_add(m.u.complete.count, &alsa_stream->retrieved); ++ callback(0, alsa_stream); ++ } else { ++ LOG_DBG(" .. unexpected alsa_stream=%p, callback=%p\n", ++ alsa_stream, callback); ++ } ++ } else { ++ LOG_DBG(" .. unexpected m.type=%d\n", m.type); ++ } ++ LOG_DBG(" .. OUT\n"); ++} ++ ++static AUDIO_INSTANCE_T *vc_vchi_audio_init(VCHI_INSTANCE_T vchi_instance, ++ VCHI_CONNECTION_T ** ++ vchi_connections, ++ uint32_t num_connections) ++{ ++ uint32_t i; ++ AUDIO_INSTANCE_T *instance; ++ int status; ++ ++ LOG_DBG("%s: start", __func__); ++ ++ if (num_connections > VCHI_MAX_NUM_CONNECTIONS) { ++ LOG_ERR("%s: unsupported number of connections %u (max=%u)\n", ++ __func__, num_connections, VCHI_MAX_NUM_CONNECTIONS); ++ ++ return NULL; ++ } ++ /* Allocate memory for this instance */ ++ instance = kmalloc(sizeof(*instance), GFP_KERNEL); ++ ++ memset(instance, 0, sizeof(*instance)); ++ instance->num_connections = num_connections; ++ ++ /* Create a lock for exclusive, serialized VCHI connection access */ ++ mutex_init(&instance->vchi_mutex); ++ /* Open the VCHI service connections */ ++ for (i = 0; i < num_connections; i++) { ++ SERVICE_CREATION_T params = { ++ VCHI_VERSION_EX(VC_AUDIOSERV_VER, VC_AUDIOSERV_MIN_VER), ++ VC_AUDIO_SERVER_NAME, // 4cc service code ++ vchi_connections[i], // passed in fn pointers ++ 0, // rx fifo size (unused) ++ 0, // tx fifo size (unused) ++ audio_vchi_callback, // service callback ++ instance, // service callback parameter ++ 1, //TODO: remove VCOS_FALSE, // unaligned bulk recieves ++ 1, //TODO: remove VCOS_FALSE, // unaligned bulk transmits ++ 0 // want crc check on bulk transfers ++ }; ++ ++ status = vchi_service_open(vchi_instance, ¶ms, ++ &instance->vchi_handle[i]); ++ if (status) { ++ LOG_ERR ++ ("%s: failed to open VCHI service connection (status=%d)\n", ++ __func__, status); ++ ++ goto err_close_services; ++ } ++ /* Finished with the service for now */ ++ vchi_service_release(instance->vchi_handle[i]); ++ } ++ ++ return instance; ++ ++err_close_services: ++ for (i = 0; i < instance->num_connections; i++) { ++ vchi_service_close(instance->vchi_handle[i]); ++ } ++ ++ kfree(instance); ++ ++ return NULL; ++} ++ ++static int32_t vc_vchi_audio_deinit(AUDIO_INSTANCE_T * instance) ++{ ++ uint32_t i; ++ ++ LOG_DBG(" .. IN\n"); ++ ++ if (instance == NULL) { ++ LOG_ERR("%s: invalid handle %p\n", __func__, instance); ++ ++ return -1; ++ } ++ ++ LOG_DBG(" .. about to lock (%d)\n", instance->num_connections); ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ ++ /* Close all VCHI service connections */ ++ for (i = 0; i < instance->num_connections; i++) { ++ int32_t success; ++ LOG_DBG(" .. %i:closing %p\n", i, instance->vchi_handle[i]); ++ vchi_service_use(instance->vchi_handle[i]); ++ ++ success = vchi_service_close(instance->vchi_handle[i]); ++ if (success != 0) { ++ LOG_ERR ++ ("%s: failed to close VCHI service connection (status=%d)\n", ++ __func__, success); ++ } ++ } ++ ++ mutex_unlock(&instance->vchi_mutex); ++ ++ kfree(instance); ++ ++ LOG_DBG(" .. OUT\n"); ++ ++ return 0; ++} ++ ++static int bcm2835_audio_open_connection(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ static VCHI_INSTANCE_T vchi_instance; ++ static VCHI_CONNECTION_T *vchi_connection; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ LOG_INFO("%s: start", __func__); ++ //BUG_ON(instance); ++ if (instance) { ++ LOG_ERR("%s: VCHI instance already open (%p)\n", ++ __func__, instance); ++ instance->alsa_stream = alsa_stream; ++ alsa_stream->instance = instance; ++ ret = 0; // xxx todo -1; ++ goto err_free_mem; ++ } ++ ++ /* Initialize and create a VCHI connection */ ++ ret = vchi_initialise(&vchi_instance); ++ if (ret != 0) { ++ LOG_ERR("%s: failed to initialise VCHI instance (ret=%d)\n", ++ __func__, ret); ++ ++ ret = -EIO; ++ goto err_free_mem; ++ } ++ ret = vchi_connect(NULL, 0, vchi_instance); ++ if (ret != 0) { ++ LOG_ERR("%s: failed to connect VCHI instance (ret=%d)\n", ++ __func__, ret); ++ ++ ret = -EIO; ++ goto err_free_mem; ++ } ++ ++ /* Initialize an instance of the audio service */ ++ instance = vc_vchi_audio_init(vchi_instance, &vchi_connection, 1); ++ ++ if (instance == NULL /*|| audio_handle != instance */ ) { ++ LOG_ERR("%s: failed to initialize audio service\n", __func__); ++ ++ ret = -EPERM; ++ goto err_free_mem; ++ } ++ ++ instance->alsa_stream = alsa_stream; ++ alsa_stream->instance = instance; ++ ++ LOG_DBG(" success !\n"); ++err_free_mem: ++ LOG_DBG(" .. OUT\n"); ++ ++ return ret; ++} ++ ++int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ AUDIO_INSTANCE_T *instance; ++ VC_AUDIO_MSG_T m; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ my_workqueue_init(alsa_stream); ++ ++ ret = bcm2835_audio_open_connection(alsa_stream); ++ if (ret != 0) { ++ ret = -1; ++ goto exit; ++ } ++ instance = alsa_stream->instance; ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ m.type = VC_AUDIO_MSG_TYPE_OPEN; ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++exit: ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++static int bcm2835_audio_set_ctls_chan(bcm2835_alsa_stream_t * alsa_stream, ++ bcm2835_chip_t * chip) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ LOG_INFO ++ (" Setting ALSA dest(%d), volume(%d)\n", chip->dest, chip->volume); ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ instance->result = -1; ++ ++ m.type = VC_AUDIO_MSG_TYPE_CONTROL; ++ m.u.control.dest = chip->dest; ++ m.u.control.volume = chip->volume; ++ ++ /* Create the message available event */ ++ sema_init(&instance->msg_avail_event, 0); ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ /* We are expecting a reply from the videocore */ ++ if (down_interruptible(&instance->msg_avail_event)) { ++ LOG_ERR("%s: failed on waiting for event (status=%d)\n", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ if (instance->result != 0) { ++ LOG_ERR("%s: result=%d\n", __func__, instance->result); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++int bcm2835_audio_set_ctls(bcm2835_chip_t * chip) ++{ ++ int i; ++ int ret = 0; ++ LOG_DBG(" .. IN\n"); ++ ++ /* change ctls for all substreams */ ++ for (i = 0; i < MAX_SUBSTREAMS; i++) { ++ if (chip->avail_substreams & (1 << i)) { ++ if (!chip->alsa_stream[i]) ++ { ++ LOG_DBG(" No ALSA stream available?! %i:%p (%x)\n", i, chip->alsa_stream[i], chip->avail_substreams); ++ ret = 0; ++ } ++ else if (bcm2835_audio_set_ctls_chan /* returns 0 on success */ ++ (chip->alsa_stream[i], chip) != 0) ++ { ++ LOG_DBG("Couldn't set the controls for stream %d\n", i); ++ ret = -1; ++ } ++ else LOG_DBG(" Controls set for stream %d\n", i); ++ } ++ } ++ LOG_DBG(" .. OUT ret=%d\n", ret); ++ return ret; ++} ++ ++int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream, ++ uint32_t channels, uint32_t samplerate, ++ uint32_t bps) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ LOG_INFO ++ (" Setting ALSA channels(%d), samplerate(%d), bits-per-sample(%d)\n", ++ channels, samplerate, bps); ++ ++ /* resend ctls - alsa_stream may not have been open when first send */ ++ ret = bcm2835_audio_set_ctls_chan(alsa_stream, alsa_stream->chip); ++ if (ret != 0) { ++ LOG_ERR(" Alsa controls not supported\n"); ++ return -EINVAL; ++ } ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ instance->result = -1; ++ ++ m.type = VC_AUDIO_MSG_TYPE_CONFIG; ++ m.u.config.channels = channels; ++ m.u.config.samplerate = samplerate; ++ m.u.config.bps = bps; ++ ++ /* Create the message available event */ ++ sema_init(&instance->msg_avail_event, 0); ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)\n", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ /* We are expecting a reply from the videocore */ ++ if (down_interruptible(&instance->msg_avail_event)) { ++ LOG_ERR("%s: failed on waiting for event (status=%d)\n", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ if (instance->result != 0) { ++ LOG_ERR("%s: result=%d", __func__, instance->result); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++int bcm2835_audio_setup(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ LOG_DBG(" .. IN\n"); ++ ++ LOG_DBG(" .. OUT\n"); ++ ++ return 0; ++} ++ ++static int bcm2835_audio_start_worker(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ m.type = VC_AUDIO_MSG_TYPE_START; ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++static int bcm2835_audio_stop_worker(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ m.type = VC_AUDIO_MSG_TYPE_STOP; ++ m.u.stop.draining = alsa_stream->draining; ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ LOG_DBG(" .. IN\n"); ++ ++ my_workqueue_quit(alsa_stream); ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ m.type = VC_AUDIO_MSG_TYPE_CLOSE; ++ ++ /* Create the message available event */ ++ sema_init(&instance->msg_avail_event, 0); ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)", ++ __func__, success); ++ ret = -1; ++ goto unlock; ++ } ++ if (down_interruptible(&instance->msg_avail_event)) { ++ LOG_ERR("%s: failed on waiting for event (status=%d)", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ if (instance->result != 0) { ++ LOG_ERR("%s: failed result (status=%d)", ++ __func__, instance->result); ++ ++ ret = -1; ++ goto unlock; ++ } ++ ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ ++ /* Stop the audio service */ ++ if (instance) { ++ vc_vchi_audio_deinit(instance); ++ alsa_stream->instance = NULL; ++ } ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++int bcm2835_audio_write(bcm2835_alsa_stream_t * alsa_stream, uint32_t count, ++ void *src) ++{ ++ VC_AUDIO_MSG_T m; ++ AUDIO_INSTANCE_T *instance = alsa_stream->instance; ++ int32_t success; ++ int ret; ++ ++ LOG_DBG(" .. IN\n"); ++ ++ LOG_INFO(" Writing %d bytes from %p\n", count, src); ++ ++ if(mutex_lock_interruptible(&instance->vchi_mutex)) ++ { ++ LOG_DBG("Interrupted whilst waiting for lock on (%d)\n",instance->num_connections); ++ return -EINTR; ++ } ++ vchi_service_use(instance->vchi_handle[0]); ++ ++ if ( instance->peer_version==0 && vchi_get_peer_version(instance->vchi_handle[0], &instance->peer_version) == 0 ) { ++ LOG_DBG("%s: client version %d connected\n", __func__, instance->peer_version); ++ } ++ m.type = VC_AUDIO_MSG_TYPE_WRITE; ++ m.u.write.count = count; ++ // old version uses bulk, new version uses control ++ m.u.write.max_packet = instance->peer_version < 2 || force_bulk ? 0:4000; ++ m.u.write.callback = alsa_stream->fifo_irq_handler; ++ m.u.write.cookie = alsa_stream; ++ m.u.write.silence = src == NULL; ++ ++ /* Send the message to the videocore */ ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ &m, sizeof m, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ ++ if (success != 0) { ++ LOG_ERR("%s: failed on vchi_msg_queue (status=%d)", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ if (!m.u.write.silence) { ++ if (m.u.write.max_packet == 0) { ++ /* Send the message to the videocore */ ++ success = vchi_bulk_queue_transmit(instance->vchi_handle[0], ++ src, count, ++ 0 * ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED ++ + ++ 1 * ++ VCHI_FLAGS_BLOCK_UNTIL_DATA_READ, ++ NULL); ++ } else { ++ while (count > 0) { ++ int bytes = min((int)m.u.write.max_packet, (int)count); ++ success = vchi_msg_queue(instance->vchi_handle[0], ++ src, bytes, ++ VCHI_FLAGS_BLOCK_UNTIL_QUEUED, NULL); ++ src = (char *)src + bytes; ++ count -= bytes; ++ } ++ } ++ if (success != 0) { ++ LOG_ERR ++ ("%s: failed on vchi_bulk_queue_transmit (status=%d)", ++ __func__, success); ++ ++ ret = -1; ++ goto unlock; ++ } ++ } ++ ret = 0; ++ ++unlock: ++ vchi_service_release(instance->vchi_handle[0]); ++ mutex_unlock(&instance->vchi_mutex); ++ LOG_DBG(" .. OUT\n"); ++ return ret; ++} ++ ++/** ++ * Returns all buffers from arm->vc ++ */ ++void bcm2835_audio_flush_buffers(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ LOG_DBG(" .. IN\n"); ++ LOG_DBG(" .. OUT\n"); ++ return; ++} ++ ++/** ++ * Forces VC to flush(drop) its filled playback buffers and ++ * return them the us. (VC->ARM) ++ */ ++void bcm2835_audio_flush_playback_buffers(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ LOG_DBG(" .. IN\n"); ++ LOG_DBG(" .. OUT\n"); ++} ++ ++uint32_t bcm2835_audio_retrieve_buffers(bcm2835_alsa_stream_t * alsa_stream) ++{ ++ uint32_t count = atomic_read(&alsa_stream->retrieved); ++ atomic_sub(count, &alsa_stream->retrieved); ++ return count; ++} ++ ++module_param(force_bulk, bool, 0444); ++MODULE_PARM_DESC(force_bulk, "Force use of vchiq bulk for audio"); +Index: linux-3.10-3.10.11/sound/arm/bcm2835.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835.c 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,413 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++ ++#include ++#include ++#include ++ ++#include "bcm2835.h" ++ ++/* module parameters (see "Module Parameters") */ ++/* SNDRV_CARDS: maximum number of cards supported by this module */ ++static int index[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = -1 }; ++static char *id[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = NULL }; ++static int enable[MAX_SUBSTREAMS] = {[0 ... (MAX_SUBSTREAMS - 1)] = 1 }; ++ ++/* HACKY global pointers needed for successive probes to work : ssp ++ * But compared against the changes we will have to do in VC audio_ipc code ++ * to export 8 audio_ipc devices as a single IPC device and then monitor all ++ * four devices in a thread, this gets things done quickly and should be easier ++ * to debug if we run into issues ++ */ ++ ++static struct snd_card *g_card = NULL; ++static bcm2835_chip_t *g_chip = NULL; ++ ++static int snd_bcm2835_free(bcm2835_chip_t * chip) ++{ ++ kfree(chip); ++ return 0; ++} ++ ++/* component-destructor ++ * (see "Management of Cards and Components") ++ */ ++static int snd_bcm2835_dev_free(struct snd_device *device) ++{ ++ return snd_bcm2835_free(device->device_data); ++} ++ ++/* chip-specific constructor ++ * (see "Management of Cards and Components") ++ */ ++static int snd_bcm2835_create(struct snd_card *card, ++ struct platform_device *pdev, ++ bcm2835_chip_t ** rchip) ++{ ++ bcm2835_chip_t *chip; ++ int err; ++ static struct snd_device_ops ops = { ++ .dev_free = snd_bcm2835_dev_free, ++ }; ++ ++ *rchip = NULL; ++ ++ chip = kzalloc(sizeof(*chip), GFP_KERNEL); ++ if (chip == NULL) ++ return -ENOMEM; ++ ++ chip->card = card; ++ ++ err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); ++ if (err < 0) { ++ snd_bcm2835_free(chip); ++ return err; ++ } ++ ++ *rchip = chip; ++ return 0; ++} ++ ++static int snd_bcm2835_alsa_probe(struct platform_device *pdev) ++{ ++ static int dev; ++ bcm2835_chip_t *chip; ++ struct snd_card *card; ++ int err; ++ ++ if (dev >= MAX_SUBSTREAMS) ++ return -ENODEV; ++ ++ if (!enable[dev]) { ++ dev++; ++ return -ENOENT; ++ } ++ ++ if (dev > 0) ++ goto add_register_map; ++ ++ err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &g_card); ++ if (err < 0) ++ goto out; ++ ++ snd_card_set_dev(g_card, &pdev->dev); ++ strcpy(g_card->driver, "BRCM bcm2835 ALSA Driver"); ++ strcpy(g_card->shortname, "bcm2835 ALSA"); ++ sprintf(g_card->longname, "%s", g_card->shortname); ++ ++ err = snd_bcm2835_create(g_card, pdev, &chip); ++ if (err < 0) { ++ printk(KERN_ERR "Failed to create bcm2835 chip\n"); ++ goto out_bcm2835_create; ++ } ++ ++ g_chip = chip; ++ err = snd_bcm2835_new_pcm(chip); ++ if (err < 0) { ++ printk(KERN_ERR "Failed to create new BCM2835 pcm device\n"); ++ goto out_bcm2835_new_pcm; ++ } ++ ++ err = snd_bcm2835_new_ctl(chip); ++ if (err < 0) { ++ printk(KERN_ERR "Failed to create new BCM2835 ctl\n"); ++ goto out_bcm2835_new_ctl; ++ } ++ ++add_register_map: ++ card = g_card; ++ chip = g_chip; ++ ++ BUG_ON(!(card && chip)); ++ ++ chip->avail_substreams |= (1 << dev); ++ chip->pdev[dev] = pdev; ++ ++ if (dev == 0) { ++ err = snd_card_register(card); ++ if (err < 0) { ++ printk(KERN_ERR ++ "Failed to register bcm2835 ALSA card \n"); ++ goto out_card_register; ++ } ++ platform_set_drvdata(pdev, card); ++ printk(KERN_INFO "bcm2835 ALSA card created!\n"); ++ } else { ++ printk(KERN_INFO "bcm2835 ALSA chip created!\n"); ++ platform_set_drvdata(pdev, (void *)dev); ++ } ++ ++ dev++; ++ ++ return 0; ++ ++out_card_register: ++out_bcm2835_new_ctl: ++out_bcm2835_new_pcm: ++out_bcm2835_create: ++ BUG_ON(!g_card); ++ if (snd_card_free(g_card)) ++ printk(KERN_ERR "Failed to free Registered alsa card\n"); ++ g_card = NULL; ++out: ++ dev = SNDRV_CARDS; /* stop more avail_substreams from being probed */ ++ printk(KERN_ERR "BCM2835 ALSA Probe failed !!\n"); ++ return err; ++} ++ ++static int snd_bcm2835_alsa_remove(struct platform_device *pdev) ++{ ++ uint32_t idx; ++ void *drv_data; ++ ++ drv_data = platform_get_drvdata(pdev); ++ ++ if (drv_data == (void *)g_card) { ++ /* This is the card device */ ++ snd_card_free((struct snd_card *)drv_data); ++ g_card = NULL; ++ g_chip = NULL; ++ } else { ++ idx = (uint32_t) drv_data; ++ if (g_card != NULL) { ++ BUG_ON(!g_chip); ++ /* We pass chip device numbers in audio ipc devices ++ * other than the one we registered our card with ++ */ ++ idx = (uint32_t) drv_data; ++ BUG_ON(!idx || idx > MAX_SUBSTREAMS); ++ g_chip->avail_substreams &= ~(1 << idx); ++ /* There should be atleast one substream registered ++ * after we are done here, as it wil be removed when ++ * the *remove* is called for the card device ++ */ ++ BUG_ON(!g_chip->avail_substreams); ++ } ++ } ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int snd_bcm2835_alsa_suspend(struct platform_device *pdev, ++ pm_message_t state) ++{ ++ return 0; ++} ++ ++static int snd_bcm2835_alsa_resume(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++#endif ++ ++static struct platform_driver bcm2835_alsa0_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD0", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa1_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD1", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa2_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD2", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa3_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD3", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa4_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD4", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa5_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD5", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa6_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD6", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static struct platform_driver bcm2835_alsa7_driver = { ++ .probe = snd_bcm2835_alsa_probe, ++ .remove = snd_bcm2835_alsa_remove, ++#ifdef CONFIG_PM ++ .suspend = snd_bcm2835_alsa_suspend, ++ .resume = snd_bcm2835_alsa_resume, ++#endif ++ .driver = { ++ .name = "bcm2835_AUD7", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int bcm2835_alsa_device_init(void) ++{ ++ int err; ++ err = platform_driver_register(&bcm2835_alsa0_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa0_driver %d .\n", err); ++ goto out; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa1_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa1_driver %d .\n", err); ++ goto unregister_0; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa2_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa2_driver %d .\n", err); ++ goto unregister_1; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa3_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa3_driver %d .\n", err); ++ goto unregister_2; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa4_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa4_driver %d .\n", err); ++ goto unregister_3; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa5_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa5_driver %d .\n", err); ++ goto unregister_4; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa6_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa6_driver %d .\n", err); ++ goto unregister_5; ++ } ++ ++ err = platform_driver_register(&bcm2835_alsa7_driver); ++ if (err) { ++ printk("Error registering bcm2835_alsa7_driver %d .\n", err); ++ goto unregister_6; ++ } ++ ++ return 0; ++ ++unregister_6: ++ platform_driver_unregister(&bcm2835_alsa6_driver); ++unregister_5: ++ platform_driver_unregister(&bcm2835_alsa5_driver); ++unregister_4: ++ platform_driver_unregister(&bcm2835_alsa4_driver); ++unregister_3: ++ platform_driver_unregister(&bcm2835_alsa3_driver); ++unregister_2: ++ platform_driver_unregister(&bcm2835_alsa2_driver); ++unregister_1: ++ platform_driver_unregister(&bcm2835_alsa1_driver); ++unregister_0: ++ platform_driver_unregister(&bcm2835_alsa0_driver); ++out: ++ return err; ++} ++ ++static void bcm2835_alsa_device_exit(void) ++{ ++ platform_driver_unregister(&bcm2835_alsa0_driver); ++ platform_driver_unregister(&bcm2835_alsa1_driver); ++ platform_driver_unregister(&bcm2835_alsa2_driver); ++ platform_driver_unregister(&bcm2835_alsa3_driver); ++ platform_driver_unregister(&bcm2835_alsa4_driver); ++ platform_driver_unregister(&bcm2835_alsa5_driver); ++ platform_driver_unregister(&bcm2835_alsa6_driver); ++ platform_driver_unregister(&bcm2835_alsa7_driver); ++} ++ ++late_initcall(bcm2835_alsa_device_init); ++module_exit(bcm2835_alsa_device_exit); ++ ++MODULE_AUTHOR("Dom Cobley"); ++MODULE_DESCRIPTION("Alsa driver for BCM2835 chip"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:bcm2835_alsa"); +Index: linux-3.10-3.10.11/sound/arm/bcm2835.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835.h 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,155 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#ifndef __SOUND_ARM_BCM2835_H ++#define __SOUND_ARM_BCM2835_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* ++#define AUDIO_DEBUG_ENABLE ++#define AUDIO_VERBOSE_DEBUG_ENABLE ++*/ ++ ++/* Debug macros */ ++ ++#ifdef AUDIO_DEBUG_ENABLE ++#ifdef AUDIO_VERBOSE_DEBUG_ENABLE ++ ++#define audio_debug(fmt, arg...) \ ++ printk(KERN_INFO"%s:%d " fmt, __func__, __LINE__, ##arg) ++ ++#define audio_info(fmt, arg...) \ ++ printk(KERN_INFO"%s:%d " fmt, __func__, __LINE__, ##arg) ++ ++#else ++ ++#define audio_debug(fmt, arg...) ++ ++#define audio_info(fmt, arg...) ++ ++#endif /* AUDIO_VERBOSE_DEBUG_ENABLE */ ++ ++#else ++ ++#define audio_debug(fmt, arg...) ++ ++#define audio_info(fmt, arg...) ++ ++#endif /* AUDIO_DEBUG_ENABLE */ ++ ++#define audio_error(fmt, arg...) \ ++ printk(KERN_ERR"%s:%d " fmt, __func__, __LINE__, ##arg) ++ ++#define audio_warning(fmt, arg...) \ ++ printk(KERN_WARNING"%s:%d " fmt, __func__, __LINE__, ##arg) ++ ++#define audio_alert(fmt, arg...) \ ++ printk(KERN_ALERT"%s:%d " fmt, __func__, __LINE__, ##arg) ++ ++#define MAX_SUBSTREAMS (8) ++#define AVAIL_SUBSTREAMS_MASK (0xff) ++enum { ++ CTRL_VOL_MUTE, ++ CTRL_VOL_UNMUTE ++}; ++ ++/* macros for alsa2chip and chip2alsa, instead of functions */ ++ ++#define alsa2chip(vol) (uint)(-((vol << 8) / 100)) /* convert alsa to chip volume (defined as macro rather than function call) */ ++#define chip2alsa(vol) -((vol * 100) >> 8) /* convert chip to alsa volume */ ++ ++/* Some constants for values .. */ ++typedef enum { ++ AUDIO_DEST_AUTO = 0, ++ AUDIO_DEST_HEADPHONES = 1, ++ AUDIO_DEST_HDMI = 2, ++ AUDIO_DEST_MAX, ++} SND_BCM2835_ROUTE_T; ++ ++typedef enum { ++ PCM_PLAYBACK_VOLUME, ++ PCM_PLAYBACK_MUTE, ++ PCM_PLAYBACK_DEVICE, ++} SND_BCM2835_CTRL_T; ++ ++/* definition of the chip-specific record */ ++typedef struct bcm2835_chip { ++ struct snd_card *card; ++ struct snd_pcm *pcm; ++ /* Bitmat for valid reg_base and irq numbers */ ++ uint32_t avail_substreams; ++ struct platform_device *pdev[MAX_SUBSTREAMS]; ++ struct bcm2835_alsa_stream *alsa_stream[MAX_SUBSTREAMS]; ++ ++ int volume; ++ int old_volume; /* stores the volume value whist muted */ ++ int dest; ++ int mute; ++} bcm2835_chip_t; ++ ++typedef struct bcm2835_alsa_stream { ++ bcm2835_chip_t *chip; ++ struct snd_pcm_substream *substream; ++ ++ struct semaphore buffers_update_sem; ++ struct semaphore control_sem; ++ spinlock_t lock; ++ volatile uint32_t control; ++ volatile uint32_t status; ++ ++ int open; ++ int running; ++ int draining; ++ ++ unsigned int pos; ++ unsigned int buffer_size; ++ unsigned int period_size; ++ ++ uint32_t enable_fifo_irq; ++ irq_handler_t fifo_irq_handler; ++ ++ atomic_t retrieved; ++ struct opaque_AUDIO_INSTANCE_T *instance; ++ struct workqueue_struct *my_wq; ++ int idx; ++} bcm2835_alsa_stream_t; ++ ++int snd_bcm2835_new_ctl(bcm2835_chip_t * chip); ++int snd_bcm2835_new_pcm(bcm2835_chip_t * chip); ++ ++int bcm2835_audio_open(bcm2835_alsa_stream_t * alsa_stream); ++int bcm2835_audio_close(bcm2835_alsa_stream_t * alsa_stream); ++int bcm2835_audio_set_params(bcm2835_alsa_stream_t * alsa_stream, ++ uint32_t channels, uint32_t samplerate, ++ uint32_t bps); ++int bcm2835_audio_setup(bcm2835_alsa_stream_t * alsa_stream); ++int bcm2835_audio_start(bcm2835_alsa_stream_t * alsa_stream); ++int bcm2835_audio_stop(bcm2835_alsa_stream_t * alsa_stream); ++int bcm2835_audio_set_ctls(bcm2835_chip_t * chip); ++int bcm2835_audio_write(bcm2835_alsa_stream_t * alsa_stream, uint32_t count, ++ void *src); ++uint32_t bcm2835_audio_retrieve_buffers(bcm2835_alsa_stream_t * alsa_stream); ++void bcm2835_audio_flush_buffers(bcm2835_alsa_stream_t * alsa_stream); ++void bcm2835_audio_flush_playback_buffers(bcm2835_alsa_stream_t * alsa_stream); ++ ++#endif /* __SOUND_ARM_BCM2835_H */ +Index: linux-3.10-3.10.11/sound/arm/vc_vchi_audioserv_defs.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/vc_vchi_audioserv_defs.h 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1,116 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#ifndef _VC_AUDIO_DEFS_H_ ++#define _VC_AUDIO_DEFS_H_ ++ ++#define VC_AUDIOSERV_MIN_VER 1 ++#define VC_AUDIOSERV_VER 2 ++ ++// FourCC code used for VCHI connection ++#define VC_AUDIO_SERVER_NAME MAKE_FOURCC("AUDS") ++ ++// Maximum message length ++#define VC_AUDIO_MAX_MSG_LEN (sizeof( VC_AUDIO_MSG_T )) ++ ++// List of screens that are currently supported ++// All message types supported for HOST->VC direction ++typedef enum { ++ VC_AUDIO_MSG_TYPE_RESULT, // Generic result ++ VC_AUDIO_MSG_TYPE_COMPLETE, // Generic result ++ VC_AUDIO_MSG_TYPE_CONFIG, // Configure audio ++ VC_AUDIO_MSG_TYPE_CONTROL, // Configure audio ++ VC_AUDIO_MSG_TYPE_OPEN, // Configure audio ++ VC_AUDIO_MSG_TYPE_CLOSE, // Configure audio ++ VC_AUDIO_MSG_TYPE_START, // Configure audio ++ VC_AUDIO_MSG_TYPE_STOP, // Configure audio ++ VC_AUDIO_MSG_TYPE_WRITE, // Configure audio ++ VC_AUDIO_MSG_TYPE_MAX ++} VC_AUDIO_MSG_TYPE; ++ ++// configure the audio ++typedef struct { ++ uint32_t channels; ++ uint32_t samplerate; ++ uint32_t bps; ++ ++} VC_AUDIO_CONFIG_T; ++ ++typedef struct { ++ uint32_t volume; ++ uint32_t dest; ++ ++} VC_AUDIO_CONTROL_T; ++ ++// audio ++typedef struct { ++ uint32_t dummy; ++ ++} VC_AUDIO_OPEN_T; ++ ++// audio ++typedef struct { ++ uint32_t dummy; ++ ++} VC_AUDIO_CLOSE_T; ++// audio ++typedef struct { ++ uint32_t dummy; ++ ++} VC_AUDIO_START_T; ++// audio ++typedef struct { ++ uint32_t draining; ++ ++} VC_AUDIO_STOP_T; ++ ++// configure the write audio samples ++typedef struct { ++ uint32_t count; // in bytes ++ void *callback; ++ void *cookie; ++ uint16_t silence; ++ uint16_t max_packet; ++} VC_AUDIO_WRITE_T; ++ ++// Generic result for a request (VC->HOST) ++typedef struct { ++ int32_t success; // Success value ++ ++} VC_AUDIO_RESULT_T; ++ ++// Generic result for a request (VC->HOST) ++typedef struct { ++ int32_t count; // Success value ++ void *callback; ++ void *cookie; ++} VC_AUDIO_COMPLETE_T; ++ ++// Message header for all messages in HOST->VC direction ++typedef struct { ++ int32_t type; // Message type (VC_AUDIO_MSG_TYPE) ++ union { ++ VC_AUDIO_CONFIG_T config; ++ VC_AUDIO_CONTROL_T control; ++ VC_AUDIO_OPEN_T open; ++ VC_AUDIO_CLOSE_T close; ++ VC_AUDIO_START_T start; ++ VC_AUDIO_STOP_T stop; ++ VC_AUDIO_WRITE_T write; ++ VC_AUDIO_RESULT_T result; ++ VC_AUDIO_COMPLETE_T complete; ++ } u; ++} VC_AUDIO_MSG_T; ++ ++#endif // _VC_AUDIO_DEFS_H_ +Index: linux-3.10-3.10.11/dummy/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1577_ec5998409495ec0e203e331ff2d60feb101be629.txt 2014-04-28 00:42:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.patch 2014-04-28 00:42:20.000000000 +0000 @@ -0,0 +1,97 @@ +commit 305dd66d4eea785e521d50d77b0b91bd29beb4a1 +Author: popcornmix +Date: Tue Mar 26 17:26:38 2013 +0000 + + Allow mac address to be set in smsc95xx + + Signed-off-by: popcornmix + +Index: linux-3.10-3.10.11/drivers/net/usb/smsc95xx.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/usb/smsc95xx.c 2014-04-27 23:37:19.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/usb/smsc95xx.c 2014-04-28 00:42:19.000000000 +0000 +@@ -61,6 +61,7 @@ + #define SUSPEND_SUSPEND3 (0x08) + #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ + SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) ++#define MAC_ADDR_LEN (6) + + struct smsc95xx_priv { + u32 mac_cr; +@@ -76,6 +77,10 @@ + module_param(turbo_mode, bool, 0644); + MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); + ++static char *macaddr = ":"; ++module_param(macaddr, charp, 0); ++MODULE_PARM_DESC(macaddr, "MAC address"); ++ + static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, + u32 *data, int in_pm) + { +@@ -765,8 +770,59 @@ + return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); + } + ++/* Check the macaddr module parameter for a MAC address */ ++static int smsc95xx_is_macaddr_param(struct usbnet *dev, u8 *dev_mac) ++{ ++ int i, j, got_num, num; ++ u8 mtbl[MAC_ADDR_LEN]; ++ ++ if (macaddr[0] == ':') ++ return 0; ++ ++ i = 0; ++ j = 0; ++ num = 0; ++ got_num = 0; ++ while (j < MAC_ADDR_LEN) { ++ if (macaddr[i] && macaddr[i] != ':') { ++ got_num++; ++ if ('0' <= macaddr[i] && macaddr[i] <= '9') ++ num = num * 16 + macaddr[i] - '0'; ++ else if ('A' <= macaddr[i] && macaddr[i] <= 'F') ++ num = num * 16 + 10 + macaddr[i] - 'A'; ++ else if ('a' <= macaddr[i] && macaddr[i] <= 'f') ++ num = num * 16 + 10 + macaddr[i] - 'a'; ++ else ++ break; ++ i++; ++ } else if (got_num == 2) { ++ mtbl[j++] = (u8) num; ++ num = 0; ++ got_num = 0; ++ i++; ++ } else { ++ break; ++ } ++ } ++ ++ if (j == MAC_ADDR_LEN) { ++ netif_dbg(dev, ifup, dev->net, "Overriding MAC address with: " ++ "%02x:%02x:%02x:%02x:%02x:%02x\n", mtbl[0], mtbl[1], mtbl[2], ++ mtbl[3], mtbl[4], mtbl[5]); ++ for (i = 0; i < MAC_ADDR_LEN; i++) ++ dev_mac[i] = mtbl[i]; ++ return 1; ++ } else { ++ return 0; ++ } ++} ++ + static void smsc95xx_init_mac_address(struct usbnet *dev) + { ++ /* Check module parameters */ ++ if (smsc95xx_is_macaddr_param(dev, dev->net->dev_addr)) ++ return; ++ + /* try reading mac address from EEPROM */ + if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, + dev->net->dev_addr) == 0) { +Index: linux-3.10-3.10.11/dummy/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1578_305dd66d4eea785e521d50d77b0b91bd29beb4a1.txt 2014-04-28 00:42:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.patch --- linux-3.10.11/debian/patches/rpi/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.patch 2014-04-28 00:42:21.000000000 +0000 @@ -0,0 +1,39 @@ +commit 09926a8d274d91c6a6ec06acb136a6ca28ba8e12 +Author: popcornmix +Date: Tue May 8 23:12:13 2012 +0100 + + possible fix for sdcard missing status. Thank naren + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:20.000000000 +0000 +@@ -1173,6 +1173,14 @@ + return 1; + } + ++static unsigned int sdhci_bcm2708_missing_status(struct sdhci_host *host) ++{ ++ if(host->last_cmdop == MMC_SEND_STATUS) ++ return 1; ++ else ++ return 0; ++} ++ + /***************************************************************************** \ + * * + * Device ops * +@@ -1206,6 +1214,7 @@ + .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc, + .voltage_broken = sdhci_bcm2708_quirk_voltage_broken, + .uhs_broken = sdhci_bcm2708_uhs_broken, ++ .missing_status = sdhci_bcm2708_missing_status, + }; + + /*****************************************************************************\ +Index: linux-3.10-3.10.11/dummy/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1579_09926a8d274d91c6a6ec06acb136a6ca28ba8e12.txt 2014-04-28 00:42:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.patch 2014-04-28 00:42:21.000000000 +0000 @@ -0,0 +1,61 @@ +commit 7d414c7e3a83ce47986da4547878bb2441d6e1a8 +Author: popcornmix +Date: Thu May 17 14:44:19 2012 +0100 + + sdcard patch improvements from naren + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:20.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:21.000000000 +0000 +@@ -886,8 +886,7 @@ + We get CRC and DEND errors unless we wait for + the SD controller to finish reading/writing to the card. */ + u32 state_mask; +- int timeout=1000000; +- hptime_t now = hptime(); ++ int timeout=1000; + + DBG("PDMA over - sync card\n"); + if (data->flags & MMC_DATA_READ) +@@ -895,17 +894,12 @@ + else + state_mask = SDHCI_DOING_WRITE; + +- while (0 != (sdhci_bcm2708_raw_readl(host, +- SDHCI_PRESENT_STATE) & +- state_mask) && --timeout > 0) ++ while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE) ++ & state_mask) && --timeout > 0) ++ { ++ udelay(100); + continue; +- +- if (1000000-timeout > 4000) /*ave. is about 3250*/ +- DBG("%s: note - long %s sync %luns - " +- "%d its.\n", +- mmc_hostname(host->mmc), +- data->flags & MMC_DATA_READ? "read": "write", +- since_ns(now), 1000000-timeout); ++ } + if (timeout <= 0) + printk(KERN_ERR"%s: final %s to SD card still " + "running\n", +@@ -1175,10 +1169,7 @@ + + static unsigned int sdhci_bcm2708_missing_status(struct sdhci_host *host) + { +- if(host->last_cmdop == MMC_SEND_STATUS) +- return 1; +- else +- return 0; ++ return 1; + } + + /***************************************************************************** \ +Index: linux-3.10-3.10.11/dummy/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1580_7d414c7e3a83ce47986da4547878bb2441d6e1a8.txt 2014-04-28 00:42:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.patch 2014-04-28 00:42:22.000000000 +0000 @@ -0,0 +1,28 @@ +commit f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1 +Author: Grigori Goronzy +Date: Mon Jun 4 04:27:48 2012 +0200 + + sdhci-bcm2708: speed up DMA sync + + Experiments show that it doesn't really take that long to sync, so we + can reduce the poll interval slightly. Might improve performance a bit. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:22.000000000 +0000 +@@ -897,7 +897,7 @@ + while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE) + & state_mask) && --timeout > 0) + { +- udelay(100); ++ udelay(30); + continue; + } + if (timeout <= 0) +Index: linux-3.10-3.10.11/dummy/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1581_f9b5de7a50d4a6ffbf3e7344d2c50828b044c4b1.txt 2014-04-28 00:42:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.patch --- linux-3.10.11/debian/patches/rpi/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.patch 2014-04-28 00:42:23.000000000 +0000 @@ -0,0 +1,101 @@ +commit 2967716086cc8aa21cfcd40b82a96b82abf3f418 +Author: Grigori Goronzy +Date: Mon Jun 11 18:52:04 2012 +0200 + + sdhci-bcm2708: remove custom clock handling + + The custom clock handling code is redundant and buggy. The MMC/SDHCI + subsystem does a better job than it, so remove it for good. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:22.000000000 +0000 +@@ -353,68 +353,9 @@ + + static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host) + { +- return 20000000; // this value is in Hz (20MHz) ++ return BCM2708_EMMC_CLOCK_FREQ; + } + +-static unsigned int sdhci_bcm2708_get_timeout_clock(struct sdhci_host *host) +-{ +- if(host->clock) +- return (host->clock / 1000); // this value is in kHz (100MHz) +- else +- return (sdhci_bcm2708_get_max_clock(host) / 1000); +-} +- +-static void sdhci_bcm2708_set_clock(struct sdhci_host *host, unsigned int clock) +-{ +- int div = 0; +- u16 clk = 0; +- unsigned long timeout; +- +- if (clock == host->clock) +- return; +- +- sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); +- +- if (clock == 0) +- goto out; +- +- if (BCM2708_EMMC_CLOCK_FREQ <= clock) +- div = 1; +- else { +- for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { +- if ((BCM2708_EMMC_CLOCK_FREQ / div) <= clock) +- break; +- } +- } +- +- DBG( "desired SD clock: %d, actual: %d\n", +- clock, BCM2708_EMMC_CLOCK_FREQ / div); +- +- clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; +- clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) +- << SDHCI_DIVIDER_HI_SHIFT; +- clk |= SDHCI_CLOCK_INT_EN; +- +- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); +- +- timeout = 20; +- while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) +- & SDHCI_CLOCK_INT_STABLE)) { +- if (timeout == 0) { +- printk(KERN_ERR "%s: Internal clock never " +- "stabilised.\n", mmc_hostname(host->mmc)); +- return; +- } +- timeout--; +- mdelay(1); +- } +- +- clk |= SDHCI_CLOCK_CARD_EN; +- sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); +-out: +- host->clock = clock; +- } +- + /*****************************************************************************\ + * * + * DMA Operation * +@@ -1189,11 +1130,7 @@ + #else + #error The BCM2708 SDHCI driver needs CONFIG_MMC_SDHCI_IO_ACCESSORS to be set + #endif +- //.enable_dma = NULL, +- .set_clock = sdhci_bcm2708_set_clock, + .get_max_clock = sdhci_bcm2708_get_max_clock, +- //.get_min_clock = NULL, +- .get_timeout_clock = sdhci_bcm2708_get_timeout_clock, + + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + // Platform DMA operations +Index: linux-3.10-3.10.11/dummy/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1582_2967716086cc8aa21cfcd40b82a96b82abf3f418.txt 2014-04-28 00:42:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.patch --- linux-3.10.11/debian/patches/rpi/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.patch 2014-04-28 00:42:24.000000000 +0000 @@ -0,0 +1,33 @@ +commit 4577015e828d706fc9d48fe912b31e8760016837 +Author: Grigori Goronzy +Date: Mon Jun 11 18:53:59 2012 +0200 + + sdhci-bcm2708: add additional quirks + + Some additional quirks are needed for correct operation. + There's no SDHCI capabilities register documented, and it always reads + zero, so add SDHCI_QUIRK_MISSING_CAPS. Apparently + SDHCI_QUIRK_NO_HISPD_BIT is needed for many cards to work correctly in + high-speed mode, so add it as well. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:22.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:23.000000000 +0000 +@@ -1189,7 +1189,9 @@ + host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | +- SDHCI_QUIRK_NONSTANDARD_CLOCK; ++ SDHCI_QUIRK_MISSING_CAPS | ++ SDHCI_QUIRK_NO_HISPD_BIT; ++ + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + host->flags = SDHCI_USE_PLATDMA; + #endif +Index: linux-3.10-3.10.11/dummy/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1583_4577015e828d706fc9d48fe912b31e8760016837.txt 2014-04-28 00:42:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.patch 2014-04-28 00:42:24.000000000 +0000 @@ -0,0 +1,51 @@ +commit fdc3114aea4a8c869fb3478b1b2563bf595dcb6c +Author: Grigori Goronzy +Date: Mon Jun 11 18:57:13 2012 +0200 + + sdhci-bcm2708: add allow_highspeed parameter + + Add a parameter to disable high-speed mode for the few cards that + still might have problems. High-speed mode is enabled by default. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:23.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:24.000000000 +0000 +@@ -129,6 +129,8 @@ + return (unsigned long)((hptime() - t) * HPTIME_CLK_NS); + } + ++static bool allow_highspeed = 1; ++ + #if 0 + static void hptime_test(void) + { +@@ -1254,7 +1256,8 @@ + host_priv->dma_chan, host_priv->dma_chan_base, + host_priv->dma_irq); + +- host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; ++ if (allow_highspeed) ++ host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; + #endif + + ret = sdhci_add_host(host); +@@ -1357,8 +1360,12 @@ + module_init(sdhci_drv_init); + module_exit(sdhci_drv_exit); + ++module_param(allow_highspeed, bool, 0444); ++ + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); + MODULE_LICENSE("GPL v2"); + MODULE_ALIAS("platform:"DRIVER_NAME); + ++MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes"); ++ +Index: linux-3.10-3.10.11/dummy/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1584_fdc3114aea4a8c869fb3478b1b2563bf595dcb6c.txt 2014-04-28 00:42:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.patch --- linux-3.10.11/debian/patches/rpi/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.patch 2014-04-28 00:42:25.000000000 +0000 @@ -0,0 +1,29 @@ +commit 4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee +Author: Grigori Goronzy +Date: Mon Jun 11 18:58:40 2012 +0200 + + sdhci-bcm2708: assume 50 MHz eMMC clock + + 80 MHz clock isnt't suited well to be dividable to get SD clocks of 25 + MHz (default mode) or 50 MHz (high speed mode). 50 MHz are perfect to + drive the SD interface at ideal frequencies. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:24.000000000 +0000 +@@ -73,7 +73,7 @@ + #define BCM2708_SDHCI_SLEEP_TIMEOUT 1000 /* msecs */ + + /* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */ +-#define BCM2708_EMMC_CLOCK_FREQ 80000000 ++#define BCM2708_EMMC_CLOCK_FREQ 50000000 + + /*****************************************************************************\ + * * +Index: linux-3.10-3.10.11/dummy/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1585_4144c02c7b8e4f9c3d3a5be8d33d05da98a01bee.txt 2014-04-28 00:42:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.patch --- linux-3.10.11/debian/patches/rpi/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.patch 2014-04-28 00:42:26.000000000 +0000 @@ -0,0 +1,48 @@ +commit 819cbdd1d18f150070257737b0b20de6536eac48 +Author: popcornmix +Date: Sat Jun 16 22:31:55 2012 +0100 + + Allow emmc clock to be specified as command line parameter + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:24.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:25.000000000 +0000 +@@ -130,6 +130,7 @@ + } + + static bool allow_highspeed = 1; ++static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; + + #if 0 + static void hptime_test(void) +@@ -355,7 +356,7 @@ + + static unsigned int sdhci_bcm2708_get_max_clock(struct sdhci_host *host) + { +- return BCM2708_EMMC_CLOCK_FREQ; ++ return emmc_clock_freq; + } + + /*****************************************************************************\ +@@ -1361,6 +1362,7 @@ + module_exit(sdhci_drv_exit); + + module_param(allow_highspeed, bool, 0444); ++module_param(emmc_clock_freq, int, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +@@ -1368,4 +1370,6 @@ + MODULE_ALIAS("platform:"DRIVER_NAME); + + MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes"); ++MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); ++ + +Index: linux-3.10-3.10.11/dummy/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1586_819cbdd1d18f150070257737b0b20de6536eac48.txt 2014-04-28 00:42:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.patch 2014-04-28 00:42:26.000000000 +0000 @@ -0,0 +1,33 @@ +commit 0b7e7118e70e9818bad0a71920bd53081d68030f +Author: popcornmix +Date: Sat Jun 16 22:35:38 2012 +0100 + + sdhci-bcm2708: raise DMA sync timeout + + Commit d64b84c by accident reduced the maximum overall DMA sync + timeout. The maximum overall timeout was reduced from 100ms to 30ms, + which isn't enough for many cards. Increase it to 150ms, just to be + extra safe. According to commit 872a8ff in the MMC subsystem, some + cards require crazy long timeouts (3s), but as we're busy-waiting, + and shouldn't delay for such a long time, let's hope 150ms will be + enough for most cards. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:26.000000000 +0000 +@@ -830,7 +830,7 @@ + We get CRC and DEND errors unless we wait for + the SD controller to finish reading/writing to the card. */ + u32 state_mask; +- int timeout=1000; ++ int timeout=5000; + + DBG("PDMA over - sync card\n"); + if (data->flags & MMC_DATA_READ) +Index: linux-3.10-3.10.11/dummy/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1587_0b7e7118e70e9818bad0a71920bd53081d68030f.txt 2014-04-28 00:42:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.patch --- linux-3.10.11/debian/patches/rpi/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.patch 2014-04-28 00:42:27.000000000 +0000 @@ -0,0 +1,49 @@ +commit e5e555972aae9453fc6c13b104b8e33f14461e71 +Author: popcornmix +Date: Fri Jun 22 12:57:42 2012 +0100 + + Use ndelay rather than udelay. Thanks lb + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:27.000000000 +0000 +@@ -249,14 +249,14 @@ + if (now == last_write_hpt || now == last_write_hpt+1) { + /* we can't guarantee any significant time has + * passed - we'll have to wait anyway ! */ +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } else + { + /* we must have waited at least this many ns: */ + unsigned int ns_wait = HPTIME_CLK_NS * + (last_write_hpt - now - 1); + if (ns_wait < ns_2clk) +- udelay((ns_2clk-ns_wait+500)/1000); ++ ndelay(ns_2clk - ns_wait); + } + last_write_hpt = now; + } +@@ -272,13 +272,13 @@ + ier &= ~SDHCI_INT_DATA_TIMEOUT; + writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); + timeout_disabled = true; +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } else if (timeout_disabled) { + ier = readl(host->ioaddr + SDHCI_SIGNAL_ENABLE); + ier |= SDHCI_INT_DATA_TIMEOUT; + writel(ier, host->ioaddr + SDHCI_SIGNAL_ENABLE); + timeout_disabled = false; +- udelay((ns_2clk+1000-1)/1000); ++ ndelay(ns_2clk); + } + #endif + writel(val, host->ioaddr + reg); +Index: linux-3.10-3.10.11/dummy/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1588_e5e555972aae9453fc6c13b104b8e33f14461e71.txt 2014-04-28 00:42:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.patch 2014-04-28 00:42:29.000000000 +0000 @@ -0,0 +1,1297 @@ +commit 399a83c5184de918ab790b47c43148313ae5e7cc +Author: popcornmix +Date: Wed Jul 3 00:41:10 2013 +0100 + + Backport of Chris Boot's i2c and spi drivers. + +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_cutdown_defconfig 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_cutdown_defconfig 2014-04-28 00:42:27.000000000 +0000 +@@ -492,3 +492,13 @@ + # CONFIG_CRYPTO_HW is not set + CONFIG_CRC_ITU_T=y + CONFIG_LIBCRC32C=y ++CONFIG_I2C=y ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_COMPAT=y ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_HELPER_AUTO=y ++CONFIG_I2C_BCM2708=m ++CONFIG_SPI=y ++CONFIG_SPI_MASTER=y ++CONFIG_SPI_BCM2708=m ++ +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:27.000000000 +0000 +@@ -214,6 +214,11 @@ + CONFIG_SERIAL_AMBA_PL011_CONSOLE=y + # CONFIG_HW_RANDOM is not set + CONFIG_RAW_DRIVER=y ++CONFIG_I2C=y ++CONFIG_I2C_CHARDEV=m ++CONFIG_I2C_BCM2708=m ++CONFIG_SPI=y ++CONFIG_SPI_BCM2708=m + CONFIG_GPIO_SYSFS=y + # CONFIG_HWMON is not set + CONFIG_WATCHDOG=y +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/Kconfig 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig 2014-04-28 00:42:27.000000000 +0000 +@@ -31,4 +31,11 @@ + help + Do not allow ARM to use GPU's L2 cache. Requires disable_l2cache in config.txt. + ++config BCM2708_SPIDEV ++ bool "Bind spidev to SPI0 master" ++ depends on MACH_BCM2708 ++ depends on SPI ++ default y ++ help ++ Binds spidev driver to the SPI0 master + endmenu +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:27.000000000 +0000 +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -198,7 +199,6 @@ + + /* warning - the USB needs a clock > 34MHz */ + +-#ifdef CONFIG_MMC_BCM2708 + static struct clk sdhost_clk = { + #ifdef CONFIG_ARCH_BCM2708_CHIPIT + .rate = 4000000, /* 4MHz */ +@@ -206,7 +206,6 @@ + .rate = 250000000, /* 250MHz */ + #endif + }; +-#endif + + static struct clk_lookup lookups[] = { + { /* UART0 */ +@@ -216,6 +215,15 @@ + { /* USB */ + .dev_id = "bcm2708_usb", + .clk = &osc_clk, ++ }, { /* SPI */ ++ .dev_id = "bcm2708_spi.0", ++ .clk = &sdhost_clk, ++ }, { /* BSC0 */ ++ .dev_id = "bcm2708_i2c.0", ++ .clk = &sdhost_clk, ++ }, { /* BSC1 */ ++ .dev_id = "bcm2708_i2c.1", ++ .clk = &sdhost_clk, + } + }; + +@@ -434,6 +442,89 @@ + }, + }; + ++static struct resource bcm2708_spi_resources[] = { ++ { ++ .start = SPI0_BASE, ++ .end = SPI0_BASE + SZ_256 - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = IRQ_SPI, ++ .end = IRQ_SPI, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++ ++static u64 bcm2708_spi_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); ++static struct platform_device bcm2708_spi_device = { ++ .name = "bcm2708_spi", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(bcm2708_spi_resources), ++ .resource = bcm2708_spi_resources, ++ .dev = { ++ .dma_mask = &bcm2708_spi_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON)}, ++}; ++ ++#ifdef CONFIG_BCM2708_SPIDEV ++static struct spi_board_info bcm2708_spi_devices[] = { ++#ifdef CONFIG_SPI_SPIDEV ++ { ++ .modalias = "spidev", ++ .max_speed_hz = 500000, ++ .bus_num = 0, ++ .chip_select = 0, ++ .mode = SPI_MODE_0, ++ }, { ++ .modalias = "spidev", ++ .max_speed_hz = 500000, ++ .bus_num = 0, ++ .chip_select = 1, ++ .mode = SPI_MODE_0, ++ } ++#endif ++}; ++#endif ++ ++static struct resource bcm2708_bsc0_resources[] = { ++ { ++ .start = BSC0_BASE, ++ .end = BSC0_BASE + SZ_256 - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = INTERRUPT_I2C, ++ .end = INTERRUPT_I2C, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static struct platform_device bcm2708_bsc0_device = { ++ .name = "bcm2708_i2c", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(bcm2708_bsc0_resources), ++ .resource = bcm2708_bsc0_resources, ++}; ++ ++ ++static struct resource bcm2708_bsc1_resources[] = { ++ { ++ .start = BSC1_BASE, ++ .end = BSC1_BASE + SZ_256 - 1, ++ .flags = IORESOURCE_MEM, ++ }, { ++ .start = INTERRUPT_I2C, ++ .end = INTERRUPT_I2C, ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static struct platform_device bcm2708_bsc1_device = { ++ .name = "bcm2708_i2c", ++ .id = 1, ++ .num_resources = ARRAY_SIZE(bcm2708_bsc1_resources), ++ .resource = bcm2708_bsc1_resources, ++}; ++ + int __init bcm_register_device(struct platform_device *pdev) + { + int ret; +@@ -542,12 +633,21 @@ + for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++) + bcm_register_device(&bcm2708_alsa_devices[i]); + ++ bcm_register_device(&bcm2708_spi_device); ++ bcm_register_device(&bcm2708_bsc0_device); ++ bcm_register_device(&bcm2708_bsc1_device); ++ + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; + amba_device_register(d, &iomem_resource); + } + system_rev = boardrev; + system_serial_low = serial; ++ ++#ifdef CONFIG_BCM2708_SPIDEV ++ spi_register_board_info(bcm2708_spi_devices, ++ ARRAY_SIZE(bcm2708_spi_devices)); ++#endif + } + + static void timer_set_mode(enum clock_event_mode mode, +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:27.000000000 +0000 +@@ -63,9 +63,12 @@ + #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO */ + #define UART0_BASE (BCM2708_PERI_BASE + 0x201000) /* Uart 0 */ + #define MMCI0_BASE (BCM2708_PERI_BASE + 0x202000) /* MMC interface */ ++#define SPI0_BASE (BCM2708_PERI_BASE + 0x204000) /* SPI0 */ ++#define BSC0_BASE (BCM2708_PERI_BASE + 0x205000) /* BSC0 I2C/TWI */ + #define UART1_BASE (BCM2708_PERI_BASE + 0x215000) /* Uart 1 */ + #define EMMC_BASE (BCM2708_PERI_BASE + 0x300000) /* eMMC interface */ + #define SMI_BASE (BCM2708_PERI_BASE + 0x600000) /* SMI */ ++#define BSC1_BASE (BCM2708_PERI_BASE + 0x804000) /* BSC1 I2C/TWI */ + #define USB_BASE (BCM2708_PERI_BASE + 0x980000) /* DTC_OTG USB controller */ + #define MCORE_BASE (BCM2708_PERI_BASE + 0x0000) /* Fake frame buffer device (actually the multicore sync block*/ + +Index: linux-3.10-3.10.11/drivers/i2c/busses/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/Kconfig 2014-04-27 23:37:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/Kconfig 2014-04-28 00:42:28.000000000 +0000 +@@ -344,6 +344,14 @@ + This support is also available as a module. If so, the module + will be called i2c-bcm2835. + ++config I2C_BCM2708 ++ tristate "BCM2708 BSC" ++ depends on MACH_BCM2708 ++ help ++ Enabling this option will add BSC (Broadcom Serial Controller) ++ support for the BCM2708. BSC is a Broadcom proprietary bus compatible ++ with I2C/TWI/SMBus. ++ + config I2C_BLACKFIN_TWI + tristate "Blackfin TWI I2C support" + depends on BLACKFIN +Index: linux-3.10-3.10.11/drivers/i2c/busses/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/Makefile 2014-04-27 23:37:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/Makefile 2014-04-28 00:42:28.000000000 +0000 +@@ -32,6 +32,7 @@ + obj-$(CONFIG_I2C_AT91) += i2c-at91.o + obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o + obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o ++obj-$(CONFIG_I2C_BCM2708) += i2c-bcm2708.o + obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o + obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o + obj-$(CONFIG_I2C_CPM) += i2c-cpm.o +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:42:28.000000000 +0000 +@@ -0,0 +1,396 @@ ++/* ++ * Driver for Broadcom BCM2708 BSC Controllers ++ * ++ * Copyright (C) 2012 Chris Boot & Frank Buss ++ * ++ * This driver is inspired by: ++ * i2c-ocores.c, by Peter Korsgaard ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* BSC register offsets */ ++#define BSC_C 0x00 ++#define BSC_S 0x04 ++#define BSC_DLEN 0x08 ++#define BSC_A 0x0c ++#define BSC_FIFO 0x10 ++#define BSC_DIV 0x14 ++#define BSC_DEL 0x18 ++#define BSC_CLKT 0x1c ++ ++/* Bitfields in BSC_C */ ++#define BSC_C_I2CEN 0x00008000 ++#define BSC_C_INTR 0x00000400 ++#define BSC_C_INTT 0x00000200 ++#define BSC_C_INTD 0x00000100 ++#define BSC_C_ST 0x00000080 ++#define BSC_C_CLEAR_1 0x00000020 ++#define BSC_C_CLEAR_2 0x00000010 ++#define BSC_C_READ 0x00000001 ++ ++/* Bitfields in BSC_S */ ++#define BSC_S_CLKT 0x00000200 ++#define BSC_S_ERR 0x00000100 ++#define BSC_S_RXF 0x00000080 ++#define BSC_S_TXE 0x00000040 ++#define BSC_S_RXD 0x00000020 ++#define BSC_S_TXD 0x00000010 ++#define BSC_S_RXR 0x00000008 ++#define BSC_S_TXW 0x00000004 ++#define BSC_S_DONE 0x00000002 ++#define BSC_S_TA 0x00000001 ++ ++#define I2C_CLOCK_HZ 100000 /* FIXME: get from DT */ ++#define I2C_TIMEOUT_MS 150 ++ ++#define DRV_NAME "bcm2708_i2c" ++ ++struct bcm2708_i2c { ++ struct i2c_adapter adapter; ++ ++ spinlock_t lock; ++ void __iomem *base; ++ int irq; ++ struct clk *clk; ++ ++ struct completion done; ++ ++ struct i2c_msg *msg; ++ int pos; ++ int nmsgs; ++ bool error; ++}; ++ ++/* ++ * This function sets the ALT mode on the I2C pins so that we can use them with ++ * the BSC hardware. ++ * ++ * FIXME: This is a hack. Use pinmux / pinctrl. ++ */ ++static void bcm2708_i2c_init_pinmode(void) ++{ ++#define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) ++#define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) ++ ++ int pin; ++ u32 *gpio = ioremap(0x20200000, SZ_16K); ++ ++ /* BSC0 is on GPIO 0 & 1, BSC1 is on GPIO 2 & 3 */ ++ for (pin = 0; pin <= 3; pin++) { ++ INP_GPIO(pin); /* set mode to GPIO input first */ ++ SET_GPIO_ALT(pin, 0); /* set mode to ALT 0 */ ++ } ++ ++ iounmap(gpio); ++ ++#undef INP_GPIO ++#undef SET_GPIO_ALT ++} ++ ++static inline u32 bcm2708_rd(struct bcm2708_i2c *bi, unsigned reg) ++{ ++ return readl(bi->base + reg); ++} ++ ++static inline void bcm2708_wr(struct bcm2708_i2c *bi, unsigned reg, u32 val) ++{ ++ writel(val, bi->base + reg); ++} ++ ++static inline void bcm2708_bsc_reset(struct bcm2708_i2c *bi) ++{ ++ bcm2708_wr(bi, BSC_C, 0); ++ bcm2708_wr(bi, BSC_S, BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE); ++} ++ ++static inline void bcm2708_bsc_fifo_drain(struct bcm2708_i2c *bi) ++{ ++ while ((bcm2708_rd(bi, BSC_S) & BSC_S_RXD) && (bi->pos < bi->msg->len)) ++ bi->msg->buf[bi->pos++] = bcm2708_rd(bi, BSC_FIFO); ++} ++ ++static inline void bcm2708_bsc_fifo_fill(struct bcm2708_i2c *bi) ++{ ++ while ((bcm2708_rd(bi, BSC_S) & BSC_S_TXD) && (bi->pos < bi->msg->len)) ++ bcm2708_wr(bi, BSC_FIFO, bi->msg->buf[bi->pos++]); ++} ++ ++static inline void bcm2708_bsc_setup(struct bcm2708_i2c *bi) ++{ ++ unsigned long bus_hz; ++ u32 cdiv; ++ u32 c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_ST | BSC_C_CLEAR_1; ++ ++ bus_hz = clk_get_rate(bi->clk); ++ cdiv = bus_hz / I2C_CLOCK_HZ; ++ ++ if (bi->msg->flags & I2C_M_RD) ++ c |= BSC_C_INTR | BSC_C_READ; ++ else ++ c |= BSC_C_INTT; ++ ++ bcm2708_wr(bi, BSC_DIV, cdiv); ++ bcm2708_wr(bi, BSC_A, bi->msg->addr); ++ bcm2708_wr(bi, BSC_DLEN, bi->msg->len); ++ bcm2708_wr(bi, BSC_C, c); ++} ++ ++static irqreturn_t bcm2708_i2c_interrupt(int irq, void *dev_id) ++{ ++ struct bcm2708_i2c *bi = dev_id; ++ bool handled = true; ++ u32 s; ++ ++ spin_lock(&bi->lock); ++ ++ s = bcm2708_rd(bi, BSC_S); ++ ++ if (s & (BSC_S_CLKT | BSC_S_ERR)) { ++ bcm2708_bsc_reset(bi); ++ bi->error = true; ++ ++ /* wake up our bh */ ++ complete(&bi->done); ++ } else if (s & BSC_S_DONE) { ++ bi->nmsgs--; ++ ++ if (bi->msg->flags & I2C_M_RD) ++ bcm2708_bsc_fifo_drain(bi); ++ ++ bcm2708_bsc_reset(bi); ++ ++ if (bi->nmsgs) { ++ /* advance to next message */ ++ bi->msg++; ++ bi->pos = 0; ++ bcm2708_bsc_setup(bi); ++ } else { ++ /* wake up our bh */ ++ complete(&bi->done); ++ } ++ } else if (s & BSC_S_TXW) { ++ bcm2708_bsc_fifo_fill(bi); ++ } else if (s & BSC_S_RXR) { ++ bcm2708_bsc_fifo_drain(bi); ++ } else { ++ handled = false; ++ } ++ ++ spin_unlock(&bi->lock); ++ ++ return handled ? IRQ_HANDLED : IRQ_NONE; ++} ++ ++static int bcm2708_i2c_master_xfer(struct i2c_adapter *adap, ++ struct i2c_msg *msgs, int num) ++{ ++ struct bcm2708_i2c *bi = adap->algo_data; ++ unsigned long flags; ++ int ret; ++ ++ spin_lock_irqsave(&bi->lock, flags); ++ ++ INIT_COMPLETION(bi->done); ++ bi->msg = msgs; ++ bi->pos = 0; ++ bi->nmsgs = num; ++ bi->error = false; ++ ++ spin_unlock_irqrestore(&bi->lock, flags); ++ ++ bcm2708_bsc_setup(bi); ++ ++ ret = wait_for_completion_timeout(&bi->done, ++ msecs_to_jiffies(I2C_TIMEOUT_MS)); ++ if (ret == 0) { ++ dev_err(&adap->dev, "transfer timed out\n"); ++ spin_lock_irqsave(&bi->lock, flags); ++ bcm2708_bsc_reset(bi); ++ spin_unlock_irqrestore(&bi->lock, flags); ++ return -ETIMEDOUT; ++ } ++ ++ return bi->error ? -EIO : num; ++} ++ ++static u32 bcm2708_i2c_functionality(struct i2c_adapter *adap) ++{ ++ return I2C_FUNC_I2C | /*I2C_FUNC_10BIT_ADDR |*/ I2C_FUNC_SMBUS_EMUL; ++} ++ ++static struct i2c_algorithm bcm2708_i2c_algorithm = { ++ .master_xfer = bcm2708_i2c_master_xfer, ++ .functionality = bcm2708_i2c_functionality, ++}; ++ ++static int bcm2708_i2c_probe(struct platform_device *pdev) ++{ ++ struct resource *regs; ++ int irq, err = -ENOMEM; ++ struct clk *clk; ++ struct bcm2708_i2c *bi; ++ struct i2c_adapter *adap; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) { ++ dev_err(&pdev->dev, "could not get IO memory\n"); ++ return -ENXIO; ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "could not get IRQ\n"); ++ return irq; ++ } ++ ++ clk = clk_get(&pdev->dev, NULL); ++ if (IS_ERR(clk)) { ++ dev_err(&pdev->dev, "could not find clk: %ld\n", PTR_ERR(clk)); ++ return PTR_ERR(clk); ++ } ++ ++ bcm2708_i2c_init_pinmode(); ++ ++ bi = kzalloc(sizeof(*bi), GFP_KERNEL); ++ if (!bi) ++ goto out_clk_put; ++ ++ platform_set_drvdata(pdev, bi); ++ ++ adap = &bi->adapter; ++ adap->class = I2C_CLASS_HWMON | I2C_CLASS_DDC; ++ adap->algo = &bcm2708_i2c_algorithm; ++ adap->algo_data = bi; ++ adap->dev.parent = &pdev->dev; ++ adap->nr = pdev->id; ++ strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name)); ++ ++ switch (pdev->id) { ++ case 0: ++ adap->class = I2C_CLASS_HWMON; ++ break; ++ case 1: ++ adap->class = I2C_CLASS_DDC; ++ break; ++ default: ++ dev_err(&pdev->dev, "can only bind to BSC 0 or 1\n"); ++ err = -ENXIO; ++ goto out_free_bi; ++ } ++ ++ spin_lock_init(&bi->lock); ++ init_completion(&bi->done); ++ ++ bi->base = ioremap(regs->start, resource_size(regs)); ++ if (!bi->base) { ++ dev_err(&pdev->dev, "could not remap memory\n"); ++ goto out_free_bi; ++ } ++ ++ bi->irq = irq; ++ bi->clk = clk; ++ ++ err = request_irq(irq, bcm2708_i2c_interrupt, IRQF_SHARED, ++ dev_name(&pdev->dev), bi); ++ if (err) { ++ dev_err(&pdev->dev, "could not request IRQ: %d\n", err); ++ goto out_iounmap; ++ } ++ ++ bcm2708_bsc_reset(bi); ++ ++ err = i2c_add_numbered_adapter(adap); ++ if (err < 0) { ++ dev_err(&pdev->dev, "could not add I2C adapter: %d\n", err); ++ goto out_free_irq; ++ } ++ ++ dev_info(&pdev->dev, "BSC%d Controller at 0x%08lx (irq %d)\n", ++ pdev->id, (unsigned long)regs->start, irq); ++ ++ return 0; ++ ++out_free_irq: ++ free_irq(bi->irq, bi); ++out_iounmap: ++ iounmap(bi->base); ++out_free_bi: ++ kfree(bi); ++out_clk_put: ++ clk_put(clk); ++ return err; ++} ++ ++static int bcm2708_i2c_remove(struct platform_device *pdev) ++{ ++ struct bcm2708_i2c *bi = platform_get_drvdata(pdev); ++ ++ platform_set_drvdata(pdev, NULL); ++ ++ i2c_del_adapter(&bi->adapter); ++ free_irq(bi->irq, bi); ++ iounmap(bi->base); ++ clk_disable(bi->clk); ++ clk_put(bi->clk); ++ kfree(bi); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm2708_i2c_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = bcm2708_i2c_probe, ++ .remove = bcm2708_i2c_remove, ++}; ++ ++// module_platform_driver(bcm2708_i2c_driver); ++ ++ ++static int __init bcm2708_i2c_init(void) ++{ ++ return platform_driver_register(&bcm2708_i2c_driver); ++} ++ ++static void __exit bcm2708_i2c_exit(void) ++{ ++ platform_driver_unregister(&bcm2708_i2c_driver); ++} ++ ++module_init(bcm2708_i2c_init); ++module_exit(bcm2708_i2c_exit); ++ ++ ++ ++MODULE_DESCRIPTION("BSC controller driver for Broadcom BCM2708"); ++MODULE_AUTHOR("Chris Boot "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" DRV_NAME); +Index: linux-3.10-3.10.11/drivers/spi/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/spi/Kconfig 2014-04-27 23:37:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/Kconfig 2014-04-28 00:42:28.000000000 +0000 +@@ -86,6 +86,14 @@ + is for the regular SPI controller. Slave mode operation is not also + not supported. + ++config SPI_BCM2708 ++ tristate "BCM2708 SPI controller driver (SPI0)" ++ depends on MACH_BCM2708 ++ help ++ This selects a driver for the Broadcom BCM2708 SPI master (SPI0). This ++ driver is not compatible with the "Universal SPI Master" or the SPI slave ++ device. ++ + config SPI_BFIN5XX + tristate "SPI controller driver for ADI Blackfin5xx" + depends on BLACKFIN +Index: linux-3.10-3.10.11/drivers/spi/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/spi/Makefile 2014-04-27 23:37:15.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/Makefile 2014-04-28 00:42:28.000000000 +0000 +@@ -17,6 +17,7 @@ + obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o + obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o + obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o ++obj-$(CONFIG_SPI_BCM2708) += spi-bcm2708.o + obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o + obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o + obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o +Index: linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c 2014-04-28 00:42:28.000000000 +0000 +@@ -0,0 +1,594 @@ ++/* ++ * Driver for Broadcom BCM2708 SPI Controllers ++ * ++ * Copyright (C) 2012 Chris Boot ++ * ++ * This driver is inspired by: ++ * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos ++ * spi-atmel.c, Copyright (C) 2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++/* SPI register offsets */ ++#define SPI_CS 0x00 ++#define SPI_FIFO 0x04 ++#define SPI_CLK 0x08 ++#define SPI_DLEN 0x0c ++#define SPI_LTOH 0x10 ++#define SPI_DC 0x14 ++ ++/* Bitfields in CS */ ++#define SPI_CS_LEN_LONG 0x02000000 ++#define SPI_CS_DMA_LEN 0x01000000 ++#define SPI_CS_CSPOL2 0x00800000 ++#define SPI_CS_CSPOL1 0x00400000 ++#define SPI_CS_CSPOL0 0x00200000 ++#define SPI_CS_RXF 0x00100000 ++#define SPI_CS_RXR 0x00080000 ++#define SPI_CS_TXD 0x00040000 ++#define SPI_CS_RXD 0x00020000 ++#define SPI_CS_DONE 0x00010000 ++#define SPI_CS_LEN 0x00002000 ++#define SPI_CS_REN 0x00001000 ++#define SPI_CS_ADCS 0x00000800 ++#define SPI_CS_INTR 0x00000400 ++#define SPI_CS_INTD 0x00000200 ++#define SPI_CS_DMAEN 0x00000100 ++#define SPI_CS_TA 0x00000080 ++#define SPI_CS_CSPOL 0x00000040 ++#define SPI_CS_CLEAR_RX 0x00000020 ++#define SPI_CS_CLEAR_TX 0x00000010 ++#define SPI_CS_CPOL 0x00000008 ++#define SPI_CS_CPHA 0x00000004 ++#define SPI_CS_CS_10 0x00000002 ++#define SPI_CS_CS_01 0x00000001 ++ ++#define SPI_TIMEOUT_MS 150 ++ ++#define DRV_NAME "bcm2708_spi" ++ ++struct bcm2708_spi { ++ spinlock_t lock; ++ void __iomem *base; ++ int irq; ++ struct clk *clk; ++ bool stopping; ++ ++ struct list_head queue; ++ struct workqueue_struct *workq; ++ struct work_struct work; ++ struct completion done; ++ ++ const u8 *tx_buf; ++ u8 *rx_buf; ++ int len; ++}; ++ ++struct bcm2708_spi_state { ++ u32 cs; ++ u16 cdiv; ++}; ++ ++/* ++ * This function sets the ALT mode on the SPI pins so that we can use them with ++ * the SPI hardware. ++ * ++ * FIXME: This is a hack. Use pinmux / pinctrl. ++ */ ++static void bcm2708_init_pinmode(void) ++{ ++#define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) ++#define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) ++ ++ int pin; ++ u32 *gpio = ioremap(0x20200000, SZ_16K); ++ ++ /* SPI is on GPIO 7..11 */ ++ for (pin = 7; pin <= 11; pin++) { ++ INP_GPIO(pin); /* set mode to GPIO input first */ ++ SET_GPIO_ALT(pin, 0); /* set mode to ALT 0 */ ++ } ++ ++ iounmap(gpio); ++ ++#undef INP_GPIO ++#undef SET_GPIO_ALT ++} ++ ++static inline u32 bcm2708_rd(struct bcm2708_spi *bs, unsigned reg) ++{ ++ return readl(bs->base + reg); ++} ++ ++static inline void bcm2708_wr(struct bcm2708_spi *bs, unsigned reg, u32 val) ++{ ++ writel(val, bs->base + reg); ++} ++ ++static inline void bcm2708_rd_fifo(struct bcm2708_spi *bs, int len) ++{ ++ u8 byte; ++ ++ while (len--) { ++ byte = bcm2708_rd(bs, SPI_FIFO); ++ if (bs->rx_buf) ++ *bs->rx_buf++ = byte; ++ } ++} ++ ++static inline void bcm2708_wr_fifo(struct bcm2708_spi *bs, int len) ++{ ++ u8 byte; ++ ++ if (len > bs->len) ++ len = bs->len; ++ ++ while (len--) { ++ byte = bs->tx_buf ? *bs->tx_buf++ : 0; ++ bcm2708_wr(bs, SPI_FIFO, byte); ++ bs->len--; ++ } ++} ++ ++static irqreturn_t bcm2708_spi_interrupt(int irq, void *dev_id) ++{ ++ struct spi_master *master = dev_id; ++ struct bcm2708_spi *bs = spi_master_get_devdata(master); ++ u32 cs; ++ ++ spin_lock(&bs->lock); ++ ++ cs = bcm2708_rd(bs, SPI_CS); ++ ++ if (cs & SPI_CS_DONE) { ++ if (bs->len) { /* first interrupt in a transfer */ ++ /* fill the TX fifo with up to 16 bytes */ ++ bcm2708_wr_fifo(bs, 16); ++ } else { /* transfer complete */ ++ /* disable interrupts */ ++ cs &= ~(SPI_CS_INTR | SPI_CS_INTD); ++ bcm2708_wr(bs, SPI_CS, cs); ++ ++ /* drain RX FIFO */ ++ while (cs & SPI_CS_RXD) { ++ bcm2708_rd_fifo(bs, 1); ++ cs = bcm2708_rd(bs, SPI_CS); ++ } ++ ++ /* wake up our bh */ ++ complete(&bs->done); ++ } ++ } else if (cs & SPI_CS_RXR) { ++ /* read 12 bytes of data */ ++ bcm2708_rd_fifo(bs, 12); ++ ++ /* write up to 12 bytes */ ++ bcm2708_wr_fifo(bs, 12); ++ } ++ ++ spin_unlock(&bs->lock); ++ ++ return IRQ_HANDLED; ++} ++ ++static int bcm2708_setup_state(struct spi_master *master, ++ struct device *dev, struct bcm2708_spi_state *state, ++ u32 hz, u8 csel, u8 mode, u8 bpw) ++{ ++ struct bcm2708_spi *bs = spi_master_get_devdata(master); ++ int cdiv; ++ unsigned long bus_hz; ++ u32 cs = 0; ++ ++ bus_hz = clk_get_rate(bs->clk); ++ ++ if (hz >= bus_hz) { ++ cdiv = 2; /* bus_hz / 2 is as fast as we can go */ ++ } else if (hz) { ++ cdiv = DIV_ROUND_UP(bus_hz, hz); ++ ++ /* CDIV must be a power of 2, so round up */ ++ cdiv = roundup_pow_of_two(cdiv); ++ ++ if (cdiv > 65536) { ++ dev_dbg(dev, ++ "setup: %d Hz too slow, cdiv %u; min %ld Hz\n", ++ hz, cdiv, bus_hz / 65536); ++ return -EINVAL; ++ } else if (cdiv == 65536) { ++ cdiv = 0; ++ } else if (cdiv == 1) { ++ cdiv = 2; /* 1 gets rounded down to 0; == 65536 */ ++ } ++ } else { ++ cdiv = 0; ++ } ++ ++ switch (bpw) { ++ case 8: ++ break; ++ default: ++ dev_dbg(dev, "setup: invalid bits_per_word %u (must be 8)\n", ++ bpw); ++ return -EINVAL; ++ } ++ ++ if (mode & SPI_CPOL) ++ cs |= SPI_CS_CPOL; ++ if (mode & SPI_CPHA) ++ cs |= SPI_CS_CPHA; ++ ++ if (!(mode & SPI_NO_CS)) { ++ if (mode & SPI_CS_HIGH) { ++ cs |= SPI_CS_CSPOL; ++ cs |= SPI_CS_CSPOL0 << csel; ++ } ++ ++ cs |= csel; ++ } else { ++ cs |= SPI_CS_CS_10 | SPI_CS_CS_01; ++ } ++ ++ if (state) { ++ state->cs = cs; ++ state->cdiv = cdiv; ++ } ++ ++ return 0; ++} ++ ++static int bcm2708_process_transfer(struct bcm2708_spi *bs, ++ struct spi_message *msg, struct spi_transfer *xfer) ++{ ++ struct spi_device *spi = msg->spi; ++ struct bcm2708_spi_state state, *stp; ++ int ret; ++ u32 cs; ++ ++ if (bs->stopping) ++ return -ESHUTDOWN; ++ ++ if (xfer->bits_per_word || xfer->speed_hz) { ++ ret = bcm2708_setup_state(spi->master, &spi->dev, &state, ++ spi->max_speed_hz, spi->chip_select, spi->mode, ++ spi->bits_per_word); ++ if (ret) ++ return ret; ++ ++ stp = &state; ++ } else { ++ stp = spi->controller_state; ++ } ++ ++ INIT_COMPLETION(bs->done); ++ bs->tx_buf = xfer->tx_buf; ++ bs->rx_buf = xfer->rx_buf; ++ bs->len = xfer->len; ++ ++ cs = stp->cs | SPI_CS_INTR | SPI_CS_INTD | SPI_CS_TA; ++ ++ bcm2708_wr(bs, SPI_CLK, stp->cdiv); ++ bcm2708_wr(bs, SPI_CS, cs); ++ ++ ret = wait_for_completion_timeout(&bs->done, ++ msecs_to_jiffies(SPI_TIMEOUT_MS)); ++ if (ret == 0) { ++ dev_err(&spi->dev, "transfer timed out\n"); ++ return -ETIMEDOUT; ++ } ++ ++ if (xfer->delay_usecs) ++ udelay(xfer->delay_usecs); ++ ++ if (list_is_last(&xfer->transfer_list, &msg->transfers) || ++ xfer->cs_change) { ++ /* clear TA and interrupt flags */ ++ bcm2708_wr(bs, SPI_CS, stp->cs); ++ } ++ ++ msg->actual_length += (xfer->len - bs->len); ++ ++ return 0; ++} ++ ++static void bcm2708_work(struct work_struct *work) ++{ ++ struct bcm2708_spi *bs = container_of(work, struct bcm2708_spi, work); ++ unsigned long flags; ++ struct spi_message *msg; ++ struct spi_transfer *xfer; ++ int status = 0; ++ ++ spin_lock_irqsave(&bs->lock, flags); ++ while (!list_empty(&bs->queue)) { ++ msg = list_first_entry(&bs->queue, struct spi_message, queue); ++ list_del_init(&msg->queue); ++ spin_unlock_irqrestore(&bs->lock, flags); ++ ++ list_for_each_entry(xfer, &msg->transfers, transfer_list) { ++ status = bcm2708_process_transfer(bs, msg, xfer); ++ if (status) ++ break; ++ } ++ ++ msg->status = status; ++ msg->complete(msg->context); ++ ++ spin_lock_irqsave(&bs->lock, flags); ++ } ++ spin_unlock_irqrestore(&bs->lock, flags); ++} ++ ++static int bcm2708_spi_setup(struct spi_device *spi) ++{ ++ struct bcm2708_spi *bs = spi_master_get_devdata(spi->master); ++ struct bcm2708_spi_state *state; ++ int ret; ++ ++ if (bs->stopping) ++ return -ESHUTDOWN; ++ ++ if (!(spi->mode & SPI_NO_CS) && ++ (spi->chip_select > spi->master->num_chipselect)) { ++ dev_dbg(&spi->dev, ++ "setup: invalid chipselect %u (%u defined)\n", ++ spi->chip_select, spi->master->num_chipselect); ++ return -EINVAL; ++ } ++ ++ state = spi->controller_state; ++ if (!state) { ++ state = kzalloc(sizeof(*state), GFP_KERNEL); ++ if (!state) ++ return -ENOMEM; ++ ++ spi->controller_state = state; ++ } ++ ++ ret = bcm2708_setup_state(spi->master, &spi->dev, state, ++ spi->max_speed_hz, spi->chip_select, spi->mode, ++ spi->bits_per_word); ++ if (ret < 0) { ++ kfree(state); ++ spi->controller_state = NULL; ++ } ++ ++ dev_dbg(&spi->dev, ++ "setup: cd %d: %d Hz, bpw %u, mode 0x%x -> CS=%08x CDIV=%04x\n", ++ spi->chip_select, spi->max_speed_hz, spi->bits_per_word, ++ spi->mode, state->cs, state->cdiv); ++ ++ return 0; ++} ++ ++static int bcm2708_spi_transfer(struct spi_device *spi, struct spi_message *msg) ++{ ++ struct bcm2708_spi *bs = spi_master_get_devdata(spi->master); ++ struct spi_transfer *xfer; ++ int ret; ++ unsigned long flags; ++ ++ if (unlikely(list_empty(&msg->transfers))) ++ return -EINVAL; ++ ++ if (bs->stopping) ++ return -ESHUTDOWN; ++ ++ list_for_each_entry(xfer, &msg->transfers, transfer_list) { ++ if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) { ++ dev_dbg(&spi->dev, "missing rx or tx buf\n"); ++ return -EINVAL; ++ } ++ ++ if (!xfer->bits_per_word || xfer->speed_hz) ++ continue; ++ ++ ret = bcm2708_setup_state(spi->master, &spi->dev, NULL, ++ xfer->speed_hz ? xfer->speed_hz : spi->max_speed_hz, ++ spi->chip_select, spi->mode, ++ xfer->bits_per_word ? xfer->bits_per_word : ++ spi->bits_per_word); ++ if (ret) ++ return ret; ++ } ++ ++ msg->status = -EINPROGRESS; ++ msg->actual_length = 0; ++ ++ spin_lock_irqsave(&bs->lock, flags); ++ list_add_tail(&msg->queue, &bs->queue); ++ queue_work(bs->workq, &bs->work); ++ spin_unlock_irqrestore(&bs->lock, flags); ++ ++ return 0; ++} ++ ++static void bcm2708_spi_cleanup(struct spi_device *spi) ++{ ++ if (spi->controller_state) { ++ kfree(spi->controller_state); ++ spi->controller_state = NULL; ++ } ++} ++ ++static int bcm2708_spi_probe(struct platform_device *pdev) ++{ ++ struct resource *regs; ++ int irq, err = -ENOMEM; ++ struct clk *clk; ++ struct spi_master *master; ++ struct bcm2708_spi *bs; ++ ++ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!regs) { ++ dev_err(&pdev->dev, "could not get IO memory\n"); ++ return -ENXIO; ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(&pdev->dev, "could not get IRQ\n"); ++ return irq; ++ } ++ ++ clk = clk_get(&pdev->dev, NULL); ++ if (IS_ERR(clk)) { ++ dev_err(&pdev->dev, "could not find clk: %ld\n", PTR_ERR(clk)); ++ return PTR_ERR(clk); ++ } ++ ++ bcm2708_init_pinmode(); ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*bs)); ++ if (!master) { ++ dev_err(&pdev->dev, "spi_alloc_master() failed\n"); ++ goto out_clk_put; ++ } ++ ++ /* the spi->mode bits understood by this driver: */ ++ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_NO_CS; ++ ++ master->bus_num = pdev->id; ++ master->num_chipselect = 3; ++ master->setup = bcm2708_spi_setup; ++ master->transfer = bcm2708_spi_transfer; ++ master->cleanup = bcm2708_spi_cleanup; ++ platform_set_drvdata(pdev, master); ++ ++ bs = spi_master_get_devdata(master); ++ ++ spin_lock_init(&bs->lock); ++ INIT_LIST_HEAD(&bs->queue); ++ init_completion(&bs->done); ++ INIT_WORK(&bs->work, bcm2708_work); ++ ++ bs->base = ioremap(regs->start, resource_size(regs)); ++ if (!bs->base) { ++ dev_err(&pdev->dev, "could not remap memory\n"); ++ goto out_master_put; ++ } ++ ++ bs->workq = create_singlethread_workqueue(dev_name(&pdev->dev)); ++ if (!bs->workq) { ++ dev_err(&pdev->dev, "could not create workqueue\n"); ++ goto out_iounmap; ++ } ++ ++ bs->irq = irq; ++ bs->clk = clk; ++ bs->stopping = false; ++ ++ err = request_irq(irq, bcm2708_spi_interrupt, 0, dev_name(&pdev->dev), ++ master); ++ if (err) { ++ dev_err(&pdev->dev, "could not request IRQ: %d\n", err); ++ goto out_workqueue; ++ } ++ ++ /* initialise the hardware */ ++ clk_enable(clk); ++ bcm2708_wr(bs, SPI_CS, SPI_CS_REN | SPI_CS_CLEAR_RX | SPI_CS_CLEAR_TX); ++ ++ err = spi_register_master(master); ++ if (err) { ++ dev_err(&pdev->dev, "could not register SPI master: %d\n", err); ++ goto out_free_irq; ++ } ++ ++ dev_info(&pdev->dev, "SPI Controller at 0x%08lx (irq %d)\n", ++ (unsigned long)regs->start, irq); ++ ++ return 0; ++ ++out_free_irq: ++ free_irq(bs->irq, master); ++out_workqueue: ++ destroy_workqueue(bs->workq); ++out_iounmap: ++ iounmap(bs->base); ++out_master_put: ++ spi_master_put(master); ++out_clk_put: ++ clk_put(clk); ++ return err; ++} ++ ++static int bcm2708_spi_remove(struct platform_device *pdev) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm2708_spi *bs = spi_master_get_devdata(master); ++ ++ /* reset the hardware and block queue progress */ ++ spin_lock_irq(&bs->lock); ++ bs->stopping = true; ++ bcm2708_wr(bs, SPI_CS, SPI_CS_CLEAR_RX | SPI_CS_CLEAR_TX); ++ spin_unlock_irq(&bs->lock); ++ ++ flush_work_sync(&bs->work); ++ ++ clk_disable(bs->clk); ++ clk_put(bs->clk); ++ free_irq(bs->irq, master); ++ iounmap(bs->base); ++ ++ spi_unregister_master(master); ++ ++ return 0; ++} ++ ++static struct platform_driver bcm2708_spi_driver = { ++ .driver = { ++ .name = DRV_NAME, ++ .owner = THIS_MODULE, ++ }, ++ .probe = bcm2708_spi_probe, ++ .remove = bcm2708_spi_remove, ++}; ++ ++ ++static int __init bcm2708_spi_init(void) ++{ ++ return platform_driver_probe(&bcm2708_spi_driver, bcm2708_spi_probe); ++} ++module_init(bcm2708_spi_init); ++ ++static void __exit bcm2708_spi_exit(void) ++{ ++ platform_driver_unregister(&bcm2708_spi_driver); ++} ++module_exit(bcm2708_spi_exit); ++ ++ ++//module_platform_driver(bcm2708_spi_driver); ++ ++MODULE_DESCRIPTION("SPI controller driver for Broadcom BCM2708"); ++MODULE_AUTHOR("Chris Boot "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:" DRV_NAME); +Index: linux-3.10-3.10.11/dummy/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1589_399a83c5184de918ab790b47c43148313ae5e7cc.txt 2014-04-28 00:42:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.patch 2014-04-28 00:42:30.000000000 +0000 @@ -0,0 +1,118 @@ +commit 8e39b3019b3494305d87b7489820178580369eb7 +Author: popcornmix +Date: Tue Jul 17 00:48:27 2012 +0100 + + Add sync_after_dma module parameter + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:29.000000000 +0000 +@@ -51,7 +51,6 @@ + #undef CONFIG_MMC_SDHCI_BCM2708_DMA + #define CONFIG_MMC_SDHCI_BCM2708_DMA y + +-#define USE_SYNC_AFTER_DMA + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + /* #define CHECK_DMA_USE */ + #endif +@@ -131,6 +130,7 @@ + + static bool allow_highspeed = 1; + static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; ++static bool sync_after_dma = 1; + + #if 0 + static void hptime_test(void) +@@ -822,34 +822,34 @@ + SDHCI_INT_SPACE_AVAIL); + } + } else { +-#ifdef USE_SYNC_AFTER_DMA +- /* On the Arasan controller the stop command (which will be +- scheduled after this completes) does not seem to work +- properly if we allow it to be issued when we are +- transferring data to/from the SD card. +- We get CRC and DEND errors unless we wait for +- the SD controller to finish reading/writing to the card. */ +- u32 state_mask; +- int timeout=5000; ++ if (sync_after_dma) { ++ /* On the Arasan controller the stop command (which will be ++ scheduled after this completes) does not seem to work ++ properly if we allow it to be issued when we are ++ transferring data to/from the SD card. ++ We get CRC and DEND errors unless we wait for ++ the SD controller to finish reading/writing to the card. */ ++ u32 state_mask; ++ int timeout=30*5000; + +- DBG("PDMA over - sync card\n"); +- if (data->flags & MMC_DATA_READ) +- state_mask = SDHCI_DOING_READ; +- else +- state_mask = SDHCI_DOING_WRITE; ++ DBG("PDMA over - sync card\n"); ++ if (data->flags & MMC_DATA_READ) ++ state_mask = SDHCI_DOING_READ; ++ else ++ state_mask = SDHCI_DOING_WRITE; + +- while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE) +- & state_mask) && --timeout > 0) +- { +- udelay(30); +- continue; ++ while (0 != (sdhci_bcm2708_raw_readl(host, SDHCI_PRESENT_STATE) ++ & state_mask) && --timeout > 0) ++ { ++ udelay(1); ++ continue; ++ } ++ if (timeout <= 0) ++ printk(KERN_ERR"%s: final %s to SD card still " ++ "running\n", ++ mmc_hostname(host->mmc), ++ data->flags & MMC_DATA_READ? "read": "write"); + } +- if (timeout <= 0) +- printk(KERN_ERR"%s: final %s to SD card still " +- "running\n", +- mmc_hostname(host->mmc), +- data->flags & MMC_DATA_READ? "read": "write"); +-#endif + if (host_priv->complete) { + (*host_priv->complete)(host); + DBG("PDMA %s complete\n", +@@ -1193,7 +1193,9 @@ + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | + SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | + SDHCI_QUIRK_MISSING_CAPS | +- SDHCI_QUIRK_NO_HISPD_BIT; ++ SDHCI_QUIRK_NO_HISPD_BIT | ++ (sync_after_dma ? 0:SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12); ++ + + #ifdef CONFIG_MMC_SDHCI_BCM2708_DMA + host->flags = SDHCI_USE_PLATDMA; +@@ -1363,6 +1365,7 @@ + + module_param(allow_highspeed, bool, 0444); + module_param(emmc_clock_freq, int, 0444); ++module_param(sync_after_dma, bool, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +@@ -1371,5 +1374,6 @@ + + MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes"); + MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); ++MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete"); + + +Index: linux-3.10-3.10.11/dummy/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1590_8e39b3019b3494305d87b7489820178580369eb7.txt 2014-04-28 00:42:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.patch 2014-04-28 00:42:30.000000000 +0000 @@ -0,0 +1,54 @@ +commit fbb8e17c5dbf231b960e260a33c9bf414c9139b8 +Author: popcornmix +Date: Sun May 12 12:25:52 2013 +0100 + + sdhci-bcm2708: use extension FIFO to buffer DMA transfers + + The additional FIFO might speed up transfers in some cases. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:29.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:30.000000000 +0000 +@@ -74,6 +74,9 @@ + /* Mhz clock that the EMMC core is running at. Should match the platform clockman settings */ + #define BCM2708_EMMC_CLOCK_FREQ 50000000 + ++#define REG_EXRDFIFO_EN 0x80 ++#define REG_EXRDFIFO_CFG 0x84 ++ + /*****************************************************************************\ + * * + * Debug * +@@ -957,10 +960,12 @@ + int on = simple_strtol(buf, NULL, 0); + if (on) { + host->flags |= SDHCI_USE_PLATDMA; ++ sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN); + printk(KERN_INFO "%s: DMA enabled\n", + mmc_hostname(host->mmc)); + } else { + host->flags &= ~(SDHCI_USE_PLATDMA | SDHCI_REQ_USE_DMA); ++ sdhci_bcm2708_writel(host, 0, REG_EXRDFIFO_EN); + printk(KERN_INFO "%s: DMA disabled\n", + mmc_hostname(host->mmc)); + } +@@ -1272,6 +1277,12 @@ + ret = device_create_file(&pdev->dev, &dev_attr_dma_wait); + ret = device_create_file(&pdev->dev, &dev_attr_status); + ++#ifdef CONFIG_MMC_SDHCI_BCM2708_DMA ++ /* enable extension fifo for paced DMA transfers */ ++ sdhci_bcm2708_writel(host, 1, REG_EXRDFIFO_EN); ++ sdhci_bcm2708_writel(host, 4, REG_EXRDFIFO_CFG); ++#endif ++ + printk(KERN_INFO "%s: BCM2708 SDHC host at 0x%08llx DMA %d IRQ %d\n", + mmc_hostname(host->mmc), (unsigned long long)iomem->start, + host_priv->dma_chan, host_priv->dma_irq); +Index: linux-3.10-3.10.11/dummy/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1591_fbb8e17c5dbf231b960e260a33c9bf414c9139b8.txt 2014-04-28 00:42:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.patch 2014-04-28 00:42:31.000000000 +0000 @@ -0,0 +1,56 @@ +commit 502ff5d8c9e0f6f7242fcc964dedafb752b40f5b +Author: popcornmix +Date: Wed Jul 3 00:42:49 2013 +0100 + + sdhci-bcm2708: use multiblock-type transfers for single blocks + + There are issues with both single block reads (missed completion) + and writes (data loss in some cases!). Just don't do single block + transfers anymore, and treat them like multiblock transfers. This + adds a quirk for this and uses it. + +Index: linux-3.10-3.10.11/drivers/mmc/card/block.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/card/block.c 2014-04-27 23:37:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/card/block.c 2014-04-28 00:42:31.000000000 +0000 +@@ -1294,7 +1294,7 @@ + brq->data.blocks = 1; + } + +- if (brq->data.blocks > 1 || do_rel_wr) { ++ if (brq->data.blocks > 1 || do_rel_wr || card->host->caps2 & MMC_CAP2_FORCE_MULTIBLOCK) { + /* SPI multiblock writes terminate using a special + * token, not a STOP_TRANSMISSION request. + */ +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:30.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:31.000000000 +0000 +@@ -1266,6 +1266,9 @@ + + if (allow_highspeed) + host->mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; ++ ++ /* single block writes cause data loss with some SD cards! */ ++ host->mmc->caps2 |= MMC_CAP2_FORCE_MULTIBLOCK; + #endif + + ret = sdhci_add_host(host); +Index: linux-3.10-3.10.11/include/linux/mmc/host.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/mmc/host.h 2014-04-27 23:37:14.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/mmc/host.h 2014-04-28 00:42:31.000000000 +0000 +@@ -281,6 +281,7 @@ + #define MMC_CAP2_PACKED_CMD (MMC_CAP2_PACKED_RD | \ + MMC_CAP2_PACKED_WR) + #define MMC_CAP2_NO_PRESCAN_POWERUP (1 << 14) /* Don't power up before scan */ ++#define MMC_CAP2_FORCE_MULTIBLOCK (1 << 31) /* Always use multiblock transfers */ + + mmc_pm_flag_t pm_caps; /* supported pm features */ + +Index: linux-3.10-3.10.11/dummy/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1592_502ff5d8c9e0f6f7242fcc964dedafb752b40f5b.txt 2014-04-28 00:42:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.patch --- linux-3.10.11/debian/patches/rpi/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.patch 2014-04-28 00:42:32.000000000 +0000 @@ -0,0 +1,57 @@ +commit f4d24671b71020ccd9fa742f58b7aa80fca59532 +Author: popcornmix +Date: Wed Aug 1 19:02:14 2012 +0100 + + Add module parameter for missing_status quirk. sdhci-bcm2708.missing_status=0 may improve interrupt latency + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:32.000000000 +0000 +@@ -134,6 +134,7 @@ + static bool allow_highspeed = 1; + static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; + static bool sync_after_dma = 1; ++static bool missing_status = 1; + + #if 0 + static void hptime_test(void) +@@ -1150,7 +1151,6 @@ + .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc, + .voltage_broken = sdhci_bcm2708_quirk_voltage_broken, + .uhs_broken = sdhci_bcm2708_uhs_broken, +- .missing_status = sdhci_bcm2708_missing_status, + }; + + /*****************************************************************************\ +@@ -1189,6 +1189,9 @@ + ret = PTR_ERR(host); + goto err; + } ++ if (missing_status) { ++ sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status; ++ } + + host->hw_name = "BCM2708_Arasan"; + host->ops = &sdhci_bcm2708_ops; +@@ -1380,6 +1383,7 @@ + module_param(allow_highspeed, bool, 0444); + module_param(emmc_clock_freq, int, 0444); + module_param(sync_after_dma, bool, 0444); ++module_param(missing_status, bool, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +@@ -1389,5 +1393,6 @@ + MODULE_PARM_DESC(allow_highspeed, "Allow high speed transfers modes"); + MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); + MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete"); ++MODULE_PARM_DESC(missing_status, "Use the missing status quirk"); + + +Index: linux-3.10-3.10.11/dummy/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1593_f4d24671b71020ccd9fa742f58b7aa80fca59532.txt 2014-04-28 00:42:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.patch 2014-04-28 00:42:33.000000000 +0000 @@ -0,0 +1,71 @@ +commit 54a929faf30469caad5a94e9d5aea243e63271fd +Author: ddv2005 +Date: Sun Aug 5 10:42:12 2012 -0400 + + Fix spinlock recursion in sdhci-bcm2708.c + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:32.000000000 +0000 +@@ -643,11 +643,11 @@ + sdhci_bcm2708_platdma_reset(struct sdhci_host *host, struct mmc_data *data) + { + struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); +- unsigned long flags; ++// unsigned long flags; + + BUG_ON(NULL == host); + +- spin_lock_irqsave(&host->lock, flags); ++// spin_lock_irqsave(&host->lock, flags); + + if (host_priv->dma_wanted) { + if (NULL == data) { +@@ -727,7 +727,7 @@ + #endif + } + +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + } + + +@@ -740,11 +740,11 @@ + int sg_len; + int sg_ix; + int sg_todo; +- unsigned long flags; ++// unsigned long flags; + + BUG_ON(NULL == host); + +- spin_lock_irqsave(&host->lock, flags); ++// spin_lock_irqsave(&host->lock, flags); + data = host->data; + + #ifdef CHECK_DMA_USE +@@ -769,7 +769,7 @@ + + if (NULL == data) { + DBG("PDMA unused completion - status 0x%X\n", dma_cs); +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + return; + } + sg = data->sg; +@@ -862,7 +862,7 @@ + SDHCI_INT_SPACE_AVAIL); + } + } +- spin_unlock_irqrestore(&host->lock, flags); ++// spin_unlock_irqrestore(&host->lock, flags); + } + + static irqreturn_t sdhci_bcm2708_dma_irq(int irq, void *dev_id) +Index: linux-3.10-3.10.11/dummy/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1594_54a929faf30469caad5a94e9d5aea243e63271fd.txt 2014-04-28 00:42:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.patch --- linux-3.10.11/debian/patches/rpi/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.patch 2014-04-28 00:42:34.000000000 +0000 @@ -0,0 +1,64 @@ +commit b28dffe1c84efe9d5ce554207077837b5405fd10 +Author: popcornmix +Date: Wed May 8 11:46:50 2013 +0100 + + enabling the realtime clock 1-wire chip DS1307 and 1-wire on GPIO4 (as a module) + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:27.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:33.000000000 +0000 +@@ -32,6 +32,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -71,6 +72,9 @@ + */ + #define DMA_MASK_BITS_COMMON 32 + ++// use GPIO 4 for the one-wire GPIO pin, if enabled ++#define W1_GPIO 4 ++ + /* command line parameters */ + static unsigned boardrev, serial; + static unsigned uart_clock; +@@ -251,6 +255,19 @@ + .num_resources = ARRAY_SIZE(bcm2708_dmaman_resources), + }; + ++#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) ++static struct w1_gpio_platform_data w1_gpio_pdata = { ++ .pin = W1_GPIO, ++ .is_open_drain = 0, ++}; ++ ++static struct platform_device w1_device = { ++ .name = "w1-gpio", ++ .id = -1, ++ .dev.platform_data = &w1_gpio_pdata, ++}; ++#endif ++ + static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); + + static struct platform_device bcm2708_fb_device = { +@@ -620,6 +637,9 @@ + #ifdef CONFIG_BCM2708_GPIO + bcm_register_device(&bcm2708_gpio_device); + #endif ++#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) ++ platform_device_register(&w1_device); ++#endif + bcm_register_device(&bcm2708_systemtimer_device); + bcm_register_device(&bcm2708_fb_device); + bcm_register_device(&bcm2708_usb_device); +Index: linux-3.10-3.10.11/dummy/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1595_b28dffe1c84efe9d5ce554207077837b5405fd10.txt 2014-04-28 00:42:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.patch --- linux-3.10.11/debian/patches/rpi/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.patch 2014-04-28 00:42:35.000000000 +0000 @@ -0,0 +1,521 @@ +commit 77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63 +Author: popcornmix +Date: Sun May 12 12:27:48 2013 +0100 + + Add low-latency mode to sdcard driver. Disable with sdhci-bcm2708.enable_llm=0. Thanks ddv2005. + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:34.000000000 +0000 +@@ -135,6 +135,7 @@ + static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; + static bool sync_after_dma = 1; + static bool missing_status = 1; ++bool enable_llm = 1; + + #if 0 + static void hptime_test(void) +@@ -871,12 +872,11 @@ + struct sdhci_host *host = dev_id; + struct sdhci_bcm2708_priv *host_priv = SDHCI_HOST_PRIV(host); + u32 dma_cs; /* control and status register */ +- unsigned long flags; + + BUG_ON(NULL == dev_id); + BUG_ON(NULL == host_priv->dma_chan_base); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock(host); + + dma_cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); + +@@ -917,8 +917,7 @@ + + result = IRQ_HANDLED; + } +- +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock(host); + + return result; + } +@@ -1193,9 +1192,12 @@ + sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status; + } + ++ printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable"); ++ + host->hw_name = "BCM2708_Arasan"; + host->ops = &sdhci_bcm2708_ops; + host->irq = platform_get_irq(pdev, 0); ++ host->second_irq = 0; + + host->quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION | + SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | +@@ -1256,12 +1258,13 @@ + } + host_priv->dma_chan = ret; + +- ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq, +- IRQF_SHARED, DRIVER_NAME " (dma)", host); ++ ret = request_irq(host_priv->dma_irq, sdhci_bcm2708_dma_irq,0,//IRQF_SHARED, ++ DRIVER_NAME " (dma)", host); + if (ret) { + dev_err(&pdev->dev, "cannot set DMA IRQ\n"); + goto err_add_dma_irq; + } ++ host->second_irq = host_priv->dma_irq; + DBG("DMA CBs %p handle %08X DMA%d %p DMA IRQ %d\n", + host_priv->cb_base, (unsigned)host_priv->cb_handle, + host_priv->dma_chan, host_priv->dma_chan_base, +@@ -1384,6 +1387,7 @@ + module_param(emmc_clock_freq, int, 0444); + module_param(sync_after_dma, bool, 0444); + module_param(missing_status, bool, 0444); ++module_param(enable_llm, bool, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +@@ -1394,5 +1398,6 @@ + MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); + MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete"); + MODULE_PARM_DESC(missing_status, "Use the missing status quirk"); ++MODULE_PARM_DESC(enable_llm, "Enable low-latency mode"); + + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci.c 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci.c 2014-04-28 00:42:34.000000000 +0000 +@@ -124,6 +124,91 @@ + * Low level functions * + * * + \*****************************************************************************/ ++extern bool enable_llm; ++static int sdhci_locked=0; ++void sdhci_spin_lock(struct sdhci_host *host) ++{ ++ spin_lock(&host->lock); ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ disable_irq_nosync(host->irq); ++ if(host->second_irq) ++ disable_irq_nosync(host->second_irq); ++ local_irq_enable(); ++ } ++#endif ++} ++ ++void sdhci_spin_unlock(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ local_irq_disable(); ++ if(host->second_irq) ++ enable_irq(host->second_irq); ++ enable_irq(host->irq); ++ } ++#endif ++ spin_unlock(&host->lock); ++} ++ ++void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ while(sdhci_locked) ++ { ++ preempt_schedule(); ++ } ++ spin_lock_irqsave(&host->lock,*flags); ++ disable_irq(host->irq); ++ if(host->second_irq) ++ disable_irq(host->second_irq); ++ local_irq_enable(); ++ } ++ else ++#endif ++ spin_lock_irqsave(&host->lock,*flags); ++} ++ ++void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ local_irq_disable(); ++ if(host->second_irq) ++ enable_irq(host->second_irq); ++ enable_irq(host->irq); ++ } ++#endif ++ spin_unlock_irqrestore(&host->lock,flags); ++} ++ ++static void sdhci_spin_enable_schedule(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ sdhci_locked = 1; ++ preempt_enable(); ++ } ++#endif ++} ++ ++static void sdhci_spin_disable_schedule(struct sdhci_host *host) ++{ ++#ifdef CONFIG_PREEMPT ++ if(enable_llm) ++ { ++ preempt_disable(); ++ sdhci_locked = 0; ++ } ++#endif ++} + + static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set) + { +@@ -289,7 +374,7 @@ + struct sdhci_host *host = container_of(led, struct sdhci_host, led); + unsigned long flags; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->runtime_suspended) + goto out; +@@ -299,7 +384,7 @@ + else + sdhci_activate_led(host); + out: +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + #endif + +@@ -1007,7 +1092,9 @@ + return; + } + timeout--; ++ sdhci_spin_enable_schedule(host); + mdelay(1); ++ sdhci_spin_disable_schedule(host); + } + DBG("send cmd %d - wait 0x%X irq 0x%x\n", cmd->opcode, mask, + sdhci_readl(host, SDHCI_INT_STATUS)); +@@ -1234,7 +1321,9 @@ + return; + } + timeout--; ++ sdhci_spin_enable_schedule(host); + mdelay(1); ++ sdhci_spin_disable_schedule(host); + } + + clk |= SDHCI_CLOCK_CARD_EN; +@@ -1330,7 +1419,7 @@ + + sdhci_runtime_pm_get(host); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + WARN_ON(host->mrq != NULL); + +@@ -1388,9 +1477,9 @@ + mmc->card->type == MMC_TYPE_MMC ? + MMC_SEND_TUNING_BLOCK_HS200 : + MMC_SEND_TUNING_BLOCK; +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + sdhci_execute_tuning(mmc, tuning_opcode); +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* Restore original mmc_request structure */ + host->mrq = mrq; +@@ -1404,7 +1493,7 @@ + } + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) +@@ -1413,10 +1502,10 @@ + int vdd_bit = -1; + u8 ctrl; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->flags & SDHCI_DEVICE_DEAD) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + if (host->vmmc && ios->power_mode == MMC_POWER_OFF) + mmc_regulator_set_ocr(host->mmc, host->vmmc, 0); + return; +@@ -1443,9 +1532,9 @@ + vdd_bit = sdhci_set_power(host, ios->vdd); + + if (host->vmmc && vdd_bit != -1) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + mmc_regulator_set_ocr(host->mmc, host->vmmc, vdd_bit); +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + } + + if (host->ops->platform_send_init_74_clocks) +@@ -1583,7 +1672,7 @@ + sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) +@@ -1631,7 +1720,7 @@ + unsigned long flags; + int is_readonly; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->flags & SDHCI_DEVICE_DEAD) + is_readonly = 0; +@@ -1641,7 +1730,7 @@ + is_readonly = !(sdhci_readl(host, SDHCI_PRESENT_STATE) + & SDHCI_WRITE_PROTECT); + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + /* This quirk needs to be replaced by a callback-function later */ + return host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT ? +@@ -1714,9 +1803,9 @@ + struct sdhci_host *host = mmc_priv(mmc); + unsigned long flags; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_enable_sdio_irq_nolock(host, enable); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static int sdhci_do_start_signal_voltage_switch(struct sdhci_host *host, +@@ -2060,7 +2149,7 @@ + struct sdhci_host *host = mmc_priv(mmc); + unsigned long flags; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* Check host->mrq first in case we are runtime suspended */ + if (host->mrq && +@@ -2077,7 +2166,7 @@ + tasklet_schedule(&host->finish_tasklet); + } + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static const struct mmc_host_ops sdhci_ops = { +@@ -2116,14 +2205,14 @@ + + host = (struct sdhci_host*)param; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + /* + * If this tasklet gets rescheduled while running, it will + * be run again afterwards but without any active request. + */ + if (!host->mrq) { +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + return; + } + +@@ -2161,7 +2250,7 @@ + #endif + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + mmc_request_done(host->mmc, mrq); + sdhci_runtime_pm_put(host); +@@ -2174,7 +2263,7 @@ + + host = (struct sdhci_host*)data; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + if (host->mrq) { + pr_err("%s: Timeout waiting for hardware " +@@ -2195,7 +2284,7 @@ + } + + mmiowb(); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + static void sdhci_tuning_timer(unsigned long data) +@@ -2205,11 +2294,11 @@ + + host = (struct sdhci_host *)data; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->flags |= SDHCI_NEEDS_RETUNING; + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + /*****************************************************************************\ +@@ -2433,10 +2522,10 @@ + u32 intmask, unexpected = 0; + int cardint = 0, max_loops = 16; + +- spin_lock(&host->lock); ++ sdhci_spin_lock(host); + + if (host->runtime_suspended) { +- spin_unlock(&host->lock); ++ sdhci_spin_unlock(host); + pr_warning("%s: got irq while runtime suspended\n", + mmc_hostname(host->mmc)); + return IRQ_HANDLED; +@@ -2540,7 +2629,7 @@ + if (intmask && --max_loops) + goto again; + out: +- spin_unlock(&host->lock); ++ sdhci_spin_unlock(host); + + if (unexpected) { + pr_err("%s: Unexpected interrupt 0x%08x.\n", +@@ -2702,15 +2791,15 @@ + host->flags &= ~SDHCI_NEEDS_RETUNING; + } + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_mask_irqs(host, SDHCI_INT_ALL_MASK); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + synchronize_irq(host->irq); + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + host->runtime_suspended = true; +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + return ret; + } +@@ -2736,16 +2825,16 @@ + sdhci_do_start_signal_voltage_switch(host, &host->mmc->ios); + if ((host_flags & SDHCI_PV_ENABLED) && + !(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN)) { +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + sdhci_enable_preset_value(host, true); +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + /* Set the re-tuning expiration flag */ + if (host->flags & SDHCI_USING_RETUNING_TIMER) + host->flags |= SDHCI_NEEDS_RETUNING; + +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->runtime_suspended = false; + +@@ -2756,7 +2845,7 @@ + /* Enable Card Detection */ + sdhci_enable_card_detection(host); + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + + return ret; + } +@@ -3248,7 +3337,7 @@ + host->tuning_timer.function = sdhci_tuning_timer; + } + +- ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, ++ ret = request_irq(host->irq, sdhci_irq, 0,//IRQF_SHARED, + mmc_hostname(mmc), host); + if (ret) { + pr_err("%s: Failed to request IRQ %d: %d\n", +@@ -3312,7 +3401,7 @@ + unsigned long flags; + + if (dead) { +- spin_lock_irqsave(&host->lock, flags); ++ sdhci_spin_lock_irqsave(host, &flags); + + host->flags |= SDHCI_DEVICE_DEAD; + +@@ -3324,7 +3413,7 @@ + tasklet_schedule(&host->finish_tasklet); + } + +- spin_unlock_irqrestore(&host->lock, flags); ++ sdhci_spin_unlock_irqrestore(host, flags); + } + + sdhci_disable_card_detection(host); +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci.h 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci.h 2014-04-28 00:42:34.000000000 +0000 +@@ -441,4 +441,10 @@ + extern int sdhci_runtime_resume_host(struct sdhci_host *host); + #endif + ++extern void sdhci_spin_lock_irqsave(struct sdhci_host *host,unsigned long *flags); ++extern void sdhci_spin_unlock_irqrestore(struct sdhci_host *host,unsigned long flags); ++extern void sdhci_spin_lock(struct sdhci_host *host); ++extern void sdhci_spin_unlock(struct sdhci_host *host); ++ ++ + #endif /* __SDHCI_HW_H */ +Index: linux-3.10-3.10.11/include/linux/mmc/sdhci.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/linux/mmc/sdhci.h 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/include/linux/mmc/sdhci.h 2014-04-28 00:42:34.000000000 +0000 +@@ -97,6 +97,7 @@ + #define SDHCI_QUIRK2_PRESET_VALUE_BROKEN (1<<3) + + int irq; /* Device IRQ */ ++ int second_irq; /* Additional IRQ to disable/enable in low-latency mode */ + void __iomem *ioaddr; /* Mapped address */ + + const struct sdhci_ops *ops; /* Low level hw interface */ +Index: linux-3.10-3.10.11/dummy/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1596_77f82f9de9f88fc7ff693497dcb6b0ef5b1c5e63.txt 2014-04-28 00:42:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.patch --- linux-3.10.11/debian/patches/rpi/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.patch 2014-04-28 00:42:37.000000000 +0000 @@ -0,0 +1,1138 @@ +commit 1f45d3d733d51369b3e21b3152839e24a840ec59 +Author: popcornmix +Date: Wed Jul 3 00:46:42 2013 +0100 + + Add FIQ patch to dwc_otg driver. Enable with dwc_otg.fiq_fix_enable=1. Should give about 10% more ARM performance. + Thanks to Gordon and Costas + +Index: linux-3.10-3.10.11/arch/arm/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/Kconfig 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/Kconfig 2014-04-28 00:42:35.000000000 +0000 +@@ -373,6 +373,7 @@ + select ARM_ERRATA_411920 + select MACH_BCM2708 + select VC4 ++ select FIQ + help + This enables support for Broadcom BCM2708 boards. + +Index: linux-3.10-3.10.11/arch/arm/include/asm/fiq.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/include/asm/fiq.h 2014-04-27 23:37:13.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/include/asm/fiq.h 2014-04-28 00:42:35.000000000 +0000 +@@ -42,6 +42,7 @@ + /* helpers defined in fiqasm.S: */ + extern void __set_fiq_regs(unsigned long const *regs); + extern void __get_fiq_regs(unsigned long *regs); ++extern void __FIQ_Branch(unsigned long *regs); + + static inline void set_fiq_regs(struct pt_regs const *regs) + { +Index: linux-3.10-3.10.11/arch/arm/kernel/fiq.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/fiq.c 2014-04-27 23:37:13.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/fiq.c 2014-04-28 00:42:35.000000000 +0000 +@@ -145,6 +145,7 @@ + EXPORT_SYMBOL(set_fiq_handler); + EXPORT_SYMBOL(__set_fiq_regs); /* defined in fiqasm.S */ + EXPORT_SYMBOL(__get_fiq_regs); /* defined in fiqasm.S */ ++EXPORT_SYMBOL(__FIQ_Branch); /* defined in fiqasm.S */ + EXPORT_SYMBOL(claim_fiq); + EXPORT_SYMBOL(release_fiq); + EXPORT_SYMBOL(enable_fiq); +Index: linux-3.10-3.10.11/arch/arm/kernel/fiqasm.S +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/fiqasm.S 2014-04-27 23:37:13.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/fiqasm.S 2014-04-28 00:42:35.000000000 +0000 +@@ -25,6 +25,9 @@ + ENTRY(__set_fiq_regs) + mov r2, #PSR_I_BIT | PSR_F_BIT | FIQ_MODE + mrs r1, cpsr ++@@@@@@@@@@@@@@@ hack: enable the fiq here to keep usb driver happy ++ and r1, #~PSR_F_BIT ++@@@@@@@@@@@@@@@ endhack: (need to find better place for this to happen) + msr cpsr_c, r2 @ select FIQ mode + mov r0, r0 @ avoid hazard prior to ARMv4 + ldmia r0!, {r8 - r12} +@@ -47,3 +50,7 @@ + mov r0, r0 @ avoid hazard prior to ARMv4 + mov pc, lr + ENDPROC(__get_fiq_regs) ++ ++ENTRY(__FIQ_Branch) ++ mov pc, r8 ++ENDPROC(__FIQ_Branch) +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/armctrl.c 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/armctrl.c 2014-04-28 00:42:35.000000000 +0000 +@@ -52,8 +52,12 @@ + 0 + }; + +- unsigned int data = (unsigned int)irq_get_chip_data(d->irq); +- writel(1 << (data & 0x1f), __io_address(disables[(data >> 5) & 0x3])); ++ if (d->irq >= FIQ_START) { ++ writel(0, __io_address(ARM_IRQ_FAST)); ++ } else { ++ unsigned int data = (unsigned int)irq_get_chip_data(d->irq); ++ writel(1 << (data & 0x1f), __io_address(disables[(data >> 5) & 0x3])); ++ } + } + + static void armctrl_unmask_irq(struct irq_data *d) +@@ -65,8 +69,14 @@ + 0 + }; + +- unsigned int data = (unsigned int)irq_get_chip_data(d->irq); +- writel(1 << (data & 0x1f), __io_address(enables[(data >> 5) & 0x3])); ++ if (d->irq >= FIQ_START) { ++ unsigned int data = ++ (unsigned int)irq_get_chip_data(d->irq) - FIQ_START; ++ writel(0x80 | data, __io_address(ARM_IRQ_FAST)); ++ } else { ++ unsigned int data = (unsigned int)irq_get_chip_data(d->irq); ++ writel(1 << (data & 0x1f), __io_address(enables[(data >> 5) & 0x3])); ++ } + } + + #if defined(CONFIG_PM) +@@ -204,5 +214,6 @@ + } + + armctrl_pm_register(base, irq_start, resume_sources); ++ init_FIQ(FIQ_START); + return 0; + } +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:33.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:35.000000000 +0000 +@@ -309,12 +309,32 @@ + .flags = IORESOURCE_MEM, + }, + [1] = { +- .start = IRQ_USB, +- .end = IRQ_USB, ++ .start = MPHI_BASE, ++ .end = MPHI_BASE + SZ_4K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [2] = { ++ .start = IRQ_HOSTPORT, ++ .end = IRQ_HOSTPORT, + .flags = IORESOURCE_IRQ, + }, + }; + ++bool fiq_fix_enable = true; ++ ++static struct resource bcm2708_usb_resources_no_fiq_fix[] = { ++ [0] = { ++ .start = USB_BASE, ++ .end = USB_BASE + SZ_128K - 1, ++ .flags = IORESOURCE_MEM, ++ }, ++ [1] = { ++ .start = IRQ_USB, ++ .end = IRQ_USB, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ + static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); + + static struct platform_device bcm2708_usb_device = { +@@ -642,6 +662,11 @@ + #endif + bcm_register_device(&bcm2708_systemtimer_device); + bcm_register_device(&bcm2708_fb_device); ++ if (!fiq_fix_enable) ++ { ++ bcm2708_usb_device.resource = bcm2708_usb_resources_no_fiq_fix; ++ bcm2708_usb_device.num_resources = ARRAY_SIZE(bcm2708_usb_resources_no_fiq_fix); ++ } + bcm_register_device(&bcm2708_usb_device); + bcm_register_device(&bcm2708_uart1_device); + bcm_register_device(&bcm2708_powerman_device); +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/irqs.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/include/mach/irqs.h 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/irqs.h 2014-04-28 00:42:35.000000000 +0000 +@@ -106,91 +106,94 @@ + #define IRQ_PENDING1 (IRQ_ARMCTRL_START + INTERRUPT_PENDING1) + #define IRQ_PENDING2 (IRQ_ARMCTRL_START + INTERRUPT_PENDING2) + ++#define FIQ_START HARD_IRQS ++ + /* + * FIQ interrupts definitions are the same as the INT definitions. + */ +-#define FIQ_TIMER0 INT_TIMER0 +-#define FIQ_TIMER1 INT_TIMER1 +-#define FIQ_TIMER2 INT_TIMER2 +-#define FIQ_TIMER3 INT_TIMER3 +-#define FIQ_CODEC0 INT_CODEC0 +-#define FIQ_CODEC1 INT_CODEC1 +-#define FIQ_CODEC2 INT_CODEC2 +-#define FIQ_JPEG INT_JPEG +-#define FIQ_ISP INT_ISP +-#define FIQ_USB INT_USB +-#define FIQ_3D INT_3D +-#define FIQ_TRANSPOSER INT_TRANSPOSER +-#define FIQ_MULTICORESYNC0 INT_MULTICORESYNC0 +-#define FIQ_MULTICORESYNC1 INT_MULTICORESYNC1 +-#define FIQ_MULTICORESYNC2 INT_MULTICORESYNC2 +-#define FIQ_MULTICORESYNC3 INT_MULTICORESYNC3 +-#define FIQ_DMA0 INT_DMA0 +-#define FIQ_DMA1 INT_DMA1 +-#define FIQ_DMA2 INT_DMA2 +-#define FIQ_DMA3 INT_DMA3 +-#define FIQ_DMA4 INT_DMA4 +-#define FIQ_DMA5 INT_DMA5 +-#define FIQ_DMA6 INT_DMA6 +-#define FIQ_DMA7 INT_DMA7 +-#define FIQ_DMA8 INT_DMA8 +-#define FIQ_DMA9 INT_DMA9 +-#define FIQ_DMA10 INT_DMA10 +-#define FIQ_DMA11 INT_DMA11 +-#define FIQ_DMA12 INT_DMA12 +-#define FIQ_AUX INT_AUX +-#define FIQ_ARM INT_ARM +-#define FIQ_VPUDMA INT_VPUDMA +-#define FIQ_HOSTPORT INT_HOSTPORT +-#define FIQ_VIDEOSCALER INT_VIDEOSCALER +-#define FIQ_CCP2TX INT_CCP2TX +-#define FIQ_SDC INT_SDC +-#define FIQ_DSI0 INT_DSI0 +-#define FIQ_AVE INT_AVE +-#define FIQ_CAM0 INT_CAM0 +-#define FIQ_CAM1 INT_CAM1 +-#define FIQ_HDMI0 INT_HDMI0 +-#define FIQ_HDMI1 INT_HDMI1 +-#define FIQ_PIXELVALVE1 INT_PIXELVALVE1 +-#define FIQ_I2CSPISLV INT_I2CSPISLV +-#define FIQ_DSI1 INT_DSI1 +-#define FIQ_PWA0 INT_PWA0 +-#define FIQ_PWA1 INT_PWA1 +-#define FIQ_CPR INT_CPR +-#define FIQ_SMI INT_SMI +-#define FIQ_GPIO0 INT_GPIO0 +-#define FIQ_GPIO1 INT_GPIO1 +-#define FIQ_GPIO2 INT_GPIO2 +-#define FIQ_GPIO3 INT_GPIO3 +-#define FIQ_I2C INT_I2C +-#define FIQ_SPI INT_SPI +-#define FIQ_I2SPCM INT_I2SPCM +-#define FIQ_SDIO INT_SDIO +-#define FIQ_UART INT_UART +-#define FIQ_SLIMBUS INT_SLIMBUS +-#define FIQ_VEC INT_VEC +-#define FIQ_CPG INT_CPG +-#define FIQ_RNG INT_RNG +-#define FIQ_ARASANSDIO INT_ARASANSDIO +-#define FIQ_AVSPMON INT_AVSPMON +- +-#define FIQ_ARM_TIMER INT_ARM_TIMER +-#define FIQ_ARM_MAILBOX INT_ARM_MAILBOX +-#define FIQ_ARM_DOORBELL_0 INT_ARM_DOORBELL_0 +-#define FIQ_ARM_DOORBELL_1 INT_ARM_DOORBELL_1 +-#define FIQ_VPU0_HALTED INT_VPU0_HALTED +-#define FIQ_VPU1_HALTED INT_VPU1_HALTED +-#define FIQ_ILLEGAL_TYPE0 INT_ILLEGAL_TYPE0 +-#define FIQ_ILLEGAL_TYPE1 INT_ILLEGAL_TYPE1 +-#define FIQ_PENDING1 INT_PENDING1 +-#define FIQ_PENDING2 INT_PENDING2 ++#define FIQ_TIMER0 (FIQ_START+INTERRUPT_TIMER0) ++#define FIQ_TIMER1 (FIQ_START+INTERRUPT_TIMER1) ++#define FIQ_TIMER2 (FIQ_START+INTERRUPT_TIMER2) ++#define FIQ_TIMER3 (FIQ_START+INTERRUPT_TIMER3) ++#define FIQ_CODEC0 (FIQ_START+INTERRUPT_CODEC0) ++#define FIQ_CODEC1 (FIQ_START+INTERRUPT_CODEC1) ++#define FIQ_CODEC2 (FIQ_START+INTERRUPT_CODEC2) ++#define FIQ_JPEG (FIQ_START+INTERRUPT_JPEG) ++#define FIQ_ISP (FIQ_START+INTERRUPT_ISP) ++#define FIQ_USB (FIQ_START+INTERRUPT_USB) ++#define FIQ_3D (FIQ_START+INTERRUPT_3D) ++#define FIQ_TRANSPOSER (FIQ_START+INTERRUPT_TRANSPOSER) ++#define FIQ_MULTICORESYNC0 (FIQ_START+INTERRUPT_MULTICORESYNC0) ++#define FIQ_MULTICORESYNC1 (FIQ_START+INTERRUPT_MULTICORESYNC1) ++#define FIQ_MULTICORESYNC2 (FIQ_START+INTERRUPT_MULTICORESYNC2) ++#define FIQ_MULTICORESYNC3 (FIQ_START+INTERRUPT_MULTICORESYNC3) ++#define FIQ_DMA0 (FIQ_START+INTERRUPT_DMA0) ++#define FIQ_DMA1 (FIQ_START+INTERRUPT_DMA1) ++#define FIQ_DMA2 (FIQ_START+INTERRUPT_DMA2) ++#define FIQ_DMA3 (FIQ_START+INTERRUPT_DMA3) ++#define FIQ_DMA4 (FIQ_START+INTERRUPT_DMA4) ++#define FIQ_DMA5 (FIQ_START+INTERRUPT_DMA5) ++#define FIQ_DMA6 (FIQ_START+INTERRUPT_DMA6) ++#define FIQ_DMA7 (FIQ_START+INTERRUPT_DMA7) ++#define FIQ_DMA8 (FIQ_START+INTERRUPT_DMA8) ++#define FIQ_DMA9 (FIQ_START+INTERRUPT_DMA9) ++#define FIQ_DMA10 (FIQ_START+INTERRUPT_DMA10) ++#define FIQ_DMA11 (FIQ_START+INTERRUPT_DMA11) ++#define FIQ_DMA12 (FIQ_START+INTERRUPT_DMA12) ++#define FIQ_AUX (FIQ_START+INTERRUPT_AUX) ++#define FIQ_ARM (FIQ_START+INTERRUPT_ARM) ++#define FIQ_VPUDMA (FIQ_START+INTERRUPT_VPUDMA) ++#define FIQ_HOSTPORT (FIQ_START+INTERRUPT_HOSTPORT) ++#define FIQ_VIDEOSCALER (FIQ_START+INTERRUPT_VIDEOSCALER) ++#define FIQ_CCP2TX (FIQ_START+INTERRUPT_CCP2TX) ++#define FIQ_SDC (FIQ_START+INTERRUPT_SDC) ++#define FIQ_DSI0 (FIQ_START+INTERRUPT_DSI0) ++#define FIQ_AVE (FIQ_START+INTERRUPT_AVE) ++#define FIQ_CAM0 (FIQ_START+INTERRUPT_CAM0) ++#define FIQ_CAM1 (FIQ_START+INTERRUPT_CAM1) ++#define FIQ_HDMI0 (FIQ_START+INTERRUPT_HDMI0) ++#define FIQ_HDMI1 (FIQ_START+INTERRUPT_HDMI1) ++#define FIQ_PIXELVALVE1 (FIQ_START+INTERRUPT_PIXELVALVE1) ++#define FIQ_I2CSPISLV (FIQ_START+INTERRUPT_I2CSPISLV) ++#define FIQ_DSI1 (FIQ_START+INTERRUPT_DSI1) ++#define FIQ_PWA0 (FIQ_START+INTERRUPT_PWA0) ++#define FIQ_PWA1 (FIQ_START+INTERRUPT_PWA1) ++#define FIQ_CPR (FIQ_START+INTERRUPT_CPR) ++#define FIQ_SMI (FIQ_START+INTERRUPT_SMI) ++#define FIQ_GPIO0 (FIQ_START+INTERRUPT_GPIO0) ++#define FIQ_GPIO1 (FIQ_START+INTERRUPT_GPIO1) ++#define FIQ_GPIO2 (FIQ_START+INTERRUPT_GPIO2) ++#define FIQ_GPIO3 (FIQ_START+INTERRUPT_GPIO3) ++#define FIQ_I2C (FIQ_START+INTERRUPT_I2C) ++#define FIQ_SPI (FIQ_START+INTERRUPT_SPI) ++#define FIQ_I2SPCM (FIQ_START+INTERRUPT_I2SPCM) ++#define FIQ_SDIO (FIQ_START+INTERRUPT_SDIO) ++#define FIQ_UART (FIQ_START+INTERRUPT_UART) ++#define FIQ_SLIMBUS (FIQ_START+INTERRUPT_SLIMBUS) ++#define FIQ_VEC (FIQ_START+INTERRUPT_VEC) ++#define FIQ_CPG (FIQ_START+INTERRUPT_CPG) ++#define FIQ_RNG (FIQ_START+INTERRUPT_RNG) ++#define FIQ_ARASANSDIO (FIQ_START+INTERRUPT_ARASANSDIO) ++#define FIQ_AVSPMON (FIQ_START+INTERRUPT_AVSPMON) ++ ++#define FIQ_ARM_TIMER (FIQ_START+INTERRUPT_ARM_TIMER) ++#define FIQ_ARM_MAILBOX (FIQ_START+INTERRUPT_ARM_MAILBOX) ++#define FIQ_ARM_DOORBELL_0 (FIQ_START+INTERRUPT_ARM_DOORBELL_0) ++#define FIQ_ARM_DOORBELL_1 (FIQ_START+INTERRUPT_ARM_DOORBELL_1) ++#define FIQ_VPU0_HALTED (FIQ_START+INTERRUPT_VPU0_HALTED) ++#define FIQ_VPU1_HALTED (FIQ_START+INTERRUPT_VPU1_HALTED) ++#define FIQ_ILLEGAL_TYPE0 (FIQ_START+INTERRUPT_ILLEGAL_TYPE0) ++#define FIQ_ILLEGAL_TYPE1 (FIQ_START+INTERRUPT_ILLEGAL_TYPE1) ++#define FIQ_PENDING1 (FIQ_START+INTERRUPT_PENDING1) ++#define FIQ_PENDING2 (FIQ_START+INTERRUPT_PENDING2) + +-#define HARD_IRQS (64 + 21) +-#define GPIO_IRQ_START HARD_IRQS ++#define GPIO_IRQ_START (HARD_IRQS + FIQ_IRQS) + +-#define GPIO_IRQS 32*5 ++#define HARD_IRQS (64 + 21) ++#define FIQ_IRQS (64 + 21) ++#define GPIO_IRQS (32*5) + +-#define NR_IRQS HARD_IRQS+GPIO_IRQS ++#define NR_IRQS HARD_IRQS+FIQ_IRQS+GPIO_IRQS + + + #endif /* _BCM2708_IRQS_H_ */ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:27.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:35.000000000 +0000 +@@ -56,7 +56,9 @@ + */ + + #define BCM2708_PERI_BASE 0x20000000 ++#define IC0_BASE (BCM2708_PERI_BASE + 0x2000) + #define ST_BASE (BCM2708_PERI_BASE + 0x3000) /* System Timer */ ++#define MPHI_BASE (BCM2708_PERI_BASE + 0x6000) /* Message -based Parallel Host Interface */ + #define DMA_BASE (BCM2708_PERI_BASE + 0x7000) /* DMA controller */ + #define ARM_BASE (BCM2708_PERI_BASE + 0xB000) /* BCM2708 ARM control block */ + #define PM_BASE (BCM2708_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/Makefile 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/Makefile 2014-04-28 00:42:35.000000000 +0000 +@@ -36,6 +36,7 @@ + dwc_otg-objs += dwc_otg_pcd_linux.o dwc_otg_pcd.o dwc_otg_pcd_intr.o + dwc_otg-objs += dwc_otg_hcd.o dwc_otg_hcd_linux.o dwc_otg_hcd_intr.o dwc_otg_hcd_queue.o dwc_otg_hcd_ddma.o + dwc_otg-objs += dwc_otg_adp.o ++dwc_otg-objs += dwc_otg_mphi_fix.o + ifneq ($(CFI),) + dwc_otg-objs += dwc_otg_cfi.o + endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c 2014-04-28 00:42:35.000000000 +0000 +@@ -45,6 +45,9 @@ + #include "dwc_otg_driver.h" + #include "dwc_otg_pcd.h" + #include "dwc_otg_hcd.h" ++#include "dwc_otg_mphi_fix.h" ++ ++extern bool fiq_fix_enable; + + #ifdef DEBUG + inline const char *op_state_str(dwc_otg_core_if_t * core_if) +@@ -1351,10 +1354,15 @@ + gintsts.d32, gintmsk.d32); + } + #endif +- if (gahbcfg.b.glblintrmsk) ++ if (!fiq_fix_enable){ ++ if (gahbcfg.b.glblintrmsk) ++ return ((gintsts.d32 & gintmsk.d32) & gintmsk_common.d32); ++ else ++ return 0; ++ } ++ else { + return ((gintsts.d32 & gintmsk.d32) & gintmsk_common.d32); +- else +- return 0; ++ } + + } + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_dbg.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_dbg.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_dbg.h 2014-04-28 00:42:35.000000000 +0000 +@@ -49,6 +49,7 @@ + return old; + } + ++#define DBG_USER (0x1) + /** When debug level has the DBG_CIL bit set, display CIL Debug messages. */ + #define DBG_CIL (0x2) + /** When debug level has the DBG_CILV bit set, display CIL Verbose debug +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:35.000000000 +0000 +@@ -64,6 +64,8 @@ + + static const char dwc_driver_name[] = "dwc_otg"; + ++extern void* dummy_send; ++ + extern int pcd_init( + #ifdef LM_INTERFACE + struct lm_device *_dev +@@ -238,6 +240,10 @@ + .adp_enable = -1, + }; + ++//Global variable to switch the fiq fix on or off (declared in bcm2708.c) ++extern bool fiq_fix_enable; ++ ++ + /** + * This function shows the Driver Version. + */ +@@ -779,17 +785,33 @@ + _dev->resource->start, + _dev->resource->end - _dev->resource->start + 1); + #if 1 +- if (!request_mem_region(_dev->resource->start, +- _dev->resource->end - _dev->resource->start + 1, ++ if (!request_mem_region(_dev->resource[0].start, ++ _dev->resource[0].end - _dev->resource[0].start + 1, + "dwc_otg")) { + dev_dbg(&_dev->dev, "error reserving mapped memory\n"); + retval = -EFAULT; + goto fail; + } + +- dwc_otg_device->os_dep.base = ioremap_nocache(_dev->resource->start, +- _dev->resource->end - +- _dev->resource->start+1); ++ dwc_otg_device->os_dep.base = ioremap_nocache(_dev->resource[0].start, ++ _dev->resource[0].end - ++ _dev->resource[0].start+1); ++ if (fiq_fix_enable) ++ { ++ if (!request_mem_region(_dev->resource[1].start, ++ _dev->resource[1].end - _dev->resource[1].start + 1, ++ "dwc_otg")) { ++ dev_dbg(&_dev->dev, "error reserving mapped memory\n"); ++ retval = -EFAULT; ++ goto fail; ++ } ++ ++ dwc_otg_device->os_dep.mphi_base = ioremap_nocache(_dev->resource[1].start, ++ _dev->resource[1].end - ++ _dev->resource[1].start + 1); ++ dummy_send = (void *) kmalloc(16, GFP_ATOMIC); ++ } ++ + #else + { + struct map_desc desc = { +@@ -1063,6 +1085,7 @@ + printk(KERN_ERR "%s retval=%d\n", __func__, retval); + return retval; + } ++ printk(KERN_DEBUG "dwc_otg: FIQ %s\n", fiq_fix_enable ? "enabled":"disabled"); + + error = driver_create_file(drv, &driver_attr_version); + #ifdef DEBUG +@@ -1343,6 +1366,10 @@ + module_param(microframe_schedule, bool, 0444); + MODULE_PARM_DESC(microframe_schedule, "Enable the microframe scheduler"); + ++ ++module_param(fiq_fix_enable, bool, 0444); ++MODULE_PARM_DESC(fiq_fix_enable, "Enable the fiq fix"); ++ + /** @page "Module Parameters" + * + * The following parameters may be specified when starting the module. +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:35.000000000 +0000 +@@ -53,6 +53,8 @@ + static int last_sel_trans_num_avail_hc_at_end = 0; + #endif /* DEBUG_HOST_CHANNELS */ + ++extern int g_next_sched_frame, g_np_count, g_np_sent; ++ + dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void) + { + return DWC_ALLOC(sizeof(dwc_otg_hcd_t)); +@@ -407,6 +409,7 @@ + } + #endif + ++ + /** + * HCD Callback function for Remote Wakeup. + * +@@ -1330,6 +1333,8 @@ + &qh->qh_list_entry); + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + ++ g_np_sent++; ++ + if (ret_val == DWC_OTG_TRANSACTION_NONE) { + ret_val = DWC_OTG_TRANSACTION_NON_PERIODIC; + } else { +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:35.000000000 +0000 +@@ -594,7 +594,7 @@ + /** @name Interrupt Handler Functions */ + /** @{ */ + extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd); +-extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd); ++extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd, int32_t); + extern int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t * + dwc_otg_hcd); + extern int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t * +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_if.h 2014-04-28 00:42:35.000000000 +0000 +@@ -113,6 +113,11 @@ + */ + extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd); + ++/** This function is used to handle the fast interrupt ++ * ++ */ ++extern void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void); ++ + /** + * Returns private data set by + * dwc_otg_hcd_set_priv_data function. +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:35.000000000 +0000 +@@ -34,6 +34,11 @@ + + #include "dwc_otg_hcd.h" + #include "dwc_otg_regs.h" ++#include "dwc_otg_mphi_fix.h" ++ ++#include ++#include ++ + + extern bool microframe_schedule; + +@@ -41,36 +46,105 @@ + * This file contains the implementation of the HCD Interrupt handlers. + */ + ++/* ++ * Some globals to communicate between the FIQ and INTERRUPT ++ */ ++ ++void * dummy_send; ++mphi_regs_t c_mphi_regs; ++int fiq_done, int_done; ++int g_next_sched_frame, g_np_count, g_np_sent, g_work_expected; ++static int mphi_int_count = 0 ; ++ ++extern bool fiq_fix_enable; ++ ++void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void) ++{ ++ gintsts_data_t gintsts; ++ hfnum_data_t hfnum; ++ ++ /* entry takes care to store registers we will be treading on here */ ++ asm __volatile__ ( ++ "mov ip, sp ;" ++ /* stash FIQ and normal regs */ ++ "stmdb sp!, {r0-r12, lr};" ++ /* !! THIS SETS THE FRAME, adjust to > sizeof locals */ ++ "sub fp, ip, #256 ;" ++ ); ++ ++ fiq_done++; ++ gintsts.d32 = FIQ_READ_IO_ADDRESS(USB_BASE + 0x14) & FIQ_READ_IO_ADDRESS(USB_BASE + 0x18); ++ hfnum.d32 = FIQ_READ_IO_ADDRESS(USB_BASE + 0x408); ++ ++ if(gintsts.d32) ++ { ++ if(gintsts.b.sofintr && g_np_count == g_np_sent && dwc_frame_num_gt(g_next_sched_frame, hfnum.b.frnum)) ++ { ++ /* ++ * If np_count != np_sent that means we need to queue non-periodic (bulk) packets this packet ++ * g_next_sched_frame is the next frame we have periodic packets for ++ * ++ * if neither of these are required for this frame then just clear the interrupt ++ */ ++ gintsts.d32 = 0; ++ gintsts.b.sofintr = 1; ++ FIQ_WRITE_IO_ADDRESS((USB_BASE + 0x14), gintsts.d32); ++ ++ g_work_expected = 0; ++ } ++ else ++ { ++ g_work_expected = 1; ++ /* To enable the MPHI interrupt (INT 32) ++ */ ++ FIQ_WRITE( c_mphi_regs.outdda, (int) dummy_send); ++ FIQ_WRITE( c_mphi_regs.outddb, (1 << 29)); ++ ++ mphi_int_count++; ++ /* Clear the USB global interrupt so we don't just sit in the FIQ */ ++ FIQ_MODIFY_IO_ADDRESS((USB_BASE + 0x8),1,0); ++ ++ } ++ } ++ mb(); ++ ++ /* exit back to normal mode restoring everything */ ++ asm __volatile__ ( ++ /* return FIQ regs back to pristine state ++ * and get normal regs back ++ */ ++ "ldmia sp!, {r0-r12, lr};" ++ ++ /* return */ ++ "subs pc, lr, #4;" ++ ); ++} ++ + /** This function handles interrupts for the HCD. */ + int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd) + { + int retval = 0; ++ static int last_time; + + dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if; + gintsts_data_t gintsts; ++ hfnum_data_t hfnum; ++ + #ifdef DEBUG + dwc_otg_core_global_regs_t *global_regs = core_if->core_global_regs; + +- //GRAYG: debugging +- if (NULL == global_regs) { +- DWC_DEBUGPL(DBG_HCD, "**** NULL regs: dwc_otg_hcd=%p " +- "core_if=%p\n", +- dwc_otg_hcd, global_regs); +- return retval; +- } + #endif + + /* Exit from ISR if core is hibernated */ + if (core_if->hibernation_suspend == 1) { +- return retval; ++ goto exit_handler_routine; + } + DWC_SPINLOCK(dwc_otg_hcd->lock); + /* Check if HOST Mode */ + if (dwc_otg_is_host_mode(core_if)) { + gintsts.d32 = dwc_otg_read_core_intr(core_if); + if (!gintsts.d32) { +- DWC_SPINUNLOCK(dwc_otg_hcd->lock); +- return 0; ++ goto exit_handler_routine; + } + #ifdef DEBUG + /* Don't print debug message in the interrupt handler on SOF */ +@@ -88,9 +162,14 @@ + "DWC OTG HCD Interrupt Detected gintsts&gintmsk=0x%08x core_if=%p\n", + gintsts.d32, core_if); + #endif +- +- if (gintsts.b.sofintr) { +- retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd); ++ hfnum.d32 = DWC_READ_REG32(&dwc_otg_hcd->core_if->host_if->host_global_regs->hfnum); ++ if (gintsts.b.sofintr && g_np_count == g_np_sent && dwc_frame_num_gt(g_next_sched_frame, hfnum.b.frnum)) ++ { ++ /* Note, we should never get here if the FIQ is doing it's job properly*/ ++ retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd, g_work_expected); ++ } ++ else if (gintsts.b.sofintr) { ++ retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd, g_work_expected); + } + if (gintsts.b.rxstsqlvl) { + retval |= +@@ -138,11 +217,37 @@ + #endif + + } ++ ++exit_handler_routine: ++ ++ if (fiq_fix_enable) ++ { ++ /* Clear the MPHI interrupt */ ++ DWC_WRITE_REG32(c_mphi_regs.intstat, (1<<16)); ++ if (mphi_int_count >= 60) ++ { ++ DWC_WRITE_REG32(c_mphi_regs.ctrl, ((1<<31) + (1<<16))); ++ DWC_WRITE_REG32(c_mphi_regs.ctrl, (1<<31)); ++ mphi_int_count = 0; ++ } ++ int_done++; ++ if((jiffies / HZ) > last_time) ++ { ++ /* Once a second output the fiq and irq numbers, useful for debug */ ++ last_time = jiffies / HZ; ++ DWC_DEBUGPL(DBG_USER, "int_done = %d fiq_done = %d\n", int_done, fiq_done); ++ } ++ ++ /* Re-Enable FIQ interrupt from USB peripheral */ ++ DWC_MODIFY_REG32((uint32_t *)IO_ADDRESS(USB_BASE + 0x8), 0 , 1); ++ } ++ + DWC_SPINUNLOCK(dwc_otg_hcd->lock); + return retval; + } + + #ifdef DWC_TRACK_MISSED_SOFS ++ + #warning Compiling code to track missed SOFs + #define FRAME_NUM_ARRAY_SIZE 1000 + /** +@@ -182,13 +287,15 @@ + * (micro)frame. Periodic transactions may be queued to the controller for the + * next (micro)frame. + */ +-int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd) ++int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd, int32_t work_expected) + { + hfnum_data_t hfnum; + dwc_list_link_t *qh_entry; + dwc_otg_qh_t *qh; + dwc_otg_transaction_type_e tr_type; + gintsts_data_t gintsts = {.d32 = 0 }; ++ int did_something = 0; ++ int32_t next_sched_frame = -1; + + hfnum.d32 = + DWC_READ_REG32(&hcd->core_if->host_if->host_global_regs->hfnum); +@@ -218,12 +325,30 @@ + */ + DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready, + &qh->qh_list_entry); ++ ++ did_something = 1; ++ } ++ else ++ { ++ if(next_sched_frame < 0 || dwc_frame_num_le(qh->sched_frame, next_sched_frame)) ++ { ++ next_sched_frame = qh->sched_frame; ++ } + } + } ++ ++ g_next_sched_frame = next_sched_frame; ++ + tr_type = dwc_otg_hcd_select_transactions(hcd); + if (tr_type != DWC_OTG_TRANSACTION_NONE) { + dwc_otg_hcd_queue_transactions(hcd, tr_type); ++ did_something = 1; + } ++ if(work_expected && !did_something) ++ DWC_DEBUGPL(DBG_USER, "Nothing to do !! frame = %x, g_next_sched_frame = %x\n", (int) hfnum.b.frnum, g_next_sched_frame); ++ if(!work_expected && did_something) ++ DWC_DEBUGPL(DBG_USER, "Unexpected work done !! frame = %x, g_next_sched_frame = %x\n", (int) hfnum.b.frnum, g_next_sched_frame); ++ + + /* Clear interrupt */ + gintsts.b.sofintr = 1; +@@ -2102,5 +2227,4 @@ + + return retval; + } +- + #endif /* DWC_DEVICE_ONLY */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:42:35.000000000 +0000 +@@ -1,3 +1,4 @@ ++ + /* ========================================================================== + * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_linux.c $ + * $Revision: #20 $ +@@ -50,6 +51,7 @@ + #include + #include + #include ++#include + #include + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + #include <../drivers/usb/core/hcd.h> +@@ -67,6 +69,8 @@ + #include "dwc_otg_dbg.h" + #include "dwc_otg_driver.h" + #include "dwc_otg_hcd.h" ++#include "dwc_otg_mphi_fix.h" ++ + /** + * Gets the endpoint number from a _bEndpointAddress argument. The endpoint is + * qualified with its direction (possible 32 endpoints per device). +@@ -76,6 +80,8 @@ + + static const char dwc_otg_hcd_name[] = "dwc_otg_hcd"; + ++extern bool fiq_fix_enable; ++ + /** @name Linux HC Driver API Functions */ + /** @{ */ + /* manage i/o requests, device state */ +@@ -366,6 +372,12 @@ + .get_b_hnp_enable = _get_b_hnp_enable, + }; + ++static struct fiq_handler fh = { ++ .name = "usb_fiq", ++}; ++static uint8_t fiqStack[1024]; ++ ++extern mphi_regs_t c_mphi_regs; + /** + * Initializes the HCD. This function allocates memory for and initializes the + * static parts of the usb_hcd and dwc_otg_hcd structures. It also registers the +@@ -379,6 +391,7 @@ + dwc_otg_device_t *otg_dev = DWC_OTG_BUSDRVDATA(_dev); + int retval = 0; + u64 dmamask; ++ struct pt_regs regs; + + DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD INIT otg_dev=%p\n", otg_dev); + +@@ -396,6 +409,18 @@ + pci_set_consistent_dma_mask(_dev, dmamask); + #endif + ++ if (fiq_fix_enable) ++ { ++ // Set up fiq ++ claim_fiq(&fh); ++ set_fiq_handler(__FIQ_Branch, 4); ++ memset(®s,0,sizeof(regs)); ++ regs.ARM_r8 = (long)dwc_otg_hcd_handle_fiq; ++ regs.ARM_r9 = (long)0; ++ regs.ARM_sp = (long)fiqStack + sizeof(fiqStack) - 4; ++ set_fiq_regs(®s); ++ } ++ + /* + * Allocate memory for the base HCD plus the DWC OTG HCD. + * Initialize the base HCD. +@@ -415,6 +440,26 @@ + + hcd->regs = otg_dev->os_dep.base; + ++ if (fiq_fix_enable) ++ { ++ //Set the mphi periph to the required registers ++ c_mphi_regs.base = otg_dev->os_dep.mphi_base; ++ c_mphi_regs.ctrl = otg_dev->os_dep.mphi_base + 0x4c; ++ c_mphi_regs.outdda = otg_dev->os_dep.mphi_base + 0x28; ++ c_mphi_regs.outddb = otg_dev->os_dep.mphi_base + 0x2c; ++ c_mphi_regs.intstat = otg_dev->os_dep.mphi_base + 0x50; ++ ++ //Enable mphi peripheral ++ writel((1<<31),c_mphi_regs.ctrl); ++#ifdef DEBUG ++ if (readl(c_mphi_regs.ctrl) & 0x80000000) ++ DWC_DEBUGPL(DBG_USER, "MPHI periph has been enabled\n"); ++ else ++ DWC_DEBUGPL(DBG_USER, "MPHI periph has NOT been enabled\n"); ++#endif ++ // Enable FIQ interrupt from USB peripheral ++ enable_fiq(INTERRUPT_VC_USB); ++ } + /* Initialize the DWC OTG HCD. */ + dwc_otg_hcd = dwc_otg_hcd_alloc_hcd(); + if (!dwc_otg_hcd) { +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:35.000000000 +0000 +@@ -572,6 +572,9 @@ + return status; + } + ++ ++extern int g_next_sched_frame, g_np_count, g_np_sent; ++ + /** + * Schedules an interrupt or isochronous transfer in the periodic schedule. + * +@@ -630,8 +633,13 @@ + DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_ready, &qh->qh_list_entry); + } + else { +- /* Always start in the inactive schedule. */ +- DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_inactive, &qh->qh_list_entry); ++ if(DWC_LIST_EMPTY(&hcd->periodic_sched_inactive) || dwc_frame_num_le(qh->sched_frame, g_next_sched_frame)) ++ { ++ g_next_sched_frame = qh->sched_frame; ++ ++ } ++ /* Always start in the inactive schedule. */ ++ DWC_LIST_INSERT_TAIL(&hcd->periodic_sched_inactive, &qh->qh_list_entry); + } + + if (!microframe_schedule) { +@@ -645,6 +653,7 @@ + return status; + } + ++ + /** + * This function adds a QH to either the non periodic or periodic schedule if + * it is not already in the schedule. If the QH is already in the schedule, no +@@ -667,6 +676,7 @@ + /* Always start in the inactive schedule. */ + DWC_LIST_INSERT_TAIL(&hcd->non_periodic_sched_inactive, + &qh->qh_list_entry); ++ g_np_count++; + } else { + status = schedule_periodic(hcd, qh); + if ( !hcd->periodic_qh_count ) { +@@ -767,6 +777,7 @@ + if (sched_next_periodic_split) { + + qh->sched_frame = frame_number; ++ + if (dwc_frame_num_le(frame_number, + dwc_frame_num_inc + (qh->start_split_frame, +@@ -815,6 +826,11 @@ + DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_ready, + &qh->qh_list_entry); + } else { ++ if(!dwc_frame_num_le(g_next_sched_frame, qh->sched_frame)) ++ { ++ g_next_sched_frame = qh->sched_frame; ++ } ++ + DWC_LIST_MOVE_HEAD + (&hcd->periodic_sched_inactive, + &qh->qh_list_entry); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.c 2014-04-28 00:42:35.000000000 +0000 +@@ -0,0 +1,113 @@ ++#include "dwc_otg_regs.h" ++#include "dwc_otg_dbg.h" ++ ++void dwc_debug_print_core_int_reg(gintsts_data_t gintsts, const char* function_name) ++{ ++ DWC_DEBUGPL(DBG_USER, "*** Debugging from within the %s function: ***\n" ++ "curmode: %1i Modemismatch: %1i otgintr: %1i sofintr: %1i\n" ++ "rxstsqlvl: %1i nptxfempty : %1i ginnakeff: %1i goutnakeff: %1i\n" ++ "ulpickint: %1i i2cintr: %1i erlysuspend:%1i usbsuspend: %1i\n" ++ "usbreset: %1i enumdone: %1i isooutdrop: %1i eopframe: %1i\n" ++ "restoredone: %1i epmismatch: %1i inepint: %1i outepintr: %1i\n" ++ "incomplisoin:%1i incomplisoout:%1i fetsusp: %1i resetdet: %1i\n" ++ "portintr: %1i hcintr: %1i ptxfempty: %1i lpmtranrcvd:%1i\n" ++ "conidstschng:%1i disconnect: %1i sessreqintr:%1i wkupintr: %1i\n", ++ function_name, ++ gintsts.b.curmode, ++ gintsts.b.modemismatch, ++ gintsts.b.otgintr, ++ gintsts.b.sofintr, ++ gintsts.b.rxstsqlvl, ++ gintsts.b.nptxfempty, ++ gintsts.b.ginnakeff, ++ gintsts.b.goutnakeff, ++ gintsts.b.ulpickint, ++ gintsts.b.i2cintr, ++ gintsts.b.erlysuspend, ++ gintsts.b.usbsuspend, ++ gintsts.b.usbreset, ++ gintsts.b.enumdone, ++ gintsts.b.isooutdrop, ++ gintsts.b.eopframe, ++ gintsts.b.restoredone, ++ gintsts.b.epmismatch, ++ gintsts.b.inepint, ++ gintsts.b.outepintr, ++ gintsts.b.incomplisoin, ++ gintsts.b.incomplisoout, ++ gintsts.b.fetsusp, ++ gintsts.b.resetdet, ++ gintsts.b.portintr, ++ gintsts.b.hcintr, ++ gintsts.b.ptxfempty, ++ gintsts.b.lpmtranrcvd, ++ gintsts.b.conidstschng, ++ gintsts.b.disconnect, ++ gintsts.b.sessreqintr, ++ gintsts.b.wkupintr); ++ return; ++} ++ ++void dwc_debug_core_int_mask(gintmsk_data_t gintmsk, const char* function_name) ++{ ++ DWC_DEBUGPL(DBG_USER, "Interrupt Mask status (called from %s) :\n" ++ "modemismatch: %1i otgintr: %1i sofintr: %1i rxstsqlvl: %1i\n" ++ "nptxfempty: %1i ginnakeff: %1i goutnakeff: %1i ulpickint: %1i\n" ++ "i2cintr: %1i erlysuspend:%1i usbsuspend: %1i usbreset: %1i\n" ++ "enumdone: %1i isooutdrop: %1i eopframe: %1i restoredone: %1i\n" ++ "epmismatch: %1i inepintr: %1i outepintr: %1i incomplisoin:%1i\n" ++ "incomplisoout:%1i fetsusp: %1i resetdet: %1i portintr: %1i\n" ++ "hcintr: %1i ptxfempty: %1i lpmtranrcvd:%1i conidstschng:%1i\n" ++ "disconnect: %1i sessreqintr:%1i wkupintr: %1i\n", ++ function_name, ++ gintmsk.b.modemismatch, ++ gintmsk.b.otgintr, ++ gintmsk.b.sofintr, ++ gintmsk.b.rxstsqlvl, ++ gintmsk.b.nptxfempty, ++ gintmsk.b.ginnakeff, ++ gintmsk.b.goutnakeff, ++ gintmsk.b.ulpickint, ++ gintmsk.b.i2cintr, ++ gintmsk.b.erlysuspend, ++ gintmsk.b.usbsuspend, ++ gintmsk.b.usbreset, ++ gintmsk.b.enumdone, ++ gintmsk.b.isooutdrop, ++ gintmsk.b.eopframe, ++ gintmsk.b.restoredone, ++ gintmsk.b.epmismatch, ++ gintmsk.b.inepintr, ++ gintmsk.b.outepintr, ++ gintmsk.b.incomplisoin, ++ gintmsk.b.incomplisoout, ++ gintmsk.b.fetsusp, ++ gintmsk.b.resetdet, ++ gintmsk.b.portintr, ++ gintmsk.b.hcintr, ++ gintmsk.b.ptxfempty, ++ gintmsk.b.lpmtranrcvd, ++ gintmsk.b.conidstschng, ++ gintmsk.b.disconnect, ++ gintmsk.b.sessreqintr, ++ gintmsk.b.wkupintr); ++ return; ++} ++ ++void dwc_debug_otg_int(gotgint_data_t gotgint, const char* function_name) ++{ ++ DWC_DEBUGPL(DBG_USER, "otg int register (from %s function):\n" ++ "sesenddet:%1i sesreqsucstschung:%2i hstnegsucstschng:%1i\n" ++ "hstnegdet:%1i adevtoutchng: %2i debdone: %1i\n" ++ "mvic: %1i\n", ++ function_name, ++ gotgint.b.sesenddet, ++ gotgint.b.sesreqsucstschng, ++ gotgint.b.hstnegsucstschng, ++ gotgint.b.hstnegdet, ++ gotgint.b.adevtoutchng, ++ gotgint.b.debdone, ++ gotgint.b.mvic); ++ ++ return; ++} +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.h 2014-04-28 00:42:35.000000000 +0000 +@@ -0,0 +1,36 @@ ++#ifndef __DWC_OTG_MPHI_FIX_H__ ++#define __DWC_OTG_MPHI_FIX_H__ ++ ++#define FIQ_WRITE_IO_ADDRESS(_addr_,_data_) *(volatile uint32_t *) IO_ADDRESS(_addr_) = _data_ ++#define FIQ_READ_IO_ADDRESS(_addr_) *(volatile uint32_t *) IO_ADDRESS(_addr_) ++#define FIQ_MODIFY_IO_ADDRESS(_addr_,_clear_,_set_) FIQ_WRITE_IO_ADDRESS(_addr_ , (FIQ_READ_IO_ADDRESS(_addr_)&~_clear_)|_set_) ++#define FIQ_WRITE(_addr_,_data_) *(volatile uint32_t *) _addr_ = _data_ ++ ++typedef struct { ++ volatile void* base; ++ volatile void* ctrl; ++ volatile void* outdda; ++ volatile void* outddb; ++ volatile void* intstat; ++} mphi_regs_t; ++ ++void dwc_debug_print_core_int_reg(gintsts_data_t gintsts, const char* function_name); ++void dwc_debug_core_int_mask(gintsts_data_t gintmsk, const char* function_name); ++void dwc_debug_otg_int(gotgint_data_t gotgint, const char* function_name); ++ ++ ++ ++#ifdef DEBUG ++#define DWC_DBG_PRINT_CORE_INT(_arg_) dwc_debug_print_core_int_reg(_arg_,__func__) ++#define DWC_DBG_PRINT_CORE_INT_MASK(_arg_) dwc_debug_core_int_mask(_arg_,__func__) ++#define DWC_DBG_PRINT_OTG_INT(_arg_) dwc_debug_otg_int(_arg_,__func__) ++ ++#else ++#define DWC_DBG_PRINT_CORE_INT(_arg_) ++#define DWC_DBG_PRINT_CORE_INT_MASK(_arg_) ++#define DWC_DBG_PRINT_OTG_INT(_arg_) ++ ++ ++#endif ++ ++#endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h 2014-04-28 00:42:35.000000000 +0000 +@@ -97,6 +97,9 @@ + /** Register offset for Diagnostic API */ + uint32_t reg_offset; + ++ /** Base address for MPHI peripheral */ ++ void *mphi_base; ++ + #ifdef LM_INTERFACE + struct lm_device *lmdev; + #elif defined(PCI_INTERFACE) +Index: linux-3.10-3.10.11/dummy/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1597_1f45d3d733d51369b3e21b3152839e24a840ec59.txt 2014-04-28 00:42:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.patch 2014-04-28 00:42:51.000000000 +0000 @@ -0,0 +1,183992 @@ +commit 0c32f49fc4c3b33678fcdb7a17f7437656a51ecf +Author: popcornmix +Date: Mon Sep 3 17:10:23 2012 +0100 + + Add non-mainline source for rtl8192cu wireless driver version 3.4.4_4749 as this is widely used. Disabled older rtlwifi driver + +Index: linux-3.10-3.10.11/drivers/net/wireless/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/Kconfig 2014-04-27 23:37:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/Kconfig 2014-04-28 00:42:37.000000000 +0000 +@@ -276,9 +276,10 @@ + source "drivers/net/wireless/orinoco/Kconfig" + source "drivers/net/wireless/p54/Kconfig" + source "drivers/net/wireless/rt2x00/Kconfig" +-source "drivers/net/wireless/rtlwifi/Kconfig" ++#source "drivers/net/wireless/rtlwifi/Kconfig" + source "drivers/net/wireless/ti/Kconfig" + source "drivers/net/wireless/zd1211rw/Kconfig" + source "drivers/net/wireless/mwifiex/Kconfig" ++source "drivers/net/wireless/rtl8192cu/Kconfig" + + endif # WLAN +Index: linux-3.10-3.10.11/drivers/net/wireless/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/Makefile 2014-04-27 23:37:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/Makefile 2014-04-28 00:42:37.000000000 +0000 +@@ -24,7 +24,7 @@ + obj-$(CONFIG_ZD1211RW) += zd1211rw/ + obj-$(CONFIG_RTL8180) += rtl818x/ + obj-$(CONFIG_RTL8187) += rtl818x/ +-obj-$(CONFIG_RTLWIFI) += rtlwifi/ ++#obj-$(CONFIG_RTLWIFI) += rtlwifi/ + + # 16-bit wireless PCMCIA client drivers + obj-$(CONFIG_PCMCIA_RAYCS) += ray_cs.o +@@ -57,3 +57,4 @@ + + obj-$(CONFIG_BRCMFMAC) += brcm80211/ + obj-$(CONFIG_BRCMSMAC) += brcm80211/ ++obj-$(CONFIG_RTL8192CU) += rtl8192cu/ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,6 @@ ++config RTL8192CU ++ tristate "Realtek 8192C USB WiFi" ++ depends on USB ++ ---help--- ++ Help message of RTL8192CU ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Makefile +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Makefile 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,545 @@ ++EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) ++EXTRA_CFLAGS += -O1 ++#EXTRA_CFLAGS += -O3 ++#EXTRA_CFLAGS += -Wall ++#EXTRA_CFLAGS += -Wextra ++#EXTRA_CFLAGS += -Werror ++#EXTRA_CFLAGS += -pedantic ++#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes ++ ++EXTRA_CFLAGS += -Wno-unused-variable ++EXTRA_CFLAGS += -Wno-unused-value ++EXTRA_CFLAGS += -Wno-unused-label ++EXTRA_CFLAGS += -Wno-unused-parameter ++EXTRA_CFLAGS += -Wno-unused-function ++EXTRA_CFLAGS += -Wno-unused ++ ++EXTRA_CFLAGS += -Wno-uninitialized ++ ++EXTRA_CFLAGS += -I$(src)/include ++ ++CONFIG_AUTOCFG_CP = n ++ ++CONFIG_RTL8192C = y ++CONFIG_RTL8192D = n ++ ++CONFIG_USB_HCI = y ++CONFIG_PCI_HCI = n ++CONFIG_SDIO_HCI = n ++ ++CONFIG_MP_INCLUDED = n ++CONFIG_POWER_SAVING = y ++CONFIG_USB_AUTOSUSPEND = n ++CONFIG_HW_PWRP_DETECTION = n ++CONFIG_WIFI_TEST = n ++CONFIG_BT_COEXISTENCE = n ++CONFIG_RTL8192CU_REDEFINE_1X1 =n ++CONFIG_WAKE_ON_WLAN = n ++ ++CONFIG_PLATFORM_I386_PC = n ++CONFIG_PLATFORM_TI_AM3517 = n ++CONFIG_PLATFORM_ANDROID_X86 = n ++CONFIG_PLATFORM_ARM_S3C2K4 = n ++CONFIG_PLATFORM_ARM_PXA2XX = n ++CONFIG_PLATFORM_ARM_S3C6K4 = n ++CONFIG_PLATFORM_MIPS_RMI = n ++CONFIG_PLATFORM_RTD2880B = n ++CONFIG_PLATFORM_MIPS_AR9132 = n ++CONFIG_PLATFORM_RTK_DMP = n ++CONFIG_PLATFORM_MIPS_PLM = n ++CONFIG_PLATFORM_MSTAR389 = n ++CONFIG_PLATFORM_MT53XX = n ++CONFIG_PLATFORM_ARM_MX51_241H = n ++CONFIG_PLATFORM_ACTIONS_ATJ227X = n ++CONFIG_PLATFORM_ARM_TEGRA3 = n ++CONFIG_PLATFORM_ARM_TCC8900 = n ++CONFIG_PLATFORM_ARM_TCC8920 = n ++CONFIG_PLATFORM_ARM_RK2818 = n ++CONFIG_PLATFORM_ARM_TI_PANDA = n ++CONFIG_PLATFORM_MIPS_JZ4760 = n ++CONFIG_PLATFORM_DMP_PHILIPS = n ++CONFIG_PLATFORM_TI_DM365 = n ++CONFIG_PLATFORM_MN10300 = n ++CONFIG_PLATFORM_MSTAR_TITANIA12 = n ++CONFIG_PLATFORM_ARM_BCM2708 = y ++ ++CONFIG_DRVEXT_MODULE = n ++ ++export TopDIR ?= $(shell pwd) ++ ++ ++ifeq ($(CONFIG_RTL8712), y) ++ ++RTL871X = rtl8712 ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8712s ++endif ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8712u ++endif ++ ++endif ++ ++ifeq ($(CONFIG_RTL8192C), y) ++ ++RTL871X = rtl8192c ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8192cs ++endif ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8192cu ++FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o ++ifneq ($(CONFIG_WAKE_ON_WLAN), n) ++FW_FILES += hal/$(RTL871X)/usb/Hal8192CUHWImg_wowlan.o ++endif ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8192ce ++FW_FILES := hal/$(RTL871X)/pci/Hal8192CEHWImg.o ++endif ++ ++CHIP_FILES := hal/$(RTL871X)/$(RTL871X)_sreset.o ++CHIP_FILES += $(FW_FILES) ++endif ++ ++ifeq ($(CONFIG_RTL8192D), y) ++ ++RTL871X = rtl8192d ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8192ds ++endif ++ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8192du ++FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o \ ++ hal/$(RTL871X)/usb/Hal8192DUTestHWImg.o ++ifneq ($(CONFIG_WAKE_ON_WLAN), n) ++FW_FILES += hal/$(RTL871X)/usb/Hal8192DUHWImg_wowlan.o ++endif ++endif ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8192de ++FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o \ ++ hal/$(RTL871X)/pci/Hal8192DETestHWImg.o ++endif ++ ++CHIP_FILES += $(FW_FILES) ++endif ++ ++ifeq ($(CONFIG_SDIO_HCI), y) ++ ++HCI_NAME = sdio ++ ++_OS_INTFS_FILES := os_dep/osdep_service.o \ ++ os_dep/linux/os_intfs.o \ ++ os_dep/linux/sdio_intf.o \ ++ os_dep/linux/ioctl_linux.o \ ++ os_dep/linux/xmit_linux.o \ ++ os_dep/linux/mlme_linux.o \ ++ os_dep/linux/recv_linux.o \ ++ os_dep/linux/rtw_android.o ++ ++_HAL_INTFS_FILES := hal/$(RTL871X)/hal_init.o \ ++ hal/$(RTL871X)/sdio_halinit.o \ ++ hal/$(RTL871X)/sdio_ops.o \ ++ hal/$(RTL871X)/sdio_ops_linux.o ++ ++endif ++ ++ ++ifeq ($(CONFIG_USB_HCI), y) ++ ++HCI_NAME = usb ++ ++_OS_INTFS_FILES := os_dep/osdep_service.o \ ++ os_dep/linux/os_intfs.o \ ++ os_dep/linux/$(HCI_NAME)_intf.o \ ++ os_dep/linux/ioctl_linux.o \ ++ os_dep/linux/xmit_linux.o \ ++ os_dep/linux/mlme_linux.o \ ++ os_dep/linux/recv_linux.o \ ++ os_dep/linux/ioctl_cfg80211.o \ ++ os_dep/linux/rtw_android.o ++ ++_HAL_INTFS_FILES := hal/hal_init.o \ ++ hal/$(RTL871X)/$(RTL871X)_hal_init.o \ ++ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ ++ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ ++ hal/$(RTL871X)/$(RTL871X)_dm.o \ ++ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ ++ hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ hal/$(RTL871X)/$(RTL871X)_mp.o \ ++ hal/$(RTL871X)/usb/usb_ops_linux.o \ ++ hal/$(RTL871X)/usb/usb_halinit.o \ ++ hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_led.o \ ++ hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_xmit.o \ ++ hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_recv.o ++ ++_HAL_INTFS_FILES += $(CHIP_FILES) ++ ++endif ++ ++ ++ifeq ($(CONFIG_PCI_HCI), y) ++ ++HCI_NAME = pci ++ ++_OS_INTFS_FILES := os_dep/osdep_service.o \ ++ os_dep/linux/os_intfs.o \ ++ os_dep/linux/$(HCI_NAME)_intf.o \ ++ os_dep/linux/ioctl_linux.o \ ++ os_dep/linux/xmit_linux.o \ ++ os_dep/linux/mlme_linux.o \ ++ os_dep/linux/recv_linux.o \ ++ os_dep/linux/rtw_android.o ++ ++_HAL_INTFS_FILES := hal/hal_init.o \ ++ hal/$(RTL871X)/$(RTL871X)_hal_init.o \ ++ hal/$(RTL871X)/$(RTL871X)_phycfg.o \ ++ hal/$(RTL871X)/$(RTL871X)_rf6052.o \ ++ hal/$(RTL871X)/$(RTL871X)_dm.o \ ++ hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ ++ hal/$(RTL871X)/$(RTL871X)_cmd.o \ ++ hal/$(RTL871X)/$(RTL871X)_mp.o \ ++ hal/$(RTL871X)/pci/pci_ops_linux.o \ ++ hal/$(RTL871X)/pci/pci_halinit.o \ ++ hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_led.o \ ++ hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_xmit.o \ ++ hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_recv.o ++ ++_HAL_INTFS_FILES += $(CHIP_FILES) ++ ++endif ++ ++ifeq ($(CONFIG_AUTOCFG_CP), y) ++$(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) ++endif ++ ++ ++ifeq ($(CONFIG_USB_HCI), y) ++ifeq ($(CONFIG_USB_AUTOSUSPEND), y) ++EXTRA_CFLAGS += -DCONFIG_USB_AUTOSUSPEND ++endif ++endif ++ ++ifeq ($(CONFIG_POWER_SAVING), y) ++EXTRA_CFLAGS += -DCONFIG_POWER_SAVING ++endif ++ ++ifeq ($(CONFIG_HW_PWRP_DETECTION), y) ++EXTRA_CFLAGS += -DCONFIG_HW_PWRP_DETECTION ++endif ++ ++ifeq ($(CONFIG_WIFI_TEST), y) ++EXTRA_CFLAGS += -DCONFIG_WIFI_TEST ++endif ++ ++ifeq ($(CONFIG_BT_COEXISTENCE), y) ++EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE ++endif ++ ++ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y) ++EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R ++endif ++ ++ifeq ($(CONFIG_WAKE_ON_WLAN), y) ++EXTRA_CFLAGS += -DCONFIG_WAKE_ON_WLAN ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_BCM2708), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE ?= ++KVER := 3.6.11+ ++KSRC := /lib/modules/$(KVER)/build ++endif ++ ++ifeq ($(CONFIG_PLATFORM_I386_PC), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH ?= $(SUBARCH) ++CROSS_COMPILE ?= ++KVER := $(shell uname -r) ++KSRC := /lib/modules/$(KVER)/build ++MODDESTDIR := /lib/modules/$(KVER)/kernel/drivers/net/wireless/ ++INSTALL_PREFIX := ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TI_AM3517), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_SHUTTLE ++CROSS_COMPILE := arm-eabi- ++KSRC := $(shell pwd)/../../../Android/kernel ++ARCH := arm ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR_TITANIA12 ++ARCH:=mips ++CROSS_COMPILE:= /work/mstar/mips-4.3/bin/mips-linux-gnu- ++KVER:= 2.6.28.9 ++KSRC:= /work/mstar/2.6.28.9/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH := $(SUBARCH) ++CROSS_COMPILE := /media/DATA-2/android-x86/ics-x86_20120130/prebuilt/linux-x86/toolchain/i686-unknown-linux-gnu-4.2.1/bin/i686-unknown-linux-gnu- ++KSRC := /media/DATA-2/android-x86/ics-x86_20120130/out/target/product/generic_x86/obj/kernel ++MODULE_NAME :=wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 2.6.34.1 ++KSRC ?= /usr/src/linux-2.6.34.1 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_S3C2K4), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-linux- ++KVER := 2.6.24.7_$(ARCH) ++KSRC := /usr/src/kernels/linux-$(KVER) ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_S3C6K4), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 2.6.34.1 ++KSRC ?= /usr/src/linux-2.6.34.1 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_RTD2880B), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN -DCONFIG_PLATFORM_RTD2880B ++ARCH:= ++CROSS_COMPILE:= ++KVER:= ++KSRC:= ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_RMI), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH:=mips ++CROSS_COMPILE:=mipsisa32r2-uclibc- ++KVER:= ++KSRC:= /root/work/kernel_realtek ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_PLM), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ++ARCH:=mips ++CROSS_COMPILE:=mipsisa32r2-uclibc- ++KVER:= ++KSRC:= /root/work/kernel_realtek ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR389), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR389 ++ARCH:=mips ++CROSS_COMPILE:= mips-linux-gnu- ++KVER:= 2.6.28.10 ++KSRC:= /home/mstar/mstar_linux/2.6.28.9/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_AR9132), y) ++EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN ++ARCH := mips ++CROSS_COMPILE := mips-openwrt-linux- ++KSRC := /home/alex/test_openwrt/tmp/linux-2.6.30.9 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_DMP_PHILIPS), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ++ARCH := mips ++#CROSS_COMPILE:=/usr/local/msdk-4.3.6-mips-EL-2.6.12.6-0.9.30.3/bin/mipsel-linux- ++CROSS_COMPILE:=/usr/local/toolchain_mipsel/bin/mipsel-linux- ++KSRC ?=/usr/local/Jupiter/linux-2.6.12 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_RTK_DMP), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM ++ARCH:=mips ++CROSS_COMPILE:=mipsel-linux- ++KVER:= ++KSRC ?= /usr/src/work/DMP_Kernel/jupiter/linux-2.6.12 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MT53XX), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MT53XX ++ARCH:= arm ++CROSS_COMPILE:= arm11_mtk_le- ++KVER:= 2.6.27 ++KSRC?= /proj/mtk00802/BD_Compare/BDP/Dev/BDP_V301/BDP_Linux/linux-2.6.27 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_MX51_241H), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_WISTRON_PLATFORM ++ARCH := arm ++CROSS_COMPILE := /opt/freescale/usr/local/gcc-4.1.2-glibc-2.5-nptl-3/arm-none-linux-gnueabi/bin/arm-none-linux-gnueabi- ++KVER := 2.6.31 ++KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X ++ARCH := mips ++CROSS_COMPILE := /home/cnsd4/project/actions/tools-2.6.27/bin/mipsel-linux-gnu- ++KVER := 2.6.27 ++KSRC := /home/cnsd4/project/actions/linux-2.6.27.28 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TI_DM365), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_TI_DM365 ++ARCH := arm ++CROSS_COMPILE := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/arm/v5t_le/bin/arm_v5t_le- ++KVER := 2.6.18 ++KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TEGRA3), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH ?= arm ++CROSS_COMPILE ?= /media/DATA-1/nvidia/gingerbread/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC ?= /media/DATA-1/nvidia/gingerbread/out/debug/target/product/cardhu/obj/KERNEL ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH ?= arm ++CROSS_COMPILE ?= /media/DATA-1/telechips/SDK_2302_20110425/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC ?=/media/DATA-1/telechips/SDK_2302_20110425/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH := arm ++CROSS_COMPILE := /media/DATA-2/telechips/ics_sdk/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /media/DATA-2/telechips/ics_sdk/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_RK2818), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ANDROID -DCONFIG_PLATFORM_ROCKCHIPS -DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH := arm ++CROSS_COMPILE := /usr/src/release_fae_version/toolchain/arm-eabi-4.4.0/bin/arm-eabi- ++KSRC := /usr/src/release_fae_version/kernel25_A7_281x ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TI_PANDA), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH := arm ++#CROSS_COMPILE := /media/DATA-1/aosp/ics-aosp_20111227/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++#KSRC := /media/DATA-1/aosp/android-omap-panda-3.0_20120104 ++CROSS_COMPILE := /media/DATA-1/android-4.0/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /media/DATA-1/android-4.0/panda_kernel/omap ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MIPS_JZ4760), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE ++ARCH ?= mips ++CROSS_COMPILE ?= /mnt/sdb5/Ingenic/Umido/mips-4.3/bin/mips-linux-gnu- ++KSRC ?= /mnt/sdb5/Ingenic/Umido/kernel ++endif ++ ++#Add setting for MN10300 ++ifeq ($(CONFIG_PLATFORM_MN10300), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MN10300 ++ARCH := mn10300 ++CROSS_COMPILE := mn10300-linux- ++KVER := 2.6.32.2 ++KSRC := /home/winuser/work/Plat_sLD2T_V3010/usr/src/linux-2.6.32.2 ++INSTALL_PREFIX := ++endif ++ ++ifeq ($(CONFIG_MP_INCLUDED), y) ++MODULE_NAME := $(MODULE_NAME)_mp ++EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED ++endif ++ ++ifneq ($(KERNELRELEASE),) ++ ++ ++rtk_core := core/rtw_cmd.o \ ++ core/rtw_security.o \ ++ core/rtw_debug.o \ ++ core/rtw_io.o \ ++ core/rtw_ioctl_query.o \ ++ core/rtw_ioctl_set.o \ ++ core/rtw_ieee80211.o \ ++ core/rtw_mlme.o \ ++ core/rtw_mlme_ext.o \ ++ core/rtw_wlan_util.o \ ++ core/rtw_pwrctrl.o \ ++ core/rtw_rf.o \ ++ core/rtw_recv.o \ ++ core/rtw_sta_mgt.o \ ++ core/rtw_xmit.o \ ++ core/rtw_p2p.o \ ++ core/rtw_br_ext.o \ ++ core/rtw_iol.o ++ ++$(MODULE_NAME)-y += $(rtk_core) ++ ++$(MODULE_NAME)-y += core/efuse/rtw_efuse.o ++ ++$(MODULE_NAME)-y += $(_HAL_INTFS_FILES) ++ ++$(MODULE_NAME)-y += $(_OS_INTFS_FILES) ++ ++ ++$(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \ ++ core/rtw_mp_ioctl.o \ ++ core/rtw_ioctl_rtl.o ++ ++obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o ++ ++else ++ ++export CONFIG_RTL8192CU = m ++ ++all: modules ++ ++modules: ++ $(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KSRC) M=$(shell pwd) modules ++ ++strip: ++ $(CROSS_COMPILE)strip $(MODULE_NAME).ko --strip-unneeded ++ ++install: ++ install -p -m 644 $(MODULE_NAME).ko $(MODDESTDIR) ++ /sbin/depmod -a ${KVER} ++ ++uninstall: ++ rm -f $(MODDESTDIR)/$(MODULE_NAME).ko ++ /sbin/depmod -a ${KVER} ++ ++ ++config_r: ++ @echo "make config" ++ /bin/bash script/Configure script/config.in ++ ++.PHONY: modules clean ++ ++clean: ++ rm -fr *.mod.c *.mod *.o .*.cmd *.ko *~ ++ rm .tmp_versions -fr ; rm Module.symvers -fr ++ rm -fr Module.markers ; rm -fr modules.order ++ cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/clean +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/clean 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,9 @@ ++#!/bin/bash ++rmmod 8192cu ++rmmod 8192ce ++rmmod 8192du ++rmmod 8192de ++ ++rmmod rtl8192cu ++rmmod rtl8192c_common ++rmmod rtlwifi +\ No newline at end of file +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1097 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_EFUSE_C_ ++ ++#include ++#include ++#include ++ ++#include ++ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++u8 fakeEfuseBank=0; ++u32 fakeEfuseUsedBytes=0; ++u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE]={0}; ++u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN]={0}; ++u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN]={0}; ++ ++u32 BTEfuseUsedBytes=0; ++u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++ ++u32 fakeBTEfuseUsedBytes=0; ++u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN]={0}; ++/*------------------------Define local variable------------------------------*/ ++ ++//------------------------------------------------------------------------------ ++#define REG_EFUSE_CTRL 0x0030 ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++//------------------------------------------------------------------------------ ++ ++BOOLEAN ++Efuse_Read1ByteFromFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u8 *Value ) ++{ ++ if(Offset >= EFUSE_MAX_HW_SIZE) ++ { ++ return _FALSE; ++ } ++ //DbgPrint("Read fake content, offset = %d\n", Offset); ++ if(fakeEfuseBank == 0) ++ *Value = fakeEfuseContent[Offset]; ++ else ++ *Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset]; ++ return _TRUE; ++} ++BOOLEAN ++Efuse_Write1ByteToFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value ) ++{ ++ if(Offset >= EFUSE_MAX_HW_SIZE) ++ { ++ return _FALSE; ++ } ++ if(fakeEfuseBank == 0) ++ fakeEfuseContent[Offset] = Value; ++ else ++ { ++ fakeBTEfuseContent[fakeEfuseBank-1][Offset] = Value; ++ } ++ return _TRUE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: Efuse_PowerSwitch ++ * ++ * Overview: When we want to enable write operation, we should change to ++ * pwr on state. When we stop write, we should switch to 500k mode ++ * and disable LDO 2.5V. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/17/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++Efuse_PowerSwitch( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ pAdapter->HalFunc.EfusePowerSwitch(pAdapter, bWrite, PwrState); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_GetCurrentSize ++ * ++ * Overview: Get current efuse size!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/16/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++u16 ++Efuse_GetCurrentSize( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ ret = pAdapter->HalFunc.EfuseGetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ ++ return ret; ++} ++ ++/* 11/16/2008 MH Add description. Get current efuse area enabled word!!. */ ++u8 ++Efuse_CalculateWordCnts(IN u8 word_en) ++{ ++ u8 word_cnts = 0; ++ if(!(word_en & BIT(0))) word_cnts++; // 0 : write enable ++ if(!(word_en & BIT(1))) word_cnts++; ++ if(!(word_en & BIT(2))) word_cnts++; ++ if(!(word_en & BIT(3))) word_cnts++; ++ return word_cnts; ++} ++ ++// ++// Description: ++// Execute E-Fuse read byte operation. ++// Refered from SD1 Richard. ++// ++// Assumption: ++// 1. Boot from E-Fuse and successfully auto-load. ++// 2. PASSIVE_LEVEL (USB interface) ++// ++// Created by Roger, 2008.10.21. ++// ++VOID ++ReadEFuseByte( ++ PADAPTER Adapter, ++ u16 _offset, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest) ++{ ++ u32 value32; ++ u8 readbyte; ++ u16 retry; ++ //u32 start=rtw_get_current_time(); ++ ++ if(bPseudoTest) ++ { ++ Efuse_Read1ByteFromFakeContent(Adapter, _offset, pbuf); ++ return; ++ } ++ ++ //Write Address ++ rtw_write8(Adapter, EFUSE_CTRL+1, (_offset & 0xff)); ++ readbyte = rtw_read8(Adapter, EFUSE_CTRL+2); ++ rtw_write8(Adapter, EFUSE_CTRL+2, ((_offset >> 8) & 0x03) | (readbyte & 0xfc)); ++ ++ //Write bit 32 0 ++ readbyte = rtw_read8(Adapter, EFUSE_CTRL+3); ++ rtw_write8(Adapter, EFUSE_CTRL+3, (readbyte & 0x7f)); ++ ++ //Check bit 32 read-ready ++ retry = 0; ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ //while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10)) ++ while(!(((value32 >> 24) & 0xff) & 0x80) && (retry<10000)) ++ { ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ retry++; ++ } ++ ++ // 20100205 Joseph: Add delay suggested by SD1 Victor. ++ // This fix the problem that Efuse read error in high temperature condition. ++ // Designer says that there shall be some delay after ready bit is set, or the ++ // result will always stay on last data we read. ++ rtw_udelay_os(50); ++ value32 = rtw_read32(Adapter, EFUSE_CTRL); ++ ++ *pbuf = (u8)(value32 & 0xff); ++ //MSG_8192C("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); ++ ++} ++ ++ ++// ++// Description: ++// 1. Execute E-Fuse read byte operation according as map offset and ++// save to E-Fuse table. ++// 2. Refered from SD1 Richard. ++// ++// Assumption: ++// 1. Boot from E-Fuse and successfully auto-load. ++// 2. PASSIVE_LEVEL (USB interface) ++// ++// Created by Roger, 2008.10.21. ++// ++// 2008/12/12 MH 1. Reorganize code flow and reserve bytes. and add description. ++// 2. Add efuse utilization collect. ++// 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 ++// write addr must be after sec5. ++// ++VOID ++efuse_ReadEFuse( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ Adapter->HalFunc.ReadEFuse(Adapter, efuseType, _offset, _size_byte, pbuf, bPseudoTest); ++} ++ ++VOID ++EFUSE_GetEfuseDefinition( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u8 type, ++ OUT PVOID *pOut, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ pAdapter->HalFunc.EFUSEGetEfuseDefinition(pAdapter, efuseType, type, pOut, bPseudoTest); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_Read1Byte ++ * ++ * Overview: Copy from WMAC fot EFUSE read 1 byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/23/2008 MHC Copy from WMAC. ++ * ++ *---------------------------------------------------------------------------*/ ++u8 ++EFUSE_Read1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address) ++{ ++ u8 data; ++ u8 Bytetemp = {0x00}; ++ u8 temp = {0x00}; ++ u32 k=0; ++ u16 contentLen=0; ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); ++ ++ if (Address < contentLen) //E-fuse 512Byte ++ { ++ //Write E-fuse Register address bit0~7 ++ temp = Address & 0xFF; ++ rtw_write8(Adapter, EFUSE_CTRL+1, temp); ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); ++ //Write E-fuse Register address bit8~9 ++ temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); ++ rtw_write8(Adapter, EFUSE_CTRL+2, temp); ++ ++ //Write 0x30[31]=0 ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ temp = Bytetemp & 0x7F; ++ rtw_write8(Adapter, EFUSE_CTRL+3, temp); ++ ++ //Wait Write-ready (0x30[31]=1) ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ while(!(Bytetemp & 0x80)) ++ { ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ k++; ++ if(k==1000) ++ { ++ k=0; ++ break; ++ } ++ } ++ data=rtw_read8(Adapter, EFUSE_CTRL); ++ return data; ++ } ++ else ++ return 0xFF; ++ ++}/* EFUSE_Read1Byte */ ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_Write1Byte ++ * ++ * Overview: Copy from WMAC fot EFUSE write 1 byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/23/2008 MHC Copy from WMAC. ++ * ++ *---------------------------------------------------------------------------*/ ++void ++EFUSE_Write1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address, ++ IN u8 Value) ++{ ++ u8 Bytetemp = {0x00}; ++ u8 temp = {0x00}; ++ u32 k=0; ++ u16 contentLen=0; ++ ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr=%x Data =%x\n", Address, Value)); ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI , TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&contentLen, _FALSE); ++ ++ if( Address < contentLen) //E-fuse 512Byte ++ { ++ rtw_write8(Adapter, EFUSE_CTRL, Value); ++ ++ //Write E-fuse Register address bit0~7 ++ temp = Address & 0xFF; ++ rtw_write8(Adapter, EFUSE_CTRL+1, temp); ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+2); ++ ++ //Write E-fuse Register address bit8~9 ++ temp = ((Address >> 8) & 0x03) | (Bytetemp & 0xFC); ++ rtw_write8(Adapter, EFUSE_CTRL+2, temp); ++ ++ //Write 0x30[31]=1 ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ temp = Bytetemp | 0x80; ++ rtw_write8(Adapter, EFUSE_CTRL+3, temp); ++ ++ //Wait Write-ready (0x30[31]=0) ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ while(Bytetemp & 0x80) ++ { ++ Bytetemp = rtw_read8(Adapter, EFUSE_CTRL+3); ++ k++; ++ if(k==100) ++ { ++ k=0; ++ break; ++ } ++ } ++ } ++}/* EFUSE_Write1Byte */ ++ ++/* 11/16/2008 MH Read one byte from real Efuse. */ ++u8 ++efuse_OneByteRead( ++ IN PADAPTER pAdapter, ++ IN u16 addr, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 tmpidx = 0; ++ u8 bResult; ++ ++ if(bPseudoTest) ++ { ++ bResult = Efuse_Read1ByteFromFakeContent(pAdapter, addr, data); ++ return bResult; ++ } ++ // -----------------e-fuse reg ctrl --------------------------------- ++ //address ++ rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); ++ rtw_write8(pAdapter, EFUSE_CTRL+2, ((u8)((addr>>8) &0x03) ) | ++ (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )); ++ ++ rtw_write8(pAdapter, EFUSE_CTRL+3, 0x72);//read cmd ++ ++ while(!(0x80 &rtw_read8(pAdapter, EFUSE_CTRL+3))&&(tmpidx<100)) ++ { ++ tmpidx++; ++ } ++ if(tmpidx<100) ++ { ++ *data=rtw_read8(pAdapter, EFUSE_CTRL); ++ bResult = _TRUE; ++ } ++ else ++ { ++ *data = 0xff; ++ bResult = _FALSE; ++ } ++ return bResult; ++} ++ ++/* 11/16/2008 MH Write one byte to reald Efuse. */ ++u8 ++efuse_OneByteWrite( ++ IN PADAPTER pAdapter, ++ IN u16 addr, ++ IN u8 data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 tmpidx = 0; ++ u8 bResult; ++ ++ if(bPseudoTest) ++ { ++ bResult = Efuse_Write1ByteToFakeContent(pAdapter, addr, data); ++ return bResult; ++ } ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("Addr = %x Data=%x\n", addr, data)); ++ ++ //return 0; ++ ++ // -----------------e-fuse reg ctrl --------------------------------- ++ //address ++ rtw_write8(pAdapter, EFUSE_CTRL+1, (u8)(addr&0xff)); ++ rtw_write8(pAdapter, EFUSE_CTRL+2, ++ (rtw_read8(pAdapter, EFUSE_CTRL+2)&0xFC )|(u8)((addr>>8)&0x03) ); ++ rtw_write8(pAdapter, EFUSE_CTRL, data);//data ++ ++ rtw_write8(pAdapter, EFUSE_CTRL+3, 0xF2);//write cmd ++ ++ while((0x80 & rtw_read8(pAdapter, EFUSE_CTRL+3)) && (tmpidx<100) ){ ++ tmpidx++; ++ } ++ ++ if(tmpidx<100) ++ { ++ bResult = _TRUE; ++ } ++ else ++ { ++ bResult = _FALSE; ++ } ++ ++ return bResult; ++} ++ ++int ++Efuse_PgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = pAdapter->HalFunc.Efuse_PgPacketRead(pAdapter, offset, data, bPseudoTest); ++ ++ return ret; ++} ++ ++int ++Efuse_PgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ ret = pAdapter->HalFunc.Efuse_PgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_WordEnableDataRead ++ * ++ * Overview: Read allowed word in current efuse section data. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/16/2008 MHC Create Version 0. ++ * 11/21/2008 MHC Fix Write bug when we only enable late word. ++ * ++ *---------------------------------------------------------------------------*/ ++void ++efuse_WordEnableDataRead(IN u8 word_en, ++ IN u8 *sourdata, ++ IN u8 *targetdata) ++{ ++ if (!(word_en&BIT(0))) ++ { ++ targetdata[0] = sourdata[0]; ++ targetdata[1] = sourdata[1]; ++ } ++ if (!(word_en&BIT(1))) ++ { ++ targetdata[2] = sourdata[2]; ++ targetdata[3] = sourdata[3]; ++ } ++ if (!(word_en&BIT(2))) ++ { ++ targetdata[4] = sourdata[4]; ++ targetdata[5] = sourdata[5]; ++ } ++ if (!(word_en&BIT(3))) ++ { ++ targetdata[6] = sourdata[6]; ++ targetdata[7] = sourdata[7]; ++ } ++} ++ ++ ++u8 ++Efuse_WordEnableDataWrite( IN PADAPTER pAdapter, ++ IN u16 efuse_addr, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ret=0; ++ ++ ret = pAdapter->HalFunc.Efuse_WordEnableDataWrite(pAdapter, efuse_addr, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static u8 efuse_read8(PADAPTER padapter, u16 address, u8 *value) ++{ ++ return efuse_OneByteRead(padapter,address, value, _FALSE); ++} ++ ++static u8 efuse_write8(PADAPTER padapter, u16 address, u8 *value) ++{ ++ return efuse_OneByteWrite(padapter,address, *value, _FALSE); ++} ++ ++/* ++ * read/wirte raw efuse data ++ */ ++u8 rtw_efuse_access(PADAPTER padapter, u8 bWrite, u16 start_addr, u16 cnts, u8 *data) ++{ ++ int i = 0; ++ u16 real_content_len = 0, max_available_size = 0; ++ u8 res = _FAIL ; ++ u8 (*rw8)(PADAPTER, u16, u8*); ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&real_content_len, _FALSE); ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if (start_addr > real_content_len) ++ return _FAIL; ++ ++ if (_TRUE == bWrite) { ++ if ((start_addr + cnts) > max_available_size) ++ return _FAIL; ++ rw8 = &efuse_write8; ++ } else ++ rw8 = &efuse_read8; ++ ++ Efuse_PowerSwitch(padapter, bWrite, _TRUE); ++ ++ // e-fuse one byte read / write ++ for (i = 0; i < cnts; i++) { ++ if (start_addr >= real_content_len) { ++ res = _FAIL; ++ break; ++ } ++ ++ res = rw8(padapter, start_addr++, data++); ++ if (_FAIL == res) break; ++ } ++ ++ Efuse_PowerSwitch(padapter, bWrite, _FALSE); ++ ++ return res; ++} ++//------------------------------------------------------------------------------ ++u16 efuse_GetMaxSize(PADAPTER padapter) ++{ ++ u16 max_size; ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI , TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_size, _FALSE); ++ return max_size; ++} ++//------------------------------------------------------------------------------ ++u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size) ++{ ++ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); ++ *size = Efuse_GetCurrentSize(padapter, EFUSE_WIFI, _FALSE); ++ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); ++ ++ return _SUCCESS; ++} ++//------------------------------------------------------------------------------ ++u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) ++{ ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ if ((addr + cnts) > mapLen) ++ return _FAIL; ++ ++ Efuse_PowerSwitch(padapter, _FALSE, _TRUE); ++ ++ efuse_ReadEFuse(padapter, EFUSE_WIFI, addr, cnts, data, _FALSE); ++ ++ Efuse_PowerSwitch(padapter, _FALSE, _FALSE); ++ ++ return _SUCCESS; ++} ++//------------------------------------------------------------------------------ ++u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data) ++{ ++ u8 offset, word_en; ++ u8 *map; ++ u8 newdata[PGPKT_DATA_SIZE]; ++ s32 i, j, idx; ++ u8 ret = _SUCCESS; ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ if ((addr + cnts) > mapLen) ++ return _FAIL; ++ ++ map = rtw_zmalloc(mapLen); ++ if(map == NULL){ ++ return _FAIL; ++ } ++ ++ ret = rtw_efuse_map_read(padapter, 0, mapLen, map); ++ if (ret == _FAIL) goto exit; ++ ++ Efuse_PowerSwitch(padapter, _TRUE, _TRUE); ++ ++ offset = (addr >> 3); ++ word_en = 0xF; ++ _rtw_memset(newdata, 0xFF, PGPKT_DATA_SIZE); ++ i = addr & 0x7; // index of one package ++ j = 0; // index of new package ++ idx = 0; // data index ++ ++ if (i & 0x1) { ++ // odd start ++ if (data[idx] != map[addr+idx]) { ++ word_en &= ~BIT(i >> 1); ++ newdata[i-1] = map[addr+idx-1]; ++ newdata[i] = data[idx]; ++ } ++ i++; ++ idx++; ++ } ++ do { ++ for (; i < PGPKT_DATA_SIZE; i += 2) ++ { ++ if (cnts == idx) break; ++ if ((cnts - idx) == 1) { ++ if (data[idx] != map[addr+idx]) { ++ word_en &= ~BIT(i >> 1); ++ newdata[i] = data[idx]; ++ newdata[i+1] = map[addr+idx+1]; ++ } ++ idx++; ++ break; ++ } else { ++ if ((data[idx] != map[addr+idx]) || ++ (data[idx+1] != map[addr+idx+1])) ++ { ++ word_en &= ~BIT(i >> 1); ++ newdata[i] = data[idx]; ++ newdata[i+1] = data[idx + 1]; ++ } ++ idx += 2; ++ } ++ if (idx == cnts) break; ++ } ++ ++ if (word_en != 0xF) { ++ ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE); ++ DBG_8192C("offset=%x \n",offset); ++ DBG_8192C("word_en=%x \n",word_en); ++ ++ for(i=0;iefuse_eeprom_data[Offset]; ++ ++} // EFUSE_ShadowRead1Byte ++ ++//---------------Read Two Bytes ++static VOID ++efuse_ShadowRead2Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u16 *Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ *Value = pEEPROM->efuse_eeprom_data[Offset]; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; ++ ++} // EFUSE_ShadowRead2Byte ++ ++//---------------Read Four Bytes ++static VOID ++efuse_ShadowRead4Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN OUT u32 *Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ *Value = pEEPROM->efuse_eeprom_data[Offset]; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+1]<<8; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+2]<<16; ++ *Value |= pEEPROM->efuse_eeprom_data[Offset+3]<<24; ++ ++} // efuse_ShadowRead4Byte ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: efuse_ShadowWrite1Byte ++ * efuse_ShadowWrite2Byte ++ * efuse_ShadowWrite4Byte ++ * ++ * Overview: Write efuse modify map by one/two/four byte. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++efuse_ShadowWrite1Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = Value; ++ ++} // efuse_ShadowWrite1Byte ++ ++//---------------Write Two Bytes ++static VOID ++efuse_ShadowWrite2Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u16 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = Value&0x00FF; ++ pEEPROM->efuse_eeprom_data[Offset+1] = Value>>8; ++ ++} // efuse_ShadowWrite1Byte ++ ++//---------------Write Four Bytes ++static VOID ++efuse_ShadowWrite4Byte( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u32 Value) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ ++ pEEPROM->efuse_eeprom_data[Offset] = (u8)(Value&0x000000FF); ++ pEEPROM->efuse_eeprom_data[Offset+1] = (u8)((Value>>8)&0x0000FF); ++ pEEPROM->efuse_eeprom_data[Offset+2] = (u8)((Value>>16)&0x00FF); ++ pEEPROM->efuse_eeprom_data[Offset+3] = (u8)((Value>>24)&0xFF); ++ ++} // efuse_ShadowWrite1Byte ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowMapUpdate ++ * ++ * Overview: Transfer current EFUSE content to shadow init and modify map. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/13/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++void EFUSE_ShadowMapUpdate( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ u16 mapLen=0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, bPseudoTest); ++ ++ if (pEEPROM->bautoload_fail_flag == _TRUE) ++ { ++ _rtw_memset(pEEPROM->efuse_eeprom_data, 0xFF, mapLen); ++ } ++ else ++ { ++ #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ if(_SUCCESS != retriveAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM)) { ++ #endif ++ ++ Efuse_ReadAllMap(pAdapter, efuseType, pEEPROM->efuse_eeprom_data, bPseudoTest); ++ ++ #ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ storeAdaptorInfoFile(pAdapter->registrypriv.adaptor_info_caching_file_path, pEEPROM); ++ } ++ #endif ++ } ++ ++ //PlatformMoveMemory((PVOID)&pHalData->EfuseMap[EFUSE_MODIFY_MAP][0], ++ //(PVOID)&pHalData->EfuseMap[EFUSE_INIT_MAP][0], mapLen); ++}// EFUSE_ShadowMapUpdate ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowRead ++ * ++ * Overview: Read from efuse init map !!!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++void ++EFUSE_ShadowRead( ++ IN PADAPTER pAdapter, ++ IN u8 Type, ++ IN u16 Offset, ++ IN OUT u32 *Value ) ++{ ++ if (Type == 1) ++ efuse_ShadowRead1Byte(pAdapter, Offset, (u8 *)Value); ++ else if (Type == 2) ++ efuse_ShadowRead2Byte(pAdapter, Offset, (u16 *)Value); ++ else if (Type == 4) ++ efuse_ShadowRead4Byte(pAdapter, Offset, (u32 *)Value); ++ ++} // EFUSE_ShadowRead ++ ++/*----------------------------------------------------------------------------- ++ * Function: EFUSE_ShadowWrite ++ * ++ * Overview: Write efuse modify map for later update operation to use!!!!! ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++extern VOID ++EFUSE_ShadowWrite( ++ IN PADAPTER pAdapter, ++ IN u8 Type, ++ IN u16 Offset, ++ IN OUT u32 Value) ++{ ++#if (MP_DRIVER == 0) ++ return; ++#endif ++ ++ if (Type == 1) ++ efuse_ShadowWrite1Byte(pAdapter, Offset, (u8)Value); ++ else if (Type == 2) ++ efuse_ShadowWrite2Byte(pAdapter, Offset, (u16)Value); ++ else if (Type == 4) ++ efuse_ShadowWrite4Byte(pAdapter, Offset, (u32)Value); ++ ++} // EFUSE_ShadowWrite ++ ++VOID ++Efuse_InitSomeVar( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u8 i; ++ ++ _rtw_memset((PVOID)&fakeEfuseContent[0], 0xff, EFUSE_MAX_HW_SIZE); ++ _rtw_memset((PVOID)&fakeEfuseInitMap[0], 0xff, EFUSE_MAX_MAP_LEN); ++ _rtw_memset((PVOID)&fakeEfuseModifiedMap[0], 0xff, EFUSE_MAX_MAP_LEN); ++ ++ for(i=0; i ++ ++ int isAdaptorInfoFileValid(void) ++{ ++ return _TRUE; ++} ++ ++int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++{ ++ int ret =_SUCCESS; ++ ++ if(path && eeprom_priv) { ++ ret = rtw_store_to_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); ++ if(ret == EEPROM_MAX_SIZE) ++ ret = _SUCCESS; ++ else ++ ret = _FAIL; ++ } else { ++ DBG_8192C("%s NULL pointer\n",__FUNCTION__); ++ ret = _FAIL; ++ } ++ return ret; ++} ++ ++int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv) ++{ ++ int ret = _SUCCESS; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && eeprom_priv) { ++ ++ ret = rtw_retrive_from_file(path, eeprom_priv->efuse_eeprom_data, EEPROM_MAX_SIZE); ++ ++ if(ret == EEPROM_MAX_SIZE) ++ ret = _SUCCESS; ++ else ++ ret = _FAIL; ++ ++ #if 0 ++ if(isAdaptorInfoFileValid()) { ++ return 0; ++ } else { ++ return _FAIL; ++ } ++ #endif ++ ++ } else { ++ DBG_8192C("%s NULL pointer\n",__FUNCTION__); ++ ret = _FAIL; ++ } ++ return ret; ++} ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++#endif //PLATFORM_LINUX ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1694 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_BR_EXT_C_ ++ ++#ifdef __KERNEL__ ++#include ++#include ++#include ++#include ++#include ++#include ++#endif ++ ++#if 1 // rtw_wifi_driver ++#include ++#include ++#include "rtw_br_ext.h" ++#else // rtw_wifi_driver ++#include "./8192cd_cfg.h" ++ ++#ifndef __KERNEL__ ++#include "./sys-support.h" ++#endif ++ ++#include "./8192cd.h" ++#include "./8192cd_headers.h" ++#include "./8192cd_br_ext.h" ++#include "./8192cd_debug.h" ++#endif // rtw_wifi_driver ++ ++#ifdef CL_IPV6_PASS ++#ifdef __KERNEL__ ++#include ++#include ++#include ++#include ++#endif ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ ++//#define BR_EXT_DEBUG ++ ++#define NAT25_IPV4 01 ++#define NAT25_IPV6 02 ++#define NAT25_IPX 03 ++#define NAT25_APPLE 04 ++#define NAT25_PPPOE 05 ++ ++#define RTL_RELAY_TAG_LEN (ETH_ALEN) ++#define TAG_HDR_LEN 4 ++ ++#define MAGIC_CODE 0x8186 ++#define MAGIC_CODE_LEN 2 ++#define WAIT_TIME_PPPOE 5 // waiting time for pppoe server in sec ++ ++/*----------------------------------------------------------------- ++ How database records network address: ++ 0 1 2 3 4 5 6 7 8 9 10 ++ |----|----|----|----|----|----|----|----|----|----|----| ++ IPv4 |type| | IP addr | ++ IPX |type| Net addr | Node addr | ++ IPX |type| Net addr |Sckt addr| ++ Apple |type| Network |node| ++ PPPoE |type| SID | AC MAC | ++-----------------------------------------------------------------*/ ++ ++ ++//Find a tag in pppoe frame and return the pointer ++static __inline__ unsigned char *__nat25_find_pppoe_tag(struct pppoe_hdr *ph, unsigned short type) ++{ ++ unsigned char *cur_ptr, *start_ptr; ++ unsigned short tagLen, tagType; ++ ++ start_ptr = cur_ptr = (unsigned char *)ph->tag; ++ while((cur_ptr - start_ptr) < ntohs(ph->length)) { ++ // prevent un-alignment access ++ tagType = (unsigned short)((cur_ptr[0] << 8) + cur_ptr[1]); ++ tagLen = (unsigned short)((cur_ptr[2] << 8) + cur_ptr[3]); ++ if(tagType == type) ++ return cur_ptr; ++ cur_ptr = cur_ptr + TAG_HDR_LEN + tagLen; ++ } ++ return 0; ++} ++ ++ ++static __inline__ int __nat25_add_pppoe_tag(struct sk_buff *skb, struct pppoe_tag *tag) ++{ ++ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); ++ int data_len; ++ ++ data_len = tag->tag_len + TAG_HDR_LEN; ++ if (skb_tailroom(skb) < data_len) { ++ _DEBUG_ERR("skb_tailroom() failed in add SID tag!\n"); ++ return -1; ++ } ++ ++ skb_put(skb, data_len); ++ // have a room for new tag ++ memmove(((unsigned char *)ph->tag + data_len), (unsigned char *)ph->tag, ntohs(ph->length)); ++ ph->length = htons(ntohs(ph->length) + data_len); ++ memcpy((unsigned char *)ph->tag, tag, data_len); ++ return data_len; ++} ++ ++static int skb_pull_and_merge(struct sk_buff *skb, unsigned char *src, int len) ++{ ++ int tail_len; ++ unsigned long end, tail; ++ ++ if ((src+len) > skb->tail || skb->len < len) ++ return -1; ++ ++ tail = (unsigned long)skb->tail; ++ end = (unsigned long)src+len; ++ if (tail < end) ++ return -1; ++ ++ tail_len = (int)(tail-end); ++ if (tail_len > 0) ++ memmove(src, src+len, tail_len); ++ ++ skb_trim(skb, skb->len-len); ++ return 0; ++} ++ ++static __inline__ unsigned long __nat25_timeout(_adapter *priv) ++{ ++ unsigned long timeout; ++ ++ timeout = jiffies - NAT25_AGEING_TIME*HZ; ++ ++ return timeout; ++} ++ ++ ++static __inline__ int __nat25_has_expired(_adapter *priv, ++ struct nat25_network_db_entry *fdb) ++{ ++ if(time_before_eq(fdb->ageing_timer, __nat25_timeout(priv))) ++ return 1; ++ ++ return 0; ++} ++ ++ ++static __inline__ void __nat25_generate_ipv4_network_addr(unsigned char *networkAddr, ++ unsigned int *ipAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPV4; ++ memcpy(networkAddr+7, (unsigned char *)ipAddr, 4); ++} ++ ++ ++static __inline__ void __nat25_generate_ipx_network_addr_with_node(unsigned char *networkAddr, ++ unsigned int *ipxNetAddr, unsigned char *ipxNodeAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPX; ++ memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); ++ memcpy(networkAddr+5, ipxNodeAddr, 6); ++} ++ ++ ++static __inline__ void __nat25_generate_ipx_network_addr_with_socket(unsigned char *networkAddr, ++ unsigned int *ipxNetAddr, unsigned short *ipxSocketAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPX; ++ memcpy(networkAddr+1, (unsigned char *)ipxNetAddr, 4); ++ memcpy(networkAddr+5, (unsigned char *)ipxSocketAddr, 2); ++} ++ ++ ++static __inline__ void __nat25_generate_apple_network_addr(unsigned char *networkAddr, ++ unsigned short *network, unsigned char *node) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_APPLE; ++ memcpy(networkAddr+1, (unsigned char *)network, 2); ++ networkAddr[3] = *node; ++} ++ ++ ++static __inline__ void __nat25_generate_pppoe_network_addr(unsigned char *networkAddr, ++ unsigned char *ac_mac, unsigned short *sid) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_PPPOE; ++ memcpy(networkAddr+1, (unsigned char *)sid, 2); ++ memcpy(networkAddr+3, (unsigned char *)ac_mac, 6); ++} ++ ++ ++#ifdef CL_IPV6_PASS ++static void __nat25_generate_ipv6_network_addr(unsigned char *networkAddr, ++ unsigned int *ipAddr) ++{ ++ memset(networkAddr, 0, MAX_NETWORK_ADDR_LEN); ++ ++ networkAddr[0] = NAT25_IPV6; ++ memcpy(networkAddr+1, (unsigned char *)ipAddr, 16); ++} ++ ++ ++static unsigned char *scan_tlv(unsigned char *data, int len, unsigned char tag, unsigned char len8b) ++{ ++ while (len > 0) { ++ if (*data == tag && *(data+1) == len8b && len >= len8b*8) ++ return data+2; ++ ++ len -= (*(data+1))*8; ++ data += (*(data+1))*8; ++ } ++ return NULL; ++} ++ ++ ++static int update_nd_link_layer_addr(unsigned char *data, int len, unsigned char *replace_mac) ++{ ++ struct icmp6hdr *icmphdr = (struct icmp6hdr *)data; ++ unsigned char *mac; ++ ++ if (icmphdr->icmp6_type == NDISC_ROUTER_SOLICITATION) { ++ if (len >= 8) { ++ mac = scan_tlv(&data[8], len-8, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Router Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_ROUTER_ADVERTISEMENT) { ++ if (len >= 16) { ++ mac = scan_tlv(&data[16], len-16, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Router Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_SOLICITATION) { ++ if (len >= 24) { ++ mac = scan_tlv(&data[24], len-24, 1, 1); ++ if (mac) { ++ _DEBUG_INFO("Neighbor Solicitation, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_NEIGHBOUR_ADVERTISEMENT) { ++ if (len >= 24) { ++ mac = scan_tlv(&data[24], len-24, 2, 1); ++ if (mac) { ++ _DEBUG_INFO("Neighbor Advertisement, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ else if (icmphdr->icmp6_type == NDISC_REDIRECT) { ++ if (len >= 40) { ++ mac = scan_tlv(&data[40], len-40, 2, 1); ++ if (mac) { ++ _DEBUG_INFO("Redirect, replace MAC From: %02x:%02x:%02x:%02x:%02x:%02x, To: %02x:%02x:%02x:%02x:%02x:%02x\n", ++ mac[0],mac[1],mac[2],mac[3],mac[4],mac[5], ++ replace_mac[0],replace_mac[1],replace_mac[2],replace_mac[3],replace_mac[4],replace_mac[5]); ++ memcpy(mac, replace_mac, 6); ++ return 1; ++ } ++ } ++ } ++ return 0; ++} ++ ++ ++static void convert_ipv6_mac_to_mc(struct sk_buff *skb) ++{ ++ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); ++ unsigned char *dst_mac = skb->data; ++ ++ //dst_mac[0] = 0xff; ++ //dst_mac[1] = 0xff; ++ /*modified by qinjunjie,ipv6 multicast address ix 0x33-33-xx-xx-xx-xx*/ ++ dst_mac[0] = 0x33; ++ dst_mac[1] = 0x33; ++ memcpy(&dst_mac[2], &iph->daddr.s6_addr32[3], 4); ++ #if defined(__LINUX_2_6__) ++ /*modified by qinjunjie,warning:should not remove next line*/ ++ skb->pkt_type = PACKET_MULTICAST; ++ #endif ++} ++#endif /* CL_IPV6_PASS */ ++ ++ ++static __inline__ int __nat25_network_hash(unsigned char *networkAddr) ++{ ++ if(networkAddr[0] == NAT25_IPV4) ++ { ++ unsigned long x; ++ ++ x = networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_IPX) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ ++ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_APPLE) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++ else if(networkAddr[0] == NAT25_PPPOE) ++ { ++ unsigned long x; ++ ++ x = networkAddr[0] ^ networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++#ifdef CL_IPV6_PASS ++ else if(networkAddr[0] == NAT25_IPV6) ++ { ++ unsigned long x; ++ ++ x = networkAddr[1] ^ networkAddr[2] ^ networkAddr[3] ^ networkAddr[4] ^ networkAddr[5] ^ ++ networkAddr[6] ^ networkAddr[7] ^ networkAddr[8] ^ networkAddr[9] ^ networkAddr[10] ^ ++ networkAddr[11] ^ networkAddr[12] ^ networkAddr[13] ^ networkAddr[14] ^ networkAddr[15] ^ ++ networkAddr[16]; ++ ++ return x & (NAT25_HASH_SIZE - 1); ++ } ++#endif ++ else ++ { ++ unsigned long x = 0; ++ int i; ++ ++ for (i=0; ibr_ext_lock, &irqL); ++ ++ ent->next_hash = priv->nethash[hash]; ++ if(ent->next_hash != NULL) ++ ent->next_hash->pprev_hash = &ent->next_hash; ++ priv->nethash[hash] = ent; ++ ent->pprev_hash = &priv->nethash[hash]; ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static __inline__ void __network_hash_unlink(struct nat25_network_db_entry *ent) ++{ ++ // Caller must _enter_critical_bh already! ++ //_irqL irqL; ++ //_enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ *(ent->pprev_hash) = ent->next_hash; ++ if(ent->next_hash != NULL) ++ ent->next_hash->pprev_hash = ent->pprev_hash; ++ ent->next_hash = NULL; ++ ent->pprev_hash = NULL; ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static int __nat25_db_network_lookup_and_replace(_adapter *priv, ++ struct sk_buff *skb, unsigned char *networkAddr) ++{ ++ struct nat25_network_db_entry *db; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ db = priv->nethash[__nat25_network_hash(networkAddr)]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) ++ { ++ if(!__nat25_has_expired(priv, db)) ++ { ++ // replace the destination mac address ++ memcpy(skb->data, db->macAddr, ETH_ALEN); ++ atomic_inc(&db->use_count); ++ ++#ifdef CL_IPV6_PASS ++ DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10], ++ db->networkAddr[11], ++ db->networkAddr[12], ++ db->networkAddr[13], ++ db->networkAddr[14], ++ db->networkAddr[15], ++ db->networkAddr[16]); ++#else ++ DEBUG_INFO("NAT25: Lookup M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10]); ++#endif ++ } ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return 1; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return 0; ++} ++ ++ ++static void __nat25_db_network_insert(_adapter *priv, ++ unsigned char *macAddr, unsigned char *networkAddr) ++{ ++ struct nat25_network_db_entry *db; ++ int hash; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ hash = __nat25_network_hash(networkAddr); ++ db = priv->nethash[hash]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) ++ { ++ memcpy(db->macAddr, macAddr, ETH_ALEN); ++ db->ageing_timer = jiffies; ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ db = (struct nat25_network_db_entry *) _rtw_malloc(sizeof(*db)); ++ if(db == NULL) { ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return; ++ } ++ ++ memcpy(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN); ++ memcpy(db->macAddr, macAddr, ETH_ALEN); ++ atomic_set(&db->use_count, 1); ++ db->ageing_timer = jiffies; ++ ++ __network_hash_link(priv, db, hash); ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++static void __nat25_db_print(_adapter *priv) ++{ ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++#ifdef BR_EXT_DEBUG ++ static int counter = 0; ++ int i, j; ++ struct nat25_network_db_entry *db; ++ ++ counter++; ++ if((counter % 16) != 0) ++ return; ++ ++ for(i=0, j=0; inethash[i]; ++ ++ while (db != NULL) ++ { ++#ifdef CL_IPV6_PASS ++ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ j, ++ i, ++ atomic_read(&db->use_count), ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10], ++ db->networkAddr[11], ++ db->networkAddr[12], ++ db->networkAddr[13], ++ db->networkAddr[14], ++ db->networkAddr[15], ++ db->networkAddr[16]); ++#else ++ panic_printk("NAT25: DB(%d) H(%02d) C(%d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ j, ++ i, ++ atomic_read(&db->use_count), ++ db->macAddr[0], ++ db->macAddr[1], ++ db->macAddr[2], ++ db->macAddr[3], ++ db->macAddr[4], ++ db->macAddr[5], ++ db->networkAddr[0], ++ db->networkAddr[1], ++ db->networkAddr[2], ++ db->networkAddr[3], ++ db->networkAddr[4], ++ db->networkAddr[5], ++ db->networkAddr[6], ++ db->networkAddr[7], ++ db->networkAddr[8], ++ db->networkAddr[9], ++ db->networkAddr[10]); ++#endif ++ j++; ++ ++ db = db->next_hash; ++ } ++ } ++#endif ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++ ++ ++/* ++ * NAT2.5 interface ++ */ ++ ++void nat25_db_cleanup(_adapter *priv) ++{ ++ int i; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ for(i=0; inethash[i]; ++ while (f != NULL) { ++ struct nat25_network_db_entry *g; ++ ++ g = f->next_hash; ++ if(priv->scdb_entry == f) ++ { ++ memset(priv->scdb_mac, 0, ETH_ALEN); ++ memset(priv->scdb_ip, 0, 4); ++ priv->scdb_entry = NULL; ++ } ++ __network_hash_unlink(f); ++ _rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ ++ f = g; ++ } ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++void nat25_db_expire(_adapter *priv) ++{ ++ int i; ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ //if(!priv->ethBrExtInfo.nat25_disable) ++ { ++ for (i=0; inethash[i]; ++ ++ while (f != NULL) ++ { ++ struct nat25_network_db_entry *g; ++ g = f->next_hash; ++ ++ if(__nat25_has_expired(priv, f)) ++ { ++ if(atomic_dec_and_test(&f->use_count)) ++ { ++#ifdef BR_EXT_DEBUG ++#ifdef CL_IPV6_PASS ++ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" ++ "%02x%02x%02x%02x%02x%02x\n", ++ i, ++ f->macAddr[0], ++ f->macAddr[1], ++ f->macAddr[2], ++ f->macAddr[3], ++ f->macAddr[4], ++ f->macAddr[5], ++ f->networkAddr[0], ++ f->networkAddr[1], ++ f->networkAddr[2], ++ f->networkAddr[3], ++ f->networkAddr[4], ++ f->networkAddr[5], ++ f->networkAddr[6], ++ f->networkAddr[7], ++ f->networkAddr[8], ++ f->networkAddr[9], ++ f->networkAddr[10], ++ f->networkAddr[11], ++ f->networkAddr[12], ++ f->networkAddr[13], ++ f->networkAddr[14], ++ f->networkAddr[15], ++ f->networkAddr[16]); ++#else ++ ++ panic_printk("NAT25 Expire H(%02d) M:%02x%02x%02x%02x%02x%02x N:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", ++ i, ++ f->macAddr[0], ++ f->macAddr[1], ++ f->macAddr[2], ++ f->macAddr[3], ++ f->macAddr[4], ++ f->macAddr[5], ++ f->networkAddr[0], ++ f->networkAddr[1], ++ f->networkAddr[2], ++ f->networkAddr[3], ++ f->networkAddr[4], ++ f->networkAddr[5], ++ f->networkAddr[6], ++ f->networkAddr[7], ++ f->networkAddr[8], ++ f->networkAddr[9], ++ f->networkAddr[10]); ++#endif ++#endif ++ if(priv->scdb_entry == f) ++ { ++ memset(priv->scdb_mac, 0, ETH_ALEN); ++ memset(priv->scdb_ip, 0, 4); ++ priv->scdb_entry = NULL; ++ } ++ __network_hash_unlink(f); ++ _rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ } ++ } ++ ++ f = g; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++} ++ ++ ++#ifdef SUPPORT_TX_MCAST2UNI ++static int checkIPMcAndReplace(_adapter *priv, struct sk_buff *skb, unsigned int *dst_ip) ++{ ++ struct stat_info *pstat; ++ struct list_head *phead, *plist; ++ int i; ++ ++ phead = &priv->asoc_list; ++ plist = phead->next; ++ ++ while (plist != phead) { ++ pstat = list_entry(plist, struct stat_info, asoc_list); ++ plist = plist->next; ++ ++ if (pstat->ipmc_num == 0) ++ continue; ++ ++ for (i=0; iipmc[i].used && !memcmp(&pstat->ipmc[i].mcmac[3], ((unsigned char *)dst_ip)+1, 3)) { ++ memcpy(skb->data, pstat->ipmc[i].mcmac, ETH_ALEN); ++ return 1; ++ } ++ } ++ } ++ return 0; ++} ++#endif ++ ++int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method) ++{ ++ unsigned short protocol; ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++ ++ if(skb == NULL) ++ return -1; ++ ++ if((method <= NAT25_MIN) || (method >= NAT25_MAX)) ++ return -1; ++ ++ protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); ++ ++ /*---------------------------------------------------*/ ++ /* Handle IP frame */ ++ /*---------------------------------------------------*/ ++ if(protocol == __constant_htons(ETH_P_IP)) ++ { ++ struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); ++ ++ if(((unsigned char*)(iph) + (iph->ihl<<2)) >= (skb->data + ETH_HLEN + skb->len)) ++ { ++ DEBUG_WARN("NAT25: malformed IP packet !\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ //some muticast with source IP is all zero, maybe other case is illegal ++ //in class A, B, C, host address is all zero or all one is illegal ++ if (iph->saddr == 0) ++ return 0; ++ DEBUG_INFO("NAT25: Insert IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); ++ __nat25_generate_ipv4_network_addr(networkAddr, &iph->saddr); ++ //record source IP address and , source mac address into db ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup IP, SA=%08x, DA=%08x\n", iph->saddr, iph->daddr); ++#ifdef SUPPORT_TX_MCAST2UNI ++ if (priv->pshare->rf_ft_var.mc2u_disable || ++ ((((OPMODE & (WIFI_STATION_STATE|WIFI_ASOC_STATE)) ++ == (WIFI_STATION_STATE|WIFI_ASOC_STATE)) && ++ !checkIPMcAndReplace(priv, skb, &iph->daddr)) || ++ (OPMODE & WIFI_ADHOC_STATE))) ++#endif ++ { ++ __nat25_generate_ipv4_network_addr(networkAddr, &iph->daddr); ++ ++ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { ++ if (*((unsigned char *)&iph->daddr + 3) == 0xff) { ++ // L2 is unicast but L3 is broadcast, make L2 bacome broadcast ++ DEBUG_INFO("NAT25: Set DA as boardcast\n"); ++ memset(skb->data, 0xff, ETH_ALEN); ++ } ++ else { ++ // forward unknow IP packet to upper TCP/IP ++ DEBUG_INFO("NAT25: Replace DA with BR's MAC\n"); ++ memcpy(skb->data, priv->br_mac, ETH_ALEN); ++ } ++ } ++ } ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle ARP frame */ ++ /*---------------------------------------------------*/ ++ else if(protocol == __constant_htons(ETH_P_ARP)) ++ { ++ struct arphdr *arp = (struct arphdr *)(skb->data + ETH_HLEN); ++ unsigned char *arp_ptr = (unsigned char *)(arp + 1); ++ unsigned int *sender, *target; ++ ++ if(arp->ar_pro != __constant_htons(ETH_P_IP)) ++ { ++ DEBUG_WARN("NAT25: arp protocol unknown (%4x)!\n", htons(arp->ar_pro)); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return 0; // skb_copy for all ARP frame ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert ARP, MAC=%02x%02x%02x%02x%02x%02x\n", arp_ptr[0], ++ arp_ptr[1], arp_ptr[2], arp_ptr[3], arp_ptr[4], arp_ptr[5]); ++ ++ // change to ARP sender mac address to wlan STA address ++ memcpy(arp_ptr, GET_MY_HWADDR(priv), ETH_ALEN); ++ ++ arp_ptr += arp->ar_hln; ++ sender = (unsigned int *)arp_ptr; ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, sender); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup ARP\n"); ++ ++ arp_ptr += arp->ar_hln; ++ sender = (unsigned int *)arp_ptr; ++ arp_ptr += (arp->ar_hln + arp->ar_pln); ++ target = (unsigned int *)arp_ptr; ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, target); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // change to ARP target mac address to Lookup result ++ arp_ptr = (unsigned char *)(arp + 1); ++ arp_ptr += (arp->ar_hln + arp->ar_pln); ++ memcpy(arp_ptr, skb->data, ETH_ALEN); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle IPX and Apple Talk frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(ETH_P_IPX)) || ++ (protocol <= __constant_htons(ETH_FRAME_LEN))) ++ { ++ unsigned char ipx_header[2] = {0xFF, 0xFF}; ++ struct ipxhdr *ipx = NULL; ++ struct elapaarp *ea = NULL; ++ struct ddpehdr *ddp = NULL; ++ unsigned char *framePtr = skb->data + ETH_HLEN; ++ ++ if(protocol == __constant_htons(ETH_P_IPX)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet II)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else if(protocol <= __constant_htons(ETH_FRAME_LEN)) ++ { ++ if(!memcmp(ipx_header, framePtr, 2)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.3)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else ++ { ++ unsigned char ipx_8022_type = 0xE0; ++ unsigned char snap_8022_type = 0xAA; ++ ++ if(*framePtr == snap_8022_type) ++ { ++ unsigned char ipx_snap_id[5] = {0x0, 0x0, 0x0, 0x81, 0x37}; // IPX SNAP ID ++ unsigned char aarp_snap_id[5] = {0x00, 0x00, 0x00, 0x80, 0xF3}; // Apple Talk AARP SNAP ID ++ unsigned char ddp_snap_id[5] = {0x08, 0x00, 0x07, 0x80, 0x9B}; // Apple Talk DDP SNAP ID ++ ++ framePtr += 3; // eliminate the 802.2 header ++ ++ if(!memcmp(ipx_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet SNAP)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else if(!memcmp(aarp_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ ea = (struct elapaarp *)framePtr; ++ } ++ else if(!memcmp(ddp_snap_id, framePtr, 5)) ++ { ++ framePtr += 5; // eliminate the SNAP header ++ ++ ddp = (struct ddpehdr *)framePtr; ++ } ++ else ++ { ++ DEBUG_WARN("NAT25: Protocol=Ethernet SNAP %02x%02x%02x%02x%02x\n", framePtr[0], ++ framePtr[1], framePtr[2], framePtr[3], framePtr[4]); ++ return -1; ++ } ++ } ++ else if(*framePtr == ipx_8022_type) ++ { ++ framePtr += 3; // eliminate the 802.2 header ++ ++ if(!memcmp(ipx_header, framePtr, 2)) ++ { ++ DEBUG_INFO("NAT25: Protocol=IPX (Ethernet 802.2)\n"); ++ ipx = (struct ipxhdr *)framePtr; ++ } ++ else ++ return -1; ++ } ++ else ++ return -1; ++ } ++ } ++ else ++ return -1; ++ ++ /* IPX */ ++ if(ipx != NULL) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Check IPX skb_copy\n"); ++ return 0; ++ } ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert IPX, Dest=%08x,%02x%02x%02x%02x%02x%02x,%04x Source=%08x,%02x%02x%02x%02x%02x%02x,%04x\n", ++ ipx->ipx_dest.net, ++ ipx->ipx_dest.node[0], ++ ipx->ipx_dest.node[1], ++ ipx->ipx_dest.node[2], ++ ipx->ipx_dest.node[3], ++ ipx->ipx_dest.node[4], ++ ipx->ipx_dest.node[5], ++ ipx->ipx_dest.sock, ++ ipx->ipx_source.net, ++ ipx->ipx_source.node[0], ++ ipx->ipx_source.node[1], ++ ipx->ipx_source.node[2], ++ ipx->ipx_source.node[3], ++ ipx->ipx_source.node[4], ++ ipx->ipx_source.node[5], ++ ipx->ipx_source.sock); ++ ++ if(!memcmp(skb->data+ETH_ALEN, ipx->ipx_source.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Use IPX Net, and Socket as network addr\n"); ++ ++ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_source.net, &ipx->ipx_source.sock); ++ ++ // change IPX source node addr to wlan STA address ++ memcpy(ipx->ipx_source.node, GET_MY_HWADDR(priv), ETH_ALEN); ++ } ++ else ++ { ++ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_source.net, ipx->ipx_source.node); ++ } ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ if(!memcmp(GET_MY_HWADDR(priv), ipx->ipx_dest.node, ETH_ALEN)) ++ { ++ DEBUG_INFO("NAT25: Lookup IPX, Modify Destination IPX Node addr\n"); ++ ++ __nat25_generate_ipx_network_addr_with_socket(networkAddr, &ipx->ipx_dest.net, &ipx->ipx_dest.sock); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // replace IPX destination node addr with Lookup destination MAC addr ++ memcpy(ipx->ipx_dest.node, skb->data, ETH_ALEN); ++ } ++ else ++ { ++ __nat25_generate_ipx_network_addr_with_node(networkAddr, &ipx->ipx_dest.net, ipx->ipx_dest.node); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ } ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /* AARP */ ++ else if(ea != NULL) ++ { ++ /* Sanity check fields. */ ++ if(ea->hw_len != ETH_ALEN || ea->pa_len != AARP_PA_ALEN) ++ { ++ DEBUG_WARN("NAT25: Appletalk AARP Sanity check fail!\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return 0; ++ ++ case NAT25_INSERT: ++ { ++ // change to AARP source mac address to wlan STA address ++ memcpy(ea->hw_src, GET_MY_HWADDR(priv), ETH_ALEN); ++ ++ DEBUG_INFO("NAT25: Insert AARP, Source=%d,%d Destination=%d,%d\n", ++ ea->pa_src_net, ++ ea->pa_src_node, ++ ea->pa_dst_net, ++ ea->pa_dst_node); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_src_net, &ea->pa_src_node); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup AARP, Source=%d,%d Destination=%d,%d\n", ++ ea->pa_src_net, ++ ea->pa_src_node, ++ ea->pa_dst_net, ++ ea->pa_dst_node); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ea->pa_dst_net, &ea->pa_dst_node); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ // change to AARP destination mac address to Lookup result ++ memcpy(ea->hw_dst, skb->data, ETH_ALEN); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /* DDP */ ++ else if(ddp != NULL) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert DDP, Source=%d,%d Destination=%d,%d\n", ++ ddp->deh_snet, ++ ddp->deh_snode, ++ ddp->deh_dnet, ++ ddp->deh_dnode); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_snet, &ddp->deh_snode); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ { ++ DEBUG_INFO("NAT25: Lookup DDP, Source=%d,%d Destination=%d,%d\n", ++ ddp->deh_snet, ++ ddp->deh_snode, ++ ddp->deh_dnet, ++ ddp->deh_dnode); ++ ++ __nat25_generate_apple_network_addr(networkAddr, &ddp->deh_dnet, &ddp->deh_dnode); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ return -1; ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle PPPoE frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(ETH_P_PPP_DISC)) || ++ (protocol == __constant_htons(ETH_P_PPP_SES))) ++ { ++ struct pppoe_hdr *ph = (struct pppoe_hdr *)(skb->data + ETH_HLEN); ++ unsigned short *pMagic; ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if (ph->sid == 0) ++ return 0; ++ return 1; ++ ++ case NAT25_INSERT: ++ if(ph->sid == 0) // Discovery phase according to tag ++ { ++ if(ph->code == PADI_CODE || ph->code == PADR_CODE) ++ { ++ if (priv->ethBrExtInfo.addPPPoETag) { ++ struct pppoe_tag *tag, *pOldTag; ++ unsigned char tag_buf[40]; ++ int old_tag_len=0; ++ ++ tag = (struct pppoe_tag *)tag_buf; ++ pOldTag = (struct pppoe_tag *)__nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID)); ++ if (pOldTag) { // if SID existed, copy old value and delete it ++ old_tag_len = ntohs(pOldTag->tag_len); ++ if (old_tag_len+TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN > sizeof(tag_buf)) { ++ DEBUG_ERR("SID tag length too long!\n"); ++ return -1; ++ } ++ ++ memcpy(tag->tag_data+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN, ++ pOldTag->tag_data, old_tag_len); ++ ++ if (skb_pull_and_merge(skb, (unsigned char *)pOldTag, TAG_HDR_LEN+old_tag_len) < 0) { ++ DEBUG_ERR("call skb_pull_and_merge() failed in PADI/R packet!\n"); ++ return -1; ++ } ++ ph->length = htons(ntohs(ph->length)-TAG_HDR_LEN-old_tag_len); ++ } ++ ++ tag->tag_type = PTT_RELAY_SID; ++ tag->tag_len = htons(MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN+old_tag_len); ++ ++ // insert the magic_code+client mac in relay tag ++ pMagic = (unsigned short *)tag->tag_data; ++ *pMagic = htons(MAGIC_CODE); ++ memcpy(tag->tag_data+MAGIC_CODE_LEN, skb->data+ETH_ALEN, ETH_ALEN); ++ ++ //Add relay tag ++ if(__nat25_add_pppoe_tag(skb, tag) < 0) ++ return -1; ++ ++ DEBUG_INFO("NAT25: Insert PPPoE, forward %s packet\n", ++ (ph->code == PADI_CODE ? "PADI" : "PADR")); ++ } ++ else { // not add relay tag ++ if (priv->pppoe_connection_in_progress && ++ memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) { ++ DEBUG_ERR("Discard PPPoE packet due to another PPPoE connection is in progress!\n"); ++ return -2; ++ } ++ ++ if (priv->pppoe_connection_in_progress == 0) ++ memcpy(priv->pppoe_addr, skb->data+ETH_ALEN, ETH_ALEN); ++ ++ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; ++ } ++ } ++ else ++ return -1; ++ } ++ else // session phase ++ { ++ DEBUG_INFO("NAT25: Insert PPPoE, insert session packet to %s\n", skb->dev->name); ++ ++ __nat25_generate_pppoe_network_addr(networkAddr, skb->data, &(ph->sid)); ++ ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ ++ __nat25_db_print(priv); ++ ++ if (!priv->ethBrExtInfo.addPPPoETag && ++ priv->pppoe_connection_in_progress && ++ !memcmp(skb->data+ETH_ALEN, priv->pppoe_addr, ETH_ALEN)) ++ priv->pppoe_connection_in_progress = 0; ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ if(ph->code == PADO_CODE || ph->code == PADS_CODE) ++ { ++ if (priv->ethBrExtInfo.addPPPoETag) { ++ struct pppoe_tag *tag; ++ unsigned char *ptr; ++ unsigned short tagType, tagLen; ++ int offset=0; ++ ++ if((ptr = __nat25_find_pppoe_tag(ph, ntohs(PTT_RELAY_SID))) == 0) { ++ DEBUG_ERR("Fail to find PTT_RELAY_SID in FADO!\n"); ++ return -1; ++ } ++ ++ tag = (struct pppoe_tag *)ptr; ++ tagType = (unsigned short)((ptr[0] << 8) + ptr[1]); ++ tagLen = (unsigned short)((ptr[2] << 8) + ptr[3]); ++ ++ if((tagType != ntohs(PTT_RELAY_SID)) || (tagLen < (MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN))) { ++ DEBUG_ERR("Invalid PTT_RELAY_SID tag length [%d]!\n", tagLen); ++ return -1; ++ } ++ ++ pMagic = (unsigned short *)tag->tag_data; ++ if (ntohs(*pMagic) != MAGIC_CODE) { ++ DEBUG_ERR("Can't find MAGIC_CODE in %s packet!\n", ++ (ph->code == PADO_CODE ? "PADO" : "PADS")); ++ return -1; ++ } ++ ++ memcpy(skb->data, tag->tag_data+MAGIC_CODE_LEN, ETH_ALEN); ++ ++ if (tagLen > MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN) ++ offset = TAG_HDR_LEN; ++ ++ if (skb_pull_and_merge(skb, ptr+offset, TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset) < 0) { ++ DEBUG_ERR("call skb_pull_and_merge() failed in PADO packet!\n"); ++ return -1; ++ } ++ ph->length = htons(ntohs(ph->length)-(TAG_HDR_LEN+MAGIC_CODE_LEN+RTL_RELAY_TAG_LEN-offset)); ++ if (offset > 0) ++ tag->tag_len = htons(tagLen-MAGIC_CODE_LEN-RTL_RELAY_TAG_LEN); ++ ++ DEBUG_INFO("NAT25: Lookup PPPoE, forward %s Packet from %s\n", ++ (ph->code == PADO_CODE ? "PADO" : "PADS"), skb->dev->name); ++ } ++ else { // not add relay tag ++ if (!priv->pppoe_connection_in_progress) { ++ DEBUG_ERR("Discard PPPoE packet due to no connection in progresss!\n"); ++ return -1; ++ } ++ memcpy(skb->data, priv->pppoe_addr, ETH_ALEN); ++ priv->pppoe_connection_in_progress = WAIT_TIME_PPPOE; ++ } ++ } ++ else { ++ if(ph->sid != 0) ++ { ++ DEBUG_INFO("NAT25: Lookup PPPoE, lookup session packet from %s\n", skb->dev->name); ++ __nat25_generate_pppoe_network_addr(networkAddr, skb->data+ETH_ALEN, &(ph->sid)); ++ ++ __nat25_db_network_lookup_and_replace(priv, skb, networkAddr); ++ ++ __nat25_db_print(priv); ++ } ++ else ++ return -1; ++ ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle EAP frame */ ++ /*---------------------------------------------------*/ ++ else if(protocol == __constant_htons(0x888e)) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ return 0; ++ ++ case NAT25_LOOKUP: ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle C-Media proprietary frame */ ++ /*---------------------------------------------------*/ ++ else if((protocol == __constant_htons(0xe2ae)) || ++ (protocol == __constant_htons(0xe2af))) ++ { ++ switch(method) ++ { ++ case NAT25_CHECK: ++ return -1; ++ ++ case NAT25_INSERT: ++ return 0; ++ ++ case NAT25_LOOKUP: ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++ ++ /*---------------------------------------------------*/ ++ /* Handle IPV6 frame */ ++ /*---------------------------------------------------*/ ++#ifdef CL_IPV6_PASS ++ else if(protocol == __constant_htons(ETH_P_IPV6)) ++ { ++ struct ipv6hdr *iph = (struct ipv6hdr *)(skb->data + ETH_HLEN); ++ ++ if (sizeof(*iph) >= (skb->len - ETH_HLEN)) ++ { ++ DEBUG_WARN("NAT25: malformed IPv6 packet !\n"); ++ return -1; ++ } ++ ++ switch(method) ++ { ++ case NAT25_CHECK: ++ if (skb->data[0] & 1) ++ return 0; ++ return -1; ++ ++ case NAT25_INSERT: ++ { ++ DEBUG_INFO("NAT25: Insert IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," ++ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", ++ iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], ++ iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], ++ iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], ++ iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); ++ ++ if (memcmp(&iph->saddr, "\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0\x0", 16)) { ++ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->saddr); ++ __nat25_db_network_insert(priv, skb->data+ETH_ALEN, networkAddr); ++ __nat25_db_print(priv); ++ ++ if (iph->nexthdr == IPPROTO_ICMPV6 && ++ skb->len > (ETH_HLEN + sizeof(*iph) + 4)) { ++ if (update_nd_link_layer_addr(skb->data + ETH_HLEN + sizeof(*iph), ++ skb->len - ETH_HLEN - sizeof(*iph), GET_MY_HWADDR(priv))) { ++ struct icmp6hdr *hdr = (struct icmp6hdr *)(skb->data + ETH_HLEN + sizeof(*iph)); ++ hdr->icmp6_cksum = 0; ++ hdr->icmp6_cksum = csum_ipv6_magic(&iph->saddr, &iph->daddr, ++ iph->payload_len, ++ IPPROTO_ICMPV6, ++ csum_partial((__u8 *)hdr, iph->payload_len, 0)); ++ } ++ } ++ } ++ } ++ return 0; ++ ++ case NAT25_LOOKUP: ++ DEBUG_INFO("NAT25: Lookup IP, SA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x," ++ " DA=%4x:%4x:%4x:%4x:%4x:%4x:%4x:%4x\n", ++ iph->saddr.s6_addr16[0],iph->saddr.s6_addr16[1],iph->saddr.s6_addr16[2],iph->saddr.s6_addr16[3], ++ iph->saddr.s6_addr16[4],iph->saddr.s6_addr16[5],iph->saddr.s6_addr16[6],iph->saddr.s6_addr16[7], ++ iph->daddr.s6_addr16[0],iph->daddr.s6_addr16[1],iph->daddr.s6_addr16[2],iph->daddr.s6_addr16[3], ++ iph->daddr.s6_addr16[4],iph->daddr.s6_addr16[5],iph->daddr.s6_addr16[6],iph->daddr.s6_addr16[7]); ++ ++ ++ __nat25_generate_ipv6_network_addr(networkAddr, (unsigned int *)&iph->daddr); ++ if (!__nat25_db_network_lookup_and_replace(priv, skb, networkAddr)) { ++#ifdef SUPPORT_RX_UNI2MCAST ++ if (iph->daddr.s6_addr[0] == 0xff) ++ convert_ipv6_mac_to_mc(skb); ++#endif ++ } ++ return 0; ++ ++ default: ++ return -1; ++ } ++ } ++#endif // CL_IPV6_PASS ++ ++ return -1; ++} ++ ++ ++int nat25_handle_frame(_adapter *priv, struct sk_buff *skb) ++{ ++#ifdef BR_EXT_DEBUG ++ if((!priv->ethBrExtInfo.nat25_disable) && (!(skb->data[0] & 1))) ++ { ++ panic_printk("NAT25: Input Frame: DA=%02x%02x%02x%02x%02x%02x SA=%02x%02x%02x%02x%02x%02x\n", ++ skb->data[0], ++ skb->data[1], ++ skb->data[2], ++ skb->data[3], ++ skb->data[4], ++ skb->data[5], ++ skb->data[6], ++ skb->data[7], ++ skb->data[8], ++ skb->data[9], ++ skb->data[10], ++ skb->data[11]); ++ } ++#endif ++ ++ if(!(skb->data[0] & 1)) ++ { ++ int is_vlan_tag=0, i, retval=0; ++ unsigned short vlan_hdr=0; ++ ++ if (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ vlan_hdr = *((unsigned short *)(skb->data+ETH_ALEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+ETH_ALEN*2+2-i*2)) = *((unsigned short *)(skb->data+ETH_ALEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ ++ if (!priv->ethBrExtInfo.nat25_disable) ++ { ++ _irqL irqL; ++ _enter_critical_bh(&priv->br_ext_lock, &irqL); ++ /* ++ * This function look up the destination network address from ++ * the NAT2.5 database. Return value = -1 means that the ++ * corresponding network protocol is NOT support. ++ */ ++ if (!priv->ethBrExtInfo.nat25sc_disable && ++ (*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && ++ !memcmp(priv->scdb_ip, skb->data+ETH_HLEN+16, 4)) { ++ memcpy(skb->data, priv->scdb_mac, ETH_ALEN); ++ ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ } ++ else { ++ _exit_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); ++ } ++ } ++ else { ++ if (((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && ++ !memcmp(priv->br_ip, skb->data+ETH_HLEN+16, 4)) || ++ ((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_ARP)) && ++ !memcmp(priv->br_ip, skb->data+ETH_HLEN+24, 4))) { ++ // for traffic to upper TCP/IP ++ retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); ++ } ++ } ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+ETH_ALEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+ETH_ALEN*2+2)) = vlan_hdr; ++ } ++ ++ if(retval == -1) { ++ //DEBUG_ERR("NAT25: Lookup fail!\n"); ++ return -1; ++ } ++ } ++ ++ return 0; ++} ++ ++#if 0 ++void mac_clone(_adapter *priv, unsigned char *addr) ++{ ++ struct sockaddr sa; ++ ++ memcpy(sa.sa_data, addr, ETH_ALEN); ++ DEBUG_INFO("MAC Clone: Addr=%02x%02x%02x%02x%02x%02x\n", ++ addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); ++ rtl8192cd_set_hwaddr(priv->dev, &sa); ++} ++ ++ ++int mac_clone_handle_frame(_adapter *priv, struct sk_buff *skb) ++{ ++ if(priv->ethBrExtInfo.macclone_enable && !priv->macclone_completed) ++ { ++ if(!(skb->data[ETH_ALEN] & 1)) //// check any other particular MAC add ++ { ++ if(memcmp(skb->data+ETH_ALEN, GET_MY_HWADDR(priv), ETH_ALEN) && ++ ((priv->dev->br_port) && ++ memcmp(skb->data+ETH_ALEN, priv->br_mac, ETH_ALEN))) ++ { ++ mac_clone(priv, skb->data+ETH_ALEN); ++ priv->macclone_completed = 1; ++ } ++ } ++ } ++ ++ return 0; ++} ++#endif // 0 ++ ++#define SERVER_PORT 67 ++#define CLIENT_PORT 68 ++#define DHCP_MAGIC 0x63825363 ++#define BROADCAST_FLAG 0x8000 ++ ++struct dhcpMessage { ++ u_int8_t op; ++ u_int8_t htype; ++ u_int8_t hlen; ++ u_int8_t hops; ++ u_int32_t xid; ++ u_int16_t secs; ++ u_int16_t flags; ++ u_int32_t ciaddr; ++ u_int32_t yiaddr; ++ u_int32_t siaddr; ++ u_int32_t giaddr; ++ u_int8_t chaddr[16]; ++ u_int8_t sname[64]; ++ u_int8_t file[128]; ++ u_int32_t cookie; ++ u_int8_t options[308]; /* 312 - cookie */ ++}; ++ ++void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb) ++{ ++ if(skb == NULL) ++ return; ++ ++ if(!priv->ethBrExtInfo.dhcp_bcst_disable) ++ { ++ unsigned short protocol = *((unsigned short *)(skb->data + 2 * ETH_ALEN)); ++ ++ if(protocol == __constant_htons(ETH_P_IP)) // IP ++ { ++ struct iphdr* iph = (struct iphdr *)(skb->data + ETH_HLEN); ++ ++ if(iph->protocol == IPPROTO_UDP) // UDP ++ { ++ struct udphdr *udph = (struct udphdr *)((unsigned int)iph + (iph->ihl << 2)); ++ ++ if((udph->source == __constant_htons(CLIENT_PORT)) ++ && (udph->dest == __constant_htons(SERVER_PORT))) // DHCP request ++ { ++ struct dhcpMessage *dhcph = ++ (struct dhcpMessage *)((unsigned int)udph + sizeof(struct udphdr)); ++ ++ if(dhcph->cookie == __constant_htonl(DHCP_MAGIC)) // match magic word ++ { ++ if(!(dhcph->flags & htons(BROADCAST_FLAG))) // if not broadcast ++ { ++ register int sum = 0; ++ ++ DEBUG_INFO("DHCP: change flag of DHCP request to broadcast.\n"); ++ // or BROADCAST flag ++ dhcph->flags |= htons(BROADCAST_FLAG); ++ // recalculate checksum ++ sum = ~(udph->check) & 0xffff; ++ sum += dhcph->flags; ++ while(sum >> 16) ++ sum = (sum & 0xffff) + (sum >> 16); ++ udph->check = ~sum; ++ } ++ } ++ } ++ } ++ } ++ } ++} ++ ++ ++void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, ++ unsigned char *ipAddr) ++{ ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++ struct nat25_network_db_entry *db; ++ int hash; ++ //_irqL irqL; ++ //_enter_critical_bh(&priv->br_ext_lock, &irqL); ++ ++ __nat25_generate_ipv4_network_addr(networkAddr, (unsigned int *)ipAddr); ++ hash = __nat25_network_hash(networkAddr); ++ db = priv->nethash[hash]; ++ while (db != NULL) ++ { ++ if(!memcmp(db->networkAddr, networkAddr, MAX_NETWORK_ADDR_LEN)) { ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return (void *)db; ++ } ++ ++ db = db->next_hash; ++ } ++ ++ //_exit_critical_bh(&priv->br_ext_lock, &irqL); ++ return NULL; ++} ++ ++#endif // CONFIG_BR_EXT +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,2574 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_CMD_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_BR_EXT ++#include ++#endif //CONFIG_BR_EXT ++/* ++Caller and the rtw_cmd_thread can protect cmd_q by spin_lock. ++No irqsave is necessary. ++*/ ++ ++sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_init_sema(&(pcmdpriv->cmd_queue_sema), 0); ++ //_rtw_init_sema(&(pcmdpriv->cmd_done_sema), 0); ++ _rtw_init_sema(&(pcmdpriv->terminate_cmdthread_sema), 0); ++ ++ ++ _rtw_init_queue(&(pcmdpriv->cmd_queue)); ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ++ pcmdpriv->cmd_seq = 1; ++ ++ pcmdpriv->cmd_allocated_buf = rtw_zmalloc(MAX_CMDSZ + CMDBUFF_ALIGN_SZ); ++ ++ if (pcmdpriv->cmd_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ //pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1)); ++ pcmdpriv->cmd_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->cmd_allocated_buf ), CMDBUFF_ALIGN_SZ); ++ ++ pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4); ++ ++ if (pcmdpriv->rsp_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ //pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); ++ pcmdpriv->rsp_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->rsp_allocated_buf ), 4); ++ ++ pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++ ++sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) ++{ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++#ifdef CONFIG_H2CLBK ++ _rtw_init_sema(&(pevtpriv->lbkevt_done), 0); ++ pevtpriv->lbkevt_limit = 0; ++ pevtpriv->lbkevt_num = 0; ++ pevtpriv->cmdevt_parm = NULL; ++#endif ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ATOMIC_SET(&pevtpriv->event_seq, 0); ++ pevtpriv->evt_done_cnt = 0; ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ ++ _rtw_init_sema(&(pevtpriv->evt_notify), 0); ++ _rtw_init_sema(&(pevtpriv->terminate_evtthread_sema), 0); ++ ++ pevtpriv->evt_allocated_buf = rtw_zmalloc(MAX_EVTSZ + 4); ++ if (pevtpriv->evt_allocated_buf == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ //pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); ++ pevtpriv->evt_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->evt_allocated_buf ), 4); ++ ++ ++#ifdef CONFIG_SDIO_HCI ++ pevtpriv->allocated_c2h_mem = rtw_zmalloc(C2H_MEM_SZ +4); ++ ++ if (pevtpriv->allocated_c2h_mem == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ //pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4 ++ //- ( (u32)(pevtpriv->allocated_c2h_mem) & 3); ++ pevtpriv->c2h_mem = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->allocated_c2h_mem ), 4); ++ ++#ifdef PLATFORM_OS_XP ++ pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); ++ ++ if(pevtpriv->pc2h_mdl == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ MmBuildMdlForNonPagedPool(pevtpriv->pc2h_mdl); ++#endif ++#endif //end of CONFIG_SDIO_HCI ++ ++ _rtw_init_queue(&(pevtpriv->evt_queue)); ++ ++exit: ++ ++#endif //end of CONFIG_EVENT_THREAD_MODE ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void _rtw_free_evt_priv (struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("+_rtw_free_evt_priv \n")); ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _rtw_free_sema(&(pevtpriv->evt_notify)); ++ _rtw_free_sema(&(pevtpriv->terminate_evtthread_sema)); ++ ++ ++ if (pevtpriv->evt_allocated_buf) ++ rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4); ++#endif ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("-_rtw_free_evt_priv \n")); ++ ++_func_exit_; ++ ++} ++ ++void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ ++ if(pcmdpriv){ ++ _rtw_spinlock_free(&(pcmdpriv->cmd_queue.lock)); ++ _rtw_free_sema(&(pcmdpriv->cmd_queue_sema)); ++ //_rtw_free_sema(&(pcmdpriv->cmd_done_sema)); ++ _rtw_free_sema(&(pcmdpriv->terminate_cmdthread_sema)); ++ ++ if (pcmdpriv->cmd_allocated_buf) ++ rtw_mfree(pcmdpriv->cmd_allocated_buf, MAX_CMDSZ + CMDBUFF_ALIGN_SZ); ++ ++ if (pcmdpriv->rsp_allocated_buf) ++ rtw_mfree(pcmdpriv->rsp_allocated_buf, MAX_RSPSZ + 4); ++ } ++_func_exit_; ++} ++ ++/* ++Calling Context: ++ ++rtw_enqueue_cmd can only be called between kernel thread, ++since only spin_lock is used. ++ ++ISR/Call-Back functions can't call this sub-function. ++ ++*/ ++ ++sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj) ++{ ++ _irqL irqL; ++ ++_func_enter_; ++ ++ if (obj == NULL) ++ goto exit; ++ ++ //_enter_critical_bh(&queue->lock, &irqL); ++ _enter_critical(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&obj->list, &queue->queue); ++ ++ //_exit_critical_bh(&queue->lock, &irqL); ++ _exit_critical(&queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct cmd_obj *_rtw_dequeue_cmd(_queue *queue) ++{ ++ _irqL irqL; ++ struct cmd_obj *obj; ++ ++_func_enter_; ++ ++ //_enter_critical_bh(&(queue->lock), &irqL); ++ _enter_critical(&(queue->lock), &irqL); ++ ++ if (rtw_is_list_empty(&(queue->queue))) ++ obj = NULL; ++ else ++ { ++ obj = LIST_CONTAINOR(get_next(&(queue->queue)), struct cmd_obj, list); ++ rtw_list_delete(&obj->list); ++ } ++ ++ //_exit_critical_bh(&(queue->lock), &irqL); ++ _exit_critical(&(queue->lock), &irqL); ++ ++_func_exit_; ++ ++ return obj; ++} ++ ++u32 rtw_init_cmd_priv(struct cmd_priv *pcmdpriv) ++{ ++ u32 res; ++_func_enter_; ++ res = _rtw_init_cmd_priv (pcmdpriv); ++_func_exit_; ++ return res; ++} ++ ++u32 rtw_init_evt_priv (struct evt_priv *pevtpriv) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_init_evt_priv(pevtpriv); ++_func_exit_; ++ return res; ++} ++ ++void rtw_free_evt_priv (struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_evt_priv\n")); ++ _rtw_free_evt_priv(pevtpriv); ++_func_exit_; ++} ++ ++void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("rtw_free_cmd_priv\n")); ++ _rtw_free_cmd_priv(pcmdpriv); ++_func_exit_; ++} ++ ++int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) ++{ ++ u8 bAllow = _FALSE; //set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE ++ ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ //To decide allow or not ++ if( (pcmdpriv->padapter->pwrctrlpriv.bHWPwrPindetect) ++ &&(!pcmdpriv->padapter->registrypriv.usbss_enable) ++ ) ++ { ++ if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ) ++ { ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; ++ if(pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID) ++ { ++ //DBG_8192C("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); ++ bAllow = _TRUE; ++ } ++ } ++ } ++#endif ++ ++ if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan)) ++ bAllow = _TRUE; ++ ++ if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) ++ || pcmdpriv->cmdthd_running== _FALSE //com_thread not running ++ ) ++ { ++ //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, ++ // cmd_obj->cmdcode, ++ // pcmdpriv->padapter->hw_init_completed, ++ // pcmdpriv->cmdthd_running ++ //); ++ ++ return _FAIL; ++ } ++ return _SUCCESS; ++} ++ ++ ++ ++u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) ++{ ++ int res = _FAIL; ++ ++_func_enter_; ++ ++ if (cmd_obj == NULL) { ++ goto exit; ++ } ++ ++ if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) { ++ rtw_free_cmd_obj(cmd_obj); ++ goto exit; ++ } ++ ++ res = _rtw_enqueue_cmd(&pcmdpriv->cmd_queue, cmd_obj); ++ ++ if(res == _SUCCESS) ++ _rtw_up_sema(&pcmdpriv->cmd_queue_sema); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv) ++{ ++ struct cmd_obj *cmd_obj; ++ ++_func_enter_; ++ ++ cmd_obj = _rtw_dequeue_cmd(&pcmdpriv->cmd_queue); ++ ++_func_exit_; ++ return cmd_obj; ++} ++ ++void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv) ++{ ++_func_enter_; ++ pcmdpriv->cmd_done_cnt++; ++ //_rtw_up_sema(&(pcmdpriv->cmd_done_sema)); ++_func_exit_; ++} ++ ++void rtw_free_cmd_obj(struct cmd_obj *pcmd) ++{ ++_func_enter_; ++ ++ if((pcmd->cmdcode!=_JoinBss_CMD_) &&(pcmd->cmdcode!= _CreateBss_CMD_)) ++ { ++ //free parmbuf in cmd_obj ++ rtw_mfree((unsigned char*)pcmd->parmbuf, pcmd->cmdsz); ++ } ++ ++ if(pcmd->rsp!=NULL) ++ { ++ if(pcmd->rspsz!= 0) ++ { ++ //free rsp in cmd_obj ++ rtw_mfree((unsigned char*)pcmd->rsp, pcmd->rspsz); ++ } ++ } ++ ++ //free cmd_obj ++ rtw_mfree((unsigned char*)pcmd, sizeof(struct cmd_obj)); ++ ++_func_exit_; ++} ++ ++ ++thread_return rtw_cmd_thread(thread_context context) ++{ ++ u8 ret; ++ struct cmd_obj *pcmd; ++ u8 *pcmdbuf, *prspbuf; ++ u8 (*cmd_hdl)(_adapter *padapter, u8* pbuf); ++ void (*pcmd_callback)(_adapter *dev, struct cmd_obj *pcmd); ++ _adapter *padapter = (_adapter *)context; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ ++_func_enter_; ++ ++ thread_enter(padapter); ++ ++ pcmdbuf = pcmdpriv->cmd_buf; ++ prspbuf = pcmdpriv->rsp_buf; ++ ++ pcmdpriv->cmdthd_running=_TRUE; ++ _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("start r871x rtw_cmd_thread !!!!\n")); ++ ++ while(1) ++ { ++ if ((_rtw_down_sema(&(pcmdpriv->cmd_queue_sema))) == _FAIL) ++ break; ++ ++ if (rtw_register_cmd_alive(padapter) != _SUCCESS) ++ { ++ continue; ++ } ++ ++_next: ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ { ++ DBG_8192C("###> rtw_cmd_thread break.................\n"); ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("rtw_cmd_thread:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ break; ++ } ++ ++ if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) { ++ rtw_unregister_cmd_alive(padapter); ++ continue; ++ } ++ ++ if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) ++ { ++ pcmd->res = H2C_DROPPED; ++ goto post_process; ++ } ++ ++ pcmdpriv->cmd_issued_cnt++; ++ ++ pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4 ++ ++ _rtw_memcpy(pcmdbuf, pcmd->parmbuf, pcmd->cmdsz); ++ ++ if(pcmd->cmdcode <= (sizeof(wlancmds) /sizeof(struct cmd_hdl))) ++ { ++ cmd_hdl = wlancmds[pcmd->cmdcode].h2cfuns; ++ ++ if (cmd_hdl) ++ { ++ ret = cmd_hdl(padapter, pcmdbuf); ++ pcmd->res = ret; ++ } ++ ++ pcmdpriv->cmd_seq++; ++ } ++ else ++ { ++ pcmd->res = H2C_PARAMETERS_ERROR; ++ } ++ ++ cmd_hdl = NULL; ++ ++post_process: ++ ++ //call callback function for post-processed ++ if(pcmd->cmdcode <= (sizeof(rtw_cmd_callback) /sizeof(struct _cmd_callback))) ++ { ++ pcmd_callback = rtw_cmd_callback[pcmd->cmdcode].callback; ++ if(pcmd_callback == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("mlme_cmd_hdl(): pcmd_callback=0x%p, cmdcode=0x%x\n", pcmd_callback, pcmd->cmdcode)); ++ rtw_free_cmd_obj(pcmd); ++ } ++ else ++ { ++ //todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL) ++ pcmd_callback(padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback ++ } ++ } ++ ++ ++ flush_signals_thread(); ++ ++ goto _next; ++ ++ } ++ ++ pcmdpriv->cmdthd_running=_FALSE; ++ ++ DBG_871X("%s: leaving... check & free all cmd_obj resources\n", __FUNCTION__); ++ ++ // free all cmd_obj resources ++ do{ ++ pcmd = rtw_dequeue_cmd(pcmdpriv); ++ if(pcmd==NULL) ++ break; ++ ++ DBG_871X("%s: leaving... drop cmdcode:%u\n", __FUNCTION__, pcmd->cmdcode); ++ ++ rtw_free_cmd_obj(pcmd); ++ }while(1); ++ ++ DBG_871X("%s: leaving... call up terminate_cmdthread_sema\n", __FUNCTION__); ++ ++ _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); ++ ++_func_exit_; ++ ++ thread_exit(); ++ ++} ++ ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj) ++{ ++ _irqL irqL; ++ int res; ++ _queue *queue = &pevtpriv->evt_queue; ++ ++_func_enter_; ++ ++ res = _SUCCESS; ++ ++ if (obj == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&obj->list, &queue->queue); ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ //rtw_evt_notify_isr(pevtpriv); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++struct evt_obj *rtw_dequeue_evt(_queue *queue) ++{ ++ _irqL irqL; ++ struct evt_obj *pevtobj; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (rtw_is_list_empty(&(queue->queue))) ++ pevtobj = NULL; ++ else ++ { ++ pevtobj = LIST_CONTAINOR(get_next(&(queue->queue)), struct evt_obj, list); ++ rtw_list_delete(&pevtobj->list); ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pevtobj; ++} ++ ++void rtw_free_evt_obj(struct evt_obj *pevtobj) ++{ ++_func_enter_; ++ ++ if(pevtobj->parmbuf) ++ rtw_mfree((unsigned char*)pevtobj->parmbuf, pevtobj->evtsz); ++ ++ rtw_mfree((unsigned char*)pevtobj, sizeof(struct evt_obj)); ++ ++_func_exit_; ++} ++ ++void rtw_evt_notify_isr(struct evt_priv *pevtpriv) ++{ ++_func_enter_; ++ pevtpriv->evt_done_cnt++; ++ _rtw_up_sema(&(pevtpriv->evt_notify)); ++_func_exit_; ++} ++#endif ++ ++ ++/* ++u8 rtw_setstandby_cmd(unsigned char *adapter) ++*/ ++u8 rtw_setstandby_cmd(_adapter *padapter, uint action) ++{ ++ struct cmd_obj* ph2c; ++ struct usb_suspend_parm* psetusbsuspend; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ ++ u8 ret = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ psetusbsuspend = (struct usb_suspend_parm*)rtw_zmalloc(sizeof(struct usb_suspend_parm)); ++ if (psetusbsuspend == NULL) { ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ psetusbsuspend->action = action; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetusbsuspend, GEN_CMD_CODE(_SetUsbSuspend)); ++ ++ ret = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++/* ++rtw_sitesurvey_cmd(~) ++ ### NOTE:#### (!!!!) ++ MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock ++*/ ++u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *pssid, int ssid_max_num) ++{ ++ u8 res = _FAIL; ++ struct cmd_obj *ph2c; ++ struct sitesurvey_parm *psurveyPara; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++#ifdef CONFIG_LPS ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE){ ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); ++ } ++#endif ++ ++#ifdef CONFIG_P2P ++ p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); ++#endif //CONFIG_P2P ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) ++ return _FAIL; ++ ++ psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm)); ++ if (psurveyPara == NULL) { ++ rtw_mfree((unsigned char*) ph2c, sizeof(struct cmd_obj)); ++ return _FAIL; ++ } ++ ++ rtw_free_network_queue(padapter, _FALSE); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("\nflush network queue\n\n")); ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); ++ ++ psurveyPara->bsslimit = 48; ++ psurveyPara->scan_mode = pmlmepriv->scan_mode; ++ ++ _rtw_memset(psurveyPara->ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ ++ if(pssid){ ++ int i; ++ for(i=0; issid[i], &pssid[i], sizeof(NDIS_802_11_SSID)); ++ //DBG_871X("%s scan for specific ssid: %s, %d\n", __FUNCTION__ ++ // , psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); ++ } ++ } ++ } ++ ++ set_fwstate(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ if(res == _SUCCESS) { ++ ++ pmlmepriv->scan_start_time = rtw_get_current_time(); ++ ++ _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); ++ ++ rtw_led_control(padapter, LED_CTL_SITE_SURVEY); ++ ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ } else { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ } ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset) ++{ ++ struct cmd_obj* ph2c; ++ struct setdatarate_parm* pbsetdataratepara; ++ struct cmd_priv* pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pbsetdataratepara = (struct setdatarate_parm*)rtw_zmalloc(sizeof(struct setdatarate_parm)); ++ if (pbsetdataratepara == NULL) { ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pbsetdataratepara, GEN_CMD_CODE(_SetDataRate)); ++#ifdef MP_FIRMWARE_OFFLOAD ++ pbsetdataratepara->curr_rateidx = *(u32*)rateset; ++// _rtw_memcpy(pbsetdataratepara, rateset, sizeof(u32)); ++#else ++ pbsetdataratepara->mac_id = 5; ++ _rtw_memcpy(pbsetdataratepara->datarates, rateset, NumRates); ++#endif ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset) ++{ ++ struct cmd_obj* ph2c; ++ struct setbasicrate_parm* pssetbasicratepara; ++ struct cmd_priv* pcmdpriv=&padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ pssetbasicratepara = (struct setbasicrate_parm*)rtw_zmalloc(sizeof(struct setbasicrate_parm)); ++ ++ if (pssetbasicratepara == NULL) { ++ rtw_mfree((u8*) ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pssetbasicratepara, _SetBasicRate_CMD_); ++ ++ _rtw_memcpy(pssetbasicratepara->basicrates, rateset, NumRates); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++ ++/* ++unsigned char rtw_setphy_cmd(unsigned char *adapter) ++ ++1. be called only after rtw_update_registrypriv_dev_network( ~) or mp testing program ++2. for AdHoc/Ap mode or mp mode? ++ ++*/ ++u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch) ++{ ++ struct cmd_obj* ph2c; ++ struct setphy_parm* psetphypara; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++// struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++// struct registry_priv* pregistry_priv = &padapter->registrypriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetphypara = (struct setphy_parm*)rtw_zmalloc(sizeof(struct setphy_parm)); ++ ++ if(psetphypara==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetphypara, _SetPhy_CMD_); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("CH=%d, modem=%d", ch, modem)); ++ ++ psetphypara->modem = modem; ++ psetphypara->rfchannel = ch; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_setbbreg_cmd(_adapter*padapter, u8 offset, u8 val) ++{ ++ struct cmd_obj* ph2c; ++ struct writeBB_parm* pwritebbparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pwritebbparm = (struct writeBB_parm*)rtw_zmalloc(sizeof(struct writeBB_parm)); ++ ++ if(pwritebbparm==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwritebbparm, GEN_CMD_CODE(_SetBBReg)); ++ ++ pwritebbparm->offset = offset; ++ pwritebbparm->value = val; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_getbbreg_cmd(_adapter *padapter, u8 offset, u8 *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct readBB_parm* prdbbparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ prdbbparm = (struct readBB_parm*)rtw_zmalloc(sizeof(struct readBB_parm)); ++ ++ if(prdbbparm ==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ return _FAIL; ++ } ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetBBReg); ++ ph2c->parmbuf = (unsigned char *)prdbbparm; ++ ph2c->cmdsz = sizeof(struct readBB_parm); ++ ph2c->rsp = pval; ++ ph2c->rspsz = sizeof(struct readBB_rsp); ++ ++ prdbbparm ->offset = offset; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_setrfreg_cmd(_adapter *padapter, u8 offset, u32 val) ++{ ++ struct cmd_obj* ph2c; ++ struct writeRF_parm* pwriterfparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pwriterfparm = (struct writeRF_parm*)rtw_zmalloc(sizeof(struct writeRF_parm)); ++ ++ if(pwriterfparm==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwriterfparm, GEN_CMD_CODE(_SetRFReg)); ++ ++ pwriterfparm->offset = offset; ++ pwriterfparm->value = val; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++} ++ ++u8 rtw_getrfreg_cmd(_adapter *padapter, u8 offset, u8 *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct readRF_parm* prdrfparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ prdrfparm = (struct readRF_parm*)rtw_zmalloc(sizeof(struct readRF_parm)); ++ if(prdrfparm ==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetRFReg); ++ ph2c->parmbuf = (unsigned char *)prdrfparm; ++ ph2c->cmdsz = sizeof(struct readRF_parm); ++ ph2c->rsp = pval; ++ ph2c->rspsz = sizeof(struct readRF_rsp); ++ ++ prdrfparm ->offset = offset; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_getbbrfreg_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _func_enter_; ++ ++ //rtw_free_cmd_obj(pcmd); ++ rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); ++ rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted= _TRUE; ++#endif ++_func_exit_; ++} ++ ++void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _func_enter_; ++ ++ rtw_mfree((unsigned char*) pcmd->parmbuf, pcmd->cmdsz); ++ rtw_mfree((unsigned char*) pcmd, sizeof(struct cmd_obj)); ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted= _TRUE; ++#endif ++ ++_func_exit_; ++} ++ ++u8 rtw_createbss_cmd(_adapter *padapter) ++{ ++ struct cmd_obj* pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ WLAN_BSSID_EX *pdev_network = &padapter->registrypriv.dev_network; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ rtw_led_control(padapter, LED_CTL_START_TO_LINK); ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0){ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for Any SSid:%s\n",pmlmepriv->assoc_ssid.Ssid)); ++ } else { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,(" createbss for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = _CreateBss_CMD_; ++ pcmd->parmbuf = (unsigned char *)pdev_network; ++ pcmd->cmdsz = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX*)pdev_network); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ pdev_network->Length = pcmd->cmdsz; ++ ++#ifdef CONFIG_RTL8712 ++ //notes: translate IELength & Length after assign the Length to cmdsz; ++ pdev_network->Length = cpu_to_le32(pcmd->cmdsz); ++ pdev_network->IELength = cpu_to_le32(pdev_network->IELength); ++ pdev_network->Ssid.SsidLength = cpu_to_le32(pdev_network->Ssid.SsidLength); ++#endif ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz) ++{ ++ struct cmd_obj* pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = GEN_CMD_CODE(_CreateBss); ++ pcmd->parmbuf = pbss; ++ pcmd->cmdsz = sz; ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork) ++{ ++ u8 *auth, res = _SUCCESS; ++ uint t_len = 0; ++ WLAN_BSSID_EX *psecnetwork; ++ struct cmd_obj *pcmd; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE ndis_network_mode = pnetwork->network.InfrastructureMode; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++_func_enter_; ++ ++ rtw_led_control(padapter, LED_CTL_START_TO_LINK); ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0){ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("+Join cmd: Any SSid\n")); ++ } else { ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+Join cmd: SSid=[%s]\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd: memory allocate for cmd_obj fail!!!\n")); ++ goto exit; ++ } ++ /* // for IEs is pointer ++ t_len = sizeof (ULONG) + sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + ++ sizeof (NDIS_802_11_SSID) + sizeof (ULONG) + ++ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + ++ sizeof (NDIS_802_11_CONFIGURATION) + ++ sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) + ++ sizeof (NDIS_802_11_RATES_EX)+ sizeof(WLAN_PHY_INFO)+ sizeof (ULONG) + MAX_IE_SZ; ++ */ ++ //for IEs is fix buf size ++ t_len = sizeof(WLAN_BSSID_EX); ++ ++ ++ //for hidden ap to set fw_state here ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) != _TRUE) ++ { ++ switch(ndis_network_mode) ++ { ++ case Ndis802_11IBSS: ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ break; ++ ++ case Ndis802_11Infrastructure: ++ set_fwstate(pmlmepriv, WIFI_STATION_STATE); ++ break; ++ ++ case Ndis802_11APMode: ++ case Ndis802_11AutoUnknown: ++ case Ndis802_11InfrastructureMax: ++ break; ++ ++ } ++ } ++ ++ psecnetwork=(WLAN_BSSID_EX *)&psecuritypriv->sec_bss; ++ if(psecnetwork==NULL) ++ { ++ if(pcmd !=NULL) ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ ++ res=_FAIL; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_err_, ("rtw_joinbss_cmd :psecnetwork==NULL!!!\n")); ++ ++ goto exit; ++ } ++ ++ _rtw_memset(psecnetwork, 0, t_len); ++ ++ _rtw_memcpy(psecnetwork, &pnetwork->network, get_WLAN_BSSID_EX_sz(&pnetwork->network)); ++ ++ auth=&psecuritypriv->authenticator_ie[0]; ++ psecuritypriv->authenticator_ie[0]=(unsigned char)psecnetwork->IELength; ++ ++ if((psecnetwork->IELength-12) < (256-1)) { ++ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], psecnetwork->IELength-12); ++ } else { ++ _rtw_memcpy(&psecuritypriv->authenticator_ie[1], &psecnetwork->IEs[12], (256-1)); ++ } ++ ++ psecnetwork->IELength = 0; ++ // Added by Albert 2009/02/18 ++ // If the the driver wants to use the bssid to create the connection. ++ // If not, we have to copy the connecting AP's MAC address to it so that ++ // the driver just has the bssid information for PMKIDList searching. ++ ++ if ( pmlmepriv->assoc_by_bssid == _FALSE ) ++ { ++ _rtw_memcpy( &pmlmepriv->assoc_bssid[ 0 ], &pnetwork->network.MacAddress[ 0 ], ETH_ALEN ); ++ } ++ ++ psecnetwork->IELength = rtw_restruct_sec_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength); ++ ++ ++ pqospriv->qos_option = 0; ++ ++ if(pregistrypriv->wmm_enable) ++ { ++ u32 tmp_len; ++ ++ tmp_len = rtw_restruct_wmm_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], pnetwork->network.IELength, psecnetwork->IELength); ++ ++ if (psecnetwork->IELength != tmp_len) ++ { ++ psecnetwork->IELength = tmp_len; ++ pqospriv->qos_option = 1; //There is WMM IE in this corresp. beacon ++ } ++ else ++ { ++ pqospriv->qos_option = 0;//There is no WMM IE in this corresp. beacon ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ phtpriv->ht_option = _FALSE; ++ if(pregistrypriv->ht_enable) ++ { ++ // Added by Albert 2010/06/23 ++ // For the WEP mode, we will use the bg mode to do the connection to avoid some IOT issue. ++ // Especially for Realtek 8192u SoftAP. ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP40_ ) && ++ ( padapter->securitypriv.dot11PrivacyAlgrthm != _WEP104_ ) && ++ ( padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_ )) ++ { ++ //rtw_restructure_ht_ie ++ rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], ++ pnetwork->network.IELength, &psecnetwork->IELength); ++ } ++ } ++ ++#endif ++ ++ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->network.IEs, pnetwork->network.IELength); ++ ++ #if 0 ++ psecuritypriv->supplicant_ie[0]=(u8)psecnetwork->IELength; ++ ++ if(psecnetwork->IELength < (256-1)) ++ { ++ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], psecnetwork->IELength); ++ } ++ else ++ { ++ _rtw_memcpy(&psecuritypriv->supplicant_ie[1], &psecnetwork->IEs[0], (256-1)); ++ } ++ #endif ++ ++ pcmd->cmdsz = get_WLAN_BSSID_EX_sz(psecnetwork);//get cmdsz before endian conversion ++ ++#ifdef CONFIG_RTL8712 ++ //wlan_network endian conversion ++ psecnetwork->Length = cpu_to_le32(psecnetwork->Length); ++ psecnetwork->Ssid.SsidLength= cpu_to_le32(psecnetwork->Ssid.SsidLength); ++ psecnetwork->Privacy = cpu_to_le32(psecnetwork->Privacy); ++ psecnetwork->Rssi = cpu_to_le32(psecnetwork->Rssi); ++ psecnetwork->NetworkTypeInUse = cpu_to_le32(psecnetwork->NetworkTypeInUse); ++ psecnetwork->Configuration.ATIMWindow = cpu_to_le32(psecnetwork->Configuration.ATIMWindow); ++ psecnetwork->Configuration.BeaconPeriod = cpu_to_le32(psecnetwork->Configuration.BeaconPeriod); ++ psecnetwork->Configuration.DSConfig = cpu_to_le32(psecnetwork->Configuration.DSConfig); ++ psecnetwork->Configuration.FHConfig.DwellTime=cpu_to_le32(psecnetwork->Configuration.FHConfig.DwellTime); ++ psecnetwork->Configuration.FHConfig.HopPattern=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopPattern); ++ psecnetwork->Configuration.FHConfig.HopSet=cpu_to_le32(psecnetwork->Configuration.FHConfig.HopSet); ++ psecnetwork->Configuration.FHConfig.Length=cpu_to_le32(psecnetwork->Configuration.FHConfig.Length); ++ psecnetwork->Configuration.Length = cpu_to_le32(psecnetwork->Configuration.Length); ++ psecnetwork->InfrastructureMode = cpu_to_le32(psecnetwork->InfrastructureMode); ++ psecnetwork->IELength = cpu_to_le32(psecnetwork->IELength); ++#endif ++ ++ _rtw_init_listhead(&pcmd->list); ++ pcmd->cmdcode = _JoinBss_CMD_;//GEN_CMD_CODE(_JoinBss) ++ pcmd->parmbuf = (unsigned char *)psecnetwork; ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_disassoc_cmd(_adapter*padapter) // for sta_mode ++{ ++ struct cmd_obj* pdisconnect_cmd; ++ struct disconnect_parm* pdisconnect; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_disassoc_cmd\n")); ++ ++ //if ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) { ++ ++ pdisconnect_cmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pdisconnect_cmd == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ pdisconnect = (struct disconnect_parm*)rtw_zmalloc(sizeof(struct disconnect_parm)); ++ if(pdisconnect == NULL) { ++ rtw_mfree((u8 *)pdisconnect_cmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(pdisconnect_cmd, pdisconnect, _DisConnect_CMD_); ++ res = rtw_enqueue_cmd(pcmdpriv, pdisconnect_cmd); ++ //} ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype) ++{ ++ struct cmd_obj* ph2c; ++ struct setopmode_parm* psetop; ++ ++ struct cmd_priv *pcmdpriv= &padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FALSE; ++ goto exit; ++ } ++ psetop = (struct setopmode_parm*)rtw_zmalloc(sizeof(struct setopmode_parm)); ++ ++ if(psetop==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FALSE; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetop, _SetOpMode_CMD_); ++ psetop->mode = (u8)networktype; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct set_stakey_rsp *psetstakey_rsp = NULL; ++ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct sta_info* sta = (struct sta_info* )psta; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); ++ if(psetstakey_rsp == NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ph2c->rsp = (u8 *) psetstakey_rsp; ++ ph2c->rspsz = sizeof(struct set_stakey_rsp); ++ ++ _rtw_memcpy(psetstakey_para->addr, sta->hwaddr,ETH_ALEN); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)){ ++#ifdef CONFIG_TDLS ++ if(sta->tdls_sta_state&TDLS_LINKED_STATE) ++ psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; ++ else ++#endif ++ psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm; ++ }else{ ++ GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); ++ } ++ ++ if (unicast_key == _TRUE) { ++#ifdef CONFIG_TDLS ++ if((sta->tdls_sta_state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE) ++ _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16); ++ else ++#endif ++ _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); ++ } else { ++ _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); ++ } ++ ++ //jeff: set this becasue at least sw key is ready ++ padapter->securitypriv.busetkipkey=_TRUE; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table) ++{ ++ struct cmd_obj* ph2c; ++ struct setratable_parm * psetrttblparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetrttblparm = (struct setratable_parm*)rtw_zmalloc(sizeof(struct setratable_parm)); ++ ++ if(psetrttblparm==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); ++ ++ _rtw_memcpy(psetrttblparm,prate_table,sizeof(struct setratable_parm)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval) ++{ ++ struct cmd_obj* ph2c; ++ struct getratable_parm * pgetrttblparm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ pgetrttblparm = (struct getratable_parm*)rtw_zmalloc(sizeof(struct getratable_parm)); ++ ++ if(pgetrttblparm==NULL){ ++ rtw_mfree((unsigned char *) ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++// init_h2fwcmd_w_parm_no_rsp(ph2c, psetrttblparm, GEN_CMD_CODE(_SetRaTable)); ++ ++ _rtw_init_listhead(&ph2c->list); ++ ph2c->cmdcode =GEN_CMD_CODE(_GetRaTable); ++ ph2c->parmbuf = (unsigned char *)pgetrttblparm; ++ ph2c->cmdsz = sizeof(struct getratable_parm); ++ ph2c->rsp = (u8*)pval; ++ ph2c->rspsz = sizeof(struct getratable_rsp); ++ ++ pgetrttblparm ->rsvd = 0x0; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr) ++{ ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct cmd_obj* ph2c; ++ struct set_assocsta_parm *psetassocsta_para; ++ struct set_stakey_rsp *psetassocsta_rsp = NULL; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetassocsta_para = (struct set_assocsta_parm*)rtw_zmalloc(sizeof(struct set_assocsta_parm)); ++ if(psetassocsta_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetassocsta_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_assocsta_rsp)); ++ if(psetassocsta_rsp==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetassocsta_para, sizeof(struct set_assocsta_parm)); ++ return _FAIL; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetassocsta_para, _SetAssocSta_CMD_); ++ ph2c->rsp = (u8 *) psetassocsta_rsp; ++ ph2c->rspsz = sizeof(struct set_assocsta_rsp); ++ ++ _rtw_memcpy(psetassocsta_para->addr, mac_addr,ETH_ALEN); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ } ++ ++u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr) ++{ ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct cmd_obj* ph2c; ++ struct addBaReq_parm *paddbareq_parm; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ paddbareq_parm = (struct addBaReq_parm*)rtw_zmalloc(sizeof(struct addBaReq_parm)); ++ if(paddbareq_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ paddbareq_parm->tid = tid; ++ _rtw_memcpy(paddbareq_parm->addr, addr, ETH_ALEN); ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq)); ++ ++ //DBG_8192C("rtw_addbareq_cmd, tid=%d\n", tid); ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_dynamic_chk_wk_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue) ++{ ++ struct cmd_obj* pcmdobj; ++ struct SetChannelPlan_param *setChannelPlan_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_chplan_cmd\n")); ++ ++ //check input parameter ++ if(!rtw_is_channel_plan_valid(chplan)) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ //prepare cmd parameter ++ setChannelPlan_param = (struct SetChannelPlan_param *)rtw_zmalloc(sizeof(struct SetChannelPlan_param)); ++ if(setChannelPlan_param == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ setChannelPlan_param->channel_plan=chplan; ++ ++ if(enqueue) ++ { ++ //need enqueue, prepare cmd_obj and enqueue ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelPlan_param, GEN_CMD_CODE(_SetChannelPlan)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ } ++ else ++ { ++ //no need to enqueue, do the cmd hdl directly and free cmd parameter ++ if( H2C_SUCCESS !=set_chplan_hdl(padapter, (unsigned char *)setChannelPlan_param) ) ++ res = _FAIL; ++ ++ rtw_mfree((u8 *)setChannelPlan_param, sizeof(struct SetChannelPlan_param)); ++ } ++ ++ //do something based on res... ++ if(res == _SUCCESS) ++ padapter->mlmepriv.ChannelPlan = chplan; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed) ++{ ++ struct cmd_obj* pcmdobj; ++ struct LedBlink_param *ledBlink_param; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_led_blink_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ ledBlink_param = (struct LedBlink_param *)rtw_zmalloc(sizeof(struct LedBlink_param)); ++ if(ledBlink_param == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ ledBlink_param->pLed=pLed; ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, ledBlink_param, GEN_CMD_CODE(_LedBlink)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no) ++{ ++ struct cmd_obj* pcmdobj; ++ struct SetChannelSwitch_param*setChannelSwitch_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_csa_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); ++ if(setChannelSwitch_param == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ setChannelSwitch_param->new_ch_no=new_ch_no; ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, setChannelSwitch_param, GEN_CMD_CODE(_SetChannelSwitch)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_tdls_cmd(_adapter *padapter, u8 *addr, u8 option) ++{ ++ struct cmd_obj* pcmdobj; ++ struct TDLSoption_param *TDLSoption; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++#ifdef CONFIG_TDLS ++ ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_set_tdls_cmd\n")); ++ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ ++ TDLSoption= (struct TDLSoption_param *)rtw_zmalloc(sizeof(struct TDLSoption_param)); ++ if(TDLSoption == NULL) { ++ rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_spinlock(&(padapter->tdlsinfo.cmd_lock)); ++ _rtw_memcpy(TDLSoption->addr, addr, 6); ++ TDLSoption->option = option; ++ _rtw_spinunlock(&(padapter->tdlsinfo.cmd_lock)); ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, TDLSoption, GEN_CMD_CODE(_TDLS)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ ++#endif //CONFIG_TDLS ++ ++exit: ++ ++ ++_func_exit_; ++ ++ return res; ++} ++ ++static void traffic_status_watchdog(_adapter *padapter) ++{ ++#ifdef CONFIG_LPS ++ u8 bEnterPS; ++ u32 trx_threshold; ++ u32 rx_threshold; ++#endif ++ u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; ++ u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); ++#endif //CONFIG_TDLS ++ ++ // ++ // Determine if our traffic is busy now ++ // ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) ++ { ++ ++ if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100 || ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100 ) ++ { ++ bBusyTraffic = _TRUE; ++ ++ if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100) ++ bRxBusyTraffic = _TRUE; ++ ++ if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100) ++ bTxBusyTraffic = _TRUE; ++ } ++ ++ // Higher Tx/Rx data. ++ if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 4000 || ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 4000 ) ++ { ++ bHigherBusyTraffic = _TRUE; ++ ++ // Extremely high Rx data. ++ if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 5000) ++ bHigherBusyRxTraffic = _TRUE; ++ ++ // Extremely high Tx data. ++ if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 5000) ++ bHigherBusyTxTraffic = _TRUE; ++ } ++ ++#ifdef CONFIG_TDLS ++#ifdef CONFIG_TDLS_AUTOSETUP ++ if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //10 * 2sec, periodically sending ++ issue_tdls_dis_req( padapter, NULL ); ++ ptdlsinfo->watchdog_count++; ++#endif //CONFIG_TDLS_AUTOSETUP ++#endif //CONFIG_TDLS ++ ++#ifdef CONFIG_LPS ++ // check traffic for powersaving. ++ if(padapter->registrypriv.intel_class_mode==1){ ++ trx_threshold=1; ++ rx_threshold=1; ++ } ++ else{ ++ trx_threshold=8; ++ rx_threshold=2; ++ } ++ if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > trx_threshold ) || ++ (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > rx_threshold) ) ++ { ++ //DBG_8192C("Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++ bEnterPS= _FALSE; ++ } ++ else ++ { ++ bEnterPS= _TRUE; ++ } ++ ++ // LeisurePS only work in infra mode. ++ if(bEnterPS) ++ { ++ LPS_Enter(padapter); ++ } ++ else ++ { ++ LPS_Leave(padapter); ++ } ++#endif ++ } ++ else ++ { ++#ifdef CONFIG_LPS ++ LPS_Leave(padapter); ++#endif ++ } ++ ++ pmlmepriv->LinkDetectInfo.NumRxOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod = 0; ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = bBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bTxBusyTraffic = bTxBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic; ++} ++ ++void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ //struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ if(padapter->HalFunc.sreset_xmit_status_check) ++ padapter->HalFunc.sreset_xmit_status_check(padapter); ++ #endif ++ ++ //if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE) ++ { ++ linked_status_chk(padapter); ++ traffic_status_watchdog(padapter); ++ } ++ ++ padapter->HalFunc.hal_dm_watchdog(padapter); ++ ++ //check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ ++} ++ ++#ifdef CONFIG_LPS ++void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 mstatus; ++ ++_func_enter_; ++ ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ || (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ { ++ return; ++ } ++ ++ switch(lps_ctrl_type) ++ { ++ case LPS_CTRL_SCAN: ++ //DBG_8192C("LPS_CTRL_SCAN \n"); ++ LeaveAllPowerSaveMode(padapter); ++ break; ++ case LPS_CTRL_JOINBSS: ++ //DBG_8192C("LPS_CTRL_JOINBSS \n"); ++ LPS_Leave(padapter); ++ break; ++ case LPS_CTRL_CONNECT: ++ //DBG_8192C("LPS_CTRL_CONNECT \n"); ++ mstatus = 1; ++ // Reset LPS Setting ++ padapter->pwrctrlpriv.LpsIdleCount = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ break; ++ case LPS_CTRL_DISCONNECT: ++ //DBG_8192C("LPS_CTRL_DISCONNECT \n"); ++ mstatus = 0; ++ LPS_Leave(padapter); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ break; ++ case LPS_CTRL_SPECIAL_PACKET: ++ //DBG_8192C("LPS_CTRL_SPECIAL_PACKET \n"); ++ pwrpriv->DelayLPSLastTimeStamp = rtw_get_current_time(); ++ LPS_Leave(padapter); ++ break; ++ ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ //if(!pwrctrlpriv->bLeisurePs) ++ // return res; ++ ++ if(enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = LPS_CTRL_WK_CID; ++ pdrvextra_cmd_parm->type_size = lps_ctrl_type; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ lps_ctrl_wk_hdl(padapter, lps_ctrl_type); ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ ++void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) ++{ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); ++} ++ ++u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 bSupportAntDiv = _FALSE; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); ++ if(_FALSE == bSupportAntDiv ) return res; ++ ++ if(_TRUE == enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = ANT_SELECT_WK_CID; ++ pdrvextra_cmd_parm->type_size = antenna; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else{ ++ antenna_select_wk_hdl(padapter,antenna ); ++ } ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif ++ ++void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) ++{ ++ rtw_ps_processor(padapter); ++} ++ ++#ifdef CONFIG_P2P ++u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ return res; ++ } ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = P2P_PROTO_WK_CID; ++ pdrvextra_cmd_parm->type_size = intCmdType; // As the command tppe. ++ pdrvextra_cmd_parm->pbuf = NULL; // Must be NULL here ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++#endif //CONFIG_P2P ++ ++u8 rtw_ps_cmd(_adapter*padapter) ++{ ++ struct cmd_obj *ppscmd; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res = _SUCCESS; ++_func_enter_; ++ ++ ppscmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ppscmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ppscmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ DBG_8192C("==> %s , enqueue CMD \n",__FUNCTION__); ++ init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ppscmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++#ifdef CONFIG_AP_MODE ++ ++static void rtw_chk_hi_queue_hdl(_adapter *padapter) ++{ ++ int cnt=0; ++ struct sta_info *psta_bmc; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return; ++ ++ ++ if(psta_bmc->sleepq_len==0) ++ { ++ while((rtw_read32(padapter, 0x414)&0x00ffff00)!=0) ++ { ++ rtw_msleep_os(100); ++ ++ cnt++; ++ ++ if(cnt>10) ++ break; ++ } ++ ++ if(cnt<=10) ++ { ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ } ++ ++} ++ ++u8 rtw_chk_hi_queue_cmd(_adapter*padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = CHECK_HIQ_WK_CID; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++#endif ++ ++u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct drvextra_cmd_parm *pdrvextra_cmd; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ pdrvextra_cmd = (struct drvextra_cmd_parm*)pbuf; ++ ++ switch(pdrvextra_cmd->ec_id) ++ { ++ case DYNAMIC_CHK_WK_CID: ++ dynamic_chk_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ break; ++ case POWER_SAVING_CTRL_WK_CID: ++ power_saving_wk_hdl(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ break; ++#ifdef CONFIG_LPS ++ case LPS_CTRL_WK_CID: ++ lps_ctrl_wk_hdl(padapter, (u8)pdrvextra_cmd->type_size); ++ break; ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case ANT_SELECT_WK_CID: ++ antenna_select_wk_hdl(padapter, pdrvextra_cmd->type_size); ++ break; ++#endif ++#ifdef CONFIG_P2P ++ case P2P_PS_WK_CID: ++ p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type_size); ++ break; ++ case P2P_PROTO_WK_CID: ++ // Commented by Albert 2011/07/01 ++ // I used the type_size as the type command ++ p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type_size ); ++ break; ++#endif //CONFIG_P2P ++#ifdef CONFIG_AP_MODE ++ case CHECK_HIQ_WK_CID: ++ rtw_chk_hi_queue_hdl(padapter); ++ break; ++#endif //CONFIG_AP_MODE ++ default: ++ break; ++ ++ } ++ ++ ++ if(pdrvextra_cmd->pbuf && pdrvextra_cmd->type_size>0) ++ { ++ rtw_mfree(pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); ++ } ++ ++ ++ return H2C_SUCCESS; ++ ++} ++ ++void rtw_survey_cmd_callback(_adapter* padapter , struct cmd_obj *pcmd) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if(pcmd->res == H2C_DROPPED) ++ { ++ //TODO: cancel timer and do timeout handler directly... ++ //need to make timeout handlerOS independent ++ _set_timer(&pmlmepriv->scan_to_timer, 1); ++ } ++ else if (pcmd->res != H2C_SUCCESS) { ++ _set_timer(&pmlmepriv->scan_to_timer, 1); ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: MgntActrtw_set_802_11_bssid_LIST_SCAN Fail ************\n\n.")); ++ } ++ ++ // free cmd ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++void rtw_disassoc_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if (pcmd->res != H2C_SUCCESS) ++ { ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ***Error: disconnect_cmd_callback Fail ***\n.")); ++ ++ goto exit; ++ } ++#ifdef CONFIG_BR_EXT ++ else //clear bridge database ++ nat25_db_cleanup(padapter); ++#endif //CONFIG_BR_EXT ++ ++ // free cmd ++ rtw_free_cmd_obj(pcmd); ++ ++exit: ++ ++_func_exit_; ++} ++ ++ ++void rtw_joinbss_cmd_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ if(pcmd->res == H2C_DROPPED) ++ { ++ //TODO: cancel timer and do timeout handler directly... ++ //need to make timeout handlerOS independent ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ } ++ else if(pcmd->res != H2C_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("********Error:rtw_select_and_join_from_scanned_queue Wait Sema Fail ************\n")); ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ } ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++ ++void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ u8 timer_cancelled; ++ struct sta_info *psta = NULL; ++ struct wlan_network *pwlan = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)pcmd->parmbuf; ++ struct wlan_network *tgt_network = &(pmlmepriv->cur_network); ++ ++_func_enter_; ++ ++ if((pcmd->res != H2C_SUCCESS)) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n ********Error: rtw_createbss_cmd_callback Fail ************\n\n.")); ++ _set_timer(&pmlmepriv->assoc_timer, 1 ); ++ } ++ ++ _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); ++ ++#ifdef CONFIG_FW_MLMLE ++ //endian_convert ++ pnetwork->Length = le32_to_cpu(pnetwork->Length); ++ pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); ++ pnetwork->Privacy =le32_to_cpu(pnetwork->Privacy); ++ pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); ++ pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); ++ pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); ++ //pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); ++ pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); ++ pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); ++ pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); ++ pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); ++ pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); ++ pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); ++ pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); ++ pnetwork->IELength = le32_to_cpu(pnetwork->IELength); ++#endif ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) ) ++ { ++ psta = rtw_get_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ if(!psta) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ if (psta == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); ++ goto createbss_cmd_fail ; ++ } ++ } ++ ++ rtw_indicate_connect( padapter); ++ } ++ else ++ { ++ _irqL irqL; ++ ++ pwlan = _rtw_alloc_network(pmlmepriv); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ if ( pwlan == NULL) ++ { ++ pwlan = rtw_get_oldest_wlan_network(&pmlmepriv->scanned_queue); ++ if( pwlan == NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\n Error: can't get pwlan in rtw_joinbss_event_callback \n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto createbss_cmd_fail; ++ } ++ pwlan->last_scanned = rtw_get_current_time(); ++ } ++ else ++ { ++ rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); ++ } ++ ++ pnetwork->Length = get_WLAN_BSSID_EX_sz(pnetwork); ++ _rtw_memcpy(&(pwlan->network), pnetwork, pnetwork->Length); ++ //pwlan->fixed = _TRUE; ++ ++ //rtw_list_insert_tail(&(pwlan->list), &pmlmepriv->scanned_queue.queue); ++ ++ // copy pdev_network information to pmlmepriv->cur_network ++ _rtw_memcpy(&tgt_network->network, pnetwork, (get_WLAN_BSSID_EX_sz(pnetwork))); ++ ++ // reset DSConfig ++ //tgt_network->network.Configuration.DSConfig = (u32)rtw_ch2freq(pnetwork->Configuration.DSConfig); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++#if 0 ++ if((pmlmepriv->fw_state) & WIFI_AP_STATE) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pnetwork->MacAddress); ++ ++ if (psta == NULL) { // for AP Mode & Adhoc Master Mode ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nCan't alloc sta_info when createbss_cmd_callback\n")); ++ goto createbss_cmd_fail ; ++ } ++ ++ rtw_indicate_connect( padapter); ++ } ++ else { ++ ++ //rtw_indicate_disconnect(dev); ++ } ++#endif ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // we will set _FW_LINKED when there is one more sat to join us (rtw_stassoc_event_callback) ++ ++ } ++ ++createbss_cmd_fail: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++ ++} ++ ++ ++ ++void rtw_setstaKey_cmdrsp_callback(_adapter* padapter , struct cmd_obj *pcmd) ++{ ++ ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct set_stakey_rsp* psetstakey_rsp = (struct set_stakey_rsp*) (pcmd->rsp); ++ struct sta_info* psta = rtw_get_stainfo(pstapriv, psetstakey_rsp->addr); ++ ++_func_enter_; ++ ++ if(psta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: rtw_setstaKey_cmdrsp_callback => can't get sta_info \n\n")); ++ goto exit; ++ } ++ ++ //psta->aid = psta->mac_id = psetstakey_rsp->keyid; //CAM_ID(CAM_ENTRY) ++ ++exit: ++ ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++ ++} ++void rtw_setassocsta_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++ _irqL irqL; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct set_assocsta_parm* passocsta_parm = (struct set_assocsta_parm*)(pcmd->parmbuf); ++ struct set_assocsta_rsp* passocsta_rsp = (struct set_assocsta_rsp*) (pcmd->rsp); ++ struct sta_info* psta = rtw_get_stainfo(pstapriv, passocsta_parm->addr); ++ ++_func_enter_; ++ ++ if(psta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nERROR: setassocsta_cmdrsp_callbac => can't get sta_info \n\n")); ++ goto exit; ++ } ++ ++ psta->aid = psta->mac_id = passocsta_rsp->cam_id; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)) ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ rtw_free_cmd_obj(pcmd); ++ ++_func_exit_; ++} ++ ++void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) ++{ ++_func_enter_; ++ ++ rtw_free_cmd_obj(pcmd); ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.workparam.bcompleted=_TRUE; ++#endif ++ ++_func_exit_; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_debug.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_debug.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,709 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_DEBUG_C_ ++ ++ ++#include ++ ++#ifdef CONFIG_DEBUG_RTL871X ++ ++ u32 GlobalDebugLevel = _drv_info_; ++ ++ u64 GlobalDebugComponents = \ ++ _module_rtl871x_xmit_c_ | ++ _module_xmit_osdep_c_ | ++ _module_rtl871x_recv_c_ | ++ _module_recv_osdep_c_ | ++ _module_rtl871x_mlme_c_ | ++ _module_mlme_osdep_c_ | ++ _module_rtl871x_sta_mgt_c_ | ++ _module_rtl871x_cmd_c_ | ++ _module_cmd_osdep_c_ | ++ _module_rtl871x_io_c_ | ++ _module_io_osdep_c_ | ++ _module_os_intfs_c_| ++ _module_rtl871x_security_c_| ++ _module_rtl871x_eeprom_c_| ++ _module_hal_init_c_| ++ _module_hci_hal_init_c_| ++ _module_rtl871x_ioctl_c_| ++ _module_rtl871x_ioctl_set_c_| ++ _module_rtl871x_ioctl_query_c_| ++ _module_rtl871x_pwrctrl_c_| ++ _module_hci_intfs_c_| ++ _module_hci_ops_c_| ++ _module_hci_ops_os_c_| ++ _module_rtl871x_ioctl_os_c| ++ _module_rtl8712_cmd_c_| ++ _module_rtl8192c_xmit_c_| ++ _module_rtl8712_recv_c_ | ++ _module_mp_ | ++ _module_efuse_; ++ ++#endif ++ ++#ifdef CONFIG_PROC_DEBUG ++#include ++ ++int proc_get_drv_version(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "%s\n", DRIVERVERSION); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_write_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ *eof = 1; ++ return 0; ++} ++ ++int proc_set_write_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 addr, val, len; ++ ++ if (count < 3) ++ { ++ DBG_8192C("argument size is less than 3\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); ++ ++ if (num != 3) { ++ DBG_8192C("invalid write_reg parameter!\n"); ++ return count; ++ } ++ ++ switch(len) ++ { ++ case 1: ++ rtw_write8(padapter, addr, (u8)val); ++ break; ++ case 2: ++ rtw_write16(padapter, addr, (u16)val); ++ break; ++ case 4: ++ rtw_write32(padapter, addr, val); ++ break; ++ default: ++ DBG_8192C("error write length=%d", len); ++ break; ++ } ++ ++ } ++ ++ return count; ++ ++} ++ ++static u32 proc_get_read_addr=0xeeeeeeee; ++static u32 proc_get_read_len=0x4; ++ ++int proc_get_read_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ int len = 0; ++ ++ if(proc_get_read_addr==0xeeeeeeee) ++ { ++ *eof = 1; ++ return len; ++ } ++ ++ switch(proc_get_read_len) ++ { ++ case 1: ++ len += snprintf(page + len, count - len, "rtw_read8(0x%x)=0x%x\n", proc_get_read_addr, rtw_read8(padapter, proc_get_read_addr)); ++ break; ++ case 2: ++ len += snprintf(page + len, count - len, "rtw_read16(0x%x)=0x%x\n", proc_get_read_addr, rtw_read16(padapter, proc_get_read_addr)); ++ break; ++ case 4: ++ len += snprintf(page + len, count - len, "rtw_read32(0x%x)=0x%x\n", proc_get_read_addr, rtw_read32(padapter, proc_get_read_addr)); ++ break; ++ default: ++ len += snprintf(page + len, count - len, "error read length=%d\n", proc_get_read_len); ++ break; ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_set_read_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[16]; ++ u32 addr, len; ++ ++ if (count < 2) ++ { ++ DBG_8192C("argument size is less than 2\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %x", &addr, &len); ++ ++ if (num != 2) { ++ DBG_8192C("invalid read_reg parameter!\n"); ++ return count; ++ } ++ ++ proc_get_read_addr = addr; ++ ++ proc_get_read_len = len; ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_fwstate(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "fwstate=0x%x\n", get_fwstate(pmlmepriv)); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_sec_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", ++ psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_mlmext_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "pmlmeinfo->state=0x%x\n", pmlmeinfo->state); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_qos_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "qos_option=%d\n", pmlmepriv->qospriv.qos_option); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_ht_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "ht_option=%d\n", pmlmepriv->htpriv.ht_option); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rf_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n", ++ pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_ap_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct sta_info *psta; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ int len = 0; ++ ++ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(psta) ++ { ++ int i; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++ len += snprintf(page + len, count - len, "SSID=%s\n", cur_network->network.Ssid.Ssid); ++ len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ len += snprintf(page + len, count - len, "cur_channel=%d, cur_bwmode=%d, cur_ch_offset=%d\n", pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); ++ len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ ++ for(i=0;i<16;i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ if(preorder_ctrl->enable) ++ { ++ len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ else ++ { ++ len += snprintf(page + len, count - len, "can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_adapter_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "bSurpriseRemoved=%d, bDriverStopped=%d\n", ++ padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_trx_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n", ++ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt,pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt); ++#ifdef CONFIG_USB_HCI ++ len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt); ++#endif ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++ ++int proc_get_rx_signal(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, ++ "rssi:%d\n" ++ "rxpwdb:%d\n" ++ "signal_strength:%u\n" ++ "signal_qual:%u\n" ++ "noise:%u\n", ++ padapter->recvpriv.rssi, ++ padapter->recvpriv.rxpwdb, ++ padapter->recvpriv.signal_strength, ++ padapter->recvpriv.signal_qual, ++ padapter->recvpriv.noise ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_rx_signal(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 is_signal_dbg, signal_strength; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%u %u", &is_signal_dbg, &signal_strength); ++ ++ is_signal_dbg = is_signal_dbg==0?0:1; ++ ++ if(is_signal_dbg && num!=2) ++ return count; ++ ++ signal_strength = signal_strength>100?100:signal_strength; ++ signal_strength = signal_strength<0?0:signal_strength; ++ ++ padapter->recvpriv.is_signal_dbg = is_signal_dbg; ++ padapter->recvpriv.signal_strength_dbg=signal_strength; ++ ++ if(is_signal_dbg) ++ DBG_871X("set %s %u\n", "DBG_SIGNAL_STRENGTH", signal_strength); ++ else ++ DBG_871X("set %s\n", "HW_SIGNAL_STRENGTH"); ++ ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_ampdu_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->ampdu_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_ampdu_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 3 ) ++ { ++ pregpriv->ampdu_enable= mode; ++ printk("ampdu_enable=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_rssi_disp(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ *eof = 1; ++ return 0; ++} ++ ++int proc_set_rssi_disp(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 enable=0; ++ ++ if (count < 1) ++ { ++ DBG_8192C("argument size is less than 1\n"); ++ return -EFAULT; ++ } ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x", &enable); ++ ++ if (num != 1) { ++ DBG_8192C("invalid set_rssi_disp parameter!\n"); ++ return count; ++ } ++ ++ if(enable) ++ { ++ DBG_8192C("Turn On Rx RSSI Display Function\n"); ++ padapter->bRxRSSIDisplay = enable ; ++ } ++ else ++ { ++ DBG_8192C("Turn Off Rx RSSI Display Function\n"); ++ padapter->bRxRSSIDisplay = 0 ; ++ } ++ ++ } ++ ++ return count; ++ ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++int proc_get_all_sta_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ _irqL irqL; ++ struct sta_info *psta; ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ int i, j; ++ _list *plist, *phead; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ int len = 0; ++ ++ ++ len += snprintf(page + len, count - len, "sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ //if(extra_arg == psta->aid) ++ { ++ len += snprintf(page + len, count - len, "sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ len += snprintf(page + len, count - len, "rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ len += snprintf(page + len, count - len, "qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ len += snprintf(page + len, count - len, "state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ len += snprintf(page + len, count - len, "bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ len += snprintf(page + len, count - len, "ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ len += snprintf(page + len, count - len, "agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ len += snprintf(page + len, count - len, "sleepq_len=%d\n", psta->sleepq_len); ++ len += snprintf(page + len, count - len, "capability=0x%x\n", psta->capability); ++ len += snprintf(page + len, count - len, "flags=0x%x\n", psta->flags); ++ len += snprintf(page + len, count - len, "wpa_psk=0x%x\n", psta->wpa_psk); ++ len += snprintf(page + len, count - len, "wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); ++ len += snprintf(page + len, count - len, "wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); ++ len += snprintf(page + len, count - len, "qos_info=0x%x\n", psta->qos_info); ++ len += snprintf(page + len, count - len, "dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); ++ ++ for(j=0;j<16;j++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[j]; ++ if(preorder_ctrl->enable) ++ { ++ len += snprintf(page + len, count - len, "tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#include ++extern atomic_t _malloc_cnt;; ++extern atomic_t _malloc_size;; ++ ++int proc_get_malloc_cnt(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, "_malloc_cnt=%d\n", atomic_read(&_malloc_cnt)); ++ len += snprintf(page + len, count - len, "_malloc_size=%d\n", atomic_read(&_malloc_size)); ++ ++ *eof = 1; ++ return len; ++} ++#endif /* DBG_MEMORY_LEAK */ ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++int proc_get_best_channel(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ int len = 0; ++ u32 i, best_channel_24G = 1, best_channel_5G = 36, index_24G = 0, index_5G = 0; ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ if ( pmlmeext->channel_set[i].ChannelNum == 1) ++ index_24G = i; ++ if ( pmlmeext->channel_set[i].ChannelNum == 36) ++ index_5G = i; ++ } ++ ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ // 2.4G ++ if ( pmlmeext->channel_set[i].ChannelNum == 6 ) { ++ if ( pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_24G].rx_count ) { ++ index_24G = i; ++ best_channel_24G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ // 5G ++ if ( pmlmeext->channel_set[i].ChannelNum >= 36 ++ && pmlmeext->channel_set[i].ChannelNum < 140 ) { ++ // Find primary channel ++ if ( (( pmlmeext->channel_set[i].ChannelNum - 36) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++ ++ if ( pmlmeext->channel_set[i].ChannelNum >= 149 ++ && pmlmeext->channel_set[i].ChannelNum < 165) { ++ // find primary channel ++ if ( (( pmlmeext->channel_set[i].ChannelNum - 149) % 8 == 0) ++ && (pmlmeext->channel_set[i].rx_count < pmlmeext->channel_set[index_5G].rx_count) ) { ++ index_5G = i; ++ best_channel_5G = pmlmeext->channel_set[i].ChannelNum; ++ } ++ } ++#if 1 // debug ++ len += snprintf(page + len, count - len, "The rx cnt of channel %3d = %d\n", ++ pmlmeext->channel_set[i].ChannelNum, pmlmeext->channel_set[i].rx_count); ++#endif ++ } ++ ++ len += snprintf(page + len, count - len, "best_channel_5G = %d\n", best_channel_5G); ++ len += snprintf(page + len, count - len, "best_channel_24G = %d\n", best_channel_24G); ++ ++ *eof = 1; ++ return len; ++ ++} ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,424 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_EEPROM_C_ ++ ++#include ++#include ++#include ++ ++void up_clk(_adapter* padapter, u16 *x) ++{ ++_func_enter_; ++ *x = *x | _EESK; ++ rtw_write8(padapter, EE_9346CR, (u8)*x); ++ rtw_udelay_os(CLOCK_RATE); ++ ++_func_exit_; ++ ++} ++ ++void down_clk(_adapter * padapter, u16 *x ) ++{ ++_func_enter_; ++ *x = *x & ~_EESK; ++ rtw_write8(padapter, EE_9346CR, (u8)*x); ++ rtw_udelay_os(CLOCK_RATE); ++_func_exit_; ++} ++ ++void shift_out_bits(_adapter * padapter, u16 data, u16 count) ++{ ++ u16 x,mask; ++_func_enter_; ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ mask = 0x01 << (count - 1); ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDO | _EEDI); ++ ++ do ++ { ++ x &= ~_EEDI; ++ if(data & mask) ++ x |= _EEDI; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++ rtw_udelay_os(CLOCK_RATE); ++ up_clk(padapter, &x); ++ down_clk(padapter, &x); ++ mask = mask >> 1; ++ } while(mask); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x &= ~_EEDI; ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++out: ++_func_exit_; ++} ++ ++u16 shift_in_bits (_adapter * padapter) ++{ ++ u16 x,d=0,i; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~( _EEDO | _EEDI); ++ d = 0; ++ ++ for(i=0; i<16; i++) ++ { ++ d = d << 1; ++ up_clk(padapter, &x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDI); ++ if(x & _EEDO) ++ d |= 1; ++ ++ down_clk(padapter, &x); ++ } ++out: ++_func_exit_; ++ ++ return d; ++} ++ ++void standby(_adapter * padapter ) ++{ ++ u8 x; ++_func_enter_; ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EECS | _EESK); ++ rtw_write8(padapter, EE_9346CR,x); ++ ++ rtw_udelay_os(CLOCK_RATE); ++ x |= _EECS; ++ rtw_write8(padapter, EE_9346CR, x); ++ rtw_udelay_os(CLOCK_RATE); ++_func_exit_; ++} ++ ++u16 wait_eeprom_cmd_done(_adapter* padapter) ++{ ++ u8 x; ++ u16 i,res=_FALSE; ++_func_enter_; ++ standby(padapter ); ++ for (i=0; i<200; i++) ++ { ++ x = rtw_read8(padapter, EE_9346CR); ++ if (x & _EEDO){ ++ res=_TRUE; ++ goto exit; ++ } ++ rtw_udelay_os(CLOCK_RATE); ++ } ++exit: ++_func_exit_; ++ return res; ++} ++ ++void eeprom_clean(_adapter * padapter) ++{ ++ u16 x; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x = rtw_read8(padapter, EE_9346CR); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ x &= ~(_EECS | _EEDI); ++ rtw_write8(padapter, EE_9346CR, (u8)x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ up_clk(padapter, &x); ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ down_clk(padapter, &x); ++out: ++_func_exit_; ++} ++ ++void eeprom_write16(_adapter * padapter, u16 reg, u16 data) ++{ ++ u8 x; ++#ifdef CONFIG_RTL8712 ++ u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; ++ tmp8_ori=rtw_read8(padapter, 0x102502f1); ++ tmp8_new=tmp8_ori & 0xf7; ++ if(tmp8_ori != tmp8_new){ ++ rtw_write8(padapter, 0x102502f1, tmp8_new); ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); ++ } ++ tmp8_clk_ori=rtw_read8(padapter,0x10250003); ++ tmp8_clk_new=tmp8_clk_ori|0x20; ++ if(tmp8_clk_new!=tmp8_clk_ori){ ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); ++ rtw_write8(padapter, 0x10250003, tmp8_clk_new); ++ } ++#endif ++_func_enter_; ++ ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, x); ++ ++ shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5); ++ ++ if(padapter->EepromAddressSize==8) //CF+ and SDIO ++ shift_out_bits(padapter, 0, 6); ++ else //USB ++ shift_out_bits(padapter, 0, 4); ++ ++ standby( padapter); ++ ++// Commented out by rcnjko, 2004.0 ++// // Erase this particular word. Write the erase opcode and register ++// // number in that order. The opcode is 3bits in length; reg is 6 bits long. ++// shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3); ++// shift_out_bits(Adapter, reg, Adapter->EepromAddressSize); ++// ++// if (wait_eeprom_cmd_done(Adapter ) == FALSE) ++// { ++// return; ++// } ++ ++ ++ standby(padapter ); ++ ++ // write the new word to the EEPROM ++ ++ // send the write opcode the EEPORM ++ shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3); ++ ++ // select which word in the EEPROM that we are writing to. ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ // write the data to the selected EEPROM word. ++ shift_out_bits(padapter, data, 16); ++ ++ if (wait_eeprom_cmd_done(padapter ) == _FALSE) ++ { ++ ++ goto exit; ++ } ++ ++ standby(padapter ); ++ ++ shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5); ++ shift_out_bits(padapter, reg, 4); ++ ++ eeprom_clean(padapter ); ++exit: ++#ifdef CONFIG_RTL8712 ++ if(tmp8_clk_new!=tmp8_clk_ori) ++ rtw_write8(padapter, 0x10250003, tmp8_clk_ori); ++ if(tmp8_new!=tmp8_ori) ++ rtw_write8(padapter, 0x102502f1, tmp8_ori); ++ ++#endif ++_func_exit_; ++ return; ++} ++ ++u16 eeprom_read16(_adapter * padapter, u16 reg) //ReadEEprom ++{ ++ ++ u16 x; ++ u16 data=0; ++#ifdef CONFIG_RTL8712 ++ u8 tmp8_ori,tmp8_new,tmp8_clk_ori,tmp8_clk_new; ++ tmp8_ori= rtw_read8(padapter, 0x102502f1); ++ tmp8_new = tmp8_ori & 0xf7; ++ if(tmp8_ori != tmp8_new){ ++ rtw_write8(padapter, 0x102502f1, tmp8_new); ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x102502f1=====\n")); ++ } ++ tmp8_clk_ori=rtw_read8(padapter,0x10250003); ++ tmp8_clk_new=tmp8_clk_ori|0x20; ++ if(tmp8_clk_new!=tmp8_clk_ori){ ++ RT_TRACE(_module_rtl871x_mp_ioctl_c_,_drv_err_,("====write 0x10250003=====\n")); ++ rtw_write8(padapter, 0x10250003, tmp8_clk_new); ++ } ++#endif ++_func_enter_; ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ // select EEPROM, reset bits, set _EECS ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, (unsigned char)x); ++ ++ // write the read opcode and register number in that order ++ // The opcode is 3bits in length, reg is 6 bits long ++ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ // Now read the data (16 bits) in from the selected EEPROM word ++ data = shift_in_bits(padapter); ++ ++ eeprom_clean(padapter); ++out: ++#ifdef CONFIG_RTL8712 ++ if(tmp8_clk_new!=tmp8_clk_ori) ++ rtw_write8(padapter, 0x10250003, tmp8_clk_ori); ++ if(tmp8_new!=tmp8_ori) ++ rtw_write8(padapter, 0x102502f1, tmp8_ori); ++ ++#endif ++_func_exit_; ++ return data; ++ ++ ++} ++ ++ ++ ++ ++//From even offset ++void eeprom_read_sz(_adapter * padapter, u16 reg, u8* data, u32 sz) ++{ ++ ++ u16 x, data16; ++ u32 i; ++_func_enter_; ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ // select EEPROM, reset bits, set _EECS ++ x = rtw_read8(padapter, EE_9346CR); ++ ++ if(padapter->bSurpriseRemoved==_TRUE){ ++ RT_TRACE(_module_rtl871x_eeprom_c_,_drv_err_,("padapter->bSurpriseRemoved==_TRUE")); ++ goto out; ++ } ++ ++ x &= ~(_EEDI | _EEDO | _EESK | _EEM0); ++ x |= _EEM1 | _EECS; ++ rtw_write8(padapter, EE_9346CR, (unsigned char)x); ++ ++ // write the read opcode and register number in that order ++ // The opcode is 3bits in length, reg is 6 bits long ++ shift_out_bits(padapter, EEPROM_READ_OPCODE, 3); ++ shift_out_bits(padapter, reg, padapter->EepromAddressSize); ++ ++ ++ for(i=0; i>8; ++ } ++ ++ eeprom_clean(padapter); ++out: ++_func_exit_; ++ ++ ++ ++} ++ ++ ++//addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) ++u8 eeprom_read(_adapter * padapter, u32 addr_off, u8 sz, u8* rbuf) ++{ ++ u8 quotient, remainder, addr_2align_odd; ++ u16 reg, stmp , i=0, idx = 0; ++_func_enter_; ++ reg = (u16)(addr_off >> 1); ++ addr_2align_odd = (u8)(addr_off & 0x1); ++ ++ if(addr_2align_odd) //read that start at high part: e.g 1,3,5,7,9,... ++ { ++ stmp = eeprom_read16(padapter, reg); ++ rbuf[idx++] = (u8) ((stmp>>8)&0xff); //return hogh-part of the short ++ reg++; sz--; ++ } ++ ++ quotient = sz >> 1; ++ remainder = sz & 0x1; ++ ++ for( i=0 ; i < quotient; i++) ++ { ++ stmp = eeprom_read16(padapter, reg+i); ++ rbuf[idx++] = (u8) (stmp&0xff); ++ rbuf[idx++] = (u8) ((stmp>>8)&0xff); ++ } ++ ++ reg = reg+i; ++ if(remainder){ //end of read at lower part of short : 0,2,4,6,... ++ stmp = eeprom_read16(padapter, reg); ++ rbuf[idx] = (u8)(stmp & 0xff); ++ } ++_func_exit_; ++ return _TRUE; ++} ++ ++ ++ ++VOID read_eeprom_content(_adapter * padapter) ++{ ++ ++_func_enter_; ++ ++ ++_func_exit_; ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1486 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IEEE80211_C ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++//----------------------------------------------------------- ++// for adhoc-master to generate ie and provide supported-rate to fw ++//----------------------------------------------------------- ++ ++static u8 WIFI_CCKRATES[] = ++{(IEEE80211_CCK_RATE_1MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_2MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_5MB | IEEE80211_BASIC_RATE_MASK), ++ (IEEE80211_CCK_RATE_11MB | IEEE80211_BASIC_RATE_MASK)}; ++ ++static u8 WIFI_OFDMRATES[] = ++{(IEEE80211_OFDM_RATE_6MB), ++ (IEEE80211_OFDM_RATE_9MB), ++ (IEEE80211_OFDM_RATE_12MB), ++ (IEEE80211_OFDM_RATE_18MB), ++ (IEEE80211_OFDM_RATE_24MB), ++ IEEE80211_OFDM_RATE_36MB, ++ IEEE80211_OFDM_RATE_48MB, ++ IEEE80211_OFDM_RATE_54MB}; ++ ++ ++int rtw_get_bit_value_from_ieee_value(u8 val) ++{ ++ unsigned char dot11_rate_table[]={2,4,11,22,12,18,24,36,48,72,96,108,0}; // last element must be zero!! ++ ++ int i=0; ++ while(dot11_rate_table[i] != 0) { ++ if (dot11_rate_table[i] == val) ++ return BIT(i); ++ i++; ++ } ++ return 0; ++} ++ ++uint rtw_is_cckrates_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ i++; ++ } ++ ++ return _FALSE; ++} ++ ++uint rtw_is_cckratesonly_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ ++ return _FALSE; ++ ++ i++; ++ } ++ ++ return _TRUE; ++ ++} ++ ++int rtw_check_network_type(unsigned char *rate, int ratelen, int channel) ++{ ++ if (channel > 14) ++ { ++ if ((rtw_is_cckrates_included(rate)) == _TRUE) ++ return WIRELESS_INVALID; ++ else ++ return WIRELESS_11A; ++ } ++ else // could be pure B, pure G, or B/G ++ { ++ if ((rtw_is_cckratesonly_included(rate)) == _TRUE) ++ return WIRELESS_11B; ++ else if((rtw_is_cckrates_included(rate)) == _TRUE) ++ return WIRELESS_11BG; ++ else ++ return WIRELESS_11G; ++ } ++ ++} ++ ++u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, ++ unsigned int *frlen) ++{ ++ _rtw_memcpy((void *)pbuf, (void *)source, len); ++ *frlen = *frlen + len; ++ return (pbuf + len); ++} ++ ++// rtw_set_ie will update frame length ++u8 *rtw_set_ie ++( ++ u8 *pbuf, ++ sint index, ++ uint len, ++ u8 *source, ++ uint *frlen //frame length ++) ++{ ++_func_enter_; ++ *pbuf = (u8)index; ++ ++ *(pbuf + 1) = (u8)len; ++ ++ if (len > 0) ++ _rtw_memcpy((void *)(pbuf + 2), (void *)source, len); ++ ++ *frlen = *frlen + (len + 2); ++ ++ return (pbuf + len + 2); ++_func_exit_; ++} ++ ++ ++ ++/*---------------------------------------------------------------------------- ++index: the information element id index, limit is the limit for search ++-----------------------------------------------------------------------------*/ ++u8 *rtw_get_ie(u8 *pbuf, sint index, sint *len, sint limit) ++{ ++ sint tmp,i; ++ u8 *p; ++_func_enter_; ++ if (limit < 1){ ++ _func_exit_; ++ return NULL; ++ } ++ ++ p = pbuf; ++ i = 0; ++ *len = 0; ++ while(1) ++ { ++ if (*p == index) ++ { ++ *len = *(p + 1); ++ return (p); ++ } ++ else ++ { ++ tmp = *(p + 1); ++ p += (tmp + 2); ++ i += (tmp + 2); ++ } ++ if (i >= limit) ++ break; ++ } ++_func_exit_; ++ return NULL; ++} ++ ++void rtw_set_supported_rate(u8* SupportedRates, uint mode) ++{ ++_func_enter_; ++ ++ _rtw_memset(SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); ++ ++ switch (mode) ++ { ++ case WIRELESS_11B: ++ _rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN); ++ break; ++ ++ case WIRELESS_11G: ++ case WIRELESS_11A: ++ case WIRELESS_11_5N: ++ case WIRELESS_11A_5N://Todo: no basic rate for ofdm ? ++ _rtw_memcpy(SupportedRates, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN); ++ break; ++ ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11_24N: ++ case WIRELESS_11BG_24N: ++ _rtw_memcpy(SupportedRates, WIFI_CCKRATES, IEEE80211_CCK_RATE_LEN); ++ _rtw_memcpy(SupportedRates + IEEE80211_CCK_RATE_LEN, WIFI_OFDMRATES, IEEE80211_NUM_OFDM_RATESLEN); ++ break; ++ ++ } ++_func_exit_; ++} ++ ++uint rtw_get_rateset_len(u8 *rateset) ++{ ++ uint i = 0; ++_func_enter_; ++ while(1) ++ { ++ if ((rateset[i]) == 0) ++ break; ++ ++ if (i > 12) ++ break; ++ ++ i++; ++ } ++_func_exit_; ++ return i; ++} ++ ++int rtw_generate_ie(struct registry_priv *pregistrypriv) ++{ ++ u8 wireless_mode; ++ int sz = 0, rateLen; ++ WLAN_BSSID_EX* pdev_network = &pregistrypriv->dev_network; ++ u8* ie = pdev_network->IEs; ++ ++_func_enter_; ++ ++ //timestamp will be inserted by hardware ++ sz += 8; ++ ie += sz; ++ ++ //beacon interval : 2bytes ++ *(u16*)ie = cpu_to_le16((u16)pdev_network->Configuration.BeaconPeriod);//BCN_INTERVAL; ++ sz += 2; ++ ie += 2; ++ ++ //capability info ++ *(u16*)ie = 0; ++ ++ *(u16*)ie |= cpu_to_le16(cap_IBSS); ++ ++ if(pregistrypriv->preamble == PREAMBLE_SHORT) ++ *(u16*)ie |= cpu_to_le16(cap_ShortPremble); ++ ++ if (pdev_network->Privacy) ++ *(u16*)ie |= cpu_to_le16(cap_Privacy); ++ ++ sz += 2; ++ ie += 2; ++ ++ //SSID ++ ie = rtw_set_ie(ie, _SSID_IE_, pdev_network->Ssid.SsidLength, pdev_network->Ssid.Ssid, &sz); ++ ++ //supported rates ++ if(pregistrypriv->wireless_mode == WIRELESS_11ABGN) ++ { ++ if(pdev_network->Configuration.DSConfig > 14) ++ wireless_mode = WIRELESS_11A_5N; ++ else ++ wireless_mode = WIRELESS_11BG_24N; ++ } ++ else ++ { ++ wireless_mode = pregistrypriv->wireless_mode; ++ } ++ ++ rtw_set_supported_rate(pdev_network->SupportedRates, wireless_mode) ; ++ ++ rateLen = rtw_get_rateset_len(pdev_network->SupportedRates); ++ ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, 8, pdev_network->SupportedRates, &sz); ++ //ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); ++ } ++ else ++ { ++ ie = rtw_set_ie(ie, _SUPPORTEDRATES_IE_, rateLen, pdev_network->SupportedRates, &sz); ++ } ++ ++ //DS parameter set ++ ie = rtw_set_ie(ie, _DSSET_IE_, 1, (u8 *)&(pdev_network->Configuration.DSConfig), &sz); ++ ++ ++ //IBSS Parameter Set ++ ++ ie = rtw_set_ie(ie, _IBSS_PARA_IE_, 2, (u8 *)&(pdev_network->Configuration.ATIMWindow), &sz); ++ ++ if (rateLen > 8) ++ { ++ ie = rtw_set_ie(ie, _EXT_SUPPORTEDRATES_IE_, (rateLen - 8), (pdev_network->SupportedRates + 8), &sz); ++ } ++ ++ ++ //HT Cap. ++ if(((pregistrypriv->wireless_mode&WIRELESS_11_5N)||(pregistrypriv->wireless_mode&WIRELESS_11_24N)) ++ && (pregistrypriv->ht_enable==_TRUE)) ++ { ++ //todo: ++ } ++ ++ //pdev_network->IELength = sz; //update IELength ++ ++_func_exit_; ++ ++ //return _SUCCESS; ++ ++ return sz; ++ ++} ++ ++unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit) ++{ ++ int len; ++ u16 val16; ++ unsigned char wpa_oui_type[] = {0x00, 0x50, 0xf2, 0x01}; ++ u8 *pbuf = pie; ++ ++ while(1) ++ { ++ pbuf = rtw_get_ie(pbuf, _WPA_IE_ID_, &len, limit); ++ ++ if (pbuf) { ++ ++ //check if oui matches... ++ if (_rtw_memcmp((pbuf + 2), wpa_oui_type, sizeof (wpa_oui_type)) == _FALSE) { ++ ++ goto check_next_ie; ++ } ++ ++ //check version... ++ _rtw_memcpy((u8 *)&val16, (pbuf + 6), sizeof(val16)); ++ ++ val16 = le16_to_cpu(val16); ++ if (val16 != 0x0001) ++ goto check_next_ie; ++ ++ *wpa_ie_len = *(pbuf + 1); ++ ++ return pbuf; ++ ++ } ++ else { ++ ++ *wpa_ie_len = 0; ++ return NULL; ++ } ++ ++check_next_ie: ++ ++ limit = limit - (pbuf - pie) - 2 - len; ++ ++ if (limit <= 0) ++ break; ++ ++ pbuf += (2 + len); ++ ++ } ++ ++ *wpa_ie_len = 0; ++ ++ return NULL; ++ ++} ++ ++unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit) ++{ ++ ++ return rtw_get_ie(pie, _WPA2_IE_ID_,rsn_ie_len, limit); ++ ++} ++ ++int rtw_get_wpa_cipher_suite(u8 *s) ++{ ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_NONE, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_NONE; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP40, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP40; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_TKIP, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_TKIP; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_CCMP, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_CCMP; ++ if (_rtw_memcmp(s, WPA_CIPHER_SUITE_WEP104, WPA_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP104; ++ ++ return 0; ++} ++ ++int rtw_get_wpa2_cipher_suite(u8 *s) ++{ ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_NONE, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_NONE; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP40, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP40; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_TKIP, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_TKIP; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_CCMP, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_CCMP; ++ if (_rtw_memcmp(s, RSN_CIPHER_SUITE_WEP104, RSN_SELECTOR_LEN) == _TRUE) ++ return WPA_CIPHER_WEP104; ++ ++ return 0; ++} ++ ++ ++int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher) ++{ ++ int i, ret=_SUCCESS; ++ int left, count; ++ u8 *pos; ++ ++ if (wpa_ie_len <= 0) { ++ /* No WPA IE - fail silently */ ++ return _FAIL; ++ } ++ ++ ++ if ((*wpa_ie != _WPA_IE_ID_) || (*(wpa_ie+1) != (u8)(wpa_ie_len - 2)) || ++ (_rtw_memcmp(wpa_ie+2, WPA_OUI_TYPE, WPA_SELECTOR_LEN) != _TRUE) ) ++ { ++ return _FAIL; ++ } ++ ++ pos = wpa_ie; ++ ++ pos += 8; ++ left = wpa_ie_len - 8; ++ ++ ++ //group_cipher ++ if (left >= WPA_SELECTOR_LEN) { ++ ++ *group_cipher = rtw_get_wpa_cipher_suite(pos); ++ ++ pos += WPA_SELECTOR_LEN; ++ left -= WPA_SELECTOR_LEN; ++ ++ } ++ else if (left > 0) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); ++ ++ return _FAIL; ++ } ++ ++ ++ //pairwise_cipher ++ if (left >= 2) ++ { ++ //count = le16_to_cpu(*(u16*)pos); ++ count = RTW_GET_LE16(pos); ++ pos += 2; ++ left -= 2; ++ ++ if (count == 0 || left < count * WPA_SELECTOR_LEN) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " ++ "count %u left %u", __FUNCTION__, count, left)); ++ return _FAIL; ++ } ++ ++ for (i = 0; i < count; i++) ++ { ++ *pairwise_cipher |= rtw_get_wpa_cipher_suite(pos); ++ ++ pos += WPA_SELECTOR_LEN; ++ left -= WPA_SELECTOR_LEN; ++ } ++ ++ } ++ else if (left == 1) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); ++ return _FAIL; ++ } ++ ++ ++ return ret; ++ ++} ++ ++int rtw_parse_wpa2_ie(u8* rsn_ie, int rsn_ie_len, int *group_cipher, int *pairwise_cipher) ++{ ++ int i, ret=_SUCCESS; ++ int left, count; ++ u8 *pos; ++ ++ if (rsn_ie_len <= 0) { ++ /* No RSN IE - fail silently */ ++ return _FAIL; ++ } ++ ++ ++ if ((*rsn_ie!= _WPA2_IE_ID_) || (*(rsn_ie+1) != (u8)(rsn_ie_len - 2))) ++ { ++ return _FAIL; ++ } ++ ++ pos = rsn_ie; ++ pos += 4; ++ left = rsn_ie_len - 4; ++ ++ //group_cipher ++ if (left >= RSN_SELECTOR_LEN) { ++ ++ *group_cipher = rtw_get_wpa2_cipher_suite(pos); ++ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ ++ } else if (left > 0) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie length mismatch, %u too much", __FUNCTION__, left)); ++ return _FAIL; ++ } ++ ++ //pairwise_cipher ++ if (left >= 2) ++ { ++ //count = le16_to_cpu(*(u16*)pos); ++ count = RTW_GET_LE16(pos); ++ pos += 2; ++ left -= 2; ++ ++ if (count == 0 || left < count * RSN_SELECTOR_LEN) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie count botch (pairwise), " ++ "count %u left %u", __FUNCTION__, count, left)); ++ return _FAIL; ++ } ++ ++ for (i = 0; i < count; i++) ++ { ++ *pairwise_cipher |= rtw_get_wpa2_cipher_suite(pos); ++ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ } ++ ++ } ++ else if (left == 1) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s: ie too short (for key mgmt)", __FUNCTION__)); ++ ++ return _FAIL; ++ } ++ ++ ++ return ret; ++ ++} ++ ++int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len) ++{ ++ u8 authmode, sec_idx, i; ++ u8 wpa_oui[4]={0x0,0x50,0xf2,0x01}; ++ uint cnt; ++ ++_func_enter_; ++ ++ //Search required WPA or WPA2 IE and copy to sec_ie[ ] ++ ++ cnt = (_TIMESTAMP_ + _BEACON_ITERVAL_ + _CAPABILITY_); ++ ++ sec_idx=0; ++ ++ while(cnt found WPS_IE.....\n"); ++ *wps_ielen = ie_ptr[1]+2; ++ match=_TRUE; ++ } ++ return match; ++} ++ ++/** ++ * rtw_get_wps_ie - Search WPS IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @wps_ie: If not NULL and WPS IE is found, WPS IE will be copied to the buf starting from wps_ie ++ * @wps_ielen: If not NULL and WPS IE is found, will set to the length of the entire WPS IE ++ * ++ * Returns: The address of the WPS IE found, or NULL ++ */ ++u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen) ++{ ++ uint cnt; ++ u8 *wpsie_ptr=NULL; ++ u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ if(wps_ielen) ++ *wps_ielen = 0; ++ ++ if(!in_ie || in_len<=0) ++ return wpsie_ptr; ++ ++ cnt = 0; ++ ++ while(cntwpa_ie = pos; ++ elems->wpa_ie_len = elen; ++ break; ++ case WME_OUI_TYPE: /* this is a Wi-Fi WME info. element */ ++ if (elen < 5) { ++ DBG_871X("short WME " ++ "information element ignored " ++ "(len=%lu)\n", ++ (unsigned long) elen); ++ return -1; ++ } ++ switch (pos[4]) { ++ case WME_OUI_SUBTYPE_INFORMATION_ELEMENT: ++ case WME_OUI_SUBTYPE_PARAMETER_ELEMENT: ++ elems->wme = pos; ++ elems->wme_len = elen; ++ break; ++ case WME_OUI_SUBTYPE_TSPEC_ELEMENT: ++ elems->wme_tspec = pos; ++ elems->wme_tspec_len = elen; ++ break; ++ default: ++ DBG_871X("unknown WME " ++ "information element ignored " ++ "(subtype=%d len=%lu)\n", ++ pos[4], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ case 4: ++ /* Wi-Fi Protected Setup (WPS) IE */ ++ elems->wps_ie = pos; ++ elems->wps_ie_len = elen; ++ break; ++ default: ++ DBG_871X("Unknown Microsoft " ++ "information element ignored " ++ "(type=%d len=%lu)\n", ++ pos[3], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ ++ case OUI_BROADCOM: ++ switch (pos[3]) { ++ case VENDOR_HT_CAPAB_OUI_TYPE: ++ elems->vendor_ht_cap = pos; ++ elems->vendor_ht_cap_len = elen; ++ break; ++ default: ++ DBG_871X("Unknown Broadcom " ++ "information element ignored " ++ "(type=%d len=%lu)\n", ++ pos[3], (unsigned long) elen); ++ return -1; ++ } ++ break; ++ ++ default: ++ DBG_871X("unknown vendor specific information " ++ "element ignored (vendor OUI %02x:%02x:%02x " ++ "len=%lu)\n", ++ pos[0], pos[1], pos[2], (unsigned long) elen); ++ return -1; ++ } ++ ++ return 0; ++ ++} ++ ++/** ++ * ieee802_11_parse_elems - Parse information elements in management frames ++ * @start: Pointer to the start of IEs ++ * @len: Length of IE buffer in octets ++ * @elems: Data structure for parsed elements ++ * @show_errors: Whether to show parsing errors in debug log ++ * Returns: Parsing result ++ */ ++ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, ++ struct ieee802_11_elems *elems, ++ int show_errors) ++{ ++ uint left = len; ++ u8 *pos = start; ++ int unknown = 0; ++ ++ _rtw_memset(elems, 0, sizeof(*elems)); ++ ++ while (left >= 2) { ++ u8 id, elen; ++ ++ id = *pos++; ++ elen = *pos++; ++ left -= 2; ++ ++ if (elen > left) { ++ if (show_errors) { ++ DBG_871X("IEEE 802.11 element " ++ "parse failed (id=%d elen=%d " ++ "left=%lu)\n", ++ id, elen, (unsigned long) left); ++ } ++ return ParseFailed; ++ } ++ ++ switch (id) { ++ case WLAN_EID_SSID: ++ elems->ssid = pos; ++ elems->ssid_len = elen; ++ break; ++ case WLAN_EID_SUPP_RATES: ++ elems->supp_rates = pos; ++ elems->supp_rates_len = elen; ++ break; ++ case WLAN_EID_FH_PARAMS: ++ elems->fh_params = pos; ++ elems->fh_params_len = elen; ++ break; ++ case WLAN_EID_DS_PARAMS: ++ elems->ds_params = pos; ++ elems->ds_params_len = elen; ++ break; ++ case WLAN_EID_CF_PARAMS: ++ elems->cf_params = pos; ++ elems->cf_params_len = elen; ++ break; ++ case WLAN_EID_TIM: ++ elems->tim = pos; ++ elems->tim_len = elen; ++ break; ++ case WLAN_EID_IBSS_PARAMS: ++ elems->ibss_params = pos; ++ elems->ibss_params_len = elen; ++ break; ++ case WLAN_EID_CHALLENGE: ++ elems->challenge = pos; ++ elems->challenge_len = elen; ++ break; ++ case WLAN_EID_ERP_INFO: ++ elems->erp_info = pos; ++ elems->erp_info_len = elen; ++ break; ++ case WLAN_EID_EXT_SUPP_RATES: ++ elems->ext_supp_rates = pos; ++ elems->ext_supp_rates_len = elen; ++ break; ++ case WLAN_EID_VENDOR_SPECIFIC: ++ if (rtw_ieee802_11_parse_vendor_specific(pos, elen, ++ elems, ++ show_errors)) ++ unknown++; ++ break; ++ case WLAN_EID_RSN: ++ elems->rsn_ie = pos; ++ elems->rsn_ie_len = elen; ++ break; ++ case WLAN_EID_PWR_CAPABILITY: ++ elems->power_cap = pos; ++ elems->power_cap_len = elen; ++ break; ++ case WLAN_EID_SUPPORTED_CHANNELS: ++ elems->supp_channels = pos; ++ elems->supp_channels_len = elen; ++ break; ++ case WLAN_EID_MOBILITY_DOMAIN: ++ elems->mdie = pos; ++ elems->mdie_len = elen; ++ break; ++ case WLAN_EID_FAST_BSS_TRANSITION: ++ elems->ftie = pos; ++ elems->ftie_len = elen; ++ break; ++ case WLAN_EID_TIMEOUT_INTERVAL: ++ elems->timeout_int = pos; ++ elems->timeout_int_len = elen; ++ break; ++ case WLAN_EID_HT_CAP: ++ elems->ht_capabilities = pos; ++ elems->ht_capabilities_len = elen; ++ break; ++ case WLAN_EID_HT_OPERATION: ++ elems->ht_operation = pos; ++ elems->ht_operation_len = elen; ++ break; ++ default: ++ unknown++; ++ if (!show_errors) ++ break; ++ DBG_871X("IEEE 802.11 element parse " ++ "ignored unknown element (id=%d elen=%d)\n", ++ id, elen); ++ break; ++ } ++ ++ left -= elen; ++ pos += elen; ++ } ++ ++ if (left) ++ return ParseFailed; ++ ++ return unknown ? ParseUnknown : ParseOK; ++ ++} ++ ++u8 key_char2num(u8 ch) ++{ ++ if((ch>='0')&&(ch<='9')) ++ return ch - '0'; ++ else if ((ch>='a')&&(ch<='f')) ++ return ch - 'a' + 10; ++ else if ((ch>='A')&&(ch<='F')) ++ return ch - 'A' + 10; ++ else ++ return 0xff; ++} ++ ++u8 str_2char2num(u8 hch, u8 lch) ++{ ++ return ((key_char2num(hch) * 10 ) + key_char2num(lch)); ++} ++ ++u8 key_2char2num(u8 hch, u8 lch) ++{ ++ return ((key_char2num(hch) << 4) | key_char2num(lch)); ++} ++ ++extern char* rtw_initmac; ++void rtw_macaddr_cfg(u8 *mac_addr) ++{ ++ u8 mac[ETH_ALEN]; ++ if(mac_addr == NULL) return; ++ ++ if ( rtw_initmac ) ++ { // Users specify the mac address ++ int jj,kk; ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ mac[jj] = key_2char2num(rtw_initmac[kk], rtw_initmac[kk+ 1]); ++ } ++ _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ } ++ else ++ { // Use the mac address stored in the Efuse ++ _rtw_memcpy(mac, mac_addr, ETH_ALEN); ++ } ++ ++ if (((mac[0]==0xff) &&(mac[1]==0xff) && (mac[2]==0xff) && ++ (mac[3]==0xff) && (mac[4]==0xff) &&(mac[5]==0xff)) || ++ ((mac[0]==0x0) && (mac[1]==0x0) && (mac[2]==0x0) && ++ (mac[3]==0x0) && (mac[4]==0x0) &&(mac[5]==0x0))) ++ { ++ mac[0] = 0x00; ++ mac[1] = 0xe0; ++ mac[2] = 0x4c; ++ mac[3] = 0x87; ++ mac[4] = 0x00; ++ mac[5] = 0x00; ++ // use default mac addresss ++ _rtw_memcpy(mac_addr, mac, ETH_ALEN); ++ DBG_8192C("MAC Address from efuse error, assign default one !!!\n"); ++ } ++ ++ DBG_8192C("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); ++} ++ ++void dump_ies(u8 *buf, u32 buf_len) { ++ u8* pos = (u8*)buf; ++ u8 id, len; ++ ++ while(pos-buf<=buf_len){ ++ id = *pos; ++ len = *(pos+1); ++ ++ DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ #ifdef CONFIG_P2P ++ dump_p2p_ie(pos, len); ++ #endif ++ dump_wps_ie(pos, len); ++ ++ pos+=(2+len); ++ } ++} ++ ++void dump_wps_ie(u8 *ie, u32 ie_len) { ++ u8* pos = (u8*)ie; ++ u16 id; ++ u16 len; ++ ++ u8 *wps_ie; ++ uint wps_ielen; ++ ++ wps_ie = rtw_get_wps_ie(ie, ie_len, NULL, &wps_ielen); ++ if(wps_ie != ie || wps_ielen == 0) ++ return; ++ ++ pos+=6; ++ while(pos-ie < ie_len){ ++ id = RTW_GET_BE16(pos); ++ len = RTW_GET_BE16(pos + 2); ++ ++ DBG_871X("%s ID:0x%04x, LEN:%u\n", __FUNCTION__, id, len); ++ ++ pos+=(4+len); ++ } ++} ++ ++#ifdef CONFIG_P2P ++void dump_p2p_ie(u8 *ie, u32 ie_len) { ++ u8* pos = (u8*)ie; ++ u8 id; ++ u16 len; ++ ++ u8 *p2p_ie; ++ uint p2p_ielen; ++ ++ p2p_ie = rtw_get_p2p_ie(ie, ie_len, NULL, &p2p_ielen); ++ if(p2p_ie != ie || p2p_ielen == 0) ++ return; ++ ++ pos+=6; ++ while(pos-ie < ie_len){ ++ id = *pos; ++ len = RTW_GET_LE16(pos+1); ++ ++ DBG_871X("%s ID:%u, LEN:%u\n", __FUNCTION__, id, len); ++ ++ pos+=(3+len); ++ } ++} ++ ++/** ++ * rtw_get_p2p_ie - Search P2P IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @p2p_ie: If not NULL and P2P IE is found, P2P IE will be copied to the buf starting from p2p_ie ++ * @p2p_ielen: If not NULL and P2P IE is found, will set to the length of the entire P2P IE ++ * ++ * Returns: The address of the P2P IE found, or NULL ++ */ ++u8 *rtw_get_p2p_ie(u8 *in_ie, uint in_len, u8 *p2p_ie, uint *p2p_ielen) ++{ ++ uint cnt = 0; ++ u8 *p2p_ie_ptr; ++ u8 eid, p2p_oui[4]={0x50,0x6F,0x9A,0x09}; ++ ++ if ( p2p_ielen != NULL ) ++ *p2p_ielen = 0; ++ ++ while(cnt0) ++ // dump_ies(ie, ielen); ++ break; ++ } ++ } ++ ++ return ielen; ++} ++ ++void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id) ++{ ++ u8 *p2p_ie; ++ uint p2p_ielen, p2p_ielen_ori; ++ int cnt; ++ ++ if( (p2p_ie=rtw_get_p2p_ie(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_, NULL, &p2p_ielen_ori)) ) ++ { ++ #if 0 ++ if(rtw_get_p2p_attr(p2p_ie, p2p_ielen_ori, attr_id, NULL, NULL)) { ++ DBG_871X("rtw_get_p2p_attr: GOT P2P_ATTR:%u!!!!!!!!\n", attr_id); ++ dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); ++ } ++ #endif ++ ++ p2p_ielen=rtw_p2p_attr_remove(p2p_ie, p2p_ielen_ori, attr_id); ++ if(p2p_ielen != p2p_ielen_ori) { ++ ++ u8 *next_ie_ori = p2p_ie+p2p_ielen_ori; ++ u8 *next_ie = p2p_ie+p2p_ielen; ++ uint remain_len = bss_ex->IELength-(next_ie_ori-bss_ex->IEs); ++ ++ _rtw_memcpy(next_ie, next_ie_ori, remain_len); ++ _rtw_memset(next_ie+remain_len, 0, p2p_ielen_ori-p2p_ielen); ++ bss_ex->IELength -= p2p_ielen_ori-p2p_ielen; ++ ++ #if 0 ++ DBG_871X("remove P2P_ATTR:%u!\n", attr_id); ++ dump_ies(bss_ex->IEs+_FIXED_IE_LENGTH_, bss_ex->IELength-_FIXED_IE_LENGTH_); ++ #endif ++ } ++ } ++} ++ ++#ifdef CONFIG_WFD ++int rtw_get_wfd_ie(u8 *in_ie, uint in_len, u8 *wfd_ie, uint *wfd_ielen) ++{ ++ int match; ++ uint cnt = 0; ++ u8 eid, wfd_oui[4]={0x50,0x6F,0x9A,0x0A}; ++ ++ ++ match=_FALSE; ++ while(cnt 1 byte for attribute ID field, 2 bytes for length field ++ if(attr_content) ++ _rtw_memcpy( attr_content, &wfd_ie[ cnt + 3 ], attrlen ); ++ ++ if(attr_contentlen) ++ *attr_contentlen = attrlen; ++ ++ cnt += attrlen + 3; ++ ++ match = _TRUE; ++ break; ++ } ++ else ++ { ++ cnt += attrlen + 3; //goto next ++ } ++ ++ } ++ ++ return match; ++ ++} ++#endif // CONFIG_WFD ++#endif // CONFIG_P2P ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_io.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_io.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,490 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/* ++ ++The purpose of rtw_io.c ++ ++a. provides the API ++ ++b. provides the protocol engine ++ ++c. provides the software interface between caller and the hardware interface ++ ++ ++Compiler Flag Option: ++ ++1. CONFIG_SDIO_HCI: ++ a. USE_SYNC_IRP: Only sync operations are provided. ++ b. USE_ASYNC_IRP:Both sync/async operations are provided. ++ ++2. CONFIG_USB_HCI: ++ a. USE_ASYNC_IRP: Both sync/async operations are provided. ++ ++3. CONFIG_CFIO_HCI: ++ b. USE_SYNC_IRP: Only sync operations are provided. ++ ++ ++Only sync read/rtw_write_mem operations are provided. ++ ++jackson@realtek.com.tw ++ ++*/ ++ ++#define _RTW_IO_C_ ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++ ++u8 _rtw_read8(_adapter *adapter, u32 addr) ++{ ++ u8 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read8 = pintfhdl->io_ops._read8; ++ ++ r_val = _read8(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++} ++ ++u16 _rtw_read16(_adapter *adapter, u32 addr) ++{ ++ u16 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read16 = pintfhdl->io_ops._read16; ++ ++ r_val = _read16(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++} ++ ++u32 _rtw_read32(_adapter *adapter, u32 addr) ++{ ++ u32 r_val; ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); ++ _func_enter_; ++ _read32 = pintfhdl->io_ops._read32; ++ ++ r_val = _read32(pintfhdl, addr); ++ _func_exit_; ++ return r_val; ++ ++} ++ ++int _rtw_write8(_adapter *adapter, u32 addr, u8 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int ret; ++ _func_enter_; ++ _write8 = pintfhdl->io_ops._write8; ++ ++ ret = _write8(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write16(_adapter *adapter, u32 addr, u16 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int ret; ++ _func_enter_; ++ _write16 = pintfhdl->io_ops._write16; ++ ++ ret = _write16(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write32(_adapter *adapter, u32 addr, u32 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int ret; ++ _func_enter_; ++ _write32 = pintfhdl->io_ops._write32; ++ ++ ret = _write32(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++ ++int _rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *pdata) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = (struct intf_hdl*)(&(pio_priv->intf)); ++ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr,u32 length, u8 *pdata); ++ int ret; ++ _func_enter_; ++ _writeN = pintfhdl->io_ops._writeN; ++ ++ ret = _writeN(pintfhdl, addr,length,pdata); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ int ret; ++ _func_enter_; ++ _write8_async = pintfhdl->io_ops._write8_async; ++ ++ ret = _write8_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ int ret; ++ _func_enter_; ++ _write16_async = pintfhdl->io_ops._write16_async; ++ ++ ret = _write16_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val) ++{ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ int ret; ++ _func_enter_; ++ _write32_async = pintfhdl->io_ops._write32_async; ++ ++ ret = _write32_async(pintfhdl, addr, val); ++ _func_exit_; ++ ++ return RTW_STATUS_CODE(ret); ++} ++void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) ++ { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return; ++ } ++ ++ _read_mem = pintfhdl->io_ops._read_mem; ++ ++ _read_mem(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ _write_mem = pintfhdl->io_ops._write_mem; ++ ++ _write_mem(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ if( (adapter->bDriverStopped ==_TRUE) || (adapter->bSurpriseRemoved == _TRUE)) ++ { ++ RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return; ++ } ++ ++ _read_port = pintfhdl->io_ops._read_port; ++ ++ _read_port(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++void _rtw_read_port_cancel(_adapter *adapter) ++{ ++ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _read_port_cancel = pintfhdl->io_ops._read_port_cancel; ++ ++ if(_read_port_cancel) ++ _read_port_cancel(pintfhdl); ++ ++} ++ ++void _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ _write_port = pintfhdl->io_ops._write_port; ++ ++ _write_port(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++} ++ ++int _rtw_write_port_sync(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem) ++{ ++ int (*_write_port_sync)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ int ret = _SUCCESS; ++ ++ _func_enter_; ++ ++ _write_port_sync = pintfhdl->io_ops._write_port_sync; ++ ++ if(_write_port_sync) ++ ret = _write_port_sync(pintfhdl, addr, cnt, pmem); ++ else ++ ret = _FAIL; ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++void _rtw_write_port_cancel(_adapter *adapter) ++{ ++ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _write_port_cancel = pintfhdl->io_ops._write_port_cancel; ++ ++ if(_write_port_cancel) ++ _write_port_cancel(pintfhdl); ++ ++} ++ ++ ++void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ _attrib_read= pintfhdl->io_ops._attrib_read; ++ ++ _attrib_read(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++#endif ++} ++ ++void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem){ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ //struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ struct io_priv *pio_priv = &adapter->iopriv; ++ struct intf_hdl *pintfhdl = &(pio_priv->intf); ++ ++ _func_enter_; ++ ++ _attrib_write= pintfhdl->io_ops._attrib_write; ++ ++ _attrib_write(pintfhdl, addr, cnt, pmem); ++ ++ _func_exit_; ++ ++#endif ++} ++ ++int rtw_init_io_priv(_adapter *padapter) ++{ ++ void (*set_intf_ops)(struct _io_ops *pops); ++ struct io_priv *piopriv = &padapter->iopriv; ++ struct intf_hdl *pintf = &piopriv->intf; ++ ++ piopriv->padapter = padapter; ++ pintf->padapter = padapter; ++ pintf->pintf_dev = &padapter->dvobjpriv; ++ ++ ++#ifdef CONFIG_SDIO_HCI ++ set_intf_ops = &sdio_set_intf_ops; ++#endif //END OF CONFIG_SDIO_HCI ++ ++ ++#ifdef CONFIG_USB_HCI ++ ++ if(padapter->chip_type == RTL8188C_8192C) ++ { ++#ifdef CONFIG_RTL8192C ++ set_intf_ops = &rtl8192cu_set_intf_ops; ++#endif ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++#ifdef CONFIG_RTL8192D ++ set_intf_ops = &rtl8192du_set_intf_ops; ++#endif ++ } ++ else ++ { ++ set_intf_ops = NULL; ++ } ++#endif //END OF CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++ ++ if(padapter->chip_type == RTL8188C_8192C) ++ { ++#ifdef CONFIG_RTL8192C ++ set_intf_ops = &rtl8192ce_set_intf_ops; ++#endif ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++#ifdef CONFIG_RTL8192D ++ set_intf_ops = &rtl8192de_set_intf_ops; ++#endif ++ } ++ else ++ { ++ set_intf_ops = NULL; ++ } ++#endif //END OF CONFIG_PCI_HCI ++ ++ ++ if(set_intf_ops==NULL) ++ return _FAIL; ++ ++ set_intf_ops(&pintf->io_ops); ++ ++ return _SUCCESS; ++ ++} ++ ++#ifdef DBG_IO ++int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line) ++{ ++ if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val); ++ ++ return _rtw_write8(adapter, addr, val); ++} ++int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line) ++{ ++ if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val); ++ ++ return _rtw_write16(adapter, addr, val); ++} ++int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line) ++{ ++ if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val); ++ ++ return _rtw_write32(adapter, addr, val); ++} ++int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line) ++{ ++ if(addr + length> DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length); ++ ++ return _rtw_writeN(adapter, addr, length, data); ++} ++#endif ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_query.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_query.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,197 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_IOCTL_QUERY_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_WINDOWS ++// ++// Added for WPA2-PSK, by Annie, 2005-09-20. ++// ++u8 ++query_802_11_capability( ++ _adapter* Adapter, ++ u8* pucBuf, ++ u32 * pulOutLen ++) ++{ ++ static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = ++ { ++ {Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled}, ++ {Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled}, ++ {Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled}, ++ {Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled}, ++ {Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled}, ++ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled}, ++ {Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled} ++ }; ++ static ULONG ulNumOfPairSupported = sizeof(szAuthEnc)/sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); ++ NDIS_802_11_CAPABILITY * pCap = (NDIS_802_11_CAPABILITY *)pucBuf; ++ u8* pucAuthEncryptionSupported = (u8*) pCap->AuthenticationEncryptionSupported; ++ ++ ++ pCap->Length = sizeof(NDIS_802_11_CAPABILITY); ++ if(ulNumOfPairSupported > 1 ) ++ pCap->Length += (ulNumOfPairSupported-1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION); ++ ++ pCap->Version = 2; ++ pCap->NoOfPMKIDs = NUM_PMKID_CACHE; ++ pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported; ++ ++ if( sizeof (szAuthEnc) <= 240 ) // 240 = 256 - 4*4 // SecurityInfo.szCapability: only 256 bytes in size. ++ { ++ _rtw_memcpy( pucAuthEncryptionSupported, (u8*)szAuthEnc, sizeof (szAuthEnc) ); ++ *pulOutLen = pCap->Length; ++ return _TRUE; ++ } ++ else ++ { ++ *pulOutLen = 0; ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("_query_802_11_capability(): szAuthEnc size is too large.\n")); ++ return _FALSE; ++ } ++} ++ ++u8 query_802_11_association_information( _adapter *padapter,PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo) ++{ ++ struct wlan_network *tgt_network; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *psecnetwork=(WLAN_BSSID_EX*)&(psecuritypriv->sec_bss); ++ u8 * pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ unsigned char i,*auth_ie,*supp_ie; ++ ++ //NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); ++ _rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); ++ //pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ ++ //------------------------------------------------------ ++ // Association Request related information ++ //------------------------------------------------------ ++ // Req_1. AvailableRequestFixedIEs ++ if(psecnetwork!=NULL){ ++ ++ pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES|NDIS_802_11_AI_REQFI_CURRENTAPADDRESS; ++ pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short)* & psecnetwork->IEs[10]; ++ _rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress, ++ & psecnetwork->MacAddress, 6); ++ ++ pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); ++ ++ if(check_fwstate( pmlmepriv, _FW_UNDER_LINKING|_FW_LINKED)==_TRUE) ++ { ++ ++ if(psecuritypriv->ndisauthtype>=Ndis802_11AuthModeWPA2) ++ pDest[0] =48; //RSN Information Element ++ else ++ pDest[0] =221; //WPA(SSN) Information Element ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]",pDest[0])); ++ supp_ie=&psecuritypriv->supplicant_ie[0]; ++ for(i=0;inetwork.IELength=%d\n\n", i,(int)psecnetwork->IELength)); ++ while((iRequestIELength += (2 + supp_ie[1+i]);// (2 + psecnetwork->IEs[1+i]+4); ++ ++ } ++ ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING \n")); ++ ++ } ++ ++ ++ //------------------------------------------------------ ++ // Association Response related information ++ //------------------------------------------------------ ++ ++ if(check_fwstate( pmlmepriv, _FW_LINKED)==_TRUE) ++ { ++ tgt_network =&(pmlmepriv->cur_network); ++ if(tgt_network!=NULL){ ++ pAssocInfo->AvailableResponseFixedIEs = ++ NDIS_802_11_AI_RESFI_CAPABILITIES ++ |NDIS_802_11_AI_RESFI_ASSOCIATIONID ++ ; ++ ++ pAssocInfo->ResponseFixedIEs.Capabilities =(unsigned short)* & tgt_network->network.IEs[10]; ++ pAssocInfo->ResponseFixedIEs.StatusCode = 0; ++ pAssocInfo->ResponseFixedIEs.AssociationId =(unsigned short) tgt_network->aid; ++ ++ pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)+pAssocInfo->RequestIELength; ++ auth_ie=&psecuritypriv->authenticator_ie[0]; ++ ++ for(i=0;i0){ ++ _rtw_memcpy((u8 *)&pDest[0],&auth_ie[1],i); ++ pAssocInfo->ResponseIELength =i; ++ } ++ ++ ++ pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength; ++ ++ ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n tgt_network != NULL,fwstate==_FW_LINKED \n")); ++ } ++ } ++ RT_TRACE(_module_rtl871x_ioctl_query_c_,_drv_info_,("\n exit query_802_11_association_information \n")); ++_func_exit_; ++ ++ return _TRUE; ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_rtl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_rtl.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1032 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_IOCTL_RTL_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#ifdef CONFIG_MP_INCLUDED ++#include ++#include ++#endif ++ ++struct oid_obj_priv oid_rtl_seg_01_01[] = ++{ ++ {1, &oid_null_function}, //0x80 ++ {1, &oid_null_function}, //0x81 ++ {1, &oid_null_function}, //0x82 ++ {1, &oid_null_function}, //0x83//OID_RT_SET_SNIFFER_MODE ++ {1, &oid_rt_get_signal_quality_hdl}, //0x84 ++ {1, &oid_rt_get_small_packet_crc_hdl}, //0x85 ++ {1, &oid_rt_get_middle_packet_crc_hdl}, //0x86 ++ {1, &oid_rt_get_large_packet_crc_hdl}, //0x87 ++ {1, &oid_rt_get_tx_retry_hdl}, //0x88 ++ {1, &oid_rt_get_rx_retry_hdl}, //0x89 ++ {1, &oid_rt_pro_set_fw_dig_state_hdl}, //0x8A ++ {1, &oid_rt_pro_set_fw_ra_state_hdl} , //0x8B ++ {1, &oid_null_function}, //0x8C ++ {1, &oid_null_function}, //0x8D ++ {1, &oid_null_function}, //0x8E ++ {1, &oid_null_function}, //0x8F ++ {1, &oid_rt_get_rx_total_packet_hdl}, //0x90 ++ {1, &oid_rt_get_tx_beacon_ok_hdl}, //0x91 ++ {1, &oid_rt_get_tx_beacon_err_hdl}, //0x92 ++ {1, &oid_rt_get_rx_icv_err_hdl}, //0x93 ++ {1, &oid_rt_set_encryption_algorithm_hdl}, //0x94 ++ {1, &oid_null_function}, //0x95 ++ {1, &oid_rt_get_preamble_mode_hdl}, //0x96 ++ {1, &oid_null_function}, //0x97 ++ {1, &oid_rt_get_ap_ip_hdl}, //0x98 ++ {1, &oid_rt_get_channelplan_hdl}, //0x99 ++ {1, &oid_rt_set_preamble_mode_hdl}, //0x9A ++ {1, &oid_rt_set_bcn_intvl_hdl}, //0x9B ++ {1, &oid_null_function}, //0x9C ++ {1, &oid_rt_dedicate_probe_hdl}, //0x9D ++ {1, &oid_null_function}, //0x9E ++ {1, &oid_null_function}, //0x9F ++ {1, &oid_null_function}, //0xA0 ++ {1, &oid_null_function}, //0xA1 ++ {1, &oid_null_function}, //0xA2 ++ {1, &oid_null_function}, //0xA3 ++ {1, &oid_null_function}, //0xA4 ++ {1, &oid_null_function}, //0xA5 ++ {1, &oid_null_function}, //0xA6 ++ {1, &oid_rt_get_total_tx_bytes_hdl}, //0xA7 ++ {1, &oid_rt_get_total_rx_bytes_hdl}, //0xA8 ++ {1, &oid_rt_current_tx_power_level_hdl}, //0xA9 ++ {1, &oid_rt_get_enc_key_mismatch_count_hdl}, //0xAA ++ {1, &oid_rt_get_enc_key_match_count_hdl}, //0xAB ++ {1, &oid_rt_get_channel_hdl}, //0xAC ++ {1, &oid_rt_set_channelplan_hdl}, //0xAD ++ {1, &oid_rt_get_hardware_radio_off_hdl}, //0xAE ++ {1, &oid_null_function}, //0xAF ++ {1, &oid_null_function}, //0xB0 ++ {1, &oid_null_function}, //0xB1 ++ {1, &oid_null_function}, //0xB2 ++ {1, &oid_null_function}, //0xB3 ++ {1, &oid_rt_get_key_mismatch_hdl}, //0xB4 ++ {1, &oid_null_function}, //0xB5 ++ {1, &oid_null_function}, //0xB6 ++ {1, &oid_null_function}, //0xB7 ++ {1, &oid_null_function}, //0xB8 ++ {1, &oid_null_function}, //0xB9 ++ {1, &oid_null_function}, //0xBA ++ {1, &oid_rt_supported_wireless_mode_hdl}, //0xBB ++ {1, &oid_rt_get_channel_list_hdl}, //0xBC ++ {1, &oid_rt_get_scan_in_progress_hdl}, //0xBD ++ {1, &oid_null_function}, //0xBE ++ {1, &oid_null_function}, //0xBF ++ {1, &oid_null_function}, //0xC0 ++ {1, &oid_rt_forced_data_rate_hdl}, //0xC1 ++ {1, &oid_rt_wireless_mode_for_scan_list_hdl}, //0xC2 ++ {1, &oid_rt_get_bss_wireless_mode_hdl}, //0xC3 ++ {1, &oid_rt_scan_with_magic_packet_hdl}, //0xC4 ++ {1, &oid_null_function}, //0xC5 ++ {1, &oid_null_function}, //0xC6 ++ {1, &oid_null_function}, //0xC7 ++ {1, &oid_null_function}, //0xC8 ++ {1, &oid_null_function}, //0xC9 ++ {1, &oid_null_function}, //0xCA ++ {1, &oid_null_function}, //0xCB ++ {1, &oid_null_function}, //0xCC ++ {1, &oid_null_function}, //0xCD ++ {1, &oid_null_function}, //0xCE ++ {1, &oid_null_function}, //0xCF ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_01_03[] = ++{ ++ {1, &oid_rt_ap_get_associated_station_list_hdl}, //0x00 ++ {1, &oid_null_function}, //0x01 ++ {1, &oid_rt_ap_switch_into_ap_mode_hdl}, //0x02 ++ {1, &oid_null_function}, //0x03 ++ {1, &oid_rt_ap_supported_hdl}, //0x04 ++ {1, &oid_rt_ap_set_passphrase_hdl}, //0x05 ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_01_11[] = ++{ ++ {1, &oid_null_function}, //0xC0 OID_RT_PRO_RX_FILTER ++ {1, &oid_null_function}, //0xC1 OID_CE_USB_WRITE_REGISTRY ++ {1, &oid_null_function}, //0xC2 OID_CE_USB_READ_REGISTRY ++ {1, &oid_null_function}, //0xC3 OID_RT_PRO_SET_INITIAL_GAIN ++ {1, &oid_null_function}, //0xC4 OID_RT_PRO_SET_BB_RF_STANDBY_MODE ++ {1, &oid_null_function}, //0xC5 OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE ++ {1, &oid_null_function}, //0xC6 OID_RT_PRO_SET_TX_CHARGE_PUMP ++ {1, &oid_null_function}, //0xC7 OID_RT_PRO_SET_RX_CHARGE_PUMP ++ {1, &oid_rt_pro_rf_write_registry_hdl}, //0xC8 ++ {1, &oid_rt_pro_rf_read_registry_hdl}, //0xC9 ++ {1, &oid_null_function} //0xCA OID_RT_PRO_QUERY_RF_TYPE ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_03_00[] = ++{ ++ {1, &oid_null_function}, //0x00 ++ {1, &oid_rt_get_connect_state_hdl}, //0x01 ++ {1, &oid_null_function}, //0x02 ++ {1, &oid_null_function}, //0x03 ++ {1, &oid_rt_set_default_key_id_hdl}, //0x04 ++ ++ ++}; ++ ++ ++//************** oid_rtl_seg_01_01 section start ************** ++ ++NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ ++ _func_enter_; ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) ++ { ++ //DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); ++ if(!rtw_setfwdig_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ ++ _func_enter_; ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ ++ if(poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) ++ { ++ //DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf ))); ++ if(!rtw_setfwra_cmd(Adapter,*((unsigned char*)poid_par_priv->information_buf ))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ //DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl \n")); ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++#if 0 ++ if(pMgntInfo->mAssoc || pMgntInfo->mIbss) ++ { ++ ulInfo = pAdapter->RxStats.SignalQuality; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ ulInfo = 0xffffffff; // It stands for -1 in 4-byte integer. ++ } ++ break; ++#endif ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++ ++NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG) ) ++ { ++ *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(u32)) ++ { ++ //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); ++ *(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG preamblemode = 0 ; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ if(padapter->registrypriv.preamble == PREAMBLE_LONG) ++ preamblemode = 0; ++ else if (padapter->registrypriv.preamble == PREAMBLE_AUTO) ++ preamblemode = 1; ++ else if (padapter->registrypriv.preamble == PREAMBLE_SHORT) ++ preamblemode = 2; ++ ++ ++ *(ULONG *)poid_par_priv->information_buf = preamblemode ; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct eeprom_priv* peeprompriv = &padapter->eeprompriv; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ *(u16 *)poid_par_priv->information_buf = peeprompriv->channel_plan ; ++ ++ return status; ++} ++NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct eeprom_priv* peeprompriv = &padapter->eeprompriv; ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ peeprompriv->channel_plan = *(u16 *)poid_par_priv->information_buf ; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG preamblemode = 0; ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ preamblemode = *(ULONG *)poid_par_priv->information_buf ; ++ if( preamblemode == 0) ++ padapter->registrypriv.preamble = PREAMBLE_LONG; ++ else if (preamblemode==1 ) ++ padapter->registrypriv.preamble = PREAMBLE_AUTO; ++ else if ( preamblemode==2 ) ++ padapter->registrypriv.preamble = PREAMBLE_SHORT; ++ ++ *(ULONG *)poid_par_priv->information_buf = preamblemode ; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ *(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len>= sizeof(ULONG)) ++ { ++ //_rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); ++ *(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else ++ { ++ status = NDIS_STATUS_INVALID_LENGTH ; ++ } ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ NDIS_802_11_CONFIGURATION *pnic_Config; ++ ++ ULONG channelnum; ++ ++ _func_enter_; ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ pnic_Config = &pmlmepriv->cur_network.network.Configuration; ++ else ++ pnic_Config = &padapter->registrypriv.dev_network.Configuration; ++ ++ channelnum = pnic_Config->DSConfig; ++ *(ULONG *)poid_par_priv->information_buf = channelnum; ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ _func_exit_; ++ ++ ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ULONG ulInfo = 0 ; ++ //DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl \n")); ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if(poid_par_priv->information_buf_len >= sizeof(ULONG)){ ++ ulInfo |= 0x0100; //WIRELESS_MODE_B ++ ulInfo |= 0x0200; //WIRELESS_MODE_G ++ ulInfo |= 0x0400; //WIRELESS_MODE_A ++ ++ *(ULONG *) poid_par_priv->information_buf = ulInfo; ++ //DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } ++ else{ ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++ ++NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++//************** oid_rtl_seg_01_01 section end ************** ++ ++//************** oid_rtl_seg_01_03 section start ************** ++NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ return status; ++} ++NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++ ++//************** oid_rtl_seg_01_03 section end ************** ++ ++//**************** oid_rtl_seg_01_11 section start **************** ++NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ _func_enter_; ++ //DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl \n")); ++ if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) ++ { ++ //RegOffsetValue - The offset of RF register to write. ++ //RegDataWidth - The data width of RF register to write. ++ //RegDataValue - The value to write. ++ //RegOffsetValue = *((unsigned long*)InformationBuffer); ++ //RegDataWidth = *((unsigned long*)InformationBuffer+1); ++ //RegDataValue = *((unsigned long*)InformationBuffer+2); ++ if(!rtw_setrfreg_cmd(Adapter, ++ *(unsigned char*)poid_par_priv->information_buf, ++ (unsigned long)(*((unsigned long*)poid_par_priv->information_buf+2)))) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ } ++ else{ ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ _func_enter_; ++ ++ //DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl \n")); ++ if(poid_par_priv->type_of_oid != SET_OID) //QUERY_OID ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ if(poid_par_priv->information_buf_len== (sizeof(unsigned long)*3)) ++ { ++ if(Adapter->mppriv.act_in_progress == _TRUE) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ else ++ { ++ //init workparam ++ Adapter->mppriv.act_in_progress = _TRUE; ++ Adapter->mppriv.workparam.bcompleted= _FALSE; ++ Adapter->mppriv.workparam.act_type = MPT_READ_RF; ++ Adapter->mppriv.workparam.io_offset = *(unsigned long*)poid_par_priv->information_buf; ++ Adapter->mppriv.workparam.io_value = 0xcccccccc; ++ ++ //RegOffsetValue - The offset of RF register to read. ++ //RegDataWidth - The data width of RF register to read. ++ //RegDataValue - The value to read. ++ //RegOffsetValue = *((unsigned long*)InformationBuffer); ++ //RegDataWidth = *((unsigned long*)InformationBuffer+1); ++ //RegDataValue = *((unsigned long*)InformationBuffer+2); ++ if(!rtw_getrfreg_cmd(Adapter, ++ *(unsigned char*)poid_par_priv->information_buf, ++ (unsigned char*)&Adapter->mppriv.workparam.io_value)) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ } ++ ++ ++ } ++ else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ _irqlevel_changed_(&oldirql,RAISE); ++ _func_exit_; ++#endif ++ return status; ++} ++ ++//**************** oid_rtl_seg_01_11 section end**************** ++ ++ ++//************** oid_rtl_seg_03_00 section start ************** ++enum _CONNECT_STATE_{ ++ CHECKINGSTATUS, ++ ASSOCIATED, ++ ADHOCMODE, ++ NOTASSOCIATED ++}; ++ ++NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ULONG ulInfo; ++ ++ if(poid_par_priv->type_of_oid != QUERY_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ // nStatus==0 CheckingStatus ++ // nStatus==1 Associated ++ // nStatus==2 AdHocMode ++ // nStatus==3 NotAssociated ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) ++ ulInfo = CHECKINGSTATUS; ++ else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ ulInfo = ASSOCIATED; ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)== _TRUE) ++ ulInfo = ADHOCMODE; ++ else ++ ulInfo = NOTASSOCIATED ; ++ ++ *(ULONG *)poid_par_priv->information_buf = ulInfo; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++#if 0 ++ // Rearrange the order to let the UI still shows connection when scan is in progress ++ RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("===> Query OID_RT_GET_CONNECT_STATE.\n")); ++ if(pMgntInfo->mAssoc) ++ ulInfo = 1; ++ else if(pMgntInfo->mIbss) ++ ulInfo = 2; ++ else if(pMgntInfo->bScanInProgress) ++ ulInfo = 0; ++ else ++ ulInfo = 3; ++ ulInfoLen = sizeof(ULONG); ++ RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("<=== Query OID_RT_GET_CONNECT_STATE: %d\n", ulInfo)); ++#endif ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ if(poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ return status; ++} ++//************** oid_rtl_seg_03_00 section end ************** +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_set.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ioctl_set.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1426 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_IOCTL_SET_C_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#include ++#endif ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++ ++#define IS_MAC_ADDRESS_BROADCAST(addr) \ ++( \ ++ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ ++ (addr[2] == 0xff) && (addr[3] == 0xff) && \ ++ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ++) ++ ++u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid) ++{ ++ u8 i; ++ u8 ret=_TRUE; ++ ++_func_enter_; ++ ++ if (ssid->SsidLength > 32) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid length >32\n")); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++ for(i = 0; i < ssid->SsidLength; i++) ++ { ++ //wifi, printable ascii code must be supported ++ if(!( (ssid->Ssid[i] >= 0x20) && (ssid->Ssid[i] <= 0x7e) )){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ("ssid has nonprintabl ascii\n")); ++ ret= _FALSE; ++ break; ++ } ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_do_join(_adapter * padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8* pibss = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("\n rtw_do_join: phead = %p; plist = %p \n\n\n", phead, plist)); ++ ++ pmlmepriv->cur_network.join_res = -2; ++ ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ pmlmepriv->pscanned = plist; ++ ++ pmlmepriv->to_join = _TRUE; ++ ++ if(_rtw_queue_empty(queue)== _TRUE) ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ //when set_ssid/set_bssid for rtw_do_join(), but scanning queue is empty ++ //we try to issue sitesurvey firstly ++ ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE ++ #ifdef CONFIG_LAYER2_ROAMING ++ || pmlmepriv->to_roaming >0 ++ #endif ++ ) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_do_join(): site survey if scanned_queue is empty\n.")); ++ // submit site_survey_cmd ++ if(_SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1)) ) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_do_join(): site survey return error\n.")); ++ } ++ } ++ ++ goto exit; ++ } ++ else ++ { ++ int select_ret; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ if((select_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))==_SUCCESS) ++ { ++ pmlmepriv->to_join = _FALSE; ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ } ++ else if(ret == 2)//there is no need to wait for join ++ { ++ ret = _SUCCESS; ++ clr_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(padapter); ++ } ++ else ++ { ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) ++ { ++ // submit createbss_cmd to change to a ADHOC_MASTER ++ ++ //pmlmepriv->lock has been acquired by caller... ++ WLAN_BSSID_EX *pdev_network = &(padapter->registrypriv.dev_network); ++ ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ ++ pibss = padapter->registrypriv.dev_network.MacAddress; ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(padapter); ++ ++ rtw_generate_random_ibss(pibss); ++ ++ if(rtw_createbss_cmd(padapter)!=_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>do_goin: rtw_createbss_cmd status FAIL*** \n ")); ++ ret = _FALSE; ++ goto exit; ++ } ++ ++ pmlmepriv->to_join = _FALSE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("***Error=> rtw_select_and_join_from_scanned_queue FAIL under STA_Mode*** \n ")); ++ ++ } ++ else ++ { ++ // can't associate ; reset under-linking ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++#if 0 ++ if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) ++ { ++ if(_rtw_memcmp(pmlmepriv->cur_network.network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) ++ { ++ // for funk to do roaming ++ // funk will reconnect, but funk will not sitesurvey before reconnect ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("for funk to do roaming")); ++ if(pmlmepriv->sitesurveyctrl.traffic_busy==_FALSE) ++ rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1); ++ } ++ ++ } ++#endif ++ ++ //when set_ssid/set_bssid for rtw_do_join(), but there are no desired bss in scanning queue ++ //we try to issue sitesurvey firstly ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic==_FALSE ++ #ifdef CONFIG_LAYER2_ROAMING ++ || pmlmepriv->to_roaming >0 ++ #endif ++ ) ++ { ++ //DBG_8192C("rtw_do_join() when no desired bss in scanning queue \n"); ++ if( _SUCCESS!=(ret=rtw_sitesurvey_cmd(padapter, &pmlmepriv->assoc_ssid, 1)) ){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("do_join(): site survey return error\n.")); ++ } ++ } ++ ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++#ifdef PLATFORM_WINDOWS ++u8 rtw_pnp_set_power_wakeup(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_wakeup!!!\n")); ++ ++ res = rtw_setstandby_cmd(padapter, 0); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_wakeup!!!\n")); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_pnp_set_power_sleep(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("==>rtw_pnp_set_power_sleep!!!\n")); ++ //DbgPrint("+rtw_pnp_set_power_sleep\n"); ++ ++ res = rtw_setstandby_cmd(padapter, 1); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<==rtw_pnp_set_power_sleep!!!\n")); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults) ++{ ++_func_enter_; ++ ++ switch( reloadDefaults) ++ { ++ case Ndis802_11ReloadWEPKeys: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("SetInfo OID_802_11_RELOAD_DEFAULTS : Ndis802_11ReloadWEPKeys\n")); ++ break; ++ } ++ ++ // SecClearAllKeys(Adapter); ++ // 8711 CAM was not for En/Decrypt only ++ // so, we can't clear all keys. ++ // should we disable WPAcfg (ox0088) bit 1-2, instead of clear all CAM ++ ++ //TO DO... ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++u8 set_802_11_test(_adapter* padapter, NDIS_802_11_TEST *test) ++{ ++ u8 ret=_TRUE; ++ ++_func_enter_; ++ ++ switch(test->Type) ++ { ++ case 1: ++ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->AuthenticationEvent, test->Length - 8); ++ NdisMIndicateStatusComplete(padapter->hndis_adapter); ++ break; ++ ++ case 2: ++ NdisMIndicateStatus(padapter->hndis_adapter, NDIS_STATUS_MEDIA_SPECIFIC_INDICATION, (PVOID)&test->RssiTrigger, sizeof(NDIS_802_11_RSSI)); ++ NdisMIndicateStatusComplete(padapter->hndis_adapter); ++ break; ++ ++ default: ++ ret=_FALSE; ++ break; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_pmkid(_adapter* padapter, NDIS_802_11_PMKID *pmkid) ++{ ++ u8 ret=_SUCCESS; ++ ++ return ret; ++} ++ ++#endif ++ ++u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid) ++{ ++ _irqL irqL; ++ u8 status=_SUCCESS; ++ u32 cur_time = 0; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_, ++ ("+rtw_set_802_11_bssid: bssid="MAC_FMT"\n", MAC_ARG(bssid) )); ++ ++ if ((bssid[0]==0x00 && bssid[1]==0x00 && bssid[2]==0x00 && bssid[3]==0x00 && bssid[4]==0x00 &&bssid[5]==0x00) || ++ (bssid[0]==0xFF && bssid[1]==0xFF && bssid[2]==0xFF && bssid[3]==0xFF && bssid[4]==0xFF &&bssid[5]==0xFF)) ++ { ++ status = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ DBG_871X("Set BSSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ goto handle_tkip_countermeasure; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ goto release_mlme_lock; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ("set_bssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); ++ ++ if (_rtw_memcmp(&pmlmepriv->cur_network.network.MacAddress, bssid, ETH_ALEN) == _TRUE) ++ { ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE) ++ goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. ++ } else { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set BSSID not the same bssid\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_bssid="MAC_FMT"\n", MAC_ARG(bssid) )); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("cur_bssid="MAC_FMT"\n", MAC_ARG(pmlmepriv->cur_network.network.MacAddress) )); ++ ++ rtw_disassoc_cmd(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ } ++ ++handle_tkip_countermeasure: ++ //should we add something here...? ++ ++#ifdef PLATFORM_LINUX ++ if (padapter->securitypriv.btkip_countermeasure == _TRUE) { ++ cur_time = rtw_get_current_time(); ++ ++ if( (cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ ) ++ { ++ padapter->securitypriv.btkip_countermeasure = _FALSE; ++ padapter->securitypriv.btkip_countermeasure_time = 0; ++ } ++ else ++ { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ } ++#endif ++ ++ _rtw_memcpy(&pmlmepriv->assoc_bssid, bssid, ETH_ALEN); ++ pmlmepriv->assoc_by_bssid=_TRUE; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ pmlmepriv->to_join = _TRUE; ++ } ++ else { ++ status = rtw_do_join(padapter); ++ } ++ ++release_mlme_lock: ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("rtw_set_802_11_bssid: status=%d\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++u8 rtw_set_802_11_ssid(_adapter* padapter, NDIS_802_11_SSID *ssid) ++{ ++ _irqL irqL; ++ u8 status = _SUCCESS; ++ u32 cur_time = 0; ++ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *pnetwork = &pmlmepriv->cur_network; ++ ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_notice_, ++ ("+rtw_set_802_11_ssid: ssid=[%s] fw_state=0x%08x\n", ++ ssid->Ssid, get_fwstate(pmlmepriv))); ++ ++ if(padapter->hw_init_completed==_FALSE){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("set_ssid: hw_init_completed==_FALSE=>exit!!!\n")); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ DBG_871X("Set SSID under fw_state=0x%08x\n", get_fwstate(pmlmepriv)); ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ goto handle_tkip_countermeasure; ++ } else if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) { ++ goto release_mlme_lock; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_info_, ++ ("set_ssid: _FW_LINKED||WIFI_ADHOC_MASTER_STATE\n")); ++ ++ if ((pmlmepriv->assoc_ssid.SsidLength == ssid->SsidLength) && ++ (_rtw_memcmp(&pmlmepriv->assoc_ssid.Ssid, ssid->Ssid, ssid->SsidLength) == _TRUE)) ++ { ++ if((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("Set SSID is the same ssid, fw_state=0x%08x\n", ++ get_fwstate(pmlmepriv))); ++ ++ if(rtw_is_same_ibss(padapter, pnetwork) == _FALSE) ++ { ++ //if in WIFI_ADHOC_MASTER_STATE | WIFI_ADHOC_STATE, create bss or rejoin again ++ rtw_disassoc_cmd(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ else ++ { ++ goto release_mlme_lock;//it means driver is in WIFI_ADHOC_MASTER_STATE, we needn't create bss again. ++ } ++ } ++#ifdef CONFIG_LPS ++ else { ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_JOINBSS, 1); ++ } ++#endif ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("Set SSID not the same ssid\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_ssid=[%s] len=0x%x\n", ssid->Ssid, (unsigned int)ssid->SsidLength)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("assoc_ssid=[%s] len=0x%x\n", pmlmepriv->assoc_ssid.Ssid, (unsigned int)pmlmepriv->assoc_ssid.SsidLength)); ++ ++ rtw_disassoc_cmd(padapter); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ ++ if (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) { ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ } ++ } ++ ++handle_tkip_countermeasure: ++#ifdef PLATFORM_WINDOWS ++ if (padapter->securitypriv.btkip_countermeasure==_TRUE) ++ { ++ LARGE_INTEGER sys_time; ++ u32 diff_time,cur_time ; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:padapter->securitypriv.btkip_countermeasure==_TRUE\n")); ++ NdisGetCurrentSystemTime(&sys_time); ++ cur_time=(u32)(sys_time.QuadPart/10); // In micro-second. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:cur_time=0x%x\n",cur_time)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:psecuritypriv->last_mic_err_time=0x%x\n",padapter->securitypriv.btkip_countermeasure_time)); ++ diff_time = cur_time -padapter->securitypriv.btkip_countermeasure_time; // In micro-second. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid:diff_time=0x%x\n",diff_time)); ++ ++ if (diff_time > 60000000) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid(): countermeasure time >60s.\n")); ++ padapter->securitypriv.btkip_countermeasure=_FALSE; ++ // Update MIC error time. ++ padapter->securitypriv.btkip_countermeasure_time=0; ++ } else { ++ // can't join in 60 seconds. ++ status = _FAIL; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_ssid(): countermeasure time <60s.\n")); ++ goto release_mlme_lock; ++ } ++ } ++#endif ++ ++#ifdef PLATFORM_LINUX ++ if (padapter->securitypriv.btkip_countermeasure == _TRUE) { ++ cur_time = rtw_get_current_time(); ++ ++ if( (cur_time - padapter->securitypriv.btkip_countermeasure_time) > 60 * HZ ) ++ { ++ padapter->securitypriv.btkip_countermeasure = _FALSE; ++ padapter->securitypriv.btkip_countermeasure_time = 0; ++ } ++ else ++ { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ } ++#endif ++ ++ #ifdef CONFIG_VALIDATE_SSID ++ if (rtw_validate_ssid(ssid) == _FALSE) { ++ status = _FAIL; ++ goto release_mlme_lock; ++ } ++ #endif ++ ++ _rtw_memcpy(&pmlmepriv->assoc_ssid, ssid, sizeof(NDIS_802_11_SSID)); ++ pmlmepriv->assoc_by_bssid=_FALSE; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) { ++ pmlmepriv->to_join = _TRUE; ++ } ++ else { ++ status = rtw_do_join(padapter); ++ } ++ ++release_mlme_lock: ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++exit: ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_err_, ++ ("-rtw_set_802_11_ssid: status=%d\n", status)); ++ ++_func_exit_; ++ ++ return status; ++ ++} ++ ++u8 rtw_set_802_11_infrastructure_mode(_adapter* padapter, ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networktype) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &pmlmepriv->cur_network; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE* pold_state = &(cur_network->network.InfrastructureMode); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_notice_, ++ ("+rtw_set_802_11_infrastructure_mode: old=%d new=%d fw_state=0x%08x\n", ++ *pold_state, networktype, get_fwstate(pmlmepriv))); ++ ++ if(*pold_state != networktype) ++ { ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,(" change mode!")); ++ //DBG_871X("change mode, old_mode=%d, new_mode=%d, fw_state=0x%x\n", *pold_state, networktype, get_fwstate(pmlmepriv)); ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ||(*pold_state==Ndis802_11IBSS)) ++ rtw_disassoc_cmd(padapter); ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)== _TRUE) ) ++ rtw_free_assoc_resources(padapter, 1); ++ ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) || (*pold_state==Ndis802_11Infrastructure) ||(*pold_state==Ndis802_11IBSS)) ++ { ++ rtw_indicate_disconnect(padapter); //will clr Linked_state; before this function, we must have chked whether issue dis-assoc_cmd or not ++ } ++ ++ if(*pold_state==Ndis802_11APMode) ++ { ++ //change to other mode from Ndis802_11APMode ++ cur_network->join_res = -1; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ stop_ap_mode(padapter); ++#endif ++ } ++ ++ *pold_state = networktype; ++ ++ // clear WIFI_STATION_STATE; WIFI_AP_STATE; WIFI_ADHOC_STATE; WIFI_ADHOC_MASTER_STATE ++ //pmlmepriv->fw_state &= 0xffffff87; ++ _clr_fwstate_(pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE); ++ ++ switch(networktype) ++ { ++ case Ndis802_11IBSS: ++ set_fwstate(pmlmepriv, WIFI_ADHOC_STATE); ++ break; ++ ++ case Ndis802_11Infrastructure: ++ set_fwstate(pmlmepriv, WIFI_STATION_STATE); ++ break; ++ ++ case Ndis802_11APMode: ++ set_fwstate(pmlmepriv, WIFI_AP_STATE); ++#ifdef CONFIG_NATIVEAP_MLME ++ start_ap_mode(padapter); ++ //rtw_indicate_connect(padapter); ++#endif ++ ++ break; ++ ++ case Ndis802_11AutoUnknown: ++ case Ndis802_11InfrastructureMax: ++ break; ++ } ++ ++ //SecClearAllKeys(adapter); ++ ++ //RT_TRACE(COMP_OID_SET, DBG_LOUD, ("set_infrastructure: fw_state:%x after changing mode\n", ++ // get_fwstate(pmlmepriv) )); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ } ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++ ++u8 rtw_set_802_11_disassociate(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct mlme_priv * pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_disassociate: rtw_indicate_disconnect\n")); ++ ++ rtw_disassoc_cmd(padapter); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++_func_exit_; ++ ++ return _TRUE; ++} ++ ++u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ u8 res=_TRUE; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("+rtw_set_802_11_bssid_list_scan(), fw_state=%x\n", get_fwstate(pmlmepriv))); ++ ++ if (padapter == NULL) { ++ res=_FALSE; ++ goto exit; ++ } ++ if (padapter->hw_init_completed==_FALSE){ ++ res = _FALSE; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n===rtw_set_802_11_bssid_list_scan:hw_init_completed==_FALSE===\n")); ++ goto exit; ++ } ++ ++ if ((check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || ++ (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE)) ++ { ++ // Scan or linking is in progress, do nothing. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_bssid_list_scan fail since fw_state = %x\n", get_fwstate(pmlmepriv))); ++ res = _TRUE; ++ ++ if(check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))== _TRUE){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###_FW_UNDER_SURVEY|_FW_UNDER_LINKING\n\n")); ++ } else { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n###pmlmepriv->sitesurveyctrl.traffic_busy==_TRUE\n\n")); ++ } ++ } else { ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ if(ATOMIC_READ(&pmlmepriv->set_scan_deny)==1){ ++ DBG_871X("%s:%d CONFIG_SET_SCAN_DENY_TIMER deny scan\n", __FUNCTION__, __LINE__); ++ indicate_wx_scan_complete_event(padapter); ++ return _SUCCESS; ++ } ++ #endif ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ res = rtw_sitesurvey_cmd(padapter, NULL, 0); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ } ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtw_set_802_11_authentication_mode(_adapter* padapter, NDIS_802_11_AUTHENTICATION_MODE authmode) ++{ ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ int res; ++ u8 ret; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("set_802_11_auth.mode(): mode=%x\n", authmode)); ++ ++ psecuritypriv->ndisauthtype=authmode; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_authentication_mode:psecuritypriv->ndisauthtype=%d", psecuritypriv->ndisauthtype)); ++ ++ if(psecuritypriv->ndisauthtype>3) ++ psecuritypriv->dot11AuthAlgrthm=dot11AuthAlgrthm_8021X; ++ ++ res=rtw_set_auth(padapter,psecuritypriv); ++ ++ if(res==_SUCCESS) ++ ret=_TRUE; ++ else ++ ret=_FALSE; ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_add_wep(_adapter* padapter, NDIS_802_11_WEP *wep){ ++ ++ u8 bdefaultkey; ++ u8 btransmitkey; ++ sint keyid,res; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ bdefaultkey=(wep->KeyIndex & 0x40000000) > 0 ? _FALSE : _TRUE; //for ??? ++ btransmitkey= (wep->KeyIndex & 0x80000000) > 0 ? _TRUE : _FALSE; //for ??? ++ keyid=wep->KeyIndex & 0x3fffffff; ++ ++ if(keyid>4) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MgntActrtw_set_802_11_add_wep:keyid>4=>fail\n")); ++ ret=_FALSE; ++ goto exit; ++ } ++ ++ switch(wep->KeyLength) ++ { ++ case 5: ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=5\n")); ++ break; ++ case 13: ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength=13\n")); ++ break; ++ default: ++ psecuritypriv->dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("MgntActrtw_set_802_11_add_wep:wep->KeyLength!=5 or 13\n")); ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:befor memcpy, wep->KeyLength=0x%x wep->KeyIndex=0x%x keyid =%x\n",wep->KeyLength,wep->KeyIndex,keyid)); ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[keyid].skey[0]),&(wep->KeyMaterial),wep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[keyid]=wep->KeyLength; ++ ++ psecuritypriv->dot11PrivacyKeyIndex=keyid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_wep:security key material : %x %x %x %x %x %x %x %x %x %x %x %x %x \n", ++ psecuritypriv->dot11DefKey[keyid].skey[0],psecuritypriv->dot11DefKey[keyid].skey[1],psecuritypriv->dot11DefKey[keyid].skey[2], ++ psecuritypriv->dot11DefKey[keyid].skey[3],psecuritypriv->dot11DefKey[keyid].skey[4],psecuritypriv->dot11DefKey[keyid].skey[5], ++ psecuritypriv->dot11DefKey[keyid].skey[6],psecuritypriv->dot11DefKey[keyid].skey[7],psecuritypriv->dot11DefKey[keyid].skey[8], ++ psecuritypriv->dot11DefKey[keyid].skey[9],psecuritypriv->dot11DefKey[keyid].skey[10],psecuritypriv->dot11DefKey[keyid].skey[11], ++ psecuritypriv->dot11DefKey[keyid].skey[12])); ++ ++ res=rtw_set_key(padapter,psecuritypriv, keyid, 1); ++ ++ if(res==_FAIL) ++ ret= _FALSE; ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++u8 rtw_set_802_11_remove_wep(_adapter* padapter, u32 keyindex){ ++ ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (keyindex >= 0x80000000 || padapter == NULL){ ++ ++ ret=_FALSE; ++ goto exit; ++ ++ } ++ else ++ { ++ int res; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ if( keyindex < 4 ){ ++ ++ _rtw_memset(&psecuritypriv->dot11DefKey[keyindex], 0, 16); ++ ++ res=rtw_set_key(padapter,psecuritypriv,keyindex, 0); ++ ++ psecuritypriv->dot11DefKeylen[keyindex]=0; ++ ++ if(res==_FAIL) ++ ret=_FAIL; ++ ++ } ++ else ++ { ++ ret=_FAIL; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++u8 rtw_set_802_11_add_key(_adapter* padapter, NDIS_802_11_KEY *key){ ++ ++ uint encryptionalgo; ++ u8 * pbssid; ++ struct sta_info *stainfo; ++ u8 bgroup = _FALSE; ++ u8 bgrouptkey = _FALSE;//can be remove later ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (((key->KeyIndex & 0x80000000) == 0) && ((key->KeyIndex & 0x40000000) > 0)){ ++ ++ // It is invalid to clear bit 31 and set bit 30. If the miniport driver encounters this combination, ++ // it must fail the request and return NDIS_STATUS_INVALID_DATA. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: ((key->KeyIndex & 0x80000000) == 0)[=%d] ",(int)(key->KeyIndex & 0x80000000) == 0)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key:((key->KeyIndex & 0x40000000) > 0)[=%d]" , (int)(key->KeyIndex & 0x40000000) > 0)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_info_,("rtw_set_802_11_add_key: key->KeyIndex=%d \n" ,(int)key->KeyIndex)); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if(key->KeyIndex & 0x40000000) ++ { ++ // Pairwise key ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Pairwise key +++++\n")); ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv, pbssid); ++ ++ if((stainfo!=NULL)&&(padapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:( stainfo!=NULL)&&(Adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X)\n")); ++ encryptionalgo=stainfo->dot118021XPrivacy; ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: stainfo==NULL)||(Adapter->securitypriv.dot11AuthAlgrthm!=dot11AuthAlgrthm_8021X)\n")); ++ encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (encryptionalgo ==%d)!\n",encryptionalgo )); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11PrivacyAlgrthm ==%d)!\n",padapter->securitypriv.dot11PrivacyAlgrthm)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (Adapter->securitypriv.dot11AuthAlgrthm ==%d)!\n",padapter->securitypriv.dot11AuthAlgrthm)); ++ ++ if((stainfo!=NULL)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("rtw_set_802_11_add_key: (stainfo->dot118021XPrivacy ==%d)!\n", stainfo->dot118021XPrivacy)); ++ } ++ ++ if(key->KeyIndex & 0x000000FF){ ++ // The key index is specified in the lower 8 bits by values of zero to 255. ++ // The key index should be set to zero for a Pairwise key, and the driver should fail with ++ // NDIS_STATUS_INVALID_DATA if the lower 8 bits is not zero ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" key->KeyIndex & 0x000000FF.\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // check BSSID ++ if (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _TRUE){ ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("MacAddr_isBcst(key->BSSID)\n")); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++ // Check key length for TKIP. ++ //if(encryptionAlgorithm == RT_ENC_TKIP_ENCRYPTION && key->KeyLength != 32) ++ if((encryptionalgo== _TKIP_)&& (key->KeyLength != 32)){ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("TKIP KeyLength:0x%x != 32\n", key->KeyLength)); ++ ret=_FAIL; ++ goto exit; ++ ++ } ++ ++ // Check key length for AES. ++ if((encryptionalgo== _AES_)&& (key->KeyLength != 16)) { ++ // For our supplicant, EAPPkt9x.vxd, cannot differentiate TKIP and AES case. ++ if(key->KeyLength == 32) { ++ key->KeyLength = 16; ++ } else { ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ ++ // Check key length for WEP. For NDTEST, 2005.01.27, by rcnjko. ++ if( (encryptionalgo== _WEP40_|| encryptionalgo== _WEP104_) && (key->KeyLength != 5 || key->KeyLength != 13)) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("WEP KeyLength:0x%x != 5 or 13\n", key->KeyLength)); ++ ret=_FAIL; ++ goto exit; ++ } ++ ++ bgroup = _FALSE; ++ ++ // Check the pairwise key. Added by Annie, 2005-07-06. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Pairwise Key set]\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ ++ } ++ else ++ { ++ // Group key - KeyIndex(BIT30==0) ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ Group key +++++\n")); ++ ++ ++ // when add wep key through add key and didn't assigned encryption type before ++ if((padapter->securitypriv.ndisauthtype<=3)&&(padapter->securitypriv.dot118021XGrpPrivacy==0)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("keylen=%d( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )padapter->securitypriv.dot118021XGrpPrivacy(%x)\n", key->KeyLength,padapter->securitypriv.dot11PrivacyAlgrthm,padapter->securitypriv.dot118021XGrpPrivacy)); ++ ++ switch(key->KeyLength) ++ { ++ case 5: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ case 13: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u\n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ default: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("Adapter->securitypriv.dot11PrivacyAlgrthm= %x key->KeyLength=%u \n", padapter->securitypriv.dot11PrivacyAlgrthm,key->KeyLength)); ++ break; ++ } ++ ++ encryptionalgo=padapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" Adapter->securitypriv.dot11PrivacyAlgrthm=%x\n", padapter->securitypriv.dot11PrivacyAlgrthm)); ++ ++ } ++ else ++ { ++ encryptionalgo=padapter->securitypriv.dot118021XGrpPrivacy; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("( Adapter->securitypriv.dot11PrivacyAlgrthm=%x )encryptionalgo(%x)=padapter->securitypriv.dot118021XGrpPrivacy(%x)keylen=%d\n", padapter->securitypriv.dot11PrivacyAlgrthm,encryptionalgo,padapter->securitypriv.dot118021XGrpPrivacy,key->KeyLength)); ++ ++ } ++ ++ if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE) && (IS_MAC_ADDRESS_BROADCAST(key->BSSID) == _FALSE)) { ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" IBSS but BSSID is not Broadcast Address.\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // Check key length for TKIP ++ if((encryptionalgo== _TKIP_) && (key->KeyLength != 32)) { ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,(" TKIP GTK KeyLength:%u != 32\n", key->KeyLength)); ++ ret= _FAIL; ++ goto exit; ++ ++ } else if(encryptionalgo== _AES_ && (key->KeyLength != 16 && key->KeyLength != 32) ) { ++ ++ // Check key length for AES ++ // For NDTEST, we allow keylen=32 in this case. 2005.01.27, by rcnjko. ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("<=== SetInfo, OID_802_11_ADD_KEY: AES GTK KeyLength:%u != 16 or 32\n", key->KeyLength)); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // Change the key length for EAPPkt9x.vxd. Added by Annie, 2005-11-03. ++ if((encryptionalgo== _AES_) && (key->KeyLength == 32) ) { ++ key->KeyLength = 16; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("AES key length changed: %u\n", key->KeyLength) ); ++ } ++ ++ if(key->KeyIndex & 0x8000000) {//error ??? 0x8000_0000 ++ bgrouptkey = _TRUE; ++ } ++ ++ if((check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE)==_TRUE)&&(check_fwstate(&padapter->mlmepriv, _FW_LINKED)==_TRUE)) ++ { ++ bgrouptkey = _TRUE; ++ } ++ ++ bgroup = _TRUE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n") ); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("[Group Key set]\n") ); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")) ; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key index: 0x%8x(0x%8x)\n", key->KeyIndex,(key->KeyIndex&0x3))); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("key Length: %d\n", key->KeyLength)) ; ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("------------------------------------------\n")); ++ ++ } ++ ++ // If WEP encryption algorithm, just call rtw_set_802_11_add_wep(). ++ if((padapter->securitypriv.dot11AuthAlgrthm !=dot11AuthAlgrthm_8021X)&&(encryptionalgo== _WEP40_ || encryptionalgo== _WEP104_)) ++ { ++ u8 ret; ++ u32 keyindex; ++ u32 len = FIELD_OFFSET(NDIS_802_11_KEY, KeyMaterial) + key->KeyLength; ++ NDIS_802_11_WEP *wep = &padapter->securitypriv.ndiswep; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ WEP key +++++\n")); ++ ++ wep->Length = len; ++ keyindex = key->KeyIndex&0x7fffffff; ++ wep->KeyIndex = keyindex ; ++ wep->KeyLength = key->KeyLength; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY:Before memcpy \n")); ++ ++ _rtw_memcpy(wep->KeyMaterial, key->KeyMaterial, key->KeyLength); ++ _rtw_memcpy(&(padapter->securitypriv.dot11DefKey[keyindex].skey[0]), key->KeyMaterial, key->KeyLength); ++ ++ padapter->securitypriv.dot11DefKeylen[keyindex]=key->KeyLength; ++ padapter->securitypriv.dot11PrivacyKeyIndex=keyindex; ++ ++ ret = rtw_set_802_11_add_wep(padapter, wep); ++ ++ goto exit; ++ ++ } ++ ++ if(key->KeyIndex & 0x20000000){ ++ // SetRSC ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("OID_802_11_ADD_KEY: +++++ SetRSC+++++\n")); ++ if(bgroup == _TRUE) ++ { ++ NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; ++ _rtw_memcpy(&padapter->securitypriv.dot11Grprxpn, &keysrc, 8); ++ } ++ else ++ { ++ NDIS_802_11_KEY_RSC keysrc=key->KeyRSC & 0x00FFFFFFFFFFFFULL; ++ _rtw_memcpy(&padapter->securitypriv.dot11Grptxpn, &keysrc, 8); ++ } ++ ++ } ++ ++ // Indicate this key idx is used for TX ++ // Save the key in KeyMaterial ++ if(bgroup == _TRUE) // Group transmit key ++ { ++ int res; ++ ++ if(bgrouptkey == _TRUE) ++ { ++ padapter->securitypriv.dot118021XGrpKeyid=(u8)key->KeyIndex; ++ } ++ ++ if((key->KeyIndex&0x3) == 0){ ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ _rtw_memset(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ _rtw_memset(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], 0, 16); ++ ++ if((key->KeyIndex & 0x10000000)) ++ { ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); ++ ++ } ++ else ++ { ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrptxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 24, 8); ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial + 16, 8); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rx mic :0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[0],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[1], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[2],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[3], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[4],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[5], ++ padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex) & 0x03)].skey[6],padapter->securitypriv.dot118021XGrprxmickey[(u8)((key->KeyIndex-1) & 0x03)].skey[7])); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:set Group mic key!!!!!!!!\n")); ++ ++ } ++ ++ //set group key by index ++ _rtw_memcpy(&padapter->securitypriv.dot118021XGrpKey[(u8)((key->KeyIndex) & 0x03)], key->KeyMaterial, key->KeyLength); ++ ++ key->KeyIndex=key->KeyIndex & 0x03; ++ ++ padapter->securitypriv.binstallGrpkey=_TRUE; ++ ++ padapter->securitypriv.bcheck_grpkey=_FALSE; ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("reset group key")); ++ ++ res=rtw_set_key(padapter,&padapter->securitypriv, key->KeyIndex, 1); ++ ++ if(res==_FAIL) ++ ret= _FAIL; ++ ++ goto exit; ++ ++ } ++ else // Pairwise Key ++ { ++ u8 res; ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); ++ ++ if(stainfo!=NULL) ++ { ++ _rtw_memset( &stainfo->dot118021x_UncstKey, 0, 16);// clear keybuffer ++ ++ _rtw_memcpy(&stainfo->dot118021x_UncstKey, key->KeyMaterial, 16); ++ ++ if(encryptionalgo== _TKIP_) ++ { ++ padapter->securitypriv.busetkipkey=_FALSE; ++ ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n ==========_set_timer\n")); ++ ++ // if TKIP, save the Receive/Transmit MIC key in KeyMaterial[128-255] ++ if((key->KeyIndex & 0x10000000)){ ++ _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 16, 8); ++ _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 24, 8); ++ ++ } else { ++ _rtw_memcpy(&stainfo->dot11tkiptxmickey, key->KeyMaterial + 24, 8); ++ _rtw_memcpy(&stainfo->dot11tkiprxmickey, key->KeyMaterial + 16, 8); ++ ++ } ++ ++ } ++ else if(encryptionalgo == _AES_) ++ { ++ ++ } ++ ++ ++ //Set key to CAM through H2C command ++ if(bgrouptkey)//never go to here ++ { ++ res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _FALSE); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(group)\n")); ++ } ++ else{ ++ res=rtw_setstakey_cmd(padapter, (unsigned char *)stainfo, _TRUE); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("\n rtw_set_802_11_add_key:rtw_setstakey_cmd(unicast)\n")); ++ } ++ ++ if(res ==_FALSE) ++ ret= _FAIL; ++ ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++u8 rtw_set_802_11_remove_key(_adapter* padapter, NDIS_802_11_REMOVE_KEY *key){ ++ ++ uint encryptionalgo; ++ u8 * pbssid; ++ struct sta_info *stainfo; ++ u8 bgroup = (key->KeyIndex & 0x4000000) > 0 ? _FALSE: _TRUE; ++ u8 keyIndex = (u8)key->KeyIndex & 0x03; ++ u8 ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if ((key->KeyIndex & 0xbffffffc) > 0) { ++ ret=_FAIL; ++ goto exit; ++ } ++ ++ if (bgroup == _TRUE) { ++ encryptionalgo= padapter->securitypriv.dot118021XGrpPrivacy; ++ // clear group key by index ++ //NdisZeroMemory(Adapter->MgntInfo.SecurityInfo.KeyBuf[keyIndex], MAX_WEP_KEY_LEN); ++ //Adapter->MgntInfo.SecurityInfo.KeyLen[keyIndex] = 0; ++ ++ _rtw_memset(&padapter->securitypriv.dot118021XGrpKey[keyIndex], 0, 16); ++ ++ //! \todo Send a H2C Command to Firmware for removing this Key in CAM Entry. ++ ++ } else { ++ ++ pbssid=get_bssid(&padapter->mlmepriv); ++ stainfo=rtw_get_stainfo(&padapter->stapriv , pbssid ); ++ if(stainfo !=NULL){ ++ encryptionalgo=stainfo->dot118021XPrivacy; ++ ++ // clear key by BSSID ++ _rtw_memset(&stainfo->dot118021x_UncstKey, 0, 16); ++ ++ //! \todo Send a H2C Command to Firmware for disable this Key in CAM Entry. ++ ++ } ++ else{ ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return _TRUE; ++ ++} ++ ++/* ++* rtw_get_network_max_rate - ++* @adapter: pointer to _adapter structure ++* @bss: ++* ++* Return 0 or Mbps ++*/ ++u16 rtw_get_network_max_rate(_adapter *adapter, WLAN_BSSID_EX *bss) ++{ ++ int i =0; ++ u8 *p; ++ u16 rate = 0, max_rate = 0, ht_cap=_FALSE; ++ u32 ht_ielen = 0; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ u8 bw_40MHz=0, short_GI=0; ++ u16 mcs_rate=0; ++ u8 rf_type = 0; ++ struct registry_priv *pregpriv = &adapter->registrypriv; ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ return 0; ++#endif ++ ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) ++ && (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE)) ++ return 0; ++ ++ ++ p = rtw_get_ie(&bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, bss->IELength-12); ++ if(p && ht_ielen>0) ++ { ++ ht_cap = _TRUE; ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); ++ ++ bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; ++ short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; ++ } ++ ++ while( (bss->SupportedRates[i]!=0) && (bss->SupportedRates[i]!=0xFF)) ++ { ++ rate = bss->SupportedRates[i]&0x7F; ++ if(rate>max_rate) ++ max_rate = rate; ++ i++; ++ } ++ ++ //TODO: should consider case of WEP and TKIP ++ if(ht_cap == _TRUE) ++ { ++ adapter->HalFunc.GetHwRegHandler(adapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_1T1R) ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ else ++ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); ++ } ++ else ++ { ++ max_rate/=2; ++ } ++ ++ return max_rate; ++} ++ ++/* ++* rtw_set_scan_mode - ++* @adapter: pointer to _adapter structure ++* @scan_mode: ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode) ++{ ++ if(scan_mode != SCAN_ACTIVE && scan_mode != SCAN_PASSIVE) ++ return _FAIL; ++ ++ adapter->mlmepriv.scan_mode = scan_mode; ++ ++ return _SUCCESS; ++} ++ ++/* ++* rtw_set_channel_plan - ++* @adapter: pointer to _adapter structure ++* @channel_plan: ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan) ++{ ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ //handle by cmd_thread to sync with scan operation ++ return rtw_set_chplan_cmd(adapter, channel_plan, 1); ++} ++ ++/* ++* rtw_set_country - ++* @adapter: pointer to _adapter structure ++* @country_code: string of country code ++* ++* Return _SUCCESS or _FAIL ++*/ ++int rtw_set_country(_adapter *adapter, const char *country_code) ++{ ++ int channel_plan = RT_CHANNEL_DOMAIN_FCC; ++ ++ //TODO: should have a table to match country code and RT_CHANNEL_DOMAIN ++ //TODO: should consider 2-character and 3-character counter code ++ if(0 == strcmp(country_code, "US")) ++ channel_plan = RT_CHANNEL_DOMAIN_FCC; ++ else if(0 == strcmp(country_code, "EU")) ++ channel_plan = RT_CHANNEL_DOMAIN_ETSI; ++ else if(0 == strcmp(country_code, "JP")) ++ channel_plan = RT_CHANNEL_DOMAIN_MKK; ++ else ++ DBG_871X("%s unknown country_code:%s\n", __FUNCTION__, country_code); ++ ++ return rtw_set_channel_plan(adapter, channel_plan); ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_iol.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_iol.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,266 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++ ++#ifdef CONFIG_IOL ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter) ++{ ++ struct xmit_frame *xmit_frame; ++ struct xmit_buf *xmitbuf; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(adapter->xmitpriv); ++ ++#if 1 ++ if ((xmit_frame = rtw_alloc_xmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s rtw_alloc_xmitframe return null\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ if ((xmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__); ++ rtw_free_xmitframe_ex(pxmitpriv, xmit_frame); ++ xmit_frame=NULL; ++ goto exit; ++ } ++ ++ xmit_frame->frame_tag = MGNT_FRAMETAG; ++ xmit_frame->pxmitbuf = xmitbuf; ++ xmit_frame->buf_addr = xmitbuf->pbuf; ++ xmitbuf->priv_data = xmit_frame; ++ ++ pattrib = &xmit_frame->attrib; ++ update_mgntframe_attrib(adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = 0; ++ ++#else ++ if ((xmit_frame = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s alloc_mgtxmitframe return null\n", __FUNCTION__); ++ } ++ else { ++ pattrib = &xmit_frame->attrib; ++ update_mgntframe_attrib(adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = 0; ++ } ++#endif ++ ++exit: ++ return xmit_frame; ++} ++ ++ ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len) ++{ ++ struct pkt_attrib *pattrib = &xmit_frame->attrib; ++ u16 buf_offset; ++ u32 ori_len; ++ ++//Todo: bulkout without this offset ++#ifdef CONFIG_USB_HCI ++ buf_offset = TXDESC_OFFSET; ++#else ++ buf_offset = 0; ++#endif ++ ++ ori_len = buf_offset+pattrib->pktlen; ++ ++ //check if the io_buf can accommodate new cmds ++ if(ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) { ++ DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__ ++ , ori_len + cmd_len + 8, MAX_XMITBUF_SZ); ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len); ++ pattrib->pktlen += cmd_len; ++ pattrib->last_txcmdsz += cmd_len; ++ ++ //DBG_871X("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); ++ ++ return _SUCCESS; ++} ++ ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)page_boundary); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0}; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0}; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0}; ++ u8* pos = (u8 *)&cmd; ++ ++ RTW_PUT_BE16((u8*)&cmd.address, (u16)addr); ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)value); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line) ++{ ++ if(addr + 1 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value); ++} ++ ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line) ++{ ++ if(addr + 2 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value); ++} ++ ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line) ++{ ++ if(addr + 4 > DBG_IO_WRITE_SNIFF_ADDR_START && addr <= DBG_IO_WRITE_SNIFF_ADDR_END) ++ DBG_871X("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value); ++ ++ return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value); ++} ++#endif ++ ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)us); ++ ++ //DBG_871X("%s %u\n", __FUNCTION__, us); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms) ++{ ++ IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0}; ++ ++ RTW_PUT_BE32((u8*)&cmd.value, (u32)ms); ++ ++ //DBG_871X("%s %u\n", __FUNCTION__, ms); ++ ++ return rtw_IOL_append_cmds(xmit_frame, (u8*)&cmd, 8); ++} ++ ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame) ++{ ++ struct pkt_attrib *pattrib = &xmit_frame->attrib; ++ u16 buf_offset; ++ u32 ori_len; ++ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; ++ ++//Todo: bulkout without this offset ++#ifdef CONFIG_USB_HCI ++ buf_offset = TXDESC_OFFSET; ++#else ++ buf_offset = 0; ++#endif ++ ++ ori_len = buf_offset+pattrib->pktlen; ++ ++ //check if the io_buf can accommodate new cmds ++ if(ori_len + 8 > MAX_XMITBUF_SZ) { ++ DBG_871X("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate end cmd\n", __FUNCTION__ ++ , ori_len + 8, MAX_XMITBUF_SZ); ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, (u8*)&end_cmd, 8); ++ pattrib->pktlen += 8; ++ pattrib->last_txcmdsz += 8; ++ ++ //DBG_871X("%s ori:%u + 8 = %u\n", __FUNCTION__ , ori_len, buf_offset+pattrib->pktlen); ++ ++ return _SUCCESS; ++} ++ ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) ++{ ++ if(adapter->HalFunc.IOL_exec_cmds_sync) ++ return adapter->HalFunc.IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); ++ ++ return _FAIL; ++} ++ ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms) ++{ ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(adapter)) == NULL) ++ return _FAIL; ++ ++ if(rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num<<3) == _FAIL) ++ return _FAIL; ++ ++ return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms); ++} ++ ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms) ++{ ++ IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0}; ++ return rtw_IOL_exec_cmd_array_sync(adapter, (u8*)&end_cmd, 1, max_wating_ms); ++} ++ ++bool rtw_IOL_applied(ADAPTER *adapter) ++{ ++ if(adapter->registrypriv.force_iol) ++ return _TRUE; ++ ++#ifdef CONFIG_USB_HCI ++ if(!adapter->dvobjpriv.ishighspeed) ++ return _TRUE; ++#endif ++ ++ return _FALSE; ++} ++ ++#endif //CONFIG_IOL ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mlme.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,3555 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_MLME_C_ ++ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++extern u8 rtw_do_join(_adapter * padapter); ++ ++sint _rtw_init_mlme_priv (_adapter* padapter) ++{ ++ sint i; ++ u8 *pbuf; ++ struct wlan_network *pnetwork; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ sint res = _SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((u8 *)pmlmepriv, 0, sizeof(struct mlme_priv)); ++ ++ pmlmepriv->nic_hdl = (u8 *)padapter; ++ ++ pmlmepriv->pscanned = NULL; ++ pmlmepriv->fw_state = 0; ++ pmlmepriv->cur_network.network.InfrastructureMode = Ndis802_11AutoUnknown; ++ pmlmepriv->scan_mode=SCAN_ACTIVE;// 1: active, 0: pasive. Maybe someday we should rename this varable to "active_mode" (Jeff) ++ ++ _rtw_spinlock_init(&(pmlmepriv->lock)); ++ _rtw_init_queue(&(pmlmepriv->free_bss_pool)); ++ _rtw_init_queue(&(pmlmepriv->scanned_queue)); ++ ++ set_scanned_network_val(pmlmepriv, 0); ++ ++ _rtw_memset(&pmlmepriv->assoc_ssid,0,sizeof(NDIS_802_11_SSID)); ++ ++ pbuf = rtw_zvmalloc(MAX_BSS_CNT * (sizeof(struct wlan_network))); ++ ++ if (pbuf == NULL){ ++ res=_FAIL; ++ goto exit; ++ } ++ pmlmepriv->free_bss_buf = pbuf; ++ ++ pnetwork = (struct wlan_network *)pbuf; ++ ++ for(i = 0; i < MAX_BSS_CNT; i++) ++ { ++ _rtw_init_listhead(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list), &(pmlmepriv->free_bss_pool.queue)); ++ ++ pnetwork++; ++ } ++ ++ //allocate DMA-able/Non-Page memory for cmd_buf and rsp_buf ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ ATOMIC_SET(&pmlmepriv->set_scan_deny, 0); ++ #endif ++ ++ rtw_init_mlme_timer(padapter); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_mfree_mlme_priv_lock (struct mlme_priv *pmlmepriv) ++{ ++ _rtw_spinlock_free(&pmlmepriv->lock); ++ _rtw_spinlock_free(&(pmlmepriv->free_bss_pool.lock)); ++ _rtw_spinlock_free(&(pmlmepriv->scanned_queue.lock)); ++} ++ ++static void rtw_free_mlme_ie_data(u8 **ppie, u32 *plen) ++{ ++ if(*ppie) ++ { ++ _rtw_mfree(*ppie, *plen); ++ *plen = 0; ++ *ppie=NULL; ++ } ++} ++ ++void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv) ++{ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_beacon_ie, &pmlmepriv->wps_beacon_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_req_ie, &pmlmepriv->wps_probe_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_probe_resp_ie, &pmlmepriv->wps_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->wps_assoc_resp_ie, &pmlmepriv->wps_assoc_resp_ie_len); ++ ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_beacon_ie, &pmlmepriv->p2p_beacon_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_req_ie, &pmlmepriv->p2p_probe_req_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_probe_resp_ie, &pmlmepriv->p2p_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_go_probe_resp_ie, &pmlmepriv->p2p_go_probe_resp_ie_len); ++ rtw_free_mlme_ie_data(&pmlmepriv->p2p_assoc_req_ie, &pmlmepriv->p2p_assoc_req_ie_len); ++#endif ++} ++ ++void _rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) ++{ ++_func_enter_; ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++ if(pmlmepriv){ ++ rtw_mfree_mlme_priv_lock (pmlmepriv); ++ ++ if (pmlmepriv->free_bss_buf) { ++ rtw_vmfree(pmlmepriv->free_bss_buf, MAX_BSS_CNT * sizeof(struct wlan_network)); ++ } ++ } ++_func_exit_; ++} ++ ++sint _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) ++{ ++ _irqL irqL; ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ rtw_list_insert_tail(&pnetwork->list, &queue->queue); ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct wlan_network *_rtw_dequeue_network(_queue *queue) ++{ ++ _irqL irqL; ++ ++ struct wlan_network *pnetwork; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(queue) == _TRUE) ++ ++ pnetwork = NULL; ++ ++ else ++ { ++ pnetwork = LIST_CONTAINOR(get_next(&queue->queue), struct wlan_network, list); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pnetwork; ++} ++ ++struct wlan_network *_rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) ++{ ++ _irqL irqL; ++ struct wlan_network *pnetwork; ++ _queue *free_queue = &pmlmepriv->free_bss_pool; ++ _list* plist = NULL; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(free_queue) == _TRUE) { ++ pnetwork=NULL; ++ goto exit; ++ } ++ plist = get_next(&(free_queue->queue)); ++ ++ pnetwork = LIST_CONTAINOR(plist , struct wlan_network, list); ++ ++ rtw_list_delete(&pnetwork->list); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("_rtw_alloc_network: ptr=%p\n", plist)); ++ pnetwork->network_type = 0; ++ pnetwork->fixed = _FALSE; ++ pnetwork->last_scanned = rtw_get_current_time(); ++ pnetwork->aid=0; ++ pnetwork->join_res=0; ++ ++ pmlmepriv->num_of_scanned ++; ++ ++exit: ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pnetwork; ++} ++ ++void _rtw_free_network(struct mlme_priv *pmlmepriv ,struct wlan_network *pnetwork, u8 isfreeall) ++{ ++ u32 curr_time, delta_time; ++ u32 lifetime = SCANQUEUE_LIFETIME; ++ _irqL irqL; ++ _queue *free_queue = &(pmlmepriv->free_bss_pool); ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ if (pnetwork->fixed == _TRUE) ++ goto exit; ++ ++ curr_time = rtw_get_current_time(); ++ ++ if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) ++ lifetime = 1; ++ ++ if(!isfreeall) ++ { ++#ifdef PLATFORM_WINDOWS ++ ++ delta_time = (curr_time -pnetwork->last_scanned)/10; ++ ++ if(delta_time < lifetime*1000000)// unit:usec ++ { ++ goto exit; ++ } ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++ ++ delta_time = (curr_time -pnetwork->last_scanned)/HZ; ++ ++ if(delta_time < lifetime)// unit:sec ++ { ++ goto exit; ++ } ++ ++#endif ++ } ++ ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list),&(free_queue->queue)); ++ ++ pmlmepriv->num_of_scanned --; ++ ++ ++ //DBG_871X("_rtw_free_network:SSID=%s\n", pnetwork->network.Ssid.Ssid); ++ ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork) ++{ ++ ++ _queue *free_queue = &(pmlmepriv->free_bss_pool); ++ ++_func_enter_; ++ ++ if (pnetwork == NULL) ++ goto exit; ++ ++ if (pnetwork->fixed == _TRUE) ++ goto exit; ++ ++ //_enter_critical(&free_queue->lock, &irqL); ++ ++ rtw_list_delete(&(pnetwork->list)); ++ ++ rtw_list_insert_tail(&(pnetwork->list), get_list_head(free_queue)); ++ ++ pmlmepriv->num_of_scanned --; ++ ++ //_exit_critical(&free_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++ return the wlan_network with the matching addr ++ ++ Shall be calle under atomic context... to avoid possible racing condition... ++*/ ++struct wlan_network *_rtw_find_network(_queue *scanned_queue, u8 *addr) ++{ ++ ++ //_irqL irqL; ++ _list *phead, *plist; ++ struct wlan_network *pnetwork = NULL; ++ u8 zero_addr[ETH_ALEN] = {0,0,0,0,0,0}; ++ ++_func_enter_; ++ ++ if(_rtw_memcmp(zero_addr, addr, ETH_ALEN)){ ++ pnetwork=NULL; ++ goto exit; ++ } ++ ++ //_enter_critical_bh(&scanned_queue->lock, &irqL); ++ ++ phead = get_list_head(scanned_queue); ++ plist = get_next(phead); ++ ++ while (plist != phead) ++ { ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network ,list); ++ ++ if (_rtw_memcmp(addr, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE) ++ break; ++ ++ plist = get_next(plist); ++ } ++ ++ if(plist == phead) ++ pnetwork = NULL; ++ ++ //_exit_critical_bh(&scanned_queue->lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++ return pnetwork; ++ ++} ++ ++ ++void _rtw_free_network_queue(_adapter *padapter, u8 isfreeall) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct wlan_network *pnetwork; ++ struct mlme_priv* pmlmepriv = &padapter->mlmepriv; ++ _queue *scanned_queue = &pmlmepriv->scanned_queue; ++ _queue *free_queue = &pmlmepriv->free_bss_pool; ++ u8 *mybssid = get_bssid(pmlmepriv); ++ ++_func_enter_; ++ ++ ++ _enter_critical_bh(&scanned_queue->lock, &irqL); ++ ++ phead = get_list_head(scanned_queue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ plist = get_next(plist); ++ ++ _rtw_free_network(pmlmepriv,pnetwork, isfreeall); ++ ++ } ++ ++ _exit_critical_bh(&scanned_queue->lock, &irqL); ++ ++_func_exit_; ++ ++} ++ ++ ++ ++ ++sint rtw_if_up(_adapter *padapter) { ++ ++ sint res; ++_func_enter_; ++ ++ if( padapter->bDriverStopped || padapter->bSurpriseRemoved || ++ (check_fwstate(&padapter->mlmepriv, _FW_LINKED)== _FALSE)){ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("rtw_if_up:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ res=_FALSE; ++ } ++ else ++ res= _TRUE; ++ ++_func_exit_; ++ return res; ++} ++ ++ ++void rtw_generate_random_ibss(u8* pibss) ++{ ++ u32 curtime = rtw_get_current_time(); ++ ++_func_enter_; ++ pibss[0] = 0x02; //in ad-hoc mode bit1 must set to 1 ++ pibss[1] = 0x11; ++ pibss[2] = 0x87; ++ pibss[3] = (u8)(curtime & 0xff) ;//p[0]; ++ pibss[4] = (u8)((curtime>>8) & 0xff) ;//p[1]; ++ pibss[5] = (u8)((curtime>>16) & 0xff) ;//p[2]; ++_func_exit_; ++ return; ++} ++ ++u8 *rtw_get_capability_from_ie(u8 *ie) ++{ ++ return (ie + 8 + 2); ++} ++ ++ ++u16 rtw_get_capability(WLAN_BSSID_EX *bss) ++{ ++ u16 val; ++_func_enter_; ++ ++ _rtw_memcpy((u8 *)&val, rtw_get_capability_from_ie(bss->IEs), 2); ++ ++_func_exit_; ++ return le16_to_cpu(val); ++} ++ ++u8 *rtw_get_timestampe_from_ie(u8 *ie) ++{ ++ return (ie + 0); ++} ++ ++u8 *rtw_get_beacon_interval_from_ie(u8 *ie) ++{ ++ return (ie + 8); ++} ++ ++ ++int rtw_init_mlme_priv (_adapter *padapter)//(struct mlme_priv *pmlmepriv) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_init_mlme_priv(padapter);// (pmlmepriv); ++_func_exit_; ++ return res; ++} ++ ++void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_mlme_priv\n")); ++ _rtw_free_mlme_priv (pmlmepriv); ++_func_exit_; ++} ++ ++int rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork) ++{ ++ int res; ++_func_enter_; ++ res = _rtw_enqueue_network(queue, pnetwork); ++_func_exit_; ++ return res; ++} ++ ++ ++ ++static struct wlan_network *rtw_dequeue_network(_queue *queue) ++{ ++ struct wlan_network *pnetwork; ++_func_enter_; ++ pnetwork = _rtw_dequeue_network(queue); ++_func_exit_; ++ return pnetwork; ++} ++ ++ ++struct wlan_network *rtw_alloc_network(struct mlme_priv *pmlmepriv )//(_queue *free_queue) ++{ ++ struct wlan_network *pnetwork; ++_func_enter_; ++ pnetwork = _rtw_alloc_network(pmlmepriv); ++_func_exit_; ++ return pnetwork; ++} ++ ++void rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 is_freeall)//(struct wlan_network *pnetwork, _queue *free_queue) ++{ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); ++ _rtw_free_network(pmlmepriv, pnetwork, is_freeall); ++_func_exit_; ++} ++ ++ ++void rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork ) ++{ ++_func_enter_; ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_network==> ssid = %s \n\n" , pnetwork->network.Ssid.Ssid)); ++ _rtw_free_network_nolock(pmlmepriv, pnetwork); ++_func_exit_; ++} ++ ++ ++void rtw_free_network_queue(_adapter* dev, u8 isfreeall) ++{ ++_func_enter_; ++ _rtw_free_network_queue(dev, isfreeall); ++_func_exit_; ++} ++ ++/* ++ return the wlan_network with the matching addr ++ ++ Shall be calle under atomic context... to avoid possible racing condition... ++*/ ++struct wlan_network *rtw_find_network(_queue *scanned_queue, u8 *addr) ++{ ++ struct wlan_network *pnetwork = _rtw_find_network(scanned_queue, addr); ++ ++ return pnetwork; ++} ++ ++int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork) ++{ ++ int ret=_TRUE; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ ++ if ( (psecuritypriv->dot11PrivacyAlgrthm != _NO_PRIVACY_ ) && ++ ( pnetwork->network.Privacy == 0 ) ) ++ { ++ ret=_FALSE; ++ } ++ else if((psecuritypriv->dot11PrivacyAlgrthm == _NO_PRIVACY_ ) && ++ ( pnetwork->network.Privacy == 1 ) ) ++ { ++ ret=_FALSE; ++ } ++ else ++ { ++ ret=_TRUE; ++ } ++ ++ return ret; ++ ++} ++ ++inline int is_same_ess(WLAN_BSSID_EX *a, WLAN_BSSID_EX *b) ++{ ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(%s,%d)(%s,%d)\n", ++ // a->Ssid.Ssid,a->Ssid.SsidLength,b->Ssid.Ssid,b->Ssid.SsidLength)); ++ return (a->Ssid.SsidLength == b->Ssid.SsidLength) ++ && _rtw_memcmp(a->Ssid.Ssid, b->Ssid.Ssid, a->Ssid.SsidLength)==_TRUE; ++} ++ ++static int is_same_network(WLAN_BSSID_EX *src, WLAN_BSSID_EX *dst) ++{ ++ u16 s_cap, d_cap; ++ ++_func_enter_; ++ ++#ifdef PLATFORM_OS_XP ++ if ( ((uint)dst) <= 0x7fffffff || ++ ((uint)src) <= 0x7fffffff || ++ ((uint)&s_cap) <= 0x7fffffff || ++ ((uint)&d_cap) <= 0x7fffffff) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n@@@@ error address of dst\n")); ++ ++ KeBugCheckEx(0x87110000, (ULONG_PTR)dst, (ULONG_PTR)src,(ULONG_PTR)&s_cap, (ULONG_PTR)&d_cap); ++ ++ return _FALSE; ++ } ++#endif ++ ++ ++ _rtw_memcpy((u8 *)&s_cap, rtw_get_capability_from_ie(src->IEs), 2); ++ _rtw_memcpy((u8 *)&d_cap, rtw_get_capability_from_ie(dst->IEs), 2); ++ ++ ++ s_cap = le16_to_cpu(s_cap); ++ d_cap = le16_to_cpu(d_cap); ++ ++_func_exit_; ++ ++ return ((src->Ssid.SsidLength == dst->Ssid.SsidLength) && ++ // (src->Configuration.DSConfig == dst->Configuration.DSConfig) && ++ ( (_rtw_memcmp(src->MacAddress, dst->MacAddress, ETH_ALEN)) == _TRUE) && ++ ( (_rtw_memcmp(src->Ssid.Ssid, dst->Ssid.Ssid, src->Ssid.SsidLength)) == _TRUE) && ++ ((s_cap & WLAN_CAPABILITY_IBSS) == ++ (d_cap & WLAN_CAPABILITY_IBSS)) && ++ ((s_cap & WLAN_CAPABILITY_BSS) == ++ (d_cap & WLAN_CAPABILITY_BSS))); ++ ++} ++ ++struct wlan_network * rtw_get_oldest_wlan_network(_queue *scanned_queue) ++{ ++ _list *plist, *phead; ++ ++ ++ struct wlan_network *pwlan = NULL; ++ struct wlan_network *oldest = NULL; ++_func_enter_; ++ phead = get_list_head(scanned_queue); ++ ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pwlan= LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if(pwlan->fixed!=_TRUE) ++ { ++ if (oldest == NULL ||time_after(oldest->last_scanned, pwlan->last_scanned)) ++ oldest = pwlan; ++ } ++ ++ plist = get_next(plist); ++ } ++_func_exit_; ++ return oldest; ++ ++} ++ ++static void update_network(WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src,_adapter * padapter) ++{ ++ u32 last_evm = 0, tmpVal; ++ u8 ss_ori = dst->PhyInfo.SignalStrength; ++ u8 sq_ori = dst->PhyInfo.SignalQuality; ++ long rssi_ori = dst->Rssi; ++ ++ u8 ss_smp = src->PhyInfo.SignalStrength; ++ u8 sq_smp = src->PhyInfo.SignalQuality; ++ long rssi_smp = src->Rssi; ++ ++_func_enter_; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ padapter->HalFunc.SwAntDivCompareHandler(padapter, dst, src); ++#endif ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 ++ if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X("%s %s("MAC_FMT", ch%u) ss_ori:%3u, sq_ori:%3u, rssi_ori:%3ld, ss_smp:%3u, sq_smp:%3u, rssi_smp:%3ld\n" ++ , __FUNCTION__ ++ , src->Ssid.Ssid, MAC_ARG(src->MacAddress), src->Configuration.DSConfig ++ ,ss_ori, sq_ori, rssi_ori ++ ,ss_smp, sq_smp, rssi_smp ++ ); ++ } ++ #endif ++ ++ ++ //Update signal strength first. Alwlays using the newest value will cause large vibration of scan result's signal strength ++ //The rule below is 1/5 for sample value, 4/5 for history value ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) { ++ //Because we've process the rx phy info in rtl8192c_process_phy_info/rtl8192d_process_phy_info, ++ //we can just take the recvpriv's value ++ src->PhyInfo.SignalStrength = padapter->recvpriv.signal_strength; ++ src->PhyInfo.SignalQuality = padapter->recvpriv.signal_qual; ++ // the rssi value here is undecorated, and will be used for antenna diversity ++ if(src->PhyInfo.SignalQuality != 101) ++ src->Rssi = (src->Rssi+dst->Rssi*4)/5; ++ else ++ src->Rssi = dst->Rssi; ++ } ++ else { ++ if(src->PhyInfo.SignalQuality != 101) { ++ // handle bss info receving from the right channel ++ src->PhyInfo.SignalStrength = ((u32)(src->PhyInfo.SignalStrength)+(u32)(dst->PhyInfo.SignalStrength)*4)/5; ++ src->PhyInfo.SignalQuality = ((u32)(src->PhyInfo.SignalQuality)+(u32)(dst->PhyInfo.SignalQuality)*4)/5; ++ src->Rssi = (src->Rssi+dst->Rssi*4)/5; // the rssi value here is undecorated, and will be used for antenna diversity ++ } else { ++ // bss info not receving from the right channel, use the original RX signal infos ++ src->PhyInfo.SignalStrength = dst->PhyInfo.SignalStrength; ++ src->PhyInfo.SignalQuality = dst->PhyInfo.SignalQuality; ++ src->Rssi = dst->Rssi; ++ } ++ ++ } ++ ++ ++ _rtw_memcpy((u8 *)dst, (u8 *)src, get_WLAN_BSSID_EX_sz(src)); ++ ++ src->PhyInfo.SignalStrength = ss_smp; ++ src->PhyInfo.SignalQuality = sq_smp; ++ src->Rssi = rssi_smp; ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 ++ if(strcmp(dst->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X("%s %s("MAC_FMT"), SignalStrength:%u, SignalQuality:%u, RawRSSI:%ld\n" ++ , __FUNCTION__ ++ , dst->Ssid.Ssid, MAC_ARG(dst->MacAddress), dst->PhyInfo.SignalStrength, dst->PhyInfo.SignalQuality, dst->Rssi); ++ } ++ #endif ++ ++#if 0 // old codes, may be useful one day... ++// DBG_8192C("update_network: rssi=0x%lx dst->Rssi=%d ,dst->Rssi=0x%lx , src->Rssi=0x%lx",(dst->Rssi+src->Rssi)/2,dst->Rssi,dst->Rssi,src->Rssi); ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) && is_same_network(&(padapter->mlmepriv.cur_network.network), src)) ++ { ++ ++ //DBG_8192C("b:ssid=%s update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Ssid.Ssid,src->Rssi,padapter->recvpriv.signal); ++ if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; ++ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; ++ padapter->recvpriv.signal_qual_data.total_val -= last_evm; ++ } ++ padapter->recvpriv.signal_qual_data.total_val += query_rx_pwr_percentage(src->Rssi); ++ ++ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = query_rx_pwr_percentage(src->Rssi); ++ if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ padapter->recvpriv.signal_qual_data.index = 0; ++ ++ //DBG_8192C("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, src->Rssi); ++ ++ // <1> Showed on UI for user,in percentage. ++ tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; ++ padapter->recvpriv.signal=(u8)tmpVal;//Link quality ++ ++ src->Rssi= translate_percentage_to_dbm(padapter->recvpriv.signal) ; ++ } ++ else{ ++// DBG_8192C("ELSE:ssid=%s update_network: src->rssi=0x%d dst->rssi=%d\n",src->Ssid.Ssid,src->Rssi,dst->Rssi); ++ src->Rssi=(src->Rssi +dst->Rssi)/2;//dBM ++ } ++ ++// DBG_8192C("a:update_network: src->rssi=0x%d padapter->recvpriv.ui_rssi=%d\n",src->Rssi,padapter->recvpriv.signal); ++ ++#endif ++ ++_func_exit_; ++} ++ ++static void update_current_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++_func_enter_; ++ ++#ifdef PLATFORM_OS_XP ++ if ((unsigned long)(&(pmlmepriv->cur_network.network)) < 0x7ffffff) ++ { ++ KeBugCheckEx(0x87111c1c, (ULONG_PTR)(&(pmlmepriv->cur_network.network)), 0, 0,0); ++ } ++#endif ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (is_same_network(&(pmlmepriv->cur_network.network), pnetwork))) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"Same Network\n"); ++ ++ //if(pmlmepriv->cur_network.network.IELength<= pnetwork->IELength) ++ { ++ update_network(&(pmlmepriv->cur_network.network), pnetwork,adapter); ++ rtw_update_protection(adapter, (pmlmepriv->cur_network.network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), ++ pmlmepriv->cur_network.network.IELength); ++ } ++ } ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++ ++Caller must hold pmlmepriv->lock first. ++ ++ ++*/ ++void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ ULONG bssid_ex_sz; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *oldest = NULL; ++ ++_func_enter_; ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ if ((unsigned long)(pnetwork) < 0x7ffffff) ++ { ++#ifdef PLATFORM_OS_XP ++ KeBugCheckEx(0x87111c1c, (ULONG_PTR)pnetwork, 0, 0,0); ++#endif ++ } ++ ++ if (is_same_network(&(pnetwork->network), target)) ++ break; ++ ++ if ((oldest == ((struct wlan_network *)0)) || ++ time_after(oldest->last_scanned, pnetwork->last_scanned)) ++ oldest = pnetwork; ++ ++ plist = get_next(plist); ++ ++ } ++ ++ ++ /* If we didn't find a match, then get a new network slot to initialize ++ * with this beacon's information */ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) { ++ ++ if (_rtw_queue_empty(&(pmlmepriv->free_bss_pool)) == _TRUE) { ++ /* If there are no more slots, expire the oldest */ ++ //list_del_init(&oldest->list); ++ pnetwork = oldest; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna;//optimum_antenna=>For antenna diversity ++ adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++#endif ++ _rtw_memcpy(&(pnetwork->network), target, get_WLAN_BSSID_EX_sz(target)); ++ pnetwork->last_scanned = rtw_get_current_time(); ++ //variable initialize ++ pnetwork->fixed = _FALSE; ++ pnetwork->last_scanned = rtw_get_current_time(); ++ ++ pnetwork->network_type = 0; ++ pnetwork->aid=0; ++ pnetwork->join_res=0; ++ } ++ else { ++ /* Otherwise just pull from the free list */ ++ ++ pnetwork = rtw_alloc_network(pmlmepriv); // will update scan_time ++ ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n\nsomething wrong here\n\n\n")); ++ goto exit; ++ } ++ ++ bssid_ex_sz = get_WLAN_BSSID_EX_sz(target); ++ target->Length = bssid_ex_sz; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //target->PhyInfo.Optimum_antenna = pHalData->CurAntenna; ++ adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(target->PhyInfo.Optimum_antenna)); ++#endif ++ _rtw_memcpy(&(pnetwork->network), target, bssid_ex_sz ); ++ ++ rtw_list_insert_tail(&(pnetwork->list),&(queue->queue)); ++ ++ } ++ } ++ else { ++ /* we have an entry and we are going to update it. But this entry may ++ * be already expired. In this case we do the same as we found a new ++ * net and call the new_net handler ++ */ ++ //target.Reserved[0]==1, means that scaned network is a bcn frame. ++ if((pnetwork->network.IELength>target->IELength) && (target->Reserved[0]==1)) ++ goto exit; ++ ++ update_network(&(pnetwork->network),target,adapter); ++ ++ pnetwork->last_scanned = rtw_get_current_time(); ++ ++ } ++ ++exit: ++ _exit_critical_bh(&queue->lock, &irqL); ++_func_exit_; ++ ++} ++ ++ ++void rtw_add_network(_adapter *adapter, WLAN_BSSID_EX *pnetwork) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(((_adapter *)adapter)->mlmepriv); ++ //_queue *queue = &(pmlmepriv->scanned_queue); ++ ++_func_enter_; ++ ++ //_enter_critical_bh(&queue->lock, &irqL); ++ ++ #if defined(CONFIG_P2P) && defined(CONFIG_P2P_REMOVE_GROUP_INFO) ++ rtw_WLAN_BSSID_EX_remove_p2p_attr(pnetwork, P2P_ATTR_GROUP_INFO); ++ #endif ++ ++ update_current_network(adapter, pnetwork); ++ ++ rtw_update_scanned_network(adapter, pnetwork); ++ ++ //_exit_critical_bh(&queue->lock, &irqL); ++ ++_func_exit_; ++} ++ ++//select the desired network based on the capability of the (i)bss. ++// check items: (1) security ++// (2) network_type ++// (3) WMM ++// (4) HT ++// (5) others ++int rtw_is_desired_network(_adapter *adapter, struct wlan_network *pnetwork) ++{ ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u32 desired_encmode; ++ u32 privacy; ++ ++ //u8 wps_ie[512]; ++ uint wps_ielen; ++ ++ int bselected = _TRUE; ++ ++ desired_encmode = psecuritypriv->ndisencryptstatus; ++ privacy = pnetwork->network.Privacy; ++ ++ if(psecuritypriv->wps_phase == _TRUE) ++ { ++ if(rtw_get_wps_ie(pnetwork->network.IEs+_FIXED_IE_LENGTH_, pnetwork->network.IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen)!=NULL) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++ } ++ if (adapter->registrypriv.wifi_spec == 1) //for correct flow of 8021X to do.... ++ { ++ if ((desired_encmode == Ndis802_11EncryptionDisabled) && (privacy != 0)) ++ bselected = _FALSE; ++ } ++ ++ ++ if ((desired_encmode != Ndis802_11EncryptionDisabled) && (privacy == 0)) { ++ DBG_871X("desired_encmode: %d, privacy: %d\n", desired_encmode, privacy); ++ bselected = _FALSE; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) ++ bselected = _FALSE; ++ } ++ ++ ++ return bselected; ++} ++ ++/* TODO: Perry : For Power Management */ ++void rtw_atimdone_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++_func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("receive atimdone_evet\n")); ++_func_exit_; ++ return; ++} ++ ++ ++void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ u32 len; ++ WLAN_BSSID_EX *pnetwork; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++_func_enter_; ++ ++ pnetwork = (WLAN_BSSID_EX *)pbuf; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_survey_event_callback, ssid=%s\n", pnetwork->Ssid.Ssid)); ++ ++#ifdef CONFIG_RTL8712 ++ //endian_convert ++ pnetwork->Length = le32_to_cpu(pnetwork->Length); ++ pnetwork->Ssid.SsidLength = le32_to_cpu(pnetwork->Ssid.SsidLength); ++ pnetwork->Privacy =le32_to_cpu( pnetwork->Privacy); ++ pnetwork->Rssi = le32_to_cpu(pnetwork->Rssi); ++ pnetwork->NetworkTypeInUse =le32_to_cpu(pnetwork->NetworkTypeInUse); ++ pnetwork->Configuration.ATIMWindow = le32_to_cpu(pnetwork->Configuration.ATIMWindow); ++ pnetwork->Configuration.BeaconPeriod = le32_to_cpu(pnetwork->Configuration.BeaconPeriod); ++ pnetwork->Configuration.DSConfig =le32_to_cpu(pnetwork->Configuration.DSConfig); ++ pnetwork->Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->Configuration.FHConfig.DwellTime); ++ pnetwork->Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->Configuration.FHConfig.HopPattern); ++ pnetwork->Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->Configuration.FHConfig.HopSet); ++ pnetwork->Configuration.FHConfig.Length=le32_to_cpu(pnetwork->Configuration.FHConfig.Length); ++ pnetwork->Configuration.Length = le32_to_cpu(pnetwork->Configuration.Length); ++ pnetwork->InfrastructureMode = le32_to_cpu(pnetwork->InfrastructureMode); ++ pnetwork->IELength = le32_to_cpu(pnetwork->IELength); ++#endif ++ ++ len = get_WLAN_BSSID_EX_sz(pnetwork); ++ if(len > (sizeof(WLAN_BSSID_EX))) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n ****rtw_survey_event_callback: return a wrong bss ***\n")); ++ return; ++ } ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ // update IBSS_network 's timestamp ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"rtw_survey_event_callback : WIFI_ADHOC_MASTER_STATE \n\n"); ++ if(_rtw_memcmp(&(pmlmepriv->cur_network.network.MacAddress), pnetwork->MacAddress, ETH_ALEN)) ++ { ++ struct wlan_network* ibss_wlan = NULL; ++ _irqL irqL; ++ ++ _rtw_memcpy(pmlmepriv->cur_network.network.IEs, pnetwork->IEs, 8); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ibss_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->MacAddress); ++ if(ibss_wlan) ++ { ++ _rtw_memcpy(ibss_wlan->network.IEs , pnetwork->IEs, 8); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto exit; ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ } ++ } ++ ++ // lock pmlmepriv->lock when you accessing network_q ++ if ((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _FALSE) ++ { ++ if( pnetwork->Ssid.Ssid[0] == 0 ) ++ { ++ pnetwork->Ssid.SsidLength = 0; ++ } ++ rtw_add_network(adapter, pnetwork); ++ } ++ ++exit: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++_func_exit_; ++ ++ return; ++} ++ ++ ++ ++void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ ++#ifdef CONFIG_MLME_EXT ++ ++ mlmeext_surveydone_event_callback(adapter); ++ ++#endif ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_surveydone_event_callback: fw_state:%x\n\n", get_fwstate(pmlmepriv))); ++ ++ if (check_fwstate(pmlmepriv,_FW_UNDER_SURVEY)) ++ { ++ u8 timer_cancelled; ++ ++ _cancel_timer(&pmlmepriv->scan_to_timer, &timer_cancelled); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ } ++ else { ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("nic status =%x, survey done event comes too late!\n", get_fwstate(pmlmepriv))); ++ } ++ ++ #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&adapter->recvpriv); ++ #endif ++ ++ if(pmlmepriv->to_join == _TRUE) ++ { ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE) ) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)==_FALSE) ++ { ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ if(rtw_select_and_join_from_scanned_queue(pmlmepriv)==_SUCCESS) ++ { ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT ); ++ } ++ else ++ { ++ WLAN_BSSID_EX *pdev_network = &(adapter->registrypriv.dev_network); ++ u8 *pibss = adapter->registrypriv.dev_network.MacAddress; ++ ++ //pmlmepriv->fw_state ^= _FW_UNDER_SURVEY;//because don't set assoc_timer ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("switching to adhoc master\n")); ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(adapter); ++ rtw_generate_random_ibss(pibss); ++ ++ pmlmepriv->fw_state = WIFI_ADHOC_MASTER_STATE; ++ ++ if(rtw_createbss_cmd(adapter)!=_SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error=>rtw_createbss_cmd status FAIL\n")); ++ } ++ ++ pmlmepriv->to_join = _FALSE; ++ } ++ } ++ } ++ else ++ { ++ int s_ret; ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ pmlmepriv->to_join = _FALSE; ++ if(_SUCCESS == (s_ret=rtw_select_and_join_from_scanned_queue(pmlmepriv))) ++ { ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ } ++ else if(s_ret == 2)//there is no need to wait for join ++ { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ #ifdef CONFIG_LAYER2_ROAMING ++ DBG_871X("try_to_join, but select scanning queue fail, to_roaming:%d\n", pmlmepriv->to_roaming); ++ #else ++ DBG_871X("try_to_join, but select scanning queue fail\n"); ++ #endif ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming!=0) { ++ if( --pmlmepriv->to_roaming == 0 ++ || _SUCCESS != rtw_sitesurvey_cmd(adapter, &pmlmepriv->assoc_ssid, 1) ++ ) { ++ pmlmepriv->to_roaming = 0; ++ rtw_free_assoc_resources(adapter, 1); ++ rtw_indicate_disconnect(adapter); ++ } else { ++ pmlmepriv->to_join = _TRUE; ++ } ++ } ++ #endif ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ } ++ } ++ } ++ ++ indicate_wx_scan_complete_event(adapter); ++ //DBG_871X("scan complete in %dms\n",rtw_get_passing_time_ms(pmlmepriv->scan_start_time)); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++#ifdef CONFIG_P2P ++ p2p_ps_wk_cmd(adapter, P2P_PS_SCAN_DONE, 0); ++#endif //CONFIG_P2P ++ ++ rtw_os_xmit_schedule(adapter); ++ ++#ifdef CONFIG_DRVEXT_MODULE_WSC ++ drvext_surveydone_callback(&adapter->drvextpriv); ++#endif ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ if(pmlmeext->sitesurvey_res.bss_cnt == 0){ ++ if(adapter->HalFunc.silentreset) ++ adapter->HalFunc.silentreset(adapter); ++ } ++ } ++ #endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_surveydone_event_callback(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++_func_exit_; ++ ++} ++ ++void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++} ++ ++void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf) ++{ ++ ++} ++ ++static void free_scanqueue(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL, irqL0; ++ _queue *free_queue = &pmlmepriv->free_bss_pool; ++ _queue *scan_queue = &pmlmepriv->scanned_queue; ++ _list *plist, *phead, *ptemp; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+free_scanqueue\n")); ++ _enter_critical_bh(&scan_queue->lock, &irqL0); ++ _enter_critical_bh(&free_queue->lock, &irqL); ++ ++ phead = get_list_head(scan_queue); ++ plist = get_next(phead); ++ ++ while (plist != phead) ++ { ++ ptemp = get_next(plist); ++ rtw_list_delete(plist); ++ rtw_list_insert_tail(plist, &free_queue->queue); ++ plist =ptemp; ++ pmlmepriv->num_of_scanned --; ++ } ++ ++ _exit_critical_bh(&free_queue->lock, &irqL); ++ _exit_critical_bh(&scan_queue->lock, &irqL0); ++ ++_func_exit_; ++} ++ ++/* ++*rtw_free_assoc_resources: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_free_assoc_resources(_adapter *adapter, int lock_scanned_queue) ++{ ++ _irqL irqL; ++ struct wlan_network* pwlan = NULL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct mlme_ext_info *pmlmeinfo = &adapter->mlmeextpriv.mlmext_info; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#endif //CONFIG_TDLS ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_free_assoc_resources\n")); ++ ++ ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("tgt_network->network.MacAddress="MAC_FMT" ssid=%s\n", ++ MAC_ARG(tgt_network->network.MacAddress), tgt_network->network.Ssid.Ssid)); ++ ++ if(check_fwstate( pmlmepriv, WIFI_STATION_STATE|WIFI_AP_STATE)) ++ { ++ struct sta_info* psta; ++ ++ psta = rtw_get_stainfo(&adapter->stapriv, tgt_network->network.MacAddress); ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->setup_state != UN_TDLS_STATE) ++ { ++ rtw_tdls_cmd(adapter, myid(&(adapter->eeprompriv)), TDLS_RS_RCR); ++ ptdlsinfo->setup_state = UN_TDLS_STATE; ++ rtw_free_all_stainfo(adapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ } ++ else ++ { ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ } ++#else ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++#endif //CONFIG_TDLS ++ ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ } ++ ++ if(check_fwstate( pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) ++ { ++ struct sta_info* psta; ++ ++ rtw_free_all_stainfo(adapter); ++ ++ psta = rtw_get_bcmc_stainfo(adapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(adapter); ++ } ++ ++ if(lock_scanned_queue) ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if(pwlan) ++ { ++ pwlan->fixed = _FALSE; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_free_assoc_resources : pwlan== NULL \n\n")); ++ } ++ ++ ++ if((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) && (adapter->stapriv.asoc_sta_count== 1)) ++ /*||check_fwstate(pmlmepriv, WIFI_STATION_STATE)*/) ++ { ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ ++ if(lock_scanned_queue) ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ pmlmepriv->key_mask = 0; ++ ++_func_exit_; ++ ++} ++ ++/* ++*rtw_indicate_connect: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_connect\n")); ++ ++ pmlmepriv->to_join = _FALSE; ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ANTENNA_DIVERSITY_LINK, 0); ++#endif ++ set_fwstate(pmlmepriv, _FW_LINKED); ++ ++ rtw_led_control(padapter, LED_CTL_LINK); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ if(padapter->drvextpriv.enable_wpa) ++ { ++ indicate_l2_connect(padapter); ++ } ++ else ++#endif ++ { ++ rtw_os_indicate_connect(padapter); ++ } ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ pmlmepriv->to_roaming=0; ++ #endif ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ rtw_set_scan_deny(pmlmepriv, 3000); ++ #endif ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("-rtw_indicate_connect: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++*rtw_indicate_disconnect: the caller has to lock pmlmepriv->lock ++*/ ++void rtw_indicate_disconnect( _adapter *padapter ) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("+rtw_indicate_disconnect\n")); ++ ++ _clr_fwstate_(pmlmepriv, _FW_LINKED|_FW_UNDER_LINKING); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming<=0) ++ #endif ++ rtw_os_indicate_disconnect(padapter); ++ ++#ifdef CONFIG_LPS ++ if(padapter->pwrctrlpriv.wowlan_mode==_FALSE){ ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 1); ++ } ++#endif ++ ++#ifdef CONFIG_P2P ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++#endif //CONFIG_P2P ++ ++_func_exit_; ++} ++ ++inline void rtw_indicate_scan_done( _adapter *padapter, bool aborted) ++{ ++ rtw_os_indicate_scan_done(padapter, aborted); ++} ++ ++static struct sta_info *rtw_joinbss_update_stainfo(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ int i; ++ struct sta_info *bmc_sta, *psta=NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++#ifdef CONFIG_CONCURRENT_MODE ++ PADAPTER pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_priv *pbuddy_mlmepriv = &(pbuddy_adapter->mlmepriv); ++#endif ++ ++ psta = rtw_get_stainfo(pstapriv, pnetwork->network.MacAddress); ++ if(psta==NULL) { ++ psta = rtw_alloc_stainfo(pstapriv, pnetwork->network.MacAddress); ++ } ++ ++ if(psta) //update ptarget_sta ++ { ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psta->aid = pnetwork->join_res; ++#ifdef CONFIG_CONCURRENT_MODE ++ if((check_fwstate(pbuddy_mlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pbuddy_mlmepriv, _FW_LINKED) == _TRUE)) ++ { ++ psta->mac_id=2; ++ } ++ else ++#endif ++ { ++ psta->mac_id=0; ++ } ++ ++ //security related ++ if(padapter->securitypriv.dot11AuthAlgrthm== dot11AuthAlgrthm_8021X) ++ { ++ padapter->securitypriv.binstallGrpkey=_FALSE; ++ padapter->securitypriv.busetkipkey=_FALSE; ++ padapter->securitypriv.bgrpkey_handshake=_FALSE; ++ ++ psta->ieee8021x_blocked=_TRUE; ++ psta->dot118021XPrivacy=padapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ _rtw_memset((u8 *)&psta->dot118021x_UncstKey, 0, sizeof (union Keytype)); ++ ++ _rtw_memset((u8 *)&psta->dot11tkiprxmickey, 0, sizeof (union Keytype)); ++ _rtw_memset((u8 *)&psta->dot11tkiptxmickey, 0, sizeof (union Keytype)); ++ ++ _rtw_memset((u8 *)&psta->dot11txpn, 0, sizeof (union pn48)); ++ _rtw_memset((u8 *)&psta->dot11rxpn, 0, sizeof (union pn48)); ++ } ++ ++ ++ //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info ++ //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff ++ //todo: check if AP can send A-MPDU packets ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ ++ ++ bmc_sta = rtw_get_bcmc_stainfo(padapter); ++ if(bmc_sta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++ ++ ++ //misc. ++ update_sta_info(padapter, psta); ++ ++ } ++ ++ return psta; ++ ++} ++ ++//pnetwork : returns from rtw_joinbss_event_callback ++//ptarget_wlan: found from scanned_queue ++static void rtw_joinbss_update_network(_adapter *padapter, struct wlan_network *ptarget_wlan, struct wlan_network *pnetwork) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\nfw_state:%x, BSSID:"MAC_FMT"\n" ++ ,get_fwstate(pmlmepriv), MAC_ARG(pnetwork->network.MacAddress))); ++ ++ ++ // why not use ptarget_wlan?? ++ _rtw_memcpy(&cur_network->network, &pnetwork->network, pnetwork->network.Length); ++ //_rtw_memcpy(&cur_network->network, &ptarget_wlan->network, ptarget_wlan->network.Length); ++ ++ cur_network->aid = pnetwork->join_res; ++ ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ padapter->recvpriv.signal_strength = ptarget_wlan->network.PhyInfo.SignalStrength; ++ padapter->recvpriv.signal_qual = ptarget_wlan->network.PhyInfo.SignalQuality; ++ //the ptarget_wlan->network.Rssi is raw data, we use ptarget_wlan->network.PhyInfo.SignalStrength instead (has scaled) ++ padapter->recvpriv.rssi = translate_percentage_to_dbm(ptarget_wlan->network.PhyInfo.SignalStrength); ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ ++ //update fw_state //will clr _FW_UNDER_LINKING here indirectly ++ switch(pnetwork->network.InfrastructureMode) ++ { ++ case Ndis802_11Infrastructure: ++ pmlmepriv->fw_state = WIFI_STATION_STATE; ++ break; ++ case Ndis802_11IBSS: ++ pmlmepriv->fw_state = WIFI_ADHOC_STATE; ++ break; ++ default: ++ pmlmepriv->fw_state = WIFI_NULL_STATE; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Invalid network_mode\n")); ++ break; ++ } ++ ++ rtw_update_protection(padapter, (cur_network->network.IEs) + sizeof (NDIS_802_11_FIXED_IEs), ++ (cur_network->network.IELength)); ++ ++#ifdef CONFIG_80211N_HT ++ rtw_update_ht_cap(padapter, cur_network->network.IEs, cur_network->network.IELength); ++#endif ++ ++ ++} ++ ++//Notes: the fucntion could be > passive_level (the same context as Rx tasklet) ++//pnetwork : returns from rtw_joinbss_event_callback ++//ptarget_wlan: found from scanned_queue ++//if join_res > 0, for (fw_state==WIFI_STATION_STATE), we check if "ptarget_sta" & "ptarget_wlan" exist. ++//if join_res > 0, for (fw_state==WIFI_ADHOC_STATE), we only check if "ptarget_wlan" exist. ++//if join_res > 0, update "cur_network->network" from "pnetwork->network" if (ptarget_wlan !=NULL). ++// ++//#define REJOIN ++void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL,irqL2; ++ int res; ++ static u8 retry=0; ++ u8 timer_cancelled; ++ struct sta_info *ptarget_sta= NULL, *pcur_sta = NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wlan_network *pcur_wlan = NULL, *ptarget_wlan = NULL; ++ unsigned int the_same_macaddr = _FALSE; ++ ++_func_enter_; ++ ++#ifdef CONFIG_RTL8712 ++ //endian_convert ++ pnetwork->join_res = le32_to_cpu(pnetwork->join_res); ++ pnetwork->network_type = le32_to_cpu(pnetwork->network_type); ++ pnetwork->network.Length = le32_to_cpu(pnetwork->network.Length); ++ pnetwork->network.Ssid.SsidLength = le32_to_cpu(pnetwork->network.Ssid.SsidLength); ++ pnetwork->network.Privacy =le32_to_cpu( pnetwork->network.Privacy); ++ pnetwork->network.Rssi = le32_to_cpu(pnetwork->network.Rssi); ++ pnetwork->network.NetworkTypeInUse =le32_to_cpu(pnetwork->network.NetworkTypeInUse) ; ++ pnetwork->network.Configuration.ATIMWindow = le32_to_cpu(pnetwork->network.Configuration.ATIMWindow); ++ pnetwork->network.Configuration.BeaconPeriod = le32_to_cpu(pnetwork->network.Configuration.BeaconPeriod); ++ pnetwork->network.Configuration.DSConfig = le32_to_cpu(pnetwork->network.Configuration.DSConfig); ++ pnetwork->network.Configuration.FHConfig.DwellTime=le32_to_cpu(pnetwork->network.Configuration.FHConfig.DwellTime); ++ pnetwork->network.Configuration.FHConfig.HopPattern=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopPattern); ++ pnetwork->network.Configuration.FHConfig.HopSet=le32_to_cpu(pnetwork->network.Configuration.FHConfig.HopSet); ++ pnetwork->network.Configuration.FHConfig.Length=le32_to_cpu(pnetwork->network.Configuration.FHConfig.Length); ++ pnetwork->network.Configuration.Length = le32_to_cpu(pnetwork->network.Configuration.Length); ++ pnetwork->network.InfrastructureMode = le32_to_cpu(pnetwork->network.InfrastructureMode); ++ pnetwork->network.IELength = le32_to_cpu(pnetwork->network.IELength ); ++#endif ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("joinbss event call back received with res=%d\n", pnetwork->join_res)); ++ ++ rtw_get_encrypt_decrypt_from_registrypriv(adapter); ++ ++ ++ if (pmlmepriv->assoc_ssid.SsidLength == 0) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ joinbss event call back for Any SSid\n")); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("@@@@@ rtw_joinbss_event_callback for SSid:%s\n", pmlmepriv->assoc_ssid.Ssid)); ++ } ++ ++ the_same_macaddr = _rtw_memcmp(pnetwork->network.MacAddress, cur_network->network.MacAddress, ETH_ALEN); ++ ++ pnetwork->network.Length = get_WLAN_BSSID_EX_sz(&pnetwork->network); ++ if(pnetwork->network.Length > sizeof(WLAN_BSSID_EX)) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n\n ***joinbss_evt_callback return a wrong bss ***\n\n")); ++ goto ignore_joinbss_callback; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("\n rtw_joinbss_event_callback !! _enter_critical \n")); ++ ++ if(pnetwork->join_res > 0) ++ { ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ retry = 0; ++ if (check_fwstate(pmlmepriv,_FW_UNDER_LINKING) ) ++ { ++ //s1. find ptarget_wlan ++ if(check_fwstate(pmlmepriv, _FW_LINKED) ) ++ { ++ if(the_same_macaddr == _TRUE) ++ { ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ } ++ else ++ { ++ pcur_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ if(pcur_wlan) pcur_wlan->fixed = _FALSE; ++ ++ pcur_sta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(pcur_sta){ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ rtw_free_stainfo(adapter, pcur_sta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ } ++ ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ } ++ } ++ ++ } ++ else ++ { ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, pnetwork->network.MacAddress); ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE){ ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ } ++ } ++ ++ //s2. update cur_network ++ if(ptarget_wlan) ++ { ++ rtw_joinbss_update_network(adapter, ptarget_wlan, pnetwork); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't find ptarget_wlan when joinbss_event callback\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ ++ ++ //s3. find ptarget_sta & update ptarget_sta after update cur_network only for station mode ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ptarget_sta = rtw_joinbss_update_stainfo(adapter, pnetwork); ++ if(ptarget_sta==NULL) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't update stainfo when joinbss_event callback\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ } ++ ++ //s4. indicate connect ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ //adhoc mode will rtw_indicate_connect when rtw_stassoc_event_callback ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("adhoc mode, fw_state:%x", get_fwstate(pmlmepriv))); ++ } ++ ++ ++ //s5. Cancle assoc_timer ++ _cancel_timer(&pmlmepriv->assoc_timer, &timer_cancelled); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("Cancle assoc_timer\n")); ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_joinbss_event_callback err: fw_state:%x", get_fwstate(pmlmepriv))); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ignore_joinbss_callback; ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ } ++ else if(pnetwork->join_res == -4) ++ { ++ rtw_reset_securitypriv(adapter); ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ ++ //rtw_free_assoc_resources(adapter, 1); ++ ++ if((check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("fail! clear _FW_UNDER_LINKING ^^^fw_state=%x\n", get_fwstate(pmlmepriv))); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ } ++ ++ } ++ else //if join_res < 0 (join fails), then try again ++ { ++ ++ #ifdef REJOIN ++ res = _FAIL; ++ if(retry < 2) { ++ res = rtw_select_and_join_from_scanned_queue(pmlmepriv); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_select_and_join_from_scanned_queue again! res:%d\n",res)); ++ } ++ ++ if(res == _SUCCESS) ++ { ++ //extend time of assoc_timer ++ _set_timer(&pmlmepriv->assoc_timer, MAX_JOIN_TIMEOUT); ++ retry++; ++ } ++ else if(res == 2)//there is no need to wait for join ++ { ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ rtw_indicate_connect(adapter); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Set Assoc_Timer = 1; can't find match ssid in scanned_q \n")); ++ #endif ++ ++ _set_timer(&pmlmepriv->assoc_timer, 1); ++ //rtw_free_assoc_resources(adapter, 1); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++ #ifdef REJOIN ++ retry = 0; ++ } ++ #endif ++ } ++ ++ignore_joinbss_callback: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ _func_exit_; ++} ++ ++void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ struct wlan_network *pnetwork = (struct wlan_network *)pbuf; ++ struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ ++_func_enter_; ++ ++ mlmeext_joinbss_event_callback(adapter, pnetwork->join_res); ++ ++ //Set Value to 1 to xmit data frame. ++ ATOMIC_SET(&pxmitpriv->HwRdyXmitData, 1); ++ rtw_os_xmit_schedule(adapter); ++ ++_func_exit_; ++} ++ ++void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL; ++ struct sta_info *psta; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct stassoc_event *pstassoc = (struct stassoc_event*)pbuf; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wlan_network *ptarget_wlan = NULL; ++ ++_func_enter_; ++ ++ // to do: ++ if(rtw_access_ctrl(&adapter->acl_list, pstassoc->macaddr) == _FALSE) ++ return; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if(psta) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ u8 *passoc_req = NULL; ++ u32 assoc_req_len; ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ if(psta->passoc_req && psta->assoc_req_len>0) ++ { ++ passoc_req = rtw_zmalloc(psta->assoc_req_len); ++ if(passoc_req) ++ { ++ assoc_req_len = psta->assoc_req_len; ++ _rtw_memcpy(passoc_req, psta->passoc_req, assoc_req_len); ++ ++ _rtw_mfree(psta->passoc_req , psta->assoc_req_len); ++ psta->passoc_req = NULL; ++ psta->assoc_req_len = 0; ++ } ++ } ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ if(passoc_req && assoc_req_len>0) ++ { ++ rtw_cfg80211_indicate_sta_assoc(adapter, passoc_req, assoc_req_len); ++ ++ _rtw_mfree(passoc_req, assoc_req_len); ++ } ++#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ //bss_cap_update(adapter, psta); ++ //sta_info_update(adapter, psta); ++ ap_sta_info_defer_update(adapter, psta); ++ } ++ ++ goto exit; ++ } ++#endif ++ ++ psta = rtw_get_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if( psta != NULL) ++ { ++ //the sta have been in sta_info_queue => do nothing ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Error: rtw_stassoc_event_callback: sta has been in sta_hash_queue \n")); ++ ++ goto exit; //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) ++ } ++ ++ psta = rtw_alloc_stainfo(&adapter->stapriv, pstassoc->macaddr); ++ if (psta == NULL) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Can't alloc sta_info when rtw_stassoc_event_callback\n")); ++ goto exit; ++ } ++ ++ //to do : init sta_info variable ++ psta->qos_option = 0; ++ psta->mac_id = (uint)pstassoc->cam_id; ++ //psta->aid = (uint)pstassoc->cam_id; ++ ++ if(adapter->securitypriv.dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->dot118021XPrivacy = adapter->securitypriv.dot11PrivacyAlgrthm; ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if ( (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)==_TRUE ) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)==_TRUE ) ) ++ { ++ if(adapter->stapriv.asoc_sta_count== 2) ++ { ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ptarget_wlan = rtw_find_network(&pmlmepriv->scanned_queue, cur_network->network.MacAddress); ++ if(ptarget_wlan) ptarget_wlan->fixed = _TRUE; ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // a sta + bc/mc_stainfo (not Ibss_stainfo) ++ rtw_indicate_connect(adapter); ++ } ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ mlmeext_sta_add_event_callback(adapter, psta); ++ ++#ifdef CONFIG_RTL8711 ++ //submit SetStaKey_cmd to tell fw, fw will allocate an CAM entry for this sta ++ rtw_setstakey_cmd(adapter, (unsigned char*)psta, _FALSE); ++#endif ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ _irqL irqL,irqL2; ++ struct sta_info *psta; ++ struct wlan_network* pwlan = NULL; ++ WLAN_BSSID_EX *pdev_network=NULL; ++ u8* pibss = NULL; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct stadel_event *pstadel = (struct stadel_event*)pbuf; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct wlan_network *tgt_network = &(pmlmepriv->cur_network); ++ ++_func_enter_; ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(adapter, pstadel->macaddr, *(u16*)pstadel->rsvd); ++#endif //(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,37)) || defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++#endif //CONFIG_IOCTL_CFG80211 ++ return; ++ } ++ ++ mlmeext_sta_del_event_callback(adapter); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL2); ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming > 0) ++ pmlmepriv->to_roaming--; // this stadel_event is caused by roaming, decrease to_roaming ++ else if(pmlmepriv->to_roaming ==0) ++ pmlmepriv->to_roaming= adapter->registrypriv.max_roaming_times; ++ ++ if(*((unsigned short *)(pstadel->rsvd)) !=65535 ) //if stadel_event isn't caused by no rx ++ pmlmepriv->to_roaming=0; // don't roam ++ #endif //CONFIG_LAYER2_ROAMING ++ ++ ++ rtw_free_assoc_resources(adapter, 1); ++ rtw_indicate_disconnect(adapter); ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ // remove the network entry in scanned_queue ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if (pwlan) { ++ pwlan->fixed = _FALSE; ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ #ifdef CONFIG_LAYER2_ROAMING ++ _rtw_roaming(adapter, tgt_network); ++ #endif //CONFIG_LAYER2_ROAMING ++ ++ } ++ ++ if ( check_fwstate(pmlmepriv,WIFI_ADHOC_MASTER_STATE) || ++ check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) ++ { ++ psta = rtw_get_stainfo(&adapter->stapriv, pstadel->macaddr); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(adapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ if(adapter->stapriv.asoc_sta_count== 1) //a sta + bc/mc_stainfo (not Ibss_stainfo) ++ { ++ //rtw_indicate_disconnect(adapter);//removed@20091105 ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ //free old ibss network ++ //pwlan = rtw_find_network(&pmlmepriv->scanned_queue, pstadel->macaddr); ++ pwlan = rtw_find_network(&pmlmepriv->scanned_queue, tgt_network->network.MacAddress); ++ if(pwlan) ++ { ++ pwlan->fixed = _FALSE; ++ rtw_free_network_nolock(pmlmepriv, pwlan); ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ //re-create ibss ++ pdev_network = &(adapter->registrypriv.dev_network); ++ pibss = adapter->registrypriv.dev_network.MacAddress; ++ ++ _rtw_memcpy(pdev_network, &tgt_network->network, get_WLAN_BSSID_EX_sz(&tgt_network->network)); ++ ++ _rtw_memset(&pdev_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(&pdev_network->Ssid, &pmlmepriv->assoc_ssid, sizeof(NDIS_802_11_SSID)); ++ ++ rtw_update_registrypriv_dev_network(adapter); ++ ++ rtw_generate_random_ibss(pibss); ++ ++ if(check_fwstate(pmlmepriv,WIFI_ADHOC_STATE)) ++ { ++ set_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE); ++ _clr_fwstate_(pmlmepriv, WIFI_ADHOC_STATE); ++ } ++ ++ if(rtw_createbss_cmd(adapter)!=_SUCCESS) ++ { ++ ++ RT_TRACE(_module_rtl871x_ioctl_set_c_,_drv_err_,("***Error=>stadel_event_callback: rtw_createbss_cmd status FAIL*** \n ")); ++ ++ } ++ ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL2); ++ ++_func_exit_; ++ ++} ++ ++ ++void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf) ++{ ++ struct reportpwrstate_parm *preportpwrstate = (struct reportpwrstate_parm *)pbuf; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("rtw_cpwm_event_callback !!!\n")); ++#ifdef CONFIG_PWRCTRL ++ preportpwrstate->state |= (u8)(adapter->pwrctrlpriv.cpwm_tog + 0x80); ++ cpwm_int_hdl(adapter, preportpwrstate); ++#endif ++ ++_func_exit_; ++ ++} ++ ++/* ++* _rtw_join_timeout_handler - Timeout/faliure handler for CMD JoinBss ++* @adapter: pointer to _adapter structure ++*/ ++void _rtw_join_timeout_handler (_adapter *adapter) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ int do_join_r; ++ ++#if 0 ++ if (adapter->bDriverStopped == _TRUE){ ++ _rtw_up_sema(&pmlmepriv->assoc_terminate); ++ return; ++ } ++#endif ++ ++_func_enter_; ++ ++ DBG_871X("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ ++ if(adapter->bDriverStopped ||adapter->bSurpriseRemoved) ++ return; ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming>0) { // join timeout caused by roaming ++ while(1) { ++ pmlmepriv->to_roaming--; ++ if(pmlmepriv->to_roaming!=0) { //try another , ++ DBG_871X("%s try another roaming\n", __FUNCTION__); ++ if( _SUCCESS!=(do_join_r=rtw_do_join(adapter)) ) { ++ DBG_871X("%s roaming do_join return %d\n", __FUNCTION__ ,do_join_r); ++ continue; ++ } ++ break; ++ } else { ++ DBG_871X("%s We've try roaming but fail\n", __FUNCTION__); ++ rtw_indicate_disconnect(adapter); ++ break; ++ } ++ } ++ ++ } else ++ #endif ++ { ++ rtw_indicate_disconnect(adapter); ++ free_scanqueue(pmlmepriv);//??? ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++#ifdef CONFIG_DRVEXT_MODULE_WSC ++ drvext_assoc_fail_indicate(&adapter->drvextpriv); ++#endif ++ ++_func_exit_; ++ ++} ++ ++ ++/* ++* rtw_scan_timeout_handler - Timeout/Faliure handler for CMD SiteSurvey ++* @adapter: pointer to _adapter structure ++*/ ++void rtw_scan_timeout_handler (_adapter *adapter) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ DBG_871X("%s, fw_state=%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ ++ if(adapter->bDriverStopped ||adapter->bSurpriseRemoved) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ rtw_indicate_scan_done(adapter, _TRUE); ++} ++ ++static void rtw_auto_scan_handler(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ //auto site survey per 60sec ++ if(pmlmepriv->scan_interval >0) ++ { ++ pmlmepriv->scan_interval--; ++ if(pmlmepriv->scan_interval==0) ++ { ++ if( pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE ) ++ return; ++ ++/* ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ DBG_8192C("exit %s when _FW_UNDER_SURVEY|_FW_UNDER_LINKING -> \n", __FUNCTION__); ++ return; ++ } ++ ++ if(pmlmepriv->sitesurveyctrl.traffic_busy == _TRUE) ++ { ++ DBG_8192C("%s exit cause traffic_busy(%x)\n",__FUNCTION__, pmlmepriv->sitesurveyctrl.traffic_busy); ++ return; ++ } ++*/ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ rtw_set_802_11_bssid_list_scan(padapter); ++ ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ ++ } ++ ++ } ++ ++} ++ ++void rtw_dynamic_check_timer_handlder(_adapter *adapter) ++{ ++#ifdef CONFIG_AP_MODE ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++#endif //CONFIG_AP_MODE ++ struct registry_priv *pregistrypriv = &adapter->registrypriv; ++ ++ if(adapter->hw_init_completed == _FALSE) ++ return; ++ ++ if ((adapter->bDriverStopped == _TRUE)||(adapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ if(adapter->net_closed == _TRUE) ++ return; ++ ++ rtw_dynamic_chk_wk_cmd(adapter); ++ ++ if(pregistrypriv->wifi_spec==1) ++ { ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++#endif ++ { ++ //auto site survey ++ rtw_auto_scan_handler(adapter); ++ } ++ } ++ ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ expire_timeout_chk(adapter); ++ } ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if( adapter->pnetdev->br_port ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if( rcu_dereference(adapter->pnetdev->rx_handler_data) ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ // expire NAT2.5 entry ++ void nat25_db_expire(_adapter *priv); ++ nat25_db_expire(adapter); ++ ++ if (adapter->pppoe_connection_in_progress > 0) { ++ adapter->pppoe_connection_in_progress--; ++ } ++ ++ // due to rtw_dynamic_check_timer_handlder() is called every 2 seconds ++ if (adapter->pppoe_connection_in_progress > 0) { ++ adapter->pppoe_connection_in_progress--; ++ } ++ } ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++#endif // CONFIG_BR_EXT ++ ++} ++ ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++void rtw_set_scan_deny_timer_hdl(_adapter *adapter) ++{ ++ struct mlme_priv *mlmepriv = &adapter->mlmepriv; ++ ++ //allowed set scan ++ ATOMIC_SET(&mlmepriv->set_scan_deny, 0); ++} ++ ++void rtw_set_scan_deny(struct mlme_priv *mlmepriv, u32 ms) ++{ ++ ATOMIC_SET(&mlmepriv->set_scan_deny, 1); ++ _set_timer(&mlmepriv->set_scan_deny_timer, ms); ++} ++#endif ++ ++ ++#if defined(IEEE80211_SCAN_RESULT_EXPIRE) ++#define RTW_SCAN_RESULT_EXPIRE IEEE80211_SCAN_RESULT_EXPIRE/HZ*1000 -1000 //3000 -1000 ++#else ++#define RTW_SCAN_RESULT_EXPIRE 2000 ++#endif ++/* ++* Select a new join candidate from the original @param candidate and @param competitor ++* @return _TRUE: candidate is updated ++* @return _FALSE: candidate is not updated ++*/ ++static int rtw_check_join_candidate(struct mlme_priv *pmlmepriv ++ , struct wlan_network **candidate, struct wlan_network *competitor) ++{ ++ int updated = _FALSE; ++ _adapter *adapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++ ++ //check bssid, if needed ++ if(pmlmepriv->assoc_by_bssid==_TRUE) { ++ if(_rtw_memcmp(competitor->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN) ==_FALSE) ++ goto exit; ++ } ++ ++ //check ssid, if needed ++ if(pmlmepriv->assoc_ssid.Ssid && pmlmepriv->assoc_ssid.SsidLength) { ++ if( competitor->network.Ssid.SsidLength != pmlmepriv->assoc_ssid.SsidLength ++ || _rtw_memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength) == _FALSE ++ ) ++ goto exit; ++ } ++ ++ if(rtw_is_desired_network(adapter, competitor) == _FALSE) ++ goto exit; ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming) { ++ if( rtw_get_passing_time_ms((u32)competitor->last_scanned) >= RTW_SCAN_RESULT_EXPIRE ++ || is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) == _FALSE ++ ) ++ goto exit; ++ } ++#endif ++ ++ if(*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ ++#if 0 ++ if(pmlmepriv->assoc_by_bssid==_TRUE) { // associate with bssid ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && _rtw_memcmp(competitor->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } else if (pmlmepriv->assoc_ssid.SsidLength == 0 ) { // associate with ssid, but ssidlength is 0 ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } else ++#ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming) { // roaming ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && is_same_ess(&competitor->network, &pmlmepriv->cur_network.network) ++ //&&(!is_same_network(&competitor->network, &pmlmepriv->cur_network.network)) ++ && rtw_get_passing_time_ms((u32)competitor->last_scanned) < RTW_SCAN_RESULT_EXPIRE ++ && rtw_is_desired_network(adapter, competitor) ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ ++ } else ++#endif ++ { // associate with ssid ++ if( (*candidate == NULL ||(*candidate)->network.Rssinetwork.Rssi ) ++ && (competitor->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength) ++ &&((_rtw_memcmp(competitor->network.Ssid.Ssid, pmlmepriv->assoc_ssid.Ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE) ++ && rtw_is_desired_network(adapter, competitor) ++ ) { ++ *candidate = competitor; ++ updated = _TRUE; ++ } ++ } ++#endif ++ ++ if(updated){ ++ DBG_871X("[by_bssid:%u][assoc_ssid:%s]" ++ #ifdef CONFIG_LAYER2_ROAMING ++ "[to_roaming:%u] " ++ #endif ++ "new candidate: %s("MAC_FMT") rssi:%d\n", ++ pmlmepriv->assoc_by_bssid, ++ pmlmepriv->assoc_ssid.Ssid, ++ #ifdef CONFIG_LAYER2_ROAMING ++ pmlmepriv->to_roaming, ++ #endif ++ (*candidate)->network.Ssid.Ssid, ++ MAC_ARG((*candidate)->network.MacAddress), ++ (int)(*candidate)->network.Rssi ++ ); ++ } ++ ++exit: ++ return updated; ++} ++ ++ ++/* ++Calling context: ++The caller of the sub-routine will be in critical section... ++ ++The caller must hold the following spinlock ++ ++pmlmepriv->lock ++ ++ ++*/ ++#if 1 ++int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv ) ++{ ++ _irqL irqL; ++ int ret; ++ _list *phead; ++ _adapter *adapter; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *candidate = NULL; ++ u8 bSupportAntDiv = _FALSE; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ adapter = (_adapter *)pmlmepriv->nic_hdl; ++ ++ pmlmepriv->pscanned = get_next( phead ); ++ ++ while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("%s return _FAIL:(pnetwork==NULL)\n", __FUNCTION__)); ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ #if 0 ++ DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid); ++ #endif ++ ++ rtw_check_join_candidate(pmlmepriv, &candidate, pnetwork); ++ ++ } ++ ++ if(candidate == NULL) { ++ DBG_871X("%s: return _FAIL(candidate == NULL)\n", __FUNCTION__); ++ ret = _FAIL; ++ goto exit; ++ } else { ++ DBG_871X("%s: candidate: %s("MAC_FMT")\n", __FUNCTION__, ++ candidate->network.Ssid.Ssid, MAC_ARG(candidate->network.MacAddress));; ++ } ++ ++ ++ // check for situation of _FW_LINKED ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ DBG_871X("%s: _FW_LINKED while ask_for_joinbss!!!\n", __FUNCTION__); ++ ++ #if 0 // for WPA/WPA2 authentication, wpa_supplicant will expect authentication from AP, it is needed to reconnect AP... ++ if(is_same_network(&pmlmepriv->cur_network.network, &candidate->network)) ++ { ++ DBG_871X("%s: _FW_LINKED and is same network, it needn't join again\n", __FUNCTION__); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ ++ ret = 2; ++ goto exit; ++ } ++ else ++ #endif ++ { ++ rtw_disassoc_cmd(adapter); ++ rtw_indicate_disconnect(adapter); ++ rtw_free_assoc_resources(adapter, 0); ++ } ++ } ++ ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); ++ if(_TRUE == bSupportAntDiv) ++ { ++ u8 CurrentAntenna; ++ adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); ++ DBG_8192C("#### Opt_Ant_(%s) , cur_Ant(%s)\n", ++ (2==candidate->network.PhyInfo.Optimum_antenna)?"A":"B", ++ (2==CurrentAntenna)?"A":"B" ++ ); ++ } ++ #endif ++ ++ ret = rtw_joinbss_cmd(adapter, candidate); ++ ++exit: ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++_func_exit_; ++ ++ return ret; ++ ++} ++#else ++int rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv ) ++{ ++ _irqL irqL; ++ _list *phead; ++ u8 CurrentAntenna; ++ unsigned char *dst_ssid, *src_ssid; ++ _adapter *adapter; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ struct wlan_network *pnetwork_max_rssi = NULL; ++ #ifdef CONFIG_LAYER2_ROAMING ++ struct wlan_network * roaming_candidate=NULL; ++ u32 cur_time=rtw_get_current_time(); ++ #endif ++ ++_func_enter_; ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ phead = get_list_head(queue); ++ adapter = (_adapter *)pmlmepriv->nic_hdl; ++ ++ pmlmepriv->pscanned = get_next( phead ); ++ ++ while (!rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) { ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ if(pnetwork==NULL){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("(2)rtw_select_and_join_from_scanned_queue return _FAIL:(pnetwork==NULL)\n")); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return _FAIL; ++ } ++ ++ dst_ssid = pnetwork->network.Ssid.Ssid; ++ src_ssid = pmlmepriv->assoc_ssid.Ssid; ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ #if 0 ++ DBG_871X("MacAddress:"MAC_FMT" ssid:%s\n", MAC_ARG(pnetwork->network.MacAddress), pnetwork->network.Ssid.Ssid); ++ #endif ++ ++ if(pmlmepriv->assoc_by_bssid==_TRUE) ++ { ++ if(_rtw_memcmp(pnetwork->network.MacAddress, pmlmepriv->assoc_bssid, ETH_ALEN)==_TRUE) ++ { ++ //remove the condition @ 20081125 ++ //if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)|| ++ // pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode) ++ // goto ask_for_joinbss; ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) ++ { ++ //DBG_871X("select_and_join(1): _FW_LINKED and is same network, it needn't join again\n"); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return 2; ++ } ++ else ++ { ++ rtw_disassoc_cmd(adapter); ++ rtw_indicate_disconnect(adapter); ++ rtw_free_assoc_resources(adapter, 0); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ ++ } ++ } ++ else ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ ++ } ++ ++ } else if (pmlmepriv->assoc_ssid.SsidLength == 0) { ++ goto ask_for_joinbss;//anyway, join first selected(dequeued) pnetwork if ssid_len=0 ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ } else if(pmlmepriv->to_roaming>0) { ++ ++ if( (roaming_candidate == NULL ||roaming_candidate->network.Rssinetwork.Rssi ) ++ && is_same_ess(&pnetwork->network, &pmlmepriv->cur_network.network) ++ //&&(!is_same_network(&pnetwork->network, &pmlmepriv->cur_network.network)) ++ && rtw_get_time_interval_ms((u32)pnetwork->last_scanned,cur_time) < 5000 ++ ) { ++ roaming_candidate = pnetwork; ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_, ++ DBG_871X ++ ("roaming_candidate???: %s("MAC_FMT")\n", ++ roaming_candidate->network.Ssid.Ssid, MAC_ARG(roaming_candidate->network.MacAddress) ) ++ //) ++ ; ++ } ++ continue; ++ #endif ++ ++ } else if ( (pnetwork->network.Ssid.SsidLength==pmlmepriv->assoc_ssid.SsidLength) ++ &&((_rtw_memcmp(dst_ssid, src_ssid, pmlmepriv->assoc_ssid.SsidLength)) == _TRUE) ++ ) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("dst_ssid=%s, src_ssid=%s \n", dst_ssid, src_ssid)); ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ adapter->HalFunc.GetHalDefVarHandler(adapter, HAL_DEF_CURRENT_ANTENNA, &(CurrentAntenna)); ++ DBG_8192C("#### dst_ssid=(%s) Opt_Ant_(%s) , cur_Ant(%s)\n", dst_ssid, ++ (2==pnetwork->network.PhyInfo.Optimum_antenna)?"A":"B", ++ (2==CurrentAntenna)?"A":"B"); ++#endif ++ //remove the condition @ 20081125 ++ //if((pmlmepriv->cur_network.network.InfrastructureMode==Ndis802_11AutoUnknown)|| ++ // pmlmepriv->cur_network.network.InfrastructureMode == pnetwork->network.InfrastructureMode) ++ //{ ++ // _rtw_memcpy(pmlmepriv->assoc_bssid, pnetwork->network.MacAddress, ETH_ALEN); ++ // goto ask_for_joinbss; ++ //} ++ ++ if(pmlmepriv->assoc_by_rssi==_TRUE)//if the ssid is the same, select the bss which has the max rssi ++ { ++ if( NULL==pnetwork_max_rssi|| pnetwork->network.Rssi > pnetwork_max_rssi->network.Rssi) ++ pnetwork_max_rssi = pnetwork; ++ } ++ else if(rtw_is_desired_network(adapter, pnetwork) == _TRUE) ++ { ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++#if 0 ++ if(is_same_network(&pmlmepriv->cur_network.network, &pnetwork->network)) ++ { ++ DBG_871X("select_and_join(2): _FW_LINKED and is same network, it needn't join again\n"); ++ ++ rtw_indicate_connect(adapter);//rtw_indicate_connect again ++ ++ return 2; ++ } ++ else ++#endif ++ { ++ rtw_disassoc_cmd(adapter); ++ //rtw_indicate_disconnect(adapter);// ++ rtw_free_assoc_resources(adapter, 0); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ } ++ else ++ { ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ goto ask_for_joinbss; ++ } ++ ++ } ++ ++ ++ } ++ ++ } ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming>0 && roaming_candidate ){ ++ pnetwork=roaming_candidate; ++ DBG_871X("select_and_join_from_scanned_queue: roaming_candidate: %s("MAC_FMT")\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress)); ++ goto ask_for_joinbss; ++ } ++ #endif ++ ++ if((pmlmepriv->assoc_by_rssi==_TRUE) && (pnetwork_max_rssi!=NULL)) ++ { ++ pnetwork = pnetwork_max_rssi; ++ DBG_871X("select_and_join_from_scanned_queue: pnetwork_max_rssi: %s("MAC_FMT")\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress)); ++ goto ask_for_joinbss; ++ } ++ ++ DBG_871X("(1)rtw_select_and_join_from_scanned_queue return _FAIL\n"); ++ ++_func_exit_; ++ ++ return _FAIL; ++ ++ask_for_joinbss: ++ ++_func_exit_; ++ ++ return rtw_joinbss_cmd(adapter, pnetwork); ++ ++} ++#endif ++ ++ ++sint rtw_set_auth(_adapter * adapter,struct security_priv *psecuritypriv) ++{ ++ struct cmd_obj* pcmd; ++ struct setauth_parm *psetauthparm; ++ struct cmd_priv *pcmdpriv=&(adapter->cmdpriv); ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; //try again ++ goto exit; ++ } ++ ++ psetauthparm=(struct setauth_parm*)rtw_zmalloc(sizeof(struct setauth_parm)); ++ if(psetauthparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetauthparm, 0, sizeof(struct setauth_parm)); ++ psetauthparm->mode=(unsigned char)psecuritypriv->dot11AuthAlgrthm; ++ ++ pcmd->cmdcode = _SetAuth_CMD_; ++ pcmd->parmbuf = (unsigned char *)psetauthparm; ++ pcmd->cmdsz = (sizeof(struct setauth_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("after enqueue set_auth_cmd, auth_mode=%x\n", psecuritypriv->dot11AuthAlgrthm)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++ ++sint rtw_set_key(_adapter * adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx) ++{ ++ u8 keylen; ++ struct cmd_obj *pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv = &(adapter->cmdpriv); ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; //try again ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ if(psecuritypriv->dot11AuthAlgrthm ==dot11AuthAlgrthm_8021X){ ++ psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(unsigned char)psecuritypriv->dot118021XGrpPrivacy=%d \n", psetkeyparm->algorithm)); ++ } ++ else{ ++ psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=(u8)psecuritypriv->dot11PrivacyAlgrthm=%d \n", psetkeyparm->algorithm)); ++ ++ } ++ psetkeyparm->keyid = (u8)keyid;//0~3 ++ psetkeyparm->set_tx = set_tx; ++ pmlmepriv->key_mask |= BIT(psetkeyparm->keyid); ++#ifdef CONFIG_AUTOSUSPEND ++ if( _TRUE == adapter->pwrctrlpriv.bInternalAutoSuspend) ++ { ++ adapter->pwrctrlpriv.wepkeymask = pmlmepriv->key_mask; ++ DBG_8192C("....AutoSuspend pwrctrlpriv.wepkeymask(%x)\n",adapter->pwrctrlpriv.wepkeymask); ++ } ++#endif ++ DBG_8192C("==> rtw_set_key algorithm(%x),keyid(%x),key_mask(%x)\n",psetkeyparm->algorithm,psetkeyparm->keyid,pmlmepriv->key_mask); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key: psetkeyparm->algorithm=%d psetkeyparm->keyid=(u8)keyid=%d \n",psetkeyparm->algorithm, keyid)); ++ ++ switch(psetkeyparm->algorithm){ ++ ++ case _WEP40_: ++ keylen=5; ++ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); ++ break; ++ case _WEP104_: ++ keylen=13; ++ _rtw_memcpy(&(psetkeyparm->key[0]), &(psecuritypriv->dot11DefKey[keyid].skey[0]), keylen); ++ break; ++ case _TKIP_: ++ keylen=16; ++ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); ++ psetkeyparm->grpkey=1; ++ break; ++ case _AES_: ++ keylen=16; ++ _rtw_memcpy(&psetkeyparm->key, &psecuritypriv->dot118021XGrpKey[keyid], keylen); ++ psetkeyparm->grpkey=1; ++ break; ++ default: ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("\n rtw_set_key:psecuritypriv->dot11PrivacyAlgrthm = %x (must be 1 or 2 or 4 or 5)\n",psecuritypriv->dot11PrivacyAlgrthm)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ //_rtw_init_sema(&(pcmd->cmd_sem), 0); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++_func_exit_; ++ return res; ++ ++} ++ ++ ++//adjust IEs for rtw_joinbss_cmd in WMM ++int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len) ++{ ++ unsigned int ielength=0; ++ unsigned int i, j; ++ ++ i = 12; //after the fixed IE ++ while(i=0 :if there is pre-auth key, and return the entry id ++// ++// ++ ++static int SecIsInPMKIDList(_adapter *Adapter, u8 *bssid) ++{ ++ struct security_priv *psecuritypriv=&Adapter->securitypriv; ++ int i=0; ++ ++ do ++ { ++ if( ( psecuritypriv->PMKIDList[i].bUsed ) && ++ ( _rtw_memcmp( psecuritypriv->PMKIDList[i].Bssid, bssid, ETH_ALEN ) == _TRUE ) ) ++ { ++ break; ++ } ++ else ++ { ++ i++; ++ //continue; ++ } ++ ++ }while(isecuritypriv; ++ ++ if(ie[13]<=20){ ++ // The RSN IE didn't include the PMK ID, append the PMK information ++ ie[ie_len]=1; ++ ie_len++; ++ ie[ie_len]=0; //PMKID count = 0x0100 ++ ie_len++; ++ _rtw_memcpy( &ie[ie_len], &psecuritypriv->PMKIDList[iEntry].PMKID, 16); ++ ++ ie_len+=16; ++ ie[13]+=18;//PMKID length = 2+16 ++ ++ } ++ return (ie_len); ++ ++} ++sint rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie, u8 *out_ie, uint in_len) ++{ ++ u8 authmode, securitytype, match; ++ u8 sec_ie[255], uncst_oui[4], bkup_ie[255]; ++ u8 wpa_oui[4]={0x0, 0x50, 0xf2, 0x01}; ++ uint ielength, cnt, remove_cnt; ++ int iEntry; ++ ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ struct security_priv *psecuritypriv=&adapter->securitypriv; ++ uint ndisauthmode=psecuritypriv->ndisauthtype; ++ uint ndissecuritytype = psecuritypriv->ndisencryptstatus; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ++ ("+rtw_restruct_sec_ie: ndisauthmode=%d ndissecuritytype=%d\n", ++ ndisauthmode, ndissecuritytype)); ++ ++ //copy fixed ie only ++ _rtw_memcpy(out_ie, in_ie,12); ++ ielength=12; ++ ++ if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK)) ++ authmode=_WPA_IE_ID_; ++ if((ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK)) ++ authmode=_WPA2_IE_ID_; ++ ++ if(psecuritypriv->wps_phase == _TRUE) ++ { ++ //DBG_871X("wps_phase == _TRUE\n"); ++ ++ _rtw_memcpy(out_ie+ielength, psecuritypriv->wps_ie, psecuritypriv->wps_ie_len); ++ ++ ielength += psecuritypriv->wps_ie_len; ++ psecuritypriv->wps_phase = _FALSE; ++ ++ } ++ else if((ndisauthmode==Ndis802_11AuthModeWPA)||(ndisauthmode==Ndis802_11AuthModeWPAPSK)||(ndisauthmode==Ndis802_11AuthModeWPA2)||(ndisauthmode==Ndis802_11AuthModeWPA2PSK)) ++ { ++ //copy RSN or SSN ++ _rtw_memcpy(&out_ie[ielength], &psecuritypriv->supplicant_ie[0], psecuritypriv->supplicant_ie[1]+2); ++ ielength+=psecuritypriv->supplicant_ie[1]+2; ++ ++ rtw_report_sec_ie(adapter, authmode, psecuritypriv->supplicant_ie); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ drvext_report_sec_ie(&adapter->drvextpriv, authmode, sec_ie); ++#endif ++ ++ ++ ++ } ++ iEntry = SecIsInPMKIDList(adapter, pmlmepriv->assoc_bssid); ++ if(iEntry<0) ++ { ++ return ielength; ++ } ++ else ++ { ++ if(authmode == _WPA2_IE_ID_) ++ { ++ ielength=rtw_append_pmkid(adapter, iEntry, out_ie, ielength); ++ } ++ } ++ ++_func_exit_; ++ ++ return ielength; ++} ++ ++void rtw_init_registrypriv_dev_network( _adapter* adapter) ++{ ++ struct registry_priv* pregistrypriv = &adapter->registrypriv; ++ struct eeprom_priv* peepriv = &adapter->eeprompriv; ++ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; ++ u8 *myhwaddr = myid(peepriv); ++ ++_func_enter_; ++ ++ _rtw_memcpy(pdev_network->MacAddress, myhwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(&pdev_network->Ssid, &pregistrypriv->ssid, sizeof(NDIS_802_11_SSID)); ++ ++ pdev_network->Configuration.Length=sizeof(NDIS_802_11_CONFIGURATION); ++ pdev_network->Configuration.BeaconPeriod = 100; ++ pdev_network->Configuration.FHConfig.Length = 0; ++ pdev_network->Configuration.FHConfig.HopPattern = 0; ++ pdev_network->Configuration.FHConfig.HopSet = 0; ++ pdev_network->Configuration.FHConfig.DwellTime = 0; ++ ++ ++_func_exit_; ++ ++} ++ ++void rtw_update_registrypriv_dev_network(_adapter* adapter) ++{ ++ int sz=0; ++ struct registry_priv* pregistrypriv = &adapter->registrypriv; ++ WLAN_BSSID_EX *pdev_network = &pregistrypriv->dev_network; ++ struct security_priv* psecuritypriv = &adapter->securitypriv; ++ struct wlan_network *cur_network = &adapter->mlmepriv.cur_network; ++ struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ ++_func_enter_; ++ ++#if 0 ++ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; ++ pxmitpriv->vcs = pregistrypriv->vcs_type; ++ pxmitpriv->vcs_type = pregistrypriv->vcs_type; ++ //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; ++ pxmitpriv->frag_len = pregistrypriv->frag_thresh; ++ ++ adapter->qospriv.qos_option = pregistrypriv->wmm_enable; ++#endif ++ ++ pdev_network->Privacy = (psecuritypriv->dot11PrivacyAlgrthm > 0 ? 1 : 0) ; // adhoc no 802.1x ++ ++ pdev_network->Rssi = 0; ++ ++ switch(pregistrypriv->wireless_mode) ++ { ++ case WIRELESS_11B: ++ pdev_network->NetworkTypeInUse = (Ndis802_11DS); ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11_24N: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); ++ break; ++ case WIRELESS_11A: ++ case WIRELESS_11A_5N: ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); ++ break; ++ case WIRELESS_11ABGN: ++ if(pregistrypriv->channel > 14) ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM5); ++ else ++ pdev_network->NetworkTypeInUse = (Ndis802_11OFDM24); ++ break; ++ default : ++ // TODO ++ break; ++ } ++ ++ pdev_network->Configuration.DSConfig = (pregistrypriv->channel); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("pregistrypriv->channel=%d, pdev_network->Configuration.DSConfig=0x%x\n", pregistrypriv->channel, pdev_network->Configuration.DSConfig)); ++ ++ if(cur_network->network.InfrastructureMode == Ndis802_11IBSS) ++ pdev_network->Configuration.ATIMWindow = (0); ++ ++ pdev_network->InfrastructureMode = (cur_network->network.InfrastructureMode); ++ ++ // 1. Supported rates ++ // 2. IE ++ ++ //rtw_set_supported_rate(pdev_network->SupportedRates, pregistrypriv->wireless_mode) ; // will be called in rtw_generate_ie ++ sz = rtw_generate_ie(pregistrypriv); ++ ++ pdev_network->IELength = sz; ++ ++ pdev_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pdev_network); ++ ++ //notes: translate IELength & Length after assign the Length to cmdsz in createbss_cmd(); ++ //pdev_network->IELength = cpu_to_le32(sz); ++ ++_func_exit_; ++ ++} ++ ++void rtw_get_encrypt_decrypt_from_registrypriv(_adapter* adapter) ++{ ++ u16 wpaconfig=0; ++ struct registry_priv* pregistrypriv = &adapter->registrypriv; ++ struct security_priv* psecuritypriv= &adapter->securitypriv; ++_func_enter_; ++ ++ ++_func_exit_; ++ ++} ++ ++//the fucntion is at passive_level ++void rtw_joinbss_reset(_adapter *padapter) ++{ ++ u8 threshold; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++#ifdef CONFIG_80211N_HT ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++#endif ++ ++ //todo: if you want to do something io/reg/hw setting before join_bss, please add code here ++ ++ ++ ++ ++#ifdef CONFIG_80211N_HT ++ ++ pmlmepriv->num_FortyMHzIntolerant = 0; ++ ++ pmlmepriv->num_sta_no_ht = 0; ++ ++ phtpriv->ampdu_enable = _FALSE;//reset to disabled ++ ++#ifdef CONFIG_USB_HCI ++ // TH=1 => means that invalidate usb rx aggregation ++ // TH=0 => means that validate usb rx aggregation, use init value. ++ if(phtpriv->ht_option) ++ { ++ if(padapter->registrypriv.wifi_spec==1) ++ threshold = 1; ++ else ++ threshold = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++ else ++ { ++ threshold = 1; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold)); ++ } ++#endif ++ ++#endif ++ ++} ++ ++ ++#ifdef CONFIG_80211N_HT ++ ++//the fucntion is >= passive_level ++unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len) ++{ ++ u32 ielen, out_len; ++ unsigned char *p, *pframe; ++ struct rtw_ieee80211_ht_cap ht_capie; ++ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++ ++ phtpriv->ht_option = _FALSE; ++ ++ p = rtw_get_ie(in_ie+12, _HT_CAPABILITY_IE_, &ielen, in_len-12); ++ ++ if(p && ielen>0) ++ { ++ if(pqospriv->qos_option == 0) ++ { ++ out_len = *pout_len; ++ pframe = rtw_set_ie(out_ie+out_len, _VENDOR_SPECIFIC_IE_, ++ _WMM_IE_Length_, WMM_IE, pout_len); ++ ++ pqospriv->qos_option = 1; ++ } ++ ++ out_len = *pout_len; ++ ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC | ++ IEEE80211_HT_CAP_DSSSCCK40; ++ ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ if(max_recvbuf_sz-rx_packet_offset>(8191-256)) { ++ DBG_871X("%s IEEE80211_HT_CAP_MAX_AMSDU is set\n", __FUNCTION__); ++ ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ } ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ if(padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ ) ++ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ else ++ ht_capie.ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ ++ ++ pframe = rtw_set_ie(out_ie+out_len, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, pout_len); ++ ++ ++ //_rtw_memcpy(out_ie+out_len, p, ielen+2);//gtest ++ //*pout_len = *pout_len + (ielen+2); ++ ++ ++ phtpriv->ht_option = _TRUE; ++ ++ p = rtw_get_ie(in_ie+12, _HT_ADD_INFO_IE_, &ielen, in_len-12); ++ if(p && (ielen==sizeof(struct ieee80211_ht_addt_info))) ++ { ++ out_len = *pout_len; ++ pframe = rtw_set_ie(out_ie+out_len, _HT_ADD_INFO_IE_, ielen, p+2 , pout_len); ++ } ++ ++ } ++ ++ return (phtpriv->ht_option); ++ ++} ++ ++//the fucntion is > passive_level (in critical_section) ++void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len) ++{ ++ u8 *p, max_ampdu_sz; ++ int len; ++ //struct sta_info *bmc_sta, *psta; ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ struct ieee80211_ht_addt_info *pht_addtinfo; ++ //struct recv_reorder_ctrl *preorder_ctrl; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ //struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ //struct wlan_network *pcur_network = &(pmlmepriv->cur_network);; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if(!phtpriv->ht_option) ++ return; ++ ++ if ((!pmlmeinfo->HT_info_enable) || (!pmlmeinfo->HT_caps_enable)) ++ return; ++ ++ DBG_871X("+rtw_update_ht_cap()\n"); ++ ++ //maybe needs check if ap supports rx ampdu. ++ if((phtpriv->ampdu_enable==_FALSE) &&(pregistrypriv->ampdu_enable==1)) ++ { ++ if(pregistrypriv->wifi_spec==1) ++ { ++ phtpriv->ampdu_enable = _FALSE; ++ } ++ else ++ { ++ phtpriv->ampdu_enable = _TRUE; ++ } ++ } ++ else if(pregistrypriv->ampdu_enable==2) ++ { ++ phtpriv->ampdu_enable = _TRUE; ++ } ++ ++ ++ //check Max Rx A-MPDU Size ++ len = 0; ++ p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_CAPABILITY_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); ++ if(p && len>0) ++ { ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ max_ampdu_sz = (pht_capie->ampdu_params_info & IEEE80211_HT_CAP_AMPDU_FACTOR); ++ max_ampdu_sz = 1 << (max_ampdu_sz+3); // max_ampdu_sz (kbytes); ++ ++ //DBG_8192C("rtw_update_ht_cap(): max_ampdu_sz=%d\n", max_ampdu_sz); ++ phtpriv->rx_ampdu_maxlen = max_ampdu_sz; ++ ++ } ++ ++ ++ len=0; ++ p = rtw_get_ie(pie+sizeof (NDIS_802_11_FIXED_IEs), _HT_ADD_INFO_IE_, &len, ie_len-sizeof (NDIS_802_11_FIXED_IEs)); ++ if(p && len>0) ++ { ++ pht_addtinfo = (struct ieee80211_ht_addt_info *)(p+2); ++ //todo: ++ } ++ ++ ++ //update cur_bwmode & cur_ch_offset ++ if ((pregistrypriv->cbw40_enable) && ++ (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & BIT(1)) && ++ (pmlmeinfo->HT_info.infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode accoring to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) ++ { ++ case HT_EXTCHNL_OFFSET_UPPER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case HT_EXTCHNL_OFFSET_LOWER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ } ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++ ++ ++#if 0 //move to rtw_update_sta_info_client() ++ //for A-MPDU Rx reordering buffer control for bmc_sta & sta_info ++ //if A-MPDU Rx is enabled, reseting rx_ordering_ctrl wstart_b(indicate_seq) to default value=0xffff ++ //todo: check if AP can send A-MPDU packets ++ bmc_sta = rtw_get_bcmc_stainfo(padapter); ++ if(bmc_sta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &bmc_sta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++ ++ psta = rtw_get_stainfo(&padapter->stapriv, pcur_network->network.MacAddress); ++ if(psta) ++ { ++ for(i=0; i < 16 ; i++) ++ { ++ //preorder_ctrl = &precvpriv->recvreorder_ctrl[i]; ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ preorder_ctrl->wsize_b = 64;//max_ampdu_sz;//ex. 32(kbytes) -> wsize_b=32 ++ } ++ } ++#endif ++ ++} ++ ++void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ u8 issued; ++ int priority; ++ struct sta_info *psta=NULL; ++ struct ht_priv *phtpriv; ++ struct pkt_attrib *pattrib =&pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ ++ if(bmcst || (padapter->mlmepriv.LinkDetectInfo.bTxBusyTraffic == _FALSE)) ++ return; ++ ++ priority = pattrib->priority; ++ ++ if (pattrib->psta) ++ psta = pattrib->psta; ++ else ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ ++ if(psta==NULL) ++ return; ++ ++ phtpriv = &psta->htpriv; ++ ++ if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) ++ { ++ issued = (phtpriv->agg_enable_bitmap>>priority)&0x1; ++ issued |= (phtpriv->candidate_tid_bitmap>>priority)&0x1; ++ ++ if(0==issued) ++ { ++ DBG_871X("rtw_issue_addbareq_cmd, p=%d\n", priority); ++ psta->htpriv.candidate_tid_bitmap |= BIT((u8)priority); ++ rtw_addbareq_cmd(padapter,(u8) priority, pattrib->ra); ++ } ++ } ++ ++} ++ ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _rtw_roaming(padapter, tgt_network); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ int do_join_r; ++ ++ struct wlan_network *pnetwork; ++ ++ if(tgt_network != NULL) ++ pnetwork = tgt_network; ++ else ++ pnetwork = &pmlmepriv->cur_network; ++ ++ if(0 < pmlmepriv->to_roaming) { ++ DBG_871X("roaming from %s("MAC_FMT"), length:%d\n", ++ pnetwork->network.Ssid.Ssid, MAC_ARG(pnetwork->network.MacAddress), ++ pnetwork->network.Ssid.SsidLength); ++ _rtw_memcpy(&pmlmepriv->assoc_ssid, &pnetwork->network.Ssid, sizeof(NDIS_802_11_SSID)); ++ ++ pmlmepriv->assoc_by_bssid = _FALSE; ++ ++ while(1) { ++ if( _SUCCESS==(do_join_r=rtw_do_join(padapter)) ) { ++ break; ++ } else { ++ DBG_871X("roaming do_join return %d\n", do_join_r); ++ pmlmepriv->to_roaming--; ++ ++ if(0< pmlmepriv->to_roaming) { ++ continue; ++ } else { ++ DBG_871X("%s(%d) -to roaming fail, indicate_disconnect\n", __FUNCTION__,__LINE__); ++ rtw_indicate_disconnect(padapter); ++ break; ++ } ++ } ++ } ++ } ++ ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mlme_ext.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,12270 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MLME_EXT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct mlme_handler mlme_sta_tbl[]={ ++ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, ++ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, ++ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, ++ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, ++ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, ++ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, ++ ++ /*---------------------------------------------------------- ++ below 2 are reserved ++ -----------------------------------------------------------*/ ++ {0, "DoReserved", &DoReserved}, ++ {0, "DoReserved", &DoReserved}, ++ {WIFI_BEACON, "OnBeacon", &OnBeacon}, ++ {WIFI_ATIM, "OnATIM", &OnAtim}, ++ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, ++ {WIFI_AUTH, "OnAuth", &OnAuthClient}, ++ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, ++ {WIFI_ACTION, "OnAction", &OnAction}, ++}; ++ ++#ifdef _CONFIG_NATIVEAP_MLME_ ++struct mlme_handler mlme_ap_tbl[]={ ++ {WIFI_ASSOCREQ, "OnAssocReq", &OnAssocReq}, ++ {WIFI_ASSOCRSP, "OnAssocRsp", &OnAssocRsp}, ++ {WIFI_REASSOCREQ, "OnReAssocReq", &OnAssocReq}, ++ {WIFI_REASSOCRSP, "OnReAssocRsp", &OnAssocRsp}, ++ {WIFI_PROBEREQ, "OnProbeReq", &OnProbeReq}, ++ {WIFI_PROBERSP, "OnProbeRsp", &OnProbeRsp}, ++ ++ /*---------------------------------------------------------- ++ below 2 are reserved ++ -----------------------------------------------------------*/ ++ {0, "DoReserved", &DoReserved}, ++ {0, "DoReserved", &DoReserved}, ++ {WIFI_BEACON, "OnBeacon", &OnBeacon}, ++ {WIFI_ATIM, "OnATIM", &OnAtim}, ++ {WIFI_DISASSOC, "OnDisassoc", &OnDisassoc}, ++ {WIFI_AUTH, "OnAuth", &OnAuth}, ++ {WIFI_DEAUTH, "OnDeAuth", &OnDeAuth}, ++ {WIFI_ACTION, "OnAction", &OnAction}, ++}; ++#endif ++ ++struct action_handler OnAction_tbl[]={ ++ {RTW_WLAN_CATEGORY_SPECTRUM_MGMT, "ACTION_SPECTRUM_MGMT", &DoReserved}, ++ {RTW_WLAN_CATEGORY_QOS, "ACTION_QOS", &OnAction_qos}, ++ {RTW_WLAN_CATEGORY_DLS, "ACTION_DLS", &OnAction_dls}, ++ {RTW_WLAN_CATEGORY_BACK, "ACTION_BACK", &OnAction_back}, ++ {RTW_WLAN_CATEGORY_PUBLIC, "ACTION_PUBLIC", &OnAction_public}, ++ {RTW_WLAN_CATEGORY_RADIO_MEASUREMENT, "ACTION_RADIO_MEASUREMENT", &DoReserved}, ++ {RTW_WLAN_CATEGORY_FT, "ACTION_FT", &DoReserved}, ++ {RTW_WLAN_CATEGORY_HT, "ACTION_HT", &OnAction_ht}, ++ {RTW_WLAN_CATEGORY_SA_QUERY, "ACTION_SA_QUERY", &DoReserved}, ++ {RTW_WLAN_CATEGORY_WMM, "ACTION_WMM", &OnAction_wmm}, ++ {RTW_WLAN_CATEGORY_P2P, "ACTION_P2P", &OnAction_p2p}, ++}; ++ ++ ++/************************************************** ++OUI definitions for the vendor specific IE ++***************************************************/ ++unsigned char WPA_OUI[] = {0x00, 0x50, 0xf2, 0x01}; ++unsigned char WMM_OUI[] = {0x00, 0x50, 0xf2, 0x02}; ++unsigned char WPS_OUI[] = {0x00, 0x50, 0xf2, 0x04}; ++unsigned char P2P_OUI[] = {0x50,0x6F,0x9A,0x09}; ++unsigned char WFD_OUI[] = {0x50,0x6F,0x9A,0x0A}; ++ ++unsigned char WMM_INFO_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; ++unsigned char WMM_PARA_OUI[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ ++unsigned char WPA_TKIP_CIPHER[4] = {0x00, 0x50, 0xf2, 0x02}; ++unsigned char RSN_TKIP_CIPHER[4] = {0x00, 0x0f, 0xac, 0x02}; ++ ++extern unsigned char REALTEK_96B_IE[]; ++ ++/******************************************************** ++MCS rate definitions ++*********************************************************/ ++#ifdef CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_2R[16] = {0xff, 0x1f, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++#else //CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_2R[16] = {0xff, 0xff, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++#endif //CONFIG_DISABLE_MCS13TO15 ++unsigned char MCS_rate_1R[16] = {0xff, 0x00, 0x0, 0x0, 0x01, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}; ++ ++/******************************************************** ++ChannelPlan definitions ++*********************************************************/ ++/*static RT_CHANNEL_PLAN DefaultChannelPlan[RT_CHANNEL_DOMAIN_MAX] = { ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},32}, // 0x00, RT_CHANNEL_DOMAIN_FCC ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},31}, // 0x01, RT_CHANNEL_DOMAIN_IC ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x02, RT_CHANNEL_DOMAIN_ETSI ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x03, RT_CHANNEL_DOMAIN_SPAIN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x04, RT_CHANNEL_DOMAIN_FRANCE ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x05, RT_CHANNEL_DOMAIN_MKK ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x06, RT_CHANNEL_DOMAIN_MKK1 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64},21}, // 0x07, RT_CHANNEL_DOMAIN_ISRAEL ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14,36,40,44,48,52,56,60,64},22}, // 0x08, RT_CHANNEL_DOMAIN_TELEC ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 ++ {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},26}, // 0x0B, RT_CHANNEL_DOMAIN_TAIWAN ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,149,153,157,161,165},18}, // 0x0C, RT_CHANNEL_DOMAIN_CHINA ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,149,153,157,161,165},24}, // 0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},31}, // 0x0E, RT_CHANNEL_DOMAIN_KOREA ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,52,56,60,64},19}, // 0x0F, RT_CHANNEL_DOMAIN_TURKEY ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},32}, // 0x10, RT_CHANNEL_DOMAIN_JAPAN ++ {{1,2,3,4,5,6,7,8,9,10,11,36,40,44,48,149,153,157,161,165},20}, // 0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48},17}, // 0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G ++ {{1,2,3,4,5,6,7,8,9,10,11,56,60,64,149,153,157,161,165},19}, // 0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS ++};*/ ++ ++static RT_CHANNEL_PLAN_2G RTW_ChannelPlan2G[RT_CHANNEL_DOMAIN_2G_MAX] = { ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x00, RT_CHANNEL_DOMAIN_2G_WORLD , Passive scan CH 12, 13 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13},13}, // 0x01, RT_CHANNEL_DOMAIN_2G_ETSI1 ++ {{1,2,3,4,5,6,7,8,9,10,11},11}, // 0x02, RT_CHANNEL_DOMAIN_2G_FCC1 ++ {{1,2,3,4,5,6,7,8,9,10,11,12,13,14},14}, // 0x03, RT_CHANNEL_DOMAIN_2G_MIKK1 ++ {{10,11,12,13},4}, // 0x04, RT_CHANNEL_DOMAIN_2G_ETSI2 ++}; ++ ++static RT_CHANNEL_PLAN_5G RTW_ChannelPlan5G[RT_CHANNEL_DOMAIN_5G_MAX] = { ++ {{},0}, // 0x00, RT_CHANNEL_DOMAIN_5G_NULL ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x01, RT_CHANNEL_DOMAIN_5G_ETSI1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x02, RT_CHANNEL_DOMAIN_5G_ETSI2 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,149,153,157,161,165},22}, // 0x03, RT_CHANNEL_DOMAIN_5G_ETSI3 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},24}, // 0x04, RT_CHANNEL_DOMAIN_5G_FCC1 ++ {{36,40,44,48,149,153,157,161,165},9}, // 0x05, RT_CHANNEL_DOMAIN_5G_FCC2 ++ {{36,40,44,48,52,56,60,64,149,153,157,161,165},13}, // 0x06, RT_CHANNEL_DOMAIN_5G_FCC3 ++ {{36,40,44,48,52,56,60,64,149,153,157,161},12}, // 0x07, RT_CHANNEL_DOMAIN_5G_FCC4 ++ {{149,153,157,161,165},5}, // 0x08, RT_CHANNEL_DOMAIN_5G_FCC5 ++ {{36,40,44,48,52,56,60,64},8}, // 0x09, RT_CHANNEL_DOMAIN_5G_FCC6 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},20}, // 0x0A, RT_CHANNEL_DOMAIN_5G_FCC7_IC1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,149,153,157,161,165},20}, // 0x0B, RT_CHANNEL_DOMAIN_5G_KCC1 ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140},19}, // 0x0C, RT_CHANNEL_DOMAIN_5G_MKK1 ++ {{36,40,44,48,52,56,60,64},8}, // 0x0D, RT_CHANNEL_DOMAIN_5G_MKK2 ++ {{100,104,108,112,116,120,124,128,132,136,140},11}, // 0x0E, RT_CHANNEL_DOMAIN_5G_MKK3 ++ {{56,60,64,100,104,108,112,116,136,140,149,153,157,161,165},15}, // 0x0F, RT_CHANNEL_DOMAIN_5G_NCC1 ++ {{56,60,64,149,153,157,161,165},8}, // 0x10, RT_CHANNEL_DOMAIN_5G_NCC2 ++ ++ //===== Driver self defined for old channel plan Compatible ,Remember to modify if have new channel plan definition ===== ++ {{36,40,44,48,52,56,60,64,100,104,108,112,116,132,136,140,149,153,157,161,165},21}, // 0x11, RT_CHANNEL_DOMAIN_5G_FCC ++ {{36,40,44,48},4}, // 0x12, RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS ++}; ++ ++static RT_CHANNEL_PLAN_MAP RTW_ChannelPlanMap[RT_CHANNEL_DOMAIN_MAX] = { ++ //===== 0x00 ~ 0x1F , Old Define ===== ++ {0x02,0x11}, //0x00, RT_CHANNEL_DOMAIN_FCC ++ {0x02,0x0A}, //0x01, RT_CHANNEL_DOMAIN_IC ++ {0x01,0x01}, //0x02, RT_CHANNEL_DOMAIN_ETSI ++ {0x01,0x00}, //0x03, RT_CHANNEL_DOMAIN_SPAIN ++ {0x01,0x00}, //0x04, RT_CHANNEL_DOMAIN_FRANCE ++ {0x01,0x00}, //0x05, RT_CHANNEL_DOMAIN_MKK ++ {0x01,0x00}, //0x06, RT_CHANNEL_DOMAIN_MKK1 ++ {0x01,0x09}, //0x07, RT_CHANNEL_DOMAIN_ISRAEL ++ {0x03,0x09}, //0x08, RT_CHANNEL_DOMAIN_TELEC ++ {0x03,0x00}, //0x09, RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN ++ {0x00,0x00}, //0x0A, RT_CHANNEL_DOMAIN_WORLD_WIDE_13 ++ {0x02,0x0F}, //0x0B, RT_CHANNEL_DOMAIN_TAIWAN ++ {0x01,0x08}, //0x0C, RT_CHANNEL_DOMAIN_CHINA ++ {0x02,0x06}, //0x0D, RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO ++ {0x02,0x0B}, //0x0E, RT_CHANNEL_DOMAIN_KOREA ++ {0x02,0x09}, //0x0F, RT_CHANNEL_DOMAIN_TURKEY ++ {0x01,0x01}, //0x10, RT_CHANNEL_DOMAIN_JAPAN ++ {0x02,0x05}, //0x11, RT_CHANNEL_DOMAIN_FCC_NO_DFS ++ {0x01,0x12}, //0x12, RT_CHANNEL_DOMAIN_JAPAN_NO_DFS ++ {0x00,0x04}, //0x13, RT_CHANNEL_DOMAIN_WORLD_WIDE_5G ++ {0x02,0x10}, //0x14, RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS ++ {0x00,0x00}, //0x15, ++ {0x00,0x00}, //0x16, ++ {0x00,0x00}, //0x17, ++ {0x00,0x00}, //0x18, ++ {0x00,0x00}, //0x19, ++ {0x00,0x00}, //0x1A, ++ {0x00,0x00}, //0x1B, ++ {0x00,0x00}, //0x1C, ++ {0x00,0x00}, //0x1D, ++ {0x00,0x00}, //0x1E, ++ {0x00,0x00}, //0x1F, ++ ++ //===== 0x20 ~ 0x7F ,New Define ===== ++ {0x00,0x00}, //0x20, RT_CHANNEL_DOMAIN_WORLD_NULL ++ {0x01,0x00}, //0x21, RT_CHANNEL_DOMAIN_ETSI1_NULL ++ {0x02,0x00}, //0x22, RT_CHANNEL_DOMAIN_FCC1_NULL ++ {0x03,0x00}, //0x23, RT_CHANNEL_DOMAIN_MKK1_NULL ++ {0x04,0x00}, //0x24, RT_CHANNEL_DOMAIN_ETSI2_NULL ++ {0x02,0x04}, //0x25, RT_CHANNEL_DOMAIN_FCC1_FCC1 ++ {0x00,0x01}, //0x26, RT_CHANNEL_DOMAIN_WORLD_ETSI1 ++ {0x03,0x0C}, //0x27, RT_CHANNEL_DOMAIN_MKK1_MKK1 ++ {0x00,0x0B}, //0x28, RT_CHANNEL_DOMAIN_WORLD_KCC1 ++ {0x00,0x05}, //0x29, RT_CHANNEL_DOMAIN_WORLD_FCC2 ++ {0x00,0x00}, //0x2A, ++ {0x00,0x00}, //0x2B, ++ {0x00,0x00}, //0x2C, ++ {0x00,0x00}, //0x2D, ++ {0x00,0x00}, //0x2E, ++ {0x00,0x00}, //0x2F, ++ {0x00,0x06}, //0x30, RT_CHANNEL_DOMAIN_WORLD_FCC3 ++ {0x00,0x07}, //0x31, RT_CHANNEL_DOMAIN_WORLD_FCC4 ++ {0x00,0x08}, //0x32, RT_CHANNEL_DOMAIN_WORLD_FCC5 ++ {0x00,0x09}, //0x33, RT_CHANNEL_DOMAIN_WORLD_FCC6 ++ {0x02,0x0A}, //0x34, RT_CHANNEL_DOMAIN_FCC1_FCC7 ++ {0x00,0x02}, //0x35, RT_CHANNEL_DOMAIN_WORLD_ETSI2 ++ {0x00,0x03}, //0x36, RT_CHANNEL_DOMAIN_WORLD_ETSI3 ++ {0x03,0x0D}, //0x37, RT_CHANNEL_DOMAIN_MKK1_MKK2 ++ {0x03,0x0E}, //0x38, RT_CHANNEL_DOMAIN_MKK1_MKK3 ++ {0x02,0x0F}, //0x39, RT_CHANNEL_DOMAIN_FCC1_NCC1 ++ {0x00,0x00}, //0x3A, ++ {0x00,0x00}, //0x3B, ++ {0x00,0x00}, //0x3C, ++ {0x00,0x00}, //0x3D, ++ {0x00,0x00}, //0x3E, ++ {0x00,0x00}, //0x3F, ++ {0x02,0x10}, //0x40, RT_CHANNEL_DOMAIN_FCC1_NCC2 ++}; ++ ++static RT_CHANNEL_PLAN_MAP RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE = {0x02,0x05}; ++ ++/* ++* Test if the given @param channel_set contains the channel specified by @param channel_num ++* @param channel_set the given channel set ++* @param channel_num the given channel number ++* @return _TRUE or _FALSE ++*/ ++int rtw_is_channel_set_contains_channel(RT_CHANNEL_INFO *channel_set, const u32 channel_num) ++{ ++ int i; ++ for(i=0;channel_set[i].ChannelNum!=0;i++){ ++ if(channel_num == channel_set[i].ChannelNum) ++ return _TRUE; ++ } ++ if(channel_set[i].ChannelNum == 0) ++ return _FALSE; ++ return _TRUE; ++} ++ ++/**************************************************************************** ++ ++Following are the initialization functions for WiFi MLME ++ ++*****************************************************************************/ ++ ++int init_hw_mlme_ext(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ //set_opmode_cmd(padapter, infra_client_with_mlme);//removed ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ return _SUCCESS; ++} ++ ++static void init_mlme_ext_priv_value(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++#ifdef CONFIG_TDLS ++ u8 i; ++#endif ++ ++ //unsigned char default_channel_set[MAX_CHANNEL_NUM] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 0, 0}; ++ unsigned char mixed_datarate[NumRates] = {_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, _6M_RATE_,_9M_RATE_, _12M_RATE_, _18M_RATE_, _24M_RATE_, _36M_RATE_, _48M_RATE_, _54M_RATE_, 0xff}; ++ unsigned char mixed_basicrate[NumRates] ={_1M_RATE_, _2M_RATE_, _5M_RATE_, _11M_RATE_, 0xff,}; ++ ++ ATOMIC_SET(&pmlmeext->event_seq, 0); ++ pmlmeext->mgnt_seq = 0;//reset to zero when disconnect at client mode ++ ++ pmlmeext->cur_channel = padapter->registrypriv.channel; ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmlmeext->retry = 0; ++ ++ pmlmeext->cur_wireless_mode = padapter->registrypriv.wireless_mode; ++ ++ //_rtw_memcpy(pmlmeext->channel_set, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Channel, DefaultChannelPlan[padapter->mlmepriv.ChannelPlan].Len); ++ //_rtw_memcpy(pmlmeext->channel_set, default_channel_set, MAX_CHANNEL_NUM); ++ _rtw_memcpy(pmlmeext->datarate, mixed_datarate, NumRates); ++ _rtw_memcpy(pmlmeext->basicrate, mixed_basicrate, NumRates); ++ ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ ++ pmlmeext->scan_abort = _FALSE; ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ pmlmeinfo->reauth_count = 0; ++ pmlmeinfo->reassoc_count = 0; ++ pmlmeinfo->link_count = 0; ++ pmlmeinfo->auth_seq = 0; ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; ++ pmlmeinfo->key_index = 0; ++ pmlmeinfo->iv = 0; ++ ++ pmlmeinfo->enc_algo = _NO_PRIVACY_; ++ pmlmeinfo->authModeToggle = 0; ++ ++ _rtw_memset(pmlmeinfo->chg_txt, 0, 128); ++ ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ pmlmeinfo->preamble_mode = PREAMBLE_AUTO; ++ ++ pmlmeinfo->dialogToken = 0; ++} ++ ++static u8 init_channel_set(_adapter* padapter, u8 ChannelPlan, RT_CHANNEL_INFO *channel_set) ++{ ++ u8 index,chanset_size = 0; ++ u8 b5GBand = _FALSE, b2_4GBand = _FALSE; ++ u8 Index2G = 0, Index5G=0; ++ ++ _rtw_memset(channel_set, 0, sizeof(RT_CHANNEL_INFO)*MAX_CHANNEL_NUM); ++ ++ if(ChannelPlan >= RT_CHANNEL_DOMAIN_MAX && ChannelPlan != RT_CHANNEL_DOMAIN_REALTEK_DEFINE) ++ { ++ DBG_871X("ChannelPlan ID %x error !!!!!\n",ChannelPlan); ++ return chanset_size; ++ } ++ ++ if(padapter->registrypriv.wireless_mode & WIRELESS_11G) ++ { ++ b2_4GBand = _TRUE; ++ if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) ++ Index2G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index2G; ++ else ++ Index2G = RTW_ChannelPlanMap[ChannelPlan].Index2G; ++ } ++ ++ if(padapter->registrypriv.wireless_mode & WIRELESS_11A) ++ { ++ b5GBand = _TRUE; ++ if(RT_CHANNEL_DOMAIN_REALTEK_DEFINE == ChannelPlan) ++ Index5G = RTW_CHANNEL_PLAN_MAP_REALTEK_DEFINE.Index5G; ++ else ++ Index5G = RTW_ChannelPlanMap[ChannelPlan].Index5G; ++ } ++ ++ if(b2_4GBand) ++ { ++ for(index=0;index= 1 && channel_set[chanset_size].ChannelNum <= 11) ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ else if((channel_set[chanset_size].ChannelNum >= 12 && channel_set[chanset_size].ChannelNum <= 14)) ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ else if(RT_CHANNEL_DOMAIN_WORLD_WIDE_13 == ChannelPlan || ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_5G == ChannelPlan || ++ RT_CHANNEL_DOMAIN_2G_WORLD == Index2G)// channel 12~13, passive scan ++ { ++ if(channel_set[chanset_size].ChannelNum <= 11) ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ else ++ { ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ } ++ ++ chanset_size++; ++ } ++ } ++ ++ if(b5GBand) ++ { ++ for(index=0;index= 149 ) ++ { ++ if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G== ChannelPlan)//passive scan for all 5G channels ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ } ++ else ++ { ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ } ++ chanset_size++; ++#else /* CONFIG_DFS */ ++ if ( RTW_ChannelPlan5G[Index5G].Channel[index] <= 48 ++ || RTW_ChannelPlan5G[Index5G].Channel[index] >= 149 ) { ++ channel_set[chanset_size].ChannelNum = RTW_ChannelPlan5G[Index5G].Channel[index]; ++ if(RT_CHANNEL_DOMAIN_WORLD_WIDE_5G== ChannelPlan)//passive scan for all 5G channels ++ channel_set[chanset_size].ScanType = SCAN_PASSIVE; ++ else ++ channel_set[chanset_size].ScanType = SCAN_ACTIVE; ++ DBG_871X("%s(): channel_set[%d].ChannelNum = %d\n", __FUNCTION__, chanset_size, channel_set[chanset_size].ChannelNum); ++ chanset_size++; ++ } ++#endif /* CONFIG_DFS */ ++ } ++ } ++ ++ return chanset_size; ++} ++ ++int init_mlme_ext_priv(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ struct registry_priv* pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((u8 *)pmlmeext, 0, sizeof(struct mlme_ext_priv)); ++ ++ pmlmeext->padapter = padapter; ++ ++ //fill_fwpriv(padapter, &(pmlmeext->fwpriv)); ++ ++ init_mlme_ext_priv_value(padapter); ++ pmlmeinfo->bAcceptAddbaReq = pregistrypriv->bAcceptAddbaReq; ++ ++ init_mlme_ext_timer(padapter); ++ ++#ifdef CONFIG_AP_MODE ++ init_mlme_ap_info(padapter); ++#endif ++ ++ pmlmeext->max_chan_nums = init_channel_set(padapter, pmlmepriv->ChannelPlan,pmlmeext->channel_set); ++ ++ pmlmeext->chan_scan_time = SURVEY_TO; ++ pmlmeext->mlmeext_init = _TRUE; ++ ++ return res; ++ ++} ++ ++void free_mlme_ext_priv (struct mlme_ext_priv *pmlmeext) ++{ ++ _adapter *padapter = pmlmeext->padapter; ++ ++ if (!padapter) ++ return; ++ ++ if (padapter->bDriverStopped == _TRUE) ++ { ++ _cancel_timer_ex(&pmlmeext->survey_timer); ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ //_cancel_timer_ex(&pmlmeext->ADDBA_timer); ++ } ++} ++ ++#ifdef CONFIG_TDLS ++int rtw_init_tdls_info(_adapter* padapter) ++{ ++ int res = _SUCCESS; ++ int i; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); ++ ++ ptdlsinfo->ap_prohibited = _FALSE; ++ ptdlsinfo->setup_state = UN_TDLS_STATE; ++ ptdlsinfo->sta_cnt = 0; ++ ptdlsinfo->sta_maximum = _FALSE; ++ ptdlsinfo->cam_entry_to_write = 6; ++ ptdlsinfo->cam_entry_to_clear = 0; ++ ptdlsinfo->ch_sensing = 0; ++ ptdlsinfo->cur_channel = 0; ++ ptdlsinfo->candidate_ch = 1; //when inplement channel switching, default candidate channel is 1 ++ ++ _rtw_spinlock_init(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_init(&ptdlsinfo->hdl_lock); ++ ++ return res; ++ ++} ++ ++void rtw_free_tdls_info(struct tdls_info *ptdlsinfo) ++{ ++ _rtw_spinlock_free(&ptdlsinfo->cmd_lock); ++ _rtw_spinlock_free(&ptdlsinfo->hdl_lock); ++ ++ _rtw_memset(ptdlsinfo, 0, sizeof(struct tdls_info) ); ++ ++} ++#endif //CONFIG_TDLS ++ ++static void UpdateBrateTbl( ++ IN PADAPTER Adapter, ++ IN u8 *mBratesOS ++) ++{ ++ u8 i; ++ u8 rate; ++ ++ // 1M, 2M, 5.5M, 11M, 6M, 12M, 24M are mandatory. ++ for(i=0;imlmeextpriv.cur_channel >= channel) ++ { ++ return (padapter->mlmeextpriv.cur_channel - channel); ++ } ++ else ++ { ++ return (channel-padapter->mlmeextpriv.cur_channel); ++ } ++ } ++ else ++ { ++ return 0; ++ } ++} ++static void _mgt_dispatcher(_adapter *padapter, struct mlme_handler *ptable, union recv_frame *precv_frame) ++{ ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ if(ptable->func) ++ { ++ //receive the frames that ra(a1) is my address or ra(a1) is bc address. ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) ++ { ++ return; ++ } ++ ++ ptable->func(padapter, precv_frame); ++ } ++ ++} ++ ++void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int index; ++ struct mlme_handler *ptable; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ++ ("+mgt_dispatcher: type(0x%x) subtype(0x%x)\n", ++ GetFrameType(pframe), GetFrameSubType(pframe))); ++ ++#if 0 ++ { ++ u8 *pbuf; ++ pbuf = GetAddr1Ptr(pframe); ++ DBG_8192C("A1-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ pbuf = GetAddr2Ptr(pframe); ++ DBG_8192C("A2-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ pbuf = GetAddr3Ptr(pframe); ++ DBG_8192C("A3-%x:%x:%x:%x:%x:%x\n", *pbuf, *(pbuf+1), *(pbuf+2), *(pbuf+3), *(pbuf+4), *(pbuf+5)); ++ } ++#endif ++ ++ if (GetFrameType(pframe) != WIFI_MGT_TYPE) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_err_, ("mgt_dispatcher: type(0x%x) error!\n", GetFrameType(pframe))); ++ return; ++ } ++ ++ //receive the frames that ra(a1) is my address or ra(a1) is bc address. ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN) && ++ !_rtw_memcmp(GetAddr1Ptr(pframe), bc_addr, ETH_ALEN)) ++ { ++ return; ++ } ++ ++ ptable = mlme_sta_tbl; ++ ++ index = GetFrameSubType(pframe) >> 4; ++ ++#ifdef CONFIG_TDLS ++ if((index << 4)==WIFI_ACTION){ ++ //category==public (4), action==TDLS_DISCOVERY_RESPONSE ++ if(*(pframe+24)==0x04 && *(pframe+25)==TDLS_DISCOVERY_RESPONSE){ ++ DBG_8192C("recv tdls discovery response frame\n"); ++ On_TDLS_Dis_Rsp(padapter, precv_frame); ++ } ++ } ++#endif ++ ++ if (index > 13) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("Currently we do not support reserved sub-fr-type=%d\n", index)); ++ return; ++ } ++ ptable += index; ++ ++#if 0//gtest ++ sa = get_sa(pframe); ++ psta = search_assoc_sta(sa, padapter); ++ // only check last cache seq number for management frame ++ if (psta != NULL) { ++ if (GetRetry(pframe)) { ++ if (GetTupleCache(pframe) == psta->rxcache->nonqos_seq){ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n")); ++ return; ++ } ++ } ++ psta->rxcache->nonqos_seq = GetTupleCache(pframe); ++ } ++#else ++ ++ if(GetRetry(pframe)) ++ { ++ //RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("drop due to decache!\n")); ++ //return; ++ } ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ switch (GetFrameSubType(pframe)) ++ { ++ case WIFI_AUTH: ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ ptable->func = &OnAuth; ++ else ++ ptable->func = &OnAuthClient; ++ //pass through ++ case WIFI_ASSOCREQ: ++ case WIFI_REASSOCREQ: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++#ifdef CONFIG_HOSTAPD_MLME ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++#endif ++ break; ++ case WIFI_PROBEREQ: ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_HOSTAPD_MLME ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++#else ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++#endif ++ } ++ else ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ case WIFI_BEACON: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ case WIFI_ACTION: ++ //if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ break; ++ default: ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ rtw_hostapd_mlme_rx(padapter, precv_frame); ++ break; ++ } ++#else ++ ++ _mgt_dispatcher(padapter, ptable, precv_frame); ++ ++#endif ++ ++} ++ ++#ifdef CONFIG_P2P ++u32 p2p_listen_state_process(_adapter *padapter, unsigned char *da) ++{ ++ issue_probersp_p2p( padapter, da); ++ return _SUCCESS; ++} ++#endif //CONFIG_P2P ++ ++ ++/**************************************************************************** ++ ++Following are the callback functions for each subtype of the management frames ++ ++*****************************************************************************/ ++ ++unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int ielen; ++ unsigned char *p; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ u8 is_valid_p2p_probereq = _FALSE; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ ++ if ( !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE) && ++ !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) && ++ !rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) ++ ) ++ { ++ // Commented by Albert 2011/03/17 ++ // mcs_rate = 0 -> CCK 1M rate ++ // mcs_rate = 1 -> CCK 2M rate ++ // mcs_rate = 2 -> CCK 5.5M rate ++ // mcs_rate = 3 -> CCK 11M rate ++ // In the P2P mode, the driver should not support the CCK rate ++ if ( pattrib->mcs_rate > 3 ) ++ { ++ if((is_valid_p2p_probereq = process_probe_req_p2p_ie(pwdinfo, pframe, len)) == _TRUE) ++ { ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) ++ { ++ p2p_listen_state_process( padapter, get_sa(pframe)); ++ ++ return _SUCCESS; ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ goto _continue; ++ } ++ } ++ } ++ } ++ ++_continue: ++#endif //CONFIG_P2P ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE)) ++ { ++ return _SUCCESS; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE && ++ check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)==_FALSE) ++ { ++ return _SUCCESS; ++ } ++ ++ ++ //DBG_871X("+OnProbeReq\n"); ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ielen, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ ++ //check (wildcard) SSID ++ if (p != NULL) ++ { ++ if(is_valid_p2p_probereq == _TRUE) ++ { ++ goto _issue_probersp; ++ } ++ ++ if ( (ielen != 0 && _FALSE ==_rtw_memcmp((void *)(p+2), (void *)cur->Ssid.Ssid, cur->Ssid.SsidLength)) ++ || (ielen == 0 && pmlmeinfo->hidden_ssid_mode) ++ ) ++ { ++ return _SUCCESS; ++ } ++ ++_issue_probersp: ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE && ++ pmlmepriv->cur_network.join_res == _TRUE) ++ { ++ //DBG_871X("+issue_probersp during ap mode\n"); ++ issue_probersp(padapter, get_sa(pframe), is_valid_p2p_probereq); ++ } ++ ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *psta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif ++ ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) ++ { ++ if( _rtw_memcmp( pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) ++ { ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) ++ { ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ issue_p2p_provision_request( padapter, ++ pwdinfo->tx_prov_disc_info.peerIFAddr, ++ pwdinfo->tx_prov_disc_info.ssid.Ssid, ++ pwdinfo->tx_prov_disc_info.ssid.SsidLength, ++ pwdinfo->tx_prov_disc_info.peerDevAddr ); ++ } ++ else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ issue_p2p_provision_request( padapter, ++ pwdinfo->tx_prov_disc_info.peerIFAddr, ++ NULL, ++ 0, ++ pwdinfo->tx_prov_disc_info.peerDevAddr ); ++ } ++ } ++ } ++ return _SUCCESS; ++ } ++ else if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ if ( _TRUE == pwdinfo->nego_req_info.benable ) ++ { ++ DBG_871X( "[%s] P2P State is GONEGO ING!\n", __FUNCTION__ ); ++ if( _rtw_memcmp( pwdinfo->nego_req_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN ) ) ++ { ++ pwdinfo->nego_req_info.benable = _FALSE; ++ issue_p2p_GO_request( padapter, pwdinfo->nego_req_info.peerDevAddr); ++ } ++ } ++ } ++#endif ++ ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ report_survey_event(padapter, precv_frame); ++ return _SUCCESS; ++ } ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) ++ { ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ psta->sta_stats.rx_mgnt_pkts++; ++ } ++ } ++ } ++ #endif ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int cam_idx; ++ struct sta_info *psta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ report_survey_event(padapter, precv_frame); ++ return _SUCCESS; ++ } ++ ++ if (_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN)) ++ { ++ if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) ++ { ++ //check the vendor of the assoc AP ++ pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pframe+sizeof(struct rtw_ieee80211_hdr_3addr), len-sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ //update TSF Value ++ update_TSF(pmlmeext, pframe, len); ++ ++ //start auth ++ start_clnt_auth(padapter); ++ ++ return _SUCCESS; ++ } ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) && (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ #ifdef CONFIG_PATCH_JOIN_WRONG_CHANNEL ++ //Merge from 8712 FW code ++ if (cmp_pkt_chnl_diff(padapter,pframe,len) != 0) ++ { // join wrong channel, deauth and reconnect ++ issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ ++ report_del_sta_event(padapter,(&(pmlmeinfo->network))->MacAddress, WLAN_REASON_JOIN_WRONG_CHANNEL); ++ pmlmeinfo->state &= (~WIFI_FW_ASSOC_SUCCESS); ++ return _SUCCESS; ++ } ++ #endif //CONFIG_PATCH_JOIN_WRONG_CHANNEL ++ ++ //update WMM, ERP in the beacon ++ //todo: the timer is used instead of the number of the beacon received ++ if ((sta_rx_pkts(psta) & 0xf) == 0) ++ { ++ //DBG_871X("update_bcn_info\n"); ++ update_beacon_info(padapter, pframe, len, psta); ++ } ++ ++#ifdef CONFIG_DFS ++ process_csa_ie(padapter, pframe, len); //channel switch announcement ++#endif //CONFIG_DFS ++ ++#ifdef CONFIG_P2P ++ process_p2p_ps_ie(padapter, (pframe + WLAN_HDR_A3_LEN), (len - WLAN_HDR_A3_LEN)); ++#endif //CONFIG_P2P ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ psta->sta_stats.rx_mgnt_pkts++; ++ #endif ++ } ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ if ((psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe))) != NULL) ++ { ++ //update WMM, ERP in the beacon ++ //todo: the timer is used instead of the number of the beacon received ++ if ((sta_rx_pkts(psta) & 0xf) == 0) ++ { ++ //DBG_871X("update_bcn_info\n"); ++ update_beacon_info(padapter, pframe, len, psta); ++ } ++ ++ #if 0 //move to validate_recv_mgnt_frame ++ psta->sta_stats.rx_mgnt_pkts++; ++ #endif ++ } ++ else ++ { ++ //allocate a new CAM entry for IBSS station ++ if ((cam_idx = allocate_fw_sta_entry(padapter)) == NUM_STA) ++ { ++ goto _END_ONBEACON_; ++ } ++ ++ //get supported rate ++ if (update_sta_support_rate(padapter, (pframe + WLAN_HDR_A3_LEN + _BEACON_IE_OFFSET_), (len - WLAN_HDR_A3_LEN - _BEACON_IE_OFFSET_), cam_idx) == _FAIL) ++ { ++ pmlmeinfo->FW_sta_info[cam_idx].status = 0; ++ goto _END_ONBEACON_; ++ } ++ ++ //update TSF Value ++ update_TSF(pmlmeext, pframe, len); ++ ++ //report sta add event ++ report_add_sta_event(padapter, GetAddr2Ptr(pframe), cam_idx); ++ } ++ } ++ } ++ ++_END_ONBEACON_: ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ unsigned int auth_mode, seq, ie_len; ++ unsigned char *sa, *p; ++ u16 algorithm; ++ int status; ++ static struct sta_info stat; ++ struct sta_info *pstat=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return _FAIL; ++ ++ DBG_871X("+OnAuth\n"); ++ ++ sa = GetAddr2Ptr(pframe); ++ ++ auth_mode = psecuritypriv->dot11AuthAlgrthm; ++ seq = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 2)); ++ algorithm = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN)); ++ ++ if (GetPrivacy(pframe)) ++ { ++#if 0 //TODO: SW rtw_wep_decrypt ++ if (SWCRYPTO) ++ { ++ status = rtw_wep_decrypt(priv, pframe, pfrinfo->pktlen, ++ priv->pmib->dot1180211AuthEntry.dot11PrivacyAlgrthm); ++ if (status == FALSE) ++ { ++ SAVE_INT_AND_CLI(flags); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"wep-decrypt a Auth frame error!\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ } ++ ++ seq = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4 + 2)); ++ algorithm = cpu_to_le16(*(unsigned short *)((unsigned int)pframe + WLAN_HDR_A3_LEN + 4)); ++#endif ++ } ++ ++ ++ DBG_871X("auth alg=%x, seq=%X\n", algorithm, seq); ++ ++ if (auth_mode == 2 && ++ psecuritypriv->dot11PrivacyAlgrthm != _WEP40_ && ++ psecuritypriv->dot11PrivacyAlgrthm != _WEP104_) ++ auth_mode = 0; ++ ++ if ((algorithm > 0 && auth_mode == 0) || // rx a shared-key auth but shared not enabled ++ (algorithm == 0 && auth_mode == 1) ) // rx a open-system auth but shared-key is enabled ++ { ++ DBG_871X("auth rejected due to bad alg [alg=%d, auth_mib=%d] %02X%02X%02X%02X%02X%02X\n", ++ algorithm, auth_mode, sa[0], sa[1], sa[2], sa[3], sa[4], sa[5]); ++ ++ status = _STATS_NO_SUPP_ALG_; ++ ++ goto auth_fail; ++ } ++ ++#if 0 //TODO:ACL control ++ phead = &priv->wlan_acl_list; ++ plist = phead->next; ++ //check sa ++ if (acl_mode == 1) // 1: positive check, only those on acl_list can be connected. ++ res = FAIL; ++ else ++ res = SUCCESS; ++ ++ while(plist != phead) ++ { ++ paclnode = list_entry(plist, struct rtw_wlan_acl_node, list); ++ plist = plist->next; ++ if (!memcmp((void *)sa, paclnode->addr, 6)) { ++ if (paclnode->mode & 2) { // deny ++ res = FAIL; ++ break; ++ } ++ else { ++ res = SUCCESS; ++ break; ++ } ++ } ++ } ++ ++ if (res != SUCCESS) { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,"auth abort because ACL!\n"); ++ return FAIL; ++ } ++#endif ++ ++ pstat = rtw_get_stainfo(pstapriv, sa); ++ if (pstat == NULL) ++ { ++ // allocate a new one ++ DBG_871X("going to alloc stainfo for sa=%02X%02X%02X%02X%02X%02X\n", sa[0],sa[1],sa[2],sa[3],sa[4],sa[5]); ++ pstat = rtw_alloc_stainfo(pstapriv, sa); ++ if (pstat == NULL) ++ { ++ DBG_871X(" Exceed the upper limit of supported clients...\n"); ++ status = _STATS_UNABLE_HANDLE_STA_; ++ goto auth_fail; ++ } ++ ++ pstat->state = WIFI_FW_AUTH_NULL; ++ pstat->auth_seq = 0; ++ ++ //pstat->flags = 0; ++ //pstat->capability = 0; ++ } ++ else ++ { ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&pstat->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&pstat->asoc_list); ++ if (pstat->expire_to > 0) ++ { ++ //TODO: STA re_auth within expire_to ++ } ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ if (seq==1) { ++ //TODO: STA re_auth and auth timeout ++ } ++ } ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->auth_list)) ++ { ++ rtw_list_insert_tail(&pstat->auth_list, &pstapriv->auth_list); ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ if (pstat->auth_seq == 0) ++ pstat->expire_to = pstapriv->auth_to; ++ ++ if ((pstat->auth_seq + 1) != seq) ++ { ++ DBG_871X("(1)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ ++ if (algorithm==0 && (auth_mode == 0 || auth_mode == 2)) ++ { ++ if (seq == 1) ++ { ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ pstat->expire_to = pstapriv->assoc_to; ++ pstat->authalg = algorithm; ++ } ++ else ++ { ++ DBG_871X("(2)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ } ++ else // shared system or auto authentication ++ { ++ if (seq == 1) ++ { ++ //prepare for the challenging txt... ++ ++ //get_random_bytes((void *)pstat->chg_txt, 128);//TODO: ++ ++ pstat->state &= ~WIFI_FW_AUTH_NULL; ++ pstat->state |= WIFI_FW_AUTH_STATE; ++ pstat->authalg = algorithm; ++ pstat->auth_seq = 2; ++ } ++ else if (seq == 3) ++ { ++ //checking for challenging txt... ++ DBG_871X("checking for challenging txt...\n"); ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + 4 + _AUTH_IE_OFFSET_ , _CHLGETXT_IE_, (int *)&ie_len, ++ len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_ - 4); ++ ++ if((p==NULL) || (ie_len<=0)) ++ { ++ DBG_871X("auth rejected because challenge failure!(1)\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ ++ if (_rtw_memcmp((void *)(p + 2), pstat->chg_txt, 128)) ++ { ++ pstat->state &= (~WIFI_FW_AUTH_STATE); ++ pstat->state |= WIFI_FW_AUTH_SUCCESS; ++ // challenging txt is correct... ++ pstat->expire_to = pstapriv->assoc_to; ++ } ++ else ++ { ++ DBG_871X("auth rejected because challenge failure!\n"); ++ status = _STATS_CHALLENGE_FAIL_; ++ goto auth_fail; ++ } ++ } ++ else ++ { ++ DBG_871X("(3)auth rejected because out of seq [rx_seq=%d, exp_seq=%d]!\n", ++ seq, pstat->auth_seq+1); ++ status = _STATS_OUT_OF_AUTH_SEQ_; ++ goto auth_fail; ++ } ++ } ++ ++ ++ // Now, we are going to issue_auth... ++ pstat->auth_seq = seq + 1; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_auth(padapter, pstat, (unsigned short)(_STATS_SUCCESSFUL_)); ++#endif ++ ++ if (pstat->state & WIFI_FW_AUTH_SUCCESS) ++ pstat->auth_seq = 0; ++ ++ ++ return _SUCCESS; ++ ++auth_fail: ++ ++ if (pstat) ++ { ++ pstat = &stat; ++ _rtw_memset((char *)pstat, '\0', sizeof(stat)); ++ pstat->auth_seq = 2; ++ _rtw_memcpy(pstat->hwaddr, sa, 6); ++ } ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_auth(padapter, pstat, (unsigned short)status); ++#endif ++ ++#endif ++ return _FAIL; ++ ++} ++ ++unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned int seq, len, status, algthm, offset; ++ unsigned char *p; ++ unsigned int go2asoc = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++ ++ if (!(pmlmeinfo->state & WIFI_FW_AUTH_STATE)) ++ return _SUCCESS; ++ ++ offset = (GetPrivacy(pframe))? 4: 0; ++ ++ algthm = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset)); ++ seq = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 2)); ++ status = le16_to_cpu(*(unsigned short *)((SIZE_PTR)pframe + WLAN_HDR_A3_LEN + offset + 4)); ++ ++ if (status != 0) ++ { ++ DBG_871X("clnt auth fail, status: %d\n", status); ++ if(status == 13)//&& pmlmeinfo->auth_algo == dot11AuthAlgrthm_Auto) ++ { ++ if(pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Open; ++ else ++ pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; ++ //pmlmeinfo->reauth_count = 0; ++ } ++ ++ set_link_timer(pmlmeext, 1); ++ goto authclnt_fail; ++ } ++ ++ if (seq == 2) ++ { ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ { ++ // legendary shared system ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _AUTH_IE_OFFSET_, _CHLGETXT_IE_, (int *)&len, ++ pkt_len - WLAN_HDR_A3_LEN - _AUTH_IE_OFFSET_); ++ ++ if (p == NULL) ++ { ++ //DBG_8192C("marc: no challenge text?\n"); ++ goto authclnt_fail; ++ } ++ ++ _rtw_memcpy((void *)(pmlmeinfo->chg_txt), (void *)(p + 2), len); ++ pmlmeinfo->auth_seq = 3; ++ issue_auth(padapter, NULL, 0); ++ set_link_timer(pmlmeext, REAUTH_TO); ++ ++ return _SUCCESS; ++ } ++ else ++ { ++ // open system ++ go2asoc = 1; ++ } ++ } ++ else if (seq == 4) ++ { ++ if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared) ++ { ++ go2asoc = 1; ++ } ++ else ++ { ++ goto authclnt_fail; ++ } ++ } ++ else ++ { ++ // this is also illegal ++ //DBG_8192C("marc: clnt auth failed due to illegal seq=%x\n", seq); ++ goto authclnt_fail; ++ } ++ ++ if (go2asoc) ++ { ++ start_clnt_assoc(padapter); ++ return _SUCCESS; ++ } ++ ++authclnt_fail: ++ ++ //pmlmeinfo->state &= ~(WIFI_FW_AUTH_STATE); ++ ++ return _FAIL; ++ ++} ++ ++unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL; ++ u16 capab_info, listen_interval; ++ struct ieee802_11_elems elems; ++ struct sta_info *pstat; ++ unsigned char reassoc, *p, *pos, *wpa_ie; ++ unsigned char rsnie_hdr[4]={0x00, 0x50, 0xf2, 0x01}; ++ unsigned char WMM_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x00, 0x01}; ++ int i, ie_len, wpa_ie_len, left; ++ unsigned long flags; ++ unsigned char supportRate[16]; ++ int supportRateNum; ++ unsigned short status = _STATS_SUCCESSFUL_; ++ unsigned short frame_type, ie_offset=0; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 p2p_status_code = P2P_STATUS_SUCCESS; ++ u8 *p2pie; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#endif // CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return _FAIL; ++ ++ frame_type = GetFrameSubType(pframe); ++ if (frame_type == WIFI_ASSOCREQ) ++ { ++ reassoc = 0; ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ } ++ else // WIFI_REASSOCREQ ++ { ++ reassoc = 1; ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ } ++ ++ ++ if (pkt_len < IEEE80211_3ADDR_LEN + ie_offset) { ++ DBG_871X("handle_assoc(reassoc=%d) - too short payload (len=%lu)" ++ "\n", reassoc, (unsigned long)pkt_len); ++ return _FAIL; ++ } ++ ++ pstat = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if (pstat == (struct sta_info *)NULL) ++ { ++ status = _RSON_CLS2_; ++ goto asoc_class2_error; ++ } ++ ++ capab_info = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN); ++ //capab_info = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ //listen_interval = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN+2)); ++ listen_interval = RTW_GET_LE16(pframe + WLAN_HDR_A3_LEN+2); ++ ++ left = pkt_len - (IEEE80211_3ADDR_LEN + ie_offset); ++ pos = pframe + (IEEE80211_3ADDR_LEN + ie_offset); ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ // check if this stat has been successfully authenticated/assocated ++ if (!((pstat->state) & WIFI_FW_AUTH_SUCCESS)) ++ { ++ if (!((pstat->state) & WIFI_FW_ASSOC_SUCCESS)) ++ { ++ status = _RSON_CLS2_; ++ goto asoc_class2_error; ++ } ++ else ++ { ++ pstat->state &= (~WIFI_FW_ASSOC_SUCCESS); ++ pstat->state |= WIFI_FW_ASSOC_STATE; ++ } ++ } ++ else ++ { ++ pstat->state &= (~WIFI_FW_AUTH_SUCCESS); ++ pstat->state |= WIFI_FW_ASSOC_STATE; ++ } ++ ++ ++#if 0// todo:tkip_countermeasures ++ if (hapd->tkip_countermeasures) { ++ resp = WLAN_REASON_MICHAEL_MIC_FAILURE; ++ goto fail; ++ } ++#endif ++ ++ pstat->capability = capab_info; ++ ++#if 0//todo: ++ //check listen_interval ++ if (listen_interval > hapd->conf->max_listen_interval) { ++ hostapd_logger(hapd, mgmt->sa, HOSTAPD_MODULE_IEEE80211, ++ HOSTAPD_LEVEL_DEBUG, ++ "Too large Listen Interval (%d)", ++ listen_interval); ++ resp = WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE; ++ goto fail; ++ } ++ ++ pstat->listen_interval = listen_interval; ++#endif ++ ++ //now parse all ieee802_11 ie to point to elems ++ if (rtw_ieee802_11_parse_elems(pos, left, &elems, 1) == ParseFailed || ++ !elems.ssid) { ++ DBG_871X("STA " MAC_FMT " sent invalid association request\n", ++ MAC_ARG(pstat->hwaddr)); ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ ++ ++ // now we should check all the fields... ++ // checking SSID ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SSID_IE_, &ie_len, ++ pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p == NULL) ++ { ++ status = _STATS_FAILURE_; ++ } ++ ++ if (ie_len == 0) // broadcast ssid, however it is not allowed in assocreq ++ status = _STATS_FAILURE_; ++ else ++ { ++ // check if ssid match ++ if (!_rtw_memcmp((void *)(p+2), cur->Ssid.Ssid, cur->Ssid.SsidLength)) ++ status = _STATS_FAILURE_; ++ ++ if (ie_len != cur->Ssid.SsidLength) ++ status = _STATS_FAILURE_; ++ } ++ ++ if(_STATS_SUCCESSFUL_ != status) ++ goto OnAssocReqFail; ++ ++ // check if the supported rate is ok ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _SUPPORTEDRATES_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p == NULL) { ++ DBG_871X("Rx a sta assoc-req which supported rate is empty!\n"); ++ // use our own rate set as statoin used ++ //_rtw_memcpy(supportRate, AP_BSSRATE, AP_BSSRATE_LEN); ++ //supportRateNum = AP_BSSRATE_LEN; ++ ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ else { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + ie_offset, _EXT_SUPPORTEDRATES_IE_ , &ie_len, ++ pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p != NULL) { ++ ++ if(supportRateNum<=sizeof(supportRate)) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ } ++ } ++ } ++ ++ //todo: mask supportRate between AP & STA -> move to update raid ++ //get_matched_rate(pmlmeext, supportRate, &supportRateNum, 0); ++ ++ //update station supportRate ++ pstat->bssratelen = supportRateNum; ++ _rtw_memcpy(pstat->bssrateset, supportRate, supportRateNum); ++ ++ ++ //check RSN/WPA/WPS ++ pstat->dot8021xalg = 0; ++ pstat->wpa_psk = 0; ++ pstat->wpa_group_cipher = 0; ++ pstat->wpa2_group_cipher = 0; ++ pstat->wpa_pairwise_cipher = 0; ++ pstat->wpa2_pairwise_cipher = 0; ++ _rtw_memset(pstat->wpa_ie, 0, sizeof(pstat->wpa_ie)); ++ if((psecuritypriv->wpa_psk & BIT(1)) && elems.rsn_ie) { ++ ++ int group_cipher=0, pairwise_cipher=0; ++ ++ wpa_ie = elems.rsn_ie; ++ wpa_ie_len = elems.rsn_ie_len; ++ ++ if(rtw_parse_wpa2_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ pstat->dot8021xalg = 1;//psk, todo:802.1x ++ pstat->wpa_psk |= BIT(1); ++ ++ pstat->wpa2_group_cipher = group_cipher&psecuritypriv->wpa2_group_cipher; ++ pstat->wpa2_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa2_pairwise_cipher; ++ ++ if(!pstat->wpa2_group_cipher) ++ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; ++ ++ if(!pstat->wpa2_pairwise_cipher) ++ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; ++ } ++ else ++ { ++ status = WLAN_STATUS_INVALID_IE; ++ } ++ ++ } else if ((psecuritypriv->wpa_psk & BIT(0)) && elems.wpa_ie) { ++ ++ int group_cipher=0, pairwise_cipher=0; ++ ++ wpa_ie = elems.wpa_ie; ++ wpa_ie_len = elems.wpa_ie_len; ++ ++ if(rtw_parse_wpa_ie(wpa_ie-2, wpa_ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ pstat->dot8021xalg = 1;//psk, todo:802.1x ++ pstat->wpa_psk |= BIT(0); ++ ++ pstat->wpa_group_cipher = group_cipher&psecuritypriv->wpa_group_cipher; ++ pstat->wpa_pairwise_cipher = pairwise_cipher&psecuritypriv->wpa_pairwise_cipher; ++ ++ if(!pstat->wpa_group_cipher) ++ status = WLAN_STATUS_GROUP_CIPHER_NOT_VALID; ++ ++ if(!pstat->wpa_pairwise_cipher) ++ status = WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID; ++ ++ } ++ else ++ { ++ status = WLAN_STATUS_INVALID_IE; ++ } ++ ++ } else { ++ wpa_ie = NULL; ++ wpa_ie_len = 0; ++ } ++ ++ if(_STATS_SUCCESSFUL_ != status) ++ goto OnAssocReqFail; ++ ++ pstat->flags &= ~(WLAN_STA_WPS | WLAN_STA_MAYBE_WPS); ++ //if (hapd->conf->wps_state && wpa_ie == NULL) { //todo: to check ap if supporting WPS ++ if(wpa_ie == NULL) { ++ if (elems.wps_ie) { ++ DBG_871X("STA included WPS IE in " ++ "(Re)Association Request - assume WPS is " ++ "used\n"); ++ pstat->flags |= WLAN_STA_WPS; ++ //wpabuf_free(sta->wps_ie); ++ //sta->wps_ie = wpabuf_alloc_copy(elems.wps_ie + 4, ++ // elems.wps_ie_len - 4); ++ } else { ++ DBG_871X("STA did not include WPA/RSN IE " ++ "in (Re)Association Request - possible WPS " ++ "use\n"); ++ pstat->flags |= WLAN_STA_MAYBE_WPS; ++ } ++ ++ ++ // AP support WPA/RSN, and sta is going to do WPS, but AP is not ready ++ // that the selected registrar of AP is _FLASE ++ if((psecuritypriv->wpa_psk >0) ++ && (pstat->flags & (WLAN_STA_WPS|WLAN_STA_MAYBE_WPS))) ++ { ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u8 selected_registrar = 0; ++ ++ rtw_get_wps_attr_content(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len, WPA_ATTR_SELECTED_REGISTRAR , &selected_registrar, NULL); ++ ++ if(!selected_registrar) ++ { ++ DBG_871X("selected_registrar is _FALSE , or AP is not ready to do WPS\n"); ++ ++ status = _STATS_UNABLE_HANDLE_STA_; ++ ++ goto OnAssocReqFail; ++ } ++ } ++ } ++ ++ } ++ else ++ { ++ int copy_len; ++ ++ if(psecuritypriv->wpa_psk == 0) ++ { ++ DBG_871X("STA " MAC_FMT ": WPA/RSN IE in association " ++ "request, but AP don't support WPA/RSN\n", MAC_ARG(pstat->hwaddr)); ++ ++ status = WLAN_STATUS_INVALID_IE; ++ ++ goto OnAssocReqFail; ++ ++ } ++ ++ if (elems.wps_ie) { ++ DBG_871X("STA included WPS IE in " ++ "(Re)Association Request - WPS is " ++ "used\n"); ++ pstat->flags |= WLAN_STA_WPS; ++ copy_len=0; ++ } ++ else ++ { ++ copy_len = ((wpa_ie_len+2) > sizeof(pstat->wpa_ie)) ? (sizeof(pstat->wpa_ie)):(wpa_ie_len+2); ++ } ++ ++ ++ if(copy_len>0) ++ _rtw_memcpy(pstat->wpa_ie, wpa_ie-2, copy_len); ++ ++ } ++ ++ ++ // check if there is WMM IE & support WWM-PS ++ pstat->flags &= ~WLAN_STA_WME; ++ pstat->qos_option = 0; ++ pstat->qos_info = 0; ++ pstat->has_legacy_ac = _TRUE; ++ pstat->uapsd_vo = 0; ++ pstat->uapsd_vi = 0; ++ pstat->uapsd_be = 0; ++ pstat->uapsd_bk = 0; ++ if (pmlmepriv->qospriv.qos_option) ++ { ++ p = pframe + WLAN_HDR_A3_LEN + ie_offset; ie_len = 0; ++ for (;;) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, pkt_len - WLAN_HDR_A3_LEN - ie_offset); ++ if (p != NULL) { ++ if (_rtw_memcmp(p+2, WMM_IE, 6)) { ++ ++ pstat->flags |= WLAN_STA_WME; ++ ++ pstat->qos_option = 1; ++ pstat->qos_info = *(p+8); ++ ++ pstat->max_sp_len = (pstat->qos_info>>5)&0x3; ++ ++ if((pstat->qos_info&0xf) !=0xf) ++ pstat->has_legacy_ac = _TRUE; ++ else ++ pstat->has_legacy_ac = _FALSE; ++ ++ if(pstat->qos_info&0xf) ++ { ++ if(pstat->qos_info&BIT(0)) ++ pstat->uapsd_vo = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_vo = 0; ++ ++ if(pstat->qos_info&BIT(1)) ++ pstat->uapsd_vi = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_vi = 0; ++ ++ if(pstat->qos_info&BIT(2)) ++ pstat->uapsd_bk = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_bk = 0; ++ ++ if(pstat->qos_info&BIT(3)) ++ pstat->uapsd_be = BIT(0)|BIT(1); ++ else ++ pstat->uapsd_be = 0; ++ ++ } ++ ++ break; ++ } ++ } ++ else { ++ break; ++ } ++ p = p + ie_len + 2; ++ } ++ } ++ ++ ++#ifdef CONFIG_80211N_HT ++ /* save HT capabilities in the sta object */ ++ _rtw_memset(&pstat->htpriv.ht_cap, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ if (elems.ht_capabilities && elems.ht_capabilities_len >= sizeof(struct rtw_ieee80211_ht_cap)) ++ { ++ pstat->flags |= WLAN_STA_HT; ++ ++ pstat->flags |= WLAN_STA_WME; ++ ++ _rtw_memcpy(&pstat->htpriv.ht_cap, elems.ht_capabilities, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ } else ++ pstat->flags &= ~WLAN_STA_HT; ++ ++ ++ if((pmlmepriv->htpriv.ht_option == _FALSE) && (pstat->flags&WLAN_STA_HT)) ++ { ++ status = _STATS_FAILURE_; ++ goto OnAssocReqFail; ++ } ++ ++ ++ if ((pstat->flags & WLAN_STA_HT) && ++ ((pstat->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (pstat->wpa_pairwise_cipher&WPA_CIPHER_TKIP))) ++ { ++ DBG_871X("HT: " MAC_FMT " tried to " ++ "use TKIP with HT association\n", MAC_ARG(pstat->hwaddr)); ++ ++ //status = WLAN_STATUS_CIPHER_REJECTED_PER_POLICY; ++ //goto OnAssocReqFail; ++ } ++#endif /* CONFIG_80211N_HT */ ++ ++ // ++ //if (hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G)//? ++ pstat->flags |= WLAN_STA_NONERP; ++ for (i = 0; i < pstat->bssratelen; i++) { ++ if ((pstat->bssrateset[i] & 0x7f) > 22) { ++ pstat->flags &= ~WLAN_STA_NONERP; ++ break; ++ } ++ } ++ ++ if (pstat->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) ++ pstat->flags |= WLAN_STA_SHORT_PREAMBLE; ++ else ++ pstat->flags &= ~WLAN_STA_SHORT_PREAMBLE; ++ ++ ++ ++ if (status != _STATS_SUCCESSFUL_) ++ goto OnAssocReqFail; ++ ++#ifdef CONFIG_P2P ++ pstat->is_p2p_device = _FALSE; ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if( (p2pie=rtw_get_p2p_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , NULL, &p2pielen))) ++ { ++ pstat->is_p2p_device = _TRUE; ++ if((p2p_status_code=(u8)process_assoc_req_p2p_ie(pwdinfo, pframe, pkt_len, pstat))>0) ++ { ++ pstat->p2p_status_code = p2p_status_code; ++ status = _STATS_CAP_FAIL_; ++ goto OnAssocReqFail; ++ } ++ } ++#ifdef CONFIG_WFD ++ if(rtw_get_wfd_ie(pframe + WLAN_HDR_A3_LEN + ie_offset , pkt_len - WLAN_HDR_A3_LEN - ie_offset , wfd_ie, &wfd_ielen )) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ } ++ } ++#endif ++ } ++ pstat->p2p_status_code = p2p_status_code; ++#endif //CONFIG_P2P ++ ++ //TODO: identify_proprietary_vendor_ie(); ++ // Realtek proprietary IE ++ // identify if this is Broadcom sta ++ // identify if this is ralink sta ++ // Customer proprietary IE ++ ++ ++ ++ /* get a unique AID */ ++ if (pstat->aid > 0) { ++ DBG_871X(" old AID %d\n", pstat->aid); ++ } else { ++ for (pstat->aid = 1; pstat->aid <= NUM_STA; pstat->aid++) ++ if (pstapriv->sta_aid[pstat->aid - 1] == NULL) ++ break; ++ ++ //if (pstat->aid > NUM_STA) { ++ if (pstat->aid > pstapriv->max_num_sta) { ++ ++ pstat->aid = 0; ++ ++ DBG_871X(" no room for more AIDs\n"); ++ ++ status = WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA; ++ ++ goto OnAssocReqFail; ++ ++ ++ } else { ++ pstapriv->sta_aid[pstat->aid - 1] = pstat; ++ DBG_871X("allocate new AID = (%d)\n", pstat->aid); ++ } ++ } ++ ++ ++ pstat->state &= (~WIFI_FW_ASSOC_STATE); ++ pstat->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ if (!rtw_is_list_empty(&pstat->auth_list)) ++ { ++ rtw_list_delete(&pstat->auth_list); ++ } ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&pstat->asoc_list)) ++ { ++ pstat->expire_to = pstapriv->expire_to; ++ rtw_list_insert_tail(&pstat->asoc_list, &pstapriv->asoc_list); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ // now the station is qualified to join our BSS... ++ if(pstat && (pstat->state & WIFI_FW_ASSOC_SUCCESS) && (_STATS_SUCCESSFUL_==status)) ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ //.1 bss_cap_update & sta_info_update ++ bss_cap_update(padapter, pstat); ++ sta_info_update(padapter, pstat); ++ ++ //.2 - report to upper layer ++ DBG_871X("indicate_sta_join_event to upper layer - hostapd\n"); ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ ++ if(pwdev->iftype == NL80211_IFTYPE_AP) ++ { ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_assoc(padapter, pframe, pkt_len); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ _enter_critical_bh(&pstat->lock, &irqL); ++ if(pstat->passoc_req) ++ { ++ rtw_mfree(pstat->passoc_req, pstat->assoc_req_len); ++ pstat->passoc_req = NULL; ++ pstat->assoc_req_len = 0; ++ } ++ ++ pstat->passoc_req = rtw_zmalloc(pkt_len); ++ if(pstat->passoc_req) ++ { ++ _rtw_memcpy(pstat->passoc_req, pframe, pkt_len); ++ pstat->assoc_req_len = pkt_len; ++ } ++ _exit_critical_bh(&pstat->lock, &irqL); ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_assoc_event(padapter, pstat); ++ } ++ ++ } ++ ++ ++ //.3-(1) report sta add event ++ report_add_sta_event(padapter, pstat->hwaddr, pstat->aid); ++ ++ if (frame_type == WIFI_ASSOCREQ) ++ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); ++ else ++ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); ++ ++#endif ++ } ++ ++ return _SUCCESS; ++ ++asoc_class2_error: ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ issue_deauth(padapter, (void *)GetAddr2Ptr(pframe), status); ++#endif ++ ++ return _FAIL; ++ ++OnAssocReqFail: ++ ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ pstat->aid = 0; ++ if (frame_type == WIFI_ASSOCREQ) ++ issue_asocrsp(padapter, status, pstat, WIFI_ASSOCRSP); ++ else ++ issue_asocrsp(padapter, status, pstat, WIFI_REASSOCRSP); ++#endif ++ ++ ++#endif /* CONFIG_AP_MODE */ ++ ++ return _FAIL; ++ ++} ++ ++unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ uint i; ++ int res; ++ unsigned short status; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint pkt_len = precv_frame->u.hdr.len; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++ ++ if (!(pmlmeinfo->state & (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE))) ++ return _SUCCESS; ++ ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ return _SUCCESS; ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //status ++ if ((status = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 2))) > 0) ++ { ++ DBG_871X("assoc reject, status code: %d\n", status); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ res = -4; ++ goto report_assoc_result; ++ } ++ ++ //get capabilities ++ pmlmeinfo->capability = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ //set slot time ++ pmlmeinfo->slotTime = (pmlmeinfo->capability & BIT(10))? 9: 20; ++ ++ //AID ++ res = pmlmeinfo->aid = (int)(le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN + 4))&0x3fff); ++ ++ //following are moved to join event callback function ++ //to handle HT, WMM, rate adaptive, update MAC reg ++ //for not to handle the synchronous IO in the tasklet ++ for (i = (6 + WLAN_HDR_A3_LEN); i < pkt_len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM ++ { ++ WMM_param_handler(padapter, pIE); ++ } ++#ifdef CONFIG_WFD ++ else if ( _rtw_memcmp(pIE->data, WFD_OUI, 4)) //WFD ++ { ++ printk( "[%s] Found WFD IE\n", __FUNCTION__ ); ++ WFD_info_handler( padapter, pIE ); ++ } ++#endif ++ break; ++ ++ case _HT_CAPABILITY_IE_: //HT caps ++ HT_caps_handler(padapter, pIE); ++ break; ++ ++ case _HT_EXTRA_INFO_IE_: //HT info ++ HT_info_handler(padapter, pIE); ++ break; ++ ++ case _ERPINFO_IE_: ++ ERP_IE_handler(padapter, pIE); ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ pmlmeinfo->state &= (~WIFI_FW_ASSOC_STATE); ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ //Update Basic Rate Table for spec, 2010-12-28 , by thomas ++ UpdateBrateTbl(padapter, pmlmeinfo->network.SupportedRates); ++ ++report_assoc_result: ++ ++ report_join_res(padapter, res); ++ ++ return _SUCCESS; ++} ++ ++unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned short reason; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ ++ //check A3 ++ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); ++ ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ //rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr2Ptr(pframe))); ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if(psta) ++ { ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ ap_free_sta(padapter, psta); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ } ++ ++ return _SUCCESS; ++ } ++ else ++#endif ++ { ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr3Ptr(pframe))); ++ ++ receive_disconnect(padapter, GetAddr3Ptr(pframe) ,reason); ++ } ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned short reason; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ ++ //check A3 ++ if (!(_rtw_memcmp(GetAddr3Ptr(pframe), get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++ reason = le16_to_cpu(*(unsigned short *)(pframe + WLAN_HDR_A3_LEN)); ++ ++ DBG_871X("%s Reason code(%d)\n", __FUNCTION__,reason); ++ ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ //rtw_free_stainfo(padapter, psta); ++ //_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr2Ptr(pframe))); ++ ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ if(psta) ++ { ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ ap_free_sta(padapter, psta); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ } ++ ++ return _SUCCESS; ++ } ++ else ++#endif ++ { ++ DBG_871X("%s, STA:" MAC_FMT "\n", __FUNCTION__, MAC_ARG(GetAddr3Ptr(pframe))); ++ ++ receive_disconnect(padapter, GetAddr3Ptr(pframe), reason); ++ } ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *addr; ++ struct sta_info *psta=NULL; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ unsigned char *frame_body; ++ unsigned char category, action; ++ unsigned short tid, status, reason_code = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ uint len = precv_frame->u.hdr.len; ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ return _SUCCESS; ++ ++/* ++ //check A1 matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), get_da(pframe), ETH_ALEN)) ++ return _SUCCESS; ++*/ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ return _SUCCESS; ++ ++ addr = GetAddr2Ptr(pframe); ++ psta = rtw_get_stainfo(pstapriv, addr); ++ ++ if(psta==NULL) ++ return _SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if (category == RTW_WLAN_CATEGORY_BACK)// representing Block Ack ++ { ++ if (!pmlmeinfo->HT_enable) ++ { ++ return _SUCCESS; ++ } ++ ++ action = frame_body[1]; ++ DBG_871X("%s, action=%d\n", __FUNCTION__, action); ++ switch (action) ++ { ++ case RTW_WLAN_ACTION_ADDBA_REQ: //ADDBA request ++ ++ _rtw_memcpy(&(pmlmeinfo->ADDBA_req), &(frame_body[2]), sizeof(struct ADDBA_request)); ++ //process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), GetAddr3Ptr(pframe)); ++ process_addba_req(padapter, (u8*)&(pmlmeinfo->ADDBA_req), addr); ++ ++ if(pmlmeinfo->bAcceptAddbaReq == _TRUE) ++ { ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 0); ++ } ++ else ++ { ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_ADDBA_RESP, 37);//reject ADDBA Req ++ } ++ ++ break; ++ ++ case RTW_WLAN_ACTION_ADDBA_RESP: //ADDBA response ++ ++ //status = frame_body[3] | (frame_body[4] << 8); //endian issue ++ status = RTW_GET_LE16(&frame_body[3]); ++ tid = ((frame_body[5] >> 2) & 0x7); ++ ++ if (status == 0) ++ { //successful ++ DBG_871X("agg_enable for TID=%d\n", tid); ++ psta->htpriv.agg_enable_bitmap |= 1 << tid; ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ } ++ else ++ { ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ } ++ ++ //DBG_8192C("marc: ADDBA RSP: %x\n", pmlmeinfo->agg_enable_bitmap); ++ break; ++ ++ case RTW_WLAN_ACTION_DELBA: //DELBA ++ if ((frame_body[3] & BIT(3)) == 0) ++ { ++ psta->htpriv.agg_enable_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); ++ psta->htpriv.candidate_tid_bitmap &= ~(1 << ((frame_body[3] >> 4) & 0xf)); ++ ++ //reason_code = frame_body[4] | (frame_body[5] << 8); ++ reason_code = RTW_GET_LE16(&frame_body[4]); ++ } ++ else if((frame_body[3] & BIT(3)) == BIT(3)) ++ { ++ tid = (frame_body[3] >> 4) & 0x0F; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ preorder_ctrl->enable = _FALSE; ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ } ++ ++ DBG_8192C("%s(): DELBA: %x(%x)\n", __FUNCTION__,pmlmeinfo->agg_enable_bitmap, reason_code); ++ //todo: how to notify the host while receiving DELETE BA ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ return _SUCCESS; ++} ++ ++#ifdef CONFIG_P2P ++void issue_p2p_GO_request(_adapter *padapter, u8* raddr) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_REQ; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 wpsielen = 0, p2pielen = 0, i; ++ u16 chnum = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_8192C( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pwdinfo->negotiation_dialog_token = 1; // Initialize the dialog value ++ pframe = rtw_set_fixed_ie(pframe, 1, &pwdinfo->negotiation_dialog_token, &(pattrib->pktlen)); ++ ++ ++ ++ // WPS Section ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Device Password ID ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); ++ } ++ else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); ++ } ++ else if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); ++ } ++ ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110306 ++ // According to the P2P Specification, the group negoitation request frame should contain 9 P2P attributes ++ // 1. P2P Capability ++ // 2. Group Owner Intent ++ // 3. Configuration Timeout ++ // 4. Listen Channel ++ // 5. Extended Listen Timing ++ // 6. Intended P2P Interface Address ++ // 7. Channel List ++ // 8. P2P Device Info ++ // 9. Operating Channel ++ ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ // Group Owner Intent ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Todo the tie breaker bit. ++ p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ ++ // Listen Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listening channel number ++ ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ ++ // Intended P2P Interface Address ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ chnum = ( u16 ) pmlmeext->max_chan_nums; ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + chnum ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Number of Channels ++ // Depends on the channel plan ++ p2pie[ p2pielen++ ] = pmlmeext->max_chan_nums; ++ ++ // Channel List ++ for( i = 0; i < pmlmeext->max_chan_nums; i++ ) ++ { ++ p2pie[ p2pielen++ ] = pmlmeext->channel_set[ i ].ChannelNum; ++ } ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++ ++void issue_p2p_GO_response(_adapter *padapter, u8* raddr, u8* frame_body,uint len, u8 result) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_RESP; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0, i; ++ uint wpsielen = 0; ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u16 chnum = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_8192C( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pwdinfo->negotiation_dialog_token = frame_body[7]; // The Dialog Token of provisioning discovery request frame. ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); ++ ++ // Commented by Albert 20110328 ++ // Try to get the device password ID from the WPS IE of group negotiation request frame ++ // WiFi Direct test plan 5.1.15 ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ _rtw_memset( wpsie, 0x00, 255 ); ++ wpsielen = 0; ++ ++ // WPS Section ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Device Password ID ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_PWID ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_REGISTRAR_SPEC ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_USER_SPEC ); ++ } ++ else ++ { ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_DPID_PBC ); ++ } ++ wpsielen += 2; ++ ++ // Commented by Kurt 20120113 ++ // If some device wants to do p2p handshake without sending prov_disc_req ++ // We have to get peer_req_cm from here. ++ if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) ++ { ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ } ++ else ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ } ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20100908 ++ // According to the P2P Specification, the group negoitation response frame should contain 9 P2P attributes ++ // 1. Status ++ // 2. P2P Capability ++ // 3. Group Owner Intent ++ // 4. Configuration Timeout ++ // 5. Operating Channel ++ // 6. Intended P2P Interface Address ++ // 7. Channel List ++ // 8. Device Info ++ // 9. Group ID ( Only GO ) ++ ++ ++ // ToDo: ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = result; ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ // Commented by Albert 2011/03/08 ++ // According to the P2P specification ++ // if the sending device will be client, the P2P Capability should be reserved of group negotation response frame ++ p2pie[ p2pielen++ ] = 0; ++ } ++ else ++ { ++ // Be group owner or meet the error case ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ } ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ // Group Owner Intent ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GO_INTENT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ if ( pwdinfo->peer_intent & 0x01 ) ++ { ++ // Peer's tie breaker bit is 1, our tie breaker bit should be 0 ++ p2pie[ p2pielen++ ] = ( pwdinfo->intent << 1 ); ++ } ++ else ++ { ++ // Peer's tie breaker bit is 0, our tie breaker bit should be 1 ++ p2pie[ p2pielen++ ] = ( ( pwdinfo->intent << 1 ) | BIT(0) ); ++ } ++ ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ // Intended P2P Interface Address ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTENTED_IF_ADDR; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ chnum = ( u16 ) pmlmeext->max_chan_nums; ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + chnum ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Number of Channels ++ // Depends on the channel plan ++ p2pie[ p2pielen++ ] = pmlmeext->max_chan_nums; ++ ++ // Channel List ++ for( i = 0; i < pmlmeext->max_chan_nums; i++ ) ++ { ++ p2pie[ p2pielen++ ] = pmlmeext->channel_set[ i ].ChannelNum; ++ } ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name , pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Group ID Attribute ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // p2P Device Address ++ _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ p2pielen += pwdinfo->nego_ssidlen; ++ ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_GO_confirm(_adapter *padapter, u8* raddr, u8 result) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_NEGO_CONF; ++ u8 wpsie[ 255 ] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u8 wpsielen = 0, p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_8192C( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pwdinfo->negotiation_dialog_token), &(pattrib->pktlen)); ++ ++ ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110306 ++ // According to the P2P Specification, the group negoitation request frame should contain 5 P2P attributes ++ // 1. Status ++ // 2. P2P Capability ++ // 3. Operating Channel ++ // 4. Channel List ++ // 5. Group ID ( if this WiFi is GO ) ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = result; ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ ++ // Operating Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ p2pie[ p2pielen++ ] = pwdinfo->peer_operating_ch; ++ } ++ else ++ { ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // Use the listen channel as the operating channel ++ } ++ ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 5 + pwdinfo->channel_cnt ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Number of Channels ++ p2pie[ p2pielen++ ] = pwdinfo->channel_cnt; ++ ++ // Channel List ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->channel_list, pwdinfo->channel_cnt ); ++ p2pielen += pwdinfo->channel_cnt; ++ ++ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Group ID Attribute ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + pwdinfo->nego_ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // p2P Device Address ++ _rtw_memcpy( p2pie + p2pielen , pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ p2pielen += pwdinfo->nego_ssidlen; ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_nego_confirm_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_invitation_request(_adapter *padapter, u8* raddr ) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_INVIT_REQ; ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0; ++ u8 dialogToken = 3; ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101011 ++ // According to the P2P Specification, the P2P Invitation request frame should contain 7 P2P attributes ++ // 1. Configuration Timeout ++ // 2. Invitation Flags ++ // 3. Operating Channel ( Only GO ) ++ // 4. P2P Group BSSID ( Only GO ) ++ // 5. Channel List ++ // 6. P2P Group ID ++ // 7. P2P Device Info ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ // Invitation Flags ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INVITATION_FLAGS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = P2P_INVITATION_FLAGS_PERSISTENT; ++ ++ ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0010 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Number of Channels ++ p2pie[ p2pielen++ ] = 0x0B; // support channel 1 - 11 ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = 0x01; ++ p2pie[ p2pielen++ ] = 0x02; ++ p2pie[ p2pielen++ ] = 0x03; ++ p2pie[ p2pielen++ ] = 0x04; ++ p2pie[ p2pielen++ ] = 0x05; ++ p2pie[ p2pielen++ ] = 0x06; ++ p2pie[ p2pielen++ ] = 0x07; ++ p2pie[ p2pielen++ ] = 0x08; ++ p2pie[ p2pielen++ ] = 0x09; ++ p2pie[ p2pielen++ ] = 0x0A; ++ p2pie[ p2pielen++ ] = 0x0B; ++ ++ // P2P Group ID ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 6 + pwdinfo->invitereq_info.ssidlen ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address for GO ++ _rtw_memcpy( p2pie + p2pielen, raddr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // SSID ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->invitereq_info.ssid, pwdinfo->invitereq_info.ssidlen ); ++ p2pielen += pwdinfo->invitereq_info.ssidlen; ++ ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_invitation_response(_adapter *padapter, u8* raddr, u8 dialogToken, u8 success) ++{ ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_INVIT_RESP; ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u8 p2pielen = 0; ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ // P2P IE Section. ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101005 ++ // According to the P2P Specification, the P2P Invitation response frame should contain 5 P2P attributes ++ // 1. Status ++ // 2. Configuration Timeout ++ // 3. Operating Channel ( Only GO ) ++ // 4. P2P Group BSSID ( Only GO ) ++ // 5. Channel List ++ ++ // P2P Status ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_STATUS; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0001 ); ++ p2pielen += 2; ++ ++ // Value: ++ if ( success ) ++ { ++ p2pie[ p2pielen++ ] = P2P_STATUS_SUCCESS; ++ } ++ else ++ { ++ // Sent the event receiving the P2P Invitation Req frame to DMP UI. ++ // DMP had to compare the MAC address to find out the profile. ++ // So, the WiFi driver will send the P2P_STATUS_FAIL_INFO_UNAVAILABLE to NB. ++ // If the UI found the corresponding profile, the WiFi driver sends the P2P Invitation Req ++ // to NB to rebuild the persistent group. ++ p2pie[ p2pielen++ ] = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ ++ // Configuration Timeout ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CONF_TIMEOUT; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P GO ++ p2pie[ p2pielen++ ] = 200; // 2 seconds needed to be the P2P Client ++ ++ ++ if ( success ) ++ { ++ // Channel List ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CH_LIST; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0010 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Channel Entry List ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Number of Channels ++ p2pie[ p2pielen++ ] = 0x0B; // support channel 1 - 11 ++ ++ // Channel List ++ p2pie[ p2pielen++ ] = 0x01; ++ p2pie[ p2pielen++ ] = 0x02; ++ p2pie[ p2pielen++ ] = 0x03; ++ p2pie[ p2pielen++ ] = 0x04; ++ p2pie[ p2pielen++ ] = 0x05; ++ p2pie[ p2pielen++ ] = 0x06; ++ p2pie[ p2pielen++ ] = 0x07; ++ p2pie[ p2pielen++ ] = 0x08; ++ p2pie[ p2pielen++ ] = 0x09; ++ p2pie[ p2pielen++ ] = 0x0A; ++ p2pie[ p2pielen++ ] = 0x0B; ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_p2p_provision_request(_adapter *padapter, u8* pinterface_raddr, u8* pssid, u8 ussidlen, u8* pdev_raddr ) ++{ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u8 wpsie[ 100 ] = { 0x00 }; ++ u8 wpsielen = 0; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ DBG_8192C( "[%s] In\n", __FUNCTION__ ); ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pinterface_raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ //_rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pinterface_raddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, pssid, ussidlen, pdev_raddr ); ++ ++ pframe += p2pielen; ++ pattrib->pktlen += p2pielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++u8 is_matched_in_profilelist( u8* peermacaddr, struct profile_info* profileinfo ) ++{ ++ u8 i, match_result = 0; ++ ++ DBG_8192C( "[%s] peermac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ peermacaddr[0], peermacaddr[1],peermacaddr[2],peermacaddr[3],peermacaddr[4],peermacaddr[5]); ++ ++ for( i = 0; i < P2P_MAX_PERSISTENT_GROUP_NUM; i++, profileinfo++ ) ++ { ++ DBG_8192C( "[%s] profileinfo_mac = %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ profileinfo->peermac[0], profileinfo->peermac[1],profileinfo->peermac[2],profileinfo->peermac[3],profileinfo->peermac[4],profileinfo->peermac[5]); ++ if ( _rtw_memcmp( peermacaddr, profileinfo->peermac, ETH_ALEN ) ) ++ { ++ match_result = 1; ++ DBG_8192C( "[%s] Match!\n", __FUNCTION__ ); ++ break; ++ } ++ } ++ ++ return (match_result ); ++} ++ ++void issue_probersp_p2p(_adapter *padapter, unsigned char *da) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u16 beacon_interval = 100; ++ u16 capInfo = 0; ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 wpsie[255] = { 0x00 }; ++ u32 wpsielen = 0, p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ struct ieee80211_channel *ieee_ch = &pcfg80211_wdinfo->remain_on_ch_channel; ++ u8 listen_channel = (u8) ieee80211_frequency_to_channel(ieee_ch->center_freq); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ // Use the device address for BSSID field. ++ _rtw_memcpy(pwlanhdr->addr3, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *) &beacon_interval, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ // ESS and IBSS bits must be 0 (defined in the 3.1.2.1.1 of WiFi Direct Spec) ++ capInfo |= cap_ShortPremble; ++ capInfo |= cap_ShortSlot; ++ ++ _rtw_memcpy(pframe, (unsigned char *) &capInfo, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, 7, pwdinfo->p2p_wildcard_ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ // Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); ++ ++ // DS parameter set ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled && listen_channel !=0) ++ { ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&listen_channel, &pattrib->pktlen); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&pwdinfo->listen_channel, &pattrib->pktlen); ++ } ++ ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ if( pmlmepriv->wps_probe_resp_ie != NULL && pmlmepriv->p2p_probe_resp_ie != NULL ) ++ { ++ //WPS IE ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); ++ pattrib->pktlen += pmlmepriv->wps_probe_resp_ie_len; ++ pframe += pmlmepriv->wps_probe_resp_ie_len; ++ ++ //P2P IE ++ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); ++ pattrib->pktlen += pmlmepriv->p2p_probe_resp_ie_len; ++ pframe += pmlmepriv->p2p_probe_resp_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ ++ // Todo: WPS IE ++ // Noted by Albert 20100907 ++ // According to the WPS specification, all the WPS attribute is presented by Big Endian. ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // WiFi Simple Config State ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SIMPLE_CONF_STATE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_WSC_STATE_NOT_CONFIG; // Not Configured. ++ ++ // Response Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_RESP_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_RESPONSE_TYPE_8021X; ++ ++ // UUID-E ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_UUID_E ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0010 ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ wpsielen += 0x10; ++ ++ // Manufacturer ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MANUFACTURER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0007 ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "Realtek", 7 ); ++ wpsielen += 7; ++ ++ // Model Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0006 ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "8192CU", 6 ); ++ wpsielen += 6; ++ ++ // Model Number ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_MODEL_NUMBER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[ wpsielen++ ] = 0x31; // character 1 ++ ++ // Serial Number ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_SERIAL_NUMBER ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( ETH_ALEN ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, "123456" , ETH_ALEN ); ++ wpsielen += ETH_ALEN; ++ ++ // Primary Device Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); ++ wpsielen += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ wpsielen += 2; ++ ++ // OUI ++ *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ wpsielen += 2; ++ ++ // Device Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ wpsielen += pwdinfo->device_name_len; ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ wpsielen += 2; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++ p2pielen = build_probe_resp_p2p_ie(pwdinfo, pframe); ++ pframe += p2pielen; ++ pattrib->pktlen += p2pielen; ++ } ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_probereq_p2p(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ unsigned char bssrate[NumRates]; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 wpsie[255] = { 0x00 }, p2pie[ 255 ] = { 0x00 }; ++ u16 wpsielen = 0, p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++#endif //CONFIG_IOCTL_CFG80211 ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ // broadcast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_PROBEREQ); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pwdinfo->tx_prov_disc_info.ssid.SsidLength, pwdinfo->tx_prov_disc_info.ssid.Ssid, &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SSID_IE_, P2P_WILDCARD_SSID_LEN, pwdinfo->p2p_wildcard_ssid, &(pattrib->pktlen)); ++ } ++ // Use the OFDM rate in the P2P probe request frame. ( 6(B), 9(B), 12(B), 24(B), 36, 48, 54 ) ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pwdinfo->support_rate, &pattrib->pktlen); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ if(pmlmepriv->wps_probe_req_ie != NULL && pmlmepriv->p2p_probe_req_ie != NULL_CHIP_TYPE) ++ { ++ //WPS IE ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; ++ pframe += pmlmepriv->wps_probe_req_ie_len; ++ ++ //P2P IE ++ _rtw_memcpy(pframe, pmlmepriv->p2p_probe_req_ie, pmlmepriv->p2p_probe_req_ie_len); ++ pattrib->pktlen += pmlmepriv->p2p_probe_req_ie_len; ++ pframe += pmlmepriv->p2p_probe_req_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ ++ // WPS IE ++ // Noted by Albert 20110221 ++ // According to the WPS specification, all the WPS attribute is presented by Big Endian. ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Device Name ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ wpsielen += 2; ++ ++ // Value: ++ _rtw_memcpy( wpsie + wpsielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ wpsielen += pwdinfo->device_name_len; ++ ++ // Primary Device Type ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0008 ); ++ wpsielen += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ wpsielen += 2; ++ ++ // OUI ++ *(u32*) ( wpsie + wpsielen ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110221 ++ // According to the P2P Specification, the probe request frame should contain 5 P2P attributes ++ // 1. P2P Capability ++ // 2. P2P Device ID if this probe request wants to find the specific P2P device ++ // 3. Listen Channel ++ // 4. Extended Listen Timing ++ // 5. Operating Channel if this WiFi is working as the group owner now ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ // Listen Channel ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_LISTEN_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->listen_channel; // listen channel ++ ++ ++ // Extended Listen Timing ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // Operating Channel (if this WiFi is working as the group owner now) ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_OPERATING_CH; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0005 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Country String ++ p2pie[ p2pielen++ ] = 'U'; ++ p2pie[ p2pielen++ ] = 'S'; ++ ++ // The third byte should be set to 0x04. ++ // Described in the "Operating Channel Attribute" section. ++ p2pie[ p2pielen++ ] = 0x04; ++ ++ // Operating Class ++ p2pie[ p2pielen++ ] = 0x51; // Copy from SD7 ++ ++ // Channel Number ++ p2pie[ p2pielen++ ] = pwdinfo->operating_channel; // operating channel number ++ ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++ } ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_probe_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++#endif //CONFIG_P2P ++ ++unsigned int OnAction_public(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ unsigned char *frame_body; ++ unsigned char category, action; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++#ifdef CONFIG_P2P ++ u8 *p2p_ie; ++ u32 p2p_ielen, wps_ielen; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 result = P2P_STATUS_SUCCESS; ++ u8 empty_addr[ETH_ALEN] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; ++#endif //CONFIG_P2P ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ u16 seq_ctrl = ( (precv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | ++ (precv_frame->u.hdr.attrib.frag_num & 0xf); ++ ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ return _SUCCESS; ++ ++ ++ //recv_decache check ++ if(GetRetry(pframe)) ++ { ++ if(seq_ctrl == pmlmeext->action_public_rxseq) ++ { ++ DBG_871X("recv_Action_public_decache, seq_ctrl=0x%x, rxseq=0x%x\n", seq_ctrl, pmlmeext->action_public_rxseq); ++ ++ return _FAIL; ++ } ++ } ++ pmlmeext->action_public_rxseq = seq_ctrl; ++ ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if(category != RTW_WLAN_CATEGORY_PUBLIC) ++ return _SUCCESS; ++ ++ action = frame_body[ 1 ]; ++ if ( action == ACT_PUBLIC_P2P ) // IEEE 802.11 P2P Public Action usage. ++ { ++#ifdef CONFIG_P2P ++ // Do nothing if the driver doesn't enable the P2P function. ++#ifndef CONFIG_IOCTL_CFG80211 ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ return _SUCCESS; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ // Commented by Albert 20100908 ++ // Low byte -> High byte is 0x50, 0x6F, 0x9A, 0x09 for P2P OUI. ++ // But the P2POUT is defined as 0x506F9A09 -> should use the cpu_to_be32 ++ if ( cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ) == P2POUI ) ++ { ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ rtw_cfg80211_rx_p2p_action_public(padapter, pframe, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len -= sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ switch( frame_body[ 6 ] )//OUI Subtype ++ { ++ case P2P_GO_NEGO_REQ: ++ { ++ DBG_8192C( "[%s] Got GO Nego Req Frame\n", __FUNCTION__); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) ++ { ++ // Commented by Albert 20110526 ++ // In this case, this means the previous nego fail doesn't be reset yet. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ // Restore the previous p2p state ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ DBG_871X( "[%s] Restore the previous p2p state to %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ } ++ ++ // Commented by Kurt 20110902 ++ //Add if statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ ++ // Commented by Kurt 20120113 ++ // Get peer_dev_addr here if peer doesn't issue prov_disc frame. ++ if( _rtw_memcmp(pwdinfo->rx_prov_disc_info.peerDevAddr, empty_addr, ETH_ALEN) ); ++ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); ++ ++ result = process_p2p_group_negotation_req( pwdinfo, frame_body, len ); ++ issue_p2p_GO_response( padapter, GetAddr2Ptr(pframe), frame_body, len, result ); ++ // Commented by Albert 20110718 ++ // No matter negotiating or negotiation failure, the driver should set up the restore P2P state timer. ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); ++ break; ++ } ++ case P2P_GO_NEGO_RESP: ++ { ++ DBG_871X( "[%s] Got GO Nego Resp Frame\n", __FUNCTION__); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ // Commented by Albert 20110425 ++ // The restore timer is enabled when issuing the nego request frame of rtw_p2p_connect function. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ result = process_p2p_group_negotation_resp( pwdinfo, frame_body, len); ++ ++ issue_p2p_GO_confirm( pwdinfo->padapter, GetAddr2Ptr(pframe), result); ++ ++ // Reset the dialog token for group negotiation frames. ++ pwdinfo->negotiation_dialog_token = 1; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_FAIL)) ++ { ++ _set_timer( &pwdinfo->restore_p2p_state_timer, 5000 ); ++ } ++ } ++ else ++ { ++ DBG_8192C( "[%s] Skipped GO Nego Resp Frame (p2p_state != P2P_STATE_GONEGO_ING)\n", __FUNCTION__); ++ } ++ ++ break; ++ } ++ case P2P_GO_NEGO_CONF: ++ { ++ DBG_8192C( "[%s] Got GO Nego Confirm Frame\n", __FUNCTION__); ++ process_p2p_group_negotation_confirm( pwdinfo, frame_body, len); ++ break; ++ } ++ case P2P_INVIT_REQ: ++ { ++ // Added by Albert 2010/10/05 ++ // Received the P2P Invite Request frame. ++ ++ DBG_8192C( "[%s] Got invite request frame!\n", __FUNCTION__ ); ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ // Parse the necessary information from the P2P Invitation Request frame. ++ // For example: The MAC address of sending this P2P Invitation Request frame. ++ u8 groupid[ 38 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ u8 match_result = 0; ++ ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen); ++ _rtw_memcpy( pwdinfo->p2p_peer_interface_addr, groupid, ETH_ALEN ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RECV_INVITE_REQ); ++ DBG_871X( "[%s] peer address %.2X %.2X %.2X %.2X %.2X %.2X\n", __FUNCTION__, ++ groupid[0], groupid[1], groupid[2], groupid[3], groupid[4], groupid[5] ); ++ ++ if ( is_matched_in_profilelist( pwdinfo->p2p_peer_interface_addr, &pwdinfo->profileinfo[ 0 ] ) ) ++ { ++ match_result = 1; ++ } ++ else ++ { ++ match_result = 0; ++ } ++ ++ DBG_8192C( "[%s] match_result = %d\n", __FUNCTION__, match_result ); ++ ++ pwdinfo->inviteresp_info.token = frame_body[ 7 ]; ++ issue_p2p_invitation_response( padapter, pwdinfo->p2p_peer_interface_addr, pwdinfo->inviteresp_info.token, match_result ); ++ } ++ ++ break; ++ } ++ case P2P_INVIT_RESP: ++ { ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ ++ DBG_871X( "[%s] Got invite response frame!\n", __FUNCTION__ ); ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_871X( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ } ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ } ++ } ++ break; ++ } ++ case P2P_DEVDISC_REQ: ++ ++ process_p2p_devdisc_req(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_DEVDISC_RESP: ++ ++ process_p2p_devdisc_resp(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_PROVISION_DISC_REQ: ++ DBG_871X( "[%s] Got Provisioning Discovery Request Frame\n", __FUNCTION__ ); ++ process_p2p_provdisc_req(pwdinfo, pframe, len); ++ _rtw_memcpy(pwdinfo->rx_prov_disc_info.peerDevAddr, GetAddr2Ptr(pframe), ETH_ALEN); ++ ++ //20110902 Kurt ++ //Add the following statement to avoid receiving duplicate prov disc req. such that pre_p2p_state would be covered. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ)) ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_REQ); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++ break; ++ ++ case P2P_PROVISION_DISC_RESP: ++ // Commented by Albert 20110707 ++ // Should we check the pwdinfo->tx_prov_disc_info.bsent flag here?? ++ DBG_871X( "[%s] Got Provisioning Discovery Response Frame\n", __FUNCTION__ ); ++ // Commented by Albert 20110426 ++ // The restore timer is enabled when issuing the provisioing request frame in rtw_p2p_prov_disc function. ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_RX_PROVISION_DIS_RSP); ++ process_p2p_provdisc_resp(pwdinfo, pframe); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++ break; ++ ++ } ++ } ++ ++ } ++#endif //CONFIG_P2P ++ } ++ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ return _SUCCESS; ++} ++ ++unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_P2P ++ u8 *frame_body; ++ u8 category, OUI_Subtype, dialogToken=0; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //check RA matches or not ++ if (!_rtw_memcmp(myid(&(padapter->eeprompriv)), GetAddr1Ptr(pframe), ETH_ALEN))//for if1, sta/ap mode ++ return _SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ if(category != RTW_WLAN_CATEGORY_P2P) ++ return _SUCCESS; ++ ++ if ( cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ) != P2POUI ) ++ return _SUCCESS; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ rtw_cfg80211_rx_action_p2p(padapter, pframe, len); ++ return _SUCCESS; ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len -= sizeof(struct rtw_ieee80211_hdr_3addr); ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++ switch(OUI_Subtype) ++ { ++ case P2P_NOTICE_OF_ABSENCE: ++ ++ break; ++ ++ case P2P_PRESENCE_REQUEST: ++ ++ process_p2p_presence_req(pwdinfo, pframe, len); ++ ++ break; ++ ++ case P2P_PRESENCE_RESPONSE: ++ ++ break; ++ ++ case P2P_GO_DISC_REQUEST: ++ ++ break; ++ ++ default: ++ break; ++ ++ } ++ } ++ ++#endif //CONFIG_P2P ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ int i; ++ unsigned char category; ++ struct action_handler *ptable; ++ unsigned char *frame_body; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ category = frame_body[0]; ++ ++ for(i = 0; i < sizeof(OnAction_tbl)/sizeof(struct action_handler); i++) ++ { ++ ptable = &OnAction_tbl[i]; ++ ++ if(category == ptable->num) ++ ptable->func(padapter, precv_frame); ++ ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ uint len = precv_frame->u.hdr.len; ++ ++ //DBG_871X("rcvd mgt frame(%x, %x)\n", (GetFrameSubType(pframe) >> 4), *(unsigned int *)GetAddr1Ptr(pframe)); ++ return _SUCCESS; ++} ++ ++struct xmit_frame *alloc_mgtxmitframe(struct xmit_priv *pxmitpriv) ++{ ++ struct xmit_frame *pmgntframe; ++ struct xmit_buf *pxmitbuf; ++ ++ if ((pmgntframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc xmitframe fail\n", __FUNCTION__); ++ return NULL; ++ } ++ ++ if ((pxmitbuf = rtw_alloc_xmitbuf_ext(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc xmitbuf fail\n", __FUNCTION__); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ return NULL; ++ } ++ ++ pmgntframe->frame_tag = MGNT_FRAMETAG; ++ ++ pmgntframe->pxmitbuf = pxmitbuf; ++ ++ pmgntframe->buf_addr = pxmitbuf->pbuf; ++ ++ pxmitbuf->priv_data = pmgntframe; ++ ++ return pmgntframe; ++ ++} ++ ++ ++/**************************************************************************** ++ ++Following are some TX fuctions for WiFi MLME ++ ++*****************************************************************************/ ++ ++void update_mgntframe_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ _rtw_memset((u8 *)(pattrib), 0, sizeof(struct pkt_attrib)); ++ ++ pattrib->hdrlen = 24; ++ pattrib->nr_frags = 1; ++ pattrib->priority = 7; ++ pattrib->mac_id = 0; ++ pattrib->qsel = 0x12; ++ ++ pattrib->pktlen = 0; ++ ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ pattrib->raid = 6;//b mode ++ else ++ pattrib->raid = 5;//a/g mode ++ ++ pattrib->encrypt = _NO_PRIVACY_; ++ pattrib->bswenc = _FALSE; ++ ++ pattrib->qos_en = _FALSE; ++ pattrib->ht_en = _FALSE; ++ pattrib->bwmode = HT_CHANNEL_WIDTH_20; ++ pattrib->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pattrib->sgi = _FALSE; ++ ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ ++ pattrib->retry_ctrl = _TRUE; ++ ++} ++ ++void dump_mgntframe(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ if(padapter->bSurpriseRemoved == _TRUE || ++ padapter->bDriverStopped == _TRUE) ++ return; ++ ++ padapter->HalFunc.mgnt_xmit(padapter, pmgntframe); ++} ++ ++//Commented by Kurt ++#ifdef CONFIG_TDLS ++void issue_nulldata_to_TDLS_peer_STA(_adapter *padapter, struct sta_info *ptdls_sta, unsigned int power_mode) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++// SetToDs(fctrl); ++ if (power_mode) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr1, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(pwlanhdr, pattrib->seqnum); ++ ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++s32 update_tdls_attrib(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ ++ s32 res=_SUCCESS; ++ sint bmcast; ++ ++ bmcast = IS_MCAST(pattrib->ra); ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta == NULL) { ++ res =_FAIL; ++ goto exit; ++ } ++ ++ pattrib->mac_id = psta->mac_id; ++ ++ pattrib->psta = psta; ++ ++ pattrib->ack_policy = 0; ++ // get ether_hdr_len ++ pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag ++ ++ if (pqospriv->qos_option && psta->qos_option) { ++ pattrib->priority = 1; //tdls management frame should be AC_BK ++ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; ++ pattrib->subtype = WIFI_QOS_DATA_TYPE; ++ } else { ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA_TYPE; ++ pattrib->priority = 0; ++ } ++ ++ if (psta->ieee8021x_blocked == _TRUE) ++ { ++ pattrib->encrypt = 0; ++ } ++ else ++ { ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); ++ ++ switch(psecuritypriv->dot11AuthAlgrthm) ++ { ++ case dot11AuthAlgrthm_Open: ++ case dot11AuthAlgrthm_Shared: ++ case dot11AuthAlgrthm_Auto: ++ pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case dot11AuthAlgrthm_8021X: ++ pattrib->key_idx = 0; ++ break; ++ default: ++ pattrib->key_idx = 0; ++ break; ++ } ++ } ++ ++ switch (pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ pattrib->iv_len = 4; ++ pattrib->icv_len = 4; ++ break; ++ case _TKIP_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 4; ++ if(padapter->securitypriv.busetkipkey==_FAIL) ++ { ++ res =_FAIL; ++ goto exit; ++ } ++ break; ++ case _AES_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 8; ++ break; ++ default: ++ pattrib->iv_len = 0; ++ pattrib->icv_len = 0; ++ break; ++ } ++ ++ if (pattrib->encrypt && ++ ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) ++ { ++ pattrib->bswenc = _TRUE; ++ } else { ++ pattrib->bswenc = _FALSE; ++ } ++ ++ //qos_en, ht_en, init rate, ,bw, ch_offset, sgi ++ pattrib->qos_en = psta->qos_option; ++ pattrib->ht_en = psta->htpriv.ht_option; ++ pattrib->raid = psta->raid; ++ pattrib->bwmode = psta->htpriv.bwmode; ++ pattrib->ch_offset = psta->htpriv.ch_offset; ++ pattrib->sgi= psta->htpriv.sgi; ++ pattrib->ampdu_en = _FALSE; ++ ++ if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ { ++ if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ pattrib->ampdu_en = _TRUE; ++ } ++ ++exit: ++ ++ return res; ++} ++ ++void free_tdls_sta(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ _irqL irqL; ++ ++ //free peer sta_info ++ DBG_8192C("Free sta_info\n"); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ptdlsinfo->sta_cnt--; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt < (NUM_STA - 1 ) ) ++ { ++ ptdlsinfo->sta_maximum = _FALSE; ++ _rtw_memset( &ptdlsinfo->ss_record, 0x00, sizeof(struct tdls_ss_record) ); ++ } ++ //ready to clear cam ++ if(ptdls_sta->cam_entry!=0){ ++ ptdlsinfo->cam_entry_to_clear=ptdls_sta->cam_entry; ++ rtw_setstakey_cmd(padapter, (u8 *)ptdls_sta, _TRUE); ++ } ++ ++ if(ptdlsinfo->sta_cnt==0){ ++ rtw_tdls_cmd(padapter, myid(&(padapter->eeprompriv)), TDLS_RS_RCR); ++ ptdlsinfo->setup_state=UN_TDLS_STATE; ++ } ++ ++ rtw_free_stainfo(padapter, ptdls_sta); ++ ++} ++ ++void issue_tdls_setup_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ static u8 dialogtoken = 0; ++ u32 timeout_interval= TPK_RESEND_COUNT * 1000; //retry timer should set at least 301 sec, using TPK_count counting 301 times. ++ ++ if(ptdlsinfo->ap_prohibited == _TRUE) ++ goto exit; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ //init peer sta_info ++ ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta==NULL) ++ { ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta) ++ { ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ptdlsinfo->sta_cnt++; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt == (NUM_STA - 1) ) ++ { ++ ptdlsinfo->sta_maximum = _TRUE; ++ } ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ } ++ ++ if(ptdls_sta){ ++ ptdls_sta->tdls_sta_state |= TDLS_RESPONDER_STATE; ++ //for tdls; ptdls_sta->aid is used to fill dialogtoken ++ ptdls_sta->dialog = dialogtoken; ++ dialogtoken = (dialogtoken+1)%256; ++ ptdls_sta->TDLS_PeerKey_Lifetime = timeout_interval; ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME ); ++ } ++ ++ pattrib->qsel=pattrib->priority; ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_REQUEST) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_teardown(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, mac_addr); ++ if(ptdls_sta==NULL){ ++ DBG_8192C("issue tdls teardown unsuccessful\n"); ++ return; ++ }else{ ++ ptdls_sta->tdls_sta_state=UN_TDLS_STATE; ++ } ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_TEARDOWN) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ ++ ptdls_sta->option =3; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ ++ if( ptdls_sta->timer_flag == 1 ) ++ { ++ _enter_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 2; ++ _exit_critical_bh(&(padapter->tdlsinfo.hdl_lock), &irqL); ++ } ++ else ++ rtw_tdls_cmd(padapter, mac_addr, TDLS_FREE_STA ); ++ ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_dis_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ u8 baddr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ if(mac_addr == NULL) ++ _rtw_memcpy(pattrib->dst, baddr, ETH_ALEN); ++ else ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_DISCOVERY_REQUEST) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ DBG_8192C("issue tdls dis req\n"); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_setup_rsp(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct rx_pkt_attrib *rx_pkt_pattrib = &precv_frame->u.hdr.attrib; ++ _irqL irqL; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_RESPONSE) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++ ++} ++ ++void issue_tdls_setup_cfm(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct sta_info *ptdls_sta=NULL; ++ _irqL irqL; ++ ++ struct rx_pkt_attrib *rx_pkt_pattrib = & precv_frame->u.hdr.attrib; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_SETUP_CONFIRM) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++ ++} ++ ++//TDLS Discovery Response frame is a management action frame ++void issue_tdls_dis_rsp(_adapter *padapter, union recv_frame *precv_frame, u8 dialog) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ struct rx_pkt_attrib *rx_pkt_pattrib = &precv_frame->u.hdr.attrib; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ // unicast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, rx_pkt_pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->dst, pwlanhdr->addr1, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, pwlanhdr->addr2, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr3, rx_pkt_pattrib->bssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pwlanhdr->addr3, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ rtw_tdls_dis_rsp_fr(padapter, pmgntframe, pframe, dialog); ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++void issue_tdls_peer_traffic_indication(_adapter *padapter, struct sta_info *ptdls_sta) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ static u8 dialogtoken=0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, ptdls_sta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ //for tdls; pattrib->nr_frags is used to fill dialogtoken ++ ptdls_sta->dialog = dialogtoken; ++ dialogtoken = (dialogtoken+1)%256; ++ //PTI frame's priority should be AC_VO ++ pattrib->priority = 7; ++ ++ update_tdls_attrib(padapter, pattrib); ++ pattrib->qsel=pattrib->priority; ++ if (rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_PEER_TRAFFIC_INDICATION) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_ch_switch_req(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ pattrib->qsel=pattrib->priority; ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_REQUEST) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++void issue_tdls_ch_switch_rsp(_adapter *padapter, u8 *mac_addr) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++ _irqL irqL; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ ++ pmgntframe->frame_tag = DATA_FRAMETAG; ++ pattrib->ether_type = 0x890d; ++ pattrib->pctrl =0; ++ ++ _rtw_memcpy(pattrib->dst, mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ update_tdls_attrib(padapter, pattrib); ++ ++ pattrib->qsel=pattrib->priority; ++/* ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ if(xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pmgntframe)==_TRUE){ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ return _FALSE; ++ } ++*/ ++ if(rtw_xmit_tdls_coalesce(padapter, pmgntframe, TDLS_CHANNEL_SWITCH_RESPONSE) !=_SUCCESS ){ ++ rtw_free_xmitbuf(pxmitpriv,pmgntframe->pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pmgntframe); ++ goto exit; ++ } ++ rtw_dump_xframe(padapter, pmgntframe); ++ ++exit: ++ ++ return; ++} ++ ++sint On_TDLS_Dis_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta = NULL; ++ struct recv_priv *precvpriv = &(adapter->recvpriv); ++ u8 *ptr = precv_frame->u.hdr.rx_data, *psa; ++ struct rx_pkt_attrib *pattrib = &(precv_frame->u.hdr.attrib); ++ struct tdls_info *ptdlsinfo = &(adapter->tdlsinfo); ++ u8 empty_addr[ETH_ALEN] = { 0x00 }; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(&(adapter->stapriv), psa); ++ ++ if(ptdls_sta != NULL) ++ { ++ ptdls_sta->tdls_sta_state |= TDLS_ALIVE_STATE; ++ ++ //Record the tdls sta with lowest signal strength ++ if( (ptdlsinfo->sta_maximum == _TRUE) && (ptdls_sta->alive_count >= 1) ) ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ if( _rtw_memcmp(ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN) ) ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.signal_strength = pattrib->signal_strength; ++ } ++ else ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ if( ptdlsinfo->ss_record.signal_strength < pattrib->signal_strength ) ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ _rtw_memcpy(ptdlsinfo->ss_record.macaddr, psa, ETH_ALEN); ++ ptdlsinfo->ss_record.signal_strength = pattrib->signal_strength; ++ } ++ } ++ } ++ ++ } ++ else ++ { ++ if( ptdlsinfo->sta_maximum == _TRUE) ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ if( _rtw_memcmp( ptdlsinfo->ss_record.macaddr, empty_addr, ETH_ALEN ) ) ++ { ++ //All traffics are busy, do not set up another direct link. ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ return _FAIL; ++ } ++ else ++ { ++ if( pattrib->signal_strength > ptdlsinfo->ss_record.signal_strength ) ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ issue_tdls_teardown(adapter, ptdlsinfo->ss_record.macaddr); ++ } ++ else ++ { ++ printk("%s %d\n", __FUNCTION__, __LINE__); ++ return _FAIL; ++ } ++ } ++ } ++ ++ if( pattrib->signal_strength + TDLS_SIGNAL_THRESH >= precvpriv->signal_strength ) ++ { ++ issue_tdls_setup_req(adapter, psa); ++ } ++ } ++ ++ return _FAIL; ++} ++ ++#endif ++ ++int update_hidden_ssid(u8 *ies, u32 ies_len, u8 hidden_ssid_mode) ++{ ++ u8 *ssid_ie; ++ sint ssid_len_ori; ++ int len_diff = 0; ++ ++ ssid_ie = rtw_get_ie(ies, WLAN_EID_SSID, &ssid_len_ori, ies_len); ++ ++ //DBG_871X("%s hidden_ssid_mode:%u, ssid_ie:%p, ssid_len_ori:%d\n", __FUNCTION__, hidden_ssid_mode, ssid_ie, ssid_len_ori); ++ ++ if(ssid_ie && ssid_len_ori>0) ++ { ++ switch(hidden_ssid_mode) ++ { ++ case 1: ++ { ++ u8 *next_ie = ssid_ie + 2 + ssid_len_ori; ++ u32 remain_len = 0; ++ ++ remain_len = ies_len -(next_ie-ies); ++ ++ ssid_ie[1] = 0; ++ _rtw_memcpy(ssid_ie+2, next_ie, remain_len); ++ len_diff -= ssid_len_ori; ++ ++ break; ++ } ++ case 2: ++ _rtw_memset(&ssid_ie[2], 0, ssid_len_ori); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ return len_diff; ++} ++ ++void issue_beacon(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned int rate_len; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); ++ return; ++ } ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->qsel = 0x10; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //DBG_871X("ie len=%d\n", cur_network->IELength); ++#ifdef CONFIG_P2P ++ // for P2P : Primary Device Type & Device Name ++ u32 wpsielen=0, insert_len=0; ++ u8 *wpsie=NULL; ++ wpsie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wpsielen); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && wpsie && wpsielen>0) ++ { ++ uint wps_offset, remainder_ielen; ++ u8 *premainder_ie, *pframe_wscie; ++ ++ wps_offset = (uint)(wpsie - cur_network->IEs); ++ ++ premainder_ie = wpsie + wpsielen; ++ ++ remainder_ielen = cur_network->IELength - wps_offset - wpsielen; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ if(pmlmepriv->wps_beacon_ie && pmlmepriv->wps_beacon_ie_len>0) ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); ++ pframe += wps_offset; ++ pattrib->pktlen += wps_offset; ++ ++ _rtw_memcpy(pframe, pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); ++ ++ pframe += pmlmepriv->wps_beacon_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_beacon_ie_len; ++ ++ //copy remainder_ie to pframe ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ ++ } ++ else ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pattrib->pktlen += cur_network->IELength; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ ++ pframe_wscie = pframe + wps_offset; ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset+wpsielen); ++ pframe += (wps_offset + wpsielen); ++ pattrib->pktlen += (wps_offset + wpsielen); ++ ++ //now pframe is end of wsc ie, insert Primary Device Type & Device Name ++ // Primary Device Type ++ // Type: ++ *(u16*) ( pframe + insert_len) = cpu_to_be16( WPS_ATTR_PRIMARY_DEV_TYPE ); ++ insert_len += 2; ++ ++ // Length: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( 0x0008 ); ++ insert_len += 2; ++ ++ // Value: ++ // Category ID ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ insert_len += 2; ++ ++ // OUI ++ *(u32*) ( pframe + insert_len ) = cpu_to_be32( WPSOUI ); ++ insert_len += 4; ++ ++ // Sub Category ID ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ insert_len += 2; ++ ++ ++ // Device Name ++ // Type: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ insert_len += 2; ++ ++ // Length: ++ *(u16*) ( pframe + insert_len ) = cpu_to_be16( pwdinfo->device_name_len ); ++ insert_len += 2; ++ ++ // Value: ++ _rtw_memcpy( pframe + insert_len, pwdinfo->device_name, pwdinfo->device_name_len ); ++ insert_len += pwdinfo->device_name_len; ++ ++ ++ //update wsc ie length ++ *(pframe_wscie+1) = (wpsielen -2) + insert_len; ++ ++ //pframe move to end ++ pframe+=insert_len; ++ pattrib->pktlen += insert_len; ++ ++ //copy remainder_ie to pframe ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ } ++ ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ int len_diff; ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ len_diff = update_hidden_ssid( ++ pframe+_BEACON_IE_OFFSET_ ++ , cur_network->IELength-_BEACON_IE_OFFSET_ ++ , pmlmeinfo->hidden_ssid_mode ++ ); ++ pframe += (cur_network->IELength+len_diff); ++ pattrib->pktlen += (cur_network->IELength+len_diff); ++ } ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ u32 len; ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ len = pmlmepriv->p2p_beacon_ie_len; ++ if(pmlmepriv->p2p_beacon_ie && len>0) ++ _rtw_memcpy(pframe, pmlmepriv->p2p_beacon_ie, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_beacon_p2p_ie(pwdinfo, pframe); ++ } ++ ++ ++ pframe += len; ++ pattrib->pktlen += len; ++#ifdef CONFIG_WFD ++ len = build_beacon_wfd_ie( pwdinfo, pframe ); ++ pframe += len; ++ pattrib->pktlen += len; ++#endif //CONFIG_WFD ++ } ++#endif //CONFIG_P2P ++ ++ goto _issue_bcn; ++ ++ } ++ ++ //below for ad-hoc mode ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); ++ ++ //if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u8 erpinfo=0; ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); ++ ++ //ERP IE ++ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); ++ } ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++_issue_bcn: ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ if ((pattrib->pktlen + TXDESC_SIZE) > 512) ++ { ++ DBG_871X("beacon frame too large\n"); ++ return; ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ //DBG_871X("issue bcn_sz=%d\n", pattrib->last_txcmdsz); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++void issue_probersp(_adapter *padapter, unsigned char *da, u8 is_valid_p2p_probereq) ++{ ++ u8 *pwps_ie; ++ uint wps_ielen; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac, *bssid; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ unsigned int rate_len; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++#endif //CONFIG_P2P ++ ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ DBG_871X("%s, alloc mgnt frame fail\n", __FUNCTION__); ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ ++ if(cur_network->IELength>MAX_IE_SZ || cur_network->IELength<_FIXED_IE_LENGTH_) ++ return; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ pwps_ie = rtw_get_wps_ie(cur_network->IEs+_FIXED_IE_LENGTH_, cur_network->IELength-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ //inerset & update wps_probe_resp_ie ++ if((pmlmepriv->wps_probe_resp_ie!=NULL) && pwps_ie && (wps_ielen>0)) ++ { ++ uint wps_offset, remainder_ielen; ++ u8 *premainder_ie; ++ ++ wps_offset = (uint)(pwps_ie - cur_network->IEs); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = cur_network->IELength - wps_offset - wps_ielen; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, wps_offset); ++ pframe += wps_offset; ++ pattrib->pktlen += wps_offset; ++ ++ wps_ielen = (uint)pmlmepriv->wps_probe_resp_ie[1];//to get ie data len ++ if((wps_offset+wps_ielen+2)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_resp_ie, wps_ielen+2); ++ pframe += wps_ielen+2; ++ pattrib->pktlen += wps_ielen+2; ++ } ++ ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pframe, premainder_ie, remainder_ielen); ++ pframe += remainder_ielen; ++ pattrib->pktlen += remainder_ielen; ++ } ++ } ++ else ++ { ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pattrib->pktlen += cur_network->IELength; ++ } ++ ++ } ++ else ++#endif ++ { ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pattrib->pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ // capability info: 2 bytes ++ ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //below for ad-hoc mode ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pattrib->pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pattrib->pktlen); ++ ++ // DS parameter set ++ pframe =rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pattrib->pktlen); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u8 erpinfo=0; ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pattrib->pktlen); ++ ++ //ERP IE ++ pframe = rtw_set_ie(pframe, _ERPINFO_IE_, 1, &erpinfo, &pattrib->pktlen); ++ } ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pattrib->pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++ } ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && is_valid_p2p_probereq) ++ { ++ u32 len; ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ //if pwdinfo->role == P2P_ROLE_DEVICE will call issue_probersp_p2p() ++ len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ if(pmlmepriv->p2p_go_probe_resp_ie && len>0) ++ _rtw_memcpy(pframe, pmlmepriv->p2p_go_probe_resp_ie, len); ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ len = build_probe_resp_p2p_ie(pwdinfo, pframe); ++ } ++ ++ pframe += len; ++ pattrib->pktlen += len; ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_probe_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ } ++#endif //CONFIG_P2P ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 blnbc) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned char *mac; ++ unsigned char bssrate[NumRates]; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("+issue_probereq\n")); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if ( 0 == blnbc ) ++ { ++ // unicast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ } ++ else ++ { ++ // broadcast probe request frame ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bc_addr, ETH_ALEN); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_PROBEREQ); ++ ++ pframe += sizeof (struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ if(pssid) ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pssid->SsidLength, pssid->Ssid, &(pattrib->pktlen)); ++ else ++ pframe = rtw_set_ie(pframe, _SSID_IE_, 0, NULL, &(pattrib->pktlen)); ++ ++ get_rate_set(padapter, bssrate, &bssrate_len); ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++#if 0 ++ //add wps_ie for wps2.0 ++ if(pmlmepriv->probereq_wpsie_len>0 && pmlmepriv->probereq_wpsie_lenprobereq_wpsie, pmlmepriv->probereq_wpsie_len); ++ pframe += pmlmepriv->probereq_wpsie_len; ++ pattrib->pktlen += pmlmepriv->probereq_wpsie_len; ++ //pmlmepriv->probereq_wpsie_len = 0 ;//reset to zero ++ } ++#else ++ //add wps_ie for wps2.0 ++ if(pmlmepriv->wps_probe_req_ie_len>0 && pmlmepriv->wps_probe_req_ie) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_probe_req_ie, pmlmepriv->wps_probe_req_ie_len); ++ pframe += pmlmepriv->wps_probe_req_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_probe_req_ie_len; ++ //pmlmepriv->wps_probe_req_ie_len = 0 ;//reset to zero ++ } ++#endif ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing probe_req, tx_len=%d\n", pattrib->last_txcmdsz)); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++// if psta == NULL, indiate we are station(client) now... ++void issue_auth(_adapter *padapter, struct sta_info *psta, unsigned short status) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned int val32; ++ unsigned short val16; ++ int use_shared_key = 0; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++/* ++ if( (psta == NULL) && (pmlmeinfo->auth_seq != 3) ) { ++ // Because of AP's not receiving deauth before ++ // AP may: 1)not response auth or 2)deauth us after link is complete ++ // issue deauth before issuing auth to deal with the situation ++ issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ } ++*/ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_AUTH); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ if(psta)// for AP mode ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ ++ _rtw_memcpy(pwlanhdr->addr1, psta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ ++ // setting auth algo number ++ val16 = (u16)psta->authalg; ++ ++ if(status != _STATS_SUCCESSFUL_) ++ val16 = 0; ++ ++ if (val16) { ++ val16 = cpu_to_le16(val16); ++ use_shared_key = 1; ++ } ++ ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting auth seq number ++ val16 =(u16)psta->auth_seq; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting status code... ++ val16 = status; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // added challenging text... ++ if ((psta->auth_seq == 2) && (psta->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, psta->chg_txt, &(pattrib->pktlen)); ++ } ++#endif ++ } ++ else ++ { ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&padapter->eeprompriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&pmlmeinfo->network), ETH_ALEN); ++ ++ // setting auth algo number ++ val16 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_Shared)? 1: 0;// 0:OPEN System, 1:Shared key ++ if (val16) { ++ val16 = cpu_to_le16(val16); ++ use_shared_key = 1; ++ } ++ //DBG_8192C("%s auth_algo= %s auth_seq=%d\n",__FUNCTION__,(pmlmeinfo->auth_algo==0)?"OPEN":"SHARED",pmlmeinfo->auth_seq); ++ ++ //setting IV for auth seq #3 ++ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ //DBG_8192C("==> iv(%d),key_index(%d)\n",pmlmeinfo->iv,pmlmeinfo->key_index); ++ val32 = ((pmlmeinfo->iv++) | (pmlmeinfo->key_index << 30)); ++ val32 = cpu_to_le32(val32); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *)&val32, &(pattrib->pktlen)); ++ ++ pattrib->iv_len = 4; ++ } ++ ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_ALGM_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // setting auth seq number ++ val16 = pmlmeinfo->auth_seq; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _AUTH_SEQ_NUM_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ ++ // setting status code... ++ val16 = status; ++ val16 = cpu_to_le16(val16); ++ pframe = rtw_set_fixed_ie(pframe, _STATUS_CODE_, (unsigned char *)&val16, &(pattrib->pktlen)); ++ ++ // then checking to see if sending challenging text... ++ if ((pmlmeinfo->auth_seq == 3) && (pmlmeinfo->state & WIFI_FW_AUTH_STATE) && (use_shared_key==1)) ++ { ++ pframe = rtw_set_ie(pframe, _CHLGETXT_IE_, 128, pmlmeinfo->chg_txt, &(pattrib->pktlen)); ++ ++ SetPrivacy(fctrl); ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->encrypt = _WEP40_; ++ ++ pattrib->icv_len = 4; ++ ++ pattrib->pktlen += pattrib->icv_len; ++ ++ } ++ ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ rtw_wep_encrypt(padapter, (u8 *)pmgntframe); ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++ ++void issue_asocrsp(_adapter *padapter, unsigned short status, struct sta_info *pstat, int pkt_type) ++{ ++#ifdef CONFIG_AP_MODE ++ struct xmit_frame *pmgntframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct pkt_attrib *pattrib; ++ unsigned char *pbuf, *pframe; ++ unsigned short val; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ u8 *ie = pnetwork->IEs; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy((void *)GetAddr1Ptr(pwlanhdr), pstat->hwaddr, ETH_ALEN); ++ _rtw_memcpy((void *)GetAddr2Ptr(pwlanhdr), myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy((void *)GetAddr3Ptr(pwlanhdr), get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ if ((pkt_type == WIFI_ASSOCRSP) || (pkt_type == WIFI_REASSOCRSP)) ++ SetFrameSubType(pwlanhdr, pkt_type); ++ else ++ return; ++ ++ pattrib->hdrlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen += pattrib->hdrlen; ++ pframe += pattrib->hdrlen; ++ ++ //capability ++ val = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ ++ pframe = rtw_set_fixed_ie(pframe, _CAPABILITY_ , (unsigned char *)&val, &(pattrib->pktlen)); ++ ++ status = cpu_to_le16(status); ++ pframe = rtw_set_fixed_ie(pframe , _STATUS_CODE_ , (unsigned char *)&status, &(pattrib->pktlen)); ++ ++ val = cpu_to_le16(pstat->aid | BIT(14) | BIT(15)); ++ pframe = rtw_set_fixed_ie(pframe, _ASOC_ID_ , (unsigned char *)&val, &(pattrib->pktlen)); ++ ++ if (pstat->bssratelen <= 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, pstat->bssratelen, pstat->bssrateset, &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, 8, pstat->bssrateset, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (pstat->bssratelen-8), pstat->bssrateset+8, &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ if ((pstat->flags & WLAN_STA_HT) && (pmlmepriv->htpriv.ht_option)) ++ { ++ uint ie_len=0; ++ ++ //FILL HT CAP INFO IE ++ //p = hostapd_eid_ht_capabilities_info(hapd, p); ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(pbuf && ie_len>0) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ } ++ ++ //FILL HT ADD INFO IE ++ //p = hostapd_eid_ht_operation(hapd, p); ++ pbuf = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(pbuf && ie_len>0) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ } ++ ++ } ++#endif ++ ++ //FILL WMM IE ++ if ((pstat->flags & WLAN_STA_WME) && (pmlmepriv->qospriv.qos_option)) ++ { ++ uint ie_len=0; ++ unsigned char WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ ++ for (pbuf = ie + _BEACON_IE_OFFSET_; ;pbuf+= (ie_len + 2)) ++ { ++ pbuf = rtw_get_ie(pbuf, _VENDOR_SPECIFIC_IE_, &ie_len, (pnetwork->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if(pbuf && _rtw_memcmp(pbuf+2, WMM_PARA_IE, 6)) ++ { ++ _rtw_memcpy(pframe, pbuf, ie_len+2); ++ pframe += (ie_len+2); ++ pattrib->pktlen +=(ie_len+2); ++ ++ break; ++ } ++ ++ if ((pbuf == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ ++ } ++ ++ ++ if (pmlmeinfo->assoc_AP_vendor == realtekAP) ++ { ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); ++ } ++ ++ //add WPS IE ie for wps 2.0 ++ if(pmlmepriv->wps_assoc_resp_ie && pmlmepriv->wps_assoc_resp_ie_len>0) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); ++ ++ pframe += pmlmepriv->wps_assoc_resp_ie_len; ++ pattrib->pktlen += pmlmepriv->wps_assoc_resp_ie_len; ++ } ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) && (pstat->is_p2p_device == _TRUE)) ++ { ++ u32 len; ++ ++ len = build_assoc_resp_p2p_ie(pwdinfo, pframe, pstat->p2p_status_code); ++ ++ pframe += len; ++ pattrib->pktlen += len; ++ } ++#ifdef CONFIG_WFD ++ wfdielen = build_assoc_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++#endif ++} ++ ++void issue_assocreq(_adapter *padapter) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe, *p; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned short val16; ++ unsigned int i, j, ie_len, index=0; ++ unsigned char rf_type, bssrate[NumRates], sta_bssrate[NumRates]; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int bssrate_len = 0, sta_bssrate_len = 0; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 p2pie[ 255 ] = { 0x00 }; ++ u16 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_DFS ++ u16 cap; ++#endif //CONFIG_DFS ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ASSOCREQ); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //caps ++ ++#ifdef CONFIG_DFS ++ _rtw_memcpy(&cap, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ cap |= BIT(8); ++ _rtw_memcpy(pframe, &cap, 2); ++#else ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++#endif //CONFIG_DFS ++ ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //listen interval ++ //todo: listen interval for power saving ++ val16 = cpu_to_le16(3); ++ _rtw_memcpy(pframe ,(unsigned char *)&val16, 2); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, pmlmeinfo->network.Ssid.SsidLength, pmlmeinfo->network.Ssid.Ssid, &(pattrib->pktlen)); ++ ++ //supported rate & extended supported rate ++ ++#if 1 // Check if the AP's supported rates are also supported by STA. ++ get_rate_set(padapter, sta_bssrate, &sta_bssrate_len); ++ //DBG_871X("sta_bssrate_len=%d\n", sta_bssrate_len); ++ ++ //for (i = 0; i < sta_bssrate_len; i++) { ++ // DBG_871X("sta_bssrate[%d]=%02X\n", i, sta_bssrate[i]); ++ //} ++ ++ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { ++ if (pmlmeinfo->network.SupportedRates[i] == 0) break; ++ DBG_871X("network.SupportedRates[%d]=%02X\n", i, pmlmeinfo->network.SupportedRates[i]); ++ } ++ ++ ++ for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) { ++ if (pmlmeinfo->network.SupportedRates[i] == 0) break; ++ ++ ++ // Check if the AP's supported rates are also supported by STA. ++ for (j=0; j < sta_bssrate_len; j++) { ++ // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP ++ if ( (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK) ++ == (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)) { ++ //DBG_871X("match i = %d, j=%d\n", i, j); ++ break; ++ } else { ++ //DBG_871X("not match: %02X != %02X\n", (pmlmeinfo->network.SupportedRates[i]|IEEE80211_BASIC_RATE_MASK), (sta_bssrate[j]|IEEE80211_BASIC_RATE_MASK)); ++ } ++ } ++ ++ if (j == sta_bssrate_len) { ++ // the rate is not supported by STA ++ DBG_871X("%s(): the rate[%d]=%02X is not supported by STA!\n",__FUNCTION__, i, pmlmeinfo->network.SupportedRates[i]); ++ } else { ++ // the rate is supported by STA ++ bssrate[index++] = pmlmeinfo->network.SupportedRates[i]; ++ } ++ } ++ ++ bssrate_len = index; ++ DBG_871X("bssrate_len = %d\n", bssrate_len); ++ ++#else // Check if the AP's supported rates are also supported by STA. ++#if 0 ++ get_rate_set(padapter, bssrate, &bssrate_len); ++#else ++ for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { ++ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0) break; ++ ++ if (pmlmeinfo->network.SupportedRates[bssrate_len] == 0x2C) // Avoid the proprietary data rate (22Mbps) of Handlink WSG-4000 AP ++ break; ++ ++ bssrate[bssrate_len] = pmlmeinfo->network.SupportedRates[bssrate_len]; ++ } ++#endif ++#endif // Check if the AP's supported rates are also supported by STA. ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //RSN ++ p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _RSN_IE_2_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if (p != NULL) ++ { ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, ie_len, (p + 2), &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ //HT caps ++ if(padapter->mlmepriv.htpriv.ht_option==_TRUE) ++ { ++ p = rtw_get_ie((pmlmeinfo->network.IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_CAPABILITY_IE_, &ie_len, (pmlmeinfo->network.IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if ((p != NULL) && (!(is_ap_in_tkip(padapter)))) ++ { ++ _rtw_memcpy(&(pmlmeinfo->HT_caps), (p + 2), sizeof(struct HT_caps_element)); ++ ++ //to disable 40M Hz support while gd_bw_40MHz_en = 0 ++ if (pregpriv->cbw40_enable == 0) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info &= (~(BIT(6) | BIT(1))); ++ } ++ else ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= BIT(1); ++ } ++ ++ //todo: disable SM power save mode ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= 0x000c; ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ //switch (pregpriv->rf_config) ++ switch(rf_type) ++ { ++ case RF_1T1R: ++ ++ if(pregpriv->rx_stbc) ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream ++ ++ _rtw_memcpy(pmlmeinfo->HT_caps.HT_cap_element.MCS_rate, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ++ if((pregpriv->rx_stbc == 0x3) ||//enable for 2.4/5 GHz ++ ((pmlmeext->cur_wireless_mode & WIRELESS_11_24N) && (pregpriv->rx_stbc == 0x1)) || //enable for 2.4GHz ++ ((pmlmeext->cur_wireless_mode & WIRELESS_11_5N) && (pregpriv->rx_stbc == 0x2))) //enable for 5GHz ++ { ++ DBG_871X("declare supporting RX STBC\n"); ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0200);//RX STBC two spatial stream ++ } ++ ++ _rtw_memcpy(pmlmeinfo->HT_caps.HT_cap_element.MCS_rate, MCS_rate_2R, 16); ++ break; ++ ++ } ++ #ifdef RTL8192C_RECONFIG_TO_1T1R ++ { ++ //if(pregpriv->rx_stbc) ++ //pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info |= cpu_to_le16(0x0100);//RX STBC One spatial stream ++ ++ _rtw_memcpy(pmlmeinfo->HT_caps.u.HT_cap_element.MCS_rate, MCS_rate_1R, 16); ++ } ++ #endif ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info = cpu_to_le16(pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info); ++ pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ie_len , (u8 *)(&(pmlmeinfo->HT_caps)), &(pattrib->pktlen)); ++ ++ } ++ } ++#endif ++ ++ //vendor specific IE, such as WPA, WMM, WPS ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, WPA_OUI, 4)) || ++ (_rtw_memcmp(pIE->data, WMM_OUI, 4)) || ++ (_rtw_memcmp(pIE->data, WPS_OUI, 4))) ++ { ++ //Commented by Kurt 20110629 ++ //In some older APs, WPS handshake ++ //would be fail if we append vender extensions informations to AP ++ if(_rtw_memcmp(pIE->data, WPS_OUI, 4)){ ++ pIE->Length=14; ++ } ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, pIE->Length, pIE->data, &(pattrib->pktlen)); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor == realtekAP) ++ { ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 6 , REALTEK_96B_IE, &(pattrib->pktlen)); ++ } ++ ++#ifdef CONFIG_P2P ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled) ++ { ++ if(pmlmepriv->p2p_assoc_req_ie && pmlmepriv->p2p_assoc_req_ie_len>0) ++ { ++ _rtw_memcpy(pframe, pmlmepriv->p2p_assoc_req_ie, pmlmepriv->p2p_assoc_req_ie_len); ++ pframe += pmlmepriv->p2p_assoc_req_ie_len; ++ pattrib->pktlen += pmlmepriv->p2p_assoc_req_ie_len; ++ } ++ } ++ else ++#endif //CONFIG_IOCTL_CFG80211 ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ // Should add the P2P IE in the association request frame. ++ // P2P OUI ++ ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20101109 ++ // According to the P2P Specification, the association request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Extended Listen Timing ++ // 3. Device Info ++ // Commented by Albert 20110516 ++ // 4. P2P Interface ++ ++ // P2P Capability ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ // Extended Listen Timing ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Availability Interval ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ p2pielen += 2; ++ ++ // Device Info ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, myid( &padapter->eeprompriv ), ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ if ( ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PEER_DISPLAY_PIN ) || ++ ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_SELF_DISPLAY_PIN ) ) ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ } ++ else ++ { ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); ++ } ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ p2pielen += 2; ++ ++ // OUI ++ *(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ p2pielen += 2; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ // P2P Interface ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_INTERFACE; ++ ++ // Length: ++ *(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x000D ); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Device Address ++ p2pielen += ETH_ALEN; ++ ++ p2pie[ p2pielen++ ] = 1; // P2P Interface Address Count ++ ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); // P2P Interface Address List ++ p2pielen += ETH_ALEN; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ } ++ } ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_assoc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++void issue_nulldata(_adapter *padapter, unsigned int power_mode) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s:%d\n", __FUNCTION__, power_mode); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ SetFrDs(fctrl); ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ SetToDs(fctrl); ++ } ++ ++ if (power_mode) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++} ++ ++ ++void issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl, *qc; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ pattrib->hdrlen +=2; ++ pattrib->qos_en = _TRUE; ++ pattrib->eosp = 1; ++ pattrib->ack_policy = 0; ++ pattrib->mdata = 0; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ SetFrDs(fctrl); ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ SetToDs(fctrl); ++ } ++ ++ if(pattrib->mdata) ++ SetMData(fctrl); ++ ++ qc = (unsigned short *)(pframe + pattrib->hdrlen - 2); ++ ++ SetPriority(qc, tid); ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_QOS_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr_qos); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++void issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s to "MAC_FMT"\n", __func__, MAC_ARG(da)); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_DEAUTH); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pframe = rtw_set_fixed_ie(pframe, _RSON_CODE_ , (unsigned char *)&reason, &(pattrib->pktlen)); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++} ++ ++void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status) ++{ ++ u8 category = RTW_WLAN_CATEGORY_BACK; ++ u16 start_seq; ++ u16 BA_para_set; ++ u16 reason_code; ++ u16 BA_timeout_value; ++ u16 BA_starting_seqctrl; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ u8 *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ ++ DBG_871X("%s, category=%d, action=%d, status=%d\n", __FUNCTION__, category, action, status); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ //_rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ ++ status = cpu_to_le16(status); ++ ++ ++ if (category == 3) ++ { ++ switch (action) ++ { ++ case 0: //ADDBA req ++ do { ++ pmlmeinfo->dialogToken++; ++ } while (pmlmeinfo->dialogToken == 0); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->dialogToken), &(pattrib->pktlen)); ++ ++ BA_para_set = (0x1002 | ((status & 0xf) << 2)); //immediate ack & 64 buffer size ++ //sys_mib.BA_para_set = 0x0802; //immediate ack & 32 buffer size ++ BA_para_set = cpu_to_le16(BA_para_set); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ ++ //BA_timeout_value = 0xffff;//max: 65535 TUs(~ 65 ms) ++ BA_timeout_value = 5000;//~ 5ms ++ BA_timeout_value = cpu_to_le16(BA_timeout_value); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_timeout_value)), &(pattrib->pktlen)); ++ ++ //if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ if ((psta = rtw_get_stainfo(pstapriv, raddr)) != NULL) ++ { ++ start_seq = (psta->sta_xmitpriv.txseq_tid[status & 0x07]&0xfff) + 1; ++ ++ DBG_871X("BA_starting_seqctrl = %d for TID=%d\n", start_seq, status & 0x07); ++ ++ psta->BA_starting_seqctrl[status & 0x07] = start_seq; ++ ++ BA_starting_seqctrl = start_seq << 4; ++ } ++ ++ BA_starting_seqctrl = cpu_to_le16(BA_starting_seqctrl); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_starting_seqctrl)), &(pattrib->pktlen)); ++ break; ++ ++ case 1: //ADDBA rsp ++ pframe = rtw_set_fixed_ie(pframe, 1, &(pmlmeinfo->ADDBA_req.dialog_token), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&status), &(pattrib->pktlen)); ++ ++ //BA_para_set = cpu_to_le16((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size ++ BA_para_set = ((le16_to_cpu(pmlmeinfo->ADDBA_req.BA_para_set) & 0x3f) | 0x1000); //64 buffer size ++ ++ if(pregpriv->ampdu_amsdu==0)//disabled ++ BA_para_set = cpu_to_le16(BA_para_set & ~BIT(0)); ++ else if(pregpriv->ampdu_amsdu==1)//enabled ++ BA_para_set = cpu_to_le16(BA_para_set | BIT(0)); ++ else //auto ++ BA_para_set = cpu_to_le16(BA_para_set); ++ ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(pmlmeinfo->ADDBA_req.BA_timeout_value)), &(pattrib->pktlen)); ++ break; ++ case 2://DELBA ++ BA_para_set = (status & 0x1F) << 3; ++ BA_para_set = cpu_to_le16(BA_para_set); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(BA_para_set)), &(pattrib->pktlen)); ++ ++ reason_code = 37;//Requested from peer STA as it does not want to use the mechanism ++ reason_code = cpu_to_le16(reason_code); ++ pframe = rtw_set_fixed_ie(pframe, 2, (unsigned char *)(&(reason_code)), &(pattrib->pktlen)); ++ break; ++ default: ++ break; ++ } ++ } ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++} ++ ++static void issue_action_BSSCoexistPacket(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ unsigned char category, action; ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct wlan_network *pnetwork = NULL; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ u8 InfoContent[16] = {0}; ++ u8 ICS[8][15]; ++ ++ if((pmlmepriv->num_FortyMHzIntolerant==0) || (pmlmepriv->num_sta_no_ht==0)) ++ return; ++ ++ if(_TRUE == pmlmeinfo->bwmode_updated) ++ return; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ category = RTW_WLAN_CATEGORY_PUBLIC; ++ action = ACT_PUBLIC_BSSCOEXIST; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ ++ ++ // ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ { ++ u8 iedata=0; ++ ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ } ++ ++ ++ // ++ _rtw_memset(ICS, 0, sizeof(ICS)); ++ if(pmlmepriv->num_sta_no_ht>0) ++ { ++ int i; ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ int len; ++ u8 *p; ++ WLAN_BSSID_EX *pbss_network; ++ ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ plist = get_next(plist); ++ ++ pbss_network = (WLAN_BSSID_EX *)&pnetwork->network; ++ ++ p = rtw_get_ie(pbss_network->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, pbss_network->IELength - _FIXED_IE_LENGTH_); ++ if((p==NULL) || (len==0))//non-HT ++ { ++ if((pbss_network->Configuration.DSConfig<=0) || (pbss_network->Configuration.DSConfig>14)) ++ continue; ++ ++ ICS[0][pbss_network->Configuration.DSConfig]=1; ++ ++ if(ICS[0][0] == 0) ++ ICS[0][0] = 1; ++ } ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ ++ for(i= 0;i<8;i++) ++ { ++ if(ICS[i][0] == 1) ++ { ++ int j, k = 0; ++ ++ InfoContent[k] = i; ++ //SET_BSS_INTOLERANT_ELE_REG_CLASS(InfoContent,i); ++ k++; ++ ++ for(j=1;j<=14;j++) ++ { ++ if(ICS[i][j]==1) ++ { ++ if(k<16) ++ { ++ InfoContent[k] = j; //channel number ++ //SET_BSS_INTOLERANT_ELE_CHANNEL(InfoContent+k, j); ++ k++; ++ } ++ } ++ } ++ ++ pframe = rtw_set_ie(pframe, EID_BSSIntolerantChlReport, k, InfoContent, &(pattrib->pktlen)); ++ ++ } ++ ++ } ++ ++ ++ } ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta = NULL; ++ //struct recv_reorder_ctrl *preorder_ctrl; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u16 tid; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ if (!(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)) ++ return _SUCCESS; ++ ++ psta = rtw_get_stainfo(pstapriv, addr); ++ if(psta==NULL) ++ return _SUCCESS; ++ ++ //DBG_8192C("%s:%s\n", __FUNCTION__, (initiator==0)?"RX_DIR":"TX_DIR"); ++ ++ if(initiator==0) // recipient ++ { ++ for(tid = 0;tidrecvreorder_ctrl[tid].enable == _TRUE) ++ { ++ DBG_8192C("rx agg disable tid(%d)\n",tid); ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F)); ++ psta->recvreorder_ctrl[tid].enable = _FALSE; ++ psta->recvreorder_ctrl[tid].indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d indicate_seq:%u \n", __FUNCTION__, __LINE__, ++ psta->recvreorder_ctrl[tid].indicate_seq); ++ #endif ++ } ++ } ++ } ++ else if(initiator == 1)// originator ++ { ++ //DBG_8192C("tx agg_enable_bitmap(0x%08x)\n", psta->htpriv.agg_enable_bitmap); ++ for(tid = 0;tidhtpriv.agg_enable_bitmap & BIT(tid)) ++ { ++ DBG_8192C("tx agg disable tid(%d)\n",tid); ++ issue_action_BA(padapter, addr, RTW_WLAN_ACTION_DELBA, (((tid <<1) |initiator)&0x1F) ); ++ psta->htpriv.agg_enable_bitmap &= ~BIT(tid); ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(tid); ++ ++ } ++ } ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++unsigned int send_beacon(_adapter *padapter) ++{ ++ u8 bxmitok = _FALSE; ++ int retry=0; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++#ifdef CONFIG_PCI_HCI ++ ++ issue_beacon(padapter); ++ ++ return _SUCCESS; ++ ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ do{ ++ ++ issue_beacon(padapter); ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TX_BCN_DONE, (u8 *)(&bxmitok)); ++ ++ }while((_FALSE == bxmitok) &&((retry++)<100 )); ++ ++ if(retry == 100) ++ { ++ DBG_871X("send_beacon, fail!\n"); ++ return _FAIL; ++ } ++ else ++ { ++ return _SUCCESS; ++ } ++#endif ++ ++} ++ ++/**************************************************************************** ++ ++Following are some utitity fuctions for WiFi MLME ++ ++*****************************************************************************/ ++ ++BOOLEAN IsLegal5GChannel( ++ IN PADAPTER Adapter, ++ IN u8 channel) ++{ ++ ++ int i=0; ++ u8 Channel_5G[45] = {36,38,40,42,44,46,48,50,52,54,56,58, ++ 60,62,64,100,102,104,106,108,110,112,114,116,118,120,122, ++ 124,126,128,130,132,134,136,138,140,149,151,153,155,157,159, ++ 161,163,165}; ++ for(i=0;imlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 initialgain = 0; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ static unsigned char prev_survey_channel = 0; ++ static unsigned int p2p_scan_count = 0; ++ ++ if(rtw_p2p_findphase_ex_is_social(pwdinfo)) ++ { ++ // Commented by Albert 2011/06/03 ++ // The driver is in the find phase, it should go through the social channel. ++ survey_channel = pwdinfo->social_chan[pmlmeext->sitesurvey_res.channel_idx]; ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; ++ } ++ ++ ScanType = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ScanType; ++ ++ //DBG_871X("switching to ch:%d (cnt:%u,idx:%d) at %dms, %c%c%c\n" ++ // , survey_channel ++ // , pwdinfo->find_phase_state_exchange_cnt, pmlmeext->sitesurvey_res.channel_idx ++ // , rtw_get_passing_time_ms(padapter->mlmepriv.scan_start_time) ++ // , ScanType?'A':'P', pmlmeext->sitesurvey_res.scan_mode?'A':'P' ++ // , pmlmeext->sitesurvey_res.ssid[0].SsidLength?'S':' ' ++ //); ++ ++ if(survey_channel != 0) ++ { ++ //PAUSE 4-AC Queue when site_survey ++ //padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++ //val8 |= 0x0f; ++ //padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++ ++ if(pmlmeext->sitesurvey_res.channel_idx == 0) ++ { ++ set_channel_bwmode(padapter, survey_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ { ++ SelectChannel(padapter, survey_channel); ++ } ++ ++ ++ if(ScanType == SCAN_ACTIVE) //obey the channel plan setting... ++ { ++ #ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || ++ rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH) ++ ) ++ { ++ issue_probereq_p2p(padapter); ++ issue_probereq_p2p(padapter); ++ issue_probereq_p2p(padapter); ++ } ++ else ++ #endif //CONFIG_P2P ++ { ++ int i; ++ for(i=0;isitesurvey_res.ssid[i].SsidLength) { ++ //todo: to issue two probe req??? ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]),1); ++ //rtw_msleep_os(SURVEY_TO>>1); ++ issue_probereq(padapter, &(pmlmeext->sitesurvey_res.ssid[i]),1); ++ } else { ++ break; ++ } ++ } ++ ++ if(pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE) { ++ //todo: to issue two probe req??? ++ issue_probereq(padapter, NULL, 1); ++ //rtw_msleep_os(SURVEY_TO>>1); ++ issue_probereq(padapter, NULL, 1); ++ } ++ } ++ } ++ ++ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); ++ ++ } ++ else ++ { ++ ++ // channel number is 0 or this channel is not valid. ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) ++ { ++ #ifdef CONFIG_DBG_P2P ++ DBG_8192C( "[%s] find phase exchange cnt = %d\n", __FUNCTION__, pwdinfo->find_phase_state_exchange_cnt ); ++ #endif ++ } ++ ++ if(rtw_p2p_findphase_ex_is_needed(pwdinfo)) ++ { ++ // Set the P2P State to the listen state of find phase and set the current channel to the listen channel ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_LISTEN); ++ ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ ++ _set_timer( &pwdinfo->find_phase_timer, ( u32 ) ( ( u32 ) ( pwdinfo->listen_dwell ) * 100 ) ); ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ // 20100721:Interrupt scan operation here. ++ // For SW antenna diversity before link, it needs to switch to another antenna and scan again. ++ // It compares the scan result and select beter one to do connection. ++ if(padapter->HalFunc.SwAntDivBeforeLinkHandler(padapter)) ++ { ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->sitesurvey_res.channel_idx = -1; ++ pmlmeext->chan_scan_time = SURVEY_TO /2; ++ set_survey_timer(pmlmeext, pmlmeext->chan_scan_time); ++ return; ++ } ++#endif ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_SCAN) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ } ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++#endif //CONFIG_P2P ++ ++ pmlmeext->sitesurvey_res.state = SCAN_COMPLETE; ++ ++ //switch back to the original channel ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK) ++ && pwdinfo->peer_operating_ch != 0 ++ ) ++ { ++ DBG_8192C( "[%s] In P2P WPS mode, stay in the peer operating channel = %d\n", __FUNCTION__, pwdinfo->peer_operating_ch ); ++ set_channel_bwmode(padapter, pwdinfo->peer_operating_ch, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ else ++#endif //CONFIG_P2P ++ { ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ } ++ ++ //flush 4-AC Queue after site_survey ++ //val8 = 0; ++ //padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, (u8 *)(&val8)); ++ ++ val8 = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ //config MSR ++ Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ initialgain = 0xff; //restore RX GAIN ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ //turn on dynamic functions ++ Restore_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ if (is_client_associated_to_ap(padapter) == _TRUE) ++ { ++ //issue null data ++ issue_nulldata(padapter, 0); ++ } ++ ++ report_surveydone_event(padapter); ++ ++ pmlmeext->chan_scan_time = SURVEY_TO; ++ pmlmeext->sitesurvey_res.state = SCAN_DISABLE; ++ ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); ++ issue_action_BSSCoexistPacket(padapter); ++ ++ } ++ ++ } ++ ++ return; ++ ++} ++ ++//collect bss info from Beacon and Probe response frames. ++u8 collect_bss_info(_adapter *padapter, union recv_frame *precv_frame, WLAN_BSSID_EX *bssid) ++{ ++ int i; ++ u32 len; ++ u8 *p; ++ u16 val16, subtype; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ u32 packet_len = precv_frame->u.hdr.len; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ len = packet_len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ if (len > MAX_IE_SZ) ++ { ++ //DBG_8192C("IE too long for survey event\n"); ++ return _FAIL; ++ } ++ ++ _rtw_memset(bssid, 0, sizeof(WLAN_BSSID_EX)); ++ ++ subtype = GetFrameSubType(pframe); ++ ++ if(subtype==WIFI_BEACON) ++ bssid->Reserved[0] = 1; ++ else ++ bssid->Reserved[0] = 0; ++ ++ bssid->Length = sizeof(WLAN_BSSID_EX) - MAX_IE_SZ + len; ++ ++ //below is to copy the information element ++ bssid->IELength = len; ++ _rtw_memcpy(bssid->IEs, (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)), bssid->IELength); ++ ++ //get the signal strength ++ bssid->PhyInfo.SignalQuality = precv_frame->u.hdr.attrib.signal_qual;//in percentage ++ bssid->PhyInfo.SignalStrength = precv_frame->u.hdr.attrib.signal_strength;//in percentage ++ bssid->Rssi = precv_frame->u.hdr.attrib.RecvSignalPower; // in dBM.raw data ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ //padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_CURRENT_ANTENNA, (u8 *)(&bssid->PhyInfo.Optimum_antenna)); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_CURRENT_ANTENNA, &bssid->PhyInfo.Optimum_antenna); ++#endif ++ ++ // checking SSID ++ if ((p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SSID_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_)) == NULL) ++ { ++ DBG_871X("marc: cannot find SSID for survey event\n"); ++ return _FAIL; ++ } ++ ++ if (*(p + 1)) ++ { ++ _rtw_memcpy(bssid->Ssid.Ssid, (p + 2), *(p + 1)); ++ bssid->Ssid.SsidLength = *(p + 1); ++ } ++ else ++ { ++ bssid->Ssid.SsidLength = 0; ++ } ++ ++ _rtw_memset(bssid->SupportedRates, 0, NDIS_802_11_LENGTH_RATES_EX); ++ ++ //checking rate info... ++ i = 0; ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(bssid->SupportedRates, (p + 2), len); ++ i = len; ++ } ++ ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _EXT_SUPPORTEDRATES_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(bssid->SupportedRates + i, (p + 2), len); ++ } ++ ++ //todo: ++#if 0 ++ if (judge_network_type(bssid->SupportedRates, (len + i)) == WIRELESS_11B) ++ { ++ bssid->NetworkTypeInUse = Ndis802_11DS; ++ } ++ else ++#endif ++ { ++ bssid->NetworkTypeInUse = Ndis802_11OFDM24; ++ } ++ ++ // Checking for DSConfig ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _DSSET_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ ++ bssid->Configuration.DSConfig = 0; ++ bssid->Configuration.Length = 0; ++ ++ if (p) ++ { ++ bssid->Configuration.DSConfig = *(p + 2); ++ } ++ else ++ {// In 5G, some ap do not have DSSET IE ++ // checking HT info for channel ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_ADD_INFO_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if(p) ++ { ++ struct HT_info_element *HT_info = (struct HT_info_element *)(p + 2); ++ bssid->Configuration.DSConfig = HT_info->primary_channel; ++ } ++ else ++ { // use current channel ++ if (padapter->mlmeextpriv.sitesurvey_res.state == SCAN_PROCESS) ++ bssid->Configuration.DSConfig = padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum; ++ else ++ bssid->Configuration.DSConfig = padapter->mlmeextpriv.cur_channel; ++ } ++ } ++ ++ _rtw_memcpy(&bssid->Configuration.BeaconPeriod, rtw_get_beacon_interval_from_ie(bssid->IEs), 2); ++ ++ ++ bssid->Configuration.BeaconPeriod = le32_to_cpu(bssid->Configuration.BeaconPeriod); ++ ++ val16 = rtw_get_capability((WLAN_BSSID_EX *)bssid); ++ ++ if (val16 & BIT(0)) ++ { ++ bssid->InfrastructureMode = Ndis802_11Infrastructure; ++ _rtw_memcpy(bssid->MacAddress, GetAddr2Ptr(pframe), ETH_ALEN); ++ } ++ else ++ { ++ bssid->InfrastructureMode = Ndis802_11IBSS; ++ _rtw_memcpy(bssid->MacAddress, GetAddr3Ptr(pframe), ETH_ALEN); ++ } ++ ++ if (val16 & BIT(4)) ++ bssid->Privacy = 1; ++ else ++ bssid->Privacy = 0; ++ ++ bssid->Configuration.ATIMWindow = 0; ++ ++ //20/40 BSS Coexistence check ++ if((pregistrypriv->wifi_spec==1) && (_FALSE == pmlmeinfo->bwmode_updated)) ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ p = rtw_get_ie(bssid->IEs + _FIXED_IE_LENGTH_, _HT_CAPABILITY_IE_, &len, bssid->IELength - _FIXED_IE_LENGTH_); ++ if(p && len>0) ++ { ++ struct HT_caps_element *pHT_caps; ++ pHT_caps = (struct HT_caps_element *)(p + 2); ++ ++ if(pHT_caps->HT_cap_element.HT_caps_info&BIT(14)) ++ { ++ pmlmepriv->num_FortyMHzIntolerant++; ++ } ++ } ++ else ++ { ++ pmlmepriv->num_sta_no_ht++; ++ } ++ ++ } ++ ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) & 1 ++ if(strcmp(bssid->Ssid.Ssid, DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED) == 0) { ++ DBG_871X("Receiving %s("MAC_FMT", DSConfig:%u) from ch%u with ss:%3u, sq:%3u, RawRSSI:%3ld\n" ++ , bssid->Ssid.Ssid, MAC_ARG(bssid->MacAddress), bssid->Configuration.DSConfig ++ , padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum ++ , bssid->PhyInfo.SignalStrength, bssid->PhyInfo.SignalQuality, bssid->Rssi ++ ); ++ } ++ #endif ++ ++ // mark bss info receving from nearby channel as SignalQuality 101 ++ if(bssid->Configuration.DSConfig != padapter->mlmeextpriv.channel_set[padapter->mlmeextpriv.sitesurvey_res.channel_idx].ChannelNum) ++ { ++ bssid->PhyInfo.SignalQuality= 101; ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++void start_create_ibss(_adapter* padapter) ++{ ++ unsigned short caps; ++ u32 val32; ++ u8 val8; ++ u8 join_type; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; ++ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); ++ ++ //update wireless mode ++ update_wireless_mode(padapter); ++ ++ //udpate capability ++ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); ++ update_capinfo(padapter, caps); ++ if(caps&cap_IBSS)//adhoc master ++ { ++ //set_opmode_cmd(padapter, adhoc);//removed ++ ++ val8 = 0xcf; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //switch channel ++ //SelectChannel(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ ++ beacon_timing_control(padapter); ++ ++ //set msr to WIFI_FW_ADHOC_STATE ++ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; ++ Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ //issue beacon ++ if(send_beacon(padapter)==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_err_,("issuing beacon frame fail....\n")); ++ ++ report_join_res(padapter, -1); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ } ++ else ++ { ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, padapter->registrypriv.dev_network.MacAddress); ++ join_type = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ report_join_res(padapter, 1); ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ } ++ } ++ else ++ { ++ DBG_871X("start_create_ibss, invalid cap:%x\n", caps); ++ return; ++ } ++ ++} ++ ++void start_clnt_join(_adapter* padapter) ++{ ++ unsigned short caps; ++ u8 val8; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ ++ ++ pmlmeext->cur_channel = (u8)pnetwork->Configuration.DSConfig; ++ pmlmeinfo->bcn_interval = get_beacon_interval(pnetwork); ++ ++ //update wireless mode ++ update_wireless_mode(padapter); ++ ++ //udpate capability ++ caps = rtw_get_capability((WLAN_BSSID_EX *)pnetwork); ++ update_capinfo(padapter, caps); ++ if (caps&cap_ESS) ++ { ++ Set_NETYPE0_MSR(padapter, WIFI_FW_STATION_STATE); ++ ++ val8 = (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //switch channel ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ //here wait for receiving the beacon to start auth ++ //and enable a timer ++ set_link_timer(pmlmeext, decide_wait_for_beacon_timeout(pmlmeinfo->bcn_interval)); ++ ++ pmlmeinfo->state = WIFI_FW_AUTH_NULL | WIFI_FW_STATION_STATE; ++ } ++ else if (caps&cap_IBSS) //adhoc client ++ { ++ Set_NETYPE0_MSR(padapter, WIFI_FW_ADHOC_STATE); ++ ++ val8 = 0xcf; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //switch channel ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ beacon_timing_control(padapter); ++ ++ pmlmeinfo->state = WIFI_FW_ADHOC_STATE; ++ ++ report_join_res(padapter, 1); ++ } ++ else ++ { ++ //DBG_8192C("marc: invalid cap:%x\n", caps); ++ return; ++ } ++ ++} ++ ++void start_clnt_auth(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ pmlmeinfo->state &= (~WIFI_FW_AUTH_NULL); ++ pmlmeinfo->state |= WIFI_FW_AUTH_STATE; ++ ++ pmlmeinfo->auth_seq = 1; ++ pmlmeinfo->reauth_count = 0; ++ pmlmeinfo->reassoc_count = 0; ++ pmlmeinfo->link_count = 0; ++ ++ ++ // Because of AP's not receiving deauth before ++ // AP may: 1)not response auth or 2)deauth us after link is complete ++ // issue deauth before issuing auth to deal with the situation ++ issue_deauth(padapter, (&(pmlmeinfo->network))->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ ++ issue_auth(padapter, NULL, 0); ++ ++ set_link_timer(pmlmeext, REAUTH_TO); ++ ++} ++ ++ ++void start_clnt_assoc(_adapter* padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ pmlmeinfo->state &= (~(WIFI_FW_AUTH_NULL | WIFI_FW_AUTH_STATE)); ++ pmlmeinfo->state |= (WIFI_FW_AUTH_SUCCESS | WIFI_FW_ASSOC_STATE); ++ ++ issue_assocreq(padapter); ++ ++ set_link_timer(pmlmeext, REASSOC_TO); ++} ++ ++unsigned int receive_disconnect(_adapter *padapter, unsigned char *MacAddr, unsigned short reason) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //check A3 ++ if (!(_rtw_memcmp(MacAddr, get_my_bssid(&pmlmeinfo->network), ETH_ALEN))) ++ return _SUCCESS; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_del_sta_event(padapter, MacAddr, reason); ++ } ++ else if (pmlmeinfo->state & WIFI_FW_LINKING_STATE) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -2); ++ } ++ } ++ ++ return _SUCCESS; ++} ++ ++/**************************************************************************** ++ ++Following are the functions to report events ++ ++*****************************************************************************/ ++ ++void report_survey_event(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct survey_event *psurvey_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ //u8 *pframe = precv_frame->u.hdr.rx_data; ++ //uint len = precv_frame->u.hdr.len; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct survey_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct survey_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_Survey); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ psurvey_evt = (struct survey_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ ++ if (collect_bss_info(padapter, precv_frame, (WLAN_BSSID_EX *)&psurvey_evt->bss) == _FAIL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *)pevtcmd, cmdsz); ++ return; ++ } ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ pmlmeext->sitesurvey_res.bss_cnt++; ++ ++ return; ++ ++} ++ ++void report_surveydone_event(_adapter *padapter) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct surveydone_event *psurveydone_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct surveydone_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct surveydone_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_SurveyDone); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ psurveydone_evt = (struct surveydone_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ psurveydone_evt->bss_cnt = pmlmeext->sitesurvey_res.bss_cnt; ++ ++ DBG_871X("survey done event(%x)\n", psurveydone_evt->bss_cnt); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++ ++} ++ ++void report_join_res(_adapter *padapter, int res) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct joinbss_event *pjoinbss_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct joinbss_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct joinbss_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_JoinBss); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ pjoinbss_evt = (struct joinbss_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(pjoinbss_evt->network.network)), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); ++ pjoinbss_evt->network.join_res = pjoinbss_evt->network.aid = res; ++ ++ DBG_871X("report_join_res(%d)\n", res); ++ ++ ++ rtw_joinbss_event_prehandle(padapter, (u8 *)&pjoinbss_evt->network); ++ ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++ ++} ++ ++void report_del_sta_event(_adapter *padapter, unsigned char* MacAddr, unsigned short reason) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct stadel_event *pdel_sta_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct stadel_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct stadel_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_DelSTA); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ pdel_sta_evt = (struct stadel_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(pdel_sta_evt->macaddr)), MacAddr, ETH_ALEN); ++ _rtw_memcpy((unsigned char *)(pdel_sta_evt->rsvd),(unsigned char *)(&reason),2); ++ ++ DBG_871X("report_del_sta_event: delete STA\n"); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++} ++ ++void report_add_sta_event(_adapter *padapter, unsigned char* MacAddr, int cam_idx) ++{ ++ struct cmd_obj *pcmd_obj; ++ u8 *pevtcmd; ++ u32 cmdsz; ++ struct stassoc_event *padd_sta_evt; ++ struct C2HEvent_Header *pc2h_evt_hdr; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ if ((pcmd_obj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ cmdsz = (sizeof(struct stassoc_event) + sizeof(struct C2HEvent_Header)); ++ if ((pevtcmd = (u8*)rtw_zmalloc(cmdsz)) == NULL) ++ { ++ rtw_mfree((u8 *)pcmd_obj, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ _rtw_init_listhead(&pcmd_obj->list); ++ ++ pcmd_obj->cmdcode = GEN_CMD_CODE(_Set_MLME_EVT); ++ pcmd_obj->cmdsz = cmdsz; ++ pcmd_obj->parmbuf = pevtcmd; ++ ++ pcmd_obj->rsp = NULL; ++ pcmd_obj->rspsz = 0; ++ ++ pc2h_evt_hdr = (struct C2HEvent_Header*)(pevtcmd); ++ pc2h_evt_hdr->len = sizeof(struct stassoc_event); ++ pc2h_evt_hdr->ID = GEN_EVT_CODE(_AddSTA); ++ pc2h_evt_hdr->seq = ATOMIC_INC_RETURN(&pmlmeext->event_seq); ++ ++ padd_sta_evt = (struct stassoc_event*)(pevtcmd + sizeof(struct C2HEvent_Header)); ++ _rtw_memcpy((unsigned char *)(&(padd_sta_evt->macaddr)), MacAddr, ETH_ALEN); ++ padd_sta_evt->cam_id = cam_idx; ++ ++ DBG_871X("report_add_sta_event: add STA\n"); ++ ++ rtw_enqueue_cmd(pcmdpriv, pcmd_obj); ++ ++ return; ++} ++ ++ ++/**************************************************************************** ++ ++Following are the event callback functions ++ ++*****************************************************************************/ ++ ++//for sta/adhoc mode ++void update_sta_info(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //ERP ++ VCS_update(padapter, psta); ++ ++ ++ //HT ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ ++ psta->htpriv.ampdu_enable = pmlmepriv->htpriv.ampdu_enable; ++ ++ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) ++ psta->htpriv.sgi = _TRUE; ++ ++ psta->qos_option = _TRUE; ++ ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ ++ psta->htpriv.ampdu_enable = _FALSE; ++ ++ psta->htpriv.sgi = _FALSE; ++ ++ psta->qos_option = _FALSE; ++ ++ } ++ ++ psta->htpriv.bwmode = pmlmeext->cur_bwmode; ++ psta->htpriv.ch_offset = pmlmeext->cur_ch_offset; ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //QoS ++ if(pmlmepriv->qospriv.qos_option) ++ psta->qos_option = _TRUE; ++ ++ ++ psta->state = _FW_LINKED; ++ ++} ++ ++u8 null_addr[ETH_ALEN]= {0,0,0,0,0,0}; ++ ++void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res) ++{ ++ struct sta_info *psta, *psta_bmc; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 join_type, init_rts_rate; ++ ++ if(join_res < 0) ++ { ++ join_type = 1; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr); ++ return; ++ } ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ //for bc/mc ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(psta_bmc) ++ { ++ pmlmeinfo->FW_sta_info[psta_bmc->mac_id].psta = psta_bmc; ++ update_bmc_sta_support_rate(padapter, psta_bmc->mac_id); ++ Update_RA_Entry(padapter, psta_bmc->mac_id); ++ } ++ } ++ ++ ++ //turn on dynamic functions ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ // update IOT-releated issue ++ update_IOT_info(padapter); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BASIC_RATE, cur_network->SupportedRates); ++ ++ //BCN interval ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&pmlmeinfo->bcn_interval)); ++ ++ //udpate capability ++ update_capinfo(padapter, pmlmeinfo->capability); ++ ++ //WMM, Update EDCA param ++ WMMOnAssocRsp(padapter); ++ ++ //HT ++ HTOnAssocRsp(padapter); ++ ++ ++ //Set cur_channel&cur_bwmode&cur_ch_offset ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ ++ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); ++ if (psta) //only for infra. mode ++ { ++ pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; ++ ++ //DBG_871X("set_sta_rate\n"); ++ ++ //set per sta rate after updating HT cap. ++ set_sta_rate(padapter, psta); ++ } ++ ++ join_type = 2; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE) ++ { ++ // correcting TSF ++ correct_TSF(padapter, pmlmeext); ++ ++ //set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++ ++#ifdef CONFIG_LPS ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_CONNECT, 0); ++#endif ++ ++ DBG_871X("=>%s\n", __FUNCTION__); ++ ++} ++ ++void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 join_type; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ if(pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS)//adhoc master or sta_count>1 ++ { ++ //nothing to do ++ } ++ else//adhoc client ++ { ++ //update TSF Value ++ //update_TSF(pmlmeext, pframe, len); ++ ++ // correcting TSF ++ correct_TSF(padapter, pmlmeext); ++ ++ //start beacon ++ if(send_beacon(padapter)==_FAIL) ++ { ++ pmlmeinfo->FW_sta_info[psta->mac_id].status = 0; ++ ++ pmlmeinfo->state ^= WIFI_FW_ADHOC_STATE; ++ ++ return; ++ } ++ ++ pmlmeinfo->state |= WIFI_FW_ASSOC_SUCCESS; ++ ++ } ++ ++ join_type = 2; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ } ++ ++ pmlmeinfo->FW_sta_info[psta->mac_id].psta = psta; ++ ++ //rate radaptive ++ Update_RA_Entry(padapter, psta->mac_id); ++ ++ //update adhoc sta_info ++ update_sta_info(padapter, psta); ++ ++} ++ ++void mlmeext_sta_del_event_callback(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (is_client_associated_to_ap(padapter) || is_IBSS_empty(padapter)) ++ { ++ //set_opmode_cmd(padapter, infra_client_with_mlme); ++ ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr); ++ ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ flush_all_cam_entry(padapter); ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ //set MSR to no link state ++ Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ } ++ ++} ++ ++/**************************************************************************** ++ ++Following are the functions for the timer handlers ++ ++*****************************************************************************/ ++ ++void _linked_rx_signal_strehgth_display(_adapter *padapter) ++{ ++ int UndecoratedSmoothedPWDB; ++ DBG_8192C("============ linked status check ===================\n"); ++ DBG_8192C("pathA Rx SNRdb:%d, pathB Rx SNRdb:%d\n",padapter->recvpriv.RxSNRdB[0],padapter->recvpriv.RxSNRdB[1]); ++ DBG_8192C("pathA Rx RSSI:%d,pathB Rx RSSI:%d\n",padapter->recvpriv.RxRssi[0],padapter->recvpriv.RxRssi[1]); ++ ++ DBG_8192C("pathA Rx PWDB:%d\n",padapter->recvpriv.rxpwdb); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, &UndecoratedSmoothedPWDB); ++ DBG_8192C("UndecoratedSmoothedPWDB:%d\n",UndecoratedSmoothedPWDB); ++ DBG_8192C("Rx RSSI:%d\n",padapter->recvpriv.rssi); ++ DBG_8192C("Rx Signal_strength:%d\n",padapter->recvpriv.signal_strength); ++ DBG_8192C("Rx Signal_qual:%d \n",padapter->recvpriv.signal_qual); ++ DBG_8192C("============ linked status check ===================\n"); ++ DBG_8192C(" DIG PATH-A(0x%02x), PATH-B(0x%02x)\n",rtw_read8(padapter,0xc50),rtw_read8(padapter,0xc58)); ++ DBG_8192C(" OFDM -Alarm DA2(0x%04x),DA4(0x%04x),DA6(0x%04x),DA8(0x%04x)\n", ++ rtw_read16(padapter,0xDA2),rtw_read16(padapter,0xDA4),rtw_read16(padapter,0xDA6),rtw_read16(padapter,0xDA8)); ++ ++ DBG_8192C(" CCK -Alarm A5B(0x%02x),A5C(0x%02x)\n",rtw_read8(padapter,0xA5B),rtw_read8(padapter,0xA5C)); ++ DBG_8192C(" FalseAlmCnt_all(%d)\n",padapter->recvpriv.FalseAlmCnt_all); ++} ++ ++void linked_status_chk(_adapter *padapter) ++{ ++ u32 i; ++ struct sta_info *psta; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++ if(padapter->bRxRSSIDisplay) ++ _linked_rx_signal_strehgth_display(padapter); ++ ++ if (is_client_associated_to_ap(padapter)) ++ { ++ //linked infrastructure client mode ++ if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ { ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("%s rx:"STA_PKTS_FMT", BI:%u, retry:%u\n" ++ , __FUNCTION__ ++ , STA_RX_PKTS_ARG(psta) ++ , pmlmeinfo->bcn_interval ++ , pmlmeext->retry ++ ); ++ #endif ++ ++ /*to monitor whether the AP is alive or not*/ ++ if (sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ { ++ // Commented by Albert 2010/07/21 ++ // In this case, there is no any rx packet received by driver. ++ ++ #ifdef DBG_ROAMING_TEST ++ if(pmlmeext->retry<1) ++ #else ++ if(pmlmeext->retry<8)// Alter the retry limit to 8 ++ #endif ++ { ++ if(pmlmeext->retry==0) ++ { ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ if(padapter->HalFunc.sreset_linked_status_check) ++ padapter->HalFunc.sreset_linked_status_check(padapter); ++ #endif ++ ++ // In order to know the AP's current state, try to send the probe request ++ // to trigger the AP to send the probe response. ++ #ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) { ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("issue_probereq_p2p to trigger probersp, retry=%d\n", pmlmeext->retry); ++ #endif ++ issue_probereq_p2p(padapter); ++ } else ++ #endif ++ { ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("issue_probereq to trigger probersp, retry=%d\n", pmlmeext->retry); ++ #endif ++ issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0); ++ issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0); ++ issue_probereq(padapter, &(pmlmeinfo->network.Ssid), 0); ++ } ++ } ++ ++ pmlmeext->retry++; ++ } ++ else ++ { ++ pmlmeext->retry = 0; ++ DBG_871X("no beacon to call receive_disconnect()\n"); ++ receive_disconnect(padapter, pmlmeinfo->network.MacAddress ++ , 65535// indicate disconnect caused by no rx ++ ); ++ pmlmeinfo->link_count = 0; ++ return; ++ } ++ } ++ else ++ { ++ pmlmeext->retry = 0; ++ sta_update_last_rx_pkts(psta); ++ //set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++ ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("%s tx_pkts:%llu, link_count:%u\n", __FUNCTION__ ++ , pxmitpriv->tx_pkts ++ , pmlmeinfo->link_count ++ ); ++ #endif ++ ++ /*to send the AP a nulldata if no frame is xmitted in order to keep alive*/ ++ if(pxmitpriv->last_tx_pkts == pxmitpriv->tx_pkts) ++ { ++ if(pmlmeinfo->link_count++ == 0xf) ++ { ++ //DBG_871X("(Interface %d)issue nulldata to keep alive\n",padapter->dvobjpriv.InterfaceNumber); ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("%s issue_nulldata 0\n", __FUNCTION__); ++ #endif ++ issue_nulldata(padapter, 0); ++ pmlmeinfo->link_count = 0; ++ } ++ } ++ else ++ { ++ pxmitpriv->last_tx_pkts = pxmitpriv->tx_pkts; ++ pmlmeinfo->link_count = 0; ++ } ++ ++ } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) ++ } ++ else if (is_client_associated_to_ibss(padapter)) ++ { ++ //linked IBSS mode ++ //for each assoc list entry to check the rx pkt counter ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ psta = pmlmeinfo->FW_sta_info[i].psta; ++ ++ if(NULL==psta) continue; ++ ++ if (pmlmeinfo->FW_sta_info[i].rx_pkt == sta_rx_pkts(psta)) ++ { ++ ++ if(pmlmeinfo->FW_sta_info[i].retry<3) ++ { ++ pmlmeinfo->FW_sta_info[i].retry++; ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].retry = 0; ++ pmlmeinfo->FW_sta_info[i].status = 0; ++ report_del_sta_event(padapter, psta->hwaddr ++ , 65535// indicate disconnect caused by no rx ++ ); ++ } ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].retry = 0; ++ pmlmeinfo->FW_sta_info[i].rx_pkt = (u32)sta_rx_pkts(psta); ++ } ++ } ++ } ++ ++ //set_link_timer(pmlmeext, DISCONNECT_TO); ++ ++ } ++ ++} ++ ++void survey_timer_hdl(_adapter *padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct sitesurvey_parm *psurveyPara; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif ++ ++ //DBG_8192C("marc: survey timer\n"); ++ ++ //issue rtw_sitesurvey_cmd ++ if (pmlmeext->sitesurvey_res.state > SCAN_START) ++ { ++ if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ pmlmeext->sitesurvey_res.channel_idx++; ++ ++ if(pmlmeext->scan_abort == _TRUE) ++ { ++ #ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(&padapter->wdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_MAX); ++ pmlmeext->sitesurvey_res.channel_idx = 3; ++ DBG_871X("%s idx:%d, cnt:%u\n", __FUNCTION__ ++ , pmlmeext->sitesurvey_res.channel_idx ++ , pwdinfo->find_phase_state_exchange_cnt ++ ); ++ } ++ else ++ #endif ++ { ++ pmlmeext->sitesurvey_res.channel_idx = pmlmeext->max_chan_nums; ++ DBG_871X("%s idx:%d\n", __FUNCTION__ ++ , pmlmeext->sitesurvey_res.channel_idx ++ ); ++ } ++ ++ pmlmeext->scan_abort = _FALSE;//reset ++ } ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ goto exit_survey_timer_hdl; ++ } ++ ++ if ((psurveyPara = (struct sitesurvey_parm*)rtw_zmalloc(sizeof(struct sitesurvey_parm))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ goto exit_survey_timer_hdl; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); ++ rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ ++ ++exit_survey_timer_hdl: ++ ++ return; ++} ++ ++void link_timer_hdl(_adapter *padapter) ++{ ++ static unsigned int rx_pkt = 0; ++ static u64 tx_cnt = 0; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if (pmlmeinfo->state & WIFI_FW_AUTH_NULL) ++ { ++ DBG_871X("link_timer_hdl:no beacon while connecting\n"); ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -3); ++ } ++ else if (pmlmeinfo->state & WIFI_FW_AUTH_STATE) ++ { ++ //re-auth timer ++ if (++pmlmeinfo->reauth_count > REAUTH_LIMIT) ++ { ++ //if (pmlmeinfo->auth_algo != dot11AuthAlgrthm_Auto) ++ //{ ++ pmlmeinfo->state = 0; ++ report_join_res(padapter, -1); ++ return; ++ //} ++ //else ++ //{ ++ // pmlmeinfo->auth_algo = dot11AuthAlgrthm_Shared; ++ // pmlmeinfo->reauth_count = 0; ++ //} ++ } ++ ++ DBG_871X("link_timer_hdl: auth timeout and try again\n"); ++ pmlmeinfo->auth_seq = 1; ++ issue_auth(padapter, NULL, 0); ++ set_link_timer(pmlmeext, REAUTH_TO); ++ } ++ else if (pmlmeinfo->state & WIFI_FW_ASSOC_STATE) ++ { ++ //re-assoc timer ++ if (++pmlmeinfo->reassoc_count > REASSOC_LIMIT) ++ { ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ report_join_res(padapter, -2); ++ return; ++ } ++ ++ DBG_871X("link_timer_hdl: assoc timeout and try again\n"); ++ issue_assocreq(padapter); ++ set_link_timer(pmlmeext, REASSOC_TO); ++ } ++#if 0 ++ else if (is_client_associated_to_ap(padapter)) ++ { ++ //linked infrastructure client mode ++ if ((psta = rtw_get_stainfo(pstapriv, pmlmeinfo->network.MacAddress)) != NULL) ++ { ++ /*to monitor whether the AP is alive or not*/ ++ if (rx_pkt == psta->sta_stats.rx_pkts) ++ { ++ receive_disconnect(padapter, pmlmeinfo->network.MacAddress); ++ return; ++ } ++ else ++ { ++ rx_pkt = psta->sta_stats.rx_pkts; ++ set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++ ++ //update the EDCA paramter according to the Tx/RX mode ++ update_EDCA_param(padapter); ++ ++ /*to send the AP a nulldata if no frame is xmitted in order to keep alive*/ ++ if (pmlmeinfo->link_count++ == 0) ++ { ++ tx_cnt = pxmitpriv->tx_pkts; ++ } ++ else if ((pmlmeinfo->link_count & 0xf) == 0) ++ { ++ if (tx_cnt == pxmitpriv->tx_pkts) ++ { ++ issue_nulldata(padapter, 0); ++ } ++ ++ tx_cnt = pxmitpriv->tx_pkts; ++ } ++ } //end of if ((psta = rtw_get_stainfo(pstapriv, passoc_res->network.MacAddress)) != NULL) ++ } ++ else if (is_client_associated_to_ibss(padapter)) ++ { ++ //linked IBSS mode ++ //for each assoc list entry to check the rx pkt counter ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ psta = pmlmeinfo->FW_sta_info[i].psta; ++ ++ if (pmlmeinfo->FW_sta_info[i].rx_pkt == psta->sta_stats.rx_pkts) ++ { ++ pmlmeinfo->FW_sta_info[i].status = 0; ++ report_del_sta_event(padapter, psta->hwaddr); ++ } ++ else ++ { ++ pmlmeinfo->FW_sta_info[i].rx_pkt = psta->sta_stats.rx_pkts; ++ } ++ } ++ } ++ ++ set_link_timer(pmlmeext, DISCONNECT_TO); ++ } ++#endif ++ ++ return; ++} ++ ++void addba_timer_hdl(struct sta_info *psta) ++{ ++ u8 bitmap; ++ u16 tid; ++ struct ht_priv *phtpriv; ++ ++ if(!psta) ++ return; ++ ++ phtpriv = &psta->htpriv; ++ ++ if((phtpriv->ht_option==_TRUE) && (phtpriv->ampdu_enable==_TRUE)) ++ { ++ if(phtpriv->candidate_tid_bitmap) ++ phtpriv->candidate_tid_bitmap=0x0; ++ ++ } ++ ++} ++ ++u8 NULL_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ return H2C_SUCCESS; ++} ++ ++u8 setopmode_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ u8 type; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct setopmode_parm *psetop = (struct setopmode_parm *)pbuf; ++ ++ if(psetop->mode == Ndis802_11APMode) ++ { ++ pmlmeinfo->state = WIFI_FW_AP_STATE; ++ type = _HW_STATE_AP_; ++#ifdef CONFIG_NATIVEAP_MLME ++ //start_ap_mode(padapter); ++#endif ++ } ++ else if(psetop->mode == Ndis802_11Infrastructure) ++ { ++ type = _HW_STATE_STATION_; ++ } ++ else if(psetop->mode == Ndis802_11IBSS) ++ { ++ type = _HW_STATE_ADHOC_; ++ } ++ else ++ { ++ type = _HW_STATE_NOLINK_; ++ } ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SET_OPMODE, (u8 *)(&type)); ++ //Set_NETYPE0_MSR(padapter, type); ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 createbss_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; ++ u32 initialgain; ++ ++ ++ if(pparm->network.InfrastructureMode == Ndis802_11APMode) ++ { ++#ifdef CONFIG_AP_MODE ++ ++ if(pmlmeinfo->state == WIFI_FW_AP_STATE) ++ { ++ //todo: ++ return H2C_SUCCESS; ++ } ++#endif ++ } ++ ++ //below is for ad-hoc master ++ if(pparm->network.InfrastructureMode == Ndis802_11IBSS) ++ { ++ rtw_joinbss_reset(padapter); ++ ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmlmeinfo->ERP_enable = 0; ++ pmlmeinfo->WMM_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->agg_enable_bitmap = 0; ++ pmlmeinfo->candidate_tid_bitmap = 0; ++ ++ //disable dynamic functions, such as high power, DIG ++ Save_DM_Func_Flag(padapter); ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under linking, need to write the BB registers ++ initialgain = 0x1E; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ //cancel link timer ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //clear CAM ++ flush_all_cam_entry(padapter); ++ ++ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; ++ ++ if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength ++ return H2C_PARAMETERS_ERROR; ++ ++ _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); ++ ++ start_create_ibss(padapter); ++ ++ } ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ u8 join_type; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ struct joinbss_parm *pparm = (struct joinbss_parm *)pbuf; ++ u32 acparm, initialgain, i; ++ ++ //check already connecting to AP or not ++ if (pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) ++ { ++ if (pmlmeinfo->state & WIFI_FW_STATION_STATE) ++ { ++ issue_deauth(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ //clear CAM ++ flush_all_cam_entry(padapter); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ //set MSR to nolink ++ Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ } ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ rtw_antenna_select_cmd(padapter, pparm->network.PhyInfo.Optimum_antenna, _FALSE); ++#endif ++ ++ rtw_joinbss_reset(padapter); ++ ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset= HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmlmeinfo->ERP_enable = 0; ++ pmlmeinfo->WMM_enable = 0; ++ pmlmeinfo->HT_enable = 0; ++ pmlmeinfo->HT_caps_enable = 0; ++ pmlmeinfo->HT_info_enable = 0; ++ pmlmeinfo->agg_enable_bitmap = 0; ++ pmlmeinfo->candidate_tid_bitmap = 0; ++ pmlmeinfo->bwmode_updated = _FALSE; ++ //pmlmeinfo->assoc_AP_vendor = maxAP; ++ ++ _rtw_memcpy(pnetwork, pbuf, FIELD_OFFSET(WLAN_BSSID_EX, IELength)); ++ pnetwork->IELength = ((WLAN_BSSID_EX *)pbuf)->IELength; ++ ++ if(pnetwork->IELength>MAX_IE_SZ)//Check pbuf->IELength ++ return H2C_PARAMETERS_ERROR; ++ ++ _rtw_memcpy(pnetwork->IEs, ((WLAN_BSSID_EX *)pbuf)->IEs, pnetwork->IELength); ++ ++ //Check AP vendor to move rtw_joinbss_cmd() ++ //pmlmeinfo->assoc_AP_vendor = check_assoc_AP(pnetwork->IEs, pnetwork->IELength); ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_://Get WMM IE. ++ if ( _rtw_memcmp(pIE->data, WMM_OUI, 4) ) ++ { ++ pmlmeinfo->WMM_enable = 1; ++ } ++ break; ++ ++ case _HT_CAPABILITY_IE_: //Get HT Cap IE. ++ pmlmeinfo->HT_caps_enable = 1; ++ break; ++ ++ case _HT_EXTRA_INFO_IE_: //Get HT Info IE. ++ pmlmeinfo->HT_info_enable = 1; ++ ++ //spec case only for cisco's ap because cisco's ap issue assoc rsp using mcs rate @40MHz or @20MHz ++ //if(pmlmeinfo->assoc_AP_vendor == ciscoAP) ++ { ++ struct HT_info_element *pht_info = (struct HT_info_element *)(pIE->data); ++ ++ if ((pregpriv->cbw40_enable) && (pht_info->infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode according to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pht_info->infos[0] & 0x3) ++ { ++ case 1: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ DBG_871X("set ch/bw before connected\n"); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++#if 0 ++ if (padapter->registrypriv.wifi_spec) { ++ // for WiFi test, follow WMM test plan spec ++ acparm = 0x002F431C; // VO ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E541C; // VI ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ acparm = 0x0000A525; // BE ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A549; // BK ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ // for WiFi test, mixed mode with intel STA under bg mode throughput issue ++ if (padapter->mlmepriv.htpriv.ht_option == _FALSE){ ++ acparm = 0x00004320; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ } ++ } ++ else { ++ acparm = 0x002F3217; // VO ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ acparm = 0x00105320; // BE ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ } ++#endif ++ //disable dynamic functions, such as high power, DIG ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under linking, need to write the BB registers ++ #ifndef CONFIG_BEFORE_LINKED_DIG ++ initialgain = 0x1E; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ #endif ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ join_type = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ //cancel link timer ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ start_clnt_join(padapter); ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 disconnect_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct disconnect_parm *pparm = (struct disconnect_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ u8 val8; ++ ++ if (is_client_associated_to_ap(padapter)) ++ { ++ issue_deauth(padapter, pnetwork->MacAddress, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ ++ //set_opmode_cmd(padapter, infra_client_with_mlme); ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ //switch to the 20M Hz mode after disconnect ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_20; ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ //set MSR to no link state ++ Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_DISCONNECT, 0); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, null_addr); ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //Stop BCN ++ val8 = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BCN_FUNC, (u8 *)(&val8)); ++ } ++ ++ pmlmeinfo->state = WIFI_FW_NULL_STATE; ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ flush_all_cam_entry(padapter); ++ ++ _cancel_timer_ex(&pmlmeext->link_timer); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct sitesurvey_parm *pparm = (struct sitesurvey_parm *)pbuf; ++ u8 val8; ++ u32 initialgain; ++ u32 i; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif ++ ++ if (pmlmeext->sitesurvey_res.state == SCAN_DISABLE) ++ { ++ //for first time sitesurvey_cmd ++ pmlmeext->sitesurvey_res.state = SCAN_START; ++ pmlmeext->sitesurvey_res.bss_cnt = 0; ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ ++ for(i=0;issid[i].SsidLength) { ++ _rtw_memcpy(pmlmeext->sitesurvey_res.ssid[i].Ssid, pparm->ssid[i].Ssid, IW_ESSID_MAX_SIZE); ++ pmlmeext->sitesurvey_res.ssid[i].SsidLength= pparm->ssid[i].SsidLength; ++ } else { ++ pmlmeext->sitesurvey_res.ssid[i].SsidLength= 0; ++ } ++ } ++ ++ pmlmeext->sitesurvey_res.scan_mode = pparm->scan_mode; ++ ++ //issue null data if associating to the AP ++ if (is_client_associated_to_ap(padapter) == _TRUE) ++ { ++ pmlmeext->sitesurvey_res.state = SCAN_TXNULL; ++ ++ issue_nulldata(padapter, 1); ++ issue_nulldata(padapter, 1); ++ ++ //delay 50ms to protect nulldata(1). ++ set_survey_timer(pmlmeext, 50); ++ ++ return H2C_SUCCESS; ++ } ++ } ++ ++ if ((pmlmeext->sitesurvey_res.state == SCAN_START) || (pmlmeext->sitesurvey_res.state == SCAN_TXNULL)) ++ { ++#ifdef CONFIG_FIND_BEST_CHANNEL ++#if 0 ++ for (i=0; pmlmeext->channel_set[i].ChannelNum !=0; i++) { ++ pmlmeext->channel_set[i].rx_count = 0; ++ } ++#endif ++#endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++ //disable dynamic functions, such as high power, DIG ++ Save_DM_Func_Flag(padapter); ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //config the initial gain under scaning, need to write the BB registers ++#ifdef CONFIG_IOCTL_CFG80211 ++ if((wdev_to_priv(padapter->rtw_wdev))->p2p_enabled == _TRUE) ++ initialgain = 0x27; ++ else ++#endif ++ initialgain = 0x17; ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ initialgain = 0x27; ++#endif //CONFIG_P2P ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ //set MSR to no link state ++ Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); ++ ++ val8 = 1; //before site survey ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ ++ // Commented by Albert 2011/08/05 ++ // The pre_tx_scan_timer_process will issue the scan H2C command. ++ // However, the driver should NOT enter the scanning mode at that time. ++ pmlmeext->sitesurvey_res.state = SCAN_PROCESS; ++ } ++ ++ site_survey(padapter); ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 setauth_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct setauth_parm *pparm = (struct setauth_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pparm->mode < 4) ++ { ++ pmlmeinfo->auth_algo = pparm->mode; ++ } ++ ++ return H2C_SUCCESS; ++} ++ ++u8 setkey_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ unsigned short ctrl; ++ struct setkey_parm *pparm = (struct setkey_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ ++ //main tx key for wep. ++ if(pparm->set_tx) ++ pmlmeinfo->key_index = pparm->keyid; ++ ++ //write cam ++ ctrl = BIT(15) | ((pparm->algorithm) << 2) | pparm->keyid; ++ ++ write_cam(padapter, pparm->keyid, ctrl, null_sta, pparm->key); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf) ++{ ++ unsigned short ctrl=0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct set_stakey_parm *pparm = (struct set_stakey_parm *)pbuf; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++#endif ++ ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ unsigned char cam_id;//cam_entry ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta = rtw_get_stainfo(pstapriv, pparm->addr); ++ if(psta) ++ { ++ ctrl = (BIT(15) | ((pparm->algorithm) << 2)); ++ ++ DBG_8192C("r871x_set_stakey_hdl(): enc_algorithm=%d\n", pparm->algorithm); ++ ++ if((psta->mac_id<1) || (psta->mac_id>(NUM_STA-4))) ++ { ++ DBG_8192C("r871x_set_stakey_hdl():set_stakey failed, mac_id(aid)=%d\n", psta->mac_id); ++ return H2C_REJECTED; ++ } ++ ++ cam_id = (psta->mac_id + 3);//0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++ DBG_8192C("Write CAM, mac_addr=%x:%x:%x:%x:%x:%x, cam_entry=%d\n", pparm->addr[0], ++ pparm->addr[1], pparm->addr[2], pparm->addr[3], pparm->addr[4], ++ pparm->addr[5], cam_id); ++ ++ write_cam(padapter, cam_id, ctrl, pparm->addr, pparm->key); ++ ++ return H2C_SUCCESS_RSP; ++ ++ } ++ else ++ { ++ DBG_8192C("r871x_set_stakey_hdl(): sta has been free\n"); ++ return H2C_REJECTED; ++ } ++ ++ } ++ ++ //below for sta mode ++ ++ ctrl = BIT(15) | ((pparm->algorithm) << 2); ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->cam_entry_to_clear!=0){ ++ clear_cam_entry(padapter, ptdlsinfo->cam_entry_to_clear); ++ ptdlsinfo->cam_entry_to_clear=0; ++ ++ return H2C_SUCCESS; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, pparm->addr);//Get TDLS Peer STA ++ if( psta->tdls_sta_state&TDLS_LINKED_STATE ){ ++ write_cam(padapter, psta->cam_entry, ctrl, pparm->addr, pparm->key); ++ } ++ else ++#endif ++ write_cam(padapter, 5, ctrl, pparm->addr, pparm->key); ++ ++ pmlmeinfo->enc_algo = pparm->algorithm; ++ ++ return H2C_SUCCESS; ++} ++ ++u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct addBaReq_parm *pparm = (struct addBaReq_parm *)pbuf; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct sta_info *psta = rtw_get_stainfo(&padapter->stapriv, pparm->addr); ++ ++ if(!psta) ++ return H2C_SUCCESS; ++ ++ ++ if (((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && (pmlmeinfo->HT_enable)) || ++ ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pmlmeinfo->ADDBA_retry_count = 0; ++ //pmlmeinfo->candidate_tid_bitmap |= (0x1 << pparm->tid); ++ //psta->htpriv.candidate_tid_bitmap |= BIT(pparm->tid); ++ issue_action_BA(padapter, pparm->addr, RTW_WLAN_ACTION_ADDBA_REQ, (u16)pparm->tid); ++ //_set_timer(&pmlmeext->ADDBA_timer, ADDBA_TO); ++ _set_timer(&psta->addba_retry_timer, ADDBA_TO); ++ } ++ else ++ { ++ psta->htpriv.candidate_tid_bitmap &= ~BIT(pparm->tid); ++ } ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_tx_beacon_cmd(_adapter* padapter) ++{ ++ struct cmd_obj *ph2c; ++ struct Tx_Beacon_param *ptxBeacon_parm; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 res = _SUCCESS; ++ int len_diff = 0; ++ ++_func_enter_; ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ res= _FAIL; ++ goto exit; ++ } ++ ++ if ((ptxBeacon_parm = (struct Tx_Beacon_param *)rtw_zmalloc(sizeof(struct Tx_Beacon_param))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&(ptxBeacon_parm->network), &(pmlmeinfo->network), sizeof(WLAN_BSSID_EX)); ++ ++ len_diff = update_hidden_ssid( ++ ptxBeacon_parm->network.IEs+_BEACON_IE_OFFSET_ ++ , ptxBeacon_parm->network.IELength-_BEACON_IE_OFFSET_ ++ , pmlmeinfo->hidden_ssid_mode ++ ); ++ ptxBeacon_parm->network.IELength += len_diff; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, ptxBeacon_parm, GEN_CMD_CODE(_TX_Beacon)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++ ++u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ u8 evt_code, evt_seq; ++ u16 evt_sz; ++ uint *peventbuf; ++ void (*event_callback)(_adapter *dev, u8 *pbuf); ++ struct evt_priv *pevt_priv = &(padapter->evtpriv); ++ ++ peventbuf = (uint*)pbuf; ++ evt_sz = (u16)(*peventbuf&0xffff); ++ evt_seq = (u8)((*peventbuf>>24)&0x7f); ++ evt_code = (u8)((*peventbuf>>16)&0xff); ++ ++ ++ #ifdef CHECK_EVENT_SEQ ++ // checking event sequence... ++ if (evt_seq != (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f) ) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("Evetn Seq Error! %d vs %d\n", (evt_seq & 0x7f), (ATOMIC_READ(&pevt_priv->event_seq) & 0x7f))); ++ ++ pevt_priv->event_seq = (evt_seq+1)&0x7f; ++ ++ goto _abort_event_; ++ } ++ #endif ++ ++ // checking if event code is valid ++ if (evt_code >= MAX_C2HEVT) ++ { ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent Code(%d) mismatch!\n", evt_code)); ++ goto _abort_event_; ++ } ++ ++ // checking if event size match the event parm size ++ if ((wlanevents[evt_code].parmsize != 0) && ++ (wlanevents[evt_code].parmsize != evt_sz)) ++ { ++ ++ RT_TRACE(_module_rtl871x_cmd_c_,_drv_err_,("\nEvent(%d) Parm Size mismatch (%d vs %d)!\n", ++ evt_code, wlanevents[evt_code].parmsize, evt_sz)); ++ goto _abort_event_; ++ ++ } ++ ++ ATOMIC_INC(&pevt_priv->event_seq); ++ ++ peventbuf += 2; ++ ++ if(peventbuf) ++ { ++ event_callback = wlanevents[evt_code].event_callback; ++ event_callback(padapter, (u8*)peventbuf); ++ ++ pevt_priv->evt_done_cnt++; ++ } ++ ++ ++_abort_event_: ++ ++ ++ return H2C_SUCCESS; ++ ++} ++ ++u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ return H2C_SUCCESS; ++} ++ ++ ++u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ return H2C_PARAMETERS_ERROR; ++ } ++#ifdef CONFIG_AP_MODE ++ else //tx bc/mc frames after update TIM ++ { ++ _irqL irqL; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return H2C_SUCCESS; ++ ++ if((pstapriv->tim_bitmap&BIT(0)) && (psta_bmc->sleepq_len>0)) ++ { ++#ifndef CONFIG_PCI_HCI ++ rtw_msleep_os(10);// 10ms, ATIM(HIQ) Windows ++#endif ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ if(psta_bmc->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered=1; ++ ++ pxmitframe->attrib.qsel = 0x11;//HIQ ++ ++ if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ ++ //pstapriv->tim_bitmap &= ~BIT(0); ++ ++ } ++ ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++#endif ++ ++ return H2C_SUCCESS; ++ ++} ++ ++#ifdef CONFIG_AP_MODE ++ ++void init_mlme_ap_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); ++ ++ //pmlmeext->bstart_bss = _FALSE; ++ ++ start_ap_mode(padapter); ++} ++ ++void free_mlme_ap_info(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //stop_ap_mode(padapter); ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ ++ rtw_sta_flush(padapter); ++ ++ pmlmeinfo->state = _HW_STATE_NOLINK_; ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ //free bc/mc sta_info ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++} ++ ++static void update_BCNTIM(_adapter *padapter) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ unsigned char *src_ie = pnetwork->IEs; ++ unsigned int src_ielen = pnetwork->IELength; ++ unsigned char *dst_ie = pnetwork_mlmeext->IEs; ++ ++ ++ //update TIM IE ++ //if(pstapriv->tim_bitmap) ++ if(_TRUE) ++ { ++ u8 *p, ie_len; ++ u16 tim_bitmap_le; ++ u32 tmp_len, head_len=0; ++ ++ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); ++ ++ //calucate head_len ++ head_len = _FIXED_IE_LENGTH_; ++ head_len += pnetwork->Ssid.SsidLength + 2; ++ ++ // get supported rates len ++ p = rtw_get_ie(src_ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ head_len += tmp_len+2; ++ } ++ ++ //DS Parameter Set IE, len=3 ++ head_len += 3; ++ ++ //copy head offset ++ _rtw_memcpy(dst_ie, src_ie, head_len); ++ ++ ++ //append TIM IE from head_len offset ++ dst_ie+=head_len; ++ ++ *dst_ie++=_TIM_IE_; ++ ++ if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fc)) ++ ie_len = 5; ++ else ++ ie_len = 4; ++ ++ *dst_ie++= ie_len; ++ ++ *dst_ie++=0;//DTIM count ++ *dst_ie++=1;//DTIM peroid ++ ++ if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames ++ *dst_ie++ = BIT(0);//bitmap ctrl ++ else ++ *dst_ie++ = 0; ++ ++ if(ie_len==4) ++ { ++ *dst_ie++ = *(u8*)&tim_bitmap_le; ++ } ++ else if(ie_len==5) ++ { ++ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); ++ dst_ie+=2; ++ } ++ ++ //copy remainder IE ++ _rtw_memcpy(dst_ie, src_ie+head_len, src_ielen-head_len); ++ ++ //pnetwork_mlmeext->Length += ie_len+2; ++ //pnetwork_mlmeext->IELength += ie_len+2; ++ pnetwork_mlmeext->Length = pnetwork->Length+ie_len+2; ++ pnetwork_mlmeext->IELength = src_ielen+ie_len+2; ++ ++ } ++ else ++ { ++ _rtw_memcpy(dst_ie, src_ie, src_ielen); ++ pnetwork_mlmeext->Length = pnetwork->Length; ++ pnetwork_mlmeext->IELength = src_ielen; ++ } ++ ++#ifdef CONFIG_USB_HCI ++ set_tx_beacon_cmd(padapter); ++#endif ++ ++ ++/* ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ } ++*/ ++ ++} ++ ++u8 chk_sta_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rx:"STA_PKTS_FMT", expire_to:%u, %s\n" ++ , MAC_ARG(psta->hwaddr), STA_RX_PKTS_ARG(psta) ++ , psta->expire_to ++ , psta->state&WIFI_SLEEP_STATE?"SLEEP":"" ++ ); ++ #endif ++ ++ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ if(psta->sta_stats.last_rx_data_pkts == psta->sta_stats.rx_data_pkts) ++ { ++ #if 0 ++ if(psta->state&WIFI_SLEEP_STATE) ++ ret = _TRUE; ++ #endif ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void expire_timeout_chk(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ phead = &pstapriv->auth_list; ++ plist = get_next(phead); ++ ++ //check auth_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); ++ ++ plist = get_next(plist); ++ ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ if (psta->expire_to == 0) ++ { ++ rtw_list_delete(&psta->auth_list); ++ ++ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if(chk_sta_is_alive(psta)) ++ { ++ psta->expire_to = pstapriv->expire_to; ++#ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ } ++ ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { ++ // check sta by delba(addba) for 11n STA ++ // ToDo: use CCX report to check for all STAs ++ DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); ++ ++ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { ++ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 0; ++ psta->expire_to = 0; ++ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { ++ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 1; ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ } ++ } ++#endif // CONFIG_TX_MCAST2UNI ++ ++ if (psta->expire_to == 0) ++ { ++ //_irqL irqL; ++ ++ rtw_list_delete(&psta->asoc_list); ++ ++ DBG_871X("asoc expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++#if 0 ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++#endif ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ap_free_sta(padapter, psta); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ else ++ { ++ if(psta->sleepq_len > (NR_XMITFRAME>>3)) ++ { ++ wakeup_sta_to_xmit(padapter, psta); ++ } ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++} ++ ++ ++static void add_RATid(_adapter *padapter, struct sta_info *psta) ++{ ++ int i; ++ u8 rf_type; ++ u32 init_rate=0; ++ unsigned char sta_band = 0, raid, shortGIrate = _FALSE; ++ unsigned char limit; ++ unsigned int tx_ra_bitmap=0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ ++ if(psta) ++ psta_ht = &psta->htpriv; ++ else ++ return; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset); i++) ++ { ++ if (psta->bssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ //n mode ra_bitmap ++ if(psta_ht->ht_option) ++ { ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_2T2R) ++ limit=16;// 2R ++ else ++ limit=8;// 1R ++ ++ for (i=0; iht_cap.supp_mcs_set[i/8] & BIT(i%8)) ++ tx_ra_bitmap |= BIT(i+12); ++ } ++ ++ //max short GI rate ++ shortGIrate = psta_ht->sgi; ++ } ++ ++ ++#if 0//gtest ++ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) ++ { ++ //is this a 2r STA? ++ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) ++ { ++ priv->pshare->has_2r_sta |= BIT(pstat->aid); ++ if(rtw_read16(padapter, 0x102501f6) != 0xffff) ++ { ++ rtw_write16(padapter, 0x102501f6, 0xffff); ++ reset_1r_sta_RA(priv, 0xffff); ++ Switch_1SS_Antenna(priv, 3); ++ } ++ } ++ else// bg or 1R STA? ++ { ++ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) ++ { ++ if(rtw_read16(padapter, 0x102501f6) != 0x7777) ++ { // MCS7 SGI ++ rtw_write16(padapter, 0x102501f6,0x7777); ++ reset_1r_sta_RA(priv, 0x7777); ++ Switch_1SS_Antenna(priv, 2); ++ } ++ } ++ } ++ ++ } ++ ++ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) ++ { ++ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) ++ pstat->rssi_level = 1; ++ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ++ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && ++ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && ++ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) ++ pstat->rssi_level = 2; ++ else ++ pstat->rssi_level = 3; ++ } ++ ++ // rate adaptive by rssi ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) ++ { ++ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x100f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x100ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x100ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x100ff001; ++ ++ break; ++ } ++ } ++ else ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x1f0f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x1f0ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x000ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x000ff001; ++ ++ break; ++ } ++ ++ // Don't need to mask high rates due to new rate adaptive parameters ++ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta ++ // pstat->tx_ra_bitmap &= 0x81ffffff; ++ ++ // NIC driver will report not supporting MCS15 and MCS14 in asoc req ++ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) ++ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 ++ } ++ } ++ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x00000f00; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x00000ff0; ++ break; ++ case 3: ++ pstat->tx_ra_bitmap &= 0x00000ff5; ++ break; ++ } ++ } ++ else ++ { ++ pstat->tx_ra_bitmap &= 0x0000000d; ++ } ++ ++ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) ++ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) ++ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate ++ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || ++ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) ++ { ++ pstat->tx_ra_bitmap &= ~BIT(28); ++ } ++#endif ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ // 5G band ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ raid = networktype_to_raid(sta_band); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ if (psta->aid < NUM_STA) ++ { ++ u8 arg = 0; ++#ifdef SUPPORT_64_STA ++ if(psta->mac_id >= FW_CTRL_MACID){ ++ arg = psta->mac_id&0x3f; ++ if (shortGIrate==_TRUE) ++ arg |= BIT(7); ++ switch(raid){ ++ case 0: ++ case 1: ++ case 3: ++ psta->init_rate=19; // N mode ++ break; ++ case 4: ++ case 5: ++ psta->init_rate=11; // G mode ++ break; ++ case 6: ++ psta->init_rate=3; // B mode ++ break; ++ deafult: ++ psta->init_rate=3; // B mode ++ break; ++ ++ } ++ // printk("%s psta->mac_id=%d arg=0x%x\n",__FUNCTION__,psta->mac_id,arg); ++ } ++ else ++#endif // SUPPORT_64_STA ++ { ++ arg = psta->mac_id&0x1f; ++ arg |= BIT(7); ++ if (shortGIrate==_TRUE) ++ arg |= BIT(5); ++ //printk("%s psta->mac_id=%d arg=0x%x\n",__FUNCTION__,psta->mac_id,arg); ++ } ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("update raid entry, bitmap=0x%x, arg=0x%x\n", tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ padapter->HalFunc.Add_RateATid(padapter, tx_ra_bitmap, arg,psta->mac_id); ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ } ++ else ++ { ++ DBG_871X("station aid %d exceed the max number\n", psta->aid); ++ } ++ ++} ++ ++static void update_bmc_sta(_adapter *padapter) ++{ ++ _irqL irqL; ++ u32 init_rate=0; ++ unsigned char network_type, raid; ++ unsigned short para16; ++ int i, supportRateNum = 0; ++ unsigned int tx_ra_bitmap=0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); ++ ++ if(psta) ++ { ++ psta->aid = 0;//default set to 0 ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid + 1; ++ ++ psta->qos_option = 0; ++ psta->htpriv.ht_option = _FALSE; ++ ++ psta->ieee8021x_blocked = 0; ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. ++ ++ ++ ++ //prepare for add_RATid ++ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); ++ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, 1); ++ ++ _rtw_memcpy(psta->bssrateset, &pcur_network->SupportedRates, supportRateNum); ++ psta->bssratelen = supportRateNum; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ //force to A mode. 5G doesn't support CCK rates ++ network_type = WIRELESS_11A; ++ tx_ra_bitmap = 0x150; // 6, 12, 24 Mbps ++ } else { ++ //force to b mode ++ network_type = WIRELESS_11B; ++ tx_ra_bitmap = 0xf; ++ } ++ ++ //tx_ra_bitmap = update_basic_rate(pcur_network->SupportedRates, supportRateNum); ++ ++ raid = networktype_to_raid(network_type); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ //DBG_871X("Add id %d val %08x to ratr for bmc sta\n", psta->aid, tx_ra_bitmap); ++ ++ //if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg = 0; ++ ++ arg = psta->mac_id&0x1f; ++ ++ arg |= BIT(7); ++ ++ //if (shortGIrate==_TRUE) ++ // arg |= BIT(5); ++ ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("update_bmc_sta, mask=0x%x, arg=0x%x\n", tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ padapter->HalFunc.Add_RateATid(padapter, tx_ra_bitmap, arg,psta->mac_id ); ++ ++ } ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state = _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_871X("add_RATid_bmc_sta error!\n"); ++ } ++ ++} ++ ++//notes: ++//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode ++//MAC_ID = AID+1 for sta in ap/adhoc mode ++//MAC_ID = 1 for bc/mc for sta/ap/adhoc ++//MAC_ID = 0 for bssid for sta/ap/adhoc ++//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++ ++ //set intf_tag to if1 ++ //psta->intf_tag = 0; ++ ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid+1; ++ ++ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->ieee8021x_blocked = _TRUE; ++ else ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ //update sta's cap ++ ++ //ERP ++ VCS_update(padapter, psta); ++ ++ //HT related cap ++ if(phtpriv_sta->ht_option) ++ { ++ //check if sta supports rx ampdu ++ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ //check if sta support s Short GI ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ++ { ++ phtpriv_sta->sgi = _TRUE; ++ } ++ ++ // bwmode ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ //phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_40; ++ phtpriv_sta->bwmode = pmlmeext->cur_bwmode; ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ ++ } ++ ++ psta->qos_option = _TRUE; ++ ++ } ++ else ++ { ++ phtpriv_sta->ampdu_enable = _FALSE; ++ ++ phtpriv_sta->sgi = _FALSE; ++ phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ //Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ phtpriv_sta->agg_enable_bitmap = 0x0;//reset ++ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //todo: init other variables ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ ++ //add ratid ++ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ ++} ++ ++static void update_hw_ht_param(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_8192C("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++} ++ ++static void start_bss_network(_adapter *padapter, u8 *pbuf) ++{ ++ u8 *p; ++ u8 val8, cur_channel, cur_bwmode, cur_ch_offset; ++ u16 bcn_interval; ++ u32 acparm; ++ int ie_len; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; ++ cur_channel = pnetwork->Configuration.DSConfig; ++ cur_bwmode = HT_CHANNEL_WIDTH_20;; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ ++ //check if there is wps ie, ++ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, ++ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. ++ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) ++ { ++ pmlmeext->bstart_bss = _TRUE; ++ } ++ ++ //udpate capability ++ update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork)); ++ ++ //todo: update wmm, ht cap ++ //pmlmeinfo->WMM_enable; ++ //pmlmeinfo->HT_enable; ++ if(pmlmepriv->qospriv.qos_option) ++ pmlmeinfo->WMM_enable = _TRUE; ++ ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ pmlmeinfo->WMM_enable = _TRUE; ++ pmlmeinfo->HT_enable = _TRUE; ++ //pmlmeinfo->HT_info_enable = _TRUE; ++ //pmlmeinfo->HT_caps_enable = _TRUE; ++ ++ update_hw_ht_param(padapter); ++ } ++ ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ flush_all_cam_entry(padapter); //clear CAM ++ } ++ ++ //set MSR to AP_Mode ++ Set_NETYPE0_MSR(padapter, _HW_STATE_AP_); ++ ++ //Set BSSID REG ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pnetwork->MacAddress); ++ ++ //Set EDCA param reg ++ acparm = 0x002F3217; // VO ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ //acparm = 0x00105320; // BE ++ acparm = 0x005ea42b; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ //Set Security ++ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //Beacon Control related register ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); ++ ++ ++ UpdateBrateTbl(padapter, pnetwork->SupportedRates); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ u32 initialgain; ++ ++ //disable dynamic functions, such as high power, DIG ++ //Save_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ //turn on dynamic functions ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ initialgain = 0x30; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ ++ } ++ ++ //set channel, bwmode ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ struct HT_info_element *pht_info = (struct HT_info_element *)(p+2); ++ ++ if ((pregpriv->cbw40_enable) && (pht_info->infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode ++ //pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pht_info->infos[0] & 0x3) ++ { ++ case 1: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ } ++ ++ } ++ ++ //TODO: need to judge the phy parameters on concurrent mode for single phy ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ ++ DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ // ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++ pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type; ++ ++ //update cur_wireless_mode ++ update_wireless_mode(padapter); ++ ++ //let pnetwork_mlmeext == pnetwork_mlme. ++ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); ++ ++#ifdef CONFIG_P2P ++ _rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength); ++ pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength; ++#endif //CONFIG_P2P ++ ++ ++ if(_TRUE == pmlmeext->bstart_bss) ++ { ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ ++ //issue beacon frame ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ } ++ } ++ ++ ++ //update bc/mc sta_info ++ update_bmc_sta(padapter); ++ ++ //pmlmeext->bstart_bss = _TRUE; ++ ++} ++ ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) ++{ ++ int ret=_SUCCESS; ++ u8 *p; ++ u8 *pHT_caps_ie=NULL; ++ u8 *pHT_info_ie=NULL; ++ struct sta_info *psta = NULL; ++ u16 cap, ht_cap=_FALSE; ++ uint ie_len = 0; ++ int group_cipher, pairwise_cipher; ++ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; ++ int supportRateNum = 0; ++ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ie = pbss_network->IEs; ++ ++ ++ /* SSID */ ++ /* Supported rates */ ++ /* DS Params */ ++ /* WLAN_EID_COUNTRY */ ++ /* ERP Information element */ ++ /* Extended supported rates */ ++ /* WPA/WPA2 */ ++ /* Wi-Fi Wireless Multimedia Extensions */ ++ /* ht_capab, ht_oper */ ++ /* WPS IE */ ++ ++ DBG_8192C("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return _FAIL; ++ ++ ++ if(len>MAX_IE_SZ) ++ return _FAIL; ++ ++ pbss_network->IELength = len; ++ ++ _rtw_memset(ie, 0, MAX_IE_SZ); ++ ++ _rtw_memcpy(ie, pbuf, pbss_network->IELength); ++ ++ ++ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) ++ return _FAIL; ++ ++ pbss_network->Rssi = 0; ++ ++ _rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ //beacon interval ++ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability ++ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); ++ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); ++ ++ //capability ++ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(ie); ++ ++ //SSID ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); ++ pbss_network->Ssid.SsidLength = ie_len; ++ } ++ ++ //chnnel ++ channel = 0; ++ pbss_network->Configuration.Length = 0; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ channel = *(p + 2); ++ ++ pbss_network->Configuration.DSConfig = channel; ++ ++ ++ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); ++ // get supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ } ++ ++ //get ext_supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ ++ } ++ ++ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); ++ ++ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); ++ ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); ++ } ++#ifdef SUPPORT_64_STA ++ //capability ++ p=rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(p); ++ //printk("%s cap=0x%x\n",__FUNCTION__,cap); ++ cap &=~BIT(4); ++ //printk("%s cap=0x%x\n",__FUNCTION__,cap); ++ RTW_PUT_LE16(p,cap); ++ cap = RTW_GET_LE16(p); ++ //printk("%s [fin] cap=0x%x\n",__FUNCTION__,cap); ++ pbss_network->Privacy = 0; ++ psecuritypriv->wpa_psk = 0; ++ ++ { ++ u32 i,j; ++ printk(" %s :Dump IEs\n",__FUNCTION__); ++ for(i=0,j=1;iIELength;i++){ ++ printk("0x%.2x:",ie[i]); ++ if( ((j++)%16)==0 ) ++ printk("\n"); ++ } ++ printk("\n"); ++ } ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0){ ++ //remove wpa2 ie ++ u32 offset=0,remain=0; ++ offset=p-ie; ++ remain= pbss_network->IELength-offset-ie_len-2; ++ DBG_8192C("%s wpa2 ie_len=%d offset=%d remain=%d IELength=%d\n",__FUNCTION__,ie_len,offset,remain,pbss_network->IELength); ++ { ++ u32 i,j; ++ printk(" %s :Dump IEs\n",__FUNCTION__); ++ for(i=0,j=1;iIELength;i++){ ++ printk("0x%.2x:",ie[i]); ++ if((((j++)%16)==0) ) ++ printk("\n"); ++ } ++ DBG_8192C("\n"); ++ } ++ _rtw_memcpy(p,p+ie_len+2,remain); ++ pbss_network->IELength-=(ie_len+2); ++ DBG_8192C("%s wpa2 [fin]ie_len=%d remain=%d IELength=%d\n",__FUNCTION__,ie_len,remain,pbss_network->IELength); ++ { ++ u32 i,j; ++ printk(" %s :Dump IEs\n",__FUNCTION__); ++ for(i=0,j=1;iIELength;i++){ ++ printk("0x%.2x:",ie[i]); ++ if((j++%16)==0 ) ++ printk("\n"); ++ } ++ DBG_8192C("\n"); ++ } ++ } ++ ++ psecuritypriv->dot8021xalg = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ { ++ //remove wpa ie ++ u32 rem=pbss_network->IELength-_BEACON_IE_OFFSET_; ++ p = ie + _BEACON_IE_OFFSET_; ++ ++ DBG_8192C("%s [p]%p id[0x%x] ie[%p] len[%d][_BEACON_IE_OFFSET_]%d [remain]%d \n",__FUNCTION__,p,p[0],ie,p[1],_BEACON_IE_OFFSET_,rem); ++ DBG_8192C("%s id=0x%x len=%d rem=%d next p %p\n",__FUNCTION__,*p,p[1],rem,(p + (p[1]+2))); ++ for (p = ie + _BEACON_IE_OFFSET_;rem>0 ;) ++ { ++ DBG_8192C("%s id=0x%x len=%d rem=%d next p %p\n",__FUNCTION__,*p,p[1],rem,p + (p[1]+2)); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ //remove wpa ie ++ u32 remain=0; ++ u8 *ptr; ++ remain= rem-p[1]-2; ++ ptr=p+p[1]+2; ++ DBG_8192C("%s wpa ie_len=%d remain=%d IELength=%d p %p next p %p,%p id 0x%x\n",__FUNCTION__,p[1],remain,pbss_network->IELength,p,p+p[1]+2,ptr,p[p[1]+2]); ++ pbss_network->IELength-=(p[1]+2); ++ _rtw_memcpy(p,ptr,remain); ++ DBG_8192C("%s wpa [fin]ie_len=%d remain=%d IELength=%d\n",__FUNCTION__,p[1],remain,pbss_network->IELength); ++ { ++ u32 i,j; ++ DBG_8192C(" %s :Dump IEs\n",__FUNCTION__); ++ for(i=0,j=1;iIELength;i++){ ++ printk("0x%.2x:",ie[i]); ++ if((j++%16)==0) ++ DBG_8192C("\n"); ++ } ++ DBG_8192C("\n"); ++ } ++ DBG_8192C("%s wpa [fin] ie_len=%d remain=%d IELength=%d\n",__FUNCTION__,ie_len,remain,pbss_network->IELength); ++ rem=remain; ++ }else{ ++ rem -= (p[1]+2); ++ p+=(p[1]+2); ++ } ++ } ++ } ++#else //SUPPORT_64_STA ++ ++ //update privacy/security ++ if (cap & BIT(4)) ++ pbss_network->Privacy = 1; ++ else ++ pbss_network->Privacy = 0; ++ ++ psecuritypriv->wpa_psk = 0; ++ ++ //wpa2 ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ psecuritypriv->wpa_psk |= BIT(1); ++ ++ psecuritypriv->wpa2_group_cipher = group_cipher; ++ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ } ++ ++ //wpa ++ ie_len = 0; ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ ++ psecuritypriv->wpa_psk |= BIT(0); ++ ++ psecuritypriv->wpa_group_cipher = group_cipher; ++ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; ++ ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ break; ++ ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ ++ } ++ ++#endif //SUPPORT_64_STA ++ ++ //wmm ++ ie_len = 0; ++ pmlmepriv->qospriv.qos_option = 0; ++ if(pregistrypriv->wmm_enable) ++ { ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) ++ { ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ *(p+8) |= BIT(7);//QoS Info, support U-APSD ++ ++ break; ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ } ++ ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ u8 rf_type; ++ ++ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ pHT_caps_ie=p; ++ ++ ++ ht_cap = _TRUE; ++ network_type |= WIRELESS_11_24N; ++ ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || ++ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ } ++ else ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ } ++ ++ ++ if(rf_type == RF_1T1R) ++ { ++ pht_cap->supp_mcs_set[0] = 0xff; ++ pht_cap->supp_mcs_set[1] = 0x0; ++ } ++ ++ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); ++ ++ } ++ ++ //parsing HT_INFO_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ pHT_info_ie=p; ++ } ++ ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ pbss_network->NetworkTypeInUse = Ndis802_11DS; ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ case WIRELESS_11A: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; ++ break; ++ default : ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ } ++ ++ pmlmepriv->cur_network.network_type = network_type; ++ ++ ++ pmlmepriv->htpriv.ht_option = _FALSE; ++#ifdef CONFIG_80211N_HT ++ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) ++ { ++ //todo: ++ //ht_cap = _FALSE; ++ } ++ ++ //ht_cap ++ if(pregistrypriv->ht_enable && ht_cap==_TRUE) ++ { ++ pmlmepriv->htpriv.ht_option = _TRUE; ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ if(pregistrypriv->ampdu_enable==1) ++ { ++ pmlmepriv->htpriv.ampdu_enable = _TRUE; ++ } ++ ++ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); ++ ++ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); ++ } ++#endif ++ ++ ++ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); ++ ++ //issue beacon to start bss network ++ start_bss_network(padapter, (u8*)pbss_network); ++ ++ ++ //alloc sta_info for ap itself ++ psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if(!psta) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (psta == NULL) ++ { ++ return _FAIL; ++ } ++ } ++ ++ rtw_indicate_connect( padapter); ++ ++ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon ++ ++ //update bc/mc sta_info ++ //update_bmc_sta(padapter); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++static void update_bcn_fixed_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_erpinfo_ie(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(!pmlmeinfo->ERP_enable) ++ return; ++ ++ ++} ++ ++static void update_bcn_htcap_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_htinfo_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_rsn_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wpa_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wmm_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wps_ie(_adapter *padapter) ++{ ++ int match; ++ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; ++ uint wps_ielen=0, wps_offset, remainder_ielen; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *ie = pnetwork->IEs; ++ u32 ielen = pnetwork->IELength; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ if(pwps_ie==NULL || wps_ielen==0) ++ return; ++ ++ wps_offset = (uint)(pwps_ie-ie); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = ielen - wps_offset - wps_ielen; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ ++ pwps_ie_src = pmlmepriv->wps_beacon_ie; ++ if(pwps_ie_src == NULL) ++ return; ++ ++ ++ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); ++ pwps_ie += (wps_ielen+2); ++ ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ //update IELength ++ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; ++ } ++ ++ if(pbackup_remainder_ie) ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ ++} ++ ++static void update_bcn_p2p_ie(_adapter *padapter) ++{ ++ ++} ++ ++static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_rtw_memcmp(WPA_OUI, oui, 4)) ++ { ++ update_bcn_wpa_ie(padapter); ++ } ++ else if(_rtw_memcmp(WMM_OUI, oui, 4)) ++ { ++ update_bcn_wmm_ie(padapter); ++ } ++ else if(_rtw_memcmp(WPS_OUI, oui, 4)) ++ { ++ update_bcn_wps_ie(padapter); ++ } ++ else if(_rtw_memcmp(P2P_OUI, oui, 4)) ++ { ++ update_bcn_p2p_ie(padapter); ++ } ++ else ++ { ++ DBG_871X("unknown OUI type!\n"); ++ } ++ ++ ++} ++ ++void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_FALSE == pmlmeext->bstart_bss) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ switch(ie_id) ++ { ++ case 0xFF: ++ ++ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability ++ ++ break; ++ ++ case _TIM_IE_: ++ ++ update_BCNTIM(padapter); ++ ++ break; ++ ++ case _ERPINFO_IE_: ++ ++ update_bcn_erpinfo_ie(padapter); ++ ++ break; ++ ++ case _HT_CAPABILITY_IE_: ++ ++ update_bcn_htcap_ie(padapter); ++ ++ break; ++ ++ case _RSN_IE_2_: ++ ++ update_bcn_rsn_ie(padapter); ++ ++ break; ++ ++ case _HT_ADD_INFO_IE_: ++ ++ update_bcn_htinfo_ie(padapter); ++ ++ break; ++ ++ case _VENDOR_SPECIFIC_IE_: ++ ++ update_bcn_vendor_spec_ie(padapter, oui); ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++ pmlmepriv->update_bcn = _TRUE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++#ifdef CONFIG_USB_HCI ++ if(tx) ++ { ++ //send_beacon(padapter);//send_beacon must execute on TSR level ++ set_tx_beacon_cmd(padapter); ++ } ++#else ++ { ++ //PCI will issue beacon when BCN interrupt occurs. ++ } ++#endif ++ ++} ++ ++#ifdef CONFIG_80211N_HT ++ ++/* ++op_mode ++Set to 0 (HT pure) under the followign conditions ++ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or ++ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS ++Set to 1 (HT non-member protection) if there may be non-HT STAs ++ in both the primary and the secondary channel ++Set to 2 if only HT STAs are associated in BSS, ++ however and at least one 20 MHz HT STA is associated ++Set to 3 (HT mixed mode) when one or more non-HT STAs are associated ++ (currently non-GF HT station is considered as non-HT STA also) ++*/ ++static int rtw_ht_operation_update(_adapter *padapter) ++{ ++ u16 cur_op_mode, new_op_mode; ++ int op_mode_changes = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ ++ if(pmlmepriv->htpriv.ht_option == _TRUE) ++ return 0; ++ ++ //if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) ++ // return 0; ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) ++ && pmlmepriv->num_sta_ht_no_gf) { ++ pmlmepriv->ht_op_mode |= ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && ++ pmlmepriv->num_sta_ht_no_gf == 0) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } ++ ++ /* Note: currently we switch to the MIXED op mode if HT non-greenfield ++ * station is associated. Probably it's a theoretical case, since ++ * it looks like all known HT STAs support greenfield. ++ */ ++ new_op_mode = 0; ++ if (pmlmepriv->num_sta_no_ht || ++ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)) ++ new_op_mode = OP_MODE_MIXED; ++ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ++ && pmlmepriv->num_sta_ht_20mhz) ++ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; ++ else if (pmlmepriv->olbc_ht) ++ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; ++ else ++ new_op_mode = OP_MODE_PURE; ++ ++ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ if (cur_op_mode != new_op_mode) { ++ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ pmlmepriv->ht_op_mode |= new_op_mode; ++ op_mode_changes++; ++ } ++ ++ DBG_871X("%s new operation mode=0x%X changes=%d\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); ++ ++ return op_mode_changes; ++ ++} ++ ++#endif /* CONFIG_80211N_HT */ ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void bss_cap_update(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++#if 0 ++ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { ++ psta->nonerp_set = 1; ++ pmlmepriv->num_sta_non_erp++; ++ if (pmlmepriv->num_sta_non_erp == 1) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(psta->flags & WLAN_STA_NONERP) ++ { ++ if(!psta->nonerp_set) ++ { ++ psta->nonerp_set = 1; ++ ++ pmlmepriv->num_sta_non_erp++; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ ++ } ++ else ++ { ++ if(psta->nonerp_set) ++ { ++ psta->nonerp_set = 0; ++ ++ pmlmepriv->num_sta_non_erp--; ++ ++ if (pmlmepriv->num_sta_non_erp == 0) ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && ++ !psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 1; ++ pmlmepriv->num_sta_no_short_slot_time++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) ++ { ++ if(!psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 1; ++ ++ pmlmepriv->num_sta_no_short_slot_time++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 0)) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && ++ !psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 1; ++ pmlmepriv->num_sta_no_short_preamble++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ ++ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) ++ { ++ if(!psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 1; ++ ++ pmlmepriv->num_sta_no_short_preamble++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 0)) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ ++ } ++ } ++ ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->flags & WLAN_STA_HT) ++ { ++ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); ++ ++ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " ++ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { ++ if (!psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 1; ++ pmlmepriv->num_sta_ht_no_gf++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - no " ++ "greenfield, num of non-gf stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_no_gf); ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { ++ if (!psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 1; ++ pmlmepriv->num_sta_ht_20mhz++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " ++ "num of 20MHz HT STAs %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_20mhz); ++ } ++ ++ } ++ else ++ { ++ if (!psta->no_ht_set) { ++ psta->no_ht_set = 1; ++ pmlmepriv->num_sta_no_ht++; ++ } ++ if(pmlmepriv->htpriv.ht_option == _TRUE) { ++ DBG_871X("%s STA " MAC_FMT ++ " - no HT, num of non-HT stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_no_ht); ++ } ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++} ++ ++void ap_free_sta(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(!psta) ++ return; ++ ++ ++ if (psta->nonerp_set) { ++ psta->nonerp_set = 0; ++ pmlmepriv->num_sta_non_erp--; ++ if (pmlmepriv->num_sta_non_erp == 0) ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ ++ if (psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 0; ++ pmlmepriv->num_sta_no_short_slot_time--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_slot_time == 0) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ if (psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 0; ++ pmlmepriv->num_sta_no_short_preamble--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_preamble == 0) ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 0; ++ pmlmepriv->num_sta_ht_no_gf--; ++ } ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if (psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 0; ++ pmlmepriv->num_sta_ht_20mhz--; ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ ++ issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ //report_del_sta_event(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ //clear key ++ //clear_cam_entry(padapter, (psta->mac_id + 3)); ++ ++ { ++ #ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ ++ if(pwdev->iftype == NL80211_IFTYPE_AP) { ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ report_del_sta_event(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } else ++ #endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_disassoc_event(padapter, psta); ++ } ++ } ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++} ++ ++int rtw_sta_flush(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //free sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ rtw_list_delete(&psta->asoc_list); ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ap_free_sta(padapter, psta); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ ++ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ return ret; ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void sta_info_update(_adapter *padapter, struct sta_info *psta) ++{ ++ int flags = psta->flags; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //update wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //update 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++} ++ ++/* called >= TSR LEVEL for USB or SDIO Interface*/ ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) ++{ ++ if(psta->state & _FW_LINKED) ++ { ++ //add ratid ++ add_RATid(padapter, psta); ++ } ++} ++ ++void start_ap_mode(_adapter *padapter) ++{ ++ int i; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ //init_mlme_ap_info(padapter); ++ pmlmeext->bstart_bss = _FALSE; ++ ++ pmlmepriv->num_sta_non_erp = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble = 0; ++ ++ pmlmepriv->num_sta_ht_no_gf = 0; ++ ++ pmlmepriv->num_sta_no_ht = 0; ++ ++ pmlmepriv->num_sta_ht_20mhz = 0; ++ ++ pmlmepriv->olbc = _FALSE; ++ ++ pmlmepriv->olbc_ht = _FALSE; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->ht_op_mode = 0; ++#endif ++ ++ for(i=0; ista_aid[i] = NULL; ++ ++ pmlmepriv->wps_beacon_ie = NULL; ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ ++ pmlmepriv->p2p_beacon_ie = NULL; ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ ++} ++ ++void stop_ap_mode(_adapter *padapter) ++{ ++ _irqL irqL; ++ //_list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++ //phead = &pstapriv->asoc_list; ++ //plist = get_next(phead); ++ ++ rtw_sta_flush(padapter); ++ ++#if 0 ++ //free sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ rtw_list_delete(&psta->asoc_list); ++ ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ } ++#endif ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++/* ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ if(pmlmepriv->wps_assoc_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ if(pmlmepriv->p2p_beacon_ie) ++ { ++ rtw_mfree(pmlmepriv->p2p_beacon_ie, pmlmepriv->p2p_beacon_ie_len); ++ pmlmepriv->p2p_beacon_ie = NULL; ++ } ++ ++ if(pmlmepriv->p2p_probe_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, pmlmepriv->p2p_probe_resp_ie_len); ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ } ++*/ ++ ++} ++ ++ ++#endif ++ ++#endif ++ ++u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct SetChannelPlan_param *setChannelPlan_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ setChannelPlan_param = (struct SetChannelPlan_param *)pbuf; ++ ++ pmlmeext->max_chan_nums = init_channel_set(padapter, setChannelPlan_param->channel_plan, pmlmeext->channel_set); ++ ++ return H2C_SUCCESS; ++} ++ ++u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ struct LedBlink_param *ledBlink_param; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ ledBlink_param = (struct LedBlink_param *)pbuf; ++ ++ #ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ BlinkHandler(ledBlink_param->pLed); ++ #endif ++ ++ return H2C_SUCCESS; ++} ++ ++u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++#ifdef CONFIG_DFS ++ struct SetChannelSwitch_param *setChannelSwitch_param; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 new_ch_no; ++ u8 gval8 = 0x00, sval8 = 0xff; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ setChannelSwitch_param = (struct SetChannelSwitch_param *)pbuf; ++ new_ch_no = setChannelSwitch_param->new_ch_no; ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_TXPAUSE, &gval8); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, &sval8); ++ ++ DBG_8192C("DFS detected! Swiching channel to %d!\n", new_ch_no); ++ SelectChannel(padapter, new_ch_no); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TXPAUSE, &gval8); ++ ++ rtw_free_network_queue(padapter, _TRUE); ++ rtw_indicate_disconnect(padapter); ++ ++ if ( ((new_ch_no >= 52) && (new_ch_no <= 64)) ||((new_ch_no >= 100) && (new_ch_no <= 140)) ) { ++ DBG_8192C("Switched to DFS band (ch %02x) again!!\n", new_ch_no); ++ } ++ ++ return H2C_SUCCESS; ++#else ++ return H2C_REJECTED; ++#endif //CONFIG_DFS ++ ++} ++ ++// TDLS_WRCR : write RCR DATA BIT ++// TDLS_SD_PTI : issue peer traffic indication ++// TDLS_CS_OFF : go back to the channel linked with AP, terminating channel switch procedure ++// TDLS_INIT_CH_SEN : init channel sensing, receive all data and mgnt frame ++// TDLS_DONE_CH_SEN: channel sensing and report candidate channel ++// TDLS_OFF_CH : first time set channel to off channel ++// TDLS_BASE_CH : go back tp the channel linked with AP when set base channel as target channel ++// TDLS_P_OFF_CH : periodically go to off channel ++// TDLS_P_BASE_CH : periodically go back to base channel ++// TDLS_RS_RCR : restore RCR ++// TDLS_CKALV_PH1 : check alive timer phase1 ++// TDLS_CKALV_PH2 : check alive timer phase2 ++// TDLS_FREE_STA : free tdls sta ++u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++#ifdef CONFIG_TDLS ++ _irqL irqL; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct TDLSoption_param *TDLSoption; ++ struct sta_info *ptdls_sta; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 survey_channel, i, min, option; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ TDLSoption = (struct TDLSoption_param *)pbuf; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), TDLSoption->addr ); ++ option = TDLSoption->option; ++ ++ if( ptdls_sta == NULL ) ++ { ++ if( option != TDLS_RS_RCR ) ++ return H2C_REJECTED; ++ } ++ ++ //_enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ DBG_8192C("[%s] option:%d\n", __FUNCTION__, option); ++ ++ switch(option){ ++ case TDLS_WRCR: ++ //As long as TDLS handshake success, we should set RCR_CBSSID_DATA bit to 0 ++ //such we can receive all kinds of data frames. ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TDLS_WRCR, 0); ++ DBG_8192C("wirte REG_RCR, set bit6 off\n"); ++ break; ++ case TDLS_SD_PTI: ++ issue_tdls_peer_traffic_indication(padapter, ptdls_sta); ++ break; ++ case TDLS_CS_OFF: ++ _cancel_timer_ex(&ptdls_sta->base_ch_timer); ++ _cancel_timer_ex(&ptdls_sta->off_ch_timer); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE | ++ TDLS_AT_OFF_CH_STATE); ++ DBG_8192C("go back to base channel\n "); ++ issue_nulldata(padapter, 0); ++ break; ++ case TDLS_INIT_CH_SEN: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TDLS_INIT_CH_SEN, 0); ++ pmlmeext->sitesurvey_res.channel_idx = 0; ++ ptdls_sta->option = TDLS_DONE_CH_SEN; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); ++ break; ++ case TDLS_DONE_CH_SEN: ++ survey_channel = pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].ChannelNum; ++ if(survey_channel){ ++ SelectChannel(padapter, survey_channel); ++ ptdlsinfo->cur_channel = survey_channel; ++ pmlmeext->sitesurvey_res.channel_idx++; ++ _set_timer(&ptdls_sta->option_timer, SURVEY_TO); ++ }else{ ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TDLS_DONE_CH_SEN, 0); ++ ++ if(ptdlsinfo->ch_sensing==1){ ++ ptdlsinfo->ch_sensing=0; ++ ptdlsinfo->cur_channel=1; ++ min=ptdlsinfo->collect_pkt_num[0]; ++ for(i=1; i ptdlsinfo->collect_pkt_num[i]){ ++ ptdlsinfo->cur_channel=i+1; ++ min=ptdlsinfo->collect_pkt_num[i]; ++ } ++ ptdlsinfo->collect_pkt_num[i]=0; ++ } ++ ptdlsinfo->collect_pkt_num[0]=0; ++ ptdlsinfo->candidate_ch=ptdlsinfo->cur_channel; ++ DBG_8192C("TDLS channel sensing done, candidate channel: %02x\n", ptdlsinfo->candidate_ch); ++ ptdlsinfo->cur_channel=0; ++ ++ } ++ ++ if(ptdls_sta->tdls_sta_state & TDLS_PEER_SLEEP_STATE){ ++ ptdls_sta->tdls_sta_state |= TDLS_APSD_CHSW_STATE; ++ }else{ ++ //send null data with pwrbit==1 before send ch_switching_req to peer STA. ++ issue_nulldata(padapter, 1); ++ ++ ptdls_sta->tdls_sta_state |= TDLS_CH_SW_INITIATOR_STATE; ++ ++ issue_tdls_ch_switch_req(padapter, ptdls_sta->hwaddr); ++ DBG_8192C("issue tdls ch switch req\n"); ++ } ++ } ++ break; ++ case TDLS_OFF_CH: ++ issue_nulldata(padapter, 1); ++ SelectChannel(padapter, ptdls_sta->off_ch); ++ ++ DBG_8192C("change channel to tar ch:%02x\n", ptdls_sta->off_ch); ++ ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; ++ ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE); ++ _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); ++ break; ++ case TDLS_BASE_CH: ++ _cancel_timer_ex(&ptdls_sta->base_ch_timer); ++ _cancel_timer_ex(&ptdls_sta->off_ch_timer); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SWITCH_ON_STATE | ++ TDLS_PEER_AT_OFF_STATE | ++ TDLS_AT_OFF_CH_STATE); ++ DBG_8192C("go back to base channel\n "); ++ issue_nulldata(padapter, 0); ++ _set_timer(&ptdls_sta->option_timer, (u32)ptdls_sta->ch_switch_time); ++ break; ++ case TDLS_P_OFF_CH: ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ issue_nulldata(padapter, 0); ++ DBG_8192C("change channel to base ch:%02x\n", pmlmeext->cur_channel); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_AT_OFF_STATE| TDLS_AT_OFF_CH_STATE); ++ _set_timer(&ptdls_sta->off_ch_timer, TDLS_STAY_TIME); ++ break; ++ case TDLS_P_BASE_CH: ++ issue_nulldata(ptdls_sta->padapter, 1); ++ SelectChannel(padapter, ptdls_sta->off_ch); ++ DBG_8192C("change channel to off ch:%02x\n", ptdls_sta->off_ch); ++ ptdls_sta->tdls_sta_state |= TDLS_AT_OFF_CH_STATE; ++ if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE){ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0); ++ } ++ _set_timer(&ptdls_sta->base_ch_timer, TDLS_STAY_TIME); ++ break; ++ case TDLS_RS_RCR: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TDLS_RS_RCR, 0); ++ DBG_8192C("wirte REG_RCR, set bit6 on\n"); ++ break; ++ case TDLS_CKALV_PH1: ++ _set_timer(&ptdls_sta->alive_timer2, TDLS_ALIVE_TIMER_PH2); ++ break; ++ case TDLS_CKALV_PH2: ++ _set_timer(&ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++ break; ++ case TDLS_FREE_STA: ++ free_tdls_sta(padapter, ptdls_sta); ++ break; ++ ++ } ++ ++ //_exit_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ++ return H2C_SUCCESS; ++#else ++ return H2C_REJECTED; ++#endif //CONFIG_TDLS ++ ++} +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mp.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1317 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MP_C_ ++ ++#include ++ ++#ifdef CONFIG_RTL8712 ++#include ++#endif ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++ ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++u32 read_macreg(_adapter *padapter, u32 addr, u32 sz) ++{ ++ u32 val = 0; ++ ++ switch(sz) ++ { ++ case 1: ++ val = rtw_read8(padapter, addr); ++ break; ++ case 2: ++ val = rtw_read16(padapter, addr); ++ break; ++ case 4: ++ val = rtw_read32(padapter, addr); ++ break; ++ default: ++ val = 0xffffffff; ++ break; ++ } ++ ++ return val; ++ ++} ++ ++void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz) ++{ ++ switch(sz) ++ { ++ case 1: ++ rtw_write8(padapter, addr, (u8)val); ++ break; ++ case 2: ++ rtw_write16(padapter, addr, (u16)val); ++ break; ++ case 4: ++ rtw_write32(padapter, addr, val); ++ break; ++ default: ++ break; ++ } ++ ++} ++ ++u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask) ++{ ++ return padapter->HalFunc.read_bbreg(padapter, addr, bitmask); ++} ++ ++void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val) ++{ ++ padapter->HalFunc.write_bbreg(padapter, addr, bitmask, val); ++} ++ ++u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask) ++{ ++ return padapter->HalFunc.read_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bitmask); ++} ++ ++void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val) ++{ ++ padapter->HalFunc.write_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bitmask, val); ++} ++ ++u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr) ++{ ++ return _read_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask); ++} ++ ++void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val) ++{ ++ _write_rfreg(padapter, (RF90_RADIO_PATH_E)rfpath, addr, bRFRegOffsetMask, val); ++} ++ ++ ++static void _init_mp_priv_(struct mp_priv *pmp_priv) ++{ ++ WLAN_BSSID_EX *pnetwork; ++ ++ _rtw_memset(pmp_priv, 0, sizeof(struct mp_priv)); ++ ++ pmp_priv->mode = MP_OFF; ++ ++ pmp_priv->channel = 1; ++ pmp_priv->bandwidth = HT_CHANNEL_WIDTH_20; ++ pmp_priv->prime_channel_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ pmp_priv->rateidx = MPT_RATE_1M; ++ pmp_priv->txpoweridx = 0x2A; ++ ++ pmp_priv->antenna_tx = ANTENNA_A; ++ pmp_priv->antenna_rx = ANTENNA_AB; ++ ++ pmp_priv->check_mp_pkt = 0; ++ ++ pmp_priv->tx_pktcount = 0; ++ ++ pmp_priv->rx_pktcount = 0; ++ pmp_priv->rx_crcerrpktcount = 0; ++ ++ pmp_priv->network_macaddr[0] = 0x00; ++ pmp_priv->network_macaddr[1] = 0xE0; ++ pmp_priv->network_macaddr[2] = 0x4C; ++ pmp_priv->network_macaddr[3] = 0x87; ++ pmp_priv->network_macaddr[4] = 0x66; ++ pmp_priv->network_macaddr[5] = 0x55; ++ ++ pnetwork = &pmp_priv->mp_network.network; ++ _rtw_memcpy(pnetwork->MacAddress, pmp_priv->network_macaddr, ETH_ALEN); ++ ++ pnetwork->Ssid.SsidLength = 8; ++ _rtw_memcpy(pnetwork->Ssid.Ssid, "mp_871x", pnetwork->Ssid.SsidLength); ++} ++ ++#ifdef PLATFORM_WINDOWS ++/* ++void mp_wi_callback( ++ IN NDIS_WORK_ITEM* pwk_item, ++ IN PVOID cntx ++ ) ++{ ++ _adapter* padapter =(_adapter *)cntx; ++ struct mp_priv *pmppriv=&padapter->mppriv; ++ struct mp_wi_cntx *pmp_wi_cntx=&pmppriv->wi_cntx; ++ ++ // Execute specified action. ++ if(pmp_wi_cntx->curractfunc != NULL) ++ { ++ LARGE_INTEGER cur_time; ++ ULONGLONG start_time, end_time; ++ NdisGetCurrentSystemTime(&cur_time); // driver version ++ start_time = cur_time.QuadPart/10; // The return value is in microsecond ++ ++ pmp_wi_cntx->curractfunc(padapter); ++ ++ NdisGetCurrentSystemTime(&cur_time); // driver version ++ end_time = cur_time.QuadPart/10; // The return value is in microsecond ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("WorkItemActType: %d, time spent: %I64d us\n", ++ pmp_wi_cntx->param.act_type, (end_time-start_time))); ++ } ++ ++ NdisAcquireSpinLock(&(pmp_wi_cntx->mp_wi_lock)); ++ pmp_wi_cntx->bmp_wi_progress= _FALSE; ++ NdisReleaseSpinLock(&(pmp_wi_cntx->mp_wi_lock)); ++ ++ if (pmp_wi_cntx->bmpdrv_unload) ++ { ++ NdisSetEvent(&(pmp_wi_cntx->mp_wi_evt)); ++ } ++ ++} ++*/ ++ ++static int init_mp_priv_by_os(struct mp_priv *pmp_priv) ++{ ++ struct mp_wi_cntx *pmp_wi_cntx; ++ ++ if (pmp_priv == NULL) return _FAIL; ++ ++ pmp_priv->rx_testcnt = 0; ++ pmp_priv->rx_testcnt1 = 0; ++ pmp_priv->rx_testcnt2 = 0; ++ ++ pmp_priv->tx_testcnt = 0; ++ pmp_priv->tx_testcnt1 = 0; ++ ++ pmp_wi_cntx = &pmp_priv->wi_cntx ++ pmp_wi_cntx->bmpdrv_unload = _FALSE; ++ pmp_wi_cntx->bmp_wi_progress = _FALSE; ++ pmp_wi_cntx->curractfunc = NULL; ++ ++ return _SUCCESS; ++} ++#endif ++ ++#ifdef PLATFORM_LINUX ++static int init_mp_priv_by_os(struct mp_priv *pmp_priv) ++{ ++ int i, res; ++ struct mp_xmit_frame *pmp_xmitframe; ++ ++ if (pmp_priv == NULL) return _FAIL; ++ ++ _rtw_init_queue(&pmp_priv->free_mp_xmitqueue); ++ ++ pmp_priv->pallocated_mp_xmitframe_buf = NULL; ++ pmp_priv->pallocated_mp_xmitframe_buf = rtw_zmalloc(NR_MP_XMITFRAME * sizeof(struct mp_xmit_frame) + 4); ++ if (pmp_priv->pallocated_mp_xmitframe_buf == NULL) { ++ res = _FAIL; ++ goto _exit_init_mp_priv; ++ } ++ ++ pmp_priv->pmp_xmtframe_buf = pmp_priv->pallocated_mp_xmitframe_buf + 4 - ((uint) (pmp_priv->pallocated_mp_xmitframe_buf) & 3); ++ ++ pmp_xmitframe = (struct mp_xmit_frame*)pmp_priv->pmp_xmtframe_buf; ++ ++ for (i = 0; i < NR_MP_XMITFRAME; i++) ++ { ++ _rtw_init_listhead(&pmp_xmitframe->list); ++ rtw_list_insert_tail(&pmp_xmitframe->list, &pmp_priv->free_mp_xmitqueue.queue); ++ ++ pmp_xmitframe->pkt = NULL; ++ pmp_xmitframe->frame_tag = MP_FRAMETAG; ++ pmp_xmitframe->padapter = pmp_priv->papdater; ++ ++ pmp_xmitframe++; ++ } ++ ++ pmp_priv->free_mp_xmitframe_cnt = NR_MP_XMITFRAME; ++ ++ res = _SUCCESS; ++ ++_exit_init_mp_priv: ++ ++ return res; ++} ++#endif ++ ++static void mp_init_xmit_attrib(struct mp_tx *pmptx, PADAPTER padapter) ++{ ++ struct pkt_attrib *pattrib; ++ struct tx_desc *desc; ++ ++ // init xmitframe attribute ++ pattrib = &pmptx->attrib; ++ _rtw_memset(pattrib, 0, sizeof(struct pkt_attrib)); ++ desc = &pmptx->desc; ++ _rtw_memset(desc, 0, TXDESC_SIZE); ++ ++ pattrib->ether_type = 0x8712; ++ //_rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++// _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); ++// pattrib->pctrl = 0; ++// pattrib->dhcp_pkt = 0; ++// pattrib->pktlen = 0; ++ pattrib->ack_policy = 0; ++// pattrib->pkt_hdrlen = ETH_HLEN; ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA; ++ pattrib->priority = 0; ++ pattrib->qsel = pattrib->priority; ++// do_queue_select(padapter, pattrib); ++ pattrib->nr_frags = 1; ++ pattrib->encrypt = 0; ++ pattrib->bswenc = _FALSE; ++ pattrib->qos_en = _FALSE; ++} ++ ++s32 init_mp_priv(PADAPTER padapter) ++{ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ ++ _init_mp_priv_(pmppriv); ++ pmppriv->papdater = padapter; ++ ++ pmppriv->tx.stop = 1; ++ mp_init_xmit_attrib(&pmppriv->tx, padapter); ++ ++ switch (padapter->registrypriv.rf_config) { ++ case RF_1T1R: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_A; ++ break; ++ case RF_1T2R: ++ default: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T4R: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_ABCD; ++ break; ++ } ++ ++ return _SUCCESS; ++} ++ ++void free_mp_priv(struct mp_priv *pmp_priv) ++{ ++ if (pmp_priv->pallocated_mp_xmitframe_buf) { ++ rtw_mfree(pmp_priv->pallocated_mp_xmitframe_buf, 0); ++ pmp_priv->pallocated_mp_xmitframe_buf = NULL; ++ } ++ pmp_priv->pmp_xmtframe_buf = NULL; ++} ++ ++#ifdef CONFIG_RTL8192C ++#define PHY_IQCalibrate(a,b) rtl8192c_PHY_IQCalibrate(a,b) ++#define PHY_LCCalibrate(a) rtl8192c_PHY_LCCalibrate(a) ++#define dm_CheckTXPowerTracking(a) rtl8192c_dm_CheckTXPowerTracking(a) ++#define PHY_SetRFPathSwitch(a,b) rtl8192c_PHY_SetRFPathSwitch(a,b) ++#endif ++ ++#ifdef CONFIG_RTL8192D ++#define PHY_IQCalibrate(a) rtl8192d_PHY_IQCalibrate(a) ++#define PHY_LCCalibrate(a) rtl8192d_PHY_LCCalibrate(a) ++#define dm_CheckTXPowerTracking(a) rtl8192d_dm_CheckTXPowerTracking(a) ++#define PHY_SetRFPathSwitch(a,b) rtl8192d_PHY_SetRFPathSwitch(a,b) ++#endif ++ ++s32 ++MPT_InitializeAdapter( ++ IN PADAPTER pAdapter, ++ IN u8 Channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ s32 rtStatus = _SUCCESS; ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ u32 tmpRegA, tmpRegC, TempCCk,ledsetting; ++ ++ //------------------------------------------------------------------------- ++ // HW Initialization for 8190 MPT. ++ //------------------------------------------------------------------------- ++ //------------------------------------------------------------------------- ++ // SW Initialization for 8190 MP. ++ //------------------------------------------------------------------------- ++ pMptCtx->bMptDrvUnload = _FALSE; ++ pMptCtx->bMassProdTest = _FALSE; ++ pMptCtx->bMptIndexEven = _TRUE; //default gain index is -6.0db ++ ++ /* Init mpt event. */ ++#if 0 // for Windows ++ NdisInitializeEvent( &(pMptCtx->MptWorkItemEvent) ); ++ NdisAllocateSpinLock( &(pMptCtx->MptWorkItemSpinLock) ); ++ ++ PlatformInitializeWorkItem( ++ Adapter, ++ &(pMptCtx->MptWorkItem), ++ (RT_WORKITEM_CALL_BACK)MPT_WorkItemCallback, ++ (PVOID)Adapter, ++ "MptWorkItem"); ++#endif ++ pMptCtx->bMptWorkItemInProgress = _FALSE; ++ pMptCtx->CurrMptAct = NULL; ++ //------------------------------------------------------------------------- ++ ++#if 1 ++ // Don't accept any packets ++ rtw_write32(pAdapter, REG_RCR, 0); ++#else ++ // Accept CRC error and destination address ++ pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP); ++ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); ++#endif ++ ++#if 0 ++ // If EEPROM or EFUSE is empty,we assign as RF 2T2R for MP. ++ if (pHalData->AutoloadFailFlag == TRUE) ++ { ++ pHalData->RF_Type = RF_2T2R; ++ } ++#endif ++ ledsetting = rtw_read32(pAdapter, REG_LEDCFG0); ++ rtw_write32(pAdapter, REG_LEDCFG0, ledsetting & ~LED0DIS); ++ ++#ifdef CONFIG_RTL8192C ++ PHY_IQCalibrate(pAdapter, _FALSE); ++ dm_CheckTXPowerTracking(pAdapter); //trigger thermal meter ++ PHY_LCCalibrate(pAdapter); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++ PHY_IQCalibrate(pAdapter); ++ dm_CheckTXPowerTracking(pAdapter); //trigger thermal meter ++ PHY_LCCalibrate(pAdapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //Wifi default use Main ++#else ++ ++#ifdef CONFIG_RTL8192C ++#if 1 ++ if (pHalData->BoardType == BOARD_MINICARD) ++ PHY_SetRFPathSwitch(pAdapter, 1/*pHalData->bDefaultAntenna*/); //default use Main ++#else ++ if(pAdapter->HalFunc.GetInterfaceSelectionHandler(pAdapter) == INTF_SEL2_MINICARD ) ++ PHY_SetRFPathSwitch(Adapter, pAdapter->MgntInfo.bDefaultAntenna); //default use Main ++#endif ++ ++#endif ++ ++#endif ++ ++ pMptCtx->backup0xc50 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ pMptCtx->backup0xc58 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0); ++ pMptCtx->backup0xc30 = (u1Byte)PHY_QueryBBReg(pAdapter, rOFDM0_RxDetector1, bMaskByte0); ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: MPT_DeInitAdapter() ++ * ++ * Overview: Extra DeInitialization for Mass Production Test. ++ * ++ * Input: PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/08/2007 MHC Create Version 0. ++ * 05/18/2007 MHC Add normal driver MPHalt code. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++MPT_DeInitAdapter( ++ IN PADAPTER pAdapter ++ ) ++{ ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->bMptDrvUnload = _TRUE; ++#if 0 // for Windows ++ PlatformFreeWorkItem( &(pMptCtx->MptWorkItem) ); ++ ++ while(pMptCtx->bMptWorkItemInProgress) ++ { ++ if(NdisWaitEvent(&(pMptCtx->MptWorkItemEvent), 50)) ++ { ++ break; ++ } ++ } ++ NdisFreeSpinLock( &(pMptCtx->MptWorkItemSpinLock) ); ++#endif ++} ++ ++static u8 mpt_ProStartTest(PADAPTER padapter) ++{ ++ PMPT_CONTEXT pMptCtx = &padapter->mppriv.MptCtx; ++ ++ pMptCtx->bMassProdTest = _TRUE; ++ pMptCtx->bStartContTx = _FALSE; ++ pMptCtx->bCckContTx = _FALSE; ++ pMptCtx->bOfdmContTx = _FALSE; ++ pMptCtx->bSingleCarrier = _FALSE; ++ pMptCtx->bCarrierSuppression = _FALSE; ++ pMptCtx->bSingleTone = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++/* ++ * General use ++ */ ++s32 SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ ++ Hal_SetPowerTracking( padapter, enable ); ++ return 0; ++} ++ ++void GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ Hal_GetPowerTracking( padapter, enable ); ++} ++ ++static void disable_dm(PADAPTER padapter) ++{ ++ u8 v8; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ //3 1. disable firmware dynamic mechanism ++ // disable Power Training, Rate Adaptive ++ v8 = rtw_read8(padapter, REG_BCN_CTRL); ++ v8 &= ~EN_BCN_FUNCTION; ++ rtw_write8(padapter, REG_BCN_CTRL, v8); ++ ++ //3 2. disable driver dynamic mechanism ++ // disable Dynamic Initial Gain ++ // disable High Power ++ // disable Power Tracking ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ // enable APK, LCK and IQK but disable power tracking ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); ++} ++ ++//This function initializes the DUT to the MP test mode ++s32 mp_start_test(PADAPTER padapter) ++{ ++ WLAN_BSSID_EX bssid; ++ struct sta_info *psta; ++ u32 length; ++ u8 val8; ++ ++ _irqL irqL; ++ s32 res = _SUCCESS; ++ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ ++ ++ //3 disable dynamic mechanism ++ disable_dm(padapter); ++ ++ //3 0. update mp_priv ++#if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8192D) ++ if (padapter->registrypriv.rf_config == RF_819X_MAX_TYPE) { ++// HAL_DATA_TYPE *phal = GET_HAL_DATA(padapter); ++// switch (phal->rf_type) { ++ switch (GET_RF_TYPE(padapter)) { ++ case RF_1T1R: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_A; ++ break; ++ case RF_1T2R: ++ default: ++ pmppriv->antenna_tx = ANTENNA_A; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_AB; ++ break; ++ case RF_2T4R: ++ pmppriv->antenna_tx = ANTENNA_AB; ++ pmppriv->antenna_rx = ANTENNA_ABCD; ++ break; ++ } ++ } ++#endif ++ mpt_ProStartTest(padapter); ++ ++ //3 1. initialize a new WLAN_BSSID_EX ++// _rtw_memset(&bssid, 0, sizeof(WLAN_BSSID_EX)); ++ _rtw_memcpy(bssid.MacAddress, pmppriv->network_macaddr, ETH_ALEN); ++ bssid.Ssid.SsidLength = strlen("mp_pseudo_adhoc"); ++ _rtw_memcpy(bssid.Ssid.Ssid, (u8*)"mp_pseudo_adhoc", bssid.Ssid.SsidLength); ++ bssid.InfrastructureMode = Ndis802_11IBSS; ++ bssid.NetworkTypeInUse = Ndis802_11DS; ++ bssid.IELength = 0; ++ ++ length = get_WLAN_BSSID_EX_sz(&bssid); ++ if (length % 4) ++ bssid.Length = ((length >> 2) + 1) << 2; //round up to multiple of 4 bytes. ++ else ++ bssid.Length = length; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ goto end_of_mp_start_test; ++ ++ //init mp_start_test status ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ rtw_disassoc_cmd(padapter); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ pmppriv->prev_fw_state = get_fwstate(pmlmepriv); ++ pmlmepriv->fw_state = WIFI_MP_STATE; ++#if 0 ++ if (pmppriv->mode == _LOOPBOOK_MODE_) { ++ set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc ++ RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in Lookback mode\n")); ++ } else { ++ RT_TRACE(_module_mp_, _drv_notice_, ("+start mp in normal mode\n")); ++ } ++#endif ++ set_fwstate(pmlmepriv, _FW_UNDER_LINKING); ++ ++ //3 2. create a new psta for mp driver ++ //clear psta in the cur_network, if any ++ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); ++ if (psta) rtw_free_stainfo(padapter, psta); ++ ++ psta = rtw_alloc_stainfo(&padapter->stapriv, bssid.MacAddress); ++ if (psta == NULL) { ++ RT_TRACE(_module_mp_, _drv_err_, ("mp_start_test: Can't alloc sta_info!\n")); ++ pmlmepriv->fw_state = pmppriv->prev_fw_state; ++ res = _FAIL; ++ goto end_of_mp_start_test; ++ } ++ ++ //3 3. join psudo AdHoc ++ tgt_network->join_res = 1; ++ tgt_network->aid = psta->aid = 1; ++ _rtw_memcpy(&tgt_network->network, &bssid, length); ++ ++ rtw_indicate_connect(padapter); ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_LINKING); ++ ++end_of_mp_start_test: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (res == _SUCCESS) ++ { ++ // set MSR to WIFI_FW_ADHOC_STATE ++#if defined (CONFIG_RTL8192C) || defined (CONFIG_RTL8192D) ++ val8 = rtw_read8(padapter, MSR) & 0xFC; // 0x0102 ++ val8 |= WIFI_FW_ADHOC_STATE; ++ rtw_write8(padapter, MSR, val8); // Link in ad hoc network ++#endif ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++ rtw_write8(padapter, MSR, 1); // Link in ad hoc network ++ rtw_write8(padapter, RCR, 0); // RCR : disable all pkt, 0x10250048 ++ rtw_write8(padapter, RCR+2, 0x57); // RCR disable Check BSSID, 0x1025004a ++ ++ // disable RX filter map , mgt frames will put in RX FIFO 0 ++ rtw_write16(padapter, RXFLTMAP0, 0x0); // 0x10250116 ++ ++ val8 = rtw_read8(padapter, EE_9346CR); // 0x1025000A ++ if (!(val8 & _9356SEL))//boot from EFUSE ++ efuse_change_max_size(padapter); ++#endif ++ } ++ ++ return res; ++} ++//------------------------------------------------------------------------------ ++//This function change the DUT from the MP test mode into normal mode ++void mp_stop_test(PADAPTER padapter) ++{ ++ struct mp_priv *pmppriv = &padapter->mppriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *tgt_network = &pmlmepriv->cur_network; ++ struct sta_info *psta; ++ ++ _irqL irqL; ++ ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE) ++ goto end_of_mp_stop_test; ++ ++ //3 1. disconnect psudo AdHoc ++ rtw_indicate_disconnect(padapter); ++ ++ //3 2. clear psta used in mp test mode. ++// rtw_free_assoc_resources(padapter, 1); ++ psta = rtw_get_stainfo(&padapter->stapriv, tgt_network->network.MacAddress); ++ if (psta) rtw_free_stainfo(padapter, psta); ++ ++ //3 3. return to normal state (default:station mode) ++ pmlmepriv->fw_state = pmppriv->prev_fw_state; // WIFI_STATION_STATE; ++ ++ //flush the cur_network ++ _rtw_memset(tgt_network, 0, sizeof(struct wlan_network)); ++ ++ _clr_fwstate_(pmlmepriv, WIFI_MP_STATE); ++ ++end_of_mp_stop_test: ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++#if 0 ++//#ifdef CONFIG_USB_HCI ++static VOID mpt_AdjustRFRegByRateByChan92CU(PADAPTER pAdapter, u8 RateIdx, u8 Channel, u8 BandWidthID) ++{ ++ u8 eRFPath; ++ u32 rfReg0x26; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ if (RateIdx < MPT_RATE_6M) { // CCK rate,for 88cu ++ rfReg0x26 = 0xf400; ++ } ++ else if ((RateIdx >= MPT_RATE_6M) && (RateIdx <= MPT_RATE_54M)) {// OFDM rate,for 88cu ++ if ((4 == Channel) || (8 == Channel) || (12 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ else if ((RateIdx >= MPT_RATE_MCS0) && (RateIdx <= MPT_RATE_MCS15)) {// MCS 20M ,for 88cu // MCS40M rate,for 88cu ++ ++ if (HT_CHANNEL_WIDTH_20 == BandWidthID) { ++ if ((4 == Channel) || (8 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel) || (13 == Channel) || (14 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ else{ ++ if ((4 == Channel) || (8 == Channel)) ++ rfReg0x26 = 0xf000; ++ else if ((5 == Channel) || (7 == Channel)) ++ rfReg0x26 = 0xf400; ++ else ++ rfReg0x26 = 0x4f200; ++ } ++ } ++ ++// RT_TRACE(COMP_CMD, DBG_LOUD, ("\n mpt_AdjustRFRegByRateByChan92CU():Chan:%d Rate=%d rfReg0x26:0x%08x\n",Channel, RateIdx,rfReg0x26)); ++ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) { ++ write_rfreg(pAdapter, eRFPath, RF_SYN_G2, rfReg0x26); ++ } ++} ++#endif ++/*----------------------------------------------------------------------------- ++ * Function: mpt_SwitchRfSetting ++ * ++ * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. ++ * ++ * Input: IN PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. ++ * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++static void mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ Hal_mpt_SwitchRfSetting(pAdapter); ++ } ++ ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++static void MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ Hal_MPT_CCKTxPowerAdjust(Adapter,bInCH14); ++} ++ ++static void MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) ++{ ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter,beven); ++ } ++ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++ ++/* ++ * SetChannel ++ * Description ++ * Use H2C command to change channel, ++ * not only modify rf register, but also other setting need to be done. ++ */ ++void SetChannel(PADAPTER pAdapter) ++{ ++ Hal_SetChannel(pAdapter); ++ ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void SetBandwidth(PADAPTER pAdapter) ++{ ++ Hal_SetBandwidth(pAdapter); ++ ++} ++ ++static void SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ Hal_SetCCKTxPower(pAdapter,TxPower); ++} ++ ++static void SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ Hal_SetOFDMTxPower(pAdapter,TxPower); ++ } ++ ++ ++void SetAntenna(PADAPTER pAdapter) ++ { ++ Hal_SetAntenna(pAdapter); ++} ++ ++void SetAntennaPathPower(PADAPTER pAdapter) ++{ ++ Hal_SetAntennaPathPower(pAdapter); ++} ++ ++void SetTxPower(PADAPTER pAdapter) ++{ ++ Hal_SetTxPower(pAdapter); ++} ++ ++void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) ++{ ++ u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; ++ ++ TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); ++ TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); ++ TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); ++ ++ tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); ++ write_bbreg(pAdapter, rFPGA0_TxGainStage, ++ (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); ++} ++ ++void SetDataRate(PADAPTER pAdapter) ++{ ++ Hal_SetDataRate(pAdapter); ++} ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++/*------------------------------Define structure----------------------------*/ ++typedef struct _R_ANTENNA_SELECT_OFDM { ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK { ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++#endif ++ ++s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ return Hal_SetThermalMeter( pAdapter, target_ther); ++} ++ ++static void TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ Hal_TriggerRFThermalMeter(pAdapter); ++} ++ ++static u8 ReadRFThermalMeter(PADAPTER pAdapter) ++{ ++ return Hal_ReadRFThermalMeter(pAdapter); ++} ++ ++void GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++ Hal_GetThermalMeter(pAdapter,value); ++} ++ ++void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetSingleCarrierTx(pAdapter,bStart); ++} ++ ++void SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetSingleToneTx(pAdapter,bStart); ++} ++ ++void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetCarrierSuppressionTx(pAdapter, bStart); ++} ++ ++void SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetCCKContinuousTx(pAdapter,bStart); ++ } ++ ++void SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetOFDMContinuousTx( pAdapter, bStart); ++}/* mpt_StartOfdmContTx */ ++ ++void SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ Hal_SetContinuousTx(pAdapter,bStart); ++} ++ ++//------------------------------------------------------------------------------ ++void dump_mpframe(_adapter *padapter, struct xmit_frame *pmpframe) ++{ ++ padapter->HalFunc.mgnt_xmit(padapter, pmpframe); ++} ++ ++struct xmit_frame *alloc_mp_xmitframe(struct xmit_priv *pxmitpriv) ++{ ++ struct xmit_frame *pmpframe; ++ struct xmit_buf *pxmitbuf; ++ ++ if ((pmpframe = rtw_alloc_xmitframe(pxmitpriv)) == NULL) ++ { ++ return NULL; ++ } ++ ++ if ((pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv)) == NULL) ++ { ++ rtw_free_xmitframe_ex(pxmitpriv, pmpframe); ++ return NULL; ++ } ++ ++ pmpframe->frame_tag = MP_FRAMETAG; ++ ++ pmpframe->pxmitbuf = pxmitbuf; ++ ++ pmpframe->buf_addr = pxmitbuf->pbuf; ++ ++ pxmitbuf->priv_data = pmpframe; ++ ++ return pmpframe; ++ ++} ++ ++thread_return mp_xmit_packet_thread(thread_context context) ++{ ++ struct xmit_frame *pxmitframe; ++ struct mp_tx *pmptx; ++ struct mp_priv *pmp_priv; ++ struct xmit_priv *pxmitpriv; ++ PADAPTER padapter; ++ ++ pmp_priv = (struct mp_priv *)context; ++ pmptx = &pmp_priv->tx; ++ padapter = pmp_priv->papdater; ++ pxmitpriv = &(padapter->xmitpriv); ++ ++ thread_enter(padapter); ++ ++ //DBG_8192C("%s:pkTx Start\n", __func__); ++ while (1) { ++ pxmitframe = alloc_mp_xmitframe(pxmitpriv); ++ if (pxmitframe == NULL) { ++ if (pmptx->stop || ++ padapter->bSurpriseRemoved || ++ padapter->bDriverStopped) { ++ goto exit; ++ } ++ else { ++ rtw_msleep_os(1); ++ continue; ++ } ++ } ++ ++ _rtw_memcpy((u8 *)(pxmitframe->buf_addr+TXDESC_OFFSET), pmptx->buf, pmptx->write_size); ++ _rtw_memcpy(&(pxmitframe->attrib), &(pmptx->attrib), sizeof(struct pkt_attrib)); ++ ++ dump_mpframe(padapter, pxmitframe); ++ ++ pmptx->sended++; ++ pmp_priv->tx_pktcount++; ++ ++ if (pmptx->stop || ++ padapter->bSurpriseRemoved || ++ padapter->bDriverStopped) ++ goto exit; ++ if ((pmptx->count != 0) && ++ (pmptx->count == pmptx->sended)) ++ goto exit; ++ ++ flush_signals_thread(); ++ } ++ ++exit: ++ //DBG_8192C("%s:pkTx Exit\n", __func__); ++ rtw_mfree(pmptx->pallocated_buf, pmptx->buf_size); ++ pmptx->pallocated_buf = NULL; ++ pmptx->stop = 1; ++ ++ thread_exit(); ++} ++ ++void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc) ++{ ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ _rtw_memcpy(ptxdesc, &(pmp_priv->tx.desc), TXDESC_SIZE); ++} ++ ++void SetPacketTx(PADAPTER padapter) ++{ ++ u8 *ptr, *pkt_start, *pkt_end; ++ u32 pkt_size; ++ struct tx_desc *desc; ++ struct rtw_ieee80211_hdr *hdr; ++ u8 payload; ++ s32 bmcast; ++ struct pkt_attrib *pattrib; ++ struct mp_priv *pmp_priv; ++ ++ ++ pmp_priv = &padapter->mppriv; ++ if (pmp_priv->tx.stop) return; ++ pmp_priv->tx.sended = 0; ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx_pktcount = 0; ++ ++ //3 1. update_attrib() ++ pattrib = &pmp_priv->tx.attrib; ++ _rtw_memcpy(pattrib->src, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ bmcast = IS_MCAST(pattrib->ra); ++ if (bmcast) { ++ pattrib->mac_id = 1; ++ pattrib->psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ pattrib->mac_id = 0; ++ pattrib->psta = rtw_get_stainfo(&padapter->stapriv, get_bssid(&padapter->mlmepriv)); ++ } ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->pktlen; ++ ++ //3 2. allocate xmit buffer ++ pkt_size = pattrib->last_txcmdsz; ++ ++ if (pmp_priv->tx.pallocated_buf) ++ rtw_mfree(pmp_priv->tx.pallocated_buf, pmp_priv->tx.buf_size); ++ pmp_priv->tx.write_size = pkt_size; ++ pmp_priv->tx.buf_size = pkt_size + XMITBUF_ALIGN_SZ; ++ pmp_priv->tx.pallocated_buf = rtw_zmalloc(pmp_priv->tx.buf_size); ++ if (pmp_priv->tx.pallocated_buf == NULL) { ++ DBG_8192C("%s: malloc(%d) fail!!\n", __func__, pmp_priv->tx.buf_size); ++ return; ++ } ++ pmp_priv->tx.buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pmp_priv->tx.pallocated_buf), XMITBUF_ALIGN_SZ); ++ ptr = pmp_priv->tx.buf; ++ ++ desc = &(pmp_priv->tx.desc); ++ _rtw_memset(desc, 0, TXDESC_SIZE); ++ pkt_start = ptr; ++ pkt_end = pkt_start + pkt_size; ++ ++ //3 3. init TX descriptor ++ // offset 0 ++ //desc->txdw0 |= cpu_to_le32(pkt_size & 0x0000FFFF); // packet size ++ //desc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ //desc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00FF0000); //32 bytes for TX Desc ++ //if (bmcast) desc->txdw0 |= cpu_to_le32(BMC); // broadcast packet ++ ++ // offset 4 ++ desc->txdw1 |= cpu_to_le32(BK); // don't aggregate(AMPDU) ++ desc->txdw1 |= cpu_to_le32((pattrib->mac_id) & 0x1F); //CAM_ID(MAC_ID) ++ desc->txdw1 |= cpu_to_le32((pattrib->qsel << QSEL_SHT) & 0x00001F00); // Queue Select, TID ++ desc->txdw1 |= cpu_to_le32((pattrib->raid << Rate_ID_SHT) & 0x000F0000); // Rate Adaptive ID ++ ++ // offset 8 ++ // offset 12 ++ //desc->txdw3 |= cpu_to_le32((pattrib->seqnum << SEQ_SHT) & 0xffff0000); ++ ++ // offset 16 ++ //desc->txdw4 |= cpu_to_le32(QoS); ++ desc->txdw4 |= cpu_to_le32(HW_SEQ_EN); ++ desc->txdw4 |= cpu_to_le32(USERATE); ++ desc->txdw4 |= cpu_to_le32(DISDATAFB); ++ ++ if( pmp_priv->preamble ){ ++ if (pmp_priv->rateidx <= MPT_RATE_54M) ++ desc->txdw4 |= cpu_to_le32(DATA_SHORT); // CCK Short Preamble ++ } ++ if (pmp_priv->bandwidth == HT_CHANNEL_WIDTH_40) ++ desc->txdw4 |= cpu_to_le32(DATA_BW); ++ ++ // offset 20 ++ desc->txdw5 |= cpu_to_le32(pmp_priv->rateidx & 0x0000001F); ++ ++ if( pmp_priv->preamble ){ ++ if (pmp_priv->rateidx > MPT_RATE_54M) ++ desc->txdw5 |= cpu_to_le32(SGI); // MCS Short Guard Interval ++ } ++ desc->txdw5 |= cpu_to_le32(0x0001FF00); // DATA/RTS Rate Fallback Limit ++ ++ //3 4. make wlan header, make_wlanhdr() ++ hdr = (struct rtw_ieee80211_hdr *)pkt_start; ++ SetFrameSubType(&hdr->frame_ctl, pattrib->subtype); ++ _rtw_memcpy(hdr->addr1, pattrib->dst, ETH_ALEN); // DA ++ _rtw_memcpy(hdr->addr2, pattrib->src, ETH_ALEN); // SA ++ _rtw_memcpy(hdr->addr3, get_bssid(&padapter->mlmepriv), ETH_ALEN); // RA, BSSID ++ ++ //3 5. make payload ++ ptr = pkt_start + pattrib->hdrlen; ++ ++ switch (pmp_priv->tx.payload) { ++ case 0: ++ payload = 0x00; ++ break; ++ case 1: ++ payload = 0x5a; ++ break; ++ case 2: ++ payload = 0xa5; ++ break; ++ case 3: ++ payload = 0xff; ++ break; ++ default: ++ payload = 0x00; ++ break; ++ } ++ ++ _rtw_memset(ptr, payload, pkt_end - ptr); ++ ++ //3 6. start thread ++ if(!start_kthread(&pmp_priv->tx.PktTxThread, mp_xmit_packet_thread, pmp_priv, "8192cu-mp-xmit")) ++ DBG_871X("Create PktTx Thread Fail !!!!!\n"); ++ ++} ++ ++void SetPacketRx(PADAPTER pAdapter, u8 bStartRx) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if(bStartRx) ++ { ++ // Accept CRC error and destination address ++ pHalData->ReceiveConfig |= (RCR_ACRC32|RCR_AAP); ++ rtw_write32(pAdapter, REG_RCR, pHalData->ReceiveConfig); ++ } ++ else ++ { ++ rtw_write32(pAdapter, REG_RCR, 0); ++ } ++} ++ ++void ResetPhyRxPktCount(PADAPTER pAdapter) ++{ ++ u32 i, phyrx_set = 0; ++ ++ for (i = 0; i <= 0xF; i++) { ++ phyrx_set = 0; ++ phyrx_set |= _RXERR_RPT_SEL(i); //select ++ phyrx_set |= RXERR_RPT_RST; // set counter to zero ++ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); ++ } ++} ++ ++static u32 GetPhyRxPktCounts(PADAPTER pAdapter, u32 selbit) ++{ ++ //selection ++ u32 phyrx_set = 0, count = 0; ++ ++ phyrx_set = _RXERR_RPT_SEL(selbit & 0xF); ++ rtw_write32(pAdapter, REG_RXERR_RPT, phyrx_set); ++ ++ //Read packet count ++ count = rtw_read32(pAdapter, REG_RXERR_RPT) & RXERR_COUNTER_MASK; ++ ++ return count; ++} ++ ++u32 GetPhyRxPktReceived(PADAPTER pAdapter) ++{ ++ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; ++ ++ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_OK); ++ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_OK); ++ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_OK); ++ ++ return OFDM_cnt + CCK_cnt + HT_cnt; ++} ++ ++u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter) ++{ ++ u32 OFDM_cnt = 0, CCK_cnt = 0, HT_cnt = 0; ++ ++ OFDM_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_OFDM_MPDU_FAIL); ++ CCK_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_CCK_MPDU_FAIL); ++ HT_cnt = GetPhyRxPktCounts(pAdapter, RXERR_TYPE_HT_MPDU_FAIL); ++ ++ return OFDM_cnt + CCK_cnt + HT_cnt; ++} ++ ++//reg 0x808[9:0]: FFT data x ++//reg 0x808[22]: 0 --> 1 to get 1 FFT data y ++//reg 0x8B4[15:0]: FFT data y report ++static u32 GetPSDData(PADAPTER pAdapter, u32 point) ++{ ++ int psd_val; ++ ++ ++ psd_val = rtw_read32(pAdapter, 0x808); ++ psd_val &= 0xFFBFFC00; ++ psd_val |= point; ++ ++ rtw_write32(pAdapter, 0x808, psd_val); ++ rtw_mdelay_os(1); ++ psd_val |= 0x00400000; ++ ++ rtw_write32(pAdapter, 0x808, psd_val); ++ rtw_mdelay_os(1); ++ psd_val = rtw_read32(pAdapter, 0x8B4); ++ ++ psd_val &= 0x0000FFFF; ++ ++ return psd_val; ++} ++ ++/* ++ * pts start_point_min stop_point_max ++ * 128 64 64 + 128 = 192 ++ * 256 128 128 + 256 = 384 ++ * 512 256 256 + 512 = 768 ++ * 1024 512 512 + 1024 = 1536 ++ * ++ */ ++u32 mp_query_psd(PADAPTER pAdapter, u8 *data) ++{ ++ u8 *val; ++ u32 i, psd_pts=0, psd_start=0, psd_stop=0; ++ u32 psd_data=0; ++ ++ ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! interface not opened!\n")); ++ return 0; ++ } ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("mp_query_psd: Fail! not in MP mode!\n")); ++ return 0; ++ } ++ ++ if (strlen(data) == 0) { //default value ++ psd_pts = 128; ++ psd_start = 64; ++ psd_stop = 128; ++ } else { ++ sscanf(data, "pts=%d,start=%d,stop=%d", &psd_pts, &psd_start, &psd_stop); ++ } ++ ++ _rtw_memset(data, '\0', sizeof(data)); ++ ++ i = psd_start; ++ while (i < psd_stop) ++ { ++ if (i >= psd_pts) { ++ psd_data = GetPSDData(pAdapter, i-psd_pts); ++ } else { ++ psd_data = GetPSDData(pAdapter, i); ++ } ++ sprintf(data, "%s%x ", data, psd_data); ++ i++; ++ } ++ ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(100); ++ #else ++ rtw_mdelay_os(100); ++ #endif ++ ++ return strlen(data)+1; ++} ++ ++ ++u32 rtw_atoi(u8* s) ++{ ++ ++ int num=0,flag=0; ++ int i; ++ for(i=0;i<=strlen(s);i++) ++ { ++ if(s[i] >= '0' && s[i] <= '9') ++ num = num * 10 + s[i] -'0'; ++ else if(s[0] == '-' && i==0) ++ flag =1; ++ else ++ break; ++ } ++ ++ if(flag == 1) ++ num = num * -1; ++ ++ return(num); ++ ++} ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mp_ioctl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_mp_ioctl.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,2841 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_MP_IOCTL_C_ ++ ++#include ++#include ++#include ++#include ++ ++//#include ++#include ++ ++ ++//**************** oid_rtl_seg_81_85 section start **************** ++NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ Adapter->registrypriv.wireless_mode = *(u8*)poid_par_priv->information_buf; ++ } else if (poid_par_priv->type_of_oid == QUERY_OID) { ++ *(u8*)poid_par_priv->information_buf = Adapter->registrypriv.wireless_mode; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_info_, ("-query Wireless Mode=%d\n", Adapter->registrypriv.wireless_mode)); ++ } else { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_87_80 section start **************** ++NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ struct bb_reg_param *pbbreg; ++ u16 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_bb_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); ++ ++ offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff ++ if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; ++ ++ value = pbbreg->value; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_write_bb_reg_hdl: offset=0x%03X value=0x%08X\n", ++ offset, value)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ write_bbreg(Adapter, offset, 0xFFFFFFFF, value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ struct bb_reg_param *pbbreg; ++ u16 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_bb_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct bb_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct bb_reg_param *)(poid_par_priv->information_buf); ++ ++ offset = (u16)(pbbreg->offset) & 0xFFF; //0ffset :0x800~0xfff ++ if (offset < BB_REG_BASE_ADDR) offset |= BB_REG_BASE_ADDR; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ value = read_bbreg(Adapter, offset, 0xFFFFFFFF); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ pbbreg->value = value; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_read_bb_reg_hdl: offset=0x%03X value:0x%08X\n", ++ offset, value)); ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ struct rf_reg_param *pbbreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_write_rf_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); ++ ++ if (pbbreg->path >= MAX_RF_PATH_NUMS) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->offset > 0xFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->value > 0xFFFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ path = (u8)pbbreg->path; ++ offset = (u8)pbbreg->offset; ++ value = pbbreg->value; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_write_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", ++ path, offset, value)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ write_rfreg(Adapter, path, offset, value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ struct rf_reg_param *pbbreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_rf_reg_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct rf_reg_param)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pbbreg = (struct rf_reg_param *)(poid_par_priv->information_buf); ++ ++ if (pbbreg->path >= MAX_RF_PATH_NUMS) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ if (pbbreg->offset > 0xFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ path = (u8)pbbreg->path; ++ offset = (u8)pbbreg->offset; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ value = read_rfreg(Adapter, path, offset); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ pbbreg->value = value; ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_read_rf_reg_hdl: path=%d offset=0x%02X value=0x%05X\n", ++ path, offset, value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_87_00 section end**************** ++//------------------------------------------------------------------------------ ++ ++//**************** oid_rtl_seg_81_80_00 section start **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 ratevalue;//4 ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_set_data_rate_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ ratevalue = *((u32*)poid_par_priv->information_buf);//4 ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_data_rate_hdl: data rate idx=%d\n", ratevalue)); ++ if (ratevalue >= MPT_RATE_LAST) ++ return NDIS_STATUS_INVALID_DATA; ++ ++ Adapter->mppriv.rateidx = ratevalue; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetDataRate(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 mode; ++ u8 val8; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_start_test_hdl\n")); ++ ++ if (Adapter->registrypriv.mp_mode == 0) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ //IQCalibrateBcut(Adapter); ++ ++ mode = *((u32*)poid_par_priv->information_buf); ++ Adapter->mppriv.mode = mode;// 1 for loopback ++ ++ if (mp_start_test(Adapter) == _FAIL) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ goto exit; ++ } ++ ++exit: ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_pro_start_test_hdl: mp_mode=%d\n", Adapter->mppriv.mode)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_STOP_TEST\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ mp_stop_test(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-Set OID_RT_PRO_STOP_TEST\n")); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 Channel; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_channel_direct_call_hdl\n")); ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) { ++ *((u32*)poid_par_priv->information_buf) = Adapter->mppriv.channel; ++ return NDIS_STATUS_SUCCESS; ++ } ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Channel = *((u32*)poid_par_priv->information_buf); ++ RT_TRACE(_module_mp_, _drv_notice_, ("oid_rt_pro_set_channel_direct_call_hdl: Channel=%d\n", Channel)); ++ if (Channel > 14) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ Adapter->mppriv.channel = Channel; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetChannel(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u16 bandwidth, channel_offset; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_set_bandwidth_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ bandwidth = *((u32*)poid_par_priv->information_buf);//4 ++ if (bandwidth != HT_CHANNEL_WIDTH_40) ++ bandwidth = HT_CHANNEL_WIDTH_20; ++ Adapter->mppriv.bandwidth = (u8)bandwidth; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetBandwidth(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_set_bandwidth_hdl: bandwidth=%d channel_offset=%d\n", ++ bandwidth, channel_offset)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 antenna; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_antenna_bb_hdl\n")); ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) ++ { ++ antenna = *(u32*)poid_par_priv->information_buf; ++ ++ Adapter->mppriv.antenna_tx = (u16)((antenna & 0xFFFF0000) >> 16); ++ Adapter->mppriv.antenna_rx = (u16)(antenna & 0x0000FFFF); ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_antenna_bb_hdl: tx_ant=0x%04x rx_ant=0x%04x\n", ++ Adapter->mppriv.antenna_tx, Adapter->mppriv.antenna_rx)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetAntenna(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ } else { ++ antenna = (Adapter->mppriv.antenna_tx << 16)|Adapter->mppriv.antenna_rx; ++ *(u32*)poid_par_priv->information_buf = antenna; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 tx_pwr_idx; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_set_tx_power_control_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ tx_pwr_idx = *((u32*)poid_par_priv->information_buf); ++ if (tx_pwr_idx > MAX_TX_PWR_INDEX_N_MODE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Adapter->mppriv.txpoweridx = (u8)tx_pwr_idx; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_set_tx_power_control_hdl: idx=0x%2x\n", ++ Adapter->mppriv.txpoweridx)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetTxPower(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++//**************** oid_rtl_seg_81_80_20 section start **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid !=QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.tx_pktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_received_hdl.\n")); ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_pktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_alert_, ("recv_ok:%d \n",Adapter->mppriv.rx_pktcount)); ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_query_rx_packet_crc32_error_hdl.\n")); ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ *(ULONG*)poid_par_priv->information_buf = Adapter->mppriv.rx_crcerrpktcount; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ RT_TRACE(_module_mp_, _drv_alert_, ("recv_err:%d \n",Adapter->mppriv.rx_crcerrpktcount)); ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++ ++NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("===> oid_rt_pro_reset_tx_packet_sent_hdl.\n")); ++ Adapter->mppriv.tx_pktcount = 0; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ if (poid_par_priv->information_buf_len == sizeof(ULONG)) { ++ Adapter->mppriv.rx_pktcount = 0; ++ Adapter->mppriv.rx_crcerrpktcount = 0; ++ } else { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ResetPhyRxPktCount(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_received_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len != sizeof(ULONG)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktReceived(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-oid_rt_get_phy_rx_packet_received_hdl: recv_ok=%d\n", *(ULONG*)poid_par_priv->information_buf)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_get_phy_rx_packet_crc32_error_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ ++ if (poid_par_priv->information_buf_len != sizeof(ULONG)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ *(ULONG*)poid_par_priv->information_buf = GetPhyRxPktCRC32Error(Adapter); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_get_phy_rx_packet_crc32_error_hdl: recv_err=%d\n", *(ULONG*)poid_par_priv->information_buf)); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_80_20 section end **************** ++NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_continuous_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetContinuousTx(Adapter,(u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_8192C("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_carrier_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetSingleCarrierTx(Adapter, (u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_8192C("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_set_carrier_suppression_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetCarrierSuppressionTx(Adapter, (u8)bStartTest); ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &Adapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ DBG_8192C("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(Adapter); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u32 bStartTest; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_alert_, ("+oid_rt_pro_set_single_tone_tx_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ bStartTest = *((u32*)poid_par_priv->information_buf); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetSingleToneTx(Adapter,(u8)bStartTest); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv) ++{ ++ return 0; ++} ++ ++NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_TRIGGER_GPIO_0, 0); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//**************** oid_rtl_seg_81_80_00 section end **************** ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ PNDIS_802_11_SSID pssid; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = (u32)sizeof(NDIS_802_11_SSID); ++ *poid_par_priv->bytes_rw = 0; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pssid = (PNDIS_802_11_SSID)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (mp_start_joinbss(Adapter, pssid) == _FAIL) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = sizeof(NDIS_802_11_SSID); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ pRW_Reg RegRWStruct; ++ u32 offset, width; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_pro_read_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; ++ offset = RegRWStruct->offset; ++ width = RegRWStruct->width; ++ ++ if (offset > 0xFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ switch (width) { ++ case 1: ++ RegRWStruct->value = rtw_read8(Adapter, offset); ++ break; ++ case 2: ++ RegRWStruct->value = rtw_read16(Adapter, offset); ++ break; ++ default: ++ width = 4; ++ RegRWStruct->value = rtw_read32(Adapter, offset); ++ break; ++ } ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_read_register_hdl: offset:0x%04X value:0x%X\n", ++ offset, RegRWStruct->value)); ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = width; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ pRW_Reg RegRWStruct; ++ u32 offset, width, value; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER padapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("+oid_rt_pro_write_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RegRWStruct = (pRW_Reg)poid_par_priv->information_buf; ++ offset = RegRWStruct->offset; ++ width = RegRWStruct->width; ++ value = RegRWStruct->value; ++ ++ if (offset > 0xFFF) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ if (value > 0xFF) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ rtw_write8(padapter, offset, (u8)value); ++ break; ++ case 2: ++ if (value > 0xFFFF) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ rtw_write16(padapter, offset, (u16)value); ++ break; ++ case 4: ++ rtw_write32(padapter, offset, value); ++ break; ++ default: ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_write_register_hdl: offset=0x%08X width=%d value=0x%X\n", ++ offset, width, value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ pBurst_RW_Reg pBstRwReg; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_read_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ rtw_read_mem(Adapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); ++ _irqlevel_changed_(&oldirql,RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++#endif ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_read_register_hdl\n")); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ pBurst_RW_Reg pBstRwReg; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_burst_write_register_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ pBstRwReg = (pBurst_RW_Reg)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ rtw_write_mem(Adapter, pBstRwReg->offset, (u32)pBstRwReg->len, pBstRwReg->Data); ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_burst_write_register_hdl\n")); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++/* ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ ++ TX_CMD_Desc *TxCmd_Info; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+Set OID_RT_PRO_WRITE_TXCMD\n")); ++ ++ TxCmd_Info=(TX_CMD_Desc*)poid_par_priv->information_buf; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:Addr=%.8X\n", TxCmd_Info->offset)); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:1.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[0])); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:2.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[1])); ++ RT_TRACE(_module_mp_, _drv_info_, (("WRITE_TXCMD:3.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[2])); ++ RT_TRACE(_module_mp_, _drv_info_, ("WRITE_TXCMD:4.)%.8X\n", (ULONG)TxCmd_Info->TxCMD.value[3])); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ rtw_write32(Adapter, TxCmd_Info->offset + 0, (unsigned int)TxCmd_Info->TxCMD.value[0]); ++ rtw_write32(Adapter, TxCmd_Info->offset + 4, (unsigned int)TxCmd_Info->TxCMD.value[1]); ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++*/ ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-Set OID_RT_PRO_WRITE_TXCMD: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ pEEPROM_RWParam pEEPROM; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+Query OID_RT_PRO_READ16_EEPROM\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ pEEPROM->value = eeprom_read16(Adapter, (u16)(pEEPROM->offset >> 1)); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-Query OID_RT_PRO_READ16_EEPROM: offset=0x%x value=0x%x\n", ++ pEEPROM->offset, pEEPROM->value)); ++#endif ++_func_exit_; ++ ++ return status; ++} ++ ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ pEEPROM_RWParam pEEPROM; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_WRITE16_EEPROM\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ pEEPROM = (pEEPROM_RWParam)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ eeprom_write16(Adapter, (u16)(pEEPROM->offset >> 1), pEEPROM->value); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++#endif ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct mp_wiparam *pwi_param; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(struct mp_wiparam)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (Adapter->mppriv.workparam.bcompleted == _FALSE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pwi_param = (struct mp_wiparam *)poid_par_priv->information_buf; ++ ++ _rtw_memcpy(pwi_param, &Adapter->mppriv.workparam, sizeof(struct mp_wiparam)); ++ Adapter->mppriv.act_in_progress = _FALSE; ++// RT_TRACE(_module_mp_, _drv_info_, ("rf:%x\n", pwiparam->IoValue)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro8711_pkt_loss_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(uint)*2) { ++ RT_TRACE(_module_mp_, _drv_err_, ("-oid_rt_pro8711_pkt_loss_hdl: buf_len=%d\n", (int)poid_par_priv->information_buf_len)); ++ return NDIS_STATUS_INVALID_LENGTH; ++ } ++ ++ if (*(uint*)poid_par_priv->information_buf == 1)//init==1 ++ Adapter->mppriv.rx_pktloss = 0; ++ ++ *((uint*)poid_par_priv->information_buf+1) = Adapter->mppriv.rx_pktloss; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)( poid_par_priv->adapter_context); ++ struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#endif ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Query OID_RT_RD_ATTRIB_MEM\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++#ifdef CONFIG_SDIO_HCI ++ _irqlevel_changed_(&oldirql, LOWER); ++{ ++ u32 *plmem = (u32*)poid_par_priv->information_buf+2; ++ _attrib_read = pintfhdl->io_ops._attrib_read; ++ _attrib_read(pintfhdl, *((u32*)poid_par_priv->information_buf), ++ *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++} ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct io_queue *pio_queue = (struct io_queue *)Adapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++#ifdef CONFIG_SDIO_HCI ++ void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#endif ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++#ifdef CONFIG_SDIO_HCI ++ _irqlevel_changed_(&oldirql, LOWER); ++{ ++ u32 *plmem = (u32*)poid_par_priv->information_buf + 2; ++ _attrib_write = pintfhdl->io_ops._attrib_write; ++ _attrib_write(pintfhdl, *(u32*)poid_par_priv->information_buf, ++ *((u32*)poid_par_priv->information_buf+1), (u8*)plmem); ++} ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_RF_INTFS\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setrfintfs_cmd(Adapter, *(unsigned char*)poid_par_priv->information_buf) == _FAIL) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _rtw_memcpy(poid_par_priv->information_buf, (unsigned char*)&Adapter->mppriv.rxstat, sizeof(struct recv_stat)); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ PCFG_DBG_MSG_STRUCT pdbg_msg; ++ ++_func_enter_; ++ ++// RT_TRACE(0xffffffffff,_drv_alert_,("===> oid_rt_pro_cfg_debug_message_hdl.\n")); ++ ++#if 0//#ifdef CONFIG_DEBUG_RTL871X ++ ++ pdbg_msg = (PCFG_DBG_MSG_STRUCT)(poid_par_priv->information_buf); ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===>Set level :0x%08x, H32:0x%08x L32:0x%08x\n", ++ pdbg_msg->DebugLevel, pdbg_msg->DebugComponent_H32, pdbg_msg->DebugComponent_L32)); ++ ++ GlobalDebugLevel = pdbg_msg->DebugLevel; ++ GlobalDebugComponents = (pdbg_msg->DebugComponent_H32 << 32) | pdbg_msg->DebugComponent_L32; ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===> Set level :0x%08x, component:0x%016x\n", ++ GlobalDebugLevel, (u32)GlobalDebugComponents)); ++ } else { ++ pdbg_msg->DebugLevel = GlobalDebugLevel; ++ pdbg_msg->DebugComponent_H32 = (u32)(GlobalDebugComponents >> 32); ++ pdbg_msg->DebugComponent_L32 = (u32)GlobalDebugComponents; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(0xffffffffff, _drv_alert_, ++ ("===>Query level:0x%08x H32:0x%08x L32:0x%08x\n", ++ (u32)pdbg_msg->DebugLevel, (u32)pdbg_msg->DebugComponent_H32, (u32)pdbg_msg->DebugComponent_L32)); ++ } ++ ++#endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+OID_RT_PRO_SET_DATA_RATE_EX\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setdatarate_cmd(Adapter, poid_par_priv->information_buf) !=_SUCCESS) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ u8 thermal = 0; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_get_thermal_meter_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ GetThermalMeter(Adapter, &thermal); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *(u32*)poid_par_priv->information_buf = (u32)thermal; ++ *poid_par_priv->bytes_rw = sizeof(u32); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_read_tssi_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (Adapter->mppriv.act_in_progress == _TRUE) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ //init workparam ++ Adapter->mppriv.act_in_progress = _TRUE; ++ Adapter->mppriv.workparam.bcompleted = _FALSE; ++ Adapter->mppriv.workparam.act_type = MPT_READ_TSSI; ++ Adapter->mppriv.workparam.io_offset = 0; ++ Adapter->mppriv.workparam.io_value = 0xFFFFFFFF; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (!rtw_gettssi_cmd(Adapter,0, (u8*)&Adapter->mppriv.workparam.io_value)) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ ++_func_enter_; ++ ++// if (poid_par_priv->type_of_oid != SET_OID) ++// return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ u8 enable; ++ ++ enable = *(u8*)poid_par_priv->information_buf; ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_set_power_tracking_hdl: enable=%d\n", enable)); ++ ++ SetPowerTracking(Adapter, enable); ++ } else { ++ GetPowerTracking(Adapter, (u8*)poid_par_priv->information_buf); ++ } ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//----------------------------------------------------------------------------- ++NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ u32 ratevalue; ++ u8 datarates[NumRates]; ++ int i; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+OID_RT_PRO_SET_BASIC_RATE\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++#if 0 ++ ratevalue = *((u32*)poid_par_priv->information_buf); ++ ++ for (i = 0; i < NumRates; i++) { ++ if (ratevalue == mpdatarate[i]) ++ datarates[i] = mpdatarate[i]; ++ else ++ datarates[i] = 0xff; ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_info_, ("basicrate_inx=%d\n", datarates[i])); ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (rtw_setbasicrate_cmd(Adapter, datarates) != _SUCCESS) ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-OID_RT_PRO_SET_BASIC_RATE: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < 8) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ *poid_par_priv->bytes_rw = 8; ++ _rtw_memcpy(poid_par_priv->information_buf, &(Adapter->pwrctrlpriv.pwr_mode), 8); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_qry_pwrstate_hdl: pwr_mode=%d smart_ps=%d\n", ++ Adapter->pwrctrlpriv.pwr_mode, Adapter->pwrctrlpriv.smart_ps)); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ uint pwr_mode, smart_ps; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Set OID_RT_PRO_SET_PWRSTATE\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_rw = 0; ++ *poid_par_priv->bytes_needed = 8; ++ ++ if (poid_par_priv->information_buf_len < 8) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pwr_mode = *(uint *)(poid_par_priv->information_buf); ++ smart_ps = *(uint *)((int)poid_par_priv->information_buf + 4); ++ ++ *poid_par_priv->bytes_rw = 8; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct setratable_parm *prate_table; ++ u8 res; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = sizeof(struct setratable_parm); ++ if (poid_par_priv->information_buf_len < sizeof(struct setratable_parm)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ prate_table = (struct setratable_parm*)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ res = rtw_setrttbl_cmd(Adapter, prate_table); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ if (res == _FAIL) ++ status = NDIS_STATUS_FAILURE; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ #if 0 ++ struct mp_wi_cntx *pmp_wi_cntx=&(Adapter->mppriv.wi_cntx); ++ u8 res=_SUCCESS; ++ DEBUG_INFO(("===> Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); ++ ++ if(pmp_wi_cntx->bmp_wi_progress ==_TRUE){ ++ DEBUG_ERR(("\n mp workitem is progressing, not allow to set another workitem right now!!!\n")); ++ Status = NDIS_STATUS_NOT_ACCEPTED; ++ break; ++ } ++ else{ ++ pmp_wi_cntx->bmp_wi_progress=_TRUE; ++ pmp_wi_cntx->param.bcompleted=_FALSE; ++ pmp_wi_cntx->param.act_type=MPT_GET_RATE_TABLE; ++ pmp_wi_cntx->param.io_offset=0x0; ++ pmp_wi_cntx->param.bytes_cnt=sizeof(struct getratable_rsp); ++ pmp_wi_cntx->param.io_value=0xffffffff; ++ ++ res=rtw_getrttbl_cmd(Adapter,(struct getratable_rsp *)pmp_wi_cntx->param.data); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ if(res != _SUCCESS) ++ { ++ Status = NDIS_STATUS_NOT_ACCEPTED; ++ } ++ } ++ DEBUG_INFO(("\n <=== Set OID_RT_PRO_H2C_GET_RATE_TABLE.\n")); ++ #endif ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++//**************** oid_rtl_seg_87_12_00 section start **************** ++NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ struct security_priv *psecuritypriv = &Adapter->securitypriv; ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ ENCRY_CTRL_STATE encry_mode; ++ ++ ++ *poid_par_priv->bytes_needed = sizeof(u8); ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ if (poid_par_priv->type_of_oid == SET_OID) ++ { ++ encry_mode = *((u8*)poid_par_priv->information_buf); ++ switch (encry_mode) ++ { ++ case HW_CONTROL: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_FALSE; ++ Adapter->registrypriv.software_encrypt=_FALSE; ++ #else ++ psecuritypriv->sw_decrypt = _FALSE; ++ psecuritypriv->sw_encrypt = _FALSE; ++ #endif ++ break; ++ case SW_CONTROL: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_TRUE; ++ Adapter->registrypriv.software_encrypt=_TRUE; ++ #else ++ psecuritypriv->sw_decrypt = _TRUE; ++ psecuritypriv->sw_encrypt = _TRUE; ++ #endif ++ break; ++ case HW_ENCRY_SW_DECRY: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_TRUE; ++ Adapter->registrypriv.software_encrypt=_FALSE; ++ #else ++ psecuritypriv->sw_decrypt = _TRUE; ++ psecuritypriv->sw_encrypt = _FALSE; ++ #endif ++ break; ++ case SW_ENCRY_HW_DECRY: ++ #if 0 ++ Adapter->registrypriv.software_decrypt=_FALSE; ++ Adapter->registrypriv.software_encrypt=_TRUE; ++ #else ++ psecuritypriv->sw_decrypt = _FALSE; ++ psecuritypriv->sw_encrypt = _TRUE; ++ #endif ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_notice_, ++ ("-oid_rt_pro_encryption_ctrl_hdl: SET encry_mode=0x%x sw_encrypt=0x%x sw_decrypt=0x%x\n", ++ encry_mode, psecuritypriv->sw_encrypt, psecuritypriv->sw_decrypt)); ++ } ++ else { ++ #if 0 ++ if (Adapter->registrypriv.software_encrypt == _FALSE) { ++ if (Adapter->registrypriv.software_decrypt == _FALSE) ++ encry_mode = HW_CONTROL; ++ else ++ encry_mode = HW_ENCRY_SW_DECRY; ++ } ++ else { ++ if (Adapter->registrypriv.software_decrypt == _FALSE) ++ encry_mode = SW_ENCRY_HW_DECRY; ++ else ++ encry_mode = SW_CONTROL; ++ } ++ #else ++ ++ if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _FALSE)) ++ encry_mode = HW_CONTROL; ++ else if ((psecuritypriv->sw_encrypt == _FALSE) && (psecuritypriv->sw_decrypt == _TRUE)) ++ encry_mode = HW_ENCRY_SW_DECRY; ++ else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _FALSE)) ++ encry_mode = SW_ENCRY_HW_DECRY; ++ else if ((psecuritypriv->sw_encrypt == _TRUE) && (psecuritypriv->sw_decrypt == _TRUE)) ++ encry_mode = SW_CONTROL; ++ ++ #endif ++ ++ *(u8*)poid_par_priv->information_buf = encry_mode; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_encryption_ctrl_hdl: QUERY encry_mode=0x%x\n", ++ encry_mode)); ++ } ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct sta_info *psta = NULL; ++ UCHAR *macaddr; ++ ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = ETH_ALEN; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ macaddr = (UCHAR *) poid_par_priv->information_buf ; ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ++ ("OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); ++ ++ if (psta == NULL) { // the sta have been in sta_info_queue => do nothing ++ psta = rtw_alloc_stainfo(&Adapter->stapriv, macaddr); ++ ++ if (psta == NULL) { ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("Can't alloc sta_info when OID_RT_PRO_ADD_STA_INFO\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } else { //(between drv has received this event before and fw have not yet to set key to CAM_ENTRY) ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_err_, ++ ("Error: OID_RT_PRO_ADD_STA_INFO: sta has been in sta_hash_queue \n")); ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL irqL; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct sta_info *psta = NULL; ++ UCHAR *macaddr; ++ ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = ETH_ALEN; ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ macaddr = (UCHAR *) poid_par_priv->information_buf ; ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_notice_, ++ ("+OID_RT_PRO_ADD_STA_INFO: addr="MAC_FMT"\n", MAC_ARG(macaddr) )); ++ ++ psta = rtw_get_stainfo(&Adapter->stapriv, macaddr); ++ if (psta != NULL) { ++ _enter_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); ++ rtw_free_stainfo(Adapter, psta); ++ _exit_critical(&(Adapter->stapriv.sta_hash_lock), &irqL); ++ } ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++#include ++u32 mp_query_drv_var(_adapter *padapter, u8 offset, u32 var) ++{ ++#if 0 ++#ifdef CONFIG_SDIO_HCI ++ ++ if (offset == 1) { ++ u16 tmp_blk_num; ++ tmp_blk_num = rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM); ++ RT_TRACE(_module_mp_, _drv_err_, ("Query Information, mp_query_drv_var SDIO_RX0_RDYBLK_NUM=0x%x padapter->dvobjpriv.rxblknum=0x%x\n", tmp_blk_num, padapter->dvobjpriv.rxblknum)); ++ if (padapter->dvobjpriv.rxblknum != tmp_blk_num) { ++ RT_TRACE(_module_mp_,_drv_err_, ("Query Information, mp_query_drv_var call recv rx\n")); ++ // sd_recv_rxfifo(padapter); ++ } ++ } ++ ++#if 0 ++ if(offset <=100){ //For setting data rate and query data rate ++ if(offset==100){ //For query data rate ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): query rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); ++ var=padapter->registrypriv.tx_rate; ++ ++ } ++ else if(offset<0x1d){ //For setting data rate ++ padapter->registrypriv.tx_rate=offset; ++ var=padapter->registrypriv.tx_rate; ++ padapter->registrypriv.use_rate=_TRUE; ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d): set rate=0x%.2x \n",offset,padapter->registrypriv.tx_rate)); ++ } ++ else{ //not use the data rate ++ padapter->registrypriv.use_rate=_FALSE; ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) out of rate range\n",offset)); ++ } ++ } ++ else if (offset<=110){ //for setting debug level ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d) for set debug level\n",offset)); ++ if(offset==110){ //For query data rate ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): query dbg level=0x%.2x \n",offset,padapter->registrypriv.dbg_level)); ++ padapter->registrypriv.dbg_level=GlobalDebugLevel; ++ var=padapter->registrypriv.dbg_level; ++ } ++ else if(offset<110 && offset>100){ ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var: offset(%d): set dbg level=0x%.2x \n",offset,offset-100)); ++ padapter->registrypriv.dbg_level=GlobalDebugLevel=offset-100; ++ var=padapter->registrypriv.dbg_level; ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_alert_, (" mp_query_drv_var(_drv_alert_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_crit_, (" mp_query_drv_var(_drv_crit_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_err_, (" mp_query_drv_var(_drv_err_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_warning_, (" mp_query_drv_var(_drv_warning_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_notice_, (" mp_query_drv_var(_drv_notice_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_info_, (" mp_query_drv_var(_drv_info_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ RT_TRACE(_module_mp_, _drv_debug_, (" mp_query_drv_var(_drv_debug_): offset(%d): set dbg level=0x%.2x \n",offset,GlobalDebugLevel)); ++ ++ } ++ } ++ else if(offset >110 &&offset <116){ ++ if(115==offset){ ++ RT_TRACE(_module_mp_, _drv_emerg_, (" mp_query_drv_var(_drv_emerg_): offset(%d): query TRX access type: [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode)); ++ } ++ else { ++ switch(offset){ ++ case 111: ++ padapter->dvobjpriv.tx_block_mode=1; ++ padapter->dvobjpriv.rx_block_mode=1; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode)); ++ break; ++ case 112: ++ padapter->dvobjpriv.tx_block_mode=1; ++ padapter->dvobjpriv.rx_block_mode=0; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX block/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode)); ++ break; ++ case 113: ++ padapter->dvobjpriv.tx_block_mode=0; ++ padapter->dvobjpriv.rx_block_mode=1; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX block) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode)); ++ break; ++ case 114: ++ padapter->dvobjpriv.tx_block_mode=0; ++ padapter->dvobjpriv.rx_block_mode=0; ++ RT_TRACE(_module_mp_, _drv_emerg_, \ ++ (" mp_query_drv_var(_drv_emerg_): offset(%d): SET TRX access type:(TX byte/RX byte) [tx_block_mode=%x,rx_block_mode=%x]\n",\ ++ offset,padapter->dvobjpriv.tx_block_mode,padapter->dvobjpriv.rx_block_mode)); ++ break; ++ default : ++ break; ++ ++ } ++ ++ } ++ ++ } ++ else if(offset>=127){ ++ u64 prnt_dbg_comp; ++ u8 chg_idx; ++ u64 tmp_dbg_comp; ++ chg_idx=offset-0x80; ++ tmp_dbg_comp=BIT(chg_idx); ++ prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; ++ RT_TRACE(_module_mp_, _drv_emerg_, (" 1: mp_query_drv_var: offset(%d;0x%x):for dbg conpoment prnt_dbg_comp=0x%.16x GlobalDebugComponents=0x%.16x padapter->registrypriv.dbg_component=0x%.16x\n",offset,offset,prnt_dbg_comp,GlobalDebugComponents,padapter->registrypriv.dbg_component)); ++ if(offset==127){ ++ // prnt_dbg_comp=padapter->registrypriv.dbg_component= GlobalDebugComponents; ++ var=(u32)(padapter->registrypriv.dbg_component); ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) \n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("2-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ ++ } ++ else{ ++ RT_TRACE(0xffffffff, _drv_emerg_, ("3: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_,("3-1: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h) chg_idx=%d\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp,chg_idx));// ("3-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment=0x%x chg_idx=%d or0x%x BIT(chg_idx[%d]=0x%x)\n",offset,offset,prnt_dbg_comp,chg_idx,chg_idx,(chg_idx),tmp_dbg_comp) ++ prnt_dbg_comp=GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("3-2: mp_query_drv_var: offset(%d;0x%x):for query dbg conpoment=0x%x(l) 0x%x(h) GlobalDebugComponents=0x%x(l) 0x%x(h)\n",offset,offset,padapter->registrypriv.dbg_component,prnt_dbg_comp)); ++ ++ if(GlobalDebugComponents&tmp_dbg_comp){ ++ //this bit is already set, now clear it ++ GlobalDebugComponents=GlobalDebugComponents&(~tmp_dbg_comp); ++ } ++ else{ ++ //this bit is not set, now set it. ++ GlobalDebugComponents =GlobalDebugComponents|tmp_dbg_comp; ++ } ++ RT_TRACE(0xffffffff, _drv_emerg_, ("4: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); ++ prnt_dbg_comp=GlobalDebugComponents; ++ RT_TRACE(0xffffffff, _drv_emerg_, ("4-1: mp_query_drv_var: offset(%d;0x%x):before set dbg conpoment tmp_dbg_comp=0x%x GlobalDebugComponents=0x%x(l) 0x%x(h)",offset,offset,tmp_dbg_comp,prnt_dbg_comp)); ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_emerg_, ("0: mp_query_drv_var(_module_rtl871x_xmit_c_:0): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,prnt_dbg_comp)); ++ RT_TRACE(_module_xmit_osdep_c_, _drv_emerg_, ("1: mp_query_drv_var(_module_xmit_osdep_c_:1): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_emerg_, ("2: mp_query_drv_var(_module_rtl871x_recv_c_:2): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_recv_osdep_c_, _drv_emerg_, ("3: mp_query_drv_var(_module_recv_osdep_c_:3): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_emerg_, ("4: mp_query_drv_var(_module_rtl871x_mlme_c_:4): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_mlme_osdep_c_, _drv_emerg_, (" 5:mp_query_drv_var(_module_mlme_osdep_c_:5): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_emerg_, ("6: mp_query_drv_var(_module_rtl871x_sta_mgt_c_:6): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_cmd_c_, _drv_emerg_, ("7: mp_query_drv_var(_module_rtl871x_cmd_c_:7): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_cmd_osdep_c_, _drv_emerg_, ("8: mp_query_drv_var(_module_cmd_osdep_c_:8): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_io_c_, _drv_emerg_, ("9: mp_query_drv_var(_module_rtl871x_io_c_:9): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_io_osdep_c_, _drv_emerg_, ("10: mp_query_drv_var(_module_io_osdep_c_:10): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_os_intfs_c_, _drv_emerg_, ("11: mp_query_drv_var(_module_os_intfs_c_:11): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_security_c_, _drv_emerg_, ("12: mp_query_drv_var(_module_rtl871x_security_c_:12): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_eeprom_c_, _drv_emerg_, ("13: mp_query_drv_var(_module_rtl871x_eeprom_c_:13): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hal_init_c_, _drv_emerg_, ("14: mp_query_drv_var(_module_hal_init_c_:14): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_hal_init_c_, _drv_emerg_, ("15: mp_query_drv_var(_module_hci_hal_init_c_:15): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_c_, _drv_emerg_, ("16: mp_query_drv_var(_module_rtl871x_ioctl_c_:16): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_set_c_, _drv_emerg_, ("17: mp_query_drv_var(_module_rtl871x_ioctl_set_c_:17): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_emerg_, ("18: mp_query_drv_var(_module_rtl871x_ioctl_query_c_:18): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_, _drv_emerg_, ("19: mp_query_drv_var(_module_rtl871x_pwrctrl_c_:19): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("20: mp_query_drv_var(_module_hci_intfs_c_:20): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("21: mp_query_drv_var(_module_hci_ops_c_:21): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_osdep_service_c_, _drv_emerg_, ("22: mp_query_drv_var(_module_osdep_service_c_:22): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_mp_, _drv_emerg_, ("23: mp_query_drv_var(_module_mp_:23): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ("24: mp_query_drv_var(_module_hci_ops_os_c_:24): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ var=(u32)(GlobalDebugComponents); ++ //GlobalDebugComponents=padapter->registrypriv.dbg_component; ++ RT_TRACE(0xffffffff, _drv_emerg_, (" ==mp_query_drv_var(_module_mp_): offset(%d;0x%x):before set dbg conpoment=0x%x(l) 0x%x(h)\n",offset,offset,GlobalDebugComponents)); ++ ++ } ++ } ++ else{ ++ RT_TRACE(_module_mp_, _drv_emerg_, ("\n mp_query_drv_var: offset(%d) >110\n",offset)); ++ } ++#endif ++#endif ++ ++ return var; ++#else ++ return 0; ++#endif ++} ++ ++NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ DR_VARIABLE_STRUCT *pdrv_var; ++ ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ *poid_par_priv->bytes_needed = sizeof(DR_VARIABLE_STRUCT); ++ if (poid_par_priv->information_buf_len < *poid_par_priv->bytes_needed) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+Query Information, OID_RT_PRO_QUERY_DR_VARIABLE\n")); ++ ++ pdrv_var = (struct _DR_VARIABLE_STRUCT_ *)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ pdrv_var->variable = mp_query_drv_var(Adapter, pdrv_var->offset, pdrv_var->variable); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-oid_rt_pro_query_dr_variable_hdl: offset=0x%x valule=0x%x\n", ++ pdrv_var->offset, pdrv_var->variable)); ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ RT_TRACE(_module_mp_, _drv_err_, ("oid_rt_pro_rx_packet_type_hdl...................\n")); ++#if 0 ++ ++ if (poid_par_priv->information_buf_len < sizeof (UCHAR)) { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ *poid_par_priv->bytes_needed = sizeof(UCHAR); ++ return status; ++ } ++ ++ if (poid_par_priv->type_of_oid == SET_OID) { ++ Adapter->mppriv.rx_with_status = *(UCHAR *) poid_par_priv->information_buf; ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n",\ ++ Adapter->mppriv.rx_with_status)); ++ ++ //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); ++ //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ ++ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); ++ ++ } ++ else { ++ *(UCHAR *) poid_par_priv->information_buf = Adapter->mppriv.rx_with_status; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_, ("Query Information, OID_RT_PRO_RX_PACKET_TYPE:%d \n", \ ++ Adapter->mppriv.rx_with_status)); ++ ++ //*(u32 *)&Adapter->eeprompriv.mac_addr[0]=rtw_read32(Adapter, 0x10250050); ++ //*(u16 *)&Adapter->eeprompriv.mac_addr[4]=rtw_read16(Adapter, 0x10250054); ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_err_,("MAC addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ Adapter->eeprompriv.mac_addr[0],Adapter->eeprompriv.mac_addr[1],Adapter->eeprompriv.mac_addr[2],\ ++ Adapter->eeprompriv.mac_addr[3],Adapter->eeprompriv.mac_addr[4],Adapter->eeprompriv.mac_addr[5])); ++ } ++#endif ++ ++ return NDIS_STATUS_SUCCESS; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ PEFUSE_ACCESS_STRUCT pefuse; ++ u8 *data; ++ u16 addr = 0, cnts = 0, max_available_size = 0; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(EFUSE_ACCESS_STRUCT)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; ++ addr = pefuse->start_addr; ++ cnts = pefuse->cnts; ++ data = pefuse->data; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_read_efuse_hd: buf_len=%ld addr=%d cnts=%d\n", ++ poid_par_priv->information_buf_len, addr, cnts)); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: parameter error!\n")); ++ return NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (rtw_efuse_access(Adapter, _FALSE, addr, cnts, data) == _FAIL) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_read_efuse_hdl: rtw_efuse_access FAIL!\n")); ++ status = NDIS_STATUS_FAILURE; ++ } else ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ ++ _irqL oldirql; ++ PEFUSE_ACCESS_STRUCT pefuse; ++ u8 *data; ++ u16 addr = 0, cnts = 0, max_available_size = 0; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ pefuse = (PEFUSE_ACCESS_STRUCT)poid_par_priv->information_buf; ++ addr = pefuse->start_addr; ++ cnts = pefuse->cnts; ++ data = pefuse->data; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("+oid_rt_pro_write_efuse_hdl: buf_len=%ld addr=0x%04x cnts=%d\n", ++ poid_par_priv->information_buf_len, addr, cnts)); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ RT_TRACE(_module_mp_, _drv_err_, ("!oid_rt_pro_write_efuse_hdl: parameter error")); ++ return NDIS_STATUS_NOT_ACCEPTED; ++ } ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ if (rtw_efuse_access(Adapter, _TRUE, addr, cnts, data) == _FAIL) ++ status = NDIS_STATUS_FAILURE; ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ PPGPKT_STRUCT ppgpkt; ++ u8 tmpidx; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++// RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_rw_efuse_pgpkt_hdl\n")); ++ ++ *poid_par_priv->bytes_rw = 0; ++ ++ if (poid_par_priv->information_buf_len < sizeof(PGPKT_STRUCT)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ ppgpkt = (PPGPKT_STRUCT)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ { ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_rw_efuse_pgpkt_hdl: Read offset=0x%x\n",\ ++ ppgpkt->offset)); ++ ++ Efuse_PowerSwitch(Adapter, _FALSE, _TRUE); ++ if (Efuse_PgPacketRead(Adapter, ppgpkt->offset, ppgpkt->data, _FALSE) == _TRUE) ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ else ++ status = NDIS_STATUS_FAILURE; ++ Efuse_PowerSwitch(Adapter, _FALSE, _FALSE); ++ } else { ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("oid_rt_pro_rw_efuse_pgpkt_hdl: Write offset=0x%x word_en=0x%x\n",\ ++ ppgpkt->offset, ppgpkt->word_en)); ++ ++ Efuse_PowerSwitch(Adapter, _TRUE, _TRUE); ++ if (Efuse_PgPacketWrite(Adapter, ppgpkt->offset, ppgpkt->word_en, ppgpkt->data, _FALSE) == _TRUE) ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ else ++ status = NDIS_STATUS_FAILURE; ++ Efuse_PowerSwitch(Adapter, _TRUE, _FALSE); ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_rw_efuse_pgpkt_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u16 size; ++ u8 ret; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf = size; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ } else ++ status = NDIS_STATUS_FAILURE; ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ u16 max_size; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ *(u32*)poid_par_priv->information_buf = efuse_GetMaxSize(Adapter); ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_get_efuse_max_size_hdl: size=%d status=0x%08X\n", ++ *(int*)poid_par_priv->information_buf, status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("+oid_rt_pro_efuse_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ status = oid_rt_pro_read_efuse_hdl(poid_par_priv); ++ else ++ status = oid_rt_pro_write_efuse_hdl(poid_par_priv); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("-oid_rt_pro_efuse_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ _irqL oldirql; ++ u8 *data; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ u16 mapLen=0; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_pro_efuse_map_hdl\n")); ++ ++ EFUSE_GetEfuseDefinition(Adapter, EFUSE_WIFI, TYPE_EFUSE_MAP_LEN, (PVOID)&mapLen, _FALSE); ++ ++ *poid_par_priv->bytes_rw = 0; ++ ++ if (poid_par_priv->information_buf_len < mapLen) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ data = (u8*)poid_par_priv->information_buf; ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) ++ { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_efuse_map_hdl: READ\n")); ++ ++ if (rtw_efuse_map_read(Adapter, 0, mapLen, data) == _SUCCESS) ++ *poid_par_priv->bytes_rw = mapLen; ++ else { ++ RT_TRACE(_module_mp_, _drv_err_, ++ ("oid_rt_pro_efuse_map_hdl: READ fail\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } else { ++ // SET_OID ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_efuse_map_hdl: WRITE\n")); ++ ++ if (rtw_efuse_map_write(Adapter, 0, mapLen, data) == _SUCCESS) ++ *poid_par_priv->bytes_rw = mapLen; ++ else { ++ RT_TRACE(_module_mp_, _drv_err_, ++ ("oid_rt_pro_efuse_map_hdl: WRITE fail\n")); ++ status = NDIS_STATUS_FAILURE; ++ } ++ } ++ ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("-oid_rt_pro_efuse_map_hdl: status=0x%08X\n", status)); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ ++ u32 crystal_cap = 0; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf);//4 ++ if (crystal_cap > 0xf) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ Adapter->mppriv.curr_crystalcap = crystal_cap; ++ ++ _irqlevel_changed_(&oldirql,LOWER); ++ SetCrystalCap(Adapter); ++ _irqlevel_changed_(&oldirql,RAISE); ++ ++_func_exit_; ++ ++#endif ++ return status; ++} ++ ++NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ _irqL oldirql; ++ u8 rx_pkt_type; ++ u32 rcr_val32; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+oid_rt_set_rx_packet_type_hdl\n")); ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u8)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ rx_pkt_type = *((u8*)poid_par_priv->information_buf);//4 ++ ++ RT_TRACE(_module_mp_, _drv_info_, ("rx_pkt_type: %x\n",rx_pkt_type )); ++#if 0 ++ _irqlevel_changed_(&oldirql, LOWER); ++#if 0 ++ rcr_val8 = rtw_read8(Adapter, 0x10250048);//RCR ++ rcr_val8 &= ~(RCR_AB|RCR_AM|RCR_APM|RCR_AAP); ++ ++ if(rx_pkt_type == RX_PKT_BROADCAST){ ++ rcr_val8 |= (RCR_AB | RCR_ACRC32 ); ++ } ++ else if(rx_pkt_type == RX_PKT_DEST_ADDR){ ++ rcr_val8 |= (RCR_AAP| RCR_AM |RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_PHY_MATCH){ ++ rcr_val8 |= (RCR_APM|RCR_ACRC32); ++ } ++ else{ ++ rcr_val8 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ } ++ rtw_write8(Adapter, 0x10250048,rcr_val8); ++#else ++ rcr_val32 = rtw_read32(Adapter, RCR);//RCR = 0x10250048 ++ rcr_val32 &= ~(RCR_CBSSID|RCR_AB|RCR_AM|RCR_APM|RCR_AAP); ++#if 0 ++ if(rx_pkt_type == RX_PKT_BROADCAST){ ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_DEST_ADDR){ ++ //rcr_val32 |= (RCR_CBSSID|RCR_AAP|RCR_AM|RCR_ACRC32); ++ rcr_val32 |= (RCR_CBSSID|RCR_APM|RCR_ACRC32); ++ } ++ else if(rx_pkt_type == RX_PKT_PHY_MATCH){ ++ rcr_val32 |= (RCR_APM|RCR_ACRC32); ++ //rcr_val32 |= (RCR_AAP|RCR_ACRC32); ++ } ++ else{ ++ rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ } ++#else ++ switch (rx_pkt_type) ++ { ++ case RX_PKT_BROADCAST : ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ break; ++ case RX_PKT_DEST_ADDR : ++ rcr_val32 |= (RCR_AB|RCR_AM|RCR_APM|RCR_AAP|RCR_ACRC32); ++ break; ++ case RX_PKT_PHY_MATCH: ++ rcr_val32 |= (RCR_APM|RCR_ACRC32); ++ break; ++ default: ++ rcr_val32 &= ~(RCR_AAP|RCR_APM|RCR_AM|RCR_AB|RCR_ACRC32); ++ break; ++ } ++ ++ if (rx_pkt_type == RX_PKT_DEST_ADDR) { ++ Adapter->mppriv.check_mp_pkt = 1; ++ } else { ++ Adapter->mppriv.check_mp_pkt = 0; ++ } ++#endif ++ rtw_write32(Adapter, RCR, rcr_val32); ++ ++#endif ++ _irqlevel_changed_(&oldirql, RAISE); ++#endif ++_func_exit_; ++ ++ return status; ++} ++ ++NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ _irqL oldirql; ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ u32 txagc; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len < sizeof(u32)) ++ return NDIS_STATUS_INVALID_LENGTH; ++ ++ txagc = *(u32*)poid_par_priv->information_buf; ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("oid_rt_pro_set_tx_agc_offset_hdl: 0x%08x\n", txagc)); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ SetTxAGCOffset(Adapter, txagc); ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ struct mp_priv *pmppriv = &Adapter->mppriv; ++ u32 type; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) ++ return NDIS_STATUS_NOT_ACCEPTED; ++ ++ if (poid_par_priv->information_buf_len information_buf; ++ ++ if (_LOOPBOOK_MODE_ == type) { ++ pmppriv->mode = type; ++ set_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE); //append txdesc ++ RT_TRACE(_module_mp_, _drv_info_, ("test mode change to loopback mode:0x%08x.\n", get_fwstate(pmlmepriv))); ++ } else if (_2MAC_MODE_ == type){ ++ pmppriv->mode = type; ++ _clr_fwstate_(pmlmepriv, WIFI_MP_LPBK_STATE); ++ RT_TRACE(_module_mp_, _drv_info_, ("test mode change to 2mac mode:0x%08x.\n", get_fwstate(pmlmepriv))); ++ } else ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ ++unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PMP_XMIT_PARM pparm; ++ PADAPTER padapter; ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("+%s\n", __func__)); ++ ++ pparm = (PMP_XMIT_PARM)poid_par_priv->information_buf; ++ padapter = (PADAPTER)poid_par_priv->adapter_context; ++ pmp_priv = &padapter->mppriv; ++ ++ if (poid_par_priv->type_of_oid == QUERY_OID) { ++ pparm->enable = !pmp_priv->tx.stop; ++ pparm->count = pmp_priv->tx.sended; ++ } else { ++ if (pparm->enable == 0) { ++ pmp_priv->tx.stop = 1; ++ } else if (pmp_priv->tx.stop == 1) { ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = pparm->count; ++ pmp_priv->tx.payload = pparm->payload_type; ++ pattrib = &pmp_priv->tx.attrib; ++ pattrib->pktlen = pparm->length; ++ _rtw_memcpy(pattrib->dst, pparm->da, ETH_ALEN); ++ SetPacketTx(padapter); ++ } else ++ return NDIS_STATUS_FAILURE; ++ } ++ ++ return NDIS_STATUS_SUCCESS; ++} ++ ++#if 0 ++unsigned int mp_ioctl_xmit_packet_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ unsigned char *pframe, *pmp_pkt; ++ struct ethhdr *pethhdr; ++ struct pkt_attrib *pattrib; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ int llc_sz, payload_len; ++ struct mp_xmit_frame *pxframe= NULL; ++ struct mp_xmit_packet *pmp_xmitpkt = (struct mp_xmit_packet*)param; ++ u8 addr3[] = {0x02, 0xE0, 0x4C, 0x87, 0x66, 0x55}; ++ ++// DBG_8192C("+mp_ioctl_xmit_packet_hdl\n"); ++ ++ pxframe = alloc_mp_xmitframe(&padapter->mppriv); ++ if (pxframe == NULL) ++ { ++ DEBUG_ERR(("Can't alloc pmpframe %d:%s\n", __LINE__, __FILE__)); ++ return -1; ++ } ++ ++ //mp_xmit_pkt ++ payload_len = pmp_xmitpkt->len - 14; ++ pmp_pkt = (unsigned char*)pmp_xmitpkt->mem; ++ pethhdr = (struct ethhdr *)pmp_pkt; ++ ++ //DBG_8192C("payload_len=%d, pkt_mem=0x%x\n", pmp_xmitpkt->len, (void*)pmp_xmitpkt->mem); ++ ++ //DBG_8192C("pxframe=0x%x\n", (void*)pxframe); ++ //DBG_8192C("pxframe->mem=0x%x\n", (void*)pxframe->mem); ++ ++ //update attribute ++ pattrib = &pxframe->attrib; ++ memset((u8 *)(pattrib), 0, sizeof (struct pkt_attrib)); ++ pattrib->pktlen = pmp_xmitpkt->len; ++ pattrib->ether_type = ntohs(pethhdr->h_proto); ++ pattrib->hdrlen = 24; ++ pattrib->nr_frags = 1; ++ pattrib->priority = 0; ++#ifndef CONFIG_MP_LINUX ++ if(IS_MCAST(pethhdr->h_dest)) ++ pattrib->mac_id = 4; ++ else ++ pattrib->mac_id = 5; ++#else ++ pattrib->mac_id = 5; ++#endif ++ ++ // ++ memset(pxframe->mem, 0 , WLANHDR_OFFSET); ++ pframe = (u8 *)(pxframe->mem) + WLANHDR_OFFSET; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ SetFrameSubType(pframe, WIFI_DATA); ++ ++ _rtw_memcpy(pwlanhdr->addr1, pethhdr->h_dest, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pethhdr->h_source, ETH_ALEN); ++ ++ _rtw_memcpy(pwlanhdr->addr3, addr3, ETH_ALEN); ++ ++ pwlanhdr->seq_ctl = 0; ++ pframe += pattrib->hdrlen; ++ ++ llc_sz= rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ ++ _rtw_memcpy(pframe, (void*)(pmp_pkt+14), payload_len); ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + llc_sz + payload_len; ++ ++ DEBUG_INFO(("issuing mp_xmit_frame, tx_len=%d, ether_type=0x%x\n", pattrib->last_txcmdsz, pattrib->ether_type)); ++ xmit_mp_frame(padapter, pxframe); ++ ++ return _SUCCESS; ++} ++#endif ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv *poid_par_priv) ++{ ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ _irqL oldirql; ++ u8 bpwrup; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != SET_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("\n ===> Setoid_rt_set_power_down_hdl.\n")); ++ ++ _irqlevel_changed_(&oldirql, LOWER); ++ ++ bpwrup = *(u8 *)poid_par_priv->information_buf; ++ //CALL the power_down function ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_SDIO_HCI ++ dev_power_down(Adapter,bpwrup); ++#endif ++#endif ++ _irqlevel_changed_(&oldirql, RAISE); ++ ++ //DEBUG_ERR(("\n <=== Query OID_RT_PRO_READ_REGISTER. ++ // Add:0x%08x Width:%d Value:0x%08x\n",RegRWStruct->offset,RegRWStruct->width,RegRWStruct->value)); ++ ++_func_exit_; ++ ++ return status; ++} ++//------------------------------------------------------------------------------ ++NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv *poid_par_priv) ++{ ++#if 0 ++ NDIS_STATUS status = NDIS_STATUS_SUCCESS; ++ PADAPTER Adapter = (PADAPTER)(poid_par_priv->adapter_context); ++// _irqL oldirql; ++ ++_func_enter_; ++ ++ if (poid_par_priv->type_of_oid != QUERY_OID) { ++ status = NDIS_STATUS_NOT_ACCEPTED; ++ return status; ++ } ++ if (poid_par_priv->information_buf_len < sizeof(u32)) { ++ status = NDIS_STATUS_INVALID_LENGTH; ++ return status; ++ } ++ ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("\n ===> oid_rt_get_power_mode_hdl.\n")); ++ ++// _irqlevel_changed_(&oldirql, LOWER); ++ *(int*)poid_par_priv->information_buf = Adapter->registrypriv.low_power ? POWER_LOW : POWER_NORMAL; ++ *poid_par_priv->bytes_rw = poid_par_priv->information_buf_len; ++// _irqlevel_changed_(&oldirql, RAISE); ++ ++_func_exit_; ++ ++ return status; ++#else ++ return 0; ++#endif ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_p2p.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,3498 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTW_P2P_C_ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_P2P ++ ++int is_any_client_associated( _adapter *padapter ) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int intFound = _FALSE; ++ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ if ( rtw_end_of_queue_search(phead, plist) == _TRUE ) ++ { ++ intFound = _FALSE; ++ } ++ else ++ { ++ intFound = _TRUE; ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ return( intFound ); ++ ++} ++ ++static u32 go_add_group_info_attr(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u32 len=0; ++ u16 attr_len = 0; ++ u8 tmplen, *pdata_attr, *pstart, *pcur; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = pwdinfo->padapter; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pdata_attr = rtw_zmalloc(MAX_P2P_IE_LEN); ++ ++ pstart = pdata_attr; ++ pcur = pdata_attr; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //look up sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ ++ if(psta->is_p2p_device) ++ { ++ tmplen = 0; ++ ++ pcur++; ++ ++ //P2P device address ++ _rtw_memcpy(pcur, psta->dev_addr, ETH_ALEN); ++ pcur += ETH_ALEN; ++ ++ //P2P interface address ++ _rtw_memcpy(pcur, psta->hwaddr, ETH_ALEN); ++ pcur += ETH_ALEN; ++ ++ *pcur = psta->dev_cap; ++ pcur++; ++ ++ //*(u16*)(pcur) = cpu_to_be16(psta->config_methods); ++ RTW_PUT_BE16(pcur, psta->config_methods); ++ pcur += 2; ++ ++ _rtw_memcpy(pcur, psta->primary_dev_type, 8); ++ pcur += 8; ++ ++ *pcur = psta->num_of_secdev_type; ++ pcur++; ++ ++ _rtw_memcpy(pcur, psta->secdev_types_list, psta->num_of_secdev_type*8); ++ pcur += psta->num_of_secdev_type*8; ++ ++ if(psta->dev_name_len>0) ++ { ++ //*(u16*)(pcur) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(pcur, WPS_ATTR_DEVICE_NAME); ++ pcur += 2; ++ ++ //*(u16*)(pcur) = cpu_to_be16( psta->dev_name_len ); ++ RTW_PUT_BE16(pcur, psta->dev_name_len); ++ pcur += 2; ++ ++ _rtw_memcpy(pcur, psta->dev_name, psta->dev_name_len); ++ pcur += psta->dev_name_len; ++ } ++ ++ ++ tmplen = (u8)(pcur-pstart); ++ ++ *pstart = (tmplen-1); ++ ++ attr_len += tmplen; ++ ++ //pstart += tmplen; ++ pstart = pcur; ++ ++ } ++ ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ if(attr_len>0) ++ { ++ len = rtw_set_p2p_attr_content(pbuf, P2P_ATTR_GROUP_INFO, attr_len, pdata_attr); ++ } ++ ++ rtw_mfree(pdata_attr, MAX_P2P_IE_LEN); ++ ++ return len; ++ ++} ++ ++static void issue_group_disc_req(struct wifidirect_info *pwdinfo, u8 *da) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_GO_DISC_REQUEST; ++ u8 dialogToken=0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ //there is no IE in this P2P action frame ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++static void issue_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_DEVDISC_RESP; ++ u8 p2pie[8] = { 0x00 }; ++ u32 p2pielen = 0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->device_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->device_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P public action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //Build P2P IE ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // P2P_ATTR_STATUS ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &pattrib->pktlen); ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++static void issue_p2p_provision_resp(struct wifidirect_info *pwdinfo, u8* raddr, u8* frame_body, u16 config_method) ++{ ++ _adapter *padapter = pwdinfo->padapter; ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = frame_body[7]; // The Dialog Token of provisioning discovery request frame. ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_RESP; ++ u8 wpsie[ 100 ] = { 0x00 }; ++ u8 wpsielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, raddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ wpsielen = 0; ++ // WPS OUI ++ //*(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(wpsie, WPSOUI); ++ wpsielen += 4; ++ ++#if 0 ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++#endif ++ ++ // Config Method ++ // Type: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ RTW_PUT_BE16(wpsie + wpsielen, WPS_ATTR_CONF_METHOD); ++ wpsielen += 2; ++ ++ // Length: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ RTW_PUT_BE16(wpsie + wpsielen, 0x0002); ++ wpsielen += 2; ++ ++ // Value: ++ //*(u16*) ( wpsie + wpsielen ) = cpu_to_be16( config_method ); ++ RTW_PUT_BE16(wpsie + wpsielen, config_method); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_resp_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return; ++ ++} ++ ++static void issue_p2p_presence_resp(struct wifidirect_info *pwdinfo, u8 *da, u8 status, u8 dialogToken) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ _adapter *padapter = pwdinfo->padapter; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ unsigned char category = RTW_WLAN_CATEGORY_P2P;//P2P action frame ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PRESENCE_RESPONSE; ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u8 noa_attr_content[32] = { 0x00 }; ++ u32 p2pielen = 0; ++ ++ DBG_871X("[%s]\n", __FUNCTION__); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pwdinfo->interface_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->interface_addr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //Build P2P action frame header ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //Add P2P IE header ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ //Add Status attribute in P2P IE ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status); ++ ++ //Add NoA attribute in P2P IE ++ noa_attr_content[0] = 0x1;//index ++ noa_attr_content[1] = 0x0;//CTWindow and OppPS Parameters ++ ++ //todo: Notice of Absence Descriptor(s) ++ ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_NOA, 2, noa_attr_content); ++ ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, p2pie, &(pattrib->pktlen)); ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++} ++ ++u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u16 capability=0; ++ u32 len=0, p2pielen = 0; ++ ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ ++ // According to the P2P Specification, the beacon frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. P2P Device ID ++ // 3. Notice of Absence ( NOA ) ++ ++ // P2P Capability ATTR ++ // Type: ++ // Length: ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ // Group Capability Bitmap, 1 byte ++ capability = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; ++ capability |= ((P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS) << 8); ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ capability |= (P2P_GRPCAP_GROUP_FORMATION<<8); ++ ++ capability = cpu_to_le16(capability); ++ ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_CAPABILITY, 2, (u8*)&capability); ++ ++ ++ // P2P Device ID ATTR ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_DEVICE_ID, ETH_ALEN, pwdinfo->device_addr); ++ ++ ++ // Notice of Absence ATTR ++ // Type: ++ // Length: ++ // Value: ++ ++ //go_add_noa_attr(pwdinfo); ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++#ifdef CONFIG_WFD ++u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the beacon frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if ( is_any_client_associated( pwdinfo->padapter ) ) ++ { ++ // WFD primary sink + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ } ++ ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ } ++ ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe response frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ // 4. WFD Session Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ ++ if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if ( is_any_client_associated( pwdinfo->padapter ) ) ++ { ++ // WFD primary sink + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ } ++ ++ } ++ else ++ { ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ } ++ ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO) ) ++ { ++ // WFD Session Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_SESSION_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0000); ++ wfdielen += 2; ++ ++ // Todo: to add the list of WFD device info descriptor in WFD group. ++ ++ } ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = NULL; ++ struct mlme_priv *pmlmepriv = NULL; ++ struct wifi_display_info *pwfd_info = NULL; ++ ++ // WFD OUI ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ return 0; ++ } ++ ++ padapter = pwdinfo->padapter; ++ pmlmepriv = &padapter->mlmepriv; ++ pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110812 ++ // According to the WFD Specification, the probe request frame should contain 4 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ++ // 3. Coupled Sink Information ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the negotiation request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery request frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 wfdie[ MAX_WFD_IE_LEN] = { 0x00 }; ++ u32 len=0, wfdielen = 0; ++ _adapter *padapter = pwdinfo->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wifi_display_info* pwfd_info = &padapter->wdinfo.wfd_info; ++ ++ // WFD OUI ++ wfdielen = 0; ++ wfdie[ wfdielen++ ] = 0x50; ++ wfdie[ wfdielen++ ] = 0x6F; ++ wfdie[ wfdielen++ ] = 0x9A; ++ wfdie[ wfdielen++ ] = 0x0A; // WFA WFD v1.0 ++ ++ // Commented by Albert 20110825 ++ // According to the WFD Specification, the provision discovery response frame should contain 3 WFD attributes ++ // 1. WFD Device Information ++ // 2. Associated BSSID ( Optional ) ++ // 3. Local IP Adress ( Optional ) ++ ++ ++ // WFD Device Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value1: ++ // WFD device information ++ // WFD primary sink + available for WFD session + WiFi Direct mode ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0011); ++ wfdielen += 2; ++ ++ // Value2: ++ // Session Management Control Port ++ // Default TCP port for RTSP messages is 554 ++ RTW_PUT_BE16(wfdie + wfdielen, pwfd_info->rtsp_ctrlport ); ++ wfdielen += 2; ++ ++ // Value3: ++ // WFD Device Maximum Throughput ++ // 300Mbps is the maximum throughput ++ RTW_PUT_BE16(wfdie + wfdielen, 300); ++ wfdielen += 2; ++ ++ // Associated BSSID ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_ASSOC_BSSID; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0006); ++ wfdielen += 2; ++ ++ // Value: ++ // Associated BSSID ++ if ( check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ) ++ { ++ _rtw_memcpy( wfdie + wfdielen, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ } ++ else ++ { ++ _rtw_memset( wfdie + wfdielen, 0x00, ETH_ALEN ); ++ } ++ ++ wfdielen += ETH_ALEN; ++ ++ // Coupled Sink Information ATTR ++ // Type: ++ wfdie[ wfdielen++ ] = WFD_ATTR_COUPLED_SINK_INFO; ++ ++ // Length: ++ // Note: In the WFD specification, the size of length field is 2. ++ RTW_PUT_BE16(wfdie + wfdielen, 0x0001); ++ wfdielen += 2; ++ ++ // Value: ++ // Coupled Sink Status bitmap ++ // Not coupled/available for Coupling ++ wfdie[ wfdielen++ ] = 0; ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, wfdielen, (unsigned char *) wfdie, &len); ++ ++ return len; ++ ++} ++ ++ ++#endif //CONFIG_WFD ++ ++u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20100907 ++ // According to the P2P Specification, the probe response frame should contain 5 P2P attributes ++ // 1. P2P Capability ++ // 2. Extended Listen Timing ++ // 3. Notice of Absence ( NOA ) ( Only GO needs this ) ++ // 4. Device Info ++ // 5. Group Info ( Only GO need this ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC|P2P_DEVCAP_CLIENT_DISCOVERABILITY; ++ ++ // Group Capability Bitmap, 1 byte ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2pie[ p2pielen ] = (P2P_GRPCAP_GO | P2P_GRPCAP_INTRABSS); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ p2pie[ p2pielen ] |= P2P_GRPCAP_GROUP_FORMATION; ++ ++ p2pielen++; ++ } ++ else if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) ) ++ { ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ } ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_EX_LISTEN_TIMING; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0004 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0004); ++ p2pielen += 2; ++ ++ // Value: ++ // Availability Period ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); ++ p2pielen += 2; ++ ++ // Availability Interval ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0xFFFF ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0xFFFF); ++ p2pielen += 2; ++ ++ ++ // Notice of Absence ATTR ++ // Type: ++ // Length: ++ // Value: ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ //go_add_noa_attr(pwdinfo); ++ } ++ ++ // Device Info ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->supported_wps_cm ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->supported_wps_cm); ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); ++ p2pielen += 2; ++ ++ // OUI ++ //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); ++ p2pielen += 2; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ ++ // Group Info ATTR ++ // Type: ++ // Length: ++ // Value: ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2pielen += go_add_group_info_attr(pwdinfo, p2pie + p2pielen); ++ } ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2pie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ p2pie[ p2pielen++ ] = P2P_DEVCAP_INVITATION_PROC; ++ ++ // Group Capability Bitmap, 1 byte ++ p2pie[ p2pielen++ ] = 0x00; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2pie + p2pielen, 21 + pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ // P2P Device Address ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_addr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ // Config Method ++ // This field should be big endian. Noted by P2P specification. ++ if ( pwdinfo->ui_got_wps_info == P2P_GOT_WPSINFO_PBC ) ++ { ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_PBC ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_PBC); ++ } ++ else ++ { ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_CONFIG_METHOD_DISPLAY ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_CONFIG_METHOD_DISPLAY); ++ } ++ ++ p2pielen += 2; ++ ++ // Primary Device Type ++ // Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_CID_RTK_WIDI ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_CID_RTK_WIDI); ++ p2pielen += 2; ++ ++ // OUI ++ //*(u32*) ( p2pie + p2pielen ) = cpu_to_be32( WPSOUI ); ++ RTW_PUT_BE32(p2pie + p2pielen, WPSOUI); ++ p2pielen += 4; ++ ++ // Sub Category ID ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_PDT_SCID_RTK_DMP ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_PDT_SCID_RTK_DMP); ++ p2pielen += 2; ++ ++ // Number of Secondary Device Types ++ p2pie[ p2pielen++ ] = 0x00; // No Secondary Device Type List ++ ++ // Device Name ++ // Type: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( WPS_ATTR_DEVICE_NAME ); ++ RTW_PUT_BE16(p2pie + p2pielen, WPS_ATTR_DEVICE_NAME); ++ p2pielen += 2; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_be16( pwdinfo->device_name_len ); ++ RTW_PUT_BE16(p2pie + p2pielen, pwdinfo->device_name_len); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pwdinfo->device_name, pwdinfo->device_name_len ); ++ p2pielen += pwdinfo->device_name_len; ++ ++ if ( rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) ) ++ { ++ // Added by Albert 2011/05/19 ++ // In this case, the pdev_raddr is the device address of the group owner. ++ ++ // P2P Group ID ATTR ++ // Type: ++ p2pie[ p2pielen++ ] = P2P_ATTR_GROUP_ID; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( ETH_ALEN + ussidlen ); ++ RTW_PUT_LE16(p2pie + p2pielen, ETH_ALEN + ussidlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy( p2pie + p2pielen, pdev_raddr, ETH_ALEN ); ++ p2pielen += ETH_ALEN; ++ ++ _rtw_memcpy( p2pie + p2pielen, pssid, ussidlen ); ++ p2pielen += ussidlen; ++ ++ } ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ ++ return len; ++ ++} ++ ++ ++u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code) ++{ ++ u8 p2pie[ MAX_P2P_IE_LEN] = { 0x00 }; ++ u32 len=0, p2pielen = 0; ++ ++ // P2P OUI ++ p2pielen = 0; ++ p2pie[ p2pielen++ ] = 0x50; ++ p2pie[ p2pielen++ ] = 0x6F; ++ p2pie[ p2pielen++ ] = 0x9A; ++ p2pie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // According to the P2P Specification, the Association response frame should contain 2 P2P attributes ++ // 1. Status ++ // 2. Extended Listen Timing (optional) ++ ++ ++ // Status ATTR ++ p2pielen += rtw_set_p2p_attr_content(&p2pie[p2pielen], P2P_ATTR_STATUS, 1, &status_code); ++ ++ ++ // Extended Listen Timing ATTR ++ // Type: ++ // Length: ++ // Value: ++ ++ ++ pbuf = rtw_set_ie(pbuf, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2pie, &len); ++ ++ return len; ++ ++} ++ ++u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf) ++{ ++ u32 len=0; ++ ++ return len; ++} ++ ++u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *p; ++ u32 ret=_FALSE; ++ u8 *p2pie; ++ u32 p2pielen = 0; ++ int ssid_len=0, rate_cnt = 0; ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SUPPORTEDRATES_IE_, (int *)&rate_cnt, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ if ( rate_cnt <= 4 ) ++ { ++ int i, g_rate =0; ++ ++ for( i = 0; i < rate_cnt; i++ ) ++ { ++ if ( ( ( *( p + 2 + i ) & 0xff ) != 0x02 ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x04 ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x0B ) && ++ ( ( *( p + 2 + i ) & 0xff ) != 0x16 ) ) ++ { ++ g_rate = 1; ++ } ++ } ++ ++ if ( g_rate == 0 ) ++ { ++ // There is no OFDM rate included in SupportedRates IE of this probe request frame ++ // The driver should response this probe request. ++ return ret; ++ } ++ } ++ else ++ { ++ // rate_cnt > 4 means the SupportRates IE contains the OFDM rate because the count of CCK rates are 4. ++ // We should proceed the following check for this probe request. ++ } ++ ++ // Added comments by Albert 20100906 ++ // There are several items we should check here. ++ // 1. This probe request frame must contain the P2P IE. (Done) ++ // 2. This probe request frame must contain the wildcard SSID. (Done) ++ // 3. Wildcard BSSID. (Todo) ++ // 4. Destination Address. ( Done in mgt_dispatcher function ) ++ // 5. Requested Device Type in WSC IE. (Todo) ++ // 6. Device ID attribute in P2P IE. (Todo) ++ ++ p = rtw_get_ie(pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_, _SSID_IE_, (int *)&ssid_len, ++ len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if((p2pie=rtw_get_p2p_ie( pframe + WLAN_HDR_A3_LEN + _PROBEREQ_IE_OFFSET_ , len - WLAN_HDR_A3_LEN - _PROBEREQ_IE_OFFSET_ , NULL, &p2pielen))) ++ { ++ if ( (p != NULL) && _rtw_memcmp( ( void * ) ( p+2 ), ( void * ) pwdinfo->p2p_wildcard_ssid , 7 )) ++ { ++ //todo: ++ //Check Requested Device Type attributes in WSC IE. ++ //Check Device ID attribute in P2P IE ++ ++ ret = _TRUE; ++ } ++ } ++ else ++ { ++ //non -p2p device ++ } ++ ++ } ++ ++ ++ return ret; ++ ++} ++ ++u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta) ++{ ++ u8 status_code = P2P_STATUS_SUCCESS; ++ u8 *pbuf, *pattr_content=NULL; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ unsigned short frame_type, ie_offset=0; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ return P2P_STATUS_FAIL_REQUEST_UNABLE; ++ ++ frame_type = GetFrameSubType(pframe); ++ if (frame_type == WIFI_ASSOCREQ) ++ { ++ ie_offset = _ASOCREQ_IE_OFFSET_; ++ } ++ else // WIFI_REASSOCREQ ++ { ++ ie_offset = _REASOCREQ_IE_OFFSET_; ++ } ++ ++ ies = pframe + WLAN_HDR_A3_LEN + ie_offset; ++ ies_len = len - WLAN_HDR_A3_LEN - ie_offset; ++ ++ p2p_ie = rtw_get_p2p_ie(ies , ies_len , NULL, &p2p_ielen); ++ ++ if ( !p2p_ie ) ++ { ++ DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); ++ status_code = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ else ++ { ++ DBG_8192C( "[%s] P2P IE Found!!\n", __FUNCTION__ ); ++ } ++ ++ while ( p2p_ie ) ++ { ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ psta->dev_cap = cap_attr&0xff; ++ } ++ ++ //Check Extended Listen Timing ATTR ++ ++ ++ //Check P2P Device Info ATTR ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, NULL, (uint*)&attr_contentlen)) ++ { ++ DBG_8192C( "[%s] Got P2P DEVICE INFO Attr!!\n", __FUNCTION__ ); ++ pattr_content = pbuf = rtw_zmalloc(attr_contentlen); ++ if(pattr_content) ++ { ++ u8 num_of_secdev_type; ++ u16 dev_name_len; ++ ++ ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO , pattr_content, (uint*)&attr_contentlen); ++ ++ _rtw_memcpy(psta->dev_addr, pattr_content, ETH_ALEN);//P2P Device Address ++ ++ pattr_content += ETH_ALEN; ++ ++ _rtw_memcpy(&psta->config_methods, pattr_content, 2);//Config Methods ++ psta->config_methods = be16_to_cpu(psta->config_methods); ++ ++ pattr_content += 2; ++ ++ _rtw_memcpy(psta->primary_dev_type, pattr_content, 8); ++ ++ pattr_content += 8; ++ ++ num_of_secdev_type = *pattr_content; ++ pattr_content += 1; ++ ++ if(num_of_secdev_type==0) ++ { ++ psta->num_of_secdev_type = 0; ++ } ++ else ++ { ++ u32 len; ++ ++ psta->num_of_secdev_type = num_of_secdev_type; ++ ++ len = (sizeof(psta->secdev_types_list)<(num_of_secdev_type*8)) ? (sizeof(psta->secdev_types_list)) : (num_of_secdev_type*8); ++ ++ _rtw_memcpy(psta->secdev_types_list, pattr_content, len); ++ ++ pattr_content += (num_of_secdev_type*8); ++ } ++ ++ ++ //dev_name_len = attr_contentlen - ETH_ALEN - 2 - 8 - 1 - (num_of_secdev_type*8); ++ psta->dev_name_len=0; ++ if(WPS_ATTR_DEVICE_NAME == be16_to_cpu(*(u16*)pattr_content)) ++ { ++ dev_name_len = be16_to_cpu(*(u16*)(pattr_content+2)); ++ ++ psta->dev_name_len = (sizeof(psta->dev_name)dev_name):dev_name_len; ++ ++ _rtw_memcpy(psta->dev_name, pattr_content+4, psta->dev_name_len); ++ } ++ ++ rtw_mfree(pbuf, attr_contentlen); ++ ++ } ++ ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ return status_code; ++ ++} ++ ++u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *frame_body; ++ u8 status, dialogToken; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = pwdinfo->padapter; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *p2p_ie; ++ u32 p2p_ielen = 0; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ dialogToken = frame_body[7]; ++ status = P2P_STATUS_FAIL_UNKNOWN_P2PGROUP; ++ ++ if ( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen)) ) ++ { ++ u8 groupid[ 38 ] = { 0x00 }; ++ u8 dev_addr[ETH_ALEN] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen)) ++ { ++ if(_rtw_memcmp(pwdinfo->device_addr, groupid, ETH_ALEN) && ++ _rtw_memcmp(pwdinfo->p2p_group_ssid, groupid+ETH_ALEN, pwdinfo->p2p_group_ssid_len)) ++ { ++ attr_contentlen=0; ++ if(rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_ID, dev_addr, &attr_contentlen)) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //look up sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if(psta->is_p2p_device && (psta->dev_cap&P2P_DEVCAP_CLIENT_DISCOVERABILITY) && ++ _rtw_memcmp(psta->dev_addr, dev_addr, ETH_ALEN)) ++ { ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ //issue GO Discoverability Request ++ issue_group_disc_req(pwdinfo, psta->hwaddr); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ status = P2P_STATUS_SUCCESS; ++ ++ break; ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ } ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ ++ } ++ else ++ { ++ status = P2P_STATUS_FAIL_INVALID_PARAM; ++ } ++ ++ } ++ ++ } ++ ++ ++ //issue Device Discoverability Response ++ issue_p2p_devdisc_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); ++ ++ ++ return (status==P2P_STATUS_SUCCESS) ? _TRUE:_FALSE; ++ ++} ++ ++u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ return _TRUE; ++} ++ ++u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 *frame_body; ++ u8 *wpsie; ++ uint wps_ielen = 0, attr_contentlen = 0; ++ u16 uconfig_method = 0; ++ ++ ++ frame_body = (pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ if ( (wpsie=rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) ++ { ++ if ( rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_CONF_METHOD , ( u8* ) &uconfig_method, &attr_contentlen) ) ++ { ++ uconfig_method = be16_to_cpu( uconfig_method ); ++ switch( uconfig_method ) ++ { ++ case WPS_CM_DISPLYA: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ break; ++ } ++ case WPS_CM_LABEL: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "lab", 3 ); ++ break; ++ } ++ case WPS_CM_PUSH_BUTTON: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ break; ++ } ++ case WPS_CM_KEYPAD: ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ break; ++ } ++ } ++ issue_p2p_provision_resp( pwdinfo, GetAddr2Ptr(pframe), frame_body, uconfig_method); ++ } ++ } ++ DBG_8192C( "[%s] config method = %s\n", __FUNCTION__, pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); ++ return _TRUE; ++ ++} ++ ++u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe) ++{ ++ ++ return _TRUE; ++} ++ ++ ++ ++u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 result = P2P_STATUS_SUCCESS; ++ u32 p2p_ielen = 0, wps_ielen = 0; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u8 *wpsie; ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#endif // CONFIG_WFD ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) ++ { ++ result = P2P_STATUS_FAIL_INFO_UNAVAILABLE; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ return( result ); ++ } ++ ++ if ( (wpsie=rtw_get_wps_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &wps_ielen)) ) ++ { ++ // Commented by Kurt 20120113 ++ // If some device wants to do p2p handshake without sending prov_disc_req ++ // We have to get peer_req_cm from here. ++ if(_rtw_memcmp( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "000", 3) ) ++ { ++ rtw_get_wps_attr_content( wpsie, wps_ielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ if ( wps_devicepassword_id == WPS_DPID_USER_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "dis", 3 ); ++ } ++ else if ( wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC ) ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pad", 3 ); ++ } ++ else ++ { ++ _rtw_memcpy( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, "pbc", 3 ); ++ } ++ } ++ } ++ else ++ { ++ DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ return( result ); ++ } ++ ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ ++ if ( !p2p_ie ) ++ { ++ DBG_8192C( "[%s] P2P IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ ++ while ( p2p_ie ) ++ { ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); ++ ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); ++ pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. ++ ++ if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ // Try to match the tie breaker value ++ if ( pwdinfo->intent == P2P_MAX_INTENT ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; ++ } ++ else ++ { ++ if ( attr_content & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ } ++ else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ // Store the group id information. ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ } ++ } ++ ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) ++ { ++ if ( attr_contentlen != ETH_ALEN ) ++ { ++ _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); ++ } ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++ ++#ifdef CONFIG_WFD ++ // Added by Albert 20110823 ++ // Try to get the TCP port information when receiving the negotiation request. ++ if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ } ++ } ++#endif // CONFIG_WFD ++ ++ return( result ); ++} ++ ++u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 result = P2P_STATUS_SUCCESS; ++ u32 p2p_ielen, wps_ielen; ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++#ifdef CONFIG_WFD ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++#endif // CONFIG_WFD ++ ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ // Be able to know which one is the P2P GO and which one is P2P client. ++ ++ if ( rtw_get_wps_ie( ies, ies_len, NULL, &wps_ielen) ) ++ { ++ ++ } ++ else ++ { ++ DBG_8192C( "[%s] WPS IE not Found!!\n", __FUNCTION__ ); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ if ( !p2p_ie ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ result = P2P_STATUS_FAIL_INCOMPATIBLE_PARAM; ++ } ++ else ++ { ++ u8 attr_content = 0x00; ++ u32 attr_contentlen = 0; ++ u8 operatingch_info[5] = { 0x00 }; ++ uint ch_cnt = 0; ++ u8 ch_content[50] = { 0x00 }; ++ u8 groupid[ 38 ]; ++ ++ while ( p2p_ie ) // Found the P2P IE. ++ { ++ ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ // Do nothing. ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ result = attr_content; ++ break; ++ } ++ } ++ ++ // Try to get the peer's interface address ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_INTENTED_IF_ADDR, pwdinfo->p2p_peer_interface_addr, &attr_contentlen ) ) ++ { ++ if ( attr_contentlen != ETH_ALEN ) ++ { ++ _rtw_memset( pwdinfo->p2p_peer_interface_addr, 0x00, ETH_ALEN ); ++ } ++ } ++ ++ // Try to get the peer's intent and tie breaker value. ++ attr_content = 0x00; ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_GO_INTENT , &attr_content, &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] GO Intent = %d, tie = %d\n", __FUNCTION__, attr_content >> 1, attr_content & 0x01 ); ++ pwdinfo->peer_intent = attr_content; // include both intent and tie breaker values. ++ ++ if ( pwdinfo->intent == ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ // Try to match the tie breaker value ++ if ( pwdinfo->intent == P2P_MAX_INTENT ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ result = P2P_STATUS_FAIL_BOTH_GOINTENT_15; ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ } ++ else ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ if ( attr_content & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ } ++ else if ( pwdinfo->intent > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ // Store the group id information. ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, pwdinfo->device_addr, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, pwdinfo->nego_ssid, pwdinfo->nego_ssidlen ); ++ ++ } ++ } ++ ++ // Try to get the operation channel information ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen)) ++ { ++ DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); ++ pwdinfo->peer_operating_ch = operatingch_info[4]; ++ } ++ ++ // Try to get the channel list information ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_CH_LIST, ch_content, &ch_cnt) ) ++ { ++ pwdinfo->channel_cnt = ch_content[ 4 ]; // Number of Channels ++ _rtw_memcpy( pwdinfo->channel_list, &ch_content[ 5 ], pwdinfo->channel_cnt ); // Channel List ++ DBG_8192C( "[%s] channel count = %d\n", __FUNCTION__, pwdinfo->channel_cnt ); ++ } ++ else ++ { ++ DBG_8192C( "[%s] channel list attribute not found!\n", __FUNCTION__); ++ } ++ ++ // Try to get the group id information if peer is GO ++ attr_contentlen = 0; ++ _rtw_memset( groupid, 0x00, 38 ); ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) ++ { ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ } ++ ++ } ++ ++#ifdef CONFIG_WFD ++ // Added by Albert 20111122 ++ // Try to get the TCP port information when receiving the negotiation response. ++ if ( rtw_get_wfd_ie( pframe + _PUBLIC_ACTION_IE_OFFSET_, len - _PUBLIC_ACTION_IE_OFFSET_, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ DBG_8192C( "[%s] WFD IE Found!!\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ } ++ } ++#endif // CONFIG_WFD ++ ++ return( result ); ++ ++} ++ ++u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ) ++{ ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ u8 result = P2P_STATUS_SUCCESS; ++ ++ ies = pframe + _PUBLIC_ACTION_IE_OFFSET_; ++ ies_len = len - _PUBLIC_ACTION_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen ); ++ while ( p2p_ie ) // Found the P2P IE. ++ { ++ u8 attr_content = 0x00, operatingch_info[5] = { 0x00 }; ++ u8 groupid[ 38 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ pwdinfo->negotiation_dialog_token = 1; ++ rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_STATUS, &attr_content, &attr_contentlen); ++ if ( attr_contentlen == 1 ) ++ { ++ DBG_8192C( "[%s] Status = %d\n", __FUNCTION__, attr_content ); ++ result = attr_content; ++ ++ if ( attr_content == P2P_STATUS_SUCCESS ) ++ { ++ u8 bcancelled = 0; ++ ++ _cancel_timer( &pwdinfo->restore_p2p_state_timer, &bcancelled ); ++ ++ // Commented by Albert 20100911 ++ // Todo: Need to handle the case which both Intents are the same. ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ if ( ( pwdinfo->intent ) > ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ else if ( ( pwdinfo->intent ) < ( pwdinfo->peer_intent >> 1 ) ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ // Have to compare the Tie Breaker ++ if ( pwdinfo->peer_intent & 0x01 ) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ } ++ } ++ else ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_FAIL); ++ break; ++ } ++ } ++ ++ // Try to get the group id information ++ attr_contentlen = 0; ++ _rtw_memset( groupid, 0x00, 38 ); ++ if ( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, groupid, &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] Ssid = %s, ssidlen = %d\n", __FUNCTION__, &groupid[ETH_ALEN], strlen(&groupid[ETH_ALEN]) ); ++ _rtw_memcpy( pwdinfo->groupid_info.go_device_addr, &groupid[0], ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->groupid_info.ssid, &groupid[6], attr_contentlen - ETH_ALEN ); ++ } ++ ++ attr_contentlen = 0; ++ if ( rtw_get_p2p_attr_content(p2p_ie, p2p_ielen, P2P_ATTR_OPERATING_CH, operatingch_info, &attr_contentlen) ) ++ { ++ DBG_8192C( "[%s] Peer's operating channel = %d\n", __FUNCTION__, operatingch_info[4] ); ++ pwdinfo->peer_operating_ch = operatingch_info[4]; ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ return( result ); ++} ++ ++u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len) ++{ ++ u8 *frame_body; ++ u8 dialogToken=0; ++ u8 status = P2P_STATUS_SUCCESS; ++ ++ frame_body = (unsigned char *)(pframe + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ ++ dialogToken = frame_body[6]; ++ ++ //todo: check NoA attribute ++ ++ issue_p2p_presence_resp(pwdinfo, GetAddr2Ptr(pframe), status, dialogToken); ++ ++ return _TRUE; ++} ++ ++void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength) ++{ ++ u8 * ies; ++ u32 ies_len; ++ u8 * p2p_ie; ++ u32 p2p_ielen = 0; ++ u8 noa_attr[MAX_P2P_IE_LEN] = { 0x00 };// NoA length should be n*(13) + 2 ++ u32 attr_contentlen = 0; ++ ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 find_p2p = _FALSE, find_p2p_ps = _FALSE; ++ u8 noa_offset, noa_num, noa_index; ++ ++_func_enter_; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ return; ++ } ++ ++ if(IELength <= _BEACON_IE_OFFSET_) ++ return; ++ ++ ies = IEs + _BEACON_IE_OFFSET_; ++ ies_len = IELength - _BEACON_IE_OFFSET_; ++ ++ p2p_ie = rtw_get_p2p_ie( ies, ies_len, NULL, &p2p_ielen); ++ ++ while(p2p_ie) ++ { ++ find_p2p = _TRUE; ++ // Get Notice of Absence IE. ++ if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_NOA, noa_attr, &attr_contentlen)) ++ { ++ find_p2p_ps = _TRUE; ++ noa_index = noa_attr[0]; ++ ++ if( (pwdinfo->p2p_ps_enable == _FALSE) || ++ (noa_index != pwdinfo->noa_index) )// if index change, driver should reconfigure related setting. ++ { ++ pwdinfo->noa_index = noa_index; ++ pwdinfo->opp_ps = noa_attr[1] >> 7; ++ pwdinfo->ctwindow = noa_attr[1] & 0x7F; ++ ++ noa_offset = 2; ++ noa_num = 0; ++ // NoA length should be n*(13) + 2 ++ if(attr_contentlen > 2) ++ { ++ while(noa_offset < attr_contentlen) ++ { ++ //_rtw_memcpy(&wifidirect_info->noa_count[noa_num], &noa_attr[noa_offset], 1); ++ pwdinfo->noa_count[noa_num] = noa_attr[noa_offset]; ++ noa_offset += 1; ++ ++ _rtw_memcpy(&pwdinfo->noa_duration[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ _rtw_memcpy(&pwdinfo->noa_interval[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ _rtw_memcpy(&pwdinfo->noa_start_time[noa_num], &noa_attr[noa_offset], 4); ++ noa_offset += 4; ++ ++ noa_num++; ++ } ++ } ++ pwdinfo->noa_num = noa_num; ++ ++ if( pwdinfo->opp_ps == 1 ) ++ { ++ pwdinfo->p2p_ps_enable = _TRUE; ++ // driver should wait LPS for entering CTWindow ++ if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); ++ } ++ } ++ else if( pwdinfo->noa_num > 0 ) ++ { ++ pwdinfo->p2p_ps_enable = _TRUE; ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 1); ++ } ++ else if( pwdinfo->p2p_ps_enable == _TRUE) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++ } ++ } ++ ++ break; // find target, just break. ++ } ++ ++ //Get the next P2P IE ++ p2p_ie = rtw_get_p2p_ie(p2p_ie+p2p_ielen, ies_len -(p2p_ie -ies + p2p_ielen), NULL, &p2p_ielen); ++ ++ } ++ ++ if(find_p2p == _TRUE) ++ { ++ if( (pwdinfo->p2p_ps_enable == _TRUE) && (find_p2p_ps == _FALSE) ) ++ { ++ p2p_ps_wk_cmd(padapter, P2P_PS_DISABLE, 1); ++ } ++ } ++ ++_func_exit_; ++} ++ ++void find_phase_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid; ++ _irqL irqL; ++ u8 _status = 0; ++ ++_func_enter_; ++ ++ _rtw_memset((unsigned char*)&ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); ++ ssid.SsidLength = P2P_WILDCARD_SSID_LEN; ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _status = rtw_sitesurvey_cmd(padapter, &ssid, 1); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++_func_exit_; ++} ++ ++void restore_p2p_state_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++_func_enter_; ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE)) ++ { ++ // In the P2P client mode, the driver should not switch back to its listen channel ++ // because this P2P client should stay at the operating channel of P2P GO. ++ set_channel_bwmode( padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++_func_exit_; ++} ++ ++void pre_tx_provdisc_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ u8 val8 = 1; ++_func_enter_; ++ ++ set_channel_bwmode(padapter, pwdinfo->tx_prov_disc_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p( padapter ); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++_func_exit_; ++} ++ ++void pre_tx_negoreq_handler( _adapter* padapter ) ++{ ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ u8 val8 = 1; ++_func_enter_; ++ ++ set_channel_bwmode(padapter, pwdinfo->nego_req_info.peer_channel_num[0], HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_SITESURVEY, (u8 *)(&val8)); ++ issue_probereq_p2p( padapter ); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++void ro_ch_handler( _adapter* padapter ) ++{ ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++_func_enter_; ++ ++// if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) ++// set_channel_bwmode(padapter, pcfg80211_wdinfo->restore_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); ++ ++ if(pwrpriv->bips_processing == _FALSE){ ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ } ++ } ++ else ++ #endif ++ { ++ if( pcfg80211_wdinfo->restore_channel != pmlmeext->cur_channel ) ++ { ++ pmlmeext->cur_channel = pcfg80211_wdinfo->restore_channel; ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ cfg80211_remain_on_channel_expired(pcfg80211_wdinfo->remain_on_ch_dev, ++ pcfg80211_wdinfo->remain_on_ch_cookie, ++ &pcfg80211_wdinfo->remain_on_ch_channel, ++ pcfg80211_wdinfo->remain_on_ch_type, GFP_KERNEL); ++_func_exit_; ++} ++#endif //CONFIG_IOCTL_CFG80211 ++ ++void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType) ++{ ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++_func_enter_; ++ ++ switch(intCmdType) ++ { ++ case P2P_FIND_PHASE_WK: ++ { ++ find_phase_handler( padapter ); ++ break; ++ } ++ case P2P_RESTORE_STATE_WK: ++ { ++ restore_p2p_state_handler( padapter ); ++ break; ++ } ++ case P2P_PRE_TX_PROVDISC_PROCESS_WK: ++ { ++ pre_tx_provdisc_handler( padapter ); ++ break; ++ } ++ case P2P_PRE_TX_NEGOREQ_PROCESS_WK: ++ { ++ pre_tx_negoreq_handler( padapter ); ++ break; ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ case P2P_RO_CH_WK: ++ { ++ ro_ch_handler( padapter ); ++ break; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ } ++ ++_func_exit_; ++} ++ ++ ++ ++void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++_func_enter_; ++ ++ // Pre action for p2p state ++ switch(p2p_ps_state) ++ { ++ case P2P_PS_ENABLE: ++ if( pwdinfo->ctwindow > 0 ) ++ { ++ if(pwrpriv->smart_ps != 0) ++ { ++ pwrpriv->smart_ps = 0; ++ DBG_871X("%s(): Enter CTW, change SmartPS\n", __FUNCTION__); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); ++ } ++ } ++ break; ++ default: ++ break; ++ } ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_P2P_PS_OFFLOAD, (u8 *)(&p2p_ps_state)); ++ ++ // clear P2P SW status ++ if(p2p_ps_state == P2P_PS_DISABLE) ++ { ++ pwdinfo->noa_index = 0; ++ pwdinfo->ctwindow = 0; ++ pwdinfo->opp_ps = 0; ++ pwdinfo->noa_num = 0; ++ pwdinfo->p2p_ps_enable = _FALSE; ++ if(padapter->pwrctrlpriv.bFwCurrentInPSMode == _TRUE) ++ { ++ if(pwrpriv->smart_ps == 0) ++ { ++ pwrpriv->smart_ps = 2; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&(padapter->pwrctrlpriv.pwr_mode))); ++ } ++ } ++ } ++ ++_func_exit_; ++} ++ ++u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if ( rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || ++ ( pwdinfo->p2p_ps == p2p_ps_state ) ) ++ { ++ return res; ++ } ++ ++ // driver only perform p2p ps when GO have Opp_Ps or NoA ++ if( pwdinfo->p2p_ps_enable ) ++ { ++ pwdinfo->p2p_ps = p2p_ps_state; ++ ++ if(enqueue) ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = P2P_PS_WK_CID; ++ pdrvextra_cmd_parm->type_size = p2p_ps_state; ++ pdrvextra_cmd_parm->pbuf = NULL; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ } ++ else ++ { ++ p2p_ps_wk_hdl(padapter, p2p_ps_state); ++ } ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++static void restore_p2p_state_timer_process (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ p2p_protocol_wk_cmd( adapter, P2P_RESTORE_STATE_WK ); ++} ++ ++static void pre_tx_scan_timer_process (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *) FunctionContext; ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 _status = 0; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ // Commented by Albert 20110805 ++ // Todo: Use the issuing probe request directly instead of using the rtw_sitesurvey_cmd!! ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ)) ++ { ++ if ( _TRUE == pwdinfo->tx_prov_disc_info.benable ) // the provision discovery request frame is trigger to send or not ++ { ++ p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_PROVDISC_PROCESS_WK ); ++ //issue_probereq_p2p( adapter ); ++ //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ } ++ else if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_ING)) ++ { ++ if ( _TRUE == pwdinfo->nego_req_info.benable ) ++ { ++ p2p_protocol_wk_cmd( adapter, P2P_PRE_TX_NEGOREQ_PROCESS_WK ); ++ //issue_probereq_p2p( adapter ); ++ //_set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ } ++ } ++ else ++ { ++ DBG_8192C( "[%s] p2p_state is %d, ignore!!\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ } ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++static void find_phase_timer_process (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ struct wifidirect_info *pwdinfo = &adapter->wdinfo; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ return; ++ ++ adapter->wdinfo.find_phase_state_exchange_cnt++; ++ ++ p2p_protocol_wk_cmd( adapter, P2P_FIND_PHASE_WK ); ++} ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++static void ro_ch_timer_process (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ ++ //printk("%s \n", __FUNCTION__); ++ ++ p2p_protocol_wk_cmd( adapter, P2P_RO_CH_WK); ++} ++ ++void rtw_init_cfg80211_wifidirect_info( _adapter* padapter) ++{ ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ ++ _rtw_memset(pcfg80211_wdinfo, 0x00, sizeof(struct cfg80211_wifidirect_info) ); ++ ++ _init_timer( &pcfg80211_wdinfo->remain_on_ch_timer, padapter->pnetdev, ro_ch_timer_process, padapter ); ++} ++#endif //CONFIG_IOCTL_CFG80211 ++ ++void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role) ++{ ++ struct wifidirect_info *pwdinfo; ++ ++ pwdinfo = &padapter->wdinfo; ++ ++ pwdinfo->padapter = padapter; ++ ++ //init device&interface address ++ _rtw_memcpy(pwdinfo->device_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwdinfo->interface_addr, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ // 1, 6, 11 are the social channel defined in the WiFi Direct specification. ++ pwdinfo->social_chan[0] = 1; ++ pwdinfo->social_chan[1] = 6; ++ pwdinfo->social_chan[2] = 11; ++ pwdinfo->social_chan[3] = 0; // channel 0 for scanning ending in site survey function. ++ ++ // Use the channel 11 as the listen channel ++ pwdinfo->listen_channel = 11; ++ ++ if (role == P2P_ROLE_DEVICE) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ pwdinfo->intent = 1; ++ } ++ else if (role == P2P_ROLE_CLIENT) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 1; ++ } ++ else if (role == P2P_ROLE_GO) ++ { ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ } ++ ++ //rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_NONE); ++ rtw_p2p_set_pre_state(pwdinfo, P2P_STATE_LISTEN); ++ ++// Use the OFDM rate in the P2P probe response frame. ( 6(B), 9(B), 12, 18, 24, 36, 48, 54 ) ++ pwdinfo->support_rate[0] = 0x8c; // 6(B) ++ pwdinfo->support_rate[1] = 0x92; // 9(B) ++ pwdinfo->support_rate[2] = 0x18; // 12 ++ pwdinfo->support_rate[3] = 0x24; // 18 ++ pwdinfo->support_rate[4] = 0x30; // 24 ++ pwdinfo->support_rate[5] = 0x48; // 36 ++ pwdinfo->support_rate[6] = 0x60; // 48 ++ pwdinfo->support_rate[7] = 0x6c; // 54 ++ ++ _rtw_memcpy( ( void* ) pwdinfo->p2p_wildcard_ssid, "DIRECT-", 7 ); ++ ++ _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); ++ _rtw_memcpy( pwdinfo->device_name, "Realtek DMP Device", 18 ); ++ pwdinfo->device_name_len = 18; ++ ++ _rtw_memset( &pwdinfo->invitereq_info, 0x00, sizeof( struct tx_invite_req_info ) ); ++ pwdinfo->invitereq_info.token = 3; // Token used for P2P invitation request frame. ++ pwdinfo->invitereq_info.peer_operation_ch = pwdinfo->listen_channel; ++ ++ _rtw_memset( &pwdinfo->inviteresp_info, 0x00, sizeof( struct tx_invite_resp_info ) ); ++ pwdinfo->inviteresp_info.token = 0; ++ ++ pwdinfo->profileindex = 0; ++ _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); ++ ++ _init_timer( &pwdinfo->find_phase_timer, padapter->pnetdev, find_phase_timer_process, padapter ); ++ _init_timer( &pwdinfo->restore_p2p_state_timer, padapter->pnetdev, restore_p2p_state_timer_process, padapter ); ++ _init_timer( &pwdinfo->pre_tx_scan_timer, padapter->pnetdev, pre_tx_scan_timer_process, padapter ); ++ ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ ++ pwdinfo->listen_dwell = ( u8 ) (( rtw_get_current_time() % 3 ) + 1); ++ //DBG_8192C( "[%s] listen_dwell time is %d00ms\n", __FUNCTION__, pwdinfo->listen_dwell ); ++ ++ _rtw_memset( &pwdinfo->tx_prov_disc_info, 0x00, sizeof( struct tx_provdisc_req_info ) ); ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_NONE; ++ ++ _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); ++ ++ pwdinfo->device_password_id_for_nego = WPS_DPID_PBC; ++ pwdinfo->negotiation_dialog_token = 1; ++ ++ _rtw_memset( pwdinfo->nego_ssid, 0x00, WLAN_SSID_MAXLEN ); ++ pwdinfo->nego_ssidlen = 0; ++ ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++#ifdef CONFIG_WFD ++ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY; ++ _rtw_memset( &pwdinfo->wfd_info, 0x00, sizeof( struct wifi_display_info ) ); ++ pwdinfo->wfd_info.rtsp_ctrlport = 554; ++ pwdinfo->wfd_info.peer_rtsp_ctrlport = 0; // Reset to 0 ++#else ++ pwdinfo->supported_wps_cm = WPS_CONFIG_METHOD_DISPLAY | WPS_CONFIG_METHOD_PBC | WPS_CONFIG_METHOD_KEYPAD; ++#endif //CONFIG_WFD ++ pwdinfo->channel_cnt = 0; ++ _rtw_memset( pwdinfo->channel_list, 0x00, 13 ); ++ ++ _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, 0x00, 4 ); ++ _rtw_memset( pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req, '0', 3 ); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++ ++} ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx) ++{ ++ int is_p2p_frame = (-1); ++ unsigned char *frame_body; ++ u8 category, action, OUI_Subtype, dialogToken=0; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ ++ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ category = frame_body[0]; ++ //just for check ++ if(category == RTW_WLAN_CATEGORY_PUBLIC) ++ { ++ action = frame_body[ 1 ]; ++ OUI_Subtype = frame_body[ 6 ]; ++ dialogToken = frame_body[7]; ++ ++ if ( action == ACT_PUBLIC_P2P ) ++ { ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++#endif ++ ++ is_p2p_frame = OUI_Subtype; ++ ++ switch( OUI_Subtype )//OUI Subtype ++ { ++ case P2P_GO_NEGO_REQ: ++ DBG_871X("RTW_%s:P2P_GO_NEGO_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ ++ if(tx) ++ { ++ if(pwdev_priv->provdisc_req_issued == _FALSE) ++ rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); ++ ++ //pwdev_priv->provdisc_req_issued = _FALSE; ++ } ++ ++ break; ++ case P2P_GO_NEGO_RESP: ++ DBG_871X("RTW_%s:P2P_GO_NEGO_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ ++ if(!tx) ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ ++ break; ++ case P2P_GO_NEGO_CONF: ++ DBG_871X("RTW_%s:P2P_GO_NEGO_CONF, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_INVIT_REQ: ++ DBG_871X("RTW_%s:P2P_INVIT_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_INVIT_RESP: ++ DBG_871X("RTW_%s:P2P_INVIT_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_DEVDISC_REQ: ++ DBG_871X("RTW_%s:P2P_DEVDISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_DEVDISC_RESP: ++ DBG_871X("RTW_%s:P2P_DEVDISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ case P2P_PROVISION_DISC_REQ: ++ { ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ u8 *p2p_ie; ++ uint p2p_ielen = 0; ++ uint contentlen = 0; ++ ++ DBG_871X("RTW_%s:P2P_PROVISION_DISC_REQ, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ ++ //if(tx) ++ { ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ ++ if( (p2p_ie=rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, NULL, &p2p_ielen))) ++ { ++ ++ if(rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_GROUP_ID, NULL, &contentlen)) ++ { ++ pwdev_priv->provdisc_req_issued = _FALSE;//case: p2p_client join p2p GO ++ } ++ else ++ { ++ DBG_871X("provdisc_req_issued is _TRUE\n"); ++ pwdev_priv->provdisc_req_issued = _TRUE;//case: p2p_devices connection before Nego req. ++ } ++ ++ } ++ } ++ } ++ break; ++ case P2P_PROVISION_DISC_RESP: ++ DBG_871X("RTW_%s:P2P_PROVISION_DISC_RESP, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", dialogToken); ++ break; ++ default: ++ DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"Tx":"Rx", OUI_Subtype, dialogToken); ++ break; ++ } ++ ++ } ++ else ++ { ++ DBG_871X("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ } ++ ++ } ++ else if(category == RTW_WLAN_CATEGORY_P2P) ++ { ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); ++#endif ++ ++ is_p2p_frame = OUI_Subtype; ++ ++ switch(OUI_Subtype) ++ { ++ case P2P_NOTICE_OF_ABSENCE: ++ DBG_871X("RTW_%s:P2P_NOTICE_OF_ABSENCE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_PRESENCE_REQUEST: ++ DBG_871X("RTW_%s:P2P_PRESENCE_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_PRESENCE_RESPONSE: ++ DBG_871X("RTW_%s:P2P_PRESENCE_RESPONSE, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ case P2P_GO_DISC_REQUEST: ++ DBG_871X("RTW_%s:P2P_GO_DISC_REQUEST, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", dialogToken); ++ break; ++ default: ++ DBG_871X("RTW_%s:OUI_Subtype=%d, dialogToken=%d\n", (tx==_TRUE)?"TX":"RX", OUI_Subtype, dialogToken); ++ break; ++ } ++ ++ } ++ else ++ { ++ DBG_871X("%s, action frame category=%d\n", __func__, category); ++ //is_p2p_frame = (-1); ++ } ++ ++ return is_p2p_frame; ++} ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_DBG_P2P ++char * p2p_role_str[] = { ++ "P2P_ROLE_DISABLE", ++ "P2P_ROLE_DEVICE", ++ "P2P_ROLE_CLIENT", ++ "P2P_ROLE_GO" ++}; ++ ++char * p2p_state_str[] = { ++ "P2P_STATE_NONE", ++ "P2P_STATE_IDLE", ++ "P2P_STATE_LISTEN", ++ "P2P_STATE_SCAN", ++ "P2P_STATE_FIND_PHASE_LISTEN", ++ "P2P_STATE_FIND_PHASE_SEARCH", ++ "P2P_STATE_TX_PROVISION_DIS_REQ", ++ "P2P_STATE_RX_PROVISION_DIS_RSP", ++ "P2P_STATE_RX_PROVISION_DIS_REQ", ++ "P2P_STATE_GONEGO_ING", ++ "P2P_STATE_GONEGO_OK", ++ "P2P_STATE_GONEGO_FAIL", ++ "P2P_STATE_RECV_INVITE_REQ", ++ "P2P_STATE_PROVISIONING_ING", ++ "P2P_STATE_PROVISIONING_DONE" ++}; ++ ++void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) ++{ ++ if(!_rtw_p2p_chk_state(wdinfo, state)) { ++ enum P2P_STATE old_state = _rtw_p2p_state(wdinfo); ++ _rtw_p2p_set_state(wdinfo, state); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state from %s to %s\n", caller, line ++ , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_state(wdinfo)] ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_state to same state %s\n", caller, line ++ , p2p_state_str[_rtw_p2p_state(wdinfo)] ++ ); ++ } ++} ++void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line) ++{ ++ if(_rtw_p2p_pre_state(wdinfo) != state) { ++ enum P2P_STATE old_state = _rtw_p2p_pre_state(wdinfo); ++ _rtw_p2p_set_pre_state(wdinfo, state); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state from %s to %s\n", caller, line ++ , p2p_state_str[old_state], p2p_state_str[_rtw_p2p_pre_state(wdinfo)] ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_pre_state to same state %s\n", caller, line ++ , p2p_state_str[_rtw_p2p_pre_state(wdinfo)] ++ ); ++ } ++} ++#if 0 ++void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line) ++{ ++ if(wdinfo->pre_p2p_state != -1) { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d restore from %s to %s\n", caller, line ++ , p2p_state_str[wdinfo->p2p_state], p2p_state_str[wdinfo->pre_p2p_state] ++ ); ++ _rtw_p2p_restore_state(wdinfo); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d restore no pre state, cur state %s\n", caller, line ++ , p2p_state_str[wdinfo->p2p_state] ++ ); ++ } ++} ++#endif ++void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line) ++{ ++ if(wdinfo->role != role) { ++ enum P2P_ROLE old_role = wdinfo->role; ++ _rtw_p2p_set_role(wdinfo, role); ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role from %s to %s\n", caller, line ++ , p2p_role_str[old_role], p2p_role_str[wdinfo->role] ++ ); ++ } else { ++ DBG_871X("[CONFIG_DBG_P2P]%s:%d set_role to same role %s\n", caller, line ++ , p2p_role_str[wdinfo->role] ++ ); ++ } ++} ++#endif //CONFIG_DBG_P2P ++ ++ ++int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role) ++{ ++ int ret = _SUCCESS; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ if (role == P2P_ROLE_DEVICE || role == P2P_ROLE_CLIENT|| role == P2P_ROLE_GO) ++ { ++ u8 channel, ch_offset; ++ u16 bwmode; ++ ++ //leave IPS/Autosuspend ++ if(_FAIL == rtw_pwr_wakeup(padapter)) ++ { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ #ifdef CONFIG_P2P_AGAINST_NOISE ++ //Sometimes dongle would difficult to receive p2p_probe_req caused by platform noise. Kurt ++ rtw_write8(padapter, 0xc41, 0x42); ++ DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); ++ #endif ++ ++ //Enable P2P function ++ init_wifidirect_info(padapter, role); ++ ++ } ++ else if (role == P2P_ROLE_DISABLE) ++ { ++ #ifdef CONFIG_P2P_AGAINST_NOISE ++ rtw_write8(padapter, 0xc41, 0x40); ++ DBG_8192C("rtw_write8(0x%x)=0x%02x\n", 0xc41, rtw_read8(padapter, 0xc41)); ++ #endif ++ ++ //Disable P2P function ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DISABLE); ++ _rtw_memset(&pwdinfo->rx_prov_disc_info, 0x00, sizeof(struct rx_provdisc_req_info)); ++ } ++ ++ if(pwrpriv->bips_processing == _FALSE){ ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ } ++ ++exit: ++ return ret; ++} ++ ++#endif //CONFIG_P2P ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_pwrctrl.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_pwrctrl.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1227 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_PWRCTRL_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++#ifdef CONFIG_IPS ++void ips_enter(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ++ pwrpriv->bips_processing = _TRUE; ++ ++ // syn ips_mode with request ++ pwrpriv->ips_mode = pwrpriv->ips_mode_req; ++ ++ pwrpriv->ips_enter_cnts++; ++ DBG_8192C("==>ips_enter cnts:%d\n",pwrpriv->ips_enter_cnts); ++ ++ if(rf_off == pwrpriv->change_rfpwrstate ) ++ { ++ DBG_8192C("==>power_saving_ctrl_wk_hdl change rf to OFF...LED(0x%08x).... \n\n",rtw_read32(padapter,0x4c)); ++ ++ if(pwrpriv->ips_mode == IPS_LEVEL_2) ++ pwrpriv->bkeepfwalive = _TRUE; ++ ++ rtw_ips_pwr_down(padapter); ++ pwrpriv->rf_pwrstate = rf_off; ++ } ++ pwrpriv->bips_processing = _FALSE; ++ _exit_pwrlock(&pwrpriv->lock); ++ ++} ++ ++int ips_leave(_adapter * padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int result = _SUCCESS; ++ sint keyid; ++ _enter_pwrlock(&pwrpriv->lock); ++ if((pwrpriv->rf_pwrstate == rf_off) &&(!pwrpriv->bips_processing)) ++ { ++ pwrpriv->change_rfpwrstate = rf_on; ++ pwrpriv->ips_leave_cnts++; ++ DBG_8192C("==>ips_leave cnts:%d\n",pwrpriv->ips_leave_cnts); ++ ++ result = rtw_ips_pwr_up(padapter); ++ pwrpriv->bips_processing = _TRUE; ++ pwrpriv->rf_pwrstate = rf_on; ++ ++ if((_WEP40_ == psecuritypriv->dot11PrivacyAlgrthm) ||(_WEP104_ == psecuritypriv->dot11PrivacyAlgrthm)) ++ { ++ DBG_8192C("==>%s,channel(%d),processing(%x)\n",__FUNCTION__,padapter->mlmeextpriv.cur_channel,pwrpriv->bips_processing); ++ set_channel_bwmode(padapter, padapter->mlmeextpriv.cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ for(keyid=0;keyid<4;keyid++){ ++ if(pmlmepriv->key_mask & BIT(keyid)){ ++ if(keyid == psecuritypriv->dot11PrivacyKeyIndex) ++ result=rtw_set_key(padapter,psecuritypriv, keyid, 1); ++ else ++ result=rtw_set_key(padapter,psecuritypriv, keyid, 0); ++ } ++ } ++ } ++ ++ DBG_8192C("==> ips_leave.....LED(0x%08x)...\n",rtw_read32(padapter,0x4c)); ++ pwrpriv->bips_processing = _FALSE; ++ ++ pwrpriv->bkeepfwalive = _FALSE; ++ ++ ++ } ++ _exit_pwrlock(&pwrpriv->lock); ++ return result; ++} ++ ++ ++#endif ++ ++#ifdef CONFIG_AUTOSUSPEND ++extern void autosuspend_enter(_adapter* padapter); ++extern int autoresume_enter(_adapter* padapter); ++#endif ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++int rtw_hw_suspend(_adapter *padapter ); ++int rtw_hw_resume(_adapter *padapter); ++#endif ++ ++#ifdef PLATFORM_LINUX ++void rtw_ps_processor(_adapter*padapter) ++{ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++#endif //CONFIG_P2P ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int res; ++ rt_rf_power_state rfpwrstate; ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ if(pwrpriv->bips_processing == _TRUE) return; ++ ++ //DBG_8192C("==> fw report state(0x%x)\n",rtw_read8(padapter,0x1ca)); ++ if(padapter->pwrctrlpriv.bHWPwrPindetect) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ if(padapter->registrypriv.usbss_enable) ++ { ++ if(pwrpriv->rf_pwrstate == rf_on) ++ { ++ if(padapter->net_closed == _TRUE) ++ pwrpriv->ps_flag = _TRUE; ++ ++ rfpwrstate = RfOnOffDetect(padapter); ++ DBG_8192C("@@@@- #1 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); ++ if(rfpwrstate!= pwrpriv->rf_pwrstate) ++ { ++ if(rfpwrstate == rf_off) ++ { ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ pwrpriv->bkeepfwalive = _TRUE; ++ pwrpriv->brfoffbyhw = _TRUE; ++ ++ autosuspend_enter(padapter); ++ } ++ } ++ } ++ } ++ else ++ #endif //CONFIG_AUTOSUSPEND ++ { ++ rfpwrstate = RfOnOffDetect(padapter); ++ DBG_8192C("@@@@- #2 %s==> rfstate:%s \n",__FUNCTION__,(rfpwrstate==rf_on)?"rf_on":"rf_off"); ++ ++ if(rfpwrstate!= pwrpriv->rf_pwrstate) ++ { ++ if(rfpwrstate == rf_off) ++ { ++ pwrpriv->change_rfpwrstate = rf_off; ++ pwrpriv->brfoffbyhw = _TRUE; ++ padapter->bCardDisableWOHSM = _TRUE; ++ rtw_hw_suspend(padapter ); ++ } ++ else ++ { ++ pwrpriv->change_rfpwrstate = rf_on; ++ rtw_hw_resume(padapter ); ++ } ++ DBG_8192C("current rf_pwrstate(%s)\n",(pwrpriv->rf_pwrstate == rf_off)?"rf_off":"rf_on"); ++ } ++ } ++ pwrpriv->pwr_state_check_cnts ++; ++ } ++#endif //SUPPORT_HW_RFOFF_DETECTED ++ ++ if( pwrpriv->power_mgnt == PS_MODE_ACTIVE ) return; ++ ++ if((pwrpriv->rf_pwrstate == rf_on) && ((pwrpriv->pwr_state_check_cnts%4)==0)) ++ { ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (padapter->bup == _FALSE) ++ #ifdef CONFIG_P2P ++ || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++ #endif //CONFIG_P2P ++ ) ++ { ++ return; ++ } ++ ++ DBG_8192C("==>%s .fw_state(%x)\n",__FUNCTION__,get_fwstate(pmlmepriv)); ++ pwrpriv->change_rfpwrstate = rf_off; ++ ++ #ifdef CONFIG_AUTOSUSPEND ++ if(padapter->registrypriv.usbss_enable) ++ { ++ if(padapter->pwrctrlpriv.bHWPwrPindetect) ++ pwrpriv->bkeepfwalive = _TRUE; ++ ++ if(padapter->net_closed == _TRUE) ++ pwrpriv->ps_flag = _TRUE; ++ ++ padapter->bCardDisableWOHSM = _TRUE; ++ autosuspend_enter(padapter); ++ } ++ else if(padapter->pwrctrlpriv.bHWPwrPindetect) ++ { ++ } ++ else ++ #endif //CONFIG_AUTOSUSPEND ++ { ++ #ifdef CONFIG_IPS ++ ips_enter(padapter); ++ #endif ++ } ++ } ++ ++ ++} ++ ++void pwr_state_check_handler(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++#endif //CONFIG_P2P ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ //DBG_8192C("%s...bHWPwrPindetect(%d)\n",__FUNCTION__,padapter->pwrctrlpriv.bHWPwrPindetect); ++ if(padapter->pwrctrlpriv.bHWPwrPindetect) ++ { ++ rtw_ps_cmd(padapter); ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ } ++ else ++#endif ++ { ++ //if(padapter->net_closed == _TRUE) return; ++ //DBG_8192C("==>%s .fw_state(%x)\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ if ( (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, _FW_LINKED|_FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) || ++ (padapter->bup == _FALSE) ++#ifdef CONFIG_P2P ++ || !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) ++#endif //CONFIG_P2P ++ ) ++ { ++ //other pwr ctrl.... ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ } ++ else ++ { ++ if((pwrpriv->rf_pwrstate == rf_on) &&(_FALSE == pwrpriv->bips_processing)) ++ { ++ pwrpriv->change_rfpwrstate = rf_off; ++ pwrctrlpriv->pwr_state_check_cnts = 0; ++ DBG_8192C("==>pwr_state_check_handler .fw_state(%x)\n",get_fwstate(pmlmepriv)); ++ rtw_ps_cmd(padapter); ++ } ++ ++ } ++ } ++ ++ ++ ++} ++#endif ++ ++ ++#ifdef CONFIG_LPS ++void rtw_set_rpwm(_adapter * padapter, u8 val8) ++{ ++ u8 rpwm; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ if(pwrpriv->rpwm == val8){ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("Already set rpwm [%d] ! \n", val8)); ++ return; ++ } ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)){ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_set_rpwm=> bDriverStopped or bSurpriseRemoved \n")); ++ return; ++ } ++ rpwm = val8 |pwrpriv->tog; ++ ++ pwrpriv->rpwm = val8; ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_set_rpwm: value = %x\n", rpwm)); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_SET_RPWM, (u8 *)(&rpwm)); ++ ++ pwrpriv->tog += 0x80; ++ ++_func_exit_; ++} ++ ++u8 PS_RDY_CHECK(_adapter * padapter) ++{ ++ u32 curr_time, delta_time; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ curr_time = rtw_get_current_time(); ++ ++ delta_time = curr_time -pwrpriv->DelayLPSLastTimeStamp; ++ ++ if(delta_time < LPS_DELAY_TIME) ++ { ++ return _FALSE; ++ } ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) || ++ (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ) ++ return _FALSE; ++ ++ if(_TRUE == pwrpriv->bInSuspend ) ++ return _FALSE; ++ ++ if( (padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) && (padapter->securitypriv.binstallGrpkey == _FALSE) ) ++ { ++ DBG_8192C("Group handshake still in progress !!!\n"); ++ return _FALSE; ++ } ++ ++ return _TRUE; ++} ++ ++void rtw_set_ps_mode(_adapter * padapter, u8 ps_mode, u8 smart_ps) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("========= Power Mode is :%d, Smart_PS = %d\n", ps_mode,smart_ps)); ++ //DBG_8192C("========= Power Mode is :%d, Smart_PS = %d\n", ps_mode,smart_ps); ++ ++ if(ps_mode > PM_Card_Disable) { ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("ps_mode:%d error\n", ps_mode)); ++ return; ++ } ++ ++ if((pwrpriv->pwr_mode == ps_mode) && ++ (pwrpriv->smart_ps == smart_ps)){ ++ return; ++ } ++ ++ //if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) ++ if(ps_mode == PS_MODE_ACTIVE) ++ { ++#ifdef CONFIG_P2P ++ if(pwdinfo->opp_ps == 0) ++#endif //CONFIG_P2P ++ { ++ DBG_8192C("rtw_set_ps_mode(): Busy Traffic , Leave 802.11 power save..\n"); ++ pwrpriv->smart_ps = smart_ps; ++ pwrpriv->pwr_mode = ps_mode; ++ rtw_set_rpwm(padapter, PS_STATE_S4); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); ++ pwrpriv->bFwCurrentInPSMode = _FALSE; ++ } ++ } ++ else ++ { ++ if(PS_RDY_CHECK(padapter)) ++ { ++ DBG_8192C("rtw_set_ps_mode(): Enter 802.11 power save mode...\n"); ++ pwrpriv->smart_ps = smart_ps; ++ pwrpriv->pwr_mode = ps_mode; ++ pwrpriv->bFwCurrentInPSMode = _TRUE; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, (u8 *)(&ps_mode)); ++#ifdef CONFIG_P2P ++ // Set CTWindow after LPS ++ if(pwdinfo->opp_ps == 1) ++ //if(pwdinfo->p2p_ps_enable == _TRUE) ++ p2p_ps_wk_cmd(padapter, P2P_PS_ENABLE, 0); ++#endif //CONFIG_P2P ++ rtw_set_rpwm(padapter, PS_STATE_S2); ++ } ++ //else ++ //{ ++ // pwrpriv->pwr_mode = PS_MODE_ACTIVE; ++ //} ++ } ++ ++_func_exit_; ++} ++ ++ ++// ++// Description: ++// Enter the leisure power save mode. ++// ++void LPS_Enter(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++_func_enter_; ++ ++// DBG_871X("+LeisurePSEnter\n"); ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) || ++ (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ) ++ return; ++ ++ if(_TRUE == pwrpriv->bInSuspend ) ++ return ; ++ ++ if (pwrpriv->bLeisurePs) ++ { ++ // Idle for a while if we connect to AP a while ago. ++ if(pwrpriv->LpsIdleCount >= 2) // 4 Sec ++ { ++ if(pwrpriv->pwr_mode == PS_MODE_ACTIVE) ++ { ++ rtw_set_ps_mode(padapter, pwrpriv->power_mgnt, 2); ++ } ++ } ++ else ++ pwrpriv->LpsIdleCount++; ++ } ++ ++_func_exit_; ++} ++ ++ ++// ++// Description: ++// Leave the leisure power save mode. ++// ++void LPS_Leave(PADAPTER padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++_func_enter_; ++ ++ //DBG_8192C("LeisurePSLeave()...\n"); ++ ++ if (pwrpriv->bLeisurePs) ++ { ++ if(pwrpriv->pwr_mode != PS_MODE_ACTIVE) ++ { ++ rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0); ++ } ++ } ++ ++_func_exit_; ++} ++ ++#endif ++ ++// ++// Description: Leave all power save mode: LPS, FwLPS, IPS if needed. ++// Move code to function by tynli. 2010.03.26. ++// ++void LeaveAllPowerSaveMode(IN PADAPTER Adapter) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ u32 LPSLeaveTimeOut = 10000; ++ //u32 IPSLeaveTimeOut = 10000; ++ ++_func_enter_; ++ ++ //DBG_8192C("%s.....\n",__FUNCTION__); ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { //connect ++#ifdef CONFIG_P2P ++ p2p_ps_wk_cmd(Adapter, P2P_PS_DISABLE, 0); ++#endif //CONFIG_P2P ++#ifdef CONFIG_LPS ++ //DBG_8192C("==> leave LPS.......\n"); ++ LPS_Leave(Adapter); ++ ++ if (Adapter->pwrctrlpriv.bLeisurePs) ++ { ++ BOOLEAN bAwake = _TRUE; ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bAwake)); ++ while(!bAwake) ++ { ++ rtw_usleep_os(100); ++ LPSLeaveTimeOut--; ++ if(LPSLeaveTimeOut <= 0) ++ { ++ DBG_8192C("Wait for FW LPS leave too long!!! LPSLeaveTimeOut = %d\n", LPSLeaveTimeOut ); ++ break; ++ } ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bAwake)); ++ } ++ } ++#endif ++ } ++ else ++ { ++ if(Adapter->pwrctrlpriv.rf_pwrstate== rf_off) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ if(Adapter->registrypriv.usbss_enable) ++ { ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_disable_autosuspend(Adapter->dvobjpriv.pusbdev); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ Adapter->dvobjpriv.pusbdev->autosuspend_disabled = Adapter->bDisableAutosuspend;//autosuspend disabled by the user ++ #endif ++ } ++ else ++ #endif ++ { ++ /* ++ #ifdef CONFIG_IPS ++ if(_FALSE == ips_leave(Adapter)) ++ { ++ DBG_8192C("======> ips_leave fail.............\n"); ++ } ++ #endif ++ */ ++ } ++ } ++ } ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_PWRCTRL ++ ++/* ++Caller:ISR handler... ++ ++This will be called when CPWM interrupt is up. ++ ++using to update cpwn of drv; and drv willl make a decision to up or down pwr level ++*/ ++void cpwm_int_hdl(_adapter *padapter, struct reportpwrstate_parm *preportpwrstate) ++{ ++ struct pwrctrl_priv *pwrpriv = &(padapter->pwrctrlpriv); ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ ++_func_enter_; ++ ++ if(pwrpriv->cpwm_tog == ((preportpwrstate->state)&0x80)){ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm_tog = %x this time cpwm=0x%x toggle bit didn't change !!!\n",pwrpriv->cpwm_tog ,preportpwrstate->state)); ++ goto exit; ++ } ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ ++ pwrpriv->cpwm = (preportpwrstate->state)&0xf; ++ ++ if(pwrpriv->cpwm >= PS_STATE_S2){ ++ if(pwrpriv->alives & CMD_ALIVE) ++ _rtw_up_sema(&(pcmdpriv->cmd_queue_sema)); ++ ++ if(pwrpriv->alives & XMIT_ALIVE) ++ _rtw_up_sema(&(pxmitpriv->xmit_sema)); ++ } ++ pwrpriv->cpwm_tog= (preportpwrstate->state)&0x80; ++ _exit_pwrlock(&pwrpriv->lock); ++exit: ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("cpwm_int_hdl : cpwm = %x !!!\n",pwrpriv->cpwm)); ++ ++_func_exit_; ++ ++} ++ ++ ++__inline static void register_task_alive(struct pwrctrl_priv *pwrctrl, uint tag) ++{ ++_func_enter_; ++ pwrctrl->alives |= tag; ++_func_exit_; ++} ++ ++__inline static void unregister_task_alive(struct pwrctrl_priv *pwrctrl, uint tag) ++{ ++_func_enter_; ++ ++ if (pwrctrl->alives & tag) ++ pwrctrl->alives ^= tag; ++ ++_func_exit_; ++} ++#endif ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++static void resume_workitem_callback(struct work_struct *work); ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++void rtw_init_pwrctrl_priv(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++#ifdef PLATFORM_WINDOWS ++ pwrctrlpriv->pnp_current_pwr_state=NdisDeviceStateD0; ++#endif ++ ++ _init_pwrlock(&pwrctrlpriv->lock); ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ pwrctrlpriv->ips_enter_cnts=0; ++ pwrctrlpriv->ips_leave_cnts=0; ++ ++ pwrctrlpriv->ips_mode = padapter->registrypriv.ips_mode; ++ pwrctrlpriv->ips_mode_req = padapter->registrypriv.ips_mode; ++ ++ pwrctrlpriv->pwr_state_check_interval = 2000; ++ pwrctrlpriv->pwr_state_check_cnts = 0; ++ pwrctrlpriv->bInternalAutoSuspend = _FALSE; ++ pwrctrlpriv->bInSuspend = _FALSE; ++ pwrctrlpriv->bkeepfwalive = _FALSE; ++ ++#ifdef CONFIG_AUTOSUSPEND ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ pwrctrlpriv->pwr_state_check_interval = (pwrctrlpriv->bHWPwrPindetect) ?1000:2000; ++#endif ++#endif ++ ++ pwrctrlpriv->LpsIdleCount = 0; ++ //pwrctrlpriv->FWCtrlPSMode =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; ++ pwrctrlpriv->power_mgnt =padapter->registrypriv.power_mgnt;// PS_MODE_MIN; ++ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; ++ ++ pwrctrlpriv->bFwCurrentInPSMode = _FALSE; ++ ++ pwrctrlpriv->cpwm = PS_STATE_S4; ++ ++ pwrctrlpriv->pwr_mode = PS_MODE_ACTIVE; ++ ++ ++ pwrctrlpriv->smart_ps = 0; ++ ++ pwrctrlpriv->tog = 0x80; ++ ++#ifdef PLATFORM_LINUX ++ _init_timer(&(pwrctrlpriv->pwr_state_check_timer), padapter->pnetdev, pwr_state_check_handler, (u8 *)padapter); ++#endif ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ _init_workitem(&pwrctrlpriv->resume_work, resume_workitem_callback, NULL); ++ pwrctrlpriv->rtw_workqueue = create_singlethread_workqueue("rtw_workqueue"); ++ #endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++ #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ pwrctrlpriv->early_suspend.suspend = NULL; ++ rtw_register_early_suspend(pwrctrlpriv); ++ #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER ++ ++ ++_func_exit_; ++ ++} ++ ++ ++void rtw_free_pwrctrl_priv(_adapter *adapter) ++{ ++ struct pwrctrl_priv *pwrctrlpriv = &adapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ //_rtw_memset((unsigned char *)pwrctrlpriv, 0, sizeof(struct pwrctrl_priv)); ++ ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ if (pwrctrlpriv->rtw_workqueue) { ++ flush_workqueue(pwrctrlpriv->rtw_workqueue); ++ destroy_workqueue(pwrctrlpriv->rtw_workqueue); ++ } ++ #endif ++ ++ ++ #if defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(pwrctrlpriv); ++ #endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER ++ ++ _free_pwrlock(&pwrctrlpriv->lock); ++ ++_func_exit_; ++} ++ ++ ++/* ++Caller: rtw_xmit_thread ++ ++Check if the fw_pwrstate is okay for xmit. ++If not (cpwm is less than P1 state), then the sub-routine ++will raise the cpwm to be greater than or equal to P1. ++ ++Calling Context: Passive ++ ++Return Value: ++ ++_SUCCESS: rtw_xmit_thread can write fifo/txcmd afterwards. ++_FAIL: rtw_xmit_thread can not do anything. ++*/ ++sint rtw_register_tx_alive(_adapter *padapter) ++{ ++ uint res = _SUCCESS; ++ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, XMIT_ALIVE); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_tx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ if(pwrctrl->cpwm < PS_STATE_S2){ ++ rtw_set_rpwm(padapter, PS_STATE_S3); ++ res = _FAIL; ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /* CONFIG_PWRCTRL */ ++ ++ return res; ++ ++} ++ ++/* ++Caller: rtw_cmd_thread ++ ++Check if the fw_pwrstate is okay for issuing cmd. ++If not (cpwm should be is less than P2 state), then the sub-routine ++will raise the cpwm to be greater than or equal to P2. ++ ++Calling Context: Passive ++ ++Return Value: ++ ++_SUCCESS: rtw_cmd_thread can issue cmds to firmware afterwards. ++_FAIL: rtw_cmd_thread can not do anything. ++*/ ++sint rtw_register_cmd_alive(_adapter *padapter) ++{ ++ uint res = _SUCCESS; ++ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, CMD_ALIVE); ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_cmd_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ if(pwrctrl->cpwm < PS_STATE_S2){ ++ rtw_set_rpwm(padapter, PS_STATE_S3); ++ res = _FAIL; ++ } ++ ++ _exit_pwrlock(&pwrctrl->lock); ++_func_exit_; ++#endif ++ ++ return res; ++} ++ ++ ++/* ++Caller: rx_isr ++ ++Calling Context: Dispatch/ISR ++ ++Return Value: ++ ++*/ ++sint rtw_register_rx_alive(_adapter *padapter) ++{ ++ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, RECV_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_register_rx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /*CONFIG_PWRCTRL*/ ++ ++ return _SUCCESS; ++} ++ ++ ++/* ++Caller: evt_isr or evt_thread ++ ++Calling Context: Dispatch/ISR or Passive ++ ++Return Value: ++*/ ++sint rtw_register_evt_alive(_adapter *padapter) ++{ ++ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ register_task_alive(pwrctrl, EVT_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_info_,("rtw_register_evt_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /*CONFIG_PWRCTRL*/ ++ ++ return _SUCCESS; ++} ++ ++ ++/* ++Caller: ISR ++ ++If ISR's txdone, ++No more pkts for TX, ++Then driver shall call this fun. to power down firmware again. ++*/ ++ ++void rtw_unregister_tx_alive(_adapter *padapter) ++{ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, XMIT_ALIVE); ++ ++ if((pwrctrl->cpwm > PS_STATE_S2) && (pwrctrl->pwr_mode > PS_MODE_ACTIVE)){ ++ if(pwrctrl->alives == 0){ ++ rtw_set_rpwm(padapter, PS_STATE_S0); ++ } ++ } ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_tx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /*CONFIG_PWRCTRL*/ ++} ++ ++/* ++Caller: ISR ++ ++If ISR's txdone, ++No more pkts for TX, ++Then driver shall call this fun. to power down firmware again. ++*/ ++ ++void rtw_unregister_cmd_alive(_adapter *padapter) ++{ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, CMD_ALIVE); ++ ++ if((pwrctrl->cpwm > PS_STATE_S2) && (pwrctrl->pwr_mode > PS_MODE_ACTIVE)){ ++ if((pwrctrl->alives == 0)&&(check_fwstate(&padapter->mlmepriv, _FW_UNDER_LINKING)!=_TRUE)){ ++ rtw_set_rpwm(padapter, PS_STATE_S0); ++ } ++ } ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_cmd_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /*CONFIG_PWRCTRL*/ ++} ++ ++ ++/* ++ ++Caller: ISR ++ ++*/ ++void rtw_unregister_rx_alive(_adapter *padapter) ++{ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, RECV_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_rx_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif ++} ++ ++ ++void rtw_unregister_evt_alive(_adapter *padapter) ++{ ++#ifdef CONFIG_PWRCTRL ++ ++ struct pwrctrl_priv *pwrctrl = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ _enter_pwrlock(&pwrctrl->lock); ++ ++ unregister_task_alive(pwrctrl, EVT_ALIVE); ++ ++ RT_TRACE(_module_rtl871x_pwrctrl_c_,_drv_err_,("rtw_unregister_evt_alive: cpwm:%d alives:%x\n", pwrctrl->cpwm, pwrctrl->alives)); ++ ++ _exit_pwrlock(&pwrctrl->lock); ++ ++_func_exit_; ++ ++#endif /*CONFIG_PWRCTRL*/ ++} ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++#ifdef CONFIG_USB_HCI ++extern int rtw_resume_process(struct usb_interface *pusb_intf); ++#endif ++static void resume_workitem_callback(struct work_struct *work) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(work, struct pwrctrl_priv, resume_work); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ #ifdef CONFIG_USB_HCI ++ rtw_resume_process(adapter->dvobjpriv.pusbintf); ++ #elif defined(CONFIG_PCI_HCI) ++ #endif ++ ++} ++ ++void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv) ++{ ++ // accquire system's suspend lock preventing from falliing asleep while resume in workqueue ++ rtw_lock_suspend(); ++ ++ #if 1 ++ queue_work(pwrpriv->rtw_workqueue, &pwrpriv->resume_work); ++ #else ++ _set_workitem(&pwrpriv->resume_work); ++ #endif ++} ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++#ifdef CONFIG_USB_HCI ++extern int rtw_resume_process(struct usb_interface *pusb_intf); ++#endif ++static void rtw_early_suspend(struct early_suspend *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ //jeff: do nothing but set do_late_resume to false ++ pwrpriv->do_late_resume = _FALSE; ++} ++ ++static void rtw_late_resume(struct early_suspend *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ if(pwrpriv->do_late_resume) { ++ #ifdef CONFIG_USB_HCI ++ rtw_resume_process(adapter->dvobjpriv.pusbintf); ++ pwrpriv->do_late_resume = _FALSE; ++ #elif defined(CONFIG_PCI_HCI) ++ #endif ++ } ++} ++ ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit ++ pwrpriv->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; ++ pwrpriv->early_suspend.suspend = rtw_early_suspend; ++ pwrpriv->early_suspend.resume = rtw_late_resume; ++ register_early_suspend(&pwrpriv->early_suspend); ++ ++ ++} ++ ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwrpriv->do_late_resume = _FALSE; ++ ++ if (pwrpriv->early_suspend.suspend) ++ unregister_early_suspend(&pwrpriv->early_suspend); ++ ++ pwrpriv->early_suspend.suspend = NULL; ++ pwrpriv->early_suspend.resume = NULL; ++} ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++#ifdef CONFIG_ANDROID_POWER ++#ifdef CONFIG_USB_HCI ++extern int rtw_resume_process(struct usb_interface *pusb_intf); ++#endif ++static void rtw_early_suspend(android_early_suspend_t *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ DBG_871X("%s\n",__FUNCTION__); ++ ++ //jeff: do nothing but set do_late_resume to false ++ pwrpriv->do_late_resume = _FALSE; ++} ++ ++static void rtw_late_resume(android_early_suspend_t *h) ++{ ++ struct pwrctrl_priv *pwrpriv = container_of(h, struct pwrctrl_priv, early_suspend); ++ _adapter *adapter = container_of(pwrpriv, _adapter, pwrctrlpriv); ++ ++ DBG_871X("%s\n",__FUNCTION__); ++ if(pwrpriv->do_late_resume) { ++ #ifdef CONFIG_USB_HCI ++ rtw_resume_process(adapter->dvobjpriv.pusbintf); ++ pwrpriv->do_late_resume = _FALSE; ++ #elif defined(CONFIG_PCI_HCI) ++ #endif ++ } ++} ++ ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ //jeff: set the early suspend level before blank screen, so we wll do late resume after scree is lit ++ pwrpriv->early_suspend.level = ANDROID_EARLY_SUSPEND_LEVEL_BLANK_SCREEN - 20; ++ pwrpriv->early_suspend.suspend = rtw_early_suspend; ++ pwrpriv->early_suspend.resume = rtw_late_resume; ++ android_register_early_suspend(&pwrpriv->early_suspend); ++} ++ ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwrpriv->do_late_resume = _FALSE; ++ ++ if (pwrpriv->early_suspend.suspend) ++ android_unregister_early_suspend(&pwrpriv->early_suspend); ++ ++ pwrpriv->early_suspend.suspend = NULL; ++ pwrpriv->early_suspend.resume = NULL; ++} ++#endif //CONFIG_ANDROID_POWER ++ ++u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val) ++{ ++ u8 bResult = _TRUE; ++ if(padapter->HalFunc.interface_ps_func) ++ { ++ bResult = padapter->HalFunc.interface_ps_func(padapter,efunc_id,val); ++ } ++ return bResult; ++} ++ ++/* ++* rtw_pwr_wakeup - Wake the NIC up from: 1)IPS. 2)USB autosuspend ++* @adapter: pointer to _adapter structure ++* ++* Return _SUCCESS or _FAIL ++*/ ++int _rtw_pwr_wakeup(_adapter *padapter, const char *caller) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ int ret = _SUCCESS; ++ ++ //System suspend is not allowed to wakeup ++ if((pwrpriv->bInternalAutoSuspend == _FALSE) && (_TRUE == pwrpriv->bInSuspend )){ ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //I think this should be check in IPS, LPS, autosuspend functions... ++ //if( pwrpriv->power_mgnt == PS_MODE_ACTIVE ) { ++ // goto exit; ++ //} ++ ++ //block??? ++ if((pwrpriv->bInternalAutoSuspend == _TRUE) && (padapter->net_closed == _TRUE)) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ //I think this should be check in IPS, LPS, autosuspend functions... ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ ret = _SUCCESS; ++ goto exit; ++ } ++ ++ if(rf_off == pwrpriv->rf_pwrstate ) ++ { ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_AUTOSUSPEND ++ if(pwrpriv->brfoffbyhw==_TRUE) ++ { ++ DBG_8192C("hw still in rf_off state ...........\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ else if(padapter->registrypriv.usbss_enable) ++ { ++ DBG_8192C("\n %s call autoresume_enter....\n",__FUNCTION__); ++ if(_FAIL == autoresume_enter(padapter)) ++ { ++ DBG_8192C("======> autoresume fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ else ++#endif ++#endif ++ { ++#ifdef CONFIG_IPS ++ DBG_8192C("\n %s call ips_leave....\n",__FUNCTION__); ++ if(_FAIL == ips_leave(padapter)) ++ { ++ DBG_8192C("======> ips_leave fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++#endif ++ } ++ }else { ++ //Jeff: reset timer to avoid falling ips or selective suspend soon ++ if(pwrpriv->bips_processing == _FALSE) ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ ++ //TODO: the following checking need to be merged... ++ if(padapter->bDriverStopped ++ || !padapter->bup ++ || !padapter->hw_init_completed ++ ){ ++ DBG_8192C("%s: bDriverStopped=%d, bup=%d, hw_init_completed=%u\n" ++ , caller ++ , padapter->bDriverStopped ++ , padapter->bup ++ , padapter->hw_init_completed); ++ ret= _FALSE; ++ goto exit; ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_recv.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_recv.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,4597 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_RECV_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS); ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ ++void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv) ++{ ++ ++ ++_func_enter_; ++ ++ _rtw_memset((u8 *)psta_recvpriv, 0, sizeof (struct sta_recv_priv)); ++ ++ _rtw_spinlock_init(&psta_recvpriv->lock); ++ ++ //for(i=0; iblk_strms[i]); ++ ++ _rtw_init_queue(&psta_recvpriv->defrag_q); ++ ++_func_exit_; ++ ++} ++ ++sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter) ++{ ++ sint i; ++ ++ union recv_frame *precvframe; ++ ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)precvpriv, 0, sizeof (struct recv_priv)); ++ ++ _rtw_spinlock_init(&precvpriv->lock); ++ ++ _rtw_init_queue(&precvpriv->free_recv_queue); ++ _rtw_init_queue(&precvpriv->recv_pending_queue); ++ ++ precvpriv->adapter = padapter; ++ ++ precvpriv->free_recvframe_cnt = NR_RECVFRAME; ++ ++ rtw_os_recv_resource_init(precvpriv, padapter); ++ ++ precvpriv->pallocated_frame_buf = rtw_zvmalloc(NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ ++ if(precvpriv->pallocated_frame_buf==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ //_rtw_memset(precvpriv->pallocated_frame_buf, 0, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ ++ precvpriv->precv_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_frame_buf), RXFRAME_ALIGN_SZ); ++ //precvpriv->precv_frame_buf = precvpriv->pallocated_frame_buf + RXFRAME_ALIGN_SZ - ++ // ((SIZE_PTR) (precvpriv->pallocated_frame_buf) &(RXFRAME_ALIGN_SZ-1)); ++ ++ precvframe = (union recv_frame*) precvpriv->precv_frame_buf; ++ ++ ++ for(i=0; i < NR_RECVFRAME ; i++) ++ { ++ _rtw_init_listhead(&(precvframe->u.list)); ++ ++ rtw_list_insert_tail(&(precvframe->u.list), &(precvpriv->free_recv_queue.queue)); ++ ++ res = rtw_os_recv_resource_alloc(padapter, precvframe); ++ ++ precvframe->u.hdr.adapter =padapter; ++ precvframe++; ++ ++ } ++ ++#ifdef CONFIG_USB_HCI ++ ++ precvpriv->rx_pending_cnt=1; ++ ++ _rtw_init_sema(&precvpriv->allrxreturnevt, 0); ++ ++#endif ++ ++ res = padapter->HalFunc.init_recv_priv(padapter); ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ #ifdef PLATFORM_LINUX ++ _init_timer(&precvpriv->signal_stat_timer, padapter->pnetdev, RTW_TIMER_HDL_NAME(signal_stat), padapter); ++ #elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS) ++ _init_timer(&precvpriv->signal_stat_timer, padapter->hndis_adapter, RTW_TIMER_HDL_NAME(signal_stat), padapter); ++ #endif ++ ++ precvpriv->signal_stat_sampling_interval = 1000; //ms ++ //precvpriv->signal_stat_converging_constant = 5000; //ms ++ ++ rtw_set_signal_stat_timer(precvpriv); ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++void rtw_mfree_recv_priv_lock(struct recv_priv *precvpriv) ++{ ++ _rtw_spinlock_free(&precvpriv->lock); ++#ifdef CONFIG_RECV_THREAD_MODE ++ _rtw_free_sema(&precvpriv->recv_sema); ++ _rtw_free_sema(&precvpriv->terminate_recvthread_sema); ++#endif ++ ++ _rtw_spinlock_free(&precvpriv->free_recv_queue.lock); ++ _rtw_spinlock_free(&precvpriv->recv_pending_queue.lock); ++ ++ _rtw_spinlock_free(&precvpriv->free_recv_buf_queue.lock); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ _rtw_spinlock_free(&precvpriv->recv_buf_pending_queue.lock); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++} ++ ++void _rtw_free_recv_priv (struct recv_priv *precvpriv) ++{ ++ _adapter *padapter = precvpriv->adapter; ++ ++_func_enter_; ++ ++ rtw_mfree_recv_priv_lock(precvpriv); ++ ++ rtw_os_recv_resource_free(precvpriv); ++ ++ if(precvpriv->pallocated_frame_buf) { ++ rtw_vmfree(precvpriv->pallocated_frame_buf, NR_RECVFRAME * sizeof(union recv_frame) + RXFRAME_ALIGN_SZ); ++ } ++ ++ padapter->HalFunc.free_recv_priv(padapter); ++ ++_func_exit_; ++ ++} ++ ++union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue) ++{ ++ _irqL irqL; ++ union recv_frame *precvframe; ++ _list *plist, *phead; ++ _adapter *padapter; ++ struct recv_priv *precvpriv; ++_func_enter_; ++ ++ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(pfree_recv_queue) == _TRUE) ++ { ++ precvframe = NULL; ++ } ++ else ++ { ++ phead = get_list_head(pfree_recv_queue); ++ ++ plist = get_next(phead); ++ ++ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ rtw_list_delete(&precvframe->u.hdr.list); ++ padapter=precvframe->u.hdr.adapter; ++ if(padapter !=NULL){ ++ precvpriv=&padapter->recvpriv; ++ if(pfree_recv_queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt--; ++ } ++ } ++ ++ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return precvframe; ++ ++} ++ ++ ++void rtw_init_recvframe(union recv_frame *precvframe, struct recv_priv *precvpriv) ++{ ++ struct recv_buf *precvbuf = precvframe->u.hdr.precvbuf; ++ ++ /* Perry: This can be removed */ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ ++ precvframe->u.hdr.len=0; ++ ++ ++} ++ ++ ++int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue) ++{ ++ _irqL irqL; ++ _adapter *padapter=precvframe->u.hdr.adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++_func_enter_; ++ ++ ++#ifdef PLATFORM_WINDOWS ++ rtw_os_read_port(padapter, precvframe->u.hdr.precvbuf); ++#endif ++ ++#ifdef PLATFORM_LINUX ++ ++ if(precvframe->u.hdr.pkt) ++ { ++ dev_kfree_skb_any(precvframe->u.hdr.pkt);//free skb by driver ++ precvframe->u.hdr.pkt = NULL; ++ } ++ ++#ifdef CONFIG_SDIO_HCI ++{ ++ _irqL irql; ++ struct recv_buf *precvbuf=precvframe->u.hdr.precvbuf; ++ if(precvbuf !=NULL){ ++ _enter_critical_bh(&precvbuf->recvbuf_lock, &irql); ++ ++ precvbuf->ref_cnt--; ++ if(precvbuf->ref_cnt == 0 ){ ++ _enter_critical_bh(&precvpriv->free_recv_buf_queue.lock, &irqL); ++ rtw_list_delete(&(precvbuf->list)); ++ rtw_list_insert_tail(&(precvbuf->list), get_list_head(&precvpriv->free_recv_buf_queue)); ++ precvpriv->free_recv_buf_queue_cnt++; ++ _exit_critical_bh(&precvpriv->free_recv_buf_queue.lock, &irqL); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_notice_,("rtw_os_read_port: precvbuf=0x%p enqueue:precvpriv->free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt)); ++ } ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_notice_,("rtw_os_read_port: precvbuf=0x%p enqueue:precvpriv->free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt)); ++ _exit_critical_bh(&precvbuf->recvbuf_lock, &irql); ++ } ++} ++#endif ++#endif ++ ++ _enter_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++ rtw_list_delete(&(precvframe->u.hdr.list)); ++ ++ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(pfree_recv_queue)); ++ ++ if(padapter !=NULL){ ++ if(pfree_recv_queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt++; ++ } ++ ++ _exit_critical_bh(&pfree_recv_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++ ++union recv_frame *rtw_dequeue_recvframe (_queue *queue) ++{ ++ return rtw_alloc_recvframe(queue); ++} ++ ++ ++sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) ++{ ++ _irqL irqL; ++ _adapter *padapter=precvframe->u.hdr.adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++_func_enter_; ++ ++ ++ //_spinlock(&pfree_recv_queue->lock); ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ //_rtw_init_listhead(&(precvframe->u.hdr.list)); ++ rtw_list_delete(&(precvframe->u.hdr.list)); ++ ++ ++ rtw_list_insert_tail(&(precvframe->u.hdr.list), get_list_head(queue)); ++ ++ if (padapter != NULL) { ++ if (queue == &precvpriv->free_recv_queue) ++ precvpriv->free_recvframe_cnt++; ++ } ++ ++ //_rtw_spinunlock(&pfree_recv_queue->lock); ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++/* ++sint rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue) ++{ ++ return rtw_free_recvframe(precvframe, queue); ++} ++*/ ++ ++ ++ ++ ++/* ++caller : defrag ; recvframe_chk_defrag in recv_thread (passive) ++pframequeue: defrag_queue : will be accessed in recv_thread (passive) ++ ++using spinlock to protect ++ ++*/ ++ ++void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue) ++{ ++ union recv_frame *precvframe; ++ _list *plist, *phead; ++ ++_func_enter_; ++ _rtw_spinlock(&pframequeue->lock); ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ precvframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ plist = get_next(plist); ++ ++ //rtw_list_delete(&precvframe->u.hdr.list); // will do this in rtw_free_recvframe() ++ ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ } ++ ++ _rtw_spinunlock(&pframequeue->lock); ++ ++_func_exit_; ++ ++} ++ ++sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue) ++{ ++ _irqL irqL; ++ ++ _enter_critical(&queue->lock, &irqL); ++ ++ rtw_list_delete(&precvbuf->list); ++ ++ rtw_list_insert_tail(&precvbuf->list, get_list_head(queue)); ++ ++ _exit_critical(&queue->lock, &irqL); ++ ++ ++ return _SUCCESS; ++ ++} ++ ++struct recv_buf *rtw_dequeue_recvbuf (_queue *queue) ++{ ++ _irqL irqL; ++ struct recv_buf *precvbuf; ++ _list *plist, *phead; ++ ++ _enter_critical(&queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(queue) == _TRUE) ++ { ++ precvbuf = NULL; ++ } ++ else ++ { ++ phead = get_list_head(queue); ++ ++ plist = get_next(phead); ++ ++ precvbuf = LIST_CONTAINOR(plist, struct recv_buf, list); ++ ++ rtw_list_delete(&precvbuf->list); ++ ++ } ++ ++ _exit_critical(&queue->lock, &irqL); ++ ++ ++ return precvbuf; ++ ++} ++ ++static sint recvframe_chkmic(_adapter *adapter, union recv_frame *precvframe){ ++ ++ sint i,res=_SUCCESS; ++ u32 datalen; ++ u8 miccode[8]; ++ u8 bmic_err=_FALSE,brpt_micerror = _TRUE; ++ u8 *pframe, *payload,*pframemic; ++ u8 *mickey,*iv,rxdata_key_idx; ++ struct sta_info *stainfo; ++ struct rx_pkt_attrib *prxattrib=&precvframe->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&adapter->securitypriv; ++ ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++_func_enter_; ++ ++ stainfo=rtw_get_stainfo(&adapter->stapriv ,&prxattrib->ta[0]); ++ ++ if(prxattrib->encrypt ==_TKIP_) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:prxattrib->encrypt ==_TKIP_\n")); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic:da=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2],prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5])); ++ ++ //calculate mic code ++ if(stainfo!= NULL) ++ { ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ //mickey=&psecuritypriv->dot118021XGrprxmickey.skey[0]; ++ //iv = precvframe->u.hdr.rx_data+prxattrib->hdrlen; ++ //rxdata_key_idx =( ((iv[3])>>6)&0x3) ; ++ mickey=&psecuritypriv->dot118021XGrprxmickey[prxattrib->key_index].skey[0]; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n recvframe_chkmic: bcmc key \n")); ++ //DBG_8192C("\n recvframe_chkmic: bcmc key psecuritypriv->dot118021XGrpKeyid(%d),pmlmeinfo->key_index(%d) ,recv key_id(%d)\n", ++ // psecuritypriv->dot118021XGrpKeyid,pmlmeinfo->key_index,rxdata_key_idx); ++ ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n")); ++ DBG_8192C("\n recvframe_chkmic:didn't install group key!!!!!!!!!!\n"); ++ goto exit; ++ } ++ } ++ else{ ++ mickey=&stainfo->dot11tkiprxmickey.skey[0]; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n recvframe_chkmic: unicast key \n")); ++ } ++ ++ datalen=precvframe->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len-prxattrib->icv_len-8;//icv_len included the mic code ++ pframe=precvframe->u.hdr.rx_data; ++ payload=pframe+prxattrib->hdrlen+prxattrib->iv_len; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n prxattrib->iv_len=%d prxattrib->icv_len=%d\n",prxattrib->iv_len,prxattrib->icv_len)); ++ ++ //rtw_seccalctkipmic(&stainfo->dot11tkiprxmickey.skey[0],pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data ++ ++ rtw_seccalctkipmic(mickey,pframe,payload, datalen ,&miccode[0],(unsigned char)prxattrib->priority); //care the length of the data ++ ++ pframemic=payload+datalen; ++ ++ bmic_err=_FALSE; ++ ++ for(i=0;i<8;i++){ ++ if(miccode[i] != *(pframemic+i)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic:miccode[%d](%02x) != *(pframemic+%d)(%02x) ",i,miccode[i],i,*(pframemic+i))); ++ bmic_err=_TRUE; ++ } ++ } ++ ++ ++ if(bmic_err==_TRUE){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-8)-*(pframemic-1)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ *(pframemic-8),*(pframemic-7),*(pframemic-6),*(pframemic-5),*(pframemic-4),*(pframemic-3),*(pframemic-2),*(pframemic-1))); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n *(pframemic-16)-*(pframemic-9)=0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x\n", ++ *(pframemic-16),*(pframemic-15),*(pframemic-14),*(pframemic-13),*(pframemic-12),*(pframemic-11),*(pframemic-10),*(pframemic-9))); ++ ++ { ++ uint i; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet (len=%d)======\n",precvframe->u.hdr.len)); ++ for(i=0;iu.hdr.len;i=i+8){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x:0x%02x", ++ *(precvframe->u.hdr.rx_data+i),*(precvframe->u.hdr.rx_data+i+1), ++ *(precvframe->u.hdr.rx_data+i+2),*(precvframe->u.hdr.rx_data+i+3), ++ *(precvframe->u.hdr.rx_data+i+4),*(precvframe->u.hdr.rx_data+i+5), ++ *(precvframe->u.hdr.rx_data+i+6),*(precvframe->u.hdr.rx_data+i+7))); ++ } ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ======demp packet end [len=%d]======\n",precvframe->u.hdr.len)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n hrdlen=%d, \n",prxattrib->hdrlen)); ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ra=0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x psecuritypriv->binstallGrpkey=%d ", ++ prxattrib->ra[0],prxattrib->ra[1],prxattrib->ra[2], ++ prxattrib->ra[3],prxattrib->ra[4],prxattrib->ra[5],psecuritypriv->binstallGrpkey)); ++ ++ // double check key_index for some timing issue , ++ // cannot compare with psecuritypriv->dot118021XGrpKeyid also cause timing issue ++ if((IS_MCAST(prxattrib->ra)==_TRUE) && (prxattrib->key_index != pmlmeinfo->key_index )) ++ brpt_micerror = _FALSE; ++ ++ if((prxattrib->bdecrypted ==_TRUE)&& (brpt_micerror == _TRUE)) ++ { ++ rtw_handle_tkip_mic_err(adapter,(u8)IS_MCAST(prxattrib->ra)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted)); ++ DBG_8192C(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted); ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" mic error :prxattrib->bdecrypted=%d ",prxattrib->bdecrypted)); ++ DBG_8192C(" mic error :prxattrib->bdecrypted=%d\n",prxattrib->bdecrypted); ++ } ++ ++ res=_FAIL; ++ ++ } ++ else{ ++ //mic checked ok ++ if((psecuritypriv->bcheck_grpkey ==_FALSE)&&(IS_MCAST(prxattrib->ra)==_TRUE)){ ++ psecuritypriv->bcheck_grpkey =_TRUE; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->bcheck_grpkey =_TRUE")); ++ } ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic: rtw_get_stainfo==NULL!!!\n")); ++ } ++ ++ recvframe_pull_tail(precvframe, 8); ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++//decrypt and set the ivlen,icvlen of the recv_frame ++static union recv_frame * decryptor(_adapter *padapter,union recv_frame *precv_frame) ++{ ++ u32 res=_SUCCESS; ++ ++ struct rx_pkt_attrib *prxattrib = &precv_frame->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ union recv_frame *return_packet=precv_frame; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("prxstat->decrypted=%x prxattrib->encrypt = 0x%03x\n",prxattrib->bdecrypted,prxattrib->encrypt)); ++ ++ if(prxattrib->encrypt>0) ++ { ++ u8 *iv = precv_frame->u.hdr.rx_data+prxattrib->hdrlen; ++ prxattrib->key_index = ( ((iv[3])>>6)&0x3) ; ++ ++ if(prxattrib->key_index > WEP_KEYS) ++ { ++ DBG_871X("prxattrib->key_index(%d) > WEP_KEYS \n", prxattrib->key_index); ++ ++ switch(prxattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ prxattrib->key_index = psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case _TKIP_: ++ case _AES_: ++ default: ++ prxattrib->key_index = psecuritypriv->dot118021XGrpKeyid; ++ break; ++ } ++ } ++ } ++ ++ if((prxattrib->encrypt>0) && ((prxattrib->bdecrypted==0) ||(psecuritypriv->sw_decrypt==_TRUE))) ++ { ++ psecuritypriv->hw_decrypted=_FALSE; ++ ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ ++ switch(prxattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ rtw_wep_decrypt(padapter, (u8 *)precv_frame); ++ break; ++ case _TKIP_: ++ res = rtw_tkip_decrypt(padapter, (u8 *)precv_frame); ++ break; ++ case _AES_: ++ res = rtw_aes_decrypt(padapter, (u8 * )precv_frame); ++ break; ++ default: ++ break; ++ } ++ } ++ else if(prxattrib->bdecrypted==1 ++ && prxattrib->encrypt >0 ++ && (psecuritypriv->busetkipkey==1 || prxattrib->encrypt !=_TKIP_ ) ++ ) ++ { ++#if 0 ++ if((prxstat->icv==1)&&(prxattrib->encrypt!=_AES_)) ++ { ++ psecuritypriv->hw_decrypted=_FALSE; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("psecuritypriv->hw_decrypted=_FALSE")); ++ ++ rtw_free_recvframe(precv_frame, &padapter->recvpriv.free_recv_queue); ++ ++ return_packet=NULL; ++ ++ } ++ else ++#endif ++ { ++ psecuritypriv->hw_decrypted=_TRUE; ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, Setting psecuritypriv->hw_decrypted = %d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ ++ } ++ } ++ else { ++ #ifdef DBG_RX_DECRYPTOR ++ DBG_871X("prxstat->bdecrypted:%d, prxattrib->encrypt:%d, psecuritypriv->hw_decrypted:%d\n" ++ , prxattrib->bdecrypted ,prxattrib->encrypt, psecuritypriv->hw_decrypted); ++ #endif ++ } ++ ++ if(res == _FAIL) ++ { ++ rtw_free_recvframe(return_packet,&padapter->recvpriv.free_recv_queue); ++ return_packet = NULL; ++ ++ } ++ //recvframe_chkmic(adapter, precv_frame); //move to recvframme_defrag function ++ ++_func_exit_; ++ ++ return return_packet; ++ ++} ++//###set the security information in the recv_frame ++static union recv_frame * portctrl(_adapter *adapter,union recv_frame * precv_frame) ++{ ++ u8 *psta_addr,*ptr; ++ uint auth_alg; ++ struct recv_frame_hdr *pfhdr; ++ struct sta_info * psta; ++ struct sta_priv *pstapriv ; ++ union recv_frame * prtnframe; ++ u16 ether_type=0; ++ u16 eapol_type = 0x888e;//for Funia BD's WPA issue ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ ++_func_enter_; ++ ++ pstapriv = &adapter->stapriv; ++ ptr = get_recvframe_data(precv_frame); ++ pfhdr = &precv_frame->u.hdr; ++ psta_addr = pfhdr->attrib.ta; ++ psta = rtw_get_stainfo(pstapriv, psta_addr); ++ ++ auth_alg = adapter->securitypriv.dot11AuthAlgrthm; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:adapter->securitypriv.dot11AuthAlgrthm= 0x%d\n",adapter->securitypriv.dot11AuthAlgrthm)); ++ ++ if(auth_alg==2) ++ { ++ if ((psta!=NULL) && (psta->ieee8021x_blocked)) ++ { ++ //blocked ++ //only accept EAPOL frame ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==1\n")); ++ ++ prtnframe=precv_frame; ++ ++ //get ether_type ++ ptr=ptr+pfhdr->attrib.hdrlen+pfhdr->attrib.iv_len+LLC_HEADER_SIZE; ++ _rtw_memcpy(ðer_type,ptr, 2); ++ ether_type= ntohs((unsigned short )ether_type); ++ ++ if (ether_type == eapol_type) { ++ prtnframe=precv_frame; ++ } ++ else { ++ //free this frame ++ rtw_free_recvframe(precv_frame, &adapter->recvpriv.free_recv_queue); ++ prtnframe=NULL; ++ } ++ } ++ else ++ { ++ //allowed ++ //check decryption status, and decrypt the frame if needed ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("########portctrl:psta->ieee8021x_blocked==0\n")); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:precv_frame->hdr.attrib.privacy=%x\n",precv_frame->u.hdr.attrib.privacy)); ++ ++ if(pattrib->bdecrypted==0) ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("portctrl:prxstat->decrypted=%x\n", pattrib->bdecrypted)); ++ ++ prtnframe=precv_frame; ++ //check is the EAPOL frame or not (Rekey) ++ if(ether_type == eapol_type){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type == 0x888e\n")); ++ //check Rekey ++ ++ prtnframe=precv_frame; ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("########portctrl:ether_type = 0x%.4x\n",ether_type)); ++ } ++ } ++ } ++ else ++ { ++ prtnframe=precv_frame; ++ } ++ ++_func_exit_; ++ ++ return prtnframe; ++ ++} ++ ++static sint recv_decache(union recv_frame *precv_frame, u8 bretry, struct stainfo_rxcache *prxcache) ++{ ++ sint tid = precv_frame->u.hdr.attrib.priority; ++ ++ u16 seq_ctrl = ( (precv_frame->u.hdr.attrib.seq_num&0xffff) << 4) | ++ (precv_frame->u.hdr.attrib.frag_num & 0xf); ++ ++_func_enter_; ++ ++ if(tid>15) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, (tid>15)! seq_ctrl=0x%x, tid=0x%x\n", seq_ctrl, tid)); ++ ++ return _FAIL; ++ } ++ ++ if(1)//if(bretry) ++ { ++ if(seq_ctrl == prxcache->tid_rxseq[tid]) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_decache, seq_ctrl=0x%x, tid=0x%x, tid_rxseq=0x%x\n", seq_ctrl, tid, prxcache->tid_rxseq[tid])); ++ ++ return _FAIL; ++ } ++ } ++ ++ prxcache->tid_rxseq[tid] = seq_ctrl; ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++static void process_pwrbit_data(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ unsigned char pwrbit; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL; ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ ++ pwrbit = GetPwrMgt(ptr); ++ ++ if(psta) ++ { ++ if(pwrbit) ++ { ++ if(!(psta->state & WIFI_SLEEP_STATE)) ++ { ++ //psta->state |= WIFI_SLEEP_STATE; ++ //pstapriv->sta_dz_bitmap |= BIT(psta->aid); ++ ++ stop_sta_xmit(padapter, psta); ++ ++ //DBG_871X("to sleep, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); ++ } ++ } ++ else ++ { ++ if(psta->state & WIFI_SLEEP_STATE) ++ { ++ //psta->state ^= WIFI_SLEEP_STATE; ++ //pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); ++ ++ wakeup_sta_to_xmit(padapter, psta); ++ ++ //DBG_871X("to wakeup, sta_dz_bitmap=%x\n", pstapriv->sta_dz_bitmap); ++ } ++ } ++ ++ } ++ ++#endif ++} ++ ++static void process_wmmps_data(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL; ++ ++ psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ ++ if(!psta) return; ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE ) ) ++ { ++#endif //CONFIG_TDLS ++ ++ if(!psta->qos_option) ++ return; ++ ++ if(!(psta->qos_info&0xf)) ++ return; ++ ++#ifdef CONFIG_TDLS ++ } ++#endif //CONFIG_TDLS ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ { ++ u8 wmmps_ac=0; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ if(wmmps_ac) ++ { ++ if(psta->sleepq_ac_len>0) ++ { ++ //process received triggered frame ++ xmit_delivery_enabled_frames(padapter, psta); ++ } ++ else ++ { ++ //issue one qos null frame with More data bit = 0 and the EOSP bit set (=1) ++ issue_qos_nulldata(padapter, psta->hwaddr, (u16)pattrib->priority); ++ } ++ } ++ ++ } ++ ++ ++#endif ++ ++} ++ ++#ifdef CONFIG_TDLS ++sint On_TDLS_Setup_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ u8 *psa, *pmyid; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct mlme_priv *pmlmepriv = &(adapter->mlmepriv); ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *prsnie, *ppairwise_cipher; ++ u8 i, k, pairwise_count; ++ u8 ccmp_have=0, rsnie_have=0; ++ u16 j; ++ u8 SNonce[32]; ++ u32 *timeout_interval; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 5; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ pmyid=myid(&(adapter->eeprompriv)); ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ if(ptdlsinfo->ap_prohibited == _TRUE) ++ { ++ goto exit; ++ } ++ ++ if(ptdls_sta==NULL ||(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE) ) ++ { ++ if(ptdls_sta==NULL){ ++ ptdls_sta = rtw_alloc_stainfo(pstapriv, psa); ++ }else{ ++ //If the direct link is already set up ++ //Process as re-setup after tear down ++ DBG_8192C("re-setup a direct link\n"); ++ } ++ ++ if(ptdls_sta) ++ { ++ //copy dialog token ++ ptdls_sta->dialog = *(ptr+2); ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _SUPPORTEDRATES_IE_: ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ rsnie_have=1; ++ if(prx_pkt_attrib->encrypt){ ++ prsnie=(u8*)pIE; ++ //check whether initiator STA has CCMP pairwise_cipher. ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 1); ++ for(k=0;kstat_code=72; ++ } ++ } ++ break; ++ case _EXT_CAP_IE_: ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ break; ++ case _FTIE_: ++ if(prx_pkt_attrib->encrypt) ++ _rtw_memcpy(SNonce, (ptr+j+52), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ if(prx_pkt_attrib->encrypt) ++ timeout_interval = (u32 *)(ptr+j+3); ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++ case _HT_CAPABILITY_IE_: ++ break; ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ if(_rtw_memcmp(get_bssid(pmlmepriv), pIE->data, 6) == _FALSE) ++ { ++ //not in same BSS ++ ptdls_sta->stat_code=7; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //check status code ++ //if responder STA has/hasn't security on AP, but request hasn't/has RSNIE, it should reject ++ if( ++ ( rsnie_have && (prx_pkt_attrib->encrypt) ) ++ || ++ (rsnie_have==0 && (prx_pkt_attrib->encrypt==0) ) ++ ){ ++ ptdls_sta->stat_code=0; ++ }else if(rsnie_have && (prx_pkt_attrib->encrypt==0)){ ++ //security disabled ++ ptdls_sta->stat_code=5; ++ }else if(rsnie_have==0 && (prx_pkt_attrib->encrypt)){ ++ //request haven't RSNIE ++ ptdls_sta->stat_code=38; ++ } ++ ++ ptdls_sta->tdls_sta_state|= TDLS_INITIATOR_STATE; ++ if(prx_pkt_attrib->encrypt){ ++ _rtw_memcpy(ptdls_sta->SNonce, SNonce, 32); ++ _rtw_memcpy(&(ptdls_sta->TDLS_PeerKey_Lifetime), timeout_interval, 4); ++ } ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ptdlsinfo->sta_cnt++; ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ if( ptdlsinfo->sta_cnt == (NUM_STA - 1) ) ++ { ++ ptdlsinfo->sta_maximum = _TRUE; ++ } ++ } ++ else ++ { ++ goto exit; ++ } ++ } ++ //already receiving TDLS setup request ++ else if(ptdls_sta->tdls_sta_state==TDLS_INITIATOR_STATE){ ++ DBG_8192C("receive duplicated TDLS setup request frame in handshaking\n"); ++ goto exit; ++ } ++ //When receiving and sending setup_req to the same link at the same time, STA with higher MAC_addr would be initiator ++ //following is to check out MAC_addr ++ else if(ptdls_sta->tdls_sta_state==TDLS_RESPONDER_STATE){ ++ DBG_8192C("receive setup_req after sending setup_req\n"); ++ for (i=0;i<6;i++){ ++ if(*(pmyid+i)==*(psa+i)){ ++ } ++ else if(*(pmyid+i)>*(psa+i)){ ++ goto exit; ++ }else if(*(pmyid+i)<*(psa+i)){ ++ ptdls_sta->tdls_sta_state=TDLS_INITIATOR_STATE; ++ break; ++ } ++ } ++ } ++ ++ issue_tdls_setup_rsp(adapter, precv_frame); ++ _set_timer( &ptdls_sta->handshake_timer, TDLS_HANDSHAKE_TIME); ++ ++ //status code!=0 ; setup unsuccess ++ if(ptdls_sta->stat_code!=0){ ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++exit: ++ ++ return _FAIL; ++} ++ ++ ++sint On_TDLS_Setup_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 stat_code; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =7; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher; ++ u16 pairwise_count, j, k; ++ u8 verify_ccmp=0; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0){ ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _SUPPORTEDRATES_IE_: ++ break; ++ case _COUNTRY_IE_: ++ break; ++ case _EXT_SUPPORTEDRATES_IE_: ++ break; ++ case _SUPPORTED_CH_IE_: ++ break; ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ //check whether responder STA has CCMP pairwise_cipher. ++ ppairwise_cipher=prsnie+10; ++ _rtw_memcpy(&pairwise_count, (u16*)(ppairwise_cipher-2), 2); ++ for(k=0;kANonce, (ptr+j+20), 32); ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ break; ++ case _RIC_Descriptor_IE_: ++ break; ++ case _HT_CAPABILITY_IE_: ++ break; ++ case EID_BSSCoexistence: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ if(prx_pkt_attrib->encrypt){ ++ if(verify_ccmp==1){ ++ wpa_tdls_generate_tpk(adapter, ptdls_sta); ++ ptdls_sta->stat_code=0; ++ } ++ else{ ++ ptdls_sta->stat_code=72; //invalide contents of RSNIE ++ } ++ }else{ ++ ptdls_sta->stat_code=0; ++ } ++ ++ if(prx_pkt_attrib->encrypt){ ++ if(tdls_verify_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){ //0: Invalid, 1: valid ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ } ++ ++ DBG_871X("issue_tdls_setup_cfm\n"); ++ issue_tdls_setup_cfm(adapter, precv_frame); ++ ++ //status code!=0 ; setup unsuccess ++ if(ptdls_sta->stat_code!=0){ ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ ptdlsinfo->setup_state = TDLS_LINKED_STATE; ++ ++ ptdls_sta->option=1; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_WRCR); ++ ++ if( ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE ) ++ { ++ ptdls_sta->tdls_sta_state |= TDLS_LINKED_STATE; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++#ifdef CONFIG_TDLS_AUTOCHECKALIVE ++ _set_timer( &ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++#endif //CONFIG_TDLS_AUTOSETUP ++ } ++ ++ if(prx_pkt_attrib->encrypt){ ++ if(ptdls_sta->cam_entry==0){ ++ ptdls_sta->dot118021XPrivacy=_AES_; ++ ptdls_sta->cam_entry=ptdlsinfo->cam_entry_to_write; ++ if(++ptdlsinfo->cam_entry_to_write>31) ++ ptdlsinfo->cam_entry_to_write=6; ++ } ++ rtw_setstakey_cmd(adapter, (u8*)ptdls_sta, _TRUE); ++ } ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Setup_Cfm(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ _irqL irqL; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ u16 stat_code; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =5; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic, *ppairwise_cipher; ++ u16 j, pairwise_count; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ //[+1]: payload type ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0){ ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ if(prx_pkt_attrib->encrypt){ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _RSN_IE_2_: ++ prsnie=(u8*)pIE; ++ break; ++ case _VENDOR_SPECIFIC_IE_: ++ break; ++ case _FTIE_: ++ pftie=(u8*)pIE; ++ break; ++ case _TIMEOUT_ITVL_IE_: ++ ptimeout_ie=(u8*)pIE; ++ break; ++ case _HT_EXTRA_INFO_IE_: ++ break; ++ case _LINK_ID_IE_: ++ plinkid_ie=(u8*)pIE; ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //verify mic in FTIE MIC field ++ if(tdls_verify_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie)==0){ //0: Invalid, 1: Valid ++ free_tdls_sta(adapter, ptdls_sta); ++ return _FAIL; ++ } ++ ++ } ++ ++ ptdlsinfo->setup_state = TDLS_LINKED_STATE; ++ if( ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE ) ++ { ++ ptdls_sta->tdls_sta_state|=TDLS_LINKED_STATE; ++ _cancel_timer_ex( &ptdls_sta->handshake_timer); ++#ifdef CONFIG_TDLS_AUTOCHECKALIVE ++ _set_timer( &ptdls_sta->alive_timer1, TDLS_ALIVE_TIMER_PH1); ++#endif //CONFIG_TDLS_AUTOCHECKALIVE ++ } ++ ++ ptdls_sta->option=1; //write RCR DATA BIT ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_WRCR); ++ ++ //Write cam ++ //TDLS encryption(if needed) will always be CCMP ++ if(prx_pkt_attrib->encrypt){ ++ if(ptdls_sta->cam_entry==0){ ++ ptdls_sta->dot118021XPrivacy=_AES_; ++ ptdls_sta->cam_entry=ptdlsinfo->cam_entry_to_write; ++ if(++ptdlsinfo->cam_entry_to_write>31) ++ ptdlsinfo->cam_entry_to_write=6; ++ } ++ rtw_setstakey_cmd(adapter, (u8*)ptdls_sta, _TRUE); ++ } ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Dis_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct sta_info *psta_ap; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint parsing_length; //frame body length, without icv_len ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE = 3, *dst, *pdialog = NULL; ++ u16 j; ++ ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len + LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE + 1; ++ pdialog=ptr+2; ++ ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _LINK_ID_IE_: ++ psta_ap = rtw_get_stainfo(pstapriv, pIE->data); ++ if(psta_ap == NULL) ++ { ++ goto exit; ++ } ++ dst = pIE->data + 12; ++ if( (MacAddr_isBcst(dst) == _FALSE) && (_rtw_memcmp(myid(&(adapter->eeprompriv)), dst, 6) == _FALSE) ) ++ { ++ goto exit; ++ } ++ break; ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //check frame contents ++ ++ issue_tdls_dis_rsp(adapter, precv_frame, *(pdialog) ); ++ ++exit: ++ ++ return _FAIL; ++ ++} ++ ++sint On_TDLS_Teardown(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ u8 *psa; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ struct mlme_ext_priv *pmlmeext = &(adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct sta_info *ptdls_sta= NULL; ++ _irqL irqL; ++ ++ psa = get_sa(ptr); ++ ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ if(ptdls_sta!=NULL){ ++ ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE){ ++ ptdls_sta->option =3; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ free_tdls_sta(adapter, ptdls_sta); ++ } ++ ++ return _FAIL; ++ ++} ++ ++u8 TDLS_check_ch_state(uint state){ ++ if( (state & TDLS_CH_SWITCH_ON_STATE) && ++ (state & TDLS_AT_OFF_CH_STATE) && ++ (state & TDLS_PEER_AT_OFF_STATE) ){ ++ ++ if(state & TDLS_PEER_SLEEP_STATE) ++ return 2; //U-APSD + ch. switch ++ else ++ return 1; //ch. switch ++ }else ++ return 0; ++} ++ ++//we process buffered data for 1. U-APSD, 2. ch. switch, 3. U-APSD + ch. switch here ++sint On_TDLS_Peer_Traffic_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ //get peer sta infomation ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ u8 wmmps_ac=0, state=TDLS_check_ch_state(ptdls_sta->tdls_sta_state); ++ int i; ++ ++ ptdls_sta->sta_stats.rx_data_pkts++; ++ ++ //receive peer traffic response frame, sleeping STA wakes up ++ //ptdls_sta->tdls_sta_state &= ~(TDLS_PEER_SLEEP_STATE); ++ process_wmmps_data( adapter, precv_frame); ++ ++ // if noticed peer STA wakes up by receiving peer traffic response ++ // and we want to do channel swtiching, then we will transmit channel switch request first ++ if(ptdls_sta->tdls_sta_state & TDLS_APSD_CHSW_STATE){ ++ issue_tdls_ch_switch_req(adapter, pattrib->src); ++ ptdls_sta->tdls_sta_state &= ~(TDLS_APSD_CHSW_STATE); ++ return _FAIL; ++ } ++ ++ //check 4-AC queue bit ++ if(ptdls_sta->uapsd_vo || ptdls_sta->uapsd_vi || ptdls_sta->uapsd_be || ptdls_sta->uapsd_bk) ++ wmmps_ac=1; ++ ++ //if it's a direct link and have buffered frame ++ if(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE){ ++ if(wmmps_ac && state) ++ { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptdls_sta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ //transmit buffered frames ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptdls_sta->sleepq_len--; ++ if(ptdls_sta->sleepq_len>0){ ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ }else{ ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ //pxmitframe->attrib.triggered = 1; //maybe doesn't need in TDLS ++ if(adapter->HalFunc.hal_xmit(adapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(adapter, pxmitframe); ++ } ++ ++ } ++ ++ if(ptdls_sta->sleepq_len==0) ++ { ++ DBG_871X("no buffered packets to xmit\n"); ++ //on U-APSD + CH. switch state, when there is no buffered date to xmit, ++ // we should go back to base channel ++ if(state==2){ ++ ptdls_sta->option = 3; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ }else if(ptdls_sta->tdls_sta_state&TDLS_SW_OFF_STATE){ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_SW_OFF_STATE); ++ ptdlsinfo->candidate_ch= pmlmeext->cur_channel; ++ issue_tdls_ch_switch_req(adapter, pattrib->src); ++ DBG_8192C("issue tdls ch switch req back to base channel\n"); ++ } ++ ++ } ++ else ++ { ++ DBG_871X("error!psta->sleepq_len=%d\n", ptdls_sta->sleepq_len); ++ ptdls_sta->sleepq_len=0; ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++ ++ return _FAIL; ++} ++ ++sint On_TDLS_Ch_Switch_Req(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =3; ++ u16 j; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ //[+1]: payload type ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ ptdls_sta->off_ch = *(ptr+2); ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _COUNTRY_IE_: ++ break; ++ case _CH_SWTICH_ANNOUNCE_: ++ break; ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, pIE->data, 2); ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, pIE->data+2, 2); ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ //todo: check status ++ ptdls_sta->stat_code=0; ++ ptdls_sta->tdls_sta_state |= TDLS_CH_SWITCH_ON_STATE; ++ ++ issue_nulldata(adapter, 1); ++ ++ issue_tdls_ch_switch_rsp(adapter, psa); ++ ++ DBG_8192C("issue tdls channel switch response\n"); ++ ++ if((ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE) && ptdls_sta->off_ch==pmlmeext->cur_channel){ ++ DBG_8192C("back to base channel\n"); ++ ptdls_sta->option=7; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_BASE_CH); ++ }else{ ++ ptdls_sta->option=6; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ } ++ return _FAIL; ++} ++ ++sint On_TDLS_Ch_Switch_Rsp(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct sta_info *ptdls_sta= NULL; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *prx_pkt_attrib = &precv_frame->u.hdr.attrib; ++ u8 *psa; ++ sint parsing_length; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 FIXED_IE =4; ++ u16 stat_code, j, switch_time, switch_timeout; ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++ ++ psa = get_sa(ptr); ++ ptdls_sta = rtw_get_stainfo(pstapriv, psa); ++ ++ //if channel switch is running and receiving Unsolicited TDLS Channel Switch Response, ++ //it will go back to base channel and terminate this channel switch procedure ++ if(ptdls_sta->tdls_sta_state & TDLS_CH_SWITCH_ON_STATE ){ ++ if(pmlmeext->cur_channel==ptdls_sta->off_ch){ ++ DBG_8192C("back to base channel\n"); ++ ptdls_sta->option=7; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ }else{ ++ DBG_8192C("receive unsolicited channel switch response \n"); ++ ptdls_sta->option=3; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_CS_OFF); ++ } ++ return _FAIL; ++ } ++ ++ //avoiding duplicated or unconditional ch. switch. rsp ++ if((ptdls_sta->tdls_sta_state & TDLS_CH_SW_INITIATOR_STATE) != TDLS_CH_SW_INITIATOR_STATE) ++ return _FAIL; ++ ++ //[+1]: payload type ++ ptr +=prx_pkt_attrib->hdrlen + prx_pkt_attrib->iv_len+LLC_HEADER_SIZE+TYPE_LENGTH_FIELD_SIZE+1; ++ parsing_length= ((union recv_frame *)precv_frame)->u.hdr.len ++ -prx_pkt_attrib->hdrlen ++ -prx_pkt_attrib->iv_len ++ -prx_pkt_attrib->icv_len ++ -LLC_HEADER_SIZE ++ -TYPE_LENGTH_FIELD_SIZE ++ -1 ++ -FIXED_IE; ++ ++ _rtw_memcpy(&stat_code, ptr+2, 2); ++ ++ if(stat_code!=0){ ++ return _FAIL; ++ } ++ ++ //parsing information element ++ for(j=FIXED_IE; jElementID) ++ { ++ case _LINK_ID_IE_: ++ break; ++ case _CH_SWITCH_TIMING_: ++ _rtw_memcpy(&switch_time, pIE->data, 2); ++ if(switch_time > ptdls_sta->ch_switch_time) ++ _rtw_memcpy(&ptdls_sta->ch_switch_time, &switch_time, 2); ++ ++ _rtw_memcpy(&switch_timeout, pIE->data+2, 2); ++ if(switch_timeout > ptdls_sta->ch_switch_timeout) ++ _rtw_memcpy(&ptdls_sta->ch_switch_timeout, &switch_timeout, 2); ++ ++ default: ++ break; ++ } ++ ++ j += (pIE->Length + 2); ++ ++ } ++ ++ ptdls_sta->tdls_sta_state &= ~(TDLS_CH_SW_INITIATOR_STATE); ++ ptdls_sta->tdls_sta_state |=TDLS_CH_SWITCH_ON_STATE; ++ ++ //goto set_channel_workitem_callback() ++ ptdls_sta->option=6; ++ rtw_tdls_cmd(adapter, ptdls_sta->hwaddr, TDLS_OFF_CH); ++ ++ return _FAIL; ++} ++ ++sint OnTDLS(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ sint ret = _SUCCESS; ++ u8 *paction = get_recvframe_data(precv_frame); ++ ++ //point to action field, [+8]: snap+ether_type, [+1]: payload_type, [+1]: category field ++ paction+=pattrib->hdrlen + pattrib->iv_len+8+1+1; ++ ++ switch(*paction){ ++ case TDLS_SETUP_REQUEST: ++ DBG_871X("recv tdls setup request frame\n"); ++ ret=On_TDLS_Setup_Req(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ DBG_871X("recv tdls setup response frame\n"); ++ ret=On_TDLS_Setup_Rsp(adapter, precv_frame); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ DBG_871X("recv tdls setup confirm frame\n"); ++ ret=On_TDLS_Setup_Cfm(adapter, precv_frame); ++ break; ++ case TDLS_TEARDOWN: ++ DBG_871X("recv tdls teardown, free sta_info\n"); ++ ret=On_TDLS_Teardown(adapter, precv_frame); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ DBG_871X("recv tdls discovery request frame\n"); ++ ret=On_TDLS_Dis_Req(adapter, precv_frame); ++ break; ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ DBG_871X("recv tdls peer traffic response frame\n"); ++ ret=On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ DBG_871X("recv tdls channel switch request frame\n"); ++ ret=On_TDLS_Ch_Switch_Req(adapter, precv_frame); ++ break; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ DBG_871X("recv tdls channel switch response frame\n"); ++ ret=On_TDLS_Ch_Switch_Rsp(adapter, precv_frame); ++ break; ++ default: ++ DBG_871X("receive TDLS frame but not supported\n"); ++ ret=_FAIL; ++ break; ++ } ++ ++exit: ++ return ret; ++ ++} ++#endif ++ ++static void count_rx_stats(_adapter *padapter, union recv_frame *prframe, struct sta_info*sta) ++{ ++ int sz; ++ struct sta_info *psta = NULL; ++ struct stainfo_stats *pstats = NULL; ++ struct rx_pkt_attrib *pattrib = & prframe->u.hdr.attrib; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ sz = get_recvframe_len(prframe); ++ precvpriv->rx_bytes += sz; ++ ++ padapter->mlmepriv.LinkDetectInfo.NumRxOkInPeriod++; ++ ++ if( (!MacAddr_isBcst(pattrib->dst)) && (!IS_MCAST(pattrib->dst))){ ++ padapter->mlmepriv.LinkDetectInfo.NumRxUnicastOkInPeriod++; ++ } ++ ++ if(sta) ++ psta = sta; ++ else ++ psta = prframe->u.hdr.psta; ++ ++ if(psta) ++ { ++ pstats = &psta->sta_stats; ++ ++ pstats->rx_data_pkts++; ++ pstats->rx_bytes += sz; ++ } ++ ++} ++ ++static sint sta2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ++) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ sint ret = _SUCCESS; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 *mybssid = get_bssid(pmlmepriv); ++ u8 *myhwaddr = myid(&adapter->eeprompriv); ++ u8 * sta_addr = NULL; ++ sint bmcast = IS_MCAST(pattrib->dst); ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta=NULL; ++ u8 *psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ //frame body located after [+2]: ether-type, [+1]: payload type ++ u8 *pframe_body = psnap_type+2+1; ++#endif ++ ++_func_enter_; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if( (!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN)) && (!bmcast) ){ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->src; ++ ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++#ifdef CONFIG_TDLS ++ ++ //direct link data transfer ++ if(ptdlsinfo->setup_state & TDLS_LINKED_STATE){ ++ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->src); ++ if(ptdls_sta==NULL) ++ { ++ ret=_FAIL; ++ goto exit; ++ } ++ else if((ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE) ++ { ++ ++ //drop QoS-SubType Data, including QoS NULL, excluding QoS-Data ++ if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE) ++ { ++ if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6))) ++ { ++ DBG_871X("drop QoS-Sybtype Data\n"); ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ ret= _FAIL; ++ goto exit; ++ } ++ // da should be for me ++ if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ // check BSSID ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //process UAPSD tdls sta ++ process_pwrbit_data(adapter, precv_frame); ++ ++ // if NULL-frame, check pwrbit ++ if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL) ++ { ++ //NULL-frame with pwrbit=1, buffer_STA should buffer frames for sleep_STA ++ if(GetPwrMgt(ptr)) ++ { ++ DBG_871X("TDLS: recv peer null frame with pwr bit 1\n"); ++ ptdls_sta->tdls_sta_state|=TDLS_PEER_SLEEP_STATE; ++ // it would be triggered when we are off channel and receiving NULL DATA ++ // we can confirm that peer STA is at off channel ++ } ++ else if(ptdls_sta->tdls_sta_state&TDLS_CH_SWITCH_ON_STATE) ++ { ++ if((ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE) != TDLS_PEER_AT_OFF_STATE) ++ { ++ issue_nulldata_to_TDLS_peer_STA(adapter, ptdls_sta, 0); ++ ptdls_sta->tdls_sta_state |= TDLS_PEER_AT_OFF_STATE; ++ On_TDLS_Peer_Traffic_Rsp(adapter, precv_frame); ++ } ++ } ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ //receive some of all TDLS management frames, process it at ON_TDLS ++ if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))){ ++ ret= OnTDLS(adapter, precv_frame); ++ goto exit; ++ } ++ ++ } ++ ++ sta_addr = pattrib->src; ++ ++ } ++ else ++#endif ++ { ++ // For Station mode, sa and bssid should always be BSSID, and DA is my mac-address ++ if(!_rtw_memcmp(pattrib->bssid, pattrib->src, ETH_ALEN) ) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("bssid != TA under STATION_MODE; drop pkt\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->bssid; ++ } ++ ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ if (bmcast) ++ { ++ // For AP mode, if DA == MCAST, then BSSID should be also MCAST ++ if (!IS_MCAST(pattrib->bssid)){ ++ ret= _FAIL; ++ goto exit; ++ } ++ } ++ else // not mc-frame ++ { ++ // For AP mode, if DA is non-MCAST, then it must be BSSID, and bssid == BSSID ++ if(!_rtw_memcmp(pattrib->bssid, pattrib->dst, ETH_ALEN)) { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ sta_addr = pattrib->src; ++ } ++ ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ sta_addr = mybssid; ++ } ++ else ++ { ++ ret = _FAIL; ++ } ++ ++ ++ ++ if(bmcast) ++ *psta = rtw_get_bcmc_stainfo(adapter); ++ else ++ *psta = rtw_get_stainfo(pstapriv, sta_addr); // get ap_info ++ ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under sta2sta_data_frame ; drop pkt\n")); ++#ifdef CONFIG_MP_INCLUDED ++ if(check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ adapter->mppriv.rx_pktloss++; ++#endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++exit: ++_func_exit_; ++ return ret; ++ ++} ++ ++ ++static sint ap2sta_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ sint ret = _SUCCESS; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ u8 *mybssid = get_bssid(pmlmepriv); ++ u8 *myhwaddr = myid(&adapter->eeprompriv); ++ sint bmcast = IS_MCAST(pattrib->dst); ++ ++_func_enter_; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ && (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE ++ || check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE ) ++ ) ++ { ++ ++ // if NULL-frame, drop packet ++ if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" NULL frame \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s NULL frame\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //drop QoS-SubType Data, including QoS NULL, excluding QoS-Data ++ if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE) ++ { ++ if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6))) ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s drop QoS-SubType Data, including QoS NULL, excluding QoS-Data\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ } ++ ++ // filter packets that SA is myself or multicast or broadcast ++ if (_rtw_memcmp(myhwaddr, pattrib->src, ETH_ALEN)){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" SA==myself \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s SA=%x:%x:%x:%x:%x:%x, myhwaddr= %x:%x:%x:%x:%x:%x\n", __FUNCTION__, ++ pattrib->src[0], pattrib->src[1], pattrib->src[2], ++ pattrib->src[3], pattrib->src[4], pattrib->src[5], ++ *(myhwaddr), *(myhwaddr+1), *(myhwaddr+2), ++ *(myhwaddr+3), *(myhwaddr+4), *(myhwaddr+5)); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ // da should be for me ++ if((!_rtw_memcmp(myhwaddr, pattrib->dst, ETH_ALEN))&& (!bmcast)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" ap2sta_data_frame: compare DA fail; DA= %x:%x:%x:%x:%x:%x \n", ++ pattrib->dst[0], ++ pattrib->dst[1], ++ pattrib->dst[2], ++ pattrib->dst[3], ++ pattrib->dst[4], ++ pattrib->dst[5])); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s compare DA fail; DA= %x:%x:%x:%x:%x:%x \n", __FUNCTION__, ++ pattrib->dst[0],pattrib->dst[1],pattrib->dst[2], ++ pattrib->dst[3],pattrib->dst[4],pattrib->dst[5]); ++ #endif ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ ++ // check BSSID ++ if( _rtw_memcmp(pattrib->bssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ _rtw_memcmp(mybssid, "\x0\x0\x0\x0\x0\x0", ETH_ALEN) || ++ (!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" ap2sta_data_frame: compare BSSID fail ; BSSID=%x:%x:%x:%x:%x:%x\n", ++ pattrib->bssid[0], ++ pattrib->bssid[1], ++ pattrib->bssid[2], ++ pattrib->bssid[3], ++ pattrib->bssid[4], ++ pattrib->bssid[5])); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("mybssid= %x:%x:%x:%x:%x:%x\n", ++ mybssid[0], ++ mybssid[1], ++ mybssid[2], ++ mybssid[3], ++ mybssid[4], ++ mybssid[5])); ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s compare BSSID fail ; BSSID=%x:%x:%x:%x:%x:%x, mybssid= %x:%x:%x:%x:%x:%x\n", __FUNCTION__, ++ pattrib->bssid[0], pattrib->bssid[1], pattrib->bssid[2], ++ pattrib->bssid[3], pattrib->bssid[4], pattrib->bssid[5], ++ mybssid[0], mybssid[1], mybssid[2], ++ mybssid[3], mybssid[4], mybssid[5]); ++ #endif ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ if(bmcast) ++ *psta = rtw_get_bcmc_stainfo(adapter); ++ else ++ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get ap_info ++ ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("ap2sta: can't get psta under STATION_MODE ; drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under STATION_MODE ; drop pkt\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) && ++ (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ) ++ { ++ _rtw_memcpy(pattrib->dst, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->src, GetAddr2Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->bssid, GetAddr3Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ ++ // ++ _rtw_memcpy(pattrib->bssid, mybssid, ETH_ALEN); ++ ++ ++ *psta = rtw_get_stainfo(pstapriv, pattrib->bssid); // get sta_info ++ if (*psta == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under MP_MODE ; drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s can't get psta under WIFI_MP_STATE ; drop pkt\n", __FUNCTION__); ++ #endif ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ ++ } ++ else ++ { ++ ret = _FAIL; ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s fw_state:0x%x\n", __FUNCTION__, get_fwstate(pmlmepriv)); ++ #endif ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++static sint sta2ap_data_frame( ++ _adapter *adapter, ++ union recv_frame *precv_frame, ++ struct sta_info**psta ) ++{ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ unsigned char *mybssid = get_bssid(pmlmepriv); ++ sint ret=_SUCCESS; ++ ++_func_enter_; ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ //For AP mode, RA=BSSID, TX=STA(SRC_ADDR), A3=DST_ADDR ++ if(!_rtw_memcmp(pattrib->bssid, mybssid, ETH_ALEN)) ++ { ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ *psta = rtw_get_stainfo(pstapriv, pattrib->src); ++ ++ if (*psta == NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("can't get psta under AP_MODE; drop pkt\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ ++ process_pwrbit_data(adapter, precv_frame); ++ ++ ++ // if NULL-frame, drop packet ++ if ((GetFrameSubType(ptr)) == WIFI_DATA_NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" NULL frame \n")); ++ ++ //temporily count it here ++ count_rx_stats(adapter, precv_frame, *psta); ++ ++ //process_null_data(adapter, precv_frame); ++ //process_pwrbit_data(adapter, precv_frame); ++ ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //drop QoS-SubType Data, including QoS NULL, excluding QoS-Data ++ if( (GetFrameSubType(ptr) & WIFI_QOS_DATA_TYPE )== WIFI_QOS_DATA_TYPE) ++ { ++ ++ if(GetFrameSubType(ptr)==WIFI_QOS_DATA_NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" QoS NULL frame \n")); ++ ++ //temporily count it here ++ count_rx_stats(adapter, precv_frame, *psta); ++ ++ //process_null_data(adapter, precv_frame); ++ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ process_wmmps_data(adapter, precv_frame); ++ ++ /* ++ if(GetFrameSubType(ptr)&(BIT(4)|BIT(5)|BIT(6))) ++ { ++ process_null_data(adapter, precv_frame); ++ ret= _FAIL; ++ goto exit; ++ } ++ */ ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++static sint validate_recv_ctrl_frame(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_AP_MODE ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *pframe = precv_frame->u.hdr.rx_data; ++ //uint len = precv_frame->u.hdr.len; ++ ++ //DBG_871X("+validate_recv_ctrl_frame\n"); ++ ++ if (GetFrameType(pframe) != WIFI_CTRL_TYPE) ++ { ++ return _FAIL; ++ } ++ ++ //receive the frames that ra(a1) is my address ++ if (!_rtw_memcmp(GetAddr1Ptr(pframe), myid(&padapter->eeprompriv), ETH_ALEN)) ++ { ++ return _FAIL; ++ } ++ ++ //only handle ps-poll ++ if(GetFrameSubType(pframe) == WIFI_PSPOLL) ++ { ++ u16 aid; ++ u8 wmmps_ac=0; ++ struct sta_info *psta=NULL; ++ ++ aid = GetAid(pframe); ++ psta = rtw_get_stainfo(pstapriv, GetAddr2Ptr(pframe)); ++ ++ if((psta==NULL) || (psta->aid!=aid)) ++ { ++ return _FAIL; ++ } ++ ++ //for rx pkt statistics ++ psta->sta_stats.rx_ctrl_pkts++; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(0); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(0); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(0); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(0); ++ break; ++ } ++ ++ if(wmmps_ac) ++ return _FAIL; ++ ++ if((psta->state&WIFI_SLEEP_STATE) && (pstapriv->sta_dz_bitmap&BIT(psta->aid))) ++ { ++ _irqL irqL; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ if ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta->sleepq_len--; ++ ++ if(psta->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ //DBG_871X("handling ps-poll, q_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++ if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ ++ if(psta->sleepq_len==0) ++ { ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("after handling ps-poll, tim=%x\n", pstapriv->tim_bitmap); ++ ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++ } ++ else ++ { ++ //DBG_871X("no buffered packets to xmit\n"); ++ if(pstapriv->tim_bitmap&BIT(psta->aid)) ++ { ++ if(psta->sleepq_len==0) ++ { ++ DBG_871X("no buffered packets to xmit\n"); ++ } ++ else ++ { ++ DBG_871X("error!psta->sleepq_len=%d\n", psta->sleepq_len); ++ psta->sleepq_len=0; ++ } ++ ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ } ++ ++ } ++ ++#endif ++ ++ return _FAIL; ++ ++} ++ ++static sint validate_recv_mgnt_frame(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("+validate_recv_mgnt_frame\n")); ++ ++#if 0 ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++#ifdef CONFIG_NATIVEAP_MLME ++ mgt_dispatcher(adapter, precv_frame); ++#else ++ rtw_hostapd_mlme_rx(adapter, precv_frame); ++#endif ++ } ++ else ++ { ++ mgt_dispatcher(adapter, precv_frame); ++ } ++#endif ++ ++ { ++ //for rx pkt statistics ++ struct sta_info *psta = rtw_get_stainfo(&adapter->stapriv, GetAddr2Ptr(precv_frame->u.hdr.rx_data)); ++ if(psta) ++ psta->sta_stats.rx_mgnt_pkts++; ++ } ++ ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if(adapter->proximity.proxim_on==_TRUE) ++ { ++ struct rx_pkt_attrib * pattrib=&precv_frame->u.hdr.attrib; ++ struct recv_stat* prxstat=( struct recv_stat * ) precv_frame->u.hdr.rx_head ; ++ u8 * pda,*psa,*pbssid,*ptr; ++ ptr=precv_frame->u.hdr.rx_data; ++ pda = get_da(ptr); ++ psa = get_sa(ptr); ++ pbssid = get_hdr_bssid(ptr); ++ ++ ++ _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, psa, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); ++ ++ switch(pattrib->to_fr_ds) ++ { ++ case 0: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ break; ++ ++ case 1: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ++ break; ++ ++ case 2: ++ _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ break; ++ ++ case 3: ++ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); ++ break; ++ ++ default: ++ break; ++ ++ } ++ pattrib->priority=0; ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; ++ ++ adapter->proximity.proxim_rx(adapter,precv_frame); ++ } ++#endif ++ mgt_dispatcher(adapter, precv_frame); ++ ++ ++ return _SUCCESS; ++ ++} ++ ++ ++static sint validate_recv_data_frame(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ int res; ++ u8 bretry; ++ u8 *psa, *pda, *pbssid; ++ struct sta_info *psta = NULL; ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ struct sta_priv *pstapriv = &adapter->stapriv; ++ struct security_priv *psecuritypriv = &adapter->securitypriv; ++ sint ret = _SUCCESS; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++ struct sta_info *ptdls_sta = NULL; ++#endif ++ ++_func_enter_; ++ ++ bretry = GetRetry(ptr); ++ pda = get_da(ptr); ++ psa = get_sa(ptr); ++ pbssid = get_hdr_bssid(ptr); ++ ++ if(pbssid == NULL){ ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memcpy(pattrib->dst, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, psa, ETH_ALEN); ++ ++ _rtw_memcpy(pattrib->bssid, pbssid, ETH_ALEN); ++ ++ switch(pattrib->to_fr_ds) ++ { ++ case 0: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ res= sta2sta_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 1: ++ _rtw_memcpy(pattrib->ra, pda, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pbssid, ETH_ALEN); ++ res= ap2sta_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 2: ++ _rtw_memcpy(pattrib->ra, pbssid, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, psa, ETH_ALEN); ++ res= sta2ap_data_frame(adapter, precv_frame, &psta); ++ break; ++ ++ case 3: ++ _rtw_memcpy(pattrib->ra, GetAddr1Ptr(ptr), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, GetAddr2Ptr(ptr), ETH_ALEN); ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" case 3\n")); ++ break; ++ ++ default: ++ res=_FAIL; ++ break; ++ ++ } ++ ++ if(res==_FAIL){ ++ //RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,(" after to_fr_ds_chk; res = fail \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s case:%d, res:%d\n", __FUNCTION__, pattrib->to_fr_ds, res); ++ #endif ++ ret= res; ++ goto exit; ++ } ++ ++ ++ if(psta==NULL){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" after to_fr_ds_chk; psta==NULL \n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ //psta->rssi = prxcmd->rssi; ++ //psta->signal_quality= prxcmd->sq; ++ precv_frame->u.hdr.psta = psta; ++ ++ ++ pattrib->amsdu=0; ++ //parsing QC field ++ if(pattrib->qos == 1) ++ { ++ pattrib->priority = GetPriority((ptr + 24)); ++ pattrib->ack_policy =GetAckpolicy((ptr + 24)); ++ pattrib->amsdu = GetAMsdu((ptr + 24)); ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 32 : 26; ++ ++ if(pattrib->priority!=0 && pattrib->priority!=3) ++ { ++ adapter->recvpriv.bIsAnyNonBEPkts = _TRUE; ++ } ++ } ++ else ++ { ++ pattrib->priority=0; ++ pattrib->hdrlen = pattrib->to_fr_ds==3 ? 30 : 24; ++ } ++ ++ ++ if(pattrib->order)//HT-CTRL 11n ++ { ++ pattrib->hdrlen += 4; ++ } ++ ++ precv_frame->u.hdr.preorder_ctrl = &psta->recvreorder_ctrl[pattrib->priority]; ++ ++ // decache, drop duplicate recv packets ++ if(recv_decache(precv_frame, bretry, &psta->sta_recvpriv.rxcache) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decache : drop pkt\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++#ifdef CONFIG_TDLS ++ if(psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ if(psta->dot118021XPrivacy==_AES_) ++ pattrib->encrypt=psta->dot118021XPrivacy; ++ } ++#endif //CONFIG_TDLS ++ ++ if(pattrib->privacy){ ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("validate_recv_data_frame:pattrib->privacy=%x\n", pattrib->privacy)); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n ^^^^^^^^^^^IS_MCAST(pattrib->ra(0x%02x))=%d^^^^^^^^^^^^^^^6\n", pattrib->ra[0],IS_MCAST(pattrib->ra))); ++ ++#ifdef CONFIG_TDLS ++ if(ptdls_sta==NULL) ++#endif ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, IS_MCAST(pattrib->ra)); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("\n pattrib->encrypt=%d\n",pattrib->encrypt)); ++ ++ SET_ICE_IV_LEN(pattrib->iv_len, pattrib->icv_len, pattrib->encrypt); ++ } ++ else ++ { ++ pattrib->encrypt = 0; ++ pattrib->iv_len = pattrib->icv_len = 0; ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++static sint validate_recv_frame(_adapter *adapter, union recv_frame *precv_frame) ++{ ++ //shall check frame subtype, to / from ds, da, bssid ++ ++ //then call check if rx seq/frag. duplicated. ++ ++ u8 type; ++ u8 subtype; ++ sint retval = _SUCCESS; ++ ++ struct rx_pkt_attrib *pattrib = & precv_frame->u.hdr.attrib; ++ ++ u8 *ptr = precv_frame->u.hdr.rx_data; ++ u8 ver =(unsigned char) (*ptr)&0x3 ; ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ struct mlme_ext_priv *pmlmeext = &adapter->mlmeextpriv; ++#endif ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &adapter->tdlsinfo; ++#endif //CONFIG_TDLS ++ ++_func_enter_; ++ ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ if (pmlmeext->sitesurvey_res.state == SCAN_PROCESS) { ++ pmlmeext->channel_set[pmlmeext->sitesurvey_res.channel_idx].rx_count++; ++ } ++#endif ++ ++#ifdef CONFIG_TDLS ++ if(ptdlsinfo->ch_sensing==1 && ptdlsinfo->cur_channel !=0){ ++ ptdlsinfo->collect_pkt_num[ptdlsinfo->cur_channel-1]++; ++ } ++#endif ++ ++#if 0 ++DBG_871X("\n"); ++{ ++ int i; ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ ++} ++DBG_871X("\n"); ++#endif ++ ++ //add version chk ++ if(ver!=0){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! (ver!=0)\n")); ++ retval= _FAIL; ++ goto exit; ++ } ++ ++ type = GetFrameType(ptr); ++ subtype = GetFrameSubType(ptr); //bit(7)~bit(2) ++ ++ pattrib->to_fr_ds = get_tofr_ds(ptr); ++ ++ pattrib->frag_num = GetFragNum(ptr); ++ pattrib->seq_num = GetSequence(ptr); ++ ++ pattrib->pw_save = GetPwrMgt(ptr); ++ pattrib->mfrag = GetMFrag(ptr); ++ pattrib->mdata = GetMData(ptr); ++ pattrib->privacy = GetPrivacy(ptr); ++ pattrib->order = GetOrder(ptr); ++#if 0 //for debug ++ ++if(pHalData->bDumpRxPkt ==1){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++} ++else if(pHalData->bDumpRxPkt ==2){ ++ if(type== WIFI_MGT_TYPE){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++ } ++} ++else if(pHalData->bDumpRxPkt ==3){ ++ if(type== WIFI_DATA_TYPE){ ++ int i; ++ DBG_871X("############################# \n"); ++ ++ for(i=0; i<64;i=i+8) ++ DBG_871X("%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X:\n", *(ptr+i), ++ *(ptr+i+1), *(ptr+i+2) ,*(ptr+i+3) ,*(ptr+i+4),*(ptr+i+5), *(ptr+i+6), *(ptr+i+7)); ++ DBG_871X("############################# \n"); ++ } ++} ++ ++#endif ++ switch (type) ++ { ++ case WIFI_MGT_TYPE: //mgnt ++ retval = validate_recv_mgnt_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_mgnt_frame fail\n")); ++ } ++ retval = _FAIL; // only data frame return _SUCCESS ++ break; ++ case WIFI_CTRL_TYPE: //ctrl ++ retval = validate_recv_ctrl_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_ctrl_frame fail\n")); ++ } ++ retval = _FAIL; // only data frame return _SUCCESS ++ break; ++ case WIFI_DATA_TYPE: //data ++ rtw_led_control(adapter, LED_CTL_RX); ++ pattrib->qos = (subtype & BIT(7))? 1:0; ++ retval = validate_recv_data_frame(adapter, precv_frame); ++ if (retval == _FAIL) ++ { ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail\n")); ++ precvpriv->rx_drop++; ++ } ++ break; ++ default: ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("validate_recv_data_frame fail! type=0x%x\n", type)); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME validate_recv_data_frame fail! type=0x%x\n", type); ++ #endif ++ retval = _FAIL; ++ break; ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return retval; ++} ++ ++ ++//remove the wlanhdr and add the eth_hdr ++#if 1 ++static sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) ++{ ++ sint rmv_len; ++ u16 eth_type, len; ++ u8 bsnaphdr; ++ u8 *psnap_type; ++ struct ieee80211_snap_hdr *psnap; ++ ++ sint ret=_SUCCESS; ++ _adapter *adapter =precvframe->u.hdr.adapter; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ u8 *ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field ++ struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; ++ ++_func_enter_; ++ ++ if(pattrib->encrypt){ ++ recvframe_pull_tail(precvframe, pattrib->icv_len); ++ } ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); ++ psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ /* convert hdr + possible LLC headers into Ethernet header */ ++ //eth_type = (psnap_type[0] << 8) | psnap_type[1]; ++ if((_rtw_memcmp(psnap, rtw_rfc1042_header, SNAP_SIZE) && ++ (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_IPX, 2) == _FALSE) && ++ (_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_AARP, 2)==_FALSE) )|| ++ //eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || ++ _rtw_memcmp(psnap, rtw_bridge_tunnel_header, SNAP_SIZE)){ ++ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ ++ bsnaphdr = _TRUE; ++ } ++ else { ++ /* Leave Ethernet header part of hdr and full payload */ ++ bsnaphdr = _FALSE; ++ } ++ ++ rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); ++ len = precvframe->u.hdr.len - rmv_len; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n\n", pattrib->hdrlen, pattrib->iv_len)); ++ ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE)) ++ { ++ ptr += rmv_len ; ++ *ptr = 0x87; ++ *(ptr+1) = 0x12; ++ ++ eth_type = 0x8712; ++ // append rx status for mp test packets ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24); ++ _rtw_memcpy(ptr, get_rxmem(precvframe), 24); ++ ptr+=24; ++ } ++ else { ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+ (bsnaphdr?2:0))); ++ } ++ ++ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); ++ ++ if(!bsnaphdr) { ++ len = htons(len); ++ _rtw_memcpy(ptr+12, &len, 2); ++ } ++ ++_func_exit_; ++ return ret; ++ ++} ++ ++#else ++ ++sint wlanhdr_to_ethhdr ( union recv_frame *precvframe) ++{ ++ sint rmv_len; ++ u16 eth_type; ++ u8 bsnaphdr; ++ u8 *psnap_type; ++ struct ieee80211_snap_hdr *psnap; ++ ++ sint ret=_SUCCESS; ++ _adapter *adapter =precvframe->u.hdr.adapter; ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++ u8* ptr = get_recvframe_data(precvframe) ; // point to frame_ctrl field ++ struct rx_pkt_attrib *pattrib = & precvframe->u.hdr.attrib; ++ struct _vlan *pvlan = NULL; ++ ++_func_enter_; ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr+pattrib->hdrlen + pattrib->iv_len); ++ psnap_type=ptr+pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03) ++ { ++ if (_rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) ++ bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; ++ else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && ++ _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) ) ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; ++ else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; ++ else { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n")); ++ ret= _FAIL; ++ goto exit; ++ } ++ ++ } else ++ bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; ++ ++ rmv_len = pattrib->hdrlen + pattrib->iv_len +(bsnaphdr?SNAP_SIZE:0); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("===pattrib->hdrlen: %x, pattrib->iv_len:%x ===\n", pattrib->hdrlen, pattrib->iv_len)); ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ptr += rmv_len ; ++ *ptr = 0x87; ++ *(ptr+1) = 0x12; ++ ++ //back to original pointer ++ ptr -= rmv_len; ++ } ++ ++ ptr += rmv_len ; ++ ++ _rtw_memcpy(ð_type, ptr, 2); ++ eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ++ ptr +=2; ++ ++ if(pattrib->encrypt){ ++ recvframe_pull_tail(precvframe, pattrib->icv_len); ++ } ++ ++ if(eth_type == 0x8100) //vlan ++ { ++ pvlan = (struct _vlan *) ptr; ++ ++ //eth_type = get_vlan_encap_proto(pvlan); ++ //eth_type = pvlan->h_vlan_encapsulated_proto;//? ++ rmv_len += 4; ++ ptr+=4; ++ } ++ ++ if(eth_type==0x0800)//ip ++ { ++ //struct iphdr* piphdr = (struct iphdr*) ptr; ++ //__u8 tos = (unsigned char)(pattrib->priority & 0xff); ++ ++ //piphdr->tos = tos; ++ ++ //if (piphdr->protocol == 0x06) ++ //{ ++ // RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", precvframe->u.hdr.len)); ++ //} ++ } ++ else if(eth_type==0x8712)// append rx status for mp test packets ++ { ++ //ptr -= 16; ++ //_rtw_memcpy(ptr, get_rxmem(precvframe), 16); ++ } ++ else ++ { ++#ifdef PLATFORM_OS_XP ++ NDIS_PACKET_8021Q_INFO VlanPriInfo; ++ UINT32 UserPriority = precvframe->u.hdr.attrib.priority; ++ UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 ); ++ ++ VlanPriInfo.Value = // Get current value. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo); ++ ++ VlanPriInfo.TagHeader.UserPriority = UserPriority; ++ VlanPriInfo.TagHeader.VlanId = VlanID ; ++ ++ VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero. ++ VlanPriInfo.TagHeader.Reserved = 0; // Should be zero. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(precvframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; ++#endif ++ } ++ ++ if(eth_type==0x8712)// append rx status for mp test packets ++ { ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)-24); ++ _rtw_memcpy(ptr, get_rxmem(precvframe), 24); ++ ptr+=24; ++ } ++ else ++ ptr = recvframe_pull(precvframe, (rmv_len-sizeof(struct ethhdr)+2)); ++ ++ _rtw_memcpy(ptr, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(ptr+ETH_ALEN, pattrib->src, ETH_ALEN); ++ ++ eth_type = htons((unsigned short)eth_type) ; ++ _rtw_memcpy(ptr+12, ð_type, 2); ++ ++exit: ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif ++ ++//perform defrag ++static union recv_frame * recvframe_defrag(_adapter *adapter,_queue *defrag_q) ++{ ++ _list *plist, *phead; ++ u8 *data,wlanhdr_offset; ++ u8 curfragnum; ++ struct recv_frame_hdr *pfhdr,*pnfhdr; ++ union recv_frame* prframe, *pnextrframe; ++ _queue *pfree_recv_queue; ++ ++_func_enter_; ++ ++ curfragnum=0; ++ pfree_recv_queue=&adapter->recvpriv.free_recv_queue; ++ ++ phead = get_list_head(defrag_q); ++ plist = get_next(phead); ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pfhdr=&prframe->u.hdr; ++ rtw_list_delete(&(prframe->u.list)); ++ ++ if(curfragnum!=pfhdr->attrib.frag_num) ++ { ++ //the first fragment number must be 0 ++ //free the whole queue ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ ++ return NULL; ++ } ++ ++ curfragnum++; ++ ++ plist= get_list_head(defrag_q); ++ ++ plist = get_next(plist); ++ ++ data=get_recvframe_data(prframe); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pnextrframe = LIST_CONTAINOR(plist, union recv_frame , u); ++ pnfhdr=&pnextrframe->u.hdr; ++ ++ ++ //check the fragment sequence (2nd ~n fragment frame) ++ ++ if(curfragnum!=pnfhdr->attrib.frag_num) ++ { ++ //the fragment number must be increasing (after decache) ++ //release the defrag_q & prframe ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ return NULL; ++ } ++ ++ curfragnum++; ++ ++ //copy the 2nd~n fragment frame's payload to the first fragment ++ //get the 2nd~last fragment frame's payload ++ ++ wlanhdr_offset = pnfhdr->attrib.hdrlen + pnfhdr->attrib.iv_len; ++ ++ recvframe_pull(pnextrframe, wlanhdr_offset); ++ ++ //append to first fragment frame's tail (if privacy frame, pull the ICV) ++ recvframe_pull_tail(prframe, pfhdr->attrib.icv_len); ++ ++ //memcpy ++ _rtw_memcpy(pfhdr->rx_tail, pnfhdr->rx_data, pnfhdr->len); ++ ++ recvframe_put(prframe, pnfhdr->len); ++ ++ pfhdr->attrib.icv_len=pnfhdr->attrib.icv_len; ++ plist = get_next(plist); ++ ++ }; ++ ++ //free the defrag_q queue and return the prframe ++ rtw_free_recvframe_queue(defrag_q, pfree_recv_queue); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Performance defrag!!!!!\n")); ++ ++_func_exit_; ++ ++ return prframe; ++} ++ ++ ++//check if need to defrag, if needed queue the frame to defrag_q ++static union recv_frame * recvframe_chk_defrag(_adapter *padapter,union recv_frame* precv_frame) ++{ ++ u8 ismfrag; ++ u8 fragnum; ++ u8 *psta_addr; ++ struct recv_frame_hdr *pfhdr; ++ struct sta_info * psta; ++ struct sta_priv *pstapriv ; ++ _list *phead; ++ union recv_frame* prtnframe=NULL; ++ _queue *pfree_recv_queue, *pdefrag_q; ++ ++_func_enter_; ++ ++ pstapriv = &padapter->stapriv; ++ ++ pfhdr=&precv_frame->u.hdr; ++ ++ pfree_recv_queue=&padapter->recvpriv.free_recv_queue; ++ ++ //need to define struct of wlan header frame ctrl ++ ismfrag= pfhdr->attrib.mfrag; ++ fragnum=pfhdr->attrib.frag_num; ++ ++ psta_addr=pfhdr->attrib.ta; ++ psta=rtw_get_stainfo(pstapriv, psta_addr); ++ if (psta==NULL) ++ pdefrag_q = NULL; ++ else ++ pdefrag_q=&psta->sta_recvpriv.defrag_q; ++ ++ if ((ismfrag==0) && (fragnum==0)) ++ { ++ prtnframe = precv_frame;//isn't a fragment frame ++ } ++ ++ if (ismfrag==1) ++ { ++ //0~(n-1) fragment frame ++ //enqueue to defraf_g ++ if(pdefrag_q != NULL) ++ { ++ if(fragnum==0) ++ { ++ //the first fragment ++ if(_rtw_queue_empty(pdefrag_q) == _FALSE) ++ { ++ //free current defrag_q ++ rtw_free_recvframe_queue(pdefrag_q, pfree_recv_queue); ++ } ++ } ++ ++ ++ //Then enqueue the 0~(n-1) fragment into the defrag_q ++ ++ //_rtw_spinlock(&pdefrag_q->lock); ++ phead = get_list_head(pdefrag_q); ++ rtw_list_insert_tail(&pfhdr->list, phead); ++ //_rtw_spinunlock(&pdefrag_q->lock); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Enqueuq: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); ++ ++ prtnframe=NULL; ++ ++ } ++ else ++ { ++ //can't find this ta's defrag_queue, so free this recv_frame ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ prtnframe=NULL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); ++ } ++ ++ } ++ ++ if((ismfrag==0)&&(fragnum!=0)) ++ { ++ //the last fragment frame ++ //enqueue the last fragment ++ if(pdefrag_q != NULL) ++ { ++ //_rtw_spinlock(&pdefrag_q->lock); ++ phead = get_list_head(pdefrag_q); ++ rtw_list_insert_tail(&pfhdr->list,phead); ++ //_rtw_spinunlock(&pdefrag_q->lock); ++ ++ //call recvframe_defrag to defrag ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("defrag: ismfrag = %d, fragnum= %d\n", ismfrag, fragnum)); ++ precv_frame = recvframe_defrag(padapter, pdefrag_q); ++ prtnframe=precv_frame; ++ ++ } ++ else ++ { ++ //can't find this ta's defrag_queue, so free this recv_frame ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ prtnframe=NULL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("Free because pdefrag_q ==NULL: ismfrag = %d, fragnum= %d\n", ismfrag,fragnum)); ++ } ++ ++ } ++ ++ ++ if((prtnframe!=NULL)&&(prtnframe->u.hdr.attrib.privacy)) ++ { ++ //after defrag we must check tkip mic code ++ if(recvframe_chkmic(padapter, prtnframe)==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chkmic(padapter, prtnframe)==_FAIL\n")); ++ rtw_free_recvframe(prtnframe,pfree_recv_queue); ++ prtnframe=NULL; ++ } ++ } ++ ++_func_exit_; ++ ++ return prtnframe; ++ ++} ++ ++ ++static int amsdu_to_msdu(_adapter *padapter, union recv_frame *prframe) ++{ ++#ifdef PLATFORM_LINUX //for amsdu TP improvement,Creator: Thomas ++ int a_len, padding_len; ++ u16 eth_type, nSubframe_Length; ++ u8 nr_subframes, i; ++ unsigned char *data_ptr, *pdata; ++ struct rx_pkt_attrib *pattrib; ++ _pkt *sub_skb,*subframes[MAX_SUBFRAME_COUNT]; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); ++ int ret = _SUCCESS; ++ ++ nr_subframes = 0; ++ ++ pattrib = &prframe->u.hdr.attrib; ++ ++ recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen); ++ ++ if(prframe->u.hdr.attrib.iv_len >0) ++ { ++ recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len); ++ } ++ ++ a_len = prframe->u.hdr.len; ++ ++ pdata = prframe->u.hdr.rx_data; ++ ++ while(a_len > ETH_HLEN) { ++ ++ /* Offset 12 denote 2 mac address */ ++ //nSubframe_Length = *((u16*)(pdata + 12)); ++ //==m==>change the length order ++ //nSubframe_Length = (nSubframe_Length>>8) + (nSubframe_Length<<8); ++ //nSubframe_Length = ntohs(*((u16*)(pdata + 12))); ++ nSubframe_Length = RTW_GET_BE16(pdata + 12); ++ ++ //ntohs(nSubframe_Length); ++ ++ if( a_len < (ETHERNET_HEADER_SIZE + nSubframe_Length) ) { ++ DBG_8192C("nRemain_Length is %d and nSubframe_Length is : %d\n",a_len,nSubframe_Length); ++ goto exit; ++ } ++ ++ /* move the data point to data content */ ++ pdata += ETH_HLEN; ++ a_len -= ETH_HLEN; ++ ++ /* Allocate new skb for releasing to upper layer */ ++#ifdef CONFIG_SKB_COPY ++ sub_skb = dev_alloc_skb(nSubframe_Length + 12); ++ if(sub_skb) ++ { ++ skb_reserve(sub_skb, 12); ++ data_ptr = (u8 *)skb_put(sub_skb, nSubframe_Length); ++ _rtw_memcpy(data_ptr, pdata, nSubframe_Length); ++ } ++ else ++ { ++#endif // CONFIG_SKB_COPY ++ sub_skb = skb_clone(prframe->u.hdr.pkt, GFP_ATOMIC); ++ if(sub_skb) ++ { ++ sub_skb->data = pdata; ++ sub_skb->len = nSubframe_Length; ++ sub_skb->tail = sub_skb->data + nSubframe_Length; ++ } ++ else ++ { ++ DBG_8192C("skb_clone() Fail!!! , nr_subframes = %d\n",nr_subframes); ++ break; ++ } ++ } ++ ++ //sub_skb->dev = padapter->pnetdev; ++ subframes[nr_subframes++] = sub_skb; ++ if(nr_subframes >= MAX_SUBFRAME_COUNT) { ++ DBG_8192C("ParseSubframe(): Too many Subframes! Packets dropped!\n"); ++ break; ++ } ++ ++ pdata += nSubframe_Length; ++ a_len -= nSubframe_Length; ++ if(a_len != 0) { ++ padding_len = 4 - ((nSubframe_Length + ETH_HLEN) & (4-1)); ++ if(padding_len == 4) { ++ padding_len = 0; ++ } ++ ++ if(a_len < padding_len) { ++ goto exit; ++ } ++ pdata += padding_len; ++ a_len -= padding_len; ++ } ++ } ++ ++ for(i=0; idata[6] << 8) | sub_skb->data[7]; ++ //eth_type = ntohs(*(u16*)&sub_skb->data[6]); ++ eth_type = RTW_GET_BE16(&sub_skb->data[6]); ++ if (sub_skb->len >= 8 && ++ ((_rtw_memcmp(sub_skb->data, rtw_rfc1042_header, SNAP_SIZE) && ++ eth_type != ETH_P_AARP && eth_type != ETH_P_IPX) || ++ _rtw_memcmp(sub_skb->data, rtw_bridge_tunnel_header, SNAP_SIZE) )) { ++ /* remove RFC1042 or Bridge-Tunnel encapsulation and replace EtherType */ ++ skb_pull(sub_skb, SNAP_SIZE); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); ++ } else { ++ u16 len; ++ /* Leave Ethernet header part of hdr and full payload */ ++ len = htons(sub_skb->len); ++ _rtw_memcpy(skb_push(sub_skb, 2), &len, 2); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->src, ETH_ALEN); ++ _rtw_memcpy(skb_push(sub_skb, ETH_ALEN), pattrib->dst, ETH_ALEN); ++ } ++ ++ /* Indicat the packets to upper layer */ ++ if (sub_skb) { ++ //memset(sub_skb->cb, 0, sizeof(sub_skb->cb)); ++ ++#ifdef CONFIG_BR_EXT ++ // Insert NAT2.5 RX here! ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ void *br_port = NULL; ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ ++ if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); ++ if (nat25_handle_frame(padapter, sub_skb) == -1) { ++ //priv->ext_stats.rx_data_drops++; ++ //DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); ++ //return FAIL; ++ ++#if 1 ++ // bypass this frame to upper layer!! ++#else ++ dev_kfree_skb_any(sub_skb); ++ continue; ++#endif ++ } ++ } ++#endif // CONFIG_BR_EXT ++ ++ sub_skb->protocol = eth_type_trans(sub_skb, padapter->pnetdev); ++ sub_skb->dev = padapter->pnetdev; ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { ++ sub_skb->ip_summed = CHECKSUM_UNNECESSARY; ++ } else { ++ sub_skb->ip_summed = CHECKSUM_NONE; ++ } ++#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ ++ sub_skb->ip_summed = CHECKSUM_NONE; ++#endif ++ ++ netif_rx(sub_skb); ++ } ++ } ++ ++exit: ++ ++ prframe->u.hdr.len=0; ++ rtw_free_recvframe(prframe, pfree_recv_queue);//free this recv_frame ++ ++ return ret; ++#else ++ _irqL irql; ++ unsigned char *ptr, *pdata, *pbuf, *psnap_type; ++ union recv_frame *pnrframe, *pnrframe_new; ++ int a_len, mv_len, padding_len; ++ u16 eth_type, type_len; ++ u8 bsnaphdr; ++ struct ieee80211_snap_hdr *psnap; ++ struct _vlan *pvlan; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &(precvpriv->free_recv_queue); ++ int ret = _SUCCESS; ++#ifdef PLATFORM_WINDOWS ++ struct recv_buf *precvbuf = prframe->u.hdr.precvbuf; ++#endif ++ a_len = prframe->u.hdr.len - prframe->u.hdr.attrib.hdrlen; ++ ++ recvframe_pull(prframe, prframe->u.hdr.attrib.hdrlen); ++ ++ if(prframe->u.hdr.attrib.iv_len >0) ++ { ++ recvframe_pull(prframe, prframe->u.hdr.attrib.iv_len); ++ } ++ ++ pdata = prframe->u.hdr.rx_data; ++ ++ prframe->u.hdr.len=0; ++ ++ pnrframe = prframe; ++ ++ ++ do{ ++ ++ mv_len=0; ++ pnrframe->u.hdr.rx_data = pnrframe->u.hdr.rx_tail = pdata; ++ ptr = pdata; ++ ++ ++ _rtw_memcpy(pnrframe->u.hdr.attrib.dst, ptr, ETH_ALEN); ++ ptr+=ETH_ALEN; ++ _rtw_memcpy(pnrframe->u.hdr.attrib.src, ptr, ETH_ALEN); ++ ptr+=ETH_ALEN; ++ ++ _rtw_memcpy(&type_len, ptr, 2); ++ type_len= ntohs((unsigned short )type_len); ++ ptr +=2; ++ mv_len += ETH_HLEN; ++ ++ recvframe_put(pnrframe, type_len+ETH_HLEN);//update tail; ++ ++ if(pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8) ++ { ++ //panic("pnrframe->u.hdr.rx_data >= pnrframe->u.hdr.rx_tail || type_len<8\n"); ++ ++ rtw_free_recvframe(pnrframe, pfree_recv_queue); ++ ++ goto exit; ++ } ++ ++ psnap=(struct ieee80211_snap_hdr *)(ptr); ++ psnap_type=ptr+SNAP_SIZE; ++ if (psnap->dsap==0xaa && psnap->ssap==0xaa && psnap->ctrl==0x03) ++ { ++ if ( _rtw_memcmp(psnap->oui, oui_rfc1042, WLAN_IEEE_OUI_LEN)) ++ { ++ bsnaphdr=_TRUE;//wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_RFC1042; ++ } ++ else if (_rtw_memcmp(psnap->oui, SNAP_HDR_APPLETALK_DDP, WLAN_IEEE_OUI_LEN) && ++ _rtw_memcmp(psnap_type, SNAP_ETH_TYPE_APPLETALK_DDP, 2) ) ++ { ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_APPLETALK; ++ } ++ else if (_rtw_memcmp( psnap->oui, oui_8021h, WLAN_IEEE_OUI_LEN)) ++ { ++ bsnaphdr=_TRUE; //wlan_pkt_format = WLAN_PKT_FORMAT_SNAP_TUNNEL; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("drop pkt due to invalid frame format!\n")); ++ ++ //KeBugCheckEx(0x87123333, 0xe0, 0x4c, 0x87, 0xdd); ++ ++ //panic("0x87123333, 0xe0, 0x4c, 0x87, 0xdd\n"); ++ ++ rtw_free_recvframe(pnrframe, pfree_recv_queue); ++ ++ goto exit; ++ } ++ ++ } ++ else ++ { ++ bsnaphdr=_FALSE;//wlan_pkt_format = WLAN_PKT_FORMAT_OTHERS; ++ } ++ ++ ptr += (bsnaphdr?SNAP_SIZE:0); ++ _rtw_memcpy(ð_type, ptr, 2); ++ eth_type= ntohs((unsigned short )eth_type); //pattrib->ether_type ++ ++ mv_len+= 2+(bsnaphdr?SNAP_SIZE:0); ++ ptr += 2;//now move to iphdr; ++ ++ pvlan = NULL; ++ if(eth_type == 0x8100) //vlan ++ { ++ pvlan = (struct _vlan *)ptr; ++ ptr+=4; ++ mv_len+=4; ++ } ++ ++ if(eth_type==0x0800)//ip ++ { ++ struct iphdr* piphdr = (struct iphdr*)ptr; ++ ++ ++ if (piphdr->protocol == 0x06) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("@@@===recv tcp len:%d @@@===\n", pnrframe->u.hdr.len)); ++ } ++ } ++#ifdef PLATFORM_OS_XP ++ else ++ { ++ NDIS_PACKET_8021Q_INFO VlanPriInfo; ++ UINT32 UserPriority = pnrframe->u.hdr.attrib.priority; ++ UINT32 VlanID = (pvlan!=NULL ? get_vlan_id(pvlan) : 0 ); ++ ++ VlanPriInfo.Value = // Get current value. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo); ++ ++ VlanPriInfo.TagHeader.UserPriority = UserPriority; ++ VlanPriInfo.TagHeader.VlanId = VlanID; ++ ++ VlanPriInfo.TagHeader.CanonicalFormatId = 0; // Should be zero. ++ VlanPriInfo.TagHeader.Reserved = 0; // Should be zero. ++ NDIS_PER_PACKET_INFO_FROM_PACKET(pnrframe->u.hdr.pkt, Ieee8021QInfo) = VlanPriInfo.Value; ++ ++ } ++#endif ++ ++ pbuf = recvframe_pull(pnrframe, (mv_len-sizeof(struct ethhdr))); ++ ++ _rtw_memcpy(pbuf, pnrframe->u.hdr.attrib.dst, ETH_ALEN); ++ _rtw_memcpy(pbuf+ETH_ALEN, pnrframe->u.hdr.attrib.src, ETH_ALEN); ++ ++ eth_type = htons((unsigned short)eth_type) ; ++ _rtw_memcpy(pbuf+12, ð_type, 2); ++ ++ padding_len = (4) - ((type_len + ETH_HLEN)&(4-1)); ++ ++ a_len -= (type_len + ETH_HLEN + padding_len) ; ++ ++ ++#if 0 ++ ++ if(a_len > ETH_HLEN) ++ { ++ pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue); ++ if(pnrframe_new) ++ { ++ _pkt *pskb_copy; ++ unsigned int copy_len = pnrframe->u.hdr.len; ++ ++ _rtw_init_listhead(&pnrframe_new->u.hdr.list); ++ ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ pskb_copy = dev_alloc_skb(copy_len+64); ++ #else ++ pskb_copy = netdev_alloc_skb(padapter->pnetdev, copy_len + 64); ++ #endif ++ if(pskb_copy==NULL) ++ { ++ DBG_8192C("amsdu_to_msdu:can not all(ocate memory for skb copy\n"); ++ } ++ ++ pnrframe_new->u.hdr.pkt = pskb_copy; ++ ++ _rtw_memcpy(pskb_copy->data, pnrframe->u.hdr.rx_data, copy_len); ++ ++ pnrframe_new->u.hdr.rx_data = pnrframe->u.hdr.rx_data; ++ pnrframe_new->u.hdr.rx_tail = pnrframe->u.hdr.rx_data + copy_len; ++ ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe_new);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe_new, pfree_recv_queue);//free this recv_frame ++ } ++ ++ } ++ else ++ { ++ DBG_8192C("amsdu_to_msdu:can not allocate memory for pnrframe_new\n"); ++ } ++ ++ } ++ else ++ { ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame ++ } ++ ++ pnrframe = NULL; ++ ++ } ++ ++#else ++ ++ //padding_len = (4) - ((type_len + ETH_HLEN)&(4-1)); ++ ++ //a_len -= (type_len + ETH_HLEN + padding_len) ; ++ ++ pnrframe_new = NULL; ++ ++ ++ if(a_len > ETH_HLEN) ++ { ++ pnrframe_new = rtw_alloc_recvframe(pfree_recv_queue); ++ ++ if(pnrframe_new) ++ { ++ ++ ++ //pnrframe_new->u.hdr.precvbuf = precvbuf;//precvbuf is assigned before call rtw_init_recvframe() ++ //rtw_init_recvframe(pnrframe_new, precvpriv); ++ { ++ _pkt *pskb = pnrframe->u.hdr.pkt; ++ _rtw_init_listhead(&pnrframe_new->u.hdr.list); ++ ++ pnrframe_new->u.hdr.len=0; ++ ++#ifdef PLATFORM_LINUX ++ if(pskb) ++ { ++ pnrframe_new->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC); ++ } ++#endif ++ ++ } ++ ++ pdata += (type_len + ETH_HLEN + padding_len); ++ pnrframe_new->u.hdr.rx_head = pnrframe_new->u.hdr.rx_data = pnrframe_new->u.hdr.rx_tail = pdata; ++ pnrframe_new->u.hdr.rx_end = pdata + a_len + padding_len;// ++ ++#ifdef PLATFORM_WINDOWS ++ pnrframe_new->u.hdr.precvbuf=precvbuf; ++ _enter_critical_bh(&precvbuf->recvbuf_lock, &irql); ++ precvbuf->ref_cnt++; ++ _exit_critical_bh(&precvbuf->recvbuf_lock, &irql); ++#endif ++ ++ } ++ else ++ { ++ //panic("pnrframe_new=%x\n", pnrframe_new); ++ } ++ } ++ ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE) ) ++ { ++ rtw_recv_indicatepkt(padapter, pnrframe);//indicate this recv_frame ++ } ++ else ++ { ++ rtw_free_recvframe(pnrframe, pfree_recv_queue);//free this recv_frame ++ } ++ ++ ++ pnrframe = NULL; ++ if(pnrframe_new) ++ { ++ pnrframe = pnrframe_new; ++ } ++ ++ ++#endif ++ ++ }while(pnrframe); ++ ++exit: ++ ++ return ret; ++#endif ++} ++ ++ ++static int check_indicate_seq(struct recv_reorder_ctrl *preorder_ctrl, u16 seq_num) ++{ ++ u8 wsize = preorder_ctrl->wsize_b; ++ u16 wend = (preorder_ctrl->indicate_seq + wsize -1) & 0xFFF;//% 4096; ++ ++ // Rx Reorder initialize condition. ++ if (preorder_ctrl->indicate_seq == 0xFFFF) ++ { ++ preorder_ctrl->indicate_seq = seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d init IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ ++ //DbgPrint("check_indicate_seq, 1st->indicate_seq=%d\n", precvpriv->indicate_seq); ++ } ++ ++ //DbgPrint("enter->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ // Drop out the packet which SeqNum is smaller than WinStart ++ if( SN_LESS(seq_num, preorder_ctrl->indicate_seq) ) ++ { ++ //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); ++ //DbgPrint("CheckRxTsIndicateSeq(): Packet Drop! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ ++ ++ return _FALSE; ++ } ++ ++ // ++ // Sliding window manipulation. Conditions includes: ++ // 1. Incoming SeqNum is equal to WinStart =>Window shift 1 ++ // 2. Incoming SeqNum is larger than the WinEnd => Window shift N ++ // ++ if( SN_EQUAL(seq_num, preorder_ctrl->indicate_seq) ) ++ { ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d SN_EQUAL IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ } ++ else if(SN_LESS(wend, seq_num)) ++ { ++ //RT_TRACE(COMP_RX_REORDER, DBG_LOUD, ("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, NewSeqNum)); ++ //DbgPrint("CheckRxTsIndicateSeq(): Window Shift! IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ // boundary situation, when seq_num cross 0xFFF ++ if(seq_num >= (wsize - 1)) ++ preorder_ctrl->indicate_seq = seq_num + 1 -wsize; ++ else ++ preorder_ctrl->indicate_seq = 0xFFF - (wsize - (seq_num + 1)) + 1; ++ ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d SN_LESS(wend, seq_num) IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, seq_num); ++ #endif ++ } ++ ++ //DbgPrint("exit->check_indicate_seq(): IndicateSeq: %d, NewSeq: %d\n", precvpriv->indicate_seq, seq_num); ++ ++ return _TRUE; ++} ++ ++ ++static int enqueue_reorder_recvframe(struct recv_reorder_ctrl *preorder_ctrl, union recv_frame *prframe) ++{ ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ _list *phead, *plist; ++ union recv_frame *pnextrframe; ++ struct rx_pkt_attrib *pnextattrib; ++ ++ //DbgPrint("+enqueue_reorder_recvframe()\n"); ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++ while(rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pnextrframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pnextattrib = &pnextrframe->u.hdr.attrib; ++ ++ if(SN_LESS(pnextattrib->seq_num, pattrib->seq_num)) ++ { ++ plist = get_next(plist); ++ } ++ else if( SN_EQUAL(pnextattrib->seq_num, pattrib->seq_num)) ++ { ++ //Duplicate entry is found!! Do not insert current entry. ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Duplicate packet is dropped!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); ++ ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ return _FALSE; ++ } ++ else ++ { ++ break; ++ } ++ ++ //DbgPrint("enqueue_reorder_recvframe():while\n"); ++ ++ } ++ ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ rtw_list_insert_tail(&(prframe->u.hdr.list), plist); ++ ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("InsertRxReorderList(): Pkt insert into buffer!! IndicateSeq: %d, NewSeq: %d\n", pTS->RxIndicateSeq, SeqNum)); ++ return _TRUE; ++ ++} ++ ++ ++static int recv_indicatepkts_in_order(_adapter *padapter, struct recv_reorder_ctrl *preorder_ctrl, int bforced) ++{ ++ _irqL irql; ++ //u8 bcancelled; ++ _list *phead, *plist; ++ union recv_frame *prframe; ++ struct rx_pkt_attrib *pattrib; ++ //u8 index = 0; ++ int bPktInBuf = _FALSE; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ //DbgPrint("+recv_indicatepkts_in_order\n"); ++ ++ //_enter_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinlock_ex(&ppending_recvframe_queue->lock); ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++#if 0 ++ // Check if there is any other indication thread running. ++ if(pTS->RxIndicateState == RXTS_INDICATE_PROCESSING) ++ return; ++#endif ++ ++ // Handling some condition for forced indicate case. ++ if(bforced==_TRUE) ++ { ++ if(rtw_is_list_empty(phead)) ++ { ++ // _exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ return _TRUE; ++ } ++ ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pattrib = &prframe->u.hdr.attrib; ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ } ++ ++ // Prepare indication list and indication. ++ // Check if there is any packet need indicate. ++ while(!rtw_is_list_empty(phead)) ++ { ++ ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ pattrib = &prframe->u.hdr.attrib; ++ ++ if(!SN_LESS(preorder_ctrl->indicate_seq, pattrib->seq_num)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ++ ("recv_indicatepkts_in_order: indicate=%d seq=%d amsdu=%d\n", ++ preorder_ctrl->indicate_seq, pattrib->seq_num, pattrib->amsdu)); ++ ++#if 0 ++ // This protect buffer from overflow. ++ if(index >= REORDER_WIN_SIZE) ++ { ++ RT_ASSERT(FALSE, ("IndicateRxReorderList(): Buffer overflow!! \n")); ++ bPktInBuf = TRUE; ++ break; ++ } ++#endif ++ ++ plist = get_next(plist); ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ if(SN_EQUAL(preorder_ctrl->indicate_seq, pattrib->seq_num)) ++ { ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1) & 0xFFF; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ } ++ ++#if 0 ++ index++; ++ if(index==1) ++ { ++ //Cancel previous pending timer. ++ //PlatformCancelTimer(Adapter, &pTS->RxPktPendingTimer); ++ if(bforced!=_TRUE) ++ { ++ //DBG_8192C("_cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled);\n"); ++ _cancel_timer(&preorder_ctrl->reordering_ctrl_timer, &bcancelled); ++ } ++ } ++#endif ++ ++ //Set this as a lock to make sure that only one thread is indicating packet. ++ //pTS->RxIndicateState = RXTS_INDICATE_PROCESSING; ++ ++ // Indicate packets ++ //RT_ASSERT((index<=REORDER_WIN_SIZE), ("RxReorderIndicatePacket(): Rx Reorder buffer full!! \n")); ++ ++ ++ //indicate this recv_frame ++ //DbgPrint("recv_indicatepkts_in_order, indicate_seq=%d, seq_num=%d\n", precvpriv->indicate_seq, pattrib->seq_num); ++ if(!pattrib->amsdu) ++ { ++ //DBG_8192C("recv_indicatepkts_in_order, amsdu!=1, indicate_seq=%d, seq_num=%d\n", preorder_ctrl->indicate_seq, pattrib->seq_num); ++ ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ ++ rtw_recv_indicatepkt(padapter, prframe); //indicate this recv_frame ++ ++ } ++ } ++ else if(pattrib->amsdu==1) ++ { ++ if(amsdu_to_msdu(padapter, prframe)!=_SUCCESS) ++ { ++ rtw_free_recvframe(prframe, &precvpriv->free_recv_queue); ++ } ++ } ++ else ++ { ++ //error condition; ++ } ++ ++ ++ //Update local variables. ++ bPktInBuf = _FALSE; ++ ++ } ++ else ++ { ++ bPktInBuf = _TRUE; ++ break; ++ } ++ ++ //DbgPrint("recv_indicatepkts_in_order():while\n"); ++ ++ } ++ ++ //_rtw_spinunlock_ex(&ppending_recvframe_queue->lock); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++/* ++ //Release the indication lock and set to new indication step. ++ if(bPktInBuf) ++ { ++ // Set new pending timer. ++ //pTS->RxIndicateState = RXTS_INDICATE_REORDER; ++ //PlatformSetTimer(Adapter, &pTS->RxPktPendingTimer, pHTInfo->RxReorderPendingTime); ++ //DBG_8192C("_set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME)\n"); ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ } ++ else ++ { ++ //pTS->RxIndicateState = RXTS_INDICATE_IDLE; ++ } ++*/ ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ ++ //return _TRUE; ++ return bPktInBuf; ++ ++} ++ ++ ++static int recv_indicatepkt_reorder(_adapter *padapter, union recv_frame *prframe) ++{ ++ _irqL irql; ++ int retval = _SUCCESS; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ struct recv_reorder_ctrl *preorder_ctrl = prframe->u.hdr.preorder_ctrl; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ if(!pattrib->amsdu) ++ { ++ //s1. ++ wlanhdr_to_ethhdr(prframe); ++ ++ if(pattrib->qos !=1 /*|| pattrib->priority!=0 || IS_MCAST(pattrib->ra)*/) ++ { ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_indicatepkt_reorder -recv_func recv_indicatepkt\n" )); ++ ++ rtw_recv_indicatepkt(padapter, prframe); ++ return _SUCCESS; ++ ++ } ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s pattrib->qos !=1\n", __FUNCTION__); ++ #endif ++ ++ return _FAIL; ++ ++ } ++ ++ if (preorder_ctrl->enable == _FALSE) ++ { ++ //indicate this recv_frame ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ rtw_recv_indicatepkt(padapter, prframe); ++ ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ return _SUCCESS; ++ } ++ ++#ifndef CONFIG_RECV_REORDERING_CTRL ++ //indicate this recv_frame ++ rtw_recv_indicatepkt(padapter, prframe); ++ return _SUCCESS; ++#endif ++ ++ } ++ else if(pattrib->amsdu==1) //temp filter -> means didn't support A-MSDUs in a A-MPDU ++ { ++ if (preorder_ctrl->enable == _FALSE) ++ { ++ preorder_ctrl->indicate_seq = pattrib->seq_num; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ retval = amsdu_to_msdu(padapter, prframe); ++ ++ preorder_ctrl->indicate_seq = (preorder_ctrl->indicate_seq + 1)%4096; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, NewSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, pattrib->seq_num); ++ #endif ++ ++ if(retval != _SUCCESS){ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); ++ #endif ++ } ++ ++ return retval; ++ } ++ } ++ else ++ { ++ ++ } ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ++ ("recv_indicatepkt_reorder: indicate=%d seq=%d\n", ++ preorder_ctrl->indicate_seq, pattrib->seq_num)); ++ ++ //s2. check if winstart_b(indicate_seq) needs to been updated ++ if(!check_indicate_seq(preorder_ctrl, pattrib->seq_num)) ++ { ++ //pHTInfo->RxReorderDropCounter++; ++ //ReturnRFDList(Adapter, pRfd); ++ //RT_TRACE(COMP_RX_REORDER, DBG_TRACE, ("RxReorderIndicatePacket() ==> Packet Drop!!\n")); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //return _FAIL; ++ ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s check_indicate_seq fail\n", __FUNCTION__); ++ #endif ++ goto _err_exit; ++ } ++ ++ ++ //s3. Insert all packet into Reorder Queue to maintain its ordering. ++ if(!enqueue_reorder_recvframe(preorder_ctrl, prframe)) ++ { ++ //DbgPrint("recv_indicatepkt_reorder, enqueue_reorder_recvframe fail!\n"); ++ //_exit_critical_ex(&ppending_recvframe_queue->lock, &irql); ++ //return _FAIL; ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s enqueue_reorder_recvframe fail\n", __FUNCTION__); ++ #endif ++ goto _err_exit; ++ } ++ ++ ++ //s4. ++ // Indication process. ++ // After Packet dropping and Sliding Window shifting as above, we can now just indicate the packets ++ // with the SeqNum smaller than latest WinStart and buffer other packets. ++ // ++ // For Rx Reorder condition: ++ // 1. All packets with SeqNum smaller than WinStart => Indicate ++ // 2. All packets with SeqNum larger than or equal to WinStart => Buffer it. ++ // ++ ++ //recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE); ++ if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _FALSE)==_TRUE) ++ { ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ } ++ else ++ { ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ++ } ++ ++ ++ return _SUCCESS; ++ ++_err_exit: ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ return _FAIL; ++} ++ ++ ++void rtw_reordering_ctrl_timeout_handler(void *pcontext) ++{ ++ _irqL irql; ++ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)pcontext; ++ _adapter *padapter = preorder_ctrl->padapter; ++ _queue *ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ ++ if(padapter->bDriverStopped ||padapter->bSurpriseRemoved) ++ { ++ return; ++ } ++ ++ //DBG_8192C("+rtw_reordering_ctrl_timeout_handler()=>\n"); ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++ if(recv_indicatepkts_in_order(padapter, preorder_ctrl, _TRUE)==_TRUE) ++ { ++ _set_timer(&preorder_ctrl->reordering_ctrl_timer, REORDER_WAIT_TIME); ++ } ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irql); ++ ++} ++ ++ ++static int process_recv_indicatepkts(_adapter *padapter, union recv_frame *prframe) ++{ ++ int retval = _SUCCESS; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++#ifdef CONFIG_80211N_HT ++ ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++ if(phtpriv->ht_option==_TRUE) //B/G/N Mode ++ { ++ //prframe->u.hdr.preorder_ctrl = &precvpriv->recvreorder_ctrl[pattrib->priority]; ++ ++ if(recv_indicatepkt_reorder(padapter, prframe)!=_SUCCESS)// including perform A-MPDU Rx Ordering Buffer Control ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recv_indicatepkt_reorder error!\n", __FUNCTION__); ++ #endif ++ ++ if ((padapter->bDriverStopped == _FALSE) && ++ (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ retval = _FAIL; ++ return retval; ++ } ++ } ++ } ++ else //B/G mode ++#endif ++ { ++ retval=wlanhdr_to_ethhdr (prframe); ++ if(retval != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr error!\n", __FUNCTION__); ++ #endif ++ return retval; ++ } ++ ++ if ((padapter->bDriverStopped ==_FALSE)&&( padapter->bSurpriseRemoved==_FALSE)) ++ { ++ //indicate this recv_frame ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func recv_indicatepkt\n" )); ++ rtw_recv_indicatepkt(padapter, prframe); ++ ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("@@@@ process_recv_indicatepkts- recv_func free_indicatepkt\n" )); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_notice_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ retval = _FAIL; ++ return retval; ++ } ++ ++ } ++ ++ return retval; ++ ++} ++ ++ ++static int recv_func(_adapter *padapter, void *pcontext) ++{ ++ struct rx_pkt_attrib *pattrib; ++ union recv_frame *prframe, *orig_prframe; ++ int retval = _SUCCESS; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TDLS ++ u8 *psnap_type, *pcategory; ++#endif ++ ++ prframe = (union recv_frame *)pcontext; ++ orig_prframe = prframe; ++ ++ pattrib = &prframe->u.hdr.attrib; ++ ++#ifdef CONFIG_MP_INCLUDED ++ if ((check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE))//&&(padapter->mppriv.check_mp_pkt == 0)) ++ { ++ if (pattrib->crc_err == 1) ++ padapter->mppriv.rx_crcerrpktcount++; ++ else ++ padapter->mppriv.rx_pktcount++; ++ ++ if (check_fwstate(pmlmepriv, WIFI_MP_LPBK_STATE) == _FALSE) { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("MP - Not in loopback mode , drop pkt \n")); ++ retval = _FAIL; ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _exit_recv_func; ++ } ++ } ++#endif ++ ++ //check the frame crtl field and decache ++ retval = validate_recv_frame(padapter, prframe); ++ if (retval != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("recv_func: validate_recv_frame fail! drop pkt\n")); ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _exit_recv_func; ++ } ++ // DATA FRAME ++ rtw_led_control(padapter, LED_CTL_RX); ++ ++ prframe = decryptor(padapter, prframe); ++ if (prframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("decryptor: drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s decryptor: drop pkt\n", __FUNCTION__); ++ #endif ++ retval = _FAIL; ++ goto _recv_data_drop; ++ } ++ ++#ifdef CONFIG_TDLS ++ //check TDLS frame ++ psnap_type = get_recvframe_data(orig_prframe); ++ psnap_type+=pattrib->hdrlen + pattrib->iv_len+SNAP_SIZE; ++ //[+2]: ether_type, [+1]: payload type ++ pcategory = psnap_type+2+1; ++ ++ if((_rtw_memcmp(psnap_type, SNAP_ETH_TYPE_TDLS, 2))&&((*pcategory==0x0c))){ ++ retval = OnTDLS(padapter, prframe); //all of functions will return _FAIL ++ goto _recv_data_drop; ++ } ++#endif ++ ++ prframe = recvframe_chk_defrag(padapter, prframe); ++ if(prframe==NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvframe_chk_defrag: drop pkt\n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recvframe_chk_defrag: drop pkt\n", __FUNCTION__); ++ #endif ++ goto _recv_data_drop; ++ } ++ ++ prframe=portctrl(padapter, prframe); ++ if (prframe == NULL) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("portctrl: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s portctrl: drop pkt\n", __FUNCTION__); ++ #endif ++ retval = _FAIL; ++ goto _recv_data_drop; ++ } ++ ++ count_rx_stats(padapter, prframe, NULL); ++ ++#ifdef CONFIG_80211N_HT ++ ++ retval = process_recv_indicatepkts(padapter, prframe); ++ if (retval != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recv_func: process_recv_indicatepkts fail! \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s recv_func: process_recv_indicatepkts fail!\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _recv_data_drop; ++ } ++ ++#else ++ ++ if (!pattrib->amsdu) ++ { ++ retval = wlanhdr_to_ethhdr (prframe); ++ if (retval != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("wlanhdr_to_ethhdr: drop pkt \n")); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s wlanhdr_to_ethhdr: drop pkt\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue);//free this recv_frame ++ goto _recv_data_drop; ++ } ++ ++ if ((padapter->bDriverStopped == _FALSE) && (padapter->bSurpriseRemoved == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: recv_func rtw_recv_indicatepkt\n" )); ++ //indicate this recv_frame ++ retval = rtw_recv_indicatepkt(padapter, prframe); ++ if (retval != _SUCCESS) ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s rtw_recv_indicatepkt fail!\n", __FUNCTION__); ++ #endif ++ goto _recv_data_drop; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_alert_, ("@@@@ recv_func: rtw_free_recvframe\n" )); ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_debug_, ("recv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s ecv_func:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", __FUNCTION__, ++ padapter->bDriverStopped, padapter->bSurpriseRemoved); ++ #endif ++ retval = _FAIL; ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue); //free this recv_frame ++ } ++ ++ } ++ else if(pattrib->amsdu==1) ++ { ++ ++ retval = amsdu_to_msdu(padapter, prframe); ++ if(retval != _SUCCESS) ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s amsdu_to_msdu fail\n", __FUNCTION__); ++ #endif ++ rtw_free_recvframe(orig_prframe, pfree_recv_queue); ++ goto _recv_data_drop; ++ } ++ } ++ else ++ { ++ #ifdef DBG_RX_DROP_FRAME ++ DBG_871X("DBG_RX_DROP_FRAME %s what is this condition??\n", __FUNCTION__); ++ #endif ++ } ++#endif ++_recv_data_drop: ++ precvpriv->rx_drop++; ++ ++_exit_recv_func: ++ ++ return retval; ++} ++ ++ ++s32 rtw_recv_entry(union recv_frame *precvframe) ++{ ++ _adapter *padapter; ++ struct recv_priv *precvpriv; ++ //struct mlme_priv *pmlmepriv ; ++ //struct dvobj_priv *pdev; ++ //u8 *phead, *pdata, *ptail,*pend; ++ ++ //_queue *pfree_recv_queue, *ppending_recv_queue; ++ //u8 blk_mode = _FALSE; ++ s32 ret=_SUCCESS; ++ //struct intf_hdl * pintfhdl; ++ ++_func_enter_; ++ ++// RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+rtw_recv_entry\n")); ++ ++ padapter = precvframe->u.hdr.adapter; ++ //pintfhdl = &padapter->iopriv.intf; ++ ++ //pdev=&padapter->dvobjpriv; ++ //pmlmepriv = &padapter->mlmepriv; ++ precvpriv = &padapter->recvpriv; ++ //pfree_recv_queue = &precvpriv->free_recv_queue; ++ //ppending_recv_queue = &precvpriv->recv_pending_queue; ++ ++ //phead = precvframe->u.hdr.rx_head; ++ //pdata = precvframe->u.hdr.rx_data; ++ //ptail = precvframe->u.hdr.rx_tail; ++ //pend = precvframe->u.hdr.rx_end; ++ ++ //rtw_led_control(padapter, LED_CTL_RX); ++ ++#ifdef CONFIG_SDIO_HCI ++ if (precvpriv->free_recvframe_cnt <= 1) ++ goto _recv_entry_drop; ++#endif ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ if (_rtw_queue_empty(ppending_recv_queue) == _TRUE) ++ { ++ //enqueue_recvframe_usb(precvframe, ppending_recv_queue);//enqueue to recv_pending_queue ++ rtw_enqueue_recvframe(precvframe, ppending_recv_queue); ++ _rtw_up_sema(&precvpriv->recv_sema); ++ } ++ else ++ { ++ //enqueue_recvframe_usb(precvframe, ppending_recv_queue);//enqueue to recv_pending_queue ++ rtw_enqueue_recvframe(precvframe, ppending_recv_queue); ++ } ++#else ++ if ((ret = recv_func(padapter, precvframe)) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rtw_recv_entry: recv_func return fail!!!\n")); ++ goto _recv_entry_drop; ++ } ++#endif ++ ++ precvpriv->rx_pkts++; ++ ++_func_exit_; ++ ++ return ret; ++ ++_recv_entry_drop: ++ ++ ++ //precvpriv->rx_drop++; ++ ++#ifdef CONFIG_MP_INCLUDED ++ padapter->mppriv.rx_pktloss = precvpriv->rx_drop; ++#endif ++ ++ //RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("_recv_entry_drop\n")); ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++void rtw_signal_stat_timer_hdl(RTW_TIMER_HDL_ARGS){ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ struct recv_priv *recvpriv = &adapter->recvpriv; ++ ++ u32 tmp_s, tmp_q; ++ u8 avg_signal_strength = 0; ++ u8 avg_signal_qual = 0; ++ u32 num_signal_strength = 0; ++ u32 num_signal_qual = 0; ++ u8 _alpha = 3; // this value is based on converging_constant = 5000 and sampling_interval = 1000 ++ ++ if(adapter->recvpriv.is_signal_dbg) { ++ //update the user specific value, signal_strength_dbg, to signal_strength, rssi ++ adapter->recvpriv.signal_strength= adapter->recvpriv.signal_strength_dbg; ++ adapter->recvpriv.rssi=(s8)translate_percentage_to_dbm((u8)adapter->recvpriv.signal_strength_dbg); ++ } else { ++ ++ if(recvpriv->signal_strength_data.update_req == 0) {// update_req is clear, means we got rx ++ avg_signal_strength = recvpriv->signal_strength_data.avg_val; ++ avg_signal_qual = recvpriv->signal_qual_data.avg_val; ++ } ++ ++ if(recvpriv->signal_qual_data.update_req == 0) {// update_req is clear, means we got rx ++ num_signal_strength = recvpriv->signal_strength_data.total_num; ++ num_signal_qual = recvpriv->signal_qual_data.total_num; ++ } ++ ++ // after avg_vals are accquired, we can re-stat the signal values ++ recvpriv->signal_strength_data.update_req = 1; ++ recvpriv->signal_qual_data.update_req = 1; ++ ++ //update value of signal_strength, rssi, signal_qual ++ if(check_fwstate(&adapter->mlmepriv, _FW_UNDER_SURVEY) == _FALSE) { ++ tmp_s = (avg_signal_strength+(_alpha-1)*recvpriv->signal_strength); ++ if(tmp_s %_alpha) ++ tmp_s = tmp_s/_alpha + 1; ++ else ++ tmp_s = tmp_s/_alpha; ++ if(tmp_s>100) ++ tmp_s = 100; ++ ++ tmp_q = (avg_signal_qual+(_alpha-1)*recvpriv->signal_qual); ++ if(tmp_q %_alpha) ++ tmp_q = tmp_q/_alpha + 1; ++ else ++ tmp_q = tmp_q/_alpha; ++ if(tmp_q>100) ++ tmp_q = 100; ++ ++ recvpriv->signal_strength = tmp_s; ++ recvpriv->rssi = (s8)translate_percentage_to_dbm(tmp_s); ++ recvpriv->signal_qual = tmp_q; ++ ++ #if defined(DBG_RX_SIGNAL_DISPLAY_PROCESSING) && 1 ++ DBG_871X("%s signal_strength:%3u, rssi:%3d, signal_qual:%3u" ++ ", num_signal_strength:%u, num_signal_qual:%u" ++ "\n" ++ , __FUNCTION__ ++ , recvpriv->signal_strength ++ , recvpriv->rssi ++ , recvpriv->signal_qual ++ , num_signal_strength, num_signal_qual ++ ); ++ #endif ++ } ++ } ++ rtw_set_signal_stat_timer(recvpriv); ++ ++} ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_rf.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_rf.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,96 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_RF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++struct ch_freq { ++ u32 channel; ++ u32 frequency; ++}; ++ ++struct ch_freq ch_freq_map[] = { ++ {1, 2412},{2, 2417},{3, 2422},{4, 2427},{5, 2432}, ++ {6, 2437},{7, 2442},{8, 2447},{9, 2452},{10, 2457}, ++ {11, 2462},{12, 2467},{13, 2472},{14, 2484}, ++ /* UNII */ ++ {36, 5180},{40, 5200},{44, 5220},{48, 5240},{52, 5260}, ++ {56, 5280},{60, 5300},{64, 5320},{149, 5745},{153, 5765}, ++ {157, 5785},{161, 5805},{165, 5825},{167, 5835},{169, 5845}, ++ {171, 5855},{173, 5865}, ++ /* HiperLAN2 */ ++ {100, 5500},{104, 5520},{108, 5540},{112, 5560},{116, 5580}, ++ {120, 5600},{124, 5620},{128, 5640},{132, 5660},{136, 5680}, ++ {140, 5700}, ++ /* Japan MMAC */ ++ {34, 5170},{38, 5190},{42, 5210},{46, 5230}, ++ /* Japan */ ++ {184, 4920},{188, 4940},{192, 4960},{196, 4980}, ++ {208, 5040},/* Japan, means J08 */ ++ {212, 5060},/* Japan, means J12 */ ++ {216, 5080},/* Japan, means J16 */ ++}; ++ ++int ch_freq_map_num = (sizeof(ch_freq_map) / sizeof(struct ch_freq)); ++ ++u32 rtw_ch2freq(u32 channel) ++{ ++ u8 i; ++ u32 freq = 0; ++ ++ for (i = 0; i < ch_freq_map_num; i++) ++ { ++ if (channel == ch_freq_map[i].channel) ++ { ++ freq = ch_freq_map[i].frequency; ++ break; ++ } ++ } ++ if (i == ch_freq_map_num) ++ freq = 2412; ++ ++ return freq; ++} ++ ++u32 rtw_freq2ch(u32 freq) ++{ ++ u8 i; ++ u32 ch = 0; ++ ++ for (i = 0; i < ch_freq_map_num; i++) ++ { ++ if (freq == ch_freq_map[i].frequency) ++ { ++ ch = ch_freq_map[i].channel; ++ break; ++ } ++ } ++ if (i == ch_freq_map_num) ++ ch = 1; ++ ++ return ch; ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_security.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_security.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,2831 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_SECURITY_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++//=====WEP related===== ++ ++#define CRC32_POLY 0x04c11db7 ++ ++struct arc4context ++{ ++ u32 x; ++ u32 y; ++ u8 state[256]; ++}; ++ ++ ++static void arcfour_init(struct arc4context *parc4ctx, u8 * key,u32 key_len) ++{ ++ u32 t, u; ++ u32 keyindex; ++ u32 stateindex; ++ u8 * state; ++ u32 counter; ++_func_enter_; ++ state = parc4ctx->state; ++ parc4ctx->x = 0; ++ parc4ctx->y = 0; ++ for (counter = 0; counter < 256; counter++) ++ state[counter] = (u8)counter; ++ keyindex = 0; ++ stateindex = 0; ++ for (counter = 0; counter < 256; counter++) ++ { ++ t = state[counter]; ++ stateindex = (stateindex + key[keyindex] + t) & 0xff; ++ u = state[stateindex]; ++ state[stateindex] = (u8)t; ++ state[counter] = (u8)u; ++ if (++keyindex >= key_len) ++ keyindex = 0; ++ } ++_func_exit_; ++} ++static u32 arcfour_byte( struct arc4context *parc4ctx) ++{ ++ u32 x; ++ u32 y; ++ u32 sx, sy; ++ u8 * state; ++_func_enter_; ++ state = parc4ctx->state; ++ x = (parc4ctx->x + 1) & 0xff; ++ sx = state[x]; ++ y = (sx + parc4ctx->y) & 0xff; ++ sy = state[y]; ++ parc4ctx->x = x; ++ parc4ctx->y = y; ++ state[y] = (u8)sx; ++ state[x] = (u8)sy; ++_func_exit_; ++ return state[(sx + sy) & 0xff]; ++} ++ ++ ++static void arcfour_encrypt( struct arc4context *parc4ctx, ++ u8 * dest, ++ u8 * src, ++ u32 len) ++{ ++ u32 i; ++_func_enter_; ++ for (i = 0; i < len; i++) ++ dest[i] = src[i] ^ (unsigned char)arcfour_byte(parc4ctx); ++_func_exit_; ++} ++ ++static sint bcrc32initialized = 0; ++static u32 crc32_table[256]; ++ ++ ++static u8 crc32_reverseBit( u8 data) ++{ ++ return( (u8)((data<<7)&0x80) | ((data<<5)&0x40) | ((data<<3)&0x20) | ((data<<1)&0x10) | ((data>>1)&0x08) | ((data>>3)&0x04) | ((data>>5)&0x02) | ((data>>7)&0x01) ); ++} ++ ++static void crc32_init(void) ++{ ++_func_enter_; ++ if (bcrc32initialized == 1) ++ goto exit; ++ else{ ++ sint i, j; ++ u32 c; ++ u8 *p=(u8 *)&c, *p1; ++ u8 k; ++ ++ c = 0x12340000; ++ ++ for (i = 0; i < 256; ++i) ++ { ++ k = crc32_reverseBit((u8)i); ++ for (c = ((u32)k) << 24, j = 8; j > 0; --j){ ++ c = c & 0x80000000 ? (c << 1) ^ CRC32_POLY : (c << 1); ++ } ++ p1 = (u8 *)&crc32_table[i]; ++ ++ p1[0] = crc32_reverseBit(p[3]); ++ p1[1] = crc32_reverseBit(p[2]); ++ p1[2] = crc32_reverseBit(p[1]); ++ p1[3] = crc32_reverseBit(p[0]); ++ } ++ bcrc32initialized= 1; ++ } ++exit: ++_func_exit_; ++} ++ ++static u32 getcrc32(u8 *buf, sint len) ++{ ++ u8 *p; ++ u32 crc; ++_func_enter_; ++ if (bcrc32initialized == 0) crc32_init(); ++ ++ crc = 0xffffffff; /* preload shift register, per CRC-32 spec */ ++ ++ for (p = buf; len > 0; ++p, --len) ++ { ++ crc = crc32_table[ (crc ^ *p) & 0xff] ^ (crc >> 8); ++ } ++_func_exit_; ++ return ~crc; /* transmit complement, per CRC-32 spec */ ++} ++ ++ ++/* ++ Need to consider the fragment situation ++*/ ++void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ // exclude ICV ++ ++ unsigned char crc[4]; ++ struct arc4context mycontext; ++ ++ sint curfragnum,length; ++ u32 keylength; ++ ++ u8 *pframe, *payload,*iv; //,*wepkey ++ u8 wepkey[16]; ++ struct pkt_attrib *pattrib = &((struct xmit_frame*)pxmitframe)->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ ++_func_enter_; ++ ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //start to encrypt each fragment ++ if((pattrib->encrypt==_WEP40_)||(pattrib->encrypt==_WEP104_)) ++ { ++ keylength=psecuritypriv->dot11DefKeylen[psecuritypriv->dot11PrivacyKeyIndex]; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++) ++ { ++ iv=pframe+pattrib->hdrlen; ++ _rtw_memcpy(&wepkey[0], iv, 3); ++ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); ++ payload=pframe+pattrib->iv_len+pattrib->hdrlen; ++ ++ if((curfragnum+1)==pattrib->nr_frags) ++ { //the last fragment ++ ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ ++ *((unsigned long *)crc)=cpu_to_le32(getcrc32(payload,length)); ++ ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ } ++ else ++ { ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ *((unsigned long *)crc)=cpu_to_le32(getcrc32(payload,length)); ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8 *)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ ++ } ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe) ++{ ++ // exclude ICV ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint length; ++ u32 keylength; ++ u8 *pframe, *payload,*iv,wepkey[16]; ++ u8 keyindex; ++ struct rx_pkt_attrib *prxattrib = &(((union recv_frame*)precvframe)->u.hdr.attrib); ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ ++_func_enter_; ++ ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ //start to decrypt recvframe ++ if((prxattrib->encrypt==_WEP40_)||(prxattrib->encrypt==_WEP104_)) ++ { ++ iv=pframe+prxattrib->hdrlen; ++ //keyindex=(iv[3]&0x3); ++ keyindex = prxattrib->key_index; ++ keylength=psecuritypriv->dot11DefKeylen[keyindex]; ++ _rtw_memcpy(&wepkey[0], iv, 3); ++ //_rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[psecuritypriv->dot11PrivacyKeyIndex].skey[0],keylength); ++ _rtw_memcpy(&wepkey[3], &psecuritypriv->dot11DefKey[keyindex].skey[0],keylength); ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ ++ payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; ++ ++ //decrypt payload include icv ++ arcfour_init(&mycontext, wepkey,3+keylength); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ ++ //calculate icv and compare the icv ++ *((unsigned long *)crc)=le32_to_cpu(getcrc32(payload,length-4)); ++ ++ if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", ++ crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); ++ } ++ ++ } ++ ++_func_exit_; ++ ++ return; ++ ++} ++ ++//3 =====TKIP related===== ++ ++static u32 secmicgetuint32( u8 * p ) ++// Convert from Byte[] to Us4Byte32 in a portable way ++{ ++ s32 i; ++ u32 res = 0; ++_func_enter_; ++ for( i=0; i<4; i++ ) ++ { ++ res |= ((u32)(*p++)) << (8*i); ++ } ++_func_exit_; ++ return res; ++} ++ ++static void secmicputuint32( u8 * p, u32 val ) ++// Convert from Us4Byte32 to Byte[] in a portable way ++{ ++ long i; ++_func_enter_; ++ for( i=0; i<4; i++ ) ++ { ++ *p++ = (u8) (val & 0xff); ++ val >>= 8; ++ } ++_func_exit_; ++} ++ ++static void secmicclear(struct mic_data *pmicdata) ++{ ++// Reset the state to the empty message. ++_func_enter_; ++ pmicdata->L = pmicdata->K0; ++ pmicdata->R = pmicdata->K1; ++ pmicdata->nBytesInM = 0; ++ pmicdata->M = 0; ++_func_exit_; ++} ++ ++void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ) ++{ ++ // Set the key ++_func_enter_; ++ pmicdata->K0 = secmicgetuint32( key ); ++ pmicdata->K1 = secmicgetuint32( key + 4 ); ++ // and reset the message ++ secmicclear(pmicdata); ++_func_exit_; ++} ++ ++void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ) ++{ ++_func_enter_; ++ // Append the byte to our word-sized buffer ++ pmicdata->M |= ((unsigned long)b) << (8*pmicdata->nBytesInM); ++ pmicdata->nBytesInM++; ++ // Process the word if it is full. ++ if( pmicdata->nBytesInM >= 4 ) ++ { ++ pmicdata->L ^= pmicdata->M; ++ pmicdata->R ^= ROL32( pmicdata->L, 17 ); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ((pmicdata->L & 0xff00ff00) >> 8) | ((pmicdata->L & 0x00ff00ff) << 8); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ROL32( pmicdata->L, 3 ); ++ pmicdata->L += pmicdata->R; ++ pmicdata->R ^= ROR32( pmicdata->L, 2 ); ++ pmicdata->L += pmicdata->R; ++ // Clear the buffer ++ pmicdata->M = 0; ++ pmicdata->nBytesInM = 0; ++ } ++_func_exit_; ++} ++ ++void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nbytes ) ++{ ++_func_enter_; ++ // This is simple ++ while( nbytes > 0 ) ++ { ++ rtw_secmicappendbyte(pmicdata, *src++ ); ++ nbytes--; ++ } ++_func_exit_; ++} ++ ++void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ) ++{ ++_func_enter_; ++ // Append the minimum padding ++ rtw_secmicappendbyte(pmicdata, 0x5a ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ // and then zeroes until the length is a multiple of 4 ++ while( pmicdata->nBytesInM != 0 ) ++ { ++ rtw_secmicappendbyte(pmicdata, 0 ); ++ } ++ // The appendByte function has already computed the result. ++ secmicputuint32( dst, pmicdata->L ); ++ secmicputuint32( dst+4, pmicdata->R ); ++ // Reset to the empty message. ++ secmicclear(pmicdata); ++_func_exit_; ++} ++ ++ ++void rtw_seccalctkipmic(u8 * key,u8 *header,u8 *data,u32 data_len,u8 *mic_code, u8 pri) ++{ ++ ++ struct mic_data micdata; ++ u8 priority[4]={0x0,0x0,0x0,0x0}; ++_func_enter_; ++ rtw_secmicsetkey(&micdata, key); ++ priority[0]=pri; ++ ++ /* Michael MIC pseudo header: DA, SA, 3 x 0, Priority */ ++ if(header[1]&1){ //ToDS==1 ++ rtw_secmicappend(&micdata, &header[16], 6); //DA ++ if(header[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &header[24], 6); ++ else ++ rtw_secmicappend(&micdata, &header[10], 6); ++ } ++ else{ //ToDS==0 ++ rtw_secmicappend(&micdata, &header[4], 6); //DA ++ if(header[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &header[16], 6); ++ else ++ rtw_secmicappend(&micdata, &header[10], 6); ++ ++ } ++ rtw_secmicappend(&micdata, &priority[0], 4); ++ ++ ++ rtw_secmicappend(&micdata, data, data_len); ++ ++ rtw_secgetmic(&micdata,mic_code); ++_func_exit_; ++} ++ ++ ++ ++ ++/* macros for extraction/creation of unsigned char/unsigned short values */ ++#define RotR1(v16) ((((v16) >> 1) & 0x7FFF) ^ (((v16) & 1) << 15)) ++#define Lo8(v16) ((u8)( (v16) & 0x00FF)) ++#define Hi8(v16) ((u8)(((v16) >> 8) & 0x00FF)) ++#define Lo16(v32) ((u16)( (v32) & 0xFFFF)) ++#define Hi16(v32) ((u16)(((v32) >>16) & 0xFFFF)) ++#define Mk16(hi,lo) ((lo) ^ (((u16)(hi)) << 8)) ++ ++/* select the Nth 16-bit word of the temporal key unsigned char array TK[] */ ++#define TK16(N) Mk16(tk[2*(N)+1],tk[2*(N)]) ++ ++/* S-box lookup: 16 bits --> 16 bits */ ++#define _S_(v16) (Sbox1[0][Lo8(v16)] ^ Sbox1[1][Hi8(v16)]) ++ ++/* fixed algorithm "parameters" */ ++#define PHASE1_LOOP_CNT 8 /* this needs to be "big enough" */ ++#define TA_SIZE 6 /* 48-bit transmitter address */ ++#define TK_SIZE 16 /* 128-bit temporal key */ ++#define P1K_SIZE 10 /* 80-bit Phase1 key */ ++#define RC4_KEY_SIZE 16 /* 128-bit RC4KEY (104 bits unknown) */ ++ ++ ++/* 2-unsigned char by 2-unsigned char subset of the full AES S-box table */ ++static const unsigned short Sbox1[2][256]= /* Sbox for hash (can be in ROM) */ ++{ { ++ 0xC6A5,0xF884,0xEE99,0xF68D,0xFF0D,0xD6BD,0xDEB1,0x9154, ++ 0x6050,0x0203,0xCEA9,0x567D,0xE719,0xB562,0x4DE6,0xEC9A, ++ 0x8F45,0x1F9D,0x8940,0xFA87,0xEF15,0xB2EB,0x8EC9,0xFB0B, ++ 0x41EC,0xB367,0x5FFD,0x45EA,0x23BF,0x53F7,0xE496,0x9B5B, ++ 0x75C2,0xE11C,0x3DAE,0x4C6A,0x6C5A,0x7E41,0xF502,0x834F, ++ 0x685C,0x51F4,0xD134,0xF908,0xE293,0xAB73,0x6253,0x2A3F, ++ 0x080C,0x9552,0x4665,0x9D5E,0x3028,0x37A1,0x0A0F,0x2FB5, ++ 0x0E09,0x2436,0x1B9B,0xDF3D,0xCD26,0x4E69,0x7FCD,0xEA9F, ++ 0x121B,0x1D9E,0x5874,0x342E,0x362D,0xDCB2,0xB4EE,0x5BFB, ++ 0xA4F6,0x764D,0xB761,0x7DCE,0x527B,0xDD3E,0x5E71,0x1397, ++ 0xA6F5,0xB968,0x0000,0xC12C,0x4060,0xE31F,0x79C8,0xB6ED, ++ 0xD4BE,0x8D46,0x67D9,0x724B,0x94DE,0x98D4,0xB0E8,0x854A, ++ 0xBB6B,0xC52A,0x4FE5,0xED16,0x86C5,0x9AD7,0x6655,0x1194, ++ 0x8ACF,0xE910,0x0406,0xFE81,0xA0F0,0x7844,0x25BA,0x4BE3, ++ 0xA2F3,0x5DFE,0x80C0,0x058A,0x3FAD,0x21BC,0x7048,0xF104, ++ 0x63DF,0x77C1,0xAF75,0x4263,0x2030,0xE51A,0xFD0E,0xBF6D, ++ 0x814C,0x1814,0x2635,0xC32F,0xBEE1,0x35A2,0x88CC,0x2E39, ++ 0x9357,0x55F2,0xFC82,0x7A47,0xC8AC,0xBAE7,0x322B,0xE695, ++ 0xC0A0,0x1998,0x9ED1,0xA37F,0x4466,0x547E,0x3BAB,0x0B83, ++ 0x8CCA,0xC729,0x6BD3,0x283C,0xA779,0xBCE2,0x161D,0xAD76, ++ 0xDB3B,0x6456,0x744E,0x141E,0x92DB,0x0C0A,0x486C,0xB8E4, ++ 0x9F5D,0xBD6E,0x43EF,0xC4A6,0x39A8,0x31A4,0xD337,0xF28B, ++ 0xD532,0x8B43,0x6E59,0xDAB7,0x018C,0xB164,0x9CD2,0x49E0, ++ 0xD8B4,0xACFA,0xF307,0xCF25,0xCAAF,0xF48E,0x47E9,0x1018, ++ 0x6FD5,0xF088,0x4A6F,0x5C72,0x3824,0x57F1,0x73C7,0x9751, ++ 0xCB23,0xA17C,0xE89C,0x3E21,0x96DD,0x61DC,0x0D86,0x0F85, ++ 0xE090,0x7C42,0x71C4,0xCCAA,0x90D8,0x0605,0xF701,0x1C12, ++ 0xC2A3,0x6A5F,0xAEF9,0x69D0,0x1791,0x9958,0x3A27,0x27B9, ++ 0xD938,0xEB13,0x2BB3,0x2233,0xD2BB,0xA970,0x0789,0x33A7, ++ 0x2DB6,0x3C22,0x1592,0xC920,0x8749,0xAAFF,0x5078,0xA57A, ++ 0x038F,0x59F8,0x0980,0x1A17,0x65DA,0xD731,0x84C6,0xD0B8, ++ 0x82C3,0x29B0,0x5A77,0x1E11,0x7BCB,0xA8FC,0x6DD6,0x2C3A, ++ }, ++ ++ ++ { /* second half of table is unsigned char-reversed version of first! */ ++ 0xA5C6,0x84F8,0x99EE,0x8DF6,0x0DFF,0xBDD6,0xB1DE,0x5491, ++ 0x5060,0x0302,0xA9CE,0x7D56,0x19E7,0x62B5,0xE64D,0x9AEC, ++ 0x458F,0x9D1F,0x4089,0x87FA,0x15EF,0xEBB2,0xC98E,0x0BFB, ++ 0xEC41,0x67B3,0xFD5F,0xEA45,0xBF23,0xF753,0x96E4,0x5B9B, ++ 0xC275,0x1CE1,0xAE3D,0x6A4C,0x5A6C,0x417E,0x02F5,0x4F83, ++ 0x5C68,0xF451,0x34D1,0x08F9,0x93E2,0x73AB,0x5362,0x3F2A, ++ 0x0C08,0x5295,0x6546,0x5E9D,0x2830,0xA137,0x0F0A,0xB52F, ++ 0x090E,0x3624,0x9B1B,0x3DDF,0x26CD,0x694E,0xCD7F,0x9FEA, ++ 0x1B12,0x9E1D,0x7458,0x2E34,0x2D36,0xB2DC,0xEEB4,0xFB5B, ++ 0xF6A4,0x4D76,0x61B7,0xCE7D,0x7B52,0x3EDD,0x715E,0x9713, ++ 0xF5A6,0x68B9,0x0000,0x2CC1,0x6040,0x1FE3,0xC879,0xEDB6, ++ 0xBED4,0x468D,0xD967,0x4B72,0xDE94,0xD498,0xE8B0,0x4A85, ++ 0x6BBB,0x2AC5,0xE54F,0x16ED,0xC586,0xD79A,0x5566,0x9411, ++ 0xCF8A,0x10E9,0x0604,0x81FE,0xF0A0,0x4478,0xBA25,0xE34B, ++ 0xF3A2,0xFE5D,0xC080,0x8A05,0xAD3F,0xBC21,0x4870,0x04F1, ++ 0xDF63,0xC177,0x75AF,0x6342,0x3020,0x1AE5,0x0EFD,0x6DBF, ++ 0x4C81,0x1418,0x3526,0x2FC3,0xE1BE,0xA235,0xCC88,0x392E, ++ 0x5793,0xF255,0x82FC,0x477A,0xACC8,0xE7BA,0x2B32,0x95E6, ++ 0xA0C0,0x9819,0xD19E,0x7FA3,0x6644,0x7E54,0xAB3B,0x830B, ++ 0xCA8C,0x29C7,0xD36B,0x3C28,0x79A7,0xE2BC,0x1D16,0x76AD, ++ 0x3BDB,0x5664,0x4E74,0x1E14,0xDB92,0x0A0C,0x6C48,0xE4B8, ++ 0x5D9F,0x6EBD,0xEF43,0xA6C4,0xA839,0xA431,0x37D3,0x8BF2, ++ 0x32D5,0x438B,0x596E,0xB7DA,0x8C01,0x64B1,0xD29C,0xE049, ++ 0xB4D8,0xFAAC,0x07F3,0x25CF,0xAFCA,0x8EF4,0xE947,0x1810, ++ 0xD56F,0x88F0,0x6F4A,0x725C,0x2438,0xF157,0xC773,0x5197, ++ 0x23CB,0x7CA1,0x9CE8,0x213E,0xDD96,0xDC61,0x860D,0x850F, ++ 0x90E0,0x427C,0xC471,0xAACC,0xD890,0x0506,0x01F7,0x121C, ++ 0xA3C2,0x5F6A,0xF9AE,0xD069,0x9117,0x5899,0x273A,0xB927, ++ 0x38D9,0x13EB,0xB32B,0x3322,0xBBD2,0x70A9,0x8907,0xA733, ++ 0xB62D,0x223C,0x9215,0x20C9,0x4987,0xFFAA,0x7850,0x7AA5, ++ 0x8F03,0xF859,0x8009,0x171A,0xDA65,0x31D7,0xC684,0xB8D0, ++ 0xC382,0xB029,0x775A,0x111E,0xCB7B,0xFCA8,0xD66D,0x3A2C, ++ } ++}; ++ ++ /* ++********************************************************************** ++* Routine: Phase 1 -- generate P1K, given TA, TK, IV32 ++* ++* Inputs: ++* tk[] = temporal key [128 bits] ++* ta[] = transmitter's MAC address [ 48 bits] ++* iv32 = upper 32 bits of IV [ 32 bits] ++* Output: ++* p1k[] = Phase 1 key [ 80 bits] ++* ++* Note: ++* This function only needs to be called every 2**16 packets, ++* although in theory it could be called every packet. ++* ++********************************************************************** ++*/ ++static void phase1(u16 *p1k,const u8 *tk,const u8 *ta,u32 iv32) ++{ ++ sint i; ++_func_enter_; ++ /* Initialize the 80 bits of P1K[] from IV32 and TA[0..5] */ ++ p1k[0] = Lo16(iv32); ++ p1k[1] = Hi16(iv32); ++ p1k[2] = Mk16(ta[1],ta[0]); /* use TA[] as little-endian */ ++ p1k[3] = Mk16(ta[3],ta[2]); ++ p1k[4] = Mk16(ta[5],ta[4]); ++ ++ /* Now compute an unbalanced Feistel cipher with 80-bit block */ ++ /* size on the 80-bit block P1K[], using the 128-bit key TK[] */ ++ for (i=0; i < PHASE1_LOOP_CNT ;i++) ++ { /* Each add operation here is mod 2**16 */ ++ p1k[0] += _S_(p1k[4] ^ TK16((i&1)+0)); ++ p1k[1] += _S_(p1k[0] ^ TK16((i&1)+2)); ++ p1k[2] += _S_(p1k[1] ^ TK16((i&1)+4)); ++ p1k[3] += _S_(p1k[2] ^ TK16((i&1)+6)); ++ p1k[4] += _S_(p1k[3] ^ TK16((i&1)+0)); ++ p1k[4] += (unsigned short)i; /* avoid "slide attacks" */ ++ } ++_func_exit_; ++} ++ ++ ++/* ++********************************************************************** ++* Routine: Phase 2 -- generate RC4KEY, given TK, P1K, IV16 ++* ++* Inputs: ++* tk[] = Temporal key [128 bits] ++* p1k[] = Phase 1 output key [ 80 bits] ++* iv16 = low 16 bits of IV counter [ 16 bits] ++* Output: ++* rc4key[] = the key used to encrypt the packet [128 bits] ++* ++* Note: ++* The value {TA,IV32,IV16} for Phase1/Phase2 must be unique ++* across all packets using the same key TK value. Then, for a ++* given value of TK[], this TKIP48 construction guarantees that ++* the final RC4KEY value is unique across all packets. ++* ++* Suggested implementation optimization: if PPK[] is "overlaid" ++* appropriately on RC4KEY[], there is no need for the final ++* for loop below that copies the PPK[] result into RC4KEY[]. ++* ++********************************************************************** ++*/ ++static void phase2(u8 *rc4key,const u8 *tk,const u16 *p1k,u16 iv16) ++{ ++ sint i; ++ u16 PPK[6]; /* temporary key for mixing */ ++_func_enter_; ++ /* Note: all adds in the PPK[] equations below are mod 2**16 */ ++ for (i=0;i<5;i++) PPK[i]=p1k[i]; /* first, copy P1K to PPK */ ++ PPK[5] = p1k[4] +iv16; /* next, add in IV16 */ ++ ++ /* Bijective non-linear mixing of the 96 bits of PPK[0..5] */ ++ PPK[0] += _S_(PPK[5] ^ TK16(0)); /* Mix key in each "round" */ ++ PPK[1] += _S_(PPK[0] ^ TK16(1)); ++ PPK[2] += _S_(PPK[1] ^ TK16(2)); ++ PPK[3] += _S_(PPK[2] ^ TK16(3)); ++ PPK[4] += _S_(PPK[3] ^ TK16(4)); ++ PPK[5] += _S_(PPK[4] ^ TK16(5)); /* Total # S-box lookups == 6 */ ++ ++ /* Final sweep: bijective, "linear". Rotates kill LSB correlations */ ++ PPK[0] += RotR1(PPK[5] ^ TK16(6)); ++ PPK[1] += RotR1(PPK[0] ^ TK16(7)); /* Use all of TK[] in Phase2 */ ++ PPK[2] += RotR1(PPK[1]); ++ PPK[3] += RotR1(PPK[2]); ++ PPK[4] += RotR1(PPK[3]); ++ PPK[5] += RotR1(PPK[4]); ++ /* Note: At this point, for a given key TK[0..15], the 96-bit output */ ++ /* value PPK[0..5] is guaranteed to be unique, as a function */ ++ /* of the 96-bit "input" value {TA,IV32,IV16}. That is, P1K */ ++ /* is now a keyed permutation of {TA,IV32,IV16}. */ ++ ++ /* Set RC4KEY[0..3], which includes "cleartext" portion of RC4 key */ ++ rc4key[0] = Hi8(iv16); /* RC4KEY[0..2] is the WEP IV */ ++ rc4key[1] =(Hi8(iv16) | 0x20) & 0x7F; /* Help avoid weak (FMS) keys */ ++ rc4key[2] = Lo8(iv16); ++ rc4key[3] = Lo8((PPK[5] ^ TK16(0)) >> 1); ++ ++ ++ /* Copy 96 bits of PPK[0..5] to RC4KEY[4..15] (little-endian) */ ++ for (i=0;i<6;i++) ++ { ++ rc4key[4+2*i] = Lo8(PPK[i]); ++ rc4key[5+2*i] = Hi8(PPK[i]); ++ } ++_func_exit_; ++} ++ ++ ++//The hlen isn't include the IV ++u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe) ++{ // exclude ICV ++ u16 pnl; ++ u32 pnh; ++ u8 rc4key[16]; ++ u8 ttkey[16]; ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint curfragnum,length; ++ u32 prwskeylen; ++ ++ u8 *pframe, *payload,*iv,*prwskey; ++ union pn48 dot11txpn; ++ struct sta_info *stainfo; ++ struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ u32 res=_SUCCESS; ++_func_enter_; ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //4 start to encrypt each fragment ++ if(pattrib->encrypt==_TKIP_){ ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); ++ } ++ ++ if (stainfo!=NULL){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(pattrib->ra)) ++ { ++ prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ } ++ ++ prwskeylen=16; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ iv=pframe+pattrib->hdrlen; ++ payload=pframe+pattrib->iv_len+pattrib->hdrlen; ++ ++ GET_TKIP_PN(iv, dot11txpn); ++ ++ pnl=(u16)(dot11txpn.val); ++ pnh=(u32)(dot11txpn.val>>16); ++ ++ phase1((u16 *)&ttkey[0],prwskey,&pattrib->ta[0],pnh); ++ ++ phase2(&rc4key[0],prwskey,(u16 *)&ttkey[0],pnl); ++ ++ if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ RT_TRACE(_module_rtl871x_security_c_,_drv_info_,("pattrib->iv_len =%x, pattrib->icv_len =%x\n", pattrib->iv_len,pattrib->icv_len)); ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ ++ ++ arcfour_init(&mycontext, rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ *((u32 *)crc)=cpu_to_le32(getcrc32(payload,length));/* modified by Amy*/ ++ arcfour_init(&mycontext,rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ arcfour_encrypt(&mycontext, payload+length, crc, 4); ++ ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8 *)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_encrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++ return res; ++ ++} ++ ++ ++//The hlen isn't include the IV ++u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe) ++{ // exclude ICV ++ u16 pnl; ++ u32 pnh; ++ u8 rc4key[16]; ++ u8 ttkey[16]; ++ u8 crc[4]; ++ struct arc4context mycontext; ++ sint length; ++ u32 prwskeylen; ++ ++ u8 *pframe, *payload,*iv,*prwskey; ++ union pn48 dot11txpn; ++ struct sta_info *stainfo; ++ struct rx_pkt_attrib *prxattrib = &((union recv_frame *)precvframe)->u.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++// struct recv_priv *precvpriv=&padapter->recvpriv; ++ u32 res=_SUCCESS; ++ ++_func_enter_; ++ ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ ++ //4 start to decrypt recvframe ++ if(prxattrib->encrypt==_TKIP_){ ++ ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); ++ ++ ++ if (stainfo!=NULL){ ++ ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ DBG_8192C("%s:rx bc/mc packets,but didn't install group key!!!!!!!!!!\n",__FUNCTION__); ++ goto exit; ++ } ++ ++ DBG_871X("rx bc/mc packets, to perform sw rtw_tkip_decrypt\n"); ++ //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; ++ prwskeylen=16; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo!=NULL!!!\n")); ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ prwskeylen=16; ++ } ++ ++ iv=pframe+prxattrib->hdrlen; ++ payload=pframe+prxattrib->iv_len+prxattrib->hdrlen; ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ ++ GET_TKIP_PN(iv, dot11txpn); ++ ++ pnl=(u16)(dot11txpn.val); ++ pnh=(u32)(dot11txpn.val>>16); ++ ++ phase1((u16 *)&ttkey[0],prwskey,&prxattrib->ta[0],pnh); ++ phase2(&rc4key[0],prwskey,(unsigned short *)&ttkey[0],pnl); ++ ++ //4 decrypt payload include icv ++ ++ arcfour_init(&mycontext, rc4key,16); ++ arcfour_encrypt(&mycontext, payload, payload, length); ++ ++ *((u32 *)crc)=le32_to_cpu(getcrc32(payload,length-4)); ++ ++ if(crc[3]!=payload[length-1] || crc[2]!=payload[length-2] || crc[1]!=payload[length-3] || crc[0]!=payload[length-4]) ++ { ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_wep_decrypt:icv error crc[3](%x)!=payload[length-1](%x) || crc[2](%x)!=payload[length-2](%x) || crc[1](%x)!=payload[length-3](%x) || crc[0](%x)!=payload[length-4](%x)\n", ++ crc[3],payload[length-1],crc[2],payload[length-2],crc[1],payload[length-3],crc[0],payload[length-4])); ++ res=_FAIL; ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_tkip_decrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++exit: ++ return res; ++ ++} ++ ++ ++//3 =====AES related===== ++ ++ ++ ++#define MAX_MSG_SIZE 2048 ++/*****************************/ ++/******** SBOX Table *********/ ++/*****************************/ ++ ++ static u8 sbox_table[256] = ++ { ++ 0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, ++ 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76, ++ 0xca, 0x82, 0xc9, 0x7d, 0xfa, 0x59, 0x47, 0xf0, ++ 0xad, 0xd4, 0xa2, 0xaf, 0x9c, 0xa4, 0x72, 0xc0, ++ 0xb7, 0xfd, 0x93, 0x26, 0x36, 0x3f, 0xf7, 0xcc, ++ 0x34, 0xa5, 0xe5, 0xf1, 0x71, 0xd8, 0x31, 0x15, ++ 0x04, 0xc7, 0x23, 0xc3, 0x18, 0x96, 0x05, 0x9a, ++ 0x07, 0x12, 0x80, 0xe2, 0xeb, 0x27, 0xb2, 0x75, ++ 0x09, 0x83, 0x2c, 0x1a, 0x1b, 0x6e, 0x5a, 0xa0, ++ 0x52, 0x3b, 0xd6, 0xb3, 0x29, 0xe3, 0x2f, 0x84, ++ 0x53, 0xd1, 0x00, 0xed, 0x20, 0xfc, 0xb1, 0x5b, ++ 0x6a, 0xcb, 0xbe, 0x39, 0x4a, 0x4c, 0x58, 0xcf, ++ 0xd0, 0xef, 0xaa, 0xfb, 0x43, 0x4d, 0x33, 0x85, ++ 0x45, 0xf9, 0x02, 0x7f, 0x50, 0x3c, 0x9f, 0xa8, ++ 0x51, 0xa3, 0x40, 0x8f, 0x92, 0x9d, 0x38, 0xf5, ++ 0xbc, 0xb6, 0xda, 0x21, 0x10, 0xff, 0xf3, 0xd2, ++ 0xcd, 0x0c, 0x13, 0xec, 0x5f, 0x97, 0x44, 0x17, ++ 0xc4, 0xa7, 0x7e, 0x3d, 0x64, 0x5d, 0x19, 0x73, ++ 0x60, 0x81, 0x4f, 0xdc, 0x22, 0x2a, 0x90, 0x88, ++ 0x46, 0xee, 0xb8, 0x14, 0xde, 0x5e, 0x0b, 0xdb, ++ 0xe0, 0x32, 0x3a, 0x0a, 0x49, 0x06, 0x24, 0x5c, ++ 0xc2, 0xd3, 0xac, 0x62, 0x91, 0x95, 0xe4, 0x79, ++ 0xe7, 0xc8, 0x37, 0x6d, 0x8d, 0xd5, 0x4e, 0xa9, ++ 0x6c, 0x56, 0xf4, 0xea, 0x65, 0x7a, 0xae, 0x08, ++ 0xba, 0x78, 0x25, 0x2e, 0x1c, 0xa6, 0xb4, 0xc6, ++ 0xe8, 0xdd, 0x74, 0x1f, 0x4b, 0xbd, 0x8b, 0x8a, ++ 0x70, 0x3e, 0xb5, 0x66, 0x48, 0x03, 0xf6, 0x0e, ++ 0x61, 0x35, 0x57, 0xb9, 0x86, 0xc1, 0x1d, 0x9e, ++ 0xe1, 0xf8, 0x98, 0x11, 0x69, 0xd9, 0x8e, 0x94, ++ 0x9b, 0x1e, 0x87, 0xe9, 0xce, 0x55, 0x28, 0xdf, ++ 0x8c, 0xa1, 0x89, 0x0d, 0xbf, 0xe6, 0x42, 0x68, ++ 0x41, 0x99, 0x2d, 0x0f, 0xb0, 0x54, 0xbb, 0x16 ++ }; ++ ++/*****************************/ ++/**** Function Prototypes ****/ ++/*****************************/ ++ ++static void bitwise_xor(u8 *ina, u8 *inb, u8 *out); ++static void construct_mic_iv( ++ u8 *mic_header1, ++ sint qc_exists, ++ sint a4_exists, ++ u8 *mpdu, ++ uint payload_length, ++ u8 * pn_vector); ++static void construct_mic_header1( ++ u8 *mic_header1, ++ sint header_length, ++ u8 *mpdu); ++static void construct_mic_header2( ++ u8 *mic_header2, ++ u8 *mpdu, ++ sint a4_exists, ++ sint qc_exists); ++static void construct_ctr_preload( ++ u8 *ctr_preload, ++ sint a4_exists, ++ sint qc_exists, ++ u8 *mpdu, ++ u8 *pn_vector, ++ sint c); ++static void xor_128(u8 *a, u8 *b, u8 *out); ++static void xor_32(u8 *a, u8 *b, u8 *out); ++static u8 sbox(u8 a); ++static void next_key(u8 *key, sint round); ++static void byte_sub(u8 *in, u8 *out); ++static void shift_row(u8 *in, u8 *out); ++static void mix_column(u8 *in, u8 *out); ++static void add_round_key( u8 *shiftrow_in, ++ u8 *mcol_in, ++ u8 *block_in, ++ sint round, ++ u8 *out); ++static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext); ++ ++ ++/****************************************/ ++/* aes128k128d() */ ++/* Performs a 128 bit AES encrypt with */ ++/* 128 bit data. */ ++/****************************************/ ++static void xor_128(u8 *a, u8 *b, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0;i<16; i++) ++ { ++ out[i] = a[i] ^ b[i]; ++ } ++_func_exit_; ++} ++ ++ ++static void xor_32(u8 *a, u8 *b, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0;i<4; i++) ++ { ++ out[i] = a[i] ^ b[i]; ++ } ++_func_exit_; ++} ++ ++ ++static u8 sbox(u8 a) ++{ ++ return sbox_table[(sint)a]; ++} ++ ++ ++static void next_key(u8 *key, sint round) ++{ ++ u8 rcon; ++ u8 sbox_key[4]; ++ u8 rcon_table[12] = ++ { ++ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, ++ 0x1b, 0x36, 0x36, 0x36 ++ }; ++_func_enter_; ++ sbox_key[0] = sbox(key[13]); ++ sbox_key[1] = sbox(key[14]); ++ sbox_key[2] = sbox(key[15]); ++ sbox_key[3] = sbox(key[12]); ++ ++ rcon = rcon_table[round]; ++ ++ xor_32(&key[0], sbox_key, &key[0]); ++ key[0] = key[0] ^ rcon; ++ ++ xor_32(&key[4], &key[0], &key[4]); ++ xor_32(&key[8], &key[4], &key[8]); ++ xor_32(&key[12], &key[8], &key[12]); ++_func_exit_; ++} ++ ++ ++static void byte_sub(u8 *in, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0; i< 16; i++) ++ { ++ out[i] = sbox(in[i]); ++ } ++_func_exit_; ++} ++ ++ ++static void shift_row(u8 *in, u8 *out) ++{ ++_func_enter_; ++ out[0] = in[0]; ++ out[1] = in[5]; ++ out[2] = in[10]; ++ out[3] = in[15]; ++ out[4] = in[4]; ++ out[5] = in[9]; ++ out[6] = in[14]; ++ out[7] = in[3]; ++ out[8] = in[8]; ++ out[9] = in[13]; ++ out[10] = in[2]; ++ out[11] = in[7]; ++ out[12] = in[12]; ++ out[13] = in[1]; ++ out[14] = in[6]; ++ out[15] = in[11]; ++_func_exit_; ++} ++ ++ ++static void mix_column(u8 *in, u8 *out) ++{ ++ sint i; ++ u8 add1b[4]; ++ u8 add1bf7[4]; ++ u8 rotl[4]; ++ u8 swap_halfs[4]; ++ u8 andf7[4]; ++ u8 rotr[4]; ++ u8 temp[4]; ++ u8 tempb[4]; ++_func_enter_; ++ for (i=0 ; i<4; i++) ++ { ++ if ((in[i] & 0x80)== 0x80) ++ add1b[i] = 0x1b; ++ else ++ add1b[i] = 0x00; ++ } ++ ++ swap_halfs[0] = in[2]; /* Swap halfs */ ++ swap_halfs[1] = in[3]; ++ swap_halfs[2] = in[0]; ++ swap_halfs[3] = in[1]; ++ ++ rotl[0] = in[3]; /* Rotate left 8 bits */ ++ rotl[1] = in[0]; ++ rotl[2] = in[1]; ++ rotl[3] = in[2]; ++ ++ andf7[0] = in[0] & 0x7f; ++ andf7[1] = in[1] & 0x7f; ++ andf7[2] = in[2] & 0x7f; ++ andf7[3] = in[3] & 0x7f; ++ ++ for (i = 3; i>0; i--) /* logical shift left 1 bit */ ++ { ++ andf7[i] = andf7[i] << 1; ++ if ((andf7[i-1] & 0x80) == 0x80) ++ { ++ andf7[i] = (andf7[i] | 0x01); ++ } ++ } ++ andf7[0] = andf7[0] << 1; ++ andf7[0] = andf7[0] & 0xfe; ++ ++ xor_32(add1b, andf7, add1bf7); ++ ++ xor_32(in, add1bf7, rotr); ++ ++ temp[0] = rotr[0]; /* Rotate right 8 bits */ ++ rotr[0] = rotr[1]; ++ rotr[1] = rotr[2]; ++ rotr[2] = rotr[3]; ++ rotr[3] = temp[0]; ++ ++ xor_32(add1bf7, rotr, temp); ++ xor_32(swap_halfs, rotl,tempb); ++ xor_32(temp, tempb, out); ++_func_exit_; ++} ++ ++ ++static void aes128k128d(u8 *key, u8 *data, u8 *ciphertext) ++{ ++ sint round; ++ sint i; ++ u8 intermediatea[16]; ++ u8 intermediateb[16]; ++ u8 round_key[16]; ++_func_enter_; ++ for(i=0; i<16; i++) round_key[i] = key[i]; ++ ++ for (round = 0; round < 11; round++) ++ { ++ if (round == 0) ++ { ++ xor_128(round_key, data, ciphertext); ++ next_key(round_key, round); ++ } ++ else if (round == 10) ++ { ++ byte_sub(ciphertext, intermediatea); ++ shift_row(intermediatea, intermediateb); ++ xor_128(intermediateb, round_key, ciphertext); ++ } ++ else /* 1 - 9 */ ++ { ++ byte_sub(ciphertext, intermediatea); ++ shift_row(intermediatea, intermediateb); ++ mix_column(&intermediateb[0], &intermediatea[0]); ++ mix_column(&intermediateb[4], &intermediatea[4]); ++ mix_column(&intermediateb[8], &intermediatea[8]); ++ mix_column(&intermediateb[12], &intermediatea[12]); ++ xor_128(intermediatea, round_key, ciphertext); ++ next_key(round_key, round); ++ } ++ } ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_iv() */ ++/* Builds the MIC IV from header fields and PN */ ++/************************************************/ ++static void construct_mic_iv( ++ u8 *mic_iv, ++ sint qc_exists, ++ sint a4_exists, ++ u8 *mpdu, ++ uint payload_length, ++ u8 *pn_vector ++ ) ++{ ++ sint i; ++_func_enter_; ++ mic_iv[0] = 0x59; ++ if (qc_exists && a4_exists) mic_iv[1] = mpdu[30] & 0x0f; /* QoS_TC */ ++ if (qc_exists && !a4_exists) mic_iv[1] = mpdu[24] & 0x0f; /* mute bits 7-4 */ ++ if (!qc_exists) mic_iv[1] = 0x00; ++ for (i = 2; i < 8; i++) ++ mic_iv[i] = mpdu[i + 8]; /* mic_iv[2:7] = A2[0:5] = mpdu[10:15] */ ++ #ifdef CONSISTENT_PN_ORDER ++ for (i = 8; i < 14; i++) ++ mic_iv[i] = pn_vector[i - 8]; /* mic_iv[8:13] = PN[0:5] */ ++ #else ++ for (i = 8; i < 14; i++) ++ mic_iv[i] = pn_vector[13 - i]; /* mic_iv[8:13] = PN[5:0] */ ++ #endif ++ mic_iv[14] = (unsigned char) (payload_length / 256); ++ mic_iv[15] = (unsigned char) (payload_length % 256); ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header1() */ ++/* Builds the first MIC header block from */ ++/* header fields. */ ++/************************************************/ ++static void construct_mic_header1( ++ u8 *mic_header1, ++ sint header_length, ++ u8 *mpdu ++ ) ++{ ++_func_enter_; ++ mic_header1[0] = (u8)((header_length - 2) / 256); ++ mic_header1[1] = (u8)((header_length - 2) % 256); ++ mic_header1[2] = mpdu[0] & 0xcf; /* Mute CF poll & CF ack bits */ ++ mic_header1[3] = mpdu[1] & 0xc7; /* Mute retry, more data and pwr mgt bits */ ++ mic_header1[4] = mpdu[4]; /* A1 */ ++ mic_header1[5] = mpdu[5]; ++ mic_header1[6] = mpdu[6]; ++ mic_header1[7] = mpdu[7]; ++ mic_header1[8] = mpdu[8]; ++ mic_header1[9] = mpdu[9]; ++ mic_header1[10] = mpdu[10]; /* A2 */ ++ mic_header1[11] = mpdu[11]; ++ mic_header1[12] = mpdu[12]; ++ mic_header1[13] = mpdu[13]; ++ mic_header1[14] = mpdu[14]; ++ mic_header1[15] = mpdu[15]; ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header2() */ ++/* Builds the last MIC header block from */ ++/* header fields. */ ++/************************************************/ ++static void construct_mic_header2( ++ u8 *mic_header2, ++ u8 *mpdu, ++ sint a4_exists, ++ sint qc_exists ++ ) ++{ ++ sint i; ++_func_enter_; ++ for (i = 0; i<16; i++) mic_header2[i]=0x00; ++ ++ mic_header2[0] = mpdu[16]; /* A3 */ ++ mic_header2[1] = mpdu[17]; ++ mic_header2[2] = mpdu[18]; ++ mic_header2[3] = mpdu[19]; ++ mic_header2[4] = mpdu[20]; ++ mic_header2[5] = mpdu[21]; ++ ++ //mic_header2[6] = mpdu[22] & 0xf0; /* SC */ ++ mic_header2[6] = 0x00; ++ mic_header2[7] = 0x00; /* mpdu[23]; */ ++ ++ ++ if (!qc_exists && a4_exists) ++ { ++ for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ ++ ++ } ++ ++ if (qc_exists && !a4_exists) ++ { ++ mic_header2[8] = mpdu[24] & 0x0f; /* mute bits 15 - 4 */ ++ mic_header2[9] = mpdu[25] & 0x00; ++ } ++ ++ if (qc_exists && a4_exists) ++ { ++ for (i=0;i<6;i++) mic_header2[8+i] = mpdu[24+i]; /* A4 */ ++ ++ mic_header2[14] = mpdu[30] & 0x0f; ++ mic_header2[15] = mpdu[31] & 0x00; ++ } ++ ++_func_exit_; ++} ++ ++ ++/************************************************/ ++/* construct_mic_header2() */ ++/* Builds the last MIC header block from */ ++/* header fields. */ ++/************************************************/ ++static void construct_ctr_preload( ++ u8 *ctr_preload, ++ sint a4_exists, ++ sint qc_exists, ++ u8 *mpdu, ++ u8 *pn_vector, ++ sint c ++ ) ++{ ++ sint i = 0; ++_func_enter_; ++ for (i=0; i<16; i++) ctr_preload[i] = 0x00; ++ i = 0; ++ ++ ctr_preload[0] = 0x01; /* flag */ ++ if (qc_exists && a4_exists) ++ ctr_preload[1] = mpdu[30] & 0x0f; /* QoC_Control */ ++ if (qc_exists && !a4_exists) ++ ctr_preload[1] = mpdu[24] & 0x0f; ++ ++ for (i = 2; i < 8; i++) ++ ctr_preload[i] = mpdu[i + 8]; /* ctr_preload[2:7] = A2[0:5] = mpdu[10:15] */ ++ #ifdef CONSISTENT_PN_ORDER ++ for (i = 8; i < 14; i++) ++ ctr_preload[i] = pn_vector[i - 8]; /* ctr_preload[8:13] = PN[0:5] */ ++ #else ++ for (i = 8; i < 14; i++) ++ ctr_preload[i] = pn_vector[13 - i]; /* ctr_preload[8:13] = PN[5:0] */ ++ #endif ++ ctr_preload[14] = (unsigned char) (c / 256); /* Ctr */ ++ ctr_preload[15] = (unsigned char) (c % 256); ++_func_exit_; ++} ++ ++ ++/************************************/ ++/* bitwise_xor() */ ++/* A 128 bit, bitwise exclusive or */ ++/************************************/ ++static void bitwise_xor(u8 *ina, u8 *inb, u8 *out) ++{ ++ sint i; ++_func_enter_; ++ for (i=0; i<16; i++) ++ { ++ out[i] = ina[i] ^ inb[i]; ++ } ++_func_exit_; ++} ++ ++ ++static sint aes_cipher(u8 *key, uint hdrlen, ++ u8 *pframe, uint plen) ++{ ++// /*static*/ unsigned char message[MAX_MSG_SIZE]; ++ uint qc_exists, a4_exists, i, j, payload_remainder, ++ num_blocks, payload_index; ++ ++ u8 pn_vector[6]; ++ u8 mic_iv[16]; ++ u8 mic_header1[16]; ++ u8 mic_header2[16]; ++ u8 ctr_preload[16]; ++ ++ /* Intermediate Buffers */ ++ u8 chain_buffer[16]; ++ u8 aes_out[16]; ++ u8 padded_buffer[16]; ++ u8 mic[8]; ++// uint offset = 0; ++ uint frtype = GetFrameType(pframe); ++ uint frsubtype = GetFrameSubType(pframe); ++ ++_func_enter_; ++ frsubtype=frsubtype>>4; ++ ++ ++ _rtw_memset((void *)mic_iv, 0, 16); ++ _rtw_memset((void *)mic_header1, 0, 16); ++ _rtw_memset((void *)mic_header2, 0, 16); ++ _rtw_memset((void *)ctr_preload, 0, 16); ++ _rtw_memset((void *)chain_buffer, 0, 16); ++ _rtw_memset((void *)aes_out, 0, 16); ++ _rtw_memset((void *)padded_buffer, 0, 16); ++ ++ if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) ++ a4_exists = 0; ++ else ++ a4_exists = 1; ++ ++ if ( ++ (frtype == WIFI_DATA_CFACK) || ++ (frtype == WIFI_DATA_CFPOLL)|| ++ (frtype == WIFI_DATA_CFACKPOLL)) ++ { ++ qc_exists = 1; ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ } ++ else if ( ++ (frsubtype == 0x08) || ++ (frsubtype == 0x09)|| ++ (frsubtype == 0x0a)|| ++ (frsubtype == 0x0b)) ++ { ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ qc_exists = 1; ++ } ++ else ++ qc_exists = 0; ++ ++ pn_vector[0]=pframe[hdrlen]; ++ pn_vector[1]=pframe[hdrlen+1]; ++ pn_vector[2]=pframe[hdrlen+4]; ++ pn_vector[3]=pframe[hdrlen+5]; ++ pn_vector[4]=pframe[hdrlen+6]; ++ pn_vector[5]=pframe[hdrlen+7]; ++ ++ construct_mic_iv( ++ mic_iv, ++ qc_exists, ++ a4_exists, ++ pframe, //message, ++ plen, ++ pn_vector ++ ); ++ ++ construct_mic_header1( ++ mic_header1, ++ hdrlen, ++ pframe //message ++ ); ++ construct_mic_header2( ++ mic_header2, ++ pframe, //message, ++ a4_exists, ++ qc_exists ++ ); ++ ++ ++ payload_remainder = plen % 16; ++ num_blocks = plen / 16; ++ ++ /* Find start of payload */ ++ payload_index = (hdrlen + 8); ++ ++ /* Calculate MIC */ ++ aes128k128d(key, mic_iv, aes_out); ++ bitwise_xor(aes_out, mic_header1, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ bitwise_xor(aes_out, mic_header2, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ for (i = 0; i < num_blocks; i++) ++ { ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ ++ payload_index += 16; ++ aes128k128d(key, chain_buffer, aes_out); ++ } ++ ++ /* Add on the final payload block if it needs padding */ ++ if (payload_remainder > 0) ++ { ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index++];//padded_buffer[j] = message[payload_index++]; ++ } ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ } ++ ++ for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; ++ ++ /* Insert MIC into payload */ ++ for (j = 0; j < 8; j++) ++ pframe[payload_index+j] = mic[j]; //message[payload_index+j] = mic[j]; ++ ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, //message, ++ pn_vector, ++ i+1); ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer);//bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j];//for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, //message, ++ pn_vector, ++ num_blocks+1); ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index+j];//padded_buffer[j] = message[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; jattrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ ++// uint offset = 0; ++ u32 res=_SUCCESS; ++_func_enter_; ++ ++ if(((struct xmit_frame*)pxmitframe)->buf_addr==NULL) ++ return _FAIL; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_SIZE + ++ (((struct xmit_frame*)pxmitframe)->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = ((struct xmit_frame*)pxmitframe)->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ //4 start to encrypt each fragment ++ if((pattrib->encrypt==_AES_)){ ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0] ); ++ } ++ ++ if (stainfo!=NULL){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(pattrib->ra)) ++ { ++ prwskey=psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ } ++ ++ prwskeylen=16; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ ++ if((curfragnum+1)==pattrib->nr_frags){ //4 the last fragment ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len- pattrib->icv_len; ++ ++ aes_cipher(prwskey,pattrib->hdrlen,pframe, length); ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-pattrib->icv_len ; ++ ++ aes_cipher(prwskey,pattrib->hdrlen,pframe, length); ++ pframe+=pxmitpriv->frag_len; ++ pframe=(u8*)RND4((SIZE_PTR)(pframe)); ++ ++ } ++ } ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++ ++ ++ ++_func_exit_; ++ return res; ++} ++ ++static sint aes_decipher(u8 *key, uint hdrlen, ++ u8 *pframe, uint plen) ++{ ++ static u8 message[MAX_MSG_SIZE]; ++ uint qc_exists, a4_exists, i, j, payload_remainder, ++ num_blocks, payload_index; ++ ++ sint res = _SUCCESS; ++ u8 pn_vector[6]; ++ u8 mic_iv[16]; ++ u8 mic_header1[16]; ++ u8 mic_header2[16]; ++ u8 ctr_preload[16]; ++ ++ /* Intermediate Buffers */ ++ u8 chain_buffer[16]; ++ u8 aes_out[16]; ++ u8 padded_buffer[16]; ++ u8 mic[8]; ++ ++ ++// uint offset = 0; ++ uint frtype = GetFrameType(pframe); ++ uint frsubtype = GetFrameSubType(pframe); ++_func_enter_; ++ frsubtype=frsubtype>>4; ++ ++ ++ _rtw_memset((void *)mic_iv, 0, 16); ++ _rtw_memset((void *)mic_header1, 0, 16); ++ _rtw_memset((void *)mic_header2, 0, 16); ++ _rtw_memset((void *)ctr_preload, 0, 16); ++ _rtw_memset((void *)chain_buffer, 0, 16); ++ _rtw_memset((void *)aes_out, 0, 16); ++ _rtw_memset((void *)padded_buffer, 0, 16); ++ ++ //start to decrypt the payload ++ ++ num_blocks = (plen-8) / 16; //(plen including llc, payload_length and mic ) ++ ++ payload_remainder = (plen-8) % 16; ++ ++ pn_vector[0] = pframe[hdrlen]; ++ pn_vector[1] = pframe[hdrlen+1]; ++ pn_vector[2] = pframe[hdrlen+4]; ++ pn_vector[3] = pframe[hdrlen+5]; ++ pn_vector[4] = pframe[hdrlen+6]; ++ pn_vector[5] = pframe[hdrlen+7]; ++ ++ if ((hdrlen == WLAN_HDR_A3_LEN )||(hdrlen == WLAN_HDR_A3_QOS_LEN)) ++ a4_exists = 0; ++ else ++ a4_exists = 1; ++ ++ if ( ++ (frtype == WIFI_DATA_CFACK) || ++ (frtype == WIFI_DATA_CFPOLL)|| ++ (frtype == WIFI_DATA_CFACKPOLL)) ++ { ++ qc_exists = 1; ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ } ++ else if ( ++ (frsubtype == 0x08) || ++ (frsubtype == 0x09)|| ++ (frsubtype == 0x0a)|| ++ (frsubtype == 0x0b)) ++ { ++ if(hdrlen != WLAN_HDR_A3_QOS_LEN){ ++ ++ hdrlen += 2; ++ } ++ qc_exists = 1; ++ } ++ else ++ qc_exists = 0; ++ ++ ++ // now, decrypt pframe with hdrlen offset and plen long ++ ++ payload_index = hdrlen + 8; // 8 is for extiv ++ ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, ++ pn_vector, ++ i+1 ++ ); ++ ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &pframe[payload_index], chain_buffer); ++ ++ for (j=0; j<16;j++) pframe[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ pframe, ++ pn_vector, ++ num_blocks+1 ++ ); ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = pframe[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; j 0) ++ { ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = message[payload_index++]; ++ } ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ aes128k128d(key, chain_buffer, aes_out); ++ ++ } ++ ++ for (j = 0 ; j < 8; j++) mic[j] = aes_out[j]; ++ ++ /* Insert MIC into payload */ ++ for (j = 0; j < 8; j++) ++ message[payload_index+j] = mic[j]; ++ ++ payload_index = hdrlen + 8; ++ for (i=0; i< num_blocks; i++) ++ { ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ message, ++ pn_vector, ++ i+1); ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, &message[payload_index], chain_buffer); ++ for (j=0; j<16;j++) message[payload_index++] = chain_buffer[j]; ++ } ++ ++ if (payload_remainder > 0) /* If there is a short final block, then pad it,*/ ++ { /* encrypt it and copy the unpadded part back */ ++ construct_ctr_preload( ++ ctr_preload, ++ a4_exists, ++ qc_exists, ++ message, ++ pn_vector, ++ num_blocks+1); ++ ++ for (j = 0; j < 16; j++) padded_buffer[j] = 0x00; ++ for (j = 0; j < payload_remainder; j++) ++ { ++ padded_buffer[j] = message[payload_index+j]; ++ } ++ aes128k128d(key, ctr_preload, aes_out); ++ bitwise_xor(aes_out, padded_buffer, chain_buffer); ++ for (j=0; ju.hdr.attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++// struct recv_priv *precvpriv=&padapter->recvpriv; ++ u32 res=_SUCCESS; ++_func_enter_; ++ pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; ++ //4 start to encrypt each fragment ++ if((prxattrib->encrypt==_AES_)){ ++ ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&prxattrib->ta[0] ); ++ if (stainfo!=NULL){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_decrypt: stainfo!=NULL!!!\n")); ++ ++ if(IS_MCAST(prxattrib->ra)) ++ { ++ if(psecuritypriv->binstallGrpkey==_FALSE) ++ { ++ res=_FAIL; ++ DBG_8192C("%s:rx bc/mc packets,but didn't install group key!!!!!!!!!!\n",__FUNCTION__); ++ goto exit; ++ } ++ ++ DBG_871X("rx bc/mc packets, to perform sw rtw_aes_decrypt\n"); ++ //prwskey = psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey; ++ prwskey = psecuritypriv->dot118021XGrpKey[prxattrib->key_index].skey; ++ prwskeylen=16; ++ } ++ else ++ { ++ prwskey=&stainfo->dot118021x_UncstKey.skey[0]; ++ prwskeylen=16; ++ } ++ ++ length= ((union recv_frame *)precvframe)->u.hdr.len-prxattrib->hdrlen-prxattrib->iv_len; ++ ++ res= aes_decipher(prwskey,prxattrib->hdrlen,pframe, length); ++ ++ ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("rtw_aes_encrypt: stainfo==NULL!!!\n")); ++ res=_FAIL; ++ } ++ ++ } ++_func_exit_; ++exit: ++ return res; ++} ++ ++/* compress 512-bits */ ++static int sha256_compress(struct sha256_state *md, unsigned char *buf) ++{ ++ u32 S[8], W[64], t0, t1; ++ u32 t; ++ int i; ++ ++ /* copy state into S */ ++ for (i = 0; i < 8; i++) { ++ S[i] = md->state[i]; ++ } ++ ++ /* copy the state into 512-bits into W[0..15] */ ++ for (i = 0; i < 16; i++) ++ W[i] = WPA_GET_BE32(buf + (4 * i)); ++ ++ /* fill W[16..63] */ ++ for (i = 16; i < 64; i++) { ++ W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + ++ W[i - 16]; ++ } ++ ++ /* Compress */ ++#define RND(a,b,c,d,e,f,g,h,i) \ ++ t0 = h + Sigma1(e) + Ch(e, f, g) + K[i] + W[i]; \ ++ t1 = Sigma0(a) + Maj(a, b, c); \ ++ d += t0; \ ++ h = t0 + t1; ++ ++ for (i = 0; i < 64; ++i) { ++ RND(S[0], S[1], S[2], S[3], S[4], S[5], S[6], S[7], i); ++ t = S[7]; S[7] = S[6]; S[6] = S[5]; S[5] = S[4]; ++ S[4] = S[3]; S[3] = S[2]; S[2] = S[1]; S[1] = S[0]; S[0] = t; ++ } ++ ++ /* feedback */ ++ for (i = 0; i < 8; i++) { ++ md->state[i] = md->state[i] + S[i]; ++ } ++ return 0; ++} ++ ++/* Initialize the hash state */ ++static void sha256_init(struct sha256_state *md) ++{ ++ md->curlen = 0; ++ md->length = 0; ++ md->state[0] = 0x6A09E667UL; ++ md->state[1] = 0xBB67AE85UL; ++ md->state[2] = 0x3C6EF372UL; ++ md->state[3] = 0xA54FF53AUL; ++ md->state[4] = 0x510E527FUL; ++ md->state[5] = 0x9B05688CUL; ++ md->state[6] = 0x1F83D9ABUL; ++ md->state[7] = 0x5BE0CD19UL; ++} ++ ++/** ++ Process a block of memory though the hash ++ @param md The hash state ++ @param in The data to hash ++ @param inlen The length of the data (octets) ++ @return CRYPT_OK if successful ++*/ ++static int sha256_process(struct sha256_state *md, unsigned char *in, ++ unsigned long inlen) ++{ ++ unsigned long n; ++#define block_size 64 ++ ++ if (md->curlen > sizeof(md->buf)) ++ return -1; ++ ++ while (inlen > 0) { ++ if (md->curlen == 0 && inlen >= block_size) { ++ if (sha256_compress(md, (unsigned char *) in) < 0) ++ return -1; ++ md->length += block_size * 8; ++ in += block_size; ++ inlen -= block_size; ++ } else { ++ n = MIN(inlen, (block_size - md->curlen)); ++ _rtw_memcpy(md->buf + md->curlen, in, n); ++ md->curlen += n; ++ in += n; ++ inlen -= n; ++ if (md->curlen == block_size) { ++ if (sha256_compress(md, md->buf) < 0) ++ return -1; ++ md->length += 8 * block_size; ++ md->curlen = 0; ++ } ++ } ++ } ++ ++ return 0; ++} ++ ++ ++/** ++ Terminate the hash to get the digest ++ @param md The hash state ++ @param out [out] The destination of the hash (32 bytes) ++ @return CRYPT_OK if successful ++*/ ++static int sha256_done(struct sha256_state *md, unsigned char *out) ++{ ++ int i; ++ ++ if (md->curlen >= sizeof(md->buf)) ++ return -1; ++ ++ /* increase the length of the message */ ++ md->length += md->curlen * 8; ++ ++ /* append the '1' bit */ ++ md->buf[md->curlen++] = (unsigned char) 0x80; ++ ++ /* if the length is currently above 56 bytes we append zeros ++ * then compress. Then we can fall back to padding zeros and length ++ * encoding like normal. ++ */ ++ if (md->curlen > 56) { ++ while (md->curlen < 64) { ++ md->buf[md->curlen++] = (unsigned char) 0; ++ } ++ sha256_compress(md, md->buf); ++ md->curlen = 0; ++ } ++ ++ /* pad upto 56 bytes of zeroes */ ++ while (md->curlen < 56) { ++ md->buf[md->curlen++] = (unsigned char) 0; ++ } ++ ++ /* store length */ ++ WPA_PUT_BE64(md->buf + 56, md->length); ++ sha256_compress(md, md->buf); ++ ++ /* copy output */ ++ for (i = 0; i < 8; i++) ++ WPA_PUT_BE32(out + (4 * i), md->state[i]); ++ ++ return 0; ++} ++ ++/** ++ * sha256_vector - SHA256 hash for data vector ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for the hash ++ * Returns: 0 on success, -1 of failure ++ */ ++static int sha256_vector(size_t num_elem, u8 *addr[], size_t *len, ++ u8 *mac) ++{ ++ struct sha256_state ctx; ++ size_t i; ++ ++ sha256_init(&ctx); ++ for (i = 0; i < num_elem; i++) ++ if (sha256_process(&ctx, addr[i], len[i])) ++ return -1; ++ if (sha256_done(&ctx, mac)) ++ return -1; ++ return 0; ++} ++ ++static u8 os_strlen(const char *s) ++{ ++ const char *p = s; ++ while (*p) ++ p++; ++ return p - s; ++} ++ ++static int os_memcmp(void *s1, void *s2, u8 n) ++{ ++ unsigned char *p1 = s1, *p2 = s2; ++ ++ if (n == 0) ++ return 0; ++ ++ while (*p1 == *p2) { ++ p1++; ++ p2++; ++ n--; ++ if (n == 0) ++ return 0; ++ } ++ ++ return *p1 - *p2; ++} ++ ++/** ++ * hmac_sha256_vector - HMAC-SHA256 over data vector (RFC 2104) ++ * @key: Key for HMAC operations ++ * @key_len: Length of the key in bytes ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for the hash (32 bytes) ++ */ ++static void hmac_sha256_vector(u8 *key, size_t key_len, size_t num_elem, ++ u8 *addr[], size_t *len, u8 *mac) ++{ ++ unsigned char k_pad[64]; /* padding - key XORd with ipad/opad */ ++ unsigned char tk[32]; ++ u8 *_addr[6]; ++ size_t _len[6], i; ++ ++ if (num_elem > 5) { ++ /* ++ * Fixed limit on the number of fragments to avoid having to ++ * allocate memory (which could fail). ++ */ ++ return; ++ } ++ ++ /* if key is longer than 64 bytes reset it to key = SHA256(key) */ ++ if (key_len > 64) { ++ sha256_vector(1, &key, &key_len, tk); ++ key = tk; ++ key_len = 32; ++ } ++ ++ /* the HMAC_SHA256 transform looks like: ++ * ++ * SHA256(K XOR opad, SHA256(K XOR ipad, text)) ++ * ++ * where K is an n byte key ++ * ipad is the byte 0x36 repeated 64 times ++ * opad is the byte 0x5c repeated 64 times ++ * and text is the data being protected */ ++ ++ /* start out by storing key in ipad */ ++ _rtw_memset(k_pad, 0, sizeof(k_pad)); ++ _rtw_memcpy(k_pad, key, key_len); ++ /* XOR key with ipad values */ ++ for (i = 0; i < 64; i++) ++ k_pad[i] ^= 0x36; ++ ++ /* perform inner SHA256 */ ++ _addr[0] = k_pad; ++ _len[0] = 64; ++ for (i = 0; i < num_elem; i++) { ++ _addr[i + 1] = addr[i]; ++ _len[i + 1] = len[i]; ++ } ++ sha256_vector(1 + num_elem, _addr, _len, mac); ++ ++ _rtw_memset(k_pad, 0, sizeof(k_pad)); ++ _rtw_memcpy(k_pad, key, key_len); ++ /* XOR key with opad values */ ++ for (i = 0; i < 64; i++) ++ k_pad[i] ^= 0x5c; ++ ++ /* perform outer SHA256 */ ++ _addr[0] = k_pad; ++ _len[0] = 64; ++ _addr[1] = mac; ++ _len[1] = 32; ++ sha256_vector(2, _addr, _len, mac); ++} ++ ++/** ++ * sha256_prf - SHA256-based Pseudo-Random Function (IEEE 802.11r, 8.5.1.5.2) ++ * @key: Key for PRF ++ * @key_len: Length of the key in bytes ++ * @label: A unique label for each purpose of the PRF ++ * @data: Extra data to bind into the key ++ * @data_len: Length of the data ++ * @buf: Buffer for the generated pseudo-random key ++ * @buf_len: Number of bytes of key to generate ++ * ++ * This function is used to derive new, cryptographically separate keys from a ++ * given key. ++ */ ++static void sha256_prf(u8 *key, size_t key_len, char *label, ++ u8 *data, size_t data_len, u8 *buf, size_t buf_len) ++{ ++ u16 counter = 1; ++ size_t pos, plen; ++ u8 hash[SHA256_MAC_LEN]; ++ u8 *addr[4]; ++ size_t len[4]; ++ u8 counter_le[2], length_le[2]; ++ ++ addr[0] = counter_le; ++ len[0] = 2; ++ addr[1] = (u8 *) label; ++ len[1] = os_strlen(label); ++ addr[2] = data; ++ len[2] = data_len; ++ addr[3] = length_le; ++ len[3] = sizeof(length_le); ++ ++ WPA_PUT_LE16(length_le, buf_len * 8); ++ pos = 0; ++ while (pos < buf_len) { ++ plen = buf_len - pos; ++ WPA_PUT_LE16(counter_le, counter); ++ if (plen >= SHA256_MAC_LEN) { ++ hmac_sha256_vector(key, key_len, 4, addr, len, ++ &buf[pos]); ++ pos += SHA256_MAC_LEN; ++ } else { ++ hmac_sha256_vector(key, key_len, 4, addr, len, hash); ++ _rtw_memcpy(&buf[pos], hash, plen); ++ break; ++ } ++ counter++; ++ } ++} ++ ++/* AES tables*/ ++const u32 Te0[256] = { ++ 0xc66363a5U, 0xf87c7c84U, 0xee777799U, 0xf67b7b8dU, ++ 0xfff2f20dU, 0xd66b6bbdU, 0xde6f6fb1U, 0x91c5c554U, ++ 0x60303050U, 0x02010103U, 0xce6767a9U, 0x562b2b7dU, ++ 0xe7fefe19U, 0xb5d7d762U, 0x4dababe6U, 0xec76769aU, ++ 0x8fcaca45U, 0x1f82829dU, 0x89c9c940U, 0xfa7d7d87U, ++ 0xeffafa15U, 0xb25959ebU, 0x8e4747c9U, 0xfbf0f00bU, ++ 0x41adadecU, 0xb3d4d467U, 0x5fa2a2fdU, 0x45afafeaU, ++ 0x239c9cbfU, 0x53a4a4f7U, 0xe4727296U, 0x9bc0c05bU, ++ 0x75b7b7c2U, 0xe1fdfd1cU, 0x3d9393aeU, 0x4c26266aU, ++ 0x6c36365aU, 0x7e3f3f41U, 0xf5f7f702U, 0x83cccc4fU, ++ 0x6834345cU, 0x51a5a5f4U, 0xd1e5e534U, 0xf9f1f108U, ++ 0xe2717193U, 0xabd8d873U, 0x62313153U, 0x2a15153fU, ++ 0x0804040cU, 0x95c7c752U, 0x46232365U, 0x9dc3c35eU, ++ 0x30181828U, 0x379696a1U, 0x0a05050fU, 0x2f9a9ab5U, ++ 0x0e070709U, 0x24121236U, 0x1b80809bU, 0xdfe2e23dU, ++ 0xcdebeb26U, 0x4e272769U, 0x7fb2b2cdU, 0xea75759fU, ++ 0x1209091bU, 0x1d83839eU, 0x582c2c74U, 0x341a1a2eU, ++ 0x361b1b2dU, 0xdc6e6eb2U, 0xb45a5aeeU, 0x5ba0a0fbU, ++ 0xa45252f6U, 0x763b3b4dU, 0xb7d6d661U, 0x7db3b3ceU, ++ 0x5229297bU, 0xdde3e33eU, 0x5e2f2f71U, 0x13848497U, ++ 0xa65353f5U, 0xb9d1d168U, 0x00000000U, 0xc1eded2cU, ++ 0x40202060U, 0xe3fcfc1fU, 0x79b1b1c8U, 0xb65b5bedU, ++ 0xd46a6abeU, 0x8dcbcb46U, 0x67bebed9U, 0x7239394bU, ++ 0x944a4adeU, 0x984c4cd4U, 0xb05858e8U, 0x85cfcf4aU, ++ 0xbbd0d06bU, 0xc5efef2aU, 0x4faaaae5U, 0xedfbfb16U, ++ 0x864343c5U, 0x9a4d4dd7U, 0x66333355U, 0x11858594U, ++ 0x8a4545cfU, 0xe9f9f910U, 0x04020206U, 0xfe7f7f81U, ++ 0xa05050f0U, 0x783c3c44U, 0x259f9fbaU, 0x4ba8a8e3U, ++ 0xa25151f3U, 0x5da3a3feU, 0x804040c0U, 0x058f8f8aU, ++ 0x3f9292adU, 0x219d9dbcU, 0x70383848U, 0xf1f5f504U, ++ 0x63bcbcdfU, 0x77b6b6c1U, 0xafdada75U, 0x42212163U, ++ 0x20101030U, 0xe5ffff1aU, 0xfdf3f30eU, 0xbfd2d26dU, ++ 0x81cdcd4cU, 0x180c0c14U, 0x26131335U, 0xc3ecec2fU, ++ 0xbe5f5fe1U, 0x359797a2U, 0x884444ccU, 0x2e171739U, ++ 0x93c4c457U, 0x55a7a7f2U, 0xfc7e7e82U, 0x7a3d3d47U, ++ 0xc86464acU, 0xba5d5de7U, 0x3219192bU, 0xe6737395U, ++ 0xc06060a0U, 0x19818198U, 0x9e4f4fd1U, 0xa3dcdc7fU, ++ 0x44222266U, 0x542a2a7eU, 0x3b9090abU, 0x0b888883U, ++ 0x8c4646caU, 0xc7eeee29U, 0x6bb8b8d3U, 0x2814143cU, ++ 0xa7dede79U, 0xbc5e5ee2U, 0x160b0b1dU, 0xaddbdb76U, ++ 0xdbe0e03bU, 0x64323256U, 0x743a3a4eU, 0x140a0a1eU, ++ 0x924949dbU, 0x0c06060aU, 0x4824246cU, 0xb85c5ce4U, ++ 0x9fc2c25dU, 0xbdd3d36eU, 0x43acacefU, 0xc46262a6U, ++ 0x399191a8U, 0x319595a4U, 0xd3e4e437U, 0xf279798bU, ++ 0xd5e7e732U, 0x8bc8c843U, 0x6e373759U, 0xda6d6db7U, ++ 0x018d8d8cU, 0xb1d5d564U, 0x9c4e4ed2U, 0x49a9a9e0U, ++ 0xd86c6cb4U, 0xac5656faU, 0xf3f4f407U, 0xcfeaea25U, ++ 0xca6565afU, 0xf47a7a8eU, 0x47aeaee9U, 0x10080818U, ++ 0x6fbabad5U, 0xf0787888U, 0x4a25256fU, 0x5c2e2e72U, ++ 0x381c1c24U, 0x57a6a6f1U, 0x73b4b4c7U, 0x97c6c651U, ++ 0xcbe8e823U, 0xa1dddd7cU, 0xe874749cU, 0x3e1f1f21U, ++ 0x964b4bddU, 0x61bdbddcU, 0x0d8b8b86U, 0x0f8a8a85U, ++ 0xe0707090U, 0x7c3e3e42U, 0x71b5b5c4U, 0xcc6666aaU, ++ 0x904848d8U, 0x06030305U, 0xf7f6f601U, 0x1c0e0e12U, ++ 0xc26161a3U, 0x6a35355fU, 0xae5757f9U, 0x69b9b9d0U, ++ 0x17868691U, 0x99c1c158U, 0x3a1d1d27U, 0x279e9eb9U, ++ 0xd9e1e138U, 0xebf8f813U, 0x2b9898b3U, 0x22111133U, ++ 0xd26969bbU, 0xa9d9d970U, 0x078e8e89U, 0x339494a7U, ++ 0x2d9b9bb6U, 0x3c1e1e22U, 0x15878792U, 0xc9e9e920U, ++ 0x87cece49U, 0xaa5555ffU, 0x50282878U, 0xa5dfdf7aU, ++ 0x038c8c8fU, 0x59a1a1f8U, 0x09898980U, 0x1a0d0d17U, ++ 0x65bfbfdaU, 0xd7e6e631U, 0x844242c6U, 0xd06868b8U, ++ 0x824141c3U, 0x299999b0U, 0x5a2d2d77U, 0x1e0f0f11U, ++ 0x7bb0b0cbU, 0xa85454fcU, 0x6dbbbbd6U, 0x2c16163aU, ++}; ++const u32 Td0[256] = { ++ 0x51f4a750U, 0x7e416553U, 0x1a17a4c3U, 0x3a275e96U, ++ 0x3bab6bcbU, 0x1f9d45f1U, 0xacfa58abU, 0x4be30393U, ++ 0x2030fa55U, 0xad766df6U, 0x88cc7691U, 0xf5024c25U, ++ 0x4fe5d7fcU, 0xc52acbd7U, 0x26354480U, 0xb562a38fU, ++ 0xdeb15a49U, 0x25ba1b67U, 0x45ea0e98U, 0x5dfec0e1U, ++ 0xc32f7502U, 0x814cf012U, 0x8d4697a3U, 0x6bd3f9c6U, ++ 0x038f5fe7U, 0x15929c95U, 0xbf6d7aebU, 0x955259daU, ++ 0xd4be832dU, 0x587421d3U, 0x49e06929U, 0x8ec9c844U, ++ 0x75c2896aU, 0xf48e7978U, 0x99583e6bU, 0x27b971ddU, ++ 0xbee14fb6U, 0xf088ad17U, 0xc920ac66U, 0x7dce3ab4U, ++ 0x63df4a18U, 0xe51a3182U, 0x97513360U, 0x62537f45U, ++ 0xb16477e0U, 0xbb6bae84U, 0xfe81a01cU, 0xf9082b94U, ++ 0x70486858U, 0x8f45fd19U, 0x94de6c87U, 0x527bf8b7U, ++ 0xab73d323U, 0x724b02e2U, 0xe31f8f57U, 0x6655ab2aU, ++ 0xb2eb2807U, 0x2fb5c203U, 0x86c57b9aU, 0xd33708a5U, ++ 0x302887f2U, 0x23bfa5b2U, 0x02036abaU, 0xed16825cU, ++ 0x8acf1c2bU, 0xa779b492U, 0xf307f2f0U, 0x4e69e2a1U, ++ 0x65daf4cdU, 0x0605bed5U, 0xd134621fU, 0xc4a6fe8aU, ++ 0x342e539dU, 0xa2f355a0U, 0x058ae132U, 0xa4f6eb75U, ++ 0x0b83ec39U, 0x4060efaaU, 0x5e719f06U, 0xbd6e1051U, ++ 0x3e218af9U, 0x96dd063dU, 0xdd3e05aeU, 0x4de6bd46U, ++ 0x91548db5U, 0x71c45d05U, 0x0406d46fU, 0x605015ffU, ++ 0x1998fb24U, 0xd6bde997U, 0x894043ccU, 0x67d99e77U, ++ 0xb0e842bdU, 0x07898b88U, 0xe7195b38U, 0x79c8eedbU, ++ 0xa17c0a47U, 0x7c420fe9U, 0xf8841ec9U, 0x00000000U, ++ 0x09808683U, 0x322bed48U, 0x1e1170acU, 0x6c5a724eU, ++ 0xfd0efffbU, 0x0f853856U, 0x3daed51eU, 0x362d3927U, ++ 0x0a0fd964U, 0x685ca621U, 0x9b5b54d1U, 0x24362e3aU, ++ 0x0c0a67b1U, 0x9357e70fU, 0xb4ee96d2U, 0x1b9b919eU, ++ 0x80c0c54fU, 0x61dc20a2U, 0x5a774b69U, 0x1c121a16U, ++ 0xe293ba0aU, 0xc0a02ae5U, 0x3c22e043U, 0x121b171dU, ++ 0x0e090d0bU, 0xf28bc7adU, 0x2db6a8b9U, 0x141ea9c8U, ++ 0x57f11985U, 0xaf75074cU, 0xee99ddbbU, 0xa37f60fdU, ++ 0xf701269fU, 0x5c72f5bcU, 0x44663bc5U, 0x5bfb7e34U, ++ 0x8b432976U, 0xcb23c6dcU, 0xb6edfc68U, 0xb8e4f163U, ++ 0xd731dccaU, 0x42638510U, 0x13972240U, 0x84c61120U, ++ 0x854a247dU, 0xd2bb3df8U, 0xaef93211U, 0xc729a16dU, ++ 0x1d9e2f4bU, 0xdcb230f3U, 0x0d8652ecU, 0x77c1e3d0U, ++ 0x2bb3166cU, 0xa970b999U, 0x119448faU, 0x47e96422U, ++ 0xa8fc8cc4U, 0xa0f03f1aU, 0x567d2cd8U, 0x223390efU, ++ 0x87494ec7U, 0xd938d1c1U, 0x8ccaa2feU, 0x98d40b36U, ++ 0xa6f581cfU, 0xa57ade28U, 0xdab78e26U, 0x3fadbfa4U, ++ 0x2c3a9de4U, 0x5078920dU, 0x6a5fcc9bU, 0x547e4662U, ++ 0xf68d13c2U, 0x90d8b8e8U, 0x2e39f75eU, 0x82c3aff5U, ++ 0x9f5d80beU, 0x69d0937cU, 0x6fd52da9U, 0xcf2512b3U, ++ 0xc8ac993bU, 0x10187da7U, 0xe89c636eU, 0xdb3bbb7bU, ++ 0xcd267809U, 0x6e5918f4U, 0xec9ab701U, 0x834f9aa8U, ++ 0xe6956e65U, 0xaaffe67eU, 0x21bccf08U, 0xef15e8e6U, ++ 0xbae79bd9U, 0x4a6f36ceU, 0xea9f09d4U, 0x29b07cd6U, ++ 0x31a4b2afU, 0x2a3f2331U, 0xc6a59430U, 0x35a266c0U, ++ 0x744ebc37U, 0xfc82caa6U, 0xe090d0b0U, 0x33a7d815U, ++ 0xf104984aU, 0x41ecdaf7U, 0x7fcd500eU, 0x1791f62fU, ++ 0x764dd68dU, 0x43efb04dU, 0xccaa4d54U, 0xe49604dfU, ++ 0x9ed1b5e3U, 0x4c6a881bU, 0xc12c1fb8U, 0x4665517fU, ++ 0x9d5eea04U, 0x018c355dU, 0xfa877473U, 0xfb0b412eU, ++ 0xb3671d5aU, 0x92dbd252U, 0xe9105633U, 0x6dd64713U, ++ 0x9ad7618cU, 0x37a10c7aU, 0x59f8148eU, 0xeb133c89U, ++ 0xcea927eeU, 0xb761c935U, 0xe11ce5edU, 0x7a47b13cU, ++ 0x9cd2df59U, 0x55f2733fU, 0x1814ce79U, 0x73c737bfU, ++ 0x53f7cdeaU, 0x5ffdaa5bU, 0xdf3d6f14U, 0x7844db86U, ++ 0xcaaff381U, 0xb968c43eU, 0x3824342cU, 0xc2a3405fU, ++ 0x161dc372U, 0xbce2250cU, 0x283c498bU, 0xff0d9541U, ++ 0x39a80171U, 0x080cb3deU, 0xd8b4e49cU, 0x6456c190U, ++ 0x7bcb8461U, 0xd532b670U, 0x486c5c74U, 0xd0b85742U, ++}; ++const u8 Td4s[256] = { ++ 0x52U, 0x09U, 0x6aU, 0xd5U, 0x30U, 0x36U, 0xa5U, 0x38U, ++ 0xbfU, 0x40U, 0xa3U, 0x9eU, 0x81U, 0xf3U, 0xd7U, 0xfbU, ++ 0x7cU, 0xe3U, 0x39U, 0x82U, 0x9bU, 0x2fU, 0xffU, 0x87U, ++ 0x34U, 0x8eU, 0x43U, 0x44U, 0xc4U, 0xdeU, 0xe9U, 0xcbU, ++ 0x54U, 0x7bU, 0x94U, 0x32U, 0xa6U, 0xc2U, 0x23U, 0x3dU, ++ 0xeeU, 0x4cU, 0x95U, 0x0bU, 0x42U, 0xfaU, 0xc3U, 0x4eU, ++ 0x08U, 0x2eU, 0xa1U, 0x66U, 0x28U, 0xd9U, 0x24U, 0xb2U, ++ 0x76U, 0x5bU, 0xa2U, 0x49U, 0x6dU, 0x8bU, 0xd1U, 0x25U, ++ 0x72U, 0xf8U, 0xf6U, 0x64U, 0x86U, 0x68U, 0x98U, 0x16U, ++ 0xd4U, 0xa4U, 0x5cU, 0xccU, 0x5dU, 0x65U, 0xb6U, 0x92U, ++ 0x6cU, 0x70U, 0x48U, 0x50U, 0xfdU, 0xedU, 0xb9U, 0xdaU, ++ 0x5eU, 0x15U, 0x46U, 0x57U, 0xa7U, 0x8dU, 0x9dU, 0x84U, ++ 0x90U, 0xd8U, 0xabU, 0x00U, 0x8cU, 0xbcU, 0xd3U, 0x0aU, ++ 0xf7U, 0xe4U, 0x58U, 0x05U, 0xb8U, 0xb3U, 0x45U, 0x06U, ++ 0xd0U, 0x2cU, 0x1eU, 0x8fU, 0xcaU, 0x3fU, 0x0fU, 0x02U, ++ 0xc1U, 0xafU, 0xbdU, 0x03U, 0x01U, 0x13U, 0x8aU, 0x6bU, ++ 0x3aU, 0x91U, 0x11U, 0x41U, 0x4fU, 0x67U, 0xdcU, 0xeaU, ++ 0x97U, 0xf2U, 0xcfU, 0xceU, 0xf0U, 0xb4U, 0xe6U, 0x73U, ++ 0x96U, 0xacU, 0x74U, 0x22U, 0xe7U, 0xadU, 0x35U, 0x85U, ++ 0xe2U, 0xf9U, 0x37U, 0xe8U, 0x1cU, 0x75U, 0xdfU, 0x6eU, ++ 0x47U, 0xf1U, 0x1aU, 0x71U, 0x1dU, 0x29U, 0xc5U, 0x89U, ++ 0x6fU, 0xb7U, 0x62U, 0x0eU, 0xaaU, 0x18U, 0xbeU, 0x1bU, ++ 0xfcU, 0x56U, 0x3eU, 0x4bU, 0xc6U, 0xd2U, 0x79U, 0x20U, ++ 0x9aU, 0xdbU, 0xc0U, 0xfeU, 0x78U, 0xcdU, 0x5aU, 0xf4U, ++ 0x1fU, 0xddU, 0xa8U, 0x33U, 0x88U, 0x07U, 0xc7U, 0x31U, ++ 0xb1U, 0x12U, 0x10U, 0x59U, 0x27U, 0x80U, 0xecU, 0x5fU, ++ 0x60U, 0x51U, 0x7fU, 0xa9U, 0x19U, 0xb5U, 0x4aU, 0x0dU, ++ 0x2dU, 0xe5U, 0x7aU, 0x9fU, 0x93U, 0xc9U, 0x9cU, 0xefU, ++ 0xa0U, 0xe0U, 0x3bU, 0x4dU, 0xaeU, 0x2aU, 0xf5U, 0xb0U, ++ 0xc8U, 0xebU, 0xbbU, 0x3cU, 0x83U, 0x53U, 0x99U, 0x61U, ++ 0x17U, 0x2bU, 0x04U, 0x7eU, 0xbaU, 0x77U, 0xd6U, 0x26U, ++ 0xe1U, 0x69U, 0x14U, 0x63U, 0x55U, 0x21U, 0x0cU, 0x7dU, ++}; ++const u8 rcons[] = { ++ 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1B, 0x36 ++ /* for 128-bit blocks, Rijndael never uses more than 10 rcon values */ ++}; ++ ++/** ++ * Expand the cipher key into the encryption key schedule. ++ * ++ * @return the number of rounds for the given cipher key size. ++ */ ++static void rijndaelKeySetupEnc(u32 rk[/*44*/], const u8 cipherKey[]) ++{ ++ int i; ++ u32 temp; ++ ++ rk[0] = GETU32(cipherKey ); ++ rk[1] = GETU32(cipherKey + 4); ++ rk[2] = GETU32(cipherKey + 8); ++ rk[3] = GETU32(cipherKey + 12); ++ for (i = 0; i < 10; i++) { ++ temp = rk[3]; ++ rk[4] = rk[0] ^ ++ TE421(temp) ^ TE432(temp) ^ TE443(temp) ^ TE414(temp) ^ ++ RCON(i); ++ rk[5] = rk[1] ^ rk[4]; ++ rk[6] = rk[2] ^ rk[5]; ++ rk[7] = rk[3] ^ rk[6]; ++ rk += 4; ++ } ++} ++ ++static void rijndaelEncrypt(u32 rk[/*44*/], u8 pt[16], u8 ct[16]) ++{ ++ u32 s0, s1, s2, s3, t0, t1, t2, t3; ++ int Nr = 10; ++#ifndef FULL_UNROLL ++ int r; ++#endif /* ?FULL_UNROLL */ ++ ++ /* ++ * map byte array block to cipher state ++ * and add initial round key: ++ */ ++ s0 = GETU32(pt ) ^ rk[0]; ++ s1 = GETU32(pt + 4) ^ rk[1]; ++ s2 = GETU32(pt + 8) ^ rk[2]; ++ s3 = GETU32(pt + 12) ^ rk[3]; ++ ++#define ROUND(i,d,s) \ ++d##0 = TE0(s##0) ^ TE1(s##1) ^ TE2(s##2) ^ TE3(s##3) ^ rk[4 * i]; \ ++d##1 = TE0(s##1) ^ TE1(s##2) ^ TE2(s##3) ^ TE3(s##0) ^ rk[4 * i + 1]; \ ++d##2 = TE0(s##2) ^ TE1(s##3) ^ TE2(s##0) ^ TE3(s##1) ^ rk[4 * i + 2]; \ ++d##3 = TE0(s##3) ^ TE1(s##0) ^ TE2(s##1) ^ TE3(s##2) ^ rk[4 * i + 3] ++ ++#ifdef FULL_UNROLL ++ ++ ROUND(1,t,s); ++ ROUND(2,s,t); ++ ROUND(3,t,s); ++ ROUND(4,s,t); ++ ROUND(5,t,s); ++ ROUND(6,s,t); ++ ROUND(7,t,s); ++ ROUND(8,s,t); ++ ROUND(9,t,s); ++ ++ rk += Nr << 2; ++ ++#else /* !FULL_UNROLL */ ++ ++ /* Nr - 1 full rounds: */ ++ r = Nr >> 1; ++ for (;;) { ++ ROUND(1,t,s); ++ rk += 8; ++ if (--r == 0) ++ break; ++ ROUND(0,s,t); ++ } ++ ++#endif /* ?FULL_UNROLL */ ++ ++#undef ROUND ++ ++ /* ++ * apply last round and ++ * map cipher state to byte array block: ++ */ ++ s0 = TE41(t0) ^ TE42(t1) ^ TE43(t2) ^ TE44(t3) ^ rk[0]; ++ PUTU32(ct , s0); ++ s1 = TE41(t1) ^ TE42(t2) ^ TE43(t3) ^ TE44(t0) ^ rk[1]; ++ PUTU32(ct + 4, s1); ++ s2 = TE41(t2) ^ TE42(t3) ^ TE43(t0) ^ TE44(t1) ^ rk[2]; ++ PUTU32(ct + 8, s2); ++ s3 = TE41(t3) ^ TE42(t0) ^ TE43(t1) ^ TE44(t2) ^ rk[3]; ++ PUTU32(ct + 12, s3); ++} ++ ++static void * aes_encrypt_init(u8 *key, size_t len) ++{ ++ u32 *rk; ++ if (len != 16) ++ return NULL; ++ rk = (u32*)rtw_malloc(AES_PRIV_SIZE); ++ if (rk == NULL) ++ return NULL; ++ rijndaelKeySetupEnc(rk, key); ++ return rk; ++} ++ ++static void aes_128_encrypt(void *ctx, u8 *plain, u8 *crypt) ++{ ++ rijndaelEncrypt(ctx, plain, crypt); ++} ++ ++ ++static void gf_mulx(u8 *pad) ++{ ++ int i, carry; ++ ++ carry = pad[0] & 0x80; ++ for (i = 0; i < AES_BLOCK_SIZE - 1; i++) ++ pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); ++ pad[AES_BLOCK_SIZE - 1] <<= 1; ++ if (carry) ++ pad[AES_BLOCK_SIZE - 1] ^= 0x87; ++} ++ ++static void aes_encrypt_deinit(void *ctx) ++{ ++ _rtw_memset(ctx, 0, AES_PRIV_SIZE); ++ rtw_mfree(ctx, AES_PRIV_SIZE); ++} ++ ++ ++/** ++ * omac1_aes_128_vector - One-Key CBC MAC (OMAC1) hash with AES-128 ++ * @key: 128-bit key for the hash operation ++ * @num_elem: Number of elements in the data vector ++ * @addr: Pointers to the data areas ++ * @len: Lengths of the data blocks ++ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) ++ * Returns: 0 on success, -1 on failure ++ * ++ * This is a mode for using block cipher (AES in this case) for authentication. ++ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication ++ * (SP) 800-38B. ++ */ ++static int omac1_aes_128_vector(u8 *key, size_t num_elem, ++ u8 *addr[], size_t *len, u8 *mac) ++{ ++ void *ctx; ++ u8 cbc[AES_BLOCK_SIZE], pad[AES_BLOCK_SIZE]; ++ u8 *pos, *end; ++ size_t i, e, left, total_len; ++ ++ ctx = aes_encrypt_init(key, 16); ++ if (ctx == NULL) ++ return -1; ++ _rtw_memset(cbc, 0, AES_BLOCK_SIZE); ++ ++ total_len = 0; ++ for (e = 0; e < num_elem; e++) ++ total_len += len[e]; ++ left = total_len; ++ ++ e = 0; ++ pos = addr[0]; ++ end = pos + len[0]; ++ ++ while (left >= AES_BLOCK_SIZE) { ++ for (i = 0; i < AES_BLOCK_SIZE; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ if (left > AES_BLOCK_SIZE) ++ aes_128_encrypt(ctx, cbc, cbc); ++ left -= AES_BLOCK_SIZE; ++ } ++ ++ _rtw_memset(pad, 0, AES_BLOCK_SIZE); ++ aes_128_encrypt(ctx, pad, pad); ++ gf_mulx(pad); ++ ++ if (left || total_len == 0) { ++ for (i = 0; i < left; i++) { ++ cbc[i] ^= *pos++; ++ if (pos >= end) { ++ e++; ++ pos = addr[e]; ++ end = pos + len[e]; ++ } ++ } ++ cbc[left] ^= 0x80; ++ gf_mulx(pad); ++ } ++ ++ for (i = 0; i < AES_BLOCK_SIZE; i++) ++ pad[i] ^= cbc[i]; ++ aes_128_encrypt(ctx, pad, mac); ++ aes_encrypt_deinit(ctx); ++ return 0; ++} ++ ++ ++/** ++ * omac1_aes_128 - One-Key CBC MAC (OMAC1) hash with AES-128 (aka AES-CMAC) ++ * @key: 128-bit key for the hash operation ++ * @data: Data buffer for which a MAC is determined ++ * @data_len: Length of data buffer in bytes ++ * @mac: Buffer for MAC (128 bits, i.e., 16 bytes) ++ * Returns: 0 on success, -1 on failure ++ * ++ * This is a mode for using block cipher (AES in this case) for authentication. ++ * OMAC1 was standardized with the name CMAC by NIST in a Special Publication ++ * (SP) 800-38B. ++ */ ++static int omac1_aes_128(u8 *key, u8 *data, size_t data_len, u8 *mac) ++{ ++ return omac1_aes_128_vector(key, 1, &data, &data_len, mac); ++} ++ ++#ifdef CONFIG_TDLS ++void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 *SNonce = psta->SNonce; ++ u8 *ANonce = psta->ANonce; ++ ++ u8 key_input[SHA256_MAC_LEN]; ++ u8 *nonce[2]; ++ size_t len[2]; ++ u8 data[3 * ETH_ALEN]; ++ ++ /* IEEE Std 802.11z-2010 8.5.9.1: ++ * TPK-Key-Input = SHA-256(min(SNonce, ANonce) || max(SNonce, ANonce)) ++ */ ++ len[0] = 32; ++ len[1] = 32; ++ if (os_memcmp(SNonce, ANonce, 32) < 0) { ++ nonce[0] = SNonce; ++ nonce[1] = ANonce; ++ } else { ++ nonce[0] = ANonce; ++ nonce[1] = SNonce; ++ } ++ ++ sha256_vector(2, nonce, len, key_input); ++ ++ /* ++ * TPK-Key-Data = KDF-N_KEY(TPK-Key-Input, "TDLS PMK", ++ * min(MAC_I, MAC_R) || max(MAC_I, MAC_R) || BSSID || N_KEY) ++ * TODO: is N_KEY really included in KDF Context and if so, in which ++ * presentation format (little endian 16-bit?) is it used? It gets ++ * added by the KDF anyway.. ++ */ ++ ++ if (os_memcmp(myid(&(padapter->eeprompriv)), psta->hwaddr, ETH_ALEN) < 0) { ++ _rtw_memcpy(data, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(data + ETH_ALEN, psta->hwaddr, ETH_ALEN); ++ } else { ++ _rtw_memcpy(data, psta->hwaddr, ETH_ALEN); ++ _rtw_memcpy(data + ETH_ALEN, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ } ++ _rtw_memcpy(data + 2 * ETH_ALEN, get_bssid(pmlmepriv), ETH_ALEN); ++ ++ sha256_prf(key_input, SHA256_MAC_LEN, "TDLS PMK", data, sizeof(data), (u8 *) &psta->tpk, sizeof(psta->tpk)); ++ ++ ++} ++ ++/** ++ * wpa_tdls_ftie_mic - Calculate TDLS FTIE MIC ++ * @kck: TPK-KCK ++ * @lnkid: Pointer to the beginning of Link Identifier IE ++ * @rsnie: Pointer to the beginning of RSN IE used for handshake ++ * @timeoutie: Pointer to the beginning of Timeout IE used for handshake ++ * @ftie: Pointer to the beginning of FT IE ++ * @mic: Pointer for writing MIC ++ * ++ * Calculate MIC for TDLS frame. ++ */ ++int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, ++ u8 *mic) ++{ ++ u8 *buf, *pos; ++ struct wpa_tdls_ftie *_ftie; ++ struct wpa_tdls_lnkid *_lnkid; ++ int ret; ++ int len = 2 * ETH_ALEN + 1 + 2 + lnkid[1] + 2 + rsnie[1] + ++ 2 + timeoutie[1] + 2 + ftie[1]; ++ buf = rtw_zmalloc(len); ++ if (!buf) { ++ DBG_8192C("TDLS: No memory for MIC calculation\n"); ++ return -1; ++ } ++ ++ pos = buf; ++ _lnkid = (struct wpa_tdls_lnkid *) lnkid; ++ /* 1) TDLS initiator STA MAC address */ ++ _rtw_memcpy(pos, _lnkid->init_sta, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 2) TDLS responder STA MAC address */ ++ _rtw_memcpy(pos, _lnkid->resp_sta, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 3) Transaction Sequence number */ ++ *pos++ = trans_seq; ++ /* 4) Link Identifier IE */ ++ _rtw_memcpy(pos, lnkid, 2 + lnkid[1]); ++ pos += 2 + lnkid[1]; ++ /* 5) RSN IE */ ++ _rtw_memcpy(pos, rsnie, 2 + rsnie[1]); ++ pos += 2 + rsnie[1]; ++ /* 6) Timeout Interval IE */ ++ _rtw_memcpy(pos, timeoutie, 2 + timeoutie[1]); ++ pos += 2 + timeoutie[1]; ++ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ ++ _rtw_memcpy(pos, ftie, 2 + ftie[1]); ++ _ftie = (struct wpa_tdls_ftie *) pos; ++ _rtw_memset(_ftie->mic, 0, TDLS_MIC_LEN); ++ pos += 2 + ftie[1]; ++ ++ ret = omac1_aes_128(kck, buf, pos - buf, mic); ++ rtw_mfree(buf, len); ++ return ret; ++ ++} ++ ++int tdls_verify_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie) ++{ ++ u8 *buf, *pos; ++ int len; ++ u8 mic[16]; ++ int ret; ++ u8 *rx_ftie, *tmp_ftie; ++ ++ if (lnkid == NULL || rsnie == NULL || ++ timeoutie == NULL || ftie == NULL){ ++ DBG_8192C("pointer fail\n"); ++ return 0; ++ } ++ ++ len = 2 * ETH_ALEN + 1 + 2 + 18 + 2 + *(rsnie+1) + 2 + *(timeoutie+1) + 2 + *(ftie+1); ++ ++ buf = rtw_zmalloc(len); ++ if (buf == NULL) ++ return 0; ++ ++ pos = buf; ++ /* 1) TDLS initiator STA MAC address */ ++ _rtw_memcpy(pos, lnkid + ETH_ALEN + 2, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 2) TDLS responder STA MAC address */ ++ _rtw_memcpy(pos, lnkid + 2 * ETH_ALEN + 2, ETH_ALEN); ++ pos += ETH_ALEN; ++ /* 3) Transaction Sequence number */ ++ *pos++ = trans_seq; ++ /* 4) Link Identifier IE */ ++ _rtw_memcpy(pos, lnkid, 2 + 18); ++ pos += 2 + 18; ++ /* 5) RSN IE */ ++ _rtw_memcpy(pos, rsnie, 2 + *(rsnie+1)); ++ pos += 2 + *(rsnie+1); ++ /* 6) Timeout Interval IE */ ++ _rtw_memcpy(pos, timeoutie, 2 + *(timeoutie+1)); ++ pos += 2 + *(timeoutie+1); ++ /* 7) FTIE, with the MIC field of the FTIE set to 0 */ ++ _rtw_memcpy(pos, ftie, 2 + *(ftie+1)); ++ pos += 2; ++ tmp_ftie = (u8 *) (pos+2); ++ _rtw_memset(tmp_ftie, 0, 16); ++ pos += *(ftie+1); ++ ++ ret = omac1_aes_128(kck, buf, pos - buf, mic); ++ rtw_mfree(buf, len); ++ if (ret) ++ return 0; ++ rx_ftie = ftie+4; ++ ++ if (os_memcmp(mic, rx_ftie, 16) == 0) { ++ //Valid MIC ++ DBG_8192C( "[%s] Valid MIC\n", __FUNCTION__); ++ return 1; ++ } ++ //Invalid MIC ++ DBG_8192C( "[%s] Invalid MIC\n", __FUNCTION__); ++ return 0; ++ ++} ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++void rtw_use_tkipkey_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ) ++#endif ++#ifdef PLATFORM_LINUX ++void rtw_use_tkipkey_handler(void *FunctionContext) ++#endif ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler ^^^\n")); ++ ++/* ++ if(padapter->bDriverStopped ||padapter->bSurpriseRemoved){ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler (padapter->bDriverStopped %d)(padapter->bSurpriseRemoved %d)^^^\n",padapter->bDriverStopped,padapter->bSurpriseRemoved)); ++ ++ return; ++ } ++ */ ++ ++ padapter->securitypriv.busetkipkey=_TRUE; ++ ++ RT_TRACE(_module_rtl871x_security_c_,_drv_err_,("^^^rtw_use_tkipkey_handler padapter->securitypriv.busetkipkey=%d^^^\n",padapter->securitypriv.busetkipkey)); ++ ++_func_exit_; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_sta_mgt.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_sta_mgt.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,720 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_STA_MGT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++ ++ ++void _rtw_init_stainfo(struct sta_info *psta) ++{ ++ ++_func_enter_; ++ ++ _rtw_memset((u8 *)psta, 0, sizeof (struct sta_info)); ++ ++ _rtw_spinlock_init(&psta->lock); ++ _rtw_init_listhead(&psta->list); ++ _rtw_init_listhead(&psta->hash_list); ++ //_rtw_init_listhead(&psta->asoc_list); ++ //_rtw_init_listhead(&psta->sleep_list); ++ //_rtw_init_listhead(&psta->wakeup_list); ++ ++ _rtw_init_queue(&psta->sleep_q); ++ psta->sleepq_len = 0; ++ ++ _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); ++ _rtw_init_sta_recv_priv(&psta->sta_recvpriv); ++ ++#ifdef CONFIG_AP_MODE ++ ++ _rtw_init_listhead(&psta->asoc_list); ++ ++ _rtw_init_listhead(&psta->auth_list); ++ ++ psta->expire_to = 0; ++ ++ psta->flags = 0; ++ ++ psta->capability = 0; ++ ++ psta->bpairwise_key_installed = _FALSE; ++ ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ psta->nonerp_set = 0; ++ psta->no_short_slot_time_set = 0; ++ psta->no_short_preamble_set = 0; ++ psta->no_ht_gf_set = 0; ++ psta->no_ht_set = 0; ++ psta->ht_20mhz_set = 0; ++#endif ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++#endif // CONFIG_AP_MODE ++ ++_func_exit_; ++ ++} ++ ++u32 _rtw_init_sta_priv(struct sta_priv *pstapriv) ++{ ++ struct sta_info *psta; ++ s32 i; ++ ++_func_enter_; ++ ++ pstapriv->pallocated_stainfo_buf = rtw_zvmalloc (sizeof(struct sta_info) * NUM_STA+ 4); ++ ++ if(!pstapriv->pallocated_stainfo_buf) ++ return _FAIL; ++ ++ pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 - ++ ((SIZE_PTR)(pstapriv->pallocated_stainfo_buf ) & 3); ++ ++ _rtw_init_queue(&pstapriv->free_sta_queue); ++ ++ _rtw_spinlock_init(&pstapriv->sta_hash_lock); ++ ++ //_rtw_init_queue(&pstapriv->asoc_q); ++ pstapriv->asoc_sta_count = 0; ++ _rtw_init_queue(&pstapriv->sleep_q); ++ _rtw_init_queue(&pstapriv->wakeup_q); ++ ++ psta = (struct sta_info *)(pstapriv->pstainfo_buf); ++ ++ ++ for(i = 0; i < NUM_STA; i++) ++ { ++ _rtw_init_stainfo(psta); ++ ++ _rtw_init_listhead(&(pstapriv->sta_hash[i])); ++ ++ rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue)); ++ ++ psta++; ++ } ++ ++#ifdef CONFIG_AP_MODE ++ ++ pstapriv->sta_dz_bitmap = 0; ++ pstapriv->tim_bitmap = 0; ++ ++ _rtw_init_listhead(&pstapriv->asoc_list); ++ _rtw_init_listhead(&pstapriv->auth_list); ++ ++ _rtw_spinlock_init(&pstapriv->asoc_list_lock); ++ _rtw_spinlock_init(&pstapriv->auth_list_lock); ++ ++ pstapriv->auth_to = 3; // 3*2 = 6 sec ++ pstapriv->assoc_to = 3; ++ //pstapriv->expire_to = 900;// 900*2 = 1800 sec = 30 min, expire after no any traffic. ++ //pstapriv->expire_to = 30;// 30*2 = 60 sec = 1 min, expire after no any traffic. ++ pstapriv->expire_to = 60;// 60*2 = 120 sec = 2 min, expire after no any traffic. ++ ++ pstapriv->max_num_sta = NUM_STA; ++ ++#endif ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++void _rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv) ++{ ++_func_enter_; ++ ++ _rtw_spinlock_free(&psta_xmitpriv->lock); ++ ++ _rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock)); ++ _rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock)); ++_func_exit_; ++} ++ ++static void _rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv) ++{ ++_func_enter_; ++ ++ _rtw_spinlock_free(&psta_recvpriv->lock); ++ ++ _rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock)); ++ ++_func_exit_; ++ ++} ++ ++void rtw_mfree_stainfo(struct sta_info *psta) ++{ ++_func_enter_; ++ ++ if(&psta->lock != NULL) ++ _rtw_spinlock_free(&psta->lock); ++ ++ _rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv); ++ _rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv); ++ ++_func_exit_; ++} ++ ++ ++// this function is used to free the memory of lock || sema for all stainfos ++void rtw_mfree_all_stainfo(struct sta_priv *pstapriv ) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct sta_info *psta = NULL; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ phead = get_list_head(&pstapriv->free_sta_queue); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info ,list); ++ plist = get_next(plist); ++ ++ rtw_mfree_stainfo(psta); ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++_func_exit_; ++ ++} ++ ++ ++void rtw_mfree_sta_priv_lock(struct sta_priv *pstapriv) ++{ ++ rtw_mfree_all_stainfo(pstapriv); //be done before free sta_hash_lock ++ ++ _rtw_spinlock_free(&pstapriv->free_sta_queue.lock); ++ ++ _rtw_spinlock_free(&pstapriv->sta_hash_lock); ++ _rtw_spinlock_free(&pstapriv->wakeup_q.lock); ++ _rtw_spinlock_free(&pstapriv->sleep_q.lock); ++ ++#ifdef CONFIG_AP_MODE ++ _rtw_spinlock_free(&pstapriv->asoc_list_lock); ++ _rtw_spinlock_free(&pstapriv->auth_list_lock); ++#endif ++ ++} ++ ++u32 _rtw_free_sta_priv(struct sta_priv *pstapriv) ++{ ++_func_enter_; ++ if(pstapriv){ ++ rtw_mfree_sta_priv_lock(pstapriv); ++ ++ if(pstapriv->pallocated_stainfo_buf) { ++ rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info)*NUM_STA+4); ++ } ++ } ++ ++_func_exit_; ++ return _SUCCESS; ++} ++ ++ ++//struct sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) ++struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) ++{ ++ _irqL irqL, irqL2; ++ uint tmp_aid; ++ s32 index; ++ _list *phash_list; ++ struct sta_info *psta; ++ _queue *pfree_sta_queue; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ int i = 0; ++ u16 wRxSeqInitialValue = 0xffff; ++ ++_func_enter_; ++ ++ pfree_sta_queue = &pstapriv->free_sta_queue; ++ ++ _enter_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ ++ if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) ++ { ++ _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ psta = NULL; ++ } ++ else ++ { ++ psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list); ++ ++ rtw_list_delete(&(psta->list)); ++ ++ _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); ++ ++ tmp_aid = psta->aid; ++ ++ _rtw_init_stainfo(psta); ++ ++ _rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN); ++ ++ index = wifi_mac_hash(hwaddr); ++ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("rtw_alloc_stainfo: index = %x", index)); ++ ++ if(index >= NUM_STA){ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("ERROR=> rtw_alloc_stainfo: index >= NUM_STA")); ++ psta= NULL; ++ goto exit; ++ } ++ phash_list = &(pstapriv->sta_hash[index]); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++ rtw_list_insert_tail(&psta->hash_list, phash_list); ++ ++ pstapriv->asoc_sta_count ++ ; ++ ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); ++ ++// Commented by Albert 2009/08/13 ++// For the SMC router, the sequence number of first packet of WPS handshake will be 0. ++// In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable. ++// So, we initialize the tid_rxseq variable as the 0xffff. ++ ++ for( i = 0; i < 16; i++ ) ++ { ++ _rtw_memcpy( &psta->sta_recvpriv.rxcache.tid_rxseq[ i ], &wRxSeqInitialValue, 2 ); ++ } ++ ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_info_,("alloc number_%d stainfo with hwaddr = %x %x %x %x %x %x \n", ++ pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2],hwaddr[3],hwaddr[4],hwaddr[5])); ++ ++ init_addba_retry_timer(pstapriv->padapter, psta); ++ ++#ifdef CONFIG_TDLS ++ psta->padapter = pstapriv->padapter; ++ init_TPK_timer(pstapriv->padapter, psta); ++ init_ch_switch_timer(pstapriv->padapter, psta); ++ init_base_ch_timer(pstapriv->padapter, psta); ++ init_off_ch_timer(pstapriv->padapter, psta); ++ init_handshake_timer(pstapriv->padapter, psta); ++ init_tdls_alive_timer(pstapriv->padapter, psta); ++#endif ++ ++ //for A-MPDU Rx reordering buffer control ++ for(i=0; i < 16 ; i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ ++ preorder_ctrl->padapter = pstapriv->padapter; ++ ++ preorder_ctrl->enable = _FALSE; ++ ++ preorder_ctrl->indicate_seq = 0xffff; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq); ++ #endif ++ preorder_ctrl->wend_b= 0xffff; ++ //preorder_ctrl->wsize_b = (NR_RECVBUFF-2); ++ preorder_ctrl->wsize_b = 64;//64; ++ ++ _rtw_init_queue(&preorder_ctrl->pending_recvframe_queue); ++ ++ rtw_init_recv_timer(preorder_ctrl); ++ } ++ ++ ++ //init for DM ++ psta->rssi_stat.UndecoratedSmoothedPWDB = (-1); ++ psta->rssi_stat.UndecoratedSmoothedCCK = (-1); ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return psta; ++ ++ ++} ++ ++ ++// using pstapriv->sta_hash_lock to protect ++u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta) ++{ ++ int i; ++ _irqL irqL0; ++ _queue *pfree_sta_queue; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_xmit_priv *pstaxmitpriv; ++ struct xmit_priv *pxmitpriv= &padapter->xmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++_func_enter_; ++ ++ if (psta == NULL) ++ goto exit; ++ ++ pfree_sta_queue = &pstapriv->free_sta_queue; ++ ++ ++ pstaxmitpriv = &psta->sta_xmitpriv; ++ ++ //rtw_list_delete(&psta->sleep_list); ++ ++ //rtw_list_delete(&psta->wakeup_list); ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q); ++ psta->sleepq_len = 0; ++ ++ //_enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); ++ ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vo_q.sta_pending); ++ ++ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); ++ ++ //_exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); ++ ++ ++ //_enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); ++ ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->vi_q.sta_pending); ++ ++ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); ++ ++ //_exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); ++ ++ ++ //_enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); ++ ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->bk_q.sta_pending); ++ ++ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); ++ ++ //_exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); ++ ++ //_enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); ++ ++ rtw_free_xmitframe_queue( pxmitpriv, &pstaxmitpriv->be_q.sta_pending); ++ ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ ++ //_exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ rtw_list_delete(&psta->hash_list); ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("\n free number_%d stainfo with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x \n",pstapriv->asoc_sta_count , psta->hwaddr[0], psta->hwaddr[1], psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5])); ++ pstapriv->asoc_sta_count --; ++ ++ ++ // re-init sta_info; 20061114 ++ _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); ++ _rtw_init_sta_recv_priv(&psta->sta_recvpriv); ++ ++ _cancel_timer_ex(&psta->addba_retry_timer); ++ ++#ifdef CONFIG_TDLS ++ _cancel_timer_ex(&psta->TPK_timer); ++ _cancel_timer_ex(&psta->option_timer); ++ _cancel_timer_ex(&psta->base_ch_timer); ++ _cancel_timer_ex(&psta->off_ch_timer); ++ _cancel_timer_ex(&psta->alive_timer1); ++ _cancel_timer_ex(&psta->alive_timer2); ++#endif ++ ++ //for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer ++ for(i=0; i < 16 ; i++) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ union recv_frame *prframe; ++ _queue *ppending_recvframe_queue; ++ _queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ ++ _cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer); ++ ++ ++ ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue; ++ ++ _enter_critical_bh(&ppending_recvframe_queue->lock, &irqL); ++ ++ phead = get_list_head(ppending_recvframe_queue); ++ plist = get_next(phead); ++ ++ while(!rtw_is_list_empty(phead)) ++ { ++ prframe = LIST_CONTAINOR(plist, union recv_frame, u); ++ ++ plist = get_next(plist); ++ ++ rtw_list_delete(&(prframe->u.hdr.list)); ++ ++ rtw_free_recvframe(prframe, pfree_recv_queue); ++ } ++ ++ _exit_critical_bh(&ppending_recvframe_queue->lock, &irqL); ++ ++ } ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++/* ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0); ++ rtw_list_delete(&psta->asoc_list); ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0); ++*/ ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL0); ++ rtw_list_delete(&psta->auth_list); ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL0); ++ ++ psta->expire_to = 0; ++ ++ psta->sleepq_ac_len = 0; ++ psta->qos_info = 0; ++ ++ psta->max_sp_len = 0; ++ psta->uapsd_bk = 0; ++ psta->uapsd_be = 0; ++ psta->uapsd_vi = 0; ++ psta->uapsd_vo = 0; ++ ++ psta->has_legacy_ac = 0; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++ pstapriv->sta_dz_bitmap &=~BIT(psta->aid); ++ pstapriv->tim_bitmap &=~BIT(psta->aid); ++ ++ //rtw_indicate_sta_disassoc_event(padapter, psta); ++ ++ if (pstapriv->sta_aid[psta->aid - 1] == psta) ++ { ++ pstapriv->sta_aid[psta->aid - 1] = NULL; ++ psta->aid = 0; ++ } ++ ++#endif // CONFIG_NATIVEAP_MLME ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++#endif // CONFIG_AP_MODE ++ ++ _enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); ++ rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue)); ++ _exit_critical_bh(&(pfree_sta_queue->lock), &irqL0); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++// free all stainfo which in sta_hash[all] ++void rtw_free_all_stainfo(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ s32 index; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info* pbcmc_stainfo =rtw_get_bcmc_stainfo( padapter); ++ ++_func_enter_; ++ ++ if(pstapriv->asoc_sta_count==1) ++ goto exit; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(index=0; index< NUM_STA; index++) ++ { ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info ,hash_list); ++ ++ plist = get_next(plist); ++ ++ if(pbcmc_stainfo!=psta) ++ rtw_free_stainfo(padapter , psta); ++ ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++/* any station allocated can be searched by hash list */ ++struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr) ++{ ++ ++ _irqL irqL; ++ ++ _list *plist, *phead; ++ ++ struct sta_info *psta = NULL; ++ ++ u32 index; ++ ++ u8 *addr; ++ ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++_func_enter_; ++ ++ if(hwaddr==NULL) ++ return NULL; ++ ++ if(IS_MCAST(hwaddr)) ++ { ++ addr = bc_addr; ++ } ++ else ++ { ++ addr = hwaddr; ++ } ++ ++ index = wifi_mac_hash(addr); ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ phead = &(pstapriv->sta_hash[index]); ++ plist = get_next(phead); ++ ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN))== _TRUE) ++ { // if found the matched address ++ break; ++ } ++ psta=NULL; ++ plist = get_next(plist); ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++_func_exit_; ++ return psta; ++ ++} ++ ++u32 rtw_init_bcmc_stainfo(_adapter* padapter) ++{ ++ ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ u32 res=_SUCCESS; ++ NDIS_802_11_MAC_ADDRESS bcast_addr= {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ //_queue *pstapending = &padapter->xmitpriv.bm_pending; ++ ++_func_enter_; ++ ++ psta = rtw_alloc_stainfo(pstapriv, bcast_addr); ++ ++ if(psta==NULL){ ++ res=_FAIL; ++ RT_TRACE(_module_rtl871x_sta_mgt_c_,_drv_err_,("rtw_alloc_stainfo fail")); ++ goto exit; ++ } ++ ++ // default broadcast & multicast use macid 1 ++ psta->mac_id = 1; ++ ++ ptxservq= &(psta->sta_xmitpriv.be_q); ++ ++/* ++ _enter_critical(&pstapending->lock, &irqL0); ++ ++ if (rtw_is_list_empty(&ptxservq->tx_pending)) ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending)); ++ ++ _exit_critical(&pstapending->lock, &irqL0); ++*/ ++ ++exit: ++_func_exit_; ++ return _SUCCESS; ++ ++} ++ ++ ++struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter) ++{ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++_func_enter_; ++ psta = rtw_get_stainfo(pstapriv, bc_addr); ++_func_exit_; ++ return psta; ++ ++} ++ ++u8 rtw_access_ctrl(struct wlan_acl_pool* pacl_list, u8 * mac_addr) ++{ ++ return _TRUE; ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_wlan_util.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_wlan_util.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1848 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTW_WLAN_UTIL_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++unsigned char ARTHEROS_OUI1[] = {0x00, 0x03, 0x7f}; ++unsigned char ARTHEROS_OUI2[] = {0x00, 0x13, 0x74}; ++ ++unsigned char BROADCOM_OUI1[] = {0x00, 0x10, 0x18}; ++unsigned char BROADCOM_OUI2[] = {0x00, 0x0a, 0xf7}; ++unsigned char BROADCOM_OUI3[] = {0x00, 0x05, 0xb5}; ++ ++unsigned char CISCO_OUI[] = {0x00, 0x40, 0x96}; ++unsigned char MARVELL_OUI[] = {0x00, 0x50, 0x43}; ++unsigned char RALINK_OUI[] = {0x00, 0x0c, 0x43}; ++unsigned char REALTEK_OUI[] = {0x00, 0xe0, 0x4c}; ++unsigned char AIRGOCAP_OUI[] = {0x00, 0x0a, 0xf5}; ++ ++unsigned char REALTEK_96B_IE[] = {0x00, 0xe0, 0x4c, 0x02, 0x01, 0x20}; ++ ++extern unsigned char MCS_rate_2R[16]; ++extern unsigned char MCS_rate_1R[16]; ++extern unsigned char WPA_OUI[]; ++extern unsigned char WPA_TKIP_CIPHER[4]; ++extern unsigned char RSN_TKIP_CIPHER[4]; ++ ++#define R2T_PHY_DELAY (0) ++ ++//#define WAIT_FOR_BCN_TO_MIN (3000) ++#define WAIT_FOR_BCN_TO_MIN (6000) ++#define WAIT_FOR_BCN_TO_MAX (20000) ++ ++ ++int cckrates_included(unsigned char *rate, int ratelen) ++{ ++ int i; ++ ++ for(i = 0; i < ratelen; i++) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ } ++ ++ return _FALSE; ++ ++} ++ ++int cckratesonly_included(unsigned char *rate, int ratelen) ++{ ++ int i; ++ ++ for(i = 0; i < ratelen; i++) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ return _FALSE; ++ } ++ ++ return _TRUE; ++} ++ ++unsigned char networktype_to_raid(unsigned char network_type) ++{ ++ unsigned char raid; ++ ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ raid = 6; ++ break; ++ case WIRELESS_11A: ++ case WIRELESS_11G: ++ raid = 5; ++ break; ++ case WIRELESS_11BG: ++ raid = 4; ++ break; ++ case WIRELESS_11_24N: ++ case WIRELESS_11_5N: ++ raid = 3; ++ break; ++ case WIRELESS_11A_5N: ++ case WIRELESS_11G_24N: ++ raid = 1; ++ break; ++ case WIRELESS_11BG_24N: ++ raid = 0; ++ break; ++ default: ++ raid = 4; ++ break; ++ ++ } ++ ++ return raid; ++ ++} ++ ++int judge_network_type(_adapter *padapter, unsigned char *rate, int ratelen) ++{ ++ int network_type = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if(pmlmeext->cur_channel > 14) ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_5N; ++ } ++ ++ network_type |= WIRELESS_11A; ++ } ++ else ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_24N; ++ } ++ ++ if ((cckratesonly_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11B; ++ } ++ else if((cckrates_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11BG; ++ } ++ else ++ { ++ network_type |= WIRELESS_11G; ++ } ++ } ++ ++ return network_type; ++} ++ ++unsigned char ratetbl_val_2wifirate(unsigned char rate) ++{ ++ unsigned char val = 0; ++ ++ switch (rate & 0x7f) ++ { ++ case 0: ++ val = IEEE80211_CCK_RATE_1MB; ++ break; ++ ++ case 1: ++ val = IEEE80211_CCK_RATE_2MB; ++ break; ++ ++ case 2: ++ val = IEEE80211_CCK_RATE_5MB; ++ break; ++ ++ case 3: ++ val = IEEE80211_CCK_RATE_11MB; ++ break; ++ ++ case 4: ++ val = IEEE80211_OFDM_RATE_6MB; ++ break; ++ ++ case 5: ++ val = IEEE80211_OFDM_RATE_9MB; ++ break; ++ ++ case 6: ++ val = IEEE80211_OFDM_RATE_12MB; ++ break; ++ ++ case 7: ++ val = IEEE80211_OFDM_RATE_18MB; ++ break; ++ ++ case 8: ++ val = IEEE80211_OFDM_RATE_24MB; ++ break; ++ ++ case 9: ++ val = IEEE80211_OFDM_RATE_36MB; ++ break; ++ ++ case 10: ++ val = IEEE80211_OFDM_RATE_48MB; ++ break; ++ ++ case 11: ++ val = IEEE80211_OFDM_RATE_54MB; ++ break; ++ ++ } ++ ++ return val; ++ ++} ++ ++int is_basicrate(_adapter *padapter, unsigned char rate) ++{ ++ int i; ++ unsigned char val; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ for(i = 0; i < NumRates; i++) ++ { ++ val = pmlmeext->basicrate[i]; ++ ++ if ((val != 0xff) && (val != 0xfe)) ++ { ++ if (rate == ratetbl_val_2wifirate(val)) ++ { ++ return _TRUE; ++ } ++ } ++ } ++ ++ return _FALSE; ++} ++ ++ ++unsigned int ratetbl2rateset(_adapter *padapter, unsigned char *rateset) ++{ ++ int i; ++ unsigned char rate; ++ unsigned int len = 0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ for (i = 0; i < NumRates; i++) ++ { ++ rate = pmlmeext->datarate[i]; ++ ++ switch (rate) ++ { ++ case 0xff: ++ return len; ++ ++ case 0xfe: ++ continue; ++ ++ default: ++ rate = ratetbl_val_2wifirate(rate); ++ ++ if (is_basicrate(padapter, rate) == _TRUE) ++ { ++ rate |= IEEE80211_BASIC_RATE_MASK; ++ } ++ ++ rateset[len] = rate; ++ len++; ++ break; ++ } ++ } ++ return len; ++} ++ ++ ++void get_rate_set(_adapter *padapter, unsigned char *pbssrate, int *bssrate_len) ++{ ++ unsigned char supportedrates[NumRates]; ++ ++ _rtw_memset(supportedrates, 0, NumRates); ++ *bssrate_len = ratetbl2rateset(padapter, supportedrates); ++ _rtw_memcpy(pbssrate, supportedrates, *bssrate_len); ++} ++ ++void Save_DM_Func_Flag(_adapter *padapter) ++{ ++ u8 bSaveFlag = _TRUE; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++} ++ ++void Restore_DM_Func_Flag(_adapter *padapter) ++{ ++ u8 bSaveFlag = _FALSE; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_OP, (u8 *)(&bSaveFlag)); ++} ++ ++void Switch_DM_Func(_adapter *padapter, u8 mode, u8 enable) ++{ ++ if(enable == _TRUE) ++ { ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_SET, (u8 *)(&mode)); ++ } ++ else ++ { ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FUNC_CLR, (u8 *)(&mode)); ++ } ++ ++#if 0 ++ u8 val8; ++ ++ val8 = rtw_read8(padapter, FW_DYNAMIC_FUN_SWITCH); ++ ++ if(enable == _TRUE) ++ { ++ rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 | mode)); ++ } ++ else ++ { ++ rtw_write8(padapter, FW_DYNAMIC_FUN_SWITCH, (val8 & mode)); ++ } ++#endif ++ ++} ++ ++void Set_NETYPE1_MSR(_adapter *padapter, u8 type) ++{ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MEDIA_STATUS1, (u8 *)(&type)); ++} ++ ++void Set_NETYPE0_MSR(_adapter *padapter, u8 type) ++{ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MEDIA_STATUS, (u8 *)(&type)); ++} ++ ++void SelectChannel(_adapter *padapter, unsigned char channel) ++{ ++ unsigned int scanMode; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ scanMode = (pmlmeext->sitesurvey_res.scan_mode == SCAN_ACTIVE)? 1: 0;//todo: ++ ++ if(padapter->HalFunc.set_channel_handler) ++ padapter->HalFunc.set_channel_handler(padapter, channel); ++ ++} ++ ++void SetBWMode(_adapter *padapter, unsigned short bwmode, unsigned char channel_offset) ++{ ++ if(padapter->HalFunc.set_bwmode_handler) ++ padapter->HalFunc.set_bwmode_handler(padapter, (HT_CHANNEL_WIDTH)bwmode, channel_offset); ++} ++ ++void set_channel_bwmode(_adapter *padapter, unsigned char channel, unsigned char channel_offset, unsigned short bwmode) ++{ ++ if((bwmode == HT_CHANNEL_WIDTH_20)||(channel_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE)) ++ { ++ SelectChannel(padapter, channel); ++ } ++ else ++ { ++ //switch to the proper channel ++ if (channel_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ { ++ SelectChannel(padapter, channel + 2); ++ } ++ else ++ { ++ SelectChannel(padapter, channel - 2); ++ } ++ } ++ ++ ++ SetBWMode(padapter, bwmode, channel_offset); ++ ++} ++ ++int get_bsstype(unsigned short capability) ++{ ++ if (capability & BIT(0)) ++ { ++ return WIFI_FW_AP_STATE; ++ } ++ else if (capability & BIT(1)) ++ { ++ return WIFI_FW_ADHOC_STATE; ++ } ++ else ++ { ++ return 0; ++ } ++} ++ ++__inline u8 *get_my_bssid(WLAN_BSSID_EX *pnetwork) ++{ ++ return (pnetwork->MacAddress); ++} ++ ++u16 get_beacon_interval(WLAN_BSSID_EX *bss) ++{ ++ unsigned short val; ++ _rtw_memcpy((unsigned char *)&val, rtw_get_beacon_interval_from_ie(bss->IEs), 2); ++ ++ return le16_to_cpu(val); ++ ++} ++ ++int is_client_associated_to_ap(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_STATION_STATE)) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++int is_client_associated_to_ibss(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((pmlmeinfo->state & WIFI_FW_ASSOC_SUCCESS) && ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE)) ++ { ++ return _TRUE; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++int is_IBSS_empty(_adapter *padapter) ++{ ++ unsigned int i; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ for (i = IBSS_START_MAC_ID; i < NUM_STA; i++) ++ { ++ if (pmlmeinfo->FW_sta_info[i].status == 1) ++ { ++ return _FAIL; ++ } ++ } ++ ++ return _TRUE; ++ ++} ++ ++unsigned int decide_wait_for_beacon_timeout(unsigned int bcn_interval) ++{ ++ if ((bcn_interval << 2) < WAIT_FOR_BCN_TO_MIN) ++ { ++ return WAIT_FOR_BCN_TO_MIN; ++ } ++ else if ((bcn_interval << 2) > WAIT_FOR_BCN_TO_MAX) ++ { ++ return WAIT_FOR_BCN_TO_MAX; ++ } ++ else ++ { ++ return ((bcn_interval << 2)); ++ } ++} ++ ++void CAM_empty_entry( ++ PADAPTER Adapter, ++ u8 ucIndex ++) ++{ ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_CAM_EMPTY_ENTRY, (u8 *)(&ucIndex)); ++} ++ ++void invalidate_cam_all(_adapter *padapter) ++{ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_INVALID_ALL, 0); ++} ++ ++void write_cam(_adapter *padapter, u8 entry, u16 ctrl, u8 *mac, u8 *key) ++{ ++ unsigned int i, val, addr, cmd; ++ int j; ++ u32 cam_val[2]; ++ ++ addr = entry << 3; ++ ++ for (j = 5; j >= 0; j--) ++ { ++ switch (j) ++ { ++ case 0: ++ val = (ctrl | (mac[0] << 16) | (mac[1] << 24) ); ++ break; ++ ++ case 1: ++ val = (mac[2] | ( mac[3] << 8) | (mac[4] << 16) | (mac[5] << 24)); ++ break; ++ ++ default: ++ i = (j - 2) << 2; ++ val = (key[i] | (key[i+1] << 8) | (key[i+2] << 16) | (key[i+3] << 24)); ++ break; ++ ++ } ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)j; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++ ++ //rtw_write32(padapter, WCAMI, val); ++ ++ //cmd = CAM_POLLINIG | CAM_WRITE | (addr + j); ++ //rtw_write32(padapter, RWCAM, cmd); ++ ++ //DBG_8192C("%s=> cam write: %x, %x\n",__FUNCTION__, cmd, val); ++ ++ } ++ ++} ++ ++void clear_cam_entry(_adapter *padapter, u8 entry) ++{ ++#if 0 ++ u32 addr, val=0; ++ u32 cam_val[2]; ++ ++ addr = entry << 3; ++ ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)0; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++ ++ ++ ++ cam_val[0] = val; ++ cam_val[1] = addr + (unsigned int)1; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_WRITE, (u8 *)cam_val); ++#else ++ ++ unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ ++ unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00}; ++ ++ write_cam(padapter, entry, 0, null_sta, null_key); ++ ++#endif ++} ++ ++int allocate_fw_sta_entry(_adapter *padapter) ++{ ++ unsigned int mac_id; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ for (mac_id = IBSS_START_MAC_ID; mac_id < NUM_STA; mac_id++) ++ { ++ if (pmlmeinfo->FW_sta_info[mac_id].status == 0) ++ { ++ pmlmeinfo->FW_sta_info[mac_id].status = 1; ++ pmlmeinfo->FW_sta_info[mac_id].retry = 0; ++ break; ++ } ++ } ++ ++ return mac_id; ++} ++ ++void flush_all_cam_entry(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++#if 0 ++ unsigned char null_sta[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; ++ unsigned char null_key[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00,0x00, 0x00, 0x00, 0x00}; ++ ++ for (i = 0; i < NUM_STA; i++) ++ { ++ write_cam(padapter, i, 0, null_sta, null_key); ++ } ++#else ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CAM_INVALID_ALL, 0); ++#endif ++ _rtw_memset((u8 *)(pmlmeinfo->FW_sta_info), 0, sizeof(pmlmeinfo->FW_sta_info)); ++} ++ ++#ifdef CONFIG_WFD ++int WFD_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct wifidirect_info *pwdinfo; ++ u8 wfd_ie[ 128 ] = { 0x00 }; ++ u32 wfd_ielen = 0; ++ ++ ++ pwdinfo = &padapter->wdinfo; ++ if ( rtw_get_wfd_ie( ( u8* ) pIE, pIE->Length, wfd_ie, &wfd_ielen ) ) ++ { ++ u8 attr_content[ 10 ] = { 0x00 }; ++ u32 attr_contentlen = 0; ++ ++ printk( "[%s] Found WFD IE\n", __FUNCTION__ ); ++ rtw_get_wfd_attr_content( wfd_ie, wfd_ielen, WFD_ATTR_DEVICE_INFO, attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ pwdinfo->wfd_info.peer_rtsp_ctrlport = RTW_GET_BE16( attr_content + 2 ); ++ DBG_8192C( "[%s] Peer PORT NUM = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ return( _TRUE ); ++ } ++ } ++ else ++ { ++ printk( "[%s] NO WFD IE\n", __FUNCTION__ ); ++ ++ } ++ return( _FAIL ); ++} ++#endif ++ ++int WMM_param_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pmlmepriv->qospriv.qos_option==0) ++ { ++ pmlmeinfo->WMM_enable = 0; ++ return _FAIL; ++ } ++ ++ pmlmeinfo->WMM_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); ++ return _TRUE; ++ ++ /*if (pregpriv->wifi_spec == 1) ++ { ++ if (pmlmeinfo->WMM_enable == 1) ++ { ++ //todo: compare the parameter set count & decide wheher to update or not ++ return _FAIL; ++ } ++ else ++ { ++ pmlmeinfo->WMM_enable = 1; ++ _rtw_rtw_memcpy(&(pmlmeinfo->WMM_param), (pIE->data + 6), sizeof(struct WMM_para_element)); ++ return _TRUE; ++ } ++ } ++ else ++ { ++ pmlmeinfo->WMM_enable = 0; ++ return _FAIL; ++ }*/ ++ ++} ++ ++void WMMOnAssocRsp(_adapter *padapter) ++{ ++ u8 ACI, ACM, AIFS, ECWMin, ECWMax, aSifsTime; ++ u8 acm_mask; ++ u16 TXOP; ++ u32 acParm, i; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (pmlmeinfo->WMM_enable == 0) ++ { ++ padapter->mlmepriv.acm_mask = 0; ++ return; ++ } ++ ++ acm_mask = 0; ++ ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ for (i = 0; i < 4; i++) ++ { ++ ACI = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 5) & 0x03; ++ ACM = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN >> 4) & 0x01; ++ ++ //AIFS = AIFSN * slot time + SIFS - r2t phy delay ++ AIFS = (pmlmeinfo->WMM_param.ac_param[i].ACI_AIFSN & 0x0f) * pmlmeinfo->slotTime + aSifsTime; ++ ++ ECWMin = (pmlmeinfo->WMM_param.ac_param[i].CW & 0x0f); ++ ECWMax = (pmlmeinfo->WMM_param.ac_param[i].CW & 0xf0) >> 4; ++ TXOP = le16_to_cpu(pmlmeinfo->WMM_param.ac_param[i].TXOP_limit); ++ ++ acParm = AIFS | (ECWMin << 8) | (ECWMax << 12) | (TXOP << 16); ++ ++ switch (ACI) ++ { ++ case 0x0: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(1):0); ++ break; ++ ++ case 0x1: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acParm)); ++ //acm_mask |= (ACM? BIT(0):0); ++ break; ++ ++ case 0x2: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(2):0); ++ break; ++ ++ case 0x3: ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acParm)); ++ acm_mask |= (ACM? BIT(3):0); ++ break; ++ } ++ ++ DBG_871X("WMM(%x): %x, %x\n", ACI, ACM, acParm); ++ } ++ ++ if(padapter->registrypriv.acm_method == 1) ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ACM_CTRL, (u8 *)(&acm_mask)); ++ else ++ padapter->mlmepriv.acm_mask = acm_mask; ++ ++ return; ++} ++ ++static void bwmode_update_check(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ unsigned char new_bwmode; ++ unsigned char new_ch_offset; ++ struct HT_info_element *pHT_info; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if(!pIE) ++ return; ++ ++ pHT_info = (struct HT_info_element *)pIE->data; ++ ++ if(pHT_info->infos[0] & BIT(2)) ++ { ++ new_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pHT_info->infos[0] & 0x3) ++ { ++ case 1: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ } ++ else ++ { ++ new_bwmode = HT_CHANNEL_WIDTH_20; ++ new_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ ++ if((new_bwmode!= pmlmeext->cur_bwmode) || (new_ch_offset!=pmlmeext->cur_ch_offset)) ++ { ++ pmlmeinfo->bwmode_updated = _TRUE; ++ ++ pmlmeext->cur_bwmode = new_bwmode; ++ pmlmeext->cur_ch_offset = new_ch_offset; ++ } ++ else ++ { ++ pmlmeinfo->bwmode_updated = _FALSE; ++ } ++ ++ ++ if(_TRUE == pmlmeinfo->bwmode_updated) ++ { ++ struct sta_info *psta; ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ ++ //update ap's stainfo ++ psta = rtw_get_stainfo(pstapriv, cur_network->MacAddress); ++ if(psta) ++ { ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++ ++ if(phtpriv_sta->ht_option) ++ { ++ // bwmode ++ phtpriv_sta->bwmode = pmlmeext->cur_bwmode; ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ } ++ else ++ { ++ phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ } ++ ++ //pmlmeinfo->bwmode_updated = _FALSE;//bwmode_updated done, reset it! ++ ++ } ++ ++} ++ ++void HT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ unsigned int i; ++ u8 rf_type; ++ u8 max_AMPDU_len, min_MPDU_spacing; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++ if(pIE==NULL) return; ++ ++ if(phtpriv->ht_option == _FALSE) return; ++ ++ pmlmeinfo->HT_caps_enable = 1; ++ ++ for (i = 0; i < (pIE->Length); i++) ++ { ++ if (i != 2) ++ { ++ // Commented by Albert 2010/07/12 ++ // Got the endian issue here. ++ pmlmeinfo->HT_caps.HT_cap[i] &= (pIE->data[i]); ++ } ++ else ++ { ++ //modify from fw by Thomas 2010/11/17 ++ if ((pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x3) > (pIE->data[i] & 0x3)) ++ { ++ max_AMPDU_len = (pIE->data[i] & 0x3); ++ } ++ else ++ { ++ max_AMPDU_len = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x3); ++ } ++ ++ if ((pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) > (pIE->data[i] & 0x1c)) ++ { ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c); ++ } ++ else ++ { ++ min_MPDU_spacing = (pIE->data[i] & 0x1c); ++ } ++ ++ pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para = max_AMPDU_len | min_MPDU_spacing; ++ } ++ } ++ ++ // Commented by Albert 2010/07/12 ++ // Have to handle the endian issue after copying. ++ // HT_ext_caps didn't be used yet. ++ pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info = le16_to_cpu( pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info ); ++ pmlmeinfo->HT_caps.HT_cap_element.HT_ext_caps = le16_to_cpu( pmlmeinfo->HT_caps.HT_cap_element.HT_ext_caps ); ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ if((rf_type == RF_1T1R) || (rf_type == RF_1T2R)) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ else ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_2R[i]; ++ } ++ #ifdef RTL8192C_RECONFIG_TO_1T1R ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ } ++ #endif ++ } ++ ++ return; ++} ++ ++void HT_info_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ ++ if(pIE==NULL) return; ++ ++ if(phtpriv->ht_option == _FALSE) return; ++ ++ ++ if(pIE->Length > sizeof(struct HT_info_element)) ++ return; ++ ++ pmlmeinfo->HT_info_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->HT_info), pIE->data, pIE->Length); ++ ++ return; ++} ++ ++void HTOnAssocRsp(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ //struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ //WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) ++ { ++ pmlmeinfo->HT_enable = 1; ++ } ++ else ++ { ++ pmlmeinfo->HT_enable = 0; ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ return; ++ } ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++#if 0 //move to rtw_update_ht_cap() ++ if ((pregpriv->cbw40_enable) && ++ (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & BIT(1)) && ++ (pmlmeinfo->HT_info.infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode accoring to the AP ++ pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch ((pmlmeinfo->HT_info.infos[0] & 0x3)) ++ { ++ case HT_EXTCHNL_OFFSET_UPPER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case HT_EXTCHNL_OFFSET_LOWER: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ //SelectChannel(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset); ++ } ++#endif ++ ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++#if 0 //move to rtw_update_ht_cap() ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_8192C("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++#endif ++ ++} ++ ++void ERP_IE_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pIE->Length>1) ++ return; ++ ++ pmlmeinfo->ERP_enable = 1; ++ _rtw_memcpy(&(pmlmeinfo->ERP_IE), pIE->data, pIE->Length); ++} ++ ++void VCS_update(_adapter *padapter, struct sta_info *psta) ++{ ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ switch (pregpriv->vrtl_carrier_sense)/* 0:off 1:on 2:auto */ ++ { ++ case 0: //off ++ psta->rtsen = 0; ++ psta->cts2self = 0; ++ break; ++ ++ case 1: //on ++ if (pregpriv->vcs_type == 1) /* 1:RTS/CTS 2:CTS to self */ ++ { ++ psta->rtsen = 1; ++ psta->cts2self = 0; ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 1; ++ } ++ break; ++ ++ case 2: //auto ++ default: ++ if ((pmlmeinfo->ERP_enable) && (pmlmeinfo->ERP_IE & BIT(1))) ++ { ++ if (pregpriv->vcs_type == 1) ++ { ++ psta->rtsen = 1; ++ psta->cts2self = 0; ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 1; ++ } ++ } ++ else ++ { ++ psta->rtsen = 0; ++ psta->cts2self = 0; ++ } ++ break; ++ } ++} ++ ++void update_beacon_info(_adapter *padapter, u8 *pframe, uint pkt_len, struct sta_info *psta) ++{ ++ unsigned int i; ++ unsigned int len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 tdls_prohibited[] = { 0x00, 0x00, 0x00, 0x00, 0x10 }; //bit(38): TDLS_prohibited ++#endif ++ ++ len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); ++ ++ for (i = 0; i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); ++ ++ switch (pIE->ElementID) ++ { ++#if 0 ++ case _VENDOR_SPECIFIC_IE_: ++ //todo: to update WMM paramter set while receiving beacon ++ if (_rtw_memcmp(pIE->data, WMM_PARA_OUI, 6)) //WMM ++ { ++ (WMM_param_handler(padapter, pIE))? WMMOnAssocRsp(padapter): 0; ++ } ++ break; ++#endif ++ ++ case _HT_EXTRA_INFO_IE_: //HT info ++ //HT_info_handler(padapter, pIE); ++ bwmode_update_check(padapter, pIE); ++ break; ++ ++ case _ERPINFO_IE_: ++ ERP_IE_handler(padapter, pIE); ++ VCS_update(padapter, psta); ++ break; ++ ++#ifdef CONFIG_TDLS ++ case _EXT_CAP_IE_: ++ if( _rtw_memcmp(pIE->data, tdls_prohibited, 5) == _TRUE ) ++ ptdlsinfo->ap_prohibited = _TRUE; ++ break; ++#endif ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++} ++ ++#ifdef CONFIG_DFS ++void process_csa_ie(_adapter *padapter, u8 *pframe, uint pkt_len) ++{ ++ unsigned int i; ++ unsigned int len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 new_ch_no = 0; ++ ++ len = pkt_len - (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN); ++ ++ for (i = 0; i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + (_BEACON_IE_OFFSET_ + WLAN_HDR_A3_LEN) + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _CH_SWTICH_ANNOUNCE_: ++ _rtw_memcpy(&new_ch_no, pIE->data+1, 1); ++ rtw_set_csa_cmd(padapter, new_ch_no); ++ break; ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++} ++#endif //CONFIG_DFS ++ ++unsigned int is_ap_in_tkip(_adapter *padapter) ++{ ++ u32 i; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ if (rtw_get_capability((WLAN_BSSID_EX *)cur_network) & WLAN_CAPABILITY_PRIVACY) ++ { ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pmlmeinfo->network.IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pmlmeinfo->network.IEs + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, WPA_OUI, 4)) && (_rtw_memcmp((pIE->data + 12), WPA_TKIP_CIPHER, 4))) ++ { ++ return _TRUE; ++ } ++ break; ++ ++ case _RSN_IE_2_: ++ if (_rtw_memcmp((pIE->data + 8), RSN_TKIP_CIPHER, 4)) ++ { ++ return _TRUE; ++ } ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return _FALSE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++ ++} ++ ++int wifirate2_ratetbl_inx(unsigned char rate) ++{ ++ int inx = 0; ++ rate = rate & 0x7f; ++ ++ switch (rate) ++ { ++ case 54*2: ++ inx = 11; ++ break; ++ ++ case 48*2: ++ inx = 10; ++ break; ++ ++ case 36*2: ++ inx = 9; ++ break; ++ ++ case 24*2: ++ inx = 8; ++ break; ++ ++ case 18*2: ++ inx = 7; ++ break; ++ ++ case 12*2: ++ inx = 6; ++ break; ++ ++ case 9*2: ++ inx = 5; ++ break; ++ ++ case 6*2: ++ inx = 4; ++ break; ++ ++ case 11*2: ++ inx = 3; ++ break; ++ case 11: ++ inx = 2; ++ break; ++ ++ case 2*2: ++ inx = 1; ++ break; ++ ++ case 1*2: ++ inx = 0; ++ break; ++ ++ } ++ return inx; ++} ++ ++unsigned int update_basic_rate(unsigned char *ptn, unsigned int ptn_sz) ++{ ++ unsigned int i, num_of_rate; ++ unsigned int mask = 0; ++ ++ num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; ++ ++ for (i = 0; i < num_of_rate; i++) ++ { ++ if ((*(ptn + i)) & 0x80) ++ { ++ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); ++ } ++ } ++ return mask; ++} ++ ++unsigned int update_supported_rate(unsigned char *ptn, unsigned int ptn_sz) ++{ ++ unsigned int i, num_of_rate; ++ unsigned int mask = 0; ++ ++ num_of_rate = (ptn_sz > NumRates)? NumRates: ptn_sz; ++ ++ for (i = 0; i < num_of_rate; i++) ++ { ++ mask |= 0x1 << wifirate2_ratetbl_inx(*(ptn + i)); ++ } ++ ++ return mask; ++} ++ ++unsigned int update_MSC_rate(struct HT_caps_element *pHT_caps) ++{ ++ unsigned int mask = 0; ++ ++ mask = ((pHT_caps->HT_cap_element.MCS_rate[0] << 12) | (pHT_caps->HT_cap_element.MCS_rate[1] << 20)); ++ ++ return mask; ++} ++ ++int support_short_GI(_adapter *padapter, struct HT_caps_element *pHT_caps) ++{ ++ unsigned char bit_offset; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if (!(pmlmeinfo->HT_enable)) ++ return _FAIL; ++ ++ if ((pmlmeinfo->assoc_AP_vendor == ralinkAP)) ++ return _FAIL; ++ ++ bit_offset = (pmlmeext->cur_bwmode & HT_CHANNEL_WIDTH_40)? 6: 5; ++ ++ if (pHT_caps->HT_cap_element.HT_caps_info & (0x1 << bit_offset)) ++ { ++ return _SUCCESS; ++ } ++ else ++ { ++ return _FAIL; ++ } ++} ++ ++unsigned char get_highest_rate_idx(u32 mask) ++{ ++ int i; ++ unsigned char rate_idx=0; ++ ++ for(i=27; i>=0; i--) ++ { ++ if(mask & BIT(i)) ++ { ++ rate_idx = i; ++ break; ++ } ++ } ++ ++ return rate_idx; ++} ++ ++unsigned char get_highest_mcs_rate(struct HT_caps_element *pHT_caps) ++{ ++ int i, mcs_rate; ++ ++ mcs_rate = (pHT_caps->HT_cap_element.MCS_rate[0] | (pHT_caps->HT_cap_element.MCS_rate[1] << 8)); ++ ++ for (i = 15; i >= 0; i--) ++ { ++ if (mcs_rate & (0x1 << i)) ++ { ++ break; ++ } ++ } ++ ++ return i; ++} ++ ++void Update_RA_Entry(_adapter *padapter, u32 mac_id) ++{ ++ padapter->HalFunc.UpdateRAMaskHandler(padapter, mac_id); ++} ++ ++void enable_rate_adaptive(_adapter *padapter, u32 mac_id) ++{ ++ Update_RA_Entry(padapter, mac_id); ++} ++ ++void set_sta_rate(_adapter *padapter, struct sta_info *psta) ++{ ++ //rate adaptive ++ enable_rate_adaptive(padapter, psta->mac_id); ++} ++ ++unsigned char check_assoc_AP(u8 *pframe, uint len) ++{ ++ unsigned int i; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < len;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pframe + i); ++ ++ switch (pIE->ElementID) ++ { ++ case _VENDOR_SPECIFIC_IE_: ++ if ((_rtw_memcmp(pIE->data, ARTHEROS_OUI1, 3)) || (_rtw_memcmp(pIE->data, ARTHEROS_OUI2, 3))) ++ { ++ DBG_871X("link to Artheros AP\n"); ++ return atherosAP; ++ } ++ else if ((_rtw_memcmp(pIE->data, BROADCOM_OUI1, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3)) ++ || (_rtw_memcmp(pIE->data, BROADCOM_OUI2, 3))) ++ { ++ DBG_871X("link to Broadcom AP\n"); ++ return broadcomAP; ++ } ++ else if (_rtw_memcmp(pIE->data, MARVELL_OUI, 3)) ++ { ++ DBG_871X("link to Marvell AP\n"); ++ return marvellAP; ++ } ++ else if (_rtw_memcmp(pIE->data, RALINK_OUI, 3)) ++ { ++ DBG_871X("link to Ralink AP\n"); ++ return ralinkAP; ++ } ++ else if (_rtw_memcmp(pIE->data, CISCO_OUI, 3)) ++ { ++ DBG_871X("link to Cisco AP\n"); ++ return ciscoAP; ++ } ++ else if (_rtw_memcmp(pIE->data, REALTEK_OUI, 3)) ++ { ++ DBG_871X("link to Realtek 96B\n"); ++ return realtekAP; ++ } ++ else if (_rtw_memcmp(pIE->data, AIRGOCAP_OUI,3)) ++ { ++ DBG_871X("link to Airgo Cap\n"); ++ return airgocapAP; ++ } ++ else ++ { ++ break; ++ } ++ ++ default: ++ break; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ DBG_871X("link to new AP\n"); ++ return unknownAP; ++} ++ ++void update_IOT_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ switch (pmlmeinfo->assoc_AP_vendor) ++ { ++ case marvellAP: ++ pmlmeinfo->turboMode_cts2self = 1; ++ pmlmeinfo->turboMode_rtsen = 0; ++ break; ++ ++ case ralinkAP: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ //disable high power ++ Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE); ++ break; ++ case realtekAP: ++ //rtw_write16(padapter, 0x4cc, 0xffff); ++ //rtw_write16(padapter, 0x546, 0x01c0); ++ //disable high power ++ Switch_DM_Func(padapter, (~DYNAMIC_FUNC_HP), _FALSE); ++ break; ++ default: ++ pmlmeinfo->turboMode_cts2self = 0; ++ pmlmeinfo->turboMode_rtsen = 1; ++ break; ++ } ++ ++} ++ ++void update_capinfo(PADAPTER Adapter, u16 updateCap) ++{ ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ BOOLEAN ShortPreamble; ++ ++ // Check preamble mode, 2005.01.06, by rcnjko. ++ // Mark to update preamble value forever, 2008.03.18 by lanhsin ++ //if( pMgntInfo->RegPreambleMode == PREAMBLE_AUTO ) ++ { ++ ++ if(updateCap & cShortPreamble) ++ { // Short Preamble ++ if(pmlmeinfo->preamble_mode != PREAMBLE_SHORT) // PREAMBLE_LONG or PREAMBLE_AUTO ++ { ++ ShortPreamble = _TRUE; ++ pmlmeinfo->preamble_mode = PREAMBLE_SHORT; ++ Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); ++ } ++ } ++ else ++ { // Long Preamble ++ if(pmlmeinfo->preamble_mode != PREAMBLE_LONG) // PREAMBLE_SHORT or PREAMBLE_AUTO ++ { ++ ShortPreamble = _FALSE; ++ pmlmeinfo->preamble_mode = PREAMBLE_LONG; ++ Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_ACK_PREAMBLE, (u8 *)&ShortPreamble ); ++ } ++ } ++ } ++ ++ if ( updateCap & cIBSS ) { ++ //Filen: See 802.11-2007 p.91 ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ else ++ { ++ //Filen: See 802.11-2007 p.90 ++ if( pmlmeext->cur_wireless_mode & (WIRELESS_11G | WIRELESS_11_24N)) ++ { ++ if( (updateCap & cShortSlotTime) /* && (!(pMgntInfo->pHTInfo->RT2RT_HT_Mode & RT_HT_CAP_USE_LONG_PREAMBLE)) */) ++ { // Short Slot Time ++ if(pmlmeinfo->slotTime != SHORT_SLOT_TIME) ++ { ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ } ++ } ++ else ++ { // Long Slot Time ++ if(pmlmeinfo->slotTime != NON_SHORT_SLOT_TIME) ++ { ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ } ++ } ++ else if( pmlmeext->cur_wireless_mode & (WIRELESS_11A | WIRELESS_11_5N)) ++ { ++ pmlmeinfo->slotTime = SHORT_SLOT_TIME; ++ } ++ else ++ { ++ //B Mode ++ pmlmeinfo->slotTime = NON_SHORT_SLOT_TIME; ++ } ++ } ++ ++ Adapter->HalFunc.SetHwRegHandler( Adapter, HW_VAR_SLOT_TIME, &pmlmeinfo->slotTime ); ++ ++} ++ ++void update_wireless_mode(_adapter *padapter) ++{ ++ int ratelen, network_type = 0; ++ u16 SIFS_Timer; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ unsigned char *rate = cur_network->SupportedRates; ++ ++ ratelen = rtw_get_rateset_len(cur_network->SupportedRates); ++ ++ if ((pmlmeinfo->HT_info_enable) && (pmlmeinfo->HT_caps_enable)) ++ { ++ pmlmeinfo->HT_enable = 1; ++ } ++ ++ if(pmlmeext->cur_channel > 14) ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_5N; ++ } ++ ++ network_type |= WIRELESS_11A; ++ } ++ else ++ { ++ if (pmlmeinfo->HT_enable) ++ { ++ network_type = WIRELESS_11_24N; ++ } ++ ++ if ((cckratesonly_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11B; ++ } ++ else if((cckrates_included(rate, ratelen)) == _TRUE) ++ { ++ network_type |= WIRELESS_11BG; ++ } ++ else ++ { ++ network_type |= WIRELESS_11G; ++ } ++ } ++ ++ pmlmeext->cur_wireless_mode = network_type & padapter->registrypriv.wireless_mode; ++ if((pmlmeext->cur_wireless_mode==WIRELESS_11G) || ++ (pmlmeext->cur_wireless_mode==WIRELESS_11BG))//WIRELESS_MODE_G) ++ SIFS_Timer = 0x0a0a; ++ else ++ SIFS_Timer = 0x0e0e;//pHalData->SifsTime; ++ padapter->HalFunc.SetHwRegHandler( padapter, HW_VAR_SIFS, (u8 *)&SIFS_Timer); ++ ++} ++ ++ ++void fire_write_MAC_cmd(_adapter *padapter, unsigned int addr, unsigned int value) ++{ ++#if 0 ++ struct cmd_obj *ph2c; ++ struct reg_rw_parm *pwriteMacPara; ++ struct cmd_priv *pcmdpriv = &(padapter->cmdpriv); ++ ++ if ((ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj))) == NULL) ++ { ++ return; ++ } ++ ++ if ((pwriteMacPara = (struct reg_rw_parm*)rtw_malloc(sizeof(struct reg_rw_parm))) == NULL) ++ { ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ return; ++ } ++ ++ pwriteMacPara->rw = 1; ++ pwriteMacPara->addr = addr; ++ pwriteMacPara->value = value; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pwriteMacPara, GEN_CMD_CODE(_Write_MACREG)); ++ rtw_enqueue_cmd(pcmdpriv, ph2c); ++#endif ++} ++ ++u8 bmc_support_rate_ofdm[4] = ++ {IEEE80211_OFDM_RATE_6MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_12MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_OFDM_RATE_18MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_OFDM_RATE_24MB|IEEE80211_BASIC_RATE_MASK}; ++u8 bmc_support_rate_cck[4] = ++ {IEEE80211_CCK_RATE_1MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_2MB|IEEE80211_BASIC_RATE_MASK, ++ IEEE80211_CCK_RATE_5MB|IEEE80211_BASIC_RATE_MASK, IEEE80211_CCK_RATE_11MB|IEEE80211_BASIC_RATE_MASK}; ++ ++void update_bmc_sta_support_rate(_adapter *padapter, u32 mac_id) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ { ++ // Only B, B/G, and B/G/N AP could use CCK rate ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), bmc_support_rate_cck, 4); ++ } ++ else ++ { ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[mac_id].SupportedRates), bmc_support_rate_ofdm, 4); ++ } ++} ++ ++int update_sta_support_rate(_adapter *padapter, u8* pvar_ie, uint var_ie_len, int cam_idx) ++{ ++ unsigned int ie_len; ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ int supportRateNum = 0; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _SUPPORTEDRATES_IE_, &ie_len, var_ie_len); ++ if (pIE == NULL) ++ { ++ return _FAIL; ++ } ++ ++ _rtw_memcpy(pmlmeinfo->FW_sta_info[cam_idx].SupportedRates, pIE->data, ie_len); ++ supportRateNum = ie_len; ++ ++ pIE = (PNDIS_802_11_VARIABLE_IEs)rtw_get_ie(pvar_ie, _EXT_SUPPORTEDRATES_IE_, &ie_len, var_ie_len); ++ if (pIE) ++ { ++ _rtw_memcpy((pmlmeinfo->FW_sta_info[cam_idx].SupportedRates + supportRateNum), pIE->data, ie_len); ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr) ++{ ++ struct sta_info *psta; ++ u16 tid, start_seq, param; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct ADDBA_request *preq = (struct ADDBA_request*)paddba_req; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ psta = rtw_get_stainfo(pstapriv, addr); ++ ++ if(psta) ++ { ++ start_seq = le16_to_cpu(preq->BA_starting_seqctrl) >> 4; ++ ++ param = le16_to_cpu(preq->BA_para_set); ++ tid = (param>>2)&0x0f; ++ ++ preorder_ctrl = &psta->recvreorder_ctrl[tid]; ++ ++ #ifdef CONFIG_UPDATE_INDICATE_SEQ_WHILE_PROCESS_ADDBA_REQ ++ preorder_ctrl->indicate_seq = start_seq; ++ #ifdef DBG_RX_SEQ ++ DBG_871X("DBG_RX_SEQ %s:%d IndicateSeq: %d, start_seq: %d\n", __FUNCTION__, __LINE__, ++ preorder_ctrl->indicate_seq, start_seq); ++ #endif ++ #else ++ preorder_ctrl->indicate_seq = 0xffff; ++ #endif ++ ++ preorder_ctrl->enable =(pmlmeinfo->bAcceptAddbaReq == _TRUE)? _TRUE :_FALSE; ++ } ++ ++} ++ ++void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len) ++{ ++ u8* pIE; ++ u32 *pbuf; ++ ++ pIE = pframe + sizeof(struct rtw_ieee80211_hdr_3addr); ++ pbuf = (u32*)pIE; ++ ++ pmlmeext->TSFValue = le32_to_cpu(*(pbuf+1)); ++ ++ pmlmeext->TSFValue = pmlmeext->TSFValue << 32; ++ ++ pmlmeext->TSFValue |= le32_to_cpu(*pbuf); ++} ++ ++void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext) ++{ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_CORRECT_TSF, 0); ++} ++ ++void beacon_timing_control(_adapter *padapter) ++{ ++ padapter->HalFunc.SetBeaconRelatedRegistersHandler(padapter); ++} ++ ++#if 0 ++unsigned int setup_beacon_frame(_adapter *padapter, unsigned char *beacon_frame) ++{ ++ unsigned short ATIMWindow; ++ unsigned char *pframe; ++ struct tx_desc *ptxdesc; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ unsigned int rate_len, len = 0; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ _rtw_memset(beacon_frame, 0, 256); ++ ++ pframe = beacon_frame + TXDESC_SIZE; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ len += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ len += 2; ++ ++ // capability info: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ len += 2; ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &len); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &len); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &len); ++ ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &len); ++ ++ //todo: ERP IE ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &len); ++ } ++ ++ if ((len + TXDESC_SIZE) > 256) ++ { ++ //DBG_8192C("marc: beacon frame too large\n"); ++ return 0; ++ } ++ ++ //fill the tx descriptor ++ ptxdesc = (struct tx_desc *)beacon_frame; ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(len & 0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000); //default = 32 bytes for TX Desc ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((0x10 << QSEL_SHT) & 0x00001f00); ++ ++ //offset 8 ++ ptxdesc->txdw2 |= cpu_to_le32(BMC); ++ ptxdesc->txdw2 |= cpu_to_le32(BK); ++ ++ //offset 16 ++ ptxdesc->txdw4 = 0x80000000; ++ ++ //offset 20 ++ ptxdesc->txdw5 = 0x00000000; //1M ++ ++ return (len + TXDESC_SIZE); ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_xmit.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_xmit.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,4277 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTW_XMIT_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_TDLS ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++#include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++ ++static u8 P802_1H_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0xf8 }; ++static u8 RFC1042_OUI[P80211_OUI_LEN] = { 0x00, 0x00, 0x00 }; ++ ++#ifdef CONFIG_TDLS ++extern unsigned char MCS_rate_2R[16]; ++extern unsigned char MCS_rate_1R[16]; ++#endif ++ ++static void _init_txservq(struct tx_servq *ptxservq) ++{ ++_func_enter_; ++ _rtw_init_listhead(&ptxservq->tx_pending); ++ _rtw_init_queue(&ptxservq->sta_pending); ++ ptxservq->qcnt = 0; ++_func_exit_; ++} ++ ++ ++void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv) ++{ ++ ++_func_enter_; ++ ++ _rtw_memset((unsigned char *)psta_xmitpriv, 0, sizeof (struct sta_xmit_priv)); ++ ++ _rtw_spinlock_init(&psta_xmitpriv->lock); ++ ++ //for(i = 0 ; i < MAX_NUMBLKS; i++) ++ // _init_txservq(&(psta_xmitpriv->blk_q[i])); ++ ++ _init_txservq(&psta_xmitpriv->be_q); ++ _init_txservq(&psta_xmitpriv->bk_q); ++ _init_txservq(&psta_xmitpriv->vi_q); ++ _init_txservq(&psta_xmitpriv->vo_q); ++ _rtw_init_listhead(&psta_xmitpriv->legacy_dz); ++ _rtw_init_listhead(&psta_xmitpriv->apsd); ++ ++_func_exit_; ++ ++} ++ ++s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter) ++{ ++ int i; ++ struct xmit_buf *pxmitbuf; ++ struct xmit_frame *pxframe; ++ sint res=_SUCCESS; ++ ++_func_enter_; ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)pxmitpriv, 0, sizeof(struct xmit_priv)); ++ ++ _rtw_spinlock_init(&pxmitpriv->lock); ++ _rtw_init_sema(&pxmitpriv->xmit_sema, 0); ++ _rtw_init_sema(&pxmitpriv->terminate_xmitthread_sema, 0); ++ ++ ATOMIC_SET(&pxmitpriv->HwRdyXmitData, 1); ++ ++ /* ++ Please insert all the queue initializaiton using _rtw_init_queue below ++ */ ++ ++ pxmitpriv->adapter = padapter; ++ ++ //for(i = 0 ; i < MAX_NUMBLKS; i++) ++ // _rtw_init_queue(&pxmitpriv->blk_strms[i]); ++ ++ _rtw_init_queue(&pxmitpriv->be_pending); ++ _rtw_init_queue(&pxmitpriv->bk_pending); ++ _rtw_init_queue(&pxmitpriv->vi_pending); ++ _rtw_init_queue(&pxmitpriv->vo_pending); ++ _rtw_init_queue(&pxmitpriv->bm_pending); ++ ++ //_rtw_init_queue(&pxmitpriv->legacy_dz_queue); ++ //_rtw_init_queue(&pxmitpriv->apsd_queue); ++ ++ _rtw_init_queue(&pxmitpriv->free_xmit_queue); ++ ++ ++ /* ++ Please allocate memory with the sz = (struct xmit_frame) * NR_XMITFRAME, ++ and initialize free_xmit_frame below. ++ Please also apply free_txobj to link_up all the xmit_frames... ++ */ ++ ++ pxmitpriv->pallocated_frame_buf = rtw_zvmalloc(NR_XMITFRAME * sizeof(struct xmit_frame) + 4); ++ ++ if (pxmitpriv->pallocated_frame_buf == NULL){ ++ pxmitpriv->pxmit_frame_buf =NULL; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_frame fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ pxmitpriv->pxmit_frame_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_frame_buf), 4); ++ //pxmitpriv->pxmit_frame_buf = pxmitpriv->pallocated_frame_buf + 4 - ++ // ((SIZE_PTR) (pxmitpriv->pallocated_frame_buf) &3); ++ ++ pxframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; ++ ++ for (i = 0; i < NR_XMITFRAME; i++) ++ { ++ _rtw_init_listhead(&(pxframe->list)); ++ ++ pxframe->padapter = padapter; ++ pxframe->frame_tag = NULL_FRAMETAG; ++ ++ pxframe->pkt = NULL; ++ ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ rtw_list_insert_tail(&(pxframe->list), &(pxmitpriv->free_xmit_queue.queue)); ++ ++ pxframe++; ++ } ++ ++ pxmitpriv->free_xmitframe_cnt = NR_XMITFRAME; ++ ++ pxmitpriv->frag_len = MAX_FRAG_THRESHOLD; ++ ++ ++ //init xmit_buf ++ _rtw_init_queue(&pxmitpriv->free_xmitbuf_queue); ++ _rtw_init_queue(&pxmitpriv->pending_xmitbuf_queue); ++ ++ pxmitpriv->pallocated_xmitbuf = rtw_zvmalloc(NR_XMITBUFF * sizeof(struct xmit_buf) + 4); ++ ++ if (pxmitpriv->pallocated_xmitbuf == NULL){ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_buf fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pxmitpriv->pxmitbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmitbuf), 4); ++ //pxmitpriv->pxmitbuf = pxmitpriv->pallocated_xmitbuf + 4 - ++ // ((SIZE_PTR) (pxmitpriv->pallocated_xmitbuf) &3); ++ ++ pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmitbuf; ++ ++ for (i = 0; i < NR_XMITBUFF; i++) ++ { ++ _rtw_init_listhead(&pxmitbuf->list); ++ ++ pxmitbuf->priv_data = NULL; ++ pxmitbuf->padapter = padapter; ++ pxmitbuf->ext_tag = _FALSE; ++ ++/* ++ pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++ //pxmitbuf->pbuf = pxmitbuf->pallocated_buf + XMITBUF_ALIGN_SZ -((SIZE_PTR) (pxmitbuf->pallocated_buf) &(XMITBUF_ALIGN_SZ-1)); ++*/ ++ ++ if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,(MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ))) == _FAIL) { ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pxmitbuf->flags = XMIT_VO_QUEUE; ++ ++ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmitbuf_queue.queue)); ++ #ifdef DBG_XMIT_BUF ++ pxmitbuf->no=i; ++ #endif ++ ++ pxmitbuf++; ++ ++ } ++ ++ pxmitpriv->free_xmitbuf_cnt = NR_XMITBUFF; ++ ++ // Init xmit extension buff ++ _rtw_init_queue(&pxmitpriv->free_xmit_extbuf_queue); ++ ++ pxmitpriv->pallocated_xmit_extbuf = rtw_zvmalloc(NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); ++ ++ if (pxmitpriv->pallocated_xmit_extbuf == NULL){ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("alloc xmit_extbuf fail!\n")); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pxmitpriv->pxmit_extbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitpriv->pallocated_xmit_extbuf), 4); ++ ++ pxmitbuf = (struct xmit_buf*)pxmitpriv->pxmit_extbuf; ++ ++ for (i = 0; i < NR_XMIT_EXTBUFF; i++) ++ { ++ _rtw_init_listhead(&pxmitbuf->list); ++ ++ pxmitbuf->priv_data = NULL; ++ pxmitbuf->padapter = padapter; ++ pxmitbuf->ext_tag = _TRUE; ++ ++/* ++ pxmitbuf->pallocated_buf = rtw_zmalloc(MAX_XMIT_EXTBUF_SZ); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), 4); ++*/ ++ ++ if((res=rtw_os_xmit_resource_alloc(padapter, pxmitbuf,MAX_XMIT_EXTBUF_SZ + XMITBUF_ALIGN_SZ)) == _FAIL) { ++ res= _FAIL; ++ goto exit; ++ } ++ ++ rtw_list_insert_tail(&pxmitbuf->list, &(pxmitpriv->free_xmit_extbuf_queue.queue)); ++ #ifdef DBG_XMIT_BUF ++ pxmitbuf->no=i; ++ #endif ++ pxmitbuf++; ++ ++ } ++ ++ pxmitpriv->free_xmit_extbuf_cnt = NR_XMIT_EXTBUFF; ++ ++ rtw_alloc_hwxmits(padapter); ++ rtw_init_hwxmits(pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); ++ ++#ifdef CONFIG_USB_HCI ++ pxmitpriv->txirp_cnt=1; ++ ++ _rtw_init_sema(&(pxmitpriv->tx_retevt), 0); ++ ++ //per AC pending irp ++ pxmitpriv->beq_cnt = 0; ++ pxmitpriv->bkq_cnt = 0; ++ pxmitpriv->viq_cnt = 0; ++ pxmitpriv->voq_cnt = 0; ++#endif ++ ++ if(padapter->HalFunc.init_xmit_priv != NULL) ++ padapter->HalFunc.init_xmit_priv(padapter); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_mfree_xmit_priv_lock (struct xmit_priv *pxmitpriv) ++{ ++ _rtw_spinlock_free(&pxmitpriv->lock); ++ _rtw_free_sema(&pxmitpriv->xmit_sema); ++ _rtw_free_sema(&pxmitpriv->terminate_xmitthread_sema); ++ ++ _rtw_spinlock_free(&pxmitpriv->be_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->bk_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->vi_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->vo_pending.lock); ++ _rtw_spinlock_free(&pxmitpriv->bm_pending.lock); ++ ++ //_rtw_spinlock_free(&pxmitpriv->legacy_dz_queue.lock); ++ //_rtw_spinlock_free(&pxmitpriv->apsd_queue.lock); ++ ++ _rtw_spinlock_free(&pxmitpriv->free_xmit_queue.lock); ++ _rtw_spinlock_free(&pxmitpriv->free_xmitbuf_queue.lock); ++ _rtw_spinlock_free(&pxmitpriv->pending_xmitbuf_queue.lock); ++} ++ ++ ++void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv) ++{ ++ int i; ++ _adapter *padapter = pxmitpriv->adapter; ++ struct xmit_frame *pxmitframe = (struct xmit_frame*) pxmitpriv->pxmit_frame_buf; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmitbuf; ++ ++ _func_enter_; ++ ++ padapter->HalFunc.free_xmit_priv(padapter); ++ ++ rtw_mfree_xmit_priv_lock(pxmitpriv); ++ ++ if(pxmitpriv->pxmit_frame_buf==NULL) ++ goto out; ++ ++ for(i=0; ipallocated_buf) ++ // rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMITBUF_SZ + XMITBUF_ALIGN_SZ); ++ ++ pxmitbuf++; ++ } ++ ++ if(pxmitpriv->pallocated_frame_buf) { ++ rtw_vmfree(pxmitpriv->pallocated_frame_buf, NR_XMITFRAME * sizeof(struct xmit_frame) + 4); ++ } ++ ++ ++ if(pxmitpriv->pallocated_xmitbuf) { ++ rtw_vmfree(pxmitpriv->pallocated_xmitbuf, NR_XMITBUFF * sizeof(struct xmit_buf) + 4); ++ } ++ ++ // free xmit extension buff ++ _rtw_spinlock_free(&pxmitpriv->free_xmit_extbuf_queue.lock); ++ ++ pxmitbuf = (struct xmit_buf *)pxmitpriv->pxmit_extbuf; ++ for(i=0; ipallocated_buf) ++ // rtw_mfree(pxmitbuf->pallocated_buf, MAX_XMIT_EXTBUF_SZ); ++ ++ pxmitbuf++; ++ } ++ ++ if(pxmitpriv->pallocated_xmit_extbuf) { ++ rtw_vmfree(pxmitpriv->pallocated_xmit_extbuf, NR_XMIT_EXTBUFF * sizeof(struct xmit_buf) + 4); ++ } ++ ++ rtw_free_hwxmits(padapter); ++ ++out: ++ ++_func_exit_; ++ ++} ++ ++static void update_attrib_vcs_info(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ u32 sz; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *psta = pattrib->psta; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ if (pattrib->nr_frags != 1) ++ { ++ sz = padapter->xmitpriv.frag_len; ++ } ++ else //no frag ++ { ++ sz = pattrib->last_txcmdsz; ++ } ++ ++ // (1) RTS_Threshold is compared to the MPDU, not MSDU. ++ // (2) If there are more than one frag in this MSDU, only the first frag uses protection frame. ++ // Other fragments are protected by previous fragment. ++ // So we only need to check the length of first fragment. ++ if(pmlmeext->cur_wireless_mode < WIRELESS_11_24N || padapter->registrypriv.wifi_spec) ++ { ++ if(sz > padapter->registrypriv.rts_thresh) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ } ++ else ++ { ++ if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ else ++ pattrib->vcs_mode = NONE_VCS; ++ } ++ } ++ else ++ { ++ while (_TRUE) ++ { ++#if 0 //Todo ++ //check IOT action ++ if(pHTInfo->IOTAction & HT_IOT_ACT_FORCED_CTS2SELF) ++ { ++ pattrib->vcs_mode = CTS_TO_SELF; ++ pattrib->rts_rate = MGN_24M; ++ break; ++ } ++ else if(pHTInfo->IOTAction & (HT_IOT_ACT_FORCED_RTS|HT_IOT_ACT_PURE_N_MODE)) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ pattrib->rts_rate = MGN_24M; ++ break; ++ } ++#endif ++ ++ //IOT action ++ if((pmlmeinfo->assoc_AP_vendor == atherosAP) && (pattrib->ampdu_en==_TRUE) && ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_ )) ++ { ++ pattrib->vcs_mode = CTS_TO_SELF; ++ break; ++ } ++ ++ ++ //check ERP protection ++ if(psta->rtsen || psta->cts2self) ++ { ++ if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ ++ break; ++ } ++ ++ //check HT op mode ++ if(pattrib->ht_en) ++ { ++ u8 HTOpMode = pmlmeinfo->HT_protection; ++ if((pmlmeext->cur_bwmode && (HTOpMode == 2 || HTOpMode == 3)) || ++ (!pmlmeext->cur_bwmode && HTOpMode == 3) ) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ } ++ ++ //check rts ++ if(sz > padapter->registrypriv.rts_thresh) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ ++ //to do list: check MIMO power save condition. ++ ++ //check AMPDU aggregation for TXOP ++ if(pattrib->ampdu_en==_TRUE) ++ { ++ pattrib->vcs_mode = RTS_CTS; ++ break; ++ } ++ ++ pattrib->vcs_mode = NONE_VCS; ++ break; ++ } ++ } ++ if(padapter->registrypriv.intel_class_mode==1) ++ pattrib->vcs_mode = RTS_CTS; ++} ++ ++static void update_attrib_phy_info(struct pkt_attrib *pattrib, struct sta_info *psta) ++{ ++ /*if(psta->rtsen) ++ pattrib->vcs_mode = RTS_CTS; ++ else if(psta->cts2self) ++ pattrib->vcs_mode = CTS_TO_SELF; ++ else ++ pattrib->vcs_mode = NONE_VCS;*/ ++ ++ pattrib->mdata = 0; ++ pattrib->eosp = 0; ++ pattrib->triggered=0; ++ ++ //qos_en, ht_en, init rate, ,bw, ch_offset, sgi ++ pattrib->qos_en = psta->qos_option; ++ pattrib->ht_en = psta->htpriv.ht_option; ++ pattrib->raid = psta->raid; ++ pattrib->bwmode = psta->htpriv.bwmode; ++ pattrib->ch_offset = psta->htpriv.ch_offset; ++ pattrib->sgi= psta->htpriv.sgi; ++ pattrib->ampdu_en = _FALSE; ++ ++ //if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ //{ ++ // if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ // pattrib->ampdu_en = _TRUE; ++ //} ++ ++ ++ pattrib->retry_ctrl = _FALSE; ++ ++} ++ ++static void qos_acm(u8 acm_mask, struct pkt_attrib *pattrib) ++{ ++ switch (pattrib->priority) ++ { ++ case 0: ++ case 3: ++ if(acm_mask & BIT(1)) ++ pattrib->priority = 2; ++ break; ++ case 1: ++ case 2: ++ break; ++ case 4: ++ case 5: ++ if(acm_mask & BIT(2)) ++ pattrib->priority = 3; ++ break; ++ case 6: ++ case 7: ++ if(acm_mask & BIT(3)) ++ pattrib->priority = 5; ++ break; ++ default: ++ DBG_871X("qos_acm(): invalid pattrib->priority: %d!!!\n", pattrib->priority); ++ break; ++ } ++} ++ ++static void set_qos(struct pkt_file *ppktfile, struct pkt_attrib *pattrib) ++{ ++ struct ethhdr etherhdr; ++ struct iphdr ip_hdr; ++ s32 UserPriority = 0; ++ ++ ++ _rtw_open_pktfile(ppktfile->pkt, ppktfile); ++ _rtw_pktfile_read(ppktfile, (unsigned char*)ðerhdr, ETH_HLEN); ++ ++ // get UserPriority from IP hdr ++ if (pattrib->ether_type == 0x0800) { ++ _rtw_pktfile_read(ppktfile, (u8*)&ip_hdr, sizeof(ip_hdr)); ++// UserPriority = (ntohs(ip_hdr.tos) >> 5) & 0x3; ++ UserPriority = ip_hdr.tos >> 5; ++ } else if (pattrib->ether_type == 0x888e) { ++ // "When priority processing of data frames is supported, ++ // a STA's SME should send EAPOL-Key frames at the highest priority." ++ UserPriority = 7; ++ } ++ ++ pattrib->priority = UserPriority; ++ pattrib->hdrlen = WLAN_HDR_A3_QOS_LEN; ++ pattrib->subtype = WIFI_QOS_DATA_TYPE; ++} ++ ++static s32 update_attrib(_adapter *padapter, _pkt *pkt, struct pkt_attrib *pattrib) ++{ ++ uint i; ++ struct pkt_file pktfile; ++ struct sta_info *psta = NULL; ++ struct ethhdr etherhdr; ++ ++ sint bmcast; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv= &pmlmepriv->qospriv; ++ sint res = _SUCCESS; ++ ++ _func_enter_; ++ ++ _rtw_open_pktfile(pkt, &pktfile); ++ i = _rtw_pktfile_read(&pktfile, (u8*)ðerhdr, ETH_HLEN); ++ ++ pattrib->ether_type = ntohs(etherhdr.h_proto); ++ ++ ++ _rtw_memcpy(pattrib->dst, ðerhdr.h_dest, ETH_ALEN); ++ _rtw_memcpy(pattrib->src, ðerhdr.h_source, ETH_ALEN); ++ ++ pattrib->pctrl = 0; ++ ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_STATION_STATE)) { ++ _rtw_memcpy(pattrib->ra, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, pattrib->src, ETH_ALEN); ++ } ++ else if (check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ _rtw_memcpy(pattrib->ra, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pattrib->ta, get_bssid(pmlmepriv), ETH_ALEN); ++ } ++ ++ pattrib->pktlen = pktfile.pkt_len; // rtw_xmitframe_coalesce() overwirte this! ++ ++ if (ETH_P_IP == pattrib->ether_type) ++ { ++ // The following is for DHCP and ARP packet, we use cck1M to tx these packets and let LPS awake some time ++ // to prevent DHCP protocol fail ++ u8 tmp[24]; ++ _rtw_pktfile_read(&pktfile, &tmp[0], 24); ++ pattrib->dhcp_pkt = 0; ++ if (pktfile.pkt_len > 282) {//MINIMUM_DHCP_PACKET_SIZE) { ++ if (ETH_P_IP == pattrib->ether_type) {// IP header ++ if (((tmp[21] == 68) && (tmp[23] == 67)) || ++ ((tmp[21] == 67) && (tmp[23] == 68))) { ++ // 68 : UDP BOOTP client ++ // 67 : UDP BOOTP server ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("======================update_attrib: get DHCP Packet \n")); ++ // Use low rate to send DHCP packet. ++ //if(pMgntInfo->IOTAction & HT_IOT_ACT_WA_IOT_Broadcom) ++ //{ ++ // tcb_desc->DataRate = MgntQuery_TxRateExcludeCCKRates(ieee);//0xc;//ofdm 6m ++ // tcb_desc->bTxDisableRateFallBack = false; ++ //} ++ //else ++ // pTcb->DataRate = Adapter->MgntInfo.LowestBasicRate; ++ //RTPRINT(FDM, WA_IOT, ("DHCP TranslateHeader(), pTcb->DataRate = 0x%x\n", pTcb->DataRate)); ++ pattrib->dhcp_pkt = 1; ++ } ++ } ++ } ++ } ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ if ( (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) ++ { ++ rtw_set_scan_deny(pmlmepriv, 3000); ++ } ++ #endif ++ ++#ifdef CONFIG_LPS ++ // If EAPOL , ARP , OR DHCP packet, driver must be in active mode. ++ if ( (pattrib->ether_type == 0x0806) || (pattrib->ether_type == 0x888e) || (pattrib->dhcp_pkt == 1) ) ++ { ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SPECIAL_PACKET, 1); ++ } ++#endif ++ ++ bmcast = IS_MCAST(pattrib->ra); ++ ++ // get sta_info ++ if (bmcast) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ if (psta == NULL) { // if we cannot get psta => drrp the pkt ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT"\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); ++ #endif ++ res =_FAIL; ++ goto exit; ++ } ++ else if((check_fwstate(pmlmepriv, WIFI_AP_STATE)==_TRUE)&&(!(psta->state & _FW_LINKED))) ++ { ++ res =_FAIL; ++ goto exit; ++ } ++ } ++ ++ if (psta) ++ { ++ pattrib->mac_id = psta->mac_id; ++ pattrib->psta = psta; ++ } ++ else ++ { ++ // if we cannot get psta => drop the pkt ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_alert_, ("\nupdate_attrib => get sta_info fail, ra:" MAC_FMT "\n", MAC_ARG(pattrib->ra))); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s get sta_info fail, ra:" MAC_FMT"\n", __FUNCTION__, MAC_ARG(pattrib->ra)); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pattrib->ack_policy = 0; ++ // get ether_hdr_len ++ pattrib->pkt_hdrlen = ETH_HLEN;//(pattrib->ether_type == 0x8100) ? (14 + 4 ): 14; //vlan tag ++ ++ pattrib->hdrlen = WLAN_HDR_A3_LEN; ++ pattrib->subtype = WIFI_DATA_TYPE; ++ pattrib->priority = 0; ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ if(psta->qos_option) ++ set_qos(&pktfile, pattrib); ++ } ++ else ++ { ++ if(pqospriv->qos_option) ++ { ++ set_qos(&pktfile, pattrib); ++ if(pmlmepriv->acm_mask != 0) ++ { ++ qos_acm(pmlmepriv->acm_mask, pattrib); ++ } ++ } ++ } ++ ++ //pattrib->priority = 5; //force to used VI queue, for testing ++ ++ if (psta->ieee8021x_blocked == _TRUE) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n psta->ieee8021x_blocked == _TRUE \n")); ++ ++ pattrib->encrypt = 0; ++ ++ if((pattrib->ether_type != 0x888e) && (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _FALSE)) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npsta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%.4x) != 0x888e\n",pattrib->ether_type)); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s psta->ieee8021x_blocked == _TRUE, pattrib->ether_type(%.4x) != 0x888e\n", __FUNCTION__,pattrib->ether_type); ++ #endif ++ res = _FAIL; ++ goto exit; ++ } ++ } ++ else ++ { ++ GET_ENCRY_ALGO(psecuritypriv, psta, pattrib->encrypt, bmcast); ++ ++ switch(psecuritypriv->dot11AuthAlgrthm) ++ { ++ case dot11AuthAlgrthm_Open: ++ case dot11AuthAlgrthm_Shared: ++ case dot11AuthAlgrthm_Auto: ++ pattrib->key_idx = (u8)psecuritypriv->dot11PrivacyKeyIndex; ++ break; ++ case dot11AuthAlgrthm_8021X: ++ if(bmcast) ++ pattrib->key_idx = (u8)psecuritypriv->dot118021XGrpKeyid; ++ else ++ pattrib->key_idx = 0; ++ break; ++ default: ++ pattrib->key_idx = 0; ++ break; ++ } ++ ++ ++ } ++ ++ switch (pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ pattrib->iv_len = 4; ++ pattrib->icv_len = 4; ++ break; ++ ++ case _TKIP_: ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 4; ++ ++ if(padapter->securitypriv.busetkipkey==_FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\npadapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", padapter->securitypriv.busetkipkey)); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s padapter->securitypriv.busetkipkey(%d)==_FAIL drop packet\n", __FUNCTION__, padapter->securitypriv.busetkipkey); ++ #endif ++ res =_FAIL; ++ goto exit; ++ } ++ ++ break; ++ case _AES_: ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("\n pattrib->encrypt=%d (_AES_)\n",pattrib->encrypt)); ++ pattrib->iv_len = 8; ++ pattrib->icv_len = 8; ++ break; ++ ++ default: ++ pattrib->iv_len = 0; ++ pattrib->icv_len = 0; ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ++ ("update_attrib: encrypt=%d securitypriv.sw_encrypt=%d\n", ++ pattrib->encrypt, padapter->securitypriv.sw_encrypt)); ++ ++ if (pattrib->encrypt && ++ ((padapter->securitypriv.sw_encrypt == _TRUE) || (psecuritypriv->hw_decrypted == _FALSE))) ++ { ++ pattrib->bswenc = _TRUE; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_, ++ ("update_attrib: encrypt=%d securitypriv.hw_decrypted=%d bswenc=_TRUE\n", ++ pattrib->encrypt, padapter->securitypriv.sw_encrypt)); ++ } else { ++ pattrib->bswenc = _FALSE; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("update_attrib: bswenc=_FALSE\n")); ++ } ++ ++ rtw_set_tx_chksum_offload(pkt, pattrib); ++ ++ update_attrib_phy_info(pattrib, psta); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++static s32 xmitframe_addmic(_adapter *padapter, struct xmit_frame *pxmitframe){ ++ sint curfragnum,length; ++ u8 *pframe, *payload,mic[8]; ++ struct mic_data micdata; ++ struct sta_info *stainfo; ++ struct qos_priv *pqospriv= &(padapter->mlmepriv.qospriv); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct security_priv *psecuritypriv=&padapter->securitypriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ u8 priority[4]={0x0,0x0,0x0,0x0}; ++ sint bmcst = IS_MCAST(pattrib->ra); ++ ++ if(pattrib->psta) ++ { ++ stainfo = pattrib->psta; ++ } ++ else ++ { ++ stainfo=rtw_get_stainfo(&padapter->stapriv ,&pattrib->ra[0]); ++ } ++ ++ ++ ++_func_enter_; ++ ++ if(pattrib->encrypt ==_TKIP_)//if(psecuritypriv->dot11PrivacyAlgrthm==_TKIP_PRIVACY_) ++ { ++ //encode mic code ++ if(stainfo!= NULL){ ++ u8 null_key[16]={0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0}; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pframe = pxmitframe->buf_addr + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ pframe = pxmitframe->buf_addr + TXDESC_OFFSET; ++#endif ++ ++ if(bmcst) ++ { ++ if(_rtw_memcmp(psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey, null_key, 16)==_TRUE){ ++ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); ++ //rtw_msleep_os(10); ++ return _FAIL; ++ } ++ //start to calculate the mic code ++ rtw_secmicsetkey(&micdata, psecuritypriv->dot118021XGrptxmickey[psecuritypriv->dot118021XGrpKeyid].skey); ++ } ++ else ++ { ++ if(_rtw_memcmp(&stainfo->dot11tkiptxmickey.skey[0],null_key, 16)==_TRUE){ ++ //DbgPrint("\nxmitframe_addmic:stainfo->dot11tkiptxmickey==0\n"); ++ //rtw_msleep_os(10); ++ return _FAIL; ++ } ++ //start to calculate the mic code ++ rtw_secmicsetkey(&micdata, &stainfo->dot11tkiptxmickey.skey[0]); ++ } ++ ++ if(pframe[1]&1){ //ToDS==1 ++ rtw_secmicappend(&micdata, &pframe[16], 6); //DA ++ if(pframe[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &pframe[24], 6); ++ else ++ rtw_secmicappend(&micdata, &pframe[10], 6); ++ } ++ else{ //ToDS==0 ++ rtw_secmicappend(&micdata, &pframe[4], 6); //DA ++ if(pframe[1]&2) //From Ds==1 ++ rtw_secmicappend(&micdata, &pframe[16], 6); ++ else ++ rtw_secmicappend(&micdata, &pframe[10], 6); ++ ++ } ++ ++ //if(pqospriv->qos_option==1) ++ if(pattrib->qos_en) ++ priority[0]=(u8)pxmitframe->attrib.priority; ++ ++ ++ rtw_secmicappend(&micdata, &priority[0], 4); ++ ++ payload=pframe; ++ ++ for(curfragnum=0;curfragnumnr_frags;curfragnum++){ ++ payload=(u8 *)RND4((SIZE_PTR)(payload)); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("===curfragnum=%d, pframe= 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x, 0x%.2x,!!!\n", ++ curfragnum,*payload, *(payload+1),*(payload+2),*(payload+3),*(payload+4),*(payload+5),*(payload+6),*(payload+7))); ++ ++ payload=payload+pattrib->hdrlen+pattrib->iv_len; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d pattrib->hdrlen=%d pattrib->iv_len=%d",curfragnum,pattrib->hdrlen,pattrib->iv_len)); ++ if((curfragnum+1)==pattrib->nr_frags){ ++ length=pattrib->last_txcmdsz-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); ++ rtw_secmicappend(&micdata, payload,length); ++ payload=payload+length; ++ } ++ else{ ++ length=pxmitpriv->frag_len-pattrib->hdrlen-pattrib->iv_len-( (pattrib->bswenc) ? pattrib->icv_len : 0); ++ rtw_secmicappend(&micdata, payload, length); ++ payload=payload+length+pattrib->icv_len; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("curfragnum=%d length=%d pattrib->icv_len=%d",curfragnum,length,pattrib->icv_len)); ++ } ++ } ++ rtw_secgetmic(&micdata,&(mic[0])); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: before add mic code!!!\n")); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: pattrib->last_txcmdsz=%d!!!\n",pattrib->last_txcmdsz)); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: mic[0]=0x%.2x ,mic[1]=0x%.2x ,mic[2]=0x%.2x ,mic[3]=0x%.2x \n\ ++ mic[4]=0x%.2x ,mic[5]=0x%.2x ,mic[6]=0x%.2x ,mic[7]=0x%.2x !!!!\n", ++ mic[0],mic[1],mic[2],mic[3],mic[4],mic[5],mic[6],mic[7])); ++ //add mic code and add the mic code length in last_txcmdsz ++ ++ _rtw_memcpy(payload, &(mic[0]),8); ++ pattrib->last_txcmdsz+=8; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("\n ========last pkt========\n")); ++ payload=payload-pattrib->last_txcmdsz+8; ++ for(curfragnum=0;curfragnumlast_txcmdsz;curfragnum=curfragnum+8) ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,(" %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x, %.2x ", ++ *(payload+curfragnum), *(payload+curfragnum+1), *(payload+curfragnum+2),*(payload+curfragnum+3), ++ *(payload+curfragnum+4),*(payload+curfragnum+5),*(payload+curfragnum+6),*(payload+curfragnum+7))); ++ } ++ else{ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("xmitframe_addmic: rtw_get_stainfo==NULL!!!\n")); ++ } ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++static s32 xmitframe_swencrypt(_adapter *padapter, struct xmit_frame *pxmitframe){ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ //struct security_priv *psecuritypriv=&padapter->securitypriv; ++ ++_func_enter_; ++ ++ //if((psecuritypriv->sw_encrypt)||(pattrib->bswenc)) ++ if(pattrib->bswenc) ++ { ++ //DBG_8192C("start xmitframe_swencrypt\n"); ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_alert_,("### xmitframe_swencrypt\n")); ++ switch(pattrib->encrypt){ ++ case _WEP40_: ++ case _WEP104_: ++ rtw_wep_encrypt(padapter, (u8 *)pxmitframe); ++ break; ++ case _TKIP_: ++ rtw_tkip_encrypt(padapter, (u8 *)pxmitframe); ++ break; ++ case _AES_: ++ rtw_aes_encrypt(padapter, (u8 * )pxmitframe); ++ break; ++ default: ++ break; ++ } ++ ++ } else { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_notice_,("### xmitframe_hwencrypt\n")); ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++s32 rtw_make_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib) ++{ ++ u16 *qc; ++ ++ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv = &pmlmepriv->qospriv; ++ u8 qos_option = _FALSE; ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta=NULL; ++ u8 tdls_seq=0; ++#endif ++ ++//#ifdef CONFIG_PWRCTRL ++// struct pwrctrl_priv *pwrpriv = &(padapter->pwrctrlpriv); ++//#endif ++ ++ sint res = _SUCCESS; ++ u16 *fctrl = &pwlanhdr->frame_ctl; ++ ++ struct sta_info *psta; ++ ++ sint bmcst = IS_MCAST(pattrib->ra); ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ if(bmcst) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ } ++ ++ _rtw_memset(hdr, 0, WLANHDR_OFFSET); ++ ++ SetFrameSubType(fctrl, pattrib->subtype); ++ ++ if (pattrib->subtype & WIFI_DATA_TYPE) ++ { ++ if ((check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE)) { ++ //to_ds = 1, fr_ds = 0; ++#ifdef CONFIG_TDLS ++ if((ptdlsinfo->setup_state==TDLS_LINKED_STATE)){ ++ ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ if((ptdls_sta!=NULL)&&((ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE)==TDLS_LINKED_STATE)&&(pattrib->ether_type!=0x0806)){ ++ //TDLS data transfer, ToDS=0, FrDs=0 ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ tdls_seq=1; ++ }else{ ++ // 1.usual data transfer ++ // 2.Arp pkt will relayed by AP ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ }else ++#endif ++ { ++ //usual data transfer ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ ++ if (pqospriv->qos_option) ++ qos_option = _TRUE; ++ ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ) { ++ //to_ds = 0, fr_ds = 1; ++ SetFrDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->src, ETH_ALEN); ++ ++ if(psta->qos_option) ++ qos_option = _TRUE; ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) { ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ ++ if(psta->qos_option) ++ qos_option = _TRUE; ++ } ++ else { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("fw_state:%x is not allowed to xmit frame\n", get_fwstate(pmlmepriv))); ++ res = _FAIL; ++ goto exit; ++ } ++ ++/*#ifdef CONFIG_PWRCTRL ++ if (pwrpriv->cpwm >= FW_PWR1 && !(padapter->mlmepriv.sitesurveyctrl.traffic_busy)) ++ SetPwrMgt(fctrl); ++#else ++ if ((get_fwstate(pmlmepriv)) & WIFI_SLEEP_STATE) ++ SetPwrMgt(fctrl); ++#endif*/ ++ ++ if(pattrib->mdata) ++ SetMData(fctrl); ++ ++ if (pattrib->encrypt) ++ SetPrivacy(fctrl); ++ ++ if (qos_option) ++ { ++ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); ++ ++ if (pattrib->priority) ++ SetPriority(qc, pattrib->priority); ++ ++ SetEOSP(qc, pattrib->eosp); ++ ++ SetAckpolicy(qc, pattrib->ack_policy); ++ } ++ ++ //TODO: fill HT Control Field ++ ++ //Update Seq Num will be handled by f/w ++ { ++ ++#ifdef CONFIG_TDLS ++ // 1. update seq_num per link by sta_info ++ // 2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len ++ if(tdls_seq==1){ ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ ++ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ ++ SetSeqNum(hdr, pattrib->seqnum); ++ ++ if (pattrib->encrypt){ ++ pattrib->encrypt= _AES_; ++ pattrib->iv_len=8; ++ pattrib->icv_len=8; ++ } ++ }else ++#endif ++ if(psta){ ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ ++ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ ++ SetSeqNum(hdr, pattrib->seqnum); ++ ++ ++ //check if enable ampdu ++ if(pattrib->ht_en && psta->htpriv.ampdu_enable) ++ { ++ if(psta->htpriv.agg_enable_bitmap & BIT(pattrib->priority)) ++ pattrib->ampdu_en = _TRUE; ++ } ++ ++ //re-check if enable ampdu by BA_starting_seqctrl ++ if(pattrib->ampdu_en == _TRUE) ++ { ++ u16 tx_seq; ++ ++ tx_seq = psta->BA_starting_seqctrl[pattrib->priority & 0x0f]; ++ ++ //check BA_starting_seqctrl ++ if(SN_LESS(pattrib->seqnum, tx_seq)) ++ { ++ //DBG_871X("tx ampdu seqnum(%d) < tx_seq(%d)\n", pattrib->seqnum, tx_seq); ++ pattrib->ampdu_en = _FALSE;//AGG BK ++ } ++ else if(SN_EQUAL(pattrib->seqnum, tx_seq)) ++ { ++ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (tx_seq+1)&0xfff; ++ ++ pattrib->ampdu_en = _TRUE;//AGG EN ++ } ++ else ++ { ++ //DBG_871X("tx ampdu over run\n"); ++ psta->BA_starting_seqctrl[pattrib->priority & 0x0f] = (pattrib->seqnum+1)&0xfff; ++ pattrib->ampdu_en = _TRUE;//AGG EN ++ } ++ ++ } ++ ++ } ++ } ++ ++ } ++ else ++ { ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++s32 rtw_txframes_pending(_adapter *padapter) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ return ((_rtw_queue_empty(&pxmitpriv->be_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->bk_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->vi_pending) == _FALSE) || ++ (_rtw_queue_empty(&pxmitpriv->vo_pending) == _FALSE)); ++} ++ ++s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ int priority = pattrib->priority; ++ ++ psta = pattrib->psta; ++ ++ switch(priority) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ break; ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ break; ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ break; ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ break; ++ ++ } ++ ++ return ptxservq->qcnt; ++} ++ ++#ifdef CONFIG_TDLS ++void rtw_tdls_setup_req_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct rtw_ieee80211_ht_cap ht_capie; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_TDLS; ++ u8 action = TDLS_SETUP_REQUEST; ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; //Use NDIS_802_11_LENGTH_RATES_EX in order to call func.rtw_set_supported_rate ++ int bssrate_len = 0, i = 0 ; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ u8 *p; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 iedata=0; ++ u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ u32 time; ++ ++ //SNonce ++ if(pattrib->encrypt){ ++ for(i=0;i<8;i++){ ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->SNonce[4*i], (u8 *)&time, 4); ++ } ++ } ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ //for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { ++ // if (pregistrypriv->dev_network.SupportedRates[bssrate_len]== 0) break; ++ // bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len]; ++ //} ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //country(optional) ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ do{ ++ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 11 ) ++ { ++ sup_ch[0] = 1; //First channel number ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; //Number of channel ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 13 ) ++ { ++ sup_ch[0] = 1; ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;; ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum > 13 ) ++ { ++ sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; ++ sup_ch[idx_5g++] = 1; ++ } ++ ++ sup_ch_idx++; ++ } ++ while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); ++ pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, idx_5g + 2, sup_ch, &(pattrib->pktlen)); ++ ++ //RSNIE ++ if(pattrib->encrypt) ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ ++ //extended capabilities ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ //QoS capability(WMM_IE) ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, TDLS_WMMIE, &(pattrib->pktlen)); ++ ++ //FTIE(optional) ++ if(pattrib->encrypt){ ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40; ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ if(max_recvbuf_sz-rx_packet_offset>(8191-256)) ++ ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ switch(pHalData->rf_type) ++ { ++ case RF_1T1R: ++ ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); ++ break; ++ } ++ ++ pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen)); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_tdls_setup_rsp_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct rtw_ieee80211_ht_cap ht_capie; ++ ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_SETUP_RESPONSE; ++ unsigned char bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ unsigned char *p; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 sup_ch[ 30 * 2 ] = { 0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++ u8 iedata=0; ++ u8 timeout_itvl[5]; //setup response timeout interval will copy from request ++ u8 ANonce[32]; //maybe it can put in ontdls_req ++ u8 k; //for random ANonce ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic; ++ u32 time; ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ ++ if(ptdls_sta == NULL ) ++ { ++ DBG_8192C("[%s] %d\n", __FUNCTION__, __LINE__); ++ } ++ else ++ DBG_8192C("stat_code:%04x \n", ptdls_sta->stat_code); ++ ++ if(pattrib->encrypt){ ++ for(k=0;k<8;k++){ ++ time=rtw_get_current_time(); ++ _rtw_memcpy(&ptdls_sta->ANonce[4*k], (u8*)&time, 4); ++ } ++ } ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ if(ptdls_sta->stat_code!=0) //invalid setup request ++ return; ++ ++ //dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt ) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ //for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { ++ // if (pregistrypriv->dev_network.SupportedRates[bssrate_len]== 0) break; ++ // bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len]; ++ //} ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //country(optional) ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ do{ ++ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 11 ) ++ { ++ sup_ch[0] = 1; //First channel number ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;; //Number of channel ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 13 ) ++ { ++ sup_ch[0] = 1; ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;; ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum > 13 ) ++ { ++ sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; ++ sup_ch[idx_5g++] = 1; ++ } ++ ++ sup_ch_idx++; ++ } ++ while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); ++ pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, idx_5g + 2, sup_ch, &(pattrib->pktlen)); ++ ++ //RSNIE ++ if(pattrib->encrypt){ ++ prsnie = pframe; ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ } ++ ++ //extended capabilities ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ //QoS capability(WMM_IE) ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, 7, TDLS_WMMIE, &(pattrib->pktlen)); ++ ++ //FTIE(optional) ++ if(pattrib->encrypt){ ++ wpa_tdls_generate_tpk(padapter, ptdls_sta); ++ ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ ptimeout_ie = pframe; ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40; ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ if(max_recvbuf_sz-rx_packet_offset>(8191-256)) ++ ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ switch(pHalData->rf_type) ++ { ++ case RF_1T1R: ++ ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); ++ break; ++ } ++ ++ pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen)); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ plinkid_ie = pframe; ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //fill ftie mic ++ if(pattrib->encrypt) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 2, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++} ++ ++void rtw_tdls_setup_cfm_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_info *ptdls_sta=rtw_get_stainfo( (&padapter->stapriv) , pattrib->dst); ++ ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_SETUP_CONFIRM; ++ u8 more_supportedrates = 0; ++ unsigned int ie_len; ++ unsigned char *p; ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 *pftie, *ptimeout_ie, *plinkid_ie, *prsnie, *pftie_mic; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status code, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ if(ptdls_sta->stat_code!=0) //invalid setup request ++ return; ++ ++ //RSNIE ++ if(pattrib->encrypt){ ++ prsnie = pframe; ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ } ++ ++ //EDCA param set; WMM param ele. ++ if(pattrib->encrypt){ ++ //FTIE ++ pftie = pframe; ++ pftie_mic = pframe+4; ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ _rtw_memcpy((pframe+20), ptdls_sta->ANonce, 32); ++ _rtw_memcpy((pframe+52), ptdls_sta->SNonce, 32); ++ pframe += 84; ++ pattrib->pktlen += 84; ++ ++ //Timeout interval ++ ptimeout_ie = pframe; ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, (u8 *)(&ptdls_sta->TDLS_PeerKey_Lifetime), 4); ++ ptdls_sta->TPK_count=0; ++ _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ } ++ ++ //HT operation; todo ++ //Link identifier ++ plinkid_ie = pframe; ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //fill ftie mic ++ if(pattrib->encrypt) ++ wpa_tdls_ftie_mic(ptdls_sta->tpk.kck, 3, plinkid_ie, prsnie, ptimeout_ie, pftie, pftie_mic); ++ ++} ++ ++void rtw_tdls_teardown_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_TEARDOWN; ++ u8 link_id_addr[18] = {0}; ++ ++ struct sta_info *ptdls_sta = rtw_get_stainfo( &(padapter->stapriv) , pattrib->dst); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ //Link identifier ++ if((ptdls_sta->tdls_sta_state & TDLS_INITIATOR_STATE)==TDLS_INITIATOR_STATE){ ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ }else if((ptdls_sta->tdls_sta_state & TDLS_RESPONDER_STATE)==TDLS_RESPONDER_STATE){ ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ } ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_tdls_dis_req_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ u8 category = RTW_WLAN_CATEGORY_TDLS; ++ u8 action = TDLS_DISCOVERY_REQUEST; ++ u8 link_id_addr[18] = {0}; ++ static u8 dialogtoken=0; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogtoken), &(pattrib->pktlen)); ++ dialogtoken = (dialogtoken+1)%256; ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_tdls_dis_rsp_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct rtw_ieee80211_ht_cap ht_capie; ++ ++ u8 category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = TDLS_DISCOVERY_RESPONSE; ++ u8 bssrate[NDIS_802_11_LENGTH_RATES_EX]; ++ int bssrate_len = 0; ++ u8 more_supportedrates = 0; ++ u8 *p; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ u8 link_id_addr[18] = {0}; ++ u8 sup_ch[ 30 * 2 ] = {0x00 }, sup_ch_idx = 0, idx_5g = 2; //For supported channel ++ u8 iedata=0; ++ u8 timeout_itvl[5]; //set timeout interval to maximum value ++ u32 timeout_interval= TPK_RESEND_COUNT * 1000; ++ ++ //category, action, dialog token ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialog), &(pattrib->pktlen)); ++ ++ //capability ++ _rtw_memcpy(pframe, rtw_get_capability_from_ie(pmlmeinfo->network.IEs), 2); ++ ++ if(pattrib->encrypt) ++ *pframe =*pframe | BIT(4); ++ pframe += 2; ++ pattrib->pktlen += 2; ++ ++ //supported rates ++ rtw_set_supported_rate(bssrate, WIRELESS_11BG_24N); ++ bssrate_len = IEEE80211_CCK_RATE_LEN + IEEE80211_NUM_OFDM_RATESLEN; ++ //for (bssrate_len = 0; bssrate_len < NumRates; bssrate_len++) { ++ // if (pregistrypriv->dev_network.SupportedRates[bssrate_len] == 0) break; ++ // bssrate[bssrate_len] = pregistrypriv->dev_network.SupportedRates[bssrate_len]; ++ //} ++ ++ if (bssrate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , 8, bssrate, &(pattrib->pktlen)); ++ more_supportedrates = 1; ++ } ++ else ++ { ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_ , bssrate_len , bssrate, &(pattrib->pktlen)); ++ } ++ ++ //extended supported rates ++ if(more_supportedrates==1){ ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_ , (bssrate_len - 8), (bssrate + 8), &(pattrib->pktlen)); ++ } ++ ++ //supported channels ++ do{ ++ if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 11 ) ++ { ++ sup_ch[0] = 1; //First channel number ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;; //Number of channel ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum == 13 ) ++ { ++ sup_ch[0] = 1; ++ sup_ch[1] = pmlmeext->channel_set[sup_ch_idx].ChannelNum;; ++ } ++ else if( pmlmeext->channel_set[sup_ch_idx].ChannelNum > 13 ) ++ { ++ sup_ch[idx_5g++] = pmlmeext->channel_set[sup_ch_idx].ChannelNum; ++ sup_ch[idx_5g++] = 1; ++ } ++ ++ sup_ch_idx++; ++ } ++ while( pmlmeext->channel_set[sup_ch_idx].ChannelNum != 0 ); ++ pframe = rtw_set_ie(pframe, _SUPPORTED_CH_IE_, idx_5g + 2, sup_ch, &(pattrib->pktlen)); ++ ++ //RSNIE ++ if(pattrib->encrypt) ++ pframe = rtw_set_ie(pframe, _RSN_IE_2_, 20, TDLS_RSNIE, &(pattrib->pktlen)); ++ ++ //extended capability ++ pframe = rtw_set_ie(pframe, _EXT_CAP_IE_ , 5, TDLS_EXT_CAPIE, &(pattrib->pktlen)); ++ ++ //FTIE ++ if(pattrib->encrypt){ ++ _rtw_memset(pframe, 0, 84); //All fields except SNonce shall be set to 0 ++ _rtw_memset(pframe, _FTIE_, 1); //version ++ _rtw_memset((pframe+1), 82, 1); //length ++ pframe += 84; ++ pattrib->pktlen += 84; ++ //Timeout interval ++ timeout_itvl[0]=0x02; ++ _rtw_memcpy(timeout_itvl+1, &timeout_interval, 4); ++ pframe = rtw_set_ie(pframe, _TIMEOUT_ITVL_IE_, 5, timeout_itvl, &(pattrib->pktlen)); ++ ++ } ++ ++ //Sup_reg_classes(optional) ++ //HT capabilities ++ _rtw_memset(&ht_capie, 0, sizeof(struct rtw_ieee80211_ht_cap)); ++ ++ ht_capie.cap_info = IEEE80211_HT_CAP_SUP_WIDTH |IEEE80211_HT_CAP_SGI_20 |IEEE80211_HT_CAP_SM_PS | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_TX_STBC |IEEE80211_HT_CAP_DSSSCCK40; ++ ++ { ++ u32 rx_packet_offset, max_recvbuf_sz; ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz); ++ if(max_recvbuf_sz-rx_packet_offset>(8191-256)) ++ ht_capie.cap_info = ht_capie.cap_info |IEEE80211_HT_CAP_MAX_AMSDU; ++ } ++ ++ ht_capie.ampdu_params_info = (IEEE80211_HT_CAP_AMPDU_FACTOR&0x03); ++ ++ switch(pHalData->rf_type) ++ { ++ case RF_1T1R: ++ ht_capie.cap_info |= 0x0100;//RX STBC One spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_1R, 16); ++ break; ++ ++ case RF_2T2R: ++ case RF_1T2R: ++ default: ++ ht_capie.cap_info|= 0x0200;//RX STBC two spatial stream ++ _rtw_memcpy(ht_capie.supp_mcs_set, MCS_rate_2R, 16); ++ break; ++ } ++ ++ pframe = rtw_set_ie(pframe, _HT_CAPABILITY_IE_, ++ sizeof(struct rtw_ieee80211_ht_cap), (unsigned char*)&ht_capie, &(pattrib->pktlen)); ++ ++ //20/40 BSS coexistence ++ if(pmlmepriv->num_FortyMHzIntolerant>0) ++ iedata |= BIT(2);//20 MHz BSS Width Request ++ pframe = rtw_set_ie(pframe, EID_BSSCoexistence, 1, &iedata, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->dst, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->src, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_tdls_peer_traffic_indication_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_PEER_TRAFFIC_INDICATION; ++ ++ u8 link_id_addr[18] = {0}; ++ u8 AC_queue=0; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, reason code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdls_sta->dialog), &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //PTI control ++ //PU buffer status ++ if(ptdls_sta->uapsd_bk&BIT(1)) ++ AC_queue=BIT(0); ++ if(ptdls_sta->uapsd_be&BIT(1)) ++ AC_queue=BIT(1); ++ if(ptdls_sta->uapsd_vi&BIT(1)) ++ AC_queue=BIT(2); ++ if(ptdls_sta->uapsd_vo&BIT(1)) ++ AC_queue=BIT(3); ++ pframe = rtw_set_ie(pframe, _PTI_BUFFER_STATUS_, 1, &AC_queue, &(pattrib->pktlen)); ++ ++} ++ ++void rtw_tdls_ch_switch_req_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_CHANNEL_SWITCH_REQUEST; ++ u8 link_id_addr[18] = {0}; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ u8 ch_switch_timing[4] = {0}; ++ u16 switch_time= CH_SWITCH_TIME, switch_timeout=CH_SWITCH_TIMEOUT; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, target_ch ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(ptdlsinfo->candidate_ch), &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //ch switch timing ++ _rtw_memcpy(ch_switch_timing, &switch_time, 2); ++ _rtw_memcpy(ch_switch_timing+2, &switch_timeout, 2); ++ pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++ ++ //update ch switch attrib to sta_info ++ ptdls_sta->off_ch=ptdlsinfo->candidate_ch; ++ ptdls_sta->ch_switch_time=switch_time; ++ ptdls_sta->ch_switch_timeout=switch_timeout; ++ ++} ++ ++void rtw_tdls_ch_switch_rsp_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe) ++{ ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 payload_type = 0x02; ++ unsigned char category = RTW_WLAN_CATEGORY_TDLS; ++ unsigned char action = TDLS_CHANNEL_SWITCH_RESPONSE; ++ u8 link_id_addr[18] = {0}; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *ptdls_sta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &pmlmeext->mlmext_info; ++ u8 ch_switch_timing[4] = {0}; ++ ++ //payload type ++ pframe = rtw_set_fixed_ie(pframe, 1, &(payload_type), &(pattrib->pktlen)); ++ //category, action, status_code ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 2, (u8 *)&ptdls_sta->stat_code, &(pattrib->pktlen)); ++ ++ //Link identifier ++ _rtw_memcpy(link_id_addr, pattrib->ra, 6); ++ _rtw_memcpy((link_id_addr+6), pattrib->src, 6); ++ _rtw_memcpy((link_id_addr+12), pattrib->dst, 6); ++ pframe = rtw_set_ie(pframe, _LINK_ID_IE_, 18, link_id_addr, &(pattrib->pktlen)); ++ ++ //ch switch timing ++ _rtw_memcpy(ch_switch_timing, &ptdls_sta->ch_switch_time, 2); ++ _rtw_memcpy(ch_switch_timing+2, &ptdls_sta->ch_switch_timeout, 2); ++ pframe = rtw_set_ie(pframe, _CH_SWITCH_TIMING_, 4, ch_switch_timing, &(pattrib->pktlen)); ++ ++} ++ ++int rtw_tdls_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 action) ++{ ++ int res=_SUCCESS; ++ ++ switch(action){ ++ case TDLS_SETUP_REQUEST: ++ rtw_tdls_setup_req_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_SETUP_RESPONSE: ++ rtw_tdls_setup_rsp_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_SETUP_CONFIRM: ++ rtw_tdls_setup_cfm_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_TEARDOWN: ++ rtw_tdls_teardown_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_DISCOVERY_REQUEST: ++ rtw_tdls_dis_req_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ rtw_tdls_peer_traffic_indication_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ rtw_tdls_ch_switch_req_fr(padapter, pxmitframe, pframe); ++ break; ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ rtw_tdls_ch_switch_rsp_fr(padapter, pxmitframe, pframe); ++ break; ++ default: ++ res=_FAIL; ++ break; ++ } ++ ++ return res; ++} ++ ++s32 rtw_make_tdls_wlanhdr (_adapter *padapter , u8 *hdr, struct pkt_attrib *pattrib, u8 action) ++{ ++ u16 *qc; ++ struct rtw_ieee80211_hdr *pwlanhdr = (struct rtw_ieee80211_hdr *)hdr; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct qos_priv *pqospriv = &pmlmepriv->qospriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct sta_info *psta=NULL, *ptdls_sta=NULL; ++ u8 tdls_seq=0, baddr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; ++ ++ sint res = _SUCCESS; ++ u16 *fctrl = &pwlanhdr->frame_ctl; ++ ++_func_enter_; ++ ++ _rtw_memset(hdr, 0, WLANHDR_OFFSET); ++ ++ SetFrameSubType(fctrl, pattrib->subtype); ++ ++ switch(action){ ++ case TDLS_SETUP_REQUEST: ++ case TDLS_SETUP_RESPONSE: ++ case TDLS_SETUP_CONFIRM: ++ case TDLS_TEARDOWN: //directly to peer STA or via AP ++ case TDLS_PEER_TRAFFIC_INDICATION: ++ case TDLS_PEER_PSM_REQUEST: //directly to peer STA or via AP ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ break; ++ case TDLS_CHANNEL_SWITCH_REQUEST: ++ case TDLS_CHANNEL_SWITCH_RESPONSE: ++ case TDLS_PEER_PSM_RESPONSE: ++ case TDLS_PEER_TRAFFIC_RESPONSE: ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ tdls_seq=1; ++ break; ++ case TDLS_DISCOVERY_REQUEST: //unicast: directly to peer sta, Bcast: via AP ++ if(_rtw_memcmp(pattrib->dst, baddr, 6) ) ++ { ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_bssid(pmlmepriv), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pattrib->dst, ETH_ALEN); ++ } ++ else ++ { ++ _rtw_memcpy(pwlanhdr->addr1, pattrib->dst, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, pattrib->src, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_bssid(pmlmepriv), ETH_ALEN); ++ tdls_seq=1; ++ } ++ break; ++ } ++ ++ if (pattrib->encrypt) ++ SetPrivacy(fctrl); ++ ++ if (pqospriv->qos_option) ++ { ++ qc = (unsigned short *)(hdr + pattrib->hdrlen - 2); ++ if (pattrib->priority) ++ SetPriority(qc, pattrib->priority); ++ SetAckpolicy(qc, pattrib->ack_policy); ++ } ++ ++ psta = pattrib->psta; ++ ++ // 1. update seq_num per link by sta_info ++ // 2. rewrite encrypt to _AES_, also rewrite iv_len, icv_len ++ if(tdls_seq==1){ ++ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); ++ if(ptdls_sta){ ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = ptdls_sta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(hdr, pattrib->seqnum); ++ ++ if (pattrib->encrypt){ ++ pattrib->encrypt= _AES_; ++ pattrib->iv_len=8; ++ pattrib->icv_len=8; ++ } ++ }else{ ++ res=_FAIL; ++ goto exit; ++ } ++ }else if(psta){ ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority]++; ++ psta->sta_xmitpriv.txseq_tid[pattrib->priority] &= 0xFFF; ++ pattrib->seqnum = psta->sta_xmitpriv.txseq_tid[pattrib->priority]; ++ SetSeqNum(hdr, pattrib->seqnum); ++ } ++ ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++s32 rtw_xmit_tdls_coalesce(_adapter * padapter, struct xmit_frame * pxmitframe, u8 action) ++{ ++ s32 llc_sz; ++ ++ u8 *pframe, *mem_start; ++ ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ u8 *pbuf_start; ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ s32 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ if(bmcst) { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ } else { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ } ++ ++ if(psta==NULL) ++ return _FAIL; ++ ++ if (pxmitframe->buf_addr == NULL) ++ return _FAIL; ++ ++ pbuf_start = pxmitframe->buf_addr; ++ mem_start = pbuf_start + TXDESC_OFFSET; ++ ++ if (rtw_make_tdls_wlanhdr(padapter, mem_start, pattrib, action) == _FAIL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pframe = mem_start; ++ pframe += pattrib->hdrlen; ++ ++ //adding icv, if necessary... ++ if (pattrib->iv_len) ++ { ++ if (psta != NULL) ++ { ++ switch(pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ break; ++ case _TKIP_: ++ if(bmcst) ++ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ case _AES_: ++ if(bmcst) ++ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ AES_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ } ++ } ++ ++ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); ++ pframe += pattrib->iv_len; ++ ++ } ++ ++ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ ++ //pattrib->pktlen will be counted in rtw_tdls_fr ++ pattrib->pktlen = 0; ++ ++ rtw_tdls_fr(padapter, pxmitframe, pframe, action); ++ ++ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { ++ pframe += pattrib->pktlen; ++ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); ++ pframe += pattrib->icv_len; ++ } ++ ++ pattrib->nr_frags = 1; ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + llc_sz + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0) + pattrib->pktlen; ++ ++ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) ++ { ++ goto exit; ++ } ++ ++ xmitframe_swencrypt(padapter, pxmitframe); ++ ++ update_attrib_vcs_info(padapter, pxmitframe); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++#endif ++ ++/* ++ ++This sub-routine will perform all the following: ++ ++1. remove 802.3 header. ++2. create wlan_header, based on the info in pxmitframe ++3. append sta's iv/ext-iv ++4. append LLC ++5. move frag chunk from pframe to pxmitframe->mem ++6. apply sw-encrypt, if necessary. ++ ++*/ ++s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe) ++{ ++ struct pkt_file pktfile; ++ ++ s32 frg_inx, frg_len, mpdu_len, llc_sz, mem_sz; ++ ++ SIZE_PTR addr; ++ ++ u8 *pframe, *mem_start; ++ ++ struct sta_info *psta; ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ //struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ u8 *pbuf_start; ++ ++ s32 bmcst = IS_MCAST(pattrib->ra); ++ s32 res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ psta = rtw_get_stainfo(&padapter->stapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ return _FAIL; ++ ++ if (pxmitframe->buf_addr == NULL) ++ return _FAIL; ++ ++ pbuf_start = pxmitframe->buf_addr; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ mem_start = pbuf_start + TXDESC_SIZE + (pxmitframe->pkt_offset * PACKET_OFFSET_SZ); ++#else ++ mem_start = pbuf_start + TXDESC_OFFSET; ++#endif ++ ++ if (rtw_make_wlanhdr(padapter, mem_start, pattrib) == _FAIL) { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("rtw_xmitframe_coalesce: rtw_make_wlanhdr fail; drop pkt\n")); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ _rtw_open_pktfile(pkt, &pktfile); ++ _rtw_pktfile_read(&pktfile, NULL, pattrib->pkt_hdrlen); ++ ++ pattrib->pktlen = pktfile.pkt_len; ++ ++ frg_inx = 0; ++ frg_len = pxmitpriv->frag_len - 4;//2346-4 = 2342 ++ ++ while (1) ++ { ++ llc_sz = 0; ++ ++ mpdu_len = frg_len; ++ ++ pframe = mem_start; ++ ++ SetMFrag(mem_start); ++ ++ pframe += pattrib->hdrlen; ++ mpdu_len -= pattrib->hdrlen; ++ ++ //adding icv, if necessary... ++ if (pattrib->iv_len) ++ { ++ //if (check_fwstate(pmlmepriv, WIFI_MP_STATE)) ++ // psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ //else ++ // psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ ++ if (psta != NULL) ++ { ++ switch(pattrib->encrypt) ++ { ++ case _WEP40_: ++ case _WEP104_: ++ WEP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ break; ++ case _TKIP_: ++ if(bmcst) ++ TKIP_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ TKIP_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ case _AES_: ++ if(bmcst) ++ AES_IV(pattrib->iv, psta->dot11txpn, pattrib->key_idx); ++ else ++ AES_IV(pattrib->iv, psta->dot11txpn, 0); ++ break; ++ } ++ } ++ ++ _rtw_memcpy(pframe, pattrib->iv, pattrib->iv_len); ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_notice_, ++ ("rtw_xmitframe_coalesce: keyid=%d pattrib->iv[3]=%.2x pframe=%.2x %.2x %.2x %.2x\n", ++ padapter->securitypriv.dot11PrivacyKeyIndex, pattrib->iv[3], *pframe, *(pframe+1), *(pframe+2), *(pframe+3))); ++ ++ pframe += pattrib->iv_len; ++ ++ mpdu_len -= pattrib->iv_len; ++ } ++ ++ if (frg_inx == 0) { ++ llc_sz = rtw_put_snap(pframe, pattrib->ether_type); ++ pframe += llc_sz; ++ mpdu_len -= llc_sz; ++ } ++ ++ if ((pattrib->icv_len >0) && (pattrib->bswenc)) { ++ mpdu_len -= pattrib->icv_len; ++ } ++ ++ ++ if (bmcst) { ++ // don't do fragment to broadcat/multicast packets ++ mem_sz = _rtw_pktfile_read(&pktfile, pframe, pattrib->pktlen); ++ } else { ++ mem_sz = _rtw_pktfile_read(&pktfile, pframe, mpdu_len); ++ } ++ ++ pframe += mem_sz; ++ ++ if ((pattrib->icv_len >0 )&& (pattrib->bswenc)) { ++ _rtw_memcpy(pframe, pattrib->icv, pattrib->icv_len); ++ pframe += pattrib->icv_len; ++ } ++ ++ frg_inx++; ++ ++ if (bmcst || (rtw_endofpktfile(&pktfile) == _TRUE)) ++ { ++ pattrib->nr_frags = frg_inx; ++ ++ pattrib->last_txcmdsz = pattrib->hdrlen + pattrib->iv_len + ((pattrib->nr_frags==1)? llc_sz:0) + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0) + mem_sz; ++ ++ ClearMFrag(mem_start); ++ ++#ifdef CONFIG_SDIO_HCI ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("coalesce: pattrib->last_txcmdsz=%d pxmitframe->pxmitbuf->phead=0x%p pxmitframe->pxmitbuf->ptail=0x%p pxmitframe->pxmitbuf->len=%d\n", pattrib->last_txcmdsz, pxmitframe->pxmitbuf->phead, pxmitframe->pxmitbuf->ptail, pxmitframe->pxmitbuf->len)); ++ pxmitframe->pxmitbuf->ptail = pxmitframe->buf_addr + _RND512(pframe-pxmitframe->buf_addr); ++ pxmitframe->pxmitbuf->len += pxmitframe->pxmitbuf->ptail - pxmitframe->buf_addr;//(pframe-mem_start); ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("coalesce: [2] pattrib->last_txcmdsz=%d pxmitframe->pxmitbuf->ptail=0x%p pxmitframe->pxmitbuf->len=%d\n", pattrib->last_txcmdsz, pxmitframe->pxmitbuf->ptail, pxmitframe->pxmitbuf->len)); ++#endif ++ ++ break; ++ ++ } else { ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitframe->pxmitbuf->ptail = pxmitframe->buf_addr + _RND512(pframe-pxmitframe->buf_addr); ++ pxmitframe->pxmitbuf->len += pxmitframe->pxmitbuf->ptail - pxmitframe->buf_addr; ++ pframe=pxmitframe->pxmitbuf->ptail; ++#endif ++ } ++ ++ addr = (SIZE_PTR)(pframe); ++ ++ mem_start = (unsigned char *)RND4(addr) + TXDESC_OFFSET; ++ _rtw_memcpy(mem_start, pbuf_start + TXDESC_OFFSET, pattrib->hdrlen); ++ } ++ ++ if (xmitframe_addmic(padapter, pxmitframe) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("xmitframe_addmic(padapter, pxmitframe)==_FAIL\n")); ++ res = _FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_SDIO_HCI ++ fillin_txdesc(padapter, pxmitframe); ++#endif ++ ++ xmitframe_swencrypt(padapter, pxmitframe); ++ ++ if(bmcst == _FALSE) ++ update_attrib_vcs_info(padapter, pxmitframe); ++ else ++ pattrib->vcs_mode = NONE_VCS; ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++/* Logical Link Control(LLC) SubNetwork Attachment Point(SNAP) header ++ * IEEE LLC/SNAP header contains 8 octets ++ * First 3 octets comprise the LLC portion ++ * SNAP portion, 5 octets, is divided into two fields: ++ * Organizationally Unique Identifier(OUI), 3 octets, ++ * type, defined by that organization, 2 octets. ++ */ ++s32 rtw_put_snap(u8 *data, u16 h_proto) ++{ ++ struct ieee80211_snap_hdr *snap; ++ u8 *oui; ++ ++_func_enter_; ++ ++ snap = (struct ieee80211_snap_hdr *)data; ++ snap->dsap = 0xaa; ++ snap->ssap = 0xaa; ++ snap->ctrl = 0x03; ++ ++ if (h_proto == 0x8137 || h_proto == 0x80f3) ++ oui = P802_1H_OUI; ++ else ++ oui = RFC1042_OUI; ++ ++ snap->oui[0] = oui[0]; ++ snap->oui[1] = oui[1]; ++ snap->oui[2] = oui[2]; ++ ++ *(u16 *)(data + SNAP_SIZE) = htons(h_proto); ++ ++_func_exit_; ++ ++ return SNAP_SIZE + sizeof(u16); ++} ++ ++void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len) ++{ ++ ++ uint protection; ++ u8 *perp; ++ sint erp_len; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ ++_func_enter_; ++ ++ switch(pxmitpriv->vcs_setting) ++ { ++ case DISABLE_VCS: ++ pxmitpriv->vcs = NONE_VCS; ++ break; ++ ++ case ENABLE_VCS: ++ break; ++ ++ case AUTO_VCS: ++ default: ++ perp = rtw_get_ie(ie, _ERPINFO_IE_, &erp_len, ie_len); ++ if(perp == NULL) ++ { ++ pxmitpriv->vcs = NONE_VCS; ++ } ++ else ++ { ++ protection = (*(perp + 2)) & BIT(1); ++ if (protection) ++ { ++ if(pregistrypriv->vcs_type == RTS_CTS) ++ pxmitpriv->vcs = RTS_CTS; ++ else ++ pxmitpriv->vcs = CTS_TO_SELF; ++ } ++ else ++ pxmitpriv->vcs = NONE_VCS; ++ } ++ ++ break; ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz) ++{ ++ struct sta_info *psta = NULL; ++ struct stainfo_stats *pstats = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ pxmitpriv->tx_bytes += sz; ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod += pxmitframe->agg_num; ++#else ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod++; ++#endif ++ ++ psta = pxmitframe->attrib.psta; ++ ++ if(psta) ++ { ++ pstats = &psta->sta_stats; ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pstats->tx_pkts += pxmitframe->agg_num; ++#else ++ pstats->tx_pkts++; ++#endif ++ pstats->tx_bytes += sz; ++ } ++ } ++ ++} ++ ++struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv) ++{ ++ _irqL irqL; ++ struct xmit_buf *pxmitbuf = NULL; ++ _list *plist, *phead; ++ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; ++ ++_func_enter_; ++ ++ _enter_critical(&pfree_queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(pfree_queue) == _TRUE) { ++ pxmitbuf = NULL; ++ } else { ++ ++ phead = get_list_head(pfree_queue); ++ ++ plist = get_next(phead); ++ ++ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); ++ ++ rtw_list_delete(&(pxmitbuf->list)); ++ } ++ ++ if (pxmitbuf != NULL) ++ { ++ pxmitpriv->free_xmit_extbuf_cnt--; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF ALLOC no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmit_extbuf_cnt); ++ #endif ++ ++ ++ pxmitbuf->priv_data = NULL; ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->len = 0; ++ pxmitbuf->phead = pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->pbuf; ++ pxmitbuf->pend = pxmitbuf->pbuf + (MAX_XMIT_EXTBUF_SZ-4); ++#endif ++#ifdef CONFIG_PCI_HCI ++ pxmitbuf->len = 0; ++#endif ++ } ++ ++ _exit_critical(&pfree_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pxmitbuf; ++} ++ ++s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ _irqL irqL; ++ _queue *pfree_queue = &pxmitpriv->free_xmit_extbuf_queue; ++ ++_func_enter_; ++ ++ if(pxmitbuf==NULL) ++ { ++ return _FAIL; ++ } ++ ++ _enter_critical(&pfree_queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitbuf->list); ++ ++ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_queue)); ++ pxmitpriv->free_xmit_extbuf_cnt++; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmit_extbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmit_extbuf_cnt); ++ #endif ++ ++ _exit_critical(&pfree_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv) ++{ ++ _irqL irqL; ++ struct xmit_buf *pxmitbuf = NULL; ++ _list *plist, *phead; ++ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; ++ ++_func_enter_; ++ ++ //DBG_8192C("+rtw_alloc_xmitbuf\n"); ++ ++ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++ if(_rtw_queue_empty(pfree_xmitbuf_queue) == _TRUE) { ++ pxmitbuf = NULL; ++ } else { ++ ++ phead = get_list_head(pfree_xmitbuf_queue); ++ ++ plist = get_next(phead); ++ ++ pxmitbuf = LIST_CONTAINOR(plist, struct xmit_buf, list); ++ ++ rtw_list_delete(&(pxmitbuf->list)); ++ } ++ ++ if (pxmitbuf != NULL) ++ { ++ pxmitpriv->free_xmitbuf_cnt--; ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF ALLOC no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no, pxmitpriv->free_xmitbuf_cnt); ++ #endif ++ //DBG_8192C("alloc, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); ++ ++ pxmitbuf->priv_data = NULL; ++ ++#ifdef CONFIG_SDIO_HCI ++ pxmitbuf->len = 0; ++ pxmitbuf->phead = pxmitbuf->pdata = pxmitbuf->ptail = pxmitbuf->pbuf; ++ pxmitbuf->pend = pxmitbuf->pbuf + MAX_XMITBUF_SZ; ++#endif ++#ifdef CONFIG_PCI_HCI ++ pxmitbuf->len = 0; ++#endif ++ } ++ #ifdef DBG_XMIT_BUF ++ else ++ { ++ DBG_871X("DBG_XMIT_BUF rtw_alloc_xmitbuf return NULL\n"); ++ } ++ #endif ++ ++ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pxmitbuf; ++} ++ ++s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ _irqL irqL; ++ _queue *pfree_xmitbuf_queue = &pxmitpriv->free_xmitbuf_queue; ++ ++_func_enter_; ++ ++ //DBG_8192C("+rtw_free_xmitbuf\n"); ++ ++ if(pxmitbuf==NULL) ++ { ++ return _FAIL; ++ } ++ ++ if(pxmitbuf->ext_tag) ++ { ++ rtw_free_xmitbuf_ext(pxmitpriv, pxmitbuf); ++ } ++ else ++ { ++ _enter_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitbuf->list); ++ ++ rtw_list_insert_tail(&(pxmitbuf->list), get_list_head(pfree_xmitbuf_queue)); ++ ++ pxmitpriv->free_xmitbuf_cnt++; ++ //DBG_8192C("FREE, free_xmitbuf_cnt=%d\n", pxmitpriv->free_xmitbuf_cnt); ++ #ifdef DBG_XMIT_BUF ++ DBG_871X("DBG_XMIT_BUF FREE no=%d, free_xmitbuf_cnt=%d\n",pxmitbuf->no ,pxmitpriv->free_xmitbuf_cnt); ++ #endif ++ _exit_critical(&pfree_xmitbuf_queue->lock, &irqL); ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++/* ++Calling context: ++1. OS_TXENTRY ++2. RXENTRY (rx_thread or RX_ISR/RX_CallBack) ++ ++If we turn on USE_RXTHREAD, then, no need for critical section. ++Otherwise, we must use _enter/_exit critical to protect free_xmit_queue... ++ ++Must be very very cautious... ++ ++*/ ++ ++struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv)//(_queue *pfree_xmit_queue) ++{ ++ /* ++ Please remember to use all the osdep_service api, ++ and lock/unlock or _enter/_exit critical to protect ++ pfree_xmit_queue ++ */ ++ ++ _irqL irqL; ++ struct xmit_frame *pxframe = NULL; ++ _list *plist, *phead; ++ _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; ++ _adapter *padapter = pxmitpriv->adapter; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++ if (_rtw_queue_empty(pfree_xmit_queue) == _TRUE) { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_alloc_xmitframe:%d\n", pxmitpriv->free_xmitframe_cnt)); ++ pxframe = NULL; ++ } else { ++ phead = get_list_head(pfree_xmit_queue); ++ ++ plist = get_next(phead); ++ ++ pxframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ rtw_list_delete(&(pxframe->list)); ++ } ++ ++ if (pxframe != NULL) ++ { ++ pxmitpriv->free_xmitframe_cnt--; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ("rtw_alloc_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); ++ ++ pxframe->buf_addr = NULL; ++ pxframe->pxmitbuf = NULL; ++ ++ _rtw_memset(&pxframe->attrib, 0, sizeof(struct pkt_attrib)); ++ //pxframe->attrib.psta = NULL; ++ ++ pxframe->frame_tag = DATA_FRAMETAG; ++ ++#ifdef CONFIG_USB_HCI ++ pxframe->pkt = NULL; ++ pxframe->pkt_offset = 1;//default use pkt_offset to fill tx desc ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pxframe->agg_num = 1; ++#endif ++ ++#endif //#ifdef CONFIG_USB_HCI ++ ++#ifdef PLATFORM_LINUX ++ if(pxmitpriv->free_xmitframe_cnt==1) ++ { ++ if (!netif_queue_stopped(padapter->pnetdev)) ++ netif_stop_queue(padapter->pnetdev); ++ } ++#endif ++ ++ } ++ ++ _exit_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++_func_exit_; ++ ++ return pxframe; ++} ++ ++s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ _queue *pfree_xmit_queue = &pxmitpriv->free_xmit_queue; ++ _adapter *padapter = pxmitpriv->adapter; ++ _pkt *pndis_pkt = NULL; ++ ++_func_enter_; ++ ++ if (pxmitframe == NULL) { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ("======rtw_free_xmitframe():pxmitframe==NULL!!!!!!!!!!\n")); ++ goto exit; ++ } ++ ++ _enter_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ if (pxmitframe->pkt){ ++ pndis_pkt = pxmitframe->pkt; ++ pxmitframe->pkt = NULL; ++ } ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(pfree_xmit_queue)); ++ ++ pxmitpriv->free_xmitframe_cnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe():free_xmitframe_cnt=%d\n", pxmitpriv->free_xmitframe_cnt)); ++ ++ _exit_critical_bh(&pfree_xmit_queue->lock, &irqL); ++ ++ ++ if(pndis_pkt) ++ rtw_os_pkt_complete(padapter, pndis_pkt); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++s32 rtw_free_xmitframe_ex(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe) ++{ ++ ++_func_enter_; ++ ++ if(pxmitframe==NULL){ ++ goto exit; ++ } ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_debug_, ("rtw_free_xmitframe_ex()\n")); ++ ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ ++exit: ++ ++_func_exit_; ++ ++ return _SUCCESS; ++} ++ ++void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct xmit_frame *pxmitframe; ++ ++_func_enter_; ++ ++ _enter_critical_bh(&(pframequeue->lock), &irqL); ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ ++ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ plist = get_next(plist); ++ ++ rtw_free_xmitframe(pxmitpriv,pxmitframe); ++ ++ } ++ _exit_critical_bh(&(pframequeue->lock), &irqL); ++ ++_func_exit_; ++} ++ ++s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ if (rtw_xmit_classifier(padapter, pxmitframe) == _FAIL) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_err_, ++ ("rtw_xmitframe_enqueue: drop xmit pkt for classifier fail\n")); ++// pxmitframe->pkt = NULL; ++ return _FAIL; ++ } ++ ++ return _SUCCESS; ++} ++ ++static struct xmit_frame *dequeue_one_xmitframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit, struct tx_servq *ptxservq, _queue *pframe_queue) ++{ ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ ++ xmitframe_phead = get_list_head(pframe_queue); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++/*#ifdef RTK_DMP_PLATFORM ++#ifdef CONFIG_USB_TX_AGGREGATION ++ if((ptxservq->qcnt>0) && (ptxservq->qcnt<=2)) ++ { ++ pxmitframe = NULL; ++ ++ tasklet_schedule(&pxmitpriv->xmit_tasklet); ++ ++ break; ++ } ++#endif ++#endif*/ ++ rtw_list_delete(&pxmitframe->list); ++ ++ ptxservq->qcnt--; ++ ++ //rtw_list_insert_tail(&pxmitframe->list, &phwxmit->pending); ++ ++ //ptxservq->qcnt--; ++ ++ break; ++ ++ pxmitframe = NULL; ++ ++ } ++ ++ return pxmitframe; ++} ++ ++struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry) ++{ ++ _irqL irqL0; ++ _list *sta_plist, *sta_phead; ++ struct hw_xmit *phwxmit; ++ struct tx_servq *ptxservq = NULL; ++ _queue *pframe_queue = NULL; ++ struct xmit_frame *pxmitframe = NULL; ++ _adapter *padapter = pxmitpriv->adapter; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ int i, inx[4]; ++#ifdef CONFIG_USB_HCI ++// int j, tmp, acirp_cnt[4]; ++#endif ++ ++_func_enter_; ++ ++ inx[0] = 0; inx[1] = 1; inx[2] = 2; inx[3] = 3; ++ ++ if(pregpriv->wifi_spec==1) ++ { ++ int j, tmp, acirp_cnt[4]; ++#if 0 ++ if(flagsvo, 1->vi, 2->be, 3->bk. ++ acirp_cnt[0] = pxmitpriv->voq_cnt; ++ acirp_cnt[1] = pxmitpriv->viq_cnt; ++ acirp_cnt[2] = pxmitpriv->beq_cnt; ++ acirp_cnt[3] = pxmitpriv->bkq_cnt; ++ ++ for(i=0; i<4; i++) ++ { ++ for(j=i+1; j<4; j++) ++ { ++ if(acirp_cnt[j]lock, &irqL0); ++ ++ for(i = 0; i < entry; i++) ++ { ++ phwxmit = phwxmit_i + inx[i]; ++ ++ //_enter_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ sta_phead = get_list_head(phwxmit->sta_queue); ++ sta_plist = get_next(sta_phead); ++ ++ while ((rtw_end_of_queue_search(sta_phead, sta_plist)) == _FALSE) ++ { ++ ++ ptxservq= LIST_CONTAINOR(sta_plist, struct tx_servq, tx_pending); ++ ++ pframe_queue = &ptxservq->sta_pending; ++ ++ pxmitframe = dequeue_one_xmitframe(pxmitpriv, phwxmit, ptxservq, pframe_queue); ++ ++ if(pxmitframe) ++ { ++ phwxmit->accnt--; ++ ++ //Remove sta node when there is no pending packets. ++ if(_rtw_queue_empty(pframe_queue)) //must be done after get_next and before break ++ rtw_list_delete(&ptxservq->tx_pending); ++ ++ //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ goto exit; ++ } ++ ++ sta_plist = get_next(sta_plist); ++ ++ } ++ ++ //_exit_critical_ex(&phwxmit->sta_queue->lock, &irqL0); ++ ++ } ++ ++exit: ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++_func_exit_; ++ ++ return pxmitframe; ++} ++ ++#if 1 ++struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac) ++{ ++ struct tx_servq *ptxservq; ++ ++_func_enter_; ++ ++ switch (up) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ *(ac) = 3; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ *(ac) = 1; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ *(ac) = 0; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ *(ac) = 2; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); ++ break; ++ ++ } ++ ++_func_exit_; ++ ++ return ptxservq; ++} ++#else ++__inline static struct tx_servq *rtw_get_sta_pending ++ (_adapter *padapter, _queue **ppstapending, struct sta_info *psta, sint up) ++{ ++ struct tx_servq *ptxservq; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ ++_func_enter_; ++ ++#ifdef CONFIG_RTL8711 ++ ++ if(IS_MCAST(psta->hwaddr)) ++ { ++ ptxservq = &(psta->sta_xmitpriv.be_q); // we will use be_q to queue bc/mc frames in BCMC_stainfo ++ *ppstapending = &padapter->xmitpriv.bm_pending; ++ } ++ else ++#endif ++ { ++ switch (up) ++ { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++ *ppstapending = &padapter->xmitpriv.bk_pending; ++ (phwxmits+3)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BK \n")); ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++ *ppstapending = &padapter->xmitpriv.vi_pending; ++ (phwxmits+1)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VI\n")); ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++ *ppstapending = &padapter->xmitpriv.vo_pending; ++ (phwxmits+0)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : VO \n")); ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++ *ppstapending = &padapter->xmitpriv.be_pending; ++ (phwxmits+2)->accnt++; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_get_sta_pending : BE \n")); ++ break; ++ ++ } ++ ++ } ++ ++_func_exit_; ++ ++ return ptxservq; ++} ++#endif ++ ++/* ++ * Will enqueue pxmitframe to the proper queue, ++ * and indicate it to xx_pending list..... ++ */ ++s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ //_irqL irqL0; ++ u8 ac_index; ++ struct sta_info *psta; ++ struct tx_servq *ptxservq; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ sint res = _SUCCESS; ++ ++_func_enter_; ++ ++ if (pattrib->psta) { ++ psta = pattrib->psta; ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->ra); ++ } ++ ++ if (psta == NULL) { ++ res = _FAIL; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("rtw_xmit_classifier: psta == NULL\n")); ++ goto exit; ++ } ++ ++ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ++ ++ //_enter_critical(&pstapending->lock, &irqL0); ++ ++ if (rtw_is_list_empty(&ptxservq->tx_pending)) { ++ rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(phwxmits[ac_index].sta_queue)); ++ } ++ ++ //_enter_critical(&ptxservq->sta_pending.lock, &irqL1); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptxservq->sta_pending)); ++ ptxservq->qcnt++; ++ phwxmits[ac_index].accnt++; ++ ++ //_exit_critical(&ptxservq->sta_pending.lock, &irqL1); ++ ++ //_exit_critical(&pstapending->lock, &irqL0); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ ++void rtw_alloc_hwxmits(_adapter *padapter) ++{ ++ struct hw_xmit *hwxmits; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ pxmitpriv->hwxmit_entry = HWXMIT_ENTRY; ++ ++ pxmitpriv->hwxmits = (struct hw_xmit *)rtw_zmalloc(sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry); ++ ++ hwxmits = pxmitpriv->hwxmits; ++ ++ if(pxmitpriv->hwxmit_entry == 5) ++ { ++ //pxmitpriv->bmc_txqueue.head = 0; ++ //hwxmits[0] .phwtxqueue = &pxmitpriv->bmc_txqueue; ++ hwxmits[0] .sta_queue = &pxmitpriv->bm_pending; ++ ++ //pxmitpriv->vo_txqueue.head = 0; ++ //hwxmits[1] .phwtxqueue = &pxmitpriv->vo_txqueue; ++ hwxmits[1] .sta_queue = &pxmitpriv->vo_pending; ++ ++ //pxmitpriv->vi_txqueue.head = 0; ++ //hwxmits[2] .phwtxqueue = &pxmitpriv->vi_txqueue; ++ hwxmits[2] .sta_queue = &pxmitpriv->vi_pending; ++ ++ //pxmitpriv->bk_txqueue.head = 0; ++ //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; ++ hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; ++ ++ //pxmitpriv->be_txqueue.head = 0; ++ //hwxmits[4] .phwtxqueue = &pxmitpriv->be_txqueue; ++ hwxmits[4] .sta_queue = &pxmitpriv->be_pending; ++ ++ } ++ else if(pxmitpriv->hwxmit_entry == 4) ++ { ++ ++ //pxmitpriv->vo_txqueue.head = 0; ++ //hwxmits[0] .phwtxqueue = &pxmitpriv->vo_txqueue; ++ hwxmits[0] .sta_queue = &pxmitpriv->vo_pending; ++ ++ //pxmitpriv->vi_txqueue.head = 0; ++ //hwxmits[1] .phwtxqueue = &pxmitpriv->vi_txqueue; ++ hwxmits[1] .sta_queue = &pxmitpriv->vi_pending; ++ ++ //pxmitpriv->be_txqueue.head = 0; ++ //hwxmits[2] .phwtxqueue = &pxmitpriv->be_txqueue; ++ hwxmits[2] .sta_queue = &pxmitpriv->be_pending; ++ ++ //pxmitpriv->bk_txqueue.head = 0; ++ //hwxmits[3] .phwtxqueue = &pxmitpriv->bk_txqueue; ++ hwxmits[3] .sta_queue = &pxmitpriv->bk_pending; ++ } ++ else ++ { ++ ++ ++ } ++ ++ ++} ++ ++void rtw_free_hwxmits(_adapter *padapter) ++{ ++ struct hw_xmit *hwxmits; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ hwxmits = pxmitpriv->hwxmits; ++ if(hwxmits) ++ rtw_mfree((u8 *)hwxmits, (sizeof (struct hw_xmit) * pxmitpriv->hwxmit_entry)); ++} ++ ++void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry) ++{ ++ sint i; ++_func_enter_; ++ for(i = 0; i < entry; i++, phwxmit++) ++ { ++ //_rtw_spinlock_init(&phwxmit->xmit_lock); ++ //_rtw_init_listhead(&phwxmit->pending); ++ //phwxmit->txcmdcnt = 0; ++ phwxmit->accnt = 0; ++ } ++_func_exit_; ++} ++ ++ ++ ++#ifdef CONFIG_BR_EXT ++int rtw_br_client_tx(_adapter *padapter, struct sk_buff **pskb) ++{ ++ struct sk_buff *skb = *pskb; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ void dhcp_flag_bcast(_adapter *priv, struct sk_buff *skb); ++ int res, is_vlan_tag=0, i, do_nat25=1; ++ unsigned short vlan_hdr=0; ++ void *br_port = NULL; ++ ++ //mac_clone_handle_frame(priv, skb); ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ _enter_critical_bh(&padapter->br_ext_lock, &irqL); ++ if ( !(skb->data[0] & 1) && ++ br_port && ++ memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) != __constant_htons(ETH_P_8021Q) && ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP) && ++ !memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN) && padapter->scdb_entry) { ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ padapter->scdb_entry->ageing_timer = jiffies; ++ _exit_critical_bh(&padapter->br_ext_lock, &irqL); ++ } ++ else ++ //if (!priv->pmib->ethBrExtInfo.nat25_disable) ++ { ++// if (priv->dev->br_port && ++// !memcmp(skb->data+MACADDRLEN, priv->br_mac, MACADDRLEN)) { ++#if 1 ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ ++ if (!memcmp(skb->data+MACADDRLEN, padapter->br_mac, MACADDRLEN) && ++ (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP))) ++ memcpy(padapter->br_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); ++ ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_IP)) { ++ if (memcmp(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN)) { ++ void *scdb_findEntry(_adapter *priv, unsigned char *macAddr, unsigned char *ipAddr); ++ ++ if ((padapter->scdb_entry = (struct nat25_network_db_entry *)scdb_findEntry(padapter, ++ skb->data+MACADDRLEN, skb->data+WLAN_ETHHDR_LEN+12)) != NULL) { ++ memcpy(padapter->scdb_mac, skb->data+MACADDRLEN, MACADDRLEN); ++ memcpy(padapter->scdb_ip, skb->data+WLAN_ETHHDR_LEN+12, 4); ++ padapter->scdb_entry->ageing_timer = jiffies; ++ do_nat25 = 0; ++ } ++ } ++ else { ++ if (padapter->scdb_entry) { ++ padapter->scdb_entry->ageing_timer = jiffies; ++ do_nat25 = 0; ++ } ++ else { ++ memset(padapter->scdb_mac, 0, MACADDRLEN); ++ memset(padapter->scdb_ip, 0, 4); ++ } ++ } ++ } ++ _exit_critical_bh(&padapter->br_ext_lock, &irqL); ++#endif // 1 ++ if (do_nat25) ++ { ++ int nat25_db_handle(_adapter *priv, struct sk_buff *skb, int method); ++ if (nat25_db_handle(padapter, skb, NAT25_CHECK) == 0) { ++ struct sk_buff *newskb; ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; ++ } ++ ++ newskb = skb_copy(skb, GFP_ATOMIC); ++ if (newskb == NULL) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: skb_copy fail!\n"); ++ //goto stop_proc; ++ return -1; ++ } ++ dev_kfree_skb_any(skb); ++ ++ *pskb = skb = newskb; ++ if (is_vlan_tag) { ++ vlan_hdr = *((unsigned short *)(skb->data+MACADDRLEN*2+2)); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2-i*2)) = *((unsigned short *)(skb->data+MACADDRLEN*2-2-i*2)); ++ skb_pull(skb, 4); ++ } ++ } ++ ++ if (skb_is_nonlinear(skb)) ++ DEBUG_ERR("%s(): skb_is_nonlinear!!\n", __FUNCTION__); ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ res = skb_linearize(skb, GFP_ATOMIC); ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ res = skb_linearize(skb); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18)) ++ if (res < 0) { ++ DEBUG_ERR("TX DROP: skb_linearize fail!\n"); ++ //goto free_and_stop; ++ return -1; ++ } ++ ++ res = nat25_db_handle(padapter, skb, NAT25_INSERT); ++ if (res < 0) { ++ if (res == -2) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: nat25_db_handle fail!\n"); ++ //goto free_and_stop; ++ return -1; ++ ++ } ++ // we just print warning message and let it go ++ DEBUG_WARN("%s()-%d: nat25_db_handle INSERT Warning!\n", __FUNCTION__, __LINE__); ++ //return -1; // return -1 will cause system crash on 2011/08/30! ++ return 0; ++ } ++ } ++ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ ++ dhcp_flag_bcast(padapter, skb); ++ ++ if (is_vlan_tag) { ++ skb_push(skb, 4); ++ for (i=0; i<6; i++) ++ *((unsigned short *)(skb->data+i*2)) = *((unsigned short *)(skb->data+4+i*2)); ++ *((unsigned short *)(skb->data+MACADDRLEN*2)) = __constant_htons(ETH_P_8021Q); ++ *((unsigned short *)(skb->data+MACADDRLEN*2+2)) = vlan_hdr; ++ } ++ } ++#if 0 ++ else{ ++ if (*((unsigned short *)(skb->data+MACADDRLEN*2)) == __constant_htons(ETH_P_8021Q)) { ++ is_vlan_tag = 1; ++ } ++ ++ if(is_vlan_tag){ ++ if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A_VALN(skb->data)){ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ } ++ }else ++ { ++ if(ICMPV6_MCAST_MAC(skb->data) && ICMPV6_PROTO1A(skb->data)){ ++ memcpy(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN); ++ } ++ } ++ } ++#endif // 0 ++ ++ // check if SA is equal to our MAC ++ if (memcmp(skb->data+MACADDRLEN, GET_MY_HWADDR(padapter), MACADDRLEN)) { ++ //priv->ext_stats.tx_drops++; ++ DEBUG_ERR("TX DROP: untransformed frame SA:%02X%02X%02X%02X%02X%02X!\n", ++ skb->data[6],skb->data[7],skb->data[8],skb->data[9],skb->data[10],skb->data[11]); ++ //goto free_and_stop; ++ return -1; ++ } ++ } ++ return 0; ++} ++#endif // CONFIG_BR_EXT ++ ++static void do_queue_select(_adapter *padapter, struct pkt_attrib *pattrib) ++{ ++ u8 qsel; ++ ++ qsel = pattrib->priority; ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("### do_queue_select priority=%d ,qsel = %d\n",pattrib->priority ,qsel)); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ qsel = 7;// ++#endif ++ ++ pattrib->qsel = qsel; ++} ++ ++/* ++ * The main transmit(tx) entry ++ * ++ * Return ++ * 1 enqueue ++ * 0 success, hardware will handle this xmit frame(packet) ++ * <0 fail ++ */ ++s32 rtw_xmit(_adapter *padapter, _pkt **ppkt) ++{ ++#ifdef CONFIG_AP_MODE ++ _irqL irqL0; ++#endif ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame *pxmitframe = NULL; ++#ifdef CONFIG_BR_EXT ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ void *br_port = NULL; ++#endif // CONFIG_BR_EXT ++ ++ s32 res; ++ ++ ++ pxmitframe = rtw_alloc_xmitframe(pxmitpriv); ++ if (pxmitframe == NULL) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: no more pxmitframe\n")); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s no more pxmitframe\n", __FUNCTION__); ++ #endif ++ return -1; ++ } ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ if( br_port && check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ res = rtw_br_client_tx(padapter, ppkt); ++ if (res == -1) ++ return -1; ++ } ++ ++#endif // CONFIG_BR_EXT ++ ++ res = update_attrib(padapter, *ppkt, &pxmitframe->attrib); ++ if (res == _FAIL) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit: update attrib fail\n")); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s update attrib fail\n", __FUNCTION__); ++ #endif ++ rtw_free_xmitframe(pxmitpriv, pxmitframe); ++ return -1; ++ } ++ pxmitframe->pkt = *ppkt; ++ ++ rtw_led_control(padapter, LED_CTL_TX); ++ ++ do_queue_select(padapter, &pxmitframe->attrib); ++ ++#ifdef CONFIG_AP_MODE ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ if(xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe) == _TRUE) ++ { ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ return 1; ++ } ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++#endif ++ ++ if (padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _FALSE) ++ return 1; ++ ++ return 0; ++} ++ ++#ifdef CONFIG_TDLS ++void process_enqueue_frame(_adapter *padapter, struct xmit_frame *pxmitframe, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct sta_info *ptdls_sta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); ++ ++ //enqueue frame for TDLS sleeping STA ++ rtw_list_delete(&pxmitframe->list); ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q)); ++ ptdls_sta->sleepq_len++; ++ ++ //indicate 4-AC queue bit in TDLS peer traffic indication ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ ptdls_sta->uapsd_bk = ptdls_sta->uapsd_bk | BIT(0); ++ break; ++ case 4: ++ case 5: ++ ptdls_sta->uapsd_vi = ptdls_sta->uapsd_vi | BIT(0); ++ break; ++ case 6: ++ case 7: ++ ptdls_sta->uapsd_vo = ptdls_sta->uapsd_vo | BIT(0); ++ break; ++ case 0: ++ case 3: ++ default: ++ ptdls_sta->uapsd_be = ptdls_sta->uapsd_be | BIT(0); ++ break; ++ } ++ ++ ptdls_sta->sleepq_ac_len++; ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++} ++ ++sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ sint ret=_FALSE; ++ ++ _irqL irqL; ++ struct sta_info *ptdls_sta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ int i; ++ ++ ptdls_sta=rtw_get_stainfo(pstapriv, pattrib->dst); ++ if(ptdls_sta==NULL){ ++ return ret; ++ }else if(ptdls_sta->tdls_sta_state&TDLS_LINKED_STATE){ ++ ++ if(pattrib->triggered==1) ++ { ++ ret = _TRUE; ++ return ret; ++ } ++ ++ _enter_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ ++ if(ptdls_sta->state&WIFI_SLEEP_STATE) ++ { ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&ptdls_sta->sleep_q)); ++ ++ ptdls_sta->sleepq_len++; ++ ptdls_sta->sleepq_ac_len++; ++ ++ //indicate 4-AC queue bit in TDLS peer traffic indication ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ ptdls_sta->uapsd_bk = ptdls_sta->uapsd_bk | BIT(1); ++ break; ++ case 4: ++ case 5: ++ ptdls_sta->uapsd_vi = ptdls_sta->uapsd_vi | BIT(1); ++ break; ++ case 6: ++ case 7: ++ ptdls_sta->uapsd_vo = ptdls_sta->uapsd_vo | BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ ptdls_sta->uapsd_be = ptdls_sta->uapsd_be | BIT(1); ++ break; ++ } ++ ++ if(ptdls_sta->sleepq_len==1) ++ { ++ //transmit TDLS PTI via AP ++ ptdls_sta->option=2; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_SD_PTI); ++ } ++ ret = _TRUE; ++ ++ } ++ ++ _exit_critical_bh(&ptdls_sta->sleep_q.lock, &irqL); ++ } ++ ++ return ret; ++ ++} ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ ++sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ sint ret=_FALSE; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ sint bmcst = IS_MCAST(pattrib->ra); ++#ifdef CONFIG_TDLS ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ if( ptdlsinfo->setup_state & TDLS_LINKED_STATE ) ++ { ++ ret = xmitframe_enqueue_for_tdls_sleeping_sta(padapter, pxmitframe); ++ return ret; ++ } ++#endif //CONFIG_TDLS ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ++ return ret; ++ ++ if(pattrib->psta) ++ { ++ psta = pattrib->psta; ++ } ++ else ++ { ++ psta=rtw_get_stainfo(pstapriv, pattrib->ra); ++ } ++ ++ if(psta==NULL) ++ return ret; ++ ++ if(pattrib->triggered==1) ++ { ++ //DBG_871X("directly xmit pspoll_triggered packet\n"); ++ ++ //pattrib->triggered=0; ++ ++ if(bmcst) ++ pattrib->qsel = 0x11;//HIQ ++ ++ ++ return ret; ++ } ++ ++ ++ if(bmcst) ++ { ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ if(pstapriv->sta_dz_bitmap)//if anyone sta is in ps mode ++ { ++ //pattrib->qsel = 0x11;//HIQ ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); ++ ++ psta->sleepq_len++; ++ ++ pstapriv->tim_bitmap |= BIT(0);// ++ pstapriv->sta_dz_bitmap |= BIT(0); ++ ++ //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE);//tx bc/mc packets after upate bcn ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ ret = _TRUE; ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ return ret; ++ ++ } ++ ++ ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ { ++ u8 wmmps_ac=0; ++ ++ if(pstapriv->sta_dz_bitmap&BIT(psta->aid)) ++ { ++ rtw_list_delete(&pxmitframe->list); ++ ++ //_enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ rtw_list_insert_tail(&pxmitframe->list, get_list_head(&psta->sleep_q)); ++ ++ psta->sleepq_len++; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(0); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(0); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(0); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(0); ++ break; ++ } ++ ++ if(wmmps_ac) ++ psta->sleepq_ac_len++; ++ ++ if(((psta->has_legacy_ac) && (!wmmps_ac)) ||((!psta->has_legacy_ac)&&(wmmps_ac))) ++ { ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ ++ //DBG_871X("enqueue, sq_len=%d, tim=%x\n", psta->sleepq_len, pstapriv->tim_bitmap); ++ ++ if(psta->sleepq_len==1) ++ { ++ //DBG_871X("sleepq_len==1, update BCNTIM\n"); ++ //upate BCN for TIM IE ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ } ++ ++ //_exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ //if(psta->sleepq_len > (NR_XMITFRAME>>3)) ++ //{ ++ // wakeup_sta_to_xmit(padapter, psta); ++ //} ++ ++ ret = _TRUE; ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ return ret; ++ ++} ++ ++static void dequeue_xmitframes_to_sleeping_queue(_adapter *padapter, struct sta_info *psta, _queue *pframequeue) ++{ ++ _list *plist, *phead; ++ u8 ac_index; ++ struct tx_servq *ptxservq; ++ struct pkt_attrib *pattrib; ++ struct xmit_frame *pxmitframe; ++ struct hw_xmit *phwxmits = padapter->xmitpriv.hwxmits; ++ ++ phead = get_list_head(pframequeue); ++ plist = get_next(phead); ++ ++ while (rtw_end_of_queue_search(phead, plist) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(plist, struct xmit_frame, list); ++ ++ plist = get_next(plist); ++ ++ xmitframe_enqueue_for_sleeping_sta(padapter, pxmitframe); ++ ++ pattrib = &pxmitframe->attrib; ++ ++ ptxservq = rtw_get_sta_pending(padapter, psta, pattrib->priority, (u8 *)(&ac_index)); ++ ++ ptxservq->qcnt--; ++ phwxmits[ac_index].accnt--; ++ } ++ ++} ++ ++void stop_sta_xmit(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL0; ++ struct sta_info *psta_bmc; ++ struct sta_xmit_priv *pstaxmitpriv; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ pstaxmitpriv = &psta->sta_xmitpriv; ++ ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ psta->state |= WIFI_SLEEP_STATE; ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) ++#endif //CONFIG_TDLS ++ pstapriv->sta_dz_bitmap |= BIT(psta->aid); ++ ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vo_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->vi_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->be_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ ++ ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta, &pstaxmitpriv->bk_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending)); ++ ++#ifdef CONFIG_TDLS ++ if( !(psta->tdls_sta_state & TDLS_LINKED_STATE) ) ++ { ++ if( psta_bmc != NULL ) ++ { ++#endif //CONFIG_TDLS ++ ++ ++ //for BC/MC Frames ++ pstaxmitpriv = &psta_bmc->sta_xmitpriv; ++ dequeue_xmitframes_to_sleeping_queue(padapter, psta_bmc, &pstaxmitpriv->be_q.sta_pending); ++ rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending)); ++ ++ ++#ifdef CONFIG_TDLS ++ } ++ } ++#endif //CONFIG_TDLS ++ _exit_critical_bh(&pxmitpriv->lock, &irqL0); ++ ++ ++} ++ ++void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ u8 update_mask=0, wmmps_ac=0; ++ struct sta_info *psta_bmc; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ switch(pxmitframe->attrib.priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ psta->sleepq_len--; ++ if(psta->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ if(wmmps_ac) ++ { ++ psta->sleepq_ac_len--; ++ if(psta->sleepq_ac_len>0) ++ { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } ++ else ++ { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ } ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ if(psta->sleepq_len==0) ++ { ++#ifdef CONFIG_TDLS ++ if( psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ if(psta->state&WIFI_SLEEP_STATE) ++ psta->state ^= WIFI_SLEEP_STATE; ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ return; ++ } ++#endif ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_mask = BIT(0); ++ ++ if(psta->state&WIFI_SLEEP_STATE) ++ psta->state ^= WIFI_SLEEP_STATE; ++ ++ pstapriv->sta_dz_bitmap &= ~BIT(psta->aid); ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ ++ //for BC/MC Frames ++ psta_bmc = rtw_get_bcmc_stainfo(padapter); ++ if(!psta_bmc) ++ return; ++ ++ if((pstapriv->sta_dz_bitmap&0xfffe) == 0x0)//no any sta in ps mode ++ { ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta_bmc->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta_bmc->sleepq_len--; ++ if(psta_bmc->sleepq_len>0) ++ pxmitframe->attrib.mdata = 1; ++ else ++ pxmitframe->attrib.mdata = 0; ++ ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ _enter_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++ ++ if(psta_bmc->sleepq_len==0) ++ { ++ pstapriv->tim_bitmap &= ~BIT(0); ++ pstapriv->sta_dz_bitmap &= ~BIT(0); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_mask |= BIT(1); ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta_bmc->sleep_q.lock, &irqL); ++ ++ } ++ ++ ++ if(update_mask) ++ { ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ } ++ ++} ++ ++void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ u8 wmmps_ac=0; ++ _list *xmitframe_plist, *xmitframe_phead; ++ struct xmit_frame *pxmitframe=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&psta->sleep_q); ++ xmitframe_plist = get_next(xmitframe_phead); ++ ++ while ((rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist)) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ switch(pxmitframe->attrib.priority) ++ { ++ case 1: ++ case 2: ++ wmmps_ac = psta->uapsd_bk&BIT(1); ++ break; ++ case 4: ++ case 5: ++ wmmps_ac = psta->uapsd_vi&BIT(1); ++ break; ++ case 6: ++ case 7: ++ wmmps_ac = psta->uapsd_vo&BIT(1); ++ break; ++ case 0: ++ case 3: ++ default: ++ wmmps_ac = psta->uapsd_be&BIT(1); ++ break; ++ } ++ ++ if(!wmmps_ac) ++ continue; ++ ++ rtw_list_delete(&pxmitframe->list); ++ ++ psta->sleepq_len--; ++ psta->sleepq_ac_len--; ++ ++ if(psta->sleepq_ac_len>0) ++ { ++ pxmitframe->attrib.mdata = 1; ++ pxmitframe->attrib.eosp = 0; ++ } ++ else ++ { ++ pxmitframe->attrib.mdata = 0; ++ pxmitframe->attrib.eosp = 1; ++ } ++ ++ pxmitframe->attrib.triggered = 1; ++ ++ if(padapter->HalFunc.hal_xmit(padapter, pxmitframe) == _TRUE) ++ { ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ } ++ ++ if((psta->sleepq_ac_len==0) && (!psta->has_legacy_ac) && (wmmps_ac)) ++ { ++#ifdef CONFIG_TDLS ++ if(psta->tdls_sta_state & TDLS_LINKED_STATE ) ++ { ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ return; ++ } ++#endif //CONFIG_TDLS ++ pstapriv->tim_bitmap &= ~BIT(psta->aid); ++ ++ //DBG_871X("wakeup to xmit, qlen==0, update_BCNTIM, tim=%x\n", pstapriv->tim_bitmap); ++ //upate BCN for TIM IE ++ //update_BCNTIM(padapter); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ //update_mask = BIT(0); ++ } ++ ++ } ++ ++ _exit_critical_bh(&psta->sleep_q.lock, &irqL); ++ ++} ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/hal_init.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/hal_init.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,120 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#define _HAL_INIT_C_ ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++ #include ++#elif defined(CONFIG_USB_HCI) ++ #include ++#endif ++ ++void intf_chip_configure(_adapter *padapter) ++{ ++ if(padapter->HalFunc.intf_chip_configure) ++ padapter->HalFunc.intf_chip_configure(padapter); ++} ++ ++void intf_read_chip_info(_adapter *padapter) ++{ ++ if(padapter->HalFunc.read_adapter_info) ++ padapter->HalFunc.read_adapter_info(padapter); ++} ++ ++void intf_read_chip_version(_adapter *padapter) ++{ ++ if(padapter->HalFunc.read_chip_version) ++ padapter->HalFunc.read_chip_version(padapter); ++} ++ ++void rtw_dm_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.dm_init) ++ padapter->HalFunc.dm_init(padapter); ++} ++ ++void rtw_sw_led_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.InitSwLeds) ++ padapter->HalFunc.InitSwLeds(padapter); ++} ++ ++void rtw_sw_led_deinit(_adapter *padapter) ++{ ++ if(padapter->HalFunc.DeInitSwLeds) ++ padapter->HalFunc.DeInitSwLeds(padapter); ++} ++ ++uint rtw_hal_init(_adapter *padapter) ++{ ++ uint status = _SUCCESS; ++ ++ padapter->hw_init_completed=_FALSE; ++ ++ status = padapter->HalFunc.hal_init(padapter); ++ ++ if(status == _SUCCESS){ ++ padapter->hw_init_completed = _TRUE; ++ } ++ else{ ++ padapter->hw_init_completed = _FALSE; ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("rtw_hal_init: hal__init fail\n")); ++ } ++ ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("-rtl871x_hal_init:status=0x%x\n",status)); ++ ++ return status; ++ ++} ++ ++uint rtw_hal_deinit(_adapter *padapter) ++{ ++ uint status = _SUCCESS; ++ ++_func_enter_; ++ ++ status = padapter->HalFunc.hal_deinit(padapter); ++ ++ if(status == _SUCCESS){ ++ padapter->hw_init_completed = _FALSE; ++ } ++ else ++ { ++ RT_TRACE(_module_hal_init_c_,_drv_err_,("\n rtw_hal_deinit: hal_init fail\n")); ++ } ++ ++_func_exit_; ++ ++ return status; ++ ++} ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtw_sreset_init(_adapter *padapter) ++{ ++ if(padapter->HalFunc.sreset_init_value) ++ padapter->HalFunc.sreset_init_value(padapter); ++} ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_cmd.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1361 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTL8192C_CMD_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++ ++#if 0 ++static BOOLEAN ++CheckWriteMSG( ++ IN PADAPTER Adapter, ++ IN u8 BoxNum ++) ++{ ++ u8 valHMETFR; ++ BOOLEAN Result = _FALSE; ++ ++ valHMETFR = rtw_read8(Adapter, REG_HMETFR); ++ ++ //DbgPrint("CheckWriteH2C(): Reg[0x%2x] = %x\n",REG_HMETFR, valHMETFR); ++ ++ if(((valHMETFR>>BoxNum)&BIT0) == 1) ++ Result = _TRUE; ++ ++ return Result; ++ ++} ++ ++static BOOLEAN CheckFwReadLastMSG( ++ IN PADAPTER Adapter, ++ IN u8 BoxNum ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 valHMETFR, valMCUTST_1; ++ BOOLEAN Result = _FALSE; ++ ++ valHMETFR = rtw_read8(Adapter, REG_HMETFR); ++ valMCUTST_1 = rtw_read8(Adapter, (REG_MCUTST_1+BoxNum)); ++ ++ //DbgPrint("REG[%x] = %x, REG[%x] = %x\n", ++ // REG_HMETFR, valHMETFR, REG_MCUTST_1+BoxNum, valMCUTST_1 ); ++ ++ // Do not seperate to 91C and 88C, we use the same setting. Suggested by SD4 Filen. 2009.12.03. ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ if(((valHMETFR>>BoxNum)&BIT0) == 0) ++ Result = _TRUE; ++ } ++ else ++ { ++ if((((valHMETFR>>BoxNum)&BIT0) == 0) && (valMCUTST_1 == 0)) ++ { ++ Result = _TRUE; ++ } ++ } ++ ++ return Result; ++} ++#endif ++ ++ ++#define RTL92C_MAX_H2C_BOX_NUMS 4 ++#define RTL92C_MAX_CMD_LEN 5 ++#define MESSAGE_BOX_SIZE 4 ++#define EX_MESSAGE_BOX_SIZE 2 ++ ++static u8 _is_fw_read_cmd_down(_adapter* padapter, u8 isvern, u8 msgbox_num) ++{ ++ u8 read_down = _FALSE; ++ int retry_cnts = 100; ++ ++ u8 valid; ++ ++// DBG_8192C(" _is_fw_read_cmd_down ,isnormal_chip(%x),reg_1cc(%x),msg_box(%d)...\n",isvern,rtw_read8(padapter,REG_HMETFR),msgbox_num); ++ ++ do{ ++ valid = rtw_read8(padapter,REG_HMETFR) & BIT(msgbox_num); ++ if(isvern){ ++ if(0 == valid ){ ++ read_down = _TRUE; ++ } ++ } ++ else{ ++ if((0 == valid) && (0 == rtw_read8(padapter, REG_MCUTST_1+msgbox_num))){ ++ read_down = _TRUE; ++ } ++ } ++ }while( (!read_down) && (retry_cnts--)); ++ ++ return read_down; ++ ++} ++ ++ ++/***************************************** ++* H2C Msg format : ++*| 31 - 8 |7 | 6 - 0 | ++*| h2c_msg |Ext_bit |CMD_ID | ++* ++******************************************/ ++int rtl8192c_FillH2CCmd(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer) ++{ ++#if 1 ++ u8 bcmd_down = _FALSE; ++ int retry_cnts = 100; ++ u8 h2c_box_num; ++ u32 msgbox_addr; ++ u32 msgbox_ex_addr; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 isnchip =IS_NORMAL_CHIP(pHalData->VersionID); ++ u32 h2c_cmd = 0; ++ u16 h2c_cmd_ex = 0; ++ int ret = _FAIL; ++ ++ _func_enter_; ++ ++ if(!pCmdBuffer){ ++ goto exit; ++ } ++ if(CmdLen > RTL92C_MAX_CMD_LEN){ ++ goto exit; ++ } ++ //pay attention to if race condition happened in H2C cmd setting. ++ do{ ++ h2c_box_num = pHalData->LastHMEBoxNum; ++ ++ if(!_is_fw_read_cmd_down(padapter, isnchip, h2c_box_num)){ ++ DBG_8192C(" fw read cmd failed...\n"); ++ goto exit; ++ } ++ ++ if(CmdLen<=3) ++ { ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer, CmdLen ); ++ } ++ else{ ++ _rtw_memcpy((u8*)(&h2c_cmd_ex), pCmdBuffer, EX_MESSAGE_BOX_SIZE); ++ _rtw_memcpy((u8*)(&h2c_cmd)+1, pCmdBuffer+2,( CmdLen-EX_MESSAGE_BOX_SIZE)); ++ *(u8*)(&h2c_cmd) |= BIT(7); ++ } ++ ++ *(u8*)(&h2c_cmd) |= ElementID; ++ ++ if(h2c_cmd & BIT(7)){ ++ msgbox_ex_addr = REG_HMEBOX_EXT_0 + (h2c_box_num *EX_MESSAGE_BOX_SIZE); ++ h2c_cmd_ex = cpu_to_le16( h2c_cmd_ex ); ++ rtw_write16(padapter, msgbox_ex_addr, h2c_cmd_ex); ++ } ++ msgbox_addr =REG_HMEBOX_0 + (h2c_box_num *MESSAGE_BOX_SIZE); ++ h2c_cmd = cpu_to_le32( h2c_cmd ); ++ rtw_write32(padapter,msgbox_addr, h2c_cmd); ++ ++ if(!isnchip){//for Test chip ++ if(! (rtw_read8(padapter, REG_HMETFR) & BIT(h2c_box_num))){ ++ DBG_8192C("Chip test - check fw write failed, write again..\n"); ++ continue; ++ } ++ // Fill H2C protection register. ++ rtw_write8(padapter,REG_MCUTST_1+h2c_box_num, 0xFF); ++ } ++ bcmd_down = _TRUE; ++ ++ // DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" ++ // ,pHalData->LastHMEBoxNum ,CmdLen,msgbox_addr,h2c_cmd,msgbox_ex_addr,h2c_cmd_ex); ++ ++ pHalData->LastHMEBoxNum = (h2c_box_num+1) % RTL92C_MAX_H2C_BOX_NUMS ; ++ ++ }while((!bcmd_down) && (retry_cnts--)); ++/* ++ if(bcmd_down) ++ DBG_8192C("H2C Cmd exe down. \n" ); ++ else ++ DBG_8192C("H2C Cmd exe failed. \n" ); ++*/ ++ ret = _SUCCESS; ++ _func_exit_; ++ ++#else ++ u8 BoxNum; ++ u16 BOXReg, BOXExtReg; ++ u8 BoxContent[4], BoxExtContent[2]; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 BufIndex=0; ++ u8 bWriteSucess = _FALSE; ++ u8 IsFwRead = _FALSE; ++ u8 WaitH2cLimmit = 100; ++ ++ u32 h2c_cmd = 0; ++ u16 h2c_cmd_ex = 0; ++ ++_func_enter_; ++ ++ //DBG_8192C("FillH2CCmd : ElementID=%d \n",ElementID); ++ ++ while(!bWriteSucess) ++ { ++ // 2. Find the last BOX number which has been writen. ++ BoxNum = pHalData->LastHMEBoxNum; ++ switch(BoxNum) ++ { ++ case 0: ++ BOXReg = REG_HMEBOX_0; ++ BOXExtReg = REG_HMEBOX_EXT_0; ++ break; ++ case 1: ++ BOXReg = REG_HMEBOX_1; ++ BOXExtReg = REG_HMEBOX_EXT_1; ++ break; ++ case 2: ++ BOXReg = REG_HMEBOX_2; ++ BOXExtReg = REG_HMEBOX_EXT_2; ++ break; ++ case 3: ++ BOXReg = REG_HMEBOX_3; ++ BOXExtReg = REG_HMEBOX_EXT_3; ++ break; ++ default: ++ break; ++ } ++ ++ // 3. Check if the box content is empty. ++ IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); ++ while(!IsFwRead) ++ { ++ //wait until Fw read ++ WaitH2cLimmit--; ++ if(WaitH2cLimmit == 0) ++ { ++ DBG_8192C("FillH2CCmd92C(): Wating too long for FW read clear HMEBox(%d)!!!\n", BoxNum); ++ break; ++ } ++ rtw_msleep_os(10); //us ++ IsFwRead = CheckFwReadLastMSG(padapter, BoxNum); ++ //U1btmp = PlatformEFIORead1Byte(Adapter, 0x1BF); ++ //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C(): Wating for FW read clear HMEBox(%d)!!! 0x1BF = %2x\n", BoxNum, U1btmp)); ++ } ++ ++ // If Fw has not read the last H2C cmd, break and give up this H2C. ++ if(!IsFwRead) ++ { ++ DBG_8192C("FillH2CCmd92C(): Write H2C register BOX[%d] fail!!!!! Fw do not read. \n", BoxNum); ++ break; ++ } ++ ++ // 4. Fill the H2C cmd into box ++ _rtw_memset(BoxContent, 0, sizeof(BoxContent)); ++ _rtw_memset(BoxExtContent, 0, sizeof(BoxExtContent)); ++ ++ BoxContent[0] = ElementID; // Fill element ID ++ ++ //DBG_8192C("FillH2CCmd92C():Write ElementID BOXReg(%4x) = %2x \n", BOXReg, ElementID); ++ ++ switch(CmdLen) ++ { ++ case 1: ++ { ++ BoxContent[0] &= ~(BIT7); ++ _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 1); ++ rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); ++ h2c_cmd = *((u32*)BoxContent); ++ break; ++ } ++ case 2: ++ { ++ BoxContent[0] &= ~(BIT7); ++ _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 2); ++ rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); ++ h2c_cmd = *((u32*)BoxContent); ++ break; ++ } ++ case 3: ++ { ++ BoxContent[0] &= ~(BIT7); ++ _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex, 3); ++ rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); ++ h2c_cmd = *((u32*)BoxContent); ++ break; ++ } ++ case 4: ++ { ++ BoxContent[0] |= (BIT7); ++ _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); ++ _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 2); ++ rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); ++ rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); ++ h2c_cmd = *((u32*)BoxContent); ++ h2c_cmd_ex = *((u32*)BoxExtContent); ++ break; ++ } ++ case 5: ++ { ++ BoxContent[0] |= (BIT7); ++ _rtw_memcpy((u8*)(BoxExtContent), pCmdBuffer+BufIndex, 2); ++ _rtw_memcpy((u8*)(BoxContent)+1, pCmdBuffer+BufIndex+2, 3); ++ rtw_write16(padapter, BOXExtReg, *((u16*)BoxExtContent)); ++ rtw_write32(padapter, BOXReg, *((u32*)BoxContent)); ++ h2c_cmd = *((u32*)BoxContent); ++ h2c_cmd_ex = *((u32*)BoxExtContent); ++ break; ++ } ++ default: ++ break; ++ ++ } ++ ++ ++ DBG_8192C("MSG_BOX:%d,CmdLen(%d), reg:0x%x =>h2c_cmd:0x%x, reg:0x%x =>h2c_cmd_ex:0x%x ..\n" ++ ,pHalData->LastHMEBoxNum ,CmdLen,BOXReg,h2c_cmd,BOXExtReg,h2c_cmd_ex); ++ ++ //DBG_8192C("FillH2CCmd(): BoxExtContent=0x%x\n", *(u16*)BoxExtContent); ++ //DBG_8192C("FillH2CCmd(): BoxContent=0x%x\n", *(u32*)BoxContent); ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ // 5. Normal chip does not need to check if the H2C cmd has be written successfully. ++ bWriteSucess = _TRUE; ++ } ++ else ++ { ++ // 5. Check if the H2C cmd has be written successfully. ++ bWriteSucess = CheckWriteMSG(padapter, BoxNum); ++ if(!bWriteSucess) //If not then write again. ++ continue; ++ ++ //6. Fill H2C protection register. ++ ++ rtw_write8(padapter, REG_MCUTST_1+BoxNum, 0xFF); ++ //RT_TRACE(COMP_CMD, DBG_LOUD, ("FillH2CCmd92C():Write Reg(%4x) = 0xFF \n", REG_MCUTST_1+BoxNum)); ++ } ++ ++ // Record the next BoxNum ++ pHalData->LastHMEBoxNum = BoxNum+1; ++ if(pHalData->LastHMEBoxNum == 4) // loop to 0 ++ pHalData->LastHMEBoxNum = 0; ++ ++ //DBG_8192C("FillH2CCmd92C():pHalData->LastHMEBoxNum = %d\n", pHalData->LastHMEBoxNum); ++ ++ } ++ ++_func_exit_; ++ ++#endif ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ //_exit_critical_mutex(padapter->ph2c_fwcmd_mutex, NULL); ++#endif ++exit: ++ return ret; ++ ++} ++ ++u8 rtl8192c_h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf) ++{ ++ u8 ElementID, CmdLen; ++ u8 *pCmdBuffer; ++ struct cmd_msg_parm *pcmdmsg; ++ ++ if(!pbuf) ++ return H2C_PARAMETERS_ERROR; ++ ++ pcmdmsg = (struct cmd_msg_parm*)pbuf; ++ ElementID = pcmdmsg->eid; ++ CmdLen = pcmdmsg->sz; ++ pCmdBuffer = pcmdmsg->buf; ++ ++ rtl8192c_FillH2CCmd(padapter, ElementID, CmdLen, pCmdBuffer); ++ ++ return H2C_SUCCESS; ++} ++ ++#if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) ++u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter *padapter ,u8 bfwpoll, u16 period) ++{ ++ u8 res=_SUCCESS; ++ struct H2C_SS_RFOFF_PARAM param; ++ DBG_8192C("==>%s bfwpoll(%x)\n",__FUNCTION__,bfwpoll); ++ param.gpio_period = period;//Polling GPIO_11 period time ++ param.ROFOn = (_TRUE == bfwpoll)?1:0; ++ rtl8192c_FillH2CCmd(padapter, SELECTIVE_SUSPEND_ROF_CMD, sizeof(param), (u8*)(¶m)); ++ return res; ++} ++#endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED ++ ++u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param) ++{ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ *((u32*) param ) = cpu_to_le32( *((u32*) param ) ); ++ ++ rtl8192c_FillH2CCmd(padapter, RSSI_SETTING_EID, 3, param); ++ ++_func_exit_; ++ ++ return res; ++} ++ ++u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg) ++{ ++ u8 buf[5]; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_memset(buf, 0, 5); ++ mask = cpu_to_le32( mask ); ++ _rtw_memcpy(buf, &mask, 4); ++ buf[4] = arg; ++ ++ rtl8192c_FillH2CCmd(padapter, MACID_CONFIG_EID, 5, buf); ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++u8 rtl8192c_set_ext_macid_period_cmd(_adapter*padapter, u8 period) ++{ ++ u8 ext_macid_period=0; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ext_macid_period=period; ++ ++ rtl8192c_FillH2CCmd(padapter, EXT_MACID_PERIOD_EID, 1, &ext_macid_period); ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg) ++{ ++ u8 buf[5]; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ _rtw_memset(buf, 0, 5); ++ mask = cpu_to_le32( mask ); ++ _rtw_memcpy(buf, &mask, 4); ++ buf[4] = arg; ++ ++ rtl8192c_FillH2CCmd(padapter, MACID64_CONFIG_EID, 5, buf); ++ ++_func_exit_; ++ ++ return res; ++ ++} ++//bitmap[0:27] = tx_rate_bitmap ++//bitmap[28:31]= Rate Adaptive id ++//arg[0:4] = macid ++//arg[5] = Short GI ++void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ DBG_8192C("%s() pHalData->fw_ractrl == _TRUE\n",__FUNCTION__); ++#ifdef SUPPORT_64_STA ++ if(mac_id >=FW_CTRL_MACID){ ++ rtl8192c_set_ext_macid_period_cmd(pAdapter,20); ++ rtl8192c_set_raid64_cmd(pAdapter, bitmap, arg); ++ DBG_8192C("%s() rtl8192c_set_raid64_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); ++ } ++ else ++#endif //SUPPORT_64_STA ++ { ++ rtl8192c_set_raid_cmd(pAdapter, bitmap, arg); ++ DBG_8192C("%s() rtl8192c_set_raid_cmd, bitmap=0x%x, arg =0x%x\n",__FUNCTION__,bitmap,arg); ++ } ++ ++ } ++ else ++ { ++ u8 macid, init_rate, shortGIrate=_FALSE; ++ ++ init_rate = get_highest_rate_idx(bitmap&0x0fffffff)&0x3f; ++ ++ macid = arg&0x1f; ++ ++ shortGIrate = (arg&BIT(5)) ? _TRUE:_FALSE; ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ rtw_write8(pAdapter, (REG_INIDATA_RATE_SEL+macid), (u8)init_rate); ++ } ++ ++} ++ ++void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode) ++{ ++ SETPWRMODE_PARM H2CSetPwrMode; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ DBG_871X("%s(): Mode = %d, SmartPS = %d\n", __FUNCTION__,Mode,pwrpriv->smart_ps); ++ ++ H2CSetPwrMode.Mode = Mode; ++ ++ H2CSetPwrMode.SmartPS = pwrpriv->smart_ps; ++ ++ H2CSetPwrMode.BcnPassTime = 1;//pPSC->RegMaxLPSAwakeIntvl; ++ ++ rtl8192c_FillH2CCmd(padapter, SET_PWRMODE_EID, sizeof(H2CSetPwrMode), (u8 *)&H2CSetPwrMode); ++ ++_func_exit_; ++} ++ ++void ConstructBeacon(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 rate_len, pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(cur_network), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_BEACON); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pktlen = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ //timestamp will be inserted by hardware ++ pframe += 8; ++ pktlen += 8; ++ ++ // beacon interval: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_beacon_interval_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ // capability info: 2 bytes ++ _rtw_memcpy(pframe, (unsigned char *)(rtw_get_capability_from_ie(cur_network->IEs)), 2); ++ ++ pframe += 2; ++ pktlen += 2; ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ //DBG_871X("ie len=%d\n", cur_network->IELength); ++ pktlen += cur_network->IELength - sizeof(NDIS_802_11_FIXED_IEs); ++ _rtw_memcpy(pframe, cur_network->IEs+sizeof(NDIS_802_11_FIXED_IEs), pktlen); ++ ++ goto _ConstructBeacon; ++ } ++ ++ //below for ad-hoc mode ++ ++ // SSID ++ pframe = rtw_set_ie(pframe, _SSID_IE_, cur_network->Ssid.SsidLength, cur_network->Ssid.Ssid, &pktlen); ++ ++ // supported rates... ++ rate_len = rtw_get_rateset_len(cur_network->SupportedRates); ++ pframe = rtw_set_ie(pframe, _SUPPORTEDRATES_IE_, ((rate_len > 8)? 8: rate_len), cur_network->SupportedRates, &pktlen); ++ ++ // DS parameter set ++ pframe = rtw_set_ie(pframe, _DSSET_IE_, 1, (unsigned char *)&(cur_network->Configuration.DSConfig), &pktlen); ++ ++ if( (pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ++ { ++ u32 ATIMWindow; ++ // IBSS Parameter Set... ++ //ATIMWindow = cur->Configuration.ATIMWindow; ++ ATIMWindow = 0; ++ pframe = rtw_set_ie(pframe, _IBSS_PARA_IE_, 2, (unsigned char *)(&ATIMWindow), &pktlen); ++ } ++ ++ ++ //todo: ERP IE ++ ++ ++ // EXTERNDED SUPPORTED RATE ++ if (rate_len > 8) ++ { ++ pframe = rtw_set_ie(pframe, _EXT_SUPPORTEDRATES_IE_, (rate_len - 8), (cur_network->SupportedRates + 8), &pktlen); ++ } ++ ++ ++ //todo:HT for adhoc ++ ++_ConstructBeacon: ++ ++ if ((pktlen + TXDESC_SIZE) > 512) ++ { ++ DBG_871X("beacon frame too large\n"); ++ return; ++ } ++ ++ *pLength = pktlen; ++ ++ //DBG_871X("%s bcn_sz=%d\n", __FUNCTION__, pktlen); ++ ++} ++ ++void ConstructPSPoll(_adapter *padapter, u8 *pframe, u32 *pLength) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ // Frame control. ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ SetPwrMgt(fctrl); ++ SetFrameSubType(pframe, WIFI_PSPOLL); ++ ++ // AID. ++ SetDuration(pframe, (pmlmeinfo->aid | 0xc000)); ++ ++ // BSSID. ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ // TA. ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ *pLength = 16; ++} ++ ++void ConstructNullFunctionData(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bForcePowerSave) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u32 pktlen; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &pmlmepriv->cur_network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //DBG_871X("%s:%d\n", __FUNCTION__, bForcePowerSave); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ if (bForcePowerSave) ++ { ++ SetPwrMgt(fctrl); ++ } ++ ++ switch(cur_network->network.InfrastructureMode) ++ { ++ case Ndis802_11Infrastructure: ++ SetToDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, StaAddr, ETH_ALEN); ++ break; ++ case Ndis802_11APMode: ++ SetFrDs(fctrl); ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ break; ++ case Ndis802_11IBSS: ++ default: ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ break; ++ } ++ ++ SetSeqNum(pwlanhdr, 0); ++ ++ SetFrameSubType(pframe, WIFI_DATA_NULL); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ *pLength = pktlen; ++} ++ ++void ConstructProbeRsp(_adapter *padapter, u8 *pframe, u32 *pLength, u8 *StaAddr, BOOLEAN bHideSSID) ++{ ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ u16 *fctrl; ++ u8 *mac, *bssid; ++ u32 pktlen; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ mac = myid(&(padapter->eeprompriv)); ++ bssid = cur_network->MacAddress; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ _rtw_memcpy(pwlanhdr->addr1, StaAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, mac, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, bssid, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, 0); ++ SetFrameSubType(fctrl, WIFI_PROBERSP); ++ ++ pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ pframe += pktlen; ++ ++ if(cur_network->IELength>MAX_IE_SZ) ++ return; ++ ++ _rtw_memcpy(pframe, cur_network->IEs, cur_network->IELength); ++ pframe += cur_network->IELength; ++ pktlen += cur_network->IELength; ++ ++ *pLength = pktlen; ++} ++ ++// ++// Description: In normal chip, we should send some packet to Hw which will be used by Fw ++// in FW LPS mode. The function is to fill the Tx descriptor of this packets, then ++// Fw can tell Hw to send these packet derectly. ++// Added by tynli. 2009.10.15. ++// ++static VOID ++FillFakeTxDescriptor92C( ++ IN PADAPTER Adapter, ++ IN u8* pDesc, ++ IN u32 BufferLen, ++ IN BOOLEAN IsPsPoll ++) ++{ ++ struct tx_desc *ptxdesc = (struct tx_desc *)pDesc; ++ ++ // Clear all status ++ _rtw_memset(pDesc, 0, 32); ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32( OWN | FSG | LSG); //own, bFirstSeg, bLastSeg; ++ ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BufferLen&0x0000ffff); // Buffer size + command header ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((QSLT_MGNT<txdw1 |= cpu_to_le32(NAVUSEHDR); ++ } ++ else ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++#ifdef CONFIG_USB_HCI ++ // USB interface drop packet if the checksum of descriptor isn't correct. ++ // Using this checksum can let hardware recovery from packet bulk out error (e.g. Cancel URC, Bulk out error.). ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++#endif ++ ++ //RT_PRINT_DATA(COMP_CMD, DBG_TRACE, "TxFillCmdDesc8192C(): H2C Tx Cmd Content ----->\n", pDesc, TX_DESC_SIZE); ++} ++ ++// To check if reserved page content is destroyed by beacon beacuse beacon is too large. ++// 2010.06.23. Added by tynli. ++VOID ++CheckFwRsvdPageContent( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(Adapter); ++ u32 MaxBcnPageNum; ++ ++ if(pHalData->FwRsvdPageStartOffset != 0) ++ { ++ /*MaxBcnPageNum = PageNum_128(pMgntInfo->MaxBeaconSize); ++ RT_ASSERT((MaxBcnPageNum <= pHalData->FwRsvdPageStartOffset), ++ ("CheckFwRsvdPageContent(): The reserved page content has been"\ ++ "destroyed by beacon!!! MaxBcnPageNum(%d) FwRsvdPageStartOffset(%d)\n!", ++ MaxBcnPageNum, pHalData->FwRsvdPageStartOffset));*/ ++ } ++} ++ ++// ++// Description: Fill the reserved packets that FW will use to RSVD page. ++// Now we just send 4 types packet to rsvd page. ++// (1)Beacon, (2)Ps-poll, (3)Null data, (4)ProbeRsp. ++// Input: ++// bDLFinished - FALSE: At the first time we will send all the packets as a large packet to Hw, ++// so we need to set the packet length to total lengh. ++// TRUE: At the second time, we should send the first packet (default:beacon) ++// to Hw again and set the lengh in descriptor to the real beacon lengh. ++// 2009.10.15 by tynli. ++static void SetFwRsvdPagePkt(PADAPTER Adapter, BOOLEAN bDLFinished) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u32 BeaconLength, ProbeRspLength, PSPollLength, NullFunctionDataLength; ++ u8 *ReservedPagePacket; ++ u8 PageNum=0, U1bTmp, TxDescLen=0, TxDescOffset=0; ++ u16 BufIndex=0; ++ u32 TotalPacketLen; ++ RSVDPAGE_LOC RsvdPageLoc; ++ BOOLEAN bDLOK = _FALSE; ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ReservedPagePacket = (u8*)rtw_malloc(1000); ++ if(ReservedPagePacket == NULL){ ++ DBG_871X("%s(): alloc ReservedPagePacket fail !!!\n", __FUNCTION__); ++ return; ++ } ++ ++ _rtw_memset(ReservedPagePacket, 0, 1000); ++ ++ TxDescLen = 32;//TX_DESC_SIZE; ++ ++#ifdef CONFIG_USB_HCI ++ BufIndex = TXDESC_OFFSET; ++ TxDescOffset = TxDescLen+8; //Shift index for 8 bytes because the dummy bytes in the first descipstor. ++#else ++ BufIndex = 0; ++ TxDescOffset = 0; ++#endif ++ ++ //(1) beacon ++ ConstructBeacon(Adapter,&ReservedPagePacket[BufIndex],&BeaconLength); ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: BCN\n", &ReservedPagePacket[BufIndex], (BeaconLength+BufIndex)); ++ ++//-------------------------------------------------------------------- ++ ++ // When we count the first page size, we need to reserve description size for the RSVD ++ // packet, it will be filled in front of the packet in TXPKTBUF. ++ U1bTmp = (u8)PageNum_128(BeaconLength+TxDescLen); ++ PageNum += U1bTmp; ++ // To reserved 2 pages for beacon buffer. 2010.06.24. ++ if(PageNum == 1) ++ PageNum+=1; ++ pHalData->FwRsvdPageStartOffset = PageNum; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(2) ps-poll ++ ConstructPSPoll(Adapter, &ReservedPagePacket[BufIndex],&PSPollLength); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], PSPollLength, _TRUE); ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PS-POLL\n", &ReservedPagePacket[BufIndex-TxDescLen], (PSPollLength+TxDescLen)); ++ ++ RsvdPageLoc.LocPsPoll = PageNum; ++ ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(PSPollLength+TxDescLen); ++ PageNum += U1bTmp; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(3) null data ++ ConstructNullFunctionData( ++ Adapter, ++ &ReservedPagePacket[BufIndex], ++ &NullFunctionDataLength, ++ get_my_bssid(&(pmlmeinfo->network)), ++ _FALSE); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], NullFunctionDataLength, _FALSE); ++ ++ RsvdPageLoc.LocNullData = PageNum; ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: NULL DATA \n", &ReservedPagePacket[BufIndex-TxDescLen], (NullFunctionDataLength+TxDescLen)); ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(NullFunctionDataLength+TxDescLen); ++ PageNum += U1bTmp; ++ ++ BufIndex = (PageNum*128) + TxDescOffset; ++ ++ //(4) probe response ++ ConstructProbeRsp( ++ Adapter, ++ &ReservedPagePacket[BufIndex], ++ &ProbeRspLength, ++ get_my_bssid(&(pmlmeinfo->network)), ++ _FALSE); ++ ++ FillFakeTxDescriptor92C(Adapter, &ReservedPagePacket[BufIndex-TxDescLen], ProbeRspLength, _FALSE); ++ ++ RsvdPageLoc.LocProbeRsp = PageNum; ++ ++ //DBG_8192C("SetFwRsvdPagePkt(): HW_VAR_SET_TX_CMD: PROBE RSP \n", &ReservedPagePacket[BufIndex-TxDescLen], (ProbeRspLength-TxDescLen)); ++ ++//------------------------------------------------------------------ ++ ++ U1bTmp = (u8)PageNum_128(ProbeRspLength+TxDescLen); ++ ++ PageNum += U1bTmp; ++ ++ TotalPacketLen = (PageNum*128); ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(Adapter, pattrib); ++ pattrib->qsel = 0x10; ++ pattrib->pktlen = pattrib->last_txcmdsz = TotalPacketLen - TxDescLen; ++ _rtw_memcpy(pmgntframe->buf_addr, ReservedPagePacket, TotalPacketLen); ++ ++ Adapter->HalFunc.mgnt_xmit(Adapter, pmgntframe); ++ ++ bDLOK = _TRUE; ++ ++ if(bDLOK) ++ { ++ DBG_871X("Set RSVD page location to Fw.\n"); ++ rtl8192c_FillH2CCmd(Adapter, RSVD_PAGE_EID, sizeof(RsvdPageLoc), (u8 *)&RsvdPageLoc); ++ } ++ ++ rtw_mfree(ReservedPagePacket,1000); ++ ++} ++ ++void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus) ++{ ++ JOINBSSRPT_PARM JoinBssRptParm; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++_func_enter_; ++ ++ DBG_871X("%s mstatus(%x)\n", __FUNCTION__,mstatus); ++ ++ if(mstatus == 1) ++ { ++ // We should set AID, correct TSF, HW seq enable before set JoinBssReport to Fw in 88/92C. ++ // Suggested by filen. Added by tynli. ++ rtw_write16(padapter, REG_BCN_PSR_RPT, (0xC000|pmlmeinfo->aid)); ++ // Do not set TSF again here or vWiFi beacon DMA INT will not work. ++ //correct_TSF(padapter, pmlmeext); ++ // Hw sequende enable by dedault. 2010.06.23. by tynli. ++ //rtw_write16(padapter, REG_NQOS_SEQ, ((pmlmeext->mgnt_seq+100)&0xFFF)); ++ //rtw_write8(padapter, REG_HWSEQ_CTRL, 0xFF); ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ BOOLEAN bRecover = _FALSE; ++ ++ //set REG_CR bit 8 ++ //U1bTmp = rtw_read8(padapter, REG_CR+1); ++ rtw_write8(padapter, REG_CR+1, 0x03); ++ ++ // Disable Hw protection for a time which revserd for Hw sending beacon. ++ // Fix download reserved page packet fail that access collision with the protection time. ++ // 2010.05.11. Added by tynli. ++ //SetBcnCtrlReg(padapter, 0, BIT3); ++ //SetBcnCtrlReg(padapter, BIT4, 0); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(3))); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); ++ ++ // Set FWHW_TXQ_CTRL 0x422[6]=0 to tell Hw the packet is not a real beacon frame. ++ if(pHalData->RegFwHwTxQCtrl&BIT6) ++ bRecover = _TRUE; ++ ++ // To tell Hw the packet is not a real beacon frame. ++ //U1bTmp = rtw_read8(padapter, REG_FWHW_TXQ_CTRL+2); ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl&(~BIT6))); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ SetFwRsvdPagePkt(padapter, 0); ++ ++ // 2010.05.11. Added by tynli. ++ //SetBcnCtrlReg(padapter, BIT3, 0); ++ //SetBcnCtrlReg(padapter, 0, BIT4); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(3)); ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)&(~BIT(4))); ++ ++ // To make sure that if there exists an adapter which would like to send beacon. ++ // If exists, the origianl value of 0x422[6] will be 1, we should check this to ++ // prevent from setting 0x422[6] to 0 after download reserved page, or it will cause ++ // the beacon cannot be sent by HW. ++ // 2010.06.23. Added by tynli. ++ if(bRecover) ++ { ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl|BIT6)); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ } ++ ++ // Clear CR[8] or beacon packet will not be send to TxBuf anymore. ++ rtw_write8(padapter, REG_CR+1, 0x02); ++ } ++ } ++ ++ JoinBssRptParm.OpMode = mstatus; ++ ++ rtl8192c_FillH2CCmd(padapter, JOINBSS_RPT_EID, sizeof(JoinBssRptParm), (u8 *)&JoinBssRptParm); ++ ++_func_exit_; ++} ++ ++#ifdef CONFIG_P2P ++void rtl8192c_set_p2p_ctw_period_cmd(_adapter* padapter, u8 ctwindow) ++{ ++ struct P2P_PS_CTWPeriod_t p2p_ps_ctw; ++ ++ p2p_ps_ctw.CTWPeriod = ctwindow; ++ ++ rtl8192c_FillH2CCmd(padapter, P2P_PS_CTW_CMD_EID, 1, (u8 *)(&p2p_ps_ctw)); ++ ++} ++ ++void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ struct P2P_PS_Offload_t *p2p_ps_offload = &pHalData->p2p_ps_offload; ++ u8 i; ++ u16 ctwindow; ++ u32 start_time, tsf_low; ++ ++_func_enter_; ++ ++ switch(p2p_ps_state) ++ { ++ case P2P_PS_DISABLE: ++ DBG_8192C("P2P_PS_DISABLE \n"); ++ _rtw_memset(p2p_ps_offload, 0 ,1); ++ break; ++ case P2P_PS_ENABLE: ++ DBG_8192C("P2P_PS_ENABLE \n"); ++ // update CTWindow value. ++ if( pwdinfo->ctwindow > 0 ) ++ { ++ p2p_ps_offload->CTWindow_En = 1; ++ ctwindow = pwdinfo->ctwindow; ++ if(IS_HARDWARE_TYPE_8723(padapter)) ++ { ++ //rtw_write16(padapter, REG_ATIMWND, ctwindow); ++ } ++ else ++ { ++ rtl8192c_set_p2p_ctw_period_cmd(padapter, ctwindow); ++ } ++ } ++ ++ // hw only support 2 set of NoA ++ for( i=0 ; inoa_num ; i++) ++ { ++ // To control the register setting for which NOA ++ rtw_write8(padapter, 0x5CF, (i << 4)); ++ if(i == 0) ++ p2p_ps_offload->NoA0_En = 1; ++ else ++ p2p_ps_offload->NoA1_En = 1; ++ ++ // config P2P NoA Descriptor Register ++ rtw_write32(padapter, 0x5E0, pwdinfo->noa_duration[i]); ++ ++ rtw_write32(padapter, 0x5E4, pwdinfo->noa_interval[i]); ++ ++ //Get Current TSF value ++ tsf_low = rtw_read32(padapter, REG_TSFTR); ++ ++ start_time = pwdinfo->noa_start_time[i]; ++ if(pwdinfo->noa_count[i] != 1) ++ { ++ while( start_time <= (tsf_low+(50*1024) ) ) ++ { ++ start_time += pwdinfo->noa_interval[i]; ++ if(pwdinfo->noa_count[i] != 255) ++ pwdinfo->noa_count[i]--; ++ } ++ } ++ //DBG_8192C("%s(): start_time = %x\n",__FUNCTION__,start_time); ++ rtw_write32(padapter, 0x5E8, start_time); ++ ++ rtw_write8(padapter, 0x5EC, pwdinfo->noa_count[i]); ++ } ++ ++ if( (pwdinfo->opp_ps == 1) || (pwdinfo->noa_num > 0) ) ++ { ++ // rst p2p circuit ++ rtw_write8(padapter, REG_DUAL_TSF_RST, BIT(4)); ++ ++ p2p_ps_offload->Offload_En = 1; ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ p2p_ps_offload->role= 1; ++ p2p_ps_offload->AllStaSleep = 0; ++ } ++ else ++ { ++ p2p_ps_offload->role= 0; ++ } ++ ++ p2p_ps_offload->discovery = 0; ++ } ++ break; ++ case P2P_PS_SCAN: ++ DBG_8192C("P2P_PS_SCAN \n"); ++ p2p_ps_offload->discovery = 1; ++ break; ++ case P2P_PS_SCAN_DONE: ++ DBG_8192C("P2P_PS_SCAN_DONE \n"); ++ p2p_ps_offload->discovery = 0; ++ pwdinfo->p2p_ps = P2P_PS_ENABLE; ++ break; ++ default: ++ break; ++ } ++ ++ rtl8192c_FillH2CCmd(padapter, P2P_PS_OFFLOAD_EID, 1, (u8 *)p2p_ps_offload); ++ ++_func_exit_; ++ ++} ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_IOL ++#include ++int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms) ++{ ++ IO_OFFLOAD_LOC IoOffloadLoc; ++ u32 start_time = rtw_get_current_time(); ++ u32 passing_time_ms; ++ u8 polling_ret; ++ int ret = _FAIL; ++ ++ if (rtw_IOL_append_END_cmd(xmit_frame) != _SUCCESS) ++ goto exit; ++ ++ //adapter->HalFunc.mgnt_xmit(adapter, xmit_frame); ++ rtw_dump_xframe_sync(adapter, xmit_frame); ++ ++ IoOffloadLoc.LocCmd = 0; ++ if(_SUCCESS != rtl8192c_FillH2CCmd(adapter, H2C_92C_IO_OFFLOAD, sizeof(IO_OFFLOAD_LOC), (u8 *)&IoOffloadLoc)) ++ goto exit; ++ ++ //polling if the IO offloading is done ++ while( (passing_time_ms=rtw_get_passing_time_ms(start_time)) <= max_wating_ms) { ++ #if 0 //C2H ++ if(0xff == rtw_read8(adapter, REG_C2HEVT_CLEAR)) ++ break; ++ #else// 0x1c3 ++ if(0x00 != (polling_ret=rtw_read8(adapter, 0x1c3))) ++ break; ++ #endif ++ rtw_msleep_os(5); ++ } ++ #if 0 //debug ++ DBG_871X("IOL %s, polling_ret:0x%02x, 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" ++ , polling_ret==0xff?"success":"error" ++ , polling_ret ++ , rtw_read32(adapter, 0x1c0) ++ , rtw_read32(adapter, 0x1c4) ++ , rtw_read32(adapter, 0x1cc) ++ , rtw_read32(adapter, 0x1e8) ++ , rtw_read32(adapter, 0x130) ++ , rtw_read32(adapter, 0x134) ++ ); ++ rtw_write32(adapter, 0x1c0, 0x0); ++ #endif ++ ++ if(polling_ret == 0xff) ++ ret =_SUCCESS; ++ else { ++ DBG_871X("IOL %s, polling_ret:0x%02x\n" ++ //", 0x1c0=0x%08x, 0x1c4=0x%08x, 0x1cc=0x%08x, 0x1e8=0x%08x, 0x130=0x%08x, 0x134=0x%08x\n" ++ , polling_ret==0xff?"success":"error" ++ , polling_ret ++ //, rtw_read32(adapter, 0x1c0) ++ //, rtw_read32(adapter, 0x1c4) ++ //, rtw_read32(adapter, 0x1cc) ++ //, rtw_read32(adapter, 0x1e8) ++ //, rtw_read32(adapter, 0x130) ++ //, rtw_read32(adapter, 0x134) ++ ); ++ #if 0 //debug ++ rtw_write16(adapter, 0x1c4, 0x0000); ++ rtw_msleep_os(10); ++ DBG_871X("after reset, 0x1c4=0x%08x\n", rtw_read32(adapter, 0x1c4)); ++ #endif ++ ++ } ++ ++ { ++ #if 0 //C2H ++ u32 c2h_evt; ++ int i; ++ c2h_evt = rtw_read32(adapter, REG_C2HEVT_MSG_NORMAL); ++ DBG_871X("%s io-offloading complete, in %ums: 0x%08x\n", __FUNCTION__, passing_time_ms, c2h_evt); ++ rtw_write8(adapter, REG_C2HEVT_CLEAR, 0x0); ++ #else// 0x1c3 ++ DBG_871X("IOL %s complete in %ums\n", __FUNCTION__, passing_time_ms); ++ rtw_write8(adapter, 0x1c3, 0x0); ++ #endif ++ } ++ ++exit: ++ return ret; ++ ++} ++#endif //CONFIG_IOL ++ ++ ++#ifdef CONFIG_WOWLAN ++ ++void rtl8192c_set_wowlan_cmd(_adapter* padapter) ++{ ++ u8 res=_SUCCESS; ++ SETWOWLAN_PARM pwowlan_parm; ++ struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; ++ ++_func_enter_; ++ ++ pwowlan_parm.mode =0; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ pwowlan_parm.second_mode =0; ++ pwowlan_parm.reserve=0; ++ ++ if(pwrpriv->wowlan_mode ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_FUN_EN; ++ //printk("\n %s 1.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ if(pwrpriv->wowlan_pattern ==_TRUE){ ++ pwowlan_parm.mode |= FW_WOWLAN_PATTERN_MATCH; ++ //printk("\n %s 2.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ if(pwrpriv->wowlan_magic ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_MAGIC_PKT; ++ //printk("\n %s 3.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ if(pwrpriv->wowlan_unicast ==_TRUE){ ++ pwowlan_parm.mode |=FW_WOWLAN_UNICAST; ++ //printk("\n %s 4.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ } ++ //WOWLAN_GPIO_ACTIVE means GPIO high active ++ //pwowlan_parm.mode |=FW_WOWLAN_GPIO_ACTIVE; ++ pwowlan_parm.mode |=FW_WOWLAN_REKEY_WAKEUP; ++ pwowlan_parm.mode |=FW_WOWLAN_DEAUTH_WAKEUP; ++ ++ //GPIO3 ++ pwowlan_parm.gpio_index=3; ++ ++ //duration unit is 64us ++ pwowlan_parm.gpio_duration=0xff; ++ // ++ pwowlan_parm.second_mode|=FW_WOWLAN_GPIO_WAKEUP_EN; ++ //printk("\n %s 5.pwowlan_parm.mode=0x%x \n",__FUNCTION__,pwowlan_parm.mode ); ++ { u8 *ptr=(u8 *)&pwowlan_parm; ++ printk("\n %s H2C_WO_WLAN=%x %02x:%02x:%02x:%02x:%02x \n",__FUNCTION__,H2C_WO_WLAN_CMD,ptr[0],ptr[1],ptr[2],ptr[3],ptr[4] ); ++ } ++ rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 4, (u8 *)&pwowlan_parm); ++ ++ rtl8192c_set_FwJoinBssReport_cmd( padapter, 1); ++ //keep alive period = 3 * 10 BCN interval ++ pwowlan_parm.mode =3; ++ pwowlan_parm.gpio_index=3; ++ rtl8192c_FillH2CCmd(padapter, KEEP_ALIVE_CONTROL_CMD, 2, (u8 *)&pwowlan_parm); ++ printk("%s after KEEP_ALIVE_CONTROL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); ++ ++ pwowlan_parm.mode =1; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ rtl8192c_FillH2CCmd(padapter, DISCONNECT_DECISION_CTRL_CMD, 3, (u8 *)&pwowlan_parm); ++ printk("%s after DISCONNECT_DECISION_CTRL_CMD register 0x81=%x \n",__FUNCTION__,rtw_read8(padapter, 0x81)); ++ ++ //enable GPIO wakeup ++ pwowlan_parm.mode =1; ++ pwowlan_parm.gpio_index=0; ++ pwowlan_parm.gpio_duration=0; ++ rtl8192c_FillH2CCmd(padapter, REMOTE_WAKE_CTRL_CMD, 3, (u8 *)&pwowlan_parm); ++ } ++ else ++ rtl8192c_FillH2CCmd(padapter, H2C_WO_WLAN_CMD, 3, (u8 *)&pwowlan_parm); ++ ++ ++_func_exit_; ++ ++ return ; ++ ++} ++ ++#endif //CONFIG_WOWLAN ++ ++ ++ ++ ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_dm.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,4794 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++ ++//============================================================ ++// include files ++//============================================================ ++#include ++#include ++#include ++#include ++ ++#include ++ ++//============================================================ ++// Global var ++//============================================================ ++static u32 EDCAParam[maxAP][3] = ++{ // UL DL ++ {0x5ea322, 0x00a630, 0x00a44f}, //atheros AP ++ {0x5ea32b, 0x5ea42b, 0x5e4322}, //broadcom AP ++ {0x3ea430, 0x00a630, 0x3ea44f}, //cisco AP ++ {0x5ea44f, 0x00a44f, 0x5ea42b}, //marvell AP ++ {0x5ea422, 0x00a44f, 0x00a44f}, //ralink AP ++ //{0x5ea44f, 0x5ea44f, 0x5ea44f}, //realtek AP ++ {0xa44f, 0x5ea44f, 0x5e431c}, //realtek AP ++ {0x5ea42b, 0xa630, 0x5e431c}, //airgocap AP ++ {0x5ea42b, 0x5ea42b, 0x5ea42b}, //unknown AP ++// {0x5e4322, 0x00a44f, 0x5ea44f}, //unknown AP ++}; ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_DIGInit() ++ * ++ * Overview: Set DIG scheme init value. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * ++ *---------------------------------------------------------------------------*/ ++static void dm_DIGInit( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ ++ pDigTable->Dig_Enable_Flag = _TRUE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ ++ pDigTable->CurIGValue = 0x20; ++ pDigTable->PreIGValue = 0x0; ++ ++ pDigTable->CurSTAConnectState = pDigTable->PreSTAConnectState = DIG_STA_DISCONNECT; ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; ++ ++ pDigTable->RssiLowThresh = DM_DIG_THRESH_LOW; ++ pDigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; ++ ++ pDigTable->FALowThresh = DM_FALSEALARM_THRESH_LOW; ++ pDigTable->FAHighThresh = DM_FALSEALARM_THRESH_HIGH; ++ ++ ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ pDigTable->rx_gain_range_min = DM_DIG_MIN; ++ ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; ++ pDigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; ++ ++ pDigTable->PreCCKPDState = CCK_PD_STAGE_MAX; ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ ++ pDigTable->ForbiddenIGI = DM_DIG_MIN; ++ pDigTable->LargeFAHit = 0; ++ pDigTable->Recover_cnt = 0; ++ pdmpriv->DIG_Dynamic_MIN = 0x25; //for FUNAI_TV ++} ++ ++ ++static u8 dm_initial_gain_MinPWDB( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ int Rssi_val_min = 0; ++ ++ if((pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) && ++ (pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ) ++ { ++ if(pdmpriv->EntryMinUndecoratedSmoothedPWDB != 0) ++ Rssi_val_min = (pdmpriv->EntryMinUndecoratedSmoothedPWDB > pdmpriv->UndecoratedSmoothedPWDB)? ++ pdmpriv->UndecoratedSmoothedPWDB:pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ else ++ Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ } ++ else if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT || ++ pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT) ++ Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ else if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) ++ Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ ++ //printk("%s CurMultiSTAConnectState(0x%02x) UndecoratedSmoothedPWDB(%d),EntryMinUndecoratedSmoothedPWDB(%d)\n" ++ //,__FUNCTION__,pDigTable->CurSTAConnectState, ++ //pdmpriv->UndecoratedSmoothedPWDB,pdmpriv->EntryMinUndecoratedSmoothedPWDB); ++ ++ return (u8)Rssi_val_min; ++} ++ ++ ++static VOID ++dm_FalseAlarmCounterStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 ret_value; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter1, bMaskDWord); ++ FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); ++ ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter2, bMaskDWord); ++ FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM_PHYCounter3, bMaskDWord); ++ FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); ++ ret_value = PHY_QueryBBReg(Adapter, rOFDM0_FrameSync, bMaskDWord); ++ FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); ++ FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); ++ ++ FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail+ ++ FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; ++ ++ ++ //hold cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, BIT(14), 1); ++ ++ ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterLower, bMaskByte0); ++ FalseAlmCnt->Cnt_Cck_fail = ret_value; ++ ++ ret_value = PHY_QueryBBReg(Adapter, rCCK0_FACounterUpper, bMaskByte3); ++ FalseAlmCnt->Cnt_Cck_fail += (ret_value& 0xff)<<8; ++ ++ FalseAlmCnt->Cnt_all = ( FalseAlmCnt->Cnt_Parity_Fail + ++ FalseAlmCnt->Cnt_Rate_Illegal + ++ FalseAlmCnt->Cnt_Crc8_fail + ++ FalseAlmCnt->Cnt_Mcs_fail + ++ FalseAlmCnt->Cnt_Cck_fail); ++ Adapter->recvpriv.FalseAlmCnt_all = FalseAlmCnt->Cnt_all; ++ //reset false alarm counter registers ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 1); ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0x08000000, 0); ++ //reset cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 0); ++ //enable cck counter ++ PHY_SetBBReg(Adapter, rCCK0_FalseAlarmReport, 0x0000c000, 2); ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Parity_Fail = %ld, Cnt_Rate_Illegal = %ld, Cnt_Crc8_fail = %ld, Cnt_Mcs_fail = %ld\n", ++ // FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal, FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail) ); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", ++ // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("Cnt_Ofdm_fail = %ld, Cnt_Cck_fail = %ld, Cnt_all = %ld\n", ++ // FalseAlmCnt->Cnt_Ofdm_fail, FalseAlmCnt->Cnt_Cck_fail, FalseAlmCnt->Cnt_all) ); ++} ++ ++ ++static VOID ++DM_Write_DIG( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurIGValue = 0x%lx, PreIGValue = 0x%lx, BackoffVal = %d\n", ++ // DM_DigTable.CurIGValue, DM_DigTable.PreIGValue, DM_DigTable.BackoffVal)); ++ ++ if (pDigTable->Dig_Enable_Flag == _FALSE) ++ { ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("DIG is disabled\n")); ++ pDigTable->PreIGValue = 0x17; ++ return; ++ } ++ ++ if(pDigTable->PreIGValue != pDigTable->CurIGValue) ++ { ++ // Set initial gain. ++ //PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pDigTable->CurIGValue); ++ //PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pDigTable->CurIGValue); ++ //printk("%s DIG(0x%02x)\n",__FUNCTION__,pDigTable->CurIGValue); ++ PHY_SetBBReg(pAdapter, rOFDM0_XAAGCCore1, 0x7f, pDigTable->CurIGValue); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBAGCCore1, 0x7f, pDigTable->CurIGValue); ++ pDigTable->PreIGValue = pDigTable->CurIGValue; ++ } ++} ++ ++ ++static VOID ++dm_CtrlInitGainByFA( ++ IN PADAPTER pAdapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ u8 value_IGI = pDigTable->CurIGValue; ++ ++ if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) ++ value_IGI --; ++ else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH1) ++ value_IGI += 0; ++ else if(FalseAlmCnt->Cnt_all < DM_DIG_FA_TH2) ++ value_IGI ++; ++ else if(FalseAlmCnt->Cnt_all >= DM_DIG_FA_TH2) ++ value_IGI +=2; ++ ++ if(value_IGI > DM_DIG_FA_UPPER) ++ value_IGI = DM_DIG_FA_UPPER; ++ if(value_IGI < DM_DIG_FA_LOWER) ++ value_IGI = DM_DIG_FA_LOWER; ++ ++ if(FalseAlmCnt->Cnt_all > 10000) ++ value_IGI = DM_DIG_FA_UPPER; ++ ++ pDigTable->CurIGValue = value_IGI; ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++ ++#ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++VOID dm_CtrlInitGainByRssi( IN PADAPTER pAdapter) ++{ ++ ++ u32 isBT; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ //modify DIG upper bound ++ if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ else ++ pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; ++ ++ //modify DIG lower bound ++ if((FalseAlmCnt->Cnt_all > 500)&&(pdmpriv->DIG_Dynamic_MIN < 0x25)) ++ pdmpriv->DIG_Dynamic_MIN++; ++ if((FalseAlmCnt->Cnt_all < 500)&&(pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) ++ pdmpriv->DIG_Dynamic_MIN--; ++ if((pDigTable->Rssi_val_min < 8) && (pdmpriv->DIG_Dynamic_MIN > DM_DIG_MIN)) ++ pdmpriv->DIG_Dynamic_MIN--; ++ ++ //modify DIG lower bound, deal with abnorally large false alarm ++ if(FalseAlmCnt->Cnt_all > 10000) ++ { ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); ++ pDigTable->LargeFAHit++; ++ if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) ++ { ++ pDigTable->ForbiddenIGI = pDigTable->CurIGValue; ++ pDigTable->LargeFAHit = 1; ++ } ++ if(pDigTable->LargeFAHit >= 3) ++ { ++ if((pDigTable->ForbiddenIGI+1) >pDigTable->rx_gain_range_max) ++ pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; ++ else ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ pDigTable->Recover_cnt = 3600; //3600=2hr ++ } ++ } ++ else ++ { ++ //Recovery mechanism for IGI lower bound ++ if(pDigTable->Recover_cnt != 0){ ++ pDigTable->Recover_cnt --; ++ } ++ else ++ { ++ if(pDigTable->LargeFAHit == 0 ) ++ { ++ if((pDigTable->ForbiddenIGI -1) < pdmpriv->DIG_Dynamic_MIN) //DM_DIG_MIN) ++ { ++ pDigTable->ForbiddenIGI = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; ++ pDigTable->rx_gain_range_min = pdmpriv->DIG_Dynamic_MIN; //DM_DIG_MIN; ++ } ++ else ++ { ++ pDigTable->ForbiddenIGI --; ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ } ++ } ++ else if(pDigTable->LargeFAHit == 3 ) ++ { ++ pDigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ #ifdef CONFIG_USB_HCI ++ if(FalseAlmCnt->Cnt_all < 250) ++ { ++#endif ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); ++ ++ isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; ++ ++ if(!isBT){ ++ ++ if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) ++ { ++ if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; ++ else ++ pDigTable->BackoffVal -= 2; ++ } ++ else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) ++ { ++ if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; ++ else ++ pDigTable->BackoffVal +=2; ++ } ++ } ++ else ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ ++ pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; ++ ++ //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); ++#ifdef CONFIG_USB_HCI ++ } ++ else ++ { ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); ++ //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); ++ ++ //Adjust initial gain by false alarm ++ if(FalseAlmCnt->Cnt_all > 1000) ++ pDigTable->CurIGValue = pDigTable ->PreIGValue+2; ++ else if (FalseAlmCnt->Cnt_all > 750) ++ pDigTable->CurIGValue = pDigTable->PreIGValue+1; ++ else if(FalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue = pDigTable->PreIGValue-1; ++ } ++#endif ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++ //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, ++ // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); ++ //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++#else ++static VOID dm_CtrlInitGainByRssi(IN PADAPTER pAdapter) ++{ ++ u32 isBT; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ //modify DIG upper bound ++ if((pDigTable->Rssi_val_min + 20) > DM_DIG_MAX ) ++ pDigTable->rx_gain_range_max = DM_DIG_MAX; ++ else ++ pDigTable->rx_gain_range_max = pDigTable->Rssi_val_min + 20; ++ //printk("%s Rssi_val_min(0x%02x),rx_gain_range_max(0x%02x)\n",__FUNCTION__,pDigTable->Rssi_val_min,pDigTable->rx_gain_range_max); ++ ++ //modify DIG lower bound, deal with abnorally large false alarm ++ if(FalseAlmCnt->Cnt_all > 10000) ++ { ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("dm_DIG(): Abnornally false alarm case. \n")); ++ ++ pDigTable->LargeFAHit++; ++ if(pDigTable->ForbiddenIGI < pDigTable->CurIGValue) ++ { ++ pDigTable->ForbiddenIGI = pDigTable->CurIGValue; ++ pDigTable->LargeFAHit = 1; ++ } ++ ++ if(pDigTable->LargeFAHit >= 3) ++ { ++ if((pDigTable->ForbiddenIGI+1) > pDigTable->rx_gain_range_max) ++ pDigTable->rx_gain_range_min = pDigTable->rx_gain_range_max; ++ else ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ pDigTable->Recover_cnt = 3600; //3600=2hr ++ } ++ } ++ else ++ { ++ //Recovery mechanism for IGI lower bound ++ if(pDigTable->Recover_cnt != 0) ++ pDigTable->Recover_cnt --; ++ else ++ { ++ if(pDigTable->LargeFAHit == 0 ) ++ { ++ if((pDigTable->ForbiddenIGI -1) < DM_DIG_MIN) ++ { ++ pDigTable->ForbiddenIGI = DM_DIG_MIN; ++ pDigTable->rx_gain_range_min = DM_DIG_MIN; ++ } ++ else ++ { ++ pDigTable->ForbiddenIGI --; ++ pDigTable->rx_gain_range_min = (pDigTable->ForbiddenIGI + 1); ++ } ++ } ++ else if(pDigTable->LargeFAHit == 3 ) ++ { ++ pDigTable->LargeFAHit = 0; ++ } ++ } ++ } ++ ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.ForbiddenIGI = 0x%x, DM_DigTable.LargeFAHit = 0x%x\n",pDigTable->ForbiddenIGI, pDigTable->LargeFAHit)); ++ //RT_TRACE(COMP_DIG, DBG_LOUD, ("DM_DigTable.rx_gain_range_max = 0x%x, DM_DigTable.rx_gain_range_min = 0x%x\n",pDigTable->rx_gain_range_max, pDigTable->rx_gain_range_min)); ++ ++#ifdef CONFIG_USB_HCI ++ if(FalseAlmCnt->Cnt_all < 250) ++ { ++#endif ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by SS mode\n"); ++ ++ isBT = rtw_read8(pAdapter, 0x4fd) & 0x01; ++ ++ if(!isBT){ ++ ++ if(FalseAlmCnt->Cnt_all > pDigTable->FAHighThresh) ++ { ++ if((pDigTable->BackoffVal -2) < pDigTable->BackoffVal_range_min) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_min; ++ else ++ pDigTable->BackoffVal -= 2; ++ } ++ else if(FalseAlmCnt->Cnt_all < pDigTable->FALowThresh) ++ { ++ if((pDigTable->BackoffVal+2) > pDigTable->BackoffVal_range_max) ++ pDigTable->BackoffVal = pDigTable->BackoffVal_range_max; ++ else ++ pDigTable->BackoffVal +=2; ++ } ++ } ++ else ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ ++ pDigTable->CurIGValue = pDigTable->Rssi_val_min+10-pDigTable->BackoffVal; ++ ++ //DBG_8192C("Rssi_val_min = %x BackoffVal %x\n",pDigTable->Rssi_val_min, pDigTable->BackoffVal); ++#ifdef CONFIG_USB_HCI ++ } ++ else ++ { ++ //DBG_8192C("===> dm_CtrlInitGainByRssi, Enter DIG by FA mode\n"); ++ //DBG_8192C("RSSI = 0x%x", pDigTable->Rssi_val_min); ++ ++ //Adjust initial gain by false alarm ++ if(FalseAlmCnt->Cnt_all > 1000) ++ pDigTable->CurIGValue = pDigTable ->PreIGValue+2; ++ else if (FalseAlmCnt->Cnt_all > 750) ++ pDigTable->CurIGValue = pDigTable->PreIGValue+1; ++ else if(FalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue = pDigTable->PreIGValue-1; ++ } ++#endif ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++ //printk("%s => rx_gain_range_max(0x%02x) rx_gain_range_min(0x%02x)\n",__FUNCTION__, ++ // pDigTable->rx_gain_range_max,pDigTable->rx_gain_range_min); ++ //printk("%s CurIGValue(0x%02x) <====\n",__FUNCTION__,pDigTable->CurIGValue ); ++ ++ DM_Write_DIG(pAdapter); ++ ++} ++#endif ++ ++static VOID ++dm_initial_gain_Multi_STA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ int rssi_strength = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ BOOLEAN bMulti_STA = _FALSE; ++ ++ //ADHOC and AP Mode ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ bMulti_STA = _TRUE; ++ } ++ ++ ++ if((bMulti_STA == _FALSE) ++ || (pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT)) ++ { ++ pdmpriv->binitialized = _FALSE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ return; ++ } ++ else if(pdmpriv->binitialized == _FALSE) ++ { ++ pdmpriv->binitialized = _TRUE; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ ++ // Initial gain control by ap mode ++ if(pDigTable->CurMultiSTAConnectState == DIG_MultiSTA_CONNECT) ++ { ++ if ( (rssi_strength < pDigTable->RssiLowThresh) && ++ (pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_1)) ++ { ++ // Set to dig value to 0x20 for Luke's opinion after disable dig ++ if(pDigTable->Dig_Ext_Port_Stage == DIG_EXT_PORT_STAGE_2) ++ { ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_1; ++ } ++ else if (rssi_strength > pDigTable->RssiHighThresh) ++ { ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_2; ++ dm_CtrlInitGainByFA(pAdapter); ++ } ++ } ++ else if(pDigTable->Dig_Ext_Port_Stage != DIG_EXT_PORT_STAGE_0) ++ { ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_0; ++ pDigTable->CurIGValue = 0x20; ++ DM_Write_DIG(pAdapter); ++ } ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CurMultiSTAConnectState = %x Dig_Ext_Port_Stage %x\n", ++ // DM_DigTable.CurMultiSTAConnectState, DM_DigTable.Dig_Ext_Port_Stage)); ++} ++ ++static VOID ++dm_initial_gain_STA_beforelinked( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ PFALSE_ALARM_STATISTICS pFalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ ++ //CurrentIGI = pDM_DigTable->rx_gain_range_min;//pDM_DigTable->CurIGValue = pDM_DigTable->rx_gain_range_min ++ //ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); ++ //2012.03.30 LukeLee: enable DIG before link but with very high thresholds ++ if(pFalseAlmCnt->Cnt_all > 10000) ++ pDigTable->CurIGValue = pDigTable->CurIGValue + 2;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; ++ else if (pFalseAlmCnt->Cnt_all > 8000) ++ pDigTable->CurIGValue = pDigTable->CurIGValue + 1;//pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; ++ else if(pFalseAlmCnt->Cnt_all < 500) ++ pDigTable->CurIGValue = pDigTable->CurIGValue - 1;//pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; ++ ++ //Check initial gain by upper/lower bound ++ if(pDigTable->CurIGValue >pDigTable->rx_gain_range_max) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_max; ++ ++ if(pDigTable->CurIGValue < pDigTable->rx_gain_range_min) ++ pDigTable->CurIGValue = pDigTable->rx_gain_range_min; ++ ++ printk("%s ==> FalseAlmCnt->Cnt_all:%d CurIGValue:0x%02x \n",__FUNCTION__,pFalseAlmCnt->Cnt_all ,pDigTable->CurIGValue); ++} ++ ++static VOID ++dm_initial_gain_STA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("PreSTAConnectState = %x, CurSTAConnectState = %x\n", ++ // DM_DigTable.PreSTAConnectState, DM_DigTable.CurSTAConnectState)); ++ ++ ++ if(pDigTable->PreSTAConnectState == pDigTable->CurSTAConnectState|| ++ pDigTable->CurSTAConnectState == DIG_STA_BEFORE_CONNECT || ++ pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ++ { ++ // beforeconnect -> beforeconnect or connect -> connect ++ // (dis)connect -> beforeconnect ++ // disconnect -> connecct or beforeconnect -> connect ++ if(pDigTable->CurSTAConnectState != DIG_STA_DISCONNECT) ++ { ++ pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); ++ dm_CtrlInitGainByRssi(pAdapter); ++ } ++#ifdef CONFIG_IOCTL_CFG80211 ++ else if((wdev_to_priv(pAdapter->rtw_wdev))->p2p_enabled == _TRUE) ++ { ++ pDigTable->CurIGValue = 0x30; ++ DM_Write_DIG(pAdapter); ++ } ++#endif ++ else{ // pDigTable->CurSTAConnectState == DIG_STA_DISCONNECT ++ #ifdef CONFIG_BEFORE_LINKED_DIG ++ //printk("%s==> ##1 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); ++ dm_initial_gain_STA_beforelinked(pAdapter); ++ DM_Write_DIG(pAdapter); ++ #endif ++ } ++ } ++ else ++ { ++ // connect -> disconnect or beforeconnect -> disconnect ++ pDigTable->Rssi_val_min = 0; ++ pDigTable->Dig_Ext_Port_Stage = DIG_EXT_PORT_STAGE_MAX; ++ pDigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; ++ pDigTable->CurIGValue = 0x20; ++ pDigTable->PreIGValue = 0; ++ ++ #ifdef CONFIG_BEFORE_LINKED_DIG ++ //printk("%s==> ##2 CurIGI(0x%02x),PreIGValue(0x%02x) \n",__FUNCTION__,pDigTable->CurIGValue,pDigTable->PreIGValue ); ++ dm_initial_gain_STA_beforelinked(pAdapter); ++ #endif ++ ++ DM_Write_DIG(pAdapter); ++ } ++ ++} ++ ++ ++static void dm_CCK_PacketDetectionThresh( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PFALSE_ALARM_STATISTICS FalseAlmCnt = &(pdmpriv->FalseAlmCnt); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if(pDigTable->CurSTAConnectState == DIG_STA_CONNECT) ++ { ++ pDigTable->Rssi_val_min = dm_initial_gain_MinPWDB(pAdapter); ++ if(pDigTable->PreCCKPDState == CCK_PD_STAGE_LowRssi) ++ { ++ if(pDigTable->Rssi_val_min <= 25) ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ else ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; ++ } ++ else{ ++ if(pDigTable->Rssi_val_min <= 20) ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_LowRssi; ++ else ++ pDigTable->CurCCKPDState = CCK_PD_STAGE_HighRssi; ++ } ++ } ++ else ++ pDigTable->CurCCKPDState=CCK_PD_STAGE_MAX; ++ ++ if(pDigTable->PreCCKPDState != pDigTable->CurCCKPDState) ++ { ++ if((pDigTable->CurCCKPDState == CCK_PD_STAGE_LowRssi)|| ++ (pDigTable->CurCCKPDState == CCK_PD_STAGE_MAX)) ++ { ++ PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0x83); ++ ++ //PHY_SetBBReg(pAdapter, rCCK0_System, bMaskByte1, 0x40); ++ //if(IS_92C_SERIAL(pHalData->VersionID)) ++ //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd7); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rCCK0_CCA, bMaskByte2, 0xcd); ++ //PHY_SetBBReg(pAdapter,rCCK0_System, bMaskByte1, 0x47); ++ //if(IS_92C_SERIAL(pHalData->VersionID)) ++ //PHY_SetBBReg(pAdapter, rCCK0_FalseAlarmReport , bMaskByte2, 0xd3); ++ } ++ ++ pDigTable->PreCCKPDState = pDigTable->CurCCKPDState; ++ } ++ ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("CCKPDStage=%x\n",pDigTable->CurCCKPDState)); ++ //RT_TRACE( COMP_DIG, DBG_LOUD, ("is92C=%x\n",IS_92C_SERIAL(pHalData->VersionID))); ++ ++} ++ ++ ++static void ++dm_CtrlInitGainByTwoPort( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(pAdapter->mlmepriv); ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ return; ++ ++ // Decide the current status and if modify initial gain or not ++ if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_BEFORE_CONNECT; ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_CONNECT; ++ } ++ else ++ { ++ pDigTable->CurSTAConnectState = DIG_STA_DISCONNECT; ++ } ++ ++ ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_DISCONNECT; ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ if((is_IBSS_empty(pAdapter)==_FAIL) && (pAdapter->stapriv.asoc_sta_count > 2)) ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ if(pAdapter->stapriv.asoc_sta_count > 2) ++ pDigTable->CurMultiSTAConnectState = DIG_MultiSTA_CONNECT; ++ } ++ ++ ++ dm_initial_gain_STA(pAdapter); ++ dm_initial_gain_Multi_STA(pAdapter); ++ dm_CCK_PacketDetectionThresh(pAdapter); ++ ++ pDigTable->PreSTAConnectState = pDigTable->CurSTAConnectState; ++ ++} ++ ++ ++static void dm_DIG( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() ==>\n")); ++ ++ if(pdmpriv->bDMInitialGainEnable == _FALSE) ++ return; ++ ++ //if(pDigTable->Dig_Enable_Flag == _FALSE) ++ // return; ++ ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) ++ return; ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() progress \n")); ++ ++ dm_CtrlInitGainByTwoPort(pAdapter); ++ ++ //RTPRINT(FDM, DM_Monitor, ("dm_DIG() <==\n")); ++} ++ ++static void dm_SavePowerIndex(IN PADAPTER Adapter) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ pdmpriv->PowerIndex_backup[index] = rtw_read8(Adapter, Power_Index_REG[index]); ++} ++ ++static void dm_RestorePowerIndex(IN PADAPTER Adapter) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ rtw_write8(Adapter, Power_Index_REG[index], pdmpriv->PowerIndex_backup[index]); ++} ++ ++static void dm_WritePowerIndex( ++ IN PADAPTER Adapter, ++ IN u8 Value) ++{ ++ u8 index; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 Power_Index_REG[6] = {0xc90, 0xc91, 0xc92, 0xc98, 0xc99, 0xc9a}; ++ ++ for(index = 0; index< 6; index++) ++ rtw_write8(Adapter, Power_Index_REG[index], Value); ++} ++ ++static void dm_InitDynamicTxPower(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ dm_SavePowerIndex(Adapter); ++ pdmpriv->bDynamicTxPowerEnable = _TRUE; ++ } ++ else ++#else ++ pdmpriv->bDynamicTxPowerEnable = _FALSE; ++#endif ++ ++ pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++} ++ ++ ++static void dm_DynamicTxPower(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ int UndecoratedSmoothedPWDB; ++ ++ if(!pdmpriv->bDynamicTxPowerEnable) ++ return; ++ ++ // If dynamic high power is disabled. ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_HP) ) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ // STA not connected and AP not connected ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && ++ (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("Not connected to any \n")); ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ ++ //the LastDTPlvl should reset when disconnect, ++ //otherwise the tx power level wouldn't change when disconnect and connect again. ++ // Maddest 20091220. ++ pdmpriv->LastDTPLvl=TxHighPwrLevel_Normal; ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port ++ { ++ //todo: AP Mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Client PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("STA Default Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("AP Ext Port PWDB = 0x%x \n", UndecoratedSmoothedPWDB)); ++ } ++ ++ if(UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL2) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level2; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x0)\n")); ++ } ++ else if((UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL2-3)) && ++ (UndecoratedSmoothedPWDB >= TX_POWER_NEAR_FIELD_THRESH_LVL1) ) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Level1; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Level1 (TxPwr=0x10)\n")); ++ } ++ else if(UndecoratedSmoothedPWDB < (TX_POWER_NEAR_FIELD_THRESH_LVL1-5)) ++ { ++ pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; ++ //RT_TRACE(COMP_HIPWR, DBG_LOUD, ("TxHighPwrLevel_Normal\n")); ++ } ++ ++ if( (pdmpriv->DynamicTxHighPowerLvl != pdmpriv->LastDTPLvl) ) ++ { ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) // HP1 -> Normal or HP2 -> Normal ++ dm_RestorePowerIndex(Adapter); ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ dm_WritePowerIndex(Adapter, 0x14); ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ dm_WritePowerIndex(Adapter, 0x10); ++ } ++ pdmpriv->LastDTPLvl = pdmpriv->DynamicTxHighPowerLvl; ++ ++} ++ ++ ++static VOID ++DM_ChangeDynamicInitGainThresh( ++ IN PADAPTER pAdapter, ++ IN u32 DM_Type, ++ IN u32 DM_Value) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ ++ if (DM_Type == DIG_TYPE_THRESH_HIGH) ++ { ++ pDigTable->RssiHighThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_THRESH_LOW) ++ { ++ pDigTable->RssiLowThresh = DM_Value; ++ } ++ else if (DM_Type == DIG_TYPE_ENABLE) ++ { ++ pDigTable->Dig_Enable_Flag = _TRUE; ++ } ++ else if (DM_Type == DIG_TYPE_DISABLE) ++ { ++ pDigTable->Dig_Enable_Flag = _FALSE; ++ } ++ else if (DM_Type == DIG_TYPE_BACKOFF) ++ { ++ if(DM_Value > 30) ++ DM_Value = 30; ++ pDigTable->BackoffVal = (u8)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MIN) ++ { ++ if(DM_Value == 0) ++ DM_Value = 0x1; ++ pDigTable->rx_gain_range_min = (u8)DM_Value; ++ } ++ else if(DM_Type == DIG_TYPE_RX_GAIN_MAX) ++ { ++ if(DM_Value > 0x50) ++ DM_Value = 0x50; ++ pDigTable->rx_gain_range_max = (u8)DM_Value; ++ } ++} /* DM_ChangeDynamicInitGainThresh */ ++ ++ ++static VOID PWDB_Monitor( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ int i; ++ int tmpEntryMaxPWDB=0, tmpEntryMinPWDB=0xff; ++ u8 sta_cnt=0; ++ u32 PWDB_rssi[NUM_STA]={0};//[0~15]:MACID, [16~31]:PWDB_rssi ++ ++ if(check_fwstate(&Adapter->mlmepriv, _FW_LINKED) != _TRUE) ++ return; ++ ++ ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_AP_STATE|WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ _irqL irqL; ++ _list *plist, *phead; ++ struct sta_info *psta; ++ struct sta_priv *pstapriv = &Adapter->stapriv; ++ u8 bcast_addr[ETH_ALEN]= {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(psta ->hwaddr, bcast_addr, ETH_ALEN) || ++ _rtw_memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) ++ continue; ++ ++ if(psta->state & WIFI_ASOC_STATE) ++ { ++ ++ if(psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) ++ tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ if(psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) ++ tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ ++ PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ // Report every sta's RSSI to FW ++ for(i=0; i< sta_cnt; i++) ++ { ++ rtl8192c_set_rssi_cmd(Adapter, (u8*)&PWDB_rssi[i]); ++ } ++ } ++ ++ } ++ ++ ++ ++ if(tmpEntryMaxPWDB != 0) // If associated entry is found ++ { ++ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; ++ } ++ else ++ { ++ pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; ++ } ++ ++ if(tmpEntryMinPWDB != 0xff) // If associated entry is found ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; ++ } ++ else ++ { ++ pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; ++ } ++ ++ ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ u32 param = (u32)(pdmpriv->UndecoratedSmoothedPWDB<<16); ++ ++ param |= 0;//macid=0 for sta mode; ++ ++ rtl8192c_set_rssi_cmd(Adapter, (u8*)¶m); ++ } ++ } ++ ++} ++ ++ ++static void ++DM_InitEdcaTurbo( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pHalData->bCurrentTurboEDCA = _FALSE; ++ Adapter->recvpriv.bIsAnyNonBEPkts = _FALSE; ++ ++} ++ ++ ++static void ++dm_CheckEdcaTurbo( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ u8 bbtchange = _FALSE; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ ++ if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) ++ { ++ goto dm_CheckEdcaTurbo_EXIT; ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor >= maxAP) ++ { ++ goto dm_CheckEdcaTurbo_EXIT; ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(pbtpriv->BT_Coexist) ++ { ++ if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) ++ { ++ bbtchange = _TRUE; ++ } ++ } ++#endif ++ ++ // Check if the status needs to be changed. ++ if((bbtchange) || (!precvpriv->bIsAnyNonBEPkts) ) ++ { ++ cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; ++ cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; ++ ++ //traffic, TX or RX ++ if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++ if ((pdmpriv->prv_traffic_idx != trafficIndex) || (!pHalData->bCurrentTurboEDCA)) ++ { ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ { ++ edca_param = pbtpriv->BT_EDCA[trafficIndex]; ++ } ++ else ++#endif ++ { ++#if 0 ++ //adjust EDCA parameter for BE queue ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++#else ++ ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else ++ { ++ edca_param = EDCAParam[unknownAP][trafficIndex]; ++ } ++#endif ++ } ++ ++#ifdef CONFIG_PCI_HCI ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ edca_param = 0x60a42b; ++ } ++ else ++ { ++ edca_param = 0x6ea42b; ++ } ++#endif ++ if(Adapter->registrypriv.intel_class_mode==1) ++ edca_param=0xa44f; ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); ++ ++ pdmpriv->prv_traffic_idx = trafficIndex; ++ } ++ ++ pHalData->bCurrentTurboEDCA = _TRUE; ++ } ++ else ++ { ++ // ++ // Turn Off EDCA turbo here. ++ // Restore original EDCA according to the declaration of AP. ++ // ++ if(pHalData->bCurrentTurboEDCA) ++ { ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); ++ pHalData->bCurrentTurboEDCA = _FALSE; ++ } ++ } ++ ++dm_CheckEdcaTurbo_EXIT: ++ // Set variables for next time. ++ precvpriv->bIsAnyNonBEPkts = _FALSE; ++ pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; ++ precvpriv->last_rx_bytes = precvpriv->rx_bytes; ++ ++} ++ ++#define DPK_DELTA_MAPPING_NUM 13 ++#define index_mapping_HP_NUM 15 ++//091212 chiyokolin ++static VOID ++dm_TXPowerTrackingCallback_ThermalMeter_92C( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, delta_HP, TimeOut = 100, ThermalValue_HP_count = 0; ++ u32 ThermalValue_HP = 0; ++ s8 delta_DPK; ++ int ele_A, ele_D, TempCCk, X, value32; ++ int Y, ele_C; ++ s8 OFDM_index[2], CCK_index = 0, OFDM_index_old[2], CCK_index_old = 0, delta_APK; ++ int i = 0, CCKSwingNeedUpdate = 0; ++ BOOLEAN is2T = IS_92C_SERIAL(pHalData->VersionID); ++#if 0 ++//#ifdef CONFIG_MP_INCLUDED ++ PMPT_CONTEXT pMptCtx = &(Adapter->MptCtx); ++ pu1Byte TxPwrLevel = pMptCtx->TxPwrLevel; ++#endif ++ ++ u8 OFDM_min_index = 6, rf; //OFDM BB Swing should be less than +3.0dB, which is required by Arthur ++ u32 DPK_delta_mapping[2][DPK_DELTA_MAPPING_NUM] = { ++ {0x1c, 0x1c, 0x1d, 0x1d, 0x1e, ++ 0x1f, 0x00, 0x00, 0x01, 0x01, ++ 0x02, 0x02, 0x03}, ++ {0x1c, 0x1d, 0x1e, 0x1e, 0x1e, ++ 0x1f, 0x00, 0x00, 0x01, 0x02, ++ 0x02, 0x03, 0x03}}; ++ ++ s8 index_mapping_HP[index_mapping_HP_NUM] = { ++ 0, 1, 3, 4, 6, ++ 7, 9, 10, 12, 13, ++ 15, 16, 18, 19, 21 ++ }; ++ ++ s8 index_HP; ++ ++ pdmpriv->TXPowerTrackingCallbackCnt++; //cosa add for debug ++ pdmpriv->bTXPowerTrackingInit = _TRUE; ++ ++ if(pHalData->CurrentChannel == 14 && !pdmpriv->bCCKinCH14) ++ pdmpriv->bCCKinCH14 = _TRUE; ++ else if(pHalData->CurrentChannel != 14 && pdmpriv->bCCKinCH14) ++ pdmpriv->bCCKinCH14 = _FALSE; ++ ++ //DBG_8192C("===>dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); ++ ++ ThermalValue = (u8)PHY_QueryRFReg(Adapter, RF90_PATH_A, RF_T_METER, 0x1f); // 0x24: RF Reg[4:0] ++ ++ //DBG_8192C("\n\nReadback Thermal Meter = 0x%x pre thermal meter 0x%x EEPROMthermalmeter 0x%x\n",ThermalValue,pdmpriv->ThermalValue, pHalData->EEPROMThermalMeter); ++ ++ rtl8192c_PHY_APCalibrate(Adapter, (ThermalValue - pHalData->EEPROMThermalMeter)); ++ rtl8192c_PHY_DigitalPredistortion(Adapter); ++ ++ if(is2T) ++ rf = 2; ++ else ++ rf = 1; ++ ++ if(ThermalValue) ++ { ++// if(!pHalData->ThermalValue) ++ { ++ //Query OFDM path A default setting ++ ele_D = PHY_QueryBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord)&bMaskOFDM_D; ++ for(i=0; ibCCKinCH14) ++ { ++ if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4)==_TRUE) ++ { ++ CCK_index_old =(u8)i; ++ //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch 14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); ++ break; ++ } ++ } ++ else ++ { ++ if(_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4)==_TRUE) ++ { ++ CCK_index_old =(u8)i; ++ //DBG_8192C("Initial reg0x%x = 0x%x, CCK_index=0x%x, ch14 %d\n", rCCK0_TxFilter2, TempCCk, CCK_index_old, pdmpriv->bCCKinCH14); ++ break; ++ } ++ } ++ } ++ ++ if(!pdmpriv->ThermalValue) ++ { ++ pdmpriv->ThermalValue = pHalData->EEPROMThermalMeter; ++ pdmpriv->ThermalValue_LCK = ThermalValue; ++ pdmpriv->ThermalValue_IQK = ThermalValue; ++ pdmpriv->ThermalValue_DPK = pHalData->EEPROMThermalMeter; ++ ++#ifdef CONFIG_USB_HCI ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index_HP[i] = pdmpriv->OFDM_index[i] = OFDM_index_old[i]; ++ pdmpriv->CCK_index_HP = pdmpriv->CCK_index = CCK_index_old; ++#else ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] = OFDM_index_old[i]; ++ pdmpriv->CCK_index = CCK_index_old; ++#endif ++ } ++ ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ pdmpriv->ThermalValue_HP[pdmpriv->ThermalValue_HP_index] = ThermalValue; ++ pdmpriv->ThermalValue_HP_index++; ++ if(pdmpriv->ThermalValue_HP_index == HP_THERMAL_NUM) ++ pdmpriv->ThermalValue_HP_index = 0; ++ ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ { ++ if(pdmpriv->ThermalValue_HP[i]) ++ { ++ ThermalValue_HP += pdmpriv->ThermalValue_HP[i]; ++ ThermalValue_HP_count++; ++ } ++ } ++ ++ if(ThermalValue_HP_count) ++ ThermalValue = (u8)(ThermalValue_HP / ThermalValue_HP_count); ++ } ++#endif ++ } ++ ++ delta = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ if(pdmpriv->bDoneTxpower) ++ delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++ else ++ delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++ } ++ else ++#endif ++ { ++ delta_HP = 0; ++ } ++ delta_LCK = (ThermalValue > pdmpriv->ThermalValue_LCK)?(ThermalValue - pdmpriv->ThermalValue_LCK):(pdmpriv->ThermalValue_LCK - ThermalValue); ++ delta_IQK = (ThermalValue > pdmpriv->ThermalValue_IQK)?(ThermalValue - pdmpriv->ThermalValue_IQK):(pdmpriv->ThermalValue_IQK - ThermalValue); ++ delta_DPK = pdmpriv->ThermalValue_DPK - ThermalValue; ++ ++ //DBG_8192C("Readback Thermal Meter = 0x%lx pre thermal meter 0x%lx EEPROMthermalmeter 0x%lx delta 0x%lx delta_LCK 0x%lx delta_IQK 0x%lx\n", ThermalValue, pHalData->ThermalValue, pHalData->EEPROMThermalMeter, delta, delta_LCK, delta_IQK); ++ ++ if(delta_LCK > 1) ++ { ++ pdmpriv->ThermalValue_LCK = ThermalValue; ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ } ++ ++ if((delta > 0 || delta_HP > 0) && pdmpriv->TxPowerTrackControl) ++ { ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ pdmpriv->bDoneTxpower = _TRUE; ++ delta_HP = ThermalValue > pHalData->EEPROMThermalMeter?(ThermalValue - pHalData->EEPROMThermalMeter):(pHalData->EEPROMThermalMeter - ThermalValue); ++ ++ if(delta_HP > index_mapping_HP_NUM-1) ++ index_HP = index_mapping_HP[index_mapping_HP_NUM-1]; ++ else ++ index_HP = index_mapping_HP[delta_HP]; ++ ++ if(ThermalValue > pHalData->EEPROMThermalMeter) //set larger Tx power ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index_HP[i] - index_HP; ++ CCK_index = pdmpriv->CCK_index_HP -index_HP; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index_HP[i] + index_HP; ++ CCK_index = pdmpriv->CCK_index_HP + index_HP; ++ } ++ ++ delta_HP = (ThermalValue > pdmpriv->ThermalValue)?(ThermalValue - pdmpriv->ThermalValue):(pdmpriv->ThermalValue - ThermalValue); ++ ++ } ++ else ++#endif ++ { ++ if(ThermalValue > pdmpriv->ThermalValue) ++ { ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] -= delta; ++ ++ pdmpriv->CCK_index -= delta; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ pdmpriv->OFDM_index[i] += delta; ++ ++ pdmpriv->CCK_index += delta; ++ } ++ } ++ ++ /* ++ if(is2T) ++ { ++ DBG_8192C("temp OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", ++ pdmpriv->OFDM_index[0], pdmpriv->OFDM_index[1], pdmpriv->CCK_index); ++ } ++ else ++ { ++ //DBG_8192C("temp OFDM_A_index=0x%x, CCK_index=0x%x\n",pdmpriv->OFDM_index[0], pdmpriv->CCK_index); ++ } ++ */ ++ ++ //no adjust ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType != BOARD_USB_High_PA) ++#endif ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index[i]+1; ++ CCK_index = pdmpriv->CCK_index+1; ++ } ++ else ++ { ++ for(i = 0; i < rf; i++) ++ OFDM_index[i] = pdmpriv->OFDM_index[i]; ++ CCK_index = pdmpriv->CCK_index; ++ } ++#if 0 ++//#ifdef CONFIG_MP_INCLUDED ++ for(i = 0; i < rf; i++) ++ { ++ if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ OFDM_index[i] -= 1; ++ else ++ OFDM_index[i] -= 2; ++ } ++ else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) ++ { ++ OFDM_index[i] += 1; ++ } ++ } ++ else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ OFDM_index[i] -= 1; ++ else ++ OFDM_index[i] -= 2; ++ } ++ else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) ++ { ++ OFDM_index[i] -= 1; ++ } ++ } ++ ++ { ++ if(TxPwrLevel[i] >=0 && TxPwrLevel[i] <=26) ++ { ++ if(ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ CCK_index -= 1; ++ else ++ CCK_index -= 2; ++ } ++ else if(delta > 5 && ThermalValue < pHalData->EEPROMThermalMeter) ++ { ++ CCK_index += 1; ++ } ++ } ++ else if (TxPwrLevel[i] >= 27 && TxPwrLevel[i] <= 32 && ThermalValue > pHalData->EEPROMThermalMeter) ++ { ++ if (delta < 5) ++ CCK_index -= 1; ++ else ++ CCK_index -= 2; ++ } ++ else if (TxPwrLevel[i] >= 32 && TxPwrLevel[i] <= 38 && ThermalValue > pHalData->EEPROMThermalMeter && delta > 5) ++ { ++ CCK_index -= 1; ++ } ++ } ++#endif ++ } ++ ++ for(i = 0; i < rf; i++) ++ { ++ if(OFDM_index[i] > OFDM_TABLE_SIZE-1) ++ OFDM_index[i] = OFDM_TABLE_SIZE-1; ++ else if (OFDM_index[i] < OFDM_min_index) ++ OFDM_index[i] = OFDM_min_index; ++ } ++ ++ if(CCK_index > CCK_TABLE_SIZE-1) ++ CCK_index = CCK_TABLE_SIZE-1; ++ else if (CCK_index < 0) ++ CCK_index = 0; ++ ++ /* ++ if(is2T) ++ { ++ DBG_8192C("new OFDM_A_index=0x%x, OFDM_B_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], OFDM_index[1], CCK_index); ++ } ++ else ++ { ++ //DBG_8192C("new OFDM_A_index=0x%x, CCK_index=0x%x\n", OFDM_index[0], CCK_index); ++ } ++ */ ++ ++ } ++ ++ if(pdmpriv->TxPowerTrackControl && (delta != 0 || delta_HP != 0)) ++ { ++ //Adujst OFDM Ant_A according to IQK result ++ ele_D = (OFDMSwingTable[(u8)OFDM_index[0]] & 0xFFC00000)>>22; ++ X = pdmpriv->RegE94; ++ Y = pdmpriv->RegE9C; ++ ++ if(X != 0) ++ { ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D)>>8)&0x000003FF; ++ ++ //wirte new elements A, C, D to regC80 and regC94, element B is always 0 ++ value32 = (ele_D<<22)|((ele_C&0x3F)<<16)|ele_A; ++ PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31, value32); ++ ++ value32 = ((Y * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT29, value32); ++ ++ } ++ else ++ { ++ PHY_SetBBReg(Adapter, rOFDM0_XATxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[0]]); ++ PHY_SetBBReg(Adapter, rOFDM0_XCTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT31|BIT29, 0x00); ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("TxPwrTracking path A: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D)); ++ ++ //Adjust CCK according to IQK result ++ if(!pdmpriv->bCCKinCH14){ ++ rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][0]); ++ rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][1]); ++ rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][2]); ++ rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][3]); ++ rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][4]); ++ rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][5]); ++ rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][6]); ++ rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch1_Ch13[(u8)CCK_index][7]); ++ } ++ else{ ++ rtw_write8(Adapter, 0xa22, CCKSwingTable_Ch14[(u8)CCK_index][0]); ++ rtw_write8(Adapter, 0xa23, CCKSwingTable_Ch14[(u8)CCK_index][1]); ++ rtw_write8(Adapter, 0xa24, CCKSwingTable_Ch14[(u8)CCK_index][2]); ++ rtw_write8(Adapter, 0xa25, CCKSwingTable_Ch14[(u8)CCK_index][3]); ++ rtw_write8(Adapter, 0xa26, CCKSwingTable_Ch14[(u8)CCK_index][4]); ++ rtw_write8(Adapter, 0xa27, CCKSwingTable_Ch14[(u8)CCK_index][5]); ++ rtw_write8(Adapter, 0xa28, CCKSwingTable_Ch14[(u8)CCK_index][6]); ++ rtw_write8(Adapter, 0xa29, CCKSwingTable_Ch14[(u8)CCK_index][7]); ++ } ++ ++ if(is2T) ++ { ++ ele_D = (OFDMSwingTable[(u8)OFDM_index[1]] & 0xFFC00000)>>22; ++ ++ //new element A = element D x X ++ X = pdmpriv->RegEB4; ++ Y = pdmpriv->RegEBC; ++ ++ if(X != 0){ ++ if ((X & 0x00000200) != 0) //consider minus ++ X = X | 0xFFFFFC00; ++ ele_A = ((X * ele_D)>>8)&0x000003FF; ++ ++ //new element C = element D x Y ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ ele_C = ((Y * ele_D)>>8)&0x00003FF; ++ ++ //wirte new elements A, C, D to regC88 and regC9C, element B is always 0 ++ value32=(ele_D<<22)|((ele_C&0x3F)<<16) |ele_A; ++ PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, value32); ++ ++ value32 = (ele_C&0x000003C0)>>6; ++ PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, value32); ++ ++ value32 = ((X * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27, value32); ++ ++ value32 = ((Y * ele_D)>>7)&0x01; ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT25, value32); ++ ++ } ++ else{ ++ PHY_SetBBReg(Adapter, rOFDM0_XBTxIQImbalance, bMaskDWord, OFDMSwingTable[(u8)OFDM_index[1]]); ++ PHY_SetBBReg(Adapter, rOFDM0_XDTxAFE, bMaskH4Bits, 0x00); ++ PHY_SetBBReg(Adapter, rOFDM0_ECCAThreshold, BIT27|BIT25, 0x00); ++ } ++ ++ //DBG_8192C("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x\n", X, Y, ele_A, ele_C, ele_D); ++ } ++ ++ /* ++ DBG_8192C("TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n", \ ++ PHY_QueryBBReg(Adapter, 0xc80, bMaskDWord),\ ++ PHY_QueryBBReg(Adapter, 0xc94, bMaskDWord), \ ++ PHY_QueryRFReg(Adapter, RF90_PATH_A, 0x24, bMaskDWord)); ++ */ ++ } ++ ++#if MP_DRIVER == 1 ++ if(delta_IQK > 1) ++#else ++ if(delta_IQK > 3) ++#endif ++ { ++ pdmpriv->ThermalValue_IQK = ThermalValue; ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ } ++ ++ if(delta_DPK != 0) ++ { ++ delta_DPK = ThermalValue - pHalData->EEPROMThermalMeter; ++ ++ //if(pdmpriv->bDPPathAOK || pdmpriv->bDPPathBOK) ++ // DBG_8192C("TxPwrTracking delata_DPK = %d\n", delta_DPK); ++ ++ if(pdmpriv->bDPPathAOK) ++ PHY_SetBBReg(Adapter, 0xb68, 0x7c00, DPK_delta_mapping[0][((delta_DPK+13)/2)]); ++ if(pdmpriv->bDPPathBOK) ++ PHY_SetBBReg(Adapter, 0xb6c, 0x7c00, DPK_delta_mapping[1][((delta_DPK+13)/2)]); ++ pdmpriv->ThermalValue_DPK = ThermalValue; ++ } ++ ++ //update thermal meter value ++ if(pdmpriv->TxPowerTrackControl) ++ pdmpriv->ThermalValue = ThermalValue; ++ ++ } ++ ++ //DBG_8192C("<===dm_TXPowerTrackingCallback_ThermalMeter_92C\n"); ++ ++ pdmpriv->TXPowercount = 0; ++ ++} ++ ++ ++static VOID ++dm_InitializeTXPowerTracking_ThermalMeter( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ //pMgntInfo->bTXPowerTracking = _TRUE; ++ pdmpriv->TXPowercount = 0; ++ pdmpriv->bTXPowerTrackingInit = _FALSE; ++ pdmpriv->ThermalValue = 0; ++ ++#if (MP_DRIVER != 1) //for mp driver, turn off txpwrtracking as default ++ pdmpriv->TxPowerTrackControl = _TRUE; ++#endif ++ ++ MSG_8192C("pdmpriv->TxPowerTrackControl = %d\n", pdmpriv->TxPowerTrackControl); ++} ++ ++ ++static VOID ++DM_InitializeTXPowerTracking( ++ IN PADAPTER Adapter) ++{ ++ dm_InitializeTXPowerTracking_ThermalMeter(Adapter); ++} ++ ++// ++// Description: ++// - Dispatch TxPower Tracking direct call ONLY for 92s. ++// - We shall NOT schedule Workitem within PASSIVE LEVEL, which will cause system resource ++// leakage under some platform. ++// ++// Assumption: ++// PASSIVE_LEVEL when this routine is called. ++// ++// Added by Roger, 2009.06.18. ++// ++static VOID ++DM_TXPowerTracking92CDirectCall( ++ IN PADAPTER Adapter) ++{ ++ dm_TXPowerTrackingCallback_ThermalMeter_92C(Adapter); ++} ++ ++static VOID ++dm_CheckTXPowerTracking_ThermalMeter( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ //u1Byte TxPowerCheckCnt = 5; //10 sec ++ ++ //if(!pMgntInfo->bTXPowerTracking /*|| (!pdmpriv->TxPowerTrackControl && pdmpriv->bAPKdone)*/) ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_SS)) ++ { ++ return; ++ } ++ ++ if(!pdmpriv->TM_Trigger) //at least delay 1 sec ++ { ++ //pHalData->TxPowerCheckCnt++; //cosa add for debug ++ PHY_SetRFReg(Adapter, RF90_PATH_A, RF_T_METER, bRFRegOffsetMask, 0x60); ++ //DBG_8192C("Trigger 92C Thermal Meter!!\n"); ++ ++ pdmpriv->TM_Trigger = 1; ++ return; ++ ++ } ++ else ++ { ++ //DBG_8192C("Schedule TxPowerTracking direct call!!\n"); ++ DM_TXPowerTracking92CDirectCall(Adapter); //Using direct call is instead, added by Roger, 2009.06.18. ++ pdmpriv->TM_Trigger = 0; ++ } ++ ++} ++ ++ ++VOID ++rtl8192c_dm_CheckTXPowerTracking( ++ IN PADAPTER Adapter) ++{ ++ dm_CheckTXPowerTracking_ThermalMeter(Adapter); ++} ++ ++#ifdef CONFIG_BT_COEXIST ++static BOOLEAN BT_BTStateChange(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct registry_priv *registry_par = &Adapter->registrypriv; ++ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ u32 Polling, Ratio_Tx, Ratio_PRI; ++ u32 BT_Tx, BT_PRI; ++ u8 BT_State; ++ static u8 ServiceTypeCnt = 0; ++ u8 CurServiceType; ++ static u8 LastServiceType = BT_Idle; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ return _FALSE; ++ ++ BT_State = rtw_read8(Adapter, 0x4fd); ++/* ++ temp = PlatformEFIORead4Byte(Adapter, 0x488); ++ BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); ++ BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); ++ ++ temp = PlatformEFIORead4Byte(Adapter, 0x48c); ++ Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + ++ ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); ++ ++*/ ++ BT_Tx = rtw_read32(Adapter, 0x488); ++ ++ DBG_8192C("Ratio 0x488 =%x\n", BT_Tx); ++ BT_Tx =BT_Tx & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); ++ ++ BT_PRI = rtw_read32(Adapter, 0x48c); ++ ++ DBG_8192C("Ratio 0x48c =%x\n", BT_PRI); ++ BT_PRI =BT_PRI & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); ++ ++ ++ Polling = rtw_read32(Adapter, 0x490); ++ //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); ++ ++ ++ if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffff && BT_State==0xff) ++ return _FALSE; ++ ++ BT_State &= BIT0; ++ ++ if(BT_State != pbtpriv->BT_CUR_State) ++ { ++ pbtpriv->BT_CUR_State = BT_State; ++ ++ if(registry_par->bt_sco == 3) ++ { ++ ServiceTypeCnt = 0; ++ ++ pbtpriv->BT_Service = BT_Idle; ++ ++ DBG_8192C("BT_%s\n", BT_State?"ON":"OFF"); ++ ++ BT_State = BT_State | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) |BIT2; ++ ++ rtw_write8(Adapter, 0x4fd, BT_State); ++ DBG_8192C("BT set 0x4fd to %x\n", BT_State); ++ } ++ ++ return _TRUE; ++ } ++ DBG_8192C("bRegBT_Sco = %d\n",registry_par->bt_sco); ++ ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pbtpriv->Ratio_Tx=Ratio_Tx; ++ pbtpriv->Ratio_PRI=Ratio_PRI; ++ ++ DBG_8192C("Ratio_Tx=%d\n", Ratio_Tx); ++ DBG_8192C("Ratio_PRI=%d\n", Ratio_PRI); ++ ++ ++ if(BT_State && registry_par->bt_sco==3) ++ { ++ DBG_8192C("bt_sco ==3 Follow Counter\n"); ++// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) ++// { ++// ServiceTypeCnt = 0; ++// return FALSE; ++// } ++// else ++ { ++ /* ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ */ ++ if((Ratio_Tx < 30) && (Ratio_PRI < 30)) ++ CurServiceType = BT_Idle; ++ else if((Ratio_PRI > 110) && (Ratio_PRI < 250)) ++ CurServiceType = BT_SCO; ++ else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) ++ CurServiceType = BT_Busy; ++ else if((Ratio_Tx >=350) && (Ratio_Tx < 500)) ++ CurServiceType = BT_OtherBusy; ++ else if(Ratio_Tx >=500) ++ CurServiceType = BT_PAN; ++ else ++ CurServiceType=BT_OtherAction; ++ } ++ ++/* if(pHalData->bt_coexist.bStopCount) ++ { ++ ServiceTypeCnt=0; ++ pHalData->bt_coexist.bStopCount=FALSE; ++ } ++*/ ++// if(CurServiceType == BT_OtherBusy) ++ { ++ ServiceTypeCnt=2; ++ LastServiceType=CurServiceType; ++ } ++#if 0 ++ else if(CurServiceType == LastServiceType) ++ { ++ if(ServiceTypeCnt<3) ++ ServiceTypeCnt++; ++ } ++ else ++ { ++ ServiceTypeCnt = 0; ++ LastServiceType = CurServiceType; ++ } ++#endif ++ ++ if(ServiceTypeCnt==2) ++ { ++ pbtpriv->BT_Service = LastServiceType; ++ BT_State = BT_State | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | ++ //((pbtpriv->BT_Service==BT_SCO)?0:BIT2); ++ ((pbtpriv->BT_Service!=BT_Idle)?0:BIT2); ++ ++ //if(pbtpriv->BT_Service==BT_Busy) ++ // BT_State&= ~(BIT2); ++ ++ if(pbtpriv->BT_Service==BT_SCO) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_SCO\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_Idle) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_Idle\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_OtherAction) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_OtherAction\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_Busy) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_Busy\n"); ++ } ++ else if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_PAN\n"); ++ } ++ else ++ { ++ DBG_8192C("BT TYPE Set to ==> BT_OtherBusy\n"); ++ } ++ ++ //Add interrupt migration when bt is not in idel state (no traffic). ++ //suggestion by Victor. ++ if(pbtpriv->BT_Service!=BT_Idle)//EDCA_VI_PARAM modify ++ { ++ ++ rtw_write16(Adapter, 0x504, 0x0ccc); ++ rtw_write8(Adapter, 0x506, 0x54); ++ rtw_write8(Adapter, 0x507, 0x54); ++ ++ } ++ else ++ { ++ rtw_write8(Adapter, 0x506, 0x00); ++ rtw_write8(Adapter, 0x507, 0x00); ++ } ++ ++ rtw_write8(Adapter, 0x4fd, BT_State); ++ DBG_8192C("BT_SCO set 0x4fd to %x\n", BT_State); ++ return _TRUE; ++ } ++ } ++ ++ return _FALSE; ++ ++} ++ ++static BOOLEAN ++BT_WifiConnectChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++// PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static BOOLEAN bMediaConnect = _FALSE; ++ ++ //if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ { ++ bMediaConnect = _FALSE; ++ } ++ else ++ { ++ if(!bMediaConnect) ++ { ++ bMediaConnect = _TRUE; ++ return _TRUE; ++ } ++ bMediaConnect = _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++#define BT_RSSI_STATE_NORMAL_POWER BIT0 ++#define BT_RSSI_STATE_AMDPU_OFF BIT1 ++#define BT_RSSI_STATE_SPECIAL_LOW BIT2 ++#define BT_RSSI_STATE_BG_EDCA_LOW BIT3 ++ ++static s32 GET_UNDECORATED_AVERAGE_RSSI(PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ s32 average_rssi; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE|WIFI_AP_STATE)) ++ { ++ average_rssi = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ } ++ else ++ { ++ average_rssi = pdmpriv->UndecoratedSmoothedPWDB; ++ } ++ return average_rssi; ++} ++ ++static u8 BT_RssiStateChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ s32 UndecoratedSmoothedPWDB; ++ u8 CurrBtRssiState = 0x00; ++ ++ ++ ++ ++ //if(pMgntInfo->bMediaConnect) // Default port ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ UndecoratedSmoothedPWDB = GET_UNDECORATED_AVERAGE_RSSI(Adapter); ++ } ++ else // associated entry pwdb ++ { ++ if(pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0) ++ UndecoratedSmoothedPWDB = 100; // No any RSSI information. Assume to be MAX. ++ else ++ UndecoratedSmoothedPWDB = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ } ++ ++ // Check RSSI to determine HighPower/NormalPower state for BT coexistence. ++ if(UndecoratedSmoothedPWDB >= 67) ++ CurrBtRssiState &= (~BT_RSSI_STATE_NORMAL_POWER); ++ else if(UndecoratedSmoothedPWDB < 62) ++ CurrBtRssiState |= BT_RSSI_STATE_NORMAL_POWER; ++ ++ // Check RSSI to determine AMPDU setting for BT coexistence. ++ if(UndecoratedSmoothedPWDB >= 40) ++ CurrBtRssiState &= (~BT_RSSI_STATE_AMDPU_OFF); ++ else if(UndecoratedSmoothedPWDB <= 32) ++ CurrBtRssiState |= BT_RSSI_STATE_AMDPU_OFF; ++ ++ // Marked RSSI state. It will be used to determine BT coexistence setting later. ++ if(UndecoratedSmoothedPWDB < 35) ++ CurrBtRssiState |= BT_RSSI_STATE_SPECIAL_LOW; ++ else ++ CurrBtRssiState &= (~BT_RSSI_STATE_SPECIAL_LOW); ++ ++ // Check BT state related to BT_Idle in B/G mode. ++ if(UndecoratedSmoothedPWDB < 15) ++ CurrBtRssiState |= BT_RSSI_STATE_BG_EDCA_LOW; ++ else ++ CurrBtRssiState &= (~BT_RSSI_STATE_BG_EDCA_LOW); ++ ++ if(CurrBtRssiState != pbtpriv->BtRssiState) ++ { ++ pbtpriv->BtRssiState = CurrBtRssiState; ++ return _TRUE; ++ } ++ else ++ { ++ return _FALSE; ++ } ++} ++ ++static void dm_BTCoexist(PADAPTER Adapter ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct mlme_ext_info *pmlmeinfo = &Adapter->mlmeextpriv.mlmext_info; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ //PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ //PRT_HIGH_THROUGHPUT pHTInfo = GET_HT_INFO(pMgntInfo); ++ ++ //PRX_TS_RECORD pRxTs = NULL; ++ u8 BT_gpio_mux; ++ ++ BOOLEAN bWifiConnectChange, bBtStateChange,bRssiStateChange; ++ ++ if(pbtpriv->bCOBT == _FALSE) return; ++ ++ if(!( pdmpriv->DMFlag & DYNAMIC_FUNC_BT)) return; ++ ++ if( (pbtpriv->BT_Coexist) &&(pbtpriv->BT_CoexistType == BT_CSR_BC4) && (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _FALSE) ) ++ { ++ bWifiConnectChange = BT_WifiConnectChange(Adapter); ++ bBtStateChange = BT_BTStateChange(Adapter); ++ bRssiStateChange = BT_RssiStateChange(Adapter); ++ ++ DBG_8192C("bWifiConnectChange %d, bBtStateChange %d,bRssiStateChange %d\n", ++ bWifiConnectChange,bBtStateChange,bRssiStateChange); ++ ++ // add by hpfan for debug message ++ BT_gpio_mux = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ DBG_8192C("BTCoexit Reg_0x40 (%2x)\n", BT_gpio_mux); ++ ++ if( bWifiConnectChange ||bBtStateChange ||bRssiStateChange ) ++ { ++ if(pbtpriv->BT_CUR_State) ++ { ++ ++ // Do not allow receiving A-MPDU aggregation. ++ if(pbtpriv->BT_Ampdu)// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++ { ++ ++ if(pmlmeinfo->assoc_AP_vendor == ciscoAP) ++ { ++ if(pbtpriv->BT_Service!=BT_Idle) ++ { ++ if(pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Disallow AMPDU \n"); ++ pmlmeinfo->bAcceptAddbaReq = _FALSE; ++ send_delba(Adapter,0, get_my_bssid(&(pmlmeinfo->network))); ++ } ++ } ++ else ++ { ++ if(!pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU RSSI >=40\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(!pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU BT Idle\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ } ++ } ++ ++#if 0 ++ else if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) ++ { ++ if(pHalData->bt_coexist.BtRssiState & BT_RSSI_STATE_AMDPU_OFF) ++ { ++ if(pMgntInfo->bBT_Ampdu && pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); ++ pHTInfo->bAcceptAddbaReq = FALSE; ++ if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) ++ TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); ++ } ++ } ++ else ++ { ++ if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); ++ pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(pMgntInfo->bBT_Ampdu && !pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); ++ pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++#endif ++ ++ if(pbtpriv->BT_Ant_isolation) ++ { ++ DBG_8192C("BT_IsolationLow\n"); ++ ++// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. ++#if 0 ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ if(pMgntInfo->bUseRAMask) ++ { ++ // 20100407 Joseph: Fix rate adaptive modification for BT coexist. ++ // This fix is not complete yet. It shall also consider VWifi and Adhoc case, ++ // which connect with multiple STAs. ++ Adapter->HalFunc.UpdateHalRAMaskHandler( ++ Adapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pMgntInfo->RateAdaptive.RATRState, ++ RAMask_Normal); ++ } ++ else ++ { ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++#endif ++ ++ // 20100415 Joseph: Modify BT coexist mechanism suggested by Yaying. ++ // Now we only enable HW BT coexist when BT in "Busy" state. ++ if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) ++ { ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && ++ pbtpriv->BT_Service==BT_OtherAction) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else ++ { ++ if((pbtpriv->BT_Service==BT_Busy) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER)) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else if((pbtpriv->BT_Service==BT_OtherAction) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_SPECIAL_LOW)) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0xa0); ++ } ++ else if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT_Turn ON Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ else ++ { ++ DBG_8192C("BT_Turn OFF Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ } ++ } ++ else ++ { ++ DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist\n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ } ++ ++ if(1)//pMgntInfo->LinkDetectInfo.NumRecvDataInPeriod >= 20) ++ { ++ if(pbtpriv->BT_Service==BT_PAN) ++ { ++ DBG_8192C("BT_Turn ON Coexist(Reg0x44 = 0x10100)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x10100); ++ } ++ else ++ { ++ DBG_8192C("BT_Turn OFF Coexist(Reg0x44 = 0x0)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); ++ } ++ } ++ else ++ { ++ DBG_8192C("BT: There is no Wifi traffic!! Turn off Coexist(Reg0x44 = 0x0)\n"); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, 0x0); ++ } ++ ++ // 20100430 Joseph: Integrate the BT coexistence EDCA tuning here. ++ if(pbtpriv->BtRssiState & BT_RSSI_STATE_NORMAL_POWER) ++ { ++ if(pbtpriv->BT_Service==BT_OtherBusy) ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea72b; ++ //pbtpriv->BtEdcaDL = 0x5ea72b; ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72b; ++ ++ DBG_8192C("BT in BT_OtherBusy state Tx (%d) >350 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx ,REG_EDCA_BE_PARAM, 0x5ea72b); ++ } ++ else if(pbtpriv->BT_Service==BT_Busy) ++ { ++ //pbtpriv->BtEdcaUL = 0x5eb82f; ++ //pbtpriv->BtEdcaDL = 0x5eb82f; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82f; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82f; ++ ++ DBG_8192C("BT in BT_Busy state parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82f); ++ } ++ else if(pbtpriv->BT_Service==BT_SCO) ++ { ++ if(pbtpriv->Ratio_Tx>160) ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea72f; ++ //pbtpriv->BtEdcaDL = 0x5ea72f; ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea72f; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea72f; ++ DBG_8192C("BT in BT_SCO state Tx (%d) >160 parameter(0x%x) = 0x%x\n",pbtpriv->Ratio_Tx, REG_EDCA_BE_PARAM, 0x5ea72f); ++ } ++ else ++ { ++ //pbtpriv->BtEdcaUL = 0x5ea32b; ++ //pbtpriv->BtEdcaDL = 0x5ea42b; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5ea32b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5ea42b; ++ ++ DBG_8192C("BT in BT_SCO state Tx (%d) <160 parameter(0x%x) = 0x%x\n", pbtpriv->Ratio_Tx,REG_EDCA_BE_PARAM, 0x5ea32f); ++ } ++ } ++ else ++ { ++ // BT coexistence mechanism does not control EDCA parameter. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ DBG_8192C("BT in State %d and parameter(0x%x) use original setting.\n",pbtpriv->BT_Service, REG_EDCA_BE_PARAM); ++ } ++ ++ if((pbtpriv->BT_Service!=BT_Idle) && ++ (pmlmeext->cur_wireless_mode == WIRELESS_MODE_G) && ++ (pbtpriv->BtRssiState & BT_RSSI_STATE_BG_EDCA_LOW)) ++ { ++ //pbtpriv->BtEdcaUL = 0x5eb82b; ++ //pbtpriv->BtEdcaDL = 0x5eb82b; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0x5eb82b; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0x5eb82b; ++ ++ DBG_8192C("BT set parameter(0x%x) = 0x%x\n", REG_EDCA_BE_PARAM, 0x5eb82b); ++ } ++ } ++ else ++ { ++ // BT coexistence mechanism does not control EDCA parameter. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ } ++ ++ // 20100415 Joseph: Set RF register 0x1E and 0x1F for BT coexist suggested by Yaying. ++ if(pbtpriv->BT_Service!=BT_Idle) ++ { ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, 0xf); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1E[7:4] = 0x%x \n", 0xf)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, 0xf); ++ } ++ else ++ { ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n",pbtpriv->BtRfRegOrigin1E); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); ++ } ++ } ++ else ++ { ++ DBG_8192C("BT_IsolationHigh\n"); ++ // Do nothing. ++ } ++ } ++ else ++ { ++ ++ if(pbtpriv->BT_Ampdu && !pmlmeinfo->bAcceptAddbaReq) ++ { ++ DBG_8192C("BT_Allow AMPDU bt is off\n"); ++ pmlmeinfo->bAcceptAddbaReq = _TRUE; ++ } ++ ++ DBG_8192C("BT_Turn OFF Coexist bt is off \n"); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, 0x00); ++ ++ DBG_8192C("BT Set RfReg0x1E[7:4] = 0x%x \n", pbtpriv->BtRfRegOrigin1E); ++ PHY_SetRFReg(Adapter, PathA, 0x1e, 0xf0, pbtpriv->BtRfRegOrigin1E); ++ //RTPRINT(FBT, BT_TRACE, ("BT Set RfReg0x1F[7:4] = 0x%x \n", pHalData->bt_coexist.BtRfRegOrigin1F)); ++ //PHY_SetRFReg(Adapter, PathA, 0x1f, 0xf0, pHalData->bt_coexist.BtRfRegOrigin1F); ++ ++ // BT coexistence mechanism does not control EDCA parameter since BT is disabled. ++ //pbtpriv->BtEdcaUL = 0; ++ //pbtpriv->BtEdcaDL = 0; ++ pbtpriv->BT_EDCA[UP_LINK] = 0; ++ pbtpriv->BT_EDCA[DOWN_LINK] = 0; ++ ++ ++// 20100427 Joseph: Do not adjust Rate adaptive for BT coexist suggested by SD3. ++#if 0 ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ if(pMgntInfo->bUseRAMask) ++ { ++ // 20100407 Joseph: Fix rate adaptive modification for BT coexist. ++ // This fix is not complete yet. It shall also consider VWifi and Adhoc case, ++ // which connect with multiple STAs. ++ Adapter->HalFunc.UpdateHalRAMaskHandler( ++ Adapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pMgntInfo->RateAdaptive.RATRState, ++ RAMask_Normal); ++ } ++ else ++ { ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++#endif ++ } ++ } ++ } ++} ++ ++static void dm_InitBtCoexistDM( PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ ++ if( !pbtpriv->BT_Coexist ) return; ++ ++ pbtpriv->BtRfRegOrigin1E = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1e, 0xf0); ++ pbtpriv->BtRfRegOrigin1F = (u8)PHY_QueryRFReg(Adapter, PathA, 0x1f, 0xf0); ++} ++ ++void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ ++ pbtpriv->bCOBT = bStart; ++ send_delba(padapter,0, get_my_bssid(&(pmlmeinfo->network))); ++ send_delba(padapter,1, get_my_bssid(&(pmlmeinfo->network))); ++ ++} ++ ++void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir) ++{ ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ DBG_8192C("issue_delete_ba : %s...\n",(dir==0)?"RX_DIR":"TX_DIR"); ++ send_delba(padapter,dir, get_my_bssid(&(pmlmeinfo->network))); ++} ++ ++#endif ++ ++#if 0//def CONFIG_PCI_HCI ++ ++BOOLEAN ++BT_BTStateChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ ++ u4Byte temp, Polling, Ratio_Tx, Ratio_PRI; ++ u4Byte BT_Tx, BT_PRI; ++ u1Byte BT_State; ++ static u1Byte ServiceTypeCnt = 0; ++ u1Byte CurServiceType; ++ static u1Byte LastServiceType = BT_Idle; ++ ++ if(!pMgntInfo->bMediaConnect) ++ return FALSE; ++ ++ BT_State = PlatformEFIORead1Byte(Adapter, 0x4fd); ++/* ++ temp = PlatformEFIORead4Byte(Adapter, 0x488); ++ BT_Tx = (u2Byte)(((temp<<8)&0xff00)+((temp>>8)&0xff)); ++ BT_PRI = (u2Byte)(((temp>>8)&0xff00)+((temp>>24)&0xff)); ++ ++ temp = PlatformEFIORead4Byte(Adapter, 0x48c); ++ Polling = ((temp<<8)&0xff000000) + ((temp>>8)&0x00ff0000) + ++ ((temp<<8)&0x0000ff00) + ((temp>>8)&0x000000ff); ++ ++*/ ++ BT_Tx = PlatformEFIORead4Byte(Adapter, 0x488); ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio 0x488 =%x\n", BT_Tx)); ++ BT_Tx =BT_Tx & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_Tx =%x\n", BT_Tx)); ++ ++ BT_PRI = PlatformEFIORead4Byte(Adapter, 0x48c); ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio Ratio 0x48c =%x\n", BT_PRI)); ++ BT_PRI =BT_PRI & 0x00ffffff; ++ //RTPRINT(FBT, BT_TRACE, ("Ratio BT_PRI =%x\n", BT_PRI)); ++ ++ ++ Polling = PlatformEFIORead4Byte(Adapter, 0x490); ++ //RTPRINT(FBT, BT_TRACE, ("Ratio 0x490 =%x\n", Polling)); ++ ++ ++ if(BT_Tx==0xffffffff && BT_PRI==0xffffffff && Polling==0xffffffffff && BT_State==0xff) ++ return FALSE; ++ ++ BT_State &= BIT0; ++ ++ if(BT_State != pHalData->bt_coexist.BT_CUR_State) ++ { ++ pHalData->bt_coexist.BT_CUR_State = BT_State; ++ ++ if(pMgntInfo->bRegBT_Sco == 3) ++ { ++ ServiceTypeCnt = 0; ++ ++ pHalData->bt_coexist.BT_Service = BT_Idle; ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_%s\n", BT_State?"ON":"OFF")); ++ ++ BT_State = BT_State | ++ ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) |BIT2; ++ ++ PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); ++ RTPRINT(FBT, BT_TRACE, ("BT set 0x4fd to %x\n", BT_State)); ++ } ++ ++ return TRUE; ++ } ++ RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco %d\n", pMgntInfo->bRegBT_Sco)); ++ ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ ++ if(BT_State && pMgntInfo->bRegBT_Sco==3) ++ { ++ RTPRINT(FBT, BT_TRACE, ("bRegBT_Sco ==3 Follow Counter\n")); ++// if(BT_Tx==0xffff && BT_PRI==0xffff && Polling==0xffffffff) ++// { ++// ServiceTypeCnt = 0; ++// return FALSE; ++// } ++// else ++ { ++ /* ++ Ratio_Tx = BT_Tx*1000/Polling; ++ Ratio_PRI = BT_PRI*1000/Polling; ++ ++ pHalData->bt_coexist.Ratio_Tx=Ratio_Tx; ++ pHalData->bt_coexist.Ratio_PRI=Ratio_PRI; ++ ++ RTPRINT(FBT, BT_TRACE, ("Ratio_Tx=%d\n", Ratio_Tx)); ++ RTPRINT(FBT, BT_TRACE, ("Ratio_PRI=%d\n", Ratio_PRI)); ++ ++ */ ++ if((Ratio_Tx <= 50) && (Ratio_PRI <= 50)) ++ CurServiceType = BT_Idle; ++ else if((Ratio_PRI > 150) && (Ratio_PRI < 200)) ++ CurServiceType = BT_SCO; ++ else if((Ratio_Tx >= 200)&&(Ratio_PRI >= 200)) ++ CurServiceType = BT_Busy; ++ else if(Ratio_Tx >= 350) ++ CurServiceType = BT_OtherBusy; ++ else ++ CurServiceType=BT_OtherAction; ++ ++ } ++/* if(pHalData->bt_coexist.bStopCount) ++ { ++ ServiceTypeCnt=0; ++ pHalData->bt_coexist.bStopCount=FALSE; ++ } ++*/ ++ if(CurServiceType == BT_OtherBusy) ++ { ++ ServiceTypeCnt=2; ++ LastServiceType=CurServiceType; ++ } ++ else if(CurServiceType == LastServiceType) ++ { ++ if(ServiceTypeCnt<3) ++ ServiceTypeCnt++; ++ } ++ else ++ { ++ ServiceTypeCnt = 0; ++ LastServiceType = CurServiceType; ++ } ++ ++ if(ServiceTypeCnt==2) ++ { ++ pHalData->bt_coexist.BT_Service = LastServiceType; ++ BT_State = BT_State | ++ ((pHalData->bt_coexist.BT_Ant_isolation==1)?0:BIT1) | ++ ((pHalData->bt_coexist.BT_Service==BT_SCO)?0:BIT2); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_Busy) ++ BT_State&= ~(BIT2); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_SCO) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_SCO\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_Idle) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Idle\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_OtherAction) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherAction\n")); ++ } ++ else if(pHalData->bt_coexist.BT_Service==BT_Busy) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_Busy\n")); ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT TYPE Set to ==> BT_OtherBusy\n")); ++ } ++ ++ //Add interrupt migration when bt is not in idel state (no traffic). ++ //suggestion by Victor. ++ if(pHalData->bt_coexist.BT_Service!=BT_Idle) ++ { ++ ++ PlatformEFIOWrite2Byte(Adapter, 0x504, 0x0ccc); ++ PlatformEFIOWrite1Byte(Adapter, 0x506, 0x54); ++ PlatformEFIOWrite1Byte(Adapter, 0x507, 0x54); ++ ++ } ++ else ++ { ++ PlatformEFIOWrite1Byte(Adapter, 0x506, 0x00); ++ PlatformEFIOWrite1Byte(Adapter, 0x507, 0x00); ++ } ++ ++ PlatformEFIOWrite1Byte(Adapter, 0x4fd, BT_State); ++ RTPRINT(FBT, BT_TRACE, ("BT_SCO set 0x4fd to %x\n", BT_State)); ++ return TRUE; ++ } ++ } ++ ++ return FALSE; ++ ++} ++ ++BOOLEAN ++BT_WifiConnectChange( ++ IN PADAPTER Adapter ++ ) ++{ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static BOOLEAN bMediaConnect = FALSE; ++ ++ if(!pMgntInfo->bMediaConnect || MgntRoamingInProgress(pMgntInfo)) ++ { ++ bMediaConnect = FALSE; ++ } ++ else ++ { ++ if(!bMediaConnect) ++ { ++ bMediaConnect = TRUE; ++ return TRUE; ++ } ++ bMediaConnect = TRUE; ++ } ++ ++ return FALSE; ++} ++ ++BOOLEAN ++BT_RSSIChangeWithAMPDU( ++ IN PADAPTER Adapter ++ ) ++{ ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(!Adapter->pNdisCommon->bRegBT_Ampdu || !Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ return FALSE; ++ ++ RTPRINT(FBT, BT_TRACE, ("RSSI is %d\n",pHalData->UndecoratedSmoothedPWDB)); ++ ++ if((pHalData->UndecoratedSmoothedPWDB<=32) && pMgntInfo->pHTInfo->bAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32 Need change\n")); ++ return TRUE; ++ ++ } ++ else if((pHalData->UndecoratedSmoothedPWDB>=40) && !pMgntInfo->pHTInfo->bAcceptAddbaReq ) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40, Need change\n")); ++ return TRUE; ++ } ++ else ++ return FALSE; ++ ++} ++ ++ ++VOID ++dm_BTCoexist( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &Adapter->MgntInfo; ++ static u1Byte LastTxPowerLvl = 0xff; ++ PRX_TS_RECORD pRxTs = NULL; ++ ++ BOOLEAN bWifiConnectChange, bBtStateChange,bRSSIChangeWithAMPDU; ++ ++ if( (pHalData->bt_coexist.BluetoothCoexist) && ++ (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) && ++ (!ACTING_AS_AP(Adapter)) ) ++ { ++ bWifiConnectChange = BT_WifiConnectChange(Adapter); ++ bBtStateChange = BT_BTStateChange(Adapter); ++ bRSSIChangeWithAMPDU = BT_RSSIChangeWithAMPDU(Adapter); ++ RTPRINT(FBT, BT_TRACE, ("bWifiConnectChange %d, bBtStateChange %d,LastTxPowerLvl %x, DynamicTxHighPowerLvl %x\n", ++ bWifiConnectChange,bBtStateChange,LastTxPowerLvl,pHalData->DynamicTxHighPowerLvl)); ++ if( bWifiConnectChange ||bBtStateChange || ++ (LastTxPowerLvl != pHalData->DynamicTxHighPowerLvl) ||bRSSIChangeWithAMPDU) ++ { ++ LastTxPowerLvl = pHalData->DynamicTxHighPowerLvl; ++ ++ if(pHalData->bt_coexist.BT_CUR_State) ++ { ++ // Do not allow receiving A-MPDU aggregation. ++ if((pHalData->bt_coexist.BT_Service==BT_SCO) || (pHalData->bt_coexist.BT_Service==BT_Busy)) ++ { ++ if(pHalData->UndecoratedSmoothedPWDB<=32) ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Disallow AMPDU RSSI <=32\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = FALSE; ++ if(GetTs(Adapter, (PTS_COMMON_INFO*)(&pRxTs), pMgntInfo->Bssid, 0, RX_DIR, FALSE)) ++ TsInitDelBA(Adapter, (PTS_COMMON_INFO)pRxTs, RX_DIR); ++ } ++ } ++ else if(pHalData->UndecoratedSmoothedPWDB>=40) ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU RSSI >=40\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ } ++ else ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU BT not in SCO or BUSY\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ } ++ ++ if(pHalData->bt_coexist.BT_Ant_isolation) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_IsolationLow\n")); ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ ++ if(pHalData->bt_coexist.BT_Service==BT_SCO) ++ { ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist with SCO \n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ } ++ else if(pHalData->DynamicTxHighPowerLvl == TxHighPwrLevel_Normal) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn ON Coexist\n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0xb4); ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist\n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ } ++ } ++ else ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_IsolationHigh\n")); ++ // Do nothing. ++ } ++ } ++ else ++ { ++ if(Adapter->pNdisCommon->bRegBT_Ampdu && Adapter->pNdisCommon->bRegAcceptAddbaReq) ++ { ++ RTPRINT(FBT, BT_TRACE, ("BT_Allow AMPDU bt is off\n")); ++ pMgntInfo->pHTInfo->bAcceptAddbaReq = TRUE; ++ } ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Turn OFF Coexist bt is off \n")); ++ PlatformEFIOWrite1Byte(Adapter, REG_GPIO_MUXCFG, 0x14); ++ ++ RTPRINT(FBT, BT_TRACE, ("BT_Update Rate table\n")); ++ Adapter->HalFunc.UpdateHalRATRTableHandler( ++ Adapter, ++ &pMgntInfo->dot11OperationalRateSet, ++ pMgntInfo->dot11HTOperationalRateSet,NULL); ++ } ++ } ++ } ++} ++#endif ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_CheckRfCtrlGPIO() ++ * ++ * Overview: Copy 8187B template for 9xseries. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/10/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++dm_CheckRfCtrlGPIO( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) ++ #ifdef CONFIG_USB_HCI ++ // 2010/08/12 MH Add for CU selective suspend. ++ PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(Adapter); ++ #else ++ PRT_SDIO_DEVICE pDevice = GET_RT_SDIO_DEVICE(Adapter); ++ #endif ++#endif ++ ++ if(!Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) ++ return; ++ ++ RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); ++ ++#if defined (CONFIG_USB_HCI) || defined (CONFIG_SDIO_HCI) ++ // Walk around for DTM test, we will not enable HW - radio on/off because r/w ++ // page 1 register before Lextra bus is enabled cause system fails when resuming ++ // from S4. 20080218, Emily ++ if(Adapter->bInHctTest) ++ return; ++ ++//#if ((HAL_CODE_BASE == RTL8192_S) ) ++ //Adapter->HalFunc.GPIOChangeRFHandler(Adapter, GPIORF_POLLING); ++//#else ++ // 2010/07/27 MH Only Minicard and support selective suspend, we can not turn off all MAC power to ++ // stop 8051. For dongle and minicard, we both support selective suspend mode. ++ //if(pDevice->RegUsbSS && Adapter->HalFunc.GetInterfaceSelectionHandler(Adapter) == INTF_SEL2_MINICARD) ++ ++ // ++ // 2010/08/12 MH We support severl power consumption combination as below. ++ // ++ // Power consumption combination ++ // SS Enable: (LPS disable + IPS + SW/HW radio off) ++ // 1. Dongle + PDN (support HW radio off) ++ // 2. Dongle + Normal (No HW radio off) ++ // 3. MiniCard + PDN (support HW radio off) ++ // 4. MiniCard + Normal (support HW radio off) ++ // ++ // SS Disable: (LPS + IPS + SW/HW radio off) ++ // 1. Dongle + PDN (support HW radio off) ++ // 2. Dongle + Normal (No HW radio off) ++ // 3. MiniCard + PDN (support HW radio off) ++ // 4. MiniCard + Normal (support HW radio off) ++ // ++ // For Power down module detection. We need to read power register no matter ++ // dongle or minicard, we will add the item is the detection method. ++ // ++ // ++ //vivi add du case ++ if ((IS_HARDWARE_TYPE_8192CU(Adapter)||IS_HARDWARE_TYPE_8192DU(Adapter)) ++ && pDevice->RegUsbSS) ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Enabled\n")); ++ if (SUPPORT_HW_RADIO_DETECT(Adapter)) ++ { // Support HW radio detection ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); ++ GpioDetectTimerStart(Adapter); ++ } ++ else ++ { // Dongle does not support HW radio detection.?? In the fufure?? ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); ++ } ++ } ++ else if (IS_HARDWARE_TYPE_8192CU(Adapter) || ++ IS_HARDWARE_TYPE_8723U(Adapter)|| ++ IS_HARDWARE_TYPE_8192DU(Adapter) || ++ IS_HARDWARE_TYPE_8723S(Adapter)) ++ { // Not support Selective suspend ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB SS Disable\n")); ++ if (SUPPORT_HW_RADIO_DETECT(Adapter)) ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB Card Type 2/3/4 support GPIO Detect\n")); ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++ } ++ else ++ { ++ RT_TRACE(COMP_RF, DBG_LOUD, ("USB DONGLE Non-GPIO-Detect\n")); ++ } ++ } ++ else ++ { // CE only support noemal HW radio detection now. Support timers GPIO detection in SE/CU. ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++ } ++//#endif ++#else if defined CONFIG_PCI_HCI ++ if(Adapter->bInHctTest) ++ return; ++ ++ // CE only support noemal HW radio detection now. We support timers GPIO detection in SE. ++ PlatformScheduleWorkItem( &(pHalData->GPIOChangeRFWorkItem) ); ++#endif ++#endif ++} /* dm_CheckRfCtrlGPIO */ ++ ++static VOID ++dm_InitRateAdaptiveMask( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pdmpriv->RateAdaptive; ++ ++ pRA->RATRState = DM_RATR_STA_INIT; ++ pRA->PreRATRState = DM_RATR_STA_INIT; ++ ++ if (pdmpriv->DM_Type == DM_Type_ByDriver) ++ pdmpriv->bUseRAMask = _TRUE; ++ else ++ pdmpriv->bUseRAMask = _FALSE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: dm_RefreshRateAdaptiveMask() ++ * ++ * Overview: Update rate table mask according to rssi ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 05/27/2009 hpfan Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++dm_RefreshRateAdaptiveMask( IN PADAPTER pAdapter) ++{ ++#if 0 ++ PADAPTER pTargetAdapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMGNT_INFO pMgntInfo = &(ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, TRUE)->MgntInfo); ++ PRATE_ADAPTIVE pRA = (PRATE_ADAPTIVE)&pMgntInfo->RateAdaptive; ++ u4Byte LowRSSIThreshForRA = 0, HighRSSIThreshForRA = 0; ++ ++ if(pAdapter->bDriverStopped) ++ { ++ RT_TRACE(COMP_RATR, DBG_TRACE, ("<---- dm_RefreshRateAdaptiveMask(): driver is going to unload\n")); ++ return; ++ } ++ ++ if(!pMgntInfo->bUseRAMask) ++ { ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("<---- dm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); ++ return; ++ } ++ ++ // if default port is connected, update RA table for default port (infrastructure mode only) ++ if(pAdapter->MgntInfo.mAssoc && (!ACTING_AS_AP(pAdapter))) ++ { ++ ++ // decide rastate according to rssi ++ switch (pRA->PreRATRState) ++ { ++ case DM_RATR_STA_HIGH: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ HighRSSIThreshForRA = 55; ++ LowRSSIThreshForRA = 20; ++ break; ++ ++ case DM_RATR_STA_LOW: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 25; ++ break; ++ ++ default: ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ break; ++ } ++ ++ if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) ++ pRA->RATRState = DM_RATR_STA_HIGH; ++ else if(pHalData->UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) ++ pRA->RATRState = DM_RATR_STA_MIDDLE; ++ else ++ pRA->RATRState = DM_RATR_STA_LOW; ++ ++ if(pRA->PreRATRState != pRA->RATRState) ++ { ++ RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("Target AP addr : "), pMgntInfo->Bssid); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pHalData->UndecoratedSmoothedPWDB)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pRA->RATRState)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pRA->PreRATRState, pRA->RATRState)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler( ++ pAdapter, ++ FALSE, ++ 0, ++ NULL, ++ NULL, ++ pRA->RATRState); ++ pRA->PreRATRState = pRA->RATRState; ++ } ++ } ++ ++ // ++ // The following part configure AP/VWifi/IBSS rate adaptive mask. ++ // ++ if(ACTING_AS_AP(pAdapter) || ACTING_AS_IBSS(pAdapter)) ++ { ++ pTargetAdapter = pAdapter; ++ } ++ else ++ { ++ pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, FALSE); ++ if(!ACTING_AS_AP(pTargetAdapter)) ++ pTargetAdapter = NULL; ++ } ++ ++ // if extension port (softap) is started, updaet RA table for more than one clients associate ++ if(pTargetAdapter != NULL) ++ { ++ int i; ++ PRT_WLAN_STA pEntry; ++ PRATE_ADAPTIVE pEntryRA; ++ ++ for(i = 0; i < ASSOCIATE_ENTRY_NUM; i++) ++ { ++ if( pTargetAdapter->MgntInfo.AsocEntry[i].bUsed && pTargetAdapter->MgntInfo.AsocEntry[i].bAssociated) ++ { ++ pEntry = pTargetAdapter->MgntInfo.AsocEntry+i; ++ pEntryRA = &pEntry->RateAdaptive; ++ ++ switch (pEntryRA->PreRATRState) ++ { ++ case DM_RATR_STA_HIGH: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ } ++ break; ++ ++ case DM_RATR_STA_MIDDLE: ++ { ++ HighRSSIThreshForRA = 55; ++ LowRSSIThreshForRA = 20; ++ } ++ break; ++ ++ case DM_RATR_STA_LOW: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 25; ++ } ++ break; ++ ++ default: ++ { ++ HighRSSIThreshForRA = 50; ++ LowRSSIThreshForRA = 20; ++ } ++ } ++ ++ if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)HighRSSIThreshForRA) ++ pEntryRA->RATRState = DM_RATR_STA_HIGH; ++ else if(pEntry->rssi_stat.UndecoratedSmoothedPWDB > (s4Byte)LowRSSIThreshForRA) ++ pEntryRA->RATRState = DM_RATR_STA_MIDDLE; ++ else ++ pEntryRA->RATRState = DM_RATR_STA_LOW; ++ ++ if(pEntryRA->PreRATRState != pEntryRA->RATRState) ++ { ++ RT_PRINT_ADDR(COMP_RATR, DBG_LOUD, ("AsocEntry addr : "), pEntry->MacAddr); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI = %d\n", pEntry->rssi_stat.UndecoratedSmoothedPWDB)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("RSSI_LEVEL = %d\n", pEntryRA->RATRState)); ++ RT_TRACE(COMP_RATR, DBG_LOUD, ("PreState = %d, CurState = %d\n", pEntryRA->PreRATRState, pEntryRA->RATRState)); ++ pAdapter->HalFunc.UpdateHalRAMaskHandler( ++ pTargetAdapter, ++ FALSE, ++ pEntry->AID+1, ++ pEntry->MacAddr, ++ pEntry, ++ pEntryRA->RATRState); ++ pEntryRA->PreRATRState = pEntryRA->RATRState; ++ } ++ ++ } ++ } ++ } ++#endif ++} ++ ++static VOID ++dm_CheckProtection( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte CurRate, RateThreshold; ++ ++ if(pMgntInfo->pHTInfo->bCurBW40MHz) ++ RateThreshold = MGN_MCS1; ++ else ++ RateThreshold = MGN_MCS3; ++ ++ if(Adapter->TxStats.CurrentInitTxRate <= RateThreshold) ++ { ++ pMgntInfo->bDmDisableProtect = TRUE; ++ DbgPrint("Forced disable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++ else ++ { ++ pMgntInfo->bDmDisableProtect = FALSE; ++ DbgPrint("Enable protect: %x\n", Adapter->TxStats.CurrentInitTxRate); ++ } ++#endif ++} ++ ++static VOID ++dm_CheckStatistics( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ if(!Adapter->MgntInfo.bMediaConnect) ++ return; ++ ++ //2008.12.10 tynli Add for getting Current_Tx_Rate_Reg flexibly. ++ Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_INIT_TX_RATE, (pu1Byte)(&Adapter->TxStats.CurrentInitTxRate) ); ++ ++ // Calculate current Tx Rate(Successful transmited!!) ++ ++ // Calculate current Rx Rate(Successful received!!) ++ ++ //for tx tx retry count ++ Adapter->HalFunc.GetHwRegHandler( Adapter, HW_VAR_RETRY_COUNT, (pu1Byte)(&Adapter->TxStats.NumTxRetryCount) ); ++#endif ++} ++ ++static void dm_CheckPbcGPIO(_adapter *padapter) ++{ ++ u8 tmp1byte; ++ u8 bPbcPressed = _FALSE; ++ ++ if(!padapter->registrypriv.hw_wps_pbc) ++ return; ++ ++#ifdef CONFIG_USB_HCI ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte |= (HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as output mode ++ ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IN, tmp1byte); //reset the floating voltage level ++ ++ tmp1byte = rtw_read8(padapter, GPIO_IO_SEL); ++ tmp1byte &= ~(HAL_8192C_HW_GPIO_WPS_BIT); ++ rtw_write8(padapter, GPIO_IO_SEL, tmp1byte); //enable GPIO[2] as input mode ++ ++ tmp1byte =rtw_read8(padapter, GPIO_IN); ++ ++ if (tmp1byte == 0xff) ++ return ; ++ ++ if (tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT) ++ { ++ bPbcPressed = _TRUE; ++ } ++#else ++ tmp1byte = rtw_read8(padapter, GPIO_IN); ++ //RT_TRACE(COMP_IO, DBG_TRACE, ("dm_CheckPbcGPIO - %x\n", tmp1byte)); ++ ++ if (tmp1byte == 0xff || padapter->init_adpt_in_progress) ++ return ; ++ ++ if((tmp1byte&HAL_8192C_HW_GPIO_WPS_BIT)==0) ++ { ++ bPbcPressed = _TRUE; ++ } ++#endif ++ ++ if( _TRUE == bPbcPressed) ++ { ++ // Here we only set bPbcPressed to true ++ // After trigger PBC, the variable will be set to false ++ DBG_8192C("CheckPbcGPIO - PBC is pressed\n"); ++ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_NET_PBC); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_NET_PBC); ++#endif ++#else ++ ++ if ( padapter->pid[0] == 0 ) ++ { // 0 is the default value and it means the application monitors the HW PBC doesn't privde its pid to driver. ++ return; ++ } ++ ++#ifdef PLATFORM_LINUX ++ rtw_signal_process(padapter->pid[0], SIGUSR1); ++#endif ++#endif ++ } ++} ++ ++#ifdef CONFIG_PCI_HCI ++// ++// Description: ++// Perform interrupt migration dynamically to reduce CPU utilization. ++// ++// Assumption: ++// 1. Do not enable migration under WIFI test. ++// ++// Created by Roger, 2010.03.05. ++// ++VOID ++dm_InterruptMigration( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ BOOLEAN bCurrentIntMt, bCurrentACIntDisable; ++ BOOLEAN IntMtToSet = _FALSE; ++ BOOLEAN ACIntToSet = _FALSE; ++ ++ ++ // Retrieve current interrupt migration and Tx four ACs IMR settings first. ++ bCurrentIntMt = pHalData->bInterruptMigration; ++ bCurrentACIntDisable = pHalData->bDisableTxInt; ++ ++ // ++ // Currently we use busy traffic for reference instead of RxIntOK counts to prevent non-linear Rx statistics ++ // when interrupt migration is set before. 2010.03.05. ++ // ++ if(!Adapter->registrypriv.wifi_spec && ++ (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && ++ pmlmepriv->LinkDetectInfo.bHigherBusyTraffic) ++ { ++ IntMtToSet = _TRUE; ++ ++ // To check whether we should disable Tx interrupt or not. ++ if(pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic ) ++ ACIntToSet = _TRUE; ++ } ++ ++ //Update current settings. ++ if( bCurrentIntMt != IntMtToSet ){ ++ DBG_8192C("%s(): Update interrrupt migration(%d)\n",__FUNCTION__,IntMtToSet); ++ if(IntMtToSet) ++ { ++ // ++ // Set interrrupt migration timer and corresponging Tx/Rx counter. ++ // timer 25ns*0xfa0=100us for 0xf packets. ++ // 2010.03.05. ++ // ++ rtw_write32(Adapter, REG_INT_MIG, 0xff000fa0);// 0x306:Rx, 0x307:Tx ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ else ++ { ++ // Reset all interrupt migration settings. ++ rtw_write32(Adapter, REG_INT_MIG, 0); ++ pHalData->bInterruptMigration = IntMtToSet; ++ } ++ } ++ ++ /*if( bCurrentACIntDisable != ACIntToSet ){ ++ DBG_8192C("%s(): Update AC interrrupt(%d)\n",__FUNCTION__,ACIntToSet); ++ if(ACIntToSet) // Disable four ACs interrupts. ++ { ++ // ++ // Disable VO, VI, BE and BK four AC interrupts to gain more efficient CPU utilization. ++ // When extremely highly Rx OK occurs, we will disable Tx interrupts. ++ // 2010.03.05. ++ // ++ UpdateInterruptMask8192CE( Adapter, 0, RT_AC_INT_MASKS ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ else// Enable four ACs interrupts. ++ { ++ UpdateInterruptMask8192CE( Adapter, RT_AC_INT_MASKS, 0 ); ++ pHalData->bDisableTxInt = ACIntToSet; ++ } ++ }*/ ++ ++} ++ ++#endif ++ ++// ++// Initialize GPIO setting registers ++// ++static void ++dm_InitGPIOSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 tmp1byte; ++ ++ tmp1byte = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ tmp1byte &= (GPIOSEL_GPIO | ~GPIOSEL_ENBT); ++ ++#ifdef CONFIG_BT_COEXIST ++ // UMB-B cut bug. We need to support the modification. ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && ++ pHalData->bt_coexist.BT_Coexist) ++ { ++ tmp1byte |= (BIT5); ++ } ++#endif ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, tmp1byte); ++ ++} ++ ++static void update_EDCA_param(_adapter *padapter) ++{ ++ u32 trafficIndex; ++ u32 edca_param; ++ u64 cur_tx_bytes = 0; ++ u64 cur_rx_bytes = 0; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 bbtchange = _FALSE; ++#endif ++ ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //associated AP ++ if ((pregpriv->wifi_spec == 1) || (pmlmeinfo->HT_enable == 0)) ++ { ++ return; ++ } ++ ++ if (pmlmeinfo->assoc_AP_vendor >= maxAP) ++ { ++ return; ++ } ++ ++ cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; ++ cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; ++ ++ //traffic, TX or RX ++ if((pmlmeinfo->assoc_AP_vendor == ralinkAP)||(pmlmeinfo->assoc_AP_vendor == atherosAP)) ++ { ++ if (cur_tx_bytes > (cur_rx_bytes << 2)) ++ { // Uplink TP is present. ++ trafficIndex = UP_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ } ++ else ++ { ++ if (cur_rx_bytes > (cur_tx_bytes << 2)) ++ { // Downlink TP is present. ++ trafficIndex = DOWN_LINK; ++ } ++ else ++ { // Balance TP is present. ++ trafficIndex = UP_LINK; ++ } ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(pbtpriv->BT_Coexist) ++ { ++ if( (pbtpriv->BT_EDCA[UP_LINK]!=0) || (pbtpriv->BT_EDCA[DOWN_LINK]!=0)) ++ { ++ bbtchange = _TRUE; ++ } ++ } ++#endif ++ ++ if (pdmpriv->prv_traffic_idx != trafficIndex) ++ { ++#if 0 ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, pbtpriv->BT_EDCA[trafficIndex]); ++ else ++#endif ++ //adjust EDCA parameter for BE queue ++ //fire_write_MAC_cmd(padapter, EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]); ++ ++#else ++ if((pmlmeinfo->assoc_AP_vendor == ciscoAP) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else if((pmlmeinfo->assoc_AP_vendor == airgocapAP) && ++ ((pmlmeext->cur_wireless_mode == WIRELESS_11G) ||(pmlmeext->cur_wireless_mode == WIRELESS_11BG))) ++ { ++ edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; ++ } ++ else ++ { ++ edca_param = EDCAParam[unknownAP][trafficIndex]; ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if(_TRUE == bbtchange) ++ edca_param = pbtpriv->BT_EDCA[trafficIndex]; ++#endif ++ ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, edca_param); ++#endif ++ pdmpriv->prv_traffic_idx = trafficIndex; ++ } ++ ++//exit_update_EDCA_param: ++ ++ pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; ++ precvpriv->last_rx_bytes = precvpriv->rx_bytes; ++ ++ return; ++} ++ ++static void dm_InitDynamicBBPowerSaving( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ pPSTable->PreCCAState = CCA_MAX; ++ pPSTable->CurCCAState = CCA_MAX; ++ pPSTable->PreRFState = RF_MAX; ++ pPSTable->CurRFState = RF_MAX; ++ pPSTable->Rssi_val_min = 0; ++} ++ ++static void dm_1R_CCA( ++ IN PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ if(pPSTable->Rssi_val_min != 0) ++ { ++ if(pPSTable->PreCCAState == CCA_2R) ++ { ++ if(pPSTable->Rssi_val_min >= 35) ++ pPSTable->CurCCAState = CCA_1R; ++ else ++ pPSTable->CurCCAState = CCA_2R; ++ } ++ else{ ++ if(pPSTable->Rssi_val_min <= 30) ++ pPSTable->CurCCAState = CCA_2R; ++ else ++ pPSTable->CurCCAState = CCA_1R; ++ } ++ } ++ else ++ pPSTable->CurCCAState=CCA_MAX; ++ ++ if(pPSTable->PreCCAState != pPSTable->CurCCAState) ++ { ++ if(pPSTable->CurCCAState == CCA_1R) ++ { ++ if(pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x13); ++ PHY_SetBBReg(pAdapter, 0xe70, bMaskByte3, 0x20); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable , bMaskByte0, 0x23); ++ PHY_SetBBReg(pAdapter, 0xe70, 0x7fc00000, 0x10c); // Set RegE70[30:22] = 9b'100001100 ++ } ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, bMaskByte0, 0x33); ++ PHY_SetBBReg(pAdapter,0xe70, bMaskByte3, 0x63); ++ } ++ pPSTable->PreCCAState = pPSTable->CurCCAState; ++ } ++ //DBG_8192C("dm_1R_CCA(): CCAStage=%x\n", pPSTable->CurCCAState); ++} ++ ++void ++rtl8192c_dm_RF_Saving( ++ IN PADAPTER pAdapter, ++ IN u8 bForceInNormal ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ if(pAdapter->registrypriv.intel_class_mode==1) ++ return; ++ if(pdmpriv->initialize == 0){ ++ pdmpriv->rf_saving_Reg874 = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, bMaskDWord)&0x1CC000)>>14; ++ pdmpriv->rf_saving_RegC70 = (PHY_QueryBBReg(pAdapter, rOFDM0_AGCParameter1, bMaskDWord)&BIT3)>>3; ++ pdmpriv->rf_saving_Reg85C = (PHY_QueryBBReg(pAdapter, rFPGA0_XCD_SwitchControl, bMaskDWord)&0xFF000000)>>24; ++ pdmpriv->rf_saving_RegA74 = (PHY_QueryBBReg(pAdapter, 0xa74, bMaskDWord)&0xF000)>>12; ++ //Reg818 = PHY_QueryBBReg(pAdapter, 0x818, bMaskDWord); ++ pdmpriv->initialize = 1; ++ } ++ ++ if(!bForceInNormal) ++ { ++ if(pPSTable->Rssi_val_min != 0) ++ { ++ ++ if(pPSTable->PreRFState == RF_Normal) ++ { ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if(pPSTable->Rssi_val_min >= 50) ++ #else ++ if(pPSTable->Rssi_val_min >= 30) ++ #endif ++ pPSTable->CurRFState = RF_Save; ++ else ++ pPSTable->CurRFState = RF_Normal; ++ } ++ else{ ++ #ifdef CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ if(pPSTable->Rssi_val_min <= 45) ++ #else ++ if(pPSTable->Rssi_val_min <= 25) ++ #endif ++ pPSTable->CurRFState = RF_Normal; ++ else ++ pPSTable->CurRFState = RF_Save; ++ } ++ } ++ else ++ pPSTable->CurRFState=RF_MAX; ++ } ++ else ++ { ++ pPSTable->CurRFState = RF_Normal; ++ } ++ ++ if(pPSTable->PreRFState != pPSTable->CurRFState) ++ { ++ if(pPSTable->CurRFState == RF_Save) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1C0000, 0x2); //Reg874[20:18]=3'b010 ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, 0); //RegC70[3]=1'b0 ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, 0x63); //Reg85C[31:24]=0x63 ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW, 0xC000, 0x2); //Reg874[15:14]=2'b10 ++ PHY_SetBBReg(pAdapter, 0xa74, 0xF000, 0x3); //RegA75[7:4]=0x3 ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); //Reg818[28]=1'b0 ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x1); //Reg818[28]=1'b1 ++ DBG_8192C("%s(): RF_Save\n", __FUNCTION__); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_RFInterfaceSW , 0x1CC000, pdmpriv->rf_saving_Reg874); ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCParameter1, BIT3, pdmpriv->rf_saving_RegC70); ++ PHY_SetBBReg(pAdapter, rFPGA0_XCD_SwitchControl, 0xFF000000, pdmpriv->rf_saving_Reg85C); ++ PHY_SetBBReg(pAdapter, 0xa74, 0xF000, pdmpriv->rf_saving_RegA74); ++ PHY_SetBBReg(pAdapter, 0x818, BIT28, 0x0); ++ DBG_8192C("%s(): RF_Normal\n", __FUNCTION__); ++ } ++ pPSTable->PreRFState = pPSTable->CurRFState; ++ } ++} ++ ++static void ++dm_DynamicBBPowerSaving( ++IN PADAPTER pAdapter ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ PS_T *pPSTable = &pdmpriv->DM_PSTable; ++ ++ //1 1.Determine the minimum RSSI ++ if((check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) && ++ (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) ++ { ++ pPSTable->Rssi_val_min = 0; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("Not connected to any \n")); ++ } ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) // Default port ++ { ++ //if(ACTING_AS_AP(pAdapter) || pMgntInfo->mIbss) ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) //todo: AP Mode ++ { ++ pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Client PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ else ++ { ++ pPSTable->Rssi_val_min = pdmpriv->UndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("STA Default Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ } ++ else // associated entry pwdb ++ { ++ pPSTable->Rssi_val_min = pdmpriv->EntryMinUndecoratedSmoothedPWDB; ++ //RT_TRACE(COMP_BB_POWERSAVING, DBG_LOUD, ("AP Ext Port PWDB = 0x%lx \n", pPSTable->Rssi_val_min)); ++ } ++ ++ //1 2.Power Saving for 92C ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ //dm_1R_CCA(pAdapter); ++ } ++ ++ // 20100628 Joseph: Turn off BB power save for 88CE because it makesthroughput unstable. ++ // 20100831 Joseph: Turn ON BB power save again after modifying AGC delay from 900ns to 600ns. ++ //1 3.Power Saving for 88C ++ else ++ { ++ rtl8192c_dm_RF_Saving(pAdapter, _FALSE); ++ } ++} ++ ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++// Add new function to reset the state of antenna diversity before link. ++// ++void SwAntDivResetBeforeLink8192C(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++} ++ ++// Compare RSSI for deciding antenna ++void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if((0 != pHalData->AntDivCfg) && (!IS_92C_SERIAL(pHalData->VersionID)) ) ++ { ++ //DBG_8192C("update_network=> orgRSSI(%d)(%d),newRSSI(%d)(%d)\n",dst->Rssi,query_rx_pwr_percentage(dst->Rssi), ++ // src->Rssi,query_rx_pwr_percentage(src->Rssi)); ++ //select optimum_antenna for before linked =>For antenna diversity ++ if(dst->Rssi >= src->Rssi )//keep org parameter ++ { ++ src->Rssi = dst->Rssi; ++ src->PhyInfo.Optimum_antenna = dst->PhyInfo.Optimum_antenna; ++ } ++ } ++} ++ ++// Add new function to reset the state of antenna diversity before link. ++u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ // Condition that does not need to use antenna diversity. ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ { ++ //DBG_8192C("SwAntDivBeforeLink8192C(): No AntDiv Mechanism.\n"); ++ return _FALSE; ++ } ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ return _FALSE; ++ } ++ // Since driver is going to set BB register, it shall check if there is another thread controlling BB/RF. ++/* ++ if(pHalData->eRFPowerState!=eRfOn || pMgntInfo->RFChangeInProgress || pMgntInfo->bMediaConnect) ++ { ++ ++ ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ++ ("SwAntDivCheckBeforeLink8192C(): RFChangeInProgress(%x), eRFPowerState(%x)\n", ++ pMgntInfo->RFChangeInProgress, ++ pHalData->eRFPowerState)); ++ ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ ++ return FALSE; ++ } ++*/ ++ ++ if(pDM_SWAT_Table->SWAS_NoLink_State == 0){ ++ //switch channel ++ pDM_SWAT_Table->SWAS_NoLink_State = 1; ++ pDM_SWAT_Table->CurAntenna = (pDM_SWAT_Table->CurAntenna==Antenna_A)?Antenna_B:Antenna_A; ++ ++ //PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, pDM_SWAT_Table->CurAntenna); ++ rtw_antenna_select_cmd(Adapter, pDM_SWAT_Table->CurAntenna, _FALSE); ++ //DBG_8192C("%s change antenna to ANT_( %s ).....\n",__FUNCTION__, (pDM_SWAT_Table->CurAntenna==Antenna_A)?"A":"B"); ++ return _TRUE; ++ } ++ else ++ { ++ pDM_SWAT_Table->SWAS_NoLink_State = 0; ++ return _FALSE; ++ } ++ ++ ++ ++} ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++// ++// 20100514 Luke/Joseph: ++// Add new function to reset antenna diversity state after link. ++// ++void ++SwAntDivRestAfterLink8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ return; ++ ++ //DBG_8192C("======> SwAntDivRestAfterLink <========== \n"); ++ pHalData->RSSI_cnt_A= 0; ++ pHalData->RSSI_cnt_B= 0; ++ pHalData->RSSI_test = _FALSE; ++ ++ pDM_SWAT_Table->try_flag = 0xff; ++ pDM_SWAT_Table->RSSI_Trying = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; ++ ++ pdmpriv->lastTxOkCnt=0; ++ pdmpriv->lastRxOkCnt=0; ++ ++ pdmpriv->TXByteCnt_A=0; ++ pdmpriv->TXByteCnt_B=0; ++ pdmpriv->RXByteCnt_A=0; ++ pdmpriv->RXByteCnt_B=0; ++ pdmpriv->DoubleComfirm=0; ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ ++} ++ ++ ++// ++// 20100514 Luke/Joseph: ++// Add new function for antenna diversity after link. ++// This is the main function of antenna diversity after link. ++// This function is called in HalDmWatchDog() and dm_SW_AntennaSwitchCallback(). ++// HalDmWatchDog() calls this function with SWAW_STEP_PEAK to initialize the antenna test. ++// In SWAW_STEP_PEAK, another antenna and a 500ms timer will be set for testing. ++// After 500ms, dm_SW_AntennaSwitchCallback() calls this function to compare the signal just ++// listened on the air with the RSSI of original antenna. ++// It chooses the antenna with better RSSI. ++// There is also a aged policy for error trying. Each error trying will cost more 5 seconds waiting ++// penalty to get next try. ++// ++static VOID ++dm_SW_AntennaSwitch( ++ PADAPTER Adapter, ++ u8 Step ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ s32 curRSSI=100, RSSI_A, RSSI_B; ++ u64 curTxOkCnt, curRxOkCnt; ++ u64 CurByteCnt = 0, PreByteCnt = 0; ++ u8 nextAntenna = 0; ++ u8 Score_A=0, Score_B=0; ++ u8 i; ++ ++ // Condition that does not need to use antenna diversity. ++ if(IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0)) ++ { ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No AntDiv Mechanism.\n")); ++ return; ++ } ++ // If dynamic ant_div is disabled. ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_ANT_DIV) ) ++ { ++ return; ++ } ++ ++ if (check_fwstate(&Adapter->mlmepriv, _FW_LINKED) ==_FALSE) ++ return; ++#if 0 //to do ++ // Radio off: Status reset to default and return. ++ if(pHalData->eRFPowerState==eRfOff) ++ { ++ SwAntDivRestAfterLink(Adapter); ++ return; ++ } ++#endif ++ //DBG_8192C("\n............................ %s.........................\n",__FUNCTION__); ++ // Handling step mismatch condition. ++ // Peak step is not finished at last time. Recover the variable and check again. ++ if( Step != pDM_SWAT_Table->try_flag ) ++ { ++ SwAntDivRestAfterLink8192C(Adapter); ++ } ++ ++ ++ if(pDM_SWAT_Table->try_flag == 0xff) ++ { ++#if 0 ++ // Select RSSI checking target ++ if(pMgntInfo->mAssoc && !ACTING_AS_AP(Adapter)) ++ { ++ // Target: Infrastructure mode AP. ++ pHalData->RSSI_target = NULL; ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is DEF AP!\n")); ++ } ++ else ++ { ++ u8 index = 0; ++ PRT_WLAN_STA pEntry = NULL; ++ PADAPTER pTargetAdapter = NULL; ++ ++ if( pMgntInfo->mIbss || ACTING_AS_AP(Adapter) ) ++ { ++ // Target: AP/IBSS peer. ++ pTargetAdapter = Adapter; ++ } ++ else if(ACTING_AS_AP(ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE))) ++ { ++ // Target: VWIFI peer. ++ pTargetAdapter = ADJUST_TO_ADAPTIVE_ADAPTER(Adapter, FALSE); ++ } ++ ++ if(pTargetAdapter != NULL) ++ { ++ for(index=0; indexbAssociated) ++ break; ++ } ++ } ++ } ++ ++ if(pEntry == NULL) ++ { ++ SwAntDivRestAfterLink(Adapter); ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): No Link.\n")); ++ return; ++ } ++ else ++ { ++ pHalData->RSSI_target = pEntry; ++ RT_TRACE(COMP_SWAS, DBG_LOUD, ("dm_SW_AntennaSwitch(): RSSI_target is PEER STA\n")); ++ } ++ } ++ ++ ++#endif ++ ++ pHalData->RSSI_cnt_A= 0; ++ pHalData->RSSI_cnt_B= 0; ++ pDM_SWAT_Table->try_flag = 0; ++ // DBG_8192C("dm_SW_AntennaSwitch(): Set try_flag to 0 prepare for peak!\n"); ++ return; ++ } ++ else ++ { ++ curTxOkCnt = Adapter->xmitpriv.tx_bytes - pdmpriv->lastTxOkCnt; ++ curRxOkCnt = Adapter->recvpriv.rx_bytes - pdmpriv->lastRxOkCnt; ++ ++ pdmpriv->lastTxOkCnt = Adapter->xmitpriv.tx_bytes ; ++ pdmpriv->lastRxOkCnt = Adapter->recvpriv.rx_bytes ; ++ ++ if(pDM_SWAT_Table->try_flag == 1) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ pdmpriv->TXByteCnt_A += curTxOkCnt; ++ pdmpriv->RXByteCnt_A += curRxOkCnt; ++ //DBG_8192C("##### TXByteCnt_A(%lld) , RXByteCnt_A(%lld) ####\n",pdmpriv->TXByteCnt_A,pdmpriv->RXByteCnt_A); ++ } ++ else ++ { ++ pdmpriv->TXByteCnt_B += curTxOkCnt; ++ pdmpriv->RXByteCnt_B += curRxOkCnt; ++ //DBG_8192C("##### TXByteCnt_B(%lld) , RXByteCnt_B(%lld) ####\n",pdmpriv->TXByteCnt_B,pdmpriv->RXByteCnt_B); ++ } ++ ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ pDM_SWAT_Table->RSSI_Trying--; ++ //DBG_8192C("RSSI_Trying = %d\n",pDM_SWAT_Table->RSSI_Trying); ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ { ++ CurByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A) : (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B); ++ PreByteCnt = (pDM_SWAT_Table->CurAntenna == Antenna_A)? (pdmpriv->TXByteCnt_B+pdmpriv->RXByteCnt_B) : (pdmpriv->TXByteCnt_A+pdmpriv->RXByteCnt_A); ++ ++ //DBG_8192C("CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); ++ ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ PreByteCnt = PreByteCnt*9; //normalize:Cur=90ms:Pre=10ms ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ //CurByteCnt = CurByteCnt/2; ++ CurByteCnt = CurByteCnt>>1;//normalize:100ms:50ms ++ } ++ ++ ++ //DBG_8192C("After DIV=>CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("PreByteCnt = %lld\n",PreByteCnt); ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ ++ curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_B : RSSI_A; ++ //DBG_8192C("Luke:PreRSSI = %d, CurRSSI = %d\n",pDM_SWAT_Table->PreRSSI, curRSSI); ++ //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", ++ //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); ++ //DBG_8192C("Luke:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ //RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); ++ } ++ ++ } ++ else ++ { ++ ++ if(pHalData->RSSI_cnt_A > 0) ++ RSSI_A = pHalData->RSSI_sum_A/pHalData->RSSI_cnt_A; ++ else ++ RSSI_A = 0; ++ if(pHalData->RSSI_cnt_B > 0) ++ RSSI_B = pHalData->RSSI_sum_B/pHalData->RSSI_cnt_B; ++ else ++ RSSI_B = 0; ++ curRSSI = (pDM_SWAT_Table->CurAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ pDM_SWAT_Table->PreRSSI = (pDM_SWAT_Table->PreAntenna == Antenna_A)? RSSI_A : RSSI_B; ++ //DBG_8192C("Ekul:PreRSSI = %d, CurRSSI = %d\n", pDM_SWAT_Table->PreRSSI, curRSSI); ++ //DBG_8192C("SWAS: preAntenna= %s, curAntenna= %s \n", ++ //(pDM_SWAT_Table->PreAntenna == Antenna_A?"A":"B"), (pDM_SWAT_Table->CurAntenna == Antenna_A?"A":"B")); ++ ++ //DBG_8192C("Ekul:RSSI_A= %d, RSSI_cnt_A = %d, RSSI_B= %d, RSSI_cnt_B = %d\n", ++ // RSSI_A, pHalData->RSSI_cnt_A, RSSI_B, pHalData->RSSI_cnt_B); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curTxOkCnt = %d\n", curTxOkCnt)); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("Ekul:curRxOkCnt = %d\n", curRxOkCnt)); ++ } ++ ++ //1 Trying State ++ if((pDM_SWAT_Table->try_flag == 1)&&(pDM_SWAT_Table->RSSI_Trying == 0)) ++ { ++ ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ //DBG_8192C("SWAS: TestMode = TP_MODE\n"); ++ //DBG_8192C("TRY:CurByteCnt = %lld\n", CurByteCnt); ++ //DBG_8192C("TRY:PreByteCnt = %lld\n",PreByteCnt); ++ if(CurByteCnt < PreByteCnt) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ } ++ else ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ pDM_SWAT_Table->SelectAntennaMap=(pDM_SWAT_Table->SelectAntennaMap<<1)+1; ++ else ++ pDM_SWAT_Table->SelectAntennaMap=pDM_SWAT_Table->SelectAntennaMap<<1; ++ } ++ for (i= 0; i<8; i++) ++ { ++ if(((pDM_SWAT_Table->SelectAntennaMap>>i)&BIT0) == 1) ++ Score_A++; ++ else ++ Score_B++; ++ } ++ //DBG_8192C("SelectAntennaMap=%x\n ",pDM_SWAT_Table->SelectAntennaMap); ++ //DBG_8192C("Score_A=%d, Score_B=%d\n", Score_A, Score_B); ++ ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ nextAntenna = (Score_A > Score_B)?Antenna_A:Antenna_B; ++ } ++ else ++ { ++ nextAntenna = (Score_B > Score_A)?Antenna_B:Antenna_A; ++ } ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("nextAntenna=%s\n",(nextAntenna==Antenna_A)?"A":"B")); ++ //RT_TRACE(COMP_SWAS, DBG_LOUD, ("preAntenna= %s, curAntenna= %s \n", ++ //(DM_SWAT_Table.PreAntenna == Antenna_A?"A":"B"), (DM_SWAT_Table.CurAntenna == Antenna_A?"A":"B"))); ++ ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ //DBG_8192C("SWAS: Switch back to another antenna\n"); ++ } ++ else ++ { ++ //DBG_8192C("SWAS: current anntena is good\n"); ++ } ++ } ++ ++ if(pDM_SWAT_Table->TestMode == RSSI_MODE) ++ { ++ //DBG_8192C("SWAS: TestMode = RSSI_MODE\n"); ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ if(curRSSI < pDM_SWAT_Table->PreRSSI) //Current antenna is worse than previous antenna ++ { ++ //DBG_8192C("SWAS: Switch back to another antenna\n"); ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ } ++ else // current anntena is good ++ { ++ nextAntenna = pDM_SWAT_Table->CurAntenna; ++ //DBG_8192C("SWAS: current anntena is good\n"); ++ } ++ } ++ pDM_SWAT_Table->try_flag = 0; ++ pHalData->RSSI_test = _FALSE; ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ pdmpriv->TXByteCnt_A = 0; ++ pdmpriv->TXByteCnt_B = 0; ++ pdmpriv->RXByteCnt_A = 0; ++ pdmpriv->RXByteCnt_B = 0; ++ ++ } ++ ++ //1 Normal State ++ else if(pDM_SWAT_Table->try_flag == 0) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) ++ pdmpriv->TrafficLoad = TRAFFIC_HIGH; ++ else ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ if(((curTxOkCnt+curRxOkCnt)>>1) > 1875000) ++ pdmpriv->TrafficLoad = TRAFFIC_HIGH; ++ else ++ pdmpriv->TrafficLoad = TRAFFIC_LOW; ++ } ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ //DBG_8192C("Normal:TrafficLoad = %lld\n", curTxOkCnt+curRxOkCnt); ++ ++ //Prepare To Try Antenna ++ nextAntenna = (pDM_SWAT_Table->CurAntenna == Antenna_A)? Antenna_B : Antenna_A; ++ pDM_SWAT_Table->try_flag = 1; ++ pHalData->RSSI_test = _TRUE; ++ if((curRxOkCnt+curTxOkCnt) > 1000) ++ { ++ pDM_SWAT_Table->RSSI_Trying = 4; ++ pDM_SWAT_Table->TestMode = TP_MODE; ++ } ++ else ++ { ++ pDM_SWAT_Table->RSSI_Trying = 2; ++ pDM_SWAT_Table->TestMode = RSSI_MODE; ++ ++ } ++ //DBG_8192C("SWAS: Normal State -> Begin Trying! TestMode=%s\n",(pDM_SWAT_Table->TestMode == TP_MODE)?"TP":"RSSI"); ++ ++ ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_B = 0; ++ } ++ } ++ ++ //1 4.Change TRX antenna ++ if(nextAntenna != pDM_SWAT_Table->CurAntenna) ++ { ++ //DBG_8192C("@@@@@@@@ SWAS: Change TX Antenna!\n "); ++ rtw_antenna_select_cmd(Adapter, nextAntenna, 1); ++ } ++ ++ //1 5.Reset Statistics ++ pDM_SWAT_Table->PreAntenna = pDM_SWAT_Table->CurAntenna; ++ pDM_SWAT_Table->CurAntenna = nextAntenna; ++ pDM_SWAT_Table->PreRSSI = curRSSI; ++ ++ ++ //1 6.Set next timer ++ ++ if(pDM_SWAT_Table->RSSI_Trying == 0) ++ return; ++ ++ if(pDM_SWAT_Table->RSSI_Trying%2 == 0) ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,10 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 10 ms\n"); ++ } ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer, 50 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 50 ms\n"); ++ } ++ } ++ else ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer, 500 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); ++ } ++ } ++ else ++ { ++ if(pDM_SWAT_Table->TestMode == TP_MODE) ++ { ++ if(pdmpriv->TrafficLoad == TRAFFIC_HIGH) ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,90 ); //ms ++ else if(pdmpriv->TrafficLoad == TRAFFIC_LOW) ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,100 ); //ms ++ } ++ else ++ { ++ _set_timer(&pdmpriv->SwAntennaSwitchTimer,500 ); //ms ++ //DBG_8192C("dm_SW_AntennaSwitch(): Test another antenna for 500 ms\n"); ++ } ++ } ++ ++// RT_TRACE(COMP_SWAS, DBG_LOUD, ("SWAS: -----The End-----\n ")); ++ ++} ++ ++// ++// 20100514 Luke/Joseph: ++// Callback function for 500ms antenna test trying. ++// ++static void dm_SW_AntennaSwitchCallback(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ ++ if(padapter->net_closed == _TRUE) ++ return; ++ // Only ++ dm_SW_AntennaSwitch(padapter, SWAW_STEP_DETERMINE); ++} ++ ++ ++// ++// 20100722 ++// This function is used to gather the RSSI information for antenna testing. ++// It selects the RSSI of the peer STA that we want to know. ++// ++void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ if(pDM_SWAT_Table->CurAntenna == Antenna_A) ++ { ++ pHalData->RSSI_sum_A += RxPWDBAll; ++ pHalData->RSSI_cnt_A++; ++ } ++ else ++ { ++ pHalData->RSSI_sum_B+= RxPWDBAll; ++ pHalData->RSSI_cnt_B++; ++ ++ } ++ //DBG_8192C("%s Ant_(%s),RSSI_sum(%d),RSSI_cnt(%d)\n",__FUNCTION__,(2==pHalData->CurAntenna)?"A":"B",pHalData->RSSI_sum,pHalData->RSSI_cnt); ++ } ++ ++} ++ ++ ++ ++static VOID ++dm_SW_AntennaSwitchInit( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ SWAT_T *pDM_SWAT_Table = &pdmpriv->DM_SWAT_Table; ++ ++ pHalData->RSSI_sum_A = 0; ++ pHalData->RSSI_sum_B = 0; ++ pHalData->RSSI_cnt_A = 0; ++ pHalData->RSSI_cnt_B = 0; ++ ++ pDM_SWAT_Table->CurAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->PreAntenna = pHalData->CurAntenna; ++ pDM_SWAT_Table->try_flag = 0xff; ++ pDM_SWAT_Table->PreRSSI = 0; ++ pDM_SWAT_Table->bTriggerAntennaSwitch = 0; ++ pDM_SWAT_Table->SelectAntennaMap=0xAA; ++ ++ // Move the timer initialization to InitializeVariables function. ++ //PlatformInitializeTimer(Adapter, &pMgntInfo->SwAntennaSwitchTimer, (RT_TIMER_CALL_BACK)dm_SW_AntennaSwitchCallback, NULL, "SwAntennaSwitchTimer"); ++} ++ ++#endif ++ ++//#define RSSI_CCK 0 ++//#define RSSI_OFDM 1 ++static void dm_RSSIMonitorInit( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ pdmpriv->OFDM_Pkt_Cnt = 0; ++ pdmpriv->RSSI_Select = RSSI_DEFAULT; ++} ++ ++static void dm_RSSIMonitorCheck( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _FALSE) ++ return; ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE |WIFI_ADHOC_STATE) == _TRUE ) ++ { ++ if(Adapter->stapriv.asoc_sta_count < 2) ++ return; ++ } ++ ++ if(pdmpriv->OFDM_Pkt_Cnt == 0) ++ pdmpriv->RSSI_Select = RSSI_CCK; ++ else ++ pdmpriv->RSSI_Select = RSSI_OFDM; ++ ++ pdmpriv->OFDM_Pkt_Cnt = 0; ++ //DBG_8192C("RSSI_Select=%s OFDM_Pkt_Cnt(%d)\n", ++ //(pdmpriv->RSSI_Select == RSSI_OFDM)?"RSSI_OFDM":"RSSI_CCK", ++ //pdmpriv->OFDM_Pkt_Cnt); ++} ++ ++//============================================================ ++// functions ++//============================================================ ++void rtl8192c_init_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ _rtw_memset(pdmpriv, 0, sizeof(struct dm_priv)); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ _init_timer(&(pdmpriv->SwAntennaSwitchTimer), Adapter->pnetdev , dm_SW_AntennaSwitchCallback, Adapter); ++#endif ++} ++ ++void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ _cancel_timer_ex(&pdmpriv->SwAntennaSwitchTimer); ++#endif ++} ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++void dm_InitHybridAntDiv(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ //Set OFDM HW RX Antenna Diversity ++ PHY_SetBBReg(Adapter,0xc50, BIT7, 1); //Enable Hardware antenna switch ++ PHY_SetBBReg(Adapter,0x870, BIT9|BIT8, 0); //Enable hardware control of "ANT_SEL" & "ANT_SELB" ++ PHY_SetBBReg(Adapter,0xCA4, BIT11, 0); //Switch to another antenna by checking pwdb threshold ++ PHY_SetBBReg(Adapter,0xCA4, 0x7FF, 0x080); //Pwdb threshold=8dB ++ PHY_SetBBReg(Adapter,0xC54, BIT23, 1); //Decide final antenna by comparing 2 antennas' pwdb ++ PHY_SetBBReg(Adapter,0x874, BIT23, 0); //No update ANTSEL during GNT_BT=1 ++ PHY_SetBBReg(Adapter,0x80C, BIT21, 1); //TX atenna selection from tx_info ++ //Set CCK HW RX Antenna Diversity ++ PHY_SetBBReg(Adapter,0xA00, BIT15, 1);//Enable antenna diversity ++ PHY_SetBBReg(Adapter,0xA0C, BIT4, 0); //Antenna diversity decision period = 32 sample ++ PHY_SetBBReg(Adapter,0xA0C, 0xf, 0xf); //Threshold for antenna diversity. Check another antenna power if input power < ANT_lim*4 ++ PHY_SetBBReg(Adapter,0xA10, BIT13, 1); //polarity ana_A=1 and ana_B=0 ++ PHY_SetBBReg(Adapter,0xA14, 0x1f, 0x8); //default antenna power = inpwr*(0.5 + r_ant_step/16) ++ ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++} ++ ++ ++#define RxDefaultAnt1 0x65a9 ++#define RxDefaultAnt2 0x569a ++ ++void dm_SelectRXDefault(IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID) ||pHalData->AntDivCfg==0) ++ return; ++ ++ //DbgPrint(" Ant1_Cnt=%d, Ant2_Cnt=%d\n", pHalData->Ant1_Cnt, pHalData->Ant2_Cnt); ++ //DBG_8192C(" CCK_Ant1_Cnt = %d, CCK_Ant2_Cnt = %d\n", pHalData->CCK_Ant1_Cnt, pHalData->CCK_Ant2_Cnt); ++ //DBG_8192C(" OFDM_Ant1_Cnt = %d, OFDM_Ant2_Cnt = %d\n", pHalData->OFDM_Ant1_Cnt, pHalData->OFDM_Ant2_Cnt); ++ if((pHalData->OFDM_Ant1_Cnt == 0) && (pHalData->OFDM_Ant2_Cnt == 0)) ++ { ++ if((pHalData->CCK_Ant1_Cnt + pHalData->CCK_Ant2_Cnt) >=10 ) ++ { ++ if(pHalData->CCK_Ant1_Cnt > (5*pHalData->CCK_Ant2_Cnt)) ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ else if(pHalData->CCK_Ant2_Cnt > (5*pHalData->CCK_Ant1_Cnt)) ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ else if(pHalData->CCK_Ant1_Cnt > pHalData->CCK_Ant2_Cnt) ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ else ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++ } ++ } ++ else ++ { ++ if(pHalData->OFDM_Ant1_Cnt > pHalData->OFDM_Ant2_Cnt) ++ { ++ DBG_8192C(" RX Default = Ant1\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt1); ++ } ++ else ++ { ++ DBG_8192C(" RX Default = Ant2\n"); ++ PHY_SetBBReg(Adapter, 0x858, 0xFFFF, RxDefaultAnt2); ++ } ++ pHalData->CCK_Ant1_Cnt = 0; ++ pHalData->CCK_Ant2_Cnt = 0; ++ pHalData->OFDM_Ant1_Cnt = 0; ++ pHalData->OFDM_Ant2_Cnt = 0; ++ } ++ ++ ++} ++ ++#endif ++ ++void ++rtl8192c_InitHalDm( ++ IN PADAPTER Adapter ++ ) ++{ ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i; ++ ++#ifdef CONFIG_USB_HCI ++ dm_InitGPIOSetting(Adapter); ++#endif ++ ++ pdmpriv->DM_Type = DM_Type_ByDriver; ++ pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; ++ pdmpriv->UndecoratedSmoothedPWDB = (-1); ++ pdmpriv->UndecoratedSmoothedCCK = (-1); ++ ++ ++ //.1 DIG INIT ++ pdmpriv->bDMInitialGainEnable = _TRUE; ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_DIG; ++ dm_DIGInit(Adapter); ++ ++ //.2 DynamicTxPower INIT ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_HP; ++ dm_InitDynamicTxPower(Adapter); ++ ++ //.3 ++ DM_InitEdcaTurbo(Adapter); ++ ++ //.4 RateAdaptive INIT ++ dm_InitRateAdaptiveMask(Adapter); ++ ++ //.5 Tx Power Tracking Init. ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_SS; ++ DM_InitializeTXPowerTracking(Adapter); ++ ++#ifdef CONFIG_BT_COEXIST ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_BT; ++ dm_InitBtCoexistDM(Adapter); ++#endif ++ ++ dm_InitDynamicBBPowerSaving(Adapter); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; ++ dm_SW_AntennaSwitchInit(Adapter); ++#endif ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ pdmpriv->DMFlag |= DYNAMIC_FUNC_ANT_DIV; ++ dm_InitHybridAntDiv(Adapter); ++#endif ++ ++ dm_RSSIMonitorInit(Adapter); ++ ++ pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; ++ ++ // Save REG_INIDATA_RATE_SEL value for TXDESC. ++ for(i = 0 ; i<32 ; i++) ++ { ++ pdmpriv->INIDATA_RATE[i] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL+i) & 0x3f; ++ } ++} ++VOID ++rtl8192c_HalDmPollingC2HEvt( ++ IN PADAPTER padapter ++ ) ++{ ++ u8 trigger=0,evt_id=0,evt_len=0,idx=0,tmp8=0,evt_seq=0; ++ u8 evt_buf[15]; ++ ++ trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); ++ while (trigger ==0xFF) ++ { ++ tmp8=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL); ++ evt_id=tmp8&0xf; ++ evt_len=(tmp8&0xf0)>>4; ++ evt_seq=rtw_read8(padapter,REG_C2HEVT_MSG_NORMAL+1); ++ DBG_8192C(" %s evt_id =0x%x evt_len=0x%x evt_seq=0x%x\n",__FUNCTION__,evt_id,evt_len,evt_seq); ++ for(idx=0;idxstapriv; ++ struct sta_info *psta=NULL; ++ DBG_8192C(" %s mac_id=%d\n",__FUNCTION__,mac_id); ++ for(idx=0;idxsta_aid[mac_id-2+idx]; ++ if(psta !=NULL){ ++ psta->init_rate=evt_buf[idx]; ++ DBG_8192C(" %s mac_id=%d psta->init_rate=0x%x\n",__FUNCTION__,mac_id,psta->init_rate); ++ } ++ } ++ ++ } ++ default: ++ DBG_8192C(" %s evt_id =0x%x evt_len=0x%x\n",__FUNCTION__,evt_id,evt_len); ++ } ++ rtw_write8(padapter, REG_C2HEVT_CLEAR,0x0); ++ rtw_mdelay_os(1); ++ trigger=rtw_read8(padapter,REG_C2HEVT_CLEAR); ++ } ++ //DBG_8192C(" %s End\n",__FUNCTION__); ++} ++VOID ++rtl8192c_HalDmWatchDog( ++ IN PADAPTER Adapter ++ ) ++{ ++ BOOLEAN bFwCurrentInPSMode = _FALSE; ++ BOOLEAN bFwPSAwake = _TRUE; ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++#ifdef CONFIG_LPS ++ bFwCurrentInPSMode = Adapter->pwrctrlpriv.bFwCurrentInPSMode; ++ Adapter->HalFunc.GetHwRegHandler(Adapter, HW_VAR_FWLPS_RF_ON, (u8 *)(&bFwPSAwake)); ++#endif ++ ++#ifdef CONFIG_P2P ++ // Fw is under p2p powersaving mode, driver should stop dynamic mechanism. ++ // modifed by thomas. 2011.06.11. ++ if(Adapter->wdinfo.p2p_ps_enable) ++ bFwPSAwake = _FALSE; ++#endif //CONFIG_P2P ++ ++ // Stop dynamic mechanism when: ++ // 1. RF is OFF. (No need to do DM.) ++ // 2. Fw is under power saving mode for FwLPS. (Prevent from SW/FW I/O racing.) ++ // 3. IPS workitem is scheduled. (Prevent from IPS sequence to be swapped with DM. ++ // Sometimes DM execution time is longer than 100ms such that the assertion ++ // in MgntActSet_RF_State() called by InactivePsWorkItem will be triggered by ++ // wating to long for RFChangeInProgress.) ++ // 4. RFChangeInProgress is TRUE. (Prevent from broken by IPS/HW/SW Rf off.) ++ // Noted by tynli. 2010.06.01. ++ //if(rfState == eRfOn) ++ if( (Adapter->hw_init_completed == _TRUE) ++ && ((!bFwCurrentInPSMode) && bFwPSAwake)) ++ { ++ // ++ // Calculate Tx/Rx statistics. ++ // ++ dm_CheckStatistics(Adapter); ++ ++ // ++ // For PWDB monitor and record some value for later use. ++ // ++ PWDB_Monitor(Adapter); ++ ++ // ++ // Dynamic Initial Gain mechanism. ++ // ++ ++ dm_RSSIMonitorCheck(Adapter); ++ ++ dm_FalseAlarmCounterStatistics(Adapter); ++ dm_DIG(Adapter); ++ ++ // ++ //Dynamic BB Power Saving Mechanism ++ // ++ dm_DynamicBBPowerSaving(Adapter); ++ ++ // ++ // Dynamic Tx Power mechanism. ++ // ++ dm_DynamicTxPower(Adapter); ++ ++ // ++ // Tx Power Tracking. ++ // ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ ++ // ++ // Rate Adaptive by Rx Signal Strength mechanism. ++ // ++ dm_RefreshRateAdaptiveMask(Adapter); ++ ++#ifdef CONFIG_BT_COEXIST ++ //BT-Coexist ++ dm_BTCoexist(Adapter); ++#endif ++ ++ // EDCA turbo ++ //update the EDCA paramter according to the Tx/RX mode ++ //update_EDCA_param(Adapter); ++ dm_CheckEdcaTurbo(Adapter); ++ ++ // ++ // Dynamically switch RTS/CTS protection. ++ // ++ //dm_CheckProtection(Adapter); ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ // ++ // Software Antenna diversity ++ // ++ dm_SW_AntennaSwitch(Adapter, SWAW_STEP_PEAK); ++#endif ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ dm_SelectRXDefault(Adapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100630 Joseph: Disable Interrupt Migration mechanism temporarily because it degrades Rx throughput. ++ // Tx Migration settings. ++ //dm_InterruptMigration(Adapter); ++ ++ //if(Adapter->HalFunc.TxCheckStuckHandler(Adapter)) ++ // PlatformScheduleWorkItem(&(GET_HAL_DATA(Adapter)->HalResetWorkItem)); ++#endif ++ ++#ifdef SUPPORT_64_STA ++ rtl8192c_HalDmPollingC2HEvt(Adapter); ++#endif //SUPPORT_64_STA ++ // Read REG_INIDATA_RATE_SEL value for TXDESC. ++ if(check_fwstate(&Adapter->mlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ pdmpriv->INIDATA_RATE[0] = rtw_read8(Adapter, REG_INIDATA_RATE_SEL) & 0x3f; ++ } ++ else ++ { ++ u8 i; ++ for(i=1 ;( i < (Adapter->stapriv.asoc_sta_count + 1))&&(i INIDATA_RATE[i] = rtw_read8(Adapter, (REG_INIDATA_RATE_SEL+i)) & 0x3f; ++ } ++ } ++ } ++ ++ // Check GPIO to determine current RF on/off and Pbc status. ++ // Check Hardware Radio ON/OFF or not ++ //if(Adapter->MgntInfo.PowerSaveControl.bGpioRfSw) ++ //{ ++ //RTPRINT(FPWR, PWRHW, ("dm_CheckRfCtrlGPIO \n")); ++ // dm_CheckRfCtrlGPIO(Adapter); ++ //} ++ ++#ifdef CONFIG_PCI_HCI ++ if(pHalData->bGpioHwWpsPbc) ++#endif ++ { ++ dm_CheckPbcGPIO(Adapter); // Add by hpfan 2008-03-11 ++ } ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_hal_init.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,3642 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ *******************************************************************************/ ++ ++#define _RTL8192C_HAL_INIT_C_ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest); ++static BOOLEAN ++hal_EfusePgPacketWrite_BT( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest); ++ ++static VOID ++_FWDownloadEnable( ++ IN PADAPTER Adapter, ++ IN BOOLEAN enable ++ ) ++{ ++ u8 tmp; ++ ++ if(enable) ++ { ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ // 8051 enable ++ tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|0x04); ++ ++ // MCU firmware download enable. ++ tmp = rtw_read8(Adapter, REG_MCUFWDL); ++ rtw_write8(Adapter, REG_MCUFWDL, tmp|0x01); ++ ++ // 8051 reset ++ tmp = rtw_read8(Adapter, REG_MCUFWDL+2); ++ rtw_write8(Adapter, REG_MCUFWDL+2, tmp&0xf7); ++ } ++ else ++ { ++ // MCU firmware download enable. ++ tmp = rtw_read8(Adapter, REG_MCUFWDL); ++ rtw_write8(Adapter, REG_MCUFWDL, tmp&0xfe); ++ ++ // Reserved for fw extension. ++ //rtw_write8(Adapter, REG_MCUFWDL+1, 0x00); ++ } ++} ++ ++ ++#define MAX_REG_BOLCK_SIZE 196 ++#define MIN_REG_BOLCK_SIZE 8 ++ ++static int ++_BlockWrite( ++ IN PADAPTER Adapter, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ int ret = _SUCCESS; ++ ++#ifdef CONFIG_PCI_HCI ++ u32 blockSize = sizeof(u32); // Use 4-byte write to download FW ++ u8 *bufferPtr = (u8 *)buffer; ++ u32 *pu4BytePtr = (u32 *)buffer; ++ u32 i, offset, blockCount, remainSize; ++ ++ blockCount = size / blockSize; ++ remainSize = size % blockSize; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = i * blockSize; ++ rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), *(pu4BytePtr + i)); ++ } ++ ++ if(remainSize){ ++ offset = blockCount * blockSize; ++ bufferPtr += offset; ++ ++ for(i = 0 ; i < remainSize ; i++){ ++ rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i)); ++ } ++ } ++#else ++ ++#ifdef SUPPORTED_BLOCK_IO ++ u32 blockSize = MAX_REG_BOLCK_SIZE; // Use 196-byte write to download FW ++ u32 blockSize2 = MIN_REG_BOLCK_SIZE; ++#else ++ u32 blockSize = sizeof(u32); // Use 4-byte write to download FW ++ u32* pu4BytePtr = (u32*)buffer; ++ u32 blockSize2 = sizeof(u8); ++#endif ++ u8* bufferPtr = (u8*)buffer; ++ u32 i, offset = 0, offset2, blockCount, remainSize, remainSize2; ++ ++ blockCount = size / blockSize; ++ remainSize = size % blockSize; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = i * blockSize; ++ #ifdef SUPPORTED_BLOCK_IO ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize, (bufferPtr + offset)); ++ #else ++ ret = rtw_write32(Adapter, (FW_8192C_START_ADDRESS + offset), le32_to_cpu(*(pu4BytePtr + i))); ++ #endif ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ ++ if(remainSize){ ++ #if defined(SUPPORTED_BLOCK_IO) && defined(DBG_BLOCK_WRITE_ISSUE) //Can this be enabled? ++ offset = blockCount * blockSize; ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), remainSize, (bufferPtr + offset)); ++ goto exit; ++ #endif ++ offset2 = blockCount * blockSize; ++ blockCount = remainSize / blockSize2; ++ remainSize2 = remainSize % blockSize2; ++ ++ for(i = 0 ; i < blockCount ; i++){ ++ offset = offset2 + i * blockSize2; ++ #ifdef SUPPORTED_BLOCK_IO ++ ret = rtw_writeN(Adapter, (FW_8192C_START_ADDRESS + offset), blockSize2, (bufferPtr + offset)); ++ #else ++ ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset ), *(bufferPtr + offset)); ++ #endif ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ ++ if(remainSize2) ++ { ++ offset += blockSize2; ++ bufferPtr += offset; ++ ++ for(i = 0 ; i < remainSize2 ; i++){ ++ ret = rtw_write8(Adapter, (FW_8192C_START_ADDRESS + offset + i), *(bufferPtr + i)); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ } ++ } ++#endif ++ ++exit: ++ return ret; ++} ++ ++static int ++_PageWrite( ++ IN PADAPTER Adapter, ++ IN u32 page, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ u8 value8; ++ u8 u8Page = (u8) (page & 0x07) ; ++ ++ value8 = (rtw_read8(Adapter, REG_MCUFWDL+2)& 0xF8 ) | u8Page ; ++ rtw_write8(Adapter, REG_MCUFWDL+2,value8); ++ return _BlockWrite(Adapter,buffer,size); ++} ++ ++static VOID ++_FillDummy( ++ u8* pFwBuf, ++ u32* pFwLen ++ ) ++{ ++ u32 FwLen = *pFwLen; ++ u8 remain = (u8)(FwLen%4); ++ remain = (remain==0)?0:(4-remain); ++ ++ while(remain>0) ++ { ++ pFwBuf[FwLen] = 0; ++ FwLen++; ++ remain--; ++ } ++ ++ *pFwLen = FwLen; ++} ++ ++static int ++_WriteFW( ++ IN PADAPTER Adapter, ++ IN PVOID buffer, ++ IN u32 size ++ ) ++{ ++ // Since we need dynamic decide method of dwonload fw, so we call this function to get chip version. ++ // We can remove _ReadChipVersion from ReadAdapterInfo8192C later. ++ ++ int ret = _SUCCESS; ++ BOOLEAN isNormalChip; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ if(isNormalChip){ ++ u32 pageNums,remainSize ; ++ u32 page,offset; ++ u8* bufferPtr = (u8*)buffer; ++ ++#ifdef CONFIG_PCI_HCI ++ // 20100120 Joseph: Add for 88CE normal chip. ++ // Fill in zero to make firmware image to dword alignment. ++ _FillDummy(bufferPtr, &size); ++#endif ++ ++ pageNums = size / MAX_PAGE_SIZE ; ++ //RT_ASSERT((pageNums <= 4), ("Page numbers should not greater then 4 \n")); ++ remainSize = size % MAX_PAGE_SIZE; ++ ++ for(page = 0; page < pageNums; page++){ ++ offset = page *MAX_PAGE_SIZE; ++ ret = _PageWrite(Adapter,page, (bufferPtr+offset),MAX_PAGE_SIZE); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ if(remainSize){ ++ offset = pageNums *MAX_PAGE_SIZE; ++ page = pageNums; ++ ret = _PageWrite(Adapter,page, (bufferPtr+offset),remainSize); ++ ++ if(ret == _FAIL) ++ goto exit; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Normal chip.\n")); ++ } ++ else { ++ ret = _BlockWrite(Adapter,buffer,size); ++ ++ if(ret == _FAIL) ++ goto exit; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_WriteFW Done- for Test chip.\n")); ++ } ++ ++exit: ++ return ret; ++} ++ ++static int _FWFreeToGo( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 counter = 0; ++ u32 value32; ++ u8 value8; ++ u32 restarted = _FALSE; ++ ++ // polling CheckSum report ++ do{ ++ value32 = rtw_read32(Adapter, REG_MCUFWDL); ++ }while((counter ++ < POLLING_READY_TIMEOUT_COUNT) && (!(value32 & FWDL_ChkSum_rpt))); ++ ++ if(counter >= POLLING_READY_TIMEOUT_COUNT){ ++ DBG_8192C("chksum report faill ! REG_MCUFWDL:0x%08x\n",value32); ++ return _FAIL; ++ } else { ++ //DBG_8192C("chksum report success ! REG_MCUFWDL:0x%08x, counter:%u\n",value32, counter); ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n",value32)); ++ ++ ++ value8 = rtw_read8(Adapter, REG_MCUFWDL); ++ value8 |= MCUFWDL_RDY; ++ value8 &= ~WINTINI_RDY; ++ rtw_write8(Adapter, REG_MCUFWDL, value8); ++ ++ ++POLLING_FW_READY: ++ // polling for FW ready ++ counter = 0; ++ do ++ { ++ if(rtw_read32(Adapter, REG_MCUFWDL) & WINTINI_RDY){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Polling FW ready success!! REG_MCUFWDL:0x%08x .\n",PlatformIORead4Byte(Adapter, REG_MCUFWDL)) ); ++ return _SUCCESS; ++ } ++ rtw_udelay_os(5); ++ }while(counter++ < POLLING_READY_TIMEOUT_COUNT); ++ ++ DBG_8192C("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", rtw_read32(Adapter, REG_MCUFWDL)); ++ ++ if(restarted == _FALSE) { ++ u8 tmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp & ~BIT2); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp & ~BIT2); ++ DBG_8192C("Reset 51 write8 REG_SYS_FUNC_EN:0x%04x\n", tmp|BIT2); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, tmp|BIT2); ++ restarted = _TRUE; ++ goto POLLING_FW_READY; ++ } ++ ++ ++ return _FAIL; ++ ++} ++ ++ ++VOID ++rtl8192c_FirmwareSelfReset( ++ IN PADAPTER Adapter ++) ++{ ++ u8 u1bTmp; ++ u8 Delay = 100; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if((pHalData->FirmwareVersion > 0x21) || ++ (pHalData->FirmwareVersion == 0x21 && ++ pHalData->FirmwareSubVersion >= 0x01)) // after 88C Fw v33.1 ++ { ++ //0x1cf=0x20. Inform 8051 to reset. 2009.12.25. tynli_test ++ rtw_write8(Adapter, REG_HMETFR+3, 0x20); ++ ++ u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ while(u1bTmp&BIT2) ++ { ++ Delay--; ++ if(Delay == 0) ++ break; ++ rtw_udelay_os(50); ++ u1bTmp = rtw_read8(Adapter, REG_SYS_FUNC_EN+1); ++ } ++ ++ if((u1bTmp&BIT2) && (Delay == 0)) ++ { ++ DBG_8192C("FirmwareDownload92C():fw reset by itself Fail!!!!!! 0x03 = %x\n", u1bTmp); ++ //RT_ASSERT(FALSE, ("PowerOffAdapter8192CE(): 0x03 = %x\n", u1bTmp)); ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ rtw_write8(Adapter,REG_SYS_FUNC_EN+1,(rtw_read8(Adapter, REG_SYS_FUNC_EN+1)&~BIT2)); ++ } ++ ++ DBG_8192C("%s =====> 8051 reset success (%d) .\n", __FUNCTION__ ,Delay); ++ } ++} ++ ++#ifdef CONFIG_FILE_FWIMG ++extern char *rtw_fw_file_path; ++u8 FwBuffer8192C[FW_8192C_SIZE]; ++#endif //CONFIG_FILE_FWIMG ++// ++// Description: ++// Download 8192C firmware code. ++// ++// ++int FirmwareDownload92C( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bUsedWoWLANFw ++) ++{ ++ int rtStatus = _SUCCESS; ++ u8 writeFW_retry = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 R92CFwImageFileName_TSMC[] ={RTL8192C_FW_TSMC_IMG}; ++ s8 R92CFwImageFileName_UMC[] ={RTL8192C_FW_UMC_IMG}; ++ s8 R92CFwImageFileName_UMC_B[] ={RTL8192C_FW_UMC_B_IMG}; ++#ifdef CONFIG_WOWLAN ++ s8 R92CFwImageFileName_TSMC_WW[] ={RTL8192C_FW_TSMC_WW_IMG}; ++ s8 R92CFwImageFileName_UMC_WW[] ={RTL8192C_FW_UMC_WW_IMG}; ++ s8 R92CFwImageFileName_UMC_B_WW[] ={RTL8192C_FW_UMC_B_WW_IMG}; ++#endif ++ ++ //s8 R8723FwImageFileName_UMC[] ={RTL8723_FW_UMC_IMG}; ++ u8* FwImage = NULL; ++ u32 FwImageLen = 0; ++ char* pFwImageFileName; ++#ifdef CONFIG_WOWLAN ++ u8* FwImageWoWLAN; ++ u32 FwImageWoWLANLen; ++ char* pFwImageFileName_WoWLAN; ++#endif ++ u8* pucMappedFile = NULL; ++ //vivi, merge 92c and 92s into one driver, 20090817 ++ //vivi modify this temply, consider it later!!!!!!!! ++ //PRT_FIRMWARE pFirmware = GET_FIRMWARE_819X(Adapter); ++ //PRT_FIRMWARE_92C pFirmware = GET_FIRMWARE_8192C(Adapter); ++ PRT_FIRMWARE_92C pFirmware = NULL; ++ PRT_8192C_FIRMWARE_HDR pFwHdr = NULL; ++ u8 *pFirmwareBuf; ++ u32 FirmwareLen; ++ ++ pFirmware = (PRT_FIRMWARE_92C)rtw_zvmalloc(sizeof(RT_FIRMWARE_92C)); ++ ++ if(!pFirmware) ++ { ++ rtStatus = _FAIL; ++ goto Exit; ++ } ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ pFwImageFileName = R92CFwImageFileName_UMC; ++ FwImage = Rtl819XFwUMCACutImageArray; ++ FwImageLen = UMCACutImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_WW; ++ FwImageWoWLAN= Rtl8192C_FwUMCWWImageArray; ++ FwImageWoWLANLen =UMCACutWWImgArrayLength ; ++#endif ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC\n"); ++ } ++ else if(IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ { ++ // The ROM code of UMC B-cut Fw is the same as TSMC. by tynli. 2011.01.14. ++ pFwImageFileName = R92CFwImageFileName_UMC_B; ++ FwImage = Rtl819XFwUMCBCutImageArray; ++ FwImageLen = UMCBCutImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_UMC_B_WW; ++ FwImageWoWLAN= Rtl8192C_FwUMCBCutWWImageArray; ++ FwImageWoWLANLen =UMCBCutWWImgArrayLength ; ++#endif ++ ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_UMC_B\n"); ++ } ++ else ++ { ++ pFwImageFileName = R92CFwImageFileName_TSMC; ++ FwImage = Rtl819XFwTSMCImageArray; ++ FwImageLen = TSMCImgArrayLength; ++#ifdef CONFIG_WOWLAN ++ pFwImageFileName_WoWLAN = R92CFwImageFileName_TSMC_WW; ++ FwImageWoWLAN= Rtl8192C_FwTSMCWWImageArray; ++ FwImageWoWLANLen =TSMCWWImgArrayLength ; ++#endif ++ DBG_8192C(" ===> FirmwareDownload91C() fw:Rtl819XFwImageArray_TSMC\n"); ++ } ++ } ++ else ++ { ++ #if 0 ++ pFwImageFileName = TestChipFwFile; ++ FwImage = Rtl8192CTestFwImg; ++ FwImageLen = Rtl8192CTestFwImgLen; ++ RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:Rtl8192CTestFwImg\n")); ++ #endif ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" ===> FirmwareDownload91C() fw:%s\n", pFwImageFileName)); ++ ++ #ifdef CONFIG_FILE_FWIMG ++ if(rtw_is_file_readable(rtw_fw_file_path) == _TRUE) ++ { ++ DBG_871X("%s accquire FW from file:%s\n", __FUNCTION__, rtw_fw_file_path); ++ pFirmware->eFWSource = FW_SOURCE_IMG_FILE; // We should decided by Reg. ++ } ++ else ++ #endif //CONFIG_FILE_FWIMG ++ { ++ DBG_871X("%s accquire FW from embedded image\n", __FUNCTION__); ++ pFirmware->eFWSource = FW_SOURCE_HEADER_FILE; ++ } ++ ++ ++ switch(pFirmware->eFWSource) ++ { ++ case FW_SOURCE_IMG_FILE: ++ ++ #ifdef CONFIG_FILE_FWIMG ++ rtStatus = rtw_retrive_from_file(rtw_fw_file_path, FwBuffer8192C, FW_8192C_SIZE); ++ pFirmware->ulFwLength = rtStatus>=0?rtStatus:0; ++ pFirmware->szFwBuffer = FwBuffer8192C; ++ #endif //CONFIG_FILE_FWIMG ++ ++ if(pFirmware->ulFwLength <= 0) ++ { ++ rtStatus = _FAIL; ++ goto Exit; ++ } ++ break; ++ case FW_SOURCE_HEADER_FILE: ++ if(FwImageLen > FW_8192C_SIZE){ ++ rtStatus = _FAIL; ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE) ); ++ DBG_871X("Firmware size exceed 0x%X. Check it.\n", FW_8192C_SIZE); ++ goto Exit; ++ } ++ ++ pFirmware->szFwBuffer = FwImage; ++ pFirmware->ulFwLength = FwImageLen; ++#ifdef CONFIG_WOWLAN ++ { ++ pFirmware->szWoWLANFwBuffer=FwImageWoWLAN; ++ pFirmware->ulWoWLANFwLength = FwImageWoWLANLen; ++ } ++#endif ++ ++ break; ++ } ++ ++#ifdef CONFIG_WOWLAN ++ if(bUsedWoWLANFw) { ++ pFirmwareBuf = pFirmware->szWoWLANFwBuffer; ++ FirmwareLen = pFirmware->ulWoWLANFwLength; ++ pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szWoWLANFwBuffer; ++ } ++ else ++#endif ++ { ++ #ifdef DBG_FW_STORE_FILE_PATH //used to store firmware to file... ++ if(pFirmware->ulFwLength > 0) ++ { ++ rtw_store_to_file(DBG_FW_STORE_FILE_PATH, pFirmware->szFwBuffer, pFirmware->ulFwLength); ++ } ++ #endif ++ ++ ++ ++ ++ pFirmwareBuf = pFirmware->szFwBuffer; ++ FirmwareLen = pFirmware->ulFwLength; ++ ++ // To Check Fw header. Added by tynli. 2009.12.04. ++ pFwHdr = (PRT_8192C_FIRMWARE_HDR)pFirmware->szFwBuffer; ++ } ++ pHalData->FirmwareVersion = le16_to_cpu(pFwHdr->Version); ++ pHalData->FirmwareSubVersion = le16_to_cpu(pFwHdr->Subversion); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" FirmwareVersion(%#x), Signature(%#x)\n", ++ // Adapter->MgntInfo.FirmwareVersion, pFwHdr->Signature)); ++ ++ DBG_8192C("fw_ver=v%d, fw_subver=%d, sig=0x%x\n", ++ pHalData->FirmwareVersion, pHalData->FirmwareSubVersion, le16_to_cpu(pFwHdr->Signature)&0xFFF0); ++ ++ if(IS_FW_HEADER_EXIST(pFwHdr)) ++ { ++ //RT_TRACE(COMP_INIT, DBG_LOUD,("Shift 32 bytes for FW header!!\n")); ++ pFirmwareBuf = pFirmwareBuf + 32; ++ FirmwareLen = FirmwareLen -32; ++ } ++ ++ // Suggested by Filen. If 8051 is running in RAM code, driver should inform Fw to reset by itself, ++ // or it will cause download Fw fail. 2010.02.01. by tynli. ++ if(rtw_read8(Adapter, REG_MCUFWDL)&BIT7) //8051 RAM code ++ { ++ rtl8192c_FirmwareSelfReset(Adapter); ++ rtw_write8(Adapter, REG_MCUFWDL, 0x00); ++ } ++ ++ ++ _FWDownloadEnable(Adapter, _TRUE); ++ while(1) { ++ u8 tmp8; ++ tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ ++ //reset the FWDL chksum ++ rtw_write8(Adapter, REG_MCUFWDL, tmp8|FWDL_ChkSum_rpt); ++ ++ //tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ //DBG_8192C("Before _WriteFW, REG_MCUFWDL:0x%02x, writeFW_retry:%u\n", tmp8, writeFW_retry); ++ ++ rtStatus = _WriteFW(Adapter, pFirmwareBuf, FirmwareLen); ++ ++ //tmp8 = rtw_read8(Adapter, REG_MCUFWDL); ++ //DBG_8192C("After _WriteFW, REG_MCUFWDL:0x%02x, rtStatus:%d\n", tmp8, rtStatus); ++ ++ if(rtStatus == _SUCCESS || ++writeFW_retry>3) ++ break; ++ } ++ _FWDownloadEnable(Adapter, _FALSE); ++ if(_SUCCESS != rtStatus){ ++ DBG_8192C("DL Firmware failed!\n"); ++ goto Exit; ++ } ++ ++ rtStatus = _FWFreeToGo(Adapter); ++ if(_SUCCESS != rtStatus){ ++ DBG_8192C("DL Firmware failed!\n"); ++ goto Exit; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" Firmware is ready to run!\n")); ++ ++Exit: ++ ++ if(pFirmware) { ++ rtw_vmfree((u8*)pFirmware, sizeof(RT_FIRMWARE_92C)); ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" <=== FirmwareDownload91C()\n")); ++ return rtStatus; ++ ++} ++ ++VOID ++InitializeFirmwareVars92C( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Init Fw LPS related. ++ Adapter->pwrctrlpriv.bFwCurrentInPSMode = _FALSE; ++ ++ //Init H2C counter. by tynli. 2009.12.09. ++ pHalData->LastHMEBoxNum = 0; ++} ++ ++ ++//=========================================== ++ ++// ++// Description: Prepare some information to Fw for WoWLAN. ++// (1) Download wowlan Fw. ++// (2) Download RSVD page packets. ++// (3) Enable AP offload if needed. ++// ++// 2011.04.12 by tynli. ++// ++VOID ++SetFwRelatedForWoWLAN8192CU( ++ IN PADAPTER padapter, ++ IN u8 bHostIsGoingtoSleep ++) ++{ ++ int status=_FAIL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 bRecover = _FALSE; ++ ++ if(bHostIsGoingtoSleep) ++ { ++ // ++ // 1. Before WoWLAN we need to re-download WoWLAN Fw. ++ // ++ status = FirmwareDownload92C(padapter, bHostIsGoingtoSleep); ++ if(status != _SUCCESS) ++ { ++ DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware failed!!\n"); ++ return; ++ } ++ else ++ { ++ DBG_8192C("ConfigFwRelatedForWoWLAN8192CU(): Re-Download Firmware Success !!\n"); ++ } ++ ++ // ++ // 2. Re-Init the variables about Fw related setting. ++ // ++ InitializeFirmwareVars92C(padapter); ++ ++ ++ } ++} ++ ++ ++#ifdef CONFIG_BT_COEXIST ++static void _update_bt_param(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ ++ if(2 != registry_par->bt_iso) ++ pbtpriv->BT_Ant_isolation = registry_par->bt_iso;// 0:Low, 1:High, 2:From Efuse ++ ++ if(registry_par->bt_sco == 1) // 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy ++ pbtpriv->BT_Service = BT_OtherAction; ++ else if(registry_par->bt_sco==2) ++ pbtpriv->BT_Service = BT_SCO; ++ else if(registry_par->bt_sco==4) ++ pbtpriv->BT_Service = BT_Busy; ++ else if(registry_par->bt_sco==5) ++ pbtpriv->BT_Service = BT_OtherBusy; ++ else ++ pbtpriv->BT_Service = BT_Idle; ++ ++ pbtpriv->BT_Ampdu = registry_par->bt_ampdu; ++ pbtpriv->bCOBT = _TRUE; ++#if 1 ++ DBG_8192C("BT Coexistance = %s\n", (pbtpriv->BT_Coexist==_TRUE)?"enable":"disable"); ++ if(pbtpriv->BT_Coexist) ++ { ++ if(pbtpriv->BT_Ant_Num == Ant_x2) ++ { ++ DBG_8192C("BlueTooth BT_Ant_Num = Antx2\n"); ++ } ++ else if(pbtpriv->BT_Ant_Num == Ant_x1) ++ { ++ DBG_8192C("BlueTooth BT_Ant_Num = Antx1\n"); ++ } ++ switch(pbtpriv->BT_CoexistType) ++ { ++ case BT_2Wire: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_2Wire\n"); ++ break; ++ case BT_ISSC_3Wire: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_ISSC_3Wire\n"); ++ break; ++ case BT_Accel: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_Accel\n"); ++ break; ++ case BT_CSR_BC4: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_CSR_BC4\n"); ++ break; ++ case BT_RTL8756: ++ DBG_8192C("BlueTooth BT_CoexistType = BT_RTL8756\n"); ++ break; ++ default: ++ DBG_8192C("BlueTooth BT_CoexistType = Unknown\n"); ++ break; ++ } ++ DBG_8192C("BlueTooth BT_Ant_isolation = %d\n", pbtpriv->BT_Ant_isolation); ++ ++ ++ switch(pbtpriv->BT_Service) ++ { ++ case BT_OtherAction: ++ DBG_8192C("BlueTooth BT_Service = BT_OtherAction\n"); ++ break; ++ case BT_SCO: ++ DBG_8192C("BlueTooth BT_Service = BT_SCO\n"); ++ break; ++ case BT_Busy: ++ DBG_8192C("BlueTooth BT_Service = BT_Busy\n"); ++ break; ++ case BT_OtherBusy: ++ DBG_8192C("BlueTooth BT_Service = BT_OtherBusy\n"); ++ break; ++ default: ++ DBG_8192C("BlueTooth BT_Service = BT_Idle\n"); ++ break; ++ } ++ ++ DBG_8192C("BT_RadioSharedType = 0x%x\n", pbtpriv->BT_RadioSharedType); ++ } ++#endif ++ ++} ++ ++ ++#define GET_BT_COEXIST(priv) (&priv->bt_coexist) ++ ++void rtl8192c_ReadBluetoothCoexistInfo( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 rf_opt4; ++ ++ if(AutoloadFail){ ++ pbtpriv->BT_Coexist = _FALSE; ++ pbtpriv->BT_CoexistType= BT_2Wire; ++ pbtpriv->BT_Ant_Num = Ant_x2; ++ pbtpriv->BT_Ant_isolation= 0; ++ pbtpriv->BT_RadioSharedType = BT_Radio_Shared; ++ return; ++ } ++ ++ if(isNormal) ++ { ++ pbtpriv->BT_Coexist = (((PROMContent[EEPROM_RF_OPT1]&BOARD_TYPE_NORMAL_MASK)>>5) == BOARD_USB_COMBO)?_TRUE:_FALSE; // bit [7:5] ++ rf_opt4 = PROMContent[EEPROM_RF_OPT4]; ++ pbtpriv->BT_CoexistType = ((rf_opt4&0xe)>>1); // bit [3:1] ++ pbtpriv->BT_Ant_Num = (rf_opt4&0x1); // bit [0] ++ pbtpriv->BT_Ant_isolation = ((rf_opt4&0x10)>>4); // bit [4] ++ pbtpriv->BT_RadioSharedType = ((rf_opt4&0x20)>>5); // bit [5] ++ } ++ else ++ { ++ pbtpriv->BT_Coexist = (PROMContent[EEPROM_RF_OPT4] >> 4) ? _TRUE : _FALSE; ++ } ++ _update_bt_param(Adapter); ++ ++} ++#endif ++ ++VERSION_8192C ++rtl8192c_ReadChipVersion( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ //VERSION_8192C version; ++ u32 ChipVersion=0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ value32 = rtw_read32(Adapter, REG_SYS_CFG); ++ ++ if (value32 & TRP_VAUX_EN) ++ { ++#if 0 ++ // Test chip. ++ if(IS_HARDWARE_TYPE_8723(Adapter)) { ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ } ++ else { ++ version = (value32 & TYPE_ID) ?VERSION_TEST_CHIP_92C :VERSION_TEST_CHIP_88C; ++ } ++#else ++ // tynli_test. 2011.01.10. ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ ChipVersion = (value32 & TYPE_ID) ? VERSION_TEST_CHIP_92C : VERSION_TEST_CHIP_88C; ++ } ++ else ++ { ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ } ++#endif ++ } ++ else ++ { ++#if 0 ++ // Normal mass production chip. ++ ChipVersion = NORMAL_CHIP; ++#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION ++ ChipVersion |= ((value32 & TYPE_ID) ? CHIP_92C : 0); ++#endif ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ if(IS_8723_SERIES(ChipVersion)) ++ { ++ if(IS_VENDOR_UMC(ChipVersion)) ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) ? CHIP_VENDOR_UMC_B_CUT : 0); ++ } ++ else ++ { ++ // Mark out by tynli. UMC B-cut IC will not set the SYS_CFG[19] to UMC ++ // because we do not want the custmor to know. 2011.01.11. ++ //if(IS_VENDOR_UMC(ChipVersion)) ++ { ++ // To check the value of B-cut. by tynli. 2011.01.11. ++ u1bTmp = (u1Byte)((value32 & CHIP_VER_RTL_MASK)>>12); ++ if(u1bTmp == 1) ++ { // B-cut ++ ChipVersion |= CHIP_VENDOR_UMC_B_CUT; ++ } ++ } ++ } ++#else ++ // Normal mass production chip. ++ ChipVersion = NORMAL_CHIP; ++//#if !RTL8723_FPGA_TRUE_PHY_VERIFICATION ++ ChipVersion |= ((value32 & TYPE_ID) ? RF_TYPE_2T2R : 0); //92c ++//#endif ++ ChipVersion |= ((value32 & VENDOR_ID) ? CHIP_VENDOR_UMC : 0); ++ ChipVersion |= ((value32 & BT_FUNC) ? CHIP_8723: 0); // RTL8723 with BT function. ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ // 88/92C UMC B-cut IC will not set the SYS_CFG[19] to UMC ++ // because we do not want the custmor to know. by tynli. 2011.01.17. ++ //MSG_8192C("mask result = 0x%x is_UMC %d chipversion 0x%x\n", (value32 & CHIP_VER_RTL_MASK), IS_CHIP_VENDOR_UMC(ChipVersion), ChipVersion); ++ if((!IS_CHIP_VENDOR_UMC(ChipVersion) )&& (value32 & CHIP_VER_RTL_MASK)) ++ { ++ //MSG_8192C("chip mask result = 0x%x\n", ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC)); ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK) | CHIP_VENDOR_UMC); // IC version (CUT) ++ //MSG_8192C("chip version = 0x%x\n", ChipVersion); ++ } ++ } ++ else ++ { ++ if(IS_CHIP_VENDOR_UMC(ChipVersion)) ++ ChipVersion |= ((value32 & CHIP_VER_RTL_MASK)); // IC version (CUT) ++ } ++ ++ if(IS_92C_SERIAL(ChipVersion)) ++ { ++ value32 = rtw_read32(Adapter, REG_HPON_FSM); ++ ChipVersion |= ((CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_92C_1T2R) ? RF_TYPE_1T2R : 0); ++ } ++ else if(IS_8723_SERIES(ChipVersion)) ++ { ++ //RT_ASSERT(IS_HARDWARE_TYPE_8723(Adapter), ("Incorrect chip version!!\n")); ++ value32 = rtw_read32(Adapter, REG_GPIO_OUTSTS); ++ ChipVersion |= ((value32 & RF_RL_ID)>>20); //ROM code version. ++ } ++#endif ++ ++ } ++ ++ //version = (VERSION_8192C)ChipVersion; ++ ++ // For multi-function consideration. Added by Roger, 2010.10.06. ++ if(IS_8723_SERIES(ChipVersion)) ++ { ++ pHalData->MultiFunc = RT_MULTI_FUNC_NONE; ++ value32 = rtw_read32(Adapter, REG_MULTI_FUNC_CTRL); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & WL_FUNC_EN) ? RT_MULTI_FUNC_WIFI : 0) ); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & BT_FUNC_EN) ? RT_MULTI_FUNC_BT : 0) ); ++ pHalData->MultiFunc =(RT_MULTI_FUNC) (pHalData->MultiFunc| ((value32 & GPS_FUNC_EN) ? RT_MULTI_FUNC_GPS : 0) ); ++ pHalData->PolarityCtl = ((value32 & WL_HWPDN_SL) ? RT_POLARITY_HIGH_ACT : RT_POLARITY_LOW_ACT); ++ //MSG_8192C("ReadChipVersion(): MultiFunc(%x), PolarityCtl(%x) \n", pHalData->MultiFunc, pHalData->PolarityCtl); ++ ++ //For regulator mode. by tynli. 2011.01.14 ++ pHalData->RegulatorMode = ((value32 & TRP_BT_EN) ? RT_LDO_REGULATOR : RT_SWITCHING_REGULATOR); ++ //MSG_8192C("ReadChipVersion(): RegulatorMode(%x) \n", pHalData->RegulatorMode); ++ } ++ ++//#if DBG ++#if 1 ++ switch(ChipVersion) ++ { ++ case VERSION_NORMAL_TSMC_CHIP_92C_1T2R: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C_1T2R.\n"); ++ break; ++ case VERSION_NORMAL_TSMC_CHIP_92C: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_92C.\n"); ++ break; ++ case VERSION_NORMAL_TSMC_CHIP_88C: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_TSMC_CHIP_88C.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_92C_B_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMAL_UMC_CHIP_88C_B_CUT.\n"); ++ break; ++ case VERSION_TEST_CHIP_92C: ++ MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_92C.\n"); ++ break; ++ case VERSION_TEST_CHIP_88C: ++ MSG_8192C("Chip Version ID: VERSION_TEST_CHIP_88C.\n"); ++ break; ++ case VERSION_TEST_UMC_CHIP_8723: ++ MSG_8192C("Chip Version ID: VERSION_TEST_UMC_CHIP_8723.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_A_CUT.\n"); ++ break; ++ case VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT: ++ MSG_8192C("Chip Version ID: VERSION_NORMA_UMC_CHIP_8723_1T1R_B_CUT.\n"); ++ break; ++ default: ++ MSG_8192C("Chip Version ID: ???????????????.\n"); ++ break; ++ } ++#endif ++ ++ pHalData->VersionID = ChipVersion; ++ ++ if(IS_1T2R(ChipVersion)) ++ pHalData->rf_type = RF_1T2R; ++ else if(IS_2T2R(ChipVersion)) ++ pHalData->rf_type = RF_2T2R; ++ else if(IS_8723_SERIES(ChipVersion)) ++ pHalData->rf_type = RF_1T1R; ++ else ++ pHalData->rf_type = RF_1T1R; ++ ++ MSG_8192C("RF_Type is %x!!\n", pHalData->rf_type); ++ ++ return ChipVersion; ++} ++ ++ ++RT_CHANNEL_DOMAIN ++_HalMapChannelPlan8192C( ++ IN PADAPTER Adapter, ++ IN u8 HalChannelPlan ++ ) ++{ ++ RT_CHANNEL_DOMAIN rtChannelDomain; ++ ++ switch(HalChannelPlan) ++ { ++#if 0 /* Not using EEPROM_CHANNEL_PLAN directly */ ++ case EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN: ++ rtChannelDomain = RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN; ++ break; ++ case EEPROM_CHANNEL_PLAN_WORLD_WIDE_13: ++ rtChannelDomain = RT_CHANNEL_DOMAIN_WORLD_WIDE_13; ++ break; ++#endif /* Not using EEPROM_CHANNEL_PLAN directly */ ++ default: ++ if(HalChannelPlan == 0xFF) ++ rtChannelDomain = RT_CHANNEL_DOMAIN_WORLD_WIDE_13; ++ else ++ rtChannelDomain = (RT_CHANNEL_DOMAIN)HalChannelPlan; ++ break; ++ } ++ ++ return rtChannelDomain; ++ ++} ++ ++u8 GetEEPROMSize8192C(PADAPTER Adapter) ++{ ++ u8 size = 0; ++ u32 curRCR; ++ ++ curRCR = rtw_read16(Adapter, REG_9346CR); ++ size = (curRCR & BOOT_FROM_EEPROM) ? 6 : 4; // 6: EEPROM used is 93C46, 4: boot from E-Fuse. ++ ++ MSG_8192C("EEPROM type is %s\n", size==4 ? "E-FUSE" : "93C46"); ++ ++ return size; ++} ++ ++void rtl8192c_HalSetBrateCfg( ++ IN PADAPTER Adapter, ++ IN u8 *mBratesOS, ++ OUT u16 *pBrateCfg ++) ++{ ++ u8 is_brate; ++ u8 i; ++ u8 brate; ++ ++ for(i=0;i rtl8192c_free_hal_data =====\n"); ++ ++ if(padapter->HalData) ++ rtw_mfree(padapter->HalData, sizeof(HAL_DATA_TYPE)); ++ DBG_8192C("<===== rtl8192c_free_hal_data =====\n"); ++ ++_func_exit_; ++} ++ ++//=========================================================== ++// Efuse related code ++//=========================================================== ++enum{ ++ VOLTAGE_V25 = 0x03, ++ LDOE25_SHIFT = 28 , ++ }; ++ ++static VOID ++hal_EfusePowerSwitch_RTL8192C( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ u8 tempval; ++ u16 tmpV16; ++ ++ if (PwrState == _TRUE) ++ { ++ // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); ++ if( ! (tmpV16 & PWC_EV12V ) ){ ++ tmpV16 |= PWC_EV12V ; ++ rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); ++ } ++ // Reset: 0x0000h[28], default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); ++ if( !(tmpV16 & FEN_ELDR) ){ ++ tmpV16 |= FEN_ELDR ; ++ rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); ++ } ++ ++ // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); ++ if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ ++ tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; ++ rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); ++ } ++ ++ if(bWrite == _TRUE) ++ { ++ // Enable LDO 2.5V before read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ tempval &= 0x0F; ++ tempval |= (VOLTAGE_V25 << 4); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); ++ } ++ } ++ else ++ { ++ if(bWrite == _TRUE){ ++ // Disable LDO 2.5V after read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); ++ } ++ } ++} ++ ++static VOID ++hal_EfusePowerSwitch_RTL8723( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ u8 tempval; ++ u16 tmpV16; ++ ++ if (PwrState == _TRUE) ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_ON); ++ ++ // 1.2V Power: From VDDON with Power Cut(0x0000h[15]), defualt valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_ISO_CTRL); ++ if( ! (tmpV16 & PWC_EV12V ) ){ ++ tmpV16 |= PWC_EV12V ; ++ rtw_write16(pAdapter,REG_SYS_ISO_CTRL,tmpV16); ++ } ++ // Reset: 0x0000h[28], default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_FUNC_EN); ++ if( !(tmpV16 & FEN_ELDR) ){ ++ tmpV16 |= FEN_ELDR ; ++ rtw_write16(pAdapter,REG_SYS_FUNC_EN,tmpV16); ++ } ++ ++ // Clock: Gated(0x0008h[5]) 8M(0x0008h[1]) clock from ANA, default valid ++ tmpV16 = rtw_read16(pAdapter,REG_SYS_CLKR); ++ if( (!(tmpV16 & LOADER_CLK_EN) ) ||(!(tmpV16 & ANA8M) ) ){ ++ tmpV16 |= (LOADER_CLK_EN |ANA8M ) ; ++ rtw_write16(pAdapter,REG_SYS_CLKR,tmpV16); ++ } ++ ++ if(bWrite == _TRUE) ++ { ++ // Enable LDO 2.5V before read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ tempval &= 0x0F; ++ tempval |= (VOLTAGE_V25 << 4); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval | 0x80)); ++ } ++ } ++ else ++ { ++ rtw_write8(pAdapter, REG_EFUSE_ACCESS, EFUSE_ACCESS_OFF); ++ ++ if(bWrite == _TRUE){ ++ // Disable LDO 2.5V after read/write action ++ tempval = rtw_read8(pAdapter, EFUSE_TEST+3); ++ rtw_write8(pAdapter, EFUSE_TEST+3, (tempval & 0x7F)); ++ } ++ } ++} ++ ++static VOID ++rtl8192c_EfusePowerSwitch( ++ IN PADAPTER pAdapter, ++ IN u8 bWrite, ++ IN u8 PwrState) ++{ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ hal_EfusePowerSwitch_RTL8192C(pAdapter, bWrite, PwrState); ++ } ++ else if(IS_HARDWARE_TYPE_8723(pAdapter)) ++ { ++ hal_EfusePowerSwitch_RTL8723(pAdapter, bWrite, PwrState); ++ } ++} ++ ++static VOID ++ReadEFuse_RTL8192C( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 efuseTbl[EFUSE_MAP_LEN]; ++ u8 rtemp8[1]; ++ u16 eFuse_Addr = 0; ++ u8 offset, wren; ++ u16 i, j; ++ u16 eFuseWord[EFUSE_MAX_SECTION][EFUSE_MAX_WORD_UNIT]; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ ++ // ++ // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. ++ // ++ if((_offset + _size_byte)>EFUSE_MAP_LEN) ++ {// total E-Fuse table is 128bytes ++ //DBG_8192C("ReadEFuse_RTL8192C(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ if(*rtemp8 != 0xFF) ++ { ++ efuse_utilized++; ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ eFuse_Addr++; ++ } ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((*rtemp8 != 0xFF) && (eFuse_Addr < EFUSE_REAL_CONTENT_LEN)) ++ { ++ // Check PG header for section num. ++ offset = ((*rtemp8 >> 4) & 0x0f); ++ ++ if(offset < EFUSE_MAX_SECTION) ++ { ++ // Get word enable value from PG header ++ wren = (*rtemp8 & 0x0f); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wren)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN) ++ break; ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); eFuse_Addr++; ++ efuse_utilized++; ++ eFuseWord[offset][i] |= (((u16)*rtemp8 << 8) & 0xff00); ++ ++ if(eFuse_Addr >= EFUSE_REAL_CONTENT_LEN) ++ break; ++ } ++ ++ wren >>= 1; ++ ++ } ++ } ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Addr=%d\n", eFuse_Addr)); ++ // Read next PG header ++ ReadEFuseByte(Adapter, eFuse_Addr, rtemp8, bPseudoTest); ++ if(*rtemp8 != 0xFF && (eFuse_Addr < 512)) ++ { ++ efuse_utilized++; ++ eFuse_Addr++; ++ } ++ } ++ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN); ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); ++ //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage); ++} ++ ++static VOID ++ReadEFuse_RTL8723( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 efuseTbl[EFUSE_MAP_LEN_8723]; ++ u16 eFuse_Addr = 0; ++ u8 offset = 0, wden = 0; ++ u16 i, j; ++ u16 eFuseWord[EFUSE_MAX_SECTION_8723][EFUSE_MAX_WORD_UNIT]; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 offset_2_0=0; ++ u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; ++ // ++ // Do NOT excess total size of EFuse table. Added by Roger, 2008.11.10. ++ // ++ if((_offset + _size_byte)>EFUSE_MAP_LEN_8723) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_RTL8723(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte)); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_MAX_SECTION_8723; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ // ++ // 1. Read the first byte to check if efuse is empty!!! ++ // ++ // ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); ++ ++ if(efuseHeader != 0xFF) ++ { ++ efuse_utilized++; ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("EFUSE is empty\n")); ++ return; ++ } ++ ++ ++ // ++ // 2. Read real efuse content. Filter PG header and every section data. ++ // ++ while((efuseHeader != 0xFF) && AVAILABLE_EFUSE_ADDR(eFuse_Addr)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseHeader)); ++ ++ // Check PG header for section num. ++ if(EXT_HEADER(efuseHeader)) //extended header ++ { ++ offset_2_0 = GET_HDR_OFFSET_2_0(efuseHeader); ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("extended header offset_2_0=%x\n", offset_2_0)); ++ ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseExtHdr, bPseudoTest); ++ ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("efuse[%d]=%x\n", eFuse_Addr-1, efuseExtHdr)); ++ ++ if(efuseExtHdr != 0xff) ++ { ++ efuse_utilized++; ++ if(ALL_WORDS_DISABLED(efuseExtHdr)) ++ { ++ ReadEFuseByte(Adapter, eFuse_Addr++, &efuseHeader, bPseudoTest); ++ if(efuseHeader != 0xff) ++ { ++ efuse_utilized++; ++ } ++ continue; ++ } ++ else ++ { ++ offset = ((efuseExtHdr & 0xF0) >> 1) | offset_2_0; ++ wden = (efuseExtHdr & 0x0F); ++ } ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n")); ++ // We should handle this condition. ++ } ++ } ++ else ++ { ++ offset = ((efuseHeader >> 4) & 0x0f); ++ wden = (efuseHeader & 0x0f); ++ } ++ ++ if(offset < EFUSE_MAX_SECTION_8723) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden)); ++ ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_REAL_CONTENT_LEN); ++ Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_utilized); ++ //Adapter->HalFunc.SetHwRegHandler(Adapter, HW_VAR_EFUSE_USAGE, (pu1Byte)&efuse_usage); ++} ++ ++static BOOLEAN ++Hal_EfuseSwitchToBank( ++ IN PADAPTER pAdapter, ++ IN u8 bank, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet = _FALSE; ++ u32 value32=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Efuse switch bank to %d\n", bank)); ++ if(bPseudoTest) ++ { ++ fakeEfuseBank = bank; ++ bRet = _TRUE; ++ } ++ else ++ { ++ if(IS_HARDWARE_TYPE_8723(pAdapter) && ++ INCLUDE_MULTI_FUNC_BT(pAdapter)) ++ { ++ value32 = rtw_read32(pAdapter, EFUSE_TEST); ++ bRet = _TRUE; ++ switch(bank) ++ { ++ case 0: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); ++ break; ++ case 1: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_0); ++ break; ++ case 2: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_1); ++ break; ++ case 3: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_BT_SEL_2); ++ break; ++ default: ++ value32 = (value32 & ~EFUSE_SEL_MASK) | EFUSE_SEL(EFUSE_WIFI_SEL_0); ++ bRet = _FALSE; ++ break; ++ } ++ rtw_write32(pAdapter, EFUSE_TEST, value32); ++ } ++ else ++ bRet = _TRUE; ++ } ++ return bRet; ++} ++ ++static VOID ++ReadEFuse_BT( ++ PADAPTER Adapter, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u8 *efuseTbl; ++ u16 eFuse_Addr = 0; ++ u8 offset = 0, wden = 0; ++ u16 i, j; ++ u16 **eFuseWord; ++ u16 efuse_utilized = 0; ++ u8 efuse_usage = 0; ++ u8 offset_2_0=0; ++ u8 efuseHeader=0, efuseExtHdr=0, efuseData=0; ++ u8 bank=0; ++ BOOLEAN bCheckNextBank=_FALSE; ++ ++ efuseTbl = rtw_malloc(EFUSE_BT_MAP_LEN); ++ if(efuseTbl == NULL){ ++ DBG_8192C("efuseTbl malloc fail !\n"); ++ return; ++ } ++ ++ eFuseWord = (u16 **)rtw_zmalloc(sizeof(u16 *)*EFUSE_BT_MAX_SECTION); ++ if(eFuseWord == NULL){ ++ DBG_8192C("eFuseWord malloc fail !\n"); ++ return; ++ } ++ else{ ++ for(i=0;iEFUSE_BT_MAP_LEN) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("ReadEFuse_BT(): Invalid offset(%#x) with read bytes(%#x)!!\n",_offset, _size_byte)); ++ return; ++ } ++ ++ // 0. Refresh efuse init map as all oxFF. ++ for (i = 0; i < EFUSE_BT_MAX_SECTION; i++) ++ for (j = 0; j < EFUSE_MAX_WORD_UNIT; j++) ++ eFuseWord[i][j] = 0xFFFF; ++ ++ for(bank=1; bank> 1) | offset_2_0; ++ wden = (efuseExtHdr & 0x0F); ++ } ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Error condition, extended = 0xff\n")); ++ // We should handle this condition. ++ } ++ } ++ else ++ { ++ offset = ((efuseHeader >> 4) & 0x0f); ++ wden = (efuseHeader & 0x0f); ++ } ++ ++ if(offset < EFUSE_BT_MAX_SECTION) ++ { ++ // Get word enable value from PG header ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Offset-%d Worden=%x\n", offset, wden)); ++ ++ for(i=0; i= EFUSE_REAL_CONTENT_LEN) ++ bCheckNextBank = _TRUE; ++ else ++ bCheckNextBank = _FALSE; ++ } ++ } ++ if(!bCheckNextBank) ++ { ++ //RTPRINT(FEEPROM, EFUSE_READ_ALL, ("Stop to check next bank\n")); ++ break; ++ } ++ } ++ ++ // switch bank back to bank 0 for later BT and wifi use. ++ Hal_EfuseSwitchToBank(Adapter, 0, bPseudoTest); ++ ++ // ++ // 3. Collect 16 sections and 4 word unit into Efuse map. ++ // ++ for(i=0; i> 8) & 0xff); ++ } ++ } ++ ++ // ++ // 4. Copy from Efuse map to output pointer memory!!! ++ // ++ for(i=0; i<_size_byte; i++) ++ { ++ pbuf[i] = efuseTbl[_offset+i]; ++ } ++ ++ // ++ // 5. Calculate Efuse utilization. ++ // ++ efuse_usage = (u8)((efuse_utilized*100)/EFUSE_BT_REAL_CONTENT_LEN); ++ if(bPseudoTest) ++ { ++ fakeBTEfuseUsedBytes = (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1; ++ } ++ else ++ { ++ BTEfuseUsedBytes = (EFUSE_REAL_CONTENT_LEN*(bank-1))+eFuse_Addr-1; ++ } ++ ++ for(i=0;i>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ return efuse_addr; ++} ++ ++static u16 ++Hal_EfuseGetCurrentSize_BT(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ int bContinual = _TRUE; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 efuse_data,word_cnts=0; ++ u8 bank=0, startBank=0; ++ u16 retU2=0; ++ u32 total_efuse_used=0; ++ ++ if(bPseudoTest) ++ { ++ efuse_addr = (u16)((fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN)); ++ startBank = (u8)(1+(fakeBTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN)); ++ } ++ else ++ { ++ efuse_addr = (u16)((BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN)); ++ startBank = (u8)(1+(BTEfuseUsedBytes/EFUSE_REAL_CONTENT_LEN)); ++ } ++ ++ if((startBank < 1) || (startBank >= EFUSE_MAX_BANK)) ++ DBG_8192C("Error, bank error, bank=%d\n", bank); ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), start bank=%d, start_efuse_addr = %d\n", startBank, efuse_addr)); ++ ++ for(bank=startBank; bank> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ // Check if we need to check next bank efuse ++ if(efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_PROTECT_BYTES_BANK)) ++ { ++ break;// don't need to check next bank. ++ } ++ } ++ ++ retU2 = ((bank-1)*EFUSE_REAL_CONTENT_LEN)+efuse_addr; ++ if(bPseudoTest) ++ { ++ fakeBTEfuseUsedBytes = retU2; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", fakeBTEfuseUsedBytes)); ++ } ++ else ++ { ++ BTEfuseUsedBytes = retU2; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Hal_EfuseGetCurrentSize_BT(), return %d\n", BTEfuseUsedBytes)); ++ } ++ ++ return retU2; ++} ++ ++ ++static u16 ++hal_EfuseGetCurrentSize_8723(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ int bContinual = _TRUE; ++ ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 efuse_data,word_cnts=0; ++ ++ if(bPseudoTest) ++ { ++ efuse_addr = (u16)(fakeEfuseUsedBytes); ++ } ++ else ++ { ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), start_efuse_addr = %d\n", efuse_addr)); ++ ++ while ( bContinual && ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && ++ AVAILABLE_EFUSE_ADDR(efuse_addr)) ++ { ++ if(efuse_data!=0xFF) ++ { ++ if((efuse_data&0x1F) == 0x0F) //extended header ++ { ++ hoffset = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if((efuse_data & 0x0F) == 0x0F) ++ { ++ efuse_addr++; ++ continue; ++ } ++ else ++ { ++ hoffset = ((hoffset & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ //read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ } ++ else ++ { ++ bContinual = _FALSE ; ++ } ++ } ++ ++ if(bPseudoTest) ++ { ++ fakeEfuseUsedBytes = efuse_addr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", fakeEfuseUsedBytes)); ++ } ++ else ++ { ++ pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&efuse_addr); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseGetCurrentSize_8723(), return %d\n", efuse_addr)); ++ } ++ ++ return efuse_addr; ++} ++ ++static u16 ++Hal_EfuseGetCurrentSize_Pseudo(IN PADAPTER pAdapter, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest); ++ ++ return ret; ++} ++ ++static u16 ++rtl8192c_EfuseGetCurrentSize( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest) ++{ ++ u16 ret=0; ++ ++ if(efuseType == EFUSE_WIFI) ++ { ++ if(bPseudoTest) ++ { ++ ret = Hal_EfuseGetCurrentSize_Pseudo(pAdapter, bPseudoTest); ++ } ++ else ++ { ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfuseGetCurrentSize_8192C(pAdapter, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723(pAdapter)) ++ { ++ ret = hal_EfuseGetCurrentSize_8723(pAdapter, bPseudoTest); ++ } ++ } ++ } ++ else ++ { ++ ret = Hal_EfuseGetCurrentSize_BT(pAdapter, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++hal_EfusePgPacketRead_8192C( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ReadState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE; ++ int bDataEmpty = _TRUE ; ++ ++ u8 efuse_data,word_cnts=0; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 tmpidx=0; ++ u8 tmpdata[8]; ++ ++ if(data==NULL) return _FALSE; ++ if(offset>15) return _FALSE; ++ ++ ++ _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // Skip dummy parts to prevent unexpected data read from Efuse. ++ // By pass right now. 2009.02.19. ++ // ++ while(bContinual && (efuse_addr < EFUSE_REAL_CONTENT_LEN) ) ++ { ++ //------- Header Read ------------- ++ if(ReadState & PG_STATE_HEADER) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)){ ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ bDataEmpty = _TRUE ; ++ ++ if(hoffset==offset){ ++ for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++){ ++ if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ){ ++ tmpdata[tmpidx] = efuse_data; ++ if(efuse_data!=0xff){ ++ bDataEmpty = _FALSE; ++ } ++ } ++ } ++ if(bDataEmpty==_FALSE){ ++ ReadState = PG_STATE_DATA; ++ }else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ } ++ else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ else{ ++ bContinual = _FALSE ; ++ } ++ } ++ //------- Data section Read ------------- ++ else if(ReadState & PG_STATE_DATA) ++ { ++ efuse_WordEnableDataRead(hworden,tmpdata,data); ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ ++ if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && ++ (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) ++ return _FALSE; ++ else ++ return _TRUE; ++ ++} ++ ++static int ++hal_EfusePgPacketRead_8723( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 ReadState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE; ++ int bDataEmpty = _TRUE ; ++ ++ u8 efuse_data,word_cnts=0; ++ u16 efuse_addr = 0; ++ u8 hoffset=0,hworden=0; ++ u8 tmpidx=0; ++ u8 tmpdata[8]; ++ u8 max_section=0; ++ u8 tmp_header = 0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, EFUSE_WIFI, TYPE_EFUSE_MAX_SECTION, (PVOID)&max_section, bPseudoTest); ++ ++ if(data==NULL) ++ return _FALSE; ++ if(offset>max_section) ++ return _FALSE; ++ ++ _rtw_memset((PVOID)data, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ _rtw_memset((PVOID)tmpdata, 0xff, sizeof(u8)*PGPKT_DATA_SIZE); ++ ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // Skip dummy parts to prevent unexpected data read from Efuse. ++ // By pass right now. 2009.02.19. ++ // ++ while(bContinual && AVAILABLE_EFUSE_ADDR(efuse_addr) ) ++ { ++ //------- Header Read ------------- ++ if(ReadState & PG_STATE_HEADER) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest)&&(efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ tmp_header = efuse_data; ++ efuse_addr++; ++ efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest); ++ if(!ALL_WORDS_DISABLED(efuse_data)) ++ { ++ hoffset = ((tmp_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ hworden = efuse_data & 0x0F; ++ } ++ else ++ { ++ DBG_8192C("Error, All words disabled\n"); ++ efuse_addr++; ++ continue; ++ } ++ } ++ else ++ { ++ hoffset = (efuse_data>>4) & 0x0F; ++ hworden = efuse_data & 0x0F; ++ } ++ word_cnts = Efuse_CalculateWordCnts(hworden); ++ bDataEmpty = _TRUE ; ++ ++ if(hoffset==offset) ++ { ++ for(tmpidx = 0;tmpidx< word_cnts*2 ;tmpidx++) ++ { ++ if(efuse_OneByteRead(pAdapter, efuse_addr+1+tmpidx ,&efuse_data, bPseudoTest) ) ++ { ++ tmpdata[tmpidx] = efuse_data; ++ if(efuse_data!=0xff) ++ { ++ bDataEmpty = _FALSE; ++ } ++ } ++ } ++ if(bDataEmpty==_FALSE){ ++ ReadState = PG_STATE_DATA; ++ }else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ } ++ else{//read next header ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ else{ ++ bContinual = _FALSE ; ++ } ++ } ++ //------- Data section Read ------------- ++ else if(ReadState & PG_STATE_DATA) ++ { ++ efuse_WordEnableDataRead(hworden,tmpdata,data); ++ efuse_addr = efuse_addr + (word_cnts*2)+1; ++ ReadState = PG_STATE_HEADER; ++ } ++ ++ } ++ ++ if( (data[0]==0xff) &&(data[1]==0xff) && (data[2]==0xff) && (data[3]==0xff) && ++ (data[4]==0xff) &&(data[5]==0xff) && (data[6]==0xff) && (data[7]==0xff)) ++ return _FALSE; ++ else ++ return _TRUE; ++ ++} ++ ++static int ++Hal_EfusePgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfusePgPacketRead_8192C(pAdapter, offset, data, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723(pAdapter)) ++ { ++ ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketRead_Pseudo( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ ret = hal_EfusePgPacketRead_8723(pAdapter, offset, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++rtl8192c_Efuse_PgPacketRead( IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketRead_Pseudo(pAdapter, offset, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketRead(pAdapter, offset, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static BOOLEAN ++hal_EfuseFixHeaderProcess( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN PPGPKT_STRUCT pFixPkt, ++ IN u16 *pAddr, ++ IN BOOLEAN bPseudoTest ++) ++{ ++ u8 originaldata[8], badworden=0; ++ u16 efuse_addr=*pAddr; ++ u32 PgWriteSuccess=0; ++ ++ _rtw_memset((PVOID)originaldata, 0xff, 8); ++ ++ if(Efuse_PgPacketRead(pAdapter, pFixPkt->offset, originaldata, bPseudoTest)) ++ { //check if data exist ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pFixPkt->word_en, originaldata, bPseudoTest); ++ ++ if(badworden != 0xf) // write fail ++ { ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pFixPkt->offset, badworden, originaldata, bPseudoTest); ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ } ++ else ++ { ++ efuse_addr = efuse_addr + (pFixPkt->word_cnts*2) +1; ++ } ++ *pAddr = efuse_addr; ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite2ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE, bContinual=_TRUE; ++ u16 efuse_addr=*pAddr, efuse_max_available_len=0; ++ u8 pg_header=0, tmp_header=0, pg_header_temp=0; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 2byte header\n")); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ ++ while(efuse_addr < efuse_max_available_len) ++ { ++ pg_header = ((pTargetPkt->offset & 0x07) << 5) | 0x0F; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("pg_header = 0x%x\n", pg_header)); ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for pg_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ //to write ext_header ++ if(tmp_header == pg_header) ++ { ++ efuse_addr++; ++ pg_header_temp = pg_header; ++ pg_header = ((pTargetPkt->offset & 0x78) << 1) | pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for ext_header!!\n")); ++ return _FALSE; ++ } ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if((tmp_header & 0x0F) == 0x0F) //word_en PG fail ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Repeat over limit for word_en!!\n")); ++ return _FALSE; ++ } ++ else ++ { ++ efuse_addr++; ++ continue; ++ } ++ } ++ else if(pg_header != tmp_header) //offset PG fail ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for offset PG fail, need to cover the existed data\n")); ++ fixPkt.offset = ((pg_header_temp & 0xE0) >> 5) | ((tmp_header & 0xF0) >> 1); ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ else ++ { ++ bRet = _TRUE; ++ break; ++ } ++ } ++ else if ((tmp_header & 0x1F) == 0x0F) //wrong extended header ++ { ++ efuse_addr+=2; ++ continue; ++ } ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite1ByteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 pg_header=0, tmp_header=0; ++ u16 efuse_addr=*pAddr; ++ u8 repeatcnt=0; ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Wirte 1byte header\n")); ++ pg_header = ((pTargetPkt->offset << 4) & 0xf0) |pTargetPkt->word_en; ++ ++ efuse_OneByteWrite(pAdapter, efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter, efuse_addr, &tmp_header, bPseudoTest); ++ ++ while(tmp_header == 0xFF) ++ { ++ if(repeatcnt++ > EFUSE_REPEAT_THRESHOLD_) ++ { ++ return _FALSE; ++ } ++ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); ++ } ++ ++ if(pg_header == tmp_header) ++ { ++ bRet = _TRUE; ++ } ++ else ++ { ++ PGPKT_STRUCT fixPkt; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition for fixed PG packet, need to cover the existed data\n")); ++ fixPkt.offset = (tmp_header>>4) & 0x0F; ++ fixPkt.word_en = tmp_header & 0x0F; ++ fixPkt.word_cnts = Efuse_CalculateWordCnts(fixPkt.word_en); ++ if(!hal_EfuseFixHeaderProcess(pAdapter, efuseType, &fixPkt, &efuse_addr, bPseudoTest)) ++ return _FALSE; ++ } ++ ++ *pAddr = efuse_addr; ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteData( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ u16 efuse_addr=*pAddr; ++ u8 badworden=0; ++ u32 PgWriteSuccess=0; ++ ++ badworden = 0x0f; ++ badworden = Efuse_WordEnableDataWrite(pAdapter, efuse_addr+1, pTargetPkt->word_en, pTargetPkt->data, bPseudoTest); ++ if(badworden == 0x0F) ++ { ++ // write ok ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData ok!!\n")); ++ return _TRUE; ++ } ++ else ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWriteData Fail!!\n")); ++ //reorganize other pg packet ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ if(!PgWriteSuccess) ++ return _FALSE; ++ else ++ return _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWriteHeader( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest) ++{ ++ BOOLEAN bRet=_FALSE; ++ ++ if(pTargetPkt->offset >= EFUSE_MAX_SECTION_BASE) ++ { ++ bRet = hal_EfusePgPacketWrite2ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ else ++ { ++ bRet = hal_EfusePgPacketWrite1ByteHeader(pAdapter, efuseType, pAddr, pTargetPkt, bPseudoTest); ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgCheckAvailableAddr( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ u16 efuse_max_available_len=0; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&efuse_max_available_len, bPseudoTest); ++ //RTPRINT(FEEPROM, EFUSE_PG, ("efuse_max_available_len = %d\n", efuse_max_available_len)); ++ ++ if(Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= efuse_max_available_len) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgCheckAvailableAddr error!!\n")); ++ return _FALSE; ++ } ++ return _TRUE; ++} ++ ++static VOID ++hal_EfuseConstructPGPkt( ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN PPGPKT_STRUCT pTargetPkt ++ ++) ++{ ++ _rtw_memset((PVOID)pTargetPkt->data, 0xFF, sizeof(u8)*8); ++ pTargetPkt->offset = offset; ++ pTargetPkt->word_en= word_en; ++ efuse_WordEnableDataRead(word_en, pData, pTargetPkt->data); ++ pTargetPkt->word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfuseConstructPGPkt(), targetPkt, offset=%d, word_en=0x%x, word_cnts=%d\n", pTargetPkt->offset, pTargetPkt->word_en, pTargetPkt->word_cnts)); ++} ++ ++static BOOLEAN ++hal_EfuseCheckIfDatafollowed( ++ IN PADAPTER pAdapter, ++ IN u8 word_cnts, ++ IN u16 startAddr, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data; ++ ++ for(i=0; i<(word_cnts*2) ; i++) ++ { ++ if(efuse_OneByteRead(pAdapter, (startAddr+i) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)) ++ bRet = _TRUE; ++ } ++ ++ return bRet; ++} ++ ++static BOOLEAN ++wordEnMatched( ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN PPGPKT_STRUCT pCurPkt, ++ IN u8 *pWden ++) ++{ ++ u8 match_word_en = 0x0F; // default all words are disabled ++ u8 i; ++ ++ // check if the same words are enabled both target and current PG packet ++ if( ((pTargetPkt->word_en & BIT0) == 0) && ++ ((pCurPkt->word_en & BIT0) == 0) ) ++ { ++ match_word_en &= ~BIT0; // enable word 0 ++ } ++ if( ((pTargetPkt->word_en & BIT1) == 0) && ++ ((pCurPkt->word_en & BIT1) == 0) ) ++ { ++ match_word_en &= ~BIT1; // enable word 1 ++ } ++ if( ((pTargetPkt->word_en & BIT2) == 0) && ++ ((pCurPkt->word_en & BIT2) == 0) ) ++ { ++ match_word_en &= ~BIT2; // enable word 2 ++ } ++ if( ((pTargetPkt->word_en & BIT3) == 0) && ++ ((pCurPkt->word_en & BIT3) == 0) ) ++ { ++ match_word_en &= ~BIT3; // enable word 3 ++ } ++ ++ *pWden = match_word_en; ++ ++ if(match_word_en != 0xf) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++static BOOLEAN ++hal_EfusePartialWriteCheck( ++ IN PADAPTER pAdapter, ++ IN u8 efuseType, ++ IN u16 *pAddr, ++ IN PPGPKT_STRUCT pTargetPkt, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ BOOLEAN bRet=_FALSE; ++ u8 i, efuse_data=0, cur_header=0; ++ u8 new_wden=0, matched_wden=0, badworden=0; ++ u16 startAddr=0, efuse_max_available_len=0, efuse_max=0; ++ PGPKT_STRUCT curPkt; ++ ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_AVAILABLE_EFUSE_BYTES_BANK, (PVOID)&efuse_max_available_len, bPseudoTest); ++ EFUSE_GetEfuseDefinition(pAdapter, efuseType, TYPE_EFUSE_REAL_CONTENT_LEN, (PVOID)&efuse_max, bPseudoTest); ++ ++ if(efuseType == EFUSE_WIFI) ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ pAdapter->HalFunc.GetHwRegHandler(pAdapter, HW_VAR_EFUSE_BYTES, (u8 *)&startAddr); ++ startAddr%=EFUSE_REAL_CONTENT_LEN; ++ } ++ } ++ else ++ { ++ if(bPseudoTest) ++ { ++ startAddr = (u16)(fakeBTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ else ++ { ++ startAddr = (u16)(BTEfuseUsedBytes%EFUSE_REAL_CONTENT_LEN); ++ } ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePartialWriteCheck(), startAddr=%d\n", startAddr)); ++ ++ while(1) ++ { ++ if(startAddr >= efuse_max_available_len) ++ { ++ bRet = _FALSE; ++ break; ++ } ++ ++ if(efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest) && (efuse_data!=0xFF)) ++ { ++ if(EXT_HEADER(efuse_data)) ++ { ++ cur_header = efuse_data; ++ startAddr++; ++ efuse_OneByteRead(pAdapter, startAddr, &efuse_data, bPseudoTest); ++ if(ALL_WORDS_DISABLED(efuse_data)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Error condition, all words disabled")); ++ bRet = _FALSE; ++ break; ++ } ++ else ++ { ++ curPkt.offset = ((cur_header & 0xE0) >> 5) | ((efuse_data & 0xF0) >> 1); ++ curPkt.word_en = efuse_data & 0x0F; ++ } ++ } ++ else ++ { ++ cur_header = efuse_data; ++ curPkt.offset = (cur_header>>4) & 0x0F; ++ curPkt.word_en = cur_header & 0x0F; ++ } ++ ++ curPkt.word_cnts = Efuse_CalculateWordCnts(curPkt.word_en); ++ // if same header is found but no data followed ++ // write some part of data followed by the header. ++ if( (curPkt.offset == pTargetPkt->offset) && ++ (!hal_EfuseCheckIfDatafollowed(pAdapter, curPkt.word_cnts, startAddr+1, bPseudoTest)) && ++ wordEnMatched(pTargetPkt, &curPkt, &matched_wden) ) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Need to partial write data by the previous wrote header\n")); ++ // Here to write partial data ++ badworden = Efuse_WordEnableDataWrite(pAdapter, startAddr+1, matched_wden, pTargetPkt->data, bPseudoTest); ++ if(badworden != 0x0F) ++ { ++ u32 PgWriteSuccess=0; ++ // if write fail on some words, write these bad words again ++ if(efuseType == EFUSE_WIFI) ++ PgWriteSuccess = Efuse_PgPacketWrite(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ else ++ PgWriteSuccess = hal_EfusePgPacketWrite_BT(pAdapter, pTargetPkt->offset, badworden, pTargetPkt->data, bPseudoTest); ++ ++ if(!PgWriteSuccess) ++ { ++ bRet = _FALSE; // write fail, return ++ break; ++ } ++ } ++ // partial write ok, update the target packet for later use ++ for(i=0; i<4; i++) ++ { ++ if((matched_wden & (0x1<word_en |= (0x1<word_cnts = Efuse_CalculateWordCnts(pTargetPkt->word_en); ++ } ++ // read from next header ++ startAddr = startAddr + (curPkt.word_cnts*2) +1; ++ } ++ else ++ { ++ // not used header, 0xff ++ *pAddr = startAddr; ++ //RTPRINT(FEEPROM, EFUSE_PG, ("Started from unused header offset=%d\n", startAddr)); ++ bRet = _TRUE; ++ break; ++ } ++ } ++ return bRet; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_BT( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_BT; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static BOOLEAN ++hal_EfusePgPacketWrite_8723( ++ IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *pData, ++ IN BOOLEAN bPseudoTest ++ ) ++{ ++ PGPKT_STRUCT targetPkt; ++ u16 startAddr=0; ++ u8 efuseType=EFUSE_WIFI; ++ ++ if(!hal_EfusePgCheckAvailableAddr(pAdapter, efuseType, bPseudoTest)) ++ return _FALSE; ++ ++ hal_EfuseConstructPGPkt(offset, word_en, pData, &targetPkt); ++ ++ if(!hal_EfusePartialWriteCheck(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteHeader(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ if(!hal_EfusePgPacketWriteData(pAdapter, efuseType, &startAddr, &targetPkt, bPseudoTest)) ++ return _FALSE; ++ ++ return _TRUE; ++} ++ ++static int ++hal_EfusePgPacketWrite_8192C(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ u8 WriteState = PG_STATE_HEADER; ++ ++ int bContinual = _TRUE,bDataEmpty=_TRUE, bResult = _TRUE; ++ u16 efuse_addr = 0; ++ u8 efuse_data; ++ ++ u8 pg_header = 0; ++ ++ u8 tmp_word_cnts=0,target_word_cnts=0; ++ u8 tmp_header,match_word_en,tmp_word_en; ++ ++ PGPKT_STRUCT target_pkt; ++ PGPKT_STRUCT tmp_pkt; ++ ++ u8 originaldata[sizeof(u8)*8]; ++ u8 tmpindex = 0,badworden = 0x0F; ++ ++ static int repeat_times = 0; ++ u8 efuseType=EFUSE_WIFI; ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // So we have to prevent unexpected data string connection, which will cause ++ // incorrect data auto-load from HW. The total size is equal or smaller than 498bytes ++ // (i.e., offset 0~497, and dummy 1bytes) expected after CP test. ++ // 2009.02.19. ++ // ++ if( Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest) >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ++ { ++ //RTPRINT(FEEPROM, EFUSE_PG, ("hal_EfusePgPacketWrite_8192C(), over size\n")); ++ return _FALSE; ++ } ++ ++ // Init the 8 bytes content as 0xff ++ target_pkt.offset = offset; ++ target_pkt.word_en= word_en; ++ ++ _rtw_memset((PVOID)target_pkt.data, 0xFF, sizeof(u8)*8); ++ ++ efuse_WordEnableDataRead(word_en,data,target_pkt.data); ++ target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); ++ ++ //efuse_reg_ctrl(pAdapter,_TRUE);//power on ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE Power ON\n")); ++ ++ // ++ // Efuse has been pre-programmed dummy 5Bytes at the end of Efuse by CP. ++ // So we have to prevent unexpected data string connection, which will cause ++ // incorrect data auto-load from HW. Dummy 1bytes is additional. ++ // 2009.02.19. ++ // ++ while( bContinual && (efuse_addr < (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ) ++ { ++ ++ if(WriteState==PG_STATE_HEADER) ++ { ++ bDataEmpty=_TRUE; ++ badworden = 0x0F; ++ //************ so ******************* ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER\n")); ++ if ( efuse_OneByteRead(pAdapter, efuse_addr ,&efuse_data, bPseudoTest) && ++ (efuse_data!=0xFF)) ++ { ++ tmp_header = efuse_data; ++ ++ tmp_pkt.offset = (tmp_header>>4) & 0x0F; ++ tmp_pkt.word_en = tmp_header & 0x0F; ++ tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); ++ ++ //************ so-1 ******************* ++ if(tmp_pkt.offset != target_pkt.offset) ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState = PG_STATE_HEADER; ++ #endif ++ } ++ else ++ { ++ //************ so-2 ******************* ++ for(tmpindex=0 ; tmpindex<(tmp_word_cnts*2) ; tmpindex++) ++ { ++ if(efuse_OneByteRead(pAdapter, (efuse_addr+1+tmpindex) ,&efuse_data, bPseudoTest)&&(efuse_data != 0xFF)){ ++ bDataEmpty = _FALSE; ++ } ++ } ++ //************ so-2-1 ******************* ++ if(bDataEmpty == _FALSE) ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ #endif ++ } ++ else ++ {//************ so-2-2 ******************* ++ match_word_en = 0x0F; ++ if( !( (target_pkt.word_en&BIT0)|(tmp_pkt.word_en&BIT0) )) ++ { ++ match_word_en &= (~BIT0); ++ } ++ if( !( (target_pkt.word_en&BIT1)|(tmp_pkt.word_en&BIT1) )) ++ { ++ match_word_en &= (~BIT1); ++ } ++ if( !( (target_pkt.word_en&BIT2)|(tmp_pkt.word_en&BIT2) )) ++ { ++ match_word_en &= (~BIT2); ++ } ++ if( !( (target_pkt.word_en&BIT3)|(tmp_pkt.word_en&BIT3) )) ++ { ++ match_word_en &= (~BIT3); ++ } ++ ++ //************ so-2-2-A ******************* ++ if((match_word_en&0x0F)!=0x0F) ++ { ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1, tmp_pkt.word_en ,target_pkt.data, bPseudoTest); ++ ++ //************ so-2-2-A-1 ******************* ++ //############################ ++ if(0x0F != (badworden&0x0F)) ++ { ++ u8 reorg_offset = offset; ++ u8 reorg_worden=badworden; ++ Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest); ++ } ++ //############################ ++ ++ tmp_word_en = 0x0F; ++ if( (target_pkt.word_en&BIT0)^(match_word_en&BIT0) ) ++ { ++ tmp_word_en &= (~BIT0); ++ } ++ if( (target_pkt.word_en&BIT1)^(match_word_en&BIT1) ) ++ { ++ tmp_word_en &= (~BIT1); ++ } ++ if( (target_pkt.word_en&BIT2)^(match_word_en&BIT2) ) ++ { ++ tmp_word_en &= (~BIT2); ++ } ++ if( (target_pkt.word_en&BIT3)^(match_word_en&BIT3) ) ++ { ++ tmp_word_en &=(~BIT3); ++ } ++ ++ //************ so-2-2-A-2 ******************* ++ if((tmp_word_en&0x0F)!=0x0F){ ++ //reorganize other pg packet ++ //efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= tmp_word_en; ++ //=========================== ++ }else{ ++ bContinual = _FALSE; ++ } ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ } ++ else{//************ so-2-2-B ******************* ++ //reorganize other pg packet ++ efuse_addr = efuse_addr + (2*tmp_word_cnts) +1;//next pg packet addr ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= target_pkt.word_en; ++ //=========================== ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ #endif ++ } ++ } ++ } ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-1\n")); ++ } ++ else //************ s1: header == oxff ******************* ++ { ++ pg_header = ((target_pkt.offset << 4)&0xf0) |target_pkt.word_en; ++ ++ efuse_OneByteWrite(pAdapter,efuse_addr, pg_header, bPseudoTest); ++ efuse_OneByteRead(pAdapter,efuse_addr, &tmp_header, bPseudoTest); ++ ++ if(tmp_header == pg_header) ++ { //************ s1-1******************* ++ WriteState = PG_STATE_DATA; ++ } ++ #if (EFUSE_ERROE_HANDLE == 1) ++ else if(tmp_header == 0xFF){//************ s1-3: if Write or read func doesn't work ******************* ++ //efuse_addr doesn't change ++ WriteState = PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ } ++ #endif ++ else ++ {//************ s1-2 : fixed the header procedure ******************* ++ tmp_pkt.offset = (tmp_header>>4) & 0x0F; ++ tmp_pkt.word_en= tmp_header & 0x0F; ++ tmp_word_cnts = Efuse_CalculateWordCnts(tmp_pkt.word_en); ++ ++ //************ s1-2-A :cover the exist data ******************* ++ //memset(originaldata,0xff,sizeof(UINT8)*8); ++ _rtw_memset((PVOID)originaldata, 0xff, sizeof(u8)*8); ++ ++ if(Efuse_PgPacketRead( pAdapter, tmp_pkt.offset,originaldata, bPseudoTest)) ++ { //check if data exist ++ //efuse_reg_ctrl(pAdapter,_TRUE);//power on ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,tmp_pkt.word_en,originaldata, bPseudoTest); ++ //############################ ++ if(0x0F != (badworden&0x0F)) ++ { ++ u8 reorg_offset = tmp_pkt.offset; ++ u8 reorg_worden=badworden; ++ Efuse_PgPacketWrite(pAdapter,reorg_offset,reorg_worden,originaldata, bPseudoTest); ++ efuse_addr = Efuse_GetCurrentSize(pAdapter, efuseType, bPseudoTest); ++ } ++ //############################ ++ else{ ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ } ++ } ++ //************ s1-2-B: wrong address******************* ++ else ++ { ++ efuse_addr = efuse_addr + (tmp_word_cnts*2) +1; //Next pg_packet ++ } ++ ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-2\n")); ++ } ++ ++ } ++ ++ } ++ //write data state ++ else if(WriteState==PG_STATE_DATA) ++ { //************ s1-1 ******************* ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_DATA\n")); ++ badworden = 0x0f; ++ badworden = Efuse_WordEnableDataWrite(pAdapter,efuse_addr+1,target_pkt.word_en,target_pkt.data, bPseudoTest); ++ if((badworden&0x0F)==0x0F) ++ { //************ s1-1-A ******************* ++ bContinual = _FALSE; ++ } ++ else ++ {//reorganize other pg packet //************ s1-1-B ******************* ++ efuse_addr = efuse_addr + (2*target_word_cnts) +1;//next pg packet addr ++ ++ //=========================== ++ target_pkt.offset = offset; ++ target_pkt.word_en= badworden; ++ target_word_cnts = Efuse_CalculateWordCnts(target_pkt.word_en); ++ //=========================== ++ #if (EFUSE_ERROE_HANDLE == 1) ++ WriteState=PG_STATE_HEADER; ++ repeat_times++; ++ if(repeat_times>EFUSE_REPEAT_THRESHOLD_){ ++ bContinual = _FALSE; ++ bResult = _FALSE; ++ } ++ #endif ++ //RTPRINT(FEEPROM, EFUSE_PG, ("EFUSE PG_STATE_HEADER-3\n")); ++ } ++ } ++ } ++ ++ if(efuse_addr >= (EFUSE_REAL_CONTENT_LEN-EFUSE_OOB_PROTECT_BYTES)) ++ { ++ //RT_TRACE(COMP_EFUSE, DBG_LOUD, ("hal_EfusePgPacketWrite_8192C(): efuse_addr(%#x) Out of size!!\n", efuse_addr)); ++ } ++ //efuse_reg_ctrl(pAdapter,_FALSE);//power off ++ ++ return _TRUE; ++} ++ ++static int ++Hal_EfusePgPacketWrite_Pseudo(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest); ++ ++ return ret; ++} ++ ++static int ++Hal_EfusePgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret=0; ++ ++ if(IS_HARDWARE_TYPE_8192C(pAdapter)) ++ { ++ ret = hal_EfusePgPacketWrite_8192C(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ else if(IS_HARDWARE_TYPE_8723(pAdapter)) ++ { ++ ret = hal_EfusePgPacketWrite_8723(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ ++ return ret; ++} ++ ++static int ++rtl8192c_Efuse_PgPacketWrite(IN PADAPTER pAdapter, ++ IN u8 offset, ++ IN u8 word_en, ++ IN u8 *data, ++ IN BOOLEAN bPseudoTest) ++{ ++ int ret; ++ ++ if(bPseudoTest) ++ { ++ ret = Hal_EfusePgPacketWrite_Pseudo(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ else ++ { ++ ret = Hal_EfusePgPacketWrite(pAdapter, offset, word_en, data, bPseudoTest); ++ } ++ return ret; ++} ++ ++VOID ++rtl8192c_EfuseParseIDCode( ++ IN PADAPTER pAdapter, ++ IN u8 *hwinfo ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u16 i,EEPROMId; ++ ++ // Checl 0x8129 again for making sure autoload status!! ++ EEPROMId = *((u16 *)&hwinfo[0]); ++ if( le16_to_cpu(EEPROMId) != RTL_EEPROM_ID) ++ { ++ DBG_8192C("EEPROM ID(%#x) is invalid!!\n", EEPROMId); ++ pEEPROM->bautoload_fail_flag = _TRUE; ++ } ++ else ++ { ++ pEEPROM->bautoload_fail_flag = _FALSE; ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("EEPROM ID = 0x%4x\n", EEPROMId)); ++} ++ ++void rtl8192c_read_chip_version(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter); ++} ++ ++void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc) ++{ ++ pHalFunc->free_hal_data = &rtl8192c_free_hal_data; ++ ++ pHalFunc->dm_init = &rtl8192c_init_dm_priv; ++ pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv; ++ pHalFunc->read_chip_version = &rtl8192c_read_chip_version; ++ ++ pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; ++ pHalFunc->set_channel_handler = &PHY_SwChnl8192C; ++ ++ pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; ++ ++ pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ pHalFunc->SwAntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C; ++ pHalFunc->SwAntDivCompareHandler = &SwAntDivCompare8192C; ++#endif ++ ++ pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg; ++ pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg; ++ pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg; ++ pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg; ++ ++ //Efuse related function ++ pHalFunc->EfusePowerSwitch = &rtl8192c_EfusePowerSwitch; ++ pHalFunc->ReadEFuse = &rtl8192c_ReadEFuse; ++ pHalFunc->EFUSEGetEfuseDefinition = &rtl8192c_EFUSE_GetEfuseDefinition; ++ pHalFunc->EfuseGetCurrentSize = &rtl8192c_EfuseGetCurrentSize; ++ pHalFunc->Efuse_PgPacketRead = &rtl8192c_Efuse_PgPacketRead; ++ pHalFunc->Efuse_PgPacketWrite = &rtl8192c_Efuse_PgPacketWrite; ++ pHalFunc->Efuse_WordEnableDataWrite = &rtl8192c_Efuse_WordEnableDataWrite; ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ pHalFunc->sreset_init_value = &rtl8192c_sreset_init_value; ++ pHalFunc->sreset_reset_value = &rtl8192c_sreset_reset_value; ++ pHalFunc->silentreset = &rtl8192c_silentreset_for_specific_platform; ++ pHalFunc->sreset_xmit_status_check = &rtl8192c_sreset_xmit_status_check; ++ pHalFunc->sreset_linked_status_check = &rtl8192c_sreset_linked_status_check; ++ pHalFunc->sreset_get_wifi_status = &rtl8192c_sreset_get_wifi_status; ++#endif ++ ++#ifdef CONFIG_IOL ++ pHalFunc->IOL_exec_cmds_sync = &rtl8192c_IOL_exec_cmds_sync; ++#endif ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_mp.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1230 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RTL8192C_MP_C_ ++#ifdef CONFIG_MP_INCLUDED ++ ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++ ++ ++ ++s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ if (!netif_running(padapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&padapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetPowerTracking! Fail: not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ if (enable) ++ pdmpriv->TxPowerTrackControl = _TRUE; ++ else ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ ++ return _SUCCESS; ++} ++ ++void Hal_GetPowerTracking(PADAPTER padapter, u8 *enable) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ *enable = pdmpriv->TxPowerTrackControl; ++} ++ ++static void Hal_disable_dm(PADAPTER padapter) ++{ ++ u8 v8; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ ++ //3 1. disable firmware dynamic mechanism ++ // disable Power Training, Rate Adaptive ++ v8 = rtw_read8(padapter, REG_BCN_CTRL); ++ v8 &= ~EN_BCN_FUNCTION; ++ rtw_write8(padapter, REG_BCN_CTRL, v8); ++ ++ //3 2. disable driver dynamic mechanism ++ // disable Dynamic Initial Gain ++ // disable High Power ++ // disable Power Tracking ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++ // enable APK, LCK and IQK but disable power tracking ++ pdmpriv->TxPowerTrackControl = _FALSE; ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_SS, _TRUE); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: mpt_SwitchRfSetting ++ * ++ * Overview: Change RF Setting when we siwthc channel/rate/BW for MP. ++ * ++ * Input: IN PADAPTER pAdapter ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/08/2009 MHC Suggestion from SD3 Willis for 92S series. ++ * 01/09/2009 MHC Add CCK modification for 40MHZ. Suggestion from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 ChannelToSw = pmp->channel, eRFPath = RF90_PATH_A; ++ u8 ulRateIdx = pmp->rateidx; ++ u8 ulbandwidth = pmp->bandwidth; ++ PMPT_CONTEXT pMptCtx = &(pAdapter->mppriv.MptCtx); ++ BOOLEAN bInteralPA = _FALSE; ++ u32 value = 0; ++ ++#ifdef CONFIG_USB_HCI ++ if (IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ //92CE-VAU (92cu mCard) ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ } ++ else //92CU dongle ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else if (ChannelToSw & BIT0) // OFDM rate, odd number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ else if (ChannelToSw == 4) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe0004); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); ++ } ++ else if(ChannelToSw == 10) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28000); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000A); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x709); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x7B333); ++ } ++ else if(ChannelToSw == 12) // OFDM rate, even number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x28200); ++ write_rfreg(pAdapter, 0, RF_SYN_G6, 0xe000C); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x50B); ++ rtw_msleep_os(1); ++ write_rfreg(pAdapter, 0, RF_SYN_G7, 0x4B333); ++ } ++ else ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ } ++ } ++ else //88cu ++ { ++ ++ //mcard interface ++ ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ ++ if(ChannelToSw == 6 || ChannelToSw == 8) ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); ++ } ++ else ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x20); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x20); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); ++ } ++ } ++ else ++ { ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else if (ChannelToSw & BIT0) // OFDM rate, odd number channel ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F200); ++ } ++ else ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ } ++ } ++ ++#else //PCI_INTERFACE ++ ++ if (ulRateIdx < MPT_RATE_6M) // CCK rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x0F400); ++ } ++ else //OFDM~MCS rate ++ { ++ write_rfreg(pAdapter, 0, RF_SYN_G2, 0x4F000); ++ } ++ //88CE ++ if(!IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if(ChannelToSw == 6 || ChannelToSw == 8) ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, 0x22); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, 0x4F); ++ } ++ else ++ { ++ write_bbreg(pAdapter, rOFDM0_XAAGCCore1, bMaskByte0, pMptCtx->backup0xc50); ++ write_bbreg(pAdapter, rOFDM0_XBAGCCore1, bMaskByte0, pMptCtx->backup0xc58); ++ write_bbreg(pAdapter, rOFDM0_RxDetector1, bMaskByte0, pMptCtx->backup0xc30); ++ } ++ } ++ ++#endif //CONFIG_USB_HCI ++ ++ ++} ++/*---------------------------hal\rtl8192c\MPT_Phy.c---------------------------*/ ++ ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14) ++{ ++ u32 TempVal = 0, TempVal2 = 0, TempVal3 = 0; ++ u32 CurrCCKSwingVal = 0, CCKSwingIndex = 12; ++ u8 i; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ // get current cck swing value and check 0xa22 & 0xa23 later to match the table. ++ CurrCCKSwingVal = read_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord); ++ ++ if (!bInCH14) ++ { ++ // Readback the current bb cck swing value and compare with the table to ++ // get the current swing index ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch1_Ch13[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch1_Ch13[i][1])) ++ { ++ CCKSwingIndex = i; ++// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch1~13, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ //Write 0xa22 0xa23 ++ TempVal = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][1]<<8) ; ++ ++ ++ //Write 0xa24 ~ 0xa27 ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][4]<<16 )+ ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][5]<<24); ++ ++ //Write 0xa28 0xa29 ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch1_Ch13[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch1_Ch13[CCKSwingIndex][7]<<8) ; ++ } ++ else ++ { ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (((CurrCCKSwingVal&0xff) == (u32)CCKSwingTable_Ch14[i][0]) && ++ (((CurrCCKSwingVal&0xff00)>>8) == (u32)CCKSwingTable_Ch14[i][1])) ++ { ++ CCKSwingIndex = i; ++// RT_TRACE(COMP_INIT, DBG_LOUD,("Ch14, Current reg0x%x = 0x%lx, CCKSwingIndex=0x%x\n", ++// (rCCK0_TxFilter1+2), CurrCCKSwingVal, CCKSwingIndex)); ++ break; ++ } ++ } ++ ++ //Write 0xa22 0xa23 ++ TempVal = CCKSwingTable_Ch14[CCKSwingIndex][0] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][1]<<8) ; ++ ++ //Write 0xa24 ~ 0xa27 ++ TempVal2 = 0; ++ TempVal2 = CCKSwingTable_Ch14[CCKSwingIndex][2] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][3]<<8) + ++ (CCKSwingTable_Ch14[CCKSwingIndex][4]<<16 )+ ++ (CCKSwingTable_Ch14[CCKSwingIndex][5]<<24); ++ ++ //Write 0xa28 0xa29 ++ TempVal3 = 0; ++ TempVal3 = CCKSwingTable_Ch14[CCKSwingIndex][6] + ++ (CCKSwingTable_Ch14[CCKSwingIndex][7]<<8) ; ++ } ++ ++ write_bbreg(Adapter, rCCK0_TxFilter1, bMaskHWord, TempVal); ++ write_bbreg(Adapter, rCCK0_TxFilter2, bMaskDWord, TempVal2); ++ write_bbreg(Adapter, rCCK0_DebugPort, bMaskLWord, TempVal3); ++} ++ ++void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven) ++{ ++ s32 TempCCk; ++ u8 CCK_index, CCK_index_old; ++ u8 Action = 0; //0: no action, 1: even->odd, 2:odd->even ++ u8 TimeOut = 100; ++ s32 i = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ ++ if (!IS_92C_SERIAL(pHalData->VersionID) || !IS_NORMAL_CHIP(pHalData->VersionID)) ++ return; ++#if 0 ++ while(PlatformAtomicExchange(&Adapter->IntrCCKRefCount, TRUE) == TRUE) ++ { ++ PlatformSleepUs(100); ++ TimeOut--; ++ if(TimeOut <= 0) ++ { ++ RTPRINT(FINIT, INIT_TxPower, ++ ("!!!MPT_CCKTxPowerAdjustbyIndex Wait for check CCK gain index too long!!!\n" )); ++ break; ++ } ++ } ++#endif ++ if (beven && !pMptCtx->bMptIndexEven) //odd->even ++ { ++ Action = 2; ++ pMptCtx->bMptIndexEven = _TRUE; ++ } ++ else if (!beven && pMptCtx->bMptIndexEven) //even->odd ++ { ++ Action = 1; ++ pMptCtx->bMptIndexEven = _FALSE; ++ } ++ ++ if (Action != 0) ++ { ++ //Query CCK default setting From 0xa24 ++ TempCCk = read_bbreg(pAdapter, rCCK0_TxFilter2, bMaskDWord) & bMaskCCK; ++ for (i = 0; i < CCK_TABLE_SIZE; i++) ++ { ++ if (pHalData->dmpriv.bCCKinCH14) ++ { ++ if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch14[i][2], 4) == _TRUE) ++ { ++ CCK_index_old = (u8) i; ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch 14 %d\n", ++// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); ++ break; ++ } ++ } ++ else ++ { ++ if (_rtw_memcmp((void*)&TempCCk, (void*)&CCKSwingTable_Ch1_Ch13[i][2], 4) == _TRUE) ++ { ++ CCK_index_old = (u8) i; ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: Initial reg0x%x = 0x%lx, CCK_index=0x%x, ch14 %d\n", ++// rCCK0_TxFilter2, TempCCk, CCK_index_old, pHalData->bCCKinCH14)); ++ break; ++ } ++ } ++ } ++ ++ if (Action == 1) ++ CCK_index = CCK_index_old - 1; ++ else ++ CCK_index = CCK_index_old + 1; ++ ++// RTPRINT(FINIT, INIT_TxPower,("MPT_CCKTxPowerAdjustbyIndex: new CCK_index=0x%x\n", ++// CCK_index)); ++ ++ //Adjust CCK according to gain index ++ if (!pHalData->dmpriv.bCCKinCH14) { ++ rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch1_Ch13[CCK_index][0]); ++ rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch1_Ch13[CCK_index][1]); ++ rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch1_Ch13[CCK_index][2]); ++ rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch1_Ch13[CCK_index][3]); ++ rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch1_Ch13[CCK_index][4]); ++ rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch1_Ch13[CCK_index][5]); ++ rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch1_Ch13[CCK_index][6]); ++ rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch1_Ch13[CCK_index][7]); ++ } else { ++ rtw_write8(pAdapter, 0xa22, CCKSwingTable_Ch14[CCK_index][0]); ++ rtw_write8(pAdapter, 0xa23, CCKSwingTable_Ch14[CCK_index][1]); ++ rtw_write8(pAdapter, 0xa24, CCKSwingTable_Ch14[CCK_index][2]); ++ rtw_write8(pAdapter, 0xa25, CCKSwingTable_Ch14[CCK_index][3]); ++ rtw_write8(pAdapter, 0xa26, CCKSwingTable_Ch14[CCK_index][4]); ++ rtw_write8(pAdapter, 0xa27, CCKSwingTable_Ch14[CCK_index][5]); ++ rtw_write8(pAdapter, 0xa28, CCKSwingTable_Ch14[CCK_index][6]); ++ rtw_write8(pAdapter, 0xa29, CCKSwingTable_Ch14[CCK_index][7]); ++ } ++ } ++#if 0 ++ RTPRINT(FINIT, INIT_TxPower, ++ ("MPT_CCKTxPowerAdjustbyIndex 0xa20=%x\n", PlatformEFIORead4Byte(Adapter, 0xa20))); ++ ++ PlatformAtomicExchange(&Adapter->IntrCCKRefCount, FALSE); ++#endif ++} ++/*---------------------------hal\rtl8192c\MPT_HelperFunc.c---------------------------*/ ++ ++/* ++ * SetChannel ++ * Description ++ * Use H2C command to change channel, ++ * not only modify rf register, but also other setting need to be done. ++ */ ++void Hal_SetChannel(PADAPTER pAdapter) ++{ ++#if 0 ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ ++// SelectChannel(pAdapter, pmp->channel); ++ set_channel_bwmode(pAdapter, pmp->channel, pmp->channel_offset, pmp->bandwidth); ++#else ++ u8 eRFPath; ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ u8 channel = pmp->channel; ++ u8 bandwidth = pmp->bandwidth; ++ u8 rate = pmp->rateidx; ++ ++ ++ // set RF channel register ++ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) ++ { ++ if(IS_HARDWARE_TYPE_8192D(pAdapter)) ++ _write_rfreg(pAdapter, (RF90_RADIO_PATH_E)eRFPath, rRfChannel, 0xFF, channel); ++ else ++ _write_rfreg(pAdapter, eRFPath, rRfChannel, 0x3FF, channel); ++ } ++ Hal_mpt_SwitchRfSetting(pAdapter); ++ ++ SelectChannel(pAdapter, channel); ++ ++ if (pHalData->CurrentChannel == 14 && !pHalData->dmpriv.bCCKinCH14) { ++ pHalData->dmpriv.bCCKinCH14 = _TRUE; ++ Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); ++ } ++ else if (pHalData->CurrentChannel != 14 && pHalData->dmpriv.bCCKinCH14) { ++ pHalData->dmpriv.bCCKinCH14 = _FALSE; ++ Hal_MPT_CCKTxPowerAdjust(pAdapter, pHalData->dmpriv.bCCKinCH14); ++ } ++#if 0 ++//#ifdef CONFIG_USB_HCI ++ // Georgia add 2009-11-17, suggested by Edlu , for 8188CU ,46 PIN ++ if (!IS_92C_SERIAL(pHalData->VersionID) && !IS_NORMAL_CHIP(pHalData->VersionID)) { ++ mpt_AdjustRFRegByRateByChan92CU(pAdapter, rate, pHalData->CurrentChannel, bandwidth); ++ } ++#endif ++ ++#endif ++} ++ ++/* ++ * Notice ++ * Switch bandwitdth may change center frequency(channel) ++ */ ++void Hal_SetBandwidth(PADAPTER pAdapter) ++{ ++ struct mp_priv *pmp = &pAdapter->mppriv; ++ ++ ++ SetBWMode(pAdapter, pmp->bandwidth, pmp->prime_channel_offset); ++ Hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ u32 tmpval = 0; ++ ++ ++ // rf-A cck tx power ++ write_bbreg(pAdapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, TxPower[RF_PATH_A]); ++ tmpval = (TxPower[RF_PATH_A]<<16) | (TxPower[RF_PATH_A]<<8) | TxPower[RF_PATH_A]; ++ write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); ++ ++ // rf-B cck tx power ++ write_bbreg(pAdapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, TxPower[RF_PATH_B]); ++ tmpval = (TxPower[RF_PATH_B]<<16) | (TxPower[RF_PATH_B]<<8) | TxPower[RF_PATH_B]; ++ write_bbreg(pAdapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-SetCCKTxPower: A[0x%02x] B[0x%02x]\n", ++ TxPower[RF_PATH_A], TxPower[RF_PATH_B])); ++} ++ ++void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 *TxPower) ++{ ++ u32 TxAGC = 0; ++ u8 tmpval = 0; ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ // HT Tx-rf(A) ++ tmpval = TxPower[RF_PATH_A]; ++ TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; ++ ++ write_bbreg(pAdapter, rTxAGC_A_Rate18_06, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Rate54_24, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_A_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ ++ if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ if (tmpval > pMptCtx->APK_bound[RF_PATH_A]) ++ write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][0]); ++ else ++ write_rfreg(pAdapter, RF_PATH_A, 0xe, pHalData->dmpriv.APKoutput[0][1]); ++ } ++ ++ // HT Tx-rf(B) ++ tmpval = TxPower[RF_PATH_B]; ++ TxAGC = (tmpval<<24) | (tmpval<<16) | (tmpval<<8) | tmpval; ++ ++ write_bbreg(pAdapter, rTxAGC_B_Rate18_06, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Rate54_24, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs03_Mcs00, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs07_Mcs04, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs11_Mcs08, bMaskDWord, TxAGC); ++ write_bbreg(pAdapter, rTxAGC_B_Mcs15_Mcs12, bMaskDWord, TxAGC); ++ ++ if (pHalData->dmpriv.bAPKdone && !IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ if (tmpval > pMptCtx->APK_bound[RF_PATH_B]) ++ write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][0]); ++ else ++ write_rfreg(pAdapter, RF_PATH_B, 0xe, pHalData->dmpriv.APKoutput[1][1]); ++ } ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ++ ("-SetOFDMTxPower: A[0x%02x] B[0x%02x]\n", ++ TxPower[RF_PATH_A], TxPower[RF_PATH_B])); ++} ++ ++void Hal_SetAntennaPathPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 TxPowerLevel[MAX_RF_PATH_NUMS]; ++ u8 rfPath; ++ ++ TxPowerLevel[RF_PATH_A] = pAdapter->mppriv.txpoweridx; ++ TxPowerLevel[RF_PATH_B] = pAdapter->mppriv.txpoweridx_b; ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ switch (pHalData->rf_chip) ++ { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ Hal_SetCCKTxPower(pAdapter, TxPowerLevel); ++ if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); ++ Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); ++ break; ++ ++ default: ++ break; ++ } ++} ++ ++void Hal_SetTxPower(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 TxPower = pAdapter->mppriv.txpoweridx; ++ u8 TxPowerLevel[MAX_RF_PATH_NUMS]; ++ u8 rf, rfPath; ++ ++ for (rf = 0; rf < MAX_RF_PATH_NUMS; rf++) { ++ TxPowerLevel[rf] = TxPower; ++ } ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ switch (pHalData->rf_chip) ++ { ++ // 2008/09/12 MH Test only !! We enable the TX power tracking for MP!!!!! ++ // We should call normal driver API later!! ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ Hal_SetCCKTxPower(pAdapter, TxPowerLevel); ++ if (pAdapter->mppriv.rateidx < MPT_RATE_6M) // CCK rate ++ Hal_MPT_CCKTxPowerAdjustbyIndex(pAdapter, TxPowerLevel[rfPath]%2 == 0); ++ Hal_SetOFDMTxPower(pAdapter, TxPowerLevel); ++ break; ++ ++ default: ++ break; ++ } ++ ++// SetCCKTxPower(pAdapter, TxPower); ++// SetOFDMTxPower(pAdapter, TxPower); ++} ++ ++void Hal_SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset) ++{ ++ u32 TxAGCOffset_B, TxAGCOffset_C, TxAGCOffset_D,tmpAGC; ++ ++ TxAGCOffset_B = (ulTxAGCOffset&0x000000ff); ++ TxAGCOffset_C = ((ulTxAGCOffset&0x0000ff00)>>8); ++ TxAGCOffset_D = ((ulTxAGCOffset&0x00ff0000)>>16); ++ ++ tmpAGC = (TxAGCOffset_D<<8 | TxAGCOffset_C<<4 | TxAGCOffset_B); ++ write_bbreg(pAdapter, rFPGA0_TxGainStage, ++ (bXBTxAGC|bXCTxAGC|bXDTxAGC), tmpAGC); ++} ++ ++void Hal_SetDataRate(PADAPTER pAdapter) ++{ ++ Hal_mpt_SwitchRfSetting(pAdapter); ++} ++ ++#if !defined (CONFIG_RTL8192C) && !defined (CONFIG_RTL8192D) ++/*------------------------------Define structure----------------------------*/ ++typedef struct _R_ANTENNA_SELECT_OFDM { ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK { ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++#endif ++ ++void Hal_SetAntenna(PADAPTER pAdapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ R_ANTENNA_SELECT_OFDM *p_ofdm_tx; /* OFDM Tx register */ ++ R_ANTENNA_SELECT_CCK *p_cck_txrx; ++ ++ u8 r_rx_antenna_ofdm = 0, r_ant_select_cck_val = 0; ++ u8 chgTx = 0, chgRx = 0; ++ u32 r_ant_sel_cck_val = 0, r_ant_select_ofdm_val = 0, r_ofdm_tx_en_val = 0; ++ ++ ++ p_ofdm_tx = (R_ANTENNA_SELECT_OFDM *)&r_ant_select_ofdm_val; ++ p_cck_txrx = (R_ANTENNA_SELECT_CCK *)&r_ant_select_cck_val; ++ ++ p_ofdm_tx->r_ant_ht1 = 0x1; ++ p_ofdm_tx->r_ant_ht2 = 0x2; // Second TX RF path is A ++ p_ofdm_tx->r_ant_non_ht = 0x3; // 0x1+0x2=0x3 ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ p_ofdm_tx->r_tx_antenna = 0x1; ++ r_ofdm_tx_en_val = 0x1; ++ p_ofdm_tx->r_ant_l = 0x1; ++ p_ofdm_tx->r_ant_ht_s1 = 0x1; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x1; ++ p_cck_txrx->r_ccktx_enable = 0x8; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF A=TX and B as standby ++// if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ write_bbreg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ write_bbreg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 1); ++ r_ofdm_tx_en_val = 0x3; ++ ++ // Power save ++ //cosa r_ant_select_ofdm_val = 0x11111111; ++ ++ // We need to close RFB by SW control ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 0); ++ } ++ } ++ break; ++ ++ case ANTENNA_B: ++ p_ofdm_tx->r_tx_antenna = 0x2; ++ r_ofdm_tx_en_val = 0x2; ++ p_ofdm_tx->r_ant_l = 0x2; ++ p_ofdm_tx->r_ant_ht_s1 = 0x2; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x2; ++ p_cck_txrx->r_ccktx_enable = 0x4; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF A as standby ++ //if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++// r_ofdm_tx_en_val = 0x3; ++ ++ // Power save ++ //cosa r_ant_select_ofdm_val = 0x22222222; ++ ++ // 2008/10/31 MH From SD3 Willi's suggestion. We must read RF 1T table. ++ // 2009/01/08 MH From Sd3 Willis. We need to close RFA by SW control ++ if (pHalData->rf_type == RF_2T2R || pHalData->rf_type == RF_1T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ break; ++ ++ case ANTENNA_AB: // For 8192S ++ p_ofdm_tx->r_tx_antenna = 0x3; ++ r_ofdm_tx_en_val = 0x3; ++ p_ofdm_tx->r_ant_l = 0x3; ++ p_ofdm_tx->r_ant_ht_s1 = 0x3; ++ p_ofdm_tx->r_ant_non_ht_s1 = 0x3; ++ p_cck_txrx->r_ccktx_enable = 0xC; ++ chgTx = 1; ++ ++ // From SD3 Willis suggestion !!! Set RF B as standby ++ //if (IS_HARDWARE_TYPE_8192S(pAdapter)) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_HSSIParameter2, 0xe, 2); ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_HSSIParameter2, 0xe, 2); ++ ++ // Disable Power save ++ //cosa r_ant_select_ofdm_val = 0x3321333; ++#if 0 ++ // 2008/10/31 MH From SD3 Willi's suggestion. We must read RFA 2T table. ++ if ((pHalData->VersionID == VERSION_8192S_ACUT)) // For RTL8192SU A-Cut only, by Roger, 2008.11.07. ++ { ++ mpt_RFConfigFromPreParaArrary(pAdapter, 1, RF90_PATH_A); ++ } ++#endif ++ // 2009/01/08 MH From Sd3 Willis. We need to enable RFA/B by SW control ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFInterfaceSW, BIT26, 0); ++// PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT10, 0); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT1, 1); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT17, 1); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ // ++ // r_rx_antenna_ofdm, bit0=A, bit1=B, bit2=C, bit3=D ++ // r_cckrx_enable : CCK default, 0=A, 1=B, 2=C, 3=D ++ // r_cckrx_enable_2 : CCK option, 0=A, 1=B, 2=C, 3=D ++ // ++ switch (pAdapter->mppriv.antenna_rx) ++ { ++ case ANTENNA_A: ++ r_rx_antenna_ofdm = 0x1; // A ++ p_cck_txrx->r_cckrx_enable = 0x0; // default: A ++ p_cck_txrx->r_cckrx_enable_2 = 0x0; // option: A ++ chgRx = 1; ++ break; ++ ++ case ANTENNA_B: ++ r_rx_antenna_ofdm = 0x2; // B ++ p_cck_txrx->r_cckrx_enable = 0x1; // default: B ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; // option: B ++ chgRx = 1; ++ break; ++ ++ case ANTENNA_AB: ++ r_rx_antenna_ofdm = 0x3; // AB ++ p_cck_txrx->r_cckrx_enable = 0x0; // default:A ++ p_cck_txrx->r_cckrx_enable_2 = 0x1; // option:B ++ chgRx = 1; ++ break; ++ ++ default: ++ break; ++ } ++ ++ if (chgTx && chgRx) ++ { ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ case RF_8256: ++ case RF_6052: ++ //r_ant_sel_cck_val = r_ant_select_cck_val; ++ PHY_SetBBReg(pAdapter, rFPGA1_TxInfo, 0x7fffffff, r_ant_select_ofdm_val); //OFDM Tx ++ PHY_SetBBReg(pAdapter, rFPGA0_TxInfo, 0x0000000f, r_ofdm_tx_en_val); //OFDM Tx ++ PHY_SetBBReg(pAdapter, rOFDM0_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx ++ PHY_SetBBReg(pAdapter, rOFDM1_TRxPathEnable, 0x0000000f, r_rx_antenna_ofdm); //OFDM Rx ++ PHY_SetBBReg(pAdapter, rCCK0_AFESetting, bMaskByte3, r_ant_select_cck_val);//r_ant_sel_cck_val); //CCK TxRx ++ ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++ RT_TRACE(_module_mp_, _drv_notice_, ("-SwitchAntenna: finished\n")); ++} ++ ++s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++ if (!netif_running(pAdapter->pnetdev)) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter! Fail: interface not opened!\n")); ++ return _FAIL; ++ } ++ ++ if (check_fwstate(&pAdapter->mlmepriv, WIFI_MP_STATE) == _FALSE) { ++ RT_TRACE(_module_mp_, _drv_warning_, ("SetThermalMeter: Fail! not in MP mode!\n")); ++ return _FAIL; ++ } ++ ++ target_ther &= 0xff; ++ if (target_ther < 0x07) ++ target_ther = 0x07; ++ else if (target_ther > 0x1d) ++ target_ther = 0x1d; ++ ++ pHalData->EEPROMThermalMeter = target_ther; ++ ++ return _SUCCESS; ++} ++ ++void Hal_TriggerRFThermalMeter(PADAPTER pAdapter) ++{ ++ ++ write_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x60); // 0x24: RF Reg[6:5] ++ ++// RT_TRACE(_module_mp_,_drv_alert_, ("TriggerRFThermalMeter() finished.\n" )); ++} ++ ++u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter) ++{ ++ u32 ThermalValue = 0; ++ ++ ThermalValue = _read_rfreg(pAdapter, RF_PATH_A, RF_T_METER, 0x1F); // 0x24: RF Reg[4:0] ++// RT_TRACE(_module_mp_, _drv_alert_, ("ThermalValue = 0x%x\n", ThermalValue)); ++ return (u8)ThermalValue; ++} ++ ++void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value) ++{ ++#if 0 ++ fw_cmd(pAdapter, IOCMD_GET_THERMAL_METER); ++ rtw_msleep_os(1000); ++ fw_cmd_data(pAdapter, value, 1); ++ *value &= 0xFF; ++#else ++ ++ Hal_TriggerRFThermalMeter(pAdapter); ++ rtw_msleep_os(1000); ++ *value = Hal_ReadRFThermalMeter(pAdapter); ++#endif ++} ++ ++void Hal_SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ pAdapter->mppriv.MptCtx.bSingleCarrier = bStart; ++ if (bStart)// Start Single Carrier. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test start\n")); ++ // 1. if OFDM block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on ++ ++ { ++ // 2. set CCK test mode off, set to CCK normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); ++ // 3. turn on scramble setting ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); ++ } ++ // 4. Turn On Single Carrier Tx and turn off the other test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bEnable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++#ifdef CONFIG_RTL8192C ++ // 5. Disable TX power saving at STF & LLTF ++ write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 1); ++#endif ++ } ++ else// Stop Single Carrier. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleCarrierTx: test stop\n")); ++ ++ // Turn off all test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++#ifdef CONFIG_RTL8192C ++ // Cancel disable TX power saving at STF&LLTF ++ write_bbreg(pAdapter, rOFDM1_LSTF, BIT22, 0); ++#endif ++ //Delay 10 ms //delay_ms(10); ++ rtw_msleep_os(10); ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++} ++ ++ ++void Hal_SetSingleToneTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ u8 rfPath; ++ ++ switch (pAdapter->mppriv.antenna_tx) ++ { ++ case ANTENNA_A: ++ default: ++ rfPath = RF_PATH_A; ++ break; ++ case ANTENNA_B: ++ rfPath = RF_PATH_B; ++ break; ++ case ANTENNA_C: ++ rfPath = RF_PATH_C; ++ break; ++ } ++ ++ pAdapter->mppriv.MptCtx.bSingleTone = bStart; ++ if (bStart)// Start Single Tone. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test start\n")); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x0); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x0); ++ ++ if (is92C) ++ { ++ _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x01); ++ rtw_usleep_os(100); ++ if (rfPath == RF_PATH_A) ++ write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x10000); // PAD all on. ++ else if (rfPath == RF_PATH_B) ++ write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x10000); // PAD all on. ++ } else { ++ write_rfreg(pAdapter, rfPath, 0x21, 0xd4000); ++ rtw_usleep_os(100); ++ } ++ ++ write_rfreg(pAdapter, rfPath, 0x00, 0x2001f); // PAD all on. ++ rtw_usleep_os(100); ++ } ++ else// Stop Single Tone. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetSingleToneTx: test stop\n")); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++ ++ if (is92C) { ++ _write_rfreg(pAdapter, RF_PATH_A, 0x21, BIT19, 0x00); ++ rtw_usleep_os(100); ++ write_rfreg(pAdapter, RF_PATH_A, 0x00, 0x32d75); // PAD all on. ++ write_rfreg(pAdapter, RF_PATH_B, 0x00, 0x32d75); // PAD all on. ++ rtw_usleep_os(100); ++ } else { ++ write_rfreg(pAdapter, rfPath, 0x21, 0x54000); ++ rtw_usleep_os(100); ++ ++ write_rfreg(pAdapter, rfPath, 0x00, 0x30000); // PAD all on. ++ rtw_usleep_os(100); ++ } ++ } ++ ++} ++ ++ ++void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart) ++{ ++ pAdapter->mppriv.MptCtx.bCarrierSuppression = bStart; ++ if (bStart) // Start Carrier Suppression. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test start\n")); ++ //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) ++ { ++ // 1. if CCK block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on ++ ++ //Turn Off All Test Mode ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x0); //turn off scramble setting ++ ++ //Set CCK Tx Test Rate ++ //PHY_SetBBReg(pAdapter, rCCK0_System, bCCKTxRate, pMgntInfo->ForcedDataRate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, 0x0); //Set FTxRate to 1Mbps ++ } ++ } ++ else// Stop Carrier Suppression. ++ { ++ RT_TRACE(_module_mp_,_drv_alert_, ("SetCarrierSuppressionTx: test stop\n")); ++ //if(pMgntInfo->dot11CurrentWirelessMode == WIRELESS_MODE_B) ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M ) { ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, 0x1); //turn on scramble setting ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ } ++ //DbgPrint("\n MPT_ProSetCarrierSupp() is finished. \n"); ++} ++ ++void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ u32 cckrate; ++ ++ if (bStart) ++ { ++ RT_TRACE(_module_mp_, _drv_alert_, ++ ("SetCCKContinuousTx: test start\n")); ++ ++ // 1. if CCK block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bCCKEn, bEnable);//set CCK block on ++ ++ //Turn Off All Test Mode ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ //Set CCK Tx Test Rate ++ #if 0 ++ switch(pAdapter->mppriv.rateidx) ++ { ++ case 2: ++ cckrate = 0; ++ break; ++ case 4: ++ cckrate = 1; ++ break; ++ case 11: ++ cckrate = 2; ++ break; ++ case 22: ++ cckrate = 3; ++ break; ++ default: ++ cckrate = 0; ++ break; ++ } ++ #else ++ cckrate = pAdapter->mppriv.rateidx; ++ #endif ++ write_bbreg(pAdapter, rCCK0_System, bCCKTxRate, cckrate); ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x2); //transmit mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting ++ ++#ifdef CONFIG_RTL8192C ++ // Patch for CCK 11M waveform ++ if (cckrate == MPT_RATE_1M) ++ write_bbreg(pAdapter, 0xA71, BIT(6), bDisable); ++ else ++ write_bbreg(pAdapter, 0xA71, BIT(6), bEnable); ++#endif ++ ++ } ++ else { ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetCCKContinuousTx: test stop\n")); ++ ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, 0x0); //normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); //turn on scramble setting ++ ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = bStart; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = _FALSE; ++}/* mpt_StartCckContTx */ ++ ++void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ if (bStart) { ++ RT_TRACE(_module_mp_, _drv_info_, ("SetOFDMContinuousTx: test start\n")); ++ // 1. if OFDM block on? ++ if(!read_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn)) ++ write_bbreg(pAdapter, rFPGA0_RFMOD, bOFDMEn, bEnable);//set OFDM block on ++ { ++ ++ // 2. set CCK test mode off, set to CCK normal mode ++ write_bbreg(pAdapter, rCCK0_System, bCCKBBMode, bDisable); ++ ++ // 3. turn on scramble setting ++ write_bbreg(pAdapter, rCCK0_System, bCCKScramble, bEnable); ++ } ++ // 4. Turn On Continue Tx and turn off the other test modes. ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bEnable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ } else { ++ RT_TRACE(_module_mp_,_drv_info_, ("SetOFDMContinuousTx: test stop\n")); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMContinueTx, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleCarrier, bDisable); ++ write_bbreg(pAdapter, rOFDM1_LSTF, bOFDMSingleTone, bDisable); ++ //Delay 10 ms ++ rtw_msleep_os(10); ++ //BB Reset ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x0); ++ write_bbreg(pAdapter, rPMAC_Reset, bBBResetB, 0x1); ++ } ++ ++ pAdapter->mppriv.MptCtx.bCckContTx = _FALSE; ++ pAdapter->mppriv.MptCtx.bOfdmContTx = bStart; ++}/* mpt_StartOfdmContTx */ ++ ++void Hal_SetContinuousTx(PADAPTER pAdapter, u8 bStart) ++{ ++#if 0 ++ // ADC turn off [bit24-21] adc port0 ~ port1 ++ if (bStart) { ++ write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) & 0xFE1FFFFF); ++ rtw_usleep_os(100); ++ } ++#endif ++ RT_TRACE(_module_mp_, _drv_info_, ++ ("SetContinuousTx: rate:%d\n", pAdapter->mppriv.rateidx)); ++ ++ pAdapter->mppriv.MptCtx.bStartContTx = bStart; ++ if (pAdapter->mppriv.rateidx <= MPT_RATE_11M) ++ { ++ Hal_SetCCKContinuousTx(pAdapter, bStart); ++ } ++ else if ((pAdapter->mppriv.rateidx >= MPT_RATE_6M) && ++ (pAdapter->mppriv.rateidx <= MPT_RATE_MCS15)) ++ { ++ Hal_SetOFDMContinuousTx(pAdapter, bStart); ++ } ++#if 0 ++ // ADC turn on [bit24-21] adc port0 ~ port1 ++ if (!bStart) { ++ write_bbreg(pAdapter, rRx_Wait_CCCA, read_bbreg(pAdapter, rRx_Wait_CCCA) | 0x01E00000); ++ } ++#endif ++} ++ ++#endif // CONFIG_MP_INCLUDE +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_phycfg.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,5583 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/****************************************************************************** ++ ++ Module: rtl8192c_phycfg.c ++ ++ Note: Merge 92SE/SU PHY config as below ++ 1. BB register R/W API ++ 2. RF register R/W API ++ 3. Initial BB/RF/MAC config by reading BB/MAC/RF txt. ++ 3. Power setting API ++ 4. Channel switch API ++ 5. Initial gain switch API. ++ 6. Other BB/MAC/RF API. ++ ++ Function: PHY: Extern function, phy: local function ++ ++ Export: PHY_FunctionName ++ ++ Abbrev: NONE ++ ++ History: ++ Data Who Remark ++ 08/08/2008 MHC 1. Port from 9x series phycfg.c ++ 2. Reorganize code arch and ad description. ++ 3. Collect similar function. ++ 4. Seperate extern/local API. ++ 08/12/2008 MHC We must merge or move USB PHY relative function later. ++ 10/07/2008 MHC Add IQ calibration for PHY.(Only 1T2R mode now!!!) ++ 11/06/2008 MHC Add TX Power index PG file to config in 0xExx register ++ area to map with EEPROM/EFUSE tx pwr index. ++ ++******************************************************************************/ ++#define _HAL_8192C_PHYCFG_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_IOL ++#include ++#endif ++ ++#include ++ ++ ++/*---------------------------Define Local Constant---------------------------*/ ++/* Channel switch:The size of command tables for switch channel*/ ++#define MAX_PRECMD_CNT 16 ++#define MAX_RFDEPENDCMD_CNT 16 ++#define MAX_POSTCMD_CNT 16 ++ ++#define MAX_DOZE_WAITING_TIMES_9x 64 ++ ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++ ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*--------------------Define export function prototype-----------------------*/ ++// Please refer to header file ++/*--------------------Define export function prototype-----------------------*/ ++ ++/*----------------------------Function Body----------------------------------*/ ++// ++// 1. BB register R/W API ++// ++ ++/** ++* Function: phy_CalculateBitShift ++* ++* OverView: Get shifted position of the BitMask ++* ++* Input: ++* u4Byte BitMask, ++* ++* Output: none ++* Return: u4Byte Return the shift bit bit position of the mask ++*/ ++static u32 ++phy_CalculateBitShift( ++ u32 BitMask ++ ) ++{ ++ u32 i; ++ ++ for(i=0; i<=31; i++) ++ { ++ if ( ((BitMask>>i) & 0x1 ) == 1) ++ break; ++ } ++ ++ return (i); ++} ++ ++ ++/** ++* Function: PHY_QueryBBReg ++* ++* OverView: Read "sepcific bits" from BB register ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be readback ++* u4Byte BitMask //The target bit position in the target address ++* //to be readback ++* Output: None ++* Return: u4Byte Data //The readback register value ++* Note: This function is equal to "GetRegSetting" in PHY programming guide ++*/ ++u32 ++rtl8192c_PHY_QueryBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 ReturnValue = 0, OriginalValue, BitShift; ++ u16 BBWaitCounter = 0; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx)\n", RegAddr, BitMask)); ++ ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ ReturnValue = (OriginalValue & BitMask) >> BitShift; ++ ++ //RTPRINT(FPHY, PHY_BBR, ("BBR MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, OriginalValue)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryBBReg(): RegAddr(%#lx), BitMask(%#lx), OriginalValue(%#lx)\n", RegAddr, BitMask, OriginalValue)); ++ ++ return (ReturnValue); ++ ++} ++ ++ ++/** ++* Function: PHY_SetBBReg ++* ++* OverView: Write "Specific bits" to BB register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register value in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRegSetting" in PHY programming guide ++*/ ++ ++VOID ++rtl8192c_PHY_SetBBReg( ++ IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u16 BBWaitCounter = 0; ++ u32 OriginalValue, BitShift; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++ if(BitMask!= bMaskDWord){//if not "double word" write ++ OriginalValue = rtw_read32(Adapter, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((OriginalValue & (~BitMask)) | (Data << BitShift)); ++ } ++ ++ rtw_write32(Adapter, RegAddr, Data); ++ ++ //RTPRINT(FPHY, PHY_BBW, ("BBW MASK=0x%lx Addr[0x%lx]=0x%lx\n", BitMask, RegAddr, Data)); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetBBReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx)\n", RegAddr, BitMask, Data)); ++ ++} ++ ++ ++// ++// 2. RF register R/W API ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialRead() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static u32 ++phy_FwRFSerialRead( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset ) ++{ ++ u32 retValue = 0; ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++ return (retValue); ++ ++} /* phy_FwRFSerialRead */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_FwRFSerialWrite() ++ * ++ * Overview: We support firmware to execute RF-R/W. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 01/21/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++phy_FwRFSerialWrite( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data ) ++{ ++ //RT_ASSERT(FALSE,("deprecate!\n")); ++} ++ ++ ++/** ++* Function: phy_RFSerialRead ++* ++* OverView: Read regster from RF chips ++* ++* Input: ++* PADAPTER Adapter, ++* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* ++* Output: None ++* Return: u4Byte reback value ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++*/ ++static u32 ++phy_RFSerialRead( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset ++ ) ++{ ++ u32 retValue = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ u32 tmplong,tmplong2; ++ u8 RfPiEnable=0; ++#if 0 ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return retValue; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return retValue; ++#endif ++ // ++ // Make sure RF register offset is correct ++ // ++ Offset &= 0x3f; ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFR, ("phy_RFSerialRead return all one\n")); ++ // return 0xFFFFFFFF; ++ //} ++ ++ // For 92S LSSI Read RFLSSIRead ++ // For RF A/B write 0x824/82c(does not work in the future) ++ // We must use 0x824 for RF A and B to execute read trigger ++ tmplong = PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord); ++ if(eRFPath == RF90_PATH_A) ++ tmplong2 = tmplong; ++ else ++ tmplong2 = PHY_QueryBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord); ++ ++ tmplong2 = (tmplong2 & (~bLSSIReadAddress)) | (NewOffset<<23) | bLSSIReadEdge; //T65 RF ++ ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong&(~bLSSIReadEdge)); ++ rtw_udelay_os(10);// PlatformStallExecution(10); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, bMaskDWord, tmplong2); ++ rtw_udelay_os(100);//PlatformStallExecution(100); ++ ++ PHY_SetBBReg(Adapter, rFPGA0_XA_HSSIParameter2, bMaskDWord, tmplong|bLSSIReadEdge); ++ rtw_udelay_os(10);//PlatformStallExecution(10); ++ ++ if(eRFPath == RF90_PATH_A) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter1, BIT8); ++ else if(eRFPath == RF90_PATH_B) ++ RfPiEnable = (u8)PHY_QueryBBReg(Adapter, rFPGA0_XB_HSSIParameter1, BIT8); ++ ++ if(RfPiEnable) ++ { // Read from BBreg8b8, 12 bits for 8190, 20bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBackPi, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-PI : 0x%x\n", retValue); ++ } ++ else ++ { //Read from BBreg8a0, 12 bits for 8190, 20 bits for T65 RF ++ retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack, bLSSIReadBackData); ++ //DBG_8192C("Readback from RF-SI : 0x%x\n", retValue); ++ } ++ //DBG_8192C("RFR-%d Addr[0x%x]=0x%x\n", eRFPath, pPhyReg->rfLSSIReadBack, retValue); ++ ++ return retValue; ++ ++} ++ ++ ++ ++/** ++* Function: phy_RFSerialWrite ++* ++* OverView: Write data to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte Offset, //The target address to be read ++* u4Byte Data //The new register Data in the target bit position ++* //of the target to be read ++* ++* Output: None ++* Return: None ++* Note: Threre are three types of serial operations: ++* 1. Software serial write ++* 2. Hardware LSSI-Low Speed Serial Interface ++* 3. Hardware HSSI-High speed ++* serial write. Driver need to implement (1) and (2). ++* This function is equal to the combination of RF_ReadReg() and RFLSSIRead() ++ * ++ * Note: For RF8256 only ++ * The total count of RTL8256(Zebra4) register is around 36 bit it only employs ++ * 4-bit RF address. RTL8256 uses "register mode control bit" (Reg00[12], Reg00[10]) ++ * to access register address bigger than 0xf. See "Appendix-4 in PHY Configuration ++ * programming guide" for more details. ++ * Thus, we define a sub-finction for RTL8526 register address conversion ++ * =========================================================== ++ * Register Mode RegCTL[1] RegCTL[0] Note ++ * (Reg00[12]) (Reg00[10]) ++ * =========================================================== ++ * Reg_Mode0 0 x Reg 0 ~15(0x0 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode1 1 0 Reg 16 ~30(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * Reg_Mode2 1 1 Reg 31 ~ 45(0x1 ~ 0xf) ++ * ------------------------------------------------------------------ ++ * ++ * 2008/09/02 MH Add 92S RF definition ++ * ++ * ++ * ++*/ ++static VOID ++phy_RFSerialWrite( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data ++ ) ++{ ++ u32 DataAndAddr = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BB_REGISTER_DEFINITION_T *pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ u32 NewOffset; ++ ++#if 0 ++ // We should check valid regs for RF_6052 case. ++ if(pHalData->RFChipID == RF_8225 && Offset > 0x24) //36 valid regs ++ return; ++ if(pHalData->RFChipID == RF_8256 && Offset > 0x2D) //45 valid regs ++ return; ++#endif ++ ++ // 2009/06/17 MH We can not execute IO for power save or other accident mode. ++ //if(RT_CANNOT_IO(Adapter)) ++ //{ ++ // RTPRINT(FPHY, PHY_RFW, ("phy_RFSerialWrite stop\n")); ++ // return; ++ //} ++ ++ Offset &= 0x3f; ++ ++ // ++ // Shadow Update ++ // ++ //PHY_RFShadowWrite(Adapter, eRFPath, Offset, Data); ++ ++ // ++ // Switch page for 8256 RF IC ++ // ++ NewOffset = Offset; ++ ++ // ++ // Put write addr in [5:0] and write data in [31:16] ++ // ++ //DataAndAddr = (Data<<16) | (NewOffset&0x3f); ++ DataAndAddr = ((NewOffset<<20) | (Data&0x000fffff)) & 0x0fffffff; // T65 RF ++ ++ // ++ // Write Operation ++ // ++ PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr); ++ //RTPRINT(FPHY, PHY_RFW, ("RFW-%d Addr[0x%lx]=0x%lx\n", eRFPath, pPhyReg->rf3wireOffset, DataAndAddr)); ++ ++} ++ ++ ++/** ++* Function: PHY_QueryRFReg ++* ++* OverView: Query "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be read ++* u4Byte BitMask //The target bit position in the target address ++* //to be read ++* ++* Output: None ++* Return: u4Byte Readback value ++* Note: This function is equal to "GetRFRegSetting" in PHY programming guide ++*/ ++u32 ++rtl8192c_PHY_QueryRFReg( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ++ ) ++{ ++ u32 Original_Value, Readback_Value, BitShift; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u8 RFWaitCounter = 0; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return 0; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), BitMask(%#lx)\n", RegAddr, eRFPath,BitMask)); ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ ++ BitShift = phy_CalculateBitShift(BitMask); ++ Readback_Value = (Original_Value & BitMask) >> BitShift; ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ //RTPRINT(FPHY, PHY_RFR, ("RFR-%d MASK=0x%lx Addr[0x%lx]=0x%lx\n", eRFPath, BitMask, RegAddr, Original_Value));//BitMask(%#lx),BitMask, ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_QueryRFReg(): RegAddr(%#lx), eRFPath(%#x), Original_Value(%#lx)\n", ++ // RegAddr, eRFPath, Original_Value)); ++ ++ return (Readback_Value); ++} ++ ++/** ++* Function: PHY_SetRFReg ++* ++* OverView: Write "Specific bits" to RF register (page 8~) ++* ++* Input: ++* PADAPTER Adapter, ++* RF90_RADIO_PATH_E eRFPath, //Radio path of A/B/C/D ++* u4Byte RegAddr, //The target address to be modified ++* u4Byte BitMask //The target bit position in the target address ++* //to be modified ++* u4Byte Data //The new register Data in the target bit position ++* //of the target address ++* ++* Output: None ++* Return: None ++* Note: This function is equal to "PutRFRegSetting" in PHY programming guide ++*/ ++VOID ++rtl8192c_PHY_SetRFReg( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ++ ) ++{ ++ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //u1Byte RFWaitCounter = 0; ++ u32 Original_Value, BitShift; ++ //_irqL irqL; ++ ++#if (DISABLE_BB_RF == 1) ++ return; ++#endif ++ ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("--->PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ //RTPRINT(FINIT, INIT_RF, ("PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformAcquireMutex(&pHalData->mxRFOperate); ++#else ++ //_enter_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ ++ // RF data is 12 bits only ++ if (BitMask != bRFRegOffsetMask) ++ { ++ Original_Value = phy_RFSerialRead(Adapter, eRFPath, RegAddr); ++ BitShift = phy_CalculateBitShift(BitMask); ++ Data = ((Original_Value & (~BitMask)) | (Data<< BitShift)); ++ } ++ ++ phy_RFSerialWrite(Adapter, eRFPath, RegAddr, Data); ++ ++ ++ ++#ifdef CONFIG_USB_HCI ++ //PlatformReleaseMutex(&pHalData->mxRFOperate); ++#else ++ //_exit_critical(&pHalData->rf_lock, &irqL); ++#endif ++ ++ //PHY_QueryRFReg(Adapter,eRFPath,RegAddr,BitMask); ++ //RT_TRACE(COMP_RF, DBG_TRACE, ("<---PHY_SetRFReg(): RegAddr(%#lx), BitMask(%#lx), Data(%#lx), eRFPath(%#x)\n", ++ // RegAddr, BitMask, Data, eRFPath)); ++ ++} ++ ++ ++// ++// 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. ++// ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigMACWithParaFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: The format of MACPHY_REG.txt is different from PHY and RF. ++ * [Register][Mask][Value] ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigMACWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigMACWithHeaderFile() ++ * ++ * Overview: This function read BB parameters from Header file we gen, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: The format of MACPHY_REG.txt is different from PHY and RF. ++ * [Register][Mask][Value] ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigMACWithHeaderFile( ++ IN PADAPTER Adapter ++) ++{ ++ u32 i = 0; ++ u32 ArrayLength = 0; ++ u32* ptrArray; ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //2008.11.06 Modified by tynli. ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read Rtl819XMACPHY_Array\n")); ++ ArrayLength = MAC_2T_ArrayLength; ++ ptrArray = Rtl819XMAC_Array; ++ ++#ifdef CONFIG_IOL_MAC ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) ++ return _FAIL; ++ ++ for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column ++ rtw_IOL_append_WB_cmd(xmit_frame, ptrArray[i], (u8)ptrArray[i+1]); ++ } ++ ++ return rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++#endif ++ { ++ for(i = 0 ;i < ArrayLength;i=i+2){ // Add by tynli for 2 column ++ rtw_write8(Adapter, ptrArray[i], (u8)ptrArray[i+1]); ++ } ++ } ++ ++ return _SUCCESS; ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_MACConfig8192C ++ * ++ * Overview: Condig MAC by header file or parameter file. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/12/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++int ++PHY_MACConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ s8 *pszMACRegFile; ++ s8 sz88CMACRegFile[] = RTL8188C_PHY_MACREG; ++ s8 sz92CMACRegFile[] = RTL8192C_PHY_MACREG; ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ if(isNormal) ++ { ++ if(is92C) ++ pszMACRegFile = sz92CMACRegFile; ++ else ++ pszMACRegFile = sz88CMACRegFile; ++ } ++ else ++ { ++ //pszMACRegFile = TestMacRegFile; ++ } ++ ++ // ++ // Config MAC ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigMACWithHeaderFile(Adapter); ++#else ++ ++ // Not make sure EEPROM, add later ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Read MACREG.txt\n")); ++ rtStatus = phy_ConfigMACWithParaFile(Adapter, pszMACRegFile); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ //this switching setting cause some 8192cu hw have redownload fw fail issue ++ //improve 2-stream TX EVM by Jenyu ++ if(isNormal && is92C) ++ rtw_write8(Adapter, REG_SPS0_CTRL+3,0x71); ++#endif ++ ++ ++ // 2010.07.13 AMPDU aggregation number 9 ++ //rtw_write16(Adapter, REG_MAX_AGGR_NUM, MAX_AGGR_NUM); ++ rtw_write8(Adapter, REG_MAX_AGGR_NUM, 0x0A); //By tynli. 2010.11.18. ++#ifdef CONFIG_USB_HCI ++ if(is92C && (BOARD_USB_DONGLE == pHalData->BoardType)) ++ rtw_write8(Adapter, 0x40,0x04); ++#endif ++ ++ return rtStatus; ++ ++} ++ ++ ++/** ++* Function: phy_InitBBRFRegisterDefinition ++* ++* OverView: Initialize Register definition offset for Radio Path A/B/C/D ++* ++* Input: ++* PADAPTER Adapter, ++* ++* Output: None ++* Return: None ++* Note: The initialization value is constant and it should never be changes ++*/ ++static VOID ++phy_InitBBRFRegisterDefinition( ++ IN PADAPTER Adapter ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // RF Interface Sowrtware Control ++ pHalData->PHYRegDef[RF90_PATH_A].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 LSBs if read 32-bit from 0x870 ++ pHalData->PHYRegDef[RF90_PATH_B].rfintfs = rFPGA0_XAB_RFInterfaceSW; // 16 MSBs if read 32-bit from 0x870 (16-bit for 0x872) ++ pHalData->PHYRegDef[RF90_PATH_C].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 LSBs if read 32-bit from 0x874 ++ pHalData->PHYRegDef[RF90_PATH_D].rfintfs = rFPGA0_XCD_RFInterfaceSW;// 16 MSBs if read 32-bit from 0x874 (16-bit for 0x876) ++ ++ // RF Interface Readback Value ++ pHalData->PHYRegDef[RF90_PATH_A].rfintfi = rFPGA0_XAB_RFInterfaceRB; // 16 LSBs if read 32-bit from 0x8E0 ++ pHalData->PHYRegDef[RF90_PATH_B].rfintfi = rFPGA0_XAB_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E0 (16-bit for 0x8E2) ++ pHalData->PHYRegDef[RF90_PATH_C].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 LSBs if read 32-bit from 0x8E4 ++ pHalData->PHYRegDef[RF90_PATH_D].rfintfi = rFPGA0_XCD_RFInterfaceRB;// 16 MSBs if read 32-bit from 0x8E4 (16-bit for 0x8E6) ++ ++ // RF Interface Output (and Enable) ++ pHalData->PHYRegDef[RF90_PATH_A].rfintfo = rFPGA0_XA_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x860 ++ pHalData->PHYRegDef[RF90_PATH_B].rfintfo = rFPGA0_XB_RFInterfaceOE; // 16 LSBs if read 32-bit from 0x864 ++ ++ // RF Interface (Output and) Enable ++ pHalData->PHYRegDef[RF90_PATH_A].rfintfe = rFPGA0_XA_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x860 (16-bit for 0x862) ++ pHalData->PHYRegDef[RF90_PATH_B].rfintfe = rFPGA0_XB_RFInterfaceOE; // 16 MSBs if read 32-bit from 0x864 (16-bit for 0x866) ++ ++ //Addr of LSSI. Wirte RF register by driver ++ pHalData->PHYRegDef[RF90_PATH_A].rf3wireOffset = rFPGA0_XA_LSSIParameter; //LSSI Parameter ++ pHalData->PHYRegDef[RF90_PATH_B].rf3wireOffset = rFPGA0_XB_LSSIParameter; ++ ++ // RF parameter ++ pHalData->PHYRegDef[RF90_PATH_A].rfLSSI_Select = rFPGA0_XAB_RFParameter; //BB Band Select ++ pHalData->PHYRegDef[RF90_PATH_B].rfLSSI_Select = rFPGA0_XAB_RFParameter; ++ pHalData->PHYRegDef[RF90_PATH_C].rfLSSI_Select = rFPGA0_XCD_RFParameter; ++ pHalData->PHYRegDef[RF90_PATH_D].rfLSSI_Select = rFPGA0_XCD_RFParameter; ++ ++ // Tx AGC Gain Stage (same for all path. Should we remove this?) ++ pHalData->PHYRegDef[RF90_PATH_A].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF90_PATH_B].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF90_PATH_C].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ pHalData->PHYRegDef[RF90_PATH_D].rfTxGainStage = rFPGA0_TxGainStage; //Tx gain stage ++ ++ // Tranceiver A~D HSSI Parameter-1 ++ pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara1 = rFPGA0_XA_HSSIParameter1; //wire control parameter1 ++ pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara1 = rFPGA0_XB_HSSIParameter1; //wire control parameter1 ++ ++ // Tranceiver A~D HSSI Parameter-2 ++ pHalData->PHYRegDef[RF90_PATH_A].rfHSSIPara2 = rFPGA0_XA_HSSIParameter2; //wire control parameter2 ++ pHalData->PHYRegDef[RF90_PATH_B].rfHSSIPara2 = rFPGA0_XB_HSSIParameter2; //wire control parameter2 ++ ++ // RF switch Control ++ pHalData->PHYRegDef[RF90_PATH_A].rfSwitchControl = rFPGA0_XAB_SwitchControl; //TR/Ant switch control ++ pHalData->PHYRegDef[RF90_PATH_B].rfSwitchControl = rFPGA0_XAB_SwitchControl; ++ pHalData->PHYRegDef[RF90_PATH_C].rfSwitchControl = rFPGA0_XCD_SwitchControl; ++ pHalData->PHYRegDef[RF90_PATH_D].rfSwitchControl = rFPGA0_XCD_SwitchControl; ++ ++ // AGC control 1 ++ pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl1 = rOFDM0_XAAGCCore1; ++ pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl1 = rOFDM0_XBAGCCore1; ++ pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl1 = rOFDM0_XCAGCCore1; ++ pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl1 = rOFDM0_XDAGCCore1; ++ ++ // AGC control 2 ++ pHalData->PHYRegDef[RF90_PATH_A].rfAGCControl2 = rOFDM0_XAAGCCore2; ++ pHalData->PHYRegDef[RF90_PATH_B].rfAGCControl2 = rOFDM0_XBAGCCore2; ++ pHalData->PHYRegDef[RF90_PATH_C].rfAGCControl2 = rOFDM0_XCAGCCore2; ++ pHalData->PHYRegDef[RF90_PATH_D].rfAGCControl2 = rOFDM0_XDAGCCore2; ++ ++ // RX AFE control 1 ++ pHalData->PHYRegDef[RF90_PATH_A].rfRxIQImbalance = rOFDM0_XARxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_B].rfRxIQImbalance = rOFDM0_XBRxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_C].rfRxIQImbalance = rOFDM0_XCRxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_D].rfRxIQImbalance = rOFDM0_XDRxIQImbalance; ++ ++ // RX AFE control 1 ++ pHalData->PHYRegDef[RF90_PATH_A].rfRxAFE = rOFDM0_XARxAFE; ++ pHalData->PHYRegDef[RF90_PATH_B].rfRxAFE = rOFDM0_XBRxAFE; ++ pHalData->PHYRegDef[RF90_PATH_C].rfRxAFE = rOFDM0_XCRxAFE; ++ pHalData->PHYRegDef[RF90_PATH_D].rfRxAFE = rOFDM0_XDRxAFE; ++ ++ // Tx AFE control 1 ++ pHalData->PHYRegDef[RF90_PATH_A].rfTxIQImbalance = rOFDM0_XATxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_B].rfTxIQImbalance = rOFDM0_XBTxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_C].rfTxIQImbalance = rOFDM0_XCTxIQImbalance; ++ pHalData->PHYRegDef[RF90_PATH_D].rfTxIQImbalance = rOFDM0_XDTxIQImbalance; ++ ++ // Tx AFE control 2 ++ pHalData->PHYRegDef[RF90_PATH_A].rfTxAFE = rOFDM0_XATxAFE; ++ pHalData->PHYRegDef[RF90_PATH_B].rfTxAFE = rOFDM0_XBTxAFE; ++ pHalData->PHYRegDef[RF90_PATH_C].rfTxAFE = rOFDM0_XCTxAFE; ++ pHalData->PHYRegDef[RF90_PATH_D].rfTxAFE = rOFDM0_XDTxAFE; ++ ++ // Tranceiver LSSI Readback SI mode ++ pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBack = rFPGA0_XA_LSSIReadBack; ++ pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack; ++ pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBack = rFPGA0_XC_LSSIReadBack; ++ pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBack = rFPGA0_XD_LSSIReadBack; ++ ++ // Tranceiver LSSI Readback PI mode ++ pHalData->PHYRegDef[RF90_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback; ++ pHalData->PHYRegDef[RF90_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback; ++ //pHalData->PHYRegDef[RF90_PATH_C].rfLSSIReadBackPi = rFPGA0_XC_LSSIReadBack; ++ //pHalData->PHYRegDef[RF90_PATH_D].rfLSSIReadBackPi = rFPGA0_XD_LSSIReadBack; ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithParaFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * 2008/11/06 MH For 92S we do not support silent reset now. Disable ++ * parameter file compare!!!!!!?? ++ * ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ return rtStatus; ++} ++ ++ ++ ++//**************************************** ++// The following is for High Power PA ++//**************************************** ++VOID ++phy_ConfigBBExternalPA( ++ IN PADAPTER Adapter ++) ++{ ++#ifdef CONFIG_USB_HCI ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 i=0; ++ u32 temp=0; ++ ++ if(!pHalData->ExternalPA) ++ { ++ return; ++ } ++ ++ // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the ++ // same code as SU. It is already updated in PHY_REG_1T_HP.txt. ++#if 0 ++ PHY_SetBBReg(Adapter, 0xee8, BIT28, 1); ++ temp = PHY_QueryBBReg(Adapter, 0x860, bMaskDWord); ++ temp |= (BIT26|BIT21|BIT10|BIT5); ++ PHY_SetBBReg(Adapter, 0x860, bMaskDWord, temp); ++ PHY_SetBBReg(Adapter, 0x870, BIT10, 0); ++ PHY_SetBBReg(Adapter, 0xc80, bMaskDWord, 0x20000080); ++ PHY_SetBBReg(Adapter, 0xc88, bMaskDWord, 0x40000100); ++#endif ++ ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithHeaderFile() ++ * ++ * Overview: This function read BB parameters from general file format, and do register ++ * Read/Write ++ * ++ * Input: PADAPTER Adapter ++ * u1Byte ConfigType 0 => PHY_CONFIG ++ * 1 =>AGC_TAB ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithHeaderFile( ++ IN PADAPTER Adapter, ++ IN u8 ConfigType ++) ++{ ++ int i; ++ u32* Rtl819XPHY_REGArray_Table; ++ u32* Rtl819XAGCTAB_Array_Table; ++ u16 PHY_REGArrayLen, AGCTAB_ArrayLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int ret = _SUCCESS; ++ ++ // ++ // 2009.11.24. Modified by tynli. ++ // ++ if(IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ AGCTAB_ArrayLen = AGCTAB_2TArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_2TArray; ++ PHY_REGArrayLen = PHY_REG_2TArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2TArray; ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayLen = PHY_REG_2T_mCardArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_2T_mCardArray; ++ } ++#endif ++ } ++ else ++ { ++ DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ else ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ AGCTAB_ArrayLen = AGCTAB_1TArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1TArray; ++ PHY_REGArrayLen = PHY_REG_1TArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1TArray; ++#ifdef CONFIG_USB_HCI ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayLen = PHY_REG_1T_mCardArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_mCardArray; ++ } ++ else if(pHalData->BoardType == BOARD_USB_High_PA) ++ { ++ AGCTAB_ArrayLen = AGCTAB_1T_HPArrayLength; ++ Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_1T_HPArray; ++ PHY_REGArrayLen = PHY_REG_1T_HPArrayLength; ++ Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T_HPArray; ++ } ++#endif ++ } ++ else ++ { ++ DBG_8192C(" ===> phy_ConfigBBWithHeaderFile(): do not support test chip\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ #ifdef CONFIG_IOL_BB_PHY_REG ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ u32 tmp_value; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ for(i=0;iMCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][0] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][0])); ++ } ++ if(RegAddr == rTxAGC_A_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][1] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][1])); ++ } ++ if(RegAddr == rTxAGC_A_CCK1_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][6] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][6])); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0xffffff00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][7] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][7])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][2] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][2])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][3] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][3])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][4] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][4])); ++ } ++ if(RegAddr == rTxAGC_A_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][5] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][5])); ++ } ++ if(RegAddr == rTxAGC_B_Rate18_06) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][8] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][8])); ++ } ++ if(RegAddr == rTxAGC_B_Rate54_24) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][9] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][9])); ++ } ++ if(RegAddr == rTxAGC_B_CCK1_55_Mcs32) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][14] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][14])); ++ } ++ if(RegAddr == rTxAGC_B_CCK11_A_CCK2_11 && BitMask == 0x000000ff) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][15] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][15])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs03_Mcs00) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][10] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][10])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs07_Mcs04) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][11] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][11])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs11_Mcs08) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][12] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][12])); ++ } ++ if(RegAddr == rTxAGC_B_Mcs15_Mcs12) ++ { ++ pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13] = Data; ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("MCSTxPowerLevelOriginalOffset[%d][13] = 0x%lx\n", pHalData->pwrGroupCnt, ++ // pHalData->MCSTxPowerLevelOriginalOffset[pHalData->pwrGroupCnt][13])); ++ pHalData->pwrGroupCnt++; ++ } ++} ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithPgParaFile ++ * ++ * Overview: ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/06/2008 MHC Create Version 0. ++ * 2009/07/29 tynli (porting from 92SE branch)2009/03/11 Add copy parameter file to buffer for silent reset ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithPgParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ ++ return rtStatus; ++ ++} /* phy_ConfigBBWithPgParaFile */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithPgHeaderFile ++ * ++ * Overview: Config PHY_REG_PG array ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/06/2008 MHC Add later!!!!!!.. Please modify for new files!!!! ++ * 11/10/2008 tynli Modify to mew files. ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithPgHeaderFile( ++ IN PADAPTER Adapter, ++ IN u8 ConfigType) ++{ ++ int i; ++ u32* Rtl819XPHY_REGArray_Table_PG; ++ u16 PHY_REGArrayPGLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Default: pHalData->RF_Type = RF_2T2R. ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ PHY_REGArrayPGLen = PHY_REG_Array_PGLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG; ++ ++#ifdef CONFIG_USB_HCI ++// 2010/10/19 Chiyoko According to Alex/Willson opinion, VAU/dongle can share the same PHY_REG_PG.txt ++/* ++ if(pHalData->BoardType == BOARD_MINICARD ) ++ { ++ PHY_REGArrayPGLen = PHY_REG_Array_PG_mCardLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_mCard; ++ } ++ else */if(pHalData->BoardType ==BOARD_USB_High_PA ) ++ { ++ PHY_REGArrayPGLen = PHY_REG_Array_PG_HPLength; ++ Rtl819XPHY_REGArray_Table_PG = Rtl819XPHY_REG_Array_PG_HP; ++ } ++#endif ++ } ++ else ++ { ++ DBG_8192C(" ===> phy_ConfigBBWithPgHeaderFile(): do not support test chip\n"); ++ return _FAIL; ++ } ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ for(i=0;iBufOfLines), ++ MAX_LINES_HWCONFIG_TXT, ++ MAX_BYTES_LINE_HWCONFIG_TXT, ++ &nLinesRead ++ ); ++ if(rtStatus == RT_STATUS_SUCCESS) ++ { ++ PlatformMoveMemory(pHalData->BufOfLines6, pHalData->BufOfLines, nLinesRead*MAX_BYTES_LINE_HWCONFIG_TXT); ++ pHalData->nLinesRead6 = nLinesRead; ++ } ++ else ++ { ++ // Temporarily skip PHY_REG_MP.txt if file does not exist. ++ pHalData->nLinesRead6 = 0; ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("No matched file \r\n")); ++ return RT_STATUS_SUCCESS; ++ } ++ } ++ else ++ { ++ PlatformMoveMemory(pHalData->BufOfLines, pHalData->BufOfLines6, MAX_LINES_HWCONFIG_TXT*MAX_BYTES_LINE_HWCONFIG_TXT); ++ nLinesRead = pHalData->nLinesRead6; ++ rtStatus = RT_STATUS_SUCCESS; ++ } ++ ++ ++ if(rtStatus == RT_STATUS_SUCCESS) ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): read %s ok\n", pFileName)); ++ ++ for(ithLine = 0; ithLine < nLinesRead; ithLine++) ++ { ++ szLine = pHalData->BufOfLines[ithLine]; ++ ++ if(!IsCommentString(szLine)) ++ { ++ // Get 1st hex value as register offset. ++ if(GetHexValueFromString(szLine, &u4bRegOffset, &u4bMove)) ++ { ++ if(u4bRegOffset == 0xff) ++ { // Ending. ++ break; ++ } ++ else if (u4bRegOffset == 0xfe) ++ delay_ms(50); ++ else if (u4bRegOffset == 0xfd) ++ delay_ms(5); ++ else if (u4bRegOffset == 0xfc) ++ delay_ms(1); ++ else if (u4bRegOffset == 0xfb) ++ PlatformStallExecution(50); ++ else if (u4bRegOffset == 0xfa) ++ PlatformStallExecution(5); ++ else if (u4bRegOffset == 0xf9) ++ PlatformStallExecution(1); ++ ++ // Get 2nd hex value as register value. ++ szLine += u4bMove; ++ if(GetHexValueFromString(szLine, &u4bRegValue, &u4bMove)) ++ { ++ RT_TRACE(COMP_FPGA, DBG_TRACE, ("[ADDR]%03lX=%08lX\n", u4bRegOffset, u4bRegValue)); ++ PHY_SetBBReg(Adapter, u4bRegOffset, bMaskDWord, u4bRegValue); ++ ++ // Add 1us delay between BB/RF register setting. ++ PlatformStallExecution(1); ++ } ++ } ++ } ++ } ++ } ++ else ++ { ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_ConfigBBWithMpParaFile(): Failed%s\n", pFileName)); ++ } ++#endif ++ ++ return rtStatus; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: phy_ConfigBBWithMpHeaderFile ++ * ++ * Overview: Config PHY_REG_MP array ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 02/04/2010 chiyokolin Modify to new files. ++ *---------------------------------------------------------------------------*/ ++static int ++phy_ConfigBBWithMpHeaderFile( ++ IN PADAPTER Adapter, ++ IN u1Byte ConfigType) ++{ ++ int i; ++ u32* Rtl8192CPHY_REGArray_Table_MP; ++ u16 PHY_REGArrayMPLen; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ PHY_REGArrayMPLen = PHY_REG_Array_MPLength; ++ Rtl8192CPHY_REGArray_Table_MP = Rtl819XPHY_REG_Array_MP; ++ ++ if(ConfigType == BaseBand_Config_PHY_REG) ++ { ++ for(i=0;iphy_BB8192S_Config_ParaFile\n")); ++ ++ if(IS_92C_SERIAL(pHalData->VersionID)){ ++ pszBBRegFile=(u8*)&sz92CBBRegFile ; ++ pszAGCTableFile =(u8*)&sz92CAGCTableFile; ++ } ++ else{ ++ pszBBRegFile=(u8*)&sz88CBBRegFile ; ++ pszAGCTableFile =(u8*)&sz88CAGCTableFile; ++ } ++ ++ // ++ // 1. Read PHY_REG.TXT BB INIT!! ++ // We will seperate as 88C / 92C according to chip version ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different ++ // type of parameter files to phy_reg.txt at first. ++ rtStatus = phy_ConfigBBWithParaFile(Adapter,pszBBRegFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++#if MP_DRIVER == 1 ++ // ++ // 1.1 Read PHY_REG_MP.TXT BB INIT!! ++ // We will seperate as 88C / 92C according to chip version ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithMpHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ // No matter what kind of CHIP we always read PHY_REG.txt. We must copy different ++ // type of parameter files to phy_reg.txt at first. ++ rtStatus = phy_ConfigBBWithMpParaFile(Adapter, pszBBRegMpFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++// RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():Write BB Reg MP Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++#endif // #if (MP_DRIVER == 1) ++ ++ // ++ // 20100318 Joseph: Config 2T2R to 1T2R if necessary. ++ // ++ if(pHalData->rf_type == RF_1T2R) ++ { ++ phy_BB8192C_Config_1T(Adapter); ++ DBG_8192C("phy_BB8192C_Config_ParaFile():Config to 1T!!\n"); ++ } ++ ++ // ++ // 2. If EEPROM or EFUSE autoload OK, We must config by PHY_REG_PG.txt ++ // ++ if (pEEPROM->bautoload_fail_flag == _FALSE) ++ { ++ pHalData->pwrGroupCnt = 0; ++ ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithPgHeaderFile(Adapter, BaseBand_Config_PHY_REG); ++#else ++ rtStatus = phy_ConfigBBWithPgParaFile(Adapter, (u8*)&szBBRegPgFile); ++#endif ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():BB_PG Reg Fail!!")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++ // ++ // 3. BB AGC table Initialization ++ // ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = phy_ConfigBBWithHeaderFile(Adapter, BaseBand_Config_AGC_TAB); ++#else ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("phy_BB8192S_Config_ParaFile AGC_TAB.txt\n")); ++ rtStatus = phy_ConfigBBWithParaFile(Adapter, pszAGCTableFile); ++#endif ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_SERIOUS, ("phy_BB8192S_Config_ParaFile():AGC Table Fail\n")); ++ goto phy_BB8190_Config_ParaFile_Fail; ++ } ++ ++ // Check if the CCK HighPower is turned ON. ++ // This is used to calculate PWDB. ++ pHalData->bCckHighPower = (BOOLEAN)(PHY_QueryBBReg(Adapter, rFPGA0_XA_HSSIParameter2, 0x200)); ++ ++phy_BB8190_Config_ParaFile_Fail: ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_BBConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 RegVal; ++ u8 TmpU1B=0; ++ u8 value8; ++ ++ phy_InitBBRFRegisterDefinition(Adapter); ++ ++ if(IS_HARDWARE_TYPE_8723(Adapter)) ++ { ++ // Suggested by Scott. tynli_test. 2010.12.30. ++ //1. 0x28[1] = 1 ++ TmpU1B = rtw_read8(Adapter, REG_AFE_PLL_CTRL); ++ rtw_udelay_os(2); ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, (TmpU1B|BIT1)); ++ rtw_udelay_os(2); ++ ++ //2. 0x29[7:0] = 0xFF ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xff); ++ rtw_udelay_os(2); ++ ++ //3. 0x02[1:0] = 2b'11 ++ TmpU1B = rtw_read8(Adapter, REG_SYS_FUNC_EN); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, (TmpU1B|FEN_BB_GLB_RSTn|FEN_BBRSTB)); ++ ++ //4. 0x25[6] = 0 ++ TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+1); ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, (TmpU1B&(~BIT6))); ++ ++ //5. 0x24[20] = 0 //Advised by SD3 Alex Wang. 2011.02.09. ++ TmpU1B = rtw_read8(Adapter, REG_AFE_XTAL_CTRL+2); ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+2, (TmpU1B&(~BIT4))); ++ ++ //6. 0x1f[7:0] = 0x07 ++ rtw_write8(Adapter, REG_RF_CTRL, 0x07); ++ } ++ else ++ { ++ // Enable BB and RF ++ RegVal = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (u16)(RegVal|BIT13|BIT0|BIT1)); ++ ++ // 20090923 Joseph: Advised by Steven and Jenyu. Power sequence before init RF. ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x83); ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL+1, 0xdb); ++ ++ rtw_write8(Adapter, REG_RF_CTRL, RF_EN|RF_RSTB|RF_SDMRSTB); ++ ++#ifdef CONFIG_USB_HCI ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_USBA | FEN_USBD | FEN_BB_GLB_RSTn | FEN_BBRSTB); ++#else ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, FEN_PPLL|FEN_PCIEA|FEN_DIO_PCIE|FEN_BB_GLB_RSTn|FEN_BBRSTB); ++#endif ++ ++ // 2009/10/21 by SD1 Jong. Modified by tynli. Not in Documented in V8.1. ++ if(!IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++#ifdef CONFIG_USB_HCI ++ rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1f); ++#else ++ rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x1b); ++#endif ++ } ++ else ++ { ++#ifdef CONFIG_USB_HCI ++ //To Fix MAC loopback mode fail. Suggested by SD4 Johnny. 2010.03.23. ++ rtw_write8(Adapter, REG_LDOHCI12_CTRL, 0x0f); ++ rtw_write8(Adapter, 0x15, 0xe9); ++#endif ++ } ++ ++ rtw_write8(Adapter, REG_AFE_XTAL_CTRL+1, 0x80); ++ ++#ifdef CONFIG_PCI_HCI ++ // Force use left antenna by default for 88C. ++ // if(!IS_92C_SERIAL(pHalData->VersionID) || IS_92C_1T2R(pHalData->VersionID)) ++ if(Adapter->ledpriv.LedStrategy != SW_LED_MODE10) ++ { ++ RegVal = rtw_read32(Adapter, REG_LEDCFG0); ++ rtw_write32(Adapter, REG_LEDCFG0, RegVal|BIT23); ++ } ++#endif ++ } ++ ++ // ++ // Config BB and AGC ++ // ++ rtStatus = phy_BB8192C_Config_ParaFile(Adapter); ++#if 0 ++ switch(Adapter->MgntInfo.bRegHwParaFile) ++ { ++ case 0: ++ phy_BB8190_Config_HardCode(Adapter); ++ break; ++ ++ case 1: ++ rtStatus = phy_BB8192C_Config_ParaFile(Adapter); ++ break; ++ ++ case 2: ++ // Partial Modify. ++ phy_BB8190_Config_HardCode(Adapter); ++ phy_BB8192C_Config_ParaFile(Adapter); ++ break; ++ ++ default: ++ phy_BB8190_Config_HardCode(Adapter); ++ break; ++ } ++#endif ++#ifdef CONFIG_USB_HCI ++ if(IS_HARDWARE_TYPE_8192CU(Adapter)&&IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) ++ &&(pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write8(Adapter, 0xc72, 0x50); ++#endif ++ ++ // For fix 8723 WL_TRSW bug. Suggested by Scott. 2011.01.24. ++ if(IS_HARDWARE_TYPE_8723(Adapter)) ++ { ++ if(!IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ // 1. 0x40[2] = 1 ++ value8 = rtw_read8(Adapter, REG_GPIO_MUXCFG); ++ rtw_write8(Adapter, REG_GPIO_MUXCFG, (value8|BIT2)); ++ ++ // 2. 0x804[14] = 0 // BB disable TRSW control, enable SW control ++ PHY_SetBBReg(Adapter, rFPGA0_TxInfo, BIT14, 0x0); ++ ++ // 3. 0x870[6:5] = 2'b11 ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFInterfaceSW, (BIT5|BIT6), 0x3); ++ ++ // 4. 0x860[6:5] = 2'b00 // BB SW control TRSW pin output level ++ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, (BIT5|BIT6), 0x0); ++ } ++ } ++#if 0 ++ // Check BB/RF confiuration setting. ++ // We only need to configure RF which is turned on. ++ PathMap = (u1Byte)(PHY_QueryBBReg(Adapter, rFPGA0_TxInfo, 0xf) | ++ PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf)); ++ pHalData->RF_PathMap = PathMap; ++ for(index = 0; index<4; index++) ++ { ++ if((PathMap>>index)&0x1) ++ rf_num++; ++ } ++ ++ if((GET_RF_TYPE(Adapter) ==RF_1T1R && rf_num!=1) || ++ (GET_RF_TYPE(Adapter)==RF_1T2R && rf_num!=2) || ++ (GET_RF_TYPE(Adapter)==RF_2T2R && rf_num!=2) || ++ (GET_RF_TYPE(Adapter)==RF_2T2R_GREEN && rf_num!=2) || ++ (GET_RF_TYPE(Adapter)==RF_2T4R && rf_num!=4)) ++ { ++ RT_TRACE( ++ COMP_INIT, ++ DBG_LOUD, ++ ("PHY_BBConfig8192C: RF_Type(%x) does not match RF_Num(%x)!!\n", pHalData->RF_Type, rf_num)); ++ } ++#endif ++ ++ return rtStatus; ++} ++ ++ ++int ++PHY_RFConfig8192C( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // RF config ++ // ++ rtStatus = PHY_RF6052_Config8192C(Adapter); ++#if 0 ++ switch(pHalData->rf_chip) ++ { ++ case RF_6052: ++ rtStatus = PHY_RF6052_Config(Adapter); ++ break; ++ case RF_8225: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ case RF_8256: ++ rtStatus = PHY_RF8256_Config(Adapter); ++ break; ++ case RF_8258: ++ break; ++ case RF_PSEUDO_11N: ++ rtStatus = PHY_RF8225_Config(Adapter); ++ break; ++ default: //for MacOs Warning: "RF_TYPE_MIN" not handled in switch ++ break; ++ } ++#endif ++ return rtStatus; ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_ConfigRFWithParaFile() ++ * ++ * Overview: This function read RF parameters from general file format, and do RF 3-wire ++ * ++ * Input: PADAPTER Adapter ++ * ps1Byte pFileName ++ * RF90_RADIO_PATH_E eRFPath ++ * ++ * Output: NONE ++ * ++ * Return: RT_STATUS_SUCCESS: configuration file exist ++ * ++ * Note: Delay may be required for RF configuration ++ *---------------------------------------------------------------------------*/ ++int ++rtl8192c_PHY_ConfigRFWithParaFile( ++ IN PADAPTER Adapter, ++ IN u8* pFileName, ++ RF90_RADIO_PATH_E eRFPath ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ int rtStatus = _SUCCESS; ++ ++ ++ return rtStatus; ++ ++} ++ ++//**************************************** ++// The following is for High Power PA ++//**************************************** ++#define HighPowerRadioAArrayLen 22 ++//This is for High power PA ++u32 Rtl8192S_HighPower_RadioA_Array[HighPowerRadioAArrayLen] = { ++0x013,0x00029ea4, ++0x013,0x00025e74, ++0x013,0x00020ea4, ++0x013,0x0001ced0, ++0x013,0x00019f40, ++0x013,0x00014e70, ++0x013,0x000106a0, ++0x013,0x0000c670, ++0x013,0x000082a0, ++0x013,0x00004270, ++0x013,0x00000240, ++}; ++ ++int ++PHY_ConfigRFExternalPA( ++ IN PADAPTER Adapter, ++ RF90_RADIO_PATH_E eRFPath ++) ++{ ++ int rtStatus = _SUCCESS; ++#ifdef CONFIG_USB_HCI ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 i=0; ++ ++ if(!pHalData->ExternalPA) ++ { ++ return rtStatus; ++ } ++ ++ // 2010/10/19 MH According to Jenyu/EEChou 's opinion, we need not to execute the ++ // same code as SU. It is already updated in radio_a_1T_HP.txt. ++#if 0 ++ //add for SU High Power PA ++ for(i = 0;iVersionID)) ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ RadioA_ArrayLen = RadioA_2TArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_2TArray; ++ RadioB_ArrayLen = RadioB_2TArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_2TArray; ++ } ++ else ++ { ++ rtStatus = _FAIL; ++ goto exit; ++ } ++ } ++ else ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ RadioA_ArrayLen = RadioA_1TArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1TArray; ++ RadioB_ArrayLen = RadioB_1TArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_1TArray; ++#ifdef CONFIG_USB_HCI ++ if( BOARD_MINICARD == pHalData->BoardType ) ++ { ++ RadioA_ArrayLen = RadioA_1T_mCardArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_mCardArray; ++ RadioB_ArrayLen = RadioB_1T_mCardArrayLength; ++ Rtl819XRadioB_Array_Table = Rtl819XRadioB_1T_mCardArray; ++ } ++ else if( BOARD_USB_High_PA == pHalData->BoardType ) ++ { ++ RadioA_ArrayLen = RadioA_1T_HPArrayLength; ++ Rtl819XRadioA_Array_Table = Rtl819XRadioA_1T_HPArray; ++ } ++#endif ++ } ++ else ++ { ++ rtStatus = _FAIL; ++ goto exit; ++ } ++ } ++ ++ switch(eRFPath){ ++ case RF90_PATH_A: ++ #ifdef CONFIG_IOL_RF_RF90_PATH_A ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) { ++ rtStatus = _FAIL; ++ goto exit; ++ } ++ ++ for(i = 0;iPHYRegDef[eRFPath]; ++ u32 NewOffset = 0; ++ u32 DataAndAddr = 0; ++ ++ NewOffset = Rtl819XRadioA_Array_Table[i] & 0x3f; ++ DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioA_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF ++ rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); ++ } ++ } ++ rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++ #endif ++ { ++ for(i = 0;iPHYRegDef[eRFPath]; ++ u32 NewOffset = 0; ++ u32 DataAndAddr = 0; ++ ++ NewOffset = Rtl819XRadioB_Array_Table[i] & 0x3f; ++ DataAndAddr = ((NewOffset<<20) | (Rtl819XRadioB_Array_Table[i+1]&0x000fffff)) & 0x0fffffff; // T65 RF ++ rtw_IOL_append_WD_cmd(xmit_frame, pPhyReg->rf3wireOffset, DataAndAddr); ++ } ++ } ++ rtStatus = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++ #endif ++ { ++ for(i = 0;i actually we call PlatformStallExecution()) to do NdisStallExecution() ++ // [busy wait] instead of NdisMSleep(). So we acquire RT_INITIAL_SPINLOCK ++ // to run at Dispatch level to achive it. ++ //cosa PlatformAcquireSpinLock(Adapter, RT_INITIAL_SPINLOCK); ++ WriteData[i] &= 0xfff; ++ PHY_SetRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]); ++ // TODO: we should not delay for such a long time. Ask SD3 ++ rtw_mdelay_os(10); ++ ulRegRead = PHY_QueryRFReg(Adapter, eRFPath, WriteAddr[HW90_BLOCK_RF], bMaskDWord); ++ rtw_mdelay_os(10); ++ //cosa PlatformReleaseSpinLock(Adapter, RT_INITIAL_SPINLOCK); ++ break; ++ ++ default: ++ rtStatus = _FAIL; ++ break; ++ } ++ ++ ++ // ++ // Check whether readback data is correct ++ // ++ if(ulRegRead != WriteData[i]) ++ { ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("ulRegRead: %lx, WriteData: %lx \n", ulRegRead, WriteData[i])); ++ rtStatus = _FAIL; ++ break; ++ } ++ } ++ ++ return rtStatus; ++} ++ ++ ++VOID ++rtl8192c_PHY_GetHWRegOriginalValue( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // read rx initial gain ++ pHalData->DefaultInitialGain[0] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XAAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[1] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XBAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[2] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XCAGCCore1, bMaskByte0); ++ pHalData->DefaultInitialGain[3] = (u8)PHY_QueryBBReg(Adapter, rOFDM0_XDAGCCore1, bMaskByte0); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x) \n", ++ //pHalData->DefaultInitialGain[0], pHalData->DefaultInitialGain[1], ++ //pHalData->DefaultInitialGain[2], pHalData->DefaultInitialGain[3])); ++ ++ // read framesync ++ pHalData->framesync = (u8)PHY_QueryBBReg(Adapter, rOFDM0_RxDetector3, bMaskByte0); ++ pHalData->framesyncC34 = PHY_QueryBBReg(Adapter, rOFDM0_RxDetector2, bMaskDWord); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Default framesync (0x%x) = 0x%x \n", ++ // rOFDM0_RxDetector3, pHalData->framesync)); ++} ++ ++ ++// ++// Description: ++// Map dBm into Tx power index according to ++// current HW model, for example, RF and PA, and ++// current wireless mode. ++// By Bruce, 2008-01-29. ++// ++static u8 ++phy_DbmToTxPwrIdx( ++ IN PADAPTER Adapter, ++ IN WIRELESS_MODE WirelessMode, ++ IN int PowerInDbm ++ ) ++{ ++ u8 TxPwrIdx = 0; ++ int Offset = 0; ++ ++ ++ // ++ // Tested by MP, we found that CCK Index 0 equals to 8dbm, OFDM legacy equals to ++ // 3dbm, and OFDM HT equals to 0dbm repectively. ++ // Note: ++ // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. ++ // By Bruce, 2008-01-29. ++ // ++ switch(WirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ Offset = -7; ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ Offset = -8; ++ break; ++ default: ++ Offset = -8; ++ break; ++ } ++ ++ if((PowerInDbm - Offset) > 0) ++ { ++ TxPwrIdx = (u8)((PowerInDbm - Offset) * 2); ++ } ++ else ++ { ++ TxPwrIdx = 0; ++ } ++ ++ // Tx Power Index is too large. ++ if(TxPwrIdx > MAX_TXPWR_IDX_NMODE_92S) ++ TxPwrIdx = MAX_TXPWR_IDX_NMODE_92S; ++ ++ return TxPwrIdx; ++} ++ ++// ++// Description: ++// Map Tx power index into dBm according to ++// current HW model, for example, RF and PA, and ++// current wireless mode. ++// By Bruce, 2008-01-29. ++// ++int ++phy_TxPwrIdxToDbm( ++ IN PADAPTER Adapter, ++ IN WIRELESS_MODE WirelessMode, ++ IN u8 TxPwrIdx ++ ) ++{ ++ int Offset = 0; ++ int PwrOutDbm = 0; ++ ++ // ++ // Tested by MP, we found that CCK Index 0 equals to -7dbm, OFDM legacy equals to -8dbm. ++ // Note: ++ // The mapping may be different by different NICs. Do not use this formula for what needs accurate result. ++ // By Bruce, 2008-01-29. ++ // ++ switch(WirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ Offset = -7; ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ Offset = -8; ++ default: ++ Offset = -8; ++ break; ++ } ++ ++ PwrOutDbm = TxPwrIdx / 2 + Offset; // Discard the decimal part. ++ ++ return PwrOutDbm; ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: GetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "common" moudule ++ * ++ * Input: PADAPTER Adapter ++ * psByte Power Level ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_GetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ OUT u32* powerlevel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 TxPwrLevel = 0; ++ int TxPwrDbm; ++ ++ // ++ // Because the Tx power indexes are different, we report the maximum of them to ++ // meet the CCX TPC request. By Bruce, 2008-01-31. ++ // ++ ++ // CCK ++ TxPwrLevel = pHalData->CurrentCckTxPwrIdx; ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_B, TxPwrLevel); ++ ++ // Legacy OFDM ++ TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx + pHalData->LegacyHTTxPowerDiff; ++ ++ // Compare with Legacy OFDM Tx power. ++ if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel) > TxPwrDbm) ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_G, TxPwrLevel); ++ ++ // HT OFDM ++ TxPwrLevel = pHalData->CurrentOfdm24GTxPwrIdx; ++ ++ // Compare with HT OFDM Tx power. ++ if(phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel) > TxPwrDbm) ++ TxPwrDbm = phy_TxPwrIdxToDbm(Adapter, WIRELESS_MODE_N_24G, TxPwrLevel); ++ ++ *powerlevel = TxPwrDbm; ++} ++ ++ ++static void getTxPowerIndex( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN OUT u8* cckPowerLevel, ++ IN OUT u8* ofdmPowerLevel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 index = (channel -1); ++ // 1. CCK ++ cckPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelCck[RF90_PATH_A][index]; //RF-A ++ cckPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelCck[RF90_PATH_B][index]; //RF-B ++ ++ // 2. OFDM for 1S or 2S ++ if (GET_RF_TYPE(Adapter) == RF_1T2R || GET_RF_TYPE(Adapter) == RF_1T1R) ++ { ++ // Read HT 40 OFDM TX power ++ ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_A][index]; ++ ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_1S[RF90_PATH_B][index]; ++ } ++ else if (GET_RF_TYPE(Adapter) == RF_2T2R) ++ { ++ // Read HT 40 OFDM TX power ++ ofdmPowerLevel[RF90_PATH_A] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_A][index]; ++ ofdmPowerLevel[RF90_PATH_B] = pHalData->TxPwrLevelHT40_2S[RF90_PATH_B][index]; ++ } ++ //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, set tx power index !!\n", channel)); ++} ++ ++static void ccxPowerIndexCheck( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN OUT u8* cckPowerLevel, ++ IN OUT u8* ofdmPowerLevel ++ ) ++{ ++#if 0 ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PRT_CCX_INFO pCcxInfo = GET_CCX_INFO(pMgntInfo); ++ ++ // ++ // CCX 2 S31, AP control of client transmit power: ++ // 1. We shall not exceed Cell Power Limit as possible as we can. ++ // 2. Tolerance is +/- 5dB. ++ // 3. 802.11h Power Contraint takes higher precedence over CCX Cell Power Limit. ++ // ++ // TODO: ++ // 1. 802.11h power contraint ++ // ++ // 071011, by rcnjko. ++ // ++ if( pMgntInfo->OpMode == RT_OP_MODE_INFRASTRUCTURE && ++ pMgntInfo->mAssoc && ++ pCcxInfo->bUpdateCcxPwr && ++ pCcxInfo->bWithCcxCellPwr && ++ channel == pMgntInfo->dot11CurrentChannelNumber) ++ { ++ u1Byte CckCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, pCcxInfo->CcxCellPwr); ++ u1Byte LegacyOfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_G, pCcxInfo->CcxCellPwr); ++ u1Byte OfdmCellPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, pCcxInfo->CcxCellPwr); ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("CCX Cell Limit: %d dbm => CCK Tx power index : %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", ++ pCcxInfo->CcxCellPwr, CckCellPwrIdx, LegacyOfdmCellPwrIdx, OfdmCellPwrIdx)); ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("EEPROM channel(%d) => CCK Tx power index: %d, Legacy OFDM Tx power index : %d, OFDM Tx power index: %d\n", ++ channel, cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++ ++ // CCK ++ if(cckPowerLevel[0] > CckCellPwrIdx) ++ cckPowerLevel[0] = CckCellPwrIdx; ++ // Legacy OFDM, HT OFDM ++ if(ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff > LegacyOfdmCellPwrIdx) ++ { ++ if((OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff) > 0) ++ { ++ ofdmPowerLevel[0] = OfdmCellPwrIdx - pHalData->LegacyHTTxPowerDiff; ++ } ++ else ++ { ++ ofdmPowerLevel[0] = 0; ++ } ++ } ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("Altered CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", ++ cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++ } ++ ++ pHalData->CurrentCckTxPwrIdx = cckPowerLevel[0]; ++ pHalData->CurrentOfdm24GTxPwrIdx = ofdmPowerLevel[0]; ++ ++ RT_TRACE(COMP_TXAGC, DBG_LOUD, ++ ("PHY_SetTxPowerLevel8192S(): CCK Tx power index : %d, Legacy OFDM Tx power index: %d, OFDM Tx power index: %d\n", ++ cckPowerLevel[0], ofdmPowerLevel[0] + pHalData->LegacyHTTxPowerDiff, ofdmPowerLevel[0])); ++#endif ++} ++/*----------------------------------------------------------------------------- ++ * Function: SetTxPowerLevel8190() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * We must consider RF path later!!!!!!! ++ * ++ * Input: PADAPTER Adapter ++ * u1Byte channel ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * 2008/11/04 MHC We remove EEPROM_93C56. ++ * We need to move CCX relative code to independet file. ++ * 2009/01/21 MHC Support new EEPROM format from SD3 requirement. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetTxPowerLevel8192C( ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 cckPowerLevel[2], ofdmPowerLevel[2]; // [0]:RF-A, [1]:RF-B ++ ++#if(MP_DRIVER == 1) ++ return; ++#endif ++ ++ if(pHalData->bTXPowerDataReadFromEEPORM == _FALSE) ++ return; ++ ++ getTxPowerIndex(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Channel-%d, cckPowerLevel (A / B) = 0x%x / 0x%x, ofdmPowerLevel (A / B) = 0x%x / 0x%x\n", ++ // channel, cckPowerLevel[0], cckPowerLevel[1], ofdmPowerLevel[0], ofdmPowerLevel[1])); ++ ++ ccxPowerIndexCheck(Adapter, channel, &cckPowerLevel[0], &ofdmPowerLevel[0]); ++ ++ rtl8192c_PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); ++ rtl8192c_PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); ++ ++#if 0 ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ PHY_SetRF8225CckTxPower(Adapter, cckPowerLevel[0]); ++ PHY_SetRF8225OfdmTxPower(Adapter, ofdmPowerLevel[0]); ++ break; ++ ++ case RF_8256: ++ PHY_SetRF8256CCKTxPower(Adapter, cckPowerLevel[0]); ++ PHY_SetRF8256OFDMTxPower(Adapter, ofdmPowerLevel[0]); ++ break; ++ ++ case RF_6052: ++ PHY_RF6052SetCckTxPower(Adapter, &cckPowerLevel[0]); ++ PHY_RF6052SetOFDMTxPower(Adapter, &ofdmPowerLevel[0], channel); ++ break; ++ ++ case RF_8258: ++ break; ++ } ++#endif ++ ++} ++ ++ ++// ++// Description: ++// Update transmit power level of all channel supported. ++// ++// TODO: ++// A mode. ++// By Bruce, 2008-02-04. ++// ++BOOLEAN ++PHY_UpdateTxPowerDbm8192C( ++ IN PADAPTER Adapter, ++ IN int powerInDbm ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 idx; ++ u8 rf_path; ++ ++ // TODO: A mode Tx power. ++ u8 CckTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_B, powerInDbm); ++ u8 OfdmTxPwrIdx = phy_DbmToTxPwrIdx(Adapter, WIRELESS_MODE_N_24G, powerInDbm); ++ ++ if(OfdmTxPwrIdx - pHalData->LegacyHTTxPowerDiff > 0) ++ OfdmTxPwrIdx -= pHalData->LegacyHTTxPowerDiff; ++ else ++ OfdmTxPwrIdx = 0; ++ ++ //RT_TRACE(COMP_TXAGC, DBG_LOUD, ("PHY_UpdateTxPowerDbm8192S(): %ld dBm , CckTxPwrIdx = %d, OfdmTxPwrIdx = %d\n", powerInDbm, CckTxPwrIdx, OfdmTxPwrIdx)); ++ ++ for(idx = 0; idx < 14; idx++) ++ { ++ for (rf_path = 0; rf_path < 2; rf_path++) ++ { ++ pHalData->TxPwrLevelCck[rf_path][idx] = CckTxPwrIdx; ++ pHalData->TxPwrLevelHT40_1S[rf_path][idx] = ++ pHalData->TxPwrLevelHT40_2S[rf_path][idx] = OfdmTxPwrIdx; ++ } ++ } ++ ++ //Adapter->HalFunc.SetTxPowerLevelHandler(Adapter, pHalData->CurrentChannel);//gtest:todo ++ ++ return _TRUE; ++} ++ ++ ++/* ++ Description: ++ When beacon interval is changed, the values of the ++ hw registers should be modified. ++ By tynli, 2008.10.24. ++ ++*/ ++ ++ ++void ++rtl8192c_PHY_SetBeaconHwReg( ++ IN PADAPTER Adapter, ++ IN u16 BeaconInterval ++ ) ++{ ++ ++} ++ ++ ++VOID ++PHY_ScanOperationBackup8192C( ++ IN PADAPTER Adapter, ++ IN u8 Operation ++ ) ++{ ++#if 0 ++ IO_TYPE IoType; ++ ++ if(!Adapter->bDriverStopped) ++ { ++ switch(Operation) ++ { ++ case SCAN_OPT_BACKUP: ++ IoType = IO_CMD_PAUSE_DM_BY_SCAN; ++ Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ ++ break; ++ ++ case SCAN_OPT_RESTORE: ++ IoType = IO_CMD_RESUME_DM_BY_SCAN; ++ Adapter->HalFunc.SetHwRegHandler(Adapter,HW_VAR_IO_CMD, (pu1Byte)&IoType); ++ break; ++ ++ default: ++ RT_TRACE(COMP_SCAN, DBG_LOUD, ("Unknown Scan Backup Operation. \n")); ++ break; ++ } ++ } ++#endif ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_SetBWModeCallback8192C() ++ * ++ * Overview: Timer callback function for SetSetBWMode ++ * ++ * Input: PRT_TIMER pTimer ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: (1) We do not take j mode into consideration now ++ * (2) Will two workitem of "switch channel" and "switch channel bandwidth" run ++ * concurrently? ++ *---------------------------------------------------------------------------*/ ++static VOID ++_PHY_SetBWMode92C( ++ IN PADAPTER Adapter ++) ++{ ++// PADAPTER Adapter = (PADAPTER)pTimer->Adapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 regBwOpMode; ++ u8 regRRSR_RSC; ++ ++ //return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //u4Byte NowL, NowH; ++ //u8Byte BeginTime, EndTime; ++ ++ /*RT_TRACE(COMP_SCAN, DBG_LOUD, ("==>PHY_SetBWModeCallback8192C() Switch to %s bandwidth\n", \ ++ pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz"))*/ ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SetBWModeInProgress= _FALSE; ++ return; ++ } ++ ++ // There is no 40MHz mode in RF_8225. ++ if(pHalData->rf_chip==RF_8225) ++ return; ++ ++ if(Adapter->bDriverStopped) ++ return; ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //BeginTime = ((u8Byte)NowH << 32) + NowL; ++ ++ //3// ++ //3//<1>Set MAC register ++ //3// ++ //Adapter->HalFunc.SetBWModeHandler(); ++ ++ regBwOpMode = rtw_read8(Adapter, REG_BWOPMODE); ++ regRRSR_RSC = rtw_read8(Adapter, REG_RRSR+2); ++ //regBwOpMode = Adapter->HalFunc.GetHwRegHandler(Adapter,HW_VAR_BWMODE,(pu1Byte)®BwOpMode); ++ ++ switch(pHalData->CurrentChannelBW) ++ { ++ case HT_CHANNEL_WIDTH_20: ++ regBwOpMode |= BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ break; ++ ++ case HT_CHANNEL_WIDTH_40: ++ regBwOpMode &= ~BW_OPMODE_20MHZ; ++ // 2007/02/07 Mark by Emily becasue we have not verify whether this register works ++ rtw_write8(Adapter, REG_BWOPMODE, regBwOpMode); ++ ++ regRRSR_RSC = (regRRSR_RSC&0x90) |(pHalData->nCur40MhzPrimeSC<<5); ++ rtw_write8(Adapter, REG_RRSR+2, regRRSR_RSC); ++ break; ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): ++ unknown Bandwidth: %#X\n",pHalData->CurrentChannelBW));*/ ++ break; ++ } ++ ++ //3// ++ //3//<2>Set PHY related register ++ //3// ++ switch(pHalData->CurrentChannelBW) ++ { ++ /* 20 MHz channel*/ ++ case HT_CHANNEL_WIDTH_20: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x0); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x0); ++ PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 1); ++ ++ break; ++ ++ ++ /* 40 MHz channel*/ ++ case HT_CHANNEL_WIDTH_40: ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bRFMOD, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA1_RFMOD, bRFMOD, 0x1); ++ ++ // Set Control channel to upper or lower. These settings are required only for 40MHz ++ PHY_SetBBReg(Adapter, rCCK0_System, bCCKSideBand, (pHalData->nCur40MhzPrimeSC>>1)); ++ PHY_SetBBReg(Adapter, rOFDM1_LSTF, 0xC00, pHalData->nCur40MhzPrimeSC); ++ PHY_SetBBReg(Adapter, rFPGA0_AnalogParameter2, BIT10, 0); ++ ++ PHY_SetBBReg(Adapter, 0x818, (BIT26|BIT27), (pHalData->nCur40MhzPrimeSC==HAL_PRIME_CHNL_OFFSET_LOWER)?2:1); ++ ++ break; ++ ++ ++ ++ default: ++ /*RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetBWModeCallback8192C(): unknown Bandwidth: %#X\n"\ ++ ,pHalData->CurrentChannelBW));*/ ++ break; ++ ++ } ++ //Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315 ++ ++ // Added it for 20/40 mhz switch time evaluation by guangan 070531 ++ //NowL = PlatformEFIORead4Byte(Adapter, TSFR); ++ //NowH = PlatformEFIORead4Byte(Adapter, TSFR+4); ++ //EndTime = ((u8Byte)NowH << 32) + NowL; ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("SetBWModeCallback8190Pci: time of SetBWMode = %I64d us!\n", (EndTime - BeginTime))); ++ ++ //3<3>Set RF related register ++ switch(pHalData->rf_chip) ++ { ++ case RF_8225: ++ //PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8256: ++ // Please implement this function in Hal8190PciPhy8256.c ++ //PHY_SetRF8256Bandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ case RF_8258: ++ // Please implement this function in Hal8190PciPhy8258.c ++ // PHY_SetRF8258Bandwidth(); ++ break; ++ ++ case RF_PSEUDO_11N: ++ // Do Nothing ++ break; ++ ++ case RF_6052: ++ rtl8192c_PHY_RF6052SetBandwidth(Adapter, pHalData->CurrentChannelBW); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); ++ break; ++ } ++ ++ //pHalData->SetBWModeInProgress= FALSE; ++ ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("<==PHY_SetBWModeCallback8192C() \n" )); ++} ++ ++ ++ /*----------------------------------------------------------------------------- ++ * Function: SetBWMode8190Pci() ++ * ++ * Overview: This function is export to "HalCommon" moudule ++ * ++ * Input: PADAPTER Adapter ++ * HT_CHANNEL_WIDTH Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: We do not take j mode into consideration now ++ *---------------------------------------------------------------------------*/ ++VOID ++PHY_SetBWMode8192C( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth, // 20M or 40M ++ IN unsigned char Offset // Upper, Lower, or Don't care ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ HT_CHANNEL_WIDTH tmpBW= pHalData->CurrentChannelBW; ++ // Modified it for 20/40 mhz switch by guangan 070531 ++ //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; ++ ++ //return; ++ ++ //if(pHalData->SwChnlInProgress) ++// if(pMgntInfo->bScanInProgress) ++// { ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s Exit because bScanInProgress!\n", ++// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// return; ++// } ++ ++// if(pHalData->SetBWModeInProgress) ++// { ++// // Modified it for 20/40 mhz switch by guangan 070531 ++// RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() %s cancel last timer because SetBWModeInProgress!\n", ++// Bandwidth == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")); ++// PlatformCancelTimer(Adapter, &pHalData->SetBWModeTimer); ++// //return; ++// } ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ //pHalData->SetBWModeInProgress= TRUE; ++ ++ pHalData->CurrentChannelBW = Bandwidth; ++ ++#if 0 ++ if(Offset==HT_EXTCHNL_OFFSET_LOWER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(Offset==HT_EXTCHNL_OFFSET_UPPER) ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_LOWER; ++ else ++ pHalData->nCur40MhzPrimeSC = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++#else ++ pHalData->nCur40MhzPrimeSC = Offset; ++#endif ++ ++ if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) ++ { ++#ifdef USE_WORKITEM ++ //PlatformScheduleWorkItem(&(pHalData->SetBWModeWorkItem)); ++#else ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SetBWModeTimer), 0); ++ #else ++ _PHY_SetBWMode92C(Adapter); ++ #endif ++#endif ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SetBWMode8192C() SetBWModeInProgress FALSE driver sleep or unload\n")); ++ //pHalData->SetBWModeInProgress= FALSE; ++ pHalData->CurrentChannelBW = tmpBW; ++ } ++ ++} ++ ++ ++static void _PHY_SwChnl8192C(PADAPTER Adapter, u8 channel) ++{ ++ u8 eRFPath; ++ u32 param1, param2; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //s1. pre common command - CmdID_SetTxPowerLevel ++ PHY_SetTxPowerLevel8192C(Adapter, channel); ++ ++ //s2. RF dependent command - CmdID_RF_WriteReg, param1=RF_CHNLBW, param2=channel ++ param1 = RF_CHNLBW; ++ param2 = channel; ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | param2); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, param1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); ++ } ++ ++ ++ //s3. post common command - CmdID_End, None ++ ++} ++ ++VOID ++PHY_SwChnl8192C( // Call after initialization ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ //PADAPTER Adapter = ADJUST_TO_ADAPTIVE_ADAPTER(pAdapter, _TRUE); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 tmpchannel = pHalData->CurrentChannel; ++ BOOLEAN bResult = _TRUE; ++ ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SwChnlInProgress=FALSE; ++ return; //return immediately if it is peudo-phy ++ } ++ ++ //if(pHalData->SwChnlInProgress) ++ // return; ++ ++ //if(pHalData->SetBWModeInProgress) ++ // return; ++ ++ //-------------------------------------------- ++ switch(pHalData->CurrentWirelessMode) ++ { ++ case WIRELESS_MODE_A: ++ case WIRELESS_MODE_N_5G: ++ //RT_ASSERT((channel>14), ("WIRELESS_MODE_A but channel<=14")); ++ break; ++ ++ case WIRELESS_MODE_B: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_B but channel>14")); ++ break; ++ ++ case WIRELESS_MODE_G: ++ case WIRELESS_MODE_N_24G: ++ //RT_ASSERT((channel<=14), ("WIRELESS_MODE_G but channel>14")); ++ break; ++ ++ default: ++ //RT_ASSERT(FALSE, ("Invalid WirelessMode(%#x)!!\n", pHalData->CurrentWirelessMode)); ++ break; ++ } ++ //-------------------------------------------- ++ ++ //pHalData->SwChnlInProgress = TRUE; ++ if(channel == 0) ++ channel = 1; ++ ++ pHalData->CurrentChannel=channel; ++ ++ //pHalData->SwChnlStage=0; ++ //pHalData->SwChnlStep=0; ++ ++ if((!Adapter->bDriverStopped) && (!Adapter->bSurpriseRemoved)) ++ { ++#ifdef USE_WORKITEM ++ //bResult = PlatformScheduleWorkItem(&(pHalData->SwChnlWorkItem)); ++#else ++ #if 0 ++ //PlatformSetTimer(Adapter, &(pHalData->SwChnlTimer), 0); ++ #else ++ _PHY_SwChnl8192C(Adapter, channel); ++ #endif ++#endif ++ if(bResult) ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress TRUE schdule workitem done\n")); ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE schdule workitem error\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++ ++ } ++ else ++ { ++ //RT_TRACE(COMP_SCAN, DBG_LOUD, ("PHY_SwChnl8192C SwChnlInProgress FALSE driver sleep or unload\n")); ++ //if(IS_HARDWARE_TYPE_8192SU(Adapter)) ++ //{ ++ // pHalData->SwChnlInProgress = FALSE; ++ pHalData->CurrentChannel = tmpchannel; ++ //} ++ } ++} ++ ++ ++static BOOLEAN ++phy_SwChnlStepByStep( ++ IN PADAPTER Adapter, ++ IN u8 channel, ++ IN u8 *stage, ++ IN u8 *step, ++ OUT u32 *delay ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PCHANNEL_ACCESS_SETTING pChnlAccessSetting; ++ SwChnlCmd PreCommonCmd[MAX_PRECMD_CNT]; ++ u4Byte PreCommonCmdCnt; ++ SwChnlCmd PostCommonCmd[MAX_POSTCMD_CNT]; ++ u4Byte PostCommonCmdCnt; ++ SwChnlCmd RfDependCmd[MAX_RFDEPENDCMD_CNT]; ++ u4Byte RfDependCmdCnt; ++ SwChnlCmd *CurrentCmd; ++ u1Byte eRFPath; ++ u4Byte RfTXPowerCtrl; ++ BOOLEAN bAdjRfTXPowerCtrl = _FALSE; ++ ++ ++ RT_ASSERT((Adapter != NULL), ("Adapter should not be NULL\n")); ++#if(MP_DRIVER != 1) ++ RT_ASSERT(IsLegalChannel(Adapter, channel), ("illegal channel: %d\n", channel)); ++#endif ++ RT_ASSERT((pHalData != NULL), ("pHalData should not be NULL\n")); ++ ++ pChnlAccessSetting = &Adapter->MgntInfo.Info8185.ChannelAccessSetting; ++ RT_ASSERT((pChnlAccessSetting != NULL), ("pChnlAccessSetting should not be NULL\n")); ++ ++ //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ //{ ++ // <1> Fill up pre common command. ++ PreCommonCmdCnt = 0; ++ phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, ++ CmdID_SetTxPowerLevel, 0, 0, 0); ++ phy_SetSwChnlCmdArray(PreCommonCmd, PreCommonCmdCnt++, MAX_PRECMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ // <2> Fill up post common command. ++ PostCommonCmdCnt = 0; ++ ++ phy_SetSwChnlCmdArray(PostCommonCmd, PostCommonCmdCnt++, MAX_POSTCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ // <3> Fill up RF dependent command. ++ RfDependCmdCnt = 0; ++ switch( pHalData->RFChipID ) ++ { ++ case RF_8225: ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ // 2008/09/04 MH Change channel. ++ if(channel==14) channel++; ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, rZebra1_Channel, (0x10+channel-1), 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ break; ++ ++ case RF_8256: ++ // TEST!! This is not the table for 8256!! ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, rRfChannel, channel, 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ break; ++ ++ case RF_6052: ++ RT_ASSERT((channel >= 1 && channel <= 14), ("illegal channel for Zebra: %d\n", channel)); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_RF_WriteReg, RF_CHNLBW, channel, 10); ++ phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT, ++ CmdID_End, 0, 0, 0); ++ ++ break; ++ ++ case RF_8258: ++ break; ++ ++ // For FPGA two MAC verification ++ case RF_PSEUDO_11N: ++ return TRUE; ++ default: ++ RT_ASSERT(FALSE, ("Unknown RFChipID: %d\n", pHalData->RFChipID)); ++ return FALSE; ++ break; ++ } ++ ++ ++ do{ ++ switch(*stage) ++ { ++ case 0: ++ CurrentCmd=&PreCommonCmd[*step]; ++ break; ++ case 1: ++ CurrentCmd=&RfDependCmd[*step]; ++ break; ++ case 2: ++ CurrentCmd=&PostCommonCmd[*step]; ++ break; ++ } ++ ++ if(CurrentCmd->CmdID==CmdID_End) ++ { ++ if((*stage)==2) ++ { ++ return TRUE; ++ } ++ else ++ { ++ (*stage)++; ++ (*step)=0; ++ continue; ++ } ++ } ++ ++ switch(CurrentCmd->CmdID) ++ { ++ case CmdID_SetTxPowerLevel: ++ PHY_SetTxPowerLevel8192C(Adapter,channel); ++ break; ++ case CmdID_WritePortUlong: ++ PlatformEFIOWrite4Byte(Adapter, CurrentCmd->Para1, CurrentCmd->Para2); ++ break; ++ case CmdID_WritePortUshort: ++ PlatformEFIOWrite2Byte(Adapter, CurrentCmd->Para1, (u2Byte)CurrentCmd->Para2); ++ break; ++ case CmdID_WritePortUchar: ++ PlatformEFIOWrite1Byte(Adapter, CurrentCmd->Para1, (u1Byte)CurrentCmd->Para2); ++ break; ++ case CmdID_RF_WriteReg: // Only modify channel for the register now !!!!! ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++#if 1 ++ pHalData->RfRegChnlVal[eRFPath] = ((pHalData->RfRegChnlVal[eRFPath] & 0xfffffc00) | CurrentCmd->Para2); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, pHalData->RfRegChnlVal[eRFPath]); ++#else ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bRFRegOffsetMask, (CurrentCmd->Para2)); ++#endif ++ } ++ break; ++ } ++ ++ break; ++ }while(TRUE); ++ //cosa }/*for(Number of RF paths)*/ ++ ++ (*delay)=CurrentCmd->msDelay; ++ (*step)++; ++ return FALSE; ++#endif ++ return _TRUE; ++} ++ ++ ++static BOOLEAN ++phy_SetSwChnlCmdArray( ++ SwChnlCmd* CmdTable, ++ u32 CmdTableIdx, ++ u32 CmdTableSz, ++ SwChnlCmdID CmdID, ++ u32 Para1, ++ u32 Para2, ++ u32 msDelay ++ ) ++{ ++ SwChnlCmd* pCmd; ++ ++ if(CmdTable == NULL) ++ { ++ //RT_ASSERT(FALSE, ("phy_SetSwChnlCmdArray(): CmdTable cannot be NULL.\n")); ++ return _FALSE; ++ } ++ if(CmdTableIdx >= CmdTableSz) ++ { ++ //RT_ASSERT(FALSE, ++ // ("phy_SetSwChnlCmdArray(): Access invalid index, please check size of the table, CmdTableIdx:%ld, CmdTableSz:%ld\n", ++ // CmdTableIdx, CmdTableSz)); ++ return _FALSE; ++ } ++ ++ pCmd = CmdTable + CmdTableIdx; ++ pCmd->CmdID = CmdID; ++ pCmd->Para1 = Para1; ++ pCmd->Para2 = Para2; ++ pCmd->msDelay = msDelay; ++ ++ return _TRUE; ++} ++ ++ ++static void ++phy_FinishSwChnlNow( // We should not call this function directly ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 delay; ++ ++ while(!phy_SwChnlStepByStep(Adapter,channel,&pHalData->SwChnlStage,&pHalData->SwChnlStep,&delay)) ++ { ++ if(delay>0) ++ rtw_mdelay_os(delay); ++ } ++#endif ++} ++ ++ ++ ++// ++// Description: ++// Switch channel synchronously. Called by SwChnlByDelayHandler. ++// ++// Implemented by Bruce, 2008-02-14. ++// The following procedure is operted according to SwChanlCallback8190Pci(). ++// However, this procedure is performed synchronously which should be running under ++// passive level. ++// ++VOID ++PHY_SwChnlPhy8192C( // Only called during initialize ++ IN PADAPTER Adapter, ++ IN u8 channel ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //RT_TRACE(COMP_SCAN | COMP_RM, DBG_LOUD, ("==>PHY_SwChnlPhy8192S(), switch from channel %d to channel %d.\n", pHalData->CurrentChannel, channel)); ++ ++ // Cannot IO. ++ //if(RT_CANNOT_IO(Adapter)) ++ // return; ++ ++ // Channel Switching is in progress. ++ //if(pHalData->SwChnlInProgress) ++ // return; ++ ++ //return immediately if it is peudo-phy ++ if(pHalData->rf_chip == RF_PSEUDO_11N) ++ { ++ //pHalData->SwChnlInProgress=FALSE; ++ return; ++ } ++ ++ //pHalData->SwChnlInProgress = TRUE; ++ if( channel == 0) ++ channel = 1; ++ ++ pHalData->CurrentChannel=channel; ++ ++ //pHalData->SwChnlStage = 0; ++ //pHalData->SwChnlStep = 0; ++ ++ phy_FinishSwChnlNow(Adapter,channel); ++ ++ //pHalData->SwChnlInProgress = FALSE; ++} ++ ++ ++// ++// Description: ++// Configure H/W functionality to enable/disable Monitor mode. ++// Note, because we possibly need to configure BB and RF in this function, ++// so caller should in PASSIVE_LEVEL. 080118, by rcnjko. ++// ++VOID ++PHY_SetMonitorMode8192C( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN bFilterOutNonAssociatedBSSID = FALSE; ++ ++ //2 Note: we may need to stop antenna diversity. ++ if(bEnableMonitorMode) ++ { ++ bFilterOutNonAssociatedBSSID = FALSE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): enable monitor mode\n")); ++ ++ pHalData->bInMonitorMode = TRUE; ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, TRUE, TRUE); ++ pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++ else ++ { ++ bFilterOutNonAssociatedBSSID = TRUE; ++ RT_TRACE(COMP_RM, DBG_LOUD, ("PHY_SetMonitorMode8192S(): disable monitor mode\n")); ++ ++ pAdapter->HalFunc.AllowAllDestAddrHandler(pAdapter, FALSE, TRUE); ++ pHalData->bInMonitorMode = FALSE; ++ pAdapter->HalFunc.SetHwRegHandler(pAdapter, HW_VAR_CHECK_BSSID, (pu1Byte)&bFilterOutNonAssociatedBSSID); ++ } ++#endif ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHYCheckIsLegalRfPath8190Pci() ++ * ++ * Overview: Check different RF type to execute legal judgement. If RF Path is illegal ++ * We will return false. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/15/2007 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++BOOLEAN ++PHY_CheckIsLegalRfPath8192C( ++ IN PADAPTER pAdapter, ++ IN u32 eRFPath) ++{ ++// HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN rtValue = _TRUE; ++ ++ // NOt check RF Path now.! ++#if 0 ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) ++ { ++ rtValue = FALSE; ++ } ++ if (pHalData->RF_Type == RF_1T2R && eRFPath != RF90_PATH_A) ++ { ++ ++ } ++#endif ++ return rtValue; ++ ++} /* PHY_CheckIsLegalRfPath8192C */ ++ ++//------------------------------------------------------------------------- ++// ++// IQK ++// ++//------------------------------------------------------------------------- ++#define MAX_TOLERANCE 5 ++#define IQK_DELAY_TIME 1 //ms ++ ++static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++_PHY_PathA_IQK( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN configPathB ++ ) ++{ ++ u32 regEAC, regE94, regE9C, regEA4; ++ u8 result = 0x00; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Path A IQK!\n")); ++ ++ //path-A IQK setting ++ //RTPRINT(FINIT, INIT_IQK, ("Path-A IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x10008c1f); ++ PHY_SetBBReg(pAdapter, 0xe38, bMaskDWord, 0x82140102); ++ ++ PHY_SetBBReg(pAdapter, 0xe3c, bMaskDWord, configPathB ? 0x28160202 : 0x28160502); ++ ++#if 1 ++ //path-B IQK setting ++ if(configPathB) ++ { ++ PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); ++ PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); ++ } ++#endif ++ //LO calibration setting ++ //RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); ++ PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); ++ ++ //One shot, path A LOK & IQK ++ //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf9000000); ++ PHY_SetBBReg(pAdapter, 0xe48, bMaskDWord, 0xf8000000); ++ ++ // delay x ms ++ //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path A LOK & IQK.\n", IQK_DELAY_TIME)); ++ rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regE94 = PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xe94 = 0x%x\n", regE94)); ++ regE9C= PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xe9c = 0x%x\n", regE9C)); ++ regEA4= PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xea4 = 0x%x\n", regEA4)); ++ ++ if(!(regEAC & BIT28) && ++ (((regE94 & 0x03FF0000)>>16) != 0x142) && ++ (((regE9C & 0x03FF0000)>>16) != 0x42) ) ++ result |= 0x01; ++ else //if Tx not OK, ignore Rx ++ return result; ++ ++ if(!(regEAC & BIT27) && //if Tx is OK, check whether Rx is OK ++ (((regEA4 & 0x03FF0000)>>16) != 0x132) && ++ (((regEAC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ DBG_8192C("Path A Rx IQK fail!!\n"); ++ ++ return result; ++ ++ ++} ++ ++static u8 //bit0 = 1 => Tx OK, bit1 = 1 => Rx OK ++_PHY_PathB_IQK( ++ IN PADAPTER pAdapter ++ ) ++{ ++ u32 regEAC, regEB4, regEBC, regEC4, regECC; ++ u8 result = 0x00; ++ //RTPRINT(FINIT, INIT_IQK, ("Path B IQK!\n")); ++#if 0 ++ //path-B IQK setting ++ RTPRINT(FINIT, INIT_IQK, ("Path-B IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x10008c22); ++ PHY_SetBBReg(pAdapter, 0xe58, bMaskDWord, 0x82140102); ++ PHY_SetBBReg(pAdapter, 0xe5c, bMaskDWord, 0x28160202); ++ ++ //LO calibration setting ++ RTPRINT(FINIT, INIT_IQK, ("LO calibration setting!\n")); ++ PHY_SetBBReg(pAdapter, 0xe4c, bMaskDWord, 0x001028d1); ++#endif ++ //One shot, path B LOK & IQK ++ //RTPRINT(FINIT, INIT_IQK, ("One shot, path A LOK & IQK!\n")); ++ PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000002); ++ PHY_SetBBReg(pAdapter, 0xe60, bMaskDWord, 0x00000000); ++ ++ // delay x ms ++ //RTPRINT(FINIT, INIT_IQK, ("Delay %d ms for One shot, path B LOK & IQK.\n", IQK_DELAY_TIME)); ++ rtw_udelay_os(IQK_DELAY_TIME*1000);//PlatformStallExecution(IQK_DELAY_TIME*1000); ++ ++ // Check failed ++ regEAC = PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeac = 0x%x\n", regEAC)); ++ regEB4 = PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xeb4 = 0x%x\n", regEB4)); ++ regEBC= PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xebc = 0x%x\n", regEBC)); ++ regEC4= PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xec4 = 0x%x\n", regEC4)); ++ regECC= PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("0xecc = 0x%x\n", regECC)); ++ ++ if(!(regEAC & BIT31) && ++ (((regEB4 & 0x03FF0000)>>16) != 0x142) && ++ (((regEBC & 0x03FF0000)>>16) != 0x42)) ++ result |= 0x01; ++ else ++ return result; ++ ++ if(!(regEAC & BIT30) && ++ (((regEC4 & 0x03FF0000)>>16) != 0x132) && ++ (((regECC & 0x03FF0000)>>16) != 0x36)) ++ result |= 0x02; ++ else ++ DBG_8192C("Path B Rx IQK fail!!\n"); ++ ++ ++ return result; ++ ++} ++ ++static VOID ++_PHY_PathAFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN int result[][8], ++ IN u8 final_candidate, ++ IN BOOLEAN bTxOnly ++ ) ++{ ++ u32 Oldval_0, X, TX0_A, reg; ++ int Y, TX0_C; ++ ++ DBG_8192C("Path A IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); ++ ++ if(final_candidate == 0xFF) ++ return; ++ else if(bIQKOK) ++ { ++ Oldval_0 = (PHY_QueryBBReg(pAdapter, rOFDM0_XATxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][0]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX0_A = (X * Oldval_0) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX0_A = 0x%lx, Oldval_0 0x%lx\n", X, TX0_A, Oldval_0)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(31), ((X* Oldval_0>>7) & 0x1)); ++ ++ Y = result[final_candidate][1]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ TX0_C = (Y * Oldval_0) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX = 0x%lx\n", Y, TX0_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XATxIQImbalance, 0x003F0000, (TX0_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(29), ((Y* Oldval_0>>7) & 0x1)); ++ ++ if(bTxOnly) ++ { ++ DBG_8192C("_PHY_PathAFillIQKMatrix only Tx OK\n"); ++ return; ++ } ++ ++ reg = result[final_candidate][2]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][3] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XARxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][3] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, 0xca0, 0xF0000000, reg); ++ } ++} ++ ++static VOID ++_PHY_PathBFillIQKMatrix( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bIQKOK, ++ IN int result[][8], ++ IN u8 final_candidate, ++ IN BOOLEAN bTxOnly //do Tx only ++ ) ++{ ++ u32 Oldval_1, X, TX1_A, reg; ++ int Y, TX1_C; ++ ++ DBG_8192C("Path B IQ Calibration %s !\n",(bIQKOK)?"Success":"Failed"); ++ ++ if(final_candidate == 0xFF) ++ return; ++ else if(bIQKOK) ++ { ++ Oldval_1 = (PHY_QueryBBReg(pAdapter, rOFDM0_XBTxIQImbalance, bMaskDWord) >> 22) & 0x3FF; ++ ++ X = result[final_candidate][4]; ++ if ((X & 0x00000200) != 0) ++ X = X | 0xFFFFFC00; ++ TX1_A = (X * Oldval_1) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("X = 0x%lx, TX1_A = 0x%lx\n", X, TX1_A)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(27), ((X* Oldval_1>>7) & 0x1)); ++ ++ Y = result[final_candidate][5]; ++ if ((Y & 0x00000200) != 0) ++ Y = Y | 0xFFFFFC00; ++ TX1_C = (Y * Oldval_1) >> 8; ++ //RTPRINT(FINIT, INIT_IQK, ("Y = 0x%lx, TX1_C = 0x%lx\n", Y, TX1_C)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ++ PHY_SetBBReg(pAdapter, rOFDM0_XBTxIQImbalance, 0x003F0000, (TX1_C&0x3F)); ++ PHY_SetBBReg(pAdapter, rOFDM0_ECCAThreshold, BIT(25), ((Y* Oldval_1>>7) & 0x1)); ++ ++ if(bTxOnly) ++ return; ++ ++ reg = result[final_candidate][6]; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0x3FF, reg); ++ ++ reg = result[final_candidate][7] & 0x3F; ++ PHY_SetBBReg(pAdapter, rOFDM0_XBRxIQImbalance, 0xFC00, reg); ++ ++ reg = (result[final_candidate][7] >> 6) & 0xF; ++ PHY_SetBBReg(pAdapter, rOFDM0_AGCRSSITable, 0x0000F000, reg); ++ } ++} ++ ++static VOID ++_PHY_SaveADDARegisters( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN u32* ADDABackup, ++ IN u32 RegisterNum ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Save ADDA parameters.\n")); ++ for( i = 0 ; i < RegisterNum ; i++){ ++ ADDABackup[i] = PHY_QueryBBReg(pAdapter, ADDAReg[i], bMaskDWord); ++ } ++} ++ ++static VOID ++_PHY_SaveMACRegisters( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Save MAC parameters.\n")); ++ for( i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ MACBackup[i] =rtw_read8(pAdapter, MACReg[i]); ++ } ++ MACBackup[i] = rtw_read32(pAdapter, MACReg[i]); ++ ++} ++ ++static VOID ++_PHY_ReloadADDARegisters( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN u32* ADDABackup, ++ IN u32 RegiesterNum ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Reload ADDA power saving parameters !\n")); ++ for(i = 0 ; i < RegiesterNum ; i++){ ++ PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); ++ } ++} ++ ++static VOID ++_PHY_ReloadMACRegisters( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("Reload MAC parameters !\n")); ++ for(i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ rtw_write8(pAdapter, MACReg[i], (u8)MACBackup[i]); ++ } ++ rtw_write32(pAdapter, MACReg[i], MACBackup[i]); ++} ++ ++static VOID ++_PHY_PathADDAOn( ++ IN PADAPTER pAdapter, ++ IN u32* ADDAReg, ++ IN BOOLEAN isPathAOn, ++ IN BOOLEAN is2T ++ ) ++{ ++ u32 pathOn; ++ u32 i; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("ADDA ON.\n")); ++ ++ pathOn = isPathAOn ? 0x04db25a4 : 0x0b1b25a4; ++ if(_FALSE == is2T){ ++ pathOn = 0x0bdb25a0; ++ PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, 0x0b1b25a0); ++ } ++ else{ ++ PHY_SetBBReg(pAdapter, ADDAReg[0], bMaskDWord, pathOn); ++ } ++ ++ for( i = 1 ; i < IQK_ADDA_REG_NUM ; i++){ ++ PHY_SetBBReg(pAdapter, ADDAReg[i], bMaskDWord, pathOn); ++ } ++ ++} ++ ++static VOID ++_PHY_MACSettingCalibration( ++ IN PADAPTER pAdapter, ++ IN u32* MACReg, ++ IN u32* MACBackup ++ ) ++{ ++ u32 i = 0; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("MAC settings for Calibration.\n")); ++ ++ rtw_write8(pAdapter, MACReg[i], 0x3F); ++ ++ for(i = 1 ; i < (IQK_MAC_REG_NUM - 1); i++){ ++ rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT3))); ++ } ++ rtw_write8(pAdapter, MACReg[i], (u8)(MACBackup[i]&(~BIT5))); ++ ++} ++ ++static VOID ++_PHY_PathAStandBy( ++ IN PADAPTER pAdapter ++ ) ++{ ++ //RTPRINT(FINIT, INIT_IQK, ("Path-A standby mode!\n")); ++ ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x0); ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); ++} ++ ++static VOID ++_PHY_PIModeSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN PIMode ++ ) ++{ ++ u32 mode; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("BB Switch to %s mode!\n", (PIMode ? "PI" : "SI"))); ++ ++ mode = PIMode ? 0x01000100 : 0x01000000; ++ PHY_SetBBReg(pAdapter, 0x820, bMaskDWord, mode); ++ PHY_SetBBReg(pAdapter, 0x828, bMaskDWord, mode); ++} ++ ++/* ++return _FALSE => do IQK again ++*/ ++static BOOLEAN ++_PHY_SimularityCompare( ++ IN PADAPTER pAdapter, ++ IN int result[][8], ++ IN u8 c1, ++ IN u8 c2 ++ ) ++{ ++ u32 i, j, diff, SimularityBitMap, bound = 0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 final_candidate[2] = {0xFF, 0xFF}; //for path A and path B ++ BOOLEAN bResult = _TRUE, is2T = IS_92C_SERIAL( pHalData->VersionID); ++ ++ if(is2T) ++ bound = 8; ++ else ++ bound = 4; ++ ++ SimularityBitMap = 0; ++ ++ for( i = 0; i < bound; i++ ) ++ { ++ diff = (result[c1][i] > result[c2][i]) ? (result[c1][i] - result[c2][i]) : (result[c2][i] - result[c1][i]); ++ if (diff > MAX_TOLERANCE) ++ { ++ if((i == 2 || i == 6) && !SimularityBitMap) ++ { ++ if(result[c1][i]+result[c1][i+1] == 0) ++ final_candidate[(i/4)] = c2; ++ else if (result[c2][i]+result[c2][i+1] == 0) ++ final_candidate[(i/4)] = c1; ++ else ++ SimularityBitMap = SimularityBitMap|(1<dmpriv; ++ u32 i; ++ u8 PathAOK, PathBOK; ++ u32 ADDA_REG[IQK_ADDA_REG_NUM] = { 0x85c, 0xe6c, 0xe70, 0xe74, ++ 0xe78, 0xe7c, 0xe80, 0xe84, ++ 0xe88, 0xe8c, 0xed0, 0xed4, ++ 0xed8, 0xedc, 0xee0, 0xeec }; ++ ++ u32 IQK_MAC_REG[IQK_MAC_REG_NUM] = {0x522, 0x550, 0x551,0x040}; ++ ++ u32 IQK_BB_REG[IQK_BB_REG_NUM] = { ++ 0xc04, 0xc08, 0x874, 0xb68, 0xb6c, ++ 0x870, 0x860, 0x864, 0x800 ++ }; ++ ++#if MP_DRIVER ++ const u32 retryCount = 9; ++#else ++ const u32 retryCount = 2; ++#endif ++ ++ // Note: IQ calibration must be performed after loading ++ // PHY_REG.txt , and radio_a, radio_b.txt ++ ++ u32 bbvalue; ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ if(t==0) ++ { ++ bbvalue = PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_IQCalibrate()==>0x%08lx\n",bbvalue)); ++ ++ //RTPRINT(FINIT, INIT_IQK, ("IQ Calibration for %s\n", (is2T ? "2T2R" : "1T1R"))); ++ ++ // Save ADDA parameters, turn Path A ADDA on ++ _PHY_SaveADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup,IQK_ADDA_REG_NUM); ++ _PHY_SaveMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); ++ } ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, _TRUE, is2T); ++ ++ if(t==0) ++ { ++ pdmpriv->bRfPiEnable = (u8)PHY_QueryBBReg(pAdapter, rFPGA0_XA_HSSIParameter1, BIT(8)); ++ } ++ ++ if(!pdmpriv->bRfPiEnable){ ++ // Switch BB to PI mode to do IQ Calibration. ++ _PHY_PIModeSwitch(pAdapter, _TRUE); ++ } ++ ++ PHY_SetBBReg(pAdapter, 0x800, BIT24, 0x00); ++ PHY_SetBBReg(pAdapter, 0xc04, bMaskDWord, 0x03a05600); ++ PHY_SetBBReg(pAdapter, 0xc08, bMaskDWord, 0x000800e4); ++ PHY_SetBBReg(pAdapter, 0x874, bMaskDWord, 0x22204000); ++ PHY_SetBBReg(pAdapter, 0x870, BIT10, 0x01); ++ PHY_SetBBReg(pAdapter, 0x870, BIT26, 0x01); ++ PHY_SetBBReg(pAdapter, 0x860, BIT10, 0x00); ++ PHY_SetBBReg(pAdapter, 0x864, BIT10, 0x00); ++ ++ if(is2T) ++ { ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00010000); ++ PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00010000); ++ } ++ ++ //MAC settings ++ _PHY_MACSettingCalibration(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ ++ //Page B init ++ if(isNormal) ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00080000); ++ else ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0f600000); ++ ++ if(is2T) ++ { ++ if(isNormal) ++ PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00080000); ++ else ++ PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x0f600000); ++ } ++ ++ // IQ calibration setting ++ //RTPRINT(FINIT, INIT_IQK, ("IQK setting!\n")); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80800000); ++ PHY_SetBBReg(pAdapter, 0xe40, bMaskDWord, 0x01007c00); ++ PHY_SetBBReg(pAdapter, 0xe44, bMaskDWord, 0x01004800); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathAOK = _PHY_PathA_IQK(pAdapter, is2T); ++ if(PathAOK == 0x03){ ++ DBG_8192C("Path A IQK Success!!\n"); ++ result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; ++ result[t][2] = (PHY_QueryBBReg(pAdapter, 0xea4, bMaskDWord)&0x3FF0000)>>16; ++ result[t][3] = (PHY_QueryBBReg(pAdapter, 0xeac, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount-1) && PathAOK == 0x01) //Tx IQK OK ++ { ++ DBG_8192C("Path A IQK Only Tx Success!!\n"); ++ ++ result[t][0] = (PHY_QueryBBReg(pAdapter, 0xe94, bMaskDWord)&0x3FF0000)>>16; ++ result[t][1] = (PHY_QueryBBReg(pAdapter, 0xe9c, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathAOK){ ++ DBG_8192C("Path A IQK failed!!\n"); ++ } ++ ++ if(is2T){ ++ _PHY_PathAStandBy(pAdapter); ++ ++ // Turn Path B ADDA on ++ _PHY_PathADDAOn(pAdapter, ADDA_REG, _FALSE, is2T); ++ ++ for(i = 0 ; i < retryCount ; i++){ ++ PathBOK = _PHY_PathB_IQK(pAdapter); ++ if(PathBOK == 0x03){ ++ DBG_8192C("Path B IQK Success!!\n"); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; ++ result[t][6] = (PHY_QueryBBReg(pAdapter, 0xec4, bMaskDWord)&0x3FF0000)>>16; ++ result[t][7] = (PHY_QueryBBReg(pAdapter, 0xecc, bMaskDWord)&0x3FF0000)>>16; ++ break; ++ } ++ else if (i == (retryCount - 1) && PathBOK == 0x01) //Tx IQK OK ++ { ++ DBG_8192C("Path B Only Tx IQK Success!!\n"); ++ result[t][4] = (PHY_QueryBBReg(pAdapter, 0xeb4, bMaskDWord)&0x3FF0000)>>16; ++ result[t][5] = (PHY_QueryBBReg(pAdapter, 0xebc, bMaskDWord)&0x3FF0000)>>16; ++ } ++ } ++ ++ if(0x00 == PathBOK){ ++ DBG_8192C("Path B IQK failed!!\n"); ++ } ++ } ++ ++ //Back to BB mode, load original value ++ //RTPRINT(FINIT, INIT_IQK, ("IQK:Back to BB mode, load original value!\n")); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0); ++ ++ if(t!=0) ++ { ++ if(!pdmpriv->bRfPiEnable){ ++ // Switch back BB to SI mode after finish IQ Calibration. ++ _PHY_PIModeSwitch(pAdapter, _FALSE); ++ } ++ ++ // Reload ADDA power saving parameters ++ _PHY_ReloadADDARegisters(pAdapter, ADDA_REG, pdmpriv->ADDA_backup, IQK_ADDA_REG_NUM); ++ ++ // Reload MAC parameters ++ _PHY_ReloadMACRegisters(pAdapter, IQK_MAC_REG, pdmpriv->IQK_MAC_backup); ++ ++ // Reload BB parameters ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup, IQK_BB_REG_NUM); ++ ++ // Restore RX initial gain ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x00032ed3); ++ if(is2T){ ++ PHY_SetBBReg(pAdapter, 0x844, bMaskDWord, 0x00032ed3); ++ } ++ ++ //load 0xe30 IQC default value ++ PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); ++ ++ } ++ //RTPRINT(FINIT, INIT_IQK, ("_PHY_IQCalibrate() <==\n")); ++ ++} ++ ++ ++static VOID ++_PHY_LCCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++ u8 tmpReg; ++ u32 RF_Amode = 0, RF_Bmode = 0, LC_Cal; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ //Check continuous TX and Packet TX ++ tmpReg = rtw_read8(pAdapter, 0xd03); ++ ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ rtw_write8(pAdapter, 0xd03, tmpReg&0x8F); //disable all continuous TX ++ else // Deal with Packet TX case ++ rtw_write8(pAdapter, REG_TXPAUSE, 0xFF); // block all queues ++ ++ if((tmpReg&0x70) != 0) ++ { ++ //1. Read original RF mode ++ //Path-A ++ RF_Amode = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits); ++ ++ //Path-B ++ if(is2T) ++ RF_Bmode = PHY_QueryRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits); ++ ++ //2. Set RF mode = standby mode ++ //Path-A ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, (RF_Amode&0x8FFFF)|0x10000); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, (RF_Bmode&0x8FFFF)|0x10000); ++ } ++ ++ //3. Read RF reg18 ++ LC_Cal = PHY_QueryRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits); ++ ++ //4. Set LC calibration begin ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x18, bMask12Bits, LC_Cal|0x08000); ++ ++ if(isNormal) { ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(100); ++ #else ++ rtw_mdelay_os(100); ++ #endif ++ } ++ else ++ rtw_mdelay_os(3); ++ ++ //Restore original situation ++ if((tmpReg&0x70) != 0) //Deal with contisuous TX case ++ { ++ //Path-A ++ rtw_write8(pAdapter, 0xd03, tmpReg); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMask12Bits, RF_Amode); ++ ++ //Path-B ++ if(is2T) ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x00, bMask12Bits, RF_Bmode); ++ } ++ else // Deal with Packet TX case ++ { ++ rtw_write8(pAdapter, REG_TXPAUSE, 0x00); ++ } ++ ++} ++ ++ ++//Analog Pre-distortion calibration ++#define APK_BB_REG_NUM 8 ++#define APK_CURVE_REG_NUM 4 ++#define PATH_NUM 2 ++ ++static VOID ++_PHY_APCalibrate( ++ IN PADAPTER pAdapter, ++ IN char delta, ++ IN BOOLEAN is2T ++ ) ++{ ++#if 1//(PLATFORM == PLATFORM_WINDOWS)//??? ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ u32 regD[PATH_NUM]; ++ u32 tmpReg, index, offset, path, i, pathbound = PATH_NUM, apkbound; ++ ++ u32 BB_backup[APK_BB_REG_NUM]; ++ u32 BB_REG[APK_BB_REG_NUM] = { ++ 0x904, 0xc04, 0x800, 0xc08, 0x874, ++ 0x870, 0x860, 0x864 }; ++ u32 BB_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x00204000 }; ++ u32 BB_normal_AP_MODE[APK_BB_REG_NUM] = { ++ 0x00000020, 0x00a05430, 0x02040000, ++ 0x000800e4, 0x22204000 }; ++ ++ u32 AFE_backup[IQK_ADDA_REG_NUM]; ++ u32 AFE_REG[IQK_ADDA_REG_NUM] = { ++ 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, ++ 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, ++ 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, ++ 0xeec}; ++ ++ u32 MAC_backup[IQK_MAC_REG_NUM]; ++ u32 MAC_REG[IQK_MAC_REG_NUM] = { ++ 0x522, 0x550, 0x551, 0x040}; ++ ++ u32 APK_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x1852c, 0x5852c, 0x1852c, 0x5852c}, ++ {0x2852e, 0x0852e, 0x3852e, 0x0852e, 0x0852e} ++ }; ++ ++ u32 APK_normal_RF_init_value[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x0852c, 0x0a52c, 0x3a52c, 0x5a52c, 0x5a52c}, //path settings equal to path b settings ++ {0x0852c, 0x0a52c, 0x5a52c, 0x5a52c, 0x5a52c} ++ }; ++ ++ u32 APK_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52014, 0x52013, 0x5200f, 0x5208d}, ++ {0x5201a, 0x52019, 0x52016, 0x52033, 0x52050} ++ }; ++ ++ u32 APK_normal_RF_value_0[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a}, //path settings equal to path b settings ++ {0x52019, 0x52017, 0x52010, 0x5200d, 0x5206a} ++ }; ++ ++ u32 APK_RF_value_A[PATH_NUM][APK_BB_REG_NUM] = { ++ {0x1adb0, 0x1adb0, 0x1ada0, 0x1ad90, 0x1ad80}, ++ {0x00fb0, 0x00fb0, 0x00fa0, 0x00f90, 0x00f80} ++ }; ++ ++ u32 AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u32 APK_offset[PATH_NUM] = { ++ 0xb68, 0xb6c}; ++ ++ u32 APK_normal_offset[PATH_NUM] = { ++ 0xb28, 0xb98}; ++ ++ u32 APK_value[PATH_NUM] = { ++ 0x92fc0000, 0x12fc0000}; ++ ++ u32 APK_normal_value[PATH_NUM] = { ++ 0x92680000, 0x12680000}; ++ ++ char APK_delta_mapping[APK_BB_REG_NUM][13] = { ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-4, -3, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-6, -4, -2, -2, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-1, -1, -1, -1, -1, -1, 0, 1, 2, 3, 4, 5, 6}, ++ {-11, -9, -7, -5, -3, -1, 0, 0, 0, 0, 0, 0, 0} ++ }; ++ ++ u32 APK_normal_setting_value_1[13] = { ++ 0x01017018, 0xf7ed8f84, 0x1b1a1816, 0x2522201e, 0x322e2b28, ++ 0x433f3a36, 0x5b544e49, 0x7b726a62, 0xa69a8f84, 0xdfcfc0b3, ++ 0x12680000, 0x00880000, 0x00880000 ++ }; ++ ++ u32 APK_normal_setting_value_2[16] = { ++ 0x01c7021d, 0x01670183, 0x01000123, 0x00bf00e2, 0x008d00a3, ++ 0x0068007b, 0x004d0059, 0x003a0042, 0x002b0031, 0x001f0025, ++ 0x0017001b, 0x00110014, 0x000c000f, 0x0009000b, 0x00070008, ++ 0x00050006 ++ }; ++ ++ u32 APK_result[PATH_NUM][APK_BB_REG_NUM]; //val_1_1a, val_1_2a, val_2a, val_3a, val_4a ++ u32 AP_curve[PATH_NUM][APK_CURVE_REG_NUM]; ++ ++ int BB_offset, delta_V, delta_offset; ++ ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++#if (MP_DRIVER == 1) ++ PMPT_CONTEXT pMptCtx = &pAdapter->mppriv.MptCtx; ++ ++ pMptCtx->APK_bound[0] = 45; ++ pMptCtx->APK_bound[1] = 52; ++#endif ++ ++ //RTPRINT(FINIT, INIT_IQK, ("==>PHY_APCalibrate() delta %d\n", delta)); ++ ++ //RTPRINT(FINIT, INIT_IQK, ("AP Calibration for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip"))); ++ ++ if(!is2T) ++ pathbound = 1; ++ ++ //2 FOR NORMAL CHIP SETTINGS ++ if(isNormal) ++ { ++// Temporarily do not allow normal driver to do the following settings because these offset ++// and value will cause RF internal PA to be unpredictably disabled by HW, such that RF Tx signal ++// will disappear after disable/enable card many times on 88CU. RF SD and DD have not find the ++// root cause, so we remove these actions temporarily. Added by tynli and SD3 Allen. 2010.05.31. ++#if (MP_DRIVER != 1) ++ return; ++#endif ++ ++ //settings adjust for normal chip ++ for(index = 0; index < PATH_NUM; index ++) ++ { ++ APK_offset[index] = APK_normal_offset[index]; ++ APK_value[index] = APK_normal_value[index]; ++ AFE_on_off[index] = 0x6fdb25a4; ++ } ++ ++ for(index = 0; index < APK_BB_REG_NUM; index ++) ++ { ++ for(path = 0; path < pathbound; path++) ++ { ++ APK_RF_init_value[path][index] = APK_normal_RF_init_value[path][index]; ++ APK_RF_value_0[path][index] = APK_normal_RF_value_0[path][index]; ++ } ++ BB_AP_MODE[index] = BB_normal_AP_MODE[index]; ++ } ++ ++ apkbound = 6; ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); ++ if(is2T) ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x0fe00000); ++ apkbound = 12; ++ } ++ ++ //save BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0 && isNormal) //skip ++ continue; ++ BB_backup[index] = PHY_QueryBBReg(pAdapter, BB_REG[index], bMaskDWord); ++ } ++ ++ //save MAC default value ++ _PHY_SaveMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //save AFE default value ++ _PHY_SaveADDARegisters(pAdapter, AFE_REG, AFE_backup,16); ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ //save old AP curve ++ if(isNormal) ++ { ++ if(path == RF90_PATH_A) ++ { ++ //path A APK ++ //load APK setting ++ //path-A ++ offset = 0xb00; ++ for(index = 0; index < 11; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); ++ ++ offset = 0xb68; ++ for(; index < 13; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ ++ //path A ++ offset = 0xb00; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ } ++ else if(path == RF90_PATH_B) ++ { ++ //path B APK ++ //load APK setting ++ //path-B ++ offset = 0xb70; ++ for(index = 0; index < 10; index ++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x12680000); ++ ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x12680000); ++ ++ offset = 0xb68; ++ index = 11; ++ for(; index < 13; index ++) //offset 0xb68, 0xb6c ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_1[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ ++ //page-B1 ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ ++ //path B ++ offset = 0xb60; ++ for(index = 0; index < 16; index++) ++ { ++ PHY_SetBBReg(pAdapter, offset, bMaskDWord, APK_normal_setting_value_2[index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", offset, PHY_QueryBBReg(pAdapter, offset, bMaskDWord))); ++ ++ offset += 0x04; ++ } ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ } ++ ++#if 0 ++ tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord); ++ AP_curve[path][0] = tmpReg & 0x1F; //[4:0] ++ ++ tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord); ++ AP_curve[path][1] = (tmpReg & 0xF8000) >> 15; //[19:15] ++ AP_curve[path][2] = (tmpReg & 0x7C00) >> 10; //[14:10] ++ AP_curve[path][3] = (tmpReg & 0x3E0) >> 5; //[9:5] ++#endif ++ } ++ else ++ { ++ tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord); ++ ++ AP_curve[path][0] = (tmpReg & 0xF8000) >> 15; //[19:15] ++ AP_curve[path][1] = (tmpReg & 0x7C00) >> 10; //[14:10] ++ AP_curve[path][2] = (tmpReg & 0x3E0) >> 5; //[9:5] ++ AP_curve[path][3] = tmpReg & 0x1F; //[4:0] ++ } ++ ++ //save RF default value ++ regD[path] = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord); ++ ++ //Path A AFE all on, path B AFE All off or vise versa ++ for(index = 0; index < IQK_ADDA_REG_NUM ; index++) ++ PHY_SetBBReg(pAdapter, AFE_REG[index], bMaskDWord, AFE_on_off[path]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xe70 %x\n", PHY_QueryBBReg(pAdapter, 0xe70, bMaskDWord))); ++ ++ //BB to AP mode ++ if(path == 0) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0 && isNormal) //skip ++ continue; ++ else if (index < 5) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_AP_MODE[index]); ++ else if (BB_REG[index] == 0x870) ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]|BIT10|BIT26); ++ else ++ PHY_SetBBReg(pAdapter, BB_REG[index], BIT10, 0x0); ++ } ++ PHY_SetBBReg(pAdapter, 0xe30, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, 0xe34, bMaskDWord, 0x01008c00); ++ } ++ else //path B ++ { ++ PHY_SetBBReg(pAdapter, 0xe50, bMaskDWord, 0x01008c00); ++ PHY_SetBBReg(pAdapter, 0xe54, bMaskDWord, 0x01008c00); ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x800 %x\n", PHY_QueryBBReg(pAdapter, 0x800, bMaskDWord))); ++ ++ //MAC settings ++ _PHY_MACSettingCalibration(pAdapter, MAC_REG, MAC_backup); ++ ++ if(path == RF90_PATH_A) //Path B to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0, bMaskDWord, 0x10000); ++ } ++ else //Path A to standby mode ++ { ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x10000); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20103); ++ } ++ ++ delta_offset = ((delta+14)/2); ++ if(delta_offset < 0) ++ delta_offset = 0; ++ else if (delta_offset > 12) ++ delta_offset = 12; ++ ++ //AP calibration ++ for(index = 0; index < APK_BB_REG_NUM; index++) ++ { ++ if(index != 1 && isNormal) //only DO PA11+PAD01001, AP RF setting ++ continue; ++ ++ tmpReg = APK_RF_init_value[path][index]; ++#if 1 ++ if(!pdmpriv->bAPKThermalMeterIgnore) ++ { ++ BB_offset = (tmpReg & 0xF0000) >> 16; ++ ++ if(!(tmpReg & BIT15)) //sign bit 0 ++ { ++ BB_offset = -BB_offset; ++ } ++ ++ delta_V = APK_delta_mapping[index][delta_offset]; ++ ++ BB_offset += delta_V; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() APK num %d delta_V %d delta_offset %d\n", index, delta_V, delta_offset)); ++ ++ if(BB_offset < 0) ++ { ++ tmpReg = tmpReg & (~BIT15); ++ BB_offset = -BB_offset; ++ } ++ else ++ { ++ tmpReg = tmpReg | BIT15; ++ } ++ tmpReg = (tmpReg & 0xFFF0FFFF) | (BB_offset << 16); ++ } ++#endif ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord, 0x8992e); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xc %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xc, bMaskDWord))); ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord, APK_RF_value_0[path][index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x0 %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x0, bMaskDWord))); ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, tmpReg); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xd %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord))); ++ if(!isNormal) ++ { ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord, APK_RF_value_A[path][index]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xa %x\n", PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xa, bMaskDWord))); ++ } ++ ++ // PA11+PAD01111, one shot ++ i = 0; ++ do ++ { ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); ++ { ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[0]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ rtw_mdelay_os(3); ++ PHY_SetBBReg(pAdapter, APK_offset[path], bMaskDWord, APK_value[1]); ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0x%x value 0x%x\n", APK_offset[path], PHY_QueryBBReg(pAdapter, APK_offset[path], bMaskDWord))); ++ if(isNormal) { ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(20); ++ #else ++ rtw_mdelay_os(20); ++ #endif ++ } ++ else ++ rtw_mdelay_os(3); ++ } ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ ++ if(!isNormal) ++ { ++ tmpReg = PHY_QueryRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xb, bMaskDWord); ++ tmpReg = (tmpReg & 0x3E00) >> 9; ++ } ++ else ++ { ++ if(path == RF90_PATH_A) ++ tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0x03E00000); ++ else ++ tmpReg = PHY_QueryBBReg(pAdapter, 0xbd8, 0xF8000000); ++ } ++ //RTPRINT(FINIT, INIT_IQK, ("PHY_APCalibrate() offset 0xbd8[25:21] %x\n", tmpReg)); ++ ++ i++; ++ } ++ while(tmpReg > apkbound && i < 4); ++ ++ APK_result[path][index] = tmpReg; ++ } ++ } ++ ++ //reload MAC default value ++ _PHY_ReloadMACRegisters(pAdapter, MAC_REG, MAC_backup); ++ ++ //reload BB default value ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(index == 0 && isNormal) //skip ++ continue; ++ PHY_SetBBReg(pAdapter, BB_REG[index], bMaskDWord, BB_backup[index]); ++ } ++ ++ //reload AFE default value ++ _PHY_ReloadADDARegisters(pAdapter, AFE_REG, AFE_backup, IQK_ADDA_REG_NUM); ++ ++ //reload RF path default value ++ for(path = 0; path < pathbound; path++) ++ { ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xd, bMaskDWord, regD[path]); ++ if(path == RF90_PATH_B) ++ { ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x10, bMaskDWord, 0x1000f); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x11, bMaskDWord, 0x20101); ++ } ++#if 1 ++ if(!isNormal) ++ { ++ for(index = 0; index < APK_BB_REG_NUM ; index++) ++ { ++ if(APK_result[path][index] > 12) ++ APK_result[path][index] = AP_curve[path][index-1]; ++ //RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", index, APK_result[path][index])); ++ } ++ } ++ else ++ { //note no index == 0 ++ if (APK_result[path][1] > 6) ++ APK_result[path][1] = 6; ++ //RTPRINT(FINIT, INIT_IQK, ("apk path %d result %d 0x%x \t", path, 1, APK_result[path][1])); ++ ++#if 0 ++ if(APK_result[path][2] < 2) ++ APK_result[path][2] = 2; ++ else if (APK_result[path][2] > 6) ++ APK_result[path][2] = 6; ++ RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 2, APK_result[path][2])); ++ ++ if(APK_result[path][3] < 2) ++ APK_result[path][3] = 2; ++ else if (APK_result[path][3] > 6) ++ APK_result[path][3] = 6; ++ RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 3, APK_result[path][3])); ++ ++ if(APK_result[path][4] < 5) ++ APK_result[path][4] = 5; ++ else if (APK_result[path][4] > 9) ++ APK_result[path][4] = 9; ++ RTPRINT(FINIT, INIT_IQK, ("apk result %d 0x%x \t", 4, APK_result[path][4])); ++#endif ++ ++ } ++#endif ++ } ++ ++ //RTPRINT(FINIT, INIT_IQK, ("\n")); ++ ++ ++ for(path = 0; path < pathbound; path++) ++ { ++ if(isNormal) ++ { ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x3, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (APK_result[path][1] << 5) | APK_result[path][1])); ++ if(path == RF90_PATH_A) ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x00 << 5) | 0x05)); ++ else ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0x4, bMaskDWord, ++ ((APK_result[path][1] << 15) | (APK_result[path][1] << 10) | (0x02 << 5) | 0x05)); ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, ++ ((0x08 << 15) | (0x08 << 10) | (0x08 << 5) | 0x08)); ++ } ++ else ++ { ++ for(index = 0; index < 2; index++) ++ pdmpriv->APKoutput[path][index] = ((APK_result[path][index] << 15) | (APK_result[path][2] << 10) | (APK_result[path][3] << 5) | APK_result[path][4]); ++ ++#if (MP_DRIVER == 1) ++ if(pMptCtx->TxPwrLevel[path] > pMptCtx->APK_bound[path]) ++ { ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, ++ pdmpriv->APKoutput[path][0]); ++ } ++ else ++ { ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, ++ pdmpriv->APKoutput[path][1]); ++ } ++#else ++ PHY_SetRFReg(pAdapter, (RF90_RADIO_PATH_E)path, 0xe, bMaskDWord, ++ pdmpriv->APKoutput[path][0]); ++#endif ++ } ++ } ++ ++ pdmpriv->bAPKdone = _TRUE; ++ ++ //RTPRINT(FINIT, INIT_IQK, ("<==PHY_APCalibrate()\n")); ++#endif ++} ++ ++ ++#define DP_BB_REG_NUM 7 ++#define DP_RF_REG_NUM 1 ++#define DP_RETRY_LIMIT 10 ++#define DP_PATH_NUM 2 ++#define DP_DPK_NUM 3 ++#define DP_DPK_VALUE_NUM 2 ++ ++//digital predistortion ++static VOID ++_PHY_DigitalPredistortion( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++#if 1//(PLATFORM == PLATFORM_WINDOWS) ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ u32 tmpReg, tmpReg2, index, offset, path, i, pathbound = PATH_NUM; ++ u32 AFE_backup[IQK_ADDA_REG_NUM]; ++ u32 AFE_REG[IQK_ADDA_REG_NUM] = { ++ 0x85c, 0xe6c, 0xe70, 0xe74, 0xe78, ++ 0xe7c, 0xe80, 0xe84, 0xe88, 0xe8c, ++ 0xed0, 0xed4, 0xed8, 0xedc, 0xee0, ++ 0xeec}; ++ ++ u32 BB_backup[DP_BB_REG_NUM]; ++ u32 BB_REG[DP_BB_REG_NUM] = { ++ 0xc04, 0x800, 0xc08, 0x874, ++ 0x870, 0x860, 0x864}; ++ u32 BB_settings[DP_BB_REG_NUM] = { ++ 0x00a05430, 0x02040000, 0x000800e4, 0x22208000, ++ 0x0, 0x0, 0x0}; ++ ++ u32 RF_backup[DP_PATH_NUM][DP_RF_REG_NUM]; ++ u32 RF_REG[DP_RF_REG_NUM] = { ++ 0x0d}; ++ ++ u32 MAC_backup[IQK_MAC_REG_NUM]; ++ u32 MAC_REG[IQK_MAC_REG_NUM] = { ++ 0x522, 0x550, 0x551, 0x040}; ++ ++ u32 Tx_AGC[DP_DPK_NUM][DP_DPK_VALUE_NUM] = { ++ {0x1e1e1e1e, 0x03901e1e}, ++ {0x18181818, 0x03901818}, ++ {0x0e0e0e0e, 0x03900e0e} ++ }; ++ ++// u32 RF_PATHA_backup[DP_RF_REG_NUM]; ++// u32 RF_REG_PATHA[DP_RF_REG_NUM] = { ++// 0x00, 0x10, 0x11}; ++ ++ u32 Reg800, Reg874, Regc04, Regc08, Reg040; ++ ++ u32 AFE_on_off[PATH_NUM] = { ++ 0x04db25a4, 0x0b1b25a4}; //path A on path B off / path A off path B on ++ ++ u32 RetryCount = 0; ++ ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ //DBG_8192C("==>_PHY_DigitalPredistortion()\n"); ++ ++ //DBG_8192C("_PHY_DigitalPredistortion for %s %s\n", (is2T ? "2T2R" : "1T1R"), (isNormal ? "Normal chip" : "Test chip")); ++ ++ if(!isNormal) ++ return; ++ ++ //save BB default value ++ for(index=0; index tx_agc 1f ~11 ++ // PA gain = 11 & PAD2 => tx_agc 10~0e ++ // PA gain = 01 => tx_agc 0b~0d ++ // PA gain = 00 => tx_agc 0a~00 ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 3; index++) ++ PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][0]); ++ PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, Tx_AGC[i][1]); ++ for(index = 0; index < 4; index++) ++ PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02097098); ++ PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path A ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x80047788); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x00047788); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ } ++ ++ //PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 3; index++) ++ PHY_SetBBReg(pAdapter, 0xe00+index*4, bMaskDWord, 0x34343434); ++ PHY_SetBBReg(pAdapter, 0xe08+index*4, bMaskDWord, 0x03903434); ++ for(index = 0; index < 4; index++) ++ PHY_SetBBReg(pAdapter, 0xe10+index*4, bMaskDWord, 0x34343434); ++ ++ //==================================== ++ // PAGE_B for Path-A DPK setting ++ //==================================== ++ // open inner loopback @ b00[19]:10 od 0xb00 0x01097018 ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); ++ PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0xf76d9f84); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); ++ ++ //rf_lpbk_setup ++ //1.rf 00:5205a, rf 0d:0e52c ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0c, bMaskDWord, 0x8992b); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x0d, bMaskDWord, 0x0e52c); ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, 0x00, bMaskDWord, 0x5205a ); ++ ++ //----send one shot signal----// ++ // Path A ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathAOK) ++ { ++ //----read back measurement results----// ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c297018); ++ tmpReg = PHY_QueryBBReg(pAdapter, 0xbe0, bMaskDWord); ++ rtw_mdelay_os(10); ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x0c29701f); ++ tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbe8, bMaskDWord); ++ rtw_mdelay_os(10); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff ) ++ { ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x02017098); ++ ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x800477c0); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x000477c0); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ RetryCount++; ++ DBG_8192C("path A DPK RetryCount %d 0xbe0[31:16] %x 0xbe8[31:16] %x\n", RetryCount, tmpReg, tmpReg2); ++ } ++ else ++ { ++ DBG_8192C("path A DPK Sucess\n"); ++ pdmpriv->bDPPathAOK = _TRUE; ++ break; ++ } ++ } ++ RetryCount = 0; ++ ++ //DPP path A ++ if(pdmpriv->bDPPathAOK) ++ { ++ // DP settings ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x01017098); ++ PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x776d9f84); ++ PHY_SetBBReg(pAdapter, 0xb28, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb68, bMaskDWord, 0x00880000); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ ++ for(i=0xb00; i<=0xb3c; i+=4) ++ { ++ PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); ++ //DBG_8192C("path A ofsset = 0x%x\n", i); ++ } ++ ++ //pwsf ++ PHY_SetBBReg(pAdapter, 0xb40, bMaskDWord, 0x40404040); ++ PHY_SetBBReg(pAdapter, 0xb44, bMaskDWord, 0x28324040); ++ PHY_SetBBReg(pAdapter, 0xb48, bMaskDWord, 0x10141920); ++ ++ for(i=0xb4c; i<=0xb5c; i+=4) ++ { ++ PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ //TX_AGC boundary ++ PHY_SetBBReg(pAdapter, 0xbc0, bMaskDWord, 0x0005361f); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, 0xb00, bMaskDWord, 0x00000000); ++ PHY_SetBBReg(pAdapter, 0xb04, bMaskDWord, 0x00000000); ++ } ++ ++ //DPK path B ++ if(is2T) ++ { ++ //Path A to standby mode ++ PHY_SetRFReg(pAdapter, RF90_PATH_A, RF_AC, bMaskDWord, 0x10000); ++ ++ // LUTs => tx_agc ++ // PA gain = 11 & PAD1, => tx_agc 1f ~11 ++ // PA gain = 11 & PAD2, => tx_agc 10 ~0e ++ // PA gain = 01 => tx_agc 0b ~0d ++ // PA gain = 00 => tx_agc 0a ~00 ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ ++ //do inner loopback DPK 3 times ++ for(i = 0; i < 3; i++) ++ { ++ //PA gain = 11 & PAD2 => tx_agc = 0x0f/0x0c/0x07 ++ for(index = 0; index < 4; index++) ++ PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, Tx_AGC[i][0]); ++ for(index = 0; index < 2; index++) ++ PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, Tx_AGC[i][0]); ++ ++ // PAGE_B for Path-A inner loopback DPK setting ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02097098); ++ PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); ++ ++ //----send one shot signal----// ++ // Path B ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x80047788); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x00047788); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ } ++ ++ // PA gain = 11 => tx_agc = 1a ++ for(index = 0; index < 4; index++) ++ PHY_SetBBReg(pAdapter, 0x830+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ PHY_SetBBReg(pAdapter, 0x848+index*4, bMaskDWord, 0x34343434); ++ for(index = 0; index < 2; index++) ++ PHY_SetBBReg(pAdapter, 0x868+index*4, bMaskDWord, 0x34343434); ++ ++ // PAGE_B for Path-B DPK setting ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); ++ PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0xf76d9f84); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); ++ ++ // RF lpbk switches on ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x0101000f); ++ PHY_SetBBReg(pAdapter, 0x840, bMaskDWord, 0x01120103); ++ ++ //Path-B RF lpbk ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0c, bMaskDWord, 0x8992b); ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, 0x0d, bMaskDWord, 0x0e52c); ++ PHY_SetRFReg(pAdapter, RF90_PATH_B, RF_AC, bMaskDWord, 0x5205a); ++ ++ //----send one shot signal----// ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ ++ while(RetryCount < DP_RETRY_LIMIT && !pdmpriv->bDPPathBOK) ++ { ++ //----read back measurement results----// ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c297018); ++ tmpReg = PHY_QueryBBReg(pAdapter, 0xbf0, bMaskDWord); ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x0c29701f); ++ tmpReg2 = PHY_QueryBBReg(pAdapter, 0xbf8, bMaskDWord); ++ ++ tmpReg = (tmpReg & bMaskHWord) >> 16; ++ tmpReg2 = (tmpReg2 & bMaskHWord) >> 16; ++ ++ if(tmpReg < 0xf0 || tmpReg > 0x105 || tmpReg2 > 0xff) ++ { ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x02017098); ++ ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x80000000); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x800477c0); ++ rtw_mdelay_os(1); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x000477c0); ++ #ifdef CONFIG_LONG_DELAY_ISSUE ++ rtw_msleep_os(50); ++ #else ++ rtw_mdelay_os(50); ++ #endif ++ RetryCount++; ++ DBG_8192C("path B DPK RetryCount %d 0xbf0[31:16] %x, 0xbf8[31:16] %x\n", RetryCount , tmpReg, tmpReg2); ++ } ++ else ++ { ++ DBG_8192C("path B DPK Success\n"); ++ pdmpriv->bDPPathBOK = _TRUE; ++ break; ++ } ++ } ++ ++ //DPP path B ++ if(pdmpriv->bDPPathBOK) ++ { ++ // DP setting ++ // LUT by SRAM ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x01017098); ++ PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x776d9f84); ++ PHY_SetBBReg(pAdapter, 0xb98, bMaskDWord, 0x0004ab87); ++ PHY_SetBBReg(pAdapter, 0xb6c, bMaskDWord, 0x00880000); ++ ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x40000000); ++ for(i=0xb60; i<=0xb9c; i+=4) ++ { ++ PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x40004000); ++ //DBG_8192C("path B ofsset = 0x%x\n", i); ++ } ++ ++ // PWSF ++ PHY_SetBBReg(pAdapter, 0xba0, bMaskDWord, 0x40404040); ++ PHY_SetBBReg(pAdapter, 0xba4, bMaskDWord, 0x28324050); ++ PHY_SetBBReg(pAdapter, 0xba8, bMaskDWord, 0x0c141920); ++ ++ for(i=0xbac; i<=0xbbc; i+=4) ++ { ++ PHY_SetBBReg(pAdapter, i, bMaskDWord, 0x0c0c0c0c); ++ } ++ ++ // tx_agc boundary ++ PHY_SetBBReg(pAdapter, 0xbc4, bMaskDWord, 0x0005361f); ++ PHY_SetBBReg(pAdapter, 0xe28, bMaskDWord, 0x00000000); ++ ++ } ++ else ++ { ++ PHY_SetBBReg(pAdapter, 0xb70, bMaskDWord, 0x00000000); ++ PHY_SetBBReg(pAdapter, 0xb74, bMaskDWord, 0x00000000); ++ } ++ } ++ ++ //reload BB default value ++ for(index=0; indexbDPdone = _TRUE; ++ //DBG_8192C("<==_PHY_DigitalPredistortion()\n"); ++#endif ++} ++ ++ ++static VOID _PHY_SetRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain, ++ IN BOOLEAN is2T ++ ) ++{ ++ u8 u1bTmp; ++ ++ if(!pAdapter->hw_init_completed) ++ { ++ u1bTmp = rtw_read8(pAdapter, REG_LEDCFG2) | BIT7; ++ rtw_write8(pAdapter, REG_LEDCFG2, u1bTmp); ++ //PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x1); //92C_Path_A ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6, 0x2); //BT ++ } ++ else ++ { ++ ++ if(bMain) ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x2); //Main ++ else ++ PHY_SetBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300, 0x1); //Aux ++ } ++ ++} ++ ++//return value TRUE => Main; FALSE => Aux ++ ++static BOOLEAN _PHY_QueryRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN is2T ++ ) ++{ ++// if(is2T) ++// return _TRUE; ++ ++ if(!pAdapter->hw_init_completed) ++ { ++ PHY_SetBBReg(pAdapter, REG_LEDCFG0, BIT23, 0x01); ++ PHY_SetBBReg(pAdapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ } ++ ++ if(is2T) ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XB_RFInterfaceOE, BIT5|BIT6) == 0x01) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++ else ++ { ++ if(PHY_QueryBBReg(pAdapter, rFPGA0_XA_RFInterfaceOE, 0x300) == 0x02) ++ return _TRUE; ++ else ++ return _FALSE; ++ } ++} ++ ++ ++static VOID ++_PHY_DumpRFReg(IN PADAPTER pAdapter) ++{ ++ u32 rfRegValue,rfRegOffset; ++ ++ //RTPRINT(FINIT, INIT_RF, ("PHY_DumpRFReg()====>\n")); ++ ++ for(rfRegOffset = 0x00;rfRegOffset<=0x30;rfRegOffset++){ ++ rfRegValue = PHY_QueryRFReg(pAdapter,RF90_PATH_A, rfRegOffset, bMaskDWord); ++ //RTPRINT(FINIT, INIT_RF, (" 0x%02x = 0x%08x\n",rfRegOffset,rfRegValue)); ++ } ++ //RTPRINT(FINIT, INIT_RF, ("<===== PHY_DumpRFReg()\n")); ++} ++ ++ ++VOID ++rtl8192c_PHY_IQCalibrate( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bReCovery ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u32 IQK_BB_REG[9] = { ++ rOFDM0_XARxIQImbalance, rOFDM0_XBRxIQImbalance, rOFDM0_ECCAThreshold, rOFDM0_AGCRSSITable, ++ rOFDM0_XATxIQImbalance, rOFDM0_XBTxIQImbalance, rOFDM0_XCTxAFE, rOFDM0_XDTxAFE, rOFDM0_RxIQExtAnta}; ++ int result[4][8]; //last is final result ++ u8 i, final_candidate; ++ BOOLEAN bPathAOK, bPathBOK; ++ int RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC, RegTmp = 0; ++ BOOLEAN is12simular, is13simular, is23simular; ++ ++ ++#if (MP_DRIVER == 1) ++ //ignore IQK when continuous Tx ++ if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) ++ return; ++#endif ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(bReCovery) ++ { ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); ++ return; ++ } ++ DBG_8192C("IQK:Start!!!\n"); ++ ++ for(i = 0; i < 8; i++) ++ { ++ result[0][i] = 0; ++ result[1][i] = 0; ++ result[2][i] = 0; ++ result[3][i] = 0; ++ } ++ final_candidate = 0xff; ++ bPathAOK = _FALSE; ++ bPathBOK = _FALSE; ++ is12simular = _FALSE; ++ is23simular = _FALSE; ++ is13simular = _FALSE; ++ ++ for (i=0; i<3; i++) ++ { ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_IQCalibrate(pAdapter, result, i, _TRUE); ++ //_PHY_DumpRFReg(pAdapter); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_IQCalibrate(pAdapter, result, i, _FALSE); ++ } ++ ++ if(i == 1) ++ { ++ is12simular = _PHY_SimularityCompare(pAdapter, result, 0, 1); ++ if(is12simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ } ++ ++ if(i == 2) ++ { ++ is13simular = _PHY_SimularityCompare(pAdapter, result, 0, 2); ++ if(is13simular) ++ { ++ final_candidate = 0; ++ break; ++ } ++ ++ is23simular = _PHY_SimularityCompare(pAdapter, result, 1, 2); ++ if(is23simular) ++ final_candidate = 1; ++ else ++ { ++ for(i = 0; i < 8; i++) ++ RegTmp += result[3][i]; ++ ++ if(RegTmp != 0) ++ final_candidate = 3; ++ else ++ final_candidate = 0xFF; ++ } ++ } ++ } ++ ++ for (i=0; i<4; i++) ++ { ++ RegE94 = result[i][0]; ++ RegE9C = result[i][1]; ++ RegEA4 = result[i][2]; ++ RegEAC = result[i][3]; ++ RegEB4 = result[i][4]; ++ RegEBC = result[i][5]; ++ RegEC4 = result[i][6]; ++ RegECC = result[i][7]; ++ //RTPRINT(FINIT, INIT_IQK, ("IQK: RegE94=%lx RegE9C=%lx RegEA4=%lx RegEAC=%lx RegEB4=%lx RegEBC=%lx RegEC4=%lx RegECC=%lx\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); ++ } ++ ++ if(final_candidate != 0xff) ++ { ++ pdmpriv->RegE94 = RegE94 = result[final_candidate][0]; ++ pdmpriv->RegE9C = RegE9C = result[final_candidate][1]; ++ RegEA4 = result[final_candidate][2]; ++ RegEAC = result[final_candidate][3]; ++ pdmpriv->RegEB4 = RegEB4 = result[final_candidate][4]; ++ pdmpriv->RegEBC = RegEBC = result[final_candidate][5]; ++ RegEC4 = result[final_candidate][6]; ++ RegECC = result[final_candidate][7]; ++ DBG_8192C("IQK: final_candidate is %x\n", final_candidate); ++ DBG_8192C("IQK: RegE94=%x RegE9C=%x RegEA4=%x RegEAC=%x RegEB4=%x RegEBC=%x RegEC4=%x RegECC=%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC); ++ bPathAOK = bPathBOK = _TRUE; ++ } ++ else ++ { ++ ++ #if 0 ++ DBG_871X("%s do _PHY_ReloadADDARegisters\n"); ++ _PHY_ReloadADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); ++ return; ++ #else ++ pdmpriv->RegE94 = pdmpriv->RegEB4 = 0x100; //X default value ++ pdmpriv->RegE9C = pdmpriv->RegEBC = 0x0; //Y default value ++ #endif ++ } ++ ++ if((RegE94 != 0)/*&&(RegEA4 != 0)*/) ++ _PHY_PathAFillIQKMatrix(pAdapter, bPathAOK, result, final_candidate, (RegEA4 == 0)); ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ if((RegEB4 != 0)/*&&(RegEC4 != 0)*/) ++ _PHY_PathBFillIQKMatrix(pAdapter, bPathBOK, result, final_candidate, (RegEC4 == 0)); ++ } ++ ++ _PHY_SaveADDARegisters(pAdapter, IQK_BB_REG, pdmpriv->IQK_BB_backup_recover, 9); ++ ++} ++ ++ ++VOID ++rtl8192c_PHY_LCCalibrate( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ ++#if (MP_DRIVER == 1) ++ // ignore LCK when continuous Tx ++ if (pAdapter->mppriv.MptCtx.bStartContTx == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bCarrierSuppression == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bSingleCarrier == _TRUE) ++ return; ++ if (pAdapter->mppriv.MptCtx.bSingleTone == _TRUE) ++ return; ++#endif ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_LCCalibrate(pAdapter, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_LCCalibrate(pAdapter, _FALSE); ++ } ++} ++ ++VOID ++rtl8192c_PHY_APCalibrate( ++ IN PADAPTER pAdapter, ++ IN char delta ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(pdmpriv->bAPKdone) ++ return; ++ ++// if(IS_NORMAL_CHIP(pHalData->VersionID)) ++// return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_APCalibrate(pAdapter, delta, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_APCalibrate(pAdapter, delta, _FALSE); ++ } ++} ++ ++VOID ++rtl8192c_PHY_DigitalPredistortion( ++ IN PADAPTER pAdapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ return; ++ ++ if(pdmpriv->bDPdone) ++ return; ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_DigitalPredistortion(pAdapter, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_DigitalPredistortion(pAdapter, _FALSE); ++ } ++} ++ ++VOID rtl8192c_PHY_SetRFPathSwitch( ++ IN PADAPTER pAdapter, ++ IN BOOLEAN bMain ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++#if DISABLE_BB_RF ++ return; ++#endif ++ ++ if(IS_92C_SERIAL( pHalData->VersionID)){ ++ _PHY_SetRFPathSwitch(pAdapter, bMain, _TRUE); ++ } ++ else{ ++ // For 88C 1T1R ++ _PHY_SetRFPathSwitch(pAdapter, bMain, _FALSE); ++ } ++} ++ ++// ++// Move from phycfg.c to gen.c to be code independent later ++// ++//-------------------------Move to other DIR later----------------------------*/ ++#ifdef CONFIG_USB_HCI ++ ++// ++// Description: ++// To dump all Tx FIFO LLT related link-list table. ++// Added by Roger, 2009.03.10. ++// ++VOID ++DumpBBDbgPort_92CU( ++ IN PADAPTER Adapter ++ ) ++{ ++ ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("\n>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>\n")); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("BaseBand Debug Ports:\n")); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0803); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0a06); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0007); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); ++ PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x000f0000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ PHY_SetBBReg(Adapter, 0x0908, 0xffff, 0x0100); ++ PHY_SetBBReg(Adapter, 0x0a28, 0x00ff0000, 0x00150000); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xdf4, PHY_QueryBBReg(Adapter, 0x0df4, bMaskDWord))); ++ ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x800, PHY_QueryBBReg(Adapter, 0x0800, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0x900, PHY_QueryBBReg(Adapter, 0x0900, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa00, PHY_QueryBBReg(Adapter, 0x0a00, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa54, PHY_QueryBBReg(Adapter, 0x0a54, bMaskDWord))); ++ //RT_TRACE(COMP_SEND, DBG_WARNING, ("Offset[%x]: %x\n", 0xa58, PHY_QueryBBReg(Adapter, 0x0a58, bMaskDWord))); ++ ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rf6052.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,1047 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192c_rf6052.c ( Source C File) ++ * ++ * Note: Provide RF 6052 series relative API. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * 11/05/2008 MHC Add API for tw power setting. ++ * ++ * ++******************************************************************************/ ++ ++#define _RTL8192C_RF6052_C_ ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++/*---------------------------Define Local Constant---------------------------*/ ++// Define local structure for debug!!!!! ++typedef struct RF_Shadow_Compare_Map { ++ // Shadow register value ++ u32 Value; ++ // Compare or not flag ++ u8 Compare; ++ // Record If it had ever modified unpredicted ++ u8 ErrorOrNot; ++ // Recorver Flag ++ u8 Recorver; ++ // ++ u8 Driver_Write; ++}RF_SHADOW_T; ++/*---------------------------Define Local Constant---------------------------*/ ++ ++ ++/*------------------------Define global variable-----------------------------*/ ++/*------------------------Define global variable-----------------------------*/ ++ ++ ++/*------------------------Define local variable------------------------------*/ ++// 2008/11/20 MH For Debug only, RF ++//static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG] = {0}; ++static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG]; ++/*------------------------Define local variable------------------------------*/ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: RF_ChangeTxPath ++ * ++ * Overview: For RL6052, we must change some RF settign for 1T or 2T. ++ * ++ * Input: u2Byte DataRate // 0x80-8f, 0x90-9f ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 09/25/2008 MHC Create Version 0. ++ * Firmwaer support the utility later. ++ * ++ *---------------------------------------------------------------------------*/ ++void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate) ++{ ++// We do not support gain table change inACUT now !!!! Delete later !!! ++#if 0//(RTL92SE_FPGA_VERIFY == 0) ++ static u1Byte RF_Path_Type = 2; // 1 = 1T 2= 2T ++ static u4Byte tx_gain_tbl1[6] ++ = {0x17f50, 0x11f40, 0x0cf30, 0x08720, 0x04310, 0x00100}; ++ static u4Byte tx_gain_tbl2[6] ++ = {0x15ea0, 0x10e90, 0x0c680, 0x08250, 0x04040, 0x00030}; ++ u1Byte i; ++ ++ if (RF_Path_Type == 2 && (DataRate&0xF) <= 0x7) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x0f000); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xeacf1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl1[i]); ++ ++ // Set PA to high value ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e39); ++ } ++ else if (RF_Path_Type == 1 && (DataRate&0xF) >= 0x8) ++ { ++ // Set TX SYNC power G2G3 loop filter ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x04440); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G3, bRFRegOffsetMask, 0xea4f1); ++ ++ // Change TX AGC gain table ++ for (i = 0; i < 6; i++) ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TX_AGC, bRFRegOffsetMask, tx_gain_tbl2[i]); ++ ++ // Set PA low gain ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)RF90_PATH_A, ++ RF_TXPA_G2, bRFRegOffsetMask, 0x01e19); ++ } ++#endif ++ ++} /* RF_ChangeTxPath */ ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetBandwidth() ++ * ++ * Overview: This function is called by SetBWModeCallback8190Pci() only ++ * ++ * Input: PADAPTER Adapter ++ * WIRELESS_BANDWIDTH_E Bandwidth //20M or 40M ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Note: For RF type 0222D ++ *---------------------------------------------------------------------------*/ ++VOID ++rtl8192c_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth) //20M or 40M ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(Bandwidth) ++ { ++ case HT_CHANNEL_WIDTH_20: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff) | 0x0400); ++ PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ case HT_CHANNEL_WIDTH_40: ++ pHalData->RfRegChnlVal[0] = ((pHalData->RfRegChnlVal[0] & 0xfffff3ff)); ++ PHY_SetRFReg(Adapter, RF90_PATH_A, RF_CHNLBW, bRFRegOffsetMask, pHalData->RfRegChnlVal[0]); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_DBG, DBG_LOUD, ("PHY_SetRF8225Bandwidth(): unknown Bandwidth: %#X\n",Bandwidth )); ++ break; ++ } ++ ++} ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetCckTxPower ++ * ++ * Overview: ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/05/2008 MHC Simulate 8192series.. ++ * ++ *---------------------------------------------------------------------------*/ ++ ++VOID ++rtl8192c_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ //PMGNT_INFO pMgntInfo=&Adapter->MgntInfo; ++ u32 TxAGC[2]={0, 0}, tmpval=0; ++ BOOLEAN TurboScanOff = _FALSE; ++ u8 idx1, idx2; ++ u8* ptr; ++ ++ // 2010/10/18 MH Accorsing to SD3 eechou's suggestion, we need to disable turbo scan for RU. ++ // Otherwise, external PA will be broken if power index > 0x20. ++#ifdef CONFIG_USB_HCI ++ if (pHalData->EEPROMRegulatory != 0 || pHalData->ExternalPA) ++#else ++ if (pHalData->EEPROMRegulatory != 0) ++#endif ++ { ++ //DbgPrint("TurboScanOff=1 EEPROMRegulatory=%d ExternalPA=%d\n", pHalData->EEPROMRegulatory, pHalData->ExternalPA); ++ TurboScanOff = _TRUE; ++ } ++ ++ if(pmlmeext->sitesurvey_res.state == SCAN_PROCESS) ++ { ++ TxAGC[RF90_PATH_A] = 0x3f3f3f3f; ++ TxAGC[RF90_PATH_B] = 0x3f3f3f3f; ++ ++ TurboScanOff = _TRUE;//disable turbo scan ++ ++ if(TurboScanOff) ++ { ++ for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) ++ { ++ TxAGC[idx1] = ++ pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | ++ (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); ++#ifdef CONFIG_USB_HCI ++ // 2010/10/18 MH For external PA module. We need to limit power index to be less than 0x20. ++ if (TxAGC[idx1] > 0x20 && pHalData->ExternalPA) ++ TxAGC[idx1] = 0x20; ++#endif ++ } ++ } ++ } ++ else ++ { ++// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. ++// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. ++// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ { ++ TxAGC[RF90_PATH_A] = 0x10101010; ++ TxAGC[RF90_PATH_B] = 0x10101010; ++ } ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ { ++ TxAGC[RF90_PATH_A] = 0x00000000; ++ TxAGC[RF90_PATH_B] = 0x00000000; ++ } ++ else ++ { ++ for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) ++ { ++ TxAGC[idx1] = ++ pPowerlevel[idx1] | (pPowerlevel[idx1]<<8) | ++ (pPowerlevel[idx1]<<16) | (pPowerlevel[idx1]<<24); ++ } ++ ++ if(pHalData->EEPROMRegulatory==0) ++ { ++ tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][6]) + ++ (pHalData->MCSTxPowerLevelOriginalOffset[0][7]<<8); ++ TxAGC[RF90_PATH_A] += tmpval; ++ ++ tmpval = (pHalData->MCSTxPowerLevelOriginalOffset[0][14]) + ++ (pHalData->MCSTxPowerLevelOriginalOffset[0][15]<<24); ++ TxAGC[RF90_PATH_B] += tmpval; ++ } ++ } ++ } ++ ++ for(idx1=RF90_PATH_A; idx1<=RF90_PATH_B; idx1++) ++ { ++ ptr = (u8*)(&(TxAGC[idx1])); ++ for(idx2=0; idx2<4; idx2++) ++ { ++ if(*ptr > RF6052_MAX_TX_PWR) ++ *ptr = RF6052_MAX_TX_PWR; ++ ptr++; ++ } ++ } ++ ++ // rf-A cck tx power ++ tmpval = TxAGC[RF90_PATH_A]&0xff; ++ PHY_SetBBReg(Adapter, rTxAGC_A_CCK1_Mcs32, bMaskByte1, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_A_CCK1_Mcs32)); ++ tmpval = TxAGC[RF90_PATH_A]>>8; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, 0xffffff00, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 2~11M (rf-A) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); ++ ++ // rf-B cck tx power ++ tmpval = TxAGC[RF90_PATH_B]>>24; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 11M (rf-B) = 0x%x (reg 0x%x)\n", tmpval, rTxAGC_B_CCK11_A_CCK2_11)); ++ tmpval = TxAGC[RF90_PATH_B]&0x00ffffff; ++ PHY_SetBBReg(Adapter, rTxAGC_B_CCK1_55_Mcs32, 0xffffff00, tmpval); ++ //RTPRINT(FPHY, PHY_TXPWR, ("CCK PWR 1~5.5M (rf-B) = 0x%x (reg 0x%x)\n", ++ // tmpval, rTxAGC_B_CCK1_55_Mcs32)); ++ ++} /* PHY_RF6052SetCckTxPower */ ++ ++// ++// powerbase0 for OFDM rates ++// powerbase1 for HT MCS rates ++// ++static void getPowerBase( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel, ++ IN OUT u32* OfdmBase, ++ IN OUT u32* MCSBase ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 powerBase0, powerBase1; ++ u8 Legacy_pwrdiff=0, HT20_pwrdiff=0; ++ u8 i, powerlevel[2]; ++ ++ for(i=0; i<2; i++) ++ { ++ powerlevel[i] = pPowerLevel[i]; ++ Legacy_pwrdiff = pHalData->TxPwrLegacyHtDiff[i][Channel-1]; ++ powerBase0 = powerlevel[i] + Legacy_pwrdiff; ++ ++ powerBase0 = (powerBase0<<24) | (powerBase0<<16) |(powerBase0<<8) |powerBase0; ++ *(OfdmBase+i) = powerBase0; ++ //RTPRINT(FPHY, PHY_TXPWR, (" [OFDM power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(OfdmBase+i))); ++ } ++ ++ for(i=0; i<2; i++) ++ { ++ //Check HT20 to HT40 diff ++ if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) ++ { ++ HT20_pwrdiff = pHalData->TxPwrHt20Diff[i][Channel-1]; ++ powerlevel[i] += HT20_pwrdiff; ++ } ++ powerBase1 = powerlevel[i]; ++ powerBase1 = (powerBase1<<24) | (powerBase1<<16) |(powerBase1<<8) |powerBase1; ++ *(MCSBase+i) = powerBase1; ++ //RTPRINT(FPHY, PHY_TXPWR, (" [MCS power base index rf(%c) = 0x%x]\n", ((i==0)?'A':'B'), *(MCSBase+i))); ++ } ++} ++ ++static void getTxPowerWriteValByRegulatory( ++ IN PADAPTER Adapter, ++ IN u8 Channel, ++ IN u8 index, ++ IN u32* powerBase0, ++ IN u32* powerBase1, ++ OUT u32* pOutWriteVal ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i, chnlGroup, pwr_diff_limit[4]; ++ u32 writeVal, customer_limit, rf; ++ ++ // ++ // Index 0 & 1= legacy OFDM, 2-5=HT_MCS rate ++ // ++ for(rf=0; rf<2; rf++) ++ { ++ switch(pHalData->EEPROMRegulatory) ++ { ++ case 0: // Realtek better performance ++ // increase power diff defined by Realtek for large power ++ chnlGroup = 0; ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ case 1: // Realtek regulatory ++ // increase power diff defined by Realtek for regulatory ++ { ++ if(pHalData->pwrGroupCnt == 1) ++ chnlGroup = 0; ++ if(pHalData->pwrGroupCnt >= 3) ++ { ++ if(Channel <= 3) ++ chnlGroup = 0; ++ else if(Channel >= 4 && Channel <= 9) ++ chnlGroup = 1; ++ else if(Channel > 9) ++ chnlGroup = 2; ++ ++ if(pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_20) ++ chnlGroup++; ++ else ++ chnlGroup+=4; ++ } ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ //chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ } ++ break; ++ case 2: // Better regulatory ++ // don't increase any power diff ++ writeVal = ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Better regulatory, writeVal(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ case 3: // Customer defined power diff. ++ // increase power diff defined by customer. ++ chnlGroup = 0; ++ //RTPRINT(FPHY, PHY_TXPWR, ("MCSTxPowerLevelOriginalOffset[%d][%d] = 0x%x\n", ++ // chnlGroup, index, pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)])); ++ ++ if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) ++ { ++ //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 40MHz rf(%c) = 0x%x\n", ++ // ((rf==0)?'A':'B'), pHalData->PwrGroupHT40[rf][Channel-1])); ++ } ++ else ++ { ++ //RTPRINT(FPHY, PHY_TXPWR, ("customer's limit, 20MHz rf(%c) = 0x%x\n", ++ // ((rf==0)?'A':'B'), pHalData->PwrGroupHT20[rf][Channel-1])); ++ } ++ for (i=0; i<4; i++) ++ { ++ pwr_diff_limit[i] = (u8)((pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)]&(0x7f<<(i*8)))>>(i*8)); ++ if (pHalData->CurrentChannelBW == HT_CHANNEL_WIDTH_40) ++ { ++ if(pwr_diff_limit[i] > pHalData->PwrGroupHT40[rf][Channel-1]) ++ pwr_diff_limit[i] = pHalData->PwrGroupHT40[rf][Channel-1]; ++ } ++ else ++ { ++ if(pwr_diff_limit[i] > pHalData->PwrGroupHT20[rf][Channel-1]) ++ pwr_diff_limit[i] = pHalData->PwrGroupHT20[rf][Channel-1]; ++ } ++ } ++ customer_limit = (pwr_diff_limit[3]<<24) | (pwr_diff_limit[2]<<16) | ++ (pwr_diff_limit[1]<<8) | (pwr_diff_limit[0]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Customer's limit rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), customer_limit)); ++ ++ writeVal = customer_limit + ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Customer, writeVal rf(%c)= 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ default: ++ chnlGroup = 0; ++ writeVal = pHalData->MCSTxPowerLevelOriginalOffset[chnlGroup][index+(rf?8:0)] + ++ ((index<2)?powerBase0[rf]:powerBase1[rf]); ++ //RTPRINT(FPHY, PHY_TXPWR, ("RTK better performance, writeVal rf(%c) = 0x%x\n", ((rf==0)?'A':'B'), writeVal)); ++ break; ++ } ++ ++// 20100427 Joseph: Driver dynamic Tx power shall not affect Tx power. It shall be determined by power training mechanism. ++// Currently, we cannot fully disable driver dynamic tx power mechanism because it is referenced by BT coexist mechanism. ++// In the future, two mechanism shall be separated from each other and maintained independantly. Thanks for Lanhsin's reminder. ++ ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level1) ++ writeVal = 0x14141414; ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_Level2) ++ writeVal = 0x00000000; ++ ++ ++ // 20100628 Joseph: High power mode for BT-Coexist mechanism. ++ // This mechanism is only applied when Driver-Highpower-Mechanism is OFF. ++ if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT1) ++ { ++ //RTPRINT(FBT, BT_TRACE, ("Tx Power (-6)\n")); ++ writeVal = writeVal - 0x06060606; ++ } ++ else if(pdmpriv->DynamicTxHighPowerLvl == TxHighPwrLevel_BT2) ++ { ++ //RTPRINT(FBT, BT_TRACE, ("Tx Power (-0)\n")); ++ writeVal = writeVal; ++ } ++ *(pOutWriteVal+rf) = writeVal; ++ } ++} ++ ++static void writeOFDMPowerReg( ++ IN PADAPTER Adapter, ++ IN u8 index, ++ IN u32* pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u16 RegOffset_A[6] = { rTxAGC_A_Rate18_06, rTxAGC_A_Rate54_24, ++ rTxAGC_A_Mcs03_Mcs00, rTxAGC_A_Mcs07_Mcs04, ++ rTxAGC_A_Mcs11_Mcs08, rTxAGC_A_Mcs15_Mcs12}; ++ u16 RegOffset_B[6] = { rTxAGC_B_Rate18_06, rTxAGC_B_Rate54_24, ++ rTxAGC_B_Mcs03_Mcs00, rTxAGC_B_Mcs07_Mcs04, ++ rTxAGC_B_Mcs11_Mcs08, rTxAGC_B_Mcs15_Mcs12}; ++ u8 i, rf, pwr_val[4]; ++ u32 writeVal; ++ u16 RegOffset; ++ ++ for(rf=0; rf<2; rf++) ++ { ++ writeVal = pValue[rf]; ++ for(i=0; i<4; i++) ++ { ++ pwr_val[i] = (u8)((writeVal & (0x7f<<(i*8)))>>(i*8)); ++ if (pwr_val[i] > RF6052_MAX_TX_PWR) ++ pwr_val[i] = RF6052_MAX_TX_PWR; ++ } ++ writeVal = (pwr_val[3]<<24) | (pwr_val[2]<<16) |(pwr_val[1]<<8) |pwr_val[0]; ++ ++ if(rf == 0) ++ RegOffset = RegOffset_A[index]; ++ else ++ RegOffset = RegOffset_B[index]; ++ ++ PHY_SetBBReg(Adapter, RegOffset, bMaskDWord, writeVal); ++ //RTPRINT(FPHY, PHY_TXPWR, ("Set 0x%x = %08x\n", RegOffset, writeVal)); ++ ++ // 201005115 Joseph: Set Tx Power diff for Tx power training mechanism. ++ if(((pHalData->rf_type == RF_2T2R) && ++ (RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs15_Mcs12))|| ++ ((pHalData->rf_type != RF_2T2R) && ++ (RegOffset == rTxAGC_A_Mcs07_Mcs04 || RegOffset == rTxAGC_B_Mcs07_Mcs04)) ) ++ { ++ writeVal = pwr_val[3]; ++ if(RegOffset == rTxAGC_A_Mcs15_Mcs12 || RegOffset == rTxAGC_A_Mcs07_Mcs04) ++ RegOffset = 0xc90; ++ if(RegOffset == rTxAGC_B_Mcs15_Mcs12 || RegOffset == rTxAGC_B_Mcs07_Mcs04) ++ RegOffset = 0xc98; ++ for(i=0; i<3; i++) ++ { ++ if(i!=2) ++ writeVal = (writeVal>8)?(writeVal-8):0; ++ else ++ writeVal = (writeVal>6)?(writeVal-6):0; ++ rtw_write8(Adapter, (u32)(RegOffset+i), (u8)writeVal); ++ } ++ } ++ } ++} ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RF6052SetOFDMTxPower ++ * ++ * Overview: For legacy and HY OFDM, we must read EEPROM TX power index for ++ * different channel and read original value in TX power register area from ++ * 0xe00. We increase offset and original value to be correct tx pwr. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/05/2008 MHC Simulate 8192 series method. ++ * 01/06/2009 MHC 1. Prevent Path B tx power overflow or underflow dure to ++ * A/B pwr difference or legacy/HT pwr diff. ++ * 2. We concern with path B legacy/HT OFDM difference. ++ * 01/22/2009 MHC Support new EPRO format from SD3. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++rtl8192c_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel) ++{ ++ //HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 writeVal[2], powerBase0[2], powerBase1[2]; ++ u8 index = 0; ++ ++ getPowerBase(Adapter, pPowerLevel, Channel, &powerBase0[0], &powerBase1[0]); ++ ++ for(index=0; index<6; index++) ++ { ++ getTxPowerWriteValByRegulatory(Adapter, Channel, index, ++ &powerBase0[0], &powerBase1[0], &writeVal[0]); ++ ++ writeOFDMPowerReg(Adapter, index, &writeVal[0]); ++ } ++ ++} ++ ++ ++static VOID ++phy_RF6052_Config_HardCode( ++ IN PADAPTER Adapter ++ ) ++{ ++ ++ // Set Default Bandwidth to 20M ++ //Adapter->HalFunc .SetBWModeHandler(Adapter, HT_CHANNEL_WIDTH_20); ++ ++ // TODO: Set Default Channel to channel one for RTL8225 ++ ++} ++ ++static int ++phy_RF6052_Config_ParaFile( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 u4RegValue; ++ u8 eRFPath; ++ BB_REGISTER_DEFINITION_T *pPhyReg; ++ ++ int rtStatus = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ static char sz88CRadioAFile[] = RTL8188C_PHY_RADIO_A; ++ static char sz88CRadioBFile[] = RTL8188C_PHY_RADIO_B; ++#ifdef CONFIG_USB_HCI ++ static char sz88CRadioAFile_mCard[] = RTL8188C_PHY_RADIO_A_mCard; ++ static char sz88CRadioBFile_mCard[] = RTL8188C_PHY_RADIO_B_mCard; ++ static char sz88CRadioAFile_HP[] = RTL8188C_PHY_RADIO_A_HP; ++#endif ++ static char sz92CRadioAFile[] = RTL8192C_PHY_RADIO_A; ++ static char sz92CRadioBFile[] = RTL8192C_PHY_RADIO_B; ++ static char sz8723RadioAFile[] = RTL8723_PHY_RADIO_A; ++ static char sz8723RadioBFile[] = RTL8723_PHY_RADIO_B; ++ char *pszRadioAFile, *pszRadioBFile; ++ ++ ++ if(IS_HARDWARE_TYPE_8192C(Adapter)) ++ { ++ if(IS_92C_SERIAL( pHalData->VersionID))// 88c's IPA is different from 92c's ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ pszRadioAFile = sz92CRadioAFile; ++ pszRadioBFile = sz92CRadioBFile; ++ } ++ else ++ { ++ rtStatus = _FAIL; ++ return rtStatus; ++ } ++ } ++ else ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ pszRadioAFile = sz88CRadioAFile; ++ pszRadioBFile = sz88CRadioBFile; ++#ifdef CONFIG_USB_HCI ++ if( BOARD_MINICARD == pHalData->BoardType) ++ { ++ pszRadioAFile = sz88CRadioAFile_mCard; ++ pszRadioBFile = sz88CRadioBFile_mCard; ++ } ++ else if( BOARD_USB_High_PA == pHalData->BoardType) ++ { ++ pszRadioAFile = sz88CRadioAFile_HP; ++ } ++#endif ++ } ++ else ++ { ++ rtStatus = _FAIL; ++ return rtStatus; ++ } ++ } ++ } ++ else if(IS_HARDWARE_TYPE_8723(Adapter)) ++ { ++ pszRadioAFile = sz8723RadioAFile; ++ pszRadioBFile = sz8723RadioBFile; ++ } ++ ++ //3//----------------------------------------------------------------- ++ //3// <2> Initialize RF ++ //3//----------------------------------------------------------------- ++ //for(eRFPath = RF90_PATH_A; eRFPath NumTotalRFPath; eRFPath++) ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ { ++ ++ pPhyReg = &pHalData->PHYRegDef[eRFPath]; ++ ++ /*----Store original RFENV control type----*/ ++ switch(eRFPath) ++ { ++ case RF90_PATH_A: ++ case RF90_PATH_C: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV); ++ break; ++ case RF90_PATH_B : ++ case RF90_PATH_D: ++ u4RegValue = PHY_QueryBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16); ++ break; ++ } ++ ++ /*----Set RF_ENV enable----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfe, bRFSI_RFENV<<16, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Set RF_ENV output high----*/ ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfo, bRFSI_RFENV, 0x1); ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /* Set bit number of Address and Data for RF register */ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); // Set 1 to 4 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ PHY_SetBBReg(Adapter, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); // Set 0 to 12 bits for 8255 ++ rtw_udelay_os(1);//PlatformStallExecution(1); ++ ++ /*----Initialize RF fom connfiguration file----*/ ++ switch(eRFPath) ++ { ++ case RF90_PATH_A: ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus= rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); ++#else ++ rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioAFile, (RF90_RADIO_PATH_E)eRFPath); ++#endif ++ break; ++ case RF90_PATH_B: ++#ifdef CONFIG_EMBEDDED_FWIMG ++ rtStatus = rtl8192c_PHY_ConfigRFWithHeaderFile(Adapter,(RF90_RADIO_PATH_E)eRFPath); ++#else ++ rtStatus = rtl8192c_PHY_ConfigRFWithParaFile(Adapter, pszRadioBFile, (RF90_RADIO_PATH_E)eRFPath); ++#endif ++ break; ++ case RF90_PATH_C: ++ break; ++ case RF90_PATH_D: ++ break; ++ } ++ ++ /*----Restore RFENV control type----*/; ++ switch(eRFPath) ++ { ++ case RF90_PATH_A: ++ case RF90_PATH_C: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV, u4RegValue); ++ break; ++ case RF90_PATH_B : ++ case RF90_PATH_D: ++ PHY_SetBBReg(Adapter, pPhyReg->rfintfs, bRFSI_RFENV<<16, u4RegValue); ++ break; ++ } ++ ++ if(rtStatus != _SUCCESS){ ++ //RT_TRACE(COMP_FPGA, DBG_LOUD, ("phy_RF6052_Config_ParaFile():Radio[%d] Fail!!", eRFPath)); ++ goto phy_RF6052_Config_ParaFile_Fail; ++ } ++ ++ } ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<---phy_RF6052_Config_ParaFile()\n")); ++ return rtStatus; ++ ++phy_RF6052_Config_ParaFile_Fail: ++ return rtStatus; ++} ++ ++ ++int ++PHY_RF6052_Config8192C( ++ IN PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ int rtStatus = _SUCCESS; ++ ++ // ++ // Initialize general global value ++ // ++ // TODO: Extend RF_PATH_C and RF_PATH_D in the future ++ if(pHalData->rf_type == RF_1T1R) ++ pHalData->NumTotalRFPath = 1; ++ else ++ pHalData->NumTotalRFPath = 2; ++ ++ // ++ // Config BB and RF ++ // ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++#if 0 ++ switch( Adapter->MgntInfo.bRegHwParaFile ) ++ { ++ case 0: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ ++ case 1: ++ rtStatus = phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ case 2: ++ // Partial Modify. ++ phy_RF6052_Config_HardCode(Adapter); ++ phy_RF6052_Config_ParaFile(Adapter); ++ break; ++ ++ default: ++ phy_RF6052_Config_HardCode(Adapter); ++ break; ++ } ++#endif ++ return rtStatus; ++ ++} ++ ++ ++// ++// ==> RF shadow Operation API Code Section!!! ++// ++/*----------------------------------------------------------------------------- ++ * Function: PHY_RFShadowRead ++ * PHY_RFShadowWrite ++ * PHY_RFShadowCompare ++ * PHY_RFShadowRecorver ++ * PHY_RFShadowCompareAll ++ * PHY_RFShadowRecorverAll ++ * PHY_RFShadowCompareFlagSet ++ * PHY_RFShadowRecorverFlagSet ++ * ++ * Overview: When we set RF register, we must write shadow at first. ++ * When we are running, we must compare shadow abd locate error addr. ++ * Decide to recorver or not. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 11/20/2008 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++u32 ++PHY_RFShadowRead( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ return RF_Shadow[eRFPath][Offset].Value; ++ ++} /* PHY_RFShadowRead */ ++ ++ ++VOID ++PHY_RFShadowWrite( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u32 Data) ++{ ++ RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); ++ RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE; ++ ++} /* PHY_RFShadowWrite */ ++ ++ ++BOOLEAN ++PHY_RFShadowCompare( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ u32 reg; ++ // Check if we need to check the register ++ if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) ++ { ++ reg = PHY_QueryRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask); ++ // Compare shadow and real rf register for 20bits!! ++ if (RF_Shadow[eRFPath][Offset].Value != reg) ++ { ++ // Locate error position. ++ RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", ++ //eRFPath, Offset, reg)); ++ } ++ return RF_Shadow[eRFPath][Offset].ErrorOrNot ; ++ } ++ return _FALSE; ++} /* PHY_RFShadowCompare */ ++ ++ ++VOID ++PHY_RFShadowRecorver( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset) ++{ ++ // Check if the address is error ++ if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) ++ { ++ // Check if we need to recorver the register. ++ if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) ++ { ++ PHY_SetRFReg(Adapter, eRFPath, Offset, bRFRegOffsetMask, ++ RF_Shadow[eRFPath][Offset].Value); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ++ //("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", ++ //eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); ++ } ++ } ++ ++} /* PHY_RFShadowRecorver */ ++ ++ ++VOID ++PHY_RFShadowCompareAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ PHY_RFShadowCompare(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); ++ } ++ } ++ ++} /* PHY_RFShadowCompareAll */ ++ ++ ++VOID ++PHY_RFShadowRecorverAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ PHY_RFShadowRecorver(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset); ++ } ++ } ++ ++} /* PHY_RFShadowRecorverAll */ ++ ++ ++VOID ++PHY_RFShadowCompareFlagSet( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u8 Type) ++{ ++ // Set True or False!!! ++ RF_Shadow[eRFPath][Offset].Compare = Type; ++ ++} /* PHY_RFShadowCompareFlagSet */ ++ ++ ++VOID ++PHY_RFShadowRecorverFlagSet( ++ IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 Offset, ++ IN u8 Type) ++{ ++ // Set True or False!!! ++ RF_Shadow[eRFPath][Offset].Recorver= Type; ++ ++} /* PHY_RFShadowRecorverFlagSet */ ++ ++ ++VOID ++PHY_RFShadowCompareFlagSetAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! ++ if (Offset != 0x26 && Offset != 0x27) ++ PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); ++ else ++ PHY_RFShadowCompareFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); ++ } ++ } ++ ++} /* PHY_RFShadowCompareFlagSetAll */ ++ ++ ++VOID ++PHY_RFShadowRecorverFlagSetAll( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ // 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! ++ if (Offset != 0x26 && Offset != 0x27) ++ PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _FALSE); ++ else ++ PHY_RFShadowRecorverFlagSet(Adapter, (RF90_RADIO_PATH_E)eRFPath, Offset, _TRUE); ++ } ++ } ++ ++} /* PHY_RFShadowCompareFlagSetAll */ ++ ++VOID ++PHY_RFShadowRefresh( ++ IN PADAPTER Adapter) ++{ ++ u32 eRFPath; ++ u32 Offset; ++ ++ for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) ++ { ++ for (Offset = 0; Offset <= RF6052_MAX_REG; Offset++) ++ { ++ RF_Shadow[eRFPath][Offset].Value = 0; ++ RF_Shadow[eRFPath][Offset].Compare = _FALSE; ++ RF_Shadow[eRFPath][Offset].Recorver = _FALSE; ++ RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE; ++ RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE; ++ } ++ } ++ ++} /* PHY_RFShadowRead */ ++ ++/* End of HalRf6052.c */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_rxdesc.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,767 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _RTL8192C_REDESC_C_ ++#include ++#include ++#include ++#include ++ ++static u8 evm_db2percentage(s8 value) ++{ ++ // ++ // -33dB~0dB to 0%~99% ++ // ++ s8 ret_val; ++ ++ ret_val = value; ++ //ret_val /= 2; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("EVMdbToPercentage92S Value=%d / %x \n", ret_val, ret_val)); ++ ++ if(ret_val >= 0) ++ ret_val = 0; ++ if(ret_val <= -33) ++ ret_val = -33; ++ ++ ret_val = 0 - ret_val; ++ ret_val*=3; ++ ++ if(ret_val == 99) ++ ret_val = 100; ++ ++ return(ret_val); ++} ++ ++ ++static s32 signal_scale_mapping(_adapter *padapter, s32 cur_sig ) ++{ ++ s32 ret_sig; ++ ++#ifdef CONFIG_USB_HCI ++ if(cur_sig >= 51 && cur_sig <= 100) ++ { ++ ret_sig = 100; ++ } ++ else if(cur_sig >= 41 && cur_sig <= 50) ++ { ++ ret_sig = 80 + ((cur_sig - 40)*2); ++ } ++ else if(cur_sig >= 31 && cur_sig <= 40) ++ { ++ ret_sig = 66 + (cur_sig - 30); ++ } ++ else if(cur_sig >= 21 && cur_sig <= 30) ++ { ++ ret_sig = 54 + (cur_sig - 20); ++ } ++ else if(cur_sig >= 10 && cur_sig <= 20) ++ { ++ ret_sig = 42 + (((cur_sig - 10) * 2) / 3); ++ } ++ else if(cur_sig >= 5 && cur_sig <= 9) ++ { ++ ret_sig = 22 + (((cur_sig - 5) * 3) / 2); ++ } ++ else if(cur_sig >= 1 && cur_sig <= 4) ++ { ++ ret_sig = 6 + (((cur_sig - 1) * 3) / 2); ++ } ++ else ++ { ++ ret_sig = cur_sig; ++ } ++#else ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // Step 1. Scale mapping. ++ // 20100611 Joseph: Re-tunning RSSI presentation for Lenovo. ++ // 20100426 Joseph: Modify Signal strength mapping. ++ // This modification makes the RSSI indication similar to Intel solution. ++ // 20100414 Joseph: Tunning RSSI for Lenovo according to RTL8191SE. ++ if(cur_sig >= 54 && cur_sig <= 100) ++ { ++ ret_sig = 100; ++ } ++ else if(cur_sig>=42 && cur_sig <= 53 ) ++ { ++ ret_sig = 95; ++ } ++ else if(cur_sig>=36 && cur_sig <= 41 ) ++ { ++ ret_sig = 74 + ((cur_sig - 36) *20)/6; ++ } ++ else if(cur_sig>=33 && cur_sig <= 35 ) ++ { ++ ret_sig = 65 + ((cur_sig - 33) *8)/2; ++ } ++ else if(cur_sig>=18 && cur_sig <= 32 ) ++ { ++ ret_sig = 62 + ((cur_sig - 18) *2)/15; ++ } ++ else if(cur_sig>=15 && cur_sig <= 17 ) ++ { ++ ret_sig = 33 + ((cur_sig - 15) *28)/2; ++ } ++ else if(cur_sig>=10 && cur_sig <= 14 ) ++ { ++ ret_sig = 39; ++ } ++ else if(cur_sig>=8 && cur_sig <= 9 ) ++ { ++ ret_sig = 33; ++ } ++ else if(cur_sig <= 8 ) ++ { ++ ret_sig = 19; ++ } ++ } ++ else ++ { ++ // Step 1. Scale mapping. ++ if(cur_sig >= 61 && cur_sig <= 100) ++ { ++ ret_sig = 90 + ((cur_sig - 60) / 4); ++ } ++ else if(cur_sig >= 41 && cur_sig <= 60) ++ { ++ ret_sig = 78 + ((cur_sig - 40) / 2); ++ } ++ else if(cur_sig >= 31 && cur_sig <= 40) ++ { ++ ret_sig = 66 + (cur_sig - 30); ++ } ++ else if(cur_sig >= 21 && cur_sig <= 30) ++ { ++ ret_sig = 54 + (cur_sig - 20); ++ } ++ else if(cur_sig >= 5 && cur_sig <= 20) ++ { ++ ret_sig = 42 + (((cur_sig - 5) * 2) / 3); ++ } ++ else if(cur_sig == 4) ++ { ++ ret_sig = 36; ++ } ++ else if(cur_sig == 3) ++ { ++ ret_sig = 27; ++ } ++ else if(cur_sig == 2) ++ { ++ ret_sig = 18; ++ } ++ else if(cur_sig == 1) ++ { ++ ret_sig = 9; ++ } ++ else ++ { ++ ret_sig = cur_sig; ++ } ++ } ++#endif ++ ++ return ret_sig; ++} ++ ++ ++static s32 translate2dbm(u8 signal_strength_idx) ++{ ++ s32 signal_power; // in dBm. ++ ++ ++ // Translate to dBm (x=0.5y-95). ++ signal_power = (s32)((signal_strength_idx + 1) >> 1); ++ signal_power -= 95; ++ ++ return signal_power; ++} ++ ++void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat) ++{ ++ PHY_STS_OFDM_8192CD_T *pOfdm_buf; ++ PHY_STS_CCK_8192CD_T *pCck_buf; ++ u8 i, max_spatial_stream, evm; ++ s8 rx_pwr[4], rx_pwr_all = 0; ++ u8 pwdb_all; ++ u32 rssi,total_rssi=0; ++ u8 bcck_rate=0, rf_rx_num = 0, cck_highpwr = 0; ++ _adapter *padapter = prframe->u.hdr.adapter; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 tmp_rxsnr; ++ s8 rx_snrX; ++ ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ PHY_RX_DRIVER_INFO_8192CD *pDrvInfo = ((PHY_RX_DRIVER_INFO_8192CD *)pphy_stat); ++ u8 bant1_sel = (pDrvInfo->ANTSEL == 1)?_TRUE:_FALSE; ++#endif ++ ++ // Record it for next packet processing ++ bcck_rate=(pattrib->mcs_rate<=3? 1:0); ++ ++ if(bcck_rate) //CCK ++ { ++ u8 report; ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ if(bant1_sel == _TRUE) ++ pHalData->CCK_Ant1_Cnt++; ++ else ++ pHalData->CCK_Ant2_Cnt++; ++#endif ++ ++ // CCK Driver info Structure is not the same as OFDM packet. ++ pCck_buf = (PHY_STS_CCK_8192CD_T *)pphy_stat; ++ //Adapter->RxStats.NumQryPhyStatusCCK++; ++ ++ // ++ // (1)Hardware does not provide RSSI for CCK ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive) ++ // ++ ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_on) ++ cck_highpwr = (u8)pHalData->bCckHighPower; ++ else ++ cck_highpwr = _FALSE; ++ ++ if(!cck_highpwr) ++ { ++ report = pCck_buf->cck_agc_rpt&0xc0; ++ report = report>>6; ++ switch(report) ++ { ++ // 03312009 modified by cosa ++ // Modify the RF RNA gain value to -40, -20, -2, 14 by Jenyu's suggestion ++ // Note: different RF with the different RNA gain. ++ case 0x3: ++ rx_pwr_all = (-46) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x2: ++ rx_pwr_all = (-26) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x1: ++ rx_pwr_all = (-12) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ case 0x0: ++ rx_pwr_all = (16) - (pCck_buf->cck_agc_rpt & 0x3e); ++ break; ++ } ++ } ++ else ++ { ++ report = pCck_buf->cck_agc_rpt & 0x60; ++ report = report>>5; ++ switch(report) ++ { ++ case 0x3: ++ rx_pwr_all = (-46) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x2: ++ rx_pwr_all = (-26)- ((pCck_buf->cck_agc_rpt & 0x1f)<<1); ++ break; ++ case 0x1: ++ rx_pwr_all = (-12) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ case 0x0: ++ rx_pwr_all = (16) - ((pCck_buf->cck_agc_rpt & 0x1f)<<1) ; ++ break; ++ } ++ } ++ ++ pwdb_all= query_rx_pwr_percentage(rx_pwr_all); ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // CCK gain is smaller than OFDM/MCS gain, ++ // so we add gain diff by experiences, the val is 6 ++ pwdb_all+=6; ++ if(pwdb_all > 100) ++ pwdb_all = 100; ++ // modify the offset to make the same gain index with OFDM. ++ if(pwdb_all > 34 && pwdb_all <= 42) ++ pwdb_all -= 2; ++ else if(pwdb_all > 26 && pwdb_all <= 34) ++ pwdb_all -= 6; ++ else if(pwdb_all > 14 && pwdb_all <= 26) ++ pwdb_all -= 8; ++ else if(pwdb_all > 4 && pwdb_all <= 14) ++ pwdb_all -= 4; ++ } ++ ++ pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive ++ pattrib->RecvSignalPower = rx_pwr_all; //dBM ++ padapter->recvpriv.rxpwdb = rx_pwr_all; ++ // ++ // (3) Get Signal Quality (EVM) ++ // ++ //if(bPacketMatchBSSID) ++ { ++ u8 sq; ++ ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ // mapping to 5 bars for vista signal strength ++ // signal quality in driver will be displayed to signal strength ++ // in vista. ++ if(pwdb_all >= 50) ++ sq = 100; ++ else if(pwdb_all >= 35 && pwdb_all < 50) ++ sq = 80; ++ else if(pwdb_all >= 22 && pwdb_all < 35) ++ sq = 60; ++ else if(pwdb_all >= 18 && pwdb_all < 22) ++ sq = 40; ++ else ++ sq = 20; ++ } ++ else ++ { ++ if(pwdb_all> 40) ++ { ++ sq = 100; ++ } ++ else ++ { ++ sq = pCck_buf->SQ_rpt; ++ ++ if(pCck_buf->SQ_rpt > 64) ++ sq = 0; ++ else if (pCck_buf->SQ_rpt < 20) ++ sq= 100; ++ else ++ sq = ((64-sq) * 100) / 44; ++ ++ } ++ } ++ ++ pattrib->signal_qual=sq; ++ pattrib->rx_mimo_signal_qual[0]=sq; ++ pattrib->rx_mimo_signal_qual[1]=(-1); ++ } ++ ++ } ++ else //OFDM/HT ++ { ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ if(bant1_sel == _TRUE) ++ pHalData->OFDM_Ant1_Cnt++; ++ else ++ pHalData->OFDM_Ant2_Cnt++; ++#endif ++ pdmpriv->OFDM_Pkt_Cnt++; ++ ++ pOfdm_buf = (PHY_STS_OFDM_8192CD_T *)pphy_stat; ++ ++ // ++ // (1)Get RSSI per-path ++ // ++ for(i=0; iNumTotalRFPath; i++) ++ { ++ // 2008/01/30 MH we will judge RF RX path now. ++ if (pHalData->bRFPathRxEnable[i]) ++ rf_rx_num++; ++ //else ++ //continue; ++ ++ rx_pwr[i] = ((pOfdm_buf->trsw_gain_X[i]&0x3F)*2) - 110; ++ pattrib->rx_rssi[i]=query_rx_pwr_percentage(rx_pwr[i]); ++ /* Translate DBM to percentage. */ ++ rssi=query_rx_pwr_percentage(rx_pwr[i]); ++ total_rssi += rssi; ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RF-%d RXPWR=%x RSSI=%d\n", i, rx_pwr[i], rssi)); ++ ++ //Get Rx snr value in DB ++ tmp_rxsnr = pOfdm_buf->rxsnr_X[i]; ++ rx_snrX = (s8)(tmp_rxsnr); ++ rx_snrX >>= 1; ++ padapter->recvpriv.RxSNRdB[i] = (int)rx_snrX; ++ pattrib->rx_snr[i]=pOfdm_buf->rxsnr_X[i]; ++ /* Record Signal Strength for next packet */ ++ //if(bPacketMatchBSSID) ++ { ++ //pRfd->Status.RxMIMOSignalStrength[i] =(u1Byte) RSSI; ++ ++ //The following is for lenovo signal strength in vista ++ if(pHalData->CustomerID == RT_CID_819x_Lenovo) ++ { ++ u8 sq; ++ ++ if(i == 0) ++ { ++ // mapping to 5 bars for vista signal strength ++ // signal quality in driver will be displayed to signal strength ++ // in vista. ++ if(rssi >= 50) ++ sq = 100; ++ else if(rssi >= 35 && rssi < 50) ++ sq = 80; ++ else if(rssi >= 22 && rssi < 35) ++ sq = 60; ++ else if(rssi >= 18 && rssi < 22) ++ sq = 40; ++ else ++ sq = 20; ++ //DbgPrint("ofdm/mcs RSSI=%d\n", RSSI); ++ //pRfd->Status.SignalQuality = SQ; ++ //DbgPrint("ofdm/mcs SQ = %d\n", pRfd->Status.SignalQuality); ++ } ++ } ++ } ++ } ++ ++ ++ // ++ // (2)PWDB, Average PWDB cacluated by hardware (for rate adaptive),average ++ // ++ rx_pwr_all = (((pOfdm_buf->pwdb_all ) >> 1 )& 0x7f) -110;//for OFDM Average RSSI ++ pwdb_all = query_rx_pwr_percentage(rx_pwr_all); ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("PWDB_ALL=%d\n", pwdb_all)); ++ ++ pattrib->RxPWDBAll = pwdb_all; //for DIG/rate adaptive ++ pattrib->RecvSignalPower = rx_pwr_all;//dBM ++ padapter->recvpriv.rxpwdb = rx_pwr_all; ++ // ++ // (3)EVM of HT rate ++ // ++ if(pHalData->CustomerID != RT_CID_819x_Lenovo) ++ { ++ if(pattrib->rxht && pattrib->mcs_rate >=20 && pattrib->mcs_rate<=27) ++ max_spatial_stream = 2; //both spatial stream make sense ++ else ++ max_spatial_stream = 1; //only spatial stream 1 makes sense ++ ++ for(i=0; i>= 1" because the compilor of free build environment ++ // fill most significant bit to "zero" when doing shifting operation which may change a negative ++ // value to positive one, then the dbm value (which is supposed to be negative) is not correct anymore. ++ evm = evm_db2percentage( (pOfdm_buf->rxevm_X[i]/*/ 2*/));//dbm ++ ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("RXRATE=%x RXEVM=%x EVM=%s%d\n", ++ pattrib->mcs_rate, pOfdm_buf->rxevm_X[i], "%",evm)); ++ ++ //if(bPacketMatchBSSID) ++ { ++ if(i==0) // Fill value in RFD, Get the first spatial stream only ++ { ++ pattrib->signal_qual = (u8)(evm & 0xff); ++ } ++ pattrib->rx_mimo_signal_qual[i] = (u8)(evm & 0xff); ++ } ++ } ++ ++ } ++ ++ // ++ // 4. Record rx statistics for debug ++ // ++ ++ } ++ ++ ++ //UI BSS List signal strength(in percentage), make it good looking, from 0~100. ++ //It is assigned to the BSS List in GetValueFromBeaconOrProbeRsp(). ++ if(bcck_rate) ++ { ++ pattrib->signal_strength=(u8)signal_scale_mapping(padapter, pwdb_all); ++ } ++ else ++ { ++ if (rf_rx_num != 0) ++ { ++ pattrib->signal_strength= (u8)(signal_scale_mapping(padapter, total_rssi/=rf_rx_num)); ++ } ++ } ++ //DBG_8192C("%s,rx_pwr_all(%d),RxPWDBAll(%d)\n",__FUNCTION__,rx_pwr_all,pattrib->RxPWDBAll); ++ ++} ++ ++ ++static void process_rssi(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_rssi, tmp_val; ++ struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat = &padapter->recvpriv.signal_strength_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_rssi=> pattrib->rssil(%d) signal_strength(%d)\n ",pattrib->RecvSignalPower,pattrib->signal_strength); ++ //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) ++ { ++ ++ #ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->signal_strength; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ #else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //Adapter->RxStats.RssiCalculateCnt++; //For antenna Test ++ if(padapter->recvpriv.signal_strength_data.total_num++ >= PHY_RSSI_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_strength_data.total_num = PHY_RSSI_SLID_WIN_MAX; ++ last_rssi = padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index]; ++ padapter->recvpriv.signal_strength_data.total_val -= last_rssi; ++ } ++ padapter->recvpriv.signal_strength_data.total_val +=pattrib->signal_strength; ++ ++ padapter->recvpriv.signal_strength_data.elements[padapter->recvpriv.signal_strength_data.index++] = pattrib->signal_strength; ++ if(padapter->recvpriv.signal_strength_data.index >= PHY_RSSI_SLID_WIN_MAX) ++ padapter->recvpriv.signal_strength_data.index = 0; ++ ++ ++ tmp_val = padapter->recvpriv.signal_strength_data.total_val/padapter->recvpriv.signal_strength_data.total_num; ++ ++ if(padapter->recvpriv.is_signal_dbg) { ++ padapter->recvpriv.signal_strength= padapter->recvpriv.signal_strength_dbg; ++ padapter->recvpriv.rssi=(s8)translate2dbm((u8)padapter->recvpriv.signal_strength_dbg); ++ } else { ++ padapter->recvpriv.signal_strength= tmp_val; ++ padapter->recvpriv.rssi=(s8)translate2dbm((u8)tmp_val); ++ } ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("UI RSSI = %d, ui_rssi.TotalVal = %d, ui_rssi.TotalNum = %d\n", tmp_val, padapter->recvpriv.signal_strength_data.total_val,padapter->recvpriv.signal_strength_data.total_num)); ++ #endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ } ++ ++}// Process_UI_RSSI_8192C ++ ++ ++static void process_PWDB(_adapter *padapter, union recv_frame *prframe) ++{ ++ int UndecoratedSmoothedPWDB; ++ int UndecoratedSmoothedCCK; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct rx_pkt_attrib *pattrib= &prframe->u.hdr.attrib; ++ struct sta_info *psta = prframe->u.hdr.psta; ++ u8 isCCKrate=(pattrib->mcs_rate<=3? 1:0); ++ ++ ++ if(psta) ++ { ++ UndecoratedSmoothedPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; ++ UndecoratedSmoothedCCK = psta->rssi_stat.UndecoratedSmoothedCCK; ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = pdmpriv->UndecoratedSmoothedPWDB; ++ UndecoratedSmoothedCCK = pdmpriv->UndecoratedSmoothedCCK; ++ } ++ ++ //if(pRfd->Status.bPacketToSelf || pRfd->Status.bPacketBeacon) ++ ++ if(!isCCKrate) ++ { ++ // Process OFDM RSSI ++ if(UndecoratedSmoothedPWDB < 0) // initialize ++ { ++ UndecoratedSmoothedPWDB = pattrib->RxPWDBAll; ++ } ++ ++ if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedPWDB) ++ { ++ UndecoratedSmoothedPWDB = ++ ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ ++ UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedPWDB = ++ ( ((UndecoratedSmoothedPWDB)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ else ++ { ++ // Process CCK RSSI ++ if(UndecoratedSmoothedCCK < 0) // initialize ++ { ++ UndecoratedSmoothedCCK = pattrib->RxPWDBAll; ++ } ++ ++ if(pattrib->RxPWDBAll > (u32)UndecoratedSmoothedCCK) ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ ++ UndecoratedSmoothedCCK = UndecoratedSmoothedCCK + 1; ++ } ++ else ++ { ++ UndecoratedSmoothedCCK = ++ ( ((UndecoratedSmoothedCCK)*(Rx_Smooth_Factor-1)) + ++ (pattrib->RxPWDBAll)) /(Rx_Smooth_Factor); ++ } ++ } ++ ++ ++ if(psta) ++ { ++ //psta->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB;//todo: ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ if(pdmpriv->RSSI_Select == RSSI_OFDM){ ++ psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ else if(pdmpriv->RSSI_Select == RSSI_CCK){ ++ psta->rssi_stat.UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ } ++ else{ ++ if(UndecoratedSmoothedPWDB <0 ) ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ else ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ psta->rssi_stat.UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ } ++ else ++ { ++ //pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ if(pdmpriv->RSSI_Select == RSSI_OFDM){ ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ } ++ else if(pdmpriv->RSSI_Select == RSSI_CCK){ ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ } ++ else { ++ if(UndecoratedSmoothedPWDB <0 ) ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedCCK; ++ else ++ pdmpriv->UndecoratedSmoothedPWDB = UndecoratedSmoothedPWDB; ++ ++ } ++ pdmpriv->UndecoratedSmoothedCCK = UndecoratedSmoothedCCK; ++ } ++ ++ //UpdateRxSignalStatistics8192C(padapter, prframe); ++ ++} ++ ++ ++static void process_link_qual(_adapter *padapter,union recv_frame *prframe) ++{ ++ u32 last_evm=0, tmpVal; ++ struct rx_pkt_attrib *pattrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ struct signal_stat * signal_stat; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ if(prframe == NULL || padapter==NULL){ ++ return; ++ } ++ ++ pattrib = &prframe->u.hdr.attrib; ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ signal_stat = &padapter->recvpriv.signal_qual_data; ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++ //DBG_8192C("process_link_qual=> pattrib->signal_qual(%d)\n ",pattrib->signal_qual); ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(signal_stat->update_req) { ++ signal_stat->total_num = 0; ++ signal_stat->total_val = 0; ++ signal_stat->update_req = 0; ++ } ++ ++ signal_stat->total_num++; ++ signal_stat->total_val += pattrib->signal_qual; ++ signal_stat->avg_val = signal_stat->total_val / signal_stat->total_num; ++ ++#else //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ if(pattrib->signal_qual != 0) ++ { ++ // ++ // 1. Record the general EVM to the sliding window. ++ // ++ if(padapter->recvpriv.signal_qual_data.total_num++ >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ { ++ padapter->recvpriv.signal_qual_data.total_num = PHY_LINKQUALITY_SLID_WIN_MAX; ++ last_evm = padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index]; ++ padapter->recvpriv.signal_qual_data.total_val -= last_evm; ++ } ++ padapter->recvpriv.signal_qual_data.total_val += pattrib->signal_qual; ++ ++ padapter->recvpriv.signal_qual_data.elements[padapter->recvpriv.signal_qual_data.index++] = pattrib->signal_qual; ++ if(padapter->recvpriv.signal_qual_data.index >= PHY_LINKQUALITY_SLID_WIN_MAX) ++ padapter->recvpriv.signal_qual_data.index = 0; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("Total SQ=%d pattrib->signal_qual= %d\n", padapter->recvpriv.signal_qual_data.total_val, pattrib->signal_qual)); ++ ++ // <1> Showed on UI for user, in percentage. ++ tmpVal = padapter->recvpriv.signal_qual_data.total_val/padapter->recvpriv.signal_qual_data.total_num; ++ padapter->recvpriv.signal_qual=(u8)tmpVal; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,(" pattrib->signal_qual =%d\n", pattrib->signal_qual)); ++ } ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++}// Process_UiLinkQuality8192S ++ ++ ++//void rtl8192c_process_phy_info(_adapter *padapter, union recv_frame *prframe) ++void rtl8192c_process_phy_info(_adapter *padapter, void *prframe) ++{ ++ union recv_frame *precvframe = (union recv_frame *)prframe; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ // If we switch to the antenna for testing, the signal strength ++ // of the packets in this time shall not be counted into total receiving power. ++ // This prevents error counting Rx signal strength and affecting other dynamic mechanism. ++ ++ // Select the packets to do RSSI checking for antenna switching. ++ SwAntDivRSSICheck8192C(padapter, precvframe->u.hdr.attrib.RxPWDBAll); ++ ++ if(GET_HAL_DATA(padapter)->RSSI_test == _TRUE) ++ return; ++#endif ++ // ++ // Check RSSI ++ // ++ process_rssi(padapter, precvframe); ++ // ++ // Check PWDB. ++ // ++ process_PWDB(padapter, precvframe); ++ // ++ // Check EVM ++ // ++ process_link_qual(padapter, precvframe); ++ ++} ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/rtl8192c_sreset.c 2014-04-28 00:42:37.000000000 +0000 +@@ -0,0 +1,293 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#include ++#include ++#ifdef DBG_CONFIG_ERROR_DETECT ++extern void rtw_cancel_all_timer(_adapter *padapter); ++ ++void rtl8192c_sreset_init_value(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ _rtw_mutex_init(&psrtpriv->silentreset_mutex ); ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++} ++void rtl8192c_sreset_reset_value(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ psrtpriv->last_tx_time =0; ++ psrtpriv->last_tx_complete_time =0; ++} ++ ++static void _restore_security_setting(_adapter *padapter) ++{ ++ u8 EntryId = 0; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ ++ (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) ++ ? rtw_write8(padapter, REG_SECCFG, 0xcc) ++ : rtw_write8(padapter, REG_SECCFG, 0xcf); ++ ++ if ( ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_ ) || ++ ( padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_ )) ++ { ++ ++ for(EntryId=0; EntryId<4; EntryId++) ++ { ++ if(EntryId == psecuritypriv->dot11PrivacyKeyIndex) ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 1); ++ else ++ rtw_set_key(padapter,&padapter->securitypriv, EntryId, 0); ++ } ++ ++ } ++ else if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //pairwise key ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ //group key ++ rtw_set_key(padapter,&padapter->securitypriv,padapter->securitypriv.dot118021XGrpKeyid, 0); ++ } ++ } ++ ++} ++ ++static void _restore_network_status(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX*)(&(pmlmeinfo->network)); ++ unsigned short caps; ++ u8 join_type; ++#if 1 ++ ++ //======================================================= ++ // reset related register of Beacon control ++ ++ //set MSR to nolink ++ Set_NETYPE0_MSR(padapter, _HW_STATE_NOLINK_); ++ // reject all data frame ++ rtw_write16(padapter, REG_RXFLTMAP2,0x00); ++ //reset TSF ++ rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ //disable update TSF ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)); ++ else ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(4)|BIT(5)); ++ ++ //======================================================= ++ rtw_joinbss_reset(padapter); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ //pmlmeinfo->assoc_AP_vendor = maxAP; ++ ++ if (padapter->registrypriv.wifi_spec) { ++ // for WiFi test, follow WMM test plan spec ++ rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F431C); ++ rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E541C); ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x0000A525); ++ rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A549); ++ ++ // for WiFi test, mixed mode with intel STA under bg mode throughput issue ++ if (padapter->mlmepriv.htpriv.ht_option == 0) ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00004320); ++ ++ } else { ++ rtw_write32(padapter, REG_EDCA_VO_PARAM, 0x002F3217); ++ rtw_write32(padapter, REG_EDCA_VI_PARAM, 0x005E4317); ++ rtw_write32(padapter, REG_EDCA_BE_PARAM, 0x00105320); ++ rtw_write32(padapter, REG_EDCA_BK_PARAM, 0x0000A444); ++ } ++ ++ //disable dynamic functions, such as high power, DIG ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++#endif ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress); ++ join_type = 0; ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type)); ++ ++ Set_NETYPE0_MSR(padapter, (pmlmeinfo->state & 0x3)); ++ ++ mlmeext_joinbss_event_callback(padapter, 1); ++ //restore Sequence No. ++ rtw_write8(padapter,0x4dc,padapter->xmitpriv.nqos_ssn); ++} ++void rtl8192c_silentreset_for_specific_platform(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ ++#ifdef DBG_CONFIG_ERROR_RESET ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ if (!netif_queue_stopped(padapter->pnetdev)) ++ netif_stop_queue(padapter->pnetdev); ++ ++ rtw_cancel_all_timer(padapter); ++ tasklet_kill(&pxmitpriv->xmit_tasklet); ++ ++ _enter_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); ++ psrtpriv->silent_reset_inprogress = _TRUE; ++ pwrpriv->change_rfpwrstate = rf_off; ++#ifdef CONFIG_IPS ++ ips_enter(padapter); ++ ips_leave(padapter); ++#endif ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ _restore_network_status(padapter); ++ _restore_security_setting(padapter); ++ } ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY | _FW_UNDER_LINKING); ++ ++ psrtpriv->silent_reset_inprogress = _FALSE; ++ _exit_critical_mutex(&psrtpriv->silentreset_mutex, &irqL); ++ ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ if (netif_queue_stopped(padapter->pnetdev)) ++ netif_wake_queue(padapter->pnetdev); ++#endif ++} ++ ++void rtl8192c_sreset_xmit_status_check(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ unsigned long current_time; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ unsigned int diff_time; ++ u32 txdma_status; ++ if( (txdma_status=rtw_read32(padapter, REG_TXDMA_STATUS)) !=0x00){ ++ DBG_871X("%s REG_TXDMA_STATUS:0x%08x\n", __FUNCTION__, txdma_status); ++ rtl8192c_silentreset_for_specific_platform(padapter); ++ } ++ ++ //total xmit irp = 4 ++ //DBG_8192C("==>%s free_xmitbuf_cnt(%d),txirp_cnt(%d)\n",__FUNCTION__,pxmitpriv->free_xmitbuf_cnt,pxmitpriv->txirp_cnt); ++ //if(pxmitpriv->txirp_cnt == NR_XMITBUFF+1) ++ current_time = rtw_get_current_time(); ++ if(0==pxmitpriv->free_xmitbuf_cnt) ++ { ++ diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_time); ++ ++ if(diff_time > 2000){ ++ if(psrtpriv->last_tx_complete_time==0){ ++ psrtpriv->last_tx_complete_time = current_time; ++ } ++ else{ ++ diff_time = jiffies_to_msecs(current_time - psrtpriv->last_tx_complete_time); ++ if(diff_time > 4000){ ++ //padapter->Wifi_Error_Status = WIFI_TX_HANG; ++ DBG_8192C("%s tx hang\n", __FUNCTION__); ++ rtl8192c_silentreset_for_specific_platform(padapter); ++ } ++ } ++ } ++ } ++} ++void rtl8192c_sreset_linked_status_check(_adapter *padapter) ++{ ++ u32 regc50,regc58,reg824,reg800; ++ regc50 = rtw_read32(padapter,0xc50); ++ regc58 = rtw_read32(padapter,0xc58); ++ reg824 = rtw_read32(padapter,0x824); ++ reg800 = rtw_read32(padapter,0x800); ++ if( ((regc50&0xFFFFFF00)!= 0x69543400)|| ++ ((regc58&0xFFFFFF00)!= 0x69543400)|| ++ (((reg824&0xFFFFFF00)!= 0x00390000)&&(((reg824&0xFFFFFF00)!= 0x80390000)))|| ++ ( ((reg800&0xFFFFFF00)!= 0x03040000)&&((reg800&0xFFFFFF00)!= 0x83040000))) ++ { ++ DBG_8192C("%s regc50:0x%08x, regc58:0x%08x, reg824:0x%08x, reg800:0x%08x,\n", __FUNCTION__, ++ regc50, regc58, reg824, reg800); ++ rtl8192c_silentreset_for_specific_platform(padapter); ++ } ++} ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct sreset_priv *psrtpriv = &pHalData->srestpriv; ++ ++ u8 status = WIFI_STATUS_SUCCESS; ++ u32 val32 = 0; ++ _irqL irqL; ++ if(psrtpriv->silent_reset_inprogress == _TRUE) ++ { ++ return status; ++ } ++ val32 =rtw_read32(padapter,REG_TXDMA_STATUS); ++ if(val32==0xeaeaeaea){ ++ psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST; ++ } ++ else if(val32!=0){ ++ DBG_8192C("txdmastatu(%x)\n",val32); ++ psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR; ++ } ++ ++ if(WIFI_STATUS_SUCCESS !=psrtpriv->Wifi_Error_Status) ++ { ++ DBG_8192C("==>%s error_status(0x%x) \n",__FUNCTION__,psrtpriv->Wifi_Error_Status); ++ status = (psrtpriv->Wifi_Error_Status &( ~(USB_READ_PORT_FAIL|USB_WRITE_PORT_FAIL))); ++ } ++ DBG_8192C("==> %s wifi_status(0x%x)\n",__FUNCTION__,status); ++ ++ //status restore ++ psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS; ++ ++ return status; ++} ++#endif ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,9662 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/*Created on 2011/ 6/15, 5:45*/ ++ ++#include ++#include "Hal8192CUHWImg.h" ++ ++#ifdef CONFIG_BT_COEXISTENCE ++// =================== v79 TSMC COMMON 2011-10-06 ======================= ++u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x02,0x58,0x3f,0x00,0x00, ++0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0xa9, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0, ++0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0, ++0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c, ++0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22, ++0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e, ++0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01, ++0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x03,0x12,0x4f,0x2a,0x22,0x22,0x22, ++0x22,0x22,0x00,0x02,0x60,0x8d,0x02,0x60,0x94,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63, ++0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90, ++0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc, ++0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90, ++0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05, ++0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7, ++0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5, ++0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55, ++0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34, ++0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38, ++0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89, ++0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80, ++0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c, ++0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90, ++0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e, ++0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0, ++0x12,0x4d,0xe2,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4e, ++0x25,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0, ++0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x64,0xa1,0x91,0xd3, ++0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0, ++0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0, ++0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71, ++0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2, ++0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x63,0x92,0x90,0x9e,0x5e, ++0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20, ++0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x63,0x2e,0x90,0x9e,0x5e,0xe0, ++0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x5e,0xf1,0xef,0x60, ++0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20, ++0xe2,0x09,0x12,0x62,0x50,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54, ++0x0f,0xff,0xbf,0x02,0x09,0x12,0x62,0xbb,0xef,0x60,0x03,0x12,0x64,0x87,0x22,0x90, ++0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x63,0x4d, ++0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0, ++0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27, ++0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56, ++0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3, ++0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e, ++0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4, ++0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3, ++0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04, ++0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24, ++0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x66,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x77,0x1c,0xef,0x70,0x06,0x90,0x01,0xc8,0x74, ++0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11, ++0x8f,0x11,0xdf,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7f, ++0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xff,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c, ++0x12,0x27,0xde,0x90,0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde, ++0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d, ++0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53, ++0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53, ++0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12, ++0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e,0x0b,0x12,0x2a,0x7f,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80, ++0x08,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00, ++0x47,0xe0,0x5f,0xf0,0x31,0xb9,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x31,0xb9,0x90, ++0x9e,0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45, ++0x80,0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x31,0xb1,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0, ++0x4f,0xf0,0x31,0xb9,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00, ++0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0, ++0x31,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f, ++0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x31, ++0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60, ++0x02,0x61,0x7d,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd, ++0x7f,0x48,0x51,0xc1,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90, ++0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45, ++0xe0,0x54,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f, ++0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0, ++0x44,0x20,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45, ++0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x51,0xc1,0x22,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0, ++0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f, ++0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b, ++0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d, ++0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff, ++0xd1,0xd8,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02, ++0x81,0x84,0x90,0x9e,0x1b,0xe0,0x70,0x02,0x81,0x84,0x90,0x9e,0x1f,0xe0,0x70,0x02, ++0x81,0x84,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74, ++0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x51,0xb8,0x90,0x00,0x46,0xe0, ++0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f, ++0x45,0x51,0xc1,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05, ++0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05, ++0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e, ++0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12, ++0x37,0x00,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e,0x51,0xb7,0x90, ++0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x05,0x22,0xe4,0xf0,0xa2, ++0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90, ++0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74, ++0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f,0xab, ++0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe, ++0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16, ++0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a,0x7f, ++0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08, ++0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x2a, ++0x7f,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e, ++0x08,0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x51, ++0xc1,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0, ++0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xef, ++0xfd,0x7f,0x46,0x51,0xc1,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd, ++0x7f,0x54,0x51,0xc1,0x7d,0xff,0x7f,0x55,0x51,0xc1,0x7d,0xff,0x7f,0x56,0x51,0xc1, ++0x7d,0xff,0x7f,0x57,0x41,0xc1,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x51,0xc1, ++0xe4,0xfd,0x7f,0x51,0x51,0xc1,0xe4,0xfd,0x7f,0x52,0x51,0xc1,0xe4,0xfd,0x7f,0x53, ++0x41,0xc1,0xe5,0x22,0x64,0x01,0x70,0x3c,0xf1,0xbe,0xbf,0x01,0x05,0x7f,0x01,0x12, ++0x44,0xf1,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x00,0x44, ++0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f, ++0x46,0x51,0xc1,0x7f,0x02,0xf1,0xea,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4, ++0x01,0x02,0xf1,0x2a,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd7,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x2e,0xe0,0x70,0x31, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0xd1,0xd8,0x90,0x9e,0x2e,0x74,0x01,0x51,0xb7,0x80, ++0x3f,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x37,0x90,0x9e,0x1f,0xe0,0xff,0xd1,0xd8, ++0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x51,0xc1, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b, ++0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3, ++0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0, ++0x04,0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb1,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x51,0xc1,0x90,0x9e,0xb1, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x41,0xc1,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c, ++0x89,0x5d,0xe4,0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x31,0xb9,0xe5,0x59, ++0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x31,0xb9,0x90,0x00,0x33, ++0xe0,0x54,0x7f,0xf0,0x31,0xb9,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34, ++0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3, ++0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42, ++0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x45,0xb1,0xbf,0x01,0x10,0x90,0x02,0x09, ++0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x7f,0x0b, ++0xf1,0xea,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80, ++0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x9e,0x74,0xf0,0x90, ++0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x41,0xc1,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0, ++0x12,0x49,0xb9,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe, ++0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff, ++0x80,0x44,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x49,0xb1,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01, ++0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7, ++0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x75,0x28,0x33,0xe4,0xf5, ++0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0, ++0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0, ++0x75,0x8e,0x02,0x12,0x4f,0xda,0x12,0x5f,0xa9,0x12,0x5f,0xbc,0xe4,0xf5,0x12,0x12, ++0x6f,0xa1,0x12,0x77,0x5d,0x12,0x60,0x9b,0x12,0x32,0x3d,0x12,0x77,0x18,0x11,0x8b, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0xf4,0x12,0x5f,0x91,0x12,0x44,0xfe,0x12,0x7d,0x1d, ++0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x4d,0x8b,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44, ++0x40,0xf0,0x12,0x49,0xb9,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe, ++0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0, ++0x24,0xa9,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2, ++0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x8e,0xe5,0x12,0x30,0xe6,0x17,0xc2,0xaf,0x53, ++0x12,0xbf,0xd2,0xaf,0x12,0x69,0x51,0x90,0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01, ++0x03,0x12,0x7d,0x7b,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7e,0x7e,0x31,0x61,0x80, ++0xb8,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35, ++0x7f,0xf9,0x7e,0x01,0x12,0x4f,0x48,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0,0x54,0x0f, ++0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x0a,0xe4,0x90,0x06,0x34,0xf0,0x22,0x90,0x01, ++0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x41, ++0xcf,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3, ++0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0xc8,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75, ++0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79, ++0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90, ++0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90, ++0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90, ++0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39, ++0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x51,0xd0,0x90,0x9e,0x34, ++0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x98,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x53,0x0b,0x01,0x53,0x14,0x02, ++0x53,0x2f,0x03,0x53,0x38,0x05,0x53,0x41,0x06,0x53,0x8f,0x07,0x53,0x49,0x09,0x53, ++0x52,0x0c,0x53,0x5b,0x0d,0x53,0x64,0x0e,0x53,0x6d,0x1b,0x53,0x76,0x1c,0x53,0x7f, ++0x2c,0x53,0x1d,0x2d,0x53,0x26,0x2e,0x00,0x00,0x53,0x88,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x61,0x9d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc4,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xca,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x12,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x40,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71, ++0x74,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x72,0x88,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4b,0x7e,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x7c,0xea,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4c,0xb8,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xbc,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xa3,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x75,0xea,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22, ++0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54, ++0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b, ++0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54, ++0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13, ++0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96, ++0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0, ++0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3, ++0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54, ++0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90, ++0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12, ++0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef, ++0xf0,0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90, ++0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90, ++0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45, ++0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59, ++0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c, ++0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01, ++0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf, ++0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74, ++0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x55,0x1e,0x00,0x55,0x33,0x01,0x55, ++0x48,0x02,0x55,0x5d,0x03,0x55,0x86,0x04,0x55,0x9b,0x05,0x55,0xb0,0x06,0x55,0xd6, ++0x0c,0x56,0x03,0x0d,0x56,0x30,0x0e,0x56,0x5d,0x0f,0x00,0x00,0x56,0x91,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74, ++0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0, ++0xa3,0x74,0x8f,0xf0,0xc1,0x91,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12, ++0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3, ++0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xc1,0x91,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f, ++0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01, ++0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04, ++0x44,0xc1,0x88,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d, ++0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f, ++0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58, ++0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d, ++0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d, ++0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9, ++0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0, ++0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0, ++0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90, ++0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85, ++0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60, ++0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83, ++0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe, ++0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01, ++0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5, ++0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3, ++0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a, ++0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b, ++0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33, ++0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0, ++0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24, ++0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05, ++0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b, ++0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90, ++0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee, ++0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40, ++0x05,0x90,0x9e,0x4b,0x11,0xe0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0xe0,0x90, ++0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22, ++0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94, ++0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22, ++0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf, ++0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84, ++0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,0xf0,0x24,0xa6,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,0x01,0x7a,0x9e,0x79, ++0x78,0x7d,0x02,0x31,0x3a,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,0xf0,0x44,0x06,0xff, ++0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x97, ++0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x9a,0xd1, ++0x14,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56, ++0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd, ++0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57, ++0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41, ++0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x01,0xf1,0x25,0x50,0xf5,0x82, ++0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0, ++0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff, ++0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93, ++0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58, ++0x11,0xf1,0xaf,0x58,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75, ++0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06, ++0xc0,0x07,0x90,0x01,0xc4,0x74,0x45,0xf0,0x74,0x5a,0xa3,0xf0,0x90,0x01,0x34,0xe0, ++0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b, ++0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x61,0xe1,0x90,0x01,0x34,0x74,0x01,0xf0,0x85, ++0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6, ++0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e, ++0x54,0x20,0x6f,0x70,0x02,0x61,0x93,0xe5,0x0f,0x30,0xe5,0x02,0x61,0x93,0xe5,0x0d, ++0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75, ++0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f, ++0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f, ++0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20, ++0xe6,0x23,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x34,0xaf, ++0x4d,0x31,0xd9,0x80,0x2e,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44, ++0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30, ++0xe7,0x11,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf, ++0x4d,0x31,0x76,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x9e,0x61,0xe0, ++0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xd1,0x05,0xef, ++0x64,0x01,0x70,0x2d,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd, ++0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92, ++0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x08,0xd1,0x05,0xbf,0x01,0x03,0x12,0x44, ++0xd3,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x13,0x85, ++0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,0x85,0xd7, ++0x19,0x85,0xd9,0x1a,0xd1,0x9c,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08, ++0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4d,0xb6,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x49,0xb9,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0, ++0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37, ++0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x18,0x90,0x9e, ++0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0, ++0x30,0xe0,0x03,0x12,0x4f,0xa7,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01, ++0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0xfe,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73, ++0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74, ++0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0, ++0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80, ++0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60, ++0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c, ++0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90, ++0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44, ++0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74, ++0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0, ++0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f, ++0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90, ++0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5, ++0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5, ++0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12, ++0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0xd1,0xbd,0x74, ++0x45,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5a,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05, ++0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83, ++0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60, ++0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x91,0x12,0x43, ++0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,0x75,0xe0,0x64,0x01,0x70, ++0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0xf1,0x3b,0xef,0x60,0x49,0x90,0x9e, ++0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a, ++0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f, ++0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5, ++0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0, ++0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,0xc1,0x14,0x7d,0x02,0x7f, ++0x03,0x12,0x36,0x75,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x23,0x90,0x9e,0x61, ++0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3, ++0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,0x12,0x48,0x8f, ++0x22,0xd1,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32, ++0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x9e, ++0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x9e,0x60,0xe0, ++0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90, ++0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e, ++0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0, ++0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf, ++0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90, ++0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0, ++0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e, ++0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3, ++0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5, ++0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4a,0xd6,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4a,0xd6,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c, ++0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e, ++0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90, ++0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0, ++0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a, ++0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0, ++0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90, ++0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e, ++0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0, ++0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x31,0x03,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12, ++0x29,0xd9,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70, ++0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42, ++0x20,0xfd,0xe4,0xff,0x31,0x72,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0x72,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a, ++0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0x72,0xe4,0xff,0x31, ++0xc6,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0, ++0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90, ++0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x29,0xd9,0x65,0x74,0x60,0x02,0x31, ++0x11,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12, ++0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0, ++0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c, ++0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12, ++0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0, ++0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90, ++0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22, ++0x12,0x5e,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52, ++0x90,0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42, ++0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04, ++0xf0,0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0, ++0x80,0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80, ++0x11,0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x01, ++0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,0xe0,0xb4,0x02,0x10,0x90, ++0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90, ++0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0, ++0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06, ++0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,0x01,0x04,0xe4,0xff,0x71, ++0x4d,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x76,0x90, ++0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x45,0xb1,0xef,0x64, ++0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20, ++0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x71,0xb0,0x90,0x9e,0xaf,0xe0,0x60,0x05,0x90, ++0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22, ++0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x49,0xb9,0x90,0x9d,0xff,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9, ++0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95, ++0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59, ++0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f, ++0x27,0xe4,0x90,0x9e,0xa8,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7, ++0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90, ++0x9e,0xa8,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90, ++0x9e,0xa8,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54, ++0xd3,0x90,0x9e,0xa9,0xe0,0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90, ++0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44, ++0x01,0xf0,0x12,0x44,0xff,0x12,0x45,0x00,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0, ++0x22,0x90,0x9e,0x60,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0, ++0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60, ++0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90, ++0x9e,0x6a,0x12,0x47,0xfa,0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90, ++0x9e,0x2f,0xf0,0xe5,0x74,0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14, ++0x60,0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e, ++0x50,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70, ++0x0a,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01, ++0xf0,0x90,0x9e,0x2f,0xe0,0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90, ++0x9e,0x89,0xf0,0x90,0x9e,0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90, ++0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47, ++0x1a,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0, ++0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d, ++0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4, ++0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5, ++0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0, ++0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0, ++0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec, ++0xc3,0x9f,0x40,0x02,0xc1,0xc9,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xfa, ++0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e, ++0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e, ++0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e, ++0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb, ++0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18, ++0xac,0x03,0x8c,0x64,0x80,0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70, ++0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07, ++0xec,0x44,0x40,0xf5,0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0, ++0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93, ++0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90, ++0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0, ++0xac,0x07,0x8f,0x64,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13, ++0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3, ++0xef,0xf0,0xaf,0x64,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4, ++0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80,0xfd,0x12,0x58,0xf1,0xe5,0x64,0x44,0x80,0xff, ++0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0, ++0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09, ++0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e, ++0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0x21, ++0x07,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5, ++0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0x21,0x07,0x90,0x9e,0x40, ++0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x21,0x07,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14, ++0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d, ++0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8, ++0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10, ++0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90, ++0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41, ++0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05, ++0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24, ++0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e, ++0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x12,0x58,0xf1,0xaf,0x64, ++0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90, ++0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09, ++0xe5,0x59,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xe1,0x95,0xe5, ++0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0, ++0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x02,0xe1,0x95,0xe5,0x59,0x94,0x20,0x40,0x08, ++0x90,0x9a,0xc5,0xe0,0x60,0x02,0xe1,0xa0,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00, ++0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0, ++0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38, ++0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59, ++0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe, ++0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0, ++0xc3,0x94,0x05,0x40,0x02,0x81,0x6e,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0, ++0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90, ++0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e, ++0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e, ++0x35,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40, ++0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90, ++0x9e,0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40, ++0x35,0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2, ++0x93,0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09, ++0xe4,0xfd,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x2c,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12, ++0x42,0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61, ++0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e, ++0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0, ++0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25, ++0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00, ++0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35, ++0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b, ++0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38, ++0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40, ++0x0c,0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61, ++0xf5,0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5, ++0x61,0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50, ++0x07,0xaf,0x59,0x12,0x65,0xb2,0xe1,0x00,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95, ++0x61,0x50,0x02,0xe1,0x00,0x7d,0x01,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x00,0x74,0xe6, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xc1, ++0x09,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19, ++0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40, ++0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3, ++0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03, ++0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74, ++0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xa1, ++0xb6,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0xa1,0xb6,0x74,0x85,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4, ++0x33,0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3, ++0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee, ++0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63, ++0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63, ++0x01,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x98,0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43, ++0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x63,0xc1,0xfb,0xec,0x64,0x06,0x60,0x02,0xe1,0x00, ++0xf5,0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc, ++0xa3,0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab, ++0x5e,0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12, ++0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37, ++0xe0,0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4, ++0x05,0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70, ++0x46,0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80, ++0x39,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4, ++0x05,0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05, ++0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90, ++0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94, ++0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x65,0x72, ++0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74, ++0xe6,0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80, ++0x0b,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00, ++0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19, ++0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12, ++0x43,0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x21,0x54, ++0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3, ++0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d, ++0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74, ++0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5, ++0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41, ++0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b, ++0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f, ++0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03, ++0x02,0x6f,0xcf,0x22,0x12,0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83, ++0xef,0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96, ++0x42,0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80, ++0xc4,0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x53,0xa4,0x12,0x29,0xd9,0x90, ++0x95,0x01,0xf0,0x22,0x12,0x29,0xd9,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90, ++0x9e,0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05, ++0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22, ++0x90,0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22, ++0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67, ++0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42, ++0x20,0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae, ++0x05,0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x9e,0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42, ++0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b, ++0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5, ++0x22,0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24, ++0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00, ++0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x71,0x00,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43, ++0x6b,0x12,0x29,0xd9,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4, ++0xfd,0x7f,0x0b,0x71,0x44,0xe4,0xfd,0x7f,0x02,0x71,0x44,0x12,0x4f,0xbe,0xe4,0xff, ++0x12,0x44,0xf1,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e, ++0x01,0x02,0x35,0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0, ++0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12, ++0x49,0xb9,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0, ++0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80, ++0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x49,0xb9,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x49,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e, ++0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82, ++0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61, ++0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0x6b,0x00,0x75, ++0x93,0x01,0x74,0x71,0x02,0x74,0x71,0x03,0x74,0x71,0x04,0x75,0x93,0x05,0x75,0x63, ++0x80,0x75,0x79,0x81,0x75,0x93,0x82,0x00,0x00,0x75,0x8f,0xaf,0x69,0xb1,0x9a,0xa1, ++0x93,0x90,0x9e,0x40,0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80, ++0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0, ++0xc3,0xe5,0x64,0x94,0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5, ++0x61,0xc3,0x9f,0x40,0x02,0xa1,0x93,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61, ++0x25,0x65,0xff,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4a,0xc1, ++0x80,0x1a,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00, ++0x25,0x65,0xfd,0xec,0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba, ++0xc3,0xe5,0x64,0x94,0x10,0x40,0x02,0xa1,0x93,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60, ++0x02,0xa1,0x93,0xaf,0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e, ++0x41,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f, ++0xd9,0x80,0x30,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5, ++0x62,0xaf,0x63,0xfe,0x12,0x37,0x54,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25, ++0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f, ++0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45, ++0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff, ++0x7d,0xff,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00, ++0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x91,0x0e,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5, ++0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0, ++0x80,0x63,0x05,0x60,0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37, ++0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0, ++0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05, ++0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75, ++0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74, ++0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45, ++0x5c,0x60,0x02,0xc1,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0, ++0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa, ++0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70, ++0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90, ++0x9e,0xaa,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37, ++0x54,0x90,0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,0x9e,0x77, ++0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x1e,0x90,0x9e,0x0f,0xe0, ++0x60,0x03,0x02,0x7c,0xe9,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d, ++0xaf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d, ++0xef,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f, ++0xd9,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e, ++0x09,0x12,0x2f,0xd9,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e, ++0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xe9,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x9d,0xfb,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12, ++0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f, ++0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xb7,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb, ++0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f, ++0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x9d,0xcb,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xcf,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a, ++0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xdf,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xe3,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09, ++0x12,0x27,0xde,0x90,0x9d,0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde, ++0x90,0x9d,0xf7,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4, ++0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e, ++0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00, ++0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb, ++0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25, ++0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90, ++0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e, ++0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90, ++0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90, ++0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27, ++0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27, ++0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f, ++0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43, ++0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f, ++0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a, ++0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e, ++0x08,0x12,0x2f,0xd9,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5, ++0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4a,0xc1,0x7d, ++0x40,0x7f,0x01,0x12,0x36,0xaf,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f, ++0x45,0x12,0x4a,0xc1,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90, ++0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90, ++0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90, ++0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90, ++0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4a,0xc1,0x90,0x9e,0x15,0xe0,0xc3, ++0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0xc1,0x33,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60, ++0x02,0xc1,0x33,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90, ++0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70, ++0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e, ++0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e, ++0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48, ++0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a, ++0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0, ++0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0, ++0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50, ++0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x1b,0xe0, ++0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x12,0x4e,0xd8,0x22,0x90,0x9e, ++0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xe1,0x55,0x90,0x9e, ++0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0, ++0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3, ++0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e, ++0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90, ++0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0, ++0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80, ++0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11, ++0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25, ++0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0, ++0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94, ++0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff, ++0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04, ++0xfd,0xe0,0x44,0x01,0xf0,0x22,0x3a,0x01,}; ++ ++// =================== v79 UMC A Cut COMMON 2011-10-06 ===================== ++u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x09,0x58,0x3f,0x01,0x00, ++0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5a,0x45,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5f,0xfb,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0xa9, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0, ++0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0, ++0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c, ++0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22, ++0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e, ++0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01, ++0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x90,0x01,0xca,0xe5,0x25,0xf0,0xef,0x60,0x03,0x12,0x4f,0x2a,0x22,0x22,0x22, ++0x22,0x22,0x00,0x02,0x60,0x8d,0x02,0x60,0x94,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x24,0x62,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63, ++0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90, ++0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc, ++0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90, ++0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05, ++0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7, ++0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5, ++0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55, ++0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34, ++0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38, ++0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89, ++0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80, ++0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c, ++0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90, ++0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e, ++0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0, ++0x12,0x4d,0xe2,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x4e, ++0x25,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0, ++0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x64,0xa1,0x91,0xd3, ++0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0, ++0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0, ++0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71, ++0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2, ++0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x63,0x92,0x90,0x9e,0x5e, ++0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20, ++0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x63,0x2e,0x90,0x9e,0x5e,0xe0, ++0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x5e,0xf1,0xef,0x60, ++0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20, ++0xe2,0x09,0x12,0x62,0x50,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54, ++0x0f,0xff,0xbf,0x02,0x09,0x12,0x62,0xbb,0xef,0x60,0x03,0x12,0x64,0x87,0x22,0x90, ++0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x63,0x4d, ++0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0, ++0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27, ++0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56, ++0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3, ++0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e, ++0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4, ++0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3, ++0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04, ++0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24, ++0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x66,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x77,0x1c,0xef,0x70,0x06,0x90,0x01,0xc8,0x74, ++0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11, ++0x8f,0x11,0xdf,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x7f, ++0x78,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xff,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c, ++0x12,0x22,0x65,0x90,0x9e,0x03,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x22,0x65, ++0x90,0x9e,0x07,0x12,0x25,0x08,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d, ++0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53, ++0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9e,0x07,0x12,0x43,0x53, ++0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12, ++0x2b,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9e,0x0b,0x12,0x25,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x30,0x2c, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00, ++0x00,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80, ++0x08,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00, ++0x47,0xe0,0x5f,0xf0,0x31,0xb9,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x31,0xb9,0x90, ++0x9e,0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45, ++0x80,0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x31,0xb1,0x90,0x9e,0xac,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0, ++0x4f,0xf0,0x31,0xb9,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00, ++0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0, ++0x31,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f, ++0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x31, ++0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60, ++0x02,0x61,0x7d,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd, ++0x7f,0x48,0x51,0xc1,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90, ++0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45, ++0xe0,0x54,0xef,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f, ++0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0, ++0x44,0x20,0xfd,0x7f,0x45,0x51,0xc1,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45, ++0x51,0xc1,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x51,0xc1,0x22,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0, ++0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f, ++0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b, ++0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d, ++0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff, ++0xd1,0xd8,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02, ++0x81,0x84,0x90,0x9e,0x1b,0xe0,0x70,0x02,0x81,0x84,0x90,0x9e,0x1f,0xe0,0x70,0x02, ++0x81,0x84,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74, ++0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x51,0xb8,0x90,0x00,0x46,0xe0, ++0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08, ++0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f, ++0x45,0x51,0xc1,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05, ++0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05, ++0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e, ++0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12, ++0x31,0xb7,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e,0x51,0xb7,0x90, ++0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x05,0x22,0xe4,0xf0,0xa2, ++0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x31,0x49,0x90, ++0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74, ++0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0x16,0x12,0x25,0x08,0xab, ++0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe, ++0x78,0x1a,0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16, ++0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x25,0x08, ++0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08, ++0x12,0x22,0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x25, ++0x08,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e, ++0x08,0x12,0x2b,0x08,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x51, ++0xc1,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0, ++0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x51,0xc1,0x90, ++0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xef, ++0xfd,0x7f,0x46,0x51,0xc1,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd, ++0x7f,0x54,0x51,0xc1,0x7d,0xff,0x7f,0x55,0x51,0xc1,0x7d,0xff,0x7f,0x56,0x51,0xc1, ++0x7d,0xff,0x7f,0x57,0x41,0xc1,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x51,0xc1, ++0xe4,0xfd,0x7f,0x51,0x51,0xc1,0xe4,0xfd,0x7f,0x52,0x51,0xc1,0xe4,0xfd,0x7f,0x53, ++0x41,0xc1,0xe5,0x22,0x64,0x01,0x70,0x3c,0xf1,0xbe,0xbf,0x01,0x05,0x7f,0x01,0x12, ++0x44,0xf1,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x00,0x44, ++0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x51,0xc1,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f, ++0x46,0x51,0xc1,0x7f,0x02,0xf1,0xea,0x8f,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0xb4, ++0x01,0x02,0xf1,0x2a,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd7,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x51,0xc1,0x90,0x9e,0x2e,0xe0,0x70,0x31, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0xd1,0xd8,0x90,0x9e,0x2e,0x74,0x01,0x51,0xb7,0x80, ++0x3f,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x37,0x90,0x9e,0x1f,0xe0,0xff,0xd1,0xd8, ++0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x51,0xc1, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b, ++0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3, ++0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0, ++0x04,0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb1,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x51,0xc1,0x90,0x9e,0xb1, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x41,0xc1,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c, ++0x89,0x5d,0xe4,0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x31,0xb9,0xe5,0x59, ++0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x31,0xb9,0x90,0x00,0x33, ++0xe0,0x54,0x7f,0xf0,0x31,0xb9,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34, ++0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3, ++0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42, ++0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0x12,0x45,0xb1,0xbf,0x01,0x10,0x90,0x02,0x09, ++0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x7f,0x0b, ++0xf1,0xea,0xef,0x65,0x25,0x60,0x10,0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80, ++0x03,0x75,0x25,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x9e,0x74,0xf0,0x90, ++0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x41,0xc1,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0, ++0x12,0x49,0xb9,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe, ++0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff, ++0x80,0x44,0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0x12,0x49,0xb1,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01, ++0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x00,0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7, ++0x13,0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0x75,0x28,0x33,0xe4,0xf5, ++0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0, ++0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0, ++0x75,0x8e,0x02,0x12,0x4f,0xda,0x12,0x5f,0xa9,0x12,0x5f,0xbc,0xe4,0xf5,0x12,0x12, ++0x6f,0xa1,0x12,0x77,0x5d,0x12,0x60,0x9b,0x12,0x2e,0x01,0x12,0x77,0x18,0x11,0x8b, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0xf4,0x12,0x5f,0x91,0x12,0x44,0xfe,0x12,0x7d,0x1d, ++0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x4d,0x8b,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44, ++0x40,0xf0,0x12,0x49,0xb9,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe, ++0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04,0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0, ++0x24,0xa9,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2, ++0xaf,0x53,0x12,0xef,0xd2,0xaf,0x31,0x8e,0xe5,0x12,0x30,0xe6,0x17,0xc2,0xaf,0x53, ++0x12,0xbf,0xd2,0xaf,0x12,0x69,0x51,0x90,0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01, ++0x03,0x12,0x7d,0x7b,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7e,0x7e,0x31,0x61,0x80, ++0xb8,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35, ++0x7f,0xf9,0x7e,0x01,0x12,0x4f,0x48,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0,0x54,0x0f, ++0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x0a,0xe4,0x90,0x06,0x34,0xf0,0x22,0x90,0x01, ++0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x41, ++0xcf,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3, ++0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x41,0xc8,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75, ++0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79, ++0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90, ++0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90, ++0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90, ++0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39, ++0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x51,0xd0,0x90,0x9e,0x34, ++0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x21,0x98,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x53,0x0b,0x01,0x53,0x14,0x02, ++0x53,0x2f,0x03,0x53,0x38,0x05,0x53,0x41,0x06,0x53,0x8f,0x07,0x53,0x49,0x09,0x53, ++0x52,0x0c,0x53,0x5b,0x0d,0x53,0x64,0x0e,0x53,0x6d,0x1b,0x53,0x76,0x1c,0x53,0x7f, ++0x2c,0x53,0x1d,0x2d,0x53,0x26,0x2e,0x00,0x00,0x53,0x88,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x61,0x9d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc4,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xca,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x12,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x72,0x40,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71, ++0x74,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x72,0x88,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4b,0x7e,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x7c,0xea,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4c,0xb8,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x02,0x71,0xbc,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xa3,0x90, ++0x9e,0x3c,0x12,0x43,0x6b,0x02,0x75,0xea,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22, ++0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54, ++0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b, ++0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54, ++0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13, ++0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96, ++0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0, ++0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3, ++0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54, ++0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90, ++0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12, ++0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef, ++0xf0,0x12,0x24,0x62,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90, ++0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90, ++0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45, ++0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59, ++0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c, ++0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01, ++0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf, ++0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74, ++0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x55,0x1e,0x00,0x55,0x33,0x01,0x55, ++0x48,0x02,0x55,0x5d,0x03,0x55,0x86,0x04,0x55,0x9b,0x05,0x55,0xb0,0x06,0x55,0xd6, ++0x0c,0x56,0x03,0x0d,0x56,0x30,0x0e,0x56,0x5d,0x0f,0x00,0x00,0x56,0x91,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74, ++0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0, ++0xa3,0x74,0x8f,0xf0,0xc1,0x91,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12, ++0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3, ++0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xc1,0x91,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f, ++0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01, ++0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04, ++0x44,0xc1,0x88,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d, ++0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f, ++0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58, ++0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d, ++0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53, ++0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d, ++0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62, ++0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x24,0x62,0x5f,0xd0,0x01,0xd0,0x02,0xd0, ++0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0, ++0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90, ++0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85, ++0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60, ++0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83, ++0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe, ++0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01, ++0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5, ++0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3, ++0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34, ++0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a, ++0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b, ++0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33, ++0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0, ++0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24, ++0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05, ++0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b, ++0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90, ++0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee, ++0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40, ++0x05,0x90,0x9e,0x4b,0x11,0xe0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x11,0xe0,0x90, ++0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22, ++0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94, ++0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22, ++0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf, ++0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84, ++0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef,0xf0,0x24,0xa6,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b,0x01,0x7a,0x9e,0x79, ++0x78,0x7d,0x02,0x31,0x3a,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54,0xf0,0x44,0x06,0xff, ++0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x97, ++0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x9a,0xd1, ++0x14,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56, ++0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd, ++0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57, ++0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41, ++0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x01,0xf1,0x25,0x50,0xf5,0x82, ++0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0, ++0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff, ++0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93, ++0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58, ++0x11,0xf1,0xaf,0x58,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75, ++0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06, ++0xc0,0x07,0x90,0x01,0xc4,0x74,0x45,0xf0,0x74,0x5a,0xa3,0xf0,0x90,0x01,0x34,0xe0, ++0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b, ++0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x61,0xe1,0x90,0x01,0x34,0x74,0x01,0xf0,0x85, ++0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6, ++0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e, ++0x54,0x20,0x6f,0x70,0x02,0x61,0x93,0xe5,0x0f,0x30,0xe5,0x02,0x61,0x93,0xe5,0x0d, ++0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75, ++0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f, ++0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f, ++0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20, ++0xe6,0x23,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x34,0xaf, ++0x4d,0x31,0xd9,0x80,0x2e,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44, ++0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30, ++0xe7,0x11,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf, ++0x4d,0x31,0x76,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x45,0x90,0x9e,0x61,0xe0, ++0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0xd1,0x05,0xef, ++0x64,0x01,0x70,0x2d,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb,0xfd, ++0x7f,0x58,0x7e,0x01,0x12,0x30,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92, ++0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x08,0xd1,0x05,0xbf,0x01,0x03,0x12,0x44, ++0xd3,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x13,0x85, ++0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18,0x85,0xd7, ++0x19,0x85,0xd9,0x1a,0xd1,0x9c,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34,0x74,0x08, ++0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x12,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4d,0xb6,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x49,0xb9,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0, ++0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37, ++0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x18,0x90,0x9e, ++0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0, ++0x30,0xe0,0x03,0x12,0x4f,0xa7,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01, ++0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0xfe,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73, ++0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74, ++0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0, ++0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80, ++0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60, ++0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c, ++0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90, ++0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44, ++0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74, ++0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0, ++0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f, ++0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90, ++0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5, ++0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5, ++0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12, ++0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0xd1,0xbd,0x74, ++0x45,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5a,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05, ++0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83, ++0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60, ++0x02,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x91,0x12,0x43, ++0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e,0x75,0xe0,0x64,0x01,0x70, ++0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0xf1,0x3b,0xef,0x60,0x49,0x90,0x9e, ++0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a, ++0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f, ++0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5, ++0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0, ++0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f,0xc1,0x14,0x7d,0x02,0x7f, ++0x03,0x12,0x31,0x2c,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x23,0x90,0x9e,0x61, ++0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3, ++0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff,0x12,0x48,0x8f, ++0x22,0xd1,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x32, ++0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x24,0x90,0x9e, ++0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x16,0x90,0x9e,0x60,0xe0, ++0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90, ++0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e, ++0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0, ++0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e,0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf, ++0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90, ++0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0, ++0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e, ++0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3, ++0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5, ++0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4a,0xd6,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4a,0xd6,0x90,0x01,0xc4,0x74,0xfb,0xf0,0x74,0x5f, ++0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c, ++0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e, ++0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90, ++0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0, ++0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a, ++0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0, ++0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90, ++0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e, ++0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0, ++0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x31,0x03,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12, ++0x24,0x62,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70, ++0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42, ++0x20,0xfd,0xe4,0xff,0x31,0x72,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0x72,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a, ++0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0x72,0xe4,0xff,0x31, ++0xc6,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0, ++0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90, ++0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x24,0x62,0x65,0x74,0x60,0x02,0x31, ++0x11,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12, ++0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0, ++0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c, ++0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12, ++0x31,0x9d,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0, ++0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90, ++0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22, ++0x12,0x5e,0x05,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52, ++0x90,0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42, ++0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04, ++0xf0,0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0, ++0x80,0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80, ++0x11,0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x01, ++0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90,0x02,0x87,0xe0,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75,0xe0,0xb4,0x02,0x10,0x90, ++0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x17,0x80,0x26,0x90, ++0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0, ++0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x06, ++0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4,0x01,0x04,0xe4,0xff,0x71, ++0x4d,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x8f,0x76,0x90, ++0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0,0x12,0x45,0xb1,0xef,0x64, ++0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20, ++0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x71,0xb0,0x90,0x9e,0xaf,0xe0,0x60,0x05,0x90, ++0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22, ++0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x12,0x49,0xb9,0x90,0x9d,0xff,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x03, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08, ++0x90,0x9e,0x07,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08, ++0x12,0x2b,0x08,0x90,0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95, ++0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68, ++0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f, ++0x27,0xe4,0x90,0x9e,0xa8,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7, ++0x02,0x7f,0x01,0xef,0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90, ++0x9e,0xa8,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90, ++0x9e,0xa8,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15, ++0xd3,0x90,0x9e,0xa9,0xe0,0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90, ++0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44, ++0x01,0xf0,0x12,0x44,0xff,0x12,0x45,0x00,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0, ++0x22,0x90,0x9e,0x60,0xe0,0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0, ++0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60, ++0xe0,0x54,0xbf,0xf0,0x22,0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90, ++0x9e,0x6a,0x12,0x47,0xfa,0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90, ++0x9e,0x2f,0xf0,0xe5,0x74,0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14, ++0x60,0x29,0x24,0xfd,0x60,0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e, ++0x50,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70, ++0x0a,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01, ++0xf0,0x90,0x9e,0x2f,0xe0,0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90, ++0x9e,0x89,0xf0,0x90,0x9e,0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90, ++0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47, ++0x1a,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0, ++0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d, ++0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4, ++0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5, ++0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0, ++0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0, ++0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec, ++0xc3,0x9f,0x40,0x02,0xc1,0xc9,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0xfa, ++0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e, ++0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e, ++0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e, ++0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb, ++0x64,0x12,0x60,0x03,0xbb,0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18, ++0xac,0x03,0x8c,0x64,0x80,0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70, ++0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07, ++0xec,0x44,0x40,0xf5,0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0, ++0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93, ++0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90, ++0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0, ++0xac,0x07,0x8f,0x64,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13, ++0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3, ++0xef,0xf0,0xaf,0x64,0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4, ++0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80,0xfd,0x12,0x58,0xf1,0xe5,0x64,0x44,0x80,0xff, ++0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0, ++0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09, ++0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0, ++0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e, ++0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0x21, ++0x07,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5, ++0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0x21,0x07,0x90,0x9e,0x40, ++0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0x21,0x07,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14, ++0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d, ++0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8, ++0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10, ++0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90, ++0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41, ++0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05, ++0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24, ++0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e, ++0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x12,0x58,0xf1,0xaf,0x64, ++0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90, ++0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09, ++0xe5,0x59,0x90,0x96,0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xe1,0x95,0xe5, ++0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0, ++0xd3,0x94,0x00,0xee,0x94,0x00,0x50,0x02,0xe1,0x95,0xe5,0x59,0x94,0x20,0x40,0x08, ++0x90,0x9a,0xc5,0xe0,0x60,0x02,0xe1,0xa0,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00, ++0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0, ++0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38, ++0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59, ++0xc3,0x94,0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe, ++0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0, ++0xc3,0x94,0x05,0x40,0x02,0x81,0x6e,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0, ++0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90, ++0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e, ++0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e, ++0x35,0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40, ++0x06,0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90, ++0x9e,0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40, ++0x35,0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2, ++0x93,0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09, ++0xe4,0xfd,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x2c,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x12,0x24,0x62,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12, ++0x42,0x97,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61, ++0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e, ++0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0, ++0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25, ++0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00, ++0x03,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35, ++0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b, ++0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38, ++0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x24,0x7b,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40, ++0x0c,0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61, ++0xf5,0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5, ++0x61,0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50, ++0x07,0xaf,0x59,0x12,0x65,0xb2,0xe1,0x00,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e, ++0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95, ++0x61,0x50,0x02,0xe1,0x00,0x7d,0x01,0xaf,0x59,0x12,0x67,0xb1,0xe1,0x00,0x74,0xe6, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xc1, ++0x09,0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19, ++0x40,0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40, ++0x2e,0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3, ++0x94,0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03, ++0x40,0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74, ++0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0xa1, ++0xb6,0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0xa1,0xb6,0x74,0x85,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4, ++0x33,0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3, ++0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33, ++0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee, ++0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9d,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63, ++0x05,0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63, ++0x01,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x98,0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43, ++0x5f,0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe4,0xf0,0xad,0x63,0xc1,0xfb,0xec,0x64,0x06,0x60,0x02,0xe1,0x00, ++0xf5,0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc, ++0xa3,0xe0,0xfd,0x12,0x24,0x7b,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab, ++0x5e,0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12, ++0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37, ++0xe0,0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4, ++0x05,0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70, ++0x46,0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80, ++0x39,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4, ++0x05,0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05, ++0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90, ++0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94, ++0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x65,0x72, ++0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74, ++0xe6,0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80, ++0x0b,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00, ++0x02,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19, ++0x90,0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12, ++0x43,0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x21,0x54, ++0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3, ++0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d, ++0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74, ++0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5, ++0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41, ++0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b, ++0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f, ++0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03, ++0x02,0x6f,0xcf,0x22,0x12,0x24,0x62,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83, ++0xef,0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96, ++0x42,0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80, ++0xc4,0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x53,0xa4,0x12,0x24,0x62,0x90, ++0x95,0x01,0xf0,0x22,0x12,0x24,0x62,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90, ++0x9e,0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05, ++0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22, ++0x90,0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22, ++0x90,0x02,0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67, ++0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42, ++0x20,0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae, ++0x05,0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x9e,0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42, ++0xc2,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b, ++0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x24,0x62,0xff,0x60,0x2c,0xb5, ++0x22,0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24, ++0x70,0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00, ++0x01,0x12,0x42,0xc2,0xff,0xae,0xf0,0x71,0x00,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43, ++0x6b,0x12,0x24,0x62,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4, ++0xfd,0x7f,0x0b,0x71,0x44,0xe4,0xfd,0x7f,0x02,0x71,0x44,0x12,0x4f,0xbe,0xe4,0xff, ++0x12,0x44,0xf1,0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e, ++0x01,0x02,0x30,0x62,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0, ++0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12, ++0x49,0xb9,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0, ++0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80, ++0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x49,0xb9,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x49,0xb9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e, ++0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82, ++0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61, ++0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0x6b,0x00,0x75, ++0x93,0x01,0x74,0x71,0x02,0x74,0x71,0x03,0x74,0x71,0x04,0x75,0x93,0x05,0x75,0x63, ++0x80,0x75,0x79,0x81,0x75,0x93,0x82,0x00,0x00,0x75,0x8f,0xaf,0x69,0xb1,0x9a,0xa1, ++0x93,0x90,0x9e,0x40,0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80, ++0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0, ++0xc3,0xe5,0x64,0x94,0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5, ++0x61,0xc3,0x9f,0x40,0x02,0xa1,0x93,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61, ++0x25,0x65,0xff,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4a,0xc1, ++0x80,0x1a,0xc3,0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00, ++0x25,0x65,0xfd,0xec,0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba, ++0xc3,0xe5,0x64,0x94,0x10,0x40,0x02,0xa1,0x93,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60, ++0x02,0xa1,0x93,0xaf,0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x25,0x08,0x90,0x9e, ++0x41,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0xaf,0x65,0xae,0x64,0x12,0x2b, ++0x08,0x80,0x30,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5, ++0x62,0xaf,0x63,0xfe,0x12,0x32,0x15,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25, ++0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f, ++0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45, ++0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff, ++0x7d,0xff,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff,0x02,0x2d,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00, ++0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x6c,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x91,0x0e,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5, ++0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0, ++0x80,0x63,0x05,0x60,0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x32, ++0x15,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0, ++0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05, ++0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75, ++0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74, ++0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45, ++0x5c,0x60,0x02,0xc1,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0, ++0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa, ++0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70, ++0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90, ++0x9e,0xaa,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x32, ++0x15,0x90,0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x90,0x9e,0x77, ++0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x1e,0x90,0x9e,0x0f,0xe0, ++0x60,0x03,0x02,0x7c,0xe9,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xab,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d, ++0xaf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbf,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xc3, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd7,0x12, ++0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xeb,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9d, ++0xef,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b, ++0x08,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e, ++0x09,0x12,0x2b,0x08,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e, ++0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xe9,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90, ++0x9d,0xfb,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xa7,0x12, ++0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xab,0x12,0x25,0x08,0x7f, ++0x6c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xaf,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e, ++0x12,0x22,0x65,0x90,0x9d,0xb3,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65, ++0x90,0x9d,0xb7,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbb, ++0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbf,0x12,0x25,0x08, ++0x7f,0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xc3,0x12,0x25,0x08,0x7f,0x84,0x7e, ++0x0e,0x12,0x22,0x65,0x90,0x9d,0xc7,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22, ++0x65,0x90,0x9d,0xcb,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d, ++0xcf,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd3,0x12,0x25, ++0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd7,0x12,0x25,0x08,0x7f,0xd8, ++0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xdb,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12, ++0x22,0x65,0x90,0x9d,0xdf,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90, ++0x9d,0xe3,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xe7,0x12, ++0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9d,0xeb,0x12,0x25,0x08,0x7f, ++0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x9d,0xef,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09, ++0x12,0x22,0x65,0x90,0x9d,0xf3,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65, ++0x90,0x9d,0xf7,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4, ++0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e, ++0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00, ++0x00,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb, ++0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20, ++0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14, ++0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25, ++0x14,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96, ++0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80, ++0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f, ++0xdc,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25, ++0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e, ++0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90, ++0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22, ++0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec, ++0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff, ++0xec,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22, ++0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f, ++0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90,0x9e,0xa4,0x12,0x43, ++0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12, ++0x2b,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa4,0x12,0x25,0x08,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25,0x08, ++0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x25, ++0x08,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e, ++0x08,0x12,0x2b,0x08,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20, ++0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5, ++0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4a,0xc1,0x7d, ++0x40,0x7f,0x01,0x12,0x31,0x66,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f, ++0x45,0x12,0x4a,0xc1,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90, ++0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90, ++0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90, ++0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90, ++0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4a,0xc1,0x90,0x9e,0x15,0xe0,0xc3, ++0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0xc1,0x33,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60, ++0x02,0xc1,0x33,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90, ++0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70, ++0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e, ++0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e, ++0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48, ++0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a, ++0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0, ++0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0, ++0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50, ++0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x9e,0x1b,0xe0, ++0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x12,0x4e,0xd8,0x22,0x90,0x9e, ++0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xe1,0x55,0x90,0x9e, ++0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0, ++0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3, ++0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e, ++0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90, ++0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0, ++0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80, ++0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11, ++0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25, ++0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0, ++0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94, ++0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff, ++0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04, ++0xfd,0xe0,0x44,0x01,0xf0,0x22,0xf5,0x67,}; ++ ++// =================== v79 UMC B Cut COMMON 2011-10-06 ===================== ++u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = { ++0xc2,0x88,0x02,0x00,0x4f,0x00,0x00,0x00,0x0a,0x06,0x18,0x11,0x5e,0x3f,0x01,0x00, ++0x61,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x49,0x13,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5f,0x7b,0x00,0x00,0x00,0x00,0x00,0xa1,0xdf,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0x31, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x66, ++0x00,0x41,0x9e,0xae,0x00,0x41,0x9e,0x4d,0x80,0x41,0x9e,0x4e,0x80,0x41,0x9e,0xb0, ++0x00,0x00,0xf0,0x90,0x9e,0x57,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x88,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x89,0xf0, ++0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x5c, ++0x14,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x16,0x22, ++0x8f,0x82,0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x22,0x7f,0x60,0x7e, ++0x01,0x80,0xed,0x90,0x9e,0x60,0xe0,0xff,0x7d,0x01,0xe1,0x1a,0xb1,0xb1,0xbf,0x01, ++0x0f,0x90,0x9e,0x68,0xe0,0xff,0xe4,0xfd,0xf1,0xfe,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22, ++0x22,0x22,0x22,0x02,0x60,0x0d,0x02,0x60,0x14,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x8b,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8e,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8e, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x8b,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x50,0x54,0xc0,0x70,0x0d,0x90,0x9e,0x63, ++0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0x91,0xd3,0xe5,0x50,0x30,0xe6,0x17,0x90, ++0x9e,0x63,0xe0,0x44,0x01,0xf0,0x90,0x9e,0x61,0xe0,0x64,0x02,0x60,0x04,0x91,0xdc, ++0x80,0x0b,0x91,0x80,0x80,0x07,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe5,0x50,0x90, ++0x9e,0x63,0x30,0xe7,0x17,0xe0,0x44,0x02,0xf0,0xe4,0x90,0x9e,0x89,0x91,0x52,0x90, ++0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x62,0x74,0x01,0xf0,0x22,0xe0,0x54,0xfd,0xf0, ++0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05, ++0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7, ++0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xdf,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5, ++0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55, ++0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34, ++0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0xbc,0xe5,0x34,0x30,0xe2,0x38, ++0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x24,0x90,0x9e,0x89, ++0xe4,0xf0,0x90,0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80, ++0x07,0x90,0x9e,0x5d,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe3,0x38,0x90,0x01,0x3c, ++0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24,0x90,0x9e,0x89,0xe4,0xf0,0x90, ++0x9e,0x55,0xe0,0x90,0x9e,0x8a,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x62, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x07,0x90,0x9e, ++0x5c,0xe4,0xf0,0x91,0xd3,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0, ++0x12,0x71,0xa3,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12,0x52, ++0x69,0xe5,0x35,0x30,0xe0,0x1a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0, ++0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x90,0x9e,0x60,0xf0,0x12,0x63,0xac,0x91,0xd3, ++0x74,0xdf,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0, ++0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0, ++0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x8f,0x71,0x8d,0x72,0xe5,0x71, ++0x54,0x0f,0xff,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0x6f,0x60,0x72,0xe5,0x71,0x30,0xe2, ++0x2b,0x90,0x9e,0x5e,0xe0,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0xa7,0x90,0x9e,0x5e, ++0xe0,0x30,0xe3,0x07,0xe5,0x71,0x20,0xe3,0x02,0x80,0x54,0x90,0x9e,0x5e,0xe0,0x20, ++0xe3,0x4c,0xe5,0x71,0x30,0xe3,0x47,0xaf,0x72,0x02,0x62,0x43,0x90,0x9e,0x5e,0xe0, ++0x54,0x0f,0xff,0xbf,0x0c,0x0d,0xe5,0x71,0x20,0xe3,0x08,0x12,0x4c,0xd5,0xef,0x60, ++0x2d,0xf1,0x9f,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x71,0x20, ++0xe2,0x09,0x12,0x5e,0x8f,0xef,0x60,0x16,0x12,0x48,0xaa,0x90,0x9e,0x5e,0xe0,0x54, ++0x0f,0xff,0xbf,0x02,0x09,0x12,0x61,0xd0,0xef,0x60,0x03,0x12,0x63,0x92,0x22,0x90, ++0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x05,0x7f,0x01,0x12,0x62,0x62, ++0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x9e,0x62,0xe0, ++0x60,0x0e,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x2b,0x80,0x27, ++0x90,0x9e,0x51,0xe0,0x04,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xef,0xf0,0x90,0x9e,0x56, ++0xe0,0xff,0x90,0x9e,0x51,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x73,0xb4,0x01,0x0a,0xa3, ++0xe0,0x70,0x06,0xe0,0x04,0xf0,0x22,0x91,0xd3,0x22,0xe0,0xff,0x7d,0x01,0x90,0x9e, ++0x9c,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x74,0x60,0x04,0xe4, ++0xff,0x11,0x8f,0x90,0x9e,0x9c,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9e,0xe4,0xf0,0xa3, ++0x74,0x80,0xf0,0x90,0x9e,0x9c,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04, ++0x25,0xef,0xf0,0x90,0x9e,0x9d,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff,0x24,0x0f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9e,0xa3,0xe0,0xff,0xfd,0x24, ++0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9e,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x77, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0x2e,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x76,0x1a,0xef,0x70,0x06,0x90,0x01,0xc8,0x74, ++0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x74,0x60,0x04,0x7f,0x01,0x11, ++0x8f,0x12,0x76,0x5b,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22, ++0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x22, ++0x90,0x9e,0x61,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90,0x9e,0x5e,0xe0, ++0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0xe4,0xff, ++0x11,0x8f,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00, ++0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07, ++0x90,0x01,0xc4,0x74,0x13,0xf0,0x74,0x49,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28, ++0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f, ++0xe5,0x2c,0x20,0xe0,0x02,0x41,0xb3,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x08, ++0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85,0xd5,0x0c,0x85,0xd6,0x0d,0x85, ++0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3,0x13,0xff,0xe5,0x0e,0x54,0x20, ++0x6f,0x70,0x02,0x41,0x63,0xe5,0x0f,0x30,0xe5,0x02,0x41,0x63,0xe5,0x0d,0x54,0x3f, ++0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c,0x54,0x1f,0xff,0xe5,0x4d,0x25, ++0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81, ++0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93, ++0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e,0xd3,0x94,0x04,0x40,0x03,0x75, ++0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0,0x02, ++0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff,0xe5,0x0e,0x54,0x1f,0x2f,0xff, ++0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00,0x12,0x43,0x5f,0x75,0xf0, ++0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x0f,0x20,0xe6,0x24, ++0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7,0x36,0xaf,0x4d,0x12, ++0x5b,0x6d,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a,0x30,0xe7, ++0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f,0xf5,0x53,0xab,0x4e,0xaf,0x4d, ++0x12,0x5b,0x0a,0xe5,0x74,0x14,0x24,0xfd,0x50,0x02,0x80,0x47,0x90,0x9e,0x61,0xe0, ++0x60,0x38,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x12,0x44,0xf1, ++0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x55,0xe0,0xf5,0x44,0x75,0x45,0x00,0xe4,0xfb, ++0xfd,0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x01,0xf0,0x90,0x9e,0x5d,0xf0,0x80,0x09,0x12,0x44,0xf1,0xbf,0x01,0x03, ++0x12,0x44,0xd3,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1, ++0x13,0x85,0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5,0x17,0x85,0xd6,0x18, ++0x85,0xd7,0x19,0x85,0xd9,0x1a,0x12,0x5c,0x61,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01, ++0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43, ++0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1d,0xe0,0x54, ++0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0xd1,0xed, ++0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0xb1,0x28,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06, ++0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02, ++0xf0,0x43,0x12,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01, ++0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x9e,0x66,0xe4,0xf0,0x80,0x17,0x90, ++0x9e,0x66,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19, ++0xe0,0x30,0xe0,0x02,0xf1,0xfc,0xe5,0x2e,0x30,0xe0,0x12,0x90,0x9e,0x76,0x74,0x01, ++0xf0,0x90,0x01,0x36,0xf0,0x12,0x64,0x09,0x90,0x9e,0x76,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe2,0x78,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xe5,0x73, ++0x64,0x01,0x70,0x66,0xe5,0x74,0x60,0x62,0xe5,0x74,0x64,0x02,0x60,0x06,0xe5,0x74, ++0x64,0x05,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x50,0xf0,0x90,0x06,0xaa,0xe0, ++0x90,0x9e,0x5f,0xf0,0x90,0x9e,0x50,0xe0,0x70,0x07,0x90,0x9e,0x5f,0xe0,0xff,0x80, ++0x05,0x90,0x9e,0x50,0xe0,0xff,0x90,0x9e,0x50,0xef,0xf0,0x90,0x9e,0x52,0xe0,0x60, ++0x03,0xe0,0x14,0xf0,0x90,0x9e,0x51,0xe4,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c, ++0x74,0x02,0xf0,0x90,0x9e,0x63,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xef,0xf0,0xe5,0x74, ++0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0xe5,0x2e,0x30,0xe3,0x28,0x90, ++0x01,0x36,0x74,0x08,0xf0,0xe5,0x73,0x64,0x01,0x70,0x1c,0xe5,0x74,0x60,0x18,0x90, ++0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x89,0xe4,0x12,0x44, ++0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2f,0x90,0x01,0x36,0x74, ++0x10,0xf0,0xe5,0x73,0x64,0x01,0x70,0x23,0xe5,0x74,0x60,0x1f,0x90,0x01,0x57,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x62,0xe4,0xf0,0x90,0x9e,0x63,0xe0, ++0x54,0xfd,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12,0x44,0xd3,0xe5,0x2e,0x30,0xe5,0x1f, ++0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x73,0xb4,0x01,0x14,0xe5,0x74,0x60,0x10,0x90, ++0x9e,0x61,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xdc,0x80,0x03,0x12,0x44,0x80,0xe5, ++0x2e,0x30,0xe6,0x1e,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x73,0xb4,0x01,0x13,0xe5, ++0x74,0x60,0x0f,0x90,0x9e,0x63,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x07,0x70,0x03,0x12, ++0x44,0xd3,0xe5,0x2f,0x30,0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x11,0xe0,0x74, ++0x13,0x04,0x90,0x01,0xc4,0xf0,0x74,0x49,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05, ++0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83, ++0xd0,0xf0,0xd0,0xe0,0x32,0x12,0x44,0xf1,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x01,0xf0,0x80,0x32,0x90,0x9e,0x5d,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02, ++0xf0,0x80,0x24,0x90,0x9e,0x5c,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80, ++0x16,0x90,0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22, ++0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f, ++0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x9e,0xad,0xed,0xf0,0x90,0x9e,0xac,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47, ++0xe0,0x5f,0xf0,0xb1,0x28,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0xb1,0x28,0x90,0x9e, ++0xad,0xe0,0x60,0x16,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xac,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80, ++0x6b,0x90,0x9e,0xac,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xb1,0x20,0x90,0x9e,0xac,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f, ++0xf0,0xb1,0x28,0x90,0x9e,0xad,0xe0,0x60,0x1b,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42, ++0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xac,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0xb1, ++0x28,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0xb1,0x28, ++0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02, ++0xc1,0xec,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f, ++0x48,0xd1,0x30,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0xd1,0x30,0x90,0x00, ++0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a,0xf0,0x90,0x9e, ++0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x45,0xe0, ++0x54,0xef,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46, ++0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44, ++0x20,0xfd,0x7f,0x45,0xd1,0x30,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0xd1, ++0x30,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0xd1,0x30,0x22,0x90,0x01,0x30, ++0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xfd,0x7f,0x50,0xd1,0x30,0xe4,0xfd,0x7f,0x51,0xd1,0x30,0xe4,0xfd,0x7f, ++0x52,0xd1,0x30,0xe4,0xfd,0x7f,0x53,0xc1,0x30,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14, ++0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f, ++0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd, ++0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e, ++0x16,0x12,0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a, ++0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e, ++0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12, ++0x2a,0x7f,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47, ++0xd1,0x30,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0xd1,0x30,0x90,0x00,0x46, ++0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0xd1,0x30, ++0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0xd1,0x30,0x90,0x00,0x46,0xe0,0x54, ++0xef,0xfd,0x7f,0x46,0xd1,0x30,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0xe4,0x90,0x9e,0x74, ++0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0xc1,0x30,0x12,0x45,0xb1,0xbf, ++0x01,0x10,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x12,0x47,0xfe,0x90,0x04,0x1f,0x74, ++0x20,0xf0,0x22,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a,0x03,0xf5,0x2b,0x90,0x01, ++0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0, ++0x22,0xe4,0x90,0x9e,0x31,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x4f,0xec,0x12,0x5f, ++0x29,0x12,0x5f,0x3c,0xe4,0xf5,0x12,0x12,0x6d,0x11,0x12,0x77,0x25,0x12,0x60,0x1b, ++0x12,0x32,0x3d,0x12,0x76,0x16,0x11,0x13,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90, ++0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x12,0x5f,0x74,0x12, ++0x5e,0x77,0x12,0x45,0x00,0x12,0x7c,0xe5,0x90,0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x5e, ++0xfa,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4d,0x28,0x75,0xe8,0x03, ++0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xc0,0xe0,0x04, ++0xf0,0x90,0x9e,0x31,0xe0,0x64,0x01,0xf0,0x24,0x31,0x90,0x01,0xc4,0xf0,0x74,0x50, ++0xa3,0xf0,0xe5,0x12,0x30,0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x71,0x1f, ++0xe5,0x12,0x30,0xe6,0x16,0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x66,0xbc,0x90, ++0x9e,0x1e,0xe0,0xff,0x60,0x03,0xb4,0x01,0x02,0x31,0x15,0x90,0x9e,0x1e,0xe0,0x70, ++0x03,0x12,0x7d,0x43,0x11,0xe8,0x80,0xb9,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70, ++0x1b,0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x75,0xb4,0xbf,0x01, ++0x09,0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x75,0xa5,0xe4, ++0x90,0x06,0x34,0xf0,0x22,0x90,0x9e,0x15,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04, ++0xf0,0x21,0xcd,0x90,0x9e,0x15,0xe0,0x64,0x14,0x60,0x02,0x21,0xcd,0x90,0x9e,0x24, ++0xe0,0x70,0x25,0x90,0x9e,0x27,0xe0,0x70,0x1f,0x90,0x9e,0x25,0xe0,0x70,0x19,0x90, ++0x9e,0x28,0xe0,0x70,0x13,0x90,0x9e,0x26,0xe0,0x70,0x0d,0x90,0x9e,0x29,0xe0,0x70, ++0x07,0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x9e,0x24,0xe0,0x90,0x04,0x44,0xf0, ++0x90,0x9e,0x25,0xe0,0x90,0x04,0x45,0xf0,0x90,0x9e,0x26,0xe0,0x90,0x04,0x46,0xf0, ++0xa3,0xe4,0xf0,0x90,0x9e,0x27,0xe0,0x90,0x04,0x48,0xf0,0x90,0x9e,0x28,0xe0,0x90, ++0x04,0x49,0xf0,0x90,0x9e,0x29,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e, ++0x10,0xe0,0x90,0x04,0x4c,0xf0,0x90,0x9e,0x11,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e, ++0x12,0xe0,0x90,0x04,0x4e,0xf0,0x90,0x9e,0x13,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90, ++0x9e,0x15,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x9e,0x24,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60, ++0xe0,0x90,0x9e,0x34,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x35,0xf0,0x90,0x05,0x62, ++0xe0,0x90,0x9e,0x36,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x2d, ++0xe0,0xff,0x90,0x9e,0x37,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x9e,0x2d,0xe0,0xc3, ++0x9e,0xd3,0x94,0x01,0x40,0x10,0x90,0x9e,0x1b,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90, ++0x9e,0x1f,0xe0,0xff,0x51,0x17,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,0xe0, ++0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0, ++0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,0x04, ++0xf0,0x22,0x90,0x9e,0x2b,0xe0,0x2f,0xf0,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60, ++0x02,0x61,0x1e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90, ++0x9e,0x2e,0xe0,0x70,0x32,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x9e,0x1b,0xe0,0xff,0x51,0x17,0x90,0x9e,0x2e, ++0x74,0x01,0x12,0x4e,0x26,0x80,0x40,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x38,0x90, ++0x9e,0x1f,0xe0,0xff,0x51,0x17,0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44, ++0x01,0xfd,0x7f,0x45,0x12,0x4e,0x30,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e, ++0x2a,0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e, ++0x2c,0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90, ++0x01,0xcc,0xe0,0x54,0x0f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02, ++0x81,0x60,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x81,0x59,0x90,0x9e, ++0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0, ++0x75,0x1e,0x01,0x75,0x1f,0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e, ++0x79,0x36,0x12,0x45,0x09,0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01, ++0x90,0x9e,0xae,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f, ++0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12, ++0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xae,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e, ++0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0, ++0x90,0x9e,0xae,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x39,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x91,0x61,0x90,0x9e, ++0x34,0xe0,0xff,0x90,0x9e,0xae,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0xae,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xae, ++0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0x61,0x29,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0, ++0x22,0x90,0x9e,0x3c,0x12,0x43,0x8b,0xef,0x12,0x43,0x94,0x54,0x9c,0x01,0x54,0xa5, ++0x02,0x54,0xc0,0x03,0x54,0xc9,0x05,0x54,0xd2,0x06,0x55,0x20,0x07,0x54,0xda,0x09, ++0x54,0xe3,0x0c,0x54,0xec,0x0d,0x54,0xf5,0x0e,0x54,0xfe,0x1b,0x55,0x07,0x1c,0x55, ++0x10,0x2c,0x54,0xae,0x2d,0x54,0xb7,0x2e,0x00,0x00,0x55,0x19,0x90,0x9e,0x3c,0x12, ++0x43,0x6b,0x02,0x61,0x1d,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x33,0x90,0x9e, ++0x3c,0x12,0x43,0x6b,0x02,0x6f,0x39,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x81, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0xaf,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x6e,0xe3,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b, ++0x02,0x6f,0xf7,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x7e,0x1b,0x90,0x9e,0x3c,0x12, ++0x43,0x6b,0x02,0x7c,0xb2,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4f,0x19,0x90,0x9e, ++0x3c,0x12,0x43,0x6b,0x02,0x6f,0x2b,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x6f,0x12, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x74,0x85,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0, ++0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13, ++0x54,0x07,0xfd,0xaf,0x06,0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43, ++0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4, ++0x54,0x0f,0x90,0x9e,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13, ++0x13,0x54,0x03,0x90,0x9e,0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90, ++0x96,0x46,0x12,0x43,0x5f,0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed, ++0xf0,0xef,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01, ++0xa3,0x12,0x43,0x8b,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20, ++0x54,0x0f,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41, ++0x12,0x43,0x6b,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b, ++0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01, ++0x12,0x42,0x20,0xff,0x90,0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83, ++0xef,0xf0,0x12,0x29,0xd9,0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe, ++0x90,0x9e,0x3f,0xe0,0xff,0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0x90,0x9e,0x40,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee, ++0xf0,0x75,0xf0,0x09,0xef,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e, ++0x45,0xe0,0xfe,0x75,0xf0,0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f, ++0x59,0xef,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f, ++0x5c,0xe5,0x59,0x75,0xf0,0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d, ++0x01,0xf5,0x5e,0x89,0x5f,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f, ++0xaf,0x82,0x85,0x83,0x60,0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9, ++0x74,0x96,0x35,0xf0,0x75,0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x12,0x43,0x94,0x56,0xaf,0x00,0x56,0xc4,0x01, ++0x56,0xd9,0x02,0x56,0xee,0x03,0x57,0x18,0x04,0x57,0x2d,0x05,0x57,0x42,0x06,0x57, ++0x69,0x0c,0x57,0x97,0x0d,0x57,0xc4,0x0e,0x57,0xf1,0x0f,0x00,0x00,0x58,0x25,0xe5, ++0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3, ++0x74,0x15,0x80,0x3c,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59, ++0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4, ++0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f, ++0xf0,0xa3,0x74,0x8f,0xf0,0x02,0x58,0x25,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0, ++0x80,0x12,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4, ++0xf0,0xa3,0x74,0x0d,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x02,0x58,0x25,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa, ++0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f, ++0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83, ++0xf0,0x90,0x04,0x44,0x02,0x58,0x1c,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9, ++0x5f,0x12,0x42,0x4d,0x90,0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00, ++0x01,0x12,0x42,0x5f,0x90,0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90, ++0x04,0x48,0x80,0x58,0x90,0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42, ++0x4d,0x90,0x04,0x4e,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42, ++0x5f,0x90,0x04,0x4d,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80, ++0x2b,0x90,0x04,0x53,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04, ++0x52,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04, ++0x51,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82, ++0x85,0x5b,0x83,0xa3,0xf0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0, ++0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0, ++0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4, ++0x35,0x5e,0xfa,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa, ++0x63,0xa9,0x64,0x90,0x00,0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0x85,0x5c,0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85, ++0x61,0x82,0x85,0x60,0x83,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xa3,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60, ++0x83,0xa3,0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24, ++0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75, ++0x5a,0x0b,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15, ++0x5a,0xe5,0x5a,0xc3,0x94,0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a, ++0x0f,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10, ++0x15,0x5a,0xe5,0x5a,0xc3,0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3, ++0xe0,0x4e,0x60,0x3b,0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e, ++0x4c,0xe5,0x5a,0xf0,0x80,0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5, ++0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0, ++0x4e,0x60,0x39,0xe4,0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3, ++0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24, ++0x10,0x80,0x0a,0x05,0x5a,0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c, ++0xf0,0x90,0x9e,0x4b,0xe0,0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43, ++0x5f,0xef,0xf0,0x90,0x9e,0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49, ++0x12,0x43,0x5f,0xee,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0xd3,0x9f,0x40,0x05,0x90,0x9e,0x4b,0x51,0x74,0x74,0x84,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x04,0xf5,0x83,0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50, ++0x02,0x51,0x74,0x90,0x9e,0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43, ++0x74,0x03,0xf0,0x22,0xef,0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0, ++0x22,0xef,0xd3,0x94,0x03,0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90, ++0x96,0x43,0xf0,0x22,0xe0,0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xed,0xf0,0xaf,0x59,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20, ++0x50,0x0e,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29, ++0x74,0xa6,0x2f,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x78,0xef, ++0xf0,0x24,0xa6,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x79,0xf0,0x7b, ++0x01,0x7a,0x9e,0x79,0x78,0x7d,0x02,0x51,0xce,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x97,0x12,0x43,0x8b,0x90,0x9e,0x9a,0xe0,0x54, ++0xf0,0x44,0x06,0xff,0xf0,0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e, ++0xf0,0x90,0x9e,0x97,0x12,0x43,0x6b,0x90,0x9e,0x94,0x12,0x43,0x8b,0x7b,0x01,0x7a, ++0x9e,0x79,0x9a,0x71,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51, ++0x54,0x1f,0xf5,0x56,0x74,0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5, ++0x54,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01, ++0xeb,0xc3,0x95,0x57,0x40,0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55, ++0xe5,0x56,0x90,0x41,0xd6,0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25, ++0x50,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x41,0x85, ++0x25,0x50,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58, ++0xe5,0x58,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe, ++0x74,0x01,0x93,0xff,0xe5,0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed, ++0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0, ++0xaf,0x05,0xad,0x58,0x51,0x85,0xaf,0x58,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0x91,0x12,0x43,0x8b,0x90,0x9e,0x75,0xe0,0x64,0x02,0x60,0x6e,0x90,0x9e, ++0x75,0xe0,0x64,0x01,0x70,0x66,0x90,0x9e,0xb0,0xe0,0xff,0x04,0xf0,0x90,0x9e,0x91, ++0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f,0xaf,0x7e,0x01,0x91,0x82, ++0xef,0x60,0x49,0x90,0x9e,0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x75, ++0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09,0x90,0x9e,0x94,0x12,0x43, ++0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,0x9e,0x91,0x12,0x43,0x6b,0x12,0x29,0xd9, ++0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,0x7a,0x01,0x79,0xa2,0x12,0x45,0x09,0x90, ++0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x9e,0x2f,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b, ++0x00,0x7a,0x00,0x79,0x13,0x90,0x9e,0x94,0x12,0x43,0x8b,0x0b,0x7a,0x9e,0x79,0x2f, ++0x61,0xd9,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0xa0,0xee,0xf0,0xa3,0xef, ++0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0xa0,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e, ++0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa3,0xe0,0x94,0xe8,0x90,0x9e,0xa2,0xe0,0x94, ++0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x9e, ++0xa2,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80, ++0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xac,0x07,0xec,0xc3,0x94,0x20,0x50,0x0d, ++0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2c, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f, ++0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x49,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xfe, ++0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24, ++0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x46,0xcb, ++0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e,0x43,0xe0,0x90,0x9e,0x40, ++0xf0,0xf5,0x64,0xed,0x70,0x02,0xc1,0x2e,0x90,0x9e,0x41,0xed,0xf0,0xe5,0x64,0x30, ++0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,0x64,0xa3,0xe0,0x14,0xf0,0x90,0x9e,0x41,0xe0, ++0x70,0x02,0xc1,0x2e,0x90,0x9e,0x40,0xe0,0xff,0xd3,0x94,0x00,0x50,0x02,0xc1,0x2e, ++0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,0x90,0x9e,0x3e,0xf0,0x90,0x9e,0x42,0xe0,0xfd, ++0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94,0x10,0x40,0x21,0xef,0x24, ++0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90, ++0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08, ++0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x44,0xe0,0x5e,0xfe, ++0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x3e,0xe0,0xf5,0x64,0xa3,0xe0,0x04,0xf0, ++0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0x6f,0x60,0x08,0x90,0x9e,0x3e,0xe0, ++0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0xc3,0x9f,0x50, ++0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x42,0xe0,0xf5,0x64,0xe5,0x64, ++0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01, ++0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74, ++0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xec,0x25,0xe0, ++0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x04, ++0xad,0x64,0x51,0x85,0xaf,0x64,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32, ++0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x12, ++0x44,0xf1,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x52,0x90, ++0x9e,0x63,0xe0,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x42,0x90, ++0x9e,0x60,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0, ++0x80,0x2f,0x90,0x9e,0x63,0xe0,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80, ++0x20,0x90,0x9e,0x63,0xe0,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11, ++0x90,0x9e,0x52,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01, ++0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f, ++0x54,0x12,0x4e,0x30,0x7d,0xff,0x7f,0x55,0x12,0x4e,0x30,0x7d,0xff,0x7f,0x56,0x12, ++0x4e,0x30,0x7d,0xff,0x7f,0x57,0x02,0x4e,0x30,0x90,0x00,0x02,0xe0,0x54,0xe0,0x90, ++0x9e,0x75,0x60,0x04,0x74,0x01,0xf0,0x22,0x74,0x02,0xf0,0x22,0x90,0x00,0xf3,0xe0, ++0x30,0xe3,0x08,0x90,0x9e,0x77,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9e,0x77,0xf0, ++0x90,0x9e,0x77,0xe0,0xb4,0x01,0x12,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x0b,0x90,0x9e, ++0x64,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x22,0x90,0x9e,0x64,0x74,0xfd,0xf0,0xa3, ++0x74,0x2f,0xf0,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0x7b,0xf0,0x74,0x5f, ++0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5, ++0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4e,0x45,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4e,0x45,0x90,0x01,0xc4,0x74,0x7b,0xf0,0x74,0x5f, ++0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8f,0x6b,0x8c, ++0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4,0xf5,0x73,0x90,0x9e, ++0x63,0xf0,0xf5,0x74,0x90,0x9e,0x60,0x74,0x0c,0xf0,0x90,0x9e,0x5e,0xf0,0xe4,0x90, ++0x9e,0x61,0xf0,0x90,0x9e,0x5d,0xf0,0x90,0x9e,0x5c,0xf0,0x90,0x9e,0x5f,0x04,0xf0, ++0x90,0x9e,0x50,0xf0,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x52,0xf0,0x90,0x9e,0x5a, ++0x74,0x07,0xf0,0xe4,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x58,0xf0,0xa3,0x74,0x02,0xf0, ++0x90,0x9e,0x56,0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90, ++0x9e,0x5b,0x74,0x05,0xf0,0xe4,0x90,0x9e,0x54,0xf0,0x90,0x9e,0x4f,0xf0,0x90,0x9e, ++0x76,0xf0,0x22,0xe4,0x90,0x9e,0x62,0xf0,0x90,0x9e,0x51,0xf0,0x90,0x9e,0x63,0xf0, ++0x22,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x11,0x83,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12, ++0x29,0xd9,0xf5,0x74,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70, ++0x40,0x7f,0x01,0x80,0x3a,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42, ++0x20,0xfd,0xe4,0xff,0x11,0xf2,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xfd,0x7f,0x01,0x11,0xf2,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a, ++0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x11,0xf2,0xe4,0xff,0x31, ++0x46,0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x5f,0x74,0x01,0xf0, ++0x80,0x16,0xed,0x70,0x0a,0x90,0x9e,0x5b,0xe0,0x90,0x9e,0x5f,0xf0,0x80,0x05,0x90, ++0x9e,0x5f,0xed,0xf0,0x90,0x9e,0x5f,0xe0,0x90,0x9e,0x50,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x61,0xf0,0x90,0x00, ++0x03,0x12,0x42,0x20,0x90,0x9e,0x4f,0xf0,0x12,0x29,0xd9,0x65,0x74,0x60,0x02,0x11, ++0x91,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x64,0x01,0x70,0x30,0x7d,0x7c,0x7f,0x02,0x12, ++0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x12,0x47,0x16,0xe4,0xff,0x12,0x48,0x8f,0x90,0x06,0x04,0xe0, ++0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7c, ++0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12, ++0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0, ++0x90,0x9e,0x58,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x73,0x30,0xe0,0x1b,0x90, ++0x9e,0x52,0xe0,0x70,0x1a,0xe0,0x04,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x1a,0xe4,0x90,0x9e,0x52,0xf0,0x22, ++0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x5e,0x90,0x9e,0x60,0xe0, ++0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4b,0x90, ++0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3d,0x90,0x9e,0x75, ++0xe0,0xb4,0x02,0x10,0x90,0x9e,0x64,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0, ++0x60,0x17,0x80,0x26,0x90,0x9e,0x75,0xe0,0xb4,0x01,0x0e,0x90,0x01,0xaf,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,0x90,0x9e,0x54,0xe0,0x70,0x08,0x90, ++0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0, ++0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5,0x73,0xb4, ++0x01,0x04,0xe4,0xff,0x51,0x62,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x0c, ++0xf0,0x22,0x8f,0x76,0x90,0x9e,0x5e,0xe0,0x90,0x01,0xc1,0xf0,0xa3,0xe5,0x12,0xf0, ++0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x69,0x12,0x47,0xfa,0xe5,0x76, ++0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0, ++0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0, ++0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x90,0x9e,0xaf,0xef,0xf0,0x51,0xc5,0x90,0x9e, ++0xaf,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0, ++0xe0,0x44,0x04,0xf0,0x22,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e, ++0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34, ++0x81,0x90,0x9e,0x77,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03, ++0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x27,0xe4,0x90,0x9e,0xa8, ++0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65, ++0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa9,0xe0,0x94,0x88,0x90,0x9e,0xa8,0xe0,0x94,0x13, ++0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x9e,0xa8,0xe4,0x75,0xf0, ++0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x9e,0xa9,0xe0, ++0x94,0x32,0x90,0x9e,0xa8,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0, ++0xb2,0x22,0x90,0x9e,0x5e,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12,0x45,0x01, ++0x12,0x45,0x02,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x60,0xe0, ++0x30,0xe6,0x1c,0xe0,0x54,0x0f,0xff,0x90,0x9e,0x4e,0xe0,0xfe,0x4f,0x90,0x01,0x2f, ++0xf0,0xee,0x64,0x80,0x90,0x9e,0x4e,0xf0,0x90,0x9e,0x60,0xe0,0x54,0xbf,0xf0,0x22, ++0x8f,0x75,0x12,0x45,0xb1,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x6a,0x12,0x47,0xfa, ++0xe5,0x75,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44, ++0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54, ++0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe4,0x90,0x9e,0x2f,0xf0,0xe5,0x74, ++0x60,0x6a,0xe5,0x73,0x64,0x01,0x70,0x64,0xe5,0x74,0x14,0x60,0x29,0x24,0xfd,0x60, ++0x25,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x23,0x90,0x9e,0x50,0xe0,0x14,0xf0,0xe0, ++0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x9e,0x50,0xe0,0x70,0x0a,0x90,0x9e,0x5f,0xe0, ++0x90,0x9e,0x50,0xf0,0x80,0x00,0x90,0x9e,0x2f,0x74,0x01,0xf0,0x90,0x9e,0x2f,0xe0, ++0x60,0x2a,0x90,0x9e,0x63,0xe0,0x44,0x10,0xf0,0xe4,0x90,0x9e,0x89,0xf0,0x90,0x9e, ++0x5a,0x12,0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x5e,0xe0,0x54,0x0f, ++0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x1a,0x22,0xef,0xc3,0x94, ++0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe, ++0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3, ++0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74, ++0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xad,0x07,0xed, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f, ++0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e, ++0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41, ++0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xa1, ++0xd4,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90, ++0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02,0xc1,0x05,0xeb,0xc3,0x94,0x10,0x40, ++0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e, ++0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x39,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x41,0xe0,0x5e,0xfe,0xa3, ++0xe0,0x5f,0x4e,0x60,0x1c,0xeb,0x64,0x13,0x60,0x08,0xeb,0x64,0x12,0x60,0x03,0xbb, ++0x11,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x64,0x80, ++0x34,0x0b,0x80,0x8b,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x67,0x2d,0xf5, ++0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12, ++0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5,0x64, ++0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5, ++0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,0x9e,0x3e,0xe0,0xff,0x74, ++0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x64,0xec, ++0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01, ++0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01, ++0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24, ++0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x64,0x22, ++0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5,0x64, ++0x44,0x80,0xfd,0x12,0x5a,0x85,0xe5,0x64,0x44,0x80,0xff,0x22,0xe4,0xf5,0x59,0xe5, ++0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,0x95,0x01,0xe0,0xff,0x90, ++0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4b, ++0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x03,0x02,0x6d,0x04,0xe5,0x59,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee, ++0x94,0x00,0x50,0x03,0x02,0x6d,0x04,0xe5,0x59,0x94,0x20,0x40,0x09,0x90,0x9a,0xc5, ++0xe0,0x60,0x03,0x02,0x6d,0x10,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74, ++0x90,0x35,0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,0x24,0x80, ++0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,0xcf,0xf0, ++0xa3,0xef,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83, ++0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0xc3,0x94, ++0x20,0x50,0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0x3f,0x90,0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,0x54,0x1f, ++0xa3,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x3d,0xf0,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xc3,0x94, ++0x05,0x40,0x03,0x02,0x69,0xdd,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x9f, ++0x40,0x13,0x90,0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9e, ++0x34,0xf0,0xef,0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x29,0x90,0x9e,0x35, ++0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,0x35, ++0xe0,0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe, ++0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06, ++0xef,0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,0x9e, ++0x3c,0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35, ++0xf0,0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,0x93, ++0xff,0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,0xe4, ++0xfd,0xaf,0x59,0x12,0x5c,0xd8,0x81,0x9b,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,0x5c, ++0xa9,0x5d,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,0x42, ++0x97,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5, ++0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00, ++0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12, ++0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c, ++0xa9,0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9, ++0x60,0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62, ++0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x03, ++0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,0x12, ++0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61, ++0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e, ++0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0, ++0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0, ++0xfc,0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,0x0c, ++0xe5,0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,0xf5, ++0x62,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,0x61, ++0xf0,0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x07, ++0xaf,0x59,0x12,0x64,0xbd,0x81,0x6f,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,0xf5, ++0x82,0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61, ++0x50,0x02,0x81,0x6f,0x7d,0x01,0xaf,0x59,0x12,0x5c,0xd8,0x81,0x6f,0x74,0xe6,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0x61,0x78, ++0x90,0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,0x40, ++0x3d,0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,0x2e, ++0x80,0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94, ++0x0a,0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,0x40, ++0x0d,0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,0x84, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x61,0x25, ++0x90,0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x61,0x25,0x74,0x85,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33, ++0xfe,0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,0x9f, ++0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe, ++0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64, ++0x80,0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d, ++0xf5,0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,0x05, ++0x80,0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01, ++0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83, ++0xe0,0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,0x5f, ++0xe0,0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0xad,0x63,0x81,0x6a,0xec,0x64,0x06,0x60,0x02,0x81,0x6f,0xf5, ++0x61,0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3, ++0xe0,0xfd,0x12,0x29,0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,0x5e, ++0xaa,0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12, ++0x42,0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,0x29, ++0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,0xe0, ++0x95,0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,0x05, ++0xbd,0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,0x46, ++0x80,0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,0x39, ++0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,0x05, ++0x28,0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,0x75, ++0x63,0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e, ++0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03, ++0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x64,0x7d,0x74, ++0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0xe6, ++0x50,0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,0xa9, ++0x60,0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02, ++0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90, ++0x00,0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43, ++0x19,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x03,0x02,0x66,0xbf, ++0x22,0x90,0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3, ++0xe4,0xf0,0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d, ++0xbd,0x10,0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75, ++0xf0,0x0a,0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x04,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74, ++0x13,0xf0,0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5, ++0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5, ++0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe4,0xf0,0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41, ++0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4, ++0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b, ++0x12,0x43,0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f, ++0x74,0x01,0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75, ++0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed, ++0x90,0x96,0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84, ++0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x02, ++0xa1,0x3f,0x22,0x12,0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef, ++0xf0,0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,0x42, ++0xf0,0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4, ++0x13,0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x55,0x35,0x12,0x29,0xd9,0x90,0x95, ++0x01,0xf0,0x22,0x12,0x29,0xd9,0xf5,0x73,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff, ++0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x56,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x90,0x9e,0x57,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x55,0xf0,0x90,0x00,0x03, ++0x12,0x42,0x20,0x90,0x9e,0x5b,0xf0,0x22,0x90,0x9e,0x56,0x74,0x01,0xf0,0x90,0x9e, ++0x57,0x74,0x03,0xf0,0x90,0x9e,0x55,0x74,0x14,0xf0,0x90,0x9e,0x5b,0x74,0x05,0xf0, ++0x22,0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x5a,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0xef,0xf0,0x22,0x90, ++0x9e,0x5a,0x74,0x07,0xf0,0x90,0x9e,0x58,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,0x90, ++0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x67,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x68,0xf0,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42,0x20, ++0xff,0xed,0x2f,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05, ++0xed,0x2f,0x90,0x9e,0x6b,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x3f,0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2, ++0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90, ++0x00,0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x22, ++0x16,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x24,0x70, ++0x04,0xe5,0x23,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01, ++0x12,0x42,0xc2,0xff,0xae,0xf0,0x11,0x6f,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,0x6b, ++0x12,0x29,0xd9,0x65,0x22,0x60,0x03,0x12,0x44,0xca,0xd0,0xd0,0x92,0xaf,0x22,0x90, ++0x9e,0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x22,0x01,0x8e,0x23,0xf5,0x24,0xe4,0xfd, ++0x7f,0x0b,0x11,0xb1,0xe4,0xfd,0x7f,0x02,0x11,0xb1,0x31,0x87,0xe4,0xff,0x31,0x7b, ++0xe4,0xf5,0x26,0x90,0x01,0xc9,0xe5,0x26,0xf0,0x90,0x9e,0x42,0xe0,0xfc,0xa3,0xe0, ++0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35, ++0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,0x90,0x9e,0x44, ++0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,0x44,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47, ++0xe0,0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4d,0x28,0x90, ++0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4, ++0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70, ++0x1d,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54, ++0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4d,0x28,0x90,0x9e,0x44,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43, ++0xe0,0x5f,0xf0,0x12,0x4d,0x28,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0xca,0xe5,0x25, ++0xf0,0xef,0x60,0x02,0x31,0xe8,0x22,0x7f,0x0b,0x51,0x08,0xef,0x65,0x25,0x60,0x10, ++0xe5,0x25,0xb4,0x01,0x05,0xe4,0xf5,0x25,0x80,0x03,0x75,0x25,0x01,0x7f,0x01,0x22, ++0x7f,0x00,0x22,0xe5,0x22,0x64,0x01,0x70,0x3e,0x31,0x87,0xbf,0x01,0x04,0x7f,0x01, ++0x31,0x7b,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x00, ++0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4e,0x30,0x90,0x00,0x46,0xe0,0x54,0xfb, ++0xfd,0x7f,0x46,0x12,0x4e,0x30,0x7f,0x02,0x51,0x08,0x8f,0x26,0x90,0x01,0xc9,0xe5, ++0x26,0xf0,0xb4,0x01,0x02,0x31,0xe8,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e,0xb1,0xf0, ++0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x12,0x4e,0x30,0x90,0x9e,0xb1,0xe0, ++0x44,0xb0,0xfd,0x7f,0x49,0x02,0x4e,0x30,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x9e,0xb2,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12,0x4d, ++0x28,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3, ++0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b, ++0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x44, ++0x90,0x9e,0xb2,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0x12,0x4d,0x20,0x90,0x9e,0xb2,0xe0,0xfd,0x74,0x01,0x7e,0x00, ++0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42, ++0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce, ++0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0x6d,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x6e,0xe0,0xf5,0x64,0xa3,0xe0, ++0xf5,0x65,0xe4,0xf5,0x61,0x74,0x70,0x25,0x61,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83, ++0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,0xe5,0x61,0xb4,0x04,0xe5, ++0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x73,0x06,0x00,0x74,0x2e,0x01,0x73,0x0c,0x02, ++0x73,0x0c,0x03,0x73,0x0c,0x04,0x74,0x2e,0x05,0x73,0xfe,0x80,0x74,0x14,0x81,0x74, ++0x2e,0x82,0x00,0x00,0x74,0x2a,0xaf,0x69,0x91,0x35,0x81,0x2e,0x90,0x9e,0x40,0xe0, ++0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x9e,0x3f, ++0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x64,0x94,0x08, ++0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,0x61,0xc3,0x9f,0x40,0x02, ++0x81,0x2e,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,0x25,0x65,0xff,0xc3,0x74, ++0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4e,0x30,0x80,0x1a,0xc3,0x74,0x03, ++0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,0x25,0x65,0xfd,0xec,0x35, ++0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,0xc3,0xe5,0x64,0x94,0x10, ++0x40,0x02,0x81,0x2e,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,0x02,0x81,0x2e,0xaf,0x67, ++0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07, ++0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0, ++0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x68, ++0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x69,0xe4,0xfc, ++0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e,0x41,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x68, ++0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12, ++0x37,0x54,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e, ++0xf5,0x62,0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01, ++0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,0xf0,0xe5,0x6a,0x14,0xfe, ++0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90, ++0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7, ++0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0, ++0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x6a, ++0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x5b,0x75, ++0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9, ++0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,0x75,0x5a,0x80,0x80,0x05, ++0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25, ++0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x90,0x9e,0x6d,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x6e,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x5b, ++0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x6c, ++0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x51,0xa9, ++0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x60,0x94,0xe8,0xe5,0x5f, ++0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x60,0xe5, ++0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01, ++0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0, ++0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,0x5e,0xe5,0x5a,0x64,0x80, ++0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,0x59,0x00,0x75,0x5a,0x80, ++0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x5b,0xf5,0x5b, ++0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,0x5c,0x60,0x02,0x81,0xc3, ++0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0, ++0xa3,0xf0,0x22,0x22,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,0x89,0x5d,0xe4,0x90, ++0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4d,0x28,0xe5,0x59,0x54,0x03,0xff, ++0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4d,0x28,0x90,0x00,0x33,0xe0,0x54, ++0x7f,0xf0,0x12,0x4d,0x28,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34,0xe0, ++0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3,0x94, ++0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,0x4d, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0xf5,0x25,0x22,0xe4,0x90,0x9e,0xaa,0xf0,0xa3, ++0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3, ++0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x9e,0xab,0xe0,0x94,0xe8,0x90,0x9e,0xaa, ++0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90, ++0x9e,0xaa,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e,0x08,0x12, ++0x27,0xde,0x90,0x9d,0xff,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90, ++0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x07,0x12, ++0x2a,0x7f,0x90,0x9e,0x77,0xe0,0x90,0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef, ++0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff, ++0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e, ++0x03,0x12,0x43,0x53,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff, ++0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e,0x0b,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12, ++0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x77,0xe0, ++0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f, ++0x01,0x12,0x34,0x81,0x22,0x90,0x9e,0x77,0xe0,0x90,0x9e,0x0f,0xf0,0x22,0xef,0x70, ++0x03,0x02,0x78,0xe6,0x90,0x9e,0x0f,0xe0,0x60,0x03,0x02,0x7c,0xb1,0x90,0x9d,0xfb, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb3,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb7,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc7,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcb,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d, ++0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdf,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe3, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x9d,0xf3,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90,0x9d,0xf7,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0,0x64,0x01,0x60,0x02,0x81,0xb1, ++0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xfb,0x12,0x2a,0x7f,0x7f,0x44,0x7e, ++0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb3,0x12,0x2a, ++0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb7,0x12,0x2a,0x7f,0x7f,0x78, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc7,0x12, ++0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcb,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdb, ++0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdf,0x12,0x2a,0x7f, ++0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe3,0x12,0x2a,0x7f,0x7f,0xec,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27, ++0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9d, ++0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9d,0xf3,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xf7,0x12,0x2a,0x7f,0x7f,0x8c, ++0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43, ++0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f, ++0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4, ++0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25, ++0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b, ++0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9, ++0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4, ++0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12, ++0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9, ++0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4, ++0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e, ++0xa4,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12, ++0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e, ++0xa4,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90, ++0x9e,0xa4,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x9e,0xa4, ++0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xed,0x44,0x10,0xfd,0xec,0x44,0x01, ++0xfc,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x54,0xf0, ++0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0xef,0x44, ++0x01,0xff,0xec,0x90,0x9e,0xa4,0x12,0x2a,0x7f,0x90,0x9e,0xa4,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0xe4,0x90,0x9e,0x0f, ++0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1e,0xf0,0xe0,0x60,0x04,0xe0, ++0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x59,0xc2,0xaf,0x90,0x00,0x47,0xe0,0x54, ++0xfb,0xfd,0x7f,0x47,0x12,0x4e,0x30,0x7d,0x40,0x7f,0x01,0x12,0x36,0xaf,0xe5,0x59, ++0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4e,0x30,0x90,0x04,0xfd,0xe4, ++0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x9e,0x27,0xf0,0x90, ++0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x26,0xf0,0x90,0x9e,0x29,0xf0,0x90, ++0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x15,0xf0,0x90, ++0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x2e,0xf0,0x90,0x9e,0x1f,0xf0,0x90, ++0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0,0xfd,0x7f,0x51, ++0x02,0x4e,0x30,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e,0x1c,0xe0,0x60, ++0x02,0xc1,0x1a,0x90,0x9e,0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80, ++0x3b,0x90,0x9e,0x11,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28, ++0x90,0x9e,0x12,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x11, ++0xf0,0x80,0x15,0x90,0x9e,0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4, ++0x90,0x9e,0x12,0xf0,0x90,0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90,0x00,0x44,0xe0, ++0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3,0x94,0xff,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0, ++0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04, ++0xf0,0xe4,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3, ++0x32,0x90,0x9e,0x27,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90, ++0x9e,0x28,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e, ++0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x28,0xf0,0x90, ++0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90, ++0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1f,0xf0,0x90,0x05, ++0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e,0x2b,0xf0,0x90,0x05, ++0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e,0x2d,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b,0xe0,0xff,0x12,0x52,0x17, ++0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c,0xe0,0x70,0x02,0xe1,0x25, ++0x90,0x9e,0x1b,0xe0,0x70,0x02,0xe1,0x25,0x90,0x9e,0x1f,0xe0,0x70,0x02,0xe1,0x25, ++0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x2e,0x74,0x01,0xf0, ++0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x12,0x4e,0x27,0x90,0x00,0x46,0xe0,0x44, ++0x01,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f, ++0x45,0x12,0x4e,0x30,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90, ++0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90, ++0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90, ++0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff, ++0x12,0x37,0x00,0x80,0x2d,0x90,0x9e,0x1c,0xe0,0x70,0x2f,0x90,0x9e,0x2e,0x12,0x4e, ++0x26,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x12,0x4e,0x30,0x90,0x05,0x22, ++0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12, ++0x36,0x92,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x00,0x0e,0x56,}; ++#else ++ ++ ++// =================== v80 TSMC COMMON 2011-12-14 ======================= ++u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x15,0x52,0xd4,0x3e,0x00,0x00, ++0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0x2e, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x4f, ++0x00,0x41,0x9e,0xad,0x00,0x41,0x9e,0x61,0x80,0x41,0x9e,0x62,0x80,0x41,0x9e,0xaf, ++0x00,0x00,0xf0,0x90,0x9e,0x6b,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x85,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x86,0xf0, ++0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x70, ++0x14,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x2b,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x71,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7d,0x01,0xaf,0x24,0xe1,0x2f,0xb1,0xa6,0xbf,0x01,0x0f,0x90,0x9e,0x51,0xe0, ++0xff,0xe4,0xfd,0xf1,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x53,0x23,0xf0,0x43, ++0x23,0x01,0x91,0xfd,0x91,0xfe,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0x22,0x22,0x22, ++0x22,0x00,0x00,0x02,0x5f,0x91,0x02,0x5f,0x98,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x88,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8b,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8b, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x88,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0x90,0x9e,0x2f,0xf0,0xe0,0x54,0xc0,0x70,0x08, ++0x53,0x26,0xfe,0x53,0x26,0xfd,0x91,0xd1,0x90,0x9e,0x2f,0xe0,0x30,0xe6,0x13,0x43, ++0x26,0x01,0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x04,0x91,0xd7,0x80,0x07,0x91,0x80, ++0x80,0x03,0x53,0x26,0xfe,0x90,0x9e,0x2f,0xe0,0x30,0xe7,0x16,0x43,0x26,0x02,0xe4, ++0x90,0x9e,0x86,0x91,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x74,0x74,0x01, ++0xf0,0x22,0x53,0x26,0xfd,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d, ++0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44, ++0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0, ++0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0, ++0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0x90,0x01,0xc4,0x74,0xd4,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01, ++0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32, ++0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c, ++0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x66, ++0x09,0xe5,0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0, ++0x30,0xe0,0x24,0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0, ++0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90, ++0x06,0x92,0x74,0x01,0xf0,0x80,0x07,0x90,0x9e,0x71,0xe4,0xf0,0x91,0xd1,0xe5,0x34, ++0x30,0xe3,0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24, ++0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd, ++0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74, ++0x02,0xf0,0x80,0x07,0x90,0x9e,0x70,0xe4,0xf0,0x91,0xd1,0xe5,0x34,0x30,0xe4,0x09, ++0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x73,0x66,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01, ++0x3c,0x74,0x20,0xf0,0x12,0x52,0x64,0xe5,0x35,0x30,0xe0,0x18,0x90,0x01,0x3d,0x74, ++0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0xf5,0x24,0x12, ++0x64,0xe3,0x91,0xd1,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5, ++0x36,0x30,0xe0,0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90, ++0x01,0x3e,0x74,0x02,0xf0,0x74,0xd4,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0, ++0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00, ++0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x90, ++0x9e,0xa6,0xed,0xf0,0x90,0x9e,0xa5,0xef,0xf0,0x54,0x0f,0xff,0xe5,0x23,0x54,0x0f, ++0x6f,0x60,0x70,0x90,0x9e,0xa5,0xe0,0x30,0xe2,0x2a,0xe5,0x23,0x20,0xe2,0x05,0x7f, ++0x01,0x12,0x63,0xf3,0xe5,0x23,0x30,0xe3,0x09,0x90,0x9e,0xa5,0xe0,0x20,0xe3,0x02, ++0x80,0x52,0xe5,0x23,0x20,0xe3,0x4c,0x90,0x9e,0xa5,0xe0,0x30,0xe3,0x45,0xa3,0xe0, ++0xff,0x02,0x5e,0x95,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x9e,0xa5,0xe0, ++0x20,0xe3,0x08,0x12,0x62,0xd7,0xef,0x60,0x2a,0xf1,0xb4,0xe5,0x23,0x54,0x0f,0xff, ++0xbf,0x04,0x10,0x90,0x9e,0xa5,0xe0,0x20,0xe2,0x09,0x12,0x63,0x20,0xef,0x60,0x13, ++0x12,0x61,0x3a,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x02,0x08,0x12,0x63,0x83,0xef,0x60, ++0x02,0x91,0xec,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x05, ++0x7f,0x01,0x12,0x5e,0x5c,0x53,0x23,0xf0,0x43,0x23,0x04,0x22,0xe0,0xff,0x7d,0x01, ++0x90,0x9e,0x99,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x25,0x60, ++0x05,0xe4,0xff,0x12,0x61,0x1f,0x90,0x9e,0x99,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9b, ++0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x9e,0x99,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10, ++0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x9e,0x9a,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff, ++0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9b,0xa3,0xe0, ++0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82, ++0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9b,0xe0,0xfe,0xa3,0xe0, ++0xff,0x22,0x12,0x45,0xa6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x12, ++0x47,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0x79,0xf0,0x74,0x48,0xa3,0xf0, ++0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e, ++0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x17,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85, ++0xd5,0x0c,0x85,0xd6,0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3, ++0x13,0xff,0xe5,0x0e,0x54,0x20,0x6f,0x70,0x02,0x21,0xc9,0xe5,0x0f,0x30,0xe5,0x02, ++0x21,0xc9,0xe5,0x0d,0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c, ++0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83, ++0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e, ++0xd3,0x94,0x04,0x40,0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00, ++0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff, ++0xe5,0x0e,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90, ++0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef, ++0xf0,0xe5,0x0f,0x20,0xe6,0x24,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a, ++0x30,0xe7,0x36,0xaf,0x4d,0x12,0x5b,0x68,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0a,0x30,0xe7,0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f, ++0xf5,0x53,0xab,0x4e,0xaf,0x4d,0x12,0x5b,0x05,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x45,0x90,0x9e,0x73,0xe0,0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x71,0xc4,0xef,0x64,0x01,0x70,0x2d,0x90,0x9e,0x69,0xe0,0xf5,0x44, ++0x75,0x45,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x9e,0x71,0xf0,0x80,0x08,0x71, ++0xc4,0xbf,0x01,0x03,0x12,0x44,0xd1,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x13,0x85,0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5, ++0x17,0x85,0xd6,0x18,0x85,0xd7,0x19,0x85,0xd9,0x1a,0x12,0x5c,0x46,0xe5,0x2c,0x30, ++0xe3,0x06,0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34, ++0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,0x30, ++0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75, ++0xe8,0x00,0xd1,0xdb,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x71,0xdb,0x80,0xfe,0xe5, ++0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x12,0x90, ++0x9e,0x5f,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x65,0xa3,0x90,0x9e,0x5f,0xe4, ++0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x12,0x40,0x90, ++0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a, ++0x74,0x01,0xf0,0x90,0x9e,0x4f,0xe4,0xf0,0x80,0x17,0x90,0x9e,0x4f,0xe0,0x04,0xf0, ++0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x02,0x11, ++0x62,0xe5,0x2e,0x30,0xe2,0x09,0x90,0x01,0x36,0x74,0x04,0xf0,0x12,0x65,0x3b,0xe5, ++0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x22,0x64,0x01,0x70,0x1c, ++0xe5,0x25,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90, ++0x9e,0x86,0xe4,0x12,0x44,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x22,0xb4,0x01,0x20,0xe5,0x25,0x60,0x1c, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x74,0xe4,0xf0, ++0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1,0xe5,0x2e,0x30,0xe5, ++0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x22,0xb4,0x01,0x14,0xe5,0x25,0x60,0x10, ++0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xd7,0x80,0x03,0x12,0x44,0x80, ++0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x10, ++0xe5,0x25,0x60,0x0c,0x53,0x26,0xfe,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1, ++0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0,0x12,0x61,0x92,0x74,0x79, ++0x04,0x90,0x01,0xc4,0xf0,0x74,0x48,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02, ++0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xac,0xed,0xf0,0x90,0x9e,0xab,0xef,0xf0,0xd3,0x94,0x07,0x50, ++0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x71,0xdb,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x71, ++0xdb,0x90,0x9e,0xac,0xe0,0x60,0x16,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x45,0x80,0x6b,0x90,0x9e,0xab,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x71,0xd3,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00, ++0x43,0xe0,0x4f,0xf0,0x71,0xdb,0x90,0x9e,0xac,0xe0,0x60,0x1b,0x90,0x9e,0xab,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0, ++0x5f,0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe, ++0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed, ++0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24, ++0x02,0x60,0x02,0xa1,0x9f,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44, ++0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x91, ++0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a, ++0xf0,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e, ++0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90, ++0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10, ++0xfd,0x7f,0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00, ++0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd, ++0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x91,0xe3,0x22, ++0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90, ++0x9e,0x1f,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x2d,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b, ++0xe0,0xff,0x12,0x52,0x12,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c, ++0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1b,0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1f, ++0xe0,0x70,0x02,0xc1,0xa7,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90, ++0x9e,0x2e,0x74,0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x91,0xda,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15, ++0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54, ++0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a, ++0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c, ++0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4, ++0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20, ++0xe4,0xff,0x12,0x37,0x00,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e, ++0x91,0xd9,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x05,0x22, ++0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12, ++0x36,0x92,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x01,0x30,0xe4,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0xfd,0x7f,0x50,0x91,0xe3,0xe4,0xfd,0x7f,0x51,0x91,0xe3,0xe4,0xfd,0x7f,0x52,0x91, ++0xe3,0xe4,0xfd,0x7f,0x53,0x81,0xe3,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74,0x01, ++0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f,0xab,0x59, ++0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78, ++0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16,0x12, ++0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a,0x7f,0x90, ++0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x2a,0x7f, ++0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x91,0xe3, ++0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44, ++0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x91,0xe3,0x90,0x00, ++0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd, ++0x7f,0x46,0x91,0xe3,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb0,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x91,0xe3,0x90,0x9e,0xb0, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x81,0xe3,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a, ++0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a, ++0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90, ++0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0xe4,0x90, ++0x9e,0x31,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x77,0x64,0x12,0x5e,0xde,0x90,0x9e, ++0x5e,0xef,0xf0,0x12,0x5e,0xeb,0x90,0x9e,0x60,0xef,0xf0,0xe4,0xf5,0x12,0x12,0x6e, ++0xdf,0x12,0x77,0xdb,0x12,0x5f,0x9f,0x12,0x32,0x3d,0x12,0x77,0xd7,0x12,0x4f,0xf8, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5e,0xf8,0x11,0x16,0x12,0x44,0xff,0x12,0x7d,0x9b,0x90, ++0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x5e,0xaf,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4b,0xdb,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x9e,0x31,0xe0, ++0x64,0x01,0xf0,0x24,0x2e,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30, ++0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x71,0x1a,0xe5,0x12,0x30,0xe6,0x16, ++0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x68,0x8d,0x90,0x9e,0x1e,0xe0,0xff,0x60, ++0x03,0xb4,0x01,0x02,0x31,0x10,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7d,0xf9,0x11, ++0xe3,0x80,0xb9,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06, ++0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x77,0x75,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0, ++0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x56,0xe4,0x90,0x06,0x34,0xf0,0x22, ++0x90,0x9e,0x15,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0x21,0xc8,0x90,0x9e, ++0x15,0xe0,0x64,0x14,0x60,0x02,0x21,0xc8,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e, ++0x27,0xe0,0x70,0x1f,0x90,0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13, ++0x90,0x9e,0x26,0xe0,0x70,0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0, ++0x54,0xfe,0xf0,0x90,0x9e,0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90, ++0x04,0x45,0xf0,0x90,0x9e,0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e, ++0x27,0xe0,0x90,0x04,0x48,0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e, ++0x29,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c, ++0xf0,0x90,0x9e,0x11,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e, ++0xf0,0x90,0x9e,0x13,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e, ++0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37, ++0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40, ++0x10,0x90,0x9e,0x1b,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e, ++0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e, ++0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,0xe0,0xd3,0x9e,0x40,0x1e,0xe0, ++0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0, ++0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,0x04,0xf0,0x22,0x90,0x9e,0x2b, ++0xe0,0x2f,0xf0,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0x61,0x19,0x90,0x00, ++0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x70,0x32, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0x51,0x12,0x90,0x9e,0x2e,0x74,0x01,0x12,0x4c,0xd9, ++0x80,0x40,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x38,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12, ++0x4c,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22, ++0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84, ++0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86, ++0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x01,0xcc,0xe0,0x54,0x0f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x81,0x5b,0x90,0x9e,0xad, ++0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x81,0x54,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75,0x1e,0x01,0x75,0x1f, ++0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79,0x36,0x12,0x45,0x09, ++0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x9e,0xad,0x30,0xe0, ++0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0, ++0x90,0x9e,0xad,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x39,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0xef,0x54,0x7f, ++0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x91,0x5c,0x90,0x9e,0x34,0xe0,0xff,0x90,0x9e, ++0xad,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0xad,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xad,0xe0,0x04,0xf0,0xe0,0x54, ++0x03,0xf0,0x61,0x24,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x3c,0x12, ++0x43,0x8b,0xef,0x12,0x43,0x94,0x54,0x97,0x01,0x54,0xa0,0x02,0x54,0xbb,0x03,0x54, ++0xc4,0x05,0x54,0xcd,0x06,0x55,0x1b,0x07,0x54,0xd5,0x09,0x54,0xde,0x0c,0x54,0xe7, ++0x0d,0x54,0xf0,0x0e,0x54,0xf9,0x1b,0x55,0x02,0x1c,0x55,0x0b,0x2c,0x54,0xa9,0x2d, ++0x54,0xb2,0x2e,0x00,0x00,0x55,0x14,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x61,0x69, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0x02,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x71,0x08,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0x50,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x71,0x7e,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xb2,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc6,0x90,0x9e, ++0x3c,0x12,0x43,0x6b,0x02,0x4d,0xa0,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x7d,0x68, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4f,0x07,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x70,0xfa,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xe1,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x76,0x36,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,0x04,0x12, ++0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xfd,0xaf,0x06, ++0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f,0x90,0x9e,0x44, ++0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,0x90,0x9e, ++0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,0x46,0x12,0x43,0x5f, ++0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x09, ++0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12,0x43,0x8b,0x90, ++0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f,0xff,0x90,0x9e, ++0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12, ++0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90, ++0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x29,0xd9, ++0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90,0x9e,0x3f,0xe0,0xff, ++0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,0x9e,0x40,0xe0,0xfe, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,0x75,0xf0,0x09,0xef, ++0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45,0xe0,0xfe,0x75,0xf0, ++0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59,0xef,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c,0xe5,0x59,0x75,0xf0, ++0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01,0xf5,0x5e,0x89,0x5f, ++0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,0x82,0x85,0x83,0x60, ++0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0x75, ++0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0x12,0x43,0x94,0x56,0xaa,0x00,0x56,0xbf,0x01,0x56,0xd4,0x02,0x56,0xe9, ++0x03,0x57,0x13,0x04,0x57,0x28,0x05,0x57,0x3d,0x06,0x57,0x64,0x0c,0x57,0x92,0x0d, ++0x57,0xbf,0x0e,0x57,0xec,0x0f,0x00,0x00,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,0x3c,0xe5, ++0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3, ++0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0x8f,0xf0, ++0x02,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0x02,0x58,0x20,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42, ++0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42, ++0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x44,0x02, ++0x58,0x17,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90, ++0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90, ++0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90, ++0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0, ++0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d,0xaa, ++0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c,0x82, ++0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3,0xf0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff, ++0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0,0x03, ++0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90,0x00, ++0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83, ++0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3,0x94, ++0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e,0x00, ++0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f, ++0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0,0x80, ++0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5, ++0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05,0x5a, ++0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b,0xe0, ++0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,0x9e, ++0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,0xf0, ++0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x05, ++0x90,0x9e,0x4b,0x51,0x6f,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x51,0x6f,0x90,0x9e, ++0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22,0xef, ++0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,0x03, ++0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22,0xe0, ++0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf,0x59, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84,0x2f, ++0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x75,0xef,0xf0,0x24,0xa6,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x76,0xf0,0x7b,0x01,0x7a,0x9e,0x79,0x75, ++0x7d,0x02,0x51,0xc9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x90,0x9e,0x97,0xe0,0x54,0xf0,0x44,0x06,0xff,0xf0, ++0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x94,0x12, ++0x43,0x6b,0x90,0x9e,0x91,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x97,0x71,0xd4, ++0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56,0x74, ++0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd,0xe0, ++0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57,0x40, ++0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41,0xd6, ++0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4,0x34, ++0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x41,0x80,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0,0x24, ++0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5, ++0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f, ++0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58,0x51, ++0x80,0xaf,0x58,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x8e,0x12,0x43, ++0x8b,0x90,0x9e,0xaf,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f, ++0xaf,0x7e,0x01,0x91,0x67,0xef,0x60,0x49,0x90,0x9e,0x8e,0x12,0x43,0x6b,0x8b,0x1e, ++0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09, ++0x90,0x9e,0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,0x9e,0x8e,0x12, ++0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,0x7a,0x01,0x79, ++0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80, ++0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54, ++0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13,0x90,0x9e,0x91,0x12,0x43,0x8b, ++0x0b,0x7a,0x9e,0x79,0x2f,0x61,0xd4,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x9d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x9d,0xe0,0xfe, ++0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa0,0xe0,0x94,0xe8, ++0x90,0x9e,0x9f,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x7f, ++0x00,0x80,0x15,0x90,0x9e,0x9f,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a,0x7e, ++0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xac,0x07,0xec, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48, ++0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,0xcb,0xf0,0xa3,0xeb, ++0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3, ++0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e, ++0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0xc1,0x13,0x90,0x9e,0x41, ++0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,0x64,0xa3,0xe0,0x14, ++0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0xc1,0x13,0x90,0x9e,0x40,0xe0,0xff,0xd3,0x94, ++0x00,0x50,0x02,0xc1,0x13,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,0x90,0x9e,0x3e,0xf0, ++0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x3e,0xe0,0xf5, ++0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0x6f,0x60, ++0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x42, ++0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x51,0x80,0xaf,0x64,0x22,0x8f,0x77,0x12,0x45, ++0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x52,0x12,0x47,0xcc,0xe5,0x77,0x60,0x10, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04, ++0x1f,0x74,0x20,0xf0,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5, ++0x22,0xb4,0x01,0x04,0xe4,0xff,0xd1,0x5c,0x53,0x23,0xf0,0x43,0x23,0x0c,0x22,0x90, ++0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x55,0x12,0x4c,0xe3, ++0x7d,0xff,0x7f,0x56,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x57,0x02,0x4c,0xe3,0x90,0x00, ++0x02,0xe0,0x54,0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x03,0x7f,0x01,0x22,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00, ++0x55,0xe0,0x5f,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12, ++0x4c,0xf8,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0xf8,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0, ++0x32,0x8f,0x6b,0x8c,0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4, ++0xf5,0x22,0xf5,0x26,0xf5,0x25,0x75,0x24,0x0c,0x75,0x23,0x0c,0x90,0x9e,0x73,0xf0, ++0x90,0x9e,0x71,0xf0,0x90,0x9e,0x70,0xf0,0x90,0x9e,0x72,0x04,0xf0,0x90,0x9e,0x64, ++0xf0,0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x66,0xf0,0x90,0x9e,0x6e,0x74,0x07,0xf0, ++0xe4,0x90,0x9e,0x65,0xf0,0x90,0x9e,0x6c,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x9e,0x6a, ++0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74, ++0x05,0xf0,0xe4,0x90,0x9e,0x68,0xf0,0x90,0x9e,0x63,0xf0,0x90,0x9e,0x5f,0xf0,0x22, ++0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x65,0xf0,0xf5,0x26,0x22,0x8b,0x59,0x8a,0x5a, ++0x89,0x5b,0x11,0x00,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,0x29,0xd9,0xf5,0x25,0x14, ++0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,0x80,0x3a, ++0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,0xff,0x11, ++0x6d,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd, ++0x7f,0x01,0x11,0x6d,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x02,0x11,0x6d,0xe4,0xff,0x11,0x98,0x22,0xef,0x24,0xfe, ++0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x72,0x74,0x01,0xf0,0x80,0x16,0xed,0x70,0x0a, ++0x90,0x9e,0x6f,0xe0,0x90,0x9e,0x72,0xf0,0x80,0x05,0x90,0x9e,0x72,0xed,0xf0,0x90, ++0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x22,0xef,0x64,0x01,0x70,0x2f,0x7d,0x7c,0x7f, ++0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x47,0x2b,0xe4,0xff,0x31,0x1f,0x90,0x06,0x04, ++0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74, ++0x7c,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03, ++0x12,0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x90,0x9e,0x6c,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x22,0x30,0xe0,0x19, ++0x90,0x9e,0x66,0xe0,0x70,0x18,0xe0,0x04,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04, ++0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x2f,0xe4,0x90,0x9e,0x66,0xf0,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x60, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0xe4,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x31,0xc3,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd, ++0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x25,0x60,0x04,0x7f,0x01,0x31,0x1f, ++0x51,0x04,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x73,0xf0,0x90,0x00,0x03,0x12,0x42,0x20, ++0x90,0x9e,0x63,0xf0,0x12,0x29,0xd9,0x65,0x25,0x60,0x02,0x11,0x0c,0xd0,0xd0,0x92, ++0xaf,0x22,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x20,0x90,0x9e,0x73,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x23, ++0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x2f,0xe4,0xff, ++0x31,0x1f,0x22,0xe4,0x90,0x9e,0xa9,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f, ++0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3, ++0x90,0x9e,0xaa,0xe0,0x94,0xe8,0x90,0x9e,0xa9,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00, ++0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x9e,0xa9,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xff,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00, ++0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90,0x9e,0x60,0xe0,0x90, ++0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd, ++0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90, ++0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e, ++0x0b,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4, ++0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12, ++0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11, ++0xe0,0x54,0xf6,0xf0,0x02,0x4b,0xdb,0x12,0x4b,0xc4,0xef,0x64,0x01,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x9e,0x71,0xe0,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x02,0xf0,0x80,0x22,0x90,0x9e,0x70,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04, ++0xf0,0x80,0x14,0xe5,0x24,0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22, ++0x12,0x4b,0xc4,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x4a, ++0xe5,0x26,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x3c,0xe5,0x24, ++0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x2b,0xe5, ++0x26,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x1e,0xe5,0x26,0x30,0xe4, ++0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,0x90,0x9e,0x66,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x5b,0xe5, ++0x24,0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0x90,0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3c,0x90,0x9e, ++0x5e,0xe0,0xb4,0x01,0x10,0x90,0x9e,0x4d,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83, ++0xe0,0x60,0x16,0x80,0x25,0x90,0x9e,0x5e,0xe0,0x70,0x0e,0x90,0x01,0xaf,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,0x90,0x9e,0x68,0xe0,0x70,0x08,0x90, ++0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0, ++0x7f,0x00,0x22,0x90,0x9e,0xae,0xef,0xf0,0x91,0x0c,0x90,0x9e,0xae,0xe0,0x60,0x05, ++0x90,0x05,0x22,0xe4,0xf0,0x53,0x23,0xf0,0x43,0x23,0x04,0x22,0x90,0x00,0x11,0xe0, ++0x44,0x09,0xf0,0x12,0x4b,0xdb,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12, ++0x34,0x81,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00, ++0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x27,0xe4,0x90,0x9e, ++0xa7,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef, ++0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa8,0xe0,0x94,0x88,0x90,0x9e,0xa7,0xe0,0x94, ++0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x9e,0xa7,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x9e,0xa8, ++0xe0,0x94,0x32,0x90,0x9e,0xa7,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30, ++0xe0,0xb2,0x22,0xe5,0x24,0x30,0xe6,0x19,0xe5,0x24,0x54,0x0f,0xff,0x90,0x9e,0x62, ++0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x62,0xf0,0x53,0x24, ++0xbf,0x22,0x8f,0x76,0x12,0x45,0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x53,0x12, ++0x47,0xcc,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe5,0x22,0x64,0x01,0x70, ++0x61,0xe5,0x25,0x60,0x5d,0xe5,0x25,0x64,0x02,0x60,0x06,0xe5,0x25,0x64,0x05,0x70, ++0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x64,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x9e,0x72, ++0xf0,0x90,0x9e,0x64,0xe0,0x70,0x07,0x90,0x9e,0x72,0xe0,0xff,0x80,0x05,0x90,0x9e, ++0x64,0xe0,0xff,0x90,0x9e,0x64,0xef,0xf0,0x90,0x9e,0x66,0xe0,0x60,0x03,0xe0,0x14, ++0xf0,0xe4,0x90,0x9e,0x65,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x53,0x26,0xfd,0x53,0x26,0xef,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12, ++0x45,0x53,0x22,0xe4,0xff,0xe5,0x25,0x60,0x5f,0xe5,0x22,0x64,0x01,0x70,0x59,0xe5, ++0x25,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21, ++0x90,0x9e,0x64,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x9e,0x64, ++0xe0,0x70,0x08,0x90,0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x7f,0x01,0x80,0x02,0x7f, ++0x01,0xef,0x60,0x24,0x43,0x26,0x10,0xe4,0x90,0x9e,0x86,0xf0,0x90,0x9e,0x6e,0x12, ++0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04,0x50, ++0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x2f,0x22,0xe5,0x25,0x60,0x39,0x90,0x9e,0x74, ++0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x28,0x80,0x23, ++0x90,0x9e,0x65,0xe0,0x04,0xf0,0x53,0x26,0xef,0x90,0x9e,0x6a,0xe0,0xff,0x90,0x9e, ++0x65,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x22,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0, ++0x04,0xf0,0x22,0x12,0x44,0xd1,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0, ++0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82, ++0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74, ++0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0, ++0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0, ++0x90,0x9e,0x3f,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0, ++0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74, ++0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea, ++0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xe1,0xa5,0x74,0x67,0x2d,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3, ++0x9f,0x40,0x02,0xe1,0xd6,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74, ++0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff, ++0x90,0x9e,0x3f,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10, ++0x50,0x40,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x23,0xbb, ++0x11,0x09,0x90,0x9e,0x40,0xe0,0x30,0xe7,0x02,0x7b,0x17,0xeb,0x64,0x13,0x60,0x03, ++0xbb,0x12,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x64, ++0x80,0x34,0x0b,0x80,0x84,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x67,0x2d, ++0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a, ++0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5, ++0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41, ++0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe, ++0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee, ++0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,0x9e,0x3e,0xe0,0xff, ++0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x64, ++0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74, ++0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74, ++0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0, ++0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x64, ++0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5, ++0x64,0x44,0x80,0xfd,0x12,0x5a,0x80,0xe5,0x64,0x44,0x80,0xff,0x22,0xe4,0xf5,0x59, ++0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,0x95,0x01,0xe0,0xff, ++0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96, ++0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd3,0xe5,0x59,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee, ++0x94,0x00,0x50,0x02,0xc1,0xd3,0xe5,0x59,0x94,0x20,0x40,0x08,0x90,0x9a,0xc5,0xe0, ++0x60,0x02,0xc1,0xde,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,0x90,0x35, ++0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82, ++0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,0xcf,0xf0,0xa3,0xef, ++0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xff, ++0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0xc3,0x94,0x20,0x50, ++0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90, ++0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,0x54,0x1f,0xa3,0xf0, ++0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3d,0xf0, ++0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40, ++0x02,0x61,0xac,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x9f,0x40,0x13,0x90, ++0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9e,0x34,0xf0,0xef, ++0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x54,0x05,0x64,0x01,0x70,0x29,0x90,0x9e,0x35,0xe0, ++0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,0x35,0xe0, ++0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74, ++0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef, ++0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,0x9e,0x3c, ++0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35,0xf0, ++0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,0x93,0xff, ++0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,0xe4,0xfd, ++0xaf,0x59,0x12,0x5c,0xbd,0xc1,0x6a,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,0x5c,0xa9, ++0x5d,0x12,0x29,0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,0x42,0x97, ++0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61, ++0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00,0xab, ++0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29, ++0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9, ++0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60, ++0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5, ++0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x03,0x12, ++0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,0x12,0x42, ++0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5, ++0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e,0x00, ++0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12, ++0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c, ++0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc, ++0xa3,0xe0,0xfd,0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,0x0c,0xe5, ++0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,0xf5,0x62, ++0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,0x61,0xf0, ++0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x07,0xaf, ++0x59,0x12,0x66,0x87,0xc1,0x3e,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50, ++0x02,0xc1,0x3e,0x7d,0x01,0xaf,0x59,0x12,0x5c,0xbd,0xc1,0x3e,0x74,0xe6,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xa1,0x47,0x90, ++0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,0x40,0x3d, ++0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,0x2e,0x80, ++0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x0a, ++0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,0x40,0x0d, ++0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,0x84,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x81,0xf4,0x90, ++0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x81,0xf4,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,0xfe, ++0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,0xee, ++0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74, ++0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,0x80, ++0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,0x05,0x80, ++0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0x74, ++0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0, ++0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5, ++0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,0x5f,0xe0, ++0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5, ++0x83,0xe4,0xf0,0xad,0x63,0xc1,0x39,0xec,0x64,0x06,0x60,0x02,0xc1,0x3e,0xf5,0x61, ++0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3,0xe0, ++0xfd,0x12,0x29,0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,0x5e,0xaa, ++0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,0x42, ++0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,0x29,0xf2, ++0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,0xe0,0x95, ++0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,0x05,0xbd, ++0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,0x46,0x80, ++0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,0x39,0xe5, ++0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,0x05,0x28, ++0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63, ++0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e,0x3a, ++0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90, ++0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x66,0x47,0x74,0xe6, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0xe6,0x50, ++0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,0xa9,0x60, ++0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0xe4, ++0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00, ++0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19, ++0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x01,0x90,0x22,0x90, ++0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0, ++0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10, ++0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x04, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,0x13,0xf0, ++0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2d,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4, ++0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0, ++0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,0xc4,0x93, ++0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e, ++0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,0x12,0x43, ++0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0x74,0x01, ++0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0, ++0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,0x2d,0xf5, ++0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03,0x02,0x6f, ++0x0d,0x22,0x12,0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,0xf0, ++0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,0x42,0xf0, ++0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,0x13, ++0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x55,0x30,0x12,0x29,0xd9,0x90,0x95,0x01, ++0xf0,0x22,0x12,0x29,0xd9,0xf5,0x22,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x30, ++0xe0,0x25,0x12,0x29,0xd9,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90, ++0x9e,0x6b,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12, ++0x42,0x20,0x90,0x9e,0x6f,0xf0,0x22,0x90,0x9e,0x6a,0x74,0x01,0xf0,0x90,0x9e,0x6b, ++0x74,0x03,0xf0,0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74,0x05,0xf0,0x22, ++0x12,0x29,0xd9,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x6e,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0xef,0xf0,0x22,0x90,0x9e, ++0x6e,0x74,0x07,0xf0,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x50,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x51,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x52,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x9e,0x53,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x9e,0x54,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x3f, ++0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa, ++0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x71,0x16, ++0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x73,0x70,0x04, ++0xe5,0x72,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12, ++0x42,0xc2,0xff,0xae,0xf0,0x51,0x3e,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x12, ++0x29,0xd9,0x65,0x71,0x60,0x03,0x12,0x44,0xc8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e, ++0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x71,0x01,0x8e,0x72,0xf5,0x73,0xe4,0xfd,0x7f, ++0x0b,0x51,0x80,0xe4,0xfd,0x7f,0x02,0x51,0x80,0x71,0x4a,0xe4,0xff,0x71,0xac,0xe4, ++0xf5,0x75,0x90,0x01,0xc9,0xe5,0x75,0xf0,0x90,0x9e,0x42,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,0x90,0x9e,0x44,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d, ++0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc, ++0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x9e,0x44, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e,0x44,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0, ++0x5f,0xf0,0x12,0x4b,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x0b,0x71,0xb9,0xef,0x65, ++0x74,0x60,0x10,0xe5,0x74,0xb4,0x01,0x05,0xe4,0xf5,0x74,0x80,0x03,0x75,0x74,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x71,0x64,0x01,0x70,0x3f,0x71,0x4a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xac,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4c, ++0xe3,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4c,0xe3,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x7f,0x02,0x71,0xb9,0x8f,0x75,0x90, ++0x01,0xc9,0xe5,0x75,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xda,0x22,0x90,0x01,0xca,0xe5, ++0x74,0xf0,0xef,0x60,0x03,0x12,0x4f,0xda,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0xb1,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4b,0xdb,0x90,0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x9e,0xb1,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4b,0xd3,0x90,0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0x56,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x57,0xe0,0xf5,0x64,0xa3, ++0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x59,0x25,0x61,0xf5,0x82,0xe4,0x34,0x9e,0xf5, ++0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,0xe5,0x61,0xb4,0x04, ++0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0xb7,0x00,0x75,0xdf,0x01,0x74,0xbd, ++0x02,0x74,0xbd,0x03,0x74,0xbd,0x04,0x75,0xdf,0x05,0x75,0xaf,0x80,0x75,0xc5,0x81, ++0x75,0xdf,0x82,0x00,0x00,0x75,0xdb,0xaf,0x69,0xb1,0xe6,0xa1,0xdf,0x90,0x9e,0x40, ++0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x9e, ++0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x64,0x94, ++0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,0x61,0xc3,0x9f,0x40, ++0x02,0xa1,0xdf,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,0x25,0x65,0xff,0xc3, ++0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4c,0xe3,0x80,0x1a,0xc3,0x74, ++0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,0x25,0x65,0xfd,0xec, ++0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,0xc3,0xe5,0x64,0x94, ++0x10,0x40,0x02,0xa1,0xdf,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,0x02,0xa1,0xdf,0xaf, ++0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02, ++0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf, ++0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x69,0xe4, ++0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e,0x41,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f,0xd9,0x80,0x30,0xe5, ++0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe, ++0x12,0x37,0x54,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4, ++0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f, ++0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,0xf0,0xe5,0x6a,0x14, ++0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7, ++0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,0x7d,0xff,0x12,0x34, ++0xb7,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,0x94,0xff,0x50,0x0f, ++0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe8,0xad, ++0x6a,0x7f,0xff,0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x5b, ++0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,0xe0,0xff,0x12,0x29, ++0xd9,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,0x75,0x5a,0x80,0x80, ++0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20, ++0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x56,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x57,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5, ++0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74, ++0x55,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x91, ++0x5a,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x60,0x94,0xe8,0xe5, ++0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x60, ++0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90, ++0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff, ++0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,0x5e,0xe5,0x5a,0x64, ++0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,0x59,0x00,0x75,0x5a, ++0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x5b,0xf5, ++0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,0x5c,0x60,0x02,0xc1, ++0x74,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x9e,0x5d,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd, ++0x7f,0x80,0x02,0x4c,0xe3,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,0x89,0x5d,0xe4, ++0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4b,0xdb,0xe5,0x59,0x54,0x03, ++0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0, ++0x54,0x7f,0xf0,0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34, ++0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3, ++0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42, ++0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0xf5,0x74,0x22,0x90,0x9e,0x60,0xe0,0x90, ++0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x9c,0x90,0x9e,0x0f,0xe0,0x60,0x03, ++0x02,0x7d,0x67,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d, ++0xc7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90, ++0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x2f,0xd9,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0, ++0x64,0x01,0x60,0x02,0xa1,0x67,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xfb, ++0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a,0x7f, ++0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x9d,0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xb7,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12,0x2a, ++0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f,0x80, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xcb,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf,0x12, ++0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f,0x7f, ++0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xdf,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe3, ++0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04,0x7e, ++0x0d,0x12,0x27,0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27, ++0xde,0x90,0x9d,0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d, ++0xf7,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a, ++0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c, ++0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f, ++0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4, ++0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25, ++0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04, ++0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f, ++0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0xa1, ++0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa1, ++0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e,0xa1, ++0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e, ++0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90, ++0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90, ++0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e, ++0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90, ++0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90, ++0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec, ++0x54,0xf0,0xfc,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed, ++0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9, ++0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1, ++0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e, ++0xa1,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90, ++0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12, ++0x2f,0xd9,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e, ++0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x59,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4c,0xe3,0x7d,0x40,0x7f, ++0x01,0x12,0x36,0xaf,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12, ++0x4c,0xe3,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,0x9e,0x24, ++0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x26, ++0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x2e, ++0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,0x00,0x51, ++0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x60, ++0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xc1,0xd0,0x90,0x9e,0x10,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0, ++0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e,0x13,0xe0,0xc3,0x94,0xff, ++0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,0x9e,0x11,0xf0,0x90,0x9e, ++0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x9e, ++0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x25,0xe0, ++0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x26,0xe0,0xc3, ++0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x24,0xf0, ++0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,0xc3,0x94,0xff,0x50,0x05, ++0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04, ++0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0, ++0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0, ++0x22,0x00,0x89,0xad,}; ++ ++// =================== v80 UMC A Cut COMMON 2011-12-14 ===================== ++u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x16,0x08,0xd4,0x3e,0x01,0x00, ++0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0x2e, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x4f, ++0x00,0x41,0x9e,0xad,0x00,0x41,0x9e,0x61,0x80,0x41,0x9e,0x62,0x80,0x41,0x9e,0xaf, ++0x00,0x00,0xf0,0x90,0x9e,0x6b,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x85,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x86,0xf0, ++0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x70, ++0x14,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x2b,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x71,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7d,0x01,0xaf,0x24,0xe1,0x2f,0xb1,0xa6,0xbf,0x01,0x0f,0x90,0x9e,0x51,0xe0, ++0xff,0xe4,0xfd,0xf1,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x53,0x23,0xf0,0x43, ++0x23,0x01,0x91,0xfd,0x91,0xfe,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0x22,0x22,0x22, ++0x22,0x00,0x00,0x02,0x5f,0x91,0x02,0x5f,0x98,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x88,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8b,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8b, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x24,0x62,0xff,0x90,0x9e,0x88,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0x90,0x9e,0x2f,0xf0,0xe0,0x54,0xc0,0x70,0x08, ++0x53,0x26,0xfe,0x53,0x26,0xfd,0x91,0xd1,0x90,0x9e,0x2f,0xe0,0x30,0xe6,0x13,0x43, ++0x26,0x01,0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x04,0x91,0xd7,0x80,0x07,0x91,0x80, ++0x80,0x03,0x53,0x26,0xfe,0x90,0x9e,0x2f,0xe0,0x30,0xe7,0x16,0x43,0x26,0x02,0xe4, ++0x90,0x9e,0x86,0x91,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x74,0x74,0x01, ++0xf0,0x22,0x53,0x26,0xfd,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d, ++0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44, ++0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0, ++0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0, ++0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0x90,0x01,0xc4,0x74,0xd4,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01, ++0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32, ++0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c, ++0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x66, ++0x09,0xe5,0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0, ++0x30,0xe0,0x24,0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0, ++0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90, ++0x06,0x92,0x74,0x01,0xf0,0x80,0x07,0x90,0x9e,0x71,0xe4,0xf0,0x91,0xd1,0xe5,0x34, ++0x30,0xe3,0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24, ++0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd, ++0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74, ++0x02,0xf0,0x80,0x07,0x90,0x9e,0x70,0xe4,0xf0,0x91,0xd1,0xe5,0x34,0x30,0xe4,0x09, ++0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x73,0x66,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01, ++0x3c,0x74,0x20,0xf0,0x12,0x52,0x64,0xe5,0x35,0x30,0xe0,0x18,0x90,0x01,0x3d,0x74, ++0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0xf5,0x24,0x12, ++0x64,0xe3,0x91,0xd1,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5, ++0x36,0x30,0xe0,0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90, ++0x01,0x3e,0x74,0x02,0xf0,0x74,0xd4,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0, ++0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00, ++0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x90, ++0x9e,0xa6,0xed,0xf0,0x90,0x9e,0xa5,0xef,0xf0,0x54,0x0f,0xff,0xe5,0x23,0x54,0x0f, ++0x6f,0x60,0x70,0x90,0x9e,0xa5,0xe0,0x30,0xe2,0x2a,0xe5,0x23,0x20,0xe2,0x05,0x7f, ++0x01,0x12,0x63,0xf3,0xe5,0x23,0x30,0xe3,0x09,0x90,0x9e,0xa5,0xe0,0x20,0xe3,0x02, ++0x80,0x52,0xe5,0x23,0x20,0xe3,0x4c,0x90,0x9e,0xa5,0xe0,0x30,0xe3,0x45,0xa3,0xe0, ++0xff,0x02,0x5e,0x95,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x9e,0xa5,0xe0, ++0x20,0xe3,0x08,0x12,0x62,0xd7,0xef,0x60,0x2a,0xf1,0xb4,0xe5,0x23,0x54,0x0f,0xff, ++0xbf,0x04,0x10,0x90,0x9e,0xa5,0xe0,0x20,0xe2,0x09,0x12,0x63,0x20,0xef,0x60,0x13, ++0x12,0x61,0x3a,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x02,0x08,0x12,0x63,0x83,0xef,0x60, ++0x02,0x91,0xec,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x05, ++0x7f,0x01,0x12,0x5e,0x5c,0x53,0x23,0xf0,0x43,0x23,0x04,0x22,0xe0,0xff,0x7d,0x01, ++0x90,0x9e,0x99,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x25,0x60, ++0x05,0xe4,0xff,0x12,0x61,0x1f,0x90,0x9e,0x99,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9b, ++0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x9e,0x99,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10, ++0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x9e,0x9a,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff, ++0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9b,0xa3,0xe0, ++0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82, ++0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9b,0xe0,0xfe,0xa3,0xe0, ++0xff,0x22,0x12,0x45,0xa6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x12, ++0x47,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0x79,0xf0,0x74,0x48,0xa3,0xf0, ++0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e, ++0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x17,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85, ++0xd5,0x0c,0x85,0xd6,0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3, ++0x13,0xff,0xe5,0x0e,0x54,0x20,0x6f,0x70,0x02,0x21,0xc9,0xe5,0x0f,0x30,0xe5,0x02, ++0x21,0xc9,0xe5,0x0d,0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c, ++0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83, ++0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e, ++0xd3,0x94,0x04,0x40,0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00, ++0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff, ++0xe5,0x0e,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90, ++0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef, ++0xf0,0xe5,0x0f,0x20,0xe6,0x24,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a, ++0x30,0xe7,0x36,0xaf,0x4d,0x12,0x5b,0x68,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0a,0x30,0xe7,0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f, ++0xf5,0x53,0xab,0x4e,0xaf,0x4d,0x12,0x5b,0x05,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x45,0x90,0x9e,0x73,0xe0,0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x71,0xc4,0xef,0x64,0x01,0x70,0x2d,0x90,0x9e,0x69,0xe0,0xf5,0x44, ++0x75,0x45,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x30,0x62,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x9e,0x71,0xf0,0x80,0x08,0x71, ++0xc4,0xbf,0x01,0x03,0x12,0x44,0xd1,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x13,0x85,0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5, ++0x17,0x85,0xd6,0x18,0x85,0xd7,0x19,0x85,0xd9,0x1a,0x12,0x5c,0x46,0xe5,0x2c,0x30, ++0xe3,0x06,0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34, ++0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,0x30, ++0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75, ++0xe8,0x00,0xd1,0xdb,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x71,0xdb,0x80,0xfe,0xe5, ++0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x12,0x90, ++0x9e,0x5f,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x65,0xa3,0x90,0x9e,0x5f,0xe4, ++0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x12,0x40,0x90, ++0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a, ++0x74,0x01,0xf0,0x90,0x9e,0x4f,0xe4,0xf0,0x80,0x17,0x90,0x9e,0x4f,0xe0,0x04,0xf0, ++0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x02,0x11, ++0x62,0xe5,0x2e,0x30,0xe2,0x09,0x90,0x01,0x36,0x74,0x04,0xf0,0x12,0x65,0x3b,0xe5, ++0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x22,0x64,0x01,0x70,0x1c, ++0xe5,0x25,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90, ++0x9e,0x86,0xe4,0x12,0x44,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x22,0xb4,0x01,0x20,0xe5,0x25,0x60,0x1c, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x74,0xe4,0xf0, ++0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1,0xe5,0x2e,0x30,0xe5, ++0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x22,0xb4,0x01,0x14,0xe5,0x25,0x60,0x10, ++0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xd7,0x80,0x03,0x12,0x44,0x80, ++0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x10, ++0xe5,0x25,0x60,0x0c,0x53,0x26,0xfe,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1, ++0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0,0x12,0x61,0x92,0x74,0x79, ++0x04,0x90,0x01,0xc4,0xf0,0x74,0x48,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02, ++0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xac,0xed,0xf0,0x90,0x9e,0xab,0xef,0xf0,0xd3,0x94,0x07,0x50, ++0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x71,0xdb,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x71, ++0xdb,0x90,0x9e,0xac,0xe0,0x60,0x16,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x45,0x80,0x6b,0x90,0x9e,0xab,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x71,0xd3,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00, ++0x43,0xe0,0x4f,0xf0,0x71,0xdb,0x90,0x9e,0xac,0xe0,0x60,0x1b,0x90,0x9e,0xab,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0, ++0x5f,0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe, ++0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed, ++0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24, ++0x02,0x60,0x02,0xa1,0x9f,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44, ++0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x91, ++0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a, ++0xf0,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e, ++0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90, ++0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10, ++0xfd,0x7f,0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00, ++0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd, ++0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x91,0xe3,0x22, ++0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90, ++0x9e,0x1f,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x2d,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b, ++0xe0,0xff,0x12,0x52,0x12,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c, ++0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1b,0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1f, ++0xe0,0x70,0x02,0xc1,0xa7,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90, ++0x9e,0x2e,0x74,0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x91,0xda,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15, ++0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08, ++0x12,0x2b,0x08,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54, ++0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a, ++0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c, ++0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4, ++0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20, ++0xe4,0xff,0x12,0x31,0xb7,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e, ++0x91,0xd9,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x05,0x22, ++0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12, ++0x31,0x49,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x01,0x30,0xe4,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0xfd,0x7f,0x50,0x91,0xe3,0xe4,0xfd,0x7f,0x51,0x91,0xe3,0xe4,0xfd,0x7f,0x52,0x91, ++0xe3,0xe4,0xfd,0x7f,0x53,0x81,0xe3,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74,0x01, ++0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0x16,0x12,0x25,0x08,0xab,0x59, ++0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78, ++0x1a,0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16,0x12, ++0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x25,0x08,0x90, ++0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x22,0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x25,0x08, ++0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08, ++0x12,0x2b,0x08,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x91,0xe3, ++0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44, ++0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x91,0xe3,0x90,0x00, ++0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd, ++0x7f,0x46,0x91,0xe3,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb0,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x91,0xe3,0x90,0x9e,0xb0, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x81,0xe3,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a, ++0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a, ++0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90, ++0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0xe4,0x90, ++0x9e,0x31,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x77,0x64,0x12,0x5e,0xde,0x90,0x9e, ++0x5e,0xef,0xf0,0x12,0x5e,0xeb,0x90,0x9e,0x60,0xef,0xf0,0xe4,0xf5,0x12,0x12,0x6e, ++0xdf,0x12,0x77,0xdb,0x12,0x5f,0x9f,0x12,0x2e,0x01,0x12,0x77,0xd7,0x12,0x4f,0xf8, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5e,0xf8,0x11,0x16,0x12,0x44,0xff,0x12,0x7d,0x9b,0x90, ++0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x5e,0xaf,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4b,0xdb,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x9e,0x31,0xe0, ++0x64,0x01,0xf0,0x24,0x2e,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30, ++0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x71,0x1a,0xe5,0x12,0x30,0xe6,0x16, ++0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x68,0x8d,0x90,0x9e,0x1e,0xe0,0xff,0x60, ++0x03,0xb4,0x01,0x02,0x31,0x10,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7d,0xf9,0x11, ++0xe3,0x80,0xb9,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06, ++0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x77,0x75,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0, ++0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x56,0xe4,0x90,0x06,0x34,0xf0,0x22, ++0x90,0x9e,0x15,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0x21,0xc8,0x90,0x9e, ++0x15,0xe0,0x64,0x14,0x60,0x02,0x21,0xc8,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e, ++0x27,0xe0,0x70,0x1f,0x90,0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13, ++0x90,0x9e,0x26,0xe0,0x70,0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0, ++0x54,0xfe,0xf0,0x90,0x9e,0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90, ++0x04,0x45,0xf0,0x90,0x9e,0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e, ++0x27,0xe0,0x90,0x04,0x48,0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e, ++0x29,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c, ++0xf0,0x90,0x9e,0x11,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e, ++0xf0,0x90,0x9e,0x13,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e, ++0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37, ++0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40, ++0x10,0x90,0x9e,0x1b,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e, ++0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e, ++0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,0xe0,0xd3,0x9e,0x40,0x1e,0xe0, ++0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0, ++0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,0x04,0xf0,0x22,0x90,0x9e,0x2b, ++0xe0,0x2f,0xf0,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0x61,0x19,0x90,0x00, ++0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x70,0x32, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0x51,0x12,0x90,0x9e,0x2e,0x74,0x01,0x12,0x4c,0xd9, ++0x80,0x40,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x38,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12, ++0x4c,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x05,0x90,0x05,0x22, ++0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84, ++0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86, ++0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x01,0xcc,0xe0,0x54,0x0f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x81,0x5b,0x90,0x9e,0xad, ++0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x81,0x54,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75,0x1e,0x01,0x75,0x1f, ++0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79,0x36,0x12,0x45,0x09, ++0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x9e,0xad,0x30,0xe0, ++0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0, ++0x90,0x9e,0xad,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x39,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0xef,0x54,0x7f, ++0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x91,0x5c,0x90,0x9e,0x34,0xe0,0xff,0x90,0x9e, ++0xad,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0xad,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xad,0xe0,0x04,0xf0,0xe0,0x54, ++0x03,0xf0,0x61,0x24,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x3c,0x12, ++0x43,0x8b,0xef,0x12,0x43,0x94,0x54,0x97,0x01,0x54,0xa0,0x02,0x54,0xbb,0x03,0x54, ++0xc4,0x05,0x54,0xcd,0x06,0x55,0x1b,0x07,0x54,0xd5,0x09,0x54,0xde,0x0c,0x54,0xe7, ++0x0d,0x54,0xf0,0x0e,0x54,0xf9,0x1b,0x55,0x02,0x1c,0x55,0x0b,0x2c,0x54,0xa9,0x2d, ++0x54,0xb2,0x2e,0x00,0x00,0x55,0x14,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x61,0x69, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0x02,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x71,0x08,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0x50,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x71,0x7e,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xb2,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xc6,0x90,0x9e, ++0x3c,0x12,0x43,0x6b,0x02,0x4d,0xa0,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x7d,0x68, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4f,0x07,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x70,0xfa,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xe1,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x76,0x36,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,0x04,0x12, ++0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xfd,0xaf,0x06, ++0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f,0x90,0x9e,0x44, ++0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,0x90,0x9e, ++0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,0x46,0x12,0x43,0x5f, ++0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x09, ++0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12,0x43,0x8b,0x90, ++0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f,0xff,0x90,0x9e, ++0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12, ++0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90, ++0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x24,0x62, ++0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90,0x9e,0x3f,0xe0,0xff, ++0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,0x9e,0x40,0xe0,0xfe, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,0x75,0xf0,0x09,0xef, ++0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45,0xe0,0xfe,0x75,0xf0, ++0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59,0xef,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c,0xe5,0x59,0x75,0xf0, ++0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01,0xf5,0x5e,0x89,0x5f, ++0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,0x82,0x85,0x83,0x60, ++0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0x75, ++0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0x12,0x43,0x94,0x56,0xaa,0x00,0x56,0xbf,0x01,0x56,0xd4,0x02,0x56,0xe9, ++0x03,0x57,0x13,0x04,0x57,0x28,0x05,0x57,0x3d,0x06,0x57,0x64,0x0c,0x57,0x92,0x0d, ++0x57,0xbf,0x0e,0x57,0xec,0x0f,0x00,0x00,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,0x3c,0xe5, ++0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3, ++0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0x8f,0xf0, ++0x02,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0x02,0x58,0x20,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42, ++0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42, ++0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x44,0x02, ++0x58,0x17,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90, ++0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90, ++0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90, ++0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0, ++0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d,0xaa, ++0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c,0x82, ++0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3,0xf0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff, ++0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x24,0x62,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0,0x03, ++0xc0,0x02,0xc0,0x01,0x12,0x24,0x62,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90,0x00, ++0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83, ++0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3,0x94, ++0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e,0x00, ++0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f, ++0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0,0x80, ++0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5, ++0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05,0x5a, ++0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b,0xe0, ++0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,0x9e, ++0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,0xf0, ++0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x05, ++0x90,0x9e,0x4b,0x51,0x6f,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x51,0x6f,0x90,0x9e, ++0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22,0xef, ++0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,0x03, ++0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22,0xe0, ++0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf,0x59, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84,0x2f, ++0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x75,0xef,0xf0,0x24,0xa6,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x76,0xf0,0x7b,0x01,0x7a,0x9e,0x79,0x75, ++0x7d,0x02,0x51,0xc9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x90,0x9e,0x97,0xe0,0x54,0xf0,0x44,0x06,0xff,0xf0, ++0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x94,0x12, ++0x43,0x6b,0x90,0x9e,0x91,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x97,0x71,0xd4, ++0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56,0x74, ++0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd,0xe0, ++0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57,0x40, ++0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41,0xd6, ++0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4,0x34, ++0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x41,0x80,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0,0x24, ++0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5, ++0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f, ++0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58,0x51, ++0x80,0xaf,0x58,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x8e,0x12,0x43, ++0x8b,0x90,0x9e,0xaf,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f, ++0xaf,0x7e,0x01,0x91,0x67,0xef,0x60,0x49,0x90,0x9e,0x8e,0x12,0x43,0x6b,0x8b,0x1e, ++0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09, ++0x90,0x9e,0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,0x9e,0x8e,0x12, ++0x43,0x6b,0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,0x7a,0x01,0x79, ++0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80, ++0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54, ++0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13,0x90,0x9e,0x91,0x12,0x43,0x8b, ++0x0b,0x7a,0x9e,0x79,0x2f,0x61,0xd4,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x9d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x9d,0xe0,0xfe, ++0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa0,0xe0,0x94,0xe8, ++0x90,0x9e,0x9f,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x7f, ++0x00,0x80,0x15,0x90,0x9e,0x9f,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a,0x7e, ++0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xac,0x07,0xec, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48, ++0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,0xcb,0xf0,0xa3,0xeb, ++0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3, ++0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e, ++0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0xc1,0x13,0x90,0x9e,0x41, ++0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,0x64,0xa3,0xe0,0x14, ++0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0xc1,0x13,0x90,0x9e,0x40,0xe0,0xff,0xd3,0x94, ++0x00,0x50,0x02,0xc1,0x13,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,0x90,0x9e,0x3e,0xf0, ++0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x3e,0xe0,0xf5, ++0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0x6f,0x60, ++0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x42, ++0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x51,0x80,0xaf,0x64,0x22,0x8f,0x77,0x12,0x45, ++0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x52,0x12,0x47,0xcc,0xe5,0x77,0x60,0x10, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04, ++0x1f,0x74,0x20,0xf0,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5, ++0x22,0xb4,0x01,0x04,0xe4,0xff,0xd1,0x5c,0x53,0x23,0xf0,0x43,0x23,0x0c,0x22,0x90, ++0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x55,0x12,0x4c,0xe3, ++0x7d,0xff,0x7f,0x56,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x57,0x02,0x4c,0xe3,0x90,0x00, ++0x02,0xe0,0x54,0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x03,0x7f,0x01,0x22,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00, ++0x55,0xe0,0x5f,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12, ++0x4c,0xf8,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0xf8,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0, ++0x32,0x8f,0x6b,0x8c,0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4, ++0xf5,0x22,0xf5,0x26,0xf5,0x25,0x75,0x24,0x0c,0x75,0x23,0x0c,0x90,0x9e,0x73,0xf0, ++0x90,0x9e,0x71,0xf0,0x90,0x9e,0x70,0xf0,0x90,0x9e,0x72,0x04,0xf0,0x90,0x9e,0x64, ++0xf0,0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x66,0xf0,0x90,0x9e,0x6e,0x74,0x07,0xf0, ++0xe4,0x90,0x9e,0x65,0xf0,0x90,0x9e,0x6c,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x9e,0x6a, ++0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74, ++0x05,0xf0,0xe4,0x90,0x9e,0x68,0xf0,0x90,0x9e,0x63,0xf0,0x90,0x9e,0x5f,0xf0,0x22, ++0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x65,0xf0,0xf5,0x26,0x22,0x8b,0x59,0x8a,0x5a, ++0x89,0x5b,0x11,0x00,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,0x24,0x62,0xf5,0x25,0x14, ++0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,0x80,0x3a, ++0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,0xff,0x11, ++0x6d,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd, ++0x7f,0x01,0x11,0x6d,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x02,0x11,0x6d,0xe4,0xff,0x11,0x98,0x22,0xef,0x24,0xfe, ++0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x72,0x74,0x01,0xf0,0x80,0x16,0xed,0x70,0x0a, ++0x90,0x9e,0x6f,0xe0,0x90,0x9e,0x72,0xf0,0x80,0x05,0x90,0x9e,0x72,0xed,0xf0,0x90, ++0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x22,0xef,0x64,0x01,0x70,0x2f,0x7d,0x7c,0x7f, ++0x02,0x12,0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0x90,0x01,0x57,0xe4,0xf0, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x47,0x2b,0xe4,0xff,0x31,0x1f,0x90,0x06,0x04, ++0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74, ++0x7c,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03, ++0x12,0x31,0x9d,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x90,0x9e,0x6c,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x22,0x30,0xe0,0x19, ++0x90,0x9e,0x66,0xe0,0x70,0x18,0xe0,0x04,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04, ++0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x2f,0xe4,0x90,0x9e,0x66,0xf0,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x60, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0xe4,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x31,0xc3,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd, ++0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x25,0x60,0x04,0x7f,0x01,0x31,0x1f, ++0x51,0x04,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x73,0xf0,0x90,0x00,0x03,0x12,0x42,0x20, ++0x90,0x9e,0x63,0xf0,0x12,0x24,0x62,0x65,0x25,0x60,0x02,0x11,0x0c,0xd0,0xd0,0x92, ++0xaf,0x22,0x7d,0x02,0x7f,0x03,0x12,0x31,0x2c,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x20,0x90,0x9e,0x73,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x23, ++0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x2f,0xe4,0xff, ++0x31,0x1f,0x22,0xe4,0x90,0x9e,0xa9,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f, ++0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3, ++0x90,0x9e,0xaa,0xe0,0x94,0xe8,0x90,0x9e,0xa9,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00, ++0x22,0x7f,0x32,0x7e,0x00,0x12,0x32,0x15,0x90,0x9e,0xa9,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xff,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9e,0x03,0x12,0x25,0x08,0x7f,0x00, ++0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0x07,0x12,0x25,0x08,0x90,0x9e,0x60,0xe0,0x90, ++0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd, ++0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f, ++0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90, ++0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9e, ++0x0b,0x12,0x25,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4, ++0xfd,0xff,0x12,0x30,0x2c,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12, ++0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11, ++0xe0,0x54,0xf6,0xf0,0x02,0x4b,0xdb,0x12,0x4b,0xc4,0xef,0x64,0x01,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x9e,0x71,0xe0,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x02,0xf0,0x80,0x22,0x90,0x9e,0x70,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04, ++0xf0,0x80,0x14,0xe5,0x24,0x54,0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74, ++0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22, ++0x12,0x4b,0xc4,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x4a, ++0xe5,0x26,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x3c,0xe5,0x24, ++0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x2b,0xe5, ++0x26,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x1e,0xe5,0x26,0x30,0xe4, ++0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11,0x90,0x9e,0x66,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x5b,0xe5, ++0x24,0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0x90,0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x3c,0x90,0x9e, ++0x5e,0xe0,0xb4,0x01,0x10,0x90,0x9e,0x4d,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83, ++0xe0,0x60,0x16,0x80,0x25,0x90,0x9e,0x5e,0xe0,0x70,0x0e,0x90,0x01,0xaf,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11,0x90,0x9e,0x68,0xe0,0x70,0x08,0x90, ++0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x02,0xf0, ++0x7f,0x00,0x22,0x90,0x9e,0xae,0xef,0xf0,0x91,0x0c,0x90,0x9e,0xae,0xe0,0x60,0x05, ++0x90,0x05,0x22,0xe4,0xf0,0x53,0x23,0xf0,0x43,0x23,0x04,0x22,0x90,0x00,0x11,0xe0, ++0x44,0x09,0xf0,0x12,0x4b,0xdb,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x03,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9e,0x07,0x12, ++0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x90, ++0x9e,0x0b,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12, ++0x30,0x2c,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00, ++0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f,0x27,0xe4,0x90,0x9e, ++0xa7,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef, ++0x65,0x27,0x60,0x3e,0xc3,0x90,0x9e,0xa8,0xe0,0x94,0x88,0x90,0x9e,0xa7,0xe0,0x94, ++0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x9e,0xa7,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15,0xd3,0x90,0x9e,0xa8, ++0xe0,0x94,0x32,0x90,0x9e,0xa7,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30, ++0xe0,0xb2,0x22,0xe5,0x24,0x30,0xe6,0x19,0xe5,0x24,0x54,0x0f,0xff,0x90,0x9e,0x62, ++0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x62,0xf0,0x53,0x24, ++0xbf,0x22,0x8f,0x76,0x12,0x45,0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x53,0x12, ++0x47,0xcc,0xe5,0x76,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe5,0x22,0x64,0x01,0x70, ++0x61,0xe5,0x25,0x60,0x5d,0xe5,0x25,0x64,0x02,0x60,0x06,0xe5,0x25,0x64,0x05,0x70, ++0x27,0x90,0x06,0xab,0xe0,0x90,0x9e,0x64,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x9e,0x72, ++0xf0,0x90,0x9e,0x64,0xe0,0x70,0x07,0x90,0x9e,0x72,0xe0,0xff,0x80,0x05,0x90,0x9e, ++0x64,0xe0,0xff,0x90,0x9e,0x64,0xef,0xf0,0x90,0x9e,0x66,0xe0,0x60,0x03,0xe0,0x14, ++0xf0,0xe4,0x90,0x9e,0x65,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x53,0x26,0xfd,0x53,0x26,0xef,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12, ++0x45,0x53,0x22,0xe4,0xff,0xe5,0x25,0x60,0x5f,0xe5,0x22,0x64,0x01,0x70,0x59,0xe5, ++0x25,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21, ++0x90,0x9e,0x64,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x9e,0x64, ++0xe0,0x70,0x08,0x90,0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x7f,0x01,0x80,0x02,0x7f, ++0x01,0xef,0x60,0x24,0x43,0x26,0x10,0xe4,0x90,0x9e,0x86,0xf0,0x90,0x9e,0x6e,0x12, ++0x44,0x56,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04,0x50, ++0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x2f,0x22,0xe5,0x25,0x60,0x39,0x90,0x9e,0x74, ++0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x28,0x80,0x23, ++0x90,0x9e,0x65,0xe0,0x04,0xf0,0x53,0x26,0xef,0x90,0x9e,0x6a,0xe0,0xff,0x90,0x9e, ++0x65,0xe0,0xd3,0x9f,0x40,0x0d,0xe5,0x22,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0, ++0x04,0xf0,0x22,0x12,0x44,0xd1,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0, ++0x17,0xed,0xc4,0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82, ++0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0xe0,0x4d,0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74, ++0x84,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc, ++0x75,0xf0,0x09,0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0, ++0xed,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0, ++0x90,0x9e,0x3f,0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0, ++0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74, ++0x01,0x93,0xfb,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea, ++0xf0,0xa3,0xeb,0xf0,0xec,0xc3,0x9f,0x40,0x02,0xe1,0xa5,0x74,0x67,0x2d,0xf5,0x82, ++0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3, ++0x9f,0x40,0x02,0xe1,0xd6,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74, ++0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff, ++0x90,0x9e,0x3f,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10, ++0x50,0x40,0x74,0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0x90,0x9e,0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x23,0xbb, ++0x11,0x09,0x90,0x9e,0x40,0xe0,0x30,0xe7,0x02,0x7b,0x17,0xeb,0x64,0x13,0x60,0x03, ++0xbb,0x12,0x09,0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x64, ++0x80,0x34,0x0b,0x80,0x84,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x67,0x2d, ++0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a, ++0x12,0x43,0x5f,0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5, ++0x64,0x80,0x03,0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41, ++0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe, ++0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee, ++0xf0,0xa3,0xef,0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,0x9e,0x3e,0xe0,0xff, ++0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x64, ++0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74, ++0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74, ++0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0, ++0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x64, ++0x22,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5, ++0x64,0x44,0x80,0xfd,0x12,0x5a,0x80,0xe5,0x64,0x44,0x80,0xff,0x22,0xe4,0xf5,0x59, ++0xe5,0x59,0xb4,0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,0x95,0x01,0xe0,0xff, ++0x90,0x9a,0xc5,0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96, ++0x4b,0x12,0x43,0x5f,0xe0,0x64,0x01,0x60,0x02,0xc1,0xd3,0xe5,0x59,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee, ++0x94,0x00,0x50,0x02,0xc1,0xd3,0xe5,0x59,0x94,0x20,0x40,0x08,0x90,0x9a,0xc5,0xe0, ++0x60,0x02,0xc1,0xde,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,0x90,0x35, ++0xf0,0x75,0x5e,0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82, ++0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,0xcf,0xf0,0xa3,0xef, ++0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xff, ++0xa3,0xe0,0x90,0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0xc3,0x94,0x20,0x50, ++0x14,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90, ++0x9e,0x34,0xf0,0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83, ++0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,0x54,0x1f,0xa3,0xf0, ++0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3d,0xf0, ++0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40, ++0x02,0x61,0xac,0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x9f,0x40,0x13,0x90, ++0x9e,0x3d,0xe0,0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9e,0x34,0xf0,0xef, ++0x4e,0xf0,0x90,0x04,0xfd,0xe0,0x54,0x05,0x64,0x01,0x70,0x29,0x90,0x9e,0x35,0xe0, ++0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,0x35,0xe0, ++0x90,0x40,0xf6,0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74, ++0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef, ++0x90,0x41,0x12,0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,0x9e,0x3c, ++0xf0,0x90,0x9e,0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35,0xf0, ++0x75,0x5b,0xff,0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,0x93,0xff, ++0xd3,0x90,0x9e,0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,0xe4,0xfd, ++0xaf,0x59,0x12,0x5c,0xbd,0xc1,0x6a,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,0x5c,0xa9, ++0x5d,0x12,0x24,0x62,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,0x42,0x97, ++0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61, ++0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00,0xab, ++0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24, ++0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9, ++0x5d,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60, ++0x90,0x00,0x04,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5, ++0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x03,0x12, ++0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,0x12,0x42, ++0xc2,0xfd,0xac,0xf0,0x12,0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5, ++0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e,0x00, ++0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12, ++0x24,0x7b,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c, ++0xa9,0x5d,0x90,0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc, ++0xa3,0xe0,0xfd,0x12,0x24,0x7b,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,0x0c,0xe5, ++0x62,0x9f,0xf5,0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,0xf5,0x62, ++0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,0x61,0xf0, ++0xa3,0xe5,0x62,0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x07,0xaf, ++0x59,0x12,0x66,0x87,0xc1,0x3e,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,0xf5,0x82, ++0xe4,0x34,0x41,0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50, ++0x02,0xc1,0x3e,0x7d,0x01,0xaf,0x59,0x12,0x5c,0xbd,0xc1,0x3e,0x74,0xe6,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xa1,0x47,0x90, ++0x96,0x43,0xe0,0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,0x40,0x3d, ++0x80,0x2e,0xef,0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,0x2e,0x80, ++0x1f,0x90,0x96,0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x0a, ++0x40,0x1b,0x80,0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,0x40,0x0d, ++0x90,0x9a,0x84,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,0x84,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x81,0xf4,0x90, ++0x9a,0x84,0xe0,0x64,0x01,0x60,0x02,0x81,0xf4,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9a,0xf5,0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,0xfe, ++0x74,0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,0xee, ++0x64,0x80,0xf8,0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74, ++0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,0x80, ++0xf8,0x74,0x80,0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,0x05,0x80, ++0x0e,0xef,0xd3,0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0x74, ++0x41,0x25,0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0, ++0x04,0xf0,0x80,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9d,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5, ++0x83,0xe5,0x63,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,0x5f,0xe0, ++0xb4,0x01,0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5, ++0x83,0xe4,0xf0,0xad,0x63,0xc1,0x39,0xec,0x64,0x06,0x60,0x02,0xc1,0x3e,0xf5,0x61, ++0xf5,0x62,0x90,0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3,0xe0, ++0xfd,0x12,0x24,0x7b,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,0x5e,0xaa, ++0x5f,0xa9,0x60,0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,0x42, ++0xc2,0xfd,0xac,0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,0x24,0x7b, ++0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,0xe0,0x95, ++0x62,0x90,0x9e,0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,0x05,0xbd, ++0xe5,0x5a,0xc3,0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,0x46,0x80, ++0x13,0xe5,0x63,0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,0x39,0xe5, ++0x5a,0xb4,0x01,0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,0x05,0x28, ++0xe5,0x5a,0x70,0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63, ++0x03,0x80,0x03,0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e,0x3a, ++0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90, ++0x9e,0x3a,0xe0,0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x66,0x47,0x74,0xe6, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0xe6,0x50, ++0x0e,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,0xa9,0x60, ++0xe4,0xf5,0xf0,0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0xe4, ++0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00, ++0x06,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19, ++0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0xe5,0x59,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0, ++0xa3,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4, ++0xf0,0xa3,0xf0,0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x01,0x90,0x22,0x90, ++0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0, ++0xfd,0x74,0xa4,0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10, ++0xf0,0xe4,0x90,0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,0xf0,0x0a, ++0xed,0x90,0x90,0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90, ++0x90,0x02,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x04, ++0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,0x12,0x43, ++0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,0x5f,0xe4, ++0xf0,0xa3,0xf0,0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,0x13,0xf0, ++0x74,0x85,0x2d,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2d,0xf5, ++0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4, ++0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4, ++0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4, ++0x34,0x9a,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4, ++0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0xe4,0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0, ++0x74,0xe6,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,0xc4,0x93, ++0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e, ++0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,0x12,0x43, ++0x5f,0x74,0x01,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0x74,0x01, ++0xf0,0x74,0x82,0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0, ++0x09,0xed,0x90,0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,0x2d,0xf5, ++0x82,0xe4,0x34,0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03,0x02,0x6f, ++0x0d,0x22,0x12,0x24,0x62,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,0xf0, ++0x22,0xe5,0x59,0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,0x42,0xf0, ++0x22,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,0x13, ++0x13,0x13,0x54,0x01,0xfd,0xaf,0x06,0x02,0x55,0x30,0x12,0x24,0x62,0x90,0x95,0x01, ++0xf0,0x22,0x12,0x24,0x62,0xf5,0x22,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x30, ++0xe0,0x25,0x12,0x24,0x62,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90, ++0x9e,0x6b,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12, ++0x42,0x20,0x90,0x9e,0x6f,0xf0,0x22,0x90,0x9e,0x6a,0x74,0x01,0xf0,0x90,0x9e,0x6b, ++0x74,0x03,0xf0,0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74,0x05,0xf0,0x22, ++0x12,0x24,0x62,0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x6e,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0xff,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0xef,0xf0,0x22,0x90,0x9e, ++0x6e,0x74,0x07,0xf0,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x50,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x51,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x52,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x9e,0x53,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x9e,0x54,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x3f, ++0x12,0x43,0x8b,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa, ++0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00, ++0x01,0xee,0x8f,0xf0,0x12,0x43,0x19,0x12,0x24,0x62,0xff,0x60,0x2c,0xb5,0x71,0x16, ++0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x73,0x70,0x04, ++0xe5,0x72,0x65,0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12, ++0x42,0xc2,0xff,0xae,0xf0,0x51,0x3e,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x12, ++0x24,0x62,0x65,0x71,0x60,0x03,0x12,0x44,0xc8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e, ++0x42,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x71,0x01,0x8e,0x72,0xf5,0x73,0xe4,0xfd,0x7f, ++0x0b,0x51,0x80,0xe4,0xfd,0x7f,0x02,0x51,0x80,0x71,0x4a,0xe4,0xff,0x71,0xac,0xe4, ++0xf5,0x75,0x90,0x01,0xc9,0xe5,0x75,0xf0,0x90,0x9e,0x42,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x30,0x62, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,0x90,0x9e,0x44,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e, ++0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x46,0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d, ++0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc, ++0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x9e,0x44, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e,0x44,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0, ++0x5f,0xf0,0x12,0x4b,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x0b,0x71,0xb9,0xef,0x65, ++0x74,0x60,0x10,0xe5,0x74,0xb4,0x01,0x05,0xe4,0xf5,0x74,0x80,0x03,0x75,0x74,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x71,0x64,0x01,0x70,0x3f,0x71,0x4a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xac,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4c, ++0xe3,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4c,0xe3,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x7f,0x02,0x71,0xb9,0x8f,0x75,0x90, ++0x01,0xc9,0xe5,0x75,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xda,0x22,0x90,0x01,0xca,0xe5, ++0x74,0xf0,0xef,0x60,0x03,0x12,0x4f,0xda,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0xb1,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4b,0xdb,0x90,0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x9e,0xb1,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4b,0xd3,0x90,0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0x90,0x9e,0x56,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x57,0xe0,0xf5,0x64,0xa3, ++0xe0,0xf5,0x65,0xe4,0xf5,0x61,0x74,0x59,0x25,0x61,0xf5,0x82,0xe4,0x34,0x9e,0xf5, ++0x83,0xe0,0xff,0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,0xe5,0x61,0xb4,0x04, ++0xe5,0x90,0x9e,0x40,0xe0,0x12,0x43,0x94,0x74,0xb7,0x00,0x75,0xdf,0x01,0x74,0xbd, ++0x02,0x74,0xbd,0x03,0x74,0xbd,0x04,0x75,0xdf,0x05,0x75,0xaf,0x80,0x75,0xc5,0x81, ++0x75,0xdf,0x82,0x00,0x00,0x75,0xdb,0xaf,0x69,0xb1,0xe6,0xa1,0xdf,0x90,0x9e,0x40, ++0xe0,0xff,0xb4,0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x9e, ++0x3f,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x64,0x94, ++0x08,0x50,0x49,0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,0x61,0xc3,0x9f,0x40, ++0x02,0xa1,0xdf,0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,0x25,0x65,0xff,0xc3, ++0x74,0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4c,0xe3,0x80,0x1a,0xc3,0x74, ++0x03,0x95,0x61,0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,0x25,0x65,0xfd,0xec, ++0x35,0x64,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,0xc3,0xe5,0x64,0x94, ++0x10,0x40,0x02,0xa1,0xdf,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,0x02,0xa1,0xdf,0xaf, ++0x67,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0xaf,0x66,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02, ++0xd0,0x01,0xd0,0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf, ++0x68,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0x12,0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x69,0xe4, ++0xfc,0xfd,0xfe,0x12,0x43,0x46,0xa3,0x12,0x25,0x08,0x90,0x9e,0x41,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0xaf,0x65,0xae,0x64,0x12,0x2b,0x08,0x80,0x30,0xe5, ++0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe, ++0x12,0x32,0x15,0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4, ++0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f, ++0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,0xf0,0xe5,0x6a,0x14, ++0xfe,0x90,0x9e,0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x2d,0x4d, ++0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,0x7d,0xff,0x12,0x2d, ++0x4d,0x90,0x9e,0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,0x94,0xff,0x50,0x0f, ++0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe8,0xad, ++0x6a,0x7f,0xff,0x02,0x2d,0x4d,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x5b, ++0x75,0x5c,0x04,0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,0xe0,0xff,0x12,0x24, ++0x62,0xfe,0xef,0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,0x75,0x5a,0x80,0x80, ++0x05,0xe4,0xf5,0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20, ++0x25,0x5b,0xf5,0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x90,0x9e,0x56,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x9e,0x57,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5, ++0x5b,0x25,0x5a,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74, ++0x55,0x2f,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x91, ++0x5a,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x60,0x94,0xe8,0xe5, ++0x5f,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x60, ++0xe5,0x60,0x70,0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xd5,0x90, ++0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff, ++0xf0,0x80,0x3e,0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,0x5e,0xe5,0x5a,0x64, ++0x80,0x45,0x59,0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,0x59,0x00,0x75,0x5a, ++0x80,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x5b,0xf5, ++0x5b,0xe5,0x5d,0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,0x5c,0x60,0x02,0xc1, ++0x74,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x9e,0x5d,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd, ++0x7f,0x80,0x02,0x4c,0xe3,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,0x89,0x5d,0xe4, ++0x90,0x9e,0x34,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4b,0xdb,0xe5,0x59,0x54,0x03, ++0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0, ++0x54,0x7f,0xf0,0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34, ++0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3, ++0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42, ++0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0xf5,0x74,0x22,0x90,0x9e,0x60,0xe0,0x90, ++0x9e,0x0f,0xf0,0x22,0xef,0x70,0x03,0x02,0x79,0x9c,0x90,0x9e,0x0f,0xe0,0x60,0x03, ++0x02,0x7d,0x67,0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xab,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x9d,0xaf,0x12, ++0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x9d,0xb3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x74, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xc3,0x12,0x43, ++0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d, ++0xc7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x9d,0xcb,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x88,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xd7,0x12,0x43,0x53, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xdb, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x9d,0xdf,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x9d,0xef,0x12, ++0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x90, ++0x9d,0xf3,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12, ++0x2b,0x08,0x90,0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04, ++0x7e,0x08,0x12,0x2b,0x08,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0, ++0x64,0x01,0x60,0x02,0xa1,0x67,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xfb, ++0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xa7,0x12,0x25,0x08, ++0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d,0xab,0x12,0x25,0x08,0x7f,0x6c,0x7e, ++0x0e,0x12,0x22,0x65,0x90,0x9d,0xaf,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12,0x22, ++0x65,0x90,0x9d,0xb3,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d, ++0xb7,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbb,0x12,0x25, ++0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xbf,0x12,0x25,0x08,0x7f,0x80, ++0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xc3,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12, ++0x22,0x65,0x90,0x9d,0xc7,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22,0x65,0x90, ++0x9d,0xcb,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xcf,0x12, ++0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd3,0x12,0x25,0x08,0x7f, ++0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xd7,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e, ++0x12,0x22,0x65,0x90,0x9d,0xdb,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,0x22,0x65, ++0x90,0x9d,0xdf,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xe3, ++0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x9d,0xe7,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9d,0xeb,0x12,0x25,0x08,0x7f,0x04,0x7e, ++0x0d,0x12,0x22,0x65,0x90,0x9d,0xef,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22, ++0x65,0x90,0x9d,0xf3,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x9d, ++0xf7,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa1,0x12,0x25, ++0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa1,0x12, ++0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x8c, ++0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00,0x00,0x7f, ++0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb,0x25,0xa4, ++0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25, ++0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb, ++0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x04, ++0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14, ++0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25, ++0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96, ++0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80, ++0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xe0, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25,0xa4,0x7f, ++0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x9e,0xa1, ++0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa1,0x12, ++0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa1, ++0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x9e,0xa1, ++0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e, ++0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90, ++0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65,0x90, ++0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e, ++0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90, ++0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65,0x90, ++0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec, ++0x54,0xf0,0xfc,0x90,0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed, ++0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1, ++0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08, ++0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e,0xa1, ++0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa1,0x12,0x25,0x08,0x90,0x9e, ++0xa1,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa1,0x12,0x25,0x08,0x90, ++0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12, ++0x2b,0x08,0xe4,0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e, ++0x1e,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x59,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4c,0xe3,0x7d,0x40,0x7f, ++0x01,0x12,0x31,0x66,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12, ++0x4c,0xe3,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,0x9e,0x24, ++0xf0,0x90,0x9e,0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x26, ++0xf0,0x90,0x9e,0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x90,0x9e,0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x2e, ++0xf0,0x90,0x9e,0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,0x00,0x51, ++0xe0,0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x60, ++0x08,0x90,0x9e,0x1c,0xe0,0x60,0x02,0xc1,0xd0,0x90,0x9e,0x10,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0, ++0x04,0xf0,0xe4,0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e,0x13,0xe0,0xc3,0x94,0xff, ++0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,0x9e,0x11,0xf0,0x90,0x9e, ++0x10,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x9e, ++0x24,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x25,0xe0, ++0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x26,0xe0,0xc3, ++0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x24,0xf0, ++0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,0xc3,0x94,0xff,0x50,0x05, ++0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04, ++0xf0,0xe4,0x80,0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0, ++0xe4,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0, ++0x22,0x00,0x6a,0xe7,}; ++ ++// =================== v80 UMC B Cut COMMON 2011-12-14 ===================== ++u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength] = { ++0xc2,0x88,0x02,0x00,0x50,0x00,0x00,0x00,0x12,0x14,0x16,0x10,0xc0,0x3e,0x01,0x00, ++0x25,0x86,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0xba,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x48,0x79,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5e,0xff,0x00,0x00,0x00,0x00,0x00,0xa1,0xd4,0x00,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x04,0x04,0x04,0x05,0x04,0x04, ++0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x04,0x05,0x05,0x05,0x06,0x06,0x04,0x04, ++0x05,0x05,0x05,0x05,0x06,0x06,0x04,0x04,0x05,0x05,0x05,0x05,0x06,0x07,0x0a,0x0b, ++0x0d,0x10,0x04,0x05,0x05,0x06,0x06,0x09,0x0c,0x11,0x08,0x08,0x09,0x09,0x0a,0x0c, ++0x10,0x11,0x04,0x04,0x04,0x05,0x04,0x04,0x05,0x07,0x07,0x07,0x08,0x0a,0x04,0x04, ++0x04,0x04,0x06,0x0a,0x0b,0x0d,0x05,0x05,0x07,0x07,0x08,0x0b,0x0d,0x0f,0x04,0x04, ++0x04,0x05,0x07,0x07,0x09,0x09,0x0c,0x0e,0x10,0x12,0x04,0x04,0x05,0x05,0x06,0x0a, ++0x11,0x13,0x09,0x09,0x09,0x09,0x0c,0x0e,0x11,0x13,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x02,0x02,0x02,0x02,0x02,0x02,0x03,0x03,0x04,0x04, ++0x05,0x07,0x04,0x04,0x07,0x0a,0x0a,0x0c,0x0c,0x12,0x05,0x07,0x07,0x08,0x0b,0x12, ++0x24,0x3c,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x20,0x1e, ++0x1c,0x18,0x10,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5, ++0xf0,0xa3,0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3, ++0xf5,0xf0,0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01, ++0x93,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0, ++0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22, ++0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a, ++0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a, ++0x83,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb, ++0xfe,0x06,0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29, ++0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09, ++0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8, ++0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee,0x4a,0xfe,0xed,0x49,0xfd,0xec, ++0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0xa4, ++0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83,0x22,0xe0,0xfb,0xa3,0xe0,0xfa, ++0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0,0xf9,0x25,0xf0,0xf0,0xe5,0x82, ++0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0,0x22,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93, ++0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74, ++0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x02,0x43,0xf8,0x02,0x50,0x2e, ++0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4, ++0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f, ++0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b, ++0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x3d,0xe4,0x7e,0x01,0x93,0x60, ++0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01, ++0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93, ++0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8, ++0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x41,0x9e,0x4f, ++0x00,0x41,0x9e,0xad,0x00,0x41,0x9e,0x61,0x80,0x41,0x9e,0x62,0x80,0x41,0x9e,0xaf, ++0x00,0x00,0xf0,0x90,0x9e,0x6b,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x54, ++0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x85,0xeb,0xf0,0xa3,0xe0, ++0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12,0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22, ++0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe4,0x90,0x9e,0x86,0xf0, ++0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91, ++0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x90,0x9e,0x70, ++0x14,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x0c,0x50,0x02,0xf1,0x2b,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x71,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7d,0x01,0xaf,0x24,0xe1,0x2f,0xb1,0xa6,0xbf,0x01,0x0f,0x90,0x9e,0x51,0xe0, ++0xff,0xe4,0xfd,0xf1,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x53,0x23,0xf0,0x43, ++0x23,0x01,0x91,0xfd,0x91,0xfe,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0x22,0x22,0x22, ++0x22,0x00,0x00,0x02,0x5f,0x91,0x02,0x5f,0x98,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x8b,0x1b,0x8a,0x1c,0x89,0x1d,0x90,0x9e,0x88,0x71,0x8b,0xab,0x1e,0xaa,0x1f,0xa9, ++0x20,0x90,0x9e,0x8b,0x71,0x8b,0xaf,0x21,0x15,0x21,0xef,0x60,0x1b,0x90,0x9e,0x8b, ++0xe4,0x75,0xf0,0x01,0x71,0x74,0x12,0x29,0xd9,0xff,0x90,0x9e,0x88,0xe4,0x75,0xf0, ++0x01,0x71,0x74,0xef,0x51,0x4d,0x80,0xde,0xab,0x1b,0xaa,0x1c,0xa9,0x1d,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0xa9,0xe0,0x90,0x9e,0x2f,0xf0,0xe0,0x54,0xc0,0x70,0x08, ++0x53,0x26,0xfe,0x53,0x26,0xfd,0x91,0xd1,0x90,0x9e,0x2f,0xe0,0x30,0xe6,0x13,0x43, ++0x26,0x01,0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x04,0x91,0xd7,0x80,0x07,0x91,0x80, ++0x80,0x03,0x53,0x26,0xfe,0x90,0x9e,0x2f,0xe0,0x30,0xe7,0x16,0x43,0x26,0x02,0xe4, ++0x90,0x9e,0x86,0x91,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x9e,0x74,0x74,0x01, ++0xf0,0x22,0x53,0x26,0xfd,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x04,0x1d, ++0xe0,0x60,0x1a,0x90,0x05,0x22,0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44, ++0x40,0xf0,0x90,0x01,0xc7,0xe0,0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0, ++0xd0,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0, ++0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0x90,0x01,0xc4,0x74,0xd4,0xf0,0x74,0x45,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01, ++0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32, ++0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c, ++0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x65, ++0xf6,0xe5,0x34,0x30,0xe2,0x38,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0, ++0x30,0xe0,0x24,0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0, ++0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x91,0x62,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90, ++0x06,0x92,0x74,0x01,0xf0,0x80,0x07,0x90,0x9e,0x71,0xe4,0xf0,0x91,0xd1,0xe5,0x34, ++0x30,0xe3,0x38,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x24, ++0x90,0x9e,0x86,0xe4,0xf0,0x90,0x9e,0x69,0xe0,0x90,0x9e,0x87,0xf0,0xe4,0xfb,0xfd, ++0x7f,0x5c,0x7e,0x01,0x91,0x62,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74, ++0x02,0xf0,0x80,0x07,0x90,0x9e,0x70,0xe4,0xf0,0x91,0xd1,0xe5,0x34,0x30,0xe4,0x09, ++0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x73,0x53,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01, ++0x3c,0x74,0x20,0xf0,0x12,0x52,0x64,0xe5,0x35,0x30,0xe0,0x18,0x90,0x01,0x3d,0x74, ++0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0xf5,0x24,0x12, ++0x64,0xd0,0x91,0xd1,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5, ++0x36,0x30,0xe0,0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90, ++0x01,0x3e,0x74,0x02,0xf0,0x74,0xd4,0x04,0x90,0x01,0xc4,0xf0,0x74,0x45,0xa3,0xf0, ++0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00, ++0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x7d,0x01,0x7f,0x0c,0x90, ++0x9e,0xa6,0xed,0xf0,0x90,0x9e,0xa5,0xef,0xf0,0x54,0x0f,0xff,0xe5,0x23,0x54,0x0f, ++0x6f,0x60,0x70,0x90,0x9e,0xa5,0xe0,0x30,0xe2,0x2a,0xe5,0x23,0x20,0xe2,0x05,0x7f, ++0x01,0x12,0x63,0xea,0xe5,0x23,0x30,0xe3,0x09,0x90,0x9e,0xa5,0xe0,0x20,0xe3,0x02, ++0x80,0x52,0xe5,0x23,0x20,0xe3,0x4c,0x90,0x9e,0xa5,0xe0,0x30,0xe3,0x45,0xa3,0xe0, ++0xff,0x02,0x5e,0x95,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x9e,0xa5,0xe0, ++0x20,0xe3,0x08,0x12,0x62,0xce,0xef,0x60,0x2a,0xf1,0xb4,0xe5,0x23,0x54,0x0f,0xff, ++0xbf,0x04,0x10,0x90,0x9e,0xa5,0xe0,0x20,0xe2,0x09,0x12,0x63,0x17,0xef,0x60,0x13, ++0x12,0x61,0x3a,0xe5,0x23,0x54,0x0f,0xff,0xbf,0x02,0x08,0x12,0x63,0x7a,0xef,0x60, ++0x02,0x91,0xec,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x05, ++0x7f,0x01,0x12,0x5e,0x5c,0x53,0x23,0xf0,0x43,0x23,0x04,0x22,0xe0,0xff,0x7d,0x01, ++0x90,0x9e,0x99,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x25,0x60, ++0x05,0xe4,0xff,0x12,0x61,0x1f,0x90,0x9e,0x99,0xe0,0x30,0xe0,0x09,0x90,0x9e,0x9b, ++0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x9e,0x99,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10, ++0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x9e,0x9a,0xe0,0x60,0x1f,0xa3,0xa3,0xe0,0xff, ++0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10,0x2f, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x9e,0x9b,0xa3,0xe0, ++0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82, ++0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x9e,0x9b,0xe0,0xfe,0xa3,0xe0, ++0xff,0x22,0x12,0x45,0xa6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x12, ++0x47,0xd0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0x79,0xf0,0x74,0x48,0xa3,0xf0, ++0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e, ++0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x20,0xe0,0x02,0x41,0x17,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd1,0x08,0x85,0xd2,0x09,0x85,0xd3,0x0a,0x85,0xd4,0x0b,0x85, ++0xd5,0x0c,0x85,0xd6,0x0d,0x85,0xd7,0x0e,0x85,0xd9,0x0f,0xe5,0x0f,0x54,0x40,0xc3, ++0x13,0xff,0xe5,0x0e,0x54,0x20,0x6f,0x70,0x02,0x21,0xc9,0xe5,0x0f,0x30,0xe5,0x02, ++0x21,0xc9,0xe5,0x0d,0x54,0x3f,0xf5,0x4d,0xe5,0x08,0x54,0x3f,0xf5,0x4e,0xe5,0x0c, ++0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83, ++0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x4e, ++0xd3,0x94,0x04,0x40,0x03,0x75,0x4e,0x04,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90,0x00, ++0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xe0,0xfe,0xa3,0xe0,0xff, ++0xe5,0x0e,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x4d,0x90,0x90, ++0x00,0x12,0x43,0x5f,0x75,0xf0,0x02,0xe5,0x4e,0x12,0x43,0x5f,0xee,0xf0,0xa3,0xef, ++0xf0,0xe5,0x0f,0x20,0xe6,0x24,0xe5,0x0e,0x54,0x1f,0xff,0xe5,0x4d,0x25,0xe0,0x24, ++0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x42,0x81,0xe5,0x0a, ++0x30,0xe7,0x36,0xaf,0x4d,0x12,0x5b,0x68,0x80,0x2f,0xe5,0x0e,0x54,0x1f,0xff,0xe5, ++0x4d,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x42,0x81,0xe5,0x0a,0x30,0xe7,0x12,0xe5,0x0a,0x54,0x7f,0xfd,0xe5,0x0e,0x54,0x1f, ++0xf5,0x53,0xab,0x4e,0xaf,0x4d,0x12,0x5b,0x05,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x45,0x90,0x9e,0x73,0xe0,0x60,0x37,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x71,0xc4,0xef,0x64,0x01,0x70,0x2d,0x90,0x9e,0x69,0xe0,0xf5,0x44, ++0x75,0x45,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x35,0xab,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x9e,0x71,0xf0,0x80,0x08,0x71, ++0xc4,0xbf,0x01,0x03,0x12,0x44,0xd1,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x13,0x85,0xd2,0x14,0x85,0xd3,0x15,0x85,0xd4,0x16,0x85,0xd5, ++0x17,0x85,0xd6,0x18,0x85,0xd7,0x19,0x85,0xd9,0x1a,0x12,0x5c,0x46,0xe5,0x2c,0x30, ++0xe3,0x06,0x90,0x01,0x34,0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34, ++0x74,0x10,0xf0,0x43,0x12,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0,0x30, ++0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75, ++0xe8,0x00,0xd1,0xdb,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x71,0xdb,0x80,0xfe,0xe5, ++0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x12,0x90, ++0x9e,0x5f,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x65,0x90,0x90,0x9e,0x5f,0xe4, ++0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x12,0x40,0x90, ++0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a, ++0x74,0x01,0xf0,0x90,0x9e,0x4f,0xe4,0xf0,0x80,0x17,0x90,0x9e,0x4f,0xe0,0x04,0xf0, ++0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x02,0x11, ++0x62,0xe5,0x2e,0x30,0xe2,0x09,0x90,0x01,0x36,0x74,0x04,0xf0,0x12,0x65,0x28,0xe5, ++0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x22,0x64,0x01,0x70,0x1c, ++0xe5,0x25,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90, ++0x9e,0x86,0xe4,0x12,0x44,0x52,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x22,0xb4,0x01,0x20,0xe5,0x25,0x60,0x1c, ++0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x9e,0x74,0xe4,0xf0, ++0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1,0xe5,0x2e,0x30,0xe5, ++0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x22,0xb4,0x01,0x14,0xe5,0x25,0x60,0x10, ++0x90,0x9e,0x73,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xd7,0x80,0x03,0x12,0x44,0x80, ++0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x22,0xb4,0x01,0x10, ++0xe5,0x25,0x60,0x0c,0x53,0x26,0xfe,0xe5,0x26,0x54,0x07,0x70,0x03,0x12,0x44,0xd1, ++0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0,0x12,0x61,0x92,0x74,0x79, ++0x04,0x90,0x01,0xc4,0xf0,0x74,0x48,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02, ++0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3, ++0xc0,0xd0,0x90,0x9e,0xac,0xed,0xf0,0x90,0x9e,0xab,0xef,0xf0,0xd3,0x94,0x07,0x50, ++0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff, ++0x90,0x00,0x47,0xe0,0x5f,0xf0,0x71,0xdb,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x71, ++0xdb,0x90,0x9e,0xac,0xe0,0x60,0x16,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x45,0x80,0x6b,0x90,0x9e,0xab,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x71,0xd3,0x90,0x9e,0xab, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00, ++0x43,0xe0,0x4f,0xf0,0x71,0xdb,0x90,0x9e,0xac,0xe0,0x60,0x1b,0x90,0x9e,0xab,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x9e,0xab,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0, ++0x5f,0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe, ++0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed, ++0xf0,0x71,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24, ++0x02,0x60,0x02,0xa1,0x9f,0x90,0x9e,0x1a,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44, ++0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x91, ++0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x9e,0x1a, ++0xf0,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e, ++0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90, ++0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10, ++0xfd,0x7f,0x46,0x80,0x38,0x90,0x9e,0x1a,0x74,0x01,0xf0,0x90,0x9e,0x20,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00, ++0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd, ++0x7f,0x45,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x91,0xe3,0x22, ++0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1c,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x25,0xe0,0x25,0xe0,0x90,0x9e,0x1b,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90, ++0x9e,0x1f,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90, ++0x9e,0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90, ++0x9e,0x2d,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x9e,0x1b, ++0xe0,0xff,0x12,0x52,0x12,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x90,0x9e,0x1c, ++0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1b,0xe0,0x70,0x02,0xc1,0xa7,0x90,0x9e,0x1f, ++0xe0,0x70,0x02,0xc1,0xa7,0xa2,0xaf,0xe4,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90, ++0x9e,0x2e,0x74,0x01,0xf0,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x91,0xda,0x90, ++0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15, ++0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54, ++0xef,0xfd,0x7f,0x45,0x91,0xe3,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a, ++0xe0,0x90,0x05,0x84,0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c, ++0xe0,0x90,0x05,0x86,0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4, ++0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20, ++0xe4,0xff,0x12,0x37,0x00,0x80,0x2b,0x90,0x9e,0x1c,0xe0,0x70,0x2d,0x90,0x9e,0x2e, ++0x91,0xd9,0x90,0x00,0x46,0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x91,0xe3,0x90,0x05,0x22, ++0xe4,0xf0,0xa2,0xaf,0x33,0x90,0x9e,0x3f,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12, ++0x36,0x92,0x90,0x9e,0x3f,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x01,0x30,0xe4,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0xfd,0x7f,0x50,0x91,0xe3,0xe4,0xfd,0x7f,0x51,0x91,0xe3,0xe4,0xfd,0x7f,0x52,0x91, ++0xe3,0xe4,0xfd,0x7f,0x53,0x81,0xe3,0x8b,0x59,0x8a,0x5a,0x89,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0x90,0x9e,0x1d,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x9e,0x14,0x74,0x01, ++0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x16,0x12,0x2a,0x7f,0xab,0x59, ++0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78, ++0x1a,0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x9e,0x16,0x12, ++0x43,0x53,0xec,0x54,0x03,0xfc,0x12,0x43,0x46,0x90,0x9e,0x20,0x12,0x2a,0x7f,0x90, ++0x05,0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x9e,0x14,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x27,0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x9e,0x16,0x12,0x2a,0x7f, ++0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9e,0x1d,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x91,0xe3, ++0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x44, ++0x10,0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x91,0xe3,0x90,0x00, ++0x48,0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x91,0xe3,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd, ++0x7f,0x46,0x91,0xe3,0xe4,0x90,0x9e,0x1a,0xf0,0x22,0x90,0x00,0x49,0xe0,0x90,0x9e, ++0xb0,0xf0,0xe0,0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x91,0xe3,0x90,0x9e,0xb0, ++0xe0,0x44,0xb0,0xfd,0x7f,0x49,0x81,0xe3,0x75,0x28,0x33,0xe4,0xf5,0x29,0x75,0x2a, ++0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3,0xe5,0x2a, ++0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90, ++0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0xe4,0x90, ++0x9e,0x31,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0x12,0x77,0x51,0x12,0x5e,0xde,0x90,0x9e, ++0x5e,0xef,0xf0,0x12,0x5e,0xeb,0x90,0x9e,0x60,0xef,0xf0,0xe4,0xf5,0x12,0x12,0x6e, ++0xcc,0x12,0x77,0xc8,0x12,0x5f,0x9f,0x12,0x32,0x3d,0x12,0x77,0xc4,0x12,0x4f,0xf8, ++0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0,0x90,0x05,0x5a, ++0xf0,0xa3,0xe4,0xf0,0x12,0x5e,0xf8,0x11,0x16,0x12,0x44,0xff,0x12,0x7d,0x88,0x90, ++0x9e,0x33,0xe5,0xd9,0xf0,0x12,0x5e,0xaf,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4b,0xdb,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x9e,0x31,0xe0, ++0x64,0x01,0xf0,0x24,0x2e,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x12,0x30, ++0xe4,0x09,0xc2,0xaf,0x53,0x12,0xef,0xd2,0xaf,0x71,0x1a,0xe5,0x12,0x30,0xe6,0x16, ++0xc2,0xaf,0x53,0x12,0xbf,0xd2,0xaf,0x12,0x68,0x7a,0x90,0x9e,0x1e,0xe0,0xff,0x60, ++0x03,0xb4,0x01,0x02,0x31,0x10,0x90,0x9e,0x1e,0xe0,0x70,0x03,0x12,0x7d,0xe6,0x11, ++0xe3,0x80,0xb9,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01,0x7a,0x06, ++0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x77,0x62,0xbf,0x01,0x09,0x90,0x06,0x35,0xe0, ++0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x77,0x43,0xe4,0x90,0x06,0x34,0xf0,0x22, ++0x90,0x9e,0x15,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0,0x21,0xc8,0x90,0x9e, ++0x15,0xe0,0x64,0x14,0x60,0x02,0x21,0xc8,0x90,0x9e,0x24,0xe0,0x70,0x25,0x90,0x9e, ++0x27,0xe0,0x70,0x1f,0x90,0x9e,0x25,0xe0,0x70,0x19,0x90,0x9e,0x28,0xe0,0x70,0x13, ++0x90,0x9e,0x26,0xe0,0x70,0x0d,0x90,0x9e,0x29,0xe0,0x70,0x07,0x90,0x04,0xfd,0xe0, ++0x54,0xfe,0xf0,0x90,0x9e,0x24,0xe0,0x90,0x04,0x44,0xf0,0x90,0x9e,0x25,0xe0,0x90, ++0x04,0x45,0xf0,0x90,0x9e,0x26,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90,0x9e, ++0x27,0xe0,0x90,0x04,0x48,0xf0,0x90,0x9e,0x28,0xe0,0x90,0x04,0x49,0xf0,0x90,0x9e, ++0x29,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x9e,0x10,0xe0,0x90,0x04,0x4c, ++0xf0,0x90,0x9e,0x11,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x9e,0x12,0xe0,0x90,0x04,0x4e, ++0xf0,0x90,0x9e,0x13,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x9e,0x15,0xf0,0x90,0x9e, ++0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x24,0xf0,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x9e,0x34,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x9e,0x35,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x36,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0x2d,0xe0,0xff,0x90,0x9e,0x37, ++0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x9e,0x2d,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40, ++0x10,0x90,0x9e,0x1b,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0x22,0x90,0x05,0x60,0xe0,0x90,0x9e,0x2a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x9e, ++0x2b,0xf0,0x90,0x05,0x62,0xe0,0x90,0x9e,0x2c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x9e, ++0x2d,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x9e,0x2b,0xe0,0xd3,0x9e,0x40,0x1e,0xe0, ++0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0, ++0x22,0x90,0x9e,0x2d,0x80,0x03,0x90,0x9e,0x2c,0xe0,0x04,0xf0,0x22,0x90,0x9e,0x2b, ++0xe0,0x2f,0xf0,0x22,0x90,0x9e,0x1c,0xe0,0x64,0x01,0x60,0x02,0x61,0x19,0x90,0x00, ++0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x70,0x32, ++0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x20,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f, ++0xf0,0x90,0x9e,0x1b,0xe0,0xff,0x51,0x12,0x90,0x9e,0x2e,0x74,0x01,0x12,0x4c,0xd9, ++0x80,0x40,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x70,0x38,0x90,0x9e,0x1f,0xe0,0xff,0x51, ++0x12,0xe4,0x90,0x9e,0x2e,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12, ++0x4c,0xe3,0x90,0x9e,0x14,0xe0,0x60,0x15,0x90,0x9e,0x16,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22, ++0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x9e,0x2a,0xe0,0x90,0x05,0x84, ++0xf0,0x90,0x9e,0x2b,0xe0,0x90,0x05,0x85,0xf0,0x90,0x9e,0x2c,0xe0,0x90,0x05,0x86, ++0xf0,0x90,0x9e,0x2d,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x01,0xcc,0xe0,0x54,0x0f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfd,0x70,0x02,0x81,0x5b,0x90,0x9e,0xad, ++0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x81,0x54,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd0,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x35,0xf0,0x75,0x1e,0x01,0x75,0x1f, ++0x9e,0x75,0x20,0x35,0x75,0x21,0x01,0x7b,0x01,0x7a,0x9e,0x79,0x36,0x12,0x45,0x09, ++0x90,0x9e,0x36,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x9e,0xad,0x30,0xe0, ++0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0, ++0x90,0x9e,0xad,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x5f,0xe0,0x90,0x9e, ++0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x5f,0xe0, ++0x90,0x9e,0x39,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43, ++0x5f,0xe0,0x90,0x9e,0x3a,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3, ++0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3b,0xf0,0x80,0x33,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd1,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x37,0xf0,0x90,0x9e,0xad,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd2,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x38,0xf0,0x90,0x9e,0xad,0xe0,0x75, ++0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x39,0xf0,0xef,0x54,0x7f, ++0xff,0x7b,0x01,0x7a,0x9e,0x79,0x37,0x91,0x5c,0x90,0x9e,0x34,0xe0,0xff,0x90,0x9e, ++0xad,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0xad,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x9e,0xad,0xe0,0x04,0xf0,0xe0,0x54, ++0x03,0xf0,0x61,0x24,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22,0x90,0x9e,0x3c,0x12, ++0x43,0x8b,0xef,0x12,0x43,0x94,0x54,0x97,0x01,0x54,0xa0,0x02,0x54,0xbb,0x03,0x54, ++0xc4,0x05,0x54,0xcd,0x06,0x55,0x1b,0x07,0x54,0xd5,0x09,0x54,0xde,0x0c,0x54,0xe7, ++0x0d,0x54,0xf0,0x0e,0x54,0xf9,0x1b,0x55,0x02,0x1c,0x55,0x0b,0x2c,0x54,0xa9,0x2d, ++0x54,0xb2,0x2e,0x00,0x00,0x55,0x14,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x61,0x69, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xef,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x70,0xf5,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0x3d,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x71,0x6b,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0x9f,0x90,0x9e,0x3c, ++0x12,0x43,0x6b,0x80,0x47,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x71,0xb3,0x90,0x9e, ++0x3c,0x12,0x43,0x6b,0x02,0x4d,0xa0,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x7d,0x55, ++0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x4f,0x07,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02, ++0x70,0xe7,0x90,0x9e,0x3c,0x12,0x43,0x6b,0x02,0x70,0xce,0x90,0x9e,0x3c,0x12,0x43, ++0x6b,0x02,0x76,0x23,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0x90,0x00,0x04,0x12, ++0x42,0x20,0xff,0x54,0x1f,0xfe,0xef,0x54,0x20,0xc4,0x13,0x54,0x07,0xfd,0xaf,0x06, ++0x90,0x9e,0x3f,0xef,0xf0,0xa3,0xed,0xf0,0xa3,0x12,0x43,0x8b,0x90,0x9e,0x41,0x12, ++0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0xf0,0xc4,0x54,0x0f,0x90,0x9e,0x44, ++0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0x54,0x40,0xc4,0x13,0x13,0x54,0x03,0x90,0x9e, ++0x45,0xf0,0x90,0x9e,0x3f,0xe0,0xff,0x75,0xf0,0x09,0x90,0x96,0x46,0x12,0x43,0x5f, ++0xad,0x82,0xac,0x83,0x90,0x9e,0x46,0xec,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x09, ++0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0xfa,0x7b,0x01,0xa3,0x12,0x43,0x8b,0x90, ++0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x0f,0xff,0x90,0x9e, ++0x48,0x12,0x43,0x6b,0xef,0x12,0x42,0x4d,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x90,0x9e,0x48,0x12,0x43,0x6b,0x90,0x00,0x01,0xef,0x12, ++0x42,0x5f,0x90,0x9e,0x41,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90, ++0x9e,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x29,0xd9, ++0x8d,0x82,0x8c,0x83,0xa3,0xf0,0x90,0x9e,0x44,0xe0,0xfe,0x90,0x9e,0x3f,0xe0,0xff, ++0x24,0x82,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x90,0x9e,0x40,0xe0,0xfe, ++0x75,0xf0,0x09,0xef,0x90,0x96,0x4a,0x12,0x43,0x5f,0xee,0xf0,0x75,0xf0,0x09,0xef, ++0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01,0xf0,0x90,0x9e,0x45,0xe0,0xfe,0x75,0xf0, ++0x09,0xef,0x90,0x96,0x4c,0x12,0x43,0x5f,0xee,0xf0,0x8f,0x59,0xef,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xaf,0x82,0xf5,0x5b,0x8f,0x5c,0xe5,0x59,0x75,0xf0, ++0x02,0xa4,0x24,0x02,0xf9,0x74,0x95,0x35,0xf0,0x75,0x5d,0x01,0xf5,0x5e,0x89,0x5f, ++0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x46,0x12,0x43,0x5f,0xaf,0x82,0x85,0x83,0x60, ++0x8f,0x61,0xe5,0x59,0x75,0xf0,0x09,0xa4,0x24,0x44,0xf9,0x74,0x96,0x35,0xf0,0x75, ++0x62,0x01,0xf5,0x63,0x89,0x64,0x74,0x82,0x25,0x59,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0x12,0x43,0x94,0x56,0xaa,0x00,0x56,0xbf,0x01,0x56,0xd4,0x02,0x56,0xe9, ++0x03,0x57,0x13,0x04,0x57,0x28,0x05,0x57,0x3d,0x06,0x57,0x64,0x0c,0x57,0x92,0x0d, ++0x57,0xbf,0x0e,0x57,0xec,0x0f,0x00,0x00,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6, ++0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,0x3c,0xe5, ++0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3, ++0x74,0x10,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0x74,0xf0,0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5, ++0x82,0xe4,0x34,0x9b,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x59,0x25,0xe0, ++0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0x8f,0xf0, ++0x02,0x58,0x20,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0x74,0x0f,0xf0,0xa3,0x74,0xf5,0x80,0x27,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,0xf0, ++0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0x02,0x58,0x20,0x90,0x04,0x47,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42, ++0x4d,0x90,0x04,0x46,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42, ++0x5f,0x90,0x04,0x45,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x44,0x02, ++0x58,0x17,0x90,0x04,0x4b,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90, ++0x04,0x4a,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90, ++0x04,0x49,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90, ++0x04,0x4f,0xe0,0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x4e,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x4d,0xe0, ++0x85,0x5c,0x82,0x85,0x5b,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0x12,0x42,0x4d,0x90,0x04,0x52,0xe0,0xab,0x5d,0xaa, ++0x5e,0xa9,0x5f,0x90,0x00,0x01,0x12,0x42,0x5f,0x90,0x04,0x51,0xe0,0x85,0x5c,0x82, ++0x85,0x5b,0x83,0xf0,0x90,0x04,0x50,0xe0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3,0xf0, ++0xab,0x5d,0xaa,0x5e,0xa9,0x5f,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff, ++0xab,0x62,0xaa,0x63,0xa9,0x64,0x12,0x29,0xd9,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03, ++0x12,0x42,0x4d,0xab,0x5d,0xe5,0x5f,0x24,0x01,0xf9,0xe4,0x35,0x5e,0xfa,0xc0,0x03, ++0xc0,0x02,0xc0,0x01,0x12,0x29,0xd9,0xff,0xab,0x62,0xaa,0x63,0xa9,0x64,0x90,0x00, ++0x01,0x12,0x42,0x20,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x42,0x4d,0x85,0x5c, ++0x82,0x85,0x5b,0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83, ++0xe0,0xfe,0xef,0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x5c,0x82,0x85,0x5b,0x83,0xa3, ++0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x61,0x82,0x85,0x60,0x83,0xa3,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0x75,0x5a,0x0b,0x74,0x01,0x7e, ++0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59, ++0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x5d,0x15,0x5a,0xe5,0x5a,0xc3,0x94, ++0x00,0x50,0xca,0x80,0x56,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b, ++0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3d,0x75,0x5a,0x0f,0x74,0x01,0x7e,0x00, ++0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x59,0x25, ++0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f, ++0x4e,0x60,0x08,0x90,0x9e,0x4b,0xe5,0x5a,0xf0,0x80,0x10,0x15,0x5a,0xe5,0x5a,0xc3, ++0x94,0x00,0x50,0xc8,0x80,0x05,0xe4,0x90,0x9e,0x4b,0xf0,0xe5,0x59,0x25,0xe0,0x24, ++0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x3b,0xe4, ++0xf5,0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce, ++0xd8,0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5,0x83, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x9e,0x4c,0xe5,0x5a,0xf0,0x80, ++0x5b,0x05,0x5a,0xe5,0x5a,0xb4,0x10,0xca,0x80,0x52,0xe5,0x59,0x25,0xe0,0x24,0x02, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x39,0xe4,0xf5, ++0x5a,0x74,0x01,0x7e,0x00,0xa8,0x5a,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x59,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06,0xe5,0x5a,0x24,0x10,0x80,0x0a,0x05,0x5a, ++0xe5,0x5a,0xb4,0x0c,0xcc,0x80,0x05,0xe4,0x90,0x9e,0x4c,0xf0,0x90,0x9e,0x4b,0xe0, ++0xff,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xef,0xf0,0x90,0x9e, ++0x4c,0xe0,0xfe,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x49,0x12,0x43,0x5f,0xee,0xf0, ++0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x05, ++0x90,0x9e,0x4b,0x51,0x6f,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0xff,0x90,0x9e,0x4c,0xe0,0xfe,0xef,0xc3,0x9e,0x50,0x02,0x51,0x6f,0x90,0x9e, ++0x4b,0xe0,0xff,0xd3,0x94,0x13,0x40,0x07,0x90,0x96,0x43,0x74,0x03,0xf0,0x22,0xef, ++0xd3,0x94,0x0b,0x40,0x07,0x90,0x96,0x43,0x74,0x02,0xf0,0x22,0xef,0xd3,0x94,0x03, ++0x40,0x07,0x90,0x96,0x43,0x74,0x01,0xf0,0x22,0xe4,0x90,0x96,0x43,0xf0,0x22,0xe0, ++0xfd,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xed,0xf0,0xaf,0x59, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xef,0xc3,0x94,0x20,0x50,0x0e,0x74,0x84,0x2f, ++0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xed,0xf0,0x80,0x29,0x74,0xa6,0x2f,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xed,0xf0,0x90,0x9e,0x75,0xef,0xf0,0x24,0xa6,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x90,0x9e,0x76,0xf0,0x7b,0x01,0x7a,0x9e,0x79,0x75, ++0x7d,0x02,0x51,0xc9,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x9e,0x94,0x12,0x43,0x8b,0x90,0x9e,0x97,0xe0,0x54,0xf0,0x44,0x06,0xff,0xf0, ++0xed,0x54,0x0f,0xc4,0x54,0xf0,0xfe,0xef,0x54,0x0f,0x4e,0xf0,0x90,0x9e,0x94,0x12, ++0x43,0x6b,0x90,0x9e,0x91,0x12,0x43,0x8b,0x7b,0x01,0x7a,0x9e,0x79,0x97,0x71,0xd4, ++0xd0,0xd0,0x92,0xaf,0x22,0x8f,0x50,0x8d,0x51,0xe5,0x51,0x54,0x1f,0xf5,0x56,0x74, ++0x01,0x2f,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xf5,0x54,0x90,0x04,0xfd,0xe0, ++0xb4,0x01,0x05,0x75,0x57,0x03,0x80,0x03,0x75,0x57,0x01,0xeb,0xc3,0x95,0x57,0x40, ++0x04,0xaf,0x50,0x80,0x33,0xe5,0x54,0x25,0x53,0xf5,0x55,0xe5,0x56,0x90,0x41,0xd6, ++0x93,0xff,0xe5,0x55,0xd3,0x9f,0x74,0x01,0x40,0x11,0x25,0x50,0xf5,0x82,0xe4,0x34, ++0x94,0xf5,0x83,0xe4,0xf0,0xad,0x51,0xaf,0x50,0x41,0x80,0x25,0x50,0xf5,0x82,0xe4, ++0x34,0x94,0xf5,0x83,0xe5,0x55,0xf0,0x22,0xad,0x07,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x48,0x12,0x43,0x5f,0xe0,0xff,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83, ++0xe0,0x54,0x1f,0xf5,0x58,0xd3,0x9f,0x40,0x02,0x8f,0x58,0xe5,0x58,0x25,0xe0,0x24, ++0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5, ++0x58,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f, ++0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x05,0xad,0x58,0x51, ++0x80,0xaf,0x58,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x8e,0x12,0x43, ++0x8b,0x90,0x9e,0xaf,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x12,0x42,0x5f,0x7f, ++0xaf,0x7e,0x01,0x91,0x67,0xef,0x60,0x49,0x90,0x9e,0x8e,0x12,0x43,0x6b,0x8b,0x1e, ++0x8a,0x1f,0x89,0x20,0x75,0x21,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x45,0x09, ++0x90,0x9e,0x91,0x12,0x43,0x6b,0x8b,0x1e,0x8a,0x1f,0x89,0x20,0x90,0x9e,0x8e,0x12, ++0x43,0x6b,0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x21,0x7b,0x01,0x7a,0x01,0x79, ++0xa2,0x12,0x45,0x09,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80, ++0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x2f,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54, ++0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x13,0x90,0x9e,0x91,0x12,0x43,0x8b, ++0x0b,0x7a,0x9e,0x79,0x2f,0x61,0xd4,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x9d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x9e,0x9d,0xe0,0xfe, ++0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x9e,0xa0,0xe0,0x94,0xe8, ++0x90,0x9e,0x9f,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x7f, ++0x00,0x80,0x15,0x90,0x9e,0x9f,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a,0x7e, ++0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xac,0x07,0xec, ++0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2c,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0, ++0x80,0x0b,0x74,0xa6,0x2c,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5, ++0x64,0xe5,0x64,0x54,0x1f,0xff,0x90,0x9e,0x40,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96, ++0x49,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x42,0xf0,0x75,0xf0,0x09,0xec,0x90,0x96,0x48, ++0x12,0x43,0x5f,0xe0,0xfe,0x90,0x9e,0x43,0xf0,0xec,0x25,0xe0,0x24,0xc6,0xf5,0x82, ++0xe4,0x34,0x9b,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x44,0xcb,0xf0,0xa3,0xeb, ++0xf0,0xec,0x25,0xe0,0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3, ++0xe0,0x90,0x9e,0x46,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3,0x9e,0x40,0x0a,0x90,0x9e, ++0x43,0xe0,0x90,0x9e,0x40,0xf0,0xf5,0x64,0xed,0x70,0x02,0xc1,0x13,0x90,0x9e,0x41, ++0xed,0xf0,0xe5,0x64,0x30,0xe6,0x0a,0x90,0x9e,0x40,0xe0,0xf5,0x64,0xa3,0xe0,0x14, ++0xf0,0x90,0x9e,0x41,0xe0,0x70,0x02,0xc1,0x13,0x90,0x9e,0x40,0xe0,0xff,0xd3,0x94, ++0x00,0x50,0x02,0xc1,0x13,0xe4,0x90,0x9e,0x3f,0xf0,0xef,0x14,0x90,0x9e,0x3e,0xf0, ++0x90,0x9e,0x42,0xe0,0xfd,0x90,0x9e,0x3e,0xe0,0xff,0xd3,0x9d,0x40,0x6b,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x46,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x9e,0x3e,0xe0,0xff,0xc3,0x94,0x10,0x50,0x33,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x9e,0x44,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x16,0x90,0x9e,0x3e,0xe0,0xf5, ++0x64,0xa3,0xe0,0x04,0xf0,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e,0x3f,0xe0,0x6f,0x60, ++0x08,0x90,0x9e,0x3e,0xe0,0x14,0xf0,0x80,0x87,0x90,0x9e,0x41,0xe0,0xff,0x90,0x9e, ++0x3f,0xe0,0xc3,0x9f,0x50,0x0d,0x90,0x9e,0x3e,0xe0,0xb5,0x05,0x06,0x90,0x9e,0x42, ++0xe0,0xf5,0x64,0xe5,0x64,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe5,0x64,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef, ++0x13,0xff,0xec,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0, ++0xa3,0xef,0xf0,0xaf,0x04,0xad,0x64,0x51,0x80,0xaf,0x64,0x22,0x8f,0x77,0x12,0x45, ++0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x52,0x12,0x47,0xcc,0xe5,0x77,0x60,0x10, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e, ++0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04, ++0x1f,0x74,0x20,0xf0,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef,0x60,0x09,0xe5, ++0x22,0xb4,0x01,0x04,0xe4,0xff,0xd1,0x5c,0x53,0x23,0xf0,0x43,0x23,0x0c,0x22,0x90, ++0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x55,0x12,0x4c,0xe3, ++0x7d,0xff,0x7f,0x56,0x12,0x4c,0xe3,0x7d,0xff,0x7f,0x57,0x02,0x4c,0xe3,0x90,0x00, ++0x02,0xe0,0x54,0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x03,0x7f,0x01,0x22,0x22,0x90,0x01,0x64,0x74,0xa0,0xf0,0x22,0xc0, ++0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01, ++0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00, ++0x55,0xe0,0x5f,0xf5,0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x9e,0x1a,0xe0,0x60,0x05,0x7f,0x01,0x12, ++0x4c,0xf8,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x9e,0x1d, ++0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0xf8,0x90,0x01,0xc4,0x74, ++0xff,0xf0,0x74,0x5e,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0, ++0x32,0x8f,0x6b,0x8c,0x6c,0x8d,0x6d,0x22,0x8f,0x6e,0x8c,0x6f,0x8d,0x70,0x22,0xe4, ++0xf5,0x22,0xf5,0x26,0xf5,0x25,0x75,0x24,0x0c,0x75,0x23,0x0c,0x90,0x9e,0x73,0xf0, ++0x90,0x9e,0x71,0xf0,0x90,0x9e,0x70,0xf0,0x90,0x9e,0x72,0x04,0xf0,0x90,0x9e,0x64, ++0xf0,0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x66,0xf0,0x90,0x9e,0x6e,0x74,0x07,0xf0, ++0xe4,0x90,0x9e,0x65,0xf0,0x90,0x9e,0x6c,0xf0,0xa3,0x74,0x02,0xf0,0x90,0x9e,0x6a, ++0x14,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74, ++0x05,0xf0,0xe4,0x90,0x9e,0x68,0xf0,0x90,0x9e,0x63,0xf0,0x90,0x9e,0x5f,0xf0,0x22, ++0xe4,0x90,0x9e,0x74,0xf0,0x90,0x9e,0x65,0xf0,0xf5,0x26,0x22,0x8b,0x59,0x8a,0x5a, ++0x89,0x5b,0x11,0x00,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x12,0x29,0xd9,0xf5,0x25,0x14, ++0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40,0x7f,0x01,0x80,0x3a, ++0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0xe4,0xff,0x11, ++0x6d,0x80,0x27,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02,0x12,0x42,0x20,0xfd, ++0x7f,0x01,0x11,0x6d,0x1f,0x80,0x13,0xab,0x59,0xaa,0x5a,0xa9,0x5b,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x02,0x11,0x6d,0xe4,0xff,0x11,0x98,0x22,0xef,0x24,0xfe, ++0x60,0x0b,0x04,0x70,0x22,0x90,0x9e,0x72,0x74,0x01,0xf0,0x80,0x16,0xed,0x70,0x0a, ++0x90,0x9e,0x6f,0xe0,0x90,0x9e,0x72,0xf0,0x80,0x05,0x90,0x9e,0x72,0xed,0xf0,0x90, ++0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x22,0xef,0x64,0x01,0x70,0x2f,0x7d,0x7c,0x7f, ++0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0x90,0x01,0x57,0xe4,0xf0, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x47,0x2b,0xe4,0xff,0x31,0x1f,0x90,0x06,0x04, ++0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74, ++0x7c,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7c,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03, ++0x12,0x36,0xe6,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x90,0x9e,0x6c,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0xe5,0x22,0x30,0xe0,0x19, ++0x90,0x9e,0x66,0xe0,0x70,0x18,0xe0,0x04,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04, ++0x50,0x0c,0x7d,0x01,0x7f,0x04,0x02,0x47,0x2f,0xe4,0x90,0x9e,0x66,0xf0,0x22,0xef, ++0x60,0x0b,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x9e,0x60, ++0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x77,0xd1,0x22,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x90,0x05,0x22,0x74,0xff,0xf0,0x31,0xc3,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd, ++0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x25,0x60,0x04,0x7f,0x01,0x31,0x1f, ++0x51,0x04,0x53,0x23,0xf0,0x43,0x23,0x02,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x73,0xf0,0x90,0x00,0x03,0x12,0x42,0x20, ++0x90,0x9e,0x63,0xf0,0x12,0x29,0xd9,0x65,0x25,0x60,0x02,0x11,0x0c,0xd0,0xd0,0x92, ++0xaf,0x22,0x7d,0x02,0x7f,0x03,0x12,0x36,0x75,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02, ++0x80,0x20,0x90,0x9e,0x73,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x23, ++0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x2f,0xe4,0xff, ++0x31,0x1f,0x22,0xe4,0x90,0x9e,0xa9,0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f, ++0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3, ++0x90,0x9e,0xaa,0xe0,0x94,0xe8,0x90,0x9e,0xa9,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00, ++0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x9e,0xa9,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xff,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0x03,0x12,0x2a,0x7f,0x7f,0x00, ++0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0x07,0x12,0x2a,0x7f,0x90,0x9e,0x60,0xe0,0x90, ++0x9d,0xff,0xb4,0x01,0x0d,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd, ++0x80,0x07,0x12,0x43,0x53,0xef,0x54,0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0xef,0x54,0x0f, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90, ++0x9e,0x07,0x12,0x43,0x53,0xef,0x44,0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9e, ++0x0b,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4, ++0xfd,0xff,0x12,0x34,0x81,0x90,0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12, ++0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x12,0x4b, ++0xc4,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x9e, ++0x71,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x9e,0x70,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x24,0x54,0x0f,0xd3,0x94, ++0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01, ++0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x12,0x4b,0xc4,0xef,0x64,0x01,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x01,0xf0,0x80,0x4a,0xe5,0x26,0x54,0x03,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x02,0xf0,0x80,0x3c,0xe5,0x24,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01, ++0xb9,0x74,0x04,0xf0,0x80,0x2b,0xe5,0x26,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08, ++0xf0,0x80,0x1e,0xe5,0x26,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x11, ++0x90,0x9e,0x66,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x03,0x7f,0x01, ++0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0xe5,0x12,0x60,0x08,0x90,0x01, ++0xb9,0x74,0x01,0xf0,0x80,0x5b,0xe5,0x24,0x54,0x0f,0xd3,0x94,0x01,0x40,0x08,0x90, ++0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a,0x90,0x02,0x87,0xe0,0x60,0x08,0x90,0x01,0xb9, ++0x74,0x04,0xf0,0x80,0x3c,0x90,0x9e,0x5e,0xe0,0xb4,0x01,0x10,0x90,0x9e,0x4d,0xe0, ++0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x16,0x80,0x25,0x90,0x9e,0x5e,0xe0, ++0x70,0x0e,0x90,0x01,0xaf,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x11, ++0x90,0x9e,0x68,0xe0,0x70,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x03,0x7f,0x01, ++0x22,0x90,0x01,0xb8,0x74,0x02,0xf0,0x7f,0x00,0x22,0x90,0x9e,0xae,0xef,0xf0,0x91, ++0x03,0x90,0x9e,0xae,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x23,0xf0,0x43, ++0x23,0x04,0x22,0x90,0x9d,0xff,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x03,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9e,0x07,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9e,0x0b,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90, ++0x9e,0x60,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95, ++0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x27,0xe4,0x90,0x9e,0xa7,0xf0,0xa3, ++0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65,0x27,0x60, ++0x3e,0xc3,0x90,0x9e,0xa8,0xe0,0x94,0x88,0x90,0x9e,0xa7,0xe0,0x94,0x13,0x40,0x08, ++0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x9e,0xa7,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x9e,0xa8,0xe0,0x94,0x32, ++0x90,0x9e,0xa7,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22, ++0xe5,0x24,0x30,0xe6,0x19,0xe5,0x24,0x54,0x0f,0xff,0x90,0x9e,0x62,0xe0,0xfe,0x4f, ++0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x9e,0x62,0xf0,0x53,0x24,0xbf,0x22,0x8f, ++0x76,0x12,0x45,0xa6,0xef,0x64,0x01,0x70,0x2e,0x90,0x9e,0x53,0x12,0x47,0xcc,0xe5, ++0x76,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10, ++0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef, ++0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe5,0x22,0x64,0x01,0x70,0x61,0xe5,0x25, ++0x60,0x5d,0xe5,0x25,0x64,0x02,0x60,0x06,0xe5,0x25,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x9e,0x64,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x9e,0x72,0xf0,0x90,0x9e, ++0x64,0xe0,0x70,0x07,0x90,0x9e,0x72,0xe0,0xff,0x80,0x05,0x90,0x9e,0x64,0xe0,0xff, ++0x90,0x9e,0x64,0xef,0xf0,0x90,0x9e,0x66,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x9e,0x65,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x26,0xfd, ++0x53,0x26,0xef,0xe5,0x25,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0x53,0x22, ++0xe4,0xff,0xe5,0x25,0x60,0x5f,0xe5,0x22,0x64,0x01,0x70,0x59,0xe5,0x25,0x14,0x60, ++0x2b,0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x9e,0x64, ++0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x9e,0x64,0xe0,0x70,0x08, ++0x90,0x9e,0x72,0xe0,0x90,0x9e,0x64,0xf0,0x7f,0x01,0x80,0x02,0x7f,0x01,0xef,0x60, ++0x24,0x43,0x26,0x10,0xe4,0x90,0x9e,0x86,0xf0,0x90,0x9e,0x6e,0x12,0x44,0x56,0x90, ++0x01,0x57,0x74,0x05,0xf0,0xe5,0x23,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01, ++0x7f,0x04,0x12,0x47,0x2f,0x22,0xe5,0x25,0x60,0x39,0x90,0x9e,0x74,0xe0,0x60,0x0d, ++0xe4,0xf0,0x53,0x26,0xfd,0xe5,0x26,0x54,0x07,0x70,0x28,0x80,0x23,0x90,0x9e,0x65, ++0xe0,0x04,0xf0,0x53,0x26,0xef,0x90,0x9e,0x6a,0xe0,0xff,0x90,0x9e,0x65,0xe0,0xd3, ++0x9f,0x40,0x0d,0xe5,0x22,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22, ++0x12,0x44,0xd1,0x22,0xef,0xc3,0x94,0x20,0x50,0x39,0xef,0x30,0xe0,0x17,0xed,0xc4, ++0x54,0xf0,0xfd,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x54,0x0f,0x80,0x10,0xef,0xc3,0x13,0xfe,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04, ++0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0xa4,0x2e,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0xe0,0x4d,0xf0,0x22,0xad,0x07,0xed,0xc3,0x94,0x20,0x50,0x0d,0x74,0x84,0x2d,0xf5, ++0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x80,0x0b,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34, ++0x9c,0xf5,0x83,0xe0,0x54,0x7f,0xf5,0x64,0xe5,0x64,0x54,0x1f,0xfc,0x75,0xf0,0x09, ++0xed,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0xff,0x90,0x9e,0x3e,0xf0,0xed,0x25,0xe0, ++0x24,0x02,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x3f, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x9e,0x41,0xcb,0xf0,0xa3,0xeb,0xf0,0xec,0x25,0xe0, ++0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfa,0x74,0x01,0x93,0xfb, ++0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xea,0xf0,0xa3,0xeb, ++0xf0,0xec,0xc3,0x9f,0x40,0x02,0xe1,0x92,0x74,0x67,0x2d,0xf5,0x82,0xe4,0x34,0x9d, ++0xf5,0x83,0xec,0xf0,0x04,0xfb,0x90,0x9e,0x3e,0xe0,0xff,0xeb,0xd3,0x9f,0x40,0x02, ++0xe1,0xc3,0xeb,0xc3,0x94,0x10,0x40,0x21,0xeb,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00, ++0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x9e,0x3f, ++0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x23,0xeb,0xc3,0x94,0x10,0x50,0x40,0x74, ++0x01,0x7e,0x00,0xa8,0x03,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff, ++0x90,0x9e,0x41,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x23,0xbb,0x11,0x09,0x90, ++0x9e,0x40,0xe0,0x30,0xe7,0x02,0x7b,0x17,0xeb,0x64,0x13,0x60,0x03,0xbb,0x12,0x09, ++0x90,0x9e,0x3f,0xe0,0x30,0xe0,0x02,0x7b,0x18,0xac,0x03,0x8c,0x64,0x80,0x34,0x0b, ++0x80,0x84,0x90,0x9e,0x3e,0xe0,0xfb,0x6c,0x70,0x69,0x74,0x67,0x2d,0xf5,0x82,0xe4, ++0x34,0x9d,0xf5,0x83,0xec,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f, ++0xe0,0xb4,0x01,0x0c,0xe5,0x64,0x20,0xe6,0x07,0xec,0x44,0x40,0xf5,0x64,0x80,0x03, ++0xaf,0x64,0x22,0xec,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4, ++0x93,0xfe,0x74,0x01,0x93,0xff,0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41, ++0xf5,0x83,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff, ++0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef, ++0xf0,0x80,0x5b,0xec,0xd3,0x9b,0x40,0x56,0x90,0x9e,0x3e,0xe0,0xff,0x74,0x67,0x2d, ++0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xef,0xf0,0xac,0x07,0x8f,0x64,0xec,0x25,0xe0, ++0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff, ++0xec,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2f, ++0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0xa3,0xef,0xf0,0xaf,0x64,0x22,0x74,0x01, ++0x2d,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xaf,0x05,0xe5,0x64,0x44,0x80, ++0xfd,0x12,0x5a,0x80,0xe5,0x64,0x44,0x80,0xff,0x22,0xe4,0xf5,0x59,0xe5,0x59,0xb4, ++0x20,0x14,0x90,0x9a,0xc5,0xe0,0x04,0xf0,0x90,0x95,0x01,0xe0,0xff,0x90,0x9a,0xc5, ++0xe0,0xb5,0x07,0x02,0xe4,0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4b,0x12,0x43, ++0x5f,0xe0,0x64,0x01,0x60,0x02,0xc1,0xc0,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82, ++0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0xd3,0x94,0x00,0xee,0x94,0x00,0x50, ++0x02,0xc1,0xc0,0xe5,0x59,0x94,0x20,0x40,0x08,0x90,0x9a,0xc5,0xe0,0x60,0x02,0xc1, ++0xcb,0xe5,0x59,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf9,0x74,0x90,0x35,0xf0,0x75,0x5e, ++0x01,0xf5,0x5f,0x89,0x60,0xe5,0x59,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93, ++0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x9e,0x38,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59, ++0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90, ++0x9e,0x3a,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x59,0xc3,0x94,0x20,0x50,0x14,0x74,0x84, ++0x25,0x59,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x3f,0x90,0x9e,0x34,0xf0, ++0x80,0x12,0x74,0xa6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x54,0x3f, ++0x90,0x9e,0x34,0xf0,0x90,0x9e,0x34,0xe0,0xfe,0x54,0x1f,0xa3,0xf0,0x75,0xf0,0x09, ++0xe5,0x59,0x90,0x96,0x48,0x12,0x43,0x5f,0xe0,0x90,0x9e,0x3d,0xf0,0x74,0xe6,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xc3,0x94,0x05,0x40,0x02,0x61,0x99, ++0x90,0x9e,0x3d,0xe0,0xff,0x90,0x9e,0x35,0xe0,0x9f,0x40,0x13,0x90,0x9e,0x3d,0xe0, ++0x90,0x9e,0x35,0xf0,0xee,0x54,0x40,0xfe,0x90,0x9e,0x34,0xf0,0xef,0x4e,0xf0,0x90, ++0x04,0xfd,0xe0,0x54,0x05,0x64,0x01,0x70,0x29,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41, ++0x4a,0x93,0xfe,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3, ++0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x30,0x90,0x9e,0x35,0xe0,0x90,0x40,0xf6, ++0x80,0x27,0x90,0x9e,0x35,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x41,0x12, ++0x80,0x07,0x90,0x9e,0x35,0xe0,0x90,0x41,0x2e,0x93,0x90,0x9e,0x3c,0xf0,0x90,0x9e, ++0x3c,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50,0xf9,0x74,0x40,0x35,0xf0,0x75,0x5b,0xff, ++0xf5,0x5c,0x89,0x5d,0x90,0x9e,0x34,0xe0,0x90,0x41,0xf2,0x93,0xff,0xd3,0x90,0x9e, ++0x3b,0xe0,0x9f,0x90,0x9e,0x3a,0xe0,0x94,0x00,0x40,0x09,0xe4,0xfd,0xaf,0x59,0x12, ++0x5c,0xbd,0xc1,0x57,0xe5,0x59,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0xf5,0x61,0xa3,0xe0,0xf5,0x62,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x29, ++0xd9,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x12,0x42,0x97,0xfd,0xac,0xf0, ++0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa, ++0x5c,0xa9,0x5d,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f, ++0xa9,0x60,0x90,0x00,0x02,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25, ++0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00, ++0x02,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x04, ++0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35, ++0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0x7e,0x00,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x06,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0x12,0x29,0xf2,0xef,0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b, ++0xaa,0x5c,0xa9,0x5d,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x7e,0x00,0xab,0x5e,0xaa, ++0x5f,0xa9,0x60,0x90,0x00,0x08,0x12,0x42,0xc2,0xfd,0xac,0xf0,0x12,0x29,0xf2,0xef, ++0x25,0x62,0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x90, ++0x00,0x05,0x12,0x42,0x20,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3,0xe0,0xfd, ++0x12,0x29,0xf2,0xd3,0xe5,0x62,0x9f,0xe5,0x61,0x9e,0x40,0x0c,0xe5,0x62,0x9f,0xf5, ++0x62,0xe5,0x61,0x9e,0xf5,0x61,0x80,0x05,0xe4,0xf5,0x61,0xf5,0x62,0xe5,0x59,0x25, ++0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe5,0x61,0xf0,0xa3,0xe5,0x62, ++0xf0,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xc3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x07,0xaf,0x59,0x12,0x66, ++0x74,0xc1,0x2b,0x90,0x9e,0x34,0xe0,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41, ++0xf5,0x83,0xd3,0x74,0x01,0x93,0x95,0x62,0xe4,0x93,0x95,0x61,0x50,0x02,0xc1,0x2b, ++0x7d,0x01,0xaf,0x59,0x12,0x5c,0xbd,0xc1,0x2b,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9c,0xf5,0x83,0xe0,0xfc,0x64,0x05,0x60,0x02,0xa1,0x34,0x90,0x96,0x43,0xe0, ++0xff,0xb4,0x03,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x19,0x40,0x3d,0x80,0x2e,0xef, ++0xb4,0x02,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x11,0x40,0x2e,0x80,0x1f,0x90,0x96, ++0x43,0xe0,0xff,0xb4,0x01,0x0b,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x0a,0x40,0x1b,0x80, ++0x0c,0xef,0x70,0x11,0x90,0x9e,0x35,0xe0,0xc3,0x94,0x03,0x40,0x0d,0x90,0x9a,0x84, ++0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x9a,0x84,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34, ++0x9a,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30,0x50,0x02,0x81,0xe1,0x90,0x9a,0x84,0xe0, ++0x64,0x01,0x60,0x02,0x81,0xe1,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe0,0x64,0x0a,0x60,0x51,0xef,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74,0x41,0x25, ++0x59,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe0,0xfd,0xd3,0x9f,0xee,0x64,0x80,0xf8, ++0x74,0x80,0x98,0x50,0x32,0xed,0x24,0x05,0xff,0xe4,0x33,0xfe,0x74,0x44,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80, ++0x98,0x50,0x14,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0xe0,0xff, ++0x90,0x9e,0x35,0xe0,0x6f,0x60,0x3d,0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a, ++0xf5,0x83,0xe0,0xff,0xd3,0x94,0x42,0x40,0x05,0x75,0x63,0x05,0x80,0x0e,0xef,0xd3, ++0x94,0x39,0x40,0x05,0x75,0x63,0x03,0x80,0x03,0x75,0x63,0x01,0x74,0x41,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xef,0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x9a,0x80,0x29,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4, ++0xf0,0x74,0x85,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe0,0x04,0xf0,0x80, ++0x10,0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4, ++0xf0,0x90,0x9e,0x35,0xe0,0xff,0x74,0x26,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9d,0xf5, ++0x83,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe5,0x63, ++0xf0,0x75,0xf0,0x09,0xe5,0x59,0x90,0x96,0x4c,0x12,0x43,0x5f,0xe0,0xb4,0x01,0x10, ++0xe4,0xf5,0x63,0x74,0xe6,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0, ++0xad,0x63,0xc1,0x26,0xec,0x64,0x06,0x60,0x02,0xc1,0x2b,0xf5,0x61,0xf5,0x62,0x90, ++0x42,0x13,0x93,0xff,0x7e,0x00,0x90,0x9e,0x38,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x29, ++0xf2,0x90,0x9e,0x36,0xee,0xf0,0xa3,0xef,0xf0,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4, ++0x34,0x98,0xf5,0x83,0xe0,0xf5,0x63,0xe4,0xf5,0x5a,0xab,0x5e,0xaa,0x5f,0xa9,0x60, ++0x75,0xf0,0x02,0xe5,0x5a,0xa4,0xf5,0x82,0x85,0xf0,0x83,0x12,0x42,0xc2,0xfd,0xac, ++0xf0,0xe5,0x5a,0x90,0x42,0x0e,0x93,0xff,0x7e,0x00,0x12,0x29,0xf2,0xef,0x25,0x62, ++0xf5,0x62,0xee,0x35,0x61,0xf5,0x61,0xc3,0x90,0x9e,0x37,0xe0,0x95,0x62,0x90,0x9e, ++0x36,0xe0,0x95,0x61,0x40,0x07,0x05,0x5a,0xe5,0x5a,0xb4,0x05,0xbd,0xe5,0x5a,0xc3, ++0x13,0xf5,0x5a,0xe5,0x63,0xb4,0x01,0x06,0xe5,0x5a,0x70,0x46,0x80,0x13,0xe5,0x63, ++0xb4,0x03,0x15,0xe5,0x5a,0x70,0x05,0x75,0x63,0x03,0x80,0x39,0xe5,0x5a,0xb4,0x01, ++0x05,0x75,0x63,0x01,0x80,0x2f,0x80,0x2a,0xe5,0x63,0xb4,0x05,0x28,0xe5,0x5a,0x70, ++0x05,0x75,0x63,0x05,0x80,0x0d,0xe5,0x5a,0xb4,0x01,0x05,0x75,0x63,0x03,0x80,0x03, ++0x75,0x63,0x01,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e,0x3a,0xe0,0x94,0x00, ++0x40,0x03,0xe4,0xf5,0x63,0xd3,0x90,0x9e,0x3b,0xe0,0x94,0x03,0x90,0x9e,0x3a,0xe0, ++0x94,0x00,0x40,0x03,0xe4,0xf5,0x63,0x74,0x84,0x25,0x59,0xf5,0x82,0xe4,0x34,0x98, ++0xf5,0x83,0xe5,0x63,0xf0,0xfd,0xaf,0x59,0x12,0x66,0x34,0x74,0xe6,0x25,0x59,0xf5, ++0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0xd3,0x94,0x05,0x74,0xe6,0x50,0x0e,0x25,0x59, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x0b,0x25,0x59,0xf5,0x82, ++0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0xe4,0xf5,0xf0, ++0x12,0x42,0xfa,0xab,0x5e,0xaa,0x5f,0xa9,0x60,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12, ++0x43,0x19,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x43,0x19,0x90,0x00,0x06,0xe4,0xf5, ++0xf0,0x12,0x43,0x19,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x43,0x19,0xe5,0x59,0x25, ++0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5,0x59, ++0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xe5, ++0x59,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5,0x83,0xe4,0xf0,0xa3,0xf0, ++0x05,0x59,0xe5,0x59,0xc3,0x94,0x40,0x50,0x02,0x01,0x7d,0x22,0x90,0x04,0x44,0x74, ++0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0,0xfd,0x74,0xa4, ++0x2d,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x0d,0xbd,0x10,0xf0,0xe4,0x90, ++0x9a,0xc5,0xf0,0x90,0x95,0x01,0x04,0xf0,0xe4,0xfd,0x75,0xf0,0x0a,0xed,0x90,0x90, ++0x00,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x02,0x12, ++0x43,0x5f,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x04,0x12,0x43,0x5f, ++0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x06,0x12,0x43,0x5f,0xe4,0xf0, ++0xa3,0xf0,0x75,0xf0,0x0a,0xed,0x90,0x90,0x08,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0xf0, ++0x74,0x26,0x2d,0xf5,0x82,0xe4,0x34,0x9d,0xf5,0x83,0x74,0x13,0xf0,0x74,0x85,0x2d, ++0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34, ++0x98,0xf5,0x83,0xe4,0xf0,0xed,0x25,0xe0,0x24,0x80,0xf5,0x82,0xe4,0x34,0x93,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x98,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc4,0xf5,0x82,0xe4,0x34,0x99,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x99,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0xc6,0xf5,0x82,0xe4,0x34,0x9a,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0xed,0x25,0xe0,0x24,0x46,0xf5,0x82,0xe4,0x34,0x9b,0xf5, ++0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x86,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4, ++0xf0,0x74,0x46,0x2d,0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x74,0xe6,0x2d, ++0xf5,0x82,0xe4,0x34,0x9c,0xf5,0x83,0xe4,0xf0,0x90,0x41,0xc4,0x93,0xfe,0x74,0x01, ++0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93,0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe, ++0xef,0x13,0xff,0xed,0x25,0xe0,0x24,0xc2,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xee, ++0xf0,0xa3,0xef,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4b,0x12,0x43,0x5f,0x74,0x01, ++0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x4a,0x12,0x43,0x5f,0x74,0x01,0xf0,0x74,0x82, ++0x2d,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0c,0xf0,0x75,0xf0,0x09,0xed,0x90, ++0x96,0x46,0x12,0x43,0x5f,0x74,0xff,0xf0,0xa3,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x44,0x12,0x43,0x5f,0xe4,0xf0,0xa3,0x74,0x0f,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96, ++0x48,0x12,0x43,0x5f,0x74,0x13,0xf0,0x75,0xf0,0x09,0xed,0x90,0x96,0x49,0x12,0x43, ++0x5f,0xe4,0xf0,0xed,0xc3,0x94,0x20,0x50,0x0f,0x74,0x84,0x2d,0xf5,0x82,0xe4,0x34, ++0x04,0xf5,0x83,0x74,0x13,0xf0,0x80,0x0d,0x74,0xa6,0x2d,0xf5,0x82,0xe4,0x34,0x9c, ++0xf5,0x83,0x74,0x13,0xf0,0x0d,0xed,0x64,0x40,0x60,0x03,0x02,0x6e,0xfa,0x22,0x12, ++0x29,0xd9,0xf5,0x59,0xc3,0x94,0x40,0x50,0x15,0x90,0x00,0x02,0x12,0x42,0x20,0xff, ++0x74,0x44,0x25,0x59,0xf5,0x82,0xe4,0x34,0x9a,0xf5,0x83,0xef,0xf0,0x22,0xe5,0x59, ++0xb4,0x40,0x0a,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x96,0x42,0xf0,0x22,0x90,0x00, ++0x04,0x12,0x42,0x20,0xff,0x54,0x3f,0xfe,0xef,0x54,0x80,0xc4,0x13,0x13,0x13,0x54, ++0x01,0xfd,0xaf,0x06,0x02,0x55,0x30,0x12,0x29,0xd9,0x90,0x95,0x01,0xf0,0x22,0x12, ++0x29,0xd9,0xf5,0x22,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12, ++0x29,0xd9,0x90,0x9e,0x6a,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x9e,0x6b,0xf0, ++0xef,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x69,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90, ++0x9e,0x6f,0xf0,0x22,0x90,0x9e,0x6a,0x74,0x01,0xf0,0x90,0x9e,0x6b,0x74,0x03,0xf0, ++0x90,0x9e,0x69,0x74,0x14,0xf0,0x90,0x9e,0x6f,0x74,0x05,0xf0,0x22,0x12,0x29,0xd9, ++0x30,0xe0,0x18,0xc3,0x13,0x54,0x7f,0x90,0x9e,0x6e,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0xff,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0xef,0xf0,0x22,0x90,0x9e,0x6e,0x74,0x07, ++0xf0,0x90,0x9e,0x6c,0xe4,0xf0,0xa3,0x74,0x02,0xf0,0x22,0x90,0x02,0x09,0xe0,0xfd, ++0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x9e,0x50,0xf0,0x90,0x00,0x01,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x9e,0x51,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x9e,0x52,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0xed,0x2f,0x90, ++0x9e,0x53,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed,0x2f,0x90,0x9e, ++0x54,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x3f,0x12,0x43,0x8b, ++0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xfa,0xe5,0xf0,0x24, ++0x00,0xff,0xe4,0x3a,0xfe,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0xee,0x8f, ++0xf0,0x12,0x43,0x19,0x12,0x29,0xd9,0xff,0x60,0x2c,0xb5,0x71,0x16,0x90,0x9e,0x3f, ++0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0x65,0x73,0x70,0x04,0xe5,0x72,0x65, ++0xf0,0x60,0x23,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x90,0x00,0x01,0x12,0x42,0xc2,0xff, ++0xae,0xf0,0x51,0x2b,0x80,0x10,0x90,0x9e,0x3f,0x12,0x43,0x6b,0x12,0x29,0xd9,0x65, ++0x71,0x60,0x03,0x12,0x44,0xc8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x9e,0x42,0xee,0xf0, ++0xa3,0xef,0xf0,0x75,0x71,0x01,0x8e,0x72,0xf5,0x73,0xe4,0xfd,0x7f,0x0b,0x51,0x6d, ++0xe4,0xfd,0x7f,0x02,0x51,0x6d,0x71,0x37,0xe4,0xff,0x71,0x99,0xe4,0xf5,0x75,0x90, ++0x01,0xc9,0xe5,0x75,0xf0,0x90,0x9e,0x42,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d, ++0x44,0xe4,0xf5,0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x9e,0x45,0xed,0xf0,0x90,0x9e,0x44,0xef,0xf0,0xd3,0x94, ++0x07,0x50,0x4f,0xa3,0xe0,0x70,0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80, ++0x17,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e,0x44,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46, ++0x80,0x5a,0x90,0x9e,0x44,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x9e,0x44, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x9e,0x44,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00, ++0x43,0xe0,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x9e,0x44,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12, ++0x4b,0xdb,0xd0,0xd0,0x92,0xaf,0x22,0x7f,0x0b,0x71,0xa6,0xef,0x65,0x74,0x60,0x10, ++0xe5,0x74,0xb4,0x01,0x05,0xe4,0xf5,0x74,0x80,0x03,0x75,0x74,0x01,0x7f,0x01,0x22, ++0x7f,0x00,0x22,0xe5,0x71,0x64,0x01,0x70,0x3f,0x71,0x37,0xbf,0x01,0x04,0x7f,0x01, ++0x71,0x99,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x90,0x00, ++0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4c,0xe3,0x90,0x00,0x46,0xe0,0x54,0xfb, ++0xfd,0x7f,0x46,0x12,0x4c,0xe3,0x7f,0x02,0x71,0xa6,0x8f,0x75,0x90,0x01,0xc9,0xe5, ++0x75,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xda,0x22,0x90,0x01,0xca,0xe5,0x74,0xf0,0xef, ++0x60,0x03,0x12,0x4f,0xda,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e,0xb1, ++0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12,0x4b,0xdb,0x90, ++0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05, ++0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80,0x44,0x90,0x9e, ++0xb1,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0x12,0x4b,0xd3,0x90,0x9e,0xb1,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0,0xfb, ++0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8, ++0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x9e, ++0x56,0xe0,0x90,0x9e,0x40,0xf0,0x90,0x9e,0x57,0xe0,0xf5,0x64,0xa3,0xe0,0xf5,0x65, ++0xe4,0xf5,0x61,0x74,0x59,0x25,0x61,0xf5,0x82,0xe4,0x34,0x9e,0xf5,0x83,0xe0,0xff, ++0x74,0x66,0x25,0x61,0xf8,0xa6,0x07,0x05,0x61,0xe5,0x61,0xb4,0x04,0xe5,0x90,0x9e, ++0x40,0xe0,0x12,0x43,0x94,0x74,0xa4,0x00,0x75,0xcc,0x01,0x74,0xaa,0x02,0x74,0xaa, ++0x03,0x74,0xaa,0x04,0x75,0xcc,0x05,0x75,0x9c,0x80,0x75,0xb2,0x81,0x75,0xcc,0x82, ++0x00,0x00,0x75,0xc8,0xaf,0x69,0xb1,0xd3,0xa1,0xcc,0x90,0x9e,0x40,0xe0,0xff,0xb4, ++0x02,0x08,0x90,0x9e,0x3f,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x9e,0x3f,0xb4,0x03, ++0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x64,0x94,0x08,0x50,0x49, ++0xe4,0xf5,0x61,0x90,0x9e,0x3f,0xe0,0xff,0xe5,0x61,0xc3,0x9f,0x40,0x02,0xa1,0xcc, ++0xc3,0xe5,0x64,0x94,0x01,0x50,0x14,0xe5,0x61,0x25,0x65,0xff,0xc3,0x74,0x03,0x95, ++0x61,0x24,0x66,0xf8,0xe6,0xfd,0x12,0x4c,0xe3,0x80,0x1a,0xc3,0x74,0x03,0x95,0x61, ++0x24,0x66,0xf8,0xe6,0xff,0xe5,0x61,0x7c,0x00,0x25,0x65,0xfd,0xec,0x35,0x64,0x8d, ++0x82,0xf5,0x83,0xef,0xf0,0x05,0x61,0x80,0xba,0xc3,0xe5,0x64,0x94,0x10,0x40,0x02, ++0xa1,0xcc,0x90,0x9e,0x40,0xe0,0x64,0x04,0x60,0x02,0xa1,0xcc,0xaf,0x67,0xfc,0xfd, ++0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x66, ++0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x43,0x46,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x68,0xe4,0xfc, ++0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12, ++0x43,0x46,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x69,0xe4,0xfc,0xfd,0xfe, ++0x12,0x43,0x46,0xa3,0x12,0x2a,0x7f,0x90,0x9e,0x41,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0xaf,0x65,0xae,0x64,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x68,0x7f,0x00, ++0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62,0xaf,0x63,0xfe,0x12,0x37,0x54, ++0x80,0x1a,0xe5,0x68,0x7f,0x00,0xfe,0xef,0x25,0x69,0xf5,0x63,0xe4,0x3e,0xf5,0x62, ++0xaf,0x63,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0, ++0x92,0xaf,0x22,0x8f,0x6a,0xe4,0x90,0x9e,0x45,0xf0,0xe5,0x6a,0x14,0xfe,0x90,0x9e, ++0x45,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45, ++0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x6a,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,0x90,0x9e, ++0x45,0xe5,0x6a,0xf0,0x90,0x9e,0x45,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,0xff,0x04, ++0xfd,0x12,0x34,0xb7,0x90,0x9e,0x45,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x6a,0x7f,0xff, ++0x02,0x34,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x5b,0x75,0x5c,0x04, ++0xf5,0x5d,0xf5,0x5f,0xf5,0x60,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef, ++0x2e,0xf5,0x5e,0x30,0xe0,0x08,0x75,0x59,0x00,0x75,0x5a,0x80,0x80,0x05,0xe4,0xf5, ++0x59,0xf5,0x5a,0xe5,0x5e,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25,0x5b,0xf5, ++0x5b,0xad,0x5a,0xe5,0x5b,0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x90,0x9e,0x56,0xf0,0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0xfe,0xe5,0x5b,0x2d,0x24,0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00, ++0xff,0xe4,0x3e,0x90,0x9e,0x57,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x5b,0x25,0x5a, ++0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x55,0x2f,0xf5, ++0x82,0xe4,0x34,0x9e,0xf5,0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x91,0x47,0xef,0x70, ++0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3,0xe5,0x60,0x94,0xe8,0xe5,0x5f,0x94,0x03, ++0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x60,0xe5,0x60,0x70, ++0x02,0x05,0x5f,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0, ++0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e, ++0xe5,0x5b,0xb4,0x78,0x23,0xe4,0xf5,0x5b,0x05,0x5e,0xe5,0x5a,0x64,0x80,0x45,0x59, ++0x70,0x06,0xf5,0x59,0xf5,0x5a,0x80,0x06,0x75,0x59,0x00,0x75,0x5a,0x80,0xe5,0x5e, ++0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x5b,0xf5,0x5b,0xe5,0x5d, ++0x15,0x5d,0x70,0x02,0x15,0x5c,0xe5,0x5d,0x45,0x5c,0x60,0x02,0xc1,0x61,0xd0,0xd0, ++0x92,0xaf,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0x22,0xe4,0x90,0x9e,0x5d,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80,0x02, ++0x4c,0xe3,0x8e,0x59,0x8f,0x5a,0x8b,0x5b,0x8a,0x5c,0x89,0x5d,0xe4,0x90,0x9e,0x34, ++0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4b,0xdb,0xe5,0x59,0x54,0x03,0xff,0x90,0x00, ++0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0,0x54,0x7f,0xf0, ++0x12,0x4b,0xdb,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x9e,0x34,0xe0,0xc3,0x94, ++0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x9e,0x34,0xe0,0xc3,0x94,0x64,0x50, ++0x10,0x90,0x00,0x30,0xe0,0xab,0x5b,0xaa,0x5c,0xa9,0x5d,0x12,0x42,0x4d,0x7f,0x01, ++0x22,0x7f,0x00,0x22,0xe4,0xf5,0x74,0x22,0x90,0x9e,0x60,0xe0,0x90,0x9e,0x0f,0xf0, ++0x22,0xef,0x70,0x03,0x02,0x79,0x89,0x90,0x9e,0x0f,0xe0,0x60,0x03,0x02,0x7d,0x54, ++0x90,0x9d,0xfb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x9d,0xa7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xab,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x9d,0xaf,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xb3,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x9d,0xb7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x9d,0xbb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xbf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc3,0x12,0x43,0x53,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xc7,0x12,0x43, ++0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d, ++0xcb,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x9d,0xcf,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xd7,0x12,0x43,0x53,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdb,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xdf, ++0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x9d,0xe3,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x9d,0xe7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x9d,0xeb,0x12,0x43,0x53,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x9d,0xef,0x12,0x43,0x53,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x90,0x9d,0xf3,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x90, ++0x9d,0xf7,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x9e,0x0f,0x74,0x01,0xf0,0x22,0x90,0x9e,0x0f,0xe0,0x64,0x01,0x60, ++0x02,0xa1,0x54,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xfb,0x12,0x2a,0x7f, ++0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xa7,0x12,0x2a,0x7f,0x7f,0x5c,0x7e, ++0x08,0x12,0x27,0xde,0x90,0x9d,0xab,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x9d,0xaf,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d, ++0xb3,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xb7,0x12,0x2a, ++0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbb,0x12,0x2a,0x7f,0x7f,0x7c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xbf,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x9d,0xc3,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x9d,0xc7,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcb,0x12, ++0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xcf,0x12,0x2a,0x7f,0x7f, ++0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xd3,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x9d,0xd7,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x9d,0xdb,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xdf, ++0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe3,0x12,0x2a,0x7f, ++0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x9d,0xe7,0x12,0x2a,0x7f,0x7f,0x04,0x7e, ++0x0c,0x12,0x27,0xde,0x90,0x9d,0xeb,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x27, ++0xde,0x90,0x9d,0xef,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9d, ++0xf3,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x9d,0xf7,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e, ++0xa1,0x12,0x43,0x53,0xed,0x44,0xc0,0xfd,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90, ++0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e, ++0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x6c, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f, ++0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4, ++0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25, ++0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b, ++0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x04, ++0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e, ++0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a,0x7f, ++0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90, ++0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f, ++0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c, ++0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a,0x7f, ++0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a, ++0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xe4,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a, ++0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xef,0x44,0x11,0xff,0xec,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c, ++0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12, ++0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc, ++0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53,0xed,0x44,0x10,0xfd, ++0xec,0x44,0x01,0xfc,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x04,0x7e, ++0x08,0x12,0x27,0xde,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43,0x53, ++0xef,0x54,0xf0,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12,0x43, ++0x53,0xef,0x44,0x01,0xff,0xec,0x90,0x9e,0xa1,0x12,0x2a,0x7f,0x90,0x9e,0xa1,0x12, ++0x43,0x53,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x2f,0xd9,0xe4, ++0x90,0x9e,0x0f,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x9e,0x1e,0xf0,0xe0, ++0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x59,0xc2,0xaf,0x90,0x00, ++0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4c,0xe3,0x7d,0x40,0x7f,0x01,0x12,0x36, ++0xaf,0xe5,0x59,0x24,0xff,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4c,0xe3,0x90, ++0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x9e,0x1e,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x9e, ++0x27,0xf0,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x28,0xf0,0x90,0x9e,0x26,0xf0,0x90,0x9e, ++0x29,0xf0,0x90,0x9e,0x10,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x9e, ++0x15,0xf0,0x90,0x9e,0x1a,0xf0,0x90,0x9e,0x1c,0xf0,0x90,0x9e,0x2e,0xf0,0x90,0x9e, ++0x1f,0xf0,0x90,0x9e,0x1b,0xf0,0x90,0x9e,0x14,0xf0,0x90,0x00,0x51,0xe0,0x44,0xc0, ++0xfd,0x7f,0x51,0x02,0x4c,0xe3,0x90,0x9e,0x2e,0xe0,0x64,0x01,0x60,0x08,0x90,0x9e, ++0x1c,0xe0,0x60,0x02,0xc1,0xbd,0x90,0x9e,0x10,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0, ++0x04,0xf0,0x80,0x3b,0x90,0x9e,0x11,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0, ++0xe4,0x80,0x28,0x90,0x9e,0x12,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4, ++0x90,0x9e,0x11,0xf0,0x80,0x15,0x90,0x9e,0x13,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0, ++0x04,0xf0,0xe4,0x90,0x9e,0x12,0xf0,0x90,0x9e,0x11,0xf0,0x90,0x9e,0x10,0xf0,0x90, ++0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x9e,0x24,0xe0,0xc3, ++0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x9e,0x25,0xe0,0xc3,0x94,0xff, ++0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x9e,0x26,0xe0,0xc3,0x94,0xff,0x50, ++0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e,0x25,0xf0,0x90,0x9e,0x24,0xf0,0x90,0x00,0x44, ++0xe0,0x30,0xe3,0x32,0x90,0x9e,0x27,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x24,0x90,0x9e,0x28,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x11,0x90,0x9e,0x29,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x9e, ++0x28,0xf0,0x90,0x9e,0x27,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x17,0xed, ++}; ++ ++#endif ++ ++// ===================8723========================================= ++u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x39,0x00,0x01,0x00,0x09,0x09,0x16,0x47,0x80,0x3f,0x00,0x00, ++0x29,0x29,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x74,0xc9,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x59,0xd0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x73,0xab,0x00,0x00,0x00,0x00,0x00,0x02,0x67,0xfe,0x00,0x00, ++0x05,0x04,0x03,0x02,0x00,0x03,0x06,0x05,0x04,0x03,0x00,0x04,0x06,0x05,0x04,0x02, ++0x00,0x04,0x08,0x07,0x06,0x04,0x00,0x06,0x0a,0x09,0x08,0x06,0x00,0x08,0x0a,0x09, ++0x08,0x04,0x00,0x08,0x0a,0x09,0x08,0x02,0x00,0x08,0x0a,0x09,0x08,0x00,0x00,0x08, ++0x12,0x11,0x10,0x08,0x00,0x10,0x1a,0x19,0x18,0x10,0x00,0x18,0x22,0x21,0x20,0x18, ++0x00,0x20,0x22,0x21,0x20,0x10,0x00,0x20,0x22,0x21,0x20,0x08,0x00,0x20,0x22,0x21, ++0x1c,0x08,0x00,0x20,0x22,0x21,0x14,0x08,0x00,0x20,0x22,0x20,0x18,0x08,0x00,0x20, ++0x31,0x30,0x20,0x10,0x00,0x30,0x31,0x30,0x18,0x00,0x00,0x30,0x31,0x2f,0x10,0x10, ++0x00,0x30,0x31,0x2c,0x10,0x10,0x00,0x30,0x31,0x28,0x10,0x00,0x00,0x30,0x31,0x20, ++0x10,0x00,0x00,0x30,0x31,0x10,0x10,0x00,0x00,0x30,0x05,0x05,0x05,0x05,0x05,0x05, ++0x05,0x07,0x07,0x07,0x08,0x0a,0x05,0x05,0x05,0x07,0x07,0x0a,0x0d,0x0e,0x05,0x05, ++0x07,0x07,0x08,0x0c,0x14,0x14,0x05,0x05,0x05,0x05,0x09,0x09,0x09,0x09,0x0c,0x0e, ++0x13,0x13,0x09,0x09,0x0a,0x0b,0x0d,0x11,0x13,0x13,0x09,0x09,0x09,0x09,0x0c,0x14, ++0x15,0x15,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05, ++0x05,0x06,0x06,0x06,0x06,0x06,0x05,0x05,0x06,0x06,0x06,0x06,0x06,0x06,0x05,0x05, ++0x05,0x05,0x09,0x09,0x09,0x09,0x0b,0x0d,0x10,0x12,0x05,0x09,0x0a,0x0c,0x0d,0x0e, ++0x10,0x12,0x09,0x09,0x0e,0x0e,0x10,0x10,0x12,0x12,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x24,0x26,0x2a,0x18,0x1a,0x1d,0x1f,0x21,0x27,0x29,0x2a,0x00,0x00, ++0x00,0x1f,0x23,0x28,0x2a,0x2c,0x00,0x04,0x00,0x04,0x00,0x08,0x00,0x10,0x00,0x18, ++0x00,0x24,0x00,0x30,0x00,0x48,0x00,0x60,0x00,0x90,0x00,0xc0,0x00,0xd8,0x00,0x50, ++0x00,0x78,0x00,0xa0,0x00,0xc8,0x01,0x40,0x01,0x90,0x01,0xe0,0x02,0x30,0x01,0x2c, ++0x01,0x40,0x01,0xe0,0x02,0xd0,0x03,0xe8,0x04,0xb0,0x06,0x40,0x07,0xd0,0x00,0x02, ++0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x0c,0x00,0x12,0x00,0x18,0x00,0x24,0x00,0x30, ++0x00,0x48,0x00,0x60,0x00,0x6c,0x00,0x28,0x00,0x3c,0x00,0x50,0x00,0x64,0x00,0xa0, ++0x00,0xc8,0x00,0xf0,0x01,0x18,0x00,0x64,0x00,0xa0,0x00,0xf0,0x01,0x68,0x01,0xf4, ++0x02,0x58,0x03,0x20,0x03,0xe8,0x00,0x00,0x00,0x00,0x01,0x02,0x03,0x04,0x05,0x06, ++0x07,0x08,0x01,0x02,0x03,0x04,0x08,0x0f,0x23,0x3c,0x05,0x06,0x07,0x0f,0x19,0x32, ++0x4b,0x64,0x01,0x01,0x01,0x01,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x01,0x02, ++0x03,0x04,0x05,0x06,0x07,0x08,0x05,0x06,0x07,0x08,0x09,0x0a,0x0b,0x0c,0x22,0x1f, ++0x1e,0x18,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x8f,0x17,0x74,0x42,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x20,0xf0,0x74,0x84,0x25,0x17, ++0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x97,0x54,0xf0,0xe0,0xfb, ++0x54,0x1f,0xff,0xa3,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe0,0xfe,0x90,0x97,0x57,0xf0,0xe5,0x17,0x25,0xe0,0x24,0x81, ++0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x58,0xcd,0xf0, ++0xa3,0xed,0xf0,0xe5,0x17,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0xfd,0xa3,0xe0,0x90,0x97,0x5a,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0xc3,0x9e,0x40, ++0x03,0x02,0x43,0x56,0x90,0x01,0xc5,0x74,0x20,0xf0,0x90,0x97,0x55,0xe0,0xff,0x74, ++0xa5,0x25,0x17,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0xef,0x04,0x90,0x97, ++0x56,0xf0,0x90,0x97,0x57,0xe0,0xff,0x90,0x97,0x56,0xe0,0xfe,0xd3,0x9f,0x40,0x03, ++0x02,0x43,0xa0,0xee,0xc3,0x94,0x10,0x40,0x21,0xee,0x24,0xf0,0xff,0x74,0x01,0x7e, ++0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97, ++0x58,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x70,0x27,0x90,0x97,0x56,0xe0,0xff,0xc3, ++0x94,0x10,0x50,0x59,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x5a,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60, ++0x3c,0x90,0x97,0x56,0xe0,0xb4,0x11,0x0d,0x90,0x97,0x59,0xe0,0x30,0xe7,0x06,0x90, ++0x97,0x56,0x74,0x17,0xf0,0x90,0x97,0x56,0xe0,0xff,0x64,0x13,0x60,0x04,0xef,0xb4, ++0x12,0x0d,0x90,0x97,0x58,0xe0,0x30,0xe0,0x06,0x90,0x97,0x56,0x74,0x18,0xf0,0x90, ++0x97,0x56,0xe0,0x90,0x97,0x55,0xf0,0x90,0x97,0x54,0xf0,0x80,0x53,0x90,0x97,0x56, ++0xe0,0x04,0xf0,0x02,0x42,0xb2,0x90,0x97,0x57,0xe0,0xf9,0x90,0x97,0x55,0xe0,0xff, ++0x69,0x60,0x03,0x02,0x43,0xe8,0x90,0x01,0xc5,0x74,0x40,0xf0,0x74,0xa5,0x25,0x17, ++0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24, ++0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xb4,0x01,0x14,0xeb,0x30,0xe6,0x06, ++0x90,0x97,0x54,0xe0,0xff,0x22,0x90,0x97,0x55,0xe0,0x44,0x40,0x90,0x97,0x54,0xf0, ++0x90,0x97,0x55,0xe0,0xff,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13, ++0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34, ++0x92,0xf5,0x83,0x12,0x1d,0xa9,0x80,0x71,0x90,0x97,0x55,0xe0,0xd3,0x99,0x40,0x69, ++0x90,0x01,0xc5,0x74,0x60,0xf0,0x90,0x97,0x57,0xe0,0xff,0x74,0xa5,0x25,0x17,0xf5, ++0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x90,0x97,0x55,0xef,0xf0,0x90,0x97,0x54, ++0xf0,0xfb,0xa3,0xe0,0xff,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83, ++0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd,0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34, ++0x41,0xf5,0x83,0x74,0x01,0x93,0x2d,0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13, ++0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34, ++0x92,0xf5,0x83,0x12,0x1d,0xa9,0xaf,0x03,0x22,0x74,0x01,0x25,0x17,0xf5,0x82,0xe4, ++0x34,0x92,0xf5,0x83,0xe4,0xf0,0x90,0x97,0x54,0xe0,0x44,0x80,0xff,0x74,0x84,0x25, ++0x17,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xef,0xf0,0x22,0xef,0x14,0x60,0x20,0x14, ++0x60,0x4b,0x24,0x02,0x70,0x78,0x90,0x97,0x69,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0, ++0x44,0x0c,0xf0,0x90,0x00,0x47,0xe0,0x44,0x08,0xf0,0x90,0x00,0x45,0x80,0x5b,0xe4, ++0x90,0x97,0x69,0xf0,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3, ++0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90, ++0x00,0x45,0xe0,0x44,0xef,0xf0,0xe0,0x54,0xef,0xf0,0xa3,0x80,0x2d,0x90,0x97,0x69, ++0x74,0x01,0xf0,0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0, ++0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90,0x00, ++0x45,0xe0,0x44,0x20,0xf0,0xe0,0x44,0x10,0xf0,0xa3,0xe0,0x44,0x10,0xf0,0x22,0xe4, ++0xf5,0x61,0x22,0x02,0x7f,0x69,0x02,0x7f,0x70,0x74,0x45,0x90,0x01,0xc4,0xf0,0xa3, ++0x74,0x09,0xf0,0xe4,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xff,0xc3,0x94,0x20, ++0x40,0x03,0x02,0x4e,0x3a,0xef,0x75,0xf0,0x08,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34, ++0x93,0xf5,0x83,0xe0,0x64,0x01,0x60,0x03,0x02,0x4e,0x31,0x90,0x97,0x3a,0xe0,0x25, ++0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfc,0xa3,0xe0,0xd3,0x94, ++0x00,0xec,0x94,0x00,0x50,0x03,0x02,0x4e,0x31,0xef,0x75,0xf0,0x0a,0xa4,0x24,0x00, ++0xf9,0x74,0x90,0x35,0xf0,0xfa,0x7b,0x01,0x8b,0x13,0xf5,0x14,0x89,0x15,0x90,0x97, ++0x3a,0xe0,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xfd,0xa3, ++0xe0,0x90,0x97,0x46,0xcd,0xf0,0xa3,0xed,0xf0,0xef,0x25,0xe0,0x24,0x63,0xf5,0x82, ++0xe4,0x34,0x94,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x97,0x48,0xcf,0xf0,0xa3,0xef, ++0xf0,0x90,0x00,0x02,0x12,0x66,0x20,0xff,0xae,0xf0,0x12,0x65,0xf5,0x2f,0xff,0xe5, ++0xf0,0x3e,0x90,0x97,0x4f,0xf0,0xa3,0xef,0xf0,0x90,0x00,0x06,0x12,0x66,0x20,0xff, ++0xae,0xf0,0x90,0x00,0x04,0x12,0x66,0x20,0x2f,0xff,0xe5,0xf0,0x3e,0x90,0x97,0x4d, ++0xf0,0xa3,0xef,0xf0,0x90,0x00,0x08,0x12,0x66,0x20,0xff,0x90,0x97,0x4b,0xe5,0xf0, ++0xf0,0xa3,0xef,0xf0,0x90,0x97,0x3a,0xe0,0xfe,0x24,0x84,0xf5,0x82,0xe4,0x34,0x04, ++0xf5,0x83,0xe0,0x54,0x3f,0x90,0x97,0x3c,0xf0,0xe0,0xfd,0x54,0x1f,0xa3,0xf0,0xee, ++0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0x90,0x97, ++0x51,0xf0,0x90,0x97,0x3a,0xe0,0xfb,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83, ++0xe0,0xc3,0x94,0x05,0x40,0x03,0x02,0x49,0xc2,0x90,0x97,0x51,0xe0,0xfe,0x90,0x97, ++0x3d,0xe0,0x9e,0x40,0x13,0x90,0x97,0x51,0xe0,0x90,0x97,0x3d,0xf0,0xed,0x54,0x40, ++0xfd,0x90,0x97,0x3c,0xf0,0xee,0x4d,0xf0,0x90,0x04,0xfd,0xe0,0x64,0x01,0x70,0x28, ++0x90,0x97,0x3d,0xe0,0xff,0x90,0x41,0x4a,0x93,0xfe,0x74,0x23,0x2b,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0xe0,0xc3,0x9e,0x40,0x06,0xef,0x90,0x41,0x12,0x80,0x32,0x90, ++0x97,0x3d,0xe0,0x90,0x41,0x2e,0x80,0x29,0x90,0x97,0x3d,0xe0,0xff,0x90,0x41,0x4a, ++0x93,0xfe,0x90,0x97,0x3a,0xe0,0x24,0x23,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0, ++0xc3,0x9e,0x40,0x06,0xef,0x90,0x40,0xda,0x80,0x07,0x90,0x97,0x3d,0xe0,0x90,0x40, ++0xf6,0x93,0x90,0x97,0x4a,0xf0,0x90,0x97,0x4a,0xe0,0x75,0xf0,0x06,0xa4,0x24,0x50, ++0xf9,0x74,0x40,0x35,0xf0,0x75,0x10,0xff,0xf5,0x11,0x89,0x12,0x90,0x97,0x3c,0xe0, ++0x90,0x41,0xf2,0x93,0xff,0xd3,0x90,0x97,0x49,0xe0,0x9f,0x90,0x97,0x48,0xe0,0x94, ++0x00,0x40,0x0d,0x90,0x97,0x3a,0xe0,0xff,0xe4,0xfd,0x12,0x5f,0x6d,0x02,0x4d,0xc7, ++0x90,0x97,0x3a,0xe0,0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5, ++0x83,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x97,0x3e,0x12, ++0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb, ++0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x1c, ++0xd6,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0xf5,0xfd,0xac,0xf0, ++0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f, ++0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9, ++0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x01,0x12, ++0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x02,0x12,0x66, ++0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97, ++0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3, ++0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12, ++0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90, ++0x00,0x04,0x12,0x66,0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec, ++0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9, ++0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab,0x10, ++0xaa,0x11,0xa9,0x12,0x90,0x00,0x03,0x12,0x1c,0xef,0xff,0x7e,0x00,0xab,0x13,0xaa, ++0x14,0xa9,0x15,0x90,0x00,0x06,0x12,0x66,0x20,0xfd,0xac,0xf0,0x12,0x1d,0x1c,0xe4, ++0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f,0xff,0xea,0x3e,0xfe, ++0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9,0x90,0x97,0x3e,0xe0, ++0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02, ++0xc0,0x03,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x04,0x12,0x1c,0xef,0xff,0x7e, ++0x00,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x08,0x12,0x66,0x20,0xfd,0xac,0xf0, ++0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb,0x2f, ++0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d,0xa9, ++0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x05,0x12,0x1c,0xef,0xff,0x7e,0x00,0x90, ++0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0x90,0x97,0x3e, ++0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66,0xa4,0x90, ++0x97,0x3e,0x40,0x50,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xc0, ++0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00,0x05, ++0x12,0x1c,0xef,0xff,0x7e,0x00,0x90,0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d, ++0x1c,0xab,0x07,0xaa,0x06,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xc3,0xef,0x9b, ++0xff,0xee,0x9a,0xfe,0xed,0x94,0x00,0xfd,0xec,0x94,0x00,0xfc,0x90,0x97,0x3e,0x12, ++0x1d,0xa9,0x80,0x07,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0x90,0x97,0x3e,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x97,0x3a,0xe0,0x25,0xe0,0x25, ++0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0x90,0x97,0x3c, ++0xe0,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74, ++0x01,0x93,0xff,0xe4,0xfc,0xfd,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0, ++0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66,0xa4,0x40,0x0b,0x90,0x97,0x3a,0xe0,0xff,0x12, ++0x42,0x20,0x02,0x4d,0x3e,0x90,0x97,0x3c,0xe0,0x25,0xe0,0x24,0x9e,0xf5,0x82,0xe4, ++0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93,0xff,0xe4,0xfc,0xfd,0x90,0x97, ++0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc3,0x12,0x66,0xa4, ++0x40,0x03,0x02,0x4d,0x3e,0x90,0x97,0x3a,0xe0,0xff,0x7d,0x01,0x12,0x5f,0x6d,0x02, ++0x4d,0x3e,0x90,0x97,0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83, ++0xe0,0x64,0x05,0x60,0x03,0x02,0x4b,0x8e,0x90,0x04,0xb3,0xe0,0x64,0x01,0x70,0x03, ++0x02,0x4b,0x8e,0x90,0x93,0x62,0xe0,0xfe,0xb4,0x03,0x0b,0x90,0x97,0x3d,0xe0,0xc3, ++0x94,0x19,0x40,0x3d,0x80,0x2e,0xee,0xb4,0x02,0x0b,0x90,0x97,0x3d,0xe0,0xc3,0x94, ++0x11,0x40,0x2e,0x80,0x1f,0x90,0x93,0x62,0xe0,0xfe,0xb4,0x01,0x0b,0x90,0x97,0x3d, ++0xe0,0xc3,0x94,0x0a,0x40,0x1b,0x80,0x0c,0xee,0x70,0x11,0x90,0x97,0x3d,0xe0,0xc3, ++0x94,0x03,0x40,0x0d,0x90,0x95,0x43,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x95,0x43, ++0xf0,0x74,0x23,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xc3,0x94,0x30, ++0x50,0x03,0x02,0x4b,0x2d,0x90,0x95,0x43,0xe0,0x64,0x01,0x60,0x03,0x02,0x4b,0x2d, ++0x90,0x97,0x3a,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x64,0x0a, ++0x60,0x56,0x90,0x97,0x3a,0xe0,0xfe,0xef,0x24,0x05,0xfd,0xe4,0x33,0xfc,0x74,0x21, ++0x2e,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xff,0xd3,0x9d,0xec,0x64,0x80,0xf8, ++0x74,0x80,0x98,0x50,0x33,0xef,0x24,0x05,0xfd,0xe4,0x33,0xfc,0x74,0x23,0x2e,0xf5, ++0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xd3,0x9d,0xec,0x64,0x80,0xf8,0x74,0x80,0x98, ++0x50,0x16,0x90,0x97,0x3a,0xe0,0x24,0x84,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0, ++0xff,0x90,0x97,0x3d,0xe0,0x6f,0x60,0x56,0x90,0x97,0x3a,0xe0,0x24,0x23,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0xff,0xd3,0x94,0x46,0x40,0x08,0x90,0x97,0x52,0x74, ++0x05,0xf0,0x80,0x11,0xef,0xd3,0x94,0x3c,0x90,0x97,0x52,0x40,0x05,0x74,0x03,0xf0, ++0x80,0x03,0x74,0x01,0xf0,0x90,0x97,0x3a,0xe0,0xff,0x24,0x23,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0xe0,0xfe,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xee, ++0xf0,0x90,0x97,0x3a,0xe0,0x24,0x44,0xf5,0x82,0xe4,0x34,0x95,0x80,0x2f,0x90,0x97, ++0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x74,0x44, ++0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x04,0xf0,0x80,0x14,0xe4,0x90,0x97, ++0x52,0xf0,0x90,0x97,0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4, ++0xf0,0x90,0x97,0x3d,0xe0,0xff,0x90,0x97,0x3a,0xe0,0xfe,0x24,0x84,0xf5,0x82,0xe4, ++0x34,0x96,0xf5,0x83,0xef,0xf0,0xee,0x30,0xe0,0x1e,0x90,0x97,0x52,0xe0,0xc4,0x54, ++0xf0,0xf0,0x90,0x97,0x3a,0xe0,0xc3,0x13,0xff,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04, ++0xf5,0x83,0xe0,0x54,0x0f,0x02,0x4d,0x21,0x90,0x97,0x3a,0xe0,0xc3,0x13,0xff,0x24, ++0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0xf0,0x02,0x4d,0x21,0x90,0x97, ++0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x64,0x06,0x60,0x03, ++0x02,0x4d,0x3e,0x90,0x04,0xb3,0xe0,0x64,0x01,0x70,0x03,0x02,0x4d,0x3e,0x90,0x97, ++0x3e,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0x90,0x42,0x13,0xe4,0x93,0xff,0x7e,0x00, ++0x90,0x97,0x46,0xe0,0xfc,0xa3,0xe0,0xfd,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0x90,0x97, ++0x42,0x12,0x1d,0xa9,0xe4,0x90,0x97,0x3b,0xf0,0x90,0x97,0x3e,0xe0,0xf8,0xa3,0xe0, ++0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xab, ++0x13,0xaa,0x14,0xa9,0x15,0x90,0x97,0x3b,0xe0,0xff,0x75,0xf0,0x02,0xa4,0xf5,0x82, ++0x85,0xf0,0x83,0x12,0x66,0x20,0xfd,0xac,0xf0,0xef,0x90,0x42,0x0e,0x93,0xff,0x7e, ++0x00,0x12,0x1d,0x1c,0xe4,0xfc,0xfd,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xeb, ++0x2f,0xff,0xea,0x3e,0xfe,0xed,0x39,0xfd,0xec,0x38,0xfc,0x90,0x97,0x3e,0x12,0x1d, ++0xa9,0x90,0x97,0x42,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90, ++0x97,0x3e,0xe0,0xf8,0xa3,0xe0,0xf9,0xa3,0xe0,0xfa,0xa3,0xe0,0xfb,0xd3,0x12,0x66, ++0xa4,0x50,0x0e,0x90,0x97,0x3b,0xe0,0x04,0xf0,0xe0,0x64,0x05,0x60,0x03,0x02,0x4b, ++0xd9,0x90,0x97,0x3b,0xe0,0xc3,0x13,0xf0,0x90,0x97,0x52,0xe0,0xff,0xb4,0x01,0x0d, ++0x90,0x97,0x3b,0xe0,0x70,0x5d,0x90,0x97,0x52,0x04,0xf0,0x80,0x5b,0xef,0xb4,0x03, ++0x1d,0x90,0x97,0x3b,0xe0,0xff,0x70,0x08,0x90,0x97,0x52,0x74,0x03,0xf0,0x80,0x48, ++0xef,0xb4,0x01,0x08,0x90,0x97,0x52,0x74,0x01,0xf0,0x80,0x3c,0x80,0x35,0x90,0x97, ++0x52,0xe0,0x64,0x05,0x70,0x32,0x90,0x97,0x3b,0xe0,0xff,0x70,0x08,0x90,0x97,0x52, ++0x74,0x05,0xf0,0x80,0x0f,0xef,0x90,0x97,0x52,0xb4,0x01,0x05,0x74,0x03,0xf0,0x80, ++0x03,0x74,0x01,0xf0,0xd3,0x90,0x97,0x49,0xe0,0x94,0x03,0x90,0x97,0x48,0xe0,0x94, ++0x00,0x40,0x05,0xe4,0x90,0x97,0x52,0xf0,0xd3,0x90,0x97,0x49,0xe0,0x94,0x03,0x90, ++0x97,0x48,0xe0,0x94,0x00,0x40,0x05,0xe4,0x90,0x97,0x52,0xf0,0x90,0x97,0x3a,0xe0, ++0xff,0x30,0xe0,0x1a,0x90,0x97,0x52,0xe0,0xc4,0x54,0xf0,0xf0,0xef,0xc3,0x13,0xff, ++0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54,0x0f,0x80,0x13,0x90,0x97, ++0x3a,0xe0,0xc3,0x13,0xff,0x24,0xa4,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0xf0,0xf0,0x74,0xa4,0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xc0,0x83,0xc0,0x82, ++0xe0,0xff,0x90,0x97,0x52,0xe0,0xfe,0xef,0x4e,0xd0,0x82,0xd0,0x83,0xf0,0x90,0x97, ++0x3a,0xe0,0xff,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0xd3,0x94,0x05, ++0x50,0x0f,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe0,0x04,0xf0,0x80, ++0x0f,0x90,0x97,0x3a,0xe0,0x24,0x64,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0, ++0x90,0x97,0x3a,0xe0,0xff,0x24,0x84,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe0,0x54, ++0x1f,0xc3,0x94,0x09,0x50,0x05,0x90,0x92,0x00,0x80,0x11,0x74,0x84,0x2f,0xf5,0x82, ++0xe4,0x34,0x04,0xf5,0x83,0xe0,0x90,0x92,0x00,0x20,0xe2,0x05,0x74,0x08,0xf0,0x80, ++0x03,0x74,0x04,0xf0,0x90,0x97,0x3a,0xe0,0x60,0x0d,0x90,0x96,0xa4,0xe0,0xff,0x90, ++0x92,0x00,0xe0,0xc3,0x9f,0x50,0x08,0x90,0x92,0x00,0xe0,0x90,0x96,0xa4,0xf0,0x90, ++0x96,0xa4,0xe0,0x90,0x04,0x80,0xf0,0xab,0x13,0xaa,0x14,0xa9,0x15,0xe4,0xf5,0xf0, ++0x12,0x66,0x58,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x02,0xe4,0xf5,0xf0,0x12, ++0x66,0x77,0x90,0x00,0x04,0xe4,0xf5,0xf0,0x12,0x66,0x77,0x90,0x00,0x06,0xe4,0xf5, ++0xf0,0x12,0x66,0x77,0x90,0x00,0x08,0xe4,0xf5,0xf0,0x12,0x66,0x77,0x90,0x97,0x3a, ++0xe0,0xff,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0xef,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0xef,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0,0x02,0x45,0x18,0x22,0xef,0x70,0x03,0x02,0x50, ++0xa3,0x90,0x97,0x2d,0xe0,0x60,0x03,0x02,0x54,0xe5,0x90,0x97,0x19,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c, ++0x7e,0x08,0x12,0x33,0xd8,0x90,0x96,0xc5,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe, ++0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x44,0x7e,0x08,0x12,0x33,0xd8, ++0x90,0x96,0xc9,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81, ++0x56,0x12,0x1d,0xa9,0x7f,0x5c,0x7e,0x08,0x12,0x33,0xd8,0x90,0x96,0xcd,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f, ++0x6c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xd1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x33, ++0xd8,0x90,0x96,0xd5,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90, ++0x81,0x56,0x12,0x1d,0xa9,0x7f,0x74,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xd9,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9, ++0x7f,0x78,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xdd,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3, ++0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x7c,0x7e,0x0e,0x12, ++0x33,0xd8,0x90,0x96,0xe1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff, ++0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xe5, ++0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d, ++0xa9,0x7f,0x84,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xe9,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x88,0x7e,0x0e, ++0x12,0x33,0xd8,0x90,0x96,0xed,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0, ++0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96, ++0xf1,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12, ++0x1d,0xa9,0x7f,0xd0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x96,0xf5,0xe0,0xfc,0xa3,0xe0, ++0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xd4,0x7e, ++0x0e,0x12,0x33,0xd8,0x90,0x96,0xf9,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3, ++0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xd8,0x7e,0x0e,0x12,0x33,0xd8,0x90, ++0x96,0xfd,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56, ++0x12,0x1d,0xa9,0x7f,0xdc,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x97,0x01,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xe0, ++0x7e,0x0e,0x12,0x33,0xd8,0x90,0x97,0x05,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe, ++0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0xec,0x7e,0x0e,0x12,0x33,0xd8, ++0x90,0x97,0x09,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81, ++0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x0d,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f, ++0x04,0x7e,0x0d,0x12,0x33,0xd8,0x90,0x97,0x11,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33, ++0xd8,0x90,0x97,0x15,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90, ++0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x2d,0x74, ++0x01,0xf0,0x22,0x90,0x97,0x2d,0xe0,0x64,0x01,0x60,0x03,0x02,0x54,0xe5,0x7f,0x8c, ++0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x19,0x12,0x1d,0xa9,0x7f,0x44,0x7e,0x08,0x12, ++0x2b,0x13,0x90,0x96,0xc5,0x12,0x1d,0xa9,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x13,0x90, ++0x96,0xc9,0x12,0x1d,0xa9,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xcd,0x12, ++0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xd1,0x12,0x1d,0xa9,0x7f, ++0x74,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xd5,0x12,0x1d,0xa9,0x7f,0x78,0x7e,0x0e, ++0x12,0x2b,0x13,0x90,0x96,0xd9,0x12,0x1d,0xa9,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x13, ++0x90,0x96,0xdd,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe1, ++0x12,0x1d,0xa9,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe5,0x12,0x1d,0xa9, ++0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xe9,0x12,0x1d,0xa9,0x7f,0x8c,0x7e, ++0x0e,0x12,0x2b,0x13,0x90,0x96,0xed,0x12,0x1d,0xa9,0x7f,0xd0,0x7e,0x0e,0x12,0x2b, ++0x13,0x90,0x96,0xf1,0x12,0x1d,0xa9,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96, ++0xf5,0x12,0x1d,0xa9,0x7f,0xd8,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xf9,0x12,0x1d, ++0xa9,0x7f,0xdc,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x96,0xfd,0x12,0x1d,0xa9,0x7f,0xe0, ++0x7e,0x0e,0x12,0x2b,0x13,0x90,0x97,0x01,0x12,0x1d,0xa9,0x7f,0xec,0x7e,0x0e,0x12, ++0x2b,0x13,0x90,0x97,0x05,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x13,0x90, ++0x97,0x09,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x13,0x90,0x97,0x0d,0x12, ++0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x13,0x90,0x97,0x11,0x12,0x1d,0xa9,0x7f, ++0x04,0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x15,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x08, ++0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0, ++0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xed,0x44,0xc0,0xfd,0xec,0x90,0x97,0xa3,0x12, ++0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff, ++0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x8c,0x7e,0x08,0x12,0x33,0xd8,0x90,0x81,0x56, ++0x12,0x1d,0xb5,0x00,0x01,0x00,0x00,0x7f,0x44,0x7e,0x08,0x12,0x33,0xd8,0x90,0x81, ++0x56,0x12,0x1d,0xb5,0x00,0xdb,0x25,0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x33,0xd8,0x90, ++0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x33,0xd8, ++0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x33, ++0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12, ++0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e, ++0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e, ++0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4,0x7f,0x80, ++0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x63,0xdb,0x25,0xa4,0x7f, ++0x84,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x04,0x1b,0x25,0xa4, ++0x7f,0x88,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb,0x25, ++0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20,0xdb, ++0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5,0x20, ++0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d,0xb5, ++0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12,0x1d, ++0xb5,0x00,0x1b,0x25,0xa4,0x7f,0xdc,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56,0x12, ++0x1d,0xb5,0x00,0x1b,0x25,0xa4,0x7f,0xe0,0x7e,0x0e,0x12,0x33,0xd8,0x90,0x81,0x56, ++0x12,0x1d,0xb5,0x24,0xdb,0x25,0xa4,0x7f,0xec,0x7e,0x0e,0x12,0x33,0xd8,0x7f,0x04, ++0x7e,0x0c,0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xe4,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90, ++0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x11,0xff,0xec, ++0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33, ++0xd8,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97, ++0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xf0,0xff,0xec,0x90, ++0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe, ++0xa3,0xe0,0x44,0x01,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9, ++0x7f,0x04,0x7e,0x0d,0x12,0x33,0xd8,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x13,0x90,0x97, ++0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xe4, ++0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x11,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90, ++0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56, ++0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33,0xd8,0x7f,0x0c,0x7e,0x09,0x12,0x2b, ++0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3, ++0xe0,0xfe,0xa3,0xe0,0xff,0xed,0x54,0x0f,0xfd,0xec,0x54,0xf0,0xfc,0x90,0x97,0xa3, ++0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0, ++0xff,0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90, ++0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56, ++0x12,0x1d,0xa9,0x7f,0x0c,0x7e,0x09,0x12,0x33,0xd8,0x7f,0x04,0x7e,0x08,0x12,0x2b, ++0x13,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3, ++0xe0,0xfe,0xa3,0xe0,0x54,0xf0,0xff,0xec,0x90,0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97, ++0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x44,0x01,0xff,0xec,0x90, ++0x97,0xa3,0x12,0x1d,0xa9,0x90,0x97,0xa3,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe, ++0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x08,0x12,0x33,0xd8, ++0xe4,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x10,0xef,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4, ++0x34,0x95,0xaf,0x82,0xf5,0x11,0x8f,0x12,0xe5,0x10,0x75,0xf0,0x02,0xa4,0x24,0x81, ++0xf9,0x74,0x92,0x35,0xf0,0x75,0x13,0x01,0xf5,0x14,0x89,0x15,0xe5,0x10,0x75,0xf0, ++0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x93,0xaf,0x82,0xf5,0x16,0x8f,0x17,0xe5, ++0x10,0x75,0xf0,0x08,0xa4,0x24,0x63,0xf9,0x74,0x93,0x35,0xf0,0x75,0x18,0x01,0xf5, ++0x19,0x89,0x1a,0x74,0xc1,0x25,0x10,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x12, ++0x66,0xc1,0x55,0x67,0x00,0x55,0x7c,0x01,0x55,0x91,0x02,0x55,0xa6,0x03,0x55,0xd0, ++0x04,0x55,0xe5,0x05,0x55,0xfa,0x06,0x56,0x21,0x0c,0x56,0x4f,0x0d,0x56,0x7c,0x0e, ++0x56,0xa9,0x0f,0x00,0x00,0x56,0xdd,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4, ++0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x15,0x80,0x3c,0xe5,0x10,0x25,0xe0, ++0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0x74,0x10,0x80, ++0x27,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0xf0, ++0xf0,0xa3,0x74,0x05,0x80,0x12,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34, ++0x95,0xf5,0x83,0x74,0xf0,0xf0,0xa3,0xe4,0xf0,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5, ++0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0x8f,0xf0,0x02,0x56,0xdd, ++0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0x74,0x0f,0xf0, ++0xa3,0x74,0xf5,0x80,0x27,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95, ++0xf5,0x83,0x74,0x0f,0xf0,0xa3,0x74,0xf0,0x80,0x12,0xe5,0x10,0x25,0xe0,0x24,0xe4, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0x74,0x0d,0xf0,0xe5,0x10,0x25, ++0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x02,0x56, ++0xdd,0x90,0x04,0x47,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04, ++0x46,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04, ++0x45,0xe0,0x85,0x12,0x82,0x85,0x11,0x83,0xf0,0x90,0x04,0x44,0x02,0x56,0xd4,0x90, ++0x04,0x4b,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x4a,0xe0, ++0xab,0x13,0xaa,0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x49,0xe0, ++0x85,0x12,0x82,0x85,0x11,0x83,0xf0,0x90,0x04,0x48,0x80,0x58,0x90,0x04,0x4f,0xe0, ++0xab,0x13,0xaa,0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x4e,0xe0,0xab,0x13,0xaa, ++0x14,0xa9,0x15,0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x4d,0xe0,0x85,0x12,0x82, ++0x85,0x11,0x83,0xf0,0x90,0x04,0x4c,0x80,0x2b,0x90,0x04,0x53,0xe0,0xab,0x13,0xaa, ++0x14,0xa9,0x15,0x12,0x65,0x95,0x90,0x04,0x52,0xe0,0xab,0x13,0xaa,0x14,0xa9,0x15, ++0x90,0x00,0x01,0x12,0x65,0xa7,0x90,0x04,0x51,0xe0,0x85,0x12,0x82,0x85,0x11,0x83, ++0xf0,0x90,0x04,0x50,0xe0,0x85,0x12,0x82,0x85,0x11,0x83,0xa3,0xf0,0xab,0x13,0xaa, ++0x14,0xa9,0x15,0xc0,0x03,0xc0,0x02,0xc0,0x01,0x12,0x1c,0xd6,0xff,0xab,0x18,0xaa, ++0x19,0xa9,0x1a,0x12,0x1c,0xd6,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x65,0x95, ++0xab,0x13,0xe5,0x15,0x24,0x01,0xf9,0xe4,0x35,0x14,0xfa,0xc0,0x03,0xc0,0x02,0xc0, ++0x01,0x12,0x1c,0xd6,0xff,0xab,0x18,0xaa,0x19,0xa9,0x1a,0x90,0x00,0x01,0x12,0x1c, ++0xef,0x5f,0xd0,0x01,0xd0,0x02,0xd0,0x03,0x12,0x65,0x95,0x85,0x12,0x82,0x85,0x11, ++0x83,0xc0,0x83,0xc0,0x82,0xe0,0xff,0x85,0x17,0x82,0x85,0x16,0x83,0xe0,0xfe,0xef, ++0x5e,0xd0,0x82,0xd0,0x83,0xf0,0x85,0x12,0x82,0x85,0x11,0x83,0xa3,0xc0,0x83,0xc0, ++0x82,0xe0,0xff,0x85,0x17,0x82,0x85,0x16,0x83,0xa3,0xe0,0xfe,0xef,0x5e,0xd0,0x82, ++0xd0,0x83,0xf0,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83, ++0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x4c,0x90,0x97,0x51,0x74,0x0b,0xf0,0x90,0x97,0x51, ++0xe0,0xff,0xc3,0x94,0x00,0x50,0x03,0x02,0x58,0x23,0x74,0x01,0x7e,0x00,0xa8,0x07, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24, ++0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60, ++0x0a,0x90,0x97,0x51,0xe0,0x24,0x10,0xa3,0xf0,0x80,0x68,0x90,0x97,0x51,0xe0,0x14, ++0xf0,0x80,0xba,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x47,0x90,0x97,0x51,0x74,0x0f,0xf0,0x90,0x97,0x51, ++0xe0,0xff,0xc3,0x94,0x00,0x40,0x3c,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97, ++0x51,0xe0,0xa3,0xf0,0x80,0x0d,0x90,0x97,0x51,0xe0,0x14,0xf0,0x80,0xbf,0xe4,0x90, ++0x97,0x52,0xf0,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0xfe,0xa3,0xe0,0x4e,0x60,0x47,0xe4,0x90,0x97,0x51,0xf0,0x90,0x97,0x51,0xe0, ++0xff,0xc3,0x94,0x10,0x40,0x03,0x02,0x58,0xdd,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08, ++0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0xe4, ++0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x06, ++0x90,0x97,0x51,0xe0,0x80,0x63,0x90,0x97,0x51,0xe0,0x04,0xf0,0x80,0xbe,0xe5,0x10, ++0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xfe,0xa3,0xe0,0x4e, ++0x60,0x46,0xe4,0x90,0x97,0x51,0xf0,0x90,0x97,0x51,0xe0,0xff,0xc3,0x94,0x0c,0x50, ++0x3c,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0xff,0xe5,0x10,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0, ++0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x08,0x90,0x97,0x51,0xe0,0x24,0x10,0x80,0x09, ++0x90,0x97,0x51,0xe0,0x04,0xf0,0x80,0xbf,0xe4,0x90,0x97,0x53,0xf0,0x90,0x97,0x52, ++0xe0,0xff,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34,0x93,0xf5, ++0x83,0xef,0xf0,0x90,0x97,0x53,0xe0,0xfe,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x68, ++0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xee,0xf0,0x74,0x84,0x25,0x10,0xf5,0x82,0xe4, ++0x34,0x04,0xf5,0x83,0xe0,0xd3,0x9f,0x40,0x1f,0x90,0x97,0x52,0xe0,0xff,0x74,0x84, ++0x25,0x10,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xef,0xf0,0x74,0x84,0x25,0x10,0xf5, ++0x82,0xe4,0x34,0x04,0xf5,0x83,0xef,0xf0,0x90,0x97,0x52,0xe0,0xff,0xd3,0x94,0x13, ++0x40,0x08,0x90,0x93,0x62,0x74,0x03,0xf0,0x80,0x21,0xef,0xd3,0x94,0x0b,0x40,0x08, ++0x90,0x93,0x62,0x74,0x02,0xf0,0x80,0x13,0xef,0xd3,0x94,0x03,0x40,0x08,0x90,0x93, ++0x62,0x74,0x01,0xf0,0x80,0x05,0xe4,0x90,0x93,0x62,0xf0,0x90,0x93,0x62,0xe0,0x90, ++0x04,0xb1,0xf0,0xe5,0x10,0x25,0xe0,0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83, ++0xe0,0xff,0xa3,0xe0,0x90,0x04,0x9c,0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x10,0x25,0xe0, ++0x24,0x81,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0xff,0xa3,0xe0,0x90,0x04,0x9e, ++0xcf,0xf0,0xa3,0xef,0xf0,0xe5,0x10,0x75,0xf0,0x08,0xa4,0x24,0x69,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe0,0xc4,0x33,0x54,0xe0,0x45,0x10,0x90,0x04,0xa0,0xf0,0x74, ++0xc1,0x25,0x10,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0xe0,0x90,0x04,0xa1,0xf0,0x22, ++0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0, ++0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4, ++0x74,0xd0,0xf0,0x74,0x59,0xa3,0xf0,0x90,0x01,0x37,0xe0,0x55,0x2b,0xf5,0x2f,0x90, ++0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xe5, ++0x2c,0x20,0xe0,0x03,0x02,0x5b,0x82,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd1,0x4d, ++0x85,0xd2,0x4e,0x85,0xd3,0x4f,0x85,0xd4,0x50,0x85,0xd5,0x51,0x85,0xd6,0x52,0x85, ++0xd7,0x53,0x85,0xd9,0x54,0xe5,0x54,0x54,0x40,0xc3,0x13,0xff,0xe5,0x53,0x54,0x20, ++0x6f,0x70,0x03,0x02,0x5b,0x2f,0xe5,0x54,0x30,0xe5,0x03,0x02,0x5b,0x2f,0xe5,0x52, ++0x54,0x1f,0xf5,0x08,0xe5,0x4d,0x54,0x3f,0xf5,0x09,0xe5,0x51,0x54,0x1f,0xff,0xe5, ++0x08,0x25,0xe0,0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f,0xf0,0x12, ++0x65,0xc9,0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xc0,0xf5,0x82,0xe4, ++0x34,0x91,0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x65,0xc9,0xe5,0x09,0xd3,0x94,0x04,0x40, ++0x03,0x75,0x09,0x04,0x75,0xf0,0x0a,0xe5,0x08,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0, ++0x34,0x90,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x09,0x12,0x66,0xb5,0xe0,0xfe,0xa3,0xe0, ++0xff,0xe5,0x53,0x54,0x1f,0x2f,0xff,0xe4,0x3e,0xfe,0x75,0xf0,0x0a,0xe5,0x08,0xa4, ++0x24,0x00,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0x75,0xf0,0x02,0xe5,0x09,0x12, ++0x66,0xb5,0xee,0xf0,0xa3,0xef,0xf0,0xe5,0x54,0x20,0xe6,0x24,0xe5,0x53,0x54,0x1f, ++0xff,0xe5,0x08,0x25,0xe0,0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0x8f, ++0xf0,0x12,0x65,0xc9,0xe5,0x4f,0x30,0xe7,0x36,0xaf,0x08,0x12,0x75,0x4c,0x80,0x2f, ++0xe5,0x53,0x54,0x1f,0xff,0xe5,0x08,0x25,0xe0,0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94, ++0xf5,0x83,0xe4,0x8f,0xf0,0x12,0x65,0xc9,0xe5,0x4f,0x30,0xe7,0x12,0xe5,0x4f,0x54, ++0x7f,0xfd,0xe5,0x53,0x54,0x1f,0xf5,0x0d,0xab,0x09,0xaf,0x08,0x12,0x76,0x52,0xe5, ++0x65,0x60,0x4f,0x90,0x97,0x8d,0xe0,0x60,0x35,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x04,0xf0,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x70,0x34,0x75,0x48, ++0x14,0xf5,0x49,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x38,0xec,0x90,0x01,0x5b,0x74, ++0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x97,0x87,0xf0,0x80,0x14,0x90,0x04, ++0x1b,0xe0,0x54,0x7f,0xff,0xbf,0x7f,0x0a,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12, ++0x6e,0xda,0xe5,0x2c,0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x56, ++0x85,0xd2,0x57,0x85,0xd3,0x58,0x85,0xd4,0x59,0x85,0xd5,0x5a,0x85,0xd6,0x5b,0x85, ++0xd7,0x5c,0x85,0xd9,0x5d,0x12,0x7d,0xc4,0xe5,0x2c,0x30,0xe3,0x06,0x90,0x01,0x34, ++0x74,0x08,0xf0,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x55, ++0x10,0xe5,0x2c,0x30,0xe5,0x21,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1a,0xe0,0x54,0xdf, ++0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x7f,0x10, ++0x7e,0x00,0x12,0x3a,0xa8,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74, ++0x40,0xf0,0xe5,0x2e,0x30,0xe1,0x09,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x55,0x40, ++0xe5,0x2e,0x30,0xe0,0x09,0x90,0x01,0x36,0x74,0x01,0xf0,0x12,0x76,0xd3,0xe5,0x2e, ++0x30,0xe2,0x63,0x90,0x01,0x36,0x74,0x04,0xf0,0xe5,0x64,0x64,0x01,0x70,0x57,0xe5, ++0x65,0x60,0x53,0xe5,0x65,0x64,0x02,0x70,0x27,0x90,0x06,0xab,0xe0,0x90,0x97,0x7f, ++0xf0,0x90,0x06,0xaa,0xe0,0x90,0x97,0x8a,0xf0,0x90,0x97,0x7f,0xe0,0x70,0x07,0x90, ++0x97,0x8a,0xe0,0xff,0x80,0x05,0x90,0x97,0x7f,0xe0,0xff,0x90,0x97,0x7f,0xef,0xf0, ++0x90,0x97,0x81,0xe0,0x60,0x03,0xe0,0x14,0xf0,0x90,0x97,0x80,0xe4,0xf0,0x90,0x01, ++0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x8f,0xe0,0x54,0xfd,0xf0,0xe0, ++0x54,0xef,0xf0,0x12,0x77,0x49,0xe5,0x2e,0x30,0xe3,0x31,0x90,0x01,0x36,0x74,0x08, ++0xf0,0xe5,0x64,0x64,0x01,0x70,0x25,0xe5,0x65,0x60,0x21,0x90,0x01,0x57,0xe4,0xf0, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0x75,0x48,0x03,0x75,0x49,0x00,0xe4,0xfb,0xfd,0x7f, ++0x54,0x7e,0x01,0x12,0x38,0xec,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4, ++0x3a,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x64,0x64,0x01,0x70,0x2e,0xe5,0x65,0x60, ++0x2a,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x97,0x8e,0xe4, ++0xf0,0x90,0x97,0x8f,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x03,0x70,0x0e,0x90,0x97,0x89, ++0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x2e,0x30,0xe5,0x12, ++0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x64,0xb4,0x01,0x07,0xe5,0x65,0x60,0x03,0x12, ++0x7e,0x7e,0xe5,0x2e,0x30,0xe6,0x2a,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x64,0x64, ++0x01,0x70,0x1e,0xe5,0x65,0x60,0x1a,0x90,0x97,0x8f,0xe0,0x54,0xfe,0xf0,0xe0,0x54, ++0x03,0x70,0x0e,0x90,0x97,0x89,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e, ++0xda,0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0,0x12,0x7c,0xe8,0x74, ++0xd0,0x04,0x90,0x01,0xc4,0xf0,0x74,0x59,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05, ++0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83, ++0xd0,0xf0,0xd0,0xe0,0x32,0x74,0x5d,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x65,0xf0,0x90, ++0x04,0x44,0x74,0x11,0xf0,0xa3,0x74,0xf0,0xf0,0xa3,0x74,0x0f,0xf0,0xa3,0xe4,0xf0, ++0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xff,0xc3,0x94,0x10,0x50,0x14,0x74,0xa4, ++0x2f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xe4,0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0, ++0x80,0xe2,0xe4,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xfb,0xc3,0x94,0x20,0x40, ++0x03,0x02,0x5f,0x6c,0xe0,0xff,0x75,0xf0,0x0a,0xa4,0x24,0x00,0xf5,0x82,0xe5,0xf0, ++0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,0x02,0xf5, ++0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0,0x0a,0xef,0xa4, ++0x24,0x04,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x75,0xf0, ++0x0a,0xef,0xa4,0x24,0x06,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83,0xe4,0xf0,0xa3, ++0xf0,0x75,0xf0,0x0a,0xef,0xa4,0x24,0x08,0xf5,0x82,0xe5,0xf0,0x34,0x90,0xf5,0x83, ++0xe4,0xf0,0xa3,0xf0,0x74,0x84,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0x74,0x13, ++0xf0,0x74,0x44,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xef,0x25,0xe0, ++0x24,0xc0,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0, ++0x24,0x63,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0, ++0x24,0xe3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0, ++0x24,0xa3,0xf5,0x82,0xe4,0x34,0x94,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0, ++0x24,0x64,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0xef,0x25,0xe0, ++0x24,0xa4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe4,0xf0,0xa3,0xf0,0x74,0x44,0x2f, ++0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4,0xf0,0x74,0x24,0x2f,0xf5,0x82,0xe4,0x34, ++0x96,0xf5,0x83,0xe4,0xf0,0x74,0x64,0x2f,0xf5,0x82,0xe4,0x34,0x96,0xf5,0x83,0xe4, ++0xf0,0x90,0x41,0xc4,0x93,0xfe,0x74,0x01,0x93,0xff,0x90,0x41,0x8c,0x74,0x01,0x93, ++0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xeb,0x25, ++0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0xeb, ++0x75,0xf0,0x08,0xa4,0x24,0x6a,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01,0xf0, ++0xeb,0x75,0xf0,0x08,0xa4,0x24,0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01, ++0xf0,0x74,0xc1,0x2b,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x74,0x0c,0xf0,0xeb,0x75, ++0xf0,0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0xff,0xf0,0xa3, ++0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x63,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe4, ++0xf0,0xa3,0x74,0x0f,0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5,0x82,0xe4,0x34, ++0x93,0xf5,0x83,0x74,0x13,0xf0,0xeb,0x75,0xf0,0x08,0xa4,0x24,0x68,0xf5,0x82,0xe4, ++0x34,0x93,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x2b,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83, ++0x74,0x13,0xf0,0x90,0x97,0x3a,0xe0,0x04,0xf0,0x02,0x5d,0xa7,0x22,0x8f,0x17,0x74, ++0x5f,0x90,0x01,0xc4,0xf0,0xa3,0x74,0x6d,0xf0,0x74,0x84,0x25,0x17,0xf5,0x82,0xe4, ++0x34,0x04,0xf5,0x83,0xe0,0x54,0x7f,0x90,0x97,0x54,0xf0,0xe0,0x54,0x1f,0xff,0x90, ++0x97,0x57,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x68,0xf5,0x82,0xe4,0x34,0x93, ++0xf5,0x83,0xe0,0x90,0x97,0x59,0xf0,0xe5,0x17,0x75,0xf0,0x08,0xa4,0x24,0x67,0xf5, ++0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xfe,0x90,0x97,0x5a,0xf0,0xe5,0x17,0x25,0xe0, ++0x24,0xe4,0xf5,0x82,0xe4,0x34,0x95,0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x97,0x5b, ++0xcb,0xf0,0xa3,0xeb,0xf0,0xe5,0x17,0x25,0xe0,0x24,0x81,0xf5,0x82,0xe4,0x34,0x92, ++0xf5,0x83,0xe0,0xfb,0xa3,0xe0,0x90,0x97,0x5d,0xcb,0xf0,0xa3,0xeb,0xf0,0xef,0xd3, ++0x9e,0x40,0x0c,0x90,0x97,0x5a,0xe0,0x90,0x97,0x57,0xf0,0x90,0x97,0x54,0xf0,0xed, ++0x70,0x03,0x02,0x60,0xd9,0x90,0x97,0x58,0xed,0xf0,0x90,0x97,0x54,0xe0,0x30,0xe6, ++0x0e,0x90,0x97,0x57,0xe0,0x90,0x97,0x54,0xf0,0x90,0x97,0x58,0xe0,0x14,0xf0,0x90, ++0x97,0x58,0xe0,0x70,0x03,0x02,0x60,0xd9,0x90,0x97,0x57,0xe0,0xff,0xd3,0x94,0x00, ++0x50,0x03,0x02,0x60,0xd9,0xe4,0x90,0x97,0x56,0xf0,0xef,0x14,0x90,0x97,0x55,0xf0, ++0x90,0x97,0x59,0xe0,0xfd,0x90,0x97,0x55,0xe0,0xff,0xd3,0x9d,0x40,0x6f,0xef,0x94, ++0x10,0x40,0x21,0xef,0x24,0xf0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x97,0x5d,0xe0,0x5e,0xfe,0xa3,0xe0, ++0x5f,0x4e,0x70,0x27,0x90,0x97,0x55,0xe0,0xff,0xc3,0x94,0x10,0x50,0x37,0x74,0x01, ++0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90, ++0x97,0x5b,0xe0,0x5e,0xfe,0xa3,0xe0,0x5f,0x4e,0x60,0x1a,0x90,0x97,0x55,0xe0,0x90, ++0x97,0x54,0xf0,0x90,0x97,0x56,0xe0,0x04,0xf0,0x90,0x97,0x58,0xe0,0xff,0x90,0x97, ++0x56,0xe0,0x6f,0x60,0x08,0x90,0x97,0x55,0xe0,0x14,0xf0,0x80,0x83,0x90,0x97,0x58, ++0xe0,0xff,0x90,0x97,0x56,0xe0,0xc3,0x9f,0x50,0x0f,0x90,0x97,0x55,0xe0,0xb5,0x05, ++0x08,0x90,0x97,0x59,0xe0,0x90,0x97,0x54,0xf0,0x90,0x97,0x54,0xe0,0xff,0x25,0xe0, ++0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfc,0x74,0x01,0x93,0xfd, ++0xef,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93,0x2d, ++0xff,0xe4,0x93,0x3c,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x17,0x25, ++0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9,0x90, ++0x97,0x54,0xe0,0xff,0x74,0x84,0x25,0x17,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xef, ++0xf0,0x22,0x90,0x01,0xc4,0x74,0x32,0xf0,0x74,0x61,0xa3,0xf0,0x90,0x01,0xcc,0xe0, ++0x54,0x0f,0x90,0x97,0x3a,0xf0,0x90,0x97,0x3a,0xe0,0xfd,0x70,0x03,0x02,0x62,0xd2, ++0x90,0x97,0xb1,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x03,0x02,0x62,0xb3,0x90,0x97,0xb1, ++0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd0,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0, ++0x90,0x97,0x3b,0xf0,0xa2,0xaf,0xe4,0x33,0xa3,0xf0,0xc2,0xaf,0x75,0x24,0x01,0x75, ++0x25,0x97,0x75,0x26,0x3b,0x75,0x27,0x01,0x7b,0x01,0x7a,0x97,0x79,0x3d,0x12,0x79, ++0x27,0x90,0x97,0x3c,0xe0,0x24,0xff,0x92,0xaf,0xa3,0xe0,0xff,0xc4,0x13,0x13,0x13, ++0x54,0x01,0x90,0x97,0xb1,0x30,0xe0,0x70,0xe0,0x75,0xf0,0x02,0xa4,0x24,0x88,0xf5, ++0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe0,0x90,0x97,0x3e,0xf0,0x90,0x97,0xb1,0xe0,0x75, ++0xf0,0x02,0xa4,0x24,0x89,0xf5,0x82,0xe4,0x35,0xf0,0xf5,0x83,0xe0,0x90,0x97,0x3f, ++0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd1,0xf5,0x82,0xe5,0xf0,0x34, ++0x01,0xf5,0x83,0xe0,0x90,0x97,0x40,0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4, ++0x24,0xd2,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x41,0xf0,0x90, ++0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd3,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5, ++0x83,0xe0,0x90,0x97,0x42,0xf0,0x80,0x42,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd1,0xf5, ++0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x3e,0xf0,0x90,0x97,0xb1,0xe0, ++0x75,0xf0,0x04,0xa4,0x24,0xd2,0xf5,0x82,0xe5,0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90, ++0x97,0x3f,0xf0,0x90,0x97,0xb1,0xe0,0x75,0xf0,0x04,0xa4,0x24,0xd3,0xf5,0x82,0xe5, ++0xf0,0x34,0x01,0xf5,0x83,0xe0,0x90,0x97,0x40,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01, ++0x7a,0x97,0x79,0x3e,0x12,0x6e,0x02,0x90,0x97,0x3a,0xe0,0xff,0x90,0x97,0xb1,0xe0, ++0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x97, ++0x3a,0xf0,0x90,0x97,0xb1,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x97,0xb1,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0, ++0x02,0x61,0x46,0xc2,0xaf,0x74,0x32,0x04,0x90,0x01,0xc4,0xf0,0x74,0x61,0xa3,0xf0, ++0x90,0x97,0x3a,0xe0,0x90,0x01,0xc6,0xf0,0x90,0x97,0xb1,0xe0,0x90,0x01,0xc7,0xf0, ++0x80,0xfe,0x22,0xe4,0x90,0x97,0x37,0xf0,0xa3,0xf0,0x12,0x7a,0x6c,0x90,0x00,0x02, ++0xe0,0x54,0xe0,0x90,0x97,0x96,0x60,0x05,0x74,0x01,0xf0,0x80,0x03,0x74,0x02,0xf0, ++0x90,0x00,0xf3,0xe0,0x30,0xe3,0x08,0x90,0x97,0x97,0x74,0x01,0xf0,0x80,0x05,0xe4, ++0x90,0x97,0x97,0xf0,0x90,0x97,0x97,0xe0,0xb4,0x01,0x13,0x90,0x00,0xf2,0xe0,0x30, ++0xe7,0x0c,0x90,0x97,0x90,0x74,0xfd,0xf0,0xa3,0x74,0x33,0xf0,0x80,0x0a,0x90,0x97, ++0x90,0x74,0xfd,0xf0,0xa3,0x74,0x2f,0xf0,0xe4,0xf5,0x55,0x12,0x5d,0x65,0x12,0x7f, ++0x60,0x12,0x79,0xce,0x12,0x36,0xd1,0x12,0x44,0xff,0x75,0x28,0x33,0xe4,0xf5,0x29, ++0x75,0x2a,0x02,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29,0xf0,0xa3, ++0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05, ++0x41,0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x75,0x48,0xff,0xe4,0xf5,0x49,0xfb,0x7d,0x01,0x7f,0x50,0x7e,0x01,0x12,0x38, ++0xec,0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0, ++0xa3,0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x12,0x78,0xd0,0x90,0x97,0x39,0xe5,0xd9, ++0xf0,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x7f,0x10, ++0x7e,0x00,0x12,0x3a,0xa8,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x01,0xc0, ++0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01,0xc6,0xf0,0xa3,0xf0,0x90,0x97, ++0x37,0xe0,0x64,0x01,0xf0,0x24,0xd3,0x90,0x01,0xc4,0xf0,0x74,0x62,0xa3,0xf0,0xe5, ++0x55,0x30,0xe6,0x17,0xc2,0xaf,0x53,0x55,0xbf,0xd2,0xaf,0x12,0x45,0x09,0x90,0x97, ++0x6d,0xe0,0xff,0x60,0x03,0xb4,0x01,0x03,0x12,0x6a,0x1f,0xe5,0x55,0x30,0xe7,0x07, ++0xc2,0xaf,0x53,0x55,0x7f,0xd2,0xaf,0xe5,0x55,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x55, ++0xef,0xd2,0xaf,0x12,0x61,0x32,0x90,0x97,0x6d,0xe0,0x70,0x03,0x12,0x6d,0x29,0x12, ++0x7d,0x45,0x80,0xaa,0x90,0x00,0x02,0x12,0x1c,0xef,0x90,0x97,0x6b,0xf0,0x90,0x00, ++0x01,0x12,0x1c,0xef,0x25,0xe0,0x25,0xe0,0x90,0x97,0x6a,0xf0,0x12,0x1c,0xd6,0x25, ++0xe0,0x25,0xe0,0x90,0x97,0x6e,0xf0,0x90,0x97,0x6b,0xe0,0x90,0x04,0x98,0xf0,0x90, ++0x97,0x6a,0xe0,0x13,0x13,0x54,0x3f,0x90,0x04,0x99,0xf0,0x90,0x97,0x6e,0xe0,0x13, ++0x13,0x54,0x3f,0x90,0x04,0x9a,0xf0,0x90,0x05,0x60,0xe0,0x90,0x97,0x79,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x97,0x7a,0xf0,0x90,0x05,0x62,0xe0,0x90,0x97,0x7b,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x97,0x7c,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x49,0xf0,0xc2, ++0xaf,0x90,0x97,0x6a,0xe0,0xff,0x12,0x79,0x7c,0x90,0x97,0x49,0xe0,0x24,0xff,0x92, ++0xaf,0x90,0x97,0x6b,0xe0,0x70,0x03,0x02,0x65,0x61,0x90,0x97,0x6a,0xe0,0x70,0x03, ++0x02,0x65,0x61,0x90,0x97,0x6e,0xe0,0x70,0x03,0x02,0x65,0x61,0xa2,0xaf,0xe4,0x33, ++0x90,0x97,0x49,0xf0,0xc2,0xaf,0x90,0x97,0x7d,0x74,0x01,0xf0,0x90,0x97,0x49,0xe0, ++0x24,0xff,0x92,0xaf,0x90,0x00,0x45,0xe0,0x54,0xfe,0xf0,0xa3,0xe0,0x44,0x01,0xf0, ++0x90,0x97,0x63,0xe0,0x60,0x1d,0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33, ++0xd8,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x97,0x79,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x97,0x7a,0xe0,0x90,0x05,0x85,0xf0,0x90,0x97,0x7b,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x97,0x7c,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x49,0xf0,0xc2, ++0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x3a,0x49,0x80, ++0x2b,0x90,0x97,0x6b,0xe0,0x70,0x2d,0x90,0x97,0x7d,0xf0,0x90,0x00,0x45,0xe0,0x54, ++0xfe,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90, ++0x97,0x49,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x39,0xdb,0x90,0x97,0x49,0xe0, ++0x24,0xff,0x92,0xaf,0x22,0xbb,0x01,0x06,0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02, ++0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8,0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82, ++0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22,0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22, ++0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2,0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0, ++0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xa3, ++0xf8,0xe0,0xc5,0xf0,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0, ++0xc8,0x38,0xf0,0xe8,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xe0,0xf5,0xf0,0xa3, ++0xe0,0x22,0x50,0x06,0x87,0xf0,0x09,0xe7,0x19,0x22,0xbb,0xfe,0x07,0xe3,0xf5,0xf0, ++0x09,0xe3,0x19,0x22,0x89,0x82,0x8a,0x83,0xe4,0x93,0xf5,0xf0,0x74,0x01,0x93,0x22, ++0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0, ++0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8,0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe, ++0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08,0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83, ++0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xbb,0x01,0x0a,0x89,0x82,0x8a,0x83,0xf0, ++0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x06,0xf7,0x09,0xa7,0xf0,0x19,0x22,0xbb,0xfe,0x06, ++0xf3,0xe5,0xf0,0x09,0xf3,0x19,0x22,0xf8,0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82, ++0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5,0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25, ++0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb,0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5, ++0xf0,0x08,0xf2,0x22,0xeb,0x9f,0xf5,0xf0,0xea,0x9e,0x42,0xf0,0xe9,0x9d,0x42,0xf0, ++0xe8,0x9c,0x45,0xf0,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3, ++0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68, ++0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0,0xa3, ++0xe9,0xf0,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x04, ++0x12,0x1c,0xef,0xff,0x54,0x1f,0x90,0x97,0x49,0xf0,0x90,0x00,0x03,0x12,0x1c,0xef, ++0x54,0xf0,0xc4,0x54,0x0f,0x90,0x97,0x4a,0xf0,0xef,0x54,0x20,0xc4,0x13,0x54,0x07, ++0xa3,0xf0,0x90,0x97,0x49,0xe0,0xff,0x75,0xf0,0x08,0xa4,0x24,0x65,0xf5,0x82,0xe4, ++0x34,0x93,0xad,0x82,0x90,0x97,0x4c,0xf0,0xa3,0xed,0xf0,0xef,0x75,0xf0,0x08,0xa4, ++0x24,0x63,0xf9,0x74,0x93,0x35,0xf0,0xfa,0xa3,0x74,0x01,0xf0,0xa3,0xea,0xf0,0xa3, ++0xe9,0xf0,0x90,0x97,0x46,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x03,0x12,0x1c, ++0xef,0x54,0x0f,0xff,0x90,0x97,0x4e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0xef, ++0x12,0x65,0x95,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00, ++0x02,0x12,0x1c,0xef,0xff,0x90,0x97,0x4e,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9, ++0x90,0x00,0x01,0xef,0x12,0x65,0xa7,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3, ++0xe0,0xf9,0x90,0x00,0x01,0x12,0x1c,0xef,0xff,0x90,0x97,0x4c,0xe0,0xfc,0xa3,0xe0, ++0xfd,0xf5,0x82,0x8c,0x83,0xef,0xf0,0x12,0x1c,0xd6,0x8d,0x82,0x8c,0x83,0xa3,0xf0, ++0x90,0x97,0x4a,0xe0,0xfe,0x90,0x97,0x49,0xe0,0xff,0x24,0xc1,0xf5,0x82,0xe4,0x34, ++0x92,0xf5,0x83,0xee,0xf0,0x90,0x97,0x4b,0xe0,0xfe,0xef,0x75,0xf0,0x08,0xa4,0x24, ++0x69,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xee,0xf0,0xef,0x75,0xf0,0x08,0xa4,0x24, ++0x6a,0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0x74,0x01,0xf0,0x02,0x54,0xe6,0xc0,0xe0, ++0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0, ++0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xfe, ++0xf0,0x74,0x67,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34, ++0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xe5,0x34,0x30,0xe0, ++0x0f,0x90,0x01,0x3c,0x74,0x01,0xf0,0x90,0x01,0x53,0x74,0x07,0xf0,0x43,0x55,0x80, ++0xe5,0x34,0x30,0xe1,0x09,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12,0x7b,0x00,0xe5,0x34, ++0x30,0xe2,0x3a,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x1e, ++0x75,0x48,0x14,0x75,0x49,0x00,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x38,0xec, ++0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x0f,0x90,0x97, ++0x87,0xe4,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x34,0x30, ++0xe3,0x06,0x90,0x01,0x3c,0x74,0x08,0xf0,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c, ++0x74,0x10,0xf0,0x12,0x7e,0xdf,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20, ++0xf0,0x12,0x6f,0xa2,0xe5,0x35,0x30,0xe0,0x15,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90, ++0x00,0x83,0xe0,0x90,0x97,0x8b,0xf0,0xe0,0xff,0x7d,0x01,0x12,0x6e,0xda,0xe5,0x36, ++0x30,0xe3,0x06,0x90,0x01,0x3e,0x74,0x08,0xf0,0x74,0xfe,0x04,0x90,0x01,0xc4,0xf0, ++0x74,0x67,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02, ++0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x8b, ++0x10,0x8a,0x11,0x89,0x12,0x90,0x00,0x02,0x12,0x1c,0xef,0x90,0x97,0x6c,0xf0,0xe0, ++0x90,0x04,0x94,0xf0,0x90,0x00,0x01,0x12,0x1c,0xef,0x90,0x04,0x95,0xf0,0x90,0x97, ++0x6c,0xe0,0x30,0xe0,0x74,0x90,0x97,0x63,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x2b,0x13,0x90,0x97,0x65,0x12,0x1d,0xa9,0xab,0x10,0xaa,0x11,0xa9,0x12,0x90,0x00, ++0x01,0x12,0x1c,0xef,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x1d,0x96,0xa8,0x04, ++0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0xec,0x54,0x03,0xfc,0xeb,0x4f,0xff,0xea,0x4e,0xfe,0xe9,0x4d, ++0xfd,0xe8,0x4c,0xfc,0x90,0x97,0x6f,0x12,0x1d,0xa9,0x90,0x05,0x22,0xe4,0xf0,0x90, ++0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x78,0x18,0x12, ++0x1d,0x83,0x90,0x04,0x96,0xef,0xf0,0x80,0x45,0xe4,0x90,0x97,0x63,0xf0,0x7f,0x80, ++0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x65,0x12,0x1d,0xa9,0x90,0x97,0x65,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0xec,0x44,0xc0,0xfc,0x90,0x97,0x65, ++0x12,0x1d,0xa9,0x90,0x97,0x65,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0, ++0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97, ++0x6c,0xe0,0x90,0x00,0x47,0x30,0xe1,0x11,0x74,0x0c,0xf0,0xa3,0xe0,0x44,0x0c,0xf0, ++0x90,0x00,0x46,0xe0,0x44,0x10,0xf0,0x80,0x10,0xe0,0x54,0xf3,0xf0,0xa3,0xe0,0x54, ++0xf3,0xf0,0x90,0x00,0x46,0xe0,0x54,0xef,0xf0,0xe4,0x90,0x97,0x69,0xf0,0x22,0x90, ++0x97,0x64,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x6a,0xd9,0x90,0x97, ++0x64,0xe0,0x64,0x14,0x60,0x03,0x02,0x6a,0xd9,0x90,0x97,0x73,0xe0,0x70,0x25,0x90, ++0x97,0x76,0xe0,0x70,0x1f,0x90,0x97,0x74,0xe0,0x70,0x19,0x90,0x97,0x77,0xe0,0x70, ++0x13,0x90,0x97,0x75,0xe0,0x70,0x0d,0x90,0x97,0x78,0xe0,0x70,0x07,0x90,0x04,0xfd, ++0xe0,0x54,0xfe,0xf0,0x90,0x97,0x73,0xe0,0x90,0x04,0x88,0xf0,0x90,0x97,0x74,0xe0, ++0x90,0x04,0x89,0xf0,0x90,0x97,0x75,0xe0,0x90,0x04,0x8a,0xf0,0xa3,0xe4,0xf0,0x90, ++0x97,0x76,0xe0,0x90,0x04,0x8c,0xf0,0x90,0x97,0x77,0xe0,0x90,0x04,0x8d,0xf0,0x90, ++0x97,0x78,0xe0,0x90,0x04,0x8e,0xf0,0xa3,0xe4,0xf0,0x90,0x97,0x5f,0xe0,0x90,0x04, ++0x90,0xf0,0x90,0x97,0x60,0xe0,0x90,0x04,0x91,0xf0,0x90,0x97,0x61,0xe0,0x90,0x04, ++0x92,0xf0,0x90,0x97,0x62,0xe0,0x90,0x04,0x93,0xf0,0xe4,0x90,0x97,0x64,0xf0,0x90, ++0x97,0x5f,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x73,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x97,0x64,0xe0,0x90,0x04,0x97, ++0xf0,0x90,0x05,0x60,0xe0,0x90,0x97,0x3a,0xf0,0x90,0x05,0x61,0xe0,0x90,0x97,0x3b, ++0xf0,0x90,0x05,0x62,0xe0,0x90,0x97,0x3c,0xf0,0x90,0x05,0x63,0xe0,0x90,0x97,0x3d, ++0xf0,0x90,0x97,0x7c,0xe0,0xff,0x90,0x97,0x3d,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90, ++0x97,0x7c,0xe0,0xc3,0x9e,0xd3,0x94,0x01,0x40,0x11,0x90,0x97,0x6a,0xe0,0xb4,0x01, ++0x02,0x80,0x03,0x90,0x97,0x6e,0xe0,0xff,0x12,0x79,0x7c,0x22,0x90,0x97,0xb0,0xed, ++0xf0,0x90,0x97,0xaf,0xef,0xf0,0xd3,0x94,0x07,0x50,0x6d,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0, ++0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x7f,0x10, ++0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb0,0xe0,0x60,0x16,0x90,0x97,0xaf,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45,0x80, ++0x78,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x7d,0x90,0x97,0xaf,0xe0,0x24,0xf8,0xf0,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4, ++0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97, ++0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90, ++0x00,0x43,0xe0,0x4f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb0,0xe0, ++0x60,0x1b,0x90,0x97,0xaf,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x97,0xaf, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x22, ++0x90,0x01,0xc4,0x74,0x30,0xf0,0x74,0x6c,0xa3,0xf0,0x7f,0x78,0x7e,0x08,0x12,0x2b, ++0x13,0x90,0x97,0x1d,0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x13,0x90,0x97, ++0x21,0x12,0x1d,0xa9,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x13,0x90,0x97,0x25,0x12,0x1d, ++0xa9,0x90,0x97,0x97,0xe0,0x90,0x97,0x1d,0xb4,0x01,0x13,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x0d,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0xc7,0xff,0xec,0x90,0x81,0x56,0x12, ++0x1d,0xa9,0x7f,0x78,0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x21,0xe0,0xfc,0xa3,0xe0, ++0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0x54,0x0f,0xff,0xec,0x90,0x81,0x56,0x12,0x1d,0xa9, ++0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x25,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3, ++0xe0,0xfe,0xa3,0xe0,0x44,0x02,0xff,0xec,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x00, ++0x7e,0x08,0x12,0x33,0xd8,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x13,0x90,0x97,0x29,0x12, ++0x1d,0xa9,0x90,0x81,0x56,0x12,0x1d,0xb5,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e, ++0x12,0x33,0xd8,0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff, ++0x12,0x38,0xb6,0x90,0x97,0x97,0xe0,0xb4,0x01,0x11,0x90,0x81,0x24,0x12,0x1d,0xb5, ++0x00,0x00,0x00,0x00,0xe4,0xfd,0x7f,0x01,0x12,0x38,0xb6,0x90,0x00,0x11,0xe0,0x54, ++0xf6,0xf0,0x7f,0x10,0x7e,0x00,0x02,0x3a,0xa8,0x90,0x97,0x7d,0xe0,0x64,0x01,0x60, ++0x09,0x90,0x97,0x6b,0xe0,0x60,0x03,0x02,0x6e,0x01,0x90,0x97,0x5f,0xe0,0xc3,0x94, ++0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x97,0x60,0xe0,0xc3,0x94,0xff,0x50, ++0x06,0xe0,0x04,0xf0,0xe4,0x80,0x28,0x90,0x97,0x61,0xe0,0xc3,0x94,0xff,0x50,0x0a, ++0xe0,0x04,0xf0,0xe4,0x90,0x97,0x60,0xf0,0x80,0x15,0x90,0x97,0x62,0xe0,0xc3,0x94, ++0xff,0x50,0x10,0xe0,0x04,0xf0,0xe4,0x90,0x97,0x61,0xf0,0x90,0x97,0x60,0xf0,0x90, ++0x97,0x5f,0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90, ++0x97,0x73,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x97,0x74, ++0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x97,0x75,0xe0, ++0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x97,0x74,0xf0,0x90,0x97,0x73, ++0xf0,0x90,0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x97,0x76,0xe0,0xc3,0x94,0xff,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x97,0x77,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0, ++0x04,0xf0,0xe4,0x80,0x11,0x90,0x97,0x78,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04, ++0xf0,0xe4,0x90,0x97,0x77,0xf0,0x90,0x97,0x76,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01, ++0xf0,0x22,0x90,0x97,0x43,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xad,0x07,0x90, ++0x01,0xc4,0x74,0x02,0xf0,0x74,0x6e,0xa3,0xf0,0xed,0x12,0x66,0xc1,0x6e,0x3f,0x01, ++0x6e,0x4d,0x02,0x6e,0x5b,0x03,0x6e,0x69,0x05,0x6e,0x77,0x06,0x6e,0x85,0x07,0x6e, ++0x93,0x09,0x6e,0xa1,0x0c,0x6e,0xaf,0x0d,0x6e,0xbd,0x0e,0x00,0x00,0x6e,0xcb,0x90, ++0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7d,0x9d,0x90,0x97,0x43, ++0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7f,0x77,0x90,0x97,0x43,0xe0,0xfb, ++0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7d,0x17,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0, ++0xfa,0xa3,0xe0,0xf9,0x02,0x7c,0x0b,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3, ++0xe0,0xf9,0x02,0x66,0xe7,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9, ++0x02,0x7f,0x28,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x73, ++0x14,0x90,0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x64,0x34,0x90, ++0x97,0x43,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x7c,0x7e,0x90,0x97,0x43, ++0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x02,0x69,0x0f,0xc2,0xaf,0x74,0x02,0x04, ++0x90,0x01,0xc4,0xf0,0x74,0x6e,0xa3,0xf0,0x80,0xfe,0x8f,0x62,0x8d,0x63,0x90,0x01, ++0xc4,0x74,0xda,0xf0,0x74,0x6e,0xa3,0xf0,0xe5,0x62,0x54,0x0f,0xff,0x90,0x97,0x88, ++0xe0,0x54,0x0f,0x6f,0x60,0x78,0xe5,0x62,0x30,0xe2,0x30,0x90,0x97,0x88,0xe0,0x20, ++0xe2,0x05,0x7f,0x01,0x12,0x7e,0x08,0x90,0x97,0x88,0xe0,0x30,0xe3,0x0a,0xe5,0x62, ++0x20,0xe3,0x05,0x12,0x7e,0x27,0x80,0x56,0x90,0x97,0x88,0xe0,0x20,0xe3,0x4f,0xe5, ++0x62,0x30,0xe3,0x4a,0xaf,0x63,0x12,0x7d,0xe8,0x80,0x43,0x90,0x97,0x88,0xe0,0x54, ++0x0f,0xff,0xbf,0x0c,0x0e,0xe5,0x62,0x20,0xe3,0x09,0x12,0x7d,0x72,0xef,0x60,0x2e, ++0x12,0x7e,0x27,0x90,0x97,0x88,0xe0,0x54,0x0f,0xff,0xbf,0x04,0x0e,0xe5,0x62,0x20, ++0xe2,0x09,0x12,0x7b,0x8a,0xef,0x60,0x16,0x12,0x7c,0x47,0x90,0x97,0x88,0xe0,0x54, ++0x0f,0xff,0xbf,0x02,0x09,0x12,0x7a,0xb8,0xef,0x60,0x03,0x12,0x7e,0x44,0x90,0x97, ++0x88,0xe0,0x54,0x0f,0xff,0x90,0x97,0x8b,0xe0,0x54,0x0f,0x6f,0x70,0x23,0xe0,0x30, ++0xe6,0x1f,0x90,0x97,0x88,0xe0,0x54,0x0f,0xff,0x90,0x97,0x7e,0xe0,0xfe,0x4f,0x90, ++0x01,0x2f,0xf0,0xee,0x64,0x80,0x90,0x97,0x7e,0xf0,0x90,0x97,0x8b,0xe0,0x54,0xbf, ++0xf0,0x22,0x90,0x97,0x6b,0xe0,0x64,0x01,0x60,0x03,0x02,0x70,0x65,0x90,0x00,0x46, ++0xe0,0x44,0x01,0xf0,0x90,0x97,0x7d,0xe0,0x70,0x40,0x90,0x97,0x63,0xe0,0x60,0x1d, ++0x90,0x97,0x6f,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81, ++0x56,0x12,0x1d,0xa9,0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x80,0x06,0x90,0x05,0x22, ++0x74,0x7f,0xf0,0x90,0x97,0x6a,0xe0,0xff,0x12,0x79,0x7c,0x90,0x97,0x7d,0x74,0x01, ++0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xf0,0x80,0x44,0x90,0x97,0x7d,0xe0,0x64,0x01, ++0x70,0x3c,0x90,0x97,0x6e,0xe0,0xff,0x12,0x79,0x7c,0xe4,0x90,0x97,0x7d,0xf0,0x90, ++0x00,0x45,0xe0,0x44,0x01,0xf0,0x90,0x97,0x63,0xe0,0x60,0x1d,0x90,0x97,0x65,0xe0, ++0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9, ++0x7f,0x80,0x7e,0x08,0x12,0x33,0xd8,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05, ++0x87,0xe0,0x64,0x80,0xf0,0x90,0x97,0x79,0xe0,0x90,0x05,0x84,0xf0,0x90,0x97,0x7a, ++0xe0,0x90,0x05,0x85,0xf0,0x90,0x97,0x7b,0xe0,0x90,0x05,0x86,0xf0,0x90,0x97,0x7c, ++0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x97,0x30,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9, ++0xf0,0x90,0x97,0x96,0xe0,0x64,0x02,0x70,0x03,0x02,0x71,0x1b,0x90,0x01,0xaf,0xe0, ++0x60,0x09,0x90,0x01,0xc7,0xe0,0x04,0xf0,0xf0,0x80,0xf1,0x90,0x97,0xb3,0xe0,0xff, ++0x04,0xf0,0x90,0x97,0x30,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01, ++0xef,0x12,0x65,0xa7,0xa2,0xaf,0xe4,0x33,0x90,0x97,0x36,0xf0,0xc2,0xaf,0x90,0x97, ++0x30,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0x8b,0x24,0x8a,0x25,0xf5,0x26,0x75,0x27, ++0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0x12,0x79,0x27,0x90,0x97,0x36,0xe0,0x24,0xff, ++0x92,0xaf,0xa2,0xaf,0xe4,0x33,0xf0,0xc2,0xaf,0x90,0x97,0x33,0xe0,0xfb,0xa3,0xe0, ++0xfa,0xa3,0xe0,0x8b,0x24,0x8a,0x25,0xf5,0x26,0x90,0x97,0x30,0xe0,0xfb,0xa3,0xe0, ++0xfa,0xa3,0xe0,0xf9,0x12,0x1c,0xd6,0xff,0xc4,0x54,0x0f,0xf5,0x27,0x7b,0x01,0x7a, ++0x01,0x79,0xa2,0x12,0x79,0x27,0x90,0x97,0x36,0xe0,0x24,0xff,0x92,0xaf,0x90,0x01, ++0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0x22,0x90,0x01,0xc4,0x74, ++0x1c,0xf0,0x74,0x71,0xa3,0xf0,0x90,0x00,0x11,0xe0,0x44,0x09,0xf0,0x7f,0x10,0x7e, ++0x00,0x12,0x3a,0xa8,0x90,0x97,0x1d,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3, ++0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x78,0x7e,0x08,0x12,0x33,0xd8,0x90, ++0x97,0x21,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56, ++0x12,0x1d,0xa9,0x7f,0x04,0x7e,0x0c,0x12,0x33,0xd8,0x90,0x97,0x25,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xa3,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x00, ++0x7e,0x08,0x12,0x33,0xd8,0x90,0x97,0x29,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0,0xfe, ++0xa3,0xe0,0xff,0x90,0x81,0x56,0x12,0x1d,0xa9,0x7f,0x70,0x7e,0x0e,0x12,0x33,0xd8, ++0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x38,0xb6, ++0x90,0x97,0x97,0xe0,0xb4,0x01,0x11,0x90,0x81,0x24,0x12,0x1d,0xb5,0x00,0x03,0x2d, ++0x95,0xe4,0xfd,0x7f,0x01,0x12,0x38,0xb6,0x22,0x90,0x97,0x9e,0xef,0xf0,0xa3,0xed, ++0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5,0x65,0x60,0x05,0xe4,0xff,0x12,0x7e,0x99,0x90, ++0x97,0x9e,0xe0,0x30,0xe0,0x09,0x90,0x97,0xa0,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90, ++0x04,0x1d,0xe0,0x60,0x1d,0x90,0x05,0x22,0xe0,0x90,0x97,0xa2,0xf0,0xe0,0xff,0x54, ++0x90,0x60,0xec,0x90,0x01,0xc8,0x74,0xfc,0xf0,0xef,0x54,0x6f,0x90,0x05,0x22,0xf0, ++0x80,0xdd,0x90,0x97,0x9e,0xe0,0xff,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x90,0x04,0x25, ++0xef,0xf0,0x90,0x97,0x9f,0xe0,0x60,0x10,0xa3,0xa3,0xe0,0x24,0x10,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x97,0xa0,0xa3,0xe0,0xff,0xfd,0x24, ++0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x97,0xa0,0xe0,0xfe,0xa3,0xe0,0xff,0x22,0x90, ++0x97,0xb5,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x7f,0x10, ++0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb5,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05, ++0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb, ++0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8, ++0xf8,0xff,0x22,0x90,0x97,0xb5,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f, ++0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xb5,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8, ++0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x42,0xe0, ++0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13, ++0xd8,0xf8,0xff,0x22,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xa2, ++0xaf,0xe4,0x33,0xa3,0xf0,0xc2,0xaf,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3, ++0xe0,0xf9,0x90,0x00,0x01,0x12,0x66,0x20,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a, ++0xfe,0x90,0x97,0x46,0xa3,0xe0,0xfa,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x66,0x77, ++0x12,0x1c,0xd6,0xff,0x60,0x37,0xb5,0x5e,0x1b,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0, ++0xfa,0xa3,0xe0,0xf9,0x90,0x00,0x01,0x12,0x66,0x20,0x65,0x60,0x70,0x04,0xe5,0x5f, ++0x65,0xf0,0x60,0x2e,0x90,0x97,0x46,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x90, ++0x00,0x01,0x12,0x66,0x20,0xff,0xae,0xf0,0x12,0x7c,0xb4,0x80,0x15,0x90,0x97,0x46, ++0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x12,0x1c,0xd6,0x65,0x5e,0x60,0x03,0x12, ++0x7f,0x56,0x90,0x97,0x49,0xe0,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xab,0xf0,0x74,0x73, ++0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5, ++0x3d,0xe5,0x3d,0x30,0xe6,0x18,0x74,0x40,0xf0,0x90,0x97,0x6c,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x97,0x69,0xe0,0x60,0x05,0x7f,0x01,0x12,0x44,0x7b,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x97,0x6c,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x44,0x7b,0x90,0x01,0xc4,0x74,0xab,0xf0,0x74,0x73, ++0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01, ++0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xef,0x60,0x34, ++0x7d,0x7d,0x7f,0x02,0x12,0x39,0xbe,0x7d,0x02,0x7f,0x03,0x12,0x39,0xbe,0x90,0x01, ++0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x7d,0x01,0x7f,0x0c,0x12,0x6e,0xda, ++0xe4,0xff,0x12,0x7e,0x99,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a,0xe0, ++0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7d,0xf0,0xa3,0x74,0x02,0xf0,0x7d,0x7d, ++0xff,0x12,0x3a,0x2f,0x7d,0x02,0x7f,0x03,0x12,0x3a,0x2f,0x90,0x06,0x04,0xe0,0x44, ++0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07,0xf0,0x90,0x97,0x83,0xe0,0xa3,0xe0,0x90, ++0x05,0x58,0xf0,0xe5,0x64,0x30,0xe0,0x1b,0x90,0x97,0x81,0xe0,0x70,0x1a,0xe0,0x04, ++0xf0,0x90,0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x0c,0x7d,0x01,0x7f,0x04, ++0x02,0x6e,0xda,0xe4,0x90,0x97,0x81,0xf0,0x22,0x02,0x75,0x07,0x02,0x62,0xd3,0xe4, ++0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2,0x08,0xdf,0xf4,0x80, ++0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33,0xc4,0x54,0x0f,0x44, ++0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf,0xe4,0x80,0x0b,0x01, ++0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x7f,0x0e,0xe4,0x7e,0x01,0x93,0x60,0xbc, ++0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93,0xa3,0x60,0x01,0x0e, ++0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3,0xfa,0xe4,0x93,0xa3, ++0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xf0,0xa3,0xc8,0xc5, ++0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe,0x8f,0x0f,0x74,0x75, ++0x90,0x01,0xc4,0xf0,0xa3,0x74,0x4c,0xf0,0xe5,0x0f,0x75,0xf0,0x08,0xa4,0x24,0x67, ++0xf5,0x82,0xe4,0x34,0x93,0xf5,0x83,0xe0,0xff,0x74,0xa5,0x25,0x0f,0xf5,0x82,0xe4, ++0x34,0x96,0xf5,0x83,0xe0,0x54,0x1f,0xfb,0xd3,0x9f,0x40,0x02,0xab,0x07,0xeb,0x25, ++0xe0,0x24,0x9e,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0xe4,0x93,0xfe,0x74,0x01,0x93, ++0xff,0xeb,0x25,0xe0,0x24,0x66,0xf5,0x82,0xe4,0x34,0x41,0xf5,0x83,0x74,0x01,0x93, ++0x2f,0xff,0xe4,0x93,0x3e,0xc3,0x13,0xfe,0xef,0x13,0xff,0xe4,0xfc,0xfd,0xe5,0x0f, ++0x25,0xe0,0x25,0xe0,0x24,0xe1,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83,0x12,0x1d,0xa9, ++0x74,0x84,0x25,0x0f,0xf5,0x82,0xe4,0x34,0x04,0xf5,0x83,0xeb,0xf0,0xff,0x22,0x90, ++0x97,0x4c,0xef,0xf0,0xd3,0x94,0x07,0x50,0x33,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08, ++0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x7f,0x10, ++0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0x4c,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x3b,0x90,0x97,0x4c,0xe0, ++0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc, ++0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12, ++0x3a,0xa8,0x90,0x97,0x4c,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a, ++0xa8,0x22,0x8f,0x0a,0x8d,0x0b,0xad,0x03,0x74,0x76,0x90,0x01,0xc4,0xf0,0xa3,0x74, ++0x52,0xf0,0xe5,0x0b,0x54,0x1f,0xf9,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x92, ++0xf5,0x83,0xe0,0xff,0x90,0x04,0xfd,0xe0,0xb4,0x01,0x05,0x75,0x0e,0x03,0x80,0x03, ++0x75,0x0e,0x01,0xed,0xd3,0x95,0x0e,0x40,0x05,0xaf,0x0a,0x02,0x75,0x4c,0x90,0x01, ++0xc5,0x74,0x20,0xf0,0xe5,0x0d,0x2f,0xff,0xe9,0x90,0x41,0xd6,0x93,0xfe,0xef,0xd3, ++0x9e,0x40,0x22,0x90,0x01,0xc5,0x74,0x40,0xf0,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4, ++0x34,0x92,0xf5,0x83,0xe4,0xf0,0x74,0x84,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x04,0xf5, ++0x83,0xe5,0x0b,0xf0,0x22,0x74,0x01,0x25,0x0a,0xf5,0x82,0xe4,0x34,0x92,0xf5,0x83, ++0xef,0xf0,0x22,0xe4,0x90,0x97,0x2e,0xf0,0xe5,0x65,0x60,0x6c,0xe5,0x64,0x64,0x01, ++0x70,0x66,0xe5,0x65,0x64,0x02,0x60,0x06,0xe5,0x65,0x64,0x03,0x70,0x1d,0x90,0x97, ++0x7f,0xe0,0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x16,0x90,0x97,0x7f,0xe0,0x70, ++0x0a,0x90,0x97,0x8a,0xe0,0x90,0x97,0x7f,0xf0,0x80,0x00,0x90,0x97,0x2e,0x74,0x01, ++0xf0,0x90,0x97,0x2e,0xe0,0x60,0x31,0x90,0x97,0x8f,0xe0,0x44,0x10,0xf0,0x90,0x97, ++0x85,0xe0,0xf5,0x48,0xe4,0xf5,0x49,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0x12,0x38,0xec, ++0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50, ++0x07,0x7d,0x01,0x7f,0x04,0x12,0x6e,0xda,0x22,0x90,0x06,0xa9,0xe0,0xf5,0x0a,0x54, ++0xc0,0x70,0x0e,0x90,0x97,0x89,0xf0,0x90,0x97,0x8b,0xe0,0xff,0x7d,0x01,0x02,0x6e, ++0xda,0xe5,0x0a,0x30,0xe6,0x12,0x90,0x97,0x89,0x74,0x01,0xf0,0x90,0x97,0x8f,0xe0, ++0x44,0x01,0xf0,0x12,0x7e,0x7e,0x80,0x07,0x90,0x97,0x8f,0xe0,0x54,0xfe,0xf0,0xe5, ++0x0a,0x30,0xe7,0x29,0x90,0x97,0x89,0x74,0x01,0xf0,0x90,0x97,0x8f,0xe0,0x44,0x02, ++0xf0,0x75,0x48,0x03,0xe4,0xf5,0x49,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0x12,0x38,0xec, ++0x90,0x01,0x57,0x74,0x05,0xf0,0x90,0x97,0x8e,0x74,0x01,0xf0,0x22,0x90,0x97,0x8f, ++0xe0,0x54,0xfd,0xf0,0x22,0x90,0x00,0x2b,0xe0,0x44,0x01,0xf0,0x7f,0xe8,0x7e,0x03, ++0x12,0x3a,0xa8,0x90,0x00,0x08,0xe0,0x44,0x10,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a, ++0xa8,0x90,0x00,0x09,0xe0,0x54,0xf7,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90, ++0x00,0x28,0xe0,0x54,0xfe,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x20, ++0xe0,0x54,0xfe,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x25,0xe0,0x44, ++0x40,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x00,0x09,0xe0,0x54,0xef,0xf0, ++0x7f,0x10,0x7e,0x00,0x02,0x3a,0xa8,0x8b,0x10,0x8a,0x11,0x89,0x12,0x12,0x7e,0xcd, ++0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x1c,0xd6,0xf5,0x65,0x14,0x60,0x0e,0x14,0x60, ++0x0f,0x14,0x60,0x1a,0x24,0x03,0x70,0x3c,0x7f,0x01,0x80,0x35,0xe4,0xff,0x80,0x31, ++0x90,0x97,0x8a,0x74,0x01,0xf0,0x90,0x97,0x7f,0xf0,0xe4,0xff,0x80,0x23,0xab,0x10, ++0xaa,0x11,0xa9,0x12,0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0x90,0x97,0x8a,0x70,0x05, ++0x74,0x05,0xf0,0x80,0x02,0xef,0xf0,0x90,0x97,0x8a,0xe0,0x90,0x97,0x7f,0xf0,0xe4, ++0xff,0x12,0x74,0x3d,0x22,0x90,0x00,0x25,0xe0,0x54,0xbf,0xf0,0x7f,0x10,0x7e,0x00, ++0x12,0x3a,0xa8,0x90,0x00,0x20,0xe0,0x44,0x01,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a, ++0xa8,0x90,0x00,0x28,0xe0,0x44,0x01,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90, ++0x00,0xf0,0xe0,0x30,0xe1,0xf9,0x90,0x00,0x09,0xe0,0x44,0x08,0xf0,0x7f,0x10,0x7e, ++0x00,0x12,0x3a,0xa8,0x90,0x00,0x08,0xe0,0x54,0xef,0xf0,0x7f,0x10,0x7e,0x00,0x12, ++0x3a,0xa8,0x90,0x00,0x2b,0xe0,0x54,0xfe,0xf0,0x7f,0xe8,0x7e,0x03,0x02,0x3a,0xa8, ++0x90,0x00,0x45,0xe4,0xf0,0x90,0x04,0xfd,0xf0,0xa3,0xf0,0x90,0x97,0x6d,0xf0,0x90, ++0x97,0x73,0xf0,0x90,0x97,0x76,0xf0,0x90,0x97,0x74,0xf0,0x90,0x97,0x77,0xf0,0x90, ++0x97,0x75,0xf0,0x90,0x97,0x78,0xf0,0x90,0x97,0x5f,0x04,0xf0,0xe4,0xa3,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x97,0x64,0xf0,0x90,0x97,0x69,0xf0,0x90,0x97,0x6b,0xf0,0x90, ++0x97,0x7d,0xf0,0x90,0x97,0x6e,0xf0,0x90,0x97,0x6a,0xf0,0x90,0x97,0x63,0xf0,0x90, ++0x00,0x51,0xe0,0x44,0xc0,0xf0,0x22,0x8b,0x21,0x8a,0x22,0x89,0x23,0x90,0x97,0x98, ++0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0xa3,0xe5,0x24,0xf0,0xa3,0xe5,0x25,0xf0, ++0xa3,0xe5,0x26,0xf0,0xaf,0x27,0x15,0x27,0xef,0x60,0x2a,0x90,0x97,0x9b,0xe0,0xfb, ++0xa3,0xe4,0x75,0xf0,0x01,0x12,0x65,0xdf,0xa9,0xf0,0xfa,0x12,0x1c,0xd6,0xff,0x90, ++0x97,0x98,0xe0,0xfb,0xa3,0xe4,0x75,0xf0,0x01,0x12,0x65,0xdf,0xa9,0xf0,0xfa,0xef, ++0x12,0x65,0x95,0x80,0xcf,0xab,0x21,0xaa,0x22,0xa9,0x23,0x22,0x90,0x05,0x60,0xe0, ++0x90,0x97,0x79,0xf0,0x90,0x05,0x61,0xe0,0x90,0x97,0x7a,0xf0,0x90,0x05,0x62,0xe0, ++0x90,0x97,0x7b,0xf0,0x90,0x05,0x63,0xe0,0x90,0x97,0x7c,0xf0,0xc3,0x74,0xff,0x9f, ++0xfe,0x90,0x97,0x7a,0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff, ++0x0f,0xe4,0xf0,0xa3,0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x97,0x7c,0x80,0x03, ++0x90,0x97,0x7b,0xe0,0x04,0xf0,0x22,0x90,0x97,0x7a,0xe0,0x2f,0xf0,0x22,0xe4,0xf5, ++0x64,0x90,0x97,0x8f,0xf0,0xf5,0x65,0x90,0x97,0x8b,0x74,0x0c,0xf0,0x90,0x97,0x88, ++0xf0,0xe4,0x90,0x97,0x8d,0xf0,0x90,0x97,0x87,0xf0,0x90,0x97,0x86,0xf0,0x90,0x97, ++0x8a,0x04,0xf0,0x90,0x97,0x7f,0xf0,0xe4,0x90,0x97,0x8e,0xf0,0x90,0x97,0x89,0xf0, ++0x90,0x97,0x81,0xf0,0x90,0x97,0x85,0x74,0x07,0xf0,0xe4,0x90,0x97,0x80,0xf0,0x90, ++0x97,0x83,0xf0,0xa3,0x74,0x02,0xf0,0xe4,0x90,0x97,0x8c,0xf0,0x22,0xe4,0x90,0x97, ++0xad,0xf0,0xa3,0xf0,0x90,0x01,0xc4,0x74,0x1d,0xf0,0x74,0x7a,0xa3,0xf0,0x90,0x05, ++0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03, ++0x7f,0x01,0x22,0xd3,0x90,0x97,0xae,0xe0,0x94,0xe8,0x90,0x97,0xad,0xe0,0x94,0x03, ++0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x3a,0xa8,0x90,0x97,0xae,0xe0, ++0x04,0xf0,0x70,0xca,0x90,0x97,0xad,0xe0,0x04,0xf0,0x80,0xc2,0xe4,0x90,0x97,0x95, ++0xf0,0xa2,0xaf,0x33,0x90,0x97,0x3b,0xf0,0x90,0x00,0x80,0xe0,0x20,0xe1,0x1a,0x12, ++0x3a,0xbe,0x12,0x3a,0xbe,0x90,0x97,0x3a,0xe0,0x64,0x01,0xf0,0xe0,0x24,0x6c,0x90, ++0x01,0xc4,0xf0,0x74,0x7a,0xa3,0xf0,0x80,0xdf,0x90,0x06,0x30,0x74,0x01,0xf0,0xc2, ++0xaf,0x90,0x00,0x80,0xe0,0x44,0x80,0xf0,0x7f,0x10,0x7e,0x00,0x12,0x3a,0xa8,0x90, ++0x97,0x3b,0xe0,0x24,0xff,0x92,0xaf,0x22,0x90,0x01,0xc4,0x74,0xb8,0xf0,0x74,0x7a, ++0xa3,0xf0,0xe5,0x55,0x70,0x37,0x90,0x97,0x8b,0xe0,0x54,0x0f,0xd3,0x94,0x01,0x50, ++0x2c,0x90,0x02,0x87,0xe0,0x70,0x26,0x90,0x97,0x96,0xe0,0xb4,0x02,0x10,0x90,0x97, ++0x90,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x08,0x80,0x0f,0x90,0x01, ++0xaf,0xe0,0x70,0x09,0x90,0x97,0x8c,0xe0,0x60,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22, ++0x90,0x97,0x8e,0xe0,0x60,0x12,0xe4,0xf0,0xa3,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0x03, ++0x70,0x33,0x90,0x97,0x89,0xf0,0x80,0x23,0x90,0x97,0x80,0xe0,0x04,0xf0,0x90,0x97, ++0x8f,0xe0,0x54,0xef,0xf0,0x90,0x97,0x80,0xe0,0xd3,0x94,0x01,0x40,0x0d,0xe5,0x64, ++0xb4,0x01,0x12,0xa3,0xe0,0x70,0x0e,0xe0,0x04,0xf0,0x22,0x90,0x97,0x8b,0xe0,0xff, ++0x7d,0x01,0x12,0x6e,0xda,0x22,0xe4,0x90,0x97,0x3a,0xf0,0xef,0x90,0x00,0x31,0xf0, ++0xee,0x54,0x03,0xff,0xa3,0xe0,0x54,0xfc,0x4f,0xf0,0xa3,0xe0,0x54,0x7f,0xf0,0x90, ++0x00,0x30,0xe0,0x20,0xe7,0x0e,0x90,0x97,0x3a,0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0, ++0x04,0xf0,0x80,0xeb,0x90,0x97,0x3a,0xe0,0xc3,0x94,0x64,0x50,0x0a,0x90,0x00,0x30, ++0xe0,0x12,0x65,0x95,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01,0xc4,0x74,0x8a,0xf0, ++0x74,0x7b,0xa3,0xf0,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x70,0x2b,0x90,0x97, ++0x89,0xe0,0x64,0x01,0x60,0x23,0x90,0x97,0x8b,0xe0,0x54,0x0f,0xd3,0x94,0x02,0x50, ++0x18,0x90,0x97,0x8f,0xe0,0x20,0xe4,0x11,0x90,0x97,0x87,0xe0,0x64,0x01,0x60,0x09, ++0x90,0x97,0x81,0xe0,0x70,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,0x8f,0x66,0x90,0x01, ++0xc4,0x74,0xcc,0xf0,0x74,0x7b,0xa3,0xf0,0x90,0x97,0x94,0xe0,0xff,0x7d,0x01,0x12, ++0x71,0xc9,0xe5,0x66,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x01,0xf0,0x22,0x12,0x1c,0xd6,0xff,0xc3, ++0x94,0x20,0x50,0x15,0x90,0x00,0x02,0x12,0x1c,0xef,0xfe,0x74,0x23,0x2f,0xf5,0x82, ++0xe4,0x34,0x95,0xf5,0x83,0xee,0xf0,0x80,0x0e,0xef,0xb4,0x20,0x0a,0x90,0x00,0x02, ++0x12,0x1c,0xef,0x90,0x93,0x61,0xf0,0x74,0x23,0x2f,0xf5,0x82,0xe4,0x34,0x95,0xf5, ++0x83,0xe0,0x90,0x04,0xb2,0xf0,0x22,0x90,0x01,0x37,0x74,0x02,0xf0,0x90,0x05,0x22, ++0x74,0xff,0xf0,0x12,0x7a,0x1d,0xef,0x70,0x06,0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d, ++0x02,0x7f,0x03,0x12,0x3a,0x2f,0xe5,0x65,0x60,0x05,0x7f,0x01,0x12,0x7e,0x99,0x12, ++0x6c,0x30,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0,0x22,0x90,0x00, ++0x02,0x12,0x1c,0xef,0x90,0x97,0x6d,0xf0,0xe0,0x90,0x04,0x9b,0xf0,0x90,0x97,0x6d, ++0xe0,0x60,0x04,0xe0,0xb4,0xff,0x1c,0xa2,0xaf,0xe4,0x33,0xf5,0x10,0xc2,0xaf,0x90, ++0x00,0x47,0xe0,0x54,0xfb,0xf0,0x7d,0x40,0x7f,0x01,0x12,0x39,0xf8,0xe5,0x10,0x24, ++0xff,0x92,0xaf,0x22,0x90,0x97,0x4a,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x5e,0x01,0x8e, ++0x5f,0xf5,0x60,0x7f,0x0b,0x12,0x75,0xcf,0x12,0x7e,0x61,0xe4,0xff,0x12,0x7f,0x1b, ++0x90,0x97,0x4a,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x48,0xe4,0xf5,0x49,0x7d, ++0x01,0x7f,0x60,0x7e,0x01,0x02,0x38,0xec,0x7d,0x02,0x7f,0x03,0x12,0x39,0xbe,0xe5, ++0x65,0x60,0x23,0x90,0x97,0x8d,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0f,0x90, ++0x97,0x88,0xe0,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x6e, ++0xda,0xe4,0xff,0x12,0x7e,0x99,0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x1c,0xd6,0xfe, ++0xaf,0x05,0xed,0x2e,0x90,0x97,0x92,0xf0,0x90,0x00,0x01,0x12,0x1c,0xef,0xff,0xed, ++0x2f,0x90,0x97,0x93,0xf0,0x90,0x00,0x02,0x12,0x1c,0xef,0xff,0xae,0x05,0xed,0x2f, ++0x90,0x97,0x94,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x26,0x14,0x70,0x1b,0x7b,0x01, ++0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x7b,0x46,0xbf,0x01,0x09,0x90,0x06, ++0x35,0xe0,0x54,0x0f,0xf0,0x80,0x05,0x80,0x00,0x02,0x7f,0x00,0xe4,0x90,0x06,0x34, ++0xf0,0x22,0x90,0x01,0xc4,0x74,0x72,0xf0,0x74,0x7d,0xa3,0xf0,0x90,0x04,0x1b,0xe0, ++0x54,0x7f,0xff,0xbf,0x7f,0x14,0x90,0x97,0x87,0xe0,0x70,0x0e,0x90,0x97,0x8b,0xe0, ++0x54,0x0f,0xd3,0x94,0x04,0x50,0x03,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x00,0x01, ++0x12,0x1c,0xef,0x90,0x97,0x8d,0xf0,0x12,0x1c,0xd6,0x65,0x65,0x60,0x15,0xa2,0xaf, ++0xe4,0x33,0x90,0x97,0x46,0xf0,0xc2,0xaf,0x12,0x78,0x17,0x90,0x97,0x46,0xe0,0x24, ++0xff,0x92,0xaf,0x22,0x90,0x97,0x2e,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44, ++0x80,0xf0,0x90,0x97,0x33,0xe4,0xf0,0xa3,0x74,0x00,0xf0,0xa3,0x74,0x56,0xf0,0x7b, ++0x01,0x7a,0x97,0x79,0x2e,0x02,0x70,0x66,0x90,0x06,0x04,0xe0,0x54,0xbf,0xf0,0xef, ++0x60,0x0a,0xe5,0x64,0xb4,0x01,0x05,0xe4,0xff,0x12,0x7b,0xcc,0x90,0x97,0x88,0xe0, ++0x54,0xf0,0xf0,0xe0,0x44,0x0c,0xf0,0x22,0x90,0x97,0xb2,0xef,0xf0,0x12,0x71,0x1c, ++0x90,0x97,0xb2,0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x97,0x88,0xe0,0x54, ++0xf0,0xf0,0xe0,0x44,0x04,0xf0,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x64, ++0xb4,0x01,0x05,0x7f,0x01,0x12,0x7b,0xcc,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0, ++0x44,0x04,0xf0,0x22,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x01,0xf0,0x12, ++0x77,0xb5,0x12,0x78,0x75,0x90,0x97,0x88,0xe0,0x54,0xf0,0xf0,0xe0,0x44,0x02,0xf0, ++0x22,0x7f,0x0b,0x12,0x72,0x6f,0xef,0x65,0x61,0x60,0x10,0xe5,0x61,0xb4,0x01,0x05, ++0xe4,0xf5,0x61,0x80,0x03,0x75,0x61,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0x90,0x01, ++0xc4,0x74,0x7e,0xf0,0x74,0x7e,0xa3,0xf0,0x90,0x97,0x93,0xe0,0xff,0xe4,0xfd,0x12, ++0x71,0xc9,0x90,0x04,0x1f,0x74,0x01,0xf0,0x22,0xef,0x60,0x0b,0x90,0x97,0x97,0xe0, ++0xb4,0x01,0x10,0xe4,0xff,0x80,0x09,0x90,0x97,0x97,0xe0,0xb4,0x01,0x05,0x7f,0x01, ++0x12,0x4e,0x3b,0x22,0x90,0x00,0x49,0xe0,0x90,0x97,0xb4,0xf0,0xe0,0x54,0x0f,0xf0, ++0xe0,0xff,0x44,0xf0,0x90,0x00,0x49,0xf0,0xef,0x44,0xb0,0xf0,0x22,0xe4,0x90,0x97, ++0x8e,0xf0,0x90,0x97,0x80,0xf0,0x90,0x97,0x89,0xf0,0x90,0x97,0x8f,0xf0,0x22,0xe5, ++0x5e,0xb4,0x01,0x0b,0x12,0x7e,0x61,0xbf,0x01,0x05,0x7f,0x01,0x12,0x7f,0x1b,0x22, ++0x90,0x09,0x28,0xef,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22, ++0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x22,0x41,0x97, ++0xb1,0x00,0x41,0x97,0x7e,0x80,0x41,0x97,0xb3,0x00,0x00,0x90,0x01,0xca,0xe5,0x61, ++0xf0,0xef,0x60,0x03,0x12,0x7e,0xb4,0x22,0x90,0x97,0x46,0xeb,0xf0,0xa3,0xea,0xf0, ++0xa3,0xe9,0xf0,0x22,0x90,0x97,0xa7,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22, ++0x90,0x97,0xaa,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0x8f,0x82,0x8e,0x83, ++0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x5e,0x7f,0x60,0x7e,0x01,0x02,0x7f,0x4c, ++0x90,0x97,0x97,0xe0,0x90,0x97,0x2d,0xf0,0x22,0x8f,0x1b,0x8c,0x1c,0x8d,0x1d,0x22, ++0x8f,0x1e,0x8c,0x1f,0x8d,0x20,0x22,0x12,0x1c,0xd6,0xf5,0x64,0x22,0x22,0x52,0x09, ++}; ++ ++u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x800,0x80040002, ++0x804,0x00000003, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10005388, ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x01000100, ++0x82c,0x00390004, ++0x830,0x27272727, ++0x834,0x27272727, ++0x838,0x27272727, ++0x83c,0x27272727, ++0x840,0x00010000, ++0x844,0x00010000, ++0x848,0x27272727, ++0x84c,0x27272727, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x0c1b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x27272727, ++0x86c,0x2b2b2b27, ++0x870,0x07000700, ++0x874,0x22184000, ++0x878,0x08080808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xcc0000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121313, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05633, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954341e, ++0xc54,0x43bc0094, ++0xc58,0x6954341e, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x0186115b, ++0xc78,0x0000001f, ++0xc7c,0x00b99612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020403, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000010, ++0xe68,0x001b25a4, ++0xe6c,0x63db25a4, ++0xe70,0x63db25a4, ++0xe74,0x0c1b25a4, ++0xe78,0x0c1b25a4, ++0xe7c,0x0c1b25a4, ++0xe80,0x0c1b25a4, ++0xe84,0x63db25a4, ++0xe88,0x0c1b25a4, ++0xe8c,0x63db25a4, ++0xed0,0x63db25a4, ++0xed4,0x63db25a4, ++0xed8,0x63db25a4, ++0xedc,0x001b25a4, ++0xee0,0x001b25a4, ++0xeec,0x6fdb25a4, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10005388, ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x32323200, ++0x870,0x07000700, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954341e, ++0xc54,0x43bc0094, ++0xc58,0x6954341e, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength] = { ++0xe00,0xffffffff,0x07090c0c, ++0xe04,0xffffffff,0x01020405, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x0b0c0c0e, ++0xe14,0xffffffff,0x01030506, ++0xe18,0xffffffff,0x0b0c0d0e, ++0xe1c,0xffffffff,0x01030509, ++0x830,0xffffffff,0x07090c0c, ++0x834,0xffffffff,0x01020405, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x0b0c0d0e, ++0x848,0xffffffff,0x01030509, ++0x84c,0xffffffff,0x0b0c0d0e, ++0x868,0xffffffff,0x01030509, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x06060606, ++0xe14,0xffffffff,0x00020406, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x06060606, ++0x848,0xffffffff,0x00020406, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength] = { ++0xe00,0xffffffff,0x0a0c0c0c, ++0xe04,0xffffffff,0x02040608, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x0a0c0d0e, ++0xe14,0xffffffff,0x02040608, ++0xe18,0xffffffff,0x0a0c0d0e, ++0xe1c,0xffffffff,0x02040608, ++0x830,0xffffffff,0x0a0c0c0c, ++0x834,0xffffffff,0x02040608, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x0a0c0d0e, ++0x848,0xffffffff,0x02040608, ++0x84c,0xffffffff,0x0a0c0d0e, ++0x868,0xffffffff,0x02040608, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x06060606, ++0xe14,0xffffffff,0x00020406, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x06060606, ++0x848,0xffffffff,0x00020406, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x04040404, ++0xe04,0xffffffff,0x00020204, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x04040404, ++0x834,0xffffffff,0x00020204, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength] = { ++0xc30,0x69e9ac4a, ++0xc3c,0x0a979718, ++}; ++ ++u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength] = { ++0x024,0x0011800f, ++0x028,0x00ffdb83, ++0x040,0x000c0004, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10005388, ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390204, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x20202000, ++0x870,0x03000300, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00ffc3f1, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x15160000, ++0xa24,0x070b0f12, ++0xa28,0x00000104, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954342e, ++0xc54,0x43bc0094, ++0xc58,0x6954342f, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c46000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x24000090, ++0xc84,0x20f60000, ++0xc88,0x24000090, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x24242424, ++0xe04,0x24242424, ++0xe08,0x03902024, ++0xe10,0x24242424, ++0xe14,0x24242424, ++0xe18,0x24242424, ++0xe1c,0x24242424, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xee8,0x31555448, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength] = { ++0x024,0x0011800d, ++0x028,0x00ffdb83, ++0x800,0x80040000, ++0x804,0x00000001, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10005388, ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x00000000, ++0x82c,0x00000000, ++0x830,0x00000000, ++0x834,0x00000000, ++0x838,0x00000000, ++0x83c,0x00000000, ++0x840,0x00010000, ++0x844,0x00000000, ++0x848,0x00000000, ++0x84c,0x00000000, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x001b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x00000000, ++0x86c,0x32323200, ++0x870,0x07000700, ++0x874,0x22004000, ++0x878,0x00000808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xccc000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121111, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05611, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954341e, ++0xc54,0x43bc0094, ++0xc58,0x6954341e, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020401, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000008, ++0xe68,0x001b25a4, ++0xe6c,0x631b25a0, ++0xe70,0x631b25a0, ++0xe74,0x081b25a0, ++0xe78,0x081b25a0, ++0xe7c,0x081b25a0, ++0xe80,0x081b25a0, ++0xe84,0x631b25a0, ++0xe88,0x081b25a0, ++0xe8c,0x631b25a0, ++0xed0,0x631b25a0, ++0xed4,0x631b25a0, ++0xed8,0x631b25a0, ++0xedc,0x001b25a0, ++0xee0,0x001b25a0, ++0xeec,0x6b1b25a0, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength] = { ++0x024,0x0011800d, ++0x028,0x00ffdb83, ++0x800,0x80040002, ++0x804,0x00000003, ++0x808,0x0000fc00, ++0x80c,0x0000000a, ++0x810,0x10005388, ++0x814,0x020c3d10, ++0x818,0x02200385, ++0x81c,0x00000000, ++0x820,0x01000100, ++0x824,0x00390004, ++0x828,0x01000100, ++0x82c,0x00390004, ++0x830,0x27272727, ++0x834,0x27272727, ++0x838,0x27272727, ++0x83c,0x27272727, ++0x840,0x00010000, ++0x844,0x00010000, ++0x848,0x27272727, ++0x84c,0x27272727, ++0x850,0x00000000, ++0x854,0x00000000, ++0x858,0x569a569a, ++0x85c,0x0c1b25a4, ++0x860,0x66e60230, ++0x864,0x061f0130, ++0x868,0x27272727, ++0x86c,0x2b2b2b27, ++0x870,0x07000700, ++0x874,0x22184000, ++0x878,0x08080808, ++0x87c,0x00000000, ++0x880,0xc0083070, ++0x884,0x000004d5, ++0x888,0x00000000, ++0x88c,0xcc0000c0, ++0x890,0x00000800, ++0x894,0xfffffffe, ++0x898,0x40302010, ++0x89c,0x00706050, ++0x900,0x00000000, ++0x904,0x00000023, ++0x908,0x00000000, ++0x90c,0x81121313, ++0xa00,0x00d047c8, ++0xa04,0x80ff000c, ++0xa08,0x8c838300, ++0xa0c,0x2e68120f, ++0xa10,0x9500bb78, ++0xa14,0x11144028, ++0xa18,0x00881117, ++0xa1c,0x89140f00, ++0xa20,0x1a1b0000, ++0xa24,0x090e1317, ++0xa28,0x00000204, ++0xa2c,0x00d30000, ++0xa70,0x101fbf00, ++0xa74,0x00000007, ++0xc00,0x48071d40, ++0xc04,0x03a05633, ++0xc08,0x000000e4, ++0xc0c,0x6c6c6c6c, ++0xc10,0x08800000, ++0xc14,0x40000100, ++0xc18,0x08800000, ++0xc1c,0x40000100, ++0xc20,0x00000000, ++0xc24,0x00000000, ++0xc28,0x00000000, ++0xc2c,0x00000000, ++0xc30,0x69e9ac44, ++0xc34,0x469652cf, ++0xc38,0x49795994, ++0xc3c,0x0a97971c, ++0xc40,0x1f7c403f, ++0xc44,0x000100b7, ++0xc48,0xec020107, ++0xc4c,0x007f037f, ++0xc50,0x6954341e, ++0xc54,0x43bc0094, ++0xc58,0x6954341e, ++0xc5c,0x433c0094, ++0xc60,0x00000000, ++0xc64,0x5116848b, ++0xc68,0x47c00bff, ++0xc6c,0x00000036, ++0xc70,0x2c7f000d, ++0xc74,0x018610db, ++0xc78,0x0000001f, ++0xc7c,0x00b91612, ++0xc80,0x40000100, ++0xc84,0x20f60000, ++0xc88,0x40000100, ++0xc8c,0x20200000, ++0xc90,0x00121820, ++0xc94,0x00000000, ++0xc98,0x00121820, ++0xc9c,0x00007f7f, ++0xca0,0x00000000, ++0xca4,0x00000080, ++0xca8,0x00000000, ++0xcac,0x00000000, ++0xcb0,0x00000000, ++0xcb4,0x00000000, ++0xcb8,0x00000000, ++0xcbc,0x28000000, ++0xcc0,0x00000000, ++0xcc4,0x00000000, ++0xcc8,0x00000000, ++0xccc,0x00000000, ++0xcd0,0x00000000, ++0xcd4,0x00000000, ++0xcd8,0x64b22427, ++0xcdc,0x00766932, ++0xce0,0x00222222, ++0xce4,0x00000000, ++0xce8,0x37644302, ++0xcec,0x2f97d40c, ++0xd00,0x00080740, ++0xd04,0x00020403, ++0xd08,0x0000907f, ++0xd0c,0x20010201, ++0xd10,0xa0633333, ++0xd14,0x3333bc43, ++0xd18,0x7a8f5b6b, ++0xd2c,0xcc979975, ++0xd30,0x00000000, ++0xd34,0x80608000, ++0xd38,0x00000000, ++0xd3c,0x00027293, ++0xd40,0x00000000, ++0xd44,0x00000000, ++0xd48,0x00000000, ++0xd4c,0x00000000, ++0xd50,0x6437140a, ++0xd54,0x00000000, ++0xd58,0x00000000, ++0xd5c,0x30032064, ++0xd60,0x4653de68, ++0xd64,0x04518a3c, ++0xd68,0x00002101, ++0xd6c,0x2a201c16, ++0xd70,0x1812362e, ++0xd74,0x322c2220, ++0xd78,0x000e3c24, ++0xe00,0x2a2a2a2a, ++0xe04,0x2a2a2a2a, ++0xe08,0x03902a2a, ++0xe10,0x2a2a2a2a, ++0xe14,0x2a2a2a2a, ++0xe18,0x2a2a2a2a, ++0xe1c,0x2a2a2a2a, ++0xe28,0x00000000, ++0xe30,0x1000dc1f, ++0xe34,0x10008c1f, ++0xe38,0x02140102, ++0xe3c,0x681604c2, ++0xe40,0x01007c00, ++0xe44,0x01004800, ++0xe48,0xfb000000, ++0xe4c,0x000028d1, ++0xe50,0x1000dc1f, ++0xe54,0x10008c1f, ++0xe58,0x02140102, ++0xe5c,0x28160d05, ++0xe60,0x00000010, ++0xe68,0x001b25a4, ++0xe6c,0x63db25a4, ++0xe70,0x63db25a4, ++0xe74,0x0c1b25a4, ++0xe78,0x0c1b25a4, ++0xe7c,0x0c1b25a4, ++0xe80,0x0c1b25a4, ++0xe84,0x63db25a4, ++0xe88,0x0c1b25a4, ++0xe8c,0x63db25a4, ++0xed0,0x63db25a4, ++0xed4,0x63db25a4, ++0xed8,0x63db25a4, ++0xedc,0x001b25a4, ++0xee0,0x001b25a4, ++0xeec,0x6fdb25a4, ++0xf14,0x00000003, ++0xf4c,0x00000000, ++0xf00,0x00000300, ++}; ++ ++u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength] = { ++0xe00,0xffffffff,0x06080808, ++0xe04,0xffffffff,0x00040406, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x04060608, ++0xe14,0xffffffff,0x00020204, ++0xe18,0xffffffff,0x04060608, ++0xe1c,0xffffffff,0x00020204, ++0x830,0xffffffff,0x06080808, ++0x834,0xffffffff,0x00040406, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x04060608, ++0x848,0xffffffff,0x00020204, ++0x84c,0xffffffff,0x04060608, ++0x868,0xffffffff,0x00020204, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++0xe00,0xffffffff,0x00000000, ++0xe04,0xffffffff,0x00000000, ++0xe08,0x0000ff00,0x00000000, ++0x86c,0xffffff00,0x00000000, ++0xe10,0xffffffff,0x00000000, ++0xe14,0xffffffff,0x00000000, ++0xe18,0xffffffff,0x00000000, ++0xe1c,0xffffffff,0x00000000, ++0x830,0xffffffff,0x00000000, ++0x834,0xffffffff,0x00000000, ++0x838,0xffffff00,0x00000000, ++0x86c,0x000000ff,0x00000000, ++0x83c,0xffffffff,0x00000000, ++0x848,0xffffffff,0x00000000, ++0x84c,0xffffffff,0x00000000, ++0x868,0xffffffff,0x00000000, ++}; ++ ++u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287af, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x00014297, ++0x013,0x00010295, ++0x013,0x0000c298, ++0x013,0x0000819c, ++0x013,0x000040a8, ++0x013,0x0000001c, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++}; ++ ++u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f405, ++0x015,0x0004f405, ++0x015,0x0008f405, ++0x015,0x000cf405, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength] = { ++0x0, }; ++ ++ ++u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb1, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e52c, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00010255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x00000000, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f200, ++0x027,0x000ec7d9, ++0x028,0x000577c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x00032000, ++0x012,0x00071000, ++0x012,0x000b0000, ++0x012,0x000fc000, ++0x013,0x000287b3, ++0x013,0x000244b7, ++0x013,0x000204ab, ++0x013,0x0001c49f, ++0x013,0x00018493, ++0x013,0x0001429b, ++0x013,0x00010299, ++0x013,0x0000c29c, ++0x013,0x000081a0, ++0x013,0x000040ac, ++0x013,0x00000020, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f424, ++0x015,0x0004f424, ++0x015,0x0008f424, ++0x015,0x000cf424, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength] = { ++0x0, }; ++ ++u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength] = { ++0x000,0x00030159, ++0x001,0x00031284, ++0x002,0x00098000, ++0x003,0x00018c63, ++0x004,0x000210e7, ++0x009,0x0002044f, ++0x00a,0x0001adb0, ++0x00b,0x00054867, ++0x00c,0x0008992e, ++0x00d,0x0000e529, ++0x00e,0x00039ce7, ++0x00f,0x00000451, ++0x019,0x00000000, ++0x01a,0x00000255, ++0x01b,0x00060a00, ++0x01c,0x000fc378, ++0x01d,0x000a1250, ++0x01e,0x0004445f, ++0x01f,0x00080001, ++0x020,0x0000b614, ++0x021,0x0006c000, ++0x022,0x0000083c, ++0x023,0x00001558, ++0x024,0x00000060, ++0x025,0x00000483, ++0x026,0x0004f000, ++0x027,0x000ec7d9, ++0x028,0x000977c0, ++0x029,0x00004783, ++0x02a,0x00000001, ++0x02b,0x00021334, ++0x02a,0x00000000, ++0x02b,0x00000054, ++0x02a,0x00000001, ++0x02b,0x00000808, ++0x02b,0x00053333, ++0x02c,0x0000000c, ++0x02a,0x00000002, ++0x02b,0x00000808, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000003, ++0x02b,0x00000808, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000004, ++0x02b,0x00000808, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x00000005, ++0x02b,0x00000808, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x00000006, ++0x02b,0x00000709, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x00000007, ++0x02b,0x00000709, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x00000008, ++0x02b,0x0000060a, ++0x02b,0x0004b333, ++0x02c,0x0000000d, ++0x02a,0x00000009, ++0x02b,0x0000060a, ++0x02b,0x00053333, ++0x02c,0x0000000d, ++0x02a,0x0000000a, ++0x02b,0x0000060a, ++0x02b,0x0005b333, ++0x02c,0x0000000d, ++0x02a,0x0000000b, ++0x02b,0x0000060a, ++0x02b,0x00063333, ++0x02c,0x0000000d, ++0x02a,0x0000000c, ++0x02b,0x0000060a, ++0x02b,0x0006b333, ++0x02c,0x0000000d, ++0x02a,0x0000000d, ++0x02b,0x0000060a, ++0x02b,0x00073333, ++0x02c,0x0000000d, ++0x02a,0x0000000e, ++0x02b,0x0000050b, ++0x02b,0x00066666, ++0x02c,0x0000001a, ++0x02a,0x000e0000, ++0x010,0x0004000f, ++0x011,0x000e31fc, ++0x010,0x0006000f, ++0x011,0x000ff9f8, ++0x010,0x0002000f, ++0x011,0x000203f9, ++0x010,0x0003000f, ++0x011,0x000ff500, ++0x010,0x00000000, ++0x011,0x00000000, ++0x010,0x0008000f, ++0x011,0x0003f100, ++0x010,0x0009000f, ++0x011,0x00023100, ++0x012,0x000d8000, ++0x012,0x00090000, ++0x012,0x00051000, ++0x012,0x00012000, ++0x013,0x00028fb4, ++0x013,0x00024fa8, ++0x013,0x000207a4, ++0x013,0x0001c798, ++0x013,0x000183a4, ++0x013,0x00014398, ++0x013,0x000101a4, ++0x013,0x0000c198, ++0x013,0x000080a4, ++0x013,0x00004098, ++0x013,0x00000000, ++0x014,0x0001944c, ++0x014,0x00059444, ++0x014,0x0009944c, ++0x014,0x000d9444, ++0x015,0x0000f405, ++0x015,0x0004f405, ++0x015,0x0008f405, ++0x015,0x000cf405, ++0x016,0x000e0330, ++0x016,0x000a0330, ++0x016,0x00060330, ++0x016,0x00020330, ++0x000,0x00010159, ++0x018,0x0000f401, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01f,0x00080003, ++0x0fe,0x00000000, ++0x0fe,0x00000000, ++0x01e,0x00044457, ++0x01f,0x00080000, ++0x000,0x00030159, ++}; ++ ++u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength] = { ++0x0, }; ++ ++// MAC reg V13 - 2010-12-07 ++u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength] = { ++0x420,0x00000080, ++0x423,0x00000000, ++0x430,0x00000000, ++0x431,0x00000000, ++0x432,0x00000000, ++0x433,0x00000001, ++0x434,0x00000004, ++0x435,0x00000005, ++0x436,0x00000006, ++0x437,0x00000007, ++0x438,0x00000000, ++0x439,0x00000000, ++0x43a,0x00000000, ++0x43b,0x00000001, ++0x43c,0x00000004, ++0x43d,0x00000005, ++0x43e,0x00000006, ++0x43f,0x00000007, ++0x440,0x0000005d, ++0x441,0x00000001, ++0x442,0x00000000, ++0x444,0x00000015, ++0x445,0x000000f0, ++0x446,0x0000000f, ++0x447,0x00000000, ++0x458,0x00000041, ++0x459,0x000000a8, ++0x45a,0x00000072, ++0x45b,0x000000b9, ++0x460,0x00000066, ++0x461,0x00000066, ++0x462,0x00000008, ++0x463,0x00000003, ++0x4c8,0x000000ff, ++0x4c9,0x00000008, ++0x4cc,0x000000ff, ++0x4cd,0x000000ff, ++0x4ce,0x00000001, ++0x500,0x00000026, ++0x501,0x000000a2, ++0x502,0x0000002f, ++0x503,0x00000000, ++0x504,0x00000028, ++0x505,0x000000a3, ++0x506,0x0000005e, ++0x507,0x00000000, ++0x508,0x0000002b, ++0x509,0x000000a4, ++0x50a,0x0000005e, ++0x50b,0x00000000, ++0x50c,0x0000004f, ++0x50d,0x000000a4, ++0x50e,0x00000000, ++0x50f,0x00000000, ++0x512,0x0000001c, ++0x514,0x0000000a, ++0x515,0x00000010, ++0x516,0x0000000a, ++0x517,0x00000010, ++0x51a,0x00000016, ++0x524,0x0000000f, ++0x525,0x0000004f, ++0x546,0x00000040, ++0x547,0x00000000, ++0x550,0x00000010, ++0x551,0x00000010, ++0x559,0x00000002, ++0x55a,0x00000002, ++0x55d,0x000000ff, ++0x605,0x00000030, ++0x608,0x0000000e, ++0x609,0x0000002a, ++0x652,0x00000020, ++0x63c,0x0000000a, ++0x63d,0x0000000e, ++0x63e,0x0000000a, ++0x63f,0x0000000e, ++0x66e,0x00000005, ++0x700,0x00000021, ++0x701,0x00000043, ++0x702,0x00000065, ++0x703,0x00000087, ++0x708,0x00000021, ++0x709,0x00000043, ++0x70a,0x00000065, ++0x70b,0x00000087, ++}; ++ ++u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength] = { ++0x0, }; ++ ++u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7a060001, ++0xc78,0x79070001, ++0xc78,0x78080001, ++0xc78,0x77090001, ++0xc78,0x760a0001, ++0xc78,0x750b0001, ++0xc78,0x740c0001, ++0xc78,0x730d0001, ++0xc78,0x720e0001, ++0xc78,0x710f0001, ++0xc78,0x70100001, ++0xc78,0x6f110001, ++0xc78,0x6e120001, ++0xc78,0x6d130001, ++0xc78,0x6c140001, ++0xc78,0x6b150001, ++0xc78,0x6a160001, ++0xc78,0x69170001, ++0xc78,0x68180001, ++0xc78,0x67190001, ++0xc78,0x661a0001, ++0xc78,0x651b0001, ++0xc78,0x641c0001, ++0xc78,0x631d0001, ++0xc78,0x621e0001, ++0xc78,0x611f0001, ++0xc78,0x60200001, ++0xc78,0x49210001, ++0xc78,0x48220001, ++0xc78,0x47230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7a460001, ++0xc78,0x79470001, ++0xc78,0x78480001, ++0xc78,0x77490001, ++0xc78,0x764a0001, ++0xc78,0x754b0001, ++0xc78,0x744c0001, ++0xc78,0x734d0001, ++0xc78,0x724e0001, ++0xc78,0x714f0001, ++0xc78,0x70500001, ++0xc78,0x6f510001, ++0xc78,0x6e520001, ++0xc78,0x6d530001, ++0xc78,0x6c540001, ++0xc78,0x6b550001, ++0xc78,0x6a560001, ++0xc78,0x69570001, ++0xc78,0x68580001, ++0xc78,0x67590001, ++0xc78,0x665a0001, ++0xc78,0x655b0001, ++0xc78,0x645c0001, ++0xc78,0x635d0001, ++0xc78,0x625e0001, ++0xc78,0x615f0001, ++0xc78,0x60600001, ++0xc78,0x49610001, ++0xc78,0x48620001, ++0xc78,0x47630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ ++u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7a060001, ++0xc78,0x79070001, ++0xc78,0x78080001, ++0xc78,0x77090001, ++0xc78,0x760a0001, ++0xc78,0x750b0001, ++0xc78,0x740c0001, ++0xc78,0x730d0001, ++0xc78,0x720e0001, ++0xc78,0x710f0001, ++0xc78,0x70100001, ++0xc78,0x6f110001, ++0xc78,0x6e120001, ++0xc78,0x6d130001, ++0xc78,0x6c140001, ++0xc78,0x6b150001, ++0xc78,0x6a160001, ++0xc78,0x69170001, ++0xc78,0x68180001, ++0xc78,0x67190001, ++0xc78,0x661a0001, ++0xc78,0x651b0001, ++0xc78,0x641c0001, ++0xc78,0x631d0001, ++0xc78,0x621e0001, ++0xc78,0x611f0001, ++0xc78,0x60200001, ++0xc78,0x49210001, ++0xc78,0x48220001, ++0xc78,0x47230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7a460001, ++0xc78,0x79470001, ++0xc78,0x78480001, ++0xc78,0x77490001, ++0xc78,0x764a0001, ++0xc78,0x754b0001, ++0xc78,0x744c0001, ++0xc78,0x734d0001, ++0xc78,0x724e0001, ++0xc78,0x714f0001, ++0xc78,0x70500001, ++0xc78,0x6f510001, ++0xc78,0x6e520001, ++0xc78,0x6d530001, ++0xc78,0x6c540001, ++0xc78,0x6b550001, ++0xc78,0x6a560001, ++0xc78,0x69570001, ++0xc78,0x68580001, ++0xc78,0x67590001, ++0xc78,0x665a0001, ++0xc78,0x655b0001, ++0xc78,0x645c0001, ++0xc78,0x635d0001, ++0xc78,0x625e0001, ++0xc78,0x615f0001, ++0xc78,0x60600001, ++0xc78,0x49610001, ++0xc78,0x48620001, ++0xc78,0x47630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ ++u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength] = { ++0xc78,0x7b000001, ++0xc78,0x7b010001, ++0xc78,0x7b020001, ++0xc78,0x7b030001, ++0xc78,0x7b040001, ++0xc78,0x7b050001, ++0xc78,0x7b060001, ++0xc78,0x7b070001, ++0xc78,0x7b080001, ++0xc78,0x7a090001, ++0xc78,0x790a0001, ++0xc78,0x780b0001, ++0xc78,0x770c0001, ++0xc78,0x760d0001, ++0xc78,0x750e0001, ++0xc78,0x740f0001, ++0xc78,0x73100001, ++0xc78,0x72110001, ++0xc78,0x71120001, ++0xc78,0x70130001, ++0xc78,0x6f140001, ++0xc78,0x6e150001, ++0xc78,0x6d160001, ++0xc78,0x6c170001, ++0xc78,0x6b180001, ++0xc78,0x6a190001, ++0xc78,0x691a0001, ++0xc78,0x681b0001, ++0xc78,0x671c0001, ++0xc78,0x661d0001, ++0xc78,0x651e0001, ++0xc78,0x641f0001, ++0xc78,0x63200001, ++0xc78,0x62210001, ++0xc78,0x61220001, ++0xc78,0x60230001, ++0xc78,0x46240001, ++0xc78,0x45250001, ++0xc78,0x44260001, ++0xc78,0x43270001, ++0xc78,0x42280001, ++0xc78,0x41290001, ++0xc78,0x402a0001, ++0xc78,0x262b0001, ++0xc78,0x252c0001, ++0xc78,0x242d0001, ++0xc78,0x232e0001, ++0xc78,0x222f0001, ++0xc78,0x21300001, ++0xc78,0x20310001, ++0xc78,0x06320001, ++0xc78,0x05330001, ++0xc78,0x04340001, ++0xc78,0x03350001, ++0xc78,0x02360001, ++0xc78,0x01370001, ++0xc78,0x00380001, ++0xc78,0x00390001, ++0xc78,0x003a0001, ++0xc78,0x003b0001, ++0xc78,0x003c0001, ++0xc78,0x003d0001, ++0xc78,0x003e0001, ++0xc78,0x003f0001, ++0xc78,0x7b400001, ++0xc78,0x7b410001, ++0xc78,0x7b420001, ++0xc78,0x7b430001, ++0xc78,0x7b440001, ++0xc78,0x7b450001, ++0xc78,0x7b460001, ++0xc78,0x7b470001, ++0xc78,0x7b480001, ++0xc78,0x7a490001, ++0xc78,0x794a0001, ++0xc78,0x784b0001, ++0xc78,0x774c0001, ++0xc78,0x764d0001, ++0xc78,0x754e0001, ++0xc78,0x744f0001, ++0xc78,0x73500001, ++0xc78,0x72510001, ++0xc78,0x71520001, ++0xc78,0x70530001, ++0xc78,0x6f540001, ++0xc78,0x6e550001, ++0xc78,0x6d560001, ++0xc78,0x6c570001, ++0xc78,0x6b580001, ++0xc78,0x6a590001, ++0xc78,0x695a0001, ++0xc78,0x685b0001, ++0xc78,0x675c0001, ++0xc78,0x665d0001, ++0xc78,0x655e0001, ++0xc78,0x645f0001, ++0xc78,0x63600001, ++0xc78,0x62610001, ++0xc78,0x61620001, ++0xc78,0x60630001, ++0xc78,0x46640001, ++0xc78,0x45650001, ++0xc78,0x44660001, ++0xc78,0x43670001, ++0xc78,0x42680001, ++0xc78,0x41690001, ++0xc78,0x406a0001, ++0xc78,0x266b0001, ++0xc78,0x256c0001, ++0xc78,0x246d0001, ++0xc78,0x236e0001, ++0xc78,0x226f0001, ++0xc78,0x21700001, ++0xc78,0x20710001, ++0xc78,0x06720001, ++0xc78,0x05730001, ++0xc78,0x04740001, ++0xc78,0x03750001, ++0xc78,0x02760001, ++0xc78,0x01770001, ++0xc78,0x00780001, ++0xc78,0x00790001, ++0xc78,0x007a0001, ++0xc78,0x007b0001, ++0xc78,0x007c0001, ++0xc78,0x007d0001, ++0xc78,0x007e0001, ++0xc78,0x007f0001, ++0xc78,0x3800001e, ++0xc78,0x3801001e, ++0xc78,0x3802001e, ++0xc78,0x3803001e, ++0xc78,0x3804001e, ++0xc78,0x3805001e, ++0xc78,0x3806001e, ++0xc78,0x3807001e, ++0xc78,0x3808001e, ++0xc78,0x3c09001e, ++0xc78,0x3e0a001e, ++0xc78,0x400b001e, ++0xc78,0x440c001e, ++0xc78,0x480d001e, ++0xc78,0x4c0e001e, ++0xc78,0x500f001e, ++0xc78,0x5210001e, ++0xc78,0x5611001e, ++0xc78,0x5a12001e, ++0xc78,0x5e13001e, ++0xc78,0x6014001e, ++0xc78,0x6015001e, ++0xc78,0x6016001e, ++0xc78,0x6217001e, ++0xc78,0x6218001e, ++0xc78,0x6219001e, ++0xc78,0x621a001e, ++0xc78,0x621b001e, ++0xc78,0x621c001e, ++0xc78,0x621d001e, ++0xc78,0x621e001e, ++0xc78,0x621f001e, ++}; ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/Hal8192CUHWImg_wowlan.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,2564 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++#include ++#include "Hal8192CUHWImg_wowlan.h" ++ ++ ++u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x43,0x72,0x34,0x00,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x2a,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x54,0xfe,0xf0,0x02,0x50,0xd6,0x22,0xe4, ++0xf5,0x75,0x22,0x02,0x5f,0xe2,0x02,0x5f,0xe9,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x29,0xd9,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x1c,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0x65,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x5a,0x3f,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x62,0x4a,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x5a,0x3f,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x5b,0xb3,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x63, ++0x56,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x61,0xa3,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x68,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x46,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x51,0x0c,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef,0x64, ++0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12,0x36, ++0x75,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x36,0xe6,0x7d,0x10,0x7f, ++0x03,0x12,0x36,0x92,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12, ++0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a, ++0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d, ++0x7b,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0x7d,0x10,0x7f,0x03, ++0x12,0x36,0x92,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x12,0x64,0x11,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22,0x8b, ++0x0e,0x8a,0x0f,0x89,0x10,0x12,0x62,0x3e,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x29, ++0xd9,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xfe, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x7f,0x78,0x7e,0x08, ++0x12,0x27,0xde,0x90,0x90,0xd8,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde, ++0x90,0x90,0xdc,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0xe0, ++0x12,0x2a,0x7f,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43,0x09, ++0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54,0xc7, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44,0x02, ++0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x7f, ++0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xe4,0x12,0x2a,0x7f,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59, ++0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd, ++0x7f,0x01,0x12,0x34,0x81,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,0x08,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf, ++0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b, ++0xed,0xf0,0x90,0x91,0x9a,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f, ++0xf0,0x51,0xe6,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x9b,0xe0, ++0x60,0x16,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90, ++0x91,0x9a,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x51,0xde,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51, ++0xe6,0x90,0x91,0x9b,0xe0,0x60,0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f, ++0x80,0x1a,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x51,0xe6,0xd0, ++0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x51,0xe6,0xd0,0xd0, ++0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0x81,0xaa, ++0x90,0x90,0xf3,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71, ++0xee,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x45,0xe0, ++0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90, ++0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x54,0xef, ++0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38, ++0x90,0x90,0xf3,0x74,0x01,0xf0,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd, ++0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x71,0xee,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x71,0xee,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0x90,0x90,0xf5,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90, ++0x90,0xf4,0xf0,0x12,0x29,0xd9,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05, ++0x60,0xe0,0x90,0x91,0x03,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05, ++0x62,0xe0,0x90,0x91,0x05,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x12,0x6e,0x67, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xa1,0xb2, ++0x90,0x90,0xf4,0xe0,0x70,0x02,0xa1,0xb2,0x90,0x90,0xf8,0xe0,0x70,0x02,0xa1,0xb2, ++0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x71,0xe5,0x90,0x00,0x46,0xe0,0x44,0x01, ++0xfd,0x7f,0x46,0x71,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x71, ++0xee,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0, ++0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0, ++0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0, ++0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x37,0x00, ++0x80,0x2b,0x90,0x90,0xf5,0xe0,0x70,0x2d,0x90,0x91,0x07,0x71,0xe4,0x90,0x00,0x46, ++0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x71,0xee,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33, ++0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90,0x91,0x1c, ++0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12, ++0x42,0x20,0x90,0x90,0xf6,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0xef,0x12,0x2a,0x7f,0xab,0x0e,0xaa, ++0x0f,0xa9,0x10,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a, ++0x12,0x2a,0x6c,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43, ++0x09,0xec,0x54,0x03,0xfc,0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x2a,0x7f,0x90,0x05, ++0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27, ++0xde,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x2a,0x7f,0x90, ++0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x90,0xf6,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x71,0xee,0x90, ++0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10, ++0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x48, ++0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f, ++0x46,0x71,0xee,0xe4,0x90,0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54, ++0x71,0xee,0x7d,0xff,0x7f,0x55,0x71,0xee,0x7d,0xff,0x7f,0x56,0x71,0xee,0x7d,0xff, ++0x7f,0x57,0x61,0xee,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x71,0xee,0xe4,0xfd, ++0x7f,0x51,0x71,0xee,0xe4,0xfd,0x7f,0x52,0x71,0xee,0xe4,0xfd,0x7f,0x53,0x61,0xee, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x22,0xed,0xf0,0x90,0x91,0x21,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x46,0x80,0x59,0x90,0x91,0x21,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90, ++0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4, ++0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0x51,0xe6,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0, ++0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x71,0xee,0x90,0x91,0x9f,0xe0,0x44,0xb0, ++0xfd,0x7f,0x49,0x61,0xee,0x12,0x47,0xe6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff, ++0x7d,0x01,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x75,0x28,0x33,0xe4, ++0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29, ++0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3, ++0xf0,0x75,0x8e,0x02,0xf1,0x25,0xd1,0xe8,0x90,0x91,0x4f,0xef,0xf0,0xf1,0x0b,0x90, ++0x91,0x51,0xef,0xf0,0xf1,0x60,0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5, ++0x57,0xf1,0x02,0x12,0x61,0xc4,0x12,0x32,0x3d,0x12,0x44,0xff,0x11,0x0c,0xf1,0x36, ++0xd1,0xfb,0xd1,0xd0,0x12,0x44,0xfe,0x31,0x13,0x12,0x44,0xf4,0x12,0x6e,0x09,0x90, ++0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4e,0xb9,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4a,0xe6,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0, ++0x64,0x01,0xf0,0x24,0x2a,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30, ++0xe2,0x10,0x12,0x5f,0xf0,0xbf,0x01,0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12, ++0x71,0x97,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x60, ++0x2d,0x90,0x90,0xf7,0xe0,0x70,0x03,0x12,0x70,0x74,0x11,0xe7,0x90,0x91,0x3f,0xe0, ++0x90,0x01,0xba,0xf0,0x80,0xb6,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x67,0xe4,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xe1,0x17,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x29,0xd9,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x36,0xe6,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x36, ++0x75,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x31,0xf1,0x31,0x13,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x5a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x30,0x01,0x52,0x39,0x02,0x52,0x5b,0x03,0x52,0x64,0x09,0x52,0x6c, ++0x0c,0x52,0x75,0x0d,0x52,0x7d,0x0e,0x52,0x8e,0x1a,0x52,0x96,0x2c,0x52,0x41,0x2d, ++0x52,0x4a,0x2e,0x52,0x9e,0x30,0x52,0x53,0x3b,0x52,0x86,0x3c,0x00,0x00,0x52,0xa6, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0x72,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xf5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0x8d,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x65,0xd5,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x4b,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x66,0x0e,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4c,0xab,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x98,0x90,0x91,0x19, ++0x12,0x43,0x21,0x02,0x4d,0xe6,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0x90,0x90,0x91, ++0x19,0x12,0x43,0x21,0xa1,0x9b,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x7a,0x90,0x91, ++0x19,0x12,0x43,0x21,0xe1,0x78,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43, ++0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12, ++0x29,0xd9,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00, ++0x01,0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91, ++0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x26,0x80, ++0x10,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0x65,0x72,0x60,0x03,0x12,0x44, ++0xe8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72, ++0x01,0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x12,0x4f,0x10,0xe4,0xfd,0x7f,0x02, ++0x12,0x4f,0x10,0x71,0x6a,0xe4,0xff,0x71,0xcc,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5, ++0x76,0xf0,0x90,0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5, ++0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0x7f,0x0b,0x71,0xd9,0xef,0x65, ++0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05,0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x72,0x64,0x01,0x70,0x3f,0x71,0x6a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xcc,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4b, ++0xee,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4b,0xee,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x7f,0x02,0x71,0xd9,0x8f,0x76,0x90, ++0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xd7,0x22,0x90,0x01,0xca,0xe5, ++0x75,0xf0,0xef,0x60,0x03,0x12,0x4f,0xd7,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4a,0xe6,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4a,0xde,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5,0x15,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0,0x08,0x75,0x0e,0x00, ++0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91,0x48,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x12,0x66,0x56,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3, ++0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10, ++0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f,0x0a,0x7e,0x00,0x12, ++0x37,0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe, ++0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78,0x23,0xe4,0xf5,0x10, ++0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e,0xf5,0x0f,0x80,0x06, ++0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06, ++0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02,0x15,0x11,0xe5,0x12, ++0x45,0x11,0x60,0x02,0x81,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1c,0x12,0x43, ++0x41,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfe,0x4e,0xf0, ++0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x02,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff,0xe0,0x54,0xf7,0x4f, ++0xf0,0x12,0x29,0xd9,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xef,0x4e,0xf0, ++0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x40,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff,0xe0,0x54,0x7f,0x4f, ++0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0,0x54,0xfd,0x4f,0xf0, ++0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61,0xe0,0x54,0xfb,0x4f, ++0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90,0x91,0x5e,0xe0,0xff, ++0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0,0x54,0x01,0x90,0x01, ++0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x29,0xd9,0x20,0xe0,0x02,0x21,0xf1,0xe4,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0xff,0xc3, ++0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef,0x13,0x13,0x54,0x3f, ++0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x29,0xd9,0x13,0x13,0x13, ++0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0,0x90,0x91,0x61,0xe0, ++0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0, ++0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22, ++0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3, ++0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01, ++0x60,0x02,0x7f,0x00,0x22,0x12,0x29,0xd9,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80, ++0xfd,0x7f,0x80,0x02,0x4b,0xee,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41, ++0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x29,0xd9,0x60,0x02, ++0x80,0x01,0xe4,0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22, ++0x90,0x91,0x51,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd, ++0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01, ++0x12,0x42,0x20,0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90, ++0xf7,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4b,0xee,0x7d,0x40,0x7f, ++0x01,0x12,0x36,0xaf,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xcb,0xf0,0x74,0x57, ++0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a, ++0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90, ++0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0, ++0x51,0x30,0xef,0x64,0x01,0x70,0x30,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90, ++0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x91,0x37,0xf0,0x80,0x08,0x51, ++0x30,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5, ++0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0x5c,0xe5,0x2c,0x30,0xe3, ++0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57, ++0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4e,0xe4,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4a,0xe6,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x13,0x90,0x91,0x50,0x74,0x01,0xf0, ++0x90,0x01,0x36,0xf0,0x91,0x23,0x51,0x87,0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54, ++0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90, ++0x91,0x40,0xe4,0xf0,0x80,0x18,0x90,0x91,0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a, ++0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x4f,0xf5,0xe5,0x2e, ++0x30,0xe2,0x19,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05, ++0x58,0x74,0x03,0xf0,0x51,0xd8,0x90,0x91,0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3, ++0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60, ++0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4, ++0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01, ++0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01,0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57, ++0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd, ++0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01, ++0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01,0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b, ++0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8,0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30, ++0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60, ++0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30, ++0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x71,0x7e,0x74,0xcb,0x04,0x90,0x01,0xc4, ++0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0, ++0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32, ++0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x51, ++0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x91, ++0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x91,0x36,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54,0x0f,0xd3,0x94, ++0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01, ++0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d, ++0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04,0xf0,0xe5,0x70,0x64,0x03,0x60,0x05, ++0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0,0xff,0x74,0x01,0xd3,0x9f,0x50,0x14, ++0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b,0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff,0x90,0x91,0x54,0xe0,0xb5,0x07,0x07, ++0x71,0x4e,0xe4,0x90,0x91,0x55,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x42,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe5,0x6e, ++0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91,0x08,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58, ++0x90,0x91,0x71,0x12,0x43,0x41,0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0x90,0x91, ++0x80,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80, ++0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x6e,0x54, ++0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0xe4,0xff,0x12, ++0x48,0xb3,0x22,0x51,0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0, ++0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80, ++0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71, ++0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe4,0xfb,0x90,0x91,0x78,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5, ++0x70,0x70,0x02,0x81,0xb5,0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b, ++0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0, ++0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90, ++0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45, ++0x43,0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4, ++0xff,0x90,0x91,0x34,0xe0,0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5, ++0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90, ++0x91,0x2e,0xe0,0x60,0x10,0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d, ++0xf0,0x22,0x74,0x09,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0, ++0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0x53,0x91,0xef, ++0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0, ++0xff,0x90,0x00,0x56,0xe0,0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55, ++0x74,0x10,0xf0,0xe5,0x3d,0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d, ++0x30,0xe6,0x1b,0x90,0x00,0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x90,0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4c,0x03,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0x03,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56, ++0x74,0x01,0xf0,0xe5,0x3e,0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e, ++0x30,0xe2,0x06,0x90,0x00,0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00, ++0x56,0x74,0x08,0xf0,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0x99,0xf0,0x74, ++0x5d,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0, ++0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37, ++0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0x57,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90, ++0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44, ++0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90, ++0x91,0x37,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91, ++0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91, ++0x36,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10, ++0xf0,0x12,0x53,0x86,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12, ++0x6e,0xb9,0xe5,0x35,0x30,0xe0,0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f, ++0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80, ++0x1c,0xe5,0x0d,0xb4,0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05, ++0x90,0x00,0x83,0x80,0x08,0xe5,0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f, ++0x80,0x06,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f, ++0x30,0xe0,0x03,0xa3,0x80,0x03,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xf1,0x38,0x12,0x44, ++0xc2,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0, ++0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74, ++0x02,0xf0,0x74,0x99,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5d,0xa3,0xf0,0xd0,0x07,0xd0, ++0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0, ++0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xe5,0x6f,0x30,0xe6,0x19,0xe5,0x6f,0x54, ++0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90, ++0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70,0x70,0x02, ++0xe1,0xe1,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54, ++0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef,0x90,0x91, ++0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee, ++0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef, ++0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06, ++0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f,0xff,0xe4, ++0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40, ++0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44, ++0xc2,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24,0x8d,0x25,0x22, ++0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1,0x2c,0xc3,0x90, ++0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a,0x90,0x01,0xc6, ++0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x01,0x7e,0x00,0x12,0x37,0x54,0x80,0xcd,0x7f,0x01,0x22,0x90,0x01,0xcc, ++0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70,0x02,0x21,0x6f, ++0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x21,0x68,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12,0xf0,0x75,0x63, ++0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a,0x91,0x79,0x13, ++0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x91, ++0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x15, ++0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12, ++0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91, ++0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0, ++0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x51,0xf8,0x90,0x91,0x11, ++0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x91,0x9c,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x37,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0, ++0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f,0x0c,0x75,0x6e, ++0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0,0x90,0x91,0x39, ++0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x29,0xf0,0x90, ++0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32,0xf0,0xa3,0x74, ++0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74, ++0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0,0x90,0x91,0x25, ++0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0,0x90,0x91,0x26, ++0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0,0x22,0xe4,0x90, ++0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf, ++0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53,0x6e, ++0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x51,0x7e,0x90,0x91,0x9d,0xe0, ++0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90,0x00, ++0x11,0xe0,0x44,0x09,0xf0,0x12,0x4a,0xe6,0x90,0x90,0xd8,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xdc,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90, ++0xe0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd, ++0xff,0x12,0x34,0x81,0x90,0x91,0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a, ++0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0x8f,0x77,0xe4, ++0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f, ++0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91,0x97,0xe0,0x94,0x88,0x90,0x91,0x96, ++0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x91,0x96, ++0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x37,0x54,0xd3,0x90, ++0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7, ++0xe0,0x30,0xe0,0xb2,0x22,0x22,0x53,0x6e,0xf0,0x43,0x6e,0x01,0x71,0x55,0x71,0x67, ++0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x22,0x8f,0x78,0x12,0x47,0xe6,0xef,0x64,0x01, ++0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5,0x78,0x60,0x10,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01, ++0xc3,0xc0,0xd0,0x90,0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0, ++0x90,0x91,0x84,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90, ++0x91,0x87,0xe0,0x94,0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6, ++0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92, ++0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90, ++0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90, ++0x91,0x25,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0, ++0xef,0xc3,0x13,0x54,0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x13,0x13,0x54,0x01,0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70, ++0x26,0x12,0x2a,0x8b,0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f,0x12,0x2a, ++0x8b,0x00,0x00,0x03,0x10,0x80,0x24,0x12,0x2a,0x8b,0x00,0x00,0x01,0x10,0x90,0x91, ++0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f, ++0xd9,0x90,0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91, ++0x26,0xe0,0x70,0x3d,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x1f,0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02, ++0xfc,0x90,0x91,0x1f,0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb, ++0xf0,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x49,0x7f,0x90,0x01,0xe5,0xe5,0x70,0xf0, ++0x90,0x91,0x3b,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x91,0x2f,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74, ++0x0a,0xf0,0x90,0x91,0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91, ++0x35,0x74,0x05,0xf0,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90, ++0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91,0x41,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x47, ++0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0,0xf5,0x1a,0xe4, ++0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0x74, ++0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5,0x90,0x91,0x1d, ++0xe0,0x12,0x43,0x4a,0x66,0xb3,0x00,0x67,0xdc,0x01,0x66,0xba,0x02,0x66,0xba,0x03, ++0x66,0xba,0x04,0x67,0xdc,0x05,0x67,0xac,0x80,0x67,0xc2,0x81,0x67,0xdc,0x82,0x00, ++0x00,0x67,0xd8,0xaf,0x1e,0x12,0x73,0xea,0xe1,0xdc,0x90,0x91,0x1d,0xe0,0xff,0xb4, ++0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x91,0x1c,0xb4,0x03, ++0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19,0x94,0x08,0x50,0x49, ++0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f,0x40,0x02,0xe1,0xdc, ++0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a,0xff,0xc3,0x74,0x03,0x95, ++0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4b,0xee,0x80,0x1a,0xc3,0x74,0x03,0x95,0x16, ++0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a,0xfd,0xec,0x35,0x19,0x8d, ++0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xba,0xc3,0xe5,0x19,0x94,0x10,0x40,0x02, ++0xe1,0xdc,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x02,0xe1,0xdc,0xaf,0x1c,0xfc,0xfd, ++0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b, ++0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc, ++0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12, ++0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe, ++0x12,0x42,0xfc,0xa3,0x12,0x2a,0x7f,0x90,0x91,0x1e,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0xaf,0x1a,0xae,0x19,0x12,0x2f,0xd9,0x80,0x30,0xe5,0x1d,0x7f,0x00, ++0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x37,0x54, ++0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17, ++0xaf,0x18,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0, ++0x92,0xaf,0x22,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10,0x8a,0x11,0x89,0x12,0xe4,0x90, ++0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4a,0xe6,0xe5,0x0e,0x54,0x03,0xff, ++0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x54, ++0x7f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x91,0x11,0xe0, ++0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x91,0x11,0xe0,0xc3,0x94, ++0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x42,0x4d, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98,0xf0,0xa3,0xf0,0x90,0x05,0xf8, ++0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f, ++0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90,0x91,0x98,0xe0,0x94,0x03,0x40, ++0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37,0x54,0x90,0x91,0x98,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0xef,0x70,0x02,0x41,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xc1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09, ++0x12,0x2f,0xd9,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xc1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xd4,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x80,0x12,0x2a, ++0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x84,0x12,0x2a,0x7f,0x7f,0x6c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x88,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x90,0x8c,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x90,0x90,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x94,0x12, ++0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x98,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x9c,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x90,0xa0,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x90,0xa4,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xa8, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xac,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xb0,0x12,0x2a,0x7f,0x7f,0xd8,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x90,0xb4,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x90,0xb8,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90, ++0xbc,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xc0,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x90,0xc4,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x27,0xde,0x90,0x90,0xc8,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x27,0xde,0x90,0x90,0xcc,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x90,0xd0,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12, ++0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f, ++0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08, ++0x12,0x2f,0xd9,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4b,0xee, ++0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0,0x90, ++0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0,0x90, ++0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0,0x44, ++0xc0,0xfd,0x7f,0x51,0x02,0x4b,0xee,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04,0xe0, ++0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0, ++0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0,0x04, ++0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60, ++0x02,0xe1,0x6e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x90, ++0x91,0x07,0xe0,0x70,0x32,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x90,0xf4,0xe0,0xff,0xd1,0x67,0x90,0x91,0x07, ++0x74,0x01,0x12,0x4b,0xe4,0x80,0x40,0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90, ++0x90,0xf8,0xe0,0xff,0xd1,0x67,0xe4,0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44, ++0x01,0xfd,0x7f,0x45,0x12,0x4b,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9, ++0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91, ++0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91, ++0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90, ++0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x70,0x29,0x90,0x90, ++0xee,0xe0,0x64,0x14,0x60,0x03,0x02,0x70,0x29,0x90,0x90,0xfd,0xe0,0x70,0x25,0x90, ++0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91,0x01,0xe0,0x70, ++0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07,0x90,0x04,0xfd, ++0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90,0x90,0xfe,0xe0, ++0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90, ++0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04,0x49,0xf0,0x90, ++0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9,0xe0,0x90,0x04, ++0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb,0xe0,0x90,0x04, ++0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90,0xee,0xf0,0x90, ++0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,0xfd,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x8c, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x8e, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0,0xff,0x90,0x91, ++0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e,0xd3,0x94,0x01, ++0x40,0x11,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90,0xf8,0xe0,0xff, ++0x12,0x6e,0x67,0x22,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08,0x90,0x90,0xf5,0xe0, ++0x60,0x02,0x21,0x4b,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x90, ++0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0, ++0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9,0xf0,0x90,0x00,0x44, ++0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0, ++0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90,0x00,0x44,0xe0,0x30, ++0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24, ++0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90, ++0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x01,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x06,0x90,0xe0, ++0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f,0xe0,0xff,0x90, ++0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4a,0xf6,0x90,0x91,0x60,0xe0, ++0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x37,0x54,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0, ++0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0x90, ++0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90,0x01,0x1f,0xe0, ++0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91,0x56,0xe0,0x20, ++0xe0,0x02,0x61,0xc4,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0,0xff,0x90,0x91, ++0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xc4,0x90,0x91,0x11,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54,0xf8,0xff,0xed, ++0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x7a, ++0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91,0x13,0xf0,0xa3, ++0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4,0x35,0xf0,0xfe, ++0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0,0xff,0xad,0x03, ++0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19,0x74,0x02,0xf0, ++0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea,0x8f,0xf0,0x12, ++0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24,0x01,0xff,0x90, ++0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24,0x20,0x70,0x27, ++0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x02,0x61,0x9c, ++0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0,0x44,0x08,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x61,0x95,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x13,0x54,0x03, ++0x20,0xe0,0x02,0x61,0x9c,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19,0xe0,0xfe,0xef, ++0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0, ++0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x64, ++0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f,0xff,0x90,0x91, ++0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83, ++0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0,0x44,0x02,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90,0x91,0x56,0xe0, ++0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x4c,0x71,0xc9,0xbf,0x01, ++0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90,0x91,0x17,0xe0, ++0x04,0xf0,0x21,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0,0xc4,0x13,0x13, ++0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e,0xe0,0xc4,0x54, ++0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4,0x90,0x91,0x22, ++0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x1f,0x14,0xff, ++0x7d,0xff,0x12,0x34,0xb7,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,0x22,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x34,0xb7,0xc3,0xee,0x94,0x01,0x40,0x0a, ++0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,0x94,0x01,0x40, ++0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,0x05,0x07,0x90, ++0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4,0x2f,0xff,0x22, ++0x0f,0x75,}; ++ ++u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength] = { ++0xc1,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x44,0x72,0x34,0x01,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xcb,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x5c,0xb6,0x00,0x00,0x00,0x00,0x00,0x02,0x5d,0x99,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x2a,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x30,0x62,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x54,0xfe,0xf0,0x02,0x50,0xd6,0x22,0xe4, ++0xf5,0x75,0x22,0x02,0x5f,0xe2,0x02,0x5f,0xe9,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x25,0x14,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x22, ++0x65,0x90,0x91,0x09,0x12,0x25,0x08,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x25,0x08,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x24,0x62,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x1c,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x24,0x62,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x62,0x65,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x5a,0x3f,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x62,0x4a,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x5a,0x3f,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x5b,0xb3,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x63, ++0x56,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x61,0xa3,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x68,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x46,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x51,0x0c,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef,0x64, ++0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x31,0x2c,0x7d,0x02,0x7f,0x03,0x12,0x31, ++0x2c,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x31,0x9d,0x7d,0x10,0x7f, ++0x03,0x12,0x31,0x49,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x12, ++0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06,0x0a, ++0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0,0x7d, ++0x7b,0xff,0x12,0x31,0x9d,0x7d,0x02,0x7f,0x03,0x12,0x31,0x9d,0x7d,0x10,0x7f,0x03, ++0x12,0x31,0x49,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44,0x07, ++0xf0,0x12,0x64,0x11,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22,0x8b, ++0x0e,0x8a,0x0f,0x89,0x10,0x12,0x62,0x3e,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x24, ++0x62,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xfe, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x7f,0x78,0x7e,0x08, ++0x12,0x22,0x65,0x90,0x90,0xd8,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65, ++0x90,0x90,0xdc,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0xe0, ++0x12,0x25,0x08,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43,0x09, ++0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54,0xc7, ++0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90, ++0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44,0x02, ++0xff,0xec,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x7f, ++0x70,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xe4,0x12,0x25,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x68, ++0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x30,0x2c,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe4,0xfd, ++0x7f,0x01,0x12,0x30,0x2c,0x90,0x00,0x11,0xe0,0x54,0xf6,0xf0,0x80,0x08,0xf4,0xff, ++0x90,0x00,0x43,0xe0,0x5f,0xf0,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf, ++0xfe,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b, ++0xed,0xf0,0x90,0x91,0x9a,0xef,0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01, ++0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f, ++0xf0,0x51,0xe6,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xff,0x90,0x00,0x46,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x9b,0xe0, ++0x60,0x16,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x45,0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90, ++0x91,0x9a,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xc4,0x54,0xf0,0x51,0xde,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51, ++0xe6,0x90,0x91,0x9b,0xe0,0x60,0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f, ++0x80,0x1a,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x51,0xe6,0xd0, ++0xd0,0x92,0xaf,0x22,0xf0,0x90,0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x8f,0x82,0x75,0x83,0x00,0xed,0xf0,0x51,0xe6,0xd0,0xd0, ++0x92,0xaf,0x22,0xef,0x14,0x60,0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0x81,0xaa, ++0x90,0x90,0xf3,0x74,0x02,0xf0,0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71, ++0xee,0x90,0x00,0x47,0xe0,0x44,0x08,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x45,0xe0, ++0x44,0x10,0xfd,0x7f,0x45,0x80,0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12, ++0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90, ++0x00,0x45,0xe0,0x44,0xef,0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x54,0xef, ++0xfd,0x7f,0x45,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38, ++0x90,0x90,0xf3,0x74,0x01,0xf0,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd, ++0x7f,0x45,0x71,0xee,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x71,0xee,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x71,0xee,0x22,0x90,0x00,0x02,0x12,0x42, ++0x20,0x90,0x90,0xf5,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90, ++0x90,0xf4,0xf0,0x12,0x24,0x62,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05, ++0x60,0xe0,0x90,0x91,0x03,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05, ++0x62,0xe0,0x90,0x91,0x05,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf, ++0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x12,0x6e,0x67, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xa1,0xb2, ++0x90,0x90,0xf4,0xe0,0x70,0x02,0xa1,0xb2,0x90,0x90,0xf8,0xe0,0x70,0x02,0xa1,0xb2, ++0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0, ++0x90,0x91,0x1c,0xe0,0x24,0xff,0x92,0xaf,0x71,0xe5,0x90,0x00,0x46,0xe0,0x44,0x01, ++0xfd,0x7f,0x46,0x71,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x71, ++0xee,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0, ++0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0, ++0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0, ++0xc2,0xaf,0x90,0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x31,0xb7, ++0x80,0x2b,0x90,0x90,0xf5,0xe0,0x70,0x2d,0x90,0x91,0x07,0x71,0xe4,0x90,0x00,0x46, ++0xe0,0x54,0xfe,0xfd,0x7f,0x46,0x71,0xee,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33, ++0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x31,0x49,0x90,0x91,0x1c, ++0xe0,0x24,0xff,0x92,0xaf,0x22,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12, ++0x42,0x20,0x90,0x90,0xf6,0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0, ++0x7f,0x80,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0xef,0x12,0x25,0x08,0xab,0x0e,0xaa, ++0x0f,0xa9,0x10,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a, ++0x12,0x24,0xf5,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43, ++0x09,0xec,0x54,0x03,0xfc,0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x25,0x08,0x90,0x05, ++0x22,0xe4,0xf0,0x80,0x2d,0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x22, ++0x65,0xec,0x54,0x03,0xfc,0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x25,0x08,0x90, ++0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12, ++0x2b,0x08,0x90,0x90,0xf6,0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0x71,0xee,0x90, ++0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x44,0x10, ++0x80,0x1c,0x90,0x00,0x47,0xe0,0x54,0xf3,0xfd,0x7f,0x47,0x71,0xee,0x90,0x00,0x48, ++0xe0,0x54,0xf3,0xfd,0x7f,0x48,0x71,0xee,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f, ++0x46,0x71,0xee,0xe4,0x90,0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3, ++0xf0,0xa3,0xf0,0x90,0x01,0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54, ++0x71,0xee,0x7d,0xff,0x7f,0x55,0x71,0xee,0x7d,0xff,0x7f,0x56,0x71,0xee,0x7d,0xff, ++0x7f,0x57,0x61,0xee,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0x71,0xee,0xe4,0xfd, ++0x7f,0x51,0x71,0xee,0xe4,0xfd,0x7f,0x52,0x71,0xee,0xe4,0xfd,0x7f,0x53,0x61,0xee, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x22,0xed,0xf0,0x90,0x91,0x21,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x4e,0xa3,0xe0,0x70,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74, ++0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0, ++0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90, ++0x00,0x46,0x80,0x59,0x90,0x91,0x21,0xe0,0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90, ++0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4, ++0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff, ++0x90,0x00,0x43,0xe0,0x4f,0xf0,0x51,0xe6,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0x51,0xe6,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0, ++0x54,0x0f,0xf0,0x44,0xf0,0xfd,0x7f,0x49,0x71,0xee,0x90,0x91,0x9f,0xe0,0x44,0xb0, ++0xfd,0x7f,0x49,0x61,0xee,0x12,0x47,0xe6,0xbf,0x01,0x10,0x90,0x02,0x09,0xe0,0xff, ++0x7d,0x01,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x75,0x28,0x33,0xe4, ++0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3,0xe5,0x29, ++0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3, ++0xf0,0x75,0x8e,0x02,0xf1,0x25,0xd1,0xe8,0x90,0x91,0x4f,0xef,0xf0,0xf1,0x0b,0x90, ++0x91,0x51,0xef,0xf0,0xf1,0x60,0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5, ++0x57,0xf1,0x02,0x12,0x61,0xc4,0x12,0x2e,0x01,0x12,0x44,0xff,0x11,0x0c,0xf1,0x36, ++0xd1,0xfb,0xd1,0xd0,0x12,0x44,0xfe,0x31,0x13,0x12,0x44,0xf4,0x12,0x6e,0x09,0x90, ++0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4e,0xb9,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40, ++0xf0,0x12,0x4a,0xe6,0x75,0xe8,0x03,0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0, ++0x64,0x01,0xf0,0x24,0x2a,0x90,0x01,0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30, ++0xe2,0x10,0x12,0x5f,0xf0,0xbf,0x01,0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12, ++0x71,0x97,0xe5,0x57,0x30,0xe4,0x0a,0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x60, ++0x2d,0x90,0x90,0xf7,0xe0,0x70,0x03,0x12,0x70,0x74,0x11,0xe7,0x90,0x91,0x3f,0xe0, ++0x90,0x01,0xba,0xf0,0x80,0xb6,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x67,0xe4,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xe1,0x17,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x24,0x62,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x31,0x9d,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x31, ++0x2c,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x31,0xf1,0x31,0x13,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x5a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x30,0x01,0x52,0x39,0x02,0x52,0x5b,0x03,0x52,0x64,0x09,0x52,0x6c, ++0x0c,0x52,0x75,0x0d,0x52,0x7d,0x0e,0x52,0x8e,0x1a,0x52,0x96,0x2c,0x52,0x41,0x2d, ++0x52,0x4a,0x2e,0x52,0x9e,0x30,0x52,0x53,0x3b,0x52,0x86,0x3c,0x00,0x00,0x52,0xa6, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0x72,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xf5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0x8d,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x65,0xd5,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x4b,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x66,0x0e,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4c,0xab,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x98,0x90,0x91,0x19, ++0x12,0x43,0x21,0x02,0x4d,0xe6,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0x90,0x90,0x91, ++0x19,0x12,0x43,0x21,0xa1,0x9b,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x7a,0x90,0x91, ++0x19,0x12,0x43,0x21,0xe1,0x78,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43, ++0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12, ++0x24,0x62,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00, ++0x01,0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91, ++0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x26,0x80, ++0x10,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x24,0x62,0x65,0x72,0x60,0x03,0x12,0x44, ++0xe8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72, ++0x01,0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x12,0x4f,0x10,0xe4,0xfd,0x7f,0x02, ++0x12,0x4f,0x10,0x71,0x6a,0xe4,0xff,0x71,0xcc,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5, ++0x76,0xf0,0x90,0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5, ++0x45,0x7d,0x01,0x7f,0x60,0x7e,0x01,0x02,0x30,0x62,0x7f,0x0b,0x71,0xd9,0xef,0x65, ++0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05,0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe5,0x72,0x64,0x01,0x70,0x3f,0x71,0x6a,0xbf,0x01, ++0x04,0x7f,0x01,0x71,0xcc,0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0x12,0x4b, ++0xee,0x90,0x00,0x44,0xe0,0x54,0xfb,0xfd,0x7f,0x44,0x12,0x4b,0xee,0x90,0x00,0x46, ++0xe0,0x54,0xfb,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x7f,0x02,0x71,0xd9,0x8f,0x76,0x90, ++0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01,0x03,0x12,0x4f,0xd7,0x22,0x90,0x01,0xca,0xe5, ++0x75,0xf0,0xef,0x60,0x03,0x12,0x4f,0xd7,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4a,0xe6,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4a,0xde,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5,0x15,0x90,0x02,0x09, ++0xe0,0xff,0x12,0x24,0x62,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0,0x08,0x75,0x0e,0x00, ++0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10,0x2d,0xff,0x24,0x01, ++0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0,0x74,0x02,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24,0x03,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91,0x48,0xf0,0xa3,0xef, ++0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xee,0xf0,0x0f, ++0xbf,0x08,0xe0,0x12,0x66,0x56,0xef,0x70,0x3f,0x90,0x01,0xc3,0xe0,0x60,0x25,0xc3, ++0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01,0xc6,0xe0,0x44,0x10, ++0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f,0x0a,0x7e,0x00,0x12, ++0x32,0x15,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30,0xe2,0x05,0x74,0xfe, ++0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78,0x23,0xe4,0xf5,0x10, ++0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e,0xf5,0x0f,0x80,0x06, ++0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd,0x10,0xf0,0x80,0x06, ++0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02,0x15,0x11,0xe5,0x12, ++0x45,0x11,0x60,0x02,0x81,0xb8,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1c,0x12,0x43, ++0x41,0x12,0x24,0x62,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfe,0x4e,0xf0, ++0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x24,0x62,0xff,0x54,0x02,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff,0xe0,0x54,0xf7,0x4f, ++0xf0,0x12,0x24,0x62,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xef,0x4e,0xf0, ++0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x24,0x62,0xff,0x54,0x40,0xfe, ++0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff,0xe0,0x54,0x7f,0x4f, ++0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0,0x54,0xfd,0x4f,0xf0, ++0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61,0xe0,0x54,0xfb,0x4f, ++0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90,0x91,0x5e,0xe0,0xff, ++0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0,0x54,0x01,0x90,0x01, ++0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x24,0x62,0x20,0xe0,0x02,0x21,0xf1,0xe4,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x24,0x62,0xff,0xc3, ++0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef,0x13,0x13,0x54,0x3f, ++0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x24,0x62,0x13,0x13,0x13, ++0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0,0x90,0x91,0x61,0xe0, ++0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0, ++0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22, ++0x75,0x30,0x1f,0x75,0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3, ++0xe5,0x31,0xf0,0xa3,0xe5,0x32,0xf0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01, ++0x60,0x02,0x7f,0x00,0x22,0x12,0x24,0x62,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80, ++0xfd,0x7f,0x80,0x02,0x4b,0xee,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41, ++0x74,0x10,0xf0,0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x24,0x62,0x60,0x02, ++0x80,0x01,0xe4,0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22, ++0x90,0x91,0x51,0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd, ++0x7f,0x33,0x22,0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x24,0x62,0xff,0x54,0x01,0xfe,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01, ++0x12,0x42,0x20,0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90, ++0xf7,0xf0,0xe0,0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2, ++0xaf,0x90,0x00,0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4b,0xee,0x7d,0x40,0x7f, ++0x01,0x12,0x31,0x66,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0xc0,0xe0,0xc0,0xf0,0xc0, ++0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03, ++0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xcb,0xf0,0x74,0x57, ++0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5,0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a, ++0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5,0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34, ++0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x48,0x90, ++0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0, ++0x51,0x30,0xef,0x64,0x01,0x70,0x30,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90, ++0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b, ++0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x90,0x91,0x37,0xf0,0x80,0x08,0x51, ++0x30,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c,0x30,0xe1,0x20,0x90,0x01,0x34,0x74, ++0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85,0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5, ++0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9,0x5f,0x71,0x5c,0xe5,0x2c,0x30,0xe3, ++0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57, ++0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01,0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5, ++0x2c,0x30,0xe5,0x26,0x90,0x01,0xcf,0xe0,0x30,0xe5,0x1f,0xe0,0x54,0xdf,0xf0,0x90, ++0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00,0x75,0xe8,0x00,0x12,0x4e,0xe4,0x90,0x00, ++0x03,0xe0,0x54,0xfb,0xf0,0x12,0x4a,0xe6,0x80,0xfe,0xe5,0x2c,0x30,0xe6,0x06,0x90, ++0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x13,0x90,0x91,0x50,0x74,0x01,0xf0, ++0x90,0x01,0x36,0xf0,0x91,0x23,0x51,0x87,0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30, ++0xe1,0x3c,0x90,0x01,0x36,0x74,0x02,0xf0,0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54, ++0x03,0x64,0x01,0x70,0x29,0x90,0x01,0x37,0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90, ++0x91,0x40,0xe4,0xf0,0x80,0x18,0x90,0x91,0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a, ++0x40,0x0c,0xe4,0xf0,0x90,0x04,0x19,0xe0,0x30,0xe0,0x03,0x12,0x4f,0xf5,0xe5,0x2e, ++0x30,0xe2,0x19,0x90,0x01,0x36,0x74,0x04,0xf0,0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05, ++0x58,0x74,0x03,0xf0,0x51,0xd8,0x90,0x91,0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3, ++0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5,0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60, ++0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4, ++0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01, ++0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01,0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57, ++0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd, ++0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01, ++0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01,0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b, ++0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8,0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30, ++0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60, ++0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30, ++0xe1,0x08,0x90,0x01,0x37,0x74,0x02,0xf0,0x71,0x7e,0x74,0xcb,0x04,0x90,0x01,0xc4, ++0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0, ++0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32, ++0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64,0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0x51, ++0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x30,0x90,0x91, ++0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90,0x91,0x36,0xe0, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54,0x0f,0xd3,0x94, ++0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01, ++0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x90,0x91,0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d, ++0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04,0xf0,0xe5,0x70,0x64,0x03,0x60,0x05, ++0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0,0xff,0x74,0x01,0xd3,0x9f,0x50,0x14, ++0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b,0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff,0x90,0x91,0x54,0xe0,0xb5,0x07,0x07, ++0x71,0x4e,0xe4,0x90,0x91,0x55,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x42,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe5,0x6e, ++0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91,0x08,0xe0, ++0x54,0xf0,0x44,0x03,0xf0,0x54,0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58, ++0x90,0x91,0x71,0x12,0x43,0x41,0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0x90,0x91, ++0x80,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80, ++0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d,0xe5,0x6e,0x54, ++0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0xe4,0xff,0x12, ++0x48,0xb3,0x22,0x51,0x30,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0, ++0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a, ++0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80, ++0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71, ++0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10,0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60, ++0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80,0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90, ++0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f,0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0, ++0x7f,0x00,0x22,0xe4,0xfb,0x90,0x91,0x78,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5, ++0x70,0x70,0x02,0x81,0xb5,0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b, ++0x24,0xfd,0x60,0x27,0x24,0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0, ++0x14,0xf0,0xe0,0x60,0x04,0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90, ++0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45, ++0x43,0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4, ++0xff,0x90,0x91,0x34,0xe0,0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5, ++0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90, ++0x91,0x2e,0xe0,0x60,0x10,0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d, ++0xf0,0x22,0x74,0x09,0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0, ++0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0x53,0x91,0xef, ++0x90,0x00,0x51,0xe0,0xff,0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0, ++0xff,0x90,0x00,0x56,0xe0,0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55, ++0x74,0x10,0xf0,0xe5,0x3d,0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d, ++0x30,0xe6,0x1b,0x90,0x00,0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x0b,0x90,0x90,0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4c,0x03,0xe5,0x3d, ++0x30,0xe7,0x15,0x90,0x00,0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff, ++0xbf,0x03,0x05,0x7f,0x02,0x12,0x4c,0x03,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56, ++0x74,0x01,0xf0,0xe5,0x3e,0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e, ++0x30,0xe2,0x06,0x90,0x00,0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00, ++0x56,0x74,0x08,0xf0,0x90,0x01,0xc4,0x74,0xb6,0xf0,0x74,0x5c,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0, ++0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04, ++0xc0,0x05,0xc0,0x06,0xc0,0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0x99,0xf0,0x74, ++0x5d,0xa3,0xf0,0x53,0x91,0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0, ++0x55,0x31,0xf5,0x35,0xa3,0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37, ++0xe5,0x34,0x30,0xe0,0x06,0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08, ++0x90,0x01,0x3c,0x74,0x02,0xf0,0xf1,0x57,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c, ++0x74,0x04,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90, ++0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44, ++0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90, ++0x91,0x37,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0x90,0x06,0x92,0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91, ++0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59, ++0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91, ++0x36,0xe4,0xf0,0x12,0x44,0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10, ++0xf0,0x12,0x53,0x86,0xe5,0x34,0x30,0xe5,0x09,0x90,0x01,0x3c,0x74,0x20,0xf0,0x12, ++0x6e,0xb9,0xe5,0x35,0x30,0xe0,0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f, ++0xe0,0x44,0x7f,0xf0,0x90,0x00,0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80, ++0x1c,0xe5,0x0d,0xb4,0x02,0x05,0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05, ++0x90,0x00,0x83,0x80,0x08,0xe5,0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f, ++0x80,0x06,0x90,0x01,0xbe,0xe0,0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f, ++0x30,0xe0,0x03,0xa3,0x80,0x03,0x90,0x01,0xbd,0xe0,0x04,0xf0,0xf1,0x38,0x12,0x44, ++0xc2,0xe5,0x35,0x30,0xe2,0x06,0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0, ++0x06,0x90,0x01,0x3e,0x74,0x01,0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74, ++0x02,0xf0,0x74,0x99,0x04,0x90,0x01,0xc4,0xf0,0x74,0x5d,0xa3,0xf0,0xd0,0x07,0xd0, ++0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0, ++0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0xe5,0x6f,0x30,0xe6,0x19,0xe5,0x6f,0x54, ++0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64,0x80,0x90, ++0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70,0x70,0x02, ++0xe1,0xe1,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54, ++0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef,0x90,0x91, ++0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01,0xfd,0xee, ++0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80,0x12,0xef, ++0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4,0xb5,0x06, ++0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f,0xff,0xe4, ++0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80,0x98,0x40, ++0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22,0x12,0x44, ++0xc2,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24,0x8d,0x25,0x22, ++0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1,0x2c,0xc3,0x90, ++0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a,0x90,0x01,0xc6, ++0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0,0x01,0x12,0x42, ++0x81,0x7f,0x01,0x7e,0x00,0x12,0x32,0x15,0x80,0xcd,0x7f,0x01,0x22,0x90,0x01,0xcc, ++0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70,0x02,0x21,0x6f, ++0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33, ++0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0x21,0x68,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12,0xf0,0x75,0x63, ++0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a,0x91,0x79,0x13, ++0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x90,0x91, ++0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89,0x12,0x43,0x15, ++0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12, ++0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01, ++0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04, ++0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91, ++0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0, ++0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x51,0xf8,0x90,0x91,0x11, ++0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0xa8, ++0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90,0x91,0x9c,0xe0, ++0x04,0xf0,0xe0,0x54,0x03,0xf0,0x01,0x37,0x90,0x01,0xc6,0xe0,0x44,0x02,0xf0,0x22, ++0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x01,0xf0, ++0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5, ++0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83, ++0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f,0x0c,0x75,0x6e, ++0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0,0x90,0x91,0x39, ++0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x29,0xf0,0x90, ++0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32,0xf0,0xa3,0x74, ++0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74, ++0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0,0x90,0x91,0x25, ++0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0,0x90,0x91,0x26, ++0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0,0x22,0xe4,0x90, ++0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x90,0x06,0x04,0xe0,0x54,0xbf, ++0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53,0x6e, ++0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x51,0x7e,0x90,0x91,0x9d,0xe0, ++0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90,0x00, ++0x11,0xe0,0x44,0x09,0xf0,0x12,0x4a,0xe6,0x90,0x90,0xd8,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x78,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0xdc,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90, ++0xe0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b, ++0x08,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x68,0x12,0x25,0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd, ++0xff,0x12,0x30,0x2c,0x90,0x91,0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x68,0x12,0x25, ++0x14,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01,0x12,0x30,0x2c,0x22,0x8f,0x77,0xe4, ++0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09,0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f, ++0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91,0x97,0xe0,0x94,0x88,0x90,0x91,0x96, ++0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0,0x44,0x80,0xf0,0x22,0x90,0x91,0x96, ++0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14,0x7e,0x00,0x12,0x32,0x15,0xd3,0x90, ++0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0,0x94,0x00,0x40,0xb9,0x90,0x01,0xc7, ++0xe0,0x30,0xe0,0xb2,0x22,0x22,0x53,0x6e,0xf0,0x43,0x6e,0x01,0x71,0x55,0x71,0x67, ++0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x22,0x8f,0x78,0x12,0x47,0xe6,0xef,0x64,0x01, ++0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5,0x78,0x60,0x10,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef,0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0xd3,0x10,0xaf,0x01, ++0xc3,0xc0,0xd0,0x90,0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0, ++0x90,0x91,0x84,0xe0,0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90, ++0x91,0x87,0xe0,0x94,0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6, ++0xe0,0x44,0x10,0xf0,0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12, ++0x42,0x81,0x7f,0x0a,0x7e,0x00,0x12,0x32,0x15,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92, ++0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90, ++0x91,0x1f,0x12,0x25,0x14,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90, ++0x91,0x25,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0, ++0xef,0xc3,0x13,0x54,0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0x13,0x13,0x54,0x01,0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70, ++0x26,0x12,0x25,0x14,0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0x60,0x7e,0x08,0x12,0x2b,0x08,0x90,0x91,0x1f,0x12,0x25, ++0x14,0x00,0x00,0x03,0x10,0x80,0x24,0x12,0x25,0x14,0x00,0x00,0x01,0x10,0x90,0x91, ++0x1f,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x60,0x7e,0x08,0x12,0x2b, ++0x08,0x90,0x91,0x1f,0x12,0x25,0x14,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x08,0x12,0x2b,0x08,0x90,0x91, ++0x26,0xe0,0x70,0x3d,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x22, ++0x65,0x90,0x91,0x1f,0x12,0x25,0x08,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02, ++0xfc,0x90,0x91,0x1f,0x12,0x25,0x08,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x00,0x7e,0x08,0x12,0x2b,0x08,0x90,0x02,0x86,0xe0,0x54,0xfb, ++0xf0,0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x49,0x7f,0x90,0x01,0xe5,0xe5,0x70,0xf0, ++0x90,0x91,0x3b,0xe0,0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02, ++0x12,0x42,0x20,0xff,0x30,0xe0,0x25,0x12,0x24,0x62,0x90,0x91,0x2f,0xf0,0x90,0x00, ++0x01,0x12,0x42,0x20,0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d, ++0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74, ++0x0a,0xf0,0x90,0x91,0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91, ++0x35,0x74,0x05,0xf0,0x22,0x12,0x24,0x62,0x30,0xe0,0x19,0xc3,0x13,0x54,0x7f,0x90, ++0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32,0xe4,0xf0,0xa3, ++0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x90,0x02, ++0x09,0xe0,0xfd,0x12,0x24,0x62,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91,0x41,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90,0x00,0x02,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0xae,0x05,0xed, ++0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x47, ++0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0,0xf5,0x1a,0xe4, ++0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83,0xe0,0xff,0x74, ++0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5,0x90,0x91,0x1d, ++0xe0,0x12,0x43,0x4a,0x66,0xb3,0x00,0x67,0xdc,0x01,0x66,0xba,0x02,0x66,0xba,0x03, ++0x66,0xba,0x04,0x67,0xdc,0x05,0x67,0xac,0x80,0x67,0xc2,0x81,0x67,0xdc,0x82,0x00, ++0x00,0x67,0xd8,0xaf,0x1e,0x12,0x73,0xea,0xe1,0xdc,0x90,0x91,0x1d,0xe0,0xff,0xb4, ++0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90,0x91,0x1c,0xb4,0x03, ++0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19,0x94,0x08,0x50,0x49, ++0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f,0x40,0x02,0xe1,0xdc, ++0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a,0xff,0xc3,0x74,0x03,0x95, ++0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4b,0xee,0x80,0x1a,0xc3,0x74,0x03,0x95,0x16, ++0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a,0xfd,0xec,0x35,0x19,0x8d, ++0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xba,0xc3,0xe5,0x19,0x94,0x10,0x40,0x02, ++0xe1,0xdc,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x02,0xe1,0xdc,0xaf,0x1c,0xfc,0xfd, ++0xfe,0x78,0x10,0x12,0x24,0xf5,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b, ++0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0, ++0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc, ++0xfd,0xfe,0x78,0x08,0x12,0x24,0xf5,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12, ++0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab,0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe, ++0x12,0x42,0xfc,0xa3,0x12,0x25,0x08,0x90,0x91,0x1e,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0xaf,0x1a,0xae,0x19,0x12,0x2b,0x08,0x80,0x30,0xe5,0x1d,0x7f,0x00, ++0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x32,0x15, ++0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17, ++0xaf,0x18,0xfe,0x12,0x31,0x82,0x80,0x04,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0, ++0x92,0xaf,0x22,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10,0x8a,0x11,0x89,0x12,0xe4,0x90, ++0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4a,0xe6,0xe5,0x0e,0x54,0x03,0xff, ++0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x54, ++0x7f,0xf0,0x12,0x4a,0xe6,0x90,0x00,0x33,0xe0,0x20,0xe7,0x0e,0x90,0x91,0x11,0xe0, ++0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb,0x90,0x91,0x11,0xe0,0xc3,0x94, ++0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa,0x11,0xa9,0x12,0x12,0x42,0x4d, ++0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98,0xf0,0xa3,0xf0,0x90,0x05,0xf8, ++0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70,0x07,0xa3,0xe0,0x70,0x03,0x7f, ++0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90,0x91,0x98,0xe0,0x94,0x03,0x40, ++0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x32,0x15,0x90,0x91,0x98,0xe4,0x75, ++0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0xef,0x70,0x02,0x41,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xc1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x96,0x12,0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x88, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25, ++0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x96,0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd4,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xd8,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x96, ++0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09, ++0x12,0x2b,0x08,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x04,0x7e,0x08,0x12,0x2b,0x08,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xc1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x90, ++0xd4,0x12,0x25,0x08,0x7f,0x44,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0x80,0x12,0x25, ++0x08,0x7f,0x5c,0x7e,0x08,0x12,0x22,0x65,0x90,0x90,0x84,0x12,0x25,0x08,0x7f,0x6c, ++0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x88,0x12,0x25,0x08,0x7f,0x70,0x7e,0x0e,0x12, ++0x22,0x65,0x90,0x90,0x8c,0x12,0x25,0x08,0x7f,0x74,0x7e,0x0e,0x12,0x22,0x65,0x90, ++0x90,0x90,0x12,0x25,0x08,0x7f,0x78,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x94,0x12, ++0x25,0x08,0x7f,0x7c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x98,0x12,0x25,0x08,0x7f, ++0x80,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0x9c,0x12,0x25,0x08,0x7f,0x84,0x7e,0x0e, ++0x12,0x22,0x65,0x90,0x90,0xa0,0x12,0x25,0x08,0x7f,0x88,0x7e,0x0e,0x12,0x22,0x65, ++0x90,0x90,0xa4,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xa8, ++0x12,0x25,0x08,0x7f,0xd0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xac,0x12,0x25,0x08, ++0x7f,0xd4,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xb0,0x12,0x25,0x08,0x7f,0xd8,0x7e, ++0x0e,0x12,0x22,0x65,0x90,0x90,0xb4,0x12,0x25,0x08,0x7f,0xdc,0x7e,0x0e,0x12,0x22, ++0x65,0x90,0x90,0xb8,0x12,0x25,0x08,0x7f,0xe0,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90, ++0xbc,0x12,0x25,0x08,0x7f,0xec,0x7e,0x0e,0x12,0x22,0x65,0x90,0x90,0xc0,0x12,0x25, ++0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x90,0xc4,0x12,0x25,0x08,0x7f,0x04, ++0x7e,0x0d,0x12,0x22,0x65,0x90,0x90,0xc8,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12, ++0x22,0x65,0x90,0x90,0xcc,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90, ++0x90,0xd0,0x12,0x25,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x22,0x65,0x90,0x91,0x88,0x12, ++0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f, ++0x8c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25, ++0x14,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12, ++0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96, ++0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80, ++0x96,0x12,0x25,0x14,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2b,0x08,0x90, ++0x80,0x96,0x12,0x25,0x14,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2b,0x08, ++0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2b, ++0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2b,0x08,0x90,0x80,0x96,0x12,0x25,0x14,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0c,0x12,0x22,0x65,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08, ++0x7f,0x04,0x7e,0x0c,0x12,0x2b,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x22,0x65,0x90,0x91, ++0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x04,0x7e,0x0d,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12, ++0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x22,0x65, ++0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x0c,0x7e,0x09,0x12,0x2b, ++0x08,0x7f,0x04,0x7e,0x08,0x12,0x22,0x65,0x90,0x91,0x88,0x12,0x25,0x08,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x25,0x08,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x25,0x08, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x04,0x7e,0x08, ++0x12,0x2b,0x08,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4b,0xee, ++0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0,0x90, ++0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90, ++0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0,0x90, ++0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0,0x44, ++0xc0,0xfd,0x7f,0x51,0x02,0x4b,0xee,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0,0x90, ++0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0,0x90, ++0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04,0xe0, ++0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3,0xe0, ++0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0,0x04, ++0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60, ++0x02,0xe1,0x6e,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4b,0xee,0x90, ++0x91,0x07,0xe0,0x70,0x32,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43, ++0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08,0x80,0x06, ++0x90,0x05,0x22,0x74,0x7f,0xf0,0x90,0x90,0xf4,0xe0,0xff,0xd1,0x67,0x90,0x91,0x07, ++0x74,0x01,0x12,0x4b,0xe4,0x80,0x40,0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90, ++0x90,0xf8,0xe0,0xff,0xd1,0x67,0xe4,0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44, ++0x01,0xfd,0x7f,0x45,0x12,0x4b,0xee,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef, ++0x12,0x43,0x09,0x90,0x80,0x96,0x12,0x25,0x08,0x7f,0x80,0x7e,0x08,0x12,0x2b,0x08, ++0x80,0x05,0x90,0x05,0x22,0xe4,0xf0,0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91, ++0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91, ++0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90, ++0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x06,0xe0,0x04,0xf0,0x02,0x70,0x29,0x90,0x90, ++0xee,0xe0,0x64,0x14,0x60,0x03,0x02,0x70,0x29,0x90,0x90,0xfd,0xe0,0x70,0x25,0x90, ++0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91,0x01,0xe0,0x70, ++0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07,0x90,0x04,0xfd, ++0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90,0x90,0xfe,0xe0, ++0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3,0xe4,0xf0,0x90, ++0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04,0x49,0xf0,0x90, ++0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9,0xe0,0x90,0x04, ++0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb,0xe0,0x90,0x04, ++0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90,0xee,0xf0,0x90, ++0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90,0xfd,0xf0,0xa3, ++0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x8c, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x8e, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0,0xff,0x90,0x91, ++0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e,0xd3,0x94,0x01, ++0x40,0x11,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90,0xf8,0xe0,0xff, ++0x12,0x6e,0x67,0x22,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08,0x90,0x90,0xf5,0xe0, ++0x60,0x02,0x21,0x4b,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0, ++0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80, ++0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04,0xf0,0xe4,0x90,0x90, ++0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50,0x10,0xe0,0x04,0xf0, ++0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9,0xf0,0x90,0x00,0x44, ++0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd,0xe0,0xc3,0x94,0xff, ++0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3,0x94,0xff,0x50,0x06, ++0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0, ++0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90,0x00,0x44,0xe0,0x30, ++0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24, ++0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90, ++0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x01,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22,0x90,0x06,0x90,0xe0, ++0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f,0xe0,0xff,0x90, ++0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4a,0xf6,0x90,0x91,0x60,0xe0, ++0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x32,0x15,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0, ++0xff,0x7d,0x01,0x12,0x4a,0xf6,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0x90, ++0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90,0x01,0x1f,0xe0, ++0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91,0x56,0xe0,0x20, ++0xe0,0x02,0x61,0xc4,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0,0xff,0x90,0x91, ++0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xc4,0x90,0x91,0x11,0xe0,0xfc,0xa3,0xe0,0xfd, ++0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54,0xf8,0xff,0xed, ++0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x7a, ++0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91,0x13,0xf0,0xa3, ++0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4,0x35,0xf0,0xfe, ++0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0,0xff,0xad,0x03, ++0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19,0x74,0x02,0xf0, ++0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea,0x8f,0xf0,0x12, ++0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11,0xe0,0xfc,0xa3, ++0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24,0x01,0xff,0x90, ++0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90,0x91,0x11,0xf0, ++0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24,0x20,0x70,0x27, ++0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0,0x02,0x61,0x9c, ++0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0,0x44,0x08,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x61,0x95,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x13,0x54,0x03, ++0x20,0xe0,0x02,0x61,0x9c,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19,0xe0,0xfe,0xef, ++0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0, ++0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x64, ++0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f,0xff,0x90,0x91, ++0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83, ++0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0,0x44,0x02,0xfd, ++0x7f,0x81,0x12,0x4b,0xee,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90,0x91,0x56,0xe0, ++0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x4c,0x71,0xc9,0xbf,0x01, ++0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90,0x91,0x17,0xe0, ++0x04,0xf0,0x21,0xd9,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0,0xc4,0x13,0x13, ++0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e,0xe0,0xc4,0x54, ++0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4,0x90,0x91,0x22, ++0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50,0x0e,0xef,0x04, ++0xfd,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5,0x1f,0x14,0xff, ++0x7d,0xff,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91,0x22,0xe0,0xc3, ++0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x2d,0x4d,0x90,0x91,0x22,0xe0,0x04, ++0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x2d,0x4d,0xc3,0xee,0x94,0x01,0x40,0x0a, ++0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee,0x94,0x01,0x40, ++0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5,0x05,0x07,0x90, ++0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4,0x2f,0xff,0x22, ++0x14,0x25,}; ++ ++ ++ ++u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength] = { ++0xc2,0x88,0x02,0x00,0x51,0x00,0x00,0x00,0x03,0x23,0x16,0x45,0x66,0x34,0x01,0x00, ++0x58,0x92,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x02,0x43,0x9d,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x4a,0x22,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x02,0x57,0xe1,0x00,0x00,0x00,0x00,0x00,0x02,0x58,0xc4,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, ++0xbb,0x01,0x0c,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe0,0x22,0x50, ++0x06,0xe9,0x25,0x82,0xf8,0xe6,0x22,0xbb,0xfe,0x06,0xe9,0x25,0x82,0xf8,0xe2,0x22, ++0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe4,0x93,0x22,0xbb,0x01,0x06, ++0x89,0x82,0x8a,0x83,0xf0,0x22,0x50,0x02,0xf7,0x22,0xbb,0xfe,0x01,0xf3,0x22,0xf8, ++0xbb,0x01,0x0d,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0x22, ++0x50,0x06,0xe9,0x25,0x82,0xc8,0xf6,0x22,0xbb,0xfe,0x05,0xe9,0x25,0x82,0xc8,0xf2, ++0x22,0xc5,0xf0,0xf8,0xa3,0xe0,0x28,0xf0,0xc5,0xf0,0xf8,0xe5,0x82,0x15,0x82,0x70, ++0x02,0x15,0x83,0xe0,0x38,0xf0,0x22,0xbb,0x01,0x10,0xe5,0x82,0x29,0xf5,0x82,0xe5, ++0x83,0x3a,0xf5,0x83,0xe0,0xf5,0xf0,0xa3,0xe0,0x22,0x50,0x09,0xe9,0x25,0x82,0xf8, ++0x86,0xf0,0x08,0xe6,0x22,0xbb,0xfe,0x0a,0xe9,0x25,0x82,0xf8,0xe2,0xf5,0xf0,0x08, ++0xe2,0x22,0xe5,0x83,0x2a,0xf5,0x83,0xe9,0x93,0xf5,0xf0,0xa3,0xe9,0x93,0x22,0xf8, ++0xbb,0x01,0x11,0xe5,0x82,0x29,0xf5,0x82,0xe5,0x83,0x3a,0xf5,0x83,0xe8,0xf0,0xe5, ++0xf0,0xa3,0xf0,0x22,0x50,0x09,0xe9,0x25,0x82,0xc8,0xf6,0x08,0xa6,0xf0,0x22,0xbb, ++0xfe,0x09,0xe9,0x25,0x82,0xc8,0xf2,0xe5,0xf0,0x08,0xf2,0x22,0xef,0x4b,0xff,0xee, ++0x4a,0xfe,0xed,0x49,0xfd,0xec,0x48,0xfc,0x22,0xe0,0xfc,0xa3,0xe0,0xfd,0xa3,0xe0, ++0xfe,0xa3,0xe0,0xff,0x22,0xa4,0x25,0x82,0xf5,0x82,0xe5,0xf0,0x35,0x83,0xf5,0x83, ++0x22,0xe0,0xfb,0xa3,0xe0,0xfa,0xa3,0xe0,0xf9,0x22,0xf8,0xe0,0xfb,0xa3,0xa3,0xe0, ++0xf9,0x25,0xf0,0xf0,0xe5,0x82,0x15,0x82,0x70,0x02,0x15,0x83,0xe0,0xfa,0x38,0xf0, ++0x22,0xeb,0xf0,0xa3,0xea,0xf0,0xa3,0xe9,0xf0,0x22,0xd0,0x83,0xd0,0x82,0xf8,0xe4, ++0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3,0x93,0xf8,0x74,0x01,0x93,0xf5, ++0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0x68,0x60,0xef,0xa3,0xa3,0xa3,0x80,0xdf, ++0xd0,0x83,0xd0,0x82,0xf8,0xe4,0x93,0x70,0x12,0x74,0x01,0x93,0x70,0x0d,0xa3,0xa3, ++0x93,0xf8,0x74,0x01,0x93,0xf5,0x82,0x88,0x83,0xe4,0x73,0x74,0x02,0x93,0xb5,0xf0, ++0x06,0x74,0x03,0x93,0x68,0x60,0xe9,0xa3,0xa3,0xa3,0xa3,0x80,0xd8,0x02,0x43,0xdb, ++0x02,0x50,0x34,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0x40,0x03,0xf6,0x80,0x01,0xf2, ++0x08,0xdf,0xf4,0x80,0x29,0xe4,0x93,0xa3,0xf8,0x54,0x07,0x24,0x0c,0xc8,0xc3,0x33, ++0xc4,0x54,0x0f,0x44,0x20,0xc8,0x83,0x40,0x04,0xf4,0x56,0x80,0x01,0x46,0xf6,0xdf, ++0xe4,0x80,0x0b,0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0x90,0x44,0x20,0xe4,0x7e, ++0x01,0x93,0x60,0xbc,0xa3,0xff,0x54,0x3f,0x30,0xe5,0x09,0x54,0x1f,0xfe,0xe4,0x93, ++0xa3,0x60,0x01,0x0e,0xcf,0x54,0xc0,0x25,0xe0,0x60,0xa8,0x40,0xb8,0xe4,0x93,0xa3, ++0xfa,0xe4,0x93,0xa3,0xf8,0xe4,0x93,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca, ++0xf0,0xa3,0xc8,0xc5,0x82,0xc8,0xca,0xc5,0x83,0xca,0xdf,0xe9,0xde,0xe7,0x80,0xbe, ++0x41,0x91,0x40,0x00,0x41,0x91,0x9c,0x00,0x41,0x91,0x23,0x80,0x41,0x91,0x24,0x80, ++0x41,0x91,0x9e,0x00,0x41,0x91,0x52,0x00,0x41,0x91,0x93,0x00,0x41,0x91,0x91,0x00, ++0x41,0x91,0x90,0x00,0x41,0x91,0x92,0x00,0x00,0xf0,0x90,0x91,0x30,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x54,0x7e,0x01,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x65,0xeb,0xf0,0xa3,0xe0,0xfb,0xa3,0xe0,0xf5,0x44,0xe4,0xf5,0x45,0x12, ++0x35,0xab,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x01,0x5f,0xe4,0xf0,0x90,0x01,0x3c,0x74, ++0x08,0xf0,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4, ++0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x91,0x59,0x90,0x01,0x5f,0x74,0x05,0xf0,0x90,0x06, ++0x92,0x74,0x02,0xf0,0x90,0x91,0x36,0x14,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x0c, ++0x50,0x02,0xf1,0x23,0x22,0x90,0x02,0x84,0xef,0xf0,0xa3,0xee,0xf0,0xa3,0x74,0x05, ++0xf0,0x22,0x7d,0x01,0xaf,0x6f,0xe1,0x27,0xf1,0xe6,0xbf,0x01,0x10,0x90,0x91,0x42, ++0xe0,0xff,0xe4,0xfd,0x12,0x48,0x22,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0x8f,0x82, ++0x8e,0x83,0xa3,0xa3,0xa3,0xe4,0xf0,0x22,0xe4,0xf5,0x72,0x7f,0x60,0x7e,0x01,0x80, ++0xed,0x7f,0x00,0x22,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0,0x22,0x22, ++0x22,0x22,0x22,0x02,0x5e,0x55,0x02,0x5e,0x5c,0xef,0x8e,0xf0,0x71,0x70,0x45,0x26, ++0x00,0x40,0x45,0x4e,0x00,0x80,0x45,0x79,0x01,0x00,0x45,0x8d,0x02,0x00,0x45,0xa5, ++0x04,0x00,0x00,0x00,0x45,0xc2,0xed,0x54,0x3f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x00,0x7f,0x40,0xef,0x2d,0xff,0xee,0x3c,0xfe,0xef,0x78,0x06,0xce,0xc3,0x13,0xce, ++0x13,0xd8,0xf9,0x78,0x06,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0x80,0x26,0xed,0x54, ++0x7f,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x00,0x7f,0x80,0xef,0x2d,0xff,0xee,0x3c, ++0xfe,0xef,0x78,0x07,0xce,0xc3,0x13,0xce,0x13,0xd8,0xf9,0x78,0x07,0xc3,0x33,0xce, ++0x33,0xce,0xd8,0xf9,0xfd,0xac,0x06,0x80,0x49,0xed,0x70,0x04,0xfe,0xff,0x80,0x04, ++0x7e,0x01,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x7d,0x00,0xfc,0x80,0x35,0xec,0x54,0x01, ++0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e,0x02,0x7f,0x00,0xef,0x2d,0xee,0x3c,0xc3, ++0x13,0x7d,0x00,0x80,0x1a,0xec,0x54,0x03,0x4d,0x70,0x04,0xfe,0xff,0x80,0x04,0x7e, ++0x04,0x7f,0x00,0xef,0x2d,0xee,0x3c,0x13,0x13,0x54,0x3f,0x7d,0x00,0x25,0xe0,0x25, ++0xe0,0xfc,0xae,0x04,0xaf,0x05,0x22,0x90,0x91,0x09,0x12,0x2a,0x8b,0x00,0x00,0x00, ++0x00,0x90,0x06,0xa9,0xe0,0x90,0x91,0x08,0xf0,0xe0,0x54,0xc0,0x70,0x0a,0x53,0x71, ++0xfe,0x53,0x71,0xfd,0x91,0xc2,0x80,0x47,0x90,0x91,0x26,0xe0,0x60,0x41,0x90,0x91, ++0x38,0xe0,0x70,0x3b,0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27, ++0xde,0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0xec,0x44,0x02,0xfc, ++0x90,0x91,0x09,0x12,0x2a,0x7f,0x90,0x91,0x09,0x71,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90, ++0x91,0x08,0xe0,0x30,0xe6,0x13,0x43,0x71,0x01,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60, ++0x04,0x91,0xc8,0x80,0x07,0x91,0x77,0x80,0x03,0x53,0x71,0xfe,0x90,0x91,0x08,0xe0, ++0x30,0xe7,0x16,0x43,0x71,0x02,0xe4,0x90,0x91,0x66,0x91,0x49,0x90,0x01,0x57,0x74, ++0x05,0xf0,0x90,0x91,0x3c,0x74,0x01,0xf0,0x22,0x53,0x71,0xfd,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x8b,0x60,0x8a,0x61,0x89,0x62,0x90,0x91,0x68,0x71,0x41,0xab, ++0x63,0xaa,0x64,0xa9,0x65,0x90,0x91,0x6b,0x71,0x41,0xaf,0x66,0x15,0x66,0xef,0x60, ++0x1b,0x90,0x91,0x6b,0xe4,0x75,0xf0,0x01,0x71,0x2a,0x12,0x29,0xd9,0xff,0x90,0x91, ++0x68,0xe4,0x75,0xf0,0x01,0x71,0x2a,0xef,0x51,0x4d,0x80,0xde,0xab,0x60,0xaa,0x61, ++0xa9,0x62,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x6e,0x71,0x41,0x90,0x91,0x9e,0xe0,0xff,0x04,0xf0,0x90,0x00,0x01,0xef,0x51,0x5f, ++0x7f,0xaf,0x7e,0x01,0x12,0x64,0x88,0xef,0x60,0x44,0x90,0x91,0x6e,0x71,0x21,0x8b, ++0x63,0x8a,0x64,0x89,0x65,0x75,0x66,0x02,0x7b,0x01,0x7a,0x01,0x79,0xa0,0xd1,0x6d, ++0x90,0x91,0x71,0x71,0x21,0x8b,0x63,0x8a,0x64,0x89,0x65,0x90,0x91,0x6e,0x71,0x21, ++0x12,0x29,0xd9,0xff,0xc4,0x54,0x0f,0xf5,0x66,0x7b,0x01,0x7a,0x01,0x79,0xa2,0xd1, ++0x6d,0x90,0x01,0xaf,0x74,0xff,0xf0,0x90,0x01,0xcb,0xe0,0x64,0x80,0xf0,0xd0,0xd0, ++0x92,0xaf,0x22,0x7d,0x01,0x7f,0x0c,0x90,0x91,0x95,0xed,0xf0,0x90,0x91,0x94,0xef, ++0xf0,0x54,0x0f,0xff,0xe5,0x6e,0x54,0x0f,0x6f,0x60,0x76,0x90,0x91,0x94,0xe0,0x30, ++0xe2,0x30,0xe5,0x6e,0x20,0xe2,0x05,0x7f,0x01,0x12,0x61,0x86,0xe5,0x6e,0x30,0xe3, ++0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3,0x08,0x12,0x60,0xb1,0xef,0x60,0x53,0x80,0x52, ++0xe5,0x6e,0x20,0xe3,0x4c,0x90,0x91,0x94,0xe0,0x30,0xe3,0x45,0xa3,0xe0,0xff,0x02, ++0x61,0x6b,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x0c,0x0f,0x90,0x91,0x94,0xe0,0x20,0xe3, ++0x08,0x12,0x60,0xb1,0xef,0x60,0x2a,0xf1,0xb2,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x04, ++0x10,0x90,0x91,0x94,0xe0,0x20,0xe2,0x09,0x12,0x60,0xfa,0xef,0x60,0x13,0x12,0x48, ++0xce,0xe5,0x6e,0x54,0x0f,0xff,0xbf,0x02,0x08,0x91,0xf1,0xef,0x60,0x03,0x12,0x62, ++0x6c,0x22,0x90,0x06,0x04,0xe0,0x44,0x40,0xf0,0xe5,0x6d,0xb4,0x01,0x04,0x7f,0x01, ++0xf1,0xc9,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x8f,0x67,0xf1,0xe6,0xbf,0x01,0x15, ++0x90,0x91,0x43,0x12,0x48,0x1e,0xad,0x07,0xac,0x06,0xaf,0x67,0x12,0x60,0x16,0x90, ++0x04,0x1f,0x74,0x20,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x01,0xc4, ++0x74,0xe6,0xf0,0x74,0x47,0xa3,0xf0,0x90,0x04,0x1d,0xe0,0x60,0x1a,0x90,0x05,0x22, ++0xe0,0x54,0x90,0x60,0x07,0x90,0x01,0xc6,0xe0,0x44,0x40,0xf0,0x90,0x01,0xc7,0xe0, ++0x30,0xe1,0xe4,0x7f,0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xe0,0xff, ++0x7d,0x01,0x90,0x91,0x74,0xef,0xf0,0xa3,0xed,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xe5, ++0x70,0x60,0x04,0xe4,0xff,0x11,0xb3,0x90,0x91,0x74,0xe0,0x30,0xe0,0x09,0x90,0x91, ++0x76,0xe4,0xf0,0xa3,0x74,0x80,0xf0,0x90,0x91,0x74,0xe0,0xff,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x90,0x04,0x25,0xef,0xf0,0x90,0x91,0x75,0xe0,0x60,0x1f,0xa3,0xa3,0xe0, ++0xff,0x24,0x0f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x74,0x10, ++0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x80,0xf0,0x90,0x91,0x76,0xa3, ++0xe0,0xff,0xfd,0x24,0x08,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe4,0xf0,0x74,0x09, ++0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf0,0xf0,0x74,0x21,0x2f,0xf5, ++0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xf7,0xf0,0x90,0x91,0x76,0xe0,0xfe,0xa3, ++0xe0,0xff,0x22,0xef,0x60,0x0b,0x90,0x91,0x51,0xe0,0xb4,0x01,0x10,0xe4,0xff,0x80, ++0x09,0x90,0x91,0x51,0xe0,0xb4,0x01,0x05,0x7f,0x01,0x12,0x69,0x87,0x22,0x90,0x01, ++0x37,0x74,0x02,0xf0,0x90,0x05,0x22,0x74,0xff,0xf0,0x12,0x68,0x7c,0xef,0x70,0x06, ++0x90,0x01,0xc8,0x74,0xfd,0xf0,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0xe5,0x70,0x60, ++0x04,0x7f,0x01,0x11,0xb3,0x12,0x68,0xbd,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0xef, ++0x64,0x01,0x70,0x42,0x7d,0x78,0x7f,0x02,0x12,0x36,0x75,0x7d,0x02,0x7f,0x03,0x12, ++0x36,0x75,0x90,0x01,0x36,0x74,0x03,0xf0,0xfd,0x7f,0x02,0x12,0x36,0xe6,0x7d,0x10, ++0x7f,0x03,0x12,0x36,0x92,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x12,0x47,0x23,0xe4,0xff,0x11,0xb3,0x90,0x06,0x04,0xe0,0x54,0x7f,0xf0,0x90,0x06, ++0x0a,0xe0,0x54,0xf8,0xf0,0x22,0x90,0x01,0x36,0x74,0x7b,0xf0,0xa3,0x74,0x02,0xf0, ++0x7d,0x7b,0xff,0x12,0x36,0xe6,0x7d,0x02,0x7f,0x03,0x12,0x36,0xe6,0x7d,0x10,0x7f, ++0x03,0x12,0x36,0x92,0x90,0x06,0x04,0xe0,0x44,0x80,0xf0,0x90,0x06,0x0a,0xe0,0x44, ++0x07,0xf0,0x12,0x44,0xf4,0xe5,0x6d,0x20,0xe0,0x05,0xe4,0x90,0x91,0x29,0xf0,0x22, ++0x8b,0x0e,0x8a,0x0f,0x89,0x10,0xf1,0xf2,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x12,0x29, ++0xd9,0xf5,0x70,0x14,0x60,0x0e,0x14,0x60,0x1e,0x14,0x60,0x2f,0x24,0x03,0x70,0x40, ++0x7f,0x01,0x80,0x3a,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02,0x12,0x42,0x20, ++0xfd,0xe4,0xff,0x31,0xe1,0x80,0x27,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00,0x02, ++0x12,0x42,0x20,0xfd,0x7f,0x01,0x31,0xe1,0x1f,0x80,0x13,0xab,0x0e,0xaa,0x0f,0xa9, ++0x10,0x90,0x00,0x02,0x12,0x42,0x20,0xfd,0x7f,0x02,0x31,0xe1,0xe4,0xff,0x11,0xff, ++0x22,0xef,0x24,0xfe,0x60,0x0b,0x04,0x70,0x22,0x90,0x91,0x39,0x74,0x01,0xf0,0x80, ++0x16,0xed,0x70,0x0a,0x90,0x91,0x35,0xe0,0x90,0x91,0x39,0xf0,0x80,0x05,0x90,0x91, ++0x39,0xed,0xf0,0x90,0x91,0x39,0xe0,0x90,0x91,0x27,0xf0,0x22,0x12,0x47,0xe6,0xbf, ++0x01,0x0f,0x90,0x02,0x09,0xe0,0xff,0x7d,0x01,0x11,0x22,0x90,0x04,0x1f,0x74,0x20, ++0xf0,0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0, ++0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90, ++0x01,0xc4,0x74,0x22,0xf0,0x74,0x4a,0xa3,0xf0,0x90,0x01,0x34,0xe0,0x55,0x28,0xf5, ++0x2c,0x90,0x01,0x36,0xe0,0x55,0x2a,0xf5,0x2e,0xa3,0xe0,0x55,0x2b,0xf5,0x2f,0xe5, ++0x2c,0x30,0xe0,0x5a,0x90,0x01,0x34,0x74,0x01,0xf0,0x85,0xd9,0x54,0xe5,0x70,0x14, ++0x24,0xfd,0x50,0x02,0x80,0x48,0x90,0x91,0x3b,0xe0,0x60,0x3a,0x90,0x01,0x5b,0xe4, ++0xf0,0x90,0x01,0x3c,0x74,0x04,0xf0,0x91,0x89,0xef,0x64,0x01,0x70,0x30,0x90,0x91, ++0x66,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e, ++0x01,0x12,0x44,0x59,0x90,0x01,0x5b,0x74,0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0, ++0x90,0x91,0x37,0xf0,0x80,0x08,0x91,0x89,0xbf,0x01,0x03,0x12,0x44,0xc2,0xe5,0x2c, ++0x30,0xe1,0x21,0x90,0x01,0x34,0x74,0x02,0xf0,0x85,0xd1,0x58,0x85,0xd2,0x59,0x85, ++0xd3,0x5a,0x85,0xd4,0x5b,0x85,0xd5,0x5c,0x85,0xd6,0x5d,0x85,0xd7,0x5e,0x85,0xd9, ++0x5f,0x12,0x64,0x66,0xe5,0x2c,0x30,0xe3,0x10,0x90,0x01,0x34,0x74,0x08,0xf0,0x90, ++0x91,0x56,0xe0,0x30,0xe0,0x03,0x43,0x57,0x04,0xe5,0x2c,0x30,0xe4,0x09,0x90,0x01, ++0x34,0x74,0x10,0xf0,0x43,0x57,0x10,0xe5,0x2c,0x30,0xe5,0x24,0x90,0x01,0xcf,0xe0, ++0x30,0xe5,0x1d,0xe0,0x54,0xdf,0xf0,0x90,0x01,0x34,0x74,0x20,0xf0,0x75,0xa8,0x00, ++0x75,0xe8,0x00,0xd1,0x65,0x90,0x00,0x03,0xe0,0x54,0xfb,0xf0,0x91,0xa0,0x80,0xfe, ++0xe5,0x2c,0x30,0xe6,0x06,0x90,0x01,0x34,0x74,0x40,0xf0,0xe5,0x2e,0x30,0xe0,0x15, ++0x90,0x91,0x50,0x74,0x01,0xf0,0x90,0x01,0x36,0xf0,0x12,0x63,0x2e,0x12,0x70,0xee, ++0x90,0x91,0x50,0xe4,0xf0,0xe5,0x2e,0x30,0xe1,0x3b,0x90,0x01,0x36,0x74,0x02,0xf0, ++0x43,0x57,0x40,0x90,0x01,0x02,0xe0,0x54,0x03,0x64,0x01,0x70,0x28,0x90,0x01,0x37, ++0xe0,0x30,0xe0,0x0a,0x74,0x01,0xf0,0x90,0x91,0x40,0xe4,0xf0,0x80,0x17,0x90,0x91, ++0x40,0xe0,0x04,0xf0,0xe0,0xc3,0x94,0x0a,0x40,0x0b,0xe4,0xf0,0x90,0x04,0x19,0xe0, ++0x30,0xe0,0x02,0x51,0x0c,0xe5,0x2e,0x30,0xe2,0x1a,0x90,0x01,0x36,0x74,0x04,0xf0, ++0x90,0x91,0x3a,0xe4,0xf0,0x90,0x05,0x58,0x74,0x03,0xf0,0x12,0x62,0xb8,0x90,0x91, ++0x3f,0xe0,0x04,0xf0,0xe5,0x2e,0x30,0xe3,0x28,0x90,0x01,0x36,0x74,0x08,0xf0,0xe5, ++0x6d,0x64,0x01,0x70,0x1c,0xe5,0x70,0x60,0x18,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01, ++0x3c,0x74,0x02,0xf0,0x90,0x91,0x66,0xe4,0x12,0x44,0x49,0x90,0x01,0x57,0x74,0x05, ++0xf0,0xe5,0x2e,0x30,0xe4,0x2b,0x90,0x01,0x36,0x74,0x10,0xf0,0xe5,0x6d,0xb4,0x01, ++0x20,0xe5,0x70,0x60,0x1c,0x90,0x01,0x57,0xe4,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0, ++0x90,0x91,0x3c,0xe4,0xf0,0x53,0x71,0xfd,0xe5,0x71,0x54,0x07,0x70,0x03,0x12,0x44, ++0xc2,0xe5,0x2e,0x30,0xe5,0x1f,0x90,0x01,0x36,0x74,0x20,0xf0,0xe5,0x6d,0xb4,0x01, ++0x14,0xe5,0x70,0x60,0x10,0x90,0x91,0x3b,0xe0,0x64,0x02,0x60,0x05,0x12,0x44,0xc8, ++0x80,0x03,0x12,0x44,0x77,0xe5,0x2e,0x30,0xe6,0x1b,0x90,0x01,0x36,0x74,0x40,0xf0, ++0xe5,0x6d,0xb4,0x01,0x10,0xe5,0x70,0x60,0x0c,0x53,0x71,0xfe,0xe5,0x71,0x54,0x07, ++0x70,0x03,0x12,0x44,0xc2,0xe5,0x2f,0x30,0xe1,0x09,0x90,0x01,0x37,0x74,0x02,0xf0, ++0x12,0x64,0x31,0x74,0x22,0x04,0x90,0x01,0xc4,0xf0,0x74,0x4a,0xa3,0xf0,0xd0,0x07, ++0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0, ++0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0,0xe0,0x32,0x90,0x04,0x1b,0xe0,0x54,0x7f,0x64, ++0x7f,0x7f,0x01,0x60,0x02,0x7f,0x00,0x22,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x7f,0x10,0xdf,0xfe,0xd0,0xd0,0x92,0xaf,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x9b,0xed,0xf0,0x90,0x91,0x9a,0xef, ++0xf0,0xd3,0x94,0x07,0x50,0x63,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3, ++0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x91,0xa0,0x90,0x91,0x9a, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00, ++0x46,0xe0,0x4f,0xf0,0x91,0xa0,0x90,0x91,0x9b,0xe0,0x60,0x16,0x90,0x91,0x9a,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x45, ++0x80,0x66,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xf4,0xff,0x90,0x00,0x45,0x80,0x6b,0x90,0x91,0x9a,0xe0,0x24,0xf8,0xf0, ++0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0, ++0x91,0x98,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33, ++0xd8,0xfc,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x91,0xa0,0x90,0x91,0x9b,0xe0,0x60, ++0x1b,0x90,0x91,0x9a,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x42,0xe0,0x4f,0x80,0x1a,0x90,0x91,0x9a,0xe0, ++0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4, ++0xff,0x90,0x00,0x42,0xe0,0x5f,0xf0,0x91,0xa0,0xd0,0xd0,0x92,0xaf,0x22,0xf0,0x90, ++0x00,0x45,0xe0,0x54,0xfe,0xfd,0x7f,0x45,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x8f, ++0x82,0x75,0x83,0x00,0xed,0xf0,0x91,0xa0,0xd0,0xd0,0x92,0xaf,0x22,0xef,0x14,0x60, ++0x30,0x14,0x60,0x66,0x24,0x02,0x60,0x02,0xc1,0x64,0x90,0x90,0xf3,0x74,0x02,0xf0, ++0x90,0x00,0x48,0xe0,0x44,0x0c,0xfd,0x7f,0x48,0xb1,0xa8,0x90,0x00,0x47,0xe0,0x44, ++0x08,0xfd,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0x80, ++0x71,0xe4,0x90,0x90,0xf3,0xf0,0x90,0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0xef,0xfd, ++0x7f,0x45,0xb1,0xa8,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0xb1,0xa8,0x90, ++0x00,0x46,0xe0,0x44,0x10,0xfd,0x7f,0x46,0x80,0x38,0x90,0x90,0xf3,0x74,0x01,0xf0, ++0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08, ++0x12,0x2f,0xd9,0x90,0x00,0x45,0xe0,0x44,0x20,0xfd,0x7f,0x45,0xb1,0xa8,0x90,0x00, ++0x45,0xe0,0x44,0x10,0xfd,0x7f,0x45,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x44,0x10,0xfd, ++0x7f,0x46,0xb1,0xa8,0x22,0x90,0x01,0x30,0xe4,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0x90,0x01,0x38,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x50,0xb1,0xa8,0xe4, ++0xfd,0x7f,0x51,0xb1,0xa8,0xe4,0xfd,0x7f,0x52,0xb1,0xa8,0xe4,0xfd,0x7f,0x53,0xa1, ++0xa8,0x8b,0x0e,0x8a,0x0f,0x89,0x10,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf6, ++0xf0,0xe0,0x30,0xe0,0x4b,0x90,0x90,0xed,0x74,0x01,0xf0,0x7f,0x80,0x7e,0x08,0x12, ++0x27,0xde,0x90,0x90,0xef,0x12,0x2a,0x7f,0xab,0x0e,0xaa,0x0f,0xa9,0x10,0x90,0x00, ++0x01,0x12,0x42,0x20,0xff,0xe4,0xfc,0xfd,0xfe,0x78,0x1a,0x12,0x2a,0x6c,0xa8,0x04, ++0xa9,0x05,0xaa,0x06,0xab,0x07,0x90,0x90,0xef,0x12,0x43,0x09,0xec,0x54,0x03,0xfc, ++0x12,0x42,0xfc,0x90,0x90,0xf9,0x12,0x2a,0x7f,0x90,0x05,0x22,0xe4,0xf0,0x80,0x2d, ++0xe4,0x90,0x90,0xed,0xf0,0x7f,0x80,0x7e,0x08,0x12,0x27,0xde,0xec,0x54,0x03,0xfc, ++0xec,0x44,0xc0,0xfc,0x90,0x90,0xef,0x12,0x2a,0x7f,0x90,0x90,0xef,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xf6, ++0xe0,0x30,0xe1,0x19,0x7d,0x0c,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x48,0xe0,0x44,0x0c, ++0xfd,0x7f,0x48,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x44,0x10,0x80,0x1c,0x90,0x00,0x47, ++0xe0,0x54,0xf3,0xfd,0x7f,0x47,0xb1,0xa8,0x90,0x00,0x48,0xe0,0x54,0xf3,0xfd,0x7f, ++0x48,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x54,0xef,0xfd,0x7f,0x46,0xb1,0xa8,0xe4,0x90, ++0x90,0xf3,0xf0,0x22,0x90,0x01,0x3c,0x74,0xff,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x01, ++0x34,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xfd,0x7f,0x54,0xb1,0xa8,0x7d,0xff,0x7f, ++0x55,0xb1,0xa8,0x7d,0xff,0x7f,0x56,0xb1,0xa8,0x7d,0xff,0x7f,0x57,0xa1,0xa8,0xe5, ++0x72,0x64,0x01,0x70,0x3e,0x12,0x54,0x41,0xbf,0x01,0x05,0x7f,0x01,0x12,0x56,0xe7, ++0x90,0x00,0x46,0xe0,0x44,0x04,0xfd,0x7f,0x46,0xb1,0xa8,0x90,0x00,0x44,0xe0,0x54, ++0xfb,0xfd,0x7f,0x44,0xb1,0xa8,0x90,0x00,0x46,0xe0,0x54,0xfb,0xfd,0x7f,0x46,0xb1, ++0xa8,0x7f,0x02,0x12,0x6f,0x09,0x8f,0x76,0x90,0x01,0xc9,0xe5,0x76,0xf0,0xb4,0x01, ++0x02,0xf1,0xd4,0x22,0x90,0x00,0x49,0xe0,0x90,0x91,0x9f,0xf0,0xe0,0x54,0x0f,0xf0, ++0x44,0xf0,0xfd,0x7f,0x49,0xb1,0xa8,0x90,0x91,0x9f,0xe0,0x44,0xb0,0xfd,0x7f,0x49, ++0xa1,0xa8,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91,0x28,0xf0,0xf5,0x71,0x22,0x75,0x28, ++0x33,0xe4,0xf5,0x29,0x75,0x2a,0x07,0xf5,0x2b,0x90,0x01,0x30,0xe5,0x28,0xf0,0xa3, ++0xe5,0x29,0xf0,0xa3,0xe5,0x2a,0xf0,0xa3,0xe5,0x2b,0xf0,0x22,0x75,0x30,0x1f,0x75, ++0x31,0x01,0xe4,0xf5,0x32,0x90,0x01,0x38,0xe5,0x30,0xf0,0xa3,0xe5,0x31,0xf0,0xa3, ++0xe5,0x32,0xf0,0x22,0xe4,0x90,0x91,0x0e,0xf0,0xa3,0xf0,0x75,0x8e,0x02,0xf1,0x02, ++0xd1,0xb4,0x90,0x91,0x4f,0xef,0xf0,0xd1,0xdb,0x90,0x91,0x51,0xef,0xf0,0xf1,0x3d, ++0x90,0x91,0x3d,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xf5,0x57,0xd1,0xd2,0x12,0x60,0x37, ++0x12,0x32,0x3d,0xd1,0xc1,0x12,0x4f,0xfe,0xf1,0x13,0xd1,0xcb,0x11,0x1c,0x12,0x44, ++0xff,0x31,0x23,0x11,0xdf,0x12,0x6f,0xaa,0x90,0x91,0x10,0xe5,0xd9,0xf0,0x12,0x4f, ++0x64,0xc2,0xaf,0x90,0x00,0x80,0xe0,0x44,0x40,0xf0,0x12,0x4c,0xa0,0x75,0xe8,0x03, ++0x43,0xa8,0x85,0xd2,0xaf,0x90,0x91,0x0e,0xe0,0x64,0x01,0xf0,0x24,0x34,0x90,0x01, ++0xc4,0xf0,0x74,0x50,0xa3,0xf0,0xe5,0x57,0x30,0xe2,0x10,0x12,0x5e,0x63,0xbf,0x01, ++0x0a,0xc2,0xaf,0x53,0x57,0xfb,0xd2,0xaf,0x12,0x71,0x8a,0xe5,0x57,0x30,0xe4,0x0a, ++0xc2,0xaf,0x53,0x57,0xef,0xd2,0xaf,0x12,0x5e,0xa0,0x90,0x90,0xf7,0xe0,0x70,0x03, ++0x12,0x70,0x08,0x11,0xf7,0x90,0x91,0x3f,0xe0,0x90,0x01,0xba,0xf0,0x80,0xb6,0x90, ++0x91,0x53,0xe0,0x54,0xfe,0xf0,0xe4,0x90,0x91,0x55,0xf0,0x90,0x91,0x53,0xe0,0x54, ++0x7f,0xf0,0xa3,0x74,0x0a,0xf0,0x22,0x90,0x06,0x34,0xe0,0x60,0x25,0x14,0x70,0x1b, ++0x7b,0x01,0x7a,0x06,0x79,0x35,0x7f,0xf9,0x7e,0x01,0x12,0x68,0x1a,0xbf,0x01,0x09, ++0x90,0x06,0x35,0xe0,0x54,0x0f,0xf0,0x80,0x04,0x80,0x00,0xc1,0xf4,0xe4,0x90,0x06, ++0x34,0xf0,0x22,0x90,0x91,0x56,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0x7f,0xf0,0x90,0x01, ++0x17,0xe0,0xfe,0x90,0x01,0x16,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90,0x91, ++0x5c,0xf0,0xa3,0xef,0xf0,0x90,0x01,0x04,0xe0,0x54,0x0f,0x90,0x91,0x1c,0xf0,0xe0, ++0xff,0x74,0x40,0x7e,0x00,0xa8,0x07,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8, ++0xf9,0x90,0x91,0x5b,0xf0,0xee,0x90,0x91,0x5a,0xf0,0x90,0x91,0x5e,0xe0,0x54,0xfe, ++0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xfb,0xf0,0xe0,0x54,0xf7,0xf0,0xe0,0x54,0xef, ++0xf0,0xe0,0x54,0xdf,0xf0,0xe0,0x54,0xbf,0xf0,0xe0,0x54,0x7f,0xf0,0xe4,0xa3,0xf0, ++0xa3,0xf0,0xa3,0xe0,0x54,0xfe,0xf0,0xe0,0x54,0xfd,0xf0,0xe0,0x54,0xf7,0xf0,0x22, ++0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x12,0x29,0xd9,0x54,0x01,0xff,0x90,0x91,0x56, ++0xe0,0x54,0xfe,0x4f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x57,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x58,0xf0,0x90,0x91,0x56,0xe0,0x30,0xe0,0x1a, ++0x90,0x06,0x09,0xe0,0x54,0xfe,0xf0,0x90,0x02,0x86,0xe0,0x44,0x04,0xf0,0x43,0x57, ++0x04,0x7d,0x08,0xe4,0xff,0x12,0x36,0xe6,0x80,0x12,0x7d,0x08,0xe4,0xff,0x12,0x36, ++0x75,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x51,0x01,0x31,0x23,0xd0,0xd0,0x92,0xaf, ++0x22,0x90,0x06,0x90,0xe4,0xf0,0x21,0x6a,0x90,0x91,0x19,0x12,0x43,0x41,0xef,0x12, ++0x43,0x4a,0x52,0x40,0x01,0x52,0x49,0x02,0x52,0x6a,0x03,0x52,0x73,0x09,0x52,0x7b, ++0x0c,0x52,0x84,0x0d,0x52,0x8c,0x0e,0x52,0x9d,0x1a,0x52,0xa5,0x2c,0x52,0x51,0x2d, ++0x52,0x5a,0x2e,0x52,0xad,0x30,0x52,0x62,0x3b,0x52,0x95,0x3c,0x00,0x00,0x52,0xb5, ++0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x64,0xde,0x90,0x91,0x19,0x12,0x43,0x21,0xc1, ++0xc5,0x90,0x91,0x19,0x12,0x43,0x21,0x02,0x65,0xf9,0x90,0x91,0x19,0x12,0x43,0x21, ++0xe1,0xa8,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x28,0x90,0x91,0x19,0x12,0x43,0x21, ++0x02,0x66,0x41,0x90,0x91,0x19,0x12,0x43,0x21,0x80,0x42,0x90,0x91,0x19,0x12,0x43, ++0x21,0x02,0x5d,0x16,0x90,0x91,0x19,0x12,0x43,0x21,0xe1,0x75,0x90,0x91,0x19,0x12, ++0x43,0x21,0x02,0x4e,0x91,0x90,0x91,0x19,0x12,0x43,0x21,0x21,0xa0,0x90,0x91,0x19, ++0x12,0x43,0x21,0xa1,0x7f,0x90,0x91,0x19,0x12,0x43,0x21,0x81,0x5e,0x90,0x91,0x19, ++0x12,0x43,0x21,0xe1,0x55,0x90,0x01,0xc6,0xe0,0x44,0x01,0xf0,0x22,0xd3,0x10,0xaf, ++0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1c,0x12,0x43,0x21, ++0x90,0x00,0x01,0x12,0x42,0x97,0xfa,0xe5,0xf0,0x24,0x00,0xff,0xe4,0x3a,0xfe,0x90, ++0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0xee,0x8f,0xf0,0x12,0x42,0xcf,0x12,0x29, ++0xd9,0xff,0x60,0x2c,0xb5,0x72,0x16,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01, ++0x12,0x42,0x97,0x65,0x74,0x70,0x04,0xe5,0x73,0x65,0xf0,0x60,0x23,0x90,0x91,0x1c, ++0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42,0x97,0xff,0xae,0xf0,0x71,0x35,0x80,0x10, ++0x90,0x91,0x1c,0x12,0x43,0x21,0x12,0x29,0xd9,0x65,0x72,0x60,0x03,0x12,0x44,0xe8, ++0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x1f,0xee,0xf0,0xa3,0xef,0xf0,0x75,0x72,0x01, ++0x8e,0x73,0xf5,0x74,0xe4,0xfd,0x7f,0x0b,0x71,0x77,0xe4,0xfd,0x7f,0x02,0x71,0x77, ++0x91,0x41,0xe4,0xff,0xd1,0xe7,0xe4,0xf5,0x76,0x90,0x01,0xc9,0xe5,0x76,0xf0,0x90, ++0x91,0x1f,0xe0,0xfc,0xa3,0xe0,0xfd,0xec,0xfb,0x8d,0x44,0xe4,0xf5,0x45,0x7d,0x01, ++0x7f,0x60,0x7e,0x01,0x02,0x35,0xab,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91, ++0x22,0xed,0xf0,0x90,0x91,0x21,0xef,0xf0,0xd3,0x94,0x07,0x50,0x4f,0xa3,0xe0,0x70, ++0x1a,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xf4,0xff,0x90,0x00,0x47,0xe0,0x5f,0xf0,0x80,0x17,0x90,0x91,0x21,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xff,0x90,0x00,0x47,0xe0, ++0x4f,0xf0,0x12,0x4c,0xa0,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0x80,0x5a,0x90,0x91,0x21,0xe0, ++0x24,0xf8,0xf0,0xa3,0xe0,0x70,0x1d,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xf4,0xff,0x90,0x00,0x43,0xe0, ++0x5f,0xf0,0x80,0x1a,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02, ++0xc3,0x33,0xd8,0xfc,0xc4,0x54,0xf0,0xff,0x90,0x00,0x43,0xe0,0x4f,0xf0,0x12,0x4c, ++0xa0,0x90,0x91,0x21,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8, ++0xfc,0xf4,0xff,0x90,0x00,0x43,0xe0,0x5f,0xf0,0x12,0x4c,0xa0,0xd0,0xd0,0x92,0xaf, ++0x22,0x7f,0x0b,0x12,0x6f,0x09,0xef,0x65,0x75,0x60,0x10,0xe5,0x75,0xb4,0x01,0x05, ++0xe4,0xf5,0x75,0x80,0x03,0x75,0x75,0x01,0x7f,0x01,0x22,0x7f,0x00,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0xe4,0xf5,0x10,0x75,0x11,0x04,0xf5,0x12,0xf5,0x14,0xf5, ++0x15,0x90,0x02,0x09,0xe0,0xff,0x12,0x29,0xd9,0xfe,0xef,0x2e,0xf5,0x13,0x30,0xe0, ++0x08,0x75,0x0e,0x00,0x75,0x0f,0x80,0x80,0x05,0xe4,0xf5,0x0e,0xf5,0x0f,0xe5,0x13, ++0xc3,0x13,0x90,0xfd,0x10,0xf0,0x74,0x20,0x25,0x10,0xf5,0x10,0xad,0x0f,0xe5,0x10, ++0x2d,0xff,0x24,0x01,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x90,0x91,0x47,0xf0, ++0x74,0x02,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0xe5,0x10,0x2d,0x24, ++0x03,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x24,0x00,0xff,0xe4,0x3e,0x90,0x91, ++0x48,0xf0,0xa3,0xef,0xf0,0x7f,0x04,0xe5,0x10,0x25,0x0f,0x2f,0x24,0x00,0xf5,0x82, ++0xe4,0x34,0xfc,0xf5,0x83,0xe0,0xfe,0x74,0x46,0x2f,0xf5,0x82,0xe4,0x34,0x91,0xf5, ++0x83,0xee,0xf0,0x0f,0xbf,0x08,0xe0,0x12,0x66,0x89,0xef,0x70,0x3f,0x90,0x01,0xc3, ++0xe0,0x60,0x25,0xc3,0xe5,0x15,0x94,0xe8,0xe5,0x14,0x94,0x03,0x40,0x09,0x90,0x01, ++0xc6,0xe0,0x44,0x10,0xf0,0x80,0x63,0x05,0x15,0xe5,0x15,0x70,0x02,0x05,0x14,0x7f, ++0x0a,0x7e,0x00,0x12,0x37,0x54,0x80,0xd5,0x90,0x01,0xc6,0xe0,0x90,0x01,0xc3,0x30, ++0xe2,0x05,0x74,0xfe,0xf0,0x80,0x43,0x74,0xff,0xf0,0x80,0x3e,0xe5,0x10,0xb4,0x78, ++0x23,0xe4,0xf5,0x10,0x05,0x13,0xe5,0x0f,0x64,0x80,0x45,0x0e,0x70,0x06,0xf5,0x0e, ++0xf5,0x0f,0x80,0x06,0x75,0x0e,0x00,0x75,0x0f,0x80,0xe5,0x13,0xc3,0x13,0x90,0xfd, ++0x10,0xf0,0x80,0x06,0x74,0x08,0x25,0x10,0xf5,0x10,0xe5,0x12,0x15,0x12,0x70,0x02, ++0x15,0x11,0xe5,0x12,0x45,0x11,0x60,0x02,0x81,0x9c,0xd0,0xd0,0x92,0xaf,0x22,0x90, ++0x91,0x1c,0x12,0x43,0x41,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x5e,0xe0, ++0x54,0xfe,0x4e,0xf0,0xef,0x54,0x04,0xff,0xe0,0x54,0xfb,0x4f,0xf0,0x12,0x29,0xd9, ++0xff,0x54,0x02,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xfd,0x4e,0xf0,0xef,0x54,0x08,0xff, ++0xe0,0x54,0xf7,0x4f,0xf0,0x12,0x29,0xd9,0xff,0x54,0x10,0xfe,0x90,0x91,0x5e,0xe0, ++0x54,0xef,0x4e,0xf0,0xef,0x54,0x20,0xff,0xe0,0x54,0xdf,0x4f,0xf0,0x12,0x29,0xd9, ++0xff,0x54,0x40,0xfe,0x90,0x91,0x5e,0xe0,0x54,0xbf,0x4e,0xf0,0xef,0x54,0x80,0xff, ++0xe0,0x54,0x7f,0x4f,0xf0,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x91,0x60,0xf0,0x90, ++0x00,0x01,0x12,0x42,0x20,0x90,0x91,0x5f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0xff, ++0x54,0x01,0xfe,0x90,0x91,0x61,0xe0,0x54,0xfe,0x4e,0xf0,0xef,0x54,0x02,0xff,0xe0, ++0x54,0xfd,0x4f,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x54,0x04,0xff,0x90,0x91,0x61, ++0xe0,0x54,0xfb,0x4f,0xf0,0x90,0x91,0x5e,0xe0,0x54,0x01,0x90,0x01,0xb8,0xf0,0x90, ++0x91,0x5e,0xe0,0xff,0xc4,0x13,0x54,0x01,0x90,0x01,0xb9,0xf0,0x90,0x91,0x61,0xe0, ++0x54,0x01,0x90,0x01,0xba,0xf0,0xa3,0x74,0xff,0xf0,0x12,0x29,0xd9,0x20,0xe0,0x02, ++0x41,0x01,0xe4,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x90,0x91,0x1c,0x12,0x43,0x21,0x12, ++0x29,0xd9,0xff,0xc3,0x13,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x02,0xf0,0xef, ++0x13,0x13,0x54,0x3f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x04,0xf0,0x12,0x29, ++0xd9,0x13,0x13,0x13,0x54,0x1f,0x30,0xe0,0x07,0x90,0x06,0x90,0xe0,0x44,0x08,0xf0, ++0x90,0x91,0x61,0xe0,0x30,0xe0,0x1c,0x90,0x91,0x5e,0xe0,0xc4,0x13,0x54,0x07,0x30, ++0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90,0x91,0x5f,0xe0,0xff,0x7d,0x01, ++0x12,0x4c,0xb0,0x22,0x90,0x00,0x02,0xe0,0x54,0xe0,0x7f,0x01,0x60,0x02,0x7f,0x00, ++0x22,0xe4,0xf5,0x75,0x22,0x12,0x29,0xd9,0xf5,0x6d,0x22,0x90,0x01,0x64,0x74,0xa0, ++0xf0,0x22,0x90,0x91,0x51,0xe0,0x90,0x90,0xe8,0xf0,0x22,0x90,0x00,0xf3,0xe0,0x7f, ++0x00,0x30,0xe3,0x02,0x7f,0x01,0x22,0x90,0x01,0xca,0xe5,0x75,0xf0,0xef,0x60,0x03, ++0x12,0x4f,0xd4,0x22,0x90,0x06,0x34,0x74,0xff,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3, ++0xf0,0x22,0xe4,0x90,0x91,0x4e,0xf0,0x90,0x00,0x80,0xe0,0x44,0x80,0xfd,0x7f,0x80, ++0x02,0x4d,0xa8,0x90,0x00,0xf3,0xe0,0x30,0xe2,0x0d,0x90,0x05,0x41,0x74,0x10,0xf0, ++0x90,0x05,0x5a,0xf0,0xa3,0xe4,0xf0,0x22,0x12,0x29,0xd9,0x60,0x02,0x80,0x01,0xe4, ++0x90,0x91,0x31,0xf0,0x90,0x91,0x31,0xe0,0x90,0x01,0xe7,0xf0,0x22,0x90,0x91,0x51, ++0xe0,0xb4,0x01,0x0c,0x90,0x00,0xf2,0xe0,0x30,0xe7,0x05,0x7e,0xfd,0x7f,0x33,0x22, ++0x7e,0xfd,0x7f,0x2f,0x22,0x12,0x29,0xd9,0xff,0x54,0x01,0xfe,0x90,0x91,0x53,0xe0, ++0x54,0xfe,0x4e,0xf0,0xef,0xc3,0x13,0x30,0xe0,0x0a,0x90,0x00,0x01,0x12,0x42,0x20, ++0x90,0x91,0x54,0xf0,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf7,0xf0,0xe0, ++0x60,0x04,0xe0,0xf4,0x70,0x21,0xa2,0xaf,0xe4,0x33,0xf5,0x0e,0xc2,0xaf,0x90,0x00, ++0x47,0xe0,0x54,0xfb,0xfd,0x7f,0x47,0x12,0x4d,0xa8,0x7d,0x40,0x7f,0x01,0x12,0x36, ++0xaf,0xe5,0x0e,0x24,0xff,0x92,0xaf,0x22,0x12,0x29,0xd9,0x30,0xe0,0x19,0xc3,0x13, ++0x54,0x7f,0x90,0x91,0x34,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0x90,0x91,0x32, ++0xe4,0xf0,0xa3,0xef,0xf0,0x80,0x0f,0x90,0x91,0x34,0x74,0x07,0xf0,0x90,0x91,0x32, ++0xe4,0xf0,0xa3,0x74,0x03,0xf0,0x90,0x91,0x32,0xe0,0xa3,0xe0,0x90,0x05,0x58,0xf0, ++0x22,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0,0x00,0xc0,0x00, ++0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0,0x07,0x90,0x01, ++0xc4,0x74,0xe1,0xf0,0x74,0x57,0xa3,0xf0,0x53,0x91,0xef,0x90,0x00,0x51,0xe0,0xff, ++0x90,0x00,0x55,0xe0,0x5f,0xf5,0x3d,0x90,0x00,0x52,0xe0,0xff,0x90,0x00,0x56,0xe0, ++0x5f,0xf5,0x3e,0xe5,0x3d,0x30,0xe4,0x06,0x90,0x00,0x55,0x74,0x10,0xf0,0xe5,0x3d, ++0x30,0xe5,0x06,0x90,0x00,0x55,0x74,0x20,0xf0,0xe5,0x3d,0x30,0xe6,0x1b,0x90,0x00, ++0x55,0x74,0x40,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff,0xbf,0x03,0x0b,0x90,0x90, ++0xf3,0xe0,0x60,0x05,0x7f,0x01,0x12,0x4d,0xbd,0xe5,0x3d,0x30,0xe7,0x15,0x90,0x00, ++0x55,0x74,0x80,0xf0,0x90,0x90,0xf6,0xe0,0x54,0x03,0xff,0xbf,0x03,0x05,0x7f,0x02, ++0x12,0x4d,0xbd,0xe5,0x3e,0x30,0xe0,0x06,0x90,0x00,0x56,0x74,0x01,0xf0,0xe5,0x3e, ++0x30,0xe1,0x06,0x90,0x00,0x56,0x74,0x02,0xf0,0xe5,0x3e,0x30,0xe2,0x06,0x90,0x00, ++0x56,0x74,0x04,0xf0,0xe5,0x3e,0x30,0xe3,0x06,0x90,0x00,0x56,0x74,0x08,0xf0,0x90, ++0x01,0xc4,0x74,0xe1,0xf0,0x74,0x57,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0, ++0x04,0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0, ++0xf0,0xd0,0xe0,0x32,0xc0,0xe0,0xc0,0xf0,0xc0,0x83,0xc0,0x82,0xc0,0xd0,0x75,0xd0, ++0x00,0xc0,0x00,0xc0,0x01,0xc0,0x02,0xc0,0x03,0xc0,0x04,0xc0,0x05,0xc0,0x06,0xc0, ++0x07,0x75,0x0d,0x00,0x90,0x01,0xc4,0x74,0xc4,0xf0,0x74,0x58,0xa3,0xf0,0x53,0x91, ++0xdf,0x90,0x01,0x3c,0xe0,0x55,0x30,0xf5,0x34,0xa3,0xe0,0x55,0x31,0xf5,0x35,0xa3, ++0xe0,0x55,0x32,0xf5,0x36,0xa3,0xe0,0x55,0x33,0xf5,0x37,0xe5,0x34,0x30,0xe0,0x06, ++0x90,0x01,0x3c,0x74,0x01,0xf0,0xe5,0x34,0x30,0xe1,0x08,0x90,0x01,0x3c,0x74,0x02, ++0xf0,0x71,0x89,0xe5,0x34,0x30,0xe2,0x3a,0x90,0x01,0x3c,0x74,0x04,0xf0,0x90,0x06, ++0x92,0xe0,0x30,0xe0,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91, ++0x67,0xf0,0xe4,0xfb,0xfd,0x7f,0x58,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5b,0x74, ++0x05,0xf0,0x90,0x06,0x92,0x74,0x01,0xf0,0x80,0x08,0x90,0x91,0x37,0xe4,0xf0,0x12, ++0x44,0xc2,0xe5,0x34,0x30,0xe3,0x3a,0x90,0x01,0x3c,0x74,0x08,0xf0,0x90,0x06,0x92, ++0xe0,0x30,0xe1,0x25,0x90,0x91,0x66,0xe4,0xf0,0x90,0x91,0x2d,0xe0,0x90,0x91,0x67, ++0xf0,0xe4,0xfb,0xfd,0x7f,0x5c,0x7e,0x01,0x12,0x44,0x59,0x90,0x01,0x5f,0x74,0x05, ++0xf0,0x90,0x06,0x92,0x74,0x02,0xf0,0x80,0x08,0x90,0x91,0x36,0xe4,0xf0,0x12,0x44, ++0xc2,0xe5,0x34,0x30,0xe4,0x09,0x90,0x01,0x3c,0x74,0x10,0xf0,0x12,0x4f,0x8f,0xe5, ++0x34,0x30,0xe5,0x08,0x90,0x01,0x3c,0x74,0x20,0xf0,0x51,0x62,0xe5,0x35,0x30,0xe0, ++0x5a,0x90,0x01,0x3d,0x74,0x01,0xf0,0x90,0x01,0x2f,0xe0,0x44,0x7f,0xf0,0x90,0x00, ++0x83,0xe0,0x54,0x0f,0xf5,0x0d,0xb4,0x01,0x02,0x80,0x1c,0xe5,0x0d,0xb4,0x02,0x05, ++0x90,0x00,0x83,0x80,0x12,0xe5,0x0d,0xb4,0x04,0x05,0x90,0x00,0x83,0x80,0x08,0xe5, ++0x0d,0xb4,0x0c,0x08,0x90,0x00,0x83,0xe0,0xf5,0x6f,0x80,0x06,0x90,0x01,0xbe,0xe0, ++0x04,0xf0,0x90,0x01,0xbb,0xe5,0x6f,0xf0,0xe5,0x6f,0x30,0xe0,0x03,0xa3,0x80,0x03, ++0x90,0x01,0xbd,0xe0,0x04,0xf0,0x71,0x6a,0x12,0x44,0xc2,0xe5,0x35,0x30,0xe2,0x06, ++0x90,0x01,0x3d,0x74,0x04,0xf0,0xe5,0x36,0x30,0xe0,0x06,0x90,0x01,0x3e,0x74,0x01, ++0xf0,0xe5,0x36,0x30,0xe1,0x06,0x90,0x01,0x3e,0x74,0x02,0xf0,0x74,0xc4,0x04,0x90, ++0x01,0xc4,0xf0,0x74,0x58,0xa3,0xf0,0xd0,0x07,0xd0,0x06,0xd0,0x05,0xd0,0x04,0xd0, ++0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0xd0,0xd0,0xd0,0x82,0xd0,0x83,0xd0,0xf0,0xd0, ++0xe0,0x32,0x90,0x90,0xf5,0xe0,0x64,0x01,0x60,0x02,0x61,0x17,0x90,0x00,0x46,0xe0, ++0x44,0x01,0xfd,0x7f,0x46,0x12,0x4d,0xa8,0x90,0x91,0x07,0xe0,0x70,0x32,0x90,0x90, ++0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74,0x7f,0xf0,0x90, ++0x90,0xf4,0xe0,0xff,0x71,0x18,0x90,0x91,0x07,0x74,0x01,0x12,0x4d,0x9e,0x80,0x40, ++0x90,0x91,0x07,0xe0,0x64,0x01,0x70,0x38,0x90,0x90,0xf8,0xe0,0xff,0x71,0x18,0xe4, ++0x90,0x91,0x07,0xf0,0x90,0x00,0x45,0xe0,0x44,0x01,0xfd,0x7f,0x45,0x12,0x4d,0xa8, ++0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xef,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x05,0x90,0x05,0x22,0xe4,0xf0, ++0x90,0x05,0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0,0x90, ++0x91,0x04,0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0,0x90, ++0x91,0x06,0xe0,0x90,0x05,0x87,0xf0,0x22,0x90,0x05,0x60,0xe0,0x90,0x91,0x03,0xf0, ++0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05,0xf0, ++0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xc3,0x74,0xff,0x9f,0xfe,0x90,0x91,0x04, ++0xe0,0xd3,0x9e,0x40,0x1e,0xe0,0x2f,0xf0,0xa3,0xe0,0xb4,0xff,0x0f,0xe4,0xf0,0xa3, ++0xe0,0xb4,0xff,0x03,0xe4,0xf0,0x22,0x90,0x91,0x06,0x80,0x03,0x90,0x91,0x05,0xe0, ++0x04,0xf0,0x22,0x90,0x91,0x04,0xe0,0x2f,0xf0,0x22,0xe5,0x6f,0x30,0xe6,0x19,0xe5, ++0x6f,0x54,0x0f,0xff,0x90,0x91,0x24,0xe0,0xfe,0x4f,0x90,0x01,0x2f,0xf0,0xee,0x64, ++0x80,0x90,0x91,0x24,0xf0,0x53,0x6f,0xbf,0x22,0xe4,0x90,0x91,0x0d,0xf0,0xe5,0x70, ++0x70,0x02,0x81,0x13,0x90,0x91,0x3c,0xe0,0x60,0x0d,0xe4,0xf0,0x53,0x71,0xfd,0xe5, ++0x71,0x54,0x07,0x70,0x6e,0x80,0x69,0x90,0x91,0x28,0xe0,0x04,0xf0,0x53,0x71,0xef, ++0x90,0x91,0x3a,0xe0,0x04,0xf0,0x90,0x91,0x0d,0xe0,0xf9,0xff,0x7e,0x00,0x24,0x01, ++0xfd,0xee,0x33,0xfc,0x90,0x91,0x3a,0xe0,0xb5,0x05,0x06,0xe4,0xb5,0x04,0x02,0x80, ++0x12,0xef,0x24,0x02,0xff,0xe4,0x3e,0xfe,0x90,0x91,0x3a,0xe0,0xb5,0x07,0x0a,0xe4, ++0xb5,0x06,0x06,0x90,0x05,0x58,0xe0,0x04,0xf0,0xe9,0xff,0x90,0x91,0x2f,0xe0,0x2f, ++0xff,0xe4,0x33,0xfe,0x90,0x91,0x28,0xe0,0xd3,0x9f,0xee,0x64,0x80,0xf8,0x74,0x80, ++0x98,0x40,0x0d,0xe5,0x6d,0xb4,0x01,0x0b,0xa3,0xe0,0x70,0x07,0xe0,0x04,0xf0,0x22, ++0x12,0x44,0xc2,0x22,0x90,0x90,0xee,0xe0,0xc3,0x94,0x14,0x50,0x05,0xe0,0x04,0xf0, ++0x81,0xcc,0x90,0x90,0xee,0xe0,0x64,0x14,0x60,0x02,0x81,0xcc,0x90,0x90,0xfd,0xe0, ++0x70,0x25,0x90,0x91,0x00,0xe0,0x70,0x1f,0x90,0x90,0xfe,0xe0,0x70,0x19,0x90,0x91, ++0x01,0xe0,0x70,0x13,0x90,0x90,0xff,0xe0,0x70,0x0d,0x90,0x91,0x02,0xe0,0x70,0x07, ++0x90,0x04,0xfd,0xe0,0x54,0xfe,0xf0,0x90,0x90,0xfd,0xe0,0x90,0x04,0x44,0xf0,0x90, ++0x90,0xfe,0xe0,0x90,0x04,0x45,0xf0,0x90,0x90,0xff,0xe0,0x90,0x04,0x46,0xf0,0xa3, ++0xe4,0xf0,0x90,0x91,0x00,0xe0,0x90,0x04,0x48,0xf0,0x90,0x91,0x01,0xe0,0x90,0x04, ++0x49,0xf0,0x90,0x91,0x02,0xe0,0x90,0x04,0x4a,0xf0,0xa3,0xe4,0xf0,0x90,0x90,0xe9, ++0xe0,0x90,0x04,0x4c,0xf0,0x90,0x90,0xea,0xe0,0x90,0x04,0x4d,0xf0,0x90,0x90,0xeb, ++0xe0,0x90,0x04,0x4e,0xf0,0x90,0x90,0xec,0xe0,0x90,0x04,0x4f,0xf0,0xe4,0x90,0x90, ++0xee,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x90, ++0xfd,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0,0x90,0x05,0x60,0xe0, ++0x90,0x91,0x8c,0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x8d,0xf0,0x90,0x05,0x62,0xe0, ++0x90,0x91,0x8e,0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x8f,0xf0,0x90,0x91,0x06,0xe0, ++0xff,0x90,0x91,0x8f,0xe0,0xfe,0xd3,0x9f,0x50,0x0b,0x90,0x91,0x06,0xe0,0xc3,0x9e, ++0xd3,0x94,0x01,0x40,0x10,0x90,0x90,0xf4,0xe0,0xb4,0x01,0x02,0x80,0x03,0x90,0x90, ++0xf8,0xe0,0xff,0x71,0x18,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0x90,0x90,0xf5,0xf0, ++0x90,0x00,0x01,0x12,0x42,0x20,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf4,0xf0,0x12,0x29, ++0xd9,0x25,0xe0,0x25,0xe0,0x90,0x90,0xf8,0xf0,0x90,0x05,0x60,0xe0,0x90,0x91,0x03, ++0xf0,0x90,0x05,0x61,0xe0,0x90,0x91,0x04,0xf0,0x90,0x05,0x62,0xe0,0x90,0x91,0x05, ++0xf0,0x90,0x05,0x63,0xe0,0x90,0x91,0x06,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c, ++0xf0,0xc2,0xaf,0x90,0x90,0xf4,0xe0,0xff,0x71,0x18,0x90,0x91,0x1c,0xe0,0x24,0xff, ++0x92,0xaf,0x90,0x90,0xf5,0xe0,0x70,0x02,0xc1,0x1f,0x90,0x90,0xf4,0xe0,0x70,0x02, ++0xc1,0x1f,0x90,0x90,0xf8,0xe0,0x70,0x02,0xc1,0x1f,0xa2,0xaf,0xe4,0x33,0x90,0x91, ++0x1c,0xf0,0xc2,0xaf,0x90,0x91,0x07,0x74,0x01,0xf0,0x90,0x91,0x1c,0xe0,0x24,0xff, ++0x92,0xaf,0x12,0x4d,0x9f,0x90,0x00,0x46,0xe0,0x44,0x01,0xfd,0x7f,0x46,0x12,0x4d, ++0xa8,0x90,0x90,0xed,0xe0,0x60,0x15,0x90,0x90,0xf9,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x08,0x12,0x2f,0xd9,0x80,0x06,0x90,0x05,0x22,0x74, ++0x7f,0xf0,0x90,0x00,0x45,0xe0,0x54,0xef,0xfd,0x7f,0x45,0x12,0x4d,0xa8,0x90,0x05, ++0x87,0xe0,0x64,0x80,0xf0,0x90,0x91,0x03,0xe0,0x90,0x05,0x84,0xf0,0x90,0x91,0x04, ++0xe0,0x90,0x05,0x85,0xf0,0x90,0x91,0x05,0xe0,0x90,0x05,0x86,0xf0,0x90,0x91,0x06, ++0xe0,0x90,0x05,0x87,0xf0,0xa2,0xaf,0xe4,0x33,0x90,0x91,0x1c,0xf0,0xc2,0xaf,0x90, ++0x01,0x3c,0xe0,0x44,0x20,0xf0,0x7d,0x20,0xe4,0xff,0x12,0x37,0x00,0x80,0x2d,0x90, ++0x90,0xf5,0xe0,0x70,0x2f,0x90,0x91,0x07,0x12,0x4d,0x9e,0x90,0x00,0x46,0xe0,0x54, ++0xfe,0xfd,0x7f,0x46,0x12,0x4d,0xa8,0x90,0x05,0x22,0xe4,0xf0,0xa2,0xaf,0x33,0x90, ++0x91,0x1c,0xf0,0xc2,0xaf,0x7d,0x20,0xe4,0xff,0x12,0x36,0x92,0x90,0x91,0x1c,0xe0, ++0x24,0xff,0x92,0xaf,0x22,0x8f,0x20,0x8c,0x21,0x8d,0x22,0x22,0x8f,0x23,0x8c,0x24, ++0x8d,0x25,0x22,0xe4,0x90,0x91,0x11,0xf0,0xa3,0xf0,0x90,0x02,0x86,0xe0,0x20,0xe1, ++0x2c,0xc3,0x90,0x91,0x12,0xe0,0x94,0x20,0x90,0x91,0x11,0xe0,0x94,0x03,0x40,0x0a, ++0x90,0x01,0xc6,0xe0,0x44,0x20,0xf0,0x7f,0x00,0x22,0x90,0x91,0x11,0xe4,0x75,0xf0, ++0x01,0x12,0x42,0x81,0x7f,0x01,0x7e,0x00,0x12,0x37,0x54,0x80,0xcd,0x7f,0x01,0x22, ++0x90,0x01,0xcc,0xe0,0x54,0x0f,0x90,0x91,0x11,0xf0,0x90,0x91,0x11,0xe0,0xfd,0x70, ++0x02,0xe1,0xe2,0x90,0x91,0x9c,0xe0,0xff,0x74,0x01,0x7e,0x00,0xa8,0x07,0x08,0x80, ++0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0xef,0x5d,0x70,0x02,0xe1,0xdb,0x90, ++0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd0,0x12,0x43,0x15,0xe0,0x90,0x91,0x12, ++0xf0,0x75,0x63,0x01,0x75,0x64,0x91,0x75,0x65,0x12,0x75,0x66,0x01,0x7b,0x01,0x7a, ++0x91,0x79,0x13,0x12,0x46,0x6d,0x90,0x91,0x13,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54, ++0x01,0x90,0x91,0x9c,0x30,0xe0,0x59,0xe0,0x75,0xf0,0x02,0x90,0x00,0x88,0x12,0x43, ++0x15,0xe0,0x90,0x91,0x14,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x02,0x90,0x00,0x89, ++0x12,0x43,0x15,0xe0,0x90,0x91,0x15,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90, ++0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x16,0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0, ++0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x17,0xf0,0x90,0x91,0x9c,0xe0, ++0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90,0x91,0x18,0xf0,0x80,0x33, ++0xe0,0x75,0xf0,0x04,0x90,0x01,0xd1,0x12,0x43,0x15,0xe0,0x90,0x91,0x14,0xf0,0x90, ++0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd2,0x12,0x43,0x15,0xe0,0x90,0x91,0x15, ++0xf0,0x90,0x91,0x9c,0xe0,0x75,0xf0,0x04,0x90,0x01,0xd3,0x12,0x43,0x15,0xe0,0x90, ++0x91,0x16,0xf0,0xef,0x54,0x7f,0xff,0x7b,0x01,0x7a,0x91,0x79,0x14,0x12,0x52,0x08, ++0x90,0x91,0x11,0xe0,0xff,0x90,0x91,0x9c,0xe0,0xfe,0x74,0x01,0xa8,0x06,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0xf4,0x5f,0x90,0x91,0x11,0xf0,0x90,0x91,0x9c,0xe0,0xff, ++0x74,0x01,0xa8,0x07,0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0x90,0x01,0xcc,0xf0,0x90, ++0x91,0x9c,0xe0,0x04,0xf0,0xe0,0x54,0x03,0xf0,0xc1,0xaa,0x90,0x01,0xc6,0xe0,0x44, ++0x02,0xf0,0x22,0xad,0x07,0x74,0x11,0x2d,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0, ++0x44,0x01,0xf0,0x90,0x04,0x80,0xe0,0x54,0x0f,0xfc,0x74,0x14,0x2d,0xf5,0x82,0xe4, ++0x34,0xfc,0xf5,0x83,0xe0,0x54,0xc0,0x4c,0xfd,0x74,0x14,0x2f,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xed,0xf0,0x22,0xef,0x60,0x0f,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34, ++0xfc,0xf5,0x83,0xe0,0x44,0x10,0xf0,0x22,0x74,0x21,0x2d,0xf5,0x82,0xe4,0x34,0xfc, ++0xf5,0x83,0xe0,0x54,0xef,0xf0,0x22,0xe4,0xf5,0x6d,0xf5,0x71,0xf5,0x70,0x75,0x6f, ++0x0c,0x75,0x6e,0x0c,0x90,0x91,0x3b,0xf0,0x90,0x91,0x37,0xf0,0x90,0x91,0x36,0xf0, ++0x90,0x91,0x39,0x04,0xf0,0x90,0x91,0x27,0xf0,0xe4,0x90,0x91,0x3c,0xf0,0x90,0x91, ++0x29,0xf0,0x90,0x91,0x34,0x74,0x07,0xf0,0xe4,0x90,0x91,0x28,0xf0,0x90,0x91,0x32, ++0xf0,0xa3,0x74,0x03,0xf0,0x90,0x91,0x2f,0x74,0x0a,0xf0,0xa3,0x74,0x05,0xf0,0x90, ++0x91,0x2d,0x74,0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0,0xe4,0x90,0x91,0x2b,0xf0, ++0x90,0x91,0x25,0xf0,0x90,0x91,0x50,0xf0,0x90,0x91,0x31,0xf0,0x90,0x91,0x3a,0xf0, ++0x90,0x91,0x26,0xf0,0x90,0x91,0x38,0xf0,0x90,0x91,0x2e,0xf0,0x90,0x91,0x2c,0xf0, ++0x22,0x12,0x4c,0x89,0xef,0x64,0x01,0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80, ++0x30,0x90,0x91,0x37,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x22,0x90, ++0x91,0x36,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x14,0xe5,0x6f,0x54, ++0x0f,0xd3,0x94,0x04,0x40,0x08,0x90,0x01,0xb9,0x74,0x08,0xf0,0x80,0x03,0x7f,0x01, ++0x22,0x90,0x01,0xb8,0x74,0x08,0xf0,0x7f,0x00,0x22,0x12,0x4c,0x89,0xef,0x64,0x01, ++0x60,0x08,0x90,0x01,0xb9,0x74,0x01,0xf0,0x80,0x58,0xe5,0x71,0x54,0x03,0x60,0x08, ++0x90,0x01,0xb9,0x74,0x02,0xf0,0x80,0x4a,0xe5,0x6f,0x54,0x0f,0xd3,0x94,0x02,0x40, ++0x08,0x90,0x01,0xb9,0x74,0x04,0xf0,0x80,0x39,0xe5,0x71,0x30,0xe2,0x08,0x90,0x01, ++0xb9,0x74,0x08,0xf0,0x80,0x2c,0xe5,0x71,0x30,0xe4,0x08,0x90,0x01,0xb9,0x74,0x10, ++0xf0,0x80,0x1f,0x90,0x91,0x29,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x20,0xf0,0x80, ++0x11,0x90,0x91,0x31,0xe0,0x60,0x08,0x90,0x01,0xb9,0x74,0x80,0xf0,0x80,0x03,0x7f, ++0x01,0x22,0x90,0x01,0xb8,0x74,0x04,0xf0,0x7f,0x00,0x22,0x90,0x06,0x04,0xe0,0x54, ++0xbf,0xf0,0xef,0x60,0x0a,0xe5,0x6d,0xb4,0x01,0x05,0xe4,0xff,0x12,0x47,0xc9,0x53, ++0x6e,0xf0,0x43,0x6e,0x0c,0x22,0x90,0x91,0x9d,0xef,0xf0,0x31,0x9f,0x90,0x91,0x9d, ++0xe0,0x60,0x05,0x90,0x05,0x22,0xe4,0xf0,0x53,0x6e,0xf0,0x43,0x6e,0x04,0x22,0x90, ++0x90,0xd8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12, ++0x2f,0xd9,0x90,0x90,0xdc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe4,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x59,0x12,0x2a, ++0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91,0x51,0xe0,0xb4, ++0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x03,0x2d,0x95,0xe4,0xfd,0x7f,0x01, ++0x12,0x34,0x81,0x22,0x8f,0x77,0xe4,0x90,0x91,0x96,0xf0,0xa3,0xf0,0x90,0x01,0x09, ++0xe0,0x7f,0x00,0x30,0xe7,0x02,0x7f,0x01,0xef,0x65,0x77,0x60,0x3e,0xc3,0x90,0x91, ++0x97,0xe0,0x94,0x88,0x90,0x91,0x96,0xe0,0x94,0x13,0x40,0x08,0x90,0x01,0xc6,0xe0, ++0x44,0x80,0xf0,0x22,0x90,0x91,0x96,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x14, ++0x7e,0x00,0x12,0x37,0x54,0xd3,0x90,0x91,0x97,0xe0,0x94,0x32,0x90,0x91,0x96,0xe0, ++0x94,0x00,0x40,0xb9,0x90,0x01,0xc7,0xe0,0x30,0xe0,0xb2,0x22,0x53,0x6e,0xf0,0x43, ++0x6e,0x01,0x12,0x45,0x00,0x12,0x45,0x01,0x53,0x6e,0xf0,0x43,0x6e,0x02,0x22,0x8f, ++0x78,0x12,0x47,0xe6,0xef,0x64,0x01,0x70,0x2e,0x90,0x91,0x44,0x12,0x48,0x1e,0xe5, ++0x78,0x60,0x10,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x44,0x10, ++0xf0,0x80,0x0e,0x74,0x21,0x2f,0xf5,0x82,0xe4,0x34,0xfc,0xf5,0x83,0xe0,0x54,0xef, ++0xf0,0x90,0x04,0x1f,0x74,0x20,0xf0,0x22,0xe5,0x6d,0x64,0x01,0x70,0x63,0xe5,0x70, ++0x60,0x5f,0xe5,0x70,0x64,0x02,0x60,0x06,0xe5,0x70,0x64,0x05,0x70,0x27,0x90,0x06, ++0xab,0xe0,0x90,0x91,0x27,0xf0,0x90,0x06,0xaa,0xe0,0x90,0x91,0x39,0xf0,0x90,0x91, ++0x27,0xe0,0x70,0x07,0x90,0x91,0x39,0xe0,0xff,0x80,0x05,0x90,0x91,0x27,0xe0,0xff, ++0x90,0x91,0x27,0xef,0xf0,0x90,0x91,0x29,0xe0,0x60,0x03,0xe0,0x14,0xf0,0xe4,0x90, ++0x91,0x28,0xf0,0x90,0x01,0x57,0xf0,0x90,0x01,0x3c,0x74,0x02,0xf0,0x53,0x71,0xfd, ++0x53,0x71,0xef,0xe5,0x70,0x14,0x24,0xfd,0x50,0x02,0x80,0x03,0x12,0x45,0xc7,0x71, ++0x22,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfb, ++0x90,0x91,0x78,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x70,0x02,0x61,0xc0, ++0xe5,0x6d,0x64,0x01,0x70,0x7a,0xe5,0x70,0x14,0x60,0x2b,0x24,0xfd,0x60,0x27,0x24, ++0x02,0x24,0xfb,0x50,0x02,0x80,0x21,0x90,0x91,0x27,0xe0,0x14,0xf0,0xe0,0x60,0x04, ++0xa3,0xe0,0x60,0x14,0x90,0x91,0x27,0xe0,0x70,0x08,0x90,0x91,0x39,0xe0,0x90,0x91, ++0x27,0xf0,0x7b,0x01,0x80,0x02,0x7b,0x01,0xeb,0x60,0x45,0x43,0x71,0x10,0xe4,0x90, ++0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff,0x90,0x91,0x34,0xe0, ++0x2f,0x12,0x44,0x4e,0x90,0x01,0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94, ++0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x10, ++0x90,0x91,0x2c,0xe0,0x90,0x07,0x78,0x60,0x04,0x74,0x0d,0xf0,0x22,0x74,0x09,0xf0, ++0x22,0xe4,0xfb,0x90,0x91,0x7c,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x60, ++0x5f,0xe5,0x6d,0x64,0x01,0x70,0x59,0x0b,0x90,0x91,0x27,0xf0,0x04,0x60,0x51,0x43, ++0x71,0x10,0xe4,0x90,0x91,0x66,0xf0,0x90,0x91,0x3a,0xe0,0x75,0xf0,0x05,0xa4,0xff, ++0x90,0x91,0x34,0xe0,0x2f,0x90,0x91,0x67,0xf0,0xe4,0x1b,0x12,0x44,0x54,0x90,0x01, ++0x57,0x74,0x05,0xf0,0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f, ++0x04,0x12,0x47,0x27,0x90,0x91,0x2e,0xe0,0x60,0x11,0x90,0x91,0x2c,0xe0,0x90,0x07, ++0x78,0x60,0x05,0x74,0x0d,0xf0,0x80,0x03,0x74,0x09,0xf0,0x90,0x05,0x22,0xe4,0xf0, ++0x22,0x90,0x91,0x80,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe5,0x70,0x14,0x24,0xfd, ++0x50,0x02,0x80,0x21,0x90,0x91,0x3b,0xe0,0x60,0x06,0x7d,0x01,0x7f,0x0c,0x80,0x0d, ++0xe5,0x6e,0x54,0x0f,0xc3,0x94,0x04,0x50,0x07,0x7d,0x01,0x7f,0x04,0x12,0x47,0x27, ++0xe4,0xff,0x12,0x48,0xb3,0x22,0x90,0x91,0x08,0xe0,0x54,0xf0,0x44,0x03,0xf0,0x54, ++0x0f,0x44,0x80,0xf0,0x7b,0x00,0x7a,0x00,0x79,0x58,0x90,0x91,0x71,0x12,0x43,0x41, ++0x0b,0x7a,0x91,0x79,0x08,0x02,0x46,0xb7,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0,0x90, ++0x91,0x84,0xee,0xf0,0xa3,0xef,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0x90,0x91,0x84,0xe0, ++0xfe,0xa3,0xe0,0xf5,0x82,0x8e,0x83,0xe0,0x60,0x2d,0xc3,0x90,0x91,0x87,0xe0,0x94, ++0xe8,0x90,0x91,0x86,0xe0,0x94,0x03,0x40,0x0b,0x90,0x01,0xc6,0xe0,0x44,0x10,0xf0, ++0x7f,0x00,0x80,0x15,0x90,0x91,0x86,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x7f,0x0a, ++0x7e,0x00,0x12,0x37,0x54,0x80,0xc5,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0xd3,0x10, ++0xaf,0x01,0xc3,0xc0,0xd0,0x90,0x91,0x1c,0x12,0x43,0x41,0x90,0x91,0x1f,0x12,0x2a, ++0x8b,0x00,0x00,0x00,0x00,0x90,0x91,0x1c,0x12,0x43,0x21,0x90,0x00,0x01,0x12,0x42, ++0x20,0x90,0x91,0x3b,0xf0,0x90,0x00,0x03,0x12,0x42,0x20,0x90,0x91,0x25,0xf0,0x90, ++0x00,0x04,0x12,0x42,0x20,0xff,0x54,0x01,0x90,0x91,0x26,0xf0,0xef,0xc3,0x13,0x54, ++0x01,0x90,0x91,0x2e,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff,0x13,0x13,0x54,0x01, ++0x90,0x91,0x2c,0xf0,0x90,0x91,0x2e,0xe0,0x90,0x91,0x1f,0x70,0x26,0x12,0x2a,0x8b, ++0x00,0x00,0x02,0x10,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f,0x12,0x2a,0x8b,0x00,0x00,0x03, ++0x10,0x80,0x24,0x12,0x2a,0x8b,0x00,0x00,0x01,0x10,0x90,0x91,0x1f,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x60,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x1f, ++0x12,0x2a,0x8b,0x00,0x00,0x03,0x00,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x91,0x26,0xe0,0x70,0x3d, ++0x90,0x91,0x38,0x74,0x01,0xf0,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x1f, ++0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0xec,0x44,0x02,0xfc,0x90,0x91,0x1f, ++0x12,0x2a,0x7f,0x90,0x91,0x1f,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x00,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x02,0x86,0xe0,0x54,0xfb,0xf0,0x90,0x91,0x1c, ++0x12,0x43,0x21,0x12,0x49,0x80,0x90,0x01,0xe5,0xe5,0x70,0xf0,0x90,0x91,0x3b,0xe0, ++0x90,0x01,0xe6,0xf0,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x00,0x02,0x12,0x42,0x20,0xff, ++0x30,0xe0,0x25,0x12,0x29,0xd9,0x90,0x91,0x2f,0xf0,0x90,0x00,0x01,0x12,0x42,0x20, ++0x90,0x91,0x30,0xf0,0xef,0xc3,0x13,0x54,0x7f,0x90,0x91,0x2d,0xf0,0x90,0x00,0x03, ++0x12,0x42,0x20,0x90,0x91,0x35,0xf0,0x22,0x90,0x91,0x2f,0x74,0x0a,0xf0,0x90,0x91, ++0x30,0x74,0x05,0xf0,0x90,0x91,0x2d,0x74,0x14,0xf0,0x90,0x91,0x35,0x74,0x05,0xf0, ++0x22,0x90,0x02,0x09,0xe0,0xfd,0x12,0x29,0xd9,0xfe,0xaf,0x05,0xed,0x2e,0x90,0x91, ++0x41,0xf0,0x90,0x00,0x01,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x42,0xf0,0x90, ++0x00,0x02,0x12,0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x43,0xf0,0x90,0x00,0x03,0x12, ++0x42,0x20,0xff,0xed,0x2f,0x90,0x91,0x44,0xf0,0x90,0x00,0x04,0x12,0x42,0x20,0xff, ++0xae,0x05,0xed,0x2f,0x90,0x91,0x45,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0x47,0xe0,0x90,0x91,0x1d,0xf0,0x90,0x91,0x48,0xe0,0xf5,0x19,0xa3,0xe0, ++0xf5,0x1a,0xe4,0xf5,0x16,0x74,0x4a,0x25,0x16,0xf5,0x82,0xe4,0x34,0x91,0xf5,0x83, ++0xe0,0xff,0x74,0x1b,0x25,0x16,0xf8,0xa6,0x07,0x05,0x16,0xe5,0x16,0xb4,0x04,0xe5, ++0x90,0x91,0x1d,0xe0,0x12,0x43,0x4a,0x66,0xe6,0x00,0x68,0x13,0x01,0x66,0xee,0x02, ++0x66,0xee,0x03,0x66,0xee,0x04,0x68,0x13,0x05,0x67,0xe3,0x80,0x67,0xf9,0x81,0x68, ++0x13,0x82,0x00,0x00,0x68,0x0f,0xaf,0x1e,0x12,0x73,0xdd,0x02,0x68,0x13,0x90,0x91, ++0x1d,0xe0,0xff,0xb4,0x02,0x08,0x90,0x91,0x1c,0x74,0x01,0xf0,0x80,0x0f,0xef,0x90, ++0x91,0x1c,0xb4,0x03,0x05,0x74,0x02,0xf0,0x80,0x03,0x74,0x04,0xf0,0xc3,0xe5,0x19, ++0x94,0x08,0x50,0x4a,0xe4,0xf5,0x16,0x90,0x91,0x1c,0xe0,0xff,0xe5,0x16,0xc3,0x9f, ++0x40,0x03,0x02,0x68,0x13,0xc3,0xe5,0x19,0x94,0x01,0x50,0x14,0xe5,0x16,0x25,0x1a, ++0xff,0xc3,0x74,0x03,0x95,0x16,0x24,0x1b,0xf8,0xe6,0xfd,0x12,0x4d,0xa8,0x80,0x1a, ++0xc3,0x74,0x03,0x95,0x16,0x24,0x1b,0xf8,0xe6,0xff,0xe5,0x16,0x7c,0x00,0x25,0x1a, ++0xfd,0xec,0x35,0x19,0x8d,0x82,0xf5,0x83,0xef,0xf0,0x05,0x16,0x80,0xb9,0xc3,0xe5, ++0x19,0x94,0x10,0x40,0x03,0x02,0x68,0x13,0x90,0x91,0x1d,0xe0,0x64,0x04,0x60,0x03, ++0x02,0x68,0x13,0xaf,0x1c,0xfc,0xfd,0xfe,0x78,0x10,0x12,0x2a,0x6c,0xc0,0x04,0xc0, ++0x05,0xc0,0x06,0xc0,0x07,0xaf,0x1b,0xe4,0xfc,0xfd,0xfe,0x78,0x18,0x12,0x2a,0x6c, ++0xd0,0x03,0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x42,0xfc,0xc0,0x04,0xc0,0x05,0xc0, ++0x06,0xc0,0x07,0xaf,0x1d,0xe4,0xfc,0xfd,0xfe,0x78,0x08,0x12,0x2a,0x6c,0xd0,0x03, ++0xd0,0x02,0xd0,0x01,0xd0,0x00,0x12,0x42,0xfc,0xa8,0x04,0xa9,0x05,0xaa,0x06,0xab, ++0x07,0xaf,0x1e,0xe4,0xfc,0xfd,0xfe,0x12,0x42,0xfc,0xa3,0x12,0x2a,0x7f,0x90,0x91, ++0x1e,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0xaf,0x1a,0xae,0x19,0x12,0x2f, ++0xd9,0x80,0x30,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25,0x1e,0xf5,0x18,0xe4,0x3e,0xf5, ++0x17,0xaf,0x18,0xfe,0x12,0x37,0x54,0x80,0x1a,0xe5,0x1d,0x7f,0x00,0xfe,0xef,0x25, ++0x1e,0xf5,0x18,0xe4,0x3e,0xf5,0x17,0xaf,0x18,0xfe,0x12,0x36,0xcb,0x80,0x04,0x7f, ++0x00,0x80,0x02,0x7f,0x01,0xd0,0xd0,0x92,0xaf,0x22,0x8e,0x0e,0x8f,0x0f,0x8b,0x10, ++0x8a,0x11,0x89,0x12,0xe4,0x90,0x91,0x11,0xf0,0xef,0x90,0x00,0x31,0xf0,0x12,0x4c, ++0xa0,0xe5,0x0e,0x54,0x03,0xff,0x90,0x00,0x32,0xe0,0x54,0xfc,0x4f,0xf0,0x12,0x4c, ++0xa0,0x90,0x00,0x33,0xe0,0x54,0x7f,0xf0,0x12,0x4c,0xa0,0x90,0x00,0x33,0xe0,0x20, ++0xe7,0x0e,0x90,0x91,0x11,0xe0,0xc3,0x94,0x64,0x50,0x05,0xe0,0x04,0xf0,0x80,0xeb, ++0x90,0x91,0x11,0xe0,0xc3,0x94,0x64,0x50,0x10,0x90,0x00,0x30,0xe0,0xab,0x10,0xaa, ++0x11,0xa9,0x12,0x12,0x42,0x4d,0x7f,0x01,0x22,0x7f,0x00,0x22,0xe4,0x90,0x91,0x98, ++0xf0,0xa3,0xf0,0x90,0x05,0xf8,0xe0,0x70,0x0f,0xa3,0xe0,0x70,0x0b,0xa3,0xe0,0x70, ++0x07,0xa3,0xe0,0x70,0x03,0x7f,0x01,0x22,0xd3,0x90,0x91,0x99,0xe0,0x94,0xe8,0x90, ++0x91,0x98,0xe0,0x94,0x03,0x40,0x03,0x7f,0x00,0x22,0x7f,0x32,0x7e,0x00,0x12,0x37, ++0x54,0x90,0x91,0x98,0xe4,0x75,0xf0,0x01,0x12,0x42,0x81,0x80,0xc6,0x7f,0x78,0x7e, ++0x08,0x12,0x27,0xde,0x90,0x90,0xd8,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27, ++0xde,0x90,0x90,0xdc,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xe0,0x12,0x2a,0x7f,0x90,0x91,0x51,0xe0,0x90,0x90,0xd8,0xb4,0x01,0x0d,0x12,0x43, ++0x09,0xef,0x54,0xc7,0xff,0xed,0x54,0xc7,0xfd,0x80,0x07,0x12,0x43,0x09,0xef,0x54, ++0xc7,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x08,0x12,0x2f,0xd9, ++0x90,0x90,0xdc,0x12,0x43,0x09,0xef,0x54,0x0f,0xff,0xec,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xe0,0x12,0x43,0x09,0xef,0x44, ++0x02,0xff,0xec,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x00,0x7e,0x08,0x12,0x2f,0xd9, ++0x7f,0x70,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xe4,0x12,0x2a,0x7f,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa0,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4,0xfd,0xff,0x12,0x34,0x81,0x90,0x91, ++0x51,0xe0,0xb4,0x01,0x11,0x90,0x80,0x59,0x12,0x2a,0x8b,0x00,0x00,0x00,0x00,0xe4, ++0xfd,0x7f,0x01,0x12,0x34,0x81,0x22,0xef,0x70,0x02,0x61,0x3d,0x90,0x90,0xe8,0xe0, ++0x60,0x02,0xe1,0x08,0x90,0x90,0xd4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x80,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x84,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0x88, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x90,0x8c,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x90,0x90,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x94,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x98,0x12,0x43,0x09,0x90, ++0x80,0x85,0x12,0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0x9c,0x12, ++0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x90,0xa0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x90,0xa4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x88, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xa8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a, ++0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xac,0x12,0x43,0x09,0x90,0x80, ++0x85,0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xb0,0x12,0x43, ++0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd4,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90, ++0xb4,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xd8,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x90,0xb8,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0xdc,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x90,0xbc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc0,0x12,0x43,0x09,0x90,0x80,0x85, ++0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x90,0xc4,0x12,0x43,0x09, ++0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x90,0x90,0xc8, ++0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9, ++0x90,0x90,0xcc,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09, ++0x12,0x2f,0xd9,0x90,0x90,0xd0,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x04,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x90,0xe8,0x74,0x01,0xf0,0x22,0x90,0x90,0xe8, ++0xe0,0x64,0x01,0x60,0x02,0xe1,0x08,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90, ++0xd4,0x12,0x2a,0x7f,0x7f,0x44,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x80,0x12,0x2a, ++0x7f,0x7f,0x5c,0x7e,0x08,0x12,0x27,0xde,0x90,0x90,0x84,0x12,0x2a,0x7f,0x7f,0x6c, ++0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x88,0x12,0x2a,0x7f,0x7f,0x70,0x7e,0x0e,0x12, ++0x27,0xde,0x90,0x90,0x8c,0x12,0x2a,0x7f,0x7f,0x74,0x7e,0x0e,0x12,0x27,0xde,0x90, ++0x90,0x90,0x12,0x2a,0x7f,0x7f,0x78,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x94,0x12, ++0x2a,0x7f,0x7f,0x7c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x98,0x12,0x2a,0x7f,0x7f, ++0x80,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0x9c,0x12,0x2a,0x7f,0x7f,0x84,0x7e,0x0e, ++0x12,0x27,0xde,0x90,0x90,0xa0,0x12,0x2a,0x7f,0x7f,0x88,0x7e,0x0e,0x12,0x27,0xde, ++0x90,0x90,0xa4,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xa8, ++0x12,0x2a,0x7f,0x7f,0xd0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xac,0x12,0x2a,0x7f, ++0x7f,0xd4,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xb0,0x12,0x2a,0x7f,0x7f,0xd8,0x7e, ++0x0e,0x12,0x27,0xde,0x90,0x90,0xb4,0x12,0x2a,0x7f,0x7f,0xdc,0x7e,0x0e,0x12,0x27, ++0xde,0x90,0x90,0xb8,0x12,0x2a,0x7f,0x7f,0xe0,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90, ++0xbc,0x12,0x2a,0x7f,0x7f,0xec,0x7e,0x0e,0x12,0x27,0xde,0x90,0x90,0xc0,0x12,0x2a, ++0x7f,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x90,0xc4,0x12,0x2a,0x7f,0x7f,0x04, ++0x7e,0x0d,0x12,0x27,0xde,0x90,0x90,0xc8,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12, ++0x27,0xde,0x90,0x90,0xcc,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90, ++0x90,0xd0,0x12,0x2a,0x7f,0x7f,0x8c,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12, ++0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x44,0xc0,0xfd,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f, ++0x8c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x01,0x00,0x00, ++0x7f,0x44,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0xdb,0x25, ++0xa4,0x7f,0x5c,0x7e,0x08,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb, ++0x25,0xa4,0x7f,0x6c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20, ++0xdb,0x25,0xa4,0x7f,0x70,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b, ++0x04,0x1b,0x25,0xa4,0x7f,0x74,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a, ++0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x78,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12, ++0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x7c,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85, ++0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x80,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80, ++0x85,0x12,0x2a,0x8b,0x63,0xdb,0x25,0xa4,0x7f,0x84,0x7e,0x0e,0x12,0x2f,0xd9,0x90, ++0x80,0x85,0x12,0x2a,0x8b,0x04,0x1b,0x25,0xa4,0x7f,0x88,0x7e,0x0e,0x12,0x2f,0xd9, ++0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0x8c,0x7e,0x0e,0x12,0x2f, ++0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd0,0x7e,0x0e,0x12, ++0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd4,0x7e,0x0e, ++0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x20,0xdb,0x25,0xa4,0x7f,0xd8,0x7e, ++0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f,0xdc, ++0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x00,0x1b,0x25,0xa4,0x7f, ++0xe0,0x7e,0x0e,0x12,0x2f,0xd9,0x90,0x80,0x85,0x12,0x2a,0x8b,0x24,0xdb,0x25,0xa4, ++0x7f,0xec,0x7e,0x0e,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0c,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90,0x91,0x88, ++0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f, ++0x7f,0x04,0x7e,0x0c,0x12,0x2f,0xd9,0x7f,0x04,0x7e,0x0d,0x12,0x27,0xde,0x90,0x91, ++0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x04,0x7e,0x0d,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xe4,0xff,0xec,0x90, ++0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x11,0xff,0xec, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12, ++0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f,0xd9,0x7f,0x0c,0x7e,0x09,0x12,0x27,0xde, ++0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09,0xed,0x54,0x0f,0xfd, ++0xec,0x54,0xf0,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91,0x88,0x12,0x43,0x09, ++0xed,0x44,0x10,0xfd,0xec,0x44,0x01,0xfc,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x0c,0x7e,0x09,0x12,0x2f, ++0xd9,0x7f,0x04,0x7e,0x08,0x12,0x27,0xde,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90,0x91, ++0x88,0x12,0x43,0x09,0xef,0x54,0xf0,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f,0x90, ++0x91,0x88,0x12,0x43,0x09,0xef,0x44,0x01,0xff,0xec,0x90,0x91,0x88,0x12,0x2a,0x7f, ++0x90,0x91,0x88,0x12,0x43,0x09,0x90,0x80,0x85,0x12,0x2a,0x7f,0x7f,0x04,0x7e,0x08, ++0x12,0x2f,0xd9,0xe4,0x90,0x90,0xe8,0xf0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0,0xd0, ++0x90,0x91,0xa0,0xef,0xf0,0xd3,0x94,0x07,0x50,0x47,0xe0,0xff,0x74,0x01,0xa8,0x07, ++0x08,0x80,0x02,0xc3,0x33,0xd8,0xfc,0xf4,0xff,0x90,0x00,0x46,0xe0,0x5f,0xf0,0x12, ++0x4c,0xa0,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e,0x00,0xa8,0x05,0x08,0x80,0x05, ++0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00,0x44,0xe0,0xfb,0xe4,0xfe,0xef, ++0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13,0xce,0x13,0xd8,0xf8,0xff,0x80, ++0x44,0x90,0x91,0xa0,0xe0,0x24,0xf8,0xf0,0xe0,0xff,0x74,0x01,0xa8,0x07,0x08,0x80, ++0x02,0xc3,0x33,0xd8,0xfc,0x12,0x4c,0x98,0x90,0x91,0xa0,0xe0,0xfd,0x74,0x01,0x7e, ++0x00,0xa8,0x05,0x08,0x80,0x05,0xc3,0x33,0xce,0x33,0xce,0xd8,0xf9,0xff,0x90,0x00, ++0x42,0xe0,0xfb,0xe4,0xfe,0xef,0x5b,0xa8,0x05,0x08,0x80,0x06,0xce,0xa2,0xe7,0x13, ++0xce,0x13,0xd8,0xf8,0xff,0xd0,0xd0,0x92,0xaf,0x22,0xe4,0xfd,0x7f,0x45,0x12,0x4d, ++0xa8,0x90,0x04,0xfd,0xe4,0xf0,0xa3,0xf0,0x90,0x90,0xf7,0xf0,0x90,0x90,0xfd,0xf0, ++0x90,0x91,0x00,0xf0,0x90,0x90,0xfe,0xf0,0x90,0x91,0x01,0xf0,0x90,0x90,0xff,0xf0, ++0x90,0x91,0x02,0xf0,0x90,0x90,0xe9,0x04,0xf0,0xe4,0xa3,0xf0,0xa3,0xf0,0xa3,0xf0, ++0x90,0x90,0xee,0xf0,0x90,0x90,0xf3,0xf0,0x90,0x90,0xf5,0xf0,0x90,0x91,0x07,0xf0, ++0x90,0x90,0xf8,0xf0,0x90,0x90,0xf4,0xf0,0x90,0x90,0xed,0xf0,0x90,0x00,0x51,0xe0, ++0x44,0xc0,0xfd,0x7f,0x51,0x02,0x4d,0xa8,0x90,0x91,0x07,0xe0,0x64,0x01,0x60,0x08, ++0x90,0x90,0xf5,0xe0,0x60,0x02,0x01,0xdf,0x90,0x90,0xe9,0xe0,0xc3,0x94,0xff,0x50, ++0x05,0xe0,0x04,0xf0,0x80,0x3b,0x90,0x90,0xea,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0, ++0x04,0xf0,0xe4,0x80,0x28,0x90,0x90,0xeb,0xe0,0xc3,0x94,0xff,0x50,0x0a,0xe0,0x04, ++0xf0,0xe4,0x90,0x90,0xea,0xf0,0x80,0x15,0x90,0x90,0xec,0xe0,0xc3,0x94,0xff,0x50, ++0x10,0xe0,0x04,0xf0,0xe4,0x90,0x90,0xeb,0xf0,0x90,0x90,0xea,0xf0,0x90,0x90,0xe9, ++0xf0,0x90,0x00,0x44,0xe0,0x54,0x0c,0x60,0x76,0xe0,0x30,0xe2,0x32,0x90,0x90,0xfd, ++0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0,0x04,0xf0,0x80,0x24,0x90,0x90,0xfe,0xe0,0xc3, ++0x94,0xff,0x50,0x06,0xe0,0x04,0xf0,0xe4,0x80,0x11,0x90,0x90,0xff,0xe0,0xc3,0x94, ++0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4,0x90,0x90,0xfe,0xf0,0x90,0x90,0xfd,0xf0,0x90, ++0x00,0x44,0xe0,0x30,0xe3,0x32,0x90,0x91,0x00,0xe0,0xc3,0x94,0xff,0x50,0x05,0xe0, ++0x04,0xf0,0x80,0x24,0x90,0x91,0x01,0xe0,0xc3,0x94,0xff,0x50,0x06,0xe0,0x04,0xf0, ++0xe4,0x80,0x11,0x90,0x91,0x02,0xe0,0xc3,0x94,0xff,0x50,0x0c,0xe0,0x04,0xf0,0xe4, ++0x90,0x91,0x01,0xf0,0x90,0x91,0x00,0xf0,0x90,0x04,0xfd,0xe0,0x44,0x01,0xf0,0x22, ++0xe5,0x6e,0x30,0xe3,0x04,0xe4,0xff,0x80,0x02,0x7f,0x01,0x02,0x47,0xc9,0x90,0x91, ++0x53,0xe0,0x30,0xe0,0x49,0xe5,0x6d,0x64,0x01,0x70,0x43,0x90,0x91,0x52,0xe0,0x04, ++0xf0,0xe5,0x70,0x64,0x03,0x60,0x05,0xe5,0x70,0xb4,0x06,0x0d,0x90,0x91,0x52,0xe0, ++0xff,0x74,0x01,0xd3,0x9f,0x50,0x14,0x80,0x07,0x90,0x91,0x52,0xe0,0xb4,0x0a,0x0b, ++0x90,0x91,0x55,0xe0,0x04,0xf0,0xe4,0x90,0x91,0x52,0xf0,0x90,0x91,0x55,0xe0,0xff, ++0x90,0x91,0x54,0xe0,0xb5,0x07,0x07,0x11,0xe0,0xe4,0x90,0x91,0x55,0xf0,0x22,0x90, ++0x06,0x90,0xe0,0x44,0x01,0xf0,0x90,0x91,0x61,0xe0,0x30,0xe0,0x3c,0x90,0x91,0x5f, ++0xe0,0xff,0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x54,0x01,0xfd,0x12,0x4c,0xb0,0x90, ++0x91,0x60,0xe0,0x75,0xf0,0x20,0xa4,0xff,0xae,0xf0,0x12,0x37,0x54,0x90,0x91,0x5e, ++0xe0,0xc4,0x13,0x54,0x07,0x30,0xe0,0x07,0xa3,0xe0,0xff,0xe4,0xfd,0x80,0x07,0x90, ++0x91,0x5f,0xe0,0xff,0x7d,0x01,0x12,0x4c,0xb0,0x22,0xd3,0x10,0xaf,0x01,0xc3,0xc0, ++0xd0,0xe4,0x90,0x91,0x19,0xf0,0xa3,0x74,0x08,0xf0,0xa3,0xf0,0xe4,0xa3,0xf0,0x90, ++0x01,0x1f,0xe0,0xfe,0x90,0x01,0x1e,0xe0,0x7c,0x00,0x24,0x00,0xff,0xec,0x3e,0x90, ++0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x02,0x87,0xe0,0x90,0x91,0x18,0xf0,0x90,0x91, ++0x56,0xe0,0x20,0xe0,0x02,0x61,0xb7,0xe4,0x90,0x91,0x17,0xf0,0x90,0x91,0x18,0xe0, ++0xff,0x90,0x91,0x17,0xe0,0xc3,0x9f,0x40,0x02,0x61,0xb7,0x90,0x91,0x11,0xe0,0xfc, ++0xa3,0xe0,0xfd,0xec,0xff,0x90,0xfd,0x11,0xf0,0x90,0x91,0x1c,0xef,0xf0,0x74,0x02, ++0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0f,0xfc,0x33,0x33,0x33,0x54, ++0xf8,0xff,0xed,0x24,0x18,0x2f,0x90,0x91,0x15,0xf0,0xe0,0x24,0x00,0xf5,0x82,0xe4, ++0x34,0xfb,0xf5,0x83,0xe0,0x54,0xfc,0x90,0x91,0x16,0xf0,0x74,0x01,0x2d,0xf5,0x82, ++0xe4,0x34,0xfb,0xf5,0x83,0xe0,0xfe,0x74,0x00,0x2d,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x7a,0x00,0x24,0x00,0xff,0xea,0x3e,0x54,0x3f,0xab,0x07,0xfa,0x90,0x91, ++0x13,0xf0,0xa3,0xeb,0xf0,0xaf,0x04,0xef,0x75,0xf0,0x08,0xa4,0x24,0x18,0xff,0xe4, ++0x35,0xf0,0xfe,0xef,0x2b,0xfb,0xee,0x3a,0xfa,0x90,0x91,0x5a,0xe0,0xfe,0xa3,0xe0, ++0xff,0xad,0x03,0xac,0x02,0x12,0x45,0x09,0xaa,0x06,0xab,0x07,0x90,0x91,0x15,0xe0, ++0x24,0x00,0xf5,0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x30,0xe7,0x08,0x90,0x91,0x19, ++0x74,0x02,0xf0,0x80,0x05,0xe4,0x90,0x91,0x19,0xf0,0xaf,0x03,0x90,0x91,0x11,0xea, ++0x8f,0xf0,0x12,0x42,0x81,0x90,0x91,0x5c,0xe0,0xfe,0xa3,0xe0,0xff,0x90,0x91,0x11, ++0xe0,0xfc,0xa3,0xe0,0xfd,0xd3,0x9f,0xec,0x9e,0x40,0x1b,0x90,0x91,0x5d,0xe0,0x24, ++0x01,0xff,0x90,0x91,0x5c,0xe0,0x34,0x00,0xfe,0xc3,0xed,0x9f,0xff,0xec,0x9e,0x90, ++0x91,0x11,0xf0,0xa3,0xef,0xf0,0x90,0x91,0x16,0xe0,0xff,0x24,0x40,0x60,0x04,0x24, ++0x20,0x70,0x27,0x90,0x91,0x5e,0xe0,0xfe,0xc4,0x13,0x13,0x13,0x54,0x01,0x20,0xe0, ++0x02,0x61,0x8f,0xef,0x90,0x00,0x81,0xb4,0xa0,0x05,0xe0,0x44,0x04,0x80,0x03,0xe0, ++0x44,0x08,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x61,0x88,0x90,0x91,0x5e,0xe0,0xc4,0x13, ++0x13,0x54,0x03,0x20,0xe0,0x02,0x61,0x8f,0x90,0x91,0x15,0xe0,0xff,0x24,0x00,0xf5, ++0x82,0xe4,0x34,0xfb,0xf5,0x83,0xe0,0x54,0x0c,0x64,0x08,0x70,0x72,0x90,0x91,0x19, ++0xe0,0xfe,0xef,0x2e,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x1e,0xf5,0x82,0xe4,0x34,0xfb, ++0xf5,0x83,0xe0,0x64,0x88,0x70,0x58,0x74,0x1f,0x2f,0xf5,0x82,0xe4,0x34,0xfb,0xf5, ++0x83,0xe0,0x64,0x8e,0x70,0x49,0x90,0x91,0x19,0xe0,0xff,0x90,0x91,0x15,0xe0,0x2f, ++0xff,0x90,0x91,0x1a,0xe0,0x2f,0xff,0xa3,0xe0,0x2f,0xff,0x24,0x19,0xf5,0x82,0xe4, ++0x34,0xfb,0xf5,0x83,0xe0,0x64,0x03,0x70,0x26,0x74,0x1e,0x2f,0xf5,0x82,0xe4,0x34, ++0xfb,0xf5,0x83,0xe0,0x90,0x00,0x81,0x30,0xe3,0x05,0xe0,0x44,0x01,0x80,0x03,0xe0, ++0x44,0x02,0xfd,0x7f,0x81,0x12,0x4d,0xa8,0x90,0x91,0x56,0xe0,0x44,0x80,0xf0,0x90, ++0x91,0x56,0xe0,0xff,0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x02,0x31,0x3f,0x71, ++0xbc,0xbf,0x01,0x13,0x90,0x91,0x11,0xe0,0xfe,0xa3,0xe0,0xff,0x12,0x44,0xb5,0x90, ++0x91,0x17,0xe0,0x04,0xf0,0x21,0xcc,0xd0,0xd0,0x92,0xaf,0x22,0x90,0x91,0x56,0xe0, ++0xc4,0x13,0x13,0x13,0x54,0x01,0x30,0xe0,0x11,0xe0,0x44,0x80,0xf0,0x90,0x91,0x5e, ++0xe0,0xc4,0x54,0x0f,0x20,0xe0,0x03,0x7f,0x00,0x22,0x7f,0x01,0x22,0x8f,0x1f,0xe4, ++0x90,0x91,0x22,0xf0,0xe5,0x1f,0x14,0xfe,0x90,0x91,0x22,0xe0,0xff,0xc3,0x9e,0x50, ++0x0e,0xef,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91,0x22,0xe0,0x04,0xf0,0x80,0xe5,0xe5, ++0x1f,0x14,0xff,0x7d,0xff,0x12,0x34,0xb7,0x90,0x91,0x22,0xe5,0x1f,0xf0,0x90,0x91, ++0x22,0xe0,0xc3,0x94,0xff,0x50,0x0f,0xe0,0xff,0x04,0xfd,0x12,0x34,0xb7,0x90,0x91, ++0x22,0xe0,0x04,0xf0,0x80,0xe8,0xad,0x1f,0x7f,0xff,0x02,0x34,0xb7,0xc3,0xee,0x94, ++0x01,0x40,0x0a,0x0d,0xed,0x13,0x90,0xfd,0x10,0xf0,0xe4,0x2f,0xff,0x22,0xc3,0xee, ++0x94,0x01,0x40,0x1e,0x90,0xfd,0x11,0xe0,0xb5,0x05,0x14,0x90,0x01,0x17,0xe0,0xb5, ++0x05,0x07,0x90,0xfd,0x11,0xe4,0xf0,0x80,0x06,0xed,0x04,0x90,0xfd,0x11,0xf0,0xe4, ++0x2f,0xff,0x22,0x00,0x18,0x58,}; ++ ++ ++ ++ ++ ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_led.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,2668 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++ ++#include "drv_types.h" ++#include "rtl8192c_hal.h" ++ ++//================================================================================ ++// Constant. ++//================================================================================ ++ ++// ++// Default LED behavior. ++// ++#define LED_BLINK_NORMAL_INTERVAL 100 ++#define LED_BLINK_SLOWLY_INTERVAL 200 ++#define LED_BLINK_LONG_INTERVAL 400 ++ ++#define LED_BLINK_NO_LINK_INTERVAL_ALPHA 1000 ++#define LED_BLINK_LINK_INTERVAL_ALPHA 500 //500 ++#define LED_BLINK_SCAN_INTERVAL_ALPHA 180 //150 ++#define LED_BLINK_FASTER_INTERVAL_ALPHA 50 ++#define LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA 5000 ++ ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++ ++//================================================================================ ++// Prototype of protected function. ++//================================================================================ ++ ++ ++static void ++BlinkTimerCallback( ++ unsigned long data ++ ); ++ ++static void ++BlinkWorkItemCallback( ++ struct work_struct *work ++ ); ++ ++// ++// Description: ++// Reset blinking status of LED_871x object. ++// ++static void ++ResetLedStatus(PLED_871x pLed) { ++ pLed->CurrLedState = LED_OFF; // Current LED state. ++ pLed->bLedOn = _FALSE; // true if LED is ON, false if LED is OFF. ++ ++ pLed->bLedBlinkInProgress = _FALSE; // true if it is blinking, false o.w.. ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ pLed->BlinkTimes = 0; // Number of times to toggle led state for blinking. ++ pLed->BlinkingLedState = LED_UNKNOWN; // Next state for blinking, either LED_ON or LED_OFF are. ++} ++ ++//================================================================================ ++// LED_819xUsb routines. ++//================================================================================ ++ ++// ++// Description: ++// Initialize an LED_871x object. ++// ++static void ++InitLed871x( ++ _adapter *padapter, ++ PLED_871x pLed, ++ LED_PIN_871x LedPin ++ ) ++{ ++ pLed->padapter = padapter; ++ pLed->LedPin = LedPin; ++ ++ ResetLedStatus(pLed); ++ ++ _init_timer(&(pLed->BlinkTimer), padapter->pnetdev, BlinkTimerCallback, pLed); ++ _init_workitem(&(pLed->BlinkWorkItem), BlinkWorkItemCallback, pLed); ++} ++ ++ ++// ++// Description: ++// DeInitialize an LED_871x object. ++// ++static void ++DeInitLed871x( ++ PLED_871x pLed ++ ) ++{ ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ ResetLedStatus(pLed); ++} ++ ++// ++// Description: ++// Turn on LED according to LedPin specified. ++// ++static void ++SwLedOn( ++ _adapter *padapter, ++ PLED_871x pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ return; ++ } ++ ++ if( (BOARD_MINICARD == pHalData->BoardType )|| ++ (BOARD_USB_SOLO == pHalData->BoardType)|| ++ (BOARD_USB_COMBO == pHalData->BoardType)) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xf0)|BIT5|BIT6); // SW control led0 on. ++ break; ++ ++ case LED_PIN_LED1: ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0x0f)|BIT5); // SW control led1 on. ++ break; ++ ++ default: ++ break; ++ ++ } ++ } ++ else ++ { ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ if(pHalData->AntDivCfg) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg&0xe0)|BIT7|BIT6|BIT5); // SW control led0 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); ++ } ++ else ++#endif ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG0); ++ rtw_write8(padapter,REG_LEDCFG0, LedCfg&0x70); // SW control led0 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg = rtw_read8(padapter,(REG_LEDCFG1)); ++ rtw_write8(padapter,(REG_LEDCFG1), LedCfg&0x70); // SW control led1 on. ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOn LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ ++ break; ++ ++ default: ++ break; ++ } ++ } ++ pLed->bLedOn = _TRUE; ++ ++} ++ ++ ++// ++// Description: ++// Turn off LED according to LedPin specified. ++// ++static void ++SwLedOff( ++ _adapter *padapter, ++ PLED_871x pLed ++) ++{ ++ u8 LedCfg; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if((padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ goto exit; ++ } ++ ++ if( (BOARD_MINICARD == pHalData->BoardType )|| ++ (BOARD_USB_SOLO == pHalData->BoardType)|| ++ (BOARD_USB_COMBO == pHalData->BoardType)) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2);//0x4E ++ ++ switch(pLed->LedPin) ++ { ++ ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++ if(BOARD_USB_COMBO == pHalData->BoardType) ++ { ++ LedCfg &= 0x90; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); ++ LedCfg = rtw_read8(padapter, REG_MAC_PINMUX_CFG); ++ LedCfg &= 0xFE; ++ rtw_write8(padapter, REG_MAC_PINMUX_CFG, LedCfg); ++ } ++ else ++ { ++ LedCfg &= 0xf0; // Set to software control. ++ if(pHalData->bLedOpenDrain == _TRUE) // Open-drain arrangement for controlling the LED ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT1|BIT5|BIT6)); ++ else ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT5|BIT6)); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg &= 0x0f; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3)); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ else ++ { ++ switch(pLed->LedPin) ++ { ++ case LED_PIN_GPIO0: ++ break; ++ ++ case LED_PIN_LED0: ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ if(pHalData->AntDivCfg) ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG2); ++ LedCfg &= 0xe0; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG2, (LedCfg|BIT3|BIT7|BIT6|BIT5)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%x\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG2))); ++ } ++ else ++#endif ++ { ++ LedCfg = rtw_read8(padapter, REG_LEDCFG0); ++ LedCfg &= 0x70; // Set to software control. ++ rtw_write8(padapter, REG_LEDCFG0, (LedCfg|BIT3)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED0 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ } ++ break; ++ ++ case LED_PIN_LED1: ++ LedCfg = rtw_read8(padapter, (REG_LEDCFG1)); ++ LedCfg &= 0x70; // Set to software control. ++ rtw_write8(padapter, (REG_LEDCFG1), (LedCfg|BIT3)); ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("SwLedOff LED1 0x%lx\n", PlatformEFIORead4Byte(Adapter, REG_LEDCFG0))); ++ break; ++ ++ default: ++ break; ++ } ++ } ++ ++exit: ++ pLed->bLedOn = _FALSE; ++ ++} ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++ ++ ++// ++// Description: ++// Implementation of LED blinking behavior. ++// It toggle off LED and schedule corresponding timer if necessary. ++// ++static void ++SwLedBlink( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ // Determine if we shall change LED state again. ++ pLed->BlinkTimes--; ++ switch(pLed->CurrLedState) ++ { ++ ++ case LED_BLINK_NORMAL: ++ if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && check_fwstate(pmlmepriv, WIFI_STATION_STATE) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if( check_fwstate(pmlmepriv, _FW_LINKED) && ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) || check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ else if(pLed->BlinkTimes == 0) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ break; ++ ++ ++ default: ++ bStopBlinking = _TRUE; ++ break; ++ ++ } ++ ++ if(bStopBlinking) ++ { ++ //if( padapter->pwrctrlpriv.cpwm >= PS_STATE_S2) ++ if(0) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && (pLed->bLedOn == _FALSE)) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ else if( (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) && pLed->bLedOn == _TRUE) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ // Assign LED state to toggle. ++ if( pLed->BlinkingLedState == LED_ON ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ ++ // Schedule a timer to toggle LED state. ++ switch( pLed->CurrLedState ) ++ { ++ case LED_BLINK_NORMAL: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_SLOWLY: ++ case LED_BLINK_StartToBlink: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS: ++ { ++ if( pLed->BlinkingLedState == LED_ON ) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ else ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ break; ++ ++ default: ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ break; ++ } ++ } ++} ++ ++ ++static void ++SwLedBlink1( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,( "Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_DEFAULT) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOn(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(!pLed1->bLedOn) ++ SwLedOn(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn on pLed1\n")); ++ } ++ else ++ { ++ if(!pLed1->bSWLedCtrl) ++ { ++ SwLedOff(padapter, pLed1); ++ pLed1->bSWLedCtrl = _TRUE; ++ } ++ else if(pLed1->bLedOn) ++ SwLedOff(padapter, pLed1); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (): turn off pLed1\n")); ++ } ++ } ++ ++ ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ ResetLedStatus(pLed); ++ return; ++ } ++ ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_NORMAL: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->BlinkTimes = 0; ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == LED_ON) ++ bStopBlinking = _FALSE; ++ else ++ bStopBlinking = _TRUE; ++ ++ if(bStopBlinking) ++ { ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++static void ++SwLedBlink2( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop scan blink CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("stop CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++} ++ ++static void ++SwLedBlink3( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ if(pLed->CurrLedState != LED_BLINK_WPS_STOP) ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE) ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ ++ if( !pLed->bLedOn ) ++ SwLedOn(padapter, pLed); ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ else if(check_fwstate(pmlmepriv, _FW_LINKED)== _FALSE) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ ++ if( pLed->bLedOn ) ++ SwLedOff(padapter, pLed); ++ ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS success ++ if(pLed->BlinkingLedState == LED_ON) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ bStopBlinking = _FALSE; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++} ++ ++ ++static void ++SwLedBlink4( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ if(!pLed1->bLedWPSBlinkInProgress && pLed1->BlinkingLedState == LED_UNKNOWN) ++ { ++ pLed1->BlinkingLedState = LED_OFF; ++ pLed1->CurrLedState = LED_OFF; ++ SwLedOff(padapter, pLed1); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_BLINK_SLOWLY: ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_BLINK_StartToBlink: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _FALSE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ case LED_BLINK_WPS: ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_BLINK_WPS_STOP: //WPS authentication fail ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ break; ++ ++ case LED_BLINK_WPS_STOP_OVERLAP: //WPS session overlap ++ pLed->BlinkTimes--; ++ if(pLed->BlinkTimes == 0) ++ { ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkTimes = 1; ++ } ++ else ++ { ++ bStopBlinking = _TRUE; ++ } ++ } ++ ++ if(bStopBlinking) ++ { ++ pLed->BlinkTimes = 10; ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink4 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++static void ++SwLedBlink5( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ switch(pLed->CurrLedState) ++ { ++ case LED_SCAN_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ ++ case LED_TXRX_BLINK: ++ pLed->BlinkTimes--; ++ if( pLed->BlinkTimes == 0 ) ++ { ++ bStopBlinking = _TRUE; ++ } ++ ++ if(bStopBlinking) ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if(pLed->bLedOn) ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ if(!pLed->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ if( padapter->pwrctrlpriv.rf_pwrstate != rf_on && padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ } ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("SwLedBlink5 CurrLedState %d\n", pLed->CurrLedState)); ++ ++ ++} ++ ++static void ++SwLedBlink6( ++ PLED_871x pLed ++ ) ++{ ++ _adapter *padapter = pLed->padapter; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 bStopBlinking = _FALSE; ++ ++ // Change LED according to BlinkingLedState specified. ++ if( pLed->BlinkingLedState == LED_ON ) ++ { ++ SwLedOn(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn on\n", pLed->BlinkTimes)); ++ } ++ else ++ { ++ SwLedOff(padapter, pLed); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Blinktimes (%d): turn off\n", pLed->BlinkTimes)); ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("<==== blink6\n")); ++} ++ ++ ++// ++// Description: ++// Callback function of LED BlinkTimer, ++// it just schedules to corresponding BlinkWorkItem. ++// ++static void ++BlinkTimerCallback( ++ unsigned long data ++ ) ++{ ++ PLED_871x pLed = (PLED_871x)data; ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ return; ++ } ++ ++#ifdef CONFIG_LED_HANDLED_BY_CMD_THREAD ++ rtw_led_blink_cmd(padapter, pLed); ++#else ++ _set_workitem(&(pLed->BlinkWorkItem)); ++#endif ++} ++ ++// ++// Description: ++// Handler function of LED Blinking. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++void BlinkHandler(PLED_871x pLed) ++{ ++ struct led_priv *ledpriv = &(pLed->padapter->ledpriv); ++ _adapter *padapter = pLed->padapter; ++ ++ //DBG_871X("%s (%s:%d)\n",__FUNCTION__, current->comm, current->pid); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE)) ++ { ++ //DBG_871X("%s bSurpriseRemoved:%d, bDriverStopped:%d\n", __FUNCTION__, padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ SwLedBlink(pLed); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedBlink1(pLed); ++ break; ++ ++ case SW_LED_MODE2: ++ SwLedBlink2(pLed); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedBlink3(pLed); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedBlink4(pLed); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedBlink5(pLed); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedBlink6(pLed); ++ break; ++ ++ default: ++ //RT_TRACE(COMP_LED, DBG_LOUD, ("BlinkWorkItemCallback 0x%x \n", pHalData->LedStrategy)); ++ //SwLedBlink(pLed); ++ break; ++ } ++} ++ ++// ++// Description: ++// Callback function of LED BlinkWorkItem. ++// We dispatch acture LED blink action according to LedStrategy. ++// ++static void BlinkWorkItemCallback(struct work_struct *work) ++{ ++ PLED_871x pLed = container_of(work, LED_871x, BlinkWorkItem); ++ BlinkHandler(pLed); ++} ++ ++ ++ ++//================================================================================ ++// Default LED behavior. ++//================================================================================ ++ ++// ++// Description: ++// Implement each led action for SW_LED_MODE0. ++// This is default strategy. ++// ++static void ++SwLedControlMode0( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_871x pLed = &(ledpriv->SwLed1); ++ ++ // Decide led state ++ switch(LedAction) ++ { ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ pLed->BlinkTimes = 2; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ pLed->BlinkTimes = 24; ++ ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = LED_ON; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ SwLedOn(padapter, pLed); ++ } ++ break; ++ ++ case LED_CTL_NO_LINK: ++ pLed->CurrLedState = LED_OFF; ++ if( pLed->bLedBlinkInProgress == _FALSE ) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ if(pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ SwLedOff(padapter, pLed); ++ break; ++ ++ case LED_CTL_START_WPS: ++ if( pLed->bLedBlinkInProgress == _FALSE || pLed->CurrLedState == LED_ON) ++ { ++ pLed->bLedBlinkInProgress = _TRUE; ++ ++ pLed->CurrLedState = LED_BLINK_WPS; ++ pLed->BlinkTimes = 20; ++ ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LONG_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedBlinkInProgress) ++ { ++ pLed->CurrLedState = LED_OFF; ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ break; ++ ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++ ++} ++ ++ //ALPHA, added by chiyoko, 20090106 ++static void ++SwLedControlMode1( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if( pLed->bLedLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_NORMAL; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress == _TRUE ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //Arcadyan/Sitecom , added by chiyoko, 20090216 ++static void ++SwLedControlMode2( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ if(padapter->pwrctrlpriv.rf_pwrstate != rf_on) ++ { ++ SwLedOff(padapter, pLed); ++ } ++ else ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++ } ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ //COREGA, added by chiyoko, 20090316 ++ static void ++ SwLedControlMode3( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_SITE_SURVEY: ++ if(pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if((pLed->bLedBlinkInProgress ==_FALSE) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ else ++ { ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ } ++ ++ pLed->CurrLedState = LED_BLINK_WPS_STOP; ++ if(pLed->bLedOn) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_WPS_SUCESS_INTERVAL_ALPHA); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_START_TO_LINK: ++ case LED_CTL_NO_LINK: ++ if(!IS_LED_BLINKING(pLed)) ++ { ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("CurrLedState %d\n", pLed->CurrLedState)); ++} ++ ++ ++ //Edimax-Belkin, added by chiyoko, 20090413 ++static void ++SwLedControlMode4( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ PLED_871x pLed1 = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_START_TO_LINK: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = LED_OFF; ++ pLed1->CurrLedState = LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if( pLed->bLedStartToLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedStartToLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_StartToBlink; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ //LED1 settings ++ if(LedAction == LED_CTL_LINK) ++ { ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = LED_OFF; ++ pLed1->CurrLedState = LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ } ++ ++ if( pLed->bLedNoLinkBlinkInProgress == _FALSE ) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(IS_LED_WPS_BLINKING(pLed)) ++ return; ++ ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK || IS_LED_WPS_BLINKING(pLed)) ++ { ++ return; ++ } ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_START_WPS: //wait until xinpin finish ++ case LED_CTL_START_WPS_BOTTON: ++ if(pLed1->bLedWPSBlinkInProgress) ++ { ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ ++ pLed1->BlinkingLedState = LED_OFF; ++ pLed1->CurrLedState = LED_OFF; ++ ++ if(pLed1->bLedOn) ++ _set_timer(&(pLed->BlinkTimer), 0); ++ } ++ ++ if(pLed->bLedWPSBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedNoLinkBlinkInProgress == _TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if(pLed->bLedScanBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ pLed->bLedWPSBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_WPS; ++ if( pLed->bLedOn ) ++ { ++ pLed->BlinkingLedState = LED_OFF; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SLOWLY_INTERVAL); ++ } ++ else ++ { ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ } ++ } ++ break; ++ ++ case LED_CTL_STOP_WPS: //WPS connect success ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL: //WPS authentication fail ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = LED_OFF; ++ else ++ pLed1->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_STOP_WPS_FAIL_OVERLAP: //WPS session overlap ++ if(pLed->bLedWPSBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed->bLedNoLinkBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_BLINK_SLOWLY; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NO_LINK_INTERVAL_ALPHA); ++ ++ //LED1 settings ++ if(pLed1->bLedWPSBlinkInProgress) ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ else ++ pLed1->bLedWPSBlinkInProgress = _TRUE; ++ ++ pLed1->CurrLedState = LED_BLINK_WPS_STOP_OVERLAP; ++ pLed1->BlinkTimes = 10; ++ if( pLed1->bLedOn ) ++ pLed1->BlinkingLedState = LED_OFF; ++ else ++ pLed1->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_NORMAL_INTERVAL); ++ ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ ++ if( pLed->bLedNoLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedNoLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedLinkBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedWPSBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedScanBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedScanBlinkInProgress = _FALSE; ++ } ++ if( pLed->bLedStartToLinkBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedStartToLinkBlinkInProgress = _FALSE; ++ } ++ ++ if( pLed1->bLedWPSBlinkInProgress ) ++ { ++ _cancel_timer_ex(&(pLed1->BlinkTimer)); ++ pLed1->bLedWPSBlinkInProgress = _FALSE; ++ } ++ ++ pLed1->BlinkingLedState = LED_UNKNOWN; ++ SwLedOff(padapter, pLed); ++ SwLedOff(padapter, pLed1); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ ++ ++ //Sercomm-Belkin, added by chiyoko, 20090415 ++static void ++SwLedControlMode5( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed = &(ledpriv->SwLed0); ++ ++ if(pHalData->EEPROMCustomerID == RT_CID_819x_CAMEO) ++ pLed = &(ledpriv->SwLed1); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_NO_LINK: ++ case LED_CTL_LINK: //solid blue ++ pLed->CurrLedState = LED_ON; ++ pLed->BlinkingLedState = LED_ON; ++ ++ _set_timer(&(pLed->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_SITE_SURVEY: ++ if((pmlmepriv->LinkDetectInfo.bBusyTraffic) && (check_fwstate(pmlmepriv, _FW_LINKED)== _TRUE)) ++ ; ++ else if(pLed->bLedScanBlinkInProgress ==_FALSE) ++ { ++ if(pLed->bLedBlinkInProgress ==_TRUE) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ pLed->bLedScanBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_SCAN_BLINK; ++ pLed->BlinkTimes = 24; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_SCAN_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_TX: ++ case LED_CTL_RX: ++ if(pLed->bLedBlinkInProgress ==_FALSE) ++ { ++ if(pLed->CurrLedState == LED_SCAN_BLINK) ++ { ++ return; ++ } ++ pLed->bLedBlinkInProgress = _TRUE; ++ pLed->CurrLedState = LED_TXRX_BLINK; ++ pLed->BlinkTimes = 2; ++ if( pLed->bLedOn ) ++ pLed->BlinkingLedState = LED_OFF; ++ else ++ pLed->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed->BlinkTimer), LED_BLINK_FASTER_INTERVAL_ALPHA); ++ } ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ pLed->CurrLedState = LED_OFF; ++ pLed->BlinkingLedState = LED_OFF; ++ ++ if( pLed->bLedBlinkInProgress) ++ { ++ _cancel_timer_ex(&(pLed->BlinkTimer)); ++ pLed->bLedBlinkInProgress = _FALSE; ++ } ++ ++ SwLedOff(padapter, pLed); ++ break; ++ ++ default: ++ break; ++ ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("Led %d\n", pLed->CurrLedState)); ++} ++ ++ //WNC-Corega, added by chiyoko, 20090902 ++static void ++SwLedControlMode6( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ PLED_871x pLed0 = &(ledpriv->SwLed0); ++ ++ switch(LedAction) ++ { ++ case LED_CTL_POWER_ON: ++ case LED_CTL_LINK: ++ case LED_CTL_NO_LINK: ++ _cancel_timer_ex(&(pLed0->BlinkTimer)); ++ pLed0->CurrLedState = LED_ON; ++ pLed0->BlinkingLedState = LED_ON; ++ _set_timer(&(pLed0->BlinkTimer), 0); ++ break; ++ ++ case LED_CTL_POWER_OFF: ++ SwLedOff(padapter, pLed0); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("ledcontrol 6 Led %d\n", pLed->CurrLedState)); ++} ++ ++ ++// ++// Description: ++// Dispatch LED action according to pHalData->LedStrategy. ++// ++static void ++LedControl871x( ++ _adapter *padapter, ++ LED_CTL_MODE LedAction ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ if( (padapter->bSurpriseRemoved == _TRUE) || ( padapter->bDriverStopped == _TRUE) ++ ||(padapter->hw_init_completed == _FALSE) ) ++ { ++ return; ++ } ++ ++ ++ if( ledpriv->bRegUseLed == _FALSE) ++ return; ++ ++ //if (!priv->up) ++ // return; ++ ++ //if(priv->bInHctTest) ++ // return; ++ ++ if( (padapter->pwrctrlpriv.rf_pwrstate != rf_on && ++ padapter->pwrctrlpriv.rfoff_reason > RF_CHANGE_BY_PS) && ++ (LedAction == LED_CTL_TX || LedAction == LED_CTL_RX || ++ LedAction == LED_CTL_SITE_SURVEY || ++ LedAction == LED_CTL_LINK || ++ LedAction == LED_CTL_NO_LINK || ++ LedAction == LED_CTL_POWER_ON) ) ++ { ++ return; ++ } ++ ++ switch(ledpriv->LedStrategy) ++ { ++ case SW_LED_MODE0: ++ //SwLedControlMode0(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE1: ++ SwLedControlMode1(padapter, LedAction); ++ break; ++ case SW_LED_MODE2: ++ SwLedControlMode2(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE3: ++ SwLedControlMode3(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE4: ++ SwLedControlMode4(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE5: ++ SwLedControlMode5(padapter, LedAction); ++ break; ++ ++ case SW_LED_MODE6: ++ SwLedControlMode6(padapter, LedAction); ++ break; ++ ++ default: ++ break; ++ } ++ ++ RT_TRACE(_module_rtl8712_led_c_,_drv_info_,("LedStrategy:%d, LedAction %d\n", ledpriv->LedStrategy,LedAction)); ++} ++ ++// ++// Description: ++// Initialize all LED_871x objects. ++// ++void ++rtl8192cu_InitSwLeds( ++ _adapter *padapter ++ ) ++{ ++ struct led_priv *pledpriv = &(padapter->ledpriv); ++ ++ pledpriv->LedControlHandler = LedControl871x; ++ ++ InitLed871x(padapter, &(pledpriv->SwLed0), LED_PIN_LED0); ++ ++ InitLed871x(padapter,&(pledpriv->SwLed1), LED_PIN_LED1); ++} ++ ++ ++// ++// Description: ++// DeInitialize all LED_819xUsb objects. ++// ++void ++rtl8192cu_DeInitSwLeds( ++ _adapter *padapter ++ ) ++{ ++ struct led_priv *ledpriv = &(padapter->ledpriv); ++ ++ DeInitLed871x( &(ledpriv->SwLed0) ); ++ DeInitLed871x( &(ledpriv->SwLed1) ); ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_recv.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,380 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTL8192CU_RECV_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++ ++#include ++ ++ ++void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ ++ precvbuf->transfer_len = 0; ++ ++ precvbuf->len = 0; ++ ++ precvbuf->ref_cnt = 0; ++ ++ if(precvbuf->pbuf) ++ { ++ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pbuf; ++ precvbuf->pend = precvbuf->pdata + MAX_RECVBUF_SZ; ++ } ++ ++} ++ ++int rtl8192cu_init_recv_priv(_adapter *padapter) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ int i, res = _SUCCESS; ++ struct recv_buf *precvbuf; ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ _rtw_init_sema(&precvpriv->recv_sema, 0);//will be removed ++ _rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);//will be removed ++#endif ++ ++#ifdef PLATFORM_LINUX ++ tasklet_init(&precvpriv->recv_tasklet, ++ (void(*)(unsigned long))rtl8192cu_recv_tasklet, ++ (unsigned long)padapter); ++#endif ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++#ifdef PLATFORM_LINUX ++ precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL); ++ if(precvpriv->int_in_urb == NULL){ ++ DBG_8192C("alloc_urb for interrupt in endpoint fail !!!!\n"); ++ } ++#endif ++ precvpriv->int_in_buf = rtw_zmalloc(sizeof(INTERRUPT_MSG_FORMAT_EX)); ++ if(precvpriv->int_in_buf == NULL){ ++ DBG_8192C("alloc_mem for interrupt in endpoint fail !!!!\n"); ++ } ++#endif ++ ++ //init recv_buf ++ _rtw_init_queue(&precvpriv->free_recv_buf_queue); ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ _rtw_init_queue(&precvpriv->recv_buf_pending_queue); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ if(precvpriv->pallocated_recv_buf==NULL){ ++ res= _FAIL; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("alloc recv_buf fail!\n")); ++ goto exit; ++ } ++ _rtw_memset(precvpriv->pallocated_recv_buf, 0, NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ ++ precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4); ++ //precvpriv->precv_buf = precvpriv->pallocated_recv_buf + 4 - ++ // ((uint) (precvpriv->pallocated_recv_buf) &(4-1)); ++ ++ ++ precvbuf = (struct recv_buf*)precvpriv->precv_buf; ++ ++ for(i=0; i < NR_RECVBUFF ; i++) ++ { ++ _rtw_init_listhead(&precvbuf->list); ++ ++ _rtw_spinlock_init(&precvbuf->recvbuf_lock); ++ ++ precvbuf->alloc_sz = MAX_RECVBUF_SZ; ++ ++ res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf); ++ if(res==_FAIL) ++ break; ++ ++ precvbuf->ref_cnt = 0; ++ precvbuf->adapter =padapter; ++ ++ ++ //rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); ++ ++ precvbuf++; ++ ++ } ++ ++ precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF; ++ ++#ifdef PLATFORM_LINUX ++ ++ skb_queue_head_init(&precvpriv->rx_skb_queue); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ { ++ int i; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ struct sk_buff *pskb=NULL; ++ ++ skb_queue_head_init(&precvpriv->free_recv_skb_queue); ++ ++ for(i=0; ipnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++ #endif ++ ++ if(pskb) ++ { ++ pskb->dev = padapter->pnetdev; ++ ++ tmpaddr = (SIZE_PTR)pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); ++ } ++ ++ pskb=NULL; ++ ++ } ++ } ++#endif ++ ++#endif ++ ++exit: ++ ++ return res; ++ ++} ++ ++void rtl8192cu_free_recv_priv (_adapter *padapter) ++{ ++ int i; ++ struct recv_buf *precvbuf; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ ++ for(i=0; i < NR_RECVBUFF ; i++) ++ { ++ rtw_os_recvbuf_resource_free(padapter, precvbuf); ++ precvbuf++; ++ } ++ ++ if(precvpriv->pallocated_recv_buf) ++ rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF *sizeof(struct recv_buf) + 4); ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++#ifdef PLATFORM_LINUX ++ if(precvpriv->int_in_urb) ++ { ++ usb_free_urb(precvpriv->int_in_urb); ++ } ++#endif ++ if(precvpriv->int_in_buf) ++ rtw_mfree(precvpriv->int_in_buf, sizeof(INTERRUPT_MSG_FORMAT_EX)); ++#endif ++ ++#ifdef PLATFORM_LINUX ++ ++ if (skb_queue_len(&precvpriv->rx_skb_queue)) { ++ DBG_8192C(KERN_WARNING "rx_skb_queue not empty\n"); ++ } ++ ++ skb_queue_purge(&precvpriv->rx_skb_queue); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ ++ if (skb_queue_len(&precvpriv->free_recv_skb_queue)) { ++ DBG_8192C(KERN_WARNING "free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue)); ++ } ++ ++ skb_queue_purge(&precvpriv->free_recv_skb_queue); ++ ++#endif ++ ++#endif ++ ++} ++ ++void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat) ++{ ++ u8 physt, qos, shift, icverr, htc, crcerr; ++ u16 drvinfo_sz=0; ++ struct phy_stat *pphy_info; ++ struct rx_pkt_attrib *pattrib = &precvframe->u.hdr.attrib; ++ _adapter *padapter = precvframe->u.hdr.adapter; ++ u8 bPacketMatchBSSID =_FALSE; ++ u8 bPacketToSelf = _FALSE; ++ u8 bPacketBeacon = _FALSE; ++ ++ ++ //Offset 0 ++ drvinfo_sz = (le32_to_cpu(prxstat->rxdw0)&0x000f0000)>>16; ++ drvinfo_sz = drvinfo_sz<<3; ++ ++ pattrib->bdecrypted = ((le32_to_cpu(prxstat->rxdw0) & BIT(27)) >> 27)? 0:1; ++ ++ physt = ((le32_to_cpu(prxstat->rxdw0) & BIT(26)) >> 26)? 1:0; ++ ++ shift = (le32_to_cpu(prxstat->rxdw0)&0x03000000)>>24; ++ ++ qos = ((le32_to_cpu(prxstat->rxdw0) & BIT(23)) >> 23)? 1:0; ++ ++ icverr = ((le32_to_cpu(prxstat->rxdw0) & BIT(15)) >> 15)? 1:0; ++ ++ pattrib->crc_err = crcerr = ((le32_to_cpu(prxstat->rxdw0) & BIT(14)) >> 14 )? 1:0; ++ ++ ++ //Offset 4 ++ ++ //Offset 8 ++ ++ //Offset 12 ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( le32_to_cpu(prxstat->rxdw3) & BIT(13)) { ++ pattrib->tcpchk_valid = 1; // valid ++ if ( le32_to_cpu(prxstat->rxdw3) & BIT(11) ) { ++ pattrib->tcp_chkrpt = 1; // correct ++ //DBG_8192C("tcp csum ok\n"); ++ } else ++ pattrib->tcp_chkrpt = 0; // incorrect ++ ++ if ( le32_to_cpu(prxstat->rxdw3) & BIT(12) ) ++ pattrib->ip_chkrpt = 1; // correct ++ else ++ pattrib->ip_chkrpt = 0; // incorrect ++ ++ } else { ++ pattrib->tcpchk_valid = 0; // invalid ++ } ++ ++#endif ++ ++ pattrib->mcs_rate=(u8)((le32_to_cpu(prxstat->rxdw3))&0x3f); ++ pattrib->rxht=(u8)((le32_to_cpu(prxstat->rxdw3) >>6)&0x1); ++ ++ htc = (u8)((le32_to_cpu(prxstat->rxdw3) >>10)&0x1); ++ ++ //Offset 16 ++ //Offset 20 ++ ++ ++#if 0 //dump rxdesc for debug ++ DBG_8192C("drvinfo_sz=%d\n", drvinfo_sz); ++ DBG_8192C("physt=%d\n", physt); ++ DBG_8192C("shift=%d\n", shift); ++ DBG_8192C("qos=%d\n", qos); ++ DBG_8192C("icverr=%d\n", icverr); ++ DBG_8192C("htc=%d\n", htc); ++ DBG_8192C("bdecrypted=%d\n", pattrib->bdecrypted); ++ DBG_8192C("mcs_rate=%d\n", pattrib->mcs_rate); ++ DBG_8192C("rxht=%d\n", pattrib->rxht); ++#endif ++ ++ //phy_info ++ if(drvinfo_sz && physt) ++ { ++ bPacketMatchBSSID = ((!IsFrameTypeCtrl(precvframe->u.hdr.rx_data)) && !icverr && !crcerr && ++ _rtw_memcmp(get_hdr_bssid(precvframe->u.hdr.rx_data), get_bssid(&padapter->mlmepriv), ETH_ALEN)); ++ ++ bPacketToSelf = bPacketMatchBSSID && (_rtw_memcmp(get_da(precvframe->u.hdr.rx_data), myid(&padapter->eeprompriv), ETH_ALEN)); ++ ++ bPacketBeacon = (GetFrameSubType(precvframe->u.hdr.rx_data) == WIFI_BEACON); ++ ++ ++ pphy_info = (struct phy_stat *)(prxstat+1); ++ ++ //DBG_8192C("pphy_info, of0=0x%08x\n", *pphy_info); ++ //DBG_8192C("pphy_info, of1=0x%08x\n", *(pphy_info+1)); ++ //DBG_8192C("pphy_info, of2=0x%08x\n", *(pphy_info+2)); ++ //DBG_8192C("pphy_info, of3=0x%08x\n", *(pphy_info+3)); ++ //DBG_8192C("pphy_info, of4=0x%08x\n", *(pphy_info+4)); ++ //DBG_8192C("pphy_info, of5=0x%08x\n", *(pphy_info+5)); ++ //DBG_8192C("pphy_info, of6=0x%08x\n", *(pphy_info+6)); ++ //DBG_8192C("pphy_info, of7=0x%08x\n", *(pphy_info+7)); ++ ++ rtl8192c_query_rx_phy_status(precvframe, pphy_info); ++ ++ precvframe->u.hdr.psta = NULL; ++ if(bPacketMatchBSSID && check_fwstate(&padapter->mlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ u8 *sa; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sa = get_sa(precvframe->u.hdr.rx_data); ++ ++ psta = rtw_get_stainfo(pstapriv, sa); ++ if(psta) ++ { ++ precvframe->u.hdr.psta = psta; ++ rtl8192c_process_phy_info(padapter, precvframe); ++ } ++ } ++ else if( bPacketToSelf || (bPacketBeacon && bPacketMatchBSSID) ) ++ { ++ if(check_fwstate(&padapter->mlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ u8 *sa; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ sa = get_sa(precvframe->u.hdr.rx_data); ++ ++ psta = rtw_get_stainfo(pstapriv, sa); ++ if(psta) ++ { ++ precvframe->u.hdr.psta = psta; ++ } ++ } ++ ++ rtl8192c_process_phy_info(padapter, precvframe); ++ } ++ ++#if 0 //dump phy_status for debug ++ ++ DBG_8192C("signal_qual=%d\n", pattrib->signal_qual); ++ DBG_8192C("signal_strength=%d\n", pattrib->signal_strength); ++#endif ++ ++ } ++ ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/rtl8192cu_xmit.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1322 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _RTL8192C_XMIT_C_ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++#error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++ ++s32 rtl8192cu_init_xmit_priv(_adapter *padapter) ++{ ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++#ifdef PLATFORM_LINUX ++ tasklet_init(&pxmitpriv->xmit_tasklet, ++ (void(*)(unsigned long))rtl8192cu_xmit_tasklet, ++ (unsigned long)padapter); ++#endif ++ return _SUCCESS; ++} ++ ++void rtl8192cu_free_xmit_priv(_adapter *padapter) ++{ ++} ++ ++u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe) ++{ ++ u32 addr; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ switch(pattrib->qsel) ++ { ++ case 0: ++ case 3: ++ addr = BE_QUEUE_INX; ++ break; ++ case 1: ++ case 2: ++ addr = BK_QUEUE_INX; ++ break; ++ case 4: ++ case 5: ++ addr = VI_QUEUE_INX; ++ break; ++ case 6: ++ case 7: ++ addr = VO_QUEUE_INX; ++ break; ++ case 0x10: ++ addr = BCN_QUEUE_INX; ++ break; ++ case 0x11://BC/MC in PS (HIQ) ++ addr = HIGH_QUEUE_INX; ++ break; ++ case 0x12: ++ addr = MGT_QUEUE_INX; ++ break; ++ default: ++ addr = BE_QUEUE_INX; ++ break; ++ ++ } ++ ++ return addr; ++ ++} ++ ++int urb_zero_packet_chk(_adapter *padapter, int sz) ++{ ++ int blnSetTxDescOffset; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv*)&padapter->dvobjpriv; ++ ++ if ( pdvobj->ishighspeed ) ++ { ++ if ( ( (sz + TXDESC_SIZE) % 512 ) == 0 ) { ++ blnSetTxDescOffset = 1; ++ } else { ++ blnSetTxDescOffset = 0; ++ } ++ } ++ else ++ { ++ if ( ( (sz + TXDESC_SIZE) % 64 ) == 0 ) { ++ blnSetTxDescOffset = 1; ++ } else { ++ blnSetTxDescOffset = 0; ++ } ++ } ++ ++ return blnSetTxDescOffset; ++ ++} ++ ++void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc) ++{ ++ u16 *usPtr = (u16*)ptxdesc; ++ u32 count = 16; // (32 bytes / 2 bytes per XOR) => 16 times ++ u32 index; ++ u16 checksum = 0; ++ ++ //Clear first ++ ptxdesc->txdw7 &= cpu_to_le32(0xffff0000); ++ ++ for(index = 0 ; index < count ; index++){ ++ checksum = checksum ^ le16_to_cpu(*(usPtr + index)); ++ } ++ ++ ptxdesc->txdw7 |= cpu_to_le32(0x0000ffff&checksum); ++ ++} ++ ++void fill_txdesc_sectype(struct pkt_attrib *pattrib, struct tx_desc *ptxdesc) ++{ ++ if ((pattrib->encrypt > 0) && !pattrib->bswenc) ++ { ++ switch (pattrib->encrypt) ++ { ++ //SEC_TYPE ++ case _WEP40_: ++ case _WEP104_: ++ ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ //ptxdesc->txdw1 |= cpu_to_le32((0x02<<22)&0x00c00000); ++ ptxdesc->txdw1 |= cpu_to_le32((0x01<<22)&0x00c00000); ++ break; ++ case _AES_: ++ ptxdesc->txdw1 |= cpu_to_le32((0x03<<22)&0x00c00000); ++ break; ++ case _NO_PRIVACY_: ++ default: ++ break; ++ ++ } ++ ++ } ++ ++} ++ ++void fill_txdesc_vcs(struct pkt_attrib *pattrib, u32 *pdw) ++{ ++ //DBG_8192C("cvs_mode=%d\n", pattrib->vcs_mode); ++ ++ switch(pattrib->vcs_mode) ++ { ++ case RTS_CTS: ++ *pdw |= cpu_to_le32(BIT(12)); ++ break; ++ case CTS_TO_SELF: ++ *pdw |= cpu_to_le32(BIT(11)); ++ break; ++ case NONE_VCS: ++ default: ++ break; ++ } ++ ++ if(pattrib->vcs_mode) ++ { ++ *pdw |= cpu_to_le32(BIT(13));//ENABLE HW RTS ++ } ++ ++} ++ ++void fill_txdesc_phy(struct pkt_attrib *pattrib, u32 *pdw) ++{ ++ //DBG_8192C("bwmode=%d, ch_off=%d\n", pattrib->bwmode, pattrib->ch_offset); ++ ++ if(pattrib->ht_en) ++ { ++ *pdw |= (pattrib->bwmode&HT_CHANNEL_WIDTH_40)? cpu_to_le32(BIT(25)):0; ++ ++ if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ *pdw |= cpu_to_le32((0x01<<20)&0x003f0000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) ++ *pdw |= cpu_to_le32((0x02<<20)&0x003f0000); ++ else if(pattrib->ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ++ *pdw |= 0; ++ else ++ *pdw |= cpu_to_le32((0x03<<20)&0x003f0000); ++ } ++} ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++static void _update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, int sz) ++{ ++ uint qsel; ++ _adapter *padapter = pxmitframe->padapter; ++ struct ht_priv *phtpriv = &padapter->mlmepriv.htpriv; ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ sint bmcst = IS_MCAST(pattrib->ra); ++ struct tx_desc *ptxdesc = (struct tx_desc*)pmem; ++ ++ ++ _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); ++ ++ //4 offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(sz & 0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE + OFFSET_SZ) << OFFSET_SHT) & 0x00ff0000);//32 bytes for TX Desc ++ ++ if (bmcst) ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); ++ ++ RT_TRACE(_module_rtl871x_xmit_c_, _drv_info_, ++ ("update_txdesc: offset0=0x%08x\n", ptxdesc->txdw0)); ++ ++ //4 offset 4 ++ // pkt_offset, unit:8 bytes padding ++ if (pxmitframe->pkt_offset > 0) ++ ptxdesc->txdw1 |= cpu_to_le32((pxmitframe->pkt_offset << 26) & 0x7c000000); ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ if (pxmitframe->agg_num > 1) ++ ptxdesc->txdw5 |= cpu_to_le32((pxmitframe->agg_num << 24) & 0xff000000); ++#endif ++ ++ if (pxmitframe->frame_tag == DATA_FRAMETAG) ++ { ++ //4 offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel & 0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); ++ ++ ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid << 16) & 0x000f0000); ++ ++ fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ if(pattrib->ampdu_en==_TRUE) ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN ++ else ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ++ ++ //4 offset 8 ++ ++ ++ //4 offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000); ++ ++ ++ //4 offset 16 , offset 20 ++ if (pattrib->qos_en) ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS ++ ++ if ((pattrib->ether_type != 0x888e) && ++ (pattrib->ether_type != 0x0806) && ++ (pattrib->dhcp_pkt != 1)) ++ { ++ //Non EAP & ARP & DHCP type data packet ++ ++ fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); ++ fill_txdesc_phy(pattrib, &ptxdesc->txdw4); ++ ++ ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M ++ ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00); ++ //ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M ++ ++ #ifdef SUPPORT_64_STA ++ if(pattrib->mac_id>FW_CTRL_MACID ){ ++ ptxdesc->txdw5 |= cpu_to_le32(pattrib->psta->init_rate); ++ ptxdesc->txdw4 |=cpu_to_le32(0x00000100); //USE RATE ++ ptxdesc->txdw3 |=cpu_to_le32(BIT(28)); //PKT_ID ++ //printk("%s pattrib->mac_id=%d ptxdesc->txdw3=0x%x,ptxdesc->txdw4=0x%x,ptxdesc->txdw5=0x%x\n",__FUNCTION__,pattrib->mac_id,ptxdesc->txdw3,ptxdesc->txdw4,ptxdesc->txdw5); ++ } ++ else //use REG_INIDATA_RATE_SEL value ++ ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); ++ if(pattrib->mac_id==1){ ++ //bcmc sta ++ ptxdesc->txdw5 |= cpu_to_le32(padapter->registrypriv.bcmc_rate); ++ ptxdesc->txdw4 |=cpu_to_le32(0x00000100); //USE RATE ++ } ++ #else //SUPPORT_64_STA ++ ++ //use REG_INIDATA_RATE_SEL value ++ ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); ++ #endif //SUPPORT_64_STA ++ ++ if (0)//for driver dbg ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ if (pattrib->ht_en) ++ ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI ++ ++ ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7 ++ } ++ } ++ else ++ { ++ // EAP data packet and ARP packet. ++ // Use the 1M data rate to send the EAP/ARP packet. ++ // This will maybe make the handshake smooth. ++ ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ } ++ ++ ++ //4 offset 24 ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ if (pattrib->hw_tcp_csum == 1) { ++ // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! ++ u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; ++ ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); ++ DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); ++ } ++#endif ++ } ++ else if(pxmitframe->frame_tag == MGNT_FRAMETAG) ++ { ++ //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); ++ ++ //4 offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel&0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); ++ ++ ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); ++ ++ //fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ ++ //4 offset 8 ++ ++ ++ //4 offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ ++ //4 offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ ++ //4 offset 20 ++ } ++ else if(pxmitframe->frame_tag == TXAGG_FRAMETAG) ++ { ++ DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); ++ } ++ else ++ { ++ DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); ++ ++ //4 offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID) ++ ++ ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid ++ ++ ++ //4 offset 8 ++ ++ ++ //4 offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum << 16) & 0xffff0000); ++ ++ ++ //4 offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ ++ //4 offset 20 ++ } ++ ++ // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. ++ // (1) The sequence number of each non-Qos frame / broadcast / multicast / ++ // mgnt frame should be controled by Hw because Fw will also send null data ++ // which we cannot control when Fw LPS enable. ++ // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. ++ // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. ++ // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. ++ // 2010.06.23. Added by tynli. ++ if(!pattrib->qos_en) ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++} ++#endif ++ ++static s32 update_txdesc(struct xmit_frame *pxmitframe, u8 *pmem, s32 sz) ++{ ++ int pull=0; ++ uint qsel; ++ _adapter *padapter = pxmitframe->padapter; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct tx_desc *ptxdesc = (struct tx_desc *)pmem; ++ struct ht_priv *phtpriv = &pmlmepriv->htpriv; ++ struct mlme_ext_info *pmlmeinfo = &padapter->mlmeextpriv.mlmext_info; ++ sint bmcst = IS_MCAST(pattrib->ra); ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ if(urb_zero_packet_chk(padapter, sz)==0) ++ { ++ ptxdesc = (struct tx_desc *)(pmem+PACKET_OFFSET_SZ); ++ pull = 1; ++ } ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ _rtw_memset(ptxdesc, 0, sizeof(struct tx_desc)); ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ //DBG_8192C("pxmitframe->frame_tag == DATA_FRAMETAG\n"); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel & 0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel << QSEL_SHT) & 0x00001f00); ++ ++ ptxdesc->txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); ++ ++ fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ ++ if(pattrib->ampdu_en==_TRUE) ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(5));//AGG EN ++ else ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ++ //offset 8 ++ ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ ++ //offset 16 , offset 20 ++ if (pattrib->qos_en) ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(6));//QoS ++ ++ if ((pattrib->ether_type != 0x888e) && (pattrib->ether_type != 0x0806) && (pattrib->dhcp_pkt != 1)) ++ { ++ //Non EAP & ARP & DHCP type data packet ++ ++ fill_txdesc_vcs(pattrib, &ptxdesc->txdw4); ++ fill_txdesc_phy(pattrib, &ptxdesc->txdw4); ++ ++ ptxdesc->txdw4 |= cpu_to_le32(0x00000008);//RTS Rate=24M ++ ptxdesc->txdw5 |= cpu_to_le32(0x0001ff00);// ++ //ptxdesc->txdw5 |= cpu_to_le32(0x0000000b);//DataRate - 54M ++ ++ ++ #ifdef SUPPORT_64_STA ++ if(pattrib->mac_id>=FW_CTRL_MACID ){ ++ ptxdesc->txdw5 |= cpu_to_le32(pattrib->psta->init_rate); ++ ptxdesc->txdw4 |=cpu_to_le32(0x00000100); //USE RATE ++ ptxdesc->txdw3 |=cpu_to_le32(BIT(28)); //PKT_ID ++ //printk("%s pattrib->mac_id=%d\n",__FUNCTION__,pattrib->mac_id); ++ //printk("%s pattrib->mac_id=%d ptxdesc->txdw1=0x%x,ptxdesc->txdw3=0x%x,\nptxdesc->txdw4=0x%x,ptxdesc->txdw5=0x%x\n",__FUNCTION__,pattrib->mac_id,ptxdesc->txdw1,ptxdesc->txdw3,ptxdesc->txdw4,ptxdesc->txdw5); ++ } ++ else //use REG_INIDATA_RATE_SEL value ++ ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); ++ if(pattrib->mac_id==1){ ++ //bcmc sta ++ ptxdesc->txdw5 |= cpu_to_le32(padapter->registrypriv.bcmc_rate); ++ ptxdesc->txdw4 |=cpu_to_le32(0x00000100); //USE RATE ++ } ++ #else //SUPPORT_64_STA ++ //use REG_INIDATA_RATE_SEL value ++ ptxdesc->txdw5 |= cpu_to_le32(pdmpriv->INIDATA_RATE[pattrib->mac_id]); ++ #endif //SUPPORT_64_STA ++ if(0)//for driver dbg ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ if(pattrib->ht_en) ++ ptxdesc->txdw5 |= cpu_to_le32(BIT(6));//SGI ++ ++ ptxdesc->txdw5 |= cpu_to_le32(0x00000013);//init rate - mcs7 ++ } ++ ++ } ++ else ++ { ++ // EAP data packet and ARP packet. ++ // Use the 1M data rate to send the EAP/ARP packet. ++ // This will maybe make the handshake smooth. ++ ++ ptxdesc->txdw1 |= cpu_to_le32(BIT(6));//AGG BK ++ ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++#ifdef CONFIG_P2P ++ // Added by Albert 2011/03/22 ++ // In the P2P mode, the driver should not support the b mode. ++ // So, the Tx packet shouldn't use the CCK rate ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ ptxdesc->txdw5 |= cpu_to_le32( 0x04 ); // Use the 6M data rate. ++ } ++#endif //CONFIG_P2P ++ ++ } ++ ++ //offset 24 ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ if ( pattrib->hw_tcp_csum == 1 ) { ++ // ptxdesc->txdw6 = 0; // clear TCP_CHECKSUM and IP_CHECKSUM. It's zero already!! ++ u8 ip_hdr_offset = 32 + pattrib->hdrlen + pattrib->iv_len + 8; ++ ptxdesc->txdw7 = (1 << 31) | (ip_hdr_offset << 16); ++ DBG_8192C("ptxdesc->txdw7 = %08x\n", ptxdesc->txdw7); ++ } ++#endif ++ } ++ else if((pxmitframe->frame_tag&0x0f)== MGNT_FRAMETAG) ++ { ++ //DBG_8192C("pxmitframe->frame_tag == MGNT_FRAMETAG\n"); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(pattrib->mac_id&0x1f); ++ ++ qsel = (uint)(pattrib->qsel&0x0000001f); ++ ptxdesc->txdw1 |= cpu_to_le32((qsel<txdw1 |= cpu_to_le32((pattrib->raid<< 16) & 0x000f0000); ++ ++ //fill_txdesc_sectype(pattrib, ptxdesc); ++ ++ //offset 8 ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ ptxdesc->txdw5 |= cpu_to_le32(BIT(17));//retry limit enable ++ if(pattrib->retry_ctrl == _TRUE) ++ ptxdesc->txdw5 |= cpu_to_le32(0x00180000);//retry limit = 6 ++ else ++ ptxdesc->txdw5 |= cpu_to_le32(0x00300000);//retry limit = 12 ++ ++#ifdef CONFIG_P2P ++ // Added by Albert 2011/03/17 ++ // In the P2P mode, the driver should not support the b mode. ++ // So, the Tx packet shouldn't use the CCK rate ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ ptxdesc->txdw5 |= cpu_to_le32( 0x04 ); // Use the 6M data rate. ++ } ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_INTEL_PROXIM ++ if((padapter->proximity.proxim_on==_TRUE)&&(pattrib->intel_proxim==_TRUE)){ ++ printk("\n %s pattrib->rate=%d\n",__FUNCTION__,pattrib->rate); ++ ptxdesc->txdw5 |= cpu_to_le32( pattrib->rate); ++ } ++#endif ++ } ++ else if((pxmitframe->frame_tag&0x0f) == TXAGG_FRAMETAG) ++ { ++ DBG_8192C("pxmitframe->frame_tag == TXAGG_FRAMETAG\n"); ++ } ++#ifdef CONFIG_MP_INCLUDED ++ else if((pxmitframe->frame_tag&0x0f) == MP_FRAMETAG) ++ { ++ fill_txdesc_for_mp(padapter, ptxdesc); ++ } ++#endif ++ else ++ { ++ DBG_8192C("pxmitframe->frame_tag = %d\n", pxmitframe->frame_tag); ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32((4)&0x1f);//CAM_ID(MAC_ID) ++ ++ ptxdesc->txdw1 |= cpu_to_le32((6<< 16) & 0x000f0000);//raid ++ ++ //offset 8 ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((pattrib->seqnum<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ } ++ ++ // 2009.11.05. tynli_test. Suggested by SD4 Filen for FW LPS. ++ // (1) The sequence number of each non-Qos frame / broadcast / multicast / ++ // mgnt frame should be controled by Hw because Fw will also send null data ++ // which we cannot control when Fw LPS enable. ++ // --> default enable non-Qos data sequense number. 2010.06.23. by tynli. ++ // (2) Enable HW SEQ control for beacon packet, because we use Hw beacon. ++ // (3) Use HW Qos SEQ to control the seq num of Ext port non-Qos packets. ++ // 2010.06.23. Added by tynli. ++ if(!pattrib->qos_en) ++ { ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ } ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(sz&0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(BIT(24)); ++ } ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("offset0-txdesc=0x%x\n", ptxdesc->txdw0)); ++ ++ //offset 4 ++ if(!pull) ptxdesc->txdw1 |= cpu_to_le32((0x01<<26)&0xff000000);//pkt_offset, unit:8 bytes padding ++ ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++ ++ return pull; ++ ++} ++ ++static void _rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe, u8 sync) ++{ ++ int t, sz, w_sz, pull=0; ++ u8 *mem_addr; ++ u32 ff_hwaddr; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ if ((pxmitframe->frame_tag == DATA_FRAMETAG) && ++ (pxmitframe->attrib.ether_type != 0x0806) && ++ (pxmitframe->attrib.ether_type != 0x888e) && ++ (pxmitframe->attrib.dhcp_pkt != 1)) ++ { ++ rtw_issue_addbareq_cmd(padapter, pxmitframe); ++ } ++ ++ mem_addr = pxmitframe->buf_addr; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_dump_xframe()\n")); ++ ++ for (t = 0; t < pattrib->nr_frags; t++) ++ { ++ if (t != (pattrib->nr_frags - 1)) ++ { ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_err_,("pattrib->nr_frags=%d\n", pattrib->nr_frags)); ++ ++ sz = pxmitpriv->frag_len; ++ sz = sz - 4 - (psecuritypriv->sw_encrypt ? 0 : pattrib->icv_len); ++ } ++ else //no frag ++ { ++ sz = pattrib->last_txcmdsz; ++ } ++ ++ pull = update_txdesc(pxmitframe, mem_addr, sz); ++ ++ if(pull) ++ { ++ mem_addr += PACKET_OFFSET_SZ; //pull txdesc head ++ ++ //pxmitbuf ->pbuf = mem_addr; ++ pxmitframe->buf_addr = mem_addr; ++ ++ w_sz = sz + TXDESC_SIZE; ++ } ++ else ++ { ++ w_sz = sz + TXDESC_SIZE + PACKET_OFFSET_SZ; ++ } ++ ++ ff_hwaddr = rtw_get_ff_hwaddr(pxmitframe); ++ ++ if(sync == _TRUE) ++ rtw_write_port_sync(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); ++ else ++ rtw_write_port(padapter, ff_hwaddr, w_sz, (unsigned char*)pxmitbuf); ++ ++ rtw_count_tx_stats(padapter, pxmitframe, sz); ++ ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("rtw_write_port, w_sz=%d\n", w_sz)); ++ //DBG_8192C("rtw_write_port, w_sz=%d, sz=%d, txdesc_sz=%d, tid=%d\n", w_sz, sz, w_sz-sz, pattrib->priority); ++ ++ mem_addr += w_sz; ++ ++ mem_addr = (u8 *)RND4(((SIZE_PTR)(mem_addr))); ++ ++ } ++ ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++} ++ ++inline void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _rtw_dump_xframe(padapter, pxmitframe, _FALSE); ++} ++ ++inline void rtw_dump_xframe_sync(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _rtw_dump_xframe(padapter, pxmitframe, _TRUE); ++} ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++static u32 xmitframe_need_length(struct xmit_frame *pxmitframe) ++{ ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++ u32 len = 0; ++ ++ // no consider fragement ++ len = pattrib->hdrlen + pattrib->iv_len + ++ SNAP_SIZE + sizeof(u16) + ++ pattrib->pktlen + ++ ((pattrib->bswenc) ? pattrib->icv_len : 0); ++ ++ if(pattrib->encrypt ==_TKIP_) ++ len += 8; ++ ++ return len; ++} ++ ++#define IDEA_CONDITION 1 // check all packets before enqueue ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct xmit_frame *pxmitframe = NULL; ++ struct xmit_frame *pfirstframe = NULL; ++ ++ // aggregate variable ++// struct hw_xmit *phwxmit; ++ struct sta_info *psta = NULL; ++ struct tx_servq *ptxservq = NULL; ++ ++ _irqL irqL; ++ _list *xmitframe_plist = NULL, *xmitframe_phead = NULL; ++ ++ u32 pbuf; // next pkt address ++ u32 pbuf_tail; // last pkt tail ++ u32 len; // packet length, except TXDESC_SIZE and PKT_OFFSET ++ ++ u32 bulkSize = pHalData->UsbBulkOutSize; ++ u8 descCount; ++ u32 bulkPtr; ++ ++ // dump frame variable ++ u32 ff_hwaddr; ++ ++#ifndef IDEA_CONDITION ++ int res = _SUCCESS; ++#endif ++ ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_info_, ("+xmitframe_complete\n")); ++ ++ ++ // check xmitbuffer is ok ++ if (pxmitbuf == NULL) { ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) return _FALSE; ++ } ++ ++ ++ //3 1. pick up first frame ++ do { ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++ pxmitframe = rtw_dequeue_xframe(pxmitpriv, pxmitpriv->hwxmits, pxmitpriv->hwxmit_entry); ++ if (pxmitframe == NULL) { ++ // no more xmit frame, release xmit buffer ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ return _FALSE; ++ } ++ ++ ++#ifndef IDEA_CONDITION ++ if (pxmitframe->frame_tag != DATA_FRAMETAG) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", ++ pxmitframe->frame_tag, DATA_FRAMETAG)); ++// rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // TID 0~15 ++ if ((pxmitframe->attrib.priority < 0) || ++ (pxmitframe->attrib.priority > 15)) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: TID(%d) should be 0~15!\n", ++ pxmitframe->attrib.priority)); ++// rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pxmitframe; ++ ++ //pxmitframe->agg_num = 1; // alloc xmitframe should assign to 1. ++ pxmitframe->pkt_offset = 1; // first frame of aggregation, reserve offset ++ ++#ifdef IDEA_CONDITION ++ rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++#else ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (res == _FALSE) { ++// rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++ // always return ndis_packet after rtw_xmitframe_coalesce ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ ++ break; ++ } while (1); ++ ++ //3 2. aggregate same priority and same DA(AP or STA) frames ++ pfirstframe = pxmitframe; ++ len = xmitframe_need_length(pfirstframe) + TXDESC_OFFSET; ++ pbuf_tail = len; ++ pbuf = _RND8(pbuf_tail); ++ ++ // check pkt amount in one bluk ++ descCount = 0; ++ bulkPtr = bulkSize; ++ if (pbuf < bulkPtr) ++ descCount++; ++ else { ++ descCount = 0; ++ bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; // round to next bulkSize ++ } ++ ++ // dequeue same priority packet from station tx queue ++ psta = pfirstframe->attrib.psta; ++ switch (pfirstframe->attrib.priority) { ++ case 1: ++ case 2: ++ ptxservq = &(psta->sta_xmitpriv.bk_q); ++// phwxmit = pxmitpriv->hwxmits + 3; ++ break; ++ ++ case 4: ++ case 5: ++ ptxservq = &(psta->sta_xmitpriv.vi_q); ++// phwxmit = pxmitpriv->hwxmits + 1; ++ break; ++ ++ case 6: ++ case 7: ++ ptxservq = &(psta->sta_xmitpriv.vo_q); ++// phwxmit = pxmitpriv->hwxmits; ++ break; ++ ++ case 0: ++ case 3: ++ default: ++ ptxservq = &(psta->sta_xmitpriv.be_q); ++// phwxmit = pxmitpriv->hwxmits + 2; ++ break; ++ } ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ xmitframe_phead = get_list_head(&ptxservq->sta_pending); ++ xmitframe_plist = get_next(xmitframe_phead); ++ while (rtw_end_of_queue_search(xmitframe_phead, xmitframe_plist) == _FALSE) ++ { ++ pxmitframe = LIST_CONTAINOR(xmitframe_plist, struct xmit_frame, list); ++ xmitframe_plist = get_next(xmitframe_plist); ++ ++ len = xmitframe_need_length(pxmitframe) + TXDESC_SIZE; // no offset ++ if (pbuf + len > MAX_XMITBUF_SZ) break; ++ ++ rtw_list_delete(&pxmitframe->list); ++ ptxservq->qcnt--; ++ ++#ifndef IDEA_CONDITION ++ // suppose only data frames would be in queue ++ if (pxmitframe->frame_tag != DATA_FRAMETAG) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: frame tag(%d) is not DATA_FRAMETAG(%d)!\n", ++ pxmitframe->frame_tag, DATA_FRAMETAG)); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++ ++ // TID 0~15 ++ if ((pxmitframe->attrib.priority < 0) || ++ (pxmitframe->attrib.priority > 15)) { ++ RT_TRACE(_module_rtl8192c_xmit_c_, _drv_err_, ++ ("xmitframe_complete: TID(%d) should be 0~15!\n", ++ pxmitframe->attrib.priority)); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++// pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf + pbuf; ++ ++ pxmitframe->agg_num = 0; // not first frame of aggregation ++ pxmitframe->pkt_offset = 0; // not first frame of aggregation, no need to reserve offset ++ ++#ifdef IDEA_CONDITION ++ rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++#else ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (res == _FALSE) { ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ continue; ++ } ++#endif ++ ++ // always return ndis_packet after rtw_xmitframe_coalesce ++ rtw_os_xmit_complete(padapter, pxmitframe); ++ ++ // (len - TXDESC_SIZE) == pxmitframe->attrib.last_txcmdsz ++ _update_txdesc(pxmitframe, pxmitframe->buf_addr, pxmitframe->attrib.last_txcmdsz); ++ ++ // don't need xmitframe any more ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++ // handle pointer and stop condition ++ pbuf_tail = pbuf + len; ++ pbuf = _RND8(pbuf_tail); ++ ++ pfirstframe->agg_num++; ++ if (MAX_TX_AGG_PACKET_NUMBER == pfirstframe->agg_num) ++ break; ++ ++ if (pbuf < bulkPtr) { ++ descCount++; ++ if (descCount == pHalData->UsbTxAggDescNum) ++ break; ++ } else { ++ descCount = 0; ++ bulkPtr = ((pbuf / bulkSize) + 1) * bulkSize; ++ } ++ } ++ if (_rtw_queue_empty(&ptxservq->sta_pending) == _TRUE) ++ rtw_list_delete(&ptxservq->tx_pending); ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if ((pfirstframe->attrib.ether_type != 0x0806) && ++ (pfirstframe->attrib.ether_type != 0x888e) && ++ (pfirstframe->attrib.dhcp_pkt != 1)) ++ { ++ rtw_issue_addbareq_cmd(padapter, pfirstframe); ++ } ++ ++#ifndef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ //3 3. update first frame txdesc ++ if ((pbuf_tail % bulkSize) == 0) { ++ // remove pkt_offset ++ pbuf_tail -= PACKET_OFFSET_SZ; ++ pfirstframe->buf_addr += PACKET_OFFSET_SZ; ++ pfirstframe->pkt_offset = 0; ++ } ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ _update_txdesc(pfirstframe, pfirstframe->buf_addr, pfirstframe->attrib.last_txcmdsz); ++ ++ //3 4. write xmit buffer to USB FIFO ++ ff_hwaddr = rtw_get_ff_hwaddr(pfirstframe); ++ ++ // xmit address == ((xmit_frame*)pxmitbuf->priv_data)->buf_addr ++ rtw_write_port(padapter, ff_hwaddr, pbuf_tail, (u8*)pxmitbuf); ++ ++ ++ //3 5. update statisitc ++ pbuf_tail -= (pfirstframe->agg_num * TXDESC_SIZE); ++ if (pfirstframe->pkt_offset == 1) pbuf_tail -= PACKET_OFFSET_SZ; ++ ++ rtw_count_tx_stats(padapter, pfirstframe, pbuf_tail); ++ ++ rtw_free_xmitframe_ex(pxmitpriv, pfirstframe); ++ ++ return _TRUE; ++} ++ ++#else ++ ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf) ++{ ++ ++ struct hw_xmit *phwxmits; ++ sint hwentry; ++ struct xmit_frame *pxmitframe=NULL; ++ int res=_SUCCESS, xcnt = 0; ++ ++ phwxmits = pxmitpriv->hwxmits; ++ hwentry = pxmitpriv->hwxmit_entry; ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete()\n")); ++ ++ if(pxmitbuf==NULL) ++ { ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if(!pxmitbuf) ++ { ++ return _FALSE; ++ } ++ } ++ ++ ++ do ++ { ++ pxmitframe = rtw_dequeue_xframe(pxmitpriv, phwxmits, hwentry); ++ ++ if(pxmitframe) ++ { ++ pxmitframe->pxmitbuf = pxmitbuf; ++ ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ ++ pxmitbuf->priv_data = pxmitframe; ++ ++ if((pxmitframe->frame_tag&0x0f) == DATA_FRAMETAG) ++ { ++ if(pxmitframe->attrib.priority<=15)//TID0~15 ++ { ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ } ++ ++ rtw_os_xmit_complete(padapter, pxmitframe);//always return ndis_packet after rtw_xmitframe_coalesce ++ } ++ ++ ++ RT_TRACE(_module_rtl871x_xmit_c_,_drv_info_,("xmitframe_complete(): rtw_dump_xframe\n")); ++ ++ ++ if(res == _SUCCESS) ++ { ++ rtw_dump_xframe(padapter, pxmitframe); ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ } ++ ++ xcnt++; ++ ++ } ++ else ++ { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ return _FALSE; ++ } ++ ++ break; ++ ++ }while(0/*xcnt < (NR_XMITFRAME >> 3)*/); ++ ++ return _TRUE; ++ ++} ++#endif ++ ++ ++ ++static s32 xmitframe_direct(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ s32 res = _SUCCESS; ++ ++ ++ res = rtw_xmitframe_coalesce(padapter, pxmitframe->pkt, pxmitframe); ++ if (res == _SUCCESS) { ++ rtw_dump_xframe(padapter, pxmitframe); ++ } ++ ++ return res; ++} ++ ++/* ++ * Return ++ * _TRUE dump packet directly ++ * _FALSE enqueue packet ++ */ ++static s32 pre_xmitframe(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ _irqL irqL; ++ s32 res; ++ struct xmit_buf *pxmitbuf = NULL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if (rtw_txframes_sta_ac_pending(padapter, pattrib) > 0) ++ goto enqueue; ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ goto enqueue; ++ ++ ++ pxmitbuf = rtw_alloc_xmitbuf(pxmitpriv); ++ if (pxmitbuf == NULL) ++ goto enqueue; ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ pxmitframe->pxmitbuf = pxmitbuf; ++ pxmitframe->buf_addr = pxmitbuf->pbuf; ++ pxmitbuf->priv_data = pxmitframe; ++ ++ if (xmitframe_direct(padapter, pxmitframe) != _SUCCESS) { ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ } ++ ++ return _TRUE; ++ ++enqueue: ++ res = rtw_xmitframe_enqueue(padapter, pxmitframe); ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if (res != _SUCCESS) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("pre_xmitframe: enqueue xmitframe fail\n")); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++ // Trick, make the statistics correct ++ pxmitpriv->tx_pkts--; ++ pxmitpriv->tx_drop++; ++ return _TRUE; ++ } ++ ++ return _FALSE; ++} ++ ++void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe) ++{ ++ rtw_dump_xframe(padapter, pmgntframe); ++} ++ ++/* ++ * Return ++ * _TRUE dump packet directly ok ++ * _FALSE temporary can't transmit packets to hardware ++ */ ++s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe) ++{ ++ return pre_xmitframe(padapter, pxmitframe); ++} ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ ++static void rtl8192cu_hostap_mgnt_xmit_cb(struct urb *urb) ++{ ++#ifdef PLATFORM_LINUX ++ struct sk_buff *skb = (struct sk_buff *)urb->context; ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ dev_kfree_skb_any(skb); ++#endif ++} ++ ++s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt) ++{ ++#ifdef PLATFORM_LINUX ++ u16 fc; ++ int rc, len, pipe; ++ unsigned int bmcst, tid, qsel; ++ struct sk_buff *skb, *pxmit_skb; ++ struct urb *urb; ++ unsigned char *pxmitbuf; ++ struct tx_desc *ptxdesc; ++ struct rtw_ieee80211_hdr *tx_hdr; ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pnetdev = padapter->pnetdev; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dvobj_priv *pdvobj = &padapter->dvobjpriv; ++ ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ skb = pkt; ++ ++ len = skb->len; ++ tx_hdr = (struct rtw_ieee80211_hdr *)(skb->data); ++ fc = le16_to_cpu(tx_hdr->frame_ctl); ++ bmcst = IS_MCAST(tx_hdr->addr1); ++ ++ if ((fc & RTW_IEEE80211_FCTL_FTYPE) != RTW_IEEE80211_FTYPE_MGMT) ++ goto _exit; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ pxmit_skb = dev_alloc_skb(len + TXDESC_SIZE); ++#else ++ pxmit_skb = netdev_alloc_skb(pnetdev, len + TXDESC_SIZE); ++#endif ++ ++ if(!pxmit_skb) ++ goto _exit; ++ ++ pxmitbuf = pxmit_skb->data; ++ ++ urb = usb_alloc_urb(0, GFP_ATOMIC); ++ if (!urb) { ++ goto _exit; ++ } ++ ++ // ----- fill tx desc ----- ++ ptxdesc = (struct tx_desc *)pxmitbuf; ++ _rtw_memset(ptxdesc, 0, sizeof(*ptxdesc)); ++ ++ //offset 0 ++ ptxdesc->txdw0 |= cpu_to_le32(len&0x0000ffff); ++ ptxdesc->txdw0 |= cpu_to_le32(((TXDESC_SIZE+OFFSET_SZ)<txdw0 |= cpu_to_le32(OWN | FSG | LSG); ++ ++ if(bmcst) ++ { ++ ptxdesc->txdw0 |= cpu_to_le32(BIT(24)); ++ } ++ ++ //offset 4 ++ ptxdesc->txdw1 |= cpu_to_le32(0x00);//MAC_ID ++ ++ ptxdesc->txdw1 |= cpu_to_le32((0x12<txdw1 |= cpu_to_le32((0x06<< 16) & 0x000f0000);//b mode ++ ++ //offset 8 ++ ++ //offset 12 ++ ptxdesc->txdw3 |= cpu_to_le32((le16_to_cpu(tx_hdr->seq_ctl)<<16)&0xffff0000); ++ ++ //offset 16 ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(8));//driver uses rate ++ ++ //offset 20 ++ ++ ++ //HW append seq ++ ptxdesc->txdw4 |= cpu_to_le32(BIT(7)); // Hw set sequence number ++ ptxdesc->txdw3 |= cpu_to_le32((8 <<28)); //set bit3 to 1. Suugested by TimChen. 2009.12.29. ++ ++ ++ rtl8192cu_cal_txdesc_chksum(ptxdesc); ++ // ----- end of fill tx desc ----- ++ ++ // ++ skb_put(pxmit_skb, len + TXDESC_SIZE); ++ pxmitbuf = pxmitbuf + TXDESC_SIZE; ++ _rtw_memcpy(pxmitbuf, skb->data, len); ++ ++ //DBG_8192C("mgnt_xmit, len=%x\n", pxmit_skb->len); ++ ++ ++ // ----- prepare urb for submit ----- ++ ++ //translate DMA FIFO addr to pipehandle ++ //pipe = ffaddr2pipehdl(pdvobj, MGT_QUEUE_INX); ++ pipe = usb_sndbulkpipe(pdvobj->pusbdev, pHalData->Queue2EPNum[(u8)MGT_QUEUE_INX]&0x0f); ++ ++ usb_fill_bulk_urb(urb, pdvobj->pusbdev, pipe, ++ pxmit_skb->data, pxmit_skb->len, rtl8192cu_hostap_mgnt_xmit_cb, pxmit_skb); ++ ++ urb->transfer_flags |= URB_ZERO_PACKET; ++ usb_anchor_urb(urb, &phostapdpriv->anchored); ++ rc = usb_submit_urb(urb, GFP_ATOMIC); ++ if (rc < 0) { ++ usb_unanchor_urb(urb); ++ kfree_skb(skb); ++ } ++ usb_free_urb(urb); ++ ++ ++_exit: ++ ++ dev_kfree_skb_any(skb); ++ ++#endif ++ ++ return 0; ++ ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,6039 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _HCI_HAL_INIT_C_ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192c_sreset.h" ++#endif ++ ++#ifdef CONFIG_IOL ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ ++#error "CONFIG_USB_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++ ++#if DISABLE_BB_RF ++ #define HAL_MAC_ENABLE 0 ++ #define HAL_BB_ENABLE 0 ++ #define HAL_RF_ENABLE 0 ++#else ++ #define HAL_MAC_ENABLE 1 ++ #define HAL_BB_ENABLE 1 ++ #define HAL_RF_ENABLE 1 ++#endif ++ ++//endpoint number 1,2,3,4,5 ++// bult in : 1 ++// bult out: 2 (High) ++// bult out: 3 (Normal) for 3 out_ep, (Low) for 2 out_ep ++// interrupt in: 4 ++// bult out: 5 (Low) for 3 out_ep ++ ++ ++static VOID ++_OneOutEpMapping( ++ IN HAL_DATA_TYPE *pHalData ++ ) ++{ ++ //only endpoint number 0x02 ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++} ++ ++ ++static VOID ++_TwoOutEpMapping( ++ IN BOOLEAN IsTestChip, ++ IN HAL_DATA_TYPE *pHalData, ++ IN BOOLEAN bWIFICfg ++ ) ++{ ++ ++/* ++#define VO_QUEUE_INX 0 ++#define VI_QUEUE_INX 1 ++#define BE_QUEUE_INX 2 ++#define BK_QUEUE_INX 3 ++#define BCN_QUEUE_INX 4 ++#define MGT_QUEUE_INX 5 ++#define HIGH_QUEUE_INX 6 ++#define TXCMD_QUEUE_INX 7 ++*/ ++ ++ if(IsTestChip && bWIFICfg){ // test chip && wmm ++ ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 1, 0, 1, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:L (end_number=0x03) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[0];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ else if(!IsTestChip && bWIFICfg){ // Normal chip && wmm ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 0, 1, 0, 1, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:L (end_number=0x03) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[1];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[0];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ else{//typical setting ++ ++ //BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 1, 1, 0, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:L (end_number=0x03) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[0];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[1];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ ++} ++ ++ ++static VOID _ThreeOutEpMapping( ++ IN HAL_DATA_TYPE *pHalData, ++ IN BOOLEAN bWIFICfg ++ ) ++{ ++ if(bWIFICfg){//for WMM ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 1, 2, 1, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05) ++ ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[1];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ else{//typical setting ++ ++ // BK, BE, VI, VO, BCN, CMD,MGT,HIGH,HCCA ++ //{ 2, 2, 1, 0, 0, 0, 0, 0, 0 }; ++ //0:H(end_number=0x02), 1:N(end_number=0x03), 2:L (end_number=0x05) ++ pHalData->Queue2EPNum[0] = pHalData->RtBulkOutPipe[0];//VO ++ pHalData->Queue2EPNum[1] = pHalData->RtBulkOutPipe[1];//VI ++ pHalData->Queue2EPNum[2] = pHalData->RtBulkOutPipe[2];//BE ++ pHalData->Queue2EPNum[3] = pHalData->RtBulkOutPipe[2];//BK ++ ++ pHalData->Queue2EPNum[4] = pHalData->RtBulkOutPipe[0];//BCN ++ pHalData->Queue2EPNum[5] = pHalData->RtBulkOutPipe[0];//MGT ++ pHalData->Queue2EPNum[6] = pHalData->RtBulkOutPipe[0];//HIGH ++ pHalData->Queue2EPNum[7] = pHalData->RtBulkOutPipe[0];//TXCMD ++ } ++ ++} ++ ++static BOOLEAN ++_MappingOutEP( ++ IN PADAPTER pAdapter, ++ IN u8 NumOutPipe, ++ IN BOOLEAN IsTestChip ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct registry_priv *pregistrypriv = &pAdapter->registrypriv; ++ ++ BOOLEAN bWIFICfg = (pregistrypriv->wifi_spec) ?_TRUE:_FALSE; ++ ++ BOOLEAN result = _TRUE; ++ ++ switch(NumOutPipe) ++ { ++ case 2: ++ _TwoOutEpMapping(IsTestChip, pHalData, bWIFICfg); ++ break; ++ case 3: ++ // Test chip doesn't support three out EPs. ++ if(IsTestChip){ ++ return _FALSE; ++ } ++ _ThreeOutEpMapping(pHalData, bWIFICfg); ++ break; ++ case 1: ++ _OneOutEpMapping(pHalData); ++ break; ++ default: ++ result = _FALSE; ++ break; ++ } ++ ++ return result; ++ ++} ++ ++static VOID ++_ConfigTestChipOutEP( ++ IN PADAPTER pAdapter, ++ IN u8 NumOutPipe ++ ) ++{ ++ u8 value8,txqsele; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ pHalData->OutEpQueueSel = 0; ++ pHalData->OutEpNumber = 0; ++ ++ value8 = rtw_read8(pAdapter, REG_TEST_SIE_OPTIONAL); ++ value8 = (value8 & USB_TEST_EP_MASK) >> USB_TEST_EP_SHIFT; ++ ++ switch(value8) ++ { ++ case 0: // 2 bulk OUT, 1 bulk IN ++ case 3: ++ pHalData->OutEpQueueSel = TX_SELE_HQ | TX_SELE_LQ; ++ pHalData->OutEpNumber = 2; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("EP Config: 2 bulk OUT, 1 bulk IN\n")); ++ break; ++ case 1: // 1 bulk IN/OUT => map all endpoint to Low queue ++ case 2: // 1 bulk IN, 1 bulk OUT => map all endpoint to High queue ++ txqsele = rtw_read8(pAdapter, REG_TEST_USB_TXQS); ++ if(txqsele & 0x0F){//map all endpoint to High queue ++ pHalData->OutEpQueueSel = TX_SELE_HQ; ++ } ++ else if(txqsele&0xF0){//map all endpoint to Low queue ++ pHalData->OutEpQueueSel = TX_SELE_LQ; ++ } ++ pHalData->OutEpNumber = 1; ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("%s\n", ((1 == value8) ? "1 bulk IN/OUT" : "1 bulk IN, 1 bulk OUT"))); ++ break; ++ default: ++ break; ++ } ++ ++ // TODO: Error recovery for this case ++ //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber)); ++ ++} ++ ++ ++ ++static VOID ++_ConfigNormalChipOutEP( ++ IN PADAPTER pAdapter, ++ IN u8 NumOutPipe ++ ) ++{ ++ u8 value8; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ ++ pHalData->OutEpQueueSel = 0; ++ pHalData->OutEpNumber = 0; ++ ++ // Normal and High queue ++ value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 1)); ++ ++ if(value8 & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_HQ; ++ pHalData->OutEpNumber++; ++ } ++ ++ if((value8 >> USB_NORMAL_SIE_EP_SHIFT) & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_NQ; ++ pHalData->OutEpNumber++; ++ } ++ ++ // Low queue ++ value8 = rtw_read8(pAdapter, (REG_NORMAL_SIE_EP + 2)); ++ if(value8 & USB_NORMAL_SIE_EP_MASK){ ++ pHalData->OutEpQueueSel |= TX_SELE_LQ; ++ pHalData->OutEpNumber++; ++ } ++ ++ // TODO: Error recovery for this case ++ //RT_ASSERT((NumOutPipe == pHalData->OutEpNumber), ("Out EP number isn't match! %d(Descriptor) != %d (SIE reg)\n", (u4Byte)NumOutPipe, (u4Byte)pHalData->OutEpNumber)); ++ ++} ++ ++static BOOLEAN HalUsbSetQueuePipeMapping8192CUsb( ++ IN PADAPTER pAdapter, ++ IN u8 NumInPipe, ++ IN u8 NumOutPipe ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ BOOLEAN result = _FALSE; ++ BOOLEAN isNormalChip; ++ ++ //may be update UPHY Parameter == georgia ++ ++ ++ // ReadAdapterInfo8192C also call _ReadChipVersion too. ++ // Since we need dynamic config EP mapping, so we call this function to get chip version. ++ // We can remove _ReadChipVersion from ReadAdapterInfo8192C later. ++ //pHalData->VersionID = rtl8192c_ReadChipVersion(pAdapter); ++ ++ isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ if(isNormalChip){ ++ _ConfigNormalChipOutEP(pAdapter, NumOutPipe); ++ } ++ else{ ++ _ConfigTestChipOutEP(pAdapter, NumOutPipe); ++ } ++ ++ // Normal chip with one IN and one OUT doesn't have interrupt IN EP. ++ if(isNormalChip && (1 == pHalData->OutEpNumber)){ ++ if(1 != NumInPipe){ ++ return result; ++ } ++ } ++ ++ // All config other than above support one Bulk IN and one Interrupt IN. ++ //if(2 != NumInPipe){ ++ // return result; ++ //} ++ ++ result = _MappingOutEP(pAdapter, NumOutPipe, !isNormalChip); ++ ++ return result; ++ ++} ++ ++void rtl8192cu_interface_configure(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ ++ if (pdvobjpriv->ishighspeed == _TRUE) ++ { ++ pHalData->UsbBulkOutSize = USB_HIGH_SPEED_BULK_SIZE;//512 bytes ++ } ++ else ++ { ++ pHalData->UsbBulkOutSize = USB_FULL_SPEED_BULK_SIZE;//64 bytes ++ } ++ ++ pHalData->interfaceIndex = pdvobjpriv->InterfaceNumber; ++ pHalData->RtBulkInPipe = pdvobjpriv->ep_num[0]; ++ pHalData->RtBulkOutPipe[0] = pdvobjpriv->ep_num[1]; ++ pHalData->RtBulkOutPipe[1] = pdvobjpriv->ep_num[2]; ++ pHalData->RtIntInPipe = pdvobjpriv->ep_num[3]; ++ pHalData->RtBulkOutPipe[2] = pdvobjpriv->ep_num[4]; ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ pHalData->UsbTxAggMode = 1; ++ pHalData->UsbTxAggDescNum = 0x6; // only 4 bits ++#endif ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ pHalData->UsbRxAggMode = USB_RX_AGG_DMA;// USB_RX_AGG_DMA; ++ pHalData->UsbRxAggBlockCount = 8; //unit : 512b ++ pHalData->UsbRxAggBlockTimeout = 0x6; ++ pHalData->UsbRxAggPageCount = 48; //uint :128 b //0x0A; // 10 = MAX_RX_DMA_BUFFER_SIZE/2/pHalData->UsbBulkOutSize ++ pHalData->UsbRxAggPageTimeout = 0x4; //6, absolute time = 34ms/(2^6) ++#endif ++ ++ HalUsbSetQueuePipeMapping8192CUsb(padapter, ++ pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); ++ ++} ++ ++static u8 _InitPowerOn(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 ret = _SUCCESS; ++ u16 value16=0; ++ u8 value8 = 0; ++ u32 value32 = 0; ++ ++ // polling autoload done. ++ u32 pollingCount = 0; ++ ++ do ++ { ++ if(rtw_read8(padapter, REG_APS_FSMCO) & PFM_ALDN){ ++ //RT_TRACE(COMP_INIT,DBG_LOUD,("Autoload Done!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[PFM_ALDN] done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++ ++// For hardware power on sequence. ++ ++ //0. RSV_CTRL 0x1C[7:0] = 0x00 // unlock ISO/CLK/Power control register ++ rtw_write8(padapter, REG_RSV_CTRL, 0x0); ++ // Power on when re-enter from IPS/Radio off/card disable ++ rtw_write8(padapter, REG_SPS0_CTRL, 0x2b);//enable SPS into PWM mode ++/* ++ value16 = PlatformIORead2Byte(Adapter, REG_AFE_XTAL_CTRL);//enable AFE clock ++ value16 &= (~XTAL_GATE_AFE); ++ PlatformIOWrite2Byte(Adapter,REG_AFE_XTAL_CTRL, value16 ); ++*/ ++ ++ rtw_udelay_os(100);//PlatformSleepUs(150);//this is not necessary when initially power on ++ ++ value8 = rtw_read8(padapter, REG_LDOV12D_CTRL); ++ if(0== (value8 & LDV12_EN) ){ ++ value8 |= LDV12_EN; ++ rtw_write8(padapter, REG_LDOV12D_CTRL, value8); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" power-on :REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); ++ rtw_udelay_os(100);//PlatformSleepUs(100);//this is not necessary when initially power on ++ value8 = rtw_read8(padapter, REG_SYS_ISO_CTRL); ++ value8 &= ~ISO_MD2PP; ++ rtw_write8(padapter, REG_SYS_ISO_CTRL, value8); ++ } ++ ++ // auto enable WLAN ++ pollingCount = 0; ++ value16 = rtw_read16(padapter, REG_APS_FSMCO); ++ value16 |= APFM_ONMAC; ++ rtw_write16(padapter, REG_APS_FSMCO, value16); ++ ++ do ++ { ++ if(0 == (rtw_read16(padapter, REG_APS_FSMCO) & APFM_ONMAC)){ ++ //RT_TRACE(COMP_INIT,DBG_LOUD,("MAC auto ON okay!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling REG_APS_FSMCO[APFM_ONMAC] done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++ //Enable Radio ,GPIO ,and LED function ++ rtw_write16(padapter,REG_APS_FSMCO,0x0812); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ //for usb Combo card ,BT ++ if((BOARD_USB_COMBO == pHalData->BoardType)&&(padapter->registrypriv.usbss_enable)) ++ { ++ value32 = rtw_read32(padapter, REG_APS_FSMCO); ++ value32 |= (SOP_ABG|SOP_AMB|XOP_BTCK); ++ rtw_write32(padapter, REG_APS_FSMCO, value32); ++ } ++#endif ++ ++ // release RF digital isolation ++ value16 = rtw_read16(padapter, REG_SYS_ISO_CTRL); ++ value16 &= ~ISO_DIOR; ++ rtw_write16(padapter, REG_SYS_ISO_CTRL, value16); ++ ++ // Enable MAC DMA/WMAC/SCHEDULE/SEC block ++ value16 = rtw_read16(padapter, REG_CR); ++ value16 |= (HCI_TXDMA_EN | HCI_RXDMA_EN | TXDMA_EN | RXDMA_EN ++ | PROTOCOL_EN | SCHEDULE_EN | MACTXEN | MACRXEN | ENSEC); ++ rtw_write16(padapter, REG_CR, value16); ++ ++ //tynli_test for suspend mode. ++ { ++ rtw_write8(padapter, 0xfe10, 0x19); ++ } ++ ++ // 2010/11/22 MH For slim combo debug mode check. ++ if (pHalData->BoardType == BOARD_USB_COMBO) ++ { ++ if (pHalData->SlimComboDbg == _TRUE) ++ { ++ DBG_8192C("SlimComboDbg == TRUE\n"); ++ ++ // 1. SIC?Test Mode ¤¤, Debug Ports ·|¦Û°Ê Enable, ©Ò¥H Driver ¤W¨Ó«á, ++ // ­nÃö±¼½Ð³]©w 0x 00[7] -> "1", ±N¥¦ Disable. effect if not: power consumption increase ++ rtw_write8(padapter, REG_SYS_ISO_CTRL, rtw_read8(padapter, REG_SYS_ISO_CTRL)|BIT7); ++ ++ // 2. SIC?Test Mode ¤¤, GPIO-8?·| report Power State ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x04[6] -> "1" ±N¥¦ Disable ++ // effect if not: GPIO-8 could not be GPIO or LED function ++ rtw_write8(padapter, REG_APS_FSMCO, rtw_read8(padapter, REG_APS_FSMCO)|BIT6); ++ ++ // 3. SIC Test Mode ¤¤, EESK, EECS ·| report?Host Clock status, ©Ò¥H Driver ¤W¨Ó«á, ½Ð³]©w? 0x40[4] -> "1" ±N¥¦¤Á¦¨ EEPROM ¨Ï¥Î Pin (autoload still from Efuse) ++ // effect if not:power consumption increase ++ value8 = rtw_read8(padapter, REG_GPIO_MUXCFG)|BIT4 ; ++ #ifdef CONFIG_BT_COEXIST ++ // 2011/01/26 MH UMB-B cut bug. We need to support the modification. ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID) && ++ pHalData->bt_coexist.BT_Coexist) ++ { ++ value8 |= (BIT5); ++ } ++ #endif ++ rtw_write8(padapter, REG_GPIO_MUXCFG,value8 ); ++ ++ ++ // 4. SIC Test Mode ¤¤,?SIC Debug ports ·|¦Û°Ê Enable , ©Ò¥H Driver ¤W¨Ó«á°¨¤W, ½Ð³]©w? 0x40[15:11] -> ¡§0x00¡¨, ±N¥¦Disable ++ // 4.1Two Steps setting for safety: 0x40[15,13,12, 11] -> "0", then ?0x40[14] -> "0" ++ // effect if not: Host could not transfer packets, and GPIO-3,2 will occupied by SIC then Co-exist could not work. ++ rtw_write16(padapter, REG_GPIO_MUXCFG, (rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF)|BIT14); ++ rtw_write16(padapter, REG_GPIO_MUXCFG, rtw_read16(padapter, REG_GPIO_MUXCFG)&0x07FF); ++ } ++ } ++ ++ ++ // 2011/02/18 To Fix RU LNA power leakage problem. We need to execute below below in ++ // Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all ++ // IC. According to Johnny's opinion, only RU will meet the condition. ++ if (IS_HARDWARE_TYPE_8192C(padapter) && (pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write32(padapter, rFPGA0_XCD_RFParameter, rtw_read32(padapter, rFPGA0_XCD_RFParameter)&(~BIT1)); ++ return ret; ++ ++} ++ ++ ++static void _dbg_dump_macreg(_adapter *padapter) ++{ ++ u32 offset = 0; ++ u32 val32 = 0; ++ u32 index =0 ; ++ for(index=0;index<64;index++) ++ { ++ offset = index*4; ++ val32 = rtw_read32(padapter,offset); ++ DBG_8192C("offset : 0x%02x ,val:0x%08x\n",offset,val32); ++ } ++} ++ ++ ++static void _InitPABias(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ u8 pa_setting; ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ BOOLEAN is92C = IS_92C_SERIAL(pHalData->VersionID); ++ ++ //FIXED PA current issue ++ //efuse_one_byte_read(padapter, 0x1FA, &pa_setting); ++ pa_setting = EFUSE_Read1Byte(padapter, 0x1FA); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("_InitPABias 0x1FA 0x%x \n",pa_setting)); ++ ++ if(!(pa_setting & BIT0)) ++ { ++ PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x0F406); ++ PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x4F406); ++ PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0x8F406); ++ PHY_SetRFReg(padapter, RF90_PATH_A, 0x15, 0x0FFFFF, 0xCF406); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path A\n")); ++ } ++ ++ if(!(pa_setting & BIT1) && isNormal && is92C) ++ { ++ PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x0F406); ++ PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x4F406); ++ PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0x8F406); ++ PHY_SetRFReg(padapter,RF90_PATH_B, 0x15, 0x0FFFFF, 0xCF406); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("PA BIAS path B\n")); ++ } ++ ++ if(!(pa_setting & BIT4)) ++ { ++ pa_setting = rtw_read8(padapter, 0x16); ++ pa_setting &= 0x0F; ++ rtw_write8(padapter, 0x16, pa_setting | 0x90); ++ } ++} ++#ifdef CONFIG_BT_COEXIST ++static void _InitBTCoexist(_adapter *padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++ u8 u1Tmp; ++ ++ if(pbtpriv->BT_Coexist && pbtpriv->BT_CoexistType == BT_CSR_BC4) ++ { ++ ++#if MP_DRIVER != 1 ++ if(pbtpriv->BT_Ant_isolation) ++ { ++ rtw_write8( padapter,REG_GPIO_MUXCFG, 0xa0); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_GPIO_MUXCFG, 0xa0); ++ } ++#endif ++ ++ u1Tmp = rtw_read8(padapter, 0x4fd) & BIT0; ++ u1Tmp = u1Tmp | ++ ((pbtpriv->BT_Ant_isolation==1)?0:BIT1) | ++ ((pbtpriv->BT_Service==BT_SCO)?0:BIT2); ++ rtw_write8( padapter, 0x4fd, u1Tmp); ++ DBG_8192C("BT write 0x%x = 0x%x for non-isolation\n", 0x4fd, u1Tmp); ++ ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+4, 0xaaaa9aaa); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+4, 0xaaaa9aaa); ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+8, 0xffbd0040); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+8, 0xffbd0040); ++ ++ rtw_write32(padapter, REG_BT_COEX_TABLE+0xc, 0x40000010); ++ DBG_8192C("BT write 0x%x = 0x%x\n", REG_BT_COEX_TABLE+0xc, 0x40000010); ++ ++ //Config to 1T1R ++ u1Tmp = rtw_read8(padapter,rOFDM0_TRxPathEnable); ++ u1Tmp &= ~(BIT1); ++ rtw_write8( padapter, rOFDM0_TRxPathEnable, u1Tmp); ++ DBG_8192C("BT write 0xC04 = 0x%x\n", u1Tmp); ++ ++ u1Tmp = rtw_read8(padapter, rOFDM1_TRxPathEnable); ++ u1Tmp &= ~(BIT1); ++ rtw_write8( padapter, rOFDM1_TRxPathEnable, u1Tmp); ++ DBG_8192C("BT write 0xD04 = 0x%x\n", u1Tmp); ++ ++ } ++} ++#endif ++ ++//------------------------------------------------------------------------- ++// ++// LLT R/W/Init function ++// ++//------------------------------------------------------------------------- ++static u8 _LLTWrite( ++ IN PADAPTER Adapter, ++ IN u32 address, ++ IN u32 data ++ ) ++{ ++ u8 status = _SUCCESS; ++ int count = 0; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_INIT_DATA(data) | _LLT_OP(_LLT_WRITE_ACCESS); ++ ++ rtw_write32(Adapter, REG_LLT_INIT, value); ++ ++ //polling ++ do{ ++ ++ value = rtw_read32(Adapter, REG_LLT_INIT); ++ if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ ++ break; ++ } ++ ++ if(count > POLLING_LLT_THRESHOLD){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling write LLT done at address %d!\n", address)); ++ status = _FAIL; ++ break; ++ } ++ }while(count++); ++ ++ return status; ++ ++} ++ ++ ++static u8 _LLTRead( ++ IN PADAPTER Adapter, ++ IN u32 address ++ ) ++{ ++ int count = 0; ++ u32 value = _LLT_INIT_ADDR(address) | _LLT_OP(_LLT_READ_ACCESS); ++ ++ rtw_write32(Adapter, REG_LLT_INIT, value); ++ ++ //polling and get value ++ do{ ++ ++ value = rtw_read32(Adapter, REG_LLT_INIT); ++ if(_LLT_NO_ACTIVE == _LLT_OP_VALUE(value)){ ++ return (u8)value; ++ } ++ ++ if(count > POLLING_LLT_THRESHOLD){ ++ //RT_TRACE(COMP_INIT,DBG_SERIOUS,("Failed to polling read LLT done at address %d!\n", address)); ++ break; ++ } ++ }while(count++); ++ ++ return 0xFF; ++ ++} ++ ++ ++static u8 InitLLTTable( ++ IN PADAPTER Adapter, ++ IN u32 boundary ++ ) ++{ ++ u8 status = _SUCCESS; ++ u32 i; ++ ++#ifdef CONFIG_IOL_LLT ++ if(rtw_IOL_applied(Adapter)) ++ { ++ struct xmit_frame *xmit_frame; ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(Adapter)) == NULL) ++ return _FAIL; ++ ++ rtw_IOL_append_LLT_cmd(xmit_frame, boundary); ++ status = rtw_IOL_exec_cmds_sync(Adapter, xmit_frame, 1000); ++ } ++ else ++#endif ++ { ++ for(i = 0 ; i < (boundary - 1) ; i++){ ++ status = _LLTWrite(Adapter, i , i + 1); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ // end of list ++ status = _LLTWrite(Adapter, (boundary - 1), 0xFF); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ ++ // Make the other pages as ring buffer ++ // This ring buffer is used as beacon buffer if we config this MAC as two MAC transfer. ++ // Otherwise used as local loopback buffer. ++ for(i = boundary ; i < LAST_ENTRY_OF_TX_PKT_BUFFER ; i++){ ++ status = _LLTWrite(Adapter, i, (i + 1)); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ // Let last entry point to the start entry of ring buffer ++ status = _LLTWrite(Adapter, LAST_ENTRY_OF_TX_PKT_BUFFER, boundary); ++ if(_SUCCESS != status){ ++ return status; ++ } ++ } ++ ++ return status; ++ ++} ++ ++ ++//--------------------------------------------------------------- ++// ++// MAC init functions ++// ++//--------------------------------------------------------------- ++static VOID ++_SetMacID( ++ IN PADAPTER Adapter, u8* MacID ++ ) ++{ ++ u32 i; ++ for(i=0 ; i< MAC_ADDR_LEN ; i++){ ++ rtw_write32(Adapter, REG_MACID+i, MacID[i]); ++ } ++} ++ ++static VOID ++_SetBSSID( ++ IN PADAPTER Adapter, u8* BSSID ++ ) ++{ ++ u32 i; ++ for(i=0 ; i< MAC_ADDR_LEN ; i++){ ++ rtw_write32(Adapter, REG_BSSID+i, BSSID[i]); ++ } ++} ++ ++ ++// Shall USB interface init this? ++static VOID ++_InitInterrupt( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ // HISR - turn all on ++ value32 = 0xFFFFFFFF; ++ rtw_write32(Adapter, REG_HISR, value32); ++ ++ // HIMR - turn all on ++ rtw_write32(Adapter, REG_HIMR, value32); ++} ++ ++ ++static VOID ++_InitQueueReservedPage( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ BOOLEAN isNormalChip = IS_NORMAL_CHIP(pHalData->VersionID); ++ ++ u32 outEPNum = (u32)pHalData->OutEpNumber; ++ u32 numHQ = 0; ++ u32 numLQ = 0; ++ u32 numNQ = 0; ++ u32 numPubQ; ++ u32 value32; ++ u8 value8; ++ BOOLEAN bWiFiConfig = pregistrypriv->wifi_spec; ++ //u32 txQPageNum, txQPageUnit,txQRemainPage; ++ ++#if 0 ++ if(!pregistrypriv->wifi_spec){ ++ numPubQ = (isNormalChip) ? NORMAL_PAGE_NUM_PUBQ : TEST_PAGE_NUM_PUBQ; ++ //RT_ASSERT((numPubQ < TX_TOTAL_PAGE_NUMBER), ("Public queue page number is great than total tx page number.\n")); ++ txQPageNum = TX_TOTAL_PAGE_NUMBER - numPubQ; ++ ++ //RT_ASSERT((0 == txQPageNum%txQPageNum), ("Total tx page number is not dividable!\n")); ++ ++ txQPageUnit = txQPageNum/outEPNum; ++ txQRemainPage = txQPageNum % outEPNum; ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_HQ){ ++ numHQ = txQPageUnit; ++ } ++ if(pHalData->OutEpQueueSel & TX_SELE_LQ){ ++ numLQ = txQPageUnit; ++ } ++ // HIGH priority queue always present in the configuration of 2 or 3 out-ep ++ // so ,remainder pages have assigned to High queue ++ if((outEPNum>1) && (txQRemainPage)){ ++ numHQ += txQRemainPage; ++ } ++ ++ // NOTE: This step shall be proceed before writting REG_RQPN. ++ if(isNormalChip){ ++ if(pHalData->OutEpQueueSel & TX_SELE_NQ){ ++ numNQ = txQPageUnit; ++ } ++ value8 = (u8)_NPQ(numNQ); ++ rtw_write8(Adapter, REG_RQPN_NPQ, value8); ++ } ++ //RT_ASSERT(((numHQ + numLQ + numNQ + numPubQ) < TX_PAGE_BOUNDARY), ("Total tx page number is greater than tx boundary!\n")); ++ } ++ else ++#endif ++ { //for WMM ++ //RT_ASSERT((outEPNum>=2), ("for WMM ,number of out-ep must more than or equal to 2!\n")); ++ ++ numPubQ = (isNormalChip) ? ((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_PUBQ:NORMAL_PAGE_NUM_PUBQ) ++ :WMM_TEST_PAGE_NUM_PUBQ; ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_HQ){ ++ numHQ = (isNormalChip)?((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_HPQ:NORMAL_PAGE_NUM_HPQ) ++ :WMM_TEST_PAGE_NUM_HPQ; ++ } ++ ++ if(pHalData->OutEpQueueSel & TX_SELE_LQ){ ++ numLQ = (isNormalChip)?((bWiFiConfig)?WMM_NORMAL_PAGE_NUM_LPQ:NORMAL_PAGE_NUM_LPQ) ++ :WMM_TEST_PAGE_NUM_LPQ; ++ } ++ // NOTE: This step shall be proceed before writting REG_RQPN. ++ if(isNormalChip){ ++ if(pHalData->OutEpQueueSel & TX_SELE_NQ){ ++ numNQ = (bWiFiConfig)?WMM_NORMAL_PAGE_NUM_NPQ:NORMAL_PAGE_NUM_NPQ; ++ } ++ value8 = (u8)_NPQ(numNQ); ++ rtw_write8(Adapter, REG_RQPN_NPQ, value8); ++ } ++ } ++ ++ // TX DMA ++ value32 = _HPQ(numHQ) | _LPQ(numLQ) | _PUBQ(numPubQ) | LD_RQPN; ++ rtw_write32(Adapter, REG_RQPN, value32); ++} ++ ++static void _InitID(IN PADAPTER Adapter) ++{ ++ int i; ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ ++ for(i=0; i<6; i++) ++ { ++ rtw_write8(Adapter, (REG_MACID+i), pEEPROM->mac_addr[i]); ++ } ++ ++/* ++ NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); ++ //Ziv test ++#if 1 ++ { ++ u1Byte sMacAddr[6] = {0}; ++ u4Byte i; ++ ++ for(i = 0 ; i < MAC_ADDR_LEN ; i++){ ++ sMacAddr[i] = PlatformIORead1Byte(Adapter, (REG_MACID + i)); ++ } ++ RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "Read back MAC Addr: ", sMacAddr); ++ } ++#endif ++ ++#if 0 ++ u4Byte nMAR = 0xFFFFFFFF; ++ u8 m_MacID[] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06}; ++ u8 m_BSSID[] = {0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f}; ++ int i; ++ ++ _SetMacID(Adapter, Adapter->PermanentAddress); ++ _SetBSSID(Adapter, m_BSSID); ++ ++ //set MAR ++ PlatformIOWrite4Byte(Adapter, REG_MAR, nMAR); ++ PlatformIOWrite4Byte(Adapter, REG_MAR+4, nMAR); ++#endif ++*/ ++} ++ ++ ++static VOID ++_InitTxBufferBoundary( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ u8 txpktbuf_bndy; ++ ++ if(!pregistrypriv->wifi_spec){ ++ txpktbuf_bndy = TX_PAGE_BOUNDARY; ++ } ++ else{//for WMM ++ txpktbuf_bndy = ( IS_NORMAL_CHIP( pHalData->VersionID))?WMM_NORMAL_TX_PAGE_BOUNDARY ++ :WMM_TEST_TX_PAGE_BOUNDARY; ++ } ++ ++ rtw_write8(Adapter, REG_TXPKTBUF_BCNQ_BDNY, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TXPKTBUF_MGQ_BDNY, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TXPKTBUF_WMAC_LBK_BF_HD, txpktbuf_bndy); ++ rtw_write8(Adapter, REG_TRXFF_BNDY, txpktbuf_bndy); ++#if 1 ++ rtw_write8(Adapter, REG_TDECTRL+1, txpktbuf_bndy); ++#else ++ txdmactrl = PlatformIORead2Byte(Adapter, REG_TDECTRL); ++ txdmactrl &= ~BCN_HEAD_MASK; ++ txdmactrl |= BCN_HEAD(txpktbuf_bndy); ++ PlatformIOWrite2Byte(Adapter, REG_TDECTRL, txdmactrl); ++#endif ++} ++ ++static VOID ++_InitPageBoundary( ++ IN PADAPTER Adapter ++ ) ++{ ++ // RX Page Boundary ++ //srand(static_cast(time(NULL)) ); ++ u16 rxff_bndy = 0x27FF;//(rand() % 1) ? 0x27FF : 0x23FF; ++ ++ rtw_write16(Adapter, (REG_TRXFF_BNDY + 2), rxff_bndy); ++ ++ // TODO: ?? shall we set tx boundary? ++} ++ ++ ++static VOID ++_InitNormalChipRegPriority( ++ IN PADAPTER Adapter, ++ IN u16 beQ, ++ IN u16 bkQ, ++ IN u16 viQ, ++ IN u16 voQ, ++ IN u16 mgtQ, ++ IN u16 hiQ ++ ) ++{ ++ u16 value16 = (rtw_read16(Adapter, REG_TRXDMA_CTRL) & 0x7); ++ ++ value16 |= _TXDMA_BEQ_MAP(beQ) | _TXDMA_BKQ_MAP(bkQ) | ++ _TXDMA_VIQ_MAP(viQ) | _TXDMA_VOQ_MAP(voQ) | ++ _TXDMA_MGQ_MAP(mgtQ)| _TXDMA_HIQ_MAP(hiQ); ++ ++ rtw_write16(Adapter, REG_TRXDMA_CTRL, value16); ++} ++ ++static VOID ++_InitNormalChipOneOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ u16 value = 0; ++ switch(pHalData->OutEpQueueSel) ++ { ++ case TX_SELE_HQ: ++ value = QUEUE_HIGH; ++ break; ++ case TX_SELE_LQ: ++ value = QUEUE_LOW; ++ break; ++ case TX_SELE_NQ: ++ value = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ _InitNormalChipRegPriority(Adapter, ++ value, ++ value, ++ value, ++ value, ++ value, ++ value ++ ); ++ ++} ++ ++static VOID ++_InitNormalChipTwoOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; ++ ++ ++ u16 valueHi = 0; ++ u16 valueLow = 0; ++ ++ switch(pHalData->OutEpQueueSel) ++ { ++ case (TX_SELE_HQ | TX_SELE_LQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_NQ | TX_SELE_LQ): ++ valueHi = QUEUE_NORMAL; ++ valueLow = QUEUE_LOW; ++ break; ++ case (TX_SELE_HQ | TX_SELE_NQ): ++ valueHi = QUEUE_HIGH; ++ valueLow = QUEUE_NORMAL; ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ if(!pregistrypriv->wifi_spec ){ ++ beQ = valueLow; ++ bkQ = valueLow; ++ viQ = valueHi; ++ voQ = valueHi; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ else{//for WMM ,CONFIG_OUT_EP_WIFI_MODE ++ beQ = valueLow; ++ bkQ = valueHi; ++ viQ = valueHi; ++ voQ = valueLow; ++ mgtQ = valueHi; ++ hiQ = valueHi; ++ } ++ ++ _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++ ++} ++ ++static VOID ++_InitNormalChipThreeOutEpPriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u16 beQ,bkQ,viQ,voQ,mgtQ,hiQ; ++ ++ if(!pregistrypriv->wifi_spec ){// typical setting ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_LOW; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ else{// for WMM ++ beQ = QUEUE_LOW; ++ bkQ = QUEUE_NORMAL; ++ viQ = QUEUE_NORMAL; ++ voQ = QUEUE_HIGH; ++ mgtQ = QUEUE_HIGH; ++ hiQ = QUEUE_HIGH; ++ } ++ _InitNormalChipRegPriority(Adapter,beQ,bkQ,viQ,voQ,mgtQ,hiQ); ++} ++ ++static VOID ++_InitNormalChipQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ switch(pHalData->OutEpNumber) ++ { ++ case 1: ++ _InitNormalChipOneOutEpPriority(Adapter); ++ break; ++ case 2: ++ _InitNormalChipTwoOutEpPriority(Adapter); ++ break; ++ case 3: ++ _InitNormalChipThreeOutEpPriority(Adapter); ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ ++ ++} ++ ++static VOID ++_InitTestChipQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 hq_sele ; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ ++ switch(pHalData->OutEpNumber) ++ { ++ case 2: // (TX_SELE_HQ|TX_SELE_LQ) ++ if(!pregistrypriv->wifi_spec)//typical setting ++ hq_sele = HQSEL_VOQ | HQSEL_VIQ | HQSEL_MGTQ | HQSEL_HIQ ; ++ else //for WMM ++ hq_sele = HQSEL_VOQ | HQSEL_BEQ | HQSEL_MGTQ | HQSEL_HIQ ; ++ break; ++ case 1: ++ if(TX_SELE_LQ == pHalData->OutEpQueueSel ){//map all endpoint to Low queue ++ hq_sele = 0; ++ } ++ else if(TX_SELE_HQ == pHalData->OutEpQueueSel){//map all endpoint to High queue ++ hq_sele = HQSEL_VOQ | HQSEL_VIQ | HQSEL_BEQ | HQSEL_BKQ | HQSEL_MGTQ | HQSEL_HIQ ; ++ } ++ break; ++ default: ++ //RT_ASSERT(FALSE,("Shall not reach here!\n")); ++ break; ++ } ++ rtw_write8(Adapter, (REG_TRXDMA_CTRL+1), hq_sele); ++} ++ ++ ++static VOID ++_InitQueuePriority( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(IS_NORMAL_CHIP( pHalData->VersionID)){ ++ _InitNormalChipQueuePriority(Adapter); ++ } ++ else{ ++ _InitTestChipQueuePriority(Adapter); ++ } ++} ++ ++static VOID ++_InitHardwareDropIncorrectBulkOut( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32 = rtw_read32(Adapter, REG_TXDMA_OFFSET_CHK); ++ value32 |= DROP_DATA_EN; ++ rtw_write32(Adapter, REG_TXDMA_OFFSET_CHK, value32); ++} ++ ++static VOID ++_InitNetworkType( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(Adapter, REG_CR); ++ ++ // TODO: use the other function to set network type ++#if RTL8191C_FPGA_NETWORKTYPE_ADHOC ++ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AD_HOC); ++#else ++ value32 = (value32 & ~MASK_NETTYPE) | _NETTYPE(NT_LINK_AP); ++#endif ++ rtw_write32(Adapter, REG_CR, value32); ++// RASSERT(pIoBase->rtw_read8(REG_CR + 2) == 0x2); ++} ++ ++static VOID ++_InitTransferPageSize( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Tx page size is always 128. ++ ++ u8 value8; ++ value8 = _PSRX(PBP_128) | _PSTX(PBP_128); ++ rtw_write8(Adapter, REG_PBP, value8); ++} ++ ++static VOID ++_InitDriverInfoSize( ++ IN PADAPTER Adapter, ++ IN u8 drvInfoSize ++ ) ++{ ++ rtw_write8(Adapter,REG_RX_DRVINFO_SZ, drvInfoSize); ++} ++ ++static VOID ++_InitWMACSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ //u4Byte value32; ++ //u16 value16; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ //pHalData->ReceiveConfig = AAP | APM | AM | AB | APP_ICV | ADF | AMF | APP_FCS | HTC_LOC_CTRL | APP_MIC | APP_PHYSTS; ++ pHalData->ReceiveConfig = RCR_AAP | RCR_APM | RCR_AM | RCR_AB |RCR_CBSSID_DATA| RCR_CBSSID_BCN| RCR_APP_ICV | RCR_AMF | RCR_HTC_LOC_CTRL | RCR_APP_MIC | RCR_APP_PHYSTS; ++#if (0 == RTL8192C_RX_PACKET_NO_INCLUDE_CRC) ++ pHalData->ReceiveConfig |= ACRC32; ++#endif ++ ++ // some REG_RCR will be modified later by phy_ConfigMACWithHeaderFile() ++ rtw_write32(Adapter, REG_RCR, pHalData->ReceiveConfig); ++ ++ // Accept all multicast address ++ rtw_write32(Adapter, REG_MAR, 0xFFFFFFFF); ++ rtw_write32(Adapter, REG_MAR + 4, 0xFFFFFFFF); ++ ++ ++ // Accept all data frames ++ //value16 = 0xFFFF; ++ //rtw_write16(Adapter, REG_RXFLTMAP2, value16); ++ ++ // 2010.09.08 hpfan ++ // Since ADF is removed from RCR, ps-poll will not be indicate to driver, ++ // RxFilterMap should mask ps-poll to gurantee AP mode can rx ps-poll. ++ //value16 = 0x400; ++ //rtw_write16(Adapter, REG_RXFLTMAP1, value16); ++ ++ // Accept all management frames ++ //value16 = 0xFFFF; ++ //rtw_write16(Adapter, REG_RXFLTMAP0, value16); ++ ++ //enable RX_SHIFT bits ++ //rtw_write8(Adapter, REG_TRXDMA_CTRL, rtw_read8(Adapter, REG_TRXDMA_CTRL)|BIT(1)); ++ ++} ++ ++static VOID ++_InitAdaptiveCtrl( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ u32 value32; ++ ++ // Response Rate Set ++ value32 = rtw_read32(Adapter, REG_RRSR); ++ value32 &= ~RATE_BITMAP_ALL; ++ value32 |= RATE_RRSR_CCK_ONLY_1M; ++ rtw_write32(Adapter, REG_RRSR, value32); ++ ++ // CF-END Threshold ++ //m_spIoBase->rtw_write8(REG_CFEND_TH, 0x1); ++ ++ // SIFS (used in NAV) ++ value16 = _SPEC_SIFS_CCK(0x10) | _SPEC_SIFS_OFDM(0x10); ++ rtw_write16(Adapter, REG_SPEC_SIFS, value16); ++ ++ // Retry Limit ++ value16 = _LRL(0x30) | _SRL(0x30); ++ rtw_write16(Adapter, REG_RL, value16); ++ ++} ++ ++static VOID ++_InitRateFallback( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Set Data Auto Rate Fallback Retry Count register. ++ rtw_write32(Adapter, REG_DARFRC, 0x00000000); ++ rtw_write32(Adapter, REG_DARFRC+4, 0x10080404); ++ rtw_write32(Adapter, REG_RARFRC, 0x04030201); ++ rtw_write32(Adapter, REG_RARFRC+4, 0x08070605); ++ ++} ++ ++ ++static VOID ++_InitEDCA( ++ IN PADAPTER Adapter ++ ) ++{ ++ // Set Spec SIFS (used in NAV) ++ rtw_write16(Adapter,REG_SPEC_SIFS, 0x100a); ++ rtw_write16(Adapter,REG_MAC_SPEC_SIFS, 0x100a); ++ ++ // Set SIFS for CCK ++ rtw_write16(Adapter,REG_SIFS_CTX, 0x100a); ++ ++ // Set SIFS for OFDM ++ rtw_write16(Adapter,REG_SIFS_TRX, 0x100a); ++ ++ // TXOP ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, 0x005EA42B); ++ rtw_write32(Adapter, REG_EDCA_BK_PARAM, 0x0000A44F); ++ rtw_write32(Adapter, REG_EDCA_VI_PARAM, 0x005EA324); ++ rtw_write32(Adapter, REG_EDCA_VO_PARAM, 0x002FA226); ++} ++ ++ ++static VOID ++_InitBeaconMaxError( ++ IN PADAPTER Adapter, ++ IN BOOLEAN InfraMode ++ ) ++{ ++#ifdef RTL8192CU_ADHOC_WORKAROUND_SETTING ++ rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++#else ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, (InfraMode ? 0xFF : 0x10)); ++#endif ++} ++ ++ ++#ifdef CONFIG_LED ++static void _InitHWLed(PADAPTER Adapter) ++{ ++ struct led_priv *pledpriv = &(Adapter->ledpriv); ++ ++ if( pledpriv->LedStrategy != HW_LED) ++ return; ++ ++// HW led control ++// to do .... ++//must consider cases of antenna diversity/ commbo card/solo card/mini card ++ ++} ++#endif //CONFIG_LED ++ ++static VOID ++_InitRDGSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ rtw_write8(Adapter,REG_RD_CTRL,0xFF); ++ rtw_write16(Adapter, REG_RD_NAV_NXT, 0x200); ++ rtw_write8(Adapter,REG_RD_RESP_PKT_TH,0x05); ++} ++ ++static VOID ++_InitRxSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ rtw_write32(Adapter, REG_MACID, 0x87654321); ++ rtw_write32(Adapter, 0x0700, 0x87654321); ++} ++ ++static VOID ++_InitRetryFunction( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 value8; ++ ++ value8 = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL); ++ value8 |= EN_AMPDU_RTY_NEW; ++ rtw_write8(Adapter, REG_FWHW_TXQ_CTRL, value8); ++ ++ // Set ACK timeout ++ rtw_write8(Adapter, REG_ACKTO, 0x40); ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: usb_AggSettingTxUpdate() ++ * ++ * Overview: Seperate TX/RX parameters update independent for TP detection and ++ * dynamic TX/RX aggreagtion parameters update. ++ * ++ * Input: PADAPTER ++ * ++ * Output/Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Seperate to smaller function. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++usb_AggSettingTxUpdate( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u32 value32; ++ ++ if(Adapter->registrypriv.wifi_spec) ++ pHalData->UsbTxAggMode = _FALSE; ++ ++ if(pHalData->UsbTxAggMode){ ++ value32 = rtw_read32(Adapter, REG_TDECTRL); ++ value32 = value32 & ~(BLK_DESC_NUM_MASK << BLK_DESC_NUM_SHIFT); ++ value32 |= ((pHalData->UsbTxAggDescNum & BLK_DESC_NUM_MASK) << BLK_DESC_NUM_SHIFT); ++ ++ rtw_write32(Adapter, REG_TDECTRL, value32); ++ } ++ ++#endif ++} // usb_AggSettingTxUpdate ++ ++ ++/*----------------------------------------------------------------------------- ++ * Function: usb_AggSettingRxUpdate() ++ * ++ * Overview: Seperate TX/RX parameters update independent for TP detection and ++ * dynamic TX/RX aggreagtion parameters update. ++ * ++ * Input: PADAPTER ++ * ++ * Output/Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Seperate to smaller function. ++ * ++ *---------------------------------------------------------------------------*/ ++static VOID ++usb_AggSettingRxUpdate( ++ IN PADAPTER Adapter ++ ) ++{ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u8 valueDMA; ++ u8 valueUSB; ++ ++ valueDMA = rtw_read8(Adapter, REG_TRXDMA_CTRL); ++ valueUSB = rtw_read8(Adapter, REG_USB_SPECIAL_OPTION); ++ ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ valueDMA |= RXDMA_AGG_EN; ++ valueUSB &= ~USB_AGG_EN; ++ break; ++ case USB_RX_AGG_USB: ++ valueDMA &= ~RXDMA_AGG_EN; ++ valueUSB |= USB_AGG_EN; ++ break; ++ case USB_RX_AGG_MIX: ++ valueDMA |= RXDMA_AGG_EN; ++ valueUSB |= USB_AGG_EN; ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ valueDMA &= ~RXDMA_AGG_EN; ++ valueUSB &= ~USB_AGG_EN; ++ break; ++ } ++ ++ rtw_write8(Adapter, REG_TRXDMA_CTRL, valueDMA); ++ rtw_write8(Adapter, REG_USB_SPECIAL_OPTION, valueUSB); ++ ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); ++ rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); ++ break; ++ case USB_RX_AGG_USB: ++ rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); ++ rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); ++ break; ++ case USB_RX_AGG_MIX: ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, pHalData->UsbRxAggPageCount); ++ rtw_write8(Adapter, REG_USB_DMA_AGG_TO, pHalData->UsbRxAggPageTimeout); ++ rtw_write8(Adapter, REG_USB_AGG_TH, pHalData->UsbRxAggBlockCount); ++ rtw_write8(Adapter, REG_USB_AGG_TO, pHalData->UsbRxAggBlockTimeout); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ // TODO: ++ break; ++ } ++ ++ switch(PBP_128) ++ { ++ case PBP_128: ++ pHalData->HwRxPageSize = 128; ++ break; ++ case PBP_64: ++ pHalData->HwRxPageSize = 64; ++ break; ++ case PBP_256: ++ pHalData->HwRxPageSize = 256; ++ break; ++ case PBP_512: ++ pHalData->HwRxPageSize = 512; ++ break; ++ case PBP_1024: ++ pHalData->HwRxPageSize = 1024; ++ break; ++ default: ++ //RT_ASSERT(FALSE, ("RX_PAGE_SIZE_REG_VALUE definition is incorrect!\n")); ++ break; ++ } ++#endif ++} // usb_AggSettingRxUpdate ++ ++static VOID ++InitUsbAggregationSetting( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ // Tx aggregation setting ++ usb_AggSettingTxUpdate(Adapter); ++ ++ // Rx aggregation setting ++ usb_AggSettingRxUpdate(Adapter); ++ ++ // 201/12/10 MH Add for USB agg mode dynamic switch. ++ pHalData->UsbRxHighSpeedMode = _FALSE; ++} ++ ++/*----------------------------------------------------------------------------- ++ * Function: USB_AggModeSwitch() ++ * ++ * Overview: When RX traffic is more than 40M, we need to adjust some parameters to increase ++ * RX speed by increasing batch indication size. This will decrease TCP ACK speed, we ++ * need to monitor the influence of FTP/network share. ++ * For TX mode, we are still ubder investigation. ++ * ++ * Input: PADAPTER ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 12/10/2010 MHC Create Version 0. ++ * ++ *---------------------------------------------------------------------------*/ ++VOID ++USB_AggModeSwitch( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ ++ //pHalData->UsbRxHighSpeedMode = FALSE; ++ // How to measure the RX speed? We assume that when traffic is more than ++ if (pMgntInfo->bRegAggDMEnable == _FALSE) ++ { ++ return; // Inf not support. ++ } ++ ++ ++ if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _TRUE && ++ pHalData->UsbRxHighSpeedMode == _FALSE) ++ { ++ pHalData->UsbRxHighSpeedMode = _TRUE; ++ DBG_8192C("UsbAggModeSwitchCheck to HIGH\n"); ++ } ++ else if (pmlmepriv->LinkDetectInfo.bHigherBusyTraffic == _FALSE && ++ pHalData->UsbRxHighSpeedMode == _TRUE) ++ { ++ pHalData->UsbRxHighSpeedMode = _FALSE; ++ DBG_8192C("UsbAggModeSwitchCheck to LOW\n"); ++ } ++ else ++ { ++ return; ++ } ++ ++ // 2010/12/10 MH Add for USB Aggregation judgement we need to ++ //if( pMgntInfo->LinkDetectInfo.NumRxOkInPeriod > 4000 || ++ // pMgntInfo->LinkDetectInfo.NumTxOkInPeriod > 4000 ) ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ //usb_AggSettingTxUpdate(Adapter); ++#endif ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ if (pHalData->UsbRxHighSpeedMode == _TRUE) ++ { ++ // 2010/12/10 MH The parameter is tested by SD1 engineer and SD3 channel emulator. ++ // USB mode ++ pHalData->UsbRxAggBlockCount = 40; ++ pHalData->UsbRxAggBlockTimeout = 5; ++ // Mix mode ++ pHalData->UsbRxAggPageCount = 72; ++ pHalData->UsbRxAggPageTimeout = 6; ++ } ++ else ++ { ++ // USB mode ++ pHalData->UsbRxAggBlockCount = pMgntInfo->RegUsbRxAggBlockCount; ++ pHalData->UsbRxAggBlockTimeout = pMgntInfo->RegUsbRxAggBlockTimeout; ++ // Mix mode ++ pHalData->UsbRxAggPageCount = pMgntInfo->RegUsbRxAggPageCount; ++ pHalData->UsbRxAggPageTimeout = pMgntInfo->RegUsbRxAggPageTimeout; ++ } ++#endif ++#endif ++} // USB_AggModeSwitch ++ ++static VOID ++_InitOperationMode( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0//gtest ++ PHAL_DATA_8192CUSB pHalData = GetHalData8192CUsb(Adapter); ++ u1Byte regBwOpMode = 0; ++ u4Byte regRATR = 0, regRRSR = 0; ++ ++ ++ //1 This part need to modified according to the rate set we filtered!! ++ // ++ // Set RRSR, RATR, and REG_BWOPMODE registers ++ // ++ switch(Adapter->RegWirelessMode) ++ { ++ case WIRELESS_MODE_B: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK; ++ regRRSR = RATE_ALL_CCK; ++ break; ++ case WIRELESS_MODE_A: ++ ASSERT(FALSE); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G |BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ case WIRELESS_MODE_G: ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_AUTO: ++ if (Adapter->bInHctTest) ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ else ++ { ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ } ++ break; ++ case WIRELESS_MODE_N_24G: ++ // It support CCK rate by default. ++ // CCK rate will be filtered out only when associated AP does not support it. ++ regBwOpMode = BW_OPMODE_20MHZ; ++ regRATR = RATE_ALL_CCK | RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_CCK | RATE_ALL_OFDM_AG; ++ break; ++ case WIRELESS_MODE_N_5G: ++ ASSERT(FALSE); ++#if 0 ++ regBwOpMode = BW_OPMODE_5G; ++ regRATR = RATE_ALL_OFDM_AG | RATE_ALL_OFDM_1SS | RATE_ALL_OFDM_2SS; ++ regRRSR = RATE_ALL_OFDM_AG; ++#endif ++ break; ++ } ++ ++ // Ziv ???????? ++ //PlatformEFIOWrite4Byte(Adapter, REG_INIRTS_RATE_SEL, regRRSR); ++ PlatformEFIOWrite1Byte(Adapter, REG_BWOPMODE, regBwOpMode); ++ ++ // For Min Spacing configuration. ++ switch(pHalData->RF_Type) ++ { ++ case RF_1T2R: ++ case RF_1T1R: ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter: RF_Type%s\n", (pHalData->RF_Type==RF_1T1R? "(1T1R)":"(1T2R)"))); ++ Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_1T<<3); ++ break; ++ case RF_2T2R: ++ case RF_2T2R_GREEN: ++ RT_TRACE(COMP_INIT, DBG_LOUD, ("Initializeadapter:RF_Type(2T2R)\n")); ++ Adapter->MgntInfo.MinSpaceCfg = (MAX_MSS_DENSITY_2T<<3); ++ break; ++ } ++ ++ PlatformEFIOWrite1Byte(Adapter, REG_AMPDU_MIN_SPACE, Adapter->MgntInfo.MinSpaceCfg); ++#endif ++} ++ ++ ++ static VOID ++_InitBeaconParameters( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ rtw_write16(Adapter, REG_BCN_CTRL, 0x1010); ++ ++ // TODO: Remove these magic number ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT,0x6404);// ms ++ rtw_write8(Adapter, REG_DRVERLYINT, DRIVER_EARLY_INT_TIME);// 5ms ++ rtw_write8(Adapter, REG_BCNDMATIM, BCN_DMA_ATIME_INT_TIME); // 2ms ++ ++ // Suggested by designer timchen. Change beacon AIFS to the largest number ++ // beacause test chip does not contension before sending beacon. by tynli. 2009.11.03 ++ if(IS_NORMAL_CHIP( pHalData->VersionID)){ ++ rtw_write16(Adapter, REG_BCNTCFG, 0x660F); ++ } ++ else{ ++ rtw_write16(Adapter, REG_BCNTCFG, 0x66FF); ++ } ++ ++} ++ ++static VOID ++_InitRFType( ++ IN PADAPTER Adapter ++ ) ++{ ++ struct registry_priv *pregpriv = &Adapter->registrypriv; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN is92CU = IS_92C_SERIAL(pHalData->VersionID); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++ return; ++#endif ++ ++ pHalData->rf_chip = RF_6052; ++ ++ if(_FALSE == is92CU){ ++ pHalData->rf_type = RF_1T1R; ++ DBG_8192C("Set RF Chip ID to RF_6052 and RF type to 1T1R.\n"); ++ return; ++ } ++ ++ // TODO: Consider that EEPROM set 92CU to 1T1R later. ++ // Force to overwrite setting according to chip version. Ignore EEPROM setting. ++ //pHalData->RF_Type = is92CU ? RF_2T2R : RF_1T1R; ++ MSG_8192C("Set RF Chip ID to RF_6052 and RF type to %d.\n", pHalData->rf_type); ++ ++} ++ ++static VOID _InitAdhocWorkaroundParams(IN PADAPTER Adapter) ++{ ++#if RTL8192CU_ADHOC_WORKAROUND_SETTING ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ pHalData->RegBcnCtrlVal = rtw_read8(Adapter, REG_BCN_CTRL); ++ pHalData->RegTxPause = rtw_read8(Adapter, REG_TXPAUSE); ++ pHalData->RegFwHwTxQCtrl = rtw_read8(Adapter, REG_FWHW_TXQ_CTRL+2); ++ pHalData->RegReg542 = rtw_read8(Adapter, REG_TBTT_PROHIBIT+2); ++#endif ++} ++ ++static VOID ++_BeaconFunctionEnable( ++ IN PADAPTER Adapter, ++ IN BOOLEAN Enable, ++ IN BOOLEAN Linked ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 value8 = 0; ++ ++ //value8 = Enable ? (EN_BCN_FUNCTION | EN_TXBCN_RPT) : EN_BCN_FUNCTION; ++ ++ if(_FALSE == Linked){ ++ if(IS_NORMAL_CHIP( pHalData->VersionID)){ ++ value8 |= DIS_TSF_UDT0_NORMAL_CHIP; ++ } ++ else{ ++ value8 |= DIS_TSF_UDT0_TEST_CHIP; ++ } ++ } ++ ++ rtw_write8(Adapter, REG_BCN_CTRL, value8); ++#else ++ rtw_write8(Adapter, REG_BCN_CTRL, (BIT4 | BIT3 | BIT1)); ++ //SetBcnCtrlReg(Adapter, (BIT4 | BIT3 | BIT1), 0x00); ++ //RT_TRACE(COMP_BEACON, DBG_LOUD, ("_BeaconFunctionEnable 0x550 0x%x\n", PlatformEFIORead1Byte(Adapter, 0x550))); ++ ++ rtw_write8(Adapter, REG_RD_CTRL+1, 0x6F); ++#endif ++} ++ ++ ++// Set CCK and OFDM Block "ON" ++static VOID _BBTurnOnBlock( ++ IN PADAPTER Adapter ++ ) ++{ ++#if (DISABLE_BB_RF) ++ return; ++#endif ++ ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bCCKEn, 0x1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, bOFDMEn, 0x1); ++} ++ ++static VOID _RfPowerSave( ++ IN PADAPTER Adapter ++ ) ++{ ++#if 0 ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ u1Byte eRFPath; ++ ++#if (DISABLE_BB_RF) ++ return; ++#endif ++ ++ if(pMgntInfo->RegRfOff == TRUE){ // User disable RF via registry. ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RegRfOff.\n")); ++ MgntActSet_RF_State(Adapter, eRfOff, RF_CHANGE_BY_SW); ++ // Those action will be discard in MgntActSet_RF_State because off the same state ++ for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); ++ } ++ else if(pMgntInfo->RfOffReason > RF_CHANGE_BY_PS){ // H/W or S/W RF OFF before sleep. ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): Turn off RF for RfOffReason(%ld).\n", pMgntInfo->RfOffReason)); ++ MgntActSet_RF_State(Adapter, eRfOff, pMgntInfo->RfOffReason); ++ } ++ else{ ++ pHalData->eRFPowerState = eRfOn; ++ pMgntInfo->RfOffReason = 0; ++ if(Adapter->bInSetPower || Adapter->bResetInProgress) ++ PlatformUsbEnableInPipes(Adapter); ++ RT_TRACE((COMP_INIT|COMP_RF), DBG_LOUD, ("InitializeAdapter8192CUsb(): RF is on.\n")); ++ } ++#endif ++} ++ ++enum { ++ Antenna_Lfet = 1, ++ Antenna_Right = 2, ++}; ++ ++static VOID ++_InitAntenna_Selection(IN PADAPTER Adapter) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pHalData->AntDivCfg==0) ++ return; ++ DBG_8192C("==> %s ....\n",__FUNCTION__); ++ ++ if((RF_1T1R == pHalData->rf_type)) ++ { ++ rtw_write32(Adapter, REG_LEDCFG0, rtw_read32(Adapter, REG_LEDCFG0)|BIT23); ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, BIT13, 0x01); ++ ++ if(PHY_QueryBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300) == Antenna_A) ++ pHalData->CurAntenna = Antenna_A; ++ else ++ pHalData->CurAntenna = Antenna_B; ++ DBG_8192C("%s,Cur_ant:(%x)%s\n",__FUNCTION__,pHalData->CurAntenna,(pHalData->CurAntenna == Antenna_A)?"Antenna_A":"Antenna_B"); ++ ++} ++ ++ ++} ++// ++// 2010/08/09 MH Add for power down check. ++// ++static BOOLEAN ++HalDetectPwrDownMode( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 tmpvalue; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; ++ ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_RF_OPT3, (u32 *)&tmpvalue); ++ ++ // 2010/08/25 MH INF priority > PDN Efuse value. ++ if(tmpvalue & BIT4 && pwrctrlpriv->reg_pdnmode) ++ { ++ pHalData->pwrdown = _TRUE; ++ } ++ else ++ { ++ pHalData->pwrdown = _FALSE; ++ } ++ ++ DBG_8192C("HalDetectPwrDownMode(): PDN=%d\n", pHalData->pwrdown); ++ return pHalData->pwrdown; ++ ++} // HalDetectPwrDownMode ++ ++ ++// ++// 2010/08/26 MH Add for selective suspend mode check. ++// If Efuse 0x0e bit1 is not enabled, we can not support selective suspend for Minicard and ++// slim card. ++// ++static VOID ++HalDetectSelectiveSuspendMode( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 tmpvalue; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dvobj_priv *pdvobjpriv = &Adapter->dvobjpriv; ++ ++ // If support HW radio detect, we need to enable WOL ability, otherwise, we ++ // can not use FW to notify host the power state switch. ++ ++ EFUSE_ShadowRead(Adapter, 1, EEPROM_USB_OPTIONAL1, (u32 *)&tmpvalue); ++ ++ DBG_8192C("HalDetectSelectiveSuspendMode(): SS "); ++ if(tmpvalue & BIT1) ++ { ++ DBG_8192C("Enable\n"); ++ } ++ else ++ { ++ DBG_8192C("Disable\n"); ++ pdvobjpriv->RegUsbSS = _FALSE; ++ } ++ ++ // 2010/09/01 MH According to Dongle Selective Suspend INF. We can switch SS mode. ++ if (pdvobjpriv->RegUsbSS && !SUPPORT_HW_RADIO_DETECT(pHalData)) ++ { ++ //PMGNT_INFO pMgntInfo = &(Adapter->MgntInfo); ++ ++ //if (!pMgntInfo->bRegDongleSS) ++ //{ ++ // RT_TRACE(COMP_INIT, DBG_LOUD, ("Dongle disable SS\n")); ++ pdvobjpriv->RegUsbSS = _FALSE; ++ //} ++ } ++} // HalDetectSelectiveSuspendMode ++/*----------------------------------------------------------------------------- ++ * Function: HwSuspendModeEnable92Cu() ++ * ++ * Overview: HW suspend mode switch. ++ * ++ * Input: NONE ++ * ++ * Output: NONE ++ * ++ * Return: NONE ++ * ++ * Revised History: ++ * When Who Remark ++ * 08/23/2010 MHC HW suspend mode switch test.. ++ *---------------------------------------------------------------------------*/ ++static VOID ++HwSuspendModeEnable92Cu( ++ IN PADAPTER pAdapter, ++ IN u8 Type ++ ) ++{ ++ //PRT_USB_DEVICE pDevice = GET_RT_USB_DEVICE(pAdapter); ++ u16 reg = rtw_read16(pAdapter, REG_GPIO_MUXCFG); ++ ++ //if (!pDevice->RegUsbSS) ++ { ++ return; ++ } ++ ++ // ++ // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW ++ // to enter suspend mode automatically. Otherwise, it will shut down major power ++ // domain and 8051 will stop. When we try to enter selective suspend mode, we ++ // need to prevent HW to enter D2 mode aumotmatically. Another way, Host will ++ // issue a S10 signal to power domain. Then it will cleat SIC setting(from Yngli). ++ // We need to enable HW suspend mode when enter S3/S4 or disable. We need ++ // to disable HW suspend mode for IPS/radio_off. ++ // ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("HwSuspendModeEnable92Cu = %d\n", Type)); ++ if (Type == _FALSE) ++ { ++ reg |= BIT14; ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ reg |= BIT12; ++ //RT_TRACE(COMP_RF, DBG_LOUD, ("REG_GPIO_MUXCFG = %x\n", reg)); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ } ++ else ++ { ++ reg &= (~BIT12); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ reg &= (~BIT14); ++ rtw_write16(pAdapter, REG_GPIO_MUXCFG, reg); ++ } ++ ++} // HwSuspendModeEnable92Cu ++rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u8 val8; ++ rt_rf_power_state rfpowerstate = rf_off; ++ ++ if(pAdapter->pwrctrlpriv.bHWPowerdown) ++ { ++ val8 = rtw_read8(pAdapter, REG_HSISR); ++ DBG_8192C("pwrdown, 0x5c(BIT7)=%02x\n", val8); ++ rfpowerstate = (val8 & BIT7) ? rf_off: rf_on; ++ } ++ else // rf on/off ++ { ++ rtw_write8( pAdapter, REG_MAC_PINMUX_CFG,rtw_read8(pAdapter, REG_MAC_PINMUX_CFG)&~(BIT3)); ++ val8 = rtw_read8(pAdapter, REG_GPIO_IO_SEL); ++ DBG_8192C("GPIO_IN=%02x\n", val8); ++ rfpowerstate = (val8 & BIT3) ? rf_on : rf_off; ++ } ++ return rfpowerstate; ++} // HalDetectPwrDownMode ++ ++void _ps_open_RF(_adapter *padapter); ++ ++ ++u32 rtl8192cu_hal_init(PADAPTER Adapter) ++{ ++ u8 val8 = 0; ++ u32 boundary, status = _SUCCESS; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct pwrctrl_priv *pwrctrlpriv = &Adapter->pwrctrlpriv; ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u8 isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ u8 is92C = IS_92C_SERIAL(pHalData->VersionID); ++ rt_rf_power_state eRfPowerStateToSet; ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ u32 init_start_time = rtw_get_current_time(); ++ ++ ++#ifdef DBG_HAL_INIT_PROFILING ++ ++ enum HAL_INIT_STAGES { ++ HAL_INIT_STAGES_BEGIN = 0, ++ HAL_INIT_STAGES_INIT_PW_ON, ++ HAL_INIT_STAGES_MISC01, ++ HAL_INIT_STAGES_DOWNLOAD_FW, ++ HAL_INIT_STAGES_INIT_LLTT, ++ HAL_INIT_STAGES_MAC, ++ HAL_INIT_STAGES_MISC02, ++ HAL_INIT_STAGES_BB, ++ HAL_INIT_STAGES_RF, ++ HAL_INIT_STAGES_TURN_ON_BLOCK, ++ HAL_INIT_STAGES_INIT_SECURITY, ++ HAL_INIT_STAGES_MISC11, ++ //HAL_INIT_STAGES_RF_PS, ++ HAL_INIT_STAGES_IQK, ++ HAL_INIT_STAGES_PW_TRACK, ++ HAL_INIT_STAGES_LCK, ++ HAL_INIT_STAGES_MISC21, ++ HAL_INIT_STAGES_INIT_PABIAS, ++ HAL_INIT_STAGES_BT_COEXIST, ++ //HAL_INIT_STAGES_ANTENNA_SEL, ++ HAL_INIT_STAGES_INIT_HAL_DM, ++ HAL_INIT_STAGES_MISC31, ++ HAL_INIT_STAGES_END, ++ HAL_INIT_STAGES_NUM ++ }; ++ ++ char * hal_init_stages_str[] = { ++ "HAL_INIT_STAGES_BEGIN", ++ "HAL_INIT_STAGES_INIT_PW_ON", ++ "HAL_INIT_STAGES_MISC01", ++ "HAL_INIT_STAGES_DOWNLOAD_FW", ++ "HAL_INIT_STAGES_INIT_LLTT", ++ "HAL_INIT_STAGES_MAC", ++ "HAL_INIT_STAGES_MISC02", ++ "HAL_INIT_STAGES_BB", ++ "HAL_INIT_STAGES_RF", ++ "HAL_INIT_STAGES_TURN_ON_BLOCK", ++ "HAL_INIT_STAGES_INIT_SECURITY", ++ "HAL_INIT_STAGES_MISC11", ++ //"HAL_INIT_STAGES_RF_PS", ++ "HAL_INIT_STAGES_IQK", ++ "HAL_INIT_STAGES_PW_TRACK", ++ "HAL_INIT_STAGES_LCK", ++ "HAL_INIT_STAGES_MISC21", ++ "HAL_INIT_STAGES_INIT_PABIAS", ++ "HAL_INIT_STAGES_BT_COEXIST", ++ //"HAL_INIT_STAGES_ANTENNA_SEL", ++ "HAL_INIT_STAGES_INIT_HAL_DM", ++ "HAL_INIT_STAGES_MISC31", ++ "HAL_INIT_STAGES_END", ++ }; ++ ++ int hal_init_profiling_i; ++ u32 hal_init_stages_timestamp[HAL_INIT_STAGES_NUM]; //used to record the time of each stage's starting point ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_ipwrctrlpriv.bkeepfwalive) ++ { ++ _ps_open_RF(Adapter); ++ ++ if(pHalData->bIQKInitialized ){ ++ rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); ++ } ++ else{ ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ pHalData->bIQKInitialized = _TRUE; ++ } ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ ++ goto exit; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PW_ON); ++ status = _InitPowerOn(Adapter); ++ if(status == _FAIL){ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init power on!\n")); ++ goto exit; ++ } ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC01); ++ _InitQueueReservedPage(Adapter); ++ _InitTxBufferBoundary(Adapter); ++ _InitQueuePriority(Adapter); ++ _InitPageBoundary(Adapter); ++ _InitTransferPageSize(Adapter); ++ ++ ++#if ENABLE_USB_DROP_INCORRECT_OUT ++ _InitHardwareDropIncorrectBulkOut(Adapter); ++#endif ++ ++ if(pHalData->bRDGEnable){ ++ _InitRDGSetting(Adapter); ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_DOWNLOAD_FW); ++#if (1 == MP_DRIVER) ++ _InitRxSetting(Adapter); ++ // Don't Download Firmware ++ Adapter->bFWReady = _FALSE; ++#elif RTL8192CU_FW_DOWNLOAD_ENABLE ++ status = FirmwareDownload92C(Adapter,_FALSE); ++ if(status != _SUCCESS) ++ { ++ Adapter->bFWReady = _FALSE; ++ pHalData->fw_ractrl = _FALSE; ++ DBG_8192C("fw download fail!\n"); ++ goto exit; ++ } ++ else ++ { ++ Adapter->bFWReady = _TRUE; ++ pHalData->fw_ractrl = _TRUE; ++ DBG_8192C("fw download ok!\n"); ++ } ++#endif ++ ++ InitializeFirmwareVars92C(Adapter); ++ ++ if(pwrctrlpriv->reg_rfoff == _TRUE){ ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ } ++ ++ // 2010/08/09 MH We need to check if we need to turnon or off RF after detecting ++ // HW GPIO pin. Before PHY_RFConfig8192C. ++ //HalDetectPwrDownMode(Adapter); ++ // 2010/08/26 MH If Efuse does not support sective suspend then disable the function. ++ //HalDetectSelectiveSuspendMode(Adapter); ++ ++ ++ // Set RF type for BB/RF configuration ++ _InitRFType(Adapter);//->_ReadRFType() ++ ++ // Save target channel ++ // Current Channel will be updated again later. ++ pHalData->CurrentChannel = 6;//default set to 6 ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_LLTT); ++ if(!pregistrypriv->wifi_spec){ ++ boundary = TX_PAGE_BOUNDARY; ++ } ++ else{// for WMM ++ boundary = (IS_NORMAL_CHIP(pHalData->VersionID)) ?WMM_NORMAL_TX_PAGE_BOUNDARY ++ :WMM_TEST_TX_PAGE_BOUNDARY; ++ } ++ status = InitLLTTable(Adapter, boundary); ++ if(status == _FAIL){ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_err_, ("Failed to init LLT table\n")); ++ goto exit; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MAC); ++#if (HAL_MAC_ENABLE == 1) ++ status = PHY_MACConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC02); ++ // Get Rx PHY status in order to report RSSI and others. ++ _InitDriverInfoSize(Adapter, DRVINFO_SZ); ++ ++ _InitInterrupt(Adapter); ++ _InitID(Adapter);//set mac_address ++ _InitNetworkType(Adapter);//set msr ++ _InitWMACSetting(Adapter); ++ _InitAdaptiveCtrl(Adapter); ++ _InitEDCA(Adapter); ++ _InitRateFallback(Adapter); ++ _InitRetryFunction(Adapter); ++ InitUsbAggregationSetting(Adapter); ++ _InitOperationMode(Adapter);//todo ++ _InitBeaconParameters(Adapter); ++ _InitBeaconMaxError(Adapter, _TRUE); ++ ++#if defined(CONFIG_CONCURRENT_MODE) || defined(CONFIG_TX_MCAST2UNI) ++ ++#ifdef CONFIG_CHECK_AC_LIFETIME ++ // Enable lifetime check for the four ACs ++ rtw_write8(Adapter, REG_LIFETIME_EN, 0x0F); ++#endif // CONFIG_CHECK_AC_LIFETIME ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++ rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x0400); // unit: 256us. 256ms ++#else // CONFIG_TX_MCAST2UNI ++ rtw_write16(Adapter, REG_PKT_VO_VI_LIFE_TIME, 0x3000); // unit: 256us. 3s ++ rtw_write16(Adapter, REG_PKT_BE_BK_LIFE_TIME, 0x3000); // unit: 256us. 3s ++#endif // CONFIG_TX_MCAST2UNI ++#endif // CONFIG_CONCURRENT_MODE || CONFIG_TX_MCAST2UNI ++ ++ ++#ifdef CONFIG_LED ++ _InitHWLed(Adapter); ++#endif //CONFIG_LED ++ ++ // ++ //d. Initialize BB related configurations. ++ // ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BB); ++#if (HAL_BB_ENABLE == 1) ++ status = PHY_BBConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++#endif ++ ++ // 92CU use 3-wire to r/w RF ++ //pHalData->Rf_Mode = RF_OP_By_SW_3wire; ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_RF); ++#if (HAL_RF_ENABLE == 1) ++ status = PHY_RFConfig8192C(Adapter); ++ if(status == _FAIL) ++ { ++ goto exit; ++ } ++ ++ if(IS_VENDOR_UMC_A_CUT(pHalData->VersionID) && !IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ PHY_SetRFReg(Adapter, RF90_PATH_A, RF_RX_G1, bMaskDWord, 0x30255); ++ PHY_SetRFReg(Adapter, RF90_PATH_A, RF_RX_G2, bMaskDWord, 0x50a00); ++ } ++#endif ++ ++ // ++ // Joseph Note: Keep RfRegChnlVal for later use. ++ // ++ pHalData->RfRegChnlVal[0] = PHY_QueryRFReg(Adapter, (RF90_RADIO_PATH_E)0, RF_CHNLBW, bRFRegOffsetMask); ++ pHalData->RfRegChnlVal[1] = PHY_QueryRFReg(Adapter, (RF90_RADIO_PATH_E)1, RF_CHNLBW, bRFRegOffsetMask); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_TURN_ON_BLOCK); ++ _BBTurnOnBlock(Adapter); ++ //NicIFSetMacAddress(padapter, padapter->PermanentAddress); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_SECURITY); ++ invalidate_cam_all(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC11); ++ // 2010/12/17 MH We need to set TX power according to EFUSE content at first. ++ PHY_SetTxPowerLevel8192C(Adapter, pHalData->CurrentChannel); ++ ++// Move by Neo for USB SS to below setp ++//_RfPowerSave(Adapter); ++ ++ if (!IS_92C_SERIAL( pHalData->VersionID) && (pHalData->AntDivCfg!=0)) ++ { //for 88CU ,1T1R ++ _InitAntenna_Selection(Adapter); ++ } ++ ++ ++ // ++ // Disable BAR, suggested by Scott ++ // 2010.04.09 add by hpfan ++ // ++ rtw_write32(Adapter, REG_BAR_MODE_CTRL, 0x0201ffff); ++ ++ // HW SEQ CTRL ++ //set 0x0 to 0xFF by tynli. Default enable HW SEQ NUM. ++ rtw_write8(Adapter,REG_HWSEQ_CTRL, 0xFF); ++ ++ if(pregistrypriv->wifi_spec) ++ rtw_write16(Adapter,REG_FAST_EDCA_CTRL ,0); ++ ++ //Nav limit , suggest by scott ++ rtw_write8(Adapter, 0x652, 0x0); ++ ++#if (MP_DRIVER == 1) ++ Adapter->mppriv.channel = pHalData->CurrentChannel; ++ MPT_InitializeAdapter(Adapter, Adapter->mppriv.channel); ++#else ++ // ++ // 2010/08/11 MH Merge from 8192SE for Minicard init. We need to confirm current radio status ++ // and then decide to enable RF or not.!!!??? For Selective suspend mode. We may not ++ // call init_adapter. May cause some problem?? ++ // ++ // Fix the bug that Hw/Sw radio off before S3/S4, the RF off action will not be executed ++ // in MgntActSet_RF_State() after wake up, because the value of pHalData->eRFPowerState ++ // is the same as eRfOff, we should change it to eRfOn after we config RF parameters. ++ // Added by tynli. 2010.03.30. ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ ++#if 0 //to do ++ RT_CLEAR_PS_LEVEL(pwrctrlpriv, RT_RF_OFF_LEVL_HALT_NIC); ++#if 1 //Todo ++ // 20100326 Joseph: Copy from GPIOChangeRFWorkItemCallBack() function to check HW radio on/off. ++ // 20100329 Joseph: Revise and integrate the HW/SW radio off code in initialization. ++ ++ eRfPowerStateToSet = (rt_rf_power_state) RfOnOffDetect(Adapter); ++ pwrctrlpriv->rfoff_reason |= eRfPowerStateToSet==rf_on ? RF_CHANGE_BY_INIT : RF_CHANGE_BY_HW; ++ pwrctrlpriv->rfoff_reason |= (pwrctrlpriv->reg_rfoff) ? RF_CHANGE_BY_SW : 0; ++ ++ if(pwrctrlpriv->rfoff_reason&RF_CHANGE_BY_HW) ++ pwrctrlpriv->b_hw_radio_off = _TRUE; ++ ++ DBG_8192C("eRfPowerStateToSet=%d\n", eRfPowerStateToSet); ++ ++ if(pwrctrlpriv->reg_rfoff == _TRUE) ++ { // User disable RF via registry. ++ DBG_8192C("InitializeAdapter8192CU(): Turn off RF for RegRfOff.\n"); ++ //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_SW, _TRUE); ++ ++ // Those action will be discard in MgntActSet_RF_State because off the same state ++ //for(eRFPath = 0; eRFPath NumTotalRFPath; eRFPath++) ++ //PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); ++ } ++ else if(pwrctrlpriv->rfoff_reason > RF_CHANGE_BY_PS) ++ { // H/W or S/W RF OFF before sleep. ++ DBG_8192C(" Turn off RF for RfOffReason(%x) ----------\n", pwrctrlpriv->rfoff_reason); ++ //pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ //MgntActSet_RF_State(Adapter, rf_off, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ else ++ { ++ // Perform GPIO polling to find out current RF state. added by Roger, 2010.04.09. ++ if(pHalData->BoardType == BOARD_MINICARD /*&& (Adapter->MgntInfo.PowerSaveControl.bGpioRfSw)*/) ++ { ++ DBG_8192C("InitializeAdapter8192CU(): RF=%d \n", eRfPowerStateToSet); ++ if (eRfPowerStateToSet == rf_off) ++ { ++ //MgntActSet_RF_State(Adapter, rf_off, RF_CHANGE_BY_HW, _TRUE); ++ pwrctrlpriv->b_hw_radio_off = _TRUE; ++ } ++ else ++ { ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ pwrctrlpriv->b_hw_radio_off = _FALSE; ++ //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ } ++ else ++ { ++ pwrctrlpriv->rf_pwrstate = rf_off; ++ pwrctrlpriv->rfoff_reason = RF_CHANGE_BY_INIT; ++ //MgntActSet_RF_State(Adapter, rf_on, pwrctrlpriv->rfoff_reason, _TRUE); ++ } ++ ++ pwrctrlpriv->rfoff_reason = 0; ++ pwrctrlpriv->b_hw_radio_off = _FALSE; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ rtw_led_control(Adapter, LED_CTL_POWER_ON); ++ ++ } ++ ++ // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. ++ // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. ++ if(pHalData->pwrdown && eRfPowerStateToSet == rf_off) ++ { ++ // Enable register area 0x0-0xc. ++ rtw_write8(Adapter, REG_RSV_CTRL, 0x0); ++ ++ // ++ // We should configure HW PDn source for WiFi ONLY, and then ++ // our HW will be set in power-down mode if PDn source from all functions are configured. ++ // 2010.10.06. ++ // ++ //if(IS_HARDWARE_TYPE_8723U(Adapter)) ++ //{ ++ // u1bTmp = rtw_read8(Adapter, REG_MULTI_FUNC_CTRL); ++ // rtw_write8(Adapter, REG_MULTI_FUNC_CTRL, (u1bTmp|WL_HWPDN_EN)); ++ //} ++ //else ++ //{ ++ rtw_write16(Adapter, REG_APS_FSMCO, 0x8812); ++ //} ++ } ++ //DrvIFIndicateCurrentPhyStatus(Adapter); // 2010/08/17 MH Disable to prevent BSOD. ++#endif ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_IQK); ++ // 2010/08/26 MH Merge from 8192CE. ++ if(pwrctrlpriv->rf_pwrstate == rf_on) ++ { ++ if(pHalData->bIQKInitialized ){ ++ rtl8192c_PHY_IQCalibrate(Adapter,_TRUE); ++ } ++ else ++ { ++ rtl8192c_PHY_IQCalibrate(Adapter,_FALSE); ++ pHalData->bIQKInitialized = _TRUE; ++ } ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_PW_TRACK); ++ rtl8192c_dm_CheckTXPowerTracking(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_LCK); ++ rtl8192c_PHY_LCCalibrate(Adapter); ++ } ++#endif /* #if (MP_DRIVER == 1) */ ++ ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC21); ++#if RTL8192CU_ADHOC_WORKAROUND_SETTING ++ _InitAdhocWorkaroundParams(Adapter); ++#endif ++ ++ ++#ifdef USB_INTERFERENCE_ISSUE ++ //fixed USB interface interference issue ++ rtw_write8(Adapter, 0xfe40, 0xe0); ++ rtw_write8(Adapter, 0xfe41, 0x8d); ++ rtw_write8(Adapter, 0xfe42, 0x80); ++ rtw_write32(Adapter,0x20c,0xfd0320); ++#if 1 ++ //2011/01/07 ,suggest by Johnny,for solved the problem that too many protocol error on USB bus ++ if(!IS_VENDOR_UMC_A_CUT(pHalData->VersionID) )//&& !IS_92C_SERIAL(pHalData->VersionID))// TSMC , 8188 ++ { ++ // 0xE6=0x94 ++ rtw_write8(Adapter, 0xFE40, 0xE6); ++ rtw_write8(Adapter, 0xFE41, 0x94); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE0=0x19 ++ rtw_write8(Adapter, 0xFE40, 0xE0); ++ rtw_write8(Adapter, 0xFE41, 0x19); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE5=0x91 ++ rtw_write8(Adapter, 0xFE40, 0xE5); ++ rtw_write8(Adapter, 0xFE41, 0x91); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ // 0xE2=0x81 ++ rtw_write8(Adapter, 0xFE40, 0xE2); ++ rtw_write8(Adapter, 0xFE41, 0x81); ++ rtw_write8(Adapter, 0xFE42, 0x80); ++ ++ } ++ ++#endif ++#endif //USB_INTERFERENCE_ISSUE ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_PABIAS); ++ _InitPABias(Adapter); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_BT_COEXIST); ++#ifdef CONFIG_BT_COEXIST ++ _InitBTCoexist(Adapter); ++#endif ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_INIT_HAL_DM); ++ rtl8192c_InitHalDm(Adapter); ++ ++ // 2010/08/23 MH According to Alfred's suggestion, we need to to prevent HW enter ++ // suspend mode automatically. ++ //HwSuspendModeEnable92Cu(Adapter, _FALSE); ++ ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_MISC31); ++ rtw_write8(Adapter, 0x15, 0xe9);//suggest by Johnny for lower temperature ++ //_dbg_dump_macreg(padapter); ++ ++ //misc ++ { ++ int i; ++ u8 mac_addr[6]; ++ for(i=0; i<6; i++) ++ { ++ mac_addr[i] = rtw_read8(Adapter, REG_MACID+i); ++ } ++ ++ DBG_8192C("MAC Address from REG_MACID = "MAC_FMT"\n", MAC_ARG(mac_addr)); ++ } ++ ++#ifdef CONFIG_ENABLE_NOTCH_FILTER ++ rtw_write8(Adapter, 0xc41, 0x42); ++#endif ++exit: ++HAL_INIT_PROFILE_TAG(HAL_INIT_STAGES_END); ++ ++ DBG_871X("%s in %dms\n", __FUNCTION__, rtw_get_passing_time_ms(init_start_time)); ++ ++ #ifdef DBG_HAL_INIT_PROFILING ++ hal_init_stages_timestamp[HAL_INIT_STAGES_END]=rtw_get_current_time(); ++ ++ for(hal_init_profiling_i=0;hal_init_profiling_irf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); ++ else ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); ++ ++ //AFE ++ //DbgPrint("0x0e70 = %x\n", Adapter->PS_BBRegBackup[PSBBREG_AFE0]); ++ //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,Adapter->PS_BBRegBackup[PSBBREG_AFE0] ); ++ //PHY_SetBBReg(Adapter, 0x0e70, bMaskDWord ,0x631B25A0 ); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); ++ ++ // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. ++ // We can only prvide a usual value instead and then HW will modify the value by itself. ++ PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0x32D95); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0x32D95); ++ } ++ } ++ else // Level 2 or others. ++ { ++ //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ PlatformEFIOWrite1Byte(Adapter, REG_AFE_PLL_CTRL, 0x81); ++ ++ // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ PlatformEFIOWrite2Byte(Adapter, REG_AFE_XTAL_CTRL, 0x800F); ++ delay_ms(1); ++ ++ // 1. Enable MAC Clock. Can not be enabled now. ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) | BIT(3)); ++ ++ // 2. Force PWM, Enable SPS18_LDO_Marco_Block ++ PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, ++ PlatformEFIORead1Byte(Adapter, REG_SPS0_CTRL) | (BIT0|BIT3)); ++ ++ // 3. restore BB, AFE control register. ++ //RF ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 1); ++ else ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 1); ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 1); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1, 0); ++ ++ //AFE ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x63DB25A0 ); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x631B25A0 ); ++ ++ // 4. issue 3-wire command that RF set to Rx idle mode. This is used to re-write the RX idle mode. ++ // We can only prvide a usual value instead and then HW will modify the value by itself. ++ PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0x32D95); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0x32D95); ++ } ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ //PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)|(BIT3)); ++ ++ { ++ //u1Byte eRFPath = RF90_PATH_A,value8 = 0, retry = 0; ++ u1Byte bytetmp; ++ //PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ // 2010/08/12 MH Add for B path under SS test. ++ //if (pHalData->RF_Type == RF_2T2R) ++ //PHY_SetRFReg(Adapter, RF90_PATH_B, 0x0, bMaskByte0, 0x0); ++ ++ bytetmp = PlatformEFIORead1Byte(Adapter, REG_APSD_CTRL); ++ PlatformEFIOWrite1Byte(Adapter, REG_APSD_CTRL, bytetmp & ~BIT6); ++ ++ delay_ms(10); ++ ++ // Set BB reset at first ++ PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN, 0x17 );//0x16 ++ ++ // Enable TX ++ PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0x0); ++ } ++ //Adapter->HalFunc.InitializeAdapterHandler(Adapter, Adapter->MgntInfo.dot11CurrentChannelNumber); ++ //CardSelectiveSuspendLeave(Adapter); ++ } ++ ++ break; ++ ++ case rf_sleep: ++ case rf_off: ++ value8 = PlatformEFIORead1Byte(Adapter, REG_SPS0_CTRL) ; ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ value8 &= ~(BIT0); ++ else ++ value8 &= ~(BIT0|BIT3); ++ if (bRegSSPwrLvl == 1) ++ { ++ RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL1\n")); ++ // Disable RF and BB only for SelectSuspend. ++ ++ // 1. Set BB/RF to shutdown. ++ // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving ++ // (2)Reg878[21:19]= 0 //Turn off RF-B ++ // (3) RegC04[7:4]= 0 // turn off all paths for packet detection ++ // (4) Reg800[1] = 1 // enable preamble power saving ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); ++ } ++ else if (pHalData->rf_type == RF_1T1R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); ++ } ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); ++ ++ // 2 .AFE control register to power down. bit[30:22] ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); ++ ++ // 3. issue 3-wire command that RF set to power down. ++ PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0); ++ } ++ ++ // 4. Force PFM , disable SPS18_LDO_Marco_Block ++ PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, value8); ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ } ++ else // Level 2 or others. ++ { ++ RT_TRACE(COMP_POWER, DBG_LOUD, ("SS LVL2\n")); ++ { ++ u1Byte eRFPath = RF90_PATH_A,value8 = 0; ++ PlatformEFIOWrite1Byte(Adapter, REG_TXPAUSE, 0xFF); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ // 2010/08/12 MH Add for B path under SS test. ++ //if (pHalData->RF_Type == RF_2T2R) ++ //PHY_SetRFReg(Adapter, RF90_PATH_B, 0x0, bMaskByte0, 0x0); ++ ++ value8 |= APSDOFF; ++ PlatformEFIOWrite1Byte(Adapter, REG_APSD_CTRL, value8);//0x40 ++ ++ // After switch APSD, we need to delay for stability ++ delay_ms(10); ++ ++ // Set BB reset at first ++ value8 = 0 ; ++ value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); ++ PlatformEFIOWrite1Byte(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 ++ } ++ ++ // Disable RF and BB only for SelectSuspend. ++ ++ // 1. Set BB/RF to shutdown. ++ // (1) Reg878[5:3]= 0 // RF rx_code for preamble power saving ++ // (2)Reg878[21:19]= 0 //Turn off RF-B ++ // (3) RegC04[7:4]= 0 // turn off all paths for packet detection ++ // (4) Reg800[1] = 1 // enable preamble power saving ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF0] = PHY_QueryBBReg(Adapter, rFPGA0_XAB_RFParameter, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF1] = PHY_QueryBBReg(Adapter, rOFDM0_TRxPathEnable, bMaskDWord); ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_RF2] = PHY_QueryBBReg(Adapter, rFPGA0_RFMOD, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x380038, 0); ++ } ++ else if (pHalData->rf_type == RF_1T1R) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XAB_RFParameter, 0x38, 0); ++ } ++ PHY_SetBBReg(Adapter, rOFDM0_TRxPathEnable, 0xf0, 0); ++ PHY_SetBBReg(Adapter, rFPGA0_RFMOD, BIT1,1); ++ ++ // 2 .AFE control register to power down. bit[30:22] ++ Adapter->pwrctrlpriv.PS_BBRegBackup[PSBBREG_AFE0] = PHY_QueryBBReg(Adapter, rRx_Wait_CCA, bMaskDWord); ++ if (pHalData->rf_type == RF_2T2R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x00DB25A0); ++ else if (pHalData->rf_type == RF_1T1R) ++ PHY_SetBBReg(Adapter, rRx_Wait_CCA, bMaskDWord ,0x001B25A0); ++ ++ // 3. issue 3-wire command that RF set to power down. ++ PHY_SetRFReg(Adapter,RF90_PATH_A, 0, bRFRegOffsetMask,0); ++ if (pHalData->rf_type == RF_2T2R) ++ { ++ PHY_SetRFReg(Adapter,RF90_PATH_B, 0, bRFRegOffsetMask,0); ++ } ++ ++ // 4. Force PFM , disable SPS18_LDO_Marco_Block ++ PlatformEFIOWrite1Byte(Adapter, REG_SPS0_CTRL, value8); ++ ++ // 2010/10/13 MH/Isaachsu exchange sequence. ++ //h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ PlatformEFIOWrite1Byte(Adapter, REG_AFE_PLL_CTRL, 0x80); ++ delay_ms(1); ++ ++ // i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ PlatformEFIOWrite2Byte(Adapter, REG_AFE_XTAL_CTRL, 0xA80F); ++ ++ // 5. gated MAC Clock ++ //WriteXBYTE(REG_SYS_CLKR+1, ReadXBYTE(REG_SYS_CLKR+1) & ~(BIT(3))); ++ //PlatformEFIOWrite1Byte(Adapter, REG_SYS_CLKR+1, PlatformEFIORead1Byte(Adapter, REG_SYS_CLKR+1)& ~(BIT3)) ++ ++ //CardSelectiveSuspendEnter(Adapter); ++ } ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++} // phy_PowerSwitch92CU ++ ++void _ps_open_RF(_adapter *padapter) { ++ //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified ++ phy_SsPwrSwitch92CU(padapter, rf_on, 1); ++} ++ ++void _ps_close_RF(_adapter *padapter){ ++ //here call with bRegSSPwrLvl 1, bRegSSPwrLvl 2 needs to be verified ++ phy_SsPwrSwitch92CU(padapter, rf_off, 1); ++} ++#endif //SYNC_SD7_20110802_phy_SsPwrSwitch92CU ++ ++ ++ ++static VOID ++_DisableGPIO( ++ IN PADAPTER Adapter ++ ) ++{ ++/*************************************** ++j. GPIO_PIN_CTRL 0x44[31:0]=0x000 // ++k. Value = GPIO_PIN_CTRL[7:0] ++l. GPIO_PIN_CTRL 0x44[31:0] = 0x00FF0000 | (value <<8); //write external PIN level ++m. GPIO_MUXCFG 0x42 [15:0] = 0x0780 ++n. LEDCFG 0x4C[15:0] = 0x8080 ++***************************************/ ++ u8 value8; ++ u16 value16; ++ u32 value32; ++ ++ //1. Disable GPIO[7:0] ++ rtw_write16(Adapter, REG_GPIO_PIN_CTRL+2, 0x0000); ++ value32 = rtw_read32(Adapter, REG_GPIO_PIN_CTRL) & 0xFFFF00FF; ++ value8 = (u8) (value32&0x000000FF); ++ value32 |= ((value8<<8) | 0x00FF0000); ++ rtw_write32(Adapter, REG_GPIO_PIN_CTRL, value32); ++ ++ //2. Disable GPIO[10:8] ++ rtw_write8(Adapter, REG_GPIO_MUXCFG+3, 0x00); ++ value16 = rtw_read16(Adapter, REG_GPIO_MUXCFG+2) & 0xFF0F; ++ value8 = (u8) (value16&0x000F); ++ value16 |= ((value8<<4) | 0x0780); ++ rtw_write16(Adapter, REG_GPIO_MUXCFG+2, value16); ++ ++ //3. Disable LED0 & 1 ++ rtw_write16(Adapter, REG_LEDCFG0, 0x8080); ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable GPIO and LED.\n")); ++ ++} //end of _DisableGPIO() ++ ++static VOID ++_ResetFWDownloadRegister( ++ IN PADAPTER Adapter ++ ) ++{ ++ u8 value8; ++ ++ value8 = rtw_read8(Adapter, REG_MCUFWDL); ++ value8 &= ~(MCUFWDL_EN | MCUFWDL_RDY); ++ rtw_write8(Adapter, REG_MCUFWDL, value8); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset FW download register.\n")); ++} ++ ++ ++static int ++_DisableRF_AFE( ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ u32 pollingCount = 0; ++ u8 value8; ++ ++ //disable RF/ AFE AD/DA ++ value8 = APSDOFF; ++ rtw_write8(Adapter, REG_APSD_CTRL, value8); ++ ++ ++#if (RTL8192CU_ASIC_VERIFICATION) ++ ++ do ++ { ++ if(rtw_read8(Adapter, REG_APSD_CTRL) & APSDOFF_STATUS){ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE, AD, DA Done!\n")); ++ break; ++ } ++ ++ if(pollingCount++ > POLLING_READY_TIMEOUT_COUNT){ ++ //RT_TRACE(COMP_INIT, DBG_SERIOUS, ("Failed to polling APSDOFF_STATUS done!\n")); ++ return _FAIL; ++ } ++ ++ }while(_TRUE); ++ ++#endif ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable RF, AFE,AD, DA.\n")); ++ return rtStatus; ++ ++} ++ ++static VOID ++_ResetBB( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ ++ //reset BB ++ value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ value16 &= ~(FEN_BBRSTB | FEN_BB_GLB_RSTn); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset BB.\n")); ++} ++ ++static VOID ++_ResetMCU( ++ IN PADAPTER Adapter ++ ) ++{ ++ u16 value16; ++ ++ // reset MCU ++ value16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ value16 &= ~FEN_CPUEN; ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, value16); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Reset MCU.\n")); ++} ++ ++static VOID ++_DisableMAC_AFE_PLL( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ //disable MAC/ AFE PLL ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ value32 |= APDM_MAC; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++ value32 |= APFM_OFF; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Disable MAC, AFE PLL.\n")); ++} ++ ++static VOID ++_AutoPowerDownToHostOff( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ rtw_write8(Adapter, REG_SPS0_CTRL, 0x22); ++ ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ ++ value32 |= APDM_HOST;//card disable ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Auto Power Down to Host-off state.\n")); ++ ++ // set USB suspend ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ value32 &= ~AFSM_PCIE; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++} ++ ++static VOID ++_SetUsbSuspend( ++ IN PADAPTER Adapter ++ ) ++{ ++ u32 value32; ++ ++ value32 = rtw_read32(Adapter, REG_APS_FSMCO); ++ ++ // set USB suspend ++ value32 |= AFSM_HSUS; ++ rtw_write32(Adapter, REG_APS_FSMCO, value32); ++ ++ //RT_ASSERT(0 == (rtw_read32(Adapter, REG_APS_FSMCO) & BIT(12)),("")); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Set USB suspend.\n")); ++ ++} ++ ++static VOID ++_DisableRFAFEAndResetBB( ++ IN PADAPTER Adapter ++ ) ++{ ++/************************************** ++a. TXPAUSE 0x522[7:0] = 0xFF //Pause MAC TX queue ++b. RF path 0 offset 0x00 = 0x00 // disable RF ++c. APSD_CTRL 0x600[7:0] = 0x40 ++d. SYS_FUNC_EN 0x02[7:0] = 0x16 //reset BB state machine ++e. SYS_FUNC_EN 0x02[7:0] = 0x14 //reset BB state machine ++***************************************/ ++ u8 eRFPath = 0,value8 = 0; ++ rtw_write8(Adapter, REG_TXPAUSE, 0xFF); ++ PHY_SetRFReg(Adapter, (RF90_RADIO_PATH_E)eRFPath, 0x0, bMaskByte0, 0x0); ++ ++ value8 |= APSDOFF; ++ rtw_write8(Adapter, REG_APSD_CTRL, value8);//0x40 ++ ++ value8 = 0 ; ++ value8 |=( FEN_USBD | FEN_USBA | FEN_BB_GLB_RSTn); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN,value8 );//0x16 ++ ++ value8 &=( ~FEN_BB_GLB_RSTn ); ++ rtw_write8(Adapter, REG_SYS_FUNC_EN, value8); //0x14 ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> RF off and reset BB.\n")); ++} ++ ++static VOID ++_ResetDigitalProcedure1( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bWithoutHWSM ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(pHalData->FirmwareVersion <= 0x20){ ++ #if 0 ++ /***************************** ++ f. SYS_FUNC_EN 0x03[7:0]=0x54 // reset MAC register, DCORE ++ g. MCUFWDL 0x80[7:0]=0 // reset MCU ready status ++ ******************************/ ++ u4Byte value32 = 0; ++ PlatformIOWrite1Byte(Adapter, REG_SYS_FUNC_EN+1, 0x54); ++ PlatformIOWrite1Byte(Adapter, REG_MCUFWDL, 0); ++ #else ++ /***************************** ++ f. MCUFWDL 0x80[7:0]=0 // reset MCU ready status ++ g. SYS_FUNC_EN 0x02[10]= 0 // reset MCU register, (8051 reset) ++ h. SYS_FUNC_EN 0x02[15-12]= 5 // reset MAC register, DCORE ++ i. SYS_FUNC_EN 0x02[10]= 1 // enable MCU register, (8051 enable) ++ ******************************/ ++ u16 valu16 = 0; ++ rtw_write8(Adapter, REG_MCUFWDL, 0); ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 & (~FEN_CPUEN)));//reset MCU ,8051 ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN)&0x0FFF; ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 |(FEN_HWPDN|FEN_ELDR)));//reset MAC ++ ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ ++ valu16 = rtw_read16(Adapter, REG_SYS_FUNC_EN); ++ rtw_write16(Adapter, REG_SYS_FUNC_EN, (valu16 | FEN_CPUEN));//enable MCU ,8051 ++ ++ ++ #endif ++ } ++ else{ ++ u8 retry_cnts = 0; ++ ++ if(rtw_read8(Adapter, REG_MCUFWDL) & BIT1) ++ { //IF fw in RAM code, do reset ++ ++ rtw_write8(Adapter, REG_MCUFWDL, 0); ++ if(Adapter->bFWReady){ ++ // 2010/08/25 MH Accordign to RD alfred's suggestion, we need to disable other ++ // HRCV INT to influence 8051 reset. ++ rtw_write8(Adapter, REG_FWIMR, 0x20); ++ ++ rtw_write8(Adapter, REG_HMETFR+3, 0x20);//8051 reset by self ++ ++ while( (retry_cnts++ <100) && (FEN_CPUEN &rtw_read16(Adapter, REG_SYS_FUNC_EN))) ++ { ++ rtw_udelay_os(50);//PlatformStallExecution(50);//us ++ } ++ ++ if(retry_cnts >= 100){ ++ DBG_8192C("%s #####=> 8051 reset failed!.........................\n", __FUNCTION__); ++ // if 8051 reset fail we trigger GPIO 0 for LA ++ //PlatformEFIOWrite4Byte( Adapter, ++ // REG_GPIO_PIN_CTRL, ++ // 0x00010100); ++ // 2010/08/31 MH According to Filen's info, if 8051 reset fail, reset MAC directly. ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x50); //Reset MAC and Enable 8051 ++ rtw_mdelay_os(10); ++ } ++ else { ++ //DBG_871X("%s =====> 8051 reset success (%d) .\n", __FUNCTION__, retry_cnts); ++ } ++ } ++ else { ++ DBG_871X("%s =====> 8051 in RAM but !Adapter->bFWReady\n", __FUNCTION__); ++ } ++ } ++ else{ ++ //DBG_871X("%s =====> 8051 in ROM.\n", __FUNCTION__); ++ } ++ ++ #ifdef DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++ { ++ u8 val; ++ if( (val=rtw_read8(Adapter, REG_MCUFWDL))) ++ DBG_871X("DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE %s:%d REG_MCUFWDL:0x%02x\n", __FUNCTION__, __LINE__, val); ++ } ++ #endif ++ ++ rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x54); //Reset MAC and Enable 8051 ++ } ++ ++ // Clear rpwm value for initial toggle bit trigger. ++ rtw_write8(Adapter, REG_USB_HRPWM, 0x00); ++ ++ if(bWithoutHWSM){ ++ /***************************** ++ Without HW auto state machine ++ g. SYS_CLKR 0x08[15:0] = 0x30A3 //disable MAC clock ++ h. AFE_PLL_CTRL 0x28[7:0] = 0x80 //disable AFE PLL ++ i. AFE_XTAL_CTRL 0x24[15:0] = 0x880F //gated AFE DIG_CLOCK ++ j. SYS_ISO_CTRL 0x00[7:0] = 0xF9 // isolated digital to PON ++ ******************************/ ++ //rtw_write16(Adapter, REG_SYS_CLKR, 0x30A3); ++ rtw_write16(Adapter, REG_SYS_CLKR, 0x70A3);//modify to 0x70A3 by Scott. ++ rtw_write8(Adapter, REG_AFE_PLL_CTRL, 0x80); ++ rtw_write16(Adapter, REG_AFE_XTAL_CTRL, 0x880F); ++ rtw_write8(Adapter, REG_SYS_ISO_CTRL, 0xF9); ++ } ++ else ++ { ++ // Disable all RF/BB power ++ rtw_write8(Adapter, REG_RF_CTRL, 0x00); ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Reset Digital.\n")); ++ ++} ++ ++static VOID ++_ResetDigitalProcedure2( ++ IN PADAPTER Adapter ++) ++{ ++/***************************** ++k. SYS_FUNC_EN 0x03[7:0] = 0x44 // disable ELDR runction ++l. SYS_CLKR 0x08[15:0] = 0x3083 // disable ELDR clock ++m. SYS_ISO_CTRL 0x01[7:0] = 0x83 // isolated ELDR to PON ++******************************/ ++ //rtw_write8(Adapter, REG_SYS_FUNC_EN+1, 0x44);//marked by Scott. ++ //rtw_write16(Adapter, REG_SYS_CLKR, 0x3083); ++ //rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x83); ++ ++ rtw_write16(Adapter, REG_SYS_CLKR, 0x70a3); //modify to 0x70a3 by Scott. ++ rtw_write8(Adapter, REG_SYS_ISO_CTRL+1, 0x82); //modify to 0x82 by Scott. ++} ++ ++static VOID ++_DisableAnalog( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bWithoutHWSM ++ ) ++{ ++ u16 value16 = 0; ++ u8 value8=0; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(bWithoutHWSM){ ++ /***************************** ++ n. LDOA15_CTRL 0x20[7:0] = 0x04 // disable A15 power ++ o. LDOV12D_CTRL 0x21[7:0] = 0x54 // disable digital core power ++ r. When driver call disable, the ASIC will turn off remaining clock automatically ++ ******************************/ ++ ++ rtw_write8(Adapter, REG_LDOA15_CTRL, 0x04); ++ //PlatformIOWrite1Byte(Adapter, REG_LDOV12D_CTRL, 0x54); ++ ++ value8 = rtw_read8(Adapter, REG_LDOV12D_CTRL); ++ value8 &= (~LDV12_EN); ++ rtw_write8(Adapter, REG_LDOV12D_CTRL, value8); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, (" REG_LDOV12D_CTRL Reg0x21:0x%02x.\n",value8)); ++ } ++ ++/***************************** ++h. SPS0_CTRL 0x11[7:0] = 0x23 //enter PFM mode ++i. APS_FSMCO 0x04[15:0] = 0x4802 // set USB suspend ++******************************/ ++ ++ ++ value8 = 0x23; ++ if (IS_81xxC_VENDOR_UMC_B_CUT(pHalData->VersionID)) ++ value8 |= BIT3; ++ ++ rtw_write8(Adapter, REG_SPS0_CTRL, value8); ++ ++ ++ if(bWithoutHWSM) ++ { ++ //value16 |= (APDM_HOST | /*AFSM_HSUS |*/PFM_ALDN); ++ // 2010/08/31 According to Filen description, we need to use HW to shut down 8051 automatically. ++ // Becasue suspend operatione need the asistance of 8051 to wait for 3ms. ++ value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); ++ } ++ else ++ { ++ value16 |= (APDM_HOST | AFSM_HSUS |PFM_ALDN); ++ } ++ ++ rtw_write16(Adapter, REG_APS_FSMCO,value16 );//0x4802 ++ ++ rtw_write8(Adapter, REG_RSV_CTRL, 0x0e); ++ ++ #if 0 ++ //tynli_test for suspend mode. ++ if(!bWithoutHWSM){ ++ rtw_write8(Adapter, 0xfe10, 0x19); ++ } ++#endif ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Disable Analog Reg0x04:0x%04x.\n",value16)); ++} ++ ++static int ++CardDisableHWSM( // HW Auto state machine ++ IN PADAPTER Adapter, ++ IN BOOLEAN resetMCU ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ if(Adapter->bSurpriseRemoved){ ++ return rtStatus; ++ } ++#if 1 ++ //==== RF Off Sequence ==== ++ _DisableRFAFEAndResetBB(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure1(Adapter, _FALSE); ++ ++ // ==== Pull GPIO PIN to balance level and LED control ====== ++ _DisableGPIO(Adapter); ++ ++ // ==== Disable analog sequence === ++ _DisableAnalog(Adapter, _FALSE); ++ ++ RT_TRACE(_module_hci_hal_init_c_, _drv_info_, ("======> Card disable finished.\n")); ++#else ++ _DisableGPIO(Adapter); ++ ++ //reset FW download register ++ _ResetFWDownloadRegister(Adapter); ++ ++ ++ //disable RF/ AFE AD/DA ++ rtStatus = _DisableRF_AFE(Adapter); ++ if(RT_STATUS_SUCCESS != rtStatus){ ++ RT_TRACE(COMP_INIT, DBG_SERIOUS, ("_DisableRF_AFE failed!\n")); ++ goto Exit; ++ } ++ _ResetBB(Adapter); ++ ++ if(resetMCU){ ++ _ResetMCU(Adapter); ++ } ++ ++ _AutoPowerDownToHostOff(Adapter); ++ //_DisableMAC_AFE_PLL(Adapter); ++ ++ _SetUsbSuspend(Adapter); ++Exit: ++#endif ++ return rtStatus; ++ ++} ++ ++static int ++CardDisableWithoutHWSM( // without HW Auto state machine ++ IN PADAPTER Adapter ++ ) ++{ ++ int rtStatus = _SUCCESS; ++ ++ if(Adapter->bSurpriseRemoved){ ++ return rtStatus; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("======> Card Disable Without HWSM .\n")); ++ //==== RF Off Sequence ==== ++ _DisableRFAFEAndResetBB(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure1(Adapter, _TRUE); ++ ++ // ==== Pull GPIO PIN to balance level and LED control ====== ++ _DisableGPIO(Adapter); ++ ++ // ==== Reset digital sequence ====== ++ _ResetDigitalProcedure2(Adapter); ++ ++ // ==== Disable analog sequence === ++ _DisableAnalog(Adapter, _TRUE); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("<====== Card Disable Without HWSM .\n")); ++ return rtStatus; ++} ++ ++static void rtl8192cu_hw_power_down(_adapter *padapter) ++{ ++ // 2010/-8/09 MH For power down module, we need to enable register block contrl reg at 0x1c. ++ // Then enable power down control bit of register 0x04 BIT4 and BIT15 as 1. ++ ++ // Enable register area 0x0-0xc. ++ rtw_write8(padapter,REG_RSV_CTRL, 0x0); ++ rtw_write16(padapter, REG_APS_FSMCO, 0x8812); ++} ++ ++u32 rtl8192cu_hal_deinit(PADAPTER Adapter) ++ { ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ DBG_8192C("==> %s \n",__FUNCTION__); ++ // 2011/02/18 To Fix RU LNA power leakage problem. We need to execute below below in ++ // Adapter init and halt sequence. Accordingto EEchou's opinion, we can enable the ability for all ++ // IC. Accord to johnny's opinion, only RU need the support. ++ if (IS_HARDWARE_TYPE_8192C(Adapter) && (pHalData->BoardType == BOARD_USB_High_PA)) ++ rtw_write32(Adapter, rFPGA0_XCD_RFParameter, rtw_read32(Adapter, rFPGA0_XCD_RFParameter)|BIT1); ++ ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ DBG_8192C("bkeepfwalive(%x)\n",Adapter->pwrctrlpriv.bkeepfwalive); ++ if(Adapter->pwrctrlpriv.bkeepfwalive) ++ { ++ _ps_close_RF(Adapter); ++ if((Adapter->pwrctrlpriv.bHWPwrPindetect) && (Adapter->pwrctrlpriv.bHWPowerdown)) ++ rtl8192cu_hw_power_down(Adapter); ++ } ++ else ++#endif ++ { ++ if( Adapter->bCardDisableWOHSM == _FALSE) ++ { ++ DBG_8192C("card disble HWSM...........\n"); ++ CardDisableHWSM(Adapter, _FALSE); ++ } ++ else ++ { ++ DBG_8192C("card disble without HWSM...........\n"); ++ CardDisableWithoutHWSM(Adapter); // without HW Auto state machine ++ ++ if((Adapter->pwrctrlpriv.bHWPwrPindetect ) && (Adapter->pwrctrlpriv.bHWPowerdown)) ++ rtl8192cu_hw_power_down(Adapter); ++ } ++ } ++ ++ return _SUCCESS; ++ } ++ ++ ++unsigned int rtl8192cu_inirp_init(PADAPTER Adapter) ++{ ++ u8 i; ++ struct recv_buf *precvbuf; ++ uint status; ++ struct dvobj_priv *pdev=&Adapter->dvobjpriv; ++ struct intf_hdl * pintfhdl=&Adapter->iopriv.intf; ++ struct recv_priv *precvpriv = &(Adapter->recvpriv); ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); ++#endif ++ ++_func_enter_; ++ ++ _read_port = pintfhdl->io_ops._read_port; ++ ++ status = _SUCCESS; ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("===> usb_inirp_init \n")); ++ ++ precvpriv->ff_hwaddr = RECV_BULK_IN_ADDR; ++ ++ //issue Rx irp to receive data ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ for(i=0; iff_hwaddr, 0, (unsigned char *)precvbuf) == _FALSE ) ++ { ++ RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_port error \n")); ++ status = _FAIL; ++ goto exit; ++ } ++ ++ precvbuf++; ++ precvpriv->free_recv_buf_queue_cnt--; ++ } ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ _read_interrupt = pintfhdl->io_ops._read_interrupt; ++ if(_read_interrupt(pintfhdl, RECV_INT_IN_ADDR) == _FALSE ) ++ { ++ RT_TRACE(_module_hci_hal_init_c_,_drv_err_,("usb_rx_init: usb_read_interrupt error \n")); ++ status = _FAIL; ++ } ++#endif ++ ++exit: ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("<=== usb_inirp_init \n")); ++ ++_func_exit_; ++ ++ return status; ++ ++} ++ ++unsigned int rtl8192cu_inirp_deinit(PADAPTER Adapter) ++{ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n ===> usb_rx_deinit \n")); ++ ++ rtw_read_port_cancel(Adapter); ++ ++ RT_TRACE(_module_hci_hal_init_c_,_drv_info_,("\n <=== usb_rx_deinit \n")); ++ ++ return _SUCCESS; ++} ++ ++//------------------------------------------------------------------------- ++// ++// Channel Plan ++// ++//------------------------------------------------------------------------- ++ ++static VOID ++ReadChannelPlan( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ ++#define EEPROM_TEST_CHANNEL_PLAN (0x7D) ++#define EEPROM_NORMAL_CHANNEL_PLAN (0x75) ++ ++ struct mlme_priv *pmlmepriv = &(Adapter->mlmepriv); ++ struct registry_priv *pregistrypriv = &Adapter->registrypriv; ++ u8 channelPlan; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(AutoLoadFail){ ++ channelPlan = CHPL_FCC; ++ } ++ else{ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ channelPlan = PROMContent[EEPROM_NORMAL_CHANNEL_PLAN]; ++ else ++ channelPlan = PROMContent[EEPROM_TEST_CHANNEL_PLAN]; ++ } ++ ++ if((pregistrypriv->channel_plan>= RT_CHANNEL_DOMAIN_MAX) || (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)) ++ { ++ pmlmepriv->ChannelPlan = _HalMapChannelPlan8192C(Adapter, (channelPlan & (~(EEPROM_CHANNEL_PLAN_BY_HW_MASK)))); ++ //pMgntInfo->bChnlPlanFromHW = (channelPlan & EEPROM_CHANNEL_PLAN_BY_HW_MASK) ? _TRUE : _FALSE; // User cannot change channel plan. ++ } ++ else ++ { ++ pmlmepriv->ChannelPlan = (RT_CHANNEL_DOMAIN)pregistrypriv->channel_plan; ++ } ++ ++#if 0 //todo: ++ switch(pMgntInfo->ChannelPlan) ++ { ++ case RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN: ++ { ++ PRT_DOT11D_INFO pDot11dInfo = GET_DOT11D_INFO(pMgntInfo); ++ ++ pDot11dInfo->bEnabled = _TRUE; ++ } ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("Enable dot11d when RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN!\n")); ++ break; ++ } ++#endif ++ ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("RegChannelPlan(%d) EEPROMChannelPlan(%ld)", pMgntInfo->RegChannelPlan, (u4Byte)channelPlan)); ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("ChannelPlan = %d\n" , pMgntInfo->ChannelPlan)); ++ ++ MSG_8192C("RT_ChannelPlan: 0x%02x\n", pmlmepriv->ChannelPlan); ++ ++} ++ ++ ++//------------------------------------------------------------------------- ++// ++// EEPROM Power index mapping ++// ++//------------------------------------------------------------------------- ++ ++ static VOID ++_ReadPowerValueFromPROM( ++ IN PTxPowerInfo pwrInfo, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ u32 rfPath, eeAddr, group; ++ ++ _rtw_memset(pwrInfo, 0, sizeof(TxPowerInfo)); ++ ++ if(AutoLoadFail){ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){ ++ pwrInfo->CCKIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; ++ pwrInfo->HT40_1SIndex[rfPath][group] = EEPROM_Default_TxPowerLevel; ++ pwrInfo->HT40_2SIndexDiff[rfPath][group]= EEPROM_Default_HT40_2SDiff; ++ pwrInfo->HT20IndexDiff[rfPath][group] = EEPROM_Default_HT20_Diff; ++ pwrInfo->OFDMIndexDiff[rfPath][group] = EEPROM_Default_LegacyHTTxPowerDiff; ++ pwrInfo->HT40MaxOffset[rfPath][group] = EEPROM_Default_HT40_PwrMaxOffset; ++ pwrInfo->HT20MaxOffset[rfPath][group] = EEPROM_Default_HT20_PwrMaxOffset; ++ } ++ } ++ ++ pwrInfo->TSSI_A = EEPROM_Default_TSSI; ++ pwrInfo->TSSI_B = EEPROM_Default_TSSI; ++ ++ return; ++ } ++ ++ for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ eeAddr = EEPROM_CCK_TX_PWR_INX + (rfPath * 3) + group; ++ pwrInfo->CCKIndex[rfPath][group] = PROMContent[eeAddr]; ++ ++ eeAddr = EEPROM_HT40_1S_TX_PWR_INX + (rfPath * 3) + group; ++ pwrInfo->HT40_1SIndex[rfPath][group] = PROMContent[eeAddr]; ++ } ++ } ++ ++ for(group = 0 ; group < CHANNEL_GROUP_MAX ; group++){ ++ for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){ ++ pwrInfo->HT40_2SIndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT40_2S_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++ ++#if 1 ++ pwrInfo->HT20IndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++ if(pwrInfo->HT20IndexDiff[rfPath][group] & BIT3) //4bit sign number to 8 bit sign number ++ pwrInfo->HT20IndexDiff[rfPath][group] |= 0xF0; ++#else ++ pwrInfo->HT20IndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_HT20_TX_PWR_INX_DIFF + group] >> (rfPath * 4)) & 0xF; ++#endif ++ ++ pwrInfo->OFDMIndexDiff[rfPath][group] = ++ (PROMContent[EEPROM_OFDM_TX_PWR_INX_DIFF+ group] >> (rfPath * 4)) & 0xF; ++ ++ pwrInfo->HT40MaxOffset[rfPath][group] = ++ (PROMContent[EEPROM_HT40_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; ++ ++ pwrInfo->HT20MaxOffset[rfPath][group] = ++ (PROMContent[EEPROM_HT20_MAX_PWR_OFFSET+ group] >> (rfPath * 4)) & 0xF; ++ } ++ } ++ ++ pwrInfo->TSSI_A = PROMContent[EEPROM_TSSI_A]; ++ pwrInfo->TSSI_B = PROMContent[EEPROM_TSSI_B]; ++ ++} ++ ++ ++static u32 ++_GetChannelGroup( ++ IN u32 channel ++ ) ++{ ++ //RT_ASSERT((channel < 14), ("Channel %d no is supported!\n")); ++ ++ if(channel < 3){ // Channel 1~3 ++ return 0; ++ } ++ else if(channel < 9){ // Channel 4~9 ++ return 1; ++ } ++ ++ return 2; // Channel 10~14 ++} ++ ++ ++static VOID ++ReadTxPowerInfo( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ TxPowerInfo pwrInfo; ++ u32 rfPath, ch, group; ++ u8 pwr, diff; ++ ++ _ReadPowerValueFromPROM(&pwrInfo, PROMContent, AutoLoadFail); ++ ++ if(!AutoLoadFail) ++ pHalData->bTXPowerDataReadFromEEPORM = _TRUE; ++ ++ for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ group = _GetChannelGroup(ch); ++ ++ pHalData->TxPwrLevelCck[rfPath][ch] = pwrInfo.CCKIndex[rfPath][group]; ++ pHalData->TxPwrLevelHT40_1S[rfPath][ch] = pwrInfo.HT40_1SIndex[rfPath][group]; ++ ++ pHalData->TxPwrHt20Diff[rfPath][ch] = pwrInfo.HT20IndexDiff[rfPath][group]; ++ pHalData->TxPwrLegacyHtDiff[rfPath][ch] = pwrInfo.OFDMIndexDiff[rfPath][group]; ++ pHalData->PwrGroupHT20[rfPath][ch] = pwrInfo.HT20MaxOffset[rfPath][group]; ++ pHalData->PwrGroupHT40[rfPath][ch] = pwrInfo.HT40MaxOffset[rfPath][group]; ++ ++ pwr = pwrInfo.HT40_1SIndex[rfPath][group]; ++ diff = pwrInfo.HT40_2SIndexDiff[rfPath][group]; ++ ++ pHalData->TxPwrLevelHT40_2S[rfPath][ch] = (pwr > diff) ? (pwr - diff) : 0; ++ } ++ } ++ ++#if DBG ++ ++ for(rfPath = 0 ; rfPath < RF90_PATH_MAX ; rfPath++){ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ++ ("RF(%d)-Ch(%d) [CCK / HT40_1S / HT40_2S] = [0x%x / 0x%x / 0x%x]\n", ++ rfPath, ch, pHalData->TxPwrLevelCck[rfPath][ch], ++ pHalData->TxPwrLevelHT40_1S[rfPath][ch], ++ pHalData->TxPwrLevelHT40_2S[rfPath][ch])); ++ ++ } ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-A Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF90_PATH_A][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-A Legacy to Ht40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF90_PATH_A][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-B Ht20 to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrHt20Diff[RF90_PATH_B][ch])); ++ } ++ ++ for(ch = 0 ; ch < CHANNEL_MAX_NUMBER ; ch++){ ++ RTPRINT(FINIT, INIT_TxPower, ("RF-B Legacy to HT40 Diff[%d] = 0x%x\n", ch, pHalData->TxPwrLegacyHtDiff[RF90_PATH_B][ch])); ++ } ++ ++#endif ++ // 2010/10/19 MH Add Regulator recognize for CU. ++ if(!AutoLoadFail) ++ { ++ pHalData->EEPROMRegulatory = (PROMContent[RF_OPTION1]&0x7); //bit0~2 ++ } ++ else ++ { ++ pHalData->EEPROMRegulatory = 0; ++ } ++ DBG_8192C("EEPROMRegulatory = 0x%x\n", pHalData->EEPROMRegulatory); ++ ++} ++ ++ ++//------------------------------------------------------------------- ++// ++// EEPROM/EFUSE Content Parsing ++// ++//------------------------------------------------------------------- ++static void ++_ReadIDs( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(_FALSE == AutoloadFail){ ++ // VID, PID ++ pHalData->EEPROMVID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_VID]); ++ pHalData->EEPROMPID = le16_to_cpu( *(u16 *)&PROMContent[EEPROM_PID]); ++ ++ // Customer ID, 0x00 and 0xff are reserved for Realtek. ++ pHalData->EEPROMCustomerID = *(u8 *)&PROMContent[EEPROM_CUSTOMER_ID]; ++ pHalData->EEPROMSubCustomerID = *(u8 *)&PROMContent[EEPROM_SUBCUSTOMER_ID]; ++ ++ } ++ else{ ++ pHalData->EEPROMVID = EEPROM_Default_VID; ++ pHalData->EEPROMPID = EEPROM_Default_PID; ++ ++ // Customer ID, 0x00 and 0xff are reserved for Realtek. ++ pHalData->EEPROMCustomerID = EEPROM_Default_CustomerID; ++ pHalData->EEPROMSubCustomerID = EEPROM_Default_SubCustomerID; ++ ++ } ++ ++ // For customized behavior. ++ if((pHalData->EEPROMVID == 0x103C) && (pHalData->EEPROMVID == 0x1629))// HP Lite-On for RTL8188CUS Slim Combo. ++ pHalData->CustomerID = RT_CID_819x_HP; ++ ++ // Decide CustomerID according to VID/DID or EEPROM ++ switch(pHalData->EEPROMCustomerID) ++ { ++ case EEPROM_CID_DEFAULT: ++ if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3308)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x3309)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) ++ pHalData->CustomerID = RT_CID_DLINK; ++ break; ++ case EEPROM_CID_WHQL: ++/* ++ Adapter->bInHctTest = TRUE; ++ ++ pMgntInfo->bSupportTurboMode = FALSE; ++ pMgntInfo->bAutoTurboBy8186 = FALSE; ++ ++ pMgntInfo->PowerSaveControl.bInactivePs = FALSE; ++ pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; ++ pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; ++ ++ pMgntInfo->keepAliveLevel = 0; ++ ++ Adapter->bUnloadDriverwhenS3S4 = FALSE; ++*/ ++ break; ++ default: ++ pHalData->CustomerID = RT_CID_DEFAULT; ++ break; ++ ++ } ++ ++ MSG_8192C("EEPROMVID = 0x%04x\n", pHalData->EEPROMVID); ++ MSG_8192C("EEPROMPID = 0x%04x\n", pHalData->EEPROMPID); ++ MSG_8192C("EEPROMCustomerID : 0x%02x\n", pHalData->EEPROMCustomerID); ++ MSG_8192C("EEPROMSubCustomerID: 0x%02x\n", pHalData->EEPROMSubCustomerID); ++ ++ MSG_8192C("RT_CustomerID: 0x%02x\n", pHalData->CustomerID); ++ ++} ++ ++ ++static VOID ++_ReadMACAddress( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ ++ if(_FALSE == AutoloadFail){ ++ //Read Permanent MAC address and set value to hardware ++ _rtw_memcpy(pEEPROM->mac_addr, &PROMContent[EEPROM_MAC_ADDR], ETH_ALEN); ++ } ++ else{ ++ //Random assigh MAC address ++ u8 sMacAddr[MAC_ADDR_LEN] = {0x00, 0xE0, 0x4C, 0x81, 0x92, 0x00}; ++ //sMacAddr[5] = (u8)GetRandomNumber(1, 254); ++ _rtw_memcpy(pEEPROM->mac_addr, sMacAddr, ETH_ALEN); ++ } ++ DBG_8192C("%s MAC Address from EFUSE = "MAC_FMT"\n",__FUNCTION__, MAC_ARG(pEEPROM->mac_addr)); ++ //NicIFSetMacAddress(Adapter, Adapter->PermanentAddress); ++ //RT_PRINT_ADDR(COMP_INIT|COMP_EFUSE, DBG_LOUD, "MAC Addr: %s", Adapter->PermanentAddress); ++ ++} ++ ++static VOID ++_ReadBoardType( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ BOOLEAN isNormal = IS_NORMAL_CHIP(pHalData->VersionID); ++ u32 value32; ++ u8 boardType = BOARD_USB_DONGLE; ++#if 0 ++ if(isNormal) ++ { ++ value32 = rtw_read32(Adapter, REG_HPON_FSM); ++ ++ DBG_8192C("first value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType); ++ ++ if(!IS_92C_SERIAL(pHalData->VersionID)) ++ { ++ if(CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_88C_USB_MCARD) ++ { ++ pHalData->BoardType = BOARD_MINICARD; ++ DBG_8192C("value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType); ++ } ++ else if(CHIP_BONDING_IDENTIFIER(value32) == CHIP_BONDING_88C_USB_HP) ++ { ++ pHalData->BoardType = BOARD_USB_High_PA; ++ DBG_8192C("value 0x%x BoardType after 0x%x \n", CHIP_BONDING_IDENTIFIER(value32), pHalData->BoardType); ++ } ++ } ++ } ++#endif ++ ++ if(AutoloadFail){ ++ if(IS_8723_SERIES(pHalData->VersionID)) ++ pHalData->rf_type = RF_1T1R; ++ else ++ pHalData->rf_type = RF_2T2R; ++ ++ pHalData->BluetoothCoexist = _FALSE; ++ pHalData->BoardType = boardType; ++ return; ++ } ++ ++ if(isNormal) ++ { ++ boardType = PROMContent[EEPROM_NORMAL_BoardType]; ++ boardType &= BOARD_TYPE_NORMAL_MASK;//bit[7:5] ++ boardType >>= 5; ++ } ++ else ++ { ++ boardType = PROMContent[EEPROM_RF_OPT4]; ++ boardType &= BOARD_TYPE_TEST_MASK; ++ } ++ ++ pHalData->BoardType = boardType; ++ MSG_8192C("_ReadBoardType(%x)\n",pHalData->BoardType); ++ ++ if (boardType == BOARD_USB_High_PA) ++ pHalData->ExternalPA = 1; ++} ++ ++ ++static VOID ++_ReadLEDSetting( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ struct led_priv *pledpriv = &(Adapter->ledpriv); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++#ifdef CONFIG_SW_LED ++ pledpriv->bRegUseLed = _TRUE; ++ ++ // ++ // Led mode ++ // ++ switch(pHalData->CustomerID) ++ { ++ case RT_CID_DEFAULT: ++ pledpriv->LedStrategy = SW_LED_MODE1; ++ pledpriv->bRegUseLed = _TRUE; ++ break; ++ ++ case RT_CID_819x_HP: ++ pledpriv->LedStrategy = SW_LED_MODE6; ++ break; ++ ++ default: ++ pledpriv->LedStrategy = SW_LED_MODE1; ++ break; ++ } ++ ++ if( BOARD_MINICARD == pHalData->BoardType ) ++ { ++ pledpriv->LedStrategy = SW_LED_MODE6; ++ } ++ pHalData->bLedOpenDrain = _TRUE;// Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++#else // HW LED ++ pledpriv->LedStrategy = HW_LED; ++#endif //CONFIG_SW_LED ++} ++ ++static VOID ++_ReadThermalMeter( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 tempval; ++ ++ // ++ // ThermalMeter from EEPROM ++ // ++ if(!AutoloadFail) ++ tempval = PROMContent[EEPROM_THERMAL_METER]; ++ else ++ tempval = EEPROM_Default_ThermalMeter; ++ ++ pHalData->EEPROMThermalMeter = (tempval&0x1f); //[4:0] ++ ++ if(pHalData->EEPROMThermalMeter == 0x1f || AutoloadFail) ++ pdmpriv->bAPKThermalMeterIgnore = _TRUE; ++ ++#if 0 ++ if(pHalData->EEPROMThermalMeter < 0x06 || pHalData->EEPROMThermalMeter > 0x1c) ++ pHalData->EEPROMThermalMeter = 0x12; ++#endif ++ ++ pdmpriv->ThermalMeter[0] = pHalData->EEPROMThermalMeter; ++ ++ //RTPRINT(FINIT, INIT_TxPower, ("ThermalMeter = 0x%x\n", pHalData->EEPROMThermalMeter)); ++ ++} ++ ++static VOID ++_ReadRFSetting( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++} ++ ++static void ++_ReadPROMVersion( ++ IN PADAPTER Adapter, ++ IN u8* PROMContent, ++ IN BOOLEAN AutoloadFail ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ if(AutoloadFail){ ++ pHalData->EEPROMVersion = EEPROM_Default_Version; ++ } ++ else{ ++ pHalData->EEPROMVersion = *(u8 *)&PROMContent[EEPROM_VERSION]; ++ } ++} ++ ++static VOID ++readAntennaDiversity( ++ IN PADAPTER pAdapter, ++ IN u8 *hwinfo, ++ IN BOOLEAN AutoLoadFail ++ ) ++{ ++ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ struct registry_priv *registry_par = &pAdapter->registrypriv; ++ ++ if(!AutoLoadFail) ++ { ++ // Antenna Diversity setting. ++ if(registry_par->antdiv_cfg == 2) // 2: From Efuse ++ pHalData->AntDivCfg = (hwinfo[EEPROM_RF_OPT1]&0x18)>>3; ++ else ++ pHalData->AntDivCfg = registry_par->antdiv_cfg ; // 0:OFF , 1:ON, ++ ++ DBG_8192C("### AntDivCfg(%x)\n",pHalData->AntDivCfg); ++ ++ //if(pHalData->EEPROMBluetoothCoexist!=0 && pHalData->EEPROMBluetoothAntNum==Ant_x1) ++ // pHalData->AntDivCfg = 0; ++ } ++ else ++ { ++ pHalData->AntDivCfg = 0; ++ } ++ ++} ++ ++static VOID ++hal_InitPGData( ++ IN PADAPTER pAdapter, ++ IN OUT u8 *PROMContent ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(pAdapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(pAdapter); ++ u32 i; ++ u16 value16; ++ ++ if(_FALSE == pEEPROM->bautoload_fail_flag) ++ { // autoload OK. ++ if (_TRUE == pEEPROM->EepromOrEfuse) ++ { ++ // Read all Content from EEPROM or EFUSE. ++ for(i = 0; i < HWSET_MAX_SIZE; i += 2) ++ { ++ //value16 = EF2Byte(ReadEEprom(pAdapter, (u2Byte) (i>>1))); ++ //*((u16 *)(&PROMContent[i])) = value16; ++ } ++ } ++ else ++ { ++ // Read EFUSE real map to shadow. ++ EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); ++ _rtw_memcpy((void*)PROMContent, (void*)pEEPROM->efuse_eeprom_data, HWSET_MAX_SIZE); ++ } ++ } ++ else ++ {//autoload fail ++ //RT_TRACE(COMP_INIT, DBG_LOUD, ("AutoLoad Fail reported from CR9346!!\n")); ++ pEEPROM->bautoload_fail_flag = _TRUE; ++ //update to default value 0xFF ++ if (_FALSE == pEEPROM->EepromOrEfuse) ++ EFUSE_ShadowMapUpdate(pAdapter, EFUSE_WIFI, _FALSE); ++ } ++} ++// Read HW power down mode selection ++static void _ReadPSSetting(IN PADAPTER Adapter,IN u8*PROMContent,IN u8 AutoloadFail) ++{ ++ if(AutoloadFail){ ++ Adapter->pwrctrlpriv.bHWPowerdown = _FALSE; ++ Adapter->pwrctrlpriv.bSupportRemoteWakeup = _FALSE; ++ } ++ else { ++ //if(SUPPORT_HW_RADIO_DETECT(Adapter)) ++ Adapter->pwrctrlpriv.bHWPwrPindetect = Adapter->registrypriv.hwpwrp_detect; ++ //else ++ //Adapter->pwrctrlpriv.bHWPwrPindetect = _FALSE;//dongle not support new ++ ++ ++ //hw power down mode selection , 0:rf-off / 1:power down ++ ++ if(Adapter->registrypriv.hwpdn_mode==2) ++ Adapter->pwrctrlpriv.bHWPowerdown = (PROMContent[EEPROM_RF_OPT3] & BIT4); ++ else ++ Adapter->pwrctrlpriv.bHWPowerdown = Adapter->registrypriv.hwpdn_mode; ++#ifdef CONFIG_WOWLAN ++ // decide hw if support remote wakeup function ++ // if hw supported, 8051 (SIE) will generate WeakUP signal( D+/D- toggle) when autoresume ++ Adapter->pwrctrlpriv.bSupportRemoteWakeup = (PROMContent[EEPROM_TEST_USB_OPT] & BIT1)?_TRUE :_FALSE; ++#endif //CONFIG_WOWLAN ++ ++ //if(SUPPORT_HW_RADIO_DETECT(Adapter)) ++ //Adapter->registrypriv.usbss_enable = Adapter->pwrctrlpriv.bSupportRemoteWakeup ; ++ ++ DBG_8192C("%s...bHWPwrPindetect(%x)-bHWPowerdown(%x) ,bSupportRemoteWakeup(%x)\n",__FUNCTION__, ++ Adapter->pwrctrlpriv.bHWPwrPindetect,Adapter->pwrctrlpriv.bHWPowerdown ,Adapter->pwrctrlpriv.bSupportRemoteWakeup); ++ ++ DBG_8192C("### PS params=> power_mgnt(%x),usbss_enable(%x) ###\n",Adapter->registrypriv.power_mgnt,Adapter->registrypriv.usbss_enable); ++ ++ } ++ ++} ++ ++static VOID ++readAdapterInfo_8192CU( ++ IN PADAPTER Adapter ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ PHAL_DATA_TYPE pHalData = GET_HAL_DATA(Adapter); ++ u8 PROMContent[HWSET_MAX_SIZE]={0}; ++ ++ hal_InitPGData(Adapter, PROMContent); ++ rtl8192c_EfuseParseIDCode(Adapter, PROMContent); ++ ++ _ReadPROMVersion(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadIDs(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadMACAddress(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ReadTxPowerInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadBoardType(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ++#ifdef CONFIG_BT_COEXIST ++ // ++ // Read Bluetooth co-exist and initialize ++ // ++ rtl8192c_ReadBluetoothCoexistInfo(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++#endif ++ ++ ReadChannelPlan(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadThermalMeter(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadLEDSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadRFSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ _ReadPSSetting(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ readAntennaDiversity(Adapter, PROMContent, pEEPROM->bautoload_fail_flag); ++ ++ //hal_CustomizedBehavior_8723U(Adapter); ++ ++ Adapter->bDongle = (PROMContent[EEPROM_EASY_REPLACEMENT] == 1)? 0: 1; ++ DBG_8192C("%s(): REPLACEMENT = %x\n",__FUNCTION__,Adapter->bDongle); ++#ifdef CONFIG_INTEL_PROXIM ++ /* for intel proximity */ ++ if (pHalData->rf_type== RF_1T1R) { ++ Adapter->proximity.proxim_support = _TRUE; ++ } else if (pHalData->rf_type== RF_2T2R) { ++ if ((pHalData->EEPROMPID == 0x8186) && ++ (pHalData->EEPROMVID== 0x0bda)) ++ Adapter->proximity.proxim_support = _TRUE; ++ } else { ++ Adapter->proximity.proxim_support = _FALSE; ++ } ++#endif //CONFIG_INTEL_PROXIM ++} ++ ++static void _ReadPROMContent( ++ IN PADAPTER Adapter ++ ) ++{ ++ EEPROM_EFUSE_PRIV *pEEPROM = GET_EEPROM_EFUSE_PRIV(Adapter); ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 PROMContent[HWSET_MAX_SIZE]={0}; ++ u8 eeValue; ++ u32 i; ++ u16 value16; ++ ++ eeValue = rtw_read8(Adapter, REG_9346CR); ++ // To check system boot selection. ++ pEEPROM->EepromOrEfuse = (eeValue & BOOT_FROM_EEPROM) ? _TRUE : _FALSE; ++ pEEPROM->bautoload_fail_flag = (eeValue & EEPROM_EN) ? _FALSE : _TRUE; ++ ++ ++ DBG_8192C("Boot from %s, Autoload %s !\n", (pEEPROM->EepromOrEfuse ? "EEPROM" : "EFUSE"), ++ (pEEPROM->bautoload_fail_flag ? "Fail" : "OK") ); ++ ++ //pHalData->EEType = IS_BOOT_FROM_EEPROM(Adapter) ? EEPROM_93C46 : EEPROM_BOOT_EFUSE; ++ ++ //if(IS_HARDWARE_TYPE_8723(Adapter)) ++ // readAdapterInfo_8723U(Adapter); ++ //else ++ readAdapterInfo_8192CU(Adapter); ++} ++ ++ ++static VOID ++_InitOtherVariable( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ ++ //if(Adapter->bInHctTest){ ++ // pMgntInfo->PowerSaveControl.bInactivePs = FALSE; ++ // pMgntInfo->PowerSaveControl.bIPSModeBackup = FALSE; ++ // pMgntInfo->PowerSaveControl.bLeisurePs = FALSE; ++ // pMgntInfo->keepAliveLevel = 0; ++ //} ++ ++ // 2009/06/10 MH For 92S 1*1=1R/ 1*2&2*2 use 2R. We default set 1*1 use radio A ++ // So if you want to use radio B. Please modify RF path enable bit for correct signal ++ // strength calculate. ++ if (pHalData->rf_type == RF_1T1R){ ++ pHalData->bRFPathRxEnable[0] = _TRUE; ++ } ++ else{ ++ pHalData->bRFPathRxEnable[0] = pHalData->bRFPathRxEnable[1] = _TRUE; ++ } ++ ++} ++ ++static VOID ++_ReadRFType( ++ IN PADAPTER Adapter ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++#if DISABLE_BB_RF ++ pHalData->rf_chip = RF_PSEUDO_11N; ++#else ++ pHalData->rf_chip = RF_6052; ++#endif ++} ++ ++void _ReadSilmComboMode(PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++ pHalData->SlimComboDbg = _FALSE; // Default is not debug mode. ++ ++ // 2010/11/22 MH We need to enter debug mode for TSMA and UMC A cut ++ if ((Adapter->chip_type == RTL8188C_8192C) && ++ (pHalData->BoardType == BOARD_USB_COMBO)) ++ { ++ switch (pHalData->VersionID) ++ { ++ case VERSION_NORMAL_TSMC_CHIP_88C: ++ case VERSION_NORMAL_TSMC_CHIP_92C: ++ case VERSION_NORMAL_TSMC_CHIP_92C_1T2R: ++ case VERSION_NORMAL_UMC_CHIP_88C_A_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_A_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT: ++ if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) ++ pHalData->SlimComboDbg = _TRUE; ++ ++ break; ++ ++ case VERSION_NORMAL_UMC_CHIP_88C_B_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_B_CUT: ++ case VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT: ++ // 2011/02/15 MH UNC-B cut ECO fail, we need to support slim combo debug mode. ++ if ((rtw_read8(Adapter, REG_SYS_CFG+3) &0xF0) == 0x20) ++ pHalData->SlimComboDbg = _TRUE; ++ break; ++ ++ default: ++ break; ++ } ++ ++ } ++ ++} ++static int _ReadAdapterInfo8192CU(PADAPTER Adapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u32 start=rtw_get_current_time(); ++ ++ MSG_8192C("====> ReadAdapterInfo8192C\n"); ++ ++ //Efuse_InitSomeVar(Adapter); ++ ++ //if(IS_HARDWARE_TYPE_8723(Adapter)) ++ // _EfuseCellSel(Adapter); ++ ++ _ReadRFType(Adapter);//rf_chip -> _InitRFType() ++ _ReadPROMContent(Adapter); ++ ++ // 2010/10/25 MH THe function must be called after borad_type & IC-Version recognize. ++ _ReadSilmComboMode(Adapter); ++ ++ _InitOtherVariable(Adapter); ++ ++ //MSG_8192C("%s()(done), rf_chip=0x%x, rf_type=0x%x\n", __FUNCTION__, pHalData->rf_chip, pHalData->rf_type); ++ ++ MSG_8192C("<==== ReadAdapterInfo8192C in %d ms\n", rtw_get_passing_time_ms(start)); ++ ++ return _SUCCESS; ++} ++ ++ ++static void ReadAdapterInfo8192CU(PADAPTER Adapter) ++{ ++ // Read EEPROM size before call any EEPROM function ++ //Adapter->EepromAddressSize=Adapter->HalFunc.GetEEPROMSizeHandler(Adapter); ++ Adapter->EepromAddressSize = GetEEPROMSize8192C(Adapter); ++ ++ _ReadAdapterInfo8192CU(Adapter); ++} ++ ++ ++#define GPIO_DEBUG_PORT_NUM 0 ++static void rtl8192cu_trigger_gpio_0(_adapter *padapter) ++{ ++ ++ u32 gpioctrl; ++ DBG_8192C("==> trigger_gpio_0...\n"); ++ rtw_write16_async(padapter,REG_GPIO_PIN_CTRL,0); ++ rtw_write8_async(padapter,REG_GPIO_PIN_CTRL+2,0xFF); ++ gpioctrl = (BIT(GPIO_DEBUG_PORT_NUM)<<24 )|(BIT(GPIO_DEBUG_PORT_NUM)<<16); ++ rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); ++ gpioctrl |= (BIT(GPIO_DEBUG_PORT_NUM)<<8); ++ rtw_write32_async(padapter,REG_GPIO_PIN_CTRL,gpioctrl); ++ DBG_8192C("<=== trigger_gpio_0...\n"); ++ ++} ++ ++static void ResumeTxBeacon(_adapter *padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) | BIT6); ++ pHalData->RegFwHwTxQCtrl |= BIT6; ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0xff); ++ pHalData->RegReg542 |= BIT0; ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); ++ } ++ else ++ { ++ pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE); ++ rtw_write8(padapter, REG_TXPAUSE, pHalData->RegTxPause & (~BIT6)); ++ } ++ ++} ++ ++static void StopTxBeacon(_adapter *padapter) ++{ ++ HAL_DATA_TYPE* pHalData = GET_HAL_DATA(padapter); ++ ++ // 2010.03.01. Marked by tynli. No need to call workitem beacause we record the value ++ // which should be read from register to a global variable. ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write8(padapter, REG_FWHW_TXQ_CTRL+2, (pHalData->RegFwHwTxQCtrl) & (~BIT6)); ++ pHalData->RegFwHwTxQCtrl &= (~BIT6); ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+1, 0x64); ++ pHalData->RegReg542 &= ~(BIT0); ++ rtw_write8(padapter, REG_TBTT_PROHIBIT+2, pHalData->RegReg542); ++ } ++ else ++ { ++ pHalData->RegTxPause = rtw_read8(padapter, REG_TXPAUSE); ++ rtw_write8(padapter, REG_TXPAUSE, pHalData->RegTxPause | BIT6); ++ } ++ ++ //todo: CheckFwRsvdPageContent(Adapter); // 2010.06.23. Added by tynli. ++ ++} ++ ++u16 CRC16(u8 data,u16 CRC) ++{ ++ unsigned char shift_in,CRC_BIT15,DataBit,CRC_BIT11,CRC_BIT4 ; ++ int index; ++ unsigned short CRC_Result; ++ ++ for(index=0;index<8;index++) ++ { ++ CRC_BIT15=((CRC&BIT15) ? 1:0); ++ DataBit =(data&(BIT0<pwrctrlpriv; ++ int res=0,crc_idx; ++ u32 content=0,cmd=0; ++ u32 *pdata; ++ u8 config,crc,mc,bc,uc,idx,pattern_len,packet[200],packet_len,valid; ++ u16 crc_val=0,i; ++ ++ config=pbuf[0]; ++ bc=config & BIT(3)?1:0; ++ mc=config & BIT(4)?1:0; ++ uc=config & BIT(5)?1:0; ++ idx=config & 0x7; ++ crc=config & BIT(6)?1:0; ++ valid=config & BIT(7)?1:0; ++ pattern_len=pbuf[1]; ++ packet_len=pattern_len*8; ++ pdata=(u32 *)pbuf; ++ ++ // Write to the Wakeup CAM ++ //offset 0 ++ if(pattern_len>=4){ ++ content=pdata[1]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("\nrtw_wowlan_set_pattern offset[0] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][0]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+0); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 4 ++ if(pattern_len>=8){ ++ content=pdata[2]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[4] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][1]= __cpu_to_le32(content); ++ ++ //cmd=BIT(31)|BIT(16)|(idx+1); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 8 ++ if(pattern_len>=12){ ++ content=pdata[3]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[8] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][2]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+2); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ //offset 12 ++ if(pattern_len>=16){ ++ content=pdata[4]; ++ } ++ else{ ++ content=0; ++ } ++ DBG_8192C("rtw_wowlan_set_pattern offset[12] content 0x%x [cpu_to_le32 0x%x]\n", content,__cpu_to_le32(content)); ++ //rtw_write32(padapter, REG_WKFMCAM_RWD, __cpu_to_le32(content)); ++ pwrpriv->wowlan_pattern_context[idx][3]= __cpu_to_le32(content); ++ //cmd=BIT(31)|BIT(16)|(idx+3); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ if(crc){ ++ // Have the CRC value ++ crc_val=*(u16 *)(&pbuf[2]); ++ DBG_8192C("rtw_wowlan_set_pattern crc_val 0x%x \n", crc_val); ++ crc_val=__cpu_to_le16(crc_val); ++ DBG_8192C("rtw_wowlan_set_pattern crc_val after 0x%x \n", crc_val); ++ } ++ else{ ++ DBG_8192C("+rtw_wowlan_set_pattern crc=0[%x] Should calculate the CRC\n", crc); ++ // calculate the CRC the write to the Wakeup CAM ++ crc_idx=0; ++ for(i=0;iwowlan_pattern_context[idx][4]= content; ++ //cmd=BIT(31)|BIT(16)|(idx+4); ++ //rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ pwrpriv->wowlan_pattern_idx|=BIT(idx); ++ ++_rtw_wowlan_set_pattern_exit: ++ return res; ++} ++ ++ ++ ++void rtw_wowlan_reload_pattern(_adapter *padapter){ ++ struct pwrctrl_priv *pwrpriv=&padapter->pwrctrlpriv; ++ u32 content=0,cmd=0; ++ u8 idx; ++ ++ for (idx=0;idx<8;idx ++){ ++ if(pwrpriv->wowlan_pattern_idx & BIT(idx)){ ++ //offset 0 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][0]); ++ cmd=BIT(31)|BIT(16)|(idx+0); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 4 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][1]); ++ cmd=BIT(31)|BIT(16)|(idx+1); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 8 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][2]); ++ cmd=BIT(31)|BIT(16)|(idx+2); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 12 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][3]); ++ cmd=BIT(31)|BIT(16)|(idx+3); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ //offset 16 ++ rtw_write32(padapter, REG_WKFMCAM_RWD, pwrpriv->wowlan_pattern_context[idx][4]); ++ cmd=BIT(31)|BIT(16)|(idx+4); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ ++ } ++ printk("print WOWCAM idx =%d\n",idx); ++ cmd=BIT(31)|(idx+0); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[0] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+1); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[1] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+2); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[2] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+3); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[3] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ cmd=BIT(31)|(idx+4); ++ rtw_write32(padapter, REG_WKFMCAM_CMD, cmd); ++ printk("print WOWCAM offset[4] =%x\n",rtw_read32(padapter, REG_WKFMCAM_RWD)); ++ ++ ++ } ++} ++#endif //CONFIG_WOWLAN ++ ++void SetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++_func_enter_; ++ ++ switch(variable) ++ { ++ case HW_VAR_MEDIA_STATUS: ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(Adapter, MSR)&0x0c; ++ val8 |= *((u8 *)val); ++ rtw_write8(Adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_MEDIA_STATUS1: ++ { ++ u8 val8; ++ ++ val8 = rtw_read8(Adapter, MSR)&0x03; ++ val8 |= *((u8 *)val) <<2; ++ rtw_write8(Adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_SET_OPMODE: ++ { ++ u8 val8; ++ u8 mode = *((u8 *)val); ++ ++ if((mode == _HW_STATE_STATION_) || (mode == _HW_STATE_NOLINK_)) ++ { ++ StopTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x18); ++ } ++ else if((mode == _HW_STATE_ADHOC_) /*|| (mode == _HW_STATE_AP_)*/) ++ { ++ ResumeTxBeacon(Adapter); ++ rtw_write8(Adapter,REG_BCN_CTRL, 0x1a); ++ } ++ else if(mode == _HW_STATE_AP_) ++ { ++ ResumeTxBeacon(Adapter); ++ ++ rtw_write8(Adapter, REG_BCN_CTRL, 0x12); ++ ++ ++ //Set RCR ++ //rtw_write32(padapter, REG_RCR, 0x70002a8e);//CBSSID_DATA must set to 0 ++ rtw_write32(Adapter, REG_RCR, 0x7000228e);//CBSSID_DATA must set to 0 ++ //enable to rx data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2, 0xFFFF); ++ //enable to rx ps-poll ++ rtw_write16(Adapter, REG_RXFLTMAP1, 0x0400); ++ ++ //Beacon Control related register for first time ++ rtw_write8(Adapter, REG_BCNDMATIM, 0x02); // 2ms ++ rtw_write8(Adapter, REG_DRVERLYINT, 0x05);// 5ms ++ //rtw_write8(Adapter, REG_BCN_MAX_ERR, 0xFF); ++ rtw_write8(Adapter, REG_ATIMWND, 0x0a); // 10ms ++ rtw_write16(Adapter, REG_BCNTCFG, 0x00); ++ rtw_write16(Adapter, REG_TBTT_PROHIBIT, 0x6404); ++ ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, BIT(0)); ++ ++ //enable TSF Function for if1 ++ rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); ++ ++ //enable update TSF for if1 ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ } ++ else ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5)))); ++ } ++ ++ } ++ ++ val8 = rtw_read8(Adapter, MSR)&0x0c; ++ val8 |= mode; ++ rtw_write8(Adapter, MSR, val8); ++ } ++ break; ++ case HW_VAR_BSSID: ++ { ++ u8 idx = 0; ++ for(idx = 0 ; idx < 6; idx++) ++ { ++ rtw_write8(Adapter, (REG_BSSID+idx), val[idx]); ++ } ++ } ++ break; ++ case HW_VAR_BASIC_RATE: ++ { ++ u16 BrateCfg = 0; ++ u8 RateIndex = 0; ++ ++ // 2007.01.16, by Emily ++ // Select RRSR (in Legacy-OFDM and CCK) ++ // For 8190, we select only 24M, 12M, 6M, 11M, 5.5M, 2M, and 1M from the Basic rate. ++ // We do not use other rates. ++ rtl8192c_HalSetBrateCfg( Adapter, val, &BrateCfg ); ++ ++ //2011.03.30 add by Luke Lee ++ //CCK 2M ACK should be disabled for some BCM and Atheros AP IOT ++ //because CCK 2M has poor TXEVM ++ //CCK 5.5M & 11M ACK should be enabled for better performance ++ ++ pHalData->BasicRateSet = BrateCfg = (BrateCfg |0xd) & 0x15d; ++ ++ BrateCfg |= 0x01; // default enable 1M ACK rate ++ ++ DBG_8192C("HW_VAR_BASIC_RATE: BrateCfg(%#x)\n", BrateCfg); ++ ++ // Set RRSR rate table. ++ rtw_write8(Adapter, REG_RRSR, BrateCfg&0xff); ++ rtw_write8(Adapter, REG_RRSR+1, (BrateCfg>>8)&0xff); ++ ++ // Set RTS initial rate ++ while(BrateCfg > 0x1) ++ { ++ BrateCfg = (BrateCfg>> 1); ++ RateIndex++; ++ } ++ // Ziv - Check ++ rtw_write8(Adapter, REG_INIRTS_RATE_SEL, RateIndex); ++ } ++ break; ++ case HW_VAR_TXPAUSE: ++ rtw_write8(Adapter, REG_TXPAUSE, *((u8 *)val)); ++ break; ++ case HW_VAR_BCN_FUNC: ++ if(*((u8 *)val)) ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, (EN_BCN_FUNCTION | EN_TXBCN_RPT)); ++ } ++ else ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(EN_BCN_FUNCTION | EN_TXBCN_RPT))); ++ } ++ break; ++ case HW_VAR_CORRECT_TSF: ++ { ++ u64 tsf; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //tsf = pmlmeext->TSFValue - ((u32)pmlmeext->TSFValue % (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ tsf = pmlmeext->TSFValue - rtw_modular64(pmlmeext->TSFValue, (pmlmeinfo->bcn_interval*1024)) -1024; //us ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause |= STOP_BCNQ;BIT(6) ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)|BIT(6))); ++ StopTxBeacon(Adapter); ++ } ++ ++ //disable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(3))); ++ ++ rtw_write32(Adapter, REG_TSFTR, tsf); ++ rtw_write32(Adapter, REG_TSFTR+4, tsf>>32); ++ ++ //enable related TSF function ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(3)); ++ ++ ++ if(((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) || ((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE)) ++ { ++ //pHalData->RegTxPause &= (~STOP_BCNQ); ++ //rtw_write8(Adapter, REG_TXPAUSE, (rtw_read8(Adapter, REG_TXPAUSE)&(~BIT(6)))); ++ ResumeTxBeacon(Adapter); ++ } ++ } ++ break; ++ case HW_VAR_CHECK_BSSID: ++ if(*((u8 *)val)) ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ else ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA); ++ } ++ } ++ else ++ { ++ u32 val32; ++ ++ val32 = rtw_read32(Adapter, REG_RCR); ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ val32 &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN); ++ } ++ else ++ { ++ val32 &= 0xfffff7bf; ++ } ++ ++ rtw_write32(Adapter, REG_RCR, val32); ++ } ++ break; ++ case HW_VAR_MLME_DISCONNECT: ++ { ++ //Set RCR to not to receive data frame when NO LINK state ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR) & ~RCR_ADF); ++ //reject all data frames ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ ++ //reset TSF ++ rtw_write8(Adapter, REG_DUAL_TSF_RST, (BIT(0)|BIT(1))); ++ ++ //disable update TSF ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ else ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)|BIT(5)); ++ } ++ } ++ break; ++ case HW_VAR_MLME_SITESURVEY: ++ if(*((u8 *)val))//under sitesurvey ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ //config RCR to receive different BSSID & not to receive data frame ++ //pHalData->ReceiveConfig &= (~(RCR_CBSSID_DATA | RCR_CBSSID_BCN)); ++ u32 v = rtw_read32(Adapter, REG_RCR); ++ v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF ++ rtw_write32(Adapter, REG_RCR, v); ++ //reject all data frame ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ else ++ { ++ //config RCR to receive different BSSID & not to receive data frame ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) & 0xfffff7bf); ++ ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)|BIT(5)); ++ } ++ } ++ else//sitesurvey done ++ { ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if ((is_client_associated_to_ap(Adapter) == _TRUE) || ++ ((pmlmeinfo->state&0x03) == WIFI_FW_ADHOC_STATE) ) ++ { ++ //enable to rx data frame ++ //rtw_write32(Adapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ //enable update TSF ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ } ++ else ++ { ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5)))); ++ } ++ } ++ else if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_ADF); ++ ++ //enable update TSF ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ else ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5)))); ++ } ++ ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ if((pmlmeinfo->state&0x03) == WIFI_FW_AP_STATE) ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_BCN); ++ else ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ else ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA); ++ } ++ } ++ break; ++ case HW_VAR_MLME_JOIN: ++ { ++ u8 RetryLimit = 0x30; ++ u8 type = *((u8 *)val); ++ struct mlme_priv *pmlmepriv = &Adapter->mlmepriv; ++ ++ if(type == 0) // prepare to join ++ { ++ //enable to rx data frame.Accept all data frame ++ //rtw_write32(padapter, REG_RCR, rtw_read32(padapter, REG_RCR)|RCR_ADF); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xFFFF); ++ ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA|RCR_CBSSID_BCN); ++ } ++ else ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|RCR_CBSSID_DATA); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ RetryLimit = (pHalData->CustomerID == RT_CID_CCX) ? 7 : 48; ++ } ++ else // Ad-hoc Mode ++ { ++ RetryLimit = 0x7; ++ } ++ } ++ else if(type == 1) //joinbss_event call back when join res < 0 ++ { ++ //if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ //{ ++ //config RCR to receive different BSSID & not to receive data frame during linking ++ // u32 v = rtw_read32(Adapter, REG_RCR); ++ // v &= ~(RCR_CBSSID_DATA | RCR_CBSSID_BCN );//| RCR_ADF ++ // rtw_write32(Adapter, REG_RCR, v); ++ //} ++ //else ++ //{ ++ //config RCR to receive different BSSID & not to receive data frame during linking ++ // rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR) & 0xfffff7bf); ++ //} ++ ++ rtw_write16(Adapter, REG_RXFLTMAP2,0x00); ++ } ++ else if(type == 2) //sta add event call back ++ { ++ if(IS_NORMAL_CHIP(pHalData->VersionID)) ++ { ++ //enable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~BIT(4))); ++ } ++ else ++ { ++ //enable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~(BIT(4)|BIT(5)))); ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE|WIFI_ADHOC_MASTER_STATE)) ++ { ++ //fixed beacon issue for 8191su........... ++ rtw_write8(Adapter,0x542 ,0x02); ++ RetryLimit = 0x7; ++ } ++ } ++ ++ rtw_write16(Adapter, REG_RL, RetryLimit << RETRY_LIMIT_SHORT_SHIFT | RetryLimit << RETRY_LIMIT_LONG_SHIFT); ++ } ++ break; ++ case HW_VAR_BEACON_INTERVAL: ++ rtw_write16(Adapter, REG_BCN_INTERVAL, *((u16 *)val)); ++ break; ++ case HW_VAR_SLOT_TIME: ++ { ++ u8 u1bAIFS, aSifsTime; ++ struct mlme_ext_priv *pmlmeext = &Adapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ rtw_write8(Adapter, REG_SLOT, val[0]); ++ ++ if(pmlmeinfo->WMM_enable == 0) ++ { ++ if( pmlmeext->cur_wireless_mode == WIRELESS_11B) ++ aSifsTime = 10; ++ else ++ aSifsTime = 16; ++ ++ u1bAIFS = aSifsTime + (2 * pmlmeinfo->slotTime); ++ ++ // Temporary removed, 2008.06.20. ++ rtw_write8(Adapter, REG_EDCA_VO_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_VI_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_BE_PARAM, u1bAIFS); ++ rtw_write8(Adapter, REG_EDCA_BK_PARAM, u1bAIFS); ++ } ++ } ++ break; ++ case HW_VAR_SIFS: ++ { ++ // SIFS for OFDM Data ACK ++ rtw_write8(Adapter, REG_SIFS_CTX+1, val[0]); ++ // SIFS for OFDM consecutive tx like CTS data! ++ rtw_write8(Adapter, REG_SIFS_TRX+1, val[1]); ++ ++ rtw_write8(Adapter,REG_SPEC_SIFS+1, val[0]); ++ rtw_write8(Adapter,REG_MAC_SPEC_SIFS+1, val[0]); ++ ++ // 20100719 Joseph: Revise SIFS setting due to Hardware register definition change. ++ rtw_write8(Adapter, REG_R2T_SIFS+1, val[0]); ++ rtw_write8(Adapter, REG_T2T_SIFS+1, val[0]); ++ } ++ break; ++ case HW_VAR_ACK_PREAMBLE: ++ { ++ u8 regTmp; ++ u8 bShortPreamble = *( (PBOOLEAN)val ); ++ // Joseph marked out for Netgear 3500 TKIP channel 7 issue.(Temporarily) ++ //regTmp = (pHalData->nCur40MhzPrimeSC)<<5; ++ regTmp = 0; ++ if(bShortPreamble) ++ regTmp |= 0x80; ++ ++ rtw_write8(Adapter, REG_RRSR+2, regTmp); ++ } ++ break; ++ case HW_VAR_SEC_CFG: ++ rtw_write8(Adapter, REG_SECCFG, *((u8 *)val)); ++ break; ++ case HW_VAR_DM_FLAG: ++ pdmpriv->DMFlag = *((u8 *)val); ++ break; ++ case HW_VAR_DM_FUNC_OP: ++ if(val[0]) ++ {// save dm flag ++ pdmpriv->DMFlag_tmp = pdmpriv->DMFlag; ++ } ++ else ++ {// restore dm flag ++ pdmpriv->DMFlag = pdmpriv->DMFlag_tmp; ++ } ++ break; ++ case HW_VAR_DM_FUNC_SET: ++ pdmpriv->DMFlag |= *((u8 *)val); ++ break; ++ case HW_VAR_DM_FUNC_CLR: ++ pdmpriv->DMFlag &= *((u8 *)val); ++ break; ++ case HW_VAR_CAM_EMPTY_ENTRY: ++ { ++ u8 ucIndex = *((u8 *)val); ++ u8 i; ++ u32 ulCommand=0; ++ u32 ulContent=0; ++ u32 ulEncAlgo=CAM_AES; ++ ++ for(i=0;iAcParam_BE = ((u32 *)(val))[0]; ++ rtw_write32(Adapter, REG_EDCA_BE_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_AC_PARAM_BK: ++ rtw_write32(Adapter, REG_EDCA_BK_PARAM, ((u32 *)(val))[0]); ++ break; ++ case HW_VAR_ACM_CTRL: ++ { ++ u8 acm_ctrl = *((u8 *)val); ++ u8 AcmCtrl = rtw_read8( Adapter, REG_ACMHWCTRL); ++ ++ if(acm_ctrl > 1) ++ AcmCtrl = AcmCtrl | 0x1; ++ ++ if(acm_ctrl & BIT(3)) ++ AcmCtrl |= AcmHw_VoqEn; ++ else ++ AcmCtrl &= (~AcmHw_VoqEn); ++ ++ if(acm_ctrl & BIT(2)) ++ AcmCtrl |= AcmHw_ViqEn; ++ else ++ AcmCtrl &= (~AcmHw_ViqEn); ++ ++ if(acm_ctrl & BIT(1)) ++ AcmCtrl |= AcmHw_BeqEn; ++ else ++ AcmCtrl &= (~AcmHw_BeqEn); ++ ++ DBG_871X("[HW_VAR_ACM_CTRL] Write 0x%X\n", AcmCtrl ); ++ rtw_write8(Adapter, REG_ACMHWCTRL, AcmCtrl ); ++ } ++ break; ++ case HW_VAR_AMPDU_MIN_SPACE: ++ { ++ u8 MinSpacingToSet; ++ u8 SecMinSpace; ++ ++ MinSpacingToSet = *((u8 *)val); ++ if(MinSpacingToSet <= 7) ++ { ++ switch(Adapter->securitypriv.dot11PrivacyAlgrthm) ++ { ++ case _NO_PRIVACY_: ++ case _AES_: ++ SecMinSpace = 0; ++ break; ++ ++ case _WEP40_: ++ case _WEP104_: ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ SecMinSpace = 6; ++ break; ++ default: ++ SecMinSpace = 7; ++ break; ++ } ++ ++ if(MinSpacingToSet < SecMinSpace){ ++ MinSpacingToSet = SecMinSpace; ++ } ++ ++ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_MIN_SPACE: %#x\n", Adapter->MgntInfo.MinSpaceCfg)); ++ rtw_write8(Adapter, REG_AMPDU_MIN_SPACE, (rtw_read8(Adapter, REG_AMPDU_MIN_SPACE) & 0xf8) | MinSpacingToSet); ++ } ++ } ++ break; ++ case HW_VAR_AMPDU_FACTOR: ++ { ++ u8 RegToSet_Normal[4]={0x41,0xa8,0x72, 0xb9}; ++ u8 RegToSet_BT[4]={0x31,0x74,0x42, 0x97}; ++ u8 FactorToSet; ++ u8 *pRegToSet; ++ u8 index = 0; ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pHalData->bt_coexist.BT_Coexist) && ++ (pHalData->bt_coexist.BT_CoexistType == BT_CSR_BC4) ) ++ pRegToSet = RegToSet_BT; // 0x97427431; ++ else ++#endif ++ pRegToSet = RegToSet_Normal; // 0xb972a841; ++ ++ FactorToSet = *((u8 *)val); ++ if(FactorToSet <= 3) ++ { ++ FactorToSet = (1<<(FactorToSet + 2)); ++ if(FactorToSet>0xf) ++ FactorToSet = 0xf; ++ ++ for(index=0; index<4; index++) ++ { ++ if((pRegToSet[index] & 0xf0) > (FactorToSet<<4)) ++ pRegToSet[index] = (pRegToSet[index] & 0x0f) | (FactorToSet<<4); ++ ++ if((pRegToSet[index] & 0x0f) > FactorToSet) ++ pRegToSet[index] = (pRegToSet[index] & 0xf0) | (FactorToSet); ++ ++ rtw_write8(Adapter, (REG_AGGLEN_LMT+index), pRegToSet[index]); ++ } ++ ++ //RT_TRACE(COMP_MLME, DBG_LOUD, ("Set HW_VAR_AMPDU_FACTOR: %#x\n", FactorToSet)); ++ } ++ } ++ break; ++ case HW_VAR_RXDMA_AGG_PG_TH: ++ #ifdef CONFIG_USB_RX_AGGREGATION ++ { ++ u8 threshold = *((u8 *)val); ++ if( threshold == 0) ++ { ++ ++ threshold = pHalData->UsbRxAggPageCount; ++ } ++ rtw_write8(Adapter, REG_RXDMA_AGG_PG_TH, threshold); ++ } ++ #endif ++ break; ++ case HW_VAR_SET_RPWM: ++ rtw_write8(Adapter, REG_USB_HRPWM, *((u8 *)val)); ++ break; ++ case HW_VAR_H2C_FW_PWRMODE: ++ { ++ u8 psmode = (*(u8 *)val); ++ ++ // Forece leave RF low power mode for 1T1R to prevent conficting setting in Fw power ++ // saving sequence. 2010.06.07. Added by tynli. Suggested by SD3 yschang. ++ if( (psmode != PS_MODE_ACTIVE) && (!IS_92C_SERIAL(pHalData->VersionID))) ++ { ++ rtl8192c_dm_RF_Saving(Adapter, _TRUE); ++ } ++ rtl8192c_set_FwPwrMode_cmd(Adapter, psmode); ++ } ++ break; ++ case HW_VAR_H2C_FW_JOINBSSRPT: ++ { ++ u8 mstatus = (*(u8 *)val); ++ rtl8192c_set_FwJoinBssReport_cmd(Adapter, mstatus); ++ } ++ break; ++#ifdef CONFIG_P2P ++ case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: ++ { ++ u8 p2p_ps_state = (*(u8 *)val); ++ rtl8192c_set_p2p_ps_offload_cmd(Adapter, p2p_ps_state); ++ } ++ break; ++#endif //CONFIG_P2P ++#ifdef CONFIG_TDLS ++ case HW_VAR_TDLS_WRCR: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) )); ++ break; ++ case HW_VAR_TDLS_INIT_CH_SEN: ++ { ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)&(~ BIT(6) )&(~ BIT(7) )); ++ rtw_write16(Adapter, REG_RXFLTMAP2,0xffff); ++ ++ //disable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)|BIT(4)); ++ } ++ break; ++ case HW_VAR_TDLS_DONE_CH_SEN: ++ { ++ //enable update TSF ++ rtw_write8(Adapter, REG_BCN_CTRL, rtw_read8(Adapter, REG_BCN_CTRL)&(~ BIT(4))); ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(7) )); ++ } ++ break; ++ case HW_VAR_TDLS_RS_RCR: ++ rtw_write32(Adapter, REG_RCR, rtw_read32(Adapter, REG_RCR)|(BIT(6))); ++ break; ++#endif //CONFIG_TDLS ++ case HW_VAR_INITIAL_GAIN: ++ { ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ u32 rx_gain = ((u32 *)(val))[0]; ++ ++ if(rx_gain == 0xff){//restore rx gain ++ pDigTable->CurIGValue = pDigTable->BackupIGValue; ++ rtw_write8(Adapter,rOFDM0_XAAGCCore1, pDigTable->CurIGValue); ++ rtw_write8(Adapter,rOFDM0_XBAGCCore1, pDigTable->CurIGValue); ++ } ++ else{ ++ pDigTable->BackupIGValue = pDigTable->CurIGValue; ++ PHY_SetBBReg(Adapter, rOFDM0_XAAGCCore1, 0x7f,rx_gain ); ++ PHY_SetBBReg(Adapter, rOFDM0_XBAGCCore1, 0x7f,rx_gain); ++ pDigTable->CurIGValue = rx_gain; ++ } ++ } ++ break; ++ case HW_VAR_TRIGGER_GPIO_0: ++ rtl8192cu_trigger_gpio_0(Adapter); ++ break; ++#ifdef CONFIG_BT_COEXIST ++ case HW_VAR_BT_SET_COEXIST: ++ { ++ u8 bStart = (*(u8 *)val); ++ rtl8192c_set_dm_bt_coexist(Adapter, bStart); ++ } ++ break; ++ case HW_VAR_BT_ISSUE_DELBA: ++ { ++ u8 dir = (*(u8 *)val); ++ rtl8192c_issue_delete_ba(Adapter, dir); ++ } ++ break; ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ ++ case HW_VAR_ANTENNA_DIVERSITY_LINK: ++ SwAntDivRestAfterLink8192C(Adapter); ++ break; ++ case HW_VAR_ANTENNA_DIVERSITY_SELECT: ++ { ++ u8 Optimum_antenna = (*(u8 *)val); ++ //switch antenna to Optimum_antenna ++ // DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ if(pHalData->CurAntenna != Optimum_antenna) ++ { ++ PHY_SetBBReg(Adapter, rFPGA0_XA_RFInterfaceOE, 0x300, Optimum_antenna); ++ pHalData->CurAntenna = Optimum_antenna ; ++ //DBG_8192C("==> HW_VAR_ANTENNA_DIVERSITY_SELECT , Ant_(%s)\n",(Optimum_antenna==2)?"A":"B"); ++ } ++ } ++ break; ++#endif ++ case HW_VAR_EFUSE_BYTES: // To set EFUE total used bytes, added by Roger, 2008.12.22. ++ pHalData->EfuseUsedBytes = *((u16 *)val); ++ break; ++ case HW_VAR_FIFO_CLEARN_UP: ++ { ++ #define RW_RELEASE_EN BIT18 ++ #define RXDMA_IDLE BIT17 ++ ++ struct pwrctrl_priv *pwrpriv = &Adapter->pwrctrlpriv; ++ u8 trycnt = 100; ++ ++ //pause tx ++ rtw_write8(Adapter,REG_TXPAUSE,0xff); ++ ++ //keep sn ++ Adapter->xmitpriv.nqos_ssn = rtw_read16(Adapter,REG_NQOS_SEQ); ++ ++ if(pwrpriv->bkeepfwalive != _TRUE) ++ { ++ //RX DMA stop ++ rtw_write32(Adapter,REG_RXPKT_NUM,(rtw_read32(Adapter,REG_RXPKT_NUM)|RW_RELEASE_EN)); ++ do{ ++ if(!(rtw_read32(Adapter,REG_RXPKT_NUM)&RXDMA_IDLE)) ++ break; ++ }while(trycnt--); ++ if(trycnt ==0) ++ DBG_8192C("Stop RX DMA failed...... \n"); ++ ++ //RQPN Load 0 ++ rtw_write16(Adapter,REG_RQPN_NPQ,0x0); ++ rtw_write32(Adapter,REG_RQPN,0x80000000); ++ rtw_mdelay_os(10); ++ } ++ } ++ break; ++ case HW_VAR_WOWLAN: ++#ifdef CONFIG_WOWLAN ++ { ++ struct wowlan_ioctl_param *poidparam; ++ ++ int res; ++ ++ poidparam = (struct wowlan_ioctl_param *)val; ++ switch (poidparam->subcode){ ++ case WOWLAN_PATTERN_MATCH: ++ //Turn on the Pattern Match feature ++ DBG_8192C("\n PATTERN_MATCH poidparam->subcode_value=%d\n",poidparam->subcode_value); ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1))); ++ Adapter->pwrctrlpriv.wowlan_pattern=_TRUE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_pattern=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_pattern); ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(1))); ++ Adapter->pwrctrlpriv.wowlan_pattern=_FALSE; ++ } ++ break; ++ case WOWLAN_MAGIC_PACKET: ++ //Turn on the Magic Packet feature ++ DBG_8192C("\n MAGIC_PACKET poidparam->subcode_value=%d\n",poidparam->subcode_value); ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(2))); ++ Adapter->pwrctrlpriv.wowlan_magic=_TRUE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_magic=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_magic); ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(2))); ++ Adapter->pwrctrlpriv.wowlan_magic=_FALSE; ++ } ++ break; ++ case WOWLAN_UNICAST: ++ //Turn on the Unicast wakeup feature ++ if(poidparam->subcode_value==1){ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(3))); ++ Adapter->pwrctrlpriv.wowlan_unicast=_TRUE; ++ } ++ else{ ++ //rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)&~BIT(3))); ++ Adapter->pwrctrlpriv.wowlan_unicast=_FALSE; ++ DBG_8192C("%s Adapter->pwrctrlpriv.wowlan_unicast=%x\n",__FUNCTION__,Adapter->pwrctrlpriv.wowlan_unicast); ++ } ++ break; ++ case WOWLAN_SET_PATTERN: ++ //Setting the Pattern for wowlan ++ res=rtw_wowlan_set_pattern(Adapter,poidparam->pattern); ++ if(res) ++ DBG_8192C("rtw_wowlan_set_pattern retern value=0x%x",res); ++ break; ++ case WOWLAN_DUMP_REG: ++ //dump the WKFMCAM and WOW_CTRL register ++ /*DBG_8192C("\n\n\n\n rtw_wowlan_ctrl: WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++ DBG_8192C("print WKFMCAM index =%d ",poidparam->data[0]); ++ { int cmd=0,offset=0; ++ for(offset=0;offset<5;offset++){ ++ cmd=BIT(31)|(poidparam->data[0]+offset); ++ rtw_write32(Adapter, REG_WKFMCAM_CMD, cmd); ++ DBG_8192C("offset[%d]=0x%.8x ",offset,rtw_read32(Adapter, REG_WKFMCAM_RWD)); ++ DBG_8192C("offset[%d]=MSB 0x%x:0x%x:0x%x:0x%x ",offset,rtw_read8(Adapter, REG_WKFMCAM_RWD+3),rtw_read8(Adapter, REG_WKFMCAM_RWD+2),rtw_read8(Adapter, REG_WKFMCAM_RWD+1),rtw_read8(Adapter, REG_WKFMCAM_RWD)); ++ } ++ }*/ ++ ++ break; ++ case WOWLAN_ENABLE: ++ SetFwRelatedForWoWLAN8192CU(Adapter, _TRUE); ++ //Set Pattern ++ if(Adapter->pwrctrlpriv.wowlan_pattern==_TRUE) ++ rtw_wowlan_reload_pattern(Adapter); ++ rtl8192c_set_wowlan_cmd(Adapter); ++ rtw_write8(Adapter, 0x6, rtw_read8(Adapter, 0x6)|BIT(3)); ++ rtw_msleep_os(10); ++ //DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++// if(rtw_read8(Adapter, REG_WOW_CTRL)==0) ++// rtw_write8(Adapter, REG_WOW_CTRL, (rtw_read8(Adapter, REG_WOW_CTRL)|BIT(1)|BIT(2)|BIT(3))); ++ //DBG_8192C(" \n REG_WOW_CTRL=0x%x \n",rtw_read8(Adapter, REG_WOW_CTRL)); ++ break; ++ ++ case WOWLAN_DISABLE: ++ Adapter->pwrctrlpriv.wowlan_mode=_FALSE; ++ rtl8192c_set_wowlan_cmd(Adapter); ++ rtw_msleep_os(10); ++ break; ++ ++ case WOWLAN_STATUS: ++ poidparam->wakeup_reason = rtw_read8(Adapter, REG_WOWLAN_REASON); ++ DBG_8192C("wake on wlan reason 0x%02x\n", poidparam->wakeup_reason); ++ break; ++ ++ default: ++ break; ++ } ++ if (Adapter->pwrctrlpriv.wowlan_unicast||Adapter->pwrctrlpriv.wowlan_magic || Adapter->pwrctrlpriv.wowlan_pattern) ++ Adapter->pwrctrlpriv.wowlan_mode =_TRUE; ++ else ++ Adapter->pwrctrlpriv.wowlan_mode =_FALSE; ++ } ++ ++ break; ++#endif //CONFIG_WOWLAN ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++void GetHwReg8192CU(PADAPTER Adapter, u8 variable, u8* val) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ ++_func_enter_; ++ ++ switch(variable) ++ { ++ case HW_VAR_BASIC_RATE: ++ *((u16 *)(val)) = pHalData->BasicRateSet; ++ case HW_VAR_TXPAUSE: ++ val[0] = rtw_read8(Adapter, REG_TXPAUSE); ++ break; ++ case HW_VAR_TX_BCN_DONE: ++ { ++ u32 xmitbcnDown; ++ xmitbcnDown= rtw_read32(Adapter, REG_TDECTRL); ++ if(xmitbcnDown & BCN_VALID ){ ++ rtw_write32(Adapter,REG_TDECTRL, xmitbcnDown | BCN_VALID ); // write 1 to clear, Clear by sw ++ val[0] = _TRUE; ++ } ++ } ++ break; ++ case HW_VAR_DM_FLAG: ++ val[0] = pHalData->dmpriv.DMFlag; ++ break; ++ case HW_VAR_RF_TYPE: ++ val[0] = pHalData->rf_type; ++ break; ++ case HW_VAR_FWLPS_RF_ON: ++ { ++ //When we halt NIC, we should check if FW LPS is leave. ++ u32 valRCR; ++ ++ if(Adapter->pwrctrlpriv.rf_pwrstate == rf_off) ++ { ++ // If it is in HW/SW Radio OFF or IPS state, we do not check Fw LPS Leave, ++ // because Fw is unload. ++ val[0] = _TRUE; ++ } ++ else ++ { ++ valRCR = rtw_read32(Adapter, REG_RCR); ++ valRCR &= 0x00070000; ++ if(valRCR) ++ val[0] = _FALSE; ++ else ++ val[0] = _TRUE; ++ } ++ } ++ break; ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ case HW_VAR_CURRENT_ANTENNA: ++ val[0] = pHalData->CurAntenna; ++ break; ++#endif ++ case HW_VAR_EFUSE_BYTES: // To get EFUE total used bytes, added by Roger, 2008.12.22. ++ *((u16 *)(val)) = pHalData->EfuseUsedBytes; ++ break; ++ default: ++ break; ++ } ++ ++_func_exit_; ++} ++ ++// ++// Description: ++// Query setting of specified variable. ++// ++u8 ++GetHalDefVar8192CUsb( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _TRUE; ++ ++ switch(eVariable) ++ { ++ case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB: ++ *((int *)pValue) = pHalData->dmpriv.UndecoratedSmoothedPWDB; ++ break; ++ case HAL_DEF_IS_SUPPORT_ANT_DIV: ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ *((u8 *)pValue) = (IS_92C_SERIAL(pHalData->VersionID) ||(pHalData->AntDivCfg==0))?_FALSE:_TRUE; ++ #endif ++ break; ++ case HAL_DEF_CURRENT_ANTENNA: ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ *(( u8*)pValue) = pHalData->CurAntenna; ++ #endif ++ break; ++ case HAL_DEF_DRVINFO_SZ: ++ *(( u32*)pValue) = DRVINFO_SZ; ++ break; ++ case HAL_DEF_MAX_RECVBUF_SZ: ++ *(( u32*)pValue) = MAX_RECVBUF_SZ; ++ break; ++ case HAL_DEF_RX_PACKET_OFFSET: ++ *(( u32*)pValue) = RXDESC_SIZE + DRVINFO_SZ; ++ break; ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ *(( u8*)pValue) = pHalData->bDumpRxPkt; ++ break; ++ case HAL_DEF_DBG_DM_FUNC: ++ *(( u8*)pValue) = pHalData->dmpriv.DMFlag; ++ break; ++ default: ++ //RT_TRACE(COMP_INIT, DBG_WARNING, ("GetHalDefVar8192CUsb(): Unkown variable: %d!\n", eVariable)); ++ bResult = _FALSE; ++ break; ++ } ++ ++ return bResult; ++} ++ ++ ++ ++ ++// ++// Description: ++// Change default setting of specified variable. ++// ++u8 ++SetHalDefVar8192CUsb( ++ IN PADAPTER Adapter, ++ IN HAL_DEF_VARIABLE eVariable, ++ IN PVOID pValue ++ ) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(Adapter); ++ u8 bResult = _TRUE; ++ ++ switch(eVariable) ++ { ++ case HAL_DEF_DBG_DUMP_RXPKT: ++ pHalData->bDumpRxPkt = *(( u8*)pValue); ++ break; ++ case HAL_DEF_DBG_DM_FUNC: ++ { ++ u8 dm_func = *(( u8*)pValue); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ ++ if(dm_func == 0){ //disable all dynamic func ++ pdmpriv->DMFlag = DYNAMIC_FUNC_DISABLE; ++ DBG_8192C("==> Disable all dynamic function...\n"); ++ } ++ else if(dm_func == 1){//disable DIG ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_DIG); ++ DBG_8192C("==> Disable DIG...\n"); ++ } ++ else if(dm_func == 2){//disable High power ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_HP); ++ } ++ else if(dm_func == 3){//disable tx power tracking ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_SS); ++ DBG_8192C("==> Disable tx power tracking...\n"); ++ } ++ else if(dm_func == 4){//disable BT coexistence ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_BT); ++ } ++ else if(dm_func == 5){//disable antenna diversity ++ pdmpriv->DMFlag &= (~DYNAMIC_FUNC_ANT_DIV); ++ } ++ else if(dm_func == 6){//turn on all dynamic func ++ if(!(pdmpriv->DMFlag & DYNAMIC_FUNC_DIG)) ++ { ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ DIG_T *pDigTable = &pdmpriv->DM_DigTable; ++ pDigTable->PreIGValue = rtw_read8(Adapter,0xc50); ++ } ++ ++ pdmpriv->DMFlag |= (DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS| ++ DYNAMIC_FUNC_BT|DYNAMIC_FUNC_ANT_DIV) ; ++ DBG_8192C("==> Turn on all dynamic function...\n"); ++ } ++ } ++ break; ++ default: ++ //RT_TRACE(COMP_INIT, DBG_TRACE, ("SetHalDefVar819xUsb(): Unkown variable: %d!\n", eVariable)); ++ bResult = _FALSE; ++ break; ++ } ++ ++ return bResult; ++} ++ ++u32 _update_92cu_basic_rate(_adapter *padapter, unsigned int mask) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ unsigned int BrateCfg = 0; ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pbtpriv->BT_Coexist) && (pbtpriv->BT_CoexistType == BT_CSR_BC4) ) ++ { ++ BrateCfg = mask & 0x151; ++ //DBG_8192C("BT temp disable cck 2/5.5/11M, (0x%x = 0x%x)\n", REG_RRSR, BrateCfg & 0x151); ++ } ++ else ++#endif ++ { ++ if(pHalData->VersionID != VERSION_TEST_CHIP_88C) ++ BrateCfg = mask & 0x15F; ++ else //for 88CU 46PING setting, Disable CCK 2M, 5.5M, Others must tuning ++ BrateCfg = mask & 0x159; ++ } ++ ++ BrateCfg |= 0x01; // default enable 1M ACK rate ++ ++ return BrateCfg; ++} ++ ++void _update_response_rate(_adapter *padapter,unsigned int mask) ++{ ++ u8 RateIndex = 0; ++ // Set RRSR rate table. ++ rtw_write8(padapter, REG_RRSR, mask&0xff); ++ rtw_write8(padapter,REG_RRSR+1, (mask>>8)&0xff); ++ ++ // Set RTS initial rate ++ while(mask > 0x1) ++ { ++ mask = (mask>> 1); ++ RateIndex++; ++ } ++ rtw_write8(padapter, REG_INIRTS_RATE_SEL, RateIndex); ++} ++ ++void UpdateHalRAMask8192CUsb(PADAPTER padapter, u32 mac_id) ++{ ++ //volatile unsigned int result; ++ u8 init_rate=0; ++ u8 networkType, raid; ++ u32 mask; ++ u8 shortGIrate = _FALSE; ++ int supportRateNum = 0; ++ struct sta_info *psta; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *cur_network = &(pmlmeinfo->network); ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv *pbtpriv = &(pHalData->bt_coexist); ++#endif ++ ++ if (mac_id >= NUM_STA) //CAM_SIZE ++ { ++ return; ++ } ++ ++ psta = pmlmeinfo->FW_sta_info[mac_id].psta; ++ if(psta == NULL) ++ { ++ return; ++ } ++ ++ switch (mac_id) ++ { ++ case 0:// for infra mode ++ supportRateNum = rtw_get_rateset_len(cur_network->SupportedRates); ++ networkType = judge_network_type(padapter, cur_network->SupportedRates, supportRateNum) & 0xf; ++ //pmlmeext->cur_wireless_mode = networkType; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= (pmlmeinfo->HT_enable)? update_MSC_rate(&(pmlmeinfo->HT_caps)): 0; ++ mask |= ((raid<<28)&0xf0000000); ++ ++ if (support_short_GI(padapter, &(pmlmeinfo->HT_caps))) ++ { ++ shortGIrate = _TRUE; ++ } ++ ++ break; ++ ++ case 1://for broadcast/multicast ++ supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); ++ if(pmlmeext->cur_wireless_mode & WIRELESS_11B) ++ networkType = WIRELESS_11B; ++ else ++ networkType = WIRELESS_11G; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_basic_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= ((raid<<28)&0xf0000000); ++ ++ break; ++ ++ default: //for each sta in IBSS ++ supportRateNum = rtw_get_rateset_len(pmlmeinfo->FW_sta_info[mac_id].SupportedRates); ++ networkType = judge_network_type(padapter, pmlmeinfo->FW_sta_info[mac_id].SupportedRates, supportRateNum) & 0xf; ++ //pmlmeext->cur_wireless_mode = networkType; ++ raid = networktype_to_raid(networkType); ++ ++ mask = update_supported_rate(cur_network->SupportedRates, supportRateNum); ++ mask |= ((raid<<28)&0xf0000000); ++ ++ //todo: support HT in IBSS ++ ++ break; ++ } ++ ++#ifdef CONFIG_BT_COEXIST ++ if( (pbtpriv->BT_Coexist) && ++ (pbtpriv->BT_CoexistType == BT_CSR_BC4) && ++ (pbtpriv->BT_CUR_State) && ++ (pbtpriv->BT_Ant_isolation) && ++ ((pbtpriv->BT_Service==BT_SCO)|| ++ (pbtpriv->BT_Service==BT_Busy)) ) ++ mask &= 0xffffcfc0; ++ else ++#endif ++ mask &=0xffffffff; ++ ++ ++ init_rate = get_highest_rate_idx(mask)&0x3f; ++ ++ if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg = 0; ++ ++ //arg = (cam_idx-4)&0x1f;//MACID ++ arg = mac_id&0x1f;//MACID ++ ++ arg |= BIT(7); ++ ++ if (shortGIrate==_TRUE) ++ arg |= BIT(5); ++ ++ DBG_871X("update raid entry, mask=0x%x, arg=0x%x\n", mask, arg); ++ psta->ra_mask=mask; ++#ifdef CONFIG_INTEL_PROXIM ++ if(padapter->proximity.proxim_on ==_TRUE){ ++ arg &= ~BIT(6); ++ } ++ else { ++ arg |= BIT(6); ++ } ++#endif //CONFIG_INTEL_PROXIM ++ rtl8192c_set_raid_cmd(padapter, mask, arg); ++ ++ } ++ else ++ { ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ rtw_write8(padapter, (REG_INIDATA_RATE_SEL+mac_id), init_rate); ++ } ++ ++ ++ //set ra_id ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ //set correct initial date rate for each mac_id ++ pdmpriv->INIDATA_RATE[mac_id] = init_rate; ++} ++ ++void SetBeaconRelatedRegisters8192CUsb(PADAPTER padapter) ++{ ++ u32 value32; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //reset TSF, enable update TSF, correcting TSF On Beacon ++ ++ //REG_BCN_INTERVAL ++ //REG_BCNDMATIM ++ //REG_ATIMWND ++ //REG_TBTT_PROHIBIT ++ //REG_DRVERLYINT ++ //REG_BCN_MAX_ERR ++ //REG_BCNTCFG //(0x510) ++ //REG_DUAL_TSF_RST ++ //REG_BCN_CTRL //(0x550) ++ ++ //BCN interval ++ rtw_write16(padapter, REG_BCN_INTERVAL, pmlmeinfo->bcn_interval); ++ rtw_write8(padapter, REG_ATIMWND, 0x02);// 2ms ++ ++ _InitBeaconParameters(padapter); ++ ++ rtw_write8(padapter, REG_SLOT, 0x09); ++ ++ value32 =rtw_read32(padapter, REG_TCR); ++ value32 &= ~TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ value32 |= TSFRST; ++ rtw_write32(padapter, REG_TCR, value32); ++ ++ // NOTE: Fix test chip's bug (about contention windows's randomness) ++ rtw_write8(padapter, REG_RXTSF_OFFSET_CCK, 0x50); ++ rtw_write8(padapter, REG_RXTSF_OFFSET_OFDM, 0x50); ++ ++ _BeaconFunctionEnable(padapter, _TRUE, _TRUE); ++ ++ ResumeTxBeacon(padapter); ++ ++ //rtw_write8(padapter, 0x422, rtw_read8(padapter, 0x422)|BIT(6)); ++ ++ //rtw_write8(padapter, 0x541, 0xff); ++ ++ //rtw_write8(padapter, 0x542, rtw_read8(padapter, 0x541)|BIT(0)); ++ ++ rtw_write8(padapter, REG_BCN_CTRL, rtw_read8(padapter, REG_BCN_CTRL)|BIT(1)); ++ ++} ++ ++static void rtl8192cu_init_default_value(_adapter * padapter) ++{ ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ struct dm_priv *pdmpriv = &pHalData->dmpriv; ++ u8 i; ++ ++ //init default value ++ pHalData->fw_ractrl = _FALSE; ++ pHalData->bIQKInitialized = _FALSE; ++ if(!pwrctrlpriv->bkeepfwalive) ++ pHalData->LastHMEBoxNum = 0; ++ ++ pHalData->bIQKInitialized = _FALSE; ++ //init dm default value ++ pdmpriv->TM_Trigger = 0; ++ pdmpriv->binitialized = _FALSE; ++ pdmpriv->prv_traffic_idx = 3; ++ pdmpriv->initialize = 0; ++ ++ pdmpriv->ThermalValue_HP_index = 0; ++ for(i = 0; i < HP_THERMAL_NUM; i++) ++ pdmpriv->ThermalValue_HP[i] = 0; ++} ++static u8 rtl8192cu_ps_func(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8 *val) ++{ ++ u8 bResult = _TRUE; ++ switch(efunc_id){ ++ ++ #if defined(CONFIG_AUTOSUSPEND) && defined(SUPPORT_HW_RFOFF_DETECTED) ++ case HAL_USB_SELECT_SUSPEND: ++ { ++ u8 bfwpoll = *(( u8*)val); ++ rtl8192c_set_FwSelectSuspend_cmd(Adapter,bfwpoll ,500);//note fw to support hw power down ping detect ++ } ++ break; ++ #endif //CONFIG_AUTOSUSPEND && SUPPORT_HW_RFOFF_DETECTED ++ ++ default: ++ break; ++ } ++ return bResult; ++} ++void rtl8192cu_set_hal_ops(_adapter * padapter) ++{ ++ struct hal_ops *pHalFunc = &padapter->HalFunc; ++ ++_func_enter_; ++ ++ padapter->HalData = rtw_zmalloc(sizeof(HAL_DATA_TYPE)); ++ if(padapter->HalData == NULL){ ++ DBG_8192C("cant not alloc memory for HAL DATA \n"); ++ } ++ //_rtw_memset(padapter->HalData, 0, sizeof(HAL_DATA_TYPE)); ++ ++ pHalFunc->hal_init = &rtl8192cu_hal_init; ++ pHalFunc->hal_deinit = &rtl8192cu_hal_deinit; ++ ++ //pHalFunc->free_hal_data = &rtl8192c_free_hal_data; ++ ++ pHalFunc->inirp_init = &rtl8192cu_inirp_init; ++ pHalFunc->inirp_deinit = &rtl8192cu_inirp_deinit; ++ ++ pHalFunc->init_xmit_priv = &rtl8192cu_init_xmit_priv; ++ pHalFunc->free_xmit_priv = &rtl8192cu_free_xmit_priv; ++ ++ pHalFunc->init_recv_priv = &rtl8192cu_init_recv_priv; ++ pHalFunc->free_recv_priv = &rtl8192cu_free_recv_priv; ++#ifdef CONFIG_SW_LED ++ pHalFunc->InitSwLeds = &rtl8192cu_InitSwLeds; ++ pHalFunc->DeInitSwLeds = &rtl8192cu_DeInitSwLeds; ++#else //case of hw led or no led ++ pHalFunc->InitSwLeds = NULL; ++ pHalFunc->DeInitSwLeds = NULL; ++#endif//CONFIG_SW_LED ++ ++ //pHalFunc->dm_init = &rtl8192c_init_dm_priv; ++ //pHalFunc->dm_deinit = &rtl8192c_deinit_dm_priv; ++ ++ pHalFunc->init_default_value = &rtl8192cu_init_default_value; ++ pHalFunc->intf_chip_configure = &rtl8192cu_interface_configure; ++ pHalFunc->read_adapter_info = &ReadAdapterInfo8192CU; ++ ++ //pHalFunc->set_bwmode_handler = &PHY_SetBWMode8192C; ++ //pHalFunc->set_channel_handler = &PHY_SwChnl8192C; ++ ++ //pHalFunc->hal_dm_watchdog = &rtl8192c_HalDmWatchDog; ++ ++ pHalFunc->SetHwRegHandler = &SetHwReg8192CU; ++ pHalFunc->GetHwRegHandler = &GetHwReg8192CU; ++ pHalFunc->GetHalDefVarHandler = &GetHalDefVar8192CUsb; ++ pHalFunc->SetHalDefVarHandler = &SetHalDefVar8192CUsb; ++ ++ pHalFunc->UpdateRAMaskHandler = &UpdateHalRAMask8192CUsb; ++ pHalFunc->SetBeaconRelatedRegistersHandler = &SetBeaconRelatedRegisters8192CUsb; ++ ++ //pHalFunc->Add_RateATid = &rtl8192c_Add_RateATid; ++ ++//#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //pHalFunc->SwAntDivBeforeLinkHandler = &SwAntDivBeforeLink8192C; ++ //pHalFunc->SwAntDivCompareHandler = &SwAntDivCompare8192C; ++//#endif ++ ++ pHalFunc->hal_xmit = &rtl8192cu_hal_xmit; ++ pHalFunc->mgnt_xmit = &rtl8192cu_mgnt_xmit; ++ ++ //pHalFunc->read_bbreg = &rtl8192c_PHY_QueryBBReg; ++ //pHalFunc->write_bbreg = &rtl8192c_PHY_SetBBReg; ++ //pHalFunc->read_rfreg = &rtl8192c_PHY_QueryRFReg; ++ //pHalFunc->write_rfreg = &rtl8192c_PHY_SetRFReg; ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ pHalFunc->hostap_mgnt_xmit_entry = &rtl8192cu_hostap_mgnt_xmit_entry; ++#endif ++ pHalFunc->interface_ps_func = &rtl8192cu_ps_func; ++ ++ rtl8192c_set_hal_ops(pHalFunc); ++_func_exit_; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_ce.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1208 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++ ++#ifndef PLATFORM_OS_CE ++ #error "PLATFORM_OS_CE shall be set \n" ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ #error "CONFIG_USB_HCI shall be on!\n" ++#endif ++ ++#include ++#include ++ ++#include ++ ++ ++struct zero_bulkout_context ++{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++ ++ ++#define PUSB_ERROR LPDWORD ++#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) ++ ++ ++USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr); ++ ++ ++static NTSTATUS usb_async_interrupt_in_complete( LPVOID Context ); ++static NTSTATUS usb_async_interrupt_out_complete( LPVOID Context ); ++ ++DWORD usb_write_port_complete( LPVOID Context ); ++DWORD usb_read_port_complete( LPVOID Context ); ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++_func_exit_; ++} ++ ++ ++ ++BOOL ++CloseTransferHandle( ++ LPCUSB_FUNCS pUsbFuncs, ++ USB_TRANSFER hTransfer ++ ) ++{ ++ BOOL bRc = TRUE; ++ ++ // This assert may fail on suprise remove, ++ // but should pass during normal I/O. ++ // ASSERT( pUsbFuncs->lpIsTransferComplete(hTransfer) ); ++ ++ // CloseTransfer aborts any pending transfers ++ if ( !pUsbFuncs->lpCloseTransfer(hTransfer) ) { ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError())); ++ bRc = FALSE; ++ } ++ ++ return bRc; ++} ++ ++ ++BOOL ++GetTransferStatus( ++ LPCUSB_FUNCS pUsbFuncs, ++ USB_TRANSFER hTransfer, ++ LPDWORD pBytesTransferred , // OPTIONAL returns number of bytes transferred ++ PUSB_ERROR pUsbError // returns USB error code ++ ) ++{ ++ ++ BOOL bRc = TRUE; ++ ++ if ( pUsbFuncs->lpGetTransferStatus(hTransfer, pBytesTransferred, pUsbError) ) { ++ if ( USB_NO_ERROR != *pUsbError ) { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("*** CloseTransfer ERROR:%d ***\n", GetLastError())); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("GetTransferStatus (BytesTransferred:%d, UsbError:0x%x)\n", pBytesTransferred?*pBytesTransferred:-1, pUsbError?*pUsbError:-1 )); ++ } ++ } else { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_,("*** GetTransferStatus ERROR:%d ***\n", GetLastError())); ++ *pUsbError = USB_CANCELED_ERROR; ++ bRc = FALSE; ++ } ++ ++ return bRc; ++} ++ ++ ++// The driver should never read RxCmd register. We have to set ++// RCR CMDHAT0 (bit6) to append Rx status before the Rx frame. ++// ++// |<-------- pBulkUrb->TransferBufferLength ------------>| ++// +------------------+-------------------+------------+ ++// | Rx status (16 bytes) | Rx frame ..... | CRC(4 bytes) | ++// +------------------+-------------------+------------+ ++// ^ ++// ^pRfd->Buffer.VirtualAddress ++// ++/*! \brief USB RX IRP Complete Routine. ++ @param Context pointer of RT_RFD ++*/ ++u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ _adapter *adapter = (_adapter *)pdvobj_priv->padapter; ++ ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ DWORD dwErr = ERROR_SUCCESS ; ++ DWORD dwBytesTransferred = 0 ; ++ USB_TRANSFER hTransfer = NULL; ++ USB_PIPE hPipe; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__)); ++ ++#if (CONFIG_PWRCTRL == 1) ++ if (adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ return _FALSE; ++ } ++#endif ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved) ++ { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_info_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved)!!!\n")); ++ return _FALSE; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ ++ // get a recv buffer ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt++; ++ precvbuf->irp_pending = _TRUE; ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port(%u)\n", __LINE__)); ++ ++ precvbuf->usb_transfer_read_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, ++ usb_read_port_complete, ++ precvbuf, ++ USB_IN_TRANSFER|USB_SHORT_TRANSFER_OK, ++ MAX_RECVBUF_SZ, ++ precvbuf->pbuf, ++ 0); ++ ++ ++ if(precvbuf->usb_transfer_read_port) ++ { ++ ++ // GetTransferStatus(usb_funcs_vp, hTransfer, &dwBytesTransferred,&UsbRc); ++ ++ // CloseTransferHandle(usb_funcs_vp, hTransfer); ++ ++ } ++ else ++ { ++ ++ dwErr = GetLastError(); ++ //RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr)); ++ ++ } ++ ++// if ( USB_NO_ERROR != UsbRc && ERROR_SUCCESS == dwErr) { ++// dwErr = ERROR_GEN_FAILURE; ++// } ++ ++ ++ if ( ERROR_SUCCESS != dwErr ) { ++ ++ SetLastError(dwErr); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port ERROR : %d\n", dwErr)); ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port(%u)\n", __LINE__)); ++ ++ } ++ else // if(precvbuf !=NULL) ++ { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n")); ++ } ++ ++ return _TRUE; ++ ++} ++ ++DWORD usb_read_port_complete( PVOID context ) ++{ ++ struct recv_buf *precvbuf = (struct recv_buf *)context; ++ _adapter *adapter = (_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ ++ ++ struct intf_hdl *pintfhdl = &adapter->pio_queue->intf; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ uint isevt, *pbuf; ++ int fComplete =_FALSE; ++ ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_complete(%u)\n", __LINE__)); ++ ++_func_enter_; ++ ++ ++ _rtw_spinlock_ex(&precvpriv->lock); ++ precvbuf->irp_pending=_FALSE; ++ precvpriv->rx_pending_cnt --; ++ _rtw_spinunlock_ex(&precvpriv->lock); ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(precvbuf->usb_transfer_read_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(precvbuf->usb_transfer_read_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(precvbuf->usb_transfer_read_port); ++ ++ ++#endif ++ ++ ++ if(USB_NO_ERROR != dwErr) ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_read_port_complete Fail :%d\n",dwErr)); ++ ++ { ++ ++ if ( dwBytesTransferred > MAX_RECVBUF_SZ || dwBytesTransferred < RXDESC_SIZE ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_, ++ ("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE): %d\n",dwBytesTransferred)); ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ ++ //usb_read_port(pintfhdl, 0, 0, (unsigned char *)precvframe); ++ } ++ else ++ { ++ precvbuf->transfer_len = dwBytesTransferred; ++ ++ pbuf = (uint*)precvbuf->pbuf; ++ ++ if((isevt = *(pbuf+1)&0x1ff) == 0x1ff) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_, ++ ("\n usb_read_port_complete: get a event\n")); ++ rxcmd_event_hdl(adapter, pbuf);//rx c2h events ++ ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets ++ { ++ //precvbuf->reuse = _TRUE; ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ } ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_read_port_complete(%u)\n", __LINE__)); ++ ++_func_exit_; ++ return ERROR_SUCCESS; ++// return STATUS_MORE_PROCESSING_REQUIRED; ++} ++ ++void usb_read_port_cancel(_adapter *padapter){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_read_port_cancel(%u)\n",__FUNCTION__, __LINE__)); ++} ++ ++DWORD usb_write_mem_complete( LPVOID Context ) ++{ ++ int fComplete =_FALSE; ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ _irqL irqL; ++ _list *head; ++ _list *plist; ++ struct io_req *pio_req; ++ struct io_queue *pio_q = (struct io_queue *) Context; ++ struct intf_hdl *pintf = &(pio_q->intf); ++ struct intf_priv *pintfpriv = pintf->pintfpriv; ++ _adapter *padapter = (_adapter *)pintf->adapter; ++ NTSTATUS status = STATUS_SUCCESS; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ USB_HANDLE usbHandle = pdvobj_priv->usb_extension._hDevice; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ // get the head from the processing io_queue ++ head = &(pio_q->processing); ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_mem_complete %p\n", Context)); ++ ++#if 1 ++ _enter_critical_bh(&(pio_q->lock), &irqL); ++ ++ ++ //free irp in processing list... ++ while(rtw_is_list_empty(head) != _TRUE) ++ { ++ plist = get_next(head); ++ rtw_list_delete(plist); ++ pio_req = LIST_CONTAINOR(plist, struct io_req, list); ++ _rtw_up_sema(&pio_req->sema); ++ } ++ ++ _exit_critical_bh(&(pio_q->lock), &irqL); ++#endif ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem ); ++ ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem_complete\n")); ++ ++_func_exit_; ++ ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++ ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++ NTSTATUS NtStatus = STATUS_SUCCESS; ++ USB_PIPE hPipe; ++ _irqL irqL; ++ ++ int fComplete = _FALSE; ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ ++ struct io_req *pio_req; ++ ++ _adapter *adapter = (_adapter *)pintfhdl->adapter; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ ++ ++ struct xmit_priv *pxmitpriv = &adapter->xmitpriv; ++ struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_mem(%u) pintfhdl %p wmem %p\n", __LINE__, pintfhdl, wmem)); ++ ++ // fetch a io_request from the io_queue ++ pio_req = alloc_ioreq(pio_queue); ++ ++ if ((pio_req == NULL)||(adapter->bSurpriseRemoved)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved )); ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pio_queue->lock), &irqL); ++ ++ ++ // insert the io_request into processing io_queue ++ rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing)); ++ ++ ++ if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ goto exit; ++ } ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_,("usb_write_mem(%u)\n",__LINE__)); ++ ++ pio_req->usb_transfer_write_mem = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, ++ usb_write_mem_complete, ++ pio_queue, ++ USB_OUT_TRANSFER, ++ cnt, ++ wmem, ++ 0); ++ ++#if 0 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pio_req->usb_transfer_write_mem , &dwBytes, &dwErr); ++ ++ while( fComplete != _TRUE) ++ { ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pio_req->usb_transfer_write_mem); ++ if(fComplete==_TRUE) ++ { ++ (*usb_funcs_vp->lpCloseTransfer)(pio_req->usb_transfer_write_mem ); ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_mem finished\n")); ++ break; ++ } ++ else ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ++ ("usb_write_mem not yet finished %X\n", ++ pio_req->usb_transfer_write_mem)); ++ rtw_msleep_os(10); ++ } ++ ++ } ++ ++#endif ++ ++ ++// _rtw_down_sema(&pio_req->sema); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("-usb_write_mem(%X)\n",pio_req->usb_transfer_write_mem)); ++ ++ _exit_critical_bh(&(pio_queue->lock), &irqL); ++ ++ _rtw_down_sema(&pio_req->sema); ++ free_ioreq(pio_req, pio_queue); ++ ++exit: ++_func_exit_; ++ return; ++} ++ ++u32 usb_write_cnt=0; ++u32 usb_complete_cnt=0; ++ ++USB_PIPE ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr) ++{ ++ USB_PIPE PipeHandle = NULL; ++ _adapter *padapter = pNdisCEDvice->padapter; ++ ++ ++ if(pNdisCEDvice->nr_endpoint == 11) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_BCNQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[6]; ++ break; ++ case RTL8712_DMA_BMCQ: //HI Queue ++ PipeHandle= padapter->halpriv.pipehdls_r8712[7]; ++ break; ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[8]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[9]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 6) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 4) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VIQ: ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint)); ++ } ++ ++ return PipeHandle; ++ ++} ++ ++DWORD usb_bulkout_zero_complete( LPVOID pZeroContext ) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext; ++ _adapter * padapter = pcontext->padapter; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++_func_enter_; ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_bulkout_zero_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ ++#endif ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ rtw_mfree(pcontext->pbuf, sizeof(int)); ++ } ++ ++ rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context)); ++ } ++ ++_func_exit_; ++ ++ return ERROR_SUCCESS; ++ ++ ++} ++ ++u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ struct zero_bulkout_context *pcontext; ++ unsigned char *pbuf; ++ u8 len = 0 ; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj->usb_extension._lpUsbFuncs; ++ ++ USB_PIPE hPipe; ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ ++ pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context)); ++ ++ pbuf = (unsigned char *)rtw_zmalloc(sizeof(int)); ++ ++ len = 0; ++ ++ pcontext->pbuf = pbuf; ++ pcontext->purb = NULL; ++ pcontext->pirp = NULL; ++ pcontext->padapter = padapter; ++ ++ ++//translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ ++ ++ ++ pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, usb_bulkout_zero_complete, ++ pcontext, USB_OUT_TRANSFER, ++ len, pbuf, 0); ++ ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++ u32 i, bwritezero = _FALSE; ++ u32 ac_tag = addr; ++ ++ u8* ptr; ++ ++ struct intf_priv * pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ _adapter * padapter = pdvobj_priv->padapter; ++ ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame * pxmitframe = (struct xmit_frame *)wmem; ++ ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ USB_PIPE hPipe; ++ ++ u32 bResult = _FALSE; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("+usb_write_port\n")); ++ ++#if (CONFIG_PWRCTRL == 1) ++ if(padapter->pwrctrlpriv.pnp_bstop_trx==_TRUE){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ ++ } ++#endif ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ bResult = _FALSE; ++ goto exit; ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port(%u)\n", __LINE__)); ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitframe->bpending[i] == _FALSE) ++ { ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt++; ++ pxmitframe->bpending[i] = _TRUE; ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ pxmitframe->sz[i] = cnt; ++ pxmitframe->ac_tag[i] = ac_tag; ++ ++ break; ++ } ++ } ++ ++ ++ //TODO: ++ if (pdvobj_priv->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt)); ++ // cnt=cnt+1; ++ bwritezero = _TRUE; ++ ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("cnt=%d\n", cnt)); ++ // cnt=cnt+1; ++ bwritezero = _TRUE; ++ ++ } ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("usb_write_port: pipe handle convert\n")); ++ ++ //translate DMA FIFO addr to pipehandle ++ hPipe = ffaddr2pipehdl(pdvobj_priv, addr); ++ ++ ++#if 0 ++ // for tx fifo, the maximum payload number is 8, ++ // we workaround this issue here by separate whole fifo into 8 segments. ++ if (cnt <= 500) ++ cnt = 500; ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ++ ("usb_write_port(%u): pxmitframe %X pxmitframe->padapter %X\n",__LINE__, pxmitframe, pxmitframe->padapter)); ++ ++ pxmitpriv->usb_transfer_write_port = (*usb_funcs_vp->lpIssueBulkTransfer)( ++ hPipe, usb_write_port_complete, ++ pxmitframe, USB_OUT_TRANSFER, ++ cnt, pxmitframe->mem_addr, 0); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ ++ ptr=(u8 *)&pxmitframe->mem; ++ ++#if 0 ++ if (pdvobj_priv->ishighspeed) ++ { ++ ptr=ptr+512; ++ } ++ else ++ { ++ ptr=ptr+64; ++ ++ } ++#endif ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++// if (!pxmitframe->usb_transfer_xmit) ++// padapter->bSurpriseRemoved=_TRUE; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ bResult = _SUCCESS; ++ ++exit: ++_func_exit_; ++ return bResult; ++} ++ ++DWORD usb_write_port_complete( LPVOID Context ) ++{ ++ ++// u8 *ptr; ++ ++ struct xmit_frame * pxmitframe = (struct xmit_frame *) Context; ++ _adapter * padapter = pxmitframe->padapter; ++ struct dvobj_priv * pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv * pxmitpriv = &padapter->xmitpriv; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ LPCUSB_FUNCS usb_funcs_vp = pdvobj_priv->usb_extension._lpUsbFuncs; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u), pxmitframe %X\n",__FUNCTION__, __LINE__, Context)); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("+usb_write_port_complete\n")); ++ ++ _rtw_spinlock_ex(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; ++ _rtw_spinunlock_ex(&pxmitpriv->lock); ++ ++ if(pxmitpriv->txirp_cnt==0){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++ ++ ++ //not to consider tx fragment ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++ ++#if 1 ++ ++ (*usb_funcs_vp->lpGetTransferStatus)(pxmitpriv->usb_transfer_write_port, &dwBytesTransferred, &dwErr); ++ fComplete = (*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_port_complete CloseTransfer before complete\n")); ++ } ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ ++#else ++ ++ if((*usb_funcs_vp->lpIsTransferComplete)(pxmitpriv->usb_transfer_write_port)) ++ { ++ (*usb_funcs_vp->lpCloseTransfer)(pxmitpriv->usb_transfer_write_port); ++ } ++ ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ++ ("%s(%u): pxmitpriv %X pxmitpriv->free_xmitframe_cnt %X pxmitframe->padapter %X pxmitframe->padapter %X\n", ++ __LINE__, pxmitpriv, pxmitpriv->free_xmitframe_cnt, pxmitframe->padapter)); ++ ++ rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf); ++ ++_func_exit_; ++ ++ return STATUS_SUCCESS; ++} ++ ++DWORD usb_write_scsi_complete(LPVOID pTxContext) ++{ ++#ifndef PLATFORM_OS_CE ++ struct SCSI_BUFFER_ENTRY *psb_entry = (struct SCSI_BUFFER_ENTRY *)pTxContext; ++ _adapter *padapter = psb_entry->padapter; ++ struct SCSI_BUFFER *psb = padapter->pscsi_buf; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct dvobj_priv *pdvobj_priv = (struct dvobj_priv *)&padapter->dvobjpriv; ++ LPCUSB_FUNCS lpUsbFuncs = pdvobj_priv->pUsbExtension->_lpUsbFuncs; ++ ++ int fComplete =_FALSE; ++ DWORD dwBytesTransferred = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ ++_func_enter_; ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u): circ_space = %d\n",__FUNCTION__, __LINE__, CIRC_SPACE( psb->head,psb->tail, SCSI_BUFFER_NUMBER))); ++ ++#if 1 ++ ++ (*lpUsbFuncs->lpGetTransferStatus)(psb_entry->usb_transfer_scsi_txcmd, &dwBytesTransferred, &dwErr); ++ fComplete = (*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd); ++ if(fComplete!=_TRUE) ++ { ++ RT_TRACE( _module_hci_ops_os_c_, _drv_err_, ("usb_write_scsi_complete CloseTransfer before complete\n")); ++ } ++ (*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd); ++ ++#else ++ ++ if((*lpUsbFuncs->lpIsTransferComplete)(psb_entry->usb_transfer_scsi_txcmd)) ++ (*lpUsbFuncs->lpCloseTransfer)(psb_entry->usb_transfer_scsi_txcmd); ++#endif ++ ++ memset(psb_entry->entry_memory, 0, 8); ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if((psb->tail+1)==SCSI_BUFFER_NUMBER) ++ psb->tail=0; ++ else ++ psb->tail++; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if(CIRC_CNT(psb->head,psb->tail,SCSI_BUFFER_NUMBER)==0){ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("write_txcmd_scsififo_callback: up_sema\n")); ++ _rtw_up_sema(&pxmitpriv->xmit_sema); ++ } ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ if(padapter->bSurpriseRemoved) { ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++_func_exit_; ++#endif ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++} ++ ++uint usb_write_scsi(struct intf_hdl *pintfhdl, u32 cnt, u8 *wmem) ++{ ++ ++#ifndef PLATFORM_OS_CE ++ ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdev = (struct dvobj_priv*)&padapter->dvobjpriv; ++ ++ struct SCSI_BUFFER *psb =padapter->pscsi_buf; ++ struct SCSI_BUFFER_ENTRY *psb_entry=LIST_CONTAINOR(wmem,struct SCSI_BUFFER_ENTRY,entry_memory); ++ ++_func_enter_; ++ if(padapter->bSurpriseRemoved||padapter->bDriverStopped) ++ return 0; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ psb_entry->usb_transfer_scsi_txcmd=pdev->pUsbExtension->_lpUsbFuncs->lpIssueBulkTransfer( ++ pdev->scsi_out_pipehandle, ++ usb_write_scsi_complete, ++ psb_entry, ++ USB_OUT_TRANSFER, ++ cnt, ++ wmem, ++ 0); ++ ++_func_exit_; ++#endif ++ ++ return _SUCCESS; ++} ++ ++ ++/* ++ */ ++uint usb_init_intf_priv(struct intf_priv *pintfpriv) ++{ ++ // get the dvobj_priv object ++ struct dvobj_priv * pNdisCEDvice = (struct dvobj_priv *) pintfpriv->intf_dev; ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++ // set init intf_priv init status as _IOREADY ++ pintfpriv->intf_status = _IOREADY; ++ ++ // determine the max io size by dvobj_priv.ishighspeed ++ if(pNdisCEDvice->ishighspeed) ++ pintfpriv->max_iosz = 128; ++ else ++ pintfpriv->max_iosz = 64; ++ ++ // read/write size set as 0 ++ pintfpriv->io_wsz = 0; ++ pintfpriv->io_rsz = 0; ++ ++ // init io_rwmem buffer ++ pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ if (pintfpriv->allocated_io_rwmem == NULL) ++ { ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4); ++ return _FAIL; ++ } ++ else ++ { ++ // word align the io_rwmem ++ pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 - ( (u32)(pintfpriv->allocated_io_rwmem) & 3); ++ } ++ ++#ifndef PLATFORM_OS_CE ++ ++ // init io_r_mem buffer ++ pintfpriv->allocated_io_r_mem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ if (pintfpriv->allocated_io_r_mem == NULL) ++ { ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz +4); ++ return _FAIL; ++ } ++ else ++ { ++ // word align the io_rwmem ++ pintfpriv->io_r_mem = pintfpriv->allocated_io_r_mem + 4 - ( (u32)(pintfpriv->allocated_io_r_mem) & 3); ++ } ++#endif ++ ++ return _SUCCESS; ++} ++ ++void usb_unload_intf_priv(struct intf_priv *pintfpriv) ++{ ++#ifndef PLATFORM_OS_CE ++ ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4); ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_r_mem), pintfpriv->max_iosz+4); ++#endif ++ ++ RT_TRACE( _module_hci_ops_os_c_, _drv_info_, ("%s(%u)\n",__FUNCTION__, __LINE__)); ++} ++ ++ ++ ++void usb_write_port_cancel(_adapter *padapter) ++{ ++ ++ sint i,j; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ struct xmit_frame *pxmitframe; ++ ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ if (pxmitpriv->txirp_cnt) ++ { ++ // Canceling Pending Recv Irp ++ pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf; ++ ++ for( i = 0; i < NR_XMITFRAME; i++ ) ++ { ++ for(j=0;j<8;j++) ++ { ++ if (pxmitframe->bpending[j]==_TRUE) ++ { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n")); ++ ++ } ++ } ++ ++ pxmitframe++; ++ } ++ ++ _rtw_down_sema(&(pxmitpriv->tx_retevt)); ++ ++ } ++ ++} ++ ++DWORD usbctrl_vendorreq_complete(LPVOID lpvNotifyParameter) ++{ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)lpvNotifyParameter; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq_complete\n")); ++ ++ return STATUS_SUCCESS; ++} ++ ++ ++int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ u8 ret=_TRUE; ++// NTSTATUS ntstatus; ++// int fComplete; ++// LPCUSB_DEVICE lpDeviceInfo; ++ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfpriv->intf_dev; ++ ++ USB_TRANSFER usbTrans; ++ USB_DEVICE_REQUEST usb_device_req; ++ USB_HANDLE usbHandle = pdvobjpriv->usb_extension._hDevice; ++ LPCUSB_FUNCS usbFuncs = pdvobjpriv->usb_extension._lpUsbFuncs; ++ ++ u32 transfer_flags = 0; ++ ++ _func_enter_; ++ ++ memset( &usb_device_req, 0, sizeof( USB_DEVICE_REQUEST ) ); ++ ++ if( 0x01 == requesttype ) ++ { ++ usb_device_req.bmRequestType = USB_REQUEST_DEVICE_TO_HOST | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE; ++ } ++ else ++ { ++ usb_device_req.bmRequestType = USB_REQUEST_HOST_TO_DEVICE | USB_REQUEST_VENDOR | USB_REQUEST_FOR_DEVICE; ++ } ++ ++ usb_device_req.bRequest = request; ++ usb_device_req.wValue = value; ++ usb_device_req.wIndex = index; ++ usb_device_req.wLength = len; ++ ++ if (requesttype == 0x01) ++ { ++ transfer_flags = USB_IN_TRANSFER;//read_in ++ } ++ else ++ { ++ transfer_flags= USB_OUT_TRANSFER;//write_out ++ } ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("+usbctrl_vendorreq\n",__FUNCTION__,__LINE__)); ++ ++#if 0 ++ // Remember to add callback for sync ++ usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, ++ usbctrl_vendorreq_complete, pdvobjpriv, ++ transfer_flags, &usb_device_req, pdata, 0); ++#else ++ // Remember to add callback for sync ++ usbTrans = (*usbFuncs->lpIssueVendorTransfer)(usbHandle, ++ NULL, 0, ++ transfer_flags, &usb_device_req, pdata, 0); ++#endif ++ ++// rtw_usleep_os(10); ++ ++ if ( usbTrans ) ++ { ++ DWORD dwBytes = 0; ++ DWORD dwErr = USB_CANCELED_ERROR; ++ int fComplete; ++ ++ (*usbFuncs->lpGetTransferStatus)(usbTrans, &dwBytes, &dwErr); ++ ++ fComplete = (*usbFuncs->lpIsTransferComplete)(usbTrans); ++ ++ if (fComplete== _TRUE) ++ { ++ (*usbFuncs->lpCloseTransfer)(usbTrans); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("usbctrl_vendorreq lpCloseTransfer\n")); ++ } ++ ++ if ( dwErr != USB_NO_ERROR || fComplete != _TRUE) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq lpCloseTransfer without complete\n")); ++ ret = _FALSE; ++ goto exit; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq without usbTrans\n")); ++ ret = _FALSE; ++ goto exit; ++ ++ } ++ ++exit: ++ RT_TRACE(_module_hci_ops_os_c_,_drv_debug_,("-usbctrl_vendorreq\n")); ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_linux.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,2045 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++struct zero_bulkout_context{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++#define REALTEK_USB_VENQT_MAX_BUF_SIZE 254 ++ ++#define RTW_USB_CONTROL_MSG_TIMEOUT_TEST 10 //ms ++#define RTW_USB_CONTROL_MSG_TIMEOUT 500 //ms ++//#define RTW_USB_CONTROL_MSG_TIMEOUT 5000 //ms ++ ++#if defined(CONFIG_VENDOR_REQ_RETRY) && defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++//vendor req retry should be in the situation when each vendor req is atomically submitted from others ++#define MAX_USBCTRL_VENDORREQ_TIMES 10 ++#else ++#define MAX_USBCTRL_VENDORREQ_TIMES 1 ++#endif ++ ++#define RTW_USB_BULKOUT_TIMEOUT 5000 //ms ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++#define _usbctrl_vendorreq_async_callback(urb, regs) _usbctrl_vendorreq_async_callback(urb) ++#define usb_bulkout_zero_complete(purb, regs) usb_bulkout_zero_complete(purb) ++#define usb_write_mem_complete(purb, regs) usb_write_mem_complete(purb) ++#define usb_write_port_complete(purb, regs) usb_write_port_complete(purb) ++#define usb_read_port_complete(purb, regs) usb_read_port_complete(purb) ++#define usb_read_interrupt_complete(purb, regs) usb_read_interrupt_complete(purb) ++#endif ++ ++static int usbctrl_vendorreq(struct dvobj_priv *pdvobjpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ _adapter *padapter = pdvobjpriv->padapter ; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ unsigned int pipe; ++ int status = 0; ++ u32 tmp_buflen=0; ++ u8 reqtype; ++ u8 *pIo_buf; ++ int vendorreq_times = 0; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ u8 *tmp_buf; ++ #else // use stack memory ++ u8 tmp_buf[MAX_USB_IO_CTL_SIZE]; ++ #endif ++ ++ //DBG_871X("%s %s:%d\n",__FUNCTION__, current->comm, current->pid); ++ ++ if((padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq:(padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ status = -EPERM; ++ goto exit; ++ } ++ ++ if(len>MAX_VENDOR_REQ_CMD_SIZE){ ++ DBG_8192C( "[%s] Buffer len error ,vendor request failed\n", __FUNCTION__ ); ++ status = -EINVAL; ++ goto exit; ++ } ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _enter_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); ++ #endif ++ ++ ++ // Acquire IO memory for vendorreq ++#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ pIo_buf = pdvobjpriv->usb_vendor_req_buf; ++#else ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ tmp_buf = rtw_malloc( (u32) len + ALIGNMENT_UNIT); ++ tmp_buflen = (u32)len + ALIGNMENT_UNIT; ++ #else // use stack memory ++ tmp_buflen = MAX_USB_IO_CTL_SIZE; ++ #endif ++ ++ // Added by Albert 2010/02/09 ++ // For mstar platform, mstar suggests the address for USB IO should be 16 bytes alignment. ++ // Trying to fix it here. ++ pIo_buf = (tmp_buf==NULL)?NULL:tmp_buf + ALIGNMENT_UNIT -((SIZE_PTR)(tmp_buf) & 0x0f ); ++#endif ++ ++ if ( pIo_buf== NULL) { ++ DBG_8192C( "[%s] pIo_buf == NULL \n", __FUNCTION__ ); ++ status = -ENOMEM; ++ goto release_mutex; ++ } ++ ++ while(++vendorreq_times<= MAX_USBCTRL_VENDORREQ_TIMES) ++ { ++ _rtw_memset(pIo_buf, 0, len); ++ ++ if (requesttype == 0x01) ++ { ++ pipe = usb_rcvctrlpipe(udev, 0);//read_in ++ reqtype = REALTEK_USB_VENQT_READ; ++ } ++ else ++ { ++ pipe = usb_sndctrlpipe(udev, 0);//write_out ++ reqtype = REALTEK_USB_VENQT_WRITE; ++ _rtw_memcpy( pIo_buf, pdata, len); ++ } ++ ++ #if 0 ++ //timeout test for firmware downloading ++ status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len ++ , ((value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) ||value!=0x1000) ?RTW_USB_CONTROL_MSG_TIMEOUT : RTW_USB_CONTROL_MSG_TIMEOUT_TEST ++ ); ++ #else ++ status = rtw_usb_control_msg(udev, pipe, request, reqtype, value, index, pIo_buf, len, RTW_USB_CONTROL_MSG_TIMEOUT); ++ #endif ++ ++ if ( status == len) // Success this control transfer. ++ { ++ rtw_reset_continual_urb_error(&padapter->dvobjpriv); ++ if ( requesttype == 0x01 ) ++ { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. ++ _rtw_memcpy( pdata, pIo_buf, len ); ++ } ++ } ++ else { // error cases ++ DBG_8192C("reg 0x%x, usb %s %u fail, status:%d value=0x%x, vendorreq_times:%d\n" ++ , value,(requesttype == 0x01)?"read":"write" , len, status, *(u32*)pdata, vendorreq_times); ++ ++ if (status < 0) { ++ if(status == (-ESHUTDOWN) || status == -ENODEV ) ++ { ++ padapter->bSurpriseRemoved = _TRUE; ++ } else { ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_VEN_REQ_CMD_FAIL; ++ } ++ #endif ++ } ++ } ++ else // status != len && status >= 0 ++ { ++ if(status > 0) { ++ if ( requesttype == 0x01 ) ++ { // For Control read transfer, we have to copy the read data from pIo_buf to pdata. ++ _rtw_memcpy( pdata, pIo_buf, len ); ++ } ++ } ++ } ++ ++ if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ break; ++ } ++ ++ } ++ ++ // firmware download is checksumed, don't retry ++ if( (value >= FW_8192C_START_ADDRESS && value <= FW_8192C_END_ADDRESS) || status == len ) ++ break; ++ ++ } ++ ++ // release IO memory used by vendorreq ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++ rtw_mfree(tmp_buf, tmp_buflen); ++ #endif ++ ++release_mutex: ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _exit_critical_mutex(&pdvobjpriv->usb_vendor_req_mutex, NULL); ++ #endif ++exit: ++ return status; ++ ++} ++ ++static u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 1; ++ ++ usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return (u8)(le32_to_cpu(data)&0x0ff); ++ ++} ++ ++static u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 2; ++ ++ usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return (u16)(le32_to_cpu(data)&0xffff); ++ ++} ++ ++static u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data=0; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x01;//read_in ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 4; ++ ++ usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return le32_to_cpu(data); ++ ++} ++ ++static int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 1; ++ ++ data = val; ++ data = cpu_to_le32(data&0x000000ff); ++ ++ ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 2; ++ ++ data = val; ++ data = cpu_to_le32(data&0x0000ffff); ++ ++ ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = 4; ++ data = cpu_to_le32(val); ++ ++ ++ ret =usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, &data, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++#define VENDOR_CMD_MAX_DATA_LEN 254 ++static int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u16 len; ++ u8 buf[VENDOR_CMD_MAX_DATA_LEN]={0}; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ ++ _func_enter_; ++ ++ request = 0x05; ++ requesttype = 0x00;//write_out ++ index = 0;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ len = length; ++ _rtw_memcpy(buf, pdata, len ); ++ ++ ret = usbctrl_vendorreq(pdvobjpriv, request, wvalue, index, buf, len, requesttype); ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++static void _usbctrl_vendorreq_async_callback(struct urb *urb, struct pt_regs *regs) ++{ ++ if(urb){ ++ if(urb->context){ ++ kfree(urb->context); ++ } ++ usb_free_urb(urb); ++ } ++} ++ ++static int _usbctrl_vendorreq_async_write(struct usb_device *udev, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ ++ int rc; ++ unsigned int pipe; ++ u8 reqtype; ++ struct usb_ctrlrequest *dr; ++ struct urb *urb; ++ struct rtl819x_async_write_data { ++ u8 data[REALTEK_USB_VENQT_MAX_BUF_SIZE]; ++ struct usb_ctrlrequest dr; ++ } *buf; ++ ++ if (requesttype == VENDOR_READ){ ++ pipe = usb_rcvctrlpipe(udev, 0);//read_in ++ reqtype = REALTEK_USB_VENQT_READ; ++ } ++ else { ++ pipe = usb_sndctrlpipe(udev, 0);//write_out ++ reqtype = REALTEK_USB_VENQT_WRITE; ++ } ++ ++ //buf = kmalloc(sizeof(*buf), GFP_ATOMIC); ++ buf = (struct rtl819x_async_write_data *)rtw_zmalloc(sizeof(*buf)); ++ if (!buf) { ++ rc = -ENOMEM; ++ goto exit; ++ } ++ ++ urb = usb_alloc_urb(0, GFP_ATOMIC); ++ if (!urb) { ++ rtw_mfree((u8*)buf,sizeof(*buf)); ++ rc = -ENOMEM; ++ goto exit; ++ } ++ ++ dr = &buf->dr; ++ ++ dr->bRequestType = reqtype; ++ dr->bRequest = request; ++ dr->wValue = cpu_to_le16(value); ++ dr->wIndex = cpu_to_le16(index); ++ dr->wLength = cpu_to_le16(len); ++ ++ _rtw_memcpy(buf, pdata, len); ++ ++ usb_fill_control_urb(urb, udev, pipe, ++ (unsigned char *)dr, buf, len, ++ _usbctrl_vendorreq_async_callback, buf); ++ ++ rc = usb_submit_urb(urb, GFP_ATOMIC); ++ if (rc < 0) { ++ rtw_mfree((u8*)buf,sizeof(*buf)); ++ usb_free_urb(urb); ++ } ++ ++exit: ++ return rc; ++ ++} ++ ++static int usb_write_async(struct usb_device *udev, u32 addr, u32 val, u16 len) ++{ ++ u8 request; ++ u8 requesttype; ++ u16 wvalue; ++ u16 index; ++ u32 data; ++ int ret; ++ ++ requesttype = VENDOR_WRITE;//write_out ++ request = REALTEK_USB_VENQT_CMD_REQ; ++ index = REALTEK_USB_VENQT_CMD_IDX;//n/a ++ ++ wvalue = (u16)(addr&0x0000ffff); ++ data = val & (0xffffffff >> ((4 - len) * 8)); ++ data = cpu_to_le32(data); ++ ++ ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, &data, len, requesttype); ++ ++ return ret; ++} ++static int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val) ++{ ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = cpu_to_le32(val & 0xFF); ++ ret = usb_write_async(udev, addr, val, 1); ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val) ++{ ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = cpu_to_le32(val & 0xFFFF); ++ ret = usb_write_async(udev, addr, val, 2); ++ _func_exit_; ++ ++ return ret; ++} ++static int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val) ++{ ++ u32 data; ++ int ret; ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ struct usb_device *udev=pdvobjpriv->pusbdev; ++ ++ _func_enter_; ++ data = cpu_to_le32(val); ++ ret = usb_write_async(udev, addr, val, 4); ++ _func_exit_; ++ ++ return ret; ++} ++#endif ++ ++static unsigned int ffaddr2pipehdl(struct dvobj_priv *pdvobj, u32 addr) ++{ ++ unsigned int pipe=0; ++ int ep_num=0; ++ _adapter *padapter = pdvobj->padapter; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ ++ if(addr == RECV_BULK_IN_ADDR) ++ { ++ pipe=usb_rcvbulkpipe(pusbd, 0x01); ++ ++ return pipe; ++ } ++ ++ if(addr == RECV_INT_IN_ADDR) ++ { ++ pipe=usb_rcvbulkpipe(pusbd, 0x04); ++ ++ return pipe; ++ } ++ ++ if(addr < HW_QUEUE_ENTRY) ++ { ++ ep_num = (pHalData->Queue2EPNum[(u8)addr] & 0x0f); ++ ++ pipe = usb_sndbulkpipe(pusbd, ep_num); ++ ++ return pipe; ++ } ++ ++ return pipe; ++ ++} ++ ++static void usb_bulkout_zero_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)purb->context; ++ ++ //DBG_8192C("+usb_bulkout_zero_complete\n"); ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ rtw_mfree(pcontext->pbuf, sizeof(int)); ++ } ++ ++ if(pcontext->purb && (pcontext->purb==purb)) ++ { ++ usb_free_urb(pcontext->purb); ++ } ++ ++ ++ rtw_mfree((u8*)pcontext, sizeof(struct zero_bulkout_context)); ++ } ++ ++ ++} ++ ++static u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ int pipe, status, len; ++ u32 ret; ++ unsigned char *pbuf; ++ struct zero_bulkout_context *pcontext; ++ PURB purb = NULL; ++ _adapter *padapter = (_adapter *)pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++ //DBG_8192C("+usb_bulkout_zero\n"); ++ ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ ++ pcontext = (struct zero_bulkout_context *)rtw_zmalloc(sizeof(struct zero_bulkout_context)); ++ ++ pbuf = (unsigned char *)rtw_zmalloc(sizeof(int)); ++ purb = usb_alloc_urb(0, GFP_ATOMIC); ++ ++ len = 0; ++ pcontext->pbuf = pbuf; ++ pcontext->purb = purb; ++ pcontext->pirp = NULL; ++ pcontext->padapter = padapter; ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ //pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ pbuf, ++ len, ++ usb_bulkout_zero_complete, ++ pcontext);//context is pcontext ++ ++ status = usb_submit_urb(purb, GFP_ATOMIC); ++ ++ if (!status) ++ { ++ ret= _SUCCESS; ++ } ++ else ++ { ++ ret= _FAIL; ++ } ++ ++ ++ return _SUCCESS; ++ ++} ++ ++static void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ ++} ++ ++static void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ ++} ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++static void usb_read_interrupt_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ int err; ++ _adapter *padapter = (_adapter *)purb->context; ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if (purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX)) ++ { ++ DBG_8192C("usb_read_interrupt_complete: purb->actual_length > sizeof(INTERRUPT_MSG_FORMAT_EX) \n"); ++ } ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, purb->status); ++ } ++ } ++ else ++ { ++ DBG_8192C("###=> usb_read_interrupt_complete => urb status(%d)\n", purb->status); ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ break; ++ case -EINPROGRESS: ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ break; ++ } ++ } ++ ++} ++ ++static u32 usb_read_interrupt(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ int err; ++ unsigned int pipe; ++ u32 ret = _SUCCESS; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ _adapter *adapter = (_adapter *)pdvobj->padapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++_func_enter_; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_int_urb(precvpriv->int_in_urb, pusbd, pipe, ++ precvpriv->int_in_buf, ++ sizeof(INTERRUPT_MSG_FORMAT_EX), ++ usb_read_interrupt_complete, ++ adapter, ++ 1); ++ ++ err = usb_submit_urb(precvpriv->int_in_urb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ DBG_8192C("cannot submit interrupt in-token(err = 0x%08x),urb_status = %d\n",err, precvpriv->int_in_urb->status); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++static int recvbuf2recvframe(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ u8 *pbuf; ++ u8 frag, mf, shift_sz = 0; ++ u16 pkt_cnt, drvinfo_sz; ++ u32 pkt_len, pkt_offset, skb_len, alloc_sz; ++ s32 transfer_len; ++ struct recv_stat *prxstat; ++ _pkt *pkt_copy = NULL; ++ union recv_frame *precvframe = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ ++ ++ transfer_len = (s32)precvbuf->transfer_len; ++ pbuf = precvbuf->pbuf; ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++#if 0 //temp remove when disable usb rx aggregation ++ if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_len = le32_to_cpu(prxstat->rxdw0)&0x00003fff; ++ ++ ++ mf = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;//more fragment bit ++ frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;//fragmentation number ++ ++ drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16; ++ drvinfo_sz = drvinfo_sz << 3;//uint (2^3) = 8 bytes; REG_RX_DRVINFO_SZ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: DRV_INFO_SIZE=%d\n", drvinfo_sz)); ++ ++ pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE; ++ ++ if((pkt_len<=0) || (pkt_offset>transfer_len)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if ( ( le32_to_cpu( prxstat->rxdw0 ) >> 23 ) & 0x01 ) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ precvframe = rtw_alloc_recvframe(pfree_recv_queue); ++ if(precvframe==NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe->u.hdr.len=0; ++ ++ //skb_len = pkt_offset; ++ skb_len = pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((mf ==1)&&(frag == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ pkt_copy = dev_alloc_skb(alloc_sz); ++#else ++ pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz); ++#endif ++ if(pkt_copy) ++ { ++ pkt_copy->dev = padapter->pnetdev; ++ precvframe->u.hdr.pkt = pkt_copy; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, (pbuf + drvinfo_sz + RXDESC_SIZE), skb_len); ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; ++ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++ } ++ else ++ { ++ DBG_8192C("recvbuf2recvframe:can not allocate memory for skb copy\n"); ++ //precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC); ++ //precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; ++ //precvframe->u.hdr.rx_end = pbuf + (pkt_offset>1612?pkt_offset:1612); ++ ++ precvframe->u.hdr.pkt = NULL; ++ rtw_free_recvframe(precvframe, pfree_recv_queue); ++ ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ recvframe_put(precvframe, skb_len); ++ //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ case USB_RX_AGG_MIX: ++ pkt_offset = (u16)_RND128(pkt_offset); ++ break; ++ case USB_RX_AGG_USB: ++ pkt_offset = (u16)_RND4(pkt_offset); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ break; ++ } ++#endif ++ ++ //because the endian issue, driver avoid reference to the rxstat after calling update_recvframe_attrib_from_recvstat(); ++ rtl8192cu_update_recvframe_attrib_from_recvstat(precvframe, prxstat); ++ ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ ++ pkt_cnt--; ++ transfer_len -= pkt_offset; ++ pbuf += pkt_offset; ++ precvframe = NULL; ++ pkt_copy = NULL; ++ ++ if(transfer_len>0 && pkt_cnt==0) ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++ }while((transfer_len>0) && (pkt_cnt>0)); ++ ++_exit_recvbuf2recvframe: ++ ++ return _SUCCESS; ++} ++ ++void rtl8192cu_recv_tasklet(void *priv) ++{ ++ struct recv_buf *precvbuf = NULL; ++ _adapter *padapter = (_adapter*)priv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ while (NULL != (precvbuf = rtw_dequeue_recvbuf(&precvpriv->recv_buf_pending_queue))) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ { ++ DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); ++ ++ break; ++ } ++ ++ ++ recvbuf2recvframe(padapter, precvbuf); ++ ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ ++} ++ ++static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ struct recv_buf *precvbuf = (struct recv_buf *)purb->context; ++ _adapter *padapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ precvpriv->rx_pending_cnt --; ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ ++ goto exit; ++ } ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); ++ ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ rtw_reset_continual_urb_error(&padapter->dvobjpriv); ++ ++ precvbuf->transfer_len = purb->actual_length; ++ ++ //rtw_enqueue_rx_transfer_buffer(precvpriv, rx_transfer_buf); ++ rtw_enqueue_recvbuf(precvbuf, &precvpriv->recv_buf_pending_queue); ++ ++ tasklet_schedule(&precvpriv->recv_tasklet); ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ ++ DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); ++ ++ if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; ++ } ++ #endif ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ break; ++ case -EINPROGRESS: ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ break; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ int err; ++ unsigned int pipe; ++ u32 ret = _SUCCESS; ++ PURB purb = NULL; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ _adapter *adapter = (_adapter *)pdvobj->padapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ if(precvbuf->pbuf) ++ { ++ precvpriv->rx_pending_cnt++; ++ ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ precvbuf->pbuf, ++ MAX_RECVBUF_SZ, ++ usb_read_port_complete, ++ precvbuf);//context is precvbuf ++ ++ purb->transfer_dma = precvbuf->dma_transfer_addr; ++ purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); ++ DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ++ ret = _FAIL; ++ } ++ ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#else // CONFIG_USE_USB_BUFFER_ALLOC_RX ++static int recvbuf2recvframe(_adapter *padapter, _pkt *pskb) ++{ ++ u8 *pbuf; ++ u8 frag, mf, shift_sz = 0; ++ u16 pkt_cnt, drvinfo_sz; ++ u32 pkt_len, pkt_offset, skb_len, alloc_sz; ++ s32 transfer_len; ++ struct recv_stat *prxstat; ++ _pkt *pkt_copy = NULL; ++ union recv_frame *precvframe = NULL; ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ _queue *pfree_recv_queue = &precvpriv->free_recv_queue; ++ ++ ++ transfer_len = (s32)pskb->len; ++ pbuf = pskb->data; ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++#if 0 //temp remove when disable usb rx aggregation ++ if((pkt_cnt > 10) || (pkt_cnt < 1) || (transfer_lenrxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); ++ ++ prxstat = (struct recv_stat *)pbuf; ++ pkt_len = le32_to_cpu(prxstat->rxdw0)&0x00003fff; ++ ++ mf = (le32_to_cpu(prxstat->rxdw1) >> 27) & 0x1;//more fragment bit ++ frag = (le32_to_cpu(prxstat->rxdw2) >> 12) & 0xf;//fragmentation number ++ ++ drvinfo_sz = (le32_to_cpu(prxstat->rxdw0) & 0x000f0000) >> 16; ++ drvinfo_sz = drvinfo_sz << 3;//uint (2^3) = 8 bytes; REG_RX_DRVINFO_SZ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: DRV_INFO_SIZE=%d\n", drvinfo_sz)); ++ ++ pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE; ++ ++ if((pkt_len<=0) || (pkt_offset>transfer_len)) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe: pkt_len<=0\n")); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ // Modified by Albert 20101213 ++ // For 8 bytes IP header alignment. ++ if ( ( le32_to_cpu( prxstat->rxdw0 ) >> 23 ) & 0x01 ) // Qos data, wireless lan header length is 26 ++ { ++ shift_sz = 6; ++ } ++ else ++ { ++ shift_sz = 0; ++ } ++ ++ precvframe = rtw_alloc_recvframe(pfree_recv_queue); ++ if(precvframe==NULL) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: precvframe==NULL\n")); ++ goto _exit_recvbuf2recvframe; ++ } ++ ++ _rtw_init_listhead(&precvframe->u.hdr.list); ++ precvframe->u.hdr.precvbuf = NULL; //can't access the precvbuf for new arch. ++ precvframe->u.hdr.len=0; ++ ++ //skb_len = pkt_offset; ++ skb_len = pkt_len; ++ ++ // for first fragment packet, driver need allocate 1536+drvinfo_sz+RXDESC_SIZE to defrag packet. ++ // modify alloc_sz for recvive crc error packet by thomas 2011-06-02 ++ if((mf ==1)&&(frag == 0)){ ++ //alloc_sz = 1664; //1664 is 128 alignment. ++ if(skb_len <= 1650) ++ alloc_sz = 1664; ++ else ++ alloc_sz = skb_len + 14; ++ } ++ else { ++ alloc_sz = skb_len; ++ // 6 is for IP header 8 bytes alignment in QoS packet case. ++ // 8 is for skb->data 4 bytes alignment. ++ alloc_sz += 14; ++ } ++ ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ pkt_copy = dev_alloc_skb(alloc_sz); ++#else ++ pkt_copy = netdev_alloc_skb(padapter->pnetdev, alloc_sz); ++#endif ++ if(pkt_copy) ++ { ++ pkt_copy->dev = padapter->pnetdev; ++ precvframe->u.hdr.pkt = pkt_copy; ++ skb_reserve( pkt_copy, 8 - ((SIZE_PTR)( pkt_copy->data ) & 7 ));//force pkt_copy->data at 8-byte alignment address ++ skb_reserve( pkt_copy, shift_sz );//force ip_hdr at 8-byte alignment address according to shift_sz. ++ _rtw_memcpy(pkt_copy->data, (pbuf + drvinfo_sz + RXDESC_SIZE), skb_len); ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pkt_copy->data; ++ precvframe->u.hdr.rx_end = pkt_copy->data + alloc_sz; ++ } ++ else ++ { ++ precvframe->u.hdr.pkt = skb_clone(pskb, GFP_ATOMIC); ++ if(pkt_copy) ++ { ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; ++ precvframe->u.hdr.rx_end = pbuf + alloc_sz; ++ } ++ else ++ { ++ DBG_8192C("recvbuf2recvframe: skb_clone fail\n"); ++ goto _exit_recvbuf2recvframe; ++ } ++ } ++ ++ recvframe_put(precvframe, skb_len); ++ //recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ switch(pHalData->UsbRxAggMode) ++ { ++ case USB_RX_AGG_DMA: ++ case USB_RX_AGG_MIX: ++ pkt_offset = (u16)_RND128(pkt_offset); ++ break; ++ case USB_RX_AGG_USB: ++ pkt_offset = (u16)_RND4(pkt_offset); ++ break; ++ case USB_RX_AGG_DISABLE: ++ default: ++ break; ++ } ++#endif ++ ++ //because the endian issue, driver avoid reference to the rxstat after calling update_recvframe_attrib_from_recvstat(); ++ rtl8192cu_update_recvframe_attrib_from_recvstat(precvframe, prxstat); ++ ++ if(rtw_recv_entry(precvframe) != _SUCCESS) ++ { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe: rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ ++ pkt_cnt--; ++ transfer_len -= pkt_offset; ++ pbuf += pkt_offset; ++ precvframe = NULL; ++ pkt_copy = NULL; ++ ++ if(transfer_len>0 && pkt_cnt==0) ++ pkt_cnt = (le32_to_cpu(prxstat->rxdw2)>>16) & 0xff; ++ ++ }while((transfer_len>0) && (pkt_cnt>0)); ++ ++_exit_recvbuf2recvframe: ++ ++ return _SUCCESS; ++} ++ ++void rtl8192cu_recv_tasklet(void *priv) ++{ ++ _pkt *pskb; ++ _adapter *padapter = (_adapter*)priv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue))) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ { ++ DBG_8192C("recv_tasklet => bDriverStopped or bSurpriseRemoved \n"); ++ dev_kfree_skb_any(pskb); ++ break; ++ } ++ ++ recvbuf2recvframe(padapter, pskb); ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ ++#ifdef NET_SKBUFF_DATA_USES_OFFSET ++ skb_reset_tail_pointer(pskb); ++#else ++ pskb->tail = pskb->data; ++#endif ++ pskb->len = 0; ++ ++ skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb); ++ ++#else ++ dev_kfree_skb_any(pskb); ++#endif ++ ++ } ++ ++} ++ ++ ++static void usb_read_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ _irqL irqL; ++ uint isevt, *pbuf; ++ struct recv_buf *precvbuf = (struct recv_buf *)purb->context; ++ _adapter *padapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ //_enter_critical(&precvpriv->lock, &irqL); ++ //precvbuf->irp_pending=_FALSE; ++ //precvpriv->rx_pending_cnt --; ++ //_exit_critical(&precvpriv->lock, &irqL); ++ ++ precvpriv->rx_pending_cnt --; ++ ++ //if(precvpriv->rx_pending_cnt== 0) ++ //{ ++ // RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); ++ // _rtw_up_sema(&precvpriv->allrxreturnevt); ++ //} ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped||padapter->bReadPortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)\n", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ ++ #ifdef CONFIG_PREALLOC_RECV_SKB ++ precvbuf->reuse = _TRUE; ++ #else ++ if(precvbuf->pskb){ ++ DBG_8192C("==> free skb(%p)\n",precvbuf->pskb); ++ dev_kfree_skb_any(precvbuf->pskb); ++ } ++ #endif ++ ++ goto exit; ++ } ++ ++ if(purb->status==0)//SUCCESS ++ { ++ if ((purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: (purb->actual_length > MAX_RECVBUF_SZ) || (purb->actual_length < RXDESC_SIZE)\n")); ++ precvbuf->reuse = _TRUE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ rtw_reset_continual_urb_error(&padapter->dvobjpriv); ++ ++ precvbuf->transfer_len = purb->actual_length; ++ skb_put(precvbuf->pskb, purb->actual_length); ++ skb_queue_tail(&precvpriv->rx_skb_queue, precvbuf->pskb); ++ ++ if (skb_queue_len(&precvpriv->rx_skb_queue)<=1) ++ tasklet_schedule(&precvpriv->recv_tasklet); ++ ++ precvbuf->pskb = NULL; ++ precvbuf->reuse = _FALSE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ ++ DBG_8192C("###=> usb_read_port_complete => urb status(%d)\n", purb->status); ++ ++ if(rtw_inc_and_chk_continual_urb_error(&padapter->dvobjpriv) == _TRUE ){ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ switch(purb->status) { ++ case -EINVAL: ++ case -EPIPE: ++ case -ENODEV: ++ case -ESHUTDOWN: ++ //padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bSurpriseRemoved=TRUE\n")); ++ case -ENOENT: ++ padapter->bDriverStopped=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped=TRUE\n")); ++ break; ++ case -EPROTO: ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_READ_PORT_FAIL; ++ } ++ #endif ++ precvbuf->reuse = _TRUE; ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ break; ++ case -EINPROGRESS: ++ DBG_8192C("ERROR: URB IS IN PROGRESS!/n"); ++ break; ++ default: ++ break; ++ } ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++} ++ ++static u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ _irqL irqL; ++ int err; ++ unsigned int pipe; ++ SIZE_PTR tmpaddr=0; ++ SIZE_PTR alignment=0; ++ u32 ret = _SUCCESS; ++ PURB purb = NULL; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)pintfhdl->pintf_dev; ++ _adapter *adapter = (_adapter *)pdvobj->padapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++#ifdef CONFIG_PREALLOC_RECV_SKB ++ if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) ++ { ++ if (NULL != (precvbuf->pskb = skb_dequeue(&precvpriv->free_recv_skb_queue))) ++ { ++ precvbuf->reuse = _TRUE; ++ } ++ } ++#endif ++ ++ ++ if(precvbuf !=NULL) ++ { ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ //re-assign for linux based on skb ++ if((precvbuf->reuse == _FALSE) || (precvbuf->pskb == NULL)) ++ { ++ //precvbuf->pskb = alloc_skb(MAX_RECVBUF_SZ, GFP_ATOMIC);//don't use this after v2.6.25 ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ precvbuf->pskb = dev_alloc_skb(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++#else ++ precvbuf->pskb = netdev_alloc_skb(adapter->pnetdev, MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++#endif ++ if(precvbuf->pskb == NULL) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("init_recvbuf(): alloc_skb fail!\n")); ++ return _FAIL; ++ } ++ ++ tmpaddr = (SIZE_PTR)precvbuf->pskb->data; ++ alignment = tmpaddr & (RECVBUFF_ALIGN_SZ-1); ++ skb_reserve(precvbuf->pskb, (RECVBUFF_ALIGN_SZ - alignment)); ++ ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ ++#ifdef NET_SKBUFF_DATA_USES_OFFSET ++ precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail; ++ precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++#else ++ precvbuf->ptail = precvbuf->pskb->tail; ++ precvbuf->pend = precvbuf->pskb->end; ++#endif ++ precvbuf->pbuf = precvbuf->pskb->data; ++ } ++ else//reuse skb ++ { ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ ++#ifdef NET_SKBUFF_DATA_USES_OFFSET ++ precvbuf->ptail = precvbuf->pskb->head + precvbuf->pskb->tail; ++ precvbuf->pend = precvbuf->ptail + (MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ); ++#else ++ precvbuf->ptail = precvbuf->pskb->tail; ++ precvbuf->pend = precvbuf->pskb->end; ++#endif ++ precvbuf->pbuf = precvbuf->pskb->data; ++ ++ precvbuf->reuse = _FALSE; ++ } ++ ++ //_enter_critical(&precvpriv->lock, &irqL); ++ //precvpriv->rx_pending_cnt++; ++ //precvbuf->irp_pending = _TRUE; ++ //_exit_critical(&precvpriv->lock, &irqL); ++ ++ precvpriv->rx_pending_cnt++; ++ ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ precvbuf->pbuf, ++ MAX_RECVBUF_SZ, ++ usb_read_port_complete, ++ precvbuf);//context is precvbuf ++ ++ err = usb_submit_urb(purb, GFP_ATOMIC); ++ if((err) && (err != (-EPERM))) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cannot submit rx in-token(err=0x%.8x), URB_STATUS =0x%.8x", err, purb->status)); ++ DBG_8192C("cannot submit rx in-token(err = 0x%08x),urb_status = %d\n",err,purb->status); ++ ret = _FAIL; ++ } ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precvbuf ==NULL\n")); ++ ret = _FAIL; ++ } ++ ++_func_exit_; ++ ++ return ret; ++} ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++static void usb_read_port_cancel(struct intf_hdl *pintfhdl) ++{ ++ int i; ++ struct recv_buf *precvbuf; ++ _adapter *padapter = pintfhdl->padapter; ++ precvbuf = (struct recv_buf *)padapter->recvpriv.precv_buf; ++ ++ DBG_8192C("usb_read_port_cancel \n"); ++ ++ padapter->bReadPortCancel = _TRUE; ++ ++ for(i=0; i < NR_RECVBUFF ; i++) ++ { ++ precvbuf->reuse = _TRUE; ++ if(precvbuf->purb) ++ { ++ //DBG_8192C("usb_read_port_cancel : usb_kill_urb \n"); ++ usb_kill_urb(precvbuf->purb); ++ } ++ ++ precvbuf++; ++ } ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ usb_kill_urb(padapter->recvpriv.int_in_urb); ++#endif ++} ++ ++void rtl8192cu_xmit_tasklet(void *priv) ++{ ++ int ret = _FALSE; ++ _adapter *padapter = (_adapter*)priv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ return; ++ ++ while(1) ++ { ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE) || (padapter->bWritePortCancel == _TRUE)) ++ { ++ DBG_8192C("xmit_tasklet => bDriverStopped or bSurpriseRemoved or bWritePortCancel\n"); ++ break; ++ } ++ ++ ret = rtl8192cu_xmitframe_complete(padapter, pxmitpriv, NULL); ++ ++ if(ret==_FALSE) ++ break; ++ ++ } ++ ++} ++ ++static void usb_write_port_complete(struct urb *purb, struct pt_regs *regs) ++{ ++ _irqL irqL; ++ int i; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)purb->context; ++ //struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; ++ //_adapter *padapter = pxmitframe->padapter; ++ _adapter *padapter = pxmitbuf->padapter; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ //struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n")); ++ ++ ++ switch(pxmitbuf->flags) ++ { ++ case XMIT_VO_QUEUE: ++ pxmitpriv->voq_cnt--; ++ break; ++ case XMIT_VI_QUEUE: ++ pxmitpriv->viq_cnt--; ++ break; ++ case XMIT_BE_QUEUE: ++ pxmitpriv->beq_cnt--; ++ break; ++ case XMIT_BK_QUEUE: ++ pxmitpriv->bkq_cnt--; ++ break; ++ case HIGH_QUEUE_INX: ++#ifdef CONFIG_AP_MODE ++ rtw_chk_hi_queue_cmd(padapter); ++#endif ++ break; ++ default: ++ break; ++ } ++ ++ ++/* ++ _enter_critical(&pxmitpriv->lock, &irqL); ++ ++ pxmitpriv->txirp_cnt--; ++ ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ pxmitpriv->bkq_cnt--; ++ //DBG_8192C("pxmitpriv->bkq_cnt=%d\n", pxmitpriv->bkq_cnt); ++ break; ++ case 4: ++ case 5: ++ pxmitpriv->viq_cnt--; ++ //DBG_8192C("pxmitpriv->viq_cnt=%d\n", pxmitpriv->viq_cnt); ++ break; ++ case 6: ++ case 7: ++ pxmitpriv->voq_cnt--; ++ //DBG_8192C("pxmitpriv->voq_cnt=%d\n", pxmitpriv->voq_cnt); ++ break; ++ case 0: ++ case 3: ++ default: ++ pxmitpriv->beq_cnt--; ++ //DBG_8192C("pxmitpriv->beq_cnt=%d\n", pxmitpriv->beq_cnt); ++ break; ++ ++ } ++ ++ _exit_critical(&pxmitpriv->lock, &irqL); ++ ++ ++ if(pxmitpriv->txirp_cnt==0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++*/ ++ //rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++ if(padapter->bSurpriseRemoved || padapter->bDriverStopped ||padapter->bWritePortCancel) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ goto check_completion; ++ } ++ ++ ++ if(purb->status==0) ++ { ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete : purb->status(%d) != 0 \n", purb->status)); ++ DBG_8192C("###=> urb_write_port_complete status(%d)\n",purb->status); ++ if((purb->status==-EPIPE)||(purb->status==-EPROTO)) ++ { ++ //usb_clear_halt(pusbdev, purb->pipe); ++ //msleep(10); ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.Wifi_Error_Status = USB_WRITE_PORT_FAIL; ++ } ++ #endif ++ } ++ else if(purb->status == -EINPROGRESS) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: EINPROGESS\n")); ++ } ++ else if(purb->status == (-ESHUTDOWN)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: ESHUTDOWN\n")); ++ ++ padapter->bDriverStopped=_TRUE; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped=TRUE\n")); ++ ++ goto check_completion; ++ } ++ else ++ { ++ padapter->bSurpriseRemoved=_TRUE; ++ DBG_8192C("bSurpriseRemoved=TRUE\n"); ++ //rtl8192cu_trigger_gpio_0(padapter); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bSurpriseRemoved=TRUE\n")); ++ ++ goto check_completion; ++ } ++ ++ ++ ++ } ++ ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.last_tx_complete_time = rtw_get_current_time(); ++ } ++ #endif ++ ++check_completion: ++ if(pxmitbuf->isSync) { ++ pxmitbuf->status = purb->status; ++ complete(&pxmitbuf->done); ++ } ++ ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ //if(rtw_txframes_pending(padapter)) ++ { ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ } ++ ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port_complete\n")); ++_func_exit_; ++ ++} ++ ++static u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem, int timeout_ms) ++{ ++ _irqL irqL; ++ unsigned int pipe; ++ int status; ++ u32 ret, bwritezero = _FALSE; ++ PURB purb = NULL; ++ _adapter *padapter = (_adapter *)pintfhdl->padapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)wmem; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *)pxmitbuf->priv_data; ++ struct usb_device *pusbd = pdvobj->pusbdev; ++ struct pkt_attrib *pattrib = &pxmitframe->attrib; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port\n")); ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ #ifdef DBG_TX ++ DBG_871X(" DBG_TX %s:%d bDriverStopped%d, bSurpriseRemoved:%d, pnp_bstop_trx:%d\n",__FUNCTION__, __LINE__ ++ ,padapter->bDriverStopped, padapter->bSurpriseRemoved, padapter->pwrctrlpriv.pnp_bstop_trx ); ++ #endif ++ ++ rtw_free_xmitbuf(pxmitpriv, pxmitbuf); ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++ _enter_critical(&pxmitpriv->lock, &irqL); ++ ++ switch(addr) ++ { ++ case VO_QUEUE_INX: ++ pxmitpriv->voq_cnt++; ++ pxmitbuf->flags = XMIT_VO_QUEUE; ++ break; ++ case VI_QUEUE_INX: ++ pxmitpriv->viq_cnt++; ++ pxmitbuf->flags = XMIT_VI_QUEUE; ++ break; ++ case BE_QUEUE_INX: ++ pxmitpriv->beq_cnt++; ++ pxmitbuf->flags = XMIT_BE_QUEUE; ++ break; ++ case BK_QUEUE_INX: ++ pxmitpriv->bkq_cnt++; ++ pxmitbuf->flags = XMIT_BK_QUEUE; ++ break; ++ case HIGH_QUEUE_INX: ++ pxmitbuf->flags = HIGH_QUEUE_INX; ++ break; ++ default: ++ pxmitbuf->flags = XMIT_VO_QUEUE; ++ break; ++ } ++ ++ _exit_critical(&pxmitpriv->lock, &irqL); ++ ++/* ++ _enter_critical(&pxmitpriv->lock, &irqL); ++ ++ //total irp ++ pxmitpriv->txirp_cnt++; ++ ++ //per ac irp ++ switch(pattrib->priority) ++ { ++ case 1: ++ case 2: ++ pxmitpriv->bkq_cnt++; ++ break; ++ case 4: ++ case 5: ++ pxmitpriv->viq_cnt++; ++ break; ++ case 6: ++ case 7: ++ pxmitpriv->voq_cnt++; ++ break; ++ case 0: ++ case 3: ++ default: ++ pxmitpriv->beq_cnt++; ++ break; ++ } ++ ++ ++ _exit_critical(&pxmitpriv->lock, &irqL); ++*/ ++ ++ purb = pxmitbuf->pxmit_urb[0]; ++ ++#if 0 ++ if(pdvobj->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ //DBG_8192C("ishighspeed, cnt=%d\n", cnt); ++ bwritezero = _TRUE; ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ //DBG_8192C("cnt=%d\n", cnt); ++ bwritezero = _TRUE; ++ } ++ } ++#endif ++ ++ //translate DMA FIFO addr to pipehandle ++ pipe = ffaddr2pipehdl(pdvobj, addr); ++ ++#ifdef CONFIG_REDUCE_USB_TX_INT ++ if ( pxmitpriv->free_xmitbuf_cnt%NR_XMITBUFF == 0 ++ || pxmitbuf->ext_tag ) ++ { ++ purb->transfer_flags &= (~URB_NO_INTERRUPT); ++ } else { ++ purb->transfer_flags |= URB_NO_INTERRUPT; ++ //DBG_8192C("URB_NO_INTERRUPT "); ++ } ++#endif ++ ++ ++ usb_fill_bulk_urb(purb, pusbd, pipe, ++ pxmitframe->buf_addr, //= pxmitbuf->pbuf ++ cnt, ++ usb_write_port_complete, ++ pxmitbuf);//context is pxmitbuf ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ purb->transfer_dma = pxmitbuf->dma_transfer_addr; ++ purb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP; ++ purb->transfer_flags |= URB_ZERO_PACKET; ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++#if 0 ++ if (bwritezero) ++ { ++ purb->transfer_flags |= URB_ZERO_PACKET; ++ } ++#endif ++ ++ status = usb_submit_urb(purb, GFP_ATOMIC); ++ ++ if (!status) ++ { ++ ret= _SUCCESS; ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ { ++ HAL_DATA_TYPE *pHalData = GET_HAL_DATA(padapter); ++ pHalData->srestpriv.last_tx_time = rtw_get_current_time(); ++ } ++ #endif ++ } ++ else ++ { ++ DBG_8192C("usb_write_port, status=%d\n", status); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port(): usb_submit_urb, status=%x\n", status)); ++ ret= _FAIL; ++ } ++ ++// Commented by Albert 2009/10/13 ++// We add the URB_ZERO_PACKET flag to urb so that the host will send the zero packet automatically. ++/* ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++*/ ++ ++ // synchronous write handling ++ if(timeout_ms >= 0) { ++ unsigned long expire = timeout_ms ? msecs_to_jiffies(timeout_ms) : MAX_SCHEDULE_TIMEOUT; ++ int status; ++ init_completion(&pxmitbuf->done); ++ pxmitbuf->isSync = _TRUE; ++ pxmitbuf->status = 0; ++ ++ if (!wait_for_completion_timeout(&pxmitbuf->done, expire)) { ++ usb_kill_urb(purb); ++ status = (pxmitbuf->status == -ENOENT ? -ETIMEDOUT : pxmitbuf->status); ++ } else ++ status = pxmitbuf->status; ++ ++ if (!status) { ++ ret= _SUCCESS; ++ } else { ++ DBG_8192C("usb_write_port sync, status=%d\n", status); ++ ret = _FAIL; ++ } ++ } ++ ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("-usb_write_port\n")); ++ ++_func_exit_; ++ ++ return ret; ++ ++} ++ ++static inline u32 usb_write_port_async(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ return usb_write_port(pintfhdl, addr, cnt, wmem, -1); ++} ++ ++static inline int usb_write_port_sync(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ return usb_write_port(pintfhdl, addr, cnt, wmem, RTW_USB_BULKOUT_TIMEOUT); ++} ++ ++static void usb_write_port_cancel(struct intf_hdl *pintfhdl) ++{ ++ int i, j; ++ _adapter *padapter = pintfhdl->padapter; ++ struct xmit_buf *pxmitbuf = (struct xmit_buf *)padapter->xmitpriv.pxmitbuf; ++ ++ DBG_8192C("usb_write_port_cancel \n"); ++ ++ padapter->bWritePortCancel = _TRUE; ++ ++ for(i=0; ipxmit_urb[j]) ++ { ++ usb_kill_urb(pxmitbuf->pxmit_urb[j]); ++ } ++ } ++ ++ pxmitbuf++; ++ } ++ pxmitbuf = (struct xmit_buf*)padapter->xmitpriv.pxmit_extbuf; ++ ++ for (i = 0; i < NR_XMIT_EXTBUFF; i++) ++ { ++ for(j=0; j<8; j++) ++ { ++ if(pxmitbuf->pxmit_urb[j]) ++ { ++ usb_kill_urb(pxmitbuf->pxmit_urb[j]); ++ } ++ } ++ ++ pxmitbuf++; ++ } ++ ++} ++ ++void rtl8192cu_set_intf_ops(struct _io_ops *pops) ++{ ++ _func_enter_; ++ ++ _rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops)); ++ ++ pops->_read8 = &usb_read8; ++ pops->_read16 = &usb_read16; ++ pops->_read32 = &usb_read32; ++ pops->_read_mem = &usb_read_mem; ++ pops->_read_port = &usb_read_port; ++ ++ pops->_write8 = &usb_write8; ++ pops->_write16 = &usb_write16; ++ pops->_write32 = &usb_write32; ++ pops->_writeN = &usb_writeN; ++ ++#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ ++ pops->_write8_async= &usb_async_write8; ++ pops->_write16_async = &usb_async_write16; ++ pops->_write32_async = &usb_async_write32; ++#endif ++ pops->_write_mem = &usb_write_mem; ++ pops->_write_port = &usb_write_port_async; ++ pops->_write_port_sync = &usb_write_port_sync; ++ ++ pops->_read_port_cancel = &usb_read_port_cancel; ++ pops->_write_port_cancel = &usb_write_port_cancel; ++ ++#ifdef CONFIG_USB_INTERRUPT_IN_PIPE ++ pops->_read_interrupt = &usb_read_interrupt; ++#endif ++ ++ _func_exit_; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_ops_xp.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1266 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _HCI_OPS_OS_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ #error "Shall be Linux or Windows, but not both!\n" ++#endif ++ ++#ifndef CONFIG_USB_HCI ++ #error "CONFIG_USB_HCI shall be on!\n" ++#endif ++ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++ ++struct zero_bulkout_context ++{ ++ void *pbuf; ++ void *purb; ++ void *pirp; ++ void *padapter; ++}; ++ ++#define usb_write_cmd usb_write_mem ++#define usb_read_cmd usb_read_mem ++#define usb_write_cmd_complete usb_write_mem_complete ++//#define usb_read_cmd_complete usb_read_mem_complete ++ ++ ++ ++uint usb_init_intf_priv(struct intf_priv *pintfpriv) ++{ ++ ++ PURB piorw_urb; ++ u8 NextDeviceStackSize; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ _adapter * padapter=pdev->padapter; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n +usb_init_intf_priv\n")); ++ ++ pintfpriv->intf_status = _IOREADY; ++ ++ if(pdev->ishighspeed) pintfpriv->max_iosz = 128; ++ else pintfpriv->max_iosz = 64; ++ ++ ++ _init_timer(&pintfpriv->io_timer, padapter->hndis_adapter, io_irp_timeout_handler, pintfpriv); ++ ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("usb_init_intf_priv:pintfpriv->max_iosz:%d\n",pintfpriv->max_iosz)); ++ ++ pintfpriv->io_wsz = 0; ++ pintfpriv->io_rsz = 0; ++ ++ pintfpriv->allocated_io_rwmem = rtw_zmalloc(pintfpriv->max_iosz +4); ++ ++ if (pintfpriv->allocated_io_rwmem == NULL){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_init_intf_priv:pintfpriv->allocated_io_rwmem == NULL\n")); ++ goto usb_init_intf_priv_fail; ++ } ++ ++ pintfpriv->io_rwmem = pintfpriv->allocated_io_rwmem + 4 \ ++ -( (u32)(pintfpriv->allocated_io_rwmem) & 3); ++ ++ ++ ++ NextDeviceStackSize = (u8)pdev->nextdevstacksz;//pintfpriv->pUsbDevObj->StackSize + 1; ++ ++ piorw_urb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB) ); ++ if(piorw_urb == NULL) ++ goto usb_init_intf_priv_fail; ++ ++ pintfpriv->piorw_urb = piorw_urb; ++ ++ pintfpriv->piorw_irp = IoAllocateIrp(NextDeviceStackSize , FALSE); ++ ++ ++ pintfpriv->io_irp_cnt=1; ++ pintfpriv->bio_irp_pending=_FALSE; ++ ++ _rtw_init_sema(&(pintfpriv->io_retevt), 0);//NdisInitializeEvent(&pintfpriv->io_irp_return_evt); ++ ++_func_exit_; ++ return _SUCCESS; ++ ++usb_init_intf_priv_fail: ++ ++ if (pintfpriv->allocated_io_rwmem) ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz +4); ++ ++ if(piorw_urb) ++ ExFreePool(piorw_urb); ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_info_,("\n -usb_init_intf_priv(usb_init_intf_priv_fail)\n")); ++ ++_func_exit_; ++ return _FAIL; ++ ++} ++ ++void usb_unload_intf_priv(struct intf_priv *pintfpriv) ++{ ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n+usb_unload_intf_priv\n")); ++ ++ rtw_mfree((u8 *)(pintfpriv->allocated_io_rwmem), pintfpriv->max_iosz+4); ++ ++#ifdef PLATFORM_WINDOWS ++ if(pintfpriv->piorw_urb) ++ ExFreePool(pintfpriv->piorw_urb); ++ ++ if(pintfpriv->piorw_irp) ++ IoFreeIrp(pintfpriv->piorw_irp); ++#endif ++ ++ ++#ifdef PLATFORM_LINUX ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npintfpriv->io_irp_cnt=%d\n",pintfpriv->io_irp_cnt)); ++ pintfpriv->io_irp_cnt--; ++ if(pintfpriv->io_irp_cnt){ ++ if(pintfpriv->bio_irp_pending==_TRUE){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\nkill iorw_urb\n")); ++ usb_kill_urb(pintfpriv->piorw_urb); ++ } ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n wait io_retevt\n")); ++ _rtw_down_sema(&(pintfpriv->io_retevt)); ++ } ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n cancel io_urb ok\n")); ++#endif ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n-usb_unload_intf_priv\n")); ++ ++_func_exit_; ++ ++} ++ ++void *ffaddr2pipehdl(struct dvobj_priv *pNdisCEDvice, u32 addr) ++{ ++ HANDLE PipeHandle = NULL; ++ _adapter *padapter = pNdisCEDvice->padapter; ++ ++ ++ if(pNdisCEDvice->nr_endpoint == 11) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3] ; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_BCNQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[6]; ++ break; ++ case RTL8712_DMA_BMCQ: //HI Queue ++ PipeHandle= padapter->halpriv.pipehdls_r8712[7]; ++ break; ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[8]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[9]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 6) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[4]; ++ break; ++ case RTL8712_DMA_VIQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[5]; ++ break; ++ ++ } ++ ++ } ++ else if(pNdisCEDvice->nr_endpoint == 4) ++ { ++ switch(addr) ++ { ++ case RTL8712_DMA_BEQ: ++ //case RTL8712_DMA_BKQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[2]; ++ break; ++ //case RTL8712_DMA_VIQ: ++ case RTL8712_DMA_VOQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[1]; ++ break; ++ case RTL8712_DMA_RX0FF: ++ case RTL8712_DMA_C2HCMD: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[0]; ++ break; ++ case RTL8712_DMA_H2CCMD: ++ case RTL8712_DMA_BCNQ: ++ case RTL8712_DMA_BMCQ: ++ case RTL8712_DMA_MGTQ: ++ PipeHandle= padapter->halpriv.pipehdls_r8712[3]; ++ break; ++ } ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ffaddr2pipehdl():nr_endpoint=%d error!\n", pNdisCEDvice->nr_endpoint)); ++ } ++ ++ return PipeHandle; ++ ++} ++ ++ ++NTSTATUS usb_bulkout_zero_complete( ++ PDEVICE_OBJECT pUsbDevObj, ++ PIRP pIrp, void* pZeroContext) ++{ ++ struct zero_bulkout_context *pcontext = (struct zero_bulkout_context *)pZeroContext; ++ ++_func_enter_; ++ ++ if(pcontext) ++ { ++ if(pcontext->pbuf) ++ { ++ ExFreePool(pcontext->pbuf); ++ } ++ ++ if(pcontext->purb) ++ { ++ ExFreePool(pcontext->purb); ++ } ++ ++ if(pcontext->pirp && (pIrp ==pcontext->pirp)) ++ { ++ IoFreeIrp(pIrp); ++ } ++ ++ ExFreePool(pcontext); ++ } ++ ++_func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++ ++} ++ ++u32 usb_bulkout_zero(struct intf_hdl *pintfhdl, u32 addr) ++{ ++ struct zero_bulkout_context *pcontext; ++ unsigned char *pbuf; ++ char NextDeviceStackSize, len; ++ PIO_STACK_LOCATION nextStack; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ PIRP pirp = NULL; ++ PURB purb = NULL; ++ NDIS_STATUS ndisStatus = NDIS_STATUS_SUCCESS; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pdvobj = (struct dvobj_priv *)&padapter->dvobjpriv; ++ ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ return _FAIL; ++ } ++ ++ len = 0; ++ NextDeviceStackSize = (char)pdvobj->nextdevstacksz; ++ ++ pcontext = (struct zero_bulkout_context *)ExAllocatePool(NonPagedPool, sizeof(struct zero_bulkout_context)); ++ pbuf = (unsigned char *)ExAllocatePool(NonPagedPool, sizeof(int)); ++ purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(URB)); ++ pirp = IoAllocateIrp(NextDeviceStackSize, FALSE); ++ ++ pcontext->pbuf = pbuf; ++ pcontext->purb = purb; ++ pcontext->pirp = pirp; ++ pcontext->padapter = padapter; ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdvobj, addr); ++ ++ ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ pbuf, ++ NULL, ++ len, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ //Set Completion Routine ++ IoSetCompletionRoutine(pirp, // irp to use ++ usb_bulkout_zero_complete, // callback routine ++ pcontext, // context ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ ++ // Call IoCallDriver to send the irp to the usb bus driver ++ // ++ ndisStatus = IoCallDriver(pdvobj->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) ++ { ++ padapter->bDriverStopped=_TRUE; ++ padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ // ++ // The usb bus driver should always return STATUS_PENDING when bulk out irp async ++ // ++ if ( ndisStatus != STATUS_PENDING ) ++ { ++ return _FAIL; ++ } ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++void usb_read_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ _func_enter_; ++ ++ ++ ++ _func_exit_; ++} ++ ++NTSTATUS usb_write_mem_complete(PDEVICE_OBJECT pUsbDevObj, PIRP piowrite_irp, PVOID pusb_cnxt) ++{ ++ ++ _irqL irqL; ++ _list *head, *plist; ++ struct io_req *pio_req; ++ struct io_queue *pio_q = (struct io_queue *) pusb_cnxt; ++ struct intf_hdl *pintf = &(pio_q->intf); ++ struct intf_priv *pintfpriv = pintf->pintfpriv; ++ _adapter *padapter = (_adapter *)pintf->adapter; ++ NTSTATUS status = STATUS_SUCCESS; ++ ++ head = &(pio_q->processing); ++ ++ _func_enter_; ++ ++ _enter_critical_bh(&(pio_q->lock), &irqL); ++ ++ pintfpriv->io_irp_cnt--; ++ if(pintfpriv->io_irp_cnt ==0){ ++ _rtw_up_sema(&(pintfpriv->io_retevt)); ++ } ++ ++ pintfpriv->bio_irp_pending=_FALSE; ++ ++ switch(piowrite_irp->IoStatus.Status) ++ { ++ case STATUS_SUCCESS: ++ break; ++ ++ default: ++ padapter->bSurpriseRemoved=_TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usbAsynIntOutComplete:pioread_irp->IoStatus.Status !=STATUS_SUCCESS\n")); ++ break; ++ } ++ ++ //free irp in processing list... ++ while(rtw_is_list_empty(head) != _TRUE) ++ { ++ plist = get_next(head); ++ rtw_list_delete(plist); ++ pio_req = LIST_CONTAINOR(plist, struct io_req, list); ++ _rtw_up_sema(&pio_req->sema); ++ } ++ ++ _exit_critical_bh(&(pio_q->lock), &irqL); ++ ++ _func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++void usb_write_mem(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ u32 bwritezero; ++ _irqL irqL; ++ USBD_STATUS usbdstatus; ++ PIO_STACK_LOCATION nextStack; ++ HANDLE PipeHandle; ++ struct io_req *pio_req; ++ ++ _adapter *adapter = (_adapter *)pintfhdl->adapter; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ PURB piorw_urb = pintfpriv->piorw_urb; ++ PIRP piorw_irp = pintfpriv->piorw_irp; ++ struct io_queue *pio_queue = (struct io_queue *)adapter->pio_queue; ++ NTSTATUS NtStatus = STATUS_SUCCESS; ++ ++ _func_enter_; ++ ++ pio_req = alloc_ioreq(pio_queue); ++ ++ if ((pio_req == NULL)||(adapter->bSurpriseRemoved)){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("async_irp_write32 : pio_req =0x%x adapter->bSurpriseRemoved=0x%x",pio_req,adapter->bSurpriseRemoved )); ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pio_queue->lock), &irqL); ++ ++ rtw_list_insert_tail(&(pio_req->list),&(pio_queue->processing)); ++ ++ ++#ifdef NDIS51_MINIPORT ++ IoReuseIrp(piorw_irp, STATUS_SUCCESS); ++#else ++ piorw_irp->Cancel = _FALSE; ++#endif ++ ++ if((adapter->bDriverStopped) || (adapter->bSurpriseRemoved) ||(adapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\npadapter->pwrctrlpriv.pnp_bstop_trx==_TRUE\n")); ++ _func_exit_; ++ return; ++ } ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdev, addr); ++ ++ ++ pintfpriv->io_irp_cnt++; ++ pintfpriv->bio_irp_pending=_TRUE; ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ piorw_urb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ (PVOID)wmem, ++ NULL, ++ cnt, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(piorw_irp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = (PURB)piorw_urb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ IoSetCompletionRoutine( ++ piorw_irp, // irp to use ++ usb_write_mem_complete, // routine to call when irp is done ++ pio_queue, // context to pass routine ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ // ++ // Call IoCallDriver to send the irp to the usb port ++ // ++ NtStatus = IoCallDriver(pdev->pnextdevobj, piorw_irp); ++ usbdstatus = URB_STATUS(piorw_urb); ++ ++ // ++ // The USB driver should always return STATUS_PENDING when ++ // it receives a write irp ++ // ++ if ((NtStatus != STATUS_PENDING) || USBD_HALTED(usbdstatus) ) { ++ ++ if( USBD_HALTED(usbdstatus) ) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_mem():USBD_HALTED(usbdstatus)=%X!\n",USBD_HALTED(usbdstatus)) ); ++ } ++ _func_exit_; ++ return;//STATUS_UNSUCCESSFUL; ++ } ++ ++ _exit_critical_bh(&(pio_queue->lock), &irqL); ++ ++ _rtw_down_sema(&pio_req->sema); ++ free_ioreq(pio_req, pio_queue); ++ ++ ++ bwritezero = _FALSE; ++ if (pdev->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ bwritezero = _TRUE; ++ ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ bwritezero = _TRUE; ++ } ++ ++ ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++} ++ ++NTSTATUS usb_read_port_complete(PDEVICE_OBJECT pUsbDevObj, PIRP pIrp, PVOID context) ++{ ++ uint isevt, *pbuf; ++ struct _URB_BULK_OR_INTERRUPT_TRANSFER *pbulkurb; ++ USBD_STATUS usbdstatus; ++ struct recv_buf *precvbuf = (struct recv_buf *)context; ++ _adapter *adapter =(_adapter *)precvbuf->adapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ struct dvobj_priv *dev = (struct dvobj_priv *)&adapter->dvobjpriv; ++ PURB purb = precvbuf->purb; ++ struct intf_hdl *pintfhdl = &adapter->pio_queue->intf; ++ ++ //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete!!!\n")); ++ ++ usbdstatus = URB_STATUS(purb); ++ ++ _rtw_spinlock_ex(&precvpriv->lock); ++ precvbuf->irp_pending=_FALSE; ++ precvpriv->rx_pending_cnt --; ++ _rtw_spinunlock_ex(&precvpriv->lock); ++ ++ if(precvpriv->rx_pending_cnt== 0) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: rx_pending_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&precvpriv->allrxreturnevt); ++ } ++ ++ ++ if( pIrp->Cancel == _TRUE ) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete: One IRP has been cancelled succesfully\n")); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ if(adapter->bSurpriseRemoved) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", adapter->bDriverStopped, adapter->bSurpriseRemoved)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ switch(pIrp->IoStatus.Status) ++ { ++ case STATUS_SUCCESS: ++ ++ pbulkurb = &(precvbuf->purb)->UrbBulkOrInterruptTransfer; ++ if((pbulkurb->TransferBufferLength >(MAX_RECVBUF_SZ)) || (pbulkurb->TransferBufferLength < RXDESC_SIZE) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete: (pbulkurb->TransferBufferLength > MAX_RECVBUF_SZ) || (pbulkurb->TransferBufferLength < RXDESC_SIZE)\n")); ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ precvbuf->transfer_len = pbulkurb->TransferBufferLength; ++ ++ pbuf = (uint*)precvbuf->pbuf; ++ ++ if((isevt = *(pbuf+1)&0x1ff) == 0x1ff) ++ { ++ rxcmd_event_hdl(adapter, pbuf);//rx c2h events ++ ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ else ++ { ++ if(recvbuf2recvframe(adapter, precvbuf)==_FAIL)//rx packets ++ { ++ //precvbuf->reuse = _TRUE; ++ rtw_read_port(adapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ } ++ ++ } ++ ++ break; ++ ++ default: ++ ++ if( !USBD_HALTED(usbdstatus) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete():USBD_HALTED(usbdstatus)=%x (need to handle ) \n",USBD_HALTED(usbdstatus))); ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus)) ); ++ adapter->bDriverStopped = _TRUE; ++ adapter->bSurpriseRemoved = _TRUE; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_complete(): USBD_HALTED(usbdstatus)=%x \n\n", USBD_HALTED(usbdstatus))) ; ++ } ++ ++ break; ++ ++ } ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++u32 usb_read_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem) ++{ ++ u8 *pdata; ++ u16 size; ++ PURB purb; ++ PIRP pirp; ++ PIO_STACK_LOCATION nextStack; ++ NTSTATUS ntstatus; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ struct recv_buf *precvbuf = (struct recv_buf *)rmem; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)pintfpriv->intf_dev; ++ _adapter *adapter = (_adapter *)pdev->padapter; ++ struct recv_priv *precvpriv = &adapter->recvpriv; ++ u32 bResult = _FALSE; ++ ++_func_enter_; ++ ++ if(adapter->bDriverStopped || adapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return bResult; ++ } ++ ++ if(precvbuf !=NULL) ++ { ++ ++ rtl8192cu_init_recvbuf(adapter, precvbuf); ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt++; ++ precvbuf->irp_pending = _TRUE; ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ pdata = (u8*)precvbuf->pbuf; ++ ++ size = sizeof( struct _URB_BULK_OR_INTERRUPT_TRANSFER ); ++ purb = precvbuf->purb; ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pdev, addr); ++ ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ (USHORT)size, ++ PipeHandle, ++ pdata, ++ NULL, ++ MAX_RECVBUF_SZ, ++ USBD_TRANSFER_DIRECTION_IN | USBD_SHORT_TRANSFER_OK, ++ NULL ++ ); ++ ++ pirp = precvbuf->pirp; ++ ++#if NDIS51_MINIPORT ++ IoReuseIrp(pirp, STATUS_SUCCESS); ++#else ++ pirp->Cancel = _FALSE; ++#endif ++ ++ // call the class driver to perform the operation ++ // and pass the URB to the USB driver stack ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ ++ IoSetCompletionRoutine( ++ pirp, // irp to use ++ usb_read_port_complete, // routine to call when irp is done ++ precvbuf, // context to pass routine ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ // ++ // The IoCallDriver routine ++ // sends an IRP to the driver associated with a specified device object. ++ // ++ ntstatus = IoCallDriver(pdev->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_read_port(): USBD_HALTED(usbdstatus=0x%.8x)=%.8x \n\n", usbdstatus, USBD_HALTED(usbdstatus))); ++ pdev->padapter->bDriverStopped=_TRUE; ++ pdev->padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ if( ntstatus == STATUS_PENDING ) ++ { ++ bResult = _TRUE;// The IRP is pended in USBD as we expected. ++ } ++ else { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! IRP STATUS: %X\n", ntstatus)); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port(): IoCallDriver failed!!! USB STATUS: %X\n", usbdstatus)); ++ } ++ ++ } ++ else{ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port:precv_frame ==NULL\n")); ++ } ++ ++_func_exit_; ++ ++ return bResult; ++ ++} ++ ++void usb_read_port_cancel(_adapter *padapter) ++{ ++ struct recv_buf *precvbuf; ++ sint i; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct recv_priv *precvpriv=&padapter->recvpriv; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n ==>usb_read_port_cancel\n")); ++ ++ _rtw_spinlock(&precvpriv->lock); ++ precvpriv->rx_pending_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&precvpriv->lock); ++ ++ if (precvpriv->rx_pending_cnt) ++ { ++ // Canceling Pending Recv Irp ++ precvbuf = (struct recv_buf *)precvpriv->precv_buf; ++ ++ for( i = 0; i < NR_RECVBUFF; i++ ) ++ { ++ if (precvbuf->irp_pending == _TRUE) ++ { ++ IoCancelIrp(precvbuf->pirp); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel() :IoCancelIrp\n")); ++ } ++ ++ precvbuf++; ++ } ++ ++ _rtw_down_sema(&precvpriv->allrxreturnevt); ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_read_port_cancel:down sema\n")); ++ ++ } ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("<==usb_read_port_cancel\n")); ++ ++} ++ ++NTSTATUS usb_write_port_complete( ++ PDEVICE_OBJECT pUsbDevObj, ++ PIRP pIrp, ++ PVOID pTxContext ++) ++{ ++ u32 i, bIrpSuccess, sz; ++ NTSTATUS status = STATUS_SUCCESS; ++ u8 *ptr; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *) pTxContext; ++ struct xmit_buf *pxmitbuf = pxmitframe->pxmitbuf; ++ _adapter *padapter = pxmitframe->padapter; ++ struct dvobj_priv *pdev = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct io_queue *pio_queue = (struct io_queue *)padapter->pio_queue; ++ struct intf_hdl *pintfhdl = &(pio_queue->intf); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("+usb_write_port_complete\n")); ++ ++ _rtw_spinlock_ex(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; ++ _rtw_spinunlock_ex(&pxmitpriv->lock); ++ ++ if(pxmitpriv->txirp_cnt==0){ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete: txirp_cnt== 0, set allrxreturnevt!\n")); ++ _rtw_up_sema(&(pxmitpriv->tx_retevt)); ++ } ++ ++ status = pIrp->IoStatus.Status; ++ ++ if( status == STATUS_SUCCESS ) ++ bIrpSuccess = _TRUE; ++ else ++ bIrpSuccess = _FALSE; ++ ++ if( pIrp->Cancel == _TRUE ) ++ { ++ if(pxmitframe !=NULL) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pIrp->Cancel == _TRUE,(pxmitframe !=NULL\n")); ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ } ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ if(padapter->bSurpriseRemoved) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port_complete:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ } ++ ++ ++ // ++ // Send 0-byte here if necessary. ++ // ++ // ++ // 1. We MUST keep at most one IRP pending in each endpoint, otherwise USB host controler driver will hang. ++ // Besides, even 0-byte IRP shall be count into #IRP sent down, so, we send 0-byte here instead of TxFillDescriptor8187(). ++ // 2. If we don't count 0-byte IRP into an #IRP sent down, Tx will stuck when we download files via BT and ++ // play online video on XP SP1 EHCU. ++ // 2005.12.26, by rcnjko. ++ // ++ ++ ++ for(i=0; i< 8; i++) ++ { ++ if(pIrp == pxmitframe->pxmit_irp[i]) ++ { ++ pxmitframe->bpending[i] = _FALSE;// ++ //ac_tag = pxmitframe->ac_tag[i]; ++ sz = pxmitframe->sz[i]; ++ break; ++ } ++ } ++ ++#if 0 ++ pxmitframe->fragcnt--; ++ if(pxmitframe->fragcnt == 0)// if((pxmitframe->fragcnt == 0) && (pxmitframe->irpcnt == 8)){ ++ { ++ //RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port_complete:pxmitframe->fragcnt == 0\n")); ++ rtw_free_xmitframe(pxmitpriv,pxmitframe); ++ } ++#else ++ ++ //not to consider tx fragment ++ rtw_free_xmitframe_ex(pxmitpriv, pxmitframe); ++ ++#endif ++ ++ rtl8192cu_xmitframe_complete(padapter, pxmitpriv, pxmitbuf); ++ ++_func_exit_; ++ ++ return STATUS_MORE_PROCESSING_REQUIRED; ++ ++} ++ ++u32 usb_write_port(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem) ++{ ++ u32 i, bwritezero; ++ u8 *ptr; ++ PIO_STACK_LOCATION nextStack; ++ USBD_STATUS usbdstatus; ++ HANDLE PipeHandle; ++ PIRP pirp = NULL; ++ PURB purb = NULL; ++ NDIS_STATUS ndisStatus = NDIS_STATUS_SUCCESS; ++ _adapter *padapter = (_adapter *)pintfhdl->adapter; ++ struct dvobj_priv *pNdisCEDvice = (struct dvobj_priv *)&padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct xmit_frame *pxmitframe = (struct xmit_frame *)wmem; ++ ++_func_enter_; ++ ++ if((padapter->bDriverStopped) || (padapter->bSurpriseRemoved) ||(padapter->pwrctrlpriv.pnp_bstop_trx)) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usb_write_port:( padapter->bDriverStopped ||padapter->bSurpriseRemoved ||adapter->pwrctrlpriv.pnp_bstop_trx)!!!\n")); ++ return _FAIL; ++ } ++ ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitframe->bpending[i] == _FALSE) ++ { ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt++; ++ pxmitframe->bpending[i] = _TRUE; ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ pxmitframe->sz[i] = cnt; ++ purb = pxmitframe->pxmit_urb[i]; ++ pirp = pxmitframe->pxmit_irp[i]; ++ ++ //pxmitframe->ac_tag[i] = ac_tag; ++ ++ break; ++ } ++ } ++ ++ bwritezero = _FALSE; ++ if (pNdisCEDvice->ishighspeed) ++ { ++ if(cnt> 0 && cnt%512 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("ishighspeed, cnt=%d\n", cnt)); ++ //cnt=cnt+1; ++ bwritezero = _TRUE; ++ } ++ } ++ else ++ { ++ if(cnt > 0 && cnt%64 == 0) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("cnt=%d\n", cnt)); ++ //cnt=cnt+1; ++ bwritezero = _TRUE; ++ } ++ } ++ ++ ++#ifdef NDIS51_MINIPORT ++ IoReuseIrp(pirp, STATUS_SUCCESS); ++#else ++ pirp->Cancel = _FALSE; ++#endif ++ ++ ++ //translate DMA FIFO addr to pipehandle ++ PipeHandle = ffaddr2pipehdl(pNdisCEDvice, addr); ++ ++ ++ // Build our URB for USBD ++ UsbBuildInterruptOrBulkTransferRequest( ++ purb, ++ sizeof(struct _URB_BULK_OR_INTERRUPT_TRANSFER), ++ PipeHandle, ++ pxmitframe->mem_addr, ++ NULL, ++ cnt, ++ 0, ++ NULL); ++ ++ // ++ // call the calss driver to perform the operation ++ // pass the URB to the USB driver stack ++ // ++ nextStack = IoGetNextIrpStackLocation(pirp); ++ nextStack->MajorFunction = IRP_MJ_INTERNAL_DEVICE_CONTROL; ++ nextStack->Parameters.Others.Argument1 = purb; ++ nextStack->Parameters.DeviceIoControl.IoControlCode = IOCTL_INTERNAL_USB_SUBMIT_URB; ++ ++ //Set Completion Routine ++ IoSetCompletionRoutine(pirp, // irp to use ++ usb_write_port_complete, // callback routine ++ pxmitframe, // context ++ TRUE, // call on success ++ TRUE, // call on error ++ TRUE); // call on cancel ++ ++ ++ // Call IoCallDriver to send the irp to the usb bus driver ++ // ++ ndisStatus = IoCallDriver(pNdisCEDvice->pnextdevobj, pirp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if( USBD_HALTED(usbdstatus) ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): USBD_HALTED(usbdstatus)=%x set bDriverStopped TRUE!\n\n",USBD_HALTED(usbdstatus)) ); ++ padapter->bDriverStopped=_TRUE; ++ padapter->bSurpriseRemoved=_TRUE; ++ } ++ ++ // ++ // The usb bus driver should always return STATUS_PENDING when bulk out irp async ++ // ++ if ( ndisStatus != STATUS_PENDING ) ++ { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("\n usb_write_port(): ndisStatus(%x) != STATUS_PENDING!\n\n", ndisStatus)); ++ ++ _func_exit_; ++ ++ return _FAIL; ++ } ++ ++ if(bwritezero == _TRUE) ++ { ++ usb_bulkout_zero(pintfhdl, addr); ++ } ++ ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++} ++ ++ ++void usb_write_port_cancel(_adapter *padapter) ++{ ++ ++ sint i,j; ++ struct dvobj_priv *pdev = &padapter->dvobjpriv; ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ struct xmit_frame *pxmitframe; ++ ++ _rtw_spinlock(&pxmitpriv->lock); ++ pxmitpriv->txirp_cnt--; //decrease 1 for Initialize ++ ++ _rtw_spinunlock(&pxmitpriv->lock); ++ ++ if (pxmitpriv->txirp_cnt) ++ { ++ // Canceling Pending Recv Irp ++ pxmitframe= (struct xmit_frame *)pxmitpriv->pxmit_frame_buf; ++ ++ for( i = 0; i < NR_XMITFRAME; i++ ) ++ { ++ for(j=0;j<8;j++) ++ { ++ if (pxmitframe->bpending[j]==_TRUE) ++ { ++ IoCancelIrp(pxmitframe->pxmit_irp[j]); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usb_write_port_cancel() :IoCancelIrp\n")); ++ ++ } ++ } ++ ++ pxmitframe++; ++ } ++ ++ _rtw_down_sema(&(pxmitpriv->tx_retevt)); ++ ++ } ++ ++} ++ ++ ++/*! \brief Wrap the pUrb to an IRP and send this IRP to Bus Driver. Then wait for this IRP completion. ++ The Caller shall be at Passive Level. ++*/ ++NTSTATUS sync_callusbd(struct dvobj_priv *pdvobjpriv, PURB purb) ++{ ++ ++ KEVENT kevent; ++ PIRP irp; ++ IO_STATUS_BLOCK iostatusblock; ++ PIO_STACK_LOCATION nextstack; ++ USBD_STATUS usbdstatus; ++ LARGE_INTEGER waittime; ++ NTSTATUS ntstatus = STATUS_SUCCESS; ++ _adapter *padapter = pdvobjpriv->padapter; ++ ++ ++ _func_enter_; ++ ++// if(padapter->bDriverStopped) { ++// goto exit; ++// } ++ ++ KeInitializeEvent(&kevent, NotificationEvent, _FALSE); ++ irp = IoBuildDeviceIoControlRequest( ++ IOCTL_INTERNAL_USB_SUBMIT_URB, ++ pdvobjpriv->pphysdevobj,//CEdevice->pUsbDevObj, ++ NULL, ++ 0, ++ NULL, ++ 0, ++ _TRUE, ++ &kevent, ++ &iostatusblock); ++ ++ if(irp == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: memory alloc for irp failed\n")); ++ ntstatus=STATUS_INSUFFICIENT_RESOURCES; ++ goto exit; ++ } ++ ++ nextstack = IoGetNextIrpStackLocation(irp); ++ if(nextstack == NULL) ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("IoGetNextIrpStackLocation fail\n")); ++ ++ nextstack->Parameters.Others.Argument1 = purb; ++ ++ // Issue an IRP for Sync IO. ++ ntstatus = IoCallDriver(pdvobjpriv->pphysdevobj, irp); ++ usbdstatus = URB_STATUS(purb); ++ ++ if(ntstatus == STATUS_PENDING) ++ { ++ // Method 1 ++ waittime.QuadPart = -10000 * 50000; ++ ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, &waittime); //8150 code ++ ++ // Method 2 ++ //ntStatus = KeWaitForSingleObject(&Kevent, Executive, KernelMode, FALSE, NULL); //DDK sample ++ ++ usbdstatus = URB_STATUS(purb); ++ ++ if(ntstatus == STATUS_TIMEOUT) ++ { ++ //usbdevice->nIoStuckCnt++; ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("SyncCallUSBD: TIMEOUT....5000ms\n")); ++ ++ // Method 2 ++ IoCancelIrp(irp); ++ ntstatus = KeWaitForSingleObject(&kevent, Executive, KernelMode, _FALSE, NULL); //DDK sample ++ usbdstatus = URB_STATUS(purb); ++ ++ usbdstatus = USBD_STATUS_SUCCESS; ++ } ++ ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ntstatus; ++ ++} ++int usbctrl_vendorreq(struct intf_priv *pintfpriv, u8 request, u16 value, u16 index, void *pdata, u16 len, u8 requesttype) ++{ ++ PURB purb; ++ u8 ret; ++ unsigned long transferflags; ++ NTSTATUS ntstatus; ++ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv *)pintfpriv->intf_dev; ++ ++ _func_enter_; ++ ++ ret=_TRUE; ++ purb = (PURB)ExAllocatePool(NonPagedPool, sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST) ); ++ if(purb == NULL) { ++ ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("usbctrl_vendorreq(): Failed to allocate urb !!!\n")); ++ ret =_FALSE; ++ goto exit; ++ } ++ ++ if (requesttype == 0x01) { ++ transferflags = USBD_TRANSFER_DIRECTION_IN;//read_in ++ } else { ++ transferflags= 0;//write_out ++ } ++ ++ UsbBuildVendorRequest( ++ purb, //Pointer to an URB that is to be formatted as a vendor or class request. ++ URB_FUNCTION_VENDOR_DEVICE, //Indicates the URB is a vendor-defined request for a USB device. ++ sizeof(struct _URB_CONTROL_VENDOR_OR_CLASS_REQUEST), //Specifies the length, in bytes, of the URB. ++ transferflags, //TransferFlags ++ 0, //ReservedBits ++ request, //Request ++ value, //Value ++ index, //Index ++ pdata, //TransferBuffer ++ NULL, //TransferBufferMDL ++ len, //TransferBufferLength ++ NULL //Link ++ ); ++ ++ ntstatus = sync_callusbd(pdvobjpriv, purb); ++ if(!NT_SUCCESS(ntstatus)) ++ { ++ ExFreePool(purb); ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,(" usbctrl_vendorreq() : SOMETHING WRONG\n") ); ++ ret = _FALSE; ++ goto exit; ++ } ++ ++ ExFreePool(purb); ++ ++exit: ++ _func_exit_; ++ ++ return ret; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/ifcfg-wlan0 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,4 @@ ++#DHCP client ++DEVICE=wlan0 ++BOOTPROTO=dhcp ++ONBOOT=yes +\ No newline at end of file +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CEHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,81 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CE_FW_IMG_H ++#define __INC_HAL8192CE_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/ 6/15, 5:45*/ ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define TSMCImgArrayLength 16404 //v79 TSMC P2PPS 2011-10-06 ++#endif ++extern u8 Rtl8192CEFwTSMCImgArray[TSMCImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCACutImgArrayLength 16404 //v79 UMC A Cut P2PPS 2011-10-06 ++#endif ++extern u8 Rtl8192CEFwUMCACutImgArray[UMCACutImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCBCutImgArrayLength 16386 //v79 UMC B Cut P2PPS 2011-10-06 ++#endif ++extern u8 Rtl8192CEFwUMCBCutImgArray[UMCBCutImgArrayLength]; ++ ++#define PHY_REG_2TArrayLength 374 ++extern u32 Rtl8192CEPHY_REG_2TArray[PHY_REG_2TArrayLength]; ++#define PHY_REG_1TArrayLength 374 ++extern u32 Rtl8192CEPHY_REG_1TArray[PHY_REG_1TArrayLength]; ++#define PHY_ChangeTo_1T1RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; ++#define PHY_ChangeTo_1T2RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; ++#define PHY_ChangeTo_2T2RArrayLength 1 ++extern u32 Rtl8192CEPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; ++#define PHY_REG_Array_PGLength 336 ++extern u32 Rtl8192CEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; ++#define PHY_REG_Array_MPLength 4 ++extern u32 Rtl8192CEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; ++#define RadioA_2TArrayLength 282 ++extern u32 Rtl8192CERadioA_2TArray[RadioA_2TArrayLength]; ++#define RadioB_2TArrayLength 78 ++extern u32 Rtl8192CERadioB_2TArray[RadioB_2TArrayLength]; ++#define RadioA_1TArrayLength 282 ++extern u32 Rtl8192CERadioA_1TArray[RadioA_1TArrayLength]; ++#define RadioB_1TArrayLength 1 ++extern u32 Rtl8192CERadioB_1TArray[RadioB_1TArrayLength]; ++#define RadioB_GM_ArrayLength 1 ++extern u32 Rtl8192CERadioB_GM_Array[RadioB_GM_ArrayLength]; ++#define MAC_2T_ArrayLength 172 ++extern u32 Rtl8192CEMAC_2T_Array[MAC_2T_ArrayLength]; ++#define MACPHY_Array_PGLength 1 ++extern u32 Rtl8192CEMACPHY_Array_PG[MACPHY_Array_PGLength]; ++#define AGCTAB_2TArrayLength 320 ++extern u32 Rtl8192CEAGCTAB_2TArray[AGCTAB_2TArrayLength]; ++#define AGCTAB_1TArrayLength 320 ++extern u32 Rtl8192CEAGCTAB_1TArray[AGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CE_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyCfg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,451 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * Module: __INC_HAL8192CPHYCFG_H ++ * ++ * ++ * Note: ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * ++ *****************************************************************************/ ++ /* Check to see if the file has been included already. */ ++#ifndef __INC_HAL8192CPHYCFG_H ++#define __INC_HAL8192CPHYCFG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM 9 ++#define HP_THERMAL_NUM 8 ++ ++#ifdef CONFIG_PCI_HCI ++#define MAX_AGGR_NUM 0x0A0A ++#else ++#define MAX_AGGR_NUM 0x0909 ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ ++{ \ ++ u1Byte u1bTmp; \ ++ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ ++ u1bTmp |= BIT0; \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ ++ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++ delay_us(100); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++} ++#endif ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++typedef enum _SwChnlCmdID{ ++ CmdID_End, ++ CmdID_SetTxPowerLevel, ++ CmdID_BBRegWrite10, ++ CmdID_WritePortUlong, ++ CmdID_WritePortUshort, ++ CmdID_WritePortUchar, ++ CmdID_RF_WriteReg, ++}SwChnlCmdID; ++ ++ ++/* 1. Switch channel related */ ++typedef struct _SwChnlCmd{ ++ SwChnlCmdID CmdID; ++ u32 Para1; ++ u32 Para2; ++ u32 msDelay; ++}SwChnlCmd; ++ ++typedef enum _HW90_BLOCK{ ++ HW90_BLOCK_MAC = 0, ++ HW90_BLOCK_PHY0 = 1, ++ HW90_BLOCK_PHY1 = 2, ++ HW90_BLOCK_RF = 3, ++ HW90_BLOCK_MAXIMUM = 4, // Never use this ++}HW90_BLOCK_E, *PHW90_BLOCK_E; ++ ++typedef enum _RF90_RADIO_PATH{ ++ RF90_PATH_A = 0, //Radio Path A ++ RF90_PATH_B = 1, //Radio Path B ++ RF90_PATH_C = 2, //Radio Path C ++ RF90_PATH_D = 3, //Radio Path D ++ //RF90_PATH_MAX //Max RF number 90 support ++}RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; ++ ++#define RF90_PATH_MAX 2 ++ ++#define CHANNEL_MAX_NUMBER 14 // 14 is the max channel number ++#define CHANNEL_GROUP_MAX 3 // ch1~3, ch4~9, ch10~14 total three groups ++ ++typedef enum _WIRELESS_MODE { ++ WIRELESS_MODE_UNKNOWN = 0x00, ++ WIRELESS_MODE_A = 0x01, ++ WIRELESS_MODE_B = 0x02, ++ WIRELESS_MODE_G = 0x04, ++ WIRELESS_MODE_AUTO = 0x08, ++ WIRELESS_MODE_N_24G = 0x10, ++ WIRELESS_MODE_N_5G = 0x20 ++} WIRELESS_MODE; ++ ++typedef enum _BaseBand_Config_Type{ ++ BaseBand_Config_PHY_REG = 0, //Radio Path A ++ BaseBand_Config_AGC_TAB = 1, //Radio Path B ++}BaseBand_Config_Type, *PBaseBand_Config_Type; ++ ++ ++typedef enum _PHY_Rate_Tx_Power_Offset_Area{ ++ RA_OFFSET_LEGACY_OFDM1, ++ RA_OFFSET_LEGACY_OFDM2, ++ RA_OFFSET_HT_OFDM1, ++ RA_OFFSET_HT_OFDM2, ++ RA_OFFSET_HT_OFDM3, ++ RA_OFFSET_HT_OFDM4, ++ RA_OFFSET_HT_CCK, ++}RA_OFFSET_AREA,*PRA_OFFSET_AREA; ++ ++ ++/* BB/RF related */ ++typedef enum _RF_TYPE_8190P{ ++ RF_TYPE_MIN, // 0 ++ RF_8225=1, // 1 11b/g RF for verification only ++ RF_8256=2, // 2 11b/g/n ++ RF_8258=3, // 3 11a/b/g/n RF ++ RF_6052=4, // 4 11b/g/n RF ++ //RF_6052=5, // 4 11b/g/n RF ++ // TODO: We sholud remove this psudo PHY RF after we get new RF. ++ RF_PSEUDO_11N=5, // 5, It is a temporality RF. ++}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; ++ ++ ++typedef enum _RATR_TABLE_MODE_8192C{ ++ RATR_INX_WIRELESS_NGB = 0, ++ RATR_INX_WIRELESS_NG = 1, ++ RATR_INX_WIRELESS_NB = 2, ++ RATR_INX_WIRELESS_N = 3, ++ RATR_INX_WIRELESS_GB = 4, ++ RATR_INX_WIRELESS_G = 5, ++ RATR_INX_WIRELESS_B = 6, ++ RATR_INX_WIRELESS_MC = 7, ++ RATR_INX_WIRELESS_A = 8, ++}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; ++ ++typedef struct _BB_REGISTER_DEFINITION{ ++ u32 rfintfs; // set software control: ++ // 0x870~0x877[8 bytes] ++ ++ u32 rfintfi; // readback data: ++ // 0x8e0~0x8e7[8 bytes] ++ ++ u32 rfintfo; // output data: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rfintfe; // output enable: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rf3wireOffset; // LSSI data: ++ // 0x840~0x84f [16 bytes] ++ ++ u32 rfLSSI_Select; // BB Band Select: ++ // 0x878~0x87f [8 bytes] ++ ++ u32 rfTxGainStage; // Tx gain stage: ++ // 0x80c~0x80f [4 bytes] ++ ++ u32 rfHSSIPara1; // wire parameter control1 : ++ // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] ++ ++ u32 rfHSSIPara2; // wire parameter control2 : ++ // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] ++ ++ u32 rfSwitchControl; //Tx Rx antenna control : ++ // 0x858~0x85f [16 bytes] ++ ++ u32 rfAGCControl1; //AGC parameter control1 : ++ // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] ++ ++ u32 rfAGCControl2; //AGC parameter control2 : ++ // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] ++ ++ u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : ++ // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] ++ ++ u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : ++ // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] ++ ++ u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix ++ // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] ++ ++ u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type ++ // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] ++ ++ u32 rfLSSIReadBack; //LSSI RF readback data SI mode ++ // 0x8a0~0x8af [16 bytes] ++ ++ u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B ++ ++}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; ++ ++#ifdef CONFIG_MP_INCLUDED ++typedef enum _ANTENNA_PATH{ ++ ANTENNA_NONE = 0x00, ++ ANTENNA_D , ++ ANTENNA_C , ++ ANTENNA_CD , ++ ANTENNA_B , ++ ANTENNA_BD , ++ ANTENNA_BC , ++ ANTENNA_BCD , ++ ANTENNA_A , ++ ANTENNA_AD , ++ ANTENNA_AC , ++ ANTENNA_ACD , ++ ANTENNA_AB , ++ ANTENNA_ABD , ++ ANTENNA_ABC , ++ ANTENNA_ABCD ++} ANTENNA_PATH; ++#endif ++ ++typedef struct _R_ANTENNA_SELECT_OFDM{ ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK{ ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++u32 rtl8192c_PHY_QueryBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192c_PHY_SetBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192c_PHY_QueryRFReg( IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192c_PHY_SetRFReg( IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++int PHY_MACConfig8192C( IN PADAPTER Adapter ); ++int PHY_BBConfig8192C( IN PADAPTER Adapter ); ++int PHY_RFConfig8192C( IN PADAPTER Adapter ); ++/* RF config */ ++int rtl8192c_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, ++ IN u8* pFileName, ++ IN RF90_RADIO_PATH_E eRFPath); ++int rtl8192c_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, ++ IN RF90_RADIO_PATH_E eRFPath); ++ ++/* BB/RF readback check for making sure init OK */ ++int rtl8192c_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, ++ IN HW90_BLOCK_E CheckBlock, ++ IN RF90_RADIO_PATH_E eRFPath ); ++/* Read initi reg value for tx power setting. */ ++void rtl8192c_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192C( IN PADAPTER Adapter, ++ OUT u32* powerlevel ); ++void PHY_SetTxPowerLevel8192C( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192C( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++// ++VOID ++PHY_ScanOperationBackup8192C(IN PADAPTER Adapter, ++ IN u8 Operation ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//extern void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8192C( IN PADAPTER pAdapter, ++ IN HT_CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8192C( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ // Call after initialization ++void PHY_SwChnlPhy8192C( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++void ChkFwCmdIoDone( IN PADAPTER Adapter); ++ ++#ifdef USE_WORKITEM ++//extern void SetIOWorkItemCallback( IN PVOID pContext ); ++#else ++//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); ++#endif ++ ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192C(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192C(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++// ++// IQ calibrate ++// ++VOID rtl8192c_PHY_IQCalibrate( IN PADAPTER pAdapter , IN BOOLEAN bReCovery); ++ ++// ++// LC calibrate ++// ++VOID rtl8192c_PHY_LCCalibrate(IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++VOID rtl8192c_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); ++ ++VOID rtl8192c_PHY_DigitalPredistortion(IN PADAPTER pAdapter); ++ ++VOID rtl8192c_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++// ++// Modify the value of the hw register when beacon interval be changed. ++// ++void ++rtl8192c_PHY_SetBeaconHwReg( IN PADAPTER Adapter, ++ IN u16 BeaconInterval ); ++ ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192c_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) ++#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192c_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192c_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) ++#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192c_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) ++ ++#define PHY_SetMacReg PHY_SetBBReg ++ ++#endif // __INC_HAL8192CPHYCFG_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CPhyReg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1102 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192CPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192CPHYREG_H ++#define __INC_HAL8192CPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++ ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,99 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CU_FW_IMG_H ++#define __INC_HAL8192CU_FW_IMG_H ++ ++/*Created on 2011/12/14, 8:38*/ ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define TSMCImgArrayLength 16248 //v79 TSMC COMMON 2011-10-06 ++#else ++#define TSMCImgArrayLength 16116 //v80 TSMC P2PPS 2011-12-14 ++#endif ++extern u8 Rtl8192CUFwTSMCImgArray[TSMCImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCACutImgArrayLength 16248 //v79 UMC A Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCACutImgArrayLength 16116 //v80 UMC A Cut P2PPS 2011-12-14 ++#endif ++extern u8 Rtl8192CUFwUMCACutImgArray[UMCACutImgArrayLength]; ++ ++#ifdef CONFIG_BT_COEXISTENCE ++#define UMCBCutImgArrayLength 16254 //v79 UMC B Cut COMMON 2011-10-06 ++#else //#ifdef CONFIG_P2P ++#define UMCBCutImgArrayLength 16096 //v80 UMC B Cut P2PPS 2011-12-14 ++#endif ++extern u8 Rtl8192CUFwUMCBCutImgArray[UMCBCutImgArrayLength]; ++ ++#define UMC8723ImgArrayLength 16288 ++extern u8 Rtl8192CUFwUMC8723ImgArray[UMC8723ImgArrayLength]; ++#define PHY_REG_2TArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_2TArray[PHY_REG_2TArrayLength]; ++#define PHY_REG_1TArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_1TArray[PHY_REG_1TArrayLength]; ++#define PHY_ChangeTo_1T1RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_1T1RArray[PHY_ChangeTo_1T1RArrayLength]; ++#define PHY_ChangeTo_1T2RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_1T2RArray[PHY_ChangeTo_1T2RArrayLength]; ++#define PHY_ChangeTo_2T2RArrayLength 1 ++extern u32 Rtl8192CUPHY_ChangeTo_2T2RArray[PHY_ChangeTo_2T2RArrayLength]; ++#define PHY_REG_Array_PGLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG[PHY_REG_Array_PGLength]; ++#define PHY_REG_Array_PG_mCardLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG_mCard[PHY_REG_Array_PG_mCardLength]; ++#define PHY_REG_Array_MPLength 4 ++extern u32 Rtl8192CUPHY_REG_Array_MP[PHY_REG_Array_MPLength]; ++#define PHY_REG_1T_HPArrayLength 378 ++extern u32 Rtl8192CUPHY_REG_1T_HPArray[PHY_REG_1T_HPArrayLength]; ++#define PHY_REG_1T_mCardArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_1T_mCardArray[PHY_REG_1T_mCardArrayLength]; ++#define PHY_REG_2T_mCardArrayLength 374 ++extern u32 Rtl8192CUPHY_REG_2T_mCardArray[PHY_REG_2T_mCardArrayLength]; ++#define PHY_REG_Array_PG_HPLength 336 ++extern u32 Rtl8192CUPHY_REG_Array_PG_HP[PHY_REG_Array_PG_HPLength]; ++#define RadioA_2TArrayLength 282 ++extern u32 Rtl8192CURadioA_2TArray[RadioA_2TArrayLength]; ++#define RadioB_2TArrayLength 78 ++extern u32 Rtl8192CURadioB_2TArray[RadioB_2TArrayLength]; ++#define RadioA_1TArrayLength 282 ++extern u32 Rtl8192CURadioA_1TArray[RadioA_1TArrayLength]; ++#define RadioB_1TArrayLength 1 ++extern u32 Rtl8192CURadioB_1TArray[RadioB_1TArrayLength]; ++#define RadioA_1T_mCardArrayLength 282 ++extern u32 Rtl8192CURadioA_1T_mCardArray[RadioA_1T_mCardArrayLength]; ++#define RadioB_1T_mCardArrayLength 1 ++extern u32 Rtl8192CURadioB_1T_mCardArray[RadioB_1T_mCardArrayLength]; ++#define RadioA_1T_HPArrayLength 282 ++extern u32 Rtl8192CURadioA_1T_HPArray[RadioA_1T_HPArrayLength]; ++#define RadioB_GM_ArrayLength 1 ++extern u32 Rtl8192CURadioB_GM_Array[RadioB_GM_ArrayLength]; ++#define MAC_2T_ArrayLength 172 ++extern u32 Rtl8192CUMAC_2T_Array[MAC_2T_ArrayLength]; ++#define MACPHY_Array_PGLength 1 ++extern u32 Rtl8192CUMACPHY_Array_PG[MACPHY_Array_PGLength]; ++#define AGCTAB_2TArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_2TArray[AGCTAB_2TArrayLength]; ++#define AGCTAB_1TArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_1TArray[AGCTAB_1TArrayLength]; ++#define AGCTAB_1T_HPArrayLength 320 ++extern u32 Rtl8192CUAGCTAB_1T_HPArray[AGCTAB_1T_HPArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192CUHWImg_wowlan.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,34 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192CU_FW_IMG_WOWLAN_H ++#define __INC_HAL8192CU_FW_IMG_WOWLAN_H ++ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++ ++#define TSMCWWImgArrayLength 13458 ++extern u8 Rtl8192CUFwTSMCWWImgArray[TSMCWWImgArrayLength]; ++#define UMCACutWWImgArrayLength 13458 ++extern u8 Rtl8192CUFwUMCACutWWImgArray[UMCACutWWImgArrayLength]; ++#define UMCBCutWWImgArrayLength 13446 ++extern u8 Rtl8192CUFwUMCBCutWWImgArray[UMCBCutWWImgArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_WOWLAN_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DEHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,66 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DU_FW_IMG_H ++#define __INC_HAL8192DU_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/ 8/ 8, 1:41*/ ++ ++#define ImgArrayLength 29642 ++extern u8 Rtl8192DEFwImgArray[ImgArrayLength]; ++#define MainArrayLength 1 ++extern u8 Rtl8192DEFwMainArray[MainArrayLength]; ++#define DataArrayLength 1 ++extern u8 Rtl8192DEFwDataArray[DataArrayLength]; ++#define PHY_REG_2TArrayLength 380 ++extern u32 Rtl8192DEPHY_REG_2TArray[PHY_REG_2TArrayLength]; ++#define PHY_REG_1TArrayLength 1 ++extern u32 Rtl8192DEPHY_REG_1TArray[PHY_REG_1TArrayLength]; ++#define PHY_REG_Array_PGLength 624 ++extern u32 Rtl8192DEPHY_REG_Array_PG[PHY_REG_Array_PGLength]; ++#define PHY_REG_Array_MPLength 10 ++extern u32 Rtl8192DEPHY_REG_Array_MP[PHY_REG_Array_MPLength]; ++#define RadioA_2TArrayLength 378 ++extern u32 Rtl8192DERadioA_2TArray[RadioA_2TArrayLength]; ++#define RadioB_2TArrayLength 384 ++extern u32 Rtl8192DERadioB_2TArray[RadioB_2TArrayLength]; ++#define RadioA_1TArrayLength 1 ++extern u32 Rtl8192DERadioA_1TArray[RadioA_1TArrayLength]; ++#define RadioB_1TArrayLength 1 ++extern u32 Rtl8192DERadioB_1TArray[RadioB_1TArrayLength]; ++#define RadioA_2T_intPAArrayLength 378 ++extern u32 Rtl8192DERadioA_2T_intPAArray[RadioA_2T_intPAArrayLength]; ++#define RadioB_2T_intPAArrayLength 384 ++extern u32 Rtl8192DERadioB_2T_intPAArray[RadioB_2T_intPAArrayLength]; ++#define MAC_2TArrayLength 160 ++extern u32 Rtl8192DEMAC_2TArray[MAC_2TArrayLength]; ++#define AGCTAB_ArrayLength 386 ++extern u32 Rtl8192DEAGCTAB_Array[AGCTAB_ArrayLength]; ++#define AGCTAB_5GArrayLength 194 ++extern u32 Rtl8192DEAGCTAB_5GArray[AGCTAB_5GArrayLength]; ++#define AGCTAB_2GArrayLength 194 ++extern u32 Rtl8192DEAGCTAB_2GArray[AGCTAB_2GArrayLength]; ++#define AGCTAB_2TArrayLength 1 ++extern u32 Rtl8192DEAGCTAB_2TArray[AGCTAB_2TArrayLength]; ++#define AGCTAB_1TArrayLength 1 ++extern u32 Rtl8192DEAGCTAB_1TArray[AGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DETestHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,54 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DETEST_FW_IMG_H ++#define __INC_HAL8192DETEST_FW_IMG_H ++ ++#include ++ ++/*Created on 2010/ 5/27, 8: 6*/ ++ ++#define Rtl8192DTestImgArrayLength 15054 ++extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; ++#define Rtl8192DTestMainArrayLength 1 ++extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; ++#define Rtl8192DTestDataArrayLength 1 ++extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; ++#define Rtl8192DTestPHY_REG_2TArrayLength 376 ++extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; ++#define Rtl8192DTestPHY_REG_1TArrayLength 1 ++extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; ++#define Rtl8192DTestPHY_REG_Array_PGLength 1 ++extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; ++#define Rtl8192DTestRadioA_2TArrayLength 340 ++extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; ++#define Rtl8192DTestRadioB_2TArrayLength 340 ++extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; ++#define Rtl8192DTestRadioA_1TArrayLength 1 ++extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; ++#define Rtl8192DTestRadioB_1TArrayLength 1 ++extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; ++#define Rtl8192DTestMAC_2TArrayLength 174 ++extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; ++#define Rtl8192DTestAGCTAB_5GArrayLength 514 ++extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; ++#define Rtl8192DTestAGCTAB_2GArrayLength 514 ++extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyCfg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,528 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192DPHYCFG_H ++ * ++ * ++ * Note: ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * ++ *****************************************************************************/ ++ /* Check to see if the file has been included already. */ ++#ifndef __INC_HAL8192DPHYCFG_H ++#define __INC_HAL8192DPHYCFG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++#define LOOP_LIMIT 5 ++#define MAX_STALL_TIME 50 //us ++#define AntennaDiversityValue 0x80 //(Adapter->bSoftwareAntennaDiversity ? 0x00:0x80) ++#define MAX_TXPWR_IDX_NMODE_92S 63 ++#define Reset_Cnt_Limit 3 ++ ++ ++#define IQK_MAC_REG_NUM 4 ++#define IQK_ADDA_REG_NUM 16 ++#define IQK_BB_REG_NUM 10 ++#define IQK_BB_REG_NUM_92C 9 ++#define IQK_BB_REG_NUM_92D 10 ++#define IQK_BB_REG_NUM_test 6 ++#define index_mapping_NUM 13 ++#define Rx_index_mapping_NUM 15 ++#define AVG_THERMAL_NUM 8 ++#define IQK_Matrix_REG_NUM 8 ++#define IQK_Matrix_Settings_NUM 1+24+21 ++ ++#ifdef CONFIG_PCI_HCI ++#define SET_RTL8192SE_RF_SLEEP(_pAdapter) \ ++{ \ ++ u1Byte u1bTmp; \ ++ u1bTmp = PlatformEFIORead1Byte(_pAdapter, REG_LDOV12D_CTRL); \ ++ u1bTmp |= BIT0; \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_LDOV12D_CTRL, u1bTmp); \ ++ PlatformEFIOWrite1Byte(_pAdapter, REG_SPS_OCP_CFG, 0x0); \ ++ PlatformEFIOWrite1Byte(_pAdapter, TXPAUSE, 0xFF); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++ delay_us(100); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ PlatformEFIOWrite1Byte(_pAdapter, PHY_CCA, 0x0); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x37FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x77FC); \ ++ delay_us(10); \ ++ PlatformEFIOWrite2Byte(_pAdapter, CMDR, 0x57FC); \ ++} ++#endif ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++typedef enum _SwChnlCmdID{ ++ CmdID_End, ++ CmdID_SetTxPowerLevel, ++ CmdID_BBRegWrite10, ++ CmdID_WritePortUlong, ++ CmdID_WritePortUshort, ++ CmdID_WritePortUchar, ++ CmdID_RF_WriteReg, ++}SwChnlCmdID; ++ ++ ++/* 1. Switch channel related */ ++typedef struct _SwChnlCmd{ ++ SwChnlCmdID CmdID; ++ u32 Para1; ++ u32 Para2; ++ u32 msDelay; ++}SwChnlCmd; ++ ++typedef enum _HW90_BLOCK{ ++ HW90_BLOCK_MAC = 0, ++ HW90_BLOCK_PHY0 = 1, ++ HW90_BLOCK_PHY1 = 2, ++ HW90_BLOCK_RF = 3, ++ HW90_BLOCK_MAXIMUM = 4, // Never use this ++}HW90_BLOCK_E, *PHW90_BLOCK_E; ++ ++//vivi added this for read parameter from header, 20100908 ++typedef enum _RF_CONTENT{ ++ radioa_txt = 0x1000, ++ radiob_txt = 0x1001, ++ radioc_txt = 0x1002, ++ radiod_txt = 0x1003 ++} RF_CONTENT; ++ ++#define RF_PATH_MAX 2 ++ ++typedef enum _WIRELESS_MODE { ++ WIRELESS_MODE_UNKNOWN = 0x00, ++ WIRELESS_MODE_A = 0x01, ++ WIRELESS_MODE_B = 0x02, ++ WIRELESS_MODE_G = 0x04, ++ WIRELESS_MODE_AUTO = 0x08, ++ WIRELESS_MODE_N_24G = 0x10, ++ WIRELESS_MODE_N_5G = 0x20 ++} WIRELESS_MODE; ++ ++ ++#define CHANNEL_MAX_NUMBER 14+24+21 // 14 is the max channel number ++#define CHANNEL_GROUP_MAX 3+9 // ch1~3, ch4~9, ch10~14 total three groups ++#define MAX_PG_GROUP 13 ++ ++#define CHANNEL_GROUP_MAX_2G 3 ++#define CHANNEL_GROUP_IDX_5GL 3 ++#define CHANNEL_GROUP_IDX_5GM 6 ++#define CHANNEL_GROUP_IDX_5GH 9 ++#define CHANNEL_GROUP_MAX_5G 9 ++#define CHANNEL_MAX_NUMBER_2G 14 ++ ++typedef enum _BaseBand_Config_Type{ ++ BaseBand_Config_PHY_REG = 0, //Radio Path A ++ BaseBand_Config_AGC_TAB = 1, //Radio Path B ++}BaseBand_Config_Type, *PBaseBand_Config_Type; ++ ++typedef enum _MACPHY_MODE_8192D{ ++ SINGLEMAC_SINGLEPHY, ++ DUALMAC_DUALPHY, ++ DUALMAC_SINGLEPHY, ++}MACPHY_MODE_8192D,*PMACPHY_MODE_8192D; ++ ++typedef enum _BAND_TYPE{ ++ BAND_ON_2_4G = 0, ++ BAND_ON_5G, ++ BAND_ON_BOTH, ++ BANDMAX ++}BAND_TYPE,*PBAND_TYPE; ++ ++typedef enum _PHY_Rate_Tx_Power_Offset_Area{ ++ RA_OFFSET_LEGACY_OFDM1, ++ RA_OFFSET_LEGACY_OFDM2, ++ RA_OFFSET_HT_OFDM1, ++ RA_OFFSET_HT_OFDM2, ++ RA_OFFSET_HT_OFDM3, ++ RA_OFFSET_HT_OFDM4, ++ RA_OFFSET_HT_CCK, ++}RA_OFFSET_AREA,*PRA_OFFSET_AREA; ++ ++ ++/* BB/RF related */ ++typedef enum _RF_TYPE_8190P{ ++ RF_TYPE_MIN, // 0 ++ RF_8225=1, // 1 11b/g RF for verification only ++ RF_8256=2, // 2 11b/g/n ++ RF_8258=3, // 3 11a/b/g/n RF ++ RF_6052=4, // 4 11b/g/n RF ++ //RF_6052=5, // 4 11b/g/n RF ++ // TODO: We sholud remove this psudo PHY RF after we get new RF. ++ RF_PSEUDO_11N=5, // 5, It is a temporality RF. ++}RF_TYPE_8190P_E,*PRF_TYPE_8190P_E; ++ ++ ++typedef enum _RATR_TABLE_MODE_8192C{ ++ RATR_INX_WIRELESS_NGB = 0, ++ RATR_INX_WIRELESS_NG = 1, ++ RATR_INX_WIRELESS_NB = 2, ++ RATR_INX_WIRELESS_N = 3, ++ RATR_INX_WIRELESS_GB = 4, ++ RATR_INX_WIRELESS_G = 5, ++ RATR_INX_WIRELESS_B = 6, ++ RATR_INX_WIRELESS_MC = 7, ++ RATR_INX_WIRELESS_A = 8, ++}RATR_TABLE_MODE_8192C, *PRATR_TABLE_MODE_8192C; ++ ++typedef struct _BB_REGISTER_DEFINITION{ ++ u32 rfintfs; // set software control: ++ // 0x870~0x877[8 bytes] ++ ++ u32 rfintfi; // readback data: ++ // 0x8e0~0x8e7[8 bytes] ++ ++ u32 rfintfo; // output data: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rfintfe; // output enable: ++ // 0x860~0x86f [16 bytes] ++ ++ u32 rf3wireOffset; // LSSI data: ++ // 0x840~0x84f [16 bytes] ++ ++ u32 rfLSSI_Select; // BB Band Select: ++ // 0x878~0x87f [8 bytes] ++ ++ u32 rfTxGainStage; // Tx gain stage: ++ // 0x80c~0x80f [4 bytes] ++ ++ u32 rfHSSIPara1; // wire parameter control1 : ++ // 0x820~0x823,0x828~0x82b, 0x830~0x833, 0x838~0x83b [16 bytes] ++ ++ u32 rfHSSIPara2; // wire parameter control2 : ++ // 0x824~0x827,0x82c~0x82f, 0x834~0x837, 0x83c~0x83f [16 bytes] ++ ++ u32 rfSwitchControl; //Tx Rx antenna control : ++ // 0x858~0x85f [16 bytes] ++ ++ u32 rfAGCControl1; //AGC parameter control1 : ++ // 0xc50~0xc53,0xc58~0xc5b, 0xc60~0xc63, 0xc68~0xc6b [16 bytes] ++ ++ u32 rfAGCControl2; //AGC parameter control2 : ++ // 0xc54~0xc57,0xc5c~0xc5f, 0xc64~0xc67, 0xc6c~0xc6f [16 bytes] ++ ++ u32 rfRxIQImbalance; //OFDM Rx IQ imbalance matrix : ++ // 0xc14~0xc17,0xc1c~0xc1f, 0xc24~0xc27, 0xc2c~0xc2f [16 bytes] ++ ++ u32 rfRxAFE; //Rx IQ DC ofset and Rx digital filter, Rx DC notch filter : ++ // 0xc10~0xc13,0xc18~0xc1b, 0xc20~0xc23, 0xc28~0xc2b [16 bytes] ++ ++ u32 rfTxIQImbalance; //OFDM Tx IQ imbalance matrix ++ // 0xc80~0xc83,0xc88~0xc8b, 0xc90~0xc93, 0xc98~0xc9b [16 bytes] ++ ++ u32 rfTxAFE; //Tx IQ DC Offset and Tx DFIR type ++ // 0xc84~0xc87,0xc8c~0xc8f, 0xc94~0xc97, 0xc9c~0xc9f [16 bytes] ++ ++ u32 rfLSSIReadBack; //LSSI RF readback data SI mode ++ // 0x8a0~0x8af [16 bytes] ++ ++ u32 rfLSSIReadBackPi; //LSSI RF readback data PI mode 0x8b8-8bc for Path A and B ++ ++}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T; ++ ++#ifdef CONFIG_MP_INCLUDED ++typedef enum _ANTENNA_PATH{ ++ ANTENNA_NONE = 0x00, ++ ANTENNA_D , ++ ANTENNA_C , ++ ANTENNA_CD , ++ ANTENNA_B , ++ ANTENNA_BD , ++ ANTENNA_BC , ++ ANTENNA_BCD , ++ ANTENNA_A , ++ ANTENNA_AD , ++ ANTENNA_AC , ++ ANTENNA_ACD , ++ ANTENNA_AB , ++ ANTENNA_ABD , ++ ANTENNA_ABC , ++ ANTENNA_ABCD ++} ANTENNA_PATH; ++#endif ++ ++typedef struct _R_ANTENNA_SELECT_OFDM{ ++ u32 r_tx_antenna:4; ++ u32 r_ant_l:4; ++ u32 r_ant_non_ht:4; ++ u32 r_ant_ht1:4; ++ u32 r_ant_ht2:4; ++ u32 r_ant_ht_s1:4; ++ u32 r_ant_non_ht_s1:4; ++ u32 OFDM_TXSC:2; ++ u32 Reserved:2; ++}R_ANTENNA_SELECT_OFDM; ++ ++typedef struct _R_ANTENNA_SELECT_CCK{ ++ u8 r_cckrx_enable_2:2; ++ u8 r_cckrx_enable:2; ++ u8 r_ccktx_enable:4; ++}R_ANTENNA_SELECT_CCK; ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++//Added for TX Power ++//u8 GetRightChnlPlace(u8 chnl); ++u8 rtl8192d_GetRightChnlPlaceforIQK(u8 chnl); ++u8 rtl8192d_getChnlGroupfromArray(u8 chnl); ++/*--------------------------Exported Function prototype---------------------*/ ++// ++// BB and RF register read/write ++// ++void rtl8192d_PHY_SetBBReg1Byte( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192d_PHY_QueryBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192d_PHY_SetBBReg( IN PADAPTER Adapter, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++u32 rtl8192d_PHY_QueryRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask ); ++void rtl8192d_PHY_SetRFReg( IN PADAPTER Adapter, ++ IN RF_RADIO_PATH_E eRFPath, ++ IN u32 RegAddr, ++ IN u32 BitMask, ++ IN u32 Data ); ++ ++// ++// Initialization related function ++// ++/* MAC/BB/RF HAL config */ ++extern int PHY_MACConfig8192D( IN PADAPTER Adapter ); ++extern int PHY_BBConfig8192D( IN PADAPTER Adapter ); ++extern int PHY_RFConfig8192D( IN PADAPTER Adapter ); ++/* RF config */ ++int rtl8192d_PHY_ConfigRFWithParaFile( IN PADAPTER Adapter, ++ IN u8* pFileName, ++ IN RF_RADIO_PATH_E eRFPath); ++int rtl8192d_PHY_ConfigRFWithHeaderFile( IN PADAPTER Adapter, ++ IN RF_CONTENT Content, ++ IN RF_RADIO_PATH_E eRFPath); ++/* BB/RF readback check for making sure init OK */ ++int rtl8192d_PHY_CheckBBAndRFOK( IN PADAPTER Adapter, ++ IN HW90_BLOCK_E CheckBlock, ++ IN RF_RADIO_PATH_E eRFPath ); ++/* Read initi reg value for tx power setting. */ ++void rtl8192d_PHY_GetHWRegOriginalValue( IN PADAPTER Adapter ); ++ ++// ++// RF Power setting ++// ++//extern BOOLEAN PHY_SetRFPowerState(IN PADAPTER Adapter, ++// IN RT_RF_POWER_STATE eRFPowerState); ++ ++// ++// BB TX Power R/W ++// ++void PHY_GetTxPowerLevel8192D( IN PADAPTER Adapter, ++ OUT u32* powerlevel ); ++void PHY_SetTxPowerLevel8192D( IN PADAPTER Adapter, ++ IN u8 channel ); ++BOOLEAN PHY_UpdateTxPowerDbm8192D( IN PADAPTER Adapter, ++ IN int powerInDbm ); ++ ++// ++VOID ++PHY_ScanOperationBackup8192D(IN PADAPTER Adapter, ++ IN u8 Operation ); ++ ++// ++// Switch bandwidth for 8192S ++// ++//void PHY_SetBWModeCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SetBWMode8192D( IN PADAPTER pAdapter, ++ IN HT_CHANNEL_WIDTH ChnlWidth, ++ IN unsigned char Offset ); ++ ++// ++// Set FW CMD IO for 8192S. ++// ++//extern BOOLEAN HalSetIO8192C( IN PADAPTER Adapter, ++// IN IO_TYPE IOType); ++ ++// ++// Set A2 entry to fw for 8192S ++// ++extern void FillA2Entry8192C( IN PADAPTER Adapter, ++ IN u8 index, ++ IN u8* val); ++ ++ ++// ++// channel switch related funciton ++// ++//extern void PHY_SwChnlCallback8192C( IN PRT_TIMER pTimer ); ++void PHY_SwChnl8192D( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ // Call after initialization ++void PHY_SwChnlPhy8192D( IN PADAPTER pAdapter, ++ IN u8 channel ); ++ ++extern void ChkFwCmdIoDone( IN PADAPTER Adapter); ++ ++#ifdef USE_WORKITEM ++//extern void SetIOWorkItemCallback( IN PVOID pContext ); ++#else ++//extern void SetIOTimerCallback( IN PRT_TIMER pTimer); ++#endif ++ ++// ++// BB/MAC/RF other monitor API ++// ++void PHY_SetMonitorMode8192D(IN PADAPTER pAdapter, ++ IN BOOLEAN bEnableMonitorMode ); ++ ++BOOLEAN PHY_CheckIsLegalRfPath8192D(IN PADAPTER pAdapter, ++ IN u32 eRFPath ); ++ ++// ++// IQ calibrate ++// ++void rtl8192d_PHY_IQCalibrate( IN PADAPTER pAdapter); ++ ++ ++// ++// LC calibrate ++// ++void rtl8192d_PHY_LCCalibrate(IN PADAPTER pAdapter); ++ ++// ++// AP calibrate ++// ++void rtl8192d_PHY_APCalibrate(IN PADAPTER pAdapter, IN char delta); ++ ++ ++// ++// Modify the value of the hw register when beacon interval be changed. ++// ++void ++rtl8192d_PHY_SetBeaconHwReg( IN PADAPTER Adapter, ++ IN u16 BeaconInterval ); ++ ++ ++extern VOID ++PHY_SwitchEphyParameter( ++ IN PADAPTER Adapter ++ ); ++ ++extern VOID ++PHY_EnableHostClkReq( ++ IN PADAPTER Adapter ++ ); ++ ++BOOLEAN ++SetAntennaConfig92C( ++ IN PADAPTER Adapter, ++ IN u8 DefaultAnt ++ ); ++ ++VOID ++PHY_StopTRXBeforeChangeBand8192D( ++ PADAPTER Adapter ++); ++ ++VOID ++PHY_UpdateBBRFConfiguration8192D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bisBandSwitch ++); ++ ++VOID PHY_ReadMacPhyMode92D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN AutoloadFail ++); ++ ++VOID PHY_ConfigMacPhyMode92D( ++ IN PADAPTER Adapter ++); ++ ++VOID PHY_ConfigMacPhyModeInfo92D( ++ IN PADAPTER Adapter ++); ++ ++VOID PHY_ConfigMacCoexist_RFPage92D( ++ IN PADAPTER Adapter ++); ++ ++VOID ++rtl8192d_PHY_InitRxSetting( ++ IN PADAPTER Adapter ++); ++ ++VOID ++rtl8192d_PHY_ResetIQKResult( ++ IN PADAPTER Adapter ++); ++ ++ ++VOID ++rtl8192d_PHY_SetRFPathSwitch(IN PADAPTER pAdapter, IN BOOLEAN bMain); ++ ++VOID ++HalChangeCCKStatus8192D( ++ IN PADAPTER Adapter, ++ IN BOOLEAN bCCKDisable ++); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++#define PHY_SetBBReg1Byte(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg1Byte((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryBBReg(Adapter, RegAddr, BitMask) rtl8192d_PHY_QueryBBReg((Adapter), (RegAddr), (BitMask)) ++#define PHY_SetBBReg(Adapter, RegAddr, BitMask, Data) rtl8192d_PHY_SetBBReg((Adapter), (RegAddr), (BitMask), (Data)) ++#define PHY_QueryRFReg(Adapter, eRFPath, RegAddr, BitMask) rtl8192d_PHY_QueryRFReg((Adapter), (eRFPath), (RegAddr), (BitMask)) ++#define PHY_SetRFReg(Adapter, eRFPath, RegAddr, BitMask, Data) rtl8192d_PHY_SetRFReg((Adapter), (eRFPath), (RegAddr), (BitMask), (Data)) ++ ++#define PHY_SetMacReg PHY_SetBBReg ++ ++#endif // __INC_HAL8192SPHYCFG_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DPhyReg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1171 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __INC_HAL8192DPHYREG_H ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __INC_HAL8192DPHYREG_H ++#define __INC_HAL8192DPHYREG_H ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++ ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 ++#define rFPGA0_AdDaClockEn 0x888 // enable ad/da clock1 for dual-phy ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define TransceiverA_HSPI_Readback 0x8b8 // Transceiver A HSPI Readback ++#define TransceiverB_HSPI_Readback 0x8bc // Transceiver B HSPI Readback ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// PageB(0xB00) ++// ++#define rPdp_AntA 0xb00 ++#define rPdp_AntA_4 0xb04 ++#define rPdp_AntA_8 0xb08 ++#define rPdp_AntA_C 0xb0c ++#define rPdp_AntA_10 0xb10 ++#define rPdp_AntA_14 0xb14 ++#define rPdp_AntA_18 0xb18 ++#define rPdp_AntA_1C 0xb1c ++#define rPdp_AntA_20 0xb20 ++#define rPdp_AntA_24 0xb24 ++ ++#define rConfig_Pmpd_AntA 0xb28 ++#define rConfig_ram64x16 0xb2c ++ ++#define rBndA 0xb30 ++#define rHssiPar 0xb34 ++ ++#define rConfig_AntA 0xb68 ++#define rConfig_AntB 0xb6c ++ ++#define rPdp_AntB 0xb70 ++#define rPdp_AntB_4 0xb74 ++#define rPdp_AntB_8 0xb78 ++#define rPdp_AntB_C 0xb7c ++#define rPdp_AntB_10 0xb80 ++#define rPdp_AntB_14 0xb84 ++#define rPdp_AntB_18 0xb88 ++#define rPdp_AntB_1C 0xb8c ++#define rPdp_AntB_20 0xb90 ++#define rPdp_AntB_24 0xb94 ++ ++#define rConfig_Pmpd_AntB 0xb98 ++ ++#define rBndB 0xba0 ++ ++#define rAPK 0xbd8 ++#define rPm_Rx0_AntA 0xbdc ++#define rPm_Rx1_AntA 0xbe0 ++#define rPm_Rx2_AntA 0xbe4 ++#define rPm_Rx3_AntA 0xbe8 ++#define rPm_Rx0_AntB 0xbec ++#define rPm_Rx1_AntB 0xbf0 ++#define rPm_Rx2_AntB 0xbf4 ++#define rPm_Rx3_AntB 0xbf8 ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++ ++#define rOFDM0_RxIQExtAnta 0xca0 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_A_Rate18_06 0xe00 ++#define rTxAGC_A_Rate54_24 0xe04 ++#define rTxAGC_A_CCK1_Mcs32 0xe08 ++#define rTxAGC_A_Mcs03_Mcs00 0xe10 ++#define rTxAGC_A_Mcs07_Mcs04 0xe14 ++#define rTxAGC_A_Mcs11_Mcs08 0xe18 ++#define rTxAGC_A_Mcs15_Mcs12 0xe1c ++ ++#define rTxAGC_B_Rate18_06 0x830 ++#define rTxAGC_B_Rate54_24 0x834 ++#define rTxAGC_B_CCK1_55_Mcs32 0x838 ++#define rTxAGC_B_Mcs03_Mcs00 0x83c ++#define rTxAGC_B_Mcs07_Mcs04 0x848 ++#define rTxAGC_B_Mcs11_Mcs08 0x84c ++#define rTxAGC_B_Mcs15_Mcs12 0x868 ++#define rTxAGC_B_CCK11_A_CCK2_11 0x86c ++ ++#define rFPGA0_IQK 0xe28 ++#define rTx_IQK_Tone_A 0xe30 ++#define rRx_IQK_Tone_A 0xe34 ++#define rTx_IQK_PI_A 0xe38 ++#define rRx_IQK_PI_A 0xe3c ++ ++#define rTx_IQK 0xe40 ++#define rRx_IQK 0xe44 ++#define rIQK_AGC_Pts 0xe48 ++#define rIQK_AGC_Rsp 0xe4c ++#define rTx_IQK_Tone_B 0xe50 ++#define rRx_IQK_Tone_B 0xe54 ++#define rTx_IQK_PI_B 0xe58 ++#define rRx_IQK_PI_B 0xe5c ++#define rIQK_AGC_Cont 0xe60 ++ ++#define rBlue_Tooth 0xe6c ++#define rRx_Wait_CCA 0xe70 ++#define rTx_CCK_RFON 0xe74 ++#define rTx_CCK_BBON 0xe78 ++#define rTx_OFDM_RFON 0xe7c ++#define rTx_OFDM_BBON 0xe80 ++#define rTx_To_Rx 0xe84 ++#define rTx_To_Tx 0xe88 ++#define rRx_CCK 0xe8c ++ ++#define rTx_Power_Before_IQK_A 0xe94 ++#define rTx_Power_After_IQK_A 0xe9c ++ ++#define rRx_Power_Before_IQK_A 0xea0 ++#define rRx_Power_Before_IQK_A_2 0xea4 ++#define rRx_Power_After_IQK_A 0xea8 ++#define rRx_Power_After_IQK_A_2 0xeac ++ ++#define rTx_Power_Before_IQK_B 0xeb4 ++#define rTx_Power_After_IQK_B 0xebc ++ ++#define rRx_Power_Before_IQK_B 0xec0 ++#define rRx_Power_Before_IQK_B_2 0xec4 ++#define rRx_Power_After_IQK_B 0xec8 ++#define rRx_Power_After_IQK_B_2 0xecc ++ ++#define rRx_OFDM 0xed0 ++#define rRx_Wait_RIFS 0xed4 ++#define rRx_TO_Rx 0xed8 ++#define rStandby 0xedc ++#define rSleep 0xee0 ++#define rPMPD_ANAEN 0xeec ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++#define rZebra1_Channel 0x7 // RF channel switch ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_BS_PA_APSET_G1_G4 0x03 ++#define RF_BS_PA_APSET_G5_G8 0x04 ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_IPA_G 0x09 // ++#define RF_TXBIAS_G 0x0A ++#define RF_TXPA_AG 0x0B ++#define RF_IPA_A 0x0C // ++#define RF_TXBIAS_A 0x0D ++#define RF_BS_PA_APSET_G9_G11 0x0E ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x42 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++#define RF_LOBF_9 0x38 ++#define RF_RXRF_A3 0x3C // ++#define RF_TRSW 0x3F ++ ++#define RF_TXRF_A2 0x41 ++#define RF_TXPA_G4 0x46 ++#define RF_TXPA_A4 0x4B ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bAntennaSelect 0x0300 ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++ ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++ ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++ ++#define bLSSIReadBackData 0xfffff // T65 RF ++ ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMask12Bits 0xfff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++//#define bRFRegOffsetMask 0xfff ++ ++//MAC0 will wirte PHY1 ++#define MAC0_ACCESS_PHY1 0x4000 ++//MAC1 will wirte PHY0 ++#define MAC1_ACCESS_PHY0 0x2000 ++ ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#define PathA 0x0 // Useless ++#define PathB 0x1 ++#define PathC 0x2 ++#define PathD 0x3 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,66 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DU_FW_IMG_H ++#define __INC_HAL8192DU_FW_IMG_H ++ ++#include ++ ++/*Created on 2011/11/11, 8: 8*/ ++ ++#define Rtl8192DUImgArrayLength 32142 ++extern const u8 Rtl8192DUFwImgArray[Rtl8192DUImgArrayLength]; ++#define Rtl8192DUMainArrayLength 1 ++extern const u8 Rtl8192DUFwMainArray[Rtl8192DUMainArrayLength]; ++#define Rtl8192DUDataArrayLength 1 ++extern const u8 Rtl8192DUFwDataArray[Rtl8192DUDataArrayLength]; ++#define Rtl8192DUPHY_REG_2TArrayLength 372 ++extern const u32 Rtl8192DUPHY_REG_2TArray[Rtl8192DUPHY_REG_2TArrayLength]; ++#define Rtl8192DUPHY_REG_1TArrayLength 1 ++extern const u32 Rtl8192DUPHY_REG_1TArray[Rtl8192DUPHY_REG_1TArrayLength]; ++#define Rtl8192DUPHY_REG_Array_PGLength 624 ++extern const u32 Rtl8192DUPHY_REG_Array_PG[Rtl8192DUPHY_REG_Array_PGLength]; ++#define Rtl8192DUPHY_REG_Array_MPLength 12 ++extern const u32 Rtl8192DUPHY_REG_Array_MP[Rtl8192DUPHY_REG_Array_MPLength]; ++#define Rtl8192DURadioA_2TArrayLength 378 ++extern const u32 Rtl8192DURadioA_2TArray[Rtl8192DURadioA_2TArrayLength]; ++#define Rtl8192DURadioB_2TArrayLength 384 ++extern const u32 Rtl8192DURadioB_2TArray[Rtl8192DURadioB_2TArrayLength]; ++#define Rtl8192DURadioA_1TArrayLength 1 ++extern const u32 Rtl8192DURadioA_1TArray[Rtl8192DURadioA_1TArrayLength]; ++#define Rtl8192DURadioB_1TArrayLength 1 ++extern const u32 Rtl8192DURadioB_1TArray[Rtl8192DURadioB_1TArrayLength]; ++#define Rtl8192DURadioA_2T_intPAArrayLength 378 ++extern const u32 Rtl8192DURadioA_2T_intPAArray[Rtl8192DURadioA_2T_intPAArrayLength]; ++#define Rtl8192DURadioB_2T_intPAArrayLength 384 ++extern const u32 Rtl8192DURadioB_2T_intPAArray[Rtl8192DURadioB_2T_intPAArrayLength]; ++#define Rtl8192DUMAC_2T_ArrayLength 192 ++extern const u32 Rtl8192DUMAC_2T_Array[Rtl8192DUMAC_2T_ArrayLength]; ++#define Rtl8192DUAGCTAB_ArrayLength 386 ++extern const u32 Rtl8192DUAGCTAB_Array[Rtl8192DUAGCTAB_ArrayLength]; ++#define Rtl8192DUAGCTAB_5GArrayLength 194 ++extern const u32 Rtl8192DUAGCTAB_5GArray[Rtl8192DUAGCTAB_5GArrayLength]; ++#define Rtl8192DUAGCTAB_2GArrayLength 194 ++extern const u32 Rtl8192DUAGCTAB_2GArray[Rtl8192DUAGCTAB_2GArrayLength]; ++#define Rtl8192DUAGCTAB_2TArrayLength 1 ++extern const u32 Rtl8192DUAGCTAB_2TArray[Rtl8192DUAGCTAB_2TArrayLength]; ++#define Rtl8192DUAGCTAB_1TArrayLength 1 ++extern const u32 Rtl8192DUAGCTAB_1TArray[Rtl8192DUAGCTAB_1TArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUHWImg_wowlan.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,30 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DU_FW_IMG_WOWLAN_H ++#define __INC_HAL8192DU_FW_IMG_WOWLAN_H ++ ++/*Created on 2011/11/ 8, 14:15*/ ++ ++ ++#define DUWWImgArrayLength 16656 ++extern u8 Rtl8192DUFwWWImgArray[DUWWImgArrayLength]; ++ ++#endif //__INC_HAL8192DU_FW_IMG_WOWLAN_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/Hal8192DUTestHWImg.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,54 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __INC_HAL8192DUTEST_FW_IMG_H ++#define __INC_HAL8192DUTEST_FW_IMG_H ++ ++#include ++ ++/*Created on 2010/ 5/27, 9:49*/ ++ ++#define Rtl8192DTestImgArrayLength 15054 ++extern u8 Rtl8192DTestFwImgArray[Rtl8192DTestImgArrayLength]; ++#define Rtl8192DTestMainArrayLength 1 ++extern u8 Rtl8192DTestFwMainArray[Rtl8192DTestMainArrayLength]; ++#define Rtl8192DTestDataArrayLength 1 ++extern u8 Rtl8192DTestFwDataArray[Rtl8192DTestDataArrayLength]; ++#define Rtl8192DTestPHY_REG_2TArrayLength 376 ++extern u32 Rtl8192DTestPHY_REG_2TArray[Rtl8192DTestPHY_REG_2TArrayLength]; ++#define Rtl8192DTestPHY_REG_1TArrayLength 1 ++extern u32 Rtl8192DTestPHY_REG_1TArray[Rtl8192DTestPHY_REG_1TArrayLength]; ++#define Rtl8192DTestPHY_REG_Array_PGLength 1 ++extern u32 Rtl8192DTestPHY_REG_Array_PG[Rtl8192DTestPHY_REG_Array_PGLength]; ++#define Rtl8192DTestRadioA_2TArrayLength 340 ++extern u32 Rtl8192DTestRadioA_2TArray[Rtl8192DTestRadioA_2TArrayLength]; ++#define Rtl8192DTestRadioB_2TArrayLength 340 ++extern u32 Rtl8192DTestRadioB_2TArray[Rtl8192DTestRadioB_2TArrayLength]; ++#define Rtl8192DTestRadioA_1TArrayLength 1 ++extern u32 Rtl8192DTestRadioA_1TArray[Rtl8192DTestRadioA_1TArrayLength]; ++#define Rtl8192DTestRadioB_1TArrayLength 1 ++extern u32 Rtl8192DTestRadioB_1TArray[Rtl8192DTestRadioB_1TArrayLength]; ++#define Rtl8192DTestMAC_2TArrayLength 174 ++extern u32 Rtl8192DTestMAC_2TArray[Rtl8192DTestMAC_2TArrayLength]; ++#define Rtl8192DTestAGCTAB_5GArrayLength 514 ++extern u32 Rtl8192DTestAGCTAB_5GArray[Rtl8192DTestAGCTAB_5GArrayLength]; ++#define Rtl8192DTestAGCTAB_2GArrayLength 514 ++extern u32 Rtl8192DTestAGCTAB_2GArray[Rtl8192DTestAGCTAB_2GArrayLength]; ++ ++#endif //__INC_HAL8192CU_FW_IMG_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/autoconf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/autoconf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,288 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++/* ++ * Public General Config ++ */ ++#define AUTOCONF_INCLUDED ++#define RTL871X_MODULE_NAME "92CU" ++#define DRV_NAME "rtl8192cu" ++ ++#define CONFIG_USB_HCI 1 ++ ++#define CONFIG_RTL8192C 1 ++ ++#define PLATFORM_LINUX 1 ++ ++ ++//#define CONFIG_IOCTL_CFG80211 1 ++#ifdef CONFIG_IOCTL_CFG80211 ++ #define CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER ++ //#define CONFIG_DEBUG_CFG80211 1 ++#endif ++ ++/* ++ * Internal General Config ++ */ ++//#define CONFIG_PWRCTRL ++//#define CONFIG_H2CLBK ++ ++#define CONFIG_EMBEDDED_FWIMG 1 ++//#define CONFIG_FILE_FWIMG ++ ++#ifdef CONFIG_WAKE_ON_WLAN ++#define CONFIG_WOWLAN 1 ++#endif //CONFIG_WAKE_ON_WLAN ++ ++#define CONFIG_R871X_TEST 1 ++ ++#define CONFIG_80211N_HT 1 ++ ++#define CONFIG_RECV_REORDERING_CTRL 1 ++ ++//#define CONFIG_TCP_CSUM_OFFLOAD_RX 1 ++ ++//#define CONFIG_DRVEXT_MODULE 1 ++ ++#ifndef CONFIG_MP_INCLUDED ++ #define CONFIG_IPS 1 ++ #ifdef CONFIG_IPS ++ //#define CONFIG_IPS_LEVEL_2 1 //enable this to set default IPS mode to IPS_LEVEL_2 ++ #endif ++ #define SUPPORT_HW_RFOFF_DETECTED 1 ++ ++ #define CONFIG_LPS 1 ++ #define CONFIG_BT_COEXIST 1 ++ //befor link ++ #define CONFIG_ANTENNA_DIVERSITY ++ //after link ++ #ifdef CONFIG_ANTENNA_DIVERSITY ++ #define CONFIG_SW_ANTENNA_DIVERSITY ++ //#define CONFIG_HW_ANTENNA_DIVERSITY ++ #endif ++ ++ #define CONFIG_IOL ++#else //#ifndef CONFIG_MP_INCLUDED ++ #define CONFIG_MP_IWPRIV_SUPPORT 1 ++#endif //#ifndef CONFIG_MP_INCLUDED ++ ++#define CONFIG_AP_MODE 1 ++#define CONFIG_NATIVEAP_MLME 1 ++ ++// Added by Albert 20110314 ++#define CONFIG_P2P 1 ++ ++ ++#ifdef CONFIG_P2P ++// Added by Albert 20110812 ++// The CONFIG_WFD is for supporting the Wi-Fi display ++//#define CONFIG_WFD 1 ++ ++// Unmarked if there is low p2p scanned ratio; Kurt ++//#define CONFIG_P2P_AGAINST_NOISE 1 ++#define CONFIG_P2P_REMOVE_GROUP_INFO ++//#define CONFIG_DBG_P2P ++#endif ++ ++// Added by Kurt 20110511 ++//#define CONFIG_TDLS 1 ++#ifdef CONFIG_TDLS ++ #define CONFIG_TDLS_AUTOSETUP 1 ++ #define CONFIG_TDLS_AUTOCHECKALIVE 1 ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ #ifndef CONFIG_NATIVEAP_MLME ++ #define CONFIG_HOSTAPD_MLME 1 ++ #endif ++ #define CONFIG_FIND_BEST_CHANNEL 1 ++#endif ++ ++#define CONFIG_SKB_COPY 1//for amsdu ++ ++#define CONFIG_LED ++#ifdef CONFIG_LED ++ #define CONFIG_SW_LED ++ #ifdef CONFIG_SW_LED ++ //#define CONFIG_LED_HANDLED_BY_CMD_THREAD ++ #endif ++#endif // CONFIG_LED ++ ++ ++ ++#define USB_INTERFERENCE_ISSUE // this should be checked in all usb interface ++#define CONFIG_GLOBAL_UI_PID ++ ++#define CONFIG_LAYER2_ROAMING ++#define CONFIG_LAYER2_ROAMING_RESUME ++//#define CONFIG_ADAPTOR_INFO_CACHING_FILE // now just applied on 8192cu only, should make it general... ++//#define CONFIG_RESUME_IN_WORKQUEUE ++//#define CONFIG_SET_SCAN_DENY_TIMER ++#define CONFIG_LONG_DELAY_ISSUE ++#define CONFIG_NEW_SIGNAL_STAT_PROCESS ++//#define CONFIG_SIGNAL_DISPLAY_DBM //display RX signal with dbm ++ ++#ifdef CONFIG_IOL ++ #define CONFIG_IOL_LLT ++ #define CONFIG_IOL_MAC ++ #define CONFIG_IOL_BB_PHY_REG ++ #define CONFIG_IOL_BB_AGC_TAB ++ #define CONFIG_IOL_RF_RF90_PATH_A ++ #define CONFIG_IOL_RF_RF90_PATH_B ++#endif ++ ++#define CONFIG_BR_EXT 1 // Enable NAT2.5 support for STA mode interface with a L2 Bridge ++#ifdef CONFIG_BR_EXT ++#define CONFIG_BR_EXT_BRNAME "br0" ++#endif // CONFIG_BR_EXT ++ ++#define CONFIG_TX_MCAST2UNI 1 // Support IP multicast->unicast ++//#define CONFIG_CHECK_AC_LIFETIME 1 // Check packet lifetime of 4 ACs. ++ ++ ++/* ++ * Interface Related Config ++ */ ++//#define CONFIG_USB_INTERRUPT_IN_PIPE 1 ++ ++#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #define CONFIG_USB_TX_AGGREGATION 1 ++ #define CONFIG_USB_RX_AGGREGATION 1 ++#endif ++ ++#define CONFIG_PREALLOC_RECV_SKB 1 ++//#define CONFIG_REDUCE_USB_TX_INT 1 // Trade-off: Improve performance, but may cause TX URBs blocked by USB Host/Bus driver on few platforms. ++//#define CONFIG_EASY_REPLACEMENT 1 ++ ++/* ++ * CONFIG_USE_USB_BUFFER_ALLOC_XX uses Linux USB Buffer alloc API and is for Linux platform only now! ++ */ ++//#define CONFIG_USE_USB_BUFFER_ALLOC_TX 1 // Trade-off: For TX path, improve stability on some platforms, but may cause performance degrade on other platforms. ++//#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 // For RX path ++ ++/* ++ * USB VENDOR REQ BUFFER ALLOCATION METHOD ++ * if not set we'll use function local variable (stack memory) ++ */ ++//#define CONFIG_USB_VENDOR_REQ_BUFFER_DYNAMIC_ALLOCATE ++#define CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ ++#define CONFIG_USB_VENDOR_REQ_MUTEX ++#define CONFIG_VENDOR_REQ_RETRY ++ ++//#define CONFIG_USB_SUPPORT_ASYNC_VDN_REQ 1 ++ ++ ++/* ++ * HAL Related Config ++ */ ++ ++#define RTL8192C_RX_PACKET_NO_INCLUDE_CRC 1 ++ ++#define SUPPORTED_BLOCK_IO ++ ++ ++ ++#define RTL8192CU_FW_DOWNLOAD_ENABLE 1 ++ ++#define CONFIG_ONLY_ONE_OUT_EP_TO_LOW 0 ++ ++#define CONFIG_OUT_EP_WIFI_MODE 0 ++ ++#define ENABLE_USB_DROP_INCORRECT_OUT 0 ++ ++#define RTL8192CU_ASIC_VERIFICATION 0 // For ASIC verification. ++ ++#define RTL8192CU_ADHOC_WORKAROUND_SETTING 1 ++ ++#define DISABLE_BB_RF 0 ++ ++#define RTL8191C_FPGA_NETWORKTYPE_ADHOC 0 ++ ++#ifdef CONFIG_MP_INCLUDED ++ #define MP_DRIVER 1 ++ #undef CONFIG_USB_TX_AGGREGATION ++ #undef CONFIG_USB_RX_AGGREGATION ++#else ++ #define MP_DRIVER 0 ++#endif ++ ++ ++/* ++ * Platform Related Config ++ */ ++#ifdef CONFIG_PLATFORM_MN10300 ++#define CONFIG_SPECIAL_SETTING_FOR_FUNAI_TV ++ ++#if defined (CONFIG_SW_ANTENNA_DIVERSITY) ++ #undef CONFIG_SW_ANTENNA_DIVERSITY ++ #define CONFIG_HW_ANTENNA_DIVERSITY ++#endif ++ ++#endif ++ ++#ifdef CONFIG_WISTRON_PLATFORM ++ ++#endif ++ ++#ifdef CONFIG_PLATFORM_TI_DM365 ++#define CONFIG_USE_USB_BUFFER_ALLOC_RX 1 ++#endif ++ ++//#define CONFIG_BEFORE_LINKED_DIG ++//#define CONFIG_ENABLE_NOTCH_FILTER ++ ++ ++/* ++ * Debug Related Config ++ */ ++//#define CONFIG_DEBUG_RTL871X ++ ++#define DBG 0 ++//#define CONFIG_DEBUG_RTL819X ++ ++#define CONFIG_PROC_DEBUG 1 ++ ++//#define DBG_IO ++//#define DBG_DELAY_OS ++//#define DBG_MEM_ALLOC ++//#define DBG_IOCTL ++ ++//#define DBG_TX ++//#define DBG_XMIT_BUF ++//#define DBG_TX_DROP_FRAME ++ ++//#define DBG_RX_DROP_FRAME ++//#define DBG_RX_SEQ ++//#define DBG_RX_SIGNAL_DISPLAY_PROCESSING ++//#define DBG_RX_SIGNAL_DISPLAY_SSID_MONITORED "jeff-ap" ++ ++//#define DBG_EXPIRATION_CHK ++ ++ ++//#define DBG_SHOW_MCUFWDL_BEFORE_51_ENABLE ++//#define DBG_ROAMING_TEST ++ ++//#define DBG_HAL_INIT_PROFILING ++#define DBG_MEMORY_LEAK 1 ++ ++#define DBG_CONFIG_ERROR_DETECT ++//#define DBG_CONFIG_ERROR_RESET ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/basic_types.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/basic_types.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,276 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __BASIC_TYPES_H__ ++#define __BASIC_TYPES_H__ ++ ++#include ++ ++ ++#define SUCCESS 0 ++#define FAIL (-1) ++ ++#ifndef TRUE ++ #define _TRUE 1 ++#else ++ #define _TRUE TRUE ++#endif ++ ++#ifndef FALSE ++ #define _FALSE 0 ++#else ++ #define _FALSE FALSE ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ typedef signed char s8; ++ typedef unsigned char u8; ++ ++ typedef signed short s16; ++ typedef unsigned short u16; ++ ++ typedef signed long s32; ++ typedef unsigned long u32; ++ ++ typedef unsigned int uint; ++ typedef signed int sint; ++ ++ ++ typedef signed long long s64; ++ typedef unsigned long long u64; ++ ++ #ifdef NDIS50_MINIPORT ++ ++ #define NDIS_MAJOR_VERSION 5 ++ #define NDIS_MINOR_VERSION 0 ++ ++ #endif ++ ++ #ifdef NDIS51_MINIPORT ++ ++ #define NDIS_MAJOR_VERSION 5 ++ #define NDIS_MINOR_VERSION 1 ++ ++ #endif ++ ++ typedef NDIS_PROC proc_t; ++ ++ typedef LONG atomic_t; ++ ++#endif ++ ++ ++#ifdef PLATFORM_LINUX ++ ++ #include ++ #define IN ++ #define OUT ++ #define VOID void ++ #define NDIS_OID uint ++ #define NDIS_STATUS uint ++ ++ typedef signed int sint; ++ ++ #ifndef PVOID ++ typedef void * PVOID; ++ //#define PVOID (void *) ++ #endif ++ ++ #define UCHAR u8 ++ #define USHORT u16 ++ #define UINT u32 ++ #define ULONG u32 ++ ++ typedef void (*proc_t)(void*); ++ ++ typedef __kernel_size_t SIZE_T; ++ typedef __kernel_ssize_t SSIZE_T; ++ #define FIELD_OFFSET(s,field) ((SSIZE_T)&((s*)(0))->field) ++ ++#endif ++ ++#define MEM_ALIGNMENT_OFFSET (sizeof (SIZE_T)) ++#define MEM_ALIGNMENT_PADDING (sizeof(SIZE_T) - 1) ++ ++#define SIZE_PTR SIZE_T ++#define SSIZE_PTR SSIZE_T ++ ++//port from fw by thomas ++// TODO: Belows are Sync from SD7-Driver. It is necessary to check correctness ++ ++/* ++ * Call endian free function when ++ * 1. Read/write packet content. ++ * 2. Before write integer to IO. ++ * 3. After read integer from IO. ++*/ ++ ++// ++// Byte Swapping routine. ++// ++#define EF1Byte ++#define EF2Byte le16_to_cpu ++#define EF4Byte le32_to_cpu ++ ++// ++// Read LE format data from memory ++// ++#define ReadEF1Byte(_ptr) EF1Byte(*((u8 *)(_ptr))) ++#define ReadEF2Byte(_ptr) EF2Byte(*((u16 *)(_ptr))) ++#define ReadEF4Byte(_ptr) EF4Byte(*((u32 *)(_ptr))) ++ ++// ++// Write LE data to memory ++// ++#define WriteEF1Byte(_ptr, _val) (*((u8 *)(_ptr)))=EF1Byte(_val) ++#define WriteEF2Byte(_ptr, _val) (*((u16 *)(_ptr)))=EF2Byte(_val) ++#define WriteEF4Byte(_ptr, _val) (*((u32 *)(_ptr)))=EF4Byte(_val) ++ ++// ++// Example: ++// BIT_LEN_MASK_32(0) => 0x00000000 ++// BIT_LEN_MASK_32(1) => 0x00000001 ++// BIT_LEN_MASK_32(2) => 0x00000003 ++// BIT_LEN_MASK_32(32) => 0xFFFFFFFF ++// ++#define BIT_LEN_MASK_32(__BitLen) \ ++ (0xFFFFFFFF >> (32 - (__BitLen))) ++// ++// Example: ++// BIT_OFFSET_LEN_MASK_32(0, 2) => 0x00000003 ++// BIT_OFFSET_LEN_MASK_32(16, 2) => 0x00030000 ++// ++#define BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_32(__BitLen) << (__BitOffset)) ++ ++// ++// Description: ++// Return 4-byte value in host byte ordering from ++// 4-byte pointer in litten-endian system. ++// ++#define LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ ++ (EF4Byte(*((u32 *)(__pStart)))) ++ ++// ++// Description: ++// Translate subfield (continuous bits in little-endian) of 4-byte value in litten byte to ++// 4-byte value in host byte ordering. ++// ++#define LE_BITS_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P4BYTE_TO_HOST_4BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_32(__BitLen) \ ++ ) ++ ++// ++// Description: ++// Mask subfield (continuous bits in little-endian) of 4-byte value in litten byte oredering ++// and return the result in 4-byte value in host byte ordering. ++// ++#define LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P4BYTE_TO_HOST_4BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_32(__BitOffset, __BitLen) ) \ ++ ) ++ ++// ++// Description: ++// Set subfield of little-endian 4-byte value to specified value. ++// ++#define SET_BITS_TO_LE_4BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u32 *)(__pStart)) = \ ++ EF4Byte( \ ++ LE_BITS_CLEARED_TO_4BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u32)__Value) & BIT_LEN_MASK_32(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++ ++#define BIT_LEN_MASK_16(__BitLen) \ ++ (0xFFFF >> (16 - (__BitLen))) ++ ++#define BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_16(__BitLen) << (__BitOffset)) ++ ++#define LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ ++ (EF2Byte(*((u16 *)(__pStart)))) ++ ++#define LE_BITS_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P2BYTE_TO_HOST_2BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_16(__BitLen) \ ++ ) ++ ++#define LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P2BYTE_TO_HOST_2BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_16(__BitOffset, __BitLen) ) \ ++ ) ++ ++#define SET_BITS_TO_LE_2BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u16 *)(__pStart)) = \ ++ EF2Byte( \ ++ LE_BITS_CLEARED_TO_2BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u16)__Value) & BIT_LEN_MASK_16(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++#define BIT_LEN_MASK_8(__BitLen) \ ++ (0xFF >> (8 - (__BitLen))) ++ ++#define BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) \ ++ (BIT_LEN_MASK_8(__BitLen) << (__BitOffset)) ++ ++#define LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ ++ (EF1Byte(*((u8 *)(__pStart)))) ++ ++#define LE_BITS_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ ( LE_P1BYTE_TO_HOST_1BYTE(__pStart) >> (__BitOffset) ) \ ++ & \ ++ BIT_LEN_MASK_8(__BitLen) \ ++ ) ++ ++#define LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ ( \ ++ LE_P1BYTE_TO_HOST_1BYTE(__pStart) \ ++ & \ ++ ( ~BIT_OFFSET_LEN_MASK_8(__BitOffset, __BitLen) ) \ ++ ) ++ ++#define SET_BITS_TO_LE_1BYTE(__pStart, __BitOffset, __BitLen, __Value) \ ++ *((u8 *)(__pStart)) = \ ++ EF1Byte( \ ++ LE_BITS_CLEARED_TO_1BYTE(__pStart, __BitOffset, __BitLen) \ ++ | \ ++ ( (((u8)__Value) & BIT_LEN_MASK_8(__BitLen)) << (__BitOffset) ) \ ++ ); ++ ++// Get the N-bytes aligment offset from the current length ++#define N_BYTE_ALIGMENT(__Value, __Aligment) ((__Aligment == 1) ? (__Value) : (((__Value + __Aligment - 1) / __Aligment) * __Aligment)) ++ ++typedef unsigned char BOOLEAN,*PBOOLEAN; ++ ++#endif //__BASIC_TYPES_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/big_endian.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/big_endian.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,87 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_BIG_ENDIAN_H ++#define _LINUX_BYTEORDER_BIG_ENDIAN_H ++ ++#ifndef __BIG_ENDIAN ++#define __BIG_ENDIAN 4321 ++#endif ++#ifndef __BIG_ENDIAN_BITFIELD ++#define __BIG_ENDIAN_BITFIELD ++#endif ++ ++#include ++ ++#define __constant_htonl(x) ((__u32)(x)) ++#define __constant_ntohl(x) ((__u32)(x)) ++#define __constant_htons(x) ((__u16)(x)) ++#define __constant_ntohs(x) ((__u16)(x)) ++#define __constant_cpu_to_le64(x) ___constant_swab64((x)) ++#define __constant_le64_to_cpu(x) ___constant_swab64((x)) ++#define __constant_cpu_to_le32(x) ___constant_swab32((x)) ++#define __constant_le32_to_cpu(x) ___constant_swab32((x)) ++#define __constant_cpu_to_le16(x) ___constant_swab16((x)) ++#define __constant_le16_to_cpu(x) ___constant_swab16((x)) ++#define __constant_cpu_to_be64(x) ((__u64)(x)) ++#define __constant_be64_to_cpu(x) ((__u64)(x)) ++#define __constant_cpu_to_be32(x) ((__u32)(x)) ++#define __constant_be32_to_cpu(x) ((__u32)(x)) ++#define __constant_cpu_to_be16(x) ((__u16)(x)) ++#define __constant_be16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_le64(x) __swab64((x)) ++#define __le64_to_cpu(x) __swab64((x)) ++#define __cpu_to_le32(x) __swab32((x)) ++#define __le32_to_cpu(x) __swab32((x)) ++#define __cpu_to_le16(x) __swab16((x)) ++#define __le16_to_cpu(x) __swab16((x)) ++#define __cpu_to_be64(x) ((__u64)(x)) ++#define __be64_to_cpu(x) ((__u64)(x)) ++#define __cpu_to_be32(x) ((__u32)(x)) ++#define __be32_to_cpu(x) ((__u32)(x)) ++#define __cpu_to_be16(x) ((__u16)(x)) ++#define __be16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_le64p(x) __swab64p((x)) ++#define __le64_to_cpup(x) __swab64p((x)) ++#define __cpu_to_le32p(x) __swab32p((x)) ++#define __le32_to_cpup(x) __swab32p((x)) ++#define __cpu_to_le16p(x) __swab16p((x)) ++#define __le16_to_cpup(x) __swab16p((x)) ++#define __cpu_to_be64p(x) (*(__u64*)(x)) ++#define __be64_to_cpup(x) (*(__u64*)(x)) ++#define __cpu_to_be32p(x) (*(__u32*)(x)) ++#define __be32_to_cpup(x) (*(__u32*)(x)) ++#define __cpu_to_be16p(x) (*(__u16*)(x)) ++#define __be16_to_cpup(x) (*(__u16*)(x)) ++#define __cpu_to_le64s(x) __swab64s((x)) ++#define __le64_to_cpus(x) __swab64s((x)) ++#define __cpu_to_le32s(x) __swab32s((x)) ++#define __le32_to_cpus(x) __swab32s((x)) ++#define __cpu_to_le16s(x) __swab16s((x)) ++#define __le16_to_cpus(x) __swab16s((x)) ++#define __cpu_to_be64s(x) do {} while (0) ++#define __be64_to_cpus(x) do {} while (0) ++#define __cpu_to_be32s(x) do {} while (0) ++#define __be32_to_cpus(x) do {} while (0) ++#define __cpu_to_be16s(x) do {} while (0) ++#define __be16_to_cpus(x) do {} while (0) ++ ++#include ++ ++#endif /* _LINUX_BYTEORDER_BIG_ENDIAN_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/generic.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/generic.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,209 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_GENERIC_H ++#define _LINUX_BYTEORDER_GENERIC_H ++ ++/* ++ * linux/byteorder_generic.h ++ * Generic Byte-reordering support ++ * ++ * Francois-Rene Rideau 19970707 ++ * gathered all the good ideas from all asm-foo/byteorder.h into one file, ++ * cleaned them up. ++ * I hope it is compliant with non-GCC compilers. ++ * I decided to put __BYTEORDER_HAS_U64__ in byteorder.h, ++ * because I wasn't sure it would be ok to put it in types.h ++ * Upgraded it to 2.1.43 ++ * Francois-Rene Rideau 19971012 ++ * Upgraded it to 2.1.57 ++ * to please Linus T., replaced huge #ifdef's between little/big endian ++ * by nestedly #include'd files. ++ * Francois-Rene Rideau 19971205 ++ * Made it to 2.1.71; now a facelift: ++ * Put files under include/linux/byteorder/ ++ * Split swab from generic support. ++ * ++ * TODO: ++ * = Regular kernel maintainers could also replace all these manual ++ * byteswap macros that remain, disseminated among drivers, ++ * after some grep or the sources... ++ * = Linus might want to rename all these macros and files to fit his taste, ++ * to fit his personal naming scheme. ++ * = it seems that a few drivers would also appreciate ++ * nybble swapping support... ++ * = every architecture could add their byteswap macro in asm/byteorder.h ++ * see how some architectures already do (i386, alpha, ppc, etc) ++ * = cpu_to_beXX and beXX_to_cpu might some day need to be well ++ * distinguished throughout the kernel. This is not the case currently, ++ * since little endian, big endian, and pdp endian machines needn't it. ++ * But this might be the case for, say, a port of Linux to 20/21 bit ++ * architectures (and F21 Linux addict around?). ++ */ ++ ++/* ++ * The following macros are to be defined by : ++ * ++ * Conversion of long and short int between network and host format ++ * ntohl(__u32 x) ++ * ntohs(__u16 x) ++ * htonl(__u32 x) ++ * htons(__u16 x) ++ * It seems that some programs (which? where? or perhaps a standard? POSIX?) ++ * might like the above to be functions, not macros (why?). ++ * if that's true, then detect them, and take measures. ++ * Anyway, the measure is: define only ___ntohl as a macro instead, ++ * and in a separate file, have ++ * unsigned long inline ntohl(x){return ___ntohl(x);} ++ * ++ * The same for constant arguments ++ * __constant_ntohl(__u32 x) ++ * __constant_ntohs(__u16 x) ++ * __constant_htonl(__u32 x) ++ * __constant_htons(__u16 x) ++ * ++ * Conversion of XX-bit integers (16- 32- or 64-) ++ * between native CPU format and little/big endian format ++ * 64-bit stuff only defined for proper architectures ++ * cpu_to_[bl]eXX(__uXX x) ++ * [bl]eXX_to_cpu(__uXX x) ++ * ++ * The same, but takes a pointer to the value to convert ++ * cpu_to_[bl]eXXp(__uXX x) ++ * [bl]eXX_to_cpup(__uXX x) ++ * ++ * The same, but change in situ ++ * cpu_to_[bl]eXXs(__uXX x) ++ * [bl]eXX_to_cpus(__uXX x) ++ * ++ * See asm-foo/byteorder.h for examples of how to provide ++ * architecture-optimized versions ++ * ++ */ ++ ++ ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) ++/* ++ * inside the kernel, we can use nicknames; ++ * outside of it, we must avoid POSIX namespace pollution... ++ */ ++#define cpu_to_le64 __cpu_to_le64 ++#define le64_to_cpu __le64_to_cpu ++#define cpu_to_le32 __cpu_to_le32 ++#define le32_to_cpu __le32_to_cpu ++#define cpu_to_le16 __cpu_to_le16 ++#define le16_to_cpu __le16_to_cpu ++#define cpu_to_be64 __cpu_to_be64 ++#define be64_to_cpu __be64_to_cpu ++#define cpu_to_be32 __cpu_to_be32 ++#define be32_to_cpu __be32_to_cpu ++#define cpu_to_be16 __cpu_to_be16 ++#define be16_to_cpu __be16_to_cpu ++#define cpu_to_le64p __cpu_to_le64p ++#define le64_to_cpup __le64_to_cpup ++#define cpu_to_le32p __cpu_to_le32p ++#define le32_to_cpup __le32_to_cpup ++#define cpu_to_le16p __cpu_to_le16p ++#define le16_to_cpup __le16_to_cpup ++#define cpu_to_be64p __cpu_to_be64p ++#define be64_to_cpup __be64_to_cpup ++#define cpu_to_be32p __cpu_to_be32p ++#define be32_to_cpup __be32_to_cpup ++#define cpu_to_be16p __cpu_to_be16p ++#define be16_to_cpup __be16_to_cpup ++#define cpu_to_le64s __cpu_to_le64s ++#define le64_to_cpus __le64_to_cpus ++#define cpu_to_le32s __cpu_to_le32s ++#define le32_to_cpus __le32_to_cpus ++#define cpu_to_le16s __cpu_to_le16s ++#define le16_to_cpus __le16_to_cpus ++#define cpu_to_be64s __cpu_to_be64s ++#define be64_to_cpus __be64_to_cpus ++#define cpu_to_be32s __cpu_to_be32s ++#define be32_to_cpus __be32_to_cpus ++#define cpu_to_be16s __cpu_to_be16s ++#define be16_to_cpus __be16_to_cpus ++#endif ++ ++ ++/* ++ * Handle ntohl and suches. These have various compatibility ++ * issues - like we want to give the prototype even though we ++ * also have a macro for them in case some strange program ++ * wants to take the address of the thing or something.. ++ * ++ * Note that these used to return a "long" in libc5, even though ++ * long is often 64-bit these days.. Thus the casts. ++ * ++ * They have to be macros in order to do the constant folding ++ * correctly - if the argument passed into a inline function ++ * it is no longer constant according to gcc.. ++ */ ++ ++#undef ntohl ++#undef ntohs ++#undef htonl ++#undef htons ++ ++/* ++ * Do the prototypes. Somebody might want to take the ++ * address or some such sick thing.. ++ */ ++#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) ++extern __u32 ntohl(__u32); ++extern __u32 htonl(__u32); ++#else ++extern unsigned long int ntohl(unsigned long int); ++extern unsigned long int htonl(unsigned long int); ++#endif ++extern unsigned short int ntohs(unsigned short int); ++extern unsigned short int htons(unsigned short int); ++ ++ ++#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) || defined(PLATFORM_MPIXEL) ++ ++#define ___htonl(x) __cpu_to_be32(x) ++#define ___htons(x) __cpu_to_be16(x) ++#define ___ntohl(x) __be32_to_cpu(x) ++#define ___ntohs(x) __be16_to_cpu(x) ++ ++#if defined(PLATFORM_LINUX) || (defined (__GLIBC__) && __GLIBC__ >= 2) ++#define htonl(x) ___htonl(x) ++#define ntohl(x) ___ntohl(x) ++#else ++#define htonl(x) ((unsigned long)___htonl(x)) ++#define ntohl(x) ((unsigned long)___ntohl(x)) ++#endif ++#define htons(x) ___htons(x) ++#define ntohs(x) ___ntohs(x) ++ ++#endif /* OPTIMIZE */ ++ ++ ++#if defined (PLATFORM_WINDOWS) ++ ++#define htonl(x) __cpu_to_be32(x) ++#define ntohl(x) __be32_to_cpu(x) ++#define htons(x) __cpu_to_be16(x) ++#define ntohs(x) __be16_to_cpu(x) ++ ++ ++#endif ++ ++#endif /* _LINUX_BYTEORDER_GENERIC_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/little_endian.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/little_endian.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,89 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_LITTLE_ENDIAN_H ++#define _LINUX_BYTEORDER_LITTLE_ENDIAN_H ++ ++#ifndef __LITTLE_ENDIAN ++#define __LITTLE_ENDIAN 1234 ++#endif ++#ifndef __LITTLE_ENDIAN_BITFIELD ++#define __LITTLE_ENDIAN_BITFIELD ++#endif ++ ++#include ++ ++#ifndef __constant_htonl ++#define __constant_htonl(x) ___constant_swab32((x)) ++#define __constant_ntohl(x) ___constant_swab32((x)) ++#define __constant_htons(x) ___constant_swab16((x)) ++#define __constant_ntohs(x) ___constant_swab16((x)) ++#define __constant_cpu_to_le64(x) ((__u64)(x)) ++#define __constant_le64_to_cpu(x) ((__u64)(x)) ++#define __constant_cpu_to_le32(x) ((__u32)(x)) ++#define __constant_le32_to_cpu(x) ((__u32)(x)) ++#define __constant_cpu_to_le16(x) ((__u16)(x)) ++#define __constant_le16_to_cpu(x) ((__u16)(x)) ++#define __constant_cpu_to_be64(x) ___constant_swab64((x)) ++#define __constant_be64_to_cpu(x) ___constant_swab64((x)) ++#define __constant_cpu_to_be32(x) ___constant_swab32((x)) ++#define __constant_be32_to_cpu(x) ___constant_swab32((x)) ++#define __constant_cpu_to_be16(x) ___constant_swab16((x)) ++#define __constant_be16_to_cpu(x) ___constant_swab16((x)) ++#define __cpu_to_le64(x) ((__u64)(x)) ++#define __le64_to_cpu(x) ((__u64)(x)) ++#define __cpu_to_le32(x) ((__u32)(x)) ++#define __le32_to_cpu(x) ((__u32)(x)) ++#define __cpu_to_le16(x) ((__u16)(x)) ++#define __le16_to_cpu(x) ((__u16)(x)) ++#define __cpu_to_be64(x) __swab64((x)) ++#define __be64_to_cpu(x) __swab64((x)) ++#define __cpu_to_be32(x) __swab32((x)) ++#define __be32_to_cpu(x) __swab32((x)) ++#define __cpu_to_be16(x) __swab16((x)) ++#define __be16_to_cpu(x) __swab16((x)) ++#define __cpu_to_le64p(x) (*(__u64*)(x)) ++#define __le64_to_cpup(x) (*(__u64*)(x)) ++#define __cpu_to_le32p(x) (*(__u32*)(x)) ++#define __le32_to_cpup(x) (*(__u32*)(x)) ++#define __cpu_to_le16p(x) (*(__u16*)(x)) ++#define __le16_to_cpup(x) (*(__u16*)(x)) ++#define __cpu_to_be64p(x) __swab64p((x)) ++#define __be64_to_cpup(x) __swab64p((x)) ++#define __cpu_to_be32p(x) __swab32p((x)) ++#define __be32_to_cpup(x) __swab32p((x)) ++#define __cpu_to_be16p(x) __swab16p((x)) ++#define __be16_to_cpup(x) __swab16p((x)) ++#define __cpu_to_le64s(x) do {} while (0) ++#define __le64_to_cpus(x) do {} while (0) ++#define __cpu_to_le32s(x) do {} while (0) ++#define __le32_to_cpus(x) do {} while (0) ++#define __cpu_to_le16s(x) do {} while (0) ++#define __le16_to_cpus(x) do {} while (0) ++#define __cpu_to_be64s(x) __swab64s((x)) ++#define __be64_to_cpus(x) __swab64s((x)) ++#define __cpu_to_be32s(x) __swab32s((x)) ++#define __be32_to_cpus(x) __swab32s((x)) ++#define __cpu_to_be16s(x) __swab16s((x)) ++#define __be16_to_cpus(x) __swab16s((x)) ++#endif // __constant_htonl ++ ++#include ++ ++#endif /* _LINUX_BYTEORDER_LITTLE_ENDIAN_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/swab.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/swab.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,133 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_SWAB_H ++#define _LINUX_BYTEORDER_SWAB_H ++ ++#if !defined(CONFIG_PLATFORM_MSTAR_TITANIA12) ++#ifndef __u16 ++typedef unsigned short __u16; ++#endif ++ ++#ifndef __u32 ++typedef unsigned int __u32; ++#endif ++ ++#ifndef __u8 ++typedef unsigned char __u8; ++#endif ++ ++#ifndef __u64 ++typedef unsigned long long __u64; ++#endif ++ ++ ++__inline static __u16 ___swab16(__u16 x) ++{ ++ __u16 __x = x; ++ return ++ ((__u16)( ++ (((__u16)(__x) & (__u16)0x00ffU) << 8) | ++ (((__u16)(__x) & (__u16)0xff00U) >> 8) )); ++ ++} ++ ++__inline static __u32 ___swab32(__u32 x) ++{ ++ __u32 __x = (x); ++ return ((__u32)( ++ (((__u32)(__x) & (__u32)0x000000ffUL) << 24) | ++ (((__u32)(__x) & (__u32)0x0000ff00UL) << 8) | ++ (((__u32)(__x) & (__u32)0x00ff0000UL) >> 8) | ++ (((__u32)(__x) & (__u32)0xff000000UL) >> 24) )); ++} ++ ++__inline static __u64 ___swab64(__u64 x) ++{ ++ __u64 __x = (x); ++ ++ return ++ ((__u64)( \ ++ (__u64)(((__u64)(__x) & (__u64)0x00000000000000ffULL) << 56) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x000000000000ff00ULL) << 40) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x0000000000ff0000ULL) << 24) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x00000000ff000000ULL) << 8) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x000000ff00000000ULL) >> 8) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ ++ (__u64)(((__u64)(__x) & (__u64)0x00ff000000000000ULL) >> 40) | \ ++ (__u64)(((__u64)(__x) & (__u64)0xff00000000000000ULL) >> 56) )); \ ++} ++#endif // CONFIG_PLATFORM_MSTAR_TITANIA12 ++ ++#ifndef __arch__swab16 ++__inline static __u16 __arch__swab16(__u16 x) ++{ ++ return ___swab16(x); ++} ++ ++#endif ++ ++#ifndef __arch__swab32 ++__inline static __u32 __arch__swab32(__u32 x) ++{ ++ __u32 __tmp = (x) ; ++ return ___swab32(__tmp); ++} ++#endif ++ ++#ifndef __arch__swab64 ++ ++__inline static __u64 __arch__swab64(__u64 x) ++{ ++ __u64 __tmp = (x) ; ++ return ___swab64(__tmp); ++} ++ ++ ++#endif ++ ++#ifndef __swab16 ++#define __swab16(x) __fswab16(x) ++#define __swab32(x) __fswab32(x) ++#define __swab64(x) __fswab64(x) ++#endif // __swab16 ++ ++__inline static const __u16 __fswab16(__u16 x) ++{ ++ return __arch__swab16(x); ++} ++__inline static const __u32 __fswab32(__u32 x) ++{ ++ return __arch__swab32(x); ++} ++ ++#if defined(PLATFORM_LINUX) || defined(PLATFORM_WINDOWS) ++#define swab16 __swab16 ++#define swab32 __swab32 ++#define swab64 __swab64 ++#define swab16p __swab16p ++#define swab32p __swab32p ++#define swab64p __swab64p ++#define swab16s __swab16s ++#define swab32s __swab32s ++#define swab64s __swab64s ++#endif ++ ++#endif /* _LINUX_BYTEORDER_SWAB_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/swabb.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/byteorder/swabb.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,157 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _LINUX_BYTEORDER_SWABB_H ++#define _LINUX_BYTEORDER_SWABB_H ++ ++/* ++ * linux/byteorder/swabb.h ++ * SWAp Bytes Bizarrely ++ * swaHHXX[ps]?(foo) ++ * ++ * Support for obNUXIous pdp-endian and other bizarre architectures. ++ * Will Linux ever run on such ancient beasts? if not, this file ++ * will be but a programming pearl. Still, it's a reminder that we ++ * shouldn't be making too many assumptions when trying to be portable. ++ * ++ */ ++ ++/* ++ * Meaning of the names I chose (vaxlinux people feel free to correct them): ++ * swahw32 swap 16-bit half-words in a 32-bit word ++ * swahb32 swap 8-bit halves of each 16-bit half-word in a 32-bit word ++ * ++ * No 64-bit support yet. I don't know NUXI conventions for long longs. ++ * I guarantee it will be a mess when it's there, though :-> ++ * It will be even worse if there are conflicting 64-bit conventions. ++ * Hopefully, no one ever used 64-bit objects on NUXI machines. ++ * ++ */ ++ ++#define ___swahw32(x) \ ++({ \ ++ __u32 __x = (x); \ ++ ((__u32)( \ ++ (((__u32)(__x) & (__u32)0x0000ffffUL) << 16) | \ ++ (((__u32)(__x) & (__u32)0xffff0000UL) >> 16) )); \ ++}) ++#define ___swahb32(x) \ ++({ \ ++ __u32 __x = (x); \ ++ ((__u32)( \ ++ (((__u32)(__x) & (__u32)0x00ff00ffUL) << 8) | \ ++ (((__u32)(__x) & (__u32)0xff00ff00UL) >> 8) )); \ ++}) ++ ++#define ___constant_swahw32(x) \ ++ ((__u32)( \ ++ (((__u32)(x) & (__u32)0x0000ffffUL) << 16) | \ ++ (((__u32)(x) & (__u32)0xffff0000UL) >> 16) )) ++#define ___constant_swahb32(x) \ ++ ((__u32)( \ ++ (((__u32)(x) & (__u32)0x00ff00ffUL) << 8) | \ ++ (((__u32)(x) & (__u32)0xff00ff00UL) >> 8) )) ++ ++/* ++ * provide defaults when no architecture-specific optimization is detected ++ */ ++#ifndef __arch__swahw32 ++# define __arch__swahw32(x) ___swahw32(x) ++#endif ++#ifndef __arch__swahb32 ++# define __arch__swahb32(x) ___swahb32(x) ++#endif ++ ++#ifndef __arch__swahw32p ++# define __arch__swahw32p(x) __swahw32(*(x)) ++#endif ++#ifndef __arch__swahb32p ++# define __arch__swahb32p(x) __swahb32(*(x)) ++#endif ++ ++#ifndef __arch__swahw32s ++# define __arch__swahw32s(x) do { *(x) = __swahw32p((x)); } while (0) ++#endif ++#ifndef __arch__swahb32s ++# define __arch__swahb32s(x) do { *(x) = __swahb32p((x)); } while (0) ++#endif ++ ++ ++/* ++ * Allow constant folding ++ */ ++#if defined(__GNUC__) && (__GNUC__ >= 2) && defined(__OPTIMIZE__) ++# define __swahw32(x) \ ++(__builtin_constant_p((__u32)(x)) ? \ ++ ___swahw32((x)) : \ ++ __fswahw32((x))) ++# define __swahb32(x) \ ++(__builtin_constant_p((__u32)(x)) ? \ ++ ___swahb32((x)) : \ ++ __fswahb32((x))) ++#else ++# define __swahw32(x) __fswahw32(x) ++# define __swahb32(x) __fswahb32(x) ++#endif /* OPTIMIZE */ ++ ++ ++__inline static__ __const__ __u32 __fswahw32(__u32 x) ++{ ++ return __arch__swahw32(x); ++} ++__inline static__ __u32 __swahw32p(__u32 *x) ++{ ++ return __arch__swahw32p(x); ++} ++__inline static__ void __swahw32s(__u32 *addr) ++{ ++ __arch__swahw32s(addr); ++} ++ ++ ++__inline static__ __const__ __u32 __fswahb32(__u32 x) ++{ ++ return __arch__swahb32(x); ++} ++__inline static__ __u32 __swahb32p(__u32 *x) ++{ ++ return __arch__swahb32p(x); ++} ++__inline static__ void __swahb32s(__u32 *addr) ++{ ++ __arch__swahb32s(addr); ++} ++ ++#ifdef __BYTEORDER_HAS_U64__ ++/* ++ * Not supported yet ++ */ ++#endif /* __BYTEORDER_HAS_U64__ */ ++ ++#if defined(PLATFORM_LINUX) ++#define swahw32 __swahw32 ++#define swahb32 __swahb32 ++#define swahw32p __swahw32p ++#define swahb32p __swahb32p ++#define swahw32s __swahw32s ++#define swahb32s __swahb32s ++#endif ++ ++#endif /* _LINUX_BYTEORDER_SWABB_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/circ_buf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/circ_buf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,27 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CIRC_BUF_H_ ++#define __CIRC_BUF_H_ 1 ++ ++#define CIRC_CNT(head,tail,size) (((head) - (tail)) & ((size)-1)) ++ ++#define CIRC_SPACE(head,tail,size) CIRC_CNT((tail),((head)+1),(size)) ++ ++#endif //_CIRC_BUF_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/cmd_osdep.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/cmd_osdep.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,36 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CMD_OSDEP_H_ ++#define __CMD_OSDEP_H_ ++ ++ ++#include ++#include ++#include ++ ++extern sint _rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); ++extern sint _rtw_init_evt_priv(struct evt_priv *pevtpriv); ++extern void _rtw_free_evt_priv (struct evt_priv *pevtpriv); ++extern void _rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); ++extern sint _rtw_enqueue_cmd(_queue *queue, struct cmd_obj *obj); ++extern struct cmd_obj *_rtw_dequeue_cmd(_queue *queue); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_conf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_conf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,78 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_CONF_H__ ++#define __DRV_CONF_H__ ++#include "autoconf.h" ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++//Older Android kernel doesn't has CONFIG_ANDROID defined, ++//add this to force CONFIG_ANDROID defined ++#ifdef CONFIG_PLATFORM_ANDROID ++#define CONFIG_ANDROID ++#endif ++ ++#ifdef CONFIG_ANDROID ++//Some Android build will restart the UI while non-printable ascii is passed ++//between java and c/c++ layer (JNI). We force CONFIG_VALIDATE_SSID ++//for Android here. If you are sure there is no risk on your system about this, ++//mask this macro define to support non-printable ascii ssid. ++#define CONFIG_VALIDATE_SSID ++ ++//Android expect dbm as the rx signal strength unit ++#define CONFIG_SIGNAL_DISPLAY_DBM ++#endif ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND) && defined (CONFIG_RESUME_IN_WORKQUEUE) ++ #warning "You have CONFIG_HAS_EARLYSUSPEND enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" ++ #undef CONFIG_RESUME_IN_WORKQUEUE ++#endif ++ ++#if defined(CONFIG_ANDROID_POWER) && defined (CONFIG_RESUME_IN_WORKQUEUE) ++ #warning "You have CONFIG_ANDROID_POWER enabled in your system, we disable CONFIG_RESUME_IN_WORKQUEUE automatically" ++ #undef CONFIG_RESUME_IN_WORKQUEUE ++#endif ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE //this can be removed, because there is no case for this... ++ #if !defined( CONFIG_WAKELOCK) && !defined(CONFIG_ANDROID_POWER) ++ #error "enable CONFIG_RESUME_IN_WORKQUEUE without CONFIG_WAKELOCK or CONFIG_ANDROID_POWER will suffer from the danger of wifi's unfunctionality..." ++ #error "If you still want to enable CONFIG_RESUME_IN_WORKQUEUE in this case, mask this preprossor checking and GOOD LUCK..." ++ #endif ++#endif ++ ++//About USB VENDOR REQ ++#if defined(CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC automatically" ++ #define CONFIG_USB_VENDOR_REQ_MUTEX ++#endif ++#if defined(CONFIG_VENDOR_REQ_RETRY) && !defined(CONFIG_USB_VENDOR_REQ_MUTEX) ++ #warning "define CONFIG_USB_VENDOR_REQ_MUTEX for CONFIG_VENDOR_REQ_RETRY automatically" ++ #define CONFIG_USB_VENDOR_REQ_MUTEX ++#endif ++ ++ ++//#include ++ ++#endif // __DRV_CONF_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,555 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*------------------------------------------------------------------------------- ++ ++ For type defines and data structure defines ++ ++--------------------------------------------------------------------------------*/ ++ ++ ++#ifndef __DRV_TYPES_H__ ++#define __DRV_TYPES_H__ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++#include ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++#ifdef PLATFORM_LINUX ++#include ++#endif ++ ++enum _NIC_VERSION { ++ ++ RTL8711_NIC, ++ RTL8712_NIC, ++ RTL8713_NIC, ++ RTL8716_NIC ++ ++}; ++ ++enum{ ++ UP_LINK, ++ DOWN_LINK, ++}; ++typedef struct _ADAPTER _adapter, ADAPTER,*PADAPTER; ++ ++#ifdef CONFIG_80211N_HT ++#include ++#endif ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_DRVEXT_MODULE ++#include ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++#include ++#endif ++ ++#ifdef CONFIG_BR_EXT ++#include ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ #include "ioctl_cfg80211.h" ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#define SPEC_DEV_ID_NONE BIT(0) ++#define SPEC_DEV_ID_DISABLE_HT BIT(1) ++#define SPEC_DEV_ID_ENABLE_PS BIT(2) ++#define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3) ++#define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4) ++#define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5) ++ ++struct specific_device_id{ ++ ++ u32 flags; ++ ++ u16 idVendor; ++ u16 idProduct; ++ ++}; ++ ++struct registry_priv ++{ ++ u8 chip_version; ++ u8 rfintfs; ++ u8 lbkmode; ++ u8 hci; ++ NDIS_802_11_SSID ssid; ++ u8 network_mode; //infra, ad-hoc, auto ++ u8 channel;//ad-hoc support requirement ++ u8 wireless_mode;//A, B, G, auto ++ u8 scan_mode;//active, passive ++ u8 radio_enable; ++ u8 preamble;//long, short, auto ++ u8 vrtl_carrier_sense;//Enable, Disable, Auto ++ u8 vcs_type;//RTS/CTS, CTS-to-self ++ u16 rts_thresh; ++ u16 frag_thresh; ++ u8 adhoc_tx_pwr; ++ u8 soft_ap; ++ u8 power_mgnt; ++ u8 ips_mode; ++ u8 smart_ps; ++ u8 long_retry_lmt; ++ u8 short_retry_lmt; ++ u16 busy_thresh; ++ u8 ack_policy; ++ u8 mp_mode; ++ u8 software_encrypt; ++ u8 software_decrypt; ++ ++ u8 acm_method; ++ //UAPSD ++ u8 wmm_enable; ++ u8 uapsd_enable; ++ u8 uapsd_max_sp; ++ u8 uapsd_acbk_en; ++ u8 uapsd_acbe_en; ++ u8 uapsd_acvi_en; ++ u8 uapsd_acvo_en; ++ ++ WLAN_BSSID_EX dev_network; ++ ++#ifdef CONFIG_80211N_HT ++ u8 ht_enable; ++ u8 cbw40_enable; ++ u8 ampdu_enable;//for tx ++ u8 rx_stbc; ++ u8 ampdu_amsdu;//A-MPDU Supports A-MSDU is permitted ++#endif ++ u8 lowrate_two_xmit; ++ ++ u8 rf_config ; ++ u8 low_power ; ++ ++ u8 wifi_spec;// !turbo_mode ++ ++ u8 channel_plan; ++#ifdef CONFIG_BT_COEXIST ++ u8 bt_iso; ++ u8 bt_sco; ++ u8 bt_ampdu; ++#endif ++ BOOLEAN bAcceptAddbaReq; ++ ++ u8 antdiv_cfg; ++ ++ u8 usbss_enable;//0:disable,1:enable ++ u8 hwpdn_mode;//0:disable,1:enable,2:decide by EFUSE config ++ u8 hwpwrp_detect;//0:disable,1:enable ++ ++ u8 hw_wps_pbc;//0:disable,1:enable ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ char adaptor_info_caching_file_path[PATH_LENGTH_MAX]; ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ u8 max_roaming_times; // the max number driver will try to roaming ++#endif ++ ++#ifdef CONFIG_IOL ++ bool force_iol; //enable iol without other concern ++#endif ++ ++#ifdef SUPPORT_64_STA ++ u8 bcmc_rate; ++#endif ++ u8 intel_class_mode; ++}; ++ ++ ++//For registry parameters ++#define RGTRY_OFT(field) ((ULONG)FIELD_OFFSET(struct registry_priv,field)) ++#define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field) ++#define BSSID_OFT(field) ((ULONG)FIELD_OFFSET(WLAN_BSSID_EX,field)) ++#define BSSID_SZ(field) sizeof(((PWLAN_BSSID_EX) 0)->field) ++ ++#define MAX_CONTINUAL_URB_ERR 4 ++ ++struct dvobj_priv { ++ ++ _adapter * padapter; ++ ++ //For 92D, DMDP have 2 interface. ++ u8 InterfaceNumber; ++ u8 NumInterfaces; ++ ++/*-------- below is for SDIO INTERFACE --------*/ ++ ++#ifdef CONFIG_SDIO_HCI ++ ++#ifdef PLATFORM_OS_XP ++ PDEVICE_OBJECT pphysdevobj;//pPhysDevObj; ++ PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj; ++ PDEVICE_OBJECT pnextdevobj;//pNextDevObj; ++ SDBUS_INTERFACE_STANDARD sdbusinft;//SdBusInterface; ++ u8 nextdevstacksz;//unsigned char NextDeviceStackSize; ++#endif//PLATFORM_OS_XP ++ ++#ifdef PLATFORM_OS_CE ++ SD_DEVICE_HANDLE hDevice; ++ SD_CARD_RCA sd_rca; ++ SD_CARD_INTERFACE card_intf; ++ BOOLEAN enableIsarWithStatus; ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; ++ SD_HOST_BLOCK_CAPABILITY sd_host_blk_cap; ++#endif//PLATFORM_OS_CE ++ ++#ifdef PLATFORM_LINUX ++ struct sdio_func *func; ++#endif//PLATFORM_LINUX ++ ++ u8 func_number;//unsigned char FunctionNumber; ++ u32 block_transfer_len;//unsigned long BLOCK_TRANSFER_LEN; ++ u32 blk_shiftbits; ++ u16 driver_version; ++ u16 rxblknum; ++ u16 rxblknum_rd; ++ u16 c2hblknum; ++ u8 tx_block_mode; ++ u8 rx_block_mode; ++ u8 cmdfifo_cnt; ++ u8 rxfifo_cnt; ++ u16 sdio_hisr; ++ u16 sdio_himr; ++#endif// CONFIG_SDIO_HCI ++ ++/*-------- below is for USB INTERFACE --------*/ ++ ++#ifdef CONFIG_USB_HCI ++ ++ u8 nr_endpoint; ++ u8 ishighspeed; ++ u8 RtNumInPipes; ++ u8 RtNumOutPipes; ++ int ep_num[5]; //endpoint number ++ ++ int RegUsbSS; ++ ++ _sema usb_suspend_sema; ++ ++#ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _mutex usb_vendor_req_mutex; ++#endif ++ ++#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ u8 * usb_alloc_vendor_req_buf; ++ u8 * usb_vendor_req_buf; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ //related device objects ++ PDEVICE_OBJECT pphysdevobj;//pPhysDevObj; ++ PDEVICE_OBJECT pfuncdevobj;//pFuncDevObj; ++ PDEVICE_OBJECT pnextdevobj;//pNextDevObj; ++ ++ u8 nextdevstacksz;//unsigned char NextDeviceStackSize; //= (CHAR)CEdevice->pUsbDevObj->StackSize + 1; ++ ++ //urb for control diescriptor request ++ ++#ifdef PLATFORM_OS_XP ++ struct _URB_CONTROL_DESCRIPTOR_REQUEST descriptor_urb; ++ PUSB_CONFIGURATION_DESCRIPTOR pconfig_descriptor;//UsbConfigurationDescriptor; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ WCHAR active_path[MAX_ACTIVE_REG_PATH]; // adapter regpath ++ USB_EXTENSION usb_extension; ++ ++ _nic_hdl pipehdls_r8192c[0x10]; ++#endif ++ ++ u32 config_descriptor_len;//ULONG UsbConfigurationDescriptorLength; ++#endif//PLATFORM_WINDOWS ++ ++#ifdef PLATFORM_LINUX ++ struct usb_interface *pusbintf; ++ struct usb_device *pusbdev; ++#endif//PLATFORM_LINUX ++ ++ ATOMIC_T continual_urb_error; ++#endif//CONFIG_USB_HCI ++ ++/*-------- below is for PCIE INTERFACE --------*/ ++ ++#ifdef CONFIG_PCI_HCI ++ ++#ifdef PLATFORM_LINUX ++ struct pci_dev *ppcidev; ++ ++ //PCI MEM map ++ unsigned long pci_mem_end; /* shared mem end */ ++ unsigned long pci_mem_start; /* shared mem start */ ++ ++ //PCI IO map ++ unsigned long pci_base_addr; /* device I/O address */ ++ ++ //PciBridge ++ struct pci_priv pcipriv; ++ ++ u16 irqline; ++ u8 irq_enabled; ++ u8 irq_alloc; ++ RT_ISR_CONTENT isr_content; ++ _lock irq_th_lock; ++ ++ //ASPM ++ u8 const_pci_aspm; ++ u8 const_amdpci_aspm; ++ u8 const_hwsw_rfoff_d3; ++ u8 const_support_pciaspm; ++ // pci-e bridge */ ++ u8 const_hostpci_aspm_setting; ++ // pci-e device */ ++ u8 const_devicepci_aspm_setting; ++ u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. ++ u8 b_support_backdoor; ++#endif//PLATFORM_LINUX ++ ++#endif//CONFIG_PCI_HCI ++}; ++ ++typedef enum _DRIVER_STATE{ ++ DRIVER_NORMAL = 0, ++ DRIVER_DISAPPEAR = 1, ++ DRIVER_REPLACE_DONGLE = 2, ++}DRIVER_STATE; ++ ++#ifdef CONFIG_INTEL_PROXIM ++struct proxim { ++ bool proxim_support; ++ bool proxim_on; ++ ++ void *proximity_priv; ++ int (*proxim_rx)(_adapter *padapter, ++ union recv_frame *precv_frame); ++ u8 (*proxim_get_var)(_adapter* padapter, u8 type); ++}; ++#endif //CONFIG_INTEL_PROXIM ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++typedef struct loopbackdata ++{ ++ _sema sema; ++ _thread_hdl_ lbkthread; ++ u8 bstop; ++ u32 cnt; ++ u16 size; ++ u16 txsize; ++ u8 txbuf[0x8000]; ++ u16 rxsize; ++ u8 rxbuf[0x8000]; ++ u8 msg[100]; ++ ++}LOOPBACKDATA, *PLOOPBACKDATA; ++#endif ++ ++struct _ADAPTER{ ++ int DriverState;// for disable driver using module, use dongle to replace module. ++ int pid[3];//process id from UI, 0:wps, 1:hostapd, 2:dhcpcd ++ int bDongle;//build-in module or external dongle ++ u16 chip_type; ++ u16 HardwareType; ++ u16 interface_type;//USB,SDIO,PCI ++ ++ struct dvobj_priv dvobjpriv; ++ struct mlme_priv mlmepriv; ++ struct mlme_ext_priv mlmeextpriv; ++ struct cmd_priv cmdpriv; ++ struct evt_priv evtpriv; ++ //struct io_queue *pio_queue; ++ struct io_priv iopriv; ++ struct xmit_priv xmitpriv; ++ struct recv_priv recvpriv; ++ struct sta_priv stapriv; ++ struct security_priv securitypriv; ++ struct registry_priv registrypriv; ++ struct wlan_acl_pool acl_list; ++ struct pwrctrl_priv pwrctrlpriv; ++ struct eeprom_priv eeprompriv; ++ struct led_priv ledpriv; ++ ++#ifdef CONFIG_MP_INCLUDED ++ struct mp_priv mppriv; ++#endif ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ struct drvext_priv drvextpriv; ++#endif ++ ++#ifdef CONFIG_AP_MODE ++ struct hostapd_priv *phostapdpriv; ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef CONFIG_P2P ++ struct cfg80211_wifidirect_info cfg80211_wdinfo; ++#endif //CONFIG_IOCTL_CFG80211 ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info wdinfo; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_TDLS ++ struct tdls_info tdlsinfo; ++#endif //CONFIG_TDLS ++ ++ PVOID HalData; ++ u32 hal_data_sz; ++ struct hal_ops HalFunc; ++ ++#ifdef CONFIG_BT_COEXIST ++ //struct btcoexist_priv bt_coexist; ++#endif ++ s32 bDriverStopped; ++ s32 bSurpriseRemoved; ++ s32 bCardDisableWOHSM; ++ ++ u32 IsrContent; ++ u32 ImrContent; ++ ++ u8 EepromAddressSize; ++ u8 hw_init_completed; ++ u8 init_adpt_in_progress; ++ u8 bfirst_init; ++ u8 bHaltInProgress; ++ ++ _thread_hdl_ cmdThread; ++ _thread_hdl_ evtThread; ++ _thread_hdl_ xmitThread; ++ _thread_hdl_ recvThread; ++ ++ ++ NDIS_STATUS (*dvobj_init)(_adapter * adapter); ++ void (*dvobj_deinit)(_adapter * adapter); ++ ++ void (*intf_start)(_adapter * adapter); ++ void (*intf_stop)(_adapter * adapter); ++ ++#ifdef PLATFORM_WINDOWS ++ _nic_hdl hndis_adapter;//hNdisAdapter(NDISMiniportAdapterHandle); ++ _nic_hdl hndis_config;//hNdisConfiguration; ++ NDIS_STRING fw_img; ++ ++ u32 NdisPacketFilter; ++ u8 MCList[MAX_MCAST_LIST_NUM][6]; ++ u32 MCAddrCount; ++#endif //end of PLATFORM_WINDOWS ++ ++ ++#ifdef PLATFORM_LINUX ++ _nic_hdl pnetdev; ++ ++ // used by rtw_rereg_nd_name related function ++ struct rereg_nd_name_data { ++ _nic_hdl old_pnetdev; ++ char old_ifname[IFNAMSIZ]; ++ u8 old_ips_mode; ++ u8 old_bRegUseLed; ++ } rereg_nd_name_priv; ++ ++ int bup; ++ struct net_device_stats stats; ++ struct iw_statistics iwstats; ++ struct proc_dir_entry *dir_dev;// for proc directory ++ ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *rtw_wdev; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#endif //end of PLATFORM_LINUX ++ ++ int net_closed; ++ ++ u8 bFWReady; ++ u8 bReadPortCancel; ++ u8 bWritePortCancel; ++ u8 bRxRSSIDisplay; ++#ifdef CONFIG_AUTOSUSPEND ++ u8 bDisableAutosuspend; ++#endif ++#ifdef CONFIG_BR_EXT ++ _lock br_ext_lock; ++ //unsigned int macclone_completed; ++ struct nat25_network_db_entry *nethash[NAT25_HASH_SIZE]; ++ int pppoe_connection_in_progress; ++ unsigned char pppoe_addr[MACADDRLEN]; ++ unsigned char scdb_mac[MACADDRLEN]; ++ unsigned char scdb_ip[4]; ++ struct nat25_network_db_entry *scdb_entry; ++ unsigned char br_mac[MACADDRLEN]; ++ unsigned char br_ip[4]; ++ ++ struct br_ext_info ethBrExtInfo; ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_INTEL_PROXIM ++ /* intel Proximity, should be alloc mem ++ * in intel Proximity module and can only ++ * be used in intel Proximity mode */ ++ struct proxim proximity; ++#endif //CONFIG_INTEL_PROXIM ++ ++#ifdef RTL8723A_SDIO_LOOPBACK ++ PLOOPBACKDATA ploopback; ++#endif ++ ++}; ++ ++__inline static u8 *myid(struct eeprom_priv *peepriv) ++{ ++ return (peepriv->mac_addr); ++} ++ ++ ++#endif //__DRV_TYPES_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_ce.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_ce.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,92 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_CE_H__ ++#define __DRV_TYPES_CE_H__ ++ ++#include ++#include ++ ++#include ++ ++#define MAX_ACTIVE_REG_PATH 256 ++ ++#define MAX_MCAST_LIST_NUM 32 ++ ++ ++ ++//for ioctl ++#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) ++ ++#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h ++#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++ ++typedef struct _MP_REG_ENTRY ++{ ++ ++ NDIS_STRING RegName; // variable name text ++ BOOLEAN bRequired; // 1 -> required, 0 -> optional ++ ++ u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString ++ uint FieldOffset; // offset to MP_ADAPTER field ++ uint FieldSize; // size (in bytes) of the field ++ ++#ifdef UNDER_AMD64 ++ u64 Default; ++#else ++ u32 Default; // default value to use ++#endif ++ ++ u32 Min; // minimum value allowed ++ u32 Max; // maximum value allowed ++} MP_REG_ENTRY, *PMP_REG_ENTRY; ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _USB_EXTENSION { ++ LPCUSB_FUNCS _lpUsbFuncs; ++ USB_HANDLE _hDevice; ++ PVOID pAdapter; ++ ++#if 0 ++ USB_ENDPOINT_DESCRIPTOR _endpACLIn; ++ USB_ENDPOINT_DESCRIPTOR _endpACLOutHigh; ++ USB_ENDPOINT_DESCRIPTOR _endpACLOutNormal; ++ ++ USB_PIPE pPipeIn; ++ USB_PIPE pPipeOutNormal; ++ USB_PIPE pPipeOutHigh; ++#endif ++ ++} USB_EXTENSION, *PUSB_EXTENSION; ++#endif ++ ++ ++typedef struct _OCTET_STRING{ ++ u8 *Octet; ++ u16 Length; ++} OCTET_STRING, *POCTET_STRING; ++ ++ ++ ++ ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_linux.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_linux.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,25 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_LINUX_H__ ++#define __DRV_TYPES_LINUX_H__ ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_xp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/drv_types_xp.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,95 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __DRV_TYPES_XP_H__ ++#define __DRV_TYPES_XP_H__ ++ ++#include ++#include ++ ++ ++ ++#define MAX_MCAST_LIST_NUM 32 ++ ++ ++ ++//for ioctl ++#define MAKE_DRIVER_VERSION(_MainVer,_MinorVer) ((((u32)(_MainVer))<<16)+_MinorVer) ++ ++#define NIC_HEADER_SIZE 14 //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++#define NIC_MAX_SEND_PACKETS 10 // max number of send packets the MiniportSendPackets function can accept, can be moved to typedef.h ++#define NIC_VENDOR_DRIVER_VERSION MAKE_DRIVER_VERSION(0,001) //!< can be moved to typedef.h ++#define NIC_MAX_PACKET_SIZE 1514 //!< can be moved to typedef.h ++ ++ ++#undef ON_VISTA ++//added by Jackson ++#ifndef ON_VISTA ++// ++// Bus driver versions ++// ++ ++#define SDBUS_DRIVER_VERSION_1 0x100 ++#define SDBUS_DRIVER_VERSION_2 0x200 ++ ++#define SDP_FUNCTION_TYPE 4 ++#define SDP_BUS_DRIVER_VERSION 5 ++#define SDP_BUS_WIDTH 6 ++#define SDP_BUS_CLOCK 7 ++#define SDP_BUS_INTERFACE_CONTROL 8 ++#define SDP_HOST_BLOCK_LENGTH 9 ++#define SDP_FUNCTION_BLOCK_LENGTH 10 ++#define SDP_FN0_BLOCK_LENGTH 11 ++#define SDP_FUNCTION_INT_ENABLE 12 ++#endif ++ ++ ++typedef struct _MP_REG_ENTRY ++{ ++ ++ NDIS_STRING RegName; // variable name text ++ BOOLEAN bRequired; // 1 -> required, 0 -> optional ++ ++ u8 Type; // NdisParameterInteger/NdisParameterHexInteger/NdisParameterStringle/NdisParameterMultiString ++ uint FieldOffset; // offset to MP_ADAPTER field ++ uint FieldSize; // size (in bytes) of the field ++ ++#ifdef UNDER_AMD64 ++ u64 Default; ++#else ++ u32 Default; // default value to use ++#endif ++ ++ u32 Min; // minimum value allowed ++ u32 Max; // maximum value allowed ++} MP_REG_ENTRY, *PMP_REG_ENTRY; ++ ++ ++typedef struct _OCTET_STRING{ ++ u8 *Octet; ++ u16 Length; ++} OCTET_STRING, *POCTET_STRING; ++ ++ ++ ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ethernet.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ethernet.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++/*! \file */ ++#ifndef __INC_ETHERNET_H ++#define __INC_ETHERNET_H ++ ++#define ETHERNET_ADDRESS_LENGTH 6 //!< Ethernet Address Length ++#define ETHERNET_HEADER_SIZE 14 //!< Ethernet Header Length ++#define LLC_HEADER_SIZE 6 //!< LLC Header Length ++#define TYPE_LENGTH_FIELD_SIZE 2 //!< Type/Length Size ++#define MINIMUM_ETHERNET_PACKET_SIZE 60 //!< Minimum Ethernet Packet Size ++#define MAXIMUM_ETHERNET_PACKET_SIZE 1514 //!< Maximum Ethernet Packet Size ++ ++#define RT_ETH_IS_MULTICAST(_pAddr) ((((UCHAR *)(_pAddr))[0]&0x01)!=0) //!< Is Multicast Address? ++#define RT_ETH_IS_BROADCAST(_pAddr) ( \ ++ ((UCHAR *)(_pAddr))[0]==0xff && \ ++ ((UCHAR *)(_pAddr))[1]==0xff && \ ++ ((UCHAR *)(_pAddr))[2]==0xff && \ ++ ((UCHAR *)(_pAddr))[3]==0xff && \ ++ ((UCHAR *)(_pAddr))[4]==0xff && \ ++ ((UCHAR *)(_pAddr))[5]==0xff ) //!< Is Broadcast Address? ++ ++ ++#endif // #ifndef __INC_ETHERNET_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/farray.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/farray.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,31480 @@ ++unsigned char f_array[125912] = { ++0x12,0x87,0x09,0x10, ++0x30,0x00,0x00,0x00, ++0x08,0xF8,0x00,0x00, ++0x50,0xF3,0x00,0x00, ++0x30,0x00,0x00,0x00, ++0xB8,0xF1,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x27,0x17,0x41, ++0x87,0x12,0x12,0x01, ++0x00,0x00,0x12,0x06, ++0x00,0x00,0x00,0x00, ++0x00,0x07,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x01,0x01,0x00,0x01, ++0x01,0x01,0x00,0x00, ++0x01,0x00,0x01,0x00, ++0x00,0x00,0x01,0x01, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x7F,0x00,0x00,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x1F,0x00,0x00,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x1A,0x3C, ++0x80,0x03,0x5A,0x37, ++0x00,0x80,0x1B,0x3C, ++0x80,0x00,0x7B,0x37, ++0x00,0x00,0x5B,0xAF, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x37, ++0x00,0x80,0x1B,0x3C, ++0x80,0x00,0x7B,0x37, ++0x00,0x00,0x5B,0xAF, ++0x01,0x80,0x1A,0x3C, ++0x90,0xEE,0x5A,0x27, ++0x08,0x00,0x40,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0xA1,0xAF, ++0x08,0x00,0xA2,0xAF, ++0x0C,0x00,0xA3,0xAF, ++0x10,0x00,0xA4,0xAF, ++0x14,0x00,0xA5,0xAF, ++0x18,0x00,0xA6,0xAF, ++0x1C,0x00,0xA7,0xAF, ++0x20,0x00,0xA8,0xAF, ++0x24,0x00,0xA9,0xAF, ++0x28,0x00,0xAA,0xAF, ++0x2C,0x00,0xAB,0xAF, ++0x30,0x00,0xAC,0xAF, ++0x34,0x00,0xAD,0xAF, ++0x38,0x00,0xAE,0xAF, ++0x3C,0x00,0xAF,0xAF, ++0x12,0x40,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x00,0x70,0x0A,0x40, ++0x40,0x00,0xB0,0xAF, ++0x44,0x00,0xB1,0xAF, ++0x48,0x00,0xB2,0xAF, ++0x4C,0x00,0xB3,0xAF, ++0x50,0x00,0xB4,0xAF, ++0x54,0x00,0xB5,0xAF, ++0x58,0x00,0xB6,0xAF, ++0x5C,0x00,0xB7,0xAF, ++0x60,0x00,0xB8,0xAF, ++0x64,0x00,0xB9,0xAF, ++0x68,0x00,0xBC,0xAF, ++0x6C,0x00,0xBD,0xAF, ++0x70,0x00,0xBE,0xAF, ++0x74,0x00,0xBF,0xAF, ++0x78,0x00,0xA8,0xAF, ++0x7C,0x00,0xA9,0xAF, ++0x80,0x00,0xAA,0xAF, ++0x32,0x3B,0x00,0x08, ++0x21,0x20,0xA0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x05,0x3C, ++0x00,0x80,0x02,0x3C, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x03,0xA3,0x34, ++0x00,0x03,0x42,0x24, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x42,0xB0,0x02,0x3C, ++0x03,0x00,0x46,0x34, ++0x00,0x00,0xC3,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x70,0x30, ++0x10,0x00,0x02,0x32, ++0x18,0x00,0x40,0x10, ++0x02,0x80,0x11,0x3C, ++0x30,0x1F,0x27,0x26, ++0x78,0x36,0xE4,0x94, ++0x10,0x00,0x02,0x24, ++0x00,0x00,0xC2,0xA0, ++0x08,0x00,0x80,0x10, ++0x1C,0x03,0xA3,0x34, ++0x7C,0x36,0xE2,0x94, ++0xB0,0x03,0xA4,0x34, ++0x00,0x00,0x62,0xAC, ++0x00,0x00,0x80,0xAC, ++0x78,0x36,0xE0,0xA4, ++0x7C,0x36,0xE0,0xA4, ++0x00,0x00,0x04,0x24, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x06,0x3C, ++0x14,0x5E,0xA2,0x8C, ++0x18,0x5F,0xC3,0x8C, ++0x01,0x00,0x84,0x24, ++0x01,0x00,0x42,0x24, ++0x01,0x00,0x63,0x24, ++0x78,0x36,0xE4,0xA4, ++0x14,0x5E,0xA2,0xAC, ++0x18,0x5F,0xC3,0xAC, ++0x00,0x16,0x10,0x00, ++0x03,0x16,0x02,0x00, ++0x7B,0x00,0x40,0x04, ++0x42,0xB0,0x02,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x40,0x00,0x02,0x32, ++0x16,0x00,0x40,0x10, ++0x30,0x1F,0x24,0x26, ++0x42,0xB0,0x0B,0x3C, ++0x03,0x00,0x62,0x35, ++0x40,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0x02,0x80,0x03,0x3C, ++0x12,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x1A,0x00,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x12,0x5F,0x60,0xA0, ++0x02,0x80,0x04,0x3C, ++0x0E,0x5F,0x83,0x90, ++0xFD,0xFF,0x02,0x24, ++0x24,0x18,0x62,0x00, ++0x0E,0x5F,0x83,0xA0, ++0x0E,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x42,0x30, ++0x5D,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x24,0x26, ++0xE0,0x1B,0x83,0x94, ++0xDC,0x1B,0x85,0x94, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x80,0x00,0x63,0x30, ++0x41,0xB0,0x02,0x3C, ++0x25,0x18,0x65,0x00, ++0x08,0x00,0x42,0x34, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0x43,0xA4, ++0x08,0x00,0xE0,0x03, ++0xDC,0x1B,0x83,0xA4, ++0xFA,0x5E,0x82,0x90, ++0x02,0x80,0x05,0x3C, ++0x01,0x00,0x42,0x24, ++0xFA,0x5E,0x82,0xA0, ++0x0E,0x5F,0xA3,0x90, ++0xEF,0xFF,0x02,0x24, ++0x24,0x18,0x62,0x00, ++0x0E,0x5F,0xA3,0xA0, ++0xFA,0x5E,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x2C, ++0x32,0x00,0x40,0x10, ++0x30,0x1F,0x23,0x26, ++0x25,0xB0,0x06,0x3C, ++0x84,0x00,0xC4,0x34, ++0x80,0x00,0xC6,0x34, ++0x00,0x00,0x82,0x8C, ++0x00,0x00,0xC4,0x8C, ++0x02,0x80,0x08,0x3C, ++0x21,0x10,0x00,0x00, ++0x1C,0x5F,0x06,0x8D, ++0x25,0x10,0x44,0x00, ++0x02,0x80,0x04,0x3C, ++0x20,0x5F,0x88,0x8C, ++0x24,0x5F,0x89,0x8C, ++0x00,0x00,0x65,0x91, ++0x21,0x10,0x46,0x00, ++0xFB,0xFF,0x04,0x24, ++0x24,0x28,0xA4,0x00, ++0x23,0x40,0x02,0x01, ++0x00,0x00,0x65,0xA1, ++0x04,0x00,0x00,0x11, ++0x01,0x00,0x06,0x24, ++0x80,0x10,0x08,0x00, ++0x21,0x10,0x48,0x00, ++0x80,0x30,0x02,0x00, ++0x01,0x00,0x04,0x24, ++0x8C,0x23,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x42,0xB0,0x02,0x3C, ++0x22,0x00,0x04,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x44,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x01,0x00,0x05,0x24, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0x30,0x1F,0x24,0x26, ++0xE0,0x1B,0x83,0x94, ++0xDC,0x1B,0x85,0x94, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x80,0x00,0x63,0x30, ++0x41,0xB0,0x02,0x3C, ++0x25,0x18,0x65,0x00, ++0x08,0x00,0x42,0x34, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0x43,0xA4, ++0x08,0x00,0xE0,0x03, ++0xDC,0x1B,0x83,0xA4, ++0xB0,0x1B,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x16,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xAB,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x15,0x5F,0x62,0xA0, ++0x0B,0x01,0x00,0x08, ++0x30,0x1F,0x24,0x26, ++0x0C,0x5F,0x40,0xA0, ++0x44,0x01,0x00,0x08, ++0x02,0x80,0x03,0x3C, ++0x80,0xFF,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x9E,0x25,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0x00,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x40,0xA0, ++0x0B,0x01,0x00,0x08, ++0x30,0x1F,0x24,0x26, ++0xFF,0x00,0x84,0x30, ++0x0B,0x00,0x82,0x2C, ++0xFF,0xFF,0xE7,0x30, ++0x10,0x00,0xA8,0x93, ++0x19,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x04,0x00, ++0xD8,0xE9,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x43,0xB0,0x02,0x3C, ++0x78,0x00,0x44,0x34, ++0x07,0x00,0xE2,0x30, ++0x00,0x00,0x85,0xAC, ++0x04,0x00,0x86,0xAC, ++0x04,0x00,0x40,0x18, ++0x00,0x00,0x00,0x00, ++0xF8,0xFF,0xE2,0x30, ++0x08,0x00,0x42,0x24, ++0xFF,0xFF,0x47,0x30, ++0x21,0x10,0xE8,0x00, ++0x00,0x80,0x03,0x3C, ++0x08,0x00,0x82,0xAC, ++0x25,0x10,0x43,0x00, ++0x08,0x00,0x82,0xAC, ++0x01,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x6C,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x60,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x54,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x48,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x3C,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x30,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x24,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x18,0x00,0x44,0x34, ++0x43,0xB0,0x02,0x3C, ++0x83,0x01,0x00,0x08, ++0x0C,0x00,0x44,0x34, ++0x83,0x01,0x00,0x08, ++0x43,0xB0,0x04,0x3C, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0xC0,0x06,0x63,0x24, ++0x00,0x00,0x43,0xAC, ++0x01,0x00,0x05,0x24, ++0x43,0xB0,0x02,0x3C, ++0x04,0x28,0x85,0x00, ++0x88,0x00,0x44,0x34, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x42,0x30, ++0x05,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x00,0x00,0x82,0x94, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x42,0x30, ++0x24,0x10,0x45,0x00, ++0xF5,0xFF,0x40,0x1C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x08,0x3C, ++0x00,0x80,0x02,0x3C, ++0xC8,0xFF,0xBD,0x27, ++0x18,0x03,0x03,0x35, ++0x1C,0x07,0x42,0x24, ++0x00,0x00,0x62,0xAC, ++0x30,0x00,0xB6,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x0C,0x00,0xF2,0x84, ++0x08,0x00,0xF5,0x8C, ++0xFF,0x00,0xC6,0x30, ++0x00,0x01,0x02,0x24, ++0x23,0x10,0x46,0x00, ++0xFF,0xFF,0x51,0x30, ++0xD0,0x03,0x08,0x35, ++0xFF,0x00,0x96,0x30, ++0x00,0x00,0x12,0xAD, ++0x21,0xA0,0xA0,0x00, ++0x21,0x30,0xC5,0x00, ++0x00,0x00,0x15,0xAD, ++0x21,0x20,0xC0,0x02, ++0x21,0x28,0xA0,0x02, ++0x21,0x38,0x20,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x23,0x18,0x51,0x02, ++0xFF,0xFF,0x82,0x32, ++0x00,0x94,0x03,0x00, ++0x03,0x94,0x12,0x00, ++0x09,0x02,0x00,0x08, ++0x02,0x9A,0x02,0x00, ++0x28,0xB0,0x03,0x3C, ++0xC0,0x10,0x13,0x00, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x25,0xB0,0x10,0x3C, ++0x20,0x10,0x02,0x3C, ++0xFF,0x00,0x93,0x30, ++0x00,0x22,0x13,0x00, ++0xFF,0xFF,0x43,0x32, ++0x01,0x01,0x45,0x2A, ++0x21,0xA0,0x82,0x00, ++0x21,0xA8,0xB1,0x02, ++0xD0,0x03,0x02,0x36, ++0x00,0x01,0x11,0x24, ++0x0B,0x88,0x65,0x00, ++0x21,0x20,0xC0,0x02, ++0x00,0x00,0x53,0xAC, ++0xB0,0x01,0x00,0x0C, ++0xB0,0x03,0x10,0x36, ++0x21,0x30,0x80,0x02, ++0x21,0x20,0xC0,0x02, ++0x21,0x28,0xA0,0x02, ++0x21,0x38,0x20,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x23,0x18,0x51,0x02, ++0x00,0x94,0x03,0x00, ++0x03,0x94,0x12,0x00, ++0x00,0x00,0x12,0xAE, ++0xE2,0xFF,0x40,0x1E, ++0x00,0x00,0x00,0x00, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x20,0x00,0xB2,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x04,0x00,0x8B,0x8C, ++0x21,0x80,0x80,0x00, ++0x08,0x00,0x84,0x8C, ++0x0E,0x00,0x07,0x96, ++0xFF,0xE0,0x02,0x3C, ++0x10,0x00,0x08,0x8E, ++0x1F,0x00,0x6A,0x31, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x82,0x00, ++0x00,0x1E,0x0A,0x00, ++0x25,0x48,0x83,0x00, ++0x21,0x90,0xA0,0x00, ++0x21,0x60,0xC0,0x00, ++0x10,0x01,0x00,0x05, ++0x07,0x00,0xE7,0x30, ++0x00,0x00,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0xFD,0x0F,0x42,0x28, ++0xC0,0x00,0x40,0x14, ++0x02,0x80,0x11,0x3C, ++0xFF,0xDF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x48,0x22,0x01, ++0x1C,0x00,0x02,0x8E, ++0x00,0x40,0x03,0x3C, ++0x25,0x48,0x23,0x01, ++0x02,0x80,0x11,0x3C, ++0xC5,0x00,0x40,0x04, ++0x08,0x00,0x09,0xAE, ++0xC0,0x30,0x0A,0x00, ++0x21,0x10,0xCA,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x4A,0x00, ++0x80,0x10,0x02,0x00, ++0x30,0x1F,0x27,0x26, ++0x21,0x28,0x47,0x00, ++0x1C,0x24,0xA3,0x8C, ++0x01,0x00,0x0A,0x24, ++0x02,0x13,0x03,0x00, ++0x01,0x00,0x42,0x30, ++0xDB,0x00,0x4A,0x10, ++0x42,0x18,0x03,0x00, ++0x82,0x11,0x09,0x00, ++0x01,0x00,0x42,0x30, ++0x06,0x00,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0xC0,0xFF,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0x04,0x00,0x49,0x34, ++0x08,0x00,0x09,0xAE, ++0x02,0x80,0x02,0x3C, ++0xE9,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x6C,0x00,0x60,0x14, ++0x21,0x28,0xC7,0x00, ++0xE8,0x22,0xA4,0x8C, ++0x10,0x00,0x02,0x8E, ++0xBF,0xFF,0x03,0x24, ++0x40,0x00,0x84,0x30, ++0x24,0x10,0x43,0x00, ++0x25,0x40,0x44,0x00, ++0x10,0x00,0x08,0xAE, ++0xE8,0x22,0xA3,0x8C, ++0x7F,0xF8,0x02,0x24, ++0x24,0x10,0x02,0x01, ++0x80,0x07,0x63,0x30, ++0x42,0x27,0x09,0x00, ++0x25,0x40,0x43,0x00, ++0x01,0x00,0x84,0x30, ++0xE1,0x00,0x8A,0x10, ++0x10,0x00,0x08,0xAE, ++0x30,0x1F,0x24,0x26, ++0x21,0x20,0xC4,0x00, ++0xE8,0x22,0x83,0x8C, ++0xFF,0xF7,0x02,0x24, ++0x24,0x10,0x02,0x01, ++0x00,0x08,0x63,0x30, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0xE8,0x22,0x83,0x8C, ++0xFF,0xEF,0x02,0x24, ++0x24,0x10,0x02,0x01, ++0x00,0x10,0x63,0x30, ++0x30,0x1F,0x25,0x26, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0x21,0x30,0xC5,0x00, ++0xE8,0x22,0xC4,0x8C, ++0xFD,0xFF,0x02,0x3C, ++0x02,0x00,0x03,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x83,0x00, ++0x24,0x10,0x02,0x01, ++0x25,0x40,0x44,0x00, ++0x10,0x00,0x08,0xAE, ++0xB0,0x1B,0xA3,0x94, ++0xFB,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xC2,0x1B,0x03,0x00, ++0x24,0x10,0x02,0x01, ++0x80,0x1C,0x03,0x00, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0x8F,0x3E,0xA3,0x90, ++0xE7,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x03,0x00,0x63,0x30, ++0x24,0x10,0x02,0x01, ++0xC0,0x1C,0x03,0x00, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0xE8,0x22,0xC4,0x8C, ++0xFF,0xFD,0x02,0x3C, ++0x00,0x02,0x03,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x83,0x00, ++0x24,0x10,0x02,0x01, ++0x25,0x40,0x44,0x00, ++0x10,0x00,0x08,0xAE, ++0xB0,0x1B,0xA3,0x94, ++0xFF,0xFB,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xC2,0x1B,0x03,0x00, ++0x24,0x10,0x02,0x01, ++0x80,0x1E,0x03,0x00, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0x8F,0x3E,0xA3,0x90, ++0xFF,0xE7,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x03,0x00,0x63,0x30, ++0x24,0x10,0x02,0x01, ++0xC0,0x1E,0x03,0x00, ++0x25,0x40,0x43,0x00, ++0x10,0x00,0x08,0xAE, ++0xE8,0x22,0xC3,0x8C, ++0xC0,0xFF,0x02,0x24, ++0x24,0x10,0x02,0x01, ++0x3F,0x00,0x63,0x30, ++0x25,0x10,0x43,0x00, ++0x10,0x00,0x02,0xAE, ++0xEC,0x22,0xC5,0x8C, ++0x14,0x00,0x03,0x8E, ++0xFF,0xFF,0x04,0x3C, ++0xFF,0x7F,0x84,0x34, ++0x24,0x18,0x64,0x00, ++0x00,0x80,0xA5,0x30, ++0x25,0x18,0x65,0x00, ++0x14,0x00,0x03,0xAE, ++0xEC,0x22,0xC2,0x8C, ++0x24,0x18,0x64,0x00, ++0x00,0x80,0x42,0x30, ++0x25,0x18,0x62,0x00, ++0x14,0x00,0x03,0xAE, ++0xEE,0x22,0xC4,0x94, ++0xE0,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x1F,0x00,0x84,0x30, ++0x24,0x18,0x62,0x00, ++0x00,0x24,0x04,0x00, ++0x25,0x18,0x64,0x00, ++0x14,0x00,0x03,0xAE, ++0x02,0x00,0x02,0x92, ++0x02,0x24,0x0B,0x00, ++0x02,0x80,0x03,0x3C, ++0x21,0x10,0x4C,0x00, ++0xFF,0xFF,0x42,0x30, ++0x01,0x00,0x84,0x30, ++0x6A,0x00,0x80,0x10, ++0x25,0x30,0x43,0x00, ++0x30,0x1F,0x23,0x26, ++0xF8,0x1D,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0xFF,0x0F,0x45,0x30, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x62,0xA4, ++0x0C,0x00,0x03,0x8E, ++0x00,0xF0,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x00,0x24,0x05,0x00, ++0x24,0x18,0x62,0x00, ++0x25,0x18,0x64,0x00, ++0x0C,0x00,0x03,0xAE, ++0x16,0x00,0xC2,0x94, ++0x00,0x19,0x05,0x00, ++0x02,0x00,0x04,0x24, ++0x0F,0x00,0x42,0x30, ++0x25,0x10,0x43,0x00, ++0x16,0x00,0xC2,0xA4, ++0x21,0x28,0x80,0x01, ++0x21,0x30,0x40,0x02, ++0x80,0x00,0x07,0x24, ++0x01,0x00,0x02,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x52,0xAC, ++0xB0,0x01,0x00,0x0C, ++0x02,0x00,0x04,0x24, ++0x30,0x1F,0x24,0x26, ++0x00,0x00,0x03,0x96, ++0x94,0x3E,0x82,0x8C, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x21,0x10,0x43,0x00, ++0x28,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x94,0x3E,0x82,0xAC, ++0x08,0x00,0x09,0xAE, ++0x30,0x1F,0x22,0x26, ++0x1A,0x3E,0x43,0x90, ++0xFF,0xDF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x07,0x18,0xE3,0x00, ++0x01,0x00,0x63,0x30, ++0x24,0x10,0x22,0x01, ++0x40,0x1F,0x03,0x00, ++0x25,0x48,0x43,0x00, ++0x1C,0x00,0x02,0x8E, ++0x00,0x00,0x00,0x00, ++0x3D,0xFF,0x41,0x04, ++0x08,0x00,0x09,0xAE, ++0x1E,0x00,0x02,0x92, ++0x04,0x00,0x03,0x24, ++0x21,0x30,0x50,0x00, ++0x00,0x00,0xC4,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x82,0x30, ++0x02,0x29,0x02,0x00, ++0x50,0x00,0xA3,0x10, ++0x06,0x00,0x02,0x24, ++0x32,0xFF,0xA2,0x14, ++0x00,0x00,0x00,0x00, ++0x1A,0x00,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x39,0x00,0xC2,0xA0, ++0x1E,0x00,0x03,0x92, ++0x1A,0x00,0x02,0x96, ++0x21,0x18,0x70,0x00, ++0x03,0x12,0x02,0x00, ++0x38,0x00,0x62,0xA0, ++0x04,0x00,0x0B,0x8E, ++0x08,0x00,0x09,0x8E, ++0xC0,0x30,0x0A,0x00, ++0x21,0x10,0xCA,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x4A,0x00, ++0x80,0x10,0x02,0x00, ++0x30,0x1F,0x27,0x26, ++0x21,0x28,0x47,0x00, ++0x1C,0x24,0xA3,0x8C, ++0x01,0x00,0x0A,0x24, ++0x02,0x13,0x03,0x00, ++0x01,0x00,0x42,0x30, ++0x29,0xFF,0x4A,0x14, ++0x82,0x11,0x09,0x00, ++0x42,0x18,0x03,0x00, ++0x7F,0xFF,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0x80,0x00,0x63,0x30, ++0x25,0x48,0x43,0x00, ++0x08,0x00,0x09,0xAE, ++0x1C,0x24,0xA3,0x8C, ++0x10,0x00,0x04,0x8E, ++0xFF,0xFF,0x02,0x3C, ++0x07,0x00,0x63,0x30, ++0xFF,0x1F,0x42,0x34, ++0x24,0x20,0x82,0x00, ++0x40,0x1B,0x03,0x00, ++0x25,0x40,0x83,0x00, ++0x44,0x02,0x00,0x08, ++0x10,0x00,0x08,0xAE, ++0x0E,0x00,0x02,0x96, ++0x30,0x1F,0x23,0x26, ++0x07,0x00,0x42,0x30, ++0x40,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0xE8,0x1D,0x44,0x94, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x83,0x24, ++0xFF,0x0F,0x85,0x30, ++0xCA,0x02,0x00,0x08, ++0xE8,0x1D,0x43,0xA4, ++0x14,0x00,0x02,0x8E, ++0x00,0x00,0x00,0x00, ++0x42,0x12,0x02,0x00, ++0x3F,0x00,0x42,0x30, ++0x0C,0x00,0x42,0x28, ++0xF1,0xFE,0x40,0x14, ++0xFF,0xDF,0x02,0x3C, ++0x29,0x02,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xE6,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x1D,0xFF,0x64,0x14, ++0x30,0x1F,0x24,0x26, ++0x90,0x3E,0xE2,0x90, ++0xFF,0xF7,0x03,0x24, ++0x24,0x18,0x03,0x01, ++0x01,0x00,0x42,0x30, ++0xC0,0x12,0x02,0x00, ++0x25,0x40,0x62,0x00, ++0x10,0x00,0x08,0xAE, ++0x91,0x3E,0xE2,0x90, ++0xFF,0xEF,0x03,0x24, ++0x24,0x18,0x03,0x01, ++0x01,0x00,0x42,0x30, ++0x6D,0x02,0x00,0x08, ++0x00,0x13,0x02,0x00, ++0x1A,0x00,0x05,0x96, ++0x0F,0x00,0x84,0x30, ++0x80,0x20,0x04,0x00, ++0x21,0x18,0xC4,0x00, ++0x11,0x00,0x65,0xA0, ++0x1E,0x00,0x02,0x92, ++0x1A,0x00,0x03,0x96, ++0x21,0x10,0x50,0x00, ++0x21,0x10,0x44,0x00, ++0x03,0x1A,0x03,0x00, ++0x10,0x00,0x43,0xA0, ++0x04,0x00,0x0B,0x8E, ++0x08,0x00,0x09,0x8E, ++0x11,0x03,0x00,0x08, ++0xC0,0x30,0x0A,0x00, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x88,0x0D,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x04,0x3C, ++0x00,0x80,0x02,0x3C, ++0xC0,0xFF,0xBD,0x27, ++0x18,0x03,0x83,0x34, ++0xA4,0x0D,0x42,0x24, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x34,0x00,0xB7,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x02,0x3C, ++0xB0,0x03,0x9E,0x34, ++0x98,0x03,0x00,0x08, ++0x30,0x1F,0x55,0x24, ++0x08,0x00,0x04,0xAE, ++0x14,0x37,0x46,0x8E, ++0x21,0x28,0x60,0x02, ++0x80,0x00,0x07,0x24, ++0x01,0x00,0x04,0x24, ++0x01,0x00,0x14,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB4,0xAF, ++0x14,0x37,0x43,0x8E, ++0x01,0x00,0x04,0x24, ++0x00,0x00,0xC3,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0x1C,0x42,0x92, ++0x00,0x00,0x00,0x00, ++0x5F,0x00,0x40,0x10, ++0x2A,0xB0,0x02,0x3C, ++0x09,0x00,0x42,0x34, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x54,0xA0, ++0x00,0x00,0x43,0xA0, ++0xFF,0x00,0x03,0x24, ++0x74,0x00,0x23,0x12, ++0x00,0x00,0x00,0x00, ++0x10,0x37,0xA2,0x8E, ++0x7C,0x37,0xB3,0x8E, ++0x01,0x00,0x04,0x24, ++0x00,0x00,0xC2,0xAF, ++0x14,0x37,0xA2,0xAE, ++0x00,0x00,0xD3,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x7C,0x37,0xA4,0x8E, ++0x80,0x37,0xA3,0x8E, ++0x02,0x80,0x02,0x3C, ++0x04,0xEA,0x42,0x24, ++0x00,0x00,0x52,0x8C, ++0x80,0x00,0x84,0x24, ++0xFF,0x00,0x62,0x24, ++0x2B,0x10,0x44,0x00, ++0x0A,0x18,0x82,0x00, ++0x7C,0x37,0xA3,0xAE, ++0x02,0x80,0x03,0x3C, ++0x08,0xEA,0x63,0x24, ++0x7C,0x37,0x42,0x8E, ++0x00,0x00,0x76,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0xAE, ++0x02,0x80,0x17,0x3C, ++0xFF,0xFF,0x62,0x32, ++0x25,0x80,0x57,0x00, ++0x00,0x00,0xD0,0xAE, ++0x0C,0x00,0x02,0x92, ++0x21,0x28,0x00,0x00, ++0x00,0x00,0xC2,0xAE, ++0x02,0x00,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x93,0x00, ++0xFF,0xFF,0x84,0x30, ++0xFB,0x60,0x00,0x0C, ++0x25,0x20,0x97,0x00, ++0x0C,0x00,0x11,0x92, ++0x20,0x10,0x02,0x3C, ++0x01,0x00,0x04,0x24, ++0x00,0x1A,0x11,0x00, ++0x21,0x18,0x62,0x00, ++0xFF,0x00,0x02,0x24, ++0x21,0x30,0x60,0x00, ++0x06,0x00,0x22,0x12, ++0x80,0x00,0x07,0x24, ++0x7C,0x37,0x45,0x8E, ++0x10,0x37,0x43,0xAE, ++0xB4,0x36,0x51,0xA2, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x04,0x00,0x04,0x8E, ++0x08,0x00,0x03,0x8E, ++0xFF,0xE0,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x1F,0x00,0x84,0x30, ++0x24,0x18,0x62,0x00, ++0x00,0x26,0x04,0x00, ++0xFF,0xDF,0x02,0x3C, ++0x25,0x18,0x64,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x00,0x40,0x04,0x3C, ++0x25,0x18,0x64,0x00, ++0xC0,0xFF,0x05,0x24, ++0x82,0x11,0x03,0x00, ++0x24,0x20,0x65,0x00, ++0x01,0x00,0x42,0x30, ++0xA3,0xFF,0x40,0x10, ++0x04,0x00,0x84,0x34, ++0x08,0x00,0x03,0xAE, ++0x14,0x37,0x46,0x8E, ++0x21,0x28,0x60,0x02, ++0x80,0x00,0x07,0x24, ++0x01,0x00,0x04,0x24, ++0x01,0x00,0x14,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB4,0xAF, ++0x14,0x37,0x43,0x8E, ++0x01,0x00,0x04,0x24, ++0x00,0x00,0xC3,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0x1C,0x42,0x92, ++0x00,0x00,0x00,0x00, ++0xA3,0xFF,0x40,0x14, ++0x2A,0xB0,0x02,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x2A,0x1C,0x54,0xA2, ++0x02,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x53,0x00, ++0xFF,0xFF,0x42,0x30, ++0x25,0x10,0x57,0x00, ++0x02,0x00,0x43,0x94, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x64,0x30, ++0x00,0xC0,0x84,0x24, ++0xFF,0xFF,0x84,0x30, ++0xC2,0x34,0x00,0x0C, ++0x2B,0x1C,0x43,0xA2, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2A,0xB0,0x02,0x3C, ++0x09,0x00,0x42,0x34, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x54,0xA0, ++0x00,0x00,0x43,0xA0, ++0xFF,0x00,0x03,0x24, ++0x8E,0xFF,0x23,0x16, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x62,0x24, ++0xD0,0x1B,0x43,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x00,0x38,0x63,0x34, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x83,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0x43,0xAC, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x88,0x10,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xC0,0xFF,0xBD,0x27, ++0x34,0x00,0xB7,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x06,0x3C, ++0xCC,0x5E,0xC5,0x90, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0xA4,0x10,0x63,0x24, ++0x40,0x00,0xA4,0x30, ++0x00,0x00,0x43,0xAC, ++0x21,0xB8,0x00,0x00, ++0x03,0x00,0x80,0x10, ++0x7F,0x00,0xA2,0x30, ++0xBF,0x00,0xA2,0x30, ++0x01,0x00,0x17,0x24, ++0xCC,0x5E,0xC2,0xA0, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x1E,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0xD3,0x27, ++0xB0,0x03,0x55,0x34, ++0x6A,0x04,0x00,0x08, ++0x02,0x80,0x16,0x3C, ++0x90,0x36,0x91,0xA2, ++0x30,0x1F,0xC2,0x27, ++0xC8,0x36,0x46,0x8C, ++0x34,0x37,0x45,0x8C, ++0x03,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x30,0x1F,0xD4,0x27, ++0xCC,0x36,0x85,0x8E, ++0x21,0x20,0x00,0x02, ++0x15,0x02,0x00,0x0C, ++0x21,0x30,0x40,0x02, ++0x2A,0xB0,0x07,0x3C, ++0x0D,0x00,0xE2,0x34, ++0x04,0x00,0x43,0x24, ++0x0B,0x10,0x77,0x00, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x44,0xA0, ++0x00,0x00,0x43,0xA0, ++0x1A,0x5E,0xC4,0x96, ++0x25,0xB0,0x06,0x3C, ++0x66,0x03,0xC5,0x34, ++0x01,0x00,0x84,0x24, ++0x1A,0x5E,0xC4,0xA6, ++0x1A,0x5E,0xC2,0x96, ++0xFF,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xA4, ++0x2F,0x00,0x23,0x12, ++0x00,0x00,0x00,0x00, ++0xC8,0x36,0x62,0x8E, ++0x34,0x37,0x72,0x8E, ++0x03,0x00,0x04,0x24, ++0x00,0x00,0xA2,0xAE, ++0xCC,0x36,0x62,0xAE, ++0x00,0x00,0xB2,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x34,0x37,0x64,0x8E, ++0x38,0x37,0x63,0x8E, ++0x02,0x80,0x02,0x3C, ++0x0C,0xEA,0x42,0x24, ++0x00,0x00,0x54,0x8C, ++0x80,0x00,0x84,0x24, ++0xFF,0x00,0x62,0x24, ++0x2B,0x10,0x44,0x00, ++0x0A,0x18,0x82,0x00, ++0x34,0x37,0x63,0xAE, ++0x34,0x37,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xAE, ++0x02,0x80,0x03,0x3C, ++0xFF,0xFF,0x42,0x32, ++0x25,0x80,0x43,0x00, ++0x00,0x00,0xB0,0xAE, ++0x0C,0x00,0x02,0x92, ++0x01,0x00,0x05,0x24, ++0x00,0x00,0xA2,0xAE, ++0x02,0x00,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x92,0x00, ++0xFF,0xFF,0x84,0x30, ++0xFB,0x60,0x00,0x0C, ++0x25,0x20,0x83,0x00, ++0x0C,0x00,0x11,0x92, ++0x20,0x10,0x02,0x3C, ++0xFF,0x00,0x03,0x24, ++0x00,0x22,0x11,0x00, ++0xC2,0xFF,0x23,0x12, ++0x21,0x20,0x82,0x00, ++0xB8,0xFF,0xE0,0x16, ++0xC8,0x36,0x84,0xAE, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x4C,0x04,0x00,0x08, ++0x8C,0x36,0x51,0xA0, ++0x21,0x00,0xE0,0x12, ++0x40,0x00,0xE4,0x34, ++0x90,0x36,0x83,0x92, ++0x41,0x00,0xE4,0x34, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA4,0x8C, ++0x01,0x00,0x02,0x3C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x00,0x80,0x42,0x34, ++0x25,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0x8C,0x36,0x83,0x92, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA4,0x8C, ++0x01,0x00,0x02,0x3C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x00,0x80,0x42,0x34, ++0x25,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0xC0,0xFF,0xBD,0x27, ++0x34,0x00,0xB7,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x06,0x3C, ++0xCC,0x5E,0xC5,0x90, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0x64,0x13,0x63,0x24, ++0x10,0x00,0xA4,0x30, ++0x00,0x00,0x43,0xAC, ++0x21,0xB8,0x00,0x00, ++0x03,0x00,0x80,0x10, ++0xDF,0x00,0xA2,0x30, ++0xEF,0x00,0xA2,0x30, ++0x01,0x00,0x17,0x24, ++0xCC,0x5E,0xC2,0xA0, ++0xCC,0x5E,0xC3,0x90, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x1E,0x3C, ++0x30,0x1F,0xD3,0x27, ++0x21,0xA8,0x40,0x00, ++0x1E,0x05,0x00,0x08, ++0x02,0x80,0x16,0x3C, ++0x98,0x36,0x91,0xA2, ++0x30,0x1F,0xC2,0x27, ++0xD4,0x36,0x46,0x8C, ++0x40,0x37,0x45,0x8C, ++0x04,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x30,0x1F,0xD4,0x27, ++0xD8,0x36,0x85,0x8E, ++0x21,0x20,0x00,0x02, ++0x15,0x02,0x00,0x0C, ++0x21,0x30,0x40,0x02, ++0x2A,0xB0,0x07,0x3C, ++0x15,0x00,0xE2,0x34, ++0x04,0x00,0x43,0x24, ++0x0B,0x10,0x77,0x00, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x44,0xA0, ++0x00,0x00,0x43,0xA0, ++0x1A,0x5E,0xC4,0x96, ++0x25,0xB0,0x06,0x3C, ++0x66,0x03,0xC5,0x34, ++0x01,0x00,0x84,0x24, ++0x1A,0x5E,0xC4,0xA6, ++0x1A,0x5E,0xC2,0x96, ++0xFF,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xA4, ++0x2F,0x00,0x23,0x12, ++0x00,0x00,0x00,0x00, ++0xD4,0x36,0x62,0x8E, ++0x40,0x37,0x72,0x8E, ++0x04,0x00,0x04,0x24, ++0x00,0x00,0xA2,0xAE, ++0xD8,0x36,0x62,0xAE, ++0x00,0x00,0xB2,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x40,0x37,0x64,0x8E, ++0x44,0x37,0x63,0x8E, ++0x02,0x80,0x02,0x3C, ++0x10,0xEA,0x42,0x24, ++0x00,0x00,0x54,0x8C, ++0x80,0x00,0x84,0x24, ++0xFF,0x00,0x62,0x24, ++0x2B,0x10,0x44,0x00, ++0x0A,0x18,0x82,0x00, ++0x40,0x37,0x63,0xAE, ++0x40,0x37,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xAE, ++0x02,0x80,0x03,0x3C, ++0xFF,0xFF,0x42,0x32, ++0x25,0x80,0x43,0x00, ++0x00,0x00,0xB0,0xAE, ++0x0C,0x00,0x02,0x92, ++0x02,0x00,0x05,0x24, ++0x00,0x00,0xA2,0xAE, ++0x02,0x00,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x92,0x00, ++0xFF,0xFF,0x84,0x30, ++0xFB,0x60,0x00,0x0C, ++0x25,0x20,0x83,0x00, ++0x0C,0x00,0x11,0x92, ++0x20,0x10,0x02,0x3C, ++0xFF,0x00,0x03,0x24, ++0x00,0x22,0x11,0x00, ++0xC2,0xFF,0x23,0x12, ++0x21,0x20,0x82,0x00, ++0xB8,0xFF,0xE0,0x16, ++0xD4,0x36,0x84,0xAE, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x00,0x05,0x00,0x08, ++0x94,0x36,0x51,0xA0, ++0x20,0x00,0xE0,0x12, ++0x42,0x00,0xE4,0x34, ++0x98,0x36,0x83,0x92, ++0x43,0x00,0xE4,0x34, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x06,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0x94,0x36,0x83,0x92, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x06,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0xC0,0xFF,0xBD,0x27, ++0x34,0x00,0xB7,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x06,0x3C, ++0xCC,0x5E,0xC5,0x90, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0x2C,0x16,0x63,0x24, ++0x01,0x00,0xA4,0x30, ++0x00,0x00,0x43,0xAC, ++0x21,0xB8,0x00,0x00, ++0x03,0x00,0x80,0x10, ++0xF7,0x00,0xA2,0x30, ++0xFE,0x00,0xA2,0x30, ++0x01,0x00,0x17,0x24, ++0xCC,0x5E,0xC2,0xA0, ++0xCC,0x5E,0xC3,0x90, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x1E,0x3C, ++0x30,0x1F,0xD3,0x27, ++0x21,0xA8,0x40,0x00, ++0xCF,0x05,0x00,0x08, ++0x02,0x80,0x16,0x3C, ++0xA8,0x36,0x91,0xA2, ++0x30,0x1F,0xC2,0x27, ++0xE0,0x36,0x46,0x8C, ++0x4C,0x37,0x45,0x8C, ++0x05,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x30,0x1F,0xD4,0x27, ++0xE4,0x36,0x85,0x8E, ++0x21,0x20,0x00,0x02, ++0x15,0x02,0x00,0x0C, ++0x21,0x30,0x40,0x02, ++0x2A,0xB0,0x07,0x3C, ++0x1D,0x00,0xE2,0x34, ++0x04,0x00,0x43,0x24, ++0x0B,0x10,0x77,0x00, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x44,0xA0, ++0x00,0x00,0x43,0xA0, ++0x1A,0x5E,0xC4,0x96, ++0x25,0xB0,0x06,0x3C, ++0x66,0x03,0xC5,0x34, ++0x01,0x00,0x84,0x24, ++0x1A,0x5E,0xC4,0xA6, ++0x1A,0x5E,0xC2,0x96, ++0xFF,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xA4, ++0x2F,0x00,0x23,0x12, ++0x00,0x00,0x00,0x00, ++0xE0,0x36,0x62,0x8E, ++0x4C,0x37,0x72,0x8E, ++0x05,0x00,0x04,0x24, ++0x00,0x00,0xA2,0xAE, ++0xE4,0x36,0x62,0xAE, ++0x00,0x00,0xB2,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x4C,0x37,0x64,0x8E, ++0x50,0x37,0x63,0x8E, ++0x02,0x80,0x02,0x3C, ++0x14,0xEA,0x42,0x24, ++0x00,0x00,0x54,0x8C, ++0x80,0x00,0x84,0x24, ++0xFF,0x00,0x62,0x24, ++0x2B,0x10,0x44,0x00, ++0x0A,0x18,0x82,0x00, ++0x4C,0x37,0x63,0xAE, ++0x4C,0x37,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xAE, ++0x02,0x80,0x03,0x3C, ++0xFF,0xFF,0x42,0x32, ++0x25,0x80,0x43,0x00, ++0x00,0x00,0xB0,0xAE, ++0x0C,0x00,0x02,0x92, ++0x08,0x00,0x05,0x24, ++0x00,0x00,0xA2,0xAE, ++0x02,0x00,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x92,0x00, ++0xFF,0xFF,0x84,0x30, ++0xFB,0x60,0x00,0x0C, ++0x25,0x20,0x83,0x00, ++0x0C,0x00,0x11,0x92, ++0x20,0x10,0x02,0x3C, ++0xFF,0x00,0x03,0x24, ++0x00,0x22,0x11,0x00, ++0xC2,0xFF,0x23,0x12, ++0x21,0x20,0x82,0x00, ++0xB8,0xFF,0xE0,0x16, ++0xE0,0x36,0x84,0xAE, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0xB1,0x05,0x00,0x08, ++0x9C,0x36,0x51,0xA0, ++0x20,0x00,0xE0,0x12, ++0x44,0x00,0xE4,0x34, ++0xA8,0x36,0x83,0x92, ++0x45,0x00,0xE4,0x34, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x18,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0x9C,0x36,0x83,0x92, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x18,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0xC0,0xFF,0xBD,0x27, ++0x34,0x00,0xB7,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x06,0x3C, ++0xCC,0x5E,0xC5,0x90, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0xF0,0x18,0x63,0x24, ++0x02,0x00,0xA4,0x30, ++0x00,0x00,0x43,0xAC, ++0x21,0xB8,0x00,0x00, ++0x03,0x00,0x80,0x10, ++0xFB,0x00,0xA2,0x30, ++0xFD,0x00,0xA2,0x30, ++0x01,0x00,0x17,0x24, ++0xCC,0x5E,0xC2,0xA0, ++0xCC,0x5E,0xC3,0x90, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x1E,0x3C, ++0x30,0x1F,0xD3,0x27, ++0x21,0xA8,0x40,0x00, ++0x80,0x06,0x00,0x08, ++0x02,0x80,0x16,0x3C, ++0xA4,0x36,0x91,0xA2, ++0x30,0x1F,0xC2,0x27, ++0xEC,0x36,0x46,0x8C, ++0x58,0x37,0x45,0x8C, ++0x06,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x30,0x1F,0xD4,0x27, ++0xF0,0x36,0x85,0x8E, ++0x21,0x20,0x00,0x02, ++0x15,0x02,0x00,0x0C, ++0x21,0x30,0x40,0x02, ++0x2A,0xB0,0x07,0x3C, ++0x25,0x00,0xE2,0x34, ++0x04,0x00,0x43,0x24, ++0x0B,0x10,0x77,0x00, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x44,0xA0, ++0x00,0x00,0x43,0xA0, ++0x1A,0x5E,0xC4,0x96, ++0x25,0xB0,0x06,0x3C, ++0x66,0x03,0xC5,0x34, ++0x01,0x00,0x84,0x24, ++0x1A,0x5E,0xC4,0xA6, ++0x1A,0x5E,0xC2,0x96, ++0xFF,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xA4, ++0x2F,0x00,0x23,0x12, ++0x00,0x00,0x00,0x00, ++0xEC,0x36,0x62,0x8E, ++0x58,0x37,0x72,0x8E, ++0x06,0x00,0x04,0x24, ++0x00,0x00,0xA2,0xAE, ++0xF0,0x36,0x62,0xAE, ++0x00,0x00,0xB2,0xAE, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x58,0x37,0x64,0x8E, ++0x5C,0x37,0x63,0x8E, ++0x02,0x80,0x02,0x3C, ++0x18,0xEA,0x42,0x24, ++0x00,0x00,0x54,0x8C, ++0x80,0x00,0x84,0x24, ++0xFF,0x00,0x62,0x24, ++0x2B,0x10,0x44,0x00, ++0x0A,0x18,0x82,0x00, ++0x58,0x37,0x63,0xAE, ++0x58,0x37,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xAE, ++0x02,0x80,0x03,0x3C, ++0xFF,0xFF,0x42,0x32, ++0x25,0x80,0x43,0x00, ++0x00,0x00,0xB0,0xAE, ++0x0C,0x00,0x02,0x92, ++0x04,0x00,0x05,0x24, ++0x00,0x00,0xA2,0xAE, ++0x02,0x00,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x92,0x00, ++0xFF,0xFF,0x84,0x30, ++0xFB,0x60,0x00,0x0C, ++0x25,0x20,0x83,0x00, ++0x0C,0x00,0x11,0x92, ++0x20,0x10,0x02,0x3C, ++0xFF,0x00,0x03,0x24, ++0x00,0x22,0x11,0x00, ++0xC2,0xFF,0x23,0x12, ++0x21,0x20,0x82,0x00, ++0xB8,0xFF,0xE0,0x16, ++0xEC,0x36,0x84,0xAE, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x62,0x06,0x00,0x08, ++0xA0,0x36,0x51,0xA0, ++0x20,0x00,0xE0,0x12, ++0x46,0x00,0xE4,0x34, ++0xA4,0x36,0x83,0x92, ++0x47,0x00,0xE4,0x34, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x60,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0xA0,0x36,0x83,0x92, ++0xB0,0x03,0xC5,0x34, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xA3,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x60,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xB4,0x1B,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xD8,0x1B,0xA2,0x8C, ++0xD0,0x1B,0xA4,0x8C, ++0x00,0x08,0x03,0x3C, ++0x24,0x10,0x43,0x00, ++0x25,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0x25,0xB0,0x04,0x3C, ++0x00,0x80,0x02,0x3C, ++0xC8,0xFF,0xBD,0x27, ++0x18,0x03,0x83,0x34, ++0x10,0x1C,0x42,0x24, ++0x30,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x14,0x3C, ++0x30,0x1F,0x93,0x26, ++0xFC,0x00,0x82,0x34, ++0x00,0x00,0x45,0x8C, ++0xAC,0x1B,0x66,0x96, ++0xD8,0x37,0x63,0x96, ++0xD0,0x37,0x67,0x8E, ++0x23,0x28,0xA6,0x00, ++0x21,0x10,0xA3,0x00, ++0x23,0x88,0x47,0x00, ++0xB0,0x03,0x84,0x34, ++0x23,0x30,0x23,0x02, ++0x2B,0x10,0x71,0x00, ++0x00,0x00,0x83,0xAC, ++0x00,0x00,0x91,0xAC, ++0x0B,0x88,0xC2,0x00, ++0x21,0x20,0x20,0x02, ++0x25,0x24,0x00,0x0C, ++0xD4,0x37,0x65,0xAE, ++0x4B,0x00,0x40,0x10, ++0x21,0x90,0x40,0x00, ++0x0C,0x00,0x51,0xAC, ++0xD0,0x37,0x68,0x8E, ++0xD4,0x37,0x62,0x8E, ++0x08,0x00,0x45,0x8E, ++0x20,0xBD,0x03,0x3C, ++0x88,0x03,0x63,0x34, ++0x2B,0x10,0x48,0x00, ++0x40,0x10,0x15,0x3C, ++0x21,0x20,0x00,0x00, ++0xFF,0xFF,0x27,0x32, ++0x00,0x00,0x65,0xAC, ++0x28,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xAC,0x1B,0x66,0x96, ++0x08,0x00,0x42,0x96, ++0x40,0x10,0x05,0x3C, ++0x21,0x20,0x00,0x00, ++0x21,0x30,0x06,0x01, ++0x25,0x28,0x45,0x00, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x02,0x3C, ++0x64,0x57,0x42,0x24, ++0x30,0x1F,0x84,0x26, ++0xD4,0x37,0x83,0x8C, ++0x04,0x00,0x45,0x8C, ++0xD0,0x37,0x83,0xAC, ++0x00,0x00,0x42,0xAE, ++0x04,0x00,0x52,0xAC, ++0x00,0x00,0xB2,0xAC, ++0x04,0x00,0x45,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0x85,0x26, ++0xD8,0x1B,0xA2,0x8C, ++0xD0,0x1B,0xA3,0x8C, ++0x30,0x00,0xBF,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x04,0x00,0x42,0x30, ++0x25,0x18,0x62,0x00, ++0x41,0xB0,0x04,0x3C, ++0x38,0x00,0xBD,0x27, ++0x00,0x00,0x83,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA3,0xAC, ++0xD8,0x37,0x70,0x8E, ++0x08,0x00,0x45,0x96, ++0xAC,0x1B,0x66,0x96, ++0x23,0x80,0x08,0x02, ++0xFF,0xFF,0x10,0x32, ++0x21,0x30,0x06,0x01, ++0x25,0x28,0xB5,0x00, ++0x21,0x38,0x00,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x08,0x00,0x45,0x96, ++0xAC,0x1B,0x62,0x96, ++0x23,0x38,0x30,0x02, ++0x25,0x28,0xB5,0x00, ++0x21,0x10,0x06,0x3C, ++0x21,0x28,0xB0,0x00, ++0x21,0x30,0x46,0x00, ++0xFF,0xFF,0xE7,0x30, ++0x3C,0x07,0x00,0x08, ++0x21,0x20,0x00,0x00, ++0x00,0x60,0x02,0x40, ++0x01,0x00,0x41,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x04,0x3C, ++0xD0,0x5E,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x63,0x34, ++0xD0,0x5E,0x83,0xAC, ++0x00,0x60,0x82,0x40, ++0x48,0x07,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x04,0x3C, ++0x00,0x80,0x02,0x3C, ++0xC0,0xFF,0xBD,0x27, ++0x18,0x03,0x83,0x34, ++0xFC,0x1D,0x42,0x24, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x34,0x00,0xB7,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x1E,0x3C, ++0x02,0x80,0x02,0x3C, ++0x2A,0xB0,0x03,0x3C, ++0xB0,0x03,0x96,0x34, ++0x80,0xD5,0x57,0x24, ++0x2C,0x00,0x73,0x34, ++0x30,0x1F,0xD1,0x27, ++0x02,0x80,0x15,0x3C, ++0xD1,0x07,0x00,0x08, ++0x02,0x80,0x14,0x3C, ++0x54,0xF3,0x90,0xAE, ++0x02,0x80,0x04,0x3C, ++0x03,0x00,0xC3,0x90, ++0x7C,0xD5,0x82,0x90, ++0x7F,0x00,0x63,0x30, ++0xFF,0x00,0x42,0x30, ++0x6B,0x00,0x62,0x10, ++0x08,0x00,0x10,0x26, ++0x02,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x37,0x00,0x42,0x28, ++0x5E,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0xC5,0x90, ++0x03,0x00,0xC3,0x90, ++0xFF,0x00,0xA5,0x30, ++0x7F,0x00,0x63,0x30, ++0x7C,0xD5,0x83,0xA0, ++0x02,0x00,0xC2,0x90, ++0x0E,0x00,0xA5,0x38, ++0x0A,0x80,0xE5,0x00, ++0xFF,0x00,0x42,0x30, ++0xC0,0x10,0x02,0x00, ++0x21,0x10,0x57,0x00, ++0x04,0x00,0x43,0x8C, ++0x02,0x80,0x04,0x3C, ++0x8C,0xD7,0x84,0x24, ++0x4C,0xF3,0xA3,0xAE, ++0x02,0x00,0xC5,0x90, ++0x2F,0x55,0x00,0x0C, ++0xFF,0x00,0xA5,0x30, ++0x4C,0xF3,0xA2,0x8E, ++0x00,0x00,0x00,0x00, ++0x09,0xF8,0x40,0x00, ++0x21,0x20,0x00,0x02, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0x03,0x24, ++0x01,0x00,0x62,0xA2, ++0x01,0x00,0x63,0xA2, ++0x2B,0x00,0x40,0x12, ++0x00,0x00,0x00,0x00, ++0xB8,0x36,0x22,0x92, ++0x20,0x10,0x03,0x3C, ++0x88,0x37,0x25,0x8E, ++0x00,0x12,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x21,0x30,0x40,0x00, ++0x0A,0x00,0x04,0x24, ++0x00,0x01,0x07,0x24, ++0x1C,0x37,0x22,0xAE, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x88,0x37,0x30,0x8E, ++0xB0,0x01,0x00,0x0C, ++0x0A,0x00,0x04,0x24, ++0xFF,0xFF,0x10,0x32, ++0x02,0x80,0x02,0x3C, ++0x25,0x80,0x02,0x02, ++0x0C,0x00,0x04,0x92, ++0xFF,0x00,0x02,0x24, ++0x21,0x38,0x00,0x02, ++0xFF,0x00,0x83,0x30, ++0x20,0x00,0x10,0x26, ++0x04,0x00,0x62,0x10, ++0x21,0x90,0x00,0x00, ++0xB8,0x36,0x24,0xA2, ++0x01,0x00,0x12,0x24, ++0x00,0x00,0xC3,0xAE, ++0x04,0x00,0xE2,0x8C, ++0x13,0x00,0x03,0x24, ++0x02,0x12,0x02,0x00, ++0x1F,0x00,0x45,0x30, ++0xB6,0xFF,0xA3,0x10, ++0x21,0x30,0x00,0x02, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x38,0xD7,0x84,0x24, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0x03,0x24, ++0x01,0x00,0x62,0xA2, ++0x01,0x00,0x63,0xA2, ++0xD7,0xFF,0x40,0x16, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA2,0x8C, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x00,0x04,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x41,0xB0,0x04,0x3C, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA2,0xAC, ++0x02,0x00,0xC5,0x90, ++0x02,0x80,0x04,0x3C, ++0x78,0xD7,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0xFF,0x00,0xA5,0x30, ++0xEB,0x07,0x00,0x08, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0xC5,0x90, ++0x02,0x00,0xC6,0x90, ++0x7C,0xD5,0x87,0x90, ++0x02,0x80,0x04,0x3C, ++0x48,0xD7,0x84,0x24, ++0xFF,0x00,0xA5,0x30, ++0xFF,0x00,0xC6,0x30, ++0x2F,0x55,0x00,0x0C, ++0xFF,0x00,0xE7,0x30, ++0xC1,0x07,0x00,0x08, ++0x01,0x00,0x02,0x24, ++0xC8,0xFF,0xBD,0x27, ++0xFF,0xFF,0xA8,0x30, ++0x02,0x80,0x02,0x3C, ++0x25,0x40,0x02,0x01, ++0x30,0x00,0xB6,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x00,0x00,0x03,0x8D, ++0xFF,0xFF,0xD2,0x30, ++0x21,0xB0,0xA0,0x00, ++0x00,0xC0,0x02,0x24, ++0x08,0x00,0x45,0x26, ++0x04,0x00,0x06,0x8D, ++0x24,0x18,0x62,0x00, ++0xFF,0x3F,0xA5,0x30, ++0xF0,0xFF,0x02,0x3C, ++0x25,0x18,0x65,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x00,0x80,0x05,0x3C, ++0x25,0x18,0x65,0x00, ++0xFF,0x01,0xC6,0x34, ++0x00,0x00,0x03,0xAD, ++0x04,0x00,0x06,0xAD, ++0x21,0x48,0x80,0x00, ++0xFF,0xFF,0xE7,0x30, ++0x18,0x00,0x12,0xA5, ++0x1A,0x00,0x07,0xA1, ++0x18,0x00,0x03,0x8D, ++0xFF,0x7F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x02,0x80,0x15,0x3C, ++0x18,0x00,0x03,0xAD, ++0x30,0x1F,0xA5,0x26, ++0x7A,0x36,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x62,0x24, ++0x7A,0x36,0xA2,0xA0, ++0x18,0x00,0x04,0x8D, ++0xFF,0x80,0x02,0x3C, ++0x20,0x00,0x45,0x26, ++0xFF,0xFF,0x42,0x34, ++0x7F,0x00,0x63,0x30, ++0xFF,0xFF,0xB2,0x30, ++0x24,0x20,0x82,0x00, ++0x00,0x1E,0x03,0x00, ++0x25,0xB0,0x02,0x3C, ++0xC0,0x00,0x42,0x34, ++0x25,0x20,0x83,0x00, ++0x07,0x00,0x45,0x32, ++0x18,0x00,0x04,0xAD, ++0x00,0x00,0x52,0xA4, ++0x03,0x00,0xA0,0x10, ++0xFF,0xFF,0x42,0x32, ++0x08,0x00,0x42,0x26, ++0xFF,0xFF,0x42,0x30, ++0x30,0x1F,0xB4,0x26, ++0xF8,0x37,0x86,0x8E, ++0xFC,0x37,0x90,0x8E, ++0xF8,0xFF,0x52,0x30, ++0x21,0x10,0xD2,0x00, ++0x2B,0x10,0x02,0x02, ++0x31,0x00,0x40,0x10, ++0xFF,0x00,0x33,0x31, ++0x23,0x80,0x06,0x02, ++0x21,0x28,0xC0,0x02, ++0xFF,0xFF,0x07,0x32, ++0x01,0x00,0x11,0x24, ++0x21,0x20,0x60,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB1,0xAF, ++0x23,0x18,0x50,0x02, ++0xFF,0xFF,0x72,0x30, ++0x22,0x10,0x02,0x3C, ++0x21,0x10,0x42,0x02, ++0x21,0x20,0x60,0x02, ++0xB0,0x01,0x00,0x0C, ++0xF8,0x37,0x82,0xAE, ++0x21,0x28,0xD0,0x02, ++0x21,0x38,0x40,0x02, ++0x21,0x20,0x60,0x02, ++0x10,0x00,0xB1,0xAF, ++0x22,0x10,0x06,0x3C, ++0x73,0x01,0x00,0x0C, ++0x30,0x1F,0xB1,0x26, ++0xF8,0x37,0x23,0x8E, ++0x25,0xB0,0x10,0x3C, ++0xB0,0x03,0x02,0x36, ++0x21,0x20,0x60,0x02, ++0x00,0x00,0x43,0xAC, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF8,0x37,0x25,0x8E, ++0xEC,0x00,0x02,0x36, ++0xBD,0x00,0x04,0x36, ++0x00,0x00,0x45,0xAC, ++0x00,0x00,0x83,0x90, ++0xC2,0x00,0x10,0x36, ++0x34,0x00,0xBF,0x8F, ++0x10,0x00,0x63,0x34, ++0x00,0x00,0x83,0xA0, ++0x30,0x00,0xB6,0x8F, ++0x00,0x00,0x05,0xA6, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x21,0x28,0xC0,0x02, ++0x21,0x20,0x60,0x02, ++0x21,0x38,0x40,0x02, ++0x01,0x00,0x02,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0xF8,0x37,0x83,0x8E, ++0x30,0x1F,0xB1,0x26, ++0x25,0xB0,0x10,0x3C, ++0x21,0x18,0x72,0x00, ++0xF8,0x37,0x83,0xAE, ++0xF8,0x37,0x23,0x8E, ++0xB0,0x03,0x02,0x36, ++0x21,0x20,0x60,0x02, ++0x00,0x00,0x43,0xAC, ++0xB0,0x01,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF8,0x37,0x25,0x8E, ++0xEC,0x00,0x02,0x36, ++0xBD,0x00,0x04,0x36, ++0x00,0x00,0x45,0xAC, ++0x00,0x00,0x83,0x90, ++0xC2,0x00,0x10,0x36, ++0x34,0x00,0xBF,0x8F, ++0x10,0x00,0x63,0x34, ++0x00,0x00,0x83,0xA0, ++0x30,0x00,0xB6,0x8F, ++0x00,0x00,0x05,0xA6, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x18,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x21,0x80,0x80,0x00, ++0x00,0x60,0x14,0x40, ++0x01,0x00,0x81,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x14,0x00,0x83,0x8C, ++0x02,0x80,0x15,0x3C, ++0x16,0x00,0x02,0x24, ++0x30,0x1F,0xB3,0x26, ++0x21,0x28,0x00,0x00, ++0x1D,0x00,0x62,0x10, ++0x08,0x00,0x06,0x24, ++0x08,0x00,0x82,0x94, ++0x02,0x80,0x04,0x3C, ++0x08,0x52,0x00,0x0C, ++0x25,0x20,0x44,0x00, ++0x08,0x00,0x05,0x8E, ++0x0C,0x00,0x06,0x96, ++0x14,0x00,0x07,0x96, ++0x19,0x08,0x00,0x0C, ++0x09,0x00,0x04,0x24, ++0x04,0x00,0x02,0x8E, ++0x00,0x00,0x03,0x8E, ++0x21,0x20,0x00,0x02, ++0x00,0x00,0x43,0xAC, ++0x04,0x00,0x62,0xAC, ++0x00,0x00,0x10,0xAE, ++0x3D,0x24,0x00,0x0C, ++0x04,0x00,0x10,0xAE, ++0x00,0x60,0x94,0x40, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0xF8,0x37,0x68,0x8E, ++0x0C,0x00,0x11,0x8E, ++0xFC,0x37,0x62,0x8E, ++0x25,0xB0,0x03,0x3C, ++0x21,0x28,0x11,0x01, ++0xC0,0x00,0x63,0x34, ++0x23,0x90,0x48,0x00, ++0x2B,0x10,0x45,0x00, ++0x01,0x00,0x16,0x24, ++0x09,0x00,0x04,0x24, ++0xFF,0xFF,0x27,0x32, ++0x21,0x30,0x00,0x01, ++0x00,0x00,0x71,0xA4, ++0x33,0x00,0x40,0x10, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0x05,0x8E, ++0xFF,0xFF,0x47,0x32, ++0x23,0x88,0x32,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB6,0xAF, ++0x22,0x10,0x03,0x3C, ++0x21,0x18,0x23,0x02, ++0x09,0x00,0x04,0x24, ++0xB0,0x01,0x00,0x0C, ++0xF8,0x37,0x63,0xAE, ++0x08,0x00,0x05,0x8E, ++0xFF,0xFF,0x27,0x32, ++0x09,0x00,0x04,0x24, ++0x21,0x28,0xB2,0x00, ++0x22,0x10,0x06,0x3C, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB6,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x09,0x00,0x04,0x24, ++0x30,0x1F,0xA2,0x26, ++0xF8,0x37,0x46,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xEC,0x00,0x64,0x34, ++0x00,0x00,0x86,0xAC, ++0xBD,0x00,0x65,0x34, ++0x00,0x00,0xA2,0x90, ++0xC2,0x00,0x63,0x34, ++0x21,0x20,0x00,0x02, ++0x10,0x00,0x42,0x34, ++0x00,0x00,0xA2,0xA0, ++0x00,0x00,0x66,0xA4, ++0x04,0x00,0x02,0x8E, ++0x00,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x43,0xAC, ++0x04,0x00,0x62,0xAC, ++0x00,0x00,0x10,0xAE, ++0x3D,0x24,0x00,0x0C, ++0x04,0x00,0x10,0xAE, ++0x00,0x60,0x94,0x40, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x08,0x00,0x05,0x8E, ++0x21,0x30,0x00,0x01, ++0x09,0x00,0x04,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0xF8,0x37,0x63,0x8E, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x71,0x00, ++0x05,0x09,0x00,0x08, ++0xF8,0x37,0x63,0xAE, ++0xE8,0xFF,0xBD,0x27, ++0x14,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x28,0x80,0x00, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x02,0x3C, ++0xBF,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x63,0x2C, ++0x05,0x00,0x60,0x10, ++0x02,0x80,0x06,0x3C, ++0x6C,0x57,0xC3,0x8C, ++0x6C,0x57,0xC2,0x24, ++0x0C,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x6C,0x57,0xC2,0x24, ++0x04,0x00,0x43,0x8C, ++0x00,0x00,0xA2,0xAC, ++0x04,0x00,0x45,0xAC, ++0x00,0x00,0x65,0xAC, ++0x04,0x00,0xA3,0xAC, ++0x00,0x60,0x90,0x40, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xB4,0x08,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x90,0x40, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x98,0xD7,0x84,0x24, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x2F,0x55,0x00,0x0C, ++0x14,0x00,0xB1,0xAF, ++0x00,0x00,0x04,0x96, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x83,0x24, ++0x07,0x00,0x62,0x30, ++0x49,0x00,0x40,0x10, ++0xC2,0x10,0x03,0x00, ++0x28,0x00,0x82,0x24, ++0xC2,0x10,0x02,0x00, ++0x25,0x24,0x00,0x0C, ++0xC0,0x20,0x02,0x00, ++0x47,0x00,0x40,0x10, ++0x21,0x88,0x40,0x00, ++0x02,0x80,0x12,0x3C, ++0x30,0x1F,0x50,0x26, ++0x1C,0x37,0x05,0x8E, ++0x0A,0x00,0x04,0x24, ++0x28,0x00,0x06,0x24, ++0xC7,0x01,0x00,0x0C, ++0x21,0x38,0x40,0x00, ++0xB0,0x1B,0x03,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x62,0x30, ++0x47,0x00,0x40,0x14, ++0x01,0x00,0x62,0x30, ++0x02,0x80,0x02,0x3C, ++0xEA,0x5D,0x48,0x90, ++0x25,0xB0,0x04,0x3C, ++0x2F,0x00,0x02,0x3C, ++0xD0,0x01,0x85,0x34, ++0x17,0x32,0x42,0x34, ++0x00,0x00,0xA2,0xAC, ++0x5E,0x00,0x03,0x3C, ++0x10,0x00,0x02,0x3C, ++0xDC,0x01,0x87,0x34, ++0xD4,0x01,0x86,0x34, ++0x17,0x43,0x63,0x34, ++0x20,0x53,0x42,0x34, ++0xD8,0x01,0x84,0x34, ++0x00,0x00,0xC3,0xAC, ++0x30,0x1F,0x49,0x26, ++0x00,0x00,0x82,0xAC, ++0x44,0xA4,0x03,0x34, ++0x01,0x00,0x02,0x24, ++0x00,0x00,0xE3,0xAC, ++0xEC,0x38,0x20,0xAD, ++0x08,0x39,0x20,0xAD, ++0x50,0x3E,0x20,0xAD, ++0x10,0x3E,0x20,0xAD, ++0x51,0x00,0x02,0x11, ++0x1A,0x3E,0x20,0xA1, ++0x10,0x23,0x22,0x8D, ++0xFF,0xF7,0x03,0x24, ++0xFF,0xEF,0x04,0x24, ++0x24,0x10,0x43,0x00, ++0x24,0x10,0x44,0x00, ++0x10,0x23,0x22,0xAD, ++0xB0,0x01,0x00,0x0C, ++0x0A,0x00,0x04,0x24, ++0x08,0x00,0x22,0x96, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x04,0x3C, ++0x25,0x28,0x45,0x00, ++0xDC,0x01,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0x84,0x58,0x84,0x24, ++0x3D,0x24,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x30,0x1F,0x43,0x26, ++0x9C,0x39,0x62,0x8C, ++0xD1,0x11,0x00,0x0C, ++0x30,0x3B,0x62,0xA0, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x25,0x24,0x00,0x0C, ++0xC0,0x20,0x02,0x00, ++0xBB,0xFF,0x40,0x14, ++0x21,0x88,0x40,0x00, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0xA8,0xD7,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x1C,0xEA,0xA5,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x32,0x00,0x40,0x14, ++0x02,0x80,0x04,0x3C, ++0xA3,0x51,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0x02,0x96, ++0x25,0xB0,0x03,0x3C, ++0x4C,0x00,0x63,0x34, ++0xFF,0xFE,0x42,0x30, ++0xB0,0x1B,0x02,0xA6, ++0x00,0x00,0x60,0xA0, ++0x02,0x80,0x02,0x3C, ++0xEA,0x5D,0x48,0x90, ++0x25,0xB0,0x04,0x3C, ++0x2F,0x00,0x02,0x3C, ++0xD0,0x01,0x85,0x34, ++0x17,0x32,0x42,0x34, ++0x00,0x00,0xA2,0xAC, ++0x5E,0x00,0x03,0x3C, ++0x10,0x00,0x02,0x3C, ++0xDC,0x01,0x87,0x34, ++0xD4,0x01,0x86,0x34, ++0x17,0x43,0x63,0x34, ++0x20,0x53,0x42,0x34, ++0xD8,0x01,0x84,0x34, ++0x00,0x00,0xC3,0xAC, ++0x30,0x1F,0x49,0x26, ++0x00,0x00,0x82,0xAC, ++0x44,0xA4,0x03,0x34, ++0x01,0x00,0x02,0x24, ++0x00,0x00,0xE3,0xAC, ++0xEC,0x38,0x20,0xAD, ++0x08,0x39,0x20,0xAD, ++0x50,0x3E,0x20,0xAD, ++0x10,0x3E,0x20,0xAD, ++0xB1,0xFF,0x02,0x15, ++0x1A,0x3E,0x20,0xA1, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x44,0x90, ++0x02,0x00,0x03,0x24, ++0x06,0x00,0x83,0x10, ++0xFF,0xF7,0x03,0x24, ++0x10,0x23,0x22,0x8D, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x43,0x00, ++0x95,0x09,0x00,0x08, ++0x00,0x10,0x42,0x34, ++0x10,0x23,0x22,0x8D, ++0xFF,0xEF,0x03,0x24, ++0x00,0x08,0x42,0x34, ++0x95,0x09,0x00,0x08, ++0x24,0x10,0x43,0x00, ++0x88,0x58,0x84,0x24, ++0x6C,0x4C,0x00,0x0C, ++0x03,0x00,0x05,0x24, ++0xBE,0x09,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x02,0x80,0x12,0x3C, ++0x1C,0x00,0xB3,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x43,0x26, ++0xB0,0x1B,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x42,0x30, ++0x76,0x00,0x40,0x14, ++0x21,0x98,0x80,0x00, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x14,0x3C, ++0xF6,0x5E,0x82,0x92, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x74,0x00,0x40,0x14, ++0x04,0x00,0x04,0x24, ++0x00,0x60,0x90,0x40, ++0x30,0x1F,0x42,0x8E, ++0xFF,0xF0,0x03,0x24, ++0x0F,0xFF,0x04,0x24, ++0x24,0x10,0x43,0x00, ++0x24,0x10,0x44,0x00, ++0x25,0xB0,0x05,0x3C, ++0xF0,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x64,0x03,0xA4,0x34, ++0x17,0x00,0x03,0x24, ++0x00,0x00,0x80,0xA0, ++0x50,0x0C,0xA3,0xA0, ++0x30,0x1F,0x42,0xAE, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x25,0xB0,0x02,0x3C, ++0x17,0x00,0x03,0x24, ++0x58,0x0C,0x43,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x51,0x26, ++0xB0,0x1B,0x22,0x96, ++0x02,0x80,0x04,0x3C, ++0xB4,0xD7,0x84,0x24, ++0x00,0x10,0x42,0x34, ++0x2F,0x55,0x00,0x0C, ++0xB0,0x1B,0x22,0xA6, ++0x01,0x00,0x02,0x24, ++0x25,0xB0,0x03,0x3C, ++0x6C,0x3B,0x22,0xAE, ++0x4C,0x00,0x63,0x34, ++0x08,0x00,0x66,0x8E, ++0x00,0x00,0x67,0x90, ++0xB0,0x1B,0x22,0x96, ++0x30,0x3B,0x28,0x92, ++0x31,0x3B,0x29,0x92, ++0x8F,0x3E,0x2A,0x92, ++0x38,0x3B,0x2B,0x92, ++0x67,0x3B,0x2C,0x92, ++0x74,0x3B,0x26,0xAE, ++0x00,0x80,0x42,0x30, ++0xA1,0x3B,0x27,0xA2, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0x60,0xA0, ++0x21,0x28,0x00,0x00, ++0x99,0x3B,0x28,0xA2, ++0x9A,0x3B,0x29,0xA2, ++0x9E,0x3B,0x22,0xA6, ++0xA0,0x3B,0x2A,0xA2, ++0x30,0x3B,0x2B,0xA2, ++0x31,0x3B,0x2C,0xA2, ++0xA4,0x3B,0x20,0xAE, ++0xA8,0x3B,0x20,0xAE, ++0x9C,0x3B,0x20,0xA2, ++0x12,0x0D,0x00,0x0C, ++0x9B,0x3B,0x20,0xA2, ++0x08,0x00,0x66,0x8E, ++0x00,0x00,0x00,0x00, ++0x33,0x00,0xC0,0x14, ++0x0C,0x00,0x70,0x26, ++0x00,0x00,0x62,0x8E, ++0x21,0x20,0x20,0x02, ++0xAC,0x3B,0x23,0x26, ++0x70,0x3B,0x22,0xAE, ++0x3F,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0x00,0x00,0x60,0xA0, ++0xFD,0xFF,0x41,0x04, ++0x07,0x00,0x63,0x24, ++0xB0,0x1B,0x83,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x62,0x30, ++0x09,0x00,0x40,0x10, ++0x30,0x1F,0x50,0x26, ++0x01,0x00,0x62,0x30, ++0x06,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x82,0x92, ++0x0C,0x00,0x03,0x24, ++0x0F,0x00,0x42,0x30, ++0x2C,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x30,0x3B,0x04,0x92, ++0x4F,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x04,0x3C, ++0x48,0x00,0x84,0x34, ++0x00,0x00,0x83,0x8C, ++0x70,0x3B,0x05,0x8E, ++0x7B,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x01,0x00,0x02,0x24, ++0x00,0x00,0x83,0xAC, ++0x19,0x00,0xA2,0x10, ++0x3C,0x00,0x02,0x24, ++0x98,0x38,0x02,0xAE, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x0F,0x0A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x21,0x28,0x00,0x02, ++0x10,0x52,0x00,0x0C, ++0xA8,0x5A,0x84,0x24, ++0x02,0x80,0x04,0x3C, ++0xC4,0xD7,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x21,0x28,0x00,0x02, ++0x54,0x0A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x13,0x0F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x3C,0x00,0x02,0x24, ++0x79,0x0A,0x00,0x08, ++0x98,0x38,0x02,0xAE, ++0xCD,0x4E,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x6A,0x0A,0x00,0x08, ++0x30,0x1F,0x50,0x26, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x21,0x80,0x80,0x00, ++0x00,0x00,0x02,0x92, ++0x02,0x80,0x04,0x3C, ++0x21,0x28,0x40,0x00, ++0x03,0x00,0x42,0x2C, ++0x06,0x00,0x40,0x14, ++0xD0,0xD7,0x84,0x24, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x03,0x92, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x02,0x80,0x02,0x3C, ++0xA8,0x5C,0x43,0xAC, ++0x18,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xD0,0xFF,0xBD,0x27, ++0x18,0x03,0x42,0x34, ++0xC8,0x2A,0x63,0x24, ++0x24,0x00,0xB3,0xAF, ++0x28,0x00,0xBF,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x00,0x00,0x43,0xAC, ++0x02,0x80,0x04,0x3C, ++0xF4,0x5E,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x12,0x00,0x40,0x10, ++0x02,0x80,0x13,0x3C, ++0x02,0x80,0x02,0x3C, ++0x0D,0x5F,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x66,0x00,0x60,0x14, ++0x01,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x16,0x5F,0x44,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x01,0x00,0x05,0x24, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0x02,0x80,0x02,0x3C, ++0x74,0x57,0x43,0x8C, ++0x74,0x57,0x42,0x24, ++0xA7,0x00,0x62,0x10, ++0x02,0x80,0x13,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2A,0xB0,0x02,0x3C, ++0x36,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x30,0x1F,0x66,0x26, ++0x00,0x38,0xC5,0x8C, ++0xC0,0x18,0x03,0x00, ++0x23,0xB0,0x04,0x3C, ++0xF0,0x07,0x63,0x30, ++0xFF,0x1F,0x02,0x3C, ++0x21,0x18,0x64,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x62,0x00, ++0x23,0x88,0x85,0x00, ++0x00,0x04,0x22,0x26, ++0x2B,0x28,0x85,0x00, ++0xA4,0x37,0xC3,0x8C, ++0x0B,0x88,0x45,0x00, ++0xE1,0x01,0x22,0x2E, ++0xA0,0x37,0xC3,0xAC, ++0x04,0x38,0xC4,0xAC, ++0xAA,0x37,0xC0,0xA4, ++0x14,0x00,0x40,0x14, ++0xA9,0x37,0xC0,0xA0, ++0x20,0xFE,0x82,0x24, ++0x20,0x02,0x83,0x24, ++0x0A,0x18,0x45,0x00, ++0x23,0x10,0x02,0x3C, ++0xFF,0x03,0x42,0x34, ++0x2B,0x10,0x43,0x00, ++0x21,0x28,0x60,0x00, ++0x34,0x00,0x40,0x14, ++0x00,0x38,0xC3,0xAC, ++0x04,0x38,0xC2,0x8C, ++0x00,0x00,0x00,0x00, ++0x2B,0x18,0x45,0x00, ++0x23,0x88,0x45,0x00, ++0x03,0x00,0x60,0x10, ++0xE1,0x01,0x22,0x2E, ++0x00,0x04,0x31,0x26, ++0xE1,0x01,0x22,0x2E, ++0x0E,0x00,0x40,0x10, ++0x30,0x1F,0x70,0x26, ++0x30,0x1F,0x70,0x26, ++0x04,0x38,0x03,0x8E, ++0x00,0x38,0x04,0x8E, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x83,0x00, ++0x2E,0x00,0x40,0x14, ++0x2B,0x10,0x64,0x00, ++0x5A,0x00,0x40,0x14, ++0x25,0xB0,0x02,0x3C, ++0x80,0x00,0x03,0x24, ++0xD0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x30,0x1F,0x70,0x26, ++0x00,0x38,0x03,0x96, ++0x2A,0xB0,0x02,0x3C, ++0x35,0x00,0x42,0x34, ++0xC2,0x88,0x03,0x00, ++0x00,0x00,0x51,0xA0, ++0x5D,0x27,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xAA,0x37,0x03,0x96, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xD0,0x1B,0x02,0x8E, ++0x80,0x00,0x03,0x3C, ++0x41,0xB0,0x04,0x3C, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0x82,0xAC, ++0x28,0x00,0xBF,0x8F, ++0xD0,0x1B,0x02,0xAE, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x00,0xFC,0xA5,0x24, ++0xF6,0x0A,0x00,0x08, ++0x00,0x38,0xC5,0xAC, ++0x17,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x9F,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x0D,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xCF,0x0A,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0xA0,0x37,0x05,0x8E, ++0x21,0x30,0x80,0x00, ++0xFF,0xFF,0x27,0x32, ++0x09,0x00,0x04,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xA0,0x37,0x03,0x8E, ++0xAA,0x37,0x05,0x96, ++0x00,0x38,0x02,0x8E, ++0x21,0x18,0x71,0x00, ++0x21,0x28,0x25,0x02, ++0x21,0x10,0x51,0x00, ++0x09,0x00,0x04,0x24, ++0x00,0x38,0x02,0xAE, ++0xA0,0x37,0x03,0xAE, ++0xB0,0x01,0x00,0x0C, ++0xAA,0x37,0x05,0xA6, ++0x30,0x1F,0x70,0x26, ++0x00,0x38,0x03,0x96, ++0x2A,0xB0,0x02,0x3C, ++0x35,0x00,0x42,0x34, ++0xC2,0x88,0x03,0x00, ++0x00,0x00,0x51,0xA0, ++0x5D,0x27,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xAA,0x37,0x03,0x96, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xD0,0x1B,0x02,0x8E, ++0x80,0x00,0x03,0x3C, ++0x41,0xB0,0x04,0x3C, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0x82,0xAC, ++0x28,0x00,0xBF,0x8F, ++0xD0,0x1B,0x02,0xAE, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x08,0x38,0x02,0x8E, ++0xA0,0x37,0x05,0x8E, ++0x21,0x30,0x80,0x00, ++0x23,0x88,0x44,0x00, ++0xFF,0xFF,0x27,0x32, ++0x09,0x00,0x04,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xA0,0x37,0x03,0x8E, ++0xAA,0x37,0x02,0x96, ++0x04,0x38,0x12,0x96, ++0x21,0x18,0x71,0x00, ++0x21,0x10,0x22,0x02, ++0x23,0x10,0x11,0x3C, ++0xA0,0x37,0x03,0xAE, ++0xAA,0x37,0x02,0xA6, ++0x15,0x00,0x40,0x16, ++0x00,0x38,0x11,0xAE, ++0x09,0x00,0x04,0x24, ++0xB0,0x01,0x00,0x0C, ++0x30,0x1F,0x70,0x26, ++0x46,0x0B,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x17,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x57,0xFF,0x40,0x10, ++0x30,0x1F,0x63,0x26, ++0x2A,0x1C,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x53,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x50,0x39,0x64,0x94, ++0x2A,0x1C,0x60,0xA0, ++0x00,0xC0,0x84,0x24, ++0xC2,0x34,0x00,0x0C, ++0xFF,0xFF,0x84,0x30, ++0xD3,0x0A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xB0,0x01,0x00,0x0C, ++0x09,0x00,0x04,0x24, ++0xA0,0x37,0x05,0x8E, ++0x09,0x00,0x04,0x24, ++0x23,0x10,0x06,0x3C, ++0x21,0x38,0x40,0x02, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xA0,0x37,0x03,0x8E, ++0xAA,0x37,0x02,0x96, ++0x21,0x20,0x51,0x02, ++0x21,0x18,0x72,0x00, ++0x21,0x10,0x42,0x02, ++0x00,0x38,0x04,0xAE, ++0x09,0x00,0x04,0x24, ++0xA0,0x37,0x03,0xAE, ++0x75,0x0B,0x00,0x08, ++0xAA,0x37,0x02,0xA6, ++0xFF,0x00,0x86,0x30, ++0x02,0x80,0x02,0x3C, ++0x40,0x00,0xC3,0x2C, ++0x4A,0xF3,0x47,0x90, ++0x00,0x00,0x63,0x38, ++0x3F,0x00,0x02,0x24, ++0x0A,0x30,0x43,0x00, ++0x01,0x00,0x02,0x24, ++0x08,0x0E,0x04,0x24, ++0x00,0x7F,0x05,0x24, ++0x03,0x00,0xE2,0x10, ++0x31,0x00,0xC3,0x2C, ++0xA9,0x45,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x30,0x00,0x02,0x24, ++0xA9,0x45,0x00,0x08, ++0x0A,0x30,0x43,0x00, ++0xC0,0xFF,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x38,0x00,0xB4,0xAF, ++0x34,0x00,0xB3,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x2C,0x00,0xB1,0xAF, ++0x28,0x00,0xB0,0xAF, ++0x28,0xEA,0x62,0x24, ++0x3C,0x00,0xBF,0xAF, ++0x0A,0x00,0x4A,0x94, ++0x02,0x00,0x48,0x94, ++0x06,0x00,0x49,0x94, ++0xFF,0x00,0x84,0x30, ++0xFF,0x00,0xA5,0x30, ++0x28,0xEA,0x6B,0x94, ++0x04,0x00,0x4C,0x94, ++0x08,0x00,0x4D,0x94, ++0x00,0x1C,0x05,0x00, ++0x00,0x14,0x04,0x00, ++0x00,0x3E,0x05,0x00, ++0x00,0x36,0x04,0x00, ++0x25,0x38,0xE3,0x00, ++0x25,0x30,0xC2,0x00, ++0x00,0x44,0x08,0x00, ++0x00,0x12,0x05,0x00, ++0x00,0x4C,0x09,0x00, ++0x00,0x54,0x0A,0x00, ++0x00,0x1A,0x04,0x00, ++0x25,0x38,0xE2,0x00, ++0x25,0x40,0x0B,0x01, ++0x25,0x48,0x2C,0x01, ++0x25,0x50,0x4D,0x01, ++0x25,0x30,0xC3,0x00, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xA8,0xAF, ++0x14,0x00,0xA9,0xAF, ++0x18,0x00,0xAA,0xAF, ++0x25,0x98,0xE5,0x00, ++0x25,0x90,0xC4,0x00, ++0x30,0x1F,0x54,0x24, ++0x21,0x80,0x00,0x00, ++0x10,0x00,0xB1,0x27, ++0x02,0x00,0x02,0x2E, ++0x32,0x00,0x40,0x10, ++0x80,0x10,0x10,0x00, ++0x21,0x10,0x54,0x00, ++0xF0,0x1C,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x21,0x40,0x73,0x00, ++0x21,0x38,0x00,0x00, ++0x7F,0x00,0x09,0x24, ++0xC0,0x20,0x07,0x00, ++0x04,0x10,0x89,0x00, ++0x24,0x10,0x48,0x00, ++0x06,0x10,0x82,0x00, ++0x01,0x00,0xE5,0x24, ++0xFF,0x00,0x43,0x30, ++0x21,0x30,0x27,0x02, ++0x40,0x00,0x63,0x2C, ++0xFF,0x00,0xA7,0x30, ++0x02,0x00,0x60,0x14, ++0x04,0x00,0xE4,0x2C, ++0x3F,0x00,0x02,0x24, ++0xF3,0xFF,0x80,0x14, ++0x10,0x00,0xC2,0xA0, ++0x23,0x00,0xA6,0x93, ++0x22,0x00,0xA2,0x93, ++0x21,0x00,0xA5,0x93, ++0x40,0x18,0x10,0x00, ++0x00,0x14,0x02,0x00, ++0x21,0x18,0x71,0x00, ++0x20,0x00,0xA7,0x93, ++0x00,0x36,0x06,0x00, ++0x25,0x30,0xC2,0x00, ++0x00,0x2A,0x05,0x00, ++0x00,0x00,0x64,0x94, ++0x25,0x30,0xC5,0x00, ++0x7F,0x7F,0x05,0x3C, ++0x25,0x30,0xC7,0x00, ++0xA9,0x45,0x00,0x0C, ++0x7F,0x7F,0xA5,0x34, ++0x01,0x00,0x02,0x26, ++0xFF,0x00,0x50,0x30, ++0x06,0x00,0x03,0x2E, ++0xD5,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0x21,0x10,0x54,0x00, ++0xF0,0x1C,0x43,0x8C, ++0xDC,0x0B,0x00,0x08, ++0x21,0x40,0x72,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x02,0x80,0x09,0x3C, ++0x1C,0x00,0xB3,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x30,0x1F,0x27,0x25, ++0x02,0x80,0x02,0x3C, ++0xB0,0x1B,0xE3,0x94, ++0xDE,0x5D,0x46,0x90, ++0xFF,0x00,0x90,0x30, ++0x00,0x10,0x63,0x30, ++0x20,0x00,0xC5,0x30, ++0x21,0x20,0x07,0x02, ++0x10,0x00,0xC6,0x30, ++0x02,0x00,0x60,0x14, ++0x3F,0x00,0x13,0x24, ++0x63,0x1D,0x93,0x90, ++0x28,0x00,0xC0,0x10, ++0x30,0x1F,0x22,0x25, ++0x8D,0x1D,0x82,0x90, ++0x7F,0x1D,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x23,0x10,0x43,0x00, ++0x00,0x46,0x02,0x00, ++0x03,0x46,0x08,0x00, ++0xFF,0x00,0x71,0x30, ++0x30,0x1F,0x27,0x25, ++0x0F,0x00,0x08,0x31, ++0x21,0x30,0x00,0x01, ++0x21,0x40,0x07,0x02, ++0xB7,0x1D,0x02,0x91, ++0xB0,0x1B,0xE3,0x84, ++0x0F,0x00,0x05,0x3C, ++0x0F,0x00,0x42,0x30, ++0x21,0x10,0x51,0x00, ++0x0C,0x08,0x04,0x24, ++0x00,0xFF,0xA5,0x34, ++0x06,0x00,0x60,0x04, ++0xFF,0x00,0x52,0x30, ++0xC5,0x1D,0x02,0x91, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x21,0x10,0x51,0x00, ++0xFF,0x00,0x51,0x30, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x9A,0x0B,0x00,0x0C, ++0x21,0x20,0x60,0x02, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x40,0x02, ++0x21,0x30,0x00,0x02, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xAB,0x0B,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0xDF,0xFF,0xA0,0x10, ++0x21,0x18,0x02,0x02, ++0xA9,0x1D,0x62,0x90, ++0x9B,0x1D,0x63,0x90, ++0x26,0x0C,0x00,0x08, ++0x23,0x10,0x43,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x02,0x3C, ++0x18,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0xE9,0x5D,0x43,0x90, ++0x01,0x00,0x02,0x24, ++0x0D,0x00,0x62,0x10, ++0xFF,0x00,0x91,0x30, ++0x0D,0x0C,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x21,0x30,0x20,0x02, ++0x18,0x00,0x04,0x24, ++0x5F,0x47,0x00,0x0C, ++0xFF,0x03,0x05,0x24, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x0A,0x00,0x04,0x24, ++0x25,0x22,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x1A,0x00,0x23,0x12, ++0x0B,0x00,0x02,0x24, ++0x1D,0x00,0x22,0x12, ++0x0F,0x00,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x15,0x00,0x04,0x24, ++0xF4,0xF8,0x06,0x34, ++0x5F,0x47,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x48,0xF3,0x44,0x90, ++0xFE,0x00,0x03,0x24, ++0xE9,0xFF,0x83,0x14, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x8A,0x47,0x00,0x0C, ++0x15,0x00,0x04,0x24, ++0xFF,0x00,0x46,0x30, ++0x00,0xFF,0x03,0x36, ++0x24,0x10,0x43,0x00, ++0x01,0x00,0xC6,0x24, ++0x25,0x30,0x46,0x00, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x15,0x00,0x04,0x24, ++0x5B,0x0C,0x00,0x08, ++0x21,0x30,0x20,0x02, ++0x0F,0x00,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x15,0x00,0x04,0x24, ++0x6B,0x0C,0x00,0x08, ++0xF4,0xA8,0x06,0x34, ++0xFF,0xFF,0xA5,0x34, ++0x15,0x00,0x04,0x24, ++0x6B,0x0C,0x00,0x08, ++0xF5,0xF8,0x06,0x34, ++0xFC,0x00,0x84,0x30, ++0x50,0x00,0x02,0x24, ++0x11,0x00,0x82,0x10, ++0x05,0x00,0x03,0x24, ++0x51,0x00,0x82,0x28, ++0x10,0x00,0x40,0x10, ++0xA0,0x00,0x02,0x24, ++0x20,0x00,0x02,0x24, ++0x0B,0x00,0x82,0x10, ++0x02,0x00,0x03,0x24, ++0x21,0x00,0x82,0x28, ++0x15,0x00,0x40,0x14, ++0x30,0x00,0x02,0x24, ++0x06,0x00,0x82,0x10, ++0x03,0x00,0x03,0x24, ++0x04,0x00,0x03,0x24, ++0x40,0x00,0x02,0x24, ++0x02,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xFD,0xFF,0x82,0x10, ++0x08,0x00,0x03,0x24, ++0xA1,0x00,0x82,0x28, ++0x0C,0x00,0x40,0x10, ++0xC0,0x00,0x02,0x24, ++0x80,0x00,0x02,0x24, ++0xF7,0xFF,0x82,0x10, ++0x06,0x00,0x03,0x24, ++0x07,0x00,0x03,0x24, ++0x99,0x0C,0x00,0x08, ++0x90,0x00,0x02,0x24, ++0xF2,0xFF,0x80,0x10, ++0x21,0x18,0x00,0x00, ++0x01,0x00,0x03,0x24, ++0x99,0x0C,0x00,0x08, ++0x10,0x00,0x02,0x24, ++0xED,0xFF,0x82,0x10, ++0x0A,0x00,0x03,0x24, ++0xC1,0x00,0x82,0x28, ++0x04,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x09,0x00,0x03,0x24, ++0x99,0x0C,0x00,0x08, ++0xB0,0x00,0x02,0x24, ++0x0B,0x00,0x03,0x24, ++0x99,0x0C,0x00,0x08, ++0xD0,0x00,0x02,0x24, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x08,0x00,0x83,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0x90,0x94, ++0x02,0x80,0x02,0x3C, ++0x21,0x98,0x80,0x00, ++0x25,0x80,0x02,0x02, ++0x21,0x20,0x00,0x02, ++0xFF,0x00,0xB2,0x30, ++0xFF,0x00,0xD1,0x30, ++0x21,0x28,0x00,0x00, ++0x08,0x52,0x00,0x0C, ++0x08,0x00,0x06,0x24, ++0x08,0x00,0x04,0x8E, ++0x04,0x00,0x05,0x8E, ++0xFF,0xDF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xFF,0xE0,0x03,0x24, ++0x24,0x20,0x82,0x00, ++0x00,0x40,0x02,0x3C, ++0x10,0x00,0x06,0x8E, ++0x24,0x28,0xA3,0x00, ++0x25,0x20,0x82,0x00, ++0x3F,0xFF,0x02,0x3C, ++0x0C,0x00,0x67,0x8E, ++0x7F,0xFF,0x03,0x24, ++0xFF,0xFF,0x42,0x34, ++0x00,0x12,0xA5,0x34, ++0x01,0x00,0x52,0x32, ++0x03,0x00,0x31,0x32, ++0x24,0x20,0x83,0x00, ++0x24,0x28,0xA2,0x00, ++0xC0,0x91,0x12,0x00, ++0x80,0x8D,0x11,0x00, ++0x00,0x80,0x02,0x3C, ++0x25,0x30,0xC2,0x00, ++0x25,0x20,0x92,0x00, ++0x25,0x28,0xB1,0x00, ++0x20,0x00,0x02,0x24, ++0x10,0x00,0x06,0xAE, ++0x02,0x00,0x02,0xA2, ++0x08,0x00,0x04,0xAE, ++0x04,0x00,0x05,0xAE, ++0x00,0x00,0x07,0xA6, ++0x02,0x80,0x02,0x3C, ++0xE0,0x3A,0x43,0x94, ++0xFB,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xC2,0x1B,0x03,0x00, ++0x24,0x30,0xC2,0x00, ++0x80,0x1C,0x03,0x00, ++0x25,0x30,0xC3,0x00, ++0x14,0x00,0x05,0x8E, ++0x82,0x24,0x06,0x00, ++0x01,0x00,0x84,0x30, ++0x0C,0x00,0x02,0x24, ++0x0A,0x10,0x04,0x00, ++0xFF,0x81,0x03,0x24, ++0x24,0x28,0xA3,0x00, ++0x40,0x12,0x02,0x00, ++0x25,0x28,0xA2,0x00, ++0x14,0x00,0x05,0xAE, ++0x10,0x00,0x06,0xAE, ++0x00,0x60,0x03,0x40, ++0x01,0x00,0x61,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x02,0x3C, ++0x74,0x57,0x42,0x24, ++0x04,0x00,0x44,0x8C, ++0x00,0x00,0x62,0xAE, ++0x04,0x00,0x53,0xAC, ++0x00,0x00,0x93,0xAC, ++0x04,0x00,0x64,0xAE, ++0x00,0x60,0x83,0x40, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0xFF,0xFF,0x83,0x30, ++0xFF,0x00,0xB1,0x30, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x13,0x3C, ++0x30,0x1F,0x70,0x26, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x42,0x30, ++0x2F,0x00,0x43,0x10, ++0x02,0x80,0x04,0x3C, ++0x00,0x80,0x02,0x34, ++0x50,0xDF,0x84,0x24, ++0x33,0x00,0x62,0x10, ++0x21,0x30,0x20,0x02, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x30,0x3B,0x04,0x92, ++0x4F,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0x03,0x02,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x00,0x08,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0x04,0x00,0x42,0x30, ++0x00,0x00,0x62,0xA0, ++0x1B,0x47,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x09,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x84,0x08,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x58,0x00,0x06,0x24, ++0x00,0x0C,0x05,0x24, ++0x01,0x00,0x06,0x24, ++0x5F,0x47,0x00,0x0C, ++0x18,0x00,0x04,0x24, ++0xB0,0x1B,0x02,0x96, ++0x8F,0x3E,0x11,0xA2, ++0xFF,0x7F,0x42,0x30, ++0xB0,0x1B,0x02,0xA6, ++0x30,0x1F,0x62,0x26, ++0x30,0x3B,0x44,0x90, ++0x0D,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x92,0x40, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x00,0x60,0x92,0x40, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x30,0x3B,0x05,0x92, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x30,0xDF,0x84,0x24, ++0x01,0x00,0x02,0x24, ++0x2C,0x00,0x22,0x12, ++0x00,0x00,0x00,0x00, ++0x30,0x3B,0x04,0x92, ++0x00,0x00,0x00,0x00, ++0xFE,0xFF,0x84,0x24, ++0x4F,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x07,0x3C, ++0x03,0x02,0xE7,0x34, ++0x00,0x00,0xE2,0x90, ++0xFB,0xFF,0x03,0x24, ++0x00,0x08,0x04,0x24, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0xE2,0xA0, ++0x01,0x00,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x03,0x00,0x30,0x32, ++0x00,0x09,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0A,0x04,0x24, ++0x10,0x00,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x42,0x30,0x10,0x00, ++0x21,0x30,0x00,0x02, ++0x00,0x0D,0x04,0x24, ++0x1B,0x47,0x00,0x0C, ++0x00,0x0C,0x05,0x24, ++0x84,0x08,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0x1B,0x47,0x00,0x0C, ++0x18,0x00,0x06,0x24, ++0x18,0x00,0x04,0x24, ++0x00,0x0C,0x05,0x24, ++0x5F,0x47,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x30,0x1F,0x64,0x26, ++0xB0,0x1B,0x82,0x94, ++0x00,0x80,0x03,0x24, ++0x8F,0x3E,0x91,0xA0, ++0x25,0x10,0x43,0x00, ++0x47,0x0D,0x00,0x08, ++0xB0,0x1B,0x82,0xA4, ++0x30,0x3B,0x04,0x92, ++0x65,0x0D,0x00,0x08, ++0x02,0x00,0x84,0x24, ++0xC8,0xFF,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x2C,0x00,0xB1,0xAF, ++0x28,0x00,0xB0,0xAF, ++0x34,0xEA,0x62,0x24, ++0x01,0x00,0x44,0x90, ++0x05,0x00,0x45,0x90, ++0x09,0x00,0x46,0x90, ++0x0D,0x00,0x47,0x90, ++0x04,0x00,0x51,0x90, ++0x08,0x00,0x50,0x90, ++0x34,0xEA,0x72,0x90, ++0x02,0x00,0x4F,0x90, ++0x0C,0x00,0x43,0x90, ++0x06,0x00,0x4E,0x90, ++0x0A,0x00,0x4D,0x90, ++0x0E,0x00,0x48,0x90, ++0x03,0x00,0x49,0x90, ++0x07,0x00,0x4A,0x90, ++0x0B,0x00,0x4B,0x90, ++0x0F,0x00,0x4C,0x90, ++0x00,0x22,0x04,0x00, ++0x00,0x2A,0x05,0x00, ++0x00,0x32,0x06,0x00, ++0x00,0x3A,0x07,0x00, ++0x02,0x80,0x18,0x3C, ++0x25,0x28,0xB1,0x00, ++0x25,0x30,0xD0,0x00, ++0x25,0x38,0xE3,0x00, ++0x25,0x20,0x92,0x00, ++0x11,0x00,0x51,0x90, ++0x10,0x00,0x50,0x90, ++0x30,0x1F,0x03,0x27, ++0x00,0x7C,0x0F,0x00, ++0x00,0x74,0x0E,0x00, ++0x00,0x6C,0x0D,0x00, ++0x00,0x44,0x08,0x00, ++0x25,0x78,0xE4,0x01, ++0x25,0x70,0xC5,0x01, ++0x25,0x68,0xA6,0x01, ++0x25,0x40,0x07,0x01, ++0x5A,0x3E,0x66,0x90, ++0x00,0x4E,0x09,0x00, ++0x00,0x56,0x0A,0x00, ++0x00,0x5E,0x0B,0x00, ++0x00,0x66,0x0C,0x00, ++0x25,0x48,0x2F,0x01, ++0x25,0x50,0x4E,0x01, ++0x25,0x58,0x6D,0x01, ++0x25,0x60,0x88,0x01, ++0x25,0xB0,0x05,0x3C, ++0x37,0x02,0xA5,0x34, ++0x10,0x00,0xA9,0xAF, ++0x14,0x00,0xAA,0xAF, ++0x18,0x00,0xAB,0xAF, ++0x1C,0x00,0xAC,0xAF, ++0x20,0x00,0xB0,0xA3, ++0x21,0x00,0xB1,0xA3, ++0x03,0x00,0xC7,0x30, ++0x00,0x00,0xA4,0x90, ++0x02,0x00,0xE2,0x24, ++0x01,0x00,0x03,0x24, ++0x04,0x18,0x43,0x00, ++0x1C,0x00,0xC6,0x30, ++0xF8,0xFF,0x02,0x24, ++0x24,0x20,0x82,0x00, ++0xFF,0x00,0x67,0x30, ++0x82,0x30,0x06,0x00, ++0x10,0x00,0xE3,0x2C, ++0x25,0x20,0x86,0x00, ++0x0F,0x00,0x02,0x24, ++0x00,0x00,0xA4,0xA0, ++0x0A,0x38,0x43,0x00, ++0x21,0x28,0x00,0x00, ++0x10,0x00,0xA3,0x27, ++0x21,0x30,0x65,0x00, ++0x00,0x00,0xC2,0x90, ++0x01,0x00,0xA5,0x24, ++0x2B,0x10,0xE2,0x00, ++0x02,0x00,0x40,0x10, ++0x11,0x00,0xA4,0x2C, ++0x00,0x00,0xC7,0xA0, ++0xF8,0xFF,0x80,0x14, ++0x21,0x30,0x60,0x00, ++0x21,0x28,0x00,0x00, ++0x25,0xB0,0x07,0x3C, ++0x01,0x00,0xC2,0x90, ++0x00,0x00,0xC3,0x90, ++0x21,0x20,0xA7,0x00, ++0x00,0x11,0x02,0x00, ++0x25,0x10,0x43,0x00, ++0x01,0x00,0xA5,0x24, ++0xFF,0x00,0x42,0x30, ++0x08,0x00,0xA3,0x2C, ++0xA8,0x01,0x82,0xA0, ++0xF6,0xFF,0x60,0x14, ++0x02,0x00,0xC6,0x24, ++0x21,0x00,0xA2,0x93, ++0x20,0x00,0xA4,0x93, ++0x02,0x80,0x03,0x3C, ++0x00,0x11,0x02,0x00, ++0xF1,0x5D,0x65,0x90, ++0x25,0x10,0x44,0x00, ++0xFF,0x00,0x42,0x30, ++0xA7,0x01,0xE3,0x34, ++0x00,0x00,0x62,0xA0, ++0x01,0x00,0x02,0x24, ++0x07,0x00,0xA2,0x10, ++0x30,0x1F,0x03,0x27, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x58,0x3E,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0xF6,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x79,0x3E,0x63,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x62,0x30, ++0xF1,0xFF,0x40,0x10, ++0x03,0x00,0x63,0x30, ++0x0C,0x00,0x65,0x10, ++0x03,0x00,0x02,0x24, ++0x05,0x00,0x62,0x10, ++0x21,0x20,0x00,0x00, ++0x12,0x0D,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0xFF,0x0D,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x04,0x34, ++0x12,0x0D,0x00,0x0C, ++0x02,0x00,0x05,0x24, ++0xFF,0x0D,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x04,0x34, ++0x12,0x0D,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0xFF,0x0D,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x02,0x80,0x06,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x88,0x58,0xC2,0x24, ++0x01,0x00,0x44,0x90, ++0x88,0x58,0xC3,0x90, ++0x02,0x00,0x45,0x90, ++0x03,0x00,0x46,0x90, ++0x05,0x00,0x47,0x90, ++0x04,0x00,0x48,0x90, ++0x00,0x22,0x04,0x00, ++0x25,0x18,0x64,0x00, ++0x00,0x2C,0x05,0x00, ++0x25,0xB0,0x10,0x3C, ++0x25,0x18,0x65,0x00, ++0x00,0x36,0x06,0x00, ++0x00,0x3A,0x07,0x00, ++0x25,0x18,0x66,0x00, ++0x58,0x00,0x02,0x36, ++0x5C,0x00,0x05,0x36, ++0x25,0x40,0x07,0x01, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0x43,0xAC, ++0x84,0x58,0x84,0x24, ++0x00,0x00,0xA8,0xAC, ++0x19,0x4F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x94,0x00,0x03,0x36, ++0x00,0x00,0x62,0xA4, ++0x48,0x00,0x10,0x36, ++0x00,0x00,0x02,0x8E, ++0x04,0x00,0x03,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0x02,0xAE, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x21,0x90,0x80,0x00, ++0x18,0x02,0x04,0x24, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0x84,0x58,0xA5,0x24, ++0xDC,0x01,0x06,0x24, ++0x18,0x00,0x40,0x10, ++0x98,0xDF,0x84,0x24, ++0x08,0x00,0x50,0x94, ++0xF8,0x01,0x02,0x24, ++0x0C,0x00,0x22,0xAE, ++0x02,0x80,0x02,0x3C, ++0x0A,0x00,0x03,0x24, ++0x25,0x80,0x02,0x02, ++0x14,0x00,0x23,0xAE, ++0x3C,0x00,0x04,0x26, ++0x10,0x52,0x00,0x0C, ++0x20,0x00,0x10,0x26, ++0x18,0x00,0x12,0xAE, ++0x21,0x20,0x20,0x02, ++0x30,0x09,0x00,0x0C, ++0x14,0x00,0x12,0xAE, ++0x02,0x80,0x04,0x3C, ++0x21,0x28,0x40,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xA4,0xDF,0x84,0x24, ++0x2F,0x55,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x02,0x80,0x05,0x3C, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x5C,0xEA,0xA5,0x24, ++0x2F,0x55,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x14,0x00,0xB1,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x28,0x00,0x04,0x24, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0x21,0x28,0x00,0x02, ++0x06,0x00,0x06,0x24, ++0x15,0x00,0x40,0x10, ++0xB4,0xDF,0x84,0x24, ++0x08,0x00,0x44,0x94, ++0x08,0x00,0x02,0x24, ++0x0C,0x00,0x22,0xAE, ++0x02,0x80,0x02,0x3C, ++0x0C,0x00,0x03,0x24, ++0x25,0x20,0x82,0x00, ++0x14,0x00,0x23,0xAE, ++0x10,0x52,0x00,0x0C, ++0x20,0x00,0x84,0x24, ++0x30,0x09,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xC0,0xDF,0x84,0x24, ++0x21,0x10,0x00,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x02,0x80,0x05,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x6C,0xEA,0xA5,0x24, ++0x92,0x0E,0x00,0x08, ++0xFF,0xFF,0x02,0x24, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB3,0xAF, ++0x21,0x98,0x80,0x00, ++0x2C,0x00,0x04,0x24, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x21,0x90,0xA0,0x00, ++0x20,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x21,0x88,0x40,0x00, ++0xD8,0xDF,0x84,0x24, ++0x21,0x30,0x40,0x02, ++0x19,0x00,0x40,0x10, ++0x84,0xEA,0xA5,0x24, ++0x05,0x00,0x65,0x92, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x30,0x96, ++0x02,0x80,0x02,0x3C, ++0x0B,0x00,0x03,0x24, ++0x25,0x80,0x02,0x02, ++0x20,0x00,0x10,0x26, ++0x0C,0x00,0x02,0x24, ++0x21,0x20,0x00,0x02, ++0x0C,0x00,0x22,0xAE, ++0x14,0x00,0x23,0xAE, ++0x21,0x28,0x60,0x02, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x08,0x00,0x12,0xAE, ++0x21,0x20,0x20,0x02, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x30,0x09,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xCC,0xDF,0x84,0x24, ++0x2F,0x55,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x02,0x3C, ++0xF6,0x5E,0x43,0x90, ++0x02,0x80,0x11,0x3C, ++0x04,0x00,0x04,0x24, ++0x0F,0x00,0x63,0x30, ++0x04,0x00,0x63,0x28, ++0x36,0x00,0x60,0x14, ++0x01,0x00,0x05,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0x2C,0xE0,0x22,0x8E, ++0x0F,0x00,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x24,0x00,0x04,0x24, ++0x12,0x00,0x40,0x14, ++0x60,0x00,0x06,0x24, ++0x0F,0x00,0x05,0x3C, ++0x5F,0x47,0x00,0x0C, ++0xFF,0xFF,0xA5,0x34, ++0x01,0x00,0x02,0x24, ++0x2C,0xE0,0x22,0xAE, ++0xD0,0x07,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x70,0x58,0x43,0xAC, ++0x02,0x80,0x02,0x3C, ++0xF5,0x5E,0x44,0x90, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x8A,0x47,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x9C,0x3E,0x04,0x92, ++0xFF,0x00,0x43,0x30, ++0x00,0x2C,0x03,0x00, ++0x0A,0x00,0x64,0x10, ++0x9D,0x3E,0x02,0xA2, ++0x02,0x80,0x02,0x3C, ++0x49,0xF3,0x44,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x22,0x04,0x00, ++0x6B,0x1E,0x00,0x0C, ++0x25,0x20,0xA4,0x00, ++0x9D,0x3E,0x03,0x92, ++0x00,0x00,0x00,0x00, ++0x9C,0x3E,0x03,0xA2, ++0x10,0x27,0x02,0x24, ++0x40,0x39,0x02,0xAE, ++0x02,0x80,0x02,0x3C, ++0xF5,0x5E,0x44,0x90, ++0x2C,0xE0,0x20,0xAE, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x64,0x31,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xDB,0x0E,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0xB8,0xFF,0xBD,0x27, ++0x00,0x01,0x04,0x24, ++0x3C,0x00,0xB3,0xAF, ++0x38,0x00,0xB2,0xAF, ++0x34,0x00,0xB1,0xAF, ++0x40,0x00,0xBF,0xAF, ++0x30,0x00,0xB0,0xAF, ++0x25,0x24,0x00,0x0C, ++0x02,0x80,0x13,0x3C, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0xF0,0xDD,0x65,0x26, ++0x06,0x00,0x06,0x24, ++0x0C,0x00,0x52,0x24, ++0x4C,0x00,0x40,0x10, ++0x30,0xE0,0x84,0x24, ++0x08,0x00,0x50,0x94, ++0x02,0x80,0x02,0x3C, ++0x25,0x80,0x02,0x02, ++0x24,0x00,0x04,0x26, ++0x10,0x52,0x00,0x0C, ++0x20,0x00,0x00,0xA6, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x04,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x30,0x00,0x04,0x26, ++0xF0,0xDD,0x65,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x03,0x96, ++0x18,0x00,0x02,0x24, ++0x02,0x80,0x04,0x3C, ++0x03,0xFF,0x63,0x30, ++0x40,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0x30,0x1F,0x84,0x24, ++0x0C,0x00,0x22,0xAE, ++0xF8,0x1D,0x82,0x94, ++0x20,0x00,0x06,0x26, ++0x02,0x80,0x07,0x3C, ++0xFF,0x0F,0x43,0x30, ++0x00,0x19,0x03,0x00, ++0x02,0x2A,0x03,0x00, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x82,0xA4, ++0x16,0x00,0xC3,0xA0, ++0x17,0x00,0xC5,0xA0, ++0x74,0x3B,0x86,0x8C, ++0xA8,0x5A,0xE7,0x24, ++0x38,0x00,0x04,0x26, ++0x21,0x28,0x00,0x00, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB2,0xAF, ++0x18,0x00,0xA4,0x27, ++0x28,0x00,0xA5,0x27, ++0x21,0x50,0x00,0x0C, ++0x21,0x80,0x40,0x00, ++0x28,0x00,0xA3,0x8F, ++0x21,0x20,0x00,0x02, ++0x18,0x00,0xA7,0x27, ++0x09,0x00,0x62,0x28, ++0x01,0x00,0x05,0x24, ++0x12,0x00,0x40,0x10, ++0x08,0x00,0x06,0x24, ++0x21,0x20,0x00,0x02, ++0x21,0x30,0x60,0x00, ++0x01,0x00,0x05,0x24, ++0x18,0x00,0xA7,0x27, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB2,0xAF, ++0x21,0x20,0x20,0x02, ++0x01,0x00,0x05,0x24, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x40,0x00,0xBF,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB2,0xAF, ++0x28,0x00,0xA6,0x8F, ++0x21,0x20,0x40,0x00, ++0x32,0x00,0x05,0x24, ++0xF8,0xFF,0xC6,0x24, ++0x59,0x0F,0x00,0x08, ++0x20,0x00,0xA7,0x27, ++0x02,0x80,0x05,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x9C,0xEA,0xA5,0x24, ++0x40,0x00,0xBF,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xBE,0xAF, ++0x2C,0x00,0xB7,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x21,0x80,0x80,0x00, ++0x45,0x00,0xA0,0x14, ++0x21,0x90,0x00,0x00, ++0x08,0x00,0x82,0x90, ++0x02,0x80,0x13,0x3C, ++0x30,0x1F,0x63,0x26, ++0x0F,0x00,0x42,0x30, ++0x14,0x3E,0x62,0xAC, ++0x25,0xB0,0x02,0x3C, ++0x0A,0x00,0x10,0x26, ++0xD0,0x01,0x57,0x34, ++0x02,0x80,0x14,0x3C, ++0xD8,0x01,0x5E,0x34, ++0xDC,0x01,0x55,0x34, ++0xD4,0x01,0x56,0x34, ++0x03,0x00,0x11,0x24, ++0x00,0x00,0x06,0x92, ++0x30,0x1F,0x62,0x26, ++0x0C,0x3E,0x47,0x90, ++0x0F,0x00,0xC3,0x30, ++0x01,0x00,0x05,0x92, ++0x18,0x00,0x67,0x00, ++0x03,0x00,0x04,0x92, ++0x02,0x00,0x02,0x92, ++0x0F,0x00,0xA7,0x30, ++0x00,0x3A,0x07,0x00, ++0x02,0x29,0x05,0x00, ++0x00,0x22,0x04,0x00, ++0x25,0x20,0x82,0x00, ++0x00,0x2B,0x05,0x00, ++0x42,0x11,0x06,0x00, ++0x00,0x24,0x04,0x00, ++0x03,0x00,0x49,0x30, ++0x02,0x31,0x06,0x00, ++0x01,0x00,0x02,0x24, ++0x01,0x00,0xC6,0x30, ++0x12,0x18,0x00,0x00, ++0x0A,0x00,0x63,0x24, ++0xFF,0x00,0x63,0x30, ++0x25,0x18,0x67,0x00, ++0x25,0x18,0x65,0x00, ++0x30,0x00,0x22,0x11, ++0x25,0x38,0x64,0x00, ++0x02,0x00,0x22,0x29, ++0x3E,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x38,0x00,0x22,0x11, ++0x03,0x00,0x02,0x24, ++0x40,0x00,0x22,0x11, ++0x00,0x00,0x00,0x00, ++0x21,0x28,0x20,0x01, ++0x3C,0xE0,0x84,0x26, ++0x2F,0x55,0x00,0x0C, ++0xFF,0xFF,0x31,0x26, ++0xD9,0xFF,0x21,0x06, ++0x04,0x00,0x10,0x26, ++0x25,0xB0,0x02,0x3C, ++0xE7,0x01,0x42,0x34, ++0x00,0x00,0x52,0xA0, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xBE,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x02,0x80,0x13,0x3C, ++0x08,0x00,0x83,0x90, ++0x30,0x1F,0x62,0x26, ++0x14,0x3E,0x44,0x8C, ++0x0F,0x00,0x63,0x30, ++0xBB,0xFF,0x83,0x14, ++0x00,0x00,0x00,0x00, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xBE,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x00,0x00,0xA7,0xAE, ++0x21,0x20,0x00,0x00, ++0x25,0xB0,0x08,0x3C, ++0x07,0x10,0x92,0x00, ++0x01,0x00,0x42,0x30, ++0x01,0x00,0x84,0x24, ++0x02,0x00,0x40,0x10, ++0x03,0x00,0x85,0x2C, ++0xD0,0x01,0x07,0xAD, ++0xF9,0xFF,0xA0,0x14, ++0x04,0x00,0x08,0x25, ++0xB6,0x0F,0x00,0x08, ++0x21,0x28,0x20,0x01, ++0x0D,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0xB5,0x0F,0x00,0x08, ++0x02,0x00,0x52,0x36, ++0xC7,0xFF,0x20,0x15, ++0x21,0x28,0x20,0x01, ++0x0D,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0xB6,0x0F,0x00,0x08, ++0x04,0x00,0x52,0x36, ++0x06,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0xB5,0x0F,0x00,0x08, ++0x01,0x00,0x52,0x36, ++0x00,0x00,0xC7,0xAE, ++0xB6,0x0F,0x00,0x08, ++0x21,0x28,0x20,0x01, ++0x00,0x00,0xE7,0xAE, ++0xB6,0x0F,0x00,0x08, ++0x21,0x28,0x20,0x01, ++0x00,0x00,0xC7,0xAF, ++0xB6,0x0F,0x00,0x08, ++0x21,0x28,0x20,0x01, ++0xC8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB1,0xAF, ++0x02,0x80,0x02,0x3C, ++0x21,0x88,0x80,0x00, ++0x00,0x01,0x04,0x24, ++0x30,0x00,0xB6,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x25,0x24,0x00,0x0C, ++0x84,0x58,0x56,0x24, ++0x74,0x00,0x40,0x10, ++0x21,0x98,0x40,0x00, ++0x08,0x00,0x50,0x94, ++0x02,0x80,0x02,0x3C, ++0x21,0x28,0x20,0x02, ++0x25,0x80,0x02,0x02, ++0x24,0x00,0x04,0x26, ++0x20,0x00,0x00,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x04,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x06,0x00,0x06,0x24, ++0x30,0x00,0x04,0x26, ++0x10,0x52,0x00,0x0C, ++0x88,0x58,0xA5,0x24, ++0x20,0x00,0x03,0x96, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x84,0x24, ++0x03,0xFF,0x63,0x30, ++0x50,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0xF8,0x1D,0x82,0x94, ++0x20,0x00,0x12,0x26, ++0x74,0x00,0xD1,0x26, ++0xFF,0x0F,0x43,0x30, ++0x00,0x19,0x03,0x00, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x82,0xA4, ++0x02,0x2A,0x03,0x00, ++0x20,0x00,0x02,0x24, ++0x16,0x00,0x43,0xA2, ++0x17,0x00,0x45,0xA2, ++0x21,0x20,0x20,0x02, ++0x17,0x4F,0x00,0x0C, ++0x0C,0x00,0x62,0xAE, ++0x40,0x00,0x12,0x26, ++0x21,0x20,0x40,0x02, ++0x21,0x28,0x40,0x00, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x0C,0x00,0x63,0x8E, ++0x21,0x20,0x20,0x02, ++0x42,0x00,0x12,0x26, ++0x02,0x00,0x63,0x24, ++0x32,0x4F,0x00,0x0C, ++0x0C,0x00,0x63,0xAE, ++0x21,0x28,0x40,0x00, ++0x21,0x20,0x40,0x02, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x0C,0x00,0x63,0x8E, ++0x44,0x00,0x04,0x26, ++0x0C,0x00,0x75,0x26, ++0x02,0x00,0x63,0x24, ++0x0C,0x00,0x63,0xAE, ++0x0C,0x00,0xC6,0x8E, ++0x21,0x28,0x00,0x00, ++0x10,0x00,0xC7,0x26, ++0x60,0x00,0xD0,0x26, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB5,0xAF, ++0x21,0x20,0x00,0x02, ++0x37,0x50,0x00,0x0C, ++0x21,0x90,0x40,0x00, ++0x09,0x00,0x51,0x2C, ++0x08,0x00,0x06,0x24, ++0x21,0x20,0x40,0x02, ++0x0B,0x30,0x51,0x00, ++0x21,0x38,0x00,0x02, ++0x01,0x00,0x05,0x24, ++0x21,0xA0,0x40,0x00, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB5,0xAF, ++0x21,0x20,0x40,0x00, ++0x03,0x00,0x05,0x24, ++0x01,0x00,0x06,0x24, ++0x48,0x00,0xC7,0x26, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB5,0xAF, ++0x0D,0x00,0x20,0x12, ++0x21,0x20,0x60,0x02, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0x21,0x30,0x00,0x00, ++0xB9,0x0C,0x00,0x08, ++0x38,0x00,0xBD,0x27, ++0xF8,0xFF,0x86,0x26, ++0x21,0x20,0x40,0x00, ++0x68,0x00,0xC7,0x26, ++0x32,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB5,0xAF, ++0x21,0x20,0x60,0x02, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0x21,0x30,0x00,0x00, ++0xB9,0x0C,0x00,0x08, ++0x38,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x98,0xE0,0x84,0x24, ++0xAC,0xEA,0xA5,0x24, ++0x2F,0x55,0x00,0x08, ++0x38,0x00,0xBD,0x27, ++0xB0,0xFF,0xBD,0x27, ++0x50,0x00,0xA4,0xAF, ++0xFC,0x01,0x04,0x24, ++0x4C,0x00,0xBF,0xAF, ++0x48,0x00,0xBE,0xAF, ++0x44,0x00,0xB7,0xAF, ++0x40,0x00,0xB6,0xAF, ++0x3C,0x00,0xB5,0xAF, ++0x38,0x00,0xB4,0xAF, ++0x34,0x00,0xB3,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x2C,0x00,0xB1,0xAF, ++0x25,0x24,0x00,0x0C, ++0x28,0x00,0xB0,0xAF, ++0xE3,0x00,0x40,0x10, ++0x1C,0x00,0xA2,0xAF, ++0x50,0x00,0xA6,0x8F, ++0x02,0x80,0x03,0x3C, ++0xD0,0xEA,0x62,0x24, ++0xD0,0xEA,0x68,0x90, ++0x01,0x00,0x44,0x90, ++0x02,0x00,0xC3,0x90, ++0x02,0x00,0x45,0x90, ++0x03,0x00,0x46,0x90, ++0x1C,0x00,0xA2,0x8F, ++0x00,0x22,0x04,0x00, ++0x25,0x20,0x88,0x00, ++0x08,0x00,0x47,0x94, ++0x50,0x00,0xA2,0x8F, ++0x00,0x2C,0x05,0x00, ++0x0F,0x00,0x63,0x30, ++0x00,0x00,0x48,0x8C, ++0x02,0x80,0x02,0x3C, ++0x25,0x38,0xE2,0x00, ++0x50,0x00,0xA2,0x8F, ++0x25,0x28,0xA4,0x00, ++0x00,0x36,0x06,0x00, ++0xC0,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x25,0x30,0xC5,0x00, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xA6,0xAF, ++0xDD,0x5A,0x55,0x24, ++0x22,0x00,0x66,0x24, ++0x18,0x00,0x62,0x24, ++0x28,0x00,0x76,0x24, ++0x02,0x80,0x03,0x3C, ++0x20,0x00,0xF7,0x24, ++0xFF,0x3F,0x1E,0x31, ++0x21,0x90,0x00,0x00, ++0x30,0x1F,0x73,0x24, ++0x01,0x00,0x14,0x24, ++0x21,0x80,0x00,0x00, ++0x24,0x00,0xA6,0xAF, ++0xD0,0x10,0x00,0x08, ++0x20,0x00,0xA2,0xAF, ++0x39,0x52,0x00,0x0C, ++0x07,0x00,0x10,0x26, ++0x19,0x00,0x40,0x10, ++0x40,0x00,0x43,0x2A, ++0x0E,0x00,0x60,0x10, ++0xE8,0xFF,0xC2,0x27, ++0x21,0x88,0x13,0x02, ++0xAC,0x3B,0x22,0x92, ++0x01,0x00,0x52,0x26, ++0x21,0x20,0x15,0x02, ++0x21,0x28,0xC0,0x02, ++0xF4,0xFF,0x54,0x10, ++0x06,0x00,0x06,0x24, ++0x21,0x20,0x15,0x02, ++0x21,0x28,0xC0,0x02, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xAC,0x3B,0x34,0xA2, ++0xE8,0xFF,0xC2,0x27, ++0x69,0x01,0x43,0x28, ++0x16,0x00,0x60,0x14, ++0x18,0x00,0xA2,0xAF, ++0x02,0x80,0x06,0x3C, ++0x30,0x1F,0xC3,0x24, ++0xA8,0x3B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xA8,0x3B,0x62,0xAC, ++0x1C,0x00,0xA4,0x8F, ++0x3D,0x24,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x4C,0x00,0xBF,0x8F, ++0x48,0x00,0xBE,0x8F, ++0x44,0x00,0xB7,0x8F, ++0x40,0x00,0xB6,0x8F, ++0x3C,0x00,0xB5,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x50,0x00,0xBD,0x27, ++0x21,0x20,0xE0,0x02, ++0x21,0x28,0x00,0x00, ++0xFF,0x51,0x00,0x0C, ++0xDC,0x01,0x06,0x24, ++0x20,0x00,0xA2,0x8F, ++0x74,0x00,0xF4,0x26, ++0x21,0x20,0x80,0x02, ++0x18,0x00,0x45,0x24, ++0x18,0x00,0xA2,0x8F, ++0x80,0x00,0xF1,0x26, ++0x74,0x00,0x42,0x24, ++0x00,0x00,0xE2,0xAE, ++0x18,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x30,0x60,0x00, ++0x10,0x52,0x00,0x0C, ++0x70,0x00,0xE3,0xAE, ++0x70,0x00,0xE7,0x8E, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x00,0x00, ++0xF4,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x18,0x00,0xA6,0x27, ++0xD9,0xFF,0x40,0x10, ++0x21,0x80,0x40,0x00, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x62,0x24, ++0x74,0x3B,0x46,0x8C, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0xC0,0x18, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0xCF,0xFF,0xC2,0x14, ++0x02,0x80,0x04,0x3C, ++0xA8,0x5A,0x84,0x24, ++0x39,0x52,0x00,0x0C, ++0x02,0x00,0x05,0x26, ++0xCA,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x06,0x92, ++0x00,0x00,0x00,0x00, ++0x77,0x00,0xC0,0x14, ++0x10,0x00,0xE4,0x26, ++0x0C,0x00,0xE0,0xAE, ++0x50,0x00,0xA6,0x8F, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0xC2,0x94, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x68,0x00,0x40,0x10, ++0x21,0x20,0xC0,0x00, ++0x34,0x00,0xE0,0xAE, ++0x60,0x00,0xF3,0x26, ++0x21,0x20,0x60,0x02, ++0x21,0x28,0x00,0x00, ++0xFF,0x51,0x00,0x0C, ++0x10,0x00,0x06,0x24, ++0x70,0x00,0xE7,0x8E, ++0x21,0x20,0x20,0x02, ++0x01,0x00,0x05,0x24, ++0xF4,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x18,0x00,0xA6,0x27, ++0x06,0x00,0x40,0x10, ++0x21,0x90,0x00,0x00, ++0x18,0x00,0xA6,0x8F, ++0x02,0x00,0x45,0x24, ++0x10,0x52,0x00,0x0C, ++0x21,0x20,0x60,0x02, ++0x18,0x00,0xB2,0x8F, ++0x70,0x00,0xE7,0x8E, ++0x21,0x20,0x20,0x02, ++0x32,0x00,0x05,0x24, ++0xF4,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x18,0x00,0xA6,0x27, ++0x05,0x00,0x40,0x10, ++0x21,0x20,0xF2,0x02, ++0x18,0x00,0xA6,0x8F, ++0x60,0x00,0x84,0x24, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x45,0x24, ++0x18,0x00,0xA5,0x8F, ++0x21,0x20,0x60,0x02, ++0x7D,0x50,0x00,0x0C, ++0x21,0x28,0xB2,0x00, ++0x21,0x18,0x40,0x00, ++0x01,0x00,0x02,0x24, ++0x3F,0x00,0x62,0x10, ++0x03,0x00,0x02,0x24, ++0x38,0x00,0xE2,0xAE, ++0x70,0x00,0xE7,0x8E, ++0x21,0x20,0x20,0x02, ++0x03,0x00,0x05,0x24, ++0xF4,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x18,0x00,0xA6,0x27, ++0x48,0x00,0xE0,0xAE, ++0x04,0x00,0x40,0x10, ++0x3C,0x00,0xE0,0xAE, ++0x02,0x00,0x42,0x90, ++0x00,0x00,0x00,0x00, ++0x48,0x00,0xE2,0xAE, ++0x17,0x4F,0x00,0x0C, ++0x21,0x20,0x80,0x02, ++0x21,0x28,0x40,0x00, ++0x40,0x00,0xE4,0x26, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x34,0x4F,0x00,0x0C, ++0x21,0x20,0xE0,0x02, ++0xFF,0xFF,0x50,0x30, ++0x01,0x00,0x02,0x32, ++0x22,0x00,0x40,0x10, ++0x21,0x28,0xC0,0x02, ++0x01,0x00,0x02,0x24, ++0x5C,0x00,0xE2,0xAE, ++0x24,0x00,0xA5,0x8F, ++0x04,0x00,0xE4,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x10,0x00,0x02,0x32, ++0x1B,0x00,0x40,0x10, ++0x01,0x00,0x02,0x24, ++0x30,0x00,0xE2,0xAE, ++0x02,0x80,0x02,0x3C, ++0x44,0x00,0xE0,0xAE, ++0x30,0x1F,0x44,0x24, ++0xA4,0x3B,0x82,0x8C, ++0x1C,0x00,0xA6,0x8F, ++0xDC,0x01,0x03,0x24, ++0x01,0x00,0x42,0x24, ++0xA4,0x3B,0x82,0xAC, ++0x08,0x00,0x02,0x24, ++0x0C,0x00,0xC3,0xAC, ++0x14,0x00,0xC2,0xAC, ++0x1C,0x00,0xA4,0x8F, ++0x30,0x09,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xE9,0x10,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0xA4,0xE0,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0xBC,0xEA,0xA5,0x24, ++0xE9,0x10,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x6D,0x11,0x00,0x08, ++0x5C,0x00,0xE0,0xAE, ++0x74,0x11,0x00,0x08, ++0x30,0x00,0xE0,0xAE, ++0x52,0x11,0x00,0x08, ++0x38,0x00,0xE3,0xAE, ++0xF7,0x19,0x00,0x0C, ++0x18,0x00,0xC5,0x24, ++0x4C,0x1A,0x00,0x0C, ++0x21,0x20,0x40,0x00, ++0x2B,0x11,0x00,0x08, ++0x34,0x00,0xE2,0xAE, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x05,0x26, ++0x01,0x00,0x03,0x92, ++0x22,0x11,0x00,0x08, ++0x0C,0x00,0xE3,0xAE, ++0x02,0x80,0x04,0x3C, ++0x84,0x58,0x84,0x24, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x17,0x4F,0x00,0x0C, ++0x74,0x00,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x10,0x00,0xA4,0x27, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x10,0x00,0xA2,0x97, ++0x25,0xB0,0x04,0x3C, ++0x94,0x00,0x85,0x34, ++0x9A,0x00,0x87,0x34, ++0x26,0xB0,0x06,0x3C, ++0x00,0x08,0x03,0x24, ++0x00,0x00,0xA2,0xA4, ++0x0A,0x00,0x0B,0x24, ++0x00,0x00,0xE3,0xA4, ++0x98,0x00,0x88,0x34, ++0x96,0x00,0x89,0x34, ++0x7A,0x00,0xCA,0x34, ++0x50,0x00,0x02,0x24, ++0x04,0x00,0x03,0x24, ++0x00,0x00,0x02,0xA5, ++0x00,0x00,0x2B,0xA5, ++0x00,0x00,0x43,0xA1, ++0x10,0x00,0xA2,0x97, ++0x89,0x00,0x83,0x34, ++0x14,0x00,0x07,0x24, ++0x40,0x11,0x02,0x00, ++0xA0,0xFF,0x42,0x24, ++0xFF,0xFF,0x42,0x30, ++0x9C,0x00,0x85,0x34, ++0x7C,0x00,0xC6,0x34, ++0x00,0x00,0xC2,0xA4, ++0x44,0x00,0x84,0x34, ++0x00,0x00,0x67,0xA0, ++0x00,0x00,0xAB,0xA0, ++0x00,0x00,0x82,0x94, ++0xFF,0xFD,0x03,0x24, ++0x18,0x00,0xBF,0x8F, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0x82,0xA4, ++0x00,0x00,0x83,0x94, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x00,0x02,0x63,0x34, ++0x20,0x00,0xBD,0x27, ++0x8E,0x3E,0x40,0xA0, ++0x00,0x00,0x83,0xA4, ++0x08,0x00,0xE0,0x03, ++0x0C,0x3E,0x47,0xA0, ++0xD8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x10,0x3C, ++0x84,0x58,0x04,0x26, ++0x24,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x34,0x4F,0x00,0x0C, ++0x18,0x00,0xB2,0xAF, ++0xFF,0xFF,0x51,0x30, ++0x84,0x58,0x04,0x26, ++0x19,0x4F,0x00,0x0C, ++0x02,0x80,0x10,0x3C, ++0x30,0x1F,0x03,0x26, ++0x01,0x00,0x24,0x32, ++0x08,0x3E,0x62,0xA4, ++0x03,0x00,0x80,0x14, ++0x02,0x00,0x05,0x24, ++0x40,0x10,0x11,0x00, ++0x04,0x00,0x45,0x30, ++0x02,0x00,0x02,0x24, ++0x59,0x00,0xA2,0x10, ++0x30,0x1F,0x02,0x26, ++0x0F,0x00,0x80,0x10, ++0x02,0x00,0x03,0x24, ++0x04,0x00,0x02,0x24, ++0x11,0x00,0x62,0x10, ++0x30,0x1F,0x13,0x26, ++0x02,0x80,0x04,0x3C, ++0x21,0x28,0x20,0x02, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x18,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0x40,0x10,0x11,0x00, ++0x04,0x00,0x43,0x30, ++0x04,0x00,0x02,0x24, ++0xF1,0xFF,0x62,0x14, ++0x30,0x1F,0x13,0x26, ++0x08,0x3E,0x66,0x96, ++0x30,0x3B,0x65,0x92, ++0x02,0x80,0x04,0x3C, ++0xB0,0x1B,0x63,0xA6, ++0xD4,0xE0,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x25,0xB0,0x10,0x3C, ++0x50,0x02,0x03,0x36, ++0x0F,0x00,0x02,0x24, ++0x00,0x00,0x62,0xA0, ++0x21,0x28,0x00,0x00, ++0x12,0x0D,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x30,0x3B,0x64,0x92, ++0x01,0x00,0x14,0x24, ++0x4F,0x0C,0x00,0x0C, ++0x4C,0x00,0x10,0x36, ++0x02,0x80,0x11,0x3C, ++0x00,0x00,0x14,0xA2, ++0x21,0x0E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x37,0x50,0x00,0x0C, ++0xE4,0x58,0x24,0x26, ++0x21,0x28,0x40,0x00, ++0xE4,0x58,0x24,0x26, ++0x7D,0x50,0x00,0x0C, ++0x21,0x90,0x40,0x00, ++0x0F,0x00,0x50,0x30, ++0xE4,0x58,0x24,0x26, ++0x96,0x50,0x00,0x0C, ++0x21,0x28,0x40,0x02, ++0x40,0x02,0x10,0x36, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0x21,0x30,0x40,0x00, ++0x21,0x28,0x00,0x02, ++0x2F,0x55,0x00,0x0C, ++0x04,0xE1,0x84,0x24, ++0x21,0x20,0x00,0x02, ++0xC1,0x5B,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0xF3,0x3D,0x84,0x24, ++0x88,0x58,0xA5,0x24, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0xC2,0x1E,0x74,0xA2, ++0x0F,0x48,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x9C,0x11,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0x62,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x34, ++0x53,0x1E,0x00,0x0C, ++0xB0,0x1B,0x62,0xA6, ++0xEC,0x38,0x62,0xAE, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x04,0x24, ++0x48,0x0E,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0x78,0x3D,0x44,0x8C, ++0x01,0x20,0x03,0x24, ++0xB0,0x1B,0x43,0xA4, ++0x02,0x00,0x85,0x10, ++0x0C,0x00,0x03,0x24, ++0x0F,0x00,0x03,0x24, ++0x25,0xB0,0x02,0x3C, ++0x50,0x02,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x30,0x1F,0x10,0x26, ++0xB0,0x1B,0x02,0x96, ++0x08,0x3E,0x06,0x96, ++0x30,0x3B,0x05,0x92, ++0x10,0x00,0x42,0x34, ++0x02,0x80,0x04,0x3C, ++0xB0,0x1B,0x02,0xA6, ++0x2F,0x55,0x00,0x0C, ++0xB0,0xE0,0x84,0x24, ++0x21,0x28,0x00,0x00, ++0x12,0x0D,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x30,0x3B,0x04,0x92, ++0x4F,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x53,0x1E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEC,0x38,0x02,0xAE, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x65,0x24, ++0x50,0x3E,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x1F,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x0A,0x3E,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x42,0x2C, ++0x1A,0x00,0x40,0x10, ++0x21,0x38,0xA0,0x00, ++0x98,0x3E,0xA4,0x8C, ++0x94,0x3E,0xA5,0x8C, ++0x21,0x30,0x00,0x00, ++0x80,0x10,0x04,0x00, ++0x80,0x18,0x05,0x00, ++0x2B,0x10,0x45,0x00, ++0x04,0x00,0x40,0x14, ++0x2B,0x18,0x64,0x00, ++0x01,0x00,0x06,0x24, ++0x02,0x00,0x02,0x24, ++0x0A,0x30,0x43,0x00, ++0x0A,0x3E,0xE2,0x90, ++0x94,0x3E,0xE0,0xAC, ++0x98,0x3E,0xE0,0xAC, ++0x40,0x18,0x02,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x18,0x66,0x00, ++0x02,0x80,0x02,0x3C, ++0x48,0xDD,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0x64,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xD8,0x01,0x42,0x34, ++0x00,0x00,0x44,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x00,0x84,0x90, ++0x02,0x80,0x05,0x3C, ++0x18,0x3B,0xA5,0x24, ++0x0F,0x00,0x84,0x30, ++0xC0,0x20,0x04,0x00, ++0x21,0x20,0x90,0x00, ++0x1C,0x00,0x84,0x24, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x06,0x00,0x40,0x10, ++0x21,0x20,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x92,0x10,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x80,0xFF,0xBD,0x27, ++0x02,0x80,0x06,0x3C, ++0x02,0x80,0x08,0x3C, ++0x78,0x00,0xBE,0xAF, ++0x7C,0x00,0xBF,0xAF, ++0x74,0x00,0xB7,0xAF, ++0x70,0x00,0xB6,0xAF, ++0x6C,0x00,0xB5,0xAF, ++0x68,0x00,0xB4,0xAF, ++0x64,0x00,0xB3,0xAF, ++0x60,0x00,0xB2,0xAF, ++0x5C,0x00,0xB1,0xAF, ++0x58,0x00,0xB0,0xAF, ++0xD0,0xEA,0xC2,0x24, ++0xE4,0xEA,0x03,0x25, ++0x01,0x00,0x44,0x90, ++0x01,0x00,0x65,0x90, ++0xD0,0xEA,0xCB,0x90, ++0xE4,0xEA,0x0A,0x91, ++0x02,0x00,0x47,0x90, ++0x02,0x00,0x66,0x90, ++0x03,0x00,0x48,0x90, ++0x03,0x00,0x69,0x90, ++0x00,0x22,0x04,0x00, ++0x00,0x2A,0x05,0x00, ++0x25,0x20,0x8B,0x00, ++0x25,0x28,0xAA,0x00, ++0x00,0x3C,0x07,0x00, ++0x00,0x34,0x06,0x00, ++0x25,0x38,0xE4,0x00, ++0x25,0x30,0xC5,0x00, ++0x00,0x46,0x08,0x00, ++0x00,0x4E,0x09,0x00, ++0x25,0x40,0x07,0x01, ++0x25,0x48,0x26,0x01, ++0x00,0x02,0x04,0x24, ++0x40,0x00,0xA8,0xAF, ++0x25,0x24,0x00,0x0C, ++0x48,0x00,0xA9,0xAF, ++0xB0,0x01,0x40,0x10, ++0x21,0xF0,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x52,0x24, ++0xC4,0x39,0x45,0x8E, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x34,0xE1,0x84,0x24, ++0x08,0x00,0xD1,0x97, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x10,0x3C, ++0x25,0x88,0x22,0x02, ++0x88,0x58,0x10,0x26, ++0x24,0x00,0x24,0x26, ++0x21,0x28,0x00,0x02, ++0x20,0x00,0x20,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x24,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x21,0x28,0x00,0x02, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0x30,0x00,0x24,0x26, ++0x18,0x00,0x03,0x24, ++0x0C,0x00,0xC3,0xAF, ++0xF8,0x1D,0x42,0x96, ++0x20,0x00,0x25,0x26, ++0x38,0x00,0x37,0x26, ++0xFF,0x0F,0x43,0x30, ++0x00,0x19,0x03,0x00, ++0x02,0x22,0x03,0x00, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x42,0xA6, ++0x17,0x00,0xA4,0xA0, ++0x02,0x80,0x04,0x3C, ++0x16,0x00,0xA3,0xA0, ++0x32,0x4F,0x00,0x0C, ++0xF8,0x58,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x21,0x20,0xE0,0x02, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x3A,0x00,0x24,0x26, ++0x18,0x00,0xA5,0x27, ++0x02,0x00,0x06,0x24, ++0x03,0x00,0x02,0x24, ++0x10,0x52,0x00,0x0C, ++0x18,0x00,0xA2,0xA7, ++0x0C,0x00,0xC3,0x8F, ++0x02,0x80,0x07,0x3C, ++0x3C,0x00,0x24,0x26, ++0x04,0x00,0x63,0x24, ++0x0C,0x00,0xC3,0xAF, ++0x60,0x39,0x46,0x8E, ++0x0C,0x00,0xC2,0x27, ++0x94,0x58,0xE7,0x24, ++0x21,0x28,0x00,0x00, ++0x54,0x00,0xA2,0xAF, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x20,0x00,0xA4,0x27, ++0x50,0x00,0xA5,0x27, ++0x21,0x50,0x00,0x0C, ++0x21,0xB8,0x40,0x00, ++0x50,0x00,0xA8,0x8F, ++0x21,0x88,0x00,0x00, ++0x52,0x00,0x00,0x11, ++0x21,0x80,0x00,0x00, ++0x21,0x38,0x40,0x02, ++0x18,0x00,0xA9,0x27, ++0x21,0x10,0x31,0x01, ++0x08,0x00,0x46,0x90, ++0x21,0x20,0x00,0x00, ++0x7F,0x00,0xC5,0x30, ++0x21,0x10,0x87,0x00, ++0xB4,0x39,0x43,0x90, ++0x01,0x00,0x84,0x24, ++0x7F,0x00,0x63,0x30, ++0x3D,0x00,0xA3,0x10, ++0x0D,0x00,0x82,0x2C, ++0xFA,0xFF,0x40,0x14, ++0x21,0x10,0x87,0x00, ++0x01,0x00,0x31,0x26, ++0x2B,0x10,0x28,0x02, ++0xF2,0xFF,0x40,0x14, ++0x21,0x10,0x31,0x01, ++0x09,0x00,0x02,0x2E, ++0x3D,0x00,0x40,0x14, ++0x21,0x20,0xE0,0x02, ++0x54,0x00,0xA2,0x8F, ++0x01,0x00,0x05,0x24, ++0x08,0x00,0x06,0x24, ++0x30,0x00,0xA7,0x27, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x21,0x20,0x40,0x00, ++0x54,0x00,0xA2,0x8F, ++0xF8,0xFF,0x06,0x26, ++0x32,0x00,0x05,0x24, ++0x38,0x00,0xA7,0x27, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0x78,0x3D,0x83,0x8C, ++0x02,0x00,0x02,0x24, ++0x37,0x00,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0xC4,0x39,0x83,0x8C, ++0x0C,0x00,0x11,0x24, ++0x2B,0x10,0x23,0x02, ++0x32,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xF8,0x58,0x46,0x24, ++0x21,0x20,0x60,0x00, ++0x4D,0x13,0x00,0x08, ++0x30,0x00,0x05,0x24, ++0x01,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x24,0x02, ++0x27,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x26,0x02, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xF5,0xFF,0x45,0x14, ++0x02,0x80,0x07,0x3C, ++0x01,0x00,0x66,0x90, ++0x54,0x00,0xA2,0x8F, ++0xFA,0x58,0xE7,0x24, ++0x21,0x20,0xE0,0x02, ++0x21,0x38,0x27,0x02, ++0x30,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x73,0x13,0x00,0x08, ++0x21,0xB8,0x40,0x00, ++0x21,0x10,0x30,0x01, ++0x18,0x00,0x46,0xA0, ++0x50,0x00,0xA8,0x8F, ++0x01,0x00,0x31,0x26, ++0x2B,0x10,0x28,0x02, ++0xB4,0xFF,0x40,0x14, ++0x01,0x00,0x10,0x26, ++0x27,0x13,0x00,0x08, ++0x09,0x00,0x02,0x2E, ++0x54,0x00,0xA2,0x8F, ++0x21,0x20,0xE0,0x02, ++0x21,0x30,0x00,0x02, ++0x01,0x00,0x05,0x24, ++0x30,0x00,0xA7,0x27, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0x78,0x3D,0x83,0x8C, ++0x02,0x00,0x02,0x24, ++0xCB,0xFF,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0xD5,0x1D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x16,0x00,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x43,0x24, ++0xC4,0x39,0x62,0x8C, ++0x0C,0x00,0x11,0x24, ++0x2B,0x10,0x22,0x02, ++0x10,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xF8,0x58,0x52,0x24, ++0x21,0x80,0x60,0x00, ++0x02,0x80,0x13,0x3C, ++0x21,0x20,0x32,0x02, ++0x00,0x00,0x83,0x90, ++0x2D,0x00,0x02,0x24, ++0xCB,0x00,0x62,0x10, ++0x02,0x80,0x05,0x3C, ++0x01,0x00,0x82,0x90, ++0xC4,0x39,0x03,0x8E, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x23,0x02, ++0xF6,0xFF,0x60,0x14, ++0x21,0x20,0x32,0x02, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0x78,0x3D,0x83,0x8C, ++0x02,0x00,0x02,0x24, ++0x82,0x00,0x62,0x10, ++0x0C,0x00,0x11,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x43,0x24, ++0xC4,0x39,0x62,0x8C, ++0x0C,0x00,0x11,0x24, ++0x2B,0x10,0x22,0x02, ++0x26,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xF8,0x58,0x56,0x24, ++0x21,0xA8,0x60,0x00, ++0xDD,0x00,0x14,0x24, ++0xA5,0x13,0x00,0x08, ++0x02,0x80,0x13,0x3C, ++0x01,0x00,0x02,0x92, ++0xC4,0x39,0xA3,0x8E, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x23,0x02, ++0x1B,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0x21,0x80,0x36,0x02, ++0x00,0x00,0x02,0x92, ++0x02,0x00,0x12,0x26, ++0x21,0x20,0x40,0x02, ++0xD0,0xDD,0x65,0x26, ++0xF3,0xFF,0x54,0x14, ++0x06,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0xFF,0x40,0x14, ++0x21,0x20,0xE0,0x02, ++0x54,0x00,0xA2,0x8F, ++0xDD,0x00,0x05,0x24, ++0x21,0x38,0x40,0x02, ++0x07,0x00,0x06,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x08,0x00,0x04,0x92, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x45,0x24, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x0F,0x5F,0x44,0xA0, ++0x10,0x3E,0xA3,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0xC4,0x39,0x82,0x8C, ++0x0C,0x00,0x11,0x24, ++0x2B,0x10,0x22,0x02, ++0x20,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF8,0x58,0x56,0x24, ++0xFA,0x58,0x75,0x24, ++0x21,0xA0,0x80,0x00, ++0xD2,0x13,0x00,0x08, ++0xDD,0x00,0x13,0x24, ++0x01,0x00,0x02,0x92, ++0xC4,0x39,0x83,0x8E, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x23,0x02, ++0x14,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0x21,0x80,0x36,0x02, ++0x00,0x00,0x02,0x92, ++0x21,0x90,0x35,0x02, ++0x21,0x20,0x40,0x02, ++0x48,0x00,0xA5,0x27, ++0xF3,0xFF,0x53,0x14, ++0x04,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0xFF,0x40,0x14, ++0x21,0x20,0xE0,0x02, ++0x01,0x00,0x06,0x92, ++0x54,0x00,0xA2,0x8F, ++0x21,0x38,0x40,0x02, ++0xDD,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0x0A,0x3E,0x02,0x92, ++0x50,0x3E,0x03,0x8E, ++0x05,0x00,0x42,0x38, ++0x01,0x00,0x63,0x38, ++0x01,0x00,0x42,0x2C, ++0x01,0x00,0x63,0x2C, ++0x24,0x10,0x43,0x00, ++0x58,0x00,0x40,0x14, ++0x02,0x80,0x07,0x3C, ++0xC4,0x39,0x05,0x8E, ++0x0C,0x00,0x11,0x24, ++0x2B,0x10,0x25,0x02, ++0x0F,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xF8,0x58,0x46,0x24, ++0x44,0x00,0x04,0x24, ++0x21,0x80,0x26,0x02, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x3E,0x00,0x44,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x25,0x02, ++0xF6,0xFF,0x60,0x14, ++0x21,0x80,0x26,0x02, ++0x21,0x20,0xC0,0x03, ++0x21,0x28,0x00,0x00, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x21,0x10,0x00,0x00, ++0x7C,0x00,0xBF,0x8F, ++0x78,0x00,0xBE,0x8F, ++0x74,0x00,0xB7,0x8F, ++0x70,0x00,0xB6,0x8F, ++0x6C,0x00,0xB5,0x8F, ++0x68,0x00,0xB4,0x8F, ++0x64,0x00,0xB3,0x8F, ++0x60,0x00,0xB2,0x8F, ++0x5C,0x00,0xB1,0x8F, ++0x58,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x80,0x00,0xBD,0x27, ++0xC4,0x39,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x22,0x02, ++0x7B,0xFF,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF8,0x58,0x56,0x24, ++0xFA,0x58,0x75,0x24, ++0x21,0xA0,0x80,0x00, ++0x25,0x14,0x00,0x08, ++0xDD,0x00,0x13,0x24, ++0x01,0x00,0x02,0x92, ++0xC4,0x39,0x83,0x8E, ++0x21,0x10,0x51,0x00, ++0x02,0x00,0x51,0x24, ++0x2B,0x18,0x23,0x02, ++0x6F,0xFF,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0x21,0x80,0x36,0x02, ++0x00,0x00,0x02,0x92, ++0x21,0x90,0x35,0x02, ++0x21,0x20,0x40,0x02, ++0x40,0x00,0xA5,0x27, ++0xF3,0xFF,0x53,0x14, ++0x04,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0xFF,0x40,0x14, ++0x21,0x20,0xE0,0x02, ++0x01,0x00,0x06,0x92, ++0x54,0x00,0xA2,0x8F, ++0x21,0x38,0x40,0x02, ++0xDD,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x92,0x13,0x00,0x08, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x48,0xE1,0x84,0x24, ++0x01,0x00,0x06,0x92, ++0x54,0x00,0xA2,0x8F, ++0x02,0x80,0x07,0x3C, ++0xFA,0x58,0xE7,0x24, ++0x21,0x38,0x27,0x02, ++0x21,0x20,0xE0,0x02, ++0x44,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x03,0x14,0x00,0x08, ++0x21,0x20,0xC0,0x03, ++0x54,0x00,0xA2,0x8F, ++0x21,0x20,0xE0,0x02, ++0x9C,0xDD,0xE7,0x24, ++0xDD,0x00,0x05,0x24, ++0x06,0x00,0x06,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0xEF,0x13,0x00,0x08, ++0x21,0xB8,0x40,0x00, ++0x02,0x80,0x14,0x3C, ++0xFA,0x58,0xA5,0x24, ++0x21,0x28,0x25,0x02, ++0x88,0x5D,0x84,0x26, ++0x10,0x52,0x00,0x0C, ++0x20,0x00,0x06,0x24, ++0x02,0x80,0x03,0x3C, ++0xF1,0x5D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x1D,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x58,0x3E,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0xBD,0xFF,0x42,0x30, ++0x58,0x3E,0x02,0xA6, ++0x02,0x80,0x02,0x3C, ++0x58,0x3E,0x03,0x96, ++0xDE,0x5D,0x44,0x90, ++0x0C,0x00,0x63,0x34, ++0x01,0x00,0x84,0x30, ++0x15,0x00,0x80,0x10, ++0x58,0x3E,0x03,0xA6, ++0x02,0x80,0x05,0x3C, ++0x8B,0x5D,0x64,0x26, ++0x3C,0xE3,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x10,0x00,0x06,0x24, ++0x21,0x10,0x32,0x02, ++0x01,0x00,0x46,0x90, ++0x54,0x00,0xA2,0x8F, ++0x21,0x20,0xE0,0x02, ++0x88,0x5D,0x87,0x26, ++0x2D,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x21,0xB8,0x40,0x00, ++0x01,0x00,0x02,0x24, ++0x8C,0x13,0x00,0x08, ++0x50,0x3E,0x02,0xAE, ++0x58,0x3E,0x02,0x96, ++0x5D,0x14,0x00,0x08, ++0x02,0x00,0x42,0x34, ++0x02,0x80,0x05,0x3C, ++0x8B,0x5D,0x64,0x26, ++0x68,0x14,0x00,0x08, ++0x4C,0xE3,0xA5,0x24, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x28,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0xD4,0xEA,0xA5,0x24, ++0x07,0x14,0x00,0x08, ++0xFF,0xFF,0x02,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0xB0,0x1B,0x43,0x94, ++0xC8,0x00,0x04,0x24, ++0xD0,0x38,0x44,0xAC, ++0x9F,0xFE,0x63,0x30, ++0x80,0x00,0x63,0x34, ++0xB0,0x1B,0x43,0xA4, ++0x6C,0x3D,0x40,0xAC, ++0x70,0x3D,0x40,0xAC, ++0xA5,0x12,0x00,0x08, ++0xB4,0x38,0x40,0xAC, ++0xD8,0xFF,0xBD,0x27, ++0x28,0x00,0xA4,0xA3, ++0x00,0x01,0x04,0x24, ++0x18,0x00,0xB2,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x2C,0x00,0xA5,0xA3, ++0x25,0x24,0x00,0x0C, ++0x30,0x00,0xA6,0xA7, ++0x94,0x00,0x40,0x10, ++0x21,0x90,0x40,0x00, ++0x30,0x00,0xA7,0x97, ++0x28,0x00,0xA5,0x93, ++0x2C,0x00,0xA6,0x93, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x68,0xE1,0x84,0x24, ++0x08,0x00,0x50,0x96, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x11,0x3C, ++0x25,0x80,0x02,0x02, ++0x88,0x58,0x31,0x26, ++0x21,0x28,0x20,0x02, ++0x24,0x00,0x04,0x26, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0x20,0x00,0x00,0xA6, ++0x02,0x80,0x05,0x3C, ++0x18,0x3B,0xA5,0x24, ++0x2A,0x00,0x04,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x21,0x28,0x20,0x02, ++0x30,0x00,0x04,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x03,0x96, ++0x18,0x00,0x02,0x24, ++0x20,0x00,0x05,0x26, ++0x03,0xFF,0x63,0x30, ++0xD0,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0x02,0x80,0x03,0x3C, ++0x0C,0x00,0x42,0xAE, ++0x30,0x1F,0x73,0x24, ++0xF8,0x1D,0x62,0x96, ++0x0C,0x00,0x51,0x26, ++0x28,0x00,0xA6,0x27, ++0xFF,0x0F,0x43,0x30, ++0x00,0x19,0x03,0x00, ++0x02,0x22,0x03,0x00, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x62,0xA6, ++0x21,0x38,0x20,0x02, ++0x16,0x00,0xA3,0xA0, ++0x17,0x00,0xA4,0xA0, ++0x38,0x00,0x04,0x26, ++0x68,0x4F,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x21,0x20,0x40,0x00, ++0x01,0x00,0x05,0x24, ++0x2C,0x00,0xA6,0x27, ++0x68,0x4F,0x00,0x0C, ++0x21,0x38,0x20,0x02, ++0x28,0x00,0xA3,0x93, ++0x21,0x20,0x40,0x00, ++0x03,0x00,0x02,0x24, ++0x0C,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x40,0x02, ++0x21,0x28,0x00,0x00, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x2C,0x00,0xA3,0x93, ++0x00,0x00,0x00,0x00, ++0x2E,0x00,0x60,0x14, ++0x01,0x00,0x02,0x24, ++0x19,0x3E,0x63,0x92, ++0x21,0x80,0x60,0x02, ++0x01,0x00,0x68,0x24, ++0xFF,0x00,0x02,0x31, ++0xFD,0xFF,0x40,0x10, ++0x21,0x18,0x00,0x01, ++0x02,0x80,0x06,0x3C, ++0x19,0x3E,0x08,0xA2, ++0x21,0x38,0x20,0x02, ++0x49,0x5D,0xC6,0x24, ++0x68,0x4F,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x30,0x00,0xA3,0x97, ++0x02,0x80,0x06,0x3C, ++0x21,0x38,0x20,0x02, ++0x0F,0x00,0x63,0x30, ++0x80,0x18,0x03,0x00, ++0x02,0x08,0x63,0x34, ++0x1C,0x3E,0x03,0xA6, ++0x4C,0x5D,0xC6,0x24, ++0x21,0x20,0x40,0x00, ++0x68,0x4F,0x00,0x0C, ++0x02,0x00,0x05,0x24, ++0x02,0x80,0x06,0x3C, ++0x21,0x38,0x20,0x02, ++0x4E,0x5D,0xC6,0x24, ++0x21,0x20,0x40,0x00, ++0x02,0x00,0x05,0x24, ++0x68,0x4F,0x00,0x0C, ++0x1E,0x3E,0x00,0xA6, ++0x30,0x00,0xA3,0x97, ++0x21,0x20,0x40,0x00, ++0x02,0x80,0x06,0x3C, ++0x07,0x00,0x63,0x30, ++0x40,0x18,0x03,0x00, ++0x21,0x18,0x70,0x00, ++0xE8,0x1D,0x62,0x94, ++0x50,0x5D,0xC6,0x24, ++0x21,0x38,0x20,0x02, ++0x00,0x11,0x02,0x00, ++0x02,0x00,0x05,0x24, ++0x68,0x4F,0x00,0x0C, ++0x20,0x3E,0x02,0xA6, ++0xD8,0x14,0x00,0x08, ++0x21,0x20,0x40,0x02, ++0xC3,0xFF,0x62,0x14, ++0x02,0x80,0x06,0x3C, ++0x21,0x38,0x20,0x02, ++0x48,0x5D,0xC6,0x24, ++0x68,0x4F,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x21,0x20,0x40,0x00, ++0x30,0x00,0xA6,0x27, ++0x21,0x38,0x20,0x02, ++0x68,0x4F,0x00,0x0C, ++0x02,0x00,0x05,0x24, ++0x1C,0x3E,0x63,0x96, ++0x02,0x80,0x06,0x3C, ++0x21,0x38,0x20,0x02, ++0x3F,0x00,0x63,0x30, ++0x00,0x08,0x63,0x34, ++0x21,0x20,0x40,0x00, ++0x4C,0x5D,0xC6,0x24, ++0x02,0x00,0x05,0x24, ++0x68,0x4F,0x00,0x0C, ++0x1C,0x3E,0x63,0xA6, ++0x02,0x80,0x06,0x3C, ++0x21,0x20,0x40,0x00, ++0x4E,0x5D,0xC6,0x24, ++0x21,0x38,0x20,0x02, ++0x68,0x4F,0x00,0x0C, ++0x02,0x00,0x05,0x24, ++0xD8,0x14,0x00,0x08, ++0x21,0x20,0x40,0x02, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x5C,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0xE8,0xEA,0xA5,0x24, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x00,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x03,0x42,0x34, ++0xF0,0x54,0x63,0x24, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x00,0x00,0x43,0xAC, ++0x02,0x00,0x82,0x90, ++0x02,0x80,0x05,0x3C, ++0x88,0x58,0xA5,0x24, ++0x0F,0x00,0x42,0x30, ++0xC0,0x10,0x02,0x00, ++0x21,0x80,0x44,0x00, ++0x28,0x00,0x04,0x26, ++0x06,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x18,0x00,0x11,0x26, ++0x08,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x55,0x50,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x02,0x80,0x04,0x3C, ++0x18,0x3B,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xF1,0xFF,0x40,0x14, ++0x03,0x00,0x02,0x24, ++0x30,0x00,0x03,0x92, ++0x00,0x00,0x00,0x00, ++0xED,0xFF,0x62,0x14, ++0x30,0x00,0x07,0x26, ++0x02,0x80,0x06,0x3C, ++0x30,0x1F,0xC8,0x24, ++0x50,0x3E,0x02,0x8D, ++0x00,0x00,0x00,0x00, ++0xE7,0xFF,0x40,0x10, ++0x01,0x00,0x05,0x24, ++0x01,0x00,0xE3,0x90, ++0x00,0x00,0x00,0x00, ++0x1A,0x00,0x65,0x10, ++0x02,0x00,0x62,0x28, ++0x2E,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0xDF,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0xE3,0x90, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x62,0x30, ++0x0A,0x00,0x40,0x14, ++0x02,0x11,0x03,0x00, ++0x1A,0x3E,0x03,0x91, ++0x04,0x10,0x45,0x00, ++0x27,0x10,0x02,0x00, ++0x24,0x10,0x43,0x00, ++0x1A,0x3E,0x02,0xA1, ++0x05,0x00,0xE3,0x90, ++0x04,0x00,0xE2,0x90, ++0x00,0x1A,0x03,0x00, ++0x25,0x90,0x62,0x00, ++0x1A,0x3E,0x05,0x91, ++0x02,0x80,0x04,0x3C, ++0x94,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x21,0x30,0x40,0x02, ++0x52,0x15,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0xE2,0x90, ++0x03,0x00,0xE4,0x90, ++0x05,0x00,0xE3,0x90, ++0x00,0x12,0x02,0x00, ++0x25,0x10,0x44,0x00, ++0x82,0x18,0x03,0x00, ++0x27,0x00,0x40,0x14, ++0x07,0x00,0x64,0x30, ++0x1A,0x3E,0x03,0x91, ++0x04,0x10,0x85,0x00, ++0x25,0x10,0x43,0x00, ++0x1A,0x3E,0x02,0xA1, ++0x30,0x1F,0xC2,0x24, ++0x4C,0x3E,0x43,0x90, ++0x1A,0x3E,0x45,0x90, ++0x02,0x80,0x04,0x3C, ++0x21,0x18,0x62,0x00, ++0x84,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x44,0x3E,0x60,0xA0, ++0x52,0x15,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xB2,0xFF,0x60,0x14, ++0x03,0x00,0x04,0x24, ++0x02,0x00,0xE2,0x90, ++0x01,0x00,0x05,0x24, ++0x18,0x3E,0x02,0xA1, ++0x04,0x00,0xE3,0x90, ++0x03,0x00,0xE2,0x90, ++0x21,0x30,0x00,0x00, ++0x00,0x1A,0x03,0x00, ++0x25,0x18,0x62,0x00, ++0x1C,0x3E,0x03,0xA5, ++0x06,0x00,0xE2,0x90, ++0x05,0x00,0xE3,0x90, ++0x00,0x12,0x02,0x00, ++0x25,0x10,0x43,0x00, ++0x1E,0x3E,0x02,0xA5, ++0x08,0x00,0xE3,0x90, ++0x07,0x00,0xE2,0x90, ++0x00,0x1A,0x03,0x00, ++0x25,0x18,0x62,0x00, ++0x90,0x14,0x00,0x0C, ++0x20,0x3E,0x03,0xA5, ++0x52,0x15,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x1A,0x3E,0x03,0x91, ++0x04,0x10,0x85,0x00, ++0x27,0x10,0x02,0x00, ++0x94,0x15,0x00,0x08, ++0x24,0x10,0x43,0x00, ++0xC0,0xFF,0xBD,0x27, ++0x34,0x00,0xB5,0xAF, ++0xFF,0xFF,0x95,0x30, ++0x00,0x01,0x04,0x24, ++0x38,0x00,0xB6,0xAF, ++0x28,0x00,0xB2,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x30,0x00,0xB4,0xAF, ++0x2C,0x00,0xB3,0xAF, ++0x24,0x00,0xB1,0xAF, ++0x25,0x24,0x00,0x0C, ++0x20,0x00,0xB0,0xAF, ++0x21,0x90,0x40,0x00, ++0x7A,0x00,0x40,0x10, ++0x21,0xB0,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xB0,0xE1,0x84,0x24, ++0x08,0x00,0x50,0x96, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x11,0x3C, ++0x25,0x80,0x02,0x02, ++0x88,0x58,0x31,0x26, ++0x24,0x00,0x04,0x26, ++0x21,0x28,0x20,0x02, ++0x20,0x00,0x00,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x04,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x30,0x00,0x04,0x26, ++0x21,0x28,0x20,0x02, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x03,0x96, ++0x18,0x00,0x02,0x24, ++0x02,0x80,0x13,0x3C, ++0x03,0xFF,0x63,0x30, ++0xB0,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0x30,0x1F,0x68,0x26, ++0x0C,0x00,0x42,0xAE, ++0xF8,0x1D,0x02,0x95, ++0x20,0x00,0x14,0x26, ++0x0C,0x00,0x51,0x26, ++0xFF,0x0F,0x43,0x30, ++0x00,0x19,0x03,0x00, ++0x02,0x22,0x03,0x00, ++0x01,0x00,0x42,0x24, ++0xF8,0x1D,0x02,0xA5, ++0x17,0x00,0x84,0xA2, ++0x16,0x00,0x83,0xA2, ++0x74,0x3D,0x04,0x8D, ++0x03,0x00,0x02,0x24, ++0x3C,0x00,0x82,0x10, ++0x38,0x00,0x10,0x26, ++0x30,0x1F,0x73,0x26, ++0x78,0x3D,0x62,0x8E, ++0x21,0x20,0x00,0x02, ++0x02,0x00,0x05,0x24, ++0x01,0x00,0x42,0x38, ++0x01,0x00,0x42,0x2C, ++0x18,0x00,0xA6,0x27, ++0x21,0x38,0x20,0x02, ++0x68,0x4F,0x00,0x0C, ++0x18,0x00,0xA2,0xA7, ++0x74,0x3D,0x63,0x8E, ++0x21,0x20,0x40,0x00, ++0x02,0x00,0x05,0x24, ++0x18,0x00,0xA6,0x27, ++0x21,0x38,0x20,0x02, ++0x68,0x4F,0x00,0x0C, ++0x18,0x00,0xA3,0xA7, ++0x21,0x20,0x40,0x00, ++0x02,0x00,0x05,0x24, ++0x18,0x00,0xA6,0x27, ++0x21,0x38,0x20,0x02, ++0x68,0x4F,0x00,0x0C, ++0x18,0x00,0xB5,0xA7, ++0x74,0x3D,0x63,0x8E, ++0x21,0x80,0x40,0x00, ++0x03,0x00,0x02,0x24, ++0x0F,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x40,0x02, ++0x21,0x30,0xC0,0x02, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0xB0,0x1B,0x62,0x96, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x30, ++0xEF,0xFF,0x40,0x10, ++0x21,0x20,0x40,0x02, ++0x02,0x80,0x07,0x3C, ++0x21,0x20,0x00,0x02, ++0xB8,0x5C,0xE7,0x24, ++0x10,0x00,0x05,0x24, ++0x80,0x00,0x06,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB1,0xAF, ++0x00,0x00,0x83,0x96, ++0x01,0x00,0x16,0x24, ++0x00,0x40,0x63,0x34, ++0x13,0x16,0x00,0x08, ++0x00,0x00,0x83,0xA6, ++0xB0,0x1B,0x02,0x95, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x30, ++0xC1,0xFF,0x40,0x10, ++0x21,0x20,0x00,0x02, ++0x80,0x3D,0x03,0x8D, ++0x84,0x3D,0x02,0x8D, ++0x80,0x1F,0x03,0x00, ++0x25,0x18,0x43,0x00, ++0x04,0x00,0x05,0x24, ++0x01,0x00,0x42,0x24, ++0x1C,0x00,0xA6,0x27, ++0x21,0x38,0x20,0x02, ++0x84,0x3D,0x02,0xAD, ++0x68,0x4F,0x00,0x0C, ++0x1C,0x00,0xA3,0xAF, ++0xF7,0x15,0x00,0x08, ++0x21,0x80,0x40,0x00, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0xA4,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0xF8,0xEA,0xA5,0x24, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0xB0,0x1B,0x62,0x94, ++0x01,0x00,0x05,0x24, ++0x21,0x20,0x00,0x00, ++0xEF,0xFF,0x42,0x30, ++0x20,0x00,0x42,0x34, ++0xB0,0x1B,0x62,0xA4, ++0xC8,0x00,0x02,0x24, ++0x74,0x3D,0x65,0xAC, ++0xB4,0x38,0x62,0xAC, ++0xD0,0x38,0x60,0xAC, ++0x6C,0x3D,0x60,0xAC, ++0xBC,0x15,0x00,0x08, ++0x70,0x3D,0x60,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xA8,0xFF,0xBD,0x27, ++0x50,0x00,0xBE,0xAF, ++0x40,0x00,0xB4,0xAF, ++0x3C,0x00,0xB3,0xAF, ++0x54,0x00,0xBF,0xAF, ++0x4C,0x00,0xB7,0xAF, ++0x48,0x00,0xB6,0xAF, ++0x44,0x00,0xB5,0xAF, ++0x38,0x00,0xB2,0xAF, ++0x34,0x00,0xB1,0xAF, ++0x30,0x00,0xB0,0xAF, ++0x21,0xA0,0x80,0x00, ++0x02,0x00,0x84,0x90, ++0x21,0xF0,0x00,0x00, ++0x24,0x00,0xA0,0xAF, ++0x0F,0x00,0x84,0x30, ++0xC0,0x20,0x04,0x00, ++0x21,0x20,0x94,0x00, ++0x18,0x00,0x93,0x24, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x15,0x3C, ++0x28,0x00,0x84,0x24, ++0x88,0x58,0xA5,0x26, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x0F,0x00,0x40,0x14, ++0x02,0x80,0x16,0x3C, ++0xF4,0x5E,0xC2,0x92, ++0x00,0x00,0x00,0x00, ++0x29,0x00,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0xC2,0x92, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x3C,0x01,0x40,0x14, ++0x05,0x00,0x05,0x24, ++0x00,0x60,0x92,0x40, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x70,0x24, ++0xB0,0x1B,0x03,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x62,0x30, ++0x24,0x01,0x40,0x14, ++0x10,0x00,0x62,0x30, ++0xCB,0x00,0x40,0x14, ++0x10,0x00,0x64,0x26, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x92,0x24, ++0xB0,0x1B,0x42,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x4E,0x01,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0x30,0x1F,0x43,0x24, ++0xB0,0x1B,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0xD3,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x6C,0x3B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0xCF,0xFF,0x40,0x14, ++0x02,0x80,0x0B,0x3C, ++0x15,0x5F,0x62,0x91, ++0x00,0x00,0x00,0x00, ++0x55,0x01,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xFA,0x5E,0x40,0xA0, ++0x1C,0x5F,0x60,0xAC, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x62,0x90, ++0xFD,0xFF,0x03,0x24, ++0x02,0x80,0x04,0x3C, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x82,0xA0, ++0x42,0xB0,0x17,0x3C, ++0x00,0x00,0xE3,0x92, ++0xEF,0xFF,0x02,0x24, ++0x03,0x00,0xE4,0x36, ++0x24,0x18,0x62,0x00, ++0x40,0x00,0x02,0x24, ++0x00,0x00,0xE3,0xA2, ++0x00,0x00,0x82,0xA0, ++0x02,0x80,0x04,0x3C, ++0xFC,0x5E,0x82,0x94, ++0x20,0x00,0x63,0x96, ++0xFF,0xFF,0x42,0x30, ++0x0A,0x00,0x43,0x10, ++0x02,0x80,0x07,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x94,0x00,0x42,0x34, ++0xFC,0x5E,0x83,0xA4, ++0x00,0x00,0x43,0xA4, ++0xFC,0x5E,0x83,0x94, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x63,0x30, ++0x80,0x1A,0x03,0x00, ++0x00,0x5F,0xE3,0xAC, ++0x25,0xB0,0x04,0x3C, ++0x84,0x00,0x82,0x34, ++0x00,0x00,0x50,0x8C, ++0x80,0x00,0x84,0x34, ++0x00,0x00,0x82,0x8C, ++0x21,0x18,0x00,0x00, ++0x00,0x5F,0xE6,0x8C, ++0x00,0x88,0x10,0x00, ++0x21,0x80,0x00,0x00, ++0x25,0x80,0x02,0x02, ++0x25,0x88,0x23,0x02, ++0x21,0x20,0x00,0x02, ++0x21,0x28,0x20,0x02, ++0x28,0x00,0xA7,0xAF, ++0xBA,0x34,0x00,0x0C, ++0x2C,0x00,0xAB,0xAF, ++0x28,0x00,0xA7,0x8F, ++0x02,0x80,0x0A,0x3C, ++0x21,0x28,0x00,0x00, ++0x00,0x5F,0xE8,0x8C, ++0x04,0x5F,0x43,0x95, ++0x21,0x28,0xB1,0x00, ++0x23,0x48,0x02,0x01, ++0x21,0x20,0x30,0x01, ++0x2B,0x10,0x90,0x00, ++0xFF,0xFF,0x63,0x30, ++0x80,0x1A,0x03,0x00, ++0x21,0x28,0xA2,0x00, ++0x21,0x38,0x00,0x00, ++0x2B,0x40,0x83,0x00, ++0x23,0x28,0xA7,0x00, ++0x23,0x20,0x83,0x00, ++0x23,0x28,0xA8,0x00, ++0x02,0x80,0x03,0x3C, ++0x20,0x5F,0x64,0xAC, ++0x24,0x5F,0x65,0xAC, ++0x04,0x5F,0x42,0x95, ++0x2C,0x00,0xAB,0x8F, ++0xFF,0xFF,0x42,0x30, ++0x80,0x12,0x02,0x00, ++0x2B,0x10,0x49,0x00, ++0x31,0x01,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x04,0x5F,0x42,0x95, ++0x00,0x00,0xE4,0x92, ++0xFB,0xFF,0x03,0x24, ++0xFF,0xFF,0x42,0x30, ++0x80,0x12,0x02,0x00, ++0x24,0x20,0x83,0x00, ++0x23,0x48,0x22,0x01, ++0x00,0x00,0xE4,0xA2, ++0x01,0x00,0x06,0x24, ++0x04,0x00,0x20,0x11, ++0x01,0x00,0x04,0x24, ++0x80,0x10,0x09,0x00, ++0x21,0x10,0x49,0x00, ++0x80,0x30,0x02,0x00, ++0x8C,0x23,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x42,0xB0,0x02,0x3C, ++0x22,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x00,0x00,0x87,0x8E, ++0x05,0x00,0x05,0x24, ++0x24,0x00,0x64,0x26, ++0xFF,0x3F,0xE7,0x30, ++0xDC,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x20,0x00,0xA6,0x27, ++0x2E,0x00,0x40,0x10, ++0x21,0x28,0x40,0x00, ++0xF4,0x5E,0xC2,0x92, ++0x02,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x45,0x01,0x43,0x10, ++0x02,0x80,0x07,0x3C, ++0x02,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x62,0x30, ++0x04,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x1E,0x24, ++0x12,0x5F,0x5E,0xA0, ++0x04,0x00,0xA3,0x90, ++0x20,0x00,0xA7,0x8F, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0xE2,0x28, ++0x18,0x00,0x40,0x14, ++0xFE,0x00,0x66,0x30, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x43,0x24, ++0x50,0x39,0x64,0x94, ++0xC0,0x10,0x06,0x00, ++0x2A,0x10,0x82,0x00, ++0x12,0x00,0x40,0x14, ++0x02,0x80,0x03,0x3C, ++0x21,0x10,0xC7,0x00, ++0xFD,0xFF,0x42,0x24, ++0xC0,0x10,0x02,0x00, ++0x2A,0x10,0x44,0x00, ++0x0C,0x00,0x40,0x14, ++0xC2,0x10,0x04,0x00, ++0x23,0x30,0x46,0x00, ++0x21,0x18,0xA6,0x00, ++0x05,0x00,0x62,0x90, ++0x07,0x00,0x84,0x30, ++0x01,0x00,0x03,0x24, ++0x07,0x10,0x82,0x00, ++0x24,0x00,0xA4,0x8F, ++0x01,0x00,0x42,0x30, ++0x0B,0x20,0x62,0x00, ++0x24,0x00,0xA4,0xAF, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x62,0x90, ++0xEF,0xFF,0x03,0x24, ++0x02,0x80,0x04,0x3C, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x82,0xA0, ++0xF4,0x5E,0xC3,0x92, ++0x02,0x80,0x02,0x3C, ++0x24,0xE9,0x42,0x24, ++0xFF,0x00,0x63,0x30, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0x66,0x8C, ++0x24,0x00,0xA5,0x8F, ++0x09,0xF8,0xC0,0x00, ++0x21,0x20,0xC0,0x03, ++0x90,0x16,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x88,0x58,0xA5,0x26, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x33,0xFF,0x40,0x14, ++0x02,0x80,0x04,0x3C, ++0x06,0x00,0x02,0x24, ++0x0A,0x3E,0x02,0xA2, ++0xEC,0x38,0x00,0xAE, ++0x00,0x00,0x84,0x8E, ++0x0C,0x00,0x12,0x24, ++0xFF,0x3F,0x82,0x30, ++0xE8,0xFF,0x42,0x24, ++0x2A,0x10,0x42,0x02, ++0xA4,0x00,0x40,0x10, ++0x21,0xA8,0x00,0x02, ++0x7D,0x17,0x00,0x08, ++0x21,0x80,0x72,0x02, ++0x19,0x00,0x03,0x92, ++0xFF,0x3F,0x82,0x30, ++0xE8,0xFF,0x42,0x24, ++0x21,0x18,0x72,0x00, ++0x02,0x00,0x72,0x24, ++0x2A,0x10,0x42,0x02, ++0x9A,0x00,0x40,0x10, ++0x21,0x80,0x72,0x02, ++0x18,0x00,0x03,0x92, ++0xDD,0x00,0x02,0x24, ++0xF5,0xFF,0x62,0x14, ++0x1A,0x00,0x11,0x26, ++0x02,0x80,0x05,0x3C, ++0xC4,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x20,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xC0,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x1A,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xBC,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x0F,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xB8,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x09,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xB4,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x03,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xAC,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x64,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xA8,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x57,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0xB0,0xDD,0xA5,0x24, ++0x21,0x20,0x20,0x02, ++0x39,0x52,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x4A,0x01,0x40,0x10, ++0x02,0x80,0x05,0x3C, ++0x21,0x20,0x20,0x02, ++0x9C,0xDD,0xA5,0x24, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x3E,0x01,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0x84,0x8E, ++0x75,0x17,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x92,0x10,0x00,0x0C, ++0x21,0x20,0x80,0x02, ++0x21,0x18,0x00,0x00, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0x00,0x00,0x87,0x8E, ++0x24,0x00,0x64,0x26, ++0xFF,0x3F,0xE7,0x30, ++0xDC,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x20,0x00,0xA6,0x27, ++0xBE,0xFE,0x40,0x10, ++0x21,0x28,0x40,0x00, ++0x20,0x00,0xA7,0x8F, ++0x04,0x00,0x42,0x90, ++0x04,0x00,0xE3,0x28, ++0xB9,0xFE,0x60,0x14, ++0xFE,0x00,0x46,0x30, ++0x50,0x39,0x04,0x96, ++0xC0,0x10,0x06,0x00, ++0x2A,0x10,0x82,0x00, ++0xB4,0xFE,0x40,0x14, ++0x21,0x10,0xC7,0x00, ++0xFD,0xFF,0x42,0x24, ++0xC0,0x10,0x02,0x00, ++0x2A,0x10,0x44,0x00, ++0xAF,0xFE,0x40,0x14, ++0xC2,0x10,0x04,0x00, ++0x23,0x30,0x46,0x00, ++0x21,0x18,0xA6,0x00, ++0x05,0x00,0x62,0x90, ++0x07,0x00,0x84,0x30, ++0x07,0x10,0x82,0x00, ++0x01,0x00,0x42,0x30, ++0xA7,0xFE,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xCD,0x4E,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x90,0x16,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x88,0x58,0xA5,0x26, ++0x10,0x00,0x64,0x26, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xCB,0xFF,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0xB0,0x1B,0x43,0x96, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x62,0x30, ++0x0D,0x00,0x40,0x14, ++0x04,0x00,0x62,0x30, ++0x83,0x00,0x40,0x14, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x70,0x24, ++0x0B,0x3E,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x44,0x24, ++0xFF,0x00,0x83,0x30, ++0x0B,0x00,0x02,0x24, ++0x45,0x00,0x62,0x10, ++0x21,0x18,0x00,0x00, ++0xA1,0x16,0x00,0x08, ++0x0B,0x3E,0x04,0xA2, ++0x00,0x60,0x03,0x40, ++0x01,0x00,0x61,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xD4,0x1E,0x42,0x8E, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xD4,0x1E,0x42,0xAE, ++0x00,0x60,0x83,0x40, ++0xFB,0x17,0x00,0x08, ++0x02,0x80,0x03,0x3C, ++0x15,0x5F,0x62,0x91, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x42,0x24, ++0x15,0x5F,0x62,0xA1, ++0xBD,0x16,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0xFC,0xE2,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xE6,0x5D,0x46,0x90, ++0x01,0x00,0x03,0x24, ++0x10,0x00,0xC3,0x10, ++0x02,0x80,0x03,0x3C, ++0x53,0x16,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0x30,0x1F,0x64,0x24, ++0x0A,0x3E,0x83,0x90, ++0x03,0x00,0x02,0x24, ++0x62,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x91,0x3E,0x86,0xA0, ++0x53,0x16,0x00,0x0C, ++0x90,0x3E,0x80,0xA0, ++0x21,0x18,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x62,0x91, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x62,0x91, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x15,0x5F,0x62,0xA1, ++0x00,0x00,0xE2,0x92, ++0xFB,0xFF,0x03,0x24, ++0x01,0x00,0x06,0x24, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0xE2,0xA2, ++0x11,0x17,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xE6,0x5D,0x43,0x90, ++0x01,0x00,0x11,0x24, ++0x53,0x00,0x71,0x10, ++0x0B,0x3E,0x00,0xA2, ++0x02,0x80,0x02,0x3C, ++0xEA,0x5D,0x44,0x90, ++0x02,0x00,0x03,0x24, ++0x6E,0xFF,0x83,0x14, ++0x21,0x18,0x00,0x00, ++0x00,0x00,0x87,0x8E, ++0x24,0x00,0x64,0x26, ++0x2A,0x00,0x05,0x24, ++0xFF,0x3F,0xE7,0x30, ++0xDC,0xFF,0xE7,0x24, ++0x55,0x1D,0x00,0x0C, ++0x20,0x00,0xA6,0x27, ++0x65,0xFF,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x62,0x30, ++0x4D,0x00,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x01,0x00,0x62,0x30, ++0x4B,0x00,0x40,0x14, ++0x30,0x1F,0x85,0x24, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0xAA,0x00,0x71,0x10, ++0x00,0x00,0x00,0x00, ++0x10,0x23,0x02,0x8E, ++0xFF,0xEF,0x03,0x24, ++0x00,0x08,0x42,0x34, ++0x24,0x10,0x43,0x00, ++0x10,0x23,0x02,0xAE, ++0xBE,0x17,0x00,0x08, ++0x21,0x18,0x00,0x00, ++0x03,0x00,0xA2,0x90, ++0x02,0x80,0x04,0x3C, ++0x10,0x5F,0xE2,0xA0, ++0x02,0x00,0xA3,0x90, ++0x21,0x30,0x80,0x00, ++0x11,0x5F,0x83,0xA0, ++0x11,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x22,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x10,0x5F,0xE2,0x90, ++0x00,0x00,0x00,0x00, ++0x11,0x5F,0xC2,0xA0, ++0x2A,0x17,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x76,0x26, ++0x3B,0x51,0x00,0x0C, ++0x21,0x20,0xC0,0x02, ++0x20,0x00,0x10,0x24, ++0x32,0x00,0x50,0x10, ++0x21,0xA8,0x40,0x00, ++0x00,0x60,0x05,0x40, ++0x01,0x00,0xA1,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x80,0x18,0x15,0x00, ++0x21,0x18,0x75,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0xC0,0x18,0x03,0x00, ++0x21,0x18,0x64,0x00, ++0x0C,0x1E,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x0C,0x1E,0x62,0xAC, ++0x00,0x60,0x85,0x40, ++0xBE,0x17,0x00,0x08, ++0x21,0x18,0x00,0x00, ++0x90,0x3E,0x86,0xA0, ++0x53,0x16,0x00,0x0C, ++0x91,0x3E,0x80,0xA0, ++0x21,0x18,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x11,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x11,0x5F,0xC2,0xA0, ++0x2A,0x17,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x64,0x12,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x4D,0x18,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0x01,0x00,0x02,0x24, ++0x90,0xE2,0x84,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0xA2,0xA2, ++0x02,0x80,0x04,0x3C, ++0x78,0xE2,0x84,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0xA0,0xA2, ++0x30,0x1F,0x85,0x24, ++0x10,0x23,0xA2,0x8C, ++0xFF,0xEF,0x03,0x24, ++0xFF,0xF7,0x04,0x24, ++0x24,0x10,0x43,0x00, ++0x24,0x10,0x44,0x00, ++0x21,0x18,0x00,0x00, ++0xBE,0x17,0x00,0x08, ++0x10,0x23,0xA2,0xAC, ++0xFF,0xFF,0x04,0x24, ++0xE3,0x50,0x00,0x0C, ++0x21,0x28,0xC0,0x02, ++0xCB,0xFF,0x50,0x10, ++0x21,0xA8,0x40,0x00, ++0x00,0x00,0x87,0x8E, ++0x24,0x00,0x70,0x26, ++0x21,0x20,0x00,0x02, ++0xFF,0x3F,0xE7,0x30, ++0xDC,0xFF,0xE7,0x24, ++0x01,0x00,0x05,0x24, ++0x55,0x1D,0x00,0x0C, ++0x20,0x00,0xA6,0x27, ++0xDF,0xFD,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x20,0x00,0xA6,0x8F, ++0x02,0x00,0x45,0x24, ++0x10,0x52,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0x00,0x00,0x87,0x8E, ++0x21,0x20,0x00,0x02, ++0x32,0x00,0x05,0x24, ++0xFF,0x3F,0xE7,0x30, ++0xDC,0xFF,0xE7,0x24, ++0x20,0x00,0xB1,0x8F, ++0x55,0x1D,0x00,0x0C, ++0x20,0x00,0xA6,0x27, ++0x09,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0xA6,0x8F, ++0x10,0x00,0xA4,0x27, ++0x21,0x20,0x91,0x00, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x45,0x24, ++0x20,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x88,0x23,0x02, ++0x10,0x00,0xA4,0x27, ++0x7D,0x50,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x0F,0x00,0x42,0x30, ++0x00,0x81,0x15,0x00, ++0x21,0x28,0x20,0x02, ++0x10,0x00,0xA4,0x27, ++0x25,0x80,0x02,0x02, ++0xC2,0x50,0x00,0x0C, ++0xFF,0xFF,0x10,0x32, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0x21,0x38,0x40,0x00, ++0x21,0x28,0xA0,0x02, ++0x21,0x30,0x00,0x02, ++0x2F,0x55,0x00,0x0C, ++0x10,0xE3,0x84,0x24, ++0x21,0x20,0x00,0x02, ++0xC1,0x5B,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x8E,0x3E,0x42,0x92, ++0x21,0x20,0xC0,0x02, ++0x21,0x28,0xA0,0x02, ++0x01,0x00,0x42,0x24, ++0x9C,0x0E,0x00,0x0C, ++0x8E,0x3E,0x42,0xA2, ++0x83,0x18,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x43,0x24, ++0xE4,0xE2,0x84,0x24, ++0x05,0x00,0x02,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0x62,0xA0, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x43,0x24, ++0xD0,0xE2,0x84,0x24, ++0x02,0x00,0x02,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0x62,0xA0, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x43,0x24, ++0xBC,0xE2,0x84,0x24, ++0x04,0x00,0x02,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0x62,0xA0, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x43,0x24, ++0xA8,0xE2,0x84,0x24, ++0x03,0x00,0x02,0x24, ++0x18,0x18,0x00,0x08, ++0x0A,0x3E,0x62,0xA0, ++0x10,0x23,0x02,0x8E, ++0xFF,0xF7,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x00,0x10,0x42,0x34, ++0x6C,0x18,0x00,0x08, ++0x10,0x23,0x02,0xAE, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x10,0x3C, ++0x30,0x1F,0x02,0x26, ++0x14,0x00,0xBF,0xAF, ++0xB0,0x1B,0x43,0x94, ++0x21,0x28,0x00,0x00, ++0x00,0x01,0x62,0x30, ++0x03,0x00,0x40,0x10, ++0x01,0x00,0x64,0x30, ++0x06,0x00,0x80,0x14, ++0x00,0x10,0x62,0x30, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0xA0,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x08,0x00,0x40,0x14, ++0x02,0x00,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF6,0x5E,0x43,0x90, ++0x0C,0x00,0x02,0x24, ++0x0F,0x00,0x63,0x30, ++0x0A,0x00,0x62,0x10, ++0x21,0x20,0x00,0x00, ++0x02,0x00,0x03,0x3C, ++0x30,0x1F,0x04,0x26, ++0x20,0xBF,0x63,0x34, ++0x08,0x39,0x83,0xAC, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0xA0,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xCD,0x4E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x03,0x3C, ++0x30,0x1F,0x04,0x26, ++0x20,0xBF,0x63,0x34, ++0x33,0x19,0x00,0x08, ++0x08,0x39,0x83,0xAC, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x25,0x26, ++0x6C,0x3B,0xA2,0x8C, ++0x00,0x10,0x03,0x3C, ++0x24,0x10,0x43,0x00, ++0x21,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x9B,0x3B,0xA6,0x90, ++0x9C,0x3B,0xA4,0x90, ++0xFF,0x00,0xC3,0x30, ++0x40,0x10,0x03,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x01,0x00,0x84,0x24, ++0x80,0x10,0x02,0x00, ++0xFF,0x00,0x83,0x30, ++0x21,0x10,0x45,0x00, ++0x21,0x10,0x43,0x00, ++0x9C,0x3B,0xA4,0xA0, ++0x38,0x3B,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x21,0x00,0x60,0x10, ++0x01,0x00,0xC2,0x24, ++0xFF,0x00,0xC2,0x30, ++0x22,0x00,0x40,0x14, ++0x30,0x1F,0x30,0x26, ++0x9C,0x3B,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x45,0x00, ++0x38,0x3B,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x64,0x30, ++0x1A,0x00,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x67,0x3B,0xA2,0x90, ++0x30,0x3B,0xA3,0xA0, ++0x4F,0x0C,0x00,0x0C, ++0x31,0x3B,0xA2,0xA0, ++0x30,0x1F,0x30,0x26, ++0x70,0x3B,0x03,0x8E, ++0x01,0x00,0x02,0x24, ++0x7C,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x6C,0x3B,0x03,0x8E, ++0x00,0x10,0x02,0x3C, ++0x3C,0x00,0x04,0x24, ++0x26,0x18,0x62,0x00, ++0x98,0x38,0x04,0xAE, ++0x6C,0x3B,0x03,0xAE, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x21,0x30,0x40,0x00, ++0x9B,0x3B,0xA2,0xA0, ++0x5C,0x19,0x00,0x08, ++0x9C,0x3B,0xA0,0xA0, ++0x99,0x3B,0x03,0x92, ++0x9A,0x3B,0x02,0x92, ++0xFF,0x00,0x64,0x30, ++0x30,0x3B,0x03,0xA2, ++0x4F,0x0C,0x00,0x0C, ++0x31,0x3B,0x02,0xA2, ++0xB0,0x1B,0x03,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x62,0x30, ++0x09,0x00,0x40,0x10, ++0x01,0x00,0x62,0x30, ++0x08,0x00,0x40,0x10, ++0x30,0x1F,0x30,0x26, ++0x02,0x80,0x02,0x3C, ++0xF6,0x5E,0x43,0x90, ++0x0C,0x00,0x02,0x24, ++0x0F,0x00,0x63,0x30, ++0x61,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x30,0x26, ++0x9E,0x3B,0x04,0x96, ++0xA0,0x3B,0x05,0x92, ++0x12,0x0D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xC1,0x48,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x6C,0x3B,0x00,0xAE, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x3F,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x3C,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x41,0x00,0x40,0x14, ++0x04,0x00,0x04,0x24, ++0x02,0x80,0x03,0x3C, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x15,0x5F,0x62,0xA0, ++0x00,0x60,0x92,0x40, ++0x25,0xB0,0x07,0x3C, ++0x30,0x1F,0x30,0x26, ++0xB0,0x1B,0x04,0x96, ++0x48,0x00,0xE6,0x34, ++0x00,0x00,0xC3,0x8C, ++0xFF,0xEF,0x84,0x30, ++0x80,0x00,0x02,0x3C, ++0x25,0x18,0x62,0x00, ++0x00,0x01,0x85,0x30, ++0x00,0x00,0xC3,0xAC, ++0x02,0x80,0x08,0x3C, ++0x05,0x00,0xA0,0x10, ++0xB0,0x1B,0x04,0xA6, ++0x00,0x00,0xC2,0x8C, ++0x04,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0xC2,0xAC, ++0x30,0x1F,0x02,0x8D, ++0xFF,0xF0,0x03,0x24, ++0xA1,0x3B,0x05,0x92, ++0x24,0x10,0x43,0x00, ++0x00,0x01,0x42,0x34, ++0x0F,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x10,0x00,0x42,0x34, ++0xF0,0xFF,0x03,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x24,0x10,0x43,0x00, ++0x4C,0x00,0xE3,0x34, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0x65,0xA0, ++0x64,0x03,0xE4,0x34, ++0x07,0x00,0x03,0x24, ++0x20,0x00,0xBD,0x27, ++0x30,0x1F,0x02,0xAD, ++0x00,0x00,0x83,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x15,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x01,0x00,0x05,0x24, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0xB8,0x19,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x13,0x0F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x70,0x19,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0xB0,0x19,0x00,0x08, ++0x02,0x80,0x03,0x3C, ++0xCD,0x4E,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x94,0x19,0x00,0x08, ++0x30,0x1F,0x30,0x26, ++0x0C,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x3F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x17,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x24,0x08,0x42,0x34, ++0x00,0x00,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x02,0x63,0x30, ++0x15,0x00,0x60,0x14, ++0x01,0x00,0x02,0x24, ++0x05,0x00,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x82,0x21,0x03,0x00, ++0x28,0x00,0x82,0x10, ++0xF5,0xFF,0x02,0x24, ++0x02,0x00,0x82,0x28, ++0x3B,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x2F,0x00,0x82,0x10, ++0xE9,0xFF,0x02,0x24, ++0x03,0x00,0x02,0x24, ++0x24,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x05,0x00,0xC2,0x24, ++0x04,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x42,0x10,0x02,0x00, ++0x08,0x00,0xE0,0x03, ++0x96,0xFF,0x42,0x24, ++0x05,0x00,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x60,0x00,0x64,0x30, ++0x42,0x21,0x04,0x00, ++0x0F,0x00,0x82,0x10, ++0x1F,0x00,0x62,0x30, ++0x02,0x00,0x82,0x28, ++0x1F,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x16,0x00,0x82,0x10, ++0x1F,0x00,0x62,0x30, ++0x03,0x00,0x02,0x24, ++0xEC,0xFF,0x82,0x14, ++0x00,0x00,0x00,0x00, ++0x1F,0x00,0x62,0x30, ++0x40,0x10,0x02,0x00, ++0xDD,0xFF,0x03,0x24, ++0x23,0x30,0x62,0x00, ++0x08,0x00,0xE0,0x03, ++0x05,0x00,0xC2,0x24, ++0x40,0x10,0x02,0x00, ++0xF5,0xFF,0x03,0x24, ++0x2A,0x1A,0x00,0x08, ++0x23,0x30,0x62,0x00, ++0x3E,0x00,0x63,0x30, ++0x23,0x30,0x43,0x00, ++0x08,0x00,0xE0,0x03, ++0x05,0x00,0xC2,0x24, ++0x3E,0x00,0x63,0x30, ++0xDD,0xFF,0x02,0x24, ++0x32,0x1A,0x00,0x08, ++0x23,0x30,0x43,0x00, ++0x40,0x10,0x02,0x00, ++0xE9,0xFF,0x03,0x24, ++0x2A,0x1A,0x00,0x08, ++0x23,0x30,0x62,0x00, ++0x3E,0x00,0x63,0x30, ++0x32,0x1A,0x00,0x08, ++0x23,0x30,0x43,0x00, ++0xD1,0xFF,0x80,0x14, ++0x00,0x00,0x00,0x00, ++0x1F,0x00,0x62,0x30, ++0x40,0x10,0x02,0x00, ++0xF8,0xFF,0x03,0x24, ++0x2A,0x1A,0x00,0x08, ++0x23,0x30,0x62,0x00, ++0xCA,0xFF,0x80,0x14, ++0x00,0x00,0x00,0x00, ++0x3E,0x00,0x63,0x30, ++0xF8,0xFF,0x02,0x24, ++0x32,0x1A,0x00,0x08, ++0x23,0x30,0x43,0x00, ++0x63,0x00,0x82,0x24, ++0x77,0x00,0x42,0x2C, ++0x00,0x00,0x85,0x28, ++0x04,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x64,0x00,0x82,0x24, ++0x64,0x00,0x03,0x24, ++0x0B,0x18,0x45,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x02,0x80,0x09,0x3C, ++0x30,0x1F,0x28,0x25, ++0x80,0x36,0x06,0x8D, ++0xFF,0xFF,0x02,0x34, ++0x3F,0x00,0xC2,0x10, ++0x21,0x38,0x80,0x00, ++0x2B,0x10,0xC7,0x00, ++0x30,0x00,0x40,0x10, ++0x02,0x19,0x06,0x00, ++0x21,0x10,0xC7,0x00, ++0x23,0x10,0x43,0x00, ++0x10,0x00,0x46,0x24, ++0x80,0x36,0x06,0xAD, ++0x30,0x1F,0x26,0x25, ++0x04,0x00,0xC4,0x8C, ++0x84,0x36,0x02,0xAD, ++0xFF,0xFF,0x02,0x34, ++0x2F,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x87,0x00, ++0x1F,0x00,0x40,0x10, ++0x02,0x19,0x04,0x00, ++0x21,0x10,0x87,0x00, ++0x23,0x10,0x43,0x00, ++0x10,0x00,0x44,0x24, ++0x04,0x00,0xC4,0xAC, ++0x84,0x36,0xC2,0xAC, ++0xC0,0x10,0x05,0x00, ++0x21,0x10,0x45,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x45,0x00, ++0x30,0x1F,0x23,0x25, ++0x80,0x10,0x02,0x00, ++0x21,0x28,0x43,0x00, ++0x0C,0x24,0xA6,0x8C, ++0x00,0x21,0x07,0x00, ++0xFF,0xFF,0xC2,0x38, ++0x0A,0x30,0x82,0x00, ++0x2B,0x18,0xC7,0x00, ++0x07,0x00,0x60,0x10, ++0x21,0x10,0xC7,0x00, ++0x02,0x19,0x06,0x00, ++0x23,0x10,0x43,0x00, ++0x10,0x00,0x46,0x24, ++0x0C,0x24,0xA6,0xAC, ++0x08,0x00,0xE0,0x03, ++0x10,0x24,0xA2,0xAC, ++0x02,0x19,0x06,0x00, ++0x23,0x10,0x43,0x00, ++0x0C,0x24,0xA2,0xAC, ++0x08,0x00,0xE0,0x03, ++0x10,0x24,0xA2,0xAC, ++0x21,0x10,0x87,0x00, ++0x23,0x10,0x43,0x00, ++0x70,0x1A,0x00,0x08, ++0x04,0x00,0xC2,0xAC, ++0x21,0x10,0xC7,0x00, ++0x30,0x1F,0x26,0x25, ++0x04,0x00,0xC4,0x8C, ++0x23,0x10,0x43,0x00, ++0x80,0x36,0x02,0xAD, ++0x84,0x36,0x02,0xAD, ++0xFF,0xFF,0x02,0x34, ++0xD4,0xFF,0x82,0x14, ++0x2B,0x10,0x87,0x00, ++0x00,0x21,0x07,0x00, ++0x69,0x1A,0x00,0x08, ++0x04,0x00,0xC4,0xAC, ++0x00,0x31,0x04,0x00, ++0x5C,0x1A,0x00,0x08, ++0x80,0x36,0x06,0xAD, ++0xA0,0xFF,0xBD,0x27, ++0x54,0x00,0xB7,0xAF, ++0x5C,0x00,0xBF,0xAF, ++0x58,0x00,0xBE,0xAF, ++0x50,0x00,0xB6,0xAF, ++0x4C,0x00,0xB5,0xAF, ++0x48,0x00,0xB4,0xAF, ++0x44,0x00,0xB3,0xAF, ++0x40,0x00,0xB2,0xAF, ++0x3C,0x00,0xB1,0xAF, ++0x38,0x00,0xB0,0xAF, ++0x02,0x80,0x17,0x3C, ++0x02,0x80,0x02,0x3C, ++0x64,0x57,0x45,0x8C, ++0x00,0x80,0x04,0x3C, ++0x74,0x6A,0x83,0x24, ++0x64,0x57,0x44,0x24, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x7F,0x00,0xA4,0x10, ++0x02,0x80,0x09,0x3C, ++0x02,0x80,0x02,0x3C, ++0x40,0xEB,0x29,0x25, ++0x44,0xEB,0x42,0x24, ++0x00,0x00,0x35,0x8D, ++0x00,0x00,0x53,0x8C, ++0x02,0x80,0x03,0x3C, ++0x48,0xEB,0x63,0x24, ++0x00,0x00,0x7E,0x8C, ++0x34,0x38,0xB4,0x8E, ++0x21,0x20,0x00,0x00, ++0x21,0xB0,0x00,0x00, ++0x08,0x00,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x62,0xAE, ++0x08,0x00,0x83,0x96, ++0x02,0x80,0x02,0x3C, ++0xB0,0x01,0x00,0x0C, ++0x25,0x90,0x62,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xAC,0x1B,0xA3,0x96, ++0xD0,0x37,0xA2,0x8E, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0xC2,0xAF, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0xF4,0x1A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x17,0x00,0xC7,0x90, ++0x16,0x00,0xC8,0x90, ++0x32,0x3B,0xA2,0x96, ++0xFF,0x00,0xE3,0x30, ++0x00,0x1A,0x03,0x00, ++0xFF,0x00,0x05,0x31, ++0x25,0x18,0x65,0x00, ++0xB7,0x00,0x43,0x10, ++0x24,0xE3,0x24,0x25, ++0xFF,0x00,0xE2,0x30, ++0xFF,0x00,0x03,0x31, ++0x00,0x12,0x02,0x00, ++0x25,0x10,0x43,0x00, ++0x32,0x3B,0xA2,0xA6, ++0x01,0x00,0xC4,0x90, ++0x00,0x00,0xC2,0x90, ++0x00,0x22,0x04,0x00, ++0x88,0x0C,0x00,0x0C, ++0x25,0x20,0x82,0x00, ++0x40,0x18,0x02,0x00, ++0x21,0x18,0x62,0x00, ++0x80,0x18,0x03,0x00, ++0x94,0xDE,0xE2,0x26, ++0x21,0x18,0x62,0x00, ++0x08,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x09,0xF8,0x40,0x00, ++0x21,0x20,0x20,0x02, ++0x0C,0x00,0x82,0x8E, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0xC2,0x02, ++0x2C,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x42,0x8E, ++0x21,0x88,0x40,0x02, ++0x42,0x1B,0x02,0x00, ++0x78,0x00,0x63,0x30, ++0x02,0x26,0x02,0x00, ++0xFF,0x3F,0x42,0x30, ++0x21,0x10,0x43,0x00, ++0x03,0x00,0x84,0x30, ++0x21,0x10,0x44,0x00, ++0x18,0x00,0x42,0x24, ++0xFF,0xFF,0x50,0x30, ++0x7F,0x00,0x02,0x32, ++0x80,0x00,0x03,0x26, ++0x00,0x00,0x70,0xAE, ++0x02,0x00,0x40,0x10, ++0x80,0xFF,0x05,0x32, ++0x80,0xFF,0x65,0x30, ++0x00,0x00,0x65,0xAE, ++0x02,0x00,0x22,0x96, ++0x21,0x18,0xC5,0x02, ++0xFF,0xFF,0x76,0x30, ++0x0F,0x00,0x42,0x30, ++0x00,0x00,0x62,0xAE, ++0x00,0x00,0x23,0x8E, ++0x21,0x90,0x45,0x02, ++0x42,0x13,0x03,0x00, ++0x78,0x00,0x42,0x30, ++0x02,0x1E,0x03,0x00, ++0x21,0x10,0x51,0x00, ++0x03,0x00,0x63,0x30, ++0x21,0x10,0x43,0x00, ++0x18,0x00,0x46,0x24, ++0x00,0x00,0x66,0xAE, ++0x01,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x12,0x02,0x00, ++0x00,0x08,0x42,0x30, ++0xB9,0xFF,0x40,0x14, ++0x02,0x80,0x09,0x3C, ++0x16,0x00,0xC8,0x90, ++0x17,0x00,0xC7,0x90, ++0xDD,0x1A,0x00,0x08, ++0xFF,0x00,0xE2,0x30, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x04,0x00,0x83,0x8E, ++0x00,0x00,0x82,0x8E, ++0x21,0x20,0x80,0x02, ++0x00,0x00,0x62,0xAC, ++0x04,0x00,0x43,0xAC, ++0x00,0x00,0x94,0xAE, ++0x3D,0x24,0x00,0x0C, ++0x04,0x00,0x94,0xAE, ++0x00,0x60,0x90,0x40, ++0x02,0x80,0x02,0x3C, ++0x64,0x57,0x43,0x8C, ++0x64,0x57,0x42,0x24, ++0x8B,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x40,0xEB,0x63,0x24, ++0x00,0x00,0x71,0x8C, ++0x25,0xB0,0x10,0x3C, ++0x04,0x01,0x02,0x36, ++0x00,0x00,0x43,0x8C, ++0xE8,0x37,0x27,0x8E, ++0x00,0x00,0x00,0x00, ++0xC8,0x00,0xE3,0x10, ++0xEC,0x37,0x23,0xAE, ++0x2B,0x10,0x67,0x00, ++0xD2,0x00,0x40,0x14, ++0x2B,0x10,0xE3,0x00, ++0x08,0x01,0x40,0x14, ++0x02,0x80,0x09,0x3C, ++0x30,0x1F,0x24,0x25, ++0xBC,0x37,0x83,0x94, ++0x02,0x80,0x02,0x3C, ++0x21,0x80,0x00,0x00, ++0x2F,0x00,0xC0,0x1A, ++0x25,0xA8,0x62,0x00, ++0x21,0x98,0x80,0x00, ++0x21,0x90,0x00,0x00, ++0x01,0x00,0x1E,0x24, ++0x21,0x88,0x55,0x02, ++0x00,0x00,0x22,0x8E, ++0x98,0x3E,0x63,0x8E, ++0xFF,0x3F,0x42,0x30, ++0x21,0x18,0x62,0x00, ++0x98,0x3E,0x63,0xAE, ++0x00,0x60,0x04,0x40, ++0x01,0x00,0x81,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xD4,0x1E,0x62,0x8E, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xD4,0x1E,0x62,0xAE, ++0x00,0x60,0x84,0x40, ++0x04,0x00,0x22,0x8E, ++0x02,0x00,0x03,0x24, ++0x02,0x17,0x02,0x00, ++0x03,0x00,0x42,0x30, ++0x39,0x00,0x43,0x10, ++0x02,0x80,0x03,0x3C, ++0x21,0x10,0x55,0x02, ++0x00,0x00,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x60,0x10, ++0x01,0x00,0x02,0x26, ++0x04,0x00,0x22,0x8E, ++0x00,0xF0,0x03,0x3C, ++0x00,0x20,0x04,0x3C, ++0x24,0x10,0x43,0x00, ++0x10,0x00,0x44,0x10, ++0x02,0x80,0x09,0x3C, ++0x06,0x00,0x02,0x26, ++0x00,0x00,0x23,0x8E, ++0xFF,0xFF,0x50,0x30, ++0x82,0x16,0x03,0x00, ++0x01,0x00,0x42,0x30, ++0x52,0x00,0x5E,0x10, ++0x02,0x80,0x04,0x3C, ++0x80,0x90,0x10,0x00, ++0x2A,0x10,0x56,0x02, ++0xD7,0xFF,0x40,0x14, ++0x21,0x88,0x55,0x02, ++0x3D,0x24,0x00,0x0C, ++0x21,0x20,0x80,0x02, ++0x08,0x1C,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x40,0xEB,0x29,0x25, ++0x00,0x00,0x25,0x8D, ++0x00,0x00,0x00,0x00, ++0xD4,0x1D,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xD4,0x1D,0xA2,0xAC, ++0x0C,0x00,0x24,0x8E, ++0x0C,0x00,0x02,0x24, ++0x3F,0x00,0x83,0x30, ++0xBD,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x02,0x24, ++0xB3,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x3F,0x00,0x83,0x30, ++0x0E,0x00,0x02,0x24, ++0xE0,0xFF,0x62,0x14, ++0x06,0x00,0x02,0x26, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0xE0,0x1D,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x69,0x1B,0x00,0x08, ++0xE0,0x1D,0x62,0xAC, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0x1A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xF4,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xC6,0xFF,0x40,0x10, ++0x21,0x10,0x55,0x02, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xF4,0x5E,0x62,0x90, ++0x02,0x80,0x04,0x3C, ++0xF8,0xE8,0x85,0x24, ++0xFF,0x00,0x42,0x30, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x45,0x00, ++0x00,0x00,0x43,0x8C, ++0x00,0x00,0x24,0x8E, ++0x04,0x00,0x25,0x8E, ++0x09,0xF8,0x60,0x00, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x09,0x3C, ++0xF6,0x5E,0x22,0x91, ++0x0C,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x10, ++0x02,0x80,0x03,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x5F,0x1B,0x00,0x08, ++0x21,0x10,0x55,0x02, ++0x0D,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xF8,0xFF,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x13,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x13,0x5F,0x82,0xA0, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x5F,0x1B,0x00,0x08, ++0x21,0x10,0x55,0x02, ++0x30,0x1F,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x0F,0x00,0x42,0x30, ++0x05,0x00,0x5E,0x10, ++0xC2,0x13,0x03,0x00, ++0x1E,0x00,0x42,0x30, ++0x21,0x10,0x50,0x00, ++0x70,0x1B,0x00,0x08, ++0xFF,0xFF,0x50,0x30, ++0x02,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x14,0x03,0x00, ++0x0F,0x00,0x42,0x30, ++0x14,0x00,0x40,0x14, ++0x02,0x17,0x03,0x00, ++0x03,0x00,0x44,0x30, ++0x08,0x00,0x80,0x10, ++0x00,0xC0,0x02,0x3C, ++0x24,0x10,0x62,0x00, ++0x0E,0x00,0x40,0x14, ++0x03,0x00,0x02,0x24, ++0x0C,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x80,0x28,0x10,0x00, ++0x21,0x28,0xB5,0x00, ++0xF7,0x19,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x4C,0x1A,0x00,0x0C, ++0x21,0x20,0x40,0x00, ++0x21,0x20,0x40,0x00, ++0x56,0x1A,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x02,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x8B,0x00,0x5E,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x63,0x92, ++0x02,0x00,0x02,0x24, ++0x71,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x63,0x30, ++0x08,0x00,0x7E,0x10, ++0xD0,0x02,0x02,0x24, ++0x00,0x00,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0xC2,0x13,0x03,0x00, ++0x1E,0x00,0x42,0x30, ++0x21,0x10,0x50,0x00, ++0x70,0x1B,0x00,0x08, ++0xFF,0xFF,0x50,0x30, ++0x80,0x36,0x62,0xAE, ++0x00,0x00,0x23,0x8E, ++0xFA,0x1B,0x00,0x08, ++0xC2,0x13,0x03,0x00, ++0x02,0x80,0x09,0x3C, ++0x00,0x01,0x02,0x36, ++0x30,0x1F,0x29,0x25, ++0x00,0x00,0x47,0xAC, ++0xE8,0x37,0x27,0xAD, ++0x02,0x80,0x02,0x3C, ++0x08,0x04,0x44,0x24, ++0x21,0x28,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0xAA,0x1A,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0xF0,0x37,0x22,0x8E, ++0xFF,0xFF,0x73,0x30, ++0x23,0x10,0x47,0x00, ++0xFF,0xFF,0x52,0x30, ++0x21,0x18,0x53,0x02, ++0xFF,0xFF,0x76,0x30, ++0x25,0x24,0x00,0x0C, ++0x21,0x20,0xC0,0x02, ++0xEF,0xFF,0x40,0x10, ++0x21,0xA0,0x40,0x00, ++0x08,0x00,0x42,0x8C, ++0xE8,0x37,0x26,0x8E, ++0x21,0x38,0x40,0x02, ++0x21,0x18,0x56,0x00, ++0xB8,0x37,0x23,0xAE, ++0x21,0x28,0x40,0x00, ++0x08,0x00,0x04,0x24, ++0xBC,0x37,0x22,0xAE, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x08,0x00,0x04,0x24, ++0xBC,0x37,0x25,0x8E, ++0x24,0x10,0x02,0x3C, ++0x00,0x01,0x10,0x36, ++0x00,0x00,0x02,0xAE, ++0x21,0x38,0x60,0x02, ++0x21,0x28,0xB2,0x00, ++0x08,0x00,0x04,0x24, ++0x24,0x10,0x06,0x3C, ++0xE8,0x37,0x22,0xAE, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xEC,0x37,0x23,0x8E, ++0x08,0x00,0x04,0x24, ++0xB0,0x01,0x00,0x0C, ++0xE8,0x37,0x23,0xAE, ++0xE8,0x37,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x02,0xAE, ++0x40,0x1B,0x00,0x08, ++0x02,0x80,0x09,0x3C, ++0xDC,0x1D,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xDC,0x1D,0xA2,0xAC, ++0x0C,0x00,0x24,0x8E, ++0x88,0x1B,0x00,0x08, ++0x3F,0x00,0x83,0x30, ++0xD8,0x1D,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xD8,0x1D,0xA2,0xAC, ++0x0C,0x00,0x24,0x8E, ++0x84,0x1B,0x00,0x08, ++0x3F,0x00,0x83,0x30, ++0x23,0x10,0x67,0x00, ++0xFF,0xFF,0x56,0x30, ++0x25,0x24,0x00,0x0C, ++0x21,0x20,0xC0,0x02, ++0x4A,0x00,0x40,0x10, ++0x21,0xA0,0x40,0x00, ++0x08,0x00,0x42,0x8C, ++0xE8,0x37,0x26,0x8E, ++0x08,0x00,0x04,0x24, ++0x21,0x18,0x56,0x00, ++0xB8,0x37,0x23,0xAE, ++0x21,0x28,0x40,0x00, ++0x21,0x38,0xC0,0x02, ++0xBC,0x37,0x22,0xAE, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xEC,0x37,0x23,0x8E, ++0x08,0x00,0x04,0x24, ++0xB0,0x01,0x00,0x0C, ++0xE8,0x37,0x23,0xAE, ++0xE8,0x37,0x23,0x8E, ++0x00,0x01,0x02,0x36, ++0x00,0x00,0x43,0xAC, ++0x40,0x1B,0x00,0x08, ++0x02,0x80,0x09,0x3C, ++0x04,0x00,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x14,0x03,0x00, ++0x0F,0x00,0x42,0x30, ++0x08,0x00,0x42,0x28, ++0x8B,0xFF,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0x02,0x17,0x03,0x00, ++0x03,0x00,0x42,0x30, ++0x86,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x80,0x28,0x10,0x00, ++0x21,0x28,0xB5,0x00, ++0xF7,0x19,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x4C,0x1A,0x00,0x0C, ++0x21,0x20,0x40,0x00, ++0x21,0x20,0x40,0x00, ++0x56,0x1A,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0xF1,0x1B,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x04,0x00,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x14,0x03,0x00, ++0x0F,0x00,0x42,0x30, ++0x08,0x00,0x42,0x28, ++0x06,0x00,0x40,0x10, ++0x00,0xC0,0x02,0x3C, ++0x02,0x17,0x03,0x00, ++0x03,0x00,0x42,0x30, ++0x0C,0x00,0x40,0x10, ++0x80,0x28,0x10,0x00, ++0x00,0xC0,0x02,0x3C, ++0x24,0x10,0x62,0x00, ++0x68,0xFF,0x40,0x14, ++0x02,0x17,0x03,0x00, ++0x03,0x00,0x42,0x30, ++0x03,0x00,0x03,0x24, ++0x64,0xFF,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x62,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x80,0x28,0x10,0x00, ++0x21,0x28,0xB5,0x00, ++0xF7,0x19,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x4C,0x1A,0x00,0x0C, ++0x21,0x20,0x40,0x00, ++0x21,0x20,0x40,0x00, ++0x56,0x1A,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0xEC,0x1B,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xEC,0x37,0x23,0x8E, ++0x00,0x01,0x02,0x36, ++0x00,0x00,0x43,0xAC, ++0x07,0x1C,0x00,0x08, ++0xE8,0x37,0x23,0xAE, ++0xB8,0xFF,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x44,0x00,0xBF,0xAF, ++0x40,0x00,0xBE,0xAF, ++0x3C,0x00,0xB7,0xAF, ++0x38,0x00,0xB6,0xAF, ++0x34,0x00,0xB5,0xAF, ++0x30,0x00,0xB4,0xAF, ++0x2C,0x00,0xB3,0xAF, ++0x28,0x00,0xB2,0xAF, ++0x24,0x00,0xB1,0xAF, ++0x20,0x00,0xB0,0xAF, ++0x44,0x00,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x0E,0x00,0x40,0x04, ++0x18,0x00,0xA0,0xAF, ++0x21,0x20,0x60,0x00, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x42,0x30, ++0x64,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0xF6,0xFF,0x41,0x04, ++0x21,0x10,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x74,0x57,0x43,0x8C, ++0x00,0x80,0x06,0x3C, ++0x6C,0x72,0xC2,0x24, ++0x25,0xB0,0x05,0x3C, ++0x02,0x80,0x06,0x3C, ++0x18,0x03,0xA4,0x34, ++0x74,0x57,0xD2,0x24, ++0x00,0x00,0x82,0xAC, ++0x67,0x00,0x72,0x10, ++0x01,0x00,0x16,0x24, ++0x11,0x11,0x02,0x3C, ++0x2A,0xB0,0x03,0x3C, ++0x22,0x22,0x5E,0x34, ++0x02,0x80,0x02,0x3C, ++0x21,0xB8,0x80,0x00, ++0x05,0x00,0x74,0x34, ++0x30,0x1F,0x55,0x24, ++0x01,0x00,0x13,0x24, ++0x00,0x00,0xFE,0xAE, ++0x21,0x00,0xC0,0x12, ++0x2A,0xB0,0x03,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF4,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x40,0x10, ++0x21,0xB0,0x00,0x00, ++0x01,0x00,0x06,0x24, ++0x18,0x00,0xA6,0xAF, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x5F,0x00,0x40,0x14, ++0x04,0x00,0x04,0x24, ++0x02,0x80,0x06,0x3C, ++0xDE,0x5D,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0x55,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2A,0xB0,0x03,0x3C, ++0x06,0x00,0x63,0x34, ++0x00,0x00,0x62,0x94, ++0x44,0x38,0xB1,0x8E, ++0x25,0xB0,0x06,0x3C, ++0xB0,0x03,0xC6,0x34, ++0x00,0xFF,0x42,0x30, ++0x00,0x00,0xD1,0xAC, ++0x0F,0x00,0x40,0x18, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x4C,0xEB,0x42,0x24, ++0x50,0xEB,0x63,0x24, ++0x00,0x00,0x45,0x8C, ++0x00,0x00,0x64,0x8C, ++0x02,0x80,0x06,0x3C, ++0x54,0xEB,0xC6,0x24, ++0x00,0x00,0xC3,0x8C, ++0x00,0x00,0xA4,0xAC, ++0x00,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x42,0x30, ++0xFB,0xFF,0x40,0x1C, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x62,0x30, ++0x47,0x00,0x40,0x14, ++0x08,0x00,0x62,0x24, ++0xC2,0x10,0x03,0x00, ++0x08,0x00,0x25,0x8E, ++0x04,0x37,0xA6,0x8E, ++0xC0,0x10,0x02,0x00, ++0x20,0x00,0x42,0x24, ++0xFF,0xFF,0x47,0x30, ++0x01,0x00,0x04,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB3,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x02,0x24, ++0x00,0x00,0x93,0xA2, ++0x00,0x00,0x82,0xA2, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x04,0x00,0x23,0x8E, ++0x00,0x00,0x22,0x8E, ++0x21,0x20,0x20,0x02, ++0x00,0x00,0x62,0xAC, ++0x04,0x00,0x43,0xAC, ++0x00,0x00,0x31,0xAE, ++0x3D,0x24,0x00,0x0C, ++0x04,0x00,0x31,0xAE, ++0x00,0x60,0x90,0x40, ++0x00,0x00,0x42,0x8E, ++0x00,0x00,0x00,0x00, ++0xA3,0xFF,0x52,0x14, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF4,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x11,0x00,0x40,0x14, ++0x18,0x00,0xA0,0xAF, ++0x02,0x80,0x02,0x3C, ++0x08,0x08,0x44,0x24, ++0x21,0x28,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0xBC,0x1C,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x9B,0x30,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0xEA,0x1C,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0xE4,0x1C,0x00,0x08, ++0x02,0x80,0x06,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x06,0x3C, ++0xF5,0x5E,0xC4,0x90, ++0x01,0x00,0x05,0x24, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x36,0x1D,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x0E,0x1D,0x00,0x08, ++0xC2,0x10,0x02,0x00, ++0x10,0x00,0xE0,0x18, ++0x21,0x18,0x00,0x00, ++0x00,0x00,0xC0,0xAC, ++0x21,0x40,0x00,0x00, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x45,0x10, ++0x21,0x18,0x80,0x00, ++0x01,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x48,0x00, ++0x02,0x00,0x68,0x24, ++0x21,0x10,0x82,0x00, ++0x2B,0x18,0x07,0x01, ++0xF5,0xFF,0x60,0x14, ++0x02,0x00,0x44,0x24, ++0x21,0x18,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x01,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0xAC, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x02,0x80,0x07,0x3C, ++0x30,0x1F,0xE5,0x24, ++0x22,0x3E,0xA3,0x90, ++0xFF,0x00,0x84,0x30, ++0x80,0x10,0x04,0x00, ++0x0C,0x00,0x60,0x14, ++0x21,0x30,0x45,0x00, ++0xC8,0x00,0x02,0x24, ++0x24,0x39,0xA2,0xAC, ++0x01,0x00,0x03,0x24, ++0x30,0x1F,0xE2,0x24, ++0x04,0x18,0x83,0x00, ++0x4C,0x3E,0xA4,0xA0, ++0x22,0x3E,0x44,0x90, ++0x00,0x00,0x00,0x00, ++0x25,0x18,0x64,0x00, ++0x08,0x00,0xE0,0x03, ++0x22,0x3E,0x43,0xA0, ++0x24,0x39,0xA3,0x8C, ++0xC8,0x00,0x02,0x24, ++0x23,0x10,0x43,0x00, ++0x24,0x3E,0xC2,0xAC, ++0x01,0x00,0x03,0x24, ++0x30,0x1F,0xE2,0x24, ++0x04,0x18,0x83,0x00, ++0x22,0x3E,0x44,0x90, ++0x00,0x00,0x00,0x00, ++0x25,0x18,0x64,0x00, ++0x08,0x00,0xE0,0x03, ++0x22,0x3E,0x43,0xA0, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x30,0x1F,0x25,0x26, ++0x4C,0x3E,0xA6,0x90, ++0x01,0x00,0x02,0x24, ++0x04,0x10,0xC2,0x00, ++0x06,0x00,0x40,0x14, ++0xC9,0x00,0x10,0x24, ++0x1A,0x3E,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x30, ++0x23,0x00,0x40,0x14, ++0x21,0x20,0xC5,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x46,0x24, ++0x21,0x20,0x00,0x00, ++0x24,0x3E,0xC5,0x24, ++0x00,0x00,0xA2,0x8C, ++0x04,0x00,0xA5,0x24, ++0x05,0x00,0x40,0x10, ++0x2B,0x18,0x50,0x00, ++0x03,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x80,0x40,0x00, ++0x4C,0x3E,0xC4,0xA0, ++0x01,0x00,0x84,0x24, ++0x08,0x00,0x82,0x2C, ++0xF5,0xFF,0x40,0x14, ++0xC9,0x00,0x02,0x24, ++0x21,0x00,0x02,0x12, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x45,0x24, ++0x07,0x00,0x04,0x24, ++0x24,0x3E,0xA2,0x8C, ++0xFF,0xFF,0x84,0x24, ++0x02,0x00,0x40,0x10, ++0x23,0x18,0x50,0x00, ++0x24,0x3E,0xA3,0xAC, ++0xFA,0xFF,0x81,0x04, ++0x04,0x00,0xA5,0x24, ++0x30,0x1F,0x22,0x26, ++0x24,0x39,0x50,0xAC, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x44,0x3E,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x63,0x24, ++0xFF,0x00,0x62,0x30, ++0x03,0x00,0x42,0x2C, ++0xD8,0xFF,0x40,0x10, ++0x44,0x3E,0x83,0xA0, ++0x80,0x18,0x06,0x00, ++0x21,0x18,0x65,0x00, ++0xC8,0x00,0x02,0x24, ++0x03,0x00,0x04,0x24, ++0x21,0x28,0x00,0x00, ++0x90,0x14,0x00,0x0C, ++0x24,0x3E,0x62,0xAC, ++0x9C,0x1D,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x22,0x26, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x20,0x00,0xBD,0x27, ++0x22,0x3E,0x40,0xA0, ++0x08,0x00,0xE0,0x03, ++0x24,0x39,0x40,0xAC, ++0xB8,0xFF,0xBD,0x27, ++0x02,0x80,0x08,0x3C, ++0x02,0x80,0x0B,0x3C, ++0x02,0x80,0x0C,0x3C, ++0x40,0x00,0xBF,0xAF, ++0x3C,0x00,0xB5,0xAF, ++0x38,0x00,0xB4,0xAF, ++0x34,0x00,0xB3,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x2C,0x00,0xB1,0xAF, ++0x28,0x00,0xB0,0xAF, ++0x40,0xED,0x63,0x25, ++0x3C,0xED,0x02,0x25, ++0x44,0xED,0x84,0x25, ++0x01,0x00,0x45,0x90, ++0x01,0x00,0x66,0x90, ++0x01,0x00,0x87,0x90, ++0x3C,0xED,0x0F,0x91, ++0x02,0x00,0x4A,0x90, ++0x40,0xED,0x6E,0x91, ++0x02,0x00,0x69,0x90, ++0x44,0xED,0x8D,0x91, ++0x02,0x00,0x88,0x90, ++0x03,0x00,0x4B,0x90, ++0x03,0x00,0x6C,0x90, ++0x03,0x00,0x82,0x90, ++0x00,0x2A,0x05,0x00, ++0x00,0x32,0x06,0x00, ++0x00,0x3A,0x07,0x00, ++0x25,0x28,0xAF,0x00, ++0x25,0x30,0xCE,0x00, ++0x25,0x38,0xED,0x00, ++0x00,0x54,0x0A,0x00, ++0x00,0x4C,0x09,0x00, ++0x00,0x44,0x08,0x00, ++0x25,0x50,0x45,0x01, ++0x25,0x48,0x26,0x01, ++0x25,0x40,0x07,0x01, ++0x00,0x5E,0x0B,0x00, ++0x00,0x66,0x0C,0x00, ++0x00,0x16,0x02,0x00, ++0x02,0x80,0x04,0x3C, ++0x25,0x58,0x6A,0x01, ++0x25,0x60,0x89,0x01, ++0x25,0x10,0x48,0x00, ++0x84,0x58,0x84,0x24, ++0x10,0x00,0xAB,0xAF, ++0x18,0x00,0xAC,0xAF, ++0x34,0x4F,0x00,0x0C, ++0x20,0x00,0xA2,0xAF, ++0x10,0x00,0x42,0x30, ++0x29,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x13,0x3C, ++0x30,0x1F,0x63,0x26, ++0xC4,0x39,0x62,0x8C, ++0x0C,0x00,0x10,0x24, ++0x2B,0x10,0x02,0x02, ++0x2C,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF8,0x58,0x51,0x24, ++0x02,0x59,0x72,0x24, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xFA,0x58,0x54,0x24, ++0x26,0x1E,0x00,0x08, ++0x06,0x59,0x75,0x24, ++0xDD,0x00,0x02,0x24, ++0x21,0x20,0x14,0x02, ++0x2B,0x00,0x62,0x10, ++0x10,0x00,0xA5,0x27, ++0x21,0x10,0x11,0x02, ++0x01,0x00,0x43,0x90, ++0x30,0x1F,0x64,0x26, ++0xC4,0x39,0x82,0x8C, ++0x21,0x18,0x70,0x00, ++0x02,0x00,0x70,0x24, ++0x2B,0x10,0x02,0x02, ++0x17,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x11,0x02, ++0x00,0x00,0x43,0x90, ++0x30,0x00,0x02,0x24, ++0x21,0x20,0x12,0x02, ++0x20,0x00,0xA5,0x27, ++0xED,0xFF,0x62,0x14, ++0x04,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEE,0xFF,0x40,0x14, ++0x21,0x10,0x11,0x02, ++0x01,0x00,0x03,0x24, ++0x40,0x00,0xBF,0x8F, ++0x3C,0x00,0xB5,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0x40,0x00,0xBF,0x8F, ++0x3C,0x00,0xB5,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x21,0x18,0x00,0x00, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x15,0x02, ++0x18,0x00,0xA5,0x27, ++0xD1,0xFF,0x40,0x14, ++0x04,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xCE,0xFF,0x40,0x14, ++0x21,0x10,0x11,0x02, ++0x32,0x1E,0x00,0x08, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x38,0x5D,0x43,0x94, ++0x00,0x00,0x00,0x00, ++0x80,0x18,0x03,0x00, ++0xB8,0x0B,0x62,0x28, ++0x04,0x00,0x40,0x14, ++0xB8,0x0B,0x04,0x24, ++0x21,0x4E,0x62,0x28, ++0x20,0x4E,0x04,0x24, ++0x0B,0x20,0x62,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x21,0x38,0x80,0x00, ++0x08,0x00,0xC0,0x10, ++0xFF,0xFF,0xC3,0x24, ++0xFF,0xFF,0x06,0x24, ++0x00,0x00,0xA2,0x8C, ++0xFF,0xFF,0x63,0x24, ++0x04,0x00,0xA5,0x24, ++0x00,0x00,0xE2,0xAC, ++0xFB,0xFF,0x66,0x14, ++0x04,0x00,0xE7,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x25,0xB0,0x03,0x3C, ++0xD8,0xFF,0xBD,0x27, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x94,0x0E,0x65,0x34, ++0x9C,0x0E,0x66,0x34, ++0xA4,0x0E,0x67,0x34, ++0xAC,0x0E,0x68,0x34, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0xA9,0x8C, ++0x30,0x1F,0x58,0x24, ++0x00,0x00,0xCC,0x8C, ++0x00,0x00,0xF1,0x8C, ++0x00,0x00,0x05,0x8D, ++0x0C,0x00,0x07,0x8F, ++0x10,0x00,0x08,0x8F, ++0xFF,0x03,0x0A,0x3C, ++0xB4,0x0E,0x62,0x34, ++0x00,0x00,0x4B,0x8C, ++0x24,0x48,0x2A,0x01, ++0x00,0xFC,0x02,0x24, ++0x24,0x28,0xAA,0x00, ++0xBC,0x0E,0x66,0x34, ++0x24,0x40,0x02,0x01, ++0x02,0x4C,0x09,0x00, ++0x24,0x38,0xE2,0x00, ++0x02,0x2C,0x05,0x00, ++0xF0,0xFF,0x02,0x3C, ++0x00,0x00,0xD0,0x8C, ++0xFF,0x03,0x42,0x34, ++0xCC,0x0E,0x66,0x34, ++0x25,0x38,0xE9,0x00, ++0xC4,0x0E,0x63,0x34, ++0x25,0x40,0x05,0x01, ++0x08,0x00,0x0D,0x8F, ++0x00,0x00,0x6F,0x8C, ++0x24,0x40,0x02,0x01, ++0x00,0x00,0xCE,0x8C, ++0x24,0x38,0xE2,0x00, ++0x24,0x60,0x8A,0x01, ++0x24,0x58,0x6A,0x01, ++0xFF,0x9F,0x02,0x3C, ++0x82,0x61,0x0C,0x00, ++0x82,0x59,0x0B,0x00, ++0xFF,0xFF,0x42,0x34, ++0x0F,0xC0,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x25,0x38,0xEC,0x00, ++0x25,0x40,0x0B,0x01, ++0x24,0x68,0xA2,0x01, ++0xFF,0x00,0x0B,0x3C, ++0x00,0xFF,0x82,0x30, ++0x24,0x88,0x2A,0x02, ++0x24,0x80,0x0A,0x02, ++0x24,0x18,0x8B,0x00, ++0x24,0x40,0x05,0x01, ++0x21,0x48,0x80,0x00, ++0x02,0x62,0x02,0x00, ++0x24,0x38,0xE5,0x00, ++0x00,0x20,0x02,0x3C, ++0x24,0x70,0xCA,0x01, ++0x00,0x89,0x11,0x00, ++0x00,0x81,0x10,0x00, ++0x24,0x78,0xEA,0x01, ++0x00,0xFF,0x6B,0x35, ++0x25,0x68,0xA2,0x01, ++0x02,0x1C,0x03,0x00, ++0x02,0x80,0x04,0x3C, ++0x25,0x38,0xF1,0x00, ++0x25,0x40,0x10,0x01, ++0x02,0x7C,0x0F,0x00, ++0x02,0x74,0x0E,0x00, ++0x24,0x48,0x2B,0x01, ++0xDC,0xE3,0x84,0x24, ++0x21,0x28,0x80,0x01, ++0x21,0x30,0x60,0x00, ++0x12,0x00,0x02,0x24, ++0x08,0x00,0x0D,0xAF, ++0x0C,0x00,0x07,0xAF, ++0x10,0x00,0x08,0xAF, ++0x14,0x00,0x0F,0xA7, ++0x0A,0x00,0x20,0x15, ++0x16,0x00,0x0E,0xA7, ++0x10,0x00,0xA4,0x27, ++0xC7,0x02,0x02,0xA3, ++0xC8,0x5C,0x00,0x0C, ++0xC3,0x02,0x02,0xA3, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xC7,0x02,0x03,0xA3, ++0x2F,0x55,0x00,0x0C, ++0xC3,0x02,0x0C,0xA3, ++0xC8,0x5C,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x28,0x00,0xB6,0xAF, ++0x25,0xB0,0x02,0x3C, ++0x00,0x80,0x16,0x3C, ++0x48,0x7B,0xC3,0x26, ++0x18,0x03,0x42,0x34, ++0x30,0x00,0xBE,0xAF, ++0x2C,0x00,0xB7,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x43,0xAC, ++0x21,0x98,0x00,0x00, ++0x02,0x80,0x15,0x3C, ++0x00,0x80,0x1E,0x3C, ++0x02,0x80,0x14,0x3C, ++0x02,0x80,0x17,0x3C, ++0x25,0xB0,0x10,0x3C, ++0x18,0x03,0x02,0x36, ++0x48,0x7B,0xC3,0x26, ++0x00,0x00,0x43,0xAC, ++0x30,0x1F,0xB1,0x26, ++0x7C,0x36,0x24,0x96, ++0x70,0x03,0x05,0x36, ++0x00,0x00,0xB2,0x8C, ++0x01,0x00,0x84,0x24, ++0x03,0x00,0x40,0x12, ++0x7C,0x36,0x24,0xA6, ++0x01,0x00,0x62,0x26, ++0xFF,0xFF,0x53,0x30, ++0xFF,0x00,0x04,0x3C, ++0xFF,0xFF,0x82,0x34, ++0x2B,0x10,0x52,0x00, ++0x47,0x00,0x40,0x10, ++0x00,0x50,0x62,0x2E, ++0x00,0xFF,0x06,0x3C, ++0xFF,0x00,0xC2,0x34, ++0x00,0xFD,0x05,0x3C, ++0x24,0x18,0x42,0x02, ++0x29,0x00,0xA2,0x34, ++0xA7,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x46,0x00,0x40,0x14, ++0xAC,0x00,0xA2,0x34, ++0x00,0xF2,0x06,0x3C, ++0x01,0x00,0xC2,0x34, ++0xB8,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x7D,0x00,0x40,0x14, ++0x07,0x00,0xA2,0x34, ++0x00,0xF0,0x05,0x3C, ++0x03,0x00,0xA2,0x34, ++0xD5,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0xC8,0x00,0x40,0x14, ++0x00,0xF1,0x07,0x3C, ++0x21,0x02,0x65,0x10, ++0x00,0xFF,0x82,0x34, ++0x2B,0x10,0xA3,0x00, ++0x48,0x01,0x40,0x14, ++0x01,0x00,0xA2,0x34, ++0x00,0xE0,0x02,0x3C, ++0x73,0x01,0x62,0x10, ++0x00,0xFF,0x48,0x32, ++0x25,0xB0,0x02,0x3C, ++0x70,0x03,0x42,0x34, ++0x21,0x98,0x00,0x00, ++0x00,0x00,0x40,0xAC, ++0x25,0xB0,0x04,0x3C, ++0x18,0x03,0x82,0x34, ++0x48,0x7C,0xC3,0x27, ++0x00,0x00,0x43,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x6C,0x57,0x82,0x8E, ++0x6C,0x57,0x83,0x26, ++0x10,0x00,0x43,0x10, ++0x02,0x80,0x02,0x3C, ++0xBF,0x00,0x92,0x34, ++0x30,0x1F,0x51,0x24, ++0x21,0x80,0x60,0x00, ++0x00,0x00,0x42,0x92, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x42,0x2C, ++0x08,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x3C,0x38,0x24,0x8E, ++0xB4,0x08,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x6C,0x57,0x83,0x8E, ++0x00,0x00,0x00,0x00, ++0xF5,0xFF,0x70,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x21,0x28,0x00,0x00, ++0x08,0x10,0xE4,0x26, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0xE8,0x1E,0x00,0x08, ++0x25,0xB0,0x10,0x3C, ++0xDA,0xFF,0x40,0x14, ++0x74,0x03,0x03,0x36, ++0xFF,0xFF,0x02,0x24, ++0x21,0x98,0x00,0x00, ++0x00,0x00,0xA0,0xAC, ++0x00,0x00,0x62,0xAC, ++0x1B,0x1F,0x00,0x08, ++0x25,0xB0,0x04,0x3C, ++0x84,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x1E,0x00,0x40,0x14, ++0x00,0xFE,0x07,0x3C, ++0xA4,0x00,0xA2,0x34, ++0x8F,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x47,0x00,0x40,0x14, ++0xA7,0x00,0xA2,0x34, ++0xA1,0x00,0xA2,0x34, ++0xEA,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0xAD,0x00,0x40,0x14, ++0xA2,0x00,0xA2,0x34, ++0xA0,0x00,0xA2,0x34, ++0xBE,0xFF,0x62,0x14, ++0x25,0xB0,0x02,0x3C, ++0x00,0x0F,0x42,0x32, ++0x02,0x22,0x02,0x00, ++0x01,0x00,0x03,0x24, ++0x96,0x02,0x83,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x02,0x24, ++0x8F,0x02,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x02,0x24, ++0x88,0x02,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0xCD,0x5A,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x12,0x00,0xE2,0x34, ++0x65,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x37,0x00,0x40,0x14, ++0x1A,0x00,0xE2,0x34, ++0xAF,0x00,0xA2,0x34, ++0xC8,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x97,0x00,0x40,0x14, ++0x10,0x00,0xE2,0x34, ++0xAD,0x00,0xA2,0x34, ++0x44,0x02,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0xAE,0x00,0xA2,0x34, ++0x9C,0xFF,0x62,0x14, ++0x02,0x24,0x12,0x00, ++0x00,0xFF,0x45,0x32, ++0xFF,0x00,0x84,0x30, ++0x58,0x5A,0x00,0x0C, ++0x02,0x2A,0x05,0x00, ++0x25,0xB0,0x03,0x3C, ++0x74,0x03,0x63,0x34, ++0x00,0x00,0x62,0xA0, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x73,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x35,0x00,0x40,0x14, ++0x18,0x00,0xA2,0x34, ++0x00,0xF8,0x04,0x3C, ++0x16,0x00,0x82,0x34, ++0xB6,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x90,0x00,0x40,0x14, ++0x17,0x00,0x82,0x34, ++0x15,0x00,0x82,0x34, ++0x84,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0xA7,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x6A,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0xB7,0x00,0x40,0x14, ++0xAA,0x00,0xA2,0x34, ++0xA5,0x00,0xA2,0x34, ++0x35,0x02,0x62,0x10, ++0x24,0x20,0x44,0x02, ++0xA6,0x00,0xA2,0x34, ++0x76,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0xF7,0x5B,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x75,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x80,0x00,0x40,0x14, ++0x0F,0x00,0xC2,0x34, ++0x18,0x00,0xE2,0x34, ++0xC1,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x19,0x00,0xE2,0x34, ++0x68,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xA2,0x26, ++0x2A,0x1C,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x74,0x03,0x63,0x34, ++0x00,0x00,0x64,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x3E,0x01,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x74,0x00,0x40,0x14, ++0x19,0x00,0xA2,0x34, ++0x14,0x00,0xA2,0x34, ++0x96,0x01,0x62,0x10, ++0x17,0x00,0xA2,0x34, ++0x51,0xFF,0x62,0x14, ++0x25,0xB0,0x04,0x3C, ++0x68,0x03,0x85,0x34, ++0x00,0x00,0xA3,0x8C, ++0x00,0xFF,0x42,0x32, ++0x00,0x12,0x02,0x00, ++0xFF,0xFF,0x73,0x30, ++0x25,0x10,0x53,0x00, ++0x00,0x00,0xA2,0xAC, ++0x64,0x03,0x84,0x34, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x53,0x30, ++0x40,0x00,0x63,0x36, ++0x00,0x00,0x83,0xA0, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x02,0x00,0xE2,0x34, ++0x3F,0xFF,0x62,0x10, ++0x2B,0x10,0x43,0x00, ++0x9B,0x00,0x40,0x14, ++0x04,0x00,0xE2,0x34, ++0x08,0x00,0xA2,0x34, ++0xA3,0x01,0x62,0x10, ++0x00,0xFF,0x42,0x32, ++0x38,0xFF,0x67,0x14, ++0x25,0xB0,0x04,0x3C, ++0xFF,0x00,0x05,0x3C, ++0x00,0xFF,0xA5,0x34, ++0x24,0x28,0x45,0x02, ++0x02,0x2A,0x05,0x00, ++0x94,0x00,0x83,0x34, ++0x40,0x11,0x05,0x00, ++0x26,0xB0,0x06,0x3C, ++0x00,0x00,0x65,0xA4, ++0xC0,0xFF,0x53,0x24, ++0x7C,0x00,0xCC,0x34, ++0x04,0x00,0x07,0x24, ++0x9A,0x00,0x88,0x34, ++0x98,0x00,0x89,0x34, ++0x96,0x00,0x8A,0x34, ++0x7A,0x00,0xC6,0x34, ++0xB0,0x03,0x8B,0x34, ++0x00,0x04,0x02,0x24, ++0xA0,0x00,0x03,0x24, ++0x00,0x00,0x02,0xA5, ++0x44,0x00,0x84,0x34, ++0x00,0x00,0x23,0xA5, ++0x00,0x00,0x47,0xA5, ++0x00,0x00,0xC7,0xA0, ++0x00,0x00,0x73,0xAD, ++0x00,0x00,0x93,0xA5, ++0x00,0x00,0x83,0x94, ++0xFF,0xFD,0x02,0x24, ++0x30,0x1F,0xA6,0x26, ++0x24,0x18,0x62,0x00, ++0x00,0x00,0x83,0xA4, ++0x00,0x00,0x82,0x94, ++0xBA,0x1B,0xC5,0xA4, ++0x00,0x02,0x42,0x34, ++0x00,0x00,0x82,0xA4, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xBF,0x01,0x62,0x10, ++0x25,0xB0,0x02,0x3C, ++0xA3,0x00,0xA2,0x34, ++0x10,0xFF,0x62,0x14, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0xA2,0x26, ++0x16,0x1F,0x00,0x08, ++0x30,0x38,0x40,0xAC, ++0x3A,0x01,0x62,0x10, ++0x11,0x00,0xE2,0x34, ++0x08,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xFF,0x00,0x04,0x3C, ++0x00,0xFF,0x84,0x34, ++0x24,0x20,0x44,0x02, ++0x30,0x1F,0xA2,0x26, ++0x02,0x22,0x04,0x00, ++0xC2,0x34,0x00,0x0C, ++0x2A,0x1C,0x40,0xA0, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x9F,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0x82,0x34, ++0xF3,0xFE,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x0A,0x23,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x4E,0x01,0x62,0x10, ++0x10,0x00,0xC2,0x34, ++0xEC,0xFE,0x62,0x14, ++0x25,0xB0,0x02,0x3C, ++0x00,0xFF,0x43,0x32, ++0x00,0xFF,0x02,0x34, ++0xDA,0xFF,0x62,0x14, ++0x30,0x1F,0xA2,0x26, ++0x30,0x1F,0xA3,0x26, ++0xFF,0xFF,0x02,0x34, ++0x16,0x1F,0x00,0x08, ++0x30,0x38,0x62,0xAC, ++0x96,0x01,0x62,0x10, ++0x25,0xB0,0x02,0x3C, ++0x28,0x00,0xA2,0x34, ++0xDE,0xFE,0x62,0x14, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x60,0x00,0x06,0x24, ++0x5F,0x47,0x00,0x0C, ++0x24,0x00,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0xE8,0x03,0x04,0x24, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x24,0x00,0x04,0x24, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x05,0x36, ++0x1F,0x00,0x53,0x30, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x00,0x00,0x53,0xA0, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x84,0x01,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0xAB,0x00,0xA2,0x34, ++0xC1,0xFE,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0xE6,0x5F,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x01,0x62,0x10, ++0x25,0xB0,0x02,0x3C, ++0x02,0x00,0xA2,0x34, ++0xB9,0xFE,0x62,0x14, ++0x25,0xB0,0x02,0x3C, ++0x02,0x14,0x12,0x00, ++0x00,0xFF,0x43,0x32, ++0xFF,0x00,0x45,0x30, ++0x04,0x00,0xA0,0x10, ++0x02,0x92,0x03,0x00, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0xA2,0x10, ++0x01,0x00,0x04,0x24, ++0x21,0x20,0x00,0x00, ++0xE6,0x44,0x00,0x0C, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x8A,0x47,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0xFF,0xFF,0x10,0x36, ++0x24,0x98,0x50,0x00, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x00,0x00,0x53,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x15,0x01,0x62,0x10, ++0x24,0x10,0x44,0x02, ++0xA0,0xFE,0x66,0x14, ++0x25,0xB0,0x02,0x3C, ++0x25,0xB0,0x05,0x3C, ++0x74,0x03,0xA3,0x34, ++0x00,0x00,0x64,0x8C, ++0xFF,0x0F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x90,0x82,0x00, ++0x01,0x00,0x03,0x3C, ++0x2B,0x18,0x72,0x00, ++0x95,0xFE,0x60,0x10, ++0x00,0xB0,0x02,0x3C, ++0x25,0x90,0x42,0x02, ++0x00,0x00,0x53,0x8E, ++0x78,0x03,0xA2,0x34, ++0x00,0x00,0x53,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x02,0x1A,0x08,0x00, ++0xFF,0x00,0x02,0x24, ++0x56,0x01,0x62,0x10, ++0x25,0xB0,0x05,0x3C, ++0x0E,0x00,0x60,0x14, ++0x00,0xCC,0x02,0x34, ++0x25,0xB0,0x04,0x3C, ++0x64,0x03,0x84,0x34, ++0x30,0x1F,0xA7,0x26, ++0x00,0x00,0x85,0x94, ++0xE4,0x02,0xE6,0x8C, ++0xFF,0xCF,0x02,0x3C, ++0xFF,0xFE,0x03,0x24, ++0xFF,0xFF,0x42,0x34, ++0x24,0x28,0xA3,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x00,0x85,0xA4, ++0xE4,0x02,0xE6,0xAC, ++0x00,0xCC,0x02,0x34, ++0x7B,0xFE,0x02,0x15, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0xA5,0x26, ++0xE4,0x02,0xA3,0x8C, ++0xFF,0xCF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x00,0x10,0x04,0x3C, ++0x25,0x18,0x64,0x00, ++0x16,0x1F,0x00,0x08, ++0xE4,0x02,0xA3,0xAC, ++0x02,0x14,0x12,0x00, ++0x00,0x1F,0x43,0x32, ++0x02,0x9A,0x03,0x00, ++0x3F,0x00,0x42,0x30, ++0xC1,0x02,0x22,0xA2, ++0xBC,0x02,0x33,0xA2, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x76,0x2C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x98,0x40,0x00, ++0x74,0x03,0x02,0x36, ++0x00,0x00,0x53,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x03,0x00,0x22,0x92, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x16,0x1F,0x00,0x08, ++0x03,0x00,0x22,0xA2, ++0x74,0x03,0x03,0x36, ++0x00,0x00,0x64,0x8C, ++0xFF,0x0F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x90,0x82,0x00, ++0x01,0x00,0x03,0x3C, ++0x2B,0x18,0x72,0x00, ++0x51,0xFE,0x60,0x10, ++0x78,0x03,0x02,0x36, ++0x00,0x00,0x53,0x8C, ++0x00,0xB0,0x03,0x3C, ++0x25,0x90,0x43,0x02, ++0x00,0x00,0x53,0xAE, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xBE,0x59,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x00,0xFF,0x82,0x34, ++0x24,0x10,0x42,0x02, ++0x02,0x2A,0x02,0x00, ++0x2B,0x1C,0x25,0xA2, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xFF,0xFF,0x02,0x34, ++0x16,0x1F,0x00,0x08, ++0x30,0x38,0x22,0xAE, ++0x24,0x10,0x44,0x02, ++0x00,0xFF,0x43,0x32, ++0x02,0x2C,0x02,0x00, ++0x04,0x00,0xA0,0x10, ++0x02,0x92,0x03,0x00, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0xA2,0x10, ++0x01,0x00,0x04,0x24, ++0x21,0x20,0x00,0x00, ++0x25,0xB0,0x10,0x3C, ++0xE6,0x44,0x00,0x0C, ++0x74,0x03,0x10,0x36, ++0x00,0x00,0x13,0x8E, ++0x0F,0x00,0x11,0x3C, ++0x21,0x20,0x40,0x02, ++0x21,0x30,0x60,0x02, ++0x5F,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x21,0x20,0x40,0x02, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x00,0x00,0x02,0xAE, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x85,0x5F,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x08,0x00,0x23,0x8E, ++0xFF,0x9F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x16,0x1F,0x00,0x08, ++0x08,0x00,0x23,0xAE, ++0x00,0xFF,0x42,0x32, ++0x24,0x18,0x44,0x02, ++0x02,0x9A,0x02,0x00, ++0x01,0x00,0x02,0x24, ++0x95,0x00,0x62,0x12, ++0x02,0x1C,0x03,0x00, ++0x02,0x00,0x02,0x24, ++0xA9,0x00,0x62,0x12, ++0xC0,0x10,0x03,0x00, ++0x03,0x00,0x02,0x24, ++0x09,0xFE,0x62,0x16, ++0xC0,0x10,0x03,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x02,0x80,0x04,0x3C, ++0x4C,0x43,0x83,0x24, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x25,0xB0,0x03,0x3C, ++0x74,0x03,0x63,0x34, ++0x00,0x00,0x64,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0xFF,0x82,0x34, ++0x24,0x10,0x42,0x02, ++0x02,0x2A,0x02,0x00, ++0x01,0x00,0x03,0x24, ++0x77,0x00,0xA3,0x10, ++0x74,0x03,0x02,0x36, ++0x02,0x00,0xA2,0x28, ++0xB7,0x00,0x40,0x14, ++0x03,0x00,0x02,0x24, ++0x06,0x00,0xA2,0x10, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0xA2,0x26, ++0x24,0x1C,0x44,0x94, ++0x25,0xB0,0x03,0x3C, ++0x18,0x21,0x00,0x08, ++0x74,0x03,0x63,0x34, ++0x30,0x1F,0xA2,0x26, ++0x26,0x1C,0x44,0x94, ++0x25,0xB0,0x03,0x3C, ++0x18,0x21,0x00,0x08, ++0x74,0x03,0x63,0x34, ++0x24,0x10,0x42,0x02, ++0x02,0x92,0x02,0x00, ++0x21,0x18,0x50,0x02, ++0x00,0x00,0x73,0x8C, ++0x74,0x03,0x02,0x36, ++0x00,0x00,0x53,0xAC, ++0x00,0x00,0x73,0x8C, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xA6,0x5A,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x24,0x20,0x44,0x02, ++0x56,0x25,0x00,0x0C, ++0x02,0x24,0x04,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xD7,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xA3,0x26, ++0x2A,0x1C,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x6A,0xFE,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x82,0x34, ++0x24,0x10,0x42,0x02, ++0x02,0x2A,0x02,0x00, ++0x01,0x00,0x02,0x24, ++0x21,0x20,0xA0,0x00, ++0x2A,0x1C,0x62,0xA0, ++0xC2,0x34,0x00,0x0C, ++0x2B,0x1C,0x65,0xA0, ++0x1A,0x20,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x82,0x34, ++0x24,0x10,0x42,0x02, ++0xBB,0xFD,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0xA3,0x26, ++0x04,0x03,0x66,0x90, ++0x24,0x20,0x44,0x02, ++0x00,0xFF,0x45,0x32, ++0x02,0x24,0x04,0x00, ++0x02,0x2A,0x05,0x00, ++0x00,0x01,0xC6,0x34, ++0xFB,0xFF,0x87,0x24, ++0xFB,0xFF,0xA2,0x24, ++0x1F,0x03,0x62,0xA0, ++0x04,0x03,0x66,0xAC, ++0x1D,0x03,0x67,0xA0, ++0x1C,0x03,0x64,0xA0, ++0x16,0x1F,0x00,0x08, ++0x1E,0x03,0x65,0xA0, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0xA2,0x26, ++0x2B,0x1C,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x74,0x03,0x63,0x34, ++0x00,0x00,0x64,0xAC, ++0xB8,0x1F,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0xFF,0x00,0x02,0x24, ++0x56,0x01,0x63,0x34, ++0x00,0x00,0x62,0xA4, ++0x01,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x16,0x1F,0x00,0x08, ++0x08,0x5E,0x44,0xA0, ++0x02,0x92,0x02,0x00, ++0x05,0x00,0x40,0x12, ++0x21,0x20,0x00,0x00, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0x42,0x12, ++0x01,0x00,0x04,0x24, ++0x21,0x20,0x00,0x00, ++0xE6,0x44,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x02,0x9C,0x02,0x00, ++0x00,0xFF,0x43,0x32, ++0x07,0x00,0x62,0x2E, ++0x88,0xFD,0x40,0x10, ++0x02,0x2A,0x03,0x00, ++0x02,0x80,0x04,0x3C, ++0x50,0xED,0x83,0x24, ++0x80,0x10,0x13,0x00, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x22,0x1C,0x23,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x43,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xC0,0x10,0x03,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x51,0x00, ++0x14,0x24,0x44,0x8C, ++0x74,0x03,0x03,0x36, ++0x00,0x00,0x64,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0xFF,0x83,0x34, ++0x74,0x03,0x44,0x34, ++0x00,0x00,0x93,0x8C, ++0x24,0x18,0x43,0x02, ++0x02,0x92,0x03,0x00, ++0x21,0x10,0x42,0x02, ++0x00,0x00,0x53,0xAC, ++0x00,0x00,0x53,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x93,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x51,0x00, ++0x18,0x24,0x44,0x8C, ++0xA4,0x21,0x00,0x08, ++0x74,0x03,0x03,0x36, ++0xCD,0x59,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x3D,0x23,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x00,0x00,0x45,0x8C, ++0x00,0xFF,0x84,0x34, ++0x24,0x20,0x44,0x02, ++0xC1,0x5B,0x00,0x0C, ++0x02,0x22,0x04,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x70,0x03,0x42,0x34, ++0x21,0x20,0x40,0x02, ++0x00,0x00,0x40,0xAC, ++0x6B,0x1E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xF5,0x5B,0x00,0x0C, ++0x02,0x24,0x04,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x4B,0xFF,0xA0,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0xA2,0x26, ++0x20,0x1C,0x44,0x94, ++0x25,0xB0,0x03,0x3C, ++0x18,0x21,0x00,0x08, ++0x74,0x03,0x63,0x34, ++0x64,0x03,0xA5,0x34, ++0x30,0x1F,0xA6,0x26, ++0x00,0x00,0xA3,0x94, ++0xE4,0x02,0xC4,0x8C, ++0xFF,0xCF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x82,0x00, ++0x00,0x01,0x63,0x34, ++0x00,0x00,0xA3,0xA4, ++0x9A,0x20,0x00,0x08, ++0xE4,0x02,0xC4,0xAC, ++0xCD,0x5A,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xCD,0x5A,0x00,0x0C, ++0x02,0x00,0x04,0x24, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0xCD,0x5A,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x19,0x05,0x00, ++0x30,0x1F,0xA2,0x26, ++0x21,0x18,0x62,0x00, ++0x36,0x03,0x64,0x94, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x00,0x00,0x44,0xAC, ++0x17,0x1F,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x19,0x05,0x00, ++0x30,0x1F,0xA2,0x26, ++0x21,0x18,0x62,0x00, ++0x35,0x03,0x64,0x90, ++0xFD,0x21,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x19,0x05,0x00, ++0x30,0x1F,0xA2,0x26, ++0x21,0x18,0x62,0x00, ++0x34,0x03,0x64,0x90, ++0xFD,0x21,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x19,0x05,0x00, ++0x30,0x1F,0xA2,0x26, ++0x21,0x18,0x62,0x00, ++0x32,0x03,0x64,0x94, ++0xFD,0x21,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x19,0x05,0x00, ++0x30,0x1F,0xA2,0x26, ++0x21,0x18,0x62,0x00, ++0x30,0x03,0x64,0x94, ++0xFD,0x21,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x00,0x11,0x05,0x00, ++0x30,0x1F,0xA3,0x26, ++0x21,0x10,0x43,0x00, ++0x2C,0x03,0x44,0x8C, ++0xFC,0x21,0x00,0x08, ++0x42,0x26,0x04,0x00, ++0x00,0x11,0x05,0x00, ++0x30,0x1F,0xA3,0x26, ++0x21,0x10,0x43,0x00, ++0x2F,0x03,0x44,0x90, ++0xFC,0x21,0x00,0x08, ++0x01,0x00,0x84,0x30, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x18,0x03,0x42,0x34, ++0x94,0x88,0x63,0x24, ++0x00,0x00,0x43,0xAC, ++0x02,0x80,0x05,0x3C, ++0xD4,0x5E,0xA5,0x8C, ++0x04,0x00,0x02,0x24, ++0x1E,0x00,0xA2,0x10, ++0x05,0x00,0xA2,0x2C, ++0x10,0x00,0x40,0x10, ++0x05,0x00,0x02,0x24, ++0x03,0x00,0x02,0x24, ++0x08,0x00,0xA2,0x10, ++0x00,0x19,0x04,0x00, ++0x80,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0xC0,0x10,0x02,0x00, ++0x23,0x10,0x44,0x00, ++0x00,0x11,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x40,0x19,0x02,0x00, ++0xFF,0xFF,0x63,0x24, ++0xFE,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xF3,0xFF,0xA2,0x10, ++0x06,0x00,0x02,0x24, ++0xF2,0xFF,0xA2,0x14, ++0x80,0x10,0x04,0x00, ++0x40,0x11,0x04,0x00, ++0x23,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x00,0x19,0x02,0x00, ++0x23,0x18,0x62,0x00, ++0x3B,0x22,0x00,0x08, ++0x00,0x19,0x03,0x00, ++0x80,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0xC0,0x10,0x02,0x00, ++0x23,0x10,0x44,0x00, ++0x00,0x11,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x3B,0x22,0x00,0x08, ++0x00,0x19,0x02,0x00, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x50,0x89,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x02,0x80,0x05,0x3C, ++0xD4,0x5E,0xA3,0x8C, ++0x05,0x00,0x02,0x24, ++0x06,0x00,0x62,0x10, ++0x06,0x00,0x62,0x2C, ++0x0C,0x00,0x40,0x10, ++0x06,0x00,0x02,0x24, ++0x04,0x00,0x02,0x24, ++0x0E,0x00,0x62,0x10, ++0x80,0x10,0x04,0x00, ++0x80,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0xFF,0xFF,0x42,0x24, ++0xFE,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xF7,0xFF,0x62,0x14, ++0x00,0x11,0x04,0x00, ++0x23,0x10,0x44,0x00, ++0x66,0x22,0x00,0x08, ++0x40,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x66,0x22,0x00,0x08, ++0x40,0x10,0x02,0x00, ++0xFF,0xFF,0x85,0x30, ++0x21,0x30,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0x2A,0xB0,0x04,0x3C, ++0xB4,0x00,0x63,0x34, ++0x01,0x00,0xA2,0x24, ++0x31,0x00,0x84,0x34, ++0x00,0x00,0x65,0xA0, ++0x00,0x00,0x85,0xA0, ++0xFF,0xFF,0x45,0x30, ++0x12,0x00,0xA0,0x10, ++0x01,0x00,0x03,0x24, ++0x28,0xB0,0x07,0x3C, ++0x88,0x22,0x00,0x08, ++0xFF,0xFF,0x08,0x24, ++0x00,0x00,0x83,0xA0, ++0x01,0x00,0x63,0x24, ++0xFF,0xFF,0x63,0x30, ++0x2B,0x10,0xA3,0x00, ++0x09,0x00,0x40,0x14, ++0x08,0x00,0xC6,0x24, ++0xF9,0xFF,0x65,0x14, ++0x21,0x20,0xC7,0x00, ++0x01,0x00,0x63,0x24, ++0xFF,0xFF,0x63,0x30, ++0x2B,0x10,0xA3,0x00, ++0x00,0x00,0x88,0xA0, ++0xF9,0xFF,0x40,0x10, ++0x08,0x00,0xC6,0x24, ++0x00,0x01,0xA2,0x2C, ++0x13,0x00,0x40,0x10, ++0x21,0x18,0xA0,0x00, ++0xFF,0x00,0x08,0x24, ++0x28,0xB0,0x07,0x3C, ++0x9C,0x22,0x00,0x08, ++0xFF,0xFF,0x09,0x24, ++0xFF,0xFF,0x43,0x30, ++0x00,0x00,0xA2,0xA0, ++0x00,0x01,0x62,0x2C, ++0x0A,0x00,0x40,0x10, ++0x08,0x00,0xC6,0x24, ++0x01,0x00,0x62,0x24, ++0xF9,0xFF,0x68,0x14, ++0x21,0x28,0xC7,0x00, ++0x00,0x01,0x02,0x24, ++0xFF,0xFF,0x43,0x30, ++0x00,0x01,0x62,0x2C, ++0x00,0x00,0xA9,0xA0, ++0xF8,0xFF,0x40,0x14, ++0x08,0x00,0xC6,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xD0,0xFF,0xBD,0x27, ++0x2C,0x00,0xBF,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x10,0x3C, ++0x40,0x00,0x03,0x36, ++0x00,0x00,0x60,0xA4, ++0xA8,0x00,0x13,0x36, ++0xA0,0x00,0x12,0x36, ++0xA4,0x00,0x10,0x36, ++0x00,0x00,0x55,0x8E, ++0x00,0x00,0x16,0x8E, ++0x00,0x00,0x71,0x8E, ++0x00,0x80,0x14,0x3C, ++0xFC,0x37,0x02,0x24, ++0x00,0x00,0x40,0xAE, ++0xFD,0x00,0x04,0x24, ++0x00,0x00,0x00,0xAE, ++0x21,0x88,0x34,0x02, ++0x00,0x00,0x74,0xAE, ++0x00,0x00,0x62,0xA4, ++0x73,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x55,0xAE, ++0x00,0x00,0x16,0xAE, ++0x00,0x00,0x71,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x2C,0x00,0xBF,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x10,0x3C, ++0x40,0x00,0x05,0x36, ++0x00,0x00,0xA2,0x94, ++0x24,0xFA,0x03,0x24, ++0xA8,0x00,0x13,0x36, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0xA2,0xA4, ++0xA0,0x00,0x12,0x36, ++0xA4,0x00,0x10,0x36, ++0x00,0x00,0x55,0x8E, ++0x00,0x00,0x16,0x8E, ++0x00,0x00,0x71,0x8E, ++0x00,0x80,0x14,0x3C, ++0xFC,0x37,0x02,0x24, ++0x00,0x00,0x40,0xAE, ++0xFD,0x00,0x04,0x24, ++0x00,0x00,0x00,0xAE, ++0x21,0x88,0x34,0x02, ++0x00,0x00,0x74,0xAE, ++0x00,0x00,0xA2,0xA4, ++0x73,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x55,0xAE, ++0x00,0x00,0x16,0xAE, ++0x00,0x00,0x71,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x2C,0x00,0xBF,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x10,0x3C, ++0x40,0x00,0x05,0x36, ++0x00,0x00,0xA2,0x94, ++0xAF,0xFF,0x03,0x24, ++0xA8,0x00,0x13,0x36, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0xA2,0xA4, ++0xA0,0x00,0x12,0x36, ++0xA4,0x00,0x10,0x36, ++0x00,0x00,0x55,0x8E, ++0x00,0x00,0x16,0x8E, ++0x00,0x00,0x71,0x8E, ++0x00,0x80,0x14,0x3C, ++0xFC,0x37,0x02,0x24, ++0x00,0x00,0x40,0xAE, ++0xFD,0x00,0x04,0x24, ++0x00,0x00,0x00,0xAE, ++0x21,0x88,0x34,0x02, ++0x00,0x00,0x74,0xAE, ++0x00,0x00,0xA2,0xA4, ++0x73,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x55,0xAE, ++0x00,0x00,0x16,0xAE, ++0x00,0x00,0x71,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x04,0x3C, ++0x40,0x00,0x84,0x34, ++0x00,0x00,0x82,0x94, ++0xD8,0xFD,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0xFC,0x37,0x03,0x24, ++0x00,0x00,0x82,0xA4, ++0x00,0x00,0x83,0xA4, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x84,0x30, ++0xFF,0xFF,0xAC,0x30, ++0xC0,0x48,0x04,0x00, ++0x00,0x60,0x0E,0x40, ++0x01,0x00,0xC1,0x35, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0xB0,0x02,0x3C, ++0x40,0x02,0x4D,0x34, ++0xF8,0xFF,0xE7,0x24, ++0x21,0x40,0x00,0x00, ++0x01,0x00,0x0F,0x24, ++0x44,0x02,0x4B,0x34, ++0x72,0x23,0x00,0x08, ++0x01,0x80,0x0A,0x3C, ++0x28,0x00,0x0F,0x11, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0xE2,0x90, ++0x00,0x00,0xE4,0x90, ++0x02,0x00,0xE3,0x90, ++0x03,0x00,0xE5,0x90, ++0x00,0x12,0x02,0x00, ++0x25,0x20,0x82,0x00, ++0x00,0x1C,0x03,0x00, ++0x25,0x20,0x83,0x00, ++0x21,0x10,0x28,0x01, ++0x00,0x2E,0x05,0x00, ++0x01,0x00,0x08,0x25, ++0x25,0x20,0x85,0x00, ++0x25,0x10,0x4A,0x00, ++0x06,0x00,0x03,0x2D, ++0x00,0x00,0x64,0xAD, ++0x04,0x00,0xE7,0x24, ++0x00,0x00,0xA2,0xAD, ++0x12,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0xEA,0xFF,0x00,0x15, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0x90, ++0x01,0x00,0xC3,0x90, ++0x04,0x00,0xE7,0x24, ++0x00,0x14,0x02,0x00, ++0x25,0x10,0x82,0x01, ++0x00,0x1E,0x03,0x00, ++0x25,0x20,0x43,0x00, ++0x21,0x10,0x28,0x01, ++0x01,0x00,0x08,0x25, ++0x25,0x10,0x4A,0x00, ++0x06,0x00,0x03,0x2D, ++0x00,0x00,0x64,0xAD, ++0x00,0x00,0xA2,0xAD, ++0xF0,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x8E,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0xC2,0x90, ++0x02,0x00,0xC4,0x90, ++0x04,0x00,0xC3,0x90, ++0x05,0x00,0xC5,0x90, ++0x64,0x23,0x00,0x08, ++0x00,0x12,0x02,0x00, ++0xFF,0xFF,0x84,0x30, ++0x42,0xB0,0x08,0x3C, ++0x80,0x10,0x04,0x00, ++0x21,0x10,0x48,0x00, ++0x04,0x00,0x46,0xAC, ++0x00,0x00,0x07,0x91, ++0x40,0x18,0x04,0x00, ++0x03,0x00,0x06,0x24, ++0xFF,0x00,0xE7,0x30, ++0x04,0x30,0x66,0x00, ++0x01,0x00,0x02,0x24, ++0x04,0x10,0x62,0x00, ++0x25,0x30,0xC7,0x00, ++0xFF,0xFF,0xA5,0x30, ++0x25,0x10,0x47,0x00, ++0x02,0x00,0xA0,0x14, ++0xFF,0x00,0xC7,0x30, ++0xFF,0x00,0x47,0x30, ++0x42,0xB0,0x02,0x3C, ++0x00,0x00,0x47,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0x83,0x90, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0x86,0xAC, ++0x18,0x00,0x85,0xAC, ++0x00,0x00,0x84,0xAC, ++0x03,0x00,0x62,0x10, ++0x04,0x00,0x84,0xAC, ++0x99,0x59,0x00,0x08, ++0x0C,0x00,0x80,0xAC, ++0x0C,0x00,0x82,0x8C, ++0x99,0x59,0x00,0x08, ++0x10,0x00,0x82,0xAC, ++0xC8,0xFF,0xBD,0x27, ++0x28,0x00,0xB6,0xAF, ++0x25,0xB0,0x02,0x3C, ++0x02,0x80,0x16,0x3C, ++0x2C,0x00,0xB7,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x30,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x18,0x03,0x55,0x34, ++0x01,0x80,0x17,0x3C, ++0x02,0x80,0x13,0x3C, ++0x02,0x80,0x14,0x3C, ++0x08,0xE4,0xD2,0x26, ++0xB8,0x8E,0xE2,0x26, ++0x00,0x00,0xA2,0xAE, ++0x08,0xE4,0xD0,0x8E, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x14,0x5E,0x71,0x8E, ++0x00,0x00,0x00,0x00, ++0x25,0x00,0x20,0x12, ++0x00,0x00,0x00,0x00, ++0x14,0x5E,0x60,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x23,0x00,0x12,0x12, ++0x08,0x0C,0x84,0x26, ++0x14,0x00,0x03,0x92, ++0x01,0x00,0x02,0x24, ++0x2B,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x60,0x14, ++0x02,0x00,0x02,0x24, ++0x0C,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x23,0x02, ++0x1E,0x00,0x40,0x10, ++0x23,0x10,0x71,0x00, ++0x0C,0x00,0x02,0xAE, ++0x00,0x00,0x10,0x8E, ++0xCE,0x23,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0xF8,0xFF,0x60,0x10, ++0x2B,0x10,0x23,0x02, ++0xF5,0xFF,0x40,0x14, ++0x23,0x10,0x71,0x00, ++0x08,0x00,0x02,0x8E, ++0x18,0x00,0x04,0x8E, ++0x09,0xF8,0x40,0x00, ++0x0C,0x00,0x00,0xAE, ++0x00,0x00,0x10,0x8E, ++0xCE,0x23,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x08,0x0C,0x84,0x26, ++0x21,0x28,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0xC0,0x23,0x00,0x08, ++0xB8,0x8E,0xE2,0x26, ++0x08,0x00,0x02,0x8E, ++0x18,0x00,0x04,0x8E, ++0x09,0xF8,0x40,0x00, ++0x00,0x00,0x00,0x00, ++0xDC,0x23,0x00,0x08, ++0x0C,0x00,0x02,0xAE, ++0x0C,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x23,0x02, ++0xD9,0xFF,0x40,0x14, ++0x23,0x10,0x71,0x00, ++0x08,0x00,0x02,0x8E, ++0x18,0x00,0x04,0x8E, ++0x09,0xF8,0x40,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x03,0xAE, ++0x00,0x00,0x10,0x8E, ++0xCE,0x23,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x9C,0x57,0x42,0x24, ++0xC0,0x20,0x04,0x00, ++0x21,0x20,0x82,0x00, ++0x21,0x28,0x00,0x00, ++0x00,0x60,0x06,0x40, ++0x01,0x00,0xC1,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x00,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x09,0x00,0x44,0x10, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x43,0x8C, ++0x21,0x28,0x40,0x00, ++0x00,0x00,0x42,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x62,0xAC, ++0x04,0x00,0x43,0xAC, ++0x00,0x00,0xA5,0xAC, ++0x04,0x00,0xA5,0xAC, ++0x00,0x60,0x86,0x40, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x21,0x18,0x80,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x01,0x01,0x62,0x2C, ++0x10,0x00,0xBF,0xAF, ++0x01,0x00,0x04,0x24, ++0x01,0x02,0x65,0x2C, ++0x0A,0x00,0x40,0x14, ++0x21,0x30,0x00,0x00, ++0x02,0x00,0x04,0x24, ++0x07,0x00,0xA0,0x14, ++0x01,0x08,0x62,0x2C, ++0x05,0x00,0x40,0x14, ++0x03,0x00,0x04,0x24, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0xC0,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x0D,0x24,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x21,0x30,0x40,0x00, ++0x21,0x10,0xC0,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x00,0x60,0x06,0x40, ++0x01,0x00,0xC1,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x10,0x00,0x83,0x8C, ++0x02,0x80,0x02,0x3C, ++0x9C,0x57,0x42,0x24, ++0xC0,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0x65,0x8C, ++0x02,0x80,0x07,0x3C, ++0x02,0x80,0x08,0x3C, ++0x00,0x00,0x85,0xAC, ++0x04,0x00,0xA4,0xAC, ++0x04,0x00,0x83,0xAC, ++0xD0,0x5E,0xE5,0x8C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0xA0,0x10, ++0x00,0x00,0x64,0xAC, ++0xBC,0x5E,0x02,0x8D, ++0xD0,0x5E,0xE0,0xAC, ++0x25,0x10,0x45,0x00, ++0xBC,0x5E,0x02,0xAD, ++0x00,0x60,0x86,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0xA5,0x30, ++0x25,0xB0,0x02,0x3C, ++0x21,0x28,0xA2,0x00, ++0xFF,0x00,0x84,0x30, ++0x60,0x01,0xA4,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x84,0x30, ++0x01,0x00,0x03,0x24, ++0x10,0x00,0x02,0x3C, ++0x04,0x18,0x83,0x00, ++0xF0,0x70,0x42,0x34, ++0x15,0x00,0x84,0x2C, ++0x06,0x00,0x80,0x10, ++0x24,0x28,0x62,0x00, ++0x0F,0x00,0x63,0x30, ++0x04,0x00,0xA0,0x14, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0x60,0x14, ++0x02,0x00,0x02,0x24, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0xA5,0x30, ++0x04,0x00,0xA2,0x2C, ++0x14,0x00,0x40,0x10, ++0xFF,0x00,0x84,0x30, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xEF,0xFF,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x02,0x00,0x42,0x2C, ++0x0E,0x00,0x40,0x10, ++0x02,0x00,0x03,0x24, ++0x24,0x00,0x83,0x10, ++0x0F,0x10,0x02,0x3C, ++0x03,0x00,0x82,0x28, ++0x14,0x00,0x40,0x10, ++0x03,0x00,0x02,0x24, ++0x01,0x00,0x02,0x24, ++0x2F,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0x1F,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0xFF,0xFF,0x42,0x34, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x35,0x00,0x83,0x10, ++0x0F,0x1F,0x02,0x3C, ++0x03,0x00,0x82,0x28, ++0x16,0x00,0x40,0x10, ++0x03,0x00,0x02,0x24, ++0x01,0x00,0x02,0x24, ++0xF4,0xFF,0x82,0x14, ++0x00,0x00,0x00,0x00, ++0x0F,0x1F,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x00,0x80,0x42,0x34, ++0xF0,0xFF,0x82,0x14, ++0xFF,0x1F,0x02,0x3C, ++0x01,0x00,0x02,0x24, ++0x29,0x00,0xA2,0x10, ++0x0F,0x10,0x02,0x3C, ++0x02,0x00,0xA2,0x28, ++0x1F,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x28,0x00,0xA3,0x10, ++0x00,0x00,0x00,0x00, ++0xE5,0xFF,0xA4,0x14, ++0x00,0x00,0x00,0x00, ++0x0F,0x10,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x00,0xF0,0x42,0x34, ++0xE1,0xFF,0x82,0x14, ++0xFF,0x1F,0x02,0x3C, ++0x01,0x00,0x02,0x24, ++0x1C,0x00,0xA2,0x10, ++0x0F,0x00,0x02,0x3C, ++0x02,0x00,0xA2,0x28, ++0x0B,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0xA3,0x10, ++0x00,0x00,0x00,0x00, ++0xD6,0xFF,0xA4,0x14, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x00,0xF0,0x42,0x34, ++0x0F,0x10,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x00,0x80,0x42,0x34, ++0xCE,0xFF,0xA0,0x14, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x15,0xF0,0x42,0x34, ++0xC9,0xFF,0xA0,0x14, ++0x00,0x00,0x00,0x00, ++0x0F,0x10,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x15,0xF0,0x42,0x34, ++0x08,0x00,0xE0,0x03, ++0x00,0xF0,0x42,0x34, ++0x08,0x00,0xE0,0x03, ++0x10,0xF0,0x42,0x34, ++0x08,0x00,0xE0,0x03, ++0x10,0xF0,0x42,0x34, ++0x0F,0x10,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x05,0xF0,0x42,0x34, ++0x0F,0x00,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x05,0xF0,0x42,0x34, ++0xC0,0x40,0x04,0x00, ++0x21,0x18,0x04,0x01, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x64,0x00, ++0x02,0x80,0x02,0x3C, ++0x80,0x18,0x03,0x00, ++0x30,0x1F,0x42,0x24, ++0x21,0x18,0x62,0x00, ++0x18,0x24,0x66,0x8C, ++0x21,0x38,0x60,0x00, ++0x1E,0x24,0x60,0xA0, ++0x1F,0x24,0x60,0xA0, ++0x1C,0x00,0x05,0x24, ++0xDA,0x24,0x00,0x08, ++0x01,0x00,0x03,0x24, ++0x08,0x00,0xA0,0x04, ++0x21,0x10,0x04,0x01, ++0x04,0x10,0xA3,0x00, ++0x24,0x10,0xC2,0x00, ++0xFB,0xFF,0x40,0x10, ++0xFF,0xFF,0xA5,0x24, ++0x01,0x00,0xA5,0x24, ++0x1E,0x24,0xE5,0xA0, ++0x21,0x10,0x04,0x01, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x02,0x00, ++0x30,0x1F,0x63,0x24, ++0x21,0x18,0x43,0x00, ++0x18,0x24,0x66,0x8C, ++0x21,0x28,0x00,0x00, ++0xEE,0x24,0x00,0x08, ++0x01,0x00,0x07,0x24, ++0x1D,0x00,0xA2,0x28, ++0x08,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x04,0x10,0xA7,0x00, ++0x24,0x10,0xC2,0x00, ++0xFA,0xFF,0x40,0x10, ++0x01,0x00,0xA5,0x24, ++0xFF,0xFF,0xA5,0x24, ++0x08,0x00,0xE0,0x03, ++0x1F,0x24,0x65,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x88,0x00,0x00, ++0x30,0x1F,0x50,0x24, ++0xFF,0xF1,0x14,0x24, ++0x25,0xB0,0x13,0x3C, ++0x24,0x00,0xBF,0xAF, ++0x08,0x25,0x00,0x08, ++0x18,0x00,0xB2,0xAF, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0x22,0x2E, ++0x2A,0x00,0x40,0x10, ++0x94,0x00,0x10,0x26, ++0x1C,0x24,0x06,0x8E, ++0x01,0x00,0x03,0x24, ++0x02,0x13,0x06,0x00, ++0x01,0x00,0x45,0x30, ++0xF7,0xFF,0xA3,0x14, ++0x42,0x1A,0x06,0x00, ++0x0C,0x24,0x02,0x8E, ++0x07,0x00,0x64,0x30, ++0x02,0x11,0x02,0x00, ++0x7F,0x00,0x43,0x30, ++0x27,0x00,0x85,0x10, ++0x07,0x00,0xD2,0x30, ++0x02,0x00,0x82,0x28, ++0x31,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x28,0x00,0x82,0x10, ++0x03,0x00,0x02,0x24, ++0x31,0x00,0x82,0x10, ++0x1A,0x00,0x62,0x2C, ++0x1C,0x24,0x02,0x8E, ++0x04,0x00,0x43,0x2E, ++0x42,0x12,0x02,0x00, ++0x0A,0x00,0x60,0x10, ++0x07,0x00,0x44,0x30, ++0x6E,0x24,0x00,0x0C, ++0x21,0x28,0x40,0x02, ++0x80,0x18,0x12,0x00, ++0x21,0x18,0x73,0x00, ++0x14,0x24,0x04,0x8E, ++0x84,0x01,0x65,0x8C, ++0x24,0x20,0x82,0x00, ++0x24,0x28,0xA4,0x00, ++0x18,0x24,0x05,0xAE, ++0xC9,0x24,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x21,0x10,0x33,0x02, ++0x01,0x00,0x31,0x26, ++0x60,0x01,0x43,0x90, ++0x20,0x00,0x22,0x2E, ++0xD8,0xFF,0x40,0x14, ++0x94,0x00,0x10,0x26, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x32,0x00,0x62,0x2C, ++0xDF,0xFF,0x40,0x10, ++0x24,0x10,0xD4,0x00, ++0x00,0x04,0x42,0x34, ++0x1B,0x25,0x00,0x08, ++0x1C,0x24,0x02,0xAE, ++0x38,0x00,0x62,0x2C, ++0x0D,0x00,0x40,0x14, ++0x14,0x00,0x62,0x2C, ++0x24,0x10,0xD4,0x00, ++0x00,0x02,0x42,0x34, ++0x1B,0x25,0x00,0x08, ++0x1C,0x24,0x02,0xAE, ++0xD3,0xFF,0x80,0x14, ++0x24,0x10,0xD4,0x00, ++0x1B,0x25,0x00,0x08, ++0x1C,0x24,0x02,0xAE, ++0xCF,0xFF,0x40,0x14, ++0x24,0x10,0xD4,0x00, ++0x3E,0x25,0x00,0x08, ++0x00,0x04,0x42,0x34, ++0xCB,0xFF,0x40,0x10, ++0x24,0x10,0xD4,0x00, ++0x00,0x06,0x42,0x34, ++0x1B,0x25,0x00,0x08, ++0x1C,0x24,0x02,0xAE, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0xC0,0x80,0x04,0x00, ++0x21,0x80,0x04,0x02, ++0x80,0x80,0x10,0x00, ++0x21,0x80,0x04,0x02, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x80,0x10,0x00, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x21,0x80,0x02,0x02, ++0x1C,0x24,0x03,0x8E, ++0x25,0xB0,0x02,0x3C, ++0x80,0x01,0x45,0x34, ++0x07,0x00,0x63,0x30, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0xA6,0x90, ++0x14,0x24,0x05,0x8E, ++0x84,0x01,0x62,0x8C, ++0x21,0x88,0x80,0x00, ++0x24,0x10,0x45,0x00, ++0xC9,0x24,0x00,0x0C, ++0x18,0x24,0x02,0xAE, ++0x1E,0x24,0x04,0x92, ++0xFF,0x00,0x25,0x32, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x57,0x24,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0xFF,0xFF,0x84,0x30, ++0x00,0x02,0x82,0x30, ++0x07,0x00,0x03,0x24, ++0x0D,0x00,0x40,0x14, ++0x0B,0x00,0x84,0x30, ++0x0C,0x00,0x82,0x2C, ++0x0A,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x04,0x00, ++0x74,0xED,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x06,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x05,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x04,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x03,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x02,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x01,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x21,0x18,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xA8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x50,0x00,0xBE,0xAF, ++0x4C,0x00,0xB7,0xAF, ++0x48,0x00,0xB6,0xAF, ++0x44,0x00,0xB5,0xAF, ++0x3C,0x00,0xB3,0xAF, ++0x38,0x00,0xB2,0xAF, ++0x54,0x00,0xBF,0xAF, ++0x40,0x00,0xB4,0xAF, ++0x34,0x00,0xB1,0xAF, ++0x30,0x00,0xB0,0xAF, ++0xA4,0xED,0x42,0x24, ++0x00,0x00,0x54,0x8C, ++0x21,0x98,0x00,0x00, ++0x21,0xA8,0x00,0x00, ++0x21,0xB0,0x00,0x00, ++0x10,0x00,0xA0,0xAF, ++0x21,0xB8,0x00,0x00, ++0x14,0x00,0xA0,0xAF, ++0x21,0xF0,0x00,0x00, ++0x18,0x00,0xA0,0xAF, ++0x1C,0x00,0xA0,0xAF, ++0x20,0x00,0xA0,0xAF, ++0x24,0x00,0xA0,0xAF, ++0x28,0x00,0xA0,0xAF, ++0x2C,0x00,0xA0,0xAF, ++0x21,0x90,0x80,0x02, ++0x1C,0x24,0x42,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x13,0x02,0x00, ++0x01,0x00,0x42,0x30, ++0x68,0x00,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0x21,0x10,0x62,0x02, ++0x60,0x01,0x44,0x90, ++0x04,0x24,0x43,0x8E, ++0x00,0x24,0x46,0x8E, ++0xFF,0x00,0x8B,0x30, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x84,0x24, ++0x21,0x10,0x64,0x01, ++0xE7,0x04,0x44,0x90, ++0xCA,0x04,0x45,0x90, ++0xE8,0x23,0x47,0x8E, ++0x18,0x00,0x64,0x00, ++0x12,0x18,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xC5,0x00, ++0x12,0x30,0x00,0x00, ++0x21,0x30,0xC3,0x00, ++0x2B,0x10,0xE6,0x00, ++0x02,0x01,0x40,0x14, ++0x23,0x10,0xE6,0x00, ++0xE8,0x23,0x42,0xAE, ++0x04,0x24,0x44,0x8E, ++0x00,0x24,0x47,0x8E, ++0xEC,0x23,0x48,0x8E, ++0xF0,0x23,0x45,0x8E, ++0xF8,0x23,0x46,0x8E, ++0xFC,0x23,0x43,0x8E, ++0x21,0x38,0xE4,0x00, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x84,0x24, ++0x21,0x10,0x64,0x01, ++0x21,0x40,0x05,0x01, ++0x21,0x30,0xC3,0x00, ++0x3E,0x05,0x42,0x90, ++0xE8,0x23,0x4A,0x8E, ++0x0C,0x00,0xE0,0x10, ++0x21,0x48,0x00,0x00, ++0x2B,0x48,0x47,0x00, ++0x0B,0x00,0x20,0x15, ++0x02,0x80,0x02,0x3C, ++0x07,0x00,0x62,0x2D, ++0x4B,0x01,0x40,0x14, ++0xC0,0x10,0x07,0x00, ++0x0C,0x00,0x02,0x24, ++0x47,0x01,0x62,0x11, ++0x0D,0x00,0x02,0x24, ++0x46,0x01,0x62,0x11, ++0xC0,0x10,0x07,0x00, ++0x6C,0x00,0x20,0x11, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x0B,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x20,0x4B,0x02, ++0x5A,0x24,0x85,0x90, ++0x60,0x05,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x04,0x10,0xA2,0x00, ++0x2B,0x10,0x4A,0x00, ++0x61,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x78,0x24,0x42,0x8E, ++0x01,0x00,0x07,0x24, ++0x04,0x18,0x67,0x01, ++0x24,0x10,0x43,0x00, ++0xE1,0x00,0x40,0x10, ++0x1C,0x00,0x62,0x2D, ++0x21,0x28,0x4B,0x02, ++0x20,0x24,0xA6,0x90, ++0x5A,0x24,0xA2,0x90, ++0x0A,0x00,0x04,0x24, ++0xFF,0x00,0xC3,0x30, ++0x04,0x20,0x44,0x00, ++0x2A,0x18,0x64,0x00, ++0xD8,0x00,0x60,0x10, ++0x1C,0x00,0x62,0x2D, ++0x01,0x00,0xC2,0x24, ++0xFF,0x00,0x43,0x30, ++0x37,0x01,0x64,0x10, ++0x20,0x24,0xA2,0xA0, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x85,0x24, ++0x80,0x10,0x0B,0x00, ++0x21,0x10,0x45,0x00, ++0xD4,0x05,0x44,0x8C, ++0x60,0x05,0x43,0x8C, ++0x18,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x30,0x45,0x00, ++0x40,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0x21,0x18,0x62,0x00, ++0x82,0x50,0x03,0x00, ++0xE8,0x23,0xCA,0xAC, ++0x30,0x38,0xA3,0x8C, ++0xFF,0xFF,0x02,0x34, ++0x03,0x00,0x62,0x10, ++0x21,0x20,0x60,0x01, ++0x57,0x24,0x00,0x0C, ++0xFF,0x00,0x65,0x32, ++0x9E,0x00,0x60,0x12, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x82,0x24, ++0x21,0x10,0xA2,0x02, ++0xFC,0x23,0x40,0xAC, ++0x00,0x24,0x40,0xAC, ++0x04,0x24,0x40,0xAC, ++0xEC,0x23,0x40,0xAC, ++0xF0,0x23,0x40,0xAC, ++0xF4,0x23,0x40,0xAC, ++0xF8,0x23,0x40,0xAC, ++0x2C,0x00,0xA2,0x8F, ++0x28,0x00,0xA4,0x8F, ++0x01,0x00,0x73,0x26, ++0x94,0x00,0x42,0x24, ++0x94,0x00,0x84,0x24, ++0x2C,0x00,0xA2,0xAF, ++0x28,0x00,0xA4,0xAF, ++0x24,0x00,0xA2,0x8F, ++0x20,0x00,0xA4,0x8F, ++0x20,0x00,0x63,0x2A, ++0x94,0x00,0x42,0x24, ++0x94,0x00,0x84,0x24, ++0x24,0x00,0xA2,0xAF, ++0x20,0x00,0xA4,0xAF, ++0x1C,0x00,0xA2,0x8F, ++0x18,0x00,0xA4,0x8F, ++0x94,0x00,0x52,0x26, ++0x94,0x00,0x42,0x24, ++0x94,0x00,0x84,0x24, ++0x1C,0x00,0xA2,0xAF, ++0x18,0x00,0xA4,0xAF, ++0x14,0x00,0xA2,0x8F, ++0x10,0x00,0xA4,0x8F, ++0x94,0x00,0xDE,0x27, ++0x94,0x00,0x42,0x24, ++0x94,0x00,0x84,0x24, ++0x14,0x00,0xA2,0xAF, ++0x94,0x00,0xF7,0x26, ++0x10,0x00,0xA4,0xAF, ++0x94,0x00,0x94,0x26, ++0x94,0x00,0xD6,0x26, ++0x69,0xFF,0x60,0x14, ++0x94,0x00,0xB5,0x26, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0x79,0x00,0xE0,0x10, ++0x00,0x00,0x00,0x00, ++0x79,0x00,0x20,0x15, ++0x02,0x80,0x03,0x3C, ++0x40,0x10,0x07,0x00, ++0x21,0x10,0x47,0x00, ++0x82,0x10,0x02,0x00, ++0x2B,0x10,0x46,0x00, ++0xBE,0xFF,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x88,0x24, ++0x21,0x20,0xC8,0x03, ++0x21,0x30,0x8B,0x00, ++0x78,0x24,0x83,0x8C, ++0x01,0x00,0x05,0x24, ++0x04,0x10,0x65,0x01, ++0x3D,0x24,0xC7,0x90, ++0x27,0x10,0x02,0x00, ++0x24,0x18,0x62,0x00, ++0x78,0x24,0x83,0xAC, ++0x09,0x00,0xE5,0x10, ++0x20,0x24,0xC0,0xA0, ++0x14,0x00,0xA2,0x8F, ++0x21,0x38,0x00,0x00, ++0x21,0x20,0x48,0x00, ++0x21,0x18,0x87,0x00, ++0x01,0x00,0xE7,0x24, ++0x1D,0x00,0xE2,0x28, ++0xFC,0xFF,0x40,0x14, ++0x5A,0x24,0x60,0xA0, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x83,0x24, ++0x21,0x10,0xE3,0x02, ++0x21,0x10,0x4B,0x00, ++0x3D,0x24,0x40,0xA0, ++0x21,0x50,0x60,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x78,0xE8,0x49,0x24, ++0x04,0xE8,0x68,0x24, ++0x21,0x38,0x00,0x00, ++0x80,0x18,0x07,0x00, ++0x21,0x10,0x69,0x00, ++0x21,0x20,0x68,0x00, ++0x00,0x00,0x46,0x8C, ++0x00,0x00,0x85,0x8C, ++0x01,0x00,0xE7,0x24, ++0x21,0x18,0x6A,0x00, ++0x1D,0x00,0xE2,0x28, ++0x60,0x05,0x65,0xAC, ++0xF6,0xFF,0x40,0x14, ++0xD4,0x05,0x66,0xAC, ++0x15,0x00,0x60,0x11, ++0x02,0x80,0x04,0x3C, ++0x1F,0x24,0x82,0x92, ++0xFF,0xFF,0x67,0x25, ++0x2A,0x10,0xE2,0x00, ++0x10,0x00,0x40,0x14, ++0x02,0x80,0x03,0x3C, ++0x10,0x00,0xA4,0x8F, ++0x30,0x1F,0x62,0x24, ++0x21,0x10,0x82,0x00, ++0x1F,0x24,0x45,0x90, ++0x18,0x24,0x44,0x8C, ++0x01,0x00,0x06,0x24, ++0x04,0x18,0xE6,0x00, ++0x24,0x10,0x83,0x00, ++0xB9,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0xE7,0x24, ++0x2A,0x10,0xE5,0x00, ++0xFA,0xFF,0x40,0x10, ++0x04,0x18,0xE6,0x00, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x83,0x24, ++0x80,0x10,0x0B,0x00, ++0x21,0x10,0x43,0x00, ++0xD4,0x05,0x45,0x8C, ++0x60,0x05,0x44,0x8C, ++0x02,0x80,0x03,0x3C, ++0x40,0x10,0x05,0x00, ++0xDE,0x5D,0x66,0x90, ++0x21,0x10,0x45,0x00, ++0x21,0x20,0x82,0x00, ++0x22,0x00,0x02,0x24, ++0x9D,0x00,0xC2,0x10, ++0x82,0x50,0x04,0x00, ++0x78,0x24,0x83,0x8E, ++0x01,0x00,0x02,0x24, ++0x04,0x10,0x62,0x01, ++0x25,0x18,0x62,0x00, ++0x78,0x24,0x83,0xAE, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x43,0x24, ++0x21,0x10,0xC3,0x02, ++0xE8,0x23,0x4A,0xAC, ++0x30,0x38,0x64,0x8C, ++0xFF,0xFF,0x02,0x34, ++0x62,0xFF,0x82,0x14, ++0x21,0x20,0x60,0x01, ++0x64,0xFF,0x60,0x16, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x70,0x24, ++0xF0,0x23,0x05,0x96, ++0xEC,0x23,0x02,0x96, ++0x25,0xB0,0x11,0x3C, ++0x00,0x2C,0x05,0x00, ++0x21,0x28,0x45,0x00, ++0xB5,0x59,0x00,0x0C, ++0x68,0x0C,0x24,0x36, ++0xFC,0x23,0x02,0x8E, ++0xF8,0x23,0x05,0x8E, ++0xF4,0x23,0x03,0x96, ++0x6C,0x0C,0x24,0x36, ++0x21,0x28,0xA2,0x00, ++0x00,0x2C,0x05,0x00, ++0xB5,0x59,0x00,0x0C, ++0x21,0x28,0x65,0x00, ++0x28,0x26,0x00,0x08, ++0x02,0x80,0x04,0x3C, ++0xD6,0x25,0x00,0x08, ++0xE8,0x23,0x40,0xAE, ++0x4C,0xFF,0x20,0x11, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x62,0x24, ++0x80,0x18,0x0B,0x00, ++0x21,0x18,0x62,0x00, ++0xD4,0x05,0x64,0x8C, ++0x00,0x00,0x00,0x00, ++0x2B,0x20,0x44,0x01, ++0x44,0xFF,0x80,0x10, ++0x02,0x80,0x04,0x3C, ++0x69,0x26,0x00,0x08, ++0x30,0x1F,0x88,0x24, ++0x2D,0xFF,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x21,0x20,0x4B,0x02, ++0x3D,0x24,0x83,0x90, ++0x01,0x00,0x02,0x24, ++0x53,0x00,0x62,0x10, ++0x02,0x80,0x02,0x3C, ++0x2C,0x00,0xA3,0x8F, ++0x30,0x1F,0x42,0x24, ++0x21,0x38,0x00,0x00, ++0x21,0x20,0x62,0x00, ++0x21,0x18,0x87,0x00, ++0x01,0x00,0xE7,0x24, ++0x1D,0x00,0xE2,0x28, ++0xFC,0xFF,0x40,0x14, ++0x5A,0x24,0x60,0xA0, ++0x28,0x00,0xA4,0x8F, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x65,0x24, ++0x21,0x30,0x85,0x00, ++0x78,0x24,0xC2,0x8C, ++0x01,0x00,0x03,0x24, ++0x04,0x18,0x63,0x01, ++0x27,0x18,0x03,0x00, ++0x21,0x20,0xCB,0x00, ++0x24,0x10,0x43,0x00, ++0x3D,0x24,0x80,0xA0, ++0x78,0x24,0xC2,0xAC, ++0x12,0x00,0x60,0x15, ++0x20,0x24,0x80,0xA0, ++0x1E,0x24,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x0E,0x00,0x40,0x10, ++0x01,0x00,0x07,0x24, ++0x24,0x00,0xA3,0x8F, ++0x01,0x00,0x06,0x24, ++0x21,0x10,0x65,0x00, ++0x1E,0x24,0x44,0x90, ++0x18,0x24,0x45,0x8C, ++0x04,0x18,0xE6,0x00, ++0x24,0x10,0xA3,0x00, ++0x4B,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0xE7,0x24, ++0x2A,0x10,0x87,0x00, ++0xFA,0xFF,0x40,0x10, ++0x04,0x18,0xE6,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x44,0x24, ++0x20,0x00,0xA2,0x8F, ++0x01,0x00,0x67,0x25, ++0x21,0x18,0x44,0x00, ++0x1E,0x24,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x2A,0x10,0x47,0x00, ++0x0E,0x00,0x40,0x14, ++0x01,0x00,0x06,0x24, ++0x1C,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x64,0x00, ++0x1E,0x24,0x45,0x90, ++0x18,0x24,0x44,0x8C, ++0x04,0x18,0xE6,0x00, ++0x24,0x10,0x83,0x00, ++0x31,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0xE7,0x24, ++0x2A,0x10,0xA7,0x00, ++0xFA,0xFF,0x40,0x10, ++0x04,0x18,0xE6,0x00, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x44,0x90, ++0x22,0x00,0x03,0x24, ++0xE4,0xFE,0x83,0x14, ++0x02,0x80,0x04,0x3C, ++0xEE,0xFF,0x62,0x25, ++0xFF,0x00,0x42,0x30, ++0x02,0x00,0x42,0x2C, ++0x18,0x00,0x03,0x24, ++0x12,0x26,0x00,0x08, ++0x0B,0x58,0x62,0x00, ++0xC0,0x10,0x07,0x00, ++0x23,0x10,0x47,0x00, ++0xC2,0x10,0x02,0x00, ++0x2B,0x10,0x48,0x00, ++0xC4,0xFE,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xF1,0x25,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0x62,0x2D, ++0x0A,0x00,0x40,0x14, ++0x05,0x00,0x62,0x2D, ++0x5A,0x24,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x62,0x2C, ++0xB0,0xFF,0x40,0x10, ++0x01,0x00,0x62,0x24, ++0xF4,0x26,0x00,0x08, ++0x5A,0x24,0x82,0xA0, ++0x11,0x26,0x00,0x08, ++0x3D,0x24,0xA7,0xA0, ++0x04,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x5A,0x24,0x83,0x90, ++0x43,0x27,0x00,0x08, ++0x03,0x00,0x62,0x2C, ++0x5A,0x24,0x83,0x90, ++0x43,0x27,0x00,0x08, ++0x04,0x00,0x62,0x2C, ++0x13,0x00,0x02,0x24, ++0x62,0xFF,0x62,0x15, ++0x02,0x80,0x02,0x3C, ++0xBC,0x26,0x00,0x08, ++0x30,0x1F,0x43,0x24, ++0xFF,0x00,0xEB,0x30, ++0x2B,0x27,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x13,0x27,0x00,0x08, ++0xFF,0x00,0xEB,0x30, ++0xA7,0x26,0x00,0x08, ++0xFF,0x00,0xEB,0x30, ++0xD8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x14,0x00,0xB1,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x45,0x24, ++0xA9,0x37,0xA4,0x90, ++0xA4,0x37,0xA3,0x8C, ++0xA0,0x37,0xA2,0x8C, ++0x21,0x88,0x64,0x00, ++0x2B,0x10,0x22,0x02, ++0x60,0x00,0x40,0x10, ++0x21,0x80,0xA0,0x00, ++0x02,0x80,0x14,0x3C, ++0x21,0x98,0xA0,0x00, ++0x76,0x27,0x00,0x08, ++0x21,0x90,0xA0,0x00, ++0xA0,0x37,0x42,0x8E, ++0x10,0x00,0x31,0x26, ++0x2B,0x10,0x22,0x02, ++0x57,0x00,0x40,0x10, ++0x21,0x80,0x40,0x02, ++0xA9,0x37,0x02,0x92, ++0xFF,0xFF,0x23,0x32, ++0x02,0x80,0x05,0x3C, ++0x10,0x00,0x42,0x24, ++0x25,0x28,0x65,0x00, ++0x98,0x55,0x84,0x26, ++0x10,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0xA9,0x37,0x02,0xA2, ++0x6C,0x36,0x06,0x8E, ++0x00,0x00,0x00,0x00, ++0x42,0x24,0x06,0x00, ++0x1F,0x00,0x84,0x30, ++0xC0,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x38,0x50,0x00, ++0x1C,0x24,0xE3,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x1B,0x03,0x00, ++0x01,0x00,0x63,0x30, ++0xE3,0xFF,0x60,0x10, ++0x25,0xB0,0x02,0x3C, ++0x68,0x36,0x05,0x8E, ++0x21,0x10,0x82,0x00, ++0x60,0x01,0x44,0x90, ++0x82,0x1D,0x05,0x00, ++0x3F,0x00,0x63,0x30, ++0x04,0x00,0x0A,0x24, ++0x05,0x00,0x62,0x28, ++0x21,0x40,0x40,0x01, ++0x0B,0x40,0x62,0x00, ++0x07,0x00,0xA0,0x04, ++0xFF,0x00,0x89,0x30, ++0x08,0x24,0xE2,0x8C, ++0x04,0x00,0x08,0x24, ++0x01,0x00,0x42,0x24, ++0x08,0x24,0xE2,0xAC, ++0x6C,0x36,0x66,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x13,0x06,0x00, ++0x1F,0x00,0x42,0x30, ++0x08,0x00,0x42,0x28, ++0xCD,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x68,0x36,0x62,0x8E, ++0x00,0x00,0x00,0x00, ++0x3F,0x00,0x42,0x30, ++0xC8,0xFF,0x49,0x14, ++0x00,0x00,0x00,0x00, ++0x29,0x00,0x00,0x11, ++0x01,0x00,0x02,0x24, ++0x2E,0x00,0x02,0x11, ++0x02,0x00,0x02,0x24, ++0x33,0x00,0x02,0x11, ++0x03,0x00,0x02,0x24, ++0x38,0x00,0x02,0x11, ++0x00,0x00,0x00,0x00, ++0x3B,0x00,0x0A,0x11, ++0x00,0x00,0x00,0x00, ++0x0C,0x24,0xE2,0x8C, ++0x21,0x18,0x33,0x01, ++0x04,0x05,0x64,0x90, ++0x02,0x11,0x02,0x00, ++0x2B,0x10,0x44,0x00, ++0x3E,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x24,0xE3,0x8C, ++0x80,0x10,0x09,0x00, ++0x21,0x10,0x49,0x00, ++0x01,0x00,0x63,0x24, ++0x21,0x10,0x53,0x00, ++0x00,0x24,0xE3,0xAC, ++0x21,0x10,0x48,0x00, ++0xA8,0x03,0x44,0x90, ++0xE8,0x23,0xE3,0x8C, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x64,0x00, ++0xE8,0x23,0xE3,0xAC, ++0xA0,0x37,0x42,0x8E, ++0x10,0x00,0x31,0x26, ++0x2B,0x10,0x22,0x02, ++0xAB,0xFF,0x40,0x14, ++0x21,0x80,0x40,0x02, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xEC,0x23,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xEC,0x23,0xE2,0xAC, ++0x01,0x00,0x02,0x24, ++0xD4,0xFF,0x02,0x15, ++0x02,0x00,0x02,0x24, ++0xF0,0x23,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xF0,0x23,0xE2,0xAC, ++0x02,0x00,0x02,0x24, ++0xCF,0xFF,0x02,0x15, ++0x03,0x00,0x02,0x24, ++0xF4,0x23,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xF4,0x23,0xE2,0xAC, ++0x03,0x00,0x02,0x24, ++0xCA,0xFF,0x02,0x15, ++0x00,0x00,0x00,0x00, ++0xF8,0x23,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xC7,0xFF,0x0A,0x15, ++0xF8,0x23,0xE2,0xAC, ++0xFC,0x23,0xE2,0x8C, ++0x21,0x18,0x33,0x01, ++0x01,0x00,0x42,0x24, ++0xFC,0x23,0xE2,0xAC, ++0x0C,0x24,0xE2,0x8C, ++0x04,0x05,0x64,0x90, ++0x02,0x11,0x02,0x00, ++0x2B,0x10,0x44,0x00, ++0xC4,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x04,0x24,0xE3,0x8C, ++0x80,0x10,0x09,0x00, ++0x21,0x10,0x49,0x00, ++0x01,0x00,0x63,0x24, ++0x21,0x10,0x53,0x00, ++0x04,0x24,0xE3,0xAC, ++0x21,0x10,0x48,0x00, ++0x39,0x04,0x44,0x90, ++0xE8,0x23,0xE3,0x8C, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x64,0x00, ++0xC7,0x27,0x00,0x08, ++0xE8,0x23,0xE3,0xAC, ++0x23,0x10,0xA4,0x00, ++0x2B,0x18,0xA4,0x00, ++0x23,0x20,0x85,0x00, ++0x08,0x00,0xE0,0x03, ++0x0B,0x10,0x83,0x00, ++0x20,0xFF,0xBD,0x27, ++0xCC,0x00,0xB5,0xAF, ++0xDC,0x00,0xBF,0xAF, ++0xD8,0x00,0xBE,0xAF, ++0xD4,0x00,0xB7,0xAF, ++0xD0,0x00,0xB6,0xAF, ++0xC8,0x00,0xB4,0xAF, ++0xC4,0x00,0xB3,0xAF, ++0xC0,0x00,0xB2,0xAF, ++0xBC,0x00,0xB1,0xAF, ++0xB8,0x00,0xB0,0xAF, ++0x21,0xA8,0x00,0x00, ++0x40,0x11,0x15,0x00, ++0x10,0x00,0xA3,0x27, ++0x21,0x10,0x43,0x00, ++0x07,0x00,0x16,0x24, ++0xFF,0xFF,0xD6,0x26, ++0x00,0x00,0x40,0xAC, ++0xFD,0xFF,0xC1,0x06, ++0x04,0x00,0x42,0x24, ++0x01,0x00,0xB5,0x26, ++0x03,0x00,0xA2,0x2E, ++0xF6,0xFF,0x40,0x14, ++0x40,0x11,0x15,0x00, ++0x25,0xB0,0x10,0x3C, ++0xC4,0x02,0x02,0x36, ++0x00,0x00,0x40,0xAC, ++0x04,0x00,0x03,0x36, ++0x00,0x00,0x62,0x8C, ++0x04,0x0C,0x03,0x36, ++0x00,0x00,0x63,0x8C, ++0x08,0x0C,0x04,0x36, ++0x0F,0x00,0x11,0x3C, ++0xAC,0x00,0xA3,0xAF, ++0x00,0x00,0x84,0x8C, ++0x24,0x10,0x51,0x00, ++0x02,0xF4,0x02,0x00, ++0xB0,0x00,0xA4,0xAF, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x21,0x20,0x00,0x00, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x70,0x00,0xA2,0xAF, ++0x00,0x60,0x92,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x21,0x20,0x00,0x00, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x74,0x00,0xA2,0xAF, ++0x00,0x60,0x92,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0xE0,0x0E,0x02,0x36, ++0x21,0x20,0x40,0x00, ++0x00,0x00,0x42,0x8C, ++0xDC,0x0E,0x12,0x36, ++0x70,0x0E,0x13,0x36, ++0x78,0x00,0xA2,0xAF, ++0x00,0x00,0x42,0x8E, ++0x74,0x0E,0x14,0x36, ++0x78,0x0E,0x15,0x36, ++0x7C,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8E, ++0x7C,0x0E,0x16,0x36, ++0x80,0x0E,0x17,0x36, ++0x80,0x00,0xA3,0xAF, ++0x00,0x00,0x82,0x8E, ++0xD4,0x0E,0x10,0x36, ++0xED,0x3F,0x11,0x3C, ++0x84,0x00,0xA2,0xAF, ++0x00,0x00,0xA3,0x8E, ++0xFB,0x92,0x25,0x36, ++0x88,0x00,0xA3,0xAF, ++0x00,0x00,0xC2,0x8E, ++0x00,0x00,0x00,0x00, ++0x8C,0x00,0xA2,0xAF, ++0x00,0x00,0xE3,0x8E, ++0x25,0xB0,0x02,0x3C, ++0x84,0x0E,0x42,0x34, ++0x90,0x00,0xA3,0xAF, ++0x00,0x00,0x42,0x8C, ++0x25,0xB0,0x03,0x3C, ++0x88,0x0E,0x63,0x34, ++0x94,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x8C,0x0E,0x42,0x34, ++0x98,0x00,0xA3,0xAF, ++0x00,0x00,0x42,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xD0,0x0E,0x63,0x34, ++0x9C,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x00,0x00,0x00,0x00, ++0xA0,0x00,0xA3,0xAF, ++0x00,0x00,0x02,0x8E, ++0x25,0xB0,0x03,0x3C, ++0xD8,0x0E,0x63,0x34, ++0xA4,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xA8,0x00,0xA3,0xAF, ++0x21,0x20,0x40,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0x60,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0x80,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0xA0,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0xC0,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0xE0,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x02,0x3C, ++0xA8,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x25,0xB0,0x13,0x3C, ++0x02,0x80,0x03,0x3C, ++0xAC,0xED,0x63,0x24, ++0x00,0x00,0x64,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0xB0,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xB0,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0xFF,0x03,0x14,0x3C, ++0x02,0x80,0x03,0x3C, ++0xB4,0xED,0x63,0x24, ++0x00,0x00,0x64,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x10,0x00,0xB7,0x27, ++0x21,0x20,0x00,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x02,0x3C, ++0xB8,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0xE4,0x28,0x00,0x08, ++0x21,0xA8,0x00,0x00, ++0x6E,0x00,0xC2,0x13, ++0x02,0x80,0x02,0x3C, ++0xAC,0x0E,0x62,0x36, ++0x94,0x0E,0x63,0x36, ++0x00,0x00,0x48,0x8C, ++0x00,0x00,0x64,0x8C, ++0xB4,0x0E,0x62,0x36, ++0x9C,0x0E,0x63,0x36, ++0x00,0x00,0x45,0x8C, ++0x00,0x00,0x66,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xBC,0x0E,0x63,0x34, ++0x00,0x00,0x67,0x8C, ++0x24,0x20,0x94,0x00, ++0x00,0xD8,0x02,0x3C, ++0x24,0x10,0x02,0x01, ++0x24,0x28,0xB4,0x00, ++0x24,0x30,0xD4,0x00, ++0x24,0x38,0xF4,0x00, ++0x02,0x24,0x04,0x00, ++0x20,0x01,0x03,0x24, ++0x01,0x00,0x42,0x2C, ++0x02,0x2C,0x05,0x00, ++0x02,0x34,0x06,0x00, ++0xE8,0x00,0x83,0x10, ++0x02,0x3C,0x07,0x00, ++0xE6,0x00,0xA3,0x10, ++0x20,0x00,0x03,0x24, ++0xE4,0x00,0xC3,0x10, ++0x00,0x00,0x00,0x00, ++0xE2,0x00,0xE3,0x10, ++0x01,0x00,0x08,0x24, ++0x80,0x00,0x03,0x24, ++0x08,0x00,0x83,0x10, ++0x21,0x20,0x00,0x00, ++0x06,0x00,0xA3,0x10, ++0x21,0x20,0x00,0x00, ++0xE0,0x03,0x03,0x24, ++0x03,0x00,0xC3,0x10, ++0x00,0x00,0x00,0x00, ++0xDB,0x00,0xE3,0x10, ++0x01,0x00,0x04,0x24, ++0x05,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x00,0x11, ++0x00,0x00,0x00,0x00, ++0xD7,0x00,0x80,0x14, ++0x94,0x0E,0x63,0x36, ++0x01,0x00,0xB5,0x26, ++0x0A,0x00,0xA2,0x2E, ++0x01,0x01,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xCB,0xFF,0xC0,0x17, ++0x01,0x00,0x02,0x24, ++0xA0,0x00,0x03,0x3C, ++0x30,0x54,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x04,0x0C,0x64,0x36, ++0x08,0x00,0x05,0x3C, ++0xE4,0x00,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x08,0x0C,0x64,0x36, ++0x28,0x0E,0x64,0x36, ++0x02,0x5C,0x00,0x0C, ++0x80,0x80,0x05,0x3C, ++0x14,0x02,0x02,0x3C, ++0x48,0x01,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x40,0x0E,0x64,0x36, ++0x16,0x68,0x05,0x3C, ++0xA2,0x04,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x44,0x0E,0x64,0x36, ++0x4C,0x0E,0x64,0x36, ++0x02,0x5C,0x00,0x0C, ++0xD1,0x28,0x05,0x24, ++0x14,0x02,0x03,0x3C, ++0x4D,0x01,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x60,0x0E,0x64,0x36, ++0x16,0x28,0x05,0x3C, ++0xBA,0x08,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x64,0x0E,0x64,0x36, ++0x6C,0x0E,0x64,0x36, ++0x02,0x5C,0x00,0x0C, ++0xD1,0x28,0x05,0x24, ++0x00,0xFB,0x05,0x3C, ++0x01,0x00,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0x64,0x36, ++0x00,0xF8,0x05,0x3C, ++0x01,0x00,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0x64,0x36, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0xA0,0x00,0x02,0x3C, ++0x33,0x54,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x04,0x0C,0x64,0x36, ++0x08,0x0C,0x64,0x36, ++0x02,0x5C,0x00,0x0C, ++0xE4,0x00,0x05,0x24, ++0x28,0x0E,0x64,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x01,0x00,0x02,0x24, ++0x96,0xFF,0xC2,0x17, ++0xAC,0x0E,0x62,0x36, ++0x02,0x80,0x02,0x3C, ++0xBC,0xED,0x42,0x24, ++0x25,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0x8C, ++0x20,0x08,0x63,0x34, ++0x00,0x00,0x71,0x8C, ++0x00,0x01,0x03,0x3C, ++0x00,0x01,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x25,0xB0,0x12,0x3C, ++0x00,0x01,0x02,0x3C, ++0x00,0x01,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x28,0x08,0x44,0x36, ++0xA0,0x00,0x03,0x3C, ++0x30,0x54,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x04,0x0C,0x44,0x36, ++0x08,0x00,0x05,0x3C, ++0xE4,0x00,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x08,0x0C,0x44,0x36, ++0x28,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x80,0x80,0x05,0x3C, ++0x00,0x01,0x02,0x3C, ++0x00,0x7C,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x30,0x0E,0x44,0x36, ++0x00,0x01,0x03,0x3C, ++0x00,0x48,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x34,0x0E,0x44,0x36, ++0x00,0x10,0x02,0x3C, ++0x1F,0xDC,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x38,0x0E,0x44,0x36, ++0x00,0x10,0x03,0x3C, ++0x1F,0x8C,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x3C,0x0E,0x44,0x36, ++0x14,0x02,0x02,0x3C, ++0x02,0x01,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x40,0x0E,0x44,0x36, ++0x16,0x68,0x05,0x3C, ++0xC7,0x04,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x44,0x0E,0x44,0x36, ++0x4C,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0xD1,0x28,0x05,0x24, ++0x6C,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0xD1,0x28,0x05,0x24, ++0x00,0x01,0x03,0x3C, ++0x00,0x7C,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x50,0x0E,0x44,0x36, ++0x00,0x01,0x02,0x3C, ++0x00,0x48,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x54,0x0E,0x44,0x36, ++0x00,0x10,0x03,0x3C, ++0x23,0xDC,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x58,0x0E,0x44,0x36, ++0x00,0x10,0x02,0x3C, ++0x23,0x8C,0x45,0x34, ++0x02,0x5C,0x00,0x0C, ++0x5C,0x0E,0x44,0x36, ++0x14,0x02,0x03,0x3C, ++0x02,0x01,0x65,0x34, ++0x02,0x5C,0x00,0x0C, ++0x60,0x0E,0x44,0x36, ++0x16,0x28,0x05,0x3C, ++0x07,0x0D,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x64,0x0E,0x44,0x36, ++0x48,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0xFB,0x05,0x3C, ++0x00,0xF8,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0x44,0x36, ++0x00,0x02,0x10,0x3C, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0x4C,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0xD1,0x28,0x05,0x36, ++0xD1,0x28,0x05,0x36, ++0x02,0x5C,0x00,0x0C, ++0x6C,0x0E,0x44,0x36, ++0x48,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0xFB,0x05,0x3C, ++0x00,0xF8,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0x44,0x36, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0xAC,0x00,0xA5,0x8F, ++0x04,0x0C,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x31,0x32, ++0xB0,0x00,0xA5,0x8F, ++0x08,0x0C,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x2B,0x88,0x11,0x00, ++0x28,0x0E,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x23,0xFF,0x20,0x16, ++0xAC,0x0E,0x62,0x36, ++0x02,0x80,0x02,0x3C, ++0xBC,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x05,0x3C, ++0x28,0x08,0x44,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x05,0x3C, ++0xAC,0x0E,0x62,0x36, ++0x94,0x0E,0x63,0x36, ++0x00,0x00,0x48,0x8C, ++0x00,0x00,0x64,0x8C, ++0xB4,0x0E,0x62,0x36, ++0x9C,0x0E,0x63,0x36, ++0x00,0x00,0x45,0x8C, ++0x00,0x00,0x66,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xBC,0x0E,0x63,0x34, ++0x00,0x00,0x67,0x8C, ++0x24,0x20,0x94,0x00, ++0x00,0xD8,0x02,0x3C, ++0x24,0x10,0x02,0x01, ++0x24,0x28,0xB4,0x00, ++0x24,0x30,0xD4,0x00, ++0x24,0x38,0xF4,0x00, ++0x02,0x24,0x04,0x00, ++0x20,0x01,0x03,0x24, ++0x01,0x00,0x42,0x2C, ++0x02,0x2C,0x05,0x00, ++0x02,0x34,0x06,0x00, ++0x1A,0xFF,0x83,0x14, ++0x02,0x3C,0x07,0x00, ++0x80,0x00,0x03,0x24, ++0x20,0xFF,0x83,0x14, ++0x21,0x40,0x00,0x00, ++0xDA,0x28,0x00,0x08, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0x62,0x8C, ++0x9C,0x0E,0x65,0x36, ++0xA4,0x0E,0x66,0x36, ++0x24,0x10,0x54,0x00, ++0x02,0x14,0x02,0x00, ++0x00,0x00,0xE2,0xAE, ++0x00,0x00,0xA4,0x8C, ++0xAC,0x0E,0x67,0x36, ++0xB4,0x0E,0x65,0x36, ++0x24,0x20,0x94,0x00, ++0x02,0x24,0x04,0x00, ++0x04,0x00,0xE4,0xAE, ++0x00,0x00,0xC3,0x8C, ++0xC4,0x0E,0x64,0x36, ++0x24,0x18,0x74,0x00, ++0x02,0x1C,0x03,0x00, ++0x08,0x00,0xE3,0xAE, ++0x00,0x00,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x54,0x00, ++0x02,0x14,0x02,0x00, ++0x0C,0x00,0xE2,0xAE, ++0x00,0x00,0xA3,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x18,0x74,0x00, ++0x02,0x1C,0x03,0x00, ++0x10,0x00,0xE3,0xAE, ++0x25,0xB0,0x03,0x3C, ++0xBC,0x0E,0x63,0x34, ++0x00,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x54,0x00, ++0x02,0x14,0x02,0x00, ++0x14,0x00,0xE2,0xAE, ++0x00,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x18,0x74,0x00, ++0x02,0x1C,0x03,0x00, ++0x18,0x00,0xE3,0xAE, ++0x25,0xB0,0x03,0x3C, ++0xCC,0x0E,0x63,0x34, ++0x00,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x54,0x00, ++0x02,0x14,0x02,0x00, ++0x1C,0x00,0xE2,0xAE, ++0x01,0x00,0xD6,0x26, ++0x03,0x00,0xC2,0x2E, ++0xC7,0xFE,0x40,0x14, ++0x20,0x00,0xF7,0x26, ++0x10,0x00,0xB0,0x8F, ++0x00,0x00,0x00,0x00, ++0x49,0x01,0x00,0x16, ++0x00,0x00,0x00,0x00, ++0x30,0x00,0xB1,0x8F, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x20,0x16, ++0x21,0x20,0x00,0x02, ++0x50,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x29,0x00,0x40,0x10, ++0xFF,0x00,0x05,0x24, ++0x21,0x20,0x00,0x02, ++0x05,0x28,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x03,0x00,0x42,0x2C, ++0x08,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x34,0x00,0xA5,0x8F, ++0x14,0x00,0xA4,0x8F, ++0x05,0x28,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x42,0x2C, ++0x1C,0x00,0x40,0x14, ++0x21,0x28,0x00,0x00, ++0x50,0x00,0xB2,0x8F, ++0x21,0x20,0x00,0x02, ++0x05,0x28,0x00,0x0C, ++0x21,0x28,0x40,0x02, ++0x03,0x00,0x42,0x2C, ++0x09,0x00,0x40,0x10, ++0x21,0x20,0x20,0x02, ++0x54,0x00,0xA5,0x8F, ++0x14,0x00,0xA4,0x8F, ++0x05,0x28,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x42,0x2C, ++0x0E,0x00,0x40,0x14, ++0x21,0x28,0x00,0x00, ++0x21,0x20,0x20,0x02, ++0x05,0x28,0x00,0x0C, ++0x21,0x28,0x40,0x02, ++0x03,0x00,0x42,0x2C, ++0xE0,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x54,0x00,0xA5,0x8F, ++0x34,0x00,0xA4,0x8F, ++0x05,0x28,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x42,0x2C, ++0xD9,0x00,0x40,0x10, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x02,0x24, ++0xDB,0x00,0xA2,0x10, ++0x25,0xB0,0x03,0x3C, ++0x10,0x00,0xA2,0x27, ++0x40,0x29,0x05,0x00, ++0x02,0x80,0x0F,0x3C, ++0x21,0x28,0xA2,0x00, ++0x30,0x1F,0xEC,0x25, ++0x00,0x00,0xA6,0x8C, ++0x0C,0x00,0xA7,0x8C, ++0x0C,0x00,0x83,0x8D, ++0x10,0x00,0x84,0x8D, ++0x04,0x00,0xA8,0x8C, ++0x10,0x00,0xA9,0x8C, ++0x00,0xFC,0x02,0x24, ++0x08,0x00,0xAA,0x8C, ++0x14,0x00,0xAB,0x8C, ++0x24,0x20,0x82,0x00, ++0xFF,0x03,0xC6,0x30, ++0x24,0x18,0x62,0x00, ++0xFF,0x03,0xE7,0x30, ++0xF0,0xFF,0x02,0x3C, ++0xFF,0x03,0x42,0x34, ++0x25,0x18,0x66,0x00, ++0x25,0x20,0x87,0x00, ++0xFF,0x03,0x08,0x31, ++0xFF,0x03,0x29,0x31, ++0x24,0x20,0x82,0x00, ++0x24,0x18,0x62,0x00, ++0x80,0x42,0x08,0x00, ++0x80,0x4A,0x09,0x00, ++0x0F,0xC0,0x02,0x3C, ++0x1C,0x00,0xA6,0x8C, ++0x18,0x00,0xA7,0x8C, ++0xFF,0xFF,0x42,0x34, ++0x25,0x18,0x68,0x00, ++0x25,0x20,0x89,0x00, ++0xFF,0x03,0x4A,0x31, ++0xFF,0x03,0x6B,0x31, ++0x24,0x20,0x82,0x00, ++0x00,0x55,0x0A,0x00, ++0x24,0x18,0x62,0x00, ++0x00,0x5D,0x0B,0x00, ++0x25,0x18,0x6A,0x00, ++0x25,0x20,0x8B,0x00, ++0x16,0x00,0x86,0xA5, ++0x0C,0x00,0x83,0xAD, ++0x10,0x00,0x84,0xAD, ++0x14,0x00,0x87,0xA5, ++0x30,0x1F,0xF1,0x25, ++0x10,0x00,0x22,0x8E, ++0x01,0x00,0x03,0x24, ++0x82,0x17,0x02,0x00, ++0x4D,0x00,0x43,0x10, ++0x25,0xB0,0x12,0x3C, ++0x0C,0x00,0x23,0x8E, ++0x80,0x0C,0x44,0x36, ++0x00,0x00,0x88,0x8C, ++0x00,0x02,0x62,0x30, ++0xC0,0xFF,0x13,0x3C, ++0x82,0x6D,0x08,0x00, ++0x03,0x00,0x40,0x10, ++0xFF,0x03,0x65,0x30, ++0x00,0xFC,0x02,0x24, ++0x25,0x28,0xA2,0x00, ++0x18,0x00,0xAD,0x00, ++0x82,0x62,0x03,0x00, ++0xFF,0x03,0x8C,0x31, ++0x00,0x02,0x83,0x31, ++0x12,0x10,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x03,0x00,0x60,0x10, ++0xFF,0x03,0x46,0x30, ++0x00,0xFC,0x02,0x24, ++0x25,0x60,0x82,0x01, ++0x18,0x00,0x8D,0x01, ++0x00,0xFC,0x74,0x36, ++0x24,0x28,0x14,0x01, ++0x12,0x80,0x00,0x00, ++0x02,0x82,0x10,0x00, ++0x3F,0x00,0x02,0x32, ++0x00,0x14,0x02,0x00, ++0x25,0x28,0xA2,0x00, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0xA6,0x00, ++0x94,0x0C,0x44,0x36, ++0x00,0x00,0x85,0x8C, ++0xFF,0x0F,0x02,0x3C, ++0xFF,0xFF,0x55,0x34, ++0xC0,0x03,0x10,0x32, ++0x24,0x28,0xB5,0x00, ++0x80,0x85,0x10,0x00, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0xB0,0x00, ++0x10,0x00,0x2C,0x8E, ++0x88,0x0C,0x44,0x36, ++0x00,0x00,0x88,0x8C, ++0x82,0x2A,0x0C,0x00, ++0xFF,0x03,0xA5,0x30, ++0x24,0x10,0x13,0x01, ++0x00,0x02,0xA3,0x30, ++0x03,0x00,0x60,0x10, ++0x82,0x6D,0x02,0x00, ++0x00,0xFC,0x02,0x24, ++0x25,0x28,0xA2,0x00, ++0x18,0x00,0xAD,0x00, ++0x02,0x65,0x0C,0x00, ++0xFF,0x03,0x8C,0x31, ++0x00,0x02,0x83,0x31, ++0x12,0x10,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x03,0x00,0x60,0x10, ++0xFF,0x03,0x46,0x30, ++0x00,0xFC,0x02,0x24, ++0x25,0x60,0x82,0x01, ++0x18,0x00,0x8D,0x01, ++0x24,0x28,0x14,0x01, ++0x12,0x80,0x00,0x00, ++0x02,0x82,0x10,0x00, ++0x3F,0x00,0x02,0x32, ++0x00,0x14,0x02,0x00, ++0x25,0x28,0xA2,0x00, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0xA6,0x00, ++0x9C,0x0C,0x44,0x36, ++0x00,0x00,0x85,0x8C, ++0xC0,0x03,0x10,0x32, ++0x80,0x85,0x10,0x00, ++0x24,0x28,0xB5,0x00, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0xB0,0x00, ++0x78,0x00,0xA5,0x8F, ++0x25,0xB0,0x10,0x3C, ++0x02,0x5C,0x00,0x0C, ++0xE0,0x0E,0x04,0x36, ++0x7C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xDC,0x0E,0x04,0x36, ++0x80,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x70,0x0E,0x04,0x36, ++0x84,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x74,0x0E,0x04,0x36, ++0x88,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x78,0x0E,0x04,0x36, ++0x8C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x7C,0x0E,0x04,0x36, ++0x90,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x80,0x0E,0x04,0x36, ++0x94,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x84,0x0E,0x04,0x36, ++0x98,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x88,0x0E,0x04,0x36, ++0x9C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x8C,0x0E,0x04,0x36, ++0xA0,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xD0,0x0E,0x04,0x36, ++0xA4,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xD4,0x0E,0x04,0x36, ++0xA8,0x00,0xA5,0x8F, ++0x88,0x0E,0x04,0x36, ++0x02,0x5C,0x00,0x0C, ++0x0F,0x00,0x10,0x3C, ++0x70,0x00,0xA6,0x8F, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x74,0x00,0xA6,0x8F, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0xFF,0xFF,0x05,0x36, ++0x8A,0x47,0x00,0x0C, ++0x1E,0x00,0x04,0x24, ++0x21,0x88,0x40,0x00, ++0xFD,0xFF,0x06,0x24, ++0x01,0x00,0x42,0x34, ++0x24,0x30,0x46,0x00, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x1E,0x00,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x03,0x00,0x26,0x36, ++0x5F,0x47,0x00,0x0C, ++0x1E,0x00,0x04,0x24, ++0xDC,0x00,0xBF,0x8F, ++0xD8,0x00,0xBE,0x8F, ++0xD4,0x00,0xB7,0x8F, ++0xD0,0x00,0xB6,0x8F, ++0xCC,0x00,0xB5,0x8F, ++0xC8,0x00,0xB4,0x8F, ++0xC4,0x00,0xB3,0x8F, ++0xC0,0x00,0xB2,0x8F, ++0xBC,0x00,0xB1,0x8F, ++0xB8,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0xE0,0x00,0xBD,0x27, ++0xFF,0x00,0x05,0x24, ++0xFF,0x00,0x02,0x24, ++0x29,0xFF,0xA2,0x14, ++0x10,0x00,0xA2,0x27, ++0x25,0xB0,0x03,0x3C, ++0x94,0x0E,0x62,0x34, ++0x9C,0x0E,0x64,0x34, ++0xA4,0x0E,0x65,0x34, ++0xAC,0x0E,0x66,0x34, ++0x02,0x80,0x0F,0x3C, ++0x00,0x00,0x49,0x8C, ++0x30,0x1F,0xED,0x25, ++0x00,0x00,0x8C,0x8C, ++0x00,0x00,0xAE,0x8C, ++0x00,0x00,0xC7,0x8C, ++0xB4,0x0E,0x62,0x34, ++0x0C,0x00,0xA4,0x8D, ++0x10,0x00,0xA5,0x8D, ++0x00,0x00,0x4A,0x8C, ++0xFF,0x03,0x06,0x3C, ++0x00,0xFC,0x08,0x24, ++0xBC,0x0E,0x62,0x34, ++0x24,0x48,0x26,0x01, ++0x24,0x38,0xE6,0x00, ++0x00,0x00,0x4B,0x8C, ++0x24,0x28,0xA8,0x00, ++0x24,0x20,0x88,0x00, ++0x02,0x3C,0x07,0x00, ++0xCC,0x0E,0x68,0x34, ++0x02,0x4C,0x09,0x00, ++0xC4,0x0E,0x63,0x34, ++0xF0,0xFF,0x02,0x3C, ++0xFF,0x03,0x42,0x34, ++0x25,0x28,0xA7,0x00, ++0x25,0x20,0x89,0x00, ++0x00,0x00,0x67,0x8C, ++0x24,0x60,0x86,0x01, ++0x00,0x00,0x03,0x8D, ++0x24,0x50,0x46,0x01, ++0x24,0x28,0xA2,0x00, ++0x24,0x20,0x82,0x00, ++0x82,0x61,0x0C,0x00, ++0x82,0x51,0x0A,0x00, ++0x0F,0xC0,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x25,0x20,0x8C,0x00, ++0x25,0x28,0xAA,0x00, ++0x24,0x70,0xC6,0x01, ++0x24,0x58,0x66,0x01, ++0x24,0x28,0xA2,0x00, ++0x24,0x18,0x66,0x00, ++0x00,0x71,0x0E,0x00, ++0x24,0x20,0x82,0x00, ++0x00,0x59,0x0B,0x00, ++0x24,0x38,0xE6,0x00, ++0x25,0x20,0x8E,0x00, ++0x25,0x28,0xAB,0x00, ++0x02,0x3C,0x07,0x00, ++0x02,0x1C,0x03,0x00, ++0x16,0x00,0xA3,0xA5, ++0x0C,0x00,0xA4,0xAD, ++0x10,0x00,0xA5,0xAD, ++0x4D,0x2A,0x00,0x08, ++0x14,0x00,0xA7,0xA5, ++0x30,0x00,0xB1,0x8F, ++0xF5,0x29,0x00,0x08, ++0x21,0x20,0x00,0x02, ++0x25,0xB0,0x05,0x3C, ++0x4C,0x00,0xA2,0x34, ++0x02,0x80,0x07,0x3C, ++0x00,0x00,0x43,0x90, ++0x30,0x1F,0xE4,0x24, ++0xC1,0x1B,0x82,0x90, ++0x03,0x00,0x66,0x30, ++0x24,0x00,0x46,0x10, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xC0,0x14, ++0x25,0xB0,0x03,0x3C, ++0xE6,0x02,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x15,0x00,0x40,0x14, ++0x58,0x00,0x62,0x34, ++0x1C,0x00,0x02,0x24, ++0x50,0x0C,0xA3,0x34, ++0x00,0x00,0x62,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x25,0xB0,0x02,0x3C, ++0x58,0x0C,0x42,0x34, ++0x1C,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x25,0xB0,0x03,0x3C, ++0x58,0x00,0x62,0x34, ++0x00,0x00,0x45,0x8C, ++0x29,0xB0,0x04,0x3C, ++0x5C,0x00,0x63,0x34, ++0x00,0x00,0x85,0xAC, ++0x00,0x00,0x65,0x8C, ++0x30,0x1F,0xE2,0x24, ++0x04,0x00,0x84,0x34, ++0xC1,0x1B,0x46,0xA0, ++0x00,0x00,0x85,0xAC, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x2D,0x0A,0x46,0x34, ++0xA2,0x0D,0x43,0x34, ++0xA4,0x0D,0x44,0x34, ++0xA6,0x0D,0x45,0x34, ++0xA8,0x0D,0x42,0x34, ++0x00,0x00,0x67,0x94, ++0x00,0x00,0x88,0x94, ++0x00,0x00,0xA9,0x94, ++0x00,0x00,0x44,0x94, ++0x00,0x00,0xC3,0x90, ++0x02,0x80,0x0A,0x3C, ++0x30,0x1F,0x42,0x25, ++0x40,0x00,0x63,0x34, ++0xFF,0x00,0x63,0x30, ++0xDE,0x02,0x44,0xA4, ++0x00,0x00,0xC3,0xA0, ++0xD8,0x02,0x47,0xA4, ++0xDA,0x02,0x48,0xA4, ++0xDC,0x02,0x49,0xA4, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x25,0xB0,0x07,0x3C, ++0x5B,0x0A,0xE2,0x34, ++0x00,0x00,0x44,0x90, ++0x30,0x1F,0x46,0x25, ++0x5C,0x0A,0xE2,0x34, ++0x00,0x00,0x45,0x90, ++0xD8,0x02,0xC3,0x94, ++0xDA,0x02,0xC2,0x94, ++0xDC,0x02,0xC9,0x94, ++0xDE,0x02,0xC8,0x94, ++0xFF,0x00,0x84,0x30, ++0x21,0x18,0x62,0x00, ++0x00,0x22,0x04,0x00, ++0xFF,0x00,0xA5,0x30, ++0x21,0x20,0x85,0x00, ++0x21,0x18,0x69,0x00, ++0xFF,0xFF,0x82,0x30, ++0x21,0x18,0x68,0x00, ++0x21,0x18,0x62,0x00, ++0x64,0x0C,0xE7,0x34, ++0xFF,0xFF,0x42,0x30, ++0xE0,0x02,0xC3,0xAC, ++0x00,0x00,0xE2,0xA4, ++0xE4,0x02,0xC4,0xA4, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x42,0x8D, ++0x01,0x00,0x03,0x24, ++0x0F,0x00,0x44,0x30, ++0x07,0x00,0x83,0x10, ++0x30,0x1F,0x45,0x25, ++0xB6,0x5F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE4,0x02,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x17,0x02,0x00, ++0x03,0x00,0x42,0x30, ++0xF5,0xFF,0x40,0x14, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x63,0x30, ++0x3F,0x00,0x64,0x10, ++0x30,0x1F,0x44,0x25, ++0xE6,0x02,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x40,0x14, ++0x01,0x00,0x03,0x24, ++0x30,0x1F,0x42,0x8D, ++0x00,0x00,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x0F,0x00,0x42,0x30, ++0x3C,0x00,0x43,0x10, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0x45,0x25, ++0xE6,0x02,0xA3,0x90, ++0xFF,0x00,0x02,0x24, ++0xE0,0xFF,0x62,0x14, ++0x25,0xB0,0x03,0x3C, ++0xC8,0x02,0xA2,0x94, ++0xE0,0x02,0xA6,0x8C, ++0x50,0x0C,0x63,0x34, ++0x00,0x00,0x64,0x90, ++0x2B,0x10,0xC2,0x00, ++0x85,0x00,0x40,0x10, ++0x7F,0x00,0x84,0x30, ++0xFF,0xFF,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x30,0x1F,0x45,0x25, ++0xD0,0x02,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x64,0x00, ++0x78,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x60,0x00, ++0x30,0x1F,0x43,0x25, ++0xE0,0x02,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x11,0x27,0x42,0x2C, ++0x6D,0x00,0x40,0x14, ++0x3A,0x00,0x82,0x2C, ++0x32,0x00,0x04,0x24, ++0x44,0x00,0x03,0x24, ++0x25,0xB0,0x02,0x3C, ++0x30,0x0C,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x25,0xB0,0x02,0x3C, ++0x50,0x0C,0x42,0x34, ++0x00,0x00,0x44,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x25,0xB0,0x02,0x3C, ++0x58,0x0C,0x42,0x34, ++0x00,0x00,0x44,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0xA4,0x2B,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE6,0x02,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xBF,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x02,0x24, ++0xB6,0x2B,0x00,0x08, ++0xE6,0x02,0xA2,0xA0, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x63,0x30, ++0xA4,0xFF,0x60,0x10, ++0xFF,0xFF,0x02,0x34, ++0x80,0x36,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0xA0,0xFF,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0xE0,0x02,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x65,0x00,0x62,0x2C, ++0x59,0x00,0x40,0x14, ++0x28,0x00,0x62,0x2C, ++0xD2,0x02,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0xFE,0xFF,0x42,0x24, ++0xFC,0xFF,0x42,0x28, ++0x02,0x00,0x40,0x10, ++0xFE,0xFF,0x62,0x24, ++0xFC,0xFF,0x02,0x24, ++0xD2,0x02,0x82,0xA0, ++0x30,0x1F,0x45,0x25, ++0x80,0x36,0xA2,0x8C, ++0xD2,0x02,0xA3,0x90, ++0xCE,0x02,0xA6,0x90, ++0x02,0x11,0x02,0x00, ++0x7F,0x00,0x42,0x30, ++0x0A,0x00,0x44,0x24, ++0x23,0x18,0x83,0x00, ++0x00,0x26,0x03,0x00, ++0x03,0x26,0x04,0x00, ++0xFF,0x00,0xC2,0x30, ++0x2A,0x10,0x44,0x00, ++0x4D,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x26,0x06,0x00, ++0x03,0x26,0x04,0x00, ++0x30,0x1F,0x43,0x25, ++0xE0,0x02,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x11,0x27,0x42,0x2C, ++0x33,0x00,0x40,0x14, ++0x3A,0x00,0x82,0x28, ++0x32,0x00,0x82,0x28, ++0x30,0x00,0x40,0x10, ++0x3A,0x00,0x82,0x28, ++0x32,0x00,0x04,0x24, ++0x44,0x00,0x03,0x24, ++0x25,0xB0,0x02,0x3C, ++0x30,0x0C,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x25,0xB0,0x02,0x3C, ++0x50,0x0C,0x42,0x34, ++0xFF,0x00,0x84,0x30, ++0x00,0x00,0x44,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x25,0xB0,0x02,0x3C, ++0x58,0x0C,0x42,0x34, ++0x00,0x00,0x44,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0xA4,0x2B,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x95,0xFF,0x40,0x10, ++0x48,0x00,0x03,0x24, ++0xDD,0x2B,0x00,0x08, ++0x44,0x00,0x03,0x24, ++0xD1,0x02,0xA3,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x83,0x00, ++0xD5,0x2B,0x00,0x08, ++0x0B,0x20,0x62,0x00, ++0xCA,0x02,0xA2,0x94, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0xC2,0x00, ++0x7A,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xCC,0x02,0xA2,0x94, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0xC2,0x00, ++0x07,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xCD,0x2B,0x00,0x08, ++0x01,0x00,0x82,0x24, ++0xD2,0xFF,0x40,0x10, ++0x48,0x00,0x03,0x24, ++0x2F,0x2C,0x00,0x08, ++0x44,0x00,0x03,0x24, ++0xCD,0x2B,0x00,0x08, ++0x02,0x00,0x82,0x24, ++0xB2,0xFF,0x40,0x10, ++0x30,0x1F,0x45,0x25, ++0xD2,0x02,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0x02,0x00,0x42,0x24, ++0x0D,0x00,0x42,0x28, ++0x09,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x13,0x2C,0x00,0x08, ++0x0C,0x00,0x02,0x24, ++0xCF,0x02,0xA3,0x80, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x62,0x30, ++0x2A,0x10,0x82,0x00, ++0x24,0x2C,0x00,0x08, ++0x0B,0x20,0x62,0x00, ++0x13,0x2C,0x00,0x08, ++0x02,0x00,0x62,0x24, ++0xC0,0xFF,0xBD,0x27, ++0x28,0x00,0xB4,0xAF, ++0x25,0xB0,0x14,0x3C, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x34,0x00,0xB7,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x24,0x00,0xB3,0xAF, ++0xD8,0x00,0x86,0x36, ++0x00,0x00,0xC3,0x90, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x51,0x24, ++0x2A,0xB0,0x10,0x3C, ++0xA0,0xFF,0x02,0x24, ++0x25,0x18,0x62,0x00, ++0x34,0x00,0x05,0x36, ++0xFE,0xFF,0x02,0x24, ++0xBC,0x02,0x33,0x92, ++0x40,0x00,0x04,0x24, ++0x00,0x00,0xC3,0xA0, ++0x00,0x00,0xA2,0xA0, ++0x25,0x24,0x00,0x0C, ++0x00,0x9E,0x13,0x00, ++0x21,0x90,0x40,0x00, ++0x8A,0x00,0x40,0x12, ++0x00,0x40,0x02,0x3C, ++0x08,0x00,0x43,0x8E, ++0xB0,0x03,0x82,0x36, ++0x25,0xB0,0x1E,0x3C, ++0x21,0x20,0x40,0x02, ++0x00,0x00,0x43,0xAC, ++0x0C,0x4D,0x00,0x0C, ++0x21,0xB8,0x20,0x02, ++0x42,0x00,0xD5,0x37, ++0x03,0x0C,0xD1,0x37, ++0x17,0x0E,0xD6,0x37, ++0x04,0x00,0x14,0x24, ++0x2A,0xB0,0x03,0x3C, ++0x06,0x00,0x63,0x34, ++0x00,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x42,0x30, ++0x0A,0x00,0x40,0x18, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x8C,0xF0,0x84,0x24, ++0x00,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x42,0x30, ++0xFC,0xFF,0x40,0x1C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x45,0x8E, ++0x20,0x10,0x06,0x3C, ++0x01,0x00,0x04,0x24, ++0x00,0xFE,0xC6,0x34, ++0x40,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA4,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x90,0xF0,0x42,0x24, ++0x00,0x00,0x45,0x8C, ++0x01,0x00,0x03,0x24, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0xA3,0xA0, ++0xFF,0xFF,0x03,0x24, ++0x00,0x00,0xA3,0xA2, ++0x00,0x00,0x22,0x92, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x40,0x00,0x42,0x34, ++0x00,0x00,0x22,0xA2, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x02,0x00,0x02,0x24, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0xA2,0xA0, ++0x30,0x1F,0x83,0x24, ++0xC1,0x02,0x62,0x90, ++0x00,0x00,0xC4,0x92, ++0x21,0x28,0x00,0x00, ++0x00,0x00,0xC2,0xA2, ++0xFF,0x00,0x90,0x30, ++0x01,0x00,0xA2,0x24, ++0xFF,0x00,0x45,0x30, ++0x06,0x00,0xA3,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0xA2,0x24, ++0xEF,0xFF,0x02,0x24, ++0x64,0x00,0x04,0x24, ++0x00,0x00,0xA2,0xA2, ++0x54,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x22,0x92, ++0x21,0x20,0x00,0x00, ++0xBF,0x00,0x42,0x30, ++0x00,0x00,0x22,0xA2, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x54,0x22,0x00,0x0C, ++0x84,0x03,0x04,0x24, ++0xF4,0x08,0xC2,0x37, ++0x00,0x00,0x43,0x8C, ++0x00,0x80,0x04,0x3C, ++0xDF,0x07,0x84,0x34, ++0x00,0x00,0xD0,0xA2, ++0x21,0x10,0x00,0x00, ++0x24,0x28,0x64,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x00,0x00,0xA0,0xA2, ++0x00,0x00,0x22,0x92, ++0x21,0x20,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x40,0x00,0x42,0x34, ++0x00,0x00,0x22,0xA2, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0xBE,0x02,0xE2,0x92, ++0x1F,0x00,0xA3,0x30, ++0x2B,0x10,0x62,0x00, ++0x0A,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xBF,0x02,0xE2,0x92, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0x05,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x02,0x3C, ++0x25,0x10,0x62,0x00, ++0x21,0x98,0x62,0x02, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x43,0x90, ++0x22,0x00,0x02,0x24, ++0x19,0x00,0x62,0x10, ++0x92,0x00,0x02,0x24, ++0x18,0x00,0x62,0x10, ++0x02,0x80,0x03,0x3C, ++0xFF,0xFF,0x94,0x26, ++0x54,0x22,0x00,0x0C, ++0xF4,0x01,0x04,0x24, ++0x89,0xFF,0x81,0x06, ++0x2A,0xB0,0x03,0x3C, ++0x04,0x00,0x40,0x12, ++0x21,0x10,0x60,0x02, ++0x3D,0x24,0x00,0x0C, ++0x21,0x20,0x40,0x02, ++0x21,0x10,0x60,0x02, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0xBE,0x02,0x62,0x90, ++0xC0,0x07,0xA3,0x30, ++0x82,0x19,0x03,0x00, ++0x2B,0x10,0x62,0x00, ++0xE3,0xFF,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x84,0x24, ++0xBF,0x02,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x43,0x00, ++0xDD,0xFF,0x40,0x10, ++0x00,0x12,0x03,0x00, ++0x10,0x00,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x13,0x2D,0x00,0x08, ++0x21,0x98,0x62,0x02, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0xF0,0xF8,0x06,0x34, ++0x15,0x00,0x04,0x24, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x5F,0x47,0x00,0x0C, ++0x14,0x00,0xB1,0xAF, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x02,0x80,0x12,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x56,0x30,0x06,0x24, ++0x5F,0x47,0x00,0x0C, ++0x1A,0x00,0x04,0x24, ++0x30,0x1F,0x51,0x26, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x04,0x03,0x23,0x92, ++0x04,0x00,0x02,0x24, ++0x20,0x00,0x62,0x10, ++0x25,0xB0,0x02,0x3C, ++0x14,0x03,0x25,0x8E, ++0x25,0xB0,0x10,0x3C, ++0x43,0x60,0x00,0x0C, ++0x00,0x0E,0x04,0x36, ++0x14,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x04,0x0E,0x04,0x36, ++0x18,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x08,0x0E,0x04,0x36, ++0x14,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x10,0x0E,0x04,0x36, ++0x14,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x14,0x0E,0x04,0x36, ++0x14,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x18,0x0E,0x04,0x36, ++0x14,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x1C,0x0E,0x04,0x36, ++0x30,0x1F,0x43,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x04,0x00,0x02,0x24, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x03,0x62,0xA0, ++0x00,0x0E,0x42,0x34, ++0x00,0x00,0x43,0x8C, ++0x14,0x03,0x25,0x8E, ++0x00,0x00,0x00,0x00, ++0xDE,0xFF,0x65,0x14, ++0x25,0xB0,0x10,0x3C, ++0x6A,0x2D,0x00,0x08, ++0x30,0x1F,0x43,0x26, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0xF0,0xF8,0x06,0x34, ++0x15,0x00,0x04,0x24, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x5F,0x47,0x00,0x0C, ++0x14,0x00,0xB1,0xAF, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x56,0x30,0x06,0x24, ++0x5F,0x47,0x00,0x0C, ++0x1A,0x00,0x04,0x24, ++0x02,0x80,0x10,0x3C, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x30,0x1F,0x02,0x26, ++0x04,0x03,0x46,0x90, ++0x25,0xB0,0x11,0x3C, ++0x10,0x10,0x12,0x3C, ++0x01,0x00,0x03,0x24, ++0x00,0x0E,0x24,0x36, ++0x1E,0x00,0xC3,0x10, ++0x10,0x10,0x45,0x36, ++0x43,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x04,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x45,0x36, ++0x08,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x05,0x24, ++0x10,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x45,0x36, ++0x14,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x45,0x36, ++0x18,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x45,0x36, ++0x1C,0x0E,0x24,0x36, ++0x43,0x60,0x00,0x0C, ++0x10,0x10,0x45,0x36, ++0x30,0x1F,0x03,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x03,0x62,0xA0, ++0x00,0x00,0x86,0x8C, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xC5,0x14, ++0x30,0x1F,0x03,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x03,0x62,0xA0, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB3,0xAF, ++0x02,0x80,0x13,0x3C, ++0x14,0x00,0xB1,0xAF, ++0x30,0x1F,0x71,0x26, ++0x0C,0x03,0x26,0x8E, ++0x10,0x00,0xB0,0xAF, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x15,0x00,0x04,0x24, ++0x20,0x00,0xBF,0xAF, ++0x5F,0x47,0x00,0x0C, ++0x18,0x00,0xB2,0xAF, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x10,0x03,0x26,0x8E, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x1A,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x04,0x03,0x22,0x92, ++0x25,0xB0,0x12,0x3C, ++0x08,0x00,0x40,0x14, ++0x08,0x0E,0x44,0x36, ++0x25,0xB0,0x02,0x3C, ++0x00,0x0E,0x42,0x34, ++0x00,0x00,0x45,0x8C, ++0xEC,0x02,0x23,0x8E, ++0x00,0x00,0x00,0x00, ++0x17,0x00,0xA3,0x10, ++0x30,0x1F,0x62,0x26, ++0xE8,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEC,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x00,0x0E,0x44,0x36, ++0xF0,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x04,0x0E,0x44,0x36, ++0xF4,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x10,0x0E,0x44,0x36, ++0xF8,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x14,0x0E,0x44,0x36, ++0xFC,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x18,0x0E,0x44,0x36, ++0x00,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x1C,0x0E,0x44,0x36, ++0x30,0x1F,0x62,0x26, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x28,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x03,0x40,0xA0, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x02,0x80,0x12,0x3C, ++0x14,0x00,0xB1,0xAF, ++0x30,0x1F,0x51,0x26, ++0x0C,0x03,0x26,0x8E, ++0x10,0x00,0xB0,0xAF, ++0x0F,0x00,0x10,0x3C, ++0xFF,0xFF,0x05,0x36, ++0x1C,0x00,0xBF,0xAF, ++0x5F,0x47,0x00,0x0C, ++0x15,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x10,0x03,0x26,0x8E, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x1A,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x04,0x03,0x23,0x92, ++0x03,0x00,0x02,0x24, ++0x2C,0x00,0x62,0x10, ++0x25,0xB0,0x02,0x3C, ++0xEC,0x02,0x25,0x8E, ++0x25,0xB0,0x10,0x3C, ++0x43,0x60,0x00,0x0C, ++0x00,0x0E,0x04,0x36, ++0xF0,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x04,0x0E,0x04,0x36, ++0xF4,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x10,0x0E,0x04,0x36, ++0xF8,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x14,0x0E,0x04,0x36, ++0xFC,0x02,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x18,0x0E,0x04,0x36, ++0x00,0x03,0x25,0x8E, ++0x43,0x60,0x00,0x0C, ++0x1C,0x0E,0x04,0x36, ++0x08,0x03,0x24,0x8E, ++0xE8,0x02,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x21,0x28,0x44,0x00, ++0x00,0xFF,0xA3,0x30, ++0xFF,0xFF,0x02,0x3C, ++0xFF,0x00,0x42,0x34, ++0x01,0x3F,0x63,0x2C, ++0x24,0x10,0xA2,0x00, ++0x0C,0x00,0x60,0x10, ++0x08,0x0E,0x04,0x36, ++0x43,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x43,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x03,0x00,0x02,0x24, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x03,0x62,0xA0, ++0x32,0x2E,0x00,0x08, ++0x00,0x3F,0x45,0x34, ++0x00,0x0E,0x42,0x34, ++0x00,0x00,0x43,0x8C, ++0xEC,0x02,0x25,0x8E, ++0x00,0x00,0x00,0x00, ++0xD2,0xFF,0x65,0x14, ++0x25,0xB0,0x10,0x3C, ++0x35,0x2E,0x00,0x08, ++0x30,0x1F,0x43,0x26, ++0xD8,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x02,0x80,0x12,0x3C, ++0x20,0x00,0xB4,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x44,0x26, ++0x0C,0x24,0x82,0x8C, ++0x30,0x1F,0x43,0x8E, ++0x04,0x03,0x93,0x90, ++0x02,0x11,0x02,0x00, ++0x7F,0x00,0x54,0x30, ++0xF0,0xF0,0x63,0x30, ++0x00,0x10,0x02,0x24, ++0x6A,0x00,0x62,0x10, ++0x01,0x00,0x02,0x24, ++0x25,0xB0,0x08,0x3C, ++0x4C,0x00,0x03,0x35, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x42,0x30, ++0x08,0x00,0x40,0x10, ++0x30,0x1F,0x45,0x26, ++0x30,0x1F,0x42,0x8E, ++0x00,0x00,0x00,0x00, ++0x02,0x13,0x02,0x00, ++0x0F,0x00,0x42,0x30, ++0x2F,0x00,0x40,0x10, ++0x00,0x0E,0x05,0x35, ++0x30,0x1F,0x45,0x26, ++0x04,0x03,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x0F,0x00,0x40,0x14, ++0x30,0x1F,0x42,0x26, ++0x25,0xB0,0x02,0x3C, ++0x84,0x01,0x42,0x34, ++0x00,0x00,0x44,0x8C, ++0x0D,0x00,0x03,0x24, ++0x7C,0x00,0x83,0x10, ++0x3E,0x00,0x02,0x24, ++0x4A,0x00,0x03,0x24, ++0x1F,0x03,0xA2,0xA0, ++0x1C,0x03,0xA3,0xA0, ++0x45,0x00,0x02,0x24, ++0x43,0x00,0x03,0x24, ++0x1D,0x03,0xA2,0xA0, ++0x1E,0x03,0xA3,0xA0, ++0x30,0x1F,0x42,0x26, ++0x0C,0x24,0x43,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x60,0x0C,0x42,0x34, ++0x02,0x19,0x03,0x00, ++0xFF,0x00,0x63,0x30, ++0x00,0x00,0x43,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x45,0x8E, ++0x10,0x10,0x02,0x24, ++0xF0,0xF0,0xA3,0x30, ++0x3F,0x00,0x62,0x10, ++0x30,0x1F,0x44,0x26, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x00,0x00,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x5F,0x00,0x40,0x10, ++0x10,0x0E,0x07,0x35, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x08,0x0E,0x02,0x35, ++0x04,0x0E,0x03,0x35, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0xA5,0x8C, ++0x00,0x00,0x66,0x8C, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x49,0x24, ++0xE8,0x02,0x24,0xAD, ++0xEC,0x02,0x25,0xAD, ++0xF0,0x02,0x26,0xAD, ++0x14,0x0E,0x04,0x35, ++0x02,0x80,0x02,0x3C, ++0x18,0x0E,0x05,0x35, ++0x00,0x00,0xE7,0x8C, ++0x1C,0x0E,0x06,0x35, ++0x00,0x00,0x83,0x8C, ++0xDE,0x5D,0x4A,0x90, ++0x00,0x00,0xA2,0x8C, ++0x00,0x00,0xC4,0x8C, ++0xF4,0x02,0x27,0xAD, ++0xFC,0x02,0x22,0xAD, ++0x22,0x00,0x02,0x24, ++0xF8,0x02,0x23,0xAD, ++0x5B,0x00,0x42,0x11, ++0x00,0x03,0x24,0xAD, ++0x92,0x00,0x02,0x24, ++0x59,0x00,0x42,0x11, ++0x0D,0x08,0x02,0x35, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x30,0x1F,0x43,0x8E, ++0xFF,0xFF,0x02,0x3C, ++0xFF,0x0F,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x00,0x10,0x63,0x34, ++0x66,0x2E,0x00,0x08, ++0x30,0x1F,0x43,0xAE, ++0x3A,0x00,0x62,0x12, ++0x04,0x00,0x02,0x24, ++0x38,0x00,0x62,0x12, ++0x30,0x1F,0x43,0x26, ++0xFF,0xFF,0x02,0x24, ++0x59,0x2E,0x00,0x08, ++0x04,0x03,0x62,0xA0, ++0x0C,0x24,0x83,0x8C, ++0xFF,0xFF,0x02,0x34, ++0xBF,0xFF,0x62,0x10, ++0x02,0x12,0x05,0x00, ++0x0F,0x00,0x45,0x30, ++0x01,0x00,0x03,0x24, ++0xBB,0xFF,0xA3,0x14, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x63,0x30, ++0xB5,0xFF,0x60,0x10, ++0x03,0x00,0x02,0x24, ++0x65,0x00,0x62,0x12, ++0x04,0x00,0x62,0x2A, ++0x47,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x6A,0x00,0x60,0x12, ++0x00,0x00,0x00,0x00, ++0xAD,0xFF,0x65,0x16, ++0x00,0x00,0x00,0x00, ++0x1C,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x02, ++0x56,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x1F,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x54,0x00, ++0x48,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xBE,0x2D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x8B,0x2E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x3B,0x00,0x02,0x24, ++0x46,0x00,0x03,0x24, ++0x1F,0x03,0xA2,0xA0, ++0x1C,0x03,0xA3,0xA0, ++0x41,0x00,0x02,0x24, ++0x40,0x00,0x03,0x24, ++0x1D,0x03,0xA2,0xA0, ++0x79,0x2E,0x00,0x08, ++0x1E,0x03,0xA3,0xA0, ++0x00,0x00,0xE3,0x8C, ++0x3F,0x3F,0x02,0x3C, ++0x3F,0x3F,0x42,0x34, ++0x9E,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x67,0x2E,0x00,0x08, ++0x30,0x1F,0x45,0x26, ++0x0F,0x00,0x10,0x3C, ++0x01,0x00,0x11,0x3C, ++0xFF,0xFF,0x05,0x36, ++0xF4,0x98,0x26,0x36, ++0x5F,0x47,0x00,0x0C, ++0x15,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x56,0x30,0x26,0x36, ++0x5F,0x47,0x00,0x0C, ++0x1A,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x30,0x1F,0x43,0x26, ++0xFF,0xFF,0x02,0x24, ++0x59,0x2E,0x00,0x08, ++0x04,0x03,0x62,0xA0, ++0x0D,0x08,0x02,0x35, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x63,0x30, ++0x08,0x00,0x62,0x2C, ++0x0F,0x00,0x63,0x38, ++0xA2,0xFF,0x40,0x14, ++0x01,0x00,0x65,0x24, ++0x00,0x16,0x05,0x00, ++0x00,0x24,0x05,0x00, ++0x00,0x1A,0x05,0x00, ++0x25,0x10,0x44,0x00, ++0x25,0x10,0x43,0x00, ++0x25,0x10,0x45,0x00, ++0x25,0x18,0x65,0x00, ++0x18,0x03,0x23,0xAD, ++0xB8,0x2E,0x00,0x08, ++0x14,0x03,0x22,0xAD, ++0x04,0x00,0x02,0x24, ++0x11,0x00,0x62,0x12, ++0xFF,0x00,0x02,0x24, ++0x66,0xFF,0x62,0x16, ++0x00,0x00,0x00,0x00, ++0x1E,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x02, ++0x21,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x1C,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x02, ++0x0A,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x7A,0x2D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x8B,0x2E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x1D,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x54,0x00, ++0xF8,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x3B,0x2D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x8B,0x2E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x20,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x02, ++0xA8,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xFC,0x2D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x8B,0x2E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x1E,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x02, ++0xE6,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x03,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x54,0x00, ++0x9A,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xFC,0x2D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x8B,0x2E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x08,0x3C, ++0x30,0x1F,0x05,0x25, ++0x80,0x36,0xA4,0x8C, ++0xE6,0x02,0xA3,0x90, ++0x02,0x11,0x04,0x00, ++0x26,0x00,0x60,0x14, ++0x7F,0x00,0x46,0x30, ++0x25,0xB0,0x07,0x3C, ++0x4C,0x00,0xE2,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x02,0x34, ++0x1D,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0xE3,0x34, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x30, ++0x19,0x00,0x40,0x10, ++0x4B,0x00,0xC2,0x2C, ++0x3E,0x00,0x40,0x10, ++0x01,0x00,0x04,0x24, ++0xD8,0xFF,0xC2,0x24, ++0x1E,0x00,0x42,0x2C, ++0x49,0x00,0x40,0x10, ++0x23,0x00,0xC2,0x2C, ++0x30,0x1F,0x04,0x25, ++0xD3,0x02,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x44,0x00,0x40,0x10, ++0x23,0x00,0xC2,0x2C, ++0x25,0xB0,0x02,0x3C, ++0x87,0x0C,0x42,0x34, ++0x20,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0xD3,0x02,0x80,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x17,0x00,0x40,0x10, ++0x01,0x00,0x04,0x24, ++0xD8,0xFF,0xC2,0x24, ++0x1E,0x00,0x42,0x2C, ++0x44,0x00,0x40,0x10, ++0x23,0x00,0xC2,0x2C, ++0x30,0x1F,0x04,0x25, ++0xD3,0x02,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x3F,0x00,0x40,0x10, ++0x23,0x00,0xC2,0x2C, ++0x25,0xB0,0x02,0x3C, ++0x30,0x0C,0x42,0x34, ++0x44,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0xD3,0x02,0x80,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xD3,0x02,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xE7,0xFF,0x44,0x10, ++0x43,0x00,0x02,0x24, ++0x30,0x0C,0xE3,0x34, ++0xD3,0x02,0xA4,0xA0, ++0x00,0x00,0x62,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xD3,0x02,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xC0,0xFF,0x44,0x10, ++0x10,0x00,0x02,0x24, ++0x87,0x0C,0xE3,0x34, ++0xD3,0x02,0xA4,0xA0, ++0x00,0x00,0x62,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xC7,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x04,0x25, ++0xD3,0x02,0x82,0x90, ++0x02,0x00,0x03,0x24, ++0xC2,0xFF,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x87,0x0C,0x42,0x34, ++0xD3,0x02,0x83,0xA0, ++0x00,0x00,0x40,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xB4,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x04,0x25, ++0xD3,0x02,0x82,0x90, ++0x02,0x00,0x03,0x24, ++0xAF,0xFF,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0xD3,0x02,0x83,0xA0, ++0x30,0x0C,0x42,0x34, ++0x42,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0x01,0x80,0x02,0x3C, ++0x18,0x03,0x64,0x34, ++0x7C,0xBF,0x42,0x24, ++0x00,0x00,0x82,0xAC, ++0x00,0x60,0x07,0x40, ++0x01,0x00,0xE1,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x20,0x80,0x02,0x3C, ++0x30,0x03,0x63,0x34, ++0x00,0x00,0x62,0xAC, ++0x25,0xB0,0x06,0x3C, ++0x01,0x80,0x02,0x3C, ++0x7D,0xBF,0x45,0x24, ++0x33,0x03,0xC3,0x34, ++0x00,0x00,0x85,0xAC, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x30, ++0xFB,0xFF,0x40,0x10, ++0x30,0x03,0xC2,0x34, ++0x00,0x00,0x45,0x8C, ++0x0F,0x00,0x03,0x3C, ++0xFF,0xFF,0x63,0x34, ++0x24,0x28,0xA3,0x00, ++0x40,0x11,0x05,0x00, ++0x23,0x10,0x45,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x45,0x00, ++0xAF,0x0F,0x04,0x3C, ++0xC0,0x10,0x02,0x00, ++0x00,0xA0,0x84,0x34, ++0x1B,0x00,0x82,0x00, ++0x02,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0xC2,0x28,0x05,0x00, ++0xA0,0x3E,0x65,0xAC, ++0x12,0x20,0x00,0x00, ++0xA4,0x3E,0x64,0xAC, ++0x00,0x60,0x87,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x14,0x5F,0x43,0xA0, ++0xD0,0x07,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xE4,0x5E,0x44,0xAC, ++0x13,0x5F,0x60,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x04,0x3C, ++0x28,0x00,0x85,0x34, ++0x02,0x00,0x82,0x94, ++0x04,0x00,0x84,0x24, ++0x05,0x00,0x40,0x14, ++0x2B,0x18,0xA4,0x00, ++0xFB,0xFF,0x60,0x10, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0xBE,0x00,0x63,0x34, ++0x00,0x00,0x62,0x94, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x42,0x2C, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x17,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x19,0x00,0x40,0x10, ++0x74,0x57,0x64,0x24, ++0x74,0x57,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x15,0x00,0x44,0x14, ++0x02,0x80,0x02,0x3C, ++0x14,0x5F,0x43,0x90, ++0x01,0x00,0x02,0x24, ++0xFF,0x00,0x63,0x30, ++0x10,0x00,0x62,0x10, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x05,0x00,0x42,0x28, ++0x0A,0x00,0x40,0x10, ++0x01,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x9C,0x5A,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x60,0x14, ++0x21,0x10,0x80,0x00, ++0x10,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x10,0x00,0xBF,0x8F, ++0x21,0x20,0x00,0x00, ++0x21,0x10,0x80,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x17,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2C,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x74,0x57,0x43,0x8C, ++0x74,0x57,0x42,0x24, ++0x28,0x00,0x62,0x14, ++0x02,0x80,0x03,0x3C, ++0x0C,0x5F,0x62,0x90, ++0x01,0x00,0x04,0x24, ++0xFF,0x00,0x42,0x30, ++0x23,0x00,0x44,0x10, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x03,0x00,0x42,0x28, ++0x1D,0x00,0x40,0x10, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x42,0x30, ++0x18,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x0E,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x42,0x30, ++0x13,0x00,0x40,0x14, ++0x02,0x80,0x03,0x3C, ++0x14,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x0E,0x00,0x44,0x10, ++0x02,0x80,0x02,0x3C, ++0x15,0x5F,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x60,0x14, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x6C,0x3B,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x60,0x14, ++0x21,0x18,0x00,0x00, ++0x40,0x39,0x42,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x40,0x14, ++0x01,0x00,0x03,0x24, ++0x21,0x18,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x23,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x0E,0x00,0x40,0x10, ++0x6C,0x57,0x65,0x24, ++0x6C,0x57,0x62,0x8C, ++0x02,0x80,0x04,0x3C, ++0x64,0x57,0x86,0x24, ++0x09,0x00,0x45,0x14, ++0x01,0x00,0x03,0x24, ++0x64,0x57,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x46,0x14, ++0x21,0x10,0x60,0x00, ++0x10,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x10,0x00,0xBF,0x8F, ++0x21,0x18,0x00,0x00, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0xFF,0x00,0x84,0x30, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0E,0x00,0x80,0x10, ++0x02,0x80,0x13,0x3C, ++0x44,0x5F,0x62,0x92, ++0x01,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x39,0x00,0x43,0x10, ++0x25,0xB0,0x03,0x3C, ++0x00,0x60,0x92,0x40, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x44,0x5F,0x62,0x92, ++0x02,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0xF4,0xFF,0x43,0x14, ++0x44,0x08,0x04,0x24, ++0x94,0x60,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0x04,0x0C,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFD,0x00,0x42,0x30, ++0x04,0x0C,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x03,0x3C, ++0x04,0x0D,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFD,0x00,0x42,0x30, ++0x04,0x0D,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x11,0x3C, ++0x70,0x0E,0x25,0x8E, ++0x7F,0xFE,0x10,0x3C, ++0xFF,0xFF,0x10,0x36, ++0x24,0x28,0xB0,0x00, ++0x94,0x60,0x00,0x0C, ++0x70,0x0E,0x04,0x24, ++0x8C,0x0E,0x25,0x8E, ++0x8C,0x0E,0x04,0x24, ++0x94,0x60,0x00,0x0C, ++0x24,0x28,0xB0,0x00, ++0x01,0x00,0x02,0x24, ++0x44,0x5F,0x62,0xA2, ++0x00,0x60,0x92,0x40, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x04,0x0C,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x02,0x00,0x42,0x34, ++0x04,0x0C,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x03,0x3C, ++0x04,0x0D,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x02,0x00,0x42,0x34, ++0x04,0x0D,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x10,0x3C, ++0x70,0x0E,0x05,0x8E, ++0x80,0x01,0x11,0x3C, ++0x70,0x0E,0x04,0x24, ++0x94,0x60,0x00,0x0C, ++0x25,0x28,0xB1,0x00, ++0x8C,0x0E,0x05,0x8E, ++0x8C,0x0E,0x04,0x24, ++0x94,0x60,0x00,0x0C, ++0x25,0x28,0xB1,0x00, ++0x03,0x00,0x05,0x3C, ++0x59,0x01,0xA5,0x34, ++0x94,0x60,0x00,0x0C, ++0x44,0x08,0x04,0x24, ++0x02,0x00,0x02,0x24, ++0x44,0x5F,0x62,0xA2, ++0xDD,0x30,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0xFC,0x37,0x02,0x24, ++0x40,0x00,0x64,0x34, ++0x00,0x00,0x82,0xA4, ++0x42,0x00,0x65,0x34, ++0x03,0x00,0x02,0x24, ++0x00,0x00,0xA0,0xA0, ++0x03,0x08,0x62,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x0B,0x00,0x60,0x10, ++0x25,0xB0,0x10,0x3C, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0x32,0x00,0x40,0x14, ++0x00,0x02,0x05,0x3C, ++0x00,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x25,0xB0,0x10,0x3C, ++0x21,0x00,0x06,0x36, ++0x00,0x00,0xC2,0x90, ++0x18,0x00,0x03,0x36, ++0x42,0x00,0x05,0x36, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0xC2,0xA0, ++0x40,0x00,0x11,0x36, ++0x00,0x00,0x60,0xA0, ++0xFF,0xFF,0x02,0x24, ++0xFC,0x57,0x03,0x24, ++0x00,0x00,0xA2,0xA0, ++0x64,0x00,0x04,0x24, ++0x00,0x00,0x23,0xA6, ++0x54,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xFC,0x77,0x02,0x24, ++0x00,0x00,0x22,0xA6, ++0x54,0x22,0x00,0x0C, ++0x0A,0x00,0x04,0x24, ++0x03,0x08,0x00,0xA2, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x0A,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x25,0xB0,0x10,0x3C, ++0x40,0x00,0x10,0x36, ++0xFC,0x37,0x02,0x24, ++0x00,0x00,0x02,0xA6, ++0x54,0x22,0x00,0x0C, ++0x0A,0x00,0x04,0x24, ++0xFC,0x77,0x02,0x24, ++0x00,0x00,0x02,0xA6, ++0x54,0x22,0x00,0x0C, ++0x0A,0x00,0x04,0x24, ++0xFC,0x57,0x02,0x24, ++0x00,0x00,0x02,0xA6, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x9B,0x30,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x2F,0x31,0x00,0x08, ++0x25,0xB0,0x10,0x3C, ++0xC0,0xFF,0xBD,0x27, ++0x28,0x00,0xB4,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x38,0x00,0xBE,0xAF, ++0x34,0x00,0xB7,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0xFF,0x00,0x90,0x30, ++0xFF,0x00,0xB2,0x30, ++0x21,0xA0,0x00,0x00, ++0x00,0x60,0x16,0x40, ++0x01,0x00,0xC1,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x13,0x3C, ++0xF6,0x5E,0x62,0x92, ++0x0F,0x00,0x11,0x32, ++0x0F,0x00,0x42,0x30, ++0x12,0x00,0x51,0x10, ++0x04,0x00,0x02,0x32, ++0x40,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0x0C,0x00,0x03,0x24, ++0x0F,0x00,0x42,0x30, ++0x8F,0x00,0x43,0x10, ++0x08,0x00,0x02,0x32, ++0xF6,0x5E,0x62,0x92, ++0x04,0x00,0x03,0x24, ++0x0F,0x00,0x42,0x30, ++0xD2,0x01,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0x02,0x00,0x03,0x24, ++0x0F,0x00,0x42,0x30, ++0x9B,0x00,0x43,0x10, ++0x06,0x00,0x02,0x32, ++0x02,0x80,0x10,0x3C, ++0xF5,0x5E,0x03,0x92, ++0xF6,0x5E,0x62,0x92, ++0x0F,0x00,0x63,0x30, ++0x0F,0x00,0x42,0x30, ++0x2A,0x10,0x43,0x00, ++0x1C,0x00,0x40,0x14, ++0x02,0x80,0x12,0x3C, ++0xF5,0x5E,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x30, ++0x17,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xDA,0x5D,0x42,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x43,0x30, ++0x52,0x00,0x60,0x14, ++0x04,0x00,0x42,0x30, ++0x10,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x43,0x92, ++0x02,0x80,0x06,0x3C, ++0x5C,0xE9,0xC5,0x90, ++0x0F,0x00,0x63,0x30, ++0x25,0xB0,0x02,0x3C, ++0x25,0x18,0x65,0x00, ++0xDD,0x02,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0xF5,0x5E,0x04,0x92, ++0x80,0xFF,0x02,0x24, ++0xBF,0xFF,0x03,0x24, ++0x26,0x28,0xA2,0x00, ++0x24,0x20,0x83,0x00, ++0x5C,0xE9,0xC5,0xA0, ++0xF5,0x5E,0x04,0xA2, ++0x00,0x60,0x96,0x40, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0xF6,0x5E,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x42,0x30, ++0x4C,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x42,0x30, ++0x03,0x00,0x40,0x10, ++0x08,0x00,0x02,0x32, ++0x1B,0x00,0x40,0x10, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x42,0x30, ++0x0C,0x00,0x40,0x14, ++0x08,0x00,0x02,0x32, ++0x0A,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x40,0x12, ++0x02,0x80,0x03,0x3C, ++0xE0,0x3A,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x03,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xCD,0x4E,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0xF0,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0xF6,0x5E,0x62,0xA2, ++0xF6,0x5E,0x63,0x92, ++0x00,0x00,0x00,0x00, ++0x25,0x18,0x23,0x02, ++0xF6,0x5E,0x63,0xA2, ++0x8E,0x31,0x00,0x08, ++0x02,0x80,0x10,0x3C, ++0xE0,0x3A,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0xF2,0xFF,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x14,0x5F,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0xA2,0xFF,0x60,0x14, ++0x01,0x00,0x04,0x24, ++0xCD,0x4E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xD9,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0x24,0x00,0x0C, ++0x24,0x00,0x04,0x24, ++0x76,0x01,0x40,0x10, ++0x21,0x88,0x40,0x00, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x45,0x90, ++0xF6,0x5E,0x44,0x92, ++0xF5,0x5E,0x02,0x92, ++0xBF,0xFF,0x03,0x24, ++0x0F,0x00,0x84,0x30, ++0x24,0x10,0x43,0x00, ++0xF5,0x5E,0x02,0xA2, ++0x10,0x00,0xA5,0xA3, ++0x11,0x00,0xA4,0xA3, ++0x08,0x00,0x24,0x96, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xA5,0x27, ++0x25,0x20,0x82,0x00, ++0x20,0x00,0x84,0x24, ++0x5F,0x1E,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x04,0x00,0x03,0x24, ++0x17,0x00,0x02,0x24, ++0x0C,0x00,0x23,0xAE, ++0x14,0x00,0x22,0xAE, ++0x30,0x09,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0xB0,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x0C,0x31,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xC2,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x71,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x28,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x77,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0xF0,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0xF6,0x5E,0x62,0xA2, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x92, ++0xE0,0x3A,0x64,0x94, ++0x04,0x00,0x42,0x34, ++0x00,0x01,0x84,0x30, ++0xF6,0x5E,0x62,0xA2, ++0x61,0xFF,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0xCD,0x4E,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x83,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x65,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x82,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x61,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0xF0,0xFF,0x03,0x24, ++0x41,0xB0,0x04,0x3C, ++0x24,0x10,0x43,0x00, ++0xF6,0x5E,0x62,0xA2, ++0xF6,0x5E,0x63,0x92, ++0x08,0x00,0x85,0x34, ++0x82,0x00,0x02,0x24, ++0x01,0x00,0x63,0x34, ++0x02,0x80,0x1E,0x3C, ++0xF6,0x5E,0x63,0xA2, ++0x00,0x00,0x80,0xAC, ++0x00,0x00,0xA2,0xA4, ++0x42,0xB0,0x04,0x3C, ++0x30,0x1F,0xC2,0x27, ++0xB0,0x1B,0x45,0x94, ++0x00,0x00,0x83,0x90, ++0xBE,0xFF,0x02,0x24, ++0x03,0x00,0x86,0x34, ++0x24,0x18,0x62,0x00, ++0x00,0x01,0xA5,0x30, ++0x90,0xFF,0x02,0x24, ++0x00,0x00,0x83,0xA0, ++0x00,0x00,0xC2,0xA0, ++0x38,0x00,0xA0,0x10, ++0x25,0xB0,0x06,0x3C, ++0x25,0xB0,0x04,0x3C, ++0x84,0x00,0x82,0x34, ++0x00,0x00,0x46,0x8C, ++0x80,0x00,0x84,0x34, ++0x00,0x00,0x82,0x8C, ++0x02,0x80,0x0B,0x3C, ++0x1C,0x5F,0x64,0x8D, ++0x00,0x38,0x06,0x00, ++0x21,0x30,0x00,0x00, ++0x25,0xA0,0xC2,0x00, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x0A,0x3C, ++0x25,0xA8,0xE3,0x00, ++0x21,0x28,0x00,0x00, ++0x24,0x5F,0x42,0x8D, ++0x21,0x20,0x94,0x00, ++0x2B,0x18,0x94,0x00, ++0x21,0x28,0xB5,0x00, ++0x21,0x28,0xA3,0x00, ++0x2B,0x10,0xA2,0x00, ++0x24,0x01,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x24,0x5F,0x42,0x8D, ++0x00,0x00,0x00,0x00, ++0x10,0x01,0x45,0x10, ++0x01,0x00,0x05,0x24, ++0x30,0x1F,0xC2,0x27, ++0xA4,0x3E,0x43,0x8C, ++0x42,0xB0,0x07,0x3C, ++0x00,0x00,0xE6,0x90, ++0x18,0x00,0x65,0x00, ++0xFB,0xFF,0x02,0x24, ++0x24,0x30,0xC2,0x00, ++0x00,0x00,0xE6,0xA0, ++0x67,0x46,0x06,0x3C, ++0xCF,0xAC,0xC6,0x34, ++0x01,0x00,0x04,0x24, ++0x21,0x28,0x00,0x00, ++0x12,0x18,0x00,0x00, ++0x82,0x1A,0x03,0x00, ++0x40,0x10,0x03,0x00, ++0x21,0x10,0x43,0x00, ++0xC0,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x10,0x02,0x00, ++0x19,0x00,0x46,0x00, ++0x10,0x30,0x00,0x00, ++0x23,0x10,0x46,0x00, ++0x42,0x10,0x02,0x00, ++0x21,0x30,0xC2,0x00, ++0x02,0x33,0x06,0x00, ++0x01,0x00,0x02,0x24, ++0x8C,0x23,0x00,0x0C, ++0x0A,0x30,0x46,0x00, ++0x25,0xB0,0x06,0x3C, ++0xF2,0x02,0xC3,0x34, ++0x88,0xFF,0x02,0x24, ++0x00,0x00,0x62,0xA0, ++0x11,0x00,0xC7,0x34, ++0x00,0x00,0xE2,0x90, ++0x08,0x00,0xC5,0x34, ++0x30,0x1F,0xC4,0x27, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0xE2,0xA0, ++0x00,0x00,0xA3,0x94, ++0xB0,0x1B,0x82,0x94, ++0xFF,0xFF,0x64,0x30, ++0x10,0x00,0x84,0x34, ++0x00,0x00,0xA4,0xA4, ++0xFB,0xFF,0x84,0x30, ++0x00,0x00,0xA4,0xA4, ++0x00,0x01,0x42,0x30, ++0x02,0x00,0x84,0x34, ++0x00,0x00,0xA4,0xA4, ++0x04,0x00,0x40,0x10, ++0x42,0xB0,0x02,0x3C, ++0x22,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0xFF,0xF7,0x84,0x30, ++0x00,0x00,0xA4,0xA4, ++0x28,0x00,0xC4,0x34, ++0x00,0x00,0x83,0x94, ++0xEF,0xFE,0x02,0x24, ++0xFE,0xFF,0x08,0x24, ++0x24,0x18,0x62,0x00, ++0x00,0x00,0x83,0xA4, ++0x00,0x00,0x82,0x94, ++0x26,0x00,0xC5,0x34, ++0x02,0x80,0x03,0x3C, ++0x24,0x10,0x48,0x00, ++0x00,0x00,0x82,0xA4, ++0xDA,0x5D,0x64,0x90, ++0x00,0x00,0xA2,0x94, ++0x04,0x00,0x84,0x30, ++0x00,0x24,0x42,0x34, ++0x00,0x00,0xA2,0xA4, ++0x09,0x00,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x94, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x48,0x00, ++0x00,0x00,0xA2,0xA4, ++0x00,0x00,0xE3,0x90, ++0xFD,0xFF,0x02,0x24, ++0x24,0x18,0x62,0x00, ++0x00,0x00,0xE3,0xA0, ++0x00,0x68,0x02,0x40, ++0x00,0x08,0x42,0x30, ++0xFD,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x12,0x3C, ++0x11,0x00,0x43,0x36, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x34, ++0x00,0x00,0x62,0xA0, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x26,0x00,0x44,0x36, ++0x00,0x00,0x82,0x94, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0x82,0xA4, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x83,0x94, ++0xFF,0xDB,0x02,0x24, ++0x28,0x00,0x45,0x36, ++0x24,0x18,0x62,0x00, ++0x00,0x00,0x83,0xA4, ++0x00,0x00,0xA2,0x94, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0xA2,0xA4, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x94, ++0x00,0x00,0x00,0x00, ++0x10,0x01,0x42,0x34, ++0x00,0x00,0xA2,0xA4, ++0x08,0x00,0x51,0x36, ++0x00,0x00,0x23,0x96, ++0x30,0x1F,0xD7,0x27, ++0xB0,0x1B,0xE2,0x96, ++0xFF,0xFF,0x70,0x30, ++0x00,0x18,0x10,0x36, ++0x00,0x00,0x30,0xA6, ++0x00,0x01,0x42,0x30, ++0xFD,0xFF,0x10,0x32, ++0x00,0x00,0x30,0xA6, ++0x05,0x00,0x40,0x10, ++0x42,0xB0,0x02,0x3C, ++0x00,0x00,0x43,0x90, ++0xFB,0xFF,0x04,0x24, ++0x24,0x18,0x64,0x00, ++0x00,0x00,0x43,0xA0, ++0x04,0x00,0x10,0x36, ++0x54,0x22,0x00,0x0C, ++0x32,0x00,0x04,0x24, ++0x00,0x00,0x30,0xA6, ++0x22,0x00,0x02,0x24, ++0xF2,0x02,0x43,0x36, ++0xEF,0xFF,0x10,0x32, ++0x00,0x00,0x30,0xA6, ++0xC8,0x00,0x04,0x24, ++0x00,0x00,0x62,0xA0, ++0x54,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0xE2,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x41,0x00,0x40,0x10, ++0x42,0xB0,0x06,0x3C, ++0x84,0x00,0x42,0x36, ++0x00,0x00,0x44,0x8C, ++0x80,0x00,0x46,0x36, ++0x00,0x00,0xC2,0x8C, ++0x00,0x28,0x04,0x00, ++0x21,0x18,0x00,0x00, ++0x21,0x20,0x00,0x00, ++0x25,0x30,0x82,0x00, ++0x25,0x38,0xA3,0x00, ++0xA4,0x3E,0xE3,0x8E, ++0x23,0x28,0xD4,0x00, ++0x80,0x12,0x05,0x00, ++0x1B,0x00,0x43,0x00, ++0x02,0x00,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x02,0x80,0x0B,0x3C, ++0x1C,0x5F,0x63,0x8D, ++0x12,0x10,0x00,0x00, ++0x23,0x10,0x45,0x00, ++0x21,0x10,0x43,0x00, ++0x1C,0x5F,0x62,0xAD, ++0x1C,0x5F,0x63,0x8D, ++0x42,0xB0,0x02,0x3C, ++0x03,0x00,0x42,0x34, ++0xC4,0x09,0x63,0x24, ++0x1C,0x5F,0x63,0xAD, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x63,0x30, ++0x20,0x00,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x1C,0x5F,0x62,0x8D, ++0x02,0x80,0x0A,0x3C, ++0x24,0x5F,0x44,0x8D, ++0x21,0x40,0x46,0x00, ++0x2B,0x28,0x06,0x01, ++0x21,0x48,0x67,0x00, ++0x21,0x48,0x25,0x01, ++0x2B,0x20,0x24,0x01, ++0x59,0x00,0x80,0x14, ++0x00,0x00,0x00,0x00, ++0x24,0x5F,0x42,0x8D, ++0x00,0x00,0x00,0x00, ++0x47,0x00,0x49,0x10, ++0x01,0x00,0x05,0x24, ++0x42,0xB0,0x02,0x3C, ++0x00,0x00,0x43,0x90, ++0xFB,0xFF,0x04,0x24, ++0x01,0x00,0x06,0x24, ++0x24,0x18,0x64,0x00, ++0x00,0x00,0x43,0xA0, ++0x04,0x00,0xA0,0x10, ++0x01,0x00,0x04,0x24, ++0x80,0x10,0x05,0x00, ++0x21,0x10,0x45,0x00, ++0x80,0x30,0x02,0x00, ++0x8C,0x23,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x42,0xB0,0x02,0x3C, ++0x22,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x42,0xB0,0x06,0x3C, ++0x00,0x00,0xC2,0x90, ++0x30,0x1F,0xC5,0x27, ++0xD0,0x1B,0xA8,0x8C, ++0xDC,0x1B,0xA7,0x94, ++0x41,0xB0,0x03,0x3C, ++0x41,0x00,0x42,0x34, ++0x08,0x00,0x64,0x34, ++0x00,0x00,0xC2,0xA0, ++0x00,0x00,0x68,0xAC, ++0x00,0x00,0x87,0xA4, ++0xF6,0x5E,0x63,0x92, ++0xF0,0xFF,0x02,0x24, ++0xDC,0x1B,0xA7,0xA4, ++0x24,0x18,0x62,0x00, ++0xF6,0x5E,0x63,0xA2, ++0xF6,0x5E,0x62,0x92, ++0xD0,0x1B,0xA8,0xAC, ++0x02,0x00,0x42,0x34, ++0xF6,0x5E,0x62,0xA2, ++0x8E,0x31,0x00,0x08, ++0x02,0x80,0x10,0x3C, ++0x4C,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x31,0xFE,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x1C,0x31,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF6,0x5E,0x62,0x92, ++0xF0,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0xF6,0x5E,0x62,0xA2, ++0xF6,0x5E,0x63,0x92, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x63,0x34, ++0xF6,0x5E,0x63,0xA2, ++0x88,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x99,0x99,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x97,0x99,0x63,0x34, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xB0,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x20,0x5F,0x42,0x8D, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x82,0x00, ++0x0C,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x20,0x5F,0x42,0x8D, ++0x61,0x32,0x00,0x08, ++0x01,0x00,0x05,0x24, ++0x20,0x5F,0x42,0x8D, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x02,0x01, ++0x0A,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x20,0x5F,0x42,0x8D, ++0x32,0x33,0x00,0x08, ++0x01,0x00,0x05,0x24, ++0x20,0x5F,0x42,0x8D, ++0x24,0x5F,0x43,0x8D, ++0x1C,0x5F,0x64,0x8D, ++0x23,0x10,0x54,0x00, ++0x61,0x32,0x00,0x08, ++0x23,0x28,0x44,0x00, ++0x20,0x5F,0x42,0x8D, ++0x24,0x5F,0x43,0x8D, ++0x1C,0x5F,0x64,0x8D, ++0x23,0x10,0x46,0x00, ++0x32,0x33,0x00,0x08, ++0x23,0x28,0x44,0x00, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0xF6,0x5E,0x43,0x90, ++0x04,0x00,0x04,0x24, ++0x0F,0x00,0x63,0x30, ++0x04,0x00,0x63,0x28, ++0x03,0x00,0x60,0x14, ++0x01,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x64,0x31,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x03,0x3C, ++0xE8,0xFF,0xBD,0x27, ++0x6C,0xCE,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x14,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x04,0x3C, ++0x13,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x0B,0x00,0x40,0x10, ++0x01,0x00,0x05,0x24, ++0xD0,0x07,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0xE4,0x5E,0x43,0xAC, ++0x13,0x5F,0x80,0xA0, ++0x00,0x60,0x90,0x40, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x01,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x16,0x5F,0x44,0xA0, ++0x14,0x5F,0x60,0xA0, ++0x02,0x80,0x02,0x3C, ++0xF5,0x5E,0x44,0x90, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0x00,0x60,0x90,0x40, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x42,0x11,0x05,0x00, ++0x0F,0x00,0x46,0x30, ++0xE8,0xFF,0xBD,0x27, ++0x09,0x00,0xC3,0x28, ++0x14,0x00,0xBF,0xAF, ++0x15,0x00,0x60,0x10, ++0x10,0x00,0xB0,0xAF, ++0x82,0x16,0x05,0x00, ++0x01,0x00,0x42,0x30, ++0x15,0x00,0x40,0x10, ++0x00,0xC0,0x02,0x3C, ++0x24,0x10,0xA2,0x00, ++0x48,0x00,0x40,0x14, ++0xC2,0x15,0x04,0x00, ++0x01,0x00,0x42,0x30, ++0x55,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x50,0xE9,0x63,0x24, ++0x21,0x18,0xC3,0x00, ++0x02,0x80,0x04,0x3C, ++0x0F,0x5F,0x85,0x90, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x45,0x00, ++0x4B,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x24,0x10,0xA2,0x00, ++0x20,0x00,0x40,0x14, ++0xC2,0x15,0x04,0x00, ++0x01,0x00,0x42,0x30, ++0x0B,0x00,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x03,0x3C, ++0x50,0xE9,0x63,0x24, ++0x21,0x18,0xC3,0x00, ++0x02,0x80,0x04,0x3C, ++0x0F,0x5F,0x85,0x90, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x45,0x00, ++0x3C,0x00,0x40,0x14, ++0x02,0x80,0x04,0x3C, ++0x0E,0x5F,0x82,0x90, ++0xFE,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x82,0xA0, ++0x0E,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x42,0x30, ++0xE4,0xFF,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0x0C,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x0E,0x5F,0x82,0x90, ++0xFD,0xFF,0x03,0x24, ++0x14,0x00,0xBF,0x8F, ++0x24,0x10,0x43,0x00, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x82,0xA0, ++0x12,0x5F,0x60,0xA0, ++0x42,0xB0,0x04,0x3C, ++0x00,0x00,0x82,0x90, ++0x10,0x00,0xB0,0x8F, ++0xEF,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x03,0x00,0x85,0x34, ++0x40,0x00,0x03,0x24, ++0x18,0x00,0xBD,0x27, ++0x00,0x00,0x82,0xA0, ++0x00,0x00,0xA3,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x42,0xB0,0x07,0x3C, ++0x00,0x00,0xE3,0x90, ++0xEF,0xFF,0x02,0x24, ++0x03,0x00,0xF0,0x34, ++0x24,0x18,0x62,0x00, ++0x40,0x00,0x02,0x24, ++0x00,0x00,0xE3,0xA0, ++0x02,0x00,0x04,0x24, ++0x00,0x00,0x02,0xA2, ++0x21,0x28,0x00,0x00, ++0x8C,0x23,0x00,0x0C, ++0x00,0xF0,0x06,0x34, ++0x44,0x00,0x02,0x24, ++0x00,0x00,0x02,0xA2, ++0xE0,0x33,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x04,0x24, ++0xFE,0x4E,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x0E,0x5F,0x82,0x90, ++0xF6,0x33,0x00,0x08, ++0xFB,0xFF,0x03,0x24, ++0x82,0x16,0x05,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x01,0x00,0x42,0x30, ++0x14,0x00,0xBF,0xAF, ++0x0E,0x00,0x40,0x10, ++0x10,0x00,0xB0,0xAF, ++0x00,0xC0,0x02,0x3C, ++0x24,0x10,0xA2,0x00, ++0x37,0x00,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0x0D,0x5F,0x43,0x90, ++0x02,0x00,0x02,0x24, ++0xFF,0x00,0x63,0x30, ++0x44,0x00,0x62,0x10, ++0x01,0x00,0x04,0x24, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xFE,0x4E,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x00,0xC0,0x02,0x3C, ++0x24,0x10,0xA2,0x00, ++0x0E,0x00,0x40,0x14, ++0x02,0x80,0x06,0x3C, ++0x0E,0x5F,0xC2,0x90, ++0xFE,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0xC2,0xA0, ++0x0E,0x5F,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x42,0x30, ++0x18,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x0E,0x5F,0xC2,0x90, ++0xFD,0xFF,0x03,0x24, ++0x42,0xB0,0x04,0x3C, ++0x24,0x10,0x43,0x00, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0xC2,0xA0, ++0x12,0x5F,0x60,0xA0, ++0x00,0x00,0x82,0x90, ++0xEF,0xFF,0x03,0x24, ++0x03,0x00,0x85,0x34, ++0x24,0x10,0x43,0x00, ++0x40,0x00,0x03,0x24, ++0x00,0x00,0x82,0xA0, ++0x00,0x00,0xA3,0xA0, ++0x0E,0x5F,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x42,0x30, ++0xEA,0xFF,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0x0C,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x42,0xB0,0x07,0x3C, ++0x00,0x00,0xE3,0x90, ++0xEF,0xFF,0x02,0x24, ++0x03,0x00,0xF0,0x34, ++0x24,0x18,0x62,0x00, ++0x40,0x00,0x02,0x24, ++0x00,0x00,0xE3,0xA0, ++0x02,0x00,0x04,0x24, ++0x00,0x00,0x02,0xA2, ++0x21,0x28,0x00,0x00, ++0x8C,0x23,0x00,0x0C, ++0x00,0xF0,0x06,0x34, ++0x44,0x00,0x02,0x24, ++0x00,0x00,0x02,0xA2, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x0D,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x0C,0x00,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0x64,0x31,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x03,0x3C, ++0xE8,0xFF,0xBD,0x27, ++0x30,0xD2,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x02,0x80,0x10,0x3C, ++0xF5,0x5E,0x02,0x92, ++0x14,0x00,0xBF,0xAF, ++0x0F,0x00,0x42,0x30, ++0x03,0x00,0x42,0x28, ++0x05,0x00,0x40,0x10, ++0x01,0x00,0x05,0x24, ++0x4C,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x40,0x10, ++0x01,0x00,0x05,0x24, ++0xF5,0x5E,0x04,0x92, ++0x64,0x31,0x00,0x0C, ++0xFF,0x00,0x84,0x30, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x84,0x24, ++0xE0,0x1B,0x83,0x94, ++0xDC,0x1B,0x85,0x94, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x02,0x00,0x63,0x30, ++0x41,0xB0,0x02,0x3C, ++0x25,0x18,0x65,0x00, ++0x08,0x00,0x42,0x34, ++0x18,0x00,0xBD,0x27, ++0x00,0x00,0x43,0xA4, ++0x08,0x00,0xE0,0x03, ++0xDC,0x1B,0x83,0xA4, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x02,0x80,0x10,0x3C, ++0x08,0x14,0x04,0x26, ++0x21,0x28,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0xB4,0x34,0x00,0x08, ++0x08,0x14,0x04,0x26, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0xCF,0x61,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xFF,0xFF,0x8D,0x30, ++0x00,0x60,0x0F,0x40, ++0x01,0x00,0xE1,0x35, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x06,0x3C, ++0x30,0x1F,0xCE,0x24, ++0x2A,0x1C,0xC2,0x91, ++0x00,0x00,0x00,0x00, ++0x1D,0x00,0x40,0x10, ++0x25,0xB0,0x03,0x3C, ++0x38,0x02,0x64,0x34, ++0x80,0xFF,0x02,0x24, ++0x00,0x00,0x82,0xA0, ++0x34,0x02,0x6A,0x34, ++0xD2,0x01,0x65,0x34, ++0xD6,0x01,0x66,0x34, ++0xDA,0x01,0x67,0x34, ++0xDE,0x01,0x63,0x34, ++0x00,0x00,0xA8,0x94, ++0x00,0x00,0xC9,0x94, ++0x00,0x00,0xEB,0x94, ++0x00,0x00,0x6C,0x94, ++0x00,0x00,0x44,0x95, ++0xB0,0xFE,0xA2,0x25, ++0xFF,0xFF,0x4D,0x30, ++0x28,0x1C,0xC4,0xA5, ++0x00,0x00,0xA0,0xA4, ++0x20,0x1C,0xC8,0xA5, ++0x00,0x00,0xC0,0xA4, ++0x22,0x1C,0xC9,0xA5, ++0x00,0x00,0xE0,0xA4, ++0x24,0x1C,0xCB,0xA5, ++0x00,0x00,0x60,0xA4, ++0x00,0x00,0x4D,0xA5, ++0x26,0x1C,0xCC,0xA5, ++0x00,0x60,0x8F,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x02,0x3C, ++0x0A,0x00,0x45,0x34, ++0x63,0x00,0x03,0x24, ++0xFF,0xFF,0x04,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x40,0x10, ++0x30,0x1F,0xC2,0x24, ++0x64,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x42,0x30, ++0xFE,0xFF,0x40,0x14, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x62,0x24, ++0xFF,0xFF,0x43,0x30, ++0xF4,0xFF,0x64,0x14, ++0x30,0x1F,0xC2,0x24, ++0x28,0x1C,0x48,0x94, ++0x26,0x1C,0x47,0x94, ++0x20,0x1C,0x49,0x94, ++0x22,0x1C,0x4A,0x94, ++0x24,0x1C,0x4B,0x94, ++0x25,0xB0,0x03,0x3C, ++0x38,0x02,0x6C,0x34, ++0x34,0x02,0x62,0x34, ++0xD2,0x01,0x64,0x34, ++0xD6,0x01,0x65,0x34, ++0xDA,0x01,0x66,0x34, ++0xDE,0x01,0x63,0x34, ++0x00,0x00,0x48,0xA4, ++0x00,0x00,0x89,0xA4, ++0x00,0x00,0xAA,0xA4, ++0x00,0x00,0xCB,0xA4, ++0x00,0x00,0x67,0xA4, ++0x00,0x00,0x80,0xA1, ++0x00,0x60,0x8F,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xD0,0xFF,0xBD,0x27, ++0x28,0x00,0xB4,0xAF, ++0x2C,0x00,0xBF,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0xFF,0xFF,0x14,0x24, ++0x02,0x80,0x13,0x3C, ++0x41,0xB0,0x02,0x3C, ++0x30,0x1F,0x63,0x26, ++0x04,0x00,0x42,0x34, ++0x00,0x00,0x45,0x8C, ++0xD4,0x1B,0x64,0x8C, ++0xD0,0x1B,0x66,0x8C, ++0x02,0x80,0x02,0x3C, ++0x08,0x5E,0x47,0x90, ++0x25,0xB0,0x08,0x3C, ++0xB0,0x03,0x02,0x35, ++0x25,0x90,0x85,0x00, ++0x00,0x00,0x52,0xAC, ++0x00,0x00,0x46,0xAC, ++0x01,0x00,0x02,0x24, ++0x8D,0x03,0xE2,0x10, ++0xD4,0x1B,0x72,0xAC, ++0x30,0x1F,0x64,0x26, ++0xD0,0x1B,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x52,0x00, ++0x01,0x00,0x42,0x30, ++0x0E,0x00,0x40,0x10, ++0x30,0x1F,0x67,0x26, ++0x25,0xB0,0x10,0x3C, ++0xB0,0x03,0x02,0x36, ++0x01,0x00,0x05,0x24, ++0x00,0x00,0x45,0xAC, ++0x04,0x00,0x0B,0x36, ++0xD4,0x1B,0x83,0x8C, ++0x00,0x00,0x69,0x8D, ++0x40,0x00,0x02,0x3C, ++0x01,0x00,0x63,0x38, ++0x24,0x10,0x22,0x01, ++0x2A,0x01,0x40,0x10, ++0xD4,0x1B,0x83,0xAC, ++0x30,0x1F,0x67,0x26, ++0xD0,0x1B,0xE8,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x12,0x01, ++0x04,0x00,0x42,0x30, ++0x18,0x00,0x40,0x10, ++0x30,0x1F,0x71,0x26, ++0x25,0xB0,0x03,0x3C, ++0xB0,0x03,0x64,0x34, ++0x04,0x00,0x02,0x24, ++0x00,0x00,0x82,0xAC, ++0xD4,0x1B,0xE2,0x8C, ++0xFC,0x00,0x63,0x34, ++0xAC,0x1B,0xE5,0x94, ++0xD0,0x37,0xE4,0x8C, ++0x00,0x00,0x66,0x8C, ++0x04,0x00,0x42,0x38, ++0x21,0x48,0x85,0x00, ++0x0A,0x00,0xC9,0x10, ++0xD4,0x1B,0xE2,0xAC, ++0x02,0x80,0x05,0x3C, ++0xBC,0x5E,0xA2,0x8C, ++0xFB,0xFF,0x04,0x24, ++0x24,0x20,0x04,0x01, ++0x00,0x10,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0xBC,0x5E,0xA2,0xAC, ++0x00,0x00,0x64,0xAC, ++0xD0,0x1B,0xE4,0xAC, ++0x30,0x1F,0x71,0x26, ++0xD0,0x1B,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x52,0x00, ++0x08,0x00,0x42,0x30, ++0x0A,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0x22,0x96, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x42,0x30, ++0x5D,0x03,0x40,0x14, ++0x00,0x80,0x02,0x3C, ++0xD4,0x1B,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x42,0x38, ++0xD4,0x1B,0x22,0xAE, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x00,0x00,0x00,0x00, ++0x24,0x20,0x52,0x00, ++0x00,0x08,0x83,0x30, ++0x06,0x00,0x60,0x10, ++0x00,0x10,0x82,0x30, ++0xD4,0x1B,0x02,0x8E, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x42,0x38, ++0xD4,0x1B,0x02,0xAE, ++0x00,0x10,0x82,0x30, ++0x05,0x03,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x72,0x00, ++0x00,0x20,0x42,0x30, ++0xF7,0x02,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x72,0x00, ++0x00,0x80,0x42,0x30, ++0xB9,0x01,0x40,0x14, ++0x01,0x00,0x03,0x3C, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0xF1,0x01,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xD0,0x1B,0x02,0x8E, ++0x02,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0x28,0x02,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x04,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0x62,0x02,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x08,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0x9B,0x02,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x10,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0x5A,0x01,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x20,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0x18,0x01,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x40,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0xD6,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x65,0x26, ++0xD0,0x1B,0xA2,0x8C, ++0x00,0x04,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0x3D,0x00,0x40,0x10, ++0x30,0x1F,0x66,0x26, ++0x2A,0xB0,0x02,0x3C, ++0x2C,0x00,0x43,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x02,0x24, ++0xFF,0x00,0x24,0x31, ++0x29,0x03,0x82,0x10, ++0x00,0x80,0x22,0x31, ++0xF9,0x02,0x40,0x14, ++0x00,0x80,0x02,0x3C, ++0x00,0xFF,0x02,0x3C, ++0x24,0x10,0x22,0x01, ++0x0B,0x00,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0xB8,0x36,0xA2,0x90, ++0x20,0xB0,0x03,0x3C, ++0x00,0x12,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x0C,0x00,0x49,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xB0,0x03,0x63,0x34, ++0x00,0x00,0x69,0xAC, ++0xFF,0x00,0x24,0x31, ++0xFF,0x00,0x02,0x24, ++0x1B,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x88,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x1C,0x37,0x03,0xAE, ++0x0A,0x00,0x04,0x24, ++0xB8,0x36,0x09,0xA2, ++0x00,0x01,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xD0,0x1B,0x05,0x8E, ++0x02,0x80,0x06,0x3C, ++0xBC,0x5E,0xC4,0x8C, ++0x00,0x04,0x02,0x3C, ++0x27,0x10,0x02,0x00, ++0x24,0x28,0xA2,0x00, ++0x25,0xB0,0x02,0x3C, ++0x00,0x40,0x84,0x34, ++0xB0,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x65,0xAC, ++0xBC,0x5E,0xC4,0xAC, ++0xD0,0x1B,0x05,0xAE, ++0x30,0x1F,0x65,0x26, ++0xD4,0x1B,0xA4,0x8C, ++0x00,0x04,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x26,0x20,0x83,0x00, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x44,0xAC, ++0xD4,0x1B,0xA4,0xAC, ++0x30,0x1F,0x66,0x26, ++0xD0,0x1B,0xC7,0x8C, ++0x00,0x08,0x04,0x3C, ++0x24,0x28,0xF2,0x00, ++0x24,0x10,0xA4,0x00, ++0x08,0x00,0x40,0x10, ++0x80,0x00,0x08,0x3C, ++0xD4,0x1B,0xC3,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0x26,0x18,0x64,0x00, ++0x00,0x00,0x44,0xAC, ++0xD4,0x1B,0xC3,0xAC, ++0x80,0x00,0x08,0x3C, ++0x24,0x10,0xA8,0x00, ++0x21,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xD4,0x1B,0xC3,0x8C, ++0x25,0xB0,0x09,0x3C, ++0xB0,0x03,0x2A,0x35, ++0x2A,0xB0,0x02,0x3C, ++0x00,0x00,0x43,0xAD, ++0x36,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x23,0xB0,0x04,0x3C, ++0xFF,0x1F,0x02,0x3C, ++0xC0,0x18,0x03,0x00, ++0xF0,0x07,0x63,0x30, ++0x00,0x38,0xC5,0x8C, ++0x21,0x18,0x64,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xCE,0x02,0x65,0x10, ++0x04,0x38,0xC3,0xAC, ++0x02,0x80,0x05,0x3C, ++0xBC,0x5E,0xA3,0x8C, ++0x27,0x20,0x08,0x00, ++0x24,0x20,0xE4,0x00, ++0x00,0x08,0x63,0x34, ++0x41,0xB0,0x02,0x3C, ++0x00,0x00,0x43,0xAD, ++0x00,0x00,0x44,0xAC, ++0xBC,0x5E,0xA3,0xAC, ++0xD0,0x1B,0xC4,0xAC, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x80,0x00,0x04,0x3C, ++0x26,0x18,0x64,0x00, ++0xD4,0x1B,0x43,0xAC, ++0x30,0x1F,0x66,0x26, ++0xD0,0x1B,0xC3,0x8C, ++0x00,0x01,0x05,0x3C, ++0x24,0x20,0x72,0x00, ++0x24,0x10,0x85,0x00, ++0x06,0x00,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0xD4,0x1B,0xC3,0x8C, ++0xB0,0x03,0x42,0x34, ++0x26,0x18,0x65,0x00, ++0x00,0x00,0x45,0xAC, ++0xD4,0x1B,0xC3,0xAC, ++0x00,0x02,0x05,0x3C, ++0x24,0x10,0x85,0x00, ++0x06,0x00,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0xD4,0x1B,0xC3,0x8C, ++0xB0,0x03,0x42,0x34, ++0x26,0x18,0x65,0x00, ++0x00,0x00,0x45,0xAC, ++0xD4,0x1B,0xC3,0xAC, ++0x00,0x10,0x05,0x3C, ++0x24,0x10,0x85,0x00, ++0x0C,0x00,0x40,0x10, ++0x30,0x1F,0x63,0x26, ++0xB0,0x1B,0xC3,0x94, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x62,0x30, ++0x02,0x00,0x40,0x10, ++0x00,0x08,0x62,0x34, ++0xB0,0x1B,0xC2,0xA4, ++0xD4,0x1B,0xC2,0x8C, ++0x00,0x00,0x00,0x00, ++0x26,0x10,0x45,0x00, ++0xD4,0x1B,0xC2,0xAC, ++0x30,0x1F,0x63,0x26, ++0xD0,0x1B,0x62,0x8C, ++0x00,0x20,0x05,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x45,0x00, ++0x0B,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0x64,0x94, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x82,0x30, ++0x02,0x00,0x40,0x10, ++0xFF,0xF7,0x82,0x30, ++0xB0,0x1B,0x62,0xA4, ++0xD4,0x1B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x26,0x10,0x45,0x00, ++0xD4,0x1B,0x62,0xAC, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x20,0xBD,0x02,0x3C, ++0xEC,0x02,0x03,0x36, ++0x4D,0x00,0x07,0x36, ++0xF1,0x02,0x08,0x36, ++0x08,0x00,0x06,0x24, ++0x78,0x02,0x42,0x34, ++0x00,0x00,0x45,0xA4, ++0x00,0x00,0xE0,0xA0, ++0x00,0x00,0x06,0xA1, ++0x00,0x00,0x60,0xAC, ++0x00,0x00,0x62,0x8C, ++0xFF,0x00,0x04,0x3C, ++0x00,0x00,0xE0,0xA0, ++0xFF,0x00,0x49,0x30, ++0x25,0x48,0x24,0x01, ++0x00,0x00,0x06,0xA1, ++0xF2,0x02,0x05,0x36, ++0x00,0x00,0x64,0xAC, ++0x0A,0x00,0x0A,0x36, ++0x00,0x00,0x69,0xAC, ++0x80,0xFF,0x03,0x24, ++0x00,0x00,0xA0,0xA0, ++0x00,0x00,0x43,0xA1, ++0x00,0x00,0x62,0x8D, ++0x80,0x00,0x03,0x3C, ++0x24,0x10,0x43,0x00, ++0x02,0x00,0x40,0x10, ++0x84,0xFF,0x02,0x24, ++0x00,0x00,0x42,0xA1, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x02,0x00,0x02,0x36, ++0x00,0x00,0x43,0x94, ++0xFF,0xBF,0x04,0x24, ++0x24,0x18,0x64,0x00, ++0x00,0x00,0x43,0xA4, ++0x3C,0x35,0x00,0x08, ++0x30,0x1F,0x67,0x26, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x2A,0xB0,0x06,0x3C, ++0xB0,0x03,0x42,0x34, ++0x00,0x00,0x54,0xAC, ++0x28,0x00,0xC3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x05,0x24, ++0xFF,0x00,0x24,0x31, ++0x6D,0x03,0x85,0x10, ++0x25,0xBD,0x02,0x3C, ++0x00,0x80,0x22,0x31, ++0x59,0x02,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x21,0x00,0x82,0x10, ++0xFF,0x00,0x23,0x31, ++0x30,0x1F,0x70,0x26, ++0x58,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0xA4,0x36,0x09,0xA2, ++0xEC,0x36,0x03,0xAE, ++0x06,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x09,0x3C, ++0xCC,0x5E,0x27,0x91, ++0x02,0x80,0x08,0x3C, ++0xBC,0x5E,0x05,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x60,0x00,0x02,0x3C, ++0x02,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x04,0xA5,0x34, ++0x00,0x26,0x07,0x00, ++0x25,0xB0,0x02,0x3C, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x66,0xAC, ++0xBC,0x5E,0x05,0xAD, ++0xCC,0x5E,0x27,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x40,0x00,0x04,0x3C, ++0x26,0x18,0x64,0x00, ++0xB5,0x35,0x00,0x08, ++0xD4,0x1B,0x43,0xAC, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x05,0x3C, ++0x24,0x00,0xA3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0x48,0x03,0x86,0x10, ++0x25,0xB0,0x02,0x3C, ++0x00,0x80,0x22,0x31, ++0x64,0x02,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x25,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x58,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0xA0,0x36,0x09,0xA2, ++0xEC,0x36,0x03,0xAE, ++0x06,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x0A,0x3C, ++0xCC,0x5E,0x47,0x91, ++0x02,0x80,0x09,0x3C, ++0xBC,0x5E,0x25,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x60,0x00,0x02,0x3C, ++0x04,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x04,0xA5,0x34, ++0x25,0xB0,0x03,0x3C, ++0x40,0x00,0x02,0x3C, ++0x00,0x26,0x07,0x00, ++0x26,0xA0,0x82,0x02, ++0xB0,0x03,0x68,0x34, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x63,0x34, ++0x41,0xB0,0x02,0x3C, ++0x00,0x00,0x64,0xAC, ++0x00,0x00,0x46,0xAC, ++0xBC,0x5E,0x25,0xAD, ++0xCC,0x5E,0x47,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x00,0x00,0x14,0xAD, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x20,0x00,0x04,0x3C, ++0x26,0x18,0x64,0x00, ++0xAD,0x35,0x00,0x08, ++0xD4,0x1B,0x43,0xAC, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x05,0x3C, ++0xB0,0x03,0xA2,0x34, ++0x2A,0xB0,0x07,0x3C, ++0x00,0x00,0x54,0xAC, ++0x20,0x00,0xE3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0x07,0x03,0x86,0x10, ++0x90,0x03,0xA2,0x34, ++0x00,0x80,0x22,0x31, ++0x05,0x02,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x21,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x4C,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0xA8,0x36,0x09,0xA2, ++0xE0,0x36,0x03,0xAE, ++0x05,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x09,0x3C, ++0xCC,0x5E,0x27,0x91, ++0x02,0x80,0x08,0x3C, ++0xBC,0x5E,0x05,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x18,0x00,0x02,0x3C, ++0x01,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x02,0xA5,0x34, ++0x00,0x26,0x07,0x00, ++0x25,0xB0,0x02,0x3C, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x66,0xAC, ++0xBC,0x5E,0x05,0xAD, ++0xCC,0x5E,0x27,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x10,0x00,0x04,0x3C, ++0x26,0x18,0x64,0x00, ++0xA6,0x35,0x00,0x08, ++0xD4,0x1B,0x43,0xAC, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x05,0x3C, ++0x0C,0x00,0xA3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0xC6,0x02,0x86,0x10, ++0x00,0x80,0x22,0x31, ++0x54,0x02,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x24,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x34,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x8C,0x36,0x09,0xA2, ++0xC8,0x36,0x03,0xAE, ++0x03,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x0A,0x3C, ++0xCC,0x5E,0x47,0x91, ++0x02,0x80,0x09,0x3C, ++0xBC,0x5E,0x25,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x01,0x00,0x08,0x3C, ++0x80,0xFF,0x02,0x24, ++0x25,0x38,0xE2,0x00, ++0x00,0x80,0x03,0x35, ++0x80,0x00,0xA5,0x34, ++0x27,0x18,0x03,0x00, ++0x00,0x26,0x07,0x00, ++0x25,0xB0,0x02,0x3C, ++0x24,0x30,0xC3,0x00, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x27,0xA0,0x08,0x00, ++0x00,0x00,0x66,0xAC, ++0xBC,0x5E,0x25,0xAD, ++0xCC,0x5E,0x47,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x30,0x1F,0x63,0x26, ++0xD4,0x1B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x42,0x38, ++0xD4,0x1B,0x62,0xAC, ++0x30,0x1F,0x70,0x26, ++0xD0,0x1B,0x02,0x8E, ++0x01,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0x11,0xFE,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x05,0x3C, ++0x10,0x00,0xA3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0x7C,0x02,0x86,0x10, ++0x25,0xB0,0x02,0x3C, ++0x00,0x80,0x22,0x31, ++0xD0,0x01,0x40,0x10, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x22,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x34,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x90,0x36,0x09,0xA2, ++0xC8,0x36,0x03,0xAE, ++0x03,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x09,0x3C, ++0xCC,0x5E,0x27,0x91, ++0x02,0x80,0x08,0x3C, ++0xBC,0x5E,0x05,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x01,0x00,0x02,0x3C, ++0x00,0x80,0x42,0x34, ++0x40,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x80,0x00,0xA5,0x34, ++0x00,0x26,0x07,0x00, ++0x25,0xB0,0x02,0x3C, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x66,0xAC, ++0xBC,0x5E,0x05,0xAD, ++0xCC,0x5E,0x27,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x01,0x00,0x04,0x3C, ++0x30,0x1F,0x70,0x26, ++0x26,0x18,0x64,0x00, ++0xD4,0x1B,0x43,0xAC, ++0xD0,0x1B,0x02,0x8E, ++0x02,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0xDB,0xFD,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x05,0x3C, ++0x14,0x00,0xA3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0x64,0x02,0x86,0x10, ++0x25,0xB0,0x02,0x3C, ++0x00,0x80,0x22,0x31, ++0xFA,0x01,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x25,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x40,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x94,0x36,0x09,0xA2, ++0xD4,0x36,0x03,0xAE, ++0x04,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x0A,0x3C, ++0xCC,0x5E,0x47,0x91, ++0x02,0x80,0x09,0x3C, ++0xBC,0x5E,0x25,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x06,0x00,0x02,0x3C, ++0x20,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x01,0xA5,0x34, ++0x25,0xB0,0x03,0x3C, ++0x04,0x00,0x02,0x3C, ++0x00,0x26,0x07,0x00, ++0x26,0xA0,0x82,0x02, ++0xB0,0x03,0x68,0x34, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x63,0x34, ++0x41,0xB0,0x02,0x3C, ++0x00,0x00,0x64,0xAC, ++0x00,0x00,0x46,0xAC, ++0xBC,0x5E,0x25,0xAD, ++0xCC,0x5E,0x47,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x00,0x00,0x14,0xAD, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x02,0x00,0x04,0x3C, ++0x30,0x1F,0x70,0x26, ++0x26,0x18,0x64,0x00, ++0xD4,0x1B,0x43,0xAC, ++0xD0,0x1B,0x02,0x8E, ++0x04,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x54,0x00, ++0x24,0x10,0x43,0x00, ++0xA1,0xFD,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0xB0,0x03,0x62,0x34, ++0x2A,0xB0,0x07,0x3C, ++0x00,0x00,0x54,0xAC, ++0x18,0x00,0xE5,0x34, ++0x00,0x00,0xA9,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0x16,0x02,0x86,0x10, ++0x04,0x00,0x02,0x24, ++0x00,0x80,0x22,0x31, ++0xD6,0x01,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0xA2,0xAC, ++0xFF,0x00,0x02,0x24, ++0x21,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x40,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x98,0x36,0x09,0xA2, ++0xD4,0x36,0x03,0xAE, ++0x04,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x09,0x3C, ++0xCC,0x5E,0x27,0x91, ++0x02,0x80,0x08,0x3C, ++0xBC,0x5E,0x05,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x06,0x00,0x02,0x3C, ++0x10,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x01,0xA5,0x34, ++0x00,0x26,0x07,0x00, ++0x25,0xB0,0x02,0x3C, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x66,0xAC, ++0xBC,0x5E,0x05,0xAD, ++0xCC,0x5E,0x27,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x04,0x00,0x04,0x3C, ++0x30,0x1F,0x70,0x26, ++0x26,0x18,0x64,0x00, ++0xD4,0x1B,0x43,0xAC, ++0xD0,0x1B,0x02,0x8E, ++0x08,0x00,0x03,0x3C, ++0x24,0x10,0x52,0x00, ++0x24,0x10,0x43,0x00, ++0x68,0xFD,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x05,0x3C, ++0x1C,0x00,0xA3,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x06,0x24, ++0xFF,0x00,0x24,0x31, ++0xDD,0x01,0x86,0x10, ++0x25,0xB0,0x02,0x3C, ++0x00,0x80,0x22,0x31, ++0x33,0x01,0x40,0x10, ++0x00,0xFF,0x02,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x00,0x62,0xAC, ++0xFF,0x00,0x02,0x24, ++0x25,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x4C,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x9C,0x36,0x09,0xA2, ++0xE0,0x36,0x03,0xAE, ++0x05,0x00,0x04,0x24, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0x02,0x80,0x0A,0x3C, ++0xCC,0x5E,0x47,0x91, ++0x02,0x80,0x09,0x3C, ++0xBC,0x5E,0x25,0x8D, ++0xD0,0x1B,0x06,0x8E, ++0x18,0x00,0x02,0x3C, ++0x08,0x00,0xE7,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x02,0xA5,0x34, ++0x25,0xB0,0x03,0x3C, ++0x10,0x00,0x02,0x3C, ++0x00,0x26,0x07,0x00, ++0x26,0xA0,0x82,0x02, ++0xB0,0x03,0x68,0x34, ++0x25,0x20,0x85,0x00, ++0x80,0x03,0x63,0x34, ++0x41,0xB0,0x02,0x3C, ++0x00,0x00,0x64,0xAC, ++0x00,0x00,0x46,0xAC, ++0xBC,0x5E,0x25,0xAD, ++0xCC,0x5E,0x47,0xA1, ++0xD0,0x1B,0x06,0xAE, ++0x00,0x00,0x14,0xAD, ++0x30,0x1F,0x62,0x26, ++0xD4,0x1B,0x43,0x8C, ++0x08,0x00,0x04,0x3C, ++0x26,0x18,0x64,0x00, ++0x9E,0x35,0x00,0x08, ++0xD4,0x1B,0x43,0xAC, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xD4,0x1B,0x02,0x8E, ++0xD0,0x1B,0x03,0x8E, ++0x00,0x20,0x42,0x38, ++0x7D,0x35,0x00,0x08, ++0xD4,0x1B,0x02,0xAE, ++0x8C,0x33,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x2A,0xB0,0x02,0x3C, ++0x08,0x00,0x43,0x34, ++0x00,0x00,0x69,0x8C, ++0xFF,0x00,0x02,0x24, ++0xFF,0x00,0x24,0x31, ++0x2C,0x00,0x82,0x10, ++0x00,0x80,0x22,0x31, ++0x34,0x01,0x40,0x14, ++0x00,0x80,0x02,0x3C, ++0x00,0xFF,0x02,0x3C, ++0x24,0x10,0x22,0x01, ++0x0B,0x00,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0xB4,0x36,0x02,0x92, ++0x20,0xB0,0x03,0x3C, ++0x00,0x12,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x0C,0x00,0x49,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xB0,0x03,0x63,0x34, ++0x00,0x00,0x69,0xAC, ++0xFF,0x00,0x24,0x31, ++0xFF,0x00,0x02,0x24, ++0x1A,0x00,0x82,0x10, ++0x30,0x1F,0x70,0x26, ++0xFF,0x00,0x23,0x31, ++0x7C,0x37,0x05,0x8E, ++0x20,0x10,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x21,0x30,0x60,0x00, ++0x10,0x37,0x03,0xAE, ++0x01,0x00,0x04,0x24, ++0xB4,0x36,0x09,0xA2, ++0x80,0x00,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA0,0xAF, ++0xD0,0x1B,0x05,0x8E, ++0x02,0x80,0x06,0x3C, ++0xBC,0x5E,0xC4,0x8C, ++0xFF,0xC7,0x02,0x24, ++0x24,0x28,0xA2,0x00, ++0x25,0xB0,0x02,0x3C, ++0x10,0x00,0x84,0x34, ++0x80,0x03,0x42,0x34, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x65,0xAC, ++0xBC,0x5E,0xC4,0xAC, ++0xD0,0x1B,0x05,0xAE, ++0x30,0x1F,0x63,0x26, ++0xD4,0x1B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x42,0x38, ++0x76,0x35,0x00,0x08, ++0xD4,0x1B,0x62,0xAC, ++0x56,0x01,0x02,0x35, ++0x00,0x00,0x43,0x94, ++0x00,0x00,0x00,0x00, ++0x70,0xFC,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x93,0x55,0x00,0x0C, ++0x07,0x00,0x04,0x24, ++0x29,0x35,0x00,0x08, ++0x30,0x1F,0x64,0x26, ++0x00,0x00,0x62,0xAC, ++0xD3,0x35,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0xF8,0x1D,0x24,0x96, ++0x64,0x37,0x25,0x8E, ++0xFF,0x0F,0x83,0x30, ++0x25,0x28,0xA2,0x00, ++0x00,0x19,0x03,0x00, ++0x20,0x00,0xA6,0x24, ++0x02,0x12,0x03,0x00, ++0x01,0x00,0x84,0x24, ++0xF8,0x1D,0x24,0xA6, ++0x17,0x00,0xC2,0xA0, ++0x16,0x00,0xC3,0xA0, ++0x0C,0x00,0xA4,0x8C, ++0x00,0xF0,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xFF,0x0F,0x63,0x30, ++0x00,0x1C,0x03,0x00, ++0x24,0x20,0x82,0x00, ++0x25,0x20,0x83,0x00, ++0x0C,0x00,0xA4,0xAC, ++0x64,0x37,0x25,0x8E, ++0x01,0x00,0x10,0x24, ++0x01,0x00,0x04,0x24, ++0x31,0x10,0x06,0x3C, ++0x00,0x01,0x07,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x2A,0xB0,0x02,0x3C, ++0x01,0x00,0x42,0x34, ++0x02,0x00,0x03,0x24, ++0x00,0x00,0x50,0xA0, ++0x00,0x00,0x43,0xA0, ++0xD4,0x1B,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x42,0x38, ++0x68,0x35,0x00,0x08, ++0xD4,0x1B,0x22,0xAE, ++0xD0,0x03,0x23,0x35, ++0x80,0x00,0x02,0x24, ++0x00,0x00,0x62,0xAC, ++0x24,0x36,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x25,0xB0,0x02,0x3C, ++0x01,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xF0,0x35,0x00,0x08, ++0x30,0x1F,0x65,0x26, ++0x24,0x10,0x22,0x01, ++0xA9,0xFD,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x47,0x00,0xC6,0x34, ++0x00,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x85,0x10, ++0x30,0x1F,0x62,0x26, ++0xA4,0x36,0x04,0xA2, ++0x00,0x00,0xC2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x07,0x00,0x83,0x10, ++0x21,0x38,0x00,0x02, ++0x21,0x28,0xC0,0x00, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0xA4,0x36,0xE3,0xA0, ++0x30,0x1F,0x62,0x26, ++0xA4,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x9C,0x36,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0xFD,0xFD,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x45,0x00,0xE5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0xA8,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0xA8,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0xA8,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x11,0x37,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0x9E,0xFD,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x46,0x00,0xA5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0xA0,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0xA0,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0xA0,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0xD3,0x36,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x00,0xFF,0x02,0x3C, ++0x24,0x10,0x22,0x01, ++0x30,0xFE,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x41,0x00,0xA5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0x90,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0x90,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0x90,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x87,0x37,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0xCF,0xFE,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x44,0x00,0xA5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0x9C,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0x9C,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0x9C,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x47,0x38,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0xAE,0xFD,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x40,0x00,0xA5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0x8C,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0x8C,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0x8C,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x47,0x37,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x00,0x00,0x62,0xAC, ++0x93,0x38,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0x08,0xFE,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x42,0x00,0xA5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0x94,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0x94,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0x94,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0xC5,0x37,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x24,0x10,0x22,0x01, ++0x2C,0xFE,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x43,0x00,0xE5,0x34, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x0E,0x00,0x86,0x10, ++0x30,0x1F,0x62,0x26, ++0x98,0x36,0x04,0xA2, ++0x00,0x00,0xA2,0x90, ++0xFF,0x00,0x83,0x30, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0x83,0x10, ++0x30,0x1F,0x62,0x26, ++0x21,0x30,0x00,0x02, ++0x00,0x00,0xA2,0x90, ++0x21,0x18,0x80,0x00, ++0xFD,0xFF,0x62,0x14, ++0xFF,0x00,0x44,0x30, ++0x98,0x36,0xC3,0xA0, ++0x30,0x1F,0x62,0x26, ++0x98,0x36,0x43,0x90, ++0x20,0xB0,0x02,0x3C, ++0x00,0x1A,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x0C,0x00,0x69,0x8C, ++0x25,0xB0,0x02,0x3C, ++0xB0,0x03,0x42,0x34, ++0xFF,0x00,0x24,0x31, ++0x00,0x00,0x49,0xAC, ++0x0A,0x38,0x00,0x08, ++0xFF,0x00,0x02,0x24, ++0x06,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xAB,0x37,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x01,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xBF,0x36,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x25,0xB0,0x02,0x3C, ++0x07,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x30,0x1F,0x63,0x26, ++0xD4,0x1B,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x42,0x38, ++0x71,0x37,0x00,0x08, ++0xD4,0x1B,0x62,0xAC, ++0x00,0x00,0x40,0xAC, ++0x34,0x37,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x02,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xFA,0x36,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x90,0x03,0x63,0x34, ++0x00,0x00,0x62,0xAC, ++0x2D,0x38,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x03,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x6E,0x38,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0x05,0x00,0x03,0x24, ++0x90,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0xEC,0x37,0x00,0x08, ++0x30,0x1F,0x62,0x26, ++0xE0,0xFF,0xBD,0x27, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x25,0xB0,0x0C,0x3C, ++0x01,0x80,0x02,0x3C, ++0x18,0x03,0x83,0x35, ++0x9C,0xE8,0x42,0x24, ++0x02,0x80,0x12,0x3C, ++0x41,0xB0,0x0B,0x3C, ++0x00,0x00,0x62,0xAC, ++0x30,0x1F,0x4A,0x26, ++0x0A,0x00,0x62,0x35, ++0x00,0x00,0x44,0x94, ++0xDE,0x1B,0x43,0x95, ++0xDC,0x1B,0x49,0x95, ++0x25,0x30,0x64,0x00, ++0xFF,0xFF,0xD0,0x30, ++0x24,0x10,0x09,0x02, ++0x02,0x00,0x42,0x30, ++0xC2,0x00,0x40,0x10, ++0xC0,0x03,0x83,0x35, ++0x02,0x00,0x02,0x24, ++0x00,0x00,0x62,0xAC, ++0x02,0x80,0x08,0x3C, ++0xBC,0x5E,0x04,0x8D, ++0xDC,0x02,0x82,0x35, ++0x00,0x00,0x47,0x90, ++0xFD,0xFF,0x03,0x24, ++0x00,0x80,0x02,0x3C, ++0x24,0x18,0x23,0x01, ++0x25,0x20,0x82,0x00, ++0x02,0x00,0xC6,0x38, ++0x08,0x00,0x65,0x35, ++0x02,0x80,0x02,0x3C, ++0xF5,0x5E,0x47,0xA0, ++0xBC,0x5E,0x04,0xAD, ++0xDE,0x1B,0x46,0xA5, ++0x21,0x48,0x60,0x00, ++0x00,0x00,0xA3,0xA4, ++0xDC,0x1B,0x43,0xA5, ++0x24,0x38,0x09,0x02, ++0x04,0x00,0xE2,0x30, ++0x0A,0x00,0x40,0x10, ++0x08,0x00,0xE2,0x30, ++0xDE,0x1B,0x43,0x95, ++0x0C,0x00,0x64,0x35, ++0xC0,0x03,0x85,0x35, ++0x04,0x00,0x63,0x38, ++0x04,0x00,0x02,0x24, ++0x00,0x00,0x86,0x8C, ++0x00,0x00,0xA2,0xAC, ++0xDE,0x1B,0x43,0xA5, ++0x08,0x00,0xE2,0x30, ++0x08,0x00,0x40,0x10, ++0x10,0x00,0xE2,0x30, ++0xDE,0x1B,0x42,0x95, ++0xC0,0x03,0x84,0x35, ++0x08,0x00,0x03,0x24, ++0x08,0x00,0x42,0x38, ++0x00,0x00,0x83,0xAC, ++0xDE,0x1B,0x42,0xA5, ++0x10,0x00,0xE2,0x30, ++0x08,0x00,0x40,0x10, ++0x20,0x00,0xE2,0x30, ++0xDE,0x1B,0x42,0x95, ++0xC0,0x03,0x84,0x35, ++0x10,0x00,0x03,0x24, ++0x10,0x00,0x42,0x38, ++0x00,0x00,0x83,0xAC, ++0xDE,0x1B,0x42,0xA5, ++0x20,0x00,0xE2,0x30, ++0x08,0x00,0x40,0x10, ++0x80,0x00,0xE2,0x30, ++0xDE,0x1B,0x42,0x95, ++0xC0,0x03,0x84,0x35, ++0x20,0x00,0x03,0x24, ++0x20,0x00,0x42,0x38, ++0x00,0x00,0x83,0xAC, ++0xDE,0x1B,0x42,0xA5, ++0x80,0x00,0xE2,0x30, ++0x74,0x00,0x40,0x10, ++0x30,0x1F,0x47,0x26, ++0xC0,0x03,0x83,0x35, ++0x80,0x00,0x02,0x24, ++0x42,0xB0,0x0B,0x3C, ++0x00,0x00,0x62,0xAC, ++0x03,0x00,0x71,0x35, ++0xDE,0x1B,0x42,0x95, ++0x00,0x00,0x23,0x92, ++0x80,0x00,0x42,0x38, ++0x20,0x00,0x63,0x30, ++0x59,0x00,0x60,0x10, ++0xDE,0x1B,0x42,0xA5, ++0x20,0x00,0x02,0x24, ++0x00,0x00,0x22,0xA2, ++0x02,0x80,0x03,0x3C, ++0x16,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x75,0x00,0x40,0x14, ++0x21,0x40,0x00,0x00, ++0xB0,0x1B,0x42,0x95, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x4E,0x00,0x40,0x10, ++0x02,0x80,0x06,0x3C, ++0x02,0x80,0x07,0x3C, ++0xF4,0x5E,0xE2,0x90, ++0x00,0x00,0x00,0x00, ++0x49,0x00,0x40,0x10, ++0x02,0x80,0x09,0x3C, ++0x02,0x80,0x04,0x3C, ++0x00,0x5F,0x82,0x8C, ++0x20,0x5F,0x24,0x8D, ++0x24,0x5F,0x25,0x8D, ++0x21,0x18,0x00,0x00, ++0x21,0x10,0x44,0x00, ++0x2B,0x30,0x44,0x00, ++0x21,0x18,0x65,0x00, ++0x21,0x18,0x66,0x00, ++0x20,0x5F,0x22,0xAD, ++0x24,0x5F,0x23,0xAD, ++0xF4,0x5E,0xE4,0x90, ++0x02,0x00,0x02,0x24, ++0xFF,0x00,0x84,0x30, ++0x07,0x00,0x82,0x10, ++0x02,0x80,0x04,0x3C, ++0xF4,0x5E,0xE2,0x90, ++0x03,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x5A,0x00,0x43,0x14, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x04,0x3C, ++0x11,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x42,0x24, ++0x11,0x5F,0x82,0xA0, ++0x11,0x5F,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0xFA,0x5E,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x5B,0x00,0x00,0x11, ++0x80,0x00,0x86,0x35, ++0x11,0x5F,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x40,0x14, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x02,0x3C, ++0x10,0x5F,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x11,0x5F,0x83,0xA0, ++0x02,0x80,0x05,0x3C, ++0x0E,0x5F,0xA2,0x90, ++0x02,0x80,0x03,0x3C, ++0x02,0x00,0x04,0x24, ++0x10,0x00,0x42,0x34, ++0x0E,0x5F,0xA2,0xA0, ++0xF9,0x5E,0x62,0x90, ++0x21,0x28,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x80,0x30,0x02,0x00, ++0x21,0x30,0xC2,0x00, ++0x8C,0x23,0x00,0x0C, ++0x00,0x33,0x06,0x00, ++0x42,0xB0,0x02,0x3C, ++0x44,0x00,0x04,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x44,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x05,0x00,0x40,0x10, ++0x02,0x80,0x06,0x3C, ++0x04,0x00,0x04,0x24, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x02,0x80,0x06,0x3C, ++0xBC,0x5E,0xC4,0x8C, ++0x30,0x1F,0x47,0x26, ++0xDC,0x1B,0xE5,0x94, ++0x08,0x00,0x02,0x3C, ++0x25,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x7F,0xFF,0xA5,0x30, ++0xB0,0x03,0x42,0x34, ++0x08,0x00,0x63,0x34, ++0x00,0x00,0x44,0xAC, ++0x00,0x00,0x65,0xA4, ++0xBC,0x5E,0xC4,0xAC, ++0xDC,0x1B,0xE5,0xA4, ++0x30,0x1F,0x47,0x26, ++0xDC,0x1B,0xE2,0x94, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x50,0x00, ++0x00,0x30,0x42,0x30, ++0x06,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xDE,0x1B,0xE2,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x42,0x38, ++0x00,0x20,0x42,0x34, ++0xDE,0x1B,0xE2,0xA4, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x51,0x3A,0x00,0x08, ++0xDE,0x1B,0x46,0xA5, ++0x01,0x00,0x08,0x24, ++0x16,0x5F,0x60,0xA0, ++0x8D,0x3A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x0E,0x5F,0xA2,0x90, ++0x02,0x80,0x03,0x3C, ++0x02,0x00,0x04,0x24, ++0x10,0x00,0x42,0x34, ++0x0E,0x5F,0xA2,0xA0, ++0xF9,0x5E,0x62,0x90, ++0x21,0x28,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x80,0x30,0x02,0x00, ++0x21,0x30,0xC2,0x00, ++0x8C,0x23,0x00,0x0C, ++0x00,0x33,0x06,0x00, ++0x44,0x00,0x02,0x24, ++0x00,0x00,0x22,0xA2, ++0xD5,0x3A,0x00,0x08, ++0x02,0x80,0x03,0x3C, ++0x84,0x00,0x84,0x35, ++0x00,0x00,0x82,0x8C, ++0x02,0x80,0x08,0x3C, ++0x00,0x00,0xC4,0x8C, ++0x1C,0x5F,0x06,0x8D, ++0x21,0x10,0x00,0x00, ++0x20,0x5F,0x28,0x8D, ++0x24,0x5F,0x29,0x8D, ++0x00,0x00,0x65,0x91, ++0x25,0x10,0x44,0x00, ++0x21,0x10,0x46,0x00, ++0xFB,0xFF,0x04,0x24, ++0x24,0x28,0xA4,0x00, ++0x23,0x40,0x02,0x01, ++0x00,0x00,0x65,0xA1, ++0x04,0x00,0x00,0x11, ++0x01,0x00,0x06,0x24, ++0x80,0x10,0x08,0x00, ++0x21,0x10,0x48,0x00, ++0x80,0x30,0x02,0x00, ++0x01,0x00,0x04,0x24, ++0x8C,0x23,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x42,0xB0,0x02,0x3C, ++0x22,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0xDF,0x3A,0x00,0x08, ++0x02,0x80,0x06,0x3C, ++0xF0,0xFF,0xBD,0x27, ++0x08,0x00,0xB2,0xAF, ++0x04,0x00,0xB1,0xAF, ++0x00,0x00,0xB0,0xAF, ++0x00,0x40,0x09,0x40, ++0x00,0x68,0x0A,0x40, ++0x00,0x70,0x02,0x40, ++0x00,0x60,0x0B,0x40, ++0x25,0xB0,0x05,0x3C, ++0x18,0x03,0xA7,0x34, ++0x00,0x00,0xE6,0x8C, ++0x01,0x80,0x02,0x3C, ++0x1C,0x03,0xA3,0x34, ++0xC8,0xEC,0x42,0x24, ++0x00,0x00,0x66,0xAC, ++0x00,0x00,0xE2,0xAC, ++0x80,0x00,0x83,0x8C, ++0x7C,0x02,0xA2,0x34, ++0x80,0x02,0xA6,0x34, ++0x84,0x02,0xA7,0x34, ++0x88,0x02,0xA8,0x34, ++0x00,0x00,0x43,0xAC, ++0x00,0x00,0xC9,0xAC, ++0x00,0x00,0xEA,0xAC, ++0x00,0x00,0x0B,0xAD, ++0x74,0x00,0x83,0x8C, ++0x8C,0x02,0xA2,0x34, ++0x90,0x02,0xA7,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0x86,0x8C, ++0x94,0x02,0xA8,0x34, ++0x98,0x02,0xA9,0x34, ++0x00,0x00,0xE6,0xAC, ++0x0C,0x00,0x82,0x8C, ++0x9C,0x02,0xA6,0x34, ++0xA0,0x02,0xA7,0x34, ++0x00,0x00,0x02,0xAD, ++0x10,0x00,0x83,0x8C, ++0xA4,0x02,0xA8,0x34, ++0xA8,0x02,0xAA,0x34, ++0x00,0x00,0x23,0xAD, ++0x14,0x00,0x82,0x8C, ++0xAC,0x02,0xA9,0x34, ++0xB0,0x02,0xAB,0x34, ++0x00,0x00,0xC2,0xAC, ++0x18,0x00,0x83,0x8C, ++0xB4,0x02,0xAC,0x34, ++0xB8,0x02,0xAD,0x34, ++0x00,0x00,0xE3,0xAC, ++0x1C,0x00,0x82,0x8C, ++0xBC,0x02,0xA7,0x34, ++0xC0,0x02,0xAE,0x34, ++0x00,0x00,0x02,0xAD, ++0x20,0x00,0x83,0x8C, ++0xC4,0x02,0xA8,0x34, ++0xC8,0x02,0xAF,0x34, ++0x00,0x00,0x43,0xAD, ++0x24,0x00,0x82,0x8C, ++0xCC,0x02,0xAA,0x34, ++0xD0,0x02,0xB0,0x34, ++0x00,0x00,0x22,0xAD, ++0x28,0x00,0x83,0x8C, ++0xD4,0x02,0xA9,0x34, ++0xD8,0x02,0xB1,0x34, ++0x00,0x00,0x63,0xAD, ++0x2C,0x00,0x86,0x8C, ++0x70,0x02,0xAB,0x34, ++0x74,0x02,0xB2,0x34, ++0x00,0x00,0x86,0xAD, ++0x30,0x00,0x82,0x8C, ++0x78,0x02,0xA6,0x34, ++0x6C,0x03,0xAC,0x34, ++0x00,0x00,0xA2,0xAD, ++0x34,0x00,0x83,0x8C, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0xE3,0xAC, ++0x38,0x00,0x85,0x8C, ++0x28,0xC7,0x47,0x8C, ++0x00,0x00,0xC5,0xAD, ++0x3C,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x02,0xAD, ++0x40,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xE3,0xAD, ++0x44,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x42,0xAD, ++0x48,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x03,0xAE, ++0x4C,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x22,0xAD, ++0x50,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x23,0xAE, ++0x54,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x62,0xAD, ++0x58,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x43,0xAE, ++0x5C,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0xAC, ++0x21,0x10,0xE0,0x00, ++0x00,0x00,0x82,0xAD, ++0x01,0x00,0xE7,0x24, ++0x21,0x10,0xE0,0x00, ++0x01,0x00,0xE7,0x24, ++0x00,0x00,0x82,0xAD, ++0x9D,0x3B,0x00,0x08, ++0x21,0x10,0xE0,0x00, ++0x01,0x80,0x1B,0x3C, ++0x90,0xEE,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x21,0xD8,0xA0,0x03, ++0x82,0xDA,0x1B,0x00, ++0x80,0xDA,0x1B,0x00, ++0x08,0x00,0x7B,0x27, ++0x04,0x00,0x61,0xAF, ++0x08,0x00,0x62,0xAF, ++0x0C,0x00,0x63,0xAF, ++0x10,0x00,0x64,0xAF, ++0x14,0x00,0x65,0xAF, ++0x18,0x00,0x66,0xAF, ++0x1C,0x00,0x67,0xAF, ++0x20,0x00,0x68,0xAF, ++0x24,0x00,0x69,0xAF, ++0x28,0x00,0x6A,0xAF, ++0x2C,0x00,0x6B,0xAF, ++0x30,0x00,0x6C,0xAF, ++0x34,0x00,0x6D,0xAF, ++0x38,0x00,0x6E,0xAF, ++0x3C,0x00,0x6F,0xAF, ++0x12,0x40,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x00,0x70,0x0A,0x40, ++0x40,0x00,0x70,0xAF, ++0x44,0x00,0x71,0xAF, ++0x48,0x00,0x72,0xAF, ++0x4C,0x00,0x73,0xAF, ++0x50,0x00,0x74,0xAF, ++0x54,0x00,0x75,0xAF, ++0x58,0x00,0x76,0xAF, ++0x5C,0x00,0x77,0xAF, ++0x60,0x00,0x78,0xAF, ++0x64,0x00,0x79,0xAF, ++0x68,0x00,0x7C,0xAF, ++0x6C,0x00,0x7D,0xAF, ++0x70,0x00,0x7E,0xAF, ++0x74,0x00,0x7F,0xAF, ++0x78,0x00,0x68,0xAF, ++0x7C,0x00,0x69,0xAF, ++0x80,0x00,0x6A,0xAF, ++0x00,0x68,0x1A,0x40, ++0x25,0xB0,0x1B,0x3C, ++0x1C,0x03,0x7B,0x37, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x7A,0xAF, ++0x7F,0x00,0x5B,0x33, ++0x30,0x00,0x60,0x13, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x1B,0x3C, ++0x30,0x03,0x7B,0x37, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x7A,0xAF, ++0x00,0x00,0x00,0x00, ++0x21,0xD8,0xA0,0x03, ++0x82,0xDA,0x1B,0x00, ++0x80,0xDA,0x1B,0x00, ++0x08,0x00,0x7B,0x27, ++0x04,0x00,0x61,0xAF, ++0x08,0x00,0x62,0xAF, ++0x0C,0x00,0x63,0xAF, ++0x10,0x00,0x64,0xAF, ++0x14,0x00,0x65,0xAF, ++0x18,0x00,0x66,0xAF, ++0x1C,0x00,0x67,0xAF, ++0x20,0x00,0x68,0xAF, ++0x24,0x00,0x69,0xAF, ++0x28,0x00,0x6A,0xAF, ++0x2C,0x00,0x6B,0xAF, ++0x30,0x00,0x6C,0xAF, ++0x34,0x00,0x6D,0xAF, ++0x38,0x00,0x6E,0xAF, ++0x3C,0x00,0x6F,0xAF, ++0x12,0x40,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x00,0x70,0x0A,0x40, ++0x40,0x00,0x70,0xAF, ++0x44,0x00,0x71,0xAF, ++0x48,0x00,0x72,0xAF, ++0x4C,0x00,0x73,0xAF, ++0x50,0x00,0x74,0xAF, ++0x54,0x00,0x75,0xAF, ++0x58,0x00,0x76,0xAF, ++0x5C,0x00,0x77,0xAF, ++0x60,0x00,0x78,0xAF, ++0x64,0x00,0x79,0xAF, ++0x68,0x00,0x7C,0xAF, ++0x6C,0x00,0x7D,0xAF, ++0x70,0x00,0x7E,0xAF, ++0x74,0x00,0x7F,0xAF, ++0x78,0x00,0x68,0xAF, ++0x7C,0x00,0x69,0xAF, ++0x80,0x00,0x6A,0xAF, ++0x32,0x3B,0x00,0x08, ++0x21,0x20,0x60,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x08,0x3C, ++0x20,0x03,0x08,0x35, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x1A,0xAD, ++0x00,0x04,0x5B,0x33, ++0x0A,0x00,0x60,0x13, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x08,0x3C, ++0x3C,0xD4,0x08,0x25, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x1B,0x3C, ++0x24,0x03,0x7B,0x37, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x68,0xAF, ++0x09,0xF8,0x00,0x01, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x5B,0x33, ++0x25,0xB0,0x08,0x3C, ++0x28,0x03,0x08,0x35, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x1B,0xAD, ++0x06,0x00,0x60,0x13, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x08,0x3C, ++0x9C,0xE8,0x08,0x25, ++0x00,0x00,0x00,0x00, ++0x09,0xF8,0x00,0x01, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x1A,0x3C, ++0xBC,0x5E,0x5A,0x27, ++0x04,0x00,0x5B,0x97, ++0x25,0xB0,0x08,0x3C, ++0x30,0x03,0x08,0x35, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x1B,0xAD, ++0x18,0x00,0x60,0x13, ++0x00,0x00,0x00,0x00, ++0x08,0xE4,0x9B,0x27, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x61,0x8F, ++0xFC,0x03,0x70,0x7B, ++0x7C,0x00,0x62,0x7B, ++0xBC,0x00,0x64,0x7B, ++0xFC,0x00,0x66,0x7B, ++0x3C,0x01,0x68,0x7B, ++0x13,0x00,0x00,0x02, ++0x11,0x00,0x20,0x02, ++0x7C,0x01,0x6A,0x7B, ++0xBC,0x01,0x6C,0x7B, ++0xFC,0x01,0x6E,0x7B, ++0x3C,0x02,0x70,0x7B, ++0x7C,0x02,0x72,0x7B, ++0xBC,0x02,0x74,0x7B, ++0xFC,0x02,0x76,0x7B, ++0x3C,0x03,0x78,0x7B, ++0x7C,0x03,0x7C,0x7B, ++0xBC,0x03,0x7E,0x7B, ++0x80,0x00,0x7B,0x8F, ++0x8F,0x3C,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0xD8,0xA0,0x03, ++0x82,0xDA,0x1B,0x00, ++0x80,0xDA,0x1B,0x00, ++0x08,0x00,0x7B,0x27, ++0x08,0x00,0x5B,0xAF, ++0xFC,0xE7,0x9D,0x27, ++0x00,0x00,0x4A,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x00,0x40,0x11, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x08,0x3C, ++0x1C,0x5E,0x08,0x25, ++0x21,0x48,0x00,0x00, ++0x21,0x58,0x00,0x00, ++0x01,0x00,0x6B,0x25, ++0x1A,0x00,0x40,0x11, ++0x24,0x70,0x4B,0x01, ++0x14,0x00,0xC0,0x11, ++0x01,0x00,0x04,0x24, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x44,0xA3, ++0x26,0x50,0x4B,0x01, ++0x00,0x00,0x4A,0xAF, ++0x80,0x80,0x09,0x00, ++0x21,0x80,0x08,0x02, ++0x00,0x00,0x10,0x8E, ++0x00,0x00,0x00,0x00, ++0x09,0xF8,0x00,0x02, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x1B,0x3C, ++0x68,0xF1,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x02,0x80,0x1A,0x3C, ++0xBC,0x5E,0x5A,0x27, ++0xE1,0xFF,0x00,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x29,0x25, ++0x40,0x58,0x0B,0x00, ++0x52,0x3C,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x1B,0x3C, ++0xBC,0x5E,0x7B,0x27, ++0x21,0x60,0x00,0x00, ++0x04,0x00,0x6C,0xA7, ++0x08,0x00,0x7A,0x8F, ++0x00,0x00,0x00,0x00, ++0xF8,0xFF,0x5A,0x27, ++0x00,0x00,0x5A,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x5A,0x27, ++0x84,0x00,0x44,0x8F, ++0x00,0x00,0x00,0x00, ++0xF9,0xFF,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x41,0x8F, ++0xFC,0x03,0x50,0x7B, ++0x7C,0x00,0x42,0x7B, ++0xBC,0x00,0x44,0x7B, ++0xFC,0x00,0x46,0x7B, ++0x3C,0x01,0x48,0x7B, ++0x13,0x00,0x00,0x02, ++0x11,0x00,0x20,0x02, ++0x7C,0x01,0x4A,0x7B, ++0xBC,0x01,0x4C,0x7B, ++0xFC,0x01,0x4E,0x7B, ++0x3C,0x02,0x50,0x7B, ++0x7C,0x02,0x52,0x7B, ++0xBC,0x02,0x54,0x7B, ++0xFC,0x02,0x56,0x7B, ++0x3C,0x03,0x58,0x7B, ++0x7C,0x03,0x5C,0x7B, ++0xBC,0x03,0x5E,0x7B, ++0x80,0x00,0x5B,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x60,0x03, ++0x10,0x00,0x00,0x42, ++0x00,0x60,0x05,0x40, ++0x42,0x28,0x05,0x00, ++0x40,0x28,0x05,0x00, ++0x00,0x60,0x85,0x40, ++0x04,0x00,0x81,0xAC, ++0x08,0x00,0x82,0xAC, ++0x0C,0x00,0x83,0xAC, ++0x20,0x00,0x88,0xAC, ++0x24,0x00,0x89,0xAC, ++0x28,0x00,0x8A,0xAC, ++0x2C,0x00,0x8B,0xAC, ++0x30,0x00,0x8C,0xAC, ++0x34,0x00,0x8D,0xAC, ++0x38,0x00,0x8E,0xAC, ++0x3C,0x00,0x8F,0xAC, ++0x12,0x40,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x40,0x00,0x90,0xAC, ++0x44,0x00,0x91,0xAC, ++0x48,0x00,0x92,0xAC, ++0x4C,0x00,0x93,0xAC, ++0x50,0x00,0x94,0xAC, ++0x54,0x00,0x95,0xAC, ++0x58,0x00,0x96,0xAC, ++0x5C,0x00,0x97,0xAC, ++0x60,0x00,0x98,0xAC, ++0x64,0x00,0x99,0xAC, ++0x68,0x00,0x9C,0xAC, ++0x6C,0x00,0x9D,0xAC, ++0x70,0x00,0x9E,0xAC, ++0x74,0x00,0x9F,0xAC, ++0x78,0x00,0x88,0xAC, ++0x7C,0x00,0x89,0xAC, ++0x80,0x00,0x9F,0xAC, ++0xF8,0xFF,0x84,0x24, ++0x00,0x00,0x84,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x84,0x24, ++0x84,0x00,0x86,0x8C, ++0x00,0x00,0x00,0x00, ++0xF9,0xFF,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0xD8,0x80,0x00, ++0x01,0x00,0xBA,0x34, ++0x04,0x00,0x61,0x8F, ++0xFC,0x03,0x70,0x7B, ++0x7C,0x00,0x62,0x7B, ++0xBC,0x00,0x64,0x7B, ++0xFC,0x00,0x66,0x7B, ++0x3C,0x01,0x68,0x7B, ++0x13,0x00,0x00,0x02, ++0x11,0x00,0x20,0x02, ++0x7C,0x01,0x6A,0x7B, ++0xBC,0x01,0x6C,0x7B, ++0xFC,0x01,0x6E,0x7B, ++0x3C,0x02,0x70,0x7B, ++0x7C,0x02,0x72,0x7B, ++0xBC,0x02,0x74,0x7B, ++0xFC,0x02,0x76,0x7B, ++0x3C,0x03,0x78,0x7B, ++0x7C,0x03,0x7C,0x7B, ++0xBC,0x03,0x7E,0x7B, ++0x80,0x00,0x7B,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x60,0x03, ++0x00,0x60,0x9A,0x40, ++0x00,0x60,0x05,0x40, ++0x42,0x28,0x05,0x00, ++0x40,0x28,0x05,0x00, ++0x00,0x60,0x85,0x40, ++0x04,0x00,0x81,0xAC, ++0x08,0x00,0x82,0xAC, ++0x0C,0x00,0x83,0xAC, ++0x20,0x00,0x88,0xAC, ++0x24,0x00,0x89,0xAC, ++0x28,0x00,0x8A,0xAC, ++0x2C,0x00,0x8B,0xAC, ++0x30,0x00,0x8C,0xAC, ++0x34,0x00,0x8D,0xAC, ++0x38,0x00,0x8E,0xAC, ++0x3C,0x00,0x8F,0xAC, ++0x12,0x40,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x40,0x00,0x90,0xAC, ++0x44,0x00,0x91,0xAC, ++0x48,0x00,0x92,0xAC, ++0x4C,0x00,0x93,0xAC, ++0x50,0x00,0x94,0xAC, ++0x54,0x00,0x94,0xAC, ++0x58,0x00,0x96,0xAC, ++0x5C,0x00,0x96,0xAC, ++0x60,0x00,0x98,0xAC, ++0x64,0x00,0x99,0xAC, ++0x68,0x00,0x9C,0xAC, ++0x6C,0x00,0x9D,0xAC, ++0x70,0x00,0x9E,0xAC, ++0x78,0x00,0x88,0xAC, ++0x7C,0x00,0x89,0xAC, ++0x80,0x00,0x9F,0xAC, ++0x84,0x00,0x80,0xAC, ++0xF8,0xFF,0x84,0x24, ++0x00,0x00,0x84,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x84,0x24, ++0x84,0x00,0x86,0x8C, ++0xFA,0xFF,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0xD8,0x80,0x00, ++0x01,0x00,0xBA,0x24, ++0x04,0x00,0x61,0x8F, ++0xFC,0x03,0x70,0x7B, ++0x7C,0x00,0x62,0x7B, ++0xBC,0x00,0x64,0x7B, ++0xFC,0x00,0x66,0x7B, ++0x3C,0x01,0x68,0x7B, ++0x13,0x00,0x00,0x02, ++0x11,0x00,0x20,0x02, ++0x7C,0x01,0x6A,0x7B, ++0xBC,0x01,0x6C,0x7B, ++0xFC,0x01,0x6E,0x7B, ++0x3C,0x02,0x70,0x7B, ++0x7C,0x02,0x72,0x7B, ++0xBC,0x02,0x74,0x7B, ++0xFC,0x02,0x76,0x7B, ++0x3C,0x03,0x78,0x7B, ++0x7C,0x03,0x7C,0x7B, ++0xBC,0x03,0x7E,0x7B, ++0x80,0x00,0x7B,0x8F, ++0x08,0x00,0x60,0x03, ++0x00,0x60,0x9A,0x40, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x83,0x4E,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x1B,0x3C, ++0x00,0x00,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x00,0x00,0x05,0x24, ++0x03,0x00,0xA4,0x24, ++0x00,0xA0,0x80,0x40, ++0x00,0xA0,0x84,0x40, ++0x01,0x80,0x04,0x3C, ++0x40,0x00,0x84,0x24, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x1B,0x3C, ++0x40,0x00,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x02,0x80,0x1A,0x3C, ++0x00,0x00,0x5A,0x27, ++0xFC,0x03,0x5D,0x27, ++0x02,0x80,0x1C,0x3C, ++0x00,0x1C,0x9C,0x27, ++0x00,0xF0,0x08,0x3C, ++0x00,0x0C,0x08,0x35, ++0x00,0x60,0x88,0x40, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0x84,0x24, ++0xFF,0x7F,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x24,0x20,0x85,0x00, ++0x00,0x20,0x84,0x4C, ++0xFF,0xFF,0x05,0x34, ++0x21,0x28,0xA4,0x00, ++0x00,0x28,0x85,0x4C, ++0x02,0x80,0x08,0x3C, ++0x00,0x00,0x08,0x25, ++0x00,0x00,0x00,0xAD, ++0x03,0x80,0x09,0x3C, ++0xFC,0xCC,0x29,0x25, ++0x04,0x00,0x08,0x25, ++0xFE,0xFF,0x09,0x15, ++0x00,0x00,0x00,0xAD, ++0x00,0x80,0x04,0x3C, ++0x00,0x00,0x84,0x24, ++0xFF,0x7F,0x05,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x24,0x20,0x85,0x00, ++0x00,0x00,0x84,0x4C, ++0xFF,0xFF,0x06,0x34, ++0x21,0x30,0xC4,0x00, ++0x24,0x30,0xC5,0x00, ++0x00,0x08,0x86,0x4C, ++0x00,0xA0,0x04,0x40, ++0x10,0x00,0x84,0x34, ++0x00,0xA0,0x84,0x40, ++0x01,0x80,0x1B,0x3C, ++0xEC,0x00,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x04,0x3C, ++0x44,0x00,0x84,0x34, ++0x00,0x00,0x85,0x84, ++0x20,0x00,0x06,0x24, ++0x25,0x28,0xA6,0x00, ++0x00,0x00,0x85,0xA4, ++0x01,0x80,0x1B,0x3C, ++0x1C,0x01,0x7B,0x27, ++0x25,0xB0,0x1A,0x3C, ++0x18,0x03,0x5A,0x27, ++0x00,0x00,0x5B,0xAF, ++0x25,0xB0,0x04,0x3C, ++0x44,0x00,0x84,0x34, ++0x00,0x00,0x85,0x8C, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xA5,0x30, ++0xFC,0xFF,0xA0,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0x1F,0x07,0x3C, ++0xFF,0xFF,0xE7,0x34, ++0x02,0x80,0x05,0x3C, ++0xD8,0x5D,0xA5,0x24, ++0xFF,0xFF,0xA5,0x30, ++0x40,0xB0,0x04,0x3C, ++0x25,0x28,0xA4,0x00, ++0x24,0x28,0xA7,0x00, ++0x21,0x30,0x00,0x00, ++0x43,0xB0,0x02,0x3C, ++0x00,0x80,0x04,0x3C, ++0x40,0x00,0x84,0x34, ++0x00,0x00,0x45,0xAC, ++0x04,0x00,0x46,0xAC, ++0x08,0x00,0x44,0xAC, ++0xEA,0x65,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x09,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x41,0x04, ++0xFF,0xFF,0x42,0x24, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x42,0x24, ++0x00,0x60,0x02,0x40, ++0x01,0x00,0x41,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x82,0xAC, ++0x00,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x40,0x00, ++0x00,0x60,0x83,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x82,0xAC, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x00,0x60,0x81,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x0C,0x02,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x04,0x00,0x85,0x8C, ++0x00,0xA0,0x03,0x3C, ++0x01,0x00,0x02,0x24, ++0x25,0x28,0xA3,0x00, ++0x00,0x00,0xA4,0x8C, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x3C,0x02,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x04,0x00,0x82,0x8C, ++0x02,0x00,0x83,0x94, ++0x00,0xA0,0x07,0x3C, ++0x25,0x28,0x47,0x00, ++0x00,0x00,0xA2,0x8C, ++0x10,0x00,0x02,0x24, ++0x13,0x00,0x62,0x10, ++0x11,0x00,0x66,0x28, ++0x06,0x00,0xC0,0x10, ++0x20,0x00,0x02,0x24, ++0x08,0x00,0x02,0x24, ++0x17,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0xFD,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA3,0xAC, ++0x04,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x25,0x10,0x47,0x00, ++0x00,0x00,0x42,0x8C, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xA4, ++0x04,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x25,0x18,0x67,0x00, ++0x00,0x00,0x62,0x94, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xA0, ++0x04,0x00,0x83,0x8C, ++0x00,0x00,0x00,0x00, ++0x25,0x18,0x67,0x00, ++0x00,0x00,0x62,0x90, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x47,0x24, ++0x30,0x37,0xE3,0x90, ++0xFF,0xFF,0xA5,0x30, ++0x09,0x00,0xA3,0x10, ++0x21,0x20,0xC0,0x00, ++0xA0,0x37,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xC2,0xAC, ++0xAA,0x37,0xE3,0x94, ++0x0E,0x00,0x02,0x24, ++0x14,0x00,0xC2,0xAC, ++0x30,0x09,0x00,0x08, ++0x0C,0x00,0xC3,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x31,0x26, ++0x88,0x37,0x30,0x96, ++0x02,0x80,0x02,0x3C, ++0x01,0x80,0x03,0x3C, ++0x25,0x80,0x02,0x02, ++0x25,0xB0,0x02,0x3C, ++0x40,0x03,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x60,0x00,0x04,0x26, ++0x80,0x00,0x05,0x26, ++0x00,0x00,0x43,0xAC, ++0x5F,0x1E,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x21,0x20,0x00,0x02, ++0x21,0x28,0x00,0x00, ++0x08,0x52,0x00,0x0C, ++0x08,0x00,0x06,0x24, ++0x88,0x37,0x22,0x8E, ++0x0C,0x00,0x03,0x24, ++0x0C,0x00,0x43,0xAE, ++0x08,0x00,0x42,0xAE, ++0x12,0x00,0x02,0x24, ++0x14,0x00,0x42,0xAE, ++0x21,0x20,0x40,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x30,0x09,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x30,0x80,0x00, ++0x21,0x90,0x00,0x00, ++0x00,0x60,0x11,0x40, ++0x01,0x00,0x21,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0D,0x00,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x60,0x14, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x03,0x24, ++0xF8,0x5E,0x43,0xA0, ++0x0C,0x00,0xC2,0x90, ++0x02,0x80,0x05,0x3C, ++0x0D,0x5F,0xA2,0xA0, ++0x00,0x00,0xC4,0x90, ++0x05,0x00,0x02,0x24, ++0xFF,0x00,0x83,0x30, ++0x41,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x02,0x24, ++0x31,0x00,0x62,0x10, ++0xFF,0x00,0x84,0x30, ++0x09,0x00,0x82,0x2C, ++0x25,0x00,0x40,0x10, ++0x02,0x80,0x10,0x3C, ++0xF4,0x5E,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x21,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0xB6,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF4,0x5E,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x34,0x00,0x40,0x10, ++0x02,0x80,0x03,0x3C, ++0xE0,0x3A,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x51,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x11,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x15,0x5F,0x62,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x04,0x00,0x42,0x28, ++0x06,0x00,0x40,0x10, ++0x04,0x00,0x04,0x24, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x40,0x41,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x12,0x24, ++0x00,0x60,0x91,0x40, ++0x21,0x10,0x40,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x0B,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x40,0x14, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x03,0x3C, ++0x01,0x00,0x02,0x24, ++0x10,0x5F,0x62,0xA0, ++0x10,0x5F,0x63,0x90, ++0x02,0x80,0x02,0x3C, ++0x11,0x5F,0x43,0xA0, ++0x00,0x00,0xC4,0x90, ++0x18,0x41,0x00,0x08, ++0xFF,0x00,0x84,0x30, ++0x0D,0x5F,0xA0,0xA0, ++0x00,0x00,0xC4,0x90, ++0x15,0x41,0x00,0x08, ++0xFF,0x00,0x83,0x30, ++0x42,0xB0,0x06,0x3C, ++0x00,0x00,0xC3,0x90, ++0xEF,0xFF,0x02,0x24, ++0x03,0x00,0xC7,0x34, ++0x24,0x18,0x62,0x00, ++0x40,0x00,0x02,0x24, ++0x00,0x00,0xC3,0xA0, ++0x0C,0x00,0x04,0x24, ++0x00,0x00,0xE2,0xA0, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0x15,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x2A,0x1C,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0xCD,0xFF,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x50,0x39,0x44,0x94, ++0x2A,0x1C,0x40,0xA0, ++0x00,0xC0,0x84,0x24, ++0xC2,0x34,0x00,0x0C, ++0xFF,0xFF,0x84,0x30, ++0x40,0x41,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x15,0x5F,0x40,0xA0, ++0x40,0x41,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x9B,0x30,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x6B,0x41,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x30,0x26, ++0xB0,0x1B,0x07,0x96, ++0x18,0x00,0xBF,0xAF, ++0xFF,0xFF,0xE3,0x30, ++0x00,0x01,0x62,0x30, ++0x0E,0x00,0x40,0x10, ++0x01,0x00,0x66,0x30, ++0x02,0x80,0x04,0x3C, ++0x88,0x58,0x84,0x24, ++0x03,0x00,0x05,0x24, ++0x17,0x00,0xC0,0x14, ++0x04,0x00,0x62,0x30, ++0x02,0x00,0x40,0x10, ++0xFB,0xF6,0xE3,0x30, ++0xB0,0x1B,0x03,0xA6, ++0xA3,0x51,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x40,0xA0, ++0x21,0x20,0x00,0x00, ++0x12,0x0D,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x30,0x1F,0x23,0x26, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x20,0x00,0xBD,0x27, ++0x10,0x3E,0x60,0xAC, ++0xEC,0x38,0x60,0xAC, ++0x08,0x39,0x60,0xAC, ++0x08,0x00,0xE0,0x03, ++0x50,0x3E,0x60,0xAC, ++0x6C,0x4C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0xFE,0xFE,0x42,0x30, ++0xA3,0x51,0x00,0x0C, ++0xB0,0x1B,0x02,0xA6, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x40,0xA0, ++0x9D,0x41,0x00,0x08, ++0x21,0x20,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x01,0x00,0x83,0x90, ++0x02,0x80,0x02,0x3C, ++0x21,0x38,0x80,0x00, ++0xB0,0x5C,0x43,0xAC, ++0x01,0x00,0x84,0x90, ++0x00,0x00,0xE2,0x90, ++0x02,0x80,0x06,0x3C, ++0xFF,0x00,0x85,0x30, ++0x80,0x10,0x02,0x00, ++0x25,0x28,0xA2,0x00, ++0xE8,0xDD,0xC6,0x24, ++0xFF,0x00,0x84,0x30, ++0x00,0x80,0xA5,0x34, ++0x4E,0x23,0x00,0x0C, ++0x03,0x00,0xE7,0x24, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x03,0x3C, ++0x1C,0x00,0xBF,0xAF, ++0xE0,0x3A,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x43,0x30, ++0x00,0x01,0x42,0x30, ++0x04,0x00,0x40,0x10, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x06,0x00,0x60,0x14, ++0xE0,0xD7,0x84,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x07,0x92, ++0x07,0x00,0x02,0x26, ++0x21,0x20,0x00,0x02, ++0x80,0x38,0x07,0x00, ++0x00,0x80,0xE7,0x34, ++0x05,0x00,0x05,0x24, ++0x21,0x30,0x00,0x00, ++0x1E,0x51,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x30,0x1F,0x45,0x24, ++0x50,0x3E,0xA3,0x8C, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x60,0x14, ++0x21,0x80,0x80,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x4C,0x3E,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x45,0x00, ++0x44,0x3E,0x40,0xA0, ++0x00,0x00,0x84,0x8C, ++0x6D,0x1D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x06,0x8E, ++0x03,0x00,0x04,0x24, ++0x90,0x14,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x00,0x00,0x84,0x90, ++0x4F,0x0C,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x86,0x90, ++0x21,0x80,0x80,0x00, ++0x00,0x7F,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x08,0x0E,0x04,0x24, ++0x00,0x00,0x05,0x92, ++0x7F,0x7F,0x11,0x3C, ++0x00,0x0E,0x04,0x24, ++0x00,0x14,0x05,0x00, ++0x00,0x86,0x05,0x00, ++0x00,0x1A,0x05,0x00, ++0x25,0x80,0x02,0x02, ++0x25,0x80,0x03,0x02, ++0x25,0x80,0x05,0x02, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x7F,0x7F,0x25,0x36, ++0x7F,0x7F,0x25,0x36, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x04,0x0E,0x04,0x24, ++0x7F,0x7F,0x25,0x36, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x10,0x0E,0x04,0x24, ++0x7F,0x7F,0x25,0x36, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x14,0x0E,0x04,0x24, ++0x7F,0x7F,0x25,0x36, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x18,0x0E,0x04,0x24, ++0x7F,0x7F,0x25,0x36, ++0x21,0x30,0x00,0x02, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x1C,0x0E,0x04,0x24, ++0xA9,0x45,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x28,0x00,0xBF,0xAF, ++0x00,0x00,0x85,0x94, ++0x02,0x00,0x02,0x24, ++0x21,0x98,0x80,0x00, ++0x10,0x00,0xA0,0xA3, ++0x21,0x80,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x21,0x88,0x00,0x00, ++0x66,0x00,0xA2,0x10, ++0x10,0x00,0xB2,0x27, ++0x03,0x00,0xA2,0x28, ++0x26,0x00,0x40,0x14, ++0x01,0x00,0x02,0x24, ++0x03,0x00,0x02,0x24, ++0x75,0x00,0xA2,0x10, ++0x24,0x08,0x04,0x24, ++0x0C,0x09,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x04,0x08,0x04,0x24, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x02,0x00,0x64,0x96, ++0x02,0x00,0x02,0x24, ++0x35,0x00,0x82,0x10, ++0x03,0x00,0x82,0x28, ++0x4B,0x00,0x40,0x10, ++0x03,0x00,0x02,0x24, ++0x01,0x00,0x02,0x24, ++0x60,0x00,0x82,0x10, ++0x21,0x30,0x20,0x02, ++0x04,0x0C,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x21,0x30,0x20,0x02, ++0x04,0x0D,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x10,0x00,0xA6,0x93, ++0x04,0x0A,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x00,0xFF,0x05,0x3C, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xDE,0xFF,0xA2,0x14, ++0x0C,0x09,0x04,0x24, ++0x24,0x08,0x04,0x24, ++0x0E,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x2C,0x08,0x04,0x24, ++0x01,0x00,0x06,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0E,0x00,0x05,0x24, ++0x10,0x00,0xA2,0x93, ++0x80,0xFF,0x03,0x24, ++0x11,0x11,0x04,0x3C, ++0x0F,0x00,0x42,0x30, ++0x25,0x10,0x43,0x00, ++0x11,0x11,0x86,0x34, ++0x03,0x00,0x10,0x24, ++0x10,0x00,0xA2,0xA3, ++0x0C,0x09,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x04,0x08,0x04,0x24, ++0x21,0x30,0x00,0x02, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x02,0x00,0x64,0x96, ++0x02,0x00,0x02,0x24, ++0xCD,0xFF,0x82,0x14, ++0x03,0x00,0x82,0x28, ++0x00,0x00,0x42,0x92, ++0x02,0x00,0x11,0x24, ++0xF5,0x00,0x42,0x30, ++0x05,0x00,0x42,0x34, ++0x00,0x00,0x42,0xA2, ++0x21,0x30,0x20,0x02, ++0x04,0x0C,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x21,0x30,0x20,0x02, ++0x04,0x0D,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x05,0x24, ++0x10,0x00,0xA6,0x93, ++0x04,0x0A,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x00,0xFF,0x05,0x3C, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xB8,0xFF,0x82,0x14, ++0x21,0x30,0x20,0x02, ++0x00,0x00,0x42,0x92, ++0x03,0x00,0x11,0x24, ++0xF0,0x00,0x42,0x30, ++0x01,0x00,0x42,0x34, ++0xD4,0x42,0x00,0x08, ++0x00,0x00,0x42,0xA2, ++0x24,0x08,0x04,0x24, ++0x0E,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x02,0x00,0x06,0x24, ++0x2C,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0E,0x00,0x05,0x24, ++0x10,0x00,0xA2,0x93, ++0x22,0x22,0x03,0x3C, ++0x22,0x22,0x66,0x34, ++0x0F,0x00,0x42,0x30, ++0x40,0x00,0x42,0x34, ++0x03,0x00,0x10,0x24, ++0xC4,0x42,0x00,0x08, ++0x10,0x00,0xA2,0xA3, ++0x00,0x00,0x42,0x92, ++0x01,0x00,0x11,0x24, ++0xF0,0x00,0x42,0x30, ++0xD4,0x42,0x00,0x08, ++0x00,0x00,0x42,0xA2, ++0x0E,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x02,0x00,0x06,0x24, ++0x2C,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0E,0x00,0x05,0x24, ++0x10,0x00,0xA2,0x93, ++0xC0,0xFF,0x03,0x24, ++0x03,0x00,0x10,0x24, ++0x0F,0x00,0x42,0x30, ++0x25,0x10,0x43,0x00, ++0x32,0x03,0x03,0x3C, ++0x33,0x13,0x66,0x34, ++0x90,0x42,0x00,0x08, ++0x10,0x00,0xA2,0xA3, ++0x00,0x00,0x86,0x8C, ++0x00,0x0F,0x05,0x3C, ++0xA9,0x45,0x00,0x08, ++0x80,0x08,0x04,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x2F,0x55,0x00,0x0C, ++0xF0,0xD7,0x84,0x24, ++0x00,0x00,0x02,0x92, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0x21,0x00,0x40,0x10, ++0x21,0x30,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0x00,0x02,0x05,0x3C, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0x32,0x00,0x40,0x10, ++0x01,0x00,0x06,0x24, ++0x00,0x0A,0x04,0x24, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x40,0x05,0x3C, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x40,0x05,0x3C, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x0D,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x10,0x27,0x04,0x24, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x40,0x05,0x3C, ++0x3E,0x43,0x00,0x08, ++0x21,0x30,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x2F,0x55,0x00,0x0C, ++0x08,0xD8,0x84,0x24, ++0x00,0x00,0x02,0x92, ++0x0F,0x00,0x12,0x3C, ++0x0F,0x00,0x11,0x3C, ++0x00,0x08,0x04,0x24, ++0x00,0x01,0x05,0x3C, ++0x20,0x00,0x40,0x10, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x02,0x05,0x3C, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x08,0x04,0x24, ++0x01,0x00,0x04,0x92, ++0xE6,0x44,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x06,0x3C, ++0xFF,0xFF,0x45,0x36, ++0x00,0x40,0xC6,0x34, ++0x5F,0x47,0x00,0x0C, ++0x21,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x02,0x00,0x06,0x3C, ++0xFF,0xFF,0x45,0x36, ++0x1F,0x00,0xC6,0x34, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x02,0x05,0x3C, ++0x01,0x00,0x06,0x24, ++0xA9,0x45,0x00,0x0C, ++0x00,0x08,0x04,0x24, ++0x01,0x00,0x04,0x92, ++0xE6,0x44,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x06,0x3C, ++0xFF,0xFF,0x25,0x36, ++0x00,0x40,0xC6,0x34, ++0x5F,0x47,0x00,0x0C, ++0x21,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xFF,0xFF,0x25,0x36, ++0x21,0x20,0x00,0x00, ++0x5F,0x47,0x00,0x0C, ++0x03,0x00,0x06,0x3C, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x2F,0x55,0x00,0x0C, ++0x20,0xD8,0x84,0x24, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x40,0x10, ++0x00,0x0A,0x04,0x24, ++0x04,0x00,0x02,0x8E, ++0x00,0x08,0x04,0x24, ++0x04,0x00,0x42,0x2C, ++0x1C,0x00,0x40,0x14, ++0x00,0x01,0x05,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x04,0x00,0x02,0x8E, ++0x03,0x00,0x05,0x24, ++0x04,0x00,0x42,0x2C, ++0xF8,0xFF,0x40,0x10, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xCB,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0x00,0x01,0x05,0x3C, ++0x1B,0x00,0x40,0x10, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x40,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x00,0x30,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0xE4,0x43,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xEF,0x43,0x00,0x08, ++0x00,0x0D,0x04,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x04,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x2F,0x55,0x00,0x0C, ++0x40,0xD8,0x84,0x24, ++0x04,0x00,0x03,0x8E, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x62,0x2C, ++0x2C,0x00,0x40,0x14, ++0xFC,0xFF,0x62,0x24, ++0x18,0x00,0x42,0x2C, ++0x05,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x6C,0xD8,0x84,0x24, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x54,0x00,0x40,0x10, ++0x00,0x0D,0x04,0x24, ++0x00,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0x00,0x02,0x05,0x3C, ++0x63,0x00,0x40,0x10, ++0x00,0x08,0x04,0x24, ++0x00,0x0A,0x04,0x24, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x40,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x58,0xD8,0x84,0x24, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x21,0x00,0x40,0x10, ++0x00,0x0A,0x04,0x24, ++0x00,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0x00,0x01,0x05,0x3C, ++0x3A,0x00,0x40,0x10, ++0x00,0x08,0x04,0x24, ++0x00,0x0D,0x04,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x40,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x04,0x00,0x06,0x8E, ++0x00,0x0A,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0x00,0x30,0x05,0x24, ++0x00,0x0A,0x04,0x24, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0x01,0x00,0x06,0x24, ++0xA9,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x3F,0x44,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0A,0x04,0x24, ++0x08,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x24, ++0x66,0x44,0x00,0x08, ++0x01,0x00,0x06,0x24, ++0x00,0x10,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x20,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x40,0x05,0x3C, ++0x21,0x30,0x00,0x00, ++0xA9,0x45,0x00,0x0C, ++0x00,0x0D,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x10,0x27,0x04,0x24, ++0x72,0x44,0x00,0x08, ++0x00,0x0F,0x04,0x24, ++0x00,0x01,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x50,0x44,0x00,0x08, ++0x00,0x0D,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x2C,0x44,0x00,0x08, ++0x00,0x0A,0x04,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x25,0xB0,0x02,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x03,0x02,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x90,0x90, ++0x25,0xB0,0x02,0x3C, ++0xFF,0x00,0x63,0x30, ++0xFB,0x00,0x65,0x30, ++0x00,0x00,0x04,0x3A, ++0x04,0x00,0x63,0x34, ++0x0B,0x18,0xA4,0x00, ++0x03,0x02,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0x12,0x00,0x00,0x12, ++0x01,0x00,0x02,0x24, ++0x22,0x00,0x02,0x12, ++0x00,0x08,0x04,0x24, ++0x1A,0x00,0x00,0x12, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0x02,0x16, ++0x00,0x00,0x00,0x00, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x18,0x00,0x04,0x24, ++0x00,0x0C,0x05,0x24, ++0x21,0x30,0x00,0x00, ++0x5F,0x47,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x00,0x08,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x09,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x84,0x08,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x58,0x00,0x06,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x18,0x00,0x04,0x24, ++0x00,0x0C,0x05,0x24, ++0xAE,0x44,0x00,0x08, ++0x01,0x00,0x06,0x24, ++0x01,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x09,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x0A,0x04,0x24, ++0x10,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x0D,0x04,0x24, ++0x00,0x0C,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x84,0x08,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x18,0x00,0x06,0x24, ++0xA5,0x44,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x21,0x20,0x82,0x00, ++0x00,0x00,0x85,0xAC, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x05,0x3C, ++0x01,0x80,0x03,0x3C, ++0x21,0x38,0x80,0x00, ++0x18,0x03,0xA2,0x34, ++0x98,0x13,0x63,0x24, ++0x01,0x00,0x04,0x24, ++0x00,0x00,0x43,0xAC, ++0x35,0x00,0xE4,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x10, ++0x20,0x08,0xA2,0x34, ++0x02,0x00,0x02,0x24, ++0x83,0x00,0xE2,0x10, ++0x03,0x00,0x02,0x24, ++0x5A,0x00,0xE2,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x00,0x00,0x44,0x8C, ++0x30,0x1F,0x66,0x24, ++0x70,0x08,0x02,0x24, ++0xE0,0x08,0x03,0x24, ++0x34,0x1C,0xC2,0xAC, ++0x40,0x08,0x02,0x24, ++0x38,0x1C,0xC3,0xAC, ++0x44,0x1C,0xC2,0xAC, ++0x78,0x08,0x03,0x24, ++0x0C,0x08,0x02,0x24, ++0x48,0x1C,0xC3,0xAC, ++0x4C,0x1C,0xC2,0xAC, ++0x10,0x08,0x03,0x24, ++0x20,0x08,0x02,0x24, ++0x50,0x1C,0xC3,0xAC, ++0x54,0x1C,0xC2,0xAC, ++0x24,0x08,0x03,0x24, ++0x58,0x08,0x02,0x24, ++0x58,0x1C,0xC3,0xAC, ++0x5C,0x1C,0xC2,0xAC, ++0x50,0x0C,0x03,0x24, ++0x54,0x0C,0x02,0x24, ++0x60,0x1C,0xC3,0xAC, ++0x64,0x1C,0xC2,0xAC, ++0x14,0x0C,0x03,0x24, ++0x10,0x0C,0x02,0x24, ++0x60,0x08,0x05,0x24, ++0x68,0x1C,0xC3,0xAC, ++0x6C,0x1C,0xC2,0xAC, ++0x80,0x0C,0x03,0x24, ++0x84,0x0C,0x02,0x24, ++0x00,0x01,0x84,0x30, ++0x74,0x1C,0xC2,0xAC, ++0x40,0x1C,0xC5,0xAC, ++0x70,0x1C,0xC3,0xAC, ++0x31,0x1C,0xC0,0xA0, ++0x3C,0x1C,0xC5,0xAC, ++0x02,0x00,0x80,0x10, ++0xA0,0x08,0x02,0x24, ++0xB8,0x08,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x78,0x1C,0xC2,0xAC, ++0x28,0x08,0xA2,0x34, ++0x02,0x80,0x03,0x3C, ++0x00,0x00,0x44,0x8C, ++0x30,0x1F,0x66,0x24, ++0x70,0x08,0x02,0x24, ++0xE0,0x08,0x03,0x24, ++0x34,0x1C,0xC2,0xAC, ++0x44,0x08,0x02,0x24, ++0x38,0x1C,0xC3,0xAC, ++0x44,0x1C,0xC2,0xAC, ++0x78,0x08,0x03,0x24, ++0x0C,0x08,0x02,0x24, ++0x48,0x1C,0xC3,0xAC, ++0x4C,0x1C,0xC2,0xAC, ++0x14,0x08,0x03,0x24, ++0x28,0x08,0x02,0x24, ++0x50,0x1C,0xC3,0xAC, ++0x54,0x1C,0xC2,0xAC, ++0x2C,0x08,0x03,0x24, ++0x58,0x08,0x02,0x24, ++0x58,0x1C,0xC3,0xAC, ++0x5C,0x1C,0xC2,0xAC, ++0x58,0x0C,0x03,0x24, ++0x5C,0x0C,0x02,0x24, ++0x60,0x1C,0xC3,0xAC, ++0x64,0x1C,0xC2,0xAC, ++0x1C,0x0C,0x03,0x24, ++0x18,0x0C,0x02,0x24, ++0x64,0x08,0x05,0x24, ++0x68,0x1C,0xC3,0xAC, ++0x6C,0x1C,0xC2,0xAC, ++0x88,0x0C,0x03,0x24, ++0x8C,0x0C,0x02,0x24, ++0x00,0x01,0x84,0x30, ++0x74,0x1C,0xC2,0xAC, ++0x31,0x1C,0xC7,0xA0, ++0x40,0x1C,0xC5,0xAC, ++0x70,0x1C,0xC3,0xAC, ++0x3C,0x1C,0xC5,0xAC, ++0xD6,0xFF,0x80,0x10, ++0xA4,0x08,0x02,0x24, ++0xBC,0x08,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x78,0x1C,0xC2,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0xAC,0x08,0x03,0x24, ++0x78,0x1C,0x43,0xAC, ++0x74,0x08,0x03,0x24, ++0xE4,0x08,0x04,0x24, ++0x34,0x1C,0x43,0xAC, ++0x4C,0x08,0x03,0x24, ++0x38,0x1C,0x44,0xAC, ++0x44,0x1C,0x43,0xAC, ++0x7C,0x08,0x04,0x24, ++0x0C,0x08,0x03,0x24, ++0x48,0x1C,0x44,0xAC, ++0x4C,0x1C,0x43,0xAC, ++0x1C,0x08,0x04,0x24, ++0x38,0x08,0x03,0x24, ++0x50,0x1C,0x44,0xAC, ++0x54,0x1C,0x43,0xAC, ++0x3C,0x08,0x04,0x24, ++0x5C,0x08,0x03,0x24, ++0x58,0x1C,0x44,0xAC, ++0x5C,0x1C,0x43,0xAC, ++0x68,0x0C,0x04,0x24, ++0x6C,0x0C,0x03,0x24, ++0x60,0x1C,0x44,0xAC, ++0x64,0x1C,0x43,0xAC, ++0x2C,0x0C,0x04,0x24, ++0x28,0x0C,0x03,0x24, ++0x6C,0x08,0x05,0x24, ++0x68,0x1C,0x44,0xAC, ++0x6C,0x1C,0x43,0xAC, ++0x98,0x0C,0x04,0x24, ++0x9C,0x0C,0x03,0x24, ++0x31,0x1C,0x47,0xA0, ++0x40,0x1C,0x45,0xAC, ++0x70,0x1C,0x44,0xAC, ++0x74,0x1C,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x3C,0x1C,0x45,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0xA8,0x08,0x03,0x24, ++0x78,0x1C,0x43,0xAC, ++0x74,0x08,0x03,0x24, ++0xE4,0x08,0x04,0x24, ++0x34,0x1C,0x43,0xAC, ++0x48,0x08,0x03,0x24, ++0x38,0x1C,0x44,0xAC, ++0x44,0x1C,0x43,0xAC, ++0x7C,0x08,0x04,0x24, ++0x0C,0x08,0x03,0x24, ++0x48,0x1C,0x44,0xAC, ++0x4C,0x1C,0x43,0xAC, ++0x18,0x08,0x04,0x24, ++0x30,0x08,0x03,0x24, ++0x50,0x1C,0x44,0xAC, ++0x54,0x1C,0x43,0xAC, ++0x34,0x08,0x04,0x24, ++0x5C,0x08,0x03,0x24, ++0x58,0x1C,0x44,0xAC, ++0x5C,0x1C,0x43,0xAC, ++0x60,0x0C,0x04,0x24, ++0x64,0x0C,0x03,0x24, ++0x60,0x1C,0x44,0xAC, ++0x64,0x1C,0x43,0xAC, ++0x24,0x0C,0x04,0x24, ++0x20,0x0C,0x03,0x24, ++0x68,0x08,0x05,0x24, ++0x68,0x1C,0x44,0xAC, ++0x6C,0x1C,0x43,0xAC, ++0x90,0x0C,0x04,0x24, ++0x94,0x0C,0x03,0x24, ++0x31,0x1C,0x47,0xA0, ++0x40,0x1C,0x45,0xAC, ++0x70,0x1C,0x44,0xAC, ++0x74,0x1C,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x3C,0x1C,0x45,0xAC, ++0xA2,0x45,0x00,0x08, ++0x21,0x18,0x00,0x00, ++0x20,0x00,0x62,0x2C, ++0x06,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x06,0x10,0x64,0x00, ++0x01,0x00,0x42,0x30, ++0xFA,0xFF,0x40,0x10, ++0x01,0x00,0x63,0x24, ++0xFF,0xFF,0x63,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x25,0xB0,0x02,0x3C, ++0x21,0x88,0xA0,0x00, ++0xFF,0xFF,0x03,0x24, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x21,0x98,0xC0,0x00, ++0x21,0x28,0xC0,0x00, ++0x21,0x90,0x80,0x00, ++0x09,0x00,0x23,0x12, ++0x21,0x80,0x82,0x00, ++0x00,0x00,0x10,0x8E, ++0x9D,0x45,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x27,0x28,0x11,0x00, ++0x24,0x28,0xB0,0x00, ++0x04,0x10,0x53,0x00, ++0x25,0x28,0xA2,0x00, ++0x21,0x20,0x40,0x02, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xDB,0x44,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x21,0x30,0x80,0x00, ++0x74,0x3B,0x44,0x8C, ++0xA9,0x45,0x00,0x08, ++0xFF,0xFF,0x05,0x24, ++0xE0,0xFF,0xBD,0x27, ++0x25,0xB0,0x02,0x3C, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x20,0x82,0x00, ++0x00,0x00,0x90,0x8C, ++0x21,0x88,0xA0,0x00, ++0x9D,0x45,0x00,0x0C, ++0x21,0x20,0xA0,0x00, ++0x24,0x80,0x11,0x02, ++0x06,0x10,0x50,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x20,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x31,0x26, ++0x58,0x1C,0x23,0x8E, ++0x25,0xB0,0x02,0x3C, ++0x24,0x08,0x53,0x8C, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0x70,0x8C, ++0x7F,0x80,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xFF,0x7F,0x05,0x3C, ++0x24,0x80,0x02,0x02, ++0xC0,0x25,0x04,0x00, ++0xFF,0xFF,0xA5,0x34, ++0x24,0x28,0x65,0x02, ++0x25,0x80,0x04,0x02, ++0xDB,0x44,0x00,0x0C, ++0x24,0x08,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x00,0x80,0x12,0x3C, ++0x58,0x1C,0x24,0x8E, ++0x25,0x80,0x12,0x02, ++0xDB,0x44,0x00,0x0C, ++0x21,0x28,0x00,0x02, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x25,0x28,0x72,0x02, ++0xDB,0x44,0x00,0x0C, ++0x24,0x08,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x78,0x1C,0x24,0x8E, ++0x0F,0x00,0x05,0x3C, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xFF,0xFF,0xA5,0x34, ++0xCB,0x45,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x30,0x1F,0x27,0x26, ++0x33,0x1C,0xE5,0x90, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x2C,0x18,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x02,0x00,0x06,0x24, ++0x00,0x00,0x43,0xAC, ++0x34,0x00,0xA6,0x10, ++0x21,0x80,0x80,0x00, ++0x03,0x00,0x03,0x24, ++0x3A,0x00,0xA3,0x10, ++0x2E,0x00,0x02,0x2E, ++0x10,0x00,0x02,0x2E, ++0x07,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x04,0x32, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xDC,0x45,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0xFA,0xFF,0xA6,0x14, ++0xFF,0x00,0x04,0x32, ++0x31,0x1C,0xE4,0x90, ++0x01,0x00,0x02,0x24, ++0x33,0x00,0x82,0x10, ++0x02,0x00,0x82,0x28, ++0x38,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x38,0x00,0x85,0x10, ++0x30,0x1F,0x22,0x26, ++0x2E,0x00,0x83,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0xFF,0xFC,0x06,0x3C, ++0xFF,0xFF,0xC6,0x34, ++0x24,0x30,0x46,0x00, ++0x00,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x30,0x1F,0x22,0x26, ++0x31,0x1C,0x44,0x90, ++0x01,0x00,0x03,0x24, ++0x07,0x00,0x83,0x10, ++0x02,0x00,0x82,0x28, ++0x2C,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x2C,0x00,0x82,0x10, ++0x03,0x00,0x02,0x24, ++0xDB,0xFF,0x82,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x21,0x46,0x00,0x08, ++0xFF,0x00,0x04,0x32, ++0x25,0x00,0x82,0x2C, ++0xCC,0xFF,0x40,0x14, ++0x03,0x00,0x03,0x24, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xC7,0xFF,0x40,0x14, ++0x10,0x00,0x02,0x2E, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x06,0x24, ++0x33,0x46,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0xCC,0xFF,0x80,0x14, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x06,0x24, ++0x33,0x46,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0xB2,0xFF,0x80,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x21,0x46,0x00,0x08, ++0xFF,0x00,0x04,0x32, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x02,0x80,0x11,0x3C, ++0x30,0x1F,0x28,0x26, ++0x33,0x1C,0x06,0x91, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xD8,0x19,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x02,0x00,0x07,0x24, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x00,0x00,0x43,0xAC, ++0x21,0x90,0xA0,0x00, ++0x39,0x00,0xC7,0x10, ++0xFF,0x00,0x90,0x30, ++0x03,0x00,0x03,0x24, ++0x3F,0x00,0xC3,0x10, ++0x2E,0x00,0x02,0x2E, ++0x10,0x00,0x02,0x2E, ++0x0C,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x04,0x3C, ++0xFF,0xFF,0x84,0x34, ++0x24,0x20,0x44,0x02, ++0x00,0x15,0x10,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x25,0x20,0x44,0x00, ++0xC6,0x45,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0xF5,0xFF,0xC7,0x14, ++0x0F,0x00,0x04,0x3C, ++0x31,0x1C,0x04,0x91, ++0x01,0x00,0x02,0x24, ++0x33,0x00,0x82,0x10, ++0x02,0x00,0x82,0x28, ++0x38,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x38,0x00,0x86,0x10, ++0x30,0x1F,0x22,0x26, ++0x2E,0x00,0x83,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0xFF,0xFC,0x06,0x3C, ++0xFF,0xFF,0xC6,0x34, ++0x24,0x30,0x46,0x00, ++0x00,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x30,0x1F,0x22,0x26, ++0x31,0x1C,0x44,0x90, ++0x01,0x00,0x03,0x24, ++0x07,0x00,0x83,0x10, ++0x02,0x00,0x82,0x28, ++0x2C,0x00,0x40,0x14, ++0x02,0x00,0x02,0x24, ++0x2C,0x00,0x82,0x10, ++0x03,0x00,0x02,0x24, ++0xD6,0xFF,0x82,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x8E,0x46,0x00,0x08, ++0x0F,0x00,0x04,0x3C, ++0x25,0x00,0x02,0x2E, ++0xC7,0xFF,0x40,0x14, ++0x03,0x00,0x03,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xC1,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x06,0x24, ++0xA5,0x46,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0xCC,0xFF,0x80,0x14, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x0F,0x00,0x06,0x24, ++0xA5,0x46,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0xAD,0xFF,0x80,0x14, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x22,0x26, ++0x34,0x1C,0x44,0x8C, ++0x0F,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x8E,0x46,0x00,0x08, ++0x0F,0x00,0x04,0x3C, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x14,0x00,0xBF,0xAF, ++0xDC,0x45,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x40,0x01,0x44,0x34, ++0x21,0x18,0x40,0x00, ++0x1F,0x00,0x02,0x2E, ++0x00,0x23,0x04,0x00, ++0x10,0x00,0x40,0x10, ++0x10,0x00,0x05,0x2E, ++0x00,0x01,0x64,0x34, ++0x06,0x00,0xA0,0x10, ++0x00,0x23,0x04,0x00, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xC6,0x45,0x00,0x0C, ++0xF1,0xFF,0x10,0x26, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xC6,0x45,0x00,0x0C, ++0xE2,0xFF,0x10,0x26, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x25,0xB0,0x02,0x3C, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x20,0x82,0x00, ++0x00,0x00,0x90,0x8C, ++0x21,0x88,0xA0,0x00, ++0x9D,0x45,0x00,0x0C, ++0x21,0x20,0xA0,0x00, ++0x24,0x80,0x11,0x02, ++0x06,0x10,0x50,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x25,0xB0,0x02,0x3C, ++0x18,0x00,0xB2,0xAF, ++0x21,0x90,0x82,0x00, ++0xFF,0xFF,0x02,0x24, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x88,0xA0,0x00, ++0x21,0x20,0xA0,0x00, ++0x21,0x18,0x40,0x02, ++0x10,0x00,0xA2,0x10, ++0x21,0x98,0xC0,0x00, ++0x00,0x00,0x50,0x8E, ++0x9D,0x45,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x27,0x18,0x11,0x00, ++0x24,0x18,0x70,0x00, ++0x04,0x10,0x53,0x00, ++0x25,0x18,0x62,0x00, ++0x00,0x00,0x43,0xAE, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x28,0x00,0xBD,0x27, ++0x00,0x00,0x66,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x21,0x38,0x82,0x00, ++0xFF,0xFF,0x02,0x24, ++0x27,0x40,0x05,0x00, ++0x08,0x00,0xA2,0x10, ++0x24,0x18,0xC5,0x00, ++0x00,0x00,0xE2,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x02,0x01, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0xE2,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xE6,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x21,0x38,0xA0,0x00, ++0x25,0xB0,0x02,0x3C, ++0xFF,0xFF,0x03,0x24, ++0x27,0x48,0x05,0x00, ++0x24,0x40,0xC7,0x00, ++0x21,0x28,0xC0,0x00, ++0x05,0x00,0xE3,0x10, ++0x21,0x30,0x82,0x00, ++0x00,0x00,0xC5,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x28,0x25,0x01, ++0x25,0x28,0xA8,0x00, ++0xDB,0x44,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x03,0x3C, ++0xD8,0xFF,0xBD,0x27, ++0x7C,0x1D,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x62,0xAC, ++0x21,0x88,0xA0,0x00, ++0x21,0x98,0xC0,0x00, ++0x21,0xA0,0x80,0x00, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0F,0x00,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x0A,0x00,0x22,0x12, ++0x21,0x28,0xC0,0x00, ++0x0B,0x46,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x20,0x02, ++0x9D,0x45,0x00,0x0C, ++0x21,0x80,0x40,0x00, ++0x27,0x28,0x11,0x00, ++0x24,0x28,0xB0,0x00, ++0x04,0x10,0x53,0x00, ++0x25,0x28,0xA2,0x00, ++0x76,0x46,0x00,0x0C, ++0xFF,0x00,0x84,0x32, ++0x00,0x60,0x92,0x40, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x01,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x28,0x1E,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0xE0,0xFF,0xBD,0x27, ++0x00,0x00,0x43,0xAC, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x0B,0x46,0x00,0x0C, ++0x21,0x88,0xA0,0x00, ++0x21,0x80,0x40,0x00, ++0x9D,0x45,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x24,0x80,0x11,0x02, ++0x06,0x10,0x50,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x24,0x00,0xB5,0xAF, ++0xFF,0x00,0x84,0x30, ++0x21,0xA8,0xC0,0x00, ++0x28,0x00,0xB6,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x2C,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0xB0,0xA0,0x00, ++0xE6,0x44,0x00,0x0C, ++0x21,0x98,0x00,0x00, ++0x21,0x00,0xA0,0x16, ++0x80,0x10,0x13,0x00, ++0xDD,0x47,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xFD,0x00,0x02,0x24, ++0x23,0x00,0x02,0x12, ++0x05,0x00,0x04,0x24, ++0xFC,0x00,0x02,0x24, ++0x37,0x00,0x02,0x12, ++0x00,0x00,0x00,0x00, ++0xFB,0x00,0x02,0x24, ++0x30,0x00,0x02,0x12, ++0x32,0x00,0x04,0x24, ++0xFA,0x00,0x02,0x24, ++0x2D,0x00,0x02,0x12, ++0x05,0x00,0x04,0x24, ++0xF9,0x00,0x02,0x24, ++0x29,0x00,0x02,0x12, ++0x0F,0x00,0x05,0x3C, ++0x04,0x00,0xD1,0x8C, ++0xFF,0xFF,0xA5,0x34, ++0x21,0x20,0x00,0x02, ++0x5F,0x47,0x00,0x0C, ++0x21,0x30,0x20,0x02, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x19,0x00,0x02,0x24, ++0x28,0x00,0x02,0x12, ++0x21,0x90,0x00,0x00, ++0x02,0x00,0x62,0x26, ++0xFF,0x00,0x53,0x30, ++0x2B,0x18,0x75,0x02, ++0x0F,0x00,0x60,0x10, ++0x80,0x10,0x13,0x00, ++0x21,0x30,0x56,0x00, ++0x00,0x00,0xD0,0x8C, ++0xFF,0x00,0x02,0x24, ++0x0A,0x00,0x02,0x12, ++0xFE,0x00,0x02,0x24, ++0xDC,0xFF,0x02,0x16, ++0x32,0x00,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x62,0x26, ++0xFF,0x00,0x53,0x30, ++0x2B,0x18,0x75,0x02, ++0xF3,0xFF,0x60,0x14, ++0x80,0x10,0x13,0x00, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x01,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xCB,0x47,0x00,0x08, ++0x02,0x00,0x62,0x26, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0xD9,0x47,0x00,0x08, ++0x02,0x00,0x62,0x26, ++0x0F,0x00,0x14,0x3C, ++0x21,0x20,0x00,0x02, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x85,0x36, ++0x21,0x20,0x00,0x02, ++0xFF,0xFF,0x85,0x36, ++0xD2,0xFF,0x51,0x10, ++0x21,0x30,0x20,0x02, ++0x5F,0x47,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x25,0x22,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x01,0x00,0x42,0x26, ++0xFF,0x00,0x52,0x30, ++0x0A,0x00,0x43,0x2E, ++0xF2,0xFF,0x60,0x14, ++0x21,0x20,0x00,0x02, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xB8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x44,0x00,0xBF,0xAF, ++0x40,0x00,0xBE,0xAF, ++0x3C,0x00,0xB7,0xAF, ++0x38,0x00,0xB6,0xAF, ++0x34,0x00,0xB5,0xAF, ++0x30,0x00,0xB4,0xAF, ++0x2C,0x00,0xB3,0xAF, ++0x28,0x00,0xB2,0xAF, ++0x24,0x00,0xB1,0xAF, ++0x20,0x00,0xB0,0xAF, ++0x30,0x1F,0x57,0x24, ++0x64,0x37,0xE3,0x96, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x05,0x3C, ++0x25,0xA0,0x62,0x00, ++0xF0,0xDD,0xA5,0x24, ++0x24,0x00,0x84,0x26, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x02,0x3C, ++0x20,0x00,0x80,0xA6, ++0x10,0x52,0x00,0x0C, ++0x84,0x58,0x56,0x24, ++0x02,0x80,0x05,0x3C, ++0x18,0x3B,0xA5,0x24, ++0x2A,0x00,0x84,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x88,0x58,0xA5,0x24, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0x30,0x00,0x84,0x26, ++0x20,0x00,0x83,0x96, ++0x74,0x00,0xD0,0x26, ++0x21,0x20,0x00,0x02, ++0x03,0xFF,0x63,0x30, ++0x80,0x00,0x63,0x34, ++0x20,0x00,0x83,0xA6, ++0x20,0x00,0x1E,0x24, ++0x40,0x00,0x93,0x26, ++0x17,0x4F,0x00,0x0C, ++0x1C,0x00,0xBE,0xAF, ++0x21,0x28,0x40,0x00, ++0x21,0x20,0x60,0x02, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x1C,0x00,0xA2,0x8F, ++0x21,0x20,0x00,0x02, ++0x42,0x00,0x93,0x26, ++0x02,0x00,0x42,0x24, ++0x32,0x4F,0x00,0x0C, ++0x1C,0x00,0xA2,0xAF, ++0x21,0x28,0x40,0x00, ++0x21,0x20,0x60,0x02, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x1C,0x00,0xA2,0x8F, ++0x0C,0x00,0xC6,0x8E, ++0x1C,0x00,0xB0,0x27, ++0x21,0x28,0x00,0x00, ++0x10,0x00,0xC7,0x26, ++0x02,0x00,0x42,0x24, ++0x44,0x00,0x84,0x26, ++0x60,0x00,0xD1,0x26, ++0x1C,0x00,0xA2,0xAF, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x21,0x20,0x20,0x02, ++0x37,0x50,0x00,0x0C, ++0x21,0x98,0x40,0x00, ++0x09,0x00,0x52,0x2C, ++0x08,0x00,0x06,0x24, ++0x21,0x20,0x60,0x02, ++0x0B,0x30,0x52,0x00, ++0x21,0x38,0x20,0x02, ++0x01,0x00,0x05,0x24, ++0x21,0xA8,0x40,0x00, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x21,0x20,0x40,0x00, ++0x03,0x00,0x05,0x24, ++0x01,0x00,0x06,0x24, ++0x48,0x00,0xC7,0x26, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x21,0x20,0x40,0x00, ++0x06,0x00,0x05,0x24, ++0x02,0x00,0x06,0x24, ++0x18,0x00,0xA7,0x27, ++0x18,0x00,0xA0,0xA7, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x18,0x00,0xA5,0x97, ++0x02,0x80,0x04,0x3C, ++0x68,0xDF,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x21,0x98,0x40,0x00, ++0x13,0x00,0x40,0x12, ++0x21,0x20,0x60,0x02, ++0x1C,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x42,0x24, ++0x01,0x01,0x42,0x2C, ++0x18,0x00,0x40,0x14, ++0x21,0x20,0x80,0x02, ++0x44,0x00,0xBF,0x8F, ++0x40,0x00,0xBE,0x8F, ++0x3C,0x00,0xB7,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0xF8,0xFF,0xA6,0x26, ++0x68,0x00,0xC7,0x26, ++0x32,0x00,0x05,0x24, ++0x41,0x4F,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x42,0x24, ++0x01,0x01,0x42,0x2C, ++0xEA,0xFF,0x40,0x10, ++0x21,0x20,0x80,0x02, ++0x21,0x28,0x00,0x00, ++0x08,0x52,0x00,0x0C, ++0x08,0x00,0x06,0x24, ++0x08,0x00,0x84,0x8E, ++0x04,0x00,0x85,0x8E, ++0xFF,0xDF,0x02,0x3C, ++0x10,0x00,0x86,0x8E, ++0x14,0x00,0x87,0x8E, ++0xFF,0xFF,0x42,0x34, ++0x1C,0x00,0xA8,0x8F, ++0x24,0x20,0x82,0x00, ++0x00,0x40,0x03,0x3C, ++0xFF,0xE0,0x02,0x24, ++0x24,0x28,0xA2,0x00, ++0x25,0x20,0x83,0x00, ++0x00,0x80,0x02,0x3C, ++0xFF,0x81,0x03,0x24, ++0x24,0x38,0xE3,0x00, ++0x25,0x30,0xC2,0x00, ++0x00,0x10,0xA5,0x34, ++0x80,0x00,0x84,0x34, ++0x08,0x00,0x84,0xAE, ++0x00,0x00,0x88,0xA6, ++0x02,0x00,0x9E,0xA2, ++0x14,0x00,0x87,0xAE, ++0x04,0x00,0x85,0xAE, ++0x10,0x00,0x86,0xAE, ++0xF8,0x36,0xE6,0x8E, ++0x64,0x37,0xE5,0x8E, ++0x01,0x00,0x04,0x24, ++0x00,0x01,0x07,0x24, ++0x01,0x00,0x02,0x24, ++0x73,0x01,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0xB0,0x01,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x44,0x00,0xBF,0x8F, ++0x40,0x00,0xBE,0x8F, ++0x3C,0x00,0xB7,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x24,0x00,0x04,0x24, ++0x21,0x30,0x40,0x00, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0x21,0x20,0xC0,0x00, ++0x13,0x00,0xC0,0x10, ++0x48,0xEA,0xA5,0x24, ++0x04,0x00,0x02,0x24, ++0x09,0x00,0x03,0x24, ++0x0C,0x00,0xC2,0xAC, ++0x14,0x00,0xC3,0xAC, ++0x08,0x00,0xC5,0x94, ++0xA4,0x3B,0x03,0x8E, ++0x02,0x80,0x02,0x3C, ++0x25,0x28,0xA2,0x00, ++0x30,0x09,0x00,0x0C, ++0x20,0x00,0xA3,0xAC, ++0xA8,0x3B,0x06,0x8E, ++0xA4,0x3B,0x05,0x8E, ++0x02,0x80,0x04,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x80,0xDF,0x84,0x24, ++0x2F,0x55,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x74,0xDF,0x84,0x24, ++0x2F,0x55,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x02,0x00,0x82,0x90, ++0x02,0x80,0x12,0x3C, ++0x30,0x1F,0x51,0x26, ++0xB0,0x1B,0x25,0x96, ++0x0F,0x00,0x42,0x30, ++0xC0,0x10,0x02,0x00, ++0x21,0x80,0x44,0x00, ++0x00,0x01,0xA3,0x30, ++0x04,0x00,0x60,0x10, ++0x18,0x00,0x04,0x26, ++0x00,0x10,0xA2,0x30, ++0x0B,0x00,0x40,0x10, ++0x04,0x00,0xA2,0x30, ++0x21,0x18,0x00,0x00, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xF5,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x55,0x50,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x18,0x3B,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xED,0xFF,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x88,0x58,0x53,0x24, ++0x22,0x00,0x14,0x26, ++0x21,0x20,0x80,0x02, ++0x21,0x28,0x60,0x02, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xE4,0xFF,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x28,0x00,0x04,0x26, ++0x21,0x28,0x60,0x02, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xDE,0xFF,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xE8,0xDF,0x84,0x24, ++0xB0,0x1B,0x24,0x96, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x83,0x30, ++0x01,0x00,0x62,0x30, ++0x08,0x00,0x40,0x10, ++0x00,0x20,0x62,0x30, ++0x15,0x00,0x40,0x10, ++0xFF,0xDE,0x82,0x30, ++0xFE,0xFF,0x04,0x24, ++0xB0,0x1B,0x22,0xA6, ++0xD0,0x38,0x20,0xAE, ++0x48,0x0E,0x00,0x0C, ++0xB4,0x38,0x20,0xAE, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0x50,0x26, ++0x4C,0x00,0x42,0x34, ++0x00,0x00,0x40,0xA0, ++0x21,0x20,0x00,0x00, ++0x21,0x28,0x00,0x00, ++0x12,0x0D,0x00,0x0C, ++0xA1,0x3B,0x00,0xA2, ++0x10,0x3E,0x00,0xAE, ++0xEC,0x38,0x00,0xAE, ++0x08,0x39,0x00,0xAE, ++0xA3,0x51,0x00,0x0C, ++0x50,0x3E,0x00,0xAE, ++0xFA,0x48,0x00,0x08, ++0x21,0x18,0x00,0x00, ++0x76,0x0E,0x00,0x0C, ++0x21,0x20,0x80,0x02, ++0xBB,0xFF,0x40,0x14, ++0xFF,0xFF,0x03,0x24, ++0xB0,0x1B,0x22,0x96, ++0x00,0x00,0x00,0x00, ++0xFF,0xFE,0x42,0x30, ++0x2D,0x49,0x00,0x08, ++0xB0,0x1B,0x22,0xA6, ++0xD0,0xFF,0xBD,0x27, ++0x20,0x00,0xB4,0xAF, ++0x02,0x80,0x14,0x3C, ++0x14,0x00,0xB1,0xAF, ++0x28,0x00,0xBF,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x91,0x26, ++0xB0,0x1B,0x23,0x96, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x62,0x30, ++0x3A,0x00,0x40,0x14, ++0x00,0x01,0x62,0x30, ++0x2E,0x00,0x40,0x10, ++0x00,0x10,0x62,0x30, ++0x29,0x00,0x40,0x14, ++0x01,0x00,0x62,0x30, ++0x1D,0x00,0x40,0x14, ++0x04,0x00,0x62,0x30, ++0x25,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x21,0x90,0x20,0x02, ++0x2B,0x3D,0x55,0x24, ++0x01,0x00,0x13,0x24, ++0xF0,0x00,0x10,0x24, ++0x65,0x49,0x00,0x08, ++0x19,0x00,0x11,0x24, ++0xFF,0xFF,0x31,0x26, ++0x1C,0x00,0x20,0x06, ++0x28,0x00,0x10,0x26, ++0x21,0x18,0x12,0x02, ++0xFA,0x1D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xF9,0xFF,0x53,0x14, ++0x00,0x00,0x00,0x00, ++0x0C,0x1E,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x33,0x00,0x40,0x10, ++0x21,0x20,0x15,0x02, ++0x00,0x60,0x02,0x40, ++0x01,0x00,0x41,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0C,0x1E,0x60,0xAC, ++0x00,0x60,0x82,0x40, ++0x63,0x49,0x00,0x08, ++0xFF,0xFF,0x31,0x26, ++0xD4,0x1E,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x2F,0x00,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x00,0x60,0x02,0x40, ++0x01,0x00,0x41,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0xD4,0x1E,0x20,0xAE, ++0x00,0x60,0x82,0x40, ++0x53,0x1E,0x00,0x0C, ++0x30,0x1F,0x90,0x26, ++0xEC,0x38,0x02,0xAE, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xF8,0xDF,0x84,0x24, ++0xB0,0x1B,0x22,0x96, ++0xEC,0x38,0x20,0xAE, ++0xFD,0xFF,0x04,0x24, ++0xEF,0xDF,0x42,0x30, ++0x48,0x0E,0x00,0x0C, ++0xB0,0x1B,0x22,0xA6, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x8E,0x3E,0x42,0x92, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x42,0x24, ++0x8E,0x3E,0x42,0xA2, ++0x76,0x0E,0x00,0x0C, ++0xFA,0x1D,0x60,0xA0, ++0x63,0x49,0x00,0x08, ++0xFF,0xFF,0x31,0x26, ++0x2F,0x55,0x00,0x0C, ++0x18,0xE0,0x84,0x24, ++0xB0,0x1B,0x23,0x96, ++0x25,0xB0,0x02,0x3C, ++0x4C,0x00,0x42,0x34, ++0xFE,0xFE,0x63,0x30, ++0xB0,0x1B,0x23,0xA6, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0x40,0xA0, ++0x21,0x28,0x00,0x00, ++0xA1,0x3B,0x20,0xA2, ++0x12,0x0D,0x00,0x0C, ++0xC2,0x1E,0x20,0xA2, ++0x02,0x80,0x04,0x3C, ++0x76,0x0E,0x00,0x0C, ++0x88,0x58,0x84,0x24, ++0x83,0x49,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xA8,0xFF,0xBD,0x27, ++0x48,0x00,0xB6,0xAF, ++0x3C,0x00,0xB3,0xAF, ++0x38,0x00,0xB2,0xAF, ++0x30,0x00,0xB0,0xAF, ++0x54,0x00,0xBF,0xAF, ++0x50,0x00,0xBE,0xAF, ++0x4C,0x00,0xB7,0xAF, ++0x44,0x00,0xB5,0xAF, ++0x40,0x00,0xB4,0xAF, ++0x34,0x00,0xB1,0xAF, ++0x02,0x00,0x82,0x90, ++0x00,0x00,0x83,0x8C, ++0x21,0xB0,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0xC0,0x10,0x02,0x00, ++0x21,0x80,0x44,0x00, ++0x18,0x00,0x12,0x26, ++0x21,0x20,0x40,0x02, ++0x55,0x50,0x00,0x0C, ++0xFF,0x3F,0x73,0x30, ++0x02,0x80,0x04,0x3C, ++0x18,0x3B,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x0B,0x00,0x40,0x14, ++0x02,0x80,0x15,0x3C, ++0x30,0x1F,0xB1,0x26, ++0xB0,0x1B,0x23,0x96, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x62,0x30, ++0x05,0x00,0x40,0x10, ++0x00,0x10,0x62,0x30, ++0x03,0x00,0x40,0x14, ++0x00,0x01,0x62,0x30, ++0x0E,0x00,0x40,0x10, ++0x20,0x00,0xB4,0x27, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0x32,0x00,0x05,0x26, ++0x21,0x20,0x80,0x02, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x20,0x00,0xA5,0x97, ++0x00,0x00,0x00,0x00, ++0xC2,0x00,0xA0,0x14, ++0x02,0x80,0x04,0x3C, ++0x21,0x20,0x80,0x02, ++0x34,0x00,0x05,0x26, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x20,0x00,0xA2,0x97, ++0x21,0x20,0x80,0x02, ++0x30,0x00,0x05,0x26, ++0xFF,0x3F,0x42,0x30, ++0x02,0x00,0x06,0x24, ++0x50,0x39,0x22,0xA6, ++0x10,0x52,0x00,0x0C, ++0x28,0x00,0xA2,0xAF, ++0x20,0x00,0xA3,0x97, ++0x21,0x40,0x20,0x02, ++0x00,0x04,0x63,0x30, ++0x02,0x00,0x60,0x14, ++0x09,0x00,0x02,0x24, ++0x14,0x00,0x02,0x24, ++0x1E,0x00,0x5E,0x26, ++0xE2,0xFF,0x74,0x26, ++0x21,0x20,0xC0,0x03, ++0x01,0x00,0x05,0x24, ++0x24,0x00,0xA6,0x27, ++0x21,0x38,0x80,0x02, ++0x55,0x1D,0x00,0x0C, ++0x0C,0x3E,0x02,0xA1, ++0xA8,0x00,0x40,0x10, ++0x02,0x00,0x45,0x24, ++0x24,0x00,0xA6,0x8F, ++0x10,0x52,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0x21,0x20,0xC0,0x03, ++0x32,0x00,0x05,0x24, ++0x24,0x00,0xA6,0x27, ++0x24,0x00,0xB7,0x8F, ++0x55,0x1D,0x00,0x0C, ++0x21,0x38,0x80,0x02, ++0x08,0x00,0x40,0x10, ++0x10,0x00,0xA4,0x27, ++0x24,0x00,0xA6,0x8F, ++0x21,0x20,0x97,0x00, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x45,0x24, ++0x24,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0xB8,0xE3,0x02, ++0x02,0x80,0x02,0x3C, ++0xEA,0x5D,0x44,0x90, ++0x02,0x00,0x03,0x24, ++0xE5,0x00,0x83,0x10, ++0x21,0x20,0xC0,0x03, ++0x30,0x1F,0xA4,0x26, ++0x10,0x3E,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x22,0x00,0x40,0x10, ++0x30,0x1F,0xB1,0x26, ++0x02,0x80,0x02,0x3C, ++0xE6,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x1D,0x00,0x60,0x14, ++0x23,0x10,0xD2,0x03, ++0x2B,0x10,0x53,0x00, ++0x1A,0x00,0x40,0x10, ++0x21,0x80,0xC0,0x03, ++0x02,0x80,0x11,0x3C, ++0x21,0x20,0x00,0x02, ++0xDD,0x00,0x05,0x24, ++0x24,0x00,0xA6,0x27, ++0x55,0x1D,0x00,0x0C, ++0x21,0x38,0x80,0x02, ++0x21,0x80,0x40,0x00, ++0x02,0x00,0x44,0x24, ++0xC8,0xDD,0x25,0x26, ++0x0E,0x01,0x40,0x10, ++0x06,0x00,0x06,0x24, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x10,0x01,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x24,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x02,0x02, ++0x02,0x00,0x70,0x24, ++0x23,0x20,0x12,0x02, ++0x03,0x01,0x40,0x10, ++0x2B,0x20,0x93,0x00, ++0xEB,0xFF,0x80,0x14, ++0x21,0x20,0x00,0x02, ++0x30,0x1F,0xB1,0x26, ++0x50,0x3E,0x22,0x8E, ++0x00,0x00,0x00,0x00, ++0x6A,0x00,0x40,0x14, ++0x24,0x00,0xA6,0x27, ++0x53,0x1E,0x00,0x0C, ++0x30,0x1F,0xB2,0x26, ++0x25,0xB0,0x14,0x3C, ++0xB0,0x1B,0x45,0x96, ++0x02,0x00,0x03,0x24, ++0x4C,0x00,0x84,0x36, ++0x00,0x00,0x83,0xA0, ++0xEC,0x38,0x42,0xAE, ++0x02,0x00,0x02,0x3C, ++0x00,0x01,0xA5,0x34, ++0x20,0xBF,0x42,0x34, ++0x08,0x39,0x42,0xAE, ++0x21,0x0E,0x00,0x0C, ++0xB0,0x1B,0x45,0xA6, ++0x10,0x00,0xA4,0x27, ++0x7D,0x50,0x00,0x0C, ++0x21,0x28,0xE0,0x02, ++0x0F,0x00,0x50,0x30, ++0x10,0x00,0xA4,0x27, ++0x96,0x50,0x00,0x0C, ++0x21,0x28,0xE0,0x02, ++0x40,0x02,0x13,0x36, ++0x02,0x80,0x04,0x3C, ++0x21,0x88,0x40,0x00, ++0x21,0x30,0x40,0x00, ++0x21,0x28,0x60,0x02, ++0x2F,0x55,0x00,0x0C, ++0x6C,0xE0,0x84,0x24, ++0x21,0x20,0x60,0x02, ++0xC1,0x5B,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x21,0x28,0xE0,0x02, ++0xC2,0x50,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0x21,0x88,0x40,0x00, ++0x50,0x3E,0x42,0x8E, ++0x00,0x00,0x00,0x00, ++0x16,0x00,0x40,0x10, ++0x50,0x00,0x13,0x36, ++0x5B,0x3E,0x42,0x92, ++0x5C,0x3E,0x43,0x92, ++0x0A,0x3E,0x44,0x92, ++0x00,0x13,0x02,0x00, ++0x00,0x1D,0x03,0x00, ++0x25,0x10,0x43,0x00, ++0x04,0x00,0x03,0x24, ++0xA0,0x00,0x83,0x10, ++0x25,0x88,0x22,0x02, ++0x54,0x3E,0x43,0x8E, ++0x00,0x00,0x00,0x00, ++0x07,0x00,0x60,0x14, ++0x01,0x00,0x02,0x24, ++0x58,0x3E,0x42,0x96, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0x42,0x30, ++0xA1,0x00,0x40,0x14, ++0x00,0x10,0x02,0x3C, ++0x01,0x00,0x02,0x24, ++0x98,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x80,0xE0,0x84,0x24, ++0x21,0x28,0x60,0x02, ++0x21,0x38,0xC0,0x02, ++0x2F,0x55,0x00,0x0C, ++0x21,0x30,0x20,0x02, ++0x21,0x20,0x60,0x02, ++0xC1,0x5B,0x00,0x0C, ++0x21,0x28,0x20,0x02, ++0x30,0x1F,0xA2,0x26, ++0xB0,0x1B,0x43,0x94, ++0x0A,0x3E,0x44,0x90, ++0xB4,0x38,0x40,0xAC, ++0xFF,0xDF,0x63,0x30, ++0xB0,0x1B,0x43,0xA4, ++0x04,0x00,0x03,0x24, ++0xD0,0x38,0x40,0xAC, ++0x94,0x3E,0x40,0xAC, ++0x06,0x00,0x83,0x10, ++0x98,0x3E,0x40,0xAC, ++0x28,0x00,0xA4,0x8F, ++0x48,0x0E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xE2,0x49,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x06,0x3C, ++0x64,0x03,0xC6,0x34, ++0x30,0x1F,0xA4,0x8E, ++0x00,0x00,0xC5,0x90, ++0x0F,0xFF,0x02,0x24, ++0xFD,0xFF,0x03,0x24, ++0x24,0x20,0x82,0x00, ++0x24,0x28,0xA3,0x00, ++0x30,0x1F,0xA4,0xAE, ++0x00,0x00,0xC5,0xA0, ++0x28,0x00,0xA4,0x8F, ++0x48,0x0E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xE2,0x49,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x2F,0x55,0x00,0x0C, ++0x50,0xE0,0x84,0x24, ++0xFF,0xFF,0x02,0x24, ++0x99,0x4A,0x00,0x08, ++0x28,0x00,0xA2,0xAF, ++0x21,0x20,0xC0,0x03, ++0x2D,0x00,0x05,0x24, ++0x55,0x1D,0x00,0x0C, ++0x21,0x38,0x80,0x02, ++0x91,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x24,0x00,0xAB,0x8F, ++0x00,0x00,0x00,0x00, ++0x1F,0x00,0x60,0x19, ++0x21,0x40,0x00,0x00, ++0x02,0x00,0x49,0x24, ++0x21,0x50,0x20,0x02, ++0x02,0x00,0x0C,0x24, ++0xD5,0x4A,0x00,0x08, ++0x21,0x68,0x20,0x01, ++0x58,0x3E,0x82,0x90, ++0x00,0x00,0x23,0x91, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x43,0x00, ++0x58,0x3E,0x82,0xA0, ++0x01,0x00,0x08,0x25, ++0x2A,0x10,0x0B,0x01, ++0x11,0x00,0x40,0x10, ++0x01,0x00,0x29,0x25, ++0xF6,0xFF,0x0C,0x15, ++0x21,0x20,0x0A,0x01, ++0x5A,0x3E,0x43,0x91, ++0x00,0x00,0x25,0x91, ++0x02,0x00,0xA2,0x91, ++0x1C,0x00,0x64,0x30, ++0x1C,0x00,0xA5,0x30, ++0x03,0x00,0x42,0x30, ++0x03,0x00,0x63,0x30, ++0x2A,0x30,0x43,0x00, ++0x2A,0x38,0xA4,0x00, ++0x0A,0x10,0x66,0x00, ++0x0A,0x20,0xA7,0x00, ++0x25,0x10,0x44,0x00, ++0xD1,0x4A,0x00,0x08, ++0x5A,0x3E,0x42,0xA1, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x43,0x90, ++0x02,0x80,0x02,0x3C, ++0x3C,0xE3,0x47,0x24, ++0x10,0x00,0x65,0x30, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x4C,0xE3,0x66,0x24, ++0x30,0x1F,0x44,0x24, ++0xF8,0x4A,0x00,0x08, ++0x21,0x40,0x00,0x00, ++0x00,0x00,0x43,0x90, ++0x5B,0x3E,0x82,0x90, ++0x01,0x00,0x08,0x25, ++0x24,0x10,0x43,0x00, ++0x5B,0x3E,0x82,0xA0, ++0x10,0x00,0x02,0x29, ++0x07,0x00,0x40,0x10, ++0x01,0x00,0x84,0x24, ++0x21,0x10,0x07,0x01, ++0xF6,0xFF,0xA0,0x14, ++0x21,0x18,0x06,0x01, ++0x00,0x00,0x63,0x90, ++0xF1,0x4A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0xC0,0x03, ++0x21,0x38,0x80,0x02, ++0x3D,0x00,0x05,0x24, ++0x55,0x1D,0x00,0x0C, ++0x24,0x00,0xA6,0x27, ++0x48,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x24,0x00,0xA6,0x8F, ++0x02,0x80,0x04,0x3C, ++0xA8,0x5D,0x84,0x24, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x45,0x24, ++0x90,0x0D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x54,0x4A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x2A,0x00,0x05,0x24, ++0x24,0x00,0xA6,0x27, ++0x55,0x1D,0x00,0x0C, ++0x21,0x38,0x80,0x02, ++0x30,0x00,0x40,0x10, ++0x30,0x1F,0xA5,0x26, ++0x02,0x00,0x42,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0x2B,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x44,0x90, ++0x01,0x00,0x03,0x24, ++0x3E,0x00,0x83,0x10, ++0x30,0x1F,0xA2,0x26, ++0x10,0x23,0x43,0x8C, ++0xFF,0xEF,0x04,0x24, ++0x00,0x08,0x63,0x34, ++0x24,0x18,0x64,0x00, ++0x2A,0x4A,0x00,0x08, ++0x10,0x23,0x43,0xAC, ++0xF6,0x01,0x82,0x36, ++0x00,0x00,0x40,0xA4, ++0x91,0x4A,0x00,0x08, ++0x02,0x80,0x04,0x3C, ++0x58,0x3E,0x42,0x96, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x30, ++0x66,0xFF,0x40,0x10, ++0x02,0x80,0x04,0x3C, ++0x00,0x10,0x02,0x3C, ++0x25,0x88,0x22,0x02, ++0x0F,0x00,0x08,0x24, ++0x01,0x00,0x03,0x24, ++0x0C,0x00,0x02,0x25, ++0x04,0x10,0x43,0x00, ++0x24,0x10,0x51,0x00, ++0x16,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x08,0x25, ++0xFA,0xFF,0x01,0x05, ++0x0C,0x00,0x02,0x25, ++0x00,0x12,0x16,0x00, ++0x00,0x1B,0x16,0x00, ++0x25,0x18,0x62,0x00, ++0x00,0x21,0x16,0x00, ++0x25,0x18,0x64,0x00, ++0x25,0xB0,0x02,0x3C, ++0x25,0x18,0x76,0x00, ++0xF6,0x01,0x42,0x34, ++0x00,0x00,0x43,0xA4, ++0x91,0x4A,0x00,0x08, ++0x02,0x80,0x04,0x3C, ++0x10,0x23,0xA2,0x8C, ++0xFF,0xF7,0x03,0x24, ++0xFF,0xEF,0x04,0x24, ++0x24,0x10,0x43,0x00, ++0x24,0x10,0x44,0x00, ++0x2A,0x4A,0x00,0x08, ++0x10,0x23,0xA2,0xAC, ++0x38,0x4B,0x00,0x08, ++0xFF,0x00,0x16,0x31, ++0x30,0x1F,0xA2,0x26, ++0x54,0x4A,0x00,0x08, ++0x50,0x3E,0x40,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x4F,0x4A,0x00,0x08, ++0x10,0x3E,0x40,0xAC, ++0x54,0x4A,0x00,0x08, ++0x50,0x3E,0x20,0xAE, ++0x21,0x20,0x00,0x02, ++0x78,0x0F,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x50,0x4A,0x00,0x08, ++0x30,0x1F,0xB1,0x26, ++0x10,0x23,0x43,0x8C, ++0xFF,0xF7,0x04,0x24, ++0x24,0x18,0x64,0x00, ++0x00,0x10,0x63,0x34, ++0x2A,0x4A,0x00,0x08, ++0x10,0x23,0x43,0xAC, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x02,0x00,0x82,0x90, ++0x02,0x80,0x03,0x3C, ++0xE0,0x3A,0x65,0x94, ++0x0F,0x00,0x42,0x30, ++0x00,0x00,0x83,0x8C, ++0xC0,0x10,0x02,0x00, ++0x21,0x20,0x44,0x00, ++0x00,0x10,0xA8,0x30, ++0x02,0x80,0x02,0x3C, ++0x00,0x08,0xA5,0x30, ++0x84,0x58,0x51,0x24, ++0xFF,0x3F,0x63,0x30, ++0x06,0x00,0xA0,0x10, ++0x18,0x00,0x90,0x24, ++0xE8,0xFF,0x67,0x24, ++0x30,0x00,0x84,0x24, ++0x21,0x28,0x00,0x00, ++0x07,0x00,0x00,0x11, ++0x10,0x00,0xA6,0x27, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x55,0x1D,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF7,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x44,0x24, ++0x10,0x00,0xA2,0x8F, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x40,0x10, ++0x10,0x00,0x25,0x26, ++0x0C,0x00,0x26,0x8E, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xED,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x42,0x50,0x00,0x0C, ++0x21,0x20,0x00,0x02, ++0x01,0x10,0x00,0x0C, ++0x21,0x20,0x40,0x00, ++0x77,0x4B,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0xE5,0x48,0x00,0x0C, ++0xFE,0xFF,0x05,0x24, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0xE5,0x48,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x10,0x00,0xBF,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x01,0x80,0x02,0x3C, ++0xB0,0x03,0x65,0x34, ++0x8C,0x2E,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x00,0x00,0x62,0xAC, ++0x00,0x00,0xA4,0xAC, ++0x00,0x00,0x83,0x8C, ++0x21,0x10,0x00,0x00, ++0xFF,0x3F,0x63,0x30, ++0x00,0x00,0xA3,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x30,0x1F,0x50,0x24, ++0x70,0x3D,0x03,0x8E, ++0xFE,0xFF,0x04,0x24, ++0x01,0x00,0x63,0x24, ++0x05,0x00,0x62,0x2C, ++0x12,0x00,0x40,0x10, ++0x70,0x3D,0x03,0xAE, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x30, ++0x05,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xA5,0x12,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xC8,0x00,0x03,0x24, ++0xD0,0x38,0x03,0xAE, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0xFF,0xDF,0x42,0x30, ++0x48,0x0E,0x00,0x0C, ++0xB0,0x1B,0x02,0xA6, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x2C,0x00,0xBF,0xAF, ++0x02,0x00,0x82,0x90, ++0x02,0x80,0x14,0x3C, ++0x30,0x1F,0x92,0x26, ++0xB0,0x1B,0x43,0x96, ++0x00,0x00,0x85,0x8C, ++0x0F,0x00,0x42,0x30, ++0xC0,0x10,0x02,0x00, ++0x21,0x80,0x44,0x00, ++0x01,0x00,0x63,0x30, ++0xFF,0x3F,0xB3,0x30, ++0x18,0x00,0x11,0x26, ++0x0A,0x00,0x60,0x14, ++0x21,0x20,0x00,0x00, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x21,0x10,0x80,0x00, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x55,0x50,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x02,0x80,0x04,0x3C, ++0x18,0x3B,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x39,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xEF,0xFF,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0xB0,0x1B,0x42,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x10,0x42,0x30, ++0xEA,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0x03,0x96, ++0x04,0x00,0x04,0x24, ++0x21,0x10,0x80,0x00, ++0x00,0x40,0x63,0x30, ++0x0A,0x10,0x03,0x00, ++0x21,0x10,0x22,0x02, ++0x1C,0x00,0x43,0x94, ++0x1A,0x00,0x45,0x94, ++0x2F,0x00,0x60,0x14, ++0x02,0x00,0x02,0x24, ++0x14,0x00,0xA2,0x10, ++0x01,0x00,0x02,0x24, ++0x0E,0x00,0xA4,0x14, ++0x02,0x80,0x04,0x3C, ++0x78,0x3D,0x43,0x8E, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x62,0x10, ++0x30,0x1F,0x83,0x26, ++0xB0,0x1B,0x62,0x94, ++0xFF,0xFF,0x04,0x24, ++0xFF,0xDF,0x42,0x30, ++0xE9,0x4B,0x00,0x08, ++0xB0,0x1B,0x62,0xA4, ++0x84,0x14,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xE9,0x4B,0x00,0x08, ++0x21,0x20,0x00,0x00, ++0x2F,0x55,0x00,0x0C, ++0xEC,0xE1,0x84,0x24, ++0x12,0x4C,0x00,0x08, ++0x30,0x1F,0x83,0x26, ++0x78,0x3D,0x43,0x8E, ++0x00,0x00,0x00,0x00, ++0xF5,0xFF,0x62,0x14, ++0xE2,0xFF,0x67,0x26, ++0x36,0x00,0x04,0x26, ++0x10,0x00,0x05,0x24, ++0x55,0x1D,0x00,0x0C, ++0x10,0x00,0xA6,0x27, ++0x16,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xA6,0x8F, ++0x02,0x80,0x04,0x3C, ++0xB8,0x5C,0x84,0x24, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x45,0x24, ++0xB0,0x1B,0x43,0x96, ++0x21,0x20,0x00,0x00, ++0x03,0x00,0x02,0x24, ++0xDF,0xFF,0x63,0x30, ++0x40,0x00,0x63,0x34, ++0xB0,0x1B,0x43,0xA6, ++0xBC,0x15,0x00,0x0C, ++0x74,0x3D,0x42,0xAE, ++0xE9,0x4B,0x00,0x08, ++0x21,0x20,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0xBC,0xE1,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x21,0x28,0x60,0x00, ++0x12,0x4C,0x00,0x08, ++0x30,0x1F,0x83,0x26, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xD8,0xE1,0x84,0x24, ++0x12,0x4C,0x00,0x08, ++0x30,0x1F,0x83,0x26, ++0xE8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x30,0x1F,0x50,0x24, ++0x6C,0x3D,0x03,0x8E, ++0xFF,0xFF,0x04,0x24, ++0x01,0x00,0x63,0x24, ++0x05,0x00,0x62,0x2C, ++0x16,0x00,0x40,0x10, ++0x6C,0x3D,0x03,0xAE, ++0xB0,0x1B,0x03,0x96, ++0xBF,0xFF,0x02,0x24, ++0x21,0x20,0x00,0x00, ++0x24,0x10,0x62,0x00, ++0x80,0x00,0x63,0x30, ++0x05,0x00,0x60,0x10, ++0x20,0x00,0x45,0x34, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x01,0x00,0x02,0x24, ++0x74,0x3D,0x02,0xAE, ++0xBC,0x15,0x00,0x0C, ++0xB0,0x1B,0x05,0xA6, ++0xC8,0x00,0x03,0x24, ++0xB4,0x38,0x03,0xAE, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xB0,0x1B,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0xFF,0xDF,0x42,0x30, ++0x48,0x0E,0x00,0x0C, ++0xB0,0x1B,0x02,0xA6, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x20,0x00,0xB2,0xAF, ++0x21,0x90,0x80,0x00, ++0x00,0x01,0x04,0x24, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x21,0x98,0xA0,0x00, ++0x28,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x21,0x88,0x40,0x00, ++0x20,0xE2,0x84,0x24, ++0x37,0x00,0x40,0x10, ++0x04,0xEB,0xA5,0x24, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x30,0x96, ++0x02,0x80,0x02,0x3C, ++0x21,0x28,0x40,0x02, ++0x25,0x80,0x02,0x02, ++0x24,0x00,0x04,0x26, ++0x20,0x00,0x00,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x04,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x30,0x00,0x04,0x26, ++0x88,0x58,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x03,0x96, ++0x18,0x00,0x02,0x24, ++0x02,0x80,0x05,0x3C, ++0x03,0xFF,0x63,0x30, ++0xC0,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0x30,0x1F,0xA5,0x24, ++0x0C,0x00,0x22,0xAE, ++0xF8,0x1D,0xA3,0x94, ++0x20,0x00,0x07,0x26, ++0x38,0x00,0x04,0x26, ++0xFF,0x0F,0x62,0x30, ++0x00,0x11,0x02,0x00, ++0x02,0x32,0x02,0x00, ++0x01,0x00,0x63,0x24, ++0xF8,0x1D,0xA3,0xA4, ++0x17,0x00,0xE6,0xA0, ++0x16,0x00,0xE2,0xA0, ++0x10,0x00,0xA6,0x27, ++0x0C,0x00,0x27,0x26, ++0x02,0x00,0x05,0x24, ++0x68,0x4F,0x00,0x0C, ++0x10,0x00,0xB3,0xA7, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x00,0x00, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x14,0xE2,0x84,0x24, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x20,0x00,0xB2,0xAF, ++0x21,0x90,0x80,0x00, ++0x00,0x01,0x04,0x24, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x21,0x98,0xA0,0x00, ++0x28,0x00,0xBF,0xAF, ++0x25,0x24,0x00,0x0C, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x21,0x88,0x40,0x00, ++0x3C,0xE2,0x84,0x24, ++0x37,0x00,0x40,0x10, ++0x14,0xEB,0xA5,0x24, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x30,0x96, ++0x02,0x80,0x02,0x3C, ++0x21,0x28,0x40,0x02, ++0x25,0x80,0x02,0x02, ++0x24,0x00,0x04,0x26, ++0x20,0x00,0x00,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x04,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x30,0x00,0x04,0x26, ++0x88,0x58,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x03,0x96, ++0x18,0x00,0x02,0x24, ++0x02,0x80,0x05,0x3C, ++0x03,0xFF,0x63,0x30, ++0xA0,0x00,0x63,0x34, ++0x20,0x00,0x03,0xA6, ++0x30,0x1F,0xA5,0x24, ++0x0C,0x00,0x22,0xAE, ++0xF8,0x1D,0xA3,0x94, ++0x20,0x00,0x07,0x26, ++0x38,0x00,0x04,0x26, ++0xFF,0x0F,0x62,0x30, ++0x00,0x11,0x02,0x00, ++0x02,0x32,0x02,0x00, ++0x01,0x00,0x63,0x24, ++0xF8,0x1D,0xA3,0xA4, ++0x17,0x00,0xE6,0xA0, ++0x16,0x00,0xE2,0xA0, ++0x10,0x00,0xA6,0x27, ++0x0C,0x00,0x27,0x26, ++0x02,0x00,0x05,0x24, ++0x68,0x4F,0x00,0x0C, ++0x10,0x00,0xB3,0xA7, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x00,0x00, ++0xB9,0x0C,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x30,0xE2,0x84,0x24, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x2C,0x00,0xB1,0xAF, ++0xFF,0xFF,0x05,0x24, ++0x21,0x88,0x80,0x00, ++0x02,0x00,0x06,0x24, ++0x10,0x00,0xA4,0x27, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x08,0x52,0x00,0x0C, ++0x28,0x00,0xB0,0xAF, ++0x08,0x00,0x30,0x96, ++0x02,0x80,0x02,0x3C, ++0x21,0x28,0x00,0x00, ++0x25,0x80,0x02,0x02, ++0x21,0x20,0x00,0x02, ++0x08,0x52,0x00,0x0C, ++0x10,0x00,0x06,0x24, ++0x20,0x00,0x02,0x96, ++0x24,0x00,0x04,0x26, ++0x10,0x00,0xA5,0x27, ++0x03,0xFF,0x42,0x30, ++0xC8,0x00,0x42,0x34, ++0x20,0x00,0x02,0xA6, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x25,0xB0,0x03,0x3C, ++0x50,0x00,0x62,0x34, ++0x00,0x00,0x44,0x8C, ++0x54,0x00,0x65,0x34, ++0x58,0x00,0x66,0x34, ++0x18,0x00,0xA4,0xAF, ++0x00,0x00,0xA2,0x8C, ++0x5C,0x00,0x63,0x34, ++0x2A,0x00,0x04,0x26, ++0x1C,0x00,0xA2,0xAF, ++0x00,0x00,0xC7,0x8C, ++0x18,0x00,0xA5,0x27, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0xA7,0xAF, ++0x00,0x00,0x62,0x8C, ++0x1A,0x00,0x12,0x24, ++0x10,0x52,0x00,0x0C, ++0x24,0x00,0xA2,0xAF, ++0x30,0x00,0x04,0x26, ++0x20,0x00,0xA5,0x27, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x13,0x00,0x03,0x24, ++0x14,0x00,0x23,0xAE, ++0x0C,0x00,0x32,0xAE, ++0x08,0x00,0x05,0x8E, ++0x04,0x00,0x04,0x8E, ++0xFF,0xDF,0x02,0x3C, ++0x14,0x00,0x06,0x8E, ++0xFF,0xFF,0x42,0x34, ++0x10,0x00,0x07,0x8E, ++0xFF,0xE0,0x03,0x24, ++0x24,0x28,0xA2,0x00, ++0x00,0x40,0x02,0x3C, ++0x24,0x20,0x83,0x00, ++0x25,0x28,0xA2,0x00, ++0xFF,0x81,0x03,0x24, ++0xFE,0xFF,0x02,0x3C, ++0x24,0x30,0xC3,0x00, ++0xFF,0xFF,0x42,0x34, ++0x00,0x12,0x84,0x34, ++0x00,0x80,0x03,0x3C, ++0x24,0x20,0x82,0x00, ++0x25,0x38,0xE3,0x00, ++0x00,0x26,0xC6,0x34, ++0x80,0x00,0xA5,0x34, ++0x20,0x00,0x02,0x24, ++0x00,0x00,0x12,0xA6, ++0x10,0x00,0x07,0xAE, ++0x02,0x00,0x02,0xA2, ++0x14,0x00,0x06,0xAE, ++0x04,0x00,0x04,0xAE, ++0x08,0x00,0x05,0xAE, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB1,0xAF, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x11,0x3C, ++0x18,0x03,0x23,0x36, ++0x80,0x35,0x42,0x24, ++0x28,0x00,0xB4,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x21,0xA0,0x80,0x00, ++0x48,0x00,0xB2,0x93, ++0xFF,0x00,0xE4,0x30, ++0x00,0x00,0x62,0xAC, ++0x24,0x00,0xB3,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x30,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0xFF,0x00,0xB3,0x30, ++0x0D,0x24,0x00,0x0C, ++0xFF,0x00,0xD0,0x30, ++0x66,0x00,0x40,0x10, ++0x10,0x00,0xA2,0xAF, ++0x08,0x00,0x44,0x8C, ++0xB0,0x03,0x22,0x36, ++0x00,0x00,0x44,0xAC, ++0x10,0x00,0xA3,0x8F, ++0x02,0x80,0x02,0x3C, ++0x08,0x00,0x64,0x94, ++0x00,0x00,0x00,0x00, ++0x25,0x88,0x82,0x00, ++0x41,0x00,0x40,0x16, ++0x20,0x00,0x24,0x26, ++0x48,0x00,0x02,0x24, ++0x43,0x00,0x02,0x12, ++0x20,0x00,0x30,0xA6, ++0x04,0x00,0x02,0x24, ++0x47,0x00,0x62,0x16, ++0x21,0x28,0x80,0x02, ++0xA4,0x00,0x02,0x24, ++0x61,0x00,0x02,0x12, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xA2,0x8F, ++0x25,0xB0,0x10,0x3C, ++0xB0,0x03,0x10,0x36, ++0x0C,0x00,0x55,0xAC, ++0x10,0x00,0xA2,0x8F, ++0x12,0x00,0x03,0x24, ++0x21,0x28,0x00,0x00, ++0x14,0x00,0x43,0xAC, ++0x00,0x00,0x15,0xAE, ++0x10,0x00,0xA2,0x8F, ++0x08,0x00,0x06,0x24, ++0x08,0x00,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x03,0xAE, ++0x10,0x00,0xA2,0x8F, ++0x02,0x80,0x03,0x3C, ++0x08,0x00,0x44,0x94, ++0x00,0x00,0x00,0x00, ++0x25,0x88,0x83,0x00, ++0x08,0x52,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x14,0x00,0x25,0x8E, ++0x08,0x00,0x24,0x8E, ++0xFF,0xDF,0x02,0x3C, ++0xFF,0x81,0x03,0x24, ++0xFF,0xFF,0x42,0x34, ++0x24,0x28,0xA3,0x00, ++0x24,0x20,0x82,0x00, ++0x00,0x40,0x03,0x3C, ++0x25,0x20,0x83,0x00, ++0x20,0x00,0x02,0x24, ++0x00,0x24,0xA5,0x34, ++0x00,0x00,0x35,0xA6, ++0x02,0x00,0x22,0xA2, ++0x08,0x00,0x24,0xAE, ++0x14,0x00,0x25,0xAE, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xA3,0x8F, ++0x74,0x57,0x42,0x24, ++0x04,0x00,0x44,0x8C, ++0x00,0x00,0x62,0xAC, ++0x04,0x00,0x43,0xAC, ++0x10,0x00,0xA2,0x27, ++0x00,0x00,0x83,0xAC, ++0x04,0x00,0x64,0xAC, ++0x30,0x00,0xBF,0x8F, ++0x00,0x00,0x02,0xAE, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x00,0x10,0x02,0x36, ++0x20,0x00,0x22,0xA6, ++0x48,0x00,0x02,0x24, ++0xC0,0xFF,0x02,0x16, ++0x04,0x00,0x02,0x24, ++0x20,0x00,0x22,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x42,0x34, ++0x20,0x00,0x22,0xA6, ++0x04,0x00,0x02,0x24, ++0xBB,0xFF,0x62,0x12, ++0x21,0x28,0x80,0x02, ++0x24,0x00,0x24,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x18,0x3B,0xA5,0x24, ++0x2A,0x00,0x24,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x30,0x00,0x24,0x26, ++0x88,0x58,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x88,0x4D,0x00,0x08, ++0x18,0x00,0x15,0x24, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x4C,0xE2,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x24,0xEB,0xA5,0x24, ++0x30,0x00,0xBF,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x80,0x58,0x43,0x94, ++0x02,0x80,0x05,0x3C, ++0x88,0x58,0xA5,0x24, ++0x00,0xC0,0x63,0x24, ++0xFF,0xFF,0x63,0x30, ++0x02,0x12,0x03,0x00, ++0x02,0x00,0x83,0xA0, ++0x03,0x00,0x82,0xA0, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0x24,0x00,0x24,0x26, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x24,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x88,0x4D,0x00,0x08, ++0x18,0x00,0x15,0x24, ++0xB0,0xFF,0xBD,0x27, ++0x3C,0x00,0xB5,0xAF, ++0x38,0x00,0xB4,0xAF, ++0xFF,0xFF,0xF5,0x30, ++0x25,0xB0,0x14,0x3C, ++0x01,0x80,0x02,0x3C, ++0x2C,0x00,0xB1,0xAF, ++0x18,0x03,0x83,0x36, ++0xE8,0x37,0x42,0x24, ++0x20,0x00,0xB1,0x26, ++0x44,0x00,0xB7,0xAF, ++0x34,0x00,0xB3,0xAF, ++0x21,0xB8,0x80,0x00, ++0x60,0x00,0xB3,0x93, ++0x21,0x20,0x20,0x02, ++0x00,0x00,0x62,0xAC, ++0x40,0x00,0xB6,0xAF, ++0x30,0x00,0xB2,0xAF, ++0x48,0x00,0xBF,0xAF, ++0x28,0x00,0xB0,0xAF, ++0xFF,0x00,0xB6,0x30, ++0x25,0x24,0x00,0x0C, ++0xFF,0x00,0xD2,0x30, ++0x11,0x00,0x40,0x14, ++0x20,0x00,0xA2,0xAF, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x58,0xE2,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x30,0xEB,0xA5,0x24, ++0x48,0x00,0xBF,0x8F, ++0x44,0x00,0xB7,0x8F, ++0x40,0x00,0xB6,0x8F, ++0x3C,0x00,0xB5,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x50,0x00,0xBD,0x27, ++0x08,0x00,0x43,0x8C, ++0xB0,0x03,0x82,0x36, ++0x02,0x80,0x10,0x3C, ++0x00,0x00,0x43,0xAC, ++0x20,0x00,0xA2,0x8F, ++0x21,0x30,0x20,0x02, ++0x21,0x28,0x00,0x00, ++0x08,0x00,0x44,0x94, ++0xFF,0x51,0x00,0x0C, ++0x25,0x20,0x90,0x00, ++0x20,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x25,0x88,0x50,0x00, ++0x51,0x00,0x60,0x16, ++0x20,0x00,0x30,0x26, ++0x20,0x00,0x32,0xA6, ++0x48,0x00,0x02,0x24, ++0x6C,0x00,0x42,0x12, ++0x50,0x00,0x82,0x36, ++0x04,0x00,0x02,0x24, ++0x4D,0x00,0xC2,0x16, ++0x21,0x28,0xE0,0x02, ++0xA4,0x00,0x02,0x24, ++0x7E,0x00,0x42,0x12, ++0x02,0x80,0x02,0x3C, ++0x20,0x00,0xA2,0x8F, ++0x25,0xB0,0x10,0x3C, ++0xB0,0x03,0x10,0x36, ++0x0C,0x00,0x55,0xAC, ++0x20,0x00,0xA2,0x8F, ++0x12,0x00,0x03,0x24, ++0x21,0x28,0x00,0x00, ++0x14,0x00,0x43,0xAC, ++0x00,0x00,0x15,0xAE, ++0x20,0x00,0xA2,0x8F, ++0x08,0x00,0x06,0x24, ++0x08,0x00,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x03,0xAE, ++0x20,0x00,0xA2,0x8F, ++0x02,0x80,0x03,0x3C, ++0x08,0x00,0x44,0x94, ++0x00,0x00,0x00,0x00, ++0x25,0x88,0x83,0x00, ++0x08,0x52,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x04,0x00,0x25,0x8E, ++0x08,0x00,0x26,0x8E, ++0x14,0x00,0x27,0x8E, ++0x10,0x00,0x24,0x8E, ++0xFF,0xE0,0x03,0x24, ++0xFF,0xDF,0x02,0x3C, ++0x24,0x28,0xA3,0x00, ++0xFF,0xFF,0x42,0x34, ++0xFF,0x81,0x03,0x24, ++0x24,0x38,0xE3,0x00, ++0x24,0x30,0xC2,0x00, ++0x00,0x80,0x03,0x3C, ++0x00,0x40,0x02,0x3C, ++0x25,0x30,0xC2,0x00, ++0x25,0x20,0x83,0x00, ++0x00,0x12,0xA5,0x34, ++0x20,0x00,0x02,0x24, ++0x10,0x00,0x24,0xAE, ++0x00,0x00,0x35,0xA6, ++0x02,0x00,0x22,0xA2, ++0x04,0x00,0x25,0xAE, ++0x14,0x00,0x27,0xAE, ++0x08,0x00,0x26,0xAE, ++0x00,0x60,0x05,0x40, ++0x01,0x00,0xA1,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x02,0x3C, ++0x20,0x00,0xA3,0x8F, ++0x74,0x57,0x42,0x24, ++0x04,0x00,0x44,0x8C, ++0x00,0x00,0x62,0xAC, ++0x04,0x00,0x43,0xAC, ++0x20,0x00,0xA2,0x27, ++0x00,0x00,0x83,0xAC, ++0x04,0x00,0x64,0xAC, ++0x00,0x00,0x02,0xAE, ++0x00,0x60,0x85,0x40, ++0x48,0x00,0xBF,0x8F, ++0x44,0x00,0xB7,0x8F, ++0x40,0x00,0xB6,0x8F, ++0x3C,0x00,0xB5,0x8F, ++0x38,0x00,0xB4,0x8F, ++0x34,0x00,0xB3,0x8F, ++0x30,0x00,0xB2,0x8F, ++0x2C,0x00,0xB1,0x8F, ++0x28,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x50,0x00,0xBD,0x27, ++0x00,0x10,0x42,0x36, ++0x35,0x4E,0x00,0x08, ++0x20,0x00,0x22,0xA6, ++0x24,0x00,0x24,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x18,0x3B,0xA5,0x24, ++0x2A,0x00,0x24,0x26, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x30,0x00,0x24,0x26, ++0x88,0x58,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xF8,0x1D,0xA6,0x94, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0xC2,0x24, ++0x00,0x21,0x06,0x00, ++0xFF,0xFF,0x46,0x30, ++0xFF,0xFF,0x84,0x30, ++0x00,0x10,0xC2,0x2C, ++0x0A,0x30,0x02,0x00, ++0x02,0x1A,0x04,0x00, ++0x17,0x00,0x03,0xA2, ++0x16,0x00,0x04,0xA2, ++0x3E,0x4E,0x00,0x08, ++0xF8,0x1D,0xA6,0xA4, ++0x00,0x00,0x43,0x8C, ++0x54,0x00,0x84,0x36, ++0x58,0x00,0x85,0x36, ++0x10,0x00,0xA3,0xAF, ++0x00,0x00,0x82,0x8C, ++0x5C,0x00,0x87,0x36, ++0x2A,0x00,0x24,0x26, ++0x14,0x00,0xA2,0xAF, ++0x00,0x00,0xA3,0x8C, ++0x06,0x00,0x06,0x24, ++0x10,0x00,0xA5,0x27, ++0x18,0x00,0xA3,0xAF, ++0x00,0x00,0xE2,0x8C, ++0x10,0x52,0x00,0x0C, ++0x1C,0x00,0xA2,0xAF, ++0x30,0x00,0x24,0x26, ++0x18,0x00,0xA5,0x27, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x20,0x00,0x23,0x96, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x63,0x34, ++0x38,0x4E,0x00,0x08, ++0x20,0x00,0x23,0xA6, ++0x80,0x58,0x43,0x94, ++0x02,0x80,0x05,0x3C, ++0x24,0x00,0x24,0x26, ++0x00,0xC0,0x63,0x24, ++0xFF,0xFF,0x63,0x30, ++0x02,0x12,0x03,0x00, ++0x88,0x58,0xA5,0x24, ++0x03,0x00,0x02,0xA2, ++0x02,0x00,0x03,0xA2, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x02,0x80,0x05,0x3C, ++0x2A,0x00,0x24,0x26, ++0x18,0x3B,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x3E,0x4E,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB0,0xAF, ++0xFF,0x00,0x90,0x30, ++0x02,0x80,0x04,0x3C, ++0x21,0x28,0x00,0x02, ++0x1C,0x00,0xBF,0xAF, ++0x2F,0x55,0x00,0x0C, ++0x64,0xE2,0x84,0x24, ++0x02,0x80,0x04,0x3C, ++0x88,0x58,0x84,0x24, ++0x08,0x00,0x05,0x24, ++0x48,0x00,0x06,0x24, ++0x18,0x00,0x07,0x24, ++0xFA,0x4D,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x01,0x00,0x02,0x24, ++0x21,0x28,0x00,0x00, ++0x90,0x00,0x06,0x24, ++0x21,0x38,0x00,0x00, ++0x18,0x00,0xBF,0xAF, ++0x60,0x4D,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x20,0x00,0xB0,0xAF, ++0xFF,0xFF,0x05,0x24, ++0xFF,0x00,0x90,0x30, ++0x02,0x00,0x06,0x24, ++0x24,0x00,0xBF,0xAF, ++0x08,0x52,0x00,0x0C, ++0x18,0x00,0xA4,0x27, ++0x18,0x00,0xA4,0x27, ++0x08,0x00,0x05,0x24, ++0xC8,0x00,0x06,0x24, ++0x21,0x38,0x00,0x00, ++0x60,0x4D,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x02,0x80,0x05,0x3C, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x30,0x1F,0xA5,0x24, ++0x50,0x39,0xA2,0x94, ++0x01,0x00,0x03,0x24, ++0xFF,0x00,0x90,0x30, ++0x00,0xC0,0x42,0x24, ++0xFF,0xFF,0x44,0x30, ++0xC2,0x34,0x00,0x0C, ++0x2A,0x1C,0xA3,0xA0, ++0x02,0x80,0x04,0x3C, ++0x88,0x58,0x84,0x24, ++0x04,0x00,0x05,0x24, ++0xA4,0x00,0x06,0x24, ++0x10,0x00,0x07,0x24, ++0xFA,0x4D,0x00,0x0C, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x08,0x00,0xE0,0x03, ++0x08,0x00,0x82,0x24, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x17,0x4F,0x00,0x0C, ++0x74,0x00,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x10,0x00,0xA4,0x27, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x10,0x00,0xA2,0x97, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x17,0x4F,0x00,0x0C, ++0x10,0x00,0xA5,0xA7, ++0x21,0x20,0x40,0x00, ++0x10,0x00,0xA5,0x27, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x0A,0x00,0x82,0x24, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x32,0x4F,0x00,0x0C, ++0x74,0x00,0x84,0x24, ++0x21,0x28,0x40,0x00, ++0x10,0x00,0xA4,0x27, ++0x10,0x52,0x00,0x0C, ++0x02,0x00,0x06,0x24, ++0x10,0x00,0xA2,0x97, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0x80,0x00, ++0x00,0x00,0x05,0xA2, ++0x01,0x00,0x06,0xA2, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x21,0x88,0xC0,0x00, ++0x02,0x00,0x84,0x24, ++0x30,0x00,0xB2,0x8F, ++0x0D,0x00,0xC0,0x14, ++0x21,0x28,0xE0,0x00, ++0x00,0x00,0x43,0x8E, ++0x21,0x10,0x11,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x21,0x18,0x71,0x00, ++0x02,0x00,0x63,0x24, ++0x00,0x00,0x43,0xAE, ++0x14,0x00,0xB1,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x02,0x00,0x42,0x24, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x10,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x43,0x8E, ++0x21,0x10,0x11,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x21,0x18,0x71,0x00, ++0x02,0x00,0x63,0x24, ++0x00,0x00,0x43,0xAE, ++0x14,0x00,0xB1,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x02,0x00,0x42,0x24, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0xA0,0x00, ++0x18,0x00,0xB2,0xAF, ++0x21,0x28,0xC0,0x00, ++0x21,0x90,0xE0,0x00, ++0x21,0x30,0x00,0x02, ++0x1C,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x52,0x00,0x0C, ++0x21,0x88,0x80,0x00, ++0x00,0x00,0x43,0x8E, ++0x21,0x10,0x30,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x21,0x18,0x70,0x00, ++0x00,0x00,0x43,0xAE, ++0x14,0x00,0xB1,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x7F,0x00,0x84,0x30, ++0x6D,0x00,0x82,0x2C, ++0x0A,0x00,0x40,0x10, ++0x21,0x28,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x04,0x00, ++0x58,0xEB,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x21,0x28,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x0B,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x0A,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x09,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x08,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x07,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x06,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x03,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x05,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x04,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x02,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x01,0x00,0x05,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x7F,0x00,0x84,0x30, ++0x0C,0x00,0x82,0x2C, ++0x0A,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x04,0x00, ++0x0C,0xED,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x6C,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x60,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x48,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x30,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x24,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x18,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x12,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x0C,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x16,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x0B,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x04,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x02,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xC8,0xFF,0xBD,0x27, ++0x24,0x00,0xB5,0xAF, ++0x02,0x80,0x15,0x3C, ++0x2C,0x00,0xB7,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x30,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0xB8,0x80,0x00, ++0x21,0xA0,0x00,0x00, ++0x21,0x98,0x00,0x00, ++0x30,0x1F,0xB6,0x26, ++0x30,0x1F,0xA2,0x26, ++0x21,0x10,0x62,0x02, ++0xFB,0x1B,0x51,0x90, ++0xFE,0x00,0x03,0x24, ++0x1E,0x00,0x23,0x12, ++0xFF,0x00,0x02,0x24, ++0x21,0x00,0x22,0x12, ++0x21,0x10,0x80,0x02, ++0xAD,0x4F,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x21,0x88,0x40,0x00, ++0x21,0x80,0x00,0x00, ++0x21,0x90,0xC0,0x02, ++0x21,0x10,0x12,0x02, ++0xEE,0x1B,0x44,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x82,0x24, ++0xFF,0x00,0x42,0x30, ++0x02,0x00,0x42,0x2C, ++0x05,0x00,0x40,0x14, ++0x01,0x00,0x10,0x26, ++0xAD,0x4F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x51,0x10, ++0x01,0x00,0x03,0x24, ++0x0D,0x00,0x02,0x2A, ++0xF3,0xFF,0x40,0x14, ++0x21,0x10,0x12,0x02, ++0x21,0x18,0x00,0x00, ++0x01,0x00,0x02,0x24, ++0x14,0x00,0x62,0x10, ++0xFF,0x00,0x22,0x32, ++0x21,0x10,0xF4,0x02, ++0x00,0x00,0x51,0xA0, ++0x01,0x00,0x94,0x26, ++0x01,0x00,0x73,0x26, ++0x0D,0x00,0x62,0x2A, ++0xDB,0xFF,0x40,0x14, ++0x30,0x1F,0xA2,0x26, ++0x21,0x10,0x80,0x02, ++0x30,0x00,0xBF,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x0C,0x50,0x00,0x08, ++0x80,0x00,0x51,0x34, ++0xD0,0xFF,0xBD,0x27, ++0x24,0x00,0xB1,0xAF, ++0x20,0x00,0xB0,0xAF, ++0x21,0x88,0x80,0x00, ++0x21,0x80,0xA0,0x00, ++0x0D,0x00,0x06,0x24, ++0x21,0x28,0x00,0x00, ++0x28,0x00,0xBF,0xAF, ++0xFF,0x51,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0xDD,0x4F,0x00,0x0C, ++0x10,0x00,0xA4,0x27, ++0x00,0x00,0x02,0xAE, ++0x21,0x20,0x20,0x02, ++0x10,0x00,0xA5,0x27, ++0x10,0x52,0x00,0x0C, ++0x21,0x30,0x40,0x00, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x21,0x28,0x00,0x00, ++0x21,0x10,0x85,0x00, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x60,0x10, ++0x0D,0x00,0xA2,0x2C, ++0xFA,0xFF,0x40,0x14, ++0x01,0x00,0xA5,0x24, ++0xFF,0xFF,0xA5,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x00,0x00,0x82,0x94, ++0x21,0x30,0x80,0x00, ++0x10,0x00,0x85,0x24, ++0x42,0x1A,0x02,0x00, ++0xC2,0x11,0x02,0x00, ++0x02,0x00,0x42,0x30, ++0x01,0x00,0x63,0x30, ++0x25,0x18,0x43,0x00, ++0x01,0x00,0x04,0x24, ++0x07,0x00,0x64,0x10, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x60,0x10, ++0x0A,0x00,0xC5,0x24, ++0x02,0x00,0x02,0x24, ++0x02,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xC5,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x00,0x00,0x82,0x94, ++0x21,0x30,0x80,0x00, ++0x04,0x00,0x85,0x24, ++0x42,0x1A,0x02,0x00, ++0xC2,0x11,0x02,0x00, ++0x02,0x00,0x42,0x30, ++0x01,0x00,0x63,0x30, ++0x25,0x18,0x43,0x00, ++0x01,0x00,0x04,0x24, ++0x04,0x00,0x64,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xC5,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xA0,0x00, ++0x13,0x00,0xA0,0x18, ++0x21,0x30,0x00,0x00, ++0x02,0x00,0x07,0x24, ++0x04,0x00,0x08,0x24, ++0x0B,0x00,0x09,0x24, ++0x16,0x00,0x0A,0x24, ++0x21,0x10,0x86,0x00, ++0x00,0x00,0x43,0x90, ++0x01,0x00,0xC6,0x24, ++0x7F,0x00,0x63,0x30, ++0x07,0x00,0x67,0x10, ++0x2A,0x10,0xC5,0x00, ++0x05,0x00,0x68,0x10, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x69,0x10, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x6A,0x14, ++0x00,0x00,0x00,0x00, ++0xF3,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x02,0x80,0x02,0x3C, ++0x80,0x5D,0x43,0x8C, ++0x08,0x00,0x10,0x24, ++0x06,0x00,0xA0,0x14, ++0x0A,0x80,0x03,0x00, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x65,0x50,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x36, ++0x01,0x00,0x42,0x38, ++0x03,0x00,0x04,0x36, ++0x21,0x80,0x60,0x00, ++0x0B,0x80,0x82,0x00, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x0E,0x00,0xA3,0x2C, ++0x21,0x88,0xA0,0x00, ++0x0D,0x00,0x02,0x24, ++0x0A,0x88,0x43,0x00, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x21,0x98,0x80,0x00, ++0x21,0x90,0x00,0x00, ++0x15,0x00,0x20,0x12, ++0x21,0x80,0x00,0x00, ++0xAA,0x50,0x00,0x08, ++0x01,0x00,0x14,0x24, ++0x2B,0x10,0x11,0x02, ++0x11,0x00,0x40,0x10, ++0x21,0x10,0x40,0x02, ++0x21,0x18,0x70,0x02, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x44,0x30, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0xF6,0xFF,0x41,0x04, ++0x01,0x00,0x10,0x26, ++0x7D,0x4F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x04,0x10,0x54,0x00, ++0x25,0x90,0x42,0x02, ++0x2B,0x10,0x11,0x02, ++0xF3,0xFF,0x40,0x14, ++0x21,0x18,0x70,0x02, ++0x21,0x10,0x40,0x02, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x0E,0x00,0xA3,0x2C, ++0x21,0x88,0xA0,0x00, ++0x0D,0x00,0x02,0x24, ++0x0A,0x88,0x43,0x00, ++0x20,0x00,0xB4,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x21,0xA0,0x80,0x00, ++0x21,0x90,0x00,0x00, ++0x0A,0x00,0x20,0x12, ++0x21,0x80,0x00,0x00, ++0x01,0x00,0x13,0x24, ++0x21,0x10,0x90,0x02, ++0x00,0x00,0x44,0x90, ++0x7D,0x4F,0x00,0x0C, ++0x01,0x00,0x10,0x26, ++0x04,0x10,0x53,0x00, ++0x2B,0x18,0x11,0x02, ++0xF9,0xFF,0x60,0x14, ++0x25,0x90,0x42,0x02, ++0x21,0x10,0x40,0x02, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xE8,0xFF,0xBD,0x27, ++0xFF,0xFF,0x02,0x24, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x21,0x30,0xA0,0x00, ++0x1B,0x00,0x82,0x10, ++0x20,0x00,0x10,0x24, ++0x20,0x00,0x82,0x28, ++0x06,0x00,0x40,0x14, ++0x80,0x18,0x04,0x00, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x21,0x18,0x64,0x00, ++0x21,0x80,0x80,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x04,0x3C, ++0xC0,0x18,0x03,0x00, ++0x30,0x1F,0x42,0x24, ++0x2B,0x3D,0x84,0x24, ++0x21,0x20,0x64,0x00, ++0x21,0x18,0x62,0x00, ++0x01,0x00,0x02,0x24, ++0x06,0x00,0x06,0x24, ++0x10,0x52,0x00,0x0C, ++0xFA,0x1D,0x62,0xA0, ++0x21,0x10,0x00,0x02, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0xC8,0x00,0x47,0x24, ++0x05,0x00,0x10,0x24, ++0xC2,0x1E,0x43,0x24, ++0x10,0x51,0x00,0x08, ++0xC8,0x00,0x05,0x24, ++0x01,0x00,0x10,0x26, ++0x20,0x00,0x02,0x2E, ++0x28,0x00,0xA5,0x24, ++0xDE,0xFF,0x40,0x10, ++0x28,0x00,0xE7,0x24, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0xF8,0xFF,0x40,0x14, ++0x28,0x00,0x63,0x24, ++0x02,0x80,0x04,0x3C, ++0x2B,0x3D,0x84,0x24, ++0x01,0x00,0x02,0x24, ++0x21,0x20,0xA4,0x00, ++0xFA,0x1D,0xE2,0xA0, ++0x21,0x28,0xC0,0x00, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x00,0x51,0x00,0x08, ++0x21,0x10,0x00,0x02, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x30,0x00,0xB2,0x8F, ++0x21,0x88,0x80,0x00, ++0x21,0x20,0xA0,0x00, ++0x21,0x28,0x20,0x02, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0xE3,0x50,0x00,0x0C, ++0xFF,0xFF,0xF0,0x30, ++0x20,0x00,0x03,0x24, ++0x21,0x20,0x40,0x00, ++0x21,0x28,0x00,0x02, ++0x21,0x30,0x20,0x02, ++0x07,0x00,0x43,0x10, ++0x21,0x38,0x40,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x4E,0x23,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0xA8,0x80,0x00, ++0x30,0x1F,0x54,0x24, ++0x2B,0x3D,0x73,0x24, ++0x05,0x00,0x11,0x24, ++0x01,0x00,0x12,0x24, ++0xC8,0x00,0x10,0x24, ++0x50,0x51,0x00,0x08, ++0x28,0x00,0xBF,0xAF, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0x22,0x2A, ++0x0E,0x00,0x40,0x10, ++0x21,0x10,0x20,0x02, ++0x21,0x10,0x14,0x02, ++0xFA,0x1D,0x43,0x90, ++0x21,0x20,0x13,0x02, ++0x21,0x28,0xA0,0x02, ++0x06,0x00,0x06,0x24, ++0xF6,0xFF,0x72,0x14, ++0x28,0x00,0x10,0x26, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF3,0xFF,0x40,0x14, ++0x01,0x00,0x31,0x26, ++0xFF,0xFF,0x31,0x26, ++0x21,0x10,0x20,0x02, ++0x28,0x00,0xBF,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x98,0x80,0x00, ++0x30,0x1F,0x56,0x24, ++0x2B,0x3D,0x75,0x24, ++0x21,0x88,0x00,0x00, ++0x01,0x00,0x14,0x24, ++0x21,0x80,0x00,0x00, ++0x2C,0x00,0xBF,0xAF, ++0x7C,0x51,0x00,0x08, ++0x18,0x00,0xB2,0xAF, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0x22,0x2A, ++0x1E,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x90,0x16,0x02, ++0xFA,0x1D,0x42,0x92, ++0x21,0x20,0x15,0x02, ++0x21,0x28,0x60,0x02, ++0x06,0x00,0x06,0x24, ++0xF6,0xFF,0x54,0x14, ++0x28,0x00,0x10,0x26, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xF3,0xFF,0x40,0x14, ++0x01,0x00,0x31,0x26, ++0xFF,0xFF,0x31,0x26, ++0x02,0x80,0x06,0x3C, ++0x02,0x80,0x07,0x3C, ++0x21,0x20,0x20,0x02, ++0xFA,0x1D,0x40,0xA2, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xE8,0xDD,0xC6,0x24, ++0xD8,0xDD,0xE7,0x24, ++0x21,0x28,0x00,0x00, ++0x4E,0x23,0x00,0x08, ++0x30,0x00,0xBD,0x27, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x18,0x00,0xB2,0xAF, ++0x30,0x1F,0x52,0x24, ++0x30,0x00,0xBE,0xAF, ++0x2C,0x00,0xB7,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x21,0x80,0x00,0x00, ++0x02,0x80,0x1E,0x3C, ++0x02,0x80,0x17,0x3C, ++0x02,0x80,0x16,0x3C, ++0x01,0x00,0x13,0x24, ++0xFF,0xF7,0x15,0x24, ++0xFF,0xEF,0x14,0x24, ++0x21,0x88,0x40,0x02, ++0xFA,0x1D,0x22,0x92, ++0xC0,0x48,0x10,0x00, ++0xEA,0x5D,0xC7,0x93, ++0x41,0x00,0x53,0x10, ++0x21,0x30,0x32,0x01, ++0xE8,0x22,0xC2,0x8C, ++0xBF,0xFF,0x03,0x24, ++0x24,0x28,0x43,0x00, ++0x80,0x07,0xA3,0x34, ++0x24,0x10,0x75,0x00, ++0x31,0x00,0xF3,0x10, ++0x24,0x10,0x54,0x00, ++0xE8,0x22,0xC2,0xAC, ++0x21,0x48,0x32,0x01, ++0xE8,0x22,0x23,0x8D, ++0xFD,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xFB,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xE7,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xFF,0xFD,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xEC,0x22,0x28,0x8D, ++0x24,0x18,0x62,0x00, ++0xFF,0xFB,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xFF,0xE7,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x1F,0x00,0x06,0x3C, ++0x00,0x80,0x08,0x35, ++0x24,0x18,0x62,0x00, ++0x25,0x40,0x06,0x01, ++0x21,0x20,0x00,0x02, ++0xE8,0x22,0x23,0xAD, ++0x01,0x00,0x10,0x26, ++0x21,0x28,0x00,0x00, ++0xE8,0xDD,0xE6,0x26, ++0xD8,0xDD,0xC7,0x26, ++0x4E,0x23,0x00,0x0C, ++0xEC,0x22,0x28,0xAD, ++0x20,0x00,0x03,0x2A, ++0xD1,0xFF,0x60,0x14, ++0x28,0x00,0x31,0x26, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xBE,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x44,0x90, ++0x24,0x18,0x75,0x00, ++0x80,0x0F,0xA2,0x34, ++0x00,0x10,0x63,0x34, ++0xCA,0xFF,0x87,0x14, ++0x24,0x10,0x54,0x00, ++0xC5,0x51,0x00,0x08, ++0xE8,0x22,0xC3,0xAC, ++0xBD,0x51,0x00,0x08, ++0xFA,0x1D,0x20,0xA2, ++0x04,0x52,0x00,0x08, ++0xFF,0x00,0xA5,0x30, ++0x00,0x00,0x85,0xA0, ++0xFF,0xFF,0xC6,0x24, ++0x01,0x00,0x84,0x24, ++0xFC,0xFF,0xC0,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xAC, ++0xFF,0xFF,0xC6,0x24, ++0xFD,0xFF,0xC0,0x14, ++0x04,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x21,0x38,0x80,0x00, ++0x08,0x00,0xC0,0x10, ++0xFF,0xFF,0xC3,0x24, ++0xFF,0xFF,0x06,0x24, ++0x00,0x00,0xA2,0x90, ++0xFF,0xFF,0x63,0x24, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0xE2,0xA0, ++0xFB,0xFF,0x66,0x14, ++0x01,0x00,0xE7,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x2B,0x10,0xA4,0x00, ++0x0D,0x00,0x40,0x14, ++0xFF,0xFF,0x02,0x24, ++0xFF,0xFF,0xC6,0x24, ++0x08,0x00,0xC2,0x10, ++0x21,0x18,0x80,0x00, ++0xFF,0xFF,0x07,0x24, ++0x00,0x00,0xA2,0x90, ++0xFF,0xFF,0xC6,0x24, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0x62,0xA0, ++0xFB,0xFF,0xC7,0x14, ++0x01,0x00,0x63,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x21,0x28,0xA6,0x00, ++0x21,0x18,0x86,0x00, ++0xFF,0xFF,0xC6,0x24, ++0xFA,0xFF,0xC2,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x07,0x24, ++0xFF,0xFF,0xA5,0x24, ++0x00,0x00,0xA2,0x90, ++0xFF,0xFF,0x63,0x24, ++0xFF,0xFF,0xC6,0x24, ++0xFB,0xFF,0xC7,0x14, ++0x00,0x00,0x62,0xA0, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x0C,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0xA3,0x90, ++0x01,0x00,0x84,0x24, ++0x23,0x10,0x43,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x04,0x00,0x40,0x14, ++0x01,0x00,0xA5,0x24, ++0xFF,0xFF,0xC6,0x24, ++0xF6,0xFF,0xC0,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xC0,0x00, ++0x4F,0x52,0x00,0x08, ++0x21,0x18,0x86,0x00, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x45,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x84,0x24, ++0xFA,0xFF,0x83,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0x09,0x00,0xC0,0x10, ++0xFF,0xFF,0xC3,0x24, ++0xFF,0x00,0xA5,0x30, ++0xFF,0xFF,0x06,0x24, ++0x00,0x00,0x82,0x90, ++0xFF,0xFF,0x63,0x24, ++0x05,0x00,0x45,0x10, ++0x01,0x00,0x84,0x24, ++0xFB,0xFF,0x66,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0xFF,0xFF,0x82,0x24, ++0x21,0x38,0x00,0x00, ++0x1F,0x00,0xC0,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x40,0xF2,0x4B,0x24, ++0x00,0x00,0x87,0x90, ++0x00,0x00,0xA3,0x90, ++0xFF,0xFF,0xC6,0x24, ++0x01,0x00,0x84,0x24, ++0x21,0x10,0xEB,0x00, ++0x16,0x00,0xE0,0x10, ++0x01,0x00,0xA5,0x24, ++0x14,0x00,0x60,0x10, ++0x21,0x48,0x6B,0x00, ++0x10,0x00,0xE3,0x10, ++0x20,0x00,0xE8,0x24, ++0x00,0x00,0x42,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x30, ++0x02,0x00,0x40,0x10, ++0x20,0x00,0x6A,0x24, ++0xFF,0x00,0x07,0x31, ++0x00,0x00,0x22,0x91, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x30, ++0x02,0x00,0x40,0x10, ++0xFF,0x00,0xE7,0x30, ++0xFF,0x00,0x43,0x31, ++0xFF,0x00,0x63,0x30, ++0x03,0x00,0xE3,0x14, ++0x00,0x00,0x00,0x00, ++0xE5,0xFF,0xC0,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x23,0x10,0xE3,0x00, ++0x21,0x18,0x80,0x00, ++0x00,0x00,0xA2,0x90, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0x82,0xA0, ++0xFC,0xFF,0x40,0x14, ++0x01,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x21,0x38,0x80,0x00, ++0xFF,0xFF,0x03,0x24, ++0xFF,0xFF,0xC6,0x24, ++0x06,0x00,0xC3,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x90, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0x82,0xA0, ++0xF9,0xFF,0x40,0x14, ++0x01,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xE0,0x00, ++0x00,0x00,0x82,0x80, ++0x9E,0x52,0x00,0x08, ++0x21,0x18,0x80,0x00, ++0x01,0x00,0x84,0x24, ++0x00,0x00,0x82,0x80, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x90, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0x82,0xA0, ++0xFC,0xFF,0x40,0x14, ++0x01,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x12,0x00,0xC0,0x10, ++0x21,0x18,0x80,0x00, ++0x00,0x00,0x82,0x80, ++0xAF,0x52,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x84,0x24, ++0x00,0x00,0x82,0x80, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x90, ++0x01,0x00,0xA5,0x24, ++0x00,0x00,0x82,0xA0, ++0x05,0x00,0x40,0x10, ++0x01,0x00,0x84,0x24, ++0xFF,0xFF,0xC6,0x24, ++0xF9,0xFF,0xC0,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x80,0xA0, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x00,0x00,0x83,0x90, ++0x00,0x00,0xA2,0x90, ++0x01,0x00,0x84,0x24, ++0x23,0x10,0x62,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x03,0x00,0x40,0x14, ++0x01,0x00,0xA5,0x24, ++0xF7,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x00,0x00, ++0x0B,0x00,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0x90, ++0x00,0x00,0x83,0x90, ++0xFF,0xFF,0xC6,0x24, ++0x23,0x10,0x62,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x03,0x00,0x40,0x14, ++0x01,0x00,0xA5,0x24, ++0xF5,0xFF,0x60,0x14, ++0x01,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x83,0x80, ++0x00,0x2E,0x05,0x00, ++0x21,0x10,0x80,0x00, ++0xE0,0x52,0x00,0x08, ++0x03,0x2E,0x05,0x00, ++0x07,0x00,0x60,0x10, ++0x01,0x00,0x42,0x24, ++0x00,0x00,0x43,0x80, ++0x00,0x00,0x00,0x00, ++0xFB,0xFF,0x65,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x00,0x00,0x82,0x80, ++0xEC,0x52,0x00,0x08, ++0x21,0x18,0x80,0x00, ++0x01,0x00,0x63,0x24, ++0x00,0x00,0x62,0x80, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x40,0x14, ++0x23,0x10,0x64,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x21,0x80,0xA0,0x00, ++0x14,0x00,0xB1,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x21,0x88,0x80,0x00, ++0xE6,0x52,0x00,0x0C, ++0x00,0x86,0x10,0x00, ++0x21,0x18,0x51,0x00, ++0x03,0x86,0x10,0x00, ++0x00,0x00,0x62,0x80, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x50,0x10, ++0x21,0x10,0x60,0x00, ++0xFF,0xFF,0x63,0x24, ++0x2B,0x10,0x71,0x00, ++0xF9,0xFF,0x40,0x10, ++0x21,0x10,0x00,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x21,0x30,0x80,0x00, ++0x0D,0x00,0xA0,0x10, ++0xFF,0xFF,0xA3,0x24, ++0x00,0x00,0x82,0x80, ++0x00,0x00,0x00,0x00, ++0x09,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x05,0x24, ++0xFF,0xFF,0x63,0x24, ++0x05,0x00,0x65,0x10, ++0x01,0x00,0xC6,0x24, ++0x00,0x00,0xC2,0x80, ++0x00,0x00,0x00,0x00, ++0xFA,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x23,0x10,0xC4,0x00, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x19,0x00,0x40,0x10, ++0x21,0x40,0x00,0x00, ++0x00,0x00,0xA9,0x80, ++0x00,0x00,0x00,0x00, ++0x17,0x00,0x20,0x11, ++0x21,0x30,0xA0,0x00, ++0x00,0x3E,0x02,0x00, ++0x03,0x3E,0x07,0x00, ++0x21,0x18,0x20,0x01, ++0x15,0x00,0xE3,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0xC6,0x24, ++0x00,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x1E,0x02,0x00, ++0x03,0x1E,0x03,0x00, ++0xF8,0xFF,0x60,0x14, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x06,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x84,0x24, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0xEB,0xFF,0x40,0x14, ++0x01,0x00,0x08,0x25, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x01, ++0x00,0x00,0xA2,0x90, ++0x31,0x53,0x00,0x08, ++0x00,0x16,0x02,0x00, ++0x00,0x00,0xC2,0x90, ++0x31,0x53,0x00,0x08, ++0x00,0x16,0x02,0x00, ++0x00,0x00,0x87,0x90, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xE0,0x10, ++0x21,0x10,0x80,0x00, ++0x00,0x00,0xA4,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x1E,0x04,0x00, ++0x03,0x1E,0x03,0x00, ++0x09,0x00,0x60,0x10, ++0x21,0x30,0xA0,0x00, ++0x00,0x3E,0x07,0x00, ++0x03,0x3E,0x07,0x00, ++0x0B,0x00,0xE3,0x10, ++0x01,0x00,0xC6,0x24, ++0x00,0x00,0xC3,0x80, ++0x00,0x00,0x00,0x00, ++0xFB,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0x00,0x00,0x47,0x90, ++0x00,0x00,0x00,0x00, ++0xF0,0xFF,0xE0,0x14, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x21,0x80,0x80,0x00, ++0x1D,0x00,0x80,0x10, ++0x21,0x88,0xA0,0x00, ++0x1D,0x53,0x00,0x0C, ++0x21,0x20,0x00,0x02, ++0x21,0x80,0x02,0x02, ++0x00,0x00,0x02,0x82, ++0x21,0x28,0x20,0x02, ++0x21,0x20,0x00,0x02, ++0x22,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x41,0x53,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x40,0x10, ++0x21,0x18,0x40,0x00, ++0x00,0x00,0x42,0x80, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x5C,0xF3,0x43,0xAC, ++0x21,0x18,0x00,0x02, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0x60,0xA0, ++0x72,0x53,0x00,0x08, ++0x01,0x00,0x63,0x24, ++0x02,0x80,0x02,0x3C, ++0x5C,0xF3,0x50,0x8C, ++0x00,0x00,0x00,0x00, ++0xF3,0xFF,0x00,0x12, ++0x21,0x18,0x00,0x00, ++0x1D,0x53,0x00,0x0C, ++0x21,0x20,0x00,0x02, ++0x21,0x80,0x02,0x02, ++0x00,0x00,0x02,0x82, ++0x21,0x28,0x20,0x02, ++0x21,0x20,0x00,0x02, ++0xE0,0xFF,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x02,0x80,0x02,0x3C, ++0x5C,0xF3,0x40,0xAC, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x90,0x8C, ++0x21,0x90,0x80,0x00, ++0x21,0x88,0xA0,0x00, ++0x21,0x18,0x00,0x00, ++0x0F,0x00,0x00,0x12, ++0x21,0x20,0x00,0x02, ++0x1D,0x53,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x80,0x02,0x02, ++0x00,0x00,0x02,0x82, ++0x21,0x28,0x20,0x02, ++0x21,0x20,0x00,0x02, ++0x07,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x41,0x53,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x40,0x00, ++0x09,0x00,0x40,0x14, ++0x00,0x00,0x42,0xAE, ++0x21,0x18,0x00,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0x42,0x80, ++0x00,0x00,0x00,0x00, ++0xF5,0xFF,0x40,0x10, ++0x01,0x00,0x64,0x24, ++0x00,0x00,0x60,0xA0, ++0xAB,0x53,0x00,0x08, ++0x00,0x00,0x44,0xAE, ++0xD8,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x21,0x88,0x80,0x00, ++0x21,0x20,0xA0,0x00, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0xE6,0x52,0x00,0x0C, ++0x21,0x98,0xA0,0x00, ++0x21,0x90,0x40,0x00, ++0x08,0x00,0x40,0x16, ++0x21,0x10,0x20,0x02, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xE6,0x52,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x21,0x80,0x40,0x00, ++0x2A,0x10,0x52,0x00, ++0x0A,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x60,0x02, ++0x21,0x30,0x40,0x02, ++0x39,0x52,0x00,0x0C, ++0xFF,0xFF,0x10,0x26, ++0x0B,0x00,0x40,0x10, ++0x2A,0x18,0x12,0x02, ++0xF8,0xFF,0x60,0x10, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xC7,0x53,0x00,0x08, ++0x21,0x10,0x20,0x02, ++0x00,0x00,0x87,0x90, ++0x00,0x00,0x00,0x00, ++0x27,0x00,0xE0,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA6,0x90, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0xC0,0x10, ++0xDF,0xFF,0x02,0x24, ++0x24,0x18,0xC2,0x00, ++0x24,0x10,0xE2,0x00, ++0x00,0x16,0x02,0x00, ++0x00,0x1E,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0x03,0x1E,0x03,0x00, ++0x0A,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0xDF,0xFF,0x02,0x24, ++0x24,0x18,0xC2,0x00, ++0x24,0x10,0xE2,0x00, ++0x00,0x16,0x02,0x00, ++0x00,0x1E,0x03,0x00, ++0x03,0x1E,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0x08,0x00,0xE0,0x03, ++0x23,0x10,0x43,0x00, ++0x0A,0x54,0x00,0x08, ++0xDF,0xFF,0x08,0x24, ++0x00,0x00,0xA6,0x90, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x06,0x01, ++0x00,0x16,0x02,0x00, ++0xF0,0xFF,0xC0,0x10, ++0x03,0x16,0x02,0x00, ++0xEF,0xFF,0x62,0x14, ++0xDF,0xFF,0x02,0x24, ++0x01,0x00,0x84,0x24, ++0x00,0x00,0x87,0x90, ++0x01,0x00,0xA5,0x24, ++0x24,0x10,0x07,0x01, ++0x00,0x1E,0x02,0x00, ++0xF2,0xFF,0xE0,0x14, ++0x03,0x1E,0x03,0x00, ++0x00,0x00,0xA6,0x90, ++0xDF,0xFF,0x02,0x24, ++0x24,0x18,0xC2,0x00, ++0x24,0x10,0xE2,0x00, ++0x00,0x16,0x02,0x00, ++0x00,0x1E,0x03,0x00, ++0x03,0x1E,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0x08,0x00,0xE0,0x03, ++0x23,0x10,0x43,0x00, ++0xA8,0xFF,0xBD,0x27, ++0x44,0x00,0xB5,0xAF, ++0x40,0x00,0xB4,0xAF, ++0x38,0x00,0xB2,0xAF, ++0x34,0x00,0xB1,0xAF, ++0x54,0x00,0xBF,0xAF, ++0x50,0x00,0xBE,0xAF, ++0x4C,0x00,0xB7,0xAF, ++0x48,0x00,0xB6,0xAF, ++0x3C,0x00,0xB3,0xAF, ++0x30,0x00,0xB0,0xAF, ++0x21,0x90,0xA0,0x00, ++0x00,0x00,0xA5,0x90, ++0x21,0xA0,0x80,0x00, ++0x21,0xA8,0xC0,0x00, ++0x00,0x26,0x05,0x00, ++0x03,0x26,0x04,0x00, ++0x11,0x00,0x80,0x10, ++0x21,0x88,0x80,0x02, ++0x25,0x00,0x02,0x24, ++0x29,0x00,0x82,0x10, ++0x0A,0x00,0x02,0x24, ++0x1B,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x1E,0x00,0x80,0x12, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x25,0xA2, ++0x01,0x00,0x31,0x26, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x00,0x00,0x00,0x00, ++0x00,0x26,0x05,0x00, ++0x03,0x26,0x04,0x00, ++0xF2,0xFF,0x80,0x14, ++0x25,0x00,0x02,0x24, ++0x02,0x00,0x80,0x12, ++0x23,0x10,0x34,0x02, ++0x00,0x00,0x20,0xA2, ++0x54,0x00,0xBF,0x8F, ++0x50,0x00,0xBE,0x8F, ++0x4C,0x00,0xB7,0x8F, ++0x48,0x00,0xB6,0x8F, ++0x44,0x00,0xB5,0x8F, ++0x40,0x00,0xB4,0x8F, ++0x3C,0x00,0xB3,0x8F, ++0x38,0x00,0xB2,0x8F, ++0x34,0x00,0xB1,0x8F, ++0x30,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x58,0x00,0xBD,0x27, ++0xE7,0xFF,0x80,0x16, ++0x00,0x00,0x00,0x00, ++0x77,0x55,0x00,0x0C, ++0x0D,0x00,0x04,0x24, ++0x0A,0x00,0x04,0x24, ++0x77,0x55,0x00,0x0C, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x00,0x00,0x00,0x00, ++0x00,0x26,0x05,0x00, ++0x3C,0x54,0x00,0x08, ++0x03,0x26,0x04,0x00, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x73,0x00,0x02,0x24, ++0x00,0x1E,0x05,0x00, ++0x03,0x1E,0x03,0x00, ++0x2C,0x00,0x62,0x10, ++0x10,0x00,0xB3,0x27, ++0x23,0x00,0x02,0x24, ++0x21,0xF0,0x60,0x02, ++0x21,0x38,0x00,0x00, ++0x34,0x00,0x62,0x10, ++0x1C,0x00,0x04,0x24, ++0x00,0x16,0x05,0x00, ++0x03,0x16,0x02,0x00, ++0x68,0x00,0x03,0x24, ++0x36,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x05,0x00, ++0x03,0x16,0x02,0x00, ++0x39,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0x20,0x00,0xA2,0x34, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x78,0x00,0x03,0x24, ++0x3C,0x00,0x43,0x10, ++0x20,0x00,0xA6,0x30, ++0x00,0x1E,0x05,0x00, ++0x03,0x1E,0x03,0x00, ++0x64,0x00,0x02,0x24, ++0x49,0x00,0x62,0x10, ++0x40,0x00,0x02,0x24, ++0x81,0x00,0x62,0x10, ++0x21,0x00,0x02,0x24, ++0x92,0x00,0x62,0x10, ++0x63,0x00,0x02,0x24, ++0xA2,0x00,0x62,0x10, ++0x11,0x00,0xB3,0x27, ++0x10,0x00,0xA5,0xA3, ++0x21,0x80,0xC0,0x03, ++0x2B,0x10,0x13,0x02, ++0xB4,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x6C,0x00,0x80,0x12, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x02,0x92, ++0x01,0x00,0x10,0x26, ++0x00,0x00,0x22,0xA2, ++0x81,0x54,0x00,0x08, ++0x01,0x00,0x31,0x26, ++0x00,0x00,0xA2,0x8E, ++0x04,0x00,0xB5,0x26, ++0x21,0x80,0x40,0x00, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0xA6,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x63,0x00,0x80,0x12, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x22,0xA2, ++0x01,0x00,0x10,0x26, ++0x8E,0x54,0x00,0x08, ++0x01,0x00,0x31,0x26, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x68,0x00,0x03,0x24, ++0x00,0x16,0x05,0x00, ++0x03,0x16,0x02,0x00, ++0xCC,0xFF,0x43,0x14, ++0x01,0x00,0x07,0x24, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x05,0x00, ++0x03,0x16,0x02,0x00, ++0xC9,0xFF,0x43,0x14, ++0x0C,0x00,0x04,0x24, ++0x01,0x00,0x52,0x26, ++0x00,0x00,0x45,0x92, ++0x78,0x00,0x03,0x24, ++0x20,0x00,0xA2,0x34, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0xC7,0xFF,0x43,0x14, ++0x04,0x00,0x04,0x24, ++0x20,0x00,0xA6,0x30, ++0x00,0x00,0xA5,0x8E, ++0x35,0x00,0xE0,0x14, ++0x04,0x00,0xB5,0x26, ++0xCD,0xFF,0x80,0x04, ++0x02,0x80,0x02,0x3C, ++0x48,0xED,0x42,0x24, ++0x00,0x00,0x47,0x8C, ++0x07,0x10,0x85,0x00, ++0x0F,0x00,0x42,0x30, ++0x21,0x10,0x47,0x00, ++0x00,0x00,0x43,0x90, ++0xFC,0xFF,0x84,0x24, ++0x25,0x18,0xC3,0x00, ++0x00,0x00,0x63,0xA2, ++0xF8,0xFF,0x81,0x04, ++0x01,0x00,0x73,0x26, ++0x81,0x54,0x00,0x08, ++0x21,0x80,0xC0,0x03, ++0x00,0x00,0xA2,0x8E, ++0x04,0x00,0xB5,0x26, ++0x28,0x00,0x40,0x04, ++0x21,0x28,0x40,0x00, ++0x21,0x80,0x60,0x02, ++0x02,0x80,0x02,0x3C, ++0x4C,0xED,0x42,0x24, ++0x00,0x00,0x46,0x8C, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xA6,0x00, ++0xC3,0x27,0x05,0x00, ++0x10,0x10,0x00,0x00, ++0x83,0x10,0x02,0x00, ++0x23,0x10,0x44,0x00, ++0x80,0x18,0x02,0x00, ++0x21,0x18,0x62,0x00, ++0x40,0x18,0x03,0x00, ++0x23,0x18,0xA3,0x00, ++0x30,0x00,0x63,0x24, ++0x00,0x00,0x63,0xA2, ++0x21,0x28,0x40,0x00, ++0xF3,0xFF,0x40,0x14, ++0x01,0x00,0x73,0x26, ++0xE1,0x54,0x00,0x08, ++0xFF,0xFF,0x63,0x26, ++0x00,0x00,0x65,0x80, ++0x00,0x00,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x62,0xA0, ++0x00,0x00,0x05,0xA2, ++0xFF,0xFF,0x63,0x24, ++0x01,0x00,0x10,0x26, ++0x2B,0x10,0x03,0x02, ++0xF7,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x81,0x54,0x00,0x08, ++0x21,0x80,0xC0,0x03, ++0x58,0x00,0xC3,0x34, ++0x30,0x00,0x02,0x24, ++0x12,0x00,0xB3,0x27, ++0x10,0x00,0xA2,0xA3, ++0xB2,0x54,0x00,0x08, ++0x11,0x00,0xA3,0xA3, ++0x2D,0x00,0x02,0x24, ++0x23,0x28,0x05,0x00, ++0x11,0x00,0xB3,0x27, ++0xC5,0x54,0x00,0x08, ++0x10,0x00,0xA2,0xA3, ++0x00,0x00,0x04,0x82, ++0x77,0x55,0x00,0x0C, ++0x01,0x00,0x10,0x26, ++0x82,0x54,0x00,0x08, ++0x2B,0x10,0x13,0x02, ++0x00,0x00,0x04,0x82, ++0x77,0x55,0x00,0x0C, ++0x01,0x00,0x10,0x26, ++0x8E,0x54,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA3,0x8E, ++0x28,0x00,0xB0,0x27, ++0x2C,0x00,0xA4,0x27, ++0x2B,0x10,0x04,0x02, ++0x28,0x00,0xA3,0xAF, ++0x0B,0x00,0x40,0x10, ++0x04,0x00,0xB5,0x26, ++0x21,0xB8,0x80,0x00, ++0x02,0x80,0x16,0x3C, ++0x00,0x00,0x06,0x92, ++0x21,0x20,0x60,0x02, ++0x01,0x00,0x10,0x26, ++0x24,0x55,0x00,0x0C, ++0xD0,0xE3,0xC5,0x26, ++0x2B,0x18,0x17,0x02, ++0xF9,0xFF,0x60,0x14, ++0x21,0x98,0x62,0x02, ++0x80,0x54,0x00,0x08, ++0xFF,0xFF,0x73,0x26, ++0x00,0x00,0xA2,0x8E, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x56,0x24, ++0x21,0x80,0x40,0x00, ++0x2B,0x10,0x56,0x00, ++0xF8,0xFF,0x40,0x10, ++0x04,0x00,0xB5,0x26, ++0x02,0x80,0x17,0x3C, ++0x00,0x00,0x06,0x82, ++0x21,0x20,0x60,0x02, ++0x01,0x00,0x10,0x26, ++0x24,0x55,0x00,0x0C, ++0xD4,0xE3,0xE5,0x26, ++0x2B,0x18,0x16,0x02, ++0xF9,0xFF,0x60,0x14, ++0x21,0x98,0x62,0x02, ++0x80,0x54,0x00,0x08, ++0xFF,0xFF,0x73,0x26, ++0x00,0x00,0xA2,0x8E, ++0x04,0x00,0xB5,0x26, ++0x80,0x54,0x00,0x08, ++0x10,0x00,0xA2,0xA3, ++0xE8,0xFF,0xBD,0x27, ++0x20,0x00,0xA6,0xAF, ++0x20,0x00,0xA6,0x27, ++0x10,0x00,0xBF,0xAF, ++0x24,0x00,0xA7,0xAF, ++0x1B,0x54,0x00,0x0C, ++0x1C,0x00,0xA5,0xAF, ++0x10,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x24,0x00,0xA5,0xAF, ++0x28,0x00,0xA6,0xAF, ++0x2C,0x00,0xA7,0xAF, ++0x20,0x00,0xA4,0xAF, ++0x00,0x60,0x11,0x40, ++0x01,0x00,0x21,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x25,0x24,0x00,0x0C, ++0xA0,0x00,0x04,0x24, ++0x19,0x00,0x40,0x10, ++0x21,0x80,0x40,0x00, ++0x08,0x00,0x44,0x94, ++0x20,0x00,0xA5,0x8F, ++0x02,0x80,0x02,0x3C, ++0x25,0x20,0x82,0x00, ++0x20,0x00,0x84,0x24, ++0x1B,0x54,0x00,0x0C, ++0x24,0x00,0xA6,0x27, ++0x01,0x00,0x42,0x24, ++0x13,0x00,0x03,0x24, ++0x81,0x00,0x44,0x2C, ++0x14,0x00,0x03,0xAE, ++0x17,0x00,0x80,0x14, ++0x0C,0x00,0x02,0xAE, ++0x00,0x60,0x01,0x40, ++0x01,0x00,0x21,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x88,0x88,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x88,0x88,0x63,0x34, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x55,0x55,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x91,0x40, ++0x99,0x99,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x99,0x99,0x63,0x34, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x30,0x09,0x00,0x0C, ++0x21,0x20,0x00,0x02, ++0x00,0x60,0x91,0x40, ++0x5D,0x55,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x02,0x80,0x06,0x3C, ++0x60,0xF3,0xC5,0x8C, ++0x02,0x80,0x02,0x3C, ++0x40,0xF3,0x42,0x24, ++0x03,0x00,0xA3,0x30, ++0x21,0x18,0x62,0x00, ++0x00,0x00,0x64,0x80, ++0x01,0x00,0xA5,0x24, ++0x77,0x55,0x00,0x0C, ++0x60,0xF3,0xC5,0xAC, ++0x10,0x00,0xBF,0x8F, ++0x08,0x00,0x04,0x24, ++0x77,0x55,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x00,0x26,0x04,0x00, ++0x03,0x26,0x04,0x00, ++0x00,0x00,0x84,0x48, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x26,0x04,0x00, ++0x03,0x26,0x04,0x00, ++0xF7,0xFF,0x82,0x24, ++0x05,0x00,0x42,0x2C, ++0x06,0x00,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x20,0x00,0x02,0x24, ++0x03,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x01,0x00,0x03,0x24, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0x00,0x60,0x02,0x40, ++0x01,0x00,0x41,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x03,0x3C, ++0xD4,0x5E,0x64,0xAC, ++0x00,0x60,0x82,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x05,0x3C, ++0x01,0x00,0x06,0x24, ++0x01,0x80,0x02,0x3C, ++0x04,0x30,0x86,0x00, ++0xF1,0x02,0xA7,0x34, ++0xED,0x02,0xA4,0x34, ++0x4C,0x56,0x42,0x24, ++0x18,0x03,0xA5,0x34, ++0x08,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xAC, ++0x00,0x00,0xE3,0xA0, ++0x00,0x00,0x80,0xA0, ++0x00,0x00,0x86,0xA0, ++0x00,0x00,0x80,0xA0, ++0x00,0x00,0x86,0xA0, ++0x00,0x00,0x80,0xA0, ++0x00,0x00,0x86,0xA0, ++0x00,0x00,0x80,0xA0, ++0x00,0x00,0x86,0xA0, ++0x00,0x00,0x80,0xA0, ++0x00,0x00,0xE0,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x82,0x8C, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0xC6,0x30, ++0x10,0x00,0x02,0x24, ++0x0C,0x00,0xC2,0x10, ++0x11,0x00,0xC3,0x28, ++0x06,0x00,0x60,0x10, ++0x20,0x00,0x02,0x24, ++0x08,0x00,0x02,0x24, ++0x0D,0x00,0xC2,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0xC2,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xA4, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x0A,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0xFF,0xFF,0xA5,0x24, ++0x00,0x2C,0x05,0x00, ++0xFD,0x00,0x63,0x30, ++0x03,0x2C,0x05,0x00, ++0xFF,0xFF,0x87,0x30, ++0x00,0x00,0x43,0xA0, ++0x1A,0x00,0xA0,0x04, ++0x00,0x00,0x00,0x00, ++0x21,0x30,0x40,0x00, ++0x07,0x10,0xA7,0x00, ++0x01,0x00,0x42,0x30, ++0xFD,0x00,0x64,0x30, ++0x00,0x00,0x42,0x38, ++0x02,0x00,0x63,0x34, ++0x0A,0x18,0x82,0x00, ++0x00,0x00,0xC3,0xA0, ++0x04,0x00,0x63,0x34, ++0x00,0x00,0xC3,0xA0, ++0x09,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x41,0x04, ++0xFF,0xFF,0x42,0x24, ++0xFB,0x00,0x63,0x30, ++0x00,0x00,0xC3,0xA0, ++0x04,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x41,0x04, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0xA2,0x24, ++0x00,0x2C,0x02,0x00, ++0x03,0x2C,0x05,0x00, ++0xEA,0xFF,0xA1,0x04, ++0x07,0x10,0xA7,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x0A,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0xFF,0xFF,0x84,0x24, ++0x00,0x24,0x04,0x00, ++0x03,0x24,0x04,0x00, ++0xFF,0x00,0x65,0x30, ++0x1D,0x00,0x80,0x04, ++0x21,0x38,0x00,0x00, ++0x21,0x30,0x40,0x00, ++0x01,0x00,0x08,0x24, ++0x04,0x00,0xA5,0x34, ++0x00,0x00,0xC5,0xA0, ++0x00,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x45,0x30, ++0x01,0x00,0xA3,0x30, ++0x05,0x00,0x60,0x10, ++0x04,0x00,0x02,0x24, ++0x04,0x10,0x88,0x00, ++0x25,0x10,0x47,0x00, ++0xFF,0xFF,0x47,0x30, ++0x04,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x41,0x04, ++0xFF,0xFF,0x42,0x24, ++0xFB,0x00,0xA5,0x30, ++0x00,0x00,0xC5,0xA0, ++0x09,0x00,0x02,0x24, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x41,0x04, ++0xFF,0xFF,0x42,0x24, ++0xFF,0xFF,0x82,0x24, ++0x00,0x24,0x02,0x00, ++0x03,0x24,0x04,0x00, ++0xE7,0xFF,0x81,0x04, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xE0,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x25,0xB0,0x10,0x3C, ++0x0A,0x00,0x10,0x36, ++0x18,0x00,0xBF,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x00,0x00,0x02,0x92, ++0xFF,0xFF,0x91,0x30, ++0x03,0x00,0x05,0x24, ++0xC0,0x00,0x42,0x30, ++0x80,0x00,0x43,0x34, ++0x00,0x00,0x03,0xA2, ++0x04,0x00,0x63,0x34, ++0x00,0x00,0x03,0xA2, ++0xFB,0x00,0x63,0x30, ++0x00,0x00,0x03,0xA2, ++0x08,0x00,0x63,0x34, ++0x00,0x00,0x03,0xA2, ++0x04,0x00,0x63,0x34, ++0x00,0x00,0x03,0xA2, ++0xFB,0x00,0x63,0x30, ++0x00,0x00,0x03,0xA2, ++0xC9,0x55,0x00,0x0C, ++0x06,0x00,0x04,0x24, ++0x42,0x20,0x11,0x00, ++0xC9,0x55,0x00,0x0C, ++0x06,0x00,0x05,0x24, ++0xEF,0x55,0x00,0x0C, ++0x10,0x00,0x04,0x24, ++0x00,0x00,0x03,0x92, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0xC0,0x00,0x63,0x30, ++0x00,0x00,0x03,0xA2, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0xFF,0xFF,0xB1,0x30, ++0x18,0x00,0xB2,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x21,0x90,0xC0,0x00, ++0x0A,0x00,0x20,0x12, ++0xFF,0xFF,0x90,0x30, ++0x16,0x56,0x00,0x0C, ++0x21,0x20,0x00,0x02, ++0xFE,0xFF,0x23,0x26, ++0x02,0x00,0x04,0x26, ++0x00,0x00,0x42,0xA6, ++0xFF,0xFF,0x71,0x30, ++0xFF,0xFF,0x90,0x30, ++0xF8,0xFF,0x20,0x16, ++0x02,0x00,0x52,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xBE,0xAF, ++0x2C,0x00,0xB7,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x0A,0x00,0x67,0x34, ++0x00,0x00,0xE2,0x90, ++0xFF,0xFF,0xB2,0x30, ++0x21,0x98,0xC0,0x00, ++0xFF,0x00,0x91,0x30, ++0x20,0x00,0x40,0x12, ++0xFF,0x00,0x50,0x30, ++0x21,0xA0,0xE0,0x00, ++0x0C,0x00,0x77,0x34, ++0x0B,0x00,0x76,0x34, ++0x21,0xF0,0xE0,0x00, ++0xC0,0xFF,0x15,0x24, ++0x25,0x10,0x15,0x02, ++0xFF,0x00,0x50,0x30, ++0x00,0x00,0xD1,0xA2, ++0x00,0x00,0x90,0xA2, ++0x00,0x00,0x82,0x92, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x50,0x30, ++0xC0,0x00,0x03,0x32, ++0x07,0x00,0x60,0x10, ++0x21,0x20,0xC0,0x03, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x50,0x30, ++0xC0,0x00,0x03,0x32, ++0xFB,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xE2,0x8E, ++0x04,0x00,0x23,0x26, ++0x64,0x00,0x04,0x24, ++0x00,0x00,0x62,0xAE, ++0x25,0x22,0x00,0x0C, ++0xFF,0x00,0x71,0x30, ++0xFC,0xFF,0x42,0x26, ++0xFF,0xFF,0x52,0x30, ++0xE7,0xFF,0x40,0x16, ++0x04,0x00,0x73,0x26, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xBE,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x25,0xB0,0x06,0x3C, ++0x31,0x00,0xC2,0x34, ++0xFF,0xFF,0x84,0x30, ++0x00,0x00,0x44,0xA0, ++0x32,0x00,0xC7,0x34, ++0x00,0x00,0xE3,0x90, ++0xFC,0xFF,0x02,0x24, ++0x02,0x22,0x04,0x00, ++0x24,0x18,0x62,0x00, ++0x03,0x00,0x84,0x30, ++0x25,0x20,0x83,0x00, ++0x33,0x00,0xC6,0x34, ++0x72,0x00,0x02,0x24, ++0x00,0x00,0xE4,0xA0, ++0x00,0x00,0xC2,0xA0, ++0x00,0x00,0xC3,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x1E,0x03,0x00, ++0x03,0x1E,0x03,0x00, ++0x05,0x00,0x61,0x04, ++0x21,0x10,0x00,0x00, ++0xB5,0x56,0x00,0x08, ++0x25,0xB0,0x02,0x3C, ++0x11,0x00,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC3,0x90, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x00,0x1E,0x03,0x00, ++0x03,0x1E,0x03,0x00, ++0xF8,0xFF,0x61,0x04, ++0x64,0x00,0x44,0x2C, ++0x64,0x00,0x44,0x2C, ++0x07,0x00,0x80,0x10, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x30,0x00,0x42,0x34, ++0x00,0x00,0x43,0x90, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0xA3,0xA0, ++0xFF,0xFF,0x02,0x24, ++0x00,0x00,0xA2,0xA0, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x25,0xB0,0x06,0x3C, ++0x31,0x00,0xC2,0x34, ++0xFF,0xFF,0x84,0x30, ++0x00,0x00,0x44,0xA0, ++0x32,0x00,0xC3,0x34, ++0x00,0x00,0x62,0x90, ++0x02,0x22,0x04,0x00, ++0x03,0x00,0x84,0x30, ++0x25,0x20,0x82,0x00, ++0x00,0x00,0x64,0xA0, ++0x33,0x00,0xC7,0x34, ++0xFF,0x00,0xA5,0x30, ++0x30,0x00,0xC6,0x34, ++0xF2,0xFF,0x03,0x24, ++0x00,0x00,0xC5,0xA0, ++0x00,0x00,0xE3,0xA0, ++0x00,0x00,0xE2,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x16,0x02,0x00, ++0x03,0x16,0x02,0x00, ++0x03,0x00,0x40,0x04, ++0x21,0x20,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x01,0x00,0x02,0x24, ++0xDA,0x56,0x00,0x08, ++0x21,0x30,0xE0,0x00, ++0x0B,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC3,0x90, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x00,0x1E,0x03,0x00, ++0x03,0x1E,0x03,0x00, ++0xF8,0xFF,0x60,0x04, ++0x64,0x00,0x82,0x2C, ++0x64,0x00,0x82,0x2C, ++0xF1,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x25,0xB0,0x02,0x3C, ++0x18,0x00,0xB0,0xAF, ++0xF8,0x02,0x45,0x34, ++0x25,0xB0,0x10,0x3C, ++0xFF,0x00,0x83,0x30, ++0x01,0x00,0x02,0x24, ++0x1C,0x00,0xBF,0xAF, ++0x03,0x00,0x06,0x36, ++0x0A,0x00,0x62,0x10, ++0x0A,0x00,0x04,0x24, ++0x00,0x00,0xA2,0x90, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0xFE,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0xA2,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x20,0x00,0x43,0x34, ++0x20,0x00,0x42,0x30, ++0x02,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC3,0xA0, ++0x25,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x04,0x36, ++0x00,0x00,0x82,0x90, ++0xFE,0xFF,0x03,0x24, ++0xF8,0x02,0x06,0x36, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0x82,0xA0, ++0x00,0x00,0xC3,0x90, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0x00,0x00, ++0x03,0x00,0x63,0x34, ++0x00,0x00,0xC3,0xA0, ++0x91,0x56,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xFF,0x00,0x84,0x30, ++0x21,0x38,0x00,0x00, ++0x21,0x28,0x00,0x00, ++0x01,0x00,0xA3,0x24, ++0x07,0x10,0xA4,0x00, ++0x01,0x00,0x42,0x30, ++0xFF,0x00,0x65,0x30, ++0x01,0x00,0xE6,0x24, ++0x02,0x00,0x40,0x14, ++0x04,0x00,0xA3,0x2C, ++0xFF,0x00,0xC7,0x30, ++0xF7,0xFF,0x60,0x14, ++0x21,0x10,0xE0,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x8C,0x30, ++0x21,0x48,0x00,0x00, ++0x21,0x38,0x00,0x00, ++0x40,0x10,0x07,0x00, ++0xFF,0x00,0x42,0x30, ++0x21,0x50,0x46,0x00, ++0x01,0x00,0xE3,0x24, ++0x07,0x10,0xEC,0x00, ++0x01,0x00,0x42,0x30, ++0xFF,0x00,0x67,0x30, ++0x21,0x58,0x25,0x01, ++0x01,0x00,0x24,0x25, ++0x09,0x00,0x40,0x14, ++0x04,0x00,0xE8,0x2C, ++0x00,0x00,0x63,0x91, ++0xFF,0x00,0x89,0x30, ++0x21,0x20,0x25,0x01, ++0x00,0x00,0x43,0xA1, ++0x00,0x00,0x83,0x90, ++0x01,0x00,0x22,0x25, ++0xFF,0x00,0x49,0x30, ++0x01,0x00,0x43,0xA1, ++0xED,0xFF,0x00,0x15, ++0x40,0x10,0x07,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x24,0x00,0xBF,0xAF, ++0x01,0x00,0x12,0x24, ++0x21,0x80,0x00,0x00, ++0x57,0x57,0x00,0x08, ++0xFF,0x00,0x11,0x24, ++0x91,0x56,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x40,0x10, ++0x00,0x02,0x03,0x2E, ++0x0F,0x00,0x60,0x10, ++0x21,0x10,0x00,0x02, ++0x10,0x00,0xA2,0x93, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x51,0x10, ++0x0F,0x00,0x44,0x30, ++0x15,0x57,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x40,0x10,0x02,0x00, ++0x21,0x10,0x50,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x50,0x30, ++0x21,0x20,0x00,0x02, ++0xEE,0xFF,0x40,0x16, ++0x10,0x00,0xA5,0x27, ++0x21,0x10,0x00,0x02, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xB8,0xFF,0xBD,0x27, ++0x3C,0x00,0xB7,0xAF, ++0x38,0x00,0xB6,0xAF, ++0x34,0x00,0xB5,0xAF, ++0x30,0x00,0xB4,0xAF, ++0x2C,0x00,0xB3,0xAF, ++0x24,0x00,0xB1,0xAF, ++0x20,0x00,0xB0,0xAF, ++0x44,0x00,0xBF,0xAF, ++0x40,0x00,0xBE,0xAF, ++0x28,0x00,0xB2,0xAF, ++0x21,0x98,0xA0,0x00, ++0xFF,0x00,0x96,0x30, ++0x01,0x00,0x10,0x24, ++0x01,0x00,0x17,0x24, ++0x21,0xA0,0x00,0x00, ++0x21,0x88,0x00,0x00, ++0x21,0xA8,0x00,0x00, ++0x04,0x00,0xA0,0x10, ++0x21,0x18,0x00,0x00, ++0x10,0x00,0xC2,0x2E, ++0x0E,0x00,0x40,0x14, ++0x21,0x20,0xA0,0x00, ++0x44,0x00,0xBF,0x8F, ++0x40,0x00,0xBE,0x8F, ++0x3C,0x00,0xB7,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0x08,0x00,0x06,0x24, ++0xFF,0x51,0x00,0x0C, ++0xFF,0x00,0x05,0x24, ++0x18,0x00,0xA4,0x27, ++0xFF,0x00,0x05,0x24, ++0xFF,0x51,0x00,0x0C, ++0x08,0x00,0x06,0x24, ++0xE6,0x56,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x96,0x57,0x00,0x08, ++0x10,0x00,0xBE,0x27, ++0x1C,0x00,0x40,0x14, ++0x21,0x20,0xA0,0x02, ++0x37,0x00,0xE0,0x12, ++0x00,0x02,0x22,0x2E, ++0x35,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x02,0x32, ++0xF8,0xFF,0x40,0x10, ++0x20,0x00,0x02,0x32, ++0x21,0x20,0x20,0x02, ++0x91,0x56,0x00,0x0C, ++0x10,0x00,0xA5,0x27, ++0x2D,0x00,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x10,0x00,0xB0,0x93, ++0x00,0x00,0x00,0x00, ++0x29,0x00,0x02,0x12, ++0x0F,0x00,0x15,0x32, ++0x15,0x57,0x00,0x0C, ++0x21,0x20,0xA0,0x02, ++0x02,0x81,0x10,0x00, ++0x10,0x00,0x16,0x12, ++0x21,0xA0,0x40,0x00, ++0x40,0x10,0x14,0x00, ++0x21,0x10,0x51,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x51,0x30, ++0x92,0x57,0x00,0x08, ++0x01,0x00,0x10,0x24, ++0x18,0x00,0xA5,0x27, ++0x24,0x57,0x00,0x0C, ++0x21,0x30,0x60,0x02, ++0x40,0x10,0x14,0x00, ++0x21,0x10,0x51,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x51,0x30, ++0x92,0x57,0x00,0x08, ++0x01,0x00,0x10,0x24, ++0x40,0x90,0x02,0x00, ++0x10,0x00,0x40,0x1A, ++0x21,0x80,0x00,0x00, ++0x21,0x20,0x30,0x02, ++0x01,0x00,0x84,0x24, ++0xFF,0xFF,0x84,0x30, ++0x91,0x56,0x00,0x0C, ++0x10,0x00,0xA5,0x27, ++0x01,0x00,0x03,0x26, ++0x21,0x20,0xD0,0x03, ++0xFF,0x00,0x70,0x30, ++0x04,0x00,0x40,0x10, ++0x2A,0x18,0x12,0x02, ++0x10,0x00,0xA2,0x93, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x82,0xA0, ++0xF3,0xFF,0x60,0x14, ++0x21,0x20,0x30,0x02, ++0x92,0x57,0x00,0x08, ++0x20,0x00,0x10,0x24, ++0xE6,0x56,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0x63,0x92, ++0xFF,0x00,0x02,0x24, ++0x0F,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x24, ++0x44,0x00,0xBF,0x8F, ++0x40,0x00,0xBE,0x8F, ++0x3C,0x00,0xB7,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0x01,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0xF0,0xFF,0x43,0x14, ++0x01,0x00,0x03,0x24, ++0x02,0x00,0x63,0x92, ++0x00,0x00,0x00,0x00, ++0xEB,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0x43,0x14, ++0x01,0x00,0x03,0x24, ++0x04,0x00,0x63,0x92, ++0x00,0x00,0x00,0x00, ++0xE3,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x05,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0xDF,0xFF,0x43,0x14, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x67,0x92, ++0x00,0x00,0x00,0x00, ++0xDC,0xFF,0xE2,0x14, ++0x01,0x00,0x03,0x24, ++0x07,0x00,0x62,0x92, ++0x00,0x00,0x00,0x00, ++0x7F,0xFF,0x47,0x10, ++0x21,0x18,0x00,0x00, ++0xD1,0x57,0x00,0x08, ++0x01,0x00,0x03,0x24, ++0xC0,0xFF,0xBD,0x27, ++0x38,0x00,0xBE,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x21,0xF0,0xC0,0x00, ++0xFF,0x00,0xB6,0x30, ++0xFF,0xFF,0x95,0x30, ++0xFF,0x00,0x05,0x24, ++0x10,0x00,0xA4,0x27, ++0x08,0x00,0x06,0x24, ++0x34,0x00,0xB7,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x3C,0x00,0xBF,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0xFF,0x51,0x00,0x0C, ++0x0F,0x00,0x17,0x24, ++0x21,0x98,0x00,0x00, ++0x40,0x10,0x13,0x00, ++0xFF,0x00,0x52,0x30, ++0x07,0x10,0x76,0x02, ++0x01,0x00,0x42,0x30, ++0x21,0xA0,0x5E,0x02, ++0x21,0x88,0xA0,0x02, ++0x21,0x20,0xA0,0x02, ++0x13,0x00,0x40,0x10, ++0x01,0x00,0xA3,0x26, ++0x01,0x00,0x62,0x26, ++0xFF,0x00,0x53,0x30, ++0x04,0x00,0x63,0x2E, ++0xF4,0xFF,0x60,0x14, ++0x40,0x10,0x13,0x00, ++0x21,0x10,0xE0,0x02, ++0x3C,0x00,0xBF,0x8F, ++0x38,0x00,0xBE,0x8F, ++0x34,0x00,0xB7,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x40,0x00,0xBD,0x27, ++0x00,0x00,0x85,0x92, ++0xFF,0xFF,0x75,0x30, ++0xBE,0x56,0x00,0x0C, ++0x21,0x80,0xA0,0x02, ++0x01,0x00,0x85,0x92, ++0x21,0x20,0xA0,0x02, ++0x01,0x00,0xA2,0x26, ++0xBE,0x56,0x00,0x0C, ++0xFF,0xFF,0x55,0x30, ++0x10,0x00,0xA3,0x27, ++0x21,0x90,0x72,0x00, ++0x21,0x20,0x20,0x02, ++0x91,0x56,0x00,0x0C, ++0x21,0x28,0x40,0x02, ++0x21,0x20,0x00,0x02, ++0x91,0x56,0x00,0x0C, ++0x01,0x00,0x45,0x26, ++0x00,0x00,0x84,0x92, ++0x00,0x00,0x42,0x92, ++0x01,0x00,0x03,0x24, ++0x04,0x18,0x63,0x02, ++0x03,0x00,0x82,0x10, ++0x27,0x30,0x03,0x00, ++0x19,0x58,0x00,0x08, ++0x24,0xB8,0xD7,0x00, ++0x01,0x00,0x83,0x92, ++0x01,0x00,0x42,0x92, ++0x00,0x00,0x00,0x00, ++0xD2,0xFF,0x62,0x10, ++0x01,0x00,0x62,0x26, ++0x1A,0x58,0x00,0x08, ++0x24,0xB8,0xD7,0x00, ++0x98,0xFF,0xBD,0x27, ++0x50,0x00,0xB4,0xAF, ++0xFF,0x00,0x94,0x30, ++0x01,0x00,0x04,0x24, ++0x64,0x00,0xBF,0xAF, ++0x60,0x00,0xBE,0xAF, ++0x5C,0x00,0xB7,0xAF, ++0x58,0x00,0xB6,0xAF, ++0x4C,0x00,0xB3,0xAF, ++0x48,0x00,0xB2,0xAF, ++0x44,0x00,0xB1,0xAF, ++0x21,0x98,0xC0,0x00, ++0xFF,0x00,0xB1,0x30, ++0x54,0x00,0xB5,0xAF, ++0xE6,0x56,0x00,0x0C, ++0x40,0x00,0xB0,0xAF, ++0x3E,0x57,0x00,0x0C, ++0x01,0x00,0x16,0x24, ++0x21,0x18,0x40,0x00, ++0xFF,0x01,0x42,0x2C, ++0x01,0x00,0x17,0x24, ++0x01,0x00,0x1E,0x24, ++0x21,0x90,0x00,0x00, ++0x0E,0x00,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x64,0x00,0xBF,0x8F, ++0x60,0x00,0xBE,0x8F, ++0x5C,0x00,0xB7,0x8F, ++0x58,0x00,0xB6,0x8F, ++0x54,0x00,0xB5,0x8F, ++0x50,0x00,0xB4,0x8F, ++0x4C,0x00,0xB3,0x8F, ++0x48,0x00,0xB2,0x8F, ++0x44,0x00,0xB1,0x8F, ++0x40,0x00,0xB0,0x8F, ++0x21,0x10,0x80,0x00, ++0x08,0x00,0xE0,0x03, ++0x68,0x00,0xBD,0x27, ++0xFF,0x01,0x02,0x24, ++0x23,0x10,0x43,0x00, ++0x1A,0x00,0xA4,0x27, ++0xFF,0x00,0x05,0x24, ++0x08,0x00,0x06,0x24, ++0xFF,0xFF,0x50,0x30, ++0x18,0x00,0xB4,0xA3, ++0xFF,0x51,0x00,0x0C, ++0x19,0x00,0xB1,0xA3, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x60,0x02, ++0x24,0x57,0x00,0x0C, ++0x1A,0x00,0xA6,0x27, ++0x19,0x00,0xA4,0x93, ++0x15,0x57,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0xA8,0x40,0x00, ++0xFF,0xFF,0x42,0x30, ++0x2B,0x10,0x02,0x02, ++0xDF,0xFF,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x01,0x00,0x02,0x24, ++0x09,0x00,0xC2,0x12, ++0x20,0x00,0x02,0x24, ++0x22,0x00,0xC2,0x12, ++0x00,0x00,0x00,0x00, ++0x3B,0x00,0xE0,0x12, ++0x00,0x02,0x42,0x2E, ++0x39,0x00,0x40,0x10, ++0x01,0x00,0x02,0x24, ++0xF9,0xFF,0xC2,0x16, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x40,0x02, ++0x10,0x00,0xA5,0x27, ++0x91,0x56,0x00,0x0C, ++0x01,0x00,0x13,0x24, ++0x41,0x00,0x40,0x10, ++0xFF,0x00,0x02,0x24, ++0x10,0x00,0xA5,0x93, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0xA4,0x30, ++0x3C,0x00,0x82,0x10, ++0x0F,0x00,0xA3,0x30, ++0x02,0x11,0x04,0x00, ++0x21,0x20,0x60,0x00, ++0x29,0x00,0xA3,0xA3, ++0x28,0x00,0xA2,0xA3, ++0x15,0x57,0x00,0x0C, ++0x11,0x00,0xA5,0xA3, ++0x21,0x80,0x40,0x00, ++0x28,0x00,0xA3,0x93, ++0x18,0x00,0xA2,0x93, ++0x00,0x00,0x00,0x00, ++0x5F,0x00,0x62,0x10, ++0x40,0x10,0x10,0x00, ++0x21,0x10,0x52,0x00, ++0x01,0x00,0x42,0x24, ++0x8B,0x58,0x00,0x08, ++0xFF,0xFF,0x52,0x30, ++0x19,0x00,0xA5,0x93, ++0x01,0x00,0x44,0x26, ++0xFF,0xFF,0x84,0x30, ++0xFC,0x57,0x00,0x0C, ++0x1A,0x00,0xA6,0x27, ++0x21,0x28,0x40,0x00, ++0x0F,0x00,0x43,0x30, ++0x0F,0x00,0x02,0x24, ++0x12,0x00,0x62,0x10, ++0x40,0x10,0x15,0x00, ++0x21,0x10,0x52,0x00, ++0x01,0x00,0x42,0x24, ++0x21,0x20,0xA0,0x00, ++0xFF,0xFF,0x52,0x30, ++0x18,0x00,0xB4,0xA3, ++0x15,0x57,0x00,0x0C, ++0x19,0x00,0xA5,0xA3, ++0x21,0xA8,0x40,0x00, ++0x02,0x80,0x03,0x3C, ++0x04,0xE4,0x62,0x8C, ++0x02,0x80,0x04,0x3C, ++0x01,0x00,0x16,0x24, ++0x01,0x00,0x42,0x24, ++0x04,0x00,0x43,0x28, ++0xC6,0xFF,0x60,0x14, ++0x04,0xE4,0x82,0xAC, ++0x21,0xF0,0x00,0x00, ++0xE6,0x56,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x21,0x20,0xC0,0x03, ++0x64,0x00,0xBF,0x8F, ++0x60,0x00,0xBE,0x8F, ++0x5C,0x00,0xB7,0x8F, ++0x58,0x00,0xB6,0x8F, ++0x54,0x00,0xB5,0x8F, ++0x50,0x00,0xB4,0x8F, ++0x4C,0x00,0xB3,0x8F, ++0x48,0x00,0xB2,0x8F, ++0x44,0x00,0xB1,0x8F, ++0x40,0x00,0xB0,0x8F, ++0x21,0x10,0x80,0x00, ++0x08,0x00,0xE0,0x03, ++0x68,0x00,0xBD,0x27, ++0x3E,0x57,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xFF,0x01,0x03,0x24, ++0x23,0x18,0x62,0x00, ++0xFF,0xFF,0x70,0x30, ++0xFF,0xFF,0xA2,0x32, ++0x2B,0x10,0x02,0x02, ++0xE7,0xFF,0x40,0x14, ++0x21,0x20,0x40,0x02, ++0x18,0x00,0xB0,0x93, ++0x19,0x00,0xA2,0x93, ++0x00,0x81,0x10,0x00, ++0x25,0x80,0x02,0x02, ++0xFF,0x00,0x10,0x32, ++0xBE,0x56,0x00,0x0C, ++0x21,0x28,0x00,0x02, ++0x21,0x20,0x40,0x02, ++0x91,0x56,0x00,0x0C, ++0x11,0x00,0xA5,0x27, ++0x11,0x00,0xA3,0x93, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x64,0x30, ++0x9D,0xFF,0x90,0x10, ++0x20,0x00,0x16,0x24, ++0xFF,0x00,0x02,0x24, ++0xCD,0xFF,0x82,0x10, ++0x0F,0x00,0x63,0x30, ++0x02,0x11,0x04,0x00, ++0x21,0x20,0x60,0x00, ++0x29,0x00,0xA3,0xA3, ++0x15,0x57,0x00,0x0C, ++0x28,0x00,0xA2,0xA3, ++0x38,0x00,0xA4,0x27, ++0xFF,0x00,0x05,0x24, ++0x08,0x00,0x06,0x24, ++0xFF,0x51,0x00,0x0C, ++0x21,0x80,0x40,0x00, ++0x28,0x00,0xA4,0x93, ++0x61,0x57,0x00,0x0C, ++0x38,0x00,0xA5,0x27, ++0x1F,0x00,0x40,0x14, ++0x01,0x00,0x44,0x26, ++0x40,0x10,0x10,0x00, ++0x21,0x10,0x52,0x00, ++0x01,0x00,0x42,0x24, ++0xBE,0x58,0x00,0x08, ++0xFF,0xFF,0x52,0x30, ++0x40,0x88,0x10,0x00, ++0x27,0x00,0x20,0x1A, ++0x21,0x80,0x00,0x00, ++0xFF,0x00,0x16,0x24, ++0x21,0x20,0x50,0x02, ++0x01,0x00,0x84,0x24, ++0xFF,0xFF,0x84,0x30, ++0x91,0x56,0x00,0x0C, ++0x10,0x00,0xA5,0x27, ++0x01,0x00,0x03,0x26, ++0xFF,0x00,0x70,0x30, ++0x05,0x00,0x40,0x10, ++0x2A,0x18,0x11,0x02, ++0x10,0x00,0xA2,0x93, ++0x00,0x00,0x00,0x00, ++0x26,0x10,0x56,0x00, ++0x0B,0x98,0x02,0x00, ++0xF3,0xFF,0x60,0x14, ++0x21,0x20,0x50,0x02, ++0x15,0x00,0x60,0x16, ++0x21,0x10,0x32,0x02, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x52,0x30, ++0x8B,0x58,0x00,0x08, ++0x01,0x00,0x16,0x24, ++0x29,0x00,0xA5,0x93, ++0xFF,0xFF,0x84,0x30, ++0xFC,0x57,0x00,0x0C, ++0x38,0x00,0xA6,0x27, ++0x21,0x28,0x40,0x00, ++0x0F,0x00,0x43,0x30, ++0x0F,0x00,0x02,0x24, ++0xDB,0xFF,0x62,0x10, ++0x40,0x10,0x10,0x00, ++0x28,0x00,0xA4,0x93, ++0x4B,0x58,0x00,0x0C, ++0x38,0x00,0xA6,0x27, ++0x3E,0x57,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xBE,0x58,0x00,0x08, ++0x21,0x90,0x40,0x00, ++0x19,0x00,0xA3,0x93, ++0x29,0x00,0xA6,0x93, ++0x0F,0x00,0x13,0x24, ++0x0E,0x00,0x10,0x24, ++0x25,0x18,0x66,0x00, ++0x01,0x00,0x62,0x30, ++0x0A,0x98,0x02,0x02, ++0x02,0x00,0x64,0x30, ++0xFD,0x00,0x62,0x32, ++0x0A,0x98,0x44,0x00, ++0x04,0x00,0x65,0x30, ++0xFB,0x00,0x62,0x32, ++0x0A,0x98,0x45,0x00, ++0x08,0x00,0x63,0x30, ++0xF7,0x00,0x62,0x32, ++0x0A,0x98,0x43,0x00, ++0x0F,0x00,0x64,0x32, ++0x0F,0x00,0x16,0x24, ++0x25,0x00,0x96,0x10, ++0x21,0x28,0xC0,0x00, ++0x01,0x00,0x44,0x26, ++0xFF,0xFF,0x84,0x30, ++0xFC,0x57,0x00,0x0C, ++0x1A,0x00,0xA6,0x27, ++0x21,0x28,0x40,0x00, ++0x0F,0x00,0x42,0x30, ++0x03,0x00,0x56,0x10, ++0x21,0x20,0x80,0x02, ++0x4B,0x58,0x00,0x0C, ++0x38,0x00,0xA6,0x27, ++0x19,0x00,0xA5,0x93, ++0x00,0x00,0x00,0x00, ++0x26,0x10,0x65,0x02, ++0x01,0x00,0x42,0x30, ++0x0A,0x80,0xC2,0x02, ++0x26,0x18,0x65,0x02, ++0x02,0x00,0x63,0x30, ++0xFD,0x00,0x04,0x32, ++0x0B,0x80,0x83,0x00, ++0x26,0x10,0x65,0x02, ++0x04,0x00,0x42,0x30, ++0xFB,0x00,0x03,0x32, ++0x0B,0x80,0x62,0x00, ++0x26,0x28,0x65,0x02, ++0x08,0x00,0xA5,0x30, ++0xF7,0x00,0x02,0x32, ++0x0B,0x80,0x45,0x00, ++0x0F,0x00,0x03,0x32, ++0x0D,0x00,0x76,0x10, ++0x00,0x00,0x00,0x00, ++0x3E,0x57,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x90,0x40,0x00, ++0x19,0x00,0xB0,0xA3, ++0xBE,0x58,0x00,0x08, ++0x18,0x00,0xB4,0xA3, ++0x21,0x10,0x32,0x02, ++0x01,0x00,0x42,0x24, ++0xFF,0xFF,0x52,0x30, ++0x01,0x00,0x16,0x24, ++0x8B,0x58,0x00,0x08, ++0x18,0x00,0xB4,0xA3, ++0xBE,0x58,0x00,0x08, ++0x21,0xB8,0x00,0x00, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x03,0x3C, ++0xBC,0x65,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x00,0x00,0x62,0xAC, ++0x00,0x00,0x83,0x90, ++0x30,0x00,0x02,0x24, ++0x05,0x00,0x62,0x10, ++0x21,0x20,0x00,0x00, ++0x31,0x00,0x02,0x24, ++0x02,0x00,0x62,0x10, ++0x01,0x00,0x04,0x24, ++0x07,0x00,0x04,0x24, ++0x93,0x55,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x02,0x3C, ++0x25,0xB0,0x03,0x3C, ++0xF8,0x65,0x42,0x24, ++0x18,0x03,0x63,0x34, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0x62,0xAC, ++0x08,0x00,0xE0,0x03, ++0x14,0x5E,0x80,0xAC, ++0x42,0xB0,0x02,0x3C, ++0x03,0x00,0x47,0x34, ++0x00,0x00,0xE3,0x90, ++0xFF,0x00,0x84,0x30, ++0x04,0x00,0x84,0x24, ++0xFF,0x00,0x65,0x30, ++0x01,0x00,0x02,0x24, ++0x04,0x30,0x82,0x00, ++0x07,0x18,0x85,0x00, ++0x25,0xB0,0x02,0x3C, ++0xE8,0x03,0x42,0x34, ++0x01,0x00,0x63,0x30, ++0x21,0x20,0xC0,0x00, ++0x00,0x00,0x45,0xA0, ++0x02,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xE6,0xA0, ++0x08,0x00,0xE0,0x03, ++0x24,0x10,0x85,0x00, ++0x00,0x60,0x03,0x40, ++0x01,0x00,0x61,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x02,0x80,0x02,0x3C, ++0x08,0xE4,0x42,0x24, ++0x04,0x00,0x45,0x8C, ++0x00,0x00,0x82,0xAC, ++0x04,0x00,0x44,0xAC, ++0x00,0x00,0xA4,0xAC, ++0x04,0x00,0x85,0xAC, ++0x00,0x60,0x83,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x03,0x40, ++0x01,0x00,0x61,0x34, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x04,0x00,0x85,0x8C, ++0x00,0x00,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA2,0xAC, ++0x04,0x00,0x45,0xAC, ++0x00,0x00,0x84,0xAC, ++0x04,0x00,0x84,0xAC, ++0x00,0x60,0x83,0x40, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xAC, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x24,0x04,0x00, ++0xFF,0x00,0x84,0x30, ++0xC0,0x18,0x04,0x00, ++0x21,0x18,0x64,0x00, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x64,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x1C,0x24,0x64,0x8C, ++0xFF,0xF1,0x02,0x24, ++0x24,0x20,0x82,0x00, ++0x08,0x00,0xE0,0x03, ++0x1C,0x24,0x64,0xAC, ++0x02,0x24,0x04,0x00, ++0xFF,0x00,0x84,0x30, ++0xC0,0x18,0x04,0x00, ++0x21,0x18,0x64,0x00, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x64,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x62,0x00, ++0x1C,0x24,0x64,0x8C, ++0xFF,0xF1,0x02,0x24, ++0x24,0x20,0x82,0x00, ++0x00,0x02,0x84,0x34, ++0x08,0x00,0xE0,0x03, ++0x1C,0x24,0x64,0xAC, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0xC0,0x80,0x04,0x00, ++0x21,0x80,0x04,0x02, ++0x80,0x80,0x10,0x00, ++0x21,0x80,0x04,0x02, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x80,0x10,0x00, ++0x21,0x80,0x02,0x02, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x24,0x05,0x8E, ++0xFF,0x1F,0x02,0x3C, ++0x25,0xB0,0x12,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x14,0x24,0x02,0xAE, ++0x84,0x01,0x43,0x36, ++0xF8,0xFF,0x02,0x24, ++0x00,0x00,0x66,0x8C, ++0x24,0x28,0xA2,0x00, ++0xFF,0xFE,0x02,0x24, ++0x24,0x28,0xA2,0x00, ++0xFF,0xEF,0x03,0x24, ++0x24,0x28,0xA3,0x00, ++0x18,0x24,0x06,0xAE, ++0x1C,0x24,0x05,0xAE, ++0xC9,0x24,0x00,0x0C, ++0x21,0x88,0x80,0x00, ++0x1E,0x24,0x02,0x92, ++0x21,0x88,0x32,0x02, ++0x1C,0x00,0xBF,0x8F, ++0x60,0x01,0x22,0xA2, ++0x18,0x00,0xB2,0x8F, ++0x08,0x24,0x00,0xAE, ++0xEC,0x23,0x00,0xAE, ++0xF0,0x23,0x00,0xAE, ++0xF4,0x23,0x00,0xAE, ++0xF8,0x23,0x00,0xAE, ++0xFC,0x23,0x00,0xAE, ++0x00,0x24,0x00,0xAE, ++0x04,0x24,0x00,0xAE, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xFF,0x00,0xA5,0x30, ++0xC0,0x10,0x05,0x00, ++0x21,0x10,0x45,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x45,0x00, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x1C,0x24,0x43,0x8C, ++0x25,0xB0,0x05,0x3C, ++0xFF,0x00,0xC6,0x30, ++0x21,0x30,0xC5,0x00, ++0xAF,0x01,0xC2,0x90, ++0x07,0x00,0x63,0x30, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x65,0x00, ++0xFF,0x00,0x88,0x30, ++0xFF,0x00,0x49,0x30, ++0x84,0x01,0x66,0x8C, ++0x21,0x50,0x00,0x00, ++0x21,0x58,0x00,0x00, ++0x2B,0x00,0x20,0x11, ++0x21,0x20,0x00,0x01, ++0x2B,0x00,0xC0,0x10, ++0x2B,0x10,0x09,0x01, ++0x21,0x28,0x00,0x00, ++0x2D,0x5A,0x00,0x08, ++0x01,0x00,0x07,0x24, ++0xFF,0x00,0x65,0x30, ++0x1D,0x00,0xA2,0x2C, ++0x07,0x00,0x40,0x10, ++0xFF,0xFF,0x02,0x25, ++0x04,0x10,0xA7,0x00, ++0x24,0x10,0x46,0x00, ++0xF9,0xFF,0x40,0x10, ++0x01,0x00,0xA3,0x24, ++0x21,0x58,0xA0,0x00, ++0xFF,0xFF,0x02,0x25, ++0xFF,0x00,0x45,0x30, ++0x2B,0x18,0xAB,0x00, ++0x0F,0x00,0x60,0x14, ++0x2B,0x10,0x49,0x01, ++0x01,0x00,0x04,0x24, ++0x04,0x10,0xA4,0x00, ++0x24,0x10,0x46,0x00, ++0xFF,0xFF,0xA7,0x24, ++0x04,0x00,0x40,0x10, ++0x01,0x00,0x43,0x25, ++0x17,0x00,0x49,0x11, ++0xFF,0x00,0x6A,0x30, ++0x21,0x40,0xA0,0x00, ++0xFF,0x00,0xE5,0x30, ++0x2B,0x10,0xAB,0x00, ++0xF6,0xFF,0x40,0x10, ++0x04,0x10,0xA4,0x00, ++0x2B,0x10,0x49,0x01, ++0x08,0x00,0x40,0x10, ++0x21,0x20,0x00,0x01, ++0x23,0x10,0x2A,0x01, ++0x2A,0x10,0x62,0x01, ++0x04,0x00,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x23,0x10,0x69,0x01, ++0x21,0x10,0x4A,0x00, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0xFD,0xFF,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x23,0x10,0x09,0x01, ++0x4E,0x5A,0x00,0x08, ++0xFF,0x00,0x44,0x30, ++0x21,0x20,0x00,0x01, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0xFF,0x00,0x84,0x30, ++0xC0,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x25,0xB0,0x06,0x3C, ++0x1C,0x24,0x43,0x8C, ++0xFF,0x00,0xA5,0x30, ++0x21,0x20,0x86,0x00, ++0x21,0x28,0xA6,0x00, ++0x60,0x01,0x82,0x90, ++0xAF,0x01,0xA4,0x90, ++0x07,0x00,0x63,0x30, ++0x80,0x18,0x03,0x00, ++0x21,0x18,0x66,0x00, ++0xFF,0x00,0x48,0x30, ++0xFF,0x00,0x89,0x30, ++0x84,0x01,0x66,0x8C, ++0x21,0x50,0x00,0x00, ++0x21,0x58,0x00,0x00, ++0x2B,0x00,0x20,0x11, ++0x21,0x20,0x00,0x01, ++0x2B,0x00,0xC0,0x10, ++0x2B,0x10,0x09,0x01, ++0x21,0x28,0x00,0x00, ++0x7B,0x5A,0x00,0x08, ++0x01,0x00,0x07,0x24, ++0xFF,0x00,0x65,0x30, ++0x1D,0x00,0xA2,0x2C, ++0x07,0x00,0x40,0x10, ++0xFF,0xFF,0x02,0x25, ++0x04,0x10,0xA7,0x00, ++0x24,0x10,0x46,0x00, ++0xF9,0xFF,0x40,0x10, ++0x01,0x00,0xA3,0x24, ++0x21,0x58,0xA0,0x00, ++0xFF,0xFF,0x02,0x25, ++0xFF,0x00,0x45,0x30, ++0x2B,0x18,0xAB,0x00, ++0x0F,0x00,0x60,0x14, ++0x2B,0x10,0x49,0x01, ++0x01,0x00,0x04,0x24, ++0x04,0x10,0xA4,0x00, ++0x24,0x10,0x46,0x00, ++0xFF,0xFF,0xA7,0x24, ++0x04,0x00,0x40,0x10, ++0x01,0x00,0x43,0x25, ++0x17,0x00,0x49,0x11, ++0xFF,0x00,0x6A,0x30, ++0x21,0x40,0xA0,0x00, ++0xFF,0x00,0xE5,0x30, ++0x2B,0x10,0xAB,0x00, ++0xF6,0xFF,0x40,0x10, ++0x04,0x10,0xA4,0x00, ++0x2B,0x10,0x49,0x01, ++0x08,0x00,0x40,0x10, ++0x21,0x20,0x00,0x01, ++0x23,0x10,0x2A,0x01, ++0x2A,0x10,0x62,0x01, ++0x04,0x00,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x23,0x10,0x69,0x01, ++0x21,0x10,0x4A,0x00, ++0xFF,0x00,0x44,0x30, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0xFD,0xFF,0x40,0x14, ++0x21,0x20,0x00,0x00, ++0x23,0x10,0x09,0x01, ++0x9C,0x5A,0x00,0x08, ++0xFF,0x00,0x44,0x30, ++0x21,0x20,0x00,0x01, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x80,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x10,0x00,0xB0,0xAF, ++0x30,0x1F,0x50,0x24, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x21,0x88,0x00,0x00, ++0x21,0x90,0x00,0x02, ++0xDD,0x59,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x1E,0x24,0x02,0x92, ++0x21,0x28,0x00,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x52,0x00, ++0x60,0x05,0x44,0x8C, ++0xD4,0x05,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x21,0x18,0x64,0x00, ++0x42,0x18,0x03,0x00, ++0xE8,0x23,0x03,0xAE, ++0x21,0x10,0x05,0x02, ++0x01,0x00,0xA5,0x24, ++0x1D,0x00,0xA3,0x28, ++0x5A,0x24,0x40,0xA0, ++0x20,0x24,0x40,0xA0, ++0xFA,0xFF,0x60,0x14, ++0x3D,0x24,0x40,0xA0, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0x22,0x2A, ++0x78,0x24,0x00,0xAE, ++0xE9,0xFF,0x40,0x14, ++0x94,0x00,0x10,0x26, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x28,0x00,0xB6,0xAF, ++0x02,0x80,0x16,0x3C, ++0x24,0x00,0xB5,0xAF, ++0x30,0x1F,0xC6,0x26, ++0x2C,0x00,0xBF,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x30,0x38,0xC2,0x8C, ++0xFF,0x00,0x8D,0x30, ++0xFF,0x00,0x03,0x24, ++0xFF,0xFF,0x42,0x38, ++0x21,0xA8,0x00,0x00, ++0xFF,0xFF,0x04,0x34, ++0x0A,0xA8,0x62,0x00, ++0xA4,0x00,0xA0,0x11, ++0x30,0x38,0xC4,0xAC, ++0x02,0x80,0x02,0x3C, ++0xE4,0xE7,0x45,0x24, ++0x04,0x05,0xC4,0x24, ++0xEB,0x5A,0x00,0x08, ++0x21,0x80,0x00,0x00, ++0x01,0x00,0x10,0x26, ++0x00,0x00,0x82,0xA0, ++0x1D,0x00,0x02,0x2A, ++0x0B,0x00,0x40,0x10, ++0x01,0x00,0x84,0x24, ++0x21,0x10,0x05,0x02, ++0x00,0x00,0x42,0x90, ++0x00,0x00,0x00,0x00, ++0xF7,0xFF,0x40,0x10, ++0xFD,0xFF,0x43,0x24, ++0x01,0x00,0x10,0x26, ++0x1D,0x00,0x02,0x2A, ++0x00,0x00,0x83,0xA0, ++0xF7,0xFF,0x40,0x14, ++0x01,0x00,0x84,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x4A,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x7C,0xE5,0x6C,0x24, ++0x04,0xE5,0x4B,0x24, ++0x21,0x80,0x00,0x00, ++0x21,0x48,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x21,0x40,0x2A,0x01, ++0x21,0x38,0x2C,0x01, ++0x21,0x10,0xE6,0x00, ++0x91,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x06,0x01, ++0x01,0x00,0xC6,0x24, ++0x05,0x00,0xC2,0x28, ++0x39,0x04,0x64,0xA0, ++0xF8,0xFF,0x40,0x14, ++0xA8,0x03,0x65,0xA0, ++0x21,0x10,0x0B,0x02, ++0x1D,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x0A,0x02, ++0x01,0x00,0x10,0x26, ++0x1D,0x00,0x02,0x2A, ++0xE7,0x04,0x64,0xA0, ++0xCA,0x04,0x65,0xA0, ++0xEB,0xFF,0x40,0x14, ++0x05,0x00,0x29,0x25, ++0x9A,0x00,0xA0,0x11, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x48,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x78,0xE8,0x69,0x24, ++0x04,0xE8,0x47,0x24, ++0x21,0x80,0x00,0x00, ++0x80,0x18,0x10,0x00, ++0x21,0x10,0x69,0x00, ++0x21,0x20,0x67,0x00, ++0x00,0x00,0x46,0x8C, ++0x00,0x00,0x85,0x8C, ++0x01,0x00,0x10,0x26, ++0x21,0x18,0x68,0x00, ++0x04,0x00,0x02,0x2A, ++0x60,0x05,0x65,0xAC, ++0xF6,0xFF,0x40,0x14, ++0xD4,0x05,0x66,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x49,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x78,0xE8,0x68,0x24, ++0x04,0xE8,0x47,0x24, ++0x04,0x00,0x10,0x24, ++0x80,0x20,0x10,0x00, ++0x21,0x10,0x88,0x00, ++0x21,0x30,0x87,0x00, ++0x00,0x00,0x45,0x8C, ++0x00,0x00,0xC3,0x8C, ++0x01,0x00,0x10,0x26, ++0x21,0x20,0x89,0x00, ++0x82,0x28,0x05,0x00, ++0x82,0x18,0x03,0x00, ++0x1D,0x00,0x02,0x2A, ++0x60,0x05,0x83,0xAC, ++0xF4,0xFF,0x40,0x14, ++0xD4,0x05,0x85,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x53,0x24, ++0x21,0x80,0x00,0x00, ++0x21,0xA0,0x60,0x02, ++0x21,0x90,0x00,0x00, ++0x46,0x5B,0x00,0x08, ++0x21,0x88,0x60,0x02, ++0x01,0x00,0x10,0x26, ++0x20,0x00,0x02,0x2A, ++0x94,0x00,0x31,0x26, ++0x32,0x00,0x40,0x10, ++0x94,0x00,0x52,0x26, ++0x1C,0x24,0x24,0x8E, ++0x01,0x00,0x03,0x24, ++0x02,0x13,0x04,0x00, ++0x01,0x00,0x42,0x30, ++0xF6,0xFF,0x43,0x14, ++0x07,0x00,0x82,0x30, ++0x25,0xB0,0x03,0x3C, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x43,0x00, ++0x84,0x01,0x45,0x8C, ++0x14,0x24,0x23,0x8E, ++0x21,0x20,0x00,0x02, ++0x24,0x28,0xA3,0x00, ++0xC9,0x24,0x00,0x0C, ++0x18,0x24,0x25,0xAE, ++0x1E,0x24,0x24,0x92, ++0x57,0x24,0x00,0x0C, ++0xFF,0x00,0x05,0x32, ++0x1E,0x24,0x23,0x92, ++0xEC,0x23,0x20,0xAE, ++0xF0,0x23,0x20,0xAE, ++0x80,0x18,0x03,0x00, ++0xF4,0x23,0x20,0xAE, ++0xF8,0x23,0x20,0xAE, ++0xFC,0x23,0x20,0xAE, ++0x00,0x24,0x20,0xAE, ++0x04,0x24,0x20,0xAE, ++0x08,0x24,0x20,0xAE, ++0x21,0x18,0x74,0x00, ++0x60,0x05,0x64,0x8C, ++0xD4,0x05,0x62,0x8C, ++0x21,0x30,0x00,0x00, ++0x21,0x28,0x53,0x02, ++0x21,0x10,0x44,0x00, ++0x42,0x10,0x02,0x00, ++0xE8,0x23,0x22,0xAE, ++0x21,0x10,0xA6,0x00, ++0x01,0x00,0xC6,0x24, ++0x1D,0x00,0xC3,0x28, ++0x5A,0x24,0x40,0xA0, ++0x20,0x24,0x40,0xA0, ++0xFA,0xFF,0x60,0x14, ++0x3D,0x24,0x40,0xA0, ++0x01,0x00,0x10,0x26, ++0x20,0x00,0x02,0x2A, ++0x78,0x24,0xA0,0xAC, ++0x94,0x00,0x31,0x26, ++0xD0,0xFF,0x40,0x14, ++0x94,0x00,0x52,0x26, ++0x02,0x00,0xA0,0x16, ++0x30,0x1F,0xC2,0x26, ++0x30,0x38,0x40,0xAC, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0xE4,0xE7,0x45,0x24, ++0x04,0x05,0xC4,0x24, ++0x21,0x80,0x00,0x00, ++0x21,0x10,0x05,0x02, ++0x00,0x00,0x43,0x90, ++0x01,0x00,0x10,0x26, ++0x1D,0x00,0x02,0x2A, ++0x00,0x00,0x83,0xA0, ++0xFA,0xFF,0x40,0x14, ++0x01,0x00,0x84,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x4A,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xA0,0xE6,0x6C,0x24, ++0x40,0xE5,0x4B,0x24, ++0x21,0x80,0x00,0x00, ++0x21,0x48,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x21,0x40,0x2A,0x01, ++0x21,0x38,0x2C,0x01, ++0x21,0x10,0xE6,0x00, ++0x91,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x06,0x01, ++0x01,0x00,0xC6,0x24, ++0x05,0x00,0xC2,0x28, ++0x39,0x04,0x64,0xA0, ++0xF8,0xFF,0x40,0x14, ++0xA8,0x03,0x65,0xA0, ++0x21,0x10,0x0B,0x02, ++0x1D,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x0A,0x02, ++0x01,0x00,0x10,0x26, ++0x1D,0x00,0x02,0x2A, ++0xE7,0x04,0x64,0xA0, ++0xCA,0x04,0x65,0xA0, ++0xEB,0xFF,0x40,0x14, ++0x05,0x00,0x29,0x25, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x49,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x78,0xE8,0x68,0x24, ++0x04,0xE8,0x47,0x24, ++0x21,0x80,0x00,0x00, ++0x80,0x18,0x10,0x00, ++0x21,0x10,0x68,0x00, ++0x21,0x20,0x67,0x00, ++0x00,0x00,0x46,0x8C, ++0x00,0x00,0x85,0x8C, ++0x01,0x00,0x10,0x26, ++0x21,0x18,0x69,0x00, ++0x1D,0x00,0x02,0x2A, ++0x60,0x05,0x65,0xAC, ++0xF6,0xFF,0x40,0x14, ++0xD4,0x05,0x66,0xAC, ++0x3B,0x5B,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0xD8,0xFF,0xBD,0x27, ++0xFF,0xFF,0x84,0x30, ++0x18,0x00,0xB2,0xAF, ++0xF0,0x01,0x92,0x30, ++0x02,0x91,0x12,0x00, ++0x14,0x00,0xB1,0xAF, ++0xC0,0x88,0x12,0x00, ++0x21,0x88,0x32,0x02, ++0x80,0x88,0x11,0x00, ++0x21,0x88,0x32,0x02, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x88,0x11,0x00, ++0x21,0x88,0x22,0x02, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x1C,0x24,0x30,0x8E, ++0x00,0x02,0x82,0x30, ++0xFF,0xFE,0x03,0x24, ++0x2B,0x10,0x02,0x00, ++0x00,0x10,0x10,0x36, ++0x24,0x80,0x03,0x02, ++0x00,0x12,0x02,0x00, ++0x25,0x80,0x02,0x02, ++0x14,0x24,0x25,0xAE, ++0x1C,0x24,0x30,0xAE, ++0x76,0x25,0x00,0x0C, ++0x21,0x98,0xA0,0x00, ++0xF8,0xFF,0x03,0x24, ++0x24,0x80,0x03,0x02, ++0x07,0x00,0x42,0x30, ++0x25,0x80,0x02,0x02, ++0x07,0x00,0x03,0x32, ++0x25,0xB0,0x02,0x3C, ++0x80,0x18,0x03,0x00, ++0x1C,0x24,0x30,0xAE, ++0x21,0x18,0x62,0x00, ++0x84,0x01,0x62,0x8C, ++0x21,0x20,0x40,0x02, ++0x24,0x10,0x53,0x00, ++0xC9,0x24,0x00,0x0C, ++0x18,0x24,0x22,0xAE, ++0x1E,0x24,0x24,0x92, ++0x21,0x28,0x40,0x02, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x57,0x24,0x00,0x08, ++0x28,0x00,0xBD,0x27, ++0xDD,0x59,0x00,0x08, ++0xFF,0x00,0x84,0x30, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x43,0x24, ++0x1F,0x00,0x04,0x24, ++0x1C,0x24,0x62,0x8C, ++0xFF,0xFF,0x84,0x24, ++0x00,0x10,0x42,0x34, ++0x1C,0x24,0x62,0xAC, ++0xFB,0xFF,0x81,0x04, ++0x94,0x00,0x63,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x85,0xAC, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x44,0x00,0x02,0x24, ++0x10,0x00,0xA2,0xA3, ++0x49,0x00,0x03,0x24, ++0x47,0x00,0x02,0x24, ++0x02,0x80,0x07,0x3C, ++0xD4,0xF3,0xE7,0x24, ++0x11,0x00,0xA3,0xA3, ++0x12,0x00,0xA2,0xA3, ++0x10,0x27,0x03,0x24, ++0x01,0x00,0x02,0x24, ++0x01,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0x20,0x73,0xC6,0x24, ++0x0C,0x00,0xE3,0xAC, ++0x14,0x00,0xE2,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD0,0xFF,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x2C,0x00,0xBF,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x03,0x0D,0x64,0x34, ++0x00,0x00,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x54,0x30, ++0x70,0x00,0x93,0x32, ++0x5D,0x00,0x60,0x12, ++0x42,0x00,0x63,0x34, ++0x8F,0x00,0x82,0x32, ++0x00,0x00,0x82,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x55,0x00,0x60,0x12, ++0x00,0x00,0x00,0x00, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0F,0x00,0x11,0x3C, ++0x21,0x20,0x00,0x00, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x21,0xA8,0x40,0x00, ++0x00,0x60,0x92,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x21,0x20,0x00,0x00, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x21,0xB0,0x40,0x00, ++0x00,0x60,0x92,0x40, ++0x64,0x00,0x04,0x24, ++0x54,0x22,0x00,0x0C, ++0x08,0x00,0x10,0x3C, ++0xFF,0xFF,0x10,0x36, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x01,0x00,0x12,0x3C, ++0x24,0x30,0xB0,0x02, ++0x25,0x30,0xD2,0x00, ++0xFF,0xFF,0x25,0x36, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x24,0x80,0xD0,0x02, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x25,0x30,0x12,0x02, ++0xFF,0xFF,0x25,0x36, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0F,0x00,0x10,0x3C, ++0x18,0x00,0x04,0x24, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x05,0x36, ++0x21,0x88,0x40,0x00, ++0x00,0x60,0x92,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x18,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x00,0x80,0x26,0x36, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0x25,0x00,0x60,0x16, ++0x25,0xB0,0x02,0x3C, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x25,0xB0,0x02,0x3C, ++0x42,0x00,0x42,0x34, ++0x30,0x00,0xBD,0x27, ++0x00,0x00,0x40,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x02,0x24, ++0x00,0x00,0x62,0xA0, ++0x00,0x60,0x12,0x40, ++0x01,0x00,0x41,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x0F,0x00,0x10,0x3C, ++0x18,0x00,0x04,0x24, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x05,0x36, ++0x21,0x88,0x40,0x00, ++0x00,0x60,0x92,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x18,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x00,0x80,0x26,0x36, ++0x25,0x22,0x00,0x0C, ++0x03,0x00,0x04,0x24, ++0xDD,0xFF,0x60,0x12, ++0x25,0xB0,0x02,0x3C, ++0x03,0x0D,0x42,0x34, ++0x00,0x00,0x54,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x0F,0x00,0x10,0x3C, ++0x21,0x30,0xA0,0x02, ++0xFF,0xFF,0x05,0x36, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x36, ++0x21,0x30,0xC0,0x02, ++0x5F,0x47,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x20,0x00,0x00, ++0xE6,0x44,0x00,0x08, ++0x30,0x00,0xBD,0x27, ++0xC8,0xFF,0xBD,0x27, ++0x28,0x00,0xB4,0xAF, ++0x02,0x80,0x14,0x3C, ++0x30,0x00,0xB6,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x30,0x1F,0x85,0x26, ++0x0C,0x00,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x82,0x17,0x02,0x00, ++0x01,0x00,0x42,0x30, ++0x08,0x00,0x40,0x14, ++0x06,0x00,0x16,0x24, ++0x08,0x00,0xA2,0x8C, ++0x01,0x00,0x03,0x24, ++0x42,0x17,0x02,0x00, ++0x03,0x00,0x42,0x30, ++0x57,0x00,0x43,0x10, ++0x25,0xB0,0x02,0x3C, ++0x30,0x1F,0x85,0x26, ++0x0C,0x00,0xA2,0x8C, ++0x01,0x00,0x03,0x24, ++0x82,0x17,0x02,0x00, ++0x01,0x00,0x44,0x30, ++0x0B,0x00,0x83,0x10, ++0x21,0x10,0x00,0x00, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x08,0x00,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x42,0x17,0x02,0x00, ++0x03,0x00,0x43,0x30, ++0xF1,0xFF,0x64,0x14, ++0x21,0x10,0x00,0x00, ++0x10,0x00,0xA2,0x8C, ++0x00,0x00,0x00,0x00, ++0x82,0x17,0x02,0x00, ++0x50,0x02,0x43,0x10, ++0x25,0xB0,0x02,0x3C, ++0xC7,0x02,0xB3,0x90, ++0x62,0x0C,0x42,0x34, ++0xFF,0x00,0x63,0x32, ++0x00,0x00,0x43,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x90,0x26, ++0xC6,0x02,0x02,0x92, ++0x00,0x00,0x00,0x00, ++0x83,0x00,0x40,0x10, ++0x01,0x00,0x02,0x24, ++0x25,0xB0,0x11,0x3C, ++0x03,0x0D,0x23,0x36, ++0x00,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x70,0x00,0x42,0x30, ++0xA9,0x00,0x40,0x14, ++0xCC,0x00,0x02,0x24, ++0xC4,0x02,0x02,0x96, ++0x00,0x00,0x00,0x00, ++0x23,0x20,0x53,0x00, ++0x2B,0x18,0x53,0x00, ++0x23,0x10,0x62,0x02, ++0x0A,0x10,0x83,0x00, ++0x03,0x00,0x42,0x2C, ++0x76,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xC4,0x02,0x03,0x92, ++0x63,0x0C,0x22,0x36, ++0x21,0x20,0x00,0x00, ++0x00,0x00,0x43,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x30,0x1F,0x83,0x26, ++0xC3,0x02,0x62,0x90, ++0x08,0x00,0x66,0x8C, ++0xC2,0x02,0x73,0xA0, ++0x23,0x20,0x53,0x00, ++0x02,0x2C,0x06,0x00, ++0x2B,0x40,0x62,0x02, ++0x23,0x90,0x62,0x02, ++0x0B,0x90,0x88,0x00, ++0x3F,0x00,0xA7,0x30, ++0x3F,0x00,0xC6,0x30, ++0x24,0x00,0x02,0x24, ++0x20,0x00,0x03,0x24, ++0x23,0x10,0x46,0x00, ++0x91,0x00,0x40,0x16, ++0x23,0x20,0x67,0x00, ++0xE6,0x5C,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x80,0x0C,0x42,0x34, ++0x00,0x00,0x43,0x8C, ++0x21,0x30,0xA0,0x00, ++0xC0,0xFF,0x02,0x3C, ++0x24,0x20,0x62,0x00, ++0x21,0x88,0x00,0x00, ++0xC0,0xFF,0x05,0x3C, ++0x42,0x5D,0x00,0x08, ++0x18,0x00,0xC3,0x24, ++0x01,0x00,0x31,0x26, ++0x25,0x00,0x22,0x2E, ++0x0D,0x00,0x40,0x10, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x45,0x00, ++0xF8,0xFF,0x44,0x14, ++0x04,0x00,0x63,0x24, ++0x08,0x00,0xC2,0x8C, ++0xC0,0xFF,0x03,0x24, ++0x3F,0x00,0x24,0x32, ++0x24,0x10,0x43,0x00, ++0x25,0x10,0x44,0x00, ++0x08,0x00,0xC2,0xAC, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x44,0x90, ++0x22,0x00,0x03,0x24, ++0x42,0x00,0x83,0x10, ++0x92,0x00,0x02,0x24, ++0x41,0x00,0x82,0x10, ++0x25,0xB0,0x02,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x24,0x0A,0x42,0x34, ++0x00,0x00,0x44,0x8C, ++0x3F,0x3F,0x03,0x3C, ++0x3F,0x3F,0x63,0x34, ++0x24,0x20,0x83,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xDE,0x1F,0x53,0x24, ++0xE6,0x20,0x72,0x24, ++0x21,0x88,0x00,0x00, ++0x69,0x5D,0x00,0x08, ++0x10,0x00,0xA4,0xAF, ++0x39,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x4B,0x00,0x40,0x10, ++0x30,0x1F,0x85,0x26, ++0x01,0x00,0x31,0x26, ++0x21,0x00,0x22,0x2E, ++0x17,0x00,0x40,0x10, ++0x30,0x1F,0x82,0x26, ++0xC0,0x80,0x11,0x00, ++0x10,0x00,0xA4,0x27, ++0x21,0x28,0x13,0x02, ++0x39,0x52,0x00,0x0C, ++0x04,0x00,0x06,0x24, ++0x21,0x28,0x12,0x02, ++0x10,0x00,0xA4,0x27, ++0xF0,0xFF,0x40,0x14, ++0x04,0x00,0x06,0x24, ++0x30,0x1F,0x85,0x26, ++0x08,0x00,0xA3,0x8C, ++0xC0,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x3F,0x00,0x24,0x32, ++0x24,0x18,0x62,0x00, ++0x00,0x24,0x04,0x00, ++0xFF,0x7F,0x02,0x3C, ++0x25,0x18,0x64,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x08,0x00,0xA3,0xAC, ++0x30,0x1F,0x82,0x26, ++0x0C,0x00,0x43,0x8C, ++0x00,0x40,0x04,0x3C, ++0x30,0x1F,0x85,0x26, ++0x25,0x18,0x64,0x00, ++0x0C,0x00,0x43,0xAC, ++0x0C,0x00,0xA2,0x8C, ++0x01,0x00,0x03,0x24, ++0x82,0x17,0x02,0x00, ++0x01,0x00,0x44,0x30, ++0x5D,0xFF,0x83,0x14, ++0x21,0x10,0x00,0x00, ++0xF0,0x5C,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xC6,0x02,0x02,0xA2, ++0x0A,0x5D,0x00,0x08, ++0xC4,0x02,0x13,0xA6, ++0x23,0x5C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x1A,0x5D,0x00,0x08, ++0xC4,0x02,0x13,0xA6, ++0x25,0xB0,0x02,0x3C, ++0x88,0x0C,0x42,0x34, ++0x00,0x00,0x44,0x8C, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x66,0x24, ++0xC0,0xFF,0x02,0x3C, ++0x24,0x20,0x82,0x00, ++0x21,0x88,0x00,0x00, ++0xC0,0xFF,0x05,0x3C, ++0xA2,0x5D,0x00,0x08, ++0x18,0x00,0xC3,0x24, ++0x01,0x00,0x31,0x26, ++0x25,0x00,0x22,0x2E, ++0xB4,0xFF,0x40,0x10, ++0x25,0xB0,0x02,0x3C, ++0x00,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x45,0x00, ++0xF8,0xFF,0x44,0x14, ++0x04,0x00,0x63,0x24, ++0x08,0x00,0xC2,0x8C, ++0x3F,0x00,0x23,0x32, ++0xFF,0xC0,0x04,0x24, ++0x24,0x10,0x44,0x00, ++0x00,0x1A,0x03,0x00, ++0x25,0x10,0x43,0x00, ++0x54,0x5D,0x00,0x08, ++0x08,0x00,0xC2,0xAC, ++0x08,0x00,0xA3,0x8C, ++0xC0,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x3F,0x00,0x24,0x32, ++0x24,0x18,0x62,0x00, ++0x00,0x24,0x04,0x00, ++0x25,0x18,0x64,0x00, ++0x00,0x80,0x02,0x3C, ++0x7D,0x5D,0x00,0x08, ++0x25,0x18,0x62,0x00, ++0x63,0x0C,0x23,0x36, ++0x00,0x00,0x62,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x24,0x5D,0x00,0x08, ++0x30,0x1F,0x83,0x26, ++0x71,0x01,0x00,0x11, ++0x23,0x28,0xF2,0x00, ++0x2B,0x10,0x42,0x02, ++0x21,0x18,0xD2,0x00, ++0x00,0x00,0x42,0x38, ++0x24,0x00,0x08,0x24, ++0x2B,0x20,0x44,0x02, ++0x0B,0x40,0x62,0x00, ++0x06,0x00,0x80,0x10, ++0x20,0x00,0x15,0x24, ++0x30,0x1F,0x83,0x26, ++0x0A,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x3F,0x00,0x42,0x30, ++0x21,0xA8,0x52,0x00, ++0x2B,0x28,0xC8,0x02, ++0x5E,0x01,0xA0,0x10, ++0x30,0x1F,0x82,0x26, ++0x80,0x10,0x08,0x00, ++0x30,0x1F,0x83,0x26, ++0x21,0x10,0x43,0x00, ++0x18,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x82,0x25,0x04,0x00, ++0x30,0x1F,0x86,0x26, ++0x0C,0x00,0xC3,0x8C, ++0x00,0x00,0x00,0x00, ++0xFF,0x03,0x67,0x30, ++0x47,0x01,0xE0,0x10, ++0x00,0x02,0x62,0x30, ++0x04,0x00,0x40,0x10, ++0x18,0x00,0xE4,0x00, ++0x00,0xFC,0x02,0x24, ++0x25,0x38,0xE2,0x00, ++0x18,0x00,0xE4,0x00, ++0x82,0x82,0x03,0x00, ++0xFF,0x03,0x10,0x32, ++0x00,0x02,0x03,0x32, ++0x12,0x10,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x03,0x00,0x60,0x10, ++0xFF,0x03,0x45,0x30, ++0x00,0xFC,0x02,0x24, ++0x25,0x80,0x02,0x02, ++0x18,0x00,0x04,0x02, ++0x80,0x1D,0x04,0x00, ++0x25,0xB0,0x11,0x3C, ++0x80,0x0C,0x24,0x36, ++0x94,0x0C,0x31,0x36, ++0x12,0x80,0x00,0x00, ++0x02,0x82,0x10,0x00, ++0x3F,0x00,0x02,0x32, ++0x00,0x14,0x02,0x00, ++0x25,0x18,0x62,0x00, ++0x25,0x18,0x65,0x00, ++0x21,0x28,0x60,0x00, ++0x02,0x5C,0x00,0x0C, ++0x10,0x00,0xA3,0xAF, ++0x00,0x00,0x23,0x8E, ++0xFF,0x0F,0x02,0x3C, ++0xC0,0x03,0x10,0x32, ++0xFF,0xFF,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0x80,0x85,0x10,0x00, ++0x25,0x18,0x70,0x00, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x60,0x00, ++0x10,0x00,0xA3,0xAF, ++0x02,0x5C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x83,0x26, ++0x08,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0xB9,0x00,0x40,0x04, ++0xC0,0x28,0x15,0x00, ++0x21,0x10,0xA3,0x00, ++0xAC,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x22,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xAD,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x23,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xAE,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x24,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xAF,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x25,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB0,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x26,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB1,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x27,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB2,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x28,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB3,0x00,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x29,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x44,0x90, ++0x22,0x00,0x03,0x24, ++0x03,0x00,0x83,0x10, ++0x92,0x00,0x02,0x24, ++0x73,0xFE,0x82,0x14, ++0x21,0x10,0x00,0x00, ++0x30,0x1F,0x82,0x26, ++0x08,0x00,0x43,0x8C, ++0x01,0x00,0x44,0x3A, ++0x24,0x00,0x02,0x24, ++0x02,0x1A,0x03,0x00, ++0x3F,0x00,0x63,0x30, ++0x01,0x00,0x84,0x30, ++0xF3,0x00,0x80,0x10, ++0x23,0x28,0x43,0x00, ++0x42,0x18,0x12,0x00, ++0x40,0x10,0x03,0x00, ++0x21,0x90,0x43,0x00, ++0x30,0x1F,0x83,0x26, ++0xC3,0x02,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x62,0x02, ++0xB8,0x00,0x40,0x10, ++0x2B,0x10,0x45,0x02, ++0x06,0x00,0x40,0x10, ++0x24,0x00,0x06,0x24, ++0x08,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x3F,0x00,0x42,0x30, ++0x21,0x30,0x52,0x00, ++0x2B,0x28,0xC6,0x02, ++0xB8,0x00,0xA0,0x10, ++0x30,0x1F,0x82,0x26, ++0x80,0x10,0x06,0x00, ++0x30,0x1F,0x83,0x26, ++0x21,0x10,0x43,0x00, ++0x18,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x82,0x25,0x04,0x00, ++0x30,0x1F,0x83,0x26, ++0x10,0x00,0x70,0x8C, ++0x00,0x00,0x00,0x00, ++0x82,0x3A,0x10,0x00, ++0xFF,0x03,0xE7,0x30, ++0xC5,0x00,0xE0,0x10, ++0x00,0x02,0xE2,0x30, ++0x04,0x00,0x40,0x10, ++0x18,0x00,0xE4,0x00, ++0x00,0xFC,0x02,0x24, ++0x25,0x38,0xE2,0x00, ++0x18,0x00,0xE4,0x00, ++0x02,0x85,0x10,0x00, ++0xFF,0x03,0x10,0x32, ++0x00,0x02,0x03,0x32, ++0x12,0x10,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x03,0x00,0x60,0x10, ++0xFF,0x03,0x45,0x30, ++0x00,0xFC,0x02,0x24, ++0x25,0x80,0x02,0x02, ++0x18,0x00,0x04,0x02, ++0x80,0x1D,0x04,0x00, ++0x25,0xB0,0x11,0x3C, ++0x88,0x0C,0x24,0x36, ++0x9C,0x0C,0x31,0x36, ++0x12,0x80,0x00,0x00, ++0x02,0x82,0x10,0x00, ++0x3F,0x00,0x02,0x32, ++0x00,0x14,0x02,0x00, ++0x25,0x18,0x62,0x00, ++0x25,0x18,0x65,0x00, ++0x21,0x28,0x60,0x00, ++0x02,0x5C,0x00,0x0C, ++0x10,0x00,0xA3,0xAF, ++0x00,0x00,0x23,0x8E, ++0xFF,0x0F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xC0,0x03,0x10,0x32, ++0x24,0x18,0x62,0x00, ++0x80,0x85,0x10,0x00, ++0x25,0x18,0x70,0x00, ++0x21,0x20,0x20,0x02, ++0x21,0x28,0x60,0x00, ++0x02,0x5C,0x00,0x0C, ++0x10,0x00,0xA3,0xAF, ++0xE6,0x5C,0x00,0x08, ++0x21,0x10,0x00,0x00, ++0x21,0x10,0xA3,0x00, ++0xB4,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x22,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB5,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x23,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB6,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x24,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB7,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x25,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB8,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x26,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xB9,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x27,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xBA,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x28,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x42,0x24, ++0x30,0x1F,0x82,0x26, ++0x21,0x10,0xA2,0x00, ++0xBB,0x01,0x44,0x90, ++0x25,0xB0,0x03,0x3C, ++0x29,0x0A,0x63,0x34, ++0x00,0x00,0x64,0xA0, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x6E,0x5E,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x36,0x00,0xA0,0x10, ++0x80,0x10,0x08,0x00, ++0x21,0x10,0x46,0x00, ++0x18,0x00,0x45,0x8C, ++0x25,0xB0,0x04,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x80,0x0C,0x84,0x34, ++0x25,0xB0,0x04,0x3C, ++0x94,0x0C,0x84,0x34, ++0x07,0x5E,0x00,0x08, ++0x21,0x28,0x00,0x00, ++0x30,0x00,0x43,0x8C, ++0xDB,0x5D,0x00,0x08, ++0x82,0x25,0x03,0x00, ++0x23,0x20,0xD2,0x00, ++0x2B,0x10,0x46,0x02, ++0x2B,0x18,0x47,0x02, ++0x21,0x40,0x00,0x00, ++0x21,0xA8,0x00,0x00, ++0x0B,0x40,0x82,0x00, ++0xD2,0x5D,0x00,0x08, ++0x0B,0xA8,0xA3,0x00, ++0x08,0x00,0x62,0x8C, ++0x00,0x00,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0x3F,0x00,0x42,0x30, ++0x2B,0x18,0x42,0x02, ++0x4A,0xFF,0x60,0x14, ++0x23,0x30,0x52,0x00, ++0x21,0x30,0x00,0x00, ++0x21,0x28,0x00,0x00, ++0x30,0x1F,0x82,0x26, ++0x30,0x00,0x43,0x8C, ++0x96,0x5E,0x00,0x08, ++0x82,0x25,0x03,0x00, ++0x0F,0x00,0x11,0x3C, ++0xFF,0xFF,0x25,0x36, ++0x60,0x00,0x06,0x24, ++0x5F,0x47,0x00,0x0C, ++0x24,0x00,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0xE8,0x03,0x04,0x24, ++0x00,0x60,0x10,0x40, ++0x01,0x00,0x01,0x36, ++0x01,0x00,0x21,0x38, ++0x00,0x60,0x81,0x40, ++0x24,0x00,0x04,0x24, ++0x8A,0x47,0x00,0x0C, ++0xFF,0xFF,0x25,0x36, ++0x1F,0x00,0x53,0x30, ++0x00,0x60,0x90,0x40, ++0x54,0x22,0x00,0x0C, ++0x64,0x00,0x04,0x24, ++0x06,0x5D,0x00,0x08, ++0x30,0x1F,0x90,0x26, ++0x30,0x00,0xC5,0x8C, ++0x2C,0x5F,0x00,0x08, ++0x25,0xB0,0x04,0x3C, ++0x13,0x00,0xA0,0x10, ++0x00,0x00,0x00,0x00, ++0x80,0x10,0x06,0x00, ++0x21,0x10,0x43,0x00, ++0x18,0x00,0x45,0x8C, ++0x25,0xB0,0x04,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x88,0x0C,0x84,0x34, ++0x25,0xB0,0x04,0x3C, ++0x9C,0x0C,0x84,0x34, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0xE6,0x5C,0x00,0x08, ++0x21,0x10,0x00,0x00, ++0xFF,0xFF,0x43,0x26, ++0x42,0x18,0x03,0x00, ++0x40,0x10,0x03,0x00, ++0x21,0x10,0x43,0x00, ++0x80,0x5E,0x00,0x08, ++0x01,0x00,0x52,0x24, ++0x30,0x00,0x65,0x8C, ++0x67,0x5F,0x00,0x08, ++0x25,0xB0,0x04,0x3C, ++0x00,0xFF,0x84,0x30, ++0x02,0x22,0x04,0x00, ++0x08,0x00,0x80,0x10, ++0x02,0x80,0x02,0x3C, ++0xFF,0x00,0x02,0x24, ++0x04,0x00,0x82,0x10, ++0xCC,0xFF,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x16,0x22,0x43,0xA0, ++0x02,0x80,0x02,0x3C, ++0x08,0x00,0xE0,0x03, ++0x16,0x22,0x44,0xA0, ++0x02,0x24,0x04,0x00, ++0xFF,0x00,0x84,0x30, ++0xC0,0x10,0x04,0x00, ++0x21,0x10,0x44,0x00, ++0x80,0x10,0x02,0x00, ++0x21,0x10,0x44,0x00, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x02,0x00, ++0x30,0x1F,0x63,0x24, ++0x20,0x00,0x84,0x2C, ++0x09,0x00,0x80,0x10, ++0x21,0x10,0x43,0x00, ++0x0C,0x24,0x43,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x02,0x19,0x03,0x00, ++0x7F,0x00,0x63,0x30, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xB0,0x55,0x43,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x74,0x03,0x42,0x34, ++0x02,0x19,0x03,0x00, ++0x7F,0x00,0x63,0x30, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x85,0x30, ++0xD2,0xFF,0xA3,0x24, ++0xFE,0xFF,0xA2,0x24, ++0xDA,0xFF,0xA4,0x24, ++0x04,0x00,0x63,0x2C, ++0x08,0x00,0x84,0x2C, ++0x06,0x00,0x60,0x14, ++0xFF,0x00,0x42,0x30, ++0xF0,0xFF,0xA2,0x24, ++0xFC,0xFF,0xA3,0x24, ++0x16,0x00,0x46,0x2C, ++0x03,0x00,0x80,0x10, ++0xFF,0x00,0x62,0x30, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xFA,0xFF,0xA3,0x24, ++0xFC,0xFF,0xC0,0x10, ++0x21,0x10,0xA0,0x00, ++0x08,0x00,0xE0,0x03, ++0xFF,0x00,0x62,0x30, ++0x25,0xB0,0x03,0x3C, ++0x03,0x0D,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x08,0x00,0x42,0x34, ++0x00,0x00,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x03,0x3C, ++0x03,0x0D,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xF7,0x00,0x42,0x30, ++0x00,0x00,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x03,0x3C, ++0x2D,0x0A,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0x3F,0x00,0x42,0x30, ++0x00,0x00,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x82,0x24, ++0x25,0xB0,0x03,0x3C, ++0x2D,0x0A,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x21,0x20,0x00,0x00, ++0xFF,0x00,0x42,0x30, ++0x80,0x00,0x42,0x34, ++0x00,0x00,0x62,0xA0, ++0x01,0x00,0x82,0x24, ++0xFF,0x00,0x44,0x30, ++0x06,0x00,0x83,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0xFF,0x00,0x03,0x3C, ++0x82,0x01,0x49,0x34, ++0x81,0x01,0x48,0x34, ++0x24,0x10,0x83,0x00, ++0x02,0x3C,0x02,0x00, ++0x00,0xFF,0x63,0x34, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x45,0x24, ++0x02,0x32,0x04,0x00, ++0x01,0x00,0x02,0x24, ++0x24,0x20,0x83,0x00, ++0xE6,0x1D,0xA2,0xA0, ++0xD4,0x1D,0xA0,0xAC, ++0xD8,0x1D,0xA0,0xAC, ++0xDC,0x1D,0xA0,0xAC, ++0x06,0x00,0x80,0x14, ++0xE0,0x1D,0xA0,0xAC, ++0x00,0x00,0x02,0x91, ++0x00,0x00,0x23,0x91, ++0xE4,0x1D,0xA2,0xA0, ++0x08,0x00,0xE0,0x03, ++0xE5,0x1D,0xA3,0xA0, ++0xE5,0x1D,0xA7,0xA0, ++0x08,0x00,0xE0,0x03, ++0xE4,0x1D,0xA6,0xA0, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x63,0x24, ++0xE5,0x1D,0x66,0x90, ++0xE4,0x1D,0x65,0x90, ++0x25,0xB0,0x02,0x3C, ++0x82,0x01,0x44,0x34, ++0x81,0x01,0x42,0x34, ++0x00,0x00,0x45,0xA0, ++0x00,0x00,0x86,0xA0, ++0x08,0x00,0xE0,0x03, ++0xE6,0x1D,0x60,0xA0, ++0x02,0x80,0x08,0x3C, ++0x30,0x1F,0x04,0x25, ++0xE6,0x1D,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x15,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0xD8,0x1D,0x82,0x8C, ++0xD4,0x1D,0x85,0x8C, ++0x25,0xB0,0x03,0x3C, ++0x40,0x11,0x02,0x00, ++0x2B,0x10,0xA2,0x00, ++0x82,0x01,0x67,0x34, ++0x0F,0x00,0x40,0x10, ++0x81,0x01,0x66,0x34, ++0xE5,0x1D,0x83,0x90, ++0xE4,0x1D,0x82,0x90, ++0xF0,0x00,0x63,0x30, ++0x1F,0x00,0x42,0x30, ++0x00,0x00,0xC2,0xA0, ++0x00,0x00,0xE3,0xA0, ++0x30,0x1F,0x02,0x25, ++0x01,0x00,0x03,0x24, ++0xE0,0x1D,0x40,0xAC, ++0xD4,0x1D,0x40,0xAC, ++0xD8,0x1D,0x40,0xAC, ++0xDC,0x1D,0x40,0xAC, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x60,0x00, ++0xDC,0x1D,0x82,0x8C, ++0x25,0xB0,0x03,0x3C, ++0x82,0x01,0x69,0x34, ++0x40,0x11,0x02,0x00, ++0x2B,0x10,0xA2,0x00, ++0x0E,0x00,0x40,0x14, ++0x81,0x01,0x66,0x34, ++0xE0,0x1D,0x82,0x8C, ++0x00,0x00,0x00,0x00, ++0x40,0x11,0x02,0x00, ++0x2B,0x10,0xA2,0x00, ++0x08,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0xE5,0x1D,0x83,0x90, ++0xE4,0x1D,0x82,0x90, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xC2,0xA0, ++0x00,0x00,0x23,0xA1, ++0x20,0x60,0x00,0x08, ++0x30,0x1F,0x02,0x25, ++0xE5,0x1D,0x83,0x90, ++0xE4,0x1D,0x82,0x90, ++0xF0,0x00,0x63,0x30, ++0x7F,0x00,0x42,0x30, ++0x00,0x00,0xC2,0xA0, ++0x00,0x00,0x23,0xA1, ++0x20,0x60,0x00,0x08, ++0x30,0x1F,0x02,0x25, ++0x00,0x00,0x85,0xAC, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x03,0x3C, ++0x33,0x02,0x65,0x34, ++0x00,0x11,0x04,0x00, ++0x00,0x00,0xA2,0xA0, ++0x30,0x02,0x63,0x34, ++0x00,0x00,0x65,0x8C, ++0x0F,0x00,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x28,0xA2,0x00, ++0x01,0x00,0x03,0x24, ++0x04,0x18,0x83,0x00, ++0x02,0x00,0xA0,0x10, ++0x21,0x10,0x00,0x00, ++0xFF,0xFF,0x62,0x30, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x25,0xB0,0x11,0x3C, ++0x18,0x00,0xB2,0xAF, ++0x4C,0x00,0x22,0x36, ++0x1C,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0x44,0x90, ++0x02,0x80,0x03,0x3C, ++0x02,0x00,0x02,0x24, ++0xFF,0x00,0x84,0x30, ++0x07,0x00,0x82,0x10, ++0x30,0x1F,0x72,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x8A,0x36,0x43,0x96, ++0x01,0x00,0x02,0x24, ++0xF7,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0xF2,0xFF,0x60,0x14, ++0x21,0x20,0x00,0x00, ++0x4C,0x60,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x04,0x24, ++0x4C,0x60,0x00,0x0C, ++0x21,0x80,0x40,0x00, ++0x25,0x80,0x02,0x02, ++0x02,0x80,0x04,0x3C, ++0x33,0x02,0x23,0x36, ++0x08,0x00,0x02,0x24, ++0xFF,0xFF,0x10,0x32, ++0x40,0x00,0x27,0x36, ++0xEC,0xE8,0x84,0x24, ++0x00,0x00,0x62,0xA0, ++0xE3,0xFF,0x00,0x16, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xE2,0x94, ++0x88,0x36,0x43,0x96, ++0xFF,0xDF,0x42,0x30, ++0x01,0x00,0x63,0x24, ++0x00,0x20,0x46,0x34, ++0x88,0x36,0x43,0xA6, ++0xFF,0xFF,0x65,0x30, ++0x00,0x00,0xE2,0xA4, ++0x00,0x00,0xE6,0xA4, ++0x2F,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x69,0x60,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0x21,0x20,0x82,0x00, ++0x00,0x00,0x85,0xAC, ++0x21,0x10,0x00,0x00, ++0x01,0x00,0x42,0x24, ++0xFF,0x00,0x42,0x30, ++0x06,0x00,0x43,0x2C, ++0xFC,0xFF,0x60,0x14, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0xDF,0x2F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x02,0x80,0x02,0x3C, ++0xE8,0x03,0x03,0x24, ++0x34,0x5F,0x43,0xAC, ++0x18,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xFA,0x5E,0x40,0xA0, ++0xFF,0x00,0x85,0x30, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x0C,0x5F,0x60,0xA0, ++0x08,0x00,0xA4,0x2C, ++0x0E,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x16,0x5F,0x60,0xA0, ++0xF4,0x5E,0x45,0xA0, ++0x2C,0x00,0x80,0x10, ++0x02,0x80,0x03,0x3C, ++0x80,0x10,0x05,0x00, ++0x94,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xD0,0x1B,0xA4,0x8C, ++0x00,0x70,0x02,0x3C, ++0x02,0x00,0x42,0x34, ++0x25,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xD0,0x1B,0xA4,0x8C, ++0x00,0x70,0x02,0x3C, ++0x02,0x00,0x42,0x34, ++0x27,0x10,0x02,0x00, ++0x24,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xD0,0x1B,0xA4,0x8C, ++0x00,0x70,0x02,0x3C, ++0x27,0x10,0x02,0x00, ++0x24,0x20,0x82,0x00, ++0x02,0x80,0x07,0x3C, ++0x41,0xB0,0x02,0x3C, ++0x01,0x00,0x03,0x24, ++0x00,0x00,0x44,0xAC, ++0x10,0x5F,0xE3,0xA0, ++0x10,0x5F,0xE6,0x90, ++0x02,0x80,0x02,0x3C, ++0xD0,0x1B,0xA4,0xAC, ++0x11,0x5F,0x46,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x05,0x3C, ++0x30,0x1F,0xA5,0x24, ++0xD0,0x1B,0xA4,0x8C, ++0x00,0x70,0x02,0x3C, ++0x27,0x10,0x02,0x00, ++0x24,0x20,0x82,0x00, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x64,0xAC, ++0x08,0x00,0xE0,0x03, ++0xD0,0x1B,0xA4,0xAC, ++0xE0,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x10,0x3C, ++0xF4,0x5E,0x02,0x92, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x21,0x90,0x80,0x00, ++0x1C,0x00,0x40,0x10, ++0xFF,0x00,0xB1,0x30, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x42,0x30, ++0x1C,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x02,0x80,0x03,0x3C, ++0xF6,0x5E,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x42,0x30, ++0x0C,0x00,0x42,0x28, ++0x06,0x00,0x40,0x10, ++0x08,0x00,0x02,0x24, ++0x00,0x00,0x44,0x96, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x83,0x30, ++0x1B,0x00,0x62,0x10, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x02,0x92, ++0x05,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x0B,0x00,0x43,0x10, ++0x02,0x80,0x03,0x3C, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x9B,0x30,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x0C,0x61,0x00,0x08, ++0x00,0x08,0x04,0x24, ++0x0F,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x24,0x10,0x22,0x02, ++0xF2,0xFF,0x40,0x10, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x04,0x00,0x42,0x34, ++0x0E,0x5F,0x62,0xA0, ++0x20,0x61,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x0D,0x5F,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x60,0x14, ++0x00,0x10,0x82,0x34, ++0x1B,0x61,0x00,0x08, ++0x00,0x00,0x42,0xA6, ++0x0C,0x00,0x04,0x24, ++0x64,0x31,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x1B,0x61,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0xFF,0x00,0xA5,0x30, ++0x10,0x00,0xB0,0xAF, ++0x14,0x00,0xBF,0xAF, ++0x18,0x00,0xA0,0x14, ++0xFF,0x00,0x90,0x30, ++0x2C,0x00,0x00,0x12, ++0x01,0x00,0x05,0x24, ++0x02,0x80,0x03,0x3C, ++0x01,0x00,0x07,0x24, ++0x0C,0x5F,0x67,0xA0, ++0x02,0x80,0x08,0x3C, ++0x0E,0x5F,0x02,0x91, ++0x02,0x00,0x04,0x24, ++0x21,0x28,0x00,0x00, ++0x02,0x00,0x42,0x34, ++0x00,0xF0,0x06,0x34, ++0x0E,0x5F,0x02,0xA1, ++0x8C,0x23,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x42,0xB0,0x02,0x3C, ++0x44,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x18,0x00,0xBD,0x27, ++0x00,0x00,0x43,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x0C,0x5F,0x43,0xA0, ++0x02,0x80,0x02,0x3C, ++0x0F,0x5F,0x43,0x90, ++0x0F,0x00,0x02,0x24, ++0x02,0x80,0x05,0x3C, ++0x0F,0x00,0x63,0x30, ++0x07,0x00,0x62,0x10, ++0x01,0x00,0x04,0x24, ++0x0E,0x5F,0xA2,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x34, ++0x0E,0x5F,0xA2,0xA0, ++0xFE,0x4E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xDB,0xFF,0x00,0x16, ++0x02,0x80,0x03,0x3C, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x0C,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0xFF,0x00,0xA5,0x30, ++0x14,0x00,0xB1,0xAF, ++0x18,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x03,0x00,0xA0,0x14, ++0xFF,0x00,0x91,0x30, ++0x3A,0x00,0x20,0x12, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x10,0x3C, ++0x0E,0x5F,0x02,0x92, ++0xFB,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x02,0xA2, ++0x10,0x00,0xA0,0x14, ++0x02,0x80,0x03,0x3C, ++0x0E,0x5F,0x02,0x92, ++0xFE,0xFF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x02,0xA2, ++0x19,0x00,0x20,0x16, ++0x02,0x80,0x02,0x3C, ++0x0E,0x5F,0x02,0x92, ++0xFD,0xFF,0x03,0x24, ++0x18,0x00,0xBF,0x8F, ++0x24,0x10,0x43,0x00, ++0x0E,0x5F,0x02,0xA2, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x01,0x00,0x04,0x24, ++0x0C,0x5F,0x64,0xA0, ++0x0E,0x5F,0x02,0x92, ++0x02,0x80,0x03,0x3C, ++0x01,0x00,0x42,0x34, ++0x0E,0x5F,0x02,0xA2, ++0x0D,0x5F,0x62,0x90, ++0x02,0x00,0x03,0x24, ++0xFF,0x00,0x42,0x30, ++0x23,0x00,0x43,0x10, ++0x00,0x00,0x00,0x00, ++0xFE,0x4E,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0xE9,0xFF,0x20,0x12, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x04,0x24, ++0x0C,0x5F,0x44,0xA0, ++0x0E,0x5F,0x03,0x92, ++0x02,0x00,0x04,0x24, ++0x21,0x28,0x00,0x00, ++0x02,0x00,0x63,0x34, ++0x00,0xF0,0x06,0x34, ++0x0E,0x5F,0x03,0xA2, ++0x8C,0x23,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x42,0xB0,0x02,0x3C, ++0x44,0x00,0x03,0x24, ++0x03,0x00,0x42,0x34, ++0x20,0x00,0xBD,0x27, ++0x00,0x00,0x43,0xA0, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x0C,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0xF5,0x5E,0x64,0x90, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x05,0x24, ++0xFF,0x00,0x84,0x30, ++0x64,0x31,0x00,0x08, ++0x20,0x00,0xBD,0x27, ++0x0D,0x30,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x0C,0x00,0x04,0x24, ++0x64,0x31,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x90,0x61,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB2,0xAF, ++0x0C,0x00,0xB1,0xAF, ++0x08,0x00,0xB0,0xAF, ++0x21,0x40,0xE0,0x00, ++0x21,0x90,0xA0,0x03, ++0x21,0x60,0xC0,0x00, ++0x21,0x78,0x80,0x00, ++0x45,0x00,0xE0,0x14, ++0x21,0x50,0xA0,0x00, ++0x2B,0x10,0xA6,0x00, ++0x78,0x00,0x40,0x10, ++0xFF,0xFF,0x02,0x34, ++0x2B,0x10,0x46,0x00, ++0x8F,0x01,0x40,0x10, ++0x21,0x28,0xC0,0x00, ++0xFF,0x00,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x10,0x00,0x03,0x24, ++0x2B,0x10,0x46,0x00, ++0x18,0x00,0x04,0x24, ++0x21,0x30,0x60,0x00, ++0x0B,0x30,0x82,0x00, ++0x02,0x80,0x03,0x3C, ++0x06,0x10,0xC5,0x00, ++0xB4,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x86,0x00, ++0x23,0x30,0x44,0x00, ++0x08,0x00,0xC0,0x10, ++0x02,0x4C,0x0C,0x00, ++0x23,0x10,0x46,0x00, ++0x06,0x10,0x4F,0x00, ++0x04,0x18,0xCA,0x00, ++0x25,0x50,0x62,0x00, ++0x04,0x60,0xCC,0x00, ++0x04,0x78,0xCF,0x00, ++0x02,0x4C,0x0C,0x00, ++0x1B,0x00,0x49,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x87,0x31, ++0x02,0x24,0x0F,0x00, ++0x12,0x18,0x00,0x00, ++0x10,0x28,0x00,0x00, ++0x00,0x14,0x05,0x00, ++0x25,0x28,0x44,0x00, ++0x18,0x00,0x67,0x00, ++0x12,0x58,0x00,0x00, ++0x2B,0x18,0xAB,0x00, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x49,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x08,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x28,0xAC,0x00, ++0x2B,0x10,0xAC,0x00, ++0x04,0x00,0x40,0x14, ++0x2B,0x10,0xAB,0x00, ++0x00,0x00,0x42,0x38, ++0x21,0x18,0xAC,0x00, ++0x0B,0x28,0x62,0x00, ++0x23,0x28,0xAB,0x00, ++0x1B,0x00,0xA9,0x00, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0xE4,0x31, ++0x12,0x18,0x00,0x00, ++0x10,0x40,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x8F,0x62,0x00,0x08, ++0x18,0x00,0x67,0x00, ++0x2B,0x10,0xA7,0x00, ++0x0A,0x00,0x40,0x10, ++0xFF,0xFF,0x02,0x34, ++0x10,0x00,0xB2,0x8F, ++0x0C,0x00,0xB1,0x8F, ++0x08,0x00,0xB0,0x8F, ++0x21,0x10,0x80,0x00, ++0x21,0x18,0xA0,0x00, ++0x00,0x00,0xA4,0xAF, ++0x04,0x00,0xA5,0xAF, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x2B,0x10,0x47,0x00, ++0xD2,0x00,0x40,0x10, ++0x00,0x01,0xE3,0x2C, ++0xFF,0x00,0x02,0x3C, ++0x10,0x00,0x03,0x24, ++0xFF,0xFF,0x42,0x34, ++0x2B,0x10,0x47,0x00, ++0x18,0x00,0x04,0x24, ++0x21,0x28,0x60,0x00, ++0x0B,0x28,0x82,0x00, ++0x06,0x10,0xA8,0x00, ++0x02,0x80,0x03,0x3C, ++0xB4,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x85,0x00, ++0x23,0x30,0x44,0x00, ++0xCE,0x00,0xC0,0x14, ++0x23,0x38,0x46,0x00, ++0x2B,0x10,0x0A,0x01, ++0x04,0x00,0x40,0x14, ++0x23,0x20,0xEC,0x01, ++0x2B,0x10,0xEC,0x01, ++0x05,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0xE4,0x01, ++0x23,0x18,0x48,0x01, ++0x23,0x50,0x62,0x00, ++0x21,0x78,0x80,0x00, ++0x04,0x00,0x40,0x12, ++0x21,0xC0,0xE0,0x01, ++0x21,0xC8,0x40,0x01, ++0x00,0x00,0x58,0xAE, ++0x04,0x00,0x59,0xAE, ++0x00,0x00,0xA2,0x8F, ++0x04,0x00,0xA3,0x8F, ++0x10,0x00,0xB2,0x8F, ++0x0C,0x00,0xB1,0x8F, ++0x08,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x53,0x00,0xC0,0x10, ++0x01,0x00,0x02,0x24, ++0xFF,0xFF,0x02,0x34, ++0x2B,0x10,0x4C,0x00, ++0x59,0x00,0x40,0x14, ++0xFF,0x00,0x02,0x3C, ++0x00,0x01,0x83,0x2D, ++0x08,0x00,0x02,0x24, ++0x21,0x28,0x00,0x00, ++0x0A,0x28,0x43,0x00, ++0x06,0x10,0xAC,0x00, ++0x02,0x80,0x03,0x3C, ++0xB4,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x85,0x00, ++0x23,0x30,0x44,0x00, ++0x5B,0x00,0xC0,0x14, ++0x00,0x00,0x00,0x00, ++0x23,0x50,0x4C,0x01, ++0x02,0x4C,0x0C,0x00, ++0xFF,0xFF,0x8D,0x31, ++0x1B,0x00,0x49,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x02,0x24,0x0F,0x00, ++0x12,0x18,0x00,0x00, ++0x10,0x28,0x00,0x00, ++0x00,0x14,0x05,0x00, ++0x25,0x28,0x44,0x00, ++0x18,0x00,0x6D,0x00, ++0x12,0x58,0x00,0x00, ++0x2B,0x18,0xAB,0x00, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x49,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x08,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x28,0xAC,0x00, ++0x2B,0x10,0xAC,0x00, ++0x04,0x00,0x40,0x14, ++0x2B,0x10,0xAB,0x00, ++0x00,0x00,0x42,0x38, ++0x21,0x18,0xAC,0x00, ++0x0B,0x28,0x62,0x00, ++0x23,0x28,0xAB,0x00, ++0x1B,0x00,0xA9,0x00, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0xE4,0x31, ++0x12,0x18,0x00,0x00, ++0x10,0x40,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0x6D,0x00, ++0x00,0x14,0x08,0x00, ++0x12,0x58,0x00,0x00, ++0x25,0x40,0x44,0x00, ++0x2B,0x18,0x0B,0x01, ++0x1B,0x00,0xA9,0x00, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x08,0x00,0x60,0x10, ++0x00,0x00,0x00,0x00, ++0x21,0x40,0x0C,0x01, ++0x2B,0x10,0x0C,0x01, ++0x04,0x00,0x40,0x14, ++0x2B,0x10,0x0B,0x01, ++0x21,0x18,0x0C,0x01, ++0x00,0x00,0x42,0x38, ++0x0B,0x40,0x62,0x00, ++0xAB,0xFF,0x40,0x12, ++0x23,0x78,0x0B,0x01, ++0x06,0xC0,0xCF,0x00, ++0x21,0xC8,0x00,0x00, ++0x00,0x00,0x58,0xAE, ++0x4C,0x62,0x00,0x08, ++0x04,0x00,0x59,0xAE, ++0x1B,0x00,0x47,0x00, ++0x02,0x00,0xE0,0x14, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x02,0x34, ++0x12,0x60,0x00,0x00, ++0x2B,0x10,0x4C,0x00, ++0xAB,0xFF,0x40,0x10, ++0x00,0x01,0x83,0x2D, ++0xFF,0x00,0x02,0x3C, ++0x10,0x00,0x03,0x24, ++0xFF,0xFF,0x42,0x34, ++0x2B,0x10,0x4C,0x00, ++0x18,0x00,0x04,0x24, ++0x21,0x28,0x60,0x00, ++0x0B,0x28,0x82,0x00, ++0x02,0x80,0x03,0x3C, ++0x06,0x10,0xAC,0x00, ++0xB4,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x85,0x00, ++0x23,0x30,0x44,0x00, ++0xA7,0xFF,0xC0,0x10, ++0x00,0x00,0x00,0x00, ++0x23,0x38,0x46,0x00, ++0x04,0x60,0xCC,0x00, ++0x06,0x58,0xEA,0x00, ++0x02,0x4C,0x0C,0x00, ++0x1B,0x00,0x69,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x8D,0x31, ++0x06,0x18,0xEF,0x00, ++0x04,0x10,0xCA,0x00, ++0x25,0x50,0x43,0x00, ++0x02,0x24,0x0A,0x00, ++0x12,0x28,0x00,0x00, ++0x10,0x40,0x00,0x00, ++0x00,0x14,0x08,0x00, ++0x25,0x40,0x44,0x00, ++0x18,0x00,0xAD,0x00, ++0x12,0x28,0x00,0x00, ++0x2B,0x18,0x05,0x01, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x69,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x05,0x00,0x60,0x10, ++0x04,0x78,0xCF,0x00, ++0x21,0x40,0x0C,0x01, ++0x2B,0x10,0x0C,0x01, ++0x93,0x00,0x40,0x10, ++0x2B,0x10,0x05,0x01, ++0x23,0x40,0x05,0x01, ++0x1B,0x00,0x09,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x44,0x31, ++0x12,0x18,0x00,0x00, ++0x10,0x58,0x00,0x00, ++0x00,0x14,0x0B,0x00, ++0x25,0x58,0x44,0x00, ++0x18,0x00,0x6D,0x00, ++0x12,0x28,0x00,0x00, ++0x2B,0x18,0x65,0x01, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x09,0x01, ++0x02,0x00,0x20,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x77,0xFF,0x60,0x10, ++0x23,0x50,0x65,0x01, ++0x21,0x58,0x6C,0x01, ++0x2B,0x10,0x6C,0x01, ++0x04,0x00,0x40,0x14, ++0x2B,0x10,0x65,0x01, ++0x00,0x00,0x42,0x38, ++0x21,0x18,0x6C,0x01, ++0x0B,0x58,0x62,0x00, ++0x6A,0x62,0x00,0x08, ++0x23,0x50,0x65,0x01, ++0x08,0x00,0x02,0x24, ++0x21,0x28,0x00,0x00, ++0x0A,0x28,0x43,0x00, ++0x02,0x80,0x03,0x3C, ++0x06,0x10,0xA8,0x00, ++0xB4,0xF0,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x20,0x00,0x02,0x24, ++0x21,0x20,0x85,0x00, ++0x23,0x30,0x44,0x00, ++0x34,0xFF,0xC0,0x10, ++0x23,0x38,0x46,0x00, ++0x06,0x10,0xEC,0x00, ++0x04,0x18,0xC8,0x00, ++0x25,0x40,0x62,0x00, ++0x06,0x58,0xEA,0x00, ++0x02,0x6C,0x08,0x00, ++0x1B,0x00,0x6D,0x01, ++0x02,0x00,0xA0,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x11,0x31, ++0x06,0x10,0xEF,0x00, ++0x04,0x18,0xCA,0x00, ++0x25,0x50,0x62,0x00, ++0x02,0x24,0x0A,0x00, ++0x04,0x60,0xCC,0x00, ++0x12,0x80,0x00,0x00, ++0x10,0x48,0x00,0x00, ++0x00,0x14,0x09,0x00, ++0x25,0x48,0x44,0x00, ++0x12,0x28,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x18,0x00,0x11,0x02, ++0x12,0x70,0x00,0x00, ++0x2B,0x18,0x2E,0x01, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x6D,0x01, ++0x02,0x00,0xA0,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x0A,0x00,0x60,0x10, ++0x04,0x78,0xCF,0x00, ++0x21,0x48,0x28,0x01, ++0x2B,0x10,0x28,0x01, ++0x06,0x00,0x40,0x14, ++0xFF,0xFF,0xB0,0x24, ++0x2B,0x10,0x2E,0x01, ++0x03,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x10,0x26, ++0x21,0x48,0x28,0x01, ++0x23,0x48,0x2E,0x01, ++0x1B,0x00,0x2D,0x01, ++0x02,0x00,0xA0,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0xFF,0xFF,0x44,0x31, ++0x12,0x28,0x00,0x00, ++0x10,0x58,0x00,0x00, ++0x00,0x14,0x0B,0x00, ++0x25,0x58,0x44,0x00, ++0x18,0x00,0xB1,0x00, ++0x12,0x70,0x00,0x00, ++0x2B,0x18,0x6E,0x01, ++0x00,0x00,0x00,0x00, ++0x1B,0x00,0x2D,0x01, ++0x02,0x00,0xA0,0x15, ++0x00,0x00,0x00,0x00, ++0x0D,0x00,0x07,0x00, ++0x0B,0x00,0x60,0x10, ++0x00,0x14,0x10,0x00, ++0x21,0x58,0x68,0x01, ++0x2B,0x10,0x68,0x01, ++0x06,0x00,0x40,0x14, ++0xFF,0xFF,0xA5,0x24, ++0x2B,0x10,0x6E,0x01, ++0x04,0x00,0x40,0x10, ++0x00,0x14,0x10,0x00, ++0xFF,0xFF,0xA5,0x24, ++0x21,0x58,0x68,0x01, ++0x00,0x14,0x10,0x00, ++0x25,0x10,0x45,0x00, ++0x23,0x58,0x6E,0x01, ++0x19,0x00,0x4C,0x00, ++0x10,0x28,0x00,0x00, ++0x2B,0x18,0x65,0x01, ++0x12,0x48,0x00,0x00, ++0x05,0x00,0x60,0x14, ++0x23,0x20,0x2C,0x01, ++0x07,0x00,0xAB,0x14, ++0x2B,0x10,0xE9,0x01, ++0x05,0x00,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x2B,0x10,0x24,0x01, ++0x23,0x18,0xA8,0x00, ++0x23,0x28,0x62,0x00, ++0x21,0x48,0x80,0x00, ++0xEA,0xFE,0x40,0x12, ++0x23,0x18,0xE9,0x01, ++0x23,0x20,0x65,0x01, ++0x2B,0x10,0xE3,0x01, ++0x23,0x50,0x82,0x00, ++0x04,0x28,0xEA,0x00, ++0x06,0x18,0xC3,0x00, ++0x25,0xC0,0xA3,0x00, ++0x06,0xC8,0xCA,0x00, ++0x00,0x00,0x58,0xAE, ++0x4C,0x62,0x00,0x08, ++0x04,0x00,0x59,0xAE, ++0x00,0x01,0xC3,0x2C, ++0x08,0x00,0x02,0x24, ++0x21,0x30,0x00,0x00, ++0xE6,0x61,0x00,0x08, ++0x0A,0x30,0x43,0x00, ++0x00,0x00,0x42,0x38, ++0x21,0x18,0x0C,0x01, ++0xE0,0x62,0x00,0x08, ++0x0B,0x40,0x62,0x00, ++0x25,0xB0,0x02,0x3C, ++0xFF,0x00,0x03,0x3C, ++0xEC,0x02,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xF0,0x8D,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x7F,0x00,0x02,0x3C, ++0x0D,0xB8,0x44,0x34, ++0x80,0x04,0x03,0x3C, ++0x25,0x20,0x83,0x00, ++0x00,0x08,0x02,0x3C, ++0x25,0x20,0x82,0x00, ++0x00,0x30,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x25,0x20,0x83,0x00, ++0x41,0xB0,0x03,0x3C, ++0x00,0x00,0x64,0xAC, ++0xD8,0x1B,0x44,0xAC, ++0xD0,0x1B,0x44,0xAC, ++0x08,0x00,0x63,0x34, ++0x86,0x00,0x04,0x24, ++0x00,0x00,0x64,0xA4, ++0xDC,0x1B,0x44,0xA4, ++0xD4,0x1B,0x40,0xAC, ++0xDE,0x1B,0x40,0xA4, ++0x08,0x00,0xE0,0x03, ++0xE0,0x1B,0x44,0xA4, ++0x99,0x63,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x42,0xB0,0x03,0x3C, ++0x01,0x00,0x63,0x34, ++0x02,0x00,0x02,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x00,0x00,0x62,0xA0, ++0x10,0x00,0xBF,0xAF, ++0xDF,0x2F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x00,0x00, ++0x01,0x00,0x05,0x24, ++0x8C,0x23,0x00,0x0C, ++0x00,0x50,0x06,0x24, ++0x1F,0x00,0x06,0x3C, ++0x10,0x00,0xBF,0x8F, ++0x00,0x40,0xC6,0x34, ++0x03,0x00,0x04,0x24, ++0x01,0x00,0x05,0x24, ++0x8C,0x23,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xC8,0xFF,0xBD,0x27, ++0x18,0x03,0x64,0x34, ++0xB8,0x8E,0x42,0x24, ++0x00,0x00,0x82,0xAC, ++0x30,0x00,0xBE,0xAF, ++0x2C,0x00,0xB7,0xAF, ++0x28,0x00,0xB6,0xAF, ++0x24,0x00,0xB5,0xAF, ++0x20,0x00,0xB4,0xAF, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0xB6,0x00,0x63,0x34, ++0x00,0x00,0x62,0x90, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x70,0x24, ++0xAB,0x1B,0x02,0xA2, ++0x28,0x6B,0x00,0x0C, ++0x7A,0x36,0x00,0xA2, ++0x48,0x01,0x03,0x24, ++0x84,0x36,0x03,0xAE, ++0x80,0x36,0x03,0xAE, ++0xFD,0xFF,0x02,0x3C, ++0xFB,0xFF,0x03,0x3C, ++0x21,0x98,0x00,0x02, ++0x21,0xA0,0x00,0x02, ++0xFF,0xFF,0x55,0x34, ++0xFF,0xFF,0x76,0x34, ++0x21,0x88,0x00,0x00, ++0x02,0x80,0x1E,0x3C, ++0x02,0x80,0x17,0x3C, ++0x21,0x90,0x00,0x02, ++0x80,0x10,0x11,0x00, ++0x21,0x10,0x51,0x00, ++0xC0,0x10,0x02,0x00, ++0x21,0x10,0x53,0x00, ++0xE8,0x1D,0x42,0x24, ++0x07,0x00,0x03,0x24, ++0xFF,0xFF,0x63,0x24, ++0x00,0x00,0x40,0xA4, ++0xFD,0xFF,0x61,0x04, ++0x02,0x00,0x42,0x24, ++0xC0,0x80,0x11,0x00, ++0x18,0x42,0xC4,0x27, ++0x21,0x20,0x04,0x02, ++0x21,0x28,0x00,0x00, ++0x02,0x00,0x06,0x24, ++0xF8,0x1D,0x40,0xA6, ++0x08,0x52,0x00,0x0C, ++0xFA,0x1D,0x40,0xA2, ++0x21,0x20,0x13,0x02, ++0xE8,0x22,0x83,0x8C, ++0xEA,0x5D,0xE7,0x92, ++0xBF,0xFF,0x02,0x24, ++0x24,0x28,0x62,0x00, ++0x01,0x00,0x02,0x24, ++0x63,0x00,0xE2,0x10, ++0x80,0x07,0xA6,0x34, ++0xFF,0xF7,0x03,0x24, ++0x24,0x10,0xC3,0x00, ++0xFF,0xEF,0x03,0x24, ++0x24,0x10,0x43,0x00, ++0xE8,0x22,0x82,0xAC, ++0x21,0x30,0x14,0x02, ++0xE8,0x22,0xC4,0x8C, ++0xE7,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x95,0x00, ++0x24,0x20,0x96,0x00, ++0xFF,0xFD,0x03,0x3C, ++0x24,0x20,0x82,0x00, ++0xFF,0xFF,0x63,0x34, ++0xFF,0xFB,0x02,0x3C, ++0x24,0x20,0x83,0x00, ++0xEC,0x22,0xC5,0x8C, ++0xFF,0xFF,0x42,0x34, ++0xFF,0xE7,0x03,0x3C, ++0x24,0x20,0x82,0x00, ++0xFF,0xFF,0x63,0x34, ++0xFF,0xFF,0x02,0x3C, ++0x24,0x20,0x83,0x00, ++0xFF,0x7F,0x42,0x34, ++0xC0,0xFF,0x03,0x24, ++0x24,0x28,0xA2,0x00, ++0x24,0x20,0x83,0x00, ++0x1F,0x00,0x02,0x3C, ++0x01,0x00,0x31,0x26, ++0x25,0x28,0xA2,0x00, ++0x08,0x00,0x84,0x34, ++0x20,0x00,0x22,0x2A, ++0xE8,0x22,0xC4,0xAC, ++0xEC,0x22,0xC5,0xAC, ++0xC3,0xFF,0x40,0x14, ++0x28,0x00,0x52,0x26, ++0x25,0xB0,0x02,0x3C, ++0x10,0x00,0x03,0x24, ++0xB0,0x03,0x42,0x34, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0x43,0xAC, ++0x58,0x22,0x84,0x24, ++0x21,0x28,0x00,0x00, ++0x08,0x52,0x00,0x0C, ++0x20,0x00,0x06,0x24, ++0x02,0x80,0x02,0x3C, ++0xE9,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x3A,0x00,0x60,0x10, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0x24,0x03,0x00,0xA2, ++0x38,0x70,0x00,0x0C, ++0x25,0x03,0x00,0xA2, ++0x02,0x80,0x09,0x3C, ++0x64,0x57,0x22,0x25, ++0x02,0x80,0x0A,0x3C, ++0x02,0x80,0x0B,0x3C, ++0x02,0x80,0x0C,0x3C, ++0x02,0x80,0x0D,0x3C, ++0x02,0x80,0x0E,0x3C, ++0x02,0x80,0x0F,0x3C, ++0x04,0x00,0x42,0xAC, ++0x64,0x57,0x22,0xAD, ++0x6C,0x57,0x43,0x25, ++0x74,0x57,0x64,0x25, ++0x7C,0x57,0x85,0x25, ++0x84,0x57,0xA6,0x25, ++0x8C,0x57,0xC7,0x25, ++0x94,0x57,0xE8,0x25, ++0x09,0x00,0x02,0x24, ++0x04,0x00,0x63,0xAC, ++0x6C,0x57,0x43,0xAD, ++0x04,0x00,0x84,0xAC, ++0x74,0x57,0x64,0xAD, ++0x04,0x00,0xA5,0xAC, ++0x7C,0x57,0x85,0xAD, ++0x04,0x00,0xC6,0xAC, ++0x84,0x57,0xA6,0xAD, ++0x04,0x00,0xE7,0xAC, ++0x8C,0x57,0xC7,0xAD, ++0x94,0x57,0xE8,0xAD, ++0x04,0x00,0x08,0xAD, ++0x34,0x00,0xBF,0x8F, ++0x0C,0x3E,0x02,0xA2, ++0x32,0x3B,0x00,0xA6, ++0x8E,0x3E,0x00,0xA2, ++0x30,0x00,0xBE,0x8F, ++0x2C,0x00,0xB7,0x8F, ++0x28,0x00,0xB6,0x8F, ++0x24,0x00,0xB5,0x8F, ++0x20,0x00,0xB4,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x9C,0xFF,0x67,0x14, ++0x80,0x0F,0xA2,0x34, ++0xFF,0xF7,0x03,0x24, ++0x24,0x10,0xC3,0x00, ++0xF0,0x63,0x00,0x08, ++0x00,0x10,0x42,0x34, ++0xFA,0x6B,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x50,0x6E,0x00,0x0C, ++0x30,0x38,0x80,0xAE, ++0x6E,0x6F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x64,0x90, ++0x92,0x00,0x02,0x24, ++0x03,0x00,0x82,0x10, ++0x00,0x00,0x00,0x00, ++0xCA,0x6F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xB0,0x6F,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x6A,0x6E,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x24, ++0x8A,0x36,0x83,0xA6, ++0x1E,0x70,0x00,0x0C, ++0x88,0x36,0x80,0xA6, ++0x1E,0x64,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xC8,0xFF,0xBD,0x27, ++0xB8,0x91,0x63,0x24, ++0x18,0x03,0x42,0x34, ++0x18,0x00,0xB0,0xAF, ++0x34,0x00,0xBF,0xAF, ++0x30,0x00,0xB6,0xAF, ++0x2C,0x00,0xB5,0xAF, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x20,0x00,0xB2,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x00,0x00,0x43,0xAC, ++0x21,0x80,0x00,0x00, ++0x01,0x00,0x02,0x26, ++0xFF,0xFF,0x50,0x30, ++0x64,0x00,0x03,0x2E, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0x02,0x26, ++0x02,0x80,0x03,0x3C, ++0xDB,0x5D,0x68,0x90, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xD8,0x5D,0x4B,0x94, ++0xF3,0x5D,0x6A,0x90, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x14,0x3C, ++0xFA,0x5D,0x67,0x90, ++0xE8,0x5D,0x49,0x90, ++0xDA,0x5D,0x83,0x92, ++0x02,0x80,0x0C,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF5,0x5D,0x46,0x90, ++0xF8,0x5D,0x85,0x91, ++0x25,0xB0,0x04,0x3C, ++0xB0,0x03,0x82,0x34, ++0x00,0x00,0x4B,0xAC, ++0x00,0x00,0x48,0xAC, ++0x00,0x00,0x49,0xAC, ++0x00,0x00,0x43,0xAC, ++0x02,0x80,0x03,0x3C, ++0x00,0x00,0x4A,0xAC, ++0x0A,0x00,0x88,0x34, ++0x00,0x00,0x46,0xAC, ++0x00,0x00,0x45,0xAC, ++0x00,0x00,0x47,0xAC, ++0x1A,0x5E,0x60,0xA4, ++0x00,0x00,0x06,0x91, ++0x02,0x80,0x02,0x3C, ++0x0B,0x00,0x04,0x24, ++0x02,0x80,0x16,0x3C, ++0xE5,0x5D,0x44,0xA0, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0xC5,0x26, ++0x00,0x78,0x03,0x24, ++0x08,0x5E,0x40,0xA0, ++0xF0,0xFF,0x02,0x24, ++0x01,0x00,0x07,0x24, ++0x02,0x80,0x15,0x3C, ++0xAC,0x1B,0xA3,0xA4, ++0xAA,0x1B,0xA2,0xA0, ++0xFF,0x07,0x03,0x24, ++0xFF,0xFF,0x02,0x24, ++0x20,0x00,0xC6,0x30, ++0xF8,0x5D,0x87,0xA1, ++0xA8,0x1B,0xA7,0xA0, ++0xAE,0x1B,0xA3,0xA4, ++0x48,0xF3,0xA2,0xA2, ++0xB1,0x00,0xC0,0x10, ++0xB0,0x1B,0xA0,0xA4, ++0x00,0x00,0x02,0x91, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x42,0x30, ++0xFB,0x00,0x40,0x14, ++0x02,0x80,0x13,0x3C, ++0x21,0x80,0x00,0x00, ++0x21,0x88,0x00,0x00, ++0xB8,0xF1,0x72,0x26, ++0xFF,0x00,0x24,0x32, ++0x61,0x57,0x00,0x0C, ++0x21,0x28,0x12,0x02, ++0x08,0x00,0x03,0x26, ++0xFF,0xFF,0x70,0x30, ++0x01,0x00,0x22,0x26, ++0x80,0x00,0x03,0x2E, ++0xF8,0xFF,0x60,0x14, ++0xFF,0xFF,0x51,0x30, ++0xDA,0x5D,0x83,0x92, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0x62,0x30, ++0xC1,0x00,0x40,0x14, ++0x04,0x00,0x62,0x30, ++0x9A,0x00,0x40,0x10, ++0x25,0xB0,0x03,0x3C, ++0x25,0xB0,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x06,0x00,0x06,0x24, ++0x50,0x00,0x84,0x34, ++0x10,0x52,0x00,0x0C, ++0x07,0xF2,0xA5,0x24, ++0xB8,0xF1,0x63,0x26, ++0x7B,0x00,0x66,0x90, ++0x00,0x00,0x00,0x00, ++0x02,0x00,0xC2,0x2C, ++0x04,0x00,0x40,0x14, ++0x02,0x00,0x0B,0x24, ++0x79,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x03,0x00,0x4B,0x30, ++0x04,0x00,0xC2,0x2C, ++0xDC,0x00,0x40,0x10, ++0xB8,0xF1,0x62,0x26, ++0x02,0x80,0x02,0x3C, ++0x4A,0xF3,0x40,0xA0, ++0x02,0x80,0x02,0x3C, ++0xE7,0x5D,0x43,0x90, ++0x01,0x00,0x02,0x24, ++0x02,0x00,0x62,0x10, ++0xFC,0xFF,0x08,0x24, ++0x21,0x40,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xB8,0xF1,0x4A,0x24, ++0x30,0x1F,0x69,0x24, ++0x21,0x60,0x00,0x00, ++0x21,0x80,0x00,0x00, ++0x01,0x00,0x02,0x26, ++0x21,0x30,0x30,0x01, ++0x03,0x00,0x03,0x2E, ++0x08,0x00,0x04,0x2E, ++0xFF,0xFF,0x50,0x30, ++0x0E,0x00,0x07,0x2E, ++0x04,0x00,0x60,0x14, ++0x21,0x88,0x00,0x00, ++0x01,0x00,0x11,0x24, ++0x02,0x00,0x02,0x24, ++0x0A,0x88,0x44,0x00, ++0x21,0x10,0x51,0x01, ++0x61,0x00,0x43,0x90, ++0x55,0x00,0x44,0x90, ++0x5B,0x00,0x45,0x90, ++0x21,0x18,0x03,0x01, ++0x21,0x20,0x04,0x01, ++0x21,0x28,0x05,0x01, ++0x9C,0x1D,0xC3,0xA0, ++0x64,0x1D,0xC4,0xA0, ++0xEB,0xFF,0xE0,0x14, ++0x80,0x1D,0xC5,0xA0, ++0x01,0x00,0x8C,0x25, ++0x02,0x00,0x82,0x2D, ++0x0E,0x00,0x29,0x25, ++0xE5,0xFF,0x40,0x14, ++0x03,0x00,0x4A,0x25, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x47,0x24, ++0xB8,0xF1,0x66,0x24, ++0x21,0x80,0x00,0x00, ++0x03,0x00,0x02,0x2E, ++0x21,0x20,0x07,0x02, ++0xB9,0x00,0x40,0x10, ++0x08,0x00,0x03,0x2E, ++0x71,0x00,0xC3,0x90, ++0x6E,0x00,0xC2,0x90, ++0x00,0x00,0x00,0x00, ++0xC6,0x1D,0x82,0xA0, ++0xB8,0x1D,0x83,0xA0, ++0x01,0x00,0x02,0x26, ++0xFF,0xFF,0x50,0x30, ++0x0E,0x00,0x03,0x2E, ++0xF4,0xFF,0x60,0x14, ++0x03,0x00,0x02,0x2E, ++0x03,0x00,0x02,0x24, ++0x2A,0x00,0x62,0x15, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xB8,0xF1,0x4E,0x24, ++0x34,0xD9,0x6F,0x24, ++0x21,0x60,0x00,0x00, ++0x21,0x68,0x00,0x00, ++0x21,0x10,0xAE,0x01, ++0x74,0x00,0x43,0x90, ++0x21,0x80,0x00,0x00, ++0x0F,0x00,0x6A,0x30, ++0x02,0x49,0x03,0x00, ++0x21,0x10,0xB0,0x01, ++0x00,0x11,0x02,0x00, ++0x21,0x58,0x4F,0x00, ++0x21,0x38,0x00,0x00, ++0x21,0x40,0x67,0x01, ++0x00,0x00,0x03,0x91, ++0x00,0x31,0x09,0x00, ++0x01,0x00,0xE7,0x24, ++0x02,0x11,0x03,0x00, ++0x00,0x21,0x02,0x00, ++0x0F,0x00,0x63,0x30, ++0x2B,0x10,0x49,0x00, ++0x0A,0x20,0xC2,0x00, ++0x2B,0x28,0x6A,0x00, ++0x00,0x00,0xA5,0x38, ++0x25,0x18,0x83,0x00, ++0xFF,0xFF,0xE7,0x30, ++0x25,0x20,0x8A,0x00, ++0x0A,0x18,0x85,0x00, ++0x10,0x00,0xE2,0x2C, ++0xEF,0xFF,0x40,0x14, ++0x00,0x00,0x03,0xA1, ++0x01,0x00,0x02,0x26, ++0xFF,0xFF,0x50,0x30, ++0x03,0x00,0x03,0x2E, ++0xE7,0xFF,0x60,0x14, ++0x21,0x10,0xB0,0x01, ++0x01,0x00,0x8C,0x25, ++0x02,0x00,0x82,0x2D, ++0xDD,0xFF,0x40,0x14, ++0x03,0x00,0xAD,0x25, ++0xE6,0x56,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x48,0xF3,0xA5,0x26, ++0x91,0x56,0x00,0x0C, ++0xFA,0x01,0x04,0x24, ++0xE6,0x56,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x25,0xB0,0x05,0x3C, ++0x18,0x3B,0x84,0x24, ++0x50,0x00,0xA5,0x34, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0x30,0x1F,0xC5,0x26, ++0x01,0x00,0x02,0x24, ++0x06,0x00,0x03,0x24, ++0x05,0x00,0x04,0x24, ++0x33,0x1C,0xA2,0xA0, ++0x8A,0x55,0x00,0x0C, ++0x30,0x3B,0xA3,0xA0, ++0x34,0x00,0xBF,0x8F, ++0x30,0x00,0xB6,0x8F, ++0x2C,0x00,0xB5,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x38,0x00,0xBD,0x27, ++0x25,0xB0,0x03,0x3C, ++0x4C,0x87,0x02,0x3C, ++0x54,0x00,0x65,0x34, ++0x00,0xE0,0x42,0x34, ++0x50,0x00,0x63,0x34, ++0x00,0x00,0x62,0xAC, ++0x12,0x01,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0xA4,0xAC, ++0x30,0x1F,0x46,0x24, ++0x21,0x60,0x00,0x00, ++0x10,0x00,0x05,0x24, ++0x21,0x80,0x00,0x00, ++0x01,0x00,0x02,0x26, ++0x21,0x18,0xD0,0x00, ++0xFF,0xFF,0x50,0x30, ++0x0E,0x00,0x04,0x2E, ++0x80,0x1D,0x65,0xA0, ++0x64,0x1D,0x65,0xA0, ++0xF9,0xFF,0x80,0x14, ++0x9C,0x1D,0x65,0xA0, ++0x01,0x00,0x8C,0x25, ++0x02,0x00,0x82,0x2D, ++0xF4,0xFF,0x40,0x14, ++0x0E,0x00,0xC6,0x24, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x46,0x24, ++0x21,0x80,0x00,0x00, ++0x04,0x00,0x05,0x24, ++0x01,0x00,0x02,0x26, ++0x21,0x18,0x06,0x02, ++0xFF,0xFF,0x50,0x30, ++0x0E,0x00,0x04,0x2E, ++0xC6,0x1D,0x60,0xA0, ++0xFA,0xFF,0x80,0x14, ++0xB8,0x1D,0x65,0xA0, ++0x48,0x65,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x50,0x00,0x84,0x34, ++0xCA,0xF1,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x06,0x00,0x06,0x24, ++0xB8,0xF1,0x62,0x92, ++0xB8,0xF1,0x64,0x26, ++0x01,0x00,0x85,0x90, ++0x21,0x18,0x40,0x00, ++0x10,0x00,0xA2,0xA3, ++0x29,0x00,0x02,0x24, ++0x11,0x00,0xA5,0xA3, ++0x50,0x00,0x86,0x90, ++0x3B,0x00,0x62,0x10, ++0xFF,0x00,0xA3,0x30, ++0xB8,0xF1,0x65,0x26, ++0x68,0x00,0xA2,0x90, ++0x02,0x80,0x03,0x3C, ++0x04,0x00,0xC4,0x2C, ++0x1F,0x00,0x42,0x30, ++0x24,0x00,0x80,0x14, ++0x49,0xF3,0x62,0xA0, ++0x7A,0x00,0xA2,0x90, ++0x79,0x00,0xA4,0x90, ++0x02,0x80,0x03,0x3C, ++0x04,0x00,0x42,0x30, ++0x83,0x10,0x02,0x00, ++0x03,0x00,0x8B,0x30, ++0x4A,0xF3,0x62,0xA0, ++0x06,0x00,0xC2,0x2C, ++0x37,0xFF,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0xB8,0xF1,0x63,0x26, ++0x69,0x00,0x62,0x90, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x42,0x30, ++0x31,0xFF,0x40,0x14, ++0x02,0x80,0x02,0x3C, ++0xE8,0x64,0x00,0x08, ++0x21,0x40,0x00,0x00, ++0x21,0x20,0x00,0x00, ++0x80,0x00,0x05,0x24, ++0x53,0x56,0x00,0x0C, ++0xB8,0xF1,0x66,0x26, ++0xC7,0x64,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x7D,0x00,0x43,0x90, ++0x69,0x00,0x44,0x90, ++0x02,0x80,0x02,0x3C, ++0x04,0x00,0x63,0x30, ++0x01,0x00,0x84,0x30, ++0x83,0x18,0x03,0x00, ++0x01,0x00,0x84,0x2C, ++0x1F,0xFF,0x80,0x10, ++0x4A,0xF3,0x43,0xA0, ++0xE8,0x64,0x00,0x08, ++0x21,0x40,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x02,0x00,0x0B,0x24, ++0xAA,0x65,0x00,0x08, ++0x4A,0xF3,0x40,0xA0, ++0x21,0x28,0x07,0x02, ++0x06,0x00,0x60,0x10, ++0x21,0x20,0xA0,0x00, ++0x67,0x00,0xC3,0x90, ++0x6F,0x00,0xC2,0x90, ++0xB8,0x1D,0xA3,0xA0, ++0x17,0x65,0x00,0x08, ++0xC6,0x1D,0xA2,0xA0, ++0x72,0x00,0xC3,0x90, ++0x70,0x00,0xC2,0x90, ++0x16,0x65,0x00,0x08, ++0xC6,0x1D,0x82,0xA0, ++0x81,0x00,0x02,0x24, ++0xC4,0xFF,0x62,0x14, ++0x01,0x00,0x02,0x24, ++0x54,0x00,0x83,0x90, ++0x00,0x00,0x00,0x00, ++0x0A,0x00,0x62,0x10, ++0x02,0x00,0x02,0x24, ++0x04,0x00,0x62,0x10, ++0x11,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x9C,0x65,0x00,0x08, ++0xDE,0x5D,0x43,0xA0, ++0x22,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x9C,0x65,0x00,0x08, ++0xDE,0x5D,0x43,0xA0, ++0x12,0x00,0x03,0x24, ++0x02,0x80,0x02,0x3C, ++0x9C,0x65,0x00,0x08, ++0xDE,0x5D,0x43,0xA0, ++0xD8,0xFF,0xBD,0x27, ++0x18,0x00,0xB0,0xAF, ++0x02,0x80,0x02,0x3C, ++0x25,0xB0,0x10,0x3C, ++0x18,0x03,0x03,0x36, ++0xA8,0x97,0x42,0x24, ++0x00,0x00,0x62,0xAC, ++0x20,0x00,0xB2,0xAF, ++0x02,0x80,0x12,0x3C, ++0x24,0x00,0xBF,0xAF, ++0x6E,0x64,0x00,0x0C, ++0x1C,0x00,0xB1,0xAF, ++0x9C,0x66,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x36,0x69,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x1A,0x6A,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x7C,0x6C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x82,0x69,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x30,0x1F,0x43,0x26, ++0x30,0x3B,0x64,0x90, ++0x0D,0x0C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x76,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x64,0x40,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x44,0x00,0x03,0x36, ++0x00,0x00,0x62,0x94, ++0x00,0x00,0x00,0x00, ++0x40,0x00,0x42,0x34, ++0x00,0x00,0x62,0xA4, ++0xAE,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x7C,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x9B,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xE6,0x69,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xA3,0x69,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x00,0x80,0x04,0x3C, ++0x74,0x6A,0x84,0x24, ++0x03,0x6A,0x00,0x0C, ++0x01,0x00,0x05,0x24, ++0x00,0x80,0x04,0x3C, ++0x6C,0x72,0x84,0x24, ++0x03,0x6A,0x00,0x0C, ++0x02,0x00,0x05,0x24, ++0x00,0x80,0x04,0x3C, ++0x48,0x7B,0x84,0x24, ++0x03,0x6A,0x00,0x0C, ++0x04,0x00,0x05,0x24, ++0x7E,0x59,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x01,0x80,0x04,0x3C, ++0xB8,0x8E,0x84,0x24, ++0x03,0x6A,0x00,0x0C, ++0x03,0x00,0x05,0x24, ++0x02,0x80,0x03,0x3C, ++0xE8,0x5D,0x63,0x90, ++0x00,0x00,0x00,0x00, ++0x60,0x00,0x60,0x10, ++0x43,0x00,0x02,0x36, ++0x07,0x00,0x02,0x24, ++0x0C,0x00,0x62,0x10, ++0x03,0x00,0x02,0x24, ++0x25,0xB0,0x04,0x3C, ++0x43,0x00,0x85,0x34, ++0x10,0x02,0x86,0x34, ++0x10,0x00,0x03,0x24, ++0x00,0x00,0xA2,0xA0, ++0xD8,0x00,0x84,0x34, ++0x00,0x00,0xC3,0xA0, ++0x00,0x00,0x82,0x90, ++0x80,0xFF,0x03,0x24, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0x82,0xA0, ++0xE0,0x6A,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x42,0xB0,0x03,0x3C, ++0x00,0x00,0x62,0x90, ++0x25,0xB0,0x10,0x3C, ++0x02,0x80,0x11,0x3C, ++0x01,0x00,0x42,0x34, ++0x00,0x00,0x62,0xA0, ++0x83,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x44,0x00,0x05,0x36, ++0x00,0x00,0xA2,0x94, ++0x02,0x80,0x03,0x3C, ++0x8C,0xC6,0x64,0x8C, ++0xC0,0x00,0x42,0x34, ++0x00,0x00,0xA2,0xA4, ++0x2F,0x55,0x00,0x0C, ++0x80,0x0C,0x10,0x36, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xDA,0x5D,0x45,0x90, ++0xDF,0x5D,0x66,0x90, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x90,0xC6,0x84,0x24, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x45,0x90, ++0x48,0xF3,0x66,0x90, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xE7,0x5D,0x47,0x90, ++0x4A,0xF3,0x62,0x90, ++0x02,0x80,0x04,0x3C, ++0xA4,0xC6,0x84,0x24, ++0x2F,0x55,0x00,0x0C, ++0x10,0x00,0xA2,0xAF, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0x07,0x8E, ++0xE6,0x5D,0x46,0x90, ++0xE9,0x5D,0x25,0x92, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xC0,0xC6,0x84,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xEB,0x5D,0x66,0x90, ++0xEA,0x5D,0x45,0x90, ++0x02,0x80,0x04,0x3C, ++0x30,0x1F,0x50,0x26, ++0x2F,0x55,0x00,0x0C, ++0xDC,0xC6,0x84,0x24, ++0xA0,0x3E,0x06,0x8E, ++0xA4,0x3E,0x05,0x8E, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0xF0,0xC6,0x84,0x24, ++0x02,0x80,0x02,0x3C, ++0x49,0xF3,0x45,0x90, ++0x02,0x80,0x04,0x3C, ++0x2F,0x55,0x00,0x0C, ++0x10,0xC7,0x84,0x24, ++0xE9,0x5D,0x23,0x92, ++0x10,0x27,0x02,0x24, ++0x02,0x80,0x04,0x3C, ++0x0B,0x10,0x03,0x00, ++0x40,0x39,0x02,0xAE, ++0x08,0x00,0x84,0x24, ++0x21,0x28,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x91,0x3C,0x00,0x0C, ++0x21,0x38,0x00,0x00, ++0x99,0x63,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x24,0x00,0xBF,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xD8,0x00,0x04,0x36, ++0x00,0x00,0x40,0xA0, ++0x38,0x66,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x20,0x00,0x00, ++0x20,0xB0,0x06,0x3C, ++0xFF,0xFF,0x05,0x34, ++0x21,0x18,0x86,0x00, ++0x04,0x00,0x84,0x24, ++0x2A,0x10,0xA4,0x00, ++0x00,0x00,0x60,0xAC, ++0xFB,0xFF,0x40,0x10, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xB8,0xFF,0xBD,0x27, ++0x24,0x00,0xB1,0xAF, ++0x44,0x00,0xBF,0xAF, ++0x40,0x00,0xBE,0xAF, ++0x3C,0x00,0xB7,0xAF, ++0x38,0x00,0xB6,0xAF, ++0x34,0x00,0xB5,0xAF, ++0x30,0x00,0xB4,0xAF, ++0x2C,0x00,0xB3,0xAF, ++0x28,0x00,0xB2,0xAF, ++0x20,0x00,0xB0,0xAF, ++0x02,0x80,0x02,0x3C, ++0xDA,0x5D,0x42,0x90, ++0x25,0xB0,0x11,0x3C, ++0x58,0x00,0x25,0x36, ++0x10,0x00,0xA2,0xAF, ++0x4C,0x81,0x02,0x3C, ++0x00,0xE0,0x42,0x34, ++0x00,0x00,0xA2,0xAC, ++0xFF,0xFF,0x04,0x24, ++0x96,0x01,0x03,0x24, ++0x28,0x28,0x02,0x24, ++0x5C,0x00,0x26,0x36, ++0x60,0x00,0x27,0x36, ++0x64,0x00,0x28,0x36, ++0x8A,0x00,0x29,0x36, ++0x00,0x00,0xC3,0xAC, ++0x00,0x00,0xE4,0xAC, ++0x00,0x00,0x04,0xAD, ++0x00,0x00,0x22,0xA5, ++0x0E,0x0E,0x02,0x3C, ++0x09,0x00,0x03,0x24, ++0x0A,0x0A,0x42,0x34, ++0x89,0x00,0x2A,0x36, ++0x8C,0x00,0x2B,0x36, ++0x00,0x00,0x43,0xA1, ++0x90,0x00,0x2C,0x36, ++0x00,0x00,0x62,0xAD, ++0x13,0x00,0x03,0x24, ++0x30,0x00,0x02,0x24, ++0x91,0x00,0x2D,0x36, ++0x00,0x00,0x83,0xA1, ++0x92,0x00,0x2E,0x36, ++0x00,0x00,0xA2,0xA1, ++0x3A,0x01,0x03,0x24, ++0x21,0x00,0x02,0x24, ++0xB5,0x00,0x2F,0x36, ++0x00,0x00,0xC3,0xA5, ++0x00,0x00,0xE2,0xA1, ++0x10,0x00,0xA2,0x8F, ++0x12,0x00,0x03,0x24, ++0x89,0x01,0x43,0x10, ++0x07,0x07,0x02,0x3C, ++0x07,0x07,0x42,0x34, ++0xA0,0x00,0x24,0x36, ++0x00,0x00,0x82,0xAC, ++0xA4,0x00,0x25,0x36, ++0x00,0x07,0x03,0x24, ++0x00,0xC0,0x02,0x3C, ++0xA8,0x00,0x26,0x36, ++0x00,0x00,0xA3,0xAC, ++0x00,0xC4,0x42,0x34, ++0x00,0x00,0xC2,0xAC, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x62,0x24, ++0xAC,0x1B,0x45,0x94, ++0xAE,0x1B,0x46,0x94, ++0xAA,0x1B,0x42,0x90, ++0x02,0x80,0x03,0x3C, ++0x21,0xB0,0x07,0x3C, ++0x14,0x00,0xA2,0xA3, ++0xE9,0x5D,0x63,0x90, ++0x20,0xB0,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x18,0x00,0xA3,0xAF, ++0x23,0xB0,0x03,0x3C, ++0xFF,0xFF,0x63,0x34, ++0x24,0xB0,0x08,0x3C, ++0xFF,0x1F,0x04,0x3C, ++0x25,0xB0,0x1E,0x3C, ++0xFF,0xFF,0x84,0x34, ++0x21,0x38,0xA7,0x00, ++0x21,0x40,0xC8,0x00, ++0x21,0x28,0xA2,0x00, ++0x21,0x30,0xC3,0x00, ++0x24,0x40,0x04,0x01, ++0x24,0x28,0xA4,0x00, ++0x24,0x38,0xE4,0x00, ++0x24,0x30,0xC4,0x00, ++0x35,0x00,0x02,0x24, ++0x20,0x00,0xC4,0x37, ++0x00,0x00,0x82,0xA0, ++0x22,0x00,0x03,0x24, ++0x09,0x00,0x02,0x24, ++0x03,0x05,0xC9,0x37, ++0x60,0x05,0xCA,0x37, ++0xAC,0x00,0xCB,0x37, ++0xF8,0x00,0xCC,0x37, ++0xB0,0x00,0xCD,0x37, ++0x08,0x01,0xCE,0x37, ++0xD8,0x00,0xCF,0x37, ++0x00,0x00,0x23,0xA1, ++0x00,0x00,0x42,0xA1, ++0x00,0x00,0x65,0xAD, ++0x00,0x00,0x87,0xAD, ++0x00,0x00,0xA6,0xAD, ++0x00,0x00,0xC8,0xAD, ++0x00,0x00,0xE0,0xA1, ++0x14,0x00,0xA3,0x93, ++0x25,0xB0,0x02,0x3C, ++0xB4,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA0, ++0xB6,0x00,0xD1,0x37, ++0x04,0x00,0x02,0x24, ++0x25,0xB0,0x03,0x3C, ++0x00,0x00,0x22,0xA2, ++0xB9,0x00,0x63,0x34, ++0xFF,0xFF,0x02,0x24, ++0x00,0x00,0x62,0xA0, ++0x25,0xB0,0x03,0x3C, ++0x0F,0x00,0x02,0x24, ++0xBA,0x00,0x63,0x34, ++0x00,0x00,0x62,0xA4, ++0x16,0x01,0xD4,0x37, ++0x3F,0x3F,0x03,0x24, ++0x2F,0x00,0x02,0x3C, ++0x00,0x00,0x83,0xA6, ++0x17,0x32,0x42,0x34, ++0xFF,0xCF,0x03,0x24, ++0x18,0x01,0xD5,0x37, ++0x1A,0x01,0xD6,0x37, ++0xDC,0x00,0xD7,0x37, ++0xD0,0x01,0xD8,0x37, ++0x00,0x00,0xA0,0xA6, ++0x00,0x00,0xC0,0xA6, ++0x00,0x00,0xE3,0xAE, ++0x00,0x00,0x02,0xAF, ++0x5E,0x00,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x17,0x43,0x63,0x34, ++0xD4,0x01,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x10,0x00,0x02,0x3C, ++0x20,0x53,0x42,0x34, ++0xD8,0x01,0xDF,0x37, ++0x00,0x00,0xE2,0xAF, ++0x25,0xB0,0x02,0x3C, ++0x44,0xA4,0x03,0x34, ++0xDC,0x01,0x42,0x34, ++0x00,0x00,0x43,0xAC, ++0x25,0xB0,0x03,0x3C, ++0x1A,0x06,0x02,0x24, ++0xE0,0x01,0x63,0x34, ++0x00,0x00,0x62,0xA4, ++0xC2,0x00,0x02,0x3C, ++0x30,0x30,0x03,0x24, ++0x51,0x10,0x42,0x34, ++0xF4,0x01,0xD0,0x37, ++0xF8,0x01,0xD3,0x37, ++0x00,0x00,0x03,0xA6, ++0x00,0x02,0xD2,0x37, ++0x00,0x00,0x62,0xAE, ++0x26,0x00,0x03,0x24, ++0x03,0x02,0xD9,0x37, ++0x04,0x00,0x02,0x24, ++0x00,0x00,0x43,0xA6, ++0x00,0x00,0x22,0xA3, ++0x18,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0xE5,0x00,0x60,0x14, ++0x36,0x02,0xC2,0x37, ++0x04,0x00,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0x02,0x80,0x0B,0x3C, ++0xDE,0x5D,0x66,0x91, ++0x25,0xB0,0x09,0x3C, ++0x80,0x00,0x02,0x24, ++0x34,0x02,0x24,0x35, ++0x00,0x00,0x82,0xA4, ++0x37,0x02,0x25,0x35, ++0x53,0x00,0x03,0x24, ++0x22,0x00,0x02,0x24, ++0x00,0x00,0xA3,0xA0, ++0xE6,0x00,0xC2,0x10, ++0x1B,0x1B,0x02,0x3C, ++0x13,0x13,0x02,0x3C, ++0x13,0x13,0x42,0x34, ++0x60,0x01,0x23,0x35, ++0x64,0x01,0x24,0x35, ++0x68,0x01,0x25,0x35, ++0x7C,0x01,0x2A,0x35, ++0x6C,0x01,0x26,0x35, ++0x70,0x01,0x27,0x35, ++0x74,0x01,0x28,0x35, ++0x78,0x01,0x29,0x35, ++0x00,0x00,0x62,0xAC, ++0x00,0x00,0x82,0xAC, ++0x00,0x00,0xA2,0xAC, ++0x00,0x00,0xC2,0xAC, ++0x00,0x00,0xE2,0xAC, ++0x00,0x00,0x02,0xAD, ++0x00,0x00,0x22,0xAD, ++0x00,0x00,0x42,0xAD, ++0xDE,0x5D,0x65,0x91, ++0x25,0xB0,0x0C,0x3C, ++0x01,0x00,0x03,0x3C, ++0x80,0x01,0x82,0x35, ++0x08,0x5F,0x63,0x34, ++0x22,0x00,0x04,0x24, ++0x00,0x00,0x43,0xAC, ++0xE5,0x00,0xA4,0x10, ++0x0F,0x1F,0x02,0x3C, ++0x92,0x00,0x02,0x24, ++0xE2,0x00,0xA2,0x10, ++0x0F,0x1F,0x02,0x3C, ++0x0F,0x10,0x02,0x3C, ++0x00,0xF0,0x4F,0x34, ++0xF7,0x01,0x91,0x35, ++0x15,0xF0,0x4D,0x34, ++0x77,0x00,0x0E,0x24, ++0x84,0x01,0x87,0x35, ++0x88,0x01,0x88,0x35, ++0x10,0xF0,0x44,0x34, ++0x8C,0x01,0x85,0x35, ++0x05,0xF0,0x42,0x34, ++0x00,0x00,0xED,0xAC, ++0x90,0x01,0x83,0x35, ++0x00,0x00,0x04,0xAD, ++0x94,0x01,0x86,0x35, ++0x00,0x00,0xA2,0xAC, ++0xF5,0x0F,0x02,0x24, ++0x00,0x00,0x6F,0xAC, ++0x98,0x01,0x89,0x35, ++0x00,0x00,0xC2,0xAC, ++0x9C,0x01,0x8A,0x35, ++0xA0,0x01,0x8B,0x35, ++0xF0,0x0F,0x03,0x24, ++0xF6,0x01,0x8C,0x35, ++0x0D,0x00,0x02,0x24, ++0x00,0x00,0x23,0xAD, ++0x00,0x00,0x42,0xAD, ++0x00,0x00,0x6D,0xAD, ++0x02,0x80,0x02,0x3C, ++0x00,0x00,0x8E,0xA1, ++0x00,0x00,0x2E,0xA2, ++0xFB,0x5D,0x42,0x90, ++0x25,0xB0,0x1F,0x3C, ++0xA7,0x01,0xE7,0x37, ++0x1C,0x00,0xA2,0xAF, ++0xFF,0xFF,0x02,0x24, ++0x00,0x00,0xE2,0xA0, ++0x05,0x06,0x03,0x3C, ++0x25,0xB0,0x02,0x3C, ++0x03,0x04,0x63,0x34, ++0x0C,0x00,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0x01,0x02,0x06,0x3C, ++0xC2,0x01,0x42,0x34, ++0xA8,0x01,0xE8,0x37, ++0xAC,0x01,0xE9,0x37, ++0xB0,0x01,0xEA,0x37, ++0xB4,0x01,0xEB,0x37, ++0xB8,0x01,0xEC,0x37, ++0xBC,0x01,0xED,0x37, ++0xC0,0x01,0xEE,0x37, ++0xC1,0x01,0xEF,0x37, ++0x00,0x00,0x05,0xAD, ++0x00,0x00,0x25,0xAD, ++0x00,0x00,0x46,0xAD, ++0x00,0x00,0x63,0xAD, ++0x00,0x00,0x86,0xAD, ++0x00,0x00,0xA3,0xAD, ++0x00,0x00,0xC4,0xA1, ++0x25,0xB0,0x03,0x3C, ++0x00,0x00,0xE4,0xA1, ++0x00,0x00,0x44,0xA0, ++0x25,0xB0,0x02,0x3C, ++0x0D,0x00,0x17,0x24, ++0x0E,0x00,0x18,0x24, ++0xC4,0x01,0x63,0x34, ++0xC5,0x01,0x42,0x34, ++0xC3,0x01,0xF1,0x37, ++0x00,0x00,0x37,0xA2, ++0xC6,0x01,0xF4,0x37, ++0x00,0x00,0x77,0xA0, ++0xC7,0x01,0xF5,0x37, ++0x00,0x00,0x58,0xA0, ++0x0F,0x00,0x02,0x24, ++0x00,0x00,0x98,0xA2, ++0x00,0x00,0xA2,0xA2, ++0xD3,0x01,0x02,0x3C, ++0x46,0x00,0xF6,0x37, ++0x48,0x00,0xFE,0x37, ++0x0E,0xF0,0x42,0x34, ++0x00,0x00,0xC0,0xA6, ++0x00,0x00,0xC2,0xAF, ++0x1C,0x00,0xA3,0x8F, ++0x00,0x00,0x00,0x00, ++0x09,0x00,0x60,0x10, ++0x44,0x00,0xF7,0x37, ++0x00,0x00,0xE2,0x8E, ++0x00,0x02,0x03,0x3C, ++0x25,0x10,0x43,0x00, ++0x00,0x00,0xE2,0xAE, ++0x00,0x00,0xC3,0x8F, ++0x00,0x04,0x02,0x3C, ++0x25,0x18,0x62,0x00, ++0x00,0x00,0xC3,0xAF, ++0x4C,0x00,0xE2,0x37, ++0x00,0x00,0x40,0xA0, ++0x4D,0x00,0xE3,0x37, ++0xF1,0x02,0xE4,0x37, ++0x08,0x00,0x02,0x24, ++0x00,0x00,0x60,0xA0, ++0x40,0x00,0xE6,0x37, ++0x00,0x00,0x82,0xA0, ++0x64,0x03,0xE5,0x37, ++0xBC,0x00,0x03,0x24, ++0xFC,0x37,0x02,0x24, ++0x00,0x00,0xC3,0xA4, ++0x00,0x00,0xA0,0xA0, ++0x00,0x00,0xC2,0xA4, ++0x02,0x80,0x02,0x3C, ++0xD8,0x00,0xE9,0x37, ++0x30,0x1F,0x43,0x24, ++0x00,0x00,0x26,0x91, ++0xAA,0x1B,0x64,0x90, ++0x2A,0xB0,0x05,0x3C, ++0xA0,0xFF,0x02,0x24, ++0x26,0xB0,0x07,0x3C, ++0x25,0x30,0xC2,0x00, ++0x30,0x00,0xAD,0x34, ++0x34,0x00,0xA8,0x34, ++0x01,0x00,0x83,0x24, ++0x38,0x00,0xA5,0x34, ++0x20,0x20,0x02,0x24, ++0x00,0x00,0x26,0xA1, ++0x79,0x00,0xEA,0x34, ++0x00,0x00,0x03,0xA1, ++0x00,0x00,0xA2,0xA4, ++0x40,0x00,0x03,0x24, ++0x16,0x00,0x02,0x24, ++0x00,0x00,0xA3,0xA1, ++0x94,0x00,0xEB,0x37, ++0x00,0x00,0x42,0xA1, ++0x98,0x00,0xEC,0x37, ++0x64,0x00,0x03,0x24, ++0x22,0x00,0x02,0x24, ++0x00,0x00,0x63,0xA5, ++0x7C,0x00,0xF4,0x34, ++0x00,0x00,0x82,0xA5, ++0x7A,0x00,0xE7,0x34, ++0x04,0x00,0x03,0x24, ++0x20,0x0C,0x02,0x24, ++0x00,0x00,0xE3,0xA0, ++0x9C,0x00,0xEE,0x37, ++0x00,0x00,0x82,0xA6, ++0x9A,0x00,0xEF,0x37, ++0x0A,0x00,0x03,0x24, ++0xFF,0x03,0x02,0x24, ++0x00,0x00,0xC3,0xA1, ++0x00,0x00,0xE2,0xA5, ++0x25,0xB0,0x02,0x3C, ++0x02,0x00,0x03,0x24, ++0x96,0x00,0x42,0x34, ++0x00,0x00,0x43,0xA4, ++0x89,0x00,0xF5,0x37, ++0xB7,0x00,0xF1,0x37, ++0x20,0x00,0x02,0x24, ++0x09,0x00,0x03,0x24, ++0x00,0x00,0x22,0xA2, ++0x00,0x00,0xA3,0xA2, ++0x00,0x00,0xE2,0x96, ++0xFF,0xFD,0x03,0x24, ++0x04,0x02,0x05,0x24, ++0x24,0x10,0x43,0x00, ++0x00,0x00,0xE2,0xA6, ++0x00,0x00,0xE3,0x96, ++0x29,0xB0,0x02,0x3C, ++0x40,0x00,0x42,0x34, ++0x00,0x02,0x63,0x34, ++0x00,0x00,0xE3,0xA6, ++0xFF,0x00,0x84,0x30, ++0x00,0x00,0x45,0xA4, ++0x73,0x22,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x44,0x00,0xBF,0x8F, ++0x40,0x00,0xBE,0x8F, ++0x3C,0x00,0xB7,0x8F, ++0x38,0x00,0xB6,0x8F, ++0x34,0x00,0xB5,0x8F, ++0x30,0x00,0xB4,0x8F, ++0x2C,0x00,0xB3,0x8F, ++0x28,0x00,0xB2,0x8F, ++0x24,0x00,0xB1,0x8F, ++0x20,0x00,0xB0,0x8F, ++0x01,0x00,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x48,0x00,0xBD,0x27, ++0xFF,0xFF,0x03,0x24, ++0x00,0x00,0x43,0xA0, ++0x02,0x80,0x0B,0x3C, ++0xDE,0x5D,0x66,0x91, ++0x25,0xB0,0x09,0x3C, ++0x80,0x00,0x02,0x24, ++0x34,0x02,0x24,0x35, ++0x00,0x00,0x82,0xA4, ++0x37,0x02,0x25,0x35, ++0x53,0x00,0x03,0x24, ++0x22,0x00,0x02,0x24, ++0x00,0x00,0xA3,0xA0, ++0x1E,0xFF,0xC2,0x14, ++0x13,0x13,0x02,0x3C, ++0x1B,0x1B,0x02,0x3C, ++0x1B,0x1B,0x42,0x34, ++0x60,0x01,0x23,0x35, ++0x64,0x01,0x24,0x35, ++0x68,0x01,0x25,0x35, ++0x7C,0x01,0x2A,0x35, ++0x6C,0x01,0x26,0x35, ++0x70,0x01,0x27,0x35, ++0x74,0x01,0x28,0x35, ++0x78,0x01,0x29,0x35, ++0x00,0x00,0x62,0xAC, ++0x00,0x00,0x82,0xAC, ++0x00,0x00,0xA2,0xAC, ++0x00,0x00,0xC2,0xAC, ++0x00,0x00,0xE2,0xAC, ++0x00,0x00,0x02,0xAD, ++0x00,0x00,0x22,0xAD, ++0x00,0x00,0x42,0xAD, ++0xDE,0x5D,0x65,0x91, ++0x25,0xB0,0x0C,0x3C, ++0x01,0x00,0x03,0x3C, ++0x80,0x01,0x82,0x35, ++0x08,0x5F,0x63,0x34, ++0x22,0x00,0x04,0x24, ++0x00,0x00,0x43,0xAC, ++0x1D,0xFF,0xA4,0x14, ++0x0F,0x1F,0x02,0x3C, ++0x00,0xF0,0x4F,0x34, ++0xF7,0x01,0x91,0x35, ++0x15,0xF0,0x4D,0x34, ++0x78,0x67,0x00,0x08, ++0xFF,0xFF,0x0E,0x24, ++0x02,0x80,0x02,0x3C, ++0xDF,0x5D,0x44,0x90, ++0x06,0x00,0x03,0x24, ++0x0C,0x00,0x83,0x10, ++0x00,0x1C,0x02,0x3C, ++0x00,0x1C,0x42,0x34, ++0xA0,0x00,0x24,0x36, ++0x00,0x00,0x82,0xAC, ++0x00,0xE0,0x02,0x3C, ++0xA4,0x00,0x25,0x36, ++0x00,0x04,0x03,0x24, ++0xA8,0x00,0x26,0x36, ++0x00,0xB0,0x42,0x34, ++0x00,0x00,0xA3,0xAC, ++0xDA,0x66,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x16,0x16,0x02,0x3C, ++0x07,0x07,0x42,0x34, ++0xA0,0x00,0x23,0x36, ++0x00,0x00,0x62,0xAC, ++0x00,0xC0,0x02,0x3C, ++0xA8,0x00,0x25,0x36, ++0xA4,0x00,0x24,0x36, ++0x00,0xB4,0x42,0x34, ++0x00,0x00,0x80,0xAC, ++0x00,0x00,0xA2,0xAC, ++0xDC,0x66,0x00,0x08, ++0x02,0x80,0x03,0x3C, ++0xE8,0xFF,0xBD,0x27, ++0x01,0x00,0x06,0x24, ++0xE8,0x0E,0x04,0x24, ++0x10,0x00,0xBF,0xAF, ++0xA9,0x45,0x00,0x0C, ++0x00,0x10,0x05,0x3C, ++0x60,0x08,0x04,0x24, ++0xCB,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x20,0x04,0x06,0x3C, ++0x20,0x04,0xC6,0x34, ++0x25,0x30,0x46,0x00, ++0x60,0x08,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x70,0x08,0x04,0x24, ++0x00,0x04,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x00,0x20,0x06,0x3C, ++0x80,0x00,0xC6,0x34, ++0x80,0x0C,0x04,0x24, ++0xA9,0x45,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0x00,0x40,0x06,0x3C, ++0x10,0x00,0xBF,0x8F, ++0x00,0x01,0xC6,0x34, ++0x88,0x0C,0x04,0x24, ++0xFF,0xFF,0x05,0x24, ++0xA9,0x45,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x10,0x00,0xA0,0x10, ++0x21,0x38,0x00,0x00, ++0x25,0xB0,0x08,0x3C, ++0x00,0x00,0x82,0x8C, ++0x04,0x00,0x83,0x8C, ++0x21,0x30,0x00,0x00, ++0x21,0x10,0x48,0x00, ++0x00,0x00,0x43,0xAC, ++0x01,0x00,0xC2,0x24, ++0xFF,0x00,0x46,0x30, ++0x06,0x00,0xC3,0x2C, ++0xFD,0xFF,0x60,0x14, ++0x01,0x00,0xC2,0x24, ++0x02,0x00,0xE7,0x24, ++0x2B,0x10,0xE5,0x00, ++0xF3,0xFF,0x40,0x14, ++0x08,0x00,0x84,0x24, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x1C,0x00,0xBF,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x21,0x90,0xA0,0x00, ++0x0B,0x00,0xA0,0x10, ++0x21,0x88,0x00,0x00, ++0x21,0x80,0x80,0x00, ++0x00,0x00,0x04,0x8E, ++0x04,0x00,0x05,0x8E, ++0x08,0x00,0x06,0x8E, ++0x03,0x00,0x31,0x26, ++0xA9,0x45,0x00,0x0C, ++0x0C,0x00,0x10,0x26, ++0x2B,0x10,0x32,0x02, ++0xF8,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x21,0x40,0x80,0x00, ++0x21,0x48,0x00,0x00, ++0x1E,0x00,0xA0,0x10, ++0x21,0x38,0x00,0x00, ++0x80,0x30,0x07,0x00, ++0x21,0x10,0xC8,0x00, ++0x00,0x00,0x43,0x8C, ++0x00,0x00,0x00,0x00, ++0x00,0xF2,0x63,0x24, ++0x1D,0x00,0x62,0x2C, ++0x12,0x00,0x40,0x10, ++0x80,0x10,0x03,0x00, ++0x02,0x80,0x03,0x3C, ++0x64,0xE9,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x8C, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0x80,0x00, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x23,0x18,0x69,0x00, ++0x08,0x00,0x44,0x8C, ++0x02,0x80,0x02,0x3C, ++0x80,0x18,0x03,0x00, ++0x30,0x1F,0x42,0x24, ++0x21,0x18,0x62,0x00, ++0x04,0x1D,0x64,0xAC, ++0x01,0x00,0x29,0x25, ++0x03,0x00,0xE7,0x24, ++0x2B,0x10,0xE5,0x00, ++0xE5,0xFF,0x40,0x14, ++0x80,0x30,0x07,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0xD6,0xFF,0x40,0x14, ++0x00,0x1D,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0xC8,0xFF,0x40,0x14, ++0xFC,0x1C,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0xBA,0xFF,0x40,0x14, ++0xF8,0x1C,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0xAC,0xFF,0x40,0x14, ++0x08,0x1D,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0x9E,0xFF,0x40,0x14, ++0xF4,0x1C,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x21,0x10,0xC8,0x00, ++0xC0,0x18,0x09,0x00, ++0x08,0x00,0x44,0x8C, ++0x23,0x18,0x69,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x80,0x18,0x03,0x00, ++0x03,0x00,0xE7,0x24, ++0x21,0x18,0x62,0x00, ++0x2B,0x10,0xE5,0x00, ++0x90,0xFF,0x40,0x14, ++0xF0,0x1C,0x64,0xAC, ++0xE0,0x68,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x25,0xB0,0x02,0x3C, ++0xFC,0x37,0x03,0x24, ++0x40,0x00,0x42,0x34, ++0x02,0x80,0x04,0x3C, ++0x00,0x00,0x43,0xA4, ++0xE8,0xFF,0xBD,0x27, ++0xA4,0xCF,0x84,0x24, ++0x10,0x00,0xBF,0xAF, ++0x94,0x68,0x00,0x0C, ++0x74,0x01,0x05,0x24, ++0x02,0x80,0x02,0x3C, ++0xDE,0x5D,0x44,0x90, ++0x12,0x00,0x03,0x24, ++0x34,0x00,0x83,0x10, ++0x13,0x00,0x82,0x28, ++0x17,0x00,0x40,0x14, ++0x11,0x00,0x02,0x24, ++0x22,0x00,0x02,0x24, ++0x36,0x00,0x82,0x10, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x04,0x3C, ++0x2C,0xCC,0x84,0x24, ++0xBF,0x68,0x00,0x0C, ++0x54,0x00,0x05,0x24, ++0x02,0x80,0x02,0x3C, ++0x4A,0xF3,0x44,0x90, ++0x01,0x00,0x03,0x24, ++0x1A,0x00,0x83,0x10, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x2C,0xC7,0x84,0x24, ++0x94,0x68,0x00,0x0C, ++0x40,0x01,0x05,0x24, ++0x10,0x00,0xBF,0x8F, ++0x84,0x08,0x04,0x24, ++0xFF,0x00,0x05,0x24, ++0x58,0x00,0x06,0x24, ++0x1B,0x47,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0xED,0xFF,0x82,0x14, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x04,0x3C, ++0xE4,0xCE,0x84,0x24, ++0xA7,0x68,0x00,0x0C, ++0x30,0x00,0x05,0x24, ++0x02,0x80,0x04,0x3C, ++0x2C,0xCC,0x84,0x24, ++0xBF,0x68,0x00,0x0C, ++0x54,0x00,0x05,0x24, ++0x02,0x80,0x02,0x3C, ++0x4A,0xF3,0x44,0x90, ++0x01,0x00,0x03,0x24, ++0xE8,0xFF,0x83,0x14, ++0x00,0x00,0x00,0x00, ++0x75,0x68,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x2C,0xC7,0x84,0x24, ++0x94,0x68,0x00,0x0C, ++0x40,0x01,0x05,0x24, ++0x10,0x00,0xBF,0x8F, ++0x84,0x08,0x04,0x24, ++0xFF,0x00,0x05,0x24, ++0x58,0x00,0x06,0x24, ++0x1B,0x47,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x04,0x3C, ++0x30,0xCE,0x84,0x24, ++0x2D,0x00,0x05,0x24, ++0xA7,0x68,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x64,0x69,0x00,0x08, ++0x02,0x80,0x04,0x3C, ++0x7C,0xCD,0x84,0x24, ++0x7B,0x69,0x00,0x08, ++0x2D,0x00,0x05,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xB0,0xAF, ++0x50,0x0C,0x04,0x24, ++0xFF,0x00,0x05,0x24, ++0x02,0x80,0x10,0x3C, ++0x14,0x00,0xBF,0xAF, ++0x0A,0x47,0x00,0x0C, ++0x30,0x1F,0x10,0x26, ++0x60,0x1D,0x02,0xA2, ++0x58,0x0C,0x04,0x24, ++0x0A,0x47,0x00,0x0C, ++0xFF,0x00,0x05,0x24, ++0x61,0x1D,0x02,0xA2, ++0x60,0x0C,0x04,0x24, ++0x0A,0x47,0x00,0x0C, ++0xFF,0x00,0x05,0x24, ++0x62,0x1D,0x02,0xA2, ++0x68,0x0C,0x04,0x24, ++0x0A,0x47,0x00,0x0C, ++0xFF,0x00,0x05,0x24, ++0x63,0x1D,0x02,0xA2, ++0x38,0x0C,0x04,0x24, ++0x0A,0x47,0x00,0x0C, ++0xFF,0x00,0x05,0x24, ++0xE8,0x1C,0x02,0xA2, ++0x34,0x0C,0x04,0x24, ++0x0A,0x47,0x00,0x0C, ++0xFF,0xFF,0x05,0x24, ++0xEC,0x1C,0x02,0xAE, ++0x14,0x00,0xBF,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x03,0x3C, ++0x84,0xA7,0x42,0x24, ++0xBC,0x5E,0x60,0xAC, ++0x1C,0x5E,0xA2,0xAC, ++0x02,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0xC0,0x5E,0x60,0xA4, ++0x1C,0x5E,0xA4,0x24, ++0x88,0x0D,0x42,0x24, ++0x02,0x80,0x03,0x3C, ++0xC2,0x5E,0x60,0xA4, ++0x08,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0x02,0x80,0x06,0x3C, ++0x88,0x10,0x42,0x24, ++0xA4,0x0D,0x63,0x24, ++0xC4,0x5E,0xC7,0x24, ++0x14,0x00,0x82,0xAC, ++0x10,0x00,0x83,0xAC, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xC4,0x5E,0xC0,0xAC, ++0x04,0x00,0xE0,0xAC, ++0xCC,0x5E,0x40,0xA0, ++0xD0,0x5E,0x60,0xAC, ++0x01,0x80,0x02,0x3C, ++0x30,0xD2,0x42,0x24, ++0x7C,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0xA4,0x10,0x63,0x24, ++0x64,0x13,0x42,0x24, ++0x1C,0x00,0x83,0xAC, ++0x20,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0x2C,0x16,0x63,0x24, ++0xF0,0x18,0x42,0x24, ++0x24,0x00,0x83,0xAC, ++0x28,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x01,0x80,0x02,0x3C, ++0xC8,0x2A,0x63,0x24, ++0x98,0x01,0x42,0x24, ++0x2C,0x00,0x83,0xAC, ++0x50,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0x10,0x1C,0x63,0x24, ++0xFC,0x1D,0x42,0x24, ++0x30,0x00,0x83,0xAC, ++0x38,0x00,0x82,0xAC, ++0x00,0x80,0x03,0x3C, ++0x00,0x80,0x02,0x3C, ++0x00,0x03,0x63,0x24, ++0xB4,0x1B,0x42,0x24, ++0x4C,0x00,0x83,0xAC, ++0x08,0x00,0xE0,0x03, ++0x3C,0x00,0x82,0xAC, ++0x25,0xB0,0x02,0x3C, ++0x08,0x00,0x42,0x34, ++0x00,0x00,0x43,0x8C, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x0E,0x3C, ++0x02,0x80,0x08,0x3C, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0xF8,0x03,0x4D,0x24, ++0x00,0x1C,0x6C,0x24, ++0x01,0x00,0x07,0x24, ++0x00,0x00,0xCB,0x25, ++0xFF,0xFF,0x0A,0x24, ++0x00,0x04,0x09,0x25, ++0x80,0x1A,0x07,0x00, ++0x21,0x10,0x6B,0x00, ++0x00,0x00,0x42,0xAC, ++0x90,0x00,0x4A,0xAC, ++0x00,0x04,0x04,0x8D, ++0x01,0x00,0xE7,0x24, ++0x08,0x00,0x45,0x24, ++0x21,0x18,0x6D,0x00, ++0x07,0x00,0xE6,0x28, ++0x04,0x00,0x82,0xAC, ++0x00,0x00,0x44,0xAC, ++0x04,0x00,0x49,0xAC, ++0x00,0x04,0x02,0xAD, ++0x8C,0x00,0x40,0xAC, ++0x6C,0x00,0xA3,0xAC, ++0xF0,0xFF,0xC0,0x14, ++0x68,0x00,0xAC,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0xC9,0xAD, ++0x07,0x00,0xA2,0x2C, ++0x13,0x00,0x40,0x10, ++0xFF,0xFF,0x07,0x24, ++0x02,0x80,0x02,0x3C, ++0x80,0x1A,0x05,0x00, ++0x00,0x00,0x42,0x24, ++0x0E,0x00,0xA0,0x10, ++0x21,0x30,0x62,0x00, ++0x90,0x00,0xC3,0x8C, ++0xFF,0xFF,0x02,0x24, ++0x0A,0x00,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x8C,0x00,0xC2,0x8C, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x02,0x24, ++0x88,0x00,0xC4,0xAC, ++0x8C,0x00,0xC2,0xAC, ++0x90,0x00,0xC5,0xAC, ++0x21,0x38,0xA0,0x00, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0xE0,0x00, ++0x25,0xB0,0x06,0x3C, ++0x02,0x80,0x02,0x3C, ++0xE0,0xFF,0xBD,0x27, ++0x68,0xA8,0x42,0x24, ++0xDB,0xFF,0x03,0x24, ++0x18,0x03,0xC4,0x34, ++0x27,0x00,0xC5,0x34, ++0x00,0x00,0x82,0xAC, ++0x1C,0x00,0xBF,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x00,0x00,0xA3,0xA0, ++0x06,0x00,0xC2,0x34, ++0x00,0x00,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x0F,0x00,0x63,0x30, ++0x5A,0x00,0x60,0x14, ++0x01,0x00,0x02,0x24, ++0x1B,0x00,0xC3,0x34, ++0x07,0x00,0x02,0x24, ++0x00,0x00,0x62,0xA0, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x50,0x24, ++0x34,0x1C,0x04,0x8E, ++0xCB,0x45,0x00,0x0C, ++0x10,0x00,0x05,0x24, ++0x40,0x1C,0x04,0x8E, ++0x10,0x00,0x05,0x3C, ++0x01,0x00,0x06,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x90,0x40,0x00, ++0x3C,0x1C,0x04,0x8E, ++0x10,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x58,0x1C,0x04,0x8E, ++0x00,0x04,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x58,0x1C,0x04,0x8E, ++0x00,0x08,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x02,0x80,0x05,0x3C, ++0xEC,0xD9,0xA5,0x24, ++0x21,0x20,0x00,0x00, ++0x9F,0x47,0x00,0x0C, ++0xCA,0x00,0x06,0x24, ++0x31,0x00,0x40,0x10, ++0x21,0x18,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0xE7,0x5D,0x43,0x90, ++0x01,0x00,0x11,0x24, ++0x57,0x00,0x71,0x10, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x02,0x3C, ++0x4A,0xF3,0x43,0x90, ++0x00,0x00,0x00,0x00, ++0x58,0x00,0x71,0x10, ++0x02,0x80,0x05,0x3C, ++0x34,0x1C,0x04,0x8E, ++0x21,0x30,0x40,0x02, ++0x10,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x02,0x80,0x11,0x3C, ++0xDE,0x5D,0x23,0x92, ++0x11,0x00,0x02,0x24, ++0x2E,0x00,0x62,0x10, ++0x00,0x08,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x01,0x00,0x04,0x24, ++0x34,0x1C,0x04,0x8E, ++0xCB,0x45,0x00,0x0C, ++0x10,0x00,0x05,0x3C, ++0x40,0x1C,0x04,0x8E, ++0x10,0x00,0x05,0x3C, ++0x01,0x00,0x06,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x90,0x40,0x00, ++0x3C,0x1C,0x04,0x8E, ++0x10,0x00,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x58,0x1C,0x04,0x8E, ++0x00,0x04,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x58,0x1C,0x04,0x8E, ++0x00,0x08,0x05,0x24, ++0xA9,0x45,0x00,0x0C, ++0x21,0x30,0x00,0x00, ++0x02,0x80,0x05,0x3C, ++0x94,0xD9,0xA5,0x24, ++0x01,0x00,0x04,0x24, ++0x9F,0x47,0x00,0x0C, ++0x16,0x00,0x06,0x24, ++0x0C,0x00,0x40,0x14, ++0x21,0x18,0x00,0x00, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xA9,0xFF,0x62,0x14, ++0x1F,0x00,0xC3,0x34, ++0x2F,0x6A,0x00,0x08, ++0x07,0x00,0x02,0x24, ++0x34,0x1C,0x04,0x8E, ++0x21,0x30,0x40,0x02, ++0xA9,0x45,0x00,0x0C, ++0x10,0x00,0x05,0x3C, ++0x00,0x08,0x04,0x24, ++0x00,0x01,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0x00,0x08,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x01,0x00,0x06,0x24, ++0xDE,0x5D,0x23,0x92, ++0x11,0x00,0x02,0x24, ++0x1D,0x00,0x62,0x10, ++0x00,0x08,0x04,0x24, ++0xE6,0x44,0x00,0x0C, ++0x21,0x20,0x00,0x00, ++0x0F,0x00,0x05,0x3C, ++0x0C,0x00,0x06,0x3C, ++0xFF,0xFF,0xA5,0x34, ++0x00,0xB4,0xC6,0x34, ++0x5F,0x47,0x00,0x0C, ++0x08,0x00,0x04,0x24, ++0x1C,0x00,0xBF,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x01,0x00,0x03,0x24, ++0x21,0x10,0x60,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x84,0xD8,0xA5,0x24, ++0x21,0x20,0x00,0x00, ++0x9F,0x47,0x00,0x0C, ++0x16,0x00,0x06,0x24, ++0x55,0x6A,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0xDC,0xD8,0xA5,0x24, ++0x21,0x20,0x00,0x00, ++0x9F,0x47,0x00,0x0C, ++0x16,0x00,0x06,0x24, ++0x59,0x6A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0xFF,0x05,0x3C, ++0xA9,0x45,0x00,0x0C, ++0x03,0x00,0x06,0x24, ++0x9A,0x6A,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x02,0x80,0x02,0x3C, ++0x61,0x5A,0x47,0x90, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x03,0x00,0x03,0x24, ++0x1E,0x3B,0x84,0x24, ++0xAC,0xE3,0xA5,0x24, ++0x0F,0x00,0xE3,0x10, ++0x0D,0x00,0x06,0x24, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x1E,0x3B,0x84,0x24, ++0x5C,0xE3,0xA5,0x24, ++0x10,0x52,0x00,0x0C, ++0x0D,0x00,0x06,0x24, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x10,0x00,0xBF,0x8F, ++0x2B,0x3B,0x84,0x24, ++0x6C,0xE3,0xA5,0x24, ++0x0D,0x00,0x06,0x24, ++0x10,0x52,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x10,0x52,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0x10,0x00,0xBF,0x8F, ++0x2B,0x3B,0x84,0x24, ++0x9C,0xE3,0xA5,0x24, ++0x0D,0x00,0x06,0x24, ++0x10,0x52,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x02,0x80,0x11,0x3C, ++0x02,0x80,0x05,0x3C, ++0x02,0x80,0x10,0x3C, ++0x30,0x1F,0x10,0x26, ++0x64,0x5A,0x24,0x26, ++0x14,0xDD,0xA5,0x24, ++0x34,0x00,0x06,0x24, ++0x18,0x00,0xBF,0xAF, ++0x10,0x52,0x00,0x0C, ++0x64,0x5A,0x31,0x26, ++0xBD,0x6A,0x00,0x0C, ++0x68,0x3B,0x11,0xAE, ++0x02,0x00,0x11,0x24, ++0x02,0x80,0x04,0x3C, ++0x00,0x80,0x06,0x3C, ++0xA0,0x38,0x11,0xA2, ++0xBC,0x57,0x84,0x24, ++0xFC,0x64,0xC6,0x24, ++0x21,0x28,0x00,0x00, ++0xA2,0x23,0x00,0x0C, ++0x98,0x38,0x00,0xAE, ++0x02,0x80,0x04,0x3C, ++0x01,0x80,0x06,0x3C, ++0xBC,0x38,0x11,0xA2, ++0xD8,0x57,0x84,0x24, ++0x0C,0x31,0xC6,0x24, ++0x21,0x28,0x00,0x00, ++0xA2,0x23,0x00,0x0C, ++0xB4,0x38,0x00,0xAE, ++0x02,0x80,0x04,0x3C, ++0x01,0x80,0x06,0x3C, ++0xD8,0x38,0x11,0xA2, ++0xF4,0x57,0x84,0x24, ++0xC0,0x2E,0xC6,0x24, ++0x21,0x28,0x00,0x00, ++0xA2,0x23,0x00,0x0C, ++0xD0,0x38,0x00,0xAE, ++0x02,0x80,0x04,0x3C, ++0x01,0x80,0x06,0x3C, ++0xF4,0x38,0x11,0xA2, ++0x10,0x58,0x84,0x24, ++0x14,0x25,0xC6,0x24, ++0x21,0x28,0x00,0x00, ++0xA2,0x23,0x00,0x0C, ++0xEC,0x38,0x00,0xAE, ++0x02,0x80,0x04,0x3C, ++0x00,0x80,0x06,0x3C, ++0x10,0x39,0x11,0xA2, ++0x2C,0x58,0x84,0x24, ++0x58,0x64,0xC6,0x24, ++0x21,0x28,0x00,0x00, ++0xA2,0x23,0x00,0x0C, ++0x08,0x39,0x00,0xAE, ++0x02,0x80,0x04,0x3C, ++0x00,0x80,0x06,0x3C, ++0x48,0x39,0x11,0xA2, ++0x40,0x39,0x00,0xAE, ++0x64,0x58,0x84,0x24, ++0x38,0x3B,0xC6,0x24, ++0xA2,0x23,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x02,0x80,0x02,0x3C, ++0x49,0xF3,0x43,0x90, ++0x18,0x00,0xBF,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x9C,0x3E,0x03,0xA2, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x03,0x80,0x05,0x3C, ++0x00,0x80,0xA5,0x24, ++0x40,0x10,0x0D,0x3C, ++0xFF,0xFF,0xA5,0x30, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x42,0x24, ++0x25,0xC8,0xAD,0x00, ++0x38,0x37,0x59,0xAC, ++0x00,0x01,0x39,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x44,0x37,0x59,0xAC, ++0x00,0x01,0x39,0x27, ++0x1C,0x00,0xB7,0xAF, ++0x18,0x00,0xB6,0xAF, ++0x14,0x00,0xB5,0xAF, ++0x10,0x00,0xB4,0xAF, ++0x0C,0x00,0xB3,0xAF, ++0x08,0x00,0xB2,0xAF, ++0x04,0x00,0xB1,0xAF, ++0x00,0x00,0xB0,0xAF, ++0x50,0x37,0x59,0xAC, ++0x00,0x01,0x39,0x27, ++0x5C,0x37,0x59,0xAC, ++0xAA,0x1B,0x44,0x90, ++0x00,0x01,0x39,0x27, ++0x68,0x37,0x59,0xAC, ++0x00,0x01,0x39,0x27, ++0x74,0x37,0x59,0xAC, ++0x20,0xB0,0x06,0x3C, ++0x44,0x37,0x48,0x8C, ++0x50,0x37,0x49,0x8C, ++0x5C,0x37,0x4A,0x8C, ++0x68,0x37,0x4B,0x8C, ++0x74,0x37,0x4C,0x8C, ++0x00,0x22,0x04,0x00, ++0x00,0x01,0xC7,0x34, ++0xFF,0x1F,0x03,0x3C, ++0x00,0x01,0x39,0x27, ++0xFF,0xFF,0x63,0x34, ++0x21,0x38,0x87,0x00, ++0x21,0x20,0x86,0x00, ++0x24,0x38,0xE3,0x00, ++0x20,0x10,0x06,0x3C, ++0x24,0x20,0x83,0x00, ++0x80,0x37,0x59,0xAC, ++0x21,0x78,0x20,0x03, ++0x25,0x28,0xAD,0x00, ++0x25,0xB0,0x0E,0x3C, ++0x00,0x01,0x39,0x27, ++0x34,0x37,0x45,0xAC, ++0x40,0x37,0x48,0xAC, ++0x4C,0x37,0x49,0xAC, ++0x58,0x37,0x4A,0xAC, ++0xF8,0x36,0x44,0xAC, ++0x64,0x37,0x4B,0xAC, ++0x04,0x37,0x47,0xAC, ++0x70,0x37,0x4C,0xAC, ++0xAC,0x00,0xC3,0x35, ++0xCC,0x36,0x46,0xAC, ++0xC8,0x36,0x46,0xAC, ++0xD8,0x36,0x46,0xAC, ++0xD4,0x36,0x46,0xAC, ++0xE4,0x36,0x46,0xAC, ++0x8C,0x37,0x59,0xAC, ++0xFC,0x36,0x44,0xAC, ++0x08,0x37,0x47,0xAC, ++0x7C,0x37,0x4F,0xAC, ++0xE0,0x36,0x46,0xAC, ++0xF0,0x36,0x46,0xAC, ++0xEC,0x36,0x46,0xAC, ++0x14,0x37,0x46,0xAC, ++0x10,0x37,0x46,0xAC, ++0x00,0x02,0x39,0x27, ++0x00,0x00,0x68,0x8C, ++0xAC,0x1B,0x47,0x94, ++0xA4,0x37,0x59,0xAC, ++0xB0,0x00,0xC3,0x35, ++0x00,0x00,0x75,0x8C, ++0x21,0x10,0x05,0x3C, ++0x8C,0x37,0x52,0x8C, ++0x23,0x10,0x0B,0x3C, ++0x22,0x10,0x0F,0x3C, ++0x02,0x80,0x14,0x3C, ++0x02,0x80,0x16,0x3C, ++0x02,0x80,0x17,0x3C, ++0x02,0x80,0x18,0x3C, ++0x00,0x80,0xA4,0x34, ++0x21,0x98,0x20,0x03, ++0x23,0x20,0x87,0x00, ++0x00,0x04,0x39,0x27, ++0x24,0x10,0x07,0x3C, ++0x9C,0x57,0x8A,0x26, ++0xA4,0x57,0xC9,0x26, ++0xAC,0x57,0xEC,0x26, ++0xB4,0x57,0x0D,0x27, ++0x00,0x04,0x70,0x35, ++0x01,0x00,0x08,0x25, ++0x00,0x40,0xF1,0x35, ++0x00,0x01,0xCE,0x35, ++0x01,0x00,0x03,0x24, ++0x88,0x37,0x52,0xAC, ++0x91,0x37,0x43,0xA0, ++0xA0,0x37,0x53,0xAC, ++0x08,0x38,0x50,0xAC, ++0xCC,0x37,0x48,0xAC, ++0xD8,0x37,0x44,0xAC, ++0xFC,0x37,0x51,0xAC, ++0xF0,0x37,0x55,0xAC, ++0x00,0x00,0xC7,0xAD, ++0xEC,0x37,0x47,0xAC, ++0x0C,0x38,0x46,0xAC, ++0x20,0x37,0x46,0xAC, ++0x1C,0x37,0x46,0xAC, ++0xAA,0x37,0x40,0xA4, ++0xA9,0x37,0x40,0xA0, ++0xA8,0x37,0x40,0xA0, ++0x00,0x38,0x4B,0xAC, ++0x04,0x38,0x4B,0xAC, ++0xC4,0x37,0x45,0xAC, ++0xC8,0x37,0x45,0xAC, ++0xD0,0x37,0x45,0xAC, ++0xD4,0x37,0x45,0xAC, ++0xF4,0x37,0x4F,0xAC, ++0xF8,0x37,0x4F,0xAC, ++0xE8,0x37,0x47,0xAC, ++0x10,0x38,0x46,0xAC, ++0x1C,0x38,0x59,0xAC, ++0x18,0x38,0x59,0xAC, ++0x04,0x00,0x4A,0xAD, ++0x9C,0x57,0x8A,0xAE, ++0x04,0x00,0x8C,0xAD, ++0xA4,0x57,0xC9,0xAE, ++0x04,0x00,0xAD,0xAD, ++0xAC,0x57,0xEC,0xAE, ++0xB4,0x57,0x0D,0xAF, ++0x04,0x00,0x29,0xAD, ++0x02,0x80,0x02,0x3C, ++0x00,0x1C,0x43,0x24, ++0x01,0x00,0x05,0x24, ++0x21,0x20,0x20,0x01, ++0x0F,0x00,0x06,0x24, ++0x21,0x10,0x80,0x00, ++0xFF,0xFF,0xC6,0x24, ++0x08,0x00,0x79,0xAC, ++0x00,0x00,0x63,0xAC, ++0x10,0x00,0x65,0xAC, ++0x00,0x00,0x69,0xAC, ++0x21,0x20,0x60,0x00, ++0x04,0x00,0x62,0xAC, ++0x00,0x00,0x43,0xAC, ++0x00,0x01,0x39,0x27, ++0xF5,0xFF,0xC1,0x04, ++0x18,0x00,0x63,0x24, ++0x02,0x80,0x02,0x3C, ++0xAC,0x57,0x48,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x04,0x00,0x07,0x8D, ++0x80,0x1D,0x4B,0x24, ++0x04,0x00,0x24,0xAD, ++0x00,0x1C,0x6A,0x24, ++0x02,0x00,0x09,0x24, ++0x21,0x28,0x00,0x00, ++0x0F,0x00,0x06,0x24, ++0x21,0x20,0xAB,0x00, ++0x21,0x10,0xAA,0x00, ++0xFF,0xFF,0xC6,0x24, ++0x88,0x01,0x59,0xAC, ++0x90,0x01,0x49,0xAC, ++0x18,0x00,0xA5,0x24, ++0x00,0x00,0x88,0xAC, ++0x04,0x00,0x87,0xAC, ++0x00,0x00,0xE4,0xAC, ++0x00,0x02,0x39,0x27, ++0xF5,0xFF,0xC1,0x04, ++0x21,0x38,0x80,0x00, ++0x02,0x80,0x02,0x3C, ++0xB4,0x57,0x49,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x04,0x00,0x27,0x8D, ++0x00,0x1F,0x4B,0x24, ++0x04,0x00,0x04,0xAD, ++0x00,0x1C,0x6A,0x24, ++0x03,0x00,0x08,0x24, ++0x21,0x28,0x00,0x00, ++0x01,0x00,0x06,0x24, ++0x21,0x20,0xAB,0x00, ++0x21,0x10,0xAA,0x00, ++0xFF,0xFF,0xC6,0x24, ++0x08,0x03,0x59,0xAC, ++0x10,0x03,0x48,0xAC, ++0x18,0x00,0xA5,0x24, ++0x00,0x00,0x89,0xAC, ++0x04,0x00,0x87,0xAC, ++0x00,0x00,0xE4,0xAC, ++0x00,0x08,0x39,0x27, ++0xF5,0xFF,0xC1,0x04, ++0x21,0x38,0x80,0x00, ++0x1C,0x00,0xB7,0x8F, ++0x18,0x00,0xB6,0x8F, ++0x14,0x00,0xB5,0x8F, ++0x10,0x00,0xB4,0x8F, ++0x0C,0x00,0xB3,0x8F, ++0x08,0x00,0xB2,0x8F, ++0x04,0x00,0xB1,0x8F, ++0x00,0x00,0xB0,0x8F, ++0x20,0x00,0xBD,0x27, ++0x08,0x00,0xE0,0x03, ++0x04,0x00,0x24,0xAD, ++0xD0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x20,0x00,0xB2,0xAF, ++0x02,0x80,0x03,0x3C, ++0x78,0xE8,0x52,0x24, ++0x02,0x80,0x02,0x3C, ++0x28,0x00,0xB4,0xAF, ++0x24,0x00,0xB3,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x2C,0x00,0xBF,0xAF, ++0x04,0xE8,0x73,0x24, ++0x30,0x1F,0x50,0x24, ++0x21,0x88,0x00,0x00, ++0x02,0x80,0x14,0x3C, ++0xDD,0x59,0x00,0x0C, ++0x21,0x20,0x20,0x02, ++0x1C,0x24,0x05,0x8E, ++0x6C,0x00,0x66,0x8E, ++0xE4,0xE7,0x82,0x26, ++0x6C,0x00,0x43,0x8E, ++0x1B,0x00,0x44,0x90, ++0xFF,0xF1,0x02,0x24, ++0x21,0x18,0x66,0x00, ++0x24,0x28,0xA2,0x00, ++0x00,0x21,0x04,0x00, ++0x42,0x18,0x03,0x00, ++0x00,0x02,0xA5,0x34, ++0xE8,0x23,0x03,0xAE, ++0x0C,0x24,0x04,0xAE, ++0x1C,0x24,0x05,0xAE, ++0x10,0x24,0x04,0xAE, ++0x21,0x30,0x00,0x00, ++0x21,0x10,0x06,0x02, ++0x01,0x00,0xC6,0x24, ++0x1D,0x00,0xC3,0x28, ++0x3D,0x24,0x40,0xA0, ++0x20,0x24,0x40,0xA0, ++0xFA,0xFF,0x60,0x14, ++0x5A,0x24,0x40,0xA0, ++0x01,0x00,0x31,0x26, ++0x20,0x00,0x22,0x2A, ++0x78,0x24,0x00,0xAE, ++0xE3,0xFF,0x40,0x14, ++0x94,0x00,0x10,0x26, ++0x02,0x80,0x02,0x3C, ++0x02,0x80,0x03,0x3C, ++0x30,0x1F,0x4B,0x24, ++0x02,0x80,0x02,0x3C, ++0x78,0xE8,0x6F,0x24, ++0x04,0xE8,0x4D,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xE4,0xE7,0x6E,0x24, ++0xC4,0xE7,0x4C,0x24, ++0x21,0x88,0x00,0x00, ++0x80,0x18,0x11,0x00, ++0x21,0x20,0x6D,0x00, ++0x21,0x10,0x6F,0x00, ++0x21,0x28,0x2E,0x02, ++0x21,0x30,0x2C,0x02, ++0x00,0x00,0x88,0x8C, ++0x00,0x00,0xA9,0x90, ++0x00,0x00,0xC7,0x90, ++0x00,0x00,0x4A,0x8C, ++0x21,0x10,0x2B,0x02, ++0x01,0x00,0x31,0x26, ++0x21,0x18,0x6B,0x00, ++0x1D,0x00,0x24,0x2A, ++0x60,0x05,0x68,0xAC, ++0x3E,0x05,0x47,0xA0, ++0xD4,0x05,0x6A,0xAC, ++0xEF,0xFF,0x80,0x14, ++0x04,0x05,0x49,0xA0, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x4A,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xA0,0xE6,0x6B,0x24, ++0x40,0xE5,0x4C,0x24, ++0x21,0x88,0x00,0x00, ++0x21,0x48,0x00,0x00, ++0x21,0x30,0x00,0x00, ++0x21,0x40,0x2A,0x01, ++0x21,0x38,0x2B,0x01, ++0x21,0x10,0xE6,0x00, ++0x91,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x06,0x01, ++0x01,0x00,0xC6,0x24, ++0x05,0x00,0xC2,0x28, ++0x39,0x04,0x64,0xA0, ++0xF8,0xFF,0x40,0x14, ++0xA8,0x03,0x65,0xA0, ++0x21,0x10,0x2C,0x02, ++0x1D,0x00,0x44,0x90, ++0x00,0x00,0x45,0x90, ++0x21,0x18,0x2A,0x02, ++0x01,0x00,0x31,0x26, ++0x1D,0x00,0x22,0x2A, ++0xE7,0x04,0x64,0xA0, ++0xCA,0x04,0x65,0xA0, ++0xEB,0xFF,0x40,0x14, ++0x05,0x00,0x29,0x25, ++0x52,0x00,0x02,0x24, ++0x10,0x00,0xA2,0xA3, ++0x41,0x00,0x03,0x24, ++0x4D,0x00,0x02,0x24, ++0x02,0x80,0x07,0x3C, ++0x64,0xF3,0xE7,0x24, ++0x11,0x00,0xA3,0xA3, ++0x12,0x00,0xA2,0xA3, ++0xE8,0x03,0x03,0x24, ++0x01,0x00,0x02,0x24, ++0x01,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0xDC,0x93,0xC6,0x24, ++0x0C,0x00,0xE3,0xAC, ++0x14,0x00,0xE2,0xA0, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x2C,0x00,0xBF,0x8F, ++0x28,0x00,0xB4,0x8F, ++0x24,0x00,0xB3,0x8F, ++0x20,0x00,0xB2,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x30,0x00,0xBD,0x27, ++0x90,0xFF,0xBD,0x27, ++0x48,0x00,0xB0,0xAF, ++0x25,0xB0,0x10,0x3C, ++0x6C,0x00,0xBF,0xAF, ++0x68,0x00,0xBE,0xAF, ++0x64,0x00,0xB7,0xAF, ++0x58,0x00,0xB4,0xAF, ++0x54,0x00,0xB3,0xAF, ++0x50,0x00,0xB2,0xAF, ++0x4C,0x00,0xB1,0xAF, ++0x60,0x00,0xB6,0xAF, ++0x5C,0x00,0xB5,0xAF, ++0xE0,0x0E,0x02,0x36, ++0x21,0x20,0x40,0x00, ++0x00,0x00,0x42,0x8C, ++0xDC,0x0E,0x12,0x36, ++0x70,0x0E,0x13,0x36, ++0x10,0x00,0xA2,0xAF, ++0x00,0x00,0x42,0x8E, ++0x78,0x0E,0x1E,0x36, ++0x7C,0x0E,0x14,0x36, ++0x14,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8E, ++0x25,0xB0,0x02,0x3C, ++0x74,0x0E,0x42,0x34, ++0x18,0x00,0xA3,0xAF, ++0x00,0x00,0x42,0x8C, ++0xD4,0x0E,0x10,0x36, ++0xED,0x3F,0x11,0x3C, ++0x1C,0x00,0xA2,0xAF, ++0x00,0x00,0xC3,0x8F, ++0xFB,0x92,0x25,0x36, ++0x25,0xB0,0x17,0x3C, ++0x20,0x00,0xA3,0xAF, ++0x00,0x00,0x82,0x8E, ++0x25,0xB0,0x03,0x3C, ++0x80,0x0E,0x63,0x34, ++0x24,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x84,0x0E,0x42,0x34, ++0x28,0x00,0xA3,0xAF, ++0x00,0x00,0x42,0x8C, ++0x25,0xB0,0x03,0x3C, ++0x88,0x0E,0x63,0x34, ++0x2C,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x25,0xB0,0x02,0x3C, ++0x8C,0x0E,0x42,0x34, ++0x30,0x00,0xA3,0xAF, ++0x00,0x00,0x42,0x8C, ++0x25,0xB0,0x03,0x3C, ++0xD0,0x0E,0x63,0x34, ++0x34,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x00,0x00,0x00,0x00, ++0x38,0x00,0xA3,0xAF, ++0x00,0x00,0x02,0x8E, ++0x25,0xB0,0x03,0x3C, ++0xD8,0x0E,0x63,0x34, ++0x3C,0x00,0xA2,0xAF, ++0x00,0x00,0x63,0x8C, ++0x02,0x5C,0x00,0x0C, ++0x40,0x00,0xA3,0xAF, ++0x21,0x20,0x40,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0x60,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x05,0x3C, ++0xC0,0xED,0xA5,0x24, ++0x00,0x00,0xA4,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x13,0x3C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x20,0xC0,0x03, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x20,0x80,0x02, ++0x02,0x80,0x02,0x3C, ++0xC4,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0xA0,0x00,0x12,0x3C, ++0x02,0x80,0x03,0x3C, ++0xC8,0xED,0x63,0x24, ++0x00,0x00,0x64,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x05,0x3C, ++0xCC,0xED,0xA5,0x24, ++0x00,0x00,0xA4,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x02,0x3C, ++0xD0,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x03,0x3C, ++0xD4,0xED,0x63,0x24, ++0x00,0x00,0x64,0x8C, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x21,0x20,0x00,0x02, ++0x02,0x5C,0x00,0x0C, ++0xFB,0x92,0x25,0x36, ++0x02,0x80,0x05,0x3C, ++0xD8,0xED,0xA5,0x24, ++0x00,0x00,0xA4,0x8C, ++0xFB,0x92,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x80,0x00,0x00, ++0x14,0x02,0x11,0x3C, ++0x20,0x08,0xE4,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x65,0x36, ++0x28,0x08,0xE4,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x65,0x36, ++0x30,0x54,0x45,0x36, ++0x02,0x5C,0x00,0x0C, ++0x04,0x0C,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x08,0x00,0x05,0x3C, ++0xE4,0x00,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x08,0x0C,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x80,0x80,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x28,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x02,0x01,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x40,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x16,0x68,0x05,0x3C, ++0xC2,0x04,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x44,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0xD1,0x28,0x05,0x24, ++0x02,0x5C,0x00,0x0C, ++0x4C,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x02,0x01,0x25,0x36, ++0x02,0x5C,0x00,0x0C, ++0x60,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x16,0x28,0x05,0x3C, ++0x05,0x0D,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x64,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x00,0xFB,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x00,0xF8,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x25,0x22,0x00,0x0C, ++0x02,0x00,0x04,0x24, ++0x00,0x02,0x05,0x3C, ++0xD1,0x28,0xA5,0x34, ++0x02,0x5C,0x00,0x0C, ++0x6C,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x00,0xFB,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x00,0xF8,0x05,0x3C, ++0x02,0x5C,0x00,0x0C, ++0x48,0x0E,0xE4,0x36, ++0x25,0x22,0x00,0x0C, ++0x02,0x00,0x04,0x24, ++0x33,0x54,0x45,0x36, ++0x02,0x5C,0x00,0x0C, ++0x04,0x0C,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0xE4,0x00,0x05,0x24, ++0x02,0x5C,0x00,0x0C, ++0x08,0x0C,0xE4,0x36, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x28,0x0E,0xE4,0x36, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0x00,0x00, ++0x20,0x08,0xE4,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x05,0x3C, ++0x28,0x08,0xE4,0x36, ++0x02,0x5C,0x00,0x0C, ++0x00,0x01,0x05,0x3C, ++0x25,0xB0,0x02,0x3C, ++0xAC,0x0E,0x42,0x34, ++0x00,0x00,0x5E,0x8C, ++0x00,0xD8,0x02,0x3C, ++0x24,0x10,0xC2,0x03, ++0x37,0x00,0x40,0x10, ++0x01,0x00,0x10,0x26, ++0x0A,0x00,0x02,0x2E, ++0x97,0xFF,0x40,0x14, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xA5,0x8F, ++0x25,0xB0,0x10,0x3C, ++0x02,0x5C,0x00,0x0C, ++0xE0,0x0E,0x04,0x36, ++0x14,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xDC,0x0E,0x04,0x36, ++0x18,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x70,0x0E,0x04,0x36, ++0x1C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x74,0x0E,0x04,0x36, ++0x20,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x78,0x0E,0x04,0x36, ++0x24,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x7C,0x0E,0x04,0x36, ++0x28,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x80,0x0E,0x04,0x36, ++0x2C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x84,0x0E,0x04,0x36, ++0x30,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x88,0x0E,0x04,0x36, ++0x34,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0x8C,0x0E,0x04,0x36, ++0x38,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xD0,0x0E,0x04,0x36, ++0x3C,0x00,0xA5,0x8F, ++0x02,0x5C,0x00,0x0C, ++0xD4,0x0E,0x04,0x36, ++0x40,0x00,0xA5,0x8F, ++0x88,0x0E,0x04,0x36, ++0x6C,0x00,0xBF,0x8F, ++0x68,0x00,0xBE,0x8F, ++0x64,0x00,0xB7,0x8F, ++0x60,0x00,0xB6,0x8F, ++0x5C,0x00,0xB5,0x8F, ++0x58,0x00,0xB4,0x8F, ++0x54,0x00,0xB3,0x8F, ++0x50,0x00,0xB2,0x8F, ++0x4C,0x00,0xB1,0x8F, ++0x48,0x00,0xB0,0x8F, ++0x02,0x5C,0x00,0x08, ++0x70,0x00,0xBD,0x27, ++0x80,0x0C,0xF1,0x36, ++0x94,0x0E,0xE3,0x36, ++0x00,0x00,0x24,0x8E, ++0x00,0x00,0x62,0x8C, ++0xFF,0x03,0x03,0x3C, ++0xFF,0x03,0x95,0x30, ++0x24,0x10,0x43,0x00, ++0x02,0x14,0x02,0x00, ++0x18,0x00,0x55,0x00, ++0x02,0x80,0x10,0x3C, ++0x30,0x1F,0x10,0x26, ++0x0C,0x00,0x02,0x8E, ++0x00,0xFC,0x12,0x24, ++0x00,0x00,0x3E,0x8E, ++0x24,0x10,0x52,0x00, ++0x21,0x20,0x20,0x02, ++0x24,0x30,0xD2,0x03, ++0xFF,0xFF,0x13,0x3C, ++0xFF,0x03,0x73,0x36, ++0x12,0x18,0x00,0x00, ++0x02,0x1A,0x03,0x00, ++0xFF,0x03,0x63,0x30, ++0x25,0x10,0x43,0x00, ++0xFF,0x03,0x45,0x30, ++0x25,0x28,0xC5,0x00, ++0x02,0x5C,0x00,0x0C, ++0x0C,0x00,0x02,0xAE, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x9C,0x0E,0xE3,0x36, ++0x00,0x00,0x62,0x8C, ++0xFF,0x03,0x03,0x3C, ++0x0C,0x00,0x06,0x8E, ++0x24,0x10,0x43,0x00, ++0x02,0xB4,0x02,0x00, ++0x18,0x00,0xD5,0x02, ++0xF0,0xFF,0x02,0x3C, ++0xFF,0x03,0x42,0x34, ++0x24,0x30,0xC2,0x00, ++0x00,0x00,0x3E,0x8E, ++0xC0,0xFF,0x04,0x3C, ++0xFF,0xFF,0x84,0x34, ++0x24,0x10,0xC4,0x03, ++0x21,0x20,0x20,0x02, ++0xFF,0x0F,0x11,0x3C, ++0xFF,0xFF,0x31,0x36, ++0x12,0x18,0x00,0x00, ++0x02,0x1A,0x03,0x00, ++0xFF,0x03,0x63,0x30, ++0x80,0x1A,0x03,0x00, ++0x25,0x30,0xC3,0x00, ++0x82,0x2A,0x06,0x00, ++0x3F,0x00,0xA5,0x30, ++0x00,0x2C,0x05,0x00, ++0x0C,0x00,0x06,0xAE, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0x45,0x00, ++0x94,0x0C,0xE4,0x36, ++0x00,0x00,0x9E,0x8C, ++0x82,0x29,0x16,0x00, ++0x00,0x2F,0x05,0x00, ++0x24,0x10,0xD1,0x03, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0x45,0x00, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x25,0xB0,0x05,0x3C, ++0xA4,0x0E,0xE3,0x36, ++0x14,0x0C,0xA5,0x34, ++0x00,0x00,0xBE,0x8C, ++0x00,0x00,0x62,0x8C, ++0xFF,0x03,0x05,0x3C, ++0x02,0x80,0x03,0x3C, ++0xDC,0xED,0x63,0x24, ++0x24,0x10,0x45,0x00, ++0x00,0x00,0x64,0x8C, ++0x02,0x14,0x02,0x00, ++0x24,0x18,0xD2,0x03, ++0x25,0xF0,0x62,0x00, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0xC0,0x03, ++0x25,0xB0,0x02,0x3C, ++0xAC,0x0E,0x42,0x34, ++0x00,0x00,0x45,0x8C, ++0x3F,0x00,0x03,0x3C, ++0x24,0x10,0xD3,0x03, ++0x24,0x28,0xA3,0x00, ++0x82,0x29,0x05,0x00, ++0x25,0x28,0x45,0x00, ++0x02,0x80,0x02,0x3C, ++0xDC,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0x02,0x5C,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x25,0xB0,0x05,0x3C, ++0xB4,0x0E,0xE3,0x36, ++0x88,0x0C,0xA5,0x34, ++0x00,0x00,0xA4,0x8C, ++0x00,0x00,0x62,0x8C, ++0xFF,0x03,0x03,0x3C, ++0xFF,0x03,0x95,0x30, ++0x24,0x10,0x43,0x00, ++0x02,0x14,0x02,0x00, ++0x18,0x00,0x55,0x00, ++0x0C,0x00,0x06,0x8E, ++0x00,0x00,0xBE,0x8C, ++0x02,0x80,0x02,0x3C, ++0x24,0x30,0xD2,0x00, ++0xE0,0xED,0x42,0x24, ++0x00,0x00,0x44,0x8C, ++0x24,0x10,0xD2,0x03, ++0x12,0x18,0x00,0x00, ++0x02,0x1A,0x03,0x00, ++0xFF,0x03,0x63,0x30, ++0x25,0x30,0xC3,0x00, ++0xFF,0x03,0xC5,0x30, ++0x25,0x28,0x45,0x00, ++0x02,0x5C,0x00,0x0C, ++0x0C,0x00,0x06,0xAE, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0xBC,0x0E,0xE2,0x36, ++0x00,0x00,0x43,0x8C, ++0xFF,0x03,0x05,0x3C, ++0x0C,0x00,0x06,0x8E, ++0x24,0x18,0x65,0x00, ++0x02,0xB4,0x03,0x00, ++0x18,0x00,0xD5,0x02, ++0x25,0xB0,0x04,0x3C, ++0x88,0x0C,0x84,0x34, ++0xF0,0xFF,0x03,0x3C, ++0x00,0x00,0x9E,0x8C, ++0xFF,0x03,0x63,0x34, ++0x24,0x30,0xC3,0x00, ++0xC0,0xFF,0x04,0x3C, ++0x02,0x80,0x05,0x3C, ++0xFF,0xFF,0x84,0x34, ++0xE0,0xED,0xA5,0x24, ++0x24,0xF0,0xC4,0x03, ++0x00,0x00,0xA4,0x8C, ++0x44,0x00,0xBE,0xAF, ++0x12,0x10,0x00,0x00, ++0x02,0x12,0x02,0x00, ++0xFF,0x03,0x42,0x30, ++0x80,0x12,0x02,0x00, ++0x25,0x30,0xC2,0x00, ++0x82,0x2A,0x06,0x00, ++0x3F,0x00,0xA5,0x30, ++0x00,0x2C,0x05,0x00, ++0x0C,0x00,0x06,0xAE, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0xC5,0x03, ++0x9C,0x0C,0xE4,0x36, ++0x00,0x00,0x9E,0x8C, ++0x82,0x29,0x16,0x00, ++0x00,0x2F,0x05,0x00, ++0x24,0x88,0xD1,0x03, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0x25,0x02, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x25,0xB0,0x02,0x3C, ++0xC4,0x0E,0xE3,0x36, ++0x1C,0x0C,0x42,0x34, ++0x00,0x00,0x5E,0x8C, ++0x00,0x00,0x62,0x8C, ++0xFF,0x03,0x05,0x3C, ++0x02,0x80,0x03,0x3C, ++0xE4,0xED,0x63,0x24, ++0x24,0x10,0x45,0x00, ++0x00,0x00,0x64,0x8C, ++0x02,0x14,0x02,0x00, ++0x24,0x90,0xD2,0x03, ++0x25,0xF0,0x42,0x02, ++0x02,0x5C,0x00,0x0C, ++0x21,0x28,0xC0,0x03, ++0xCC,0x0E,0xE2,0x36, ++0x00,0x00,0x45,0x8C, ++0x02,0x80,0x02,0x3C, ++0xE4,0xED,0x42,0x24, ++0x3F,0x00,0x03,0x3C, ++0x00,0x00,0x44,0x8C, ++0x24,0x28,0xA3,0x00, ++0x24,0x98,0xD3,0x03, ++0x82,0x29,0x05,0x00, ++0x02,0x5C,0x00,0x0C, ++0x25,0x28,0x65,0x02, ++0x54,0x22,0x00,0x0C, ++0x05,0x00,0x04,0x24, ++0x5C,0x6D,0x00,0x08, ++0x00,0x00,0x00,0x00, ++0xE0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x42,0x00,0x03,0x24, ++0x10,0x00,0xA3,0xA3, ++0xF1,0x3A,0x40,0xA0, ++0x4E,0x00,0x03,0x24, ++0x43,0x00,0x02,0x24, ++0x02,0x80,0x07,0x3C, ++0x9C,0xF3,0xE7,0x24, ++0x11,0x00,0xA2,0xA3, ++0x12,0x00,0xA3,0xA3, ++0xD0,0x07,0x02,0x24, ++0x01,0x00,0x03,0x24, ++0x01,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0xDC,0xAC,0xC6,0x24, ++0x0C,0x00,0xE2,0xAC, ++0x14,0x00,0xE3,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x48,0xFD,0xBD,0x27, ++0xE8,0xED,0x46,0x24, ++0x02,0x80,0x03,0x3C, ++0xB0,0x02,0xB2,0xAF, ++0xAC,0x02,0xB1,0xAF, ++0xA8,0x02,0xB0,0xAF, ++0x33,0x1F,0x60,0xA0, ++0x21,0x38,0xA0,0x03, ++0x90,0x00,0xC8,0x24, ++0x00,0x00,0xC2,0x8C, ++0x04,0x00,0xC3,0x8C, ++0x08,0x00,0xC4,0x8C, ++0x0C,0x00,0xC5,0x8C, ++0x10,0x00,0xC6,0x24, ++0x00,0x00,0xE2,0xAC, ++0x04,0x00,0xE3,0xAC, ++0x08,0x00,0xE4,0xAC, ++0x0C,0x00,0xE5,0xAC, ++0xF6,0xFF,0xC8,0x14, ++0x10,0x00,0xE7,0x24, ++0x00,0x00,0xC3,0x8C, ++0x02,0x80,0x02,0x3C, ++0x7C,0xEE,0x58,0x24, ++0x00,0x00,0xE3,0xAC, ++0x98,0x00,0xB9,0x27, ++0x00,0x01,0x12,0x27, ++0x01,0x00,0x02,0x93, ++0x05,0x00,0x03,0x93, ++0x09,0x00,0x04,0x93, ++0x0D,0x00,0x05,0x93, ++0x00,0x00,0x11,0x93, ++0x02,0x00,0x0D,0x93, ++0x04,0x00,0x10,0x93, ++0x06,0x00,0x0C,0x93, ++0x08,0x00,0x0F,0x93, ++0x0A,0x00,0x07,0x93, ++0x0C,0x00,0x0E,0x93, ++0x0E,0x00,0x06,0x93, ++0x03,0x00,0x08,0x93, ++0x07,0x00,0x09,0x93, ++0x0B,0x00,0x0A,0x93, ++0x0F,0x00,0x0B,0x93, ++0x00,0x12,0x02,0x00, ++0x00,0x1A,0x03,0x00, ++0x00,0x22,0x04,0x00, ++0x00,0x2A,0x05,0x00, ++0x25,0x10,0x51,0x00, ++0x25,0x18,0x70,0x00, ++0x25,0x20,0x8F,0x00, ++0x25,0x28,0xAE,0x00, ++0x00,0x6C,0x0D,0x00, ++0x00,0x64,0x0C,0x00, ++0x00,0x3C,0x07,0x00, ++0x00,0x34,0x06,0x00, ++0x25,0x68,0xA2,0x01, ++0x25,0x60,0x83,0x01, ++0x25,0x38,0xE4,0x00, ++0x25,0x30,0xC5,0x00, ++0x00,0x46,0x08,0x00, ++0x00,0x4E,0x09,0x00, ++0x00,0x56,0x0A,0x00, ++0x00,0x5E,0x0B,0x00, ++0x25,0x40,0x0D,0x01, ++0x25,0x48,0x2C,0x01, ++0x25,0x50,0x47,0x01, ++0x25,0x58,0x66,0x01, ++0x10,0x00,0x18,0x27, ++0x00,0x00,0x28,0xAF, ++0x04,0x00,0x29,0xAF, ++0x08,0x00,0x2A,0xAF, ++0x0C,0x00,0x2B,0xAF, ++0xD2,0xFF,0x12,0x17, ++0x10,0x00,0x39,0x27, ++0x01,0x00,0x02,0x93, ++0x05,0x00,0x03,0x93, ++0x00,0x00,0x09,0x93, ++0x02,0x00,0x04,0x93, ++0x04,0x00,0x08,0x93, ++0x06,0x00,0x05,0x93, ++0x07,0x00,0x06,0x93, ++0x03,0x00,0x07,0x93, ++0x00,0x12,0x02,0x00, ++0x00,0x1A,0x03,0x00, ++0x25,0x10,0x49,0x00, ++0x25,0x18,0x68,0x00, ++0x00,0x24,0x04,0x00, ++0x00,0x2C,0x05,0x00, ++0x25,0x20,0x82,0x00, ++0x25,0x28,0xA3,0x00, ++0x00,0x3E,0x07,0x00, ++0x00,0x36,0x06,0x00, ++0x02,0x80,0x02,0x3C, ++0x25,0x38,0xE4,0x00, ++0x25,0x30,0xC5,0x00, ++0x84,0xEF,0x58,0x24, ++0x04,0x00,0x26,0xAF, ++0x00,0x00,0x27,0xAF, ++0x00,0x01,0x12,0x27, ++0xA0,0x01,0xB9,0x27, ++0x01,0x00,0x02,0x93, ++0x05,0x00,0x03,0x93, ++0x09,0x00,0x04,0x93, ++0x0D,0x00,0x05,0x93, ++0x00,0x00,0x11,0x93, ++0x02,0x00,0x0D,0x93, ++0x04,0x00,0x10,0x93, ++0x06,0x00,0x0C,0x93, ++0x08,0x00,0x0F,0x93, ++0x0A,0x00,0x07,0x93, ++0x0C,0x00,0x0E,0x93, ++0x0E,0x00,0x06,0x93, ++0x03,0x00,0x08,0x93, ++0x07,0x00,0x09,0x93, ++0x0B,0x00,0x0A,0x93, ++0x0F,0x00,0x0B,0x93, ++0x00,0x12,0x02,0x00, ++0x00,0x1A,0x03,0x00, ++0x00,0x22,0x04,0x00, ++0x00,0x2A,0x05,0x00, ++0x25,0x10,0x51,0x00, ++0x25,0x18,0x70,0x00, ++0x25,0x20,0x8F,0x00, ++0x25,0x28,0xAE,0x00, ++0x00,0x6C,0x0D,0x00, ++0x00,0x64,0x0C,0x00, ++0x00,0x3C,0x07,0x00, ++0x00,0x34,0x06,0x00, ++0x25,0x68,0xA2,0x01, ++0x25,0x60,0x83,0x01, ++0x25,0x38,0xE4,0x00, ++0x25,0x30,0xC5,0x00, ++0x00,0x46,0x08,0x00, ++0x00,0x4E,0x09,0x00, ++0x00,0x56,0x0A,0x00, ++0x00,0x5E,0x0B,0x00, ++0x25,0x40,0x0D,0x01, ++0x25,0x48,0x2C,0x01, ++0x25,0x50,0x47,0x01, ++0x25,0x58,0x66,0x01, ++0x10,0x00,0x18,0x27, ++0x00,0x00,0x28,0xAF, ++0x04,0x00,0x29,0xAF, ++0x08,0x00,0x2A,0xAF, ++0x0C,0x00,0x2B,0xAF, ++0xD2,0xFF,0x12,0x17, ++0x10,0x00,0x39,0x27, ++0x01,0x00,0x02,0x93, ++0x05,0x00,0x03,0x93, ++0x00,0x00,0x09,0x93, ++0x02,0x00,0x04,0x93, ++0x04,0x00,0x08,0x93, ++0x06,0x00,0x05,0x93, ++0x07,0x00,0x06,0x93, ++0x03,0x00,0x07,0x93, ++0x00,0x12,0x02,0x00, ++0x00,0x1A,0x03,0x00, ++0x25,0x10,0x49,0x00, ++0x25,0x18,0x68,0x00, ++0x00,0x24,0x04,0x00, ++0x00,0x2C,0x05,0x00, ++0x25,0x20,0x82,0x00, ++0x25,0x28,0xA3,0x00, ++0x00,0x3E,0x07,0x00, ++0x00,0x36,0x06,0x00, ++0x25,0x30,0xC5,0x00, ++0x25,0x38,0xE4,0x00, ++0x02,0x80,0x02,0x3C, ++0x04,0x00,0x26,0xAF, ++0x00,0x00,0x27,0xAF, ++0x30,0x1F,0x46,0x24, ++0x21,0x50,0x00,0x00, ++0x80,0x20,0x0A,0x00, ++0x21,0x10,0x9D,0x00, ++0x00,0x00,0x45,0x8C, ++0x01,0x00,0x43,0x25, ++0xFF,0x00,0x6A,0x30, ++0x21,0x20,0x86,0x00, ++0x25,0x00,0x42,0x2D, ++0xF8,0xFF,0x40,0x14, ++0x18,0x00,0x85,0xAC, ++0x02,0x80,0x02,0x3C, ++0x30,0x1F,0x4B,0x24, ++0x21,0x50,0x00,0x00, ++0xC0,0x10,0x0A,0x00, ++0x21,0x48,0x5D,0x00, ++0x21,0x38,0x00,0x00, ++0x21,0x40,0x4B,0x00, ++0x21,0x10,0x27,0x01, ++0xA0,0x01,0x46,0x90, ++0x98,0x00,0x45,0x90, ++0x01,0x00,0xE4,0x24, ++0x21,0x18,0x07,0x01, ++0xFF,0x00,0x87,0x30, ++0x08,0x00,0xE2,0x2C, ++0xB4,0x01,0x66,0xA0, ++0xF7,0xFF,0x40,0x14, ++0xAC,0x00,0x65,0xA0, ++0x01,0x00,0x42,0x25, ++0xFF,0x00,0x4A,0x30, ++0x21,0x00,0x43,0x2D, ++0xEF,0xFF,0x60,0x14, ++0xC0,0x10,0x0A,0x00, ++0x08,0x00,0x64,0x8D, ++0xFF,0x7F,0x07,0x3C, ++0xFF,0xFF,0xE7,0x34, ++0xC0,0xFF,0x02,0x24, ++0x24,0x20,0x87,0x00, ++0x24,0x20,0x82,0x00, ++0x0C,0x00,0x84,0x34, ++0xFF,0xC0,0x02,0x24, ++0x24,0x20,0x82,0x00, ++0xC0,0xFF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x00,0x18,0x84,0x34, ++0xBF,0xFF,0x03,0x3C, ++0x24,0x20,0x82,0x00, ++0xFF,0xFF,0x63,0x34, ++0x7F,0xFF,0x02,0x3C, ++0x24,0x20,0x83,0x00, ++0xFF,0xFF,0x42,0x34, ++0x24,0x20,0x82,0x00, ++0x0C,0x00,0x65,0x8D, ++0x7F,0xFF,0x03,0x24, ++0x40,0x40,0x84,0x34, ++0xFF,0xFF,0x02,0x3C, ++0x24,0x20,0x83,0x00, ++0xFF,0x7F,0x42,0x34, ++0xFF,0xBF,0x03,0x3C, ++0x10,0x00,0x66,0x8D, ++0x24,0x20,0x82,0x00, ++0xFF,0xFF,0x63,0x34, ++0xFF,0x9F,0x02,0x3C, ++0x24,0x28,0xA3,0x00, ++0xFF,0xFF,0x42,0x34, ++0xFF,0x3F,0x03,0x3C, ++0x24,0x20,0x82,0x00, ++0xFF,0xFF,0x63,0x34, ++0x12,0x00,0x02,0x24, ++0xB0,0x02,0xB2,0x8F, ++0xAC,0x02,0xB1,0x8F, ++0xA8,0x02,0xB0,0x8F, ++0x24,0x30,0xC3,0x00, ++0xC7,0x02,0x62,0xA1, ++0x1F,0x00,0x03,0x24, ++0x01,0x00,0x02,0x24, ++0x24,0x28,0xA7,0x00, ++0xBE,0x02,0x63,0xA1, ++0xC0,0x02,0x62,0xA1, ++0xFF,0x00,0x03,0x24, ++0xFF,0xFF,0x02,0x24, ++0xB8,0x02,0xBD,0x27, ++0x08,0x00,0x64,0xAD, ++0x10,0x00,0x66,0xAD, ++0x0C,0x00,0x65,0xAD, ++0xC2,0x02,0x62,0xA1, ++0xC4,0x02,0x63,0xA5, ++0xBF,0x02,0x60,0xA1, ++0x08,0x00,0xE0,0x03, ++0xC6,0x02,0x60,0xA1, ++0x02,0x80,0x0B,0x3C, ++0x30,0x1F,0x67,0x25, ++0xE0,0xFF,0xBD,0x27, ++0xE6,0x02,0xE0,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xE4,0x02,0xE8,0x8C, ++0xFF,0xCF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x30,0x1F,0x69,0x8D, ++0x24,0x40,0x02,0x01, ++0xFF,0xBF,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0xF0,0xFF,0x03,0x24, ++0x24,0x40,0x02,0x01, ++0xFF,0x7F,0x02,0x3C, ++0x24,0x48,0x23,0x01, ++0xFF,0xFF,0x42,0x34, ++0xFF,0xF0,0x03,0x24, ++0x24,0x48,0x23,0x01, ++0x24,0x40,0x02,0x01, ++0x20,0x00,0x03,0x24, ++0x0A,0x00,0x02,0x24, ++0x30,0x1F,0x69,0xAD, ++0xD2,0x02,0xE2,0xA0, ++0xD7,0x02,0xE3,0xA0, ++0x20,0x00,0x02,0x24, ++0x00,0x01,0x03,0x24, ++0xC8,0x02,0xE2,0xA4, ++0xCA,0x02,0xE3,0xA4, ++0x00,0x02,0x02,0x24, ++0x49,0x00,0x03,0x24, ++0x02,0x80,0x0A,0x3C, ++0xE4,0x02,0xE8,0xAC, ++0x80,0xF3,0x4A,0x25, ++0xFF,0xFF,0x0D,0x34, ++0x3E,0x00,0x0E,0x24, ++0x1C,0x00,0x0F,0x24, ++0x01,0x00,0x0C,0x24, ++0x11,0x00,0xA3,0xA3, ++0xCC,0x02,0xE2,0xA4, ++0xD0,0x07,0x03,0x24, ++0x44,0x00,0x02,0x24, ++0x01,0x80,0x06,0x3C, ++0x10,0x00,0xA2,0xA3, ++0x10,0x00,0xA5,0x27, ++0x47,0x00,0x02,0x24, ++0x21,0x20,0x40,0x01, ++0x94,0xAD,0xC6,0x24, ++0x04,0x00,0xED,0xAC, ++0xD0,0x02,0xEE,0xA0, ++0xD1,0x02,0xEF,0xA0, ++0x02,0x00,0xEC,0xA0, ++0x0C,0x00,0x43,0xAD, ++0x14,0x00,0x4C,0xA1, ++0x80,0x36,0xED,0xAC, ++0xCE,0x02,0xEE,0xA0, ++0xCF,0x02,0xEF,0xA0, ++0xD6,0x02,0xE0,0xA0, ++0xD4,0x02,0xE0,0xA0, ++0x12,0x00,0xA2,0xA3, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x50,0x00,0x03,0x24, ++0x10,0x00,0xA3,0xA3, ++0x16,0x3D,0x40,0xA0, ++0x41,0x00,0x03,0x24, ++0x52,0x00,0x02,0x24, ++0x02,0x80,0x07,0x3C, ++0x0C,0xF4,0xE7,0x24, ++0x11,0x00,0xA2,0xA3, ++0x12,0x00,0xA3,0xA3, ++0xD0,0x07,0x02,0x24, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0x2C,0x80,0xC6,0x24, ++0x0C,0x00,0xE2,0xAC, ++0x14,0x00,0xE3,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0x02,0x80,0x09,0x3C, ++0x30,0x1F,0x23,0x8D, ++0xFF,0xFF,0x02,0x24, ++0xFF,0x00,0x4B,0x30, ++0x0F,0xFF,0x02,0x24, ++0x24,0x18,0x62,0x00, ++0xFF,0xFF,0x02,0x3C, ++0xFF,0x0F,0x42,0x34, ++0x24,0x18,0x62,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x30,0x1F,0x23,0xAD, ++0x47,0x00,0x02,0x24, ++0x3B,0x00,0x03,0x24, ++0x02,0x80,0x08,0x3C, ++0x28,0xF4,0x08,0x25, ++0x18,0x00,0xB0,0xAF, ++0x10,0x00,0xA2,0xA3, ++0x30,0x1F,0x30,0x25, ++0x11,0x00,0xA3,0xA3, ++0xD0,0x07,0x02,0x24, ++0x01,0x00,0x03,0x24, ++0x01,0x00,0x07,0x3C, ++0x01,0x80,0x06,0x3C, ++0x04,0x03,0x0B,0xAE, ++0x1C,0x00,0xB1,0xAF, ++0x56,0x30,0xEA,0x34, ++0x43,0x00,0x11,0x24, ++0xF4,0x98,0xE7,0x34, ++0x10,0x00,0xA5,0x27, ++0x0C,0x00,0x02,0xAD, ++0x14,0x00,0x03,0xA1, ++0x21,0x20,0x00,0x01, ++0x1C,0xB9,0xC6,0x24, ++0x20,0x00,0xBF,0xAF, ++0x12,0x00,0xB1,0xA3, ++0x0C,0x03,0x07,0xAE, ++0x10,0x03,0x0A,0xAE, ++0x13,0x00,0xA0,0xA3, ++0x08,0x03,0x00,0xAE, ++0x14,0x03,0x00,0xAE, ++0xA2,0x23,0x00,0x0C, ++0x18,0x03,0x00,0xAE, ++0x1E,0x00,0x02,0x24, ++0x21,0x03,0x02,0xA2, ++0x4A,0x00,0x03,0x24, ++0x45,0x00,0x02,0x24, ++0x1C,0x03,0x03,0xA2, ++0x1D,0x03,0x02,0xA2, ++0x23,0x00,0x03,0x24, ++0x3E,0x00,0x02,0x24, ++0x1E,0x03,0x11,0xA2, ++0x1F,0x03,0x02,0xA2, ++0x20,0x03,0x03,0xA2, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x3B,0x00,0x02,0x24, ++0x43,0x00,0x03,0x24, ++0x10,0x00,0xA2,0xA3, ++0x11,0x00,0xA3,0xA3, ++0x36,0x00,0x02,0x24, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x07,0x3C, ++0x44,0xF4,0xE7,0x24, ++0x12,0x00,0xA2,0xA3, ++0x03,0x22,0x60,0xA0, ++0xD0,0x07,0x02,0x24, ++0x01,0x00,0x03,0x24, ++0x01,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0x50,0xBD,0xC6,0x24, ++0x0C,0x00,0xE2,0xAC, ++0x14,0x00,0xE3,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xE0,0xFF,0xBD,0x27, ++0x02,0x80,0x02,0x3C, ++0x52,0x00,0x03,0x24, ++0x10,0x00,0xA3,0xA3, ++0xB8,0x55,0x40,0xA4, ++0x54,0x00,0x03,0x24, ++0x53,0x00,0x02,0x24, ++0x02,0x80,0x07,0x3C, ++0x7C,0xF4,0xE7,0x24, ++0x11,0x00,0xA2,0xA3, ++0x12,0x00,0xA3,0xA3, ++0xF4,0x01,0x02,0x24, ++0x01,0x00,0x03,0x24, ++0x02,0x80,0x06,0x3C, ++0x10,0x00,0xA5,0x27, ++0x21,0x20,0xE0,0x00, ++0x70,0x81,0xC6,0x24, ++0x0C,0x00,0xE2,0xAC, ++0x14,0x00,0xE3,0xA0, ++0x18,0x00,0xBF,0xAF, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x18,0x00,0xBF,0x8F, ++0x00,0x00,0x00,0x00, ++0x08,0x00,0xE0,0x03, ++0x20,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x02,0x80,0x03,0x3C, ++0x20,0x00,0xBF,0xAF, ++0x1C,0x00,0xB1,0xAF, ++0x18,0x00,0xB0,0xAF, ++0x58,0xE9,0x62,0x24, ++0x58,0xE9,0x67,0x94, ++0x02,0x00,0x48,0x90, ++0x02,0x80,0x02,0x3C, ++0xD8,0x5E,0x42,0x24, ++0x02,0x00,0x11,0x24, ++0x01,0x80,0x06,0x3C, ++0x21,0x20,0x40,0x00, ++0x14,0x00,0x51,0xA0, ++0x10,0x00,0xA5,0x27, ++0x6C,0xCE,0xC6,0x24, ++0x02,0x80,0x10,0x3C, ++0x10,0x00,0xA7,0xA7, ++0x28,0x5F,0x10,0x26, ++0x12,0x00,0xA8,0xA3, ++0xA2,0x23,0x00,0x0C, ++0x13,0x00,0xA0,0xA3, ++0x02,0x80,0x06,0x3C, ++0x21,0x20,0x00,0x02, ++0x10,0x00,0xA5,0x27, ++0x14,0x00,0x11,0xA2, ++0xA2,0x23,0x00,0x0C, ++0x7C,0x82,0xC6,0x24, ++0x02,0x80,0x03,0x3C, ++0xDE,0x5D,0x62,0x90, ++0x02,0x00,0x07,0x24, ++0x0C,0x00,0x04,0x24, ++0x02,0x00,0x42,0x30, ++0x01,0x00,0x42,0x2C, ++0x23,0x38,0xE2,0x00, ++0xE8,0x03,0x02,0x24, ++0x0C,0x00,0x02,0xAE, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF4,0x5E,0x60,0xA0, ++0xF5,0x5E,0x44,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF6,0x5E,0x64,0xA0, ++0x0D,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x13,0x5F,0x60,0xA0, ++0x01,0x00,0x06,0x24, ++0x14,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF8,0x5E,0x66,0xA0, ++0x0F,0x00,0x04,0x24, ++0x15,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0xF7,0x5E,0x66,0xA0, ++0xF9,0x5E,0x44,0xA0, ++0x02,0x80,0x03,0x3C, ++0x08,0x00,0x04,0x24, ++0x02,0x80,0x02,0x3C, ++0xFA,0x5E,0x60,0xA0, ++0x64,0x00,0x05,0x24, ++0x04,0x5F,0x44,0xA4, ++0x02,0x80,0x03,0x3C, ++0x01,0x00,0x02,0x3C, ++0xFC,0x5E,0x65,0xA4, ++0x00,0x90,0x42,0x34, ++0x02,0x80,0x03,0x3C, ++0x00,0x5F,0x62,0xAC, ++0x02,0x80,0x04,0x3C, ++0x02,0x80,0x02,0x3C, ++0x08,0x5F,0x80,0xAC, ++0x02,0x80,0x03,0x3C, ++0x0C,0x5F,0x40,0xA0, ++0x02,0x80,0x02,0x3C, ++0x0E,0x5F,0x60,0xA0, ++0x16,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x44,0x5F,0x67,0xA0, ++0x20,0x00,0xBF,0x8F, ++0x0F,0x5F,0x40,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x1C,0x00,0xB1,0x8F, ++0x18,0x00,0xB0,0x8F, ++0x10,0x5F,0x66,0xA0, ++0x11,0x5F,0x46,0xA0, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x12,0x5F,0x60,0xA0, ++0x21,0x20,0x00,0x00, ++0x18,0x5F,0x40,0xAC, ++0x02,0x80,0x03,0x3C, ++0x02,0x80,0x02,0x3C, ++0x21,0x28,0x00,0x00, ++0x28,0x00,0xBD,0x27, ++0x1C,0x5F,0x60,0xAC, ++0x20,0x5F,0x44,0xAC, ++0x24,0x5F,0x45,0xAC, ++0x08,0x00,0xE0,0x03, ++0x00,0x00,0x00,0x00, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x21,0x80,0x80,0x00, ++0x21,0x98,0xA0,0x00, ++0x21,0x88,0xC0,0x00, ++0x21,0x90,0x00,0x00, ++0x00,0x00,0x04,0x82, ++0x7C,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x40,0x14, ++0x01,0x00,0x10,0x26, ++0xFF,0xFF,0x10,0x26, ++0x00,0x00,0x04,0x92, ++0x2B,0x00,0x02,0x24, ++0x00,0x1E,0x04,0x00, ++0x03,0x1E,0x03,0x00, ++0x41,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0x02,0x24, ++0x30,0x00,0x22,0x12, ++0x00,0x1E,0x04,0x00, ++0x07,0x00,0x20,0x16, ++0x21,0x18,0x80,0x00, ++0x00,0x1E,0x04,0x00, ++0x03,0x1E,0x03,0x00, ++0x30,0x00,0x02,0x24, ++0x3B,0x00,0x62,0x10, ++0x0A,0x00,0x11,0x24, ++0x21,0x18,0x80,0x00, ++0x00,0x16,0x03,0x00, ++0x03,0x16,0x02,0x00, ++0x1A,0x00,0x40,0x10, ++0xFF,0x00,0x64,0x30, ++0xA9,0xFF,0x82,0x24, ++0x61,0x00,0x83,0x2C, ++0xFF,0x00,0x45,0x30, ++0x09,0x00,0x60,0x10, ++0x41,0x00,0x86,0x2C, ++0xC9,0xFF,0x82,0x24, ++0xFF,0x00,0x45,0x30, ++0x05,0x00,0xC0,0x10, ++0x3A,0x00,0x87,0x2C, ++0xD0,0xFF,0x82,0x24, ++0x02,0x00,0xE0,0x10, ++0xFF,0x00,0x05,0x24, ++0xFF,0x00,0x45,0x30, ++0x2A,0x10,0xB1,0x00, ++0x0A,0x00,0x40,0x10, ++0x18,0x00,0x51,0x02, ++0x01,0x00,0x10,0x26, ++0x12,0x10,0x00,0x00, ++0x2B,0x18,0x52,0x00, ++0x23,0x00,0x60,0x14, ++0x21,0x90,0xA2,0x00, ++0x00,0x00,0x03,0x92, ++0x00,0x00,0x00,0x00, ++0xE8,0xFF,0x60,0x14, ++0xFF,0x00,0x64,0x30, ++0x02,0x00,0x60,0x12, ++0x21,0x10,0x40,0x02, ++0x00,0x00,0x70,0xAE, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x03,0x1E,0x03,0x00, ++0x30,0x00,0x02,0x24, ++0xCE,0xFF,0x62,0x14, ++0x00,0x00,0x00,0x00, ++0x01,0x00,0x03,0x82, ++0x78,0x00,0x02,0x24, ++0x03,0x00,0x62,0x10, ++0x58,0x00,0x02,0x24, ++0xD0,0xFF,0x62,0x14, ++0x21,0x18,0x80,0x00, ++0x02,0x00,0x10,0x26, ++0x00,0x00,0x04,0x92, ++0xC0,0x70,0x00,0x08, ++0x10,0x00,0x11,0x24, ++0x01,0x00,0x10,0x26, ++0x00,0x00,0x04,0x92, ++0xB7,0x70,0x00,0x08, ++0x10,0x00,0x02,0x24, ++0xEC,0x70,0x00,0x08, ++0x08,0x00,0x11,0x24, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xFF,0xFF,0x02,0x24, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x21,0x48,0x80,0x00, ++0x31,0x00,0xC0,0x14, ++0x21,0x50,0x00,0x00, ++0x00,0x00,0x87,0x90, ++0x30,0x00,0x02,0x24, ++0x00,0x1E,0x07,0x00, ++0x03,0x1E,0x03,0x00, ++0x2E,0x00,0x62,0x10, ++0x0A,0x00,0x06,0x24, ++0x02,0x80,0x02,0x3C, ++0x40,0xF2,0x4B,0x24, ++0xFF,0x00,0xE8,0x30, ++0x21,0x10,0x0B,0x01, ++0x00,0x00,0x44,0x90, ++0x00,0x1E,0x07,0x00, ++0x03,0x1E,0x03,0x00, ++0x44,0x00,0x82,0x30, ++0x02,0x00,0x87,0x30, ++0xD0,0xFF,0x63,0x24, ++0x1A,0x00,0x40,0x10, ++0x04,0x00,0x84,0x30, ++0x07,0x00,0x80,0x14, ++0x2B,0x10,0x66,0x00, ++0x21,0x10,0x00,0x01, ++0x02,0x00,0xE0,0x10, ++0xE0,0xFF,0x03,0x25, ++0xFF,0x00,0x62,0x30, ++0xC9,0xFF,0x43,0x24, ++0x2B,0x10,0x66,0x00, ++0x10,0x00,0x40,0x10, ++0x18,0x00,0x46,0x01, ++0x01,0x00,0x29,0x25, ++0x00,0x00,0x27,0x91, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0xE8,0x30, ++0x12,0x10,0x00,0x00, ++0x21,0x50,0x43,0x00, ++0x21,0x10,0x0B,0x01, ++0x00,0x00,0x44,0x90, ++0x00,0x1E,0x07,0x00, ++0x03,0x1E,0x03,0x00, ++0x44,0x00,0x82,0x30, ++0x02,0x00,0x87,0x30, ++0xD0,0xFF,0x63,0x24, ++0xE8,0xFF,0x40,0x14, ++0x04,0x00,0x84,0x30, ++0x02,0x00,0xA0,0x10, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0xA9,0xAC, ++0x08,0x00,0xE0,0x03, ++0x21,0x10,0x40,0x01, ++0x00,0x00,0x87,0x90, ++0x0E,0x71,0x00,0x08, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x89,0x24, ++0x00,0x00,0x27,0x91, ++0x78,0x00,0x02,0x24, ++0x00,0x1E,0x07,0x00, ++0x03,0x1E,0x03,0x00, ++0xCD,0xFF,0x62,0x14, ++0x08,0x00,0x06,0x24, ++0x01,0x00,0x22,0x91, ++0x02,0x80,0x03,0x3C, ++0x40,0xF2,0x63,0x24, ++0x21,0x10,0x43,0x00, ++0x00,0x00,0x44,0x90, ++0x00,0x00,0x00,0x00, ++0x44,0x00,0x84,0x30, ++0xC5,0xFF,0x80,0x10, ++0x02,0x80,0x02,0x3C, ++0x01,0x00,0x29,0x25, ++0x00,0x00,0x27,0x91, ++0x0E,0x71,0x00,0x08, ++0x10,0x00,0x06,0x24, ++0xE8,0xFF,0xBD,0x27, ++0x10,0x00,0xBF,0xAF, ++0x00,0x00,0x83,0x80, ++0x2D,0x00,0x02,0x24, ++0x04,0x00,0x62,0x10, ++0x00,0x00,0x00,0x00, ++0x10,0x00,0xBF,0x8F, ++0x04,0x71,0x00,0x08, ++0x18,0x00,0xBD,0x27, ++0x04,0x71,0x00,0x0C, ++0x01,0x00,0x84,0x24, ++0x10,0x00,0xBF,0x8F, ++0x23,0x10,0x02,0x00, ++0x08,0x00,0xE0,0x03, ++0x18,0x00,0xBD,0x27, ++0xD8,0xFF,0xBD,0x27, ++0x1C,0x00,0xB3,0xAF, ++0x18,0x00,0xB2,0xAF, ++0x14,0x00,0xB1,0xAF, ++0x10,0x00,0xB0,0xAF, ++0x20,0x00,0xBF,0xAF, ++0x21,0x80,0x80,0x00, ++0x21,0x90,0xA0,0x00, ++0x21,0x98,0xC0,0x00, ++0x21,0x88,0x00,0x00, ++0x00,0x00,0x04,0x82, ++0x7C,0x55,0x00,0x0C, ++0x00,0x00,0x00,0x00, ++0xFC,0xFF,0x40,0x14, ++0x01,0x00,0x10,0x26, ++0xFF,0xFF,0x10,0x26, ++0x00,0x00,0x03,0x82, ++0x2D,0x00,0x02,0x24, ++0x0F,0x00,0x62,0x10, ++0x21,0x20,0x00,0x02, ++0x21,0x28,0x40,0x02, ++0xA0,0x70,0x00,0x0C, ++0x21,0x30,0x60,0x02, ++0x12,0x00,0x40,0x04, ++0x21,0x18,0x40,0x00, ++0x23,0x10,0x02,0x00, ++0x0A,0x10,0x71,0x00, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x01,0x00,0x10,0x26, ++0x21,0x20,0x00,0x02, ++0x21,0x28,0x40,0x02, ++0xA0,0x70,0x00,0x0C, ++0x21,0x30,0x60,0x02, ++0xFF,0xFF,0x11,0x24, ++0xF0,0xFF,0x41,0x04, ++0x21,0x18,0x40,0x00, ++0xF0,0xFF,0x20,0x16, ++0x00,0x80,0x02,0x3C, ++0x20,0x00,0xBF,0x8F, ++0x1C,0x00,0xB3,0x8F, ++0x18,0x00,0xB2,0x8F, ++0x14,0x00,0xB1,0x8F, ++0x10,0x00,0xB0,0x8F, ++0xFF,0x7F,0x02,0x3C, ++0xFF,0xFF,0x42,0x34, ++0x08,0x00,0xE0,0x03, ++0x28,0x00,0xBD,0x27, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x52,0x54,0x4C,0x38, ++0x37,0x31,0x32,0x20, ++0x46,0x57,0x20,0x76, ++0x65,0x72,0x73,0x69, ++0x6F,0x6E,0x20,0x30, ++0x2E,0x30,0x2E,0x31, ++0x23,0x20,0xE4,0xB8, ++0x89,0x20,0x31,0x30, ++0xE6,0x9C,0x88,0x20, ++0x32,0x38,0x20,0x31, ++0x37,0x3A,0x34,0x31, ++0x3A,0x34,0x37,0x20, ++0x43,0x53,0x54,0x20, ++0x32,0x30,0x30,0x39, ++0x0A,0x00,0x00,0x00, ++0x50,0xC6,0x01,0x80, ++0x48,0x43,0x49,0x20, ++0x74,0x79,0x70,0x65, ++0x3A,0x20,0x25,0x78, ++0x28,0x25,0x78,0x29, ++0x0A,0x00,0x00,0x00, ++0x72,0x66,0x5F,0x63, ++0x6F,0x66,0x69,0x67, ++0x3A,0x20,0x25,0x78, ++0x28,0x25,0x78,0x2C, ++0x20,0x25,0x78,0x2C, ++0x20,0x25,0x78,0x29, ++0x0A,0x00,0x00,0x00, ++0x6D,0x70,0x5F,0x6D, ++0x6F,0x64,0x65,0x3A, ++0x20,0x25,0x78,0x28, ++0x25,0x78,0x29,0x2C, ++0x20,0x49,0x51,0x4B, ++0x3A,0x20,0x25,0x78, ++0x0A,0x00,0x00,0x00, ++0x76,0x63,0x73,0x20, ++0x74,0x79,0x70,0x65, ++0x3A,0x20,0x25,0x78, ++0x28,0x25,0x78,0x29, ++0x0A,0x00,0x00,0x00, ++0x33,0x32,0x6B,0x20, ++0x63,0x61,0x6C,0x69, ++0x62,0x72,0x61,0x3A, ++0x20,0x25,0x64,0x2C, ++0x20,0x33,0x32,0x4B, ++0x20,0x54,0x53,0x46, ++0x3A,0x20,0x25,0x78, ++0x00,0x00,0x00,0x00, ++0x74,0x61,0x72,0x67, ++0x65,0x74,0x20,0x74, ++0x68,0x65,0x72,0x6D, ++0x61,0x6C,0x3A,0x20, ++0x25,0x78,0x0A,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x00,0x7F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x01,0x7F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x02,0x7E, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x03,0x7D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x04,0x7C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x05,0x7B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x06,0x7A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x07,0x79, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x08,0x78, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x09,0x77, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0A,0x76, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0B,0x75, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0C,0x74, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0D,0x73, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0E,0x72, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x0F,0x71, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x10,0x70, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x11,0x6F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x12,0x6F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x13,0x6E, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x14,0x6D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x15,0x6D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x16,0x6C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x17,0x6B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x18,0x6A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x19,0x6A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1A,0x69, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1B,0x68, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1C,0x67, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1D,0x66, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1E,0x65, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x1F,0x64, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x20,0x63, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x21,0x4C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x22,0x4B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x23,0x4A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x24,0x49, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x25,0x48, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x26,0x47, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x27,0x46, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x28,0x45, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x29,0x44, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2A,0x2C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2B,0x2B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2C,0x2A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2D,0x29, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2E,0x28, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x2F,0x27, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x30,0x26, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x31,0x25, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x32,0x24, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x33,0x23, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x34,0x22, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x35,0x09, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x36,0x08, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x37,0x07, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x38,0x06, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x39,0x05, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3A,0x04, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3B,0x03, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3C,0x02, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3D,0x01, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3E,0x00, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x3F,0x00, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x40,0x7F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x41,0x7F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x42,0x7E, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x43,0x7D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x44,0x7C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x45,0x7B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x46,0x7A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x47,0x79, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x48,0x78, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x49,0x77, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4A,0x76, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4B,0x75, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4C,0x74, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4D,0x73, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4E,0x72, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x4F,0x71, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x50,0x70, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x51,0x6F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x52,0x6F, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x53,0x6E, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x54,0x6D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x55,0x6D, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x56,0x6C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x57,0x6B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x58,0x6A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x59,0x6A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5A,0x69, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5B,0x68, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5C,0x67, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5D,0x66, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5E,0x65, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x5F,0x64, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x60,0x63, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x61,0x4C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x62,0x4B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x63,0x4A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x64,0x49, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x65,0x48, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x66,0x47, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x67,0x46, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x68,0x45, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x69,0x44, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6A,0x2C, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6B,0x2B, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6C,0x2A, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6D,0x29, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6E,0x28, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x6F,0x27, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x70,0x26, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x71,0x25, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x72,0x24, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x73,0x23, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x74,0x22, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x75,0x09, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x76,0x08, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x77,0x07, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x78,0x06, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x79,0x05, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7A,0x04, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7B,0x03, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7C,0x02, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7D,0x01, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7E,0x00, ++0x78,0x0C,0x00,0x00, ++0x01,0x00,0x7F,0x00, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x00,0x30, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x01,0x30, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x02,0x30, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x03,0x30, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x04,0x30, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x05,0x34, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x06,0x38, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x07,0x3E, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x08,0x3E, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x09,0x44, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0A,0x46, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0B,0x48, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0C,0x48, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0D,0x4E, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0E,0x56, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x0F,0x5A, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x10,0x5E, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x11,0x62, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x12,0x6C, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x13,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x14,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x15,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x16,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x17,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x18,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x19,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1A,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1B,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1C,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1D,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1E,0x72, ++0x78,0x0C,0x00,0x00, ++0x1E,0x00,0x1F,0x72, ++0x00,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x06,0x06,0x06,0x04, ++0x04,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x04,0x02,0x02,0x00, ++0x08,0x0E,0x00,0x00, ++0x00,0xFF,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x0A,0x08,0x08,0x04, ++0x14,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x04,0x02,0x02,0x00, ++0x18,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x0A,0x08,0x08,0x04, ++0x1C,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x04,0x02,0x02,0x00, ++0x00,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x04,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x08,0x0E,0x00,0x00, ++0x00,0xFF,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x14,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x18,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x1C,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x00,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x04,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x08,0x0E,0x00,0x00, ++0x00,0xFF,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x14,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x18,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x1C,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x00,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x04,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x08,0x0E,0x00,0x00, ++0x00,0xFF,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x10,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x14,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x18,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x1C,0x0E,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x00, ++0x04,0x08,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0x24,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x04,0x00,0x30,0x00, ++0x2C,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x04,0x00,0x30,0x00, ++0x70,0x08,0x00,0x00, ++0x00,0x00,0x00,0x04, ++0x01,0x00,0x00,0x00, ++0x64,0x08,0x00,0x00, ++0x00,0x04,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x78,0x08,0x00,0x00, ++0x0F,0x00,0x0F,0x00, ++0x02,0x00,0x02,0x00, ++0x74,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x06,0x00,0x00,0x00, ++0x78,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x06,0x00,0x00,0x00, ++0x7C,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x06,0x00,0x00,0x00, ++0x80,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x06,0x00,0x00,0x00, ++0x0C,0x09,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x33,0x00,0x00,0x00, ++0x04,0x0C,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x33,0x00,0x00,0x00, ++0x04,0x0D,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0xF4,0x01,0x00,0x00, ++0x00,0x00,0xFF,0xFF, ++0xFF,0xFF,0x00,0x00, ++0x34,0x02,0x00,0x00, ++0x00,0x00,0x00,0xF8, ++0x13,0x00,0x00,0x00, ++0x04,0x08,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0x24,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x04,0x00,0x30,0x00, ++0x2C,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x02,0x00,0x30,0x00, ++0x70,0x08,0x00,0x00, ++0x00,0x00,0x00,0x04, ++0x01,0x00,0x00,0x00, ++0x64,0x08,0x00,0x00, ++0x00,0x04,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x78,0x08,0x00,0x00, ++0x0F,0x00,0x0F,0x00, ++0x02,0x00,0x00,0x00, ++0x74,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x78,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x7C,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x80,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x0C,0x09,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x11,0x00,0x00,0x00, ++0x04,0x0C,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x33,0x00,0x00,0x00, ++0x04,0x0D,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0xF4,0x01,0x00,0x00, ++0x00,0x00,0xFF,0xFF, ++0x77,0x77,0x00,0x00, ++0x34,0x02,0x00,0x00, ++0x00,0x00,0x00,0xF8, ++0x0A,0x00,0x00,0x00, ++0x44,0x08,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x01,0x00, ++0x04,0x08,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x24,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x04,0x00,0x30,0x00, ++0x2C,0x08,0x00,0x00, ++0x0F,0x00,0xF0,0x00, ++0x02,0x00,0x10,0x00, ++0x70,0x08,0x00,0x00, ++0x00,0x00,0x00,0x04, ++0x01,0x00,0x00,0x00, ++0x64,0x08,0x00,0x00, ++0x00,0x04,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x78,0x08,0x00,0x00, ++0x0F,0x00,0x0F,0x00, ++0x02,0x00,0x00,0x00, ++0x74,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x78,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x7C,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x80,0x0E,0x00,0x00, ++0x00,0x00,0x00,0x0F, ++0x02,0x00,0x00,0x00, ++0x0C,0x09,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x11,0x00,0x00,0x00, ++0x04,0x0C,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x11,0x00,0x00,0x00, ++0x04,0x0D,0x00,0x00, ++0x0F,0x00,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0xF4,0x01,0x00,0x00, ++0x00,0x00,0xFF,0xFF, ++0x77,0x77,0x00,0x00, ++0x34,0x02,0x00,0x00, ++0x00,0x00,0x00,0xF8, ++0x0A,0x00,0x00,0x00, ++0x1C,0x00,0x00,0x00, ++0x00,0x00,0x00,0x07, ++0x00,0x08,0x00,0x00, ++0x00,0x00,0x04,0x00, ++0x04,0x08,0x00,0x00, ++0x03,0x80,0x00,0x00, ++0x08,0x08,0x00,0x00, ++0x00,0xFC,0x00,0x00, ++0x0C,0x08,0x00,0x00, ++0x0A,0x00,0x00,0x00, ++0x10,0x08,0x00,0x00, ++0x88,0x50,0x00,0x10, ++0x14,0x08,0x00,0x00, ++0x10,0x3D,0x0C,0x02, ++0x18,0x08,0x00,0x00, ++0x85,0x01,0x20,0x00, ++0x1C,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x20,0x08,0x00,0x00, ++0x00,0x00,0x00,0x01, ++0x24,0x08,0x00,0x00, ++0x04,0x00,0x39,0x00, ++0x28,0x08,0x00,0x00, ++0x00,0x00,0x00,0x01, ++0x2C,0x08,0x00,0x00, ++0x04,0x00,0x39,0x00, ++0x30,0x08,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x34,0x08,0x00,0x00, ++0x00,0x02,0x69,0x00, ++0x38,0x08,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x3C,0x08,0x00,0x00, ++0x00,0x02,0x69,0x00, ++0x40,0x08,0x00,0x00, ++0x00,0x00,0x01,0x00, ++0x44,0x08,0x00,0x00, ++0x00,0x00,0x01,0x00, ++0x48,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x4C,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x50,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x54,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x58,0x08,0x00,0x00, ++0x48,0x48,0x48,0x48, ++0x5C,0x08,0x00,0x00, ++0xA9,0x65,0xA9,0x65, ++0x60,0x08,0x00,0x00, ++0x30,0x01,0x7F,0x0F, ++0x64,0x08,0x00,0x00, ++0x30,0x01,0x7F,0x0F, ++0x68,0x08,0x00,0x00, ++0x30,0x01,0x7F,0x0F, ++0x6C,0x08,0x00,0x00, ++0x30,0x01,0x7F,0x0F, ++0x70,0x08,0x00,0x00, ++0x00,0x07,0x00,0x03, ++0x74,0x08,0x00,0x00, ++0x00,0x03,0x00,0x03, ++0x78,0x08,0x00,0x00, ++0x02,0x00,0x02,0x00, ++0x7C,0x08,0x00,0x00, ++0x01,0x02,0x4F,0x00, ++0x80,0x08,0x00,0x00, ++0xC1,0x0A,0x30,0xA8, ++0x84,0x08,0x00,0x00, ++0x58,0x00,0x00,0x00, ++0x88,0x08,0x00,0x00, ++0x08,0x00,0x00,0x00, ++0x8C,0x08,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x90,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x94,0x08,0x00,0x00, ++0xFE,0xFF,0xFF,0xFF, ++0x98,0x08,0x00,0x00, ++0x10,0x20,0x30,0x40, ++0x9C,0x08,0x00,0x00, ++0x50,0x60,0x70,0x00, ++0xB0,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xE0,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xE4,0x08,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x0E,0x00,0x00, ++0x33,0x33,0x33,0x30, ++0x04,0x0E,0x00,0x00, ++0x2F,0x2E,0x2D,0x2A, ++0x08,0x0E,0x00,0x00, ++0x32,0x32,0x00,0x00, ++0x10,0x0E,0x00,0x00, ++0x33,0x33,0x33,0x30, ++0x14,0x0E,0x00,0x00, ++0x2F,0x2E,0x2D,0x2A, ++0x18,0x0E,0x00,0x00, ++0x33,0x33,0x33,0x30, ++0x1C,0x0E,0x00,0x00, ++0x2F,0x2E,0x2D,0x2A, ++0x30,0x0E,0x00,0x00, ++0x00,0x7C,0x00,0x01, ++0x34,0x0E,0x00,0x00, ++0x00,0x48,0x00,0x01, ++0x38,0x0E,0x00,0x00, ++0x1F,0xDC,0x00,0x10, ++0x3C,0x0E,0x00,0x00, ++0x1F,0x8C,0x00,0x10, ++0x40,0x0E,0x00,0x00, ++0xA0,0x00,0x14,0x02, ++0x44,0x0E,0x00,0x00, ++0xA0,0x00,0x16,0x28, ++0x48,0x0E,0x00,0x00, ++0x01,0x00,0x00,0xF8, ++0x4C,0x0E,0x00,0x00, ++0x10,0x29,0x00,0x00, ++0x50,0x0E,0x00,0x00, ++0x00,0x7C,0x00,0x01, ++0x54,0x0E,0x00,0x00, ++0x00,0x48,0x00,0x01, ++0x58,0x0E,0x00,0x00, ++0x1F,0xDC,0x00,0x10, ++0x5C,0x0E,0x00,0x00, ++0x1F,0x8C,0x00,0x10, ++0x60,0x0E,0x00,0x00, ++0xA0,0x00,0x14,0x02, ++0x64,0x0E,0x00,0x00, ++0xA0,0x00,0x16,0x28, ++0x6C,0x0E,0x00,0x00, ++0x10,0x29,0x00,0x00, ++0x70,0x0E,0x00,0x00, ++0xFB,0x92,0xED,0x31, ++0x74,0x0E,0x00,0x00, ++0xFB,0x36,0x15,0x36, ++0x78,0x0E,0x00,0x00, ++0xFB,0x36,0x15,0x36, ++0x7C,0x0E,0x00,0x00, ++0xFB,0x36,0x15,0x36, ++0x80,0x0E,0x00,0x00, ++0xFB,0x36,0x15,0x36, ++0x84,0x0E,0x00,0x00, ++0xFB,0x92,0x0D,0x00, ++0x88,0x0E,0x00,0x00, ++0xFB,0x92,0x0D,0x00, ++0x8C,0x0E,0x00,0x00, ++0xFB,0x92,0xED,0x31, ++0xD0,0x0E,0x00,0x00, ++0xFB,0x92,0xED,0x31, ++0xD4,0x0E,0x00,0x00, ++0xFB,0x92,0xED,0x31, ++0xD8,0x0E,0x00,0x00, ++0xFB,0x92,0x0D,0x00, ++0xDC,0x0E,0x00,0x00, ++0xFB,0x92,0x0D,0x00, ++0xE0,0x0E,0x00,0x00, ++0xFB,0x92,0x0D,0x00, ++0xE4,0x0E,0x00,0x00, ++0x48,0x54,0x5E,0x01, ++0xE8,0x0E,0x00,0x00, ++0x48,0x54,0x55,0x21, ++0x00,0x09,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x04,0x09,0x00,0x00, ++0x23,0x00,0x00,0x00, ++0x08,0x09,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x0C,0x09,0x00,0x00, ++0x13,0x13,0x12,0x01, ++0x00,0x0A,0x00,0x00, ++0xC8,0x47,0xD0,0x00, ++0x04,0x0A,0x00,0x00, ++0x08,0x00,0xFF,0x80, ++0x08,0x0A,0x00,0x00, ++0x00,0x83,0xCD,0x88, ++0x0C,0x0A,0x00,0x00, ++0x0F,0x12,0x62,0x2E, ++0x10,0x0A,0x00,0x00, ++0x78,0xBB,0x00,0x95, ++0x14,0x0A,0x00,0x00, ++0x28,0x40,0x14,0x11, ++0x18,0x0A,0x00,0x00, ++0x17,0x11,0x88,0x00, ++0x1C,0x0A,0x00,0x00, ++0x00,0x0F,0x14,0x89, ++0x20,0x0A,0x00,0x00, ++0x00,0x00,0x1B,0x1A, ++0x24,0x0A,0x00,0x00, ++0x17,0x13,0x0E,0x09, ++0x28,0x0A,0x00,0x00, ++0x04,0x02,0x00,0x00, ++0x2C,0x0A,0x00,0x00, ++0x00,0x00,0xD3,0x10, ++0x00,0x0C,0x00,0x00, ++0x40,0x1D,0x07,0x40, ++0x04,0x0C,0x00,0x00, ++0x33,0x56,0xA0,0x00, ++0x08,0x0C,0x00,0x00, ++0xE4,0x00,0x00,0x00, ++0x0C,0x0C,0x00,0x00, ++0x6C,0x6C,0x6C,0x6C, ++0x10,0x0C,0x00,0x00, ++0x00,0x00,0x80,0x08, ++0x14,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x18,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x08, ++0x1C,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x20,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x08, ++0x24,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x28,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x08, ++0x2C,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x30,0x0C,0x00,0x00, ++0x44,0xAC,0xE9,0x6D, ++0x34,0x0C,0x00,0x00, ++0xCF,0x52,0x96,0x46, ++0x38,0x0C,0x00,0x00, ++0x94,0x59,0x79,0x49, ++0x3C,0x0C,0x00,0x00, ++0x64,0x97,0x97,0x0A, ++0x40,0x0C,0x00,0x00, ++0x3F,0x40,0x7C,0x1F, ++0x44,0x0C,0x00,0x00, ++0xB7,0x00,0x01,0x00, ++0x48,0x0C,0x00,0x00, ++0x00,0x00,0x02,0xEC, ++0x4C,0x0C,0x00,0x00, ++0x7F,0x03,0x7F,0x00, ++0x50,0x0C,0x00,0x00, ++0x20,0x34,0x54,0x69, ++0x54,0x0C,0x00,0x00, ++0x94,0x00,0x3C,0x43, ++0x58,0x0C,0x00,0x00, ++0x20,0x34,0x54,0x69, ++0x5C,0x0C,0x00,0x00, ++0x94,0x00,0x3C,0x43, ++0x60,0x0C,0x00,0x00, ++0x20,0x34,0x54,0x69, ++0x64,0x0C,0x00,0x00, ++0x94,0x00,0x3C,0x43, ++0x68,0x0C,0x00,0x00, ++0x20,0x34,0x54,0x69, ++0x6C,0x0C,0x00,0x00, ++0x94,0x00,0x3C,0x43, ++0x70,0x0C,0x00,0x00, ++0x0D,0x00,0x7F,0x2C, ++0x74,0x0C,0x00,0x00, ++0x5B,0x17,0x86,0x01, ++0x78,0x0C,0x00,0x00, ++0x1F,0x00,0x00,0x00, ++0x7C,0x0C,0x00,0x00, ++0x12,0x16,0xB9,0x00, ++0x80,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x84,0x0C,0x00,0x00, ++0x00,0x00,0xF6,0x20, ++0x88,0x0C,0x00,0x00, ++0x80,0x00,0x00,0x20, ++0x8C,0x0C,0x00,0x00, ++0x00,0x00,0x20,0x20, ++0x90,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x94,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x98,0x0C,0x00,0x00, ++0x00,0x01,0x00,0x40, ++0x9C,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xA0,0x0C,0x00,0x00, ++0x92,0x24,0x49,0x00, ++0xA4,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xA8,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xAC,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xB0,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xB4,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xB8,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xBC,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x28, ++0xC0,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xC4,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xC8,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xCC,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xD0,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xD4,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xD8,0x0C,0x00,0x00, ++0x27,0x24,0xB2,0x64, ++0xDC,0x0C,0x00,0x00, ++0x32,0x69,0x76,0x00, ++0xE0,0x0C,0x00,0x00, ++0x22,0x22,0x22,0x00, ++0xE4,0x0C,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xE8,0x0C,0x00,0x00, ++0x02,0x43,0x64,0x37, ++0xEC,0x0C,0x00,0x00, ++0x0C,0xD4,0x97,0x2F, ++0x00,0x0D,0x00,0x00, ++0x50,0x07,0x00,0x00, ++0x04,0x0D,0x00,0x00, ++0x03,0x04,0x00,0x00, ++0x08,0x0D,0x00,0x00, ++0x7F,0x90,0x00,0x00, ++0x0C,0x0D,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x10,0x0D,0x00,0x00, ++0x33,0x33,0x63,0xA0, ++0x14,0x0D,0x00,0x00, ++0x63,0x3C,0x33,0x33, ++0x18,0x0D,0x00,0x00, ++0x6B,0x5B,0x8F,0x6A, ++0x1C,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x20,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x24,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x28,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x2C,0x0D,0x00,0x00, ++0x75,0x99,0x97,0xCC, ++0x30,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x34,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x38,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x3C,0x0D,0x00,0x00, ++0x93,0x72,0x02,0x00, ++0x40,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x44,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x48,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x50,0x0D,0x00,0x00, ++0x0A,0x14,0x37,0x64, ++0x54,0x0D,0x00,0x00, ++0x02,0xBD,0x4D,0x02, ++0x58,0x0D,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x5C,0x0D,0x00,0x00, ++0x64,0x20,0x03,0x30, ++0x60,0x0D,0x00,0x00, ++0x68,0xDE,0x53,0x46, ++0x64,0x0D,0x00,0x00, ++0x3C,0x8A,0x51,0x00, ++0x68,0x0D,0x00,0x00, ++0x01,0x21,0x00,0x00, ++0x14,0x0F,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0x4C,0x0F,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x0F,0x00,0x00, ++0x00,0x03,0x00,0x00, ++0x40,0x01,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x10,0x00,0x00,0x00, ++0x0C,0x02,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x3C,0x02,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x2C,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x34,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x3C,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x44,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x1C,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x24,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x7C,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x84,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0xE0,0x03,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0xD8,0x03,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x8C,0x08,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x94,0x08,0x01,0x80, ++0xDC,0x01,0x00,0x00, ++0x54,0x25,0x00,0x80, ++0x04,0x00,0x00,0x00, ++0x10,0x06,0x01,0x80, ++0xDC,0x01,0x00,0x00, ++0x54,0x25,0x00,0x80, ++0x04,0x00,0x00,0x00, ++0xD0,0x27,0x00,0x80, ++0x30,0x00,0x00,0x00, ++0xD8,0x27,0x00,0x80, ++0x04,0x00,0x00,0x00, ++0x64,0x2A,0x00,0x80, ++0x13,0x00,0x00,0x00, ++0xE8,0x06,0x01,0x80, ++0x17,0x00,0x00,0x00, ++0x3C,0x07,0x01,0x80, ++0x06,0x00,0x00,0x00, ++0xC4,0x07,0x01,0x80, ++0x06,0x00,0x00,0x00, ++0xCC,0x07,0x01,0x80, ++0x08,0x00,0x00,0x00, ++0xD4,0x07,0x01,0x80, ++0x0C,0x00,0x00,0x00, ++0xDC,0x07,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xE4,0x07,0x01,0x80, ++0x0E,0x00,0x00,0x00, ++0xEC,0x07,0x01,0x80, ++0x01,0x00,0x00,0x00, ++0xF4,0x07,0x01,0x80, ++0x38,0x00,0x00,0x00, ++0xFC,0x07,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x04,0x08,0x01,0x80, ++0x02,0x00,0x00,0x00, ++0x0C,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x14,0x08,0x01,0x80, ++0x01,0x00,0x00,0x00, ++0x54,0x08,0x01,0x80, ++0x01,0x00,0x00,0x00, ++0x5C,0x08,0x01,0x80, ++0x0C,0x00,0x00,0x00, ++0xE8,0x03,0x01,0x80, ++0x0E,0x00,0x00,0x00, ++0xF0,0x03,0x01,0x80, ++0x0C,0x00,0x00,0x00, ++0x08,0x06,0x01,0x80, ++0x34,0x00,0x00,0x00, ++0x64,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x6C,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x9C,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xA4,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xAC,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x74,0x08,0x01,0x80, ++0x08,0x00,0x00,0x00, ++0x40,0x03,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xB4,0x08,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x2C,0x09,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x38,0x09,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xEC,0x09,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x50,0x0C,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x60,0x0C,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xC8,0x0D,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0xF4,0x0E,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x30,0x10,0x01,0x80, ++0x04,0x00,0x00,0x00, ++0x48,0x12,0x01,0x80, ++0x51,0x73,0x65,0x6C, ++0x20,0x45,0x72,0x72, ++0x6F,0x72,0x2C,0x20, ++0x25,0x78,0x00,0x00, ++0x72,0x65,0x70,0x65, ++0x61,0x74,0x65,0x64, ++0x20,0x65,0x6C,0x65, ++0x6D,0x65,0x6E,0x74, ++0x20,0x49,0x44,0x3A, ++0x20,0x25,0x78,0x2C, ++0x20,0x63,0x6D,0x64, ++0x20,0x73,0x65,0x71, ++0x3D,0x25,0x78,0x2C, ++0x20,0x68,0x32,0x64, ++0x73,0x65,0x71,0x3D, ++0x25,0x78,0x0A,0x00, ++0x69,0x6E,0x76,0x61, ++0x6C,0x69,0x64,0x20, ++0x63,0x6D,0x64,0x20, ++0x69,0x64,0x3A,0x20, ++0x25,0x78,0x0A,0x00, ++0x48,0x32,0x43,0x3A, ++0x20,0x25,0x78,0x0A, ++0x00,0x00,0x00,0x00, ++0x67,0x65,0x74,0x20, ++0x6A,0x6F,0x69,0x6E, ++0x20,0x63,0x6D,0x64, ++0x0A,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x67,0x65,0x74,0x20, ++0x73,0x75,0x72,0x76, ++0x65,0x79,0x20,0x63, ++0x6D,0x64,0x0A,0x00, ++0x53,0x53,0x49,0x44, ++0x3A,0x20,0x25,0x73, ++0x0A,0x00,0x00,0x00, ++0x73,0x65,0x74,0x41, ++0x75,0x74,0x68,0x3A, ++0x20,0x25,0x78,0x0A, ++0x00,0x00,0x00,0x00, ++0x72,0x63,0x76,0x20, ++0x73,0x65,0x74,0x5F, ++0x73,0x74,0x61,0x6B, ++0x65,0x79,0x0A,0x00, ++0x53,0x65,0x74,0x53, ++0x69,0x6E,0x67,0x6C, ++0x65,0x43,0x61,0x72, ++0x72,0x69,0x65,0x72, ++0x54,0x78,0x5F,0x68, ++0x64,0x6C,0x0A,0x00, ++0x53,0x65,0x74,0x53, ++0x69,0x6E,0x67,0x6C, ++0x65,0x54,0x6F,0x6E, ++0x65,0x54,0x78,0x5F, ++0x68,0x64,0x6C,0x0A, ++0x00,0x00,0x00,0x00, ++0x53,0x65,0x74,0x43, ++0x61,0x72,0x72,0x69, ++0x65,0x72,0x53,0x75, ++0x70,0x70,0x72,0x65, ++0x73,0x73,0x69,0x6F, ++0x6E,0x54,0x78,0x5F, ++0x68,0x64,0x6C,0x0A, ++0x00,0x00,0x00,0x00, ++0x53,0x65,0x74,0x43, ++0x6F,0x6E,0x74,0x69, ++0x6E,0x75,0x6F,0x75, ++0x73,0x54,0x78,0x5F, ++0x68,0x64,0x6C,0x0A, ++0x00,0x00,0x00,0x00, ++0x53,0x65,0x74,0x43, ++0x43,0x4B,0x43,0x6F, ++0x6E,0x74,0x69,0x6E, ++0x75,0x6F,0x75,0x73, ++0x54,0x78,0x0A,0x00, ++0x53,0x65,0x74,0x4F, ++0x46,0x44,0x4D,0x43, ++0x6F,0x6E,0x74,0x69, ++0x6E,0x75,0x6F,0x75, ++0x73,0x54,0x78,0x0A, ++0x00,0x00,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0xF8,0x9E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0xC8,0x5E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0xF8,0x0E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0xC8,0xCE,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xD4,0x8E,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xA4,0x4E,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xD0,0x0E,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xA0,0xCE,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0xD0,0x86,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0xA0,0x46,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x70,0x06,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0xA4,0x9E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0x74,0x5E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0xA4,0x0E,0x02,0x00, ++0x13,0x00,0x00,0x00, ++0xD0,0xCE,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0x40,0x9F,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0x70,0x4E,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xA0,0x06,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0x70,0xC6,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0xA0,0x82,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x70,0x42,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x40,0x02,0x00,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0xAA,0x88,0x88,0x44, ++0x44,0x22,0x22,0x00, ++0x00,0x00,0x00,0x00, ++0x59,0x01,0x03,0x00, ++0x01,0x00,0x00,0x00, ++0x41,0x10,0x00,0x00, ++0x02,0x00,0x00,0x00, ++0x00,0x10,0x01,0x00, ++0x05,0x00,0x00,0x00, ++0xC0,0x0F,0x08,0x00, ++0x07,0x00,0x00,0x00, ++0x03,0xC8,0x0F,0x00, ++0x13,0x00,0x00,0x00, ++0xB0,0x7C,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0xC0,0x1C,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0x60,0xDC,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x60,0x8C,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x50,0x44,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x20,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x59,0x01,0x03,0x00, ++0x01,0x00,0x00,0x00, ++0x50,0x02,0x03,0x00, ++0x02,0x00,0x00,0x00, ++0x00,0x00,0x01,0x00, ++0x10,0x00,0x00,0x00, ++0x0F,0x00,0x08,0x00, ++0x11,0x00,0x00,0x00, ++0xFC,0x31,0x02,0x00, ++0x10,0x00,0x00,0x00, ++0x0F,0x00,0x0C,0x00, ++0x11,0x00,0x00,0x00, ++0xF8,0xF9,0x03,0x00, ++0x10,0x00,0x00,0x00, ++0x0F,0x00,0x02,0x00, ++0x11,0x00,0x00,0x00, ++0x01,0x01,0x02,0x00, ++0x14,0x00,0x00,0x00, ++0x3E,0x09,0x01,0x00, ++0x14,0x00,0x00,0x00, ++0x3E,0x09,0x09,0x00, ++0x15,0x00,0x00,0x00, ++0xF4,0x98,0x01,0x00, ++0x17,0x00,0x00,0x00, ++0x00,0x65,0x0F,0x00, ++0x1A,0x00,0x00,0x00, ++0x56,0x30,0x01,0x00, ++0x1B,0x00,0x00,0x00, ++0x00,0x00,0x06,0x00, ++0x1C,0x00,0x00,0x00, ++0x00,0x03,0x00,0x00, ++0x1E,0x00,0x00,0x00, ++0x59,0x10,0x03,0x00, ++0x21,0x00,0x00,0x00, ++0x00,0x40,0x05,0x00, ++0x22,0x00,0x00,0x00, ++0x3C,0x08,0x00,0x00, ++0x23,0x00,0x00,0x00, ++0x58,0x15,0x00,0x00, ++0x24,0x00,0x00,0x00, ++0x60,0x00,0x00,0x00, ++0x25,0x00,0x00,0x00, ++0x83,0x25,0x02,0x00, ++0x26,0x00,0x00,0x00, ++0x00,0xF2,0x00,0x00, ++0x27,0x00,0x00,0x00, ++0xF1,0xAC,0x0E,0x00, ++0x28,0x00,0x00,0x00, ++0x54,0xBD,0x09,0x00, ++0x29,0x00,0x00,0x00, ++0x82,0x45,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x34,0x13,0x02,0x00, ++0x2A,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0A,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x08,0x08,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0C,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x02,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x08,0x08,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x03,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x08,0x08,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x08,0x08,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x05,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x09,0x07,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x06,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x09,0x07,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x07,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x09,0x07,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x08,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x09,0x07,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x09,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0A,0x06,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x0A,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0A,0x06,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x0B,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0A,0x06,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x0C,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0A,0x06,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0xB3,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0B,0x05,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x33,0x33,0x05,0x00, ++0x2C,0x00,0x00,0x00, ++0x0D,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x0E,0x00,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x0B,0x05,0x00,0x00, ++0x2B,0x00,0x00,0x00, ++0x23,0x66,0x06,0x00, ++0x2C,0x00,0x00,0x00, ++0x1A,0x00,0x00,0x00, ++0x2A,0x00,0x00,0x00, ++0x00,0x40,0x0E,0x00, ++0x30,0x00,0x00,0x00, ++0x00,0x00,0x02,0x00, ++0x31,0x00,0x00,0x00, ++0x31,0x96,0x0B,0x00, ++0x32,0x00,0x00,0x00, ++0x0D,0x13,0x00,0x00, ++0x33,0x00,0x00,0x00, ++0x87,0x01,0x00,0x00, ++0x13,0x00,0x00,0x00, ++0x6C,0x9E,0x01,0x00, ++0x13,0x00,0x00,0x00, ++0x94,0x5E,0x01,0x00, ++0x00,0x00,0x00,0x00, ++0x59,0x01,0x01,0x00, ++0x18,0x00,0x00,0x00, ++0x01,0xF4,0x00,0x00, ++0xFE,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x1E,0x00,0x00,0x00, ++0x5B,0x10,0x03,0x00, ++0xFE,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x59,0x01,0x03,0x00, ++0x10,0x00,0x00,0x00, ++0x0F,0x00,0x04,0x00, ++0x11,0x00,0x00,0x00, ++0xF9,0x03,0x02,0x00, ++0x6C,0x09,0x00,0x00, ++0x01,0x02,0x03,0x04, ++0x05,0x06,0x07,0x08, ++0x09,0x0A,0x0B,0x00, ++0x00,0x00,0x00,0x12, ++0x12,0x12,0x12,0x12, ++0x12,0x12,0x12,0x12, ++0x12,0x12,0x00,0x00, ++0x00,0x00,0x0F,0x0F, ++0x0F,0x0F,0x0F,0x0F, ++0x0F,0x0F,0x0F,0x0F, ++0x0F,0x00,0x00,0x00, ++0x00,0x17,0x05,0x03, ++0x22,0x43,0x5E,0x00, ++0x4F,0xA4,0x00,0x00, ++0x4F,0xA4,0x00,0x00, ++0x22,0x43,0x5E,0x00, ++0x4F,0xA4,0x00,0x00, ++0x22,0x43,0x5E,0x00, ++0x4F,0xA4,0x3E,0x00, ++0x30,0xA6,0x00,0x00, ++0x4F,0xA4,0x3E,0x00, ++0x2B,0xA4,0x5E,0x00, ++0x2B,0xA4,0x00,0x00, ++0x2B,0xA4,0x5E,0x00, ++0x22,0xA4,0x5E,0x00, ++0x4F,0xA4,0x00,0x00, ++0x4F,0xA4,0x00,0x00, ++0x4F,0xA4,0x5E,0x00, ++0x4F,0xA4,0x5E,0x00, ++0x4F,0xA4,0x5E,0x00, ++0x4F,0xA4,0x5E,0x00, ++0x4F,0xA4,0x00,0x00, ++0x4F,0xA4,0x5E,0x00, ++0x00,0xE0,0x4C,0x02, ++0x01,0x20,0x00,0x00, ++0x00,0xE0,0x4C,0x00, ++0x00,0x0C,0x43,0x00, ++0x00,0x50,0x43,0x00, ++0x00,0x40,0x96,0x00, ++0x00,0x05,0xB5,0x00, ++0x00,0x0A,0xF7,0x00, ++0x00,0x10,0x18,0x00, ++0x00,0x13,0x74,0x00, ++0x00,0x03,0x7F,0x00, ++0x00,0x50,0xF2,0x02, ++0x01,0x01,0x00,0x00, ++0x00,0x50,0xF2,0x02, ++0x00,0x01,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0xFF,0xFF, ++0xFF,0xFF,0x00,0x00, ++0x4F,0x6E,0x41,0x73, ++0x73,0x6F,0x63,0x52, ++0x65,0x71,0x00,0x00, ++0x4F,0x6E,0x41,0x73, ++0x73,0x6F,0x63,0x52, ++0x73,0x70,0x00,0x00, ++0x4F,0x6E,0x52,0x65, ++0x41,0x73,0x73,0x6F, ++0x63,0x52,0x65,0x71, ++0x00,0x00,0x00,0x00, ++0x4F,0x6E,0x52,0x65, ++0x41,0x73,0x73,0x6F, ++0x63,0x52,0x73,0x70, ++0x00,0x00,0x00,0x00, ++0x4F,0x6E,0x50,0x72, ++0x6F,0x62,0x65,0x52, ++0x65,0x71,0x00,0x00, ++0x4F,0x6E,0x50,0x72, ++0x6F,0x62,0x65,0x52, ++0x73,0x70,0x00,0x00, ++0x4F,0x6E,0x42,0x65, ++0x61,0x63,0x6F,0x6E, ++0x00,0x00,0x00,0x00, ++0x4F,0x6E,0x41,0x54, ++0x49,0x4D,0x00,0x00, ++0x4F,0x6E,0x44,0x69, ++0x73,0x61,0x73,0x73, ++0x6F,0x63,0x00,0x00, ++0x4F,0x6E,0x41,0x75, ++0x74,0x68,0x00,0x00, ++0x4F,0x6E,0x44,0x65, ++0x41,0x75,0x74,0x68, ++0x00,0x00,0x00,0x00, ++0x4F,0x6E,0x41,0x63, ++0x74,0x69,0x6F,0x6E, ++0x00,0x00,0x00,0x00, ++0x4F,0x6E,0x45,0x78, ++0x63,0x65,0x70,0x74, ++0x69,0x6F,0x6E,0x00, ++0x00,0x00,0x00,0x00, ++0xF8,0xDD,0x01,0x80, ++0xE8,0x26,0x01,0x80, ++0x10,0x00,0x00,0x00, ++0x04,0xDE,0x01,0x80, ++0xF0,0x26,0x01,0x80, ++0x20,0x00,0x00,0x00, ++0x10,0xDE,0x01,0x80, ++0xE8,0x26,0x01,0x80, ++0x30,0x00,0x00,0x00, ++0x20,0xDE,0x01,0x80, ++0xF0,0x26,0x01,0x80, ++0x40,0x00,0x00,0x00, ++0x30,0xDE,0x01,0x80, ++0x80,0x2D,0x01,0x80, ++0x50,0x00,0x00,0x00, ++0x3C,0xDE,0x01,0x80, ++0x28,0x4A,0x00,0x80, ++0x80,0x00,0x00,0x00, ++0x48,0xDE,0x01,0x80, ++0x90,0x59,0x00,0x80, ++0x90,0x00,0x00,0x00, ++0x54,0xDE,0x01,0x80, ++0x44,0x2E,0x01,0x80, ++0xA0,0x00,0x00,0x00, ++0x5C,0xDE,0x01,0x80, ++0x4C,0x2E,0x01,0x80, ++0xB0,0x00,0x00,0x00, ++0x68,0xDE,0x01,0x80, ++0x54,0x2F,0x01,0x80, ++0xC0,0x00,0x00,0x00, ++0x70,0xDE,0x01,0x80, ++0x6C,0x2E,0x01,0x80, ++0xD0,0x00,0x00,0x00, ++0x7C,0xDE,0x01,0x80, ++0xF0,0x54,0x00,0x80, ++0x0C,0x00,0x00,0x00, ++0x88,0xDE,0x01,0x80, ++0x8C,0x2E,0x01,0x80, ++0x73,0x77,0x69,0x74, ++0x63,0x68,0x20,0x74, ++0x6F,0x20,0x34,0x30, ++0x4D,0x20,0x48,0x7A, ++0x20,0x6D,0x6F,0x64, ++0x65,0x28,0x25,0x78, ++0x2C,0x20,0x25,0x78, ++0x29,0x0A,0x00,0x00, ++0x73,0x77,0x69,0x74, ++0x63,0x68,0x20,0x74, ++0x6F,0x20,0x32,0x30, ++0x4D,0x20,0x48,0x7A, ++0x20,0x6D,0x6F,0x64, ++0x65,0x0A,0x00,0x00, ++0x41,0x54,0x49,0x4D, ++0x3A,0x20,0x25,0x78, ++0x0A,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x73,0x75,0x72,0x76, ++0x65,0x79,0x20,0x64, ++0x6F,0x6E,0x65,0x28, ++0x25,0x78,0x2C,0x20, ++0x25,0x78,0x29,0x0A, ++0x00,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x6A,0x6F,0x69,0x6E, ++0x20,0x72,0x65,0x73, ++0x28,0x25,0x78,0x29, ++0x0A,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x64,0x65,0x6C,0x20, ++0x73,0x74,0x61,0x0A, ++0x00,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x61,0x64,0x64,0x20, ++0x73,0x74,0x61,0x3A, ++0x25,0x78,0x2C,0x20, ++0x25,0x78,0x0A,0x00, ++0x72,0x63,0x76,0x20, ++0x64,0x69,0x73,0x63, ++0x6F,0x6E,0x6E,0x65, ++0x63,0x74,0x0A,0x00, ++0x64,0x69,0x73,0x63, ++0x6F,0x6E,0x6E,0x65, ++0x63,0x74,0x20,0x74, ++0x69,0x6D,0x65,0x72, ++0x3A,0x20,0x6E,0x6F, ++0x20,0x62,0x65,0x61, ++0x63,0x6F,0x6E,0x0A, ++0x00,0x00,0x00,0x00, ++0x64,0x69,0x73,0x63, ++0x6F,0x6E,0x6E,0x65, ++0x63,0x74,0x20,0x74, ++0x69,0x6D,0x65,0x72, ++0x0A,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x40, ++0x25,0x73,0x0A,0x00, ++0x57,0x4D,0x4D,0x28, ++0x25,0x78,0x29,0x3A, ++0x20,0x25,0x78,0x2C, ++0x20,0x25,0x78,0x0A, ++0x00,0x00,0x00,0x00, ++0x61,0x73,0x73,0x6F, ++0x63,0x20,0x72,0x65, ++0x6A,0x65,0x63,0x74, ++0x2C,0x20,0x73,0x74, ++0x61,0x74,0x75,0x73, ++0x3A,0x20,0x25,0x64, ++0x0A,0x00,0x00,0x00, ++0x6D,0x61,0x63,0x20, ++0x69,0x64,0x20,0x23, ++0x34,0x3A,0x20,0x25, ++0x78,0x2C,0x20,0x25, ++0x78,0x0A,0x00,0x00, ++0x6D,0x61,0x63,0x20, ++0x69,0x64,0x20,0x23, ++0x35,0x3A,0x20,0x25, ++0x78,0x2C,0x20,0x25, ++0x78,0x2C,0x20,0x25, ++0x78,0x0A,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x40, ++0x25,0x73,0x0A,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x63,0x75,0x72,0x20, ++0x63,0x68,0x61,0x6E, ++0x6E,0x65,0x6C,0x3A, ++0x20,0x25,0x78,0x2C, ++0x20,0x62,0x63,0x6E, ++0x20,0x69,0x6E,0x74, ++0x65,0x72,0x76,0x61, ++0x6C,0x3A,0x20,0x25, ++0x78,0x0A,0x00,0x00, ++0x49,0x42,0x53,0x53, ++0x20,0x6D,0x6F,0x64, ++0x65,0x2C,0x20,0x63, ++0x75,0x72,0x20,0x63, ++0x68,0x61,0x6E,0x6E, ++0x65,0x6C,0x3A,0x20, ++0x25,0x78,0x2C,0x20, ++0x62,0x63,0x6E,0x20, ++0x69,0x6E,0x74,0x65, ++0x72,0x76,0x61,0x6C, ++0x3A,0x20,0x25,0x78, ++0x0A,0x00,0x00,0x00, ++0x6D,0x61,0x63,0x20, ++0x69,0x64,0x20,0x23, ++0x34,0x3A,0x20,0x25, ++0x78,0x2C,0x20,0x25, ++0x78,0x0A,0x00,0x00, ++0x69,0x6E,0x76,0x61, ++0x6C,0x69,0x64,0x20, ++0x63,0x61,0x70,0x3A, ++0x25,0x78,0x0A,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x20,0x61,0x73, ++0x73,0x6F,0x63,0x72, ++0x65,0x71,0x28,0x25, ++0x78,0x29,0x0A,0x00, ++0x5B,0x57,0x41,0x50, ++0x49,0x5D,0x20,0x67, ++0x65,0x74,0x20,0x77, ++0x61,0x70,0x69,0x20, ++0x49,0x45,0x0A,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x20,0x61,0x63, ++0x74,0x69,0x6F,0x6E, ++0x3A,0x20,0x25,0x78, ++0x2C,0x20,0x25,0x78, ++0x2C,0x20,0x25,0x78, ++0x20,0x0A,0x00,0x00, ++0x41,0x44,0x44,0x42, ++0x41,0x20,0x52,0x53, ++0x50,0x3A,0x20,0x25, ++0x78,0x0A,0x00,0x00, ++0x44,0x45,0x4C,0x42, ++0x41,0x3A,0x20,0x25, ++0x78,0x28,0x25,0x78, ++0x29,0x0A,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x20,0x61,0x75, ++0x74,0x68,0x0A,0x00, ++0x63,0x6C,0x6E,0x74, ++0x20,0x61,0x75,0x74, ++0x68,0x20,0x66,0x61, ++0x69,0x6C,0x2C,0x20, ++0x73,0x74,0x61,0x74, ++0x75,0x73,0x3A,0x20, ++0x25,0x64,0x0A,0x00, ++0x6E,0x6F,0x20,0x63, ++0x68,0x61,0x6C,0x6C, ++0x65,0x6E,0x67,0x65, ++0x20,0x74,0x65,0x78, ++0x74,0x3F,0x0A,0x00, ++0x63,0x6C,0x6E,0x74, ++0x20,0x61,0x75,0x74, ++0x68,0x20,0x66,0x61, ++0x69,0x6C,0x65,0x64, ++0x20,0x64,0x75,0x65, ++0x20,0x74,0x6F,0x20, ++0x69,0x6C,0x6C,0x65, ++0x67,0x61,0x6C,0x20, ++0x73,0x65,0x71,0x3D, ++0x25,0x78,0x0A,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x64,0x65, ++0x61,0x75,0x74,0x68, ++0x0A,0x00,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x64,0x69, ++0x73,0x61,0x73,0x73, ++0x6F,0x63,0x0A,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x4E,0x6F,0x20,0x69, ++0x72,0x70,0x20,0x25, ++0x73,0x0A,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x20,0x6E,0x75, ++0x6C,0x6C,0x20,0x64, ++0x61,0x74,0x61,0x28, ++0x25,0x64,0x29,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x41,0x72,0x74,0x68, ++0x65,0x72,0x6F,0x73, ++0x20,0x41,0x50,0x0A, ++0x00,0x00,0x00,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x42,0x72,0x6F,0x61, ++0x64,0x63,0x6F,0x6D, ++0x20,0x41,0x50,0x0A, ++0x00,0x00,0x00,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x4D,0x61,0x72,0x76, ++0x65,0x6C,0x6C,0x20, ++0x41,0x50,0x0A,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x52,0x61,0x6C,0x69, ++0x6E,0x6B,0x20,0x41, ++0x50,0x0A,0x00,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x43,0x69,0x73,0x63, ++0x6F,0x20,0x41,0x50, ++0x0A,0x00,0x00,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x52,0x65,0x61,0x6C, ++0x74,0x65,0x6B,0x20, ++0x39,0x36,0x42,0x20, ++0x41,0x50,0x0A,0x00, ++0x6C,0x69,0x6E,0x6B, ++0x20,0x74,0x6F,0x20, ++0x75,0x6E,0x6B,0x6E, ++0x6F,0x77,0x6E,0x20, ++0x41,0x50,0x0A,0x00, ++0x6D,0x61,0x63,0x20, ++0x69,0x64,0x20,0x23, ++0x25,0x78,0x3A,0x20, ++0x25,0x78,0x2C,0x20, ++0x25,0x78,0x0A,0x00, ++0x64,0x72,0x6F,0x70, ++0x20,0x64,0x75,0x65, ++0x20,0x74,0x6F,0x20, ++0x64,0x65,0x63,0x61, ++0x63,0x68,0x65,0x0A, ++0x00,0x00,0x00,0x00, ++0xFF,0x00,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xFF,0xFF,0x00,0x00, ++0x01,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x02,0x03, ++0xFF,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x02,0x03, ++0x04,0x05,0x06,0x07, ++0x08,0x09,0x0A,0x0B, ++0xFF,0x00,0x00,0x00, ++0x04,0x05,0x06,0x07, ++0x08,0x09,0x0A,0x0B, ++0xFF,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x04,0x05,0x06,0x07, ++0x08,0xFF,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x02,0x03, ++0xFF,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x01,0x01,0x03, ++0xFF,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x30,0x31,0x32,0x33, ++0x34,0x35,0x36,0x37, ++0x38,0x39,0x41,0x42, ++0x43,0x44,0x45,0x46, ++0x00,0x00,0x00,0x00, ++0x25,0x64,0x2E,0x00, ++0x25,0x68,0x68,0x58, ++0x3A,0x00,0x00,0x00, ++0x74,0x61,0x72,0x67, ++0x65,0x74,0x20,0x74, ++0x68,0x65,0x72,0x6D, ++0x61,0x6C,0x3A,0x20, ++0x25,0x78,0x2C,0x20, ++0x63,0x75,0x72,0x20, ++0x74,0x68,0x65,0x72, ++0x6D,0x61,0x6C,0x3A, ++0x20,0x25,0x78,0x0A, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x08,0xE4,0x01,0x80, ++0x08,0xE4,0x01,0x80, ++0x31,0x10,0x10,0x00, ++0x00,0x30,0x00,0x00, ++0x31,0x20,0x10,0x00, ++0x00,0x30,0x00,0x00, ++0x31,0x28,0x10,0x00, ++0x00,0x30,0x00,0x00, ++0x31,0x2C,0x10,0x10, ++0x00,0x30,0x00,0x00, ++0x31,0x2F,0x10,0x10, ++0x00,0x30,0x00,0x00, ++0x31,0x30,0x18,0x00, ++0x00,0x30,0x00,0x00, ++0x31,0x30,0x20,0x10, ++0x00,0x30,0x00,0x00, ++0x22,0x20,0x18,0x08, ++0x00,0x20,0x00,0x00, ++0x22,0x21,0x14,0x08, ++0x00,0x20,0x00,0x00, ++0x22,0x21,0x1C,0x08, ++0x00,0x20,0x00,0x00, ++0x22,0x21,0x20,0x08, ++0x00,0x20,0x00,0x00, ++0x22,0x21,0x20,0x10, ++0x00,0x20,0x00,0x00, ++0x22,0x21,0x20,0x18, ++0x00,0x20,0x00,0x00, ++0x1A,0x19,0x18,0x10, ++0x00,0x18,0x00,0x00, ++0x12,0x11,0x10,0x08, ++0x00,0x10,0x00,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x02, ++0x00,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x06, ++0x00,0x08,0x00,0x00, ++0x08,0x07,0x06,0x04, ++0x00,0x06,0x00,0x00, ++0x06,0x05,0x04,0x02, ++0x00,0x04,0x00,0x00, ++0x06,0x05,0x04,0x03, ++0x00,0x04,0x00,0x00, ++0x05,0x04,0x03,0x02, ++0x00,0x03,0x00,0x00, ++0x09,0x08,0x07,0x06, ++0x07,0x06,0x06,0x05, ++0x05,0x04,0x04,0x03, ++0x06,0x05,0x05,0x04, ++0x04,0x03,0x03,0x03, ++0x05,0x04,0x04,0x03, ++0x03,0x02,0x02,0x02, ++0x00,0x09,0x08,0x07, ++0x06,0x07,0x06,0x06, ++0x05,0x05,0x04,0x04, ++0x03,0x05,0x04,0x04, ++0x03,0x03,0x02,0x02, ++0x02,0x04,0x03,0x03, ++0x02,0x02,0x01,0x01, ++0x01,0x00,0x00,0x00, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x10,0x10,0x20, ++0x08,0x08,0x08,0x08, ++0x20,0x20,0x20,0x20, ++0x08,0x08,0x08,0x08, ++0x08,0x20,0x20,0x20, ++0x30,0x08,0x08,0x08, ++0x08,0x18,0x18,0x18, ++0x18,0x18,0x20,0x30, ++0x30,0x10,0x20,0x20, ++0x20,0x20,0x20,0x30, ++0x30,0x08,0x10,0x20, ++0x30,0x30,0x30,0x30, ++0x30,0x30,0x00,0x00, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x10,0x10,0x20, ++0x08,0x08,0x08,0x08, ++0x08,0x20,0x20,0x20, ++0x08,0x08,0x08,0x08, ++0x08,0x20,0x20,0x20, ++0x20,0x08,0x08,0x08, ++0x08,0x18,0x18,0x18, ++0x18,0x18,0x20,0x30, ++0x30,0x10,0x20,0x20, ++0x20,0x20,0x20,0x30, ++0x30,0x08,0x10,0x20, ++0x30,0x30,0x30,0x30, ++0x30,0x30,0x00,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x0A,0x09,0x08, ++0x04,0x00,0x0A,0x09, ++0x08,0x04,0x00,0x0A, ++0x09,0x08,0x04,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x0A,0x09,0x08, ++0x00,0x00,0x0A,0x09, ++0x08,0x00,0x00,0x0A, ++0x09,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x12,0x11,0x10, ++0x08,0x00,0x12,0x11, ++0x10,0x08,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x0A,0x09,0x08, ++0x00,0x00,0x0A,0x09, ++0x08,0x00,0x00,0x0A, ++0x09,0x08,0x00,0x00, ++0x22,0x21,0x20,0x18, ++0x00,0x22,0x21,0x20, ++0x18,0x00,0x22,0x21, ++0x1C,0x08,0x00,0x22, ++0x20,0x18,0x08,0x00, ++0x0A,0x09,0x08,0x02, ++0x00,0x0A,0x09,0x08, ++0x02,0x00,0x0A,0x09, ++0x08,0x02,0x00,0x0A, ++0x09,0x08,0x02,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x22,0x21,0x20, ++0x10,0x00,0x22,0x21, ++0x20,0x08,0x00,0x22, ++0x21,0x1C,0x08,0x00, ++0x31,0x30,0x18,0x00, ++0x00,0x0A,0x09,0x08, ++0x04,0x00,0x0A,0x09, ++0x08,0x04,0x00,0x0A, ++0x09,0x08,0x04,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x1A,0x19,0x18, ++0x10,0x00,0x1A,0x19, ++0x18,0x10,0x00,0x1A, ++0x19,0x18,0x10,0x00, ++0x1A,0x19,0x18,0x10, ++0x00,0x1A,0x19,0x18, ++0x10,0x00,0x22,0x21, ++0x20,0x08,0x00,0x31, ++0x2C,0x10,0x10,0x00, ++0x31,0x28,0x10,0x00, ++0x00,0x12,0x11,0x10, ++0x08,0x00,0x22,0x21, ++0x20,0x18,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x22,0x21,0x20,0x08, ++0x00,0x22,0x21,0x14, ++0x08,0x00,0x22,0x20, ++0x18,0x08,0x00,0x31, ++0x30,0x20,0x10,0x00, ++0x31,0x2C,0x10,0x10, ++0x00,0x0A,0x09,0x08, ++0x00,0x00,0x12,0x11, ++0x10,0x08,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x22,0x21,0x20,0x18, ++0x00,0x31,0x30,0x20, ++0x10,0x00,0x31,0x2F, ++0x10,0x10,0x00,0x31, ++0x2F,0x10,0x10,0x00, ++0x31,0x10,0x10,0x00, ++0x00,0x31,0x2C,0x10, ++0x10,0x00,0x00,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x0A,0x09,0x08, ++0x04,0x00,0x0A,0x09, ++0x08,0x04,0x00,0x0A, ++0x09,0x08,0x04,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x0A,0x09,0x08, ++0x00,0x00,0x0A,0x09, ++0x08,0x00,0x00,0x0A, ++0x09,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x12,0x11,0x10, ++0x08,0x00,0x12,0x11, ++0x10,0x08,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x0A,0x09,0x08, ++0x04,0x00,0x0A,0x09, ++0x08,0x02,0x00,0x0A, ++0x09,0x08,0x00,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x22,0x21,0x20, ++0x18,0x00,0x22,0x21, ++0x1C,0x08,0x00,0x22, ++0x21,0x14,0x08,0x00, ++0x0A,0x09,0x08,0x02, ++0x00,0x0A,0x09,0x08, ++0x02,0x00,0x0A,0x09, ++0x08,0x02,0x00,0x0A, ++0x09,0x08,0x02,0x00, ++0x0A,0x09,0x08,0x00, ++0x00,0x22,0x21,0x20, ++0x10,0x00,0x22,0x21, ++0x20,0x08,0x00,0x22, ++0x21,0x14,0x08,0x00, ++0x22,0x21,0x14,0x08, ++0x00,0x0A,0x09,0x08, ++0x04,0x00,0x0A,0x09, ++0x08,0x04,0x00,0x0A, ++0x09,0x08,0x04,0x00, ++0x0A,0x09,0x08,0x04, ++0x00,0x1A,0x19,0x18, ++0x10,0x00,0x1A,0x19, ++0x18,0x10,0x00,0x1A, ++0x19,0x18,0x10,0x00, ++0x1A,0x19,0x18,0x10, ++0x00,0x1A,0x19,0x18, ++0x10,0x00,0x22,0x21, ++0x20,0x08,0x00,0x31, ++0x2C,0x10,0x10,0x00, ++0x31,0x28,0x10,0x00, ++0x00,0x12,0x11,0x10, ++0x08,0x00,0x22,0x21, ++0x20,0x18,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x22,0x21,0x20,0x08, ++0x00,0x22,0x21,0x14, ++0x08,0x00,0x22,0x20, ++0x18,0x08,0x00,0x31, ++0x30,0x20,0x10,0x00, ++0x31,0x2C,0x10,0x10, ++0x00,0x0A,0x09,0x08, ++0x00,0x00,0x12,0x11, ++0x10,0x08,0x00,0x22, ++0x21,0x20,0x18,0x00, ++0x22,0x21,0x20,0x18, ++0x00,0x31,0x30,0x20, ++0x10,0x00,0x31,0x2F, ++0x10,0x10,0x00,0x31, ++0x2F,0x10,0x10,0x00, ++0x31,0x10,0x10,0x00, ++0x00,0x31,0x2C,0x10, ++0x10,0x00,0x00,0x00, ++0x01,0x02,0x04,0x08, ++0x02,0x04,0x08,0x0C, ++0x10,0x18,0x20,0x30, ++0x02,0x04,0x08,0x0C, ++0x10,0x18,0x20,0x30, ++0x06,0x0C,0x10,0x18, ++0x24,0x30,0x3C,0x48, ++0x48,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x25,0x27,0x2C, ++0x19,0x1B,0x1E,0x20, ++0x23,0x29,0x2A,0x2B, ++0x00,0x00,0x00,0x00, ++0x25,0x29,0x2B,0x2E, ++0x2E,0x00,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x08,0x00,0x00,0x00, ++0x10,0x00,0x00,0x00, ++0x18,0x00,0x00,0x00, ++0x24,0x00,0x00,0x00, ++0x30,0x00,0x00,0x00, ++0x48,0x00,0x00,0x00, ++0x60,0x00,0x00,0x00, ++0x90,0x00,0x00,0x00, ++0xC0,0x00,0x00,0x00, ++0xD8,0x00,0x00,0x00, ++0x50,0x00,0x00,0x00, ++0x78,0x00,0x00,0x00, ++0xA0,0x00,0x00,0x00, ++0xC8,0x00,0x00,0x00, ++0x40,0x01,0x00,0x00, ++0x90,0x01,0x00,0x00, ++0xE0,0x01,0x00,0x00, ++0x30,0x02,0x00,0x00, ++0x2C,0x01,0x00,0x00, ++0x40,0x01,0x00,0x00, ++0xE0,0x01,0x00,0x00, ++0xD0,0x02,0x00,0x00, ++0x80,0x0C,0x00,0x00, ++0x80,0x0C,0x00,0x00, ++0x80,0x0C,0x00,0x00, ++0xA0,0x0F,0x00,0x00, ++0xA0,0x0F,0x00,0x00, ++0x02,0x00,0x00,0x00, ++0x02,0x00,0x00,0x00, ++0x04,0x00,0x00,0x00, ++0x08,0x00,0x00,0x00, ++0x0C,0x00,0x00,0x00, ++0x12,0x00,0x00,0x00, ++0x18,0x00,0x00,0x00, ++0x24,0x00,0x00,0x00, ++0x30,0x00,0x00,0x00, ++0x48,0x00,0x00,0x00, ++0x60,0x00,0x00,0x00, ++0x6C,0x00,0x00,0x00, ++0x28,0x00,0x00,0x00, ++0x3C,0x00,0x00,0x00, ++0x50,0x00,0x00,0x00, ++0x64,0x00,0x00,0x00, ++0xA0,0x00,0x00,0x00, ++0xC8,0x00,0x00,0x00, ++0xF0,0x00,0x00,0x00, ++0x18,0x01,0x00,0x00, ++0x64,0x00,0x00,0x00, ++0xA0,0x00,0x00,0x00, ++0xF0,0x00,0x00,0x00, ++0x68,0x01,0x00,0x00, ++0x40,0x06,0x00,0x00, ++0x40,0x06,0x00,0x00, ++0x40,0x06,0x00,0x00, ++0xD0,0x07,0x00,0x00, ++0xD0,0x07,0x00,0x00, ++0x72,0x65,0x73,0x65, ++0x74,0x28,0x25,0x78, ++0x29,0x0A,0x00,0x00, ++0xC8,0x82,0x01,0x80, ++0xC8,0xD0,0x00,0x80, ++0xC8,0xD0,0x00,0x80, ++0xC8,0xD0,0x00,0x80, ++0xC8,0xD0,0x00,0x80, ++0x14,0xCF,0x00,0x80, ++0xD0,0x82,0x01,0x80, ++0xC8,0x82,0x01,0x80, ++0xC8,0x82,0x01,0x80, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xF0,0x85,0x01,0x80, ++0xF0,0x85,0x01,0x80, ++0xF0,0x85,0x01,0x80, ++0xF0,0x85,0x01,0x80, ++0xA8,0x82,0x01,0x80, ++0x00,0x85,0x01,0x80, ++0xB0,0x82,0x01,0x80, ++0xB8,0x82,0x01,0x80, ++0xC0,0x82,0x01,0x80, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x08,0x04,0x04,0x08, ++0x02,0x02,0x01,0x01, ++0x50,0x53,0x00,0x00, ++0x80,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xA0,0xA4,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x68,0xA4,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x30,0xA4,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0xF8,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0xC0,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x88,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x70,0xA3,0x01,0x80, ++0x48,0xA3,0x01,0x80, ++0xB8,0x06,0x00,0x80, ++0xAC,0x06,0x00,0x80, ++0xA0,0x06,0x00,0x80, ++0x94,0x06,0x00,0x80, ++0x88,0x06,0x00,0x80, ++0x7C,0x06,0x00,0x80, ++0x70,0x06,0x00,0x80, ++0x64,0x06,0x00,0x80, ++0x58,0x06,0x00,0x80, ++0x4C,0x06,0x00,0x80, ++0x04,0x06,0x00,0x80, ++0x30,0x1F,0x02,0x80, ++0xB0,0x03,0x25,0xB0, ++0x30,0x1F,0x02,0x80, ++0x30,0x1F,0x02,0x80, ++0x30,0x1F,0x02,0x80, ++0x30,0x1F,0x02,0x80, ++0x6A,0x6F,0x69,0x6E, ++0x62,0x73,0x73,0x5F, ++0x68,0x64,0x6C,0x00, ++0x00,0x0E,0x04,0x0E, ++0x10,0x0E,0x14,0x0E, ++0x18,0x0E,0x1C,0x0E, ++0x02,0x04,0x04,0x07, ++0x07,0x0D,0x0D,0x0D, ++0x02,0x07,0x07,0x0D, ++0x0D,0x0F,0x0F,0x0F, ++0x0F,0x00,0x00,0x00, ++0x72,0x65,0x70,0x6F, ++0x72,0x74,0x5F,0x73, ++0x75,0x72,0x76,0x65, ++0x79,0x5F,0x64,0x6F, ++0x6E,0x65,0x00,0x00, ++0x72,0x65,0x70,0x6F, ++0x72,0x74,0x5F,0x6A, ++0x6F,0x69,0x6E,0x5F, ++0x72,0x65,0x73,0x00, ++0x72,0x65,0x70,0x6F, ++0x72,0x74,0x5F,0x64, ++0x65,0x6C,0x5F,0x73, ++0x74,0x61,0x5F,0x65, ++0x76,0x65,0x6E,0x74, ++0x00,0x00,0x00,0x00, ++0x72,0x65,0x70,0x6F, ++0x72,0x74,0x5F,0x61, ++0x64,0x64,0x5F,0x73, ++0x74,0x61,0x5F,0x65, ++0x76,0x65,0x6E,0x74, ++0x00,0x00,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x70,0x72, ++0x6F,0x62,0x65,0x72, ++0x65,0x71,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x70,0x72, ++0x6F,0x62,0x65,0x72, ++0x73,0x70,0x00,0x00, ++0x72,0x65,0x70,0x6F, ++0x72,0x74,0x5F,0x42, ++0x53,0x53,0x49,0x44, ++0x5F,0x69,0x6E,0x66, ++0x6F,0x00,0x00,0x00, ++0x00,0x50,0xF2,0x01, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x61,0x73, ++0x73,0x6F,0x63,0x72, ++0x65,0x71,0x00,0x00, ++0x00,0x50,0xF2,0x04, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x61,0x63, ++0x74,0x69,0x6F,0x6E, ++0x00,0x00,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x61,0x75, ++0x74,0x68,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x64,0x65, ++0x61,0x75,0x74,0x68, ++0x00,0x00,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x64,0x69, ++0x73,0x61,0x73,0x73, ++0x6F,0x63,0x00,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x66,0x72, ++0x61,0x6D,0x65,0x00, ++0x69,0x73,0x73,0x75, ++0x65,0x5F,0x66,0x72, ++0x61,0x6D,0x65,0x5F, ++0x6C,0x65,0x6E,0x00, ++0x30,0x1F,0x02,0x80, ++0xB0,0x03,0x25,0xB0, ++0xF8,0x00,0x25,0xB0, ++0x18,0x03,0x25,0xB0, ++0x44,0x44,0x33,0x33, ++0x06,0x00,0x2A,0xB0, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x24,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0xA8,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x9C,0x3E,0x01,0x80, ++0x90,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x84,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x78,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x6C,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x60,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x54,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x48,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x3C,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x28,0x3E,0x01,0x80, ++0x30,0x3E,0x01,0x80, ++0x68,0x3F,0x01,0x80, ++0x5C,0x3F,0x01,0x80, ++0x50,0x3F,0x01,0x80, ++0x44,0x3F,0x01,0x80, ++0x38,0x3F,0x01,0x80, ++0x2C,0x3F,0x01,0x80, ++0x20,0x3F,0x01,0x80, ++0x14,0x3F,0x01,0x80, ++0x08,0x3F,0x01,0x80, ++0xFC,0x3E,0x01,0x80, ++0xF0,0x3E,0x01,0x80, ++0xE4,0x3E,0x01,0x80, ++0x00,0x50,0xF2,0x01, ++0x00,0x50,0xF2,0x02, ++0x00,0x0F,0xAC,0x02, ++0xBC,0xE3,0x01,0x80, ++0x67,0x66,0x66,0x66, ++0x7C,0x88,0x00,0x80, ++0x64,0x88,0x00,0x80, ++0x4C,0x88,0x00,0x80, ++0x34,0x88,0x00,0x80, ++0x1C,0x88,0x00,0x80, ++0x04,0x88,0x00,0x80, ++0xE0,0x87,0x00,0x80, ++0x00,0x02,0x00,0x00, ++0x08,0x09,0x00,0x00, ++0x18,0x96,0x00,0x80, ++0x24,0x96,0x00,0x80, ++0x30,0x96,0x00,0x80, ++0x3C,0x96,0x00,0x80, ++0x18,0x96,0x00,0x80, ++0x18,0x96,0x00,0x80, ++0x18,0x96,0x00,0x80, ++0x18,0x96,0x00,0x80, ++0x48,0x96,0x00,0x80, ++0x54,0x96,0x00,0x80, ++0x60,0x96,0x00,0x80, ++0x6C,0x96,0x00,0x80, ++0x30,0x1F,0x02,0x80, ++0x84,0x0E,0x25,0xB0, ++0x88,0x0E,0x25,0xB0, ++0x8C,0x0E,0x25,0xB0, ++0xD0,0x0E,0x25,0xB0, ++0xD8,0x0E,0x25,0xB0, ++0x20,0x08,0x25,0xB0, ++0x74,0x0E,0x25,0xB0, ++0x80,0x0E,0x25,0xB0, ++0x84,0x0E,0x25,0xB0, ++0x88,0x0E,0x25,0xB0, ++0x8C,0x0E,0x25,0xB0, ++0xD0,0x0E,0x25,0xB0, ++0xD8,0x0E,0x25,0xB0, ++0x14,0x0C,0x25,0xB0, ++0x88,0x0C,0x25,0xB0, ++0x1C,0x0C,0x25,0xB0, ++0xFE,0x01,0x80,0x7F, ++0xE2,0x01,0x80,0x78, ++0xC7,0x01,0xC0,0x71, ++0xAE,0x01,0x80,0x6B, ++0x95,0x01,0x40,0x65, ++0x7F,0x01,0xC0,0x5F, ++0x69,0x01,0x40,0x5A, ++0x55,0x01,0x40,0x55, ++0x42,0x01,0x80,0x50, ++0x30,0x01,0x00,0x4C, ++0x1F,0x01,0xC0,0x47, ++0x0F,0x01,0xC0,0x43, ++0x00,0x01,0x00,0x40, ++0xF2,0x00,0x80,0x3C, ++0xE4,0x00,0x00,0x39, ++0xD7,0x00,0xC0,0x35, ++0xCB,0x00,0xC0,0x32, ++0xC0,0x00,0x00,0x30, ++0xB5,0x00,0x40,0x2D, ++0xAB,0x00,0xC0,0x2A, ++0xA2,0x00,0x80,0x28, ++0x98,0x00,0x00,0x26, ++0x90,0x00,0x00,0x24, ++0x88,0x00,0x00,0x22, ++0x80,0x00,0x00,0x20, ++0x79,0x00,0x40,0x1E, ++0x72,0x00,0x80,0x1C, ++0x6C,0x00,0x00,0x1B, ++0x66,0x00,0x80,0x19, ++0x60,0x00,0x00,0x18, ++0x5B,0x00,0xC0,0x16, ++0x56,0x00,0x80,0x15, ++0x51,0x00,0x40,0x14, ++0x4C,0x00,0x00,0x13, ++0x48,0x00,0x00,0x12, ++0x44,0x00,0x00,0x11, ++0x40,0x00,0x00,0x10, ++0x36,0x35,0x2E,0x25, ++0x1C,0x12,0x09,0x04, ++0x33,0x32,0x2B,0x23, ++0x1A,0x11,0x08,0x04, ++0x30,0x2F,0x29,0x21, ++0x19,0x10,0x08,0x03, ++0x2D,0x2D,0x27,0x1F, ++0x18,0x0F,0x08,0x03, ++0x2B,0x2A,0x25,0x1E, ++0x16,0x0E,0x07,0x03, ++0x28,0x28,0x22,0x1C, ++0x15,0x0D,0x07,0x03, ++0x26,0x25,0x21,0x1B, ++0x14,0x0D,0x06,0x03, ++0x24,0x23,0x1F,0x19, ++0x13,0x0C,0x06,0x03, ++0x22,0x21,0x1D,0x18, ++0x11,0x0B,0x06,0x02, ++0x20,0x20,0x1B,0x16, ++0x11,0x08,0x05,0x02, ++0x1F,0x1E,0x1A,0x15, ++0x10,0x0A,0x05,0x02, ++0x1D,0x1C,0x18,0x14, ++0x0F,0x0A,0x05,0x02, ++0x1B,0x1A,0x17,0x13, ++0x0E,0x09,0x04,0x02, ++0x1A,0x19,0x16,0x12, ++0x0D,0x09,0x04,0x02, ++0x18,0x17,0x15,0x11, ++0x0C,0x08,0x04,0x02, ++0x17,0x16,0x13,0x10, ++0x0C,0x08,0x04,0x02, ++0x16,0x15,0x12,0x0F, ++0x0B,0x07,0x04,0x01, ++0x14,0x14,0x11,0x0E, ++0x0B,0x07,0x03,0x02, ++0x13,0x13,0x10,0x0D, ++0x0A,0x06,0x03,0x01, ++0x12,0x12,0x0F,0x0C, ++0x09,0x06,0x03,0x01, ++0x11,0x11,0x0F,0x0C, ++0x09,0x06,0x03,0x01, ++0x10,0x10,0x0E,0x0B, ++0x08,0x05,0x03,0x01, ++0x0F,0x0F,0x0D,0x0B, ++0x08,0x05,0x03,0x01, ++0x0E,0x0E,0x0C,0x0A, ++0x08,0x05,0x02,0x01, ++0x0D,0x0D,0x0C,0x0A, ++0x07,0x05,0x02,0x01, ++0x0D,0x0C,0x0B,0x09, ++0x07,0x04,0x02,0x01, ++0x0C,0x0C,0x0A,0x09, ++0x06,0x04,0x02,0x01, ++0x0B,0x0B,0x0A,0x08, ++0x06,0x04,0x02,0x01, ++0x0B,0x0A,0x09,0x08, ++0x06,0x04,0x02,0x01, ++0x0A,0x0A,0x09,0x07, ++0x05,0x03,0x02,0x01, ++0x0A,0x09,0x08,0x07, ++0x05,0x03,0x02,0x01, ++0x09,0x09,0x08,0x06, ++0x05,0x03,0x01,0x01, ++0x09,0x08,0x07,0x06, ++0x04,0x03,0x01,0x01, ++0x36,0x35,0x2E,0x1B, ++0x00,0x00,0x00,0x00, ++0x33,0x32,0x2B,0x19, ++0x00,0x00,0x00,0x00, ++0x30,0x2F,0x29,0x18, ++0x00,0x00,0x00,0x00, ++0x2D,0x2D,0x17,0x17, ++0x00,0x00,0x00,0x00, ++0x2B,0x2A,0x25,0x15, ++0x00,0x00,0x00,0x00, ++0x28,0x28,0x24,0x14, ++0x00,0x00,0x00,0x00, ++0x26,0x25,0x21,0x13, ++0x00,0x00,0x00,0x00, ++0x24,0x23,0x1F,0x12, ++0x00,0x00,0x00,0x00, ++0x22,0x21,0x1D,0x11, ++0x00,0x00,0x00,0x00, ++0x20,0x20,0x1B,0x10, ++0x00,0x00,0x00,0x00, ++0x1F,0x1E,0x1A,0x0F, ++0x00,0x00,0x00,0x00, ++0x1D,0x1C,0x18,0x0E, ++0x00,0x00,0x00,0x00, ++0x1B,0x1A,0x17,0x0E, ++0x00,0x00,0x00,0x00, ++0x1A,0x19,0x16,0x0D, ++0x00,0x00,0x00,0x00, ++0x18,0x17,0x15,0x0C, ++0x00,0x00,0x00,0x00, ++0x17,0x16,0x13,0x0B, ++0x00,0x00,0x00,0x00, ++0x16,0x15,0x12,0x0B, ++0x00,0x00,0x00,0x00, ++0x14,0x14,0x11,0x0A, ++0x00,0x00,0x00,0x00, ++0x13,0x13,0x10,0x0A, ++0x00,0x00,0x00,0x00, ++0x12,0x12,0x0F,0x09, ++0x00,0x00,0x00,0x00, ++0x11,0x11,0x0F,0x09, ++0x00,0x00,0x00,0x00, ++0x10,0x10,0x0E,0x08, ++0x00,0x00,0x00,0x00, ++0x0F,0x0F,0x0D,0x08, ++0x00,0x00,0x00,0x00, ++0x0E,0x0E,0x0C,0x07, ++0x00,0x00,0x00,0x00, ++0x0D,0x0D,0x0C,0x07, ++0x00,0x00,0x00,0x00, ++0x0D,0x0C,0x0B,0x06, ++0x00,0x00,0x00,0x00, ++0x0C,0x0C,0x0A,0x06, ++0x00,0x00,0x00,0x00, ++0x0B,0x0B,0x0A,0x06, ++0x00,0x00,0x00,0x00, ++0x0B,0x0A,0x09,0x05, ++0x00,0x00,0x00,0x00, ++0x0A,0x0A,0x09,0x05, ++0x00,0x00,0x00,0x00, ++0x0A,0x09,0x08,0x05, ++0x00,0x00,0x00,0x00, ++0x09,0x09,0x08,0x05, ++0x00,0x00,0x00,0x00, ++0x09,0x08,0x07,0x04, ++0x00,0x00,0x00,0x00, ++0x06,0x00,0x2A,0xB0, ++0x05,0x00,0x2A,0xB0, ++0x54,0x83,0x01,0x80, ++0xC4,0x83,0x01,0x80, ++0x80,0x83,0x01,0x80, ++0xC4,0x83,0x01,0x80, ++0xC4,0x83,0x01,0x80, ++0xC4,0x83,0x01,0x80, ++0xC4,0x83,0x01,0x80, ++0x2C,0x83,0x01,0x80, ++0x00,0x01,0x02,0x02, ++0x03,0x03,0x03,0x03, ++0x04,0x04,0x04,0x04, ++0x04,0x04,0x04,0x04, ++0x05,0x05,0x05,0x05, ++0x05,0x05,0x05,0x05, ++0x05,0x05,0x05,0x05, ++0x05,0x05,0x05,0x05, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x06,0x06,0x06,0x06, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x07,0x07,0x07,0x07, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x28,0x28,0x28, ++0x28,0x28,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0x08,0x08,0x08,0x08, ++0xA0,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x04,0x04,0x04,0x04, ++0x04,0x04,0x04,0x04, ++0x04,0x04,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x41,0x41,0x41, ++0x41,0x41,0x41,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x42,0x42,0x42, ++0x42,0x42,0x42,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x10, ++0x10,0x10,0x10,0x08, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0xA0,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x10,0x10,0x10,0x10, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x10, ++0x01,0x01,0x01,0x01, ++0x01,0x01,0x01,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x10, ++0x02,0x02,0x02,0x02, ++0x02,0x02,0x02,0x00, ++0x2D,0x5C,0x7C,0x2F, ++0x00,0x00,0x00,0x00, ++0xFD,0xFA,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x45,0xC4,0xF0, ++0x00,0x45,0xC4,0xF0, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x00,0x45,0xB5,0x60, ++0xFF,0xFF,0xFF,0xFF, ++0x00,0x00,0x00,0x02, ++0x00,0x00,0x00,0x00, ++0x00,0x00,0x00,0x00, ++0x08,0xFB,0x90,0xB8, ++0xFF,0xFF,0xFF,0xFF, ++}; +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/h2clbk.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/h2clbk.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,35 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _H2CLBK_H_ ++ ++ ++#include ++#include ++ ++ ++void _lbk_cmd(PADAPTER Adapter); ++ ++void _lbk_rsp(PADAPTER Adapter); ++ ++void _lbk_evt(IN PADAPTER Adapter); ++ ++void h2c_event_callback(unsigned char *dev, unsigned char *pbuf); +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/hal_init.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/hal_init.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,305 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __HAL_INIT_H__ ++#define __HAL_INIT_H__ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++ ++enum RTL871X_HCI_TYPE { ++ ++ RTW_SDIO, ++ RTW_USB, ++ RTW_PCIE ++}; ++ ++enum _CHIP_TYPE { ++ ++ NULL_CHIP_TYPE, ++ RTL8712_8188S_8191S_8192S, ++ RTL8188C_8192C, ++ RTL8192D, ++ MAX_CHIP_TYPE ++}; ++ ++ ++typedef enum _HW_VARIABLES{ ++ HW_VAR_MEDIA_STATUS, ++ HW_VAR_MEDIA_STATUS1, ++ HW_VAR_SET_OPMODE, ++ HW_VAR_MAC_ADDR, ++ HW_VAR_BSSID, ++ HW_VAR_INIT_RTS_RATE, ++ HW_VAR_BASIC_RATE, ++ HW_VAR_TXPAUSE, ++ HW_VAR_BCN_FUNC, ++ HW_VAR_CORRECT_TSF, ++ HW_VAR_CHECK_BSSID, ++ HW_VAR_MLME_DISCONNECT, ++ HW_VAR_MLME_SITESURVEY, ++ HW_VAR_MLME_JOIN, ++ HW_VAR_BEACON_INTERVAL, ++ HW_VAR_SLOT_TIME, ++ HW_VAR_SIFS, ++ HW_VAR_ACK_PREAMBLE, ++ HW_VAR_SEC_CFG, ++ HW_VAR_TX_BCN_DONE, ++ HW_VAR_RF_TYPE, ++ HW_VAR_DM_FLAG, ++ HW_VAR_DM_FUNC_OP, ++ HW_VAR_DM_FUNC_SET, ++ HW_VAR_DM_FUNC_CLR, ++ HW_VAR_CAM_EMPTY_ENTRY, ++ HW_VAR_CAM_INVALID_ALL, ++ HW_VAR_CAM_WRITE, ++ HW_VAR_AC_PARAM_VO, ++ HW_VAR_AC_PARAM_VI, ++ HW_VAR_AC_PARAM_BE, ++ HW_VAR_AC_PARAM_BK, ++ HW_VAR_ACM_CTRL, ++ HW_VAR_AMPDU_MIN_SPACE, ++ HW_VAR_AMPDU_FACTOR, ++ HW_VAR_RXDMA_AGG_PG_TH, ++ HW_VAR_SET_RPWM, ++ HW_VAR_H2C_FW_PWRMODE, ++ HW_VAR_H2C_FW_JOINBSSRPT, ++ HW_VAR_FWLPS_RF_ON, ++ HW_VAR_H2C_FW_P2P_PS_OFFLOAD, ++ HW_VAR_TDLS_WRCR, ++ HW_VAR_TDLS_INIT_CH_SEN, ++ HW_VAR_TDLS_RS_RCR, ++ HW_VAR_TDLS_DONE_CH_SEN, ++ HW_VAR_INITIAL_GAIN, ++ HW_VAR_TRIGGER_GPIO_0, ++ HW_VAR_BT_SET_COEXIST, ++ HW_VAR_BT_ISSUE_DELBA, ++ HW_VAR_CURRENT_ANTENNA, ++ HW_VAR_ANTENNA_DIVERSITY_LINK, ++ HW_VAR_ANTENNA_DIVERSITY_SELECT, ++ HW_VAR_SWITCH_EPHY_WoWLAN, ++ HW_VAR_EFUSE_BYTES, ++ HW_VAR_FIFO_CLEARN_UP, ++ HW_VAR_CHECK_TXBUF, ++ HW_VAR_APFM_ON_MAC, //Auto FSM to Turn On, include clock, isolation, power control for MAC only HW_VAR_WOWLAN,}HW_VARIABLES; ++ HW_VAR_WOWLAN, ++}HW_VARIABLES; ++ ++typedef enum _HAL_DEF_VARIABLE{ ++ HAL_DEF_UNDERCORATEDSMOOTHEDPWDB, ++ HAL_DEF_IS_SUPPORT_ANT_DIV, ++ HAL_DEF_CURRENT_ANTENNA, ++ HAL_DEF_DRVINFO_SZ, ++ HAL_DEF_MAX_RECVBUF_SZ, ++ HAL_DEF_RX_PACKET_OFFSET, ++ HAL_DEF_DBG_DUMP_RXPKT,//for dbg ++ HAL_DEF_DBG_DM_FUNC,//for dbg ++}HAL_DEF_VARIABLE; ++ ++typedef enum _HAL_INTF_PS_FUNC{ ++ HAL_USB_SELECT_SUSPEND, ++ HAL_MAX_ID, ++}HAL_INTF_PS_FUNC; ++ ++struct hal_ops { ++ u32 (*hal_init)(PADAPTER Adapter); ++ u32 (*hal_deinit)(PADAPTER Adapter); ++ ++ void (*free_hal_data)(PADAPTER Adapter); ++ ++ u32 (*inirp_init)(PADAPTER Adapter); ++ u32 (*inirp_deinit)(PADAPTER Adapter); ++ ++ s32 (*init_xmit_priv)(PADAPTER Adapter); ++ void (*free_xmit_priv)(PADAPTER Adapter); ++ ++ s32 (*init_recv_priv)(PADAPTER Adapter); ++ void (*free_recv_priv)(PADAPTER Adapter); ++ ++ void (*InitSwLeds)(PADAPTER Adapter); ++ void (*DeInitSwLeds)(PADAPTER Adapter); ++ ++ void (*dm_init)(PADAPTER Adapter); ++ void (*dm_deinit)(PADAPTER Adapter); ++ void (*read_chip_version)(PADAPTER Adapter); ++ ++ void (*init_default_value)(PADAPTER Adapter); ++ ++ void (*intf_chip_configure)(PADAPTER Adapter); ++ ++ void (*read_adapter_info)(PADAPTER Adapter); ++ ++ void (*enable_interrupt)(PADAPTER Adapter); ++ void (*disable_interrupt)(PADAPTER Adapter); ++ s32 (*interrupt_handler)(PADAPTER Adapter); ++ ++ void (*set_bwmode_handler)(PADAPTER Adapter, HT_CHANNEL_WIDTH Bandwidth, u8 Offset); ++ void (*set_channel_handler)(PADAPTER Adapter, u8 channel); ++ ++ void (*hal_dm_watchdog)(PADAPTER Adapter); ++ ++ void (*SetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val); ++ void (*GetHwRegHandler)(PADAPTER Adapter, u8 variable,u8* val); ++ ++ u8 (*GetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++ u8 (*SetHalDefVarHandler)(PADAPTER Adapter, HAL_DEF_VARIABLE eVariable, PVOID pValue); ++ ++ void (*UpdateRAMaskHandler)(PADAPTER Adapter, u32 mac_id); ++ void (*SetBeaconRelatedRegistersHandler)(PADAPTER Adapter); ++ ++ void (*Add_RateATid)(PADAPTER Adapter, u32 bitmap, u8 arg, u8 mac_id); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ u8 (*SwAntDivBeforeLinkHandler)(PADAPTER Adapter); ++ void (*SwAntDivCompareHandler)(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); ++#endif ++ u8 (*interface_ps_func)(PADAPTER Adapter,HAL_INTF_PS_FUNC efunc_id, u8* val); ++ ++ s32 (*hal_xmit)(PADAPTER Adapter, struct xmit_frame *pxmitframe); ++ void (*mgnt_xmit)(PADAPTER Adapter, struct xmit_frame *pmgntframe); ++ ++ u32 (*read_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask); ++ void (*write_bbreg)(PADAPTER Adapter, u32 RegAddr, u32 BitMask, u32 Data); ++ u32 (*read_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask); ++ void (*write_rfreg)(PADAPTER Adapter, u32 eRFPath, u32 RegAddr, u32 BitMask, u32 Data); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ s32 (*hostap_mgnt_xmit_entry)(PADAPTER Adapter, _pkt *pkt); ++#endif ++ void (*EfusePowerSwitch)(PADAPTER pAdapter, u8 bWrite, u8 PwrState); ++ void (*ReadEFuse)(PADAPTER Adapter, u8 efuseType, u16 _offset, u16 _size_byte, u8 *pbuf, BOOLEAN bPseudoTest); ++ void (*EFUSEGetEfuseDefinition)(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest); ++ u16 (*EfuseGetCurrentSize)(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++ int (*Efuse_PgPacketRead)(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); ++ int (*Efuse_PgPacketWrite)(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ u8 (*Efuse_WordEnableDataWrite)(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ void (*sreset_init_value)(_adapter *padapter); ++ void (*sreset_reset_value)(_adapter *padapter); ++ void (*silentreset)(_adapter *padapter); ++ void (*sreset_xmit_status_check)(_adapter *padapter); ++ void (*sreset_linked_status_check) (_adapter *padapter); ++ u8 (*sreset_get_wifi_status)(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_IOL ++ int (*IOL_exec_cmds_sync)(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++#endif ++}; ++ ++typedef enum _RT_EEPROM_TYPE{ ++ EEPROM_93C46, ++ EEPROM_93C56, ++ EEPROM_BOOT_EFUSE, ++}RT_EEPROM_TYPE,*PRT_EEPROM_TYPE; ++ ++#define USB_HIGH_SPEED_BULK_SIZE 512 ++#define USB_FULL_SPEED_BULK_SIZE 64 ++ ++#define RF_CHANGE_BY_INIT 0 ++#define RF_CHANGE_BY_IPS BIT28 ++#define RF_CHANGE_BY_PS BIT29 ++#define RF_CHANGE_BY_HW BIT30 ++#define RF_CHANGE_BY_SW BIT31 ++ ++typedef enum _HARDWARE_TYPE{ ++ HARDWARE_TYPE_RTL8180, ++ HARDWARE_TYPE_RTL8185, ++ HARDWARE_TYPE_RTL8187, ++ HARDWARE_TYPE_RTL8188, ++ HARDWARE_TYPE_RTL8190P, ++ HARDWARE_TYPE_RTL8192E, ++ HARDWARE_TYPE_RTL819xU, ++ HARDWARE_TYPE_RTL8192SE, ++ HARDWARE_TYPE_RTL8192SU, ++ HARDWARE_TYPE_RTL8192CE, ++ HARDWARE_TYPE_RTL8192CU, ++ HARDWARE_TYPE_RTL8192DE, ++ HARDWARE_TYPE_RTL8192DU, ++ HARDWARE_TYPE_RTL8723E, ++ HARDWARE_TYPE_RTL8723U, ++}HARDWARE_TYPE; ++ ++#define IS_HARDWARE_TYPE_8192CE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CE) ++#define IS_HARDWARE_TYPE_8192CU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192CU) ++ ++#define IS_HARDWARE_TYPE_8192DE(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DE) ++#define IS_HARDWARE_TYPE_8192DU(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8192DU) ++ ++#define IS_HARDWARE_TYPE_8723E(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723E) ++#define IS_HARDWARE_TYPE_8723U(_Adapter) (((PADAPTER)_Adapter)->HardwareType==HARDWARE_TYPE_RTL8723U) ++ ++#define IS_HARDWARE_TYPE_8192C(_Adapter) \ ++(IS_HARDWARE_TYPE_8192CE(_Adapter) || IS_HARDWARE_TYPE_8192CU(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_8192D(_Adapter) \ ++(IS_HARDWARE_TYPE_8192DE(_Adapter) || IS_HARDWARE_TYPE_8192DU(_Adapter)) ++ ++#define IS_HARDWARE_TYPE_8723(_Adapter) \ ++(IS_HARDWARE_TYPE_8723E(_Adapter) || IS_HARDWARE_TYPE_8723U(_Adapter)) ++ ++ ++typedef struct eeprom_priv EEPROM_EFUSE_PRIV, *PEEPROM_EFUSE_PRIV; ++#define GET_EEPROM_EFUSE_PRIV(priv) (&priv->eeprompriv) ++ ++typedef enum _wowlan_subcode{ ++ WOWLAN_PATTERN_MATCH = 1, ++ WOWLAN_MAGIC_PACKET = 2, ++ WOWLAN_UNICAST = 3, ++ WOWLAN_SET_PATTERN = 4, ++ WOWLAN_DUMP_REG = 5, ++ WOWLAN_ENABLE = 6, ++ WOWLAN_DISABLE = 7, ++ WOWLAN_STATUS = 8, ++ WOWLAN_DEBUG_RELOAD_FW = 9, ++ WOWLAN_DEBUG_1 =10, ++ WOWLAN_DEBUG_2 =11 ++}wowlan_subcode; ++ ++struct wowlan_ioctl_param{ ++ unsigned int subcode; ++ unsigned int subcode_value; ++ unsigned int wakeup_reason; ++ unsigned int len; ++ unsigned char pattern[0]; ++}; ++void rtw_dm_init(_adapter *padapter); ++void rtw_sw_led_init(_adapter *padapter); ++void rtw_sw_led_deinit(_adapter *padapter); ++ ++uint rtw_hal_init(_adapter *padapter); ++uint rtw_hal_deinit(_adapter *padapter); ++void rtw_hal_stop(_adapter *padapter); ++ ++void intf_chip_configure(_adapter *padapter); ++void intf_read_chip_info(_adapter *padapter); ++void intf_read_chip_version(_adapter *padapter); ++#ifdef DBG_CONFIG_ERROR_DETECT ++void rtw_sreset_init(_adapter *padapter); ++#endif ++ ++#endif //__HAL_INIT_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ieee80211.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ieee80211.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1461 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IEEE80211_H ++#define __IEEE80211_H ++ ++ ++#ifndef CONFIG_RTL8711FW ++ ++ #include ++ #include ++ #include ++ #include "wifi.h" ++ ++ #if defined PLATFORM_OS_XP ++ #include ++ #endif ++ #if defined PLATFORM_LINUX ++ #include ++ #endif ++#else ++ ++ #include ++ ++#endif ++ ++#define MGMT_QUEUE_NUM 5 ++ ++#define ETH_ALEN 6 ++ ++#ifdef CONFIG_AP_MODE ++ ++#define RTL_IOCTL_HOSTAPD (SIOCIWFIRSTPRIV + 28) ++ ++/* RTL871X_IOCTL_HOSTAPD ioctl() cmd: */ ++enum { ++ RTL871X_HOSTAPD_FLUSH = 1, ++ RTL871X_HOSTAPD_ADD_STA = 2, ++ RTL871X_HOSTAPD_REMOVE_STA = 3, ++ RTL871X_HOSTAPD_GET_INFO_STA = 4, ++ /* REMOVED: PRISM2_HOSTAPD_RESET_TXEXC_STA = 5, */ ++ RTL871X_HOSTAPD_GET_WPAIE_STA = 5, ++ RTL871X_SET_ENCRYPTION = 6, ++ RTL871X_GET_ENCRYPTION = 7, ++ RTL871X_HOSTAPD_SET_FLAGS_STA = 8, ++ RTL871X_HOSTAPD_GET_RID = 9, ++ RTL871X_HOSTAPD_SET_RID = 10, ++ RTL871X_HOSTAPD_SET_ASSOC_AP_ADDR = 11, ++ RTL871X_HOSTAPD_SET_GENERIC_ELEMENT = 12, ++ RTL871X_HOSTAPD_MLME = 13, ++ RTL871X_HOSTAPD_SCAN_REQ = 14, ++ RTL871X_HOSTAPD_STA_CLEAR_STATS = 15, ++ RTL871X_HOSTAPD_SET_BEACON=16, ++ RTL871X_HOSTAPD_SET_WPS_BEACON = 17, ++ RTL871X_HOSTAPD_SET_WPS_PROBE_RESP = 18, ++ RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP = 19, ++ RTL871X_HOSTAPD_SET_HIDDEN_SSID = 20, ++}; ++ ++/* STA flags */ ++#define WLAN_STA_AUTH BIT(0) ++#define WLAN_STA_ASSOC BIT(1) ++#define WLAN_STA_PS BIT(2) ++#define WLAN_STA_TIM BIT(3) ++#define WLAN_STA_PERM BIT(4) ++#define WLAN_STA_AUTHORIZED BIT(5) ++#define WLAN_STA_PENDING_POLL BIT(6) /* pending activity poll not ACKed */ ++#define WLAN_STA_SHORT_PREAMBLE BIT(7) ++#define WLAN_STA_PREAUTH BIT(8) ++#define WLAN_STA_WME BIT(9) ++#define WLAN_STA_MFP BIT(10) ++#define WLAN_STA_HT BIT(11) ++#define WLAN_STA_WPS BIT(12) ++#define WLAN_STA_MAYBE_WPS BIT(13) ++#define WLAN_STA_NONERP BIT(31) ++ ++#endif ++ ++#define IEEE_CMD_SET_WPA_PARAM 1 ++#define IEEE_CMD_SET_WPA_IE 2 ++#define IEEE_CMD_SET_ENCRYPTION 3 ++#define IEEE_CMD_MLME 4 ++ ++#define IEEE_PARAM_WPA_ENABLED 1 ++#define IEEE_PARAM_TKIP_COUNTERMEASURES 2 ++#define IEEE_PARAM_DROP_UNENCRYPTED 3 ++#define IEEE_PARAM_PRIVACY_INVOKED 4 ++#define IEEE_PARAM_AUTH_ALGS 5 ++#define IEEE_PARAM_IEEE_802_1X 6 ++#define IEEE_PARAM_WPAX_SELECT 7 ++ ++#define AUTH_ALG_OPEN_SYSTEM 0x1 ++#define AUTH_ALG_SHARED_KEY 0x2 ++#define AUTH_ALG_LEAP 0x00000004 ++ ++#define IEEE_MLME_STA_DEAUTH 1 ++#define IEEE_MLME_STA_DISASSOC 2 ++ ++#define IEEE_CRYPT_ERR_UNKNOWN_ALG 2 ++#define IEEE_CRYPT_ERR_UNKNOWN_ADDR 3 ++#define IEEE_CRYPT_ERR_CRYPT_INIT_FAILED 4 ++#define IEEE_CRYPT_ERR_KEY_SET_FAILED 5 ++#define IEEE_CRYPT_ERR_TX_KEY_SET_FAILED 6 ++#define IEEE_CRYPT_ERR_CARD_CONF_FAILED 7 ++ ++ ++#define IEEE_CRYPT_ALG_NAME_LEN 16 ++ ++#define WPA_CIPHER_NONE BIT(0) ++#define WPA_CIPHER_WEP40 BIT(1) ++#define WPA_CIPHER_WEP104 BIT(2) ++#define WPA_CIPHER_TKIP BIT(3) ++#define WPA_CIPHER_CCMP BIT(4) ++ ++ ++ ++#define WPA_SELECTOR_LEN 4 ++static u8 WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; ++static u16 WPA_VERSION = 1; ++static u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++static u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 }; ++static u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 }; ++static u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++static u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 }; ++static u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 }; ++//static u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 }; ++static u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; ++static u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; ++ ++ ++#define RSN_HEADER_LEN 4 ++#define RSN_SELECTOR_LEN 4 ++static u16 RSN_VERSION = 1; ++static u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 }; ++static u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 }; ++static u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; ++static u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; ++static u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; ++//static u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; ++static u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; ++static u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; ++ ++ ++enum NETWORK_TYPE ++{ ++ WIRELESS_INVALID = 0, ++ //Sub-Element ++ WIRELESS_11B = BIT(0), // tx: cck only , rx: cck only, hw: cck ++ WIRELESS_11G = BIT(1), // tx: ofdm only, rx: ofdm & cck, hw: cck & ofdm ++ WIRELESS_11A = BIT(2), // tx: ofdm only, rx: ofdm only, hw: ofdm only ++ WIRELESS_11_24N = BIT(3), // tx: MCS only, rx: MCS & cck, hw: MCS & cck ++ WIRELESS_11_5N = BIT(4), // tx: MCS only, rx: MCS & ofdm, hw: ofdm only ++ ++ //Combination ++ WIRELESS_11BG = (WIRELESS_11B|WIRELESS_11G), // tx: cck & ofdm, rx: cck & ofdm & MCS, hw: cck & ofdm ++ WIRELESS_11G_24N = (WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & MCS, rx: ofdm & cck & MCS, hw: cck & ofdm ++ WIRELESS_11A_5N = (WIRELESS_11A|WIRELESS_11_5N), // tx: ofdm & MCS, rx: ofdm & MCS, hw: ofdm only ++ WIRELESS_11BG_24N = (WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N), // tx: ofdm & cck & MCS, rx: ofdm & cck & MCS, hw: ofdm & cck ++ WIRELESS_11ABGN = (WIRELESS_11A|WIRELESS_11B|WIRELESS_11G|WIRELESS_11_24N|WIRELESS_11_5N), ++}; ++ ++#define SUPPORTED_24G_NETTYPE_MSK (WIRELESS_11B | WIRELESS_11G | WIRELESS_11_24N) ++#define SUPPORTED_5G_NETTYPE_MSK (WIRELESS_11A | WIRELESS_11_5N) ++ ++#define IsSupported24G(NetType) ((NetType) & SUPPORTED_24G_NETTYPE_MSK ? _TRUE : _FALSE) ++#define IsSupported5G(NetType) ((NetType) & SUPPORTED_5G_NETTYPE_MSK ? _TRUE : _FALSE) ++ ++#define IsEnableHWCCK(NetType) IsSupported24G(NetType) ++#define IsEnableHWOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11_24N|SUPPORTED_5G_NETTYPE_MSK) ? _TRUE : _FALSE) ++ ++#define IsSupportedRxCCK(NetType) IsEnableHWCCK(NetType) ++#define IsSupportedRxOFDM(NetType) IsEnableHWOFDM(NetType) ++#define IsSupportedRxMCS(NetType) IsEnableHWOFDM(NetType) ++ ++#define IsSupportedTxCCK(NetType) ((NetType) & (WIRELESS_11B) ? _TRUE : _FALSE) ++#define IsSupportedTxOFDM(NetType) ((NetType) & (WIRELESS_11G|WIRELESS_11A) ? _TRUE : _FALSE) ++#define IsSupportedTxMCS(NetType) ((NetType) & (WIRELESS_11_24N|WIRELESS_11_5N) ? _TRUE : _FALSE) ++ ++ ++typedef struct ieee_param { ++ u32 cmd; ++ u8 sta_addr[ETH_ALEN]; ++ union { ++ struct { ++ u8 name; ++ u32 value; ++ } wpa_param; ++ struct { ++ u32 len; ++ u8 reserved[32]; ++ u8 data[0]; ++ } wpa_ie; ++ struct{ ++ int command; ++ int reason_code; ++ } mlme; ++ struct { ++ u8 alg[IEEE_CRYPT_ALG_NAME_LEN]; ++ u8 set_tx; ++ u32 err; ++ u8 idx; ++ u8 seq[8]; /* sequence counter (set: RX, get: TX) */ ++ u16 key_len; ++ u8 key[0]; ++ } crypt; ++#ifdef CONFIG_AP_MODE ++ struct { ++ u16 aid; ++ u16 capability; ++ int flags; ++ u8 tx_supp_rates[16]; ++ struct rtw_ieee80211_ht_cap ht_cap; ++ } add_sta; ++ struct { ++ u8 reserved[2];//for set max_num_sta ++ u8 buf[0]; ++ } bcn_ie; ++#endif ++ ++ } u; ++}ieee_param; ++ ++ ++#if WIRELESS_EXT < 17 ++#define IW_QUAL_QUAL_INVALID 0x10 ++#define IW_QUAL_LEVEL_INVALID 0x20 ++#define IW_QUAL_NOISE_INVALID 0x40 ++#define IW_QUAL_QUAL_UPDATED 0x1 ++#define IW_QUAL_LEVEL_UPDATED 0x2 ++#define IW_QUAL_NOISE_UPDATED 0x4 ++#endif ++ ++#define IEEE80211_DATA_LEN 2304 ++/* Maximum size for the MA-UNITDATA primitive, 802.11 standard section ++ 6.2.1.1.2. ++ ++ The figure in section 7.1.2 suggests a body size of up to 2312 ++ bytes is allowed, which is a bit confusing, I suspect this ++ represents the 2304 bytes of real data, plus a possible 8 bytes of ++ WEP IV and ICV. (this interpretation suggested by Ramiro Barreiro) */ ++ ++ ++#define IEEE80211_HLEN 30 ++#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN) ++ ++ ++/* this is stolen from ipw2200 driver */ ++#define IEEE_IBSS_MAC_HASH_SIZE 31 ++ ++struct ieee_ibss_seq { ++ u8 mac[ETH_ALEN]; ++ u16 seq_num; ++ u16 frag_num; ++ unsigned long packet_time; ++ _list list; ++}; ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct rtw_ieee80211_hdr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++} __attribute__ ((packed)); ++ ++struct rtw_ieee80211_hdr_3addr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++} __attribute__ ((packed)); ++ ++ ++struct rtw_ieee80211_hdr_qos { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++ u16 qc; ++} __attribute__ ((packed)); ++ ++struct rtw_ieee80211_hdr_3addr_qos { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u16 qc; ++} __attribute__ ((packed)); ++ ++struct eapol { ++ u8 snap[6]; ++ u16 ethertype; ++ u8 version; ++ u8 type; ++ u16 length; ++} __attribute__ ((packed)); ++ ++#endif ++ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct rtw_ieee80211_hdr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++ u8 addr4[ETH_ALEN]; ++}; ++ ++struct rtw_ieee80211_hdr_3addr { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[ETH_ALEN]; ++ u8 addr2[ETH_ALEN]; ++ u8 addr3[ETH_ALEN]; ++ u16 seq_ctl; ++}; ++ ++ ++struct rtw_ieee80211_hdr_qos { ++ struct rtw_ieee80211_hdr wlan_hdr; ++ u16 qc; ++}; ++ ++struct rtw_ieee80211_hdr_3addr_qos { ++ struct rtw_ieee80211_hdr_3addr wlan_hdr; ++ u16 qc; ++}; ++ ++struct eapol { ++ u8 snap[6]; ++ u16 ethertype; ++ u8 version; ++ u8 type; ++ u16 length; ++}; ++#pragma pack() ++ ++#endif ++ ++ ++ ++enum eap_type { ++ EAP_PACKET = 0, ++ EAPOL_START, ++ EAPOL_LOGOFF, ++ EAPOL_KEY, ++ EAPOL_ENCAP_ASF_ALERT ++}; ++ ++#define IEEE80211_3ADDR_LEN 24 ++#define IEEE80211_4ADDR_LEN 30 ++#define IEEE80211_FCS_LEN 4 ++ ++#define MIN_FRAG_THRESHOLD 256U ++#define MAX_FRAG_THRESHOLD 2346U ++ ++/* Frame control field constants */ ++#define RTW_IEEE80211_FCTL_VERS 0x0002 ++#define RTW_IEEE80211_FCTL_FTYPE 0x000c ++#define RTW_IEEE80211_FCTL_STYPE 0x00f0 ++#define RTW_IEEE80211_FCTL_TODS 0x0100 ++#define RTW_IEEE80211_FCTL_FROMDS 0x0200 ++#define RTW_IEEE80211_FCTL_MOREFRAGS 0x0400 ++#define RTW_IEEE80211_FCTL_RETRY 0x0800 ++#define RTW_IEEE80211_FCTL_PM 0x1000 ++#define RTW_IEEE80211_FCTL_MOREDATA 0x2000 ++#define RTW_IEEE80211_FCTL_WEP 0x4000 ++#define RTW_IEEE80211_FCTL_ORDER 0x8000 ++ ++#define RTW_IEEE80211_FTYPE_MGMT 0x0000 ++#define RTW_IEEE80211_FTYPE_CTL 0x0004 ++#define RTW_IEEE80211_FTYPE_DATA 0x0008 ++ ++/* management */ ++#define RTW_IEEE80211_STYPE_ASSOC_REQ 0x0000 ++#define RTW_IEEE80211_STYPE_ASSOC_RESP 0x0010 ++#define RTW_IEEE80211_STYPE_REASSOC_REQ 0x0020 ++#define RTW_IEEE80211_STYPE_REASSOC_RESP 0x0030 ++#define RTW_IEEE80211_STYPE_PROBE_REQ 0x0040 ++#define RTW_IEEE80211_STYPE_PROBE_RESP 0x0050 ++#define RTW_IEEE80211_STYPE_BEACON 0x0080 ++#define RTW_IEEE80211_STYPE_ATIM 0x0090 ++#define RTW_IEEE80211_STYPE_DISASSOC 0x00A0 ++#define RTW_IEEE80211_STYPE_AUTH 0x00B0 ++#define RTW_IEEE80211_STYPE_DEAUTH 0x00C0 ++ ++/* control */ ++#define RTW_IEEE80211_STYPE_PSPOLL 0x00A0 ++#define RTW_IEEE80211_STYPE_RTS 0x00B0 ++#define RTW_IEEE80211_STYPE_CTS 0x00C0 ++#define RTW_IEEE80211_STYPE_ACK 0x00D0 ++#define RTW_IEEE80211_STYPE_CFEND 0x00E0 ++#define RTW_IEEE80211_STYPE_CFENDACK 0x00F0 ++ ++/* data */ ++#define RTW_IEEE80211_STYPE_DATA 0x0000 ++#define RTW_IEEE80211_STYPE_DATA_CFACK 0x0010 ++#define RTW_IEEE80211_STYPE_DATA_CFPOLL 0x0020 ++#define RTW_IEEE80211_STYPE_DATA_CFACKPOLL 0x0030 ++#define RTW_IEEE80211_STYPE_NULLFUNC 0x0040 ++#define RTW_IEEE80211_STYPE_CFACK 0x0050 ++#define RTW_IEEE80211_STYPE_CFPOLL 0x0060 ++#define RTW_IEEE80211_STYPE_CFACKPOLL 0x0070 ++#define RTW_IEEE80211_QOS_DATAGRP 0x0080 ++#define RTW_IEEE80211_QoS_DATAGRP RTW_IEEE80211_QOS_DATAGRP ++ ++#define RTW_IEEE80211_SCTL_FRAG 0x000F ++#define RTW_IEEE80211_SCTL_SEQ 0xFFF0 ++ ++/* QoS,QOS */ ++#define NORMAL_ACK 0 ++#define NO_ACK 1 ++#define NON_EXPLICIT_ACK 2 ++#define BLOCK_ACK 3 ++ ++#ifndef ETH_P_PAE ++#define ETH_P_PAE 0x888E /* Port Access Entity (IEEE 802.1X) */ ++#endif /* ETH_P_PAE */ ++ ++#define ETH_P_PREAUTH 0x88C7 /* IEEE 802.11i pre-authentication */ ++ ++#define ETH_P_ECONET 0x0018 ++ ++#ifndef ETH_P_80211_RAW ++#define ETH_P_80211_RAW (ETH_P_ECONET + 1) ++#endif ++ ++/* IEEE 802.11 defines */ ++ ++#define P80211_OUI_LEN 3 ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct ieee80211_snap_hdr { ++ ++ u8 dsap; /* always 0xAA */ ++ u8 ssap; /* always 0xAA */ ++ u8 ctrl; /* always 0x03 */ ++ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_snap_hdr { ++ ++ u8 dsap; /* always 0xAA */ ++ u8 ssap; /* always 0xAA */ ++ u8 ctrl; /* always 0x03 */ ++ u8 oui[P80211_OUI_LEN]; /* organizational universal id */ ++ ++}; ++#pragma pack() ++ ++#endif ++ ++ ++#define SNAP_SIZE sizeof(struct ieee80211_snap_hdr) ++ ++#define WLAN_FC_GET_TYPE(fc) ((fc) & RTW_IEEE80211_FCTL_FTYPE) ++#define WLAN_FC_GET_STYPE(fc) ((fc) & RTW_IEEE80211_FCTL_STYPE) ++ ++#define WLAN_QC_GET_TID(qc) ((qc) & 0x0f) ++ ++#define WLAN_GET_SEQ_FRAG(seq) ((seq) & RTW_IEEE80211_SCTL_FRAG) ++#define WLAN_GET_SEQ_SEQ(seq) ((seq) & RTW_IEEE80211_SCTL_SEQ) ++ ++/* Authentication algorithms */ ++#define WLAN_AUTH_OPEN 0 ++#define WLAN_AUTH_SHARED_KEY 1 ++ ++#define WLAN_AUTH_CHALLENGE_LEN 128 ++ ++#define WLAN_CAPABILITY_BSS (1<<0) ++#define WLAN_CAPABILITY_IBSS (1<<1) ++#define WLAN_CAPABILITY_CF_POLLABLE (1<<2) ++#define WLAN_CAPABILITY_CF_POLL_REQUEST (1<<3) ++#define WLAN_CAPABILITY_PRIVACY (1<<4) ++#define WLAN_CAPABILITY_SHORT_PREAMBLE (1<<5) ++#define WLAN_CAPABILITY_PBCC (1<<6) ++#define WLAN_CAPABILITY_CHANNEL_AGILITY (1<<7) ++#define WLAN_CAPABILITY_SHORT_SLOT (1<<10) ++ ++/* Status codes */ ++#define WLAN_STATUS_SUCCESS 0 ++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 ++#define WLAN_STATUS_CAPS_UNSUPPORTED 10 ++#define WLAN_STATUS_REASSOC_NO_ASSOC 11 ++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 ++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 ++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 ++#define WLAN_STATUS_CHALLENGE_FAIL 15 ++#define WLAN_STATUS_AUTH_TIMEOUT 16 ++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 ++#define WLAN_STATUS_ASSOC_DENIED_RATES 18 ++/* 802.11b */ ++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 ++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 ++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 ++ ++/* Reason codes */ ++#define WLAN_REASON_UNSPECIFIED 1 ++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 ++#define WLAN_REASON_DEAUTH_LEAVING 3 ++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 ++#define WLAN_REASON_DISASSOC_AP_BUSY 5 ++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 ++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 ++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 ++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 ++#define WLAN_REASON_JOIN_WRONG_CHANNEL 65534 ++ ++/* Information Element IDs */ ++#define WLAN_EID_SSID 0 ++#define WLAN_EID_SUPP_RATES 1 ++#define WLAN_EID_FH_PARAMS 2 ++#define WLAN_EID_DS_PARAMS 3 ++#define WLAN_EID_CF_PARAMS 4 ++#define WLAN_EID_TIM 5 ++#define WLAN_EID_IBSS_PARAMS 6 ++#define WLAN_EID_CHALLENGE 16 ++/* EIDs defined by IEEE 802.11h - START */ ++#define WLAN_EID_PWR_CONSTRAINT 32 ++#define WLAN_EID_PWR_CAPABILITY 33 ++#define WLAN_EID_TPC_REQUEST 34 ++#define WLAN_EID_TPC_REPORT 35 ++#define WLAN_EID_SUPPORTED_CHANNELS 36 ++#define WLAN_EID_CHANNEL_SWITCH 37 ++#define WLAN_EID_MEASURE_REQUEST 38 ++#define WLAN_EID_MEASURE_REPORT 39 ++#define WLAN_EID_QUITE 40 ++#define WLAN_EID_IBSS_DFS 41 ++/* EIDs defined by IEEE 802.11h - END */ ++#define WLAN_EID_ERP_INFO 42 ++#define WLAN_EID_HT_CAP 45 ++#define WLAN_EID_RSN 48 ++#define WLAN_EID_EXT_SUPP_RATES 50 ++#define WLAN_EID_MOBILITY_DOMAIN 54 ++#define WLAN_EID_FAST_BSS_TRANSITION 55 ++#define WLAN_EID_TIMEOUT_INTERVAL 56 ++#define WLAN_EID_RIC_DATA 57 ++#define WLAN_EID_HT_OPERATION 61 ++#define WLAN_EID_SECONDARY_CHANNEL_OFFSET 62 ++#define WLAN_EID_20_40_BSS_COEXISTENCE 72 ++#define WLAN_EID_20_40_BSS_INTOLERANT 73 ++#define WLAN_EID_OVERLAPPING_BSS_SCAN_PARAMS 74 ++#define WLAN_EID_MMIE 76 ++#define WLAN_EID_VENDOR_SPECIFIC 221 ++#define WLAN_EID_GENERIC (WLAN_EID_VENDOR_SPECIFIC) ++ ++#define IEEE80211_MGMT_HDR_LEN 24 ++#define IEEE80211_DATA_HDR3_LEN 24 ++#define IEEE80211_DATA_HDR4_LEN 30 ++ ++ ++#define IEEE80211_STATMASK_SIGNAL (1<<0) ++#define IEEE80211_STATMASK_RSSI (1<<1) ++#define IEEE80211_STATMASK_NOISE (1<<2) ++#define IEEE80211_STATMASK_RATE (1<<3) ++#define IEEE80211_STATMASK_WEMASK 0x7 ++ ++ ++#define IEEE80211_CCK_MODULATION (1<<0) ++#define IEEE80211_OFDM_MODULATION (1<<1) ++ ++#define IEEE80211_24GHZ_BAND (1<<0) ++#define IEEE80211_52GHZ_BAND (1<<1) ++ ++#define IEEE80211_CCK_RATE_LEN 4 ++#define IEEE80211_NUM_OFDM_RATESLEN 8 ++ ++ ++#define IEEE80211_CCK_RATE_1MB 0x02 ++#define IEEE80211_CCK_RATE_2MB 0x04 ++#define IEEE80211_CCK_RATE_5MB 0x0B ++#define IEEE80211_CCK_RATE_11MB 0x16 ++#define IEEE80211_OFDM_RATE_LEN 8 ++#define IEEE80211_OFDM_RATE_6MB 0x0C ++#define IEEE80211_OFDM_RATE_9MB 0x12 ++#define IEEE80211_OFDM_RATE_12MB 0x18 ++#define IEEE80211_OFDM_RATE_18MB 0x24 ++#define IEEE80211_OFDM_RATE_24MB 0x30 ++#define IEEE80211_OFDM_RATE_36MB 0x48 ++#define IEEE80211_OFDM_RATE_48MB 0x60 ++#define IEEE80211_OFDM_RATE_54MB 0x6C ++#define IEEE80211_BASIC_RATE_MASK 0x80 ++ ++#define IEEE80211_CCK_RATE_1MB_MASK (1<<0) ++#define IEEE80211_CCK_RATE_2MB_MASK (1<<1) ++#define IEEE80211_CCK_RATE_5MB_MASK (1<<2) ++#define IEEE80211_CCK_RATE_11MB_MASK (1<<3) ++#define IEEE80211_OFDM_RATE_6MB_MASK (1<<4) ++#define IEEE80211_OFDM_RATE_9MB_MASK (1<<5) ++#define IEEE80211_OFDM_RATE_12MB_MASK (1<<6) ++#define IEEE80211_OFDM_RATE_18MB_MASK (1<<7) ++#define IEEE80211_OFDM_RATE_24MB_MASK (1<<8) ++#define IEEE80211_OFDM_RATE_36MB_MASK (1<<9) ++#define IEEE80211_OFDM_RATE_48MB_MASK (1<<10) ++#define IEEE80211_OFDM_RATE_54MB_MASK (1<<11) ++ ++#define IEEE80211_CCK_RATES_MASK 0x0000000F ++#define IEEE80211_CCK_BASIC_RATES_MASK (IEEE80211_CCK_RATE_1MB_MASK | \ ++ IEEE80211_CCK_RATE_2MB_MASK) ++#define IEEE80211_CCK_DEFAULT_RATES_MASK (IEEE80211_CCK_BASIC_RATES_MASK | \ ++ IEEE80211_CCK_RATE_5MB_MASK | \ ++ IEEE80211_CCK_RATE_11MB_MASK) ++ ++#define IEEE80211_OFDM_RATES_MASK 0x00000FF0 ++#define IEEE80211_OFDM_BASIC_RATES_MASK (IEEE80211_OFDM_RATE_6MB_MASK | \ ++ IEEE80211_OFDM_RATE_12MB_MASK | \ ++ IEEE80211_OFDM_RATE_24MB_MASK) ++#define IEEE80211_OFDM_DEFAULT_RATES_MASK (IEEE80211_OFDM_BASIC_RATES_MASK | \ ++ IEEE80211_OFDM_RATE_9MB_MASK | \ ++ IEEE80211_OFDM_RATE_18MB_MASK | \ ++ IEEE80211_OFDM_RATE_36MB_MASK | \ ++ IEEE80211_OFDM_RATE_48MB_MASK | \ ++ IEEE80211_OFDM_RATE_54MB_MASK) ++#define IEEE80211_DEFAULT_RATES_MASK (IEEE80211_OFDM_DEFAULT_RATES_MASK | \ ++ IEEE80211_CCK_DEFAULT_RATES_MASK) ++ ++#define IEEE80211_NUM_OFDM_RATES 8 ++#define IEEE80211_NUM_CCK_RATES 4 ++#define IEEE80211_OFDM_SHIFT_MASK_A 4 ++ ++ ++ ++ ++/* NOTE: This data is for statistical purposes; not all hardware provides this ++ * information for frames received. Not setting these will not cause ++ * any adverse affects. */ ++struct ieee80211_rx_stats { ++ //u32 mac_time[2]; ++ s8 rssi; ++ u8 signal; ++ u8 noise; ++ u8 received_channel; ++ u16 rate; /* in 100 kbps */ ++ //u8 control; ++ u8 mask; ++ u8 freq; ++ u16 len; ++}; ++ ++/* IEEE 802.11 requires that STA supports concurrent reception of at least ++ * three fragmented frames. This define can be increased to support more ++ * concurrent frames, but it should be noted that each entry can consume about ++ * 2 kB of RAM and increasing cache size will slow down frame reassembly. */ ++#define IEEE80211_FRAG_CACHE_LEN 4 ++ ++struct ieee80211_frag_entry { ++ u32 first_frag_time; ++ uint seq; ++ uint last_frag; ++ uint qos; //jackson ++ uint tid; //jackson ++ struct sk_buff *skb; ++ u8 src_addr[ETH_ALEN]; ++ u8 dst_addr[ETH_ALEN]; ++}; ++ ++struct ieee80211_stats { ++ uint tx_unicast_frames; ++ uint tx_multicast_frames; ++ uint tx_fragments; ++ uint tx_unicast_octets; ++ uint tx_multicast_octets; ++ uint tx_deferred_transmissions; ++ uint tx_single_retry_frames; ++ uint tx_multiple_retry_frames; ++ uint tx_retry_limit_exceeded; ++ uint tx_discards; ++ uint rx_unicast_frames; ++ uint rx_multicast_frames; ++ uint rx_fragments; ++ uint rx_unicast_octets; ++ uint rx_multicast_octets; ++ uint rx_fcs_errors; ++ uint rx_discards_no_buffer; ++ uint tx_discards_wrong_sa; ++ uint rx_discards_undecryptable; ++ uint rx_message_in_msg_fragments; ++ uint rx_message_in_bad_msg_fragments; ++}; ++ ++struct ieee80211_softmac_stats{ ++ uint rx_ass_ok; ++ uint rx_ass_err; ++ uint rx_probe_rq; ++ uint tx_probe_rs; ++ uint tx_beacons; ++ uint rx_auth_rq; ++ uint rx_auth_rs_ok; ++ uint rx_auth_rs_err; ++ uint tx_auth_rq; ++ uint no_auth_rs; ++ uint no_ass_rs; ++ uint tx_ass_rq; ++ uint rx_ass_rq; ++ uint tx_probe_rq; ++ uint reassoc; ++ uint swtxstop; ++ uint swtxawake; ++}; ++ ++#define SEC_KEY_1 (1<<0) ++#define SEC_KEY_2 (1<<1) ++#define SEC_KEY_3 (1<<2) ++#define SEC_KEY_4 (1<<3) ++#define SEC_ACTIVE_KEY (1<<4) ++#define SEC_AUTH_MODE (1<<5) ++#define SEC_UNICAST_GROUP (1<<6) ++#define SEC_LEVEL (1<<7) ++#define SEC_ENABLED (1<<8) ++ ++#define SEC_LEVEL_0 0 /* None */ ++#define SEC_LEVEL_1 1 /* WEP 40 and 104 bit */ ++#define SEC_LEVEL_2 2 /* Level 1 + TKIP */ ++#define SEC_LEVEL_2_CKIP 3 /* Level 1 + CKIP */ ++#define SEC_LEVEL_3 4 /* Level 2 + CCMP */ ++ ++#define WEP_KEYS 4 ++#define WEP_KEY_LEN 13 ++ ++ ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct ieee80211_security { ++ u16 active_key:2, ++ enabled:1, ++ auth_mode:2, ++ auth_algo:4, ++ unicast_uses_group:1; ++ u8 key_sizes[WEP_KEYS]; ++ u8 keys[WEP_KEYS][WEP_KEY_LEN]; ++ u8 level; ++ u16 flags; ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_security { ++ u16 active_key:2, ++ enabled:1, ++ auth_mode:2, ++ auth_algo:4, ++ unicast_uses_group:1; ++ u8 key_sizes[WEP_KEYS]; ++ u8 keys[WEP_KEYS][WEP_KEY_LEN]; ++ u8 level; ++ u16 flags; ++} ; ++#pragma pack() ++ ++#endif ++ ++/* ++ ++ 802.11 data frame from AP ++ ++ ,-------------------------------------------------------------------. ++Bytes | 2 | 2 | 6 | 6 | 6 | 2 | 0..2312 | 4 | ++ |------|------|---------|---------|---------|------|---------|------| ++Desc. | ctrl | dura | DA/RA | TA | SA | Sequ | frame | fcs | ++ | | tion | (BSSID) | | | ence | data | | ++ `-------------------------------------------------------------------' ++ ++Total: 28-2340 bytes ++ ++*/ ++ ++struct ieee80211_header_data { ++ u16 frame_ctl; ++ u16 duration_id; ++ u8 addr1[6]; ++ u8 addr2[6]; ++ u8 addr3[6]; ++ u16 seq_ctrl; ++}; ++ ++#define BEACON_PROBE_SSID_ID_POSITION 12 ++ ++/* Management Frame Information Element Types */ ++#define MFIE_TYPE_SSID 0 ++#define MFIE_TYPE_RATES 1 ++#define MFIE_TYPE_FH_SET 2 ++#define MFIE_TYPE_DS_SET 3 ++#define MFIE_TYPE_CF_SET 4 ++#define MFIE_TYPE_TIM 5 ++#define MFIE_TYPE_IBSS_SET 6 ++#define MFIE_TYPE_CHALLENGE 16 ++#define MFIE_TYPE_ERP 42 ++#define MFIE_TYPE_RSN 48 ++#define MFIE_TYPE_RATES_EX 50 ++#define MFIE_TYPE_GENERIC 221 ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++struct ieee80211_info_element_hdr { ++ u8 id; ++ u8 len; ++} __attribute__ ((packed)); ++ ++struct ieee80211_info_element { ++ u8 id; ++ u8 len; ++ u8 data[0]; ++} __attribute__ ((packed)); ++#endif ++ ++#ifdef CONFIG_TDLS ++/* TDLS */ ++#define TDLS_MIC_LEN 16 ++#define WPA_NONCE_LEN 32 ++#define TDLS_TIMEOUT_LEN 4 ++ ++struct wpa_tdls_ftie { ++ u8 ie_type; /* FTIE */ ++ u8 ie_len; ++ u8 mic_ctrl[2]; ++ u8 mic[TDLS_MIC_LEN]; ++ u8 Anonce[WPA_NONCE_LEN]; /* Responder Nonce in TDLS */ ++ u8 Snonce[WPA_NONCE_LEN]; /* Initiator Nonce in TDLS */ ++ /* followed by optional elements */ ++} ; ++ ++struct wpa_tdls_timeoutie { ++ u8 ie_type; /* Timeout IE */ ++ u8 ie_len; ++ u8 interval_type; ++ u8 value[TDLS_TIMEOUT_LEN]; ++} ; ++ ++struct wpa_tdls_lnkid { ++ u8 ie_type; /* Link Identifier IE */ ++ u8 ie_len; ++ u8 bssid[ETH_ALEN]; ++ u8 init_sta[ETH_ALEN]; ++ u8 resp_sta[ETH_ALEN]; ++} ; ++ ++static u8 TDLS_RSNIE[]={ 0x01, 0x00, //version shall be set to 1 ++ 0x00, 0x0f, 0xac, 0x07, //group sipher suite ++ 0x01, 0x00, //pairwise cipher suite count ++ 0x00, 0x0f, 0xac, 0x04, //pairwise cipher suite list; CCMP only ++ 0x01, 0x00, //AKM suite count ++ 0x00, 0x0f, 0xac, 0x07, //TPK Handshake ++ 0x00, 0x02, ++ //PMKID shall not be present ++ }; ++ ++static u8 TDLS_WMMIE[]={0x00, 0x50, 0xf2, 0x02, 0x00, 0x01, 0x00}; //Qos info all set zero ++ ++static u8 TDLS_EXT_CAPIE[] = {0x00, 0x00, 0x00, 0x50, 0x20}; //bit(28), bit(30), bit(37) ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++struct ieee80211_info_element_hdr { ++ u8 id; ++ u8 len; ++} ; ++ ++struct ieee80211_info_element { ++ u8 id; ++ u8 len; ++ u8 data[0]; ++} ; ++#pragma pack() ++ ++#endif ++ ++ ++/* ++ * These are the data types that can make up management packets ++ * ++ u16 auth_algorithm; ++ u16 auth_sequence; ++ u16 beacon_interval; ++ u16 capability; ++ u8 current_ap[ETH_ALEN]; ++ u16 listen_interval; ++ struct { ++ u16 association_id:14, reserved:2; ++ } __attribute__ ((packed)); ++ u32 time_stamp[2]; ++ u16 reason; ++ u16 status; ++*/ ++ ++#define IEEE80211_DEFAULT_TX_ESSID "Penguin" ++#define IEEE80211_DEFAULT_BASIC_RATE 10 ++ ++ ++#if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8711FW) ++ ++ ++struct ieee80211_authentication { ++ struct ieee80211_header_data header; ++ u16 algorithm; ++ u16 transaction; ++ u16 status; ++ //struct ieee80211_info_element_hdr info_element; ++} __attribute__ ((packed)); ++ ++ ++struct ieee80211_probe_response { ++ struct ieee80211_header_data header; ++ u32 time_stamp[2]; ++ u16 beacon_interval; ++ u16 capability; ++ struct ieee80211_info_element info_element; ++} __attribute__ ((packed)); ++ ++struct ieee80211_probe_request { ++ struct ieee80211_header_data header; ++ /*struct ieee80211_info_element info_element;*/ ++} __attribute__ ((packed)); ++ ++struct ieee80211_assoc_request_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 listen_interval; ++ //u8 current_ap[ETH_ALEN]; ++ struct ieee80211_info_element_hdr info_element; ++} __attribute__ ((packed)); ++ ++struct ieee80211_assoc_response_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 status; ++ u16 aid; ++// struct ieee80211_info_element info_element; /* supported rates */ ++} __attribute__ ((packed)); ++#endif ++ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_authentication { ++ struct ieee80211_header_data header; ++ u16 algorithm; ++ u16 transaction; ++ u16 status; ++ //struct ieee80211_info_element_hdr info_element; ++} ; ++ ++ ++struct ieee80211_probe_response { ++ struct ieee80211_header_data header; ++ u32 time_stamp[2]; ++ u16 beacon_interval; ++ u16 capability; ++ struct ieee80211_info_element info_element; ++} ; ++ ++struct ieee80211_probe_request { ++ struct ieee80211_header_data header; ++ /*struct ieee80211_info_element info_element;*/ ++} ; ++ ++struct ieee80211_assoc_request_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 listen_interval; ++ //u8 current_ap[ETH_ALEN]; ++ struct ieee80211_info_element_hdr info_element; ++} ; ++ ++struct ieee80211_assoc_response_frame { ++ struct rtw_ieee80211_hdr_3addr header; ++ u16 capability; ++ u16 status; ++ u16 aid; ++// struct ieee80211_info_element info_element; /* supported rates */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++ ++ ++ ++struct ieee80211_txb { ++ u8 nr_frags; ++ u8 encrypted; ++ u16 reserved; ++ u16 frag_size; ++ u16 payload_size; ++ struct sk_buff *fragments[0]; ++}; ++ ++ ++/* SWEEP TABLE ENTRIES NUMBER*/ ++#define MAX_SWEEP_TAB_ENTRIES 42 ++#define MAX_SWEEP_TAB_ENTRIES_PER_PACKET 7 ++/* MAX_RATES_LENGTH needs to be 12. The spec says 8, and many APs ++ * only use 8, and then use extended rates for the remaining supported ++ * rates. Other APs, however, stick all of their supported rates on the ++ * main rates information element... */ ++#define MAX_RATES_LENGTH ((u8)12) ++#define MAX_RATES_EX_LENGTH ((u8)16) ++#define MAX_NETWORK_COUNT 128 ++#define MAX_CHANNEL_NUMBER 161 ++#define IEEE80211_SOFTMAC_SCAN_TIME 400 ++//(HZ / 2) ++#define IEEE80211_SOFTMAC_ASSOC_RETRY_TIME (HZ * 2) ++ ++#define CRC_LENGTH 4U ++ ++#define MAX_WPA_IE_LEN (128) ++#define MAX_WPS_IE_LEN (512) ++#define MAX_P2P_IE_LEN (256) ++#define MAX_WFD_IE_LEN (128) ++ ++#define NETWORK_EMPTY_ESSID (1<<0) ++#define NETWORK_HAS_OFDM (1<<1) ++#define NETWORK_HAS_CCK (1<<2) ++ ++#define IEEE80211_DTIM_MBCAST 4 ++#define IEEE80211_DTIM_UCAST 2 ++#define IEEE80211_DTIM_VALID 1 ++#define IEEE80211_DTIM_INVALID 0 ++ ++#define IEEE80211_PS_DISABLED 0 ++#define IEEE80211_PS_UNICAST IEEE80211_DTIM_UCAST ++#define IEEE80211_PS_MBCAST IEEE80211_DTIM_MBCAST ++#define IW_ESSID_MAX_SIZE 32 ++#if 0 ++struct ieee80211_network { ++ /* These entries are used to identify a unique network */ ++ u8 bssid[ETH_ALEN]; ++ u8 channel; ++ /* Ensure null-terminated for any debug msgs */ ++ u8 ssid[IW_ESSID_MAX_SIZE + 1]; ++ u8 ssid_len; ++ u8 rssi; //relative signal strength ++ u8 sq; //signal quality ++ ++ /* These are network statistics */ ++ //struct ieee80211_rx_stats stats; ++ u16 capability; ++ u16 aid; ++ u8 rates[MAX_RATES_LENGTH]; ++ u8 rates_len; ++ u8 rates_ex[MAX_RATES_EX_LENGTH]; ++ u8 rates_ex_len; ++ ++ u8 edca_parmsets[18]; ++ ++ u8 mode; ++ u8 flags; ++ u8 time_stamp[8]; ++ u16 beacon_interval; ++ u16 listen_interval; ++ u16 atim_window; ++ u8 wpa_ie[MAX_WPA_IE_LEN]; ++ size_t wpa_ie_len; ++ u8 rsn_ie[MAX_WPA_IE_LEN]; ++ size_t rsn_ie_len; ++ u8 country[6]; ++ u8 dtim_period; ++ u8 dtim_data; ++ u8 power_constraint; ++ u8 qosinfo; ++ u8 qbssload[5]; ++ u8 network_type; ++ int join_res; ++ unsigned long last_scanned; ++}; ++#endif ++/* ++join_res: ++-1: authentication fail ++-2: association fail ++> 0: TID ++*/ ++ ++enum ieee80211_state { ++ ++ /* the card is not linked at all */ ++ IEEE80211_NOLINK = 0, ++ ++ /* IEEE80211_ASSOCIATING* are for BSS client mode ++ * the driver shall not perform RX filtering unless ++ * the state is LINKED. ++ * The driver shall just check for the state LINKED and ++ * defaults to NOLINK for ALL the other states (including ++ * LINKED_SCANNING) ++ */ ++ ++ /* the association procedure will start (wq scheduling)*/ ++ IEEE80211_ASSOCIATING, ++ IEEE80211_ASSOCIATING_RETRY, ++ ++ /* the association procedure is sending AUTH request*/ ++ IEEE80211_ASSOCIATING_AUTHENTICATING, ++ ++ /* the association procedure has successfully authentcated ++ * and is sending association request ++ */ ++ IEEE80211_ASSOCIATING_AUTHENTICATED, ++ ++ /* the link is ok. the card associated to a BSS or linked ++ * to a ibss cell or acting as an AP and creating the bss ++ */ ++ IEEE80211_LINKED, ++ ++ /* same as LINKED, but the driver shall apply RX filter ++ * rules as we are in NO_LINK mode. As the card is still ++ * logically linked, but it is doing a syncro site survey ++ * then it will be back to LINKED state. ++ */ ++ IEEE80211_LINKED_SCANNING, ++ ++}; ++ ++#define DEFAULT_MAX_SCAN_AGE (15 * HZ) ++#define DEFAULT_FTS 2346 ++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" ++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] ++ ++extern __inline int is_multicast_mac_addr(const u8 *addr) ++{ ++ return ((addr[0] != 0xff) && (0x01 & addr[0])); ++} ++ ++extern __inline int is_broadcast_mac_addr(const u8 *addr) ++{ ++ return ((addr[0] == 0xff) && (addr[1] == 0xff) && (addr[2] == 0xff) && \ ++ (addr[3] == 0xff) && (addr[4] == 0xff) && (addr[5] == 0xff)); ++} ++ ++#define CFG_IEEE80211_RESERVE_FCS (1<<0) ++#define CFG_IEEE80211_COMPUTE_FCS (1<<1) ++ ++typedef struct tx_pending_t{ ++ int frag; ++ struct ieee80211_txb *txb; ++}tx_pending_t; ++ ++ ++ ++#define MAXTID 16 ++ ++#define IEEE_A (1<<0) ++#define IEEE_B (1<<1) ++#define IEEE_G (1<<2) ++#define IEEE_MODE_MASK (IEEE_A|IEEE_B|IEEE_G) ++ ++extern __inline int ieee80211_is_empty_essid(const char *essid, int essid_len) ++{ ++ /* Single white space is for Linksys APs */ ++ if (essid_len == 1 && essid[0] == ' ') ++ return 1; ++ ++ /* Otherwise, if the entire essid is 0, we assume it is hidden */ ++ while (essid_len) { ++ essid_len--; ++ if (essid[essid_len] != '\0') ++ return 0; ++ } ++ ++ return 1; ++} ++ ++extern __inline int ieee80211_get_hdrlen(u16 fc) ++{ ++ int hdrlen = 24; ++ ++ switch (WLAN_FC_GET_TYPE(fc)) { ++ case RTW_IEEE80211_FTYPE_DATA: ++ if (fc & RTW_IEEE80211_QOS_DATAGRP) ++ hdrlen += 2; ++ if ((fc & RTW_IEEE80211_FCTL_FROMDS) && (fc & RTW_IEEE80211_FCTL_TODS)) ++ hdrlen += 6; /* Addr4 */ ++ break; ++ case RTW_IEEE80211_FTYPE_CTL: ++ switch (WLAN_FC_GET_STYPE(fc)) { ++ case RTW_IEEE80211_STYPE_CTS: ++ case RTW_IEEE80211_STYPE_ACK: ++ hdrlen = 10; ++ break; ++ default: ++ hdrlen = 16; ++ break; ++ } ++ break; ++ } ++ ++ return hdrlen; ++} ++ ++#if 0 ++/* Action frame categories (IEEE 802.11-2007, 7.3.1.11, Table 7-24) */ ++#define WLAN_ACTION_SPECTRUM_MGMT 0 ++#define WLAN_ACTION_QOS 1 ++#define WLAN_ACTION_DLS 2 ++#define WLAN_ACTION_BLOCK_ACK 3 ++#define WLAN_ACTION_RADIO_MEASUREMENT 5 ++#define WLAN_ACTION_FT 6 ++#define WLAN_ACTION_SA_QUERY 8 ++#define WLAN_ACTION_WMM 17 ++#endif ++ ++ ++/* Action category code */ ++enum rtw_ieee80211_category { ++ RTW_WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ RTW_WLAN_CATEGORY_QOS = 1, ++ RTW_WLAN_CATEGORY_DLS = 2, ++ RTW_WLAN_CATEGORY_BACK = 3, ++ RTW_WLAN_CATEGORY_PUBLIC = 4, //IEEE 802.11 public action frames ++ RTW_WLAN_CATEGORY_RADIO_MEASUREMENT = 5, ++ RTW_WLAN_CATEGORY_FT = 6, ++ RTW_WLAN_CATEGORY_HT = 7, ++ RTW_WLAN_CATEGORY_SA_QUERY = 8, ++ RTW_WLAN_CATEGORY_TDLS = 12, ++ RTW_WLAN_CATEGORY_WMM = 17, ++ RTW_WLAN_CATEGORY_P2P = 0x7f,//P2P action frames ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum rtw_ieee80211_spectrum_mgmt_actioncode { ++ RTW_WLAN_ACTION_SPCT_MSR_REQ = 0, ++ RTW_WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ RTW_WLAN_ACTION_SPCT_TPC_REQ = 2, ++ RTW_WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ RTW_WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ RTW_WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++enum _PUBLIC_ACTION{ ++ ACT_PUBLIC_BSSCOEXIST = 0, // 20/40 BSS Coexistence ++ ACT_PUBLIC_MP = 7, // Measurement Pilot ++ ACT_PUBLIC_P2P = 9, // WIFI_DIRECT ++}; ++ ++#ifdef CONFIG_TDLS ++enum TDLS_ACTION_FIELD{ ++ TDLS_SETUP_REQUEST = 0, ++ TDLS_SETUP_RESPONSE = 1, ++ TDLS_SETUP_CONFIRM = 2, ++ TDLS_TEARDOWN = 3, ++ TDLS_PEER_TRAFFIC_INDICATION = 4, ++ TDLS_CHANNEL_SWITCH_REQUEST = 5, ++ TDLS_CHANNEL_SWITCH_RESPONSE = 6, ++ TDLS_PEER_PSM_REQUEST = 7, ++ TDLS_PEER_PSM_RESPONSE = 8, ++ TDLS_PEER_TRAFFIC_RESPONSE = 9, ++ TDLS_DISCOVERY_REQUEST = 10, ++ TDLS_DISCOVERY_RESPONSE = 14, //it's used in public action frame ++}; ++#endif ++ ++/* BACK action code */ ++enum rtw_ieee80211_back_actioncode { ++ RTW_WLAN_ACTION_ADDBA_REQ = 0, ++ RTW_WLAN_ACTION_ADDBA_RESP = 1, ++ RTW_WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum rtw_ieee80211_ht_actioncode { ++ RTW_WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ RTW_WLAN_ACTION_SM_PS = 1, ++ RTW_WLAN_ACTION_PSPM = 2, ++ RTW_WLAN_ACTION_PCO_PHASE = 3, ++ RTW_WLAN_ACTION_MIMO_CSI_MX = 4, ++ RTW_WLAN_ACTION_MIMO_NONCP_BF = 5, ++ RTW_WLAN_ACTION_MIMP_CP_BF = 6, ++ RTW_WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ RTW_WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum rtw_ieee80211_back_parties { ++ RTW_WLAN_BACK_RECIPIENT = 0, ++ RTW_WLAN_BACK_INITIATOR = 1, ++ RTW_WLAN_BACK_TIMER = 2, ++}; ++ ++ ++#define OUI_MICROSOFT 0x0050f2 /* Microsoft (also used in Wi-Fi specs) ++ * 00:50:F2 */ ++ ++#define WME_OUI_TYPE 2 ++#define WME_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WME_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WME_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WME_VERSION 1 ++ ++#define WME_ACTION_CODE_SETUP_REQUEST 0 ++#define WME_ACTION_CODE_SETUP_RESPONSE 1 ++#define WME_ACTION_CODE_TEARDOWN 2 ++ ++#define WME_SETUP_RESPONSE_STATUS_ADMISSION_ACCEPTED 0 ++#define WME_SETUP_RESPONSE_STATUS_INVALID_PARAMETERS 1 ++#define WME_SETUP_RESPONSE_STATUS_REFUSED 3 ++ ++#define WME_TSPEC_DIRECTION_UPLINK 0 ++#define WME_TSPEC_DIRECTION_DOWNLINK 1 ++#define WME_TSPEC_DIRECTION_BI_DIRECTIONAL 3 ++ ++ ++#define OUI_BROADCOM 0x00904c /* Broadcom (Epigram) */ ++ ++#define VENDOR_HT_CAPAB_OUI_TYPE 0x33 /* 00-90-4c:0x33 */ ++ ++/* Parsed Information Elements */ ++struct ieee802_11_elems { ++ u8 *ssid; ++ u8 ssid_len; ++ u8 *supp_rates; ++ u8 supp_rates_len; ++ u8 *fh_params; ++ u8 fh_params_len; ++ u8 *ds_params; ++ u8 ds_params_len; ++ u8 *cf_params; ++ u8 cf_params_len; ++ u8 *tim; ++ u8 tim_len; ++ u8 *ibss_params; ++ u8 ibss_params_len; ++ u8 *challenge; ++ u8 challenge_len; ++ u8 *erp_info; ++ u8 erp_info_len; ++ u8 *ext_supp_rates; ++ u8 ext_supp_rates_len; ++ u8 *wpa_ie; ++ u8 wpa_ie_len; ++ u8 *rsn_ie; ++ u8 rsn_ie_len; ++ u8 *wme; ++ u8 wme_len; ++ u8 *wme_tspec; ++ u8 wme_tspec_len; ++ u8 *wps_ie; ++ u8 wps_ie_len; ++ u8 *power_cap; ++ u8 power_cap_len; ++ u8 *supp_channels; ++ u8 supp_channels_len; ++ u8 *mdie; ++ u8 mdie_len; ++ u8 *ftie; ++ u8 ftie_len; ++ u8 *timeout_int; ++ u8 timeout_int_len; ++ u8 *ht_capabilities; ++ u8 ht_capabilities_len; ++ u8 *ht_operation; ++ u8 ht_operation_len; ++ u8 *vendor_ht_cap; ++ u8 vendor_ht_cap_len; ++}; ++ ++typedef enum { ParseOK = 0, ParseUnknown = 1, ParseFailed = -1 } ParseRes; ++ ++ParseRes rtw_ieee802_11_parse_elems(u8 *start, uint len, ++ struct ieee802_11_elems *elems, ++ int show_errors); ++ ++u8 *rtw_set_fixed_ie(unsigned char *pbuf, unsigned int len, unsigned char *source, unsigned int *frlen); ++u8 *rtw_set_ie(u8 *pbuf, sint index, uint len, u8 *source, uint *frlen); ++u8 *rtw_get_ie(u8*pbuf, sint index, sint *len, sint limit); ++void rtw_set_supported_rate(u8* SupportedRates, uint mode) ; ++ ++unsigned char *rtw_get_wpa_ie(unsigned char *pie, int *wpa_ie_len, int limit); ++unsigned char *rtw_get_wpa2_ie(unsigned char *pie, int *rsn_ie_len, int limit); ++int rtw_get_wpa_cipher_suite(u8 *s); ++int rtw_get_wpa2_cipher_suite(u8 *s); ++int rtw_parse_wpa_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher); ++int rtw_parse_wpa2_ie(u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher); ++ ++int rtw_get_sec_ie(u8 *in_ie,uint in_len,u8 *rsn_ie,u16 *rsn_len,u8 *wpa_ie,u16 *wpa_len); ++ ++u8 rtw_is_wps_ie(u8 *ie_ptr, uint *wps_ielen); ++u8 *rtw_get_wps_ie(u8 *in_ie, uint in_len, u8 *wps_ie, uint *wps_ielen); ++u8 *rtw_get_wps_attr(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr); ++u8 *rtw_get_wps_attr_content(u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content, uint *len_content); ++ ++u8 *rtw_get_p2p_ie(u8 *in_ie, uint in_len, u8 *p2p_ie, uint *p2p_ielen); ++u8 *rtw_get_p2p_attr(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_attr, u32 *len_attr); ++u8 *rtw_get_p2p_attr_content(u8 *p2p_ie, uint p2p_ielen, u8 target_attr_id ,u8 *buf_content, uint *len_content); ++u32 rtw_set_p2p_attr_content(u8 *pbuf, u8 attr_id, u16 attr_len, u8 *pdata_attr); ++ ++void dump_ies(u8 *buf, u32 buf_len); ++void dump_wps_ie(u8 *ie, u32 ie_len); ++#ifdef CONFIG_P2P ++void dump_p2p_ie(u8 *ie, u32 ie_len); ++void rtw_WLAN_BSSID_EX_remove_p2p_attr(WLAN_BSSID_EX *bss_ex, u8 attr_id); ++#endif ++#ifdef CONFIG_WFD ++int rtw_get_wfd_ie(u8 *in_ie, uint in_len, u8 *wfd_ie, uint *wfd_ielen); ++int rtw_get_wfd_attr_content(u8 *wfd_ie, uint wfd_ielen, u8 target_attr_id ,u8 *attr_content, uint *attr_contentlen); ++#endif // CONFIG_WFD ++ ++uint rtw_get_rateset_len(u8 *rateset); ++ ++struct registry_priv; ++int rtw_generate_ie(struct registry_priv *pregistrypriv); ++ ++ ++int rtw_get_bit_value_from_ieee_value(u8 val); ++ ++uint rtw_is_cckrates_included(u8 *rate); ++ ++uint rtw_is_cckratesonly_included(u8 *rate); ++ ++int rtw_check_network_type(unsigned char *rate, int ratelen, int channel); ++ ++void rtw_macaddr_cfg(u8 *mac_addr); ++#endif /* IEEE80211_H */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ieee80211_ext.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,477 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IEEE80211_EXT_H ++#define __IEEE80211_EXT_H ++ ++#include ++#include ++#include ++ ++#define WMM_OUI_TYPE 2 ++#define WMM_OUI_SUBTYPE_INFORMATION_ELEMENT 0 ++#define WMM_OUI_SUBTYPE_PARAMETER_ELEMENT 1 ++#define WMM_OUI_SUBTYPE_TSPEC_ELEMENT 2 ++#define WMM_VERSION 1 ++ ++#define WPA_PROTO_WPA BIT(0) ++#define WPA_PROTO_RSN BIT(1) ++ ++#define WPA_KEY_MGMT_IEEE8021X BIT(0) ++#define WPA_KEY_MGMT_PSK BIT(1) ++#define WPA_KEY_MGMT_NONE BIT(2) ++#define WPA_KEY_MGMT_IEEE8021X_NO_WPA BIT(3) ++#define WPA_KEY_MGMT_WPA_NONE BIT(4) ++ ++ ++#define WPA_CAPABILITY_PREAUTH BIT(0) ++#define WPA_CAPABILITY_MGMT_FRAME_PROTECTION BIT(6) ++#define WPA_CAPABILITY_PEERKEY_ENABLED BIT(9) ++ ++ ++#define PMKID_LEN 16 ++ ++ ++#ifdef PLATFORM_LINUX ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}__attribute__ ((packed)); ++ ++struct wme_ac_parameter { ++#if defined(CONFIG_LITTLE_ENDIAN) ++ /* byte 1 */ ++ u8 aifsn:4, ++ acm:1, ++ aci:2, ++ reserved:1; ++ ++ /* byte 2 */ ++ u8 eCWmin:4, ++ eCWmax:4; ++#elif defined(CONFIG_BIG_ENDIAN) ++ /* byte 1 */ ++ u8 reserved:1, ++ aci:2, ++ acm:1, ++ aifsn:4; ++ ++ /* byte 2 */ ++ u8 eCWmax:4, ++ eCWmin:4; ++#else ++#error "Please fix " ++#endif ++ ++ /* bytes 3 & 4 */ ++ u16 txopLimit; ++} __attribute__ ((packed)); ++ ++struct wme_parameter_element { ++ /* required fields for WME version 1 */ ++ u8 oui[3]; ++ u8 oui_type; ++ u8 oui_subtype; ++ u8 version; ++ u8 acInfo; ++ u8 reserved; ++ struct wme_ac_parameter ac[4]; ++ ++} __attribute__ ((packed)); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct wpa_ie_hdr { ++ u8 elem_id; ++ u8 len; ++ u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */ ++ u8 version[2]; /* little endian */ ++}; ++ ++struct rsn_ie_hdr { ++ u8 elem_id; /* WLAN_EID_RSN */ ++ u8 len; ++ u8 version[2]; /* little endian */ ++}; ++ ++#pragma pack() ++ ++#endif ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *) (a), (val)) ++//#define RSN_SELECTOR_PUT(a, val) WPA_PUT_LE32((u8 *) (a), (val)) ++ ++ ++ ++/* Action category code */ ++enum ieee80211_category { ++ WLAN_CATEGORY_SPECTRUM_MGMT = 0, ++ WLAN_CATEGORY_QOS = 1, ++ WLAN_CATEGORY_DLS = 2, ++ WLAN_CATEGORY_BACK = 3, ++ WLAN_CATEGORY_HT = 7, ++ WLAN_CATEGORY_WMM = 17, ++}; ++ ++/* SPECTRUM_MGMT action code */ ++enum ieee80211_spectrum_mgmt_actioncode { ++ WLAN_ACTION_SPCT_MSR_REQ = 0, ++ WLAN_ACTION_SPCT_MSR_RPRT = 1, ++ WLAN_ACTION_SPCT_TPC_REQ = 2, ++ WLAN_ACTION_SPCT_TPC_RPRT = 3, ++ WLAN_ACTION_SPCT_CHL_SWITCH = 4, ++ WLAN_ACTION_SPCT_EXT_CHL_SWITCH = 5, ++}; ++ ++/* BACK action code */ ++enum ieee80211_back_actioncode { ++ WLAN_ACTION_ADDBA_REQ = 0, ++ WLAN_ACTION_ADDBA_RESP = 1, ++ WLAN_ACTION_DELBA = 2, ++}; ++ ++/* HT features action code */ ++enum ieee80211_ht_actioncode { ++ WLAN_ACTION_NOTIFY_CH_WIDTH = 0, ++ WLAN_ACTION_SM_PS = 1, ++ WLAN_ACTION_PSPM = 2, ++ WLAN_ACTION_PCO_PHASE = 3, ++ WLAN_ACTION_MIMO_CSI_MX = 4, ++ WLAN_ACTION_MIMO_NONCP_BF = 5, ++ WLAN_ACTION_MIMP_CP_BF = 6, ++ WLAN_ACTION_ASEL_INDICATES_FB = 7, ++ WLAN_ACTION_HI_INFO_EXCHG = 8, ++}; ++ ++/* BACK (block-ack) parties */ ++enum ieee80211_back_parties { ++ WLAN_BACK_RECIPIENT = 0, ++ WLAN_BACK_INITIATOR = 1, ++ WLAN_BACK_TIMER = 2, ++}; ++ ++#ifdef PLATFORM_LINUX ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) auth; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) reassoc_req; ++ struct { ++ u16 reason_code; ++ } __attribute__ ((packed)) disassoc; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_req; ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) probe_resp; ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) wme_action; ++#if 0 ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } __attribute__ ((packed)) chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } __attribute__ ((packed)) measurement; ++#endif ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } __attribute__ ((packed)) addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } __attribute__ ((packed)) addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } __attribute__ ((packed)) delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } __attribute__ ((packed)) plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } __attribute__ ((packed)) mesh_action; ++ } __attribute__ ((packed)) u; ++ } __attribute__ ((packed)) action; ++ } __attribute__ ((packed)) u; ++}__attribute__ ((packed)); ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct ieee80211_mgmt { ++ u16 frame_control; ++ u16 duration; ++ u8 da[6]; ++ u8 sa[6]; ++ u8 bssid[6]; ++ u16 seq_ctrl; ++ union { ++ struct { ++ u16 auth_alg; ++ u16 auth_transaction; ++ u16 status_code; ++ /* possibly followed by Challenge text */ ++ u8 variable[0]; ++ } auth; ++ struct { ++ u16 reason_code; ++ } deauth; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } assoc_req; ++ struct { ++ u16 capab_info; ++ u16 status_code; ++ u16 aid; ++ /* followed by Supported rates */ ++ u8 variable[0]; ++ } assoc_resp, reassoc_resp; ++ struct { ++ u16 capab_info; ++ u16 listen_interval; ++ u8 current_ap[6]; ++ /* followed by SSID and Supported rates */ ++ u8 variable[0]; ++ } reassoc_req; ++ struct { ++ u16 reason_code; ++ } disassoc; ++#if 0 ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params, TIM */ ++ u8 variable[0]; ++ } beacon; ++ struct { ++ /* only variable items: SSID, Supported rates */ ++ u8 variable[0]; ++ } probe_req; ++ ++ struct { ++ __le64 timestamp; ++ u16 beacon_int; ++ u16 capab_info; ++ /* followed by some of SSID, Supported rates, ++ * FH Params, DS Params, CF Params, IBSS Params */ ++ u8 variable[0]; ++ } probe_resp; ++#endif ++ struct { ++ u8 category; ++ union { ++ struct { ++ u8 action_code; ++ u8 dialog_token; ++ u8 status_code; ++ u8 variable[0]; ++ } wme_action; ++/* ++ struct{ ++ u8 action_code; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_channel_sw_ie sw_elem; ++ } chan_switch; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u8 element_id; ++ u8 length; ++ struct ieee80211_msrment_ie msr_elem; ++ } measurement; ++*/ ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 capab; ++ u16 timeout; ++ u16 start_seq_num; ++ } addba_req; ++ struct{ ++ u8 action_code; ++ u8 dialog_token; ++ u16 status; ++ u16 capab; ++ u16 timeout; ++ } addba_resp; ++ struct{ ++ u8 action_code; ++ u16 params; ++ u16 reason_code; ++ } delba; ++ struct{ ++ u8 action_code; ++ /* capab_info for open and confirm, ++ * reason for close ++ */ ++ u16 aux; ++ /* Followed in plink_confirm by status ++ * code, AID and supported rates, ++ * and directly by supported rates in ++ * plink_open and plink_close ++ */ ++ u8 variable[0]; ++ } plink_action; ++ struct{ ++ u8 action_code; ++ u8 variable[0]; ++ } mesh_action; ++ } u; ++ } action; ++ } u; ++} ; ++ ++#pragma pack() ++ ++#endif ++ ++/* mgmt header + 1 byte category code */ ++#define IEEE80211_MIN_ACTION_SIZE FIELD_OFFSET(struct ieee80211_mgmt, u.action.u) ++ ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/if_ether.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/if_ether.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,112 @@ ++/* ++ * INET An implementation of the TCP/IP protocol suite for the LINUX ++ * operating system. INET is implemented using the BSD Socket ++ * interface as the means of communication with the user level. ++ * ++ * Global definitions for the Ethernet IEEE 802.3 interface. ++ * ++ * Version: @(#)if_ether.h 1.0.1a 02/08/94 ++ * ++ * Author: Fred N. van Kempen, ++ * Donald Becker, ++ * Alan Cox, ++ * Steve Whitehouse, ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++ ++#ifndef _LINUX_IF_ETHER_H ++#define _LINUX_IF_ETHER_H ++ ++/* ++ * IEEE 802.3 Ethernet magic constants. The frame sizes omit the preamble ++ * and FCS/CRC (frame check sequence). ++ */ ++ ++#define ETH_ALEN 6 /* Octets in one ethernet addr */ ++#define ETH_HLEN 14 /* Total octets in header. */ ++#define ETH_ZLEN 60 /* Min. octets in frame sans FCS */ ++#define ETH_DATA_LEN 1500 /* Max. octets in payload */ ++#define ETH_FRAME_LEN 1514 /* Max. octets in frame sans FCS */ ++ ++/* ++ * These are the defined Ethernet Protocol ID's. ++ */ ++ ++#define ETH_P_LOOP 0x0060 /* Ethernet Loopback packet */ ++#define ETH_P_PUP 0x0200 /* Xerox PUP packet */ ++#define ETH_P_PUPAT 0x0201 /* Xerox PUP Addr Trans packet */ ++#define ETH_P_IP 0x0800 /* Internet Protocol packet */ ++#define ETH_P_X25 0x0805 /* CCITT X.25 */ ++#define ETH_P_ARP 0x0806 /* Address Resolution packet */ ++#define ETH_P_BPQ 0x08FF /* G8BPQ AX.25 Ethernet Packet [ NOT AN OFFICIALLY REGISTERED ID ] */ ++#define ETH_P_IEEEPUP 0x0a00 /* Xerox IEEE802.3 PUP packet */ ++#define ETH_P_IEEEPUPAT 0x0a01 /* Xerox IEEE802.3 PUP Addr Trans packet */ ++#define ETH_P_DEC 0x6000 /* DEC Assigned proto */ ++#define ETH_P_DNA_DL 0x6001 /* DEC DNA Dump/Load */ ++#define ETH_P_DNA_RC 0x6002 /* DEC DNA Remote Console */ ++#define ETH_P_DNA_RT 0x6003 /* DEC DNA Routing */ ++#define ETH_P_LAT 0x6004 /* DEC LAT */ ++#define ETH_P_DIAG 0x6005 /* DEC Diagnostics */ ++#define ETH_P_CUST 0x6006 /* DEC Customer use */ ++#define ETH_P_SCA 0x6007 /* DEC Systems Comms Arch */ ++#define ETH_P_RARP 0x8035 /* Reverse Addr Res packet */ ++#define ETH_P_ATALK 0x809B /* Appletalk DDP */ ++#define ETH_P_AARP 0x80F3 /* Appletalk AARP */ ++#define ETH_P_8021Q 0x8100 /* 802.1Q VLAN Extended Header */ ++#define ETH_P_IPX 0x8137 /* IPX over DIX */ ++#define ETH_P_IPV6 0x86DD /* IPv6 over bluebook */ ++#define ETH_P_PPP_DISC 0x8863 /* PPPoE discovery messages */ ++#define ETH_P_PPP_SES 0x8864 /* PPPoE session messages */ ++#define ETH_P_ATMMPOA 0x884c /* MultiProtocol Over ATM */ ++#define ETH_P_ATMFATE 0x8884 /* Frame-based ATM Transport ++ * over Ethernet ++ */ ++ ++/* ++ * Non DIX types. Won't clash for 1500 types. ++ */ ++ ++#define ETH_P_802_3 0x0001 /* Dummy type for 802.3 frames */ ++#define ETH_P_AX25 0x0002 /* Dummy protocol id for AX.25 */ ++#define ETH_P_ALL 0x0003 /* Every packet (be careful!!!) */ ++#define ETH_P_802_2 0x0004 /* 802.2 frames */ ++#define ETH_P_SNAP 0x0005 /* Internal only */ ++#define ETH_P_DDCMP 0x0006 /* DEC DDCMP: Internal only */ ++#define ETH_P_WAN_PPP 0x0007 /* Dummy type for WAN PPP frames*/ ++#define ETH_P_PPP_MP 0x0008 /* Dummy type for PPP MP frames */ ++#define ETH_P_LOCALTALK 0x0009 /* Localtalk pseudo type */ ++#define ETH_P_PPPTALK 0x0010 /* Dummy type for Atalk over PPP*/ ++#define ETH_P_TR_802_2 0x0011 /* 802.2 frames */ ++#define ETH_P_MOBITEX 0x0015 /* Mobitex (kaz@cafe.net) */ ++#define ETH_P_CONTROL 0x0016 /* Card specific control frames */ ++#define ETH_P_IRDA 0x0017 /* Linux-IrDA */ ++#define ETH_P_ECONET 0x0018 /* Acorn Econet */ ++ ++/* ++ * This is an Ethernet frame header. ++ */ ++ ++struct ethhdr ++{ ++ unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ ++ unsigned char h_source[ETH_ALEN]; /* source ether addr */ ++ unsigned short h_proto; /* packet type ID field */ ++}; ++ ++struct _vlan { ++ unsigned short h_vlan_TCI; // Encapsulates priority and VLAN ID ++ unsigned short h_vlan_encapsulated_proto; ++}; ++ ++ ++ ++#define get_vlan_id(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI)) & 0xfff) ++#define get_vlan_priority(pvlan) ((ntohs((unsigned short )pvlan->h_vlan_TCI))>>13) ++#define get_vlan_encap_proto(pvlan) (ntohs((unsigned short )pvlan->h_vlan_encapsulated_proto)) ++ ++ ++#endif /* _LINUX_IF_ETHER_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ioctl_cfg80211.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,81 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __IOCTL_CFG80211_H__ ++#define __IOCTL_CFG80211_H__ ++ ++#if defined(CONFIG_IOCTL_CFG80211) && !defined(CONFIG_CFG80211) && !defined(CONFIG_CFG80211_MODULE) ++ #error "Can't define CONFIG_IOCTL_CFG80211 because neither CONFIG_CFG80211 nor CONFIG_CFG80211_MODULE is defined in kernel" ++#endif ++#if defined(CONFIG_IOCTL_CFG80211) && LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) ++ #error "We haven't verify our cfg80211 solution below kernel version 2.6.35" ++#endif ++ ++struct rtw_wdev_priv ++{ ++ struct wireless_dev *rtw_wdev; ++ ++ _adapter *padapter; ++ ++ struct cfg80211_scan_request *scan_request; ++ _lock scan_req_lock; ++ ++ struct net_device *pmon_ndev;//for monitor interface ++ char ifname_mon[IFNAMSIZ + 1]; //interface name for monitor interface ++ ++ u8 p2p_enabled; ++ ++ u8 provdisc_req_issued; ++ ++ bool block; ++ ++}; ++ ++#define wdev_to_priv(w) ((struct rtw_wdev_priv *)(wdev_priv(w))) ++ ++#define wiphy_to_adapter(x) (_adapter *)(((struct rtw_wdev_priv*)wiphy_priv(x))->padapter) ++ ++#define wiphy_to_wdev(x) (struct wireless_dev *)(((struct rtw_wdev_priv*)wiphy_priv(x))->rtw_wdev) ++ ++ ++ ++int rtw_wdev_alloc(_adapter *padapter, struct device *dev); ++void rtw_wdev_free(struct wireless_dev *wdev); ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter); ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter); ++ ++void rtw_cfg80211_indicate_connect(_adapter *padapter); ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter); ++void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted); ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason); ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len); ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len); ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, int type); ++ ++#endif //__IOCTL_CFG80211_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ip.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/ip.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,138 @@ ++/* ++ * INET An implementation of the TCP/IP protocol suite for the LINUX ++ * operating system. INET is implemented using the BSD Socket ++ * interface as the means of communication with the user level. ++ * ++ * Definitions for the IP protocol. ++ * ++ * Version: @(#)ip.h 1.0.2 04/28/93 ++ * ++ * Authors: Fred N. van Kempen, ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++#ifndef _LINUX_IP_H ++#define _LINUX_IP_H ++#include ++ ++/* SOL_IP socket options */ ++ ++#define IPTOS_TOS_MASK 0x1E ++#define IPTOS_TOS(tos) ((tos)&IPTOS_TOS_MASK) ++#define IPTOS_LOWDELAY 0x10 ++#define IPTOS_THROUGHPUT 0x08 ++#define IPTOS_RELIABILITY 0x04 ++#define IPTOS_MINCOST 0x02 ++ ++#define IPTOS_PREC_MASK 0xE0 ++#define IPTOS_PREC(tos) ((tos)&IPTOS_PREC_MASK) ++#define IPTOS_PREC_NETCONTROL 0xe0 ++#define IPTOS_PREC_INTERNETCONTROL 0xc0 ++#define IPTOS_PREC_CRITIC_ECP 0xa0 ++#define IPTOS_PREC_FLASHOVERRIDE 0x80 ++#define IPTOS_PREC_FLASH 0x60 ++#define IPTOS_PREC_IMMEDIATE 0x40 ++#define IPTOS_PREC_PRIORITY 0x20 ++#define IPTOS_PREC_ROUTINE 0x00 ++ ++ ++/* IP options */ ++#define IPOPT_COPY 0x80 ++#define IPOPT_CLASS_MASK 0x60 ++#define IPOPT_NUMBER_MASK 0x1f ++ ++#define IPOPT_COPIED(o) ((o)&IPOPT_COPY) ++#define IPOPT_CLASS(o) ((o)&IPOPT_CLASS_MASK) ++#define IPOPT_NUMBER(o) ((o)&IPOPT_NUMBER_MASK) ++ ++#define IPOPT_CONTROL 0x00 ++#define IPOPT_RESERVED1 0x20 ++#define IPOPT_MEASUREMENT 0x40 ++#define IPOPT_RESERVED2 0x60 ++ ++#define IPOPT_END (0 |IPOPT_CONTROL) ++#define IPOPT_NOOP (1 |IPOPT_CONTROL) ++#define IPOPT_SEC (2 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_LSRR (3 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_TIMESTAMP (4 |IPOPT_MEASUREMENT) ++#define IPOPT_RR (7 |IPOPT_CONTROL) ++#define IPOPT_SID (8 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_SSRR (9 |IPOPT_CONTROL|IPOPT_COPY) ++#define IPOPT_RA (20|IPOPT_CONTROL|IPOPT_COPY) ++ ++#define IPVERSION 4 ++#define MAXTTL 255 ++#define IPDEFTTL 64 ++ ++/* struct timestamp, struct route and MAX_ROUTES are removed. ++ ++ REASONS: it is clear that nobody used them because: ++ - MAX_ROUTES value was wrong. ++ - "struct route" was wrong. ++ - "struct timestamp" had fatally misaligned bitfields and was completely unusable. ++ */ ++ ++#define IPOPT_OPTVAL 0 ++#define IPOPT_OLEN 1 ++#define IPOPT_OFFSET 2 ++#define IPOPT_MINOFF 4 ++#define MAX_IPOPTLEN 40 ++#define IPOPT_NOP IPOPT_NOOP ++#define IPOPT_EOL IPOPT_END ++#define IPOPT_TS IPOPT_TIMESTAMP ++ ++#define IPOPT_TS_TSONLY 0 /* timestamps only */ ++#define IPOPT_TS_TSANDADDR 1 /* timestamps and addresses */ ++#define IPOPT_TS_PRESPEC 3 /* specified modules only */ ++ ++#ifdef PLATFORM_LINUX ++ ++struct ip_options { ++ __u32 faddr; /* Saved first hop address */ ++ unsigned char optlen; ++ unsigned char srr; ++ unsigned char rr; ++ unsigned char ts; ++ unsigned char is_setbyuser:1, /* Set by setsockopt? */ ++ is_data:1, /* Options in __data, rather than skb */ ++ is_strictroute:1, /* Strict source route */ ++ srr_is_hit:1, /* Packet destination addr was our one */ ++ is_changed:1, /* IP checksum more not valid */ ++ rr_needaddr:1, /* Need to record addr of outgoing dev */ ++ ts_needtime:1, /* Need to record timestamp */ ++ ts_needaddr:1; /* Need to record addr of outgoing dev */ ++ unsigned char router_alert; ++ unsigned char __pad1; ++ unsigned char __pad2; ++ unsigned char __data[0]; ++}; ++ ++#define optlength(opt) (sizeof(struct ip_options) + opt->optlen) ++#endif ++ ++struct iphdr { ++#if defined(__LITTLE_ENDIAN_BITFIELD) ++ __u8 ihl:4, ++ version:4; ++#elif defined (__BIG_ENDIAN_BITFIELD) ++ __u8 version:4, ++ ihl:4; ++#else ++#error "Please fix " ++#endif ++ __u8 tos; ++ __u16 tot_len; ++ __u16 id; ++ __u16 frag_off; ++ __u8 ttl; ++ __u8 protocol; ++ __u16 check; ++ __u32 saddr; ++ __u32 daddr; ++ /*The options start here. */ ++}; ++ ++#endif /* _LINUX_IP_H */ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/mlme_osdep.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/mlme_osdep.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,44 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __MLME_OSDEP_H_ ++#define __MLME_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++#if defined(PLATFORM_WINDOWS) || defined(PLATFORM_MPIXEL) ++extern int time_after(u32 now, u32 old); ++#endif ++ ++extern void rtw_init_mlme_timer(_adapter *padapter); ++extern void rtw_os_indicate_disconnect( _adapter *adapter ); ++extern void rtw_os_indicate_connect( _adapter *adapter ); ++void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted); ++extern void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie); ++ ++#ifdef CONFIG_AP_MODE ++void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta); ++void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta); ++#endif ++void rtw_reset_securitypriv( _adapter *adapter ); ++ ++#endif //_MLME_OSDEP_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/mp_custom_oid.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/mp_custom_oid.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,353 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __CUSTOM_OID_H ++#define __CUSTOM_OID_H ++ ++// by Owen ++// 0xFF818000 - 0xFF81802F RTL8180 Mass Production Kit ++// 0xFF818500 - 0xFF81850F RTL8185 Setup Utility ++// 0xFF818580 - 0xFF81858F RTL8185 Phy Status Utility ++ ++// ++ ++// by Owen for Production Kit ++// For Production Kit with Agilent Equipments ++// in order to make our custom oids hopefully somewhat unique ++// we will use 0xFF (indicating implementation specific OID) ++// 81(first byte of non zero Realtek unique identifier) ++// 80 (second byte of non zero Realtek unique identifier) ++// XX (the custom OID number - providing 255 possible custom oids) ++ ++#define OID_RT_PRO_RESET_DUT 0xFF818000 ++#define OID_RT_PRO_SET_DATA_RATE 0xFF818001 ++#define OID_RT_PRO_START_TEST 0xFF818002 ++#define OID_RT_PRO_STOP_TEST 0xFF818003 ++#define OID_RT_PRO_SET_PREAMBLE 0xFF818004 ++#define OID_RT_PRO_SET_SCRAMBLER 0xFF818005 ++#define OID_RT_PRO_SET_FILTER_BB 0xFF818006 ++#define OID_RT_PRO_SET_MANUAL_DIVERSITY_BB 0xFF818007 ++#define OID_RT_PRO_SET_CHANNEL_DIRECT_CALL 0xFF818008 ++#define OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL 0xFF818009 ++#define OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL 0xFF81800A ++ ++#define OID_RT_PRO_SET_TX_ANTENNA_BB 0xFF81800D ++#define OID_RT_PRO_SET_ANTENNA_BB 0xFF81800E ++#define OID_RT_PRO_SET_CR_SCRAMBLER 0xFF81800F ++#define OID_RT_PRO_SET_CR_NEW_FILTER 0xFF818010 ++#define OID_RT_PRO_SET_TX_POWER_CONTROL 0xFF818011 ++#define OID_RT_PRO_SET_CR_TX_CONFIG 0xFF818012 ++#define OID_RT_PRO_GET_TX_POWER_CONTROL 0xFF818013 ++#define OID_RT_PRO_GET_CR_SIGNAL_QUALITY 0xFF818014 ++#define OID_RT_PRO_SET_CR_SETPOINT 0xFF818015 ++#define OID_RT_PRO_SET_INTEGRATOR 0xFF818016 ++#define OID_RT_PRO_SET_SIGNAL_QUALITY 0xFF818017 ++#define OID_RT_PRO_GET_INTEGRATOR 0xFF818018 ++#define OID_RT_PRO_GET_SIGNAL_QUALITY 0xFF818019 ++#define OID_RT_PRO_QUERY_EEPROM_TYPE 0xFF81801A ++#define OID_RT_PRO_WRITE_MAC_ADDRESS 0xFF81801B ++#define OID_RT_PRO_READ_MAC_ADDRESS 0xFF81801C ++#define OID_RT_PRO_WRITE_CIS_DATA 0xFF81801D ++#define OID_RT_PRO_READ_CIS_DATA 0xFF81801E ++#define OID_RT_PRO_WRITE_POWER_CONTROL 0xFF81801F ++#define OID_RT_PRO_READ_POWER_CONTROL 0xFF818020 ++#define OID_RT_PRO_WRITE_EEPROM 0xFF818021 ++#define OID_RT_PRO_READ_EEPROM 0xFF818022 ++#define OID_RT_PRO_RESET_TX_PACKET_SENT 0xFF818023 ++#define OID_RT_PRO_QUERY_TX_PACKET_SENT 0xFF818024 ++#define OID_RT_PRO_RESET_RX_PACKET_RECEIVED 0xFF818025 ++#define OID_RT_PRO_QUERY_RX_PACKET_RECEIVED 0xFF818026 ++#define OID_RT_PRO_QUERY_RX_PACKET_CRC32_ERROR 0xFF818027 ++#define OID_RT_PRO_QUERY_CURRENT_ADDRESS 0xFF818028 ++#define OID_RT_PRO_QUERY_PERMANENT_ADDRESS 0xFF818029 ++#define OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS 0xFF81802A ++#define OID_RT_PRO_RECEIVE_PACKET 0xFF81802C ++// added by Owen on 04/08/03 for Cameo's request ++#define OID_RT_PRO_WRITE_EEPROM_BYTE 0xFF81802D ++#define OID_RT_PRO_READ_EEPROM_BYTE 0xFF81802E ++#define OID_RT_PRO_SET_MODULATION 0xFF81802F ++// ++ ++//Sean ++#define OID_RT_DRIVER_OPTION 0xFF818080 ++#define OID_RT_RF_OFF 0xFF818081 ++#define OID_RT_AUTH_STATUS 0xFF818082 ++ ++//======================================================================== ++#define OID_RT_PRO_SET_CONTINUOUS_TX 0xFF81800B ++#define OID_RT_PRO_SET_SINGLE_CARRIER_TX 0xFF81800C ++#define OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX 0xFF81802B ++#define OID_RT_PRO_SET_SINGLE_TONE_TX 0xFF818043 ++//======================================================================== ++ ++ ++// by Owen for RTL8185 Phy Status Report Utility ++#define OID_RT_UTILITY_FALSE_ALARM_COUNTERS 0xFF818580 ++#define OID_RT_UTILITY_SELECT_DEBUG_MODE 0xFF818581 ++#define OID_RT_UTILITY_SELECT_SUBCARRIER_NUMBER 0xFF818582 ++#define OID_RT_UTILITY_GET_RSSI_STATUS 0xFF818583 ++#define OID_RT_UTILITY_GET_FRAME_DETECTION_STATUS 0xFF818584 ++#define OID_RT_UTILITY_GET_AGC_AND_FREQUENCY_OFFSET_ESTIMATION_STATUS 0xFF818585 ++#define OID_RT_UTILITY_GET_CHANNEL_ESTIMATION_STATUS 0xFF818586 ++// ++ ++// by Owen on 03/09/19-03/09/22 for RTL8185 ++#define OID_RT_WIRELESS_MODE 0xFF818500 ++#define OID_RT_SUPPORTED_RATES 0xFF818501 ++#define OID_RT_DESIRED_RATES 0xFF818502 ++#define OID_RT_WIRELESS_MODE_STARTING_ADHOC 0xFF818503 ++// ++ ++#define OID_RT_GET_CONNECT_STATE 0xFF030001 ++#define OID_RT_RESCAN 0xFF030002 ++#define OID_RT_SET_KEY_LENGTH 0xFF030003 ++#define OID_RT_SET_DEFAULT_KEY_ID 0xFF030004 ++ ++#define OID_RT_SET_CHANNEL 0xFF010182 ++#define OID_RT_SET_SNIFFER_MODE 0xFF010183 ++#define OID_RT_GET_SIGNAL_QUALITY 0xFF010184 ++#define OID_RT_GET_SMALL_PACKET_CRC 0xFF010185 ++#define OID_RT_GET_MIDDLE_PACKET_CRC 0xFF010186 ++#define OID_RT_GET_LARGE_PACKET_CRC 0xFF010187 ++#define OID_RT_GET_TX_RETRY 0xFF010188 ++#define OID_RT_GET_RX_RETRY 0xFF010189 ++#define OID_RT_PRO_SET_FW_DIG_STATE 0xFF01018A//S ++#define OID_RT_PRO_SET_FW_RA_STATE 0xFF01018B//S ++ ++#define OID_RT_GET_RX_TOTAL_PACKET 0xFF010190 ++#define OID_RT_GET_TX_BEACON_OK 0xFF010191 ++#define OID_RT_GET_TX_BEACON_ERR 0xFF010192 ++#define OID_RT_GET_RX_ICV_ERR 0xFF010193 ++#define OID_RT_SET_ENCRYPTION_ALGORITHM 0xFF010194 ++#define OID_RT_SET_NO_AUTO_RESCAN 0xFF010195 ++#define OID_RT_GET_PREAMBLE_MODE 0xFF010196 ++#define OID_RT_GET_DRIVER_UP_DELTA_TIME 0xFF010197 ++#define OID_RT_GET_AP_IP 0xFF010198 ++#define OID_RT_GET_CHANNELPLAN 0xFF010199 ++#define OID_RT_SET_PREAMBLE_MODE 0xFF01019A ++#define OID_RT_SET_BCN_INTVL 0xFF01019B ++#define OID_RT_GET_RF_VENDER 0xFF01019C ++#define OID_RT_DEDICATE_PROBE 0xFF01019D ++#define OID_RT_PRO_RX_FILTER_PATTERN 0xFF01019E ++ ++#define OID_RT_GET_DCST_CURRENT_THRESHOLD 0xFF01019F ++ ++#define OID_RT_GET_CCA_ERR 0xFF0101A0 ++#define OID_RT_GET_CCA_UPGRADE_THRESHOLD 0xFF0101A1 ++#define OID_RT_GET_CCA_FALLBACK_THRESHOLD 0xFF0101A2 ++ ++#define OID_RT_GET_CCA_UPGRADE_EVALUATE_TIMES 0xFF0101A3 ++#define OID_RT_GET_CCA_FALLBACK_EVALUATE_TIMES 0xFF0101A4 ++ ++// by Owen on 03/31/03 for Cameo's request ++#define OID_RT_SET_RATE_ADAPTIVE 0xFF0101A5 ++// ++#define OID_RT_GET_DCST_EVALUATE_PERIOD 0xFF0101A5 ++#define OID_RT_GET_DCST_TIME_UNIT_INDEX 0xFF0101A6 ++#define OID_RT_GET_TOTAL_TX_BYTES 0xFF0101A7 ++#define OID_RT_GET_TOTAL_RX_BYTES 0xFF0101A8 ++#define OID_RT_CURRENT_TX_POWER_LEVEL 0xFF0101A9 ++#define OID_RT_GET_ENC_KEY_MISMATCH_COUNT 0xFF0101AA ++#define OID_RT_GET_ENC_KEY_MATCH_COUNT 0xFF0101AB ++#define OID_RT_GET_CHANNEL 0xFF0101AC ++ ++#define OID_RT_SET_CHANNELPLAN 0xFF0101AD ++#define OID_RT_GET_HARDWARE_RADIO_OFF 0xFF0101AE ++#define OID_RT_CHANNELPLAN_BY_COUNTRY 0xFF0101AF ++#define OID_RT_SCAN_AVAILABLE_BSSID 0xFF0101B0 ++#define OID_RT_GET_HARDWARE_VERSION 0xFF0101B1 ++#define OID_RT_GET_IS_ROAMING 0xFF0101B2 ++#define OID_RT_GET_IS_PRIVACY 0xFF0101B3 ++#define OID_RT_GET_KEY_MISMATCH 0xFF0101B4 ++#define OID_RT_SET_RSSI_ROAM_TRAFFIC_TH 0xFF0101B5 ++#define OID_RT_SET_RSSI_ROAM_SIGNAL_TH 0xFF0101B6 ++#define OID_RT_RESET_LOG 0xFF0101B7 ++#define OID_RT_GET_LOG 0xFF0101B8 ++#define OID_RT_SET_INDICATE_HIDDEN_AP 0xFF0101B9 ++#define OID_RT_GET_HEADER_FAIL 0xFF0101BA ++#define OID_RT_SUPPORTED_WIRELESS_MODE 0xFF0101BB ++#define OID_RT_GET_CHANNEL_LIST 0xFF0101BC ++#define OID_RT_GET_SCAN_IN_PROGRESS 0xFF0101BD ++#define OID_RT_GET_TX_INFO 0xFF0101BE ++#define OID_RT_RF_READ_WRITE_OFFSET 0xFF0101BF ++#define OID_RT_RF_READ_WRITE 0xFF0101C0 ++ ++// For Netgear request. 2005.01.13, by rcnjko. ++#define OID_RT_FORCED_DATA_RATE 0xFF0101C1 ++#define OID_RT_WIRELESS_MODE_FOR_SCAN_LIST 0xFF0101C2 ++// For Netgear request. 2005.02.17, by rcnjko. ++#define OID_RT_GET_BSS_WIRELESS_MODE 0xFF0101C3 ++// For AZ project. 2005.06.27, by rcnjko. ++#define OID_RT_SCAN_WITH_MAGIC_PACKET 0xFF0101C4 ++ ++// Vincent 8185MP ++#define OID_RT_PRO_RX_FILTER 0xFF0111C0 ++ ++//Andy TEST ++//#define OID_RT_PRO_WRITE_REGISTRY 0xFF0111C1 ++//#define OID_RT_PRO_READ_REGISTRY 0xFF0111C2 ++#define OID_CE_USB_WRITE_REGISTRY 0xFF0111C1 ++#define OID_CE_USB_READ_REGISTRY 0xFF0111C2 ++ ++ ++#define OID_RT_PRO_SET_INITIAL_GAIN 0xFF0111C3 ++#define OID_RT_PRO_SET_BB_RF_STANDBY_MODE 0xFF0111C4 ++#define OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE 0xFF0111C5 ++#define OID_RT_PRO_SET_TX_CHARGE_PUMP 0xFF0111C6 ++#define OID_RT_PRO_SET_RX_CHARGE_PUMP 0xFF0111C7 ++#define OID_RT_PRO_RF_WRITE_REGISTRY 0xFF0111C8 ++#define OID_RT_PRO_RF_READ_REGISTRY 0xFF0111C9 ++#define OID_RT_PRO_QUERY_RF_TYPE 0xFF0111CA ++ ++// AP OID ++#define OID_RT_AP_GET_ASSOCIATED_STATION_LIST 0xFF010300 ++#define OID_RT_AP_GET_CURRENT_TIME_STAMP 0xFF010301 ++#define OID_RT_AP_SWITCH_INTO_AP_MODE 0xFF010302 ++#define OID_RT_AP_SET_DTIM_PERIOD 0xFF010303 ++#define OID_RT_AP_SUPPORTED 0xFF010304 // Determine if driver supports AP mode. 2004.08.27, by rcnjko. ++#define OID_RT_AP_SET_PASSPHRASE 0xFF010305 // Set WPA-PSK passphrase into authenticator. 2005.07.08, byrcnjko. ++ ++// 8187MP. 2004.09.06, by rcnjko. ++#define OID_RT_PRO8187_WI_POLL 0xFF818780 ++#define OID_RT_PRO_WRITE_BB_REG 0xFF818781 ++#define OID_RT_PRO_READ_BB_REG 0xFF818782 ++#define OID_RT_PRO_WRITE_RF_REG 0xFF818783 ++#define OID_RT_PRO_READ_RF_REG 0xFF818784 ++ ++// Meeting House. added by Annie, 2005-07-20. ++#define OID_RT_MH_VENDER_ID 0xFFEDC100 ++ ++//8711 MP OID added 20051230. ++#define OID_RT_PRO8711_JOIN_BSS 0xFF871100//S ++ ++#define OID_RT_PRO_READ_REGISTER 0xFF871101 //Q ++#define OID_RT_PRO_WRITE_REGISTER 0xFF871102 //S ++ ++#define OID_RT_PRO_BURST_READ_REGISTER 0xFF871103 //Q ++#define OID_RT_PRO_BURST_WRITE_REGISTER 0xFF871104 //S ++ ++#define OID_RT_PRO_WRITE_TXCMD 0xFF871105 //S ++ ++#define OID_RT_PRO_READ16_EEPROM 0xFF871106 //Q ++#define OID_RT_PRO_WRITE16_EEPROM 0xFF871107 //S ++ ++#define OID_RT_PRO_H2C_SET_COMMAND 0xFF871108 //S ++#define OID_RT_PRO_H2C_QUERY_RESULT 0xFF871109 //Q ++ ++#define OID_RT_PRO8711_WI_POLL 0xFF87110A //Q ++#define OID_RT_PRO8711_PKT_LOSS 0xFF87110B //Q ++#define OID_RT_RD_ATTRIB_MEM 0xFF87110C//Q ++#define OID_RT_WR_ATTRIB_MEM 0xFF87110D//S ++ ++ ++//Method 2 for H2C/C2H ++#define OID_RT_PRO_H2C_CMD_MODE 0xFF871110 //S ++#define OID_RT_PRO_H2C_CMD_RSP_MODE 0xFF871111 //Q ++#define OID_RT_PRO_H2C_CMD_EVENT_MODE 0xFF871112 //S ++#define OID_RT_PRO_WAIT_C2H_EVENT 0xFF871113 //Q ++#define OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST 0xFF871114//Q ++ ++#define OID_RT_PRO_SCSI_ACCESS_TEST 0xFF871115 //Q, S ++ ++#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT 0xFF871116 //S ++#define OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN 0xFF871117 //Q,S ++#define OID_RT_RRO_RX_PKT_VIA_IOCTRL 0xFF871118 //Q ++#define OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL 0xFF871119 //Q ++ ++#define OID_RT_RPO_SET_PWRMGT_TEST 0xFF87111A //S ++#define OID_RT_PRO_QRY_PWRMGT_TEST 0XFF87111B //Q ++#define OID_RT_RPO_ASYNC_RWIO_TEST 0xFF87111C //S ++#define OID_RT_RPO_ASYNC_RWIO_POLL 0xFF87111D //Q ++#define OID_RT_PRO_SET_RF_INTFS 0xFF87111E //S ++#define OID_RT_POLL_RX_STATUS 0xFF87111F //Q ++ ++#define OID_RT_PRO_CFG_DEBUG_MESSAGE 0xFF871120 //Q,S ++#define OID_RT_PRO_SET_DATA_RATE_EX 0xFF871121//S ++#define OID_RT_PRO_SET_BASIC_RATE 0xFF871122//S ++#define OID_RT_PRO_READ_TSSI 0xFF871123//S ++#define OID_RT_PRO_SET_POWER_TRACKING 0xFF871124//S ++ ++ ++#define OID_RT_PRO_QRY_PWRSTATE 0xFF871150 //Q ++#define OID_RT_PRO_SET_PWRSTATE 0xFF871151 //S ++ ++//Method 2 , using workitem ++#define OID_RT_SET_READ_REG 0xFF871181 //S ++#define OID_RT_SET_WRITE_REG 0xFF871182 //S ++#define OID_RT_SET_BURST_READ_REG 0xFF871183 //S ++#define OID_RT_SET_BURST_WRITE_REG 0xFF871184 //S ++#define OID_RT_SET_WRITE_TXCMD 0xFF871185 //S ++#define OID_RT_SET_READ16_EEPROM 0xFF871186 //S ++#define OID_RT_SET_WRITE16_EEPROM 0xFF871187 //S ++#define OID_RT_QRY_POLL_WKITEM 0xFF871188 //Q ++ ++//For SDIO INTERFACE only ++#define OID_RT_PRO_SYNCPAGERW_SRAM 0xFF8711A0 //Q, S ++#define OID_RT_PRO_871X_DRV_EXT 0xFF8711A1 ++ ++//For USB INTERFACE only ++#define OID_RT_PRO_USB_VENDOR_REQ 0xFF8711B0 //Q, S ++#define OID_RT_PRO_SCSI_AUTO_TEST 0xFF8711B1 //S ++#define OID_RT_PRO_USB_MAC_AC_FIFO_WRITE 0xFF8711B2 //S ++#define OID_RT_PRO_USB_MAC_RX_FIFO_READ 0xFF8711B3 //Q ++#define OID_RT_PRO_USB_MAC_RX_FIFO_POLLING 0xFF8711B4 //Q ++ ++#define OID_RT_PRO_H2C_SET_RATE_TABLE 0xFF8711FB //S ++#define OID_RT_PRO_H2C_GET_RATE_TABLE 0xFF8711FC //S ++#define OID_RT_PRO_H2C_C2H_LBK_TEST 0xFF8711FE ++ ++#define OID_RT_PRO_ENCRYPTION_CTRL 0xFF871200 //Q, S ++#define OID_RT_PRO_ADD_STA_INFO 0xFF871201 //S ++#define OID_RT_PRO_DELE_STA_INFO 0xFF871202 //S ++#define OID_RT_PRO_QUERY_DR_VARIABLE 0xFF871203 //Q ++ ++#define OID_RT_PRO_RX_PACKET_TYPE 0xFF871204 //Q, S ++ ++#define OID_RT_PRO_READ_EFUSE 0xFF871205 //Q ++#define OID_RT_PRO_WRITE_EFUSE 0xFF871206 //S ++#define OID_RT_PRO_RW_EFUSE_PGPKT 0xFF871207 //Q, S ++#define OID_RT_GET_EFUSE_CURRENT_SIZE 0xFF871208 //Q ++ ++#define OID_RT_SET_BANDWIDTH 0xFF871209 //S ++#define OID_RT_SET_CRYSTAL_CAP 0xFF87120A //S ++ ++#define OID_RT_SET_RX_PACKET_TYPE 0xFF87120B //S ++ ++#define OID_RT_GET_EFUSE_MAX_SIZE 0xFF87120C //Q ++ ++#define OID_RT_PRO_SET_TX_AGC_OFFSET 0xFF87120D //S ++ ++#define OID_RT_PRO_SET_PKT_TEST_MODE 0xFF87120E //S ++ ++#define OID_RT_PRO_FOR_EVM_TEST_SETTING 0xFF87120F //S ++ ++#define OID_RT_PRO_GET_THERMAL_METER 0xFF871210 //Q ++ ++#define OID_RT_RESET_PHY_RX_PACKET_COUNT 0xFF871211 //S ++#define OID_RT_GET_PHY_RX_PACKET_RECEIVED 0xFF871212 //Q ++#define OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR 0xFF871213 //Q ++ ++#define OID_RT_SET_POWER_DOWN 0xFF871214 //S ++ ++#define OID_RT_GET_POWER_MODE 0xFF871215 //Q ++ ++#define OID_RT_PRO_EFUSE 0xFF871216 //Q, S ++#define OID_RT_PRO_EFUSE_MAP 0xFF871217 //Q, S ++ ++#endif //#ifndef __CUSTOM_OID_H +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/nic_spec.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/nic_spec.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,47 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#ifndef __NIC_SPEC_H__ ++#define __NIC_SPEC_H__ ++ ++#include ++ ++#define RTL8711_MCTRL_ (0x20000) ++#define RTL8711_UART_ (0x30000) ++#define RTL8711_TIMER_ (0x40000) ++#define RTL8711_FINT_ (0x50000) ++#define RTL8711_HINT_ (0x50000) ++#define RTL8711_GPIO_ (0x60000) ++#define RTL8711_WLANCTRL_ (0x200000) ++#define RTL8711_WLANFF_ (0xe00000) ++#define RTL8711_HCICTRL_ (0x600000) ++#define RTL8711_SYSCFG_ (0x620000) ++#define RTL8711_SYSCTRL_ (0x620000) ++#define RTL8711_MCCTRL_ (0x020000) ++ ++ ++#include ++ ++#include ++ ++ ++#endif // __RTL8711_SPEC_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_ce_service.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,171 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_CE_SERVICE_H_ ++#define __OSDEP_CE_SERVICE_H_ ++ ++ ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include "SDCardDDK.h" ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++typedef HANDLE _sema; ++typedef LIST_ENTRY _list; ++typedef NDIS_STATUS _OS_STATUS; ++ ++typedef NDIS_SPIN_LOCK _lock; ++ ++typedef HANDLE _rwlock; //Mutex ++ ++typedef u32 _irqL; ++ ++typedef NDIS_HANDLE _nic_hdl; ++ ++ ++typedef NDIS_MINIPORT_TIMER _timer; ++ ++struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++}; ++ ++typedef NDIS_PACKET _pkt; ++typedef NDIS_BUFFER _buffer; ++typedef struct __queue _queue; ++ ++typedef HANDLE _thread_hdl_; ++typedef DWORD thread_return; ++typedef void* thread_context; ++typedef NDIS_WORK_ITEM _workitem; ++ ++#define thread_exit() ExitThread(STATUS_SUCCESS); return 0; ++ ++ ++#define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_prev(_list *list) ++{ ++ return list->Blink; ++} ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++ ++__inline static void _enter_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ WaitForSingleObject(*prwlock, INFINITE ); ++ ++} ++ ++__inline static void _exit_hwio_critical(_rwlock *prwlock, _irqL *pirqL) ++{ ++ ReleaseMutex(*prwlock); ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_intf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_intf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,128 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __OSDEP_INTF_H_ ++#define __OSDEP_INTF_H_ ++ ++#include ++#include ++#include ++ ++#define RND4(x) (((x >> 2) + (((x & 3) == 0) ? 0: 1)) << 2) ++ ++ ++struct intf_priv { ++ ++ u8 *intf_dev; ++ u32 max_iosz; //USB2.0: 128, USB1.1: 64, SDIO:64 ++ u32 max_xmitsz; //USB2.0: unlimited, SDIO:512 ++ u32 max_recvsz; //USB2.0: unlimited, SDIO:512 ++ ++ volatile u8 *io_rwmem; ++ volatile u8 *allocated_io_rwmem; ++ u32 io_wsz; //unit: 4bytes ++ u32 io_rsz;//unit: 4bytes ++ u8 intf_status; ++ ++ void (*_bus_io)(u8 *priv); ++ ++/* ++Under Sync. IRP (SDIO/USB) ++A protection mechanism is necessary for the io_rwmem(read/write protocol) ++ ++Under Async. IRP (SDIO/USB) ++The protection mechanism is through the pending queue. ++*/ ++ ++ _mutex ioctl_mutex; ++ ++ ++#ifdef PLATFORM_LINUX ++ #ifdef CONFIG_USB_HCI ++ // when in USB, IO is through interrupt in/out endpoints ++ struct usb_device *udev; ++ PURB piorw_urb; ++ u8 io_irp_cnt; ++ u8 bio_irp_pending; ++ _sema io_retevt; ++ _timer io_timer; ++ u8 bio_irp_timeout; ++ u8 bio_timer_cancel; ++ #endif ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ #ifdef CONFIG_SDIO_HCI ++ // below is for io_rwmem... ++ PMDL pmdl; ++ PSDBUS_REQUEST_PACKET sdrp; ++ PSDBUS_REQUEST_PACKET recv_sdrp; ++ PSDBUS_REQUEST_PACKET xmit_sdrp; ++ ++ PIRP piorw_irp; ++ ++ #endif ++ #ifdef CONFIG_USB_HCI ++ PURB piorw_urb; ++ PIRP piorw_irp; ++ u8 io_irp_cnt; ++ u8 bio_irp_pending; ++ _sema io_retevt; ++ #endif ++#endif ++ ++}; ++ ++ ++#ifdef CONFIG_R871X_TEST ++int rtw_start_pseudo_adhoc(_adapter *padapter); ++int rtw_stop_pseudo_adhoc(_adapter *padapter); ++#endif ++ ++u8 rtw_init_drv_sw(_adapter *padapter); ++u8 rtw_free_drv_sw(_adapter *padapter); ++u8 rtw_reset_drv_sw(_adapter *padapter); ++ ++u32 rtw_start_drv_threads(_adapter *padapter); ++void rtw_stop_drv_threads (_adapter *padapter); ++void rtw_cancel_all_timer(_adapter *padapter); ++ ++#ifdef PLATFORM_LINUX ++int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); ++ ++int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname); ++struct net_device *rtw_init_netdev(_adapter *padapter); ++ ++#ifdef CONFIG_PROC_DEBUG ++void rtw_proc_init_one(struct net_device *dev); ++void rtw_proc_remove_one(struct net_device *dev); ++#endif ++#endif ++ ++ ++void rtw_ips_dev_unload(_adapter *padapter); ++#ifdef CONFIG_IPS ++int rtw_ips_pwr_up(_adapter *padapter); ++void rtw_ips_pwr_down(_adapter *padapter); ++#endif ++ ++ ++#endif //_OSDEP_INTF_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_service.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/osdep_service.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,841 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __OSDEP_SERVICE_H_ ++#define __OSDEP_SERVICE_H_ ++ ++#include ++#include ++//#include ++ ++#define _SUCCESS 1 ++#define _FAIL 0 ++//#define RTW_STATUS_TIMEDOUT -110 ++ ++#undef _TRUE ++#define _TRUE 1 ++ ++#undef _FALSE ++#define _FALSE 0 ++ ++ ++#ifdef PLATFORM_LINUX ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,5)) ++ #include ++#endif ++ //#include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ #include ++#else ++ #include ++#endif ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include ++ #include // Necessary because we use the proc fs ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++// #include ++ #include ++ #include ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ #include ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++ #include ++#else ++ #include ++#endif ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++ #include ++ #include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ #include ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3,7,0)) ++ #include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ typedef struct urb * PURB; ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22)) ++#ifdef CONFIG_USB_SUSPEND ++#define CONFIG_AUTOSUSPEND 1 ++#endif ++#endif ++#endif ++ ++ typedef struct semaphore _sema; ++ typedef spinlock_t _lock; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ typedef struct mutex _mutex; ++#else ++ typedef struct semaphore _mutex; ++#endif ++ typedef struct timer_list _timer; ++ ++ struct __queue { ++ struct list_head queue; ++ _lock lock; ++ }; ++ ++ typedef struct sk_buff _pkt; ++ typedef unsigned char _buffer; ++ ++ typedef struct __queue _queue; ++ typedef struct list_head _list; ++ typedef int _OS_STATUS; ++ //typedef u32 _irqL; ++ typedef unsigned long _irqL; ++ typedef struct net_device * _nic_hdl; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)) ++ typedef pid_t _thread_hdl_; ++#else ++ typedef struct task_struct * _thread_hdl_; ++#endif ++ typedef int thread_return; ++ typedef void* thread_context; ++ ++ #define thread_exit() complete_and_exit(NULL, 0) ++ ++ typedef void timer_hdl_return; ++ typedef void* timer_hdl_context; ++ typedef struct work_struct _workitem; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22)) ++ #define skb_tail_pointer(skb) skb->tail ++#endif ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->next; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) \ ++ ((type *)((char *)(ptr)-(SIZE_T)(&((type *)0)->member))) ++ ++ ++__inline static void _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_irqsave(plock, *pirqL); ++} ++ ++__inline static void _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_irqrestore(plock, *pirqL); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_lock_bh(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ spin_unlock_bh(plock); ++} ++ ++__inline static void _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_lock(pmutex); ++#else ++ down(pmutex); ++#endif ++} ++ ++ ++__inline static void _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_unlock(pmutex); ++#else ++ up(pmutex); ++#endif ++} ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ list_del_init(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,void* cntx) ++{ ++ //setup_timer(ptimer, pfunc,(u32)cntx); ++ ptimer->function = pfunc; ++ ptimer->data = (unsigned long)cntx; ++ init_timer(ptimer); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ mod_timer(ptimer , (jiffies+(delay_time*HZ/1000))); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ del_timer_sync(ptimer); ++ *bcancelled= _TRUE;//TRUE ==1; FALSE==0 ++} ++ ++#ifdef PLATFORM_LINUX ++#define RTW_TIMER_HDL_ARGS void *FunctionContext ++#elif defined(PLATFORM_OS_CE) || defined(PLATFORM_WINDOWS) ++#define RTW_TIMER_HDL_ARGS IN PVOID SystemSpecific1, IN PVOID FunctionContext, IN PVOID SystemSpecific2, IN PVOID SystemSpecific3 ++#endif ++ ++#define RTW_TIMER_HDL_NAME(name) rtw_##name##_timer_hdl ++#define RTW_DECLARE_TIMER_HDL(name) void RTW_TIMER_HDL_NAME(name)(RTW_TIMER_HDL_ARGS) ++ ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) ++ INIT_WORK(pwork, pfunc); ++#else ++ INIT_WORK(pwork, pfunc,pwork); ++#endif ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ schedule_work(pwork); ++} ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (atomic_inc_return((atomic_t *)&(_MutexCounter)) != 1)\ ++ { \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++ msleep(10); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ atomic_dec((atomic_t *)&(_MutexCounter)); \ ++} ++ ++#endif // PLATFORM_LINUX ++ ++ ++#ifdef PLATFORM_OS_XP ++ ++ #include ++ #include ++ #include ++ #include ++ #include ++ ++#ifdef CONFIG_USB_HCI ++ #include ++ #include ++ #include ++#endif ++ ++ typedef KSEMAPHORE _sema; ++ typedef LIST_ENTRY _list; ++ typedef NDIS_STATUS _OS_STATUS; ++ ++ ++ typedef NDIS_SPIN_LOCK _lock; ++ ++ typedef KMUTEX _mutex; ++ ++ typedef KIRQL _irqL; ++ ++ // USB_PIPE for WINCE , but handle can be use just integer under windows ++ typedef NDIS_HANDLE _nic_hdl; ++ ++ ++ typedef NDIS_MINIPORT_TIMER _timer; ++ ++ struct __queue { ++ LIST_ENTRY queue; ++ _lock lock; ++ }; ++ ++ typedef NDIS_PACKET _pkt; ++ typedef NDIS_BUFFER _buffer; ++ typedef struct __queue _queue; ++ ++ typedef PKTHREAD _thread_hdl_; ++ typedef void thread_return; ++ typedef void* thread_context; ++ ++ typedef NDIS_WORK_ITEM _workitem; ++ ++ #define thread_exit() PsTerminateSystemThread(STATUS_SUCCESS); ++ ++ #define HZ 10000000 ++ #define SEMA_UPBND (0x7FFFFFFF) //8192 ++ ++__inline static _list *get_next(_list *list) ++{ ++ return list->Flink; ++} ++ ++__inline static _list *get_list_head(_queue *queue) ++{ ++ return (&(queue->queue)); ++} ++ ++ ++#define LIST_CONTAINOR(ptr, type, member) CONTAINING_RECORD(ptr, type, member) ++ ++ ++__inline static _enter_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical(_lock *plock, _irqL *pirqL) ++{ ++ NdisReleaseSpinLock(plock); ++} ++ ++ ++__inline static _enter_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static _exit_critical_ex(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static void _enter_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprAcquireSpinLock(plock); ++} ++ ++__inline static void _exit_critical_bh(_lock *plock, _irqL *pirqL) ++{ ++ NdisDprReleaseSpinLock(plock); ++} ++ ++__inline static _enter_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeWaitForSingleObject(pmutex, Executive, KernelMode, FALSE, NULL); ++} ++ ++ ++__inline static _exit_critical_mutex(_mutex *pmutex, _irqL *pirqL) ++{ ++ KeReleaseMutex(pmutex, FALSE); ++} ++ ++ ++__inline static void rtw_list_delete(_list *plist) ++{ ++ RemoveEntryList(plist); ++ InitializeListHead(plist); ++} ++ ++__inline static void _init_timer(_timer *ptimer,_nic_hdl nic_hdl,void *pfunc,PVOID cntx) ++{ ++ NdisMInitializeTimer(ptimer, nic_hdl, pfunc, cntx); ++} ++ ++__inline static void _set_timer(_timer *ptimer,u32 delay_time) ++{ ++ NdisMSetTimer(ptimer,delay_time); ++} ++ ++__inline static void _cancel_timer(_timer *ptimer,u8 *bcancelled) ++{ ++ NdisMCancelTimer(ptimer,bcancelled); ++} ++ ++__inline static void _init_workitem(_workitem *pwork, void *pfunc, PVOID cntx) ++{ ++ ++ NdisInitializeWorkItem(pwork, pfunc, cntx); ++} ++ ++__inline static void _set_workitem(_workitem *pwork) ++{ ++ NdisScheduleWorkItem(pwork); ++} ++ ++ ++#define ATOMIC_INIT(i) { (i) } ++ ++// ++// Global Mutex: can only be used at PASSIVE level. ++// ++ ++#define ACQUIRE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ while (NdisInterlockedIncrement((PULONG)&(_MutexCounter)) != 1)\ ++ { \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++ NdisMSleep(10000); \ ++ } \ ++} ++ ++#define RELEASE_GLOBAL_MUTEX(_MutexCounter) \ ++{ \ ++ NdisInterlockedDecrement((PULONG)&(_MutexCounter)); \ ++} ++ ++#endif // PLATFORM_OS_XP ++ ++ ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++ ++#include ++ ++#ifndef BIT ++ #define BIT(x) ( 1 << (x)) ++#endif ++ ++extern int RTW_STATUS_CODE(int error_code); ++ ++#define CONFIG_USE_VMALLOC ++ ++#ifdef DBG_MEM_ALLOC ++void rtw_dump_mem_stat (void); ++extern u8* dbg_rtw_vmalloc(u32 sz, const char *func, int line); ++extern u8* dbg_rtw_zvmalloc(u32 sz, const char *func, int line); ++extern void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const char *func, int line); ++extern u8* dbg_rtw_malloc(u32 sz, const char *func, int line); ++extern u8* dbg_rtw_zmalloc(u32 sz, const char *func, int line); ++extern void dbg_rtw_mfree(u8 *pbuf, u32 sz, const char *func, int line); ++#ifdef CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) dbg_rtw_vmalloc((sz), __FUNCTION__, __LINE__) ++#define rtw_zvmalloc(sz) dbg_rtw_zvmalloc((sz), __FUNCTION__, __LINE__) ++#define rtw_vmfree(pbuf, sz) dbg_rtw_vmfree((pbuf), (sz), __FUNCTION__, __LINE__) ++#else //CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) dbg_rtw_malloc((sz), __FUNCTION__, __LINE__) ++#define rtw_zvmalloc(sz) dbg_rtw_zmalloc((sz), __FUNCTION__, __LINE__) ++#define rtw_vmfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), __FUNCTION__, __LINE__) ++#endif //CONFIG_USE_VMALLOC ++#define rtw_malloc(sz) dbg_rtw_malloc((sz), __FUNCTION__, __LINE__) ++#define rtw_zmalloc(sz) dbg_rtw_zmalloc((sz), __FUNCTION__, __LINE__) ++#define rtw_mfree(pbuf, sz) dbg_rtw_mfree((pbuf), (sz), __FUNCTION__, __LINE__) ++#else ++extern u8* _rtw_vmalloc(u32 sz); ++extern u8* _rtw_zvmalloc(u32 sz); ++extern void _rtw_vmfree(u8 *pbuf, u32 sz); ++extern u8* _rtw_zmalloc(u32 sz); ++extern u8* _rtw_malloc(u32 sz); ++extern void _rtw_mfree(u8 *pbuf, u32 sz); ++#ifdef CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) _rtw_vmalloc((sz)) ++#define rtw_zvmalloc(sz) _rtw_zvmalloc((sz)) ++#define rtw_vmfree(pbuf, sz) _rtw_vmfree((pbuf), (sz)) ++#else //CONFIG_USE_VMALLOC ++#define rtw_vmalloc(sz) _rtw_malloc((sz)) ++#define rtw_zvmalloc(sz) _rtw_zmalloc((sz)) ++#define rtw_vmfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) ++#endif //CONFIG_USE_VMALLOC ++#define rtw_malloc(sz) _rtw_malloc((sz)) ++#define rtw_zmalloc(sz) _rtw_zmalloc((sz)) ++#define rtw_mfree(pbuf, sz) _rtw_mfree((pbuf), (sz)) ++#endif ++ ++extern void _rtw_memcpy(void* dec, void* sour, u32 sz); ++extern int _rtw_memcmp(void *dst, void *src, u32 sz); ++extern void _rtw_memset(void *pbuf, int c, u32 sz); ++ ++extern void _rtw_init_listhead(_list *list); ++extern u32 rtw_is_list_empty(_list *phead); ++extern void rtw_list_insert_tail(_list *plist, _list *phead); ++extern void rtw_list_delete(_list *plist); ++ ++extern void _rtw_init_sema(_sema *sema, int init_val); ++extern void _rtw_free_sema(_sema *sema); ++extern void _rtw_up_sema(_sema *sema); ++extern u32 _rtw_down_sema(_sema *sema); ++extern void _rtw_mutex_init(_mutex *pmutex); ++extern void _rtw_mutex_free(_mutex *pmutex); ++extern void _rtw_spinlock_init(_lock *plock); ++extern void _rtw_spinlock_free(_lock *plock); ++extern void _rtw_spinlock(_lock *plock); ++extern void _rtw_spinunlock(_lock *plock); ++extern void _rtw_spinlock_ex(_lock *plock); ++extern void _rtw_spinunlock_ex(_lock *plock); ++ ++extern void _rtw_init_queue(_queue *pqueue); ++extern u32 _rtw_queue_empty(_queue *pqueue); ++extern u32 rtw_end_of_queue_search(_list *queue, _list *pelement); ++ ++extern u32 rtw_get_current_time(void); ++extern u32 rtw_systime_to_ms(u32 systime); ++extern s32 rtw_get_passing_time_ms(u32 start); ++extern s32 rtw_get_time_interval_ms(u32 start, u32 end); ++ ++extern void rtw_sleep_schedulable(int ms); ++ ++extern void rtw_msleep_os(int ms); ++extern void rtw_usleep_os(int us); ++ ++#ifdef DBG_DELAY_OS ++#define rtw_mdelay_os(ms) _rtw_mdelay_os((ms), __FUNCTION__, __LINE__) ++#define rtw_udelay_os(ms) _rtw_udelay_os((ms), __FUNCTION__, __LINE__) ++extern void _rtw_mdelay_os(int ms, const char *func, const int line); ++extern void _rtw_udelay_os(int us, const char *func, const int line); ++#else ++extern void rtw_mdelay_os(int ms); ++extern void rtw_udelay_os(int us); ++#endif ++ ++ ++ ++__inline static unsigned char _cancel_timer_ex(_timer *ptimer) ++{ ++#ifdef PLATFORM_LINUX ++ return del_timer_sync(ptimer); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ u8 bcancelled; ++ ++ _cancel_timer(ptimer, &bcancelled); ++ ++ return bcancelled; ++#endif ++} ++ ++__inline static void thread_enter(void *context) ++{ ++#ifdef PLATFORM_LINUX ++ //struct net_device *pnetdev = (struct net_device *)context; ++ //daemonize("%s", pnetdev->name); ++ //daemonize("%s", "RTKTHREAD"); ++ allow_signal(SIGTERM); ++#endif ++} ++ ++__inline static void flush_signals_thread(void) ++{ ++#ifdef PLATFORM_LINUX ++ if (signal_pending (current)) ++ { ++ flush_signals(current); ++ } ++#endif ++} ++ ++__inline static _OS_STATUS res_to_status(sint res) ++{ ++ ++ ++#if defined (PLATFORM_LINUX) || defined (PLATFORM_MPIXEL) ++ return res; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ if (res == _SUCCESS) ++ return NDIS_STATUS_SUCCESS; ++ else ++ return NDIS_STATUS_FAILURE; ++ ++#endif ++ ++} ++ ++__inline static u32 _RND4(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 2) + ((sz & 3) ? 1: 0)) << 2; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND8(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 3) + ((sz & 7) ? 1: 0)) << 3; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND128(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 7) + ((sz & 127) ? 1: 0)) << 7; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND256(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 8) + ((sz & 255) ? 1: 0)) << 8; ++ ++ return val; ++ ++} ++ ++__inline static u32 _RND512(u32 sz) ++{ ++ ++ u32 val; ++ ++ val = ((sz >> 9) + ((sz & 511) ? 1: 0)) << 9; ++ ++ return val; ++ ++} ++ ++__inline static u32 bitshift(u32 bitmask) ++{ ++ u32 i; ++ ++ for (i = 0; i <= 31; i++) ++ if (((bitmask>>i) & 0x1) == 1) break; ++ ++ return i; ++} ++ ++#ifndef MAC_FMT ++#define MAC_FMT "%02x:%02x:%02x:%02x:%02x:%02x" ++#endif ++#ifndef MAC_ARG ++#define MAC_ARG(x) ((u8*)(x))[0],((u8*)(x))[1],((u8*)(x))[2],((u8*)(x))[3],((u8*)(x))[4],((u8*)(x))[5] ++#endif ++ ++//#ifdef __GNUC__ ++#ifdef PLATFORM_LINUX ++#define STRUCT_PACKED __attribute__ ((packed)) ++#else ++#define STRUCT_PACKED ++#endif ++ ++ ++// limitation of path length ++#ifdef PLATFORM_LINUX ++ #define PATH_LENGTH_MAX PATH_MAX ++#elif defined(PLATFORM_WINDOWS) ++ #define PATH_LENGTH_MAX MAX_PATH ++#endif ++ ++ ++// Suspend lock prevent system from going suspend ++#ifdef CONFIG_WAKELOCK ++#include ++#elif defined(CONFIG_ANDROID_POWER) ++#include ++#endif ++ ++extern void rtw_suspend_lock_init(void); ++extern void rtw_suspend_lock_uninit(void); ++extern void rtw_lock_suspend(void); ++extern void rtw_unlock_suspend(void); ++ ++ ++//Atomic integer operations ++#ifdef PLATFORM_LINUX ++ #define ATOMIC_T atomic_t ++#elif defined(PLATFORM_WINDOWS) ++ #define ATOMIC_T LONG ++#endif ++ ++extern void ATOMIC_SET(ATOMIC_T *v, int i); ++extern int ATOMIC_READ(ATOMIC_T *v); ++extern void ATOMIC_ADD(ATOMIC_T *v, int i); ++extern void ATOMIC_SUB(ATOMIC_T *v, int i); ++extern void ATOMIC_INC(ATOMIC_T *v); ++extern void ATOMIC_DEC(ATOMIC_T *v); ++extern int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i); ++extern int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i); ++extern int ATOMIC_INC_RETURN(ATOMIC_T *v); ++extern int ATOMIC_DEC_RETURN(ATOMIC_T *v); ++ ++//File operation APIs, just for linux now ++extern int rtw_is_file_readable(char *path); ++extern int rtw_retrive_from_file(char *path, u8* buf, u32 sz); ++extern int rtw_store_to_file(char *path, u8* buf, u32 sz); ++ ++ ++ ++#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR ++struct rtw_netdev_priv_indicator { ++ void *priv; ++ u32 sizeof_priv; ++}; ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv); ++extern struct net_device * rtw_alloc_etherdev(int sizeof_priv); ++#define rtw_netdev_priv(netdev) ( ((struct rtw_netdev_priv_indicator *)netdev_priv(netdev))->priv ) ++extern void rtw_free_netdev(struct net_device * netdev); ++#else ++#define rtw_alloc_etherdev(sizeof_priv) alloc_etherdev((sizeof_priv)) ++#define rtw_netdev_priv(netdev) netdev_priv((netdev)) ++#define rtw_free_netdev(netdev) free_netdev((netdev)) ++#endif ++ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27)) ++#define rtw_signal_process(pid, sig) kill_pid(find_vpid((pid)),(sig), 1) ++#else ++#define rtw_signal_process(pid, sig) kill_proc((pid), (sig), 1) ++#endif ++#endif //PLATFORM_LINUX ++ ++extern u64 rtw_modular64(u64 x, u64 y); ++extern u64 rtw_division64(u64 x, u64 y); ++ ++ ++/* Macros for handling unaligned memory accesses */ ++ ++#define RTW_GET_BE16(a) ((u16) (((a)[0] << 8) | (a)[1])) ++#define RTW_PUT_BE16(a, val) \ ++ do { \ ++ (a)[0] = ((u16) (val)) >> 8; \ ++ (a)[1] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define RTW_GET_LE16(a) ((u16) (((a)[1] << 8) | (a)[0])) ++#define RTW_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define RTW_GET_BE24(a) ((((u32) (a)[0]) << 16) | (((u32) (a)[1]) << 8) | \ ++ ((u32) (a)[2])) ++#define RTW_PUT_BE24(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[2] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ ++ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) ++#define RTW_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_LE32(a) ((((u32) (a)[3]) << 24) | (((u32) (a)[2]) << 16) | \ ++ (((u32) (a)[1]) << 8) | ((u32) (a)[0])) ++#define RTW_PUT_LE32(a, val) \ ++ do { \ ++ (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[0] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_BE64(a) ((((u64) (a)[0]) << 56) | (((u64) (a)[1]) << 48) | \ ++ (((u64) (a)[2]) << 40) | (((u64) (a)[3]) << 32) | \ ++ (((u64) (a)[4]) << 24) | (((u64) (a)[5]) << 16) | \ ++ (((u64) (a)[6]) << 8) | ((u64) (a)[7])) ++#define RTW_PUT_BE64(a, val) \ ++ do { \ ++ (a)[0] = (u8) (((u64) (val)) >> 56); \ ++ (a)[1] = (u8) (((u64) (val)) >> 48); \ ++ (a)[2] = (u8) (((u64) (val)) >> 40); \ ++ (a)[3] = (u8) (((u64) (val)) >> 32); \ ++ (a)[4] = (u8) (((u64) (val)) >> 24); \ ++ (a)[5] = (u8) (((u64) (val)) >> 16); \ ++ (a)[6] = (u8) (((u64) (val)) >> 8); \ ++ (a)[7] = (u8) (((u64) (val)) & 0xff); \ ++ } while (0) ++ ++#define RTW_GET_LE64(a) ((((u64) (a)[7]) << 56) | (((u64) (a)[6]) << 48) | \ ++ (((u64) (a)[5]) << 40) | (((u64) (a)[4]) << 32) | \ ++ (((u64) (a)[3]) << 24) | (((u64) (a)[2]) << 16) | \ ++ (((u64) (a)[1]) << 8) | ((u64) (a)[0])) ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++extern int start_kthread(_thread_hdl_ *t_hdl, int (*threadfn)(void *data), ++ void *data, const char *name); ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_hal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_hal.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,168 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_HAL_H__ ++#define __PCI_HAL_H__ ++ ++ ++#define INTEL_VENDOR_ID 0x8086 ++#define SIS_VENDOR_ID 0x1039 ++#define ATI_VENDOR_ID 0x1002 ++#define ATI_DEVICE_ID 0x7914 ++#define AMD_VENDOR_ID 0x1022 ++ ++#define PCI_MAX_BRIDGE_NUMBER 255 ++#define PCI_MAX_DEVICES 32 ++#define PCI_MAX_FUNCTION 8 ++ ++#define PCI_CONF_ADDRESS 0x0CF8 // PCI Configuration Space Address ++#define PCI_CONF_DATA 0x0CFC // PCI Configuration Space Data ++ ++#define PCI_CLASS_BRIDGE_DEV 0x06 ++#define PCI_SUBCLASS_BR_PCI_TO_PCI 0x04 ++ ++#define PCI_CAPABILITY_ID_PCI_EXPRESS 0x10 ++ ++#define U1DONTCARE 0xFF ++#define U2DONTCARE 0xFFFF ++#define U4DONTCARE 0xFFFFFFFF ++ ++#define PCI_VENDER_ID_REALTEK 0x10ec ++ ++#define HAL_HW_PCI_8180_DEVICE_ID 0x8180 ++#define HAL_HW_PCI_8185_DEVICE_ID 0x8185 //8185 or 8185b ++#define HAL_HW_PCI_8188_DEVICE_ID 0x8188 //8185b ++#define HAL_HW_PCI_8198_DEVICE_ID 0x8198 //8185b ++#define HAL_HW_PCI_8190_DEVICE_ID 0x8190 //8190 ++#define HAL_HW_PCI_8723E_DEVICE_ID 0x8723 //8723E ++#define HAL_HW_PCI_8192_DEVICE_ID 0x8192 //8192 PCI-E ++#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192 //8192 SE ++#define HAL_HW_PCI_8174_DEVICE_ID 0x8174 //8192 SE ++#define HAL_HW_PCI_8173_DEVICE_ID 0x8173 //8191 SE Crab ++#define HAL_HW_PCI_8172_DEVICE_ID 0x8172 //8191 SE RE ++#define HAL_HW_PCI_8171_DEVICE_ID 0x8171 //8191 SE Unicron ++#define HAL_HW_PCI_0045_DEVICE_ID 0x0045 //8190 PCI for Ceraga ++#define HAL_HW_PCI_0046_DEVICE_ID 0x0046 //8190 Cardbus for Ceraga ++#define HAL_HW_PCI_0044_DEVICE_ID 0x0044 //8192e PCIE for Ceraga ++#define HAL_HW_PCI_0047_DEVICE_ID 0x0047 //8192e Express Card for Ceraga ++#define HAL_HW_PCI_700F_DEVICE_ID 0x700F ++#define HAL_HW_PCI_701F_DEVICE_ID 0x701F ++#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304 ++#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191 //8192ce ++#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178 //8192ce ++#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177 //8192ce ++#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176 //8192ce ++#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191 //8192ce ++#define HAL_HW_PCI_8192DE_DEVICE_ID 0x8193 //8192de ++#define HAL_HW_PCI_002B_DEVICE_ID 0x002B //8192de, provided by HW SD ++ ++#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000 //8190 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192SE 0x10 ++#define HAL_HW_PCI_REVISION_ID_8192CE 0x1 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000 //8192 support 16 pages of IO registers ++#define HAL_HW_PCI_REVISION_ID_8192DE 0x0 ++#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000 //8192 support 16 pages of IO registers ++ ++enum pci_bridge_vendor { ++ PCI_BRIDGE_VENDOR_INTEL = 0x0,//0b'0000,0001 ++ PCI_BRIDGE_VENDOR_ATI, //= 0x02,//0b'0000,0010 ++ PCI_BRIDGE_VENDOR_AMD, //= 0x04,//0b'0000,0100 ++ PCI_BRIDGE_VENDOR_SIS ,//= 0x08,//0b'0000,1000 ++ PCI_BRIDGE_VENDOR_UNKNOWN, //= 0x40,//0b'0100,0000 ++ PCI_BRIDGE_VENDOR_MAX ,//= 0x80 ++} ; ++ ++struct rt_pci_capabilities_header { ++ u8 capability_id; ++ u8 next; ++}; ++ ++struct pci_priv{ ++ u8 linkctrl_reg; ++ ++ u8 busnumber; ++ u8 devnumber; ++ u8 funcnumber; ++ ++ u8 pcibridge_busnum; ++ u8 pcibridge_devnum; ++ u8 pcibridge_funcnum; ++ u8 pcibridge_vendor; ++ u16 pcibridge_vendorid; ++ u16 pcibridge_deviceid; ++ u8 pcibridge_pciehdr_offset; ++ u8 pcibridge_linkctrlreg; ++ ++ u8 amd_l1_patch; ++}; ++ ++typedef struct _RT_ISR_CONTENT ++{ ++ union{ ++ u32 IntArray[2]; ++ u32 IntReg4Byte; ++ u16 IntReg2Byte; ++ }; ++}RT_ISR_CONTENT, *PRT_ISR_CONTENT; ++ ++//#define RegAddr(addr) (addr + 0xB2000000UL) ++//some platform macros will def here ++static inline void NdisRawWritePortUlong(u32 port, u32 val) ++{ ++ outl(val, port); ++ //writel(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawWritePortUchar(u32 port, u8 val) ++{ ++ outb(val, port); ++ //writeb(val, (u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUchar(u32 port, u8 *pval) ++{ ++ *pval = inb(port); ++ //*pval = readb((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUshort(u32 port, u16 *pval) ++{ ++ *pval = inw(port); ++ //*pval = readw((u8 *)RegAddr(port)); ++} ++ ++static inline void NdisRawReadPortUlong(u32 port, u32 *pval) ++{ ++ *pval = inl(port); ++ //*pval = readl((u8 *)RegAddr(port)); ++} ++ ++#ifdef CONFIG_RTL8192C ++void rtl8192ce_set_hal_ops(_adapter * padapter); ++#endif ++#ifdef CONFIG_RTL8192D ++void rtl8192de_set_hal_ops(_adapter * padapter); ++#endif ++ ++#endif //__PCIE_HAL_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_ops.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_ops.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,58 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_OPS_H_ ++#define __PCI_OPS_H_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_RTL8192C ++u32 rtl8192ce_init_desc_ring(_adapter * padapter); ++u32 rtl8192ce_free_desc_ring(_adapter * padapter); ++void rtl8192ce_reset_desc_ring(_adapter * padapter); ++#ifdef CONFIG_64BIT_DMA ++u8 PlatformEnable92CEDMA64(PADAPTER Adapter); ++#endif ++int rtl8192ce_interrupt(PADAPTER Adapter); ++void rtl8192ce_xmit_tasklet(void *priv); ++void rtl8192ce_recv_tasklet(void *priv); ++void rtl8192ce_prepare_bcn_tasklet(void *priv); ++void rtl8192ce_set_intf_ops(struct _io_ops *pops); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++u32 rtl8192de_init_desc_ring(_adapter * padapter); ++u32 rtl8192de_free_desc_ring(_adapter * padapter); ++void rtl8192de_reset_desc_ring(_adapter * padapter); ++#ifdef CONFIG_64BIT_DMA ++u8 PlatformEnable92DEDMA64(PADAPTER Adapter); ++#endif ++int rtl8192de_interrupt(PADAPTER Adapter); ++void rtl8192de_xmit_tasklet(void *priv); ++void rtl8192de_recv_tasklet(void *priv); ++void rtl8192de_prepare_bcn_tasklet(void *priv); ++void rtl8192de_set_intf_ops(struct _io_ops *pops); ++u32 MpReadPCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u8 Direct); ++void MpWritePCIDwordDBI8192D(IN PADAPTER Adapter, IN u16 Offset, IN u32 Value, IN u8 Direct); ++#endif ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_osintf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/pci_osintf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,33 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __PCI_OSINTF_H ++#define __PCI_OSINTF_H ++ ++#include ++#include ++#include ++ ++ ++void rtw_pci_disable_aspm(_adapter *padapter); ++void rtw_pci_enable_aspm(_adapter *padapter); ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/recv_osdep.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/recv_osdep.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,58 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RECV_OSDEP_H_ ++#define __RECV_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++ ++extern sint _rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); ++extern void _rtw_free_recv_priv (struct recv_priv *precvpriv); ++ ++ ++extern s32 rtw_recv_entry(union recv_frame *precv_frame); ++extern int rtw_recv_indicatepkt(_adapter *adapter, union recv_frame *precv_frame); ++extern void rtw_recv_returnpacket(IN _nic_hdl cnxt, IN _pkt *preturnedpkt); ++ ++extern void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame); ++extern void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup); ++ ++ ++int rtw_init_recv_priv(struct recv_priv *precvpriv, _adapter *padapter); ++void rtw_free_recv_priv (struct recv_priv *precvpriv); ++ ++ ++int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter); ++int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe); ++void rtw_os_recv_resource_free(struct recv_priv *precvpriv); ++ ++ ++int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf); ++int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf); ++ ++void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf); ++ ++void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl); ++ ++ ++#endif // ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_cmd.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,153 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192C_CMD_H_ ++#define __RTL8192C_CMD_H_ ++ ++ ++enum cmd_msg_element_id ++{ ++ NONE_CMDMSG_EID, ++ AP_OFFLOAD_EID=0, ++ SET_PWRMODE_EID=1, ++ JOINBSS_RPT_EID=2, ++ RSVD_PAGE_EID=3, ++ RSSI_4_EID = 4, ++ RSSI_SETTING_EID=5, ++ MACID_CONFIG_EID=6, ++ MACID_PS_MODE_EID=7, ++ P2P_PS_OFFLOAD_EID=8, ++ SELECTIVE_SUSPEND_ROF_CMD=9, ++ H2C_WO_WLAN_CMD = 26, // Wake on Wlan. ++ EXT_MACID_PERIOD_EID = 27, // support macid to 64 ++ MACID64_CONFIG_EID = 28, // support macid to 64 ++ P2P_PS_CTW_CMD_EID=32, ++ H2C_92C_IO_OFFLOAD=44, ++ KEEP_ALIVE_CONTROL_CMD=48, ++ DISCONNECT_DECISION_CTRL_CMD=49, ++ REMOTE_WAKE_CTRL_CMD=60, ++ H2C_92C_CMD_MAX}; ++ ++struct cmd_msg_parm { ++ u8 eid; //element id ++ u8 sz; // sz ++ u8 buf[6]; ++}; ++ ++enum evt_msg_element_id ++{ ++ EVT_DBG_EID=0, ++ EVT_TSF_EID=1, ++ EVT_AP_RPT_RSP_EID=2, ++ EVT_CCX_TXRPT_EID=3, ++ EVT_BT_RSSI_EID=4, ++ EVT_BT_OPMODE_EID=5, ++ EVT_EXT_RA_RPT_EID=6, ++ EVT_BT_TYPE_RPT_EID=7, ++ EVT_INIT_OFFLOAD_EID=8, ++ EVT_PSD_CONTROL_EID=9, ++ EVT_HW_INFO_EXCHGNGE_EID=10, ++ EVT_C2H_H2C_TEST_EID=11, ++ EVT_BT_INTO_EID=12, ++ EVT_BT_RPT_EID=13, ++ H2C_92C_EVT_MAX}; ++ ++ ++typedef struct _SETPWRMODE_PARM{ ++ u8 Mode; ++ u8 SmartPS; ++ u8 BcnPassTime; // unit: 100ms ++}SETPWRMODE_PARM, *PSETPWRMODE_PARM; ++ ++typedef struct _SETWOWLAN_PARM{ ++ u8 mode; ++ u8 gpio_index; ++ u8 gpio_duration; ++ u8 second_mode; ++ u8 reserve; ++}SETWOWLAN_PARM, *PSETWOWLAN_PARM; ++ ++#define FW_WOWLAN_FUN_EN BIT(0) ++#define FW_WOWLAN_PATTERN_MATCH BIT(1) ++#define FW_WOWLAN_MAGIC_PKT BIT(2) ++#define FW_WOWLAN_UNICAST BIT(3) ++#define FW_WOWLAN_ALL_PKT_DROP BIT(4) ++#define FW_WOWLAN_GPIO_ACTIVE BIT(5) ++#define FW_WOWLAN_REKEY_WAKEUP BIT(6) ++#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) ++ ++#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) ++#define FW_FW_PARSE_MAGIC_PKT BIT(1) ++ ++struct H2C_SS_RFOFF_PARAM{ ++ u8 ROFOn; // 1: on, 0:off ++ u16 gpio_period; // unit: 1024 us ++}__attribute__ ((packed)); ++ ++ ++typedef struct JOINBSSRPT_PARM{ ++ u8 OpMode; // RT_MEDIA_STATUS ++}JOINBSSRPT_PARM, *PJOINBSSRPT_PARM; ++ ++typedef struct _RSVDPAGE_LOC{ ++ u8 LocProbeRsp; ++ u8 LocPsPoll; ++ u8 LocNullData; ++}RSVDPAGE_LOC, *PRSVDPAGE_LOC; ++ ++struct P2P_PS_Offload_t { ++ unsigned char Offload_En:1; ++ unsigned char role:1; // 1: Owner, 0: Client ++ unsigned char CTWindow_En:1; ++ unsigned char NoA0_En:1; ++ unsigned char NoA1_En:1; ++ unsigned char AllStaSleep:1; // Only valid in Owner ++ unsigned char discovery:1; ++ unsigned char rsvd:1; ++}; ++ ++struct P2P_PS_CTWPeriod_t { ++ unsigned char CTWPeriod; //TU ++}; ++ ++// host message to firmware cmd ++void rtl8192c_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); ++void rtl8192c_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); ++u8 rtl8192c_set_rssi_cmd(_adapter*padapter, u8 *param); ++u8 rtl8192c_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); ++u8 rtl8192c_set_raid64_cmd(_adapter*padapter, u32 mask, u8 arg); ++void rtl8192c_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); ++u8 rtl8192c_set_FwSelectSuspend_cmd(_adapter*padapter,u8 bfwpoll, u16 period); ++#ifdef CONFIG_P2P ++void rtl8192c_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_IOL ++typedef struct _IO_OFFLOAD_LOC{ ++ u8 LocCmd; ++}IO_OFFLOAD_LOC, *PIO_OFFLOAD_LOC; ++int rtl8192c_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++#endif //CONFIG_IOL ++ ++#endif ++#ifdef CONFIG_WOWLAN ++void rtl8192c_set_wowlan_cmd(_adapter* padapter); ++void SetFwRelatedForWoWLAN8192CU(_adapter* padapter,u8 bHostIsGoingtoSleep); ++#endif // CONFIG_WOWLAN +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_dm.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,616 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192C_DM_H__ ++#define __RTL8192C_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++ ++#define RSSI_CCK 0 ++#define RSSI_OFDM 1 ++#define RSSI_DEFAULT 2 ++ ++#define OFDM_TABLE_SIZE 37 ++#define CCK_TABLE_SIZE 33 ++ ++static u32 OFDMSwingTable[OFDM_TABLE_SIZE] = { ++ 0x7f8001fe, // 0, +6.0dB ++ 0x788001e2, // 1, +5.5dB ++ 0x71c001c7, // 2, +5.0dB ++ 0x6b8001ae, // 3, +4.5dB ++ 0x65400195, // 4, +4.0dB ++ 0x5fc0017f, // 5, +3.5dB ++ 0x5a400169, // 6, +3.0dB ++ 0x55400155, // 7, +2.5dB ++ 0x50800142, // 8, +2.0dB ++ 0x4c000130, // 9, +1.5dB ++ 0x47c0011f, // 10, +1.0dB ++ 0x43c0010f, // 11, +0.5dB ++ 0x40000100, // 12, +0dB ++ 0x3c8000f2, // 13, -0.5dB ++ 0x390000e4, // 14, -1.0dB ++ 0x35c000d7, // 15, -1.5dB ++ 0x32c000cb, // 16, -2.0dB ++ 0x300000c0, // 17, -2.5dB ++ 0x2d4000b5, // 18, -3.0dB ++ 0x2ac000ab, // 19, -3.5dB ++ 0x288000a2, // 20, -4.0dB ++ 0x26000098, // 21, -4.5dB ++ 0x24000090, // 22, -5.0dB ++ 0x22000088, // 23, -5.5dB ++ 0x20000080, // 24, -6.0dB ++ 0x1e400079, // 25, -6.5dB ++ 0x1c800072, // 26, -7.0dB ++ 0x1b00006c, // 27. -7.5dB ++ 0x19800066, // 28, -8.0dB ++ 0x18000060, // 29, -8.5dB ++ 0x16c0005b, // 30, -9.0dB ++ 0x15800056, // 31, -9.5dB ++ 0x14400051, // 32, -10.0dB ++ 0x1300004c, // 33, -10.5dB ++ 0x12000048, // 34, -11.0dB ++ 0x11000044, // 35, -11.5dB ++ 0x10000040, // 36, -12.0dB ++}; ++ ++static u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { ++{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, // 0, +0dB ++{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, // 1, -0.5dB ++{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, // 2, -1.0dB ++{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, // 3, -1.5dB ++{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, // 4, -2.0dB ++{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, // 5, -2.5dB ++{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, // 6, -3.0dB ++{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, // 7, -3.5dB ++{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, // 8, -4.0dB ++{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, // 9, -4.5dB ++{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, // 10, -5.0dB ++{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, // 11, -5.5dB ++{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, // 12, -6.0dB ++{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, // 13, -6.5dB ++{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, // 14, -7.0dB ++{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, // 15, -7.5dB ++{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, // 16, -8.0dB ++{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, // 17, -8.5dB ++{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, // 18, -9.0dB ++{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 19, -9.5dB ++{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, // 20, -10.0dB ++{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 21, -10.5dB ++{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, // 22, -11.0dB ++{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, // 23, -11.5dB ++{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, // 24, -12.0dB ++{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, // 25, -12.5dB ++{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, // 26, -13.0dB ++{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, // 27, -13.5dB ++{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, // 28, -14.0dB ++{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, // 29, -14.5dB ++{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, // 30, -15.0dB ++{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, // 31, -15.5dB ++{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} // 32, -16.0dB ++}; ++ ++static u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]= { ++{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, // 0, +0dB ++{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, // 1, -0.5dB ++{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, // 2, -1.0dB ++{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, // 3, -1.5dB ++{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, // 4, -2.0dB ++{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, // 5, -2.5dB ++{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, // 6, -3.0dB ++{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, // 7, -3.5dB ++{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, // 8, -4.0dB ++{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, // 9, -4.5dB ++{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, // 10, -5.0dB ++{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 11, -5.5dB ++{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, // 12, -6.0dB ++{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, // 13, -6.5dB ++{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, // 14, -7.0dB ++{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 15, -7.5dB ++{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, // 16, -8.0dB ++{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 17, -8.5dB ++{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, // 18, -9.0dB ++{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 19, -9.5dB ++{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, // 20, -10.0dB ++{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, // 21, -10.5dB ++{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, // 22, -11.0dB ++{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 23, -11.5dB ++{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, // 24, -12.0dB ++{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, // 25, -12.5dB ++{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 26, -13.0dB ++{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, // 27, -13.5dB ++{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 28, -14.0dB ++{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, // 29, -14.5dB ++{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 30, -15.0dB ++{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, // 31, -15.5dB ++{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} // 32, -16.0dB ++}; ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u32 Cnt_Parity_Fail; ++ u32 Cnt_Rate_Illegal; ++ u32 Cnt_Crc8_fail; ++ u32 Cnt_Mcs_fail; ++ u32 Cnt_Ofdm_fail; ++ u32 Cnt_Cck_fail; ++ u32 Cnt_all; ++ u32 Cnt_Fast_Fsync; ++ u32 Cnt_SB_Search_fail; ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 PreRFState; ++ u8 CurRFState; ++ ++ s32 Rssi_val_min; ++ ++}PS_T; ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ u8 Dig_Enable_Flag; ++ u8 Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u32 FALowThresh; ++ u32 FAHighThresh; ++ ++ u8 CurSTAConnectState; ++ u8 PreSTAConnectState; ++ u8 CurMultiSTAConnectState; ++ ++ u8 PreIGValue; ++ u8 CurIGValue; ++ u8 BackupIGValue; ++ ++ char BackoffVal; ++ char BackoffVal_range_max; ++ char BackoffVal_range_min; ++ u8 rx_gain_range_max; ++ u8 rx_gain_range_min; ++ u8 Rssi_val_min; ++ ++ u8 PreCCKPDState; ++ u8 CurCCKPDState; ++ u8 PreCCKFAState; ++ u8 CurCCKFAState; ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 LargeFAHit; ++ u8 ForbiddenIGI; ++ u32 Recover_cnt; ++ ++}DIG_T; ++ ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_1R =0, ++ CCA_2R = 1, ++ CCA_MAX = 2, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++ ++typedef enum _BT_Ant_NUM{ ++ Ant_x2 = 0, ++ Ant_x1 = 1 ++} BT_Ant_NUM, *PBT_Ant_NUM; ++ ++typedef enum _BT_CoType{ ++ BT_2Wire = 0, ++ BT_ISSC_3Wire = 1, ++ BT_Accel = 2, ++ BT_CSR_BC4 = 3, ++ BT_CSR_BC8 = 4, ++ BT_RTL8756 = 5, ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_CurState{ ++ BT_OFF = 0, ++ BT_ON = 1, ++} BT_CurState, *PBT_CurState; ++ ++typedef enum _BT_ServiceType{ ++ BT_SCO = 0, ++ BT_A2DP = 1, ++ BT_HID = 2, ++ BT_HID_Idle = 3, ++ BT_Scan = 4, ++ BT_Idle = 5, ++ BT_OtherAction = 6, ++ BT_Busy = 7, ++ BT_OtherBusy = 8, ++ BT_PAN = 9, ++} BT_ServiceType, *PBT_ServiceType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++struct btcoexist_priv { ++ u8 BT_Coexist; ++ u8 BT_Ant_Num; ++ u8 BT_CoexistType; ++ u8 BT_State; ++ u8 BT_CUR_State; //0:on, 1:off ++ u8 BT_Ant_isolation; //0:good, 1:bad ++ u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic ++ u8 BT_Service; ++ u8 BT_Ampdu; // 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++ u8 BT_RadioSharedType; ++ u32 Ratio_Tx; ++ u32 Ratio_PRI; ++ u8 BtRfRegOrigin1E; ++ u8 BtRfRegOrigin1F; ++ u8 BtRssiState; ++ u32 BtEdcaUL; ++ u32 BtEdcaDL; ++ u32 BT_EDCA[2]; ++ u8 bCOBT; ++ ++ u8 bInitSet; ++ u8 bBTBusyTraffic; ++ u8 bBTTrafficModeSet; ++ u8 bBTNonTrafficModeSet; ++ //BTTraffic BT21TrafficStatistics; ++ u32 CurrentState; ++ u32 PreviousState; ++ u8 BtPreRssiState; ++ u8 bFWCoexistAllOff; ++ u8 bSWCoexistAllOff; ++}; ++ ++#define BW_AUTO_SWITCH_HIGH_LOW 25 ++#define BW_AUTO_SWITCH_LOW_HIGH 30 ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX 0x3e ++#define DM_DIG_MIN 0x1e //0x22//0x1c ++ ++#define DM_DIG_FA_UPPER 0x32 ++#define DM_DIG_FA_LOWER 0x20 ++#define DM_DIG_FA_TH0 0x20 ++#define DM_DIG_FA_TH1 0x100 ++#define DM_DIG_FA_TH2 0x200 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN (-4) ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define RxPathSelection_SS_TH_low 30 ++#define RxPathSelection_diff_TH 18 ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++ ++#define CTSToSelfTHVal 30 ++#define RegC38_TH 20 ++ ++#define WAIotTHVal 25 ++ ++//Dynamic Tx Power Control Threshold ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++ ++typedef struct _RATE_ADAPTIVE ++{ ++ u8 RateAdaptiveDisabled; ++ u8 RATRState; ++ u16 reserve; ++ ++ u32 HighRSSIThreshForRA; ++ u32 High2LowRSSIThreshForRA; ++ u8 Low2HighRSSIThreshForRA40M; ++ u32 LowRSSIThreshForRA40M; ++ u8 Low2HighRSSIThreshForRA20M; ++ u32 LowRSSIThreshForRA20M; ++ u32 UpperRSSIThresholdRATR; ++ u32 MiddleRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR40M; ++ u32 LowRSSIThresholdRATR20M; ++ u8 PingRSSIEnable; //cosa add for Netcore long range ping issue ++ u32 PingRSSIRATR; //cosa add for Netcore long range ping issue ++ u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue ++ u32 LastRATR; ++ u8 PreRATRState; ++ ++} RATE_ADAPTIVE, *PRATE_ADAPTIVE; ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_B = 1, ++ Antenna_A = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++// This indicates two different the steps. ++// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. ++// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK ++// with original RSSI to determine if it is necessary to switch antenna. ++#define SWAW_STEP_PEAK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++ ++typedef struct _SW_Antenna_Switch_ ++{ ++ u8 try_flag; ++ s32 PreRSSI; ++ u8 CurAntenna; ++ u8 PreAntenna; ++ u8 RSSI_Trying; ++ u8 TestMode; ++ u8 bTriggerAntennaSwitch; ++ u8 SelectAntennaMap; ++ // Before link Antenna Switch check ++ u8 SWAS_NoLink_State; ++ ++}SWAT_T; ++ ++ ++#endif ++ ++ ++struct dm_priv ++{ ++ u8 DM_Type; ++ u8 DMFlag, DMFlag_tmp; ++ ++ ++ //for DIG ++ u8 bDMInitialGainEnable; ++ u8 binitialized; // for dm_initial_gain_Multi_STA use. ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u8 bUseRAMask; ++ RATE_ADAPTIVE RateAdaptive; ++ ++ //* Upper and Lower Signal threshold for Rate Adaptive*/ ++ int UndecoratedSmoothedPWDB; ++ int UndecoratedSmoothedCCK; ++ int EntryMinUndecoratedSmoothedPWDB; ++ int EntryMaxUndecoratedSmoothedPWDB; ++ ++ ++ //for High Power ++ u8 bDynamicTxPowerEnable; ++ u8 LastDTPLvl; ++ u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 ++ ++ //for tx power tracking ++ //u8 bTXPowerTracking; ++ u8 TXPowercount; ++ u8 bTXPowerTrackingInit; ++ u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u8 TM_Trigger; ++ ++ u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u8 ThermalValue; ++ u8 ThermalValue_LCK; ++ u8 ThermalValue_IQK; ++ u8 ThermalValue_DPK; ++ ++ u8 bRfPiEnable; ++ ++ //for APK ++ u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u8 bAPKdone; ++ u8 bAPKThermalMeterIgnore; ++ u8 bDPdone; ++ u8 bDPPathAOK; ++ u8 bDPPathBOK; ++ ++ //for IQK ++ u32 RegC04; ++ u32 Reg874; ++ u32 RegC08; ++ u32 RegB68; ++ u32 RegB6C; ++ u32 Reg870; ++ u32 Reg860; ++ u32 Reg864; ++ u32 ADDA_backup[IQK_ADDA_REG_NUM]; ++ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u32 IQK_BB_backup_recover[9]; ++ u32 IQK_BB_backup[IQK_BB_REG_NUM]; ++ u8 PowerIndex_backup[6]; ++ ++ u8 bCCKinCH14; ++ ++ char CCK_index; ++ char OFDM_index[2]; ++ ++ BOOLEAN bDoneTxpower; ++ char CCK_index_HP; ++ char OFDM_index_HP[2]; ++ u8 ThermalValue_HP[HP_THERMAL_NUM]; ++ u8 ThermalValue_HP_index; ++ ++ //for TxPwrTracking ++ int RegE94; ++ int RegE9C; ++ int RegEB4; ++ int RegEBC; ++ ++ u32 TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u32 prv_traffic_idx; // edca turbo ++ ++ // for dm_RF_Saving ++ u8 initialize; ++ u32 rf_saving_Reg874; ++ u32 rf_saving_RegC70; ++ u32 rf_saving_Reg85C; ++ u32 rf_saving_RegA74; ++ ++ //for Antenna diversity ++#ifdef CONFIG_ANTENNA_DIVERSITY ++ SWAT_T DM_SWAT_Table; ++#endif ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ _timer SwAntennaSwitchTimer; ++ ++ u64 lastTxOkCnt; ++ u64 lastRxOkCnt; ++ u64 TXByteCnt_A; ++ u64 TXByteCnt_B; ++ u64 RXByteCnt_A; ++ u64 RXByteCnt_B; ++ u8 DoubleComfirm; ++ u8 TrafficLoad; ++#endif ++ ++ s32 OFDM_Pkt_Cnt; ++ u8 RSSI_Select; ++ u8 DIG_Dynamic_MIN ; ++ ++ // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas ++ u8 INIDATA_RATE[32]; ++}; ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++ ++//============================================================ ++// function prototype ++//============================================================ ++void rtl8192c_init_dm_priv(IN PADAPTER Adapter); ++void rtl8192c_deinit_dm_priv(IN PADAPTER Adapter); ++void rtl8192c_InitHalDm(IN PADAPTER Adapter); ++void rtl8192c_HalDmWatchDog(IN PADAPTER Adapter); ++ ++VOID rtl8192c_dm_CheckTXPowerTracking(IN PADAPTER Adapter); ++ ++void rtl8192c_dm_RF_Saving(IN PADAPTER pAdapter, IN u8 bForceInNormal); ++ ++#ifdef CONFIG_BT_COEXIST ++void rtl8192c_set_dm_bt_coexist(_adapter *padapter, u8 bStart); ++void rtl8192c_issue_delete_ba(_adapter *padapter, u8 dir); ++#endif ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++void SwAntDivRSSICheck8192C(_adapter *padapter ,u32 RxPWDBAll); ++void SwAntDivRestAfterLink8192C(IN PADAPTER Adapter); ++#endif ++#ifdef CONFIG_ANTENNA_DIVERSITY ++void SwAntDivCompare8192C(PADAPTER Adapter, WLAN_BSSID_EX *dst, WLAN_BSSID_EX *src); ++u8 SwAntDivBeforeLink8192C(IN PADAPTER Adapter); ++#endif ++ ++#endif //__HAL8190PCIDM_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_event.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,29 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL8192C_EVENT_H_ ++#define _RTL8192C_EVENT_H_ ++ ++ ++ ++ ++#endif ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_hal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_hal.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,887 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192C_HAL_H__ ++#define __RTL8192C_HAL_H__ ++ ++#include "rtl8192c_spec.h" ++#include "Hal8192CPhyReg.h" ++#include "Hal8192CPhyCfg.h" ++#include "rtl8192c_rf.h" ++#include "rtl8192c_dm.h" ++#include "rtl8192c_recv.h" ++#include "rtl8192c_xmit.h" ++#include "rtl8192c_cmd.h" ++#ifdef DBG_CONFIG_ERROR_DETECT ++#include "rtl8192c_sreset.h" ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ ++ #include "Hal8192CEHWImg.h" ++ ++ #define RTL819X_DEFAULT_RF_TYPE RF_2T2R ++ //#define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ #define RTL819X_TOTAL_RF_PATH 2 ++ ++ //2TODO: The following need to check!! ++ #define RTL8192C_FW_TSMC_IMG "rtl8192CE\\rtl8192cfwT.bin" ++ #define RTL8192C_FW_UMC_IMG "rtl8192CE\\rtl8192cfwU.bin" ++ #define RTL8192C_FW_UMC_B_IMG "rtl8192CE\\rtl8192cfwU_B.bin" ++ ++ #define RTL8188C_PHY_REG "rtl8192CE\\PHY_REG_1T.txt" ++ #define RTL8188C_PHY_RADIO_A "rtl8192CE\\radio_a_1T.txt" ++ #define RTL8188C_PHY_RADIO_B "rtl8192CE\\radio_b_1T.txt" ++ #define RTL8188C_AGC_TAB "rtl8192CE\\AGC_TAB_1T.txt" ++ #define RTL8188C_PHY_MACREG "rtl8192CE\\MACREG_1T.txt" ++ ++ #define RTL8192C_PHY_REG "rtl8192CE\\PHY_REG_2T.txt" ++ #define RTL8192C_PHY_RADIO_A "rtl8192CE\\radio_a_2T.txt" ++ #define RTL8192C_PHY_RADIO_B "rtl8192CE\\radio_b_2T.txt" ++ #define RTL8192C_AGC_TAB "rtl8192CE\\AGC_TAB_2T.txt" ++ #define RTL8192C_PHY_MACREG "rtl8192CE\\MACREG_2T.txt" ++ ++ #define RTL819X_PHY_MACPHY_REG "rtl8192CE\\MACPHY_reg.txt" ++ #define RTL819X_PHY_MACPHY_REG_PG "rtl8192CE\\MACPHY_reg_PG.txt" ++ #define RTL819X_PHY_MACREG "rtl8192CE\\MAC_REG.txt" ++ #define RTL819X_PHY_REG "rtl8192CE\\PHY_REG.txt" ++ #define RTL819X_PHY_REG_1T2R "rtl8192CE\\PHY_REG_1T2R.txt" ++ #define RTL819X_PHY_REG_to1T1R "rtl8192CE\\phy_to1T1R_a.txt" ++ #define RTL819X_PHY_REG_to1T2R "rtl8192CE\\phy_to1T2R.txt" ++ #define RTL819X_PHY_REG_to2T2R "rtl8192CE\\phy_to2T2R.txt" ++ #define RTL819X_PHY_REG_PG "rtl8192CE\\PHY_REG_PG.txt" ++ #define RTL819X_AGC_TAB "rtl8192CE\\AGC_TAB.txt" ++ #define RTL819X_PHY_RADIO_A "rtl8192CE\\radio_a.txt" ++ #define RTL819X_PHY_RADIO_A_1T "rtl8192CE\\radio_a_1t.txt" ++ #define RTL819X_PHY_RADIO_A_2T "rtl8192CE\\radio_a_2t.txt" ++ #define RTL819X_PHY_RADIO_B "rtl8192CE\\radio_b.txt" ++ #define RTL819X_PHY_RADIO_B_GM "rtl8192CE\\radio_b_gm.txt" ++ #define RTL819X_PHY_RADIO_C "rtl8192CE\\radio_c.txt" ++ #define RTL819X_PHY_RADIO_D "rtl8192CE\\radio_d.txt" ++ #define RTL819X_EEPROM_MAP "rtl8192CE\\8192ce.map" ++ #define RTL819X_EFUSE_MAP "rtl8192CE\\8192ce.map" ++ ++//--------------------------------------------------------------------- ++// RTL8723E From file ++//--------------------------------------------------------------------- ++ #define RTL8723_FW_UMC_IMG "rtl8723E\\rtl8723fw.bin" ++ #define RTL8723_PHY_REG "rtl8723E\\PHY_REG_1T.txt" ++ #define RTL8723_PHY_RADIO_A "rtl8723E\\radio_a_1T.txt" ++ #define RTL8723_PHY_RADIO_B "rtl8723E\\radio_b_1T.txt" ++ #define RTL8723_AGC_TAB "rtl8723E\\AGC_TAB_1T.txt" ++ #define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt" ++ #define RTL8723_PHY_MACREG "rtl8723E\\MAC_REG.txt" ++ #define RTL8723_PHY_REG_PG "rtl8723E\\PHY_REG_PG.txt" ++ #define RTL8723_PHY_REG_MP "rtl8723E\\PHY_REG_MP.txt" ++ ++ // The file name "_2T" is for 92CE, "_1T" is for 88CE. Modified by tynli. 2009.11.24. ++ #define Rtl819XFwTSMCImageArray Rtl8192CEFwTSMCImgArray ++ #define Rtl819XFwUMCACutImageArray Rtl8192CEFwUMCACutImgArray ++ #define Rtl819XFwUMCBCutImageArray Rtl8192CEFwUMCBCutImgArray ++ ++ #define Rtl8723FwUMCImageArray Rtl8192CEFwUMC8723ImgArray ++ #define Rtl819XMAC_Array Rtl8192CEMAC_2T_Array ++ #define Rtl819XAGCTAB_2TArray Rtl8192CEAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192CEAGCTAB_1TArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192CEPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192CEPHY_REG_1TArray ++ #define Rtl819XRadioA_2TArray Rtl8192CERadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192CERadioA_1TArray ++ #define Rtl819XRadioB_2TArray Rtl8192CERadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192CERadioB_1TArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192CEPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_MP Rtl8192CEPHY_REG_Array_MP ++ ++#elif defined(CONFIG_USB_HCI) ++ ++ #include "Hal8192CUHWImg.h" ++#ifdef CONFIG_WOWLAN ++ #include "Hal8192CUHWImg_wowlan.h" ++#endif //CONFIG_WOWLAN ++ //2TODO: We should define 8192S firmware related macro settings here!! ++ #define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ #define RTL819X_TOTAL_RF_PATH 2 ++ ++ //TODO: The following need to check!! ++ #define RTL8192C_FW_TSMC_IMG "rtl8192CU\\rtl8192cfwT.bin" ++ #define RTL8192C_FW_UMC_IMG "rtl8192CU\\rtl8192cfwU.bin" ++ #define RTL8192C_FW_UMC_B_IMG "rtl8192CU\\rtl8192cfwU_B.bin" ++ #define RTL8192C_FW_TSMC_WW_IMG "rtl8192CU\\rtl8192cfwTww.bin" ++ #define RTL8192C_FW_UMC_WW_IMG "rtl8192CU\\rtl8192cfwUww.bin" ++ #define RTL8192C_FW_UMC_B_WW_IMG "rtl8192CU\\rtl8192cfwU_Bww.bin" ++ //#define RTL819X_FW_BOOT_IMG "rtl8192CU\\boot.img" ++ //#define RTL819X_FW_MAIN_IMG "rtl8192CU\\main.img" ++ //#define RTL819X_FW_DATA_IMG "rtl8192CU\\data.img" ++ ++ #define RTL8188C_PHY_REG "rtl8188CU\\PHY_REG.txt" ++ #define RTL8188C_PHY_RADIO_A "rtl8188CU\\radio_a.txt" ++ #define RTL8188C_PHY_RADIO_B "rtl8188CU\\radio_b.txt" ++ #define RTL8188C_PHY_RADIO_A_mCard "rtl8192CU\\radio_a_1T_mCard.txt" ++ #define RTL8188C_PHY_RADIO_B_mCard "rtl8192CU\\radio_b_1T_mCard.txt" ++ #define RTL8188C_PHY_RADIO_A_HP "rtl8192CU\\radio_a_1T_HP.txt" ++ #define RTL8188C_AGC_TAB "rtl8188CU\\AGC_TAB.txt" ++ #define RTL8188C_PHY_MACREG "rtl8188CU\\MACREG.txt" ++ ++ #define RTL8192C_PHY_REG "rtl8192CU\\PHY_REG.txt" ++ #define RTL8192C_PHY_RADIO_A "rtl8192CU\\radio_a.txt" ++ #define RTL8192C_PHY_RADIO_B "rtl8192CU\\radio_b.txt" ++ #define RTL8192C_AGC_TAB "rtl8192CU\\AGC_TAB.txt" ++ #define RTL8192C_PHY_MACREG "rtl8192CU\\MACREG.txt" ++ ++ #define RTL819X_PHY_REG_PG "rtl8192CU\\PHY_REG_PG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8723U From file ++//--------------------------------------------------------------------- ++ #define RTL8723_FW_UMC_IMG "rtl8723U\\rtl8723fw.bin" ++ #define RTL8723_PHY_REG "rtl8723U\\PHY_REG_1T.txt" ++ #define RTL8723_PHY_RADIO_A "rtl8723U\\radio_a_1T.txt" ++ #define RTL8723_PHY_RADIO_B "rtl8723U\\radio_b_1T.txt" ++ #define RTL8723_AGC_TAB "rtl8723U\\AGC_TAB_1T.txt" ++ #define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt" ++ #define RTL8723_PHY_MACREG "rtl8723U\\MAC_REG.txt" ++ #define RTL8723_PHY_REG_PG "rtl8723U\\PHY_REG_PG.txt" ++ #define RTL8723_PHY_REG_MP "rtl8723U\\PHY_REG_MP.txt" ++ ++ // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. ++ #define Rtl819XFwImageArray Rtl8192CUFwTSMCImgArray ++ #define Rtl819XFwTSMCImageArray Rtl8192CUFwTSMCImgArray ++ #define Rtl819XFwUMCACutImageArray Rtl8192CUFwUMCACutImgArray ++ #define Rtl819XFwUMCBCutImageArray Rtl8192CUFwUMCBCutImgArray ++#ifdef CONFIG_WOWLAN ++ #define Rtl8192C_FwTSMCWWImageArray Rtl8192CUFwTSMCWWImgArray ++ #define Rtl8192C_FwUMCWWImageArray Rtl8192CUFwUMCACutWWImgArray ++ #define Rtl8192C_FwUMCBCutWWImageArray Rtl8192CUFwUMCBCutWWImgArray ++#endif //CONFIG_WOWLAN ++ #define Rtl819XMAC_Array Rtl8192CUMAC_2T_Array ++ #define Rtl819XAGCTAB_2TArray Rtl8192CUAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192CUAGCTAB_1TArray ++ #define Rtl819XAGCTAB_1T_HPArray Rtl8192CUAGCTAB_1T_HPArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192CUPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192CUPHY_REG_1TArray ++ #define Rtl819XPHY_REG_1T_mCardArray Rtl8192CUPHY_REG_1T_mCardArray ++ #define Rtl819XPHY_REG_2T_mCardArray Rtl8192CUPHY_REG_2T_mCardArray ++ #define Rtl819XPHY_REG_1T_HPArray Rtl8192CUPHY_REG_1T_HPArray ++ #define Rtl819XRadioA_2TArray Rtl8192CURadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192CURadioA_1TArray ++ #define Rtl819XRadioA_1T_mCardArray Rtl8192CURadioA_1T_mCardArray ++ #define Rtl819XRadioB_2TArray Rtl8192CURadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192CURadioB_1TArray ++ #define Rtl819XRadioB_1T_mCardArray Rtl8192CURadioB_1T_mCardArray ++ #define Rtl819XRadioA_1T_HPArray Rtl8192CURadioA_1T_HPArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192CUPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_PG_mCard Rtl8192CUPHY_REG_Array_PG_mCard ++ #define Rtl819XPHY_REG_Array_PG_HP Rtl8192CUPHY_REG_Array_PG_HP ++ #define Rtl819XPHY_REG_Array_MP Rtl8192CUPHY_REG_Array_MP ++#endif ++ ++#define DRVINFO_SZ 4 // unit is 8bytes ++#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) ++ ++#define FW_8192C_SIZE 16384+32//16k ++#define FW_8192C_START_ADDRESS 0x1000 ++//#define FW_8192C_END_ADDRESS 0x3FFF //Filen said this is for test chip ++#define FW_8192C_END_ADDRESS 0x1FFF ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x2300) ++ ++typedef enum _FIRMWARE_SOURCE{ ++ FW_SOURCE_IMG_FILE = 0, ++ FW_SOURCE_HEADER_FILE = 1, //from header file ++}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; ++ ++typedef struct _RT_FIRMWARE{ ++ FIRMWARE_SOURCE eFWSource; ++ u8* szFwBuffer; ++ u32 ulFwLength; ++#ifdef CONFIG_WOWLAN ++ u8* szWoWLANFwBuffer; ++ u32 ulWoWLANFwLength; ++#endif //CONFIG_WOWLAN ++}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92C, *PRT_FIRMWARE_92C; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8192C_FIRMWARE_HDR {//8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u16 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++ ++}RT_8192C_FIRMWARE_HDR, *PRT_8192C_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME 0x05 ++#define BCN_DMA_ATIME_INT_TIME 0x02 ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ ++typedef enum _USB_RX_AGG_MODE{ ++ USB_RX_AGG_DISABLE, ++ USB_RX_AGG_DMA, ++ USB_RX_AGG_USB, ++ USB_RX_AGG_MIX ++}USB_RX_AGG_MODE; ++ ++#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer ++ ++#endif ++ ++ ++#define TX_SELE_HQ BIT(0) // High Queue ++#define TX_SELE_LQ BIT(1) // Low Queue ++#define TX_SELE_NQ BIT(2) // Normal Queue ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++#define TX_TOTAL_PAGE_NUMBER 0xF8 ++#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_PUBQ 0xE7 ++#define NORMAL_PAGE_NUM_HPQ 0x0C ++#define NORMAL_PAGE_NUM_LPQ 0x02 ++#define NORMAL_PAGE_NUM_NPQ 0x02 ++ ++ ++// For Test Chip Setting ++// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define TEST_PAGE_NUM_PUBQ 0x7E ++ ++ ++// For Test Chip Setting ++#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 ++#define WMM_TEST_PAGE_NUM_HPQ 0x29 ++#define WMM_TEST_PAGE_NUM_LPQ 0x29 ++ ++ ++//Note: For Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 ++#define WMM_NORMAL_PAGE_NUM_HPQ 0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C ++#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++// ++// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. ++// ++/* ++ | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | ++ |-------------+-----------+-----------+-------+-----------+-------| ++ | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | ++ | | | TSMC/UMC | | TEST/NORMAL| | ++*/ ++// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 ++// [7] Manufacturer: TSMC=0, UMC=1 ++// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 ++// [3] Chip type: TEST=0, NORMAL=1 ++// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 ++ ++#define CHIP_8723 BIT(0) ++#define CHIP_92D BIT(1) ++#define NORMAL_CHIP BIT(3) ++#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) ++#define RF_TYPE_1T2R BIT(4) ++#define RF_TYPE_2T2R BIT(5) ++#define CHIP_VENDOR_UMC BIT(7) ++#define B_CUT_VERSION BIT(12) ++#define C_CUT_VERSION BIT(13) ++#define D_CUT_VERSION ((BIT(13)|BIT(14))) ++ ++ ++// MASK ++#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) ++#define CHIP_TYPE_MASK BIT(3) ++#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) ++#define MANUFACTUER_MASK BIT(7) ++#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) ++#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) ++ ++// Get element ++#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) ++#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) ++#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) ++#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) ++#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) ++#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) ++ ++#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) ++#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) ++#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) ++#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) ++#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) ++#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) ++#define IS_NORMAL_CHIP(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) ++#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) ++ ++#define IS_81XXC_TEST_CHIP(version) ((IS_81XXC(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE) ++#define IS_92D_TEST_CHIP(version) ((IS_92D(version) && (!IS_NORMAL_CHIP(version)))? _TRUE: _FALSE) ++#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) ++#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. ++#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) ++#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) ++#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x2) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == 0x3) ? _TRUE : _FALSE) : _FALSE) ++ ++typedef enum _VERSION_8192C{ ++ VERSION_TEST_CHIP_88C = 0x0000, ++ VERSION_TEST_CHIP_92C = 0x0020, ++ VERSION_TEST_UMC_CHIP_8723 = 0x0081, ++ VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, ++ VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, ++ VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, ++ VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, ++ VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, ++ VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, ++ VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, ++ VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, ++ VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, ++ VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, ++ VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, ++}VERSION_8192C,*PVERSION_8192C; ++ ++ ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++enum ChannelPlan{ ++ CHPL_FCC = 0, ++ CHPL_IC = 1, ++ CHPL_ETSI = 2, ++ CHPL_SPAIN = 3, ++ CHPL_FRANCE = 4, ++ CHPL_MKK = 5, ++ CHPL_MKK1 = 6, ++ CHPL_ISRAEL = 7, ++ CHPL_TELEC = 8, ++ CHPL_GLOBAL = 9, ++ CHPL_WORLD = 10, ++}; ++ ++typedef struct _TxPowerInfo{ ++ u8 CCKIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_1SIndex[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_2SIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT20IndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 OFDMIndexDiff[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT20MaxOffset[RF90_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 TSSI_A; ++ u8 TSSI_B; ++}TxPowerInfo, *PTxPowerInfo; ++ ++#define EFUSE_REAL_CONTENT_LEN 512 ++#define EFUSE_MAP_LEN 128 ++#define EFUSE_MAX_SECTION 16 ++#define EFUSE_IC_ID_OFFSET 506 //For some inferiority IC purpose. added by Roger, 2009.09.02. ++#define AVAILABLE_EFUSE_ADDR(addr) (addr < EFUSE_REAL_CONTENT_LEN) ++// ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 1byte|----8bytes----|1byte|--5bytes--| ++// | | Reserved(14bytes) | ++// ++#define EFUSE_OOB_PROTECT_BYTES 15 // PG data exclude header, dummy 6 bytes frome CP test and reserved 1byte. ++ ++ ++#define EFUSE_MAP_LEN_8723 256 ++#define EFUSE_MAX_SECTION_8723 32 ++ ++//======================================================== ++// EFUSE for BT definition ++//======================================================== ++#define EFUSE_BT_REAL_CONTENT_LEN 1536 // 512*3 ++#define EFUSE_BT_MAP_LEN 1024 // 1k bytes ++#define EFUSE_BT_MAX_SECTION 128 // 1024/8 ++ ++#define EFUSE_PROTECT_BYTES_BANK 16 ++ ++// ++// For RTL8723 WiFi/BT/GPS multi-function configuration. 2010.10.06. ++// ++typedef enum _RT_MULTI_FUNC{ ++ RT_MULTI_FUNC_NONE = 0x00, ++ RT_MULTI_FUNC_WIFI = 0x01, ++ RT_MULTI_FUNC_BT = 0x02, ++ RT_MULTI_FUNC_GPS = 0x04, ++}RT_MULTI_FUNC,*PRT_MULTI_FUNC; ++ ++// ++// For RTL8723 WiFi PDn/GPIO polarity control configuration. 2010.10.08. ++// ++typedef enum _RT_POLARITY_CTL{ ++ RT_POLARITY_LOW_ACT = 0, ++ RT_POLARITY_HIGH_ACT = 1, ++}RT_POLARITY_CTL,*PRT_POLARITY_CTL; ++ ++// For RTL8723 regulator mode. by tynli. 2011.01.14. ++typedef enum _RT_REGULATOR_MODE{ ++ RT_SWITCHING_REGULATOR = 0, ++ RT_LDO_REGULATOR = 1, ++}RT_REGULATOR_MODE,*PRT_REGULATOR_MODE; ++ ++#ifdef CONFIG_PCI_HCI ++struct hal_data_8192ce ++{ ++ VERSION_8192C VersionID; ++ RT_MULTI_FUNC MultiFunc; // For multi-function consideration. ++ RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. ++ RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ u32 IntrMask[2]; ++ u32 IntrMaskToSet[2]; ++ ++ u32 DisabledFunctions; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ u32 TransmitConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ _lock rf_lock; ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ INTERFACE_SELECT_8192CPCIe InterfaceSel; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMDID; ++ u16 EEPROMSVID; ++ u16 EEPROMSMID; ++ u16 EEPROMChannelPlan; ++ u16 EEPROMVersion; ++ ++ u8 EEPROMChnlAreaTxPwrCCK[2][3]; ++ u8 EEPROMChnlAreaTxPwrHT40_1S[2][3]; ++ u8 EEPROMChnlAreaTxPwrHT40_2SDiff[2][3]; ++ u8 EEPROMPwrLimitHT20[3]; ++ u8 EEPROMPwrLimitHT40[3]; ++ ++ u8 bTXPowerDataReadFromEEPORM; ++ u8 EEPROMThermalMeter; ++ u8 EEPROMTSSI[2]; ++ ++ u8 EEPROMCustomerID; ++ u8 EEPROMBoardType; ++ u8 EEPROMRegulatory; ++ ++ u8 bDefaultAntenna; ++ u8 bIQKInitialized; ++ ++ u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[7][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ u8 RegTxPause; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 CurAntenna; ++ u8 AntDivCfg; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //SW Antenna Switch ++ s32 RSSI_sum_A; ++ s32 RSSI_sum_B; ++ s32 RSSI_cnt_A; ++ s32 RSSI_cnt_B; ++ BOOLEAN RSSI_test; ++#endif ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ u32 CCK_Ant1_Cnt; ++ u32 CCK_Ant2_Cnt; ++ u32 OFDM_Ant1_Cnt; ++ u32 OFDM_Ant2_Cnt; ++#endif ++ ++ struct dm_priv dmpriv; ++ u8 bDumpRxPkt;//for debug ++#ifdef DBG_CONFIG_ERROR_DETECT ++ struct sreset_priv srestpriv; ++#endif ++ u8 bInterruptMigration; ++ u8 bDisableTxInt; ++ u8 bGpioHwWpsPbc; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ u16 EfuseUsedBytes; ++ ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192ce HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++ ++// ++// Function disabled. ++// ++#define DF_TX_BIT BIT0 ++#define DF_RX_BIT BIT1 ++#define DF_IO_BIT BIT2 ++#define DF_IO_D3_BIT BIT3 ++ ++#define RT_DF_TYPE u32 ++#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) ++#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) ++#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++#define IS_MULTI_FUNC_CHIP(_Adapter) (((((PHAL_DATA_TYPE)(_Adapter->HalData))->MultiFunc) & (RT_MULTI_FUNC_BT|RT_MULTI_FUNC_GPS)) ? _TRUE : _FALSE) ++ ++void InterruptRecognized8192CE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++VOID UpdateInterruptMask8192CE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++struct hal_data_8192cu ++{ ++ VERSION_8192C VersionID; ++ RT_MULTI_FUNC MultiFunc; // For multi-function consideration. ++ RT_POLARITY_CTL PolarityCtl; // For Wifi PDn Polarity control. ++ RT_REGULATOR_MODE RegulatorMode; // switching regulator or LDO ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ u8 BoardType; ++ //INTERFACE_SELECT_8192CUSB InterfaceSel; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMPID; ++ u16 EEPROMSVID; ++ u16 EEPROMSDID; ++ u8 EEPROMCustomerID; ++ u8 EEPROMSubCustomerID; ++ u8 EEPROMVersion; ++ u8 EEPROMRegulatory; ++ ++ u8 bTXPowerDataReadFromEEPORM; ++ u8 EEPROMThermalMeter; ++ ++ u8 bIQKInitialized; ++ ++ u8 TxPwrLevelCck[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 TxPwrLevelHT40_1S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrHt20Diff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF90_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF90_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[7][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ ++ u8 bLedOpenDrain; // Support Open-drain arrangement for controlling the LED. Added by Roger, 2009.10.16. ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ u8 RegTxPause; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ ++ struct dm_priv dmpriv; ++#ifdef DBG_CONFIG_ERROR_DETECT ++ struct sreset_priv srestpriv; ++#endif ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ u8 CurAntenna; ++ u8 AntDivCfg; ++ ++#ifdef CONFIG_SW_ANTENNA_DIVERSITY ++ //SW Antenna Switch ++ s32 RSSI_sum_A; ++ s32 RSSI_sum_B; ++ s32 RSSI_cnt_A; ++ s32 RSSI_cnt_B; ++ BOOLEAN RSSI_test; ++#endif ++#ifdef CONFIG_HW_ANTENNA_DIVERSITY ++ //Hybrid Antenna Diversity ++ u32 CCK_Ant1_Cnt; ++ u32 CCK_Ant2_Cnt; ++ u32 OFDM_Ant1_Cnt; ++ u32 OFDM_Ant2_Cnt; ++#endif ++ ++ u8 bDumpRxPkt;//for debug ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ // 2010/08/09 MH Add CU power down mode. ++ BOOLEAN pwrdown; ++ ++ // For 92C USB endpoint setting ++ // ++ ++ u32 UsbBulkOutSize; ++ ++ int RtBulkOutPipe[3]; ++ int RtBulkInPipe; ++ int RtIntInPipe; ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u8 OutEpQueueSel; ++ u8 OutEpNumber; ++ ++ u8 Queue2EPNum[8];//for out endpoint number mapping ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 UsbTxAggMode; ++ u8 UsbTxAggDescNum; ++#endif ++#ifdef CONFIG_USB_RX_AGGREGATION ++ u16 HwRxPageSize; // Hardware setting ++ u32 MaxUsbRxAggBlock; ++ ++ USB_RX_AGG_MODE UsbRxAggMode; ++ u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed ++ u8 UsbRxAggBlockTimeout; ++ u8 UsbRxAggPageCount; // 8192C DMA page count ++ u8 UsbRxAggPageTimeout; ++#endif ++ ++ // 2010/12/10 MH Add for USB aggreation mode dynamic shceme. ++ BOOLEAN UsbRxHighSpeedMode; ++ ++ // 2010/11/22 MH Add for slim combo debug mode selective. ++ // This is used for fix the drawback of CU TSMC-A/UMC-A cut. HW auto suspend ability. Close BT clock. ++ BOOLEAN SlimComboDbg; ++ ++ u16 EfuseUsedBytes; ++ ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192cu HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++#endif ++ ++#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) ++#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) ++ ++#define INCLUDE_MULTI_FUNC_BT(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_BT) ++#define INCLUDE_MULTI_FUNC_GPS(_Adapter) (GET_HAL_DATA(_Adapter)->MultiFunc & RT_MULTI_FUNC_GPS) ++ ++VOID rtl8192c_FirmwareSelfReset(IN PADAPTER Adapter); ++int FirmwareDownload92C(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); ++VOID InitializeFirmwareVars92C(PADAPTER Adapter); ++u8 GetEEPROMSize8192C(PADAPTER Adapter); ++RT_CHANNEL_DOMAIN _HalMapChannelPlan8192C(PADAPTER Adapter, u8 HalChannelPlan); ++VERSION_8192C rtl8192c_ReadChipVersion(IN PADAPTER Adapter); ++void rtl8192c_ReadBluetoothCoexistInfo(PADAPTER Adapter, u8 *PROMContent, BOOLEAN AutoloadFail); ++void rtl8192c_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg); ++//void rtl8192c_free_hal_data(_adapter * padapter); ++VOID rtl8192c_EfuseParseIDCode(PADAPTER pAdapter, u8 *hwinfo); ++void rtl8192c_set_hal_ops(struct hal_ops *pHalFunc); ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_led.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,43 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192C_LED_H_ ++#define __RTL8192C_LED_H_ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192cu_InitSwLeds(_adapter *padapter); ++void rtl8192cu_DeInitSwLeds(_adapter *padapter); ++#endif ++#ifdef CONFIG_PCI_HCI ++void rtl8192ce_gen_RefreshLedState(PADAPTER Adapter); ++void rtl8192ce_InitSwLeds(_adapter *padapter); ++void rtl8192ce_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_recv.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,183 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL8192C_RECV_H_ ++#define _RTL8192C_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++ #define NR_RECVBUFF (16) ++#elif defined(PLATFORM_OS_CE) ++ #define NR_RECVBUFF (4) ++#else ++#ifdef CONFIG_SINGLE_RECV_BUF ++ #define NR_RECVBUFF (1) ++#else ++ #define NR_RECVBUFF (4) ++#endif //CONFIG_SINGLE_RECV_BUF ++ ++ #define NR_PREALLOC_RECV_SKB (8) ++#endif ++ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ //#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++ ++#elif defined(CONFIG_PCI_HCI) ++#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ #define MAX_RECVBUF_SZ (9100) ++#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++#endif ++ ++#define RX_MPDU_QUEUE 0 ++#define RX_CMD_QUEUE 1 ++#define RX_MAX_QUEUE 2 ++#endif ++ ++ ++#define RECV_BULK_IN_ADDR 0x80 ++#define RECV_INT_IN_ADDR 0x81 ++ ++#define PHY_RSSI_SLID_WIN_MAX 100 ++#define PHY_LINKQUALITY_SLID_WIN_MAX 20 ++ ++ ++struct phy_stat ++{ ++ unsigned int phydw0; ++ ++ unsigned int phydw1; ++ ++ unsigned int phydw2; ++ ++ unsigned int phydw3; ++ ++ unsigned int phydw4; ++ ++ unsigned int phydw5; ++ ++ unsigned int phydw6; ++ ++ unsigned int phydw7; ++}; ++ ++typedef struct _Phy_OFDM_Rx_Status_Report_8192cd ++{ ++ unsigned char trsw_gain_X[4]; ++ unsigned char pwdb_all; ++ unsigned char cfosho_X[4]; ++ unsigned char cfotail_X[4]; ++ unsigned char rxevm_X[2]; ++ unsigned char rxsnr_X[4]; ++ unsigned char pdsnr_X[2]; ++ unsigned char csi_current_X[2]; ++ unsigned char csi_target_X[2]; ++ unsigned char sigevm; ++ unsigned char max_ex_pwr; ++//#ifdef RTL8192SE ++#ifdef CONFIG_LITTLE_ENDIAN ++ unsigned char ex_intf_flg:1; ++ unsigned char sgi_en:1; ++ unsigned char rxsc:2; ++ //unsigned char rsvd:4; ++ unsigned char idle_long:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char ANTSELB:1; ++ unsigned char ANTSEL:1; ++#else // _BIG_ENDIAN_ ++ //unsigned char rsvd:4; ++ unsigned char ANTSEL:1; ++ unsigned char ANTSELB:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char idle_long:1; ++ unsigned char rxsc:2; ++ unsigned char sgi_en:1; ++ unsigned char ex_intf_flg:1; ++#endif ++//#else // RTL8190, RTL8192E ++// unsigned char sgi_en; ++// unsigned char rxsc_sgien_exflg; ++//#endif ++} __attribute__ ((packed))PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; ++ ++typedef struct _Phy_CCK_Rx_Status_Report_8192cd ++{ ++ /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend ++ 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ ++ u8 adc_pwdb_X[4]; ++ u8 SQ_rpt; ++ u8 cck_agc_rpt; ++} PHY_STS_CCK_8192CD_T; ++ ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _INTERRUPT_MSG_FORMAT_EX{ ++ unsigned int C2H_MSG0; ++ unsigned int C2H_MSG1; ++ unsigned int C2H_MSG2; ++ unsigned int C2H_MSG3; ++ unsigned int HISR; // from HISR Reg0x124, read to clear ++ unsigned int HISRE;// from HISRE Reg0x12c, read to clear ++ unsigned int MSG_EX; ++}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; ++ ++void rtl8192cu_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++int rtl8192cu_init_recv_priv(_adapter * padapter); ++void rtl8192cu_free_recv_priv(_adapter * padapter); ++void rtl8192cu_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++int rtl8192ce_init_recv_priv(_adapter * padapter); ++void rtl8192ce_free_recv_priv(_adapter * padapter); ++void rtl8192ce_update_recvframe_attrib_from_recvstat(union recv_frame *precvframe, struct recv_stat *prxstat); ++#endif ++ ++void rtl8192c_query_rx_phy_status(union recv_frame *prframe, struct phy_stat *pphy_stat); ++void rtl8192c_process_phy_info(_adapter *padapter, void *prframe); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_rf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,93 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192c_rf.h ( Header File) ++ * ++ * Note: Collect every HAL RF type exter API or constant. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * ++ * ++******************************************************************************/ ++#ifndef _RTL8192C_RF_H_ ++#define _RTL8192C_RF_H_ ++/* Check to see if the file has been included already. */ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++// ++// For RF 6052 Series ++// ++#define RF6052_MAX_TX_PWR 0x3F ++#define RF6052_MAX_REG 0x3F ++#define RF6052_MAX_PATH 2 ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// RF RL6052 Series API ++// ++void rtl8192c_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate); ++void rtl8192c_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth); ++VOID rtl8192c_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel); ++VOID rtl8192c_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel); ++int PHY_RF6052_Config8192C( IN PADAPTER Adapter ); ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++ ++#endif/* End of HalRf.h */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_spec.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1899 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192C_SPEC_H__ ++#define __RTL8192C_SPEC_H__ ++ ++#include ++ ++#ifndef BIT ++#define BIT(x) (1 << (x)) ++#endif ++ ++#define BIT0 0x00000001 ++#define BIT1 0x00000002 ++#define BIT2 0x00000004 ++#define BIT3 0x00000008 ++#define BIT4 0x00000010 ++#define BIT5 0x00000020 ++#define BIT6 0x00000040 ++#define BIT7 0x00000080 ++#define BIT8 0x00000100 ++#define BIT9 0x00000200 ++#define BIT10 0x00000400 ++#define BIT11 0x00000800 ++#define BIT12 0x00001000 ++#define BIT13 0x00002000 ++#define BIT14 0x00004000 ++#define BIT15 0x00008000 ++#define BIT16 0x00010000 ++#define BIT17 0x00020000 ++#define BIT18 0x00040000 ++#define BIT19 0x00080000 ++#define BIT20 0x00100000 ++#define BIT21 0x00200000 ++#define BIT22 0x00400000 ++#define BIT23 0x00800000 ++#define BIT24 0x01000000 ++#define BIT25 0x02000000 ++#define BIT26 0x04000000 ++#define BIT27 0x08000000 ++#define BIT28 0x10000000 ++#define BIT29 0x20000000 ++#define BIT30 0x40000000 ++#define BIT31 0x80000000 ++ ++ ++//============================================================ ++// 8192C Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL 0x0000 ++#define REG_SYS_FUNC_EN 0x0002 ++#define REG_APS_FSMCO 0x0004 ++#define REG_SYS_CLKR 0x0008 ++#define REG_9346CR 0x000A ++#define REG_EE_VPD 0x000C ++#define REG_AFE_MISC 0x0010 ++#define REG_SPS0_CTRL 0x0011 ++#define REG_SPS_OCP_CFG 0x0018 ++#define REG_RSV_CTRL 0x001C ++#define REG_RF_CTRL 0x001F ++#define REG_LDOA15_CTRL 0x0020 ++#define REG_LDOV12D_CTRL 0x0021 ++#define REG_LDOHCI12_CTRL 0x0022 ++#define REG_LPLDO_CTRL 0x0023 ++#define REG_AFE_XTAL_CTRL 0x0024 ++#define REG_AFE_PLL_CTRL 0x0028 ++#define REG_EFUSE_CTRL 0x0030 ++#define REG_EFUSE_TEST 0x0034 ++#define REG_PWR_DATA 0x0038 ++#define REG_CAL_TIMER 0x003C ++#define REG_ACLK_MON 0x003E ++#define REG_GPIO_MUXCFG 0x0040 ++#define REG_GPIO_IO_SEL 0x0042 ++#define REG_MAC_PINMUX_CFG 0x0043 ++#define REG_GPIO_PIN_CTRL 0x0044 ++#define REG_GPIO_INTM 0x0048 ++#define REG_LEDCFG0 0x004C ++#define REG_LEDCFG1 0x004D ++#define REG_LEDCFG2 0x004E ++#define REG_LEDCFG3 0x004F ++#define REG_LEDCFG REG_LEDCFG2 ++#define REG_FSIMR 0x0050 ++#define REG_FSISR 0x0054 ++#define REG_HSIMR 0x0058 ++#define REG_HSISR 0x005c ++#define REG_GPIO_PIN_CTRL_2 0x0060 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Pin Control. ++#define REG_GPIO_IO_SEL_2 0x0062 // RTL8723 WIFI/BT/GPS Multi-Function GPIO Select. ++#define REG_MULTI_FUNC_CTRL 0x0068 // RTL8723 WIFI/BT/GPS Multi-Function control source. ++#define REG_MCUFWDL 0x0080 ++#define REG_WOWLAN_REASON 0x0081 ++#define REG_HMEBOX_EXT_0 0x0088 ++#define REG_HMEBOX_EXT_1 0x008A ++#define REG_HMEBOX_EXT_2 0x008C ++#define REG_HMEBOX_EXT_3 0x008E ++#define REG_HOST_SUSP_CNT 0x00BC // Host suspend counter on FPGA platform ++#define REG_EFUSE_ACCESS 0x00CF // Efuse access protection for RTL8723 ++#define REG_BIST_SCAN 0x00D0 ++#define REG_BIST_RPT 0x00D4 ++#define REG_BIST_ROM_RPT 0x00D8 ++#define REG_USB_SIE_INTF 0x00E0 ++#define REG_PCIE_MIO_INTF 0x00E4 ++#define REG_PCIE_MIO_INTD 0x00E8 ++#define REG_HPON_FSM 0x00EC ++#define REG_SYS_CFG 0x00F0 ++#define REG_GPIO_OUTSTS 0x00F4 // For RTL8723 only. ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR 0x0100 ++#define REG_PBP 0x0104 ++#define REG_TRXDMA_CTRL 0x010C ++#define REG_TRXFF_BNDY 0x0114 ++#define REG_TRXFF_STATUS 0x0118 ++#define REG_RXFF_PTR 0x011C ++#define REG_HIMR 0x0120 ++#define REG_HISR 0x0124 ++#define REG_HIMRE 0x0128 ++#define REG_HISRE 0x012C ++#define REG_CPWM 0x012F ++#define REG_FWIMR 0x0130 ++#define REG_FWISR 0x0134 ++#define REG_PKTBUF_DBG_CTRL 0x0140 ++#define REG_PKTBUF_DBG_DATA_L 0x0144 ++#define REG_PKTBUF_DBG_DATA_H 0x0148 ++ ++#define REG_TC0_CTRL 0x0150 ++#define REG_TC1_CTRL 0x0154 ++#define REG_TC2_CTRL 0x0158 ++#define REG_TC3_CTRL 0x015C ++#define REG_TC4_CTRL 0x0160 ++#define REG_TCUNIT_BASE 0x0164 ++#define REG_MBIST_START 0x0174 ++#define REG_MBIST_DONE 0x0178 ++#define REG_MBIST_FAIL 0x017C ++#define REG_C2HEVT_MSG_NORMAL 0x01A0 ++#define REG_C2HEVT_CLEAR 0x01AF ++#define REG_C2HEVT_MSG_TEST 0x01B8 ++#define REG_MCUTST_1 0x01c0 ++#define REG_FMETHR 0x01C8 ++#define REG_HMETFR 0x01CC ++#define REG_HMEBOX_0 0x01D0 ++#define REG_HMEBOX_1 0x01D4 ++#define REG_HMEBOX_2 0x01D8 ++#define REG_HMEBOX_3 0x01DC ++ ++#define REG_LLT_INIT 0x01E0 ++#define REG_BB_ACCEESS_CTRL 0x01E8 ++#define REG_BB_ACCESS_DATA 0x01EC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN 0x0200 ++#define REG_FIFOPAGE 0x0204 ++#define REG_TDECTRL 0x0208 ++#define REG_TXDMA_OFFSET_CHK 0x020C ++#define REG_TXDMA_STATUS 0x0210 ++#define REG_RQPN_NPQ 0x0214 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH 0x0280 ++#define REG_RXPKT_NUM 0x0284 ++#define REG_RXDMA_STATUS 0x0288 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG 0x0300 ++#define REG_INT_MIG 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address ++#define REG_DBI 0x0348 // Backdoor REG for Access Configuration ++#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_DBG_SEL 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM ++#define REG_UART_CTRL 0x0364 // UART Control ++#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address ++#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address ++ ++ ++// spec version 11 ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION 0x0400 ++#define REG_VIQ_INFORMATION 0x0404 ++#define REG_BEQ_INFORMATION 0x0408 ++#define REG_BKQ_INFORMATION 0x040C ++#define REG_MGQ_INFORMATION 0x0410 ++#define REG_HGQ_INFORMATION 0x0414 ++#define REG_BCNQ_INFORMATION 0x0418 ++ ++ ++#define REG_CPU_MGQ_INFORMATION 0x041C ++#define REG_FWHW_TXQ_CTRL 0x0420 ++#define REG_HWSEQ_CTRL 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY 0x0425 ++#define REG_LIFETIME_EN 0x0426 ++#define REG_MULTI_BCNQ_OFFSET 0x0427 ++#define REG_SPEC_SIFS 0x0428 ++#define REG_RL 0x042A ++#define REG_DARFRC 0x0430 ++#define REG_RARFRC 0x0438 ++#define REG_RRSR 0x0440 ++#define REG_ARFR0 0x0444 ++#define REG_ARFR1 0x0448 ++#define REG_ARFR2 0x044C ++#define REG_ARFR3 0x0450 ++#define REG_AGGLEN_LMT 0x0458 ++#define REG_AMPDU_MIN_SPACE 0x045C ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D ++#define REG_FAST_EDCA_CTRL 0x0460 ++#define REG_RD_RESP_PKT_TH 0x0463 ++#define REG_INIRTS_RATE_SEL 0x0480 ++#define REG_INIDATA_RATE_SEL 0x0484 ++#define REG_POWER_STATUS 0x04A4 ++#define REG_POWER_STAGE1 0x04B4 ++#define REG_POWER_STAGE2 0x04B8 ++#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 ++#define REG_STBC_SETTING 0x04C4 ++#define REG_PROT_MODE_CTRL 0x04C8 ++#define REG_MAX_AGGR_NUM 0x04CA ++#define REG_RTS_MAX_AGGR_NUM 0x04CB ++#define REG_BAR_MODE_CTRL 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT 0x04CF ++#define REG_NQOS_SEQ 0x04DC ++#define REG_QOS_SEQ 0x04DE ++#define REG_NEED_CPU_HANDLE 0x04E0 ++#define REG_PKT_LOSE_RPT 0x04E1 ++#define REG_PTCL_ERR_STATUS 0x04E2 ++#define REG_DUMMY 0x04FC ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM 0x0500 ++#define REG_EDCA_VI_PARAM 0x0504 ++#define REG_EDCA_BE_PARAM 0x0508 ++#define REG_EDCA_BK_PARAM 0x050C ++#define REG_BCNTCFG 0x0510 ++#define REG_PIFS 0x0512 ++#define REG_RDG_PIFS 0x0513 ++#define REG_SIFS_CCK 0x0514 ++#define REG_SIFS_OFDM 0x0516 ++#define REG_SIFS_CTX 0x0514 ++#define REG_SIFS_TRX 0x0516 ++#define REG_AGGR_BREAK_TIME 0x051A ++#define REG_SLOT 0x051B ++#define REG_TX_PTCL_CTRL 0x0520 ++#define REG_TXPAUSE 0x0522 ++#define REG_DIS_TXREQ_CLR 0x0523 ++#define REG_RD_CTRL 0x0524 ++#define REG_TBTT_PROHIBIT 0x0540 ++#define REG_RD_NAV_NXT 0x0544 ++#define REG_NAV_PROT_LEN 0x0546 ++#define REG_BCN_CTRL 0x0550 ++#define REG_BCN_CTRL_1 0x0551 ++#define REG_MBID_NUM 0x0552 ++#define REG_DUAL_TSF_RST 0x0553 ++#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE ++#define REG_MBSSID_BCN_SPACE 0x0554 ++#define REG_DRVERLYINT 0x0558 ++#define REG_BCNDMATIM 0x0559 ++#define REG_ATIMWND 0x055A ++#define REG_BCN_MAX_ERR 0x055D ++#define REG_RXTSF_OFFSET_CCK 0x055E ++#define REG_RXTSF_OFFSET_OFDM 0x055F ++#define REG_TSFTR 0x0560 ++#define REG_INIT_TSFTR 0x0564 ++#define REG_PSTIMER 0x0580 ++#define REG_TIMER0 0x0584 ++#define REG_TIMER1 0x0588 ++#define REG_ACMHWCTRL 0x05C0 ++#define REG_ACMRSTCTRL 0x05C1 ++#define REG_ACMAVG 0x05C2 ++#define REG_VO_ADMTIME 0x05C4 ++#define REG_VI_ADMTIME 0x05C6 ++#define REG_BE_ADMTIME 0x05C8 ++#define REG_EDCA_RANDOM_GEN 0x05CC ++#define REG_SCH_TXCMD 0x05D0 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_APSD_CTRL 0x0600 ++#define REG_BWOPMODE 0x0603 ++#define REG_TCR 0x0604 ++#define REG_RCR 0x0608 ++#define REG_RX_PKT_LIMIT 0x060C ++#define REG_RX_DLK_TIME 0x060D ++#define REG_RX_DRVINFO_SZ 0x060F ++ ++#define REG_MACID 0x0610 ++#define REG_BSSID 0x0618 ++#define REG_MAR 0x0620 ++#define REG_MBIDCAMCFG 0x0628 ++ ++#define REG_USTIME_EDCA 0x0638 ++#define REG_MAC_SPEC_SIFS 0x063A ++ ++// 20100719 Joseph: Hardware register definition change. (HW datasheet v54) ++#define REG_R2T_SIFS 0x063C // [15:8]SIFS_R2T_OFDM, [7:0]SIFS_R2T_CCK ++#define REG_T2T_SIFS 0x063E // [15:8]SIFS_T2T_OFDM, [7:0]SIFS_T2T_CCK ++#define REG_ACKTO 0x0640 ++#define REG_CTS2TO 0x0641 ++#define REG_EIFS 0x0642 ++ ++//WMA, BA, CCX ++#define REG_NAV_CTRL 0x0650 ++#define REG_BACAMCMD 0x0654 ++#define REG_BACAMCONTENT 0x0658 ++#define REG_LBDLY 0x0660 ++#define REG_FWDLY 0x0661 ++#define REG_RXERR_RPT 0x0664 ++#define REG_WMAC_TRXPTCL_CTL 0x0668 ++ ++ ++// Security ++#define REG_CAMCMD 0x0670 ++#define REG_CAMWRITE 0x0674 ++#define REG_CAMREAD 0x0678 ++#define REG_CAMDBG 0x067C ++#define REG_SECCFG 0x0680 ++ ++// Power ++#define REG_WOW_CTRL 0x0690 ++#define REG_PSSTATUS 0x0691 ++#define REG_PS_RX_INFO 0x0692 ++#define REG_LPNAV_CTRL 0x0694 ++#define REG_WKFMCAM_CMD 0x0698 ++#define REG_WKFMCAM_RWD 0x069C ++#define REG_RXFLTMAP0 0x06A0 ++#define REG_RXFLTMAP1 0x06A2 ++#define REG_RXFLTMAP2 0x06A4 ++#define REG_BCN_PSR_RPT 0x06A8 ++#define REG_CALB32K_CTRL 0x06AC ++#define REG_PKT_MON_CTRL 0x06B4 ++#define REG_BT_COEX_TABLE 0x06C0 ++#define REG_WMAC_RESP_TXINFO 0x06D8 ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++// For test chip ++#define REG_TEST_USB_TXQS 0xFE48 ++#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_TEST_SIE_OPTIONAL 0xFE64 ++#define REG_TEST_SIE_CHIRP_K 0xFE65 ++#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B ++#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 ++ ++ ++// For normal chip ++#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_NORMAL_SIE_OPTIONAL 0xFE64 ++#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 ++#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B ++#define REG_NORMAL_SIE_OPTIONAL2 0xFE6C ++#define REG_NORMAL_SIE_GPS_EP 0xFE6D // 0xFE6D, for RTL8723 only. ++#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++ ++#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. ++#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. ++#define SYS_CLK REG_SYS_CLKR ++#define CR9346 REG_9346CR // 93C46/93C56 Command Register. ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. ++#define MSR (REG_CR + 2) // Media Status register ++#define ISR REG_HISR ++#define TSFR REG_TSFTR // Timing Sync Function Timer Register. ++ ++#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 ++#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++#define PBP REG_PBP ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0 MACIDR0 ++#define IDR4 MACIDR4 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI REG_CAMWRITE // Software write CAM input content ++#define RCAMO REG_CAMREAD // Software read/write CAM config ++#define CAMDBG REG_CAMDBG ++#define SECR REG_SECCFG //Security Configuration Register ++ ++// Unused register ++#define UnusedRegister 0x1BF ++#define DCAM UnusedRegister ++#define PSR UnusedRegister ++#define BBAddr UnusedRegister ++#define PhyDataR UnusedRegister ++ ++#define InvalidBBRFValue 0x12345678 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C Cmd9346CR bits (Offset 0xA, 16bit) ++//---------------------------------------------------------------------------- ++#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 ++#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 ++#define Cmd9346CR_9356SEL BIT4 ++#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) ++#define AutoLoadEFUSE CmdEEPROM_En ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++//---------------------------------------------------------------------------- ++// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) ++//---------------------------------------------------------------------------- ++/* ++Network Type ++00: No link ++01: Link in ad hoc network ++10: Link in infrastructure network ++11: AP mode ++Default: 00b. ++*/ ++#define MSR_NOLINK 0x00 ++#define MSR_ADHOC 0x01 ++#define MSR_INFRA 0x02 ++#define MSR_AP 0x03 ++ ++// ++// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) ++// ++//---------------------------------------------------------------------------- ++// 8192C Response Rate Set Register (offset 0x181, 24bits) ++//---------------------------------------------------------------------------- ++#define RRSR_RSC_OFFSET 21 ++#define RRSR_SHORT_OFFSET 23 ++#define RRSR_RSC_BW_40M 0x600000 ++#define RRSR_RSC_UPSUBCHNL 0x400000 ++#define RRSR_RSC_LOWSUBCHNL 0x200000 ++#define RRSR_SHORT 0x800000 ++#define RRSR_1M BIT0 ++#define RRSR_2M BIT1 ++#define RRSR_5_5M BIT2 ++#define RRSR_11M BIT3 ++#define RRSR_6M BIT4 ++#define RRSR_9M BIT5 ++#define RRSR_12M BIT6 ++#define RRSR_18M BIT7 ++#define RRSR_24M BIT8 ++#define RRSR_36M BIT9 ++#define RRSR_48M BIT10 ++#define RRSR_54M BIT11 ++#define RRSR_MCS0 BIT12 ++#define RRSR_MCS1 BIT13 ++#define RRSR_MCS2 BIT14 ++#define RRSR_MCS3 BIT15 ++#define RRSR_MCS4 BIT16 ++#define RRSR_MCS5 BIT17 ++#define RRSR_MCS6 BIT18 ++#define RRSR_MCS7 BIT19 ++#define BRSR_AckShortPmb BIT23 ++// CCK ACK: use Short Preamble or not ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C Rate Definition ++//---------------------------------------------------------------------------- ++//CCK ++#define RATR_1M 0x00000001 ++#define RATR_2M 0x00000002 ++#define RATR_55M 0x00000004 ++#define RATR_11M 0x00000008 ++//OFDM ++#define RATR_6M 0x00000010 ++#define RATR_9M 0x00000020 ++#define RATR_12M 0x00000040 ++#define RATR_18M 0x00000080 ++#define RATR_24M 0x00000100 ++#define RATR_36M 0x00000200 ++#define RATR_48M 0x00000400 ++#define RATR_54M 0x00000800 ++//MCS 1 Spatial Stream ++#define RATR_MCS0 0x00001000 ++#define RATR_MCS1 0x00002000 ++#define RATR_MCS2 0x00004000 ++#define RATR_MCS3 0x00008000 ++#define RATR_MCS4 0x00010000 ++#define RATR_MCS5 0x00020000 ++#define RATR_MCS6 0x00040000 ++#define RATR_MCS7 0x00080000 ++//MCS 2 Spatial Stream ++#define RATR_MCS8 0x00100000 ++#define RATR_MCS9 0x00200000 ++#define RATR_MCS10 0x00400000 ++#define RATR_MCS11 0x00800000 ++#define RATR_MCS12 0x01000000 ++#define RATR_MCS13 0x02000000 ++#define RATR_MCS14 0x04000000 ++#define RATR_MCS15 0x08000000 ++ ++ ++// NOTE: For 92CU - Ziv ++//CCK ++#define RATE_1M BIT(0) ++#define RATE_2M BIT(1) ++#define RATE_5_5M BIT(2) ++#define RATE_11M BIT(3) ++//OFDM ++#define RATE_6M BIT(4) ++#define RATE_9M BIT(5) ++#define RATE_12M BIT(6) ++#define RATE_18M BIT(7) ++#define RATE_24M BIT(8) ++#define RATE_36M BIT(9) ++#define RATE_48M BIT(10) ++#define RATE_54M BIT(11) ++//MCS 1 Spatial Stream ++#define RATE_MCS0 BIT(12) ++#define RATE_MCS1 BIT(13) ++#define RATE_MCS2 BIT(14) ++#define RATE_MCS3 BIT(15) ++#define RATE_MCS4 BIT(16) ++#define RATE_MCS5 BIT(17) ++#define RATE_MCS6 BIT(18) ++#define RATE_MCS7 BIT(19) ++//MCS 2 Spatial Stream ++#define RATE_MCS8 BIT(20) ++#define RATE_MCS9 BIT(21) ++#define RATE_MCS10 BIT(22) ++#define RATE_MCS11 BIT(23) ++#define RATE_MCS12 BIT(24) ++#define RATE_MCS13 BIT(25) ++#define RATE_MCS14 BIT(26) ++#define RATE_MCS15 BIT(27) ++ ++ ++ ++ ++// ALL CCK Rate ++#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M ++#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ ++ RATR_36M|RATR_48M|RATR_54M ++#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ ++ RATR_MCS4|RATR_MCS5|RATR_MCS6 |RATR_MCS7 ++#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9 |RATR_MCS10|RATR_MCS11|\ ++ RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 ++ ++//---------------------------------------------------------------------------- ++// 8192C BW_OPMODE bits (Offset 0x203, 8bit) ++//---------------------------------------------------------------------------- ++#define BW_OPMODE_20MHZ BIT2 ++#define BW_OPMODE_5G BIT1 ++#define BW_OPMODE_11J BIT0 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C CAM Config Setting (offset 0x250, 1 byte) ++//---------------------------------------------------------------------------- ++#define CAM_VALID BIT15 ++#define CAM_NOTVALID 0x0000 ++#define CAM_USEDK BIT5 ++ ++#define CAM_CONTENT_COUNT 8 ++ ++#define CAM_NONE 0x0 ++#define CAM_WEP40 0x01 ++#define CAM_TKIP 0x02 ++#define CAM_AES 0x04 ++#define CAM_WEP104 0x05 ++ ++#define TOTAL_CAM_ENTRY 32 ++#define HALF_CAM_ENTRY 16 ++ ++#define CAM_CONFIG_USEDK _TRUE ++#define CAM_CONFIG_NO_USEDK _FALSE ++ ++#define CAM_WRITE BIT16 ++#define CAM_READ 0x00000000 ++#define CAM_POLLINIG BIT31 ++ ++#define SCR_UseDK 0x01 ++#define SCR_TxSecEnable 0x02 ++#define SCR_RxSecEnable 0x04 ++ ++ ++// ++// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) ++// ++//---------------------------------------------------------------------------- ++// 8190 IMR/ISR bits (offset 0xfd, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR8190_DISABLED 0x0 ++// IMR DW0 Bit 0-31 ++#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 ++#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 ++#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 ++#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 ++#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow ++#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt ++#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 ++#define IMR_RXFOVW BIT12 // Receive FIFO Overflow ++#define IMR_RDU BIT11 // Receive Descriptor Unavailable ++#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt ++#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup ++#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt ++#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup ++#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt ++#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt ++#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt ++#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt ++#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt ++#define IMR_VODOK BIT1 // AC_VO DMA Interrupt ++#define IMR_ROK BIT0 // Receive DMA OK Interrupt ++ ++#define IMR_RX_MASK (IMR_ROK|IMR_RDU|IMR_RXFOVW) ++#define IMR_TX_MASK (IMR_VODOK|IMR_VIDOK|IMR_BEDOK|IMR_BKDOK|IMR_MGNTDOK|IMR_HIGHDOK|IMR_BDOK) ++ ++// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) ++#define IMR_TXERR BIT11 ++#define IMR_RXERR BIT10 ++#define IMR_C2HCMD BIT9 ++#define IMR_CPWM BIT8 ++//RSVD [2-7] ++#define IMR_OCPINT BIT1 ++#define IMR_WLANOFF BIT0 ++ ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C EFUSE ++//---------------------------------------------------------------------------- ++#define HWSET_MAX_SIZE 128 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++// ++// Default Value for EEPROM or EFUSE!!! ++// ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_TxPowerDiff 0x0 ++#define EEPROM_Default_CrystalCap 0x5 ++#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) ++#define EEPROM_Default_TxPower 0x1010 ++#define EEPROM_Default_HT2T_TxPwr 0x10 ++ ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_ThermalMeter 0x12 ++ ++#define EEPROM_Default_AntTxPowerDiff 0x0 ++#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 ++#define EEPROM_Default_TxPowerLevel 0x22 ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x3 ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++// For debug ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC 0xB ++#define EEPROM_USB_OPTIONAL1 0xE ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define RTL_EEPROM_ID 0x8129 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) ++#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) ++#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) ++ ++// ++// Interface type. ++// ++typedef enum _INTERFACE_SELECT_8192CPCIe{ ++ INTF_SEL0_SOLO_MINICARD = 0, // WiFi solo-mCard ++ INTF_SEL1_BT_COMBO_MINICARD = 1, // WiFi+BT combo-mCard ++ INTF_SEL2_PCIe = 2, // PCIe Card ++} INTERFACE_SELECT_8192CPCIe, *PINTERFACE_SELECT_8192CPCIe; ++ ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_TESTR 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0x0A // SE Vendor ID.A-B ++#define EEPROM_DID 0x0C // SE Device ID. C-D ++#define EEPROM_SVID 0x0E // SE Vendor ID.E-F ++#define EEPROM_SMID 0x10 // SE PCI Subsystem ID. 10-11 ++ ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++ ++//---------------------------------------------------------------- ++// Ziv - Let PCIe and USB use the same define. Modify address mapping later. ++#define EEPROM_CCK_TX_PWR_INX 0x5A ++#define EEPROM_HT40_1S_TX_PWR_INX 0x60 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 ++#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C ++#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F ++#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 ++ ++#define EEPROM_CHANNEL_PLAN 0x75 ++#define EEPROM_TSSI_A 0x76 ++#define EEPROM_TSSI_B 0x77 ++#define EEPROM_THERMAL_METER 0x78 ++#define EEPROM_RF_OPT1 0x79 ++#define EEPROM_RF_OPT2 0x7A ++#define EEPROM_RF_OPT3 0x7B ++#define EEPROM_RF_OPT4 0x7C ++#define EEPROM_VERSION 0x7E ++#define EEPROM_CUSTOMER_ID 0x7F ++ ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++ ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++//should be renamed and moved to another file ++typedef enum _BOARD_TYPE_8192CUSB{ ++ BOARD_USB_DONGLE = 0, // USB dongle ++ BOARD_USB_High_PA = 1, // USB dongle with high power PA ++ BOARD_MINICARD = 2, // Minicard ++ BOARD_USB_SOLO = 3, // USB solo-Slim module ++ BOARD_USB_COMBO = 4, // USB Combo-Slim module ++} BOARD_TYPE_8192CUSB, *PBOARD_TYPE_8192CUSB; ++ ++#define SUPPORT_HW_RADIO_DETECT(pHalData) (pHalData->BoardType == BOARD_MINICARD||\ ++ pHalData->BoardType == BOARD_USB_SOLO||\ ++ pHalData->BoardType == BOARD_USB_COMBO) ++ ++//--------------------------------------------------------------- ++// EEPROM address for Test chip ++//--------------------------------------------------------------- ++#define EEPROM_TEST_USB_OPT 0x0E ++#define EEPROM_TEST_CHIRP_K 0x0F ++#define EEPROM_TEST_EP_SETTING 0x0E ++#define EEPROM_TEST_USB_PHY 0x10 ++ ++ ++//--------------------------------------------------------------- ++// EEPROM address for Normal chip ++//--------------------------------------------------------------- ++#define EEPROM_NORMAL_USB_OPT 0x0E ++#define EEPROM_NORMAL_CHIRP_K 0x0E // Changed ++#define EEPROM_NORMAL_EP_SETTING 0x0F // Changed ++#define EEPROM_NORMAL_USB_PHY 0x12 // Changed ++ ++ ++// Test chip and normal chip common define ++//--------------------------------------------------------------- ++// EEPROM address for both ++//--------------------------------------------------------------- ++#define EEPROM_ID0 0x00 ++#define EEPROM_ID1 0x01 ++#define EEPROM_RTK_RSV1 0x02 ++#define EEPROM_RTK_RSV2 0x03 ++#define EEPROM_RTK_RSV3 0x04 ++#define EEPROM_RTK_RSV4 0x05 ++#define EEPROM_RTK_RSV5 0x06 ++#define EEPROM_DBG_SEL 0x07 ++#define EEPROM_RTK_RSV6 0x08 ++#define EEPROM_VID 0x0A ++#define EEPROM_PID 0x0C ++ ++#define EEPROM_MAC_ADDR 0x16 ++#define EEPROM_STRING 0x1C ++#define EEPROM_SUBCUSTOMER_ID 0x59 ++#define EEPROM_CCK_TX_PWR_INX 0x5A ++#define EEPROM_HT40_1S_TX_PWR_INX 0x60 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF 0x66 ++#define EEPROM_HT20_TX_PWR_INX_DIFF 0x69 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF 0x6C ++#define EEPROM_HT40_MAX_PWR_OFFSET 0x6F ++#define EEPROM_HT20_MAX_PWR_OFFSET 0x72 ++ ++#define EEPROM_CHANNEL_PLAN 0x75 ++#define EEPROM_TSSI_A 0x76 ++#define EEPROM_TSSI_B 0x77 ++#define EEPROM_THERMAL_METER 0x78 ++#define EEPROM_RF_OPT1 0x79 ++#define EEPROM_RF_OPT2 0x7A ++#define EEPROM_RF_OPT3 0x7B ++#define EEPROM_RF_OPT4 0x7C ++#define EEPROM_VERSION 0x7E ++#define EEPROM_CUSTOMER_ID 0x7F ++ ++#define EEPROM_BoardType 0x54 //0x0: RTL8188SU, 0x1: RTL8191SU, 0x2: RTL8192SU, 0x3: RTL8191GU ++#define EEPROM_TxPwIndex 0x5C //0x5C-0x76, Tx Power index. ++#define EEPROM_PwDiff 0x67 // Difference of gain index between legacy and high throughput OFDM. ++ ++#define EEPROM_TxPowerCCK 0x5A // CCK Tx Power ++ ++// 2009/02/09 Cosa Add for SD3 requirement ++#define EEPROM_TX_PWR_HT20_DIFF 0x6e// HT20 Tx Power Index Difference ++#define DEFAULT_HT20_TXPWR_DIFF 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_TX_PWR_OFDM_DIFF 0x71// OFDM Tx Power Index Difference ++ ++#define EEPROM_TxPWRGroup 0x73// Power diff for channel group ++#define EEPROM_Regulatory 0x79// Check if power safety is need ++ ++#define EEPROM_BLUETOOTH_COEXIST 0x7E // 92cu, 0x7E[4] ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++#define BOARD_TYPE_NORMAL_MASK 0xE0 ++#define BOARD_TYPE_TEST_MASK 0x0F ++#define EEPROM_EASY_REPLACEMENT 0x50//BIT0 1 for build-in module, 0 for external dongle ++//------------------------------------------------------------- ++// EEPROM content definitions ++//------------------------------------------------------------- ++#define OS_LINK_SPEED BIT(5) ++ ++#define BOARD_TYPE_MASK 0xF ++ ++#define BT_COEXISTENCE BIT(4) ++#define BT_CO_SHIFT 4 ++ ++#define EP_NUMBER_MASK 0x30 //bit 4:5 0Eh ++#define EP_NUMBER_SHIFT 4 ++ ++ ++#define USB_PHY_PARA_SIZE 5 ++ ++ ++//------------------------------------------------------------- ++// EEPROM default value definitions ++//------------------------------------------------------------- ++// Use 0xABCD instead of 0x8192 for debug ++#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 ++#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 ++ ++#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 ++#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 ++#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 ++ ++#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A ++#define EEPROM_DEF_VID_1 0x0B ++ ++#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C ++#define EEPROM_DEF_PID_1 0x81 ++ ++ ++#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E ++#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E ++ ++#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F ++ ++#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 ++#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 ++#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 ++#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 ++ ++#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 ++#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 ++ ++ ++#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A ++ ++#define RF_OPTION1 0x79// Check if power safety spec is need ++#define RF_OPTION2 0x7A ++#define RF_OPTION3 0x7B ++#define RF_OPTION4 0x7C ++ ++ ++#define EEPROM_USB_SN BIT(0) ++#define EEPROM_USB_REMOTE_WAKEUP BIT(1) ++#define EEPROM_USB_DEVICE_PWR BIT(2) ++#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) ++ ++#if 0 ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define EEPROM_CID_DEFAULT 0x0 ++ ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#endif ++ ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++/* ++Based on Datasheet V33---090401 ++Register Summary ++Current IOREG MAP ++0x0000h ~ 0x00FFh System Configuration (256 Bytes) ++0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) ++0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) ++0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) ++0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) ++0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) ++0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) ++0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) ++0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) ++*/ ++ ++//---------------------------------------------------------------------------- ++// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) ++//---------------------------------------------------------------------------- ++#define RCR_APPFCS BIT31 //WMAC append FCS after pauload ++#define RCR_APP_MIC BIT30 // ++#define RCR_APP_PHYSTS BIT28// ++#define RCR_APP_ICV BIT29 // ++#define RCR_APP_PHYST_RXFF BIT28 // ++#define RCR_APP_BA_SSN BIT27 //Accept BA SSN ++#define RCR_ENMBID BIT24 //Enable Multiple BssId. ++#define RCR_LSIGEN BIT23 ++#define RCR_MFBEN BIT22 ++#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 ++#define RCR_AMF BIT13 //Accept management type frame ++#define RCR_ACF BIT12 //Accept control type frame ++#define RCR_ADF BIT11 //Accept data type frame ++#define RCR_AICV BIT9 //Accept ICV error packet ++#define RCR_ACRC32 BIT8 //Accept CRC32 error packet ++#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) ++#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) ++#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet ++#define RCR_APWRMGT BIT5 //Accept power management packet ++#define RCR_ADD3 BIT4 //Accept address 3 match packet ++#define RCR_AB BIT3 //Accept broadcast packet ++#define RCR_AM BIT2 //Accept multicast packet ++#define RCR_APM BIT1 //Accept physical match packet ++#define RCR_AAP BIT0 //Accept all unicast packet ++#define RCR_MXDMA_OFFSET 8 ++#define RCR_FIFO_OFFSET 13 ++ ++ ++ ++//============================================================================ ++// 8192c USB specific Regsiter Offset and Content definition, ++// 2009.08.18, added by vivi. for merge 92c and 92C into one driver ++//============================================================================ ++//#define APS_FSMCO 0x0004 same with 92Ce ++#define RSV_CTRL 0x001C ++#define RD_CTRL 0x0524 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++#define REG_USB_VID 0xFE60 ++#define REG_USB_PID 0xFE62 ++#define REG_USB_OPTIONAL 0xFE64 ++#define REG_USB_CHIRP_K 0xFE65 ++#define REG_USB_PHY 0xFE66 ++#define REG_USB_MAC_ADDR 0xFE70 ++ ++#define REG_USB_HRPWM 0xFE58 ++#define REG_USB_HCPWM 0xFE57 ++ ++#define InvalidBBRFValue 0x12345678 ++ ++//============================================================================ ++// 8192C Regsiter Bit and Content definition ++//============================================================================ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++ ++//2 SPS0_CTRL ++#define SW18_FPWM BIT(3) ++ ++ ++//2 SYS_ISO_CTRL ++#define ISO_MD2PP BIT(0) ++#define ISO_UA2USB BIT(1) ++#define ISO_UD2CORE BIT(2) ++#define ISO_PA2PCIE BIT(3) ++#define ISO_PD2CORE BIT(4) ++#define ISO_IP2MAC BIT(5) ++#define ISO_DIOP BIT(6) ++#define ISO_DIOE BIT(7) ++#define ISO_EB2CORE BIT(8) ++#define ISO_DIOR BIT(9) ++ ++#define PWC_EV25V BIT(14) ++#define PWC_EV12V BIT(15) ++ ++ ++//2 SYS_FUNC_EN ++#define FEN_BBRSTB BIT(0) ++#define FEN_BB_GLB_RSTn BIT(1) ++#define FEN_USBA BIT(2) ++#define FEN_UPLL BIT(3) ++#define FEN_USBD BIT(4) ++#define FEN_DIO_PCIE BIT(5) ++#define FEN_PCIEA BIT(6) ++#define FEN_PPLL BIT(7) ++#define FEN_PCIED BIT(8) ++#define FEN_DIOE BIT(9) ++#define FEN_CPUEN BIT(10) ++#define FEN_DCORE BIT(11) ++#define FEN_ELDR BIT(12) ++#define FEN_DIO_RF BIT(13) ++#define FEN_HWPDN BIT(14) ++#define FEN_MREGEN BIT(15) ++ ++//2 APS_FSMCO ++#define PFM_LDALL BIT(0) ++#define PFM_ALDN BIT(1) ++#define PFM_LDKP BIT(2) ++#define PFM_WOWL BIT(3) ++#define EnPDN BIT(4) ++#define PDN_PL BIT(5) ++#define APFM_ONMAC BIT(8) ++#define APFM_OFF BIT(9) ++#define APFM_RSM BIT(10) ++#define AFSM_HSUS BIT(11) ++#define AFSM_PCIE BIT(12) ++#define APDM_MAC BIT(13) ++#define APDM_HOST BIT(14) ++#define APDM_HPDN BIT(15) ++#define RDY_MACON BIT(16) ++#define SUS_HOST BIT(17) ++#define ROP_ALD BIT(20) ++#define ROP_PWR BIT(21) ++#define ROP_SPS BIT(22) ++#define SOP_MRST BIT(25) ++#define SOP_FUSE BIT(26) ++#define SOP_ABG BIT(27) ++#define SOP_AMB BIT(28) ++#define SOP_RCK BIT(29) ++#define SOP_A8M BIT(30) ++#define XOP_BTCK BIT(31) ++ ++//2 SYS_CLKR ++#define ANAD16V_EN BIT(0) ++#define ANA8M BIT(1) ++#define MACSLP BIT(4) ++#define LOADER_CLK_EN BIT(5) ++#define _80M_SSC_DIS BIT(7) ++#define _80M_SSC_EN_HO BIT(8) ++#define PHY_SSC_RSTB BIT(9) ++#define SEC_CLK_EN BIT(10) ++#define MAC_CLK_EN BIT(11) ++#define SYS_CLK_EN BIT(12) ++#define RING_CLK_EN BIT(13) ++ ++ ++//2 9346CR ++ ++ ++#define EEDO BIT(0) ++#define EEDI BIT(1) ++#define EESK BIT(2) ++#define EECS BIT(3) ++//#define EERPROMSEL BIT(4) ++//#define EEPROM_EN BIT(5) ++#define BOOT_FROM_EEPROM BIT(4) ++#define EEPROM_EN BIT(5) ++#define EEM0 BIT(6) ++#define EEM1 BIT(7) ++ ++ ++//2 AFE_MISC ++#define AFE_BGEN BIT(0) ++#define AFE_MBEN BIT(1) ++#define MAC_ID_EN BIT(7) ++ ++ ++//2 SPS0_CTRL ++ ++ ++//2 SPS_OCP_CFG ++ ++ ++//2 RSV_CTRL ++#define WLOCK_ALL BIT(0) ++#define WLOCK_00 BIT(1) ++#define WLOCK_04 BIT(2) ++#define WLOCK_08 BIT(3) ++#define WLOCK_40 BIT(4) ++#define R_DIS_PRST_0 BIT(5) ++#define R_DIS_PRST_1 BIT(6) ++#define LOCK_ALL_EN BIT(7) ++ ++//2 RF_CTRL ++#define RF_EN BIT(0) ++#define RF_RSTB BIT(1) ++#define RF_SDMRSTB BIT(2) ++ ++ ++ ++//2 LDOA15_CTRL ++#define LDA15_EN BIT(0) ++#define LDA15_STBY BIT(1) ++#define LDA15_OBUF BIT(2) ++#define LDA15_REG_VOS BIT(3) ++#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) ++ ++ ++ ++//2 LDOV12D_CTRL ++#define LDV12_EN BIT(0) ++#define LDV12_SDBY BIT(1) ++#define LPLDO_HSM BIT(2) ++#define LPLDO_LSM_DIS BIT(3) ++#define _LDV12_VADJ(x) (((x) & 0xF) << 4) ++ ++ ++//2 AFE_XTAL_CTRL ++#define XTAL_EN BIT(0) ++#define XTAL_BSEL BIT(1) ++#define _XTAL_BOSC(x) (((x) & 0x3) << 2) ++#define _XTAL_CADJ(x) (((x) & 0xF) << 4) ++#define XTAL_GATE_USB BIT(8) ++#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) ++#define XTAL_GATE_AFE BIT(11) ++#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) ++#define XTAL_RF_GATE BIT(14) ++#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) ++#define XTAL_GATE_DIG BIT(17) ++#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) ++#define XTAL_BT_GATE BIT(20) ++#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) ++#define _XTAL_GPIO(x) (((x) & 0x7) << 23) ++ ++ ++#define CKDLY_AFE BIT(26) ++#define CKDLY_USB BIT(27) ++#define CKDLY_DIG BIT(28) ++#define CKDLY_BT BIT(29) ++ ++ ++//2 AFE_PLL_CTRL ++#define APLL_EN BIT(0) ++#define APLL_320_EN BIT(1) ++#define APLL_FREF_SEL BIT(2) ++#define APLL_EDGE_SEL BIT(3) ++#define APLL_WDOGB BIT(4) ++#define APLL_LPFEN BIT(5) ++ ++#define APLL_REF_CLK_13MHZ 0x1 ++#define APLL_REF_CLK_19_2MHZ 0x2 ++#define APLL_REF_CLK_20MHZ 0x3 ++#define APLL_REF_CLK_25MHZ 0x4 ++#define APLL_REF_CLK_26MHZ 0x5 ++#define APLL_REF_CLK_38_4MHZ 0x6 ++#define APLL_REF_CLK_40MHZ 0x7 ++ ++#define APLL_320EN BIT(14) ++#define APLL_80EN BIT(15) ++#define APLL_1MEN BIT(24) ++ ++ ++//2 EFUSE_CTRL ++#define ALD_EN BIT(18) ++#define EF_PD BIT(19) ++#define EF_FLAG BIT(31) ++ ++//2 EFUSE_TEST (For RTL8723 partially) ++#define EF_TRPT BIT(7) ++#define EF_CELL_SEL (BIT(8)|BIT(9)) // 00: Wifi Efuse, 01: BT Efuse0, 10: BT Efuse1, 11: BT Efuse2 ++#define LDOE25_EN BIT(31) ++#define EFUSE_SEL(x) (((x) & 0x3) << 8) ++#define EFUSE_SEL_MASK 0x300 ++#define EFUSE_WIFI_SEL_0 0x0 ++#define EFUSE_BT_SEL_0 0x1 ++#define EFUSE_BT_SEL_1 0x2 ++#define EFUSE_BT_SEL_2 0x3 ++ ++#define EFUSE_ACCESS_ON 0x69 // For RTL8723 only. ++#define EFUSE_ACCESS_OFF 0x00 // For RTL8723 only. ++ ++//2 PWR_DATA ++ ++//2 CAL_TIMER ++ ++//2 ACLK_MON ++#define RSM_EN BIT(0) ++#define Timer_EN BIT(4) ++ ++ ++//2 GPIO_MUXCFG ++#define TRSW0EN BIT(2) ++#define TRSW1EN BIT(3) ++#define EROM_EN BIT(4) ++#define EnBT BIT(5) ++#define EnUart BIT(8) ++#define Uart_910 BIT(9) ++#define EnPMAC BIT(10) ++#define SIC_SWRST BIT(11) ++#define EnSIC BIT(12) ++#define SIC_23 BIT(13) ++#define EnHDP BIT(14) ++#define SIC_LBK BIT(15) ++ ++//2 GPIO_PIN_CTRL ++ ++// GPIO BIT ++#define HAL_8192C_HW_GPIO_WPS_BIT BIT(2) ++ ++//2 GPIO_INTM ++ ++//2 LEDCFG ++#define LED0PL BIT(4) ++#define LED0DIS BIT(7) ++#define LED1DIS BIT(15) ++#define LED1PL BIT(12) ++ ++#define SECCAM_CLR BIT(30) ++ ++ ++//2 FSIMR ++ ++//2 FSISR ++ ++ ++//2 8051FWDL ++//2 MCUFWDL ++#define MCUFWDL_EN BIT(0) ++#define MCUFWDL_RDY BIT(1) ++#define FWDL_ChkSum_rpt BIT(2) ++#define MACINI_RDY BIT(3) ++#define BBINI_RDY BIT(4) ++#define RFINI_RDY BIT(5) ++#define WINTINI_RDY BIT(6) ++#define CPRST BIT(23) ++ ++//2REG_HPON_FSM ++#define BOND92CE_1T2R_CFG BIT(22) ++ ++ ++//2 REG_SYS_CFG ++#define XCLK_VLD BIT(0) ++#define ACLK_VLD BIT(1) ++#define UCLK_VLD BIT(2) ++#define PCLK_VLD BIT(3) ++#define PCIRSTB BIT(4) ++#define V15_VLD BIT(5) ++#define TRP_B15V_EN BIT(7) ++#define SIC_IDLE BIT(8) ++#define BD_MAC2 BIT(9) ++#define BD_MAC1 BIT(10) ++#define IC_MACPHY_MODE BIT(11) ++#define CHIP_VER (BIT(12)|BIT(13)|BIT(14)|BIT(15)) ++#define BT_FUNC BIT(16) ++#define VENDOR_ID BIT(19) ++#define PAD_HWPD_IDN BIT(22) ++#define TRP_VAUX_EN BIT(23) ++#define TRP_BT_EN BIT(24) ++#define BD_PKG_SEL BIT(25) ++#define BD_HCI_SEL BIT(26) ++#define TYPE_ID BIT(27) ++ ++#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 ++#define CHIP_VER_RTL_SHIFT 12 ++ ++//2REG_GPIO_OUTSTS (For RTL8723 only) ++#define EFS_HCI_SEL (BIT(0)|BIT(1)) ++#define PAD_HCI_SEL (BIT(2)|BIT(3)) ++#define HCI_SEL (BIT(4)|BIT(5)) ++#define PKG_SEL_HCI BIT(6) ++#define FEN_GPS BIT(7) ++#define FEN_BT BIT(8) ++#define FEN_WL BIT(9) ++#define FEN_PCI BIT(10) ++#define FEN_USB BIT(11) ++#define BTRF_HWPDN_N BIT(12) ++#define WLRF_HWPDN_N BIT(13) ++#define PDN_BT_N BIT(14) ++#define PDN_GPS_N BIT(15) ++#define BT_CTL_HWPDN BIT(16) ++#define GPS_CTL_HWPDN BIT(17) ++#define PPHY_SUSB BIT(20) ++#define UPHY_SUSB BIT(21) ++#define PCI_SUSEN BIT(22) ++#define USB_SUSEN BIT(23) ++#define RF_RL_ID (BIT(31)|BIT(30)|BIT(29)|BIT(28)) ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++ ++ ++//2 Function Enable Registers ++//2 CR ++ ++#define REG_LBMODE (REG_CR + 3) ++ ++ ++#define HCI_TXDMA_EN BIT(0) ++#define HCI_RXDMA_EN BIT(1) ++#define TXDMA_EN BIT(2) ++#define RXDMA_EN BIT(3) ++#define PROTOCOL_EN BIT(4) ++#define SCHEDULE_EN BIT(5) ++#define MACTXEN BIT(6) ++#define MACRXEN BIT(7) ++#define ENSWBCN BIT(8) ++#define ENSEC BIT(9) ++ ++// Network type ++#define _NETTYPE(x) (((x) & 0x3) << 16) ++#define MASK_NETTYPE 0x30000 ++#define NT_NO_LINK 0x0 ++#define NT_LINK_AD_HOC 0x1 ++#define NT_LINK_AP 0x2 ++#define NT_AS_AP 0x3 ++ ++#define _LBMODE(x) (((x) & 0xF) << 24) ++#define MASK_LBMODE 0xF000000 ++#define LOOPBACK_NORMAL 0x0 ++#define LOOPBACK_IMMEDIATELY 0xB ++#define LOOPBACK_MAC_DELAY 0x3 ++#define LOOPBACK_PHY 0x1 ++#define LOOPBACK_DMA 0x7 ++ ++ ++//2 PBP - Page Size Register ++#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) ++#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) ++#define _PSRX_MASK 0xF ++#define _PSTX_MASK 0xF0 ++#define _PSRX(x) (x) ++#define _PSTX(x) ((x) << 4) ++ ++#define PBP_64 0x0 ++#define PBP_128 0x1 ++#define PBP_256 0x2 ++#define PBP_512 0x3 ++#define PBP_1024 0x4 ++ ++ ++//2 TX/RXDMA ++#define RXDMA_ARBBW_EN BIT(0) ++#define RXSHFT_EN BIT(1) ++#define RXDMA_AGG_EN BIT(2) ++#define QS_VO_QUEUE BIT(8) ++#define QS_VI_QUEUE BIT(9) ++#define QS_BE_QUEUE BIT(10) ++#define QS_BK_QUEUE BIT(11) ++#define QS_MANAGER_QUEUE BIT(12) ++#define QS_HIGH_QUEUE BIT(13) ++ ++#define HQSEL_VOQ BIT(0) ++#define HQSEL_VIQ BIT(1) ++#define HQSEL_BEQ BIT(2) ++#define HQSEL_BKQ BIT(3) ++#define HQSEL_MGTQ BIT(4) ++#define HQSEL_HIQ BIT(5) ++ ++// For normal driver, 0x10C ++#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) ++#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) ++#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) ++#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) ++#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) ++#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) ++ ++#define QUEUE_LOW 1 ++#define QUEUE_NORMAL 2 ++#define QUEUE_HIGH 3 ++ ++ ++ ++//2 TRXFF_BNDY ++ ++ ++//2 LLT_INIT ++#define _LLT_NO_ACTIVE 0x0 ++#define _LLT_WRITE_ACCESS 0x1 ++#define _LLT_READ_ACCESS 0x2 ++ ++#define _LLT_INIT_DATA(x) ((x) & 0xFF) ++#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) ++#define _LLT_OP(x) (((x) & 0x3) << 30) ++#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) ++ ++ ++//2 BB_ACCESS_CTRL ++#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) ++#define BB_WRITE_EN BIT(30) ++#define BB_READ_EN BIT(31) ++//#define BB_ADDR_MASK 0xFFF ++//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++//2 RQPN ++#define _HPQ(x) ((x) & 0xFF) ++#define _LPQ(x) (((x) & 0xFF) << 8) ++#define _PUBQ(x) (((x) & 0xFF) << 16) ++#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register ++ ++ ++#define HPQ_PUBLIC_DIS BIT(24) ++#define LPQ_PUBLIC_DIS BIT(25) ++#define LD_RQPN BIT(31) ++ ++ ++//2 TDECTRL ++#define BCN_VALID BIT(16) ++#define BCN_HEAD(x) (((x) & 0xFF) << 8) ++#define BCN_HEAD_MASK 0xFF00 ++ ++//2 TDECTL ++#define BLK_DESC_NUM_SHIFT 4 ++#define BLK_DESC_NUM_MASK 0xF ++ ++ ++//2 TXDMA_OFFSET_CHK ++#define DROP_DATA_EN BIT(9) ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++//2 FWHW_TXQ_CTRL ++#define EN_AMPDU_RTY_NEW BIT(7) ++ ++//2 INIRTSMCS_SEL ++#define _INIRTSMCS_SEL(x) ((x) & 0x3F) ++ ++ ++//2 SPEC SIFS ++#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) ++#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) ++ ++ ++//2 RRSR ++ ++#define RATE_REG_BITMAP_ALL 0xFFFFF ++ ++#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) ++ ++#define _RRSR_RSC(x) (((x) & 0x3) << 21) ++#define RRSR_RSC_RESERVED 0x0 ++#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 ++#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 ++#define RRSR_RSC_DUPLICATE_MODE 0x3 ++ ++ ++//2 ARFR ++#define USE_SHORT_G1 BIT(20) ++ ++//2 AGGLEN_LMT_L ++#define _AGGLMT_MCS0(x) ((x) & 0xF) ++#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) ++#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) ++#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) ++#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) ++#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) ++#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) ++#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) ++ ++ ++//2 RL ++#define RETRY_LIMIT_SHORT_SHIFT 8 ++#define RETRY_LIMIT_LONG_SHIFT 0 ++ ++ ++//2 DARFRC ++#define _DARF_RC1(x) ((x) & 0x1F) ++#define _DARF_RC2(x) (((x) & 0x1F) << 8) ++#define _DARF_RC3(x) (((x) & 0x1F) << 16) ++#define _DARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (DARFRC + 4) ++#define _DARF_RC5(x) ((x) & 0x1F) ++#define _DARF_RC6(x) (((x) & 0x1F) << 8) ++#define _DARF_RC7(x) (((x) & 0x1F) << 16) ++#define _DARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++//2 RARFRC ++#define _RARF_RC1(x) ((x) & 0x1F) ++#define _RARF_RC2(x) (((x) & 0x1F) << 8) ++#define _RARF_RC3(x) (((x) & 0x1F) << 16) ++#define _RARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (RARFRC + 4) ++#define _RARF_RC5(x) ((x) & 0x1F) ++#define _RARF_RC6(x) (((x) & 0x1F) << 8) ++#define _RARF_RC7(x) (((x) & 0x1F) << 16) ++#define _RARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++ ++ ++//2 EDCA setting ++#define AC_PARAM_TXOP_LIMIT_OFFSET 16 ++#define AC_PARAM_ECW_MAX_OFFSET 12 ++#define AC_PARAM_ECW_MIN_OFFSET 8 ++#define AC_PARAM_AIFS_OFFSET 0 ++ ++ ++//2 EDCA_VO_PARAM ++#define _AIFS(x) (x) ++#define _ECW_MAX_MIN(x) ((x) << 8) ++#define _TXOP_LIMIT(x) ((x) << 16) ++ ++ ++#define _BCNIFS(x) ((x) & 0xFF) ++#define _BCNECW(x) (((x) & 0xF))<< 8) ++ ++ ++#define _LRL(x) ((x) & 0x3F) ++#define _SRL(x) (((x) & 0x3F) << 8) ++ ++ ++//2 SIFS_CCK ++#define _SIFS_CCK_CTX(x) ((x) & 0xFF) ++#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 SIFS_OFDM ++#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) ++#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 TBTT PROHIBIT ++#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) ++ ++ ++//2 REG_RD_CTRL ++#define DIS_EDCA_CNT_DWN BIT(11) ++ ++ ++//2 BCN_CTRL ++#define EN_MBSSID BIT(1) ++#define EN_TXBCN_RPT BIT(2) ++#define EN_BCN_FUNCTION BIT(3) ++ ++// The same function but different bit field. ++#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) ++#define DIS_TSF_UDT0_TEST_CHIP BIT(5) ++ ++//2 ACMHWCTRL ++#define AcmHw_HwEn BIT(0) ++#define AcmHw_BeqEn BIT(1) ++#define AcmHw_ViqEn BIT(2) ++#define AcmHw_VoqEn BIT(3) ++#define AcmHw_BeqStatus BIT(4) ++#define AcmHw_ViqStatus BIT(5) ++#define AcmHw_VoqStatus BIT(6) ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++//2 APSD_CTRL ++#define APSDOFF BIT(6) ++#define APSDOFF_STATUS BIT(7) ++ ++ ++//2 BWOPMODE ++#define BW_20MHZ BIT(2) ++//#define BW_OPMODE_20MHZ BIT(2) // For compability ++ ++ ++#define RATE_BITMAP_ALL 0xFFFFF ++ ++// Only use CCK 1M rate for ACK ++#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 ++ ++//2 TCR ++#define TSFRST BIT(0) ++#define DIS_GCLK BIT(1) ++#define PAD_SEL BIT(2) ++#define PWR_ST BIT(6) ++#define PWRBIT_OW_EN BIT(7) ++#define ACRC BIT(8) ++#define CFENDFORM BIT(9) ++#define ICV BIT(10) ++ ++ ++ ++//2 RCR ++#define AAP BIT(0) ++#define APM BIT(1) ++#define AM BIT(2) ++#define AB BIT(3) ++#define ADD3 BIT(4) ++#define APWRMGT BIT(5) ++#define CBSSID BIT(6) ++#define CBSSID_BCN BIT(7) ++#define ACRC32 BIT(8) ++#define AICV BIT(9) ++#define ADF BIT(11) ++#define ACF BIT(12) ++#define AMF BIT(13) ++#define HTC_LOC_CTRL BIT(14) ++#define UC_DATA_EN BIT(16) ++#define BM_DATA_EN BIT(17) ++#define MFBEN BIT(22) ++#define LSIGEN BIT(23) ++#define EnMBID BIT(24) ++#define APP_BASSN BIT(27) ++#define APP_PHYSTS BIT(28) ++#define APP_ICV BIT(29) ++#define APP_MIC BIT(30) ++#define APP_FCS BIT(31) ++ ++//2 RX_PKT_LIMIT ++ ++//2 RX_DLK_TIME ++ ++//2 MBIDCAMCFG ++ ++ ++ ++//2 AMPDU_MIN_SPACE ++#define _MIN_SPACE(x) ((x) & 0x7) ++#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) ++ ++ ++//2 RXERR_RPT ++#define RXERR_TYPE_OFDM_PPDU 0 ++#define RXERR_TYPE_OFDM_FALSE_ALARM 1 ++#define RXERR_TYPE_OFDM_MPDU_OK 2 ++#define RXERR_TYPE_OFDM_MPDU_FAIL 3 ++#define RXERR_TYPE_CCK_PPDU 4 ++#define RXERR_TYPE_CCK_FALSE_ALARM 5 ++#define RXERR_TYPE_CCK_MPDU_OK 6 ++#define RXERR_TYPE_CCK_MPDU_FAIL 7 ++#define RXERR_TYPE_HT_PPDU 8 ++#define RXERR_TYPE_HT_FALSE_ALARM 9 ++#define RXERR_TYPE_HT_MPDU_TOTAL 10 ++#define RXERR_TYPE_HT_MPDU_OK 11 ++#define RXERR_TYPE_HT_MPDU_FAIL 12 ++#define RXERR_TYPE_RX_FULL_DROP 15 ++ ++#define RXERR_COUNTER_MASK 0xFFFFF ++#define RXERR_RPT_RST BIT(27) ++#define _RXERR_RPT_SEL(type) ((type) << 28) ++ ++ ++//2 SECCFG ++#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key ++#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key ++#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption ++#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption ++#define SCR_SKByA2 BIT(4) //Search kEY BY A2 ++#define SCR_NoSKMC BIT(5) //No Key Search Multicast ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 USB Information (0xFE17) ++#define USB_IS_HIGH_SPEED 0 ++#define USB_IS_FULL_SPEED 1 ++#define USB_SPEED_MASK BIT(5) ++ ++#define USB_NORMAL_SIE_EP_MASK 0xF ++#define USB_NORMAL_SIE_EP_SHIFT 4 ++ ++#define USB_TEST_EP_MASK 0x30 ++#define USB_TEST_EP_SHIFT 4 ++ ++//2 Special Option ++#define USB_AGG_EN BIT(3) ++ ++ ++//2REG_C2HEVT_CLEAR ++#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message ++#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. ++ ++ ++//2REG_MULTI_FUNC_CTRL(For RTL8723 Only) ++#define WL_HWPDN_EN BIT0 // Enable GPIO[9] as WiFi HW PDn source ++#define WL_HWPDN_SL BIT1 // WiFi HW PDn polarity control ++#define WL_FUNC_EN BIT2 // WiFi function enable ++#define WL_HWROF_EN BIT3 // Enable GPIO[9] as WiFi RF HW PDn source ++#define BT_HWPDN_EN BIT16 // Enable GPIO[11] as BT HW PDn source ++#define BT_HWPDN_SL BIT17 // BT HW PDn polarity control ++#define BT_FUNC_EN BIT18 // BT function enable ++#define BT_HWROF_EN BIT19 // Enable GPIO[11] as BT/GPS RF HW PDn source ++#define GPS_HWPDN_EN BIT20 // Enable GPIO[10] as GPS HW PDn source ++#define GPS_HWPDN_SL BIT21 // GPS HW PDn polarity control ++#define GPS_FUNC_EN BIT22 // GPS function enable ++ ++//3 REG_LIFECTRL_CTRL ++#define HAL92C_EN_PKT_LIFE_TIME_BK BIT3 ++#define HAL92C_EN_PKT_LIFE_TIME_BE BIT2 ++#define HAL92C_EN_PKT_LIFE_TIME_VI BIT1 ++#define HAL92C_EN_PKT_LIFE_TIME_VO BIT0 ++ ++#define HAL92C_MSDU_LIFE_TIME_UNIT 128 // in us, said by Tim. ++ ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MAC_ADDR_LEN 6 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 ++ ++#define POLLING_LLT_THRESHOLD 20 ++#define POLLING_READY_TIMEOUT_COUNT 1000 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++ ++ ++#include "basic_types.h" ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_sreset.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,54 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL8192C_SRESET_C_ ++#define _RTL8192C_SRESET_C_ ++ ++#include ++#include ++#include ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++#define WIFI_STATUS_SUCCESS 0 ++#define USB_VEN_REQ_CMD_FAIL BIT0 ++#define USB_READ_PORT_FAIL BIT1 ++#define USB_WRITE_PORT_FAIL BIT2 ++#define WIFI_MAC_TXDMA_ERROR BIT3 ++#define WIFI_TX_HANG BIT4 ++#define WIFI_RX_HANG BIT5 ++#define WIFI_IF_NOT_EXIST BIT6 ++ ++struct sreset_priv { ++ _mutex silentreset_mutex; ++ u8 silent_reset_inprogress; ++ u8 Wifi_Error_Status; ++ unsigned long last_tx_time; ++ unsigned long last_tx_complete_time; ++}; ++ ++ ++extern void rtl8192c_sreset_init_value(_adapter *padapter); ++extern void rtl8192c_sreset_reset_value(_adapter *padapter); ++extern void rtl8192c_silentreset_for_specific_platform(_adapter *padapter); ++extern void rtl8192c_sreset_xmit_status_check(_adapter *padapter); ++extern void rtl8192c_sreset_linked_status_check(_adapter *padapter); ++extern u8 rtl8192c_sreset_get_wifi_status(_adapter *padapter); ++#endif ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192c_xmit.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,91 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL8192C_XMIT_H_ ++#define _RTL8192C_XMIT_H_ ++ ++#define VO_QUEUE_INX 0 ++#define VI_QUEUE_INX 1 ++#define BE_QUEUE_INX 2 ++#define BK_QUEUE_INX 3 ++#define BCN_QUEUE_INX 4 ++#define MGT_QUEUE_INX 5 ++#define HIGH_QUEUE_INX 6 ++#define TXCMD_QUEUE_INX 7 ++ ++#define HW_QUEUE_ENTRY 8 ++ ++// ++// Queue Select Value in TxDesc ++// ++#define QSLT_BK 0x2//0x01 ++#define QSLT_BE 0x0 ++#define QSLT_VI 0x5//0x4 ++#define QSLT_VO 0x7//0x6 ++#define QSLT_BEACON 0x10 ++#define QSLT_HIGH 0x11 ++#define QSLT_MGNT 0x12 ++#define QSLT_CMD 0x13 ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++#define MAX_TX_AGG_PACKET_NUMBER 0xFF ++#endif ++ ++s32 rtl8192cu_init_xmit_priv(_adapter * padapter); ++ ++void rtl8192cu_free_xmit_priv(_adapter * padapter); ++ ++void rtl8192cu_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++s32 rtl8192cu_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++void rtl8192cu_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192cu_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192cu_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192ce_init_xmit_priv(_adapter * padapter); ++void rtl8192ce_free_xmit_priv(_adapter * padapter); ++ ++s32 rtl8192ce_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); ++struct xmit_buf *rtl8192ce_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++ ++void rtl8192ce_xmitframe_resume(_adapter *padapter); ++ ++void rtl8192ce_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192ce_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192ce_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_cmd.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,133 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192D_CMD_H_ ++#define __RTL8192D_CMD_H_ ++ ++ ++//-------------------------------------------- ++//3 Host Message Box ++//-------------------------------------------- ++ ++// User Define Message [31:8] ++ ++//_SETPWRMODE_PARM ++#define SET_H2CCMD_PWRMODE_PARM_MODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_PWRMODE_PARM_SMART_PS(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++//JOINBSSRPT_PARM ++#define SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++ ++//_RSVDPAGE_LOC ++#define SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+1, 0, 8, __Value) ++#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE((__pH2CCmd)+2, 0, 8, __Value) ++ ++//P2P_PS_OFFLOAD ++ ++struct P2P_PS_Offload_t { ++ unsigned char Offload_En:1; ++ unsigned char role:1; // 1: Owner, 0: Client ++ unsigned char CTWindow_En:1; ++ unsigned char NoA0_En:1; ++ unsigned char NoA1_En:1; ++ unsigned char AllStaSleep:1; // Only valid in Owner ++ unsigned char discovery:1; ++ unsigned char rsvd:1; ++}; ++ ++#define SET_H2CCMD_P2P_PS_OFFLOAD_EN(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 0, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_ROLE(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 1, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_CTW(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 2, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA0(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 3, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_NOA1(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 4, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_ALLSTASLEEP(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 5, 1, __Value) ++#define SET_H2CCMD_P2P_PS_OFFLOAD_DISCOVERY(__pH2CCmd, __Value) SET_BITS_TO_LE_1BYTE(__pH2CCmd, 6, 1, __Value) ++ ++// Description: Determine the types of H2C commands that are the same in driver and Fw. ++// Fisrt constructed by tynli. 2009.10.09. ++typedef enum _RTL8192D_H2C_CMD ++{ ++ H2C_AP_OFFLOAD = 0, /*0*/ ++ H2C_SETPWRMODE = 1, /*1*/ ++ H2C_JOINBSSRPT = 2, /*2*/ ++ H2C_RSVDPAGE = 3, ++ H2C_RSSI_REPORT = 5, ++ H2C_RA_MASK = 6, ++ H2C_P2P_PS_OFFLOAD = 8, ++ H2C_MAC_MODE_SEL = 9, ++ H2C_PWRM=15, ++ H2C_WO_WLAN_CMD = 20, // Wake on Wlan. ++ H2C_P2P_PS_CTW_CMD = 24, ++ H2C_PathDiv = 26, //PathDiv--NeilChen--2011.07.15 ++ KEEP_ALIVE_CONTROL_CMD=31, //keep alive for wake on wlan ++ DISCONNECT_DECISION_CTRL_CMD=32, ++ REMOTE_WAKE_CTRL_CMD=34, ++ H2C_CMD_MAX ++}RTL8192D_H2C_CMD; ++ ++struct cmd_msg_parm { ++ u8 eid; //element id ++ u8 sz; // sz ++ u8 buf[6]; ++}; ++ ++ ++void FillH2CCmd92D(_adapter* padapter, u8 ElementID, u32 CmdLen, u8* pCmdBuffer); ++ ++// host message to firmware cmd ++void rtl8192d_set_FwPwrMode_cmd(_adapter*padapter, u8 Mode); ++void rtl8192d_set_FwJoinBssReport_cmd(_adapter* padapter, u8 mstatus); ++u8 rtl8192d_set_rssi_cmd(_adapter*padapter, u8 *param); ++u8 rtl8192d_set_raid_cmd(_adapter*padapter, u32 mask, u8 arg); ++void rtl8192d_Add_RateATid(PADAPTER pAdapter, u32 bitmap, u8 arg, u8 mac_id); ++#ifdef CONFIG_P2P ++void rtl8192d_set_p2p_ps_offload_cmd(_adapter* padapter, u8 p2p_ps_state); ++#endif //CONFIG_P2P ++ ++#endif ++ ++#ifdef CONFIG_WOWLAN ++typedef struct _SETWOWLAN_PARM{ ++ u8 mode; ++ u8 gpio_index; ++ u8 gpio_duration; ++ u8 second_mode; ++ u8 reserve; ++}SETWOWLAN_PARM, *PSETWOWLAN_PARM; ++ ++#define FW_WOWLAN_FUN_EN BIT(0) ++#define FW_WOWLAN_PATTERN_MATCH BIT(1) ++#define FW_WOWLAN_MAGIC_PKT BIT(2) ++#define FW_WOWLAN_UNICAST BIT(3) ++#define FW_WOWLAN_ALL_PKT_DROP BIT(4) ++#define FW_WOWLAN_GPIO_ACTIVE BIT(5) ++#define FW_WOWLAN_REKEY_WAKEUP BIT(6) ++#define FW_WOWLAN_DEAUTH_WAKEUP BIT(7) ++ ++#define FW_WOWLAN_GPIO_WAKEUP_EN BIT(0) ++#define FW_FW_PARSE_MAGIC_PKT BIT(1) ++ ++void rtl8192d_set_wowlan_cmd(_adapter* padapter); ++void SetFwRelatedForWoWLAN8192DU(_adapter* padapter,u8 bHostIsGoingtoSleep); ++#endif // CONFIG_WOWLAN ++ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_dm.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,414 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#ifndef __RTL8192D_DM_H__ ++#define __RTL8192D_DM_H__ ++//============================================================ ++// Description: ++// ++// This file is for 92CE/92CU dynamic mechanism only ++// ++// ++//============================================================ ++//============================================================ ++// Global var ++//============================================================ ++ ++extern u32 EDCAParam[maxAP][3] ; ++ ++#define OFDM_TABLE_SIZE 37 ++#define OFDM_TABLE_SIZE_92D 43 ++#define CCK_TABLE_SIZE 33 ++extern u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] ; ++ ++extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8]; ++ ++extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8]; ++ ++//============================================================ ++// structure and define ++//============================================================ ++ ++typedef struct _FALSE_ALARM_STATISTICS{ ++ u32 Cnt_Parity_Fail; ++ u32 Cnt_Rate_Illegal; ++ u32 Cnt_Crc8_fail; ++ u32 Cnt_Mcs_fail; ++ u32 Cnt_Ofdm_fail; ++ u32 Cnt_Cck_fail; ++ u32 Cnt_all; ++ u32 Cnt_Fast_Fsync; ++ u32 Cnt_SB_Search_fail; ++}FALSE_ALARM_STATISTICS, *PFALSE_ALARM_STATISTICS; ++ ++typedef struct _Dynamic_Power_Saving_ ++{ ++ u8 PreCCAState; ++ u8 CurCCAState; ++ ++ u8 PreRFState; ++ u8 CurRFState; ++ ++ //int Rssi_val_min; ++ ++}PS_T,*pPS_T; ++ ++typedef struct _Dynamic_Initial_Gain_Threshold_ ++{ ++ u8 Dig_Enable_Flag; ++ u8 Dig_Ext_Port_Stage; ++ ++ int RssiLowThresh; ++ int RssiHighThresh; ++ ++ u32 FALowThresh; ++ u32 FAHighThresh; ++ ++ u8 CurSTAConnectState; ++ u8 PreSTAConnectState; ++ u8 CurMultiSTAConnectState; ++ ++ u8 PreIGValue; ++ u8 CurIGValue; ++ u8 BackupIGValue; ++ ++ char BackoffVal; ++ char BackoffVal_range_max; ++ char BackoffVal_range_min; ++ u8 rx_gain_range_max; ++ u8 rx_gain_range_min; ++ u8 Rssi_val_min; ++ ++ u8 PreCCKPDState; ++ u8 CurCCKPDState; ++ ++ u8 LargeFAHit; ++ u8 ForbiddenIGI; ++ u32 Recover_cnt; ++}DIG_T,*pDIG_T; ++typedef enum tag_Dynamic_Init_Gain_Operation_Type_Definition ++{ ++ DIG_TYPE_THRESH_HIGH = 0, ++ DIG_TYPE_THRESH_LOW = 1, ++ DIG_TYPE_BACKOFF = 2, ++ DIG_TYPE_RX_GAIN_MIN = 3, ++ DIG_TYPE_RX_GAIN_MAX = 4, ++ DIG_TYPE_ENABLE = 5, ++ DIG_TYPE_DISABLE = 6, ++ DIG_OP_TYPE_MAX ++}DM_DIG_OP_E; ++ ++typedef enum tag_CCK_Packet_Detection_Threshold_Type_Definition ++{ ++ CCK_PD_STAGE_LowRssi = 0, ++ CCK_PD_STAGE_HighRssi = 1, ++ CCK_PD_STAGE_MAX = 3, ++}DM_CCK_PDTH_E; ++ ++typedef enum tag_1R_CCA_Type_Definition ++{ ++ CCA_MIN = 0, ++ CCA_1R =1, ++ CCA_2R = 2, ++ CCA_MAX = 3, ++}DM_1R_CCA_E; ++ ++typedef enum tag_RF_Type_Definition ++{ ++ RF_Save =0, ++ RF_Normal = 1, ++ RF_MAX = 2, ++}DM_RF_E; ++ ++typedef enum tag_DIG_EXT_PORT_ALGO_Definition ++{ ++ DIG_EXT_PORT_STAGE_0 = 0, ++ DIG_EXT_PORT_STAGE_1 = 1, ++ DIG_EXT_PORT_STAGE_2 = 2, ++ DIG_EXT_PORT_STAGE_3 = 3, ++ DIG_EXT_PORT_STAGE_MAX = 4, ++}DM_DIG_EXT_PORT_ALG_E; ++ ++ ++typedef enum tag_DIG_Connect_Definition ++{ ++ DIG_STA_DISCONNECT = 0, ++ DIG_STA_CONNECT = 1, ++ DIG_STA_BEFORE_CONNECT = 2, ++ DIG_MultiSTA_DISCONNECT = 3, ++ DIG_MultiSTA_CONNECT = 4, ++ DIG_CONNECT_MAX ++}DM_DIG_CONNECT_E; ++ ++ ++#define DM_DIG_THRESH_HIGH 40 ++#define DM_DIG_THRESH_LOW 35 ++ ++#define DM_FALSEALARM_THRESH_LOW 400 ++#define DM_FALSEALARM_THRESH_HIGH 1000 ++ ++#define DM_DIG_MAX 0x3e ++#define DM_DIG_MIN 0x1e //0x22//0x1c ++ ++#define DM_DIG_FA_UPPER 0x32 ++#define DM_DIG_FA_LOWER 0x20 ++ ++//vivi 92c&92d has different definition, 20110504 ++//this is for 92c ++#define DM_DIG_FA_TH0 0x200//0x20 ++#define DM_DIG_FA_TH1 0x300//0x100 ++#define DM_DIG_FA_TH2 0x400//0x200 ++//this is for 92d ++#define DM_DIG_FA_TH0_92D 0x100 ++#define DM_DIG_FA_TH1_92D 0x400 ++#define DM_DIG_FA_TH2_92D 0x600 ++ ++#define DM_DIG_BACKOFF_MAX 12 ++#define DM_DIG_BACKOFF_MIN (-4) ++#define DM_DIG_BACKOFF_DEFAULT 10 ++ ++#define RxPathSelection_SS_TH_low 30 ++#define RxPathSelection_diff_TH 18 ++ ++#define DM_RATR_STA_INIT 0 ++#define DM_RATR_STA_HIGH 1 ++#define DM_RATR_STA_MIDDLE 2 ++#define DM_RATR_STA_LOW 3 ++ ++#define CTSToSelfTHVal 30 ++#define RegC38_TH 20 ++ ++#define WAIotTHVal 25 ++ ++//Dynamic Tx Power Control Threshold ++#define TX_POWER_NEAR_FIELD_THRESH_LVL2 74 ++#define TX_POWER_NEAR_FIELD_THRESH_LVL1 67 ++ ++#define TxHighPwrLevel_Normal 0 ++#define TxHighPwrLevel_Level1 1 ++#define TxHighPwrLevel_Level2 2 ++#define TxHighPwrLevel_BT1 3 ++#define TxHighPwrLevel_BT2 4 ++#define TxHighPwrLevel_15 5 ++#define TxHighPwrLevel_35 6 ++#define TxHighPwrLevel_50 7 ++#define TxHighPwrLevel_70 8 ++#define TxHighPwrLevel_100 9 ++ ++#define DM_Type_ByFW 0 ++#define DM_Type_ByDriver 1 ++ ++typedef struct _RATE_ADAPTIVE ++{ ++ u8 RateAdaptiveDisabled; ++ u8 RATRState; ++ u16 reserve; ++ ++ u32 HighRSSIThreshForRA; ++ u32 High2LowRSSIThreshForRA; ++ u8 Low2HighRSSIThreshForRA40M; ++ u32 LowRSSIThreshForRA40M; ++ u8 Low2HighRSSIThreshForRA20M; ++ u32 LowRSSIThreshForRA20M; ++ u32 UpperRSSIThresholdRATR; ++ u32 MiddleRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR; ++ u32 LowRSSIThresholdRATR40M; ++ u32 LowRSSIThresholdRATR20M; ++ u8 PingRSSIEnable; //cosa add for Netcore long range ping issue ++ u32 PingRSSIRATR; //cosa add for Netcore long range ping issue ++ u32 PingRSSIThreshForRA;//cosa add for Netcore long range ping issue ++ u32 LastRATR; ++ u8 PreRATRState; ++ ++} RATE_ADAPTIVE, *PRATE_ADAPTIVE; ++ ++typedef enum tag_SW_Antenna_Switch_Definition ++{ ++ Antenna_B = 1, ++ Antenna_A = 2, ++ Antenna_MAX = 3, ++}DM_SWAS_E; ++ ++// 20100514 Joseph: Add definition for antenna switching test after link. ++// This indicates two different the steps. ++// In SWAW_STEP_PEAK, driver needs to switch antenna and listen to the signal on the air. ++// In SWAW_STEP_DETERMINE, driver just compares the signal captured in SWAW_STEP_PEAK ++// with original RSSI to determine if it is necessary to switch antenna. ++#define SWAW_STEP_PEAK 0 ++#define SWAW_STEP_DETERMINE 1 ++ ++#define TP_MODE 0 ++#define RSSI_MODE 1 ++#define TRAFFIC_LOW 0 ++#define TRAFFIC_HIGH 1 ++ ++//============================= ++//Neil Chen---2011--06--15-- ++//============================== ++//3 PathDiv ++typedef struct _SW_Antenna_Switch_ ++{ ++ u8 try_flag; ++ s32 PreRSSI; ++ u8 CurAntenna; ++ u8 PreAntenna; ++ u8 RSSI_Trying; ++ u8 TestMode; ++ u8 bTriggerAntennaSwitch; ++ u8 SelectAntennaMap; ++ ++ // Before link Antenna Switch check ++ u8 SWAS_NoLink_State; ++ u32 SWAS_NoLink_BK_Reg860; ++}SWAT_T, *pSWAT_T; ++//======================================== ++ ++struct dm_priv ++{ ++ u8 DM_Type; ++ u8 DMFlag, DMFlag_tmp; ++ ++ //for DIG ++ u8 bDMInitialGainEnable; ++ //u8 binitialized; // for dm_initial_gain_Multi_STA use. ++ DIG_T DM_DigTable; ++ ++ PS_T DM_PSTable; ++ ++ FALSE_ALARM_STATISTICS FalseAlmCnt; ++ ++ //for rate adaptive, in fact, 88c/92c fw will handle this ++ u8 bUseRAMask; ++ RATE_ADAPTIVE RateAdaptive; ++ ++ //* Upper and Lower Signal threshold for Rate Adaptive*/ ++ int UndecoratedSmoothedPWDB; ++ int EntryMinUndecoratedSmoothedPWDB; ++ int EntryMaxUndecoratedSmoothedPWDB; ++ int MinUndecoratedPWDBForDM; ++ int LastMinUndecoratedPWDBForDM; ++ ++ //for High Power ++ u8 bDynamicTxPowerEnable; ++ u8 LastDTPLvl; ++ u8 DynamicTxHighPowerLvl;//Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 ++ ++ //for tx power tracking ++ u8 bTXPowerTracking; ++ u8 TXPowercount; ++ u8 bTXPowerTrackingInit; ++ u8 TxPowerTrackControl; //for mp mode, turn off txpwrtracking as default ++ u8 TM_Trigger; ++ ++ u8 ThermalMeter[2]; // ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 ++ u8 ThermalValue; ++ u8 ThermalValue_LCK; ++ u8 ThermalValue_IQK; ++ u8 ThermalValue_AVG[AVG_THERMAL_NUM]; ++ u8 ThermalValue_AVG_index; ++ u8 ThermalValue_RxGain; ++ u8 ThermalValue_Crystal; ++ u8 Delta_IQK; ++ u8 Delta_LCK; ++ u8 bRfPiEnable; ++ u8 bReloadtxpowerindex; ++ u8 bDoneTxpower; ++ ++ //for APK ++ u32 APKoutput[2][2]; //path A/B; output1_1a/output1_2a ++ u8 bAPKdone; ++ u8 bAPKThermalMeterIgnore; ++ BOOLEAN bDPKdone[2]; ++ BOOLEAN bDPKstore; ++ BOOLEAN bDPKworking; ++ u8 OFDM_min_index_internalPA_DPK[2]; ++ u8 TxPowerLevelDPK[2]; ++ ++ u32 RegA24; ++ ++ //for IQK ++ u32 Reg874; ++ u32 RegC08; ++ u32 Reg88C; ++ u8 Reg522; ++ u8 Reg550; ++ u8 Reg551; ++ u32 Reg870; ++ u32 ADDA_backup[IQK_ADDA_REG_NUM]; ++ u32 IQK_MAC_backup[IQK_MAC_REG_NUM]; ++ u32 IQK_BB_backup[IQK_BB_REG_NUM]; ++ ++ u8 bCCKinCH14; ++ ++ char CCK_index; ++ //u8 Record_CCK_20Mindex; ++ //u8 Record_CCK_40Mindex; ++ char OFDM_index[2]; ++ ++ SWAT_T DM_SWAT_Table; ++ ++ //Neil Chen----2011--06--23----- ++ //3 Path Diversity ++ BOOLEAN bPathDiv_Enable; //For 92D Non-interrupt Antenna Diversity by Neil ,add by wl.2011.07.19 ++ BOOLEAN RSSI_test; ++ s32 RSSI_sum_A; ++ s32 RSSI_cnt_A; ++ s32 RSSI_sum_B; ++ s32 RSSI_cnt_B; ++ struct sta_info *RSSI_target; ++ _timer PathDivSwitchTimer; ++ ++ //for TxPwrTracking ++ int RegE94; ++ int RegE9C; ++ int RegEB4; ++ int RegEBC; ++#if MP_DRIVER == 1 ++ u8 RegC04_MP; ++ u32 RegD04_MP; ++#endif ++ u32 TXPowerTrackingCallbackCnt; //cosa add for debug ++ ++ u32 prv_traffic_idx; // edca turbo ++ ++ u32 RegRF3C[2]; //pathA / pathB ++ ++ // Add for Reading Initial Data Rate SEL Register 0x484 during watchdog. Using for fill tx desc. 2011.3.21 by Thomas ++ u8 INIDATA_RATE[32]; ++}; ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export Marco Definition---------------------------*/ ++//#define DM_MultiSTA_InitGainChangeNotify(Event) {DM_DigTable.CurMultiSTAConnectState = Event;} ++ ++ ++//============================================================ ++// function prototype ++//============================================================ ++void rtl8192d_init_dm_priv(IN PADAPTER Adapter); ++void rtl8192d_deinit_dm_priv(IN PADAPTER Adapter); ++void rtl8192d_InitHalDm(IN PADAPTER Adapter); ++void rtl8192d_HalDmWatchDog(IN PADAPTER Adapter); ++ ++VOID rtl8192d_dm_CheckTXPowerTracking(IN PADAPTER Adapter); ++ ++#endif //__HAL8190PCIDM_H__ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_hal.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,983 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTL8192D_HAL_H__ ++#define __RTL8192D_HAL_H__ ++ ++#include "rtl8192d_spec.h" ++#include "Hal8192DPhyReg.h" ++#include "Hal8192DPhyCfg.h" ++#include "rtl8192d_rf.h" ++#include "rtl8192d_dm.h" ++#include "rtl8192d_recv.h" ++#include "rtl8192d_xmit.h" ++#include "rtl8192d_cmd.h" ++ ++#ifdef CONFIG_PCI_HCI ++ #include ++ #include "Hal8192DEHWImg.h" ++ ++ #define RTL819X_DEFAULT_RF_TYPE RF_2T2R ++ ++//--------------------------------------------------------------------- ++// RTL8192DE From file ++//--------------------------------------------------------------------- ++ #define RTL8192D_FW_IMG "rtl8192DE\\rtl8192dfw.bin" ++ ++ #define RTL8192D_PHY_REG "rtl8192DE\\PHY_REG.txt" ++ #define RTL8192D_PHY_REG_PG "rtl8192DE\\PHY_REG_PG.txt" ++ #define RTL8192D_PHY_REG_MP "rtl8192DE\\PHY_REG_MP.txt" ++ ++ #define RTL8192D_AGC_TAB "rtl8192DE\\AGC_TAB.txt" ++ #define RTL8192D_AGC_TAB_2G "rtl8192DE\\AGC_TAB_2G.txt" ++ #define RTL8192D_AGC_TAB_5G "rtl8192DE\\AGC_TAB_5G.txt" ++ #define RTL8192D_PHY_RADIO_A "rtl8192DE\\radio_a.txt" ++ #define RTL8192D_PHY_RADIO_B "rtl8192DE\\radio_b.txt" ++ #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DE\\radio_a_intPA.txt" ++ #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DE\\radio_b_intPA.txt" ++ #define RTL8192D_PHY_MACREG "rtl8192DE\\MAC_REG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192DE From header ++//--------------------------------------------------------------------- ++ ++ // Fw Array ++ #define Rtl8192D_FwImageArray Rtl8192DEFwImgArray ++ ++ // MAC/BB/PHY Array ++ #define Rtl8192D_MAC_Array Rtl8192DEMAC_2T_Array ++ #define Rtl8192D_AGCTAB_Array Rtl8192DEAGCTAB_Array ++ #define Rtl8192D_AGCTAB_5GArray Rtl8192DEAGCTAB_5GArray ++ #define Rtl8192D_AGCTAB_2GArray Rtl8192DEAGCTAB_2GArray ++ #define Rtl8192D_AGCTAB_2TArray Rtl8192DEAGCTAB_2TArray ++ #define Rtl8192D_AGCTAB_1TArray Rtl8192DEAGCTAB_1TArray ++ #define Rtl8192D_PHY_REG_2TArray Rtl8192DEPHY_REG_2TArray ++ #define Rtl8192D_PHY_REG_1TArray Rtl8192DEPHY_REG_1TArray ++ #define Rtl8192D_PHY_REG_Array_PG Rtl8192DEPHY_REG_Array_PG ++ #define Rtl8192D_PHY_REG_Array_MP Rtl8192DEPHY_REG_Array_MP ++ #define Rtl8192D_RadioA_2TArray Rtl8192DERadioA_2TArray ++ #define Rtl8192D_RadioA_1TArray Rtl8192DERadioA_1TArray ++ #define Rtl8192D_RadioB_2TArray Rtl8192DERadioB_2TArray ++ #define Rtl8192D_RadioB_1TArray Rtl8192DERadioB_1TArray ++ #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DERadioA_2T_intPAArray ++ #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DERadioB_2T_intPAArray ++ ++ // Array length ++ #define Rtl8192D_FwImageArrayLength Rtl8192DEImgArrayLength ++ #define Rtl8192D_MAC_ArrayLength Rtl8192DEMAC_2T_ArrayLength ++ #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DEAGCTAB_5GArrayLength ++ #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DEAGCTAB_2GArrayLength ++ #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DEAGCTAB_2TArrayLength ++ #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DEAGCTAB_1TArrayLength ++ #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DEAGCTAB_ArrayLength ++ #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DEPHY_REG_2TArrayLength ++ #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DEPHY_REG_1TArrayLength ++ #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DEPHY_REG_Array_PGLength ++ #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DEPHY_REG_Array_MPLength ++ #define Rtl8192D_RadioA_2TArrayLength Rtl8192DERadioA_2TArrayLength ++ #define Rtl8192D_RadioB_2TArrayLength Rtl8192DERadioB_2TArrayLength ++ #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DERadioA_2T_intPAArrayLength ++ #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DERadioB_2T_intPAArrayLength ++ ++#elif defined(CONFIG_USB_HCI) ++ ++ #include "Hal8192DUHWImg.h" ++#ifdef CONFIG_WOWLAN ++ #include "Hal8192DUHWImg_wowlan.h" ++#endif //CONFIG_WOWLAN ++ #define RTL819X_DEFAULT_RF_TYPE RF_1T2R ++ ++//--------------------------------------------------------------------- ++// RTL8192DU From file ++//--------------------------------------------------------------------- ++ #define RTL8192D_FW_IMG "rtl8192DU\\rtl8192dfw.bin" ++ ++ #define RTL8192D_PHY_REG "rtl8192DU\\PHY_REG.txt" ++ #define RTL8192D_PHY_REG_PG "rtl8192DU\\PHY_REG_PG.txt" ++ #define RTL8192D_PHY_REG_MP "rtl8192DU\\PHY_REG_MP.txt" ++ ++ #define RTL8192D_AGC_TAB "rtl8192DU\\AGC_TAB.txt" ++ #define RTL8192D_AGC_TAB_2G "rtl8192DU\\AGC_TAB_2G.txt" ++ #define RTL8192D_AGC_TAB_5G "rtl8192DU\\AGC_TAB_5G.txt" ++ #define RTL8192D_PHY_RADIO_A "rtl8192DU\\radio_a.txt" ++ #define RTL8192D_PHY_RADIO_B "rtl8192DU\\radio_b.txt" ++ #define RTL8192D_PHY_RADIO_A_intPA "rtl8192DU\\radio_a_intPA.txt" ++ #define RTL8192D_PHY_RADIO_B_intPA "rtl8192DU\\radio_b_intPA.txt" ++ #define RTL8192D_PHY_MACREG "rtl8192DU\\MAC_REG.txt" ++ ++//--------------------------------------------------------------------- ++// RTL8192DU From header ++//--------------------------------------------------------------------- ++ ++ // Fw Array ++ #define Rtl8192D_FwImageArray Rtl8192DUFwImgArray ++#ifdef CONFIG_WOWLAN ++ #define Rtl8192D_FwWWImageArray Rtl8192DUFwWWImgArray ++#endif //CONFIG_WOWLAN ++ // MAC/BB/PHY Array ++ #define Rtl8192D_MAC_Array Rtl8192DUMAC_2T_Array ++ #define Rtl8192D_AGCTAB_Array Rtl8192DUAGCTAB_Array ++ #define Rtl8192D_AGCTAB_5GArray Rtl8192DUAGCTAB_5GArray ++ #define Rtl8192D_AGCTAB_2GArray Rtl8192DUAGCTAB_2GArray ++ #define Rtl8192D_AGCTAB_2TArray Rtl8192DUAGCTAB_2TArray ++ #define Rtl8192D_AGCTAB_1TArray Rtl8192DUAGCTAB_1TArray ++ #define Rtl8192D_PHY_REG_2TArray Rtl8192DUPHY_REG_2TArray ++ #define Rtl8192D_PHY_REG_1TArray Rtl8192DUPHY_REG_1TArray ++ #define Rtl8192D_PHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG ++ #define Rtl8192D_PHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP ++ #define Rtl8192D_RadioA_2TArray Rtl8192DURadioA_2TArray ++ #define Rtl8192D_RadioA_1TArray Rtl8192DURadioA_1TArray ++ #define Rtl8192D_RadioB_2TArray Rtl8192DURadioB_2TArray ++ #define Rtl8192D_RadioB_1TArray Rtl8192DURadioB_1TArray ++ #define Rtl8192D_RadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray ++ #define Rtl8192D_RadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray ++ ++ // Array length ++ #define Rtl8192D_FwImageArrayLength Rtl8192DUImgArrayLength ++ #define Rtl8192D_MAC_ArrayLength Rtl8192DUMAC_2T_ArrayLength ++ #define Rtl8192D_AGCTAB_5GArrayLength Rtl8192DUAGCTAB_5GArrayLength ++ #define Rtl8192D_AGCTAB_2GArrayLength Rtl8192DUAGCTAB_2GArrayLength ++ #define Rtl8192D_AGCTAB_2TArrayLength Rtl8192DUAGCTAB_2TArrayLength ++ #define Rtl8192D_AGCTAB_1TArrayLength Rtl8192DUAGCTAB_1TArrayLength ++ #define Rtl8192D_AGCTAB_ArrayLength Rtl8192DUAGCTAB_ArrayLength ++ #define Rtl8192D_PHY_REG_2TArrayLength Rtl8192DUPHY_REG_2TArrayLength ++ #define Rtl8192D_PHY_REG_1TArrayLength Rtl8192DUPHY_REG_1TArrayLength ++ #define Rtl8192D_PHY_REG_Array_PGLength Rtl8192DUPHY_REG_Array_PGLength ++ #define Rtl8192D_PHY_REG_Array_MPLength Rtl8192DUPHY_REG_Array_MPLength ++ #define Rtl8192D_RadioA_2TArrayLength Rtl8192DURadioA_2TArrayLength ++ #define Rtl8192D_RadioB_2TArrayLength Rtl8192DURadioB_2TArrayLength ++ #define Rtl8192D_RadioA_2T_intPAArrayLength Rtl8192DURadioA_2T_intPAArrayLength ++ #define Rtl8192D_RadioB_2T_intPAArrayLength Rtl8192DURadioB_2T_intPAArrayLength ++ ++ // The file name "_2T" is for 92CU, "_1T" is for 88CU. Modified by tynli. 2009.11.24. ++/* #define Rtl819XFwImageArray Rtl8192DUFwImgArray ++ #define Rtl819XMAC_Array Rtl8192DUMAC_2TArray ++ #define Rtl819XAGCTAB_Array Rtl8192DUAGCTAB_Array ++ #define Rtl819XAGCTAB_5GArray Rtl8192DUAGCTAB_5GArray ++ #define Rtl819XAGCTAB_2GArray Rtl8192DUAGCTAB_2GArray ++ #define Rtl819XPHY_REG_2TArray Rtl8192DUPHY_REG_2TArray ++ #define Rtl819XPHY_REG_1TArray Rtl8192DUPHY_REG_1TArray ++ #define Rtl819XRadioA_2TArray Rtl8192DURadioA_2TArray ++ #define Rtl819XRadioA_1TArray Rtl8192DURadioA_1TArray ++ #define Rtl819XRadioA_2T_intPAArray Rtl8192DURadioA_2T_intPAArray ++ #define Rtl819XRadioB_2TArray Rtl8192DURadioB_2TArray ++ #define Rtl819XRadioB_1TArray Rtl8192DURadioB_1TArray ++ #define Rtl819XRadioB_2T_intPAArray Rtl8192DURadioB_2T_intPAArray ++ #define Rtl819XPHY_REG_Array_PG Rtl8192DUPHY_REG_Array_PG ++ #define Rtl819XPHY_REG_Array_MP Rtl8192DUPHY_REG_Array_MP ++ ++ #define Rtl819XAGCTAB_2TArray Rtl8192DUAGCTAB_2TArray ++ #define Rtl819XAGCTAB_1TArray Rtl8192DUAGCTAB_1TArray*/ ++ ++#endif ++ ++#define DRVINFO_SZ 4 // unit is 8bytes ++#define PageNum_128(_Len) (u32)(((_Len)>>7) + ((_Len)&0x7F ? 1:0)) ++ ++// ++// Check if FW header exists. We do not consider the lower 4 bits in this case. ++// By tynli. 2009.12.04. ++// ++#define IS_FW_HEADER_EXIST(_pFwHdr) ((le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x92C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFF0) == 0x88C0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D0 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D1 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D2 ||\ ++ (le16_to_cpu(_pFwHdr->Signature)&0xFFFF) == 0x92D3 ) ++ ++#define FW_8192D_SIZE 0x8000 ++#define FW_8192D_START_ADDRESS 0x1000 ++ ++#define MAX_PAGE_SIZE 4096 // @ page : 4k bytes ++ ++typedef enum _FIRMWARE_SOURCE{ ++ FW_SOURCE_IMG_FILE = 0, ++ FW_SOURCE_HEADER_FILE = 1, //from header file ++}FIRMWARE_SOURCE, *PFIRMWARE_SOURCE; ++ ++typedef struct _RT_FIRMWARE{ ++ FIRMWARE_SOURCE eFWSource; ++ u8* szFwBuffer; ++ u32 ulFwLength; ++#ifdef CONFIG_WOWLAN ++ u8* szWoWLANFwBuffer; ++ u32 ulWoWLANFwLength; ++#endif //CONFIG_WOWLAN ++}RT_FIRMWARE, *PRT_FIRMWARE, RT_FIRMWARE_92D, *PRT_FIRMWARE_92D; ++ ++// ++// This structure must be cared byte-ordering ++// ++// Added by tynli. 2009.12.04. ++typedef struct _RT_8192D_FIRMWARE_HDR {//8-byte alinment required ++ ++ //--- LONG WORD 0 ---- ++ u16 Signature; // 92C0: test chip; 92C, 88C0: test chip; 88C1: MP A-cut; 92C1: MP A-cut ++ u8 Category; // AP/NIC and USB/PCI ++ u8 Function; // Reserved for different FW function indcation, for further use when driver needs to download different FW in different conditions ++ u16 Version; // FW Version ++ u8 Subversion; // FW Subversion, default 0x00 ++ u8 Rsvd1; ++ ++ ++ //--- LONG WORD 1 ---- ++ u8 Month; // Release time Month field ++ u8 Date; // Release time Date field ++ u8 Hour; // Release time Hour field ++ u8 Minute; // Release time Minute field ++ u16 RamCodeSize; // The size of RAM code ++ u16 Rsvd2; ++ ++ //--- LONG WORD 2 ---- ++ u32 SvnIdx; // The SVN entry index ++ u32 Rsvd3; ++ ++ //--- LONG WORD 3 ---- ++ u32 Rsvd4; ++ u32 Rsvd5; ++ ++}RT_8192D_FIRMWARE_HDR, *PRT_8192D_FIRMWARE_HDR; ++ ++#define DRIVER_EARLY_INT_TIME 0x05 ++#define BCN_DMA_ATIME_INT_TIME 0x02 ++ ++typedef enum _BT_CoType{ ++ BT_2Wire = 0, ++ BT_ISSC_3Wire = 1, ++ BT_Accel = 2, ++ BT_CSR = 3, ++ BT_CSR_ENHAN = 4, ++ BT_RTL8756 = 5, ++} BT_CoType, *PBT_CoType; ++ ++typedef enum _BT_CurState{ ++ BT_OFF = 0, ++ BT_ON = 1, ++} BT_CurState, *PBT_CurState; ++ ++typedef enum _BT_ServiceType{ ++ BT_SCO = 0, ++ BT_A2DP = 1, ++ BT_HID = 2, ++ BT_HID_Idle = 3, ++ BT_Scan = 4, ++ BT_Idle = 5, ++ BT_OtherAction = 6, ++ BT_Busy = 7, ++ BT_OtherBusy = 8, ++} BT_ServiceType, *PBT_ServiceType; ++ ++typedef enum _BT_RadioShared{ ++ BT_Radio_Shared = 0, ++ BT_Radio_Individual = 1, ++} BT_RadioShared, *PBT_RadioShared; ++ ++typedef struct _BT_COEXIST_STR{ ++ u8 BluetoothCoexist; ++ u8 BT_Ant_Num; ++ u8 BT_CoexistType; ++ u8 BT_State; ++ u8 BT_CUR_State; //0:on, 1:off ++ u8 BT_Ant_isolation; //0:good, 1:bad ++ u8 BT_PapeCtrl; //0:SW, 1:SW/HW dynamic ++ u8 BT_Service; ++ u8 BT_RadioSharedType; ++ u8 Ratio_Tx; ++ u8 Ratio_PRI; ++}BT_COEXIST_STR, *PBT_COEXIST_STR; ++ ++//Added for 92D IQK setting. ++typedef struct _IQK_MATRIX_REGS_SETTING{ ++ BOOLEAN bIQKDone; ++#if 1 ++ int Value[1][IQK_Matrix_REG_NUM]; ++#else ++ u32 Mark[IQK_Matrix_REG_NUM]; ++ u32 Value[IQK_Matrix_REG_NUM]; ++#endif ++}IQK_MATRIX_REGS_SETTING,*PIQK_MATRIX_REGS_SETTING; ++ ++#ifdef CONFIG_USB_RX_AGGREGATION ++ ++typedef enum _USB_RX_AGG_MODE{ ++ USB_RX_AGG_DISABLE, ++ USB_RX_AGG_DMA, ++ USB_RX_AGG_USB, ++ USB_RX_AGG_DMA_USB ++}USB_RX_AGG_MODE; ++ ++#define MAX_RX_DMA_BUFFER_SIZE 10240 // 10K for 8192C RX DMA buffer ++ ++#endif ++ ++ ++#define TX_SELE_HQ BIT(0) // High Queue ++#define TX_SELE_LQ BIT(1) // Low Queue ++#define TX_SELE_NQ BIT(2) // Normal Queue ++ ++ ++// Note: We will divide number of page equally for each queue other than public queue! ++ ++#define TX_TOTAL_PAGE_NUMBER 0xF8 ++#define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) ++ ++// For Normal Chip Setting ++// (HPQ + LPQ + NPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define NORMAL_PAGE_NUM_PUBQ 0x56 ++ ++ ++// For Test Chip Setting ++// (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER ++#define TEST_PAGE_NUM_PUBQ 0x89 ++#define TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC 0x7A ++#define NORMAL_PAGE_NUM_PUBQ_92D_DUAL_MAC 0x5A ++#define NORMAL_PAGE_NUM_HPQ_92D_DUAL_MAC 0x10 ++#define NORMAL_PAGE_NUM_LPQ_92D_DUAL_MAC 0x10 ++#define NORMAL_PAGE_NUM_NORMALQ_92D_DUAL_MAC 0 ++ ++#define TX_PAGE_BOUNDARY_DUAL_MAC (TX_TOTAL_PAGE_NUMBER_92D_DUAL_MAC + 1) ++ ++// For Test Chip Setting ++#define WMM_TEST_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_TEST_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_TEST_PAGE_NUM_PUBQ 0xA3 ++#define WMM_TEST_PAGE_NUM_HPQ 0x29 ++#define WMM_TEST_PAGE_NUM_LPQ 0x29 ++ ++ ++//Note: For Normal Chip Setting ,modify later ++#define WMM_NORMAL_TX_TOTAL_PAGE_NUMBER 0xF5 ++#define WMM_NORMAL_TX_PAGE_BOUNDARY (WMM_TEST_TX_TOTAL_PAGE_NUMBER + 1) //F6 ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ 0xB0 ++#define WMM_NORMAL_PAGE_NUM_HPQ 0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ 0x1C ++#define WMM_NORMAL_PAGE_NUM_NPQ 0x1C ++ ++#define WMM_NORMAL_PAGE_NUM_PUBQ_92D 0X65//0x82 ++#define WMM_NORMAL_PAGE_NUM_HPQ_92D 0X30//0x29 ++#define WMM_NORMAL_PAGE_NUM_LPQ_92D 0X30 ++#define WMM_NORMAL_PAGE_NUM_NPQ_92D 0X30 ++ ++//------------------------------------------------------------------------- ++// Chip specific ++//------------------------------------------------------------------------- ++ ++#define CHIP_BONDING_IDENTIFIER(_value) (((_value)>>22)&0x3) ++#define CHIP_BONDING_92C_1T2R 0x1 ++#define CHIP_BONDING_88C_USB_MCARD 0x2 ++#define CHIP_BONDING_88C_USB_HP 0x1 ++ ++// ++// 2011.01.06. Define new structure of chip version for RTL8723 and so on. Added by tynli. ++// ++/* ++ | BIT15:12 | BIT11:8 | BIT 7 | BIT6:4 | BIT3 | BIT2:0 | ++ |-------------+-----------+-----------+-------+-----------+-------| ++ | IC version(CUT) | ROM version | Manufacturer | RF type | Chip type | IC Type | ++ | | | TSMC/UMC | | TEST/NORMAL| | ++*/ ++// [15:12] IC version(CUT): A-cut=0, B-cut=1, C-cut=2, D-cut=3 ++// [7] Manufacturer: TSMC=0, UMC=1 ++// [6:4] RF type: 1T1R=0, 1T2R=1, 2T2R=2 ++// [3] Chip type: TEST=0, NORMAL=1 ++// [2:0] IC type: 81xxC=0, 8723=1, 92D=2 ++ ++#define CHIP_8723 BIT(0) ++#define CHIP_92D BIT(1) ++#define NORMAL_CHIP BIT(3) ++#define RF_TYPE_1T1R (~(BIT(4)|BIT(5)|BIT(6))) ++#define RF_TYPE_1T2R BIT(4) ++#define RF_TYPE_2T2R BIT(5) ++#define CHIP_VENDOR_UMC BIT(7) ++#define B_CUT_VERSION BIT(12) ++#define C_CUT_VERSION BIT(13) ++#define D_CUT_VERSION ((BIT(12)|BIT(13))) ++#define E_CUT_VERSION BIT(14) ++ ++ ++// MASK ++#define IC_TYPE_MASK (BIT(0)|BIT(1)|BIT(2)) ++#define CHIP_TYPE_MASK BIT(3) ++#define RF_TYPE_MASK (BIT(4)|BIT(5)|BIT(6)) ++#define MANUFACTUER_MASK BIT(7) ++#define ROM_VERSION_MASK (BIT(11)|BIT(10)|BIT(9)|BIT(8)) ++#define CUT_VERSION_MASK (BIT(15)|BIT(14)|BIT(13)|BIT(12)) ++ ++// Get element ++#define GET_CVID_IC_TYPE(version) ((version) & IC_TYPE_MASK) ++#define GET_CVID_CHIP_TYPE(version) ((version) & CHIP_TYPE_MASK) ++#define GET_CVID_RF_TYPE(version) ((version) & RF_TYPE_MASK) ++#define GET_CVID_MANUFACTUER(version) ((version) & MANUFACTUER_MASK) ++#define GET_CVID_ROM_VERSION(version) ((version) & ROM_VERSION_MASK) ++#define GET_CVID_CUT_VERSION(version) ((version) & CUT_VERSION_MASK) ++ ++#define IS_81XXC(version) ((GET_CVID_IC_TYPE(version) == 0)? _TRUE : _FALSE) ++#define IS_8723_SERIES(version) ((GET_CVID_IC_TYPE(version) == CHIP_8723)? _TRUE : _FALSE) ++#define IS_92D(version) ((GET_CVID_IC_TYPE(version) == CHIP_92D)? _TRUE : _FALSE) ++#define IS_1T1R(version) ((GET_CVID_RF_TYPE(version))? _FALSE : _TRUE) ++#define IS_1T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_1T2R)? _TRUE : _FALSE) ++#define IS_2T2R(version) ((GET_CVID_RF_TYPE(version) == RF_TYPE_2T2R)? _TRUE : _FALSE) ++#define IS_CHIP_VENDOR_UMC(version) ((GET_CVID_MANUFACTUER(version))? _TRUE: _FALSE) ++ ++#define IS_92C_SERIAL(version) ((IS_81XXC(version) && IS_2T2R(version)) ? _TRUE : _FALSE) ++#define IS_VENDOR_UMC_A_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++#define IS_VENDOR_8723_A_CUT(version) ((IS_8723_SERIES(version)) ? ((GET_CVID_CUT_VERSION(version)) ? _FALSE : _TRUE) : _FALSE) ++// 88/92C UMC B-cut vendor is set to TSMC so we need to check CHIP_VENDOR_UMC bit is not 1. ++#define IS_81xxC_VENDOR_UMC_B_CUT(version) ((IS_CHIP_VENDOR_UMC(version)) ? ((GET_CVID_CUT_VERSION(version) == B_CUT_VERSION) ? _TRUE : _FALSE):_FALSE) ++#define IS_92D_SINGLEPHY(version) ((IS_92D(version)) ? (IS_2T2R(version) ? _TRUE: _FALSE) : _FALSE) ++ ++#define IS_92D_C_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == C_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_D_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == D_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_92D_E_CUT(version) ((IS_92D(version)) ? ((GET_CVID_CUT_VERSION(version) == E_CUT_VERSION) ? _TRUE : _FALSE) : _FALSE) ++#define IS_NORMAL_CHIP92D(version) ((GET_CVID_CHIP_TYPE(version))? _TRUE: _FALSE) ++ ++typedef enum _VERSION_8192D{ ++ VERSION_TEST_CHIP_88C = 0x0000, ++ VERSION_TEST_CHIP_92C = 0x0020, ++ VERSION_TEST_UMC_CHIP_8723 = 0x0081, ++ VERSION_NORMAL_TSMC_CHIP_88C = 0x0008, ++ VERSION_NORMAL_TSMC_CHIP_92C = 0x0028, ++ VERSION_NORMAL_TSMC_CHIP_92C_1T2R = 0x0018, ++ VERSION_NORMAL_UMC_CHIP_88C_A_CUT = 0x0088, ++ VERSION_NORMAL_UMC_CHIP_92C_A_CUT = 0x00a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_A_CUT = 0x0098, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_A_CUT = 0x0089, ++ VERSION_NORMAL_UMC_CHIP_8723_1T1R_B_CUT = 0x1089, ++ VERSION_NORMAL_UMC_CHIP_88C_B_CUT = 0x1088, ++ VERSION_NORMAL_UMC_CHIP_92C_B_CUT = 0x10a8, ++ VERSION_NORMAL_UMC_CHIP_92C_1T2R_B_CUT = 0x1090, ++ VERSION_TEST_CHIP_92D_SINGLEPHY= 0x0022, ++ VERSION_TEST_CHIP_92D_DUALPHY = 0x0002, ++ VERSION_NORMAL_CHIP_92D_SINGLEPHY= 0x002a, ++ VERSION_NORMAL_CHIP_92D_DUALPHY = 0x000a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_SINGLEPHY = 0x202a, ++ VERSION_NORMAL_CHIP_92D_C_CUT_DUALPHY = 0x200a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_SINGLEPHY = 0x302a, ++ VERSION_NORMAL_CHIP_92D_D_CUT_DUALPHY = 0x300a, ++ VERSION_NORMAL_CHIP_92D_E_CUT_SINGLEPHY = 0x402a, ++ VERSION_NORMAL_CHIP_92D_E_CUT_DUALPHY = 0x400a, ++}VERSION_8192D,*PVERSION_8192D; ++ ++ ++//------------------------------------------------------------------------- ++// Channel Plan ++//------------------------------------------------------------------------- ++enum ChannelPlan{ ++ CHPL_FCC = 0, ++ CHPL_IC = 1, ++ CHPL_ETSI = 2, ++ CHPL_SPAIN = 3, ++ CHPL_FRANCE = 4, ++ CHPL_MKK = 5, ++ CHPL_MKK1 = 6, ++ CHPL_ISRAEL = 7, ++ CHPL_TELEC = 8, ++ CHPL_GLOBAL = 9, ++ CHPL_WORLD = 10, ++}; ++ ++typedef struct _TxPowerInfo{ ++ u8 CCKIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_1SIndex[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40_2SIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ s8 HT20IndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 OFDMIndexDiff[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT40MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 HT20MaxOffset[RF_PATH_MAX][CHANNEL_GROUP_MAX]; ++ u8 TSSI_A[3]; ++ u8 TSSI_B[3]; ++ u8 TSSI_A_5G[3]; //5GL/5GM/5GH ++ u8 TSSI_B_5G[3]; ++}TxPowerInfo, *PTxPowerInfo; ++ ++#define EFUSE_REAL_CONTENT_LEN 1024 ++#define EFUSE_MAP_LEN 256 ++#define EFUSE_MAX_SECTION 32 ++#define EFUSE_MAX_SECTION_BASE 16 ++// To prevent out of boundary programming case, leave 1byte and program full section ++// 9bytes + 1byt + 5bytes and pre 1byte. ++// For worst case: ++// | 2byte|----8bytes----|1byte|--7bytes--| //92D ++#define EFUSE_OOB_PROTECT_BYTES 18 // PG data exclude header, dummy 7 bytes frome CP test and reserved 1byte. ++ ++typedef enum _PA_MODE { ++ PA_MODE_EXTERNAL = 0x00, ++ PA_MODE_INTERNAL_SP3T = 0x01, ++ PA_MODE_INTERNAL_SPDT = 0x02 ++} PA_MODE; ++ ++#ifdef CONFIG_PCI_HCI ++struct hal_data_8192de ++{ ++ VERSION_8192D VersionID; ++ ++ // add for 92D Phy mode/mac/Band mode ++ MACPHY_MODE_8192D MacPhyMode92D; ++ BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G ++ BAND_TYPE BandSet92D; ++ BOOLEAN bIsVS; ++ BOOLEAN bSupportRemoteWakeUp; ++ u8 AutoLoadStatusFor8192D; ++ ++ BOOLEAN bNOPG; ++ ++ BOOLEAN bMasterOfDMSP; ++ BOOLEAN bSlaveOfDMSP; ++ ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ u32 IntrMask[2]; ++ u32 IntrMaskToSet[2]; ++ ++ u32 DisabledFunctions; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ u32 TransmitConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ u16 BasicRateSet; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ // ++ // EEPROM setting. ++ // ++ u16 EEPROMVID; ++ u16 EEPROMDID; ++ u16 EEPROMSVID; ++ u16 EEPROMSMID; ++ u16 EEPROMChannelPlan; ++ u16 EEPROMVersion; ++ ++ u8 EEPROMCustomerID; ++ u8 EEPROMBoardType; ++ u8 EEPROMRegulatory; ++ ++ u8 EEPROMThermalMeter; ++ ++ u8 EEPROMC9; ++ u8 EEPROMCC; ++ u8 PAMode; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ u8 CrystalCap; // CrystalCap. ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ u8 InternalPA5G[2]; //pathA / pathB ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ BOOLEAN bPhyValueInitReady; ++ ++ BOOLEAN bTXPowerDataReadFromEEPORM; ++ ++ BOOLEAN bInSetPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress ++ BOOLEAN bNeedIQK; ++ ++ BOOLEAN bLCKInProgress; ++ ++ BOOLEAN bEarlyModeEnable; ++ ++ ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done ++ ++#if 1 ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++#else ++ //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 ++ u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. ++#endif ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegTxPause; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 RegCR_1; ++ ++ struct dm_priv dmpriv; ++ ++ u8 bInterruptMigration; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u16 RegRRSR; ++ ++ u16 EfuseUsedBytes; ++ u8 RTSInitRate; // 2010.11.24.by tynli. ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192de HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++ ++// ++// Function disabled. ++// ++#define DF_TX_BIT BIT0 ++#define DF_RX_BIT BIT1 ++#define DF_IO_BIT BIT2 ++#define DF_IO_D3_BIT BIT3 ++ ++#define RT_DF_TYPE u32 ++#define RT_DISABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions |= ((RT_DF_TYPE)(__FuncBits))) ++#define RT_ENABLE_FUNC(__pAdapter, __FuncBits) ((__pAdapter)->DisabledFunctions &= (~((RT_DF_TYPE)(__FuncBits)))) ++#define RT_IS_FUNC_DISABLED(__pAdapter, __FuncBits) ( (__pAdapter)->DisabledFunctions & (__FuncBits) ) ++ ++void InterruptRecognized8192DE(PADAPTER Adapter, PRT_ISR_CONTENT pIsrContent); ++VOID UpdateInterruptMask8192DE(PADAPTER Adapter, u32 AddMSR, u32 RemoveMSR); ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++//should be renamed and moved to another file ++typedef enum _INTERFACE_SELECT_8192DUSB{ ++ INTF_SEL0_USB = 0, // USB ++ INTF_SEL1_MINICARD = 1, // Minicard ++ INTF_SEL2_EKB_PRO = 2, // Eee keyboard proprietary ++ INTF_SEL3_PRO = 3, // Customized proprietary ++} INTERFACE_SELECT_8192DUSB, *PINTERFACE_SELECT_8192DUSB; ++ ++typedef INTERFACE_SELECT_8192DUSB INTERFACE_SELECT_USB; ++ ++struct hal_data_8192du ++{ ++ VERSION_8192D VersionID; ++ ++ // add for 92D Phy mode/mac/Band mode ++ MACPHY_MODE_8192D MacPhyMode92D; ++ BAND_TYPE CurrentBandType92D; //0:2.4G, 1:5G ++ BAND_TYPE BandSet92D; ++ BOOLEAN bIsVS; ++ ++ BOOLEAN bNOPG; ++ ++ BOOLEAN bSupportRemoteWakeUp; ++ BOOLEAN bMasterOfDMSP; ++ BOOLEAN bSlaveOfDMSP; ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ BOOLEAN bInModeSwitchProcess; ++#endif ++ ++ u16 CustomerID; ++ ++ u16 FirmwareVersion; ++ u16 FirmwareVersionRev; ++ u16 FirmwareSubVersion; ++ ++ //current WIFI_PHY values ++ u32 ReceiveConfig; ++ WIRELESS_MODE CurrentWirelessMode; ++ HT_CHANNEL_WIDTH CurrentChannelBW; ++ u8 CurrentChannel; ++ u8 nCur40MhzPrimeSC;// Control channel sub-carrier ++ u16 BasicRateSet; ++ ++ INTERFACE_SELECT_8192DUSB InterfaceSel; ++ ++ //rf_ctrl ++ u8 rf_chip; ++ u8 rf_type; ++ u8 NumTotalRFPath; ++ ++ // ++ // EEPROM setting. ++ // ++ u8 EEPROMVersion; ++ u16 EEPROMVID; ++ u16 EEPROMPID; ++ u16 EEPROMSVID; ++ u16 EEPROMSDID; ++ u8 EEPROMCustomerID; ++ u8 EEPROMSubCustomerID; ++ u8 EEPROMRegulatory; ++ ++ u8 EEPROMThermalMeter; ++ ++ u8 EEPROMC9; ++ u8 EEPROMCC; ++ u8 PAMode; ++ ++ u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER_2G]; ++ u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; // For HT 40MHZ pwr ++ s8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// HT 20<->40 Pwr diff ++ u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];// For HT<->legacy pwr diff ++ // For power group ++ u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER]; ++ ++ u8 LegacyHTTxPowerDiff;// Legacy to HT rate power diff ++ ++ u8 CrystalCap; // CrystalCap. ++ ++#ifdef CONFIG_BT_COEXIST ++ struct btcoexist_priv bt_coexist; ++#endif ++ ++ // Read/write are allow for following hardware information variables ++ u8 framesync; ++ u32 framesyncC34; ++ u8 framesyncMonitor; ++ u8 DefaultInitialGain[4]; ++ u8 pwrGroupCnt; ++ u32 MCSTxPowerLevelOriginalOffset[MAX_PG_GROUP][16]; ++ u32 CCKTxPowerLevelOriginalOffset; ++ ++ u32 AntennaTxPath; // Antenna path Tx ++ u32 AntennaRxPath; // Antenna path Rx ++ u8 BluetoothCoexist; ++ u8 ExternalPA; ++ u8 InternalPA5G[2]; //pathA / pathB ++ ++ //u32 LedControlNum; ++ //u32 LedControlMode; ++ //u32 TxPowerTrackControl; ++ u8 b1x1RecvCombine; // for 1T1R receive combining ++ ++ u8 bCurrentTurboEDCA; ++ u32 AcParam_BE; //Original parameter for BE, use for EDCA turbo. ++ ++ //vivi, for tx power tracking, 20080407 ++ //u16 TSSI_13dBm; ++ //u32 Pwr_Track; ++ // The current Tx Power Level ++ u8 CurrentCckTxPwrIdx; ++ u8 CurrentOfdm24GTxPwrIdx; ++ ++ BB_REGISTER_DEFINITION_T PHYRegDef[4]; //Radio A/B/C/D ++ ++ BOOLEAN bRFPathRxEnable[4]; // We support 4 RF path now. ++ ++ u32 RfRegChnlVal[2]; ++ ++ u8 bCckHighPower; ++ ++ BOOLEAN bPhyValueInitReady; ++ ++ BOOLEAN bTXPowerDataReadFromEEPORM; ++ ++ BOOLEAN bInSetPower; ++ ++ //RDG enable ++ BOOLEAN bRDGEnable; ++ ++ BOOLEAN bLoadIMRandIQKSettingFor2G;// True if IMR or IQK have done for 2.4G in scan progress ++ BOOLEAN bNeedIQK; ++ ++ BOOLEAN bLCKInProgress; ++ ++ BOOLEAN bEarlyModeEnable; ++ ++ ATOMIC_T IQKRdyForXmit;// Tx must wait for IQK done ++ ++#if 1 ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; ++#else ++ //regc80¡¢regc94¡¢regc4c¡¢regc88¡¢regc9c¡¢regc14¡¢regca0¡¢regc1c¡¢regc78 ++ u4Byte IQKMatrixReg[IQK_Matrix_REG_NUM]; ++ IQK_MATRIX_REGS_SETTING IQKMatrixRegSetting[IQK_Matrix_Settings_NUM]; // 1->2G,24->5G 20M channel,21->5G 40M channel. ++#endif ++ ++ //for host message to fw ++ u8 LastHMEBoxNum; ++ ++ u8 fw_ractrl; ++ // Beacon function related global variable. ++ u32 RegBcnCtrlVal; ++ u8 RegTxPause; ++ u8 RegFwHwTxQCtrl; ++ u8 RegReg542; ++ u8 RegCR_1; ++ ++ struct dm_priv dmpriv; ++ ++ u8 FwRsvdPageStartOffset; //2010.06.23. Added by tynli. Reserve page start offset except beacon in TxQ. ++ ++ //Query RF by FW ++ BOOLEAN bReadRFbyFW; ++ ++ // For 92C USB endpoint setting ++ // ++ ++ u32 UsbBulkOutSize; ++ ++ int RtBulkOutPipe[3]; ++ int RtBulkInPipe; ++ int RtIntInPipe; ++ ++ // Add for dual MAC 0--Mac0 1--Mac1 ++ u32 interfaceIndex; ++ ++ u8 OutEpQueueSel; ++ u8 OutEpNumber; ++ ++ u8 Queue2EPNum[8];//for out endpoint number mapping ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 UsbTxAggMode; ++ u8 UsbTxAggDescNum; ++#endif ++#ifdef CONFIG_USB_RX_AGGREGATION ++ u16 HwRxPageSize; // Hardware setting ++ u32 MaxUsbRxAggBlock; ++ ++ USB_RX_AGG_MODE UsbRxAggMode; ++ u8 UsbRxAggBlockCount; // USB Block count. Block size is 512-byte in hight speed and 64-byte in full speed ++ u8 UsbRxAggBlockTimeout; ++ u8 UsbRxAggPageCount; // 8192C DMA page count ++ u8 UsbRxAggPageTimeout; ++#endif ++ ++ u16 RegRRSR; ++ ++ u16 EfuseUsedBytes; ++ u8 RTSInitRate; // 2010.11.24.by tynli. ++#ifdef CONFIG_P2P ++ struct P2P_PS_Offload_t p2p_ps_offload; ++#endif //CONFIG_P2P ++}; ++ ++typedef struct hal_data_8192du HAL_DATA_TYPE, *PHAL_DATA_TYPE; ++#endif ++ ++#define GET_HAL_DATA(__pAdapter) ((HAL_DATA_TYPE *)((__pAdapter)->HalData)) ++#define GET_RF_TYPE(priv) (GET_HAL_DATA(priv)->rf_type) ++ ++int FirmwareDownload92D(IN PADAPTER Adapter,IN BOOLEAN bUsedWoWLANFw); ++VOID rtl8192d_FirmwareSelfReset(IN PADAPTER Adapter); ++void rtl8192d_ReadChipVersion(IN PADAPTER Adapter); ++VOID rtl8192d_ReadChannelPlan(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); ++VOID rtl8192d_ReadTxPowerInfo(PADAPTER Adapter, u8* PROMContent, BOOLEAN AutoLoadFail); ++VOID rtl8192d_ResetDualMacSwitchVariables(IN PADAPTER Adapter); ++u8 GetEEPROMSize8192D(PADAPTER Adapter); ++void rtl8192d_HalSetBrateCfg(PADAPTER Adapter, u8 *mBratesOS, u16 *pBrateCfg); ++BOOLEAN PHY_CheckPowerOffFor8192D(PADAPTER Adapter); ++VOID PHY_SetPowerOnFor8192D(PADAPTER Adapter); ++//void PHY_ConfigMacPhyMode92D(PADAPTER Adapter); ++void rtl8192d_free_hal_data(_adapter * padapter); ++void rtl8192d_set_hal_ops(struct hal_ops *pHalFunc); ++ ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ ++ ++extern void Hal_SetAntenna(PADAPTER pAdapter); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetTxPower(PADAPTER pAdapter); ++extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); ++extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetDataRate(PADAPTER pAdapter); ++extern void Hal_SetChannel(PADAPTER pAdapter); ++extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); ++extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); ++extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); ++extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); ++extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++ ++ ++#endif //end CONFIG_MP_INCLUDED ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_led.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,44 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTL8192D_LED_H_ ++#define __RTL8192D_LED_H_ ++ ++#include ++#include ++#include ++ ++ ++//================================================================================ ++// Interface to manipulate LED objects. ++//================================================================================ ++#ifdef CONFIG_USB_HCI ++void rtl8192du_InitSwLeds(_adapter *padapter); ++void rtl8192du_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++void rtl8192de_gen_RefreshLedState(PADAPTER Adapter); ++void rtl8192de_InitSwLeds(_adapter *padapter); ++void rtl8192de_DeInitSwLeds(_adapter *padapter); ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_recv.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,183 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTL8192D_RECV_H_ ++#define _RTL8192D_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF 1024//512//128 ++ #else ++ #define NR_RECVBUFF (16) ++ #endif ++#elif defined(PLATFORM_OS_CE) ++ #ifdef CONFIG_SDIO_HCI ++ #define NR_RECVBUFF (128) ++ #else ++ #define NR_RECVBUFF (4) ++ #endif ++#else ++#ifdef CONFIG_SINGLE_RECV_BUF ++ #define NR_RECVBUFF (1) ++#else ++ #define NR_RECVBUFF (4) ++#endif //CONFIG_SINGLE_RECV_BUF ++ #define NR_PREALLOC_RECV_SKB (8) ++#endif ++ ++ ++ ++#define RECV_BLK_SZ 512 ++#define RECV_BLK_CNT 16 ++#define RECV_BLK_TH RECV_BLK_CNT ++ ++#if defined(CONFIG_USB_HCI) ++ ++#ifdef PLATFORM_OS_CE ++#define MAX_RECVBUF_SZ (8192+1024) // 8K+1k ++#else ++ #ifndef CONFIG_MINIMAL_MEMORY_USAGE ++ //#define MAX_RECVBUF_SZ (32768) // 32k ++ //#define MAX_RECVBUF_SZ (16384) //16K ++ //#define MAX_RECVBUF_SZ (10240) //10K ++ #define MAX_RECVBUF_SZ (15360) // 15k < 16k ++ #else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++ #endif ++#endif ++ ++#elif defined(CONFIG_PCI_HCI) ++//#ifndef CONFIG_MINIMAL_MEMORY_USAGE ++// #define MAX_RECVBUF_SZ (9100) ++//#else ++ #define MAX_RECVBUF_SZ (4000) // about 4K ++//#endif ++ ++#define RX_MPDU_QUEUE 0 ++#define RX_CMD_QUEUE 1 ++#define RX_MAX_QUEUE 2 ++#endif ++ ++#define RECV_BULK_IN_ADDR 0x80 ++#define RECV_INT_IN_ADDR 0x81 ++ ++#define PHY_RSSI_SLID_WIN_MAX 100 ++#define PHY_LINKQUALITY_SLID_WIN_MAX 20 ++ ++struct phy_stat ++{ ++ unsigned int phydw0; ++ ++ unsigned int phydw1; ++ ++ unsigned int phydw2; ++ ++ unsigned int phydw3; ++ ++ unsigned int phydw4; ++ ++ unsigned int phydw5; ++ ++ unsigned int phydw6; ++ ++ unsigned int phydw7; ++}; ++ ++typedef struct _Phy_OFDM_Rx_Status_Report_8192cd ++{ ++ unsigned char trsw_gain_X[4]; ++ unsigned char pwdb_all; ++ unsigned char cfosho_X[4]; ++ unsigned char cfotail_X[4]; ++ unsigned char rxevm_X[2]; ++ unsigned char rxsnr_X[4]; ++ unsigned char pdsnr_X[2]; ++ unsigned char csi_current_X[2]; ++ unsigned char csi_target_X[2]; ++ unsigned char sigevm; ++ unsigned char max_ex_pwr; ++//#ifdef RTL8192SE ++#ifdef CONFIG_LITTLE_ENDIAN ++ unsigned char ex_intf_flg:1; ++ unsigned char sgi_en:1; ++ unsigned char rxsc:2; ++ //unsigned char rsvd:4; ++ unsigned char idle_long:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char ANTSELB:1; ++ unsigned char ANTSEL:1; ++#else // _BIG_ENDIAN_ ++ //unsigned char rsvd:4; ++ unsigned char ANTSEL:1; ++ unsigned char ANTSELB:1; ++ unsigned char r_ant_train_en:1; ++ unsigned char idle_long:1; ++ unsigned char rxsc:2; ++ unsigned char sgi_en:1; ++ unsigned char ex_intf_flg:1; ++#endif ++//#else // RTL8190, RTL8192E ++// unsigned char sgi_en; ++// unsigned char rxsc_sgien_exflg; ++//#endif ++}__attribute__ ((packed)) PHY_STS_OFDM_8192CD_T,PHY_RX_DRIVER_INFO_8192CD; ++ ++typedef struct _Phy_CCK_Rx_Status_Report_8192cd ++{ ++ /* For CCK rate descriptor. This is a signed 8:1 variable. LSB bit presend ++ 0.5. And MSB 7 bts presend a signed value. Range from -64~+63.5. */ ++ u8 adc_pwdb_X[4]; ++ u8 SQ_rpt; ++ u8 cck_agc_rpt; ++} PHY_STS_CCK_8192CD_T; ++ ++// Rx smooth factor ++#define Rx_Smooth_Factor (20) ++ ++#ifdef CONFIG_USB_HCI ++typedef struct _INTERRUPT_MSG_FORMAT_EX{ ++ unsigned int C2H_MSG0; ++ unsigned int C2H_MSG1; ++ unsigned int C2H_MSG2; ++ unsigned int C2H_MSG3; ++ unsigned int HISR; // from HISR Reg0x124, read to clear ++ unsigned int HISRE;// from HISRE Reg0x12c, read to clear ++ unsigned int MSG_EX; ++}INTERRUPT_MSG_FORMAT_EX,*PINTERRUPT_MSG_FORMAT_EX; ++ ++void rtl8192du_init_recvbuf(_adapter *padapter, struct recv_buf *precvbuf); ++int rtl8192du_init_recv_priv(_adapter * padapter); ++void rtl8192du_free_recv_priv(_adapter * padapter); ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++int rtl8192de_init_recv_priv(_adapter * padapter); ++void rtl8192de_free_recv_priv(_adapter * padapter); ++#endif ++ ++void rtl8192d_translate_rx_signal_stuff(union recv_frame *precvframe, struct phy_stat *pphy_info); ++void rtl8192d_query_rx_desc_status(union recv_frame *precvframe, struct recv_stat *pdesc); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_rf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,98 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/****************************************************************************** ++ * ++ * ++ * Module: rtl8192d_rf.h ( Header File) ++ * ++ * Note: Collect every HAL RF type exter API or constant. ++ * ++ * Function: ++ * ++ * Export: ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * ++ * 09/25/2008 MHC Create initial version. ++ * ++ * ++******************************************************************************/ ++#ifndef _RTL8192D_RF_H_ ++#define _RTL8192D_RF_H_ ++/* Check to see if the file has been included already. */ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++// ++// For RF 6052 Series ++// ++#define RF6052_MAX_TX_PWR 0x3F ++#define RF6052_MAX_REG 0x3F ++#define RF6052_MAX_PATH 2 ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++/*------------------------Export global variable----------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++/*------------------------Export Marco Definition---------------------------*/ ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++// ++// RF RL6052 Series API ++// ++void rtl8192d_RF_ChangeTxPath( IN PADAPTER Adapter, ++ IN u16 DataRate); ++void rtl8192d_PHY_RF6052SetBandwidth( ++ IN PADAPTER Adapter, ++ IN HT_CHANNEL_WIDTH Bandwidth); ++VOID rtl8192d_PHY_RF6052SetCckTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerlevel); ++VOID rtl8192d_PHY_RF6052SetOFDMTxPower( ++ IN PADAPTER Adapter, ++ IN u8* pPowerLevel, ++ IN u8 Channel); ++int PHY_RF6052_Config8192D( IN PADAPTER Adapter ); ++ ++BOOLEAN rtl8192d_PHY_EnableAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); ++ ++void rtl8192d_PHY_PowerDownAnotherPHY(IN PADAPTER Adapter, IN BOOLEAN bMac0); ++ ++ ++/*--------------------------Exported Function prototype---------------------*/ ++ ++ ++#endif/* End of HalRf.h */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_spec.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1879 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTL8192D_SPEC_H__ ++#define __RTL8192D_SPEC_H__ ++ ++#include ++ ++#ifndef BIT ++#define BIT(x) (1 << (x)) ++#endif ++ ++#define BIT0 0x00000001 ++#define BIT1 0x00000002 ++#define BIT2 0x00000004 ++#define BIT3 0x00000008 ++#define BIT4 0x00000010 ++#define BIT5 0x00000020 ++#define BIT6 0x00000040 ++#define BIT7 0x00000080 ++#define BIT8 0x00000100 ++#define BIT9 0x00000200 ++#define BIT10 0x00000400 ++#define BIT11 0x00000800 ++#define BIT12 0x00001000 ++#define BIT13 0x00002000 ++#define BIT14 0x00004000 ++#define BIT15 0x00008000 ++#define BIT16 0x00010000 ++#define BIT17 0x00020000 ++#define BIT18 0x00040000 ++#define BIT19 0x00080000 ++#define BIT20 0x00100000 ++#define BIT21 0x00200000 ++#define BIT22 0x00400000 ++#define BIT23 0x00800000 ++#define BIT24 0x01000000 ++#define BIT25 0x02000000 ++#define BIT26 0x04000000 ++#define BIT27 0x08000000 ++#define BIT28 0x10000000 ++#define BIT29 0x20000000 ++#define BIT30 0x40000000 ++#define BIT31 0x80000000 ++ ++ ++//============================================================ ++// 8192D Regsiter offset definition ++//============================================================ ++ ++ ++//============================================================ ++// ++//============================================================ ++ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++#define REG_SYS_ISO_CTRL 0x0000 ++#define REG_SYS_FUNC_EN 0x0002 ++#define REG_APS_FSMCO 0x0004 ++#define REG_SYS_CLKR 0x0008 ++#define REG_9346CR 0x000A ++#define REG_EE_VPD 0x000C ++#define REG_AFE_MISC 0x0010 ++#define REG_SPS0_CTRL 0x0011 ++#define REG_POWER_OFF_IN_PROCESS 0x0017 ++#define REG_SPS_OCP_CFG 0x0018 ++#define REG_RSV_CTRL 0x001C ++#define REG_RF_CTRL 0x001F ++#define REG_LDOA15_CTRL 0x0020 ++#define REG_LDOV12D_CTRL 0x0021 ++#define REG_LDOHCI12_CTRL 0x0022 ++#define REG_LPLDO_CTRL 0x0023 ++#define REG_AFE_XTAL_CTRL 0x0024 ++#define REG_AFE_PLL_CTRL 0x0028 ++#define REG_MAC_PHY_CTRL 0x002c //for 92d, DMDP,SMSP,DMSP contrl ++#define REG_EFUSE_CTRL 0x0030 ++#define REG_EFUSE_TEST 0x0034 ++#define REG_PWR_DATA 0x0038 ++#define REG_CAL_TIMER 0x003C ++#define REG_ACLK_MON 0x003E ++#define REG_GPIO_MUXCFG 0x0040 ++//#define REG_GPIO_MUXCFG 0x0041 ++#define REG_GPIO_IO_SEL 0x0042 ++#define REG_MAC_PINMUX_CFG 0x0043 ++#define REG_GPIO_PIN_CTRL 0x0044 ++#define REG_GPIO_INTM 0x0048 ++#define REG_LEDCFG0 0x004C ++#define REG_LEDCFG1 0x004D ++#define REG_LEDCFG2 0x004E ++#define REG_LEDCFG3 0x004F ++#define REG_FSIMR 0x0050 ++#define REG_FSISR 0x0054 ++ ++#define REG_MCUFWDL 0x0080 ++#define REG_WOWLAN_REASON 0x0081 ++#define REG_HMEBOX_EXT_0 0x0088 ++#define REG_HMEBOX_EXT_1 0x008A ++#define REG_HMEBOX_EXT_2 0x008C ++#define REG_HMEBOX_EXT_3 0x008E ++ ++#define REG_BIST_SCAN 0x00D0 ++#define REG_BIST_RPT 0x00D4 ++#define REG_BIST_ROM_RPT 0x00D8 ++#define REG_USB_SIE_INTF 0x00E0 ++#define REG_PCIE_MIO_INTF 0x00E4 ++#define REG_PCIE_MIO_INTD 0x00E8 ++#define REG_HPON_FSM 0x00EC ++#define REG_SYS_CFG 0x00F0 ++#define REG_MAC_PHY_CTRL_NORMAL 0x00f8 ++ ++#define REG_MAC0 0x0081 ++#define REG_MAC1 0x0053 ++#define FW_MAC0_ready 0x18 ++#define FW_MAC1_ready 0x1A ++#define MAC0_ON BIT7 ++#define MAC1_ON BIT0 ++#define mac0_ready BIT0 ++#define mac1_ready BIT0 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++#define REG_CR 0x0100 ++#define REG_PBP 0x0104 ++#define REG_TRXDMA_CTRL 0x010C ++#define REG_TRXFF_BNDY 0x0114 ++#define REG_TRXFF_STATUS 0x0118 ++#define REG_RXFF_PTR 0x011C ++#define REG_HIMR 0x0120 ++#define REG_HISR 0x0124 ++#define REG_HIMRE 0x0128 ++#define REG_HISRE 0x012C ++#define REG_CPWM 0x012F ++#define REG_FWIMR 0x0130 ++#define REG_FWISR 0x0134 ++#define REG_FTIMR 0x0138 ++#define REG_PKTBUF_DBG_CTRL 0x0140 ++#define REG_PKTBUF_DBG_DATA_L 0x0144 ++#define REG_PKTBUF_DBG_DATA_H 0x0148 ++ ++#define REG_TC0_CTRL 0x0150 ++#define REG_TC1_CTRL 0x0154 ++#define REG_TC2_CTRL 0x0158 ++#define REG_TC3_CTRL 0x015C ++#define REG_TC4_CTRL 0x0160 ++#define REG_TCUNIT_BASE 0x0164 ++#define REG_MBIST_START 0x0174 ++#define REG_MBIST_DONE 0x0178 ++#define REG_MBIST_FAIL 0x017C ++#define REG_C2HEVT_MSG_NORMAL 0x01A0 ++#define REG_C2HEVT_CLEAR 0x01AF ++#define REG_C2HEVT_MSG_TEST 0x01B8 ++#define REG_MCUTST_1 0x01c0 ++#define REG_FMETHR 0x01C8 ++#define REG_HMETFR 0x01CC ++#define REG_HMEBOX_0 0x01D0 ++#define REG_HMEBOX_1 0x01D4 ++#define REG_HMEBOX_2 0x01D8 ++#define REG_HMEBOX_3 0x01DC ++ ++#define REG_LLT_INIT 0x01E0 ++#define REG_BB_ACCEESS_CTRL 0x01E8 ++#define REG_BB_ACCESS_DATA 0x01EC ++ ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RQPN 0x0200 ++#define REG_FIFOPAGE 0x0204 ++#define REG_TDECTRL 0x0208 ++#define REG_TXDMA_OFFSET_CHK 0x020C ++#define REG_TXDMA_STATUS 0x0210 ++#define REG_RQPN_NPQ 0x0214 ++ ++//----------------------------------------------------- ++// ++// 0x0280h ~ 0x02FFh RXDMA Configuration ++// ++//----------------------------------------------------- ++#define REG_RXDMA_AGG_PG_TH 0x0280 ++#define REG_RXPKT_NUM 0x0284 ++#define REG_RXDMA_STATUS 0x0288 ++ ++ ++//----------------------------------------------------- ++// ++// 0x0300h ~ 0x03FFh PCIe ++// ++//----------------------------------------------------- ++#define REG_PCIE_CTRL_REG 0x0300 ++#define REG_INT_MIG 0x0304 // Interrupt Migration ++#define REG_BCNQ_DESA 0x0308 // TX Beacon Descriptor Address ++#define REG_HQ_DESA 0x0310 // TX High Queue Descriptor Address ++#define REG_MGQ_DESA 0x0318 // TX Manage Queue Descriptor Address ++#define REG_VOQ_DESA 0x0320 // TX VO Queue Descriptor Address ++#define REG_VIQ_DESA 0x0328 // TX VI Queue Descriptor Address ++#define REG_BEQ_DESA 0x0330 // TX BE Queue Descriptor Address ++#define REG_BKQ_DESA 0x0338 // TX BK Queue Descriptor Address ++#define REG_RX_DESA 0x0340 // RX Queue Descriptor Address ++#define REG_DBI 0x0348 // Backdoor REG for Access Configuration ++//sherry added for DBI Read/Write 20091126 ++#define REG_DBI_WDATA 0x0348 // Backdoor REG for Access Configuration ++#define REG_DBI_RDATA 0x034C //Backdoor REG for Access Configuration ++#define REG_DBI_CTRL 0x0350 //Backdoor REG for Access Configuration ++#define REG_DBI_FLAG 0x0352 //Backdoor REG for Access Configuration#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_MDIO 0x0354 // MDIO for Access PCIE PHY ++#define REG_DBG_SEL 0x0360 // Debug Selection Register ++#define REG_PCIE_HRPWM 0x0361 //PCIe RPWM ++#define REG_PCIE_HCPWM 0x0363 //PCIe CPWM ++#define REG_UART_CTRL 0x0364 // UART Control ++#define REG_UART_TX_DESA 0x0370 // UART TX Descriptor Address ++#define REG_UART_RX_DESA 0x0378 // UART Rx Descriptor Address ++ ++ ++// spec version 11 ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++#define REG_VOQ_INFORMATION 0x0400 ++#define REG_VIQ_INFORMATION 0x0404 ++#define REG_BEQ_INFORMATION 0x0408 ++#define REG_BKQ_INFORMATION 0x040C ++#define REG_MGQ_INFORMATION 0x0410 ++#define REG_HGQ_INFORMATION 0x0414 ++#define REG_BCNQ_INFORMATION 0x0418 ++ ++ ++#define REG_CPU_MGQ_INFORMATION 0x041C ++#define REG_FWHW_TXQ_CTRL 0x0420 ++#define REG_HWSEQ_CTRL 0x0423 ++#define REG_TXPKTBUF_BCNQ_BDNY 0x0424 ++#define REG_TXPKTBUF_MGQ_BDNY 0x0425 ++#define REG_LIFETIME_EN 0x0426 ++#define REG_MULTI_BCNQ_OFFSET 0x0427 ++#define REG_SPEC_SIFS 0x0428 ++#define REG_RL 0x042A ++#define REG_DARFRC 0x0430 ++#define REG_RARFRC 0x0438 ++#define REG_RRSR 0x0440 ++#define REG_ARFR0 0x0444 ++#define REG_ARFR1 0x0448 ++#define REG_ARFR2 0x044C ++#define REG_ARFR3 0x0450 ++#define REG_AGGLEN_LMT 0x0458 ++#define REG_AMPDU_MIN_SPACE 0x045C ++#define REG_TXPKTBUF_WMAC_LBK_BF_HD 0x045D ++#define REG_FAST_EDCA_CTRL 0x0460 ++#define REG_RD_RESP_PKT_TH 0x0463 ++#define REG_INIRTS_RATE_SEL 0x0480 ++#define REG_INIDATA_RATE_SEL 0x0484 ++#define REG_POWER_STATUS 0x04A4 ++#define REG_POWER_STAGE1 0x04B4 ++#define REG_POWER_STAGE2 0x04B8 ++#define REG_PKT_VO_VI_LIFE_TIME 0x04C0 ++#define REG_PKT_BE_BK_LIFE_TIME 0x04C2 ++#define REG_STBC_SETTING 0x04C4 ++#define REG_PROT_MODE_CTRL 0x04C8 ++#define REG_MAX_AGGR_NUM 0x04CA ++#define REG_RTS_MAX_AGGR_NUM 0x04CB ++#define REG_BAR_MODE_CTRL 0x04CC ++#define REG_RA_TRY_RATE_AGG_LMT 0x04CF ++#define REG_EARLY_MODE_CONTROL 0x04D0 ++#define REG_NQOS_SEQ 0x04DC ++#define REG_QOS_SEQ 0x04DE ++#define REG_NEED_CPU_HANDLE 0x04E0 ++#define REG_PKT_LOSE_RPT 0x04E1 ++#define REG_PTCL_ERR_STATUS 0x04E2 ++#define REG_DUMMY 0x04FC ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++#define REG_EDCA_VO_PARAM 0x0500 ++#define REG_EDCA_VI_PARAM 0x0504 ++#define REG_EDCA_BE_PARAM 0x0508 ++#define REG_EDCA_BK_PARAM 0x050C ++#define REG_BCNTCFG 0x0510 ++#define REG_PIFS 0x0512 ++#define REG_RDG_PIFS 0x0513 ++#define REG_SIFS_CTX 0x0514 ++#define REG_SIFS_TRX 0x0516 ++#define REG_TSFTR_SYN_OFFSET 0x0518 ++#define REG_AGGR_BREAK_TIME 0x051A ++#define REG_SLOT 0x051B ++#define REG_TX_PTCL_CTRL 0x0520 ++#define REG_TXPAUSE 0x0522 ++#define REG_DIS_TXREQ_CLR 0x0523 ++#define REG_RD_CTRL 0x0524 ++#define REG_TBTT_PROHIBIT 0x0540 ++#define REG_RD_NAV_NXT 0x0544 ++#define REG_NAV_PROT_LEN 0x0546 ++#define REG_BCN_CTRL 0x0550 ++#define REG_BCN_CTRL_1 0x0551 ++#define REG_MBID_NUM 0x0552 ++#define REG_DUAL_TSF_RST 0x0553 ++#define REG_BCN_INTERVAL 0x0554 // The same as REG_MBSSID_BCN_SPACE ++#define REG_MBSSID_BCN_SPACE 0x0554 ++#define REG_DRVERLYINT 0x0558 ++#define REG_BCNDMATIM 0x0559 ++#define REG_ATIMWND 0x055A ++#define REG_USTIME_TSF 0x055C ++#define REG_BCN_MAX_ERR 0x055D ++#define REG_RXTSF_OFFSET_CCK 0x055E ++#define REG_RXTSF_OFFSET_OFDM 0x055F ++#define REG_TSFTR 0x0560 ++#define REG_TSFTR1 0x0568 ++#define REG_INIT_TSFTR 0x0564 ++#define REG_ATIMWND_1 0x0570 ++#define REG_PSTIMER 0x0580 ++#define REG_TIMER0 0x0584 ++#define REG_TIMER1 0x0588 ++#define REG_ACMHWCTRL 0x05C0 ++#define REG_ACMRSTCTRL 0x05C1 ++#define REG_ACMAVG 0x05C2 ++#define REG_VO_ADMTIME 0x05C4 ++#define REG_VI_ADMTIME 0x05C6 ++#define REG_BE_ADMTIME 0x05C8 ++#define REG_EDCA_RANDOM_GEN 0x05CC ++#define REG_SCH_TXCMD 0x05D0 ++ ++#define REG_DMC 0x05F0 //Dual MAC Co-Existence Register ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++#define REG_APSD_CTRL 0x0600 ++#define REG_BWOPMODE 0x0603 ++#define REG_TCR 0x0604 ++#define REG_RCR 0x0608 ++#define REG_RX_PKT_LIMIT 0x060C ++#define REG_RX_DLK_TIME 0x060D ++#define REG_RX_DRVINFO_SZ 0x060F ++ ++#define REG_MACID 0x0610 ++#define REG_BSSID 0x0618 ++#define REG_MAR 0x0620 ++#define REG_MBIDCAMCFG 0x0628 ++ ++#define REG_USTIME_EDCA 0x0638 ++#define REG_MAC_SPEC_SIFS 0x063A ++#define REG_RESP_SIFS_CCK 0x063C ++#define REG_RESP_SIFS_OFDM 0x063E ++#define REG_ACKTO 0x0640 ++#define REG_CTS2TO 0x0641 ++#define REG_EIFS 0x0642 ++ ++ ++//WMA, BA, CCX ++#define REG_NAV_CTRL 0x0650 ++#define REG_BACAMCMD 0x0654 ++#define REG_BACAMCONTENT 0x0658 ++#define REG_LBDLY 0x0660 ++#define REG_FWDLY 0x0661 ++#define REG_RXERR_RPT 0x0664 ++#define REG_WMAC_TRXPTCL_CTL 0x0668 ++ ++ ++// Security ++#define REG_CAMCMD 0x0670 ++#define REG_CAMWRITE 0x0674 ++#define REG_CAMREAD 0x0678 ++#define REG_CAMDBG 0x067C ++#define REG_SECCFG 0x0680 ++ ++// Power ++#define REG_WOW_CTRL 0x0690 ++#define REG_PSSTATUS 0x0691 ++#define REG_PS_RX_INFO 0x0692 ++#define REG_LPNAV_CTRL 0x0694 ++#define REG_WKFMCAM_CMD 0x0698 ++#define REG_WKFMCAM_RWD 0x069C ++#define REG_RXFLTMAP0 0x06A0 ++#define REG_RXFLTMAP1 0x06A2 ++#define REG_RXFLTMAP2 0x06A4 ++#define REG_BCN_PSR_RPT 0x06A8 ++#define REG_CALB32K_CTRL 0x06AC ++#define REG_PKT_MON_CTRL 0x06B4 ++#define REG_BT_COEX_TABLE 0x06C0 ++#define REG_WMAC_RESP_TXINFO 0x06D8 ++ ++#define REG_MACID1 0x0700 ++#define REG_BSSID1 0x0708 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++// for 92DU high_Queue low_Queue Normal_Queue select ++#define REG_USB_High_NORMAL_Queue_Select_MAC0 0xFE44 ++//#define REG_USB_LOW_Queue_Select_MAC0 0xFE45 ++#define REG_USB_High_NORMAL_Queue_Select_MAC1 0xFE47 ++//#define REG_USB_LOW_Queue_Select_MAC1 0xFE48 ++ ++// For test chip ++#define REG_TEST_USB_TXQS 0xFE48 ++#define REG_TEST_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_TEST_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_TEST_SIE_OPTIONAL 0xFE64 ++#define REG_TEST_SIE_CHIRP_K 0xFE65 ++#define REG_TEST_SIE_PHY 0xFE66 // 0xFE66~0xFE6B ++#define REG_TEST_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_TEST_SIE_STRING 0xFE80 // 0xFE80~0xFEB9 ++ ++ ++// For normal chip ++#define REG_NORMAL_SIE_VID 0xFE60 // 0xFE60~0xFE61 ++#define REG_NORMAL_SIE_PID 0xFE62 // 0xFE62~0xFE63 ++#define REG_NORMAL_SIE_OPTIONAL 0xFE64 ++#define REG_NORMAL_SIE_EP 0xFE65 // 0xFE65~0xFE67 ++#define REG_NORMAL_SIE_PHY 0xFE68 // 0xFE68~0xFE6B ++#define REG_NORMAL_SIE_MAC_ADDR 0xFE70 // 0xFE70~0xFE75 ++#define REG_NORMAL_SIE_STRING 0xFE80 // 0xFE80~0xFEDF ++ ++ ++//----------------------------------------------------- ++// ++// Redifine 8192C register definition for compatibility ++// ++//----------------------------------------------------- ++ ++// TODO: use these definition when using REG_xxx naming rule. ++// NOTE: DO NOT Remove these definition. Use later. ++ ++#define SYS_ISO_CTRL REG_SYS_ISO_CTRL // System Isolation Interface Control. ++#define SYS_FUNC_EN REG_SYS_FUNC_EN // System Function Enable. ++#define SYS_CLK REG_SYS_CLKR ++#define CR9346 REG_9346CR // 93C46/93C56 Command Register. ++#define EFUSE_CTRL REG_EFUSE_CTRL // E-Fuse Control. ++#define EFUSE_TEST REG_EFUSE_TEST // E-Fuse Test. ++#define MSR (REG_CR + 2) // Media Status register ++#define ISR REG_HISR ++#define TSFR REG_TSFTR // Timing Sync Function Timer Register. ++ ++#define MACIDR0 REG_MACID // MAC ID Register, Offset 0x0050-0x0053 ++#define MACIDR4 (REG_MACID + 4) // MAC ID Register, Offset 0x0054-0x0055 ++ ++#define PBP REG_PBP ++ ++// Redifine MACID register, to compatible prior ICs. ++#define IDR0 MACIDR0 ++#define IDR4 MACIDR4 ++ ++ ++// ++// 9. Security Control Registers (Offset: ) ++// ++#define RWCAM REG_CAMCMD //IN 8190 Data Sheet is called CAMcmd ++#define WCAMI REG_CAMWRITE // Software write CAM input content ++#define RCAMO REG_CAMREAD // Software read/write CAM config ++#define CAMDBG REG_CAMDBG ++#define SECR REG_SECCFG //Security Configuration Register ++ ++// Unused register ++#define UnusedRegister 0x1BF ++#define DCAM UnusedRegister ++#define PSR UnusedRegister ++#define BBAddr UnusedRegister ++#define PhyDataR UnusedRegister ++ ++#define InvalidBBRFValue 0x12345678 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++ ++//---------------------------------------------------------------------------- ++// 8192C Cmd9346CR bits (Offset 0xA, 16bit) ++//---------------------------------------------------------------------------- ++#define CmdEEPROM_En BIT5 // EEPROM enable when set 1 ++#define CmdEERPOMSEL BIT4 // System EEPROM select, 0: boot from E-FUSE, 1: The EEPROM used is 9346 ++#define Cmd9346CR_9356SEL BIT4 ++#define AutoLoadEEPROM (CmdEEPROM_En|CmdEERPOMSEL) ++#define AutoLoadEFUSE CmdEEPROM_En ++ ++// 8192C GPIO MUX Configuration Register (offset 0x40, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIOSEL_GPIO 0 ++#define GPIOSEL_ENBT BIT5 ++ ++//---------------------------------------------------------------------------- ++// 8192C GPIO PIN Control Register (offset 0x44, 4 byte) ++//---------------------------------------------------------------------------- ++#define GPIO_IN REG_GPIO_PIN_CTRL // GPIO pins input value ++#define GPIO_OUT (REG_GPIO_PIN_CTRL+1) // GPIO pins output value ++#define GPIO_IO_SEL (REG_GPIO_PIN_CTRL+2) // GPIO pins output enable when a bit is set to "1"; otherwise, input is configured. ++#define GPIO_MOD (REG_GPIO_PIN_CTRL+3) ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C (MSR) Media Status Register (Offset 0x4C, 8 bits) ++//---------------------------------------------------------------------------- ++/* ++Network Type ++00: No link ++01: Link in ad hoc network ++10: Link in infrastructure network ++11: AP mode ++Default: 00b. ++*/ ++#define MSR_NOLINK 0x00 ++#define MSR_ADHOC 0x01 ++#define MSR_INFRA 0x02 ++#define MSR_AP 0x03 ++ ++// ++// 6. Adaptive Control Registers (Offset: 0x0160 - 0x01CF) ++// ++//---------------------------------------------------------------------------- ++// 8192C Response Rate Set Register (offset 0x181, 24bits) ++//---------------------------------------------------------------------------- ++#define RRSR_RSC_OFFSET 21 ++#define RRSR_SHORT_OFFSET 23 ++#define RRSR_RSC_BW_40M 0x600000 ++#define RRSR_RSC_UPSUBCHNL 0x400000 ++#define RRSR_RSC_LOWSUBCHNL 0x200000 ++#define RRSR_SHORT 0x800000 ++#define RRSR_1M BIT0 ++#define RRSR_2M BIT1 ++#define RRSR_5_5M BIT2 ++#define RRSR_11M BIT3 ++#define RRSR_6M BIT4 ++#define RRSR_9M BIT5 ++#define RRSR_12M BIT6 ++#define RRSR_18M BIT7 ++#define RRSR_24M BIT8 ++#define RRSR_36M BIT9 ++#define RRSR_48M BIT10 ++#define RRSR_54M BIT11 ++#define RRSR_MCS0 BIT12 ++#define RRSR_MCS1 BIT13 ++#define RRSR_MCS2 BIT14 ++#define RRSR_MCS3 BIT15 ++#define RRSR_MCS4 BIT16 ++#define RRSR_MCS5 BIT17 ++#define RRSR_MCS6 BIT18 ++#define RRSR_MCS7 BIT19 ++#define BRSR_AckShortPmb BIT23 ++// CCK ACK: use Short Preamble or not ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C Rate Definition ++//---------------------------------------------------------------------------- ++//CCK ++#define RATR_1M 0x00000001 ++#define RATR_2M 0x00000002 ++#define RATR_55M 0x00000004 ++#define RATR_11M 0x00000008 ++//OFDM ++#define RATR_6M 0x00000010 ++#define RATR_9M 0x00000020 ++#define RATR_12M 0x00000040 ++#define RATR_18M 0x00000080 ++#define RATR_24M 0x00000100 ++#define RATR_36M 0x00000200 ++#define RATR_48M 0x00000400 ++#define RATR_54M 0x00000800 ++//MCS 1 Spatial Stream ++#define RATR_MCS0 0x00001000 ++#define RATR_MCS1 0x00002000 ++#define RATR_MCS2 0x00004000 ++#define RATR_MCS3 0x00008000 ++#define RATR_MCS4 0x00010000 ++#define RATR_MCS5 0x00020000 ++#define RATR_MCS6 0x00040000 ++#define RATR_MCS7 0x00080000 ++//MCS 2 Spatial Stream ++#define RATR_MCS8 0x00100000 ++#define RATR_MCS9 0x00200000 ++#define RATR_MCS10 0x00400000 ++#define RATR_MCS11 0x00800000 ++#define RATR_MCS12 0x01000000 ++#define RATR_MCS13 0x02000000 ++#define RATR_MCS14 0x04000000 ++#define RATR_MCS15 0x08000000 ++ ++ ++// NOTE: For 92CU - Ziv ++//CCK ++#define RATE_1M BIT(0) ++#define RATE_2M BIT(1) ++#define RATE_5_5M BIT(2) ++#define RATE_11M BIT(3) ++//OFDM ++#define RATE_6M BIT(4) ++#define RATE_9M BIT(5) ++#define RATE_12M BIT(6) ++#define RATE_18M BIT(7) ++#define RATE_24M BIT(8) ++#define RATE_36M BIT(9) ++#define RATE_48M BIT(10) ++#define RATE_54M BIT(11) ++//MCS 1 Spatial Stream ++#define RATE_MCS0 BIT(12) ++#define RATE_MCS1 BIT(13) ++#define RATE_MCS2 BIT(14) ++#define RATE_MCS3 BIT(15) ++#define RATE_MCS4 BIT(16) ++#define RATE_MCS5 BIT(17) ++#define RATE_MCS6 BIT(18) ++#define RATE_MCS7 BIT(19) ++//MCS 2 Spatial Stream ++#define RATE_MCS8 BIT(20) ++#define RATE_MCS9 BIT(21) ++#define RATE_MCS10 BIT(22) ++#define RATE_MCS11 BIT(23) ++#define RATE_MCS12 BIT(24) ++#define RATE_MCS13 BIT(25) ++#define RATE_MCS14 BIT(26) ++#define RATE_MCS15 BIT(27) ++ ++ ++ ++ ++// ALL CCK Rate ++#define RATE_ALL_CCK RATR_1M|RATR_2M|RATR_55M|RATR_11M ++#define RATE_ALL_OFDM_AG RATR_6M|RATR_9M|RATR_12M|RATR_18M|RATR_24M|\ ++ RATR_36M|RATR_48M|RATR_54M ++#define RATE_ALL_OFDM_1SS RATR_MCS0|RATR_MCS1|RATR_MCS2|RATR_MCS3 |\ ++ RATR_MCS4|RATR_MCS5|RATR_MCS6|RATR_MCS7 ++#define RATE_ALL_OFDM_2SS RATR_MCS8|RATR_MCS9|RATR_MCS10|RATR_MCS11|\ ++ RATR_MCS12|RATR_MCS13|RATR_MCS14|RATR_MCS15 ++ ++//---------------------------------------------------------------------------- ++// 8192C BW_OPMODE bits (Offset 0x203, 8bit) ++//---------------------------------------------------------------------------- ++#define BW_OPMODE_20MHZ BIT2 ++#define BW_OPMODE_5G BIT1 ++#define BW_OPMODE_11J BIT0 ++ ++ ++//---------------------------------------------------------------------------- ++// 8192C CAM Config Setting (offset 0x250, 1 byte) ++//---------------------------------------------------------------------------- ++#define CAM_VALID BIT15 ++#define CAM_NOTVALID 0x0000 ++#define CAM_USEDK BIT5 ++ ++#define CAM_CONTENT_COUNT 8 ++ ++#define CAM_NONE 0x0 ++#define CAM_WEP40 0x01 ++#define CAM_TKIP 0x02 ++#define CAM_AES 0x04 ++#define CAM_WEP104 0x05 ++#define CAM_SMS4 0x6 ++ ++ ++#define TOTAL_CAM_ENTRY 32 ++#define HALF_CAM_ENTRY 16 ++ ++#define CAM_CONFIG_USEDK _TRUE ++#define CAM_CONFIG_NO_USEDK _FALSE ++ ++#define CAM_WRITE BIT16 ++#define CAM_READ 0x00000000 ++#define CAM_POLLINIG BIT31 ++ ++#define SCR_UseDK 0x01 ++#define SCR_TxSecEnable 0x02 ++#define SCR_RxSecEnable 0x04 ++ ++ ++// ++// 12. Host Interrupt Status Registers (Offset: 0x0300 - 0x030F) ++// ++//---------------------------------------------------------------------------- ++// 8190 IMR/ISR bits (offset 0xfd, 8bits) ++//---------------------------------------------------------------------------- ++#define IMR8190_DISABLED 0x0 ++// IMR DW0 Bit 0-31 ++#define IMR_BCNDMAINT6 BIT31 // Beacon DMA Interrupt 6 ++#define IMR_BCNDMAINT5 BIT30 // Beacon DMA Interrupt 5 ++#define IMR_BCNDMAINT4 BIT29 // Beacon DMA Interrupt 4 ++#define IMR_BCNDMAINT3 BIT28 // Beacon DMA Interrupt 3 ++#define IMR_BCNDMAINT2 BIT27 // Beacon DMA Interrupt 2 ++#define IMR_BCNDMAINT1 BIT26 // Beacon DMA Interrupt 1 ++#define IMR_BCNDOK8 BIT25 // Beacon Queue DMA OK Interrup 8 ++#define IMR_BCNDOK7 BIT24 // Beacon Queue DMA OK Interrup 7 ++#define IMR_BCNDOK6 BIT23 // Beacon Queue DMA OK Interrup 6 ++#define IMR_BCNDOK5 BIT22 // Beacon Queue DMA OK Interrup 5 ++#define IMR_BCNDOK4 BIT21 // Beacon Queue DMA OK Interrup 4 ++#define IMR_BCNDOK3 BIT20 // Beacon Queue DMA OK Interrup 3 ++#define IMR_BCNDOK2 BIT19 // Beacon Queue DMA OK Interrup 2 ++#define IMR_BCNDOK1 BIT18 // Beacon Queue DMA OK Interrup 1 ++#define IMR_TIMEOUT2 BIT17 // Timeout interrupt 2 ++#define IMR_TIMEOUT1 BIT16 // Timeout interrupt 1 ++#define IMR_TXFOVW BIT15 // Transmit FIFO Overflow ++#define IMR_PSTIMEOUT BIT14 // Power save time out interrupt ++#define IMR_BcnInt BIT13 // Beacon DMA Interrupt 0 ++#define IMR_RXFOVW BIT12 // Receive FIFO Overflow ++#define IMR_RDU BIT11 // Receive Descriptor Unavailable ++#define IMR_ATIMEND BIT10 // For 92C,ATIM Window End Interrupt ++#define IMR_BDOK BIT9 // Beacon Queue DMA OK Interrup ++#define IMR_HIGHDOK BIT8 // High Queue DMA OK Interrupt ++#define IMR_TBDOK BIT7 // Transmit Beacon OK interrup ++#define IMR_MGNTDOK BIT6 // Management Queue DMA OK Interrupt ++#define IMR_TBDER BIT5 // For 92C,Transmit Beacon Error Interrupt ++#define IMR_BKDOK BIT4 // AC_BK DMA OK Interrupt ++#define IMR_BEDOK BIT3 // AC_BE DMA OK Interrupt ++#define IMR_VIDOK BIT2 // AC_VI DMA OK Interrupt ++#define IMR_VODOK BIT1 // AC_VO DMA Interrupt ++#define IMR_ROK BIT0 // Receive DMA OK Interrupt ++ ++// 13. Host Interrupt Status Extension Register (Offset: 0x012C-012Eh) ++#define IMR_TXERR BIT11 ++#define IMR_RXERR BIT10 ++#define IMR_C2HCMD BIT9 ++#define IMR_CPWM BIT8 ++//RSVD [2-7] ++#define IMR_OCPINT BIT1 ++#define IMR_WLANOFF BIT0 ++ ++ ++ ++//---------------------------------------------------------------------------- ++// 8192D EFUSE ++//---------------------------------------------------------------------------- ++#define HWSET_MAX_SIZE 256 ++ ++//---------------------------------------------------------------------------- ++// 8192C EEPROM/EFUSE share register definition. ++//---------------------------------------------------------------------------- ++ ++// ++// Default Value for EEPROM or EFUSE!!! ++// ++#define EEPROM_Default_TSSI 0x0 ++#define EEPROM_Default_TxPowerDiff 0x0 ++#define EEPROM_Default_CrystalCap 0x0 //92D default 0x0 ++#define EEPROM_Default_BoardType 0x02 // Default: 2X2, RTL8192CE(QFPN68) ++#define EEPROM_Default_TxPower 0x1010 ++#define EEPROM_Default_HT2T_TxPwr 0x10 ++ ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 ++#define EEPROM_Default_ThermalMeter 0x12 ++ ++#define EEPROM_Default_AntTxPowerDiff 0x0 ++//#define EEPROM_Default_TxPwDiff_CrystalCap 0x5 ++#define EEPROM_Default_TxPowerLevel_2G 0x2C ++#define EEPROM_Default_TxPowerLevel_5G 0x22 ++ ++#define EEPROM_Default_HT40_2SDiff 0x0 ++#define EEPROM_Default_HT20_Diff 2 // HT20<->40 default Tx Power Index Difference ++#define EEPROM_Default_LegacyHTTxPowerDiff 0x4 //OFDM Tx Power index diff ++#define EEPROM_Default_HT40_PwrMaxOffset 0 ++#define EEPROM_Default_HT20_PwrMaxOffset 0 ++ ++// For debug ++#define EEPROM_Default_PID 0x1234 ++#define EEPROM_Default_VID 0x5678 ++#define EEPROM_Default_CustomerID 0xAB ++#define EEPROM_Default_SubCustomerID 0xCD ++#define EEPROM_Default_Version 0 ++ ++#define EEPROM_Default_externalPA_C9 0x00 ++#define EEPROM_Default_externalPA_CC 0xFF ++#define EEPROM_Default_internalPA_SP3T_C9 0xAA ++#define EEPROM_Default_internalPA_SP3T_CC 0xAF ++#define EEPROM_Default_internalPA_SPDT_C9 0xAA ++#ifdef CONFIG_PCI_HCI ++#define EEPROM_Default_internalPA_SPDT_CC 0xA0 ++#else ++#define EEPROM_Default_internalPA_SPDT_CC 0xFA ++#endif ++ ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_NCC 0xB ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_TOSHIBA 0x4 ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++#define EEPROM_CID_QMI 0x0D ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define RTL8192_EEPROM_ID 0x8129 ++#define EEPROM_WAPI_SUPPORT 0x78 ++ ++ ++#ifdef CONFIG_PCI_HCI ++#define RT_IBSS_INT_MASKS (IMR_BcnInt | IMR_TBDOK | IMR_TBDER) ++#define RT_AC_INT_MASKS (IMR_VIDOK | IMR_VODOK | IMR_BEDOK|IMR_BKDOK) ++#define RT_BSS_INT_MASKS (RT_IBSS_INT_MASKS) ++ ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0x28 // SE Vendor ID.A-B ++#define EEPROM_DID 0x2A // SE Device ID. C-D ++#define EEPROM_SVID 0x2C // SE Vendor ID.E-F ++#define EEPROM_SMID 0x2E // SE PCI Subsystem ID. 10-11 ++ ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++#define EEPROM_MAC_ADDR_MAC0_92D 0x55 ++#define EEPROM_MAC_ADDR_MAC1_92D 0x5B ++//---------------------------------------------------------------- ++// 2.4G band Tx power index setting ++#define EEPROM_CCK_TX_PWR_INX_2G 0x61 ++#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D ++#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 ++#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 ++#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 ++ ++//5GL channel 32-64 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E ++ ++//5GM channel 100-140 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 ++ ++//5GH channel 149-165 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 ++ ++#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. ++#define EEPROM_IQK_DELTA 0xBC ++#define EEPROM_LCK_DELTA 0xBC ++#define EEPROM_XTAL_K 0xBD //[7:5] ++#define EEPROM_TSSI_A_5G 0xBE ++#define EEPROM_TSSI_B_5G 0xBF ++#define EEPROM_TSSI_AB_5G 0xC0 ++#define EEPROM_THERMAL_METER 0xC3 //[4:0] ++#define EEPROM_PATHDIV 0xC4 ++#define EEPROM_RF_OPT1 0xC4 ++#define EEPROM_RF_OPT2 0xC5 ++#define EEPROM_RF_OPT3 0xC6 ++#define EEPROM_RF_OPT4 0xC7 ++#define EEPROM_RF_OPT5 0xC8 ++#define EEPROM_RF_OPT6 0xC9 ++#define EEPROM_VERSION 0xCA ++#define EEPROM_CUSTOMER_ID 0xCB ++#define EEPROM_RF_OPT7 0xCC ++ ++#define EEPROM_WIDIPAIRING_ADDR 0xF0 ++#define EEPROM_WIDIPAIRING_KEY 0xF6 ++ ++#define EEPROM_DEF_PART_NO 0x3FD //Byte ++#define EEPROME_CHIP_VERSION_L 0x3FF ++#define EEPROME_CHIP_VERSION_H 0x3FE ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#define RTL8190_EEPROM_ID 0x8129 // 0-1 ++#define EEPROM_HPON 0x02 // LDO settings.2-5 ++#define EEPROM_CLK 0x06 // Clock settings.6-7 ++#define EEPROM_MAC_FUNCTION 0x08 // SE Test mode.8 ++ ++#define EEPROM_VID 0xC // SE Vendor ID.A-B ++#define EEPROM_PID 0xE // SE Device ID. C-D ++#define EEPROM_ENDPOINT_SETTING 0x10 ++#define EEPROM_Option_Setting 0x11 ++#define EEPROM_CHIRP_K 0x12 // Changed ++#define EEPROM_USB_PHY 0x13 // Changed ++#define EEPROM_NORMAL_BoardType EEPROM_RF_OPT1 //[7:5] ++#define EEPROM_MAC_ADDR 0x16 // SEMAC Address. 12-17 ++#define EEPROM_STRING 0x1F ++#define EEPROM_SUBCUSTOMER_ID 0x59 ++ ++#define EEPROM_MAC_ADDR_MAC0_92D 0x19 ++#define EEPROM_MAC_ADDR_MAC1_92D 0x5B ++//---------------------------------------------------------------- ++// 2.4G band Tx power index setting ++#define EEPROM_CCK_TX_PWR_INX_2G 0x61 ++#define EEPROM_HT40_1S_TX_PWR_INX_2G 0x67 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_2G 0x6D ++#define EEPROM_HT20_TX_PWR_INX_DIFF_2G 0x70 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_2G 0x73 ++#define EEPROM_HT40_MAX_PWR_OFFSET_2G 0x76 ++#define EEPROM_HT20_MAX_PWR_OFFSET_2G 0x79 ++ ++//5GL channel 32-64 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GL 0x7C ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GL 0x82 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GL 0x85 ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GL 0x88 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GL 0x8B ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GL 0x8E ++ ++//5GM channel 100-140 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GM 0x91 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GM 0x97 ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GM 0x9A ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GM 0x9D ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GM 0xA0 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GM 0xA3 ++ ++//5GH channel 149-165 ++#define EEPROM_HT40_1S_TX_PWR_INX_5GH 0xA6 ++#define EEPROM_HT40_2S_TX_PWR_INX_DIFF_5GH 0xAC ++#define EEPROM_HT20_TX_PWR_INX_DIFF_5GH 0xAF ++#define EEPROM_OFDM_TX_PWR_INX_DIFF_5GH 0xB2 ++#define EEPROM_HT40_MAX_PWR_OFFSET_5GH 0xB5 ++#define EEPROM_HT20_MAX_PWR_OFFSET_5GH 0xB8 ++ ++#define EEPROM_CHANNEL_PLAN 0xBB // Map of supported channels. ++#define EEPROM_TEST_CHANNEL_PLAN 0xBB ++#define EEPROM_IQK_DELTA 0xBC ++#define EEPROM_LCK_DELTA 0xBC ++#define EEPROM_XTAL_K 0xBD //[7:5] ++#define EEPROM_TSSI_A_5G 0xBE ++#define EEPROM_TSSI_B_5G 0xBF ++#define EEPROM_TSSI_AB_5G 0xC0 ++#define EEPROM_THERMAL_METER 0xC3 //[4:0] ++#define EEPROM_RF_OPT1 0xC4 ++#define EEPROM_RF_OPT2 0xC5 ++#define EEPROM_RF_OPT3 0xC6 ++#define EEPROM_RF_OPT4 0xC7 ++#define EEPROM_RF_OPT5 0xC8 ++#define EEPROM_RF_OPT6 0xC9 ++#define EEPROM_VERSION 0xCA ++#define EEPROM_CUSTOMER_ID 0xCB ++#define EEPROM_RF_OPT7 0xCC ++ ++#define EEPROM_DEF_PART_NO 0x3FD //Byte ++#define EEPROME_CHIP_VERSION_L 0x3FF ++#define EEPROME_CHIP_VERSION_H 0x3FE ++ ++//------------------------------------------------------------- ++// EEPROM content definitions ++//------------------------------------------------------------- ++#define OS_LINK_SPEED_NORMAL_MASK BIT3 | BIT2 ++#define OS_LINK_SPEED_TEST_MASK BIT3 | BIT4 ++ ++#define BOARD_TYPE_NORMAL_MASK 0xE0 ++#define BOARD_TYPE_TEST_MASK 0xF ++ ++#define BT_COEXISTENCE_TEST BIT4 ++#define BT_COEXISTENCE_NORMAL BIT5 ++ ++#define BT_CO_SHIFT_TEST 4 ++#define BT_CO_SHIFT_NORMAL 5 ++ ++#define EP_NUMBER_MASK_TEST 0x30 //bit 4:5 0Eh ++#define EP_NUMBER_SHIFT_TEST 4 ++ ++#define USB_PHY_PARA_SIZE_TEST 6 ++#define USB_PHY_PARA_SIZE_NORMAL 4 ++ ++//------------------------------------------------------------- ++// EEPROM default value definitions ++//------------------------------------------------------------- ++// Use 0xABCD instead of 0x8192 for debug ++#define EEPROM_DEF_ID_0 0xCD // Byte 0x00 ++#define EEPROM_DEF_ID_1 0xAB // Byte 0x01 ++ ++#define EEPROM_DEF_RTK_RSV_A3 0x74 // Byte 0x03 ++#define EEPROM_DEF_RTK_RSV_A4 0x6D // Byte 0x04 ++#define EEPROM_DEF_RTK_RSV_A8 0xFF // Byte 0x08 ++ ++#define EEPROM_DEF_VID_0 0x0A // Byte 0x0A ++#define EEPROM_DEF_VID_1 0x0B ++ ++#define EEPROM_DEF_PID_0 0x92 // Byte 0x0C ++#define EEPROM_DEF_PID_1 0x81 ++ ++ ++#define EEPROM_TEST_DEF_USB_OPT 0x80 // Byte 0x0E ++#define EEPROM_NORMAL_DEF_USB_OPT 0x00 // Byte 0x0E ++ ++#define EEPROM_DEF_CHIRPK 0x15 // Byte 0x0F ++ ++#define EEPROM_DEF_USB_PHY_0 0x85 // Byte 0x10 ++#define EEPROM_DEF_USB_PHY_1 0x62 // Byte 0x11 ++#define EEPROM_DEF_USB_PHY_2 0x9E // Byte 0x12 ++#define EEPROM_DEF_USB_PHY_3 0x06 // Byte 0x13 ++ ++#define EEPROM_DEF_TSSI_A 0x09 // Byte 0x78 ++#define EEPROM_DEF_TSSI_B 0x09 // Byte 0x79 ++ ++ ++#define EEPROM_DEF_THERMAL_METER 0x12 // Byte 0x7A ++ ++ ++#define EEPROM_USB_SN BIT(0) ++#define EEPROM_USB_REMOTE_WAKEUP BIT(1) ++#define EEPROM_USB_DEVICE_PWR BIT(2) ++#define EEPROM_EP_NUMBER (BIT(3)|BIT(4)) ++ ++#if 0 ++#define EEPROM_CHANNEL_PLAN_FCC 0x0 ++#define EEPROM_CHANNEL_PLAN_IC 0x1 ++#define EEPROM_CHANNEL_PLAN_ETSI 0x2 ++#define EEPROM_CHANNEL_PLAN_SPAIN 0x3 ++#define EEPROM_CHANNEL_PLAN_FRANCE 0x4 ++#define EEPROM_CHANNEL_PLAN_MKK 0x5 ++#define EEPROM_CHANNEL_PLAN_MKK1 0x6 ++#define EEPROM_CHANNEL_PLAN_ISRAEL 0x7 ++#define EEPROM_CHANNEL_PLAN_TELEC 0x8 ++#define EEPROM_CHANNEL_PLAN_GLOBAL_DOMAIN 0x9 ++#define EEPROM_CHANNEL_PLAN_WORLD_WIDE_13 0xA ++#define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80 ++ ++#define EEPROM_CID_DEFAULT 0x0 ++ ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++ ++#define EEPROM_CID_CCX 0x10 // CCX test. By Bruce, 2009-02-25. ++ ++#endif ++#endif ++ ++ ++/*=================================================================== ++===================================================================== ++Here the register defines are for 92C. When the define is as same with 92C, ++we will use the 92C's define for the consistency ++So the following defines for 92C is not entire!!!!!! ++===================================================================== ++=====================================================================*/ ++/* ++Based on Datasheet V33---090401 ++Register Summary ++Current IOREG MAP ++0x0000h ~ 0x00FFh System Configuration (256 Bytes) ++0x0100h ~ 0x01FFh MACTOP General Configuration (256 Bytes) ++0x0200h ~ 0x027Fh TXDMA Configuration (128 Bytes) ++0x0280h ~ 0x02FFh RXDMA Configuration (128 Bytes) ++0x0300h ~ 0x03FFh PCIE EMAC Reserved Region (256 Bytes) ++0x0400h ~ 0x04FFh Protocol Configuration (256 Bytes) ++0x0500h ~ 0x05FFh EDCA Configuration (256 Bytes) ++0x0600h ~ 0x07FFh WMAC Configuration (512 Bytes) ++0x2000h ~ 0x3FFFh 8051 FW Download Region (8196 Bytes) ++*/ ++ ++//---------------------------------------------------------------------------- ++// 8192C (RCR) Receive Configuration Register (Offset 0x608, 32 bits) ++//---------------------------------------------------------------------------- ++#define RCR_APPFCS BIT31 //WMAC append FCS after pauload ++#define RCR_APP_MIC BIT30 // ++#define RCR_APP_ICV BIT29 // ++#define RCR_APP_PHYST_RXFF BIT28 // ++#define RCR_APP_BA_SSN BIT27 //Accept BA SSN ++#define RCR_ENMBID BIT24 //Enable Multiple BssId. ++#define RCR_LSIGEN BIT23 ++#define RCR_MFBEN BIT22 ++#define RCR_HTC_LOC_CTRL BIT14 //MFC<--HTC=1 MFC-->HTC=0 ++#define RCR_AMF BIT13 //Accept management type frame ++#define RCR_ACF BIT12 //Accept control type frame ++#define RCR_ADF BIT11 //Accept data type frame ++#define RCR_AICV BIT9 //Accept ICV error packet ++#define RCR_ACRC32 BIT8 //Accept CRC32 error packet ++#define RCR_CBSSID_BCN BIT7 //Accept BSSID match packet (Rx beacon, probe rsp) ++#define RCR_CBSSID_DATA BIT6 //Accept BSSID match packet (Data) ++#define RCR_CBSSID RCR_CBSSID_DATA //Accept BSSID match packet ++#define RCR_APWRMGT BIT5 //Accept power management packet ++#define RCR_ADD3 BIT4 //Accept address 3 match packet ++#define RCR_AB BIT3 //Accept broadcast packet ++#define RCR_AM BIT2 //Accept multicast packet ++#define RCR_APM BIT1 //Accept physical match packet ++#define RCR_AAP BIT0 //Accept all unicast packet ++#define RCR_MXDMA_OFFSET 8 ++#define RCR_FIFO_OFFSET 13 ++ ++ ++ ++//============================================================================ ++// 8192c USB specific Regsiter Offset and Content definition, ++// 2009.08.18, added by vivi. for merge 92c and 92C into one driver ++//============================================================================ ++//#define APS_FSMCO 0x0004 same with 92Ce ++#define RSV_CTRL 0x001C ++#define RD_CTRL 0x0524 ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++#define REG_USB_INFO 0xFE17 ++#define REG_USB_SPECIAL_OPTION 0xFE55 ++#define REG_USB_DMA_AGG_TO 0xFE5B ++#define REG_USB_AGG_TO 0xFE5C ++#define REG_USB_AGG_TH 0xFE5D ++ ++#define REG_USB_VID 0xFE60 ++#define REG_USB_PID 0xFE62 ++#define REG_USB_OPTIONAL 0xFE64 ++#define REG_USB_CHIRP_K 0xFE65 ++#define REG_USB_PHY 0xFE66 ++#define REG_USB_MAC_ADDR 0xFE70 ++ ++#define REG_USB_HRPWM 0xFE58 ++#define REG_USB_HCPWM 0xFE57 ++ ++#define InvalidBBRFValue 0x12345678 ++ ++//============================================================================ ++// 8192C Regsiter Bit and Content definition ++//============================================================================ ++//----------------------------------------------------- ++// ++// 0x0000h ~ 0x00FFh System Configuration ++// ++//----------------------------------------------------- ++ ++//2 SPS0_CTRL ++#define SW18_FPWM BIT(3) ++ ++ ++//2 SYS_ISO_CTRL ++#define ISO_MD2PP BIT(0) ++#define ISO_UA2USB BIT(1) ++#define ISO_UD2CORE BIT(2) ++#define ISO_PA2PCIE BIT(3) ++#define ISO_PD2CORE BIT(4) ++#define ISO_IP2MAC BIT(5) ++#define ISO_DIOP BIT(6) ++#define ISO_DIOE BIT(7) ++#define ISO_EB2CORE BIT(8) ++#define ISO_DIOR BIT(9) ++ ++#define PWC_EV25V BIT(14) ++#define PWC_EV12V BIT(15) ++ ++ ++//2 SYS_FUNC_EN ++#define FEN_BBRSTB BIT(0) ++#define FEN_BB_GLB_RSTn BIT(1) ++#define FEN_USBA BIT(2) ++#define FEN_UPLL BIT(3) ++#define FEN_USBD BIT(4) ++#define FEN_DIO_PCIE BIT(5) ++#define FEN_PCIEA BIT(6) ++#define FEN_PPLL BIT(7) ++#define FEN_PCIED BIT(8) ++#define FEN_DIOE BIT(9) ++#define FEN_CPUEN BIT(10) ++#define FEN_DCORE BIT(11) ++#define FEN_ELDR BIT(12) ++#define FEN_DIO_RF BIT(13) ++#define FEN_HWPDN BIT(14) ++#define FEN_MREGEN BIT(15) ++ ++//2 APS_FSMCO ++#define PFM_LDALL BIT(0) ++#define PFM_ALDN BIT(1) ++#define PFM_LDKP BIT(2) ++#define PFM_WOWL BIT(3) ++#define EnPDN BIT(4) ++#define PDN_PL BIT(5) ++#define APFM_ONMAC BIT(8) ++#define APFM_OFF BIT(9) ++#define APFM_RSM BIT(10) ++#define AFSM_HSUS BIT(11) ++#define AFSM_PCIE BIT(12) ++#define APDM_MAC BIT(13) ++#define APDM_HOST BIT(14) ++#define APDM_HPDN BIT(15) ++#define RDY_MACON BIT(16) ++#define SUS_HOST BIT(17) ++#define ROP_ALD BIT(20) ++#define ROP_PWR BIT(21) ++#define ROP_SPS BIT(22) ++#define SOP_MRST BIT(25) ++#define SOP_FUSE BIT(26) ++#define SOP_ABG BIT(27) ++#define SOP_AMB BIT(28) ++#define SOP_RCK BIT(29) ++#define SOP_A8M BIT(30) ++#define XOP_BTCK BIT(31) ++ ++//2 SYS_CLKR ++#define ANAD16V_EN BIT(0) ++#define ANA8M BIT(1) ++#define MACSLP BIT(4) ++#define LOADER_CLK_EN BIT(5) ++#define _80M_SSC_DIS BIT(7) ++#define _80M_SSC_EN_HO BIT(8) ++#define PHY_SSC_RSTB BIT(9) ++#define SEC_CLK_EN BIT(10) ++#define MAC_CLK_EN BIT(11) ++#define SYS_CLK_EN BIT(12) ++#define RING_CLK_EN BIT(13) ++ ++ ++//2 9346CR ++ ++#define BOOT_FROM_EEPROM BIT(4) ++#define EEPROM_EN BIT(5) ++ ++ ++//2 AFE_MISC ++#define AFE_BGEN BIT(0) ++#define AFE_MBEN BIT(1) ++#define MAC_ID_EN BIT(7) ++ ++ ++//2 SPS0_CTRL ++ ++ ++//2 SPS_OCP_CFG ++ ++ ++//2 RSV_CTRL ++#define WLOCK_ALL BIT(0) ++#define WLOCK_00 BIT(1) ++#define WLOCK_04 BIT(2) ++#define WLOCK_08 BIT(3) ++#define WLOCK_40 BIT(4) ++#define R_DIS_PRST_0 BIT(5) ++#define R_DIS_PRST_1 BIT(6) ++#define LOCK_ALL_EN BIT(7) ++ ++//2 RF_CTRL ++#define RF_EN BIT(0) ++#define RF_RSTB BIT(1) ++#define RF_SDMRSTB BIT(2) ++ ++ ++ ++//2 LDOA15_CTRL ++#define LDA15_EN BIT(0) ++#define LDA15_STBY BIT(1) ++#define LDA15_OBUF BIT(2) ++#define LDA15_REG_VOS BIT(3) ++#define _LDA15_VOADJ(x) (((x) & 0x7) << 4) ++ ++ ++ ++//2 LDOV12D_CTRL ++#define LDV12_EN BIT(0) ++#define LDV12_SDBY BIT(1) ++#define LPLDO_HSM BIT(2) ++#define LPLDO_LSM_DIS BIT(3) ++#define _LDV12_VADJ(x) (((x) & 0xF) << 4) ++ ++ ++//2 AFE_XTAL_CTRL ++#define XTAL_EN BIT(0) ++#define XTAL_BSEL BIT(1) ++#define _XTAL_BOSC(x) (((x) & 0x3) << 2) ++#define _XTAL_CADJ(x) (((x) & 0xF) << 4) ++#define XTAL_GATE_USB BIT(8) ++#define _XTAL_USB_DRV(x) (((x) & 0x3) << 9) ++#define XTAL_GATE_AFE BIT(11) ++#define _XTAL_AFE_DRV(x) (((x) & 0x3) << 12) ++#define XTAL_RF_GATE BIT(14) ++#define _XTAL_RF_DRV(x) (((x) & 0x3) << 15) ++#define XTAL_GATE_DIG BIT(17) ++#define _XTAL_DIG_DRV(x) (((x) & 0x3) << 18) ++#define XTAL_BT_GATE BIT(20) ++#define _XTAL_BT_DRV(x) (((x) & 0x3) << 21) ++#define _XTAL_GPIO(x) (((x) & 0x7) << 23) ++ ++ ++#define CKDLY_AFE BIT(26) ++#define CKDLY_USB BIT(27) ++#define CKDLY_DIG BIT(28) ++#define CKDLY_BT BIT(29) ++ ++ ++//2 AFE_PLL_CTRL ++#define APLL_EN BIT(0) ++#define APLL_320_EN BIT(1) ++#define APLL_FREF_SEL BIT(2) ++#define APLL_EDGE_SEL BIT(3) ++#define APLL_WDOGB BIT(4) ++#define APLL_LPFEN BIT(5) ++ ++#define APLL_REF_CLK_13MHZ 0x1 ++#define APLL_REF_CLK_19_2MHZ 0x2 ++#define APLL_REF_CLK_20MHZ 0x3 ++#define APLL_REF_CLK_25MHZ 0x4 ++#define APLL_REF_CLK_26MHZ 0x5 ++#define APLL_REF_CLK_38_4MHZ 0x6 ++#define APLL_REF_CLK_40MHZ 0x7 ++ ++#define APLL_320EN BIT(14) ++#define APLL_80EN BIT(15) ++#define APLL_1MEN BIT(24) ++ ++ ++//2 EFUSE_CTRL ++#define ALD_EN BIT(18) ++#define EF_PD BIT(19) ++#define EF_FLAG BIT(31) ++ ++//2 EFUSE_TEST ++#define EF_TRPT BIT(7) ++#define LDOE25_EN BIT(31) ++ ++//2 PWR_DATA ++ ++//2 CAL_TIMER ++ ++//2 ACLK_MON ++#define RSM_EN BIT(0) ++#define Timer_EN BIT(4) ++ ++ ++//2 GPIO_MUXCFG ++#define TRSW0EN BIT(2) ++#define TRSW1EN BIT(3) ++#define EROM_EN BIT(4) ++#define EnBT BIT(5) ++#define EnUart BIT(8) ++#define Uart_910 BIT(9) ++#define EnPMAC BIT(10) ++#define SIC_SWRST BIT(11) ++#define EnSIC BIT(12) ++#define SIC_23 BIT(13) ++#define EnHDP BIT(14) ++#define SIC_LBK BIT(15) ++ ++//2 GPIO_PIN_CTRL ++ ++ ++ ++//2 GPIO_INTM ++ ++//2 LEDCFG ++#define LED0PL BIT(4) ++#define LED1PL BIT(12) ++#define LED0DIS BIT(7) ++ ++#define SECCAM_CLR BIT(30) ++ ++//2 FSIMR ++ ++//2 FSISR ++ ++ ++//2 8051FWDL ++//2 MCUFWDL ++#define MCUFWDL_EN BIT(0) ++#define MCUFWDL_RDY BIT(1) ++#define FWDL_ChkSum_rpt BIT(2) ++#define MACINI_RDY BIT(3) ++#define BBINI_RDY BIT(4) ++#define RFINI_RDY BIT(5) ++#define WINTINI_RDY BIT(6) ++#define MAC1_WINTINI_RDY BIT(11)// 0X81 BIT3 ++#define CPRST BIT(23) ++ ++ ++ ++ ++//2 REG_SYS_CFG ++#define XCLK_VLD BIT(0) ++#define ACLK_VLD BIT(1) ++#define UCLK_VLD BIT(2) ++#define PCLK_VLD BIT(3) ++#define PCIRSTB BIT(4) ++#define V15_VLD BIT(5) ++#define TRP_B15V_EN BIT(7) ++#define SIC_IDLE BIT(8) ++#define BD_MAC2 BIT(9) ++#define BD_MAC1 BIT(10) ++#define IC_MACPHY_MODE BIT(11) ++#define PAD_HWPD_IDN BIT(22) ++#define TRP_VAUX_EN BIT(23) ++#define TRP_BT_EN BIT(24) ++#define BD_PKG_SEL BIT(25) ++#define BD_HCI_SEL BIT(26) ++#define TYPE_ID BIT(27) ++ ++#define CHIP_VER_RTL_MASK 0xF000 //Bit 12 ~ 15 ++#define CHIP_VER_RTL_SHIFT 12 ++ ++//----------------------------------------------------- ++// ++// 0x0100h ~ 0x01FFh MACTOP General Configuration ++// ++//----------------------------------------------------- ++ ++ ++//2 Function Enable Registers ++//2 CR ++ ++#define REG_LBMODE (REG_CR + 3) ++ ++ ++#define HCI_TXDMA_EN BIT(0) ++#define HCI_RXDMA_EN BIT(1) ++#define TXDMA_EN BIT(2) ++#define RXDMA_EN BIT(3) ++#define PROTOCOL_EN BIT(4) ++#define SCHEDULE_EN BIT(5) ++#define MACTXEN BIT(6) ++#define MACRXEN BIT(7) ++#define ENSWBCN BIT(8) ++#define ENSEC BIT(9) ++ ++// Network type ++#define _NETTYPE(x) (((x) & 0x3) << 16) ++#define MASK_NETTYPE 0x30000 ++#define NT_NO_LINK 0x0 ++#define NT_LINK_AD_HOC 0x1 ++#define NT_LINK_AP 0x2 ++#define NT_AS_AP 0x3 ++ ++#define _LBMODE(x) (((x) & 0xF) << 24) ++#define MASK_LBMODE 0xF000000 ++#define LOOPBACK_NORMAL 0x0 ++#define LOOPBACK_IMMEDIATELY 0xB ++#define LOOPBACK_MAC_DELAY 0x3 ++#define LOOPBACK_PHY 0x1 ++#define LOOPBACK_DMA 0x7 ++ ++ ++//2 PBP - Page Size Register ++#define GET_RX_PAGE_SIZE(value) ((value) & 0xF) ++#define GET_TX_PAGE_SIZE(value) (((value) & 0xF0) >> 4) ++#define _PSRX_MASK 0xF ++#define _PSTX_MASK 0xF0 ++#define _PSRX(x) (x) ++#define _PSTX(x) ((x) << 4) ++ ++#define PBP_64 0x0 ++#define PBP_128 0x1 ++#define PBP_256 0x2 ++#define PBP_512 0x3 ++#define PBP_1024 0x4 ++ ++ ++//2 TX/RXDMA ++#define RXDMA_ARBBW_EN BIT(0) ++#define RXSHFT_EN BIT(1) ++#define RXDMA_AGG_EN BIT(2) ++#define QS_VO_QUEUE BIT(8) ++#define QS_VI_QUEUE BIT(9) ++#define QS_BE_QUEUE BIT(10) ++#define QS_BK_QUEUE BIT(11) ++#define QS_MANAGER_QUEUE BIT(12) ++#define QS_HIGH_QUEUE BIT(13) ++ ++#define HQSEL_VOQ BIT(0) ++#define HQSEL_VIQ BIT(1) ++#define HQSEL_BEQ BIT(2) ++#define HQSEL_BKQ BIT(3) ++#define HQSEL_MGTQ BIT(4) ++#define HQSEL_HIQ BIT(5) ++ ++// For normal driver, 0x10C ++#define _TXDMA_HIQ_MAP(x) (((x)&0x3) << 14) ++#define _TXDMA_MGQ_MAP(x) (((x)&0x3) << 12) ++#define _TXDMA_BKQ_MAP(x) (((x)&0x3) << 10) ++#define _TXDMA_BEQ_MAP(x) (((x)&0x3) << 8 ) ++#define _TXDMA_VIQ_MAP(x) (((x)&0x3) << 6 ) ++#define _TXDMA_VOQ_MAP(x) (((x)&0x3) << 4 ) ++ ++#define QUEUE_LOW 1 ++#define QUEUE_NORMAL 2 ++#define QUEUE_HIGH 3 ++ ++ ++ ++//2 TRXFF_BNDY ++ ++ ++//2 LLT_INIT ++#define _LLT_NO_ACTIVE 0x0 ++#define _LLT_WRITE_ACCESS 0x1 ++#define _LLT_READ_ACCESS 0x2 ++ ++#define _LLT_INIT_DATA(x) ((x) & 0xFF) ++#define _LLT_INIT_ADDR(x) (((x) & 0xFF) << 8) ++#define _LLT_OP(x) (((x) & 0x3) << 30) ++#define _LLT_OP_VALUE(x) (((x) >> 30) & 0x3) ++ ++ ++//2 BB_ACCESS_CTRL ++#define BB_WRITE_READ_MASK (BIT(31) | BIT(30)) ++#define BB_WRITE_EN BIT(30) ++#define BB_READ_EN BIT(31) ++//#define BB_ADDR_MASK 0xFFF ++//#define _BB_ADDR(x) ((x) & BB_ADDR_MASK) ++ ++//----------------------------------------------------- ++// ++// 0x0200h ~ 0x027Fh TXDMA Configuration ++// ++//----------------------------------------------------- ++//2 RQPN ++#define _HPQ(x) ((x) & 0xFF) ++#define _LPQ(x) (((x) & 0xFF) << 8) ++#define _PUBQ(x) (((x) & 0xFF) << 16) ++#define _NPQ(x) ((x) & 0xFF) // NOTE: in RQPN_NPQ register ++ ++ ++#define HPQ_PUBLIC_DIS BIT(24) ++#define LPQ_PUBLIC_DIS BIT(25) ++#define LD_RQPN BIT(31) ++ ++ ++//2 TDECTRL ++#define BCN_VALID BIT(16) ++#define BCN_HEAD(x) (((x) & 0xFF) << 8) ++#define BCN_HEAD_MASK 0xFF00 ++ ++//2 TDECTL ++#define BLK_DESC_NUM_SHIFT 4 ++#define BLK_DESC_NUM_MASK 0xF ++ ++ ++//2 TXDMA_OFFSET_CHK ++#define DROP_DATA_EN BIT(9) ++ ++//----------------------------------------------------- ++// ++// 0x0400h ~ 0x047Fh Protocol Configuration ++// ++//----------------------------------------------------- ++//2 FWHW_TXQ_CTRL ++#define EN_AMPDU_RTY_NEW BIT(7) ++ ++//2 INIRTSMCS_SEL ++#define _INIRTSMCS_SEL(x) ((x) & 0x3F) ++ ++ ++//2 SPEC SIFS ++#define _SPEC_SIFS_CCK(x) ((x) & 0xFF) ++#define _SPEC_SIFS_OFDM(x) (((x) & 0xFF) << 8) ++ ++ ++//2 RRSR ++ ++#define RATE_REG_BITMAP_ALL 0xFFFFF ++ ++#define _RRSC_BITMAP(x) ((x) & 0xFFFFF) ++ ++#define _RRSR_RSC(x) (((x) & 0x3) << 21) ++#define RRSR_RSC_RESERVED 0x0 ++#define RRSR_RSC_UPPER_SUBCHANNEL 0x1 ++#define RRSR_RSC_LOWER_SUBCHANNEL 0x2 ++#define RRSR_RSC_DUPLICATE_MODE 0x3 ++ ++ ++//2 ARFR ++#define USE_SHORT_G1 BIT(20) ++ ++//2 AGGLEN_LMT_L ++#define _AGGLMT_MCS0(x) ((x) & 0xF) ++#define _AGGLMT_MCS1(x) (((x) & 0xF) << 4) ++#define _AGGLMT_MCS2(x) (((x) & 0xF) << 8) ++#define _AGGLMT_MCS3(x) (((x) & 0xF) << 12) ++#define _AGGLMT_MCS4(x) (((x) & 0xF) << 16) ++#define _AGGLMT_MCS5(x) (((x) & 0xF) << 20) ++#define _AGGLMT_MCS6(x) (((x) & 0xF) << 24) ++#define _AGGLMT_MCS7(x) (((x) & 0xF) << 28) ++ ++ ++//2 RL ++#define RETRY_LIMIT_SHORT_SHIFT 8 ++#define RETRY_LIMIT_LONG_SHIFT 0 ++ ++ ++//2 DARFRC ++#define _DARF_RC1(x) ((x) & 0x1F) ++#define _DARF_RC2(x) (((x) & 0x1F) << 8) ++#define _DARF_RC3(x) (((x) & 0x1F) << 16) ++#define _DARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (DARFRC + 4) ++#define _DARF_RC5(x) ((x) & 0x1F) ++#define _DARF_RC6(x) (((x) & 0x1F) << 8) ++#define _DARF_RC7(x) (((x) & 0x1F) << 16) ++#define _DARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++//2 RARFRC ++#define _RARF_RC1(x) ((x) & 0x1F) ++#define _RARF_RC2(x) (((x) & 0x1F) << 8) ++#define _RARF_RC3(x) (((x) & 0x1F) << 16) ++#define _RARF_RC4(x) (((x) & 0x1F) << 24) ++// NOTE: shift starting from address (RARFRC + 4) ++#define _RARF_RC5(x) ((x) & 0x1F) ++#define _RARF_RC6(x) (((x) & 0x1F) << 8) ++#define _RARF_RC7(x) (((x) & 0x1F) << 16) ++#define _RARF_RC8(x) (((x) & 0x1F) << 24) ++ ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0500h ~ 0x05FFh EDCA Configuration ++// ++//----------------------------------------------------- ++ ++ ++ ++//2 EDCA setting ++#define AC_PARAM_TXOP_LIMIT_OFFSET 16 ++#define AC_PARAM_ECW_MAX_OFFSET 12 ++#define AC_PARAM_ECW_MIN_OFFSET 8 ++#define AC_PARAM_AIFS_OFFSET 0 ++ ++ ++//2 EDCA_VO_PARAM ++#define _AIFS(x) (x) ++#define _ECW_MAX_MIN(x) ((x) << 8) ++#define _TXOP_LIMIT(x) ((x) << 16) ++ ++ ++#define _BCNIFS(x) ((x) & 0xFF) ++#define _BCNECW(x) (((x) & 0xF))<< 8) ++ ++ ++#define _LRL(x) ((x) & 0x3F) ++#define _SRL(x) (((x) & 0x3F) << 8) ++ ++ ++//2 SIFS_CCK ++#define _SIFS_CCK_CTX(x) ((x) & 0xFF) ++#define _SIFS_CCK_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 SIFS_OFDM ++#define _SIFS_OFDM_CTX(x) ((x) & 0xFF) ++#define _SIFS_OFDM_TRX(x) (((x) & 0xFF) << 8); ++ ++ ++//2 TBTT PROHIBIT ++#define _TBTT_PROHIBIT_HOLD(x) (((x) & 0xFF) << 8) ++ ++ ++//2 REG_RD_CTRL ++#define DIS_EDCA_CNT_DWN BIT(11) ++ ++ ++//2 BCN_CTRL ++#define EN_MBSSID BIT(1) ++#define EN_TXBCN_RPT BIT(2) ++#define EN_BCN_FUNCTION BIT(3) ++ ++// The same function but different bit field. ++#define DIS_TSF_UDT0_NORMAL_CHIP BIT(4) ++#define DIS_TSF_UDT0_TEST_CHIP BIT(5) ++ ++//2 ACMHWCTRL ++#define AcmHw_HwEn BIT(0) ++#define AcmHw_BeqEn BIT(1) ++#define AcmHw_ViqEn BIT(2) ++#define AcmHw_VoqEn BIT(3) ++#define AcmHw_BeqStatus BIT(4) ++#define AcmHw_ViqStatus BIT(5) ++#define AcmHw_VoqStatus BIT(6) ++ ++ ++ ++//----------------------------------------------------- ++// ++// 0x0600h ~ 0x07FFh WMAC Configuration ++// ++//----------------------------------------------------- ++ ++//2 APSD_CTRL ++#define APSDOFF BIT(6) ++#define APSDOFF_STATUS BIT(7) ++ ++ ++//2 BWOPMODE ++#define BW_20MHZ BIT(2) ++//#define BW_OPMODE_20MHZ BIT(2) // For compability ++ ++ ++#define RATE_BITMAP_ALL 0xFFFFF ++ ++// Only use CCK 1M rate for ACK ++#define RATE_RRSR_CCK_ONLY_1M 0xFFFF1 ++#define RATE_RRSR_WITHOUT_CCK 0xFFFF0 ++ ++//2 TCR ++#define TSFRST BIT(0) ++#define DIS_GCLK BIT(1) ++#define PAD_SEL BIT(2) ++#define PWR_ST BIT(6) ++#define PWRBIT_OW_EN BIT(7) ++#define ACRC BIT(8) ++#define CFENDFORM BIT(9) ++#define ICV BIT(10) ++ ++ ++ ++//2 RCR ++#define AAP BIT(0) ++#define APM BIT(1) ++#define AM BIT(2) ++#define AB BIT(3) ++#define ADD3 BIT(4) ++#define APWRMGT BIT(5) ++#define CBSSID BIT(6) ++#define CBSSID_BCN BIT(7) ++#define ACRC32 BIT(8) ++#define AICV BIT(9) ++#define ADF BIT(11) ++#define ACF BIT(12) ++#define AMF BIT(13) ++#define HTC_LOC_CTRL BIT(14) ++#define UC_DATA_EN BIT(16) ++#define BM_DATA_EN BIT(17) ++#define MFBEN BIT(22) ++#define LSIGEN BIT(23) ++#define EnMBID BIT(24) ++#define APP_BASSN BIT(27) ++#define APP_PHYSTS BIT(28) ++#define APP_ICV BIT(29) ++#define APP_MIC BIT(30) ++#define APP_FCS BIT(31) ++ ++//2 RX_PKT_LIMIT ++ ++//2 RX_DLK_TIME ++ ++//2 MBIDCAMCFG ++ ++ ++ ++//2 AMPDU_MIN_SPACE ++#define _MIN_SPACE(x) ((x) & 0x7) ++#define _SHORT_GI_PADDING(x) (((x) & 0x1F) << 3) ++ ++ ++//2 RXERR_RPT ++#define RXERR_TYPE_OFDM_PPDU 0 ++#define RXERR_TYPE_OFDM_FALSE_ALARM 1 ++#define RXERR_TYPE_OFDM_MPDU_OK 2 ++#define RXERR_TYPE_OFDM_MPDU_FAIL 3 ++#define RXERR_TYPE_CCK_PPDU 4 ++#define RXERR_TYPE_CCK_FALSE_ALARM 5 ++#define RXERR_TYPE_CCK_MPDU_OK 6 ++#define RXERR_TYPE_CCK_MPDU_FAIL 7 ++#define RXERR_TYPE_HT_PPDU 8 ++#define RXERR_TYPE_HT_FALSE_ALARM 9 ++#define RXERR_TYPE_HT_MPDU_TOTAL 10 ++#define RXERR_TYPE_HT_MPDU_OK 11 ++#define RXERR_TYPE_HT_MPDU_FAIL 12 ++#define RXERR_TYPE_RX_FULL_DROP 15 ++ ++#define RXERR_COUNTER_MASK 0xFFFFF ++#define RXERR_RPT_RST BIT(27) ++#define _RXERR_RPT_SEL(type) ((type) << 28) ++ ++ ++//2 SECCFG ++#define SCR_TxUseDK BIT(0) //Force Tx Use Default Key ++#define SCR_RxUseDK BIT(1) //Force Rx Use Default Key ++#define SCR_TxEncEnable BIT(2) //Enable Tx Encryption ++#define SCR_RxDecEnable BIT(3) //Enable Rx Decryption ++#define SCR_SKByA2 BIT(4) //Search kEY BY A2 ++#define SCR_NoSKMC BIT(5) //No Key Search Multicast ++#define SCR_TXBCUSEDK BIT(6) // Force Tx Broadcast packets Use Default Key ++#define SCR_RXBCUSEDK BIT(7) // Force Rx Broadcast packets Use Default Key ++ ++//vivi added for new cam search flow, 20091028 ++#ifdef HW_EN_DE_CRYPTION_FOR_NEW_CAM_SEARCH_FLOW ++#define SCR_TxUseBroadcastDK BIT6 //Force Tx Use Broadcast Default Key ++#define SCR_RxUseBroadcastDK BIT7 //Force Rx Use Broadcast Default Key ++#endif ++ ++ ++//----------------------------------------------------- ++// ++// 0xFE00h ~ 0xFE55h USB Configuration ++// ++//----------------------------------------------------- ++ ++//2 USB Information (0xFE17) ++#define USB_IS_HIGH_SPEED 0 ++#define USB_IS_FULL_SPEED 1 ++#define USB_SPEED_MASK BIT(5) ++ ++#define USB_NORMAL_SIE_EP_MASK 0xF ++#define USB_NORMAL_SIE_EP_SHIFT 4 ++ ++#define USB_TEST_EP_MASK 0x30 ++#define USB_TEST_EP_SHIFT 4 ++ ++//2 Special Option ++#define USB_AGG_EN BIT(3) ++ ++ ++//2REG_C2HEVT_CLEAR ++#define C2H_EVT_HOST_CLOSE 0x00 // Set by driver and notify FW that the driver has read the C2H command message ++#define C2H_EVT_FW_CLOSE 0xFF // Set by FW indicating that FW had set the C2H command message and it's not yet read by driver. ++ ++//2 8192D PartNo. ++#define PARTNO_92D_NIC (BIT7|BIT6) ++#define PARTNO_92D_NIC_REMARK (BIT5|BIT4) ++#define PARTNO_SINGLE_BAND_VS BIT3 ++#define PARTNO_SINGLE_BAND_VS_REMARK BIT1 ++#define PARTNO_CONCURRENT_BAND_VC (BIT3|BIT2) ++#define PARTNO_CONCURRENT_BAND_VC_REMARK (BIT1|BIT0) ++//======================================================== ++// General definitions ++//======================================================== ++ ++#define MAC_ADDR_LEN 6 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER 255 ++#define LAST_ENTRY_OF_TX_PKT_BUFFER_DUAL_MAC 127 ++ ++#define POLLING_LLT_THRESHOLD 20 ++#define POLLING_READY_TIMEOUT_COUNT 1000 ++ ++// Min Spacing related settings. ++#define MAX_MSS_DENSITY_2T 0x13 ++#define MAX_MSS_DENSITY_1T 0x0A ++// GPIO BIT ++#define HAL_8192C_HW_GPIO_WPS_BIT BIT2 ++ ++ ++#include "basic_types.h" ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtl8192d_xmit.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,106 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL8192D_XMIT_H_ ++#define _RTL8192D_XMIT_H_ ++ ++#define VO_QUEUE_INX 0 ++#define VI_QUEUE_INX 1 ++#define BE_QUEUE_INX 2 ++#define BK_QUEUE_INX 3 ++#define BCN_QUEUE_INX 4 ++#define MGT_QUEUE_INX 5 ++#define HIGH_QUEUE_INX 6 ++#define TXCMD_QUEUE_INX 7 ++ ++#define HW_QUEUE_ENTRY 8 ++ ++// ++// Queue Select Value in TxDesc ++// ++#define QSLT_BK 0x2//0x01 ++#define QSLT_BE 0x0 ++#define QSLT_VI 0x5//0x4 ++#define QSLT_VO 0x7//0x6 ++#define QSLT_BEACON 0x10 ++#define QSLT_HIGH 0x11 ++#define QSLT_MGNT 0x12 ++#define QSLT_CMD 0x13 ++ ++//Because we open EM for normal case, we just always insert 2*8 bytes.by wl ++#define USB_92D_DUMMY_OFFSET 2 ++#define USB_92D_DUMMY_LENGTH (USB_92D_DUMMY_OFFSET * PACKET_OFFSET_SZ) ++#define USB_HWDESC_HEADER_LEN (TXDESC_SIZE + USB_92D_DUMMY_LENGTH) ++ ++//For 92D early mode ++#define SET_EARLYMODE_PKTNUM(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 0, 3, __Value) ++#define SET_EARLYMODE_LEN0(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 4, 12, __Value) ++#define SET_EARLYMODE_LEN1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 16, 12, __Value) ++#define SET_EARLYMODE_LEN2_1(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr, 28, 4, __Value) ++#define SET_EARLYMODE_LEN2_2(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 0, 8, __Value) ++#define SET_EARLYMODE_LEN3(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 8, 12, __Value) ++#define SET_EARLYMODE_LEN4(__pAddr, __Value) SET_BITS_TO_LE_4BYTE(__pAddr+4, 20, 12, __Value) ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USB_TX_AGGREGATION ++#define MAX_TX_AGG_PACKET_NUMBER 0xFF ++#endif ++ ++s32 rtl8192du_init_xmit_priv(_adapter * padapter); ++ ++void rtl8192du_free_xmit_priv(_adapter * padapter); ++ ++void rtl8192du_cal_txdesc_chksum(struct tx_desc *ptxdesc); ++ ++s32 rtl8192du_xmitframe_complete(_adapter *padapter, struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++void rtl8192du_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192du_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192du_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++s32 rtl8192de_init_xmit_priv(_adapter * padapter); ++void rtl8192de_free_xmit_priv(_adapter * padapter); ++ ++s32 rtl8192de_enqueue_xmitbuf(struct rtw_tx_ring *ring, struct xmit_buf *pxmitbuf); ++struct xmit_buf *rtl8192de_dequeue_xmitbuf(struct rtw_tx_ring *ring); ++ ++void rtl8192de_xmitframe_resume(_adapter *padapter); ++ ++void rtl8192de_mgnt_xmit(_adapter *padapter, struct xmit_frame *pmgntframe); ++ ++s32 rtl8192de_hal_xmit(_adapter *padapter, struct xmit_frame *pxmitframe); ++ ++#ifdef CONFIG_HOSTAPD_MLME ++s32 rtl8192de_hostap_mgnt_xmit_entry(_adapter *padapter, _pkt *pkt); ++#endif ++ ++#endif ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_android.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_android.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,80 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#ifndef __RTW_ANDROID_H__ ++#define __RTW_ANDROID_H__ ++ ++#include ++#include ++ ++enum ANDROID_WIFI_CMD { ++ ANDROID_WIFI_CMD_START, ++ ANDROID_WIFI_CMD_STOP, ++ ANDROID_WIFI_CMD_SCAN_ACTIVE, ++ ANDROID_WIFI_CMD_SCAN_PASSIVE, ++ ANDROID_WIFI_CMD_RSSI, ++ ANDROID_WIFI_CMD_LINKSPEED, ++ ANDROID_WIFI_CMD_RXFILTER_START, ++ ANDROID_WIFI_CMD_RXFILTER_STOP, ++ ANDROID_WIFI_CMD_RXFILTER_ADD, ++ ANDROID_WIFI_CMD_RXFILTER_REMOVE, ++ ANDROID_WIFI_CMD_BTCOEXSCAN_START, ++ ANDROID_WIFI_CMD_BTCOEXSCAN_STOP, ++ ANDROID_WIFI_CMD_BTCOEXMODE, ++ ANDROID_WIFI_CMD_SETSUSPENDOPT, ++ ANDROID_WIFI_CMD_P2P_DEV_ADDR, ++ ANDROID_WIFI_CMD_SETFWPATH, ++ ANDROID_WIFI_CMD_SETBAND, ++ ANDROID_WIFI_CMD_GETBAND, ++ ANDROID_WIFI_CMD_COUNTRY, ++ ANDROID_WIFI_CMD_P2P_SET_NOA, ++ ANDROID_WIFI_CMD_P2P_GET_NOA, ++ ANDROID_WIFI_CMD_P2P_SET_PS, ++ ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE, ++#ifdef PNO_SUPPORT ++ ANDROID_WIFI_CMD_PNOSSIDCLR_SET, ++ ANDROID_WIFI_CMD_PNOSETUP_SET, ++ ANDROID_WIFI_CMD_PNOENABLE_SET, ++ ANDROID_WIFI_CMD_PNODEBUG_SET, ++#endif ++ ++ ANDROID_WIFI_CMD_MACADDR, ++ ++ ANDROID_WIFI_CMD_BLOCK, ++ ++ ANDROID_WIFI_CMD_MAX ++}; ++ ++int rtw_android_cmdstr_to_num(char *cmdstr); ++int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd); ++ ++#if defined(CONFIG_WIFI_CONTROL_FUNC) && 0 ++int wl_android_wifictrl_func_add(void); ++void wl_android_wifictrl_func_del(void); ++void* wl_android_prealloc(int section, unsigned long size); ++ ++int wifi_get_irq_number(unsigned long *irq_flags_ptr); ++int wifi_set_power(int on, unsigned long msec); ++int wifi_get_mac_addr(unsigned char *buf); ++void *wifi_get_country_code(char *ccode); ++#endif /* CONFIG_WIFI_CONTROL_FUNC */ ++ ++#endif //__RTW_ANDROID_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_br_ext.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_br_ext.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,76 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_BR_EXT_H_ ++#define _RTW_BR_EXT_H_ ++ ++#if 1 // rtw_wifi_driver ++#define CL_IPV6_PASS 1 ++#define MACADDRLEN 6 ++#define _DEBUG_ERR printk ++#define _DEBUG_INFO //printk ++#define DEBUG_WARN printk ++#define DEBUG_INFO //printk ++#define DEBUG_ERR printk ++//#define GET_MY_HWADDR ((GET_MIB(priv))->dot11OperationEntry.hwaddr) ++#define GET_MY_HWADDR(padapter) ((padapter)->eeprompriv.mac_addr) ++#endif // rtw_wifi_driver ++ ++#define NAT25_HASH_BITS 4 ++#define NAT25_HASH_SIZE (1 << NAT25_HASH_BITS) ++#define NAT25_AGEING_TIME 300 ++ ++#ifdef CL_IPV6_PASS ++#define MAX_NETWORK_ADDR_LEN 17 ++#else ++#define MAX_NETWORK_ADDR_LEN 11 ++#endif ++ ++struct nat25_network_db_entry ++{ ++ struct nat25_network_db_entry *next_hash; ++ struct nat25_network_db_entry **pprev_hash; ++ atomic_t use_count; ++ unsigned char macAddr[6]; ++ unsigned long ageing_timer; ++ unsigned char networkAddr[MAX_NETWORK_ADDR_LEN]; ++}; ++ ++enum NAT25_METHOD { ++ NAT25_MIN, ++ NAT25_CHECK, ++ NAT25_INSERT, ++ NAT25_LOOKUP, ++ NAT25_PARSE, ++ NAT25_MAX ++}; ++ ++struct br_ext_info { ++ unsigned int nat25_disable; ++ unsigned int macclone_enable; ++ unsigned int dhcp_bcst_disable; ++ int addPPPoETag; // 1: Add PPPoE relay-SID, 0: disable ++ unsigned char nat25_dmzMac[MACADDRLEN]; ++ unsigned int nat25sc_disable; ++}; ++ ++void nat25_db_cleanup(_adapter *priv); ++ ++#endif // _RTW_BR_EXT_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_byteorder.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_byteorder.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTL871X_BYTEORDER_H_ ++#define _RTL871X_BYTEORDER_H_ ++ ++#include ++ ++#if defined (CONFIG_LITTLE_ENDIAN) && defined (CONFIG_BIG_ENDIAN) ++#error "Shall be CONFIG_LITTLE_ENDIAN or CONFIG_BIG_ENDIAN, but not both!\n" ++#endif ++ ++#if defined (CONFIG_LITTLE_ENDIAN) ++#ifndef CONFIG_PLATFORM_MSTAR389 ++# include ++#endif ++#elif defined (CONFIG_BIG_ENDIAN) ++# include ++#else ++# error "Must be LITTLE/BIG Endian Host" ++#endif ++ ++#endif /* _RTL871X_BYTEORDER_H_ */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_cmd.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_cmd.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1132 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_CMD_H_ ++#define __RTW_CMD_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define C2H_MEM_SZ (16*1024) ++ ++#ifndef CONFIG_RTL8711FW ++ ++ #include ++ #include // ++ ++ ++ #define FREE_CMDOBJ_SZ 128 ++ ++ #define MAX_CMDSZ 1024 ++ #define MAX_RSPSZ 512 ++ #define MAX_EVTSZ 1024 ++ ++#ifdef PLATFORM_OS_CE ++ #define CMDBUFF_ALIGN_SZ 4 ++#else ++ #define CMDBUFF_ALIGN_SZ 512 ++#endif ++ ++ struct cmd_obj { ++ u16 cmdcode; ++ u8 res; ++ u8 *parmbuf; ++ u32 cmdsz; ++ u8 *rsp; ++ u32 rspsz; ++ //_sema cmd_sem; ++ _list list; ++ }; ++ ++ struct cmd_priv { ++ _sema cmd_queue_sema; ++ //_sema cmd_done_sema; ++ _sema terminate_cmdthread_sema; ++ _queue cmd_queue; ++ u8 cmd_seq; ++ u8 *cmd_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *cmd_allocated_buf; ++ u8 *rsp_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *rsp_allocated_buf; ++ u32 cmd_issued_cnt; ++ u32 cmd_done_cnt; ++ u32 rsp_cnt; ++ u8 cmdthd_running; ++ _adapter *padapter; ++ }; ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ struct evt_obj { ++ u16 evtcode; ++ u8 res; ++ u8 *parmbuf; ++ u32 evtsz; ++ _list list; ++ }; ++#endif ++ ++ struct evt_priv { ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _sema evt_notify; ++ _sema terminate_evtthread_sema; ++ _queue evt_queue; ++#endif ++ ++#ifdef CONFIG_H2CLBK ++ _sema lbkevt_done; ++ u8 lbkevt_limit; ++ u8 lbkevt_num; ++ u8 *cmdevt_parm; ++#endif ++ ATOMIC_T event_seq; ++ u8 *evt_buf; //shall be non-paged, and 4 bytes aligned ++ u8 *evt_allocated_buf; ++ u32 evt_done_cnt; ++#ifdef CONFIG_SDIO_HCI ++ u8 *c2h_mem; ++ u8 *allocated_c2h_mem; ++#ifdef PLATFORM_OS_XP ++ PMDL pc2h_mdl; ++#endif ++#endif ++ ++ }; ++ ++#define init_h2fwcmd_w_parm_no_rsp(pcmd, pparm, code) \ ++do {\ ++ _rtw_init_listhead(&pcmd->list);\ ++ pcmd->cmdcode = code;\ ++ pcmd->parmbuf = (u8 *)(pparm);\ ++ pcmd->cmdsz = sizeof (*pparm);\ ++ pcmd->rsp = NULL;\ ++ pcmd->rspsz = 0;\ ++} while(0) ++ ++extern u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *obj); ++extern struct cmd_obj *rtw_dequeue_cmd(struct cmd_priv *pcmdpriv); ++extern void rtw_free_cmd_obj(struct cmd_obj *pcmd); ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++extern u32 rtw_enqueue_evt(struct evt_priv *pevtpriv, struct evt_obj *obj); ++extern struct evt_obj *rtw_dequeue_evt(_queue *queue); ++extern void rtw_free_evt_obj(struct evt_obj *pcmd); ++#endif ++ ++thread_return rtw_cmd_thread(thread_context context); ++ ++extern u32 rtw_init_cmd_priv (struct cmd_priv *pcmdpriv); ++extern void rtw_free_cmd_priv (struct cmd_priv *pcmdpriv); ++ ++extern u32 rtw_init_evt_priv (struct evt_priv *pevtpriv); ++extern void rtw_free_evt_priv (struct evt_priv *pevtpriv); ++extern void rtw_cmd_clr_isr(struct cmd_priv *pcmdpriv); ++extern void rtw_evt_notify_isr(struct evt_priv *pevtpriv); ++#ifdef CONFIG_P2P ++u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ); ++#endif //CONFIG_P2P ++ ++#else ++ #include ++#endif /* CONFIG_RTL8711FW */ ++ ++enum rtw_drvextra_cmd_id ++{ ++ NONE_WK_CID, ++ DYNAMIC_CHK_WK_CID, ++ DM_CTRL_WK_CID, ++ PBC_POLLING_WK_CID, ++ POWER_SAVING_CTRL_WK_CID,//IPS,AUTOSuspend ++ LPS_CTRL_WK_CID, ++ ANT_SELECT_WK_CID, ++ P2P_PS_WK_CID, ++ P2P_PROTO_WK_CID, ++ CHECK_HIQ_WK_CID,//for softap mode, check hi queue if empty ++ MAX_WK_CID ++}; ++ ++enum LPS_CTRL_TYPE ++{ ++ LPS_CTRL_SCAN=0, ++ LPS_CTRL_JOINBSS=1, ++ LPS_CTRL_CONNECT=2, ++ LPS_CTRL_DISCONNECT=3, ++ LPS_CTRL_SPECIAL_PACKET=4, ++}; ++ ++enum RFINTFS { ++ SWSI, ++ HWSI, ++ HWPI, ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC(C) ++ ++Notes: To enter USB suspend mode ++ ++Command Mode ++ ++*/ ++struct usb_suspend_parm { ++ u32 action;// 1: sleep, 0:resume ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC ++ ++Notes: To join a known BSS. ++ ++Command-Event Mode ++ ++*/ ++ ++/* ++Caller Mode: Infra, Ad-Hoc ++ ++Notes: To join the specified bss ++ ++Command Event Mode ++ ++*/ ++struct joinbss_parm { ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++Caller Mode: Infra, Ad-HoC(C) ++ ++Notes: To disconnect the current associated BSS ++ ++Command Mode ++ ++*/ ++struct disconnect_parm { ++ u32 rsvd; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC(M) ++ ++Notes: To create a BSS ++ ++Command Mode ++*/ ++struct createbss_parm { ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC, Infra ++ ++Notes: To set the NIC mode of RTL8711 ++ ++Command Mode ++ ++The definition of mode: ++ ++#define IW_MODE_AUTO 0 // Let the driver decides which AP to join ++#define IW_MODE_ADHOC 1 // Single cell network (Ad-Hoc Clients) ++#define IW_MODE_INFRA 2 // Multi cell network, roaming, .. ++#define IW_MODE_MASTER 3 // Synchronisation master or Access Point ++#define IW_MODE_REPEAT 4 // Wireless Repeater (forwarder) ++#define IW_MODE_SECOND 5 // Secondary master/repeater (backup) ++#define IW_MODE_MONITOR 6 // Passive monitor (listen only) ++ ++*/ ++struct setopmode_parm { ++ u8 mode; ++ u8 rsvd[3]; ++}; ++ ++/* ++Caller Mode: AP, Ad-HoC, Infra ++ ++Notes: To ask RTL8711 performing site-survey ++ ++Command-Event Mode ++ ++*/ ++ ++#define RTW_SSID_SCAN_AMOUNT 9 // for WEXT_CSCAN_AMOUNT 9 ++struct sitesurvey_parm { ++ sint scan_mode; //active: 1, passive: 0 ++ sint bsslimit; // 1 ~ 48 ++ // for up to 9 probreq with specific ssid ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To set the auth type of RTL8711. open/shared/802.1x ++ ++Command Mode ++ ++*/ ++struct setauth_parm { ++ u8 mode; //0: legacy open, 1: legacy shared 2: 802.1x ++ u8 _1x; //0: PSK, 1: TLS ++ u8 rsvd[2]; ++}; ++ ++/* ++Caller Mode: Infra ++ ++a. algorithm: wep40, wep104, tkip & aes ++b. keytype: grp key/unicast key ++c. key contents ++ ++when shared key ==> keyid is the camid ++when 802.1x ==> keyid [0:1] ==> grp key ++when 802.1x ==> keyid > 2 ==> unicast key ++ ++*/ ++struct setkey_parm { ++ u8 algorithm; // encryption algorithm, could be none, wep40, TKIP, CCMP, wep104 ++ u8 keyid; ++ u8 grpkey; // 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x ++ u8 set_tx; // 1: main tx key for wep. 0: other key. ++ u8 key[16]; // this could be 40 or 104 ++}; ++ ++/* ++When in AP or Ad-Hoc mode, this is used to ++allocate an sw/hw entry for a newly associated sta. ++ ++Command ++ ++when shared key ==> algorithm/keyid ++ ++*/ ++struct set_stakey_parm { ++ u8 addr[ETH_ALEN]; ++ u8 algorithm; ++ u8 key[16]; ++}; ++ ++struct set_stakey_rsp { ++ u8 addr[ETH_ALEN]; ++ u8 keyid; ++ u8 rsvd; ++}; ++ ++/* ++Caller Ad-Hoc/AP ++ ++Command -Rsp(AID == CAMID) mode ++ ++This is to force fw to add an sta_data entry per driver's request. ++ ++FW will write an cam entry associated with it. ++ ++*/ ++struct set_assocsta_parm { ++ u8 addr[ETH_ALEN]; ++}; ++ ++struct set_assocsta_rsp { ++ u8 cam_id; ++ u8 rsvd[3]; ++}; ++ ++/* ++ Caller Ad-Hoc/AP ++ ++ Command mode ++ ++ This is to force fw to del an sta_data entry per driver's request ++ ++ FW will invalidate the cam entry associated with it. ++ ++*/ ++struct del_assocsta_parm { ++ u8 addr[ETH_ALEN]; ++}; ++ ++/* ++Caller Mode: AP/Ad-HoC(M) ++ ++Notes: To notify fw that given staid has changed its power state ++ ++Command Mode ++ ++*/ ++struct setstapwrstate_parm { ++ u8 staid; ++ u8 status; ++ u8 hwaddr[6]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To setup the basic rate of RTL8711 ++ ++Command Mode ++ ++*/ ++struct setbasicrate_parm { ++ u8 basicrates[NumRates]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To read the current basic rate ++ ++Command-Rsp Mode ++ ++*/ ++struct getbasicrate_parm { ++ u32 rsvd; ++}; ++ ++struct getbasicrate_rsp { ++ u8 basicrates[NumRates]; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To setup the data rate of RTL8711 ++ ++Command Mode ++ ++*/ ++struct setdatarate_parm { ++#ifdef MP_FIRMWARE_OFFLOAD ++ u32 curr_rateidx; ++#else ++ u8 mac_id; ++ u8 datarates[NumRates]; ++#endif ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To read the current data rate ++ ++Command-Rsp Mode ++ ++*/ ++struct getdatarate_parm { ++ u32 rsvd; ++ ++}; ++struct getdatarate_rsp { ++ u8 datarates[NumRates]; ++}; ++ ++ ++/* ++Caller Mode: Any ++AP: AP can use the info for the contents of beacon frame ++Infra: STA can use the info when sitesurveying ++Ad-HoC(M): Like AP ++Ad-HoC(C): Like STA ++ ++ ++Notes: To set the phy capability of the NIC ++ ++Command Mode ++ ++*/ ++ ++struct setphyinfo_parm { ++ struct regulatory_class class_sets[NUM_REGULATORYS]; ++ u8 status; ++}; ++ ++struct getphyinfo_parm { ++ u32 rsvd; ++}; ++ ++struct getphyinfo_rsp { ++ struct regulatory_class class_sets[NUM_REGULATORYS]; ++ u8 status; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To set the channel/modem/band ++This command will be used when channel/modem/band is changed. ++ ++Command Mode ++ ++*/ ++struct setphy_parm { ++ u8 rfchannel; ++ u8 modem; ++}; ++ ++/* ++Caller Mode: Any ++ ++Notes: To get the current setting of channel/modem/band ++ ++Command-Rsp Mode ++ ++*/ ++struct getphy_parm { ++ u32 rsvd; ++ ++}; ++struct getphy_rsp { ++ u8 rfchannel; ++ u8 modem; ++}; ++ ++struct readBB_parm { ++ u8 offset; ++}; ++struct readBB_rsp { ++ u8 value; ++}; ++ ++struct readTSSI_parm { ++ u8 offset; ++}; ++struct readTSSI_rsp { ++ u8 value; ++}; ++ ++struct writeBB_parm { ++ u8 offset; ++ u8 value; ++}; ++ ++struct readRF_parm { ++ u8 offset; ++}; ++struct readRF_rsp { ++ u32 value; ++}; ++ ++struct writeRF_parm { ++ u32 offset; ++ u32 value; ++}; ++ ++struct getrfintfs_parm { ++ u8 rfintfs; ++}; ++ ++ ++struct Tx_Beacon_param ++{ ++ WLAN_BSSID_EX network; ++}; ++ ++/* ++ Notes: This command is used for H2C/C2H loopback testing ++ ++ mac[0] == 0 ++ ==> CMD mode, return H2C_SUCCESS. ++ The following condition must be ture under CMD mode ++ mac[1] == mac[4], mac[2] == mac[3], mac[0]=mac[5]= 0; ++ s0 == 0x1234, s1 == 0xabcd, w0 == 0x78563412, w1 == 0x5aa5def7; ++ s2 == (b1 << 8 | b0); ++ ++ mac[0] == 1 ++ ==> CMD_RSP mode, return H2C_SUCCESS_RSP ++ ++ The rsp layout shall be: ++ rsp: parm: ++ mac[0] = mac[5]; ++ mac[1] = mac[4]; ++ mac[2] = mac[3]; ++ mac[3] = mac[2]; ++ mac[4] = mac[1]; ++ mac[5] = mac[0]; ++ s0 = s1; ++ s1 = swap16(s0); ++ w0 = swap32(w1); ++ b0 = b1 ++ s2 = s0 + s1 ++ b1 = b0 ++ w1 = w0 ++ ++ mac[0] == 2 ++ ==> CMD_EVENT mode, return H2C_SUCCESS ++ The event layout shall be: ++ event: parm: ++ mac[0] = mac[5]; ++ mac[1] = mac[4]; ++ mac[2] = event's sequence number, starting from 1 to parm's marc[3] ++ mac[3] = mac[2]; ++ mac[4] = mac[1]; ++ mac[5] = mac[0]; ++ s0 = swap16(s0) - event.mac[2]; ++ s1 = s1 + event.mac[2]; ++ w0 = swap32(w0); ++ b0 = b1 ++ s2 = s0 + event.mac[2] ++ b1 = b0 ++ w1 = swap32(w1) - event.mac[2]; ++ ++ parm->mac[3] is the total event counts that host requested. ++ ++ ++ event will be the same with the cmd's param. ++ ++*/ ++ ++#ifdef CONFIG_H2CLBK ++ ++struct seth2clbk_parm { ++ u8 mac[6]; ++ u16 s0; ++ u16 s1; ++ u32 w0; ++ u8 b0; ++ u16 s2; ++ u8 b1; ++ u32 w1; ++}; ++ ++struct geth2clbk_parm { ++ u32 rsv; ++}; ++ ++struct geth2clbk_rsp { ++ u8 mac[6]; ++ u16 s0; ++ u16 s1; ++ u32 w0; ++ u8 b0; ++ u16 s2; ++ u8 b1; ++ u32 w1; ++}; ++ ++#endif /* CONFIG_H2CLBK */ ++ ++// CMD param Formart for driver extra cmd handler ++struct drvextra_cmd_parm { ++ int ec_id; //extra cmd id ++ int type_size; // Can use this field as the type id or command size ++ unsigned char *pbuf; ++}; ++ ++/*------------------- Below are used for RF/BB tunning ---------------------*/ ++ ++struct setantenna_parm { ++ u8 tx_antset; ++ u8 rx_antset; ++ u8 tx_antenna; ++ u8 rx_antenna; ++}; ++ ++struct enrateadaptive_parm { ++ u32 en; ++}; ++ ++struct settxagctbl_parm { ++ u32 txagc[MAX_RATES_LENGTH]; ++}; ++ ++struct gettxagctbl_parm { ++ u32 rsvd; ++}; ++struct gettxagctbl_rsp { ++ u32 txagc[MAX_RATES_LENGTH]; ++}; ++ ++struct setagcctrl_parm { ++ u32 agcctrl; // 0: pure hw, 1: fw ++}; ++ ++ ++struct setssup_parm { ++ u32 ss_ForceUp[MAX_RATES_LENGTH]; ++}; ++ ++struct getssup_parm { ++ u32 rsvd; ++}; ++struct getssup_rsp { ++ u8 ss_ForceUp[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setssdlevel_parm { ++ u8 ss_DLevel[MAX_RATES_LENGTH]; ++}; ++ ++struct getssdlevel_parm { ++ u32 rsvd; ++}; ++struct getssdlevel_rsp { ++ u8 ss_DLevel[MAX_RATES_LENGTH]; ++}; ++ ++struct setssulevel_parm { ++ u8 ss_ULevel[MAX_RATES_LENGTH]; ++}; ++ ++struct getssulevel_parm { ++ u32 rsvd; ++}; ++struct getssulevel_rsp { ++ u8 ss_ULevel[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setcountjudge_parm { ++ u8 count_judge[MAX_RATES_LENGTH]; ++}; ++ ++struct getcountjudge_parm { ++ u32 rsvd; ++}; ++struct getcountjudge_rsp { ++ u8 count_judge[MAX_RATES_LENGTH]; ++}; ++ ++ ++struct setratable_parm { ++ u8 ss_ForceUp[NumRates]; ++ u8 ss_ULevel[NumRates]; ++ u8 ss_DLevel[NumRates]; ++ u8 count_judge[NumRates]; ++}; ++ ++struct getratable_parm { ++ uint rsvd; ++}; ++struct getratable_rsp { ++ u8 ss_ForceUp[NumRates]; ++ u8 ss_ULevel[NumRates]; ++ u8 ss_DLevel[NumRates]; ++ u8 count_judge[NumRates]; ++}; ++ ++ ++//to get TX,RX retry count ++struct gettxretrycnt_parm{ ++ unsigned int rsvd; ++}; ++struct gettxretrycnt_rsp{ ++ unsigned long tx_retrycnt; ++}; ++ ++struct getrxretrycnt_parm{ ++ unsigned int rsvd; ++}; ++struct getrxretrycnt_rsp{ ++ unsigned long rx_retrycnt; ++}; ++ ++//to get BCNOK,BCNERR count ++struct getbcnokcnt_parm{ ++ unsigned int rsvd; ++}; ++struct getbcnokcnt_rsp{ ++ unsigned long bcnokcnt; ++}; ++ ++struct getbcnerrcnt_parm{ ++ unsigned int rsvd; ++}; ++struct getbcnerrcnt_rsp{ ++ unsigned long bcnerrcnt; ++}; ++ ++// to get current TX power level ++struct getcurtxpwrlevel_parm{ ++ unsigned int rsvd; ++}; ++struct getcurtxpwrlevel_rsp{ ++ unsigned short tx_power; ++}; ++ ++struct setprobereqextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setassocreqextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setproberspextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++struct setassocrspextraie_parm { ++ unsigned char e_id; ++ unsigned char ie_len; ++ unsigned char ie[0]; ++}; ++ ++ ++struct addBaReq_parm ++{ ++ unsigned int tid; ++ u8 addr[ETH_ALEN]; ++}; ++ ++/*H2C Handler index: 46 */ ++struct SetChannel_parm ++{ ++ u32 curr_ch; ++}; ++ ++#ifdef MP_FIRMWARE_OFFLOAD ++/*H2C Handler index: 47 */ ++struct SetTxPower_parm ++{ ++ u8 TxPower; ++}; ++ ++/*H2C Handler index: 48 */ ++struct SwitchAntenna_parm ++{ ++ u16 antenna_tx; ++ u16 antenna_rx; ++// R_ANTENNA_SELECT_CCK cck_txrx; ++ u8 cck_txrx; ++}; ++ ++/*H2C Handler index: 49 */ ++struct SetCrystalCap_parm ++{ ++ u32 curr_crystalcap; ++}; ++ ++/*H2C Handler index: 50 */ ++struct SetSingleCarrierTx_parm ++{ ++ u8 bStart; ++}; ++ ++/*H2C Handler index: 51 */ ++struct SetSingleToneTx_parm ++{ ++ u8 bStart; ++ u8 curr_rfpath; ++}; ++ ++/*H2C Handler index: 52 */ ++struct SetCarrierSuppressionTx_parm ++{ ++ u8 bStart; ++ u32 curr_rateidx; ++}; ++ ++/*H2C Handler index: 53 */ ++struct SetContinuousTx_parm ++{ ++ u8 bStart; ++ u8 CCK_flag; /*1:CCK 2:OFDM*/ ++ u32 curr_rateidx; ++}; ++ ++/*H2C Handler index: 54 */ ++struct SwitchBandwidth_parm ++{ ++ u8 curr_bandwidth; ++}; ++ ++#endif /* MP_FIRMWARE_OFFLOAD */ ++ ++/*H2C Handler index: 59 */ ++struct SetChannelPlan_param ++{ ++ u8 channel_plan; ++}; ++ ++/*H2C Handler index: 60 */ ++struct LedBlink_param ++{ ++ PLED_871x pLed; ++}; ++ ++/*H2C Handler index: 61 */ ++struct SetChannelSwitch_param ++{ ++ u8 new_ch_no; ++}; ++ ++/*H2C Handler index: 62 */ ++struct TDLSoption_param ++{ ++ u8 addr[ETH_ALEN]; ++ u8 option; ++}; ++ ++#define GEN_CMD_CODE(cmd) cmd ## _CMD_ ++ ++ ++/* ++ ++Result: ++0x00: success ++0x01: sucess, and check Response. ++0x02: cmd ignored due to duplicated sequcne number ++0x03: cmd dropped due to invalid cmd code ++0x04: reserved. ++ ++*/ ++ ++#define H2C_RSP_OFFSET 512 ++ ++#define H2C_SUCCESS 0x00 ++#define H2C_SUCCESS_RSP 0x01 ++#define H2C_DUPLICATED 0x02 ++#define H2C_DROPPED 0x03 ++#define H2C_PARAMETERS_ERROR 0x04 ++#define H2C_REJECTED 0x05 ++#define H2C_CMD_OVERFLOW 0x06 ++#define H2C_RESERVED 0x07 ++ ++extern u8 rtw_setassocsta_cmd(_adapter *padapter, u8 *mac_addr); ++extern u8 rtw_setstandby_cmd(_adapter *padapter, uint action); ++extern u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *pssid, int ssid_max_num); ++extern u8 rtw_createbss_cmd(_adapter *padapter); ++extern u8 rtw_createbss_cmd_ex(_adapter *padapter, unsigned char *pbss, unsigned int sz); ++extern u8 rtw_setphy_cmd(_adapter *padapter, u8 modem, u8 ch); ++extern u8 rtw_setstakey_cmd(_adapter *padapter, u8 *psta, u8 unicast_key); ++extern u8 rtw_joinbss_cmd(_adapter *padapter, struct wlan_network* pnetwork); ++extern u8 rtw_disassoc_cmd(_adapter *padapter); ++extern u8 rtw_setopmode_cmd(_adapter *padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype); ++extern u8 rtw_setdatarate_cmd(_adapter *padapter, u8 *rateset); ++extern u8 rtw_setbasicrate_cmd(_adapter *padapter, u8 *rateset); ++extern u8 rtw_setbbreg_cmd(_adapter * padapter, u8 offset, u8 val); ++extern u8 rtw_setrfreg_cmd(_adapter * padapter, u8 offset, u32 val); ++extern u8 rtw_getbbreg_cmd(_adapter * padapter, u8 offset, u8 * pval); ++extern u8 rtw_getrfreg_cmd(_adapter * padapter, u8 offset, u8 * pval); ++extern u8 rtw_setrfintfs_cmd(_adapter *padapter, u8 mode); ++extern u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table); ++extern u8 rtw_getrttbl_cmd(_adapter *padapter, struct getratable_rsp *pval); ++ ++extern u8 rtw_gettssi_cmd(_adapter *padapter, u8 offset,u8 *pval); ++extern u8 rtw_setfwdig_cmd(_adapter*padapter, u8 type); ++extern u8 rtw_setfwra_cmd(_adapter*padapter, u8 type); ++ ++extern u8 rtw_addbareq_cmd(_adapter*padapter, u8 tid, u8 *addr); ++ ++extern u8 rtw_dynamic_chk_wk_cmd(_adapter *adapter); ++ ++u8 rtw_lps_ctrl_wk_cmd(_adapter*padapter, u8 lps_ctrl_type, u8 enqueue); ++ ++#ifdef CONFIG_ANTENNA_DIVERSITY ++extern u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue); ++#endif ++ ++extern u8 rtw_ps_cmd(_adapter*padapter); ++ ++ ++#ifdef CONFIG_AP_MODE ++u8 rtw_chk_hi_queue_cmd(_adapter*padapter); ++#endif ++ ++extern u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enaueue); ++extern u8 rtw_led_blink_cmd(_adapter*padapter, PLED_871x pLed); ++extern u8 rtw_set_csa_cmd(_adapter*padapter, u8 new_ch_no); ++extern u8 rtw_tdls_cmd(_adapter*padapter, u8 *addr, u8 option); ++ ++u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++extern void rtw_survey_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_disassoc_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_joinbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_createbss_cmd_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_getbbrfreg_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_readtssi_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); ++ ++extern void rtw_setstaKey_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_setassocsta_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++extern void rtw_getrttbl_cmdrsp_callback(_adapter *padapter, struct cmd_obj *pcmd); ++ ++ ++struct _cmd_callback { ++ u32 cmd_code; ++ void (*callback)(_adapter *padapter, struct cmd_obj *cmd); ++}; ++ ++enum rtw_h2c_cmd ++{ ++ GEN_CMD_CODE(_Read_MACREG) , /*0*/ ++ GEN_CMD_CODE(_Write_MACREG) , ++ GEN_CMD_CODE(_Read_BBREG) , ++ GEN_CMD_CODE(_Write_BBREG) , ++ GEN_CMD_CODE(_Read_RFREG) , ++ GEN_CMD_CODE(_Write_RFREG) , /*5*/ ++ GEN_CMD_CODE(_Read_EEPROM) , ++ GEN_CMD_CODE(_Write_EEPROM) , ++ GEN_CMD_CODE(_Read_EFUSE) , ++ GEN_CMD_CODE(_Write_EFUSE) , ++ ++ GEN_CMD_CODE(_Read_CAM) , /*10*/ ++ GEN_CMD_CODE(_Write_CAM) , ++ GEN_CMD_CODE(_setBCNITV), ++ GEN_CMD_CODE(_setMBIDCFG), ++ GEN_CMD_CODE(_JoinBss), /*14*/ ++ GEN_CMD_CODE(_DisConnect) , /*15*/ ++ GEN_CMD_CODE(_CreateBss) , ++ GEN_CMD_CODE(_SetOpMode) , ++ GEN_CMD_CODE(_SiteSurvey), /*18*/ ++ GEN_CMD_CODE(_SetAuth) , ++ ++ GEN_CMD_CODE(_SetKey) , /*20*/ ++ GEN_CMD_CODE(_SetStaKey) , ++ GEN_CMD_CODE(_SetAssocSta) , ++ GEN_CMD_CODE(_DelAssocSta) , ++ GEN_CMD_CODE(_SetStaPwrState) , ++ GEN_CMD_CODE(_SetBasicRate) , /*25*/ ++ GEN_CMD_CODE(_GetBasicRate) , ++ GEN_CMD_CODE(_SetDataRate) , ++ GEN_CMD_CODE(_GetDataRate) , ++ GEN_CMD_CODE(_SetPhyInfo) , ++ ++ GEN_CMD_CODE(_GetPhyInfo) , /*30*/ ++ GEN_CMD_CODE(_SetPhy) , ++ GEN_CMD_CODE(_GetPhy) , ++ GEN_CMD_CODE(_readRssi) , ++ GEN_CMD_CODE(_readGain) , ++ GEN_CMD_CODE(_SetAtim) , /*35*/ ++ GEN_CMD_CODE(_SetPwrMode) , ++ GEN_CMD_CODE(_JoinbssRpt), ++ GEN_CMD_CODE(_SetRaTable) , ++ GEN_CMD_CODE(_GetRaTable) , ++ ++ GEN_CMD_CODE(_GetCCXReport), /*40*/ ++ GEN_CMD_CODE(_GetDTMReport), ++ GEN_CMD_CODE(_GetTXRateStatistics), ++ GEN_CMD_CODE(_SetUsbSuspend), ++ GEN_CMD_CODE(_SetH2cLbk), ++ GEN_CMD_CODE(_AddBAReq) , /*45*/ ++ GEN_CMD_CODE(_SetChannel), /*46*/ ++ GEN_CMD_CODE(_SetTxPower), ++ GEN_CMD_CODE(_SwitchAntenna), ++ GEN_CMD_CODE(_SetCrystalCap), ++ GEN_CMD_CODE(_SetSingleCarrierTx), /*50*/ ++ ++ GEN_CMD_CODE(_SetSingleToneTx),/*51*/ ++ GEN_CMD_CODE(_SetCarrierSuppressionTx), ++ GEN_CMD_CODE(_SetContinuousTx), ++ GEN_CMD_CODE(_SwitchBandwidth), /*54*/ ++ GEN_CMD_CODE(_TX_Beacon), /*55*/ ++ ++ GEN_CMD_CODE(_Set_MLME_EVT), /*56*/ ++ GEN_CMD_CODE(_Set_Drv_Extra), /*57*/ ++ GEN_CMD_CODE(_Set_H2C_MSG), /*58*/ ++ ++ GEN_CMD_CODE(_SetChannelPlan), /*59*/ ++ GEN_CMD_CODE(_LedBlink), /*60*/ ++ ++ GEN_CMD_CODE(_SetChannelSwitch), /*61*/ ++ GEN_CMD_CODE(_TDLS), /*62*/ ++ ++ MAX_H2CCMD ++}; ++ ++#define _GetBBReg_CMD_ _Read_BBREG_CMD_ ++#define _SetBBReg_CMD_ _Write_BBREG_CMD_ ++#define _GetRFReg_CMD_ _Read_RFREG_CMD_ ++#define _SetRFReg_CMD_ _Write_RFREG_CMD_ ++ ++#ifdef _RTW_CMD_C_ ++struct _cmd_callback rtw_cmd_callback[] = ++{ ++ {GEN_CMD_CODE(_Read_MACREG), NULL}, /*0*/ ++ {GEN_CMD_CODE(_Write_MACREG), NULL}, ++ {GEN_CMD_CODE(_Read_BBREG), &rtw_getbbrfreg_cmdrsp_callback}, ++ {GEN_CMD_CODE(_Write_BBREG), NULL}, ++ {GEN_CMD_CODE(_Read_RFREG), &rtw_getbbrfreg_cmdrsp_callback}, ++ {GEN_CMD_CODE(_Write_RFREG), NULL}, /*5*/ ++ {GEN_CMD_CODE(_Read_EEPROM), NULL}, ++ {GEN_CMD_CODE(_Write_EEPROM), NULL}, ++ {GEN_CMD_CODE(_Read_EFUSE), NULL}, ++ {GEN_CMD_CODE(_Write_EFUSE), NULL}, ++ ++ {GEN_CMD_CODE(_Read_CAM), NULL}, /*10*/ ++ {GEN_CMD_CODE(_Write_CAM), NULL}, ++ {GEN_CMD_CODE(_setBCNITV), NULL}, ++ {GEN_CMD_CODE(_setMBIDCFG), NULL}, ++ {GEN_CMD_CODE(_JoinBss), &rtw_joinbss_cmd_callback}, /*14*/ ++ {GEN_CMD_CODE(_DisConnect), &rtw_disassoc_cmd_callback}, /*15*/ ++ {GEN_CMD_CODE(_CreateBss), &rtw_createbss_cmd_callback}, ++ {GEN_CMD_CODE(_SetOpMode), NULL}, ++ {GEN_CMD_CODE(_SiteSurvey), &rtw_survey_cmd_callback}, /*18*/ ++ {GEN_CMD_CODE(_SetAuth), NULL}, ++ ++ {GEN_CMD_CODE(_SetKey), NULL}, /*20*/ ++ {GEN_CMD_CODE(_SetStaKey), &rtw_setstaKey_cmdrsp_callback}, ++ {GEN_CMD_CODE(_SetAssocSta), &rtw_setassocsta_cmdrsp_callback}, ++ {GEN_CMD_CODE(_DelAssocSta), NULL}, ++ {GEN_CMD_CODE(_SetStaPwrState), NULL}, ++ {GEN_CMD_CODE(_SetBasicRate), NULL}, /*25*/ ++ {GEN_CMD_CODE(_GetBasicRate), NULL}, ++ {GEN_CMD_CODE(_SetDataRate), NULL}, ++ {GEN_CMD_CODE(_GetDataRate), NULL}, ++ {GEN_CMD_CODE(_SetPhyInfo), NULL}, ++ ++ {GEN_CMD_CODE(_GetPhyInfo), NULL}, /*30*/ ++ {GEN_CMD_CODE(_SetPhy), NULL}, ++ {GEN_CMD_CODE(_GetPhy), NULL}, ++ {GEN_CMD_CODE(_readRssi), NULL}, ++ {GEN_CMD_CODE(_readGain), NULL}, ++ {GEN_CMD_CODE(_SetAtim), NULL}, /*35*/ ++ {GEN_CMD_CODE(_SetPwrMode), NULL}, ++ {GEN_CMD_CODE(_JoinbssRpt), NULL}, ++ {GEN_CMD_CODE(_SetRaTable), NULL}, ++ {GEN_CMD_CODE(_GetRaTable) , NULL}, ++ ++ {GEN_CMD_CODE(_GetCCXReport), NULL}, /*40*/ ++ {GEN_CMD_CODE(_GetDTMReport), NULL}, ++ {GEN_CMD_CODE(_GetTXRateStatistics), NULL}, ++ {GEN_CMD_CODE(_SetUsbSuspend), NULL}, ++ {GEN_CMD_CODE(_SetH2cLbk), NULL}, ++ {GEN_CMD_CODE(_AddBAReq), NULL}, /*45*/ ++ {GEN_CMD_CODE(_SetChannel), NULL}, /*46*/ ++ {GEN_CMD_CODE(_SetTxPower), NULL}, ++ {GEN_CMD_CODE(_SwitchAntenna), NULL}, ++ {GEN_CMD_CODE(_SetCrystalCap), NULL}, ++ {GEN_CMD_CODE(_SetSingleCarrierTx), NULL}, /*50*/ ++ ++ {GEN_CMD_CODE(_SetSingleToneTx), NULL}, /*51*/ ++ {GEN_CMD_CODE(_SetCarrierSuppressionTx), NULL}, ++ {GEN_CMD_CODE(_SetContinuousTx), NULL}, ++ {GEN_CMD_CODE(_SwitchBandwidth), NULL}, /*54*/ ++ {GEN_CMD_CODE(_TX_Beacon), NULL},/*55*/ ++ ++ {GEN_CMD_CODE(_Set_MLME_EVT), NULL},/*56*/ ++ {GEN_CMD_CODE(_Set_Drv_Extra), NULL},/*57*/ ++ {GEN_CMD_CODE(_Set_H2C_MSG), NULL},/*58*/ ++ {GEN_CMD_CODE(_SetChannelPlan), NULL},/*59*/ ++ {GEN_CMD_CODE(_LedBlink), NULL},/*60*/ ++ {GEN_CMD_CODE(_SetChannelSwitch), NULL},/*61*/ ++ {GEN_CMD_CODE(_TDLS), NULL},/*62*/ ++}; ++#endif ++ ++#endif // _CMD_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_debug.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_debug.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,389 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_DEBUG_H__ ++#define __RTW_DEBUG_H__ ++ ++#include ++#include ++#include ++ ++ ++#define _drv_emerg_ 1 ++#define _drv_alert_ 2 ++#define _drv_crit_ 3 ++#define _drv_err_ 4 ++#define _drv_warning_ 5 ++#define _drv_notice_ 6 ++#define _drv_info_ 7 ++#define _drv_dump_ 8 ++#define _drv_debug_ 9 ++ ++ ++#define _module_rtl871x_xmit_c_ BIT(0) ++#define _module_xmit_osdep_c_ BIT(1) ++#define _module_rtl871x_recv_c_ BIT(2) ++#define _module_recv_osdep_c_ BIT(3) ++#define _module_rtl871x_mlme_c_ BIT(4) ++#define _module_mlme_osdep_c_ BIT(5) ++#define _module_rtl871x_sta_mgt_c_ BIT(6) ++#define _module_rtl871x_cmd_c_ BIT(7) ++#define _module_cmd_osdep_c_ BIT(8) ++#define _module_rtl871x_io_c_ BIT(9) ++#define _module_io_osdep_c_ BIT(10) ++#define _module_os_intfs_c_ BIT(11) ++#define _module_rtl871x_security_c_ BIT(12) ++#define _module_rtl871x_eeprom_c_ BIT(13) ++#define _module_hal_init_c_ BIT(14) ++#define _module_hci_hal_init_c_ BIT(15) ++#define _module_rtl871x_ioctl_c_ BIT(16) ++#define _module_rtl871x_ioctl_set_c_ BIT(17) ++#define _module_rtl871x_ioctl_query_c_ BIT(18) ++#define _module_rtl871x_pwrctrl_c_ BIT(19) ++#define _module_hci_intfs_c_ BIT(20) ++#define _module_hci_ops_c_ BIT(21) ++#define _module_osdep_service_c_ BIT(22) ++#define _module_mp_ BIT(23) ++#define _module_hci_ops_os_c_ BIT(24) ++#define _module_rtl871x_ioctl_os_c BIT(25) ++#define _module_rtl8712_cmd_c_ BIT(26) ++//#define _module_efuse_ BIT(27) ++#define _module_rtl8192c_xmit_c_ BIT(28) ++#define _module_efuse_ BIT(29) ++#define _module_rtl8712_recv_c_ BIT(30) ++#define _module_rtl8712_led_c_ BIT(31) ++ ++#undef _MODULE_DEFINE_ ++ ++#if defined _RTL871X_XMIT_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_xmit_c_ ++#elif defined _XMIT_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_xmit_osdep_c_ ++#elif defined _RTL871X_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_recv_c_ ++#elif defined _RECV_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_recv_osdep_c_ ++#elif defined _RTL871X_MLME_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_mlme_c_ ++#elif defined _MLME_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ ++#elif defined _RTL871X_STA_MGT_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_sta_mgt_c_ ++#elif defined _RTL871X_CMD_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_cmd_c_ ++#elif defined _CMD_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_cmd_osdep_c_ ++#elif defined _RTL871X_IO_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_io_c_ ++#elif defined _IO_OSDEP_C_ ++ #define _MODULE_DEFINE_ _module_io_osdep_c_ ++#elif defined _OS_INTFS_C_ ++ #define _MODULE_DEFINE_ _module_os_intfs_c_ ++#elif defined _RTL871X_SECURITY_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_security_c_ ++#elif defined _RTL871X_EEPROM_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_eeprom_c_ ++#elif defined _HAL_INIT_C_ ++ #define _MODULE_DEFINE_ _module_hal_init_c_ ++#elif defined _HCI_HAL_INIT_C_ ++ #define _MODULE_DEFINE_ _module_hci_hal_init_c_ ++#elif defined _RTL871X_IOCTL_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_c_ ++#elif defined _RTL871X_IOCTL_SET_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_set_c_ ++#elif defined _RTL871X_IOCTL_QUERY_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_query_c_ ++#elif defined _RTL871X_PWRCTRL_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_pwrctrl_c_ ++#elif defined _HCI_INTF_C_ ++ #define _MODULE_DEFINE_ _module_hci_intfs_c_ ++#elif defined _HCI_OPS_C_ ++ #define _MODULE_DEFINE_ _module_hci_ops_c_ ++#elif defined _OSDEP_HCI_INTF_C_ ++ #define _MODULE_DEFINE_ _module_hci_intfs_c_ ++#elif defined _OSDEP_SERVICE_C_ ++ #define _MODULE_DEFINE_ _module_osdep_service_c_ ++#elif defined _HCI_OPS_OS_C_ ++ #define _MODULE_DEFINE_ _module_hci_ops_os_c_ ++#elif defined _RTL871X_IOCTL_LINUX_C_ ++ #define _MODULE_DEFINE_ _module_rtl871x_ioctl_os_c ++#elif defined _RTL8712_CMD_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_cmd_c_ ++#elif defined _RTL8192C_XMIT_C_ ++ #define _MODULE_DEFINE_ _module_rtl8192c_xmit_c_ ++#elif defined _RTL8712_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ ++#elif defined _RTL8192CU_RECV_C_ ++ #define _MODULE_DEFINE_ _module_rtl8712_recv_c_ ++#elif defined _RTL871X_MLME_EXT_C_ ++ #define _MODULE_DEFINE_ _module_mlme_osdep_c_ ++#elif defined _RTW_MP_C_ ++ #define _MODULE_DEFINE_ _module_mp_ ++#elif defined _RTW_MP_IOCTL_C_ ++ #define _MODULE_DEFINE_ _module_mp_ ++#elif defined _RTW_EFUSE_C_ ++ #define _MODULE_DEFINE_ _module_efuse_ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++extern void rtl871x_cedbg(const char *fmt, ...); ++#endif ++ ++#define RT_TRACE(_Comp, _Level, Fmt) do{}while(0) ++#define _func_enter_ do{}while(0) ++#define _func_exit_ do{}while(0) ++#define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) do{}while(0) ++ ++#undef _dbgdump ++ ++#ifdef CONFIG_DEBUG_RTL871X ++ ++#ifndef _RTL871X_DEBUG_C_ ++ extern u32 GlobalDebugLevel; ++ extern u64 GlobalDebugComponents; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ #ifdef PLATFORM_OS_XP ++ ++ #define _dbgdump DbgPrint ++ ++ #elif defined PLATFORM_OS_CE ++ ++ #define _dbgdump rtl871x_cedbg ++ ++ #endif ++ ++ #elif defined PLATFORM_LINUX ++ ++ #define _dbgdump printk ++ ++#endif ++ ++#endif /* CONFIG_DEBUG_RTL871X */ ++ ++ ++#if defined (_dbgdump) && defined (_MODULE_DEFINE_) ++ ++ #undef RT_TRACE ++ #define RT_TRACE(_Comp, _Level, Fmt)\ ++ do {\ ++ if((_Comp & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) {\ ++ _dbgdump("%s [0x%08x,%d]", RTL871X_MODULE_NAME, (unsigned int)_Comp, _Level);\ ++ _dbgdump Fmt; \ ++ }\ ++ }while(0) ++ ++#endif ++ ++ ++#if defined (_dbgdump) ++ ++ #undef _func_enter_ ++ #define _func_enter_ \ ++ do { \ ++ if (GlobalDebugLevel >= _drv_debug_) \ ++ { \ ++ _dbgdump("\n %s : %s enters at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__);\ ++ } \ ++ } while(0) ++ ++ #undef _func_exit_ ++ #define _func_exit_ \ ++ do { \ ++ if (GlobalDebugLevel >= _drv_debug_) \ ++ { \ ++ _dbgdump("\n %s : %s exits at %d\n", RTL871X_MODULE_NAME, __FUNCTION__, __LINE__); \ ++ } \ ++ } while(0) ++ ++ #undef RT_PRINT_DATA ++ #define RT_PRINT_DATA(_Comp, _Level, _TitleString, _HexData, _HexDataLen) \ ++ if(((_Comp) & GlobalDebugComponents) && (_Level <= GlobalDebugLevel)) \ ++ { \ ++ int __i; \ ++ u8 *ptr = (u8 *)_HexData; \ ++ _dbgdump("Rtl871x: "); \ ++ _dbgdump(_TitleString); \ ++ for( __i=0; __i<(int)_HexDataLen; __i++ ) \ ++ { \ ++ _dbgdump("%02X%s", ptr[__i], (((__i + 1) % 4) == 0)?" ":" "); \ ++ if (((__i + 1) % 16) == 0) _dbgdump("\n"); \ ++ } \ ++ _dbgdump("\n"); \ ++ } ++#endif ++ ++ ++#ifdef CONFIG_DEBUG_RTL819X ++ #ifdef PLATFORM_WINDOWS ++ ++ #ifdef PLATFORM_OS_XP ++ #define _dbgdump DbgPrint ++ ++ #elif defined PLATFORM_OS_CE ++ #define _dbgdump rtl871x_cedbg ++ ++ #endif ++ ++ #elif defined PLATFORM_LINUX ++ #define _dbgdump printk ++ #endif ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ #define DBG_871X do {} while(0) ++ #define MSG_8192C do {} while(0) ++ #define DBG_8192C do {} while(0) ++ #define WRN_8192C do {} while(0) ++ #define ERR_8192C do {} while(0) ++#endif ++ ++#ifdef PLATFORM_LINUX ++ #define DBG_871X(x, ...) do {} while(0) ++ #define MSG_8192C(x, ...) do {} while(0) ++ #define DBG_8192C(x,...) do {} while(0) ++ #define WRN_8192C(x,...) do {} while(0) ++ #define ERR_8192C(x,...) do {} while(0) ++#endif ++ ++#if defined (_dbgdump) ++ #undef DBG_871X ++ #define DBG_871X _dbgdump ++ ++ #undef MSG_8192C ++ #define MSG_8192C _dbgdump ++ ++ #undef DBG_8192C ++ #define DBG_8192C _dbgdump ++ ++ #undef WRN_8192C ++ #define WRN_8192C _dbgdump ++ ++ #undef ERR_8192C ++ #define ERR_8192C _dbgdump ++#endif ++ ++ ++ ++#ifdef CONFIG_PROC_DEBUG ++ ++ int proc_get_drv_version(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_write_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_write_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_read_reg(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_read_reg(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ ++ int proc_get_fwstate(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_sec_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_mlmext_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_qos_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_ht_option(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_rf_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_ap_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_adapter_state(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_get_trx_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++ int proc_get_all_sta_info(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ int proc_get_malloc_cnt(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ int proc_get_best_channel(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++#endif ++ ++ int proc_get_rx_signal(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_rx_signal(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_ampdu_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_ampdu_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ int proc_get_rssi_disp(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data); ++ ++ int proc_set_rssi_disp(struct file *file, const char *buffer, ++ unsigned long count, void *data); ++ ++ ++#endif //CONFIG_PROC_DEBUG ++ ++#endif //__RTW_DEBUG_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_eeprom.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_eeprom.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,153 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_EEPROM_H__ ++#define __RTW_EEPROM_H__ ++ ++#include ++#include ++#include ++ ++#define RTL8712_EEPROM_ID 0x8712 ++#define EEPROM_MAX_SIZE 256 ++#define CLOCK_RATE 50 //100us ++ ++//- EEPROM opcodes ++#define EEPROM_READ_OPCODE 06 ++#define EEPROM_WRITE_OPCODE 05 ++#define EEPROM_ERASE_OPCODE 07 ++#define EEPROM_EWEN_OPCODE 19 // Erase/write enable ++#define EEPROM_EWDS_OPCODE 16 // Erase/write disable ++ ++//Country codes ++#define USA 0x555320 ++#define EUROPE 0x1 //temp, should be provided later ++#define JAPAN 0x2 //temp, should be provided later ++ ++#ifdef CONFIG_SDIO_HCI ++#define eeprom_cis0_sz 17 ++#define eeprom_cis1_sz 50 ++#endif ++ ++#define EEPROM_CID_DEFAULT 0x0 ++#define EEPROM_CID_ALPHA 0x1 ++#define EEPROM_CID_Senao 0x3 ++#define EEPROM_CID_NetCore 0x5 ++#define EEPROM_CID_CAMEO 0X8 ++#define EEPROM_CID_SITECOM 0x9 ++#define EEPROM_CID_COREGA 0xB ++#define EEPROM_CID_EDIMAX_BELKIN 0xC ++#define EEPROM_CID_SERCOMM_BELKIN 0xE ++#define EEPROM_CID_CAMEO1 0xF ++#define EEPROM_CID_WNC_COREGA 0x12 ++#define EEPROM_CID_CLEVO 0x13 ++#define EEPROM_CID_WHQL 0xFE // added by chiyoko for dtm, 20090108 ++ ++// ++// Customer ID, note that: ++// This variable is initiailzed through EEPROM or registry, ++// however, its definition may be different with that in EEPROM for ++// EEPROM size consideration. So, we have to perform proper translation between them. ++// Besides, CustomerID of registry has precedence of that of EEPROM. ++// defined below. 060703, by rcnjko. ++// ++typedef enum _RT_CUSTOMER_ID ++{ ++ RT_CID_DEFAULT = 0, ++ RT_CID_8187_ALPHA0 = 1, ++ RT_CID_8187_SERCOMM_PS = 2, ++ RT_CID_8187_HW_LED = 3, ++ RT_CID_8187_NETGEAR = 4, ++ RT_CID_WHQL = 5, ++ RT_CID_819x_CAMEO = 6, ++ RT_CID_819x_RUNTOP = 7, ++ RT_CID_819x_Senao = 8, ++ RT_CID_TOSHIBA = 9, // Merge by Jacken, 2008/01/31. ++ RT_CID_819x_Netcore = 10, ++ RT_CID_Nettronix = 11, ++ RT_CID_DLINK = 12, ++ RT_CID_PRONET = 13, ++ RT_CID_COREGA = 14, ++ RT_CID_CHINA_MOBILE = 15, ++ RT_CID_819x_ALPHA = 16, ++ RT_CID_819x_Sitecom = 17, ++ RT_CID_CCX = 18, // It's set under CCX logo test and isn't demanded for CCX functions, but for test behavior like retry limit and tx report. By Bruce, 2009-02-17. ++ RT_CID_819x_Lenovo = 19, ++ RT_CID_819x_QMI = 20, ++ RT_CID_819x_Edimax_Belkin = 21, ++ RT_CID_819x_Sercomm_Belkin = 22, ++ RT_CID_819x_CAMEO1 = 23, ++ RT_CID_819x_MSI = 24, ++ RT_CID_819x_Acer = 25, ++ RT_CID_819x_AzWave_ASUS = 26, ++ RT_CID_819x_AzWave = 27, // For AzWave in PCIe, The ID is AzWave use and not only Asus ++ RT_CID_819x_HP = 28, ++ RT_CID_819x_WNC_COREGA = 29, ++ RT_CID_819x_Arcadyan_Belkin = 30, ++ RT_CID_819x_SAMSUNG = 31, ++ RT_CID_819x_CLEVO = 32, ++ RT_CID_819x_DELL = 33, ++ RT_CID_819x_PRONETS = 34, ++ RT_CID_819x_Edimax_ASUS = 35, ++ RT_CID_819x_CAMEO_NETGEAR = 36, ++}RT_CUSTOMER_ID, *PRT_CUSTOMER_ID; ++ ++struct eeprom_priv ++{ ++ u8 bautoload_fail_flag; ++ //u8 bempty; ++ //u8 sys_config; ++ u8 mac_addr[6]; //PermanentAddress ++ //u8 config0; ++ u16 channel_plan; ++ //u8 country_string[3]; ++ //u8 tx_power_b[15]; ++ //u8 tx_power_g[15]; ++ //u8 tx_power_a[201]; ++ ++ u8 EepromOrEfuse; ++ ++ u8 efuse_eeprom_data[EEPROM_MAX_SIZE]; ++ ++#ifdef CONFIG_SDIO_HCI ++ u8 sdio_setting; ++ u32 ocr; ++ u8 cis0[eeprom_cis0_sz]; ++ u8 cis1[eeprom_cis1_sz]; ++#endif ++}; ++ ++ ++extern void eeprom_write16(_adapter *padapter, u16 reg, u16 data); ++extern u16 eeprom_read16(_adapter *padapter, u16 reg); ++extern void read_eeprom_content(_adapter *padapter); ++extern void eeprom_read_sz(_adapter * padapter, u16 reg,u8* data, u32 sz); ++ ++extern void read_eeprom_content_by_attrib(_adapter * padapter ); ++ ++#ifdef PLATFORM_LINUX ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++extern int isAdaptorInfoFileValid(void); ++extern int storeAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); ++extern int retriveAdaptorInfoFile(char *path, struct eeprom_priv * eeprom_priv); ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++#endif //PLATFORM_LINUX ++ ++#endif //__RTL871X_EEPROM_H__ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_efuse.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_efuse.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,123 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_EFUSE_H__ ++#define __RTW_EFUSE_H__ ++ ++#include ++#include ++ ++#define EFUSE_ERROE_HANDLE 1 ++ ++#define PG_STATE_HEADER 0x01 ++#define PG_STATE_WORD_0 0x02 ++#define PG_STATE_WORD_1 0x04 ++#define PG_STATE_WORD_2 0x08 ++#define PG_STATE_WORD_3 0x10 ++#define PG_STATE_DATA 0x20 ++ ++#define PG_SWBYTE_H 0x01 ++#define PG_SWBYTE_L 0x02 ++ ++#define PGPKT_DATA_SIZE 8 ++ ++#define EFUSE_WIFI 0 ++#define EFUSE_BT 1 ++ ++enum _EFUSE_DEF_TYPE { ++ TYPE_EFUSE_MAX_SECTION = 0, ++ TYPE_EFUSE_REAL_CONTENT_LEN = 1, ++ TYPE_AVAILABLE_EFUSE_BYTES_BANK = 2, ++ TYPE_AVAILABLE_EFUSE_BYTES_TOTAL = 3, ++ TYPE_EFUSE_MAP_LEN = 4, ++ TYPE_EFUSE_PROTECT_BYTES_BANK = 5, ++}; ++ ++#define EFUSE_MAX_MAP_LEN 256 ++#define EFUSE_MAX_HW_SIZE 512 ++#define EFUSE_MAX_SECTION_BASE 16 ++ ++#define EXT_HEADER(header) ((header & 0x1F ) == 0x0F) ++#define ALL_WORDS_DISABLED(wde) ((wde & 0x0F) == 0x0F) ++#define GET_HDR_OFFSET_2_0(header) ( (header & 0xE0) >> 5) ++ ++#define EFUSE_REPEAT_THRESHOLD_ 3 ++ ++//============================================= ++// The following is for BT Efuse definition ++//============================================= ++#define EFUSE_BT_MAX_MAP_LEN 1024 ++#define EFUSE_MAX_BANK 4 ++#define EFUSE_MAX_BT_BANK (EFUSE_MAX_BANK-1) ++//============================================= ++/*--------------------------Define Parameters-------------------------------*/ ++#define EFUSE_MAX_WORD_UNIT 4 ++ ++/*------------------------------Define structure----------------------------*/ ++typedef struct PG_PKT_STRUCT_A{ ++ u8 offset; ++ u8 word_en; ++ u8 data[8]; ++ u8 word_cnts; ++}PGPKT_STRUCT,*PPGPKT_STRUCT; ++/*------------------------------Define structure----------------------------*/ ++ ++ ++/*------------------------Export global variable----------------------------*/ ++extern u8 fakeEfuseBank; ++extern u32 fakeEfuseUsedBytes; ++extern u8 fakeEfuseContent[]; ++extern u8 fakeEfuseInitMap[]; ++extern u8 fakeEfuseModifiedMap[]; ++ ++extern u32 BTEfuseUsedBytes; ++extern u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++extern u8 BTEfuseInitMap[]; ++extern u8 BTEfuseModifiedMap[]; ++ ++extern u32 fakeBTEfuseUsedBytes; ++extern u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE]; ++extern u8 fakeBTEfuseInitMap[]; ++extern u8 fakeBTEfuseModifiedMap[]; ++/*------------------------Export global variable----------------------------*/ ++ ++u8 efuse_GetCurrentSize(PADAPTER padapter, u16 *size); ++u16 efuse_GetMaxSize(PADAPTER padapter); ++u8 rtw_efuse_access(PADAPTER padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data); ++u8 rtw_efuse_map_read(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); ++u8 rtw_efuse_map_write(PADAPTER padapter, u16 addr, u16 cnts, u8 *data); ++ ++u16 Efuse_GetCurrentSize(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++u8 Efuse_CalculateWordCnts(u8 word_en); ++void ReadEFuseByte(PADAPTER Adapter, u16 _offset, u8 *pbuf, BOOLEAN bPseudoTest) ; ++void EFUSE_GetEfuseDefinition(PADAPTER pAdapter, u8 efuseType, u8 type, PVOID *pOut, BOOLEAN bPseudoTest); ++u8 efuse_OneByteRead(PADAPTER pAdapter, u16 addr, u8 *data, BOOLEAN bPseudoTest); ++u8 efuse_OneByteWrite(PADAPTER pAdapter, u16 addr, u8 data, BOOLEAN bPseudoTest); ++ ++void Efuse_PowerSwitch(PADAPTER pAdapter,u8 bWrite,u8 PwrState); ++int Efuse_PgPacketRead(PADAPTER pAdapter, u8 offset, u8 *data, BOOLEAN bPseudoTest); ++int Efuse_PgPacketWrite(PADAPTER pAdapter, u8 offset, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata); ++u8 Efuse_WordEnableDataWrite(PADAPTER pAdapter, u16 efuse_addr, u8 word_en, u8 *data, BOOLEAN bPseudoTest); ++ ++u8 EFUSE_Read1Byte(PADAPTER pAdapter, u16 Address); ++void EFUSE_ShadowMapUpdate(PADAPTER pAdapter, u8 efuseType, BOOLEAN bPseudoTest); ++void EFUSE_ShadowRead(PADAPTER pAdapter, u8 Type, u16 Offset, u32 *Value); ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_event.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_event.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,154 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_EVENT_H_ ++#define _RTW_EVENT_H_ ++#include ++#include ++ ++#ifndef CONFIG_RTL8711FW ++#ifdef PLATFORM_LINUX ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++#include ++#else ++#include ++#endif ++#include ++#endif ++#else ++#include ++#endif//CONFIG_RTL8711FW ++ ++ ++ ++#ifdef CONFIG_H2CLBK ++#include ++#endif ++ ++/* ++Used to report a bss has been scanned ++ ++*/ ++struct survey_event { ++ WLAN_BSSID_EX bss; ++}; ++ ++/* ++Used to report that the requested site survey has been done. ++ ++bss_cnt indicates the number of bss that has been reported. ++ ++ ++*/ ++struct surveydone_event { ++ unsigned int bss_cnt; ++ ++}; ++ ++/* ++Used to report the link result of joinning the given bss ++ ++ ++join_res: ++-1: authentication fail ++-2: association fail ++> 0: TID ++ ++*/ ++struct joinbss_event { ++ struct wlan_network network; ++}; ++ ++/* ++Used to report a given STA has joinned the created BSS. ++It is used in AP/Ad-HoC(M) mode. ++ ++ ++*/ ++struct stassoc_event { ++ unsigned char macaddr[6]; ++ unsigned char rsvd[2]; ++ int cam_id; ++ ++}; ++ ++struct stadel_event { ++ unsigned char macaddr[6]; ++ unsigned char rsvd[2]; ++}; ++ ++struct addba_event ++{ ++ unsigned int tid; ++}; ++ ++ ++#ifdef CONFIG_H2CLBK ++struct c2hlbk_event{ ++ unsigned char mac[6]; ++ unsigned short s0; ++ unsigned short s1; ++ unsigned int w0; ++ unsigned char b0; ++ unsigned short s2; ++ unsigned char b1; ++ unsigned int w1; ++}; ++#endif//CONFIG_H2CLBK ++ ++#define GEN_EVT_CODE(event) event ## _EVT_ ++ ++ ++ ++struct fwevent { ++ u32 parmsize; ++ void (*event_callback)(_adapter *dev, u8 *pbuf); ++}; ++ ++ ++#define C2HEVENT_SZ 32 ++ ++struct event_node{ ++ unsigned char *node; ++ unsigned char evt_code; ++ unsigned short evt_sz; ++ volatile int *caller_ff_tail; ++ int caller_ff_sz; ++}; ++ ++struct c2hevent_queue { ++ volatile int head; ++ volatile int tail; ++ struct event_node nodes[C2HEVENT_SZ]; ++ unsigned char seq; ++}; ++ ++#define NETWORK_QUEUE_SZ 4 ++ ++struct network_queue { ++ volatile int head; ++ volatile int tail; ++ WLAN_BSSID_EX networks[NETWORK_QUEUE_SZ]; ++}; ++ ++ ++#endif // _WLANEVENT_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ht.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ht.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,51 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_HT_H_ ++#define _RTW_HT_H_ ++ ++#include ++#include ++#include "wifi.h" ++ ++struct ht_priv ++{ ++ u32 ht_option; ++ u32 ampdu_enable;//for enable Tx A-MPDU ++ //u8 baddbareq_issued[16]; ++ u32 tx_amsdu_enable;//for enable Tx A-MSDU ++ u32 tx_amdsu_maxlen; // 1: 8k, 0:4k ; default:8k, for tx ++ u32 rx_ampdu_maxlen; //for rx reordering ctrl win_sz, updated when join_callback. ++ ++ u8 bwmode;// ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ ++ //for processing Tx A-MPDU ++ u8 agg_enable_bitmap; ++ //u8 ADDBA_retry_count; ++ u8 candidate_tid_bitmap; ++ ++ struct rtw_ieee80211_ht_cap ht_cap; ++ ++}; ++ ++#endif //_RTL871X_HT_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_io.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_io.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,543 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_IO_H_ ++#define _RTW_IO_H_ ++ ++#include ++#include ++#include ++ ++#ifdef PLATFORM_LINUX ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++#include ++#else ++#include ++#endif ++#include ++//#include ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) ++#include ++#else ++#include ++#endif ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,35)) ++#define rtw_usb_buffer_alloc(dev, size, mem_flags, dma) usb_alloc_coherent((dev), (size), (mem_flags), (dma)) ++#define rtw_usb_buffer_free(dev, size, addr, dma) usb_free_coherent((dev), (size), (addr), (dma)) ++#else ++#define rtw_usb_buffer_alloc(dev, size, mem_flags, dma) usb_buffer_alloc((dev), (size), (mem_flags), (dma)) ++#define rtw_usb_buffer_free(dev, size, addr, dma) usb_buffer_free((dev), (size), (addr), (dma)) ++#endif ++ ++ ++#endif //CONFIG_USB_HCI ++ ++#endif //PLATFORM_LINUX ++ ++ ++#define NUM_IOREQ 8 ++ ++#ifdef PLATFORM_WINDOWS ++#define MAX_PROT_SZ 64 ++#endif ++#ifdef PLATFORM_LINUX ++#define MAX_PROT_SZ (64-16) ++#endif ++ ++#define _IOREADY 0 ++#define _IO_WAIT_COMPLETE 1 ++#define _IO_WAIT_RSP 2 ++ ++// IO COMMAND TYPE ++#define _IOSZ_MASK_ (0x7F) ++#define _IO_WRITE_ BIT(7) ++#define _IO_FIXED_ BIT(8) ++#define _IO_BURST_ BIT(9) ++#define _IO_BYTE_ BIT(10) ++#define _IO_HW_ BIT(11) ++#define _IO_WORD_ BIT(12) ++#define _IO_SYNC_ BIT(13) ++#define _IO_CMDMASK_ (0x1F80) ++ ++ ++/* ++ For prompt mode accessing, caller shall free io_req ++ Otherwise, io_handler will free io_req ++*/ ++ ++ ++ ++// IO STATUS TYPE ++#define _IO_ERR_ BIT(2) ++#define _IO_SUCCESS_ BIT(1) ++#define _IO_DONE_ BIT(0) ++ ++ ++#define IO_RD32 (_IO_SYNC_ | _IO_WORD_) ++#define IO_RD16 (_IO_SYNC_ | _IO_HW_) ++#define IO_RD8 (_IO_SYNC_ | _IO_BYTE_) ++ ++#define IO_RD32_ASYNC (_IO_WORD_) ++#define IO_RD16_ASYNC (_IO_HW_) ++#define IO_RD8_ASYNC (_IO_BYTE_) ++ ++#define IO_WR32 (_IO_WRITE_ | _IO_SYNC_ | _IO_WORD_) ++#define IO_WR16 (_IO_WRITE_ | _IO_SYNC_ | _IO_HW_) ++#define IO_WR8 (_IO_WRITE_ | _IO_SYNC_ | _IO_BYTE_) ++ ++#define IO_WR32_ASYNC (_IO_WRITE_ | _IO_WORD_) ++#define IO_WR16_ASYNC (_IO_WRITE_ | _IO_HW_) ++#define IO_WR8_ASYNC (_IO_WRITE_ | _IO_BYTE_) ++ ++/* ++ ++ Only Sync. burst accessing is provided. ++ ++*/ ++ ++#define IO_WR_BURST(x) (_IO_WRITE_ | _IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) ++#define IO_RD_BURST(x) (_IO_SYNC_ | _IO_BURST_ | ( (x) & _IOSZ_MASK_)) ++ ++ ++ ++//below is for the intf_option bit defition... ++ ++#define _INTF_ASYNC_ BIT(0) //support async io ++ ++struct intf_priv; ++struct intf_hdl; ++struct io_queue; ++ ++struct _io_ops { ++ ++ ++ uint (*_sdbus_read_bytes_to_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ uint (*_sdbus_read_blocks_to_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ void (*_attrib_read)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ u8 (*_read8)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ u16 (*_read16)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ u32 (*_read32)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ ++ uint (*_sdbus_write_blocks_from_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++ uint (*_sdbus_write_bytes_from_membuf)(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ u8 (*_cmd52r)(struct intf_priv *pintfpriv, u32 addr); ++ void (*_cmd52w)(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++ u8 (*_cmdfunc152r)(struct intf_priv *pintfpriv, u32 addr); ++ void (*_cmdfunc152w)(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++ ++ ++ void (*_attrib_write)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ ++ int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ ++ int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ ++ int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata); ++ ++ int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val); ++ ++ int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val); ++ ++ int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val); ++ ++ ++ void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ void (*_sync_irp_protocol_rw)(struct io_queue *pio_q); ++ ++ ++ u32 (*_read_interrupt)(struct intf_hdl *pintfhdl, u32 addr); ++ ++ u32 (*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ u32 (*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ int (*_write_port_sync)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem); ++ ++ u32 (*_write_scsi)(struct intf_hdl *pintfhdl,u32 cnt, u8 *pmem); ++ ++ ++ void (*_read_port_cancel)(struct intf_hdl *pintfhdl); ++ ++ void (*_write_port_cancel)(struct intf_hdl *pintfhdl); ++ ++}; ++ ++struct io_req { ++ _list list; ++ u32 addr; ++ volatile u32 val; ++ u32 command; ++ u32 status; ++ u8 *pbuf; ++ _sema sema; ++ ++#ifdef PLATFORM_OS_CE ++#ifdef CONFIG_USB_HCI ++ // URB handler for rtw_write_mem ++ USB_TRANSFER usb_transfer_write_mem; ++#endif ++#endif ++ ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt); ++ u8 *cnxt; ++ ++#ifdef PLATFORM_OS_XP ++ PMDL pmdl; ++ PIRP pirp; ++ ++#ifdef CONFIG_SDIO_HCI ++ PSDBUS_REQUEST_PACKET sdrp; ++#endif ++ ++#endif ++ ++ ++}; ++ ++struct intf_hdl { ++ ++/* ++ u32 intf_option; ++ u32 bus_status; ++ u32 do_flush; ++ u8 *adapter; ++ u8 *intf_dev; ++ struct intf_priv *pintfpriv; ++ u8 cnt; ++ void (*intf_hdl_init)(u8 *priv); ++ void (*intf_hdl_unload)(u8 *priv); ++ void (*intf_hdl_open)(u8 *priv); ++ void (*intf_hdl_close)(u8 *priv); ++ struct _io_ops io_ops; ++ //u8 intf_status;//moved to struct intf_priv ++ u16 len; ++ u16 done_len; ++*/ ++ _adapter *padapter; ++ struct dvobj_priv *pintf_dev;// pointer to &(padapter->dvobjpriv); ++ ++ struct _io_ops io_ops; ++ ++}; ++ ++struct reg_protocol_rd { ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ //DW1 ++ u32 NumOfTrans:4; ++ u32 Reserved1:4; ++ u32 Reserved2:24; ++ //DW2 ++ u32 ByteCount:7; ++ u32 WriteEnable:1; //0:read, 1:write ++ u32 FixOrContinuous:1; //0:continuous, 1: Fix ++ u32 BurstMode:1; ++ u32 Byte1Access:1; ++ u32 Byte2Access:1; ++ u32 Byte4Access:1; ++ u32 Reserved3:3; ++ u32 Reserved4:16; ++ //DW3 ++ u32 BusAddress; ++ //DW4 ++ //u32 Value; ++#else ++ ++ ++//DW1 ++ u32 Reserved1 :4; ++ u32 NumOfTrans :4; ++ ++ u32 Reserved2 :24; ++ ++ //DW2 ++ u32 WriteEnable : 1; ++ u32 ByteCount :7; ++ ++ ++ u32 Reserved3 : 3; ++ u32 Byte4Access : 1; ++ ++ u32 Byte2Access : 1; ++ u32 Byte1Access : 1; ++ u32 BurstMode :1 ; ++ u32 FixOrContinuous : 1; ++ ++ u32 Reserved4 : 16; ++ ++ //DW3 ++ u32 BusAddress; ++ ++ //DW4 ++ //u32 Value; ++ ++#endif ++ ++}; ++ ++ ++struct reg_protocol_wt { ++ ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ //DW1 ++ u32 NumOfTrans:4; ++ u32 Reserved1:4; ++ u32 Reserved2:24; ++ //DW2 ++ u32 ByteCount:7; ++ u32 WriteEnable:1; //0:read, 1:write ++ u32 FixOrContinuous:1; //0:continuous, 1: Fix ++ u32 BurstMode:1; ++ u32 Byte1Access:1; ++ u32 Byte2Access:1; ++ u32 Byte4Access:1; ++ u32 Reserved3:3; ++ u32 Reserved4:16; ++ //DW3 ++ u32 BusAddress; ++ //DW4 ++ u32 Value; ++ ++#else ++ //DW1 ++ u32 Reserved1 :4; ++ u32 NumOfTrans :4; ++ ++ u32 Reserved2 :24; ++ ++ //DW2 ++ u32 WriteEnable : 1; ++ u32 ByteCount :7; ++ ++ u32 Reserved3 : 3; ++ u32 Byte4Access : 1; ++ ++ u32 Byte2Access : 1; ++ u32 Byte1Access : 1; ++ u32 BurstMode :1 ; ++ u32 FixOrContinuous : 1; ++ ++ u32 Reserved4 : 16; ++ ++ //DW3 ++ u32 BusAddress; ++ ++ //DW4 ++ u32 Value; ++ ++#endif ++ ++}; ++ ++ ++ ++/* ++Below is the data structure used by _io_handler ++ ++*/ ++ ++struct io_queue { ++ _lock lock; ++ _list free_ioreqs; ++ _list pending; //The io_req list that will be served in the single protocol read/write. ++ _list processing; ++ u8 *free_ioreqs_buf; // 4-byte aligned ++ u8 *pallocated_free_ioreqs_buf; ++ struct intf_hdl intf; ++}; ++ ++struct io_priv{ ++ ++ _adapter *padapter; ++ ++ struct intf_hdl intf; ++ ++}; ++ ++extern uint ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); ++extern void sync_ioreq_enqueue(struct io_req *preq,struct io_queue *ioqueue); ++extern uint sync_ioreq_flush(_adapter *adapter, struct io_queue *ioqueue); ++ ++ ++extern uint free_ioreq(struct io_req *preq, struct io_queue *pio_queue); ++extern struct io_req *alloc_ioreq(struct io_queue *pio_q); ++ ++extern uint register_intf_hdl(u8 *dev, struct intf_hdl *pintfhdl); ++extern void unregister_intf_hdl(struct intf_hdl *pintfhdl); ++ ++extern void _rtw_attrib_read(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_attrib_write(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++extern u8 _rtw_read8(_adapter *adapter, u32 addr); ++extern u16 _rtw_read16(_adapter *adapter, u32 addr); ++extern u32 _rtw_read32(_adapter *adapter, u32 addr); ++extern void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_read_port_cancel(_adapter *adapter); ++ ++ ++extern int _rtw_write8(_adapter *adapter, u32 addr, u8 val); ++extern int _rtw_write16(_adapter *adapter, u32 addr, u16 val); ++extern int _rtw_write32(_adapter *adapter, u32 addr, u32 val); ++extern int _rtw_writeN(_adapter *adapter, u32 addr, u32 length, u8 *pdata); ++ ++extern int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val); ++extern int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val); ++extern int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val); ++ ++extern void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern int _rtw_write_port_sync(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void _rtw_write_port_cancel(_adapter *adapter); ++ ++#ifdef DBG_IO ++extern int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line); ++extern int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line); ++extern int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line); ++extern int dbg_rtw_writeN(_adapter *adapter, u32 addr ,u32 length , u8 *data, const char *caller, const int line); ++ ++#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) ++#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) ++#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) ++#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) ++ ++#define DBG_IO_WRITE_SNIFF_ADDR_START 0x24 //0x4c //0x4c // the starting address to sniff ++#define DBG_IO_WRITE_SNIFF_ADDR_END 0x27 //0x4c+ 1 // the ending address to sniff ++ ++#define rtw_write8(adapter, addr, val) dbg_rtw_write8((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_write16(adapter, addr, val) dbg_rtw_write16((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_write32(adapter, addr, val) dbg_rtw_write32((adapter), (addr), (val), __FUNCTION__, __LINE__) ++#define rtw_writeN(adapter, addr, length, data) dbg_rtw_writeN((adapter), (addr), (length), (data), __FUNCTION__, __LINE__) ++ ++#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) ++#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) ++#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) ++ ++#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), addr, cnt, mem) ++#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port(adapter, addr, cnt, mem) ++#define rtw_write_port_sync(adapter, addr, cnt, mem) _rtw_write_port_sync((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel(adapter) ++#else //DBG_IO ++#define rtw_read8(adapter, addr) _rtw_read8((adapter), (addr)) ++#define rtw_read16(adapter, addr) _rtw_read16((adapter), (addr)) ++#define rtw_read32(adapter, addr) _rtw_read32((adapter), (addr)) ++#define rtw_read_mem(adapter, addr, cnt, mem) _rtw_read_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port(adapter, addr, cnt, mem) _rtw_read_port((adapter), (addr), (cnt), (mem)) ++#define rtw_read_port_cancel(adapter) _rtw_read_port_cancel((adapter)) ++ ++#define rtw_write8(adapter, addr, val) _rtw_write8((adapter), (addr), (val)) ++#define rtw_write16(adapter, addr, val) _rtw_write16((adapter), (addr), (val)) ++#define rtw_write32(adapter, addr, val) _rtw_write32((adapter), (addr), (val)) ++#define rtw_writeN(adapter, addr, length, data) _rtw_writeN((adapter), (addr), (length), (data)) ++ ++#define rtw_write8_async(adapter, addr, val) _rtw_write8_async((adapter), (addr), (val)) ++#define rtw_write16_async(adapter, addr, val) _rtw_write16_async((adapter), (addr), (val)) ++#define rtw_write32_async(adapter, addr, val) _rtw_write32_async((adapter), (addr), (val)) ++ ++#define rtw_write_mem(adapter, addr, cnt, mem) _rtw_write_mem((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port(adapter, addr, cnt, mem) _rtw_write_port((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port_sync(adapter, addr, cnt, mem) _rtw_write_port_sync((adapter), (addr), (cnt), (mem)) ++#define rtw_write_port_cancel(adapter) _rtw_write_port_cancel((adapter)) ++#endif //DBG_IO ++ ++extern void rtw_write_scsi(_adapter *adapter, u32 cnt, u8 *pmem); ++ ++//ioreq ++extern void ioreq_read8(_adapter *adapter, u32 addr, u8 *pval); ++extern void ioreq_read16(_adapter *adapter, u32 addr, u16 *pval); ++extern void ioreq_read32(_adapter *adapter, u32 addr, u32 *pval); ++extern void ioreq_write8(_adapter *adapter, u32 addr, u8 val); ++extern void ioreq_write16(_adapter *adapter, u32 addr, u16 val); ++extern void ioreq_write32(_adapter *adapter, u32 addr, u32 val); ++ ++ ++extern uint async_read8(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern uint async_read16(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern uint async_read32(_adapter *adapter, u32 addr, u8 *pbuff, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++ ++extern void async_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void async_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++extern void async_write8(_adapter *adapter, u32 addr, u8 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern void async_write16(_adapter *adapter, u32 addr, u16 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++extern void async_write32(_adapter *adapter, u32 addr, u32 val, ++ void (*_async_io_callback)(_adapter *padater, struct io_req *pio_req, u8 *cnxt), u8 *cnxt); ++ ++extern void async_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++extern void async_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem); ++ ++ ++int rtw_init_io_priv(_adapter *padapter); ++ ++ ++extern uint alloc_io_queue(_adapter *adapter); ++extern void free_io_queue(_adapter *adapter); ++extern void async_bus_io(struct io_queue *pio_q); ++extern void bus_sync_io(struct io_queue *pio_q); ++extern u32 _ioreq2rwmem(struct io_queue *pio_q); ++extern void dev_power_down(_adapter * Adapter, u8 bpwrup); ++ ++/* ++#define RTL_R8(reg) rtw_read8(padapter, reg) ++#define RTL_R16(reg) rtw_read16(padapter, reg) ++#define RTL_R32(reg) rtw_read32(padapter, reg) ++#define RTL_W8(reg, val8) rtw_write8(padapter, reg, val8) ++#define RTL_W16(reg, val16) rtw_write16(padapter, reg, val16) ++#define RTL_W32(reg, val32) rtw_write32(padapter, reg, val32) ++*/ ++ ++/* ++#define RTL_W8_ASYNC(reg, val8) rtw_write32_async(padapter, reg, val8) ++#define RTL_W16_ASYNC(reg, val16) rtw_write32_async(padapter, reg, val16) ++#define RTL_W32_ASYNC(reg, val32) rtw_write32_async(padapter, reg, val32) ++ ++#define RTL_WRITE_BB(reg, val32) phy_SetUsbBBReg(padapter, reg, val32) ++#define RTL_READ_BB(reg) phy_QueryUsbBBReg(padapter, reg) ++*/ ++ ++#endif //_RTL8711_IO_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,271 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_IOCTL_H_ ++#define _RTW_IOCTL_H_ ++ ++#include ++#include ++#include ++ ++#ifndef OID_802_11_CAPABILITY ++ #define OID_802_11_CAPABILITY 0x0d010122 ++#endif ++ ++#ifndef OID_802_11_PMKID ++ #define OID_802_11_PMKID 0x0d010123 ++#endif ++ ++ ++// For DDK-defined OIDs ++#define OID_NDIS_SEG1 0x00010100 ++#define OID_NDIS_SEG2 0x00010200 ++#define OID_NDIS_SEG3 0x00020100 ++#define OID_NDIS_SEG4 0x01010100 ++#define OID_NDIS_SEG5 0x01020100 ++#define OID_NDIS_SEG6 0x01020200 ++#define OID_NDIS_SEG7 0xFD010100 ++#define OID_NDIS_SEG8 0x0D010100 ++#define OID_NDIS_SEG9 0x0D010200 ++#define OID_NDIS_SEG10 0x0D020200 ++ ++#define SZ_OID_NDIS_SEG1 23 ++#define SZ_OID_NDIS_SEG2 3 ++#define SZ_OID_NDIS_SEG3 6 ++#define SZ_OID_NDIS_SEG4 6 ++#define SZ_OID_NDIS_SEG5 4 ++#define SZ_OID_NDIS_SEG6 8 ++#define SZ_OID_NDIS_SEG7 7 ++#define SZ_OID_NDIS_SEG8 36 ++#define SZ_OID_NDIS_SEG9 24 ++#define SZ_OID_NDIS_SEG10 19 ++ ++// For Realtek-defined OIDs ++#define OID_MP_SEG1 0xFF871100 ++#define OID_MP_SEG2 0xFF818000 ++ ++#define OID_MP_SEG3 0xFF818700 ++#define OID_MP_SEG4 0xFF011100 ++ ++#define DEBUG_OID(dbg, str) \ ++ if((!dbg)) \ ++ { \ ++ RT_TRACE(_module_rtl871x_ioctl_c_,_drv_info_,("%s(%d): %s", __FUNCTION__, __LINE__, str)); \ ++ } ++ ++ ++enum oid_type ++{ ++ QUERY_OID, ++ SET_OID ++}; ++ ++struct oid_funs_node { ++ unsigned int oid_start; //the starting number for OID ++ unsigned int oid_end; //the ending number for OID ++ struct oid_obj_priv *node_array; ++ unsigned int array_sz; //the size of node_array ++ int query_counter; //count the number of query hits for this segment ++ int set_counter; //count the number of set hits for this segment ++}; ++ ++struct oid_par_priv ++{ ++ void *adapter_context; ++ NDIS_OID oid; ++ void* information_buf; ++ u32 information_buf_len; ++ u32* bytes_rw; ++ u32* bytes_needed; ++ enum oid_type type_of_oid; ++ u32 dbg; ++}; ++ ++struct oid_obj_priv { ++ unsigned char dbg; // 0: without OID debug message 1: with OID debug message ++ NDIS_STATUS (*oidfuns)(struct oid_par_priv *poid_par_priv); ++}; ++ ++#ifdef CONFIG_MP_INCLUDED ++static NDIS_STATUS oid_null_function(struct oid_par_priv* poid_par_priv) ++{ ++ _func_enter_; ++ _func_exit_; ++ return NDIS_STATUS_SUCCESS; ++} ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++int TranslateNdisPsToRtPs(IN NDIS_802_11_POWER_MODE ndisPsMode); ++ ++//OID Handler for Segment 1 ++NDIS_STATUS oid_gen_supported_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_hardware_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_in_use_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_lookahead_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_frame_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_link_speed_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_transmit_buffer_space_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_receive_buffer_space_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_transmit_block_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_receive_block_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_id_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_description_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_current_packet_filter_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_current_lookahead_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_driver_version_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_total_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_protocol_options_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_mac_options_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_media_connect_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_maximum_send_packets_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_vendor_driver_version_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 2 ++NDIS_STATUS oid_gen_physical_medium_hdl(struct oid_par_priv* poid_par_priv); ++ ++//OID Handler for Segment 3 ++NDIS_STATUS oid_gen_xmit_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_xmit_error_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_error_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_gen_rcv_no_buffer_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 4 ++NDIS_STATUS oid_802_3_permanent_address_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_current_address_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_multicast_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_maximum_list_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_mac_options_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 5 ++NDIS_STATUS oid_802_3_rcv_error_alignment_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_one_collision_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_more_collisions_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 6 ++NDIS_STATUS oid_802_3_xmit_deferred_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_max_collisions_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_rcv_overrun_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_underrun_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_heartbeat_failure_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_times_crs_lost_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_3_xmit_late_collisions_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 7 ++NDIS_STATUS oid_pnp_capabilities_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_set_power_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_query_power_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_add_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_remove_wake_up_pattern_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_wake_up_pattern_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_pnp_enable_wake_up_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++//OID Handler for Segment 8 ++NDIS_STATUS oid_802_11_bssid_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_ssid_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_infrastructure_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_add_wep_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_remove_wep_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_disassociate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_authentication_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_privacy_filter_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_bssid_list_scan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_encryption_status_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_reload_defaults_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_add_key_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_remove_key_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_association_information_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_media_stream_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_capability_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_pmkid_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++ ++ ++//OID Handler for Segment 9 ++NDIS_STATUS oid_802_11_network_types_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_network_type_in_use_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rssi_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rssi_trigger_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_fragmentation_threshold_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rts_threshold_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_number_of_antennas_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_rx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_tx_antenna_selected_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_supported_rates_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_desired_rates_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_configuration_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_power_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_802_11_bssid_list_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment 10 ++NDIS_STATUS oid_802_11_statistics_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//OID Handler for Segment ED ++NDIS_STATUS oid_rt_mh_vender_id_hdl(struct oid_par_priv* poid_par_priv); ++ ++void Set_802_3_MULTICAST_LIST(ADAPTER *pAdapter, UCHAR *MCListbuf, ULONG MCListlen, BOOLEAN bAcceptAllMulticast); ++ ++#endif// end of PLATFORM_WINDOWS ++ ++ ++#ifdef PLATFORM_LINUX ++ ++extern struct iw_handler_def rtw_handlers_def; ++ ++#endif ++ ++extern NDIS_STATUS drv_query_info( ++ IN _nic_hdl MiniportAdapterContext, ++ IN NDIS_OID Oid, ++ IN void * InformationBuffer, ++ IN u32 InformationBufferLength, ++ OUT u32* BytesWritten, ++ OUT u32* BytesNeeded ++ ); ++ ++extern NDIS_STATUS drv_set_info( ++ IN _nic_hdl MiniportAdapterContext, ++ IN NDIS_OID Oid, ++ IN void * InformationBuffer, ++ IN u32 InformationBufferLength, ++ OUT u32* BytesRead, ++ OUT u32* BytesNeeded ++ ); ++ ++#endif // #ifndef __INC_CEINFO_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_query.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_query.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,37 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_IOCTL_QUERY_H_ ++#define _RTW_IOCTL_QUERY_H_ ++ ++#include ++#include ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++u8 query_802_11_capability(_adapter* padapter,u8* pucBuf,u32 * pulOutLen); ++u8 query_802_11_association_information (_adapter * padapter, PNDIS_802_11_ASSOCIATION_INFORMATION pAssocInfo); ++ ++#endif ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_rtl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_rtl.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,84 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_IOCTL_RTL_H_ ++#define _RTW_IOCTL_RTL_H_ ++ ++#include ++#include ++#include ++ ++//************** oid_rtl_seg_01_01 ************** ++NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv* poid_par_priv);//84 ++NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv* poid_par_priv); //8a ++NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv* poid_par_priv); //8b ++ ++NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv* poid_par_priv);//93 ++NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv* poid_par_priv); ++ ++//************** oid_rtl_seg_01_03 section start ************** ++NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv* poid_par_priv); ++ ++// oid_rtl_seg_01_11 ++NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv* poid_par_priv); ++ ++//************** oid_rtl_seg_03_00 section start ************** ++NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++ ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_set.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_ioctl_set.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,78 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_IOCTL_SET_H_ ++#define __RTW_IOCTL_SET_H_ ++ ++#include ++#include ++ ++ ++typedef u8 NDIS_802_11_PMKID_VALUE[16]; ++ ++typedef struct _BSSIDInfo { ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ NDIS_802_11_PMKID_VALUE PMKID; ++} BSSIDInfo, *PBSSIDInfo; ++ ++ ++#ifdef PLATFORM_OS_XP ++typedef struct _NDIS_802_11_PMKID { ++ u32 Length; ++ u32 BSSIDInfoCount; ++ BSSIDInfo BSSIDInfo[1]; ++} NDIS_802_11_PMKID, *PNDIS_802_11_PMKID; ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++u8 rtw_set_802_11_reload_defaults(_adapter * padapter, NDIS_802_11_RELOAD_DEFAULTS reloadDefaults); ++u8 rtw_set_802_11_test(_adapter * padapter, NDIS_802_11_TEST * test); ++u8 rtw_set_802_11_pmkid(_adapter *pdapter, NDIS_802_11_PMKID *pmkid); ++ ++u8 rtw_pnp_set_power_sleep(_adapter* padapter); ++u8 rtw_pnp_set_power_wakeup(_adapter* padapter); ++ ++void rtw_pnp_resume_wk(void *context); ++void rtw_pnp_sleep_wk(void * context); ++ ++#endif ++ ++u8 rtw_set_802_11_add_key(_adapter * padapter, NDIS_802_11_KEY * key); ++u8 rtw_set_802_11_authentication_mode(_adapter *pdapter, NDIS_802_11_AUTHENTICATION_MODE authmode); ++u8 rtw_set_802_11_bssid(_adapter* padapter, u8 *bssid); ++u8 rtw_set_802_11_add_wep(_adapter * padapter, NDIS_802_11_WEP * wep); ++u8 rtw_set_802_11_disassociate(_adapter * padapter); ++u8 rtw_set_802_11_bssid_list_scan(_adapter* padapter); ++u8 rtw_set_802_11_infrastructure_mode(_adapter * padapter, NDIS_802_11_NETWORK_INFRASTRUCTURE networktype); ++u8 rtw_set_802_11_remove_wep(_adapter * padapter, u32 keyindex); ++u8 rtw_set_802_11_ssid(_adapter * padapter, NDIS_802_11_SSID * ssid); ++u8 rtw_set_802_11_remove_key(_adapter * padapter, NDIS_802_11_REMOVE_KEY * key); ++ ++ ++u8 rtw_validate_ssid(NDIS_802_11_SSID *ssid); ++ ++u16 rtw_get_network_max_rate(_adapter *adapter, WLAN_BSSID_EX *bss); ++int rtw_set_scan_mode(_adapter *adapter, RT_SCAN_TYPE scan_mode); ++int rtw_set_channel_plan(_adapter *adapter, u8 channel_plan); ++int rtw_set_country(_adapter *adapter, const char *country_code); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_iol.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_iol.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,89 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_IOL_H_ ++#define __RTW_IOL_H_ ++ ++#include ++#include ++#include ++ ++typedef struct _io_offload_cmd { ++ u8 rsvd0; ++ u8 cmd; ++ u16 address; ++ u32 value; ++} IO_OFFLOAD_CMD, IOL_CMD; ++ ++#define IOL_CMD_LLT 0x00 ++//#define IOL_CMD_R_EFUSE 0x01 ++#define IOL_CMD_WB_REG 0x02 ++#define IOL_CMD_WW_REG 0x03 ++#define IOL_CMD_WD_REG 0x04 ++//#define IOL_CMD_W_RF 0x05 ++#define IOL_CMD_DELAY_US 0x80 ++#define IOL_CMD_DELAY_MS 0x81 ++//#define IOL_CMD_DELAY_S 0x82 ++#define IOL_CMD_END 0x83 ++ ++/***************************************************** ++CMD Address Value ++(B1) (B2/B3:H/L addr) (B4:B7 : MSB:LSB) ++****************************************************** ++IOL_CMD_LLT - B7: PGBNDY ++//IOL_CMD_R_EFUSE - - ++IOL_CMD_WB_REG 0x0~0xFFFF B7 ++IOL_CMD_WW_REG 0x0~0xFFFF B6~B7 ++IOL_CMD_WD_REG 0x0~0xFFFF B4~B7 ++//IOL_CMD_W_RF RF Reg B5~B7 ++IOL_CMD_DELAY_US - B6~B7 ++IOL_CMD_DELAY_MS - B6~B7 ++//IOL_CMD_DELAY_S - B6~B7 ++IOL_CMD_END - - ++******************************************************/ ++ ++struct xmit_frame *rtw_IOL_accquire_xmit_frame(ADAPTER *adapter); ++int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len); ++int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary); ++int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value); ++int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value); ++int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value); ++int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us); ++int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms); ++int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame); ++int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms); ++int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms); ++int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms); ++ ++#ifdef DBG_IO ++int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line); ++int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line); ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) dbg_rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value), __FUNCTION__, __LINE__) ++#else ++#define rtw_IOL_append_WB_cmd(xmit_frame, addr, value) _rtw_IOL_append_WB_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WW_cmd(xmit_frame, addr, value) _rtw_IOL_append_WW_cmd((xmit_frame), (addr), (value)) ++#define rtw_IOL_append_WD_cmd(xmit_frame, addr, value) _rtw_IOL_append_WD_cmd((xmit_frame), (addr), (value)) ++#endif ++ ++bool rtw_IOL_applied(ADAPTER *adapter); ++ ++#endif //__RTW_IOL_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_led.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_led.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,214 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_LED_H_ ++#define __RTW_LED_H_ ++ ++#include ++#include ++#include ++ ++#define MSECS(t) (HZ * ((t) / 1000) + (HZ * ((t) % 1000)) / 1000) ++ ++typedef enum _LED_CTL_MODE{ ++ LED_CTL_POWER_ON = 1, ++ LED_CTL_LINK = 2, ++ LED_CTL_NO_LINK = 3, ++ LED_CTL_TX = 4, ++ LED_CTL_RX = 5, ++ LED_CTL_SITE_SURVEY = 6, ++ LED_CTL_POWER_OFF = 7, ++ LED_CTL_START_TO_LINK = 8, ++ LED_CTL_START_WPS = 9, ++ LED_CTL_STOP_WPS = 10, ++ LED_CTL_START_WPS_BOTTON = 11, //added for runtop ++ LED_CTL_STOP_WPS_FAIL = 12, //added for ALPHA ++ LED_CTL_STOP_WPS_FAIL_OVERLAP = 13, //added for BELKIN ++}LED_CTL_MODE; ++ ++ ++#ifdef CONFIG_USB_HCI ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++typedef enum _LED_STATE_871x{ ++ LED_UNKNOWN = 0, ++ LED_ON = 1, ++ LED_OFF = 2, ++ LED_BLINK_NORMAL = 3, ++ LED_BLINK_SLOWLY = 4, ++ LED_POWER_ON_BLINK = 5, ++ LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. ++ LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. ++ LED_BLINK_StartToBlink = 8,// Customzied for Sercomm Printer Server case ++ LED_BLINK_WPS = 9, // LED is blinkg during WPS communication ++ LED_TXRX_BLINK = 10, ++ LED_BLINK_WPS_STOP = 11, //for ALPHA ++ LED_BLINK_WPS_STOP_OVERLAP = 12, //for BELKIN ++}LED_STATE_871x; ++ ++#define IS_LED_WPS_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS \ ++ || ((PLED_871x)_LED_871x)->CurrLedState==LED_BLINK_WPS_STOP \ ++ || ((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress) ++ ++#define IS_LED_BLINKING(_LED_871x) (((PLED_871x)_LED_871x)->bLedWPSBlinkInProgress \ ++ ||((PLED_871x)_LED_871x)->bLedScanBlinkInProgress) ++ ++typedef enum _LED_PIN_871x{ ++ LED_PIN_GPIO0, ++ LED_PIN_LED0, ++ LED_PIN_LED1 ++}LED_PIN_871x; ++ ++typedef struct _LED_871x{ ++ _adapter *padapter; ++ LED_PIN_871x LedPin; // Identify how to implement this SW led. ++ LED_STATE_871x CurrLedState; // Current LED state. ++ u8 bLedOn; // true if LED is ON, false if LED is OFF. ++ ++ u8 bSWLedCtrl; ++ ++ u8 bLedBlinkInProgress; // true if it is blinking, false o.w.. ++ // ALPHA, added by chiyoko, 20090106 ++ u8 bLedNoLinkBlinkInProgress; ++ u8 bLedLinkBlinkInProgress; ++ u8 bLedStartToLinkBlinkInProgress; ++ u8 bLedScanBlinkInProgress; ++ u8 bLedWPSBlinkInProgress; ++ ++ u32 BlinkTimes; // Number of times to toggle led state for blinking. ++ LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. ++ ++ _timer BlinkTimer; // Timer object for led blinking. ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) ++ _workitem BlinkWorkItem; // Workitem used by BlinkTimer to manipulate H/W to blink LED. ++#endif ++} LED_871x, *PLED_871x; ++ ++ ++//================================================================================ ++// LED customization. ++//================================================================================ ++ ++typedef enum _LED_STRATEGY_871x{ ++ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. ++ SW_LED_MODE1, // 2 LEDs, through LED0 and LED1. For ALPHA. ++ SW_LED_MODE2, // SW control 1 LED via GPIO0, customized for AzWave 8187 minicard. ++ SW_LED_MODE3, // SW control 1 LED via GPIO0, customized for Sercomm Printer Server case. ++ SW_LED_MODE4, //for Edimax / Belkin ++ SW_LED_MODE5, //for Sercomm / Belkin ++ SW_LED_MODE6, //for 88CU minicard, porting from ce SW_LED_MODE7 ++ HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes, see MAC.CONFIG1 for details.) ++}LED_STRATEGY_871x, *PLED_STRATEGY_871x; ++#endif //CONFIG_USB_HCI ++ ++#ifdef CONFIG_PCI_HCI ++//================================================================================ ++// LED object. ++//================================================================================ ++ ++typedef enum _LED_STATE_871x{ ++ LED_UNKNOWN = 0, ++ LED_ON = 1, ++ LED_OFF = 2, ++ LED_BLINK_NORMAL = 3, ++ LED_BLINK_SLOWLY = 4, ++ LED_POWER_ON_BLINK = 5, ++ LED_SCAN_BLINK = 6, // LED is blinking during scanning period, the # of times to blink is depend on time for scanning. ++ LED_NO_LINK_BLINK = 7, // LED is blinking during no link state. ++ LED_BLINK_StartToBlink = 8, ++ LED_BLINK_TXRX = 9, ++ LED_BLINK_RUNTOP = 10, // Customized for RunTop ++ LED_BLINK_CAMEO = 11, ++}LED_STATE_871x; ++ ++typedef enum _LED_PIN_871x{ ++ LED_PIN_GPIO0, ++ LED_PIN_LED0, ++ LED_PIN_LED1, ++ LED_PIN_LED2 ++}LED_PIN_871x; ++ ++typedef struct _LED_871x{ ++ _adapter *padapter; ++ ++ LED_PIN_871x LedPin; // Identify how to implement this SW led. ++ ++ LED_STATE_871x CurrLedState; // Current LED state. ++ u8 bLedOn; // TRUE if LED is ON, FALSE if LED is OFF. ++ ++ u8 bLedBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. ++ u8 bLedWPSBlinkInProgress; // TRUE if it is blinking, FALSE o.w.. ++ ++ u8 bLedSlowBlinkInProgress;//added by vivi, for led new mode ++ u32 BlinkTimes; // Number of times to toggle led state for blinking. ++ LED_STATE_871x BlinkingLedState; // Next state for blinking, either LED_ON or LED_OFF are. ++ ++ _timer BlinkTimer; // Timer object for led blinking. ++} LED_871x, *PLED_871x; ++ ++ ++//================================================================================ ++// LED customization. ++//================================================================================ ++ ++typedef enum _LED_STRATEGY_871x{ ++ SW_LED_MODE0, // SW control 1 LED via GPIO0. It is default option. ++ SW_LED_MODE1, // SW control for PCI Express ++ SW_LED_MODE2, // SW control for Cameo. ++ SW_LED_MODE3, // SW contorl for RunTop. ++ SW_LED_MODE4, // SW control for Netcore ++ SW_LED_MODE5, //added by vivi, for led new mode, DLINK ++ SW_LED_MODE6, //added by vivi, for led new mode, PRONET ++ SW_LED_MODE7, //added by chiyokolin, for Lenovo, PCI Express Minicard Spec Rev.1.2 spec ++ SW_LED_MODE8, //added by chiyokolin, for QMI ++ SW_LED_MODE9, //added by chiyokolin, for BITLAND, PCI Express Minicard Spec Rev.1.1 ++ SW_LED_MODE10, //added by chiyokolin, for Edimax-ASUS ++ HW_LED, // HW control 2 LEDs, LED0 and LED1 (there are 4 different control modes) ++}LED_STRATEGY_871x, *PLED_STRATEGY_871x; ++ ++#define LED_CM8_BLINK_INTERVAL 500 //for QMI ++#endif //CONFIG_PCI_HCI ++ ++struct led_priv{ ++ /* add for led controll */ ++ LED_871x SwLed0; ++ LED_871x SwLed1; ++ LED_STRATEGY_871x LedStrategy; ++ u8 bRegUseLed; ++ void (*LedControlHandler)(_adapter *padapter, LED_CTL_MODE LedAction); ++ /* add for led controll */ ++}; ++ ++#ifdef CONFIG_SW_LED ++#define rtw_led_control(adapter, LedAction) \ ++ do { \ ++ if((adapter)->ledpriv.LedControlHandler) \ ++ (adapter)->ledpriv.LedControlHandler((adapter), (LedAction)); \ ++ } while(0) ++#else //CONFIG_SW_LED ++#define rtw_led_control(adapter, LedAction) ++#endif //CONFIG_SW_LED ++ ++extern void BlinkHandler(PLED_871x pLed); ++ ++#endif //__RTW_LED_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mlme.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,665 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_MLME_H_ ++#define __RTW_MLME_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#define MAX_BSS_CNT 64 ++//#define MAX_JOIN_TIMEOUT 2000 ++//#define MAX_JOIN_TIMEOUT 2500 ++#define MAX_JOIN_TIMEOUT 6500 ++ ++// Commented by Albert 20101105 ++// Increase the scanning timeout because of increasing the SURVEY_TO value. ++ ++#define SCANNING_TIMEOUT 8000 ++ ++#define SCAN_INTERVAL (30) // unit:2sec, 30*2=60sec ++ ++#ifdef PALTFORM_OS_WINCE ++#define SCANQUEUE_LIFETIME 12000000 // unit:us ++#else ++#define SCANQUEUE_LIFETIME 20 // unit:sec ++#endif ++ ++#define WIFI_NULL_STATE 0x00000000 ++#define WIFI_ASOC_STATE 0x00000001 // Under Linked state... ++#define WIFI_REASOC_STATE 0x00000002 ++#define WIFI_SLEEP_STATE 0x00000004 ++#define WIFI_STATION_STATE 0x00000008 ++#define WIFI_AP_STATE 0x00000010 ++#define WIFI_ADHOC_STATE 0x00000020 ++#define WIFI_ADHOC_MASTER_STATE 0x00000040 ++#define WIFI_UNDER_LINKING 0x00000080 ++//#define WIFI_UNDER_CMD 0x00000200 ++// ========== P2P Section Start =============== ++#define WIFI_P2P_LISTEN_STATE 0x00010000 ++#define WIFI_P2P_GROUP_FORMATION_STATE 0x00020000 ++// ========== P2P Section End =============== ++#define WIFI_SITE_MONITOR 0x00000800 //to indicate the station is under site surveying ++ ++#ifdef WDS ++#define WIFI_WDS 0x00001000 ++#define WIFI_WDS_RX_BEACON 0x00002000 // already rx WDS AP beacon ++#endif ++#ifdef AUTO_CONFIG ++#define WIFI_AUTOCONF 0x00004000 ++#define WIFI_AUTOCONF_IND 0x00008000 ++#endif ++ ++//#ifdef UNDER_MPTEST ++#define WIFI_MP_STATE 0x00010000 ++#define WIFI_MP_CTX_BACKGROUND 0x00020000 // in continous tx background ++#define WIFI_MP_CTX_ST 0x00040000 // in continous tx with single-tone ++#define WIFI_MP_CTX_BACKGROUND_PENDING 0x00080000 // pending in continous tx background due to out of skb ++#define WIFI_MP_CTX_CCK_HW 0x00100000 // in continous tx ++#define WIFI_MP_CTX_CCK_CS 0x00200000 // in continous tx with carrier suppression ++#define WIFI_MP_LPBK_STATE 0x00400000 ++//#endif ++ ++//#define _FW_UNDER_CMD WIFI_UNDER_CMD ++#define _FW_UNDER_LINKING WIFI_UNDER_LINKING ++#define _FW_LINKED WIFI_ASOC_STATE ++#define _FW_UNDER_SURVEY WIFI_SITE_MONITOR ++ ++enum dot11AuthAlgrthmNum { ++ dot11AuthAlgrthm_Open = 0, ++ dot11AuthAlgrthm_Shared, ++ dot11AuthAlgrthm_8021X, ++ dot11AuthAlgrthm_Auto, ++ dot11AuthAlgrthm_MaxNum ++}; ++ ++// Scan type including active and passive scan. ++typedef enum _RT_SCAN_TYPE ++{ ++ SCAN_PASSIVE, ++ SCAN_ACTIVE, ++ SCAN_MIX, ++}RT_SCAN_TYPE, *PRT_SCAN_TYPE; ++ ++/* ++ ++there are several "locks" in mlme_priv, ++since mlme_priv is a shared resource between many threads, ++like ISR/Call-Back functions, the OID handlers, and even timer functions. ++ ++ ++Each _queue has its own locks, already. ++Other items are protected by mlme_priv.lock. ++ ++To avoid possible dead lock, any thread trying to modifiying mlme_priv ++SHALL not lock up more than one locks at a time! ++ ++*/ ++ ++ ++#define traffic_threshold 10 ++#define traffic_scan_period 500 ++ ++struct sitesurvey_ctrl { ++ u64 last_tx_pkts; ++ uint last_rx_pkts; ++ sint traffic_busy; ++ _timer sitesurvey_ctrl_timer; ++}; ++ ++typedef struct _RT_LINK_DETECT_T{ ++ u32 NumTxOkInPeriod; ++ u32 NumRxOkInPeriod; ++ u32 NumRxUnicastOkInPeriod; ++ BOOLEAN bBusyTraffic; ++ BOOLEAN bTxBusyTraffic; ++ BOOLEAN bRxBusyTraffic; ++ BOOLEAN bHigherBusyTraffic; // For interrupt migration purpose. ++ BOOLEAN bHigherBusyRxTraffic; // We may disable Tx interrupt according as Rx traffic. ++}RT_LINK_DETECT_T, *PRT_LINK_DETECT_T; ++ ++struct profile_info { ++ u8 ssidlen; ++ u8 ssid[ WLAN_SSID_MAXLEN ]; ++ u8 peermac[ ETH_ALEN ]; ++}; ++ ++struct tx_invite_req_info{ ++ u8 token; ++ u8 ssid[ WLAN_SSID_MAXLEN ]; ++ u8 ssidlen; ++ u8 peer_operation_ch; ++}; ++ ++struct tx_invite_resp_info{ ++ u8 token; // Used to record the dialog token of p2p invitation request frame. ++}; ++ ++#ifdef CONFIG_WFD ++ ++struct wifi_display_info{ ++ u16 rtsp_ctrlport; // TCP port number at which the this WFD device listens for RTSP messages ++ u16 peer_rtsp_ctrlport; // TCP port number at which the peer WFD device listens for RTSP messages ++ // This filed should be filled when receiving the gropu negotiation request ++}; ++#endif //CONFIG_WFD ++ ++struct tx_provdisc_req_info{ ++ u16 wps_config_method_request; // Used when sending the provisioning request frame ++ u16 peer_channel_num[2]; // The channel number which the receiver stands. ++ NDIS_802_11_SSID ssid; ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 peerIFAddr[ ETH_ALEN ]; // Peer interface address ++ u8 benable; // This provision discovery request frame is trigger to send or not ++}; ++ ++struct rx_provdisc_req_info{ //When peer device issue prov_disc_req first, we should store the following informations ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 strconfig_method_desc_of_prov_disc_req[4]; // description for the config method located in the provisioning discovery request frame. ++ // The UI must know this information to know which config method the remote p2p device is requiring. ++}; ++ ++struct tx_nego_req_info{ ++ u16 peer_channel_num[2]; // The channel number which the receiver stands. ++ u8 peerDevAddr[ ETH_ALEN ]; // Peer device address ++ u8 benable; // This negoitation request frame is trigger to send or not ++}; ++ ++struct group_id_info{ ++ u8 go_device_addr[ ETH_ALEN ]; // The GO's device address of this P2P group ++ u8 ssid[ WLAN_SSID_MAXLEN ]; // The SSID of this P2P group ++}; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++struct cfg80211_wifidirect_info{ ++ _timer remain_on_ch_timer; ++ u8 restore_channel; ++ struct ieee80211_channel remain_on_ch_channel; ++ enum nl80211_channel_type remain_on_ch_type; ++ u64 remain_on_ch_cookie; ++ struct net_device *remain_on_ch_dev; ++ ++}; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++struct wifidirect_info{ ++ _adapter* padapter; ++ _timer find_phase_timer; ++ _timer restore_p2p_state_timer; ++ ++ // Used to do the scanning. After confirming the peer is availalble, the driver transmits the P2P frame to peer. ++ _timer pre_tx_scan_timer; ++ struct tx_provdisc_req_info tx_prov_disc_info; ++ struct rx_provdisc_req_info rx_prov_disc_info; ++ struct tx_invite_req_info invitereq_info; ++ struct profile_info profileinfo[ P2P_MAX_PERSISTENT_GROUP_NUM ]; // Store the profile information of persistent group ++ struct tx_invite_resp_info inviteresp_info; ++ struct tx_nego_req_info nego_req_info; ++ struct group_id_info groupid_info; // Store the group id information when doing the group negotiation handshake. ++#ifdef CONFIG_WFD ++ struct wifi_display_info wfd_info; ++#endif ++ enum P2P_ROLE role; ++ enum P2P_STATE pre_p2p_state; ++ enum P2P_STATE p2p_state; ++ u8 device_addr[ETH_ALEN]; // The device address should be the mac address of this device. ++ u8 interface_addr[ETH_ALEN]; ++ u8 social_chan[4]; ++ u8 listen_channel; ++ u8 operating_channel; ++ u8 listen_dwell; // This value should be between 1 and 3 ++ u8 support_rate[8]; ++ u8 p2p_wildcard_ssid[P2P_WILDCARD_SSID_LEN]; ++ u8 intent; // should only include the intent value. ++ u8 p2p_peer_interface_addr[ ETH_ALEN ]; ++ u8 peer_intent; // Included the intent value and tie breaker value. ++ u8 device_name[ WPS_MAX_DEVICE_NAME_LEN ]; // Device name for displaying on searching device screen ++ u8 device_name_len; ++ u8 profileindex; // Used to point to the index of profileinfo array ++ u8 peer_operating_ch; ++ u8 find_phase_state_exchange_cnt; ++ u16 device_password_id_for_nego; // The device password ID for group negotation ++ u8 negotiation_dialog_token; ++ u8 nego_ssid[ WLAN_SSID_MAXLEN ]; // SSID information for group negotitation ++ u8 nego_ssidlen; ++ u8 p2p_group_ssid[WLAN_SSID_MAXLEN]; ++ u8 p2p_group_ssid_len; ++ ++ enum P2P_WPSINFO ui_got_wps_info; // This field will store the WPS value (PIN value or PBC) that UI had got from the user. ++ u16 supported_wps_cm; // This field describes the WPS config method which this driver supported. ++ // The value should be the combination of config method defined in page104 of WPS v2.0 spec. ++ u8 channel_cnt; // This field is the count number for P2P Channel List attribute of group negotitation response frame. ++ u8 channel_list[13]; // This field will contain the channel number of P2P Channel List attribute of group negotitation response frame. ++ // We will use the channel_cnt and channel_list fields when constructing the group negotitation confirm frame. ++ u8 p2p_ps_enable; ++ enum P2P_PS p2p_ps; // indicate p2p ps state ++ u8 noa_index; // Identifies and instance of Notice of Absence timing. ++ u8 ctwindow; // Client traffic window. A period of time in TU after TBTT. ++ u8 opp_ps; // opportunistic power save. ++ u8 noa_num; // number of NoA descriptor in P2P IE. ++ u8 noa_count[P2P_MAX_NOA_NUM]; // Count for owner, Type of client. ++ u32 noa_duration[P2P_MAX_NOA_NUM]; // Max duration for owner, preferred or min acceptable duration for client. ++ u32 noa_interval[P2P_MAX_NOA_NUM]; // Length of interval for owner, preferred or max acceptable interval of client. ++ u32 noa_start_time[P2P_MAX_NOA_NUM]; // schedule expressed in terms of the lower 4 bytes of the TSF timer. ++}; ++ ++struct tdls_ss_record{ //signal strength record ++ u8 macaddr[ETH_ALEN]; ++ u8 signal_strength; ++ u8 is_tdls_sta; // _TRUE: direct link sta, _FALSE: else ++}; ++ ++struct tdls_info{ ++ u8 ap_prohibited; ++ uint setup_state; ++ u8 sta_cnt; ++ u8 sta_maximum; // 1:tdls sta is equal (NUM_STA-1), reach max direct link number; 0: else; ++ struct tdls_ss_record ss_record; ++ u8 cam_entry_to_write; //cam entry that is empty to write ++ u8 cam_entry_to_clear; //cam entry that is trying to clear, using in direct link teardown ++ u8 ch_sensing; ++ u8 cur_channel; ++ u8 candidate_ch; ++ u8 collect_pkt_num[MAX_CHANNEL_NUM]; ++ _lock cmd_lock; ++ _lock hdl_lock; ++ _lock timer_lock; ++ u8 watchdog_count; ++}; ++ ++struct mlme_priv { ++ ++ _lock lock; ++ sint fw_state; //shall we protect this variable? maybe not necessarily... ++ ++ u8 to_join; //flag ++ #ifdef CONFIG_LAYER2_ROAMING ++ u8 to_roaming; // roaming trying times ++ #endif ++ ++ u8 *nic_hdl; ++ ++ _list *pscanned; ++ _queue free_bss_pool; ++ _queue scanned_queue; ++ u8 *free_bss_buf; ++ u32 num_of_scanned; ++ ++ NDIS_802_11_SSID assoc_ssid; ++ u8 assoc_bssid[6]; ++ ++ struct wlan_network cur_network; ++ ++ //uint wireless_mode; no used, remove it ++ ++ u32 scan_interval; ++ ++ _timer assoc_timer; ++ ++ uint assoc_by_bssid; ++ ++ _timer scan_to_timer; // driver itself handles scan_timeout status. ++ u32 scan_start_time; // used to evaluate the time spent in scanning ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _timer set_scan_deny_timer; ++ ATOMIC_T set_scan_deny; //0: allowed, 1: deny ++ #endif ++ ++ struct qos_priv qospriv; ++ ++#ifdef CONFIG_80211N_HT ++ ++ /* Number of non-HT AP/stations */ ++ int num_sta_no_ht; ++ ++ /* Number of HT AP/stations 20 MHz */ ++ //int num_sta_ht_20mhz; ++ ++ ++ int num_FortyMHzIntolerant; ++ ++ struct ht_priv htpriv; ++ ++#endif ++ ++ RT_LINK_DETECT_T LinkDetectInfo; ++ _timer dynamic_chk_timer; //dynamic/periodic check timer ++ ++ u8 key_mask; //use for ips to set wep key after ips_leave ++ u8 acm_mask; // for wmm acm mask ++ u8 ChannelPlan; ++ RT_SCAN_TYPE scan_mode; // active: 1, passive: 0 ++ ++ //u8 probereq_wpsie[MAX_WPS_IE_LEN];//added in probe req ++ //int probereq_wpsie_len; ++ u8 *wps_probe_req_ie; ++ u32 wps_probe_req_ie_len; ++ ++#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ /* Number of associated Non-ERP stations (i.e., stations using 802.11b ++ * in 802.11g BSS) */ ++ int num_sta_non_erp; ++ ++ /* Number of associated stations that do not support Short Slot Time */ ++ int num_sta_no_short_slot_time; ++ ++ /* Number of associated stations that do not support Short Preamble */ ++ int num_sta_no_short_preamble; ++ ++ int olbc; /* Overlapping Legacy BSS Condition */ ++ ++ /* Number of HT associated stations that do not support greenfield */ ++ int num_sta_ht_no_gf; ++ ++ /* Number of associated non-HT stations */ ++ //int num_sta_no_ht; ++ ++ /* Number of HT associated stations 20 MHz */ ++ int num_sta_ht_20mhz; ++ ++ /* Overlapping BSS information */ ++ int olbc_ht; ++ ++#ifdef CONFIG_80211N_HT ++ u16 ht_op_mode; ++#endif /* CONFIG_80211N_HT */ ++ ++ u8 *wps_beacon_ie; ++ //u8 *wps_probe_req_ie; ++ u8 *wps_probe_resp_ie; ++ u8 *wps_assoc_resp_ie; // for CONFIG_IOCTL_CFG80211, this IE could include p2p ie ++ ++ u32 wps_beacon_ie_len; ++ //u32 wps_probe_req_ie_len; ++ u32 wps_probe_resp_ie_len; ++ u32 wps_assoc_resp_ie_len; ++ ++ u8 *p2p_beacon_ie; ++ u8 *p2p_probe_req_ie; ++ u8 *p2p_probe_resp_ie; ++ u8 *p2p_go_probe_resp_ie; //for GO ++ u8 *p2p_assoc_req_ie; ++ ++ u32 p2p_beacon_ie_len; ++ u32 p2p_probe_req_ie_len; ++ u32 p2p_probe_resp_ie_len; ++ u32 p2p_go_probe_resp_ie_len; //for GO ++ u32 p2p_assoc_req_ie_len; ++/* ++#if defined(CONFIG_P2P) && defined(CONFIG_IOCTL_CFG80211) ++ //u8 *wps_p2p_beacon_ie; ++ u8 *p2p_beacon_ie; ++ u8 *wps_p2p_probe_resp_ie; ++ u8 *wps_p2p_assoc_resp_ie; ++ //u32 wps_p2p_beacon_ie_len; ++ u32 p2p_beacon_ie_len; ++ u32 wps_p2p_probe_resp_ie_len; ++ u32 wps_p2p_assoc_resp_ie_len; ++#endif ++*/ ++ ++ _lock bcn_update_lock; ++ u8 update_bcn; ++ ++ ++#endif //#if defined (CONFIG_AP_MODE) && defined (CONFIG_NATIVEAP_MLME) ++ ++#ifdef RTK_DMP_PLATFORM ++ // DMP kobject_hotplug function signal need in passive level ++ _workitem Linkup_workitem; ++ _workitem Linkdown_workitem; ++#endif ++ ++}; ++ ++#ifdef CONFIG_AP_MODE ++ ++struct hostapd_priv ++{ ++ _adapter *padapter; ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ struct net_device *pmgnt_netdev; ++ struct usb_anchor anchored; ++#endif ++ ++}; ++ ++extern int hostapd_mode_init(_adapter *padapter); ++extern void hostapd_mode_unload(_adapter *padapter); ++#endif ++ ++ ++extern void rtw_joinbss_event_prehandle(_adapter *adapter, u8 *pbuf); ++extern void rtw_survey_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_surveydone_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_joinbss_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_stassoc_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_stadel_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_atimdone_event_callback(_adapter *adapter, u8 *pbuf); ++extern void rtw_cpwm_event_callback(_adapter *adapter, u8 *pbuf); ++ ++#ifdef PLATFORM_WINDOWS ++extern thread_return event_thread(void *context); ++ ++extern void rtw_join_timeout_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++ ++extern void _rtw_scan_timeout_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++extern int event_thread(void *context); ++extern void rtw_join_timeout_handler(void* FunctionContext); ++extern void _rtw_scan_timeout_handler(void* FunctionContext); ++#endif ++ ++extern void rtw_free_network_queue(_adapter *adapter,u8 isfreeall); ++extern int rtw_init_mlme_priv(_adapter *adapter);// (struct mlme_priv *pmlmepriv); ++ ++extern void rtw_free_mlme_priv (struct mlme_priv *pmlmepriv); ++ ++ ++extern sint rtw_select_and_join_from_scanned_queue(struct mlme_priv *pmlmepriv); ++extern sint rtw_set_key(_adapter *adapter,struct security_priv *psecuritypriv,sint keyid, u8 set_tx); ++extern sint rtw_set_auth(_adapter *adapter,struct security_priv *psecuritypriv); ++ ++__inline static u8 *get_bssid(struct mlme_priv *pmlmepriv) ++{ //if sta_mode:pmlmepriv->cur_network.network.MacAddress=> bssid ++ // if adhoc_mode:pmlmepriv->cur_network.network.MacAddress=> ibss mac address ++ return pmlmepriv->cur_network.network.MacAddress; ++} ++ ++__inline static sint check_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ if (pmlmepriv->fw_state & state) ++ return _TRUE; ++ ++ return _FALSE; ++} ++ ++__inline static sint get_fwstate(struct mlme_priv *pmlmepriv) ++{ ++ return pmlmepriv->fw_state; ++} ++ ++/* ++ * No Limit on the calling context, ++ * therefore set it to be the critical section... ++ * ++ * ### NOTE:#### (!!!!) ++ * MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock ++ */ ++__inline static void set_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ pmlmepriv->fw_state |= state; ++} ++ ++__inline static void _clr_fwstate_(struct mlme_priv *pmlmepriv, sint state) ++{ ++ pmlmepriv->fw_state &= ~state; ++} ++ ++/* ++ * No Limit on the calling context, ++ * therefore set it to be the critical section... ++ */ ++__inline static void clr_fwstate(struct mlme_priv *pmlmepriv, sint state) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ if (check_fwstate(pmlmepriv, state) == _TRUE) ++ pmlmepriv->fw_state ^= state; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void clr_fwstate_ex(struct mlme_priv *pmlmepriv, sint state) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _clr_fwstate_(pmlmepriv, state); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void up_scanned_network(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned++; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void down_scanned_network(struct mlme_priv *pmlmepriv) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned--; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++__inline static void set_scanned_network_val(struct mlme_priv *pmlmepriv, sint val) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ pmlmepriv->num_of_scanned = val; ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++} ++ ++extern u16 rtw_get_capability(WLAN_BSSID_EX *bss); ++extern void rtw_update_scanned_network(_adapter *adapter, WLAN_BSSID_EX *target); ++extern void rtw_disconnect_hdl_under_linked(_adapter* adapter, struct sta_info *psta, u8 free_assoc); ++extern void rtw_generate_random_ibss(u8 *pibss); ++extern struct wlan_network* rtw_find_network(_queue *scanned_queue, u8 *addr); ++extern struct wlan_network* rtw_get_oldest_wlan_network(_queue *scanned_queue); ++ ++extern void rtw_free_assoc_resources(_adapter* adapter, int lock_scanned_queue); ++extern void rtw_indicate_disconnect(_adapter* adapter); ++extern void rtw_indicate_connect(_adapter* adapter); ++void rtw_indicate_scan_done( _adapter *padapter, bool aborted); ++ ++extern int rtw_restruct_sec_ie(_adapter *adapter,u8 *in_ie,u8 *out_ie,uint in_len); ++extern int rtw_restruct_wmm_ie(_adapter *adapter, u8 *in_ie, u8 *out_ie, uint in_len, uint initial_out_len); ++extern void rtw_init_registrypriv_dev_network(_adapter *adapter); ++ ++extern void rtw_update_registrypriv_dev_network(_adapter *adapter); ++ ++extern void rtw_get_encrypt_decrypt_from_registrypriv(_adapter *adapter); ++ ++extern void _rtw_join_timeout_handler(_adapter *adapter); ++extern void rtw_scan_timeout_handler(_adapter *adapter); ++ ++extern void rtw_dynamic_check_timer_handlder(_adapter *adapter); ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++extern void rtw_set_scan_deny_timer_hdl(_adapter *adapter); ++void rtw_set_scan_deny(struct mlme_priv *mlmepriv, u32 ms); ++#endif ++ ++ ++extern int _rtw_init_mlme_priv(_adapter *padapter); ++ ++void rtw_free_mlme_priv_ie_data(struct mlme_priv *pmlmepriv); ++ ++extern void _rtw_free_mlme_priv(struct mlme_priv *pmlmepriv); ++ ++extern int _rtw_enqueue_network(_queue *queue, struct wlan_network *pnetwork); ++ ++extern struct wlan_network* _rtw_dequeue_network(_queue *queue); ++ ++extern struct wlan_network* _rtw_alloc_network(struct mlme_priv *pmlmepriv); ++ ++ ++extern void _rtw_free_network(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork, u8 isfreeall); ++extern void _rtw_free_network_nolock(struct mlme_priv *pmlmepriv, struct wlan_network *pnetwork); ++ ++ ++extern struct wlan_network* _rtw_find_network(_queue *scanned_queue, u8 *addr); ++ ++extern void _rtw_free_network_queue(_adapter* padapter, u8 isfreeall); ++ ++extern sint rtw_if_up(_adapter *padapter); ++ ++ ++u8 *rtw_get_capability_from_ie(u8 *ie); ++u8 *rtw_get_timestampe_from_ie(u8 *ie); ++u8 *rtw_get_beacon_interval_from_ie(u8 *ie); ++ ++ ++void rtw_joinbss_reset(_adapter *padapter); ++ ++#ifdef CONFIG_80211N_HT ++unsigned int rtw_restructure_ht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len); ++void rtw_update_ht_cap(_adapter *padapter, u8 *pie, uint ie_len); ++void rtw_issue_addbareq_cmd(_adapter *padapter, struct xmit_frame *pxmitframe); ++#endif ++ ++int rtw_is_same_ibss(_adapter *adapter, struct wlan_network *pnetwork); ++ ++#ifdef CONFIG_LAYER2_ROAMING ++void rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network); ++void _rtw_roaming(_adapter *padapter, struct wlan_network *tgt_network); ++#endif ++ ++ ++#ifdef CONFIG_INTEL_PROXIM ++void rtw_proxim_enable(_adapter *padapter); ++void rtw_proxim_disable(_adapter *padapter); ++void rtw_proxim_send_packet(_adapter *padapter,u8 *pbuf,u16 len,u8 hw_rate); ++#endif //CONFIG_INTEL_PROXIM ++#endif //__RTL871X_MLME_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mlme_ext.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mlme_ext.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,878 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_MLME_EXT_H_ ++#define __RTW_MLME_EXT_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++// Commented by Albert 20101105 ++// Increase the SURVEY_TO value from 100 to 150 ( 100ms to 150ms ) ++// The Realtek 8188CE SoftAP will spend around 100ms to send the probe response after receiving the probe request. ++// So, this driver tried to extend the dwell time for each scanning channel. ++// This will increase the chance to receive the probe response from SoftAP. ++ ++#define SURVEY_TO (100) ++#define REAUTH_TO (300) //(50) ++#define REASSOC_TO (300) //(50) ++//#define DISCONNECT_TO (3000) ++#define ADDBA_TO (2000) ++ ++#define LINKED_TO (1) //unit:2 sec, 1x2=2 sec ++ ++#define REAUTH_LIMIT (2) ++#define REASSOC_LIMIT (2) ++#define READDBA_LIMIT (2) ++ ++//#define IOCMD_REG0 0x10250370 ++//#define IOCMD_REG1 0x10250374 ++//#define IOCMD_REG2 0x10250378 ++ ++//#define FW_DYNAMIC_FUN_SWITCH 0x10250364 ++ ++//#define WRITE_BB_CMD 0xF0000001 ++//#define SET_CHANNEL_CMD 0xF3000000 ++//#define UPDATE_RA_CMD 0xFD0000A2 ++ ++#define DYNAMIC_FUNC_DISABLE (0x0) ++#define DYNAMIC_FUNC_DIG BIT(0) ++#define DYNAMIC_FUNC_HP BIT(1) ++#define DYNAMIC_FUNC_SS BIT(2) //Tx Power Tracking ++#define DYNAMIC_FUNC_BT BIT(3) ++#define DYNAMIC_FUNC_ANT_DIV BIT(4) ++ ++#define _HW_STATE_NOLINK_ 0x00 ++#define _HW_STATE_ADHOC_ 0x01 ++#define _HW_STATE_STATION_ 0x02 ++#define _HW_STATE_AP_ 0x03 ++ ++ ++#define _1M_RATE_ 0 ++#define _2M_RATE_ 1 ++#define _5M_RATE_ 2 ++#define _11M_RATE_ 3 ++#define _6M_RATE_ 4 ++#define _9M_RATE_ 5 ++#define _12M_RATE_ 6 ++#define _18M_RATE_ 7 ++#define _24M_RATE_ 8 ++#define _36M_RATE_ 9 ++#define _48M_RATE_ 10 ++#define _54M_RATE_ 11 ++ ++ ++// ++// Channel Plan Type. ++// Note: ++// We just add new channel plan when the new channel plan is different from any of the following ++// channel plan. ++// If you just wnat to customize the acitions(scan period or join actions) about one of the channel plan, ++// customize them in RT_CHANNEL_INFO in the RT_CHANNEL_LIST. ++// ++typedef enum _RT_CHANNEL_DOMAIN ++{ ++ //===== old channel plan mapping =====// ++ RT_CHANNEL_DOMAIN_FCC = 0x00, ++ RT_CHANNEL_DOMAIN_IC = 0x01, ++ RT_CHANNEL_DOMAIN_ETSI = 0x02, ++ RT_CHANNEL_DOMAIN_SPAIN = 0x03, ++ RT_CHANNEL_DOMAIN_FRANCE = 0x04, ++ RT_CHANNEL_DOMAIN_MKK = 0x05, ++ RT_CHANNEL_DOMAIN_MKK1 = 0x06, ++ RT_CHANNEL_DOMAIN_ISRAEL = 0x07, ++ RT_CHANNEL_DOMAIN_TELEC = 0x08, ++ RT_CHANNEL_DOMAIN_GLOBAL_DOAMIN = 0x09, ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_13 = 0x0A, ++ RT_CHANNEL_DOMAIN_TAIWAN = 0x0B, ++ RT_CHANNEL_DOMAIN_CHINA = 0x0C, ++ RT_CHANNEL_DOMAIN_SINGAPORE_INDIA_MEXICO = 0x0D, ++ RT_CHANNEL_DOMAIN_KOREA = 0x0E, ++ RT_CHANNEL_DOMAIN_TURKEY = 0x0F, ++ RT_CHANNEL_DOMAIN_JAPAN = 0x10, ++ RT_CHANNEL_DOMAIN_FCC_NO_DFS = 0x11, ++ RT_CHANNEL_DOMAIN_JAPAN_NO_DFS = 0x12, ++ RT_CHANNEL_DOMAIN_WORLD_WIDE_5G = 0x13, ++ RT_CHANNEL_DOMAIN_TAIWAN_NO_DFS = 0x14, ++ ++ //===== new channel plan mapping, (2GDOMAIN_5GDOMAIN) =====// ++ RT_CHANNEL_DOMAIN_WORLD_NULL = 0x20, ++ RT_CHANNEL_DOMAIN_ETSI1_NULL = 0x21, ++ RT_CHANNEL_DOMAIN_FCC1_NULL = 0x22, ++ RT_CHANNEL_DOMAIN_MKK1_NULL = 0x23, ++ RT_CHANNEL_DOMAIN_ETSI2_NULL = 0x24, ++ RT_CHANNEL_DOMAIN_FCC1_FCC1 = 0x25, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI1 = 0x26, ++ RT_CHANNEL_DOMAIN_MKK1_MKK1 = 0x27, ++ RT_CHANNEL_DOMAIN_WORLD_KCC1 = 0x28, ++ RT_CHANNEL_DOMAIN_WORLD_FCC2 = 0x29, ++ RT_CHANNEL_DOMAIN_WORLD_FCC3 = 0x30, ++ RT_CHANNEL_DOMAIN_WORLD_FCC4 = 0x31, ++ RT_CHANNEL_DOMAIN_WORLD_FCC5 = 0x32, ++ RT_CHANNEL_DOMAIN_WORLD_FCC6 = 0x33, ++ RT_CHANNEL_DOMAIN_FCC1_FCC7 = 0x34, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI2 = 0x35, ++ RT_CHANNEL_DOMAIN_WORLD_ETSI3 = 0x36, ++ RT_CHANNEL_DOMAIN_MKK1_MKK2 = 0x37, ++ RT_CHANNEL_DOMAIN_MKK1_MKK3 = 0x38, ++ RT_CHANNEL_DOMAIN_FCC1_NCC1 = 0x39, ++ RT_CHANNEL_DOMAIN_FCC1_NCC2 = 0x40, ++ ++ //===== Add new channel plan above this line===============// ++ RT_CHANNEL_DOMAIN_MAX, ++ RT_CHANNEL_DOMAIN_REALTEK_DEFINE = 0x7F, ++}RT_CHANNEL_DOMAIN, *PRT_CHANNEL_DOMAIN; ++ ++typedef enum _RT_CHANNEL_DOMAIN_2G ++{ ++ RT_CHANNEL_DOMAIN_2G_WORLD = 0x00, //Worldwird 13 ++ RT_CHANNEL_DOMAIN_2G_ETSI1 = 0x01, //Europe ++ RT_CHANNEL_DOMAIN_2G_FCC1 = 0x02, //US ++ RT_CHANNEL_DOMAIN_2G_MKK1 = 0x03, //Japan ++ RT_CHANNEL_DOMAIN_2G_ETSI2 = 0x04, //France ++ //===== Add new channel plan above this line===============// ++ RT_CHANNEL_DOMAIN_2G_MAX, ++}RT_CHANNEL_DOMAIN_2G, *PRT_CHANNEL_DOMAIN_2G; ++ ++typedef enum _RT_CHANNEL_DOMAIN_5G ++{ ++ RT_CHANNEL_DOMAIN_5G_NULL = 0x00, ++ RT_CHANNEL_DOMAIN_5G_ETSI1 = 0x01, //Europe ++ RT_CHANNEL_DOMAIN_5G_ETSI2 = 0x02, //Australia, New Zealand ++ RT_CHANNEL_DOMAIN_5G_ETSI3 = 0x03, //Russia ++ RT_CHANNEL_DOMAIN_5G_FCC1 = 0x04, //US ++ RT_CHANNEL_DOMAIN_5G_FCC2 = 0x05, //FCC o/w DFS Channels ++ RT_CHANNEL_DOMAIN_5G_FCC3 = 0x06, //India, Mexico ++ RT_CHANNEL_DOMAIN_5G_FCC4 = 0x07, //Venezuela ++ RT_CHANNEL_DOMAIN_5G_FCC5 = 0x08, //China ++ RT_CHANNEL_DOMAIN_5G_FCC6 = 0x09, //Israel ++ RT_CHANNEL_DOMAIN_5G_FCC7_IC1 = 0x0A, //US, Canada ++ RT_CHANNEL_DOMAIN_5G_KCC1 = 0x0B, //Korea ++ RT_CHANNEL_DOMAIN_5G_MKK1 = 0x0C, //Japan ++ RT_CHANNEL_DOMAIN_5G_MKK2 = 0x0D, //Japan (W52, W53) ++ RT_CHANNEL_DOMAIN_5G_MKK3 = 0x0E, //Japan (W56) ++ RT_CHANNEL_DOMAIN_5G_NCC1 = 0x0F, //Taiwan ++ RT_CHANNEL_DOMAIN_5G_NCC2 = 0x10, //Taiwan o/w DFS ++ //===== Add new channel plan above this line===============// ++ //===== Driver Self Defined =====// ++ RT_CHANNEL_DOMAIN_5G_FCC = 0x11, ++ RT_CHANNEL_DOMAIN_5G_JAPAN_NO_DFS = 0x12, ++ RT_CHANNEL_DOMAIN_5G_MAX, ++}RT_CHANNEL_DOMAIN_5G, *PRT_CHANNEL_DOMAIN_5G; ++ ++#define rtw_is_channel_plan_valid(chplan) (chplan broadcast probe request ++// blnbc: 0 -> unicast probe request. The address 1 will be the BSSID. ++void issue_probereq(_adapter *padapter, NDIS_802_11_SSID *pssid, u8 blnbc); ++void issue_nulldata(_adapter *padapter, unsigned int power_mode); ++void issue_qos_nulldata(_adapter *padapter, unsigned char *da, u16 tid); ++void issue_deauth(_adapter *padapter, unsigned char *da, unsigned short reason); ++void issue_action_BA(_adapter *padapter, unsigned char *raddr, unsigned char action, unsigned short status); ++unsigned int send_delba(_adapter *padapter, u8 initiator, u8 *addr); ++unsigned int send_beacon(_adapter *padapter); ++ ++void start_clnt_assoc(_adapter *padapter); ++void start_clnt_auth(_adapter* padapter); ++void start_clnt_join(_adapter* padapter); ++void start_create_ibss(_adapter* padapter); ++ ++unsigned int OnAssocReq(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAssocRsp(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnProbeReq(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnProbeRsp(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int DoReserved(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnBeacon(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAtim(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnDisassoc(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAuth(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAuthClient(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnDeAuth(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction(_adapter *padapter, union recv_frame *precv_frame); ++ ++unsigned int OnAction_qos(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_dls(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_back(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_public(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_ht(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_wmm(_adapter *padapter, union recv_frame *precv_frame); ++unsigned int OnAction_p2p(_adapter *padapter, union recv_frame *precv_frame); ++ ++ ++void mlmeext_joinbss_event_callback(_adapter *padapter, int join_res); ++void mlmeext_sta_del_event_callback(_adapter *padapter); ++void mlmeext_sta_add_event_callback(_adapter *padapter, struct sta_info *psta); ++ ++void linked_status_chk(_adapter *padapter); ++ ++void survey_timer_hdl (_adapter *padapter); ++void link_timer_hdl (_adapter *padapter); ++void addba_timer_hdl(struct sta_info *psta); ++//void reauth_timer_hdl(_adapter *padapter); ++//void reassoc_timer_hdl(_adapter *padapter); ++ ++#define set_survey_timer(mlmeext, ms) \ ++ do { \ ++ /*DBG_871X("%s set_survey_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ ++ _set_timer(&(mlmeext)->survey_timer, (ms)); \ ++ } while(0) ++ ++#define set_link_timer(mlmeext, ms) \ ++ do { \ ++ /*DBG_871X("%s set_link_timer(%p, %d)\n", __FUNCTION__, (mlmeext), (ms));*/ \ ++ _set_timer(&(mlmeext)->link_timer, (ms)); \ ++ } while(0) ++ ++extern int cckrates_included(unsigned char *rate, int ratelen); ++extern int cckratesonly_included(unsigned char *rate, int ratelen); ++ ++extern void process_addba_req(_adapter *padapter, u8 *paddba_req, u8 *addr); ++ ++extern void update_TSF(struct mlme_ext_priv *pmlmeext, u8 *pframe, uint len); ++extern void correct_TSF(_adapter *padapter, struct mlme_ext_priv *pmlmeext); ++ ++#ifdef CONFIG_AP_MODE ++void init_mlme_ap_info(_adapter *padapter); ++void free_mlme_ap_info(_adapter *padapter); ++//void update_BCNTIM(_adapter *padapter); ++void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx); ++void expire_timeout_chk(_adapter *padapter); ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta); ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len); ++#ifdef CONFIG_NATIVEAP_MLME ++void bss_cap_update(_adapter *padapter, struct sta_info *psta); ++void sta_info_update(_adapter *padapter, struct sta_info *psta); ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta); ++void ap_free_sta(_adapter *padapter, struct sta_info *psta); ++int rtw_sta_flush(_adapter *padapter); ++void start_ap_mode(_adapter *padapter); ++void stop_ap_mode(_adapter *padapter); ++#endif ++#endif //end of CONFIG_AP_MODE ++ ++struct cmd_hdl { ++ uint parmsize; ++ u8 (*h2cfuns)(struct _ADAPTER *padapter, u8 *pbuf); ++}; ++ ++ ++u8 read_macreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_macreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 read_bbreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_bbreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 read_rfreg_hdl(_adapter *padapter, u8 *pbuf); ++u8 write_rfreg_hdl(_adapter *padapter, u8 *pbuf); ++ ++ ++u8 NULL_hdl(_adapter *padapter, u8 *pbuf); ++u8 join_cmd_hdl(_adapter *padapter, u8 *pbuf); ++u8 disconnect_hdl(_adapter *padapter, u8 *pbuf); ++u8 createbss_hdl(_adapter *padapter, u8 *pbuf); ++u8 setopmode_hdl(_adapter *padapter, u8 *pbuf); ++u8 sitesurvey_cmd_hdl(_adapter *padapter, u8 *pbuf); ++u8 setauth_hdl(_adapter *padapter, u8 *pbuf); ++u8 setkey_hdl(_adapter *padapter, u8 *pbuf); ++u8 set_stakey_hdl(_adapter *padapter, u8 *pbuf); ++u8 set_assocsta_hdl(_adapter *padapter, u8 *pbuf); ++u8 del_assocsta_hdl(_adapter *padapter, u8 *pbuf); ++u8 add_ba_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++u8 mlme_evt_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 h2c_msg_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 tx_beacon_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 set_chplan_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 led_blink_hdl(_adapter *padapter, unsigned char *pbuf); ++u8 set_csa_hdl(_adapter *padapter, unsigned char *pbuf); //Kurt: Handling DFS channel switch announcement ie. ++u8 tdls_hdl(_adapter *padapter, unsigned char *pbuf); ++ ++ ++#define GEN_DRV_CMD_HANDLER(size, cmd) {size, &cmd ## _hdl}, ++#define GEN_MLME_EXT_HANDLER(size, cmd) {size, cmd}, ++ ++#ifdef _RTW_CMD_C_ ++ ++struct cmd_hdl wlancmds[] = ++{ ++ GEN_DRV_CMD_HANDLER(0, NULL) /*0*/ ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_DRV_CMD_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*10*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct joinbss_parm), join_cmd_hdl) /*14*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct disconnect_parm), disconnect_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct createbss_parm), createbss_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setopmode_parm), setopmode_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct sitesurvey_parm), sitesurvey_cmd_hdl) /*18*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct setauth_parm), setauth_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setkey_parm), setkey_hdl) /*20*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct set_stakey_parm), set_stakey_hdl) ++ GEN_MLME_EXT_HANDLER(sizeof (struct set_assocsta_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct del_assocsta_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setstapwrstate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setbasicrate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getbasicrate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setdatarate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getdatarate_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct setphyinfo_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getphyinfo_parm), NULL) /*30*/ ++ GEN_MLME_EXT_HANDLER(sizeof (struct setphy_parm), NULL) ++ GEN_MLME_EXT_HANDLER(sizeof (struct getphy_parm), NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*40*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof(struct addBaReq_parm), add_ba_hdl) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) /*50*/ ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(0, NULL) ++ GEN_MLME_EXT_HANDLER(sizeof(struct Tx_Beacon_param), tx_beacon_hdl) /*55*/ ++ ++ GEN_MLME_EXT_HANDLER(0, mlme_evt_hdl) /*56*/ ++ GEN_MLME_EXT_HANDLER(0, rtw_drvextra_cmd_hdl) /*57*/ ++ ++ GEN_MLME_EXT_HANDLER(0, h2c_msg_hdl) /*58*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelPlan_param), set_chplan_hdl) /*59*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct LedBlink_param), led_blink_hdl) /*60*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct SetChannelSwitch_param), set_csa_hdl) /*61*/ ++ GEN_MLME_EXT_HANDLER(sizeof(struct TDLSoption_param), tdls_hdl) /*62*/ ++}; ++ ++#endif ++ ++struct C2HEvent_Header ++{ ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++ unsigned int len:16; ++ unsigned int ID:8; ++ unsigned int seq:8; ++ ++#elif defined(CONFIG_BIG_ENDIAN) ++ ++ unsigned int seq:8; ++ unsigned int ID:8; ++ unsigned int len:16; ++ ++#else ++ ++# error "Must be LITTLE or BIG Endian" ++ ++#endif ++ ++ unsigned int rsvd; ++ ++}; ++ ++void rtw_dummy_event_callback(_adapter *adapter , u8 *pbuf); ++void rtw_fwdbg_event_callback(_adapter *adapter , u8 *pbuf); ++ ++enum rtw_c2h_event ++{ ++ GEN_EVT_CODE(_Read_MACREG)=0, /*0*/ ++ GEN_EVT_CODE(_Read_BBREG), ++ GEN_EVT_CODE(_Read_RFREG), ++ GEN_EVT_CODE(_Read_EEPROM), ++ GEN_EVT_CODE(_Read_EFUSE), ++ GEN_EVT_CODE(_Read_CAM), /*5*/ ++ GEN_EVT_CODE(_Get_BasicRate), ++ GEN_EVT_CODE(_Get_DataRate), ++ GEN_EVT_CODE(_Survey), /*8*/ ++ GEN_EVT_CODE(_SurveyDone), /*9*/ ++ ++ GEN_EVT_CODE(_JoinBss) , /*10*/ ++ GEN_EVT_CODE(_AddSTA), ++ GEN_EVT_CODE(_DelSTA), ++ GEN_EVT_CODE(_AtimDone) , ++ GEN_EVT_CODE(_TX_Report), ++ GEN_EVT_CODE(_CCX_Report), /*15*/ ++ GEN_EVT_CODE(_DTM_Report), ++ GEN_EVT_CODE(_TX_Rate_Statistics), ++ GEN_EVT_CODE(_C2HLBK), ++ GEN_EVT_CODE(_FWDBG), ++ GEN_EVT_CODE(_C2HFEEDBACK), /*20*/ ++ GEN_EVT_CODE(_ADDBA), ++ GEN_EVT_CODE(_C2HBCN), ++ GEN_EVT_CODE(_ReportPwrState), //filen: only for PCIE, USB ++ GEN_EVT_CODE(_CloseRF), //filen: only for PCIE, work around ASPM ++ MAX_C2HEVT ++}; ++ ++ ++#ifdef _RTW_MLME_EXT_C_ ++ ++static struct fwevent wlanevents[] = ++{ ++ {0, rtw_dummy_event_callback}, /*0*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, &rtw_survey_event_callback}, /*8*/ ++ {sizeof (struct surveydone_event), &rtw_surveydone_event_callback}, /*9*/ ++ ++ {0, &rtw_joinbss_event_callback}, /*10*/ ++ {sizeof(struct stassoc_event), &rtw_stassoc_event_callback}, ++ {sizeof(struct stadel_event), &rtw_stadel_event_callback}, ++ {0, &rtw_atimdone_event_callback}, ++ {0, rtw_dummy_event_callback}, ++ {0, NULL}, /*15*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, NULL}, ++ {0, rtw_fwdbg_event_callback}, ++ {0, NULL}, /*20*/ ++ {0, NULL}, ++ {0, NULL}, ++ {0, &rtw_cpwm_event_callback}, ++}; ++ ++#endif//_RTL8192C_CMD_C_ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,708 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_MP_H_ ++#define _RTW_MP_H_ ++ ++#ifndef PLATFORM_WINDOWS ++// 00 - Success ++// 11 - Error ++#define STATUS_SUCCESS (0x00000000L) ++#define STATUS_PENDING (0x00000103L) ++ ++#define STATUS_UNSUCCESSFUL (0xC0000001L) ++#define STATUS_INSUFFICIENT_RESOURCES (0xC000009AL) ++#define STATUS_NOT_SUPPORTED (0xC00000BBL) ++ ++#define NDIS_STATUS_SUCCESS ((NDIS_STATUS)STATUS_SUCCESS) ++#define NDIS_STATUS_PENDING ((NDIS_STATUS)STATUS_PENDING) ++#define NDIS_STATUS_NOT_RECOGNIZED ((NDIS_STATUS)0x00010001L) ++#define NDIS_STATUS_NOT_COPIED ((NDIS_STATUS)0x00010002L) ++#define NDIS_STATUS_NOT_ACCEPTED ((NDIS_STATUS)0x00010003L) ++#define NDIS_STATUS_CALL_ACTIVE ((NDIS_STATUS)0x00010007L) ++ ++#define NDIS_STATUS_FAILURE ((NDIS_STATUS)STATUS_UNSUCCESSFUL) ++#define NDIS_STATUS_RESOURCES ((NDIS_STATUS)STATUS_INSUFFICIENT_RESOURCES) ++#define NDIS_STATUS_CLOSING ((NDIS_STATUS)0xC0010002L) ++#define NDIS_STATUS_BAD_VERSION ((NDIS_STATUS)0xC0010004L) ++#define NDIS_STATUS_BAD_CHARACTERISTICS ((NDIS_STATUS)0xC0010005L) ++#define NDIS_STATUS_ADAPTER_NOT_FOUND ((NDIS_STATUS)0xC0010006L) ++#define NDIS_STATUS_OPEN_FAILED ((NDIS_STATUS)0xC0010007L) ++#define NDIS_STATUS_DEVICE_FAILED ((NDIS_STATUS)0xC0010008L) ++#define NDIS_STATUS_MULTICAST_FULL ((NDIS_STATUS)0xC0010009L) ++#define NDIS_STATUS_MULTICAST_EXISTS ((NDIS_STATUS)0xC001000AL) ++#define NDIS_STATUS_MULTICAST_NOT_FOUND ((NDIS_STATUS)0xC001000BL) ++#define NDIS_STATUS_REQUEST_ABORTED ((NDIS_STATUS)0xC001000CL) ++#define NDIS_STATUS_RESET_IN_PROGRESS ((NDIS_STATUS)0xC001000DL) ++#define NDIS_STATUS_CLOSING_INDICATING ((NDIS_STATUS)0xC001000EL) ++#define NDIS_STATUS_NOT_SUPPORTED ((NDIS_STATUS)STATUS_NOT_SUPPORTED) ++#define NDIS_STATUS_INVALID_PACKET ((NDIS_STATUS)0xC001000FL) ++#define NDIS_STATUS_OPEN_LIST_FULL ((NDIS_STATUS)0xC0010010L) ++#define NDIS_STATUS_ADAPTER_NOT_READY ((NDIS_STATUS)0xC0010011L) ++#define NDIS_STATUS_ADAPTER_NOT_OPEN ((NDIS_STATUS)0xC0010012L) ++#define NDIS_STATUS_NOT_INDICATING ((NDIS_STATUS)0xC0010013L) ++#define NDIS_STATUS_INVALID_LENGTH ((NDIS_STATUS)0xC0010014L) ++#define NDIS_STATUS_INVALID_DATA ((NDIS_STATUS)0xC0010015L) ++#define NDIS_STATUS_BUFFER_TOO_SHORT ((NDIS_STATUS)0xC0010016L) ++#define NDIS_STATUS_INVALID_OID ((NDIS_STATUS)0xC0010017L) ++#define NDIS_STATUS_ADAPTER_REMOVED ((NDIS_STATUS)0xC0010018L) ++#define NDIS_STATUS_UNSUPPORTED_MEDIA ((NDIS_STATUS)0xC0010019L) ++#define NDIS_STATUS_GROUP_ADDRESS_IN_USE ((NDIS_STATUS)0xC001001AL) ++#define NDIS_STATUS_FILE_NOT_FOUND ((NDIS_STATUS)0xC001001BL) ++#define NDIS_STATUS_ERROR_READING_FILE ((NDIS_STATUS)0xC001001CL) ++#define NDIS_STATUS_ALREADY_MAPPED ((NDIS_STATUS)0xC001001DL) ++#define NDIS_STATUS_RESOURCE_CONFLICT ((NDIS_STATUS)0xC001001EL) ++#define NDIS_STATUS_NO_CABLE ((NDIS_STATUS)0xC001001FL) ++ ++#define NDIS_STATUS_INVALID_SAP ((NDIS_STATUS)0xC0010020L) ++#define NDIS_STATUS_SAP_IN_USE ((NDIS_STATUS)0xC0010021L) ++#define NDIS_STATUS_INVALID_ADDRESS ((NDIS_STATUS)0xC0010022L) ++#define NDIS_STATUS_VC_NOT_ACTIVATED ((NDIS_STATUS)0xC0010023L) ++#define NDIS_STATUS_DEST_OUT_OF_ORDER ((NDIS_STATUS)0xC0010024L) // cause 27 ++#define NDIS_STATUS_VC_NOT_AVAILABLE ((NDIS_STATUS)0xC0010025L) // cause 35,45 ++#define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((NDIS_STATUS)0xC0010026L) // cause 37 ++#define NDIS_STATUS_INCOMPATABLE_QOS ((NDIS_STATUS)0xC0010027L) // cause 49 ++#define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((NDIS_STATUS)0xC0010028L) // cause 93 ++#define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((NDIS_STATUS)0xC0010029L) // cause 3 ++#endif /* #ifndef PLATFORM_WINDOWS */ ++ ++#if 0 ++#define MPT_NOOP 0 ++#define MPT_READ_MAC_1BYTE 1 ++#define MPT_READ_MAC_2BYTE 2 ++#define MPT_READ_MAC_4BYTE 3 ++#define MPT_WRITE_MAC_1BYTE 4 ++#define MPT_WRITE_MAC_2BYTE 5 ++#define MPT_WRITE_MAC_4BYTE 6 ++#define MPT_READ_BB_CCK 7 ++#define MPT_WRITE_BB_CCK 8 ++#define MPT_READ_BB_OFDM 9 ++#define MPT_WRITE_BB_OFDM 10 ++#define MPT_READ_RF 11 ++#define MPT_WRITE_RF 12 ++#define MPT_READ_EEPROM_1BYTE 13 ++#define MPT_WRITE_EEPROM_1BYTE 14 ++#define MPT_READ_EEPROM_2BYTE 15 ++#define MPT_WRITE_EEPROM_2BYTE 16 ++#define MPT_SET_CSTHRESHOLD 21 ++#define MPT_SET_INITGAIN 22 ++#define MPT_SWITCH_BAND 23 ++#define MPT_SWITCH_CHANNEL 24 ++#define MPT_SET_DATARATE 25 ++#define MPT_SWITCH_ANTENNA 26 ++#define MPT_SET_TX_POWER 27 ++#define MPT_SET_CONT_TX 28 ++#define MPT_SET_SINGLE_CARRIER 29 ++#define MPT_SET_CARRIER_SUPPRESSION 30 ++#define MPT_GET_RATE_TABLE 31 ++#define MPT_READ_TSSI 32 ++#define MPT_GET_THERMAL_METER 33 ++#endif ++ ++#define MAX_MP_XMITBUF_SZ 2048 ++#define NR_MP_XMITFRAME 8 ++ ++struct mp_xmit_frame ++{ ++ _list list; ++ ++ struct pkt_attrib attrib; ++ ++ _pkt *pkt; ++ ++ int frame_tag; ++ ++ _adapter *padapter; ++ ++#ifdef CONFIG_USB_HCI ++ ++ //insert urb, irp, and irpcnt info below... ++ //max frag_cnt = 8 ++ ++ u8 *mem_addr; ++ u32 sz[8]; ++ ++#if defined(PLATFORM_OS_XP) || defined(PLATFORM_LINUX) ++ PURB pxmit_urb[8]; ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PIRP pxmit_irp[8]; ++#endif ++ ++ u8 bpending[8]; ++ sint ac_tag[8]; ++ sint last[8]; ++ uint irpcnt; ++ uint fragcnt; ++#endif /* CONFIG_USB_HCI */ ++ ++ uint mem[(MAX_MP_XMITBUF_SZ >> 2)]; ++}; ++ ++struct mp_wiparam ++{ ++ u32 bcompleted; ++ u32 act_type; ++ u32 io_offset; ++ u32 io_value; ++}; ++ ++typedef void(*wi_act_func)(void* padapter); ++ ++#ifdef PLATFORM_WINDOWS ++struct mp_wi_cntx ++{ ++ u8 bmpdrv_unload; ++ ++ // Work Item ++ NDIS_WORK_ITEM mp_wi; ++ NDIS_EVENT mp_wi_evt; ++ _lock mp_wi_lock; ++ u8 bmp_wi_progress; ++ wi_act_func curractfunc; ++ // Variable needed in each implementation of CurrActFunc. ++ struct mp_wiparam param; ++}; ++#endif ++ ++struct mp_tx ++{ ++ u8 stop; ++ u32 count, sended; ++ u8 payload; ++ struct pkt_attrib attrib; ++ struct tx_desc desc; ++ u8 *pallocated_buf; ++ u8 *buf; ++ u32 buf_size, write_size; ++ _thread_hdl_ PktTxThread; ++}; ++ ++//#if (MP_DRIVER == 1) ++#if defined(CONFIG_RTL8192C) || defined(CONFIG_RTL8192D) || defined(CONFIG_RTL8723A) || defined(CONFIG_RTL8188E) ++#ifdef CONFIG_RTL8192C ++#include ++#endif ++#ifdef CONFIG_RTL8192D ++#include ++#endif ++#ifdef CONFIG_RTL8723A ++#include ++#endif ++#ifdef CONFIG_RTL8188E ++#include ++#endif ++#define MP_MAX_LINES 1000 ++#define MP_MAX_LINES_BYTES 256 ++#define u1Byte u8 ++#define s1Byte s8 ++#define u4Byte u32 ++#define s4Byte s32 ++typedef VOID (*MPT_WORK_ITEM_HANDLER)(IN PVOID Adapter); ++typedef struct _MPT_CONTEXT ++{ ++ // Indicate if we have started Mass Production Test. ++ BOOLEAN bMassProdTest; ++ ++ // Indicate if the driver is unloading or unloaded. ++ BOOLEAN bMptDrvUnload; ++ ++ /* 8190 PCI does not support NDIS_WORK_ITEM. */ ++ // Work Item for Mass Production Test. ++ //NDIS_WORK_ITEM MptWorkItem; ++// RT_WORK_ITEM MptWorkItem; ++ // Event used to sync the case unloading driver and MptWorkItem is still in progress. ++// NDIS_EVENT MptWorkItemEvent; ++ // To protect the following variables. ++// NDIS_SPIN_LOCK MptWorkItemSpinLock; ++ // Indicate a MptWorkItem is scheduled and not yet finished. ++ BOOLEAN bMptWorkItemInProgress; ++ // An instance which implements function and context of MptWorkItem. ++ MPT_WORK_ITEM_HANDLER CurrMptAct; ++ ++ // 1=Start, 0=Stop from UI. ++ ULONG MptTestStart; ++ // _TEST_MODE, defined in MPT_Req2.h ++ ULONG MptTestItem; ++ // Variable needed in each implementation of CurrMptAct. ++ ULONG MptActType; // Type of action performed in CurrMptAct. ++ // The Offset of IO operation is depend of MptActType. ++ ULONG MptIoOffset; ++ // The Value of IO operation is depend of MptActType. ++ ULONG MptIoValue; ++ // The RfPath of IO operation is depend of MptActType. ++ ULONG MptRfPath; ++ ++ WIRELESS_MODE MptWirelessModeToSw; // Wireless mode to switch. ++ u8 MptChannelToSw; // Channel to switch. ++ u8 MptInitGainToSet; // Initial gain to set. ++ //ULONG bMptAntennaA; // TRUE if we want to use antenna A. ++ ULONG MptBandWidth; // bandwidth to switch. ++ ULONG MptRateIndex; // rate index. ++ // Register value kept for Single Carrier Tx test. ++ u8 btMpCckTxPower; ++ // Register value kept for Single Carrier Tx test. ++ u8 btMpOfdmTxPower; ++ // For MP Tx Power index ++ u8 TxPwrLevel[2]; // rf-A, rf-B ++ ++ // Content of RCR Regsiter for Mass Production Test. ++ ULONG MptRCR; ++ // TRUE if we only receive packets with specific pattern. ++ BOOLEAN bMptFilterPattern; ++ // Rx OK count, statistics used in Mass Production Test. ++ ULONG MptRxOkCnt; ++ // Rx CRC32 error count, statistics used in Mass Production Test. ++ ULONG MptRxCrcErrCnt; ++ ++ BOOLEAN bCckContTx; // TRUE if we are in CCK Continuous Tx test. ++ BOOLEAN bOfdmContTx; // TRUE if we are in OFDM Continuous Tx test. ++ BOOLEAN bStartContTx; // TRUE if we have start Continuous Tx test. ++ // TRUE if we are in Single Carrier Tx test. ++ BOOLEAN bSingleCarrier; ++ // TRUE if we are in Carrier Suppression Tx Test. ++ BOOLEAN bCarrierSuppression; ++ //TRUE if we are in Single Tone Tx test. ++ BOOLEAN bSingleTone; ++ ++ // ACK counter asked by K.Y.. ++ BOOLEAN bMptEnableAckCounter; ++ ULONG MptAckCounter; ++ ++ // SD3 Willis For 8192S to save 1T/2T RF table for ACUT Only fro ACUT delete later ~~~! ++ //s1Byte BufOfLines[2][MAX_LINES_HWCONFIG_TXT][MAX_BYTES_LINE_HWCONFIG_TXT]; ++ //s1Byte BufOfLines[2][MP_MAX_LINES][MP_MAX_LINES_BYTES]; ++ //s4Byte RfReadLine[2]; ++ ++ u8 APK_bound[2]; //for APK path A/path B ++ BOOLEAN bMptIndexEven; ++ ++ u8 backup0xc50; ++ u8 backup0xc58; ++ u8 backup0xc30; ++}MPT_CONTEXT, *PMPT_CONTEXT; ++#endif ++//#endif ++ ++/* E-Fuse */ ++#ifdef CONFIG_RTL8192D ++#define EFUSE_MAP_SIZE 255 ++#endif ++#ifdef CONFIG_RTL8192C ++#define EFUSE_MAP_SIZE 128 ++#endif ++#ifdef CONFIG_RTL8723A ++#define EFUSE_MAP_SIZE 256 ++#endif ++#ifdef CONFIG_RTL8188E ++#define EFUSE_MAP_SIZE 256 ++#endif ++#define EFUSE_MAX_SIZE 512 ++ ++/* end of E-Fuse */ ++ ++//#define RTPRIV_IOCTL_MP ( SIOCIWFIRSTPRIV + 0x17) ++enum { ++ WRITE_REG = 1, ++ READ_REG, ++ WRITE_RF, ++ READ_RF, ++ MP_START, ++ MP_STOP, ++ MP_RATE, ++ MP_CHANNEL, ++ MP_BANDWIDTH, ++ MP_TXPOWER, ++ MP_ANT_TX, ++ MP_ANT_RX, ++ MP_CTX, ++ MP_QUERY, ++ MP_ARX, ++ MP_PSD, ++ MP_PWRTRK, ++ MP_THER, ++ MP_IOCTL, ++ EFUSE_GET, ++ EFUSE_SET, ++ MP_RESET_STATS, ++ MP_DUMP, ++ MP_PHYPARA, ++ MP_NULL, ++}; ++ ++struct mp_priv ++{ ++ _adapter *papdater; ++ ++ //Testing Flag ++ u32 mode;//0 for normal type packet, 1 for loopback packet (16bytes TXCMD) ++ ++ u32 prev_fw_state; ++ ++ //OID cmd handler ++ struct mp_wiparam workparam; ++// u8 act_in_progress; ++ ++ //Tx Section ++ u8 TID; ++ u32 tx_pktcount; ++ struct mp_tx tx; ++ ++ //Rx Section ++ u32 rx_pktcount; ++ u32 rx_crcerrpktcount; ++ u32 rx_pktloss; ++ ++ struct recv_stat rxstat; ++ ++ //RF/BB relative ++ u8 channel; ++ u8 bandwidth; ++ u8 prime_channel_offset; ++ u8 txpoweridx; ++ u8 txpoweridx_b; ++ u8 rateidx; ++ u32 preamble; ++// u8 modem; ++ u32 CrystalCap; ++// u32 curr_crystalcap; ++ ++ u16 antenna_tx; ++ u16 antenna_rx; ++// u8 curr_rfpath; ++ ++ u8 check_mp_pkt; ++ ++// uint ForcedDataRate; ++ ++ struct wlan_network mp_network; ++ NDIS_802_11_MAC_ADDRESS network_macaddr; ++ ++#ifdef PLATFORM_WINDOWS ++ u32 rx_testcnt; ++ u32 rx_testcnt1; ++ u32 rx_testcnt2; ++ u32 tx_testcnt; ++ u32 tx_testcnt1; ++ ++ struct mp_wi_cntx wi_cntx; ++ ++ u8 h2c_result; ++ u8 h2c_seqnum; ++ u16 h2c_cmdcode; ++ u8 h2c_resp_parambuf[512]; ++ _lock h2c_lock; ++ _lock wkitm_lock; ++ u32 h2c_cmdcnt; ++ NDIS_EVENT h2c_cmd_evt; ++ NDIS_EVENT c2h_set; ++ NDIS_EVENT h2c_clr; ++ NDIS_EVENT cpwm_int; ++ ++ NDIS_EVENT scsir_full_evt; ++ NDIS_EVENT scsiw_empty_evt; ++#endif ++ ++ u8 *pallocated_mp_xmitframe_buf; ++ u8 *pmp_xmtframe_buf; ++ _queue free_mp_xmitqueue; ++ u32 free_mp_xmitframe_cnt; ++ ++ MPT_CONTEXT MptCtx; ++}; ++ ++typedef struct _IOCMD_STRUCT_ { ++ u8 cmdclass; ++ u16 value; ++ u8 index; ++}IOCMD_STRUCT; ++ ++struct rf_reg_param { ++ u32 path; ++ u32 offset; ++ u32 value; ++}; ++ ++struct bb_reg_param { ++ u32 offset; ++ u32 value; ++}; ++//======================================================================= ++ ++#define LOWER _TRUE ++#define RAISE _FALSE ++ ++/* Hardware Registers */ ++#if 0 ++#if 0 ++#define IOCMD_CTRL_REG 0x102502C0 ++#define IOCMD_DATA_REG 0x102502C4 ++#else ++#define IOCMD_CTRL_REG 0x10250370 ++#define IOCMD_DATA_REG 0x10250374 ++#endif ++ ++#define IOCMD_GET_THERMAL_METER 0xFD000028 ++ ++#define IOCMD_CLASS_BB_RF 0xF0 ++#define IOCMD_BB_READ_IDX 0x00 ++#define IOCMD_BB_WRITE_IDX 0x01 ++#define IOCMD_RF_READ_IDX 0x02 ++#define IOCMD_RF_WRIT_IDX 0x03 ++#endif ++#define BB_REG_BASE_ADDR 0x800 ++ ++/* MP variables */ ++#if 0 ++#define _2MAC_MODE_ 0 ++#define _LOOPBOOK_MODE_ 1 ++#endif ++typedef enum _MP_MODE_ { ++ MP_OFF, ++ MP_ON, ++ MP_ERR, ++ MP_CONTINUOUS_TX, ++ MP_SINGLE_CARRIER_TX, ++ MP_CARRIER_SUPPRISSION_TX, ++ MP_SINGLE_TONE_TX, ++ MP_PACKET_TX, ++ MP_PACKET_RX ++} MP_MODE; ++ ++#ifdef CONFIG_RTL8192C ++#define RF_PATH_A RF_PATH_A ++#define RF_PATH_B RF_PATH_B ++#define RF_PATH_C RF_PATH_C ++#define RF_PATH_D RF_PATH_D ++ ++#define MAX_RF_PATH_NUMS RF_PATH_MAX ++#else ++#define RF_PATH_A 0 ++#define RF_PATH_B 1 ++#define RF_PATH_C 2 ++#define RF_PATH_D 3 ++ ++#define MAX_RF_PATH_NUMS 2 ++#endif ++ ++extern u8 mpdatarate[NumRates]; ++ ++/* MP set force data rate base on the definition. */ ++typedef enum _MPT_RATE_INDEX ++{ ++ /* CCK rate. */ ++ MPT_RATE_1M, /* 0 */ ++ MPT_RATE_2M, ++ MPT_RATE_55M, ++ MPT_RATE_11M, /* 3 */ ++ ++ /* OFDM rate. */ ++ MPT_RATE_6M, /* 4 */ ++ MPT_RATE_9M, ++ MPT_RATE_12M, ++ MPT_RATE_18M, ++ MPT_RATE_24M, ++ MPT_RATE_36M, ++ MPT_RATE_48M, ++ MPT_RATE_54M, /* 11 */ ++ ++ /* HT rate. */ ++ MPT_RATE_MCS0, /* 12 */ ++ MPT_RATE_MCS1, ++ MPT_RATE_MCS2, ++ MPT_RATE_MCS3, ++ MPT_RATE_MCS4, ++ MPT_RATE_MCS5, ++ MPT_RATE_MCS6, ++ MPT_RATE_MCS7, /* 19 */ ++ MPT_RATE_MCS8, ++ MPT_RATE_MCS9, ++ MPT_RATE_MCS10, ++ MPT_RATE_MCS11, ++ MPT_RATE_MCS12, ++ MPT_RATE_MCS13, ++ MPT_RATE_MCS14, ++ MPT_RATE_MCS15, /* 27 */ ++ MPT_RATE_LAST ++}MPT_RATE_E, *PMPT_RATE_E; ++ ++#if 0 ++// Represent Channel Width in HT Capabilities ++typedef enum _HT_CHANNEL_WIDTH { ++ HT_CHANNEL_WIDTH_20 = 0, ++ HT_CHANNEL_WIDTH_40 = 1, ++}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; ++#endif ++ ++#define MAX_TX_PWR_INDEX_N_MODE 64 // 0x3F ++ ++typedef enum _POWER_MODE_ { ++ POWER_LOW = 0, ++ POWER_NORMAL ++}POWER_MODE; ++ ++ ++#define RX_PKT_BROADCAST 1 ++#define RX_PKT_DEST_ADDR 2 ++#define RX_PKT_PHY_MATCH 3 ++ ++#if 0 ++#define RPTMaxCount 0x000FFFFF; ++ ++// parameter 1 : BitMask ++// bit 0 : OFDM PPDU ++// bit 1 : OFDM False Alarm ++// bit 2 : OFDM MPDU OK ++// bit 3 : OFDM MPDU Fail ++// bit 4 : CCK PPDU ++// bit 5 : CCK False Alarm ++// bit 6 : CCK MPDU ok ++// bit 7 : CCK MPDU fail ++// bit 8 : HT PPDU counter ++// bit 9 : HT false alarm ++// bit 10 : HT MPDU total ++// bit 11 : HT MPDU OK ++// bit 12 : HT MPDU fail ++// bit 15 : RX full drop ++typedef enum _RXPHY_BITMASK_ ++{ ++ OFDM_PPDU_BIT = 0, ++ OFDM_FALSE_BIT, ++ OFDM_MPDU_OK_BIT, ++ OFDM_MPDU_FAIL_BIT, ++ CCK_PPDU_BIT, ++ CCK_FALSE_BIT, ++ CCK_MPDU_OK_BIT, ++ CCK_MPDU_FAIL_BIT, ++ HT_PPDU_BIT, ++ HT_FALSE_BIT, ++ HT_MPDU_BIT, ++ HT_MPDU_OK_BIT, ++ HT_MPDU_FAIL_BIT, ++} RXPHY_BITMASK; ++#endif ++ ++typedef enum _ENCRY_CTRL_STATE_ { ++ HW_CONTROL, //hw encryption& decryption ++ SW_CONTROL, //sw encryption& decryption ++ HW_ENCRY_SW_DECRY, //hw encryption & sw decryption ++ SW_ENCRY_HW_DECRY //sw encryption & hw decryption ++}ENCRY_CTRL_STATE; ++ ++ ++//======================================================================= ++//extern struct mp_xmit_frame *alloc_mp_xmitframe(struct mp_priv *pmp_priv); ++//extern int free_mp_xmitframe(struct xmit_priv *pxmitpriv, struct mp_xmit_frame *pmp_xmitframe); ++ ++extern s32 init_mp_priv(PADAPTER padapter); ++extern void free_mp_priv(struct mp_priv *pmp_priv); ++extern s32 MPT_InitializeAdapter(PADAPTER padapter, u8 Channel); ++extern void MPT_DeInitAdapter(PADAPTER padapter); ++extern s32 mp_start_test(PADAPTER padapter); ++extern void mp_stop_test(PADAPTER padapter); ++ ++//======================================================================= ++//extern void IQCalibrateBcut(PADAPTER pAdapter); ++ ++//extern u32 bb_reg_read(PADAPTER Adapter, u16 offset); ++//extern u8 bb_reg_write(PADAPTER Adapter, u16 offset, u32 value); ++//extern u32 rf_reg_read(PADAPTER Adapter, u8 path, u8 offset); ++//extern u8 rf_reg_write(PADAPTER Adapter, u8 path, u8 offset, u32 value); ++ ++//extern u32 get_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask); ++//extern u8 set_bb_reg(PADAPTER Adapter, u16 offset, u32 bitmask, u32 value); ++//extern u32 get_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask); ++//extern u8 set_rf_reg(PADAPTER Adapter, u8 path, u8 offset, u32 bitmask, u32 value); ++ ++extern u32 _read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask); ++extern void _write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 bitmask, u32 val); ++ ++extern u32 read_macreg(_adapter *padapter, u32 addr, u32 sz); ++extern void write_macreg(_adapter *padapter, u32 addr, u32 val, u32 sz); ++extern u32 read_bbreg(_adapter *padapter, u32 addr, u32 bitmask); ++extern void write_bbreg(_adapter *padapter, u32 addr, u32 bitmask, u32 val); ++extern u32 read_rfreg(PADAPTER padapter, u8 rfpath, u32 addr); ++extern void write_rfreg(PADAPTER padapter, u8 rfpath, u32 addr, u32 val); ++ ++extern void SetChannel(PADAPTER pAdapter); ++extern void SetBandwidth(PADAPTER pAdapter); ++extern void SetTxPower(PADAPTER pAdapter); ++extern void SetAntennaPathPower(PADAPTER pAdapter); ++//extern void SetTxAGCOffset(PADAPTER pAdapter, u32 ulTxAGCOffset); ++extern void SetDataRate(PADAPTER pAdapter); ++ ++extern void SetAntenna(PADAPTER pAdapter); ++ ++//extern void SetCrystalCap(PADAPTER pAdapter); ++ ++extern s32 SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern void GetThermalMeter(PADAPTER pAdapter, u8 *value); ++ ++extern void SetContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void SetSingleCarrierTx(PADAPTER pAdapter, u8 bStart); ++extern void SetSingleToneTx(PADAPTER pAdapter, u8 bStart); ++extern void SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++ ++extern void fill_txdesc_for_mp(PADAPTER padapter, struct tx_desc *ptxdesc); ++extern void SetPacketTx(PADAPTER padapter); ++extern void SetPacketRx(PADAPTER pAdapter, u8 bStartRx); ++ ++extern void ResetPhyRxPktCount(PADAPTER pAdapter); ++extern u32 GetPhyRxPktReceived(PADAPTER pAdapter); ++extern u32 GetPhyRxPktCRC32Error(PADAPTER pAdapter); ++ ++extern s32 SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void GetPowerTracking(PADAPTER padapter, u8 *enable); ++ ++extern u32 mp_query_psd(PADAPTER pAdapter, u8 *data); ++ ++extern u32 rtw_atoi(u8 *s); ++ ++ ++extern void Hal_SetAntenna(PADAPTER pAdapter); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetTxPower(PADAPTER pAdapter); ++extern void Hal_SetCarrierSuppressionTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetSingleToneTx ( PADAPTER pAdapter , u8 bStart ); ++extern void Hal_SetSingleCarrierTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetContinuousTx (PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetBandwidth(PADAPTER pAdapter); ++ ++extern void Hal_SetDataRate(PADAPTER pAdapter); ++extern void Hal_SetChannel(PADAPTER pAdapter); ++extern void Hal_SetAntennaPathPower(PADAPTER pAdapter); ++extern s32 Hal_SetThermalMeter(PADAPTER pAdapter, u8 target_ther); ++extern s32 Hal_SetPowerTracking(PADAPTER padapter, u8 enable); ++extern void Hal_GetPowerTracking(PADAPTER padapter, u8 * enable); ++extern void Hal_GetThermalMeter(PADAPTER pAdapter, u8 *value); ++extern void Hal_mpt_SwitchRfSetting(PADAPTER pAdapter); ++extern void Hal_MPT_CCKTxPowerAdjust(PADAPTER Adapter, BOOLEAN bInCH14); ++extern void Hal_MPT_CCKTxPowerAdjustbyIndex(PADAPTER pAdapter, BOOLEAN beven); ++extern void Hal_SetCCKTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_SetOFDMTxPower(PADAPTER pAdapter, u8 * TxPower); ++extern void Hal_TriggerRFThermalMeter(PADAPTER pAdapter); ++extern u8 Hal_ReadRFThermalMeter(PADAPTER pAdapter); ++extern void Hal_SetCCKContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_SetOFDMContinuousTx(PADAPTER pAdapter, u8 bStart); ++extern void Hal_ProSetCrystalCap (PADAPTER pAdapter , u32 CrystalCapVal); ++ ++#endif //_RTW_MP_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp_ioctl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp_ioctl.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,596 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef _RTW_MP_IOCTL_H_ ++#define _RTW_MP_IOCTL_H_ ++ ++//#include ++//#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#if 0 ++#define TESTFWCMDNUMBER 1000000 ++#define TEST_H2CINT_WAIT_TIME 500 ++#define TEST_C2HINT_WAIT_TIME 500 ++#define HCI_TEST_SYSCFG_HWMASK 1 ++#define _BUSCLK_40M (4 << 2) ++#endif ++//------------------------------------------------------------------------------ ++typedef struct CFG_DBG_MSG_STRUCT { ++ u32 DebugLevel; ++ u32 DebugComponent_H32; ++ u32 DebugComponent_L32; ++}CFG_DBG_MSG_STRUCT,*PCFG_DBG_MSG_STRUCT; ++ ++typedef struct _RW_REG { ++ u32 offset; ++ u32 width; ++ u32 value; ++}mp_rw_reg,RW_Reg, *pRW_Reg; ++ ++//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM ++typedef struct _EEPROM_RW_PARAM { ++ u32 offset; ++ u16 value; ++}eeprom_rw_param,EEPROM_RWParam, *pEEPROM_RWParam; ++ ++typedef struct _EFUSE_ACCESS_STRUCT_ { ++ u16 start_addr; ++ u16 cnts; ++ u8 data[0]; ++}EFUSE_ACCESS_STRUCT, *PEFUSE_ACCESS_STRUCT; ++ ++typedef struct _BURST_RW_REG { ++ u32 offset; ++ u32 len; ++ u8 Data[256]; ++}burst_rw_reg,Burst_RW_Reg, *pBurst_RW_Reg; ++ ++typedef struct _USB_VendorReq{ ++ u8 bRequest; ++ u16 wValue; ++ u16 wIndex; ++ u16 wLength; ++ u8 u8Dir;//0:OUT, 1:IN ++ u8 u8InData; ++}usb_vendor_req, USB_VendorReq, *pUSB_VendorReq; ++ ++typedef struct _DR_VARIABLE_STRUCT_ { ++ u8 offset; ++ u32 variable; ++}DR_VARIABLE_STRUCT; ++ ++//int mp_start_joinbss(_adapter *padapter, NDIS_802_11_SSID *pssid); ++ ++//void _irqlevel_changed_(_irqL *irqlevel, /*BOOLEAN*/unsigned char bLower); ++#ifdef PLATFORM_OS_XP ++static void _irqlevel_changed_(_irqL *irqlevel, u8 bLower) ++{ ++ ++ if (bLower == LOWER) { ++ *irqlevel = KeGetCurrentIrql(); ++ ++ if (*irqlevel > PASSIVE_LEVEL) { ++ KeLowerIrql(PASSIVE_LEVEL); ++ } ++ } else { ++ if (KeGetCurrentIrql() == PASSIVE_LEVEL) { ++ KeRaiseIrql(DISPATCH_LEVEL, irqlevel); ++ } ++ } ++ ++} ++#else ++#define _irqlevel_changed_(a,b) ++#endif ++ ++//oid_rtl_seg_81_80_00 ++NDIS_STATUS oid_rt_pro_set_data_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_start_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_stop_test_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_channel_direct_call_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_antenna_bb_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_tx_power_control_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_81_80_20 ++NDIS_STATUS oid_rt_pro_query_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_reset_tx_packet_sent_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_reset_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_modulation_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_continuous_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_single_carrier_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_carrier_suppression_tx_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_single_tone_tx_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_81_87 ++NDIS_STATUS oid_rt_pro_write_bb_reg_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_bb_reg_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_write_rf_reg_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_rf_reg_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_81_85 ++NDIS_STATUS oid_rt_wireless_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++// oid_rtl_seg_87_11_00 ++NDIS_STATUS oid_rt_pro8711_join_bss_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_burst_read_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_burst_write_register_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_txcmd_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read16_eeprom_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_write16_eeprom_hdl (struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro8711_wi_poll_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro8711_pkt_loss_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_rd_attrib_mem_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_wr_attrib_mem_hdl (struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_rf_intfs_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_poll_rx_status_hdl(struct oid_par_priv* poid_par_priv); ++// oid_rtl_seg_87_11_20 ++NDIS_STATUS oid_rt_pro_cfg_debug_message_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_data_rate_ex_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_basic_rate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_read_tssi_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_power_tracking_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_87_11_50 ++NDIS_STATUS oid_rt_pro_qry_pwrstate_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_pwrstate_hdl(struct oid_par_priv* poid_par_priv); ++//oid_rtl_seg_87_11_F0 ++NDIS_STATUS oid_rt_pro_h2c_set_rate_table_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_h2c_get_rate_table_hdl(struct oid_par_priv* poid_par_priv); ++ ++ ++//oid_rtl_seg_87_12_00 ++NDIS_STATUS oid_rt_pro_encryption_ctrl_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_add_sta_info_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_dele_sta_info_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_query_dr_variable_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_read_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_write_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_rw_efuse_pgpkt_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_get_efuse_current_size_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_efuse_hdl(struct oid_par_priv *poid_par_priv); ++NDIS_STATUS oid_rt_pro_efuse_map_hdl(struct oid_par_priv *poid_par_priv); ++ ++NDIS_STATUS oid_rt_set_bandwidth_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_crystal_cap_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_set_rx_packet_type_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_efuse_max_size_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_pro_set_tx_agc_offset_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_set_pkt_test_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_get_thermal_meter_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_reset_phy_rx_packet_count_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_phy_rx_packet_received_hdl(struct oid_par_priv* poid_par_priv); ++NDIS_STATUS oid_rt_get_phy_rx_packet_crc32_error_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_set_power_down_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_get_power_mode_hdl(struct oid_par_priv* poid_par_priv); ++ ++NDIS_STATUS oid_rt_pro_trigger_gpio_hdl(struct oid_par_priv *poid_par_priv); ++ ++#ifdef _RTW_MP_IOCTL_C_ ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_00[] = ++{ ++ {1, &oid_null_function}, //0x00 OID_RT_PRO_RESET_DUT ++ {1, &oid_rt_pro_set_data_rate_hdl}, //0x01 ++ {1, &oid_rt_pro_start_test_hdl}, //0x02 ++ {1, &oid_rt_pro_stop_test_hdl}, //0x03 ++ {1, &oid_null_function}, //0x04 OID_RT_PRO_SET_PREAMBLE ++ {1, &oid_null_function}, //0x05 OID_RT_PRO_SET_SCRAMBLER ++ {1, &oid_null_function}, //0x06 OID_RT_PRO_SET_FILTER_BB ++ {1, &oid_null_function}, //0x07 OID_RT_PRO_SET_MANUAL_DIVERSITY_BB ++ {1, &oid_rt_pro_set_channel_direct_call_hdl}, //0x08 ++ {1, &oid_null_function}, //0x09 OID_RT_PRO_SET_SLEEP_MODE_DIRECT_CALL ++ {1, &oid_null_function}, //0x0A OID_RT_PRO_SET_WAKE_MODE_DIRECT_CALL ++ {1, &oid_rt_pro_set_continuous_tx_hdl}, //0x0B OID_RT_PRO_SET_TX_CONTINUOUS_DIRECT_CALL ++ {1, &oid_rt_pro_set_single_carrier_tx_hdl}, //0x0C OID_RT_PRO_SET_SINGLE_CARRIER_TX_CONTINUOUS ++ {1, &oid_null_function}, //0x0D OID_RT_PRO_SET_TX_ANTENNA_BB ++ {1, &oid_rt_pro_set_antenna_bb_hdl}, //0x0E ++ {1, &oid_null_function}, //0x0F OID_RT_PRO_SET_CR_SCRAMBLER ++ {1, &oid_null_function}, //0x10 OID_RT_PRO_SET_CR_NEW_FILTER ++ {1, &oid_rt_pro_set_tx_power_control_hdl}, //0x11 OID_RT_PRO_SET_TX_POWER_CONTROL ++ {1, &oid_null_function}, //0x12 OID_RT_PRO_SET_CR_TX_CONFIG ++ {1, &oid_null_function}, //0x13 OID_RT_PRO_GET_TX_POWER_CONTROL ++ {1, &oid_null_function}, //0x14 OID_RT_PRO_GET_CR_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x15 OID_RT_PRO_SET_CR_SETPOINT ++ {1, &oid_null_function}, //0x16 OID_RT_PRO_SET_INTEGRATOR ++ {1, &oid_null_function}, //0x17 OID_RT_PRO_SET_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x18 OID_RT_PRO_GET_INTEGRATOR ++ {1, &oid_null_function}, //0x19 OID_RT_PRO_GET_SIGNAL_QUALITY ++ {1, &oid_null_function}, //0x1A OID_RT_PRO_QUERY_EEPROM_TYPE ++ {1, &oid_null_function}, //0x1B OID_RT_PRO_WRITE_MAC_ADDRESS ++ {1, &oid_null_function}, //0x1C OID_RT_PRO_READ_MAC_ADDRESS ++ {1, &oid_null_function}, //0x1D OID_RT_PRO_WRITE_CIS_DATA ++ {1, &oid_null_function}, //0x1E OID_RT_PRO_READ_CIS_DATA ++ {1, &oid_null_function} //0x1F OID_RT_PRO_WRITE_POWER_CONTROL ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_20[] = ++{ ++ {1, &oid_null_function}, //0x20 OID_RT_PRO_READ_POWER_CONTROL ++ {1, &oid_null_function}, //0x21 OID_RT_PRO_WRITE_EEPROM ++ {1, &oid_null_function}, //0x22 OID_RT_PRO_READ_EEPROM ++ {1, &oid_rt_pro_reset_tx_packet_sent_hdl}, //0x23 ++ {1, &oid_rt_pro_query_tx_packet_sent_hdl}, //0x24 ++ {1, &oid_rt_pro_reset_rx_packet_received_hdl}, //0x25 ++ {1, &oid_rt_pro_query_rx_packet_received_hdl}, //0x26 ++ {1, &oid_rt_pro_query_rx_packet_crc32_error_hdl}, //0x27 ++ {1, &oid_null_function}, //0x28 OID_RT_PRO_QUERY_CURRENT_ADDRESS ++ {1, &oid_null_function}, //0x29 OID_RT_PRO_QUERY_PERMANENT_ADDRESS ++ {1, &oid_null_function}, //0x2A OID_RT_PRO_SET_PHILIPS_RF_PARAMETERS ++ {1, &oid_rt_pro_set_carrier_suppression_tx_hdl},//0x2B OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX ++ {1, &oid_null_function}, //0x2C OID_RT_PRO_RECEIVE_PACKET ++ {1, &oid_null_function}, //0x2D OID_RT_PRO_WRITE_EEPROM_BYTE ++ {1, &oid_null_function}, //0x2E OID_RT_PRO_READ_EEPROM_BYTE ++ {1, &oid_rt_pro_set_modulation_hdl} //0x2F ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_40[] = ++{ ++ {1, &oid_null_function}, //0x40 ++ {1, &oid_null_function}, //0x41 ++ {1, &oid_null_function}, //0x42 ++ {1, &oid_rt_pro_set_single_tone_tx_hdl}, //0x43 ++ {1, &oid_null_function}, //0x44 ++ {1, &oid_null_function} //0x45 ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_80_80[] = ++{ ++ {1, &oid_null_function}, //0x80 OID_RT_DRIVER_OPTION ++ {1, &oid_null_function}, //0x81 OID_RT_RF_OFF ++ {1, &oid_null_function} //0x82 OID_RT_AUTH_STATUS ++ ++}; ++ ++const struct oid_obj_priv oid_rtl_seg_81_85[] = ++{ ++ {1, &oid_rt_wireless_mode_hdl} //0x00 OID_RT_WIRELESS_MODE ++}; ++ ++struct oid_obj_priv oid_rtl_seg_81_87[] = ++{ ++ {1, &oid_null_function}, //0x80 OID_RT_PRO8187_WI_POLL ++ {1, &oid_rt_pro_write_bb_reg_hdl}, //0x81 ++ {1, &oid_rt_pro_read_bb_reg_hdl}, //0x82 ++ {1, &oid_rt_pro_write_rf_reg_hdl}, //0x82 ++ {1, &oid_rt_pro_read_rf_reg_hdl} //0x83 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_00[] = ++{ ++ {1, &oid_rt_pro8711_join_bss_hdl}, //0x00 //S ++ {1, &oid_rt_pro_read_register_hdl}, //0x01 ++ {1, &oid_rt_pro_write_register_hdl}, //0x02 ++ {1, &oid_rt_pro_burst_read_register_hdl}, //0x03 ++ {1, &oid_rt_pro_burst_write_register_hdl}, //0x04 ++ {1, &oid_rt_pro_write_txcmd_hdl}, //0x05 ++ {1, &oid_rt_pro_read16_eeprom_hdl}, //0x06 ++ {1, &oid_rt_pro_write16_eeprom_hdl}, //0x07 ++ {1, &oid_null_function}, //0x08 OID_RT_PRO_H2C_SET_COMMAND ++ {1, &oid_null_function}, //0x09 OID_RT_PRO_H2C_QUERY_RESULT ++ {1, &oid_rt_pro8711_wi_poll_hdl}, //0x0A ++ {1, &oid_rt_pro8711_pkt_loss_hdl}, //0x0B ++ {1, &oid_rt_rd_attrib_mem_hdl}, //0x0C ++ {1, &oid_rt_wr_attrib_mem_hdl}, //0x0D ++ {1, &oid_null_function}, //0x0E ++ {1, &oid_null_function}, //0x0F ++ {1, &oid_null_function}, //0x10 OID_RT_PRO_H2C_CMD_MODE ++ {1, &oid_null_function}, //0x11 OID_RT_PRO_H2C_CMD_RSP_MODE ++ {1, &oid_null_function}, //0X12 OID_RT_PRO_WAIT_C2H_EVENT ++ {1, &oid_null_function}, //0X13 OID_RT_PRO_RW_ACCESS_PROTOCOL_TEST ++ {1, &oid_null_function}, //0X14 OID_RT_PRO_SCSI_ACCESS_TEST ++ {1, &oid_null_function}, //0X15 OID_RT_PRO_SCSI_TCPIPOFFLOAD_OUT ++ {1, &oid_null_function}, //0X16 OID_RT_PRO_SCSI_TCPIPOFFLOAD_IN ++ {1, &oid_null_function}, //0X17 OID_RT_RRO_RX_PKT_VIA_IOCTRL ++ {1, &oid_null_function}, //0X18 OID_RT_RRO_RX_PKTARRAY_VIA_IOCTRL ++ {1, &oid_null_function}, //0X19 OID_RT_RPO_SET_PWRMGT_TEST ++ {1, &oid_null_function}, //0X1A ++ {1, &oid_null_function}, //0X1B OID_RT_PRO_QRY_PWRMGT_TEST ++ {1, &oid_null_function}, //0X1C OID_RT_RPO_ASYNC_RWIO_TEST ++ {1, &oid_null_function}, //0X1D OID_RT_RPO_ASYNC_RWIO_POLL ++ {1, &oid_rt_pro_set_rf_intfs_hdl}, //0X1E ++ {1, &oid_rt_poll_rx_status_hdl} //0X1F ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_20[] = ++{ ++ {1, &oid_rt_pro_cfg_debug_message_hdl}, //0x20 ++ {1, &oid_rt_pro_set_data_rate_ex_hdl}, //0x21 ++ {1, &oid_rt_pro_set_basic_rate_hdl}, //0x22 ++ {1, &oid_rt_pro_read_tssi_hdl}, //0x23 ++ {1, &oid_rt_pro_set_power_tracking_hdl} //0x24 ++}; ++ ++ ++struct oid_obj_priv oid_rtl_seg_87_11_50[] = ++{ ++ {1, &oid_rt_pro_qry_pwrstate_hdl}, //0x50 ++ {1, &oid_rt_pro_set_pwrstate_hdl} //0x51 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_80[] = ++{ ++ {1, &oid_null_function} //0x80 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_B0[] = ++{ ++ {1, &oid_null_function} //0xB0 ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_11_F0[] = ++{ ++ {1, &oid_null_function}, //0xF0 ++ {1, &oid_null_function}, //0xF1 ++ {1, &oid_null_function}, //0xF2 ++ {1, &oid_null_function}, //0xF3 ++ {1, &oid_null_function}, //0xF4 ++ {1, &oid_null_function}, //0xF5 ++ {1, &oid_null_function}, //0xF6 ++ {1, &oid_null_function}, //0xF7 ++ {1, &oid_null_function}, //0xF8 ++ {1, &oid_null_function}, //0xF9 ++ {1, &oid_null_function}, //0xFA ++ {1, &oid_rt_pro_h2c_set_rate_table_hdl}, //0xFB ++ {1, &oid_rt_pro_h2c_get_rate_table_hdl}, //0xFC ++ {1, &oid_null_function}, //0xFD ++ {1, &oid_null_function}, //0xFE OID_RT_PRO_H2C_C2H_LBK_TEST ++ {1, &oid_null_function} //0xFF ++ ++}; ++ ++struct oid_obj_priv oid_rtl_seg_87_12_00[]= ++{ ++ {1, &oid_rt_pro_encryption_ctrl_hdl}, //0x00 Q&S ++ {1, &oid_rt_pro_add_sta_info_hdl}, //0x01 S ++ {1, &oid_rt_pro_dele_sta_info_hdl}, //0x02 S ++ {1, &oid_rt_pro_query_dr_variable_hdl}, //0x03 Q ++ {1, &oid_rt_pro_rx_packet_type_hdl}, //0x04 Q,S ++ {1, &oid_rt_pro_read_efuse_hdl}, //0x05 Q OID_RT_PRO_READ_EFUSE ++ {1, &oid_rt_pro_write_efuse_hdl}, //0x06 S OID_RT_PRO_WRITE_EFUSE ++ {1, &oid_rt_pro_rw_efuse_pgpkt_hdl}, //0x07 Q,S ++ {1, &oid_rt_get_efuse_current_size_hdl}, //0x08 Q ++ {1, &oid_rt_set_bandwidth_hdl}, //0x09 ++ {1, &oid_rt_set_crystal_cap_hdl}, //0x0a ++ {1, &oid_rt_set_rx_packet_type_hdl}, //0x0b S ++ {1, &oid_rt_get_efuse_max_size_hdl}, //0x0c ++ {1, &oid_rt_pro_set_tx_agc_offset_hdl}, //0x0d ++ {1, &oid_rt_pro_set_pkt_test_mode_hdl}, //0x0e ++ {1, &oid_null_function}, //0x0f OID_RT_PRO_FOR_EVM_TEST_SETTING ++ {1, &oid_rt_get_thermal_meter_hdl}, //0x10 Q OID_RT_PRO_GET_THERMAL_METER ++ {1, &oid_rt_reset_phy_rx_packet_count_hdl}, //0x11 S OID_RT_RESET_PHY_RX_PACKET_COUNT ++ {1, &oid_rt_get_phy_rx_packet_received_hdl}, //0x12 Q OID_RT_GET_PHY_RX_PACKET_RECEIVED ++ {1, &oid_rt_get_phy_rx_packet_crc32_error_hdl}, //0x13 Q OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR ++ {1, &oid_rt_set_power_down_hdl}, //0x14 Q OID_RT_SET_POWER_DOWN ++ {1, &oid_rt_get_power_mode_hdl} //0x15 Q OID_RT_GET_POWER_MODE ++}; ++ ++#else /* _RTL871X_MP_IOCTL_C_ */ ++ ++extern struct oid_obj_priv oid_rtl_seg_81_80_00[32]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_20[16]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_40[6]; ++extern struct oid_obj_priv oid_rtl_seg_81_80_80[3]; ++ ++extern struct oid_obj_priv oid_rtl_seg_81_85[1]; ++extern struct oid_obj_priv oid_rtl_seg_81_87[5]; ++ ++extern struct oid_obj_priv oid_rtl_seg_87_11_00[32]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_20[5]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_50[2]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_80[1]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_B0[1]; ++extern struct oid_obj_priv oid_rtl_seg_87_11_F0[16]; ++ ++extern struct oid_obj_priv oid_rtl_seg_87_12_00[32]; ++ ++#endif /* _RTL871X_MP_IOCTL_C_ */ ++ ++struct rwreg_param{ ++ u32 offset; ++ u32 width; ++ u32 value; ++}; ++ ++struct bbreg_param{ ++ u32 offset; ++ u32 phymask; ++ u32 value; ++}; ++/* ++struct rfchannel_param{ ++ u32 ch; ++ u32 modem; ++}; ++*/ ++struct txpower_param{ ++ u32 pwr_index; ++}; ++ ++ ++struct datarate_param{ ++ u32 rate_index; ++}; ++ ++ ++struct rfintfs_parm { ++ u32 rfintfs; ++}; ++ ++typedef struct _mp_xmit_parm_ { ++ u8 enable; ++ u32 count; ++ u16 length; ++ u8 payload_type; ++ u8 da[ETH_ALEN]; ++}MP_XMIT_PARM, *PMP_XMIT_PARM; ++ ++struct mp_xmit_packet { ++ u32 len; ++ u32 mem[MAX_MP_XMITBUF_SZ >> 2]; ++}; ++ ++struct psmode_param { ++ u32 ps_mode; ++ u32 smart_ps; ++}; ++ ++//for OID_RT_PRO_READ16_EEPROM & OID_RT_PRO_WRITE16_EEPROM ++struct eeprom_rw_param { ++ u32 offset; ++ u16 value; ++}; ++ ++struct mp_ioctl_handler { ++ u32 paramsize; ++ u32 (*handler)(struct oid_par_priv* poid_par_priv); ++ u32 oid; ++}; ++ ++struct mp_ioctl_param{ ++ u32 subcode; ++ u32 len; ++ u8 data[0]; ++}; ++ ++#define GEN_MP_IOCTL_SUBCODE(code) _MP_IOCTL_ ## code ## _CMD_ ++ ++enum RTL871X_MP_IOCTL_SUBCODE { ++ GEN_MP_IOCTL_SUBCODE(MP_START), /*0*/ ++ GEN_MP_IOCTL_SUBCODE(MP_STOP), ++ GEN_MP_IOCTL_SUBCODE(READ_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_REG), ++ GEN_MP_IOCTL_SUBCODE(READ_BB_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_BB_REG), /*5*/ ++ GEN_MP_IOCTL_SUBCODE(READ_RF_REG), ++ GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG), ++ GEN_MP_IOCTL_SUBCODE(SET_CHANNEL), ++ GEN_MP_IOCTL_SUBCODE(SET_TXPOWER), ++ GEN_MP_IOCTL_SUBCODE(SET_DATARATE), /*10*/ ++ GEN_MP_IOCTL_SUBCODE(SET_BANDWIDTH), ++ GEN_MP_IOCTL_SUBCODE(SET_ANTENNA), ++ GEN_MP_IOCTL_SUBCODE(CNTU_TX), ++ GEN_MP_IOCTL_SUBCODE(SC_TX), ++ GEN_MP_IOCTL_SUBCODE(CS_TX), /*15*/ ++ GEN_MP_IOCTL_SUBCODE(ST_TX), ++ GEN_MP_IOCTL_SUBCODE(IOCTL_XMIT_PACKET), ++ GEN_MP_IOCTL_SUBCODE(SET_RX_PKT_TYPE), ++ GEN_MP_IOCTL_SUBCODE(RESET_PHY_RX_PKT_CNT), ++ GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_RECV), /*20*/ ++ GEN_MP_IOCTL_SUBCODE(GET_PHY_RX_PKT_ERROR), ++ GEN_MP_IOCTL_SUBCODE(READ16_EEPROM), ++ GEN_MP_IOCTL_SUBCODE(WRITE16_EEPROM), ++ GEN_MP_IOCTL_SUBCODE(EFUSE), ++ GEN_MP_IOCTL_SUBCODE(EFUSE_MAP), /*25*/ ++ GEN_MP_IOCTL_SUBCODE(GET_EFUSE_MAX_SIZE), ++ GEN_MP_IOCTL_SUBCODE(GET_EFUSE_CURRENT_SIZE), ++ GEN_MP_IOCTL_SUBCODE(GET_THERMAL_METER), ++ GEN_MP_IOCTL_SUBCODE(SET_PTM), ++ GEN_MP_IOCTL_SUBCODE(SET_POWER_DOWN), /*30*/ ++ GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO), ++ GEN_MP_IOCTL_SUBCODE(SET_DM_BT), /*35*/ ++ GEN_MP_IOCTL_SUBCODE(DEL_BA), /*36*/ ++ GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS), /*37*/ ++ MAX_MP_IOCTL_SUBCODE, ++}; ++ ++u32 mp_ioctl_xmit_packet_hdl(struct oid_par_priv* poid_par_priv); ++ ++#ifdef _RTW_MP_IOCTL_C_ ++ ++#define GEN_MP_IOCTL_HANDLER(sz, hdl, oid) {sz, hdl, oid}, ++ ++#define EXT_MP_IOCTL_HANDLER(sz, subcode, oid) {sz, mp_ioctl_ ## subcode ## _hdl, oid}, ++ ++ ++struct mp_ioctl_handler mp_ioctl_hdl[] = { ++ ++/*0*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_start_test_hdl, OID_RT_PRO_START_TEST) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_stop_test_hdl, OID_RT_PRO_STOP_TEST) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_read_register_hdl, OID_RT_PRO_READ_REGISTER) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rwreg_param), oid_rt_pro_write_register_hdl, OID_RT_PRO_WRITE_REGISTER) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_read_bb_reg_hdl, OID_RT_PRO_READ_BB_REG) ++/*5*/ GEN_MP_IOCTL_HANDLER(sizeof(struct bb_reg_param), oid_rt_pro_write_bb_reg_hdl, OID_RT_PRO_WRITE_BB_REG) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_read_rf_reg_hdl, OID_RT_PRO_RF_READ_REGISTRY) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct rf_reg_param), oid_rt_pro_write_rf_reg_hdl, OID_RT_PRO_RF_WRITE_REGISTRY) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_channel_direct_call_hdl, OID_RT_PRO_SET_CHANNEL_DIRECT_CALL) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct txpower_param), oid_rt_pro_set_tx_power_control_hdl, OID_RT_PRO_SET_TX_POWER_CONTROL) ++/*10*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_data_rate_hdl, OID_RT_PRO_SET_DATA_RATE) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_bandwidth_hdl, OID_RT_SET_BANDWIDTH) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_antenna_bb_hdl, OID_RT_PRO_SET_ANTENNA_BB) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_continuous_tx_hdl, OID_RT_PRO_SET_CONTINUOUS_TX) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_carrier_tx_hdl, OID_RT_PRO_SET_SINGLE_CARRIER_TX) ++/*15*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_carrier_suppression_tx_hdl, OID_RT_PRO_SET_CARRIER_SUPPRESSION_TX) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_pro_set_single_tone_tx_hdl, OID_RT_PRO_SET_SINGLE_TONE_TX) ++ ++ EXT_MP_IOCTL_HANDLER(0, xmit_packet, 0) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_set_rx_packet_type_hdl, OID_RT_SET_RX_PACKET_TYPE) ++ GEN_MP_IOCTL_HANDLER(0, oid_rt_reset_phy_rx_packet_count_hdl, OID_RT_RESET_PHY_RX_PACKET_COUNT) ++/*20*/ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_received_hdl, OID_RT_GET_PHY_RX_PACKET_RECEIVED) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_phy_rx_packet_crc32_error_hdl, OID_RT_GET_PHY_RX_PACKET_CRC32_ERROR) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) ++ GEN_MP_IOCTL_HANDLER(sizeof(struct eeprom_rw_param), NULL, 0) ++ GEN_MP_IOCTL_HANDLER(sizeof(EFUSE_ACCESS_STRUCT), oid_rt_pro_efuse_hdl, OID_RT_PRO_EFUSE) ++/*25*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_efuse_map_hdl, OID_RT_PRO_EFUSE_MAP) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_max_size_hdl, OID_RT_GET_EFUSE_MAX_SIZE) ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_efuse_current_size_hdl, OID_RT_GET_EFUSE_CURRENT_SIZE) ++ ++ GEN_MP_IOCTL_HANDLER(sizeof(u32), oid_rt_get_thermal_meter_hdl, OID_RT_PRO_GET_THERMAL_METER) ++ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_pro_set_power_tracking_hdl, OID_RT_PRO_SET_POWER_TRACKING) ++/*30*/ GEN_MP_IOCTL_HANDLER(sizeof(u8), oid_rt_set_power_down_hdl, OID_RT_SET_POWER_DOWN) ++/*31*/ GEN_MP_IOCTL_HANDLER(0, oid_rt_pro_trigger_gpio_hdl, 0) ++ ++ ++}; ++ ++#else /* _RTW_MP_IOCTL_C_ */ ++ ++extern struct mp_ioctl_handler mp_ioctl_hdl[]; ++ ++#endif /* _RTW_MP_IOCTL_C_ */ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp_phy_regdef.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_mp_phy_regdef.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1098 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++/***************************************************************************** ++ * ++ * Module: __RTW_MP_PHY_REGDEF_H_ ++ * ++ * ++ * Note: 1. Define PMAC/BB register map ++ * 2. Define RF register map ++ * 3. PMAC/BB register bit mask. ++ * 4. RF reg bit mask. ++ * 5. Other BB/RF relative definition. ++ * ++ * ++ * Export: Constants, macro, functions(API), global variables(None). ++ * ++ * Abbrev: ++ * ++ * History: ++ * Data Who Remark ++ * 08/07/2007 MHC 1. Porting from 9x series PHYCFG.h. ++ * 2. Reorganize code architecture. ++ * 09/25/2008 MH 1. Add RL6052 register definition ++ * ++ *****************************************************************************/ ++#ifndef __RTW_MP_PHY_REGDEF_H_ ++#define __RTW_MP_PHY_REGDEF_H_ ++ ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++//============================================================ ++// 8192S Regsiter offset definition ++//============================================================ ++ ++// ++// BB-PHY register PMAC 0x100 PHY 0x800 - 0xEFF ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 2. 0x800/0x900/0xA00/0xC00/0xD00/0xE00 ++// 3. RF register 0x00-2E ++// 4. Bit Mask for BB/RF register ++// 5. Other defintion for BB/RF R/W ++// ++ ++ ++// ++// 1. PMAC duplicate register due to connection: RF_Mode, TRxRN, NumOf L-STF ++// 1. Page1(0x100) ++// ++#define rPMAC_Reset 0x100 ++#define rPMAC_TxStart 0x104 ++#define rPMAC_TxLegacySIG 0x108 ++#define rPMAC_TxHTSIG1 0x10c ++#define rPMAC_TxHTSIG2 0x110 ++#define rPMAC_PHYDebug 0x114 ++#define rPMAC_TxPacketNum 0x118 ++#define rPMAC_TxIdle 0x11c ++#define rPMAC_TxMACHeader0 0x120 ++#define rPMAC_TxMACHeader1 0x124 ++#define rPMAC_TxMACHeader2 0x128 ++#define rPMAC_TxMACHeader3 0x12c ++#define rPMAC_TxMACHeader4 0x130 ++#define rPMAC_TxMACHeader5 0x134 ++#define rPMAC_TxDataType 0x138 ++#define rPMAC_TxRandomSeed 0x13c ++#define rPMAC_CCKPLCPPreamble 0x140 ++#define rPMAC_CCKPLCPHeader 0x144 ++#define rPMAC_CCKCRC16 0x148 ++#define rPMAC_OFDMRxCRC32OK 0x170 ++#define rPMAC_OFDMRxCRC32Er 0x174 ++#define rPMAC_OFDMRxParityEr 0x178 ++#define rPMAC_OFDMRxCRC8Er 0x17c ++#define rPMAC_CCKCRxRC16Er 0x180 ++#define rPMAC_CCKCRxRC32Er 0x184 ++#define rPMAC_CCKCRxRC32OK 0x188 ++#define rPMAC_TxStatus 0x18c ++ ++// ++// 2. Page2(0x200) ++// ++// The following two definition are only used for USB interface. ++//#define RF_BB_CMD_ADDR 0x02c0 // RF/BB read/write command address. ++//#define RF_BB_CMD_DATA 0x02c4 // RF/BB read/write command data. ++ ++// ++// 3. Page8(0x800) ++// ++#define rFPGA0_RFMOD 0x800 //RF mode & CCK TxSC // RF BW Setting?? ++ ++#define rFPGA0_TxInfo 0x804 // Status report?? ++#define rFPGA0_PSDFunction 0x808 ++ ++#define rFPGA0_TxGainStage 0x80c // Set TX PWR init gain? ++ ++#define rFPGA0_RFTiming1 0x810 // Useless now ++#define rFPGA0_RFTiming2 0x814 ++//#define rFPGA0_XC_RFTiming 0x818 ++//#define rFPGA0_XD_RFTiming 0x81c ++ ++#define rFPGA0_XA_HSSIParameter1 0x820 // RF 3 wire register ++#define rFPGA0_XA_HSSIParameter2 0x824 ++#define rFPGA0_XB_HSSIParameter1 0x828 ++#define rFPGA0_XB_HSSIParameter2 0x82c ++#define rFPGA0_XC_HSSIParameter1 0x830 ++#define rFPGA0_XC_HSSIParameter2 0x834 ++#define rFPGA0_XD_HSSIParameter1 0x838 ++#define rFPGA0_XD_HSSIParameter2 0x83c ++#define rFPGA0_XA_LSSIParameter 0x840 ++#define rFPGA0_XB_LSSIParameter 0x844 ++#define rFPGA0_XC_LSSIParameter 0x848 ++#define rFPGA0_XD_LSSIParameter 0x84c ++ ++#define rFPGA0_RFWakeUpParameter 0x850 // Useless now ++#define rFPGA0_RFSleepUpParameter 0x854 ++ ++#define rFPGA0_XAB_SwitchControl 0x858 // RF Channel switch ++#define rFPGA0_XCD_SwitchControl 0x85c ++ ++#define rFPGA0_XA_RFInterfaceOE 0x860 // RF Channel switch ++#define rFPGA0_XB_RFInterfaceOE 0x864 ++#define rFPGA0_XC_RFInterfaceOE 0x868 ++#define rFPGA0_XD_RFInterfaceOE 0x86c ++ ++#define rFPGA0_XAB_RFInterfaceSW 0x870 // RF Interface Software Control ++#define rFPGA0_XCD_RFInterfaceSW 0x874 ++ ++#define rFPGA0_XAB_RFParameter 0x878 // RF Parameter ++#define rFPGA0_XCD_RFParameter 0x87c ++ ++#define rFPGA0_AnalogParameter1 0x880 // Crystal cap setting RF-R/W protection for parameter4?? ++#define rFPGA0_AnalogParameter2 0x884 ++#define rFPGA0_AnalogParameter3 0x888 // Useless now ++#define rFPGA0_AnalogParameter4 0x88c ++ ++#define rFPGA0_XA_LSSIReadBack 0x8a0 // Tranceiver LSSI Readback ++#define rFPGA0_XB_LSSIReadBack 0x8a4 ++#define rFPGA0_XC_LSSIReadBack 0x8a8 ++#define rFPGA0_XD_LSSIReadBack 0x8ac ++ ++#define rFPGA0_PSDReport 0x8b4 // Useless now ++#define rFPGA0_XAB_RFInterfaceRB 0x8e0 // Useless now // RF Interface Readback Value ++#define rFPGA0_XCD_RFInterfaceRB 0x8e4 // Useless now ++ ++// ++// 4. Page9(0x900) ++// ++#define rFPGA1_RFMOD 0x900 //RF mode & OFDM TxSC // RF BW Setting?? ++ ++#define rFPGA1_TxBlock 0x904 // Useless now ++#define rFPGA1_DebugSelect 0x908 // Useless now ++#define rFPGA1_TxInfo 0x90c // Useless now // Status report?? ++ ++// ++// 5. PageA(0xA00) ++// ++// Set Control channel to upper or lower. These settings are required only for 40MHz ++#define rCCK0_System 0xa00 ++ ++#define rCCK0_AFESetting 0xa04 // Disable init gain now // Select RX path by RSSI ++#define rCCK0_CCA 0xa08 // Disable init gain now // Init gain ++ ++#define rCCK0_RxAGC1 0xa0c //AGC default value, saturation level // Antenna Diversity, RX AGC, LNA Threshold, RX LNA Threshold useless now. Not the same as 90 series ++#define rCCK0_RxAGC2 0xa10 //AGC & DAGC ++ ++#define rCCK0_RxHP 0xa14 ++ ++#define rCCK0_DSPParameter1 0xa18 //Timing recovery & Channel estimation threshold ++#define rCCK0_DSPParameter2 0xa1c //SQ threshold ++ ++#define rCCK0_TxFilter1 0xa20 ++#define rCCK0_TxFilter2 0xa24 ++#define rCCK0_DebugPort 0xa28 //debug port and Tx filter3 ++#define rCCK0_FalseAlarmReport 0xa2c //0xa2d useless now 0xa30-a4f channel report ++#define rCCK0_TRSSIReport 0xa50 ++#define rCCK0_RxReport 0xa54 //0xa57 ++#define rCCK0_FACounterLower 0xa5c //0xa5b ++#define rCCK0_FACounterUpper 0xa58 //0xa5c ++ ++// ++// 6. PageC(0xC00) ++// ++#define rOFDM0_LSTF 0xc00 ++ ++#define rOFDM0_TRxPathEnable 0xc04 ++#define rOFDM0_TRMuxPar 0xc08 ++#define rOFDM0_TRSWIsolation 0xc0c ++ ++#define rOFDM0_XARxAFE 0xc10 //RxIQ DC offset, Rx digital filter, DC notch filter ++#define rOFDM0_XARxIQImbalance 0xc14 //RxIQ imblance matrix ++#define rOFDM0_XBRxAFE 0xc18 ++#define rOFDM0_XBRxIQImbalance 0xc1c ++#define rOFDM0_XCRxAFE 0xc20 ++#define rOFDM0_XCRxIQImbalance 0xc24 ++#define rOFDM0_XDRxAFE 0xc28 ++#define rOFDM0_XDRxIQImbalance 0xc2c ++ ++#define rOFDM0_RxDetector1 0xc30 //PD,BW & SBD // DM tune init gain ++#define rOFDM0_RxDetector2 0xc34 //SBD & Fame Sync. ++#define rOFDM0_RxDetector3 0xc38 //Frame Sync. ++#define rOFDM0_RxDetector4 0xc3c //PD, SBD, Frame Sync & Short-GI ++ ++#define rOFDM0_RxDSP 0xc40 //Rx Sync Path ++#define rOFDM0_CFOandDAGC 0xc44 //CFO & DAGC ++#define rOFDM0_CCADropThreshold 0xc48 //CCA Drop threshold ++#define rOFDM0_ECCAThreshold 0xc4c // energy CCA ++ ++#define rOFDM0_XAAGCCore1 0xc50 // DIG ++#define rOFDM0_XAAGCCore2 0xc54 ++#define rOFDM0_XBAGCCore1 0xc58 ++#define rOFDM0_XBAGCCore2 0xc5c ++#define rOFDM0_XCAGCCore1 0xc60 ++#define rOFDM0_XCAGCCore2 0xc64 ++#define rOFDM0_XDAGCCore1 0xc68 ++#define rOFDM0_XDAGCCore2 0xc6c ++ ++#define rOFDM0_AGCParameter1 0xc70 ++#define rOFDM0_AGCParameter2 0xc74 ++#define rOFDM0_AGCRSSITable 0xc78 ++#define rOFDM0_HTSTFAGC 0xc7c ++ ++#define rOFDM0_XATxIQImbalance 0xc80 // TX PWR TRACK and DIG ++#define rOFDM0_XATxAFE 0xc84 ++#define rOFDM0_XBTxIQImbalance 0xc88 ++#define rOFDM0_XBTxAFE 0xc8c ++#define rOFDM0_XCTxIQImbalance 0xc90 ++#define rOFDM0_XCTxAFE 0xc94 ++#define rOFDM0_XDTxIQImbalance 0xc98 ++#define rOFDM0_XDTxAFE 0xc9c ++#define rOFDM0_RxIQExtAnta 0xca0 ++ ++#define rOFDM0_RxHPParameter 0xce0 ++#define rOFDM0_TxPseudoNoiseWgt 0xce4 ++#define rOFDM0_FrameSync 0xcf0 ++#define rOFDM0_DFSReport 0xcf4 ++#define rOFDM0_TxCoeff1 0xca4 ++#define rOFDM0_TxCoeff2 0xca8 ++#define rOFDM0_TxCoeff3 0xcac ++#define rOFDM0_TxCoeff4 0xcb0 ++#define rOFDM0_TxCoeff5 0xcb4 ++#define rOFDM0_TxCoeff6 0xcb8 ++ ++ ++// ++// 7. PageD(0xD00) ++// ++#define rOFDM1_LSTF 0xd00 ++#define rOFDM1_TRxPathEnable 0xd04 ++ ++#define rOFDM1_CFO 0xd08 // No setting now ++#define rOFDM1_CSI1 0xd10 ++#define rOFDM1_SBD 0xd14 ++#define rOFDM1_CSI2 0xd18 ++#define rOFDM1_CFOTracking 0xd2c ++#define rOFDM1_TRxMesaure1 0xd34 ++#define rOFDM1_IntfDet 0xd3c ++#define rOFDM1_PseudoNoiseStateAB 0xd50 ++#define rOFDM1_PseudoNoiseStateCD 0xd54 ++#define rOFDM1_RxPseudoNoiseWgt 0xd58 ++ ++#define rOFDM_PHYCounter1 0xda0 //cca, parity fail ++#define rOFDM_PHYCounter2 0xda4 //rate illegal, crc8 fail ++#define rOFDM_PHYCounter3 0xda8 //MCS not support ++ ++#define rOFDM_ShortCFOAB 0xdac // No setting now ++#define rOFDM_ShortCFOCD 0xdb0 ++#define rOFDM_LongCFOAB 0xdb4 ++#define rOFDM_LongCFOCD 0xdb8 ++#define rOFDM_TailCFOAB 0xdbc ++#define rOFDM_TailCFOCD 0xdc0 ++#define rOFDM_PWMeasure1 0xdc4 ++#define rOFDM_PWMeasure2 0xdc8 ++#define rOFDM_BWReport 0xdcc ++#define rOFDM_AGCReport 0xdd0 ++#define rOFDM_RxSNR 0xdd4 ++#define rOFDM_RxEVMCSI 0xdd8 ++#define rOFDM_SIGReport 0xddc ++ ++ ++// ++// 8. PageE(0xE00) ++// ++#define rTxAGC_Rate18_06 0xe00 ++#define rTxAGC_Rate54_24 0xe04 ++#define rTxAGC_CCK_Mcs32 0xe08 ++#define rTxAGC_Mcs03_Mcs00 0xe10 ++#define rTxAGC_Mcs07_Mcs04 0xe14 ++#define rTxAGC_Mcs11_Mcs08 0xe18 ++#define rTxAGC_Mcs15_Mcs12 0xe1c ++ ++// Analog- control in RX_WAIT_CCA : REG: EE0 [Analog- Power & Control Register] ++#define rRx_Wait_CCCA 0xe70 ++#define rAnapar_Ctrl_BB 0xee0 ++ ++// ++// 7. RF Register 0x00-0x2E (RF 8256) ++// RF-0222D 0x00-3F ++// ++//Zebra1 ++#define RTL92SE_FPGA_VERIFY 0 ++#define rZebra1_HSSIEnable 0x0 // Useless now ++#define rZebra1_TRxEnable1 0x1 ++#define rZebra1_TRxEnable2 0x2 ++#define rZebra1_AGC 0x4 ++#define rZebra1_ChargePump 0x5 ++//#if (RTL92SE_FPGA_VERIFY == 1) ++#define rZebra1_Channel 0x7 // RF channel switch ++//#else ++ ++//#endif ++#define rZebra1_TxGain 0x8 // Useless now ++#define rZebra1_TxLPF 0x9 ++#define rZebra1_RxLPF 0xb ++#define rZebra1_RxHPFCorner 0xc ++ ++//Zebra4 ++#define rGlobalCtrl 0 // Useless now ++#define rRTL8256_TxLPF 19 ++#define rRTL8256_RxLPF 11 ++ ++//RTL8258 ++#define rRTL8258_TxLPF 0x11 // Useless now ++#define rRTL8258_RxLPF 0x13 ++#define rRTL8258_RSSILPF 0xa ++ ++// ++// RL6052 Register definition ++// ++#define RF_AC 0x00 // ++ ++#define RF_IQADJ_G1 0x01 // ++#define RF_IQADJ_G2 0x02 // ++#define RF_POW_TRSW 0x05 // ++ ++#define RF_GAIN_RX 0x06 // ++#define RF_GAIN_TX 0x07 // ++ ++#define RF_TXM_IDAC 0x08 // ++#define RF_BS_IQGEN 0x0F // ++ ++#define RF_MODE1 0x10 // ++#define RF_MODE2 0x11 // ++ ++#define RF_RX_AGC_HP 0x12 // ++#define RF_TX_AGC 0x13 // ++#define RF_BIAS 0x14 // ++#define RF_IPA 0x15 // ++#define RF_POW_ABILITY 0x17 // ++#define RF_MODE_AG 0x18 // ++#define rRfChannel 0x18 // RF channel and BW switch ++#define RF_CHNLBW 0x18 // RF channel and BW switch ++#define RF_TOP 0x19 // ++ ++#define RF_RX_G1 0x1A // ++#define RF_RX_G2 0x1B // ++ ++#define RF_RX_BB2 0x1C // ++#define RF_RX_BB1 0x1D // ++ ++#define RF_RCK1 0x1E // ++#define RF_RCK2 0x1F // ++ ++#define RF_TX_G1 0x20 // ++#define RF_TX_G2 0x21 // ++#define RF_TX_G3 0x22 // ++ ++#define RF_TX_BB1 0x23 // ++ ++#define RF_T_METER 0x24 // ++ ++#define RF_SYN_G1 0x25 // RF TX Power control ++#define RF_SYN_G2 0x26 // RF TX Power control ++#define RF_SYN_G3 0x27 // RF TX Power control ++#define RF_SYN_G4 0x28 // RF TX Power control ++#define RF_SYN_G5 0x29 // RF TX Power control ++#define RF_SYN_G6 0x2A // RF TX Power control ++#define RF_SYN_G7 0x2B // RF TX Power control ++#define RF_SYN_G8 0x2C // RF TX Power control ++ ++#define RF_RCK_OS 0x30 // RF TX PA control ++ ++#define RF_TXPA_G1 0x31 // RF TX PA control ++#define RF_TXPA_G2 0x32 // RF TX PA control ++#define RF_TXPA_G3 0x33 // RF TX PA control ++ ++// ++//Bit Mask ++// ++// 1. Page1(0x100) ++#define bBBResetB 0x100 // Useless now? ++#define bGlobalResetB 0x200 ++#define bOFDMTxStart 0x4 ++#define bCCKTxStart 0x8 ++#define bCRC32Debug 0x100 ++#define bPMACLoopback 0x10 ++#define bTxLSIG 0xffffff ++#define bOFDMTxRate 0xf ++#define bOFDMTxReserved 0x10 ++#define bOFDMTxLength 0x1ffe0 ++#define bOFDMTxParity 0x20000 ++#define bTxHTSIG1 0xffffff ++#define bTxHTMCSRate 0x7f ++#define bTxHTBW 0x80 ++#define bTxHTLength 0xffff00 ++#define bTxHTSIG2 0xffffff ++#define bTxHTSmoothing 0x1 ++#define bTxHTSounding 0x2 ++#define bTxHTReserved 0x4 ++#define bTxHTAggreation 0x8 ++#define bTxHTSTBC 0x30 ++#define bTxHTAdvanceCoding 0x40 ++#define bTxHTShortGI 0x80 ++#define bTxHTNumberHT_LTF 0x300 ++#define bTxHTCRC8 0x3fc00 ++#define bCounterReset 0x10000 ++#define bNumOfOFDMTx 0xffff ++#define bNumOfCCKTx 0xffff0000 ++#define bTxIdleInterval 0xffff ++#define bOFDMService 0xffff0000 ++#define bTxMACHeader 0xffffffff ++#define bTxDataInit 0xff ++#define bTxHTMode 0x100 ++#define bTxDataType 0x30000 ++#define bTxRandomSeed 0xffffffff ++#define bCCKTxPreamble 0x1 ++#define bCCKTxSFD 0xffff0000 ++#define bCCKTxSIG 0xff ++#define bCCKTxService 0xff00 ++#define bCCKLengthExt 0x8000 ++#define bCCKTxLength 0xffff0000 ++#define bCCKTxCRC16 0xffff ++#define bCCKTxStatus 0x1 ++#define bOFDMTxStatus 0x2 ++ ++#define IS_BB_REG_OFFSET_92S(_Offset) ((_Offset >= 0x800) && (_Offset <= 0xfff)) ++ ++// 2. Page8(0x800) ++#define bRFMOD 0x1 // Reg 0x800 rFPGA0_RFMOD ++#define bJapanMode 0x2 ++#define bCCKTxSC 0x30 ++#define bCCKEn 0x1000000 ++#define bOFDMEn 0x2000000 ++ ++#define bOFDMRxADCPhase 0x10000 // Useless now ++#define bOFDMTxDACPhase 0x40000 ++#define bXATxAGC 0x3f ++ ++#define bXBTxAGC 0xf00 // Reg 80c rFPGA0_TxGainStage ++#define bXCTxAGC 0xf000 ++#define bXDTxAGC 0xf0000 ++ ++#define bPAStart 0xf0000000 // Useless now ++#define bTRStart 0x00f00000 ++#define bRFStart 0x0000f000 ++#define bBBStart 0x000000f0 ++#define bBBCCKStart 0x0000000f ++#define bPAEnd 0xf //Reg0x814 ++#define bTREnd 0x0f000000 ++#define bRFEnd 0x000f0000 ++#define bCCAMask 0x000000f0 //T2R ++#define bR2RCCAMask 0x00000f00 ++#define bHSSI_R2TDelay 0xf8000000 ++#define bHSSI_T2RDelay 0xf80000 ++#define bContTxHSSI 0x400 //chane gain at continue Tx ++#define bIGFromCCK 0x200 ++#define bAGCAddress 0x3f ++#define bRxHPTx 0x7000 ++#define bRxHPT2R 0x38000 ++#define bRxHPCCKIni 0xc0000 ++#define bAGCTxCode 0xc00000 ++#define bAGCRxCode 0x300000 ++ ++#define b3WireDataLength 0x800 // Reg 0x820~84f rFPGA0_XA_HSSIParameter1 ++#define b3WireAddressLength 0x400 ++ ++#define b3WireRFPowerDown 0x1 // Useless now ++//#define bHWSISelect 0x8 ++#define b5GPAPEPolarity 0x40000000 ++#define b2GPAPEPolarity 0x80000000 ++#define bRFSW_TxDefaultAnt 0x3 ++#define bRFSW_TxOptionAnt 0x30 ++#define bRFSW_RxDefaultAnt 0x300 ++#define bRFSW_RxOptionAnt 0x3000 ++#define bRFSI_3WireData 0x1 ++#define bRFSI_3WireClock 0x2 ++#define bRFSI_3WireLoad 0x4 ++#define bRFSI_3WireRW 0x8 ++#define bRFSI_3Wire 0xf ++ ++#define bRFSI_RFENV 0x10 // Reg 0x870 rFPGA0_XAB_RFInterfaceSW ++ ++#define bRFSI_TRSW 0x20 // Useless now ++#define bRFSI_TRSWB 0x40 ++#define bRFSI_ANTSW 0x100 ++#define bRFSI_ANTSWB 0x200 ++#define bRFSI_PAPE 0x400 ++#define bRFSI_PAPE5G 0x800 ++#define bBandSelect 0x1 ++#define bHTSIG2_GI 0x80 ++#define bHTSIG2_Smoothing 0x01 ++#define bHTSIG2_Sounding 0x02 ++#define bHTSIG2_Aggreaton 0x08 ++#define bHTSIG2_STBC 0x30 ++#define bHTSIG2_AdvCoding 0x40 ++#define bHTSIG2_NumOfHTLTF 0x300 ++#define bHTSIG2_CRC8 0x3fc ++#define bHTSIG1_MCS 0x7f ++#define bHTSIG1_BandWidth 0x80 ++#define bHTSIG1_HTLength 0xffff ++#define bLSIG_Rate 0xf ++#define bLSIG_Reserved 0x10 ++#define bLSIG_Length 0x1fffe ++#define bLSIG_Parity 0x20 ++#define bCCKRxPhase 0x4 ++#if (RTL92SE_FPGA_VERIFY == 1) ++#define bLSSIReadAddress 0x3f000000 //LSSI "Read" Address // Reg 0x824 rFPGA0_XA_HSSIParameter2 ++#else ++#define bLSSIReadAddress 0x7f800000 // T65 RF ++#endif ++#define bLSSIReadEdge 0x80000000 //LSSI "Read" edge signal ++#if (RTL92SE_FPGA_VERIFY == 1) ++#define bLSSIReadBackData 0xfff // Reg 0x8a0 rFPGA0_XA_LSSIReadBack ++#else ++#define bLSSIReadBackData 0xfffff // T65 RF ++#endif ++#define bLSSIReadOKFlag 0x1000 // Useless now ++#define bCCKSampleRate 0x8 //0: 44MHz, 1:88MHz ++#define bRegulator0Standby 0x1 ++#define bRegulatorPLLStandby 0x2 ++#define bRegulator1Standby 0x4 ++#define bPLLPowerUp 0x8 ++#define bDPLLPowerUp 0x10 ++#define bDA10PowerUp 0x20 ++#define bAD7PowerUp 0x200 ++#define bDA6PowerUp 0x2000 ++#define bXtalPowerUp 0x4000 ++#define b40MDClkPowerUP 0x8000 ++#define bDA6DebugMode 0x20000 ++#define bDA6Swing 0x380000 ++ ++#define bADClkPhase 0x4000000 // Reg 0x880 rFPGA0_AnalogParameter1 20/40 CCK support switch 40/80 BB MHZ ++ ++#define b80MClkDelay 0x18000000 // Useless ++#define bAFEWatchDogEnable 0x20000000 ++ ++#define bXtalCap01 0xc0000000 // Reg 0x884 rFPGA0_AnalogParameter2 Crystal cap ++#define bXtalCap23 0x3 ++#define bXtalCap92x 0x0f000000 ++#define bXtalCap 0x0f000000 ++ ++#define bIntDifClkEnable 0x400 // Useless ++#define bExtSigClkEnable 0x800 ++#define bBandgapMbiasPowerUp 0x10000 ++#define bAD11SHGain 0xc0000 ++#define bAD11InputRange 0x700000 ++#define bAD11OPCurrent 0x3800000 ++#define bIPathLoopback 0x4000000 ++#define bQPathLoopback 0x8000000 ++#define bAFELoopback 0x10000000 ++#define bDA10Swing 0x7e0 ++#define bDA10Reverse 0x800 ++#define bDAClkSource 0x1000 ++#define bAD7InputRange 0x6000 ++#define bAD7Gain 0x38000 ++#define bAD7OutputCMMode 0x40000 ++#define bAD7InputCMMode 0x380000 ++#define bAD7Current 0xc00000 ++#define bRegulatorAdjust 0x7000000 ++#define bAD11PowerUpAtTx 0x1 ++#define bDA10PSAtTx 0x10 ++#define bAD11PowerUpAtRx 0x100 ++#define bDA10PSAtRx 0x1000 ++#define bCCKRxAGCFormat 0x200 ++#define bPSDFFTSamplepPoint 0xc000 ++#define bPSDAverageNum 0x3000 ++#define bIQPathControl 0xc00 ++#define bPSDFreq 0x3ff ++#define bPSDAntennaPath 0x30 ++#define bPSDIQSwitch 0x40 ++#define bPSDRxTrigger 0x400000 ++#define bPSDTxTrigger 0x80000000 ++#define bPSDSineToneScale 0x7f000000 ++#define bPSDReport 0xffff ++ ++// 3. Page9(0x900) ++#define bOFDMTxSC 0x30000000 // Useless ++#define bCCKTxOn 0x1 ++#define bOFDMTxOn 0x2 ++#define bDebugPage 0xfff //reset debug page and also HWord, LWord ++#define bDebugItem 0xff //reset debug page and LWord ++#define bAntL 0x10 ++#define bAntNonHT 0x100 ++#define bAntHT1 0x1000 ++#define bAntHT2 0x10000 ++#define bAntHT1S1 0x100000 ++#define bAntNonHTS1 0x1000000 ++ ++// 4. PageA(0xA00) ++#define bCCKBBMode 0x3 // Useless ++#define bCCKTxPowerSaving 0x80 ++#define bCCKRxPowerSaving 0x40 ++ ++#define bCCKSideBand 0x10 // Reg 0xa00 rCCK0_System 20/40 switch ++ ++#define bCCKScramble 0x8 // Useless ++#define bCCKAntDiversity 0x8000 ++#define bCCKCarrierRecovery 0x4000 ++#define bCCKTxRate 0x3000 ++#define bCCKDCCancel 0x0800 ++#define bCCKISICancel 0x0400 ++#define bCCKMatchFilter 0x0200 ++#define bCCKEqualizer 0x0100 ++#define bCCKPreambleDetect 0x800000 ++#define bCCKFastFalseCCA 0x400000 ++#define bCCKChEstStart 0x300000 ++#define bCCKCCACount 0x080000 ++#define bCCKcs_lim 0x070000 ++#define bCCKBistMode 0x80000000 ++#define bCCKCCAMask 0x40000000 ++#define bCCKTxDACPhase 0x4 ++#define bCCKRxADCPhase 0x20000000 //r_rx_clk ++#define bCCKr_cp_mode0 0x0100 ++#define bCCKTxDCOffset 0xf0 ++#define bCCKRxDCOffset 0xf ++#define bCCKCCAMode 0xc000 ++#define bCCKFalseCS_lim 0x3f00 ++#define bCCKCS_ratio 0xc00000 ++#define bCCKCorgBit_sel 0x300000 ++#define bCCKPD_lim 0x0f0000 ++#define bCCKNewCCA 0x80000000 ++#define bCCKRxHPofIG 0x8000 ++#define bCCKRxIG 0x7f00 ++#define bCCKLNAPolarity 0x800000 ++#define bCCKRx1stGain 0x7f0000 ++#define bCCKRFExtend 0x20000000 //CCK Rx Iinital gain polarity ++#define bCCKRxAGCSatLevel 0x1f000000 ++#define bCCKRxAGCSatCount 0xe0 ++#define bCCKRxRFSettle 0x1f //AGCsamp_dly ++#define bCCKFixedRxAGC 0x8000 ++//#define bCCKRxAGCFormat 0x4000 //remove to HSSI register 0x824 ++#define bCCKAntennaPolarity 0x2000 ++#define bCCKTxFilterType 0x0c00 ++#define bCCKRxAGCReportType 0x0300 ++#define bCCKRxDAGCEn 0x80000000 ++#define bCCKRxDAGCPeriod 0x20000000 ++#define bCCKRxDAGCSatLevel 0x1f000000 ++#define bCCKTimingRecovery 0x800000 ++#define bCCKTxC0 0x3f0000 ++#define bCCKTxC1 0x3f000000 ++#define bCCKTxC2 0x3f ++#define bCCKTxC3 0x3f00 ++#define bCCKTxC4 0x3f0000 ++#define bCCKTxC5 0x3f000000 ++#define bCCKTxC6 0x3f ++#define bCCKTxC7 0x3f00 ++#define bCCKDebugPort 0xff0000 ++#define bCCKDACDebug 0x0f000000 ++#define bCCKFalseAlarmEnable 0x8000 ++#define bCCKFalseAlarmRead 0x4000 ++#define bCCKTRSSI 0x7f ++#define bCCKRxAGCReport 0xfe ++#define bCCKRxReport_AntSel 0x80000000 ++#define bCCKRxReport_MFOff 0x40000000 ++#define bCCKRxRxReport_SQLoss 0x20000000 ++#define bCCKRxReport_Pktloss 0x10000000 ++#define bCCKRxReport_Lockedbit 0x08000000 ++#define bCCKRxReport_RateError 0x04000000 ++#define bCCKRxReport_RxRate 0x03000000 ++#define bCCKRxFACounterLower 0xff ++#define bCCKRxFACounterUpper 0xff000000 ++#define bCCKRxHPAGCStart 0xe000 ++#define bCCKRxHPAGCFinal 0x1c00 ++#define bCCKRxFalseAlarmEnable 0x8000 ++#define bCCKFACounterFreeze 0x4000 ++#define bCCKTxPathSel 0x10000000 ++#define bCCKDefaultRxPath 0xc000000 ++#define bCCKOptionRxPath 0x3000000 ++ ++// 5. PageC(0xC00) ++#define bNumOfSTF 0x3 // Useless ++#define bShift_L 0xc0 ++#define bGI_TH 0xc ++#define bRxPathA 0x1 ++#define bRxPathB 0x2 ++#define bRxPathC 0x4 ++#define bRxPathD 0x8 ++#define bTxPathA 0x1 ++#define bTxPathB 0x2 ++#define bTxPathC 0x4 ++#define bTxPathD 0x8 ++#define bTRSSIFreq 0x200 ++#define bADCBackoff 0x3000 ++#define bDFIRBackoff 0xc000 ++#define bTRSSILatchPhase 0x10000 ++#define bRxIDCOffset 0xff ++#define bRxQDCOffset 0xff00 ++#define bRxDFIRMode 0x1800000 ++#define bRxDCNFType 0xe000000 ++#define bRXIQImb_A 0x3ff ++#define bRXIQImb_B 0xfc00 ++#define bRXIQImb_C 0x3f0000 ++#define bRXIQImb_D 0xffc00000 ++#define bDC_dc_Notch 0x60000 ++#define bRxNBINotch 0x1f000000 ++#define bPD_TH 0xf ++#define bPD_TH_Opt2 0xc000 ++#define bPWED_TH 0x700 ++#define bIfMF_Win_L 0x800 ++#define bPD_Option 0x1000 ++#define bMF_Win_L 0xe000 ++#define bBW_Search_L 0x30000 ++#define bwin_enh_L 0xc0000 ++#define bBW_TH 0x700000 ++#define bED_TH2 0x3800000 ++#define bBW_option 0x4000000 ++#define bRatio_TH 0x18000000 ++#define bWindow_L 0xe0000000 ++#define bSBD_Option 0x1 ++#define bFrame_TH 0x1c ++#define bFS_Option 0x60 ++#define bDC_Slope_check 0x80 ++#define bFGuard_Counter_DC_L 0xe00 ++#define bFrame_Weight_Short 0x7000 ++#define bSub_Tune 0xe00000 ++#define bFrame_DC_Length 0xe000000 ++#define bSBD_start_offset 0x30000000 ++#define bFrame_TH_2 0x7 ++#define bFrame_GI2_TH 0x38 ++#define bGI2_Sync_en 0x40 ++#define bSarch_Short_Early 0x300 ++#define bSarch_Short_Late 0xc00 ++#define bSarch_GI2_Late 0x70000 ++#define bCFOAntSum 0x1 ++#define bCFOAcc 0x2 ++#define bCFOStartOffset 0xc ++#define bCFOLookBack 0x70 ++#define bCFOSumWeight 0x80 ++#define bDAGCEnable 0x10000 ++#define bTXIQImb_A 0x3ff ++#define bTXIQImb_B 0xfc00 ++#define bTXIQImb_C 0x3f0000 ++#define bTXIQImb_D 0xffc00000 ++#define bTxIDCOffset 0xff ++#define bTxQDCOffset 0xff00 ++#define bTxDFIRMode 0x10000 ++#define bTxPesudoNoiseOn 0x4000000 ++#define bTxPesudoNoise_A 0xff ++#define bTxPesudoNoise_B 0xff00 ++#define bTxPesudoNoise_C 0xff0000 ++#define bTxPesudoNoise_D 0xff000000 ++#define bCCADropOption 0x20000 ++#define bCCADropThres 0xfff00000 ++#define bEDCCA_H 0xf ++#define bEDCCA_L 0xf0 ++#define bLambda_ED 0x300 ++#define bRxInitialGain 0x7f ++#define bRxAntDivEn 0x80 ++#define bRxAGCAddressForLNA 0x7f00 ++#define bRxHighPowerFlow 0x8000 ++#define bRxAGCFreezeThres 0xc0000 ++#define bRxFreezeStep_AGC1 0x300000 ++#define bRxFreezeStep_AGC2 0xc00000 ++#define bRxFreezeStep_AGC3 0x3000000 ++#define bRxFreezeStep_AGC0 0xc000000 ++#define bRxRssi_Cmp_En 0x10000000 ++#define bRxQuickAGCEn 0x20000000 ++#define bRxAGCFreezeThresMode 0x40000000 ++#define bRxOverFlowCheckType 0x80000000 ++#define bRxAGCShift 0x7f ++#define bTRSW_Tri_Only 0x80 ++#define bPowerThres 0x300 ++#define bRxAGCEn 0x1 ++#define bRxAGCTogetherEn 0x2 ++#define bRxAGCMin 0x4 ++#define bRxHP_Ini 0x7 ++#define bRxHP_TRLNA 0x70 ++#define bRxHP_RSSI 0x700 ++#define bRxHP_BBP1 0x7000 ++#define bRxHP_BBP2 0x70000 ++#define bRxHP_BBP3 0x700000 ++#define bRSSI_H 0x7f0000 //the threshold for high power ++#define bRSSI_Gen 0x7f000000 //the threshold for ant diversity ++#define bRxSettle_TRSW 0x7 ++#define bRxSettle_LNA 0x38 ++#define bRxSettle_RSSI 0x1c0 ++#define bRxSettle_BBP 0xe00 ++#define bRxSettle_RxHP 0x7000 ++#define bRxSettle_AntSW_RSSI 0x38000 ++#define bRxSettle_AntSW 0xc0000 ++#define bRxProcessTime_DAGC 0x300000 ++#define bRxSettle_HSSI 0x400000 ++#define bRxProcessTime_BBPPW 0x800000 ++#define bRxAntennaPowerShift 0x3000000 ++#define bRSSITableSelect 0xc000000 ++#define bRxHP_Final 0x7000000 ++#define bRxHTSettle_BBP 0x7 ++#define bRxHTSettle_HSSI 0x8 ++#define bRxHTSettle_RxHP 0x70 ++#define bRxHTSettle_BBPPW 0x80 ++#define bRxHTSettle_Idle 0x300 ++#define bRxHTSettle_Reserved 0x1c00 ++#define bRxHTRxHPEn 0x8000 ++#define bRxHTAGCFreezeThres 0x30000 ++#define bRxHTAGCTogetherEn 0x40000 ++#define bRxHTAGCMin 0x80000 ++#define bRxHTAGCEn 0x100000 ++#define bRxHTDAGCEn 0x200000 ++#define bRxHTRxHP_BBP 0x1c00000 ++#define bRxHTRxHP_Final 0xe0000000 ++#define bRxPWRatioTH 0x3 ++#define bRxPWRatioEn 0x4 ++#define bRxMFHold 0x3800 ++#define bRxPD_Delay_TH1 0x38 ++#define bRxPD_Delay_TH2 0x1c0 ++#define bRxPD_DC_COUNT_MAX 0x600 ++//#define bRxMF_Hold 0x3800 ++#define bRxPD_Delay_TH 0x8000 ++#define bRxProcess_Delay 0xf0000 ++#define bRxSearchrange_GI2_Early 0x700000 ++#define bRxFrame_Guard_Counter_L 0x3800000 ++#define bRxSGI_Guard_L 0xc000000 ++#define bRxSGI_Search_L 0x30000000 ++#define bRxSGI_TH 0xc0000000 ++#define bDFSCnt0 0xff ++#define bDFSCnt1 0xff00 ++#define bDFSFlag 0xf0000 ++#define bMFWeightSum 0x300000 ++#define bMinIdxTH 0x7f000000 ++#define bDAFormat 0x40000 ++#define bTxChEmuEnable 0x01000000 ++#define bTRSWIsolation_A 0x7f ++#define bTRSWIsolation_B 0x7f00 ++#define bTRSWIsolation_C 0x7f0000 ++#define bTRSWIsolation_D 0x7f000000 ++#define bExtLNAGain 0x7c00 ++ ++// 6. PageE(0xE00) ++#define bSTBCEn 0x4 // Useless ++#define bAntennaMapping 0x10 ++#define bNss 0x20 ++#define bCFOAntSumD 0x200 ++#define bPHYCounterReset 0x8000000 ++#define bCFOReportGet 0x4000000 ++#define bOFDMContinueTx 0x10000000 ++#define bOFDMSingleCarrier 0x20000000 ++#define bOFDMSingleTone 0x40000000 ++//#define bRxPath1 0x01 ++//#define bRxPath2 0x02 ++//#define bRxPath3 0x04 ++//#define bRxPath4 0x08 ++//#define bTxPath1 0x10 ++//#define bTxPath2 0x20 ++#define bHTDetect 0x100 ++#define bCFOEn 0x10000 ++#define bCFOValue 0xfff00000 ++#define bSigTone_Re 0x3f ++#define bSigTone_Im 0x7f00 ++#define bCounter_CCA 0xffff ++#define bCounter_ParityFail 0xffff0000 ++#define bCounter_RateIllegal 0xffff ++#define bCounter_CRC8Fail 0xffff0000 ++#define bCounter_MCSNoSupport 0xffff ++#define bCounter_FastSync 0xffff ++#define bShortCFO 0xfff ++#define bShortCFOTLength 12 //total ++#define bShortCFOFLength 11 //fraction ++#define bLongCFO 0x7ff ++#define bLongCFOTLength 11 ++#define bLongCFOFLength 11 ++#define bTailCFO 0x1fff ++#define bTailCFOTLength 13 ++#define bTailCFOFLength 12 ++#define bmax_en_pwdB 0xffff ++#define bCC_power_dB 0xffff0000 ++#define bnoise_pwdB 0xffff ++#define bPowerMeasTLength 10 ++#define bPowerMeasFLength 3 ++#define bRx_HT_BW 0x1 ++#define bRxSC 0x6 ++#define bRx_HT 0x8 ++#define bNB_intf_det_on 0x1 ++#define bIntf_win_len_cfg 0x30 ++#define bNB_Intf_TH_cfg 0x1c0 ++#define bRFGain 0x3f ++#define bTableSel 0x40 ++#define bTRSW 0x80 ++#define bRxSNR_A 0xff ++#define bRxSNR_B 0xff00 ++#define bRxSNR_C 0xff0000 ++#define bRxSNR_D 0xff000000 ++#define bSNREVMTLength 8 ++#define bSNREVMFLength 1 ++#define bCSI1st 0xff ++#define bCSI2nd 0xff00 ++#define bRxEVM1st 0xff0000 ++#define bRxEVM2nd 0xff000000 ++#define bSIGEVM 0xff ++#define bPWDB 0xff00 ++#define bSGIEN 0x10000 ++ ++#define bSFactorQAM1 0xf // Useless ++#define bSFactorQAM2 0xf0 ++#define bSFactorQAM3 0xf00 ++#define bSFactorQAM4 0xf000 ++#define bSFactorQAM5 0xf0000 ++#define bSFactorQAM6 0xf0000 ++#define bSFactorQAM7 0xf00000 ++#define bSFactorQAM8 0xf000000 ++#define bSFactorQAM9 0xf0000000 ++#define bCSIScheme 0x100000 ++ ++#define bNoiseLvlTopSet 0x3 // Useless ++#define bChSmooth 0x4 ++#define bChSmoothCfg1 0x38 ++#define bChSmoothCfg2 0x1c0 ++#define bChSmoothCfg3 0xe00 ++#define bChSmoothCfg4 0x7000 ++#define bMRCMode 0x800000 ++#define bTHEVMCfg 0x7000000 ++ ++#define bLoopFitType 0x1 // Useless ++#define bUpdCFO 0x40 ++#define bUpdCFOOffData 0x80 ++#define bAdvUpdCFO 0x100 ++#define bAdvTimeCtrl 0x800 ++#define bUpdClko 0x1000 ++#define bFC 0x6000 ++#define bTrackingMode 0x8000 ++#define bPhCmpEnable 0x10000 ++#define bUpdClkoLTF 0x20000 ++#define bComChCFO 0x40000 ++#define bCSIEstiMode 0x80000 ++#define bAdvUpdEqz 0x100000 ++#define bUChCfg 0x7000000 ++#define bUpdEqz 0x8000000 ++ ++#define bTxAGCRate18_06 0x7f7f7f7f // Useless ++#define bTxAGCRate54_24 0x7f7f7f7f ++#define bTxAGCRateMCS32 0x7f ++#define bTxAGCRateCCK 0x7f00 ++#define bTxAGCRateMCS3_MCS0 0x7f7f7f7f ++#define bTxAGCRateMCS7_MCS4 0x7f7f7f7f ++#define bTxAGCRateMCS11_MCS8 0x7f7f7f7f ++#define bTxAGCRateMCS15_MCS12 0x7f7f7f7f ++ ++//Rx Pseduo noise ++#define bRxPesudoNoiseOn 0x20000000 // Useless ++#define bRxPesudoNoise_A 0xff ++#define bRxPesudoNoise_B 0xff00 ++#define bRxPesudoNoise_C 0xff0000 ++#define bRxPesudoNoise_D 0xff000000 ++#define bPesudoNoiseState_A 0xffff ++#define bPesudoNoiseState_B 0xffff0000 ++#define bPesudoNoiseState_C 0xffff ++#define bPesudoNoiseState_D 0xffff0000 ++ ++//7. RF Register ++//Zebra1 ++#define bZebra1_HSSIEnable 0x8 // Useless ++#define bZebra1_TRxControl 0xc00 ++#define bZebra1_TRxGainSetting 0x07f ++#define bZebra1_RxCorner 0xc00 ++#define bZebra1_TxChargePump 0x38 ++#define bZebra1_RxChargePump 0x7 ++#define bZebra1_ChannelNum 0xf80 ++#define bZebra1_TxLPFBW 0x400 ++#define bZebra1_RxLPFBW 0x600 ++ ++//Zebra4 ++#define bRTL8256RegModeCtrl1 0x100 // Useless ++#define bRTL8256RegModeCtrl0 0x40 ++#define bRTL8256_TxLPFBW 0x18 ++#define bRTL8256_RxLPFBW 0x600 ++ ++//RTL8258 ++#define bRTL8258_TxLPFBW 0xc // Useless ++#define bRTL8258_RxLPFBW 0xc00 ++#define bRTL8258_RSSILPFBW 0xc0 ++ ++ ++// ++// Other Definition ++// ++ ++//byte endable for sb_write ++#define bByte0 0x1 // Useless ++#define bByte1 0x2 ++#define bByte2 0x4 ++#define bByte3 0x8 ++#define bWord0 0x3 ++#define bWord1 0xc ++#define bDWord 0xf ++ ++//for PutRegsetting & GetRegSetting BitMask ++#define bMaskByte0 0xff // Reg 0xc50 rOFDM0_XAAGCCore~0xC6f ++#define bMaskByte1 0xff00 ++#define bMaskByte2 0xff0000 ++#define bMaskByte3 0xff000000 ++#define bMaskHWord 0xffff0000 ++#define bMaskLWord 0x0000ffff ++#define bMaskDWord 0xffffffff ++#define bMaskH4Bits 0xf0000000 ++#define bMaskOFDM_D 0xffc00000 ++#define bMaskCCK 0x3f3f3f3f ++#define bMask12Bits 0xfff ++ ++//for PutRFRegsetting & GetRFRegSetting BitMask ++#if (RTL92SE_FPGA_VERIFY == 1) ++//#define bMask12Bits 0xfff // RF Reg mask bits ++//#define bMask20Bits 0xfff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfff ++#else ++//#define bMask12Bits 0xfffff // RF Reg mask bits ++//#define bMask20Bits 0xfffff // RF Reg mask bits T65 RF ++#define bRFRegOffsetMask 0xfffff ++#endif ++#define bEnable 0x1 // Useless ++#define bDisable 0x0 ++ ++#define LeftAntenna 0x0 // Useless ++#define RightAntenna 0x1 ++ ++#define tCheckTxStatus 500 //500ms // Useless ++#define tUpdateRxCounter 100 //100ms ++ ++#define rateCCK 0 // Useless ++#define rateOFDM 1 ++#define rateHT 2 ++ ++//define Register-End ++#define bPMAC_End 0x1ff // Useless ++#define bFPGAPHY0_End 0x8ff ++#define bFPGAPHY1_End 0x9ff ++#define bCCKPHY0_End 0xaff ++#define bOFDMPHY0_End 0xcff ++#define bOFDMPHY1_End 0xdff ++ ++//define max debug item in each debug page ++//#define bMaxItem_FPGA_PHY0 0x9 ++//#define bMaxItem_FPGA_PHY1 0x3 ++//#define bMaxItem_PHY_11B 0x16 ++//#define bMaxItem_OFDM_PHY0 0x29 ++//#define bMaxItem_OFDM_PHY1 0x0 ++ ++#define bPMACControl 0x0 // Useless ++#define bWMACControl 0x1 ++#define bWNICControl 0x2 ++ ++#if 0 ++#define ANTENNA_A 0x1 // Useless ++#define ANTENNA_B 0x2 ++#define ANTENNA_AB 0x3 // ANTENNA_A|ANTENNA_B ++ ++#define ANTENNA_C 0x4 ++#define ANTENNA_D 0x8 ++#endif ++ ++#define RCR_AAP BIT(0) // accept all physical address ++#define RCR_APM BIT(1) // accept physical match ++#define RCR_AM BIT(2) // accept multicast ++#define RCR_AB BIT(3) // accept broadcast ++#define RCR_ACRC32 BIT(5) // accept error packet ++#define RCR_9356SEL BIT(6) ++#define RCR_AICV BIT(12) // Accept ICV error packet ++#define RCR_RXFTH0 (BIT(13)|BIT(14)|BIT(15)) // Rx FIFO threshold ++#define RCR_ADF BIT(18) // Accept Data(frame type) frame ++#define RCR_ACF BIT(19) // Accept control frame ++#define RCR_AMF BIT(20) // Accept management frame ++#define RCR_ADD3 BIT(21) ++#define RCR_APWRMGT BIT(22) // Accept power management packet ++#define RCR_CBSSID BIT(23) // Accept BSSID match packet ++#define RCR_ENMARP BIT(28) // enable mac auto reset phy ++#define RCR_EnCS1 BIT(29) // enable carrier sense method 1 ++#define RCR_EnCS2 BIT(30) // enable carrier sense method 2 ++#define RCR_OnlyErlPkt BIT(31) // Rx Early mode is performed for packet size greater than 1536 ++ ++/*--------------------------Define Parameters-------------------------------*/ ++ ++ ++#endif //__INC_HAL8192SPHYREG_H ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_p2p.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,151 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#ifndef __RTW_P2P_H_ ++#define __RTW_P2P_H_ ++ ++#include ++ ++u32 build_beacon_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_probe_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_prov_disc_request_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8* pssid, u8 ussidlen, u8* pdev_raddr ); ++u32 build_assoc_resp_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf, u8 status_code); ++u32 build_deauth_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++#ifdef CONFIG_WFD ++u32 build_probe_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_probe_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_beacon_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_nego_confirm_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_assoc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_assoc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_provdisc_req_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++u32 build_provdisc_resp_wfd_ie(struct wifidirect_info *pwdinfo, u8 *pbuf); ++#endif //CONFIG_WFD ++ ++u32 process_probe_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u32 process_assoc_req_p2p_ie(struct wifidirect_info *pwdinfo, u8 *pframe, uint len, struct sta_info *psta); ++u32 process_p2p_devdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u32 process_p2p_devdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u8 process_p2p_provdisc_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++u8 process_p2p_provdisc_resp(struct wifidirect_info *pwdinfo, u8 *pframe); ++u8 process_p2p_group_negotation_req( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_group_negotation_resp( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_group_negotation_confirm( struct wifidirect_info *pwdinfo, u8 *pframe, uint len ); ++u8 process_p2p_presence_req(struct wifidirect_info *pwdinfo, u8 *pframe, uint len); ++ ++void process_p2p_ps_ie(PADAPTER padapter, u8 *IEs, u32 IELength); ++void p2p_ps_wk_hdl(_adapter *padapter, u8 p2p_ps_state); ++void p2p_protocol_wk_hdl(_adapter *padapter, int intCmdType); ++u8 p2p_ps_wk_cmd(_adapter*padapter, u8 p2p_ps_state, u8 enqueue); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++void rtw_init_cfg80211_wifidirect_info( _adapter* padapter); ++int rtw_p2p_check_frames(_adapter *padapter, const u8 *buf, u32 len, u8 tx); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++void init_wifidirect_info( _adapter* padapter, enum P2P_ROLE role); ++int rtw_p2p_enable(_adapter *padapter, enum P2P_ROLE role); ++ ++static inline void _rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ if(wdinfo->p2p_state != state) { ++ //wdinfo->pre_p2p_state = wdinfo->p2p_state; ++ wdinfo->p2p_state = state; ++ } ++} ++static inline void _rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ if(wdinfo->pre_p2p_state != state) { ++ wdinfo->pre_p2p_state = state; ++ } ++} ++#if 0 ++static inline void _rtw_p2p_restore_state(struct wifidirect_info *wdinfo) ++{ ++ if(wdinfo->pre_p2p_state != -1) { ++ wdinfo->p2p_state = wdinfo->pre_p2p_state; ++ wdinfo->pre_p2p_state = -1; ++ } ++} ++#endif ++static inline void _rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) ++{ ++ if(wdinfo->role != role) { ++ wdinfo->role = role; ++ } ++} ++static inline int _rtw_p2p_state(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->p2p_state; ++} ++static inline int _rtw_p2p_pre_state(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->pre_p2p_state; ++} ++static inline int _rtw_p2p_role(struct wifidirect_info *wdinfo) ++{ ++ return wdinfo->role; ++} ++static inline bool _rtw_p2p_chk_state(struct wifidirect_info *wdinfo, enum P2P_STATE state) ++{ ++ return wdinfo->p2p_state == state; ++} ++static inline bool _rtw_p2p_chk_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role) ++{ ++ return wdinfo->role == role; ++} ++ ++#ifdef CONFIG_DBG_P2P ++void dbg_rtw_p2p_set_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); ++void dbg_rtw_p2p_set_pre_state(struct wifidirect_info *wdinfo, enum P2P_STATE state, const char *caller, int line); ++//void dbg_rtw_p2p_restore_state(struct wifidirect_info *wdinfo, const char *caller, int line); ++void dbg_rtw_p2p_set_role(struct wifidirect_info *wdinfo, enum P2P_ROLE role, const char *caller, int line); ++#define rtw_p2p_set_state(wdinfo, state) dbg_rtw_p2p_set_state(wdinfo, state, __FUNCTION__, __LINE__) ++#define rtw_p2p_set_pre_state(wdinfo, state) dbg_rtw_p2p_set_pre_state(wdinfo, state, __FUNCTION__, __LINE__) ++#define rtw_p2p_set_role(wdinfo, role) dbg_rtw_p2p_set_role(wdinfo, role, __FUNCTION__, __LINE__) ++//#define rtw_p2p_restore_state(wdinfo) dbg_rtw_p2p_restore_state(wdinfo, __FUNCTION__, __LINE__) ++#else //CONFIG_DBG_P2P ++#define rtw_p2p_set_state(wdinfo, state) _rtw_p2p_set_state(wdinfo, state) ++#define rtw_p2p_set_pre_state(wdinfo, state) _rtw_p2p_set_pre_state(wdinfo, state) ++#define rtw_p2p_set_role(wdinfo, role) _rtw_p2p_set_role(wdinfo, role) ++//#define rtw_p2p_restore_state(wdinfo) _rtw_p2p_restore_state(wdinfo) ++#endif //CONFIG_DBG_P2P ++ ++#define rtw_p2p_state(wdinfo) _rtw_p2p_state(wdinfo) ++#define rtw_p2p_pre_state(wdinfo) _rtw_p2p_pre_state(wdinfo) ++#define rtw_p2p_role(wdinfo) _rtw_p2p_role(wdinfo) ++#define rtw_p2p_chk_state(wdinfo, state) _rtw_p2p_chk_state(wdinfo, state) ++#define rtw_p2p_chk_role(wdinfo, role) _rtw_p2p_chk_role(wdinfo, role) ++ ++#define rtw_p2p_findphase_ex_set(wdinfo, value) \ ++ (wdinfo)->find_phase_state_exchange_cnt = (value) ++ ++//is this find phase exchange for social channel scan? ++#define rtw_p2p_findphase_ex_is_social(wdinfo) \ ++ (wdinfo)->find_phase_state_exchange_cnt >= P2P_FINDPHASE_EX_SOCIAL_FIRST ++ ++//should we need find phase exchange anymore? ++#define rtw_p2p_findphase_ex_is_needed(wdinfo) \ ++ ((wdinfo)->find_phase_state_exchange_cnt < P2P_FINDPHASE_EX_MAX && \ ++ (wdinfo)->find_phase_state_exchange_cnt != P2P_FINDPHASE_EX_NONE) ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_pwrctrl.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_pwrctrl.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,343 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_PWRCTRL_H_ ++#define __RTW_PWRCTRL_H_ ++ ++#include ++#include ++#include ++ ++#ifdef CONFIG_HAS_EARLYSUSPEND ++#include ++#endif //CONFIG_HAS_EARLYSUSPEND ++ ++ ++#define FW_PWR0 0 ++#define FW_PWR1 1 ++#define FW_PWR2 2 ++#define FW_PWR3 3 ++ ++ ++#define HW_PWR0 7 ++#define HW_PWR1 6 ++#define HW_PWR2 2 ++#define HW_PWR3 0 ++#define HW_PWR4 8 ++ ++#define FW_PWRMSK 0x7 ++ ++ ++#define XMIT_ALIVE BIT(0) ++#define RECV_ALIVE BIT(1) ++#define CMD_ALIVE BIT(2) ++#define EVT_ALIVE BIT(3) ++ ++ ++enum Power_Mgnt ++{ ++ PS_MODE_ACTIVE = 0 , ++ PS_MODE_MIN , ++ PS_MODE_MAX , ++ PS_MODE_DTIM , ++ PS_MODE_VOIP , ++ PS_MODE_UAPSD_WMM , ++ PS_MODE_UAPSD , ++ PS_MODE_IBSS , ++ PS_MODE_WWLAN , ++ PM_Radio_Off , ++ PM_Card_Disable , ++ PS_MODE_NUM ++}; ++ ++ ++/* ++ BIT[2:0] = HW state ++ BIT[3] = Protocol PS state, 0: register active state , 1: register sleep state ++ BIT[4] = sub-state ++*/ ++ ++#define PS_DPS BIT(0) ++#define PS_LCLK (PS_DPS) ++#define PS_RF_OFF BIT(1) ++#define PS_ALL_ON BIT(2) ++#define PS_ST_ACTIVE BIT(3) ++#define PS_LP BIT(4) // low performance ++ ++#define PS_STATE_MASK (0x0F) ++#define PS_STATE_HW_MASK (0x07) ++#define PS_SEQ_MASK (0xc0) ++ ++#define PS_STATE(x) (PS_STATE_MASK & (x)) ++#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x)) ++#define PS_SEQ(x) (PS_SEQ_MASK & (x)) ++ ++#define PS_STATE_S0 (PS_DPS) ++#define PS_STATE_S1 (PS_LCLK) ++#define PS_STATE_S2 (PS_RF_OFF) ++#define PS_STATE_S3 (PS_ALL_ON) ++#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON)) ++ ++ ++#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON)) ++#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE)) ++#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0))) ++ ++ ++struct reportpwrstate_parm { ++ unsigned char mode; ++ unsigned char state; //the CPWM value ++ unsigned short rsvd; ++}; ++ ++ ++typedef _sema _pwrlock; ++ ++ ++__inline static void _init_pwrlock(_pwrlock *plock) ++{ ++ _rtw_init_sema(plock, 1); ++} ++ ++__inline static void _free_pwrlock(_pwrlock *plock) ++{ ++ _rtw_free_sema(plock); ++} ++ ++ ++__inline static void _enter_pwrlock(_pwrlock *plock) ++{ ++ _rtw_down_sema(plock); ++} ++ ++ ++__inline static void _exit_pwrlock(_pwrlock *plock) ++{ ++ _rtw_up_sema(plock); ++} ++ ++#define LPS_DELAY_TIME 1*HZ // 1 sec ++ ++#define EXE_PWR_NONE 0x01 ++#define EXE_PWR_IPS 0x02 ++#define EXE_PWR_LPS 0x04 ++ ++// RF state. ++typedef enum _rt_rf_power_state ++{ ++ rf_on, // RF is on after RFSleep or RFOff ++ rf_sleep, // 802.11 Power Save mode ++ rf_off, // HW/SW Radio OFF or Inactive Power Save ++ //=====Add the new RF state above this line=====// ++ rf_max ++}rt_rf_power_state; ++ ++// RF Off Level for IPS or HW/SW radio off ++#define RT_RF_OFF_LEVL_ASPM BIT(0) // PCI ASPM ++#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) // PCI clock request ++#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) // PCI D3 mode ++#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) // NIC halt, re-initialize hw parameters ++#define RT_RF_OFF_LEVL_FREE_FW BIT(4) // FW free, re-download the FW ++#define RT_RF_OFF_LEVL_FW_32K BIT(5) // FW in 32k ++#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) // Always enable ASPM and Clock Req in initialization. ++#define RT_RF_LPS_DISALBE_2R BIT(30) // When LPS is on, disable 2R if no packet is received or transmittd. ++#define RT_RF_LPS_LEVEL_ASPM BIT(31) // LPS with ASPM ++ ++#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) ((ppsc->cur_ps_level & _PS_FLAG) ? _TRUE : _FALSE) ++#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level &= (~(_PS_FLAG))) ++#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) (ppsc->cur_ps_level |= _PS_FLAG) ++ ++ ++enum _PS_BBRegBackup_ { ++ PSBBREG_RF0 = 0, ++ PSBBREG_RF1, ++ PSBBREG_RF2, ++ PSBBREG_AFE0, ++ PSBBREG_TOTALCNT ++}; ++ ++enum { // for ips_mode ++ IPS_NORMAL = 0, ++ IPS_LEVEL_2, ++ IPS_NONE, ++}; ++ ++struct pwrctrl_priv { ++ _pwrlock lock; ++ volatile u8 rpwm; // requested power state for fw ++ volatile u8 cpwm; // fw current power state. updated when 1. read from HCPWM 2. driver lowers power level ++ volatile u8 tog; // toggling ++ volatile u8 cpwm_tog; // toggling ++ u8 pwr_mode; ++ u8 smart_ps; ++ uint alives; ++ ++ u8 b_hw_radio_off; ++ u8 reg_rfoff; ++ u8 reg_pdnmode; //powerdown mode ++ u32 rfoff_reason; ++ ++ //RF OFF Level ++ u32 cur_ps_level; ++ u32 reg_rfps_level; ++ ++ ++ ++#ifdef CONFIG_PCI_HCI ++ //just for PCIE ASPM ++ u8 b_support_aspm; // If it supports ASPM, Offset[560h] = 0x40, otherwise Offset[560h] = 0x00. ++ u8 b_support_backdoor; ++ ++ //just for PCIE ASPM ++ u8 const_amdpci_aspm; ++#endif ++ ++ //u8 ips_enable;//for dbg ++ //u8 lps_enable;//for dbg ++ ++ uint ips_enter_cnts; ++ uint ips_leave_cnts; ++ ++ _timer ips_check_timer; ++ ++ u8 ips_mode; ++ u8 ips_mode_req; // used to accept the mode setting request, will update to ipsmode later ++ ++ u8 bLeisurePs; ++ u8 LpsIdleCount; ++ u8 power_mgnt; ++ u8 bFwCurrentInPSMode; ++ u32 DelayLPSLastTimeStamp; ++ ++ s32 pnp_current_pwr_state; ++ u8 pnp_bstop_trx; ++ ++ ++ u8 bInternalAutoSuspend; ++ u8 bInSuspend; ++ u8 bSupportRemoteWakeup; ++ u8 wowlan_mode; ++ u8 wowlan_pattern; ++ u8 wowlan_magic; ++ u8 wowlan_unicast; ++ u8 wowlan_pattern_idx; ++ u32 wowlan_pattern_context[8][5]; ++ _timer pwr_state_check_timer; ++ int pwr_state_check_interval; ++ u8 pwr_state_check_cnts; ++ uint bips_processing; ++ ++ int ps_flag; ++ ++ rt_rf_power_state rf_pwrstate;//cur power state ++ //rt_rf_power_state current_rfpwrstate; ++ rt_rf_power_state change_rfpwrstate; ++ ++ u8 wepkeymask; ++ u8 bHWPowerdown;//if support hw power down ++ u8 bHWPwrPindetect; ++ u8 bkeepfwalive; ++ u8 brfoffbyhw; ++ unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT]; ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ struct workqueue_struct *rtw_workqueue; ++ _workitem resume_work; ++ #endif ++ ++ #ifdef CONFIG_HAS_EARLYSUSPEND ++ struct early_suspend early_suspend; ++ u8 do_late_resume; ++ #endif //CONFIG_HAS_EARLYSUSPEND ++ ++ #ifdef CONFIG_ANDROID_POWER ++ android_early_suspend_t early_suspend; ++ u8 do_late_resume; ++ #endif ++ ++ #ifdef CONFIG_INTEL_PROXIM ++ u8 stored_power_mgnt; ++ #endif ++}; ++ ++#define rtw_get_ips_mode_req(pwrctrlpriv) \ ++ (pwrctrlpriv)->ips_mode_req ++ ++#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \ ++ (pwrctrlpriv)->ips_mode_req = (ips_mode) ++ ++#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \ ++ do { \ ++ /*DBG_871X("%s _rtw_set_pwr_state_check_timer(%p, %d)\n", __FUNCTION__, (pwrctrlpriv), (ms));*/ \ ++ _set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \ ++ } while(0) ++ ++#define rtw_set_pwr_state_check_timer(pwrctrlpriv) \ ++ _rtw_set_pwr_state_check_timer((pwrctrlpriv), (pwrctrlpriv)->pwr_state_check_interval) ++ ++extern void rtw_init_pwrctrl_priv(_adapter *adapter); ++extern void rtw_free_pwrctrl_priv(_adapter * adapter); ++extern sint rtw_register_tx_alive(_adapter *padapter); ++extern void rtw_unregister_tx_alive(_adapter *padapter); ++extern sint rtw_register_rx_alive(_adapter *padapter); ++extern void rtw_unregister_rx_alive(_adapter *padapter); ++extern sint rtw_register_cmd_alive(_adapter *padapter); ++extern void rtw_unregister_cmd_alive(_adapter *padapter); ++extern sint rtw_register_evt_alive(_adapter *padapter); ++extern void rtw_unregister_evt_alive(_adapter *padapter); ++extern void cpwm_int_hdl(_adapter *padapter, struct reportpwrstate_parm *preportpwrstate); ++extern void rtw_set_ps_mode(_adapter * padapter, u8 ps_mode, u8 smart_ps); ++extern void rtw_set_rpwm(_adapter * padapter, u8 val8); ++extern void LeaveAllPowerSaveMode(PADAPTER Adapter); ++#ifdef CONFIG_IPS ++void ips_enter(_adapter * padapter); ++int ips_leave(_adapter * padapter); ++#endif ++ ++void rtw_ps_processor(_adapter*padapter); ++ ++#ifdef CONFIG_AUTOSUSPEND ++int autoresume_enter(_adapter* padapter); ++#endif ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++rt_rf_power_state RfOnOffDetect(IN PADAPTER pAdapter ); ++#endif ++ ++ ++#ifdef CONFIG_LPS ++void LPS_Enter(PADAPTER padapter); ++void LPS_Leave(PADAPTER padapter); ++#endif ++ ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++void rtw_resume_in_workqueue(struct pwrctrl_priv *pwrpriv); ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER) ++#define rtw_is_earlysuspend_registered(pwrpriv) (pwrpriv)->early_suspend.suspend ++void rtw_register_early_suspend(struct pwrctrl_priv *pwrpriv); ++void rtw_unregister_early_suspend(struct pwrctrl_priv *pwrpriv); ++#endif //CONFIG_HAS_EARLYSUSPEND || CONFIG_ANDROID_POWER ++ ++u8 rtw_interface_ps_func(_adapter *padapter,HAL_INTF_PS_FUNC efunc_id,u8* val); ++int _rtw_pwr_wakeup(_adapter *padapter, const char *caller); ++#define rtw_pwr_wakeup(adapter) _rtw_pwr_wakeup(adapter, __FUNCTION__) ++ ++#endif //__RTL871X_PWRCTRL_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_qos.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_qos.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,41 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++ ++ ++#ifndef _RTW_QOS_H_ ++#define _RTW_QOS_H_ ++#include ++#include ++ ++ ++ ++ ++ ++ ++struct qos_priv { ++ ++ unsigned int qos_option; //bit mask option: u-apsd, s-apsd, ts, block ack... ++ ++}; ++ ++ ++#endif //_RTL871X_QOS_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_recv.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_recv.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,708 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _RTW_RECV_H_ ++#define _RTW_RECV_H_ ++ ++#include ++#include ++#include ++ ++ ++#define NR_RECVFRAME 256 ++ ++#define RXFRAME_ALIGN 8 ++#define RXFRAME_ALIGN_SZ (1<signal_stat_timer, (recvpriv)->signal_stat_sampling_interval) ++#endif //CONFIG_NEW_SIGNAL_STAT_PROCESS ++ ++struct sta_recv_priv { ++ ++ _lock lock; ++ sint option; ++ ++ //_queue blk_strms[MAX_RX_NUMBLKS]; ++ _queue defrag_q; //keeping the fragment frame until defrag ++ ++ struct stainfo_rxcache rxcache; ++ ++ //uint sta_rx_bytes; ++ //uint sta_rx_pkts; ++ //uint sta_rx_fail; ++ ++}; ++ ++ ++struct recv_buf{ ++ ++ _list list; ++ ++ _lock recvbuf_lock; ++ ++ u32 ref_cnt; ++ ++ _adapter *adapter; ++ ++#ifdef CONFIG_SDIO_HCI ++#ifdef PLATFORM_OS_XP ++ PMDL mdl_ptr; ++#endif ++ u8 cmd_fail; ++#endif ++ ++#ifdef CONFIG_USB_HCI ++ ++ #if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX) ++ PURB purb; ++ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ ++ u32 alloc_sz; ++ #endif ++ ++ #ifdef PLATFORM_OS_XP ++ PIRP pirp; ++ #endif ++ ++ #ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_read_port; ++ #endif ++ ++ u8 irp_pending; ++ int transfer_len; ++ ++#endif ++ ++#ifdef PLATFORM_LINUX ++ _pkt *pskb; ++ u8 reuse; ++#endif ++ ++ uint len; ++ u8 *phead; ++ u8 *pdata; ++ u8 *ptail; ++ u8 *pend; ++ ++ u8 *pbuf; ++ u8 *pallocated_buf; ++ ++}; ++ ++ ++/* ++ head -----> ++ ++ data -----> ++ ++ payload ++ ++ tail -----> ++ ++ ++ end -----> ++ ++ len = (unsigned int )(tail - data); ++ ++*/ ++struct recv_frame_hdr{ ++ ++ _list list; ++ _pkt *pkt; ++ _pkt *pkt_newalloc; ++ ++ _adapter *adapter; ++ ++ u8 fragcnt; ++ ++ int frame_tag; ++ ++ struct rx_pkt_attrib attrib; ++ ++ uint len; ++ u8 *rx_head; ++ u8 *rx_data; ++ u8 *rx_tail; ++ u8 *rx_end; ++ ++ void *precvbuf; ++ ++ ++ // ++ struct sta_info *psta; ++ ++ //for A-MPDU Rx reordering buffer control ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++}; ++ ++ ++union recv_frame{ ++ ++ union{ ++ _list list; ++ struct recv_frame_hdr hdr; ++ uint mem[RECVFRAME_HDR_ALIGN>>2]; ++ }u; ++ ++ //uint mem[MAX_RXSZ>>2]; ++ ++}; ++ ++ ++extern union recv_frame *rtw_alloc_recvframe (_queue *pfree_recv_queue); //get a free recv_frame from pfree_recv_queue ++extern void rtw_init_recvframe(union recv_frame *precvframe ,struct recv_priv *precvpriv); ++extern int rtw_free_recvframe(union recv_frame *precvframe, _queue *pfree_recv_queue); ++extern union recv_frame *rtw_dequeue_recvframe (_queue *queue); ++extern int rtw_enqueue_recvframe(union recv_frame *precvframe, _queue *queue); ++extern void rtw_free_recvframe_queue(_queue *pframequeue, _queue *pfree_recv_queue); ++ ++sint rtw_enqueue_recvbuf(struct recv_buf *precvbuf, _queue *queue); ++struct recv_buf *rtw_dequeue_recvbuf (_queue *queue); ++ ++void rtw_reordering_ctrl_timeout_handler(void *pcontext); ++ ++__inline static u8 *get_rxmem(union recv_frame *precvframe) ++{ ++ //always return rx_head... ++ if(precvframe==NULL) ++ return NULL; ++ ++ return precvframe->u.hdr.rx_head; ++} ++ ++__inline static u8 *get_rx_status(union recv_frame *precvframe) ++{ ++ ++ return get_rxmem(precvframe); ++ ++} ++ ++__inline static u8 *get_recvframe_data(union recv_frame *precvframe) ++{ ++ ++ //alwasy return rx_data ++ if(precvframe==NULL) ++ return NULL; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++__inline static u8 *recvframe_push(union recv_frame *precvframe, sint sz) ++{ ++ // append data before rx_data ++ ++ /* add data to the start of recv_frame ++ * ++ * This function extends the used data area of the recv_frame at the buffer ++ * start. rx_data must be still larger than rx_head, after pushing. ++ */ ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ ++ precvframe->u.hdr.rx_data -= sz ; ++ if( precvframe->u.hdr.rx_data < precvframe->u.hdr.rx_head ) ++ { ++ precvframe->u.hdr.rx_data += sz ; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len +=sz; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++ ++__inline static u8 *recvframe_pull(union recv_frame *precvframe, sint sz) ++{ ++ // rx_data += sz; move rx_data sz bytes hereafter ++ ++ //used for extract sz bytes from rx_data, update rx_data and return the updated rx_data to the caller ++ ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ ++ precvframe->u.hdr.rx_data += sz; ++ ++ if(precvframe->u.hdr.rx_data > precvframe->u.hdr.rx_tail) ++ { ++ precvframe->u.hdr.rx_data -= sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len -=sz; ++ ++ return precvframe->u.hdr.rx_data; ++ ++} ++ ++__inline static u8 *recvframe_put(union recv_frame *precvframe, sint sz) ++{ ++ // rx_tai += sz; move rx_tail sz bytes hereafter ++ ++ //used for append sz bytes from ptr to rx_tail, update rx_tail and return the updated rx_tail to the caller ++ //after putting, rx_tail must be still larger than rx_end. ++ unsigned char * prev_rx_tail; ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ prev_rx_tail = precvframe->u.hdr.rx_tail; ++ ++ precvframe->u.hdr.rx_tail += sz; ++ ++ if(precvframe->u.hdr.rx_tail > precvframe->u.hdr.rx_end) ++ { ++ precvframe->u.hdr.rx_tail -= sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len +=sz; ++ ++ return precvframe->u.hdr.rx_tail; ++ ++} ++ ++ ++ ++__inline static u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) ++{ ++ // rmv data from rx_tail (by yitsen) ++ ++ //used for extract sz bytes from rx_end, update rx_end and return the updated rx_end to the caller ++ //after pulling, rx_end must be still larger than rx_data. ++ ++ if(precvframe==NULL) ++ return NULL; ++ ++ precvframe->u.hdr.rx_tail -= sz; ++ ++ if(precvframe->u.hdr.rx_tail < precvframe->u.hdr.rx_data) ++ { ++ precvframe->u.hdr.rx_tail += sz; ++ return NULL; ++ } ++ ++ precvframe->u.hdr.len -=sz; ++ ++ return precvframe->u.hdr.rx_tail; ++ ++} ++ ++ ++ ++__inline static _buffer * get_rxbuf_desc(union recv_frame *precvframe) ++{ ++ _buffer * buf_desc; ++ ++ if(precvframe==NULL) ++ return NULL; ++#ifdef PLATFORM_WINDOWS ++ NdisQueryPacket(precvframe->u.hdr.pkt, NULL, NULL, &buf_desc, NULL); ++#endif ++ ++ return buf_desc; ++} ++ ++ ++__inline static union recv_frame *rxmem_to_recvframe(u8 *rxmem) ++{ ++ //due to the design of 2048 bytes alignment of recv_frame, we can reference the union recv_frame ++ //from any given member of recv_frame. ++ // rxmem indicates the any member/address in recv_frame ++ ++ //return (union recv_frame*)(((uint)rxmem>>RXFRAME_ALIGN) <> RXFRAME_ALIGN) << RXFRAME_ALIGN); ++ return (union recv_frame*)(((ulong)rxmem>>RXFRAME_ALIGN) <u.hdr.rx_head; ++ ++} ++ ++__inline static u8 *pkt_to_recvdata(_pkt *pkt) ++{ ++ // return the rx_data ++ ++ union recv_frame * precv_frame =pkt_to_recvframe(pkt); ++ ++ return precv_frame->u.hdr.rx_data; ++ ++} ++ ++ ++__inline static sint get_recvframe_len(union recv_frame *precvframe) ++{ ++ return precvframe->u.hdr.len; ++} ++ ++__inline static u8 query_rx_pwr_percentage(s8 antpower ) ++{ ++ if ((antpower <= -100) || (antpower >= 20)) ++ { ++ return 0; ++ } ++ else if (antpower >= 0) ++ { ++ return 100; ++ } ++ else ++ { ++ return (100+antpower); ++ } ++} ++__inline static s32 translate_percentage_to_dbm(u32 SignalStrengthIndex) ++{ ++ s32 SignalPower; // in dBm. ++ ++ // Translate to dBm (x=0.5y-95). ++ SignalPower = (s32)((SignalStrengthIndex + 1) >> 1); ++ SignalPower -= 95; ++ ++ return SignalPower; ++} ++ ++ ++struct sta_info; ++ ++extern void _rtw_init_sta_recv_priv(struct sta_recv_priv *psta_recvpriv); ++ ++extern void mgt_dispatcher(_adapter *padapter, union recv_frame *precv_frame); ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_rf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_rf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,152 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#ifndef __RTW_RF_H_ ++#define __RTW_RF_H_ ++ ++#include ++#include ++ ++#define OFDM_PHY 1 ++#define MIXED_PHY 2 ++#define CCK_PHY 3 ++ ++#define NumRates (13) ++ ++// slot time for 11g ++#define SHORT_SLOT_TIME 9 ++#define NON_SHORT_SLOT_TIME 20 ++ ++#define RTL8711_RF_MAX_SENS 6 ++#define RTL8711_RF_DEF_SENS 4 ++ ++// ++// We now define the following channels as the max channels in each channel plan. ++// 2G, total 14 chnls ++// {1,2,3,4,5,6,7,8,9,10,11,12,13,14} ++// 5G, total 24 chnls ++// {36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165} ++#define MAX_CHANNEL_NUM_2G 14 ++#define MAX_CHANNEL_NUM_5G 24 ++#define MAX_CHANNEL_NUM 38//14+24 ++ ++//#define NUM_REGULATORYS 21 ++#define NUM_REGULATORYS 1 ++ ++//Country codes ++#define USA 0x555320 ++#define EUROPE 0x1 //temp, should be provided later ++#define JAPAN 0x2 //temp, should be provided later ++ ++struct regulatory_class { ++ u32 starting_freq; //MHz, ++ u8 channel_set[MAX_CHANNEL_NUM]; ++ u8 channel_cck_power[MAX_CHANNEL_NUM];//dbm ++ u8 channel_ofdm_power[MAX_CHANNEL_NUM];//dbm ++ u8 txpower_limit; //dbm ++ u8 channel_spacing; //MHz ++ u8 modem; ++}; ++ ++typedef enum _CAPABILITY{ ++ cESS = 0x0001, ++ cIBSS = 0x0002, ++ cPollable = 0x0004, ++ cPollReq = 0x0008, ++ cPrivacy = 0x0010, ++ cShortPreamble = 0x0020, ++ cPBCC = 0x0040, ++ cChannelAgility = 0x0080, ++ cSpectrumMgnt = 0x0100, ++ cQos = 0x0200, // For HCCA, use with CF-Pollable and CF-PollReq ++ cShortSlotTime = 0x0400, ++ cAPSD = 0x0800, ++ cRM = 0x1000, // RRM (Radio Request Measurement) ++ cDSSS_OFDM = 0x2000, ++ cDelayedBA = 0x4000, ++ cImmediateBA = 0x8000, ++}CAPABILITY, *PCAPABILITY; ++ ++enum _REG_PREAMBLE_MODE{ ++ PREAMBLE_LONG = 1, ++ PREAMBLE_AUTO = 2, ++ PREAMBLE_SHORT = 3, ++}; ++ ++ ++enum _RTL8712_RF_MIMO_CONFIG_{ ++ RTL8712_RFCONFIG_1T=0x10, ++ RTL8712_RFCONFIG_2T=0x20, ++ RTL8712_RFCONFIG_1R=0x01, ++ RTL8712_RFCONFIG_2R=0x02, ++ RTL8712_RFCONFIG_1T1R=0x11, ++ RTL8712_RFCONFIG_1T2R=0x12, ++ RTL8712_RFCONFIG_TURBO=0x92, ++ RTL8712_RFCONFIG_2T2R=0x22 ++}; ++ ++ ++// Bandwidth Offset ++#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0 ++#define HAL_PRIME_CHNL_OFFSET_LOWER 1 ++#define HAL_PRIME_CHNL_OFFSET_UPPER 2 ++ ++// Represent Channel Width in HT Capabilities ++// ++typedef enum _HT_CHANNEL_WIDTH { ++ HT_CHANNEL_WIDTH_20 = 0, ++ HT_CHANNEL_WIDTH_40 = 1, ++}HT_CHANNEL_WIDTH, *PHT_CHANNEL_WIDTH; ++ ++// ++// Represent Extention Channel Offset in HT Capabilities ++// This is available only in 40Mhz mode. ++// ++typedef enum _HT_EXTCHNL_OFFSET{ ++ HT_EXTCHNL_OFFSET_NO_EXT = 0, ++ HT_EXTCHNL_OFFSET_UPPER = 1, ++ HT_EXTCHNL_OFFSET_NO_DEF = 2, ++ HT_EXTCHNL_OFFSET_LOWER = 3, ++}HT_EXTCHNL_OFFSET, *PHT_EXTCHNL_OFFSET; ++ ++/* 2007/11/15 MH Define different RF type. */ ++typedef enum _RT_RF_TYPE_DEFINITION ++{ ++ RF_1T2R = 0, ++ RF_2T4R = 1, ++ RF_2T2R = 2, ++ RF_1T1R = 3, ++ RF_2T2R_GREEN = 4, ++ RF_819X_MAX_TYPE = 5, ++}RT_RF_TYPE_DEF_E; ++ ++typedef enum _RF_RADIO_PATH{ ++ RF_PATH_A = 0, //Radio Path A ++ RF_PATH_B = 1, //Radio Path B ++ RF_PATH_C = 2, //Radio Path C ++ RF_PATH_D = 3, //Radio Path D ++ //RF_PATH_MAX //Max RF number 90 support ++}RF_RADIO_PATH_E, *PRF_RADIO_PATH_E; ++ ++u32 rtw_ch2freq(u32 ch); ++u32 rtw_freq2ch(u32 freq); ++ ++ ++#endif //_RTL8711_RF_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_security.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_security.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,423 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __RTW_SECURITY_H_ ++#define __RTW_SECURITY_H_ ++ ++ ++#include ++#include ++#include ++ ++ ++#define _NO_PRIVACY_ 0x0 ++#define _WEP40_ 0x1 ++#define _TKIP_ 0x2 ++#define _TKIP_WTMIC_ 0x3 ++#define _AES_ 0x4 ++#define _WEP104_ 0x5 ++ ++#define _WPA_IE_ID_ 0xdd ++#define _WPA2_IE_ID_ 0x30 ++ ++#define SHA256_MAC_LEN 32 ++#define AES_BLOCK_SIZE 16 ++#define AES_PRIV_SIZE (4 * 44) ++ ++#ifndef Ndis802_11AuthModeWPA2 ++#define Ndis802_11AuthModeWPA2 (Ndis802_11AuthModeWPANone + 1) ++#endif ++ ++#ifndef Ndis802_11AuthModeWPA2PSK ++#define Ndis802_11AuthModeWPA2PSK (Ndis802_11AuthModeWPANone + 2) ++#endif ++ ++union pn48 { ++ ++ u64 val; ++ ++#ifdef CONFIG_LITTLE_ENDIAN ++ ++struct { ++ u8 TSC0; ++ u8 TSC1; ++ u8 TSC2; ++ u8 TSC3; ++ u8 TSC4; ++ u8 TSC5; ++ u8 TSC6; ++ u8 TSC7; ++} _byte_; ++ ++#elif defined(CONFIG_BIG_ENDIAN) ++ ++struct { ++ u8 TSC7; ++ u8 TSC6; ++ u8 TSC5; ++ u8 TSC4; ++ u8 TSC3; ++ u8 TSC2; ++ u8 TSC1; ++ u8 TSC0; ++} _byte_; ++ ++#endif ++ ++}; ++ ++union Keytype { ++ u8 skey[16]; ++ u32 lkey[4]; ++}; ++ ++ ++typedef struct _RT_PMKID_LIST ++{ ++ u8 bUsed; ++ u8 Bssid[6]; ++ u8 PMKID[16]; ++ u8 SsidBuf[33]; ++ u8* ssid_octet; ++ u16 ssid_length; ++} RT_PMKID_LIST, *PRT_PMKID_LIST; ++ ++ ++struct security_priv ++{ ++ u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, 8021x and authswitch ++ u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. ++ ++ /* WEP */ ++ u32 dot11PrivacyKeyIndex; // this is only valid for legendary wep, 0~3 for key id. (tx key index) ++ union Keytype dot11DefKey[4]; // this is only valid for def. key ++ u32 dot11DefKeylen[4]; ++ ++ u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key ++ u32 dot118021XGrpKeyid; // key id used for Grp Key ( tx key index) ++ union Keytype dot118021XGrpKey[4]; // 802.1x Group Key, for inx0 and inx1 ++ union Keytype dot118021XGrptxmickey[4]; ++ union Keytype dot118021XGrprxmickey[4]; ++ union pn48 dot11Grptxpn; // PN48 used for Grp Key xmit. ++ union pn48 dot11Grprxpn; // PN48 used for Grp Key recv. ++ ++#ifdef CONFIG_AP_MODE ++ //extend security capabilities for AP_MODE ++ unsigned int dot8021xalg;//0:disable, 1:psk, 2:802.1x ++ unsigned int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 ++ unsigned int wpa_group_cipher; ++ unsigned int wpa2_group_cipher; ++ unsigned int wpa_pairwise_cipher; ++ unsigned int wpa2_pairwise_cipher; ++#endif ++ ++ u8 wps_phase;//for wps ++ u8 wps_ie[MAX_WPS_IE_LEN];//added in assoc req ++ int wps_ie_len; ++ ++ ++ u8 binstallGrpkey; ++ u8 busetkipkey; ++ //_timer tkip_timer; ++ u8 bcheck_grpkey; ++ u8 bgrpkey_handshake; ++ ++ //u8 packet_cnt;//unused, removed ++ ++ s32 sw_encrypt;//from registry_priv ++ s32 sw_decrypt;//from registry_priv ++ ++ s32 hw_decrypted;//if the rx packets is hw_decrypted==_FALSE, it means the hw has not been ready. ++ ++ ++ //keeps the auth_type & enc_status from upper layer ioctl(wpa_supplicant or wzc) ++ u32 ndisauthtype; // NDIS_802_11_AUTHENTICATION_MODE ++ u32 ndisencryptstatus; // NDIS_802_11_ENCRYPTION_STATUS ++ ++ WLAN_BSSID_EX sec_bss; //for joinbss (h2c buffer) usage ++ ++ NDIS_802_11_WEP ndiswep; ++#ifdef PLATFORM_WINDOWS ++ u8 KeyMaterial[16];// variable length depending on above field. ++#endif ++ ++ u8 assoc_info[600]; ++ u8 szofcapability[256]; //for wpa2 usage ++ u8 oidassociation[512]; //for wpa/wpa2 usage ++ u8 authenticator_ie[256]; //store ap security information element ++ u8 supplicant_ie[256]; //store sta security information element ++ ++ ++ //for tkip countermeasure ++ u32 last_mic_err_time; ++ u8 btkip_countermeasure; ++ u8 btkip_wait_report; ++ u32 btkip_countermeasure_time; ++ ++ //--------------------------------------------------------------------------- ++ // For WPA2 Pre-Authentication. ++ //--------------------------------------------------------------------------- ++ //u8 RegEnablePreAuth; // Default value: Pre-Authentication enabled or not, from registry "EnablePreAuth". Added by Annie, 2005-11-01. ++ //u8 EnablePreAuthentication; // Current Value: Pre-Authentication enabled or not. ++ RT_PMKID_LIST PMKIDList[NUM_PMKID_CACHE]; // Renamed from PreAuthKey[NUM_PRE_AUTH_KEY]. Annie, 2006-10-13. ++ u8 PMKIDIndex; ++ //u32 PMKIDCount; // Added by Annie, 2006-10-13. ++ //u8 szCapability[256]; // For WPA2-PSK using zero-config, by Annie, 2005-09-20. ++ ++}; ++ ++struct sha256_state { ++ u64 length; ++ u32 state[8], curlen; ++ u8 buf[64]; ++}; ++ ++#define GET_ENCRY_ALGO(psecuritypriv, psta, encry_algo, bmcst)\ ++do{\ ++ switch(psecuritypriv->dot11AuthAlgrthm)\ ++ {\ ++ case dot11AuthAlgrthm_Open:\ ++ case dot11AuthAlgrthm_Shared:\ ++ case dot11AuthAlgrthm_Auto:\ ++ encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm;\ ++ break;\ ++ case dot11AuthAlgrthm_8021X:\ ++ if(bmcst)\ ++ encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\ ++ else\ ++ encry_algo =(u8) psta->dot118021XPrivacy;\ ++ break;\ ++ }\ ++}while(0) ++ ++ ++#define SET_ICE_IV_LEN( iv_len, icv_len, encrypt)\ ++do{\ ++ switch(encrypt)\ ++ {\ ++ case _WEP40_:\ ++ case _WEP104_:\ ++ iv_len = 4;\ ++ icv_len = 4;\ ++ break;\ ++ case _TKIP_:\ ++ iv_len = 8;\ ++ icv_len = 4;\ ++ break;\ ++ case _AES_:\ ++ iv_len = 8;\ ++ icv_len = 8;\ ++ break;\ ++ default:\ ++ iv_len = 0;\ ++ icv_len = 0;\ ++ break;\ ++ }\ ++}while(0) ++ ++ ++#define GET_TKIP_PN(iv,dot11txpn)\ ++do{\ ++ dot11txpn._byte_.TSC0=iv[2];\ ++ dot11txpn._byte_.TSC1=iv[0];\ ++ dot11txpn._byte_.TSC2=iv[4];\ ++ dot11txpn._byte_.TSC3=iv[5];\ ++ dot11txpn._byte_.TSC4=iv[6];\ ++ dot11txpn._byte_.TSC5=iv[7];\ ++}while(0) ++ ++ ++#define ROL32( A, n ) ( ((A) << (n)) | ( ((A)>>(32-(n))) & ( (1UL << (n)) - 1 ) ) ) ++#define ROR32( A, n ) ROL32( (A), 32-(n) ) ++ ++struct mic_data ++{ ++ u32 K0, K1; // Key ++ u32 L, R; // Current state ++ u32 M; // Message accumulator (single word) ++ u32 nBytesInM; // # bytes in M ++}; ++ ++extern const u32 Te0[256]; ++extern const u32 Te1[256]; ++extern const u32 Te2[256]; ++extern const u32 Te3[256]; ++extern const u32 Te4[256]; ++extern const u32 Td0[256]; ++extern const u32 Td1[256]; ++extern const u32 Td2[256]; ++extern const u32 Td3[256]; ++extern const u32 Td4[256]; ++extern const u32 rcon[10]; ++extern const u8 Td4s[256]; ++extern const u8 rcons[10]; ++ ++#define RCON(i) (rcons[(i)] << 24) ++ ++static inline u32 rotr(u32 val, int bits) ++{ ++ return (val >> bits) | (val << (32 - bits)); ++} ++ ++#define TE0(i) Te0[((i) >> 24) & 0xff] ++#define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8) ++#define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16) ++#define TE3(i) rotr(Te0[(i) & 0xff], 24) ++#define TE41(i) ((Te0[((i) >> 24) & 0xff] << 8) & 0xff000000) ++#define TE42(i) (Te0[((i) >> 16) & 0xff] & 0x00ff0000) ++#define TE43(i) (Te0[((i) >> 8) & 0xff] & 0x0000ff00) ++#define TE44(i) ((Te0[(i) & 0xff] >> 8) & 0x000000ff) ++#define TE421(i) ((Te0[((i) >> 16) & 0xff] << 8) & 0xff000000) ++#define TE432(i) (Te0[((i) >> 8) & 0xff] & 0x00ff0000) ++#define TE443(i) (Te0[(i) & 0xff] & 0x0000ff00) ++#define TE414(i) ((Te0[((i) >> 24) & 0xff] >> 8) & 0x000000ff) ++#define TE4(i) ((Te0[(i)] >> 8) & 0x000000ff) ++ ++#define TD0(i) Td0[((i) >> 24) & 0xff] ++#define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8) ++#define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16) ++#define TD3(i) rotr(Td0[(i) & 0xff], 24) ++#define TD41(i) (Td4s[((i) >> 24) & 0xff] << 24) ++#define TD42(i) (Td4s[((i) >> 16) & 0xff] << 16) ++#define TD43(i) (Td4s[((i) >> 8) & 0xff] << 8) ++#define TD44(i) (Td4s[(i) & 0xff]) ++#define TD0_(i) Td0[(i) & 0xff] ++#define TD1_(i) rotr(Td0[(i) & 0xff], 8) ++#define TD2_(i) rotr(Td0[(i) & 0xff], 16) ++#define TD3_(i) rotr(Td0[(i) & 0xff], 24) ++ ++#define GETU32(pt) (((u32)(pt)[0] << 24) ^ ((u32)(pt)[1] << 16) ^ \ ++ ((u32)(pt)[2] << 8) ^ ((u32)(pt)[3])) ++ ++#define PUTU32(ct, st) { \ ++(ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \ ++(ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); } ++ ++#define WPA_GET_BE32(a) ((((u32) (a)[0]) << 24) | (((u32) (a)[1]) << 16) | \ ++ (((u32) (a)[2]) << 8) | ((u32) (a)[3])) ++ ++#define WPA_PUT_LE16(a, val) \ ++ do { \ ++ (a)[1] = ((u16) (val)) >> 8; \ ++ (a)[0] = ((u16) (val)) & 0xff; \ ++ } while (0) ++ ++#define WPA_PUT_BE32(a, val) \ ++ do { \ ++ (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \ ++ (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \ ++ (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \ ++ (a)[3] = (u8) (((u32) (val)) & 0xff); \ ++ } while (0) ++ ++#define WPA_PUT_BE64(a, val) \ ++ do { \ ++ (a)[0] = (u8) (((u64) (val)) >> 56); \ ++ (a)[1] = (u8) (((u64) (val)) >> 48); \ ++ (a)[2] = (u8) (((u64) (val)) >> 40); \ ++ (a)[3] = (u8) (((u64) (val)) >> 32); \ ++ (a)[4] = (u8) (((u64) (val)) >> 24); \ ++ (a)[5] = (u8) (((u64) (val)) >> 16); \ ++ (a)[6] = (u8) (((u64) (val)) >> 8); \ ++ (a)[7] = (u8) (((u64) (val)) & 0xff); \ ++ } while (0) ++ ++/* ===== start - public domain SHA256 implementation ===== */ ++ ++/* This is based on SHA256 implementation in LibTomCrypt that was released into ++ * public domain by Tom St Denis. */ ++ ++/* the K array */ ++static const unsigned long K[64] = { ++ 0x428a2f98UL, 0x71374491UL, 0xb5c0fbcfUL, 0xe9b5dba5UL, 0x3956c25bUL, ++ 0x59f111f1UL, 0x923f82a4UL, 0xab1c5ed5UL, 0xd807aa98UL, 0x12835b01UL, ++ 0x243185beUL, 0x550c7dc3UL, 0x72be5d74UL, 0x80deb1feUL, 0x9bdc06a7UL, ++ 0xc19bf174UL, 0xe49b69c1UL, 0xefbe4786UL, 0x0fc19dc6UL, 0x240ca1ccUL, ++ 0x2de92c6fUL, 0x4a7484aaUL, 0x5cb0a9dcUL, 0x76f988daUL, 0x983e5152UL, ++ 0xa831c66dUL, 0xb00327c8UL, 0xbf597fc7UL, 0xc6e00bf3UL, 0xd5a79147UL, ++ 0x06ca6351UL, 0x14292967UL, 0x27b70a85UL, 0x2e1b2138UL, 0x4d2c6dfcUL, ++ 0x53380d13UL, 0x650a7354UL, 0x766a0abbUL, 0x81c2c92eUL, 0x92722c85UL, ++ 0xa2bfe8a1UL, 0xa81a664bUL, 0xc24b8b70UL, 0xc76c51a3UL, 0xd192e819UL, ++ 0xd6990624UL, 0xf40e3585UL, 0x106aa070UL, 0x19a4c116UL, 0x1e376c08UL, ++ 0x2748774cUL, 0x34b0bcb5UL, 0x391c0cb3UL, 0x4ed8aa4aUL, 0x5b9cca4fUL, ++ 0x682e6ff3UL, 0x748f82eeUL, 0x78a5636fUL, 0x84c87814UL, 0x8cc70208UL, ++ 0x90befffaUL, 0xa4506cebUL, 0xbef9a3f7UL, 0xc67178f2UL ++}; ++ ++ ++/* Various logical functions */ ++#define RORc(x, y) \ ++( ((((unsigned long) (x) & 0xFFFFFFFFUL) >> (unsigned long) ((y) & 31)) | \ ++ ((unsigned long) (x) << (unsigned long) (32 - ((y) & 31)))) & 0xFFFFFFFFUL) ++#define Ch(x,y,z) (z ^ (x & (y ^ z))) ++#define Maj(x,y,z) (((x | y) & z) | (x & y)) ++#define S(x, n) RORc((x), (n)) ++#define R(x, n) (((x)&0xFFFFFFFFUL)>>(n)) ++#define Sigma0(x) (S(x, 2) ^ S(x, 13) ^ S(x, 22)) ++#define Sigma1(x) (S(x, 6) ^ S(x, 11) ^ S(x, 25)) ++#define Gamma0(x) (S(x, 7) ^ S(x, 18) ^ R(x, 3)) ++#define Gamma1(x) (S(x, 17) ^ S(x, 19) ^ R(x, 10)) ++#ifndef MIN ++#define MIN(x, y) (((x) < (y)) ? (x) : (y)) ++#endif ++ ++void rtw_secmicsetkey(struct mic_data *pmicdata, u8 * key ); ++void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b ); ++void rtw_secmicappend(struct mic_data *pmicdata, u8 * src, u32 nBytes ); ++void rtw_secgetmic(struct mic_data *pmicdata, u8 * dst ); ++ ++void rtw_seccalctkipmic( ++ u8 * key, ++ u8 *header, ++ u8 *data, ++ u32 data_len, ++ u8 *Miccode, ++ u8 priority); ++ ++u32 rtw_aes_encrypt(_adapter *padapter, u8 *pxmitframe); ++u32 rtw_tkip_encrypt(_adapter *padapter, u8 *pxmitframe); ++void rtw_wep_encrypt(_adapter *padapter, u8 *pxmitframe); ++ ++u32 rtw_aes_decrypt(_adapter *padapter, u8 *precvframe); ++u32 rtw_tkip_decrypt(_adapter *padapter, u8 *precvframe); ++void rtw_wep_decrypt(_adapter *padapter, u8 *precvframe); ++ ++#ifdef CONFIG_TDLS ++void wpa_tdls_generate_tpk(_adapter *padapter, struct sta_info *psta); ++int wpa_tdls_ftie_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie, ++ u8 *mic); ++int tdls_verify_mic(u8 *kck, u8 trans_seq, ++ u8 *lnkid, u8 *rsnie, u8 *timeoutie, u8 *ftie); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++void rtw_use_tkipkey_handler ( ++ IN PVOID SystemSpecific1, ++ IN PVOID FunctionContext, ++ IN PVOID SystemSpecific2, ++ IN PVOID SystemSpecific3 ++ ); ++#endif ++#ifdef PLATFORM_LINUX ++void rtw_use_tkipkey_handler(void* FunctionContext); ++#endif ++#endif //__RTL871X_SECURITY_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_version.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_version.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1 @@ ++#define DRIVERVERSION "v3.4.4_4749.20121105" +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/rtw_xmit.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,674 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#ifndef _RTW_XMIT_H_ ++#define _RTW_XMIT_H_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#define MAX_XMITBUF_SZ (30720)// (2048) ++#define NR_XMITBUFF (16) ++ ++#elif defined (CONFIG_USB_HCI) ++#ifdef CONFIG_USB_TX_AGGREGATION ++#define MAX_XMITBUF_SZ 20480 // 20k ++#else ++#define MAX_XMITBUF_SZ (2048) ++#endif ++#ifdef CONFIG_SINGLE_XMIT_BUF ++#define NR_XMITBUFF (1) ++#else ++#define NR_XMITBUFF (4) ++#endif //CONFIG_SINGLE_XMIT_BUF ++ ++#elif defined (CONFIG_PCI_HCI) ++#define MAX_XMITBUF_SZ (1664) ++#define NR_XMITBUFF (128) ++#endif ++ ++#ifdef PLATFORM_OS_CE ++#define XMITBUF_ALIGN_SZ 4 ++#else ++#ifdef CONFIG_PCI_HCI ++#define XMITBUF_ALIGN_SZ 4 ++#else ++#define XMITBUF_ALIGN_SZ 512 ++#endif ++#endif ++ ++// xmit extension buff defination ++#define MAX_XMIT_EXTBUF_SZ (2048) ++#ifdef CONFIG_SINGLE_XMIT_BUF ++#define NR_XMIT_EXTBUFF (1) ++#else ++#define NR_XMIT_EXTBUFF (32) ++#endif //CONFIG_SINGLE_XMIT_BUF ++ ++#define MAX_NUMBLKS (1) ++ ++#define XMIT_VO_QUEUE (0) ++#define XMIT_VI_QUEUE (1) ++#define XMIT_BE_QUEUE (2) ++#define XMIT_BK_QUEUE (3) ++ ++#ifdef CONFIG_PCI_HCI ++#define TXDESC_NUM 64 ++//#define TXDESC_NUM 128 ++#define TXDESC_NUM_BE_QUEUE 128 ++#endif ++ ++#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[2] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[3] = ((keyidx & 0x3)<<6);\ ++ dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++ ++#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\ ++ pattrib_iv[2] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ ++ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ ++ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ ++ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ ++ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++#define AES_IV(pattrib_iv, dot11txpn, keyidx)\ ++do{\ ++ pattrib_iv[0] = dot11txpn._byte_.TSC0;\ ++ pattrib_iv[1] = dot11txpn._byte_.TSC1;\ ++ pattrib_iv[2] = 0;\ ++ pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\ ++ pattrib_iv[4] = dot11txpn._byte_.TSC2;\ ++ pattrib_iv[5] = dot11txpn._byte_.TSC3;\ ++ pattrib_iv[6] = dot11txpn._byte_.TSC4;\ ++ pattrib_iv[7] = dot11txpn._byte_.TSC5;\ ++ dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0: (dot11txpn.val+1);\ ++}while(0) ++ ++ ++#define HWXMIT_ENTRY 4 ++ ++#define TXDESC_SIZE 32 ++#define PACKET_OFFSET_SZ (8) ++ ++#ifdef CONFIG_USB_HCI ++#define TXDESC_OFFSET (TXDESC_SIZE + PACKET_OFFSET_SZ) ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#define TXDESC_OFFSET 0 ++#define TX_DESC_NEXT_DESC_OFFSET 40 ++#endif ++ ++// ++//defined for TX DESC Operation ++// ++ ++#define MAX_TID (15) ++ ++//OFFSET 0 ++#define OFFSET_SZ 0 ++#define OFFSET_SHT 16 ++#define BMC BIT(24) ++#define LSG BIT(26) ++#define FSG BIT(27) ++#define OWN BIT(31) ++ ++//OFFSET 4 ++#define PKT_OFFSET_SZ 0 ++#define BK BIT(6) ++#define QSEL_SHT 8 ++#define Rate_ID_SHT 16 ++#define NAVUSEHDR BIT(20) ++#define PKT_OFFSET_SHT 26 ++#define HWPC BIT(31) ++ ++//OFFSET 8 ++#define AGG_EN BIT(29) ++ ++//OFFSET 12 ++#define SEQ_SHT 16 ++ ++//OFFSET 16 ++#define QoS BIT(6) ++#define HW_SEQ_EN BIT(7) ++#define USERATE BIT(8) ++#define DISDATAFB BIT(10) ++#define DATA_SHORT BIT(24) ++#define DATA_BW BIT(25) ++ ++//OFFSET 20 ++#define SGI BIT(6) ++ ++struct tx_desc{ ++ ++ //DWORD 0 ++ unsigned int txdw0; ++ ++ unsigned int txdw1; ++ ++ unsigned int txdw2; ++ ++ unsigned int txdw3; ++ ++ unsigned int txdw4; ++ ++ unsigned int txdw5; ++ ++ unsigned int txdw6; ++ ++ unsigned int txdw7; ++#ifdef CONFIG_PCI_HCI ++ unsigned int txdw8; ++ ++ unsigned int txdw9; ++ ++ unsigned int txdw10; ++ ++ unsigned int txdw11; ++ ++ // 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor ++ // size is 40 bytes. If you use more than 102 descriptor( 103*40>4096), HW will execute ++ // memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor ++ // number or enlarge descriptor size as 64 bytes. ++ unsigned int txdw12; ++ ++ unsigned int txdw13; ++ ++ unsigned int txdw14; ++ ++ unsigned int txdw15; ++#endif ++}; ++ ++ ++union txdesc { ++ struct tx_desc txdesc; ++ unsigned int value[TXDESC_SIZE>>2]; ++}; ++ ++#ifdef CONFIG_PCI_HCI ++#define PCI_MAX_TX_QUEUE_COUNT 8 ++ ++struct rtw_tx_ring { ++ struct tx_desc *desc; ++ dma_addr_t dma; ++ unsigned int idx; ++ unsigned int entries; ++ _queue queue; ++ u32 qlen; ++}; ++#endif ++ ++struct hw_xmit { ++ //_lock xmit_lock; ++ //_list pending; ++ _queue *sta_queue; ++ //struct hw_txqueue *phwtxqueue; ++ //sint txcmdcnt; ++ int accnt; ++}; ++ ++#if 0 ++struct pkt_attrib ++{ ++ u8 type; ++ u8 subtype; ++ u8 bswenc; ++ u8 dhcp_pkt; ++ u16 ether_type; ++ int pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) ++ int pkt_hdrlen; //the original 802.3 pkt header len ++ int hdrlen; //the WLAN Header Len ++ int nr_frags; ++ int last_txcmdsz; ++ int encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith ++ u8 iv[8]; ++ int iv_len; ++ u8 icv[8]; ++ int icv_len; ++ int priority; ++ int ack_policy; ++ int mac_id; ++ int vcs_mode; //virtual carrier sense method ++ ++ u8 dst[ETH_ALEN]; ++ u8 src[ETH_ALEN]; ++ u8 ta[ETH_ALEN]; ++ u8 ra[ETH_ALEN]; ++ ++ u8 key_idx; ++ ++ u8 qos_en; ++ u8 ht_en; ++ u8 raid;//rate adpative id ++ u8 bwmode; ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ u8 ampdu_en;//tx ampdu enable ++ u8 mdata;//more data bit ++ u8 eosp; ++ ++ u8 pctrl;//per packet txdesc control enable ++ u8 triggered;//for ap mode handling Power Saving sta ++ ++ u32 qsel; ++ u16 seqnum; ++ ++ struct sta_info * psta; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ u8 hw_tcp_csum; ++#endif ++}; ++#else ++//reduce size ++struct pkt_attrib ++{ ++ u8 type; ++ u8 subtype; ++ u8 bswenc; ++ u8 dhcp_pkt; ++ u16 ether_type; ++ u16 seqnum; ++ u16 pkt_hdrlen; //the original 802.3 pkt header len ++ u16 hdrlen; //the WLAN Header Len ++ u32 pktlen; //the original 802.3 pkt raw_data len (not include ether_hdr data) ++ u32 last_txcmdsz; ++ u8 nr_frags; ++ u8 encrypt; //when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith ++ u8 iv_len; ++ u8 icv_len; ++ u8 iv[8]; ++ u8 icv[8]; ++ u8 priority; ++ u8 ack_policy; ++ u8 mac_id; ++ u8 vcs_mode; //virtual carrier sense method ++ u8 dst[ETH_ALEN]; ++ u8 src[ETH_ALEN]; ++ u8 ta[ETH_ALEN]; ++ u8 ra[ETH_ALEN]; ++ u8 key_idx; ++ u8 qos_en; ++ u8 ht_en; ++ u8 raid;//rate adpative id ++ u8 bwmode; ++ u8 ch_offset;//PRIME_CHNL_OFFSET ++ u8 sgi;//short GI ++ u8 ampdu_en;//tx ampdu enable ++ u8 mdata;//more data bit ++ u8 pctrl;//per packet txdesc control enable ++ u8 triggered;//for ap mode handling Power Saving sta ++ u8 qsel; ++ u8 eosp; ++ u8 rate; ++ u8 intel_proxim; ++ u8 retry_ctrl; ++ struct sta_info * psta; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ u8 hw_tcp_csum; ++#endif ++}; ++#endif ++ ++ ++#define WLANHDR_OFFSET 64 ++ ++#define NULL_FRAMETAG (0x0) ++#define DATA_FRAMETAG 0x01 ++#define L2_FRAMETAG 0x02 ++#define MGNT_FRAMETAG 0x03 ++#define AMSDU_FRAMETAG 0x04 ++ ++#define EII_FRAMETAG 0x05 ++#define IEEE8023_FRAMETAG 0x06 ++ ++#define MP_FRAMETAG 0x07 ++ ++#define TXAGG_FRAMETAG 0x08 ++ ++ ++struct xmit_buf ++{ ++ _list list; ++ ++ _adapter *padapter; ++ ++ u8 *pallocated_buf; ++ ++ u8 *pbuf; ++ ++ void *priv_data; ++ ++ u16 ext_tag; // 0: Normal xmitbuf, 1: extension xmitbuf. ++ u16 flags; ++ u32 alloc_sz; ++ ++#ifdef CONFIG_USB_HCI ++ ++ u32 sz[8]; ++ ++#if defined(PLATFORM_OS_XP)||defined(PLATFORM_LINUX) ++ PURB pxmit_urb[8]; ++ dma_addr_t dma_transfer_addr; /* (in) dma addr for transfer_buffer */ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ PIRP pxmit_irp[8]; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_write_port; ++#endif ++ ++#ifdef PLATFORM_LINUX ++ u8 isSync; //is this synchronous? ++ int status; // keeping urb status for synchronous call to access ++ struct completion done; // for wirte_port synchronously ++#endif ++ ++ u8 bpending[8]; ++ ++ sint last[8]; ++ ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++ u32 len; ++ u8 *phead; ++ u8 *pdata; ++ u8 *ptail; ++ u8 *pend; ++ u32 ff_hwaddr; ++#ifdef PLATFORM_OS_XP ++ PMDL pxmitbuf_mdl; ++ PIRP pxmitbuf_irp; ++ PSDBUS_REQUEST_PACKET pxmitbuf_sdrp; ++#endif ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ u32 len; ++#endif ++ ++#ifdef DBG_XMIT_BUF ++ u8 no; ++#endif ++ ++}; ++ ++struct xmit_frame ++{ ++ _list list; ++ ++ struct pkt_attrib attrib; ++ ++ _pkt *pkt; ++ ++ int frame_tag; ++ ++ _adapter *padapter; ++ ++ u8 *buf_addr; ++ ++ struct xmit_buf *pxmitbuf; ++ ++#ifdef CONFIG_SDIO_HCI ++ u8 pg_num; ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_USB_TX_AGGREGATION ++ u8 agg_num; ++#endif ++ u8 pkt_offset; ++#ifdef CONFIG_RTL8192D ++ u8 EMPktNum; ++ u16 EMPktLen[5];//The max value by HW ++#endif ++#endif ++}; ++ ++struct tx_servq { ++ _list tx_pending; ++ _queue sta_pending; ++ int qcnt; ++}; ++ ++ ++ ++struct sta_xmit_priv ++{ ++ _lock lock; ++ sint option; ++ sint apsd_setting; //When bit mask is on, the associated edca queue supports APSD. ++ ++ ++ //struct tx_servq blk_q[MAX_NUMBLKS]; ++ struct tx_servq be_q; //priority == 0,3 ++ struct tx_servq bk_q; //priority == 1,2 ++ struct tx_servq vi_q; //priority == 4,5 ++ struct tx_servq vo_q; //priority == 6,7 ++ _list legacy_dz; ++ _list apsd; ++ ++ u16 txseq_tid[16]; ++ ++ //uint sta_tx_bytes; ++ //u64 sta_tx_pkts; ++ //uint sta_tx_fail; ++ ++}; ++ ++ ++struct hw_txqueue { ++ volatile sint head; ++ volatile sint tail; ++ volatile sint free_sz; //in units of 64 bytes ++ volatile sint free_cmdsz; ++ volatile sint txsz[8]; ++ uint ff_hwaddr; ++ uint cmd_hwaddr; ++ sint ac_tag; ++}; ++ ++ ++struct xmit_priv { ++ ++ _lock lock; ++ ++ _sema xmit_sema; ++ _sema terminate_xmitthread_sema; ++ ++ //_queue blk_strms[MAX_NUMBLKS]; ++ _queue be_pending; ++ _queue bk_pending; ++ _queue vi_pending; ++ _queue vo_pending; ++ _queue bm_pending; ++ ++ //_queue legacy_dz_queue; ++ //_queue apsd_queue; ++ ++ u8 *pallocated_frame_buf; ++ u8 *pxmit_frame_buf; ++ uint free_xmitframe_cnt; ++ ++ //uint mapping_addr; ++ //uint pkt_sz; ++ ++ _queue free_xmit_queue; ++ ++ //struct hw_txqueue be_txqueue; ++ //struct hw_txqueue bk_txqueue; ++ //struct hw_txqueue vi_txqueue; ++ //struct hw_txqueue vo_txqueue; ++ //struct hw_txqueue bmc_txqueue; ++ ++ uint frag_len; ++ ++ _adapter *adapter; ++ ++ u8 vcs_setting; ++ u8 vcs; ++ u8 vcs_type; ++ //u16 rts_thresh; ++ ++ u64 tx_bytes; ++ u64 tx_pkts; ++ u64 tx_drop; ++ u64 last_tx_bytes; ++ u64 last_tx_pkts; ++ ++ struct hw_xmit *hwxmits; ++ u8 hwxmit_entry; ++ ++#ifdef CONFIG_USB_HCI ++ _sema tx_retevt;//all tx return event; ++ u8 txirp_cnt;// ++ ++#ifdef PLATFORM_OS_CE ++ USB_TRANSFER usb_transfer_write_port; ++// USB_TRANSFER usb_transfer_write_mem; ++#endif ++#ifdef PLATFORM_LINUX ++ struct tasklet_struct xmit_tasklet; ++#endif ++ //per AC pending irp ++ int beq_cnt; ++ int bkq_cnt; ++ int viq_cnt; ++ int voq_cnt; ++ ++#endif ++ ++#ifdef CONFIG_SDIO_HCI ++ u8 free_pg[8]; ++ u8 public_pgsz; ++ u8 required_pgsz; ++ u8 used_pgsz; ++ u8 init_pgsz; ++#ifdef PLATFORM_OS_XP ++ PMDL prd_freesz_mdl[2]; ++ u8 brd_freesz_pending[2]; ++ PIRP prd_freesz_irp[2]; ++ PSDBUS_REQUEST_PACKET prd_freesz_sdrp[2]; ++ u8 rd_freesz_irp_idx; ++#endif ++ ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++ // Tx ++ struct rtw_tx_ring tx_ring[PCI_MAX_TX_QUEUE_COUNT]; ++ int txringcount[PCI_MAX_TX_QUEUE_COUNT]; ++#ifdef PLATFORM_LINUX ++ struct tasklet_struct xmit_tasklet; ++#endif ++#endif ++ ++ _queue free_xmitbuf_queue; ++ _queue pending_xmitbuf_queue; // unused?? ++ u8 *pallocated_xmitbuf; ++ u8 *pxmitbuf; ++ uint free_xmitbuf_cnt; ++ ++ _queue free_xmit_extbuf_queue; ++ u8 *pallocated_xmit_extbuf; ++ u8 *pxmit_extbuf; ++ uint free_xmit_extbuf_cnt; ++ ++ u16 nqos_ssn; ++ ATOMIC_T HwRdyXmitData; // driver should wait hw setting done for join event callback, only for Data Frame. 1:done 0:not yet. ++}; ++ ++extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf); ++ ++void rtw_count_tx_stats(_adapter *padapter, struct xmit_frame *pxmitframe, int sz); ++extern void rtw_update_protection(_adapter *padapter, u8 *ie, uint ie_len); ++extern s32 rtw_make_wlanhdr(_adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib); ++extern s32 rtw_put_snap(u8 *data, u16 h_proto); ++ ++extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv); ++extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); ++extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, _queue *pframequeue); ++struct tx_servq *rtw_get_sta_pending(_adapter *padapter, struct sta_info *psta, sint up, u8 *ac); ++extern s32 rtw_xmitframe_enqueue(_adapter *padapter, struct xmit_frame *pxmitframe); ++extern struct xmit_frame* rtw_dequeue_xframe(struct xmit_priv *pxmitpriv, struct hw_xmit *phwxmit_i, sint entry); ++ ++extern s32 rtw_xmit_classifier(_adapter *padapter, struct xmit_frame *pxmitframe); ++extern thread_return rtw_xmit_thread(thread_context context); ++extern s32 rtw_xmitframe_coalesce(_adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe); ++#ifdef CONFIG_TDLS ++extern void rtw_tdls_dis_rsp_fr(_adapter * padapter, struct xmit_frame * pxmitframe, u8 *pframe, u8 dialog); ++extern s32 rtw_xmit_tdls_coalesce(_adapter *padapter, struct xmit_frame *pxmitframe, u8 action); ++void rtw_dump_xframe(_adapter *padapter, struct xmit_frame *pxmitframe); ++#endif ++#ifdef CONFIG_IOL ++void rtw_dump_xframe_sync(_adapter *padapter, struct xmit_frame *pxmitframe); ++#endif ++s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag); ++void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv); ++ ++ ++s32 rtw_txframes_pending(_adapter *padapter); ++s32 rtw_txframes_sta_ac_pending(_adapter *padapter, struct pkt_attrib *pattrib); ++void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry); ++ ++ ++s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, _adapter *padapter); ++void _rtw_free_xmit_priv (struct xmit_priv *pxmitpriv); ++ ++ ++void rtw_alloc_hwxmits(_adapter *padapter); ++void rtw_free_hwxmits(_adapter *padapter); ++ ++s32 rtw_free_xmitframe_ex(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe); ++ ++s32 rtw_xmit(_adapter *padapter, _pkt **pkt); ++ ++#ifdef CONFIG_TDLS ++sint xmitframe_enqueue_for_tdls_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); ++#endif ++ ++#ifdef CONFIG_AP_MODE ++sint xmitframe_enqueue_for_sleeping_sta(_adapter *padapter, struct xmit_frame *pxmitframe); ++void stop_sta_xmit(_adapter *padapter, struct sta_info *psta); ++void wakeup_sta_to_xmit(_adapter *padapter, struct sta_info *psta); ++void xmit_delivery_enabled_frames(_adapter *padapter, struct sta_info *psta); ++#endif ++ ++#endif //_RTL871X_XMIT_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_hal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_hal.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,34 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __SDIO_HAL_H__ ++ ++#define __SDIO_HAL_H__ ++ ++extern u8 sd_hal_bus_init(_adapter * adapter); ++extern u8 sd_hal_bus_deinit(_adapter * adapter); ++ ++ ++u8 sd_int_isr (IN PADAPTER padapter); ++void sd_int_dpc(PADAPTER padapter); ++ ++ ++#endif //__SDIO_HAL_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,80 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __SDIO_OPS_H_ ++#define __SDIO_OPS_H_ ++ ++#include ++#include ++#include ++#include ++ ++#ifdef PLATFORM_LINUX ++#include ++#endif ++ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#ifdef PLATFORM_OS_XP ++#include ++struct async_context ++{ ++ PMDL pmdl; ++ PSDBUS_REQUEST_PACKET sdrp; ++ unsigned char* r_buf; ++ unsigned char* padapter; ++}; ++#endif ++#ifdef PLATFORM_OS_CE ++#include ++#endif ++#endif ++ ++ ++ ++extern void sdio_set_intf_option(u32 *poption); ++ ++extern void sdio_set_intf_funs(struct intf_hdl *pintf_hdl); ++ ++extern uint sdio_init_intf_priv(struct intf_priv *pintfpriv); ++ ++extern void sdio_unload_intf_priv(struct intf_priv *pintfpriv); ++ ++extern void sdio_intf_hdl_init(u8 *priv); ++ ++extern void sdio_intf_hdl_unload(u8 *priv); ++ ++extern void sdio_intf_hdl_open(u8 *priv); ++ ++extern void sdio_intf_hdl_close(u8 *priv); ++ ++extern void sdio_set_intf_ops(struct _io_ops *pops); ++ ++//extern void sdio_set_intf_callbacks(struct _io_callbacks *pcallbacks); ++extern void sdio_func1cmd52_read(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *rmem); ++extern void sdio_func1cmd52_write(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *wmem); ++ ++extern uint __inline _cvrt2ftaddr(const u32 addr, u32 *pftaddr) ; ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_ce.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,56 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _SDIO_OPS_WINCE_H_ ++#define _SDIO_OPS_WINCE_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_CE ++ ++ ++extern u8 sdbus_cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++ ++ ++extern void sdbus_cmd52w_ce(struct intf_priv *pintfpriv, u32 addr,u8 val8); ++ ++ ++uint sdbus_read_blocks_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++extern uint sdbus_read_bytes_to_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_write_blocks_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++extern uint sdbus_write_bytes_from_membuf_ce(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++extern u8 sdbus_func1cmd52r_ce(struct intf_priv *pintfpriv, u32 addr); ++extern void sdbus_func1cmd52w_ce(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); ++ ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_linux.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_linux.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,55 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _SDIO_OPS_LINUX_H_ ++#define _SDIO_OPS_LINUX_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_LINUX ++ ++ ++extern u8 sdbus_cmd52r(struct intf_priv *pintfpriv, u32 addr); ++ ++ ++extern void sdbus_cmd52w(struct intf_priv *pintfpriv, u32 addr,u8 val8); ++extern u8 sdbus_direct_read8(struct intf_priv *pintfpriv, u32 addr); ++extern void sdbus_direct_write8(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++ ++extern uint sdbus_read_bytes_to_recvbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++extern uint sdbus_read_blocks_to_recvbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_write_blocks_from_xmitbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++extern uint sdbus_write_bytes_from_xmitbuf(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_xp.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_ops_xp.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,56 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _SDIO_OPS_XP_H_ ++#define _SDIO_OPS_XP_H_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef PLATFORM_OS_XP ++ ++ ++extern u8 sdbus_cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); ++ ++ ++extern void sdbus_cmd52w_xp(struct intf_priv *pintfpriv, u32 addr,u8 val8); ++ ++ ++uint sdbus_read_blocks_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++extern uint sdbus_read_bytes_to_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++ ++ ++extern uint sdbus_write_blocks_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf,u8 async); ++ ++extern uint sdbus_write_bytes_from_membuf_xp(struct intf_priv *pintfpriv, u32 addr, u32 cnt, u8 *pbuf); ++extern u8 sdbus_func1cmd52r_xp(struct intf_priv *pintfpriv, u32 addr); ++extern void sdbus_func1cmd52w_xp(struct intf_priv *pintfpriv, u32 addr, u8 val8); ++extern uint sdbus_read_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern uint sdbus_write_reg(struct intf_priv *pintfpriv, u32 addr, u32 cnt,void *pdata); ++extern void sdio_read_int(_adapter *padapter, u32 addr,u8 sz,void *pdata); ++ ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_osintf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sdio_osintf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,48 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __SDIO_OSINTF_H ++#define __SDIO_OSINTF_H ++ ++ ++#include ++#include ++#include ++ ++ ++extern unsigned int sd_dvobj_init(_adapter * adapter); ++extern void sd_dvobj_deinit(_adapter * adapter); ++ ++void rtl871x_intf_stop(_adapter *padapter); ++ ++u8 sd_hal_bus_init(_adapter * padapter); ++u8 sd_hal_bus_deinit(_adapter * padapter); ++void update_xmit_hw_res(_adapter * padapter); ++void sd_c2h_hdl( PADAPTER padapter); ++ ++#ifdef PLATFORM_OS_CE ++extern NDIS_STATUS ce_sd_get_dev_hdl(_adapter *padapter ); ++SD_API_STATUS ++ce_sd_int_callback(SD_DEVICE_HANDLE hDevice, _adapter* padapter); ++extern void sd_setup_irs(_adapter *padapter); ++#endif ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sta_info.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/sta_info.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,353 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#ifndef __STA_INFO_H_ ++#define __STA_INFO_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define IBSS_START_MAC_ID 2 ++#ifdef SUPPORT_64_STA ++#define NUM_STA 64 ++#else ++#define NUM_STA 32 ++#endif ++#define FW_CTRL_MACID 32 ++#define NUM_ACL 64 ++ ++ ++//if mode ==0, then the sta is allowed once the addr is hit. ++//if mode ==1, then the sta is rejected once the addr is non-hit. ++struct rtw_wlan_acl_node { ++ _list list; ++ u8 addr[ETH_ALEN]; ++ u8 mode; ++}; ++ ++struct wlan_acl_pool { ++ struct rtw_wlan_acl_node aclnode[NUM_ACL]; ++}; ++ ++typedef struct _RSSI_STA{ ++ int UndecoratedSmoothedPWDB; ++ int UndecoratedSmoothedCCK; ++}RSSI_STA, *PRSSI_STA; ++ ++struct stainfo_stats { ++ ++ //u64 rx_pkts; ++ u64 rx_mgnt_pkts; ++ u64 rx_ctrl_pkts; ++ u64 rx_data_pkts; ++ ++ //u64 last_rx_pkts; ++ u64 last_rx_mgnt_pkts; ++ u64 last_rx_ctrl_pkts; ++ u64 last_rx_data_pkts; ++ ++ u64 rx_bytes; ++ u64 rx_drops; ++ ++ u64 tx_pkts; ++ u64 tx_bytes; ++ u64 tx_drops; ++ ++}; ++ ++#ifdef CONFIG_TDLS ++struct TDLS_PeerKey { ++ u8 kck[16]; /* TPK-KCK */ ++ u8 tk[16]; /* TPK-TK; only CCMP will be used */ ++} ; ++#endif ++ ++struct sta_info { ++ ++ _lock lock; ++ _list list; //free_sta_queue ++ _list hash_list; //sta_hash ++ //_list asoc_list; //20061114 ++ //_list sleep_list;//sleep_q ++ //_list wakeup_list;//wakeup_q ++ ++ struct sta_xmit_priv sta_xmitpriv; ++ struct sta_recv_priv sta_recvpriv; ++ ++ _queue sleep_q; ++ unsigned int sleepq_len; ++ ++ uint state; ++ uint aid; ++ uint mac_id; ++ uint qos_option; ++ u8 hwaddr[ETH_ALEN]; ++ ++ uint ieee8021x_blocked; //0: allowed, 1:blocked ++ uint dot118021XPrivacy; //aes, tkip... ++ union Keytype dot11tkiptxmickey; ++ union Keytype dot11tkiprxmickey; ++ union Keytype dot118021x_UncstKey; ++ union pn48 dot11txpn; // PN48 used for Unicast xmit. ++ union pn48 dot11rxpn; // PN48 used for Unicast recv. ++ ++ ++ u8 bssrateset[16]; ++ u32 bssratelen; ++ s32 rssi; ++ s32 signal_quality; ++ ++ u8 cts2self; ++ u8 rtsen; ++ ++ u8 raid; ++ u8 init_rate; ++ u32 ra_mask; ++ struct stainfo_stats sta_stats; ++ ++#ifdef CONFIG_TDLS ++ u32 tdls_sta_state; ++ u8 dialog; ++ u8 SNonce[32]; ++ u8 ANonce[32]; ++ u32 TDLS_PeerKey_Lifetime; ++ u16 TPK_count; ++ _timer TPK_timer; ++ struct TDLS_PeerKey tpk; ++ _adapter *padapter; ++ u8 cam_entry; ++ u16 stat_code; ++ u8 off_ch; ++ u16 ch_switch_time; ++ u16 ch_switch_timeout; ++ u8 option; ++ _timer option_timer; ++ _timer base_ch_timer; ++ _timer off_ch_timer; ++ ++ _timer handshake_timer; ++ _timer alive_timer1; ++ _timer alive_timer2; ++ u8 timer_flag; ++ u8 alive_count; ++#endif ++ ++ //for A-MPDU TX, ADDBA timeout check ++ _timer addba_retry_timer; ++ ++ //for A-MPDU Rx reordering buffer control ++ struct recv_reorder_ctrl recvreorder_ctrl[16]; ++ ++ //for A-MPDU Tx ++ //unsigned char ampdu_txen_bitmap; ++ u16 BA_starting_seqctrl[16]; ++ ++ ++#ifdef CONFIG_80211N_HT ++ struct ht_priv htpriv; ++#endif ++ ++ //Notes: ++ //STA_Mode: ++ //curr_network(mlme_priv/security_priv/qos/ht) + sta_info: (STA & AP) CAP/INFO ++ //scan_q: AP CAP/INFO ++ ++ //AP_Mode: ++ //curr_network(mlme_priv/security_priv/qos/ht) : AP CAP/INFO ++ //sta_info: (AP & STA) CAP/INFO ++ ++#ifdef CONFIG_AP_MODE ++ ++ _list asoc_list; ++ _list auth_list; ++ ++ unsigned int expire_to; ++ unsigned int auth_seq; ++ unsigned int authalg; ++ unsigned char chg_txt[128]; ++ ++ u16 capability; ++ int flags; ++ ++ int dot8021xalg;//0:disable, 1:psk, 2:802.1x ++ int wpa_psk;//0:disable, bit(0): WPA, bit(1):WPA2 ++ int wpa_group_cipher; ++ int wpa2_group_cipher; ++ int wpa_pairwise_cipher; ++ int wpa2_pairwise_cipher; ++ ++ u8 bpairwise_key_installed; ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ u8 wpa_ie[32]; ++ ++ u8 nonerp_set; ++ u8 no_short_slot_time_set; ++ u8 no_short_preamble_set; ++ u8 no_ht_gf_set; ++ u8 no_ht_set; ++ u8 ht_20mhz_set; ++#endif // CONFIG_NATIVEAP_MLME ++ ++ unsigned int tx_ra_bitmap; ++ u8 qos_info; ++ ++ u8 max_sp_len; ++ u8 uapsd_bk;//BIT(0): Delivery enabled, BIT(1): Trigger enabled ++ u8 uapsd_be; ++ u8 uapsd_vi; ++ u8 uapsd_vo; ++ ++ u8 has_legacy_ac; ++ unsigned int sleepq_ac_len; ++ ++#ifdef CONFIG_P2P ++ //p2p priv data ++ u8 is_p2p_device; ++ u8 p2p_status_code; ++ ++ //p2p client info ++ u8 dev_addr[ETH_ALEN]; ++ //u8 iface_addr[ETH_ALEN];//= hwaddr[ETH_ALEN] ++ u8 dev_cap; ++ u16 config_methods; ++ u8 primary_dev_type[8]; ++ u8 num_of_secdev_type; ++ u8 secdev_types_list[32];// 32/8 == 4; ++ u16 dev_name_len; ++ u8 dev_name[32]; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ u8 under_exist_checking; ++#endif // CONFIG_TX_MCAST2UNI ++ ++#endif // CONFIG_AP_MODE ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ u8 *passoc_req; ++ u32 assoc_req_len; ++#endif ++ ++ //for DM ++ RSSI_STA rssi_stat; ++ ++ ++}; ++ ++#define sta_rx_pkts(sta) \ ++ (sta->sta_stats.rx_mgnt_pkts \ ++ + sta->sta_stats.rx_ctrl_pkts \ ++ + sta->sta_stats.rx_data_pkts) ++ ++#define sta_last_rx_pkts(sta) \ ++ (sta->sta_stats.last_rx_mgnt_pkts \ ++ + sta->sta_stats.last_rx_ctrl_pkts \ ++ + sta->sta_stats.last_rx_data_pkts) ++ ++#define sta_update_last_rx_pkts(sta) \ ++ do { \ ++ sta->sta_stats.last_rx_mgnt_pkts = sta->sta_stats.rx_mgnt_pkts; \ ++ sta->sta_stats.last_rx_ctrl_pkts = sta->sta_stats.rx_ctrl_pkts; \ ++ sta->sta_stats.last_rx_data_pkts = sta->sta_stats.rx_data_pkts; \ ++ } while(0) ++ ++#define STA_RX_PKTS_ARG(sta) \ ++ sta->sta_stats.rx_mgnt_pkts \ ++ , sta->sta_stats.rx_ctrl_pkts \ ++ , sta->sta_stats.rx_data_pkts ++ ++#define STA_LAST_RX_PKTS_ARG(sta) \ ++ sta->sta_stats.last_rx_mgnt_pkts \ ++ , sta->sta_stats.last_rx_ctrl_pkts \ ++ , sta->sta_stats.last_rx_data_pkts ++ ++#define STA_PKTS_FMT "(m:%llu, c:%llu, d:%llu)" ++ ++struct sta_priv { ++ ++ u8 *pallocated_stainfo_buf; ++ u8 *pstainfo_buf; ++ _queue free_sta_queue; ++ ++ _lock sta_hash_lock; ++ _list sta_hash[NUM_STA]; ++ int asoc_sta_count; ++ _queue sleep_q; ++ _queue wakeup_q; ++ ++ _adapter *padapter; ++ ++ ++#ifdef CONFIG_AP_MODE ++ _list asoc_list; ++ _list auth_list; ++ _lock asoc_list_lock; ++ _lock auth_list_lock; ++ ++ unsigned int auth_to; //sec, time to expire in authenticating. ++ unsigned int assoc_to; //sec, time to expire before associating. ++ unsigned int expire_to; //sec , time to expire after associated. ++ ++ /* pointers to STA info; based on allocated AID or NULL if AID free ++ * AID is in the range 1-2007, so sta_aid[0] corresponders to AID 1 ++ * and so on ++ */ ++ struct sta_info *sta_aid[NUM_STA]; ++ ++ u16 sta_dz_bitmap;//only support 15 stations, staion aid bitmap for sleeping sta. ++ u16 tim_bitmap;//only support 15 stations, aid=0~15 mapping bit0~bit15 ++ ++ u16 max_num_sta; ++#endif ++ ++}; ++ ++ ++__inline static u32 wifi_mac_hash(u8 *mac) ++{ ++ u32 x; ++ ++ x = mac[0]; ++ x = (x << 2) ^ mac[1]; ++ x = (x << 2) ^ mac[2]; ++ x = (x << 2) ^ mac[3]; ++ x = (x << 2) ^ mac[4]; ++ x = (x << 2) ^ mac[5]; ++ ++ x ^= x >> 8; ++ x = x & (NUM_STA - 1); ++ ++ return x; ++} ++ ++ ++extern u32 _rtw_init_sta_priv(struct sta_priv *pstapriv); ++extern u32 _rtw_free_sta_priv(struct sta_priv *pstapriv); ++extern struct sta_info *rtw_alloc_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); ++extern u32 rtw_free_stainfo(_adapter *padapter , struct sta_info *psta); ++extern void rtw_free_all_stainfo(_adapter *padapter); ++extern struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr); ++extern u32 rtw_init_bcmc_stainfo(_adapter* padapter); ++extern struct sta_info* rtw_get_bcmc_stainfo(_adapter* padapter); ++extern u8 rtw_access_ctrl(struct wlan_acl_pool* pacl_list, u8 * mac_addr); ++ ++#endif //_STA_INFO_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_hal.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_hal.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,32 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __USB_HAL_H__ ++#define __USB_HAL_H__ ++ ++ ++void rtl8192cu_set_hal_ops(_adapter * padapter); ++ ++void rtl8192du_set_hal_ops(_adapter * padapter); ++#ifdef CONFIG_INTEL_PROXIM ++extern _adapter *rtw_usb_get_sw_pointer(void); ++#endif //CONFIG_INTEL_PROXIM ++#endif //__USB_HAL_H__ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_ops.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_ops.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,100 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __USB_OPS_H_ ++#define __USB_OPS_H_ ++ ++#include ++#include ++#include ++#include ++ ++#define REALTEK_USB_VENQT_READ 0xC0 ++#define REALTEK_USB_VENQT_WRITE 0x40 ++#define REALTEK_USB_VENQT_CMD_REQ 0x05 ++#define REALTEK_USB_VENQT_CMD_IDX 0x00 ++ ++enum{ ++ VENDOR_WRITE = 0x00, ++ VENDOR_READ = 0x01, ++}; ++#define ALIGNMENT_UNIT 16 ++#define MAX_VENDOR_REQ_CMD_SIZE 254 //8188cu SIE Support ++#define MAX_USB_IO_CTL_SIZE (MAX_VENDOR_REQ_CMD_SIZE +ALIGNMENT_UNIT) ++ ++#ifdef PLATFORM_LINUX ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) ++#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size, timeout_ms) \ ++ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), (timeout_ms)) ++#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ ++ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), (timeout_ms)) ++#else ++#define rtw_usb_control_msg(dev, pipe, request, requesttype, value, index, data, size,timeout_ms) \ ++ usb_control_msg((dev), (pipe), (request), (requesttype), (value), (index), (data), (size), \ ++ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) ++#define rtw_usb_bulk_msg(usb_dev, pipe, data, len, actual_length, timeout_ms) \ ++ usb_bulk_msg((usb_dev), (pipe), (data), (len), (actual_length), \ ++ ((timeout_ms) == 0) ||((timeout_ms)*HZ/1000>0)?((timeout_ms)*HZ/1000):1) ++#endif ++#endif //PLATFORM_LINUX ++ ++#ifdef CONFIG_RTL8192C ++void rtl8192cu_set_intf_ops(struct _io_ops *pops); ++ ++void rtl8192cu_recv_tasklet(void *priv); ++ ++void rtl8192cu_xmit_tasklet(void *priv); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++void rtl8192du_set_intf_ops(struct _io_ops *pops); ++ ++void rtl8192du_recv_tasklet(void *priv); ++ ++void rtl8192du_xmit_tasklet(void *priv); ++#endif ++ ++/* ++* Increase and check if the continual_urb_error of this @param dvobjprive is larger than MAX_CONTINUAL_URB_ERR ++* @return _TRUE: ++* @return _FALSE: ++*/ ++static inline int rtw_inc_and_chk_continual_urb_error(struct dvobj_priv *dvobjpriv) ++{ ++ int ret = _FALSE; ++ int value; ++ if( (value=ATOMIC_INC_RETURN(&dvobjpriv->continual_urb_error)) > MAX_CONTINUAL_URB_ERR) { ++ DBG_871X("[dvobjpriv:%p][ERROR] continual_urb_error:%d > %d\n", dvobjpriv, value, MAX_CONTINUAL_URB_ERR); ++ ret = _TRUE; ++ } else { ++ //DBG_871X("[dvobjpriv:%p] continual_urb_error:%d\n", dvobjpriv, value); ++ } ++ return ret; ++} ++ ++/* ++* Set the continual_urb_error of this @param dvobjprive to 0 ++*/ ++static inline void rtw_reset_continual_urb_error(struct dvobj_priv *dvobjpriv) ++{ ++ ATOMIC_SET(&dvobjpriv->continual_urb_error, 0); ++} ++ ++#endif //__USB_OPS_H_ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_osintf.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_osintf.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,39 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __USB_OSINTF_H ++#define __USB_OSINTF_H ++ ++#include ++#include ++#include ++#include ++ ++#define USBD_HALTED(Status) ((ULONG)(Status) >> 30 == 3) ++ ++ ++//uint usb_dvobj_init(_adapter * adapter); ++//void usb_dvobj_deinit(_adapter * adapter); ++ ++u8 usbvendorrequest(struct dvobj_priv *pdvobjpriv, RT_USB_BREQUEST brequest, RT_USB_WVALUE wvalue, u8 windex, void* data, u8 datalen, u8 isdirectionin); ++ ++ ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_vendor_req.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/usb_vendor_req.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,60 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _USB_VENDOR_REQUEST_H_ ++#define _USB_VENDOR_REQUEST_H_ ++ ++//4 Set/Get Register related wIndex/Data ++#define RT_USB_RESET_MASK_OFF 0 ++#define RT_USB_RESET_MASK_ON 1 ++#define RT_USB_SLEEP_MASK_OFF 0 ++#define RT_USB_SLEEP_MASK_ON 1 ++#define RT_USB_LDO_ON 1 ++#define RT_USB_LDO_OFF 0 ++ ++//4 Set/Get SYSCLK related wValue or Data ++#define RT_USB_SYSCLK_32KHZ 0 ++#define RT_USB_SYSCLK_40MHZ 1 ++#define RT_USB_SYSCLK_60MHZ 2 ++ ++ ++typedef enum _RT_USB_BREQUEST { ++ RT_USB_SET_REGISTER = 1, ++ RT_USB_SET_SYSCLK = 2, ++ RT_USB_GET_SYSCLK = 3, ++ RT_USB_GET_REGISTER = 4 ++} RT_USB_BREQUEST; ++ ++ ++typedef enum _RT_USB_WVALUE { ++ RT_USB_RESET_MASK = 1, ++ RT_USB_SLEEP_MASK = 2, ++ RT_USB_USB_HRCPWM = 3, ++ RT_USB_LDO = 4, ++ RT_USB_BOOT_TYPE = 5 ++} RT_USB_WVALUE; ++ ++ ++//BOOLEAN usbvendorrequest(PCE_USB_DEVICE CEdevice, RT_USB_BREQUEST bRequest, RT_USB_WVALUE wValue, UCHAR wIndex, PVOID Data, UCHAR DataLength, BOOLEAN isDirectionIn); ++//BOOLEAN CEusbGetStatusRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT Index, PVOID Data); ++//BOOLEAN CEusbFeatureRequest(PCE_USB_DEVICE CEdevice, IN USHORT Op, IN USHORT FeatureSelector, IN USHORT Index); ++//BOOLEAN CEusbGetDescriptorRequest(PCE_USB_DEVICE CEdevice, IN short urbLength, IN UCHAR DescriptorType, IN UCHAR Index, IN USHORT LanguageId, IN PVOID TransferBuffer, IN ULONG TransferBufferLength); ++ ++#endif +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/wifi.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/wifi.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1190 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef _WIFI_H_ ++#define _WIFI_H_ ++ ++#include ++ ++#ifdef BIT ++//#error "BIT define occurred earlier elsewhere!\n" ++#undef BIT ++#endif ++#define BIT(x) (1 << (x)) ++ ++ ++#define WLAN_ETHHDR_LEN 14 ++#define WLAN_ETHADDR_LEN 6 ++#define WLAN_IEEE_OUI_LEN 3 ++#define WLAN_ADDR_LEN 6 ++#define WLAN_CRC_LEN 4 ++#define WLAN_BSSID_LEN 6 ++#define WLAN_BSS_TS_LEN 8 ++#define WLAN_HDR_A3_LEN 24 ++#define WLAN_HDR_A4_LEN 30 ++#define WLAN_HDR_A3_QOS_LEN 26 ++#define WLAN_HDR_A4_QOS_LEN 32 ++#define WLAN_SSID_MAXLEN 32 ++#define WLAN_DATA_MAXLEN 2312 ++ ++#define WLAN_A3_PN_OFFSET 24 ++#define WLAN_A4_PN_OFFSET 30 ++ ++#define WLAN_MIN_ETHFRM_LEN 60 ++#define WLAN_MAX_ETHFRM_LEN 1514 ++#define WLAN_ETHHDR_LEN 14 ++ ++#define P80211CAPTURE_VERSION 0x80211001 ++ ++#ifdef GREEN_HILL ++#pragma pack(1) ++#endif ++ ++enum WIFI_FRAME_TYPE { ++ WIFI_MGT_TYPE = (0), ++ WIFI_CTRL_TYPE = (BIT(2)), ++ WIFI_DATA_TYPE = (BIT(3)), ++ WIFI_QOS_DATA_TYPE = (BIT(7)|BIT(3)), //!< QoS Data ++}; ++ ++enum WIFI_FRAME_SUBTYPE { ++ ++ // below is for mgt frame ++ WIFI_ASSOCREQ = (0 | WIFI_MGT_TYPE), ++ WIFI_ASSOCRSP = (BIT(4) | WIFI_MGT_TYPE), ++ WIFI_REASSOCREQ = (BIT(5) | WIFI_MGT_TYPE), ++ WIFI_REASSOCRSP = (BIT(5) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_PROBEREQ = (BIT(6) | WIFI_MGT_TYPE), ++ WIFI_PROBERSP = (BIT(6) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_BEACON = (BIT(7) | WIFI_MGT_TYPE), ++ WIFI_ATIM = (BIT(7) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_DISASSOC = (BIT(7) | BIT(5) | WIFI_MGT_TYPE), ++ WIFI_AUTH = (BIT(7) | BIT(5) | BIT(4) | WIFI_MGT_TYPE), ++ WIFI_DEAUTH = (BIT(7) | BIT(6) | WIFI_MGT_TYPE), ++ WIFI_ACTION = (BIT(7) | BIT(6) | BIT(4) | WIFI_MGT_TYPE), ++ ++ // below is for control frame ++ WIFI_PSPOLL = (BIT(7) | BIT(5) | WIFI_CTRL_TYPE), ++ WIFI_RTS = (BIT(7) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), ++ WIFI_CTS = (BIT(7) | BIT(6) | WIFI_CTRL_TYPE), ++ WIFI_ACK = (BIT(7) | BIT(6) | BIT(4) | WIFI_CTRL_TYPE), ++ WIFI_CFEND = (BIT(7) | BIT(6) | BIT(5) | WIFI_CTRL_TYPE), ++ WIFI_CFEND_CFACK = (BIT(7) | BIT(6) | BIT(5) | BIT(4) | WIFI_CTRL_TYPE), ++ ++ // below is for data frame ++ WIFI_DATA = (0 | WIFI_DATA_TYPE), ++ WIFI_DATA_CFACK = (BIT(4) | WIFI_DATA_TYPE), ++ WIFI_DATA_CFPOLL = (BIT(5) | WIFI_DATA_TYPE), ++ WIFI_DATA_CFACKPOLL = (BIT(5) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_DATA_NULL = (BIT(6) | WIFI_DATA_TYPE), ++ WIFI_CF_ACK = (BIT(6) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_CF_POLL = (BIT(6) | BIT(5) | WIFI_DATA_TYPE), ++ WIFI_CF_ACKPOLL = (BIT(6) | BIT(5) | BIT(4) | WIFI_DATA_TYPE), ++ WIFI_QOS_DATA_NULL = (BIT(6) | WIFI_QOS_DATA_TYPE), ++}; ++ ++enum WIFI_REASON_CODE { ++ _RSON_RESERVED_ = 0, ++ _RSON_UNSPECIFIED_ = 1, ++ _RSON_AUTH_NO_LONGER_VALID_ = 2, ++ _RSON_DEAUTH_STA_LEAVING_ = 3, ++ _RSON_INACTIVITY_ = 4, ++ _RSON_UNABLE_HANDLE_ = 5, ++ _RSON_CLS2_ = 6, ++ _RSON_CLS3_ = 7, ++ _RSON_DISAOC_STA_LEAVING_ = 8, ++ _RSON_ASOC_NOT_AUTH_ = 9, ++ ++ // WPA reason ++ _RSON_INVALID_IE_ = 13, ++ _RSON_MIC_FAILURE_ = 14, ++ _RSON_4WAY_HNDSHK_TIMEOUT_ = 15, ++ _RSON_GROUP_KEY_UPDATE_TIMEOUT_ = 16, ++ _RSON_DIFF_IE_ = 17, ++ _RSON_MLTCST_CIPHER_NOT_VALID_ = 18, ++ _RSON_UNICST_CIPHER_NOT_VALID_ = 19, ++ _RSON_AKMP_NOT_VALID_ = 20, ++ _RSON_UNSUPPORT_RSNE_VER_ = 21, ++ _RSON_INVALID_RSNE_CAP_ = 22, ++ _RSON_IEEE_802DOT1X_AUTH_FAIL_ = 23, ++ ++ //belowing are Realtek definition ++ _RSON_PMK_NOT_AVAILABLE_ = 24, ++ _RSON_TDLS_TEAR_TOOFAR_ = 25, ++ _RSON_TDLS_TEAR_UN_RSN_ = 26, ++}; ++ ++/* Reason codes (IEEE 802.11-2007, 7.3.1.7, Table 7-22) */ ++#if 0 ++#define WLAN_REASON_UNSPECIFIED 1 ++#define WLAN_REASON_PREV_AUTH_NOT_VALID 2 ++#define WLAN_REASON_DEAUTH_LEAVING 3 ++#define WLAN_REASON_DISASSOC_DUE_TO_INACTIVITY 4 ++#define WLAN_REASON_DISASSOC_AP_BUSY 5 ++#define WLAN_REASON_CLASS2_FRAME_FROM_NONAUTH_STA 6 ++#define WLAN_REASON_CLASS3_FRAME_FROM_NONASSOC_STA 7 ++#define WLAN_REASON_DISASSOC_STA_HAS_LEFT 8 ++#define WLAN_REASON_STA_REQ_ASSOC_WITHOUT_AUTH 9 ++#endif ++/* IEEE 802.11h */ ++#define WLAN_REASON_PWR_CAPABILITY_NOT_VALID 10 ++#define WLAN_REASON_SUPPORTED_CHANNEL_NOT_VALID 11 ++#if 0 ++/* IEEE 802.11i */ ++#define WLAN_REASON_INVALID_IE 13 ++#define WLAN_REASON_MICHAEL_MIC_FAILURE 14 ++#define WLAN_REASON_4WAY_HANDSHAKE_TIMEOUT 15 ++#define WLAN_REASON_GROUP_KEY_UPDATE_TIMEOUT 16 ++#define WLAN_REASON_IE_IN_4WAY_DIFFERS 17 ++#define WLAN_REASON_GROUP_CIPHER_NOT_VALID 18 ++#define WLAN_REASON_PAIRWISE_CIPHER_NOT_VALID 19 ++#define WLAN_REASON_AKMP_NOT_VALID 20 ++#define WLAN_REASON_UNSUPPORTED_RSN_IE_VERSION 21 ++#define WLAN_REASON_INVALID_RSN_IE_CAPAB 22 ++#define WLAN_REASON_IEEE_802_1X_AUTH_FAILED 23 ++#define WLAN_REASON_CIPHER_SUITE_REJECTED 24 ++#endif ++ ++enum WIFI_STATUS_CODE { ++ _STATS_SUCCESSFUL_ = 0, ++ _STATS_FAILURE_ = 1, ++ _STATS_CAP_FAIL_ = 10, ++ _STATS_NO_ASOC_ = 11, ++ _STATS_OTHER_ = 12, ++ _STATS_NO_SUPP_ALG_ = 13, ++ _STATS_OUT_OF_AUTH_SEQ_ = 14, ++ _STATS_CHALLENGE_FAIL_ = 15, ++ _STATS_AUTH_TIMEOUT_ = 16, ++ _STATS_UNABLE_HANDLE_STA_ = 17, ++ _STATS_RATE_FAIL_ = 18, ++}; ++ ++/* Status codes (IEEE 802.11-2007, 7.3.1.9, Table 7-23) */ ++#if 0 ++#define WLAN_STATUS_SUCCESS 0 ++#define WLAN_STATUS_UNSPECIFIED_FAILURE 1 ++#define WLAN_STATUS_CAPS_UNSUPPORTED 10 ++#define WLAN_STATUS_REASSOC_NO_ASSOC 11 ++#define WLAN_STATUS_ASSOC_DENIED_UNSPEC 12 ++#define WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG 13 ++#define WLAN_STATUS_UNKNOWN_AUTH_TRANSACTION 14 ++#define WLAN_STATUS_CHALLENGE_FAIL 15 ++#define WLAN_STATUS_AUTH_TIMEOUT 16 ++#define WLAN_STATUS_AP_UNABLE_TO_HANDLE_NEW_STA 17 ++#define WLAN_STATUS_ASSOC_DENIED_RATES 18 ++#endif ++//entended ++/* IEEE 802.11b */ ++#define WLAN_STATUS_ASSOC_DENIED_NOSHORT 19 ++#define WLAN_STATUS_ASSOC_DENIED_NOPBCC 20 ++#define WLAN_STATUS_ASSOC_DENIED_NOAGILITY 21 ++/* IEEE 802.11h */ ++#define WLAN_STATUS_SPEC_MGMT_REQUIRED 22 ++#define WLAN_STATUS_PWR_CAPABILITY_NOT_VALID 23 ++#define WLAN_STATUS_SUPPORTED_CHANNEL_NOT_VALID 24 ++/* IEEE 802.11g */ ++#define WLAN_STATUS_ASSOC_DENIED_NO_SHORT_SLOT_TIME 25 ++#define WLAN_STATUS_ASSOC_DENIED_NO_ER_PBCC 26 ++#define WLAN_STATUS_ASSOC_DENIED_NO_DSSS_OFDM 27 ++/* IEEE 802.11w */ ++#define WLAN_STATUS_ASSOC_REJECTED_TEMPORARILY 30 ++#define WLAN_STATUS_ROBUST_MGMT_FRAME_POLICY_VIOLATION 31 ++/* IEEE 802.11i */ ++#define WLAN_STATUS_INVALID_IE 40 ++#define WLAN_STATUS_GROUP_CIPHER_NOT_VALID 41 ++#define WLAN_STATUS_PAIRWISE_CIPHER_NOT_VALID 42 ++#define WLAN_STATUS_AKMP_NOT_VALID 43 ++#define WLAN_STATUS_UNSUPPORTED_RSN_IE_VERSION 44 ++#define WLAN_STATUS_INVALID_RSN_IE_CAPAB 45 ++#define WLAN_STATUS_CIPHER_REJECTED_PER_POLICY 46 ++#define WLAN_STATUS_TS_NOT_CREATED 47 ++#define WLAN_STATUS_DIRECT_LINK_NOT_ALLOWED 48 ++#define WLAN_STATUS_DEST_STA_NOT_PRESENT 49 ++#define WLAN_STATUS_DEST_STA_NOT_QOS_STA 50 ++#define WLAN_STATUS_ASSOC_DENIED_LISTEN_INT_TOO_LARGE 51 ++/* IEEE 802.11r */ ++#define WLAN_STATUS_INVALID_FT_ACTION_FRAME_COUNT 52 ++#define WLAN_STATUS_INVALID_PMKID 53 ++#define WLAN_STATUS_INVALID_MDIE 54 ++#define WLAN_STATUS_INVALID_FTIE 55 ++ ++ ++enum WIFI_REG_DOMAIN { ++ DOMAIN_FCC = 1, ++ DOMAIN_IC = 2, ++ DOMAIN_ETSI = 3, ++ DOMAIN_SPAIN = 4, ++ DOMAIN_FRANCE = 5, ++ DOMAIN_MKK = 6, ++ DOMAIN_ISRAEL = 7, ++ DOMAIN_MKK1 = 8, ++ DOMAIN_MKK2 = 9, ++ DOMAIN_MKK3 = 10, ++ DOMAIN_MAX ++}; ++ ++#define _TO_DS_ BIT(8) ++#define _FROM_DS_ BIT(9) ++#define _MORE_FRAG_ BIT(10) ++#define _RETRY_ BIT(11) ++#define _PWRMGT_ BIT(12) ++#define _MORE_DATA_ BIT(13) ++#define _PRIVACY_ BIT(14) ++#define _ORDER_ BIT(15) ++ ++#define SetToDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_TO_DS_); \ ++ } while(0) ++ ++#define GetToDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_TO_DS_)) != 0) ++ ++#define ClearToDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_TO_DS_)); \ ++ } while(0) ++ ++#define SetFrDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_FROM_DS_); \ ++ } while(0) ++ ++#define GetFrDs(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_FROM_DS_)) != 0) ++ ++#define ClearFrDs(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_FROM_DS_)); \ ++ } while(0) ++ ++#define get_tofr_ds(pframe) ((GetToDs(pframe) << 1) | GetFrDs(pframe)) ++ ++ ++#define SetMFrag(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_FRAG_); \ ++ } while(0) ++ ++#define GetMFrag(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_FRAG_)) != 0) ++ ++#define ClearMFrag(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_FRAG_)); \ ++ } while(0) ++ ++#define SetRetry(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_RETRY_); \ ++ } while(0) ++ ++#define GetRetry(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_RETRY_)) != 0) ++ ++#define ClearRetry(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_RETRY_)); \ ++ } while(0) ++ ++#define SetPwrMgt(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_PWRMGT_); \ ++ } while(0) ++ ++#define GetPwrMgt(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PWRMGT_)) != 0) ++ ++#define ClearPwrMgt(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PWRMGT_)); \ ++ } while(0) ++ ++#define SetMData(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_MORE_DATA_); \ ++ } while(0) ++ ++#define GetMData(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_MORE_DATA_)) != 0) ++ ++#define ClearMData(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_MORE_DATA_)); \ ++ } while(0) ++ ++#define SetPrivacy(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_PRIVACY_); \ ++ } while(0) ++ ++#define GetPrivacy(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_PRIVACY_)) != 0) ++ ++#define ClearPrivacy(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= (~cpu_to_le16(_PRIVACY_)); \ ++ } while(0) ++ ++ ++#define GetOrder(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) ++ ++#define GetFrameType(pbuf) (le16_to_cpu(*(unsigned short *)(pbuf)) & (BIT(3) | BIT(2))) ++ ++#define SetFrameType(pbuf,type) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= __constant_cpu_to_le16(~(BIT(3) | BIT(2))); \ ++ *(unsigned short *)(pbuf) |= __constant_cpu_to_le16(type); \ ++ } while(0) ++ ++#define GetFrameSubType(pbuf) (cpu_to_le16(*(unsigned short *)(pbuf)) & (BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))) ++ ++#define SetFrameSubType(pbuf,type) \ ++ do { \ ++ *(unsigned short *)(pbuf) &= cpu_to_le16(~(BIT(7) | BIT(6) | BIT(5) | BIT(4) | BIT(3) | BIT(2))); \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(type); \ ++ } while(0) ++ ++#define GetSequence(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) >> 4) ++ ++#define GetFragNum(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & 0x0f) ++ ++#define GetTupleCache(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 22))) ++ ++#define SetFragNum(pbuf, num) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ++ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu(~(0x000f))) | \ ++ cpu_to_le16(0x0f & (num)); \ ++ } while(0) ++ ++#define SetSeqNum(pbuf, num) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 22) = \ ++ ((*(unsigned short *)((SIZE_PTR)(pbuf) + 22)) & le16_to_cpu((unsigned short)~0xfff0)) | \ ++ le16_to_cpu((unsigned short)(0xfff0 & (num << 4))); \ ++ } while(0) ++ ++#define SetDuration(pbuf, dur) \ ++ do { \ ++ *(unsigned short *)((SIZE_PTR)(pbuf) + 2) = cpu_to_le16(0xffff & (dur)); \ ++ } while(0) ++ ++ ++#define SetPriority(pbuf, tid) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(tid & 0xf); \ ++ } while(0) ++ ++#define GetPriority(pbuf) ((le16_to_cpu(*(unsigned short *)(pbuf))) & 0xf) ++ ++#define SetEOSP(pbuf, eosp) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (eosp & 1) << 4); \ ++ } while(0) ++ ++#define SetAckpolicy(pbuf, ack) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (ack & 3) << 5); \ ++ } while(0) ++ ++#define GetAckpolicy(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 5) & 0x3) ++ ++#define GetAMsdu(pbuf) (((le16_to_cpu(*(unsigned short *)pbuf)) >> 7) & 0x1) ++ ++#define SetAMsdu(pbuf, amsdu) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16( (amsdu & 1) << 7); \ ++ } while(0) ++ ++#define GetAid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + 2)) & 0x3fff) ++ ++#define GetTid(pbuf) (cpu_to_le16(*(unsigned short *)((SIZE_PTR)(pbuf) + (((GetToDs(pbuf)<<1)|GetFrDs(pbuf))==3?30:24))) & 0x000f) ++ ++#define GetAddr1Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 4)) ++ ++#define GetAddr2Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 10)) ++ ++#define GetAddr3Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 16)) ++ ++#define GetAddr4Ptr(pbuf) ((unsigned char *)((SIZE_PTR)(pbuf) + 24)) ++ ++#define MacAddr_isBcst(addr) \ ++( \ ++ ( (addr[0] == 0xff) && (addr[1] == 0xff) && \ ++ (addr[2] == 0xff) && (addr[3] == 0xff) && \ ++ (addr[4] == 0xff) && (addr[5] == 0xff) ) ? _TRUE : _FALSE \ ++) ++ ++__inline static int IS_MCAST(unsigned char *da) ++{ ++ if ((*da) & 0x01) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++ ++__inline static unsigned char * get_da(unsigned char *pframe) ++{ ++ unsigned char *da; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ da = GetAddr1Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ da = GetAddr1Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ da = GetAddr3Ptr(pframe); ++ break; ++ default: // ToDs=1, FromDs=1 ++ da = GetAddr3Ptr(pframe); ++ break; ++ } ++ ++ return da; ++} ++ ++ ++__inline static unsigned char * get_sa(unsigned char *pframe) ++{ ++ unsigned char *sa; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ sa = GetAddr3Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ default: // ToDs=1, FromDs=1 ++ sa = GetAddr4Ptr(pframe); ++ break; ++ } ++ ++ return sa; ++} ++ ++__inline static unsigned char * get_hdr_bssid(unsigned char *pframe) ++{ ++ unsigned char *sa; ++ unsigned int to_fr_ds = (GetToDs(pframe) << 1) | GetFrDs(pframe); ++ ++ switch (to_fr_ds) { ++ case 0x00: // ToDs=0, FromDs=0 ++ sa = GetAddr3Ptr(pframe); ++ break; ++ case 0x01: // ToDs=0, FromDs=1 ++ sa = GetAddr2Ptr(pframe); ++ break; ++ case 0x02: // ToDs=1, FromDs=0 ++ sa = GetAddr1Ptr(pframe); ++ break; ++ case 0x03: // ToDs=1, FromDs=1 ++ sa = GetAddr1Ptr(pframe); ++ break; ++ default: ++ sa =NULL; //??????? ++ break; ++ } ++ ++ return sa; ++} ++ ++ ++__inline static int IsFrameTypeCtrl(unsigned char *pframe) ++{ ++ if(WIFI_CTRL_TYPE == GetFrameType(pframe)) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++/*----------------------------------------------------------------------------- ++ Below is for the security related definition ++------------------------------------------------------------------------------*/ ++#define _RESERVED_FRAME_TYPE_ 0 ++#define _SKB_FRAME_TYPE_ 2 ++#define _PRE_ALLOCMEM_ 1 ++#define _PRE_ALLOCHDR_ 3 ++#define _PRE_ALLOCLLCHDR_ 4 ++#define _PRE_ALLOCICVHDR_ 5 ++#define _PRE_ALLOCMICHDR_ 6 ++ ++#define _SIFSTIME_ ((priv->pmib->dot11BssType.net_work_type&WIRELESS_11A)?16:10) ++#define _ACKCTSLNG_ 14 //14 bytes long, including crclng ++#define _CRCLNG_ 4 ++ ++#define _ASOCREQ_IE_OFFSET_ 4 // excluding wlan_hdr ++#define _ASOCRSP_IE_OFFSET_ 6 ++#define _REASOCREQ_IE_OFFSET_ 10 ++#define _REASOCRSP_IE_OFFSET_ 6 ++#define _PROBEREQ_IE_OFFSET_ 0 ++#define _PROBERSP_IE_OFFSET_ 12 ++#define _AUTH_IE_OFFSET_ 6 ++#define _DEAUTH_IE_OFFSET_ 0 ++#define _BEACON_IE_OFFSET_ 12 ++#define _PUBLIC_ACTION_IE_OFFSET_ 8 ++ ++#define _FIXED_IE_LENGTH_ _BEACON_IE_OFFSET_ ++ ++#define _SSID_IE_ 0 ++#define _SUPPORTEDRATES_IE_ 1 ++#define _DSSET_IE_ 3 ++#define _TIM_IE_ 5 ++#define _IBSS_PARA_IE_ 6 ++#define _COUNTRY_IE_ 7 ++#define _CHLGETXT_IE_ 16 ++#define _SUPPORTED_CH_IE_ 36 ++#define _CH_SWTICH_ANNOUNCE_ 37 //Secondary Channel Offset ++#define _RSN_IE_2_ 48 ++#define _SSN_IE_1_ 221 ++#define _ERPINFO_IE_ 42 ++#define _EXT_SUPPORTEDRATES_IE_ 50 ++ ++#define _HT_CAPABILITY_IE_ 45 ++#define _FTIE_ 55 ++#define _TIMEOUT_ITVL_IE_ 56 ++#define _HT_EXTRA_INFO_IE_ 61 ++#define _HT_ADD_INFO_IE_ 61 //_HT_EXTRA_INFO_IE_ ++ ++#define EID_BSSCoexistence 72 // 20/40 BSS Coexistence ++#define EID_BSSIntolerantChlReport 73 ++#define _RIC_Descriptor_IE_ 75 ++ ++#define _LINK_ID_IE_ 101 ++#define _CH_SWITCH_TIMING_ 104 ++#define _PTI_BUFFER_STATUS_ 106 ++#define _EXT_CAP_IE_ 127 ++#define _VENDOR_SPECIFIC_IE_ 221 ++ ++#define _RESERVED47_ 47 ++ ++/* --------------------------------------------------------------------------- ++ Below is the fixed elements... ++-----------------------------------------------------------------------------*/ ++#define _AUTH_ALGM_NUM_ 2 ++#define _AUTH_SEQ_NUM_ 2 ++#define _BEACON_ITERVAL_ 2 ++#define _CAPABILITY_ 2 ++#define _CURRENT_APADDR_ 6 ++#define _LISTEN_INTERVAL_ 2 ++#define _RSON_CODE_ 2 ++#define _ASOC_ID_ 2 ++#define _STATUS_CODE_ 2 ++#define _TIMESTAMP_ 8 ++ ++#define AUTH_ODD_TO 0 ++#define AUTH_EVEN_TO 1 ++ ++#define WLAN_ETHCONV_ENCAP 1 ++#define WLAN_ETHCONV_RFC1042 2 ++#define WLAN_ETHCONV_8021h 3 ++ ++#define cap_ESS BIT(0) ++#define cap_IBSS BIT(1) ++#define cap_CFPollable BIT(2) ++#define cap_CFRequest BIT(3) ++#define cap_Privacy BIT(4) ++#define cap_ShortPremble BIT(5) ++#define cap_PBCC BIT(6) ++#define cap_ChAgility BIT(7) ++#define cap_SpecMgmt BIT(8) ++#define cap_QoS BIT(9) ++#define cap_ShortSlot BIT(10) ++ ++/*----------------------------------------------------------------------------- ++ Below is the definition for 802.11i / 802.1x ++------------------------------------------------------------------------------*/ ++#define _IEEE8021X_MGT_ 1 // WPA ++#define _IEEE8021X_PSK_ 2 // WPA with pre-shared key ++ ++/* ++#define _NO_PRIVACY_ 0 ++#define _WEP_40_PRIVACY_ 1 ++#define _TKIP_PRIVACY_ 2 ++#define _WRAP_PRIVACY_ 3 ++#define _CCMP_PRIVACY_ 4 ++#define _WEP_104_PRIVACY_ 5 ++#define _WEP_WPA_MIXED_PRIVACY_ 6 // WEP + WPA ++*/ ++ ++/*----------------------------------------------------------------------------- ++ Below is the definition for WMM ++------------------------------------------------------------------------------*/ ++#define _WMM_IE_Length_ 7 // for WMM STA ++#define _WMM_Para_Element_Length_ 24 ++ ++ ++/*----------------------------------------------------------------------------- ++ Below is the definition for 802.11n ++------------------------------------------------------------------------------*/ ++ ++/* block-ack parameters */ ++#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 ++#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C ++#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0 ++#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 ++#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 ++ ++//#ifdef CONFIG_80211N_HT ++ ++#define SetOrderBit(pbuf) \ ++ do { \ ++ *(unsigned short *)(pbuf) |= cpu_to_le16(_ORDER_); \ ++ } while(0) ++ ++#define GetOrderBit(pbuf) (((*(unsigned short *)(pbuf)) & le16_to_cpu(_ORDER_)) != 0) ++ ++ ++/** ++ * struct ieee80211_bar - HT Block Ack Request ++ * ++ * This structure refers to "HT BlockAckReq" as ++ * described in 802.11n draft section 7.2.1.7.1 ++ */ ++ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) ++struct rtw_ieee80211_bar { ++ unsigned short frame_control; ++ unsigned short duration; ++ unsigned char ra[6]; ++ unsigned char ta[6]; ++ unsigned short control; ++ unsigned short start_seq_num; ++} __attribute__((packed)); ++ #endif ++ ++/* 802.11 BAR control masks */ ++#define IEEE80211_BAR_CTRL_ACK_POLICY_NORMAL 0x0000 ++#define IEEE80211_BAR_CTRL_CBMTID_COMPRESSED_BA 0x0004 ++ ++ ++ #if defined(PLATFORM_LINUX) || defined(CONFIG_RTL8712FW) ++ ++ /** ++ * struct rtw_ieee80211_ht_cap - HT capabilities ++ * ++ * This structure refers to "HT capabilities element" as ++ * described in 802.11n draft section 7.3.2.52 ++ */ ++ ++struct rtw_ieee80211_ht_cap { ++ unsigned short cap_info; ++ unsigned char ampdu_params_info; ++ unsigned char supp_mcs_set[16]; ++ unsigned short extended_ht_cap_info; ++ unsigned int tx_BF_cap_info; ++ unsigned char antenna_selection_info; ++} __attribute__ ((packed)); ++ ++/** ++ * struct rtw_ieee80211_ht_cap - HT additional information ++ * ++ * This structure refers to "HT information element" as ++ * described in 802.11n draft section 7.3.2.53 ++ */ ++struct ieee80211_ht_addt_info { ++ unsigned char control_chan; ++ unsigned char ht_param; ++ unsigned short operation_mode; ++ unsigned short stbc_param; ++ unsigned char basic_set[16]; ++} __attribute__ ((packed)); ++ ++ ++struct HT_caps_element ++{ ++ union ++ { ++ struct ++ { ++ unsigned short HT_caps_info; ++ unsigned char AMPDU_para; ++ unsigned char MCS_rate[16]; ++ unsigned short HT_ext_caps; ++ unsigned int Beamforming_caps; ++ unsigned char ASEL_caps; ++ } HT_cap_element; ++ unsigned char HT_cap[26]; ++ }; ++} __attribute__ ((packed)); ++ ++struct HT_info_element ++{ ++ unsigned char primary_channel; ++ unsigned char infos[5]; ++ unsigned char MCS_rate[16]; ++} __attribute__ ((packed)); ++ ++struct AC_param ++{ ++ unsigned char ACI_AIFSN; ++ unsigned char CW; ++ unsigned short TXOP_limit; ++} __attribute__ ((packed)); ++ ++struct WMM_para_element ++{ ++ unsigned char QoS_info; ++ unsigned char reserved; ++ struct AC_param ac_param[4]; ++} __attribute__ ((packed)); ++ ++struct ADDBA_request ++{ ++ unsigned char dialog_token; ++ unsigned short BA_para_set; ++ unsigned short BA_timeout_value; ++ unsigned short BA_starting_seqctrl; ++} __attribute__ ((packed)); ++ ++ ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++#pragma pack(1) ++ ++struct rtw_ieee80211_ht_cap { ++ unsigned short cap_info; ++ unsigned char ampdu_params_info; ++ unsigned char supp_mcs_set[16]; ++ unsigned short extended_ht_cap_info; ++ unsigned int tx_BF_cap_info; ++ unsigned char antenna_selection_info; ++}; ++ ++ ++struct ieee80211_ht_addt_info { ++ unsigned char control_chan; ++ unsigned char ht_param; ++ unsigned short operation_mode; ++ unsigned short stbc_param; ++ unsigned char basic_set[16]; ++}; ++ ++struct HT_caps_element ++{ ++ union ++ { ++ struct ++ { ++ unsigned short HT_caps_info; ++ unsigned char AMPDU_para; ++ unsigned char MCS_rate[16]; ++ unsigned short HT_ext_caps; ++ unsigned int Beamforming_caps; ++ unsigned char ASEL_caps; ++ } HT_cap_element; ++ unsigned char HT_cap[26]; ++ }; ++}; ++ ++struct HT_info_element ++{ ++ unsigned char primary_channel; ++ unsigned char infos[5]; ++ unsigned char MCS_rate[16]; ++}; ++ ++struct AC_param ++{ ++ unsigned char ACI_AIFSN; ++ unsigned char CW; ++ unsigned short TXOP_limit; ++}; ++ ++struct WMM_para_element ++{ ++ unsigned char QoS_info; ++ unsigned char reserved; ++ struct AC_param ac_param[4]; ++}; ++ ++struct ADDBA_request ++{ ++ unsigned char dialog_token; ++ unsigned short BA_para_set; ++ unsigned short BA_timeout_value; ++ unsigned short BA_starting_seqctrl; ++}; ++ ++ ++#pragma pack() ++ ++#endif ++ ++ ++/* 802.11n HT capabilities masks */ ++#define IEEE80211_HT_CAP_SUP_WIDTH 0x0002 ++#define IEEE80211_HT_CAP_SM_PS 0x000C ++#define IEEE80211_HT_CAP_GRN_FLD 0x0010 ++#define IEEE80211_HT_CAP_SGI_20 0x0020 ++#define IEEE80211_HT_CAP_SGI_40 0x0040 ++#define IEEE80211_HT_CAP_TX_STBC 0x0080 ++#define IEEE80211_HT_CAP_RX_STBC 0x0300 ++#define IEEE80211_HT_CAP_DELAY_BA 0x0400 ++#define IEEE80211_HT_CAP_MAX_AMSDU 0x0800 ++#define IEEE80211_HT_CAP_DSSSCCK40 0x1000 ++/* 802.11n HT capability AMPDU settings */ ++#define IEEE80211_HT_CAP_AMPDU_FACTOR 0x03 ++#define IEEE80211_HT_CAP_AMPDU_DENSITY 0x1C ++/* 802.11n HT capability MSC set */ ++#define IEEE80211_SUPP_MCS_SET_UEQM 4 ++#define IEEE80211_HT_CAP_MAX_STREAMS 4 ++#define IEEE80211_SUPP_MCS_SET_LEN 10 ++/* maximum streams the spec allows */ ++#define IEEE80211_HT_CAP_MCS_TX_DEFINED 0x01 ++#define IEEE80211_HT_CAP_MCS_TX_RX_DIFF 0x02 ++#define IEEE80211_HT_CAP_MCS_TX_STREAMS 0x0C ++#define IEEE80211_HT_CAP_MCS_TX_UEQM 0x10 ++/* 802.11n HT IE masks */ ++#define IEEE80211_HT_IE_CHA_SEC_OFFSET 0x03 ++#define IEEE80211_HT_IE_CHA_SEC_NONE 0x00 ++#define IEEE80211_HT_IE_CHA_SEC_ABOVE 0x01 ++#define IEEE80211_HT_IE_CHA_SEC_BELOW 0x03 ++#define IEEE80211_HT_IE_CHA_WIDTH 0x04 ++#define IEEE80211_HT_IE_HT_PROTECTION 0x0003 ++#define IEEE80211_HT_IE_NON_GF_STA_PRSNT 0x0004 ++#define IEEE80211_HT_IE_NON_HT_STA_PRSNT 0x0010 ++ ++/* block-ack parameters */ ++#define IEEE80211_ADDBA_PARAM_POLICY_MASK 0x0002 ++#define IEEE80211_ADDBA_PARAM_TID_MASK 0x003C ++#define RTW_IEEE80211_ADDBA_PARAM_BUF_SIZE_MASK 0xFFA0 ++#define IEEE80211_DELBA_PARAM_TID_MASK 0xF000 ++#define IEEE80211_DELBA_PARAM_INITIATOR_MASK 0x0800 ++ ++/* ++ * A-PMDU buffer sizes ++ * According to IEEE802.11n spec size varies from 8K to 64K (in powers of 2) ++ */ ++#define IEEE80211_MIN_AMPDU_BUF 0x8 ++#define IEEE80211_MAX_AMPDU_BUF 0x40 ++ ++ ++/* Spatial Multiplexing Power Save Modes */ ++#define WLAN_HT_CAP_SM_PS_STATIC 0 ++#define WLAN_HT_CAP_SM_PS_DYNAMIC 1 ++#define WLAN_HT_CAP_SM_PS_INVALID 2 ++#define WLAN_HT_CAP_SM_PS_DISABLED 3 ++ ++#ifdef CONFIG_AP_MODE ++#define OP_MODE_PURE 0 ++#define OP_MODE_MAY_BE_LEGACY_STAS 1 ++#define OP_MODE_20MHZ_HT_STA_ASSOCED 2 ++#define OP_MODE_MIXED 3 ++ ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_OFF_MASK ((u8) BIT(0) | BIT(1)) ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_ABOVE ((u8) BIT(0)) ++#define HT_INFO_HT_PARAM_SECONDARY_CHNL_BELOW ((u8) BIT(0) | BIT(1)) ++#define HT_INFO_HT_PARAM_REC_TRANS_CHNL_WIDTH ((u8) BIT(2)) ++#define HT_INFO_HT_PARAM_RIFS_MODE ((u8) BIT(3)) ++#define HT_INFO_HT_PARAM_CTRL_ACCESS_ONLY ((u8) BIT(4)) ++#define HT_INFO_HT_PARAM_SRV_INTERVAL_GRANULARITY ((u8) BIT(5)) ++ ++#define HT_INFO_OPERATION_MODE_OP_MODE_MASK \ ++ ((u16) (0x0001 | 0x0002)) ++#define HT_INFO_OPERATION_MODE_OP_MODE_OFFSET 0 ++#define HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT ((u8) BIT(2)) ++#define HT_INFO_OPERATION_MODE_TRANSMIT_BURST_LIMIT ((u8) BIT(3)) ++#define HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT ((u8) BIT(4)) ++ ++#define HT_INFO_STBC_PARAM_DUAL_BEACON ((u16) BIT(6)) ++#define HT_INFO_STBC_PARAM_DUAL_STBC_PROTECT ((u16) BIT(7)) ++#define HT_INFO_STBC_PARAM_SECONDARY_BCN ((u16) BIT(8)) ++#define HT_INFO_STBC_PARAM_LSIG_TXOP_PROTECT_ALLOWED ((u16) BIT(9)) ++#define HT_INFO_STBC_PARAM_PCO_ACTIVE ((u16) BIT(10)) ++#define HT_INFO_STBC_PARAM_PCO_PHASE ((u16) BIT(11)) ++#endif ++ ++ ++//#endif ++ ++// ===============WPS Section=============== ++// For WPSv1.0 ++#define WPSOUI 0x0050f204 ++// WPS attribute ID ++#define WPS_ATTR_VER1 0x104A ++#define WPS_ATTR_SIMPLE_CONF_STATE 0x1044 ++#define WPS_ATTR_RESP_TYPE 0x103B ++#define WPS_ATTR_UUID_E 0x1047 ++#define WPS_ATTR_MANUFACTURER 0x1021 ++#define WPS_ATTR_MODEL_NAME 0x1023 ++#define WPS_ATTR_MODEL_NUMBER 0x1024 ++#define WPS_ATTR_SERIAL_NUMBER 0x1042 ++#define WPS_ATTR_PRIMARY_DEV_TYPE 0x1054 ++#define WPS_ATTR_DEVICE_NAME 0x1011 ++#define WPS_ATTR_CONF_METHOD 0x1008 ++#define WPS_ATTR_RF_BANDS 0x103C ++#define WPS_ATTR_DEVICE_PWID 0x1012 ++#define WPS_ATTR_REQUEST_TYPE 0x103A ++#define WPS_ATTR_ASSOCIATION_STATE 0x1002 ++#define WPS_ATTR_CONFIG_ERROR 0x1009 ++#define WPS_ATTR_VENDOR_EXT 0x1049 ++#define WPA_ATTR_SELECTED_REGISTRAR 0x1041 ++ ++// Value of WPS attribute "WPS_ATTR_DEVICE_NAME ++#define WPS_MAX_DEVICE_NAME_LEN 32 ++ ++// Value of WPS Request Type Attribute ++#define WPS_REQ_TYPE_ENROLLEE_INFO_ONLY 0x00 ++#define WPS_REQ_TYPE_ENROLLEE_OPEN_8021X 0x01 ++#define WPS_REQ_TYPE_REGISTRAR 0x02 ++#define WPS_REQ_TYPE_WLAN_MANAGER_REGISTRAR 0x03 ++ ++// Value of WPS Response Type Attribute ++#define WPS_RESPONSE_TYPE_INFO_ONLY 0x00 ++#define WPS_RESPONSE_TYPE_8021X 0x01 ++#define WPS_RESPONSE_TYPE_REGISTRAR 0x02 ++#define WPS_RESPONSE_TYPE_AP 0x03 ++ ++// Value of WPS WiFi Simple Configuration State Attribute ++#define WPS_WSC_STATE_NOT_CONFIG 0x01 ++#define WPS_WSC_STATE_CONFIG 0x02 ++ ++// Value of WPS Version Attribute ++#define WPS_VERSION_1 0x10 ++ ++// Value of WPS Configuration Method Attribute ++#define WPS_CONFIG_METHOD_FLASH 0x0001 ++#define WPS_CONFIG_METHOD_ETHERNET 0x0002 ++#define WPS_CONFIG_METHOD_LABEL 0x0004 ++#define WPS_CONFIG_METHOD_DISPLAY 0x0008 ++#define WPS_CONFIG_METHOD_E_NFC 0x0010 ++#define WPS_CONFIG_METHOD_I_NFC 0x0020 ++#define WPS_CONFIG_METHOD_NFC 0x0040 ++#define WPS_CONFIG_METHOD_PBC 0x0080 ++#define WPS_CONFIG_METHOD_KEYPAD 0x0100 ++#define WPS_CONFIG_METHOD_VPBC 0x0280 ++#define WPS_CONFIG_METHOD_PPBC 0x0480 ++#define WPS_CONFIG_METHOD_VDISPLAY 0x2008 ++#define WPS_CONFIG_METHOD_PDISPLAY 0x4008 ++ ++// Value of Category ID of WPS Primary Device Type Attribute ++#define WPS_PDT_CID_MULIT_MEDIA 0x0008 ++#define WPS_PDT_CID_RTK_WIDI 0x001E ++ ++// Value of Sub Category ID of WPS Primary Device Type Attribute ++#define WPS_PDT_SCID_MEDIA_SERVER 0x0005 ++#define WPS_PDT_SCID_RTK_DMP 0x0001 ++ ++// Value of Device Password ID ++#define WPS_DPID_PIN 0x0000 ++#define WPS_DPID_USER_SPEC 0x0001 ++#define WPS_DPID_MACHINE_SPEC 0x0002 ++#define WPS_DPID_REKEY 0x0003 ++#define WPS_DPID_PBC 0x0004 ++#define WPS_DPID_REGISTRAR_SPEC 0x0005 ++ ++ ++// =====================P2P Section===================== ++// For P2P ++#define P2POUI 0x506F9A09 ++ ++// P2P Attribute ID ++#define P2P_ATTR_STATUS 0x00 ++#define P2P_ATTR_MINOR_REASON_CODE 0x01 ++#define P2P_ATTR_CAPABILITY 0x02 ++#define P2P_ATTR_DEVICE_ID 0x03 ++#define P2P_ATTR_GO_INTENT 0x04 ++#define P2P_ATTR_CONF_TIMEOUT 0x05 ++#define P2P_ATTR_LISTEN_CH 0x06 ++#define P2P_ATTR_GROUP_BSSID 0x07 ++#define P2P_ATTR_EX_LISTEN_TIMING 0x08 ++#define P2P_ATTR_INTENTED_IF_ADDR 0x09 ++#define P2P_ATTR_MANAGEABILITY 0x0A ++#define P2P_ATTR_CH_LIST 0x0B ++#define P2P_ATTR_NOA 0x0C ++#define P2P_ATTR_DEVICE_INFO 0x0D ++#define P2P_ATTR_GROUP_INFO 0x0E ++#define P2P_ATTR_GROUP_ID 0x0F ++#define P2P_ATTR_INTERFACE 0x10 ++#define P2P_ATTR_OPERATING_CH 0x11 ++#define P2P_ATTR_INVITATION_FLAGS 0x12 ++ ++// Value of Status Attribute ++#define P2P_STATUS_SUCCESS 0x00 ++#define P2P_STATUS_FAIL_INFO_UNAVAILABLE 0x01 ++#define P2P_STATUS_FAIL_INCOMPATIBLE_PARAM 0x02 ++#define P2P_STATUS_FAIL_LIMIT_REACHED 0x03 ++#define P2P_STATUS_FAIL_INVALID_PARAM 0x04 ++#define P2P_STATUS_FAIL_REQUEST_UNABLE 0x05 ++#define P2P_STATUS_FAIL_PREVOUS_PROTO_ERR 0x06 ++#define P2P_STATUS_FAIL_NO_COMMON_CH 0x07 ++#define P2P_STATUS_FAIL_UNKNOWN_P2PGROUP 0x08 ++#define P2P_STATUS_FAIL_BOTH_GOINTENT_15 0x09 ++#define P2P_STATUS_FAIL_INCOMPATIBLE_PROVSION 0x0A ++#define P2P_STATUS_FAIL_USER_REJECT 0x0B ++ ++// Value of Inviation Flags Attribute ++#define P2P_INVITATION_FLAGS_PERSISTENT BIT(0) ++ ++ ++// Value of Device Capability Bitmap ++#define P2P_DEVCAP_SERVICE_DISCOVERY BIT(0) ++#define P2P_DEVCAP_CLIENT_DISCOVERABILITY BIT(1) ++#define P2P_DEVCAP_CONCURRENT_OPERATION BIT(2) ++#define P2P_DEVCAP_INFRA_MANAGED BIT(3) ++#define P2P_DEVCAP_DEVICE_LIMIT BIT(4) ++#define P2P_DEVCAP_INVITATION_PROC BIT(5) ++ ++// Value of Group Capability Bitmap ++#define P2P_GRPCAP_GO BIT(0) ++#define P2P_GRPCAP_PERSISTENT_GROUP BIT(1) ++#define P2P_GRPCAP_GROUP_LIMIT BIT(2) ++#define P2P_GRPCAP_INTRABSS BIT(3) ++#define P2P_GRPCAP_CROSS_CONN BIT(4) ++#define P2P_GRPCAP_PERSISTENT_RECONN BIT(5) ++#define P2P_GRPCAP_GROUP_FORMATION BIT(6) ++ ++// P2P Public Action Frame ( Management Frame ) ++#define P2P_PUB_ACTION_ACTION 0x09 ++ ++// P2P Public Action Frame Type ++#define P2P_GO_NEGO_REQ 0 ++#define P2P_GO_NEGO_RESP 1 ++#define P2P_GO_NEGO_CONF 2 ++#define P2P_INVIT_REQ 3 ++#define P2P_INVIT_RESP 4 ++#define P2P_DEVDISC_REQ 5 ++#define P2P_DEVDISC_RESP 6 ++#define P2P_PROVISION_DISC_REQ 7 ++#define P2P_PROVISION_DISC_RESP 8 ++ ++// P2P Action Frame Type ++#define P2P_NOTICE_OF_ABSENCE 0 ++#define P2P_PRESENCE_REQUEST 1 ++#define P2P_PRESENCE_RESPONSE 2 ++#define P2P_GO_DISC_REQUEST 3 ++ ++ ++#define P2P_MAX_PERSISTENT_GROUP_NUM 10 ++ ++#define P2P_PROVISIONING_SCAN_CNT 3 ++ ++#define P2P_WILDCARD_SSID_LEN 7 ++ ++#define P2P_FINDPHASE_EX_NONE 0 // default value, used when: (1)p2p disabed or (2)p2p enabled but only do 1 scan phase ++#define P2P_FINDPHASE_EX_FULL 1 // used when p2p enabled and want to do 1 scan phase and P2P_FINDPHASE_EX_MAX-1 find phase ++#define P2P_FINDPHASE_EX_SOCIAL_FIRST (P2P_FINDPHASE_EX_FULL+1) ++#define P2P_FINDPHASE_EX_MAX 4 ++#define P2P_FINDPHASE_EX_SOCIAL_LAST P2P_FINDPHASE_EX_MAX ++ ++#define P2P_PROVISION_TIMEOUT 5000 // 5 seconds timeout for sending the provision discovery request ++#define P2P_GO_NEGO_TIMEOUT 5000 // 5 seconds timeout for receiving the group negotation response ++#define P2P_TX_PRESCAN_TIMEOUT 100 // 100ms ++ ++#define P2P_MAX_INTENT 15 ++ ++#define P2P_MAX_NOA_NUM 2 ++ ++// WPS Configuration Method ++#define WPS_CM_NONE 0x0000 ++#define WPS_CM_LABEL 0x0004 ++#define WPS_CM_DISPLYA 0x0008 ++#define WPS_CM_EXTERNAL_NFC_TOKEN 0x0010 ++#define WPS_CM_INTEGRATED_NFC_TOKEN 0x0020 ++#define WPS_CM_NFC_INTERFACE 0x0040 ++#define WPS_CM_PUSH_BUTTON 0x0080 ++#define WPS_CM_KEYPAD 0x0100 ++#define WPS_CM_SW_PUHS_BUTTON 0x0280 ++#define WPS_CM_HW_PUHS_BUTTON 0x0480 ++#define WPS_CM_SW_DISPLAY_PIN 0x2008 ++#define WPS_CM_LCD_DISPLAY_PIN 0x4008 ++ ++enum P2P_ROLE { ++ P2P_ROLE_DISABLE = 0, ++ P2P_ROLE_DEVICE = 1, ++ P2P_ROLE_CLIENT = 2, ++ P2P_ROLE_GO = 3 ++}; ++ ++enum P2P_STATE { ++ P2P_STATE_NONE = 0, // P2P disable ++ P2P_STATE_IDLE = 1, // P2P had enabled and do nothing ++ P2P_STATE_LISTEN = 2, // In pure listen state ++ P2P_STATE_SCAN = 3, // In scan phase ++ P2P_STATE_FIND_PHASE_LISTEN = 4, // In the listen state of find phase ++ P2P_STATE_FIND_PHASE_SEARCH = 5, // In the search state of find phase ++ P2P_STATE_TX_PROVISION_DIS_REQ = 6, // In P2P provisioning discovery ++ P2P_STATE_RX_PROVISION_DIS_RSP = 7, ++ P2P_STATE_RX_PROVISION_DIS_REQ = 8, ++ P2P_STATE_GONEGO_ING = 9, // Doing the group owner negoitation handshake ++ P2P_STATE_GONEGO_OK = 10, // finish the group negoitation handshake with success ++ P2P_STATE_GONEGO_FAIL = 11, // finish the group negoitation handshake with failure ++ P2P_STATE_RECV_INVITE_REQ = 12, // receiving the P2P Inviation request ++ P2P_STATE_PROVISIONING_ING = 13, // Doing the P2P WPS ++ P2P_STATE_PROVISIONING_DONE = 14, // Finish the P2P WPS ++}; ++ ++enum P2P_WPSINFO { ++ P2P_NO_WPSINFO = 0, ++ P2P_GOT_WPSINFO_PEER_DISPLAY_PIN = 1, ++ P2P_GOT_WPSINFO_SELF_DISPLAY_PIN = 2, ++ P2P_GOT_WPSINFO_PBC = 3, ++}; ++ ++#define P2P_PRIVATE_IOCTL_SET_LEN 64 ++ ++enum P2P_PROTO_WK_ID ++{ ++ P2P_FIND_PHASE_WK = 0, ++ P2P_RESTORE_STATE_WK = 1, ++ P2P_PRE_TX_PROVDISC_PROCESS_WK = 2, ++ P2P_PRE_TX_NEGOREQ_PROCESS_WK = 3, ++ P2P_RO_CH_WK = 4, ++}; ++ ++enum P2P_PS ++{ ++ P2P_PS_DISABLE=0, ++ P2P_PS_ENABLE=1, ++ P2P_PS_SCAN=2, ++ P2P_PS_SCAN_DONE=3, ++ P2P_PS_ALLSTASLEEP=4, // for owner ++}; ++ ++// =====================WFD Section===================== ++// For Wi-Fi Display ++#define WFD_ATTR_DEVICE_INFO 0x00 ++#define WFD_ATTR_ASSOC_BSSID 0x01 ++#define WFD_ATTR_COUPLED_SINK_INFO 0x06 ++#define WFD_ATTR_SESSION_INFO 0x09 ++ ++// For WFD Device Information Attribute ++#define WFD_DEVINFO_SOURCE 0 ++#define WFD_DEVINFO_PRIARY_SINK 1 ++#define WFD_DEVINFO_SECARY_SINK 2 ++#define WFD_DEVINFO_SOURCE_PRIARY_SINK 3 ++ ++#define WFD_DEVINFO_NO_COUPLED_SINK 0 ++#define WFD_DEVINFO_COUPLED_SINK 4 ++ ++#ifdef CONFIG_TX_MCAST2UNI ++#define IP_MCAST_MAC(mac) ((mac[0]==0x01)&&(mac[1]==0x00)&&(mac[2]==0x5e)) ++#define ICMPV6_MCAST_MAC(mac) ((mac[0]==0x33)&&(mac[1]==0x33)&&(mac[2]!=0xff)) ++#endif // CONFIG_TX_MCAST2UNI ++ ++ ++ ++#endif // _WIFI_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/wlan_bssdef.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/wlan_bssdef.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,453 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __WLAN_BSSDEF_H__ ++#define __WLAN_BSSDEF_H__ ++ ++ ++#define MAX_IE_SZ 768 ++ ++ ++#ifdef PLATFORM_LINUX ++ ++#define NDIS_802_11_LENGTH_SSID 32 ++#define NDIS_802_11_LENGTH_RATES 8 ++#define NDIS_802_11_LENGTH_RATES_EX 16 ++ ++typedef unsigned char NDIS_802_11_MAC_ADDRESS[6]; ++typedef long NDIS_802_11_RSSI; // in dBm ++typedef unsigned char NDIS_802_11_RATES[NDIS_802_11_LENGTH_RATES]; // Set of 8 data rates ++typedef unsigned char NDIS_802_11_RATES_EX[NDIS_802_11_LENGTH_RATES_EX]; // Set of 16 data rates ++ ++ ++typedef ULONG NDIS_802_11_KEY_INDEX; ++typedef unsigned long long NDIS_802_11_KEY_RSC; ++ ++ ++typedef struct _NDIS_802_11_SSID ++{ ++ ULONG SsidLength; ++ UCHAR Ssid[32]; ++} NDIS_802_11_SSID, *PNDIS_802_11_SSID; ++ ++typedef enum _NDIS_802_11_NETWORK_TYPE ++{ ++ Ndis802_11FH, ++ Ndis802_11DS, ++ Ndis802_11OFDM5, ++ Ndis802_11OFDM24, ++ Ndis802_11NetworkTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_NETWORK_TYPE, *PNDIS_802_11_NETWORK_TYPE; ++ ++typedef struct _NDIS_802_11_CONFIGURATION_FH ++{ ++ ULONG Length; // Length of structure ++ ULONG HopPattern; // As defined by 802.11, MSB set ++ ULONG HopSet; // to one if non-802.11 ++ ULONG DwellTime; // units are Kusec ++} NDIS_802_11_CONFIGURATION_FH, *PNDIS_802_11_CONFIGURATION_FH; ++ ++ ++/* ++ FW will only save the channel number in DSConfig. ++ ODI Handler will convert the channel number to freq. number. ++*/ ++typedef struct _NDIS_802_11_CONFIGURATION ++{ ++ ULONG Length; // Length of structure ++ ULONG BeaconPeriod; // units are Kusec ++ ULONG ATIMWindow; // units are Kusec ++ ULONG DSConfig; // Frequency, units are kHz ++ NDIS_802_11_CONFIGURATION_FH FHConfig; ++} NDIS_802_11_CONFIGURATION, *PNDIS_802_11_CONFIGURATION; ++ ++ ++ ++typedef enum _NDIS_802_11_NETWORK_INFRASTRUCTURE ++{ ++ Ndis802_11IBSS, ++ Ndis802_11Infrastructure, ++ Ndis802_11AutoUnknown, ++ Ndis802_11InfrastructureMax, // Not a real value, defined as upper bound ++ Ndis802_11APMode ++} NDIS_802_11_NETWORK_INFRASTRUCTURE, *PNDIS_802_11_NETWORK_INFRASTRUCTURE; ++ ++ ++ ++ ++ ++typedef struct _NDIS_802_11_FIXED_IEs ++{ ++ UCHAR Timestamp[8]; ++ USHORT BeaconInterval; ++ USHORT Capabilities; ++} NDIS_802_11_FIXED_IEs, *PNDIS_802_11_FIXED_IEs; ++ ++ ++ ++typedef struct _NDIS_802_11_VARIABLE_IEs ++{ ++ UCHAR ElementID; ++ UCHAR Length; ++ UCHAR data[1]; ++} NDIS_802_11_VARIABLE_IEs, *PNDIS_802_11_VARIABLE_IEs; ++ ++ ++ ++/* ++ ++ ++ ++Length is the 4 bytes multiples of the sume of ++ sizeof (NDIS_802_11_MAC_ADDRESS) + 2 + sizeof (NDIS_802_11_SSID) + sizeof (ULONG) +++ sizeof (NDIS_802_11_RSSI) + sizeof (NDIS_802_11_NETWORK_TYPE) + sizeof (NDIS_802_11_CONFIGURATION) +++ sizeof (NDIS_802_11_RATES_EX) + IELength ++ ++Except the IELength, all other fields are fixed length. Therefore, we can define a marco to present the ++partial sum. ++ ++*/ ++#if 0 ++typedef struct _NDIS_WLAN_BSSID_EX ++{ ++ ULONG Length; ++ NDIS_802_11_MAC_ADDRESS MacAddress; ++ UCHAR Reserved[2];//[0]: IS beacon frame, [1]:optimum_antenna=>For antenna diversity; ++ NDIS_802_11_SSID Ssid; ++ ULONG Privacy; ++ NDIS_802_11_RSSI Rssi; ++ NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; ++ NDIS_802_11_CONFIGURATION Configuration; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; ++ NDIS_802_11_RATES_EX SupportedRates; ++ ULONG IELength; ++ UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) ++} NDIS_WLAN_BSSID_EX, *PNDIS_WLAN_BSSID_EX; ++ ++ ++typedef struct _NDIS_802_11_BSSID_LIST_EX ++{ ++ ULONG NumberOfItems; ++ NDIS_WLAN_BSSID_EX Bssid[1]; ++} NDIS_802_11_BSSID_LIST_EX, *PNDIS_802_11_BSSID_LIST_EX; ++#endif ++ ++typedef enum _NDIS_802_11_AUTHENTICATION_MODE ++{ ++ Ndis802_11AuthModeOpen, ++ Ndis802_11AuthModeShared, ++ Ndis802_11AuthModeAutoSwitch, ++ Ndis802_11AuthModeWPA, ++ Ndis802_11AuthModeWPAPSK, ++ Ndis802_11AuthModeWPANone, ++ Ndis802_11AuthModeMax // Not a real mode, defined as upper bound ++} NDIS_802_11_AUTHENTICATION_MODE, *PNDIS_802_11_AUTHENTICATION_MODE; ++ ++typedef enum _NDIS_802_11_WEP_STATUS ++{ ++ Ndis802_11WEPEnabled, ++ Ndis802_11Encryption1Enabled = Ndis802_11WEPEnabled, ++ Ndis802_11WEPDisabled, ++ Ndis802_11EncryptionDisabled = Ndis802_11WEPDisabled, ++ Ndis802_11WEPKeyAbsent, ++ Ndis802_11Encryption1KeyAbsent = Ndis802_11WEPKeyAbsent, ++ Ndis802_11WEPNotSupported, ++ Ndis802_11EncryptionNotSupported = Ndis802_11WEPNotSupported, ++ Ndis802_11Encryption2Enabled, ++ Ndis802_11Encryption2KeyAbsent, ++ Ndis802_11Encryption3Enabled, ++ Ndis802_11Encryption3KeyAbsent ++} NDIS_802_11_WEP_STATUS, *PNDIS_802_11_WEP_STATUS, ++ NDIS_802_11_ENCRYPTION_STATUS, *PNDIS_802_11_ENCRYPTION_STATUS; ++ ++ ++#define NDIS_802_11_AI_REQFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_REQFI_LISTENINTERVAL 2 ++#define NDIS_802_11_AI_REQFI_CURRENTAPADDRESS 4 ++ ++#define NDIS_802_11_AI_RESFI_CAPABILITIES 1 ++#define NDIS_802_11_AI_RESFI_STATUSCODE 2 ++#define NDIS_802_11_AI_RESFI_ASSOCIATIONID 4 ++ ++typedef struct _NDIS_802_11_AI_REQFI ++{ ++ USHORT Capabilities; ++ USHORT ListenInterval; ++ NDIS_802_11_MAC_ADDRESS CurrentAPAddress; ++} NDIS_802_11_AI_REQFI, *PNDIS_802_11_AI_REQFI; ++ ++typedef struct _NDIS_802_11_AI_RESFI ++{ ++ USHORT Capabilities; ++ USHORT StatusCode; ++ USHORT AssociationId; ++} NDIS_802_11_AI_RESFI, *PNDIS_802_11_AI_RESFI; ++ ++typedef struct _NDIS_802_11_ASSOCIATION_INFORMATION ++{ ++ ULONG Length; ++ USHORT AvailableRequestFixedIEs; ++ NDIS_802_11_AI_REQFI RequestFixedIEs; ++ ULONG RequestIELength; ++ ULONG OffsetRequestIEs; ++ USHORT AvailableResponseFixedIEs; ++ NDIS_802_11_AI_RESFI ResponseFixedIEs; ++ ULONG ResponseIELength; ++ ULONG OffsetResponseIEs; ++} NDIS_802_11_ASSOCIATION_INFORMATION, *PNDIS_802_11_ASSOCIATION_INFORMATION; ++ ++typedef enum _NDIS_802_11_RELOAD_DEFAULTS ++{ ++ Ndis802_11ReloadWEPKeys ++} NDIS_802_11_RELOAD_DEFAULTS, *PNDIS_802_11_RELOAD_DEFAULTS; ++ ++ ++// Key mapping keys require a BSSID ++typedef struct _NDIS_802_11_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ ULONG KeyLength; // length of key in bytes ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ NDIS_802_11_KEY_RSC KeyRSC; ++ UCHAR KeyMaterial[32]; // variable length depending on above field ++} NDIS_802_11_KEY, *PNDIS_802_11_KEY; ++ ++typedef struct _NDIS_802_11_REMOVE_KEY ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; ++ NDIS_802_11_MAC_ADDRESS BSSID; ++} NDIS_802_11_REMOVE_KEY, *PNDIS_802_11_REMOVE_KEY; ++ ++typedef struct _NDIS_802_11_WEP ++{ ++ ULONG Length; // Length of this structure ++ ULONG KeyIndex; // 0 is the per-client key, 1-N are the global keys ++ ULONG KeyLength; // length of key in bytes ++ UCHAR KeyMaterial[16];// variable length depending on above field ++} NDIS_802_11_WEP, *PNDIS_802_11_WEP; ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_REQUEST ++{ ++ ULONG Length; // Length of structure ++ NDIS_802_11_MAC_ADDRESS Bssid; ++ ULONG Flags; ++} NDIS_802_11_AUTHENTICATION_REQUEST, *PNDIS_802_11_AUTHENTICATION_REQUEST; ++ ++typedef enum _NDIS_802_11_STATUS_TYPE ++{ ++ Ndis802_11StatusType_Authentication, ++ Ndis802_11StatusType_MediaStreamMode, ++ Ndis802_11StatusType_PMKID_CandidateList, ++ Ndis802_11StatusTypeMax // not a real type, defined as an upper bound ++} NDIS_802_11_STATUS_TYPE, *PNDIS_802_11_STATUS_TYPE; ++ ++typedef struct _NDIS_802_11_STATUS_INDICATION ++{ ++ NDIS_802_11_STATUS_TYPE StatusType; ++} NDIS_802_11_STATUS_INDICATION, *PNDIS_802_11_STATUS_INDICATION; ++ ++// mask for authentication/integrity fields ++#define NDIS_802_11_AUTH_REQUEST_AUTH_FIELDS 0x0f ++#define NDIS_802_11_AUTH_REQUEST_REAUTH 0x01 ++#define NDIS_802_11_AUTH_REQUEST_KEYUPDATE 0x02 ++#define NDIS_802_11_AUTH_REQUEST_PAIRWISE_ERROR 0x06 ++#define NDIS_802_11_AUTH_REQUEST_GROUP_ERROR 0x0E ++ ++// MIC check time, 60 seconds. ++#define MIC_CHECK_TIME 60000000 ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_EVENT ++{ ++ NDIS_802_11_STATUS_INDICATION Status; ++ NDIS_802_11_AUTHENTICATION_REQUEST Request[1]; ++} NDIS_802_11_AUTHENTICATION_EVENT, *PNDIS_802_11_AUTHENTICATION_EVENT; ++ ++typedef struct _NDIS_802_11_TEST ++{ ++ ULONG Length; ++ ULONG Type; ++ union ++ { ++ NDIS_802_11_AUTHENTICATION_EVENT AuthenticationEvent; ++ NDIS_802_11_RSSI RssiTrigger; ++ }tt; ++} NDIS_802_11_TEST, *PNDIS_802_11_TEST; ++ ++ ++#endif //end of #ifdef PLATFORM_LINUX ++ ++#ifndef Ndis802_11APMode ++#define Ndis802_11APMode (Ndis802_11InfrastructureMax+1) ++#endif ++ ++typedef struct _WLAN_PHY_INFO ++{ ++ u8 SignalStrength;//(in percentage) ++ u8 SignalQuality;//(in percentage) ++ u8 Optimum_antenna; //for Antenna diversity ++ u8 Reserved_0; ++}WLAN_PHY_INFO,*PWLAN_PHY_INFO; ++ ++/* temporally add #pragma pack for structure alignment issue of ++* WLAN_BSSID_EX and get_WLAN_BSSID_EX_sz() ++*/ ++#ifdef PLATFORM_WINDOWS ++#pragma pack(push) ++#pragma pack(1) ++#endif ++typedef struct _WLAN_BSSID_EX ++{ ++ ULONG Length; ++ NDIS_802_11_MAC_ADDRESS MacAddress; ++ UCHAR Reserved[2];//[0]: IS beacon frame ++ NDIS_802_11_SSID Ssid; ++ ULONG Privacy; ++ NDIS_802_11_RSSI Rssi;//(in dBM,raw data ,get from PHY) ++ NDIS_802_11_NETWORK_TYPE NetworkTypeInUse; ++ NDIS_802_11_CONFIGURATION Configuration; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE InfrastructureMode; ++ NDIS_802_11_RATES_EX SupportedRates; ++ WLAN_PHY_INFO PhyInfo; ++ ULONG IELength; ++ UCHAR IEs[MAX_IE_SZ]; //(timestamp, beacon interval, and capability information) ++} ++#ifndef PLATFORM_WINDOWS ++__attribute__((packed)) ++#endif ++WLAN_BSSID_EX, *PWLAN_BSSID_EX; ++#ifdef PLATFORM_WINDOWS ++#pragma pack(pop) ++#endif ++ ++__inline static uint get_WLAN_BSSID_EX_sz(WLAN_BSSID_EX *bss) ++{ ++ uint t_len; ++ ++ t_len = sizeof (ULONG) ++ + sizeof (NDIS_802_11_MAC_ADDRESS) ++ + 2 ++ + sizeof (NDIS_802_11_SSID) ++ + sizeof (ULONG) ++ + sizeof (NDIS_802_11_RSSI) ++ + sizeof (NDIS_802_11_NETWORK_TYPE) ++ + sizeof (NDIS_802_11_CONFIGURATION) ++ + sizeof (NDIS_802_11_NETWORK_INFRASTRUCTURE) ++ + sizeof (NDIS_802_11_RATES_EX) ++ //all new member add here ++ + sizeof(WLAN_PHY_INFO) ++ //all new member add here ++ + sizeof (ULONG) ++ + bss->IELength; ++ return t_len; ++ ++} ++ ++struct wlan_network { ++ _list list; ++ int network_type; //refer to ieee80211.h for WIRELESS_11A/B/G ++ int fixed; // set to fixed when not to be removed as site-surveying ++ unsigned long last_scanned; //timestamp for the network ++ int aid; //will only be valid when a BSS is joinned. ++ int join_res; ++ WLAN_BSSID_EX network; //must be the last item ++#ifdef PLATFORM_WINDOWS ++ unsigned char iebuf[MAX_IE_SZ]; ++#endif ++ ++}; ++ ++enum VRTL_CARRIER_SENSE ++{ ++ DISABLE_VCS, ++ ENABLE_VCS, ++ AUTO_VCS ++}; ++ ++enum VCS_TYPE ++{ ++ NONE_VCS, ++ RTS_CTS, ++ CTS_TO_SELF ++}; ++ ++ ++ ++ ++#define PWR_CAM 0 ++#define PWR_MINPS 1 ++#define PWR_MAXPS 2 ++#define PWR_UAPSD 3 ++#define PWR_VOIP 4 ++ ++ ++enum UAPSD_MAX_SP ++{ ++ NO_LIMIT, ++ TWO_MSDU, ++ FOUR_MSDU, ++ SIX_MSDU ++}; ++ ++ ++//john ++#define NUM_PRE_AUTH_KEY 16 ++#define NUM_PMKID_CACHE NUM_PRE_AUTH_KEY ++ ++/* ++* WPA2 ++*/ ++ ++#ifndef PLATFORM_OS_CE ++typedef struct _PMKID_CANDIDATE { ++ NDIS_802_11_MAC_ADDRESS BSSID; ++ ULONG Flags; ++} PMKID_CANDIDATE, *PPMKID_CANDIDATE; ++ ++typedef struct _NDIS_802_11_PMKID_CANDIDATE_LIST ++{ ++ ULONG Version; // Version of the structure ++ ULONG NumCandidates; // No. of pmkid candidates ++ PMKID_CANDIDATE CandidateList[1]; ++} NDIS_802_11_PMKID_CANDIDATE_LIST, *PNDIS_802_11_PMKID_CANDIDATE_LIST; ++ ++ ++typedef struct _NDIS_802_11_AUTHENTICATION_ENCRYPTION ++{ ++ NDIS_802_11_AUTHENTICATION_MODE AuthModeSupported; ++ NDIS_802_11_ENCRYPTION_STATUS EncryptStatusSupported; ++ ++} NDIS_802_11_AUTHENTICATION_ENCRYPTION, *PNDIS_802_11_AUTHENTICATION_ENCRYPTION; ++ ++typedef struct _NDIS_802_11_CAPABILITY ++{ ++ ULONG Length; ++ ULONG Version; ++ ULONG NoOfPMKIDs; ++ ULONG NoOfAuthEncryptPairsSupported; ++ NDIS_802_11_AUTHENTICATION_ENCRYPTION AuthenticationEncryptionSupported[1]; ++ ++} NDIS_802_11_CAPABILITY, *PNDIS_802_11_CAPABILITY; ++#endif ++ ++ ++#endif //#ifndef WLAN_BSSDEF_H_ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/xmit_osdep.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/include/xmit_osdep.h 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,90 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#ifndef __XMIT_OSDEP_H_ ++#define __XMIT_OSDEP_H_ ++ ++#include ++#include ++#include ++ ++struct pkt_file { ++ _pkt *pkt; ++ SIZE_T pkt_len; //the remainder length of the open_file ++ _buffer *cur_buffer; ++ u8 *buf_start; ++ u8 *cur_addr; ++ SIZE_T buf_len; ++}; ++ ++#ifdef PLATFORM_WINDOWS ++ ++#ifdef PLATFORM_OS_XP ++#ifdef CONFIG_USB_HCI ++#include ++#include ++#include ++#endif ++#endif ++ ++#define NR_XMITFRAME 128 ++ ++#define ETH_ALEN 6 ++ ++extern NDIS_STATUS rtw_xmit_entry( ++IN _nic_hdl cnxt, ++IN NDIS_PACKET *pkt, ++IN UINT flags ++); ++ ++#endif ++ ++ ++#ifdef PLATFORM_LINUX ++ ++#define NR_XMITFRAME 256 ++ ++struct xmit_priv; ++struct pkt_attrib; ++struct sta_xmit_priv; ++struct xmit_frame; ++struct xmit_buf; ++ ++extern int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev); ++ ++#endif ++ ++void rtw_os_xmit_schedule(_adapter *padapter); ++ ++int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz); ++void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz); ++ ++extern void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib); ++ ++extern uint rtw_remainder_len(struct pkt_file *pfile); ++extern void _rtw_open_pktfile(_pkt *pkt, struct pkt_file *pfile); ++extern uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen); ++extern sint rtw_endofpktfile (struct pkt_file *pfile); ++ ++extern void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt); ++extern void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe); ++ ++#endif // ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_cfg80211.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,4618 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_CFG80211_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ ++#include "ioctl_cfg80211.h" ++ ++#define RTW_SCAN_IE_LEN_MAX 2304 ++#define RTW_MAX_REMAIN_ON_CHANNEL_DURATION 65535 //ms ++#define RTW_MAX_NUM_PMKIDS 4 ++ ++#define RTW_CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ ++ ++static const u32 rtw_cipher_suites[] = { ++ WLAN_CIPHER_SUITE_WEP40, ++ WLAN_CIPHER_SUITE_WEP104, ++ WLAN_CIPHER_SUITE_TKIP, ++ WLAN_CIPHER_SUITE_CCMP, ++}; ++ ++#define RATETAB_ENT(_rate, _rateid, _flags) \ ++ { \ ++ .bitrate = (_rate), \ ++ .hw_value = (_rateid), \ ++ .flags = (_flags), \ ++ } ++ ++#define CHAN2G(_channel, _freq, _flags) { \ ++ .band = IEEE80211_BAND_2GHZ, \ ++ .center_freq = (_freq), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++#define CHAN5G(_channel, _flags) { \ ++ .band = IEEE80211_BAND_5GHZ, \ ++ .center_freq = 5000 + (5 * (_channel)), \ ++ .hw_value = (_channel), \ ++ .flags = (_flags), \ ++ .max_antenna_gain = 0, \ ++ .max_power = 30, \ ++} ++ ++static struct ieee80211_rate rtw_rates[] = { ++ RATETAB_ENT(10, 0x1, 0), ++ RATETAB_ENT(20, 0x2, 0), ++ RATETAB_ENT(55, 0x4, 0), ++ RATETAB_ENT(110, 0x8, 0), ++ RATETAB_ENT(60, 0x10, 0), ++ RATETAB_ENT(90, 0x20, 0), ++ RATETAB_ENT(120, 0x40, 0), ++ RATETAB_ENT(180, 0x80, 0), ++ RATETAB_ENT(240, 0x100, 0), ++ RATETAB_ENT(360, 0x200, 0), ++ RATETAB_ENT(480, 0x400, 0), ++ RATETAB_ENT(540, 0x800, 0), ++}; ++ ++#define rtw_a_rates (rtw_rates + 4) ++#define rtw_a_rates_size 8 ++#define rtw_g_rates (rtw_rates + 0) ++#define rtw_g_rates_size 12 ++ ++static struct ieee80211_channel rtw_2ghz_channels[] = { ++ CHAN2G(1, 2412, 0), ++ CHAN2G(2, 2417, 0), ++ CHAN2G(3, 2422, 0), ++ CHAN2G(4, 2427, 0), ++ CHAN2G(5, 2432, 0), ++ CHAN2G(6, 2437, 0), ++ CHAN2G(7, 2442, 0), ++ CHAN2G(8, 2447, 0), ++ CHAN2G(9, 2452, 0), ++ CHAN2G(10, 2457, 0), ++ CHAN2G(11, 2462, 0), ++ CHAN2G(12, 2467, 0), ++ CHAN2G(13, 2472, 0), ++ CHAN2G(14, 2484, 0), ++}; ++ ++//{{1,2,3,4,5,6,7,8,9,10,11,12,13,36,40,44,48,52,56,60,64,100,104,108,112,116,120,124,128,132,136,140,149,153,157,161,165},37}, // 0x12, RT_CHANNEL_DOMAIN_WORLD_WIDE37 ++ ++static struct ieee80211_channel rtw_5ghz_a_channels[] = { ++ CHAN5G(34, 0), CHAN5G(36, 0), ++ CHAN5G(38, 0), CHAN5G(40, 0), ++ CHAN5G(42, 0), CHAN5G(44, 0), ++ CHAN5G(46, 0), CHAN5G(48, 0), ++ CHAN5G(52, 0), CHAN5G(56, 0), ++ CHAN5G(60, 0), CHAN5G(64, 0), ++ CHAN5G(100, 0), CHAN5G(104, 0), ++ CHAN5G(108, 0), CHAN5G(112, 0), ++ CHAN5G(116, 0), CHAN5G(120, 0), ++ CHAN5G(124, 0), CHAN5G(128, 0), ++ CHAN5G(132, 0), CHAN5G(136, 0), ++ CHAN5G(140, 0), CHAN5G(149, 0), ++ CHAN5G(153, 0), CHAN5G(157, 0), ++ CHAN5G(161, 0), CHAN5G(165, 0), ++ CHAN5G(184, 0), CHAN5G(188, 0), ++ CHAN5G(192, 0), CHAN5G(196, 0), ++ CHAN5G(200, 0), CHAN5G(204, 0), ++ CHAN5G(208, 0), CHAN5G(212, 0), ++ CHAN5G(216, 0), ++}; ++ ++static struct ieee80211_supported_band rtw_band_2ghz = { ++ .band = IEEE80211_BAND_2GHZ, ++ .channels = rtw_2ghz_channels, ++ .n_channels = ARRAY_SIZE(rtw_2ghz_channels), ++ .bitrates = rtw_g_rates, ++ .n_bitrates = rtw_g_rates_size, ++}; ++ ++static struct ieee80211_supported_band rtw_band_5ghz = { ++ .band = IEEE80211_BAND_5GHZ, ++ .channels = rtw_5ghz_a_channels, ++ .n_channels = ARRAY_SIZE(rtw_5ghz_a_channels), ++ .bitrates = rtw_a_rates, ++ .n_bitrates = rtw_a_rates_size, ++}; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++static const struct ieee80211_txrx_stypes ++rtw_cfg80211_default_mgmt_stypes[NUM_NL80211_IFTYPES] = { ++ [NL80211_IFTYPE_ADHOC] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_STATION] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_AP] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_AP_VLAN] = { ++ /* copy AP */ ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_CLIENT] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ACTION >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) ++ }, ++ [NL80211_IFTYPE_P2P_GO] = { ++ .tx = 0xffff, ++ .rx = BIT(IEEE80211_STYPE_ASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_REASSOC_REQ >> 4) | ++ BIT(IEEE80211_STYPE_PROBE_REQ >> 4) | ++ BIT(IEEE80211_STYPE_DISASSOC >> 4) | ++ BIT(IEEE80211_STYPE_AUTH >> 4) | ++ BIT(IEEE80211_STYPE_DEAUTH >> 4) | ++ BIT(IEEE80211_STYPE_ACTION >> 4) ++ }, ++}; ++#endif ++ ++static int rtw_ieee80211_channel_to_frequency(int chan, int band) ++{ ++ /* see 802.11 17.3.8.3.2 and Annex J ++ * there are overlapping channel numbers in 5GHz and 2GHz bands */ ++ ++ if (band == IEEE80211_BAND_5GHZ) { ++ if (chan >= 182 && chan <= 196) ++ return 4000 + chan * 5; ++ else ++ return 5000 + chan * 5; ++ } else { /* IEEE80211_BAND_2GHZ */ ++ if (chan == 14) ++ return 2484; ++ else if (chan < 14) ++ return 2407 + chan * 5; ++ else ++ return 0; /* not supported */ ++ } ++} ++ ++static int rtw_cfg80211_inform_bss(_adapter *padapter, struct wlan_network *pnetwork) ++{ ++ int ret=0; ++ struct ieee80211_channel *notify_channel; ++ struct cfg80211_bss *bss; ++ //struct ieee80211_supported_band *band; ++ u16 channel; ++ u32 freq; ++ u64 notify_timestamp; ++ u16 notify_capability; ++ u16 notify_interval; ++ u8 *notify_ie; ++ size_t notify_ielen; ++ s32 notify_signal; ++ u8 buf[768], *pbuf; ++ size_t len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 bc_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; ++ ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = wdev->wiphy; ++ ++ ++ //printk("%s\n", __func__); ++ ++ ++ channel = pnetwork->network.Configuration.DSConfig; ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ { ++ //band = wiphy->bands[IEEE80211_BAND_2GHZ]; ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); ++ } ++ else ++ { ++ //band = wiphy->bands[IEEE80211_BAND_5GHZ]; ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); ++ } ++ ++ notify_channel = ieee80211_get_channel(wiphy, freq); ++ ++ //rtw_get_timestampe_from_ie() ++ notify_timestamp = jiffies_to_msecs(jiffies)*1000; /* uSec */ ++ ++ notify_interval = le16_to_cpu(*(u16*)rtw_get_beacon_interval_from_ie(pnetwork->network.IEs)); ++ notify_capability = le16_to_cpu(*(u16*)rtw_get_capability_from_ie(pnetwork->network.IEs)); ++ ++ ++ notify_ie = pnetwork->network.IEs+_FIXED_IE_LENGTH_; ++ notify_ielen = pnetwork->network.IELength-_FIXED_IE_LENGTH_; ++ ++ //notify_signal = (s16)le16_to_cpu(bi->RSSI) * 100; ++ ++ //We've set wiphy's signal_type as CFG80211_SIGNAL_TYPE_MBM: signal strength in mBm (100*dBm) ++ notify_signal = 100*translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm ++ ++/* ++ printk("bssid: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n", ++ pnetwork->network.MacAddress[0], pnetwork->network.MacAddress[1], pnetwork->network.MacAddress[2], ++ pnetwork->network.MacAddress[3], pnetwork->network.MacAddress[4], pnetwork->network.MacAddress[5]); ++ printk("Channel: %d(%d)\n", channel, freq); ++ printk("Capability: %X\n", notify_capability); ++ printk("Beacon interval: %d\n", notify_interval); ++ printk("Signal: %d\n", notify_signal); ++ printk("notify_timestamp: %#018llx\n", notify_timestamp); ++*/ ++ ++ pbuf = buf; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pbuf; ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ SetSeqNum(pwlanhdr, 0/*pmlmeext->mgnt_seq*/); ++ //pmlmeext->mgnt_seq++; ++ ++ if (pnetwork->network.Reserved[0] == 1) { // WIFI_BEACON ++ ++ _rtw_memcpy(pwlanhdr->addr1, bc_addr, ETH_ALEN); ++ ++ SetFrameSubType(pbuf, WIFI_BEACON); ++ ++ } else { ++ ++ _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ SetFrameSubType(pbuf, WIFI_PROBERSP); ++ } ++ ++ _rtw_memcpy(pwlanhdr->addr2, pnetwork->network.MacAddress, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pnetwork->network.MacAddress, ETH_ALEN); ++ ++ ++ pbuf += sizeof(struct rtw_ieee80211_hdr_3addr); ++ len = sizeof (struct rtw_ieee80211_hdr_3addr); ++ ++ _rtw_memcpy(pbuf, pnetwork->network.IEs, pnetwork->network.IELength); ++ len += pnetwork->network.IELength; ++ ++ ++#if 1 ++ bss = cfg80211_inform_bss_frame(wiphy, notify_channel, (struct ieee80211_mgmt *)buf, ++ len, notify_signal, GFP_ATOMIC); ++#else ++ ++ bss = cfg80211_inform_bss(wiphy, notify_channel, (const u8 *)pnetwork->network.MacAddress, ++ notify_timestamp, notify_capability, notify_interval, notify_ie, ++ notify_ielen, notify_signal, GFP_ATOMIC/*GFP_KERNEL*/); ++#endif ++ ++ if (unlikely(!bss)) { ++ printk("rtw_cfg80211_inform_bss error\n"); ++ return -EINVAL; ++ } ++ ++ return ret; ++ ++} ++ ++void rtw_cfg80211_indicate_connect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ ++ printk("%s\n", __func__); ++ ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_CLIENT); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ ++ #ifdef CONFIG_LAYER2_ROAMING ++ if(pmlmepriv->to_roaming > 0) { ++ //rtw_cfg80211_inform_bss(padapter, cur_network); ++ DBG_871X("%s call cfg80211_roamed\n", __FUNCTION__); ++ cfg80211_roamed(padapter->pnetdev, ++ #if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 39) ++ NULL, ++ #endif ++ cur_network->network.MacAddress, ++ cur_network->network.IEs+_FIXED_IE_LENGTH_, cur_network->network.IELength-_FIXED_IE_LENGTH_, ++ NULL, 0, GFP_ATOMIC ++ ); ++ } ++ else ++ #endif ++ { ++ cfg80211_connect_result(padapter->pnetdev, cur_network->network.MacAddress, NULL, 0, NULL, 0, ++ WLAN_STATUS_SUCCESS, GFP_ATOMIC/*GFP_KERNEL*/); ++ } ++} ++ ++void rtw_cfg80211_indicate_disconnect(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ printk("%s\n", __func__); ++ ++ if (pwdev->iftype != NL80211_IFTYPE_STATION ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ && pwdev->iftype != NL80211_IFTYPE_P2P_CLIENT ++ #endif ++ ) { ++ return; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ return; ++ ++ ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ ++ printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ } ++ ++ if(pwdev->sme_state==CFG80211_SME_CONNECTING) ++ cfg80211_connect_result(padapter->pnetdev, NULL, NULL, 0, NULL, 0, ++ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_ATOMIC/*GFP_KERNEL*/); ++ else if(pwdev->sme_state==CFG80211_SME_CONNECTED) ++ cfg80211_disconnected(padapter->pnetdev, 0, ++ NULL, 0, GFP_ATOMIC); ++ else ++ printk("pwdev->sme_state=%d\n", pwdev->sme_state); ++ ++} ++ ++ ++#ifdef CONFIG_AP_MODE ++static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = 1; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ keylen = 16; ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++ ++ ++} ++ ++static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ return set_group_key(padapter, key, alg, keyid); ++ ++} ++ ++static int rtw_cfg80211_ap_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_8192C(" r871x_set_encryption: pwep allocate fail !!!\n"); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_8192C("wep, set_tx=1\n"); ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(pwep->KeyLength==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ ++ } ++ else ++ { ++ DBG_8192C("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ //if(param->u.crypt.set_tx == 1) ++ if(param->u.crypt.set_tx == 0) ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ psta->bpairwise_key_installed = _TRUE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ if(pwep) ++ { ++ rtw_mfree((u8 *)pwep, wep_total_len); ++ } ++ ++ return ret; ++ ++} ++#endif ++ ++static int rtw_cfg80211_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ printk("%s\n", __func__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); ++ DBG_8192C("(1)wep_key_idx=%d\n", wep_key_idx); ++ ++ if (wep_key_idx > WEP_KEYS) ++ return -EINVAL; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_8192C("wep, set_tx=1\n"); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ } ++ else ++ { ++ DBG_8192C("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam ++ ++ if (wep_key_idx >= WEP_KEYS) { ++ ret = -EOPNOTSUPP ; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); ++ } ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ //printk("%s, : dot11AuthAlgrthm == dot11AuthAlgrthm_8021X \n", __func__); ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ printk("%s, : Obtain Sta_info fail \n", __func__); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ ++ printk("%s, : param->u.crypt.set_tx ==1 \n", __func__); ++ ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ ++ //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ //DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n")); ++ DBG_871X("\n ~~~~stastakey:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ else//group key ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ //DEBUG_ERR(("\n ~~~~stastakey:groupkey\n")); ++ DBG_871X("\n ~~~~stastakey:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++exit: ++ ++ printk("%s, ret=%d\n", __func__, ret); ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_add_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ struct key_params *params) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ int ret=0; ++ struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ ++ printk("%s, Adding key for %pM\n", __func__, mac_addr); ++ ++ printk("cipher=0x%x\n", params->cipher); ++ ++ printk("key_len=0x%x\n", params->key_len); ++ ++ printk("seq_len=0x%x\n", params->seq_len); ++ ++ printk("key_index=%d\n", key_index); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ printk("pairwise=%d\n", pairwise); ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ ++ ++ param_len = sizeof(struct ieee_param) + params->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ switch (params->cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ case WLAN_CIPHER_SUITE_WEP104: ++ alg_name = "WEP"; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ alg_name = "CCMP"; ++ break; ++ default: ++ return -ENOTSUPP; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if (!mac_addr || is_broadcast_ether_addr(mac_addr)) ++ { ++ param->u.crypt.set_tx = 0; ++ } else { ++ param->u.crypt.set_tx = 1; ++ } ++ ++ ++ //param->u.crypt.idx = key_index - 1; ++ param->u.crypt.idx = key_index; ++ ++ if (params->seq_len && params->seq) ++ { ++ _rtw_memcpy(param->u.crypt.seq, params->seq, params->seq_len); ++ } ++ ++ if(params->key_len && params->key) ++ { ++ param->u.crypt.key_len = params->key_len; ++ _rtw_memcpy(param->u.crypt.key, params->key, params->key_len); ++ } ++ ++ //if(rtw_wdev->iftype == NL80211_IFTYPE_STATION) ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ ret = rtw_cfg80211_set_encryption(ndev, param, param_len); ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE)//else if(rtw_wdev->iftype == NL80211_IFTYPE_AP) ++ { ++#ifdef CONFIG_AP_MODE ++ if(mac_addr) ++ _rtw_memcpy(param->sta_addr, (void*)mac_addr, ETH_ALEN); ++ ++ ret = rtw_cfg80211_ap_set_encryption(ndev, param, param_len); ++#endif ++ } ++ else ++ { ++ printk("error! fw_state=0x%x, iftype=%d\n", pmlmepriv->fw_state, rtw_wdev->iftype); ++ ++ } ++ ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_get_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, bool pairwise, const u8 *mac_addr, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ void *cookie, ++ void (*callback)(void *cookie, ++ struct key_params*)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ struct iwm_key *key = &iwm->keys[key_index]; ++ struct key_params params; ++ ++ IWM_DBG_WEXT(iwm, DBG, "Getting key %d\n", key_index); ++ ++ memset(¶ms, 0, sizeof(params)); ++ ++ params.cipher = key->cipher; ++ params.key_len = key->key_len; ++ params.seq_len = key->seq_len; ++ params.seq = key->seq; ++ params.key = key->key; ++ ++ callback(cookie, ¶ms); ++ ++ return key->key_len ? 0 : -ENOENT; ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_del_key(struct wiphy *wiphy, struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, bool pairwise, const u8 *mac_addr) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ u8 key_index, const u8 *mac_addr) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ struct iwm_key *key = &iwm->keys[key_index]; ++ ++ if (!iwm->keys[key_index].key_len) { ++ IWM_DBG_WEXT(iwm, DBG, "Key %d not used\n", key_index); ++ return 0; ++ } ++ ++ if (key_index == iwm->default_key) ++ iwm->default_key = -1; ++ ++ return iwm_set_key(iwm, 1, key); ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_set_default_key(struct wiphy *wiphy, ++ struct net_device *ndev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ u8 key_index, bool unicast, bool multicast) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ u8 key_index) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++{ ++#if 0 ++ struct iwm_priv *iwm = ndev_to_iwm(ndev); ++ ++ IWM_DBG_WEXT(iwm, DBG, "Default key index is: %d\n", key_index); ++ ++ if (!iwm->keys[key_index].key_len) { ++ IWM_ERR(iwm, "Key %d not used\n", key_index); ++ return -EINVAL; ++ } ++ ++ iwm->default_key = key_index; ++ ++ return iwm_set_tx_key(iwm, key_index); ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_get_station(struct wiphy *wiphy, ++ struct net_device *ndev, ++ u8 *mac, struct station_info *sinfo) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ if(!mac) { ++ DBG_871X("%s, mac==%p\n", __func__, mac); ++ return -ENOENT; ++ } ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s, mac="MAC_FMT"\n", __func__, MAC_ARG(mac)); ++#endif ++ ++ //for infra./P2PClient mode ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ ++ if (_rtw_memcmp(mac, cur_network->network.MacAddress, ETH_ALEN) == _FALSE) ++ { ++ DBG_871X("%s, mismatch bssid="MAC_FMT"\n", __func__, MAC_ARG(cur_network->network.MacAddress)); ++ return -ENOENT; ++ } ++ ++ sinfo->filled |= STATION_INFO_SIGNAL; ++ sinfo->signal = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ ++ sinfo->filled |= STATION_INFO_TX_BITRATE; ++ sinfo->txrate.legacy = 10 * rtw_get_network_max_rate(padapter, &pmlmepriv->cur_network.network); ++ } ++ ++ //for Ad-Hoc/AP mode ++ if ((check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) ++ ||check_fwstate(pmlmepriv, WIFI_AP_STATE) ) ++ && check_fwstate(pmlmepriv, _FW_LINKED) ++ ) ++ { ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ psta = rtw_get_stainfo(pstapriv, mac); ++ if(psta == NULL) ++ { ++ printk("%s, sta_info is null\n", __func__); ++ return -ENOENT; ++ } ++ ++ //TODO: should acquire station info... ++ } ++ ++ return 0; ++} ++ ++extern int netdev_open(struct net_device *pnetdev); ++ ++static int cfg80211_rtw_change_iface(struct wiphy *wiphy, ++ struct net_device *ndev, ++ enum nl80211_iftype type, u32 *flags, ++ struct vif_params *params) ++{ ++ enum nl80211_iftype old_type; ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct wireless_dev *rtw_wdev = wiphy_to_wdev(wiphy); ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ int ret = 0; ++ u8 change = _FALSE; ++ ++ ++ DBG_871X("%s call netdev_open\n", __FUNCTION__); ++ if(netdev_open(ndev) != 0) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ old_type = rtw_wdev->iftype; ++ printk("%s, old_iftype=%d, new_iftype=%d\n", __func__, old_type, type); ++ ++ ++ ++ if(old_type != type) ++ change = _TRUE; ++ ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ break; ++ case NL80211_IFTYPE_STATION: ++ networkType = Ndis802_11Infrastructure; ++ if(change && rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ //it means remove GO and change mode from AP(GO) to station(P2P DEVICE) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_DEVICE); ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++ ++ printk("%s, role=%d, p2p_state=%d, pre_p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), rtw_p2p_pre_state(pwdinfo)); ++ ++ } ++ break; ++ case NL80211_IFTYPE_AP: ++ networkType = Ndis802_11APMode; ++ if(change && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ //it means P2P Group created, we will be GO and change mode from P2P DEVICE to AP(GO) ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ } ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ rtw_wdev->iftype = type; ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE) ++ { ++ rtw_wdev->iftype = old_type; ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ rtw_setopmode_cmd(padapter, networkType); ++ ++exit: ++ ++ return ret; ++} ++ ++void rtw_cfg80211_indicate_scan_done(struct rtw_wdev_priv *pwdev_priv, bool aborted) ++{ ++ _irqL irqL; ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ if(pwdev_priv->scan_request != NULL) ++ { ++ //struct cfg80211_scan_request *scan_request = pwdev_priv->scan_request; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ DBG_871X("%s with scan req\n", __FUNCTION__); ++#endif ++ ++ //avoid WARN_ON(request != wiphy_to_dev(request->wiphy)->scan_req); ++ //if(scan_request == wiphy_to_dev(scan_request->wiphy)->scan_req) ++ ++ cfg80211_scan_done(pwdev_priv->scan_request, aborted); ++ pwdev_priv->scan_request = NULL; ++ ++ } else { ++ DBG_871X("%s without scan req\n", __FUNCTION__); ++ } ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++} ++ ++void rtw_cfg80211_surveydone_event_callback(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s\n", __func__); ++#endif ++ ++#if 0 ++ if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped) ++ { ++ return; ++ } ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ // P2P is enabled ++ wait_for_surveydone = 200; ++ } ++ else ++ { ++ // P2P is disabled ++ wait_for_surveydone = 100; ++ } ++#else ++ { ++ wait_for_surveydone = 100; ++ } ++#endif //CONFIG_P2P ++ ++ ++ wait_status = _FW_UNDER_SURVEY ++ #ifndef CONFIG_ANDROID ++ |_FW_UNDER_LINKING ++ #endif ++ ; ++ ++ while(check_fwstate(pmlmepriv, wait_status) == _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > wait_for_surveydone ) ++ break; ++ } ++#endif ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if( _TRUE == rtw_is_channel_set_contains_channel(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) ++ #ifdef CONFIG_VALIDATE_SSID ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ #endif ++ ) ++ { ++ //ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ rtw_cfg80211_inform_bss(padapter, pnetwork); ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ //rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ ++ if(pwrpriv->bips_processing == _FALSE){ ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ } ++ #endif ++ ++ //call this after other things have been done ++ rtw_indicate_scan_done(padapter, _FALSE); ++ ++} ++ ++static int rtw_cfg80211_set_probe_req_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("probe_req_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_req_ie_len = wps_ielen; ++ } ++ ++ buf += wps_ielen; ++ len -= wps_ielen; ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("probe_req_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_req_ie_len; ++ pmlmepriv->p2p_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_req_ie, free_len); ++ pmlmepriv->p2p_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_req_ie = rtw_malloc(len); ++ if ( pmlmepriv->p2p_probe_req_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_req_ie_len = p2p_ielen; ++ } ++ ++ } ++ ++ return ret; ++ ++} ++ ++static void rtw_cfg80211_scan_abort(_adapter *padapter) ++{ ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s\n", __func__); ++#endif ++ ++ wait_for_surveydone = 10; ++ ++ pmlmeext->scan_abort = _TRUE; ++ ++ while(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY) == _TRUE) ++ { ++ printk("%s : fw_state=_FW_UNDER_SURVEY!\n", __func__); ++ ++ rtw_msleep_os(20); ++ cnt++; ++ if(cnt > wait_for_surveydone ) ++ { ++ printk("waiting for scan_abort time out!\n"); ++ break; ++ } ++ } ++ ++ pmlmeext->scan_abort = _FALSE; ++ ++ rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), _TRUE); ++ ++} ++ ++static int cfg80211_rtw_scan(struct wiphy *wiphy, struct net_device *ndev, ++ struct cfg80211_scan_request *request) ++{ ++ int i; ++ u8 _status = _FALSE; ++ int ret = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ _irqL irqL; ++ u8 *wps_ie=NULL; ++ uint wps_ielen=0; ++ u8 *p2p_ie=NULL; ++ uint p2p_ielen=0; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ struct cfg80211_ssid *ssids = request->ssids; ++ int social_channel = 0, j = 0; ++ bool need_indicate_scan_done = _FALSE; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s\n", __func__); ++#endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ret = -EPERM; ++ goto exit; ++ } ++#endif ++ ++ _enter_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ pwdev_priv->scan_request = request; ++ _exit_critical_bh(&pwdev_priv->scan_req_lock, &irqL); ++ ++ if (check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ //need_indicate_scan_done = _TRUE; ++ //goto check_need_indicate_scan_done; ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if( ssids->ssid != NULL ) ++ { ++ if( _rtw_memcmp(ssids->ssid, "DIRECT-", 7) ++ && rtw_get_p2p_ie((u8 *)request->ie, request->ie_len, NULL, NULL) ++ ) ++ { ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++ #endif ++ } ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ ++ if(request->n_channels == 3 && ++ request->channels[0]->hw_value == 1 && ++ request->channels[1]->hw_value == 6 && ++ request->channels[2]->hw_value == 11 ++ ) ++ { ++ social_channel = 1; ++ } ++ } ++ } ++ ++ if(request->ie && request->ie_len>0) ++ { ++ rtw_cfg80211_set_probe_req_wpsp2pie( ndev, (u8 *)request->ie, request->ie_len ); ++ } ++ ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++ printk("%s, bBusyTraffic == _TRUE\n", __func__); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ printk("%s, fwstate=0x%x\n", __func__, pmlmepriv->fw_state); ++ need_indicate_scan_done = _TRUE; ++ goto check_need_indicate_scan_done; ++ } ++ ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ if(social_channel == 0) ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_NONE); ++ else ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_SOCIAL_LAST); ++ } ++#endif //CONFIG_P2P ++ ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ //parsing request ssids, n_ssids ++ for (i = 0; i < request->n_ssids && i < RTW_SSID_SCAN_AMOUNT; i++) { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("ssid=%s, len=%d\n", ssids[i].ssid, ssids[i].ssid_len); ++ #endif ++ _rtw_memcpy(ssid[i].Ssid, ssids[i].ssid, ssids[i].ssid_len); ++ ssid[i].SsidLength = ssids[i].ssid_len; ++ } ++ ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ //parsing channels, n_channels ++ DBG_871X("%s n_channels:%u\n", __FUNCTION__, request->n_channels); ++#endif ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ ++ if(_status == _FALSE) ++ { ++ ret = -1; ++ } ++ ++check_need_indicate_scan_done: ++ if(need_indicate_scan_done) ++ rtw_cfg80211_surveydone_event_callback(padapter); ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_set_wiphy_params(struct wiphy *wiphy, u32 changed) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (changed & WIPHY_PARAM_RTS_THRESHOLD && ++ (iwm->conf.rts_threshold != wiphy->rts_threshold)) { ++ int ret; ++ ++ iwm->conf.rts_threshold = wiphy->rts_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_RTS_THRESHOLD, ++ iwm->conf.rts_threshold); ++ if (ret < 0) ++ return ret; ++ } ++ ++ if (changed & WIPHY_PARAM_FRAG_THRESHOLD && ++ (iwm->conf.frag_threshold != wiphy->frag_threshold)) { ++ int ret; ++ ++ iwm->conf.frag_threshold = wiphy->frag_threshold; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_FA_CFG_FIX, ++ CFG_FRAG_THRESHOLD, ++ iwm->conf.frag_threshold); ++ if (ret < 0) ++ return ret; ++ } ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_join_ibss(struct wiphy *wiphy, struct net_device *dev, ++ struct cfg80211_ibss_params *params) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ struct ieee80211_channel *chan = params->channel; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return -EIO; ++ ++ /* UMAC doesn't support creating or joining an IBSS network ++ * with specified bssid. */ ++ if (params->bssid) ++ return -EOPNOTSUPP; ++ ++ iwm->channel = ieee80211_frequency_to_channel(chan->center_freq); ++ iwm->umac_profile->ibss.band = chan->band; ++ iwm->umac_profile->ibss.channel = iwm->channel; ++ iwm->umac_profile->ssid.ssid_len = params->ssid_len; ++ memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len); ++ ++ return iwm_send_mlme_profile(iwm); ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_leave_ibss(struct wiphy *wiphy, struct net_device *dev) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ ++ if (iwm->umac_profile_active) ++ return iwm_invalidate_mlme_profile(iwm); ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_version(struct security_priv *psecuritypriv, u32 wpa_version) ++{ ++ printk("%s, wpa_version=%d\n", __func__, wpa_version); ++ ++ ++ if (!wpa_version) { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ return 0; ++ } ++ ++ ++ if (wpa_version & (NL80211_WPA_VERSION_1 | NL80211_WPA_VERSION_2)) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPAPSK; ++ } ++ ++/* ++ if (wpa_version & NL80211_WPA_VERSION_2) ++ { ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++*/ ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_auth_type(struct security_priv *psecuritypriv, ++ enum nl80211_auth_type sme_auth_type) ++{ ++ printk("%s, nl80211_auth_type=%d\n", __func__, sme_auth_type); ++ ++ ++ switch (sme_auth_type) { ++ case NL80211_AUTHTYPE_AUTOMATIC: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ ++ break; ++ case NL80211_AUTHTYPE_OPEN_SYSTEM: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ ++ if(psecuritypriv->ndisauthtype>Ndis802_11AuthModeWPA) ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ ++ break; ++ case NL80211_AUTHTYPE_SHARED_KEY: ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++ ++ break; ++ default: ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++ //return -ENOTSUPP; ++ } ++ ++ return 0; ++ ++} ++ ++static int rtw_cfg80211_set_cipher(struct security_priv *psecuritypriv, u32 cipher, bool ucast) ++{ ++ u32 ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ ++ u32 *profile_cipher = ucast ? &psecuritypriv->dot11PrivacyAlgrthm : ++ &psecuritypriv->dot118021XGrpPrivacy; ++ ++ printk("%s, ucast=%d, cipher=0x%x\n", __func__, ucast, cipher); ++ ++ ++ if (!cipher) { ++ *profile_cipher = _NO_PRIVACY_; ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ return 0; ++ } ++ ++ switch (cipher) { ++ case IW_AUTH_CIPHER_NONE: ++ *profile_cipher = _NO_PRIVACY_; ++ ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP40: ++ *profile_cipher = _WEP40_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_WEP104: ++ *profile_cipher = _WEP104_; ++ ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_TKIP: ++ *profile_cipher = _TKIP_; ++ ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WLAN_CIPHER_SUITE_CCMP: ++ *profile_cipher = _AES_; ++ ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ default: ++ printk("Unsupported cipher: 0x%x\n", cipher); ++ return -ENOTSUPP; ++ } ++ ++ if(ucast) ++ { ++ psecuritypriv->ndisencryptstatus = ndisencryptstatus; ++ ++ //if(psecuritypriv->dot11PrivacyAlgrthm >= _AES_) ++ // psecuritypriv->ndisauthtype = Ndis802_11AuthModeWPA2PSK; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_key_mgt(struct security_priv *psecuritypriv, u32 key_mgt) ++{ ++ printk("%s, key_mgt=0x%x\n", __func__, key_mgt); ++ ++ if (key_mgt == WLAN_AKM_SUITE_8021X) ++ //*auth_type = UMAC_AUTH_TYPE_8021X; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ else if (key_mgt == WLAN_AKM_SUITE_PSK) { ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; ++ } else { ++ printk("Invalid key mgt: 0x%x\n", key_mgt); ++ //return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int rtw_cfg80211_set_wpa_ie(_adapter *padapter, u8 *pie, size_t ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ int wpa_ielen=0; ++ int wpa2_ielen=0; ++ u8 *pwpa, *pwpa2; ++ ++ ++ if((ielen > MAX_WPA_IE_LEN+MAX_WPS_IE_LEN+MAX_P2P_IE_LEN) || (pie == NULL)){ ++ padapter->securitypriv.wps_phase = _FALSE; ++ if(pie == NULL) ++ return ret; ++ else ++ return -EINVAL; ++ } ++ ++ if(ielen) ++ { ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_8192C("set wpa_ie(length:%d):\n", ielen); ++ for(i=0;i= RSN_SELECTOR_LEN){ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ } ++ else if (left > 0){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); ++ ret =-1; ++ goto exit; ++ } ++#endif ++ ++ pwpa = rtw_get_wpa_ie(buf, &wpa_ielen, ielen); ++ pwpa2 = rtw_get_wpa2_ie(buf, &wpa2_ielen, ielen); ++ ++ if(pwpa && wpa_ielen>0) ++ { ++ if(rtw_parse_wpa_ie(pwpa, wpa_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa[0], wpa_ielen+2); ++ ++ printk("got wpa_ie\n"); ++ } ++ } ++ ++ if(pwpa2 && wpa2_ielen>0) ++ { ++ if(rtw_parse_wpa2_ie(pwpa2, wpa2_ielen+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &pwpa2[0], wpa2_ielen+2); ++ ++ printk("got wpa2_ie\n"); ++ } ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ ++ ++ padapter->securitypriv.wps_phase = _FALSE; ++ {//set wps_ie ++ u16 cnt = 0; ++ u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ uint wps_ielen=0; ++ u8 *pwps; ++ ++ pwps = rtw_get_wps_ie(buf, ielen, NULL, &wps_ielen); ++ ++ //while( cnt < ielen ) ++ while( cnt < wps_ielen ) ++ { ++ //eid = buf[cnt]; ++ eid = pwps[cnt]; ++ ++ if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&pwps[cnt+2], wps_oui, 4)==_TRUE)) ++ { ++ DBG_8192C("SET WPS_IE\n"); ++ ++ padapter->securitypriv.wps_ie_len = ( (pwps[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (pwps[cnt+1]+2):(MAX_WPA_IE_LEN<<2); ++ ++ _rtw_memcpy(padapter->securitypriv.wps_ie, &pwps[cnt], padapter->securitypriv.wps_ie_len); ++ ++ if(pwpa==NULL && pwpa2==NULL) ++ { ++ padapter->securitypriv.wps_phase = _TRUE; ++ ++ DBG_8192C("SET WPS_IE, wps_phase==_TRUE\n"); ++ } ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) ++ { ++ //rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); ++ } ++#endif //CONFIG_P2P ++ ++ cnt += pwps[cnt+1]+2; ++ ++ break; ++ } else { ++ cnt += pwps[cnt+1]+2; //goto next ++ } ++ } ++ }//set wps_ie ++ ++ {//check p2p_ie for assoc req; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, ielen, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s p2p_assoc_req_ielen=%d\n", __FUNCTION__, p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_assoc_req_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_assoc_req_ie_len; ++ pmlmepriv->p2p_assoc_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_assoc_req_ie, free_len); ++ pmlmepriv->p2p_assoc_req_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_assoc_req_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_assoc_req_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ goto exit; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_assoc_req_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_assoc_req_ie_len = p2p_ielen; ++ ++ } ++ } ++ ++ } ++ ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ ++ if (buf) rtw_mfree(buf, ielen); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_connect(struct wiphy *wiphy, struct net_device *dev, ++ struct cfg80211_connect_params *sme) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead; ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ u8 *dst_bssid, *src_bssid; ++ //u8 matched_by_bssid=_FALSE; ++ //u8 matched_by_ssid=_FALSE; ++ u8 matched=_FALSE; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ ++ printk("\n=>%s\n",__FUNCTION__); ++ ++ ++ printk("privacy=%d, key=%p, key_len=%d, key_idx=%d\n", sme->privacy, sme->key, sme->key_len, sme->key_idx); ++ ++ ++ if(wdev_to_priv(padapter->rtw_wdev)->block == _TRUE) ++ { ++ ret = -EBUSY; ++ DBG_871X("%s wdev_priv.block is set\n", __FUNCTION__); ++ goto exit; ++ } ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ if (!sme->ssid || !sme->ssid_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (sme->ssid_len > IW_ESSID_MAX_SIZE){ ++ ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = sme->ssid_len; ++ _rtw_memcpy(ndis_ssid.Ssid, sme->ssid, sme->ssid_len); ++ ++ DBG_8192C("ssid=%s, len=%d\n", ndis_ssid.Ssid, sme->ssid_len); ++ ++ ++ if (sme->bssid) ++ printk("bssid="MAC_FMT"\n", MAC_ARG(sme->bssid)); ++ ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ ret = -EBUSY; ++ printk("%s, fw_state=0x%x, goto exit\n", __FUNCTION__, pmlmepriv->fw_state); ++ goto exit; ++ } ++ ++ ++ _enter_critical_bh(&queue->lock, &irqL); ++ ++ phead = get_list_head(queue); ++ pmlmepriv->pscanned = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) ++ { ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ dst_ssid = pnetwork->network.Ssid.Ssid; ++ dst_bssid = pnetwork->network.MacAddress; ++ ++ if(sme->bssid) { ++ if(_rtw_memcmp(pnetwork->network.MacAddress, sme->bssid, ETH_ALEN) == _FALSE) ++ continue; ++ } ++ ++ if(sme->ssid && sme->ssid_len) { ++ if( pnetwork->network.Ssid.SsidLength != sme->ssid_len ++ || _rtw_memcmp(pnetwork->network.Ssid.Ssid, sme->ssid, sme->ssid_len) == _FALSE ++ ) ++ continue; ++ } ++ ++ ++ if (sme->bssid) ++ { ++ src_bssid = sme->bssid; ++ ++ if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) ++ { ++ printk("matched by bssid\n"); ++ ++ ndis_ssid.SsidLength = pnetwork->network.Ssid.SsidLength; ++ _rtw_memcpy(ndis_ssid.Ssid, pnetwork->network.Ssid.Ssid, pnetwork->network.Ssid.SsidLength); ++ ++ matched=_TRUE; ++ break; ++ } ++ ++ } ++ else if (sme->ssid && sme->ssid_len) ++ { ++ src_ssid = ndis_ssid.Ssid; ++ ++ if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && ++ (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) ++ { ++ printk("matched by ssid\n"); ++ matched=_TRUE; ++ break; ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ if((matched == _FALSE) || (pnetwork== NULL)) ++ { ++ ret = -ENOENT; ++ printk("connect, matched == _FALSE, goto exit\n"); ++ goto exit; ++ } ++ ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) ++ { ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ ++ ++ ret = rtw_cfg80211_set_wpa_version(psecuritypriv, sme->crypto.wpa_versions); ++ if (ret < 0) ++ goto exit; ++ ++ ret = rtw_cfg80211_set_auth_type(psecuritypriv, sme->auth_type); ++ if (ret < 0) ++ goto exit; ++ ++ ++ if (sme->crypto.n_ciphers_pairwise) { ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.ciphers_pairwise[0], _TRUE); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ //For WEP Shared auth ++ if((psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Shared ++ || psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_Auto) && sme->key ++ ) ++ { ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ DBG_871X("%s(): Shared/Auto WEP\n",__FUNCTION__); ++ ++ wep_key_idx = sme->key_idx; ++ wep_key_len = sme->key_len; ++ ++ if (sme->key_idx > WEP_KEYS) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_871X(" wpa_set_encryption: pwep allocate fail !!!\n"); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, (void *)sme->key, pwep->KeyLength); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ if(ret < 0) ++ goto exit; ++ } ++ ++ ret = rtw_cfg80211_set_cipher(psecuritypriv, sme->crypto.cipher_group, _FALSE); ++ if (ret < 0) ++ return ret; ++ ++ if (sme->crypto.n_akm_suites) { ++ ret = rtw_cfg80211_set_key_mgt(psecuritypriv, sme->crypto.akm_suites[0]); ++ if (ret < 0) ++ goto exit; ++ } ++ ++ printk("%s, ie_len=%d\n", __func__, sme->ie_len); ++ ++ ret = rtw_cfg80211_set_wpa_ie(padapter, sme->ie, sme->ie_len); ++ if (ret < 0) ++ goto exit; ++ ++ authmode = psecuritypriv->ndisauthtype; ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ ++ //rtw_set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ ++ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++ ++ printk("set ssid:dot11AuthAlgrthm=%d, dot11PrivacyAlgrthm=%d, dot118021XGrpPrivacy=%d\n", psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, psecuritypriv->dot118021XGrpPrivacy); ++ ++exit: ++ ++ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ return ret; ++} ++ ++static int cfg80211_rtw_disconnect(struct wiphy *wiphy, struct net_device *dev, ++ u16 reason_code) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ printk("\n%s\n", __func__); ++ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) ++ { ++ rtw_disassoc_cmd(padapter); ++ ++ DBG_871X("%s...call rtw_indicate_disconnect\n ", __FUNCTION__); ++ ++ rtw_indicate_disconnect(padapter); ++ ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_txpower(struct wiphy *wiphy, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) ++ enum nl80211_tx_power_setting type, int mbm) ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) ++ enum tx_power_setting type, int dbm) ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36)) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ int ret; ++ ++ switch (type) { ++ case NL80211_TX_POWER_AUTOMATIC: ++ return 0; ++ case NL80211_TX_POWER_FIXED: ++ if (mbm < 0 || (mbm % 100)) ++ return -EOPNOTSUPP; ++ ++ if (!test_bit(IWM_STATUS_READY, &iwm->status)) ++ return 0; ++ ++ ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_TX_PWR_LIMIT_USR, ++ MBM_TO_DBM(mbm) * 2); ++ if (ret < 0) ++ return ret; ++ ++ return iwm_tx_power_trigger(iwm); ++ default: ++ IWM_ERR(iwm, "Unsupported power type: %d\n", type); ++ return -EOPNOTSUPP; ++ } ++#endif ++ printk("%s\n", __func__); ++ return 0; ++} ++ ++static int cfg80211_rtw_get_txpower(struct wiphy *wiphy, int *dbm) ++{ ++ //_adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ printk("%s\n", __func__); ++ ++ *dbm = (12); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_power_mgmt(struct wiphy *wiphy, ++ struct net_device *dev, ++ bool enabled, int timeout) ++{ ++#if 0 ++ struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ u32 power_index; ++ ++ if (enabled) ++ power_index = IWM_POWER_INDEX_DEFAULT; ++ else ++ power_index = IWM_POWER_INDEX_MIN; ++ ++ if (power_index == iwm->conf.power_index) ++ return 0; ++ ++ iwm->conf.power_index = power_index; ++ ++ return iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, ++ CFG_POWER_INDEX, iwm->conf.power_index); ++#endif ++ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_set_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ printk("%s\n", __func__); ++ ++ //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_ADD); ++ return 0; ++} ++ ++static int cfg80211_rtw_del_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev, ++ struct cfg80211_pmksa *pmksa) ++{ ++ //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ printk("%s\n", __func__); ++ ++ //return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_DEL); ++ return 0; ++} ++ ++static int cfg80211_rtw_flush_pmksa(struct wiphy *wiphy, ++ struct net_device *netdev) ++{ ++ //struct iwm_priv *iwm = wiphy_to_iwm(wiphy); ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct cfg80211_pmksa pmksa; ++ ++ printk("%s\n", __func__); ++ ++ memset(&pmksa, 0, sizeof(struct cfg80211_pmksa)); ++ ++ ++ //return iwm_send_pmkid_update(iwm, &pmksa, IWM_CMD_PMKID_FLUSH); ++ return 0; ++} ++ ++#ifdef CONFIG_AP_MODE ++void rtw_cfg80211_indicate_sta_assoc(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ printk("%s\n", __func__); ++ ++ channel = pmlmeext->cur_channel; ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); ++ } ++ else ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); ++ } ++ ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ //to avoid WARN_ON(wdev->iftype != NL80211_IFTYPE_STATION) when calling cfg80211_send_rx_assoc() ++ pwdev->iftype = NL80211_IFTYPE_STATION; ++ cfg80211_send_rx_assoc(padapter->pnetdev, pmgmt_frame, frame_len); ++ pwdev->iftype = NL80211_IFTYPE_AP; ++ //cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++ ++} ++ ++void rtw_cfg80211_indicate_sta_disassoc(_adapter *padapter, unsigned char *da, unsigned short reason) ++{ ++ s32 freq; ++ int channel; ++ u8 *pmgmt_frame; ++ uint frame_len; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ u8 mgmt_buf[128] = {0}; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ printk("%s\n", __func__); ++ ++ channel = pmlmeext->cur_channel; ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); ++ } ++ else ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); ++ } ++ ++ ++ pmgmt_frame = mgmt_buf; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pmgmt_frame; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ //_rtw_memcpy(pwlanhdr->addr1, da, ETH_ALEN); ++ //_rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr1, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, da, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, get_my_bssid(&(pmlmeinfo->network)), ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pmgmt_frame, WIFI_DEAUTH); ++ ++ pmgmt_frame += sizeof(struct rtw_ieee80211_hdr_3addr); ++ frame_len = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ reason = cpu_to_le16(reason); ++ pmgmt_frame = rtw_set_fixed_ie(pmgmt_frame, _RSON_CODE_ , (unsigned char *)&reason, &frame_len); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ cfg80211_rx_mgmt(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_send_disassoc(padapter->pnetdev, mgmt_buf, frame_len); ++ //cfg80211_rx_action(padapter->pnetdev, freq, mgmt_buf, frame_len, GFP_ATOMIC); ++#endif ++ ++} ++ ++static int rtw_cfg80211_monitor_if_open(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ printk("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_close(struct net_device *ndev) ++{ ++ int ret = 0; ++ ++ printk("%s\n", __func__); ++ ++ return ret; ++} ++ ++static int rtw_cfg80211_monitor_if_xmit_entry(struct sk_buff *skb, struct net_device *ndev) ++{ ++ int ret = 0; ++ int rtap_len; ++ int qos_len = 0; ++ int dot11_hdr_len = 24; ++ int snap_len = 6; ++ unsigned char *pdata; ++ unsigned short frame_ctl; ++ unsigned char src_mac_addr[6]; ++ unsigned char dst_mac_addr[6]; ++ struct ieee80211_hdr *dot11_hdr; ++ struct ieee80211_radiotap_header *rtap_hdr; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(ndev); ++ ++ printk("%s\n", __func__); ++ ++ if (unlikely(skb->len < sizeof(struct ieee80211_radiotap_header))) ++ goto fail; ++ ++ rtap_hdr = (struct ieee80211_radiotap_header *)skb->data; ++ if (unlikely(rtap_hdr->it_version)) ++ goto fail; ++ ++ rtap_len = ieee80211_get_radiotap_len(skb->data); ++ if (unlikely(skb->len < rtap_len)) ++ goto fail; ++ ++ if(rtap_len != 14) ++ { ++ printk("radiotap len (should be 14): %d\n", rtap_len); ++ goto fail; ++ } ++ ++ /* Skip the ratio tap header */ ++ skb_pull(skb, rtap_len); ++ ++ dot11_hdr = (struct ieee80211_hdr *)skb->data; ++ frame_ctl = le16_to_cpu(dot11_hdr->frame_control); ++ /* Check if the QoS bit is set */ ++ if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) { ++ /* Check if this ia a Wireless Distribution System (WDS) frame ++ * which has 4 MAC addresses ++ */ ++ if (dot11_hdr->frame_control & 0x0080) ++ qos_len = 2; ++ if ((dot11_hdr->frame_control & 0x0300) == 0x0300) ++ dot11_hdr_len += 6; ++ ++ memcpy(dst_mac_addr, dot11_hdr->addr1, sizeof(dst_mac_addr)); ++ memcpy(src_mac_addr, dot11_hdr->addr2, sizeof(src_mac_addr)); ++ ++ /* Skip the 802.11 header, QoS (if any) and SNAP, but leave spaces for ++ * for two MAC addresses ++ */ ++ skb_pull(skb, dot11_hdr_len + qos_len + snap_len - sizeof(src_mac_addr) * 2); ++ pdata = (unsigned char*)skb->data; ++ memcpy(pdata, dst_mac_addr, sizeof(dst_mac_addr)); ++ memcpy(pdata + sizeof(dst_mac_addr), src_mac_addr, sizeof(src_mac_addr)); ++ ++ printk("should be eapol packet\n"); ++ ++ /* Use the real net device to transmit the packet */ ++ ret = rtw_xmit_entry(skb, padapter->pnetdev); ++ ++ return ret; ++ ++ } ++ else if((frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)) == cpu_to_le16(IEEE80211_STYPE_ACTION)) ++ { ++ //only for action frames ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ //u8 category, action, OUI_Subtype, dialogToken=0; ++ //unsigned char *frame_body; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ u8 *buf = skb->data; ++ u32 len = skb->len; ++ ++ if(rtw_p2p_check_frames(padapter, buf, len, _TRUE) < 0) ++ { ++ goto fail; ++ } ++ ++/* ++ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ category = frame_body[0]; ++ //just for check ++ if(category == RTW_WLAN_CATEGORY_PUBLIC) ++ { ++ action = frame_body[ 1 ]; ++ OUI_Subtype = frame_body[ 6 ]; ++ dialogToken = frame_body[7]; ++ ++ if ( action == ACT_PUBLIC_P2P ) ++ { ++ printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ } ++ else ++ { ++ printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ } ++ ++ } ++ else if(category == RTW_WLAN_CATEGORY_P2P) ++ { ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++ printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); ++ ++ } ++ else ++ { ++ printk("%s, action frame category=%d, drop!\n", __func__, category); ++ goto fail; ++ } ++*/ ++ ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ goto fail; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ ++ } ++ else ++ { ++ printk("frame_ctl=0x%x\n", frame_ctl & (IEEE80211_FCTL_FTYPE|IEEE80211_FCTL_STYPE)); ++ } ++ ++ ++fail: ++ ++ dev_kfree_skb(skb); ++ ++ return 0; ++ ++} ++ ++static void rtw_cfg80211_monitor_if_set_multicast_list(struct net_device *ndev) ++{ ++ printk("%s\n", __func__); ++} ++ ++static int rtw_cfg80211_monitor_if_set_mac_address(struct net_device *ndev, void *addr) ++{ ++ int ret = 0; ++ ++ printk("%s\n", __func__); ++ ++ return ret; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_cfg80211_monitor_if_ops = { ++ .ndo_open = rtw_cfg80211_monitor_if_open, ++ .ndo_stop = rtw_cfg80211_monitor_if_close, ++ .ndo_start_xmit = rtw_cfg80211_monitor_if_xmit_entry, ++ .ndo_set_multicast_list = rtw_cfg80211_monitor_if_set_multicast_list, ++ .ndo_set_mac_address = rtw_cfg80211_monitor_if_set_mac_address, ++}; ++#endif ++ ++static struct net_device *rtw_cfg80211_add_monitor_if(_adapter *padapter, char *name) ++{ ++ int ret = 0; ++ struct net_device* ndev = NULL; ++ struct rtw_netdev_priv_indicator *pnpi; ++ struct rtw_wdev_priv *pwdev_priv = wdev_to_priv(padapter->rtw_wdev); ++ ++ printk("%s\n", __func__); ++ ++ if (!name ) { ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ if((strnicmp(name, pwdev_priv->ifname_mon, strlen(name)) ==0) ++ && pwdev_priv->pmon_ndev) ++ { ++ ndev = pwdev_priv->pmon_ndev; ++ ++ printk("%s, monitor interface(%s) has existed\n", __func__, name); ++ ++ goto out; ++ } ++ ++ ++ ndev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!ndev) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ ndev->type = ARPHRD_IEEE80211_RADIOTAP; ++ strncpy(ndev->name, name, IFNAMSIZ); ++ ndev->name[IFNAMSIZ - 1] = 0; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ ndev->netdev_ops = &rtw_cfg80211_monitor_if_ops; ++#else ++ ndev->open = rtw_cfg80211_monitor_if_open; ++ ndev->stop = rtw_cfg80211_monitor_if_close; ++ ndev->hard_start_xmit = rtw_cfg80211_monitor_if_xmit_entry; ++ ndev->set_mac_address = rtw_cfg80211_monitor_if_set_mac_address; ++#endif ++ ++ pnpi = netdev_priv(ndev); ++ pnpi->priv = padapter; ++ pnpi->sizeof_priv = sizeof(_adapter); ++ ++ ret = register_netdevice(ndev); ++ if (ret) { ++ goto out; ++ } ++ ++ pwdev_priv->pmon_ndev = ndev; ++ _rtw_memcpy(pwdev_priv->ifname_mon, name, IFNAMSIZ+1); ++ ++out: ++ if (ret && ndev) ++ { ++ free_netdev(ndev); ++ ndev = NULL; ++ } ++ ++ ++ printk("%s, ndev=%p, pmon_ndev=%p, ret=%d\n", __func__, ndev, pwdev_priv->pmon_ndev, ret); ++ ++ return ndev; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++static struct net_device * cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++static int cfg80211_rtw_add_virtual_intf(struct wiphy *wiphy, char *name, ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ enum nl80211_iftype type, u32 *flags, ++ struct vif_params *params) ++{ ++ struct net_device* ndev = NULL; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ ++ printk("%s, ifname=%s, type=%d\n", __func__, name, type); ++ ++ ++ switch (type) { ++ case NL80211_IFTYPE_ADHOC: ++ case NL80211_IFTYPE_AP_VLAN: ++ case NL80211_IFTYPE_WDS: ++ case NL80211_IFTYPE_MESH_POINT: ++ ++ break; ++ case NL80211_IFTYPE_MONITOR: ++ ndev = rtw_cfg80211_add_monitor_if(padapter, name); ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ case NL80211_IFTYPE_P2P_CLIENT: ++#endif ++ case NL80211_IFTYPE_STATION: ++ ++ break; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ case NL80211_IFTYPE_P2P_GO: ++#endif ++ case NL80211_IFTYPE_AP: ++ ++ break; ++ default: ++ printk("Unsupported interface type\n"); ++ break; ++ } ++ ++ printk("ndev=%p\n", ndev); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ return ndev; ++#else // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ return 0; ++#endif // (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ ++} ++ ++static int cfg80211_rtw_del_virtual_intf(struct wiphy *wiphy, struct net_device *dev) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct rtw_wdev_priv *pwdev_priv = (struct rtw_wdev_priv *)wiphy_priv(wiphy); ++ ++ printk("%s\n", __func__); ++ ++ if(dev) ++ { ++ unregister_netdev(dev); ++ ++ free_netdev(dev); ++ ++ if(dev == pwdev_priv->pmon_ndev) ++ { ++ printk("remove monitor interface\n"); ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ } ++ } ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_add_beacon(struct wiphy *wiphy, struct net_device *dev, ++ struct beacon_parameters *info) ++{ ++ int ret=0; ++ u8 *pbuf = NULL; ++ uint len, wps_ielen=0; ++ uint p2p_ielen=0; ++ u8 *p2p_ie; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ printk("%s, beacon_head_len=%d, beacon_tail_len=%d\n", __FUNCTION__, info->head_len, info->tail_len); ++ ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if(info->head_len<24) ++ return -EINVAL; ++ ++ ++ pbuf = rtw_zmalloc(info->head_len+info->tail_len); ++ if(!pbuf) ++ return -ENOMEM; ++ ++ ++ //_rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++ ++ //if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ // pstapriv->max_num_sta = NUM_STA; ++ ++ ++ _rtw_memcpy(pbuf, info->head+24, info->head_len-24);// 24=beacon header len. ++ _rtw_memcpy(pbuf+info->head_len-24, info->tail, info->tail_len); ++ ++ len = info->head_len+info->tail_len-24; ++ ++ //check wps ie if inclued ++ if(rtw_get_wps_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &wps_ielen)) ++ printk("add bcn, wps_ielen=%d\n", wps_ielen); ++ ++ ++ //check p2p ie if inclued ++ if(rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen)) ++ printk("got p2p_ie, len=%d\n", p2p_ielen); ++ ++ ++ ++ // pbss_network->IEs will not include p2p_ie ++ if(rtw_check_beacon_data(padapter, pbuf, len-p2p_ielen) == _SUCCESS) ++ //if(rtw_check_beacon_data(padapter, pbuf, len) == _SUCCESS) ++ { ++#ifdef CONFIG_P2P ++ //check p2p if enable ++ if((p2p_ie=rtw_get_p2p_ie(pbuf+_FIXED_IE_LENGTH_, len-_FIXED_IE_LENGTH_, NULL, &p2p_ielen))) ++ { ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ printk("Enable P2P function for the first time\n"); ++ rtw_p2p_enable(padapter, P2P_ROLE_GO); ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ printk("enter GO Mode, p2p_ielen=%d\n", p2p_ielen); ++ ++ rtw_p2p_set_role(pwdinfo, P2P_ROLE_GO); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_OK); ++ pwdinfo->intent = 15; ++ } ++ ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ ++ } ++#endif //CONFIG_P2P ++ ++ ret = 0; ++ ++ } ++ else ++ { ++ ret = -EINVAL; ++ } ++ ++ ++ rtw_mfree(pbuf, info->head_len+info->tail_len); ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_set_beacon(struct wiphy *wiphy, struct net_device *dev, ++ struct beacon_parameters *info) ++{ ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ printk("%s\n", __func__); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ cfg80211_rtw_add_beacon(wiphy, dev, info); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_beacon(struct wiphy *wiphy, struct net_device *dev) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++ ++static int cfg80211_rtw_add_station(struct wiphy *wiphy, struct net_device *dev, ++ u8 *mac, struct station_parameters *params) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_del_station(struct wiphy *wiphy, struct net_device *dev, ++ u8 *mac) ++{ ++ int ret=0; ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ printk("+%s\n", __func__); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ printk("%s, fw_state != FW_LINKED|WIFI_AP_STATE\n", __func__); ++ return -EINVAL; ++ } ++ ++ ++ if(!mac) ++ { ++ printk("flush all sta, and cam_entry\n"); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++ ret = rtw_sta_flush(padapter); ++ ++ return ret; ++ } ++ ++ ++ printk("free sta macaddr =" MAC_FMT "\n", MAC_ARG(mac)); ++ ++ if (mac[0] == 0xff && mac[1] == 0xff && ++ mac[2] == 0xff && mac[3] == 0xff && ++ mac[4] == 0xff && mac[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(mac, psta->hwaddr, ETH_ALEN)) ++ { ++ if(psta->dot8021xalg == 1 && psta->bpairwise_key_installed == _FALSE) ++ { ++ DBG_8192C("%s, sta's dot8021xalg = 1 and key_installed = _FALSE\n", __func__); ++ } ++ else ++ { ++ DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ rtw_list_delete(&psta->asoc_list); ++ ++ //_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ap_free_sta(padapter, psta); ++ //_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ break; ++ } ++ ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ ++#if 0 ++ psta = rtw_get_stainfo(pstapriv, mac); ++ if(psta) ++ { ++ //DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ ap_free_sta(padapter, psta); ++ ++ psta = NULL; ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_8192C("cfg80211_rtw_del_station(), sta has already been removed or never been added\n"); ++ ++ //ret = -1; ++ } ++#endif ++ ++ printk("-%s\n", __func__); ++ ++ return ret; ++ ++} ++ ++static int cfg80211_rtw_change_station(struct wiphy *wiphy, struct net_device *dev, ++ u8 *mac, struct station_parameters *params) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_dump_station(struct wiphy *wiphy, struct net_device *dev, ++ int idx, u8 *mac, struct station_info *sinfo) ++{ ++ printk("%s\n", __func__); ++ ++ //TODO: dump scanned queue ++ ++ return -ENOENT; ++} ++ ++static int cfg80211_rtw_change_bss(struct wiphy *wiphy, struct net_device *dev, ++ struct bss_parameters *params) ++{ ++ u8 i; ++ ++ printk("%s\n", __func__); ++/* ++ printk("use_cts_prot=%d\n", params->use_cts_prot); ++ printk("use_short_preamble=%d\n", params->use_short_preamble); ++ printk("use_short_slot_time=%d\n", params->use_short_slot_time); ++ printk("ap_isolate=%d\n", params->ap_isolate); ++ ++ printk("basic_rates_len=%d\n", params->basic_rates_len); ++ for(i=0; ibasic_rates_len; i++) ++ { ++ printk("basic_rates=%d\n", params->basic_rates[i]); ++ ++ } ++*/ ++ return 0; ++ ++} ++ ++static int cfg80211_rtw_set_channel(struct wiphy *wiphy, struct net_device *dev, ++ struct ieee80211_channel *chan, ++ enum nl80211_channel_type channel_type) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_auth(struct wiphy *wiphy, struct net_device *dev, ++ struct cfg80211_auth_request *req) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++ ++static int cfg80211_rtw_assoc(struct wiphy *wiphy, struct net_device *dev, ++ struct cfg80211_assoc_request *req) ++{ ++ printk("%s\n", __func__); ++ ++ return 0; ++} ++#endif //CONFIG_AP_MODE ++ ++void rtw_cfg80211_rx_action_p2p(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s\n", __func__); ++#endif ++ ++ rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ ++ channel = pmlmeext->cur_channel; ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); ++ } ++ else ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); ++ } ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++ ++} ++ ++void rtw_cfg80211_rx_p2p_action_public(_adapter *padapter, u8 *pmgmt_frame, uint frame_len) ++{ ++ s32 freq; ++ int channel; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s\n", __func__); ++#endif ++ ++ rtw_p2p_check_frames(padapter, pmgmt_frame, frame_len, _FALSE); ++ ++ channel = pmlmeext->cur_channel; ++ ++ if (channel <= RTW_CH_MAX_2G_CHANNEL) ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_2GHZ); ++ } ++ else ++ { ++ freq = rtw_ieee80211_channel_to_frequency(channel, IEEE80211_BAND_5GHZ); ++ } ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ cfg80211_rx_mgmt(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#else ++ cfg80211_rx_action(padapter->pnetdev, freq, pmgmt_frame, frame_len, GFP_ATOMIC); ++#endif ++ ++} ++ ++void rtw_cfg80211_issue_p2p_provision_request(_adapter *padapter, const u8 *buf, size_t len) ++{ ++ u16 wps_devicepassword_id = 0x0000; ++ uint wps_devicepassword_id_len = 0; ++ u8 wpsie[ 255 ] = { 0x00 }, p2p_ie[ 255 ] = { 0x00 }; ++ uint p2p_ielen = 0; ++ uint wpsielen = 0; ++ u32 devinfo_contentlen = 0; ++ u8 devinfo_content[64] = { 0x00 }; ++ u16 capability = 0; ++ uint capability_len = 0; ++ ++ unsigned char category = RTW_WLAN_CATEGORY_PUBLIC; ++ u8 action = P2P_PUB_ACTION_ACTION; ++ u8 dialogToken = 1; ++ u32 p2poui = cpu_to_be32(P2POUI); ++ u8 oui_subtype = P2P_PROVISION_DISC_REQ; ++ u32 p2pielen = 0; ++#ifdef CONFIG_WFD ++ u32 wfdielen = 0; ++#endif //CONFIG_WFD ++ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ unsigned short *fctrl; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++ u8 *frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ size_t frame_body_len = len - sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ ++ DBG_871X( "[%s] In\n", __FUNCTION__ ); ++ ++ //prepare for building provision_request frame ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerIFAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ _rtw_memcpy(pwdinfo->tx_prov_disc_info.peerDevAddr, GetAddr1Ptr(buf), ETH_ALEN); ++ ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ ++ rtw_get_wps_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, wpsie, &wpsielen); ++ rtw_get_wps_attr_content( wpsie, wpsielen, WPS_ATTR_DEVICE_PWID, (u8*) &wps_devicepassword_id, &wps_devicepassword_id_len); ++ wps_devicepassword_id = be16_to_cpu( wps_devicepassword_id ); ++ ++ switch(wps_devicepassword_id) ++ { ++ case WPS_DPID_PIN: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ break; ++ case WPS_DPID_USER_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ break; ++ case WPS_DPID_MACHINE_SPEC: ++ break; ++ case WPS_DPID_REKEY: ++ break; ++ case WPS_DPID_PBC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ break; ++ case WPS_DPID_REGISTRAR_SPEC: ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ break; ++ default: ++ break; ++ } ++ ++ ++ if ( rtw_get_p2p_ie( frame_body + _PUBLIC_ACTION_IE_OFFSET_, frame_body_len - _PUBLIC_ACTION_IE_OFFSET_, p2p_ie, &p2p_ielen ) ) ++ { ++ ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_DEVICE_INFO, devinfo_content, &devinfo_contentlen); ++ rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&capability, &capability_len); ++ ++ } ++ ++ ++ //start to build provision_request frame ++ _rtw_memset(wpsie, 0, sizeof(wpsie)); ++ _rtw_memset(p2p_ie, 0, sizeof(p2p_ie)); ++ p2p_ielen = 0; ++ ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ return; ++ } ++ ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ ++ fctrl = &(pwlanhdr->frame_ctl); ++ *(fctrl) = 0; ++ ++ _rtw_memcpy(pwlanhdr->addr1, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr2, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ _rtw_memcpy(pwlanhdr->addr3, pwdinfo->tx_prov_disc_info.peerIFAddr, ETH_ALEN); ++ ++ SetSeqNum(pwlanhdr, pmlmeext->mgnt_seq); ++ pmlmeext->mgnt_seq++; ++ SetFrameSubType(pframe, WIFI_ACTION); ++ ++ pframe += sizeof(struct rtw_ieee80211_hdr_3addr); ++ pattrib->pktlen = sizeof(struct rtw_ieee80211_hdr_3addr); ++ ++ pframe = rtw_set_fixed_ie(pframe, 1, &(category), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(action), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 4, (unsigned char *) &(p2poui), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(oui_subtype), &(pattrib->pktlen)); ++ pframe = rtw_set_fixed_ie(pframe, 1, &(dialogToken), &(pattrib->pktlen)); ++ ++ ++ //build_prov_disc_request_p2p_ie ++ // P2P OUI ++ p2pielen = 0; ++ p2p_ie[ p2pielen++ ] = 0x50; ++ p2p_ie[ p2pielen++ ] = 0x6F; ++ p2p_ie[ p2pielen++ ] = 0x9A; ++ p2p_ie[ p2pielen++ ] = 0x09; // WFA P2P v1.0 ++ ++ // Commented by Albert 20110301 ++ // According to the P2P Specification, the provision discovery request frame should contain 3 P2P attributes ++ // 1. P2P Capability ++ // 2. Device Info ++ // 3. Group ID ( When joining an operating P2P Group ) ++ ++ // P2P Capability ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_CAPABILITY; ++ ++ // Length: ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 0x0002 ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, 0x0002); ++ p2pielen += 2; ++ ++ // Value: ++ // Device Capability Bitmap, 1 byte ++ // Be able to participate in additional P2P Groups and ++ // support the P2P Invitation Procedure ++ _rtw_memcpy(p2p_ie + p2pielen, &capability, 2); ++ p2pielen += 2; ++ ++ ++ // Device Info ATTR ++ // Type: ++ p2p_ie[ p2pielen++ ] = P2P_ATTR_DEVICE_INFO; ++ ++ // Length: ++ // 21 -> P2P Device Address (6bytes) + Config Methods (2bytes) + Primary Device Type (8bytes) ++ // + NumofSecondDevType (1byte) + WPS Device Name ID field (2bytes) + WPS Device Name Len field (2bytes) ++ //*(u16*) ( p2pie + p2pielen ) = cpu_to_le16( 21 + pwdinfo->device_name_len ); ++ RTW_PUT_LE16(p2p_ie + p2pielen, devinfo_contentlen); ++ p2pielen += 2; ++ ++ // Value: ++ _rtw_memcpy(p2p_ie + p2pielen, devinfo_content, devinfo_contentlen); ++ p2pielen += devinfo_contentlen; ++ ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, p2pielen, (unsigned char *) p2p_ie, &p2p_ielen); ++ //p2pielen = build_prov_disc_request_p2p_ie( pwdinfo, pframe, NULL, 0, pwdinfo->tx_prov_disc_info.peerDevAddr); ++ //pframe += p2pielen; ++ pattrib->pktlen += p2p_ielen; ++ ++ wpsielen = 0; ++ // WPS OUI ++ *(u32*) ( wpsie ) = cpu_to_be32( WPSOUI ); ++ wpsielen += 4; ++ ++ // WPS version ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_VER1 ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0001 ); ++ wpsielen += 2; ++ ++ // Value: ++ wpsie[wpsielen++] = WPS_VERSION_1; // Version 1.0 ++ ++ // Config Method ++ // Type: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( WPS_ATTR_CONF_METHOD ); ++ wpsielen += 2; ++ ++ // Length: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( 0x0002 ); ++ wpsielen += 2; ++ ++ // Value: ++ *(u16*) ( wpsie + wpsielen ) = cpu_to_be16( pwdinfo->tx_prov_disc_info.wps_config_method_request ); ++ wpsielen += 2; ++ ++ pframe = rtw_set_ie(pframe, _VENDOR_SPECIFIC_IE_, wpsielen, (unsigned char *) wpsie, &pattrib->pktlen ); ++ ++ ++#ifdef CONFIG_WFD ++ wfdielen = build_provdisc_req_wfd_ie(pwdinfo, pframe); ++ pframe += wfdielen; ++ pattrib->pktlen += wfdielen; ++#endif //CONFIG_WFD ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ //if(wps_devicepassword_id == WPS_DPID_REGISTRAR_SPEC) ++ //{ ++ // printk("waiting for p2p peer key-in PIN CODE\n"); ++ // rtw_msleep_os(15000); // 15 sec for key in PIN CODE, workaround for GS2 before issuing Nego Req. ++ //} ++ ++} ++ ++static int cfg80211_rtw_mgmt_tx(struct wiphy *wiphy, struct net_device *dev, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ struct ieee80211_channel *chan, bool offchan, ++ enum nl80211_channel_type channel_type, ++ bool channel_type_valid, unsigned int wait, ++#else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ struct ieee80211_channel *chan, ++ enum nl80211_channel_type channel_type, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ bool channel_type_valid, ++#endif ++#endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ const u8 *buf, size_t len, u64 *cookie) ++{ ++ struct xmit_frame *pmgntframe; ++ struct pkt_attrib *pattrib; ++ unsigned char *pframe; ++ const struct ieee80211_mgmt *mgmt; ++ //u8 category, action, OUI_Subtype, dialogToken=0; ++ //unsigned char *frame_body; ++ int ret = 0; ++ int type = (-1); ++ u16 fc; ++ bool ack = _TRUE; ++ struct rtw_ieee80211_hdr *pwlanhdr; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ ++ /* cookie generation */ ++ *cookie = (unsigned long) buf; ++ ++ ++ printk("%s, len=%d, ch=%d, ch_type=%d\n", __func__, len, ++ ieee80211_frequency_to_channel(chan->center_freq), channel_type); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ printk("channel_type_valid=%d\n", channel_type_valid); ++#endif ++ ++ mgmt = (const struct ieee80211_mgmt *) buf; ++ fc = mgmt->frame_control; ++ if (fc != IEEE80211_STYPE_ACTION) ++ { ++ if (fc == IEEE80211_STYPE_PROBE_RESP) ++ { ++ printk("%s, fc == IEEE80211_STYPE_PROBE_RESP\n", __func__); ++ } ++ else ++ { ++ printk("%s, frame_control == 0x%x\n", __func__, fc); ++ } ++ ++ //cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); ++ ++ goto exit; ++ ++ } ++ else ++ { ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, do: scan_abort\n", __func__); ++#endif ++ ++ /* Abort the dwell time of any previous off-channel action frame that may ++ * be still in effect. Sending off-channel action frames relies on the ++ * driver's scan engine. If a previous off-channel action frame tx is ++ * still in progress (including the dwell time), then this new action ++ * frame will not be sent out. ++ */ ++ ++ rtw_cfg80211_scan_abort(padapter); ++ } ++#if 0 ++ if (wl->p2p->vif_created) { ++ wifi_p2p_pub_act_frame_t *act_frm = ++ (wifi_p2p_pub_act_frame_t *) (action_frame->data); ++ WL_DBG(("action_frame->len: %d chan %d category %d subtype %d\n", ++ action_frame->len, af_params->channel, ++ act_frm->category, act_frm->subtype)); ++ /* ++ * To make sure to send successfully action frame, we have to turn off mpc ++ */ ++ if ((act_frm->subtype == P2P_PAF_GON_REQ)|| ++ (act_frm->subtype == P2P_PAF_GON_RSP)) { ++ wldev_iovar_setint(dev, "mpc", 0); ++ } else if (act_frm->subtype == P2P_PAF_GON_CONF) { ++ wldev_iovar_setint(dev, "mpc", 1); ++ } else if (act_frm->subtype == P2P_PAF_DEVDIS_REQ) { ++ af_params->dwell_time = WL_LONG_DWELL_TIME; ++ } ++ } ++#endif ++ ++/* ++ frame_body = (unsigned char *)(buf + sizeof(struct rtw_ieee80211_hdr_3addr)); ++ category = frame_body[0]; ++ //just for check ++ if(category == RTW_WLAN_CATEGORY_PUBLIC) ++ { ++ action = frame_body[ 1 ]; ++ OUI_Subtype = frame_body[ 6 ]; ++ dialogToken = frame_body[7]; ++ ++ if ( action == ACT_PUBLIC_P2P ) ++ { ++ printk("ACTION_CATEGORY_PUBLIC: ACT_PUBLIC_P2P, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ } ++ else ++ { ++ printk("ACTION_CATEGORY_PUBLIC: action=%d, OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ action, cpu_to_be32( *( ( u32* ) ( frame_body + 2 ) ) ), OUI_Subtype, dialogToken); ++ } ++ ++ } ++ else if(category == RTW_WLAN_CATEGORY_P2P) ++ { ++ OUI_Subtype = frame_body[5]; ++ dialogToken = frame_body[6]; ++ ++ printk("ACTION_CATEGORY_P2P: OUI=0x%x, OUI_Subtype=%d, dialogToken=%d\n", ++ cpu_to_be32( *( ( u32* ) ( frame_body + 1 ) ) ), OUI_Subtype, dialogToken); ++ ++ } ++ else ++ { ++ printk("%s, action frame category=%d\n", __func__, category); ++ ack = _FALSE; ++ goto exit; ++ } ++*/ ++ ++ if( ieee80211_frequency_to_channel(chan->center_freq) != pmlmeext->cur_channel ) ++ { ++ pmlmeext->cur_channel = ieee80211_frequency_to_channel(chan->center_freq); ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++ ++ if( (type = rtw_p2p_check_frames(padapter, buf, len, _TRUE)) < 0) ++ { ++ ack = _FALSE; ++ goto exit; ++ } ++ ++ ++ //if(type == P2P_GO_NEGO_REQ) ++ //{ ++ // rtw_cfg80211_issue_p2p_provision_request(padapter, buf, len); ++ //} ++ ++ ++ //starting alloc mgmt frame to dump it ++ if ((pmgntframe = alloc_mgtxmitframe(pxmitpriv)) == NULL) ++ { ++ ack = _FALSE; ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ //update attribute ++ pattrib = &pmgntframe->attrib; ++ update_mgntframe_attrib(padapter, pattrib); ++ pattrib->retry_ctrl = _FALSE; ++ ++ _rtw_memset(pmgntframe->buf_addr, 0, WLANHDR_OFFSET + TXDESC_OFFSET); ++ ++ pframe = (u8 *)(pmgntframe->buf_addr) + TXDESC_OFFSET; ++ ++ _rtw_memcpy(pframe, (void*)buf, len); ++ pattrib->pktlen = len; ++ ++ pwlanhdr = (struct rtw_ieee80211_hdr *)pframe; ++ //update seq number ++ pmlmeext->mgnt_seq = GetSequence(pwlanhdr); ++ pattrib->seqnum = pmlmeext->mgnt_seq; ++ pmlmeext->mgnt_seq++; ++ ++ ++ pattrib->last_txcmdsz = pattrib->pktlen; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, ack=%d, ok!\n", __func__, ack ); ++#endif ++ ++ //indicate ack before issue frame to avoid racing with rsp frame ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); ++#endif ++ ++ dump_mgntframe(padapter, pmgntframe); ++ ++ return ret; ++ ++exit: ++ ++ printk("%s, ack=%d \n", __func__, ack ); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ cfg80211_mgmt_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ cfg80211_action_tx_status(dev, *cookie, buf, len, ack, GFP_KERNEL); ++#endif ++ ++ return ret; ++ ++} ++ ++static s32 cfg80211_rtw_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, ++ struct ieee80211_channel * channel, ++ enum nl80211_channel_type channel_type, ++ unsigned int duration, u64 *cookie) ++{ ++ s32 err = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct cfg80211_wifidirect_info *pcfg80211_wdinfo = &padapter->cfg80211_wdinfo; ++ u8 remain_ch = (u8) ieee80211_frequency_to_channel(channel->center_freq); ++ ++ printk("%s channel %02u duration %d\n", __func__, remain_ch, duration); ++ ++ if(_FAIL == rtw_pwr_wakeup(padapter)) { ++ err = -EFAULT; ++ goto exit; ++ } ++ ++ pcfg80211_wdinfo->remain_on_ch_dev = dev; ++ _rtw_memcpy(&pcfg80211_wdinfo->remain_on_ch_channel, channel, sizeof(struct ieee80211_channel)); ++ pcfg80211_wdinfo->remain_on_ch_type= channel_type; ++ pcfg80211_wdinfo->remain_on_ch_cookie= *cookie; ++ cfg80211_ready_on_channel(dev, *cookie, channel, channel_type, duration, GFP_KERNEL); ++ ++ pcfg80211_wdinfo->restore_channel = pmlmeext->cur_channel; ++ ++ rtw_cfg80211_scan_abort(padapter); ++ ++ if( remain_ch != pmlmeext->cur_channel ) ++ { ++ if(rtw_is_channel_set_contains_channel(pmlmeext->channel_set, remain_ch)) { ++ pmlmeext->cur_channel = remain_ch; ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } else { ++ DBG_871X("%s remain_ch:%u not in channel plan!!!!\n", __FUNCTION__, remain_ch); ++ } ++ } ++ ++ //if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ rtw_p2p_enable(padapter, P2P_ROLE_DEVICE); ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _TRUE; ++ } ++ else ++ { ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_LISTEN); ++ pwdinfo->listen_channel = pmlmeext->cur_channel; ++ ++ //call this after other things have been done ++ _set_timer( &pcfg80211_wdinfo->remain_on_ch_timer, duration); ++ ++exit: ++ return err; ++} ++ ++static s32 cfg80211_rtw_cancel_remain_on_channel(struct wiphy *wiphy, struct net_device *dev, ++ u64 cookie) ++{ ++ s32 err = 0; ++ _adapter *padapter = wiphy_to_adapter(wiphy); ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ printk("%s\n", __func__); ++ ++ //Modified bu Kurt 20120114 ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++ ++ #if 0 ++ // Disable P2P Listen State ++ if(!rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT) && !rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ _rtw_memset(pwdinfo, 0x00, sizeof(struct wifidirect_info)); ++ ++ if(pwrpriv->bips_processing == _FALSE){ ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ } ++ } ++ else ++ #endif ++ { ++ rtw_p2p_set_state(pwdinfo, rtw_p2p_pre_state(pwdinfo)); ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, role=%d, p2p_state=%d\n", __func__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo)); ++#endif ++ } ++ ++ return err; ++} ++ ++static void cfg80211_rtw_mgmt_frame_register(struct wiphy *wiphy, struct net_device *dev, ++ u16 frame_type, bool reg) ++{ ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s: frame_type: %x, reg: %d\n", __func__, frame_type, reg); ++#endif ++ ++ if (frame_type != (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_PROBE_REQ)) ++ return; ++ ++ return; ++} ++ ++static int rtw_cfg80211_set_beacon_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 wps_oui[8]={0x0,0x50,0xf2,0x04}; ++ u8 *p2p_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ printk("%s, ielen=%d\n", __func__, len); ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("bcn_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->wps_beacon_ie_len; ++ pmlmepriv->wps_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_beacon_ie, free_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->wps_beacon_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_beacon_ie_len = wps_ielen; ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ } ++ ++ buf += wps_ielen; ++ len -= wps_ielen; ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("bcn_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ if(pmlmepriv->p2p_beacon_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_beacon_ie_len; ++ pmlmepriv->p2p_beacon_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_beacon_ie, free_len); ++ pmlmepriv->p2p_beacon_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_beacon_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_beacon_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->p2p_beacon_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_beacon_ie_len = p2p_ielen; ++ ++ } ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_probe_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u8 *wps_ie; ++ u32 p2p_ielen = 0; ++ u8 *p2p_ie; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if(len>0) ++ { ++ if((wps_ie = rtw_get_wps_ie(buf, len, NULL, &wps_ielen))) ++ { ++ uint attr_contentlen = 0; ++ u16 uconfig_method, *puconfig_method = NULL; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("probe_resp_wps_ielen=%d\n", wps_ielen); ++ #endif ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_resp_ie_len; ++ pmlmepriv->wps_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, free_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(wps_ielen); ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ ++ //add PUSH_BUTTON config_method by driver self in wpsie of probe_resp at GO Mode ++ if ( (puconfig_method = (u16*)rtw_get_wps_attr_content( wps_ie, wps_ielen, WPS_ATTR_CONF_METHOD , NULL, &attr_contentlen)) != NULL ) ++ { ++ #ifdef CONFIG_DEBUG_CFG80211 ++ //printk("config_method in wpsie of probe_resp = 0x%x\n", be16_to_cpu(*puconfig_method)); ++ #endif ++ ++ uconfig_method = WPS_CM_PUSH_BUTTON; ++ uconfig_method = cpu_to_be16( uconfig_method ); ++ ++ *puconfig_method |= uconfig_method; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, wps_ie, wps_ielen); ++ pmlmepriv->wps_probe_resp_ie_len = wps_ielen; ++ ++ } ++ ++ buf += wps_ielen; ++ len -= wps_ielen; ++ ++ if((p2p_ie=rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen))) ++ { ++ u8 is_GO = _FALSE; ++ u32 attr_contentlen = 0; ++ u16 cap_attr=0; ++ ++ #ifdef CONFIG_DEBUG_CFG80211 ++ printk("probe_resp_p2p_ielen=%d\n", p2p_ielen); ++ #endif ++ ++ //Check P2P Capability ATTR ++ if( rtw_get_p2p_attr_content( p2p_ie, p2p_ielen, P2P_ATTR_CAPABILITY, (u8*)&cap_attr, (uint*) &attr_contentlen) ) ++ { ++ u8 grp_cap=0; ++ //DBG_8192C( "[%s] Got P2P Capability Attr!!\n", __FUNCTION__ ); ++ cap_attr = le16_to_cpu(cap_attr); ++ grp_cap = (u8)((cap_attr >> 8)&0xff); ++ ++ is_GO = (grp_cap&BIT(0)) ? _TRUE:_FALSE; ++ ++ if(is_GO) ++ printk("Got P2P Capability Attr, grp_cap=0x%x, is_GO\n", grp_cap); ++ } ++ ++ ++ if(is_GO == _FALSE) ++ { ++ if(pmlmepriv->p2p_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_probe_resp_ie_len; ++ pmlmepriv->p2p_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_probe_resp_ie, free_len); ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_probe_resp_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_probe_resp_ie_len = p2p_ielen; ++ } ++ else ++ { ++ if(pmlmepriv->p2p_go_probe_resp_ie) ++ { ++ u32 free_len = pmlmepriv->p2p_go_probe_resp_ie_len; ++ pmlmepriv->p2p_go_probe_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->p2p_go_probe_resp_ie, free_len); ++ pmlmepriv->p2p_go_probe_resp_ie = NULL; ++ } ++ ++ pmlmepriv->p2p_go_probe_resp_ie = rtw_malloc(p2p_ielen); ++ if ( pmlmepriv->p2p_go_probe_resp_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->p2p_go_probe_resp_ie, p2p_ie, p2p_ielen); ++ pmlmepriv->p2p_go_probe_resp_ie_len = p2p_ielen; ++ } ++ ++ } ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_cfg80211_set_assoc_resp_wpsp2pie(struct net_device *net, char *buf, int len) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ printk("%s, ielen=%d\n", __func__, len); ++ ++ if(len>0) ++ { ++ if(pmlmepriv->wps_assoc_resp_ie) ++ { ++ u32 free_len = pmlmepriv->wps_assoc_resp_ie_len; ++ pmlmepriv->wps_assoc_resp_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, free_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(len); ++ if ( pmlmepriv->wps_assoc_resp_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ ++ } ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, buf, len); ++ pmlmepriv->wps_assoc_resp_ie_len = len; ++ } ++ ++ return ret; ++ ++} ++ ++int rtw_cfg80211_set_mgnt_wpsp2pie(struct net_device *net, char *buf, int len, ++ int type) ++{ ++ int ret = 0; ++ uint wps_ielen = 0; ++ u32 p2p_ielen = 0; ++ ++#ifdef CONFIG_DEBUG_CFG80211 ++ printk("%s, ielen=%d\n", __func__, len); ++#endif ++ ++ if((rtw_get_wps_ie(buf, len, NULL, &wps_ielen) && (wps_ielen>0)) || ++ (rtw_get_p2p_ie(buf, len, NULL, &p2p_ielen) && (p2p_ielen>0)) ) ++ { ++ if (net != NULL) ++ { ++ switch (type) ++ { ++ case 0x1: //BEACON ++ ret = rtw_cfg80211_set_beacon_wpsp2pie(net, buf, len); ++ break; ++ case 0x2: //PROBE_RESP ++ ret = rtw_cfg80211_set_probe_resp_wpsp2pie(net, buf, len); ++ break; ++ case 0x4: //ASSOC_RESP ++ ret = rtw_cfg80211_set_assoc_resp_wpsp2pie(net, buf, len); ++ break; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static struct cfg80211_ops rtw_cfg80211_ops = { ++ .change_virtual_intf = cfg80211_rtw_change_iface, ++ .add_key = cfg80211_rtw_add_key, ++ .get_key = cfg80211_rtw_get_key, ++ .del_key = cfg80211_rtw_del_key, ++ .set_default_key = cfg80211_rtw_set_default_key, ++ .get_station = cfg80211_rtw_get_station, ++ .scan = cfg80211_rtw_scan, ++ .set_wiphy_params = cfg80211_rtw_set_wiphy_params, ++ .connect = cfg80211_rtw_connect, ++ .disconnect = cfg80211_rtw_disconnect, ++ .join_ibss = cfg80211_rtw_join_ibss, ++ .leave_ibss = cfg80211_rtw_leave_ibss, ++ .set_tx_power = cfg80211_rtw_set_txpower, ++ .get_tx_power = cfg80211_rtw_get_txpower, ++ .set_power_mgmt = cfg80211_rtw_set_power_mgmt, ++ .set_pmksa = cfg80211_rtw_set_pmksa, ++ .del_pmksa = cfg80211_rtw_del_pmksa, ++ .flush_pmksa = cfg80211_rtw_flush_pmksa, ++#ifdef CONFIG_AP_MODE ++ .add_virtual_intf = cfg80211_rtw_add_virtual_intf, ++ .del_virtual_intf = cfg80211_rtw_del_virtual_intf, ++ .add_beacon = cfg80211_rtw_add_beacon, ++ .set_beacon = cfg80211_rtw_set_beacon, ++ .del_beacon = cfg80211_rtw_del_beacon, ++ .add_station = cfg80211_rtw_add_station, ++ .del_station = cfg80211_rtw_del_station, ++ .change_station = cfg80211_rtw_change_station, ++ .dump_station = cfg80211_rtw_dump_station, ++ .change_bss = cfg80211_rtw_change_bss, ++ .set_channel = cfg80211_rtw_set_channel, ++ //.auth = cfg80211_rtw_auth, ++ //.assoc = cfg80211_rtw_assoc, ++#endif //CONFIG_AP_MODE ++ .remain_on_channel = cfg80211_rtw_remain_on_channel, ++ .cancel_remain_on_channel = cfg80211_rtw_cancel_remain_on_channel, ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ .mgmt_tx = cfg80211_rtw_mgmt_tx, ++ .mgmt_frame_register = cfg80211_rtw_mgmt_frame_register, ++#elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,34) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,35)) ++ .action = cfg80211_rtw_mgmt_tx, ++#endif ++}; ++ ++static void rtw_cfg80211_init_ht_capab(struct ieee80211_sta_ht_cap *ht_cap, enum ieee80211_band band, u8 rf_type) ++{ ++ ++#define MAX_BIT_RATE_40MHZ_MCS15 300 /* Mbps */ ++#define MAX_BIT_RATE_40MHZ_MCS7 150 /* Mbps */ ++ ++ ht_cap->ht_supported = _TRUE; ++ ++ ht_cap->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | ++ IEEE80211_HT_CAP_SGI_40 | IEEE80211_HT_CAP_SGI_20 | ++ IEEE80211_HT_CAP_DSSSCCK40 | IEEE80211_HT_CAP_MAX_AMSDU; ++ ++ /* ++ *Maximum length of AMPDU that the STA can receive. ++ *Length = 2 ^ (13 + max_ampdu_length_exp) - 1 (octets) ++ */ ++ ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K; ++ ++ /*Minimum MPDU start spacing , */ ++ ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16; ++ ++ ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; ++ ++ /* ++ *hw->wiphy->bands[IEEE80211_BAND_2GHZ] ++ *base on ant_num ++ *rx_mask: RX mask ++ *if rx_ant =1 rx_mask[0]=0xff;==>MCS0-MCS7 ++ *if rx_ant =2 rx_mask[1]=0xff;==>MCS8-MCS15 ++ *if rx_ant >=3 rx_mask[2]=0xff; ++ *if BW_40 rx_mask[4]=0x01; ++ *highest supported RX rate ++ */ ++ if(rf_type == RF_1T1R) ++ { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0x00; ++ ht_cap->mcs.rx_mask[4] = 0x01; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS7; ++ } ++ else if((rf_type == RF_1T2R) || (rf_type==RF_2T2R)) ++ { ++ ht_cap->mcs.rx_mask[0] = 0xFF; ++ ht_cap->mcs.rx_mask[1] = 0xFF; ++ ht_cap->mcs.rx_mask[4] = 0x01; ++ ++ ht_cap->mcs.rx_highest = MAX_BIT_RATE_40MHZ_MCS15; ++ } ++ else ++ { ++ printk("%s, error rf_type=%d\n", __func__, rf_type); ++ } ++ ++} ++ ++void rtw_cfg80211_init_wiphy(_adapter *padapter) ++{ ++ u8 rf_type; ++ struct ieee80211_supported_band *bands; ++ struct wireless_dev *pwdev = padapter->rtw_wdev; ++ struct wiphy *wiphy = pwdev->wiphy; ++ ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ printk("%s:rf_type=%d\n", __func__, rf_type); ++ ++ bands = wiphy->bands[IEEE80211_BAND_2GHZ]; ++ rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_2GHZ, rf_type); ++ ++ ++ bands = wiphy->bands[IEEE80211_BAND_5GHZ]; ++ rtw_cfg80211_init_ht_capab(&bands->ht_cap, IEEE80211_BAND_5GHZ, rf_type); ++} ++ ++static void rtw_cfg80211_preinit_wiphy(_adapter *padapter, struct wiphy *wiphy) ++{ ++ ++ wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM; ++ ++ wiphy->max_scan_ssids = RTW_SSID_SCAN_AMOUNT; ++ wiphy->max_scan_ie_len = RTW_SCAN_IE_LEN_MAX; ++ wiphy->max_num_pmkids = RTW_MAX_NUM_PMKIDS; ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)) ++ wiphy->max_remain_on_channel_duration = RTW_MAX_REMAIN_ON_CHANNEL_DURATION; ++#endif ++ ++ wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | ++ BIT(NL80211_IFTYPE_ADHOC) ++#ifdef CONFIG_AP_MODE ++ | BIT(NL80211_IFTYPE_AP) | BIT(NL80211_IFTYPE_MONITOR) ++#endif ++#if defined(CONFIG_P2P) && (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ | BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO) ++#endif ++ ; ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++#ifdef CONFIG_AP_MODE ++ wiphy->mgmt_stypes = rtw_cfg80211_default_mgmt_stypes; ++#endif //CONFIG_AP_MODE ++#endif ++ ++ wiphy->cipher_suites = rtw_cipher_suites; ++ wiphy->n_cipher_suites = ARRAY_SIZE(rtw_cipher_suites); ++ ++ ++ wiphy->bands[IEEE80211_BAND_2GHZ] = &rtw_band_2ghz; ++ wiphy->bands[IEEE80211_BAND_5GHZ] = &rtw_band_5ghz; ++ ++} ++ ++int rtw_wdev_alloc(_adapter *padapter, struct device *dev) ++{ ++ int ret = 0; ++ struct wireless_dev *wdev; ++ struct rtw_wdev_priv *pwdev_priv; ++ struct net_device *pnetdev = padapter->pnetdev; ++ ++ printk("%s\n", __func__); ++ ++ wdev = (struct wireless_dev *)rtw_zmalloc(sizeof(struct wireless_dev)); ++ if (!wdev) { ++ printk("Couldn't allocate wireless device\n"); ++ return (-ENOMEM); ++ } ++ ++ wdev->wiphy = wiphy_new(&rtw_cfg80211_ops, sizeof(struct rtw_wdev_priv)); ++ if (!wdev->wiphy) { ++ printk("Couldn't allocate wiphy device\n"); ++ ret = -ENOMEM; ++ goto out_err_new; ++ } ++ ++ set_wiphy_dev(wdev->wiphy, dev); ++ ++ // ++ padapter->rtw_wdev = wdev; ++ pnetdev->ieee80211_ptr = wdev; ++ ++ //init pwdev_priv ++ pwdev_priv = wdev_to_priv(wdev); ++ pwdev_priv->pmon_ndev = NULL; ++ pwdev_priv->ifname_mon[0] = '\0'; ++ pwdev_priv->rtw_wdev = wdev; ++ pwdev_priv->padapter = padapter; ++ pwdev_priv->scan_request = NULL; ++ _rtw_spinlock_init(&pwdev_priv->scan_req_lock); ++ ++ pwdev_priv->p2p_enabled = _FALSE; ++ pwdev_priv->provdisc_req_issued = _FALSE; ++ ++ wdev->netdev = pnetdev; ++ wdev->iftype = NL80211_IFTYPE_MONITOR; ++ ++ rtw_cfg80211_preinit_wiphy(padapter, wdev->wiphy); ++ ++ ret = wiphy_register(wdev->wiphy); ++ if (ret < 0) { ++ printk("Couldn't register wiphy device\n"); ++ goto out_err_register; ++ } ++ ++ SET_NETDEV_DEV(pnetdev, wiphy_dev(wdev->wiphy)); ++ ++ return ret; ++ ++ out_err_register: ++ wiphy_free(wdev->wiphy); ++ ++ out_err_new: ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++ ++ return ret; ++ ++} ++ ++void rtw_wdev_free(struct wireless_dev *wdev) ++{ ++ struct rtw_wdev_priv *pwdev_priv; ++ ++ printk("%s\n", __func__); ++ ++ if (!wdev) ++ return; ++ ++ pwdev_priv = wdev_to_priv(wdev); ++ ++ printk("%s, scan abort when device remove\n", __func__); ++ rtw_cfg80211_indicate_scan_done(pwdev_priv, _TRUE); ++ ++ if(pwdev_priv->pmon_ndev) ++ { ++ printk("%s, unregister monitor interface\n", __func__); ++ ++ unregister_netdev(pwdev_priv->pmon_ndev); ++ ++ free_netdev(pwdev_priv->pmon_ndev); ++ } ++ ++ ++ wiphy_unregister(wdev->wiphy); ++ wiphy_free(wdev->wiphy); ++ ++ rtw_mfree((u8*)wdev, sizeof(struct wireless_dev)); ++} ++ ++#endif //CONFIG_IOCTL_CFG80211 ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/ioctl_linux.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,9325 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _IOCTL_LINUX_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++//#ifdef CONFIG_MP_INCLUDED ++#include ++//#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif //CONFIG_USB_HCI ++#include ++ ++#ifdef CONFIG_MP_INCLUDED ++#include ++#endif ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27)) ++#define iwe_stream_add_event(a, b, c, d, e) iwe_stream_add_event(b, c, d, e) ++#define iwe_stream_add_point(a, b, c, d, e) iwe_stream_add_point(b, c, d, e) ++#endif ++ ++ ++#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30 ++ ++#define SCAN_ITEM_SIZE 768 ++#define MAX_CUSTOM_LEN 64 ++#define RATE_COUNT 4 ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++extern int ui_pid[3]; ++#endif ++ ++// combo scan ++#define WEXT_CSCAN_AMOUNT 9 ++#define WEXT_CSCAN_BUF_LEN 360 ++#define WEXT_CSCAN_HEADER "CSCAN S\x01\x00\x00S\x00" ++#define WEXT_CSCAN_HEADER_SIZE 12 ++#define WEXT_CSCAN_SSID_SECTION 'S' ++#define WEXT_CSCAN_CHANNEL_SECTION 'C' ++#define WEXT_CSCAN_NPROBE_SECTION 'N' ++#define WEXT_CSCAN_ACTV_DWELL_SECTION 'A' ++#define WEXT_CSCAN_PASV_DWELL_SECTION 'P' ++#define WEXT_CSCAN_HOME_DWELL_SECTION 'H' ++#define WEXT_CSCAN_TYPE_SECTION 'T' ++ ++ ++extern u8 key_2char2num(u8 hch, u8 lch); ++extern u8 str_2char2num(u8 hch, u8 lch); ++ ++int rfpwrstate_check(_adapter *padapter); ++ ++u32 rtw_rates[] = {1000000,2000000,5500000,11000000, ++ 6000000,9000000,12000000,18000000,24000000,36000000,48000000,54000000}; ++ ++static const char * const iw_operation_mode[] = ++{ ++ "Auto", "Ad-Hoc", "Managed", "Master", "Repeater", "Secondary", "Monitor" ++}; ++ ++static int hex2num_i(char c) ++{ ++ if (c >= '0' && c <= '9') ++ return c - '0'; ++ if (c >= 'a' && c <= 'f') ++ return c - 'a' + 10; ++ if (c >= 'A' && c <= 'F') ++ return c - 'A' + 10; ++ return -1; ++} ++ ++static int hex2byte_i(const char *hex) ++{ ++ int a, b; ++ a = hex2num_i(*hex++); ++ if (a < 0) ++ return -1; ++ b = hex2num_i(*hex++); ++ if (b < 0) ++ return -1; ++ return (a << 4) | b; ++} ++ ++/** ++ * hwaddr_aton - Convert ASCII string to MAC address ++ * @txt: MAC address as a string (e.g., "00:11:22:33:44:55") ++ * @addr: Buffer for the MAC address (ETH_ALEN = 6 bytes) ++ * Returns: 0 on success, -1 on failure (e.g., string not a MAC address) ++ */ ++static int hwaddr_aton_i(const char *txt, u8 *addr) ++{ ++ int i; ++ ++ for (i = 0; i < 6; i++) { ++ int a, b; ++ ++ a = hex2num_i(*txt++); ++ if (a < 0) ++ return -1; ++ b = hex2num_i(*txt++); ++ if (b < 0) ++ return -1; ++ *addr++ = (a << 4) | b; ++ if (i < 5 && *txt++ != ':') ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static void indicate_wx_custom_event(_adapter *padapter, char *msg) ++{ ++ u8 *buff, *p; ++ union iwreq_data wrqu; ++ ++ if (strlen(msg) > IW_CUSTOM_MAX) { ++ DBG_871X("%s strlen(msg):%u > IW_CUSTOM_MAX:%u\n", __FUNCTION__ ,strlen(msg), IW_CUSTOM_MAX); ++ return; ++ } ++ ++ buff = rtw_zmalloc(IW_CUSTOM_MAX+1); ++ if(!buff) ++ return; ++ ++ _rtw_memcpy(buff, msg, strlen(msg)); ++ ++ _rtw_memset(&wrqu,0,sizeof(wrqu)); ++ wrqu.data.length = strlen(msg); ++ ++ DBG_8192C("%s %s\n", __FUNCTION__, buff); ++ wireless_send_event(padapter->pnetdev, IWEVCUSTOM, &wrqu, buff); ++ ++ rtw_mfree(buff, IW_CUSTOM_MAX+1); ++ ++} ++ ++ ++static void request_wps_pbc_event(_adapter *padapter) ++{ ++ u8 *buff, *p; ++ union iwreq_data wrqu; ++ ++ ++ buff = rtw_malloc(IW_CUSTOM_MAX); ++ if(!buff) ++ return; ++ ++ _rtw_memset(buff, 0, IW_CUSTOM_MAX); ++ ++ p=buff; ++ ++ p+=sprintf(p, "WPS_PBC_START.request=TRUE"); ++ ++ _rtw_memset(&wrqu,0,sizeof(wrqu)); ++ ++ wrqu.data.length = p-buff; ++ ++ wrqu.data.length = (wrqu.data.lengthpnetdev, IWEVCUSTOM, &wrqu, buff); ++ ++ if(buff) ++ { ++ rtw_mfree(buff, IW_CUSTOM_MAX); ++ } ++ ++} ++ ++ ++void indicate_wx_scan_complete_event(_adapter *padapter) ++{ ++ union iwreq_data wrqu; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ //DBG_8192C("+rtw_indicate_wx_scan_complete_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWSCAN, &wrqu, NULL); ++} ++ ++ ++void rtw_indicate_wx_assoc_event(_adapter *padapter) ++{ ++ union iwreq_data wrqu; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ wrqu.ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.ap_addr.sa_data, pmlmepriv->cur_network.network.MacAddress, ETH_ALEN); ++ ++ //DBG_8192C("+rtw_indicate_wx_assoc_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); ++} ++ ++void rtw_indicate_wx_disassoc_event(_adapter *padapter) ++{ ++ union iwreq_data wrqu; ++ ++ _rtw_memset(&wrqu, 0, sizeof(union iwreq_data)); ++ ++ wrqu.ap_addr.sa_family = ARPHRD_ETHER; ++ _rtw_memset(wrqu.ap_addr.sa_data, 0, ETH_ALEN); ++ ++ //DBG_8192C("+rtw_indicate_wx_disassoc_event\n"); ++ wireless_send_event(padapter->pnetdev, SIOCGIWAP, &wrqu, NULL); ++} ++ ++/* ++uint rtw_is_cckrates_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) == 2) || (((rate[i]) & 0x7f) == 4) || ++ (((rate[i]) & 0x7f) == 11) || (((rate[i]) & 0x7f) == 22) ) ++ return _TRUE; ++ i++; ++ } ++ ++ return _FALSE; ++} ++ ++uint rtw_is_cckratesonly_included(u8 *rate) ++{ ++ u32 i = 0; ++ ++ while(rate[i]!=0) ++ { ++ if ( (((rate[i]) & 0x7f) != 2) && (((rate[i]) & 0x7f) != 4) && ++ (((rate[i]) & 0x7f) != 11) && (((rate[i]) & 0x7f) != 22) ) ++ return _FALSE; ++ i++; ++ } ++ ++ return _TRUE; ++} ++*/ ++ ++static char *translate_scan(_adapter *padapter, ++ struct iw_request_info* info, struct wlan_network *pnetwork, ++ char *start, char *stop) ++{ ++ struct iw_event iwe; ++ u16 cap; ++ u32 ht_ielen = 0; ++ char custom[MAX_CUSTOM_LEN]; ++ char *p; ++ u16 max_rate=0, rate, ht_cap=_FALSE; ++ u32 i = 0; ++ char *current_val; ++ long rssi; ++ u8 bw_40MHz=0, short_GI=0; ++ u16 mcs_rate=0; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ u32 blnGotP2PIE = _FALSE; ++ ++ // User is doing the P2P device discovery ++ // The prefix of SSID should be "DIRECT-" and the IE should contains the P2P IE. ++ // If not, the driver should ignore this AP and go to the next AP. ++ ++ // Verifying the SSID ++ if ( _rtw_memcmp( pnetwork->network.Ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ) ) ++ { ++ u32 p2pielen = 0; ++ ++ // Verifying the P2P IE ++ if ( rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen) ) ++ { ++ blnGotP2PIE = _TRUE; ++ } ++ ++ } ++ ++ if ( blnGotP2PIE == _FALSE ) ++ { ++ return start; ++ } ++ ++ } ++ ++#endif //CONFIG_P2P ++ ++ /* AP MAC address */ ++ iwe.cmd = SIOCGIWAP; ++ iwe.u.ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(iwe.u.ap_addr.sa_data, pnetwork->network.MacAddress, ETH_ALEN); ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_ADDR_LEN); ++ ++ /* Add the ESSID */ ++ iwe.cmd = SIOCGIWESSID; ++ iwe.u.data.flags = 1; ++ iwe.u.data.length = min((u16)pnetwork->network.Ssid.SsidLength, (u16)32); ++ start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); ++ ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(&pnetwork->network.IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pnetwork->network.IELength-12); ++ ++ if(p && ht_ielen>0) ++ { ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ ht_cap = _TRUE; ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); ++ bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; ++ short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; ++ } ++ ++ /* Add the protocol name */ ++ iwe.cmd = SIOCGIWNAME; ++ if ((rtw_is_cckratesonly_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11b"); ++ } ++ else if ((rtw_is_cckrates_included((u8*)&pnetwork->network.SupportedRates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bgn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11bg"); ++ } ++ else ++ { ++ if(pnetwork->network.Configuration.DSConfig > 14) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11an"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11a"); ++ } ++ else ++ { ++ if(ht_cap == _TRUE) ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11gn"); ++ else ++ snprintf(iwe.u.name, IFNAMSIZ, "IEEE 802.11g"); ++ } ++ } ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_CHAR_LEN); ++ ++ /* Add mode */ ++ iwe.cmd = SIOCGIWMODE; ++ _rtw_memcpy((u8 *)&cap, rtw_get_capability_from_ie(pnetwork->network.IEs), 2); ++ ++ ++ cap = le16_to_cpu(cap); ++ ++ if(cap & (WLAN_CAPABILITY_IBSS |WLAN_CAPABILITY_BSS)){ ++ if (cap & WLAN_CAPABILITY_BSS) ++ iwe.u.mode = IW_MODE_MASTER; ++ else ++ iwe.u.mode = IW_MODE_ADHOC; ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_UINT_LEN); ++ } ++ ++ if(pnetwork->network.Configuration.DSConfig<1 /*|| pnetwork->network.Configuration.DSConfig>14*/) ++ pnetwork->network.Configuration.DSConfig = 1; ++ ++ /* Add frequency/channel */ ++ iwe.cmd = SIOCGIWFREQ; ++ iwe.u.freq.m = rtw_ch2freq(pnetwork->network.Configuration.DSConfig) * 100000; ++ iwe.u.freq.e = 1; ++ iwe.u.freq.i = pnetwork->network.Configuration.DSConfig; ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_FREQ_LEN); ++ ++ /* Add encryption capability */ ++ iwe.cmd = SIOCGIWENCODE; ++ if (cap & WLAN_CAPABILITY_PRIVACY) ++ iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; ++ else ++ iwe.u.data.flags = IW_ENCODE_DISABLED; ++ iwe.u.data.length = 0; ++ start = iwe_stream_add_point(info, start, stop, &iwe, pnetwork->network.Ssid.Ssid); ++ ++ /*Add basic and extended rates */ ++ max_rate = 0; ++ p = custom; ++ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), " Rates (Mb/s): "); ++ while(pnetwork->network.SupportedRates[i]!=0) ++ { ++ rate = pnetwork->network.SupportedRates[i]&0x7F; ++ if (rate > max_rate) ++ max_rate = rate; ++ p += snprintf(p, MAX_CUSTOM_LEN - (p - custom), ++ "%d%s ", rate >> 1, (rate & 1) ? ".5" : ""); ++ i++; ++ } ++ ++ if(ht_cap == _TRUE) ++ { ++ if(mcs_rate&0x8000)//MCS15 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); ++ ++ } ++ else if(mcs_rate&0x0080)//MCS7 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++ else//default MCS7 ++ { ++ DBG_8192C("wx_get_scan, mcs_rate_bitmap=0x%x\n", mcs_rate); ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++ ++ max_rate = max_rate*2;//Mbps/2; ++ } ++ ++ iwe.cmd = SIOCGIWRATE; ++ iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0; ++ iwe.u.bitrate.value = max_rate * 500000; ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_PARAM_LEN); ++ ++ //parsing WPA/WPA2 IE ++ { ++ u8 buf[MAX_WPA_IE_LEN]; ++ u8 wpa_ie[255],rsn_ie[255]; ++ u16 wpa_len=0,rsn_len=0; ++ u8 *p; ++ sint out_len=0; ++ out_len=rtw_get_sec_ie(pnetwork->network.IEs ,pnetwork->network.IELength,rsn_ie,&rsn_len,wpa_ie,&wpa_len); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: ssid=%s\n",pnetwork->network.Ssid.Ssid)); ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan: wpa_len=%d rsn_len=%d\n",wpa_len,rsn_len)); ++ ++ if (wpa_len > 0) ++ { ++ p=buf; ++ _rtw_memset(buf, 0, MAX_WPA_IE_LEN); ++ p += sprintf(p, "wpa_ie="); ++ for (i = 0; i < wpa_len; i++) { ++ p += sprintf(p, "%02x", wpa_ie[i]); ++ } ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = strlen(buf); ++ start = iwe_stream_add_point(info, start, stop, &iwe,buf); ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = wpa_len; ++ start = iwe_stream_add_point(info, start, stop, &iwe, wpa_ie); ++ } ++ if (rsn_len > 0) ++ { ++ p = buf; ++ _rtw_memset(buf, 0, MAX_WPA_IE_LEN); ++ p += sprintf(p, "rsn_ie="); ++ for (i = 0; i < rsn_len; i++) { ++ p += sprintf(p, "%02x", rsn_ie[i]); ++ } ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd = IWEVCUSTOM; ++ iwe.u.data.length = strlen(buf); ++ start = iwe_stream_add_point(info, start, stop, &iwe,buf); ++ ++ _rtw_memset(&iwe, 0, sizeof(iwe)); ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = rsn_len; ++ start = iwe_stream_add_point(info, start, stop, &iwe, rsn_ie); ++ } ++ } ++ ++ { //parsing WPS IE ++ int cnt = 0,total_ielen=0; ++ u8 *wpsie_ptr=NULL; ++ uint wps_ielen = 0; ++ ++ u8 *ie_ptr = pnetwork->network.IEs +_FIXED_IE_LENGTH_; ++ total_ielen= pnetwork->network.IELength - _FIXED_IE_LENGTH_; ++ if((ie_ptr) && (total_ielen>0)) ++ { ++ while(cnt < total_ielen) ++ { ++ if(rtw_is_wps_ie(&ie_ptr[cnt], &wps_ielen) && (wps_ielen>2)) ++ { ++ wpsie_ptr = &ie_ptr[cnt]; ++ iwe.cmd =IWEVGENIE; ++ iwe.u.data.length = (u16)wps_ielen; ++ start = iwe_stream_add_point(info, start, stop, &iwe, wpsie_ptr); ++ } ++ cnt+=ie_ptr[cnt+1]+2; //goto next ++ } ++ } ++ } ++ ++ /* Add quality statistics */ ++ iwe.cmd = IWEVQUAL; ++ rssi = pnetwork->network.Rssi;//dBM ++ ++#ifdef CONFIG_RTL8711 ++ rssi = (rssi*2) + 190; ++ if(rssi>100) rssi = 100; ++ if(rssi<0) rssi = 0; ++#endif ++ ++ //DBG_8192C("RSSI=0x%X%%\n", rssi); ++ ++ // we only update signal_level (signal strength) that is rssi. ++ iwe.u.qual.updated = IW_QUAL_QUAL_UPDATED | IW_QUAL_LEVEL_UPDATED | IW_QUAL_NOISE_INVALID ++#ifdef CONFIG_PLATFORM_MT53XX ++ ; ++ iwe.u.qual.level = (u8)pnetwork->network.PhyInfo.SignalStrength;//% ++#else ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ | IW_QUAL_DBM ++ #endif ++ ; ++ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ iwe.u.qual.level = (u8) translate_percentage_to_dbm(pnetwork->network.PhyInfo.SignalStrength);//dbm ++ #else ++ iwe.u.qual.level = (u8)pnetwork->network.PhyInfo.SignalStrength;//% ++ #endif ++#endif ++ iwe.u.qual.qual = (u8)pnetwork->network.PhyInfo.SignalQuality; // signal quality ++ ++ #ifdef CONFIG_PLATFORM_ROCKCHIPS ++ iwe.u.qual.noise = -100; // noise level suggest by zhf@rockchips ++ #else ++ iwe.u.qual.noise = 0; // noise level ++ #endif //CONFIG_PLATFORM_ROCKCHIPS ++ ++ //DBG_8192C("iqual=%d, ilevel=%d, inoise=%d, iupdated=%d\n", iwe.u.qual.qual, iwe.u.qual.level , iwe.u.qual.noise, iwe.u.qual.updated); ++ ++ start = iwe_stream_add_event(info, start, stop, &iwe, IW_EV_QUAL_LEN); ++ ++ //how to translate rssi to ?% ++ //rssi = (iwe.u.qual.level*2) + 190; ++ //if(rssi>100) rssi = 100; ++ //if(rssi<0) rssi = 0; ++ ++ return start; ++} ++ ++static int wpa_set_auth_algs(struct net_device *dev, u32 value) ++{ ++ _adapter *padapter = (_adapter *) rtw_netdev_priv(dev); ++ int ret = 0; ++ ++ if ((value & AUTH_ALG_SHARED_KEY)&&(value & AUTH_ALG_OPEN_SYSTEM)) ++ { ++ DBG_8192C("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY and AUTH_ALG_OPEN_SYSTEM [value:0x%x]\n",value); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++ } ++ else if (value & AUTH_ALG_SHARED_KEY) ++ { ++ DBG_8192C("wpa_set_auth_algs, AUTH_ALG_SHARED_KEY [value:0x%x]\n",value); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeShared; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Shared; ++#endif ++ } ++ else if(value & AUTH_ALG_OPEN_SYSTEM) ++ { ++ DBG_8192C("wpa_set_auth_algs, AUTH_ALG_OPEN_SYSTEM\n"); ++ //padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ if(padapter->securitypriv.ndisauthtype < Ndis802_11AuthModeWPAPSK) ++ { ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeAutoSwitch; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open; ++#endif ++ } ++ ++ } ++ else if(value & AUTH_ALG_LEAP) ++ { ++ DBG_8192C("wpa_set_auth_algs, AUTH_ALG_LEAP\n"); ++ } ++ else ++ { ++ DBG_8192C("wpa_set_auth_algs, error!\n"); ++ ret = -EINVAL; ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++_func_enter_; ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ if (param_len < (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("wpa_set_encryption, crypt.alg = WEP\n")); ++ DBG_8192C("wpa_set_encryption, crypt.alg = WEP\n"); ++ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(1)wep_key_idx=%d\n", wep_key_idx)); ++ DBG_8192C("(1)wep_key_idx=%d\n", wep_key_idx); ++ ++ if (wep_key_idx > WEP_KEYS) ++ return -EINVAL; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("(2)wep_key_idx=%d\n", wep_key_idx)); ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *) rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,(" wpa_set_encryption: pwep allocate fail !!!\n")); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ if(wep_key_len==13) ++ { ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ } ++ } ++ else { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ pwep->KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_8192C("wep, set_tx=1\n"); ++ ++ if(rtw_set_802_11_add_wep(padapter, pwep) == (u8)_FAIL) ++ { ++ ret = -EOPNOTSUPP ; ++ } ++ } ++ else ++ { ++ DBG_8192C("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to fw/cam ++ ++ if (wep_key_idx >= WEP_KEYS) { ++ ret = -EOPNOTSUPP ; ++ goto exit; ++ } ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ rtw_set_key(padapter, psecuritypriv, wep_key_idx, 0); ++ } ++ ++ goto exit; ++ } ++ ++ if(padapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X) // 802_1x ++ { ++ struct sta_info * psta,*pbcmc_sta; ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE | WIFI_MP_STATE) == _TRUE) //sta mode ++ { ++ psta = rtw_get_stainfo(pstapriv, get_bssid(pmlmepriv)); ++ if (psta == NULL) { ++ //DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ psta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ psta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ ++ if(param->u.crypt.set_tx ==1)//pairwise key ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "TKIP") == 0)//set mic key ++ { ++ //DEBUG_ERR(("\nset key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ padapter->securitypriv.busetkipkey=_FALSE; ++ //_set_timer(&padapter->securitypriv.tkip_timer, 50); ++ } ++ ++ //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n",param->u.crypt.key_len)); ++ //DEBUG_ERR(("\n ~~~~stastakey:unicastkey\n")); ++ DBG_871X("\n ~~~~stastakey:unicastkey\n"); ++ ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ else//group key ++ { ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key,(param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrptxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[16]),8); ++ _rtw_memcpy(padapter->securitypriv.dot118021XGrprxmickey[param->u.crypt.idx].skey,&(param->u.crypt.key[24]),8); ++ padapter->securitypriv.binstallGrpkey = _TRUE; ++ //DEBUG_ERR(("\n param->u.crypt.key_len=%d\n", param->u.crypt.key_len)); ++ //DEBUG_ERR(("\n ~~~~stastakey:groupkey\n")); ++ DBG_871X("\n ~~~~stastakey:groupkey\n"); ++ ++ padapter->securitypriv.dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ rtw_set_key(padapter,&padapter->securitypriv,param->u.crypt.idx, 1); ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_PROVISIONING_ING)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_DONE); ++ } ++#endif //CONFIG_P2P ++ ++ } ++ } ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta==NULL) ++ { ++ //DEBUG_ERR( ("Set OID_802_11_ADD_KEY: bcmc stainfo is null \n")); ++ } ++ else ++ { ++ //Jeff: don't disable ieee8021x_blocked while clearing key ++ if (strcmp(param->u.crypt.alg, "none") != 0) ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ ++ if((padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption2Enabled)|| ++ (padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption3Enabled)) ++ { ++ pbcmc_sta->dot118021XPrivacy = padapter->securitypriv.dot11PrivacyAlgrthm; ++ } ++ } ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE)) //adhoc mode ++ { ++ } ++ } ++ ++exit: ++ ++ if (pwep) { ++ rtw_mfree((u8 *)pwep,wep_total_len); ++ } ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_set_wpa_ie(_adapter *padapter, char *pie, unsigned short ielen) ++{ ++ u8 *buf=NULL, *pos=NULL; ++ u32 left; ++ int group_cipher = 0, pairwise_cipher = 0; ++ int ret = 0; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ ++ if((ielen > MAX_WPA_IE_LEN) || (pie == NULL)){ ++ padapter->securitypriv.wps_phase = _FALSE; ++ if(pie == NULL) ++ return ret; ++ else ++ return -EINVAL; ++ } ++ ++ if(ielen) ++ { ++ buf = rtw_zmalloc(ielen); ++ if (buf == NULL){ ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ _rtw_memcpy(buf, pie , ielen); ++ ++ //dump ++ { ++ int i; ++ DBG_8192C("\n wpa_ie(length:%d):\n", ielen); ++ for(i=0;i= RSN_SELECTOR_LEN){ ++ pos += RSN_SELECTOR_LEN; ++ left -= RSN_SELECTOR_LEN; ++ } ++ else if (left > 0){ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("Ie length mismatch, %u too much \n", left)); ++ ret =-1; ++ goto exit; ++ } ++#endif ++ ++ if(rtw_parse_wpa_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPAPSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); ++ } ++ ++ if(rtw_parse_wpa2_ie(buf, ielen, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeWPA2PSK; ++ _rtw_memcpy(padapter->securitypriv.supplicant_ie, &buf[0], ielen); ++ } ++ ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot118021XGrpPrivacy=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.ndisencryptstatus=Ndis802_11EncryptionDisabled; ++ break; ++ case WPA_CIPHER_WEP40: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ case WPA_CIPHER_TKIP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_TKIP_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case WPA_CIPHER_CCMP: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_AES_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ case WPA_CIPHER_WEP104: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ break; ++ } ++ ++ padapter->securitypriv.wps_phase = _FALSE; ++ {//set wps_ie ++ u16 cnt = 0; ++ u8 eid, wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ while( cnt < ielen ) ++ { ++ eid = buf[cnt]; ++ ++ if((eid==_VENDOR_SPECIFIC_IE_)&&(_rtw_memcmp(&buf[cnt+2], wps_oui, 4)==_TRUE)) ++ { ++ DBG_8192C("SET WPS_IE\n"); ++ ++ padapter->securitypriv.wps_ie_len = ( (buf[cnt+1]+2) < (MAX_WPA_IE_LEN<<2)) ? (buf[cnt+1]+2):(MAX_WPA_IE_LEN<<2); ++ ++ _rtw_memcpy(padapter->securitypriv.wps_ie, &buf[cnt], padapter->securitypriv.wps_ie_len); ++ ++ padapter->securitypriv.wps_phase = _TRUE; ++ ++#ifdef CONFIG_P2P ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_GONEGO_OK)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_PROVISIONING_ING); ++ } ++#endif //CONFIG_P2P ++ DBG_8192C("SET WPS_IE, wps_phase==_TRUE\n"); ++ ++ cnt += buf[cnt+1]+2; ++ ++ break; ++ } else { ++ cnt += buf[cnt+1]+2; //goto next ++ } ++ } ++ } ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_set_wpa_ie: pairwise_cipher=0x%08x padapter->securitypriv.ndisencryptstatus=%d padapter->securitypriv.ndisauthtype=%d\n", ++ pairwise_cipher, padapter->securitypriv.ndisencryptstatus, padapter->securitypriv.ndisauthtype)); ++ ++exit: ++ ++ if (buf) rtw_mfree(buf, ielen); ++ ++ return ret; ++} ++ ++static int rtw_wx_get_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 cap; ++ u32 ht_ielen = 0; ++ char *p; ++ u8 ht_cap=_FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ NDIS_802_11_RATES_EX* prates = NULL; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("cmd_code=%x\n", info->cmd)); ++ ++ _func_enter_; ++ ++ if (check_fwstate(pmlmepriv, _FW_LINKED|WIFI_ADHOC_MASTER_STATE) == _TRUE) ++ { ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12); ++ if(p && ht_ielen>0) ++ { ++ ht_cap = _TRUE; ++ } ++ ++ prates = &pcur_bss->SupportedRates; ++ ++ if (rtw_is_cckratesonly_included((u8*)prates) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11b"); ++ } ++ else if ((rtw_is_cckrates_included((u8*)prates)) == _TRUE) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bgn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11bg"); ++ } ++ else ++ { ++ if(pcur_bss->Configuration.DSConfig > 14) ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11an"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11a"); ++ } ++ else ++ { ++ if(ht_cap == _TRUE) ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11gn"); ++ else ++ snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); ++ } ++ } ++ } ++ else ++ { ++ //prates = &padapter->registrypriv.dev_network.SupportedRates; ++ //snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11g"); ++ snprintf(wrqu->name, IFNAMSIZ, "unassociated"); ++ } ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_freq(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_notice_, ("+rtw_wx_set_freq\n")); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_get_freq(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ //wrqu->freq.m = ieee80211_wlan_frequencies[pcur_bss->Configuration.DSConfig-1] * 100000; ++ wrqu->freq.m = rtw_ch2freq(pcur_bss->Configuration.DSConfig) * 100000; ++ wrqu->freq.e = 1; ++ wrqu->freq.i = pcur_bss->Configuration.DSConfig; ++ ++ } ++ else{ ++ wrqu->freq.m = rtw_ch2freq(padapter->mlmeextpriv.cur_channel) * 100000; ++ wrqu->freq.e = 1; ++ wrqu->freq.i = padapter->mlmeextpriv.cur_channel; ++ } ++ ++ return 0; ++} ++ ++static int rtw_wx_set_mode(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ NDIS_802_11_NETWORK_INFRASTRUCTURE networkType ; ++ int ret = 0; ++ ++ _func_enter_; ++ ++ if(_FAIL == rfpwrstate_check(padapter)) { ++ ret= -EPERM; ++ goto exit; ++ } ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -EPERM; ++ goto exit; ++ } ++ ++ switch(wrqu->mode) ++ { ++ case IW_MODE_AUTO: ++ networkType = Ndis802_11AutoUnknown; ++ DBG_8192C("set_mode = IW_MODE_AUTO\n"); ++ break; ++ case IW_MODE_ADHOC: ++ networkType = Ndis802_11IBSS; ++ DBG_8192C("set_mode = IW_MODE_ADHOC\n"); ++ break; ++ case IW_MODE_MASTER: ++ networkType = Ndis802_11APMode; ++ DBG_8192C("set_mode = IW_MODE_MASTER\n"); ++ //rtw_setopmode_cmd(padapter, networkType); ++ break; ++ case IW_MODE_INFRA: ++ networkType = Ndis802_11Infrastructure; ++ DBG_8192C("set_mode = IW_MODE_INFRA\n"); ++ break; ++ ++ default : ++ ret = -EINVAL;; ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("\n Mode: %s is not supported \n", iw_operation_mode[wrqu->mode])); ++ goto exit; ++ } ++ ++/* ++ if(Ndis802_11APMode == networkType) ++ { ++ rtw_setopmode_cmd(padapter, networkType); ++ } ++ else ++ { ++ rtw_setopmode_cmd(padapter, Ndis802_11AutoUnknown); ++ } ++*/ ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, networkType) ==_FALSE){ ++ ++ ret = -EPERM; ++ goto exit; ++ ++ } ++ ++ rtw_setopmode_cmd(padapter, networkType); ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_mode(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_mode \n")); ++ ++ _func_enter_; ++ ++ if (check_fwstate(pmlmepriv, WIFI_STATION_STATE) == _TRUE) ++ { ++ wrqu->mode = IW_MODE_INFRA; ++ } ++ else if ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)) ++ ++ { ++ wrqu->mode = IW_MODE_ADHOC; ++ } ++ else if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ wrqu->mode = IW_MODE_MASTER; ++ } ++ else ++ { ++ wrqu->mode = IW_MODE_AUTO; ++ } ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++ ++static int rtw_wx_set_pmkid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 j,blInserted = _FALSE; ++ int intReturn = _FALSE; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct iw_pmksa* pPMK = ( struct iw_pmksa* ) extra; ++ u8 strZeroMacAddress[ ETH_ALEN ] = { 0x00 }; ++ u8 strIssueBssid[ ETH_ALEN ] = { 0x00 }; ++ ++/* ++ struct iw_pmksa ++ { ++ __u32 cmd; ++ struct sockaddr bssid; ++ __u8 pmkid[IW_PMKID_LEN]; //IW_PMKID_LEN=16 ++ } ++ There are the BSSID information in the bssid.sa_data array. ++ If cmd is IW_PMKSA_FLUSH, it means the wpa_suppplicant wants to clear all the PMKID information. ++ If cmd is IW_PMKSA_ADD, it means the wpa_supplicant wants to add a PMKID/BSSID to driver. ++ If cmd is IW_PMKSA_REMOVE, it means the wpa_supplicant wants to remove a PMKID/BSSID from driver. ++ */ ++ ++ _rtw_memcpy( strIssueBssid, pPMK->bssid.sa_data, ETH_ALEN); ++ if ( pPMK->cmd == IW_PMKSA_ADD ) ++ { ++ DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_ADD!\n" ); ++ if ( _rtw_memcmp( strIssueBssid, strZeroMacAddress, ETH_ALEN ) == _TRUE ) ++ { ++ return( intReturn ); ++ } ++ else ++ { ++ intReturn = _TRUE; ++ } ++ blInserted = _FALSE; ++ ++ //overwrite PMKID ++ for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => rewrite with new PMKID. ++ ++ DBG_8192C( "[rtw_wx_set_pmkid] BSSID exists in the PMKList.\n" ); ++ ++ _rtw_memcpy( psecuritypriv->PMKIDList[j].PMKID, pPMK->pmkid, IW_PMKID_LEN); ++ psecuritypriv->PMKIDList[ j ].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex = j+1; ++ blInserted = _TRUE; ++ break; ++ } ++ } ++ ++ if(!blInserted) ++ { ++ // Find a new entry ++ DBG_8192C( "[rtw_wx_set_pmkid] Use the new entry index = %d for this PMKID.\n", ++ psecuritypriv->PMKIDIndex ); ++ ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].Bssid, strIssueBssid, ETH_ALEN); ++ _rtw_memcpy(psecuritypriv->PMKIDList[psecuritypriv->PMKIDIndex].PMKID, pPMK->pmkid, IW_PMKID_LEN); ++ ++ psecuritypriv->PMKIDList[ psecuritypriv->PMKIDIndex ].bUsed = _TRUE; ++ psecuritypriv->PMKIDIndex++ ; ++ if(psecuritypriv->PMKIDIndex==16) ++ { ++ psecuritypriv->PMKIDIndex =0; ++ } ++ } ++ } ++ else if ( pPMK->cmd == IW_PMKSA_REMOVE ) ++ { ++ DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_REMOVE!\n" ); ++ intReturn = _TRUE; ++ for(j=0 ; jPMKIDList[j].Bssid, strIssueBssid, ETH_ALEN) ==_TRUE ) ++ { // BSSID is matched, the same AP => Remove this PMKID information and reset it. ++ _rtw_memset( psecuritypriv->PMKIDList[ j ].Bssid, 0x00, ETH_ALEN ); ++ psecuritypriv->PMKIDList[ j ].bUsed = _FALSE; ++ break; ++ } ++ } ++ } ++ else if ( pPMK->cmd == IW_PMKSA_FLUSH ) ++ { ++ DBG_8192C( "[rtw_wx_set_pmkid] IW_PMKSA_FLUSH!\n" ); ++ _rtw_memset( &psecuritypriv->PMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ psecuritypriv->PMKIDIndex = 0; ++ intReturn = _TRUE; ++ } ++ return( intReturn ); ++} ++ ++static int rtw_wx_get_sens(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ #ifdef CONFIG_PLATFORM_ROCKCHIPS ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ /* ++ * 20110311 Commented by Jeff ++ * For rockchip platform's wpa_driver_wext_get_rssi ++ */ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ //wrqu->sens.value=-padapter->recvpriv.signal_strength; ++ wrqu->sens.value=-padapter->recvpriv.rssi; ++ //DBG_871X("%s: %d\n", __FUNCTION__, wrqu->sens.value); ++ wrqu->sens.fixed = 0; /* no auto select */ ++ } else ++ #endif ++ { ++ wrqu->sens.value = 0; ++ wrqu->sens.fixed = 0; /* no auto select */ ++ wrqu->sens.disabled = 1; ++ } ++ return 0; ++} ++ ++static int rtw_wx_get_range(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ struct iw_range *range = (struct iw_range *)extra; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ u16 val; ++ int i; ++ ++ _func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_range. cmd_code=%x\n", info->cmd)); ++ ++ wrqu->data.length = sizeof(*range); ++ _rtw_memset(range, 0, sizeof(*range)); ++ ++ /* Let's try to keep this struct in the same order as in ++ * linux/include/wireless.h ++ */ ++ ++ /* TODO: See what values we can set, and remove the ones we can't ++ * set, or fill them with some default data. ++ */ ++ ++ /* ~5 Mb/s real (802.11b) */ ++ range->throughput = 5 * 1000 * 1000; ++ ++ // TODO: Not used in 802.11b? ++// range->min_nwid; /* Minimal NWID we are able to set */ ++ // TODO: Not used in 802.11b? ++// range->max_nwid; /* Maximal NWID we are able to set */ ++ ++ /* Old Frequency (backward compat - moved lower ) */ ++// range->old_num_channels; ++// range->old_num_frequency; ++// range->old_freq[6]; /* Filler to keep "version" at the same offset */ ++ ++ /* signal level threshold range */ ++ ++ //percent values between 0 and 100. ++ range->max_qual.qual = 100; ++ range->max_qual.level = 100; ++ range->max_qual.noise = 100; ++ range->max_qual.updated = 7; /* Updated all three */ ++ ++ ++ range->avg_qual.qual = 92; /* > 8% missed beacons is 'bad' */ ++ /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ ++ range->avg_qual.level = 20 + -98; ++ range->avg_qual.noise = 0; ++ range->avg_qual.updated = 7; /* Updated all three */ ++ ++ range->num_bitrates = RATE_COUNT; ++ ++ for (i = 0; i < RATE_COUNT && i < IW_MAX_BITRATES; i++) { ++ range->bitrate[i] = rtw_rates[i]; ++ } ++ ++ range->min_frag = MIN_FRAG_THRESHOLD; ++ range->max_frag = MAX_FRAG_THRESHOLD; ++ ++ range->pm_capa = 0; ++ ++ range->we_version_compiled = WIRELESS_EXT; ++ range->we_version_source = 16; ++ ++// range->retry_capa; /* What retry options are supported */ ++// range->retry_flags; /* How to decode max/min retry limit */ ++// range->r_time_flags; /* How to decode max/min retry life */ ++// range->min_retry; /* Minimal number of retries */ ++// range->max_retry; /* Maximal number of retries */ ++// range->min_r_time; /* Minimal retry lifetime */ ++// range->max_r_time; /* Maximal retry lifetime */ ++ ++ for (i = 0, val = 0; i < MAX_CHANNEL_NUM; i++) { ++ ++ // Include only legal frequencies for some countries ++ if(pmlmeext->channel_set[i].ChannelNum != 0) ++ { ++ range->freq[val].i = pmlmeext->channel_set[i].ChannelNum; ++ range->freq[val].m = rtw_ch2freq(pmlmeext->channel_set[i].ChannelNum) * 100000; ++ range->freq[val].e = 1; ++ val++; ++ } ++ ++ if (val == IW_MAX_FREQUENCIES) ++ break; ++ } ++ ++ range->num_channels = val; ++ range->num_frequency = val; ++ ++// Commented by Albert 2009/10/13 ++// The following code will proivde the security capability to network manager. ++// If the driver doesn't provide this capability to network manager, ++// the WPA/WPA2 routers can't be choosen in the network manager. ++ ++/* ++#define IW_SCAN_CAPA_NONE 0x00 ++#define IW_SCAN_CAPA_ESSID 0x01 ++#define IW_SCAN_CAPA_BSSID 0x02 ++#define IW_SCAN_CAPA_CHANNEL 0x04 ++#define IW_SCAN_CAPA_MODE 0x08 ++#define IW_SCAN_CAPA_RATE 0x10 ++#define IW_SCAN_CAPA_TYPE 0x20 ++#define IW_SCAN_CAPA_TIME 0x40 ++*/ ++ ++#if WIRELESS_EXT > 17 ++ range->enc_capa = IW_ENC_CAPA_WPA|IW_ENC_CAPA_WPA2| ++ IW_ENC_CAPA_CIPHER_TKIP|IW_ENC_CAPA_CIPHER_CCMP; ++#endif ++ ++#ifdef IW_SCAN_CAPA_ESSID //WIRELESS_EXT > 21 ++ range->scan_capa = IW_SCAN_CAPA_ESSID | IW_SCAN_CAPA_TYPE |IW_SCAN_CAPA_BSSID| ++ IW_SCAN_CAPA_CHANNEL|IW_SCAN_CAPA_MODE|IW_SCAN_CAPA_RATE; ++#endif ++ ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++//set bssid flow ++//s1. rtw_set_802_11_infrastructure_mode() ++//s2. rtw_set_802_11_authentication_mode() ++//s3. set_802_11_encryption_mode() ++//s4. rtw_set_802_11_bssid() ++static int rtw_wx_set_wap(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *awrq, ++ char *extra) ++{ ++ _irqL irqL; ++ uint ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sockaddr *temp = (struct sockaddr *)awrq; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _list *phead; ++ u8 *dst_bssid, *src_bssid; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ ++ _func_enter_; ++ ++ if(_FAIL == rfpwrstate_check(padapter)) ++ { ++ ret= -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++ ++ if (temp->sa_family != ARPHRD_ETHER){ ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ authmode = padapter->securitypriv.ndisauthtype; ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ pmlmepriv->pscanned = get_next(phead); ++ ++ while (1) ++ { ++ ++ if ((rtw_end_of_queue_search(phead, pmlmepriv->pscanned)) == _TRUE) ++ { ++#if 0 ++ ret = -EINVAL; ++ goto exit; ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ rtw_set_802_11_bssid(padapter, temp->sa_data); ++ goto exit; ++ } ++ else ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ dst_bssid = pnetwork->network.MacAddress; ++ ++ src_bssid = temp->sa_data; ++ ++ if ((_rtw_memcmp(dst_bssid, src_bssid, ETH_ALEN)) == _TRUE) ++ { ++ if(!rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode)) ++ { ++ ret = -1; ++ _exit_critical_bh(&queue->lock, &irqL); ++ goto exit; ++ } ++ ++ break; ++ } ++ ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ if (rtw_set_802_11_bssid(padapter, temp->sa_data) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_wap(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ wrqu->ap_addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_wap\n")); ++ ++ _func_enter_; ++ ++ if ( ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) || ++ ((check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE)) == _TRUE) || ++ ((check_fwstate(pmlmepriv, WIFI_AP_STATE)) == _TRUE) ) ++ { ++ ++ _rtw_memcpy(wrqu->ap_addr.sa_data, pcur_bss->MacAddress, ETH_ALEN); ++ } ++ else ++ { ++ _rtw_memset(wrqu->ap_addr.sa_data, 0, ETH_ALEN); ++ } ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_set_mlme(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++#if 0 ++/* SIOCSIWMLME data */ ++struct iw_mlme ++{ ++ __u16 cmd; /* IW_MLME_* */ ++ __u16 reason_code; ++ struct sockaddr addr; ++}; ++#endif ++ ++ int ret=0; ++ u16 reason; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_mlme *mlme = (struct iw_mlme *) extra; ++ ++ ++ if(mlme==NULL) ++ return -1; ++ ++ reason = cpu_to_le16(mlme->reason_code); ++ ++ switch (mlme->cmd) ++ { ++ case IW_MLME_DEAUTH: ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ break; ++ ++ case IW_MLME_DISASSOC: ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ return ret; ++ ++} ++ ++int rfpwrstate_check(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ int ret = _SUCCESS; ++ ++ //block here for system suspend only ++ if((pwrpriv->bInternalAutoSuspend == _FALSE) && (_TRUE == pwrpriv->bInSuspend )){ ++ ret = _FAIL; ++ goto exit; ++ } ++ ++ if( pwrpriv->power_mgnt == PS_MODE_ACTIVE ) { ++ goto exit; ++ } ++ ++ if((pwrpriv->bInternalAutoSuspend == _TRUE) && (padapter->net_closed == _TRUE)) { ++ ret = _FAIL; ++ goto exit; ++ } ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ++ { ++ ret = _SUCCESS; ++ goto exit; ++ } ++ ++ if(rf_off == pwrpriv->rf_pwrstate ) ++ { ++#ifdef CONFIG_USB_HCI ++#ifdef CONFIG_AUTOSUSPEND ++ if(pwrpriv->brfoffbyhw==_TRUE) ++ { ++ DBG_8192C("hw still in rf_off state ...........\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ else if(padapter->registrypriv.usbss_enable) ++ { ++ DBG_8192C("\n %s call autoresume_enter....\n",__FUNCTION__); ++ if(_FAIL == autoresume_enter(padapter)) ++ { ++ DBG_8192C("======> autoresume fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++ } ++ else ++#endif ++#endif ++ { ++#ifdef CONFIG_IPS ++ DBG_8192C("\n %s call ips_leave....\n",__FUNCTION__); ++ if(_FAIL == ips_leave(padapter)) ++ { ++ DBG_8192C("======> ips_leave fail.............\n"); ++ ret = _FAIL; ++ goto exit; ++ } ++#endif ++ } ++ }else { ++ //Jeff: reset timer to avoid falling ips or selective suspend soon ++ if(pwrpriv->bips_processing == _FALSE) ++ rtw_set_pwr_state_check_timer(pwrpriv); ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++static int rtw_wx_set_scan(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ u8 _status = _FALSE; ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ NDIS_802_11_SSID ssid[RTW_SSID_SCAN_AMOUNT]; ++ _irqL irqL; ++ ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_set_scan\n")); ++ ++_func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ { ++ ret = -1; ++ goto exit; ++ } ++#endif ++ ++ if(_FAIL == rfpwrstate_check(padapter)) ++ { ++ ret= -1; ++ goto exit; ++ } ++ ++ if(padapter->bDriverStopped){ ++ DBG_8192C("bDriverStopped=%d\n", padapter->bDriverStopped); ++ ret= -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -1; ++ goto exit; ++ } ++ ++ // When Busy Traffic, driver do not site survey. So driver return success. ++ // wpa_supplicant will not issue SIOCSIWSCAN cmd again after scan timeout. ++ // modify by thomas 2011-02-22. ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic == _TRUE) ++ { ++ indicate_wx_scan_complete_event(padapter); ++ goto exit; ++ } ++ ++ if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY|_FW_UNDER_LINKING) == _TRUE) ++ { ++ indicate_wx_scan_complete_event(padapter); ++ goto exit; ++ } ++ ++// Mareded by Albert 20101103 ++// For the DMP WiFi Display project, the driver won't to scan because ++// the pmlmepriv->scan_interval is always equal to 3. ++// So, the wpa_supplicant won't find out the WPS SoftAP. ++ ++/* ++ if(pmlmepriv->scan_interval>10) ++ pmlmepriv->scan_interval = 0; ++ ++ if(pmlmepriv->scan_interval > 0) ++ { ++ DBG_8192C("scan done\n"); ++ ret = 0; ++ goto exit; ++ } ++ ++*/ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) && !rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_FIND_PHASE_SEARCH); ++ rtw_p2p_findphase_ex_set(pwdinfo, P2P_FINDPHASE_EX_FULL); ++ rtw_free_network_queue(padapter, _TRUE); ++ } ++#endif //CONFIG_P2P ++ ++ _rtw_memset(ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ ++#if WIRELESS_EXT >= 17 ++ if (wrqu->data.length == sizeof(struct iw_scan_req)) ++ { ++ struct iw_scan_req *req = (struct iw_scan_req *)extra; ++ ++ if (wrqu->data.flags & IW_SCAN_THIS_ESSID) ++ { ++ int len = min((int)req->essid_len, IW_ESSID_MAX_SIZE); ++ ++ _rtw_memcpy(ssid[0].Ssid, req->essid, len); ++ ssid[0].SsidLength = len; ++ ++ DBG_8192C("IW_SCAN_THIS_ESSID, ssid=%s, len=%d\n", req->essid, req->essid_len); ++ ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ _status = rtw_sitesurvey_cmd(padapter, ssid, 1); ++ ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ } ++ else if (req->scan_type == IW_SCAN_TYPE_PASSIVE) ++ { ++ DBG_8192C("rtw_wx_set_scan, req->scan_type == IW_SCAN_TYPE_PASSIVE\n"); ++ } ++ ++ } ++ else ++#endif ++ ++ if( wrqu->data.length >= WEXT_CSCAN_HEADER_SIZE ++ && _rtw_memcmp(extra, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ++ ) ++ { ++ int len = wrqu->data.length -WEXT_CSCAN_HEADER_SIZE; ++ char *pos = extra+WEXT_CSCAN_HEADER_SIZE; ++ char section; ++ char sec_len; ++ int ssid_index = 0; ++ ++ //DBG_871X("%s COMBO_SCAN header is recognized\n", __FUNCTION__); ++ ++ while(len >= 1) { ++ section = *(pos++); len-=1; ++ ++ switch(section) { ++ case WEXT_CSCAN_SSID_SECTION: ++ //DBG_871X("WEXT_CSCAN_SSID_SECTION\n"); ++ if(len < 1) { ++ len = 0; ++ break; ++ } ++ ++ sec_len = *(pos++); len-=1; ++ ++ if(sec_len>0 && sec_len<=len) { ++ ssid[ssid_index].SsidLength = sec_len; ++ _rtw_memcpy(ssid[ssid_index].Ssid, pos, ssid[ssid_index].SsidLength); ++ //DBG_871X("%s COMBO_SCAN with specific ssid:%s, %d\n", __FUNCTION__ ++ // , ssid[ssid_index].Ssid, ssid[ssid_index].SsidLength); ++ ssid_index++; ++ } ++ ++ pos+=sec_len; len-=sec_len; ++ break; ++ ++ ++ case WEXT_CSCAN_CHANNEL_SECTION: ++ //DBG_871X("WEXT_CSCAN_CHANNEL_SECTION\n"); ++ pos+=1; len-=1; ++ break; ++ case WEXT_CSCAN_ACTV_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_ACTV_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_PASV_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_PASV_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_HOME_DWELL_SECTION: ++ //DBG_871X("WEXT_CSCAN_HOME_DWELL_SECTION\n"); ++ pos+=2; len-=2; ++ break; ++ case WEXT_CSCAN_TYPE_SECTION: ++ //DBG_871X("WEXT_CSCAN_TYPE_SECTION\n"); ++ pos+=1; len-=1; ++ break; ++ #if 0 ++ case WEXT_CSCAN_NPROBE_SECTION: ++ DBG_871X("WEXT_CSCAN_NPROBE_SECTION\n"); ++ break; ++ #endif ++ ++ default: ++ //DBG_871X("Unknown CSCAN section %c\n", section); ++ len = 0; // stop parsing ++ } ++ //DBG_871X("len:%d\n", len); ++ ++ } ++ ++ //jeff: it has still some scan paramater to parse, we only do this now... ++ _enter_critical_bh(&pmlmepriv->lock, &irqL); ++ _status = rtw_sitesurvey_cmd(padapter, ssid, RTW_SSID_SCAN_AMOUNT); ++ _exit_critical_bh(&pmlmepriv->lock, &irqL); ++ ++ } else ++ ++ { ++ _status = rtw_set_802_11_bssid_list_scan(padapter); ++ } ++ ++ if(_status == _FALSE) ++ ret = -1; ++ ++exit: ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++_func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_scan(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ char *ev = extra; ++ char *stop = ev + wrqu->data.length; ++ u32 ret = 0; ++ u32 cnt=0; ++ u32 wait_for_surveydone; ++ sint wait_status; ++#ifdef CONFIG_P2P ++ struct wifidirect_info* pwdinfo = &padapter->wdinfo; ++#endif //CONFIG_P2P ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_scan\n")); ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_, (" Start of Query SIOCGIWSCAN .\n")); ++ ++ _func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++ ++ if(padapter->pwrctrlpriv.brfoffbyhw && padapter->bDriverStopped) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_P2P ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ // P2P is enabled ++ wait_for_surveydone = 200; ++ } ++ else ++ { ++ // P2P is disabled ++ wait_for_surveydone = 100; ++ } ++#else ++ { ++ wait_for_surveydone = 100; ++ } ++#endif //CONFIG_P2P ++ ++ wait_status = _FW_UNDER_SURVEY ++ #ifndef CONFIG_ANDROID ++ |_FW_UNDER_LINKING ++ #endif ++ ; ++ ++ while(check_fwstate(pmlmepriv, wait_status) == _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > wait_for_surveydone ) ++ break; ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ if((stop - ev) < SCAN_ITEM_SIZE) { ++ ret = -E2BIG; ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //report network only if the current channel set contains the channel to which this network belongs ++ if( _TRUE == rtw_is_channel_set_contains_channel(padapter->mlmeextpriv.channel_set, pnetwork->network.Configuration.DSConfig) ++ #ifdef CONFIG_VALIDATE_SSID ++ && _TRUE == rtw_validate_ssid(&(pnetwork->network.Ssid)) ++ #endif ++ ) ++ { ++ ev=translate_scan(padapter, a, pnetwork, ev, stop); ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ wrqu->data.length = ev-extra; ++ wrqu->data.flags = 0; ++ ++exit: ++ ++ _func_exit_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++ return ret ; ++ ++} ++ ++//set ssid flow ++//s1. rtw_set_802_11_infrastructure_mode() ++//s2. set_802_11_authenticaion_mode() ++//s3. set_802_11_encryption_mode() ++//s4. rtw_set_802_11_ssid() ++static int rtw_wx_set_essid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _queue *queue = &pmlmepriv->scanned_queue; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ _list *phead; ++ s8 status = _TRUE; ++ struct wlan_network *pnetwork = NULL; ++ ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ NDIS_802_11_SSID ndis_ssid; ++ u8 *dst_ssid, *src_ssid; ++ ++ uint ret = 0, len; ++ ++ _func_enter_; ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d\n",__FUNCTION__, __LINE__); ++ #endif ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("+rtw_wx_set_essid: fw_state=0x%08x\n", get_fwstate(pmlmepriv))); ++ if(_FAIL == rfpwrstate_check(padapter)) ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++ if(!padapter->bup){ ++ ret = -1; ++ goto exit; ++ } ++ ++#if WIRELESS_EXT <= 20 ++ if ((wrqu->essid.length-1) > IW_ESSID_MAX_SIZE){ ++#else ++ if (wrqu->essid.length > IW_ESSID_MAX_SIZE){ ++#endif ++ ret= -E2BIG; ++ goto exit; ++ } ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) { ++ ret = -1; ++ goto exit; ++ } ++ ++ authmode = padapter->securitypriv.ndisauthtype; ++ DBG_8192C("=>%s\n",__FUNCTION__); ++ if (wrqu->essid.flags && wrqu->essid.length) ++ { ++ // Commented by Albert 20100519 ++ // We got the codes in "set_info" function of iwconfig source code. ++ // ========================================= ++ // wrq.u.essid.length = strlen(essid) + 1; ++ // if(we_kernel_version > 20) ++ // wrq.u.essid.length--; ++ // ========================================= ++ // That means, if the WIRELESS_EXT less than or equal to 20, the correct ssid len should subtract 1. ++#if WIRELESS_EXT <= 20 ++ len = ((wrqu->essid.length-1) < IW_ESSID_MAX_SIZE) ? (wrqu->essid.length-1) : IW_ESSID_MAX_SIZE; ++#else ++ len = (wrqu->essid.length < IW_ESSID_MAX_SIZE) ? wrqu->essid.length : IW_ESSID_MAX_SIZE; ++#endif ++ ++ DBG_8192C("ssid=%s, len=%d\n", extra, wrqu->essid.length); ++ ++ _rtw_memset(&ndis_ssid, 0, sizeof(NDIS_802_11_SSID)); ++ ndis_ssid.SsidLength = len; ++ _rtw_memcpy(ndis_ssid.Ssid, extra, len); ++ src_ssid = ndis_ssid.Ssid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ("rtw_wx_set_essid: ssid=[%s]\n", src_ssid)); ++ _enter_critical_bh(&queue->lock, &irqL); ++ phead = get_list_head(queue); ++ pmlmepriv->pscanned = get_next(phead); ++ ++ while (1) ++ { ++ if (rtw_end_of_queue_search(phead, pmlmepriv->pscanned) == _TRUE) ++ { ++#if 0 ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ rtw_set_802_11_ssid(padapter, &ndis_ssid); ++ ++ goto exit; ++ } ++ else ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("rtw_wx_set_ssid(): scanned_queue is empty\n")); ++ ret = -EINVAL; ++ goto exit; ++ } ++#endif ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_warning_, ++ ("rtw_wx_set_essid: scan_q is empty, set ssid to check if scanning again!\n")); ++ ++ break; ++ } ++ ++ pnetwork = LIST_CONTAINOR(pmlmepriv->pscanned, struct wlan_network, list); ++ ++ pmlmepriv->pscanned = get_next(pmlmepriv->pscanned); ++ ++ dst_ssid = pnetwork->network.Ssid.Ssid; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_wx_set_essid: dst_ssid=%s\n", ++ pnetwork->network.Ssid.Ssid)); ++ ++ if ((_rtw_memcmp(dst_ssid, src_ssid, ndis_ssid.SsidLength) == _TRUE) && ++ (pnetwork->network.Ssid.SsidLength==ndis_ssid.SsidLength)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_wx_set_essid: find match, set infra mode\n")); ++ ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE) ++ { ++ if(pnetwork->network.InfrastructureMode != pmlmepriv->cur_network.network.InfrastructureMode) ++ continue; ++ } ++ ++ if (rtw_set_802_11_infrastructure_mode(padapter, pnetwork->network.InfrastructureMode) == _FALSE) ++ { ++ ret = -1; ++ _exit_critical_bh(&queue->lock, &irqL); ++ goto exit; ++ } ++ ++ break; ++ } ++ } ++ _exit_critical_bh(&queue->lock, &irqL); ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("set ssid: set_802_11_auth. mode=%d\n", authmode)); ++ rtw_set_802_11_authentication_mode(padapter, authmode); ++ //set_802_11_encryption_mode(padapter, padapter->securitypriv.ndisencryptstatus); ++ if (rtw_set_802_11_ssid(padapter, &ndis_ssid) == _FALSE) { ++ ret = -1; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++ DBG_8192C("<=%s, ret %d\n",__FUNCTION__, ret); ++ ++ #ifdef DBG_IOCTL ++ DBG_871X("DBG_IOCTL %s:%d return %d\n",__FUNCTION__, __LINE__, ret); ++ #endif ++ ++ _func_exit_; ++ ++ return ret; ++} ++ ++static int rtw_wx_get_essid(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ u32 len,ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,("rtw_wx_get_essid\n")); ++ ++ _func_enter_; ++ ++ if ( (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || ++ (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ len = pcur_bss->Ssid.SsidLength; ++ ++ wrqu->essid.length = len; ++ ++ _rtw_memcpy(extra, pcur_bss->Ssid.Ssid, len); ++ ++ wrqu->essid.flags = 1; ++ } ++ else ++ { ++ ret = -1; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_set_rate(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int i, ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 datarates[NumRates]; ++ u32 target_rate = wrqu->bitrate.value; ++ u32 fixed = wrqu->bitrate.fixed; ++ u32 ratevalue = 0; ++ u8 mpdatarate[NumRates]={11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0xff}; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_set_rate \n")); ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("target_rate = %d, fixed = %d\n",target_rate,fixed)); ++ ++ if(target_rate == -1){ ++ ratevalue = 11; ++ goto set_rate; ++ } ++ target_rate = target_rate/100000; ++ ++ switch(target_rate){ ++ case 10: ++ ratevalue = 0; ++ break; ++ case 20: ++ ratevalue = 1; ++ break; ++ case 55: ++ ratevalue = 2; ++ break; ++ case 60: ++ ratevalue = 3; ++ break; ++ case 90: ++ ratevalue = 4; ++ break; ++ case 110: ++ ratevalue = 5; ++ break; ++ case 120: ++ ratevalue = 6; ++ break; ++ case 180: ++ ratevalue = 7; ++ break; ++ case 240: ++ ratevalue = 8; ++ break; ++ case 360: ++ ratevalue = 9; ++ break; ++ case 480: ++ ratevalue = 10; ++ break; ++ case 540: ++ ratevalue = 11; ++ break; ++ default: ++ ratevalue = 11; ++ break; ++ } ++ ++set_rate: ++ ++ for(i=0; imlmepriv; ++ WLAN_BSSID_EX *pcur_bss = &pmlmepriv->cur_network.network; ++ struct rtw_ieee80211_ht_cap *pht_capie; ++ u8 bw_40MHz=0, short_GI=0; ++ u16 mcs_rate=0; ++ u8 rf_type = 0; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ ++ i=0; ++#ifdef CONFIG_MP_INCLUDED ++ if (check_fwstate(pmlmepriv, WIFI_MP_STATE) == _TRUE) ++ return -1; ++#endif ++ if((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) || (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE)) ++ { ++ p = rtw_get_ie(&pcur_bss->IEs[12], _HT_CAPABILITY_IE_, &ht_ielen, pcur_bss->IELength-12); ++ if(p && ht_ielen>0) ++ { ++ ht_cap = _TRUE; ++ ++ pht_capie = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ _rtw_memcpy(&mcs_rate , pht_capie->supp_mcs_set, 2); ++ ++ bw_40MHz = (pht_capie->cap_info&IEEE80211_HT_CAP_SUP_WIDTH) ? 1:0; ++ ++ short_GI = (pht_capie->cap_info&(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ? 1:0; ++ } ++ ++ while( (pcur_bss->SupportedRates[i]!=0) && (pcur_bss->SupportedRates[i]!=0xFF)) ++ { ++ rate = pcur_bss->SupportedRates[i]&0x7F; ++ if(rate>max_rate) ++ max_rate = rate; ++ ++ wrqu->bitrate.fixed = 0; /* no auto select */ ++ //wrqu->bitrate.disabled = 1/; ++ ++ i++; ++ } ++ ++ if(ht_cap == _TRUE) ++ { ++#if 0 //have some issue,neet to debug - 20101008-georgia ++ if(mcs_rate&0x8000)//MCS15 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); ++ ++ } ++ else if(mcs_rate&0x0080)//MCS7 ++ { ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++ else//default MCS7 ++ { ++ //DBG_8192C("wx_get_rate, mcs_rate_bitmap=0x%x\n", mcs_rate); ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ } ++#else ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_1T1R) ++ max_rate = (bw_40MHz) ? ((short_GI)?150:135):((short_GI)?72:65); ++ else ++ max_rate = (bw_40MHz) ? ((short_GI)?300:270):((short_GI)?144:130); ++#endif ++ max_rate = max_rate*2;//Mbps/2 ++ wrqu->bitrate.value = max_rate*500000; ++ ++ } ++ else ++ { ++ wrqu->bitrate.value = max_rate*500000; ++ } ++ ++ } ++ else ++ { ++ return -1; ++ } ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_get_rts(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ RT_TRACE(_module_rtl871x_mlme_c_,_drv_info_,(" rtw_wx_get_rts \n")); ++ ++ wrqu->rts.value = padapter->registrypriv.rts_thresh; ++ wrqu->rts.fixed = 0; /* no auto select */ ++ //wrqu->rts.disabled = (wrqu->rts.value == DEFAULT_RTS_THRESHOLD); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_frag(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ if (wrqu->frag.disabled) ++ padapter->xmitpriv.frag_len = MAX_FRAG_THRESHOLD; ++ else { ++ if (wrqu->frag.value < MIN_FRAG_THRESHOLD || ++ wrqu->frag.value > MAX_FRAG_THRESHOLD) ++ return -EINVAL; ++ ++ padapter->xmitpriv.frag_len = wrqu->frag.value & ~0x1; ++ } ++ ++ _func_exit_; ++ ++ return 0; ++ ++} ++ ++ ++static int rtw_wx_get_frag(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ _func_enter_; ++ ++ wrqu->frag.value = padapter->xmitpriv.frag_len; ++ wrqu->frag.fixed = 0; /* no auto select */ ++ //wrqu->frag.disabled = (wrqu->frag.value == DEFAULT_FRAG_THRESHOLD); ++ ++ _func_exit_; ++ ++ return 0; ++} ++ ++static int rtw_wx_get_retry(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ ++ wrqu->retry.value = 7; ++ wrqu->retry.fixed = 0; /* no auto select */ ++ wrqu->retry.disabled = 1; ++ ++ return 0; ++ ++} ++ ++#if 0 ++#define IW_ENCODE_INDEX 0x00FF /* Token index (if needed) */ ++#define IW_ENCODE_FLAGS 0xFF00 /* Flags defined below */ ++#define IW_ENCODE_MODE 0xF000 /* Modes defined below */ ++#define IW_ENCODE_DISABLED 0x8000 /* Encoding disabled */ ++#define IW_ENCODE_ENABLED 0x0000 /* Encoding enabled */ ++#define IW_ENCODE_RESTRICTED 0x4000 /* Refuse non-encoded packets */ ++#define IW_ENCODE_OPEN 0x2000 /* Accept non-encoded packets */ ++#define IW_ENCODE_NOKEY 0x0800 /* Key is write only, so not present */ ++#define IW_ENCODE_TEMP 0x0400 /* Temporary key */ ++/* ++iwconfig wlan0 key on -> flags = 0x6001 -> maybe it means auto ++iwconfig wlan0 key off -> flags = 0x8800 ++iwconfig wlan0 key open -> flags = 0x2800 ++iwconfig wlan0 key open 1234567890 -> flags = 0x2000 ++iwconfig wlan0 key restricted -> flags = 0x4800 ++iwconfig wlan0 key open [3] 1234567890 -> flags = 0x2003 ++iwconfig wlan0 key restricted [2] 1234567890 -> flags = 0x4002 ++iwconfig wlan0 key open [3] -> flags = 0x2803 ++iwconfig wlan0 key restricted [2] -> flags = 0x4802 ++*/ ++#endif ++ ++static int rtw_wx_set_enc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *keybuf) ++{ ++ u32 key, ret = 0; ++ u32 keyindex_provided; ++ NDIS_802_11_WEP wep; ++ NDIS_802_11_AUTHENTICATION_MODE authmode; ++ ++ struct iw_point *erq = &(wrqu->encoding); ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ DBG_8192C("+rtw_wx_set_enc, flags=0x%x\n", erq->flags); ++ ++ _rtw_memset(&wep, 0, sizeof(NDIS_802_11_WEP)); ++ ++ key = erq->flags & IW_ENCODE_INDEX; ++ ++ _func_enter_; ++ ++ if (erq->flags & IW_ENCODE_DISABLED) ++ { ++ DBG_8192C("EncryptionDisabled\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ ++ goto exit; ++ } ++ ++ if (key) { ++ if (key > WEP_KEYS) ++ return -EINVAL; ++ key--; ++ keyindex_provided = 1; ++ } ++ else ++ { ++ keyindex_provided = 0; ++ key = padapter->securitypriv.dot11PrivacyKeyIndex; ++ DBG_8192C("rtw_wx_set_enc, key=%d\n", key); ++ } ++ ++ //set authentication mode ++ if(erq->flags & IW_ENCODE_OPEN) ++ { ++ DBG_8192C("rtw_wx_set_enc():IW_ENCODE_OPEN\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; ++#endif ++ ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ else if(erq->flags & IW_ENCODE_RESTRICTED) ++ { ++ DBG_8192C("rtw_wx_set_enc():IW_ENCODE_RESTRICTED\n"); ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ ++#ifdef CONFIG_PLATFORM_MT53XX ++ padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Auto; ++#else ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Shared; ++#endif ++ ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_WEP40_; ++ authmode = Ndis802_11AuthModeShared; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ else ++ { ++ DBG_8192C("rtw_wx_set_enc():erq->flags=0x%x\n", erq->flags); ++ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption1Enabled;//Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ authmode = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisauthtype=authmode; ++ } ++ ++ wep.KeyIndex = key; ++ if (erq->length > 0) ++ { ++ wep.KeyLength = erq->length <= 5 ? 5 : 13; ++ ++ wep.Length = wep.KeyLength + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ } ++ else ++ { ++ wep.KeyLength = 0 ; ++ ++ if(keyindex_provided == 1)// set key_id only, no given KeyMaterial(erq->length==0). ++ { ++ padapter->securitypriv.dot11PrivacyKeyIndex = key; ++ ++ DBG_8192C("(keyindex_provided == 1), keyid=%d, key_len=%d\n", key, padapter->securitypriv.dot11DefKeylen[key]); ++ ++ switch(padapter->securitypriv.dot11DefKeylen[key]) ++ { ++ case 5: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP40_; ++ break; ++ case 13: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_WEP104_; ++ break; ++ default: ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ break; ++ } ++ ++ goto exit; ++ ++ } ++ ++ } ++ ++ wep.KeyIndex |= 0x80000000; ++ ++ _rtw_memcpy(wep.KeyMaterial, keybuf, wep.KeyLength); ++ ++ if (rtw_set_802_11_add_wep(padapter, &wep) == _FALSE) { ++ if(rf_on == pwrpriv->rf_pwrstate ) ++ ret = -EOPNOTSUPP; ++ goto exit; ++ } ++ ++exit: ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_enc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *keybuf) ++{ ++ uint key, ret =0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *erq = &(wrqu->encoding); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ _func_enter_; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) != _TRUE) ++ { ++ if(check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) != _TRUE) ++ { ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ return 0; ++ } ++ } ++ ++ ++ key = erq->flags & IW_ENCODE_INDEX; ++ ++ if (key) { ++ if (key > WEP_KEYS) ++ return -EINVAL; ++ key--; ++ } else ++ { ++ key = padapter->securitypriv.dot11PrivacyKeyIndex; ++ } ++ ++ erq->flags = key + 1; ++ ++ //if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) ++ //{ ++ // erq->flags |= IW_ENCODE_OPEN; ++ //} ++ ++ switch(padapter->securitypriv.ndisencryptstatus) ++ { ++ case Ndis802_11EncryptionNotSupported: ++ case Ndis802_11EncryptionDisabled: ++ ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ ++ break; ++ ++ case Ndis802_11Encryption1Enabled: ++ ++ erq->length = padapter->securitypriv.dot11DefKeylen[key]; ++ ++ if(erq->length) ++ { ++ _rtw_memcpy(keybuf, padapter->securitypriv.dot11DefKey[key].skey, padapter->securitypriv.dot11DefKeylen[key]); ++ ++ erq->flags |= IW_ENCODE_ENABLED; ++ ++ if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeOpen) ++ { ++ erq->flags |= IW_ENCODE_OPEN; ++ } ++ else if(padapter->securitypriv.ndisauthtype == Ndis802_11AuthModeShared) ++ { ++ erq->flags |= IW_ENCODE_RESTRICTED; ++ } ++ } ++ else ++ { ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ } ++ ++ break; ++ ++ case Ndis802_11Encryption2Enabled: ++ case Ndis802_11Encryption3Enabled: ++ ++ erq->length = 16; ++ erq->flags |= (IW_ENCODE_ENABLED | IW_ENCODE_OPEN | IW_ENCODE_NOKEY); ++ ++ break; ++ ++ default: ++ erq->length = 0; ++ erq->flags |= IW_ENCODE_DISABLED; ++ ++ break; ++ ++ } ++ ++ _func_exit_; ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_get_power(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ wrqu->power.value = 0; ++ wrqu->power.fixed = 0; /* no auto select */ ++ wrqu->power.disabled = 1; ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_set_gen_ie(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ ret = rtw_set_wpa_ie(padapter, extra, wrqu->data.length); ++ ++ return ret; ++} ++ ++static int rtw_wx_set_auth(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_param *param = (struct iw_param*)&(wrqu->param); ++ int ret = 0; ++ ++ switch (param->flags & IW_AUTH_INDEX) { ++ case IW_AUTH_WPA_VERSION: ++ break; ++ case IW_AUTH_CIPHER_PAIRWISE: ++ ++ break; ++ case IW_AUTH_CIPHER_GROUP: ++ ++ break; ++ case IW_AUTH_KEY_MGMT: ++ /* ++ * ??? does not use these parameters ++ */ ++ break; ++ ++ case IW_AUTH_TKIP_COUNTERMEASURES: ++ { ++ if ( param->value ) ++ { // wpa_supplicant is enabling the tkip countermeasure. ++ padapter->securitypriv.btkip_countermeasure = _TRUE; ++ } ++ else ++ { // wpa_supplicant is disabling the tkip countermeasure. ++ padapter->securitypriv.btkip_countermeasure = _FALSE; ++ } ++ break; ++ } ++ case IW_AUTH_DROP_UNENCRYPTED: ++ { ++ /* HACK: ++ * ++ * wpa_supplicant calls set_wpa_enabled when the driver ++ * is loaded and unloaded, regardless of if WPA is being ++ * used. No other calls are made which can be used to ++ * determine if encryption will be used or not prior to ++ * association being expected. If encryption is not being ++ * used, drop_unencrypted is set to false, else true -- we ++ * can use this to determine if the CAP_PRIVACY_ON bit should ++ * be set. ++ */ ++ ++ if(padapter->securitypriv.ndisencryptstatus == Ndis802_11Encryption1Enabled) ++ { ++ break;//it means init value, or using wep, ndisencryptstatus = Ndis802_11Encryption1Enabled, ++ // then it needn't reset it; ++ } ++ ++ if(param->value){ ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11EncryptionDisabled; ++ padapter->securitypriv.dot11PrivacyAlgrthm=_NO_PRIVACY_; ++ padapter->securitypriv.dot118021XGrpPrivacy=_NO_PRIVACY_; ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_Open; //open system ++ padapter->securitypriv.ndisauthtype=Ndis802_11AuthModeOpen; ++ } ++ ++ break; ++ } ++ ++ case IW_AUTH_80211_AUTH_ALG: ++ ++ #if defined(CONFIG_ANDROID) || 1 ++ /* ++ * It's the starting point of a link layer connection using wpa_supplicant ++ */ ++ if(check_fwstate(&padapter->mlmepriv, _FW_LINKED)) { ++ rtw_disassoc_cmd(padapter); ++ DBG_871X("%s...call rtw_indicate_disconnect\n ",__FUNCTION__); ++ rtw_indicate_disconnect(padapter); ++ rtw_free_assoc_resources(padapter, 1); ++ } ++ #endif ++ ++ ++ ret = wpa_set_auth_algs(dev, (u32)param->value); ++ ++ break; ++ ++ case IW_AUTH_WPA_ENABLED: ++ ++ //if(param->value) ++ // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_8021X; //802.1x ++ //else ++ // padapter->securitypriv.dot11AuthAlgrthm = dot11AuthAlgrthm_Open;//open system ++ ++ //_disassociate(priv); ++ ++ break; ++ ++ case IW_AUTH_RX_UNENCRYPTED_EAPOL: ++ //ieee->ieee802_1x = param->value; ++ break; ++ ++ case IW_AUTH_PRIVACY_INVOKED: ++ //ieee->privacy_invoked = param->value; ++ break; ++ ++ default: ++ return -EOPNOTSUPP; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_wx_set_enc_ext(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ char *alg_name; ++ u32 param_len; ++ struct ieee_param *param = NULL; ++ struct iw_point *pencoding = &wrqu->encoding; ++ struct iw_encode_ext *pext = (struct iw_encode_ext *)extra; ++ int ret=0; ++ ++ param_len = sizeof(struct ieee_param) + pext->key_len; ++ param = (struct ieee_param *)rtw_malloc(param_len); ++ if (param == NULL) ++ return -1; ++ ++ _rtw_memset(param, 0, param_len); ++ ++ param->cmd = IEEE_CMD_SET_ENCRYPTION; ++ _rtw_memset(param->sta_addr, 0xff, ETH_ALEN); ++ ++ ++ switch (pext->alg) { ++ case IW_ENCODE_ALG_NONE: ++ //todo: remove key ++ //remove = 1; ++ alg_name = "none"; ++ break; ++ case IW_ENCODE_ALG_WEP: ++ alg_name = "WEP"; ++ break; ++ case IW_ENCODE_ALG_TKIP: ++ alg_name = "TKIP"; ++ break; ++ case IW_ENCODE_ALG_CCMP: ++ alg_name = "CCMP"; ++ break; ++ default: ++ return -1; ++ } ++ ++ strncpy((char *)param->u.crypt.alg, alg_name, IEEE_CRYPT_ALG_NAME_LEN); ++ ++ ++ if(pext->ext_flags & IW_ENCODE_EXT_GROUP_KEY)//? ++ { ++ param->u.crypt.set_tx = 0; ++ } ++ ++ if (pext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY)//? ++ { ++ param->u.crypt.set_tx = 1; ++ } ++ ++ param->u.crypt.idx = (pencoding->flags&0x00FF) -1 ; ++ ++ if (pext->ext_flags & IW_ENCODE_EXT_RX_SEQ_VALID) ++ { ++ _rtw_memcpy(param->u.crypt.seq, pext->rx_seq, 8); ++ } ++ ++ if(pext->key_len) ++ { ++ param->u.crypt.key_len = pext->key_len; ++ //_rtw_memcpy(param + 1, pext + 1, pext->key_len); ++ _rtw_memcpy(param->u.crypt.key, pext + 1, pext->key_len); ++ } ++ ++ ++ if (pencoding->flags & IW_ENCODE_DISABLED) ++ { ++ //todo: remove key ++ //remove = 1; ++ } ++ ++ ret = wpa_set_encryption(dev, param, param_len); ++ ++ ++ if(param) ++ { ++ rtw_mfree((u8*)param, param_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_wx_get_nick(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ //struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ if(extra) ++ { ++ wrqu->data.length = 14; ++ wrqu->data.flags = 1; ++ _rtw_memcpy(extra, "", 14); ++ } ++ ++ //rtw_signal_process(pid, SIGUSR1); //for test ++ ++ //dump debug info here ++/* ++ u32 dot11AuthAlgrthm; // 802.11 auth, could be open, shared, and 8021x ++ u32 dot11PrivacyAlgrthm; // This specify the privacy for shared auth. algorithm. ++ u32 dot118021XGrpPrivacy; // This specify the privacy algthm. used for Grp key ++ u32 ndisauthtype; ++ u32 ndisencryptstatus; ++*/ ++ ++ //DBG_8192C("auth_alg=0x%x, enc_alg=0x%x, auth_type=0x%x, enc_type=0x%x\n", ++ // psecuritypriv->dot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ // psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ ++ //DBG_8192C("enc_alg=0x%x\n", psecuritypriv->dot11PrivacyAlgrthm); ++ //DBG_8192C("auth_type=0x%x\n", psecuritypriv->ndisauthtype); ++ //DBG_8192C("enc_type=0x%x\n", psecuritypriv->ndisencryptstatus); ++ ++#if 0 ++ DBG_8192C("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); ++ DBG_8192C("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); ++ DBG_8192C("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); ++ DBG_8192C("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); ++ DBG_8192C("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); ++ ++ DBG_8192C("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); ++ ++ ++ DBG_8192C("\n"); ++ ++ DBG_8192C("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); ++ DBG_8192C("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); ++ ++ DBG_8192C("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); ++ ++ DBG_8192C("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); ++ ++ DBG_8192C("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); ++ DBG_8192C("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); ++ ++ DBG_8192C("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); ++ DBG_8192C("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); ++ DBG_8192C("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); ++ DBG_8192C("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); ++#endif ++ ++ return 0; ++ ++} ++ ++static int rtw_wx_read32(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ u32 addr; ++ u32 data32; ++ ++ ++ addr = *(u32*)extra; ++ data32 = rtw_read32(padapter, addr); ++ sprintf(extra, "0x%08x", data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_write32(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ u32 addr; ++ u32 data32; ++ ++ ++ addr = *(u32*)extra; ++ data32 = *((u32*)extra + 1); ++ rtw_write32(padapter, addr, data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u32 path, addr, data32; ++ ++ ++ path = *(u32*)extra; ++ addr = *((u32*)extra + 1); ++ data32 = padapter->HalFunc.read_rfreg(padapter, path, addr, 0xFFFFF); ++// DBG_8192C("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); ++ /* ++ * IMPORTANT!! ++ * Only when wireless private ioctl is at odd order, ++ * "extra" would be copied to user space. ++ */ ++ sprintf(extra, "0x%05x", data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u32 path, addr, data32; ++ ++ ++ path = *(u32*)extra; ++ addr = *((u32*)extra + 1); ++ data32 = *((u32*)extra + 2); ++// DBG_8192C("%s: path=%d addr=0x%02x data=0x%05x\n", __func__, path, addr, data32); ++ padapter->HalFunc.write_rfreg(padapter, path, addr, 0xFFFFF, data32); ++ ++ return 0; ++} ++ ++static int rtw_wx_priv_null(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ return -1; ++} ++ ++static int dummy(struct net_device *dev, struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++ //_adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ //DBG_8192C("cmd_code=%x, fwstate=0x%x\n", a->cmd, get_fwstate(pmlmepriv)); ++ ++ return -1; ++ ++} ++ ++static int rtw_wx_set_channel_plan(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ extern int rtw_channel_plan; ++ u8 channel_plan_req = (u8) (*((int *)wrqu)); ++ ++ #if 0 ++ rtw_channel_plan = (int)wrqu->data.pointer; ++ pregistrypriv->channel_plan = rtw_channel_plan; ++ pmlmepriv->ChannelPlan = pregistrypriv->channel_plan; ++ #endif ++ ++ if( _SUCCESS == rtw_set_chplan_cmd(padapter, channel_plan_req, 1) ) { ++ DBG_871X("\n======== Set channel_plan = 0x%02X ========\n", pmlmepriv->ChannelPlan); ++ } else ++ return -EPERM; ++ ++ return 0; ++} ++ ++static int rtw_wx_set_mtk_wps_probe_ie(struct net_device *dev, ++ struct iw_request_info *a, ++ union iwreq_data *wrqu, char *b) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ++ ("WLAN IOCTL: cmd_code=%x, fwstate=0x%x\n", ++ a->cmd, get_fwstate(pmlmepriv))); ++#endif ++ return 0; ++} ++ ++static int rtw_wx_get_sensitivity(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *buf) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ // Modified by Albert 20110914 ++ // This is in dbm format for MTK platform. ++ wrqu->qual.level = padapter->recvpriv.rssi; ++ DBG_8192C(" level = %u\n", wrqu->qual.level ); ++#endif ++ return 0; ++} ++ ++static int rtw_wx_set_mtk_wps_ie(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++#ifdef CONFIG_PLATFORM_MT53XX ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ return rtw_set_wpa_ie(padapter, wrqu->data.pointer, wrqu->data.length); ++#else ++ return 0; ++#endif ++} ++ ++/* ++typedef int (*iw_handler)(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra); ++*/ ++/* ++ * For all data larger than 16 octets, we need to use a ++ * pointer to memory allocated in user space. ++ */ ++static int rtw_drvext_hdl(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ #if 0 ++struct iw_point ++{ ++ void __user *pointer; /* Pointer to the data (in user space) */ ++ __u16 length; /* number of fields or size in bytes */ ++ __u16 flags; /* Optional params */ ++}; ++ #endif ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ u8 res; ++ struct drvext_handler *phandler; ++ struct drvext_oidparam *poidparam; ++ int ret; ++ u16 len; ++ u8 *pparmbuf, bset; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *p = &wrqu->data; ++ ++ if( (!p->length) || (!p->pointer)){ ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ bset = (u8)(p->flags&0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ if(bset)//set info ++ { ++ if (copy_from_user(pparmbuf, p->pointer,len)) { ++ rtw_mfree(pparmbuf, len); ++ ret = -EFAULT; ++ goto _rtw_drvext_hdl_exit; ++ } ++ } ++ else//query info ++ { ++ ++ } ++ ++ ++ // ++ poidparam = (struct drvext_oidparam *)pparmbuf; ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("drvext set oid subcode [%d], len[%d], InformationBufferLength[%d]\r\n", ++ poidparam->subcode, poidparam->len, len)); ++ ++ ++ //check subcode ++ if ( poidparam->subcode >= MAX_DRVEXT_HANDLERS) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext handlers\r\n")); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ if ( poidparam->subcode >= MAX_DRVEXT_OID_SUBCODES) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext subcodes\r\n")); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ phandler = drvextoidhandlers + poidparam->subcode; ++ ++ if (poidparam->len != phandler->parmsize) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_err_,("no matching drvext param size %d vs %d\r\n", ++ poidparam->len , phandler->parmsize)); ++ ret = -EINVAL; ++ goto _rtw_drvext_hdl_exit; ++ } ++ ++ ++ res = phandler->handler(&padapter->drvextpriv, bset, poidparam->data); ++ ++ if(res==0) ++ { ++ ret = 0; ++ ++ if (bset == 0x00) {//query info ++ //_rtw_memcpy(p->pointer, pparmbuf, len); ++ if (copy_to_user(p->pointer, pparmbuf, len)) ++ ret = -EFAULT; ++ } ++ } ++ else ++ ret = -EFAULT; ++ ++ ++_rtw_drvext_hdl_exit: ++ ++ return ret; ++ ++#endif ++ ++ return 0; ++ ++} ++ ++static void rtw_dbg_mode_hdl(_adapter *padapter, u32 id, u8 *pdata, u32 len) ++{ ++ pRW_Reg RegRWStruct; ++ struct rf_reg_param *prfreg; ++ u8 path; ++ u8 offset; ++ u32 value; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ switch(id) ++ { ++ case GEN_MP_IOCTL_SUBCODE(MP_START): ++ DBG_8192C("871x_driver is only for normal mode, can't enter mp mode\n"); ++ break; ++ case GEN_MP_IOCTL_SUBCODE(READ_REG): ++ RegRWStruct = (pRW_Reg)pdata; ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ RegRWStruct->value = rtw_read8(padapter, RegRWStruct->offset); ++ break; ++ case 2: ++ RegRWStruct->value = rtw_read16(padapter, RegRWStruct->offset); ++ break; ++ case 4: ++ RegRWStruct->value = rtw_read32(padapter, RegRWStruct->offset); ++ break; ++ default: ++ break; ++ } ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(WRITE_REG): ++ RegRWStruct = (pRW_Reg)pdata; ++ switch (RegRWStruct->width) ++ { ++ case 1: ++ rtw_write8(padapter, RegRWStruct->offset, (u8)RegRWStruct->value); ++ break; ++ case 2: ++ rtw_write16(padapter, RegRWStruct->offset, (u16)RegRWStruct->value); ++ break; ++ case 4: ++ rtw_write32(padapter, RegRWStruct->offset, (u32)RegRWStruct->value); ++ break; ++ default: ++ break; ++ } ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(READ_RF_REG): ++ ++ prfreg = (struct rf_reg_param *)pdata; ++ ++ path = (u8)prfreg->path; ++ offset = (u8)prfreg->offset; ++ ++ value = padapter->HalFunc.read_rfreg(padapter, path, offset, 0xffffffff); ++ ++ prfreg->value = value; ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(WRITE_RF_REG): ++ ++ prfreg = (struct rf_reg_param *)pdata; ++ ++ path = (u8)prfreg->path; ++ offset = (u8)prfreg->offset; ++ value = prfreg->value; ++ ++ padapter->HalFunc.write_rfreg(padapter, path, offset, 0xffffffff, value); ++ ++ break; ++ case GEN_MP_IOCTL_SUBCODE(TRIGGER_GPIO): ++ DBG_8192C("==> trigger gpio 0\n"); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_TRIGGER_GPIO_0, 0); ++ break; ++#ifdef CONFIG_BT_COEXIST ++ case GEN_MP_IOCTL_SUBCODE(SET_DM_BT): ++ DBG_8192C("==> set dm_bt_coexist:%x\n",*(u8 *)pdata); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BT_SET_COEXIST, pdata); ++ break; ++ case GEN_MP_IOCTL_SUBCODE(DEL_BA): ++ DBG_8192C("==> delete ba:%x\n",*(u8 *)pdata); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_BT_ISSUE_DELBA, pdata); ++ break; ++#endif ++#ifdef DBG_CONFIG_ERROR_DETECT ++ case GEN_MP_IOCTL_SUBCODE(GET_WIFI_STATUS): ++ if(padapter->HalFunc.sreset_get_wifi_status) ++ *pdata = padapter->HalFunc.sreset_get_wifi_status(padapter); ++ break; ++#endif ++ ++ default: ++ break; ++ } ++ ++} ++ ++static int rtw_mp_ioctl_hdl(struct net_device *dev, struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ u32 BytesRead, BytesWritten, BytesNeeded; ++ struct oid_par_priv oid_par; ++ struct mp_ioctl_handler *phandler; ++ struct mp_ioctl_param *poidparam; ++ uint status=0; ++ u16 len; ++ u8 *pparmbuf = NULL, bset; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *p = &wrqu->data; ++ ++ //DBG_8192C("+rtw_mp_ioctl_hdl\n"); ++ ++ //mutex_lock(&ioctl_mutex); ++ ++ if ((!p->length) || (!p->pointer)) { ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ pparmbuf = NULL; ++ bset = (u8)(p->flags & 0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ if (copy_from_user(pparmbuf, p->pointer, len)) { ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ poidparam = (struct mp_ioctl_param *)pparmbuf; ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_info_, ++ ("rtw_mp_ioctl_hdl: subcode [%d], len[%d], buffer_len[%d]\r\n", ++ poidparam->subcode, poidparam->len, len)); ++ ++ if (poidparam->subcode >= MAX_MP_IOCTL_SUBCODE) { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ("no matching drvext subcodes\r\n")); ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ //DBG_8192C("%s: %d\n", __func__, poidparam->subcode); ++ ++#ifdef CONFIG_MP_INCLUDED ++ phandler = mp_ioctl_hdl + poidparam->subcode; ++ ++ if ((phandler->paramsize != 0) && (poidparam->len < phandler->paramsize)) ++ { ++ RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_err_, ++ ("no matching drvext param size %d vs %d\r\n", ++ poidparam->len, phandler->paramsize)); ++ ret = -EINVAL; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++ if (phandler->handler) ++ { ++ oid_par.adapter_context = padapter; ++ oid_par.oid = phandler->oid; ++ oid_par.information_buf = poidparam->data; ++ oid_par.information_buf_len = poidparam->len; ++ oid_par.dbg = 0; ++ ++ BytesWritten = 0; ++ BytesNeeded = 0; ++ ++ if (bset) { ++ oid_par.bytes_rw = &BytesRead; ++ oid_par.bytes_needed = &BytesNeeded; ++ oid_par.type_of_oid = SET_OID; ++ } else { ++ oid_par.bytes_rw = &BytesWritten; ++ oid_par.bytes_needed = &BytesNeeded; ++ oid_par.type_of_oid = QUERY_OID; ++ } ++ ++ status = phandler->handler(&oid_par); ++ ++ //todo:check status, BytesNeeded, etc. ++ } ++ else { ++ DBG_8192C("rtw_mp_ioctl_hdl(): err!, subcode=%d, oid=%d, handler=%p\n", ++ poidparam->subcode, phandler->oid, phandler->handler); ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++#else ++ ++ rtw_dbg_mode_hdl(padapter, poidparam->subcode, poidparam->data, poidparam->len); ++ ++#endif ++ ++ if (bset == 0x00) {//query info ++ if (copy_to_user(p->pointer, pparmbuf, len)) ++ ret = -EFAULT; ++ } ++ ++ if (status) { ++ ret = -EFAULT; ++ goto _rtw_mp_ioctl_hdl_exit; ++ } ++ ++_rtw_mp_ioctl_hdl_exit: ++ ++ if (pparmbuf) ++ rtw_mfree(pparmbuf, len); ++ ++ //mutex_unlock(&ioctl_mutex); ++ ++ return ret; ++} ++ ++static int rtw_get_ap_info(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int bssid_match, ret = 0; ++ u32 cnt=0, wpa_ielen; ++ _irqL irqL; ++ _list *plist, *phead; ++ unsigned char *pbuf; ++ u8 bssid[ETH_ALEN]; ++ char data[32]; ++ struct wlan_network *pnetwork = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct iw_point *pdata = &wrqu->data; ++ ++ DBG_8192C("+rtw_get_aplist_info\n"); ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ while((check_fwstate(pmlmepriv, (_FW_UNDER_SURVEY|_FW_UNDER_LINKING))) == _TRUE) ++ { ++ rtw_msleep_os(30); ++ cnt++; ++ if(cnt > 100) ++ break; ++ } ++ ++ ++ //pdata->length = 0;//? ++ pdata->flags = 0; ++ if(pdata->length>=32) ++ { ++ if(copy_from_user(data, pdata->pointer, 32)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ //if(hwaddr_aton_i(pdata->pointer, bssid)) ++ if(hwaddr_aton_i(data, bssid)) ++ { ++ DBG_8192C("Invalid BSSID '%s'.\n", (u8*)data); ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ return -EINVAL; ++ } ++ ++ ++ if(_rtw_memcmp(bssid, pnetwork->network.MacAddress, ETH_ALEN) == _TRUE)//BSSID match, then check if supporting wpa/wpa2 ++ { ++ DBG_8192C("BSSID:" MAC_FMT "\n", MAC_ARG(bssid)); ++ ++ pbuf = rtw_get_wpa_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); ++ if(pbuf && (wpa_ielen>0)) ++ { ++ pdata->flags = 1; ++ break; ++ } ++ ++ pbuf = rtw_get_wpa2_ie(&pnetwork->network.IEs[12], &wpa_ielen, pnetwork->network.IELength-12); ++ if(pbuf && (wpa_ielen>0)) ++ { ++ pdata->flags = 2; ++ break; ++ } ++ ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if(pdata->length>=34) ++ { ++ if(copy_to_user((u8*)pdata->pointer+32, (u8*)&pdata->flags, 1)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ } ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_set_pid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ int *pdata = (int *)wrqu; ++ int selector; ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ selector = *pdata; ++ if(selector < 3 && selector >=0) { ++ padapter->pid[selector] = *(pdata+1); ++ #ifdef CONFIG_GLOBAL_UI_PID ++ ui_pid[selector] = *(pdata+1); ++ #endif ++ DBG_871X("%s set pid[%d]=%d\n", __FUNCTION__, selector ,padapter->pid[selector]); ++ } ++ else ++ DBG_871X("%s selector %d error\n", __FUNCTION__, selector); ++ ++exit: ++ ++ return ret; ++ ++} ++ ++static int rtw_wps_start(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ u32 u32wps_start = 0; ++ unsigned int uintRet = 0; ++ ++ uintRet = copy_from_user( ( void* ) &u32wps_start, pdata->pointer, 4 ); ++ ++ if((padapter->bDriverStopped) || (pdata==NULL)) ++ { ++ ret= -EINVAL; ++ goto exit; ++ } ++ ++ if ( u32wps_start == 0 ) ++ { ++ u32wps_start = *extra; ++ } ++ ++ DBG_8192C( "[%s] wps_start = %d\n", __FUNCTION__, u32wps_start ); ++ ++ if ( u32wps_start == 1 ) // WPS Start ++ { ++ rtw_led_control(padapter, LED_CTL_START_WPS); ++ } ++ else if ( u32wps_start == 2 ) // WPS Stop because of wps success ++ { ++ rtw_led_control(padapter, LED_CTL_STOP_WPS); ++ } ++ else if ( u32wps_start == 3 ) // WPS Stop because of wps fail ++ { ++ rtw_led_control(padapter, LED_CTL_STOP_WPS_FAIL); ++ } ++exit: ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_P2P ++ ++static int rtw_wext_p2p_enable(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ enum P2P_ROLE init_role = P2P_ROLE_DISABLE; ++ ++ if(*extra == '0' ) ++ init_role = P2P_ROLE_DISABLE; ++ else if(*extra == '1') ++ init_role = P2P_ROLE_DEVICE; ++ else if(*extra == '2') ++ init_role = P2P_ROLE_CLIENT; ++ else if(*extra == '3') ++ init_role = P2P_ROLE_GO; ++ ++ if(_FAIL == rtw_p2p_enable(padapter, init_role)) ++ { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ //set channel/bandwidth ++ if(init_role != P2P_ROLE_DISABLE) ++ { ++ u8 channel, ch_offset; ++ u16 bwmode; ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) ++ { ++ // Stay at the listen state and wait for discovery. ++ channel = pwdinfo->listen_channel; ++ ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ bwmode = HT_CHANNEL_WIDTH_20; ++ } ++ else ++ { ++ pwdinfo->operating_channel = pmlmeext->cur_channel; ++ ++ channel = pwdinfo->operating_channel; ++ ch_offset = pmlmeext->cur_ch_offset; ++ bwmode = pmlmeext->cur_bwmode; ++ } ++ ++ set_channel_bwmode(padapter, channel, ch_offset, bwmode); ++ } ++ ++exit: ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_go_nego_ssid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ DBG_8192C( "[%s] ssid = %s, len = %d\n", __FUNCTION__, extra, strlen( extra ) ); ++ _rtw_memcpy( pwdinfo->nego_ssid, extra, strlen( extra ) ); ++ pwdinfo->nego_ssidlen = strlen( extra ); ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_set_intent(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 intent = pwdinfo->intent; ++ ++ switch( wrqu->data.length ) ++ { ++ case 1: ++ { ++ intent = extra[ 0 ] - '0'; ++ break; ++ } ++ case 2: ++ { ++ intent = str_2char2num( extra[ 0 ], extra[ 1 ]); ++ break; ++ } ++ } ++ ++ if ( intent <= 15 ) ++ { ++ pwdinfo->intent= intent; ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_8192C( "[%s] intent = %d\n", __FUNCTION__, intent); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_listen_ch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 listen_ch = pwdinfo->listen_channel; // Listen channel number ++ ++ switch( wrqu->data.length ) ++ { ++ case 1: ++ { ++ listen_ch = extra[ 0 ] - '0'; ++ break; ++ } ++ case 2: ++ { ++ listen_ch = str_2char2num( extra[ 0 ], extra[ 1 ]); ++ break; ++ } ++ } ++ ++ if ( listen_ch > 0 && listen_ch <= 13 ) ++ { ++ pwdinfo->listen_channel = listen_ch; ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_8192C( "[%s] listen_ch = %d\n", __FUNCTION__, pwdinfo->listen_channel ); ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_set_op_ch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++// Commented by Albert 20110524 ++// This function is used to set the operating channel if the driver will become the group owner ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ u8 op_ch = pwdinfo->operating_channel; // Operating channel number ++ ++ switch( wrqu->data.length ) ++ { ++ case 1: ++ { ++ op_ch = extra[ 0 ] - '0'; ++ break; ++ } ++ case 2: ++ { ++ op_ch = str_2char2num( extra[ 0 ], extra[ 1 ]); ++ break; ++ } ++ } ++ ++ if ( op_ch > 0 && op_ch <= 13 ) ++ { ++ pwdinfo->operating_channel = op_ch; ++ } ++ else if(IsLegal5GChannel(padapter, op_ch)) ++ { ++ pwdinfo->operating_channel = op_ch; ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ DBG_8192C( "[%s] op_ch = %d\n", __FUNCTION__, pwdinfo->operating_channel ); ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_profilefound(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ // Comment by Albert 2010/10/13 ++ // Input data format: ++ // Ex: 0 ++ // Ex: 1XX:XX:XX:XX:XX:XXYYSSID ++ // 0 => Reflush the profile record list. ++ // 1 => Add the profile list ++ // XX:XX:XX:XX:XX:XX => peer's MAC Address ( ex: 00:E0:4C:00:00:01 ) ++ // YY => SSID Length ++ // SSID => SSID for persistence group ++ ++ DBG_8192C( "[%s] In value = %s, len = %d \n", __FUNCTION__, extra, wrqu->data.length -1); ++ ++ ++ // The upper application should pass the SSID to driver by using this rtw_p2p_profilefound function. ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ if ( extra[ 0 ] == '0' ) ++ { ++ // Remove all the profile information of wifidirect_info structure. ++ _rtw_memset( &pwdinfo->profileinfo[ 0 ], 0x00, sizeof( struct profile_info ) * P2P_MAX_PERSISTENT_GROUP_NUM ); ++ pwdinfo->profileindex = 0; ++ } ++ else ++ { ++ if ( pwdinfo->profileindex >= P2P_MAX_PERSISTENT_GROUP_NUM ) ++ { ++ ret = -1; ++ } ++ else ++ { ++ int jj, kk; ++ ++ // Add this profile information into pwdinfo->profileinfo ++ // Ex: 1XX:XX:XX:XX:XX:XXYYSSID ++ for( jj = 0, kk = 1; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ pwdinfo->profileinfo[ pwdinfo->profileindex ].peermac[ jj ] = key_2char2num(extra[ kk ], extra[ kk+ 1 ]); ++ } ++ ++ pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen = ( extra[18] - '0' ) * 10 + ( extra[ 19 ] - '0' ); ++ _rtw_memcpy( pwdinfo->profileinfo[ pwdinfo->profileindex ].ssid, &extra[ 20 ], pwdinfo->profileinfo[ pwdinfo->profileindex ].ssidlen ); ++ pwdinfo->profileindex++; ++ } ++ } ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_setDN(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ pwdinfo->device_name_len = wrqu->data.length - 1; ++ _rtw_memset( pwdinfo->device_name, 0x00, WPS_MAX_DEVICE_NAME_LEN ); ++ _rtw_memcpy( pwdinfo->device_name, extra, pwdinfo->device_name_len ); ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_status(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ ++ // Commented by Albert 2010/10/12 ++ // Because of the output size limitation, I had removed the "Role" information. ++ // About the "Role" information, we will use the new private IOCTL to get the "Role" information. ++ sprintf( extra, "\n\nStatus=%.2d\n", rtw_p2p_state(pwdinfo) ); ++ wrqu->data.length = strlen( extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_LISTEN)) ++ { ++ // Stay at the listen state and wait for discovery. ++ set_channel_bwmode(padapter, pwdinfo->listen_channel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ } ++ ++ return ret; ++ ++} ++ ++// Commented by Albert 20110520 ++// This function will return the config method description ++// This config method description will show us which config method the remote P2P device is intented to use ++// by sending the provisioning discovery request frame. ++ ++static int rtw_p2p_get_req_cm(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n\nCM=%s\n", pwdinfo->rx_prov_disc_info.strconfig_method_desc_of_prov_disc_req ); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_role(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ ++ sprintf( extra, "\n\nRole=%.2d\n", rtw_p2p_role(pwdinfo) ); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_peer_ifaddr(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ ++ sprintf( extra, "\nMAC %.2X:%.2X:%.2X:%.2X:%.2X:%.2X", ++ pwdinfo->p2p_peer_interface_addr[ 0 ], pwdinfo->p2p_peer_interface_addr[ 1 ], pwdinfo->p2p_peer_interface_addr[ 2 ], ++ pwdinfo->p2p_peer_interface_addr[ 3 ], pwdinfo->p2p_peer_interface_addr[ 4 ], pwdinfo->p2p_peer_interface_addr[ 5 ]); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_peer_devaddr(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ DBG_8192C( "[%s] Role = %d, Status = %d, peer addr = %.2X:%.2X:%.2X:%.2X:%.2X:%.2X\n", __FUNCTION__, rtw_p2p_role(pwdinfo), rtw_p2p_state(pwdinfo), ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); ++ sprintf( extra, "\n%.2X%.2X%.2X%.2X%.2X%.2X", ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 0 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 1 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 2 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 3 ], ++ pwdinfo->rx_prov_disc_info.peerDevAddr[ 4 ], pwdinfo->rx_prov_disc_info.peerDevAddr[ 5 ]); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++static int rtw_p2p_get_groupid(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++ ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ sprintf( extra, "\n%.2X:%.2X:%.2X:%.2X:%.2X:%.2X-%s", ++ pwdinfo->groupid_info.go_device_addr[ 0 ], pwdinfo->groupid_info.go_device_addr[ 1 ], ++ pwdinfo->groupid_info.go_device_addr[ 2 ], pwdinfo->groupid_info.go_device_addr[ 3 ], ++ pwdinfo->groupid_info.go_device_addr[ 4 ], pwdinfo->groupid_info.go_device_addr[ 5 ], ++ pwdinfo->groupid_info.ssid); ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++ ++ ++static int rtw_p2p_get_wps_configmethod(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ 17 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u16 attr_content = 0; ++ uint attr_contentlen = 0; ++ //6 is the string "wpsCM=", 17 is the MAC addr, we have to clear it at wrqu->data.pointer ++ u8 attr_content_str[ 6 + 17 ] = { 0x00 }; ++ ++ ++ // Commented by Albert 20110727 ++ // The input data is the MAC address which the application wants to know its WPS config method. ++ // After knowing its WPS config method, the application can decide the config method for provisioning discovery. ++ // Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05 ++ ++ DBG_8192C( "[%s] data = %s\n", __FUNCTION__, ( char* ) extra ); ++ //_rtw_memcpy( peerMACStr , extra , 17 ); ++ ++ if ( copy_from_user(peerMACStr, wrqu->data.pointer + 6 , 17) ) { ++ return -EFAULT; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( peerMACStr[kk], peerMACStr[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) ++ { ++ u8 *wpsie; ++ uint wpsie_len = 0; ++ ++ // The mac address is matched. ++ ++ if ( (wpsie=rtw_get_wps_ie( &pnetwork->network.IEs[ 12 ], pnetwork->network.IELength - 12, NULL, &wpsie_len )) ) ++ { ++ rtw_get_wps_attr_content( wpsie, wpsie_len, WPS_ATTR_CONF_METHOD, ( u8* ) &attr_content, &attr_contentlen); ++ if ( attr_contentlen ) ++ { ++ attr_content = be16_to_cpu( attr_content ); ++ sprintf( attr_content_str, "\n\nM=%.4d", attr_content ); ++ blnMatch = 1; ++ } ++ } ++ ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( !blnMatch ) ++ { ++ sprintf( attr_content_str, "\n\nM=0000" ); ++ } ++ ++ if ( copy_to_user(wrqu->data.pointer, attr_content_str, 6 + 17)) { ++ return -EFAULT; ++ } ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_WFD ++static int rtw_p2p_get_peer_WFD_port(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ DBG_871X( "[%s] p2p_state = %d\n", __FUNCTION__, rtw_p2p_state(pwdinfo) ); ++ ++ sprintf( extra, "\n\nPort=%d\n", pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ DBG_8192C( "[%s] remote port = %d\n", __FUNCTION__, pwdinfo->wfd_info.peer_rtsp_ctrlport ); ++ ++ wrqu->data.length = strlen( extra ); ++ return ret; ++ ++} ++#endif // CONFIG_WFD ++ ++static int rtw_p2p_get_device_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ 17 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ u8 blnMatch = 0; ++ u8 dev_name[ WPS_MAX_DEVICE_NAME_LEN ] = { 0x00 }; ++ uint dev_len = 0; ++ u8 dev_name_str[ WPS_MAX_DEVICE_NAME_LEN + 5 ] = { 0x00 }; // +5 is for the str "devN=", we have to clear it at wrqu->data.pointer ++ ++ // Commented by Kurt 20110727 ++ // The input data is the MAC address which the application wants to know its device name. ++ // Such user interface could show peer device's device name instead of ssid. ++ // Format: iwpriv wlanx p2p_get_wpsCM 00:E0:4C:00:00:05 ++ ++ DBG_8192C( "[%s] data = %s\n", __FUNCTION__, ( char* ) extra ); ++ //_rtw_memcpy( peerMACStr , extra , 17 ); ++ ++ if ( copy_from_user(peerMACStr, wrqu->data.pointer + 5 , 17) ) { ++ return -EFAULT; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( peerMACStr[kk], peerMACStr[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) ++ { ++ u8 *wpsie; ++ uint wpsie_len = 0; ++ ++ ++ // The mac address is matched. ++ ++ if ( (wpsie=rtw_get_wps_ie( &pnetwork->network.IEs[ 12 ], pnetwork->network.IELength - 12, NULL, &wpsie_len )) ) ++ { ++ rtw_get_wps_attr_content( wpsie, wpsie_len, WPS_ATTR_DEVICE_NAME, dev_name, &dev_len); ++ if ( dev_len ) ++ { ++ sprintf( dev_name_str, "\n\nN=%s", dev_name ); ++ blnMatch = 1; ++ } ++ } ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( !blnMatch ) ++ { ++ sprintf( dev_name_str, "\n\nN=0000" ); ++ } ++ ++ if ( copy_to_user(wrqu->data.pointer, dev_name_str, 5+ (( dev_len > 17 )? dev_len : 17) )) { ++ return -EFAULT; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_connect(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _irqL irqL; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++ ++ // Commented by Albert 20110304 ++ // The input data contains two informations. ++ // 1. First information is the MAC address which wants to formate with ++ // 2. Second information is the WPS PINCode or "pbc" string for push button method ++ // Format: 00:E0:4C:00:00:05 ++ // Format: 00:E0:4C:00:00:05 ++ ++ DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ DBG_8192C( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ ++ if ( pwdinfo->ui_got_wps_info == P2P_NO_WPSINFO ) ++ { ++ return -1; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ if ( _rtw_memcmp( pnetwork->network.MacAddress, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( uintPeerChannel ) ++ { ++ _rtw_memset( &pwdinfo->nego_req_info, 0x00, sizeof( struct tx_nego_req_info ) ); ++ _rtw_memset( &pwdinfo->groupid_info, 0x00, sizeof( struct group_id_info ) ); ++ ++ pwdinfo->nego_req_info.peer_channel_num[ 0 ] = uintPeerChannel; ++ _rtw_memcpy( pwdinfo->nego_req_info.peerDevAddr, pnetwork->network.MacAddress, ETH_ALEN ); ++ pwdinfo->nego_req_info.benable = _TRUE; ++ ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_GONEGO_ING); ++ ++ DBG_8192C( "[%s] Start PreTx Procedure!\n", __FUNCTION__ ); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_GO_NEGO_TIMEOUT ); ++ } ++ else ++ { ++ DBG_8192C( "[%s] Not Found in Scanning Queue~\n", __FUNCTION__ ); ++ ret = -1; ++ } ++exit: ++ ++ return ret; ++} ++ ++static int rtw_p2p_prov_disc(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ u8 peerMAC[ ETH_ALEN ] = { 0x00 }; ++ int jj,kk; ++ u8 peerMACStr[ ETH_ALEN * 2 ] = { 0x00 }; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ _list *plist, *phead; ++ _queue *queue = &(pmlmepriv->scanned_queue); ++ struct wlan_network *pnetwork = NULL; ++ uint uintPeerChannel = 0; ++ u8 attr_content[50] = { 0x00 }, _status = 0; ++ u8 *p2pie; ++ uint p2pielen = 0, attr_contentlen = 0; ++ _irqL irqL; ++ ++ // Commented by Albert 20110301 ++ // The input data contains two informations. ++ // 1. First information is the MAC address which wants to issue the provisioning discovery request frame. ++ // 2. Second information is the WPS configuration method which wants to discovery ++ // Format: 00:E0:4C:00:00:05_display ++ // Format: 00:E0:4C:00:00:05_keypad ++ // Format: 00:E0:4C:00:00:05_pbc ++ // Format: 00:E0:4C:00:00:05_label ++ ++ DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra ); ++ ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE) || rtw_p2p_chk_state(pwdinfo, P2P_STATE_IDLE)) ++ { ++ DBG_8192C( "[%s] WiFi Direct is disable!\n", __FUNCTION__ ); ++ return ret; ++ } ++ else ++ { ++ // Reset the content of struct tx_provdisc_req_info excluded the wps_config_method_request. ++ _rtw_memset( pwdinfo->tx_prov_disc_info.peerDevAddr, 0x00, ETH_ALEN ); ++ _rtw_memset( pwdinfo->tx_prov_disc_info.peerIFAddr, 0x00, ETH_ALEN ); ++ _rtw_memset( &pwdinfo->tx_prov_disc_info.ssid, 0x00, sizeof( NDIS_802_11_SSID ) ); ++ pwdinfo->tx_prov_disc_info.peer_channel_num[ 0 ] = 0; ++ pwdinfo->tx_prov_disc_info.peer_channel_num[ 1 ] = 0; ++ pwdinfo->tx_prov_disc_info.benable = _FALSE; ++ } ++ ++ for( jj = 0, kk = 0; jj < ETH_ALEN; jj++, kk += 3 ) ++ { ++ peerMAC[ jj ] = key_2char2num( extra[kk], extra[kk+ 1] ); ++ } ++ ++ if ( _rtw_memcmp( &extra[ 18 ], "display", 7 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_DISPLYA; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "keypad", 7 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_KEYPAD; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "pbc", 3 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_PUSH_BUTTON; ++ } ++ else if ( _rtw_memcmp( &extra[ 18 ], "label", 5 ) ) ++ { ++ pwdinfo->tx_prov_disc_info.wps_config_method_request = WPS_CM_LABEL; ++ } ++ else ++ { ++ DBG_8192C( "[%s] Unknown WPS config methodn", __FUNCTION__ ); ++ return( ret ); ++ } ++ ++ _enter_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ phead = get_list_head(queue); ++ plist = get_next(phead); ++ ++ while(1) ++ { ++ if (rtw_end_of_queue_search(phead,plist)== _TRUE) ++ break; ++ ++ pnetwork = LIST_CONTAINOR(plist, struct wlan_network, list); ++ ++ // Commented by Albert 2011/05/18 ++ // Match the device address located in the P2P IE ++ // This is for the case that the P2P device address is not the same as the P2P interface address. ++ ++ if ( (p2pie=rtw_get_p2p_ie( &pnetwork->network.IEs[12], pnetwork->network.IELength - 12, NULL, &p2pielen)) ) ++ { ++ // The P2P Device ID attribute is included in the Beacon frame. ++ // The P2P Device Info attribute is included in the probe response frame. ++ ++ if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_ID, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device ID attribute of Beacon first ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ else if ( rtw_get_p2p_attr_content( p2pie, p2pielen, P2P_ATTR_DEVICE_INFO, attr_content, &attr_contentlen) ) ++ { ++ // Handle the P2P Device Info attribute of probe response ++ if ( _rtw_memcmp( attr_content, peerMAC, ETH_ALEN ) ) ++ { ++ uintPeerChannel = pnetwork->network.Configuration.DSConfig; ++ break; ++ } ++ } ++ ++ } ++ ++ plist = get_next(plist); ++ ++ } ++ ++ _exit_critical_bh(&(pmlmepriv->scanned_queue.lock), &irqL); ++ ++ if ( uintPeerChannel ) ++ { ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerIFAddr, pnetwork->network.MacAddress, ETH_ALEN ); ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.peerDevAddr, peerMAC, ETH_ALEN ); ++ pwdinfo->tx_prov_disc_info.peer_channel_num[0] = ( u16 ) uintPeerChannel; ++ pwdinfo->tx_prov_disc_info.benable = _TRUE; ++ rtw_p2p_set_pre_state(pwdinfo, rtw_p2p_state(pwdinfo)); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_TX_PROVISION_DIS_REQ); ++ ++ if(rtw_p2p_chk_role(pwdinfo, P2P_ROLE_CLIENT)) ++ { ++ _rtw_memcpy( &pwdinfo->tx_prov_disc_info.ssid, &pnetwork->network.Ssid, sizeof( NDIS_802_11_SSID ) ); ++ } ++ else if (rtw_p2p_chk_role(pwdinfo, P2P_ROLE_DEVICE) || rtw_p2p_chk_role(pwdinfo, P2P_ROLE_GO)) ++ { ++ _rtw_memcpy( pwdinfo->tx_prov_disc_info.ssid.Ssid, pwdinfo->p2p_wildcard_ssid, P2P_WILDCARD_SSID_LEN ); ++ pwdinfo->tx_prov_disc_info.ssid.SsidLength= P2P_WILDCARD_SSID_LEN; ++ } ++ ++ set_channel_bwmode(padapter, uintPeerChannel, HAL_PRIME_CHNL_OFFSET_DONT_CARE, HT_CHANNEL_WIDTH_20); ++ _set_timer( &pwdinfo->pre_tx_scan_timer, P2P_TX_PRESCAN_TIMEOUT ); ++ _set_timer( &pwdinfo->restore_p2p_state_timer, P2P_PROVISION_TIMEOUT ); ++ ++ } ++ else ++ { ++ DBG_8192C( "[%s] NOT Found in the Scanning Queue!\n", __FUNCTION__ ); ++ } ++exit: ++ ++ return ret; ++ ++} ++ ++// Added by Albert 20110328 ++// This function is used to inform the driver the user had specified the pin code value or pbc ++// to application. ++ ++static int rtw_p2p_got_wpsinfo(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo = &( padapter->wdinfo ); ++ ++ ++ DBG_8192C( "[%s] data = %s\n", __FUNCTION__, extra ); ++ // Added by Albert 20110328 ++ // if the input data is P2P_NO_WPSINFO -> reset the wpsinfo ++ // if the input data is P2P_GOT_WPSINFO_PEER_DISPLAY_PIN -> the utility just input the PIN code got from the peer P2P device. ++ // if the input data is P2P_GOT_WPSINFO_SELF_DISPLAY_PIN -> the utility just got the PIN code from itself. ++ // if the input data is P2P_GOT_WPSINFO_PBC -> the utility just determine to use the PBC ++ ++ if ( *extra == '0' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++ } ++ else if ( *extra == '1' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PEER_DISPLAY_PIN; ++ } ++ else if ( *extra == '2' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_SELF_DISPLAY_PIN; ++ } ++ else if ( *extra == '3' ) ++ { ++ pwdinfo->ui_got_wps_info = P2P_GOT_WPSINFO_PBC; ++ } ++ else ++ { ++ pwdinfo->ui_got_wps_info = P2P_NO_WPSINFO; ++ } ++ ++ return ret; ++ ++} ++ ++#endif //CONFIG_P2P ++ ++static int rtw_p2p_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++#ifdef CONFIG_P2P ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ ++ if ( _rtw_memcmp( extra, "enable=", 7 ) ) ++ { ++ rtw_wext_p2p_enable( dev, info, wrqu, &extra[7] ); ++ } ++ else if ( _rtw_memcmp( extra, "setDN=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_p2p_setDN( dev, info, wrqu, &extra[6] ); ++ } ++ else if ( _rtw_memcmp( extra, "profilefound=", 13 ) ) ++ { ++ wrqu->data.length -= 13; ++ rtw_p2p_profilefound( dev, info, wrqu, &extra[13] ); ++ } ++ else if ( _rtw_memcmp( extra, "prov_disc=", 10 ) ) ++ { ++ wrqu->data.length -= 10; ++ rtw_p2p_prov_disc( dev, info, wrqu, &extra[10] ); ++ } ++ else if ( _rtw_memcmp( extra, "nego=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_p2p_connect( dev, info, wrqu, &extra[5] ); ++ } ++ else if ( _rtw_memcmp( extra, "intent=", 7 ) ) ++ { ++ // Commented by Albert 2011/03/23 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease 7 + 1 ++ wrqu->data.length -= 8; ++ rtw_p2p_set_intent( dev, info, wrqu, &extra[7] ); ++ } ++ else if ( _rtw_memcmp( extra, "ssid=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_p2p_set_go_nego_ssid( dev, info, wrqu, &extra[5] ); ++ } ++ else if ( _rtw_memcmp( extra, "got_wpsinfo=", 12 ) ) ++ { ++ wrqu->data.length -= 12; ++ rtw_p2p_got_wpsinfo( dev, info, wrqu, &extra[12] ); ++ } ++ else if ( _rtw_memcmp( extra, "listen_ch=", 10 ) ) ++ { ++ // Commented by Albert 2011/05/24 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease (10 + 1) ++ wrqu->data.length -= 11; ++ rtw_p2p_set_listen_ch( dev, info, wrqu, &extra[10] ); ++ } ++ else if ( _rtw_memcmp( extra, "op_ch=", 6 ) ) ++ { ++ // Commented by Albert 2011/05/24 ++ // The wrqu->data.length will include the null character ++ // So, we will decrease (6 + 1) ++ wrqu->data.length -= 7; ++ rtw_p2p_set_op_ch( dev, info, wrqu, &extra[6] ); ++ } ++ ++ ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_P2P ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); ++ ++ if ( _rtw_memcmp( wrqu->data.pointer, "status", 6 ) ) ++ { ++ rtw_p2p_get_status( dev, info, wrqu, extra ); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "role", 4 ) ) ++ { ++ rtw_p2p_get_role( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_ifa", 8 ) ) ++ { ++ rtw_p2p_get_peer_ifaddr( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "req_cm", 6 ) ) ++ { ++ rtw_p2p_get_req_cm( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_deva", 9 ) ) ++ { ++ rtw_p2p_get_peer_devaddr( dev, info, wrqu, extra); ++ } ++ else if ( _rtw_memcmp( wrqu->data.pointer, "group_id", 8 ) ) ++ { ++ rtw_p2p_get_groupid( dev, info, wrqu, extra); ++ } ++#ifdef CONFIG_WFD ++ else if ( _rtw_memcmp( wrqu->data.pointer, "peer_port", 9 ) ) ++ { ++ rtw_p2p_get_peer_WFD_port( dev, info, wrqu, extra ); ++ } ++#endif // CONFIG_WFD ++ ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++static int rtw_p2p_get2(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ ++#ifdef CONFIG_P2P ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct iw_point *pdata = &wrqu->data; ++ struct wifidirect_info *pwdinfo= &(padapter->wdinfo); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, (char*) wrqu->data.pointer ); ++ ++ if ( _rtw_memcmp( extra, "wpsCM=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_p2p_get_wps_configmethod( dev, info, wrqu, &extra[6]); ++ } ++ else if ( _rtw_memcmp( extra, "devN=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_p2p_get_device_name( dev, info, wrqu, &extra[5] ); ++ } ++ ++#endif //CONFIG_P2P ++ ++ return ret; ++ ++} ++ ++extern char *ifname; ++extern int rtw_change_ifname(_adapter *padapter, const char *ifname); ++static int rtw_rereg_nd_name(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ struct rereg_nd_name_data *rereg_priv = &padapter->rereg_nd_name_priv; ++ char new_ifname[IFNAMSIZ]; ++ ++ if(rereg_priv->old_ifname[0] == 0) { ++ strncpy(rereg_priv->old_ifname, ifname, IFNAMSIZ); ++ rereg_priv->old_ifname[IFNAMSIZ-1] = 0; ++ } ++ ++ //DBG_871X("%s wrqu->data.length:%d\n", __FUNCTION__, wrqu->data.length); ++ if(wrqu->data.length > IFNAMSIZ) ++ return -EFAULT; ++ ++ if ( copy_from_user(new_ifname, wrqu->data.pointer, IFNAMSIZ) ) { ++ return -EFAULT; ++ } ++ ++ if( 0 == strcmp(rereg_priv->old_ifname, new_ifname) ) { ++ return ret; ++ } ++ ++ DBG_871X("%s new_ifname:%s\n", __FUNCTION__, new_ifname); ++ if( 0 != (ret = rtw_change_ifname(padapter, new_ifname)) ) { ++ goto exit; ++ } ++ ++ if(_rtw_memcmp(rereg_priv->old_ifname, "disable%d", 9) == _TRUE) { ++ padapter->ledpriv.bRegUseLed= rereg_priv->old_bRegUseLed; ++ rtw_sw_led_init(padapter); ++ rtw_ips_mode_req(&padapter->pwrctrlpriv, rereg_priv->old_ips_mode); ++ } ++ ++ strncpy(rereg_priv->old_ifname, new_ifname, IFNAMSIZ); ++ rereg_priv->old_ifname[IFNAMSIZ-1] = 0; ++ ++ if(_rtw_memcmp(new_ifname, "disable%d", 9) == _TRUE) { ++ ++ DBG_871X("%s disable\n", __FUNCTION__); ++ // free network queue for Android's timming issue ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ // close led ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ rereg_priv->old_bRegUseLed = padapter->ledpriv.bRegUseLed; ++ padapter->ledpriv.bRegUseLed= _FALSE; ++ rtw_sw_led_deinit(padapter); ++ ++ // the interface is being "disabled", we can do deeper IPS ++ rereg_priv->old_ips_mode = rtw_get_ips_mode_req(&padapter->pwrctrlpriv); ++ rtw_ips_mode_req(&padapter->pwrctrlpriv, IPS_NORMAL); ++ } ++exit: ++ return ret; ++ ++} ++ ++#if 0 ++void mac_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_8192C("\n======= MAC REG =======\n"); ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++ for(i=0x400;i<0x800;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++} ++void bb_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_8192C("\n======= BB REG =======\n"); ++ for(i=0x800;i<0x1000;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++} ++void rf_reg_dump(_adapter *padapter) ++{ ++ int i,j=1,path; ++ u32 value; ++ DBG_8192C("\n======= RF REG =======\n"); ++ for(path=0;path<2;path++) ++ { ++ DBG_8192C("\nRF_Path(%x)\n",path); ++ for(i=0;i<0x100;i++) ++ { ++ value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ if(j%4==1) DBG_8192C("0x%02x ",i); ++ DBG_8192C(" 0x%08x ",value); ++ if((j++)%4==0) DBG_8192C("\n"); ++ } ++ } ++} ++ ++#endif ++ ++void mac_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_8192C("\n======= MAC REG =======\n"); ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++ for(i=0x400;i<0x800;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++} ++void bb_reg_dump(_adapter *padapter) ++{ ++ int i,j=1; ++ DBG_8192C("\n======= BB REG =======\n"); ++ for(i=0x800;i<0x1000;i+=4) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++} ++void rf_reg_dump(_adapter *padapter) ++{ ++ int i,j=1,path; ++ u32 value; ++ u8 rf_type,path_nums = 0; ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_8192C("\n======= RF REG =======\n"); ++ if((RF_1T2R == rf_type) ||(RF_1T1R ==rf_type )) ++ path_nums = 1; ++ else ++ path_nums = 2; ++ ++ for(path=0;pathHalFunc.read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) DBG_8192C("0x%02x ",i); ++ DBG_8192C(" 0x%08x ",value); ++ if((j++)%4==0) DBG_8192C("\n"); ++ } ++ } ++} ++ ++#ifdef CONFIG_IOL ++#include ++#endif ++static int rtw_dbg_port(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _irqL irqL; ++ int ret = 0; ++ u8 major_cmd, minor_cmd; ++ u16 arg; ++ u32 extra_arg, *pdata, val32; ++ struct sta_info *psta; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct wlan_network *cur_network = &(pmlmepriv->cur_network); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ ++ pdata = (u32*)&wrqu->data; ++ ++ val32 = *pdata; ++ arg = (u16)(val32&0x0000ffff); ++ major_cmd = (u8)(val32>>24); ++ minor_cmd = (u8)((val32>>16)&0x00ff); ++ ++ extra_arg = *(pdata+1); ++ ++ switch(major_cmd) ++ { ++ case 0x70://read_reg ++ switch(minor_cmd) ++ { ++ case 1: ++ DBG_8192C("rtw_read8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); ++ break; ++ case 2: ++ DBG_8192C("rtw_read16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); ++ break; ++ case 4: ++ DBG_8192C("rtw_read32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); ++ break; ++ } ++ break; ++ case 0x71://write_reg ++ switch(minor_cmd) ++ { ++ case 1: ++ rtw_write8(padapter, arg, extra_arg); ++ DBG_8192C("rtw_write8(0x%x)=0x%02x\n", arg, rtw_read8(padapter, arg)); ++ break; ++ case 2: ++ rtw_write16(padapter, arg, extra_arg); ++ DBG_8192C("rtw_write16(0x%x)=0x%04x\n", arg, rtw_read16(padapter, arg)); ++ break; ++ case 4: ++ rtw_write32(padapter, arg, extra_arg); ++ DBG_8192C("rtw_write32(0x%x)=0x%08x\n", arg, rtw_read32(padapter, arg)); ++ break; ++ } ++ break; ++ case 0x72://read_bb ++ DBG_8192C("read_bbreg(0x%x)=0x%x\n", arg, padapter->HalFunc.read_bbreg(padapter, arg, 0xffffffff)); ++ break; ++ case 0x73://write_bb ++ padapter->HalFunc.write_bbreg(padapter, arg, 0xffffffff, extra_arg); ++ DBG_8192C("write_bbreg(0x%x)=0x%x\n", arg, padapter->HalFunc.read_bbreg(padapter, arg, 0xffffffff)); ++ break; ++ case 0x74://read_rf ++ DBG_8192C("read RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg,padapter->HalFunc.read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); ++ break; ++ case 0x75://write_rf ++ padapter->HalFunc.write_rfreg(padapter, minor_cmd, arg, 0xffffffff, extra_arg); ++ DBG_8192C("write RF_reg path(0x%02x),offset(0x%x),value(0x%08x)\n",minor_cmd,arg, padapter->HalFunc.read_rfreg(padapter, minor_cmd, arg, 0xffffffff)); ++ break; ++ ++ case 0x76: ++ switch(minor_cmd) ++ { ++ case 0x00: //normal mode, ++ padapter->recvpriv.is_signal_dbg = 0; ++ break; ++ case 0x01: //dbg mode ++ padapter->recvpriv.is_signal_dbg = 1; ++ extra_arg = extra_arg>100?100:extra_arg; ++ extra_arg = extra_arg<0?0:extra_arg; ++ padapter->recvpriv.signal_strength_dbg=extra_arg; ++ break; ++ } ++ break; ++ case 0x78: //IOL test ++ switch(minor_cmd) ++ { ++ #ifdef CONFIG_IOL ++ case 0x04: //LLT table initialization test ++ { ++ u8 page_boundary = 0xf9; ++ { ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ rtw_IOL_append_LLT_cmd(xmit_frame, page_boundary); ++ ++ ++ if(_SUCCESS != rtw_IOL_exec_cmds_sync(padapter, xmit_frame, 500) ) ++ ret = -EPERM; ++ } ++ } ++ break; ++ case 0x05: //blink LED test ++ { ++ u16 reg = 0x4c; ++ u32 blink_num = 50; ++ u32 blink_delay_ms = 200; ++ int i; ++ ++ { ++ struct xmit_frame *xmit_frame; ++ ++ if((xmit_frame=rtw_IOL_accquire_xmit_frame(padapter)) == NULL) { ++ ret = -ENOMEM; ++ break; ++ } ++ ++ for(i=0;idot11AuthAlgrthm, psecuritypriv->dot11PrivacyAlgrthm, ++ psecuritypriv->ndisauthtype, psecuritypriv->ndisencryptstatus); ++ break; ++ case 0x02: ++ DBG_8192C("pmlmeinfo->state=0x%x\n", pmlmeinfo->state); ++ break; ++ case 0x03: ++ DBG_8192C("qos_option=%d\n", pmlmepriv->qospriv.qos_option); ++ DBG_8192C("ht_option=%d\n", pmlmepriv->htpriv.ht_option); ++ break; ++ case 0x04: ++ DBG_8192C("cur_ch=%d\n", pmlmeext->cur_channel); ++ DBG_8192C("cur_bw=%d\n", pmlmeext->cur_bwmode); ++ DBG_8192C("cur_ch_off=%d\n", pmlmeext->cur_ch_offset); ++ break; ++ case 0x05: ++ psta = rtw_get_stainfo(pstapriv, cur_network->network.MacAddress); ++ if(psta) ++ { ++ int i; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++ DBG_8192C("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ DBG_8192C("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ DBG_8192C("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ DBG_8192C("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ DBG_8192C("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ DBG_8192C("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ DBG_8192C("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ ++ for(i=0;i<16;i++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[i]; ++ if(preorder_ctrl->enable) ++ { ++ DBG_8192C("tid=%d, indicate_seq=%d\n", i, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ else ++ { ++ DBG_8192C("can't get sta's macaddr, cur_network's macaddr:" MAC_FMT "\n", MAC_ARG(cur_network->network.MacAddress)); ++ } ++ break; ++ case 0x06: ++ { ++ u8 DMFlag; ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag)); ++ DBG_8192C("(B)DMFlag=0x%x, arg=0x%x\n", DMFlag, arg); ++ DMFlag = (u8)(0x0f&arg); ++ DBG_8192C("(A)DMFlag=0x%x\n", DMFlag); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_DM_FLAG, (u8 *)(&DMFlag)); ++ } ++ break; ++ case 0x07: ++ DBG_8192C("bSurpriseRemoved=%d, bDriverStopped=%d\n", ++ padapter->bSurpriseRemoved, padapter->bDriverStopped); ++ break; ++ case 0x08: ++ { ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++ DBG_8192C("free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d\n", ++ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt); ++ #ifdef CONFIG_USB_HCI ++ DBG_8192C("rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt); ++ #endif ++ } ++ break; ++ case 0x09: ++ { ++ int i, j; ++ _list *plist, *phead; ++ struct recv_reorder_ctrl *preorder_ctrl; ++ ++#ifdef CONFIG_AP_MODE ++ DBG_8192C("sta_dz_bitmap=0x%x, tim_bitmap=0x%x\n", pstapriv->sta_dz_bitmap, pstapriv->tim_bitmap); ++#endif ++ _enter_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ for(i=0; i< NUM_STA; i++) ++ { ++ phead = &(pstapriv->sta_hash[i]); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, hash_list); ++ ++ plist = get_next(plist); ++ ++ if(extra_arg == psta->aid) ++ { ++ DBG_8192C("sta's macaddr:" MAC_FMT "\n", MAC_ARG(psta->hwaddr)); ++ DBG_8192C("rtsen=%d, cts2slef=%d\n", psta->rtsen, psta->cts2self); ++ DBG_8192C("qos_en=%d, ht_en=%d, init_rate=%d\n", psta->qos_option, psta->htpriv.ht_option, psta->init_rate); ++ DBG_8192C("state=0x%x, aid=%d, macid=%d, raid=%d\n", psta->state, psta->aid, psta->mac_id, psta->raid); ++ DBG_8192C("bwmode=%d, ch_offset=%d, sgi=%d\n", psta->htpriv.bwmode, psta->htpriv.ch_offset, psta->htpriv.sgi); ++ DBG_8192C("ampdu_enable = %d\n", psta->htpriv.ampdu_enable); ++ DBG_8192C("agg_enable_bitmap=%x, candidate_tid_bitmap=%x\n", psta->htpriv.agg_enable_bitmap, psta->htpriv.candidate_tid_bitmap); ++ DBG_8192C("capability=0x%x\n", psta->capability); ++ DBG_8192C("flags=0x%x\n", psta->flags); ++ DBG_8192C("wpa_psk=0x%x\n", psta->wpa_psk); ++ DBG_8192C("wpa2_group_cipher=0x%x\n", psta->wpa2_group_cipher); ++ DBG_8192C("wpa2_pairwise_cipher=0x%x\n", psta->wpa2_pairwise_cipher); ++ DBG_8192C("qos_info=0x%x\n", psta->qos_info); ++ DBG_8192C("dot118021XPrivacy=0x%x\n", psta->dot118021XPrivacy); ++ ++ ++ ++ for(j=0;j<16;j++) ++ { ++ preorder_ctrl = &psta->recvreorder_ctrl[j]; ++ if(preorder_ctrl->enable) ++ { ++ DBG_8192C("tid=%d, indicate_seq=%d\n", j, preorder_ctrl->indicate_seq); ++ } ++ } ++ ++ } ++ ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->sta_hash_lock, &irqL); ++ ++ } ++ break; ++ ++ case 0x0c://dump rx packet ++ { ++ DBG_8192C("dump rx packet (%d)\n",extra_arg); ++ //pHalData->bDumpRxPkt =extra_arg; ++ padapter->HalFunc.SetHalDefVarHandler(padapter, HAL_DEF_DBG_DUMP_RXPKT, &(extra_arg)); ++ } ++ break; ++#if 0 ++ case 0x0d://dump cam ++ { ++ //u8 entry = (u8) extra_arg; ++ u8 entry=0; ++ //dump cam ++ for(entry=0;entry<32;entry++) ++ read_cam(padapter,entry); ++ } ++ break; ++#endif ++ #ifdef DBG_CONFIG_ERROR_DETECT ++ case 0x0f: ++ { ++ if(extra_arg == 0){ ++ DBG_8192C("###### silent reset test.......#####\n"); ++ if(padapter->HalFunc.silentreset) ++ padapter->HalFunc.silentreset(padapter); ++ } ++ ++ } ++ break; ++ case 0x12: ++ { ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ DBG_8192C("==>silent resete cnts:%d\n",pwrpriv->ips_enter_cnts); ++ } ++ break; ++ ++ #endif ++ ++ case 0x10:// driver version display ++ DBG_8192C("rtw driver version=%s\n", DRIVERVERSION); ++ break; ++ case 0x11: ++ { ++ DBG_8192C("turn %s Rx RSSI display function\n",(extra_arg==1)?"on":"off"); ++ padapter->bRxRSSIDisplay = extra_arg ; ++ } ++ break; ++#if 1 ++ case 0xdd://registers dump , 0 for mac reg,1 for bb reg, 2 for rf reg ++ { ++ if(extra_arg==0){ ++ mac_reg_dump(padapter); ++ } ++ else if(extra_arg==1){ ++ bb_reg_dump(padapter); ++ } ++ else if(extra_arg==2){ ++ rf_reg_dump(padapter); ++ } ++ ++ } ++ break; ++#endif ++ case 0xee://turn on/off dynamic funcs ++ { ++ u8 dm_flag; ++ ++ if(0xf==extra_arg){ ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag); ++ DBG_8192C(" === DMFlag(0x%02x) === \n",dm_flag); ++ DBG_8192C("extra_arg = 0 - disable all dynamic func \n"); ++ DBG_8192C("extra_arg = 1 - disable DIG- BIT(0)\n"); ++ DBG_8192C("extra_arg = 2 - disable High power - BIT(1)\n"); ++ DBG_8192C("extra_arg = 3 - disable tx power tracking - BIT(2)\n"); ++ DBG_8192C("extra_arg = 4 - disable BT coexistence - BIT(3)\n"); ++ DBG_8192C("extra_arg = 5 - disable antenna diversity - BIT(4)\n"); ++ DBG_8192C("extra_arg = 6 - enable all dynamic func \n"); ++ } ++ else{ ++ /* extra_arg = 0 - disable all dynamic func ++ extra_arg = 1 - disable DIG ++ extra_arg = 2 - disable tx power tracking ++ extra_arg = 3 - turn on all dynamic func ++ */ ++ padapter->HalFunc.SetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC, &(extra_arg)); ++ padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_DBG_DM_FUNC,&dm_flag); ++ DBG_8192C(" === DMFlag(0x%02x) === \n",dm_flag); ++ } ++ } ++ break; ++ ++ case 0xfd: ++ rtw_write8(padapter, 0xc50, arg); ++ DBG_8192C("wr(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); ++ rtw_write8(padapter, 0xc58, arg); ++ DBG_8192C("wr(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); ++ break; ++ case 0xfe: ++ DBG_8192C("rd(0xc50)=0x%x\n", rtw_read8(padapter, 0xc50)); ++ DBG_8192C("rd(0xc58)=0x%x\n", rtw_read8(padapter, 0xc58)); ++ break; ++ case 0xff: ++ { ++ DBG_8192C("dbg(0x210)=0x%x\n", rtw_read32(padapter, 0x210)); ++ DBG_8192C("dbg(0x608)=0x%x\n", rtw_read32(padapter, 0x608)); ++ DBG_8192C("dbg(0x280)=0x%x\n", rtw_read32(padapter, 0x280)); ++ DBG_8192C("dbg(0x284)=0x%x\n", rtw_read32(padapter, 0x284)); ++ DBG_8192C("dbg(0x288)=0x%x\n", rtw_read32(padapter, 0x288)); ++ ++ DBG_8192C("dbg(0x664)=0x%x\n", rtw_read32(padapter, 0x664)); ++ ++ ++ DBG_8192C("\n"); ++ ++ DBG_8192C("dbg(0x430)=0x%x\n", rtw_read32(padapter, 0x430)); ++ DBG_8192C("dbg(0x438)=0x%x\n", rtw_read32(padapter, 0x438)); ++ ++ DBG_8192C("dbg(0x440)=0x%x\n", rtw_read32(padapter, 0x440)); ++ ++ DBG_8192C("dbg(0x458)=0x%x\n", rtw_read32(padapter, 0x458)); ++ ++ DBG_8192C("dbg(0x484)=0x%x\n", rtw_read32(padapter, 0x484)); ++ DBG_8192C("dbg(0x488)=0x%x\n", rtw_read32(padapter, 0x488)); ++ ++ DBG_8192C("dbg(0x444)=0x%x\n", rtw_read32(padapter, 0x444)); ++ DBG_8192C("dbg(0x448)=0x%x\n", rtw_read32(padapter, 0x448)); ++ DBG_8192C("dbg(0x44c)=0x%x\n", rtw_read32(padapter, 0x44c)); ++ DBG_8192C("dbg(0x450)=0x%x\n", rtw_read32(padapter, 0x450)); ++ } ++ break; ++ } ++ break; ++ default: ++ DBG_8192C("error dbg cmd!\n"); ++ break; ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int wpa_set_param(struct net_device *dev, u8 name, u32 value) ++{ ++ uint ret=0; ++ u32 flags; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ switch (name){ ++ case IEEE_PARAM_WPA_ENABLED: ++ ++ padapter->securitypriv.dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; //802.1x ++ ++ //ret = ieee80211_wpa_enable(ieee, value); ++ ++ switch((value)&0xff) ++ { ++ case 1 : //WPA ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPAPSK; //WPA_PSK ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption2Enabled; ++ break; ++ case 2: //WPA2 ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeWPA2PSK; //WPA2_PSK ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11Encryption3Enabled; ++ break; ++ } ++ ++ RT_TRACE(_module_rtl871x_ioctl_os_c,_drv_info_,("wpa_set_param:padapter->securitypriv.ndisauthtype=%d\n", padapter->securitypriv.ndisauthtype)); ++ ++ break; ++ ++ case IEEE_PARAM_TKIP_COUNTERMEASURES: ++ //ieee->tkip_countermeasures=value; ++ break; ++ ++ case IEEE_PARAM_DROP_UNENCRYPTED: ++ { ++ /* HACK: ++ * ++ * wpa_supplicant calls set_wpa_enabled when the driver ++ * is loaded and unloaded, regardless of if WPA is being ++ * used. No other calls are made which can be used to ++ * determine if encryption will be used or not prior to ++ * association being expected. If encryption is not being ++ * used, drop_unencrypted is set to false, else true -- we ++ * can use this to determine if the CAP_PRIVACY_ON bit should ++ * be set. ++ */ ++ ++#if 0 ++ struct ieee80211_security sec = { ++ .flags = SEC_ENABLED, ++ .enabled = value, ++ }; ++ ieee->drop_unencrypted = value; ++ /* We only change SEC_LEVEL for open mode. Others ++ * are set by ipw_wpa_set_encryption. ++ */ ++ if (!value) { ++ sec.flags |= SEC_LEVEL; ++ sec.level = SEC_LEVEL_0; ++ } ++ else { ++ sec.flags |= SEC_LEVEL; ++ sec.level = SEC_LEVEL_1; ++ } ++ if (ieee->set_security) ++ ieee->set_security(ieee->dev, &sec); ++#endif ++ break; ++ ++ } ++ case IEEE_PARAM_PRIVACY_INVOKED: ++ ++ //ieee->privacy_invoked=value; ++ ++ break; ++ ++ case IEEE_PARAM_AUTH_ALGS: ++ ++ ret = wpa_set_auth_algs(dev, value); ++ ++ break; ++ ++ case IEEE_PARAM_IEEE_802_1X: ++ ++ //ieee->ieee802_1x=value; ++ ++ break; ++ ++ case IEEE_PARAM_WPAX_SELECT: ++ ++ // added for WPA2 mixed mode ++ //DBG_8192C(KERN_WARNING "------------------------>wpax value = %x\n", value); ++ /* ++ spin_lock_irqsave(&ieee->wpax_suitlist_lock,flags); ++ ieee->wpax_type_set = 1; ++ ieee->wpax_type_notify = value; ++ spin_unlock_irqrestore(&ieee->wpax_suitlist_lock,flags); ++ */ ++ ++ break; ++ ++ default: ++ ++ ++ ++ ret = -EOPNOTSUPP; ++ ++ ++ break; ++ ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_mlme(struct net_device *dev, u32 command, u32 reason) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ switch (command) ++ { ++ case IEEE_MLME_STA_DEAUTH: ++ ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ case IEEE_MLME_STA_DISASSOC: ++ ++ if(!rtw_set_802_11_disassociate(padapter)) ++ ret = -1; ++ ++ break; ++ ++ default: ++ ret = -EOPNOTSUPP; ++ break; ++ } ++ ++ return ret; ++ ++} ++ ++static int wpa_supplicant_ioctl(struct net_device *dev, struct iw_point *p) ++{ ++ struct ieee_param *param; ++ uint ret=0; ++ ++ //down(&ieee->wx_sem); ++ ++ if (p->length < sizeof(struct ieee_param) || !p->pointer){ ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ param = (struct ieee_param *)rtw_malloc(p->length); ++ if (param == NULL) ++ { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (copy_from_user(param, p->pointer, p->length)) ++ { ++ rtw_mfree((u8*)param, p->length); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ switch (param->cmd) { ++ ++ case IEEE_CMD_SET_WPA_PARAM: ++ ret = wpa_set_param(dev, param->u.wpa_param.name, param->u.wpa_param.value); ++ break; ++ ++ case IEEE_CMD_SET_WPA_IE: ++ //ret = wpa_set_wpa_ie(dev, param, p->length); ++ ret = rtw_set_wpa_ie((_adapter *)rtw_netdev_priv(dev), (char*)param->u.wpa_ie.data, (u16)param->u.wpa_ie.len); ++ break; ++ ++ case IEEE_CMD_SET_ENCRYPTION: ++ ret = wpa_set_encryption(dev, param, p->length); ++ break; ++ ++ case IEEE_CMD_MLME: ++ ret = wpa_mlme(dev, param->u.mlme.command, param->u.mlme.reason_code); ++ break; ++ ++ default: ++ DBG_8192C("Unknown WPA supplicant request: %d\n", param->cmd); ++ ret = -EOPNOTSUPP; ++ break; ++ ++ } ++ ++ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ++ ret = -EFAULT; ++ ++ rtw_mfree((u8 *)param, p->length); ++ ++out: ++ ++ //up(&ieee->wx_sem); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_AP_MODE ++static u8 set_pairwise_key(_adapter *padapter, struct sta_info *psta) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ++ ++ psetstakey_para->algorithm = (u8)psta->dot118021XPrivacy; ++ ++ _rtw_memcpy(psetstakey_para->addr, psta->hwaddr, ETH_ALEN); ++ ++ _rtw_memcpy(psetstakey_para->key, &psta->dot118021x_UncstKey, 16); ++ ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++ ++} ++ ++static int set_group_key(_adapter *padapter, u8 *key, u8 alg, int keyid) ++{ ++ u8 keylen; ++ struct cmd_obj* pcmd; ++ struct setkey_parm *psetkeyparm; ++ struct cmd_priv *pcmdpriv=&(padapter->cmdpriv); ++ int res=_SUCCESS; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ pcmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmd==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ psetkeyparm=(struct setkey_parm*)rtw_zmalloc(sizeof(struct setkey_parm)); ++ if(psetkeyparm==NULL){ ++ rtw_mfree((unsigned char *)pcmd, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ _rtw_memset(psetkeyparm, 0, sizeof(struct setkey_parm)); ++ ++ psetkeyparm->keyid=(u8)keyid; ++ ++ psetkeyparm->algorithm = alg; ++ ++ psetkeyparm->set_tx = 1; ++ ++ switch(alg) ++ { ++ case _WEP40_: ++ keylen = 5; ++ break; ++ case _WEP104_: ++ keylen = 13; ++ break; ++ case _TKIP_: ++ case _TKIP_WTMIC_: ++ case _AES_: ++ keylen = 16; ++ default: ++ keylen = 16; ++ } ++ ++ _rtw_memcpy(&(psetkeyparm->key[0]), key, keylen); ++ ++ pcmd->cmdcode = _SetKey_CMD_; ++ pcmd->parmbuf = (u8 *)psetkeyparm; ++ pcmd->cmdsz = (sizeof(struct setkey_parm)); ++ pcmd->rsp = NULL; ++ pcmd->rspsz = 0; ++ ++ ++ _rtw_init_listhead(&pcmd->list); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, pcmd); ++ ++exit: ++ ++ return res; ++ ++ ++} ++ ++static int set_wep_key(_adapter *padapter, u8 *key, u8 keylen, int keyid) ++{ ++ u8 alg; ++ ++ switch(keylen) ++ { ++ case 5: ++ alg =_WEP40_; ++ break; ++ case 13: ++ alg =_WEP104_; ++ break; ++ default: ++ alg =_NO_PRIVACY_; ++ } ++ ++ return set_group_key(padapter, key, alg, keyid); ++ ++} ++ ++ ++static int rtw_set_encryption(struct net_device *dev, struct ieee_param *param, u32 param_len) ++{ ++ int ret = 0; ++ u32 wep_key_idx, wep_key_len,wep_total_len; ++ NDIS_802_11_WEP *pwep = NULL; ++ struct sta_info *psta = NULL, *pbcmc_sta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ param->u.crypt.err = 0; ++ param->u.crypt.alg[IEEE_CRYPT_ALG_NAME_LEN - 1] = '\0'; ++ ++ //sizeof(struct ieee_param) = 64 bytes; ++ //if (param_len != (u32) ((u8 *) param->u.crypt.key - (u8 *) param) + param->u.crypt.key_len) ++ if (param_len != sizeof(struct ieee_param) + param->u.crypt.key_len) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ if (param->u.crypt.idx >= WEP_KEYS) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ } ++ else ++ { ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(!psta) ++ { ++ //ret = -EINVAL; ++ DBG_8192C("rtw_set_encryption(), sta has already been removed or never been added\n"); ++ goto exit; ++ } ++ } ++ ++ if (strcmp(param->u.crypt.alg, "none") == 0 && (psta==NULL)) ++ { ++ //todo:clear default encryption keys ++ ++ DBG_8192C("clear default encryption keys, keyid=%d\n", param->u.crypt.idx); ++ ++ goto exit; ++ } ++ ++ ++ if (strcmp(param->u.crypt.alg, "WEP") == 0 && (psta==NULL)) ++ { ++ DBG_8192C("r871x_set_encryption, crypt.alg = WEP\n"); ++ ++ wep_key_idx = param->u.crypt.idx; ++ wep_key_len = param->u.crypt.key_len; ++ ++ DBG_8192C("r871x_set_encryption, wep_key_idx=%d, len=%d\n", wep_key_idx, wep_key_len); ++ ++ if((wep_key_idx >= WEP_KEYS) || (wep_key_len<=0)) ++ { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ++ if (wep_key_len > 0) ++ { ++ wep_key_len = wep_key_len <= 5 ? 5 : 13; ++ wep_total_len = wep_key_len + FIELD_OFFSET(NDIS_802_11_WEP, KeyMaterial); ++ pwep =(NDIS_802_11_WEP *)rtw_malloc(wep_total_len); ++ if(pwep == NULL){ ++ DBG_8192C(" r871x_set_encryption: pwep allocate fail !!!\n"); ++ goto exit; ++ } ++ ++ _rtw_memset(pwep, 0, wep_total_len); ++ ++ pwep->KeyLength = wep_key_len; ++ pwep->Length = wep_total_len; ++ ++ } ++ ++ pwep->KeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(pwep->KeyMaterial, param->u.crypt.key, pwep->KeyLength); ++ ++ if(param->u.crypt.set_tx) ++ { ++ DBG_8192C("wep, set_tx=1\n"); ++ ++ psecuritypriv->ndisencryptstatus = Ndis802_11Encryption1Enabled; ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP40_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP40_; ++ ++ if(pwep->KeyLength==13) ++ { ++ psecuritypriv->dot11PrivacyAlgrthm=_WEP104_; ++ psecuritypriv->dot118021XGrpPrivacy=_WEP104_; ++ } ++ ++ ++ psecuritypriv->dot11PrivacyKeyIndex = wep_key_idx; ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx]=pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ ++ } ++ else ++ { ++ DBG_8192C("wep, set_tx=0\n"); ++ ++ //don't update "psecuritypriv->dot11PrivacyAlgrthm" and ++ //"psecuritypriv->dot11PrivacyKeyIndex=keyid", but can rtw_set_key to cam ++ ++ _rtw_memcpy(&(psecuritypriv->dot11DefKey[wep_key_idx].skey[0]), pwep->KeyMaterial, pwep->KeyLength); ++ ++ psecuritypriv->dot11DefKeylen[wep_key_idx] = pwep->KeyLength; ++ ++ set_wep_key(padapter, pwep->KeyMaterial, pwep->KeyLength, wep_key_idx); ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ ++ if(!psta && check_fwstate(pmlmepriv, WIFI_AP_STATE)) // //group key ++ { ++ if(param->u.crypt.set_tx ==1) ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set group_key, WEP\n", __FUNCTION__); ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set group_key, TKIP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ DBG_8192C("%s, set group_key, CCMP\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ DBG_8192C("%s, set group_key, none\n", __FUNCTION__); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ goto exit; ++ ++ } ++ ++ if(psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X && psta) // psk/802_1x ++ { ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE)) ++ { ++ if(param->u.crypt.set_tx ==1) ++ { ++ _rtw_memcpy(psta->dot118021x_UncstKey.skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, WEP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psta->dot118021XPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ DBG_8192C("%s, set pairwise key, TKIP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _TKIP_; ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psta->dot11tkiptxmickey.skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psta->dot11tkiprxmickey.skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ ++ DBG_8192C("%s, set pairwise key, CCMP\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _AES_; ++ } ++ else ++ { ++ DBG_8192C("%s, set pairwise key, none\n", __FUNCTION__); ++ ++ psta->dot118021XPrivacy = _NO_PRIVACY_; ++ } ++ ++ set_pairwise_key(padapter, psta); ++ ++ psta->ieee8021x_blocked = _FALSE; ++ ++ } ++ else//group key??? ++ { ++ if(strcmp(param->u.crypt.alg, "WEP") == 0) ++ { ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ psecuritypriv->dot118021XGrpPrivacy = _WEP40_; ++ if(param->u.crypt.key_len==13) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _WEP104_; ++ } ++ } ++ else if(strcmp(param->u.crypt.alg, "TKIP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _TKIP_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ ++ //DEBUG_ERR("set key length :param->u.crypt.key_len=%d\n", param->u.crypt.key_len); ++ //set mic key ++ _rtw_memcpy(psecuritypriv->dot118021XGrptxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[16]), 8); ++ _rtw_memcpy(psecuritypriv->dot118021XGrprxmickey[param->u.crypt.idx].skey, &(param->u.crypt.key[24]), 8); ++ ++ psecuritypriv->busetkipkey = _TRUE; ++ ++ } ++ else if(strcmp(param->u.crypt.alg, "CCMP") == 0) ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _AES_; ++ ++ _rtw_memcpy(psecuritypriv->dot118021XGrpKey[param->u.crypt.idx].skey, param->u.crypt.key, (param->u.crypt.key_len>16 ?16:param->u.crypt.key_len)); ++ } ++ else ++ { ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ } ++ ++ psecuritypriv->dot118021XGrpKeyid = param->u.crypt.idx; ++ ++ psecuritypriv->binstallGrpkey = _TRUE; ++ ++ psecuritypriv->dot11PrivacyAlgrthm = psecuritypriv->dot118021XGrpPrivacy;//!!! ++ ++ set_group_key(padapter, param->u.crypt.key, psecuritypriv->dot118021XGrpPrivacy, param->u.crypt.idx); ++ ++ pbcmc_sta=rtw_get_bcmc_stainfo(padapter); ++ if(pbcmc_sta) ++ { ++ pbcmc_sta->ieee8021x_blocked = _FALSE; ++ pbcmc_sta->dot118021XPrivacy= psecuritypriv->dot118021XGrpPrivacy;//rx will use bmc_sta's dot118021XPrivacy ++ } ++ ++ } ++ ++ } ++ ++ } ++ ++exit: ++ ++ if(pwep) ++ { ++ rtw_mfree((u8 *)pwep, wep_total_len); ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_set_beacon(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ unsigned char *pbuf = param->u.bcn_ie.buf; ++ ++ ++ DBG_8192C("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ _rtw_memcpy(&pstapriv->max_num_sta, param->u.bcn_ie.reserved, 2); ++#ifdef SUPPORT_64_STA ++ pstapriv->max_num_sta = NUM_STA; ++#else //SUPPORT_64_STA ++ if((pstapriv->max_num_sta>NUM_STA) || (pstapriv->max_num_sta<=0)) ++ pstapriv->max_num_sta = NUM_STA; ++#endif//SUPPORT_64_STA ++ ++ if(rtw_check_beacon_data(padapter, pbuf, (len-12-2)) == _SUCCESS)// 12 = param header, 2:no packed ++ ret = 0; ++ else ++ ret = -EINVAL; ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_hostapd_sta_flush(struct net_device *dev) ++{ ++ //_irqL irqL; ++ //_list *phead, *plist; ++ int ret=0; ++ //struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ //struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ flush_all_cam_entry(padapter); //clear CAM ++ ++#if 0 ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //free sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ rtw_list_delete(&psta->asoc_list); ++ ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ } ++#endif ++ ++ ret = rtw_sta_flush(padapter); ++ ++ return ret; ++ ++} ++ ++static int rtw_add_sta(struct net_device *dev, struct ieee_param *param) ++{ ++ _irqL irqL; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("rtw_add_sta(aid=%d)=" MAC_FMT "\n", param->u.add_sta.aid, MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++/* ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ DBG_8192C("rtw_add_sta(), free has been added psta=%p\n", psta); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ psta = NULL; ++ } ++*/ ++ //psta = rtw_alloc_stainfo(pstapriv, param->sta_addr); ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ int flags = param->u.add_sta.flags; ++ ++ //DBG_8192C("rtw_add_sta(), init sta's variables, psta=%p\n", psta); ++ ++ psta->aid = param->u.add_sta.aid;//aid=1~2007 ++ ++ _rtw_memcpy(psta->bssrateset, param->u.add_sta.tx_supp_rates, 16); ++ ++ ++ //check wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //chec 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ _rtw_memcpy((void*)&psta->htpriv.ht_cap, (void*)¶m->u.add_sta.ht_cap, sizeof(struct rtw_ieee80211_ht_cap)); ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++ } ++ else ++ { ++ ret = -ENOMEM; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_del_sta(struct net_device *dev, struct ieee_param *param) ++{ ++ _irqL irqL; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("rtw_del_sta=" MAC_FMT "\n", MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ //DBG_8192C("free psta=%p, aid=%d\n", psta, psta->aid); ++ ++#if 0 ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ issue_deauth(padapter, psta->hwaddr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ pstapriv->sta_dz_bitmap &=~BIT(psta->aid); ++ pstapriv->tim_bitmap &=~BIT(psta->aid); ++#endif ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if(rtw_is_list_empty(&psta->asoc_list)==_FALSE) ++ { ++ rtw_list_delete(&psta->asoc_list); ++ ap_free_sta(padapter, psta); ++ ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ } ++ else ++ { ++ DBG_8192C("rtw_del_sta(), sta has already been removed or never been added\n"); ++ ++ //ret = -1; ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_get_sta_wpaie(struct net_device *dev, struct ieee_param *param) ++{ ++ int ret=0; ++ struct sta_info *psta = NULL; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ DBG_8192C("rtw_get_sta_wpaie, sta_addr: " MAC_FMT "\n", MAC_ARG(param->sta_addr)); ++ ++ if(check_fwstate(pmlmepriv, (_FW_LINKED|WIFI_AP_STATE)) != _TRUE) ++ { ++ return -EINVAL; ++ } ++ ++ if (param->sta_addr[0] == 0xff && param->sta_addr[1] == 0xff && ++ param->sta_addr[2] == 0xff && param->sta_addr[3] == 0xff && ++ param->sta_addr[4] == 0xff && param->sta_addr[5] == 0xff) ++ { ++ return -EINVAL; ++ } ++ ++ psta = rtw_get_stainfo(pstapriv, param->sta_addr); ++ if(psta) ++ { ++ if((psta->wpa_ie[0] == WLAN_EID_RSN) || (psta->wpa_ie[0] == WLAN_EID_GENERIC)) ++ { ++ int wpa_ie_len; ++ int copy_len; ++ ++ wpa_ie_len = psta->wpa_ie[1]; ++ ++ copy_len = ((wpa_ie_len+2) > sizeof(psta->wpa_ie)) ? (sizeof(psta->wpa_ie)):(wpa_ie_len+2); ++ ++ param->u.wpa_ie.len = copy_len; ++ ++ _rtw_memcpy(param->u.wpa_ie.reserved, psta->wpa_ie, copy_len); ++ } ++ else ++ { ++ //ret = -1; ++ DBG_8192C("sta's wpa_ie is NONE\n"); ++ } ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_set_wps_beacon(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ unsigned char wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ int ie_len; ++ ++ DBG_8192C("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_beacon_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_beacon_ie, pmlmepriv->wps_beacon_ie_len); ++ pmlmepriv->wps_beacon_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_beacon_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_beacon_ie_len = ie_len; ++ if ( pmlmepriv->wps_beacon_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_beacon_ie, param->u.bcn_ie.buf, ie_len); ++ ++ update_beacon(padapter, _VENDOR_SPECIFIC_IE_, wps_oui, _TRUE); ++ ++ pmlmeext->bstart_bss = _TRUE; ++ ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_set_wps_probe_resp(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int ie_len; ++ ++ DBG_8192C("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_probe_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_probe_resp_ie, pmlmepriv->wps_probe_resp_ie_len); ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_probe_resp_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_probe_resp_ie_len = ie_len; ++ if ( pmlmepriv->wps_probe_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ _rtw_memcpy(pmlmepriv->wps_probe_resp_ie, param->u.bcn_ie.buf, ie_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_set_hidden_ssid(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ u8 value; ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ if(param->u.wpa_param.name != 0) //dummy test... ++ { ++ DBG_871X("%s name(%u) != 0\n", __FUNCTION__, param->u.wpa_param.name); ++ } ++ ++ value = param->u.wpa_param.value; ++ ++ //use the same definition of hostapd's ignore_broadcast_ssid ++ if(value != 1 && value != 2) ++ value = 0; ++ ++ DBG_871X("%s value(%u)\n", __FUNCTION__, value); ++ pmlmeinfo->hidden_ssid_mode = value; ++ ++ return ret; ++ ++} ++ ++ ++static int rtw_set_wps_assoc_resp(struct net_device *dev, struct ieee_param *param, int len) ++{ ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ int ie_len; ++ ++ DBG_8192C("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return -EINVAL; ++ ++ ie_len = len-12-2;// 12 = param header, 2:no packed ++ ++ ++ if(pmlmepriv->wps_assoc_resp_ie) ++ { ++ rtw_mfree(pmlmepriv->wps_assoc_resp_ie, pmlmepriv->wps_assoc_resp_ie_len); ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ } ++ ++ if(ie_len>0) ++ { ++ pmlmepriv->wps_assoc_resp_ie = rtw_malloc(ie_len); ++ pmlmepriv->wps_assoc_resp_ie_len = ie_len; ++ if ( pmlmepriv->wps_assoc_resp_ie == NULL) { ++ DBG_8192C("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ return -EINVAL; ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_assoc_resp_ie, param->u.bcn_ie.buf, ie_len); ++ } ++ ++ ++ return ret; ++ ++} ++ ++static int rtw_hostapd_ioctl(struct net_device *dev, struct iw_point *p) ++{ ++ struct ieee_param *param; ++ int ret=0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ /* ++ * this function is expect to call in master mode, which allows no power saving ++ * so, we just check hw_init_completed instead of call rfpwrstate_check() ++ */ ++ ++ if (padapter->hw_init_completed==_FALSE){ ++ ret = -EPERM; ++ goto out; ++ } ++ ++ ++ //if (p->length < sizeof(struct ieee_param) || !p->pointer){ ++ if(!p->pointer){ ++ ret = -EINVAL; ++ goto out; ++ } ++ ++ param = (struct ieee_param *)rtw_malloc(p->length); ++ if (param == NULL) ++ { ++ ret = -ENOMEM; ++ goto out; ++ } ++ ++ if (copy_from_user(param, p->pointer, p->length)) ++ { ++ rtw_mfree((u8*)param, p->length); ++ ret = -EFAULT; ++ goto out; ++ } ++ ++ //DBG_8192C("%s, cmd=%d\n", __FUNCTION__, param->cmd); ++ ++ switch (param->cmd) ++ { ++ case RTL871X_HOSTAPD_FLUSH: ++ ++ ret = rtw_hostapd_sta_flush(dev); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_ADD_STA: ++ ++ ret = rtw_add_sta(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_REMOVE_STA: ++ ++ ret = rtw_del_sta(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_BEACON: ++ ++ ret = rtw_set_beacon(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_SET_ENCRYPTION: ++ ++ ret = rtw_set_encryption(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_GET_WPAIE_STA: ++ ++ ret = rtw_get_sta_wpaie(dev, param); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_BEACON: ++ ++ ret = rtw_set_wps_beacon(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_PROBE_RESP: ++ ++ ret = rtw_set_wps_probe_resp(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_WPS_ASSOC_RESP: ++ ++ ret = rtw_set_wps_assoc_resp(dev, param, p->length); ++ ++ break; ++ ++ case RTL871X_HOSTAPD_SET_HIDDEN_SSID: ++ ++ ret = rtw_set_hidden_ssid(dev, param, p->length); ++ ++ break; ++ ++ default: ++ DBG_8192C("Unknown hostapd request: %d\n", param->cmd); ++ ret = -EOPNOTSUPP; ++ break; ++ ++ } ++ ++ if (ret == 0 && copy_to_user(p->pointer, param, p->length)) ++ ret = -EFAULT; ++ ++ ++ rtw_mfree((u8 *)param, p->length); ++ ++out: ++ ++ return ret; ++ ++} ++#endif ++ ++#include ++static int rtw_wx_set_priv(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *awrq, ++ char *extra) ++{ ++ ++#ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ char *ext_dbg; ++#endif ++ ++ int ret = 0; ++ int len = 0; ++ char *ext; ++ int i; ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_point *dwrq = (struct iw_point*)awrq; ++ ++ //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ("+rtw_wx_set_priv\n")); ++ ++ len = dwrq->length; ++ if (!(ext = rtw_vmalloc(len))) ++ return -ENOMEM; ++ ++ if (copy_from_user(ext, dwrq->pointer, len)) { ++ rtw_vmfree(ext, len); ++ return -EFAULT; ++ } ++ ++ ++ //RT_TRACE(_module_rtl871x_ioctl_os_c, _drv_notice_, ++ // ("rtw_wx_set_priv: %s req=%s\n", ++ // dev->name, ext)); ++ ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ if (!(ext_dbg = rtw_vmalloc(len))) ++ { ++ rtw_vmfree(ext, len); ++ return -ENOMEM; ++ } ++ ++ _rtw_memcpy(ext_dbg, ext, len); ++ #endif ++ ++ //added for wps2.0 @20110524 ++ if(dwrq->flags == 0x8766 && len > 8) ++ { ++ u32 cp_sz; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ u8 *probereq_wpsie = ext; ++ int probereq_wpsie_len = len; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ ++ if((_VENDOR_SPECIFIC_IE_ == probereq_wpsie[0]) && ++ (_rtw_memcmp(&probereq_wpsie[2], wps_oui, 4) ==_TRUE)) ++ { ++ cp_sz = probereq_wpsie_len>MAX_WPS_IE_LEN ? MAX_WPS_IE_LEN:probereq_wpsie_len; ++ ++ //_rtw_memcpy(pmlmepriv->probereq_wpsie, probereq_wpsie, cp_sz); ++ //pmlmepriv->probereq_wpsie_len = cp_sz; ++ ++ printk("probe_req_wps_ielen=%d\n", cp_sz); ++ ++ if(pmlmepriv->wps_probe_req_ie) ++ { ++ u32 free_len = pmlmepriv->wps_probe_req_ie_len; ++ pmlmepriv->wps_probe_req_ie_len = 0; ++ rtw_mfree(pmlmepriv->wps_probe_req_ie, free_len); ++ pmlmepriv->wps_probe_req_ie = NULL; ++ } ++ ++ pmlmepriv->wps_probe_req_ie = rtw_malloc(cp_sz); ++ if ( pmlmepriv->wps_probe_req_ie == NULL) { ++ printk("%s()-%d: rtw_malloc() ERROR!\n", __FUNCTION__, __LINE__); ++ ret = -EINVAL; ++ goto FREE_EXT; ++ ++ } ++ ++ _rtw_memcpy(pmlmepriv->wps_probe_req_ie, probereq_wpsie, cp_sz); ++ pmlmepriv->wps_probe_req_ie_len = cp_sz; ++ ++ } ++ ++ goto FREE_EXT; ++ ++ } ++ ++ if( len >= WEXT_CSCAN_HEADER_SIZE ++ && _rtw_memcmp(ext, WEXT_CSCAN_HEADER, WEXT_CSCAN_HEADER_SIZE) == _TRUE ++ ){ ++ ret = rtw_wx_set_scan(dev, info, awrq, ext); ++ goto FREE_EXT; ++ } ++ ++#ifdef CONFIG_ANDROID ++ //DBG_871X("rtw_wx_set_priv: %s req=%s\n", dev->name, ext); ++ ++ i = rtw_android_cmdstr_to_num(ext); ++ ++ switch(i) { ++ case ANDROID_WIFI_CMD_START : ++ indicate_wx_custom_event(padapter, "START"); ++ break; ++ case ANDROID_WIFI_CMD_STOP : ++ indicate_wx_custom_event(padapter, "STOP"); ++ break; ++ case ANDROID_WIFI_CMD_RSSI : ++ { ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ sprintf(ext, "%s rssi %d", pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); ++ } else { ++ sprintf(ext, "OK"); ++ } ++ } ++ break; ++ case ANDROID_WIFI_CMD_LINKSPEED : ++ { ++ union iwreq_data wrqd; ++ int ret_inner; ++ int mbps; ++ ++ if( 0!=(ret_inner=rtw_wx_get_rate(dev, info, &wrqd, extra)) ){ ++ mbps=0; ++ } else { ++ mbps=wrqd.bitrate.value / 1000000; ++ } ++ ++ sprintf(ext, "LINKSPEED %d", mbps); ++ } ++ break; ++ case ANDROID_WIFI_CMD_MACADDR : ++ sprintf(ext, "MACADDR = " MAC_FMT, MAC_ARG(dev->dev_addr)); ++ break; ++ case ANDROID_WIFI_CMD_SCAN_ACTIVE : ++ { ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ pmlmepriv->scan_mode=SCAN_ACTIVE; ++ sprintf(ext, "OK"); ++ } ++ break; ++ case ANDROID_WIFI_CMD_SCAN_PASSIVE : ++ { ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ pmlmepriv->scan_mode=SCAN_PASSIVE; ++ sprintf(ext, "OK"); ++ } ++ break; ++ ++ case ANDROID_WIFI_CMD_COUNTRY : ++ { ++ char country_code[10]; ++ int channel_plan = RT_CHANNEL_DOMAIN_FCC; ++ union iwreq_data wrqd; ++ int ret_inner; ++ ++ sscanf(ext,"%*s %s",country_code); ++ ++ if(0 == strcmp(country_code, "US")) ++ channel_plan = RT_CHANNEL_DOMAIN_FCC; ++ else if(0 == strcmp(country_code, "EU")) ++ channel_plan = RT_CHANNEL_DOMAIN_ETSI; ++ else if(0 == strcmp(country_code, "JP")) ++ channel_plan = RT_CHANNEL_DOMAIN_MKK; ++ else if(0 == strcmp(country_code, "CN")) ++ channel_plan = RT_CHANNEL_DOMAIN_CHINA; ++ else ++ DBG_871X("%s unknown country_code:%s, set to RT_CHANNEL_DOMAIN_FCC\n", __FUNCTION__, country_code); ++ ++ _rtw_memcpy(&wrqd, &channel_plan, sizeof(int)); ++ ++ if( 0!=(ret_inner=rtw_wx_set_channel_plan(dev, info, &wrqd, extra)) ){ ++ DBG_871X("%s rtw_wx_set_channel_plan error\n", __FUNCTION__); ++ } ++ ++ sprintf(ext, "OK"); ++ } ++ break; ++ ++ default : ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ DBG_871X("%s: %s unknowned req=%s\n", __FUNCTION__, ++ dev->name, ext_dbg); ++ #endif ++ ++ sprintf(ext, "OK"); ++ ++ } ++ ++ if (copy_to_user(dwrq->pointer, ext, min(dwrq->length, (u16)(strlen(ext)+1)) ) ) ++ ret = -EFAULT; ++ ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ DBG_871X("%s: %s req=%s rep=%s dwrq->length=%d, strlen(ext)+1=%d\n", __FUNCTION__, ++ dev->name, ext_dbg ,ext, dwrq->length, (u16)(strlen(ext)+1)); ++ #endif ++#endif //end of CONFIG_ANDROID ++ ++ ++FREE_EXT: ++ ++ rtw_vmfree(ext, len); ++ #ifdef CONFIG_DEBUG_RTW_WX_SET_PRIV ++ rtw_vmfree(ext_dbg, len); ++ #endif ++ ++ //DBG_871X("rtw_wx_set_priv: (SIOCSIWPRIV) %s ret=%d\n", ++ // dev->name, ret); ++ ++ return ret; ++ ++} ++ ++static int rtw_mp_efuse_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ struct mp_priv *pmp_priv; ++ ++ int i,j =0; ++ u8 data[EFUSE_MAP_SIZE]; ++ u8 rawdata[EFUSE_MAX_SIZE]; ++ u16 mapLen=0; ++ char *pch, *ptmp, *token, *tmp[3]={0x00,0x00,0x00}; ++ u16 addr = 0, cnts = 0, max_available_size = 0,raw_cursize = 0 ,raw_maxsize = 0; ++ ++ _rtw_memset(data, '\0', sizeof(data)); ++ _rtw_memset(rawdata, '\0', sizeof(rawdata)); ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ pch = extra; ++ DBG_8192C("%s: in=%s\n", __func__, extra); ++ ++ i=0; ++ //mac 16 "00e04c871200" rmap,00,2 ++ while ( (token = strsep (&pch,",") )!=NULL ) ++ { ++ if(i>2) break; ++ tmp[i] = token; ++ i++; ++ } ++ ++ if ( strcmp(tmp[0],"realmap") == 0 ) { ++ ++ DBG_8192C("strcmp OK = %s \n" ,tmp[0]); ++ ++ mapLen = EFUSE_MAP_SIZE; ++ ++ if (rtw_efuse_map_read(padapter, 0, mapLen, data) == _SUCCESS){ ++ DBG_8192C("\t rtw_efuse_map_read \n"); ++ }else { ++ DBG_8192C("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ DBG_8192C("\tOFFSET\tVALUE(hex)\n"); ++ sprintf(extra, "%s \n", extra); ++ for ( i = 0; i < EFUSE_MAP_SIZE; i += 16 ) ++ { ++ DBG_8192C("\t0x%02x\t", i); ++ sprintf(extra, "%s \t0x%02x\t", extra,i); ++ for (j = 0; j < 8; j++) ++ { ++ DBG_8192C("%02X ", data[i+j]); ++ sprintf(extra, "%s %02X", extra, data[i+j]); ++ } ++ DBG_8192C("\t"); ++ sprintf(extra,"%s\t",extra); ++ for (; j < 16; j++){ ++ DBG_8192C("%02X ", data[i+j]); ++ sprintf(extra, "%s %02X", extra, data[i+j]); ++ } ++ DBG_8192C("\n"); ++ sprintf(extra,"%s\n",extra); ++ } ++ DBG_8192C("\n"); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"rmap") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ // rmap addr cnts ++ addr = simple_strtoul(tmp[1], &ptmp, 16); ++ ++ DBG_8192C("addr = %x \n" ,addr); ++ ++ cnts=simple_strtoul(tmp[2], &ptmp,10); ++ if(cnts==0) return -EINVAL; ++ ++ DBG_8192C("cnts = %d \n" ,cnts); ++ //_rtw_memset(extra, '\0', wrqu->data.length); ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + cnts) > max_available_size) { ++ DBG_8192C("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_8192C("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_8192C("rtw_efuse_access ok \n"); ++ } ++ ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_8192C("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i]); ++ DBG_8192C(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ ++ wrqu->length = strlen(extra)+1; ++ ++ DBG_8192C("extra = %s ", extra); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"realraw") == 0 ) { ++ addr=0; ++ mapLen = EFUSE_MAX_SIZE; ++ ++ if (rtw_efuse_access(padapter, _FALSE, addr, mapLen, rawdata) == _FAIL) ++ { ++ DBG_8192C("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } else ++ { ++ DBG_8192C("\t rtw_efuse_access raw ok \n"); ++ } ++ ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i=0; ilength = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"mac") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ #ifdef CONFIG_RTL8192C ++ addr = 0x16; ++ cnts = 6; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x19; ++ cnts = 6; ++ #endif ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + mapLen) > max_available_size) { ++ DBG_8192C("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_8192C("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_8192C("rtw_efuse_access ok \n"); ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_8192C("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i+j]); ++ DBG_8192C(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"vidpid") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ #ifdef CONFIG_RTL8192C ++ addr=0x0a; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x0c; ++ #endif ++ cnts = 4; ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if ((addr + mapLen) > max_available_size) { ++ DBG_8192C("(addr + cnts parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_read(padapter, addr, cnts, data) == _FAIL) ++ { ++ DBG_8192C("rtw_efuse_access error \n"); ++ } ++ else{ ++ DBG_8192C("rtw_efuse_access ok \n"); ++ } ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ for ( i = 0; i < cnts; i ++) { ++ DBG_8192C("0x%02x", data[i]); ++ sprintf(extra, "%s 0x%02X", extra, data[i+j]); ++ DBG_8192C(" "); ++ sprintf(extra,"%s ",extra); ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"ableraw") == 0 ) { ++ efuse_GetCurrentSize(padapter,&raw_cursize); ++ raw_maxsize = efuse_GetMaxSize(padapter); ++ sprintf(extra, "%s : [ available raw size] = %d",extra,raw_maxsize-raw_cursize); ++ wrqu->length = strlen(extra); ++ ++ return 0; ++ }else ++ { ++ sprintf(extra, "%s : Command not found\n",extra); ++ wrqu->length = strlen(extra); ++ return 0; ++ } ++ ++ return 0; ++} ++ ++static int rtw_mp_efuse_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ u8 buffer[40]; ++ u32 i,jj,kk; ++ u8 setdata[EFUSE_MAP_SIZE]; ++ u8 setrawdata[EFUSE_MAX_SIZE]; ++ char *pch, *ptmp, *token, *edata,*tmp[3]={0x00,0x00,0x00}; ++ ++ u16 addr = 0, max_available_size = 0; ++ u32 cnts = 0; ++ ++ pch = extra; ++ DBG_8192C("%s: in=%s\n", __func__, extra); ++ ++ i=0; ++ while ( (token = strsep (&pch,",") )!=NULL ) ++ { ++ if(i>2) break; ++ tmp[i] = token; ++ i++; ++ } ++ ++ // tmp[0],[1],[2] ++ // wmap,addr,00e04c871200 ++ if ( strcmp(tmp[0],"wmap") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT; ++ ++ addr = simple_strtoul( tmp[1], &ptmp, 16 ); ++ addr = addr & 0xFF; ++ DBG_8192C("addr = %x \n" ,addr); ++ ++ cnts = strlen( tmp[2] )/2; ++ if ( cnts == 0) return -EFAULT; ++ ++ DBG_8192C("cnts = %d \n" ,cnts); ++ DBG_8192C("target data = %s \n" ,tmp[2]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] ); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_8192C("parameter error \n"); ++ return -EFAULT; ++ } ++ if (rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL) { ++ DBG_8192C("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_8192C("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"wraw") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ if ( ! strlen( tmp[2] )/2 > 1 ) return -EFAULT; ++ addr = simple_strtoul( tmp[1], &ptmp, 16 ); ++ addr = addr & 0xFF; ++ DBG_8192C("addr = %x \n" ,addr); ++ ++ cnts=strlen( tmp[2] )/2; ++ if ( cnts == 0) return -EFAULT; ++ ++ DBG_8192C(" cnts = %d \n" ,cnts ); ++ DBG_8192C("target data = %s \n" ,tmp[2] ); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setrawdata[jj] = key_2char2num( tmp[2][kk], tmp[2][kk+ 1] ); ++ } ++ ++ if ( rtw_efuse_access( padapter, _TRUE, addr, cnts, setrawdata ) == _FAIL ){ ++ DBG_8192C("\t rtw_efuse_map_read : Fail \n"); ++ return -EFAULT; ++ } else ++ DBG_8192C("\t rtw_efuse_access raw ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"mac") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ //mac,00e04c871200 ++ #ifdef CONFIG_RTL8192C ++ addr = 0x16; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x19; ++ #endif ++ cnts = strlen( tmp[1] )/2; ++ if ( cnts == 0) return -EFAULT; ++ if ( cnts > 6 ){ ++ DBG_8192C("error data for mac addr = %s \n" ,tmp[1]); ++ return -EFAULT; ++ } ++ ++ DBG_8192C("target data = %s \n" ,tmp[1]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_8192C("parameter error \n"); ++ return -EFAULT; ++ } ++ if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) { ++ DBG_8192C("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_8192C("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else if ( strcmp(tmp[0],"vidpid") == 0 ) { ++ if ( tmp[1]==NULL || tmp[2]==NULL ) return -EINVAL; ++ // pidvid,da0b7881 ++ #ifdef CONFIG_RTL8192C ++ addr=0x0a; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ addr = 0x0c; ++ #endif ++ ++ cnts=strlen( tmp[1] )/2; ++ if ( cnts == 0) return -EFAULT; ++ DBG_8192C("target data = %s \n" ,tmp[1]); ++ ++ for( jj = 0, kk = 0; jj < cnts; jj++, kk += 2 ) ++ { ++ setdata[jj] = key_2char2num(tmp[1][kk], tmp[1][kk+ 1]); ++ } ++ ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ ++ if ((addr + cnts) > max_available_size) { ++ DBG_8192C("parameter error \n"); ++ return -EFAULT; ++ } ++ ++ if ( rtw_efuse_map_write(padapter, addr, cnts, setdata) == _FAIL ) { ++ DBG_8192C("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } else ++ DBG_8192C("rtw_efuse_map_write ok \n"); ++ ++ return 0; ++ } ++ else{ ++ DBG_8192C("Command not found\n"); ++ return 0; ++ } ++ ++ return 0; ++} ++ ++ ++ ++#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++/* ++ * Input Format: %s,%d,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * 1st %d is address(offset) ++ * 2st %d is data to write ++ */ ++static int rtw_mp_write_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width; ++ u32 addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ pch = extra; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ addr = simple_strtoul(pch, &ptmp, 16); ++ if (addr > 0x3FFF) return -EINVAL; ++ ++ pch = pnext + 1; ++ if ((pch - extra) >= wrqu->length) return -EINVAL; ++ data = simple_strtoul(pch, &ptmp, 16); ++ ++ ret = 0; ++ width = width_str[0]; ++ switch (width) { ++ case 'b': ++ // 1 byte ++ if (data > 0xFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write8(padapter, addr, data); ++ break; ++ case 'w': ++ // 2 bytes ++ if (data > 0xFFFF) { ++ ret = -EINVAL; ++ break; ++ } ++ rtw_write16(padapter, addr, data); ++ break; ++ case 'd': ++ // 4 bytes ++ rtw_write32(padapter, addr, data); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ ++ return ret; ++} ++ ++/* ++ * Input Format: %s,%d ++ * %s is width, could be ++ * "b" for 1 byte ++ * "w" for WORD (2 bytes) ++ * "dw" for DWORD (4 bytes) ++ * %d is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++static int rtw_mp_read_reg(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char *width_str; ++ char width; ++ char data[20],tmp[20]; ++ u32 addr; ++ //u32 *data = (u32*)extra; ++ u32 ret, i=0, j=0, strtout=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (wrqu->length > 128) return -EFAULT; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ pch = input; ++ pnext = strpbrk(pch, " ,.-"); ++ if (pnext == NULL) return -EINVAL; ++ *pnext = 0; ++ width_str = pch; ++ ++ pch = pnext + 1; ++ if ((pch - input) >= wrqu->length) return -EINVAL; ++ ++ addr = simple_strtoul(pch, &ptmp, 16); ++ if (addr > 0x3FFF) return -EINVAL; ++ ++ ret = 0; ++ width = width_str[0]; ++ switch (width) { ++ case 'b': ++ // 1 byte ++ // *(u8*)data = rtw_read8(padapter, addr); ++ sprintf(extra, "%d\n", rtw_read8(padapter, addr)); ++ wrqu->length = 4; ++ break; ++ case 'w': ++ // 2 bytes ++ //*(u16*)data = rtw_read16(padapter, addr); ++ sprintf(data, "%04d\n", rtw_read16(padapter, addr)); ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ if ( data[i] != '\0' ) ++ tmp[j] = data[i]; ++ ++ j++; ++ } ++ pch = tmp; ++ DBG_8192C("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtout = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtout ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = 8; ++ break; ++ case 'd': ++ // 4 bytes ++ //*data = rtw_read32(padapter, addr); ++ sprintf(data, "%08x", rtw_read32(padapter, addr)); ++ //add read data format blank ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ tmp[j] = data[i]; ++ j++; ++ } ++ pch = tmp; ++ DBG_8192C("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtout = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtout ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = 20; ++ break; ++ ++ default: ++ wrqu->length = 0; ++ ret = -EINVAL; ++ break; ++ ++ } ++ ++ return ret; ++} ++ ++/* ++ * Input Format: %d,%x,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * 1st %x is address(offset) ++ * 2st %x is data to write ++ */ ++ static int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++/*static int rtw_mp_write_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++*/ ++ u32 path, addr, data; ++ int ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ ret = sscanf(extra, "%d,%x,%x", &path, &addr, &data); ++ if (ret < 3) return -EINVAL; ++ ++ if (path >= MAX_RF_PATH_NUMS) return -EINVAL; ++ if (addr > 0xFF) return -EINVAL; ++ if (data > 0xFFFFF) return -EINVAL; ++ ++ write_rfreg(padapter, path, addr, data); ++ ++ return 0; ++} ++ ++/* ++ * Input Format: %d,%x ++ * %d is RF path, should be smaller than MAX_RF_PATH_NUMS ++ * %x is address(offset) ++ * ++ * Return: ++ * %d for data readed ++ */ ++static int rtw_mp_read_rf(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ char input[wrqu->length]; ++ char *pch, *pnext, *ptmp; ++ char data[20],tmp[20]; ++ //u32 *data = (u32*)extra; ++ u32 path, addr; ++ u32 ret,i=0 ,j=0,strtou=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (wrqu->length > 128) return -EFAULT; ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ ret = sscanf(extra, "%d,%x", &path, &addr); ++ if (ret < 2) return -EINVAL; ++ ++ if (path >= MAX_RF_PATH_NUMS) return -EINVAL; ++ if (addr > 0xFF) return -EINVAL; ++ ++ //*data = read_rfreg(padapter, path, addr); ++ sprintf(data, "%08x", read_rfreg(padapter, path, addr)); ++ //add read data format blank ++ for( i=0 ; i <= strlen(data) ; i++) ++ { ++ if( i%2==0 ) ++ { ++ tmp[j]=' '; ++ j++; ++ } ++ tmp[j] = data[i]; ++ j++; ++ } ++ pch = tmp; ++ DBG_8192C("pch=%s",pch); ++ ++ while( *pch != '\0' ) ++ { ++ pnext = strpbrk(pch, " "); ++ pnext++; ++ if ( *pnext != '\0' ) ++ { ++ strtou = simple_strtoul (pnext , &ptmp, 16); ++ sprintf( extra, "%s %d" ,extra ,strtou ); ++ } ++ else{ ++ break; ++ } ++ pch = pnext; ++ } ++ wrqu->length = 10; ++ ++ return 0; ++} ++ ++static int rtw_mp_start(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val8; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (padapter->registrypriv.mp_mode == 0) ++ return -EPERM; ++ ++ if (padapter->mppriv.mode == MP_OFF) { ++ if (mp_start_test(padapter) == _FAIL) ++ return -EPERM; ++ padapter->mppriv.mode = MP_ON; ++ } ++ ++ return 0; ++} ++ ++static int rtw_mp_stop(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (padapter->mppriv.mode != MP_OFF) { ++ mp_stop_test(padapter); ++ padapter->mppriv.mode = MP_OFF; ++ } ++ ++ return 0; ++} ++ ++extern int wifirate2_ratetbl_inx(unsigned char rate); ++ ++static int rtw_mp_rate(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 rate = MPT_RATE_1M; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ rate = rtw_atoi(input); ++ sprintf( extra, "Set data rate to %d" , rate ); ++ ++ if(rate <= 0x7f) ++ rate = wifirate2_ratetbl_inx( (u8)rate); ++ else ++ rate =(rate-0x80+MPT_RATE_MCS0); ++ ++ //DBG_8192C("%s: rate=%d\n", __func__, rate); ++ ++ if (rate >= MPT_RATE_LAST ) ++ return -EINVAL; ++ ++ padapter->mppriv.rateidx = rate; ++ Hal_SetDataRate(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_channel(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ u32 channel = 1; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ channel = rtw_atoi(input); ++ //DBG_8192C("%s: channel=%d\n", __func__, channel); ++ sprintf( extra, "Change channel %d to channel %d", padapter->mppriv.channel , channel ); ++ ++ padapter->mppriv.channel = channel; ++ Hal_SetChannel(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_bandwidth(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 bandwidth=0, sg=0; ++ //u8 buffer[40]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ //if (copy_from_user(buffer, (void*)wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ //DBG_8192C("%s:iwpriv in=%s\n", __func__, extra); ++ ++ sscanf(extra, "40M=%d,shortGI=%d", &bandwidth, &sg); ++ ++ if (bandwidth != HT_CHANNEL_WIDTH_40) ++ bandwidth = HT_CHANNEL_WIDTH_20; ++ ++ //DBG_8192C("%s: bw=%d sg=%d \n", __func__, bandwidth , sg); ++ ++ padapter->mppriv.bandwidth = (u8)bandwidth; ++ padapter->mppriv.preamble = sg; ++ ++ SetBandwidth(padapter); ++ ++ return 0; ++} ++ ++static int rtw_mp_txpower(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 idx_a=0,idx_b=0; ++ u8 input[wrqu->length]; ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ sscanf(input,"patha=%d,pathb=%d",&idx_a,&idx_b); ++ //DBG_8192C("%s: tx_pwr_idx_a=%x b=%x\n", __func__, idx_a, idx_b); ++ ++ sprintf( extra, "Set power level path_A:%d path_B:%d", idx_a , idx_b ); ++ padapter->mppriv.txpoweridx = (u8)idx_a; ++ padapter->mppriv.txpoweridx_b = (u8)idx_b; ++ ++ Hal_SetAntennaPathPower(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_ant_tx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u8 input[wrqu->length]; ++ u16 antenna = 0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_8192C("%s: input=%s\n", __func__, input); ++ ++ sprintf( extra, "switch Tx antenna to %s", input ); ++ ++ for (i=0; i < strlen(input); i++) ++ { ++ switch(input[i]) ++ { ++ case 'a' : ++ antenna|=ANTENNA_A; ++ break; ++ case 'b': ++ antenna|=ANTENNA_B; ++ break; ++ } ++ } ++ //antenna |= BIT(extra[i]-'a'); ++ DBG_8192C("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_tx = antenna; ++ DBG_8192C("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_tx); ++ ++ Hal_SetAntenna(padapter); ++ ++ wrqu->length = strlen(extra) + 1; ++ return 0; ++} ++ ++static int rtw_mp_ant_rx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 i; ++ u16 antenna = 0; ++ u8 input[wrqu->length]; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ //DBG_8192C("%s: input=%s\n", __func__, input); ++ ++ for (i=0; i < strlen(input); i++) { ++ ++ switch( input[i] ) ++ { ++ case 'a' : ++ antenna|=ANTENNA_A; ++ break; ++ case 'b': ++ antenna|=ANTENNA_B; ++ break; ++ } ++ } ++ ++ //DBG_8192C("%s: antenna=0x%x\n", __func__, antenna); ++ padapter->mppriv.antenna_rx = antenna; ++ //DBG_8192C("%s:mppriv.antenna_rx=%d\n", __func__, padapter->mppriv.antenna_rx); ++ Hal_SetAntenna(padapter); ++ wrqu->length = strlen(extra) + 1; ++ ++ return 0; ++} ++ ++static int rtw_mp_ctx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 pkTx = 1, countPkTx = 1, cotuTx = 1, CarrSprTx = 1, scTx = 1, sgleTx = 1, stop = 1; ++ u32 bStartTest = 1; ++ u32 count = 0; ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ pmp_priv = &padapter->mppriv; ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_8192C("%s: in=%s\n", __func__, extra); ++ ++ countPkTx = strncmp(extra, "count=", 5); // strncmp TRUE is 0 ++ cotuTx = strncmp(extra, "background", 20); ++ CarrSprTx = strncmp(extra, "background,cs", 20); ++ scTx = strncmp(extra, "background,sc", 20); ++ sgleTx = strncmp(extra, "background,stone", 20); ++ pkTx = strncmp(extra, "background,pkt", 20); ++ stop = strncmp(extra, "stop", 5); ++ sscanf(extra, "count=%d,pkt", &count); ++ ++ //DBG_8192C("%s: count=%d countPkTx=%d cotuTx=%d CarrSprTx=%d scTx=%d sgleTx=%d pkTx=%d stop=%d\n", __func__, count, countPkTx, cotuTx, CarrSprTx, pkTx, sgleTx, scTx, stop); ++ _rtw_memset(extra, '\0', sizeof(extra)); ++ ++ if (stop == 0) { ++ bStartTest = 0; // To set Stop ++ pmp_priv->tx.stop = 1; ++ sprintf( extra, "Stop continuous Tx"); ++ } else { ++ bStartTest = 1; ++ if (pmp_priv->mode != MP_ON) { ++ if (pmp_priv->tx.stop != 1) { ++ DBG_8192C("%s: MP_MODE != ON %d\n", __func__, pmp_priv->mode); ++ return -EFAULT; ++ } ++ } ++ } ++ ++ if (pkTx == 0 || countPkTx == 0) ++ pmp_priv->mode = MP_PACKET_TX; ++ if (sgleTx == 0) ++ pmp_priv->mode = MP_SINGLE_TONE_TX; ++ if (cotuTx == 0) ++ pmp_priv->mode = MP_CONTINUOUS_TX; ++ if (CarrSprTx == 0) ++ pmp_priv->mode = MP_CARRIER_SUPPRISSION_TX; ++ if (scTx == 0) ++ pmp_priv->mode = MP_SINGLE_CARRIER_TX; ++ ++ switch (pmp_priv->mode) ++ { ++ case MP_PACKET_TX: ++ ++ //DBG_8192C("%s:pkTx %d\n", __func__,bStartTest); ++ if (bStartTest == 0) ++ { ++ pmp_priv->tx.stop = 1; ++ pmp_priv->mode = MP_ON; ++ sprintf( extra, "Stop continuous Tx"); ++ } ++ else if (pmp_priv->tx.stop == 1) ++ { ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 count=%u,\n",count); ++ //DBG_8192C("%s:countPkTx %d\n", __func__,count); ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = count; ++ pmp_priv->tx.payload = 2; ++ pattrib = &pmp_priv->tx.attrib; ++ pattrib->pktlen = 1460; ++ _rtw_memset(pattrib->dst, 0xFF, ETH_ALEN); ++ SetPacketTx(padapter); ++ } ++ else { ++ //DBG_8192C("%s: pkTx not stop\n", __func__); ++ return -EFAULT; ++ } ++ wrqu->length = strlen(extra); ++ return 0; ++ ++ case MP_SINGLE_TONE_TX: ++ //DBG_8192C("%s: sgleTx %d \n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ Hal_SetSingleToneTx(padapter, (u8)bStartTest); ++ } ++ break; ++ ++ case MP_CONTINUOUS_TX: ++ //DBG_8192C("%s: cotuTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ Hal_SetContinuousTx(padapter, (u8)bStartTest); ++ } ++ break; ++ ++ case MP_CARRIER_SUPPRISSION_TX: ++ //DBG_8192C("%s: CarrSprTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ if( pmp_priv->rateidx <= MPT_RATE_11M ) ++ { ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ Hal_SetCarrierSuppressionTx(padapter, (u8)bStartTest); ++ }else ++ sprintf( extra, "Specify carrier suppression but not CCK rate"); ++ } ++ break; ++ ++ case MP_SINGLE_CARRIER_TX: ++ //DBG_8192C("%s: scTx %d\n", __func__, bStartTest); ++ if (bStartTest != 0){ ++ sprintf( extra, "Start continuous DA=ffffffffffff len=1500 \n infinite=yes."); ++ Hal_SetSingleCarrierTx(padapter, (u8)bStartTest); ++ } ++ break; ++ ++ default: ++ //DBG_8192C("%s:No Match MP_MODE\n", __func__); ++ sprintf( extra, "Error! Continuous-Tx is not on-going."); ++ return -EFAULT; ++ } ++ ++ if (bStartTest) { ++ struct mp_priv *pmp_priv = &padapter->mppriv; ++ if (pmp_priv->tx.stop == 0) { ++ pmp_priv->tx.stop = 1; ++ //DBG_8192C("%s: pkt tx is running...\n", __func__); ++ rtw_msleep_os(5); ++ } ++ pmp_priv->tx.stop = 0; ++ pmp_priv->tx.count = 1; ++ SetPacketTx(padapter); ++ } else { ++ pmp_priv->mode = MP_ON; ++ } ++ ++ wrqu->length = strlen(extra); ++ return 0; ++} ++ ++static int rtw_mp_arx(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 bStartRx=0,bStopRx=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ u8 input[wrqu->length]; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_8192C("%s: %s\n", __func__, input); ++ ++ bStartRx = (strncmp(input, "start", 5)==0)?1:0; // strncmp TRUE is 0 ++ bStopRx = (strncmp(input, "stop", 5)==0)?1:0; // strncmp TRUE is 0 ++ SetPacketRx(padapter, bStartRx); ++ ++ if(bStartRx) ++ { ++ sprintf( extra, "start"); ++ wrqu->length = strlen(extra) + 1; ++ } ++ else if(bStopRx) ++ { ++ sprintf( extra, "Received packet OK:%d CRC error:%d",padapter->mppriv.rx_pktcount, ++ padapter->mppriv.rx_crcerrpktcount); ++ wrqu->length = strlen(extra) + 1; ++ } ++ ++ ++ return 0; ++} ++ ++static int rtw_mp_trx_query(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u32 txok,txfail,rxok,rxfail; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ txok=padapter->mppriv.tx.sended; ++ txfail=0; ++ rxok = padapter->mppriv.rx_pktcount; ++ rxfail = padapter->mppriv.rx_crcerrpktcount; ++ ++ _rtw_memset(extra, '\0', 128); ++ ++ sprintf(extra, "Tx OK:%d, Tx Fail:%d, Rx OK:%d, CRC error:%d ", txok, txfail,rxok,rxfail); ++ ++ wrqu->length=strlen(extra)+1; ++ ++ return 0; ++} ++ ++static int rtw_mp_pwrtrk(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 enable; ++ u32 thermal; ++ s32 ret; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ enable = 1; ++ if (wrqu->length > 1) { // not empty string ++ if (strncmp(extra, "stop", 4) == 0) ++ enable = 0; ++ else { ++ if (sscanf(extra, "ther=%d", &thermal)) { ++ ret = Hal_SetThermalMeter(padapter, (u8)thermal); ++ if (ret == _FAIL) return -EPERM; ++ } else ++ return -EINVAL; ++ } ++ } ++ ++ ret = Hal_SetPowerTracking(padapter, enable); ++ if (ret == _FAIL) return -EPERM; ++ ++ return 0; ++} ++ ++static int rtw_mp_psd(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ wrqu->length = mp_query_psd(padapter, extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_thermal(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ u8 val; ++ u16 bwrite=1; ++ #ifdef CONFIG_RTL8192C ++ u16 addr=0x78; ++ #endif ++ #ifdef CONFIG_RTL8192D ++ u16 addr=0xc3; ++ #endif ++ u16 cnt=1; ++ u16 max_available_size=0; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (copy_from_user(extra, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ //DBG_8192C("print extra %s \n",extra); ++ ++ bwrite = strncmp(extra, "write", 6); // strncmp TRUE is 0 ++ ++ Hal_GetThermalMeter(padapter, &val); ++ ++ if( bwrite == 0 ) ++ { ++ //DBG_8192C("to write val:%d",val); ++ EFUSE_GetEfuseDefinition(padapter, EFUSE_WIFI, TYPE_AVAILABLE_EFUSE_BYTES_TOTAL, (PVOID)&max_available_size, _FALSE); ++ if( 2 > max_available_size ) ++ { ++ DBG_8192C("no available efuse!\n"); ++ return -EFAULT; ++ } ++ if ( rtw_efuse_map_write(padapter, addr, cnt, &val) == _FAIL ) ++ { ++ DBG_8192C("rtw_efuse_map_write error \n"); ++ return -EFAULT; ++ } ++ else ++ { ++ sprintf(extra, " efuse write ok :%d", val); ++ } ++ } ++ else ++ { ++ sprintf(extra, "%d", val); ++ } ++ wrqu->length = strlen(extra); ++ ++ return 0; ++} ++ ++static int rtw_mp_reset_stats(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ pmp_priv->tx.sended = 0; ++ padapter->mppriv.rx_pktcount = 0; ++ padapter->mppriv.rx_crcerrpktcount = 0; ++ ++ return 0; ++} ++ ++static int rtw_mp_dump(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ struct mp_priv *pmp_priv; ++ struct pkt_attrib *pattrib; ++ u32 value; ++ u8 rf_type,path_nums = 0; ++ u32 i,j=1,path; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ pmp_priv = &padapter->mppriv; ++ ++ ++ //if (copy_from_user(extra, wrqu->data.pointer, wrqu->data.length)) ++ // return -EFAULT; ++ ++ if ( strncmp(extra, "all", 4)==0 ) ++ { ++ DBG_8192C("\n======= MAC REG =======\n"); ++ for ( i=0x0;i<0x300;i+=4 ) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++ for( i=0x400;i<0x800;i+=4 ) ++ { ++ if(j%4==1) DBG_8192C("0x%02x",i); ++ DBG_8192C(" 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) DBG_8192C("\n"); ++ } ++ ++ i,j=1; ++ padapter->HalFunc.GetHwRegHandler(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ DBG_8192C("\n======= RF REG =======\n"); ++ if(( RF_1T2R == rf_type ) ||( RF_1T1R ==rf_type )) ++ path_nums = 1; ++ else ++ path_nums = 2; ++ ++ for(path=0;pathHalFunc.read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) DBG_8192C("0x%02x ",i); ++ DBG_8192C(" 0x%08x ",value); ++ if((j++)%4==0) DBG_8192C("\n"); ++ } ++ } ++ } ++ return 0; ++} ++ ++static int rtw_mp_phypara(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ char input[wrqu->length]; ++ u32 valxcap; ++ ++ if (copy_from_user(input, wrqu->pointer, wrqu->length)) ++ return -EFAULT; ++ ++ DBG_8192C("%s:iwpriv in=%s\n", __func__, input); ++ ++ sscanf(input, "xcap=%d", &valxcap); ++ ++ if (!IS_HARDWARE_TYPE_8192D(padapter)) ++ return 0; ++#ifdef CONFIG_RTL8192D ++ Hal_ProSetCrystalCap( padapter , valxcap ); ++#endif ++ ++ sprintf( extra, "Set xcap=%d",valxcap ); ++ wrqu->length = strlen(extra) + 1; ++ ++return 0; ++ ++} ++ ++ ++/* update Tx AGC offset */ ++static int rtw_mp_antBdiff(struct net_device *dev, ++ struct iw_request_info *info, ++ struct iw_point *wrqu, char *extra) ++{ ++ ++ ++ // MPT_ProSetTxAGCOffset ++ return 0; ++} ++ ++ ++static int rtw_mp_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ u32 subcmd = wrqu->flags; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ if (padapter == NULL) ++ { ++ return -ENETDOWN; ++ } ++ ++ //_rtw_memset(extra, 0x00, IW_PRIV_SIZE_MASK); ++ ++ if (extra == NULL) ++ { ++ wrqu->length = 0; ++ return -EIO; ++ } ++ ++ switch(subcmd) ++ { ++ case WRITE_REG : ++ rtw_mp_write_reg (dev,info,wrqu,extra); ++ break; ++ ++ case WRITE_RF: ++ rtw_mp_write_rf (dev,info,wrqu,extra); ++ break; ++ ++ case MP_START: ++ DBG_8192C("set case mp_start \n"); ++ rtw_mp_start (dev,info,wrqu,extra); ++ break; ++ ++ case MP_STOP: ++ DBG_8192C("set case mp_stop \n"); ++ rtw_mp_stop (dev,info,wrqu,extra); ++ break; ++ ++ case MP_BANDWIDTH: ++ DBG_8192C("set case mp_bandwidth \n"); ++ rtw_mp_bandwidth (dev,info,wrqu,extra); ++ break; ++ case MP_PWRTRK: ++ DBG_8192C("set case MP_PWRTRK \n"); ++ rtw_mp_pwrtrk (dev,info,wrqu,extra); ++ break; ++ ++ case MP_RESET_STATS: ++ DBG_8192C("set case MP_RESET_STATS \n"); ++ rtw_mp_reset_stats (dev,info,wrqu,extra); ++ break; ++ ++ case EFUSE_SET: ++ DBG_8192C("efuse set \n"); ++ rtw_mp_efuse_set (dev,info,wdata,extra); ++ break; ++ ++ } ++ ++ ++ return 0; ++} ++ ++ ++static int rtw_mp_get(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wdata, char *extra) ++{ ++ struct iw_point *wrqu = (struct iw_point *)wdata; ++ u32 subcmd = wrqu->flags; ++ PADAPTER padapter = rtw_netdev_priv(dev); ++ ++ DBG_8192C("in mp_get extra= %s \n",extra); ++ ++ if (padapter == NULL) ++ { ++ return -ENETDOWN; ++ } ++ if (extra == NULL) ++ { ++ wrqu->length = 0; ++ return -EIO; ++ } ++ ++ switch(subcmd) ++ { ++ case MP_PHYPARA: ++ DBG_8192C("mp_get MP_PHYPARA \n"); ++ rtw_mp_phypara(dev,info,wrqu,extra); ++ break; ++ ++ case MP_CHANNEL: ++ DBG_8192C("set case mp_channel \n"); ++ rtw_mp_channel (dev,info,wrqu,extra); ++ break; ++ ++ case READ_REG: ++ DBG_8192C("mp_get READ_REG \n"); ++ rtw_mp_read_reg (dev,info,wrqu,extra); ++ break; ++ case READ_RF: ++ DBG_8192C("mp_get READ_RF \n"); ++ rtw_mp_read_rf (dev,info,wrqu,extra); ++ break; ++ ++ case MP_RATE: ++ DBG_8192C("set case mp_rate \n"); ++ rtw_mp_rate (dev,info,wrqu,extra); ++ break; ++ ++ case MP_TXPOWER: ++ DBG_8192C("set case MP_TXPOWER \n"); ++ rtw_mp_txpower (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ANT_TX: ++ DBG_8192C("set case MP_ANT_TX \n"); ++ rtw_mp_ant_tx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ANT_RX: ++ DBG_8192C("set case MP_ANT_RX \n"); ++ rtw_mp_ant_rx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_QUERY: ++ DBG_8192C("mp_get mp_query MP_QUERY \n"); ++ rtw_mp_trx_query(dev,info,wrqu,extra); ++ break; ++ ++ case MP_CTX: ++ DBG_8192C("set case MP_CTX \n"); ++ rtw_mp_ctx (dev,info,wrqu,extra); ++ break; ++ ++ case MP_ARX: ++ DBG_8192C("set case MP_ARX \n"); ++ rtw_mp_arx (dev,info,wrqu,extra); ++ break; ++ ++ case EFUSE_GET: ++ DBG_8192C("efuse get EFUSE_GET \n"); ++ rtw_mp_efuse_get(dev,info,wdata,extra); ++ break; ++ ++ case MP_DUMP: ++ DBG_8192C("set case MP_DUMP \n"); ++ rtw_mp_dump (dev,info,wrqu,extra); ++ break; ++ case MP_PSD: ++ DBG_8192C("set case MP_PSD \n"); ++ rtw_mp_psd (dev,info,wrqu,extra); ++ break; ++ ++ case MP_THER: ++ DBG_8192C("set case MP_THER \n"); ++ rtw_mp_thermal (dev,info,wrqu,extra); ++ break; ++ ++ } ++ ++return 0; ++} ++ ++#endif //#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++ ++ ++static int rtw_tdls_setup(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i, j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 mac_addr[ETH_ALEN]; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ issue_tdls_setup_req(padapter, mac_addr); ++ ++#endif ++ ++ return ret; ++} ++ ++ ++static int rtw_tdls_teardown(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ u8 i,j; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct sta_info *ptdls_sta = NULL; ++ u8 mac_addr[ETH_ALEN]; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo( &(padapter->stapriv), mac_addr); ++ ++ if(ptdls_sta != NULL) ++ { ++ ptdls_sta->stat_code = _RSON_TDLS_TEAR_UN_RSN_; ++ issue_tdls_teardown(padapter, mac_addr); ++ } ++ ++#endif ++ ++ return ret; ++} ++ ++ ++static int rtw_tdls_discovery(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ issue_tdls_dis_req(padapter, NULL); ++ ++#endif ++ ++ return ret; ++} ++ ++static int rtw_tdls_ch_switch(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ if( ptdls_sta == NULL ) ++ return ret; ++ ptdls_sta->option=4; ++ ptdlsinfo->ch_sensing=1; ++ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_INIT_CH_SEN); ++ ++#endif ++ ++ return ret; ++ } ++ ++static int rtw_tdls_pson(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 1); ++ ++#endif ++ ++ return ret; ++} ++ ++static int rtw_tdls_psoff(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ issue_nulldata_to_TDLS_peer_STA(padapter, ptdls_sta, 0); ++ ++#endif ++ ++ return ret; ++} ++ ++static int rtw_tdls_ch_switch_off(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u8 i, j, mac_addr[ETH_ALEN]; ++ struct sta_info *ptdls_sta = NULL; ++ ++ DBG_8192C( "[%s] %s %d\n", __FUNCTION__, extra, wrqu->data.length -1 ); ++ ++ for( i=0, j=0 ; i < ETH_ALEN; i++, j+=3 ){ ++ mac_addr[i]=key_2char2num(*(extra+j), *(extra+j+1)); ++ } ++ ++ ptdls_sta = rtw_get_stainfo(&padapter->stapriv, mac_addr); ++ ++ ptdls_sta->tdls_sta_state |= TDLS_SW_OFF_STATE; ++/* ++ if((ptdls_sta->tdls_sta_state & TDLS_AT_OFF_CH_STATE) && (ptdls_sta->tdls_sta_state & TDLS_PEER_AT_OFF_STATE)){ ++ pmlmeinfo->tdls_candidate_ch= pmlmeext->cur_channel; ++ issue_tdls_ch_switch_req(padapter, mac_addr); ++ DBG_8192C("issue tdls ch switch req back to base channel\n"); ++ } ++*/ ++ ++#endif ++ ++ return ret; ++} ++ ++static int rtw_tdls(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ ++#ifdef CONFIG_TDLS ++ ++ DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ ++ if ( _rtw_memcmp( extra, "setup=", 6 ) ) ++ { ++ wrqu->data.length -=6; ++ rtw_tdls_setup( dev, info, wrqu, &extra[6] ); ++ } ++ else if (_rtw_memcmp( extra, "tear=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_tdls_teardown( dev, info, wrqu, &extra[5] ); ++ } ++ else if (_rtw_memcmp( extra, "dis=", 4 ) ) ++ { ++ wrqu->data.length -= 4; ++ rtw_tdls_discovery( dev, info, wrqu, &extra[4] ); ++ } ++ else if (_rtw_memcmp( extra, "sw=", 3 ) ) ++ { ++ wrqu->data.length -= 3; ++ rtw_tdls_ch_switch( dev, info, wrqu, &extra[3] ); ++ } ++ else if (_rtw_memcmp( extra, "swoff=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_tdls_ch_switch_off( dev, info, wrqu, &extra[6] ); ++ } ++ else if (_rtw_memcmp( extra, "pson=", 5 ) ) ++ { ++ wrqu->data.length -= 5; ++ rtw_tdls_pson( dev, info, wrqu, &extra[5] ); ++ } ++ else if (_rtw_memcmp( extra, "psoff=", 6 ) ) ++ { ++ wrqu->data.length -= 6; ++ rtw_tdls_psoff( dev, info, wrqu, &extra[6] ); ++ } ++#endif ++ ++ return ret; ++} ++ ++ ++static int rtw_pm_set_lps(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ u8 mode = 0; ++ ++ switch( wrqu->data.length -1 ) ++ { ++ case 1: ++ { ++ mode = extra[ 0 ] - '0'; ++ break; ++ } ++ case 2: ++ { ++ mode = str_2char2num( extra[ 0 ], extra[ 1 ]); ++ break; ++ } ++ } ++ ++ if ( mode < PS_MODE_NUM ) ++ { ++ if(pwrctrlpriv->power_mgnt !=mode) ++ { ++ if(PS_MODE_ACTIVE == mode) ++ { ++ LeaveAllPowerSaveMode(padapter); ++ } ++ else ++ { ++ pwrctrlpriv->LpsIdleCount = 2; ++ } ++ pwrctrlpriv->power_mgnt = mode; ++ pwrctrlpriv->bLeisurePs = (PS_MODE_ACTIVE != pwrctrlpriv->power_mgnt)?_TRUE:_FALSE; ++ } ++ } ++ else ++ { ++ ret = -1; ++ } ++ ++ return ret; ++ ++} ++ ++static int rtw_pm_set_ips(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ _adapter *padapter = rtw_netdev_priv(dev); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ unsigned mode = 0; ++ ++ sscanf(extra, "%u", &mode); ++ ++ if( mode == IPS_NORMAL || mode == IPS_LEVEL_2 ) { ++ rtw_ips_mode_req(pwrctrlpriv, mode); ++ pwrctrlpriv->power_mgnt = PS_MODE_MIN; ++ rtw_set_pwr_state_check_timer(pwrctrlpriv); ++ DBG_871X("%s %s\n", __FUNCTION__, mode == IPS_NORMAL?"IPS_NORMAL":"IPS_LEVEL_2"); ++ return 0; ++ } ++ else if(mode ==IPS_NONE){ ++ if(_FAIL == rfpwrstate_check(padapter)) ++ { ++ return -EFAULT; ++ } ++ pwrctrlpriv->power_mgnt = PS_MODE_ACTIVE; ++ } ++ else { ++ return -EFAULT; ++ } ++ return 0; ++} ++ ++static int rtw_pm_set(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ DBG_8192C( "[%s] extra = %s\n", __FUNCTION__, extra ); ++ ++ if ( _rtw_memcmp( extra, "lps=", 4 ) ) ++ { ++ wrqu->data.length -= 4; ++ rtw_pm_set_lps( dev, info, wrqu, &extra[4] ); ++ } ++ if ( _rtw_memcmp( extra, "ips=", 4 ) ) ++ { ++ wrqu->data.length -= 4; ++ rtw_pm_set_ips(dev, info, wrqu, &extra[4]); ++ } ++ ++ return ret; ++} ++ ++static int rtw_wowlan_ctrl(struct net_device *dev, ++ struct iw_request_info *info, ++ union iwreq_data *wrqu, char *extra) ++{ ++ int ret = 0; ++ struct oid_par_priv oid_par; ++ struct wowlan_ioctl_param *poidparam; ++ uint status=0; ++ u16 len; ++ u8 *pparmbuf = NULL, bset; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ struct iw_point *p = &wrqu->data; ++ ++ //DBG_871X("+rtw_wowlan_ctrl\n"); ++ ++ //mutex_lock(&ioctl_mutex); ++ ++ if ((!p->length) || (!p->pointer)) { ++ ret = -EINVAL; ++ goto _rtw_wowlan_ctrl_exit; ++ } ++ ++ pparmbuf = NULL; ++ bset = (u8)(p->flags & 0xFFFF); ++ len = p->length; ++ pparmbuf = (u8*)rtw_malloc(len); ++ if (pparmbuf == NULL){ ++ ret = -ENOMEM; ++ goto _rtw_wowlan_ctrl_exit; ++ } ++ ++ if (copy_from_user(pparmbuf, p->pointer, len)) { ++ ret = -EFAULT; ++ goto _rtw_wowlan_ctrl_exit_free; ++ } ++ poidparam = (struct wowlan_ioctl_param *)pparmbuf; ++ ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup==_FALSE){ ++ ret = -EPERM; ++ DBG_871X("+rtw_wowlan_ctrl: Device didn't support the remote wakeup!!\n"); ++ goto _rtw_wowlan_ctrl_exit_free; ++ } ++ padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)poidparam); ++ ++ DBG_871X("rtw_wowlan_ctrl: subcode [%d], len[%d], buffer_len[%d]\r\n", ++ poidparam->subcode, poidparam->len, len); ++ ++ if (copy_to_user(p->pointer, pparmbuf, len)) { ++ ret = -EFAULT; ++ } ++ ++ ++_rtw_wowlan_ctrl_exit_free: ++ //DBG_871X("-rtw_wowlan_ctrl( subcode = %d)\n", poidparam->subcode); ++ rtw_mfree(pparmbuf, len); ++_rtw_wowlan_ctrl_exit: ++ ++ ++ return ret; ++} ++ ++ ++#include ++int rtw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) ++{ ++ struct iwreq *wrq = (struct iwreq *)rq; ++ int ret=0; ++ ++ switch (cmd) ++ { ++ case RTL_IOCTL_WPA_SUPPLICANT: ++ ret = wpa_supplicant_ioctl(dev, &wrq->u.data); ++ break; ++#ifdef CONFIG_AP_MODE ++ case RTL_IOCTL_HOSTAPD: ++ ret = rtw_hostapd_ioctl(dev, &wrq->u.data); ++ break; ++#endif ++ case (SIOCDEVPRIVATE+1): ++ ret = rtw_android_priv_cmd(dev, rq, cmd); ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ break; ++ } ++ ++ return ret; ++} ++ ++static iw_handler rtw_handlers[] = ++{ ++ NULL, /* SIOCSIWCOMMIT */ ++ rtw_wx_get_name, /* SIOCGIWNAME */ ++ dummy, /* SIOCSIWNWID */ ++ dummy, /* SIOCGIWNWID */ ++ rtw_wx_set_freq, /* SIOCSIWFREQ */ ++ rtw_wx_get_freq, /* SIOCGIWFREQ */ ++ rtw_wx_set_mode, /* SIOCSIWMODE */ ++ rtw_wx_get_mode, /* SIOCGIWMODE */ ++ dummy, /* SIOCSIWSENS */ ++ rtw_wx_get_sens, /* SIOCGIWSENS */ ++ NULL, /* SIOCSIWRANGE */ ++ rtw_wx_get_range, /* SIOCGIWRANGE */ ++ rtw_wx_set_priv, /* SIOCSIWPRIV */ ++ NULL, /* SIOCGIWPRIV */ ++ NULL, /* SIOCSIWSTATS */ ++ NULL, /* SIOCGIWSTATS */ ++ dummy, /* SIOCSIWSPY */ ++ dummy, /* SIOCGIWSPY */ ++ NULL, /* SIOCGIWTHRSPY */ ++ NULL, /* SIOCWIWTHRSPY */ ++ rtw_wx_set_wap, /* SIOCSIWAP */ ++ rtw_wx_get_wap, /* SIOCGIWAP */ ++ rtw_wx_set_mlme, /* request MLME operation; uses struct iw_mlme */ ++ dummy, /* SIOCGIWAPLIST -- depricated */ ++ rtw_wx_set_scan, /* SIOCSIWSCAN */ ++ rtw_wx_get_scan, /* SIOCGIWSCAN */ ++ rtw_wx_set_essid, /* SIOCSIWESSID */ ++ rtw_wx_get_essid, /* SIOCGIWESSID */ ++ dummy, /* SIOCSIWNICKN */ ++ rtw_wx_get_nick, /* SIOCGIWNICKN */ ++ NULL, /* -- hole -- */ ++ NULL, /* -- hole -- */ ++ rtw_wx_set_rate, /* SIOCSIWRATE */ ++ rtw_wx_get_rate, /* SIOCGIWRATE */ ++ dummy, /* SIOCSIWRTS */ ++ rtw_wx_get_rts, /* SIOCGIWRTS */ ++ rtw_wx_set_frag, /* SIOCSIWFRAG */ ++ rtw_wx_get_frag, /* SIOCGIWFRAG */ ++ dummy, /* SIOCSIWTXPOW */ ++ dummy, /* SIOCGIWTXPOW */ ++ dummy, /* SIOCSIWRETRY */ ++ rtw_wx_get_retry, /* SIOCGIWRETRY */ ++ rtw_wx_set_enc, /* SIOCSIWENCODE */ ++ rtw_wx_get_enc, /* SIOCGIWENCODE */ ++ dummy, /* SIOCSIWPOWER */ ++ rtw_wx_get_power, /* SIOCGIWPOWER */ ++ NULL, /*---hole---*/ ++ NULL, /*---hole---*/ ++ rtw_wx_set_gen_ie, /* SIOCSIWGENIE */ ++ NULL, /* SIOCGWGENIE */ ++ rtw_wx_set_auth, /* SIOCSIWAUTH */ ++ NULL, /* SIOCGIWAUTH */ ++ rtw_wx_set_enc_ext, /* SIOCSIWENCODEEXT */ ++ NULL, /* SIOCGIWENCODEEXT */ ++ rtw_wx_set_pmkid, /* SIOCSIWPMKSA */ ++ NULL, /*---hole---*/ ++}; ++ ++#if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++static const struct iw_priv_args rtw_private_args[] = ++{ ++ { SIOCIWFIRSTPRIV + 0x00, IW_PRIV_TYPE_CHAR | 1024, 0 , ""}, //set ++ { SIOCIWFIRSTPRIV + 0x01, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , ""},//get ++/* --- sub-ioctls definitions --- */ ++ { MP_START , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_start" }, //set ++ { MP_PHYPARA, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_phypara" },//get ++ { MP_STOP , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_stop" }, //set ++ { MP_CHANNEL , IW_PRIV_TYPE_CHAR | 1024 , IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_channel" },//get ++ { MP_BANDWIDTH , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_bandwidth"}, //set ++ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" },//get ++ { MP_RESET_STATS , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_reset_stats"}, ++ { MP_QUERY , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "mp_query"}, //get ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { READ_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_reg" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_RATE , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_rate" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { READ_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "read_rf" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_PSD , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_psd"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_DUMP, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_dump" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_TXPOWER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_txpower"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ANT_TX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_tx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ant_rx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { WRITE_REG , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_reg" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { WRITE_RF , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "write_rf" }, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_CTX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ctx"}, ++ { MP_NULL, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"},//set ++ { MP_ARX , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_arx"}, ++ { MP_ANT_RX , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ant_rx"}, ++ { MP_THER , IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "mp_ther"}, ++ { EFUSE_SET, IW_PRIV_TYPE_CHAR | 1024, 0, "efuse_set" }, ++ { EFUSE_GET, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK, "efuse_get" }, ++ { MP_PWRTRK , IW_PRIV_TYPE_CHAR | 1024, 0, "mp_pwrtrk"}, ++ { MP_IOCTL, IW_PRIV_TYPE_CHAR | 1024, 0, "mp_ioctl"}, // mp_ioctl ++ ++ ++ { SIOCIWFIRSTPRIV + 0x02, IW_PRIV_TYPE_CHAR | 1024, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_MASK , "test"},//set ++}; ++ ++ ++static iw_handler rtw_private_handler[] = ++{ ++ rtw_mp_set, ++ rtw_mp_get, ++}; ++ ++ ++#else // not inlucde MP ++ ++static const struct iw_priv_args rtw_private_args[] = { ++ { ++ SIOCIWFIRSTPRIV + 0x0, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "rtw_write32" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x1, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rtw_read32" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x2, 0, 0, "driver_ext" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x3, 0, 0, "" // mp_ioctl ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x4, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "apinfo" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x5, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "setpid" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x6, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_start" ++ }, ++//for PLATFORM_MT53XX ++ { ++ SIOCIWFIRSTPRIV + 0x7, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "get_sensitivity" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x8, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_prob_req_ie" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x9, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "wps_assoc_req_ie" ++ }, ++ ++//for RTK_DMP_PLATFORM ++ { ++ SIOCIWFIRSTPRIV + 0xA, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "channel_plan" ++ }, ++ ++ { ++ SIOCIWFIRSTPRIV + 0xB, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "dbg" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0xC, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 3, 0, "rfw" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0xD, ++ IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | IFNAMSIZ, "rfr" ++ }, ++ ++ { ++ SIOCIWFIRSTPRIV + 0xE,0,0, "wowlan_ctrl" ++ }, ++ ++ { ++ SIOCIWFIRSTPRIV + 0x10, ++ IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, 0, "p2p_set" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x11, ++ IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IW_PRIV_SIZE_FIXED | P2P_PRIVATE_IOCTL_SET_LEN , "p2p_get" ++ }, ++ { ++ SIOCIWFIRSTPRIV + 0x12, ++ IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, IW_PRIV_TYPE_CHAR | IFNAMSIZ , "p2p_get2" ++ }, ++#ifdef CONFIG_TDLS ++ {SIOCIWFIRSTPRIV + 0x13, IW_PRIV_TYPE_CHAR | 128, 0,"NULL"}, ++ { ++ SIOCIWFIRSTPRIV + 0x14, ++ IW_PRIV_TYPE_CHAR | 64, 0, "tdls" ++ }, ++#endif ++ { ++ SIOCIWFIRSTPRIV + 0x16, ++ IW_PRIV_TYPE_CHAR | P2P_PRIVATE_IOCTL_SET_LEN, 0, "pm_set" ++ }, ++ ++ {SIOCIWFIRSTPRIV + 0x18, IW_PRIV_TYPE_CHAR | IFNAMSIZ , 0 , "rereg_nd_name"}, ++ ++ {SIOCIWFIRSTPRIV + 0x1A, IW_PRIV_TYPE_CHAR | 128, 0, "efuse_set"}, ++ {SIOCIWFIRSTPRIV + 0x1B, IW_PRIV_TYPE_CHAR | 128, IW_PRIV_TYPE_CHAR |IW_PRIV_SIZE_FIXED |0x700 ,"efuse_get"}, ++ ++}; ++ ++static iw_handler rtw_private_handler[] = ++{ ++ rtw_wx_write32, //0x00 ++ rtw_wx_read32, //0x01 ++ rtw_drvext_hdl, //0x02 ++ rtw_mp_ioctl_hdl, //0x03 ++ ++// for MM DTV platform ++ rtw_get_ap_info, //0x04 ++ ++ rtw_set_pid, //0x05 ++ rtw_wps_start, //0x06 ++ ++// for PLATFORM_MT53XX ++ rtw_wx_get_sensitivity, //0x07 ++ rtw_wx_set_mtk_wps_probe_ie, //0x08 ++ rtw_wx_set_mtk_wps_ie, //0x09 ++ ++// for RTK_DMP_PLATFORM ++// Set Channel depend on the country code ++ rtw_wx_set_channel_plan, //0x0A ++ ++ rtw_dbg_port, //0x0B ++ rtw_wx_write_rf, //0x0C ++ rtw_wx_read_rf, //0x0D ++ ++ ++ rtw_wowlan_ctrl, //0x0E ++ ++ rtw_wx_priv_null, //0x0F ++ ++ rtw_p2p_set, //0x10 ++ rtw_p2p_get, //0x11 ++ rtw_p2p_get2, //0x12 ++ ++ NULL, //0x13 ++ rtw_tdls, //0x14 ++ rtw_wx_priv_null, //0x15 ++ ++ rtw_pm_set, //0x16 ++ rtw_wx_priv_null, //0x17 ++ rtw_rereg_nd_name, //0x18 ++ rtw_wx_priv_null, //0x19 ++ ++ rtw_mp_efuse_set, //0x1A ++ rtw_mp_efuse_get, //0x1B ++ // 0x1C is reserved for hostapd ++}; ++ ++#endif // #if defined(CONFIG_MP_INCLUDED) && defined(CONFIG_MP_IWPRIV_SUPPORT) ++ ++#if WIRELESS_EXT >= 17 ++static struct iw_statistics *rtw_get_wireless_stats(struct net_device *dev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct iw_statistics *piwstats=&padapter->iwstats; ++ int tmp_level = 0; ++ int tmp_qual = 0; ++ int tmp_noise = 0; ++ ++ if (check_fwstate(&padapter->mlmepriv, _FW_LINKED) != _TRUE) ++ { ++ piwstats->qual.qual = 0; ++ piwstats->qual.level = 0; ++ piwstats->qual.noise = 0; ++ //DBG_8192C("No link level:%d, qual:%d, noise:%d\n", tmp_level, tmp_qual, tmp_noise); ++ } ++ else{ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ tmp_level = translate_percentage_to_dbm(padapter->recvpriv.signal_strength); ++ #else ++ tmp_level = padapter->recvpriv.signal_strength; ++ #endif ++ ++ tmp_qual = padapter->recvpriv.signal_qual; ++ tmp_noise =padapter->recvpriv.noise; ++ //DBG_8192C("level:%d, qual:%d, noise:%d, rssi (%d)\n", tmp_level, tmp_qual, tmp_noise,padapter->recvpriv.rssi); ++ ++ piwstats->qual.level = tmp_level; ++ piwstats->qual.qual = tmp_qual; ++ piwstats->qual.noise = tmp_noise; ++ } ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14)) ++ piwstats->qual.updated = IW_QUAL_ALL_UPDATED ;//|IW_QUAL_DBM; ++#else ++#ifdef RTK_DMP_PLATFORM ++ //IW_QUAL_DBM= 0x8, if driver use this flag, wireless extension will show value of dbm. ++ //remove this flag for show percentage 0~100 ++ piwstats->qual.updated = 0x07; ++#else ++ piwstats->qual.updated = 0x0f; ++#endif ++#endif ++ ++ #ifdef CONFIG_SIGNAL_DISPLAY_DBM ++ piwstats->qual.updated = piwstats->qual.updated | IW_QUAL_DBM; ++ #endif ++ ++ return &padapter->iwstats; ++} ++#endif ++ ++struct iw_handler_def rtw_handlers_def = ++{ ++ .standard = rtw_handlers, ++ .num_standard = sizeof(rtw_handlers) / sizeof(iw_handler), ++ .private = rtw_private_handler, ++ .private_args = (struct iw_priv_args *)rtw_private_args, ++ .num_private = sizeof(rtw_private_handler) / sizeof(iw_handler), ++ .num_private_args = sizeof(rtw_private_args) / sizeof(struct iw_priv_args), ++#if WIRELESS_EXT >= 17 ++ .get_wireless_stats = rtw_get_wireless_stats, ++#endif ++}; ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/mlme_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/mlme_linux.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,740 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _MLME_OSDEP_C_ ++ ++#include ++#include ++#include ++#include ++ ++ ++#ifdef RTK_DMP_PLATFORM ++void Linkup_workitem_callback(struct work_struct *work) ++{ ++ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkup_workitem); ++ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkup_workitem_callback\n")); ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKUP); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKUP); ++#endif ++ ++_func_exit_; ++} ++ ++void Linkdown_workitem_callback(struct work_struct *work) ++{ ++ struct mlme_priv *pmlmepriv = container_of(work, struct mlme_priv, Linkdown_workitem); ++ _adapter *padapter = container_of(pmlmepriv, _adapter, mlmepriv); ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+ Linkdown_workitem_callback\n")); ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++ kobject_uevent(&padapter->pnetdev->dev.kobj, KOBJ_LINKDOWN); ++#else ++ kobject_hotplug(&padapter->pnetdev->class_dev.kobj, KOBJ_LINKDOWN); ++#endif ++ ++_func_exit_; ++} ++#endif ++ ++ ++/* ++void sitesurvey_ctrl_handler(void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ ++ _sitesurvey_ctrl_handler(adapter); ++ ++ _set_timer(&adapter->mlmepriv.sitesurveyctrl.sitesurvey_ctrl_timer, 3000); ++} ++*/ ++ ++void rtw_join_timeout_handler (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ _rtw_join_timeout_handler(adapter); ++} ++ ++ ++void _rtw_scan_timeout_handler (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ rtw_scan_timeout_handler(adapter); ++} ++ ++ ++void _dynamic_check_timer_handlder (void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ ++ rtw_dynamic_check_timer_handlder(adapter); ++ ++ _set_timer(&adapter->mlmepriv.dynamic_chk_timer, 2000); ++} ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++void _rtw_set_scan_deny_timer_hdl(void *FunctionContext) ++{ ++ _adapter *adapter = (_adapter *)FunctionContext; ++ rtw_set_scan_deny_timer_hdl(adapter); ++} ++#endif ++ ++ ++void rtw_init_mlme_timer(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ _init_timer(&(pmlmepriv->assoc_timer), padapter->pnetdev, rtw_join_timeout_handler, padapter); ++ //_init_timer(&(pmlmepriv->sitesurveyctrl.sitesurvey_ctrl_timer), padapter->pnetdev, sitesurvey_ctrl_handler, padapter); ++ _init_timer(&(pmlmepriv->scan_to_timer), padapter->pnetdev, _rtw_scan_timeout_handler, padapter); ++ ++ _init_timer(&(pmlmepriv->dynamic_chk_timer), padapter->pnetdev, _dynamic_check_timer_handlder, padapter); ++ ++ #ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _init_timer(&(pmlmepriv->set_scan_deny_timer), padapter->pnetdev, _rtw_set_scan_deny_timer_hdl, padapter); ++ #endif ++ ++#ifdef RTK_DMP_PLATFORM ++ _init_workitem(&(pmlmepriv->Linkup_workitem), Linkup_workitem_callback, padapter); ++ _init_workitem(&(pmlmepriv->Linkdown_workitem), Linkdown_workitem_callback, padapter); ++#endif ++ ++} ++ ++extern void rtw_indicate_wx_assoc_event(_adapter *padapter); ++extern void rtw_indicate_wx_disassoc_event(_adapter *padapter); ++ ++void rtw_os_indicate_connect(_adapter *adapter) ++{ ++ struct mlme_priv *pmlmepriv = &adapter->mlmepriv; ++ ++_func_enter_; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_connect(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_indicate_wx_assoc_event(adapter); ++ ++ netif_carrier_on(adapter->pnetdev); ++ ++ if(adapter->pid[2] !=0) ++ rtw_signal_process(adapter->pid[2], SIGALRM); ++ ++#ifdef RTK_DMP_PLATFORM ++ _set_workitem(&pmlmepriv->Linkup_workitem); ++#endif ++ ++_func_exit_; ++ ++} ++ ++extern void indicate_wx_scan_complete_event(_adapter *padapter); ++void rtw_os_indicate_scan_done( _adapter *padapter, bool aborted) ++{ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), aborted); ++#endif ++ indicate_wx_scan_complete_event(padapter); ++} ++ ++static RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; ++void rtw_reset_securitypriv( _adapter *adapter ) ++{ ++ u8 backupPMKIDIndex = 0; ++ u8 backupTKIPCountermeasure = 0x00; ++ u32 backupTKIPcountermeasure_time = 0; ++ ++ if(adapter->securitypriv.dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)//802.1x ++ { ++ // Added by Albert 2009/02/18 ++ // We have to backup the PMK information for WiFi PMK Caching test item. ++ // ++ // Backup the btkip_countermeasure information. ++ // When the countermeasure is trigger, the driver have to disconnect with AP for 60 seconds. ++ ++ _rtw_memset( &backupPMKIDList[ 0 ], 0x00, sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ ++ _rtw_memcpy( &backupPMKIDList[ 0 ], &adapter->securitypriv.PMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ backupPMKIDIndex = adapter->securitypriv.PMKIDIndex; ++ backupTKIPCountermeasure = adapter->securitypriv.btkip_countermeasure; ++ backupTKIPcountermeasure_time = adapter->securitypriv.btkip_countermeasure_time; ++ ++ _rtw_memset((unsigned char *)&adapter->securitypriv, 0, sizeof (struct security_priv)); ++ //_init_timer(&(adapter->securitypriv.tkip_timer),adapter->pnetdev, rtw_use_tkipkey_handler, adapter); ++ ++ // Added by Albert 2009/02/18 ++ // Restore the PMK information to securitypriv structure for the following connection. ++ _rtw_memcpy( &adapter->securitypriv.PMKIDList[ 0 ], &backupPMKIDList[ 0 ], sizeof( RT_PMKID_LIST ) * NUM_PMKID_CACHE ); ++ adapter->securitypriv.PMKIDIndex = backupPMKIDIndex; ++ adapter->securitypriv.btkip_countermeasure = backupTKIPCountermeasure; ++ adapter->securitypriv.btkip_countermeasure_time = backupTKIPcountermeasure_time; ++ ++ adapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ adapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ } ++ else //reset values in securitypriv ++ { ++ //if(adapter->mlmepriv.fw_state & WIFI_STATION_STATE) ++ //{ ++ struct security_priv *psec_priv=&adapter->securitypriv; ++ ++ psec_priv->dot11AuthAlgrthm =dot11AuthAlgrthm_Open; //open system ++ psec_priv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ psec_priv->dot11PrivacyKeyIndex = 0; ++ ++ psec_priv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psec_priv->dot118021XGrpKeyid = 1; ++ ++ psec_priv->ndisauthtype = Ndis802_11AuthModeOpen; ++ psec_priv->ndisencryptstatus = Ndis802_11WEPDisabled; ++ psec_priv->wps_phase = _FALSE; ++ //} ++ } ++} ++ ++void rtw_os_indicate_disconnect( _adapter *adapter ) ++{ ++ //RT_PMKID_LIST backupPMKIDList[ NUM_PMKID_CACHE ]; ++ ++_func_enter_; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_disconnect(adapter); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ rtw_indicate_wx_disassoc_event(adapter); ++ netif_carrier_off(adapter->pnetdev); ++ ++#ifdef RTK_DMP_PLATFORM ++ _set_workitem(&adapter->mlmepriv.Linkdown_workitem); ++#endif ++ rtw_reset_securitypriv( adapter ); ++ ++_func_exit_; ++ ++} ++ ++void rtw_report_sec_ie(_adapter *adapter,u8 authmode,u8 *sec_ie) ++{ ++ uint len; ++ u8 *buff,*p,i; ++ union iwreq_data wrqu; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("+rtw_report_sec_ie, authmode=%d\n", authmode)); ++ ++ buff = NULL; ++ if(authmode==_WPA_IE_ID_) ++ { ++ RT_TRACE(_module_mlme_osdep_c_,_drv_info_,("rtw_report_sec_ie, authmode=%d\n", authmode)); ++ ++ buff = rtw_malloc(IW_CUSTOM_MAX); ++ ++ _rtw_memset(buff,0,IW_CUSTOM_MAX); ++ ++ p=buff; ++ ++ p+=sprintf(p,"ASSOCINFO(ReqIEs="); ++ ++ len = sec_ie[1]+2; ++ len = (len < IW_CUSTOM_MAX) ? len:IW_CUSTOM_MAX; ++ ++ for(i=0;ipnetdev,IWEVCUSTOM,&wrqu,buff); ++ ++ if(buff) ++ rtw_mfree(buff, IW_CUSTOM_MAX); ++ ++ } ++ ++_func_exit_; ++ ++} ++ ++void _survey_timer_hdl (void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ ++ survey_timer_hdl(padapter); ++} ++ ++void _link_timer_hdl (void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ link_timer_hdl(padapter); ++} ++ ++void _addba_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *psta = (struct sta_info *)FunctionContext; ++ addba_timer_hdl(psta); ++} ++ ++void init_addba_retry_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ ++ _init_timer(&psta->addba_retry_timer, padapter->pnetdev, _addba_timer_hdl, psta); ++} ++ ++#ifdef CONFIG_TDLS ++void _TPK_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ ++ ptdls_sta->TPK_count++; ++ //TPK_timer set 1000 as default ++ //retry timer should set at least 301 sec. ++ if(ptdls_sta->TPK_count==TPK_RESEND_COUNT){ ++ ptdls_sta->TPK_count=0; ++ issue_tdls_setup_req(ptdls_sta->padapter, ptdls_sta->hwaddr); ++ } ++ ++ _set_timer(&ptdls_sta->TPK_timer, ptdls_sta->TDLS_PeerKey_Lifetime/TPK_RESEND_COUNT); ++} ++ ++void init_TPK_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ ++ _init_timer(&psta->TPK_timer, padapter->pnetdev, _TPK_timer_hdl, psta); ++} ++ ++// TDLS_DONE_CH_SEN: channel sensing and report candidate channel ++// TDLS_OFF_CH: first time set channel to off channel ++// TDLS_BASE_CH: when go back to the channel linked with AP, send null data to peer STA as an indication ++void _ch_switch_timer_hdl(void *FunctionContext) ++{ ++ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ ++ if( ptdls_sta->option == TDLS_DONE_CH_SEN ){ ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_DONE_CH_SEN); ++ }else if( ptdls_sta->option == TDLS_OFF_CH ){ ++ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0); ++ _set_timer(&ptdls_sta->base_ch_timer, 500); ++ }else if( ptdls_sta->option == TDLS_BASE_CH){ ++ issue_nulldata_to_TDLS_peer_STA(ptdls_sta->padapter, ptdls_sta, 0); ++ } ++} ++ ++void init_ch_switch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->option_timer, padapter->pnetdev, _ch_switch_timer_hdl, psta); ++} ++ ++void _base_ch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_OFF_CH); ++} ++ ++void init_base_ch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->base_ch_timer, padapter->pnetdev, _base_ch_timer_hdl, psta); ++} ++ ++void _off_ch_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ rtw_tdls_cmd(ptdls_sta->padapter, ptdls_sta->hwaddr, TDLS_P_BASE_CH ); ++ } ++ ++void init_off_ch_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->off_ch_timer, padapter->pnetdev, _off_ch_timer_hdl, psta); ++} ++ ++void _tdls_handshake_timer_hdl(void *FunctionContext) ++{ ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ ++ if(ptdls_sta != NULL) ++ { ++ if( !(ptdls_sta->tdls_sta_state & TDLS_LINKED_STATE) ) ++ { ++ printk("HANDSHAKE TIME OUT\n"); ++ free_tdls_sta(ptdls_sta->padapter, ptdls_sta); ++ } ++ } ++} ++ ++void init_handshake_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->handshake_timer, padapter->pnetdev, _tdls_handshake_timer_hdl, psta); ++} ++ ++//Check tdls peer sta alive. ++void _tdls_alive_timer_phase1_hdl(void *FunctionContext) ++{ ++ _irqL irqL; ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ _enter_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ptdls_sta->timer_flag = 1; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ++ ptdls_sta->tdls_sta_state &= (~TDLS_ALIVE_STATE); ++ ++ DBG_8192C("issue_tdls_dis_req to check alive\n"); ++ issue_tdls_dis_req( padapter, ptdls_sta->hwaddr); ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH1); ++ sta_update_last_rx_pkts(ptdls_sta); ++ ++ if ( ptdls_sta->timer_flag == 2 ) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_FREE_STA); ++ else ++ { ++ _enter_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ptdls_sta->timer_flag = 0; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ } ++ ++} ++ ++void _tdls_alive_timer_phase2_hdl(void *FunctionContext) ++{ ++ _irqL irqL; ++ struct sta_info *ptdls_sta = (struct sta_info *)FunctionContext; ++ _adapter *padapter = ptdls_sta->padapter; ++ struct tdls_info *ptdlsinfo = &padapter->tdlsinfo; ++ ++ _enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 1; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++ ++ if( (ptdls_sta->tdls_sta_state & TDLS_ALIVE_STATE) && ++ (sta_last_rx_pkts(ptdls_sta) + 3 <= sta_rx_pkts(ptdls_sta)) ) ++ { ++ DBG_8192C("TDLS STA ALIVE\n"); ++ ptdls_sta->alive_count = 0; ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH2); ++ } ++ else ++ { ++ DBG_8192C("TDLS STA TOO FAR\n"); ++ ptdls_sta->alive_count++; ++ if( ptdls_sta->alive_count == TDLS_ALIVE_COUNT ) ++ { ++ ptdls_sta->stat_code = _RSON_TDLS_TEAR_TOOFAR_; ++ issue_tdls_teardown(padapter, ptdls_sta->hwaddr); ++ } ++ else ++ { ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_CKALV_PH2); ++ } ++} ++ ++ if ( ptdls_sta->timer_flag == 2 ) ++ rtw_tdls_cmd(padapter, ptdls_sta->hwaddr, TDLS_FREE_STA); ++ else ++{ ++ _enter_critical_bh(&(ptdlsinfo->hdl_lock), &irqL); ++ ptdls_sta->timer_flag = 0; ++ _exit_critical_bh(&ptdlsinfo->hdl_lock, &irqL); ++} ++ ++} ++ ++void init_tdls_alive_timer(_adapter *padapter, struct sta_info *psta) ++{ ++ psta->padapter=padapter; ++ _init_timer(&psta->alive_timer1, padapter->pnetdev, _tdls_alive_timer_phase1_hdl, psta); ++ _init_timer(&psta->alive_timer2, padapter->pnetdev, _tdls_alive_timer_phase2_hdl, psta); ++} ++#endif //CONFIG_TDLS ++ ++/* ++void _reauth_timer_hdl(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ reauth_timer_hdl(padapter); ++} ++ ++void _reassoc_timer_hdl(void *FunctionContext) ++{ ++ _adapter *padapter = (_adapter *)FunctionContext; ++ reassoc_timer_hdl(padapter); ++} ++*/ ++ ++void init_mlme_ext_timer(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ _init_timer(&pmlmeext->survey_timer, padapter->pnetdev, _survey_timer_hdl, padapter); ++ _init_timer(&pmlmeext->link_timer, padapter->pnetdev, _link_timer_hdl, padapter); ++ //_init_timer(&pmlmeext->ADDBA_timer, padapter->pnetdev, _addba_timer_hdl, padapter); ++ ++ //_init_timer(&pmlmeext->reauth_timer, padapter->pnetdev, _reauth_timer_hdl, padapter); ++ //_init_timer(&pmlmeext->reassoc_timer, padapter->pnetdev, _reassoc_timer_hdl, padapter); ++} ++ ++#ifdef CONFIG_AP_MODE ++ ++void rtw_indicate_sta_assoc_event(_adapter *padapter, struct sta_info *psta) ++{ ++ union iwreq_data wrqu; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(psta==NULL) ++ return; ++ ++ if(psta->aid > NUM_STA) ++ return; ++ ++ if(pstapriv->sta_aid[psta->aid - 1] != psta) ++ return; ++ ++ ++ wrqu.addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); ++ ++ DBG_871X("+rtw_indicate_sta_assoc_event\n"); ++ ++ wireless_send_event(padapter->pnetdev, IWEVREGISTERED, &wrqu, NULL); ++ ++} ++ ++void rtw_indicate_sta_disassoc_event(_adapter *padapter, struct sta_info *psta) ++{ ++ union iwreq_data wrqu; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(psta==NULL) ++ return; ++ ++ if(psta->aid > NUM_STA) ++ return; ++ ++ if(pstapriv->sta_aid[psta->aid - 1] != psta) ++ return; ++ ++ ++ wrqu.addr.sa_family = ARPHRD_ETHER; ++ ++ _rtw_memcpy(wrqu.addr.sa_data, psta->hwaddr, ETH_ALEN); ++ ++ DBG_871X("+rtw_indicate_sta_disassoc_event\n"); ++ ++ wireless_send_event(padapter->pnetdev, IWEVEXPIRED, &wrqu, NULL); ++ ++} ++ ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ ++static int mgnt_xmit_entry(struct sk_buff *skb, struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ _adapter *padapter = (_adapter *)phostapdpriv->padapter; ++ ++ //DBG_8192C("%s\n", __FUNCTION__); ++ ++ return padapter->HalFunc.hostap_mgnt_xmit_entry(padapter, skb); ++} ++ ++static int mgnt_netdev_open(struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ ++ DBG_8192C("mgnt_netdev_open: MAC Address:" MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ init_usb_anchor(&phostapdpriv->anchored); ++ ++ if(!netif_queue_stopped(pnetdev)) ++ netif_start_queue(pnetdev); ++ else ++ netif_wake_queue(pnetdev); ++ ++ ++ netif_carrier_on(pnetdev); ++ ++ //rtw_write16(phostapdpriv->padapter, 0x0116, 0x0100);//only excluding beacon ++ ++ return 0; ++} ++static int mgnt_netdev_close(struct net_device *pnetdev) ++{ ++ struct hostapd_priv *phostapdpriv = rtw_netdev_priv(pnetdev); ++ ++ DBG_8192C("%s\n", __FUNCTION__); ++ ++ usb_kill_anchored_urbs(&phostapdpriv->anchored); ++ ++ netif_carrier_off(pnetdev); ++ ++ if (!netif_queue_stopped(pnetdev)) ++ netif_stop_queue(pnetdev); ++ ++ //rtw_write16(phostapdpriv->padapter, 0x0116, 0x3f3f); ++ ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtl871x_mgnt_netdev_ops = { ++ .ndo_open = mgnt_netdev_open, ++ .ndo_stop = mgnt_netdev_close, ++ .ndo_start_xmit = mgnt_xmit_entry, ++ //.ndo_set_mac_address = r871x_net_set_mac_address, ++ //.ndo_get_stats = r871x_net_get_stats, ++ //.ndo_do_ioctl = r871x_mp_ioctl, ++}; ++#endif ++ ++int hostapd_mode_init(_adapter *padapter) ++{ ++ unsigned char mac[ETH_ALEN]; ++ struct hostapd_priv *phostapdpriv; ++ struct net_device *pnetdev; ++ ++ pnetdev = rtw_alloc_etherdev(sizeof(struct hostapd_priv)); ++ if (!pnetdev) ++ return -ENOMEM; ++ ++ //SET_MODULE_OWNER(pnetdev); ++ ether_setup(pnetdev); ++ ++ //pnetdev->type = ARPHRD_IEEE80211; ++ ++ phostapdpriv = rtw_netdev_priv(pnetdev); ++ phostapdpriv->pmgnt_netdev = pnetdev; ++ phostapdpriv->padapter= padapter; ++ padapter->phostapdpriv = phostapdpriv; ++ ++ //pnetdev->init = NULL; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ ++ DBG_8192C("register rtl871x_mgnt_netdev_ops to netdev_ops\n"); ++ ++ pnetdev->netdev_ops = &rtl871x_mgnt_netdev_ops; ++ ++#else ++ ++ pnetdev->open = mgnt_netdev_open; ++ ++ pnetdev->stop = mgnt_netdev_close; ++ ++ pnetdev->hard_start_xmit = mgnt_xmit_entry; ++ ++ //pnetdev->set_mac_address = r871x_net_set_mac_address; ++ ++ //pnetdev->get_stats = r871x_net_get_stats; ++ ++ //pnetdev->do_ioctl = r871x_mp_ioctl; ++ ++#endif ++ ++ pnetdev->watchdog_timeo = HZ; /* 1 second timeout */ ++ ++ //pnetdev->wireless_handlers = NULL; ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ pnetdev->features |= NETIF_F_IP_CSUM; ++#endif ++ ++ ++ ++ if(dev_alloc_name(pnetdev,"mgnt.wlan%d") < 0) ++ { ++ DBG_8192C("hostapd_mode_init(): dev_alloc_name, fail! \n"); ++ } ++ ++ ++ //SET_NETDEV_DEV(pnetdev, pintfpriv->udev); ++ ++ ++ mac[0]=0x00; ++ mac[1]=0xe0; ++ mac[2]=0x4c; ++ mac[3]=0x87; ++ mac[4]=0x11; ++ mac[5]=0x12; ++ ++ _rtw_memcpy(pnetdev->dev_addr, mac, ETH_ALEN); ++ ++ ++ netif_carrier_off(pnetdev); ++ ++ ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) ++ { ++ DBG_8192C("hostapd_mode_init(): register_netdev fail!\n"); ++ ++ if(pnetdev) ++ { ++ rtw_free_netdev(pnetdev); ++ } ++ } ++ ++ return 0; ++ ++} ++ ++void hostapd_mode_unload(_adapter *padapter) ++{ ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pnetdev = phostapdpriv->pmgnt_netdev; ++ ++ unregister_netdev(pnetdev); ++ rtw_free_netdev(pnetdev); ++ ++} ++ ++#endif ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1555 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _OS_INTFS_C_ ++ ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef CONFIG_SDIO_HCI ++#include ++#endif ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++#ifdef CONFIG_PCI_HCI ++#include ++#endif ++ ++#ifdef CONFIG_BR_EXT ++#include ++#endif //CONFIG_BR_EXT ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Realtek Wireless Lan Driver"); ++MODULE_AUTHOR("Realtek Semiconductor Corp."); ++MODULE_VERSION(DRIVERVERSION); ++ ++/* module param defaults */ ++int rtw_chip_version = 0x00; ++int rtw_rfintfs = HWPI; ++int rtw_lbkmode = 0;//RTL8712_AIR_TRX; ++ ++ ++int rtw_network_mode = Ndis802_11IBSS;//Ndis802_11Infrastructure;//infra, ad-hoc, auto ++//NDIS_802_11_SSID ssid; ++int rtw_channel = 1;//ad-hoc support requirement ++int rtw_wireless_mode = WIRELESS_11BG_24N; ++int rtw_vrtl_carrier_sense = AUTO_VCS; ++int rtw_vcs_type = RTS_CTS;//* ++int rtw_rts_thresh = 2347;//* ++int rtw_frag_thresh = 2346;//* ++int rtw_preamble = PREAMBLE_LONG;//long, short, auto ++int rtw_scan_mode = 1;//active, passive ++int rtw_adhoc_tx_pwr = 1; ++int rtw_soft_ap = 0; ++//int smart_ps = 1; ++#ifdef CONFIG_POWER_SAVING ++int rtw_power_mgnt = 1; ++#else ++int rtw_power_mgnt = PS_MODE_ACTIVE; ++#endif ++ ++#ifdef CONFIG_IPS_LEVEL_2 ++int rtw_ips_mode = IPS_LEVEL_2; ++#else ++int rtw_ips_mode = IPS_NORMAL; ++#endif ++module_param(rtw_ips_mode, int, 0644); ++MODULE_PARM_DESC(rtw_ips_mode,"The default IPS mode"); ++ ++int rtw_radio_enable = 1; ++int rtw_long_retry_lmt = 7; ++int rtw_short_retry_lmt = 7; ++int rtw_busy_thresh = 40; ++//int qos_enable = 0; //* ++int rtw_ack_policy = NORMAL_ACK; ++#ifdef CONFIG_MP_INCLUDED ++int rtw_mp_mode = 1; ++#else ++int rtw_mp_mode = 0; ++#endif ++int rtw_software_encrypt = 0; ++int rtw_software_decrypt = 0; ++ ++int rtw_acm_method = 0;// 0:By SW 1:By HW. ++ ++int rtw_wmm_enable = 1;// default is set to enable the wmm. ++int rtw_uapsd_enable = 0; ++int rtw_uapsd_max_sp = NO_LIMIT; ++int rtw_uapsd_acbk_en = 0; ++int rtw_uapsd_acbe_en = 0; ++int rtw_uapsd_acvi_en = 0; ++int rtw_uapsd_acvo_en = 0; ++ ++#ifdef CONFIG_80211N_HT ++int rtw_ht_enable = 1; ++int rtw_cbw40_enable = 1; ++int rtw_ampdu_enable = 1;//for enable tx_ampdu ++int rtw_rx_stbc = 1;// 0: disable, bit(0):enable 2.4g, bit(1):enable 5g, default is set to enable 2.4GHZ for IOT issue with bufflao's AP at 5GHZ ++int rtw_ampdu_amsdu = 0;// 0: disabled, 1:enabled, 2:auto ++#endif ++ ++int rtw_lowrate_two_xmit = 1;//Use 2 path Tx to transmit MCS0~7 and legacy mode ++ ++//int rf_config = RF_1T2R; // 1T2R ++int rtw_rf_config = RF_819X_MAX_TYPE; //auto ++int rtw_low_power = 0; ++#ifdef CONFIG_WIFI_TEST ++int rtw_wifi_spec = 1;//for wifi test ++#else ++int rtw_wifi_spec = 0; ++#endif ++int rtw_channel_plan = RT_CHANNEL_DOMAIN_MAX; ++ ++#ifdef CONFIG_BT_COEXIST ++int rtw_bt_iso = 2;// 0:Low, 1:High, 2:From Efuse ++int rtw_bt_sco = 3;// 0:Idle, 1:None-SCO, 2:SCO, 3:From Counter, 4.Busy, 5.OtherBusy ++int rtw_bt_ampdu =1 ;// 0:Disable BT control A-MPDU, 1:Enable BT control A-MPDU. ++#endif ++int rtw_AcceptAddbaReq = _TRUE;// 0:Reject AP's Add BA req, 1:Accept AP's Add BA req. ++ ++int rtw_antdiv_cfg = 2; // 0:OFF , 1:ON, 2:decide by Efuse config ++ ++#ifdef CONFIG_USB_AUTOSUSPEND ++int rtw_enusbss = 1;//0:disable,1:enable ++#else ++int rtw_enusbss = 0;//0:disable,1:enable ++#endif ++ ++int rtw_hwpdn_mode=2;//0:disable,1:enable,2: by EFUSE config ++ ++#ifdef CONFIG_HW_PWRP_DETECTION ++int rtw_hwpwrp_detect = 1; ++#else ++int rtw_hwpwrp_detect = 0; //HW power ping detect 0:disable , 1:enable ++#endif ++ ++#ifdef CONFIG_USB_HCI ++int rtw_hw_wps_pbc = 1; ++#else ++int rtw_hw_wps_pbc = 0; ++#endif ++ ++#ifdef CONFIG_TX_MCAST2UNI ++int rtw_mc2u_disable = 0; ++#endif // CONFIG_TX_MCAST2UNI ++ ++char* ifname = "wlan%d"; ++ ++char* rtw_initmac = 0; // temp mac address if users want to use instead of the mac address in Efuse ++ ++module_param(ifname, charp, 0644); ++module_param(rtw_initmac, charp, 0644); ++module_param(rtw_channel_plan, int, 0644); ++module_param(rtw_chip_version, int, 0644); ++module_param(rtw_rfintfs, int, 0644); ++module_param(rtw_lbkmode, int, 0644); ++module_param(rtw_network_mode, int, 0644); ++module_param(rtw_channel, int, 0644); ++module_param(rtw_mp_mode, int, 0644); ++module_param(rtw_wmm_enable, int, 0644); ++module_param(rtw_vrtl_carrier_sense, int, 0644); ++module_param(rtw_vcs_type, int, 0644); ++module_param(rtw_busy_thresh, int, 0644); ++#ifdef CONFIG_80211N_HT ++module_param(rtw_ht_enable, int, 0644); ++module_param(rtw_cbw40_enable, int, 0644); ++module_param(rtw_ampdu_enable, int, 0644); ++module_param(rtw_rx_stbc, int, 0644); ++module_param(rtw_ampdu_amsdu, int, 0644); ++#endif ++ ++module_param(rtw_lowrate_two_xmit, int, 0644); ++ ++module_param(rtw_rf_config, int, 0644); ++module_param(rtw_power_mgnt, int, 0644); ++module_param(rtw_low_power, int, 0644); ++module_param(rtw_wifi_spec, int, 0644); ++ ++module_param(rtw_antdiv_cfg, int, 0644); ++ ++ ++module_param(rtw_enusbss, int, 0644); ++module_param(rtw_hwpdn_mode, int, 0644); ++module_param(rtw_hwpwrp_detect, int, 0644); ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++char *rtw_adaptor_info_caching_file_path= "/data/misc/wifi/rtw_cache"; ++module_param(rtw_adaptor_info_caching_file_path, charp, 0644); ++MODULE_PARM_DESC(rtw_adaptor_info_caching_file_path, "The path of adapter info cache file"); ++#endif //CONFIG_ADAPTOR_INFO_CACHING_FILE ++ ++#ifdef CONFIG_LAYER2_ROAMING ++uint rtw_max_roaming_times=2; ++module_param(rtw_max_roaming_times, uint, 0644); ++MODULE_PARM_DESC(rtw_max_roaming_times,"The max roaming times to try"); ++#endif //CONFIG_LAYER2_ROAMING ++ ++#ifdef CONFIG_IOL ++bool rtw_force_iol=_FALSE; ++module_param(rtw_force_iol, bool, 0644); ++MODULE_PARM_DESC(rtw_force_iol,"Force to enable IOL"); ++#endif //CONFIG_IOL ++ ++#ifdef SUPPORT_64_STA ++uint rtw_bcmc_rate=8; ++module_param(rtw_bcmc_rate, uint, 0644); ++MODULE_PARM_DESC(rtw_bcmc_rate,"The bc/mc data rate"); ++#endif // SUPPORT_64_STA ++ ++uint rtw_intel_class_mode=0; ++module_param(rtw_intel_class_mode, uint, 0644); ++MODULE_PARM_DESC(rtw_intel_class_mode,"The intel class mode [0: off, 1: on]"); ++ ++#ifdef CONFIG_FILE_FWIMG ++char *rtw_fw_file_path= ""; ++module_param(rtw_fw_file_path, charp, 0644); ++MODULE_PARM_DESC(rtw_fw_file_path, "The path of fw image"); ++#endif //CONFIG_FILE_FWIMG ++ ++#ifdef CONFIG_TX_MCAST2UNI ++module_param(rtw_mc2u_disable, int, 0644); ++#endif // CONFIG_TX_MCAST2UNI ++ ++static uint loadparam( _adapter *padapter, _nic_hdl pnetdev); ++int netdev_open (struct net_device *pnetdev); ++static int netdev_close (struct net_device *pnetdev); ++ ++//#ifdef RTK_DMP_PLATFORM ++#ifdef CONFIG_PROC_DEBUG ++#define RTL8192C_PROC_NAME "rtl819xC" ++#define RTL8192D_PROC_NAME "rtl819xD" ++static char rtw_proc_name[IFNAMSIZ]; ++static struct proc_dir_entry *rtw_proc = NULL; ++static int rtw_proc_cnt = 0; ++ ++void rtw_proc_init_one(struct net_device *dev) ++{ ++ struct proc_dir_entry *dir_dev = NULL; ++ struct proc_dir_entry *entry=NULL; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ ++ if(rtw_proc == NULL) ++ { ++ if(padapter->chip_type == RTL8188C_8192C) ++ { ++ _rtw_memcpy(rtw_proc_name, RTL8192C_PROC_NAME, sizeof(RTL8192C_PROC_NAME)); ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++ _rtw_memcpy(rtw_proc_name, RTL8192D_PROC_NAME, sizeof(RTL8192D_PROC_NAME)); ++ } ++ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, proc_net); ++#else ++ rtw_proc=create_proc_entry(rtw_proc_name, S_IFDIR, init_net.proc_net); ++#endif ++ if (rtw_proc == NULL) { ++ DBG_8192C(KERN_ERR "Unable to create rtw_proc directory\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ver_info", S_IFREG | S_IRUGO, rtw_proc, proc_get_drv_version, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ } ++ ++ ++ ++ if(padapter->dir_dev == NULL) ++ { ++ padapter->dir_dev = create_proc_entry(dev->name, ++ S_IFDIR | S_IRUGO | S_IXUGO, ++ rtw_proc); ++ ++ dir_dev = padapter->dir_dev; ++ ++ if(dir_dev==NULL) ++ { ++ if(rtw_proc_cnt == 0) ++ { ++ if(rtw_proc){ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ remove_proc_entry(rtw_proc_name, proc_net); ++#else ++ remove_proc_entry(rtw_proc_name, init_net.proc_net); ++#endif ++ rtw_proc = NULL; ++ } ++ } ++ ++ DBG_8192C("Unable to create dir_dev directory\n"); ++ return; ++ } ++ } ++ else ++ { ++ return; ++ } ++ ++ rtw_proc_cnt++; ++ ++ entry = create_proc_read_entry("write_reg", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_write_reg, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_write_reg; ++ ++ entry = create_proc_read_entry("read_reg", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_read_reg, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_read_reg; ++ ++ ++ entry = create_proc_read_entry("fwstate", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_fwstate, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("sec_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_sec_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("mlmext_state", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_mlmext_state, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ ++ entry = create_proc_read_entry("qos_option", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_qos_option, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ht_option", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ht_option, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("rf_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rf_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("ap_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ap_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("adapter_state", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_adapter_state, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++ entry = create_proc_read_entry("trx_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_trx_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ ++#ifdef CONFIG_AP_MODE ++ ++ entry = create_proc_read_entry("all_sta_info", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_all_sta_info, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ entry = create_proc_read_entry("_malloc_cnt", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_malloc_cnt, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ entry = create_proc_read_entry("best_channel", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_best_channel, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++#endif ++ ++ entry = create_proc_read_entry("rx_signal", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rx_signal, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_rx_signal; ++ ++ entry = create_proc_read_entry("ampdu_enable", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_ampdu_enable, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_ampdu_enable; ++ ++ entry = create_proc_read_entry("rssi_disp", S_IFREG | S_IRUGO, ++ dir_dev, proc_get_rssi_disp, dev); ++ if (!entry) { ++ DBG_871X("Unable to create_proc_read_entry!\n"); ++ return; ++ } ++ entry->write_proc = proc_set_rssi_disp; ++ ++} ++ ++void rtw_proc_remove_one(struct net_device *dev) ++{ ++ struct proc_dir_entry *dir_dev = NULL; ++ _adapter *padapter = rtw_netdev_priv(dev); ++ ++ ++ dir_dev = padapter->dir_dev; ++ padapter->dir_dev = NULL; ++ ++ if (dir_dev) { ++ ++ remove_proc_entry("write_reg", dir_dev); ++ remove_proc_entry("read_reg", dir_dev); ++ remove_proc_entry("fwstate", dir_dev); ++ remove_proc_entry("sec_info", dir_dev); ++ remove_proc_entry("mlmext_state", dir_dev); ++ remove_proc_entry("qos_option", dir_dev); ++ remove_proc_entry("ht_option", dir_dev); ++ remove_proc_entry("rf_info", dir_dev); ++ remove_proc_entry("ap_info", dir_dev); ++ remove_proc_entry("adapter_state", dir_dev); ++ remove_proc_entry("trx_info", dir_dev); ++ ++#ifdef CONFIG_AP_MODE ++ remove_proc_entry("all_sta_info", dir_dev); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++ remove_proc_entry("_malloc_cnt", dir_dev); ++#endif ++ ++#ifdef CONFIG_FIND_BEST_CHANNEL ++ remove_proc_entry("best_channel", dir_dev); ++#endif ++ remove_proc_entry("rx_signal", dir_dev); ++ ++ remove_proc_entry("rssi_disp", dir_dev); ++ ++ remove_proc_entry(dev->name, rtw_proc); ++ dir_dev = NULL; ++ ++ } ++ else ++ { ++ return; ++ } ++ ++ rtw_proc_cnt--; ++ ++ if(rtw_proc_cnt == 0) ++ { ++ if(rtw_proc){ ++ remove_proc_entry("ver_info", rtw_proc); ++ ++#if(LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ remove_proc_entry(rtw_proc_name, proc_net); ++#else ++ remove_proc_entry(rtw_proc_name, init_net.proc_net); ++#endif ++ rtw_proc = NULL; ++ } ++ } ++} ++#endif ++ ++uint loadparam( _adapter *padapter, _nic_hdl pnetdev) ++{ ++ ++ uint status = _SUCCESS; ++ struct registry_priv *registry_par = &padapter->registrypriv; ++ ++_func_enter_; ++ ++ registry_par->chip_version = (u8)rtw_chip_version; ++ registry_par->rfintfs = (u8)rtw_rfintfs; ++ registry_par->lbkmode = (u8)rtw_lbkmode; ++ //registry_par->hci = (u8)hci; ++ registry_par->network_mode = (u8)rtw_network_mode; ++ ++ _rtw_memcpy(registry_par->ssid.Ssid, "ANY", 3); ++ registry_par->ssid.SsidLength = 3; ++ ++ registry_par->channel = (u8)rtw_channel; ++ registry_par->wireless_mode = (u8)rtw_wireless_mode; ++ registry_par->vrtl_carrier_sense = (u8)rtw_vrtl_carrier_sense ; ++ registry_par->vcs_type = (u8)rtw_vcs_type; ++ registry_par->rts_thresh=(u16)rtw_rts_thresh; ++ registry_par->frag_thresh=(u16)rtw_frag_thresh; ++ registry_par->preamble = (u8)rtw_preamble; ++ registry_par->scan_mode = (u8)rtw_scan_mode; ++ registry_par->adhoc_tx_pwr = (u8)rtw_adhoc_tx_pwr; ++ registry_par->soft_ap= (u8)rtw_soft_ap; ++ //registry_par->smart_ps = (u8)rtw_smart_ps; ++ registry_par->power_mgnt = (u8)rtw_power_mgnt; ++ registry_par->ips_mode = (u8)rtw_ips_mode; ++ registry_par->radio_enable = (u8)rtw_radio_enable; ++ registry_par->long_retry_lmt = (u8)rtw_long_retry_lmt; ++ registry_par->short_retry_lmt = (u8)rtw_short_retry_lmt; ++ registry_par->busy_thresh = (u16)rtw_busy_thresh; ++ //registry_par->qos_enable = (u8)rtw_qos_enable; ++ registry_par->ack_policy = (u8)rtw_ack_policy; ++ registry_par->mp_mode = (u8)rtw_mp_mode; ++ registry_par->software_encrypt = (u8)rtw_software_encrypt; ++ registry_par->software_decrypt = (u8)rtw_software_decrypt; ++ ++ registry_par->acm_method = (u8)rtw_acm_method; ++ ++ //UAPSD ++ registry_par->wmm_enable = (u8)rtw_wmm_enable; ++ registry_par->uapsd_enable = (u8)rtw_uapsd_enable; ++ registry_par->uapsd_max_sp = (u8)rtw_uapsd_max_sp; ++ registry_par->uapsd_acbk_en = (u8)rtw_uapsd_acbk_en; ++ registry_par->uapsd_acbe_en = (u8)rtw_uapsd_acbe_en; ++ registry_par->uapsd_acvi_en = (u8)rtw_uapsd_acvi_en; ++ registry_par->uapsd_acvo_en = (u8)rtw_uapsd_acvo_en; ++ ++#ifdef CONFIG_80211N_HT ++ registry_par->ht_enable = (u8)rtw_ht_enable; ++ registry_par->cbw40_enable = (u8)rtw_cbw40_enable; ++ registry_par->ampdu_enable = (u8)rtw_ampdu_enable; ++ registry_par->rx_stbc = (u8)rtw_rx_stbc; ++ registry_par->ampdu_amsdu = (u8)rtw_ampdu_amsdu; ++#endif ++ ++ registry_par->lowrate_two_xmit = (u8)rtw_lowrate_two_xmit; ++ registry_par->rf_config = (u8)rtw_rf_config; ++ registry_par->low_power = (u8)rtw_low_power; ++ ++ ++ registry_par->wifi_spec = (u8)rtw_wifi_spec; ++ ++ registry_par->channel_plan = (u8)rtw_channel_plan; ++ ++#ifdef CONFIG_BT_COEXIST ++ registry_par->bt_iso = (u8)rtw_bt_iso; ++ registry_par->bt_sco = (u8)rtw_bt_sco; ++ registry_par->bt_ampdu = (u8)rtw_bt_ampdu; ++#endif ++ registry_par->bAcceptAddbaReq = (u8)rtw_AcceptAddbaReq; ++ ++ registry_par->antdiv_cfg = (u8)rtw_antdiv_cfg; ++ ++#ifdef CONFIG_AUTOSUSPEND ++ registry_par->usbss_enable = (u8)rtw_enusbss;//0:disable,1:enable ++#endif ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++ registry_par->hwpdn_mode = (u8)rtw_hwpdn_mode;//0:disable,1:enable,2:by EFUSE config ++ registry_par->hwpwrp_detect = (u8)rtw_hwpwrp_detect;//0:disable,1:enable ++#endif ++ ++ registry_par->hw_wps_pbc = (u8)rtw_hw_wps_pbc; ++ ++#ifdef CONFIG_ADAPTOR_INFO_CACHING_FILE ++ snprintf(registry_par->adaptor_info_caching_file_path, PATH_LENGTH_MAX, "%s",rtw_adaptor_info_caching_file_path); ++ registry_par->adaptor_info_caching_file_path[PATH_LENGTH_MAX-1]=0; ++#endif ++ ++#ifdef CONFIG_LAYER2_ROAMING ++ registry_par->max_roaming_times = (u8)rtw_max_roaming_times; ++#endif ++ ++#ifdef CONFIG_IOL ++ registry_par->force_iol = rtw_force_iol; ++#endif ++ ++#ifdef SUPPORT_64_STA ++ registry_par->bcmc_rate= (u8)rtw_bcmc_rate; ++#endif ++ registry_par->intel_class_mode= (u8)rtw_intel_class_mode; ++_func_exit_; ++ ++ return status; ++ ++} ++ ++static int rtw_net_set_mac_address(struct net_device *pnetdev, void *p) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct sockaddr *addr = p; ++ ++ if(padapter->bup == _FALSE) ++ { ++ //DBG_8192C("r8711_net_set_mac_address(), MAC=%x:%x:%x:%x:%x:%x\n", addr->sa_data[0], addr->sa_data[1], addr->sa_data[2], addr->sa_data[3], ++ //addr->sa_data[4], addr->sa_data[5]); ++ _rtw_memcpy(padapter->eeprompriv.mac_addr, addr->sa_data, ETH_ALEN); ++ //_rtw_memcpy(pnetdev->dev_addr, addr->sa_data, ETH_ALEN); ++ //padapter->bset_hwaddr = _TRUE; ++ } ++ ++ return 0; ++} ++ ++static struct net_device_stats *rtw_net_get_stats(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ struct recv_priv *precvpriv = &(padapter->recvpriv); ++ ++ padapter->stats.tx_packets = pxmitpriv->tx_pkts;//pxmitpriv->tx_pkts++; ++ padapter->stats.rx_packets = precvpriv->rx_pkts;//precvpriv->rx_pkts++; ++ padapter->stats.tx_dropped = pxmitpriv->tx_drop; ++ padapter->stats.rx_dropped = precvpriv->rx_drop; ++ padapter->stats.tx_bytes = pxmitpriv->tx_bytes; ++ padapter->stats.rx_bytes = precvpriv->rx_bytes; ++ ++ return &padapter->stats; ++} ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++static const struct net_device_ops rtw_netdev_ops = { ++ .ndo_open = netdev_open, ++ .ndo_stop = netdev_close, ++ .ndo_start_xmit = rtw_xmit_entry, ++ .ndo_set_mac_address = rtw_net_set_mac_address, ++ .ndo_get_stats = rtw_net_get_stats, ++ .ndo_do_ioctl = rtw_ioctl, ++}; ++#endif ++ ++int rtw_init_netdev_name(struct net_device *pnetdev, const char *ifname) ++{ ++ _adapter *padapter = rtw_netdev_priv(pnetdev); ++ ++#ifdef CONFIG_EASY_REPLACEMENT ++ struct net_device *TargetNetdev = NULL; ++ _adapter *TargetAdapter = NULL; ++ struct net *devnet = NULL; ++ ++ if(padapter->bDongle == 1) ++ { ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ TargetNetdev = dev_get_by_name("wlan0"); ++#else ++ #if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = pnetdev->nd_net; ++ #else ++ devnet = dev_net(pnetdev); ++ #endif ++ TargetNetdev = dev_get_by_name(devnet, "wlan0"); ++#endif ++ if(TargetNetdev) { ++ DBG_8192C("Force onboard module driver disappear !!!\n"); ++ TargetAdapter = rtw_netdev_priv(TargetNetdev); ++ TargetAdapter->DriverState = DRIVER_DISAPPEAR; ++ ++ padapter->pid[0] = TargetAdapter->pid[0]; ++ padapter->pid[1] = TargetAdapter->pid[1]; ++ padapter->pid[2] = TargetAdapter->pid[2]; ++ ++ dev_put(TargetNetdev); ++ unregister_netdev(TargetNetdev); ++#ifdef CONFIG_PROC_DEBUG ++ if(TargetAdapter->chip_type == padapter->chip_type) ++ rtw_proc_remove_one(TargetNetdev); ++#endif ++ padapter->DriverState = DRIVER_REPLACE_DONGLE; ++ } ++ } ++#endif ++ ++ if(dev_alloc_name(pnetdev, ifname) < 0) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("dev_alloc_name, fail! \n")); ++ } ++ ++ netif_carrier_off(pnetdev); ++ //netif_stop_queue(pnetdev); ++ ++ return 0; ++} ++ ++struct net_device *rtw_init_netdev(_adapter *old_padapter) ++{ ++ _adapter *padapter; ++ struct net_device *pnetdev; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+init_net_dev\n")); ++ ++ if(old_padapter != NULL) ++ pnetdev = rtw_alloc_etherdev_with_old_priv(sizeof(_adapter), (void *)old_padapter); ++ else ++ pnetdev = rtw_alloc_etherdev(sizeof(_adapter)); ++ ++ if (!pnetdev) ++ return NULL; ++ ++ padapter = rtw_netdev_priv(pnetdev); ++ padapter->pnetdev = pnetdev; ++ ++#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) ++ SET_MODULE_OWNER(pnetdev); ++#endif ++ ++ //pnetdev->init = NULL; ++ ++#if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,29)) ++ DBG_8192C("register rtw_netdev_ops to netdev_ops\n"); ++ pnetdev->netdev_ops = &rtw_netdev_ops; ++#else ++ pnetdev->open = netdev_open; ++ pnetdev->stop = netdev_close; ++ pnetdev->hard_start_xmit = rtw_xmit_entry; ++ pnetdev->set_mac_address = rtw_net_set_mac_address; ++ pnetdev->get_stats = rtw_net_get_stats; ++ pnetdev->do_ioctl = rtw_ioctl; ++#endif ++ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ pnetdev->features |= NETIF_F_IP_CSUM; ++#endif ++ //pnetdev->tx_timeout = NULL; ++ pnetdev->watchdog_timeo = HZ*3; /* 3 second timeout */ ++ ++ pnetdev->wireless_handlers = (struct iw_handler_def *)&rtw_handlers_def; ++ ++#ifdef WIRELESS_SPY ++ //priv->wireless_data.spy_data = &priv->spy_data; ++ //pnetdev->wireless_data = &priv->wireless_data; ++#endif ++ ++ //step 2. ++ loadparam(padapter, pnetdev); ++ ++ return pnetdev; ++ ++} ++ ++u32 rtw_start_drv_threads(_adapter *padapter) ++{ ++ ++ u32 _status = _SUCCESS; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_start_drv_threads\n")); ++ ++#ifdef CONFIG_SDIO_HCI ++ if(!start_kthread(&padapter->xmitThread, rtw_xmit_thread, padapter, "8192cu-xmit")) ++ _status = _FAIL; ++#endif ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ if(!start_kthread(&padapter->recvThread, recv_thread, padapter, "8192cu-recv")) ++ _status = _FAIL; ++#endif ++ ++ if(!start_kthread(&padapter->cmdThread, rtw_cmd_thread, padapter, "8192cu-cmd")) ++ _status = _FAIL; ++ else ++ _rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); //wait for cmd_thread to run ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ if(!start_kthread(&padapter->evtThread, event_thread, padapter, "8192cu-evt")) ++ _status = _FAIL; ++#endif ++ ++ return _status; ++ ++} ++ ++void rtw_stop_drv_threads (_adapter *padapter) ++{ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_stop_drv_threads\n")); ++ ++ //Below is to termindate rtw_cmd_thread & event_thread... ++ _rtw_up_sema(&padapter->cmdpriv.cmd_queue_sema); ++ //_rtw_up_sema(&padapter->cmdpriv.cmd_done_sema); ++ if(padapter->cmdThread){ ++ _rtw_down_sema(&padapter->cmdpriv.terminate_cmdthread_sema); ++ } ++ ++#ifdef CONFIG_EVENT_THREAD_MODE ++ _rtw_up_sema(&padapter->evtpriv.evt_notify); ++ if(padapter->evtThread){ ++ _rtw_down_sema(&padapter->evtpriv.terminate_evtthread_sema); ++ } ++#endif ++ ++#ifdef CONFIG_XMIT_THREAD_MODE ++ // Below is to termindate tx_thread... ++ _rtw_up_sema(&padapter->xmitpriv.xmit_sema); ++ _rtw_down_sema(&padapter->xmitpriv.terminate_xmitthread_sema); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt: rtw_xmit_thread can be terminated ! \n")); ++#endif ++ ++#ifdef CONFIG_RECV_THREAD_MODE ++ // Below is to termindate rx_thread... ++ _rtw_up_sema(&padapter->recvpriv.recv_sema); ++ _rtw_down_sema(&padapter->recvpriv.terminate_recvthread_sema); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("\n drv_halt:recv_thread can be terminated! \n")); ++#endif ++ ++ ++} ++ ++u8 rtw_init_default_value(_adapter *padapter) ++{ ++ u8 ret = _SUCCESS; ++ struct registry_priv* pregistrypriv = &padapter->registrypriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ ++ //xmit_priv ++ pxmitpriv->vcs_setting = pregistrypriv->vrtl_carrier_sense; ++ pxmitpriv->vcs = pregistrypriv->vcs_type; ++ pxmitpriv->vcs_type = pregistrypriv->vcs_type; ++ //pxmitpriv->rts_thresh = pregistrypriv->rts_thresh; ++ pxmitpriv->frag_len = pregistrypriv->frag_thresh; ++ ++ ++ ++ //recv_priv ++ ++ ++ //mlme_priv ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ pmlmepriv->scan_mode = SCAN_ACTIVE; ++ ++ //qos_priv ++ //pmlmepriv->qospriv.qos_option = pregistrypriv->wmm_enable; ++ ++ //ht_priv ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->htpriv.ampdu_enable = _FALSE;//set to disabled ++#endif ++ ++ //security_priv ++ //rtw_get_encrypt_decrypt_from_registrypriv(padapter); ++ psecuritypriv->binstallGrpkey = _FAIL; ++ psecuritypriv->sw_encrypt=pregistrypriv->software_encrypt; ++ psecuritypriv->sw_decrypt=pregistrypriv->software_decrypt; ++ ++ psecuritypriv->dot11AuthAlgrthm = dot11AuthAlgrthm_Open; //open system ++ psecuritypriv->dot11PrivacyAlgrthm = _NO_PRIVACY_; ++ ++ psecuritypriv->dot11PrivacyKeyIndex = 0; ++ ++ psecuritypriv->dot118021XGrpPrivacy = _NO_PRIVACY_; ++ psecuritypriv->dot118021XGrpKeyid = 1; ++ ++ psecuritypriv->ndisauthtype = Ndis802_11AuthModeOpen; ++ psecuritypriv->ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ ++ //pwrctrl_priv ++ ++ ++ //registry_priv ++ rtw_init_registrypriv_dev_network(padapter); ++ rtw_update_registrypriv_dev_network(padapter); ++ ++ ++ //hal_priv ++ padapter->HalFunc.init_default_value(padapter); ++ ++ //misc. ++ padapter->bReadPortCancel = _FALSE; ++ padapter->bWritePortCancel = _FALSE; ++ padapter->bRxRSSIDisplay = 0; ++ ++ return ret; ++} ++ ++u8 rtw_reset_drv_sw(_adapter *padapter) ++{ ++ u8 ret8=_SUCCESS; ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ //hal_priv ++ padapter->HalFunc.init_default_value(padapter); ++ padapter->bReadPortCancel = _FALSE; ++ padapter->bWritePortCancel = _FALSE; ++ padapter->bRxRSSIDisplay = 0; ++ pmlmepriv->scan_interval = SCAN_INTERVAL;// 30*2 sec = 60sec ++ ++ pwrctrlpriv->bips_processing = _FALSE; ++ pwrctrlpriv->rf_pwrstate = rf_on; ++ pwrctrlpriv->bInSuspend = _FALSE; ++ ++ padapter->xmitpriv.tx_pkts = 0; ++ padapter->recvpriv.rx_pkts = 0; ++ ++ pmlmepriv->LinkDetectInfo.bBusyTraffic = _FALSE; ++ ++ _clr_fwstate_(pmlmepriv, _FW_UNDER_SURVEY |_FW_UNDER_LINKING); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ padapter->dvobjpriv.pusbdev->autosuspend_disabled = 1;//autosuspend disabled by the user ++ #endif ++#endif ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ if(padapter->HalFunc.sreset_reset_value) ++ padapter->HalFunc.sreset_reset_value(padapter); ++#endif ++ pwrctrlpriv->pwr_state_check_cnts = 0; ++ ++ //mlmeextpriv ++ padapter->mlmeextpriv.sitesurvey_res.state= SCAN_DISABLE; ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ rtw_set_signal_stat_timer(&padapter->recvpriv); ++#endif ++ ++ return ret8; ++} ++ ++ ++u8 rtw_init_drv_sw(_adapter *padapter) ++{ ++ ++ u8 ret8=_SUCCESS; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_init_drv_sw\n")); ++ ++ if ((rtw_init_cmd_priv(&padapter->cmdpriv)) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init cmd_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ padapter->cmdpriv.padapter=padapter; ++ ++ if ((rtw_init_evt_priv(&padapter->evtpriv)) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init evt_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ ++ if (rtw_init_mlme_priv(padapter) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef CONFIG_P2P ++ rtw_init_cfg80211_wifidirect_info(padapter); ++#endif //CONFIG_P2P ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ if(init_mlme_ext_priv(padapter) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't init mlme_ext_priv\n")); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++#ifdef CONFIG_TDLS ++ if(rtw_init_tdls_info(padapter) == _FAIL) ++ { ++ DBG_871X("Can't rtw_init_tdls_info\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++#endif //CONFIG_TDLS ++ ++ if(_rtw_init_xmit_priv(&padapter->xmitpriv, padapter) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_xmit_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ if(_rtw_init_recv_priv(&padapter->recvpriv, padapter) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_recv_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ // We don't need to memset padapter->XXX to zero, because adapter is allocated by rtw_zvmalloc(). ++ //_rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ ++ //_init_timer(&(padapter->securitypriv.tkip_timer), padapter->pnetdev, rtw_use_tkipkey_handler, padapter); ++ ++ if(_rtw_init_sta_priv(&padapter->stapriv) == _FAIL) ++ { ++ DBG_871X("Can't _rtw_init_sta_priv\n"); ++ ret8=_FAIL; ++ goto exit; ++ } ++ ++ padapter->stapriv.padapter = padapter; ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_init_pwrctrl_priv(padapter); ++ ++ //_rtw_memset((u8 *)&padapter->qospriv, 0, sizeof (struct qos_priv));//move to mlme_priv ++ ++#ifdef CONFIG_MP_INCLUDED ++ if (init_mp_priv(padapter) == _FAIL) { ++ ERR_8192C("%s: initialize MP private data Fail!\n", __func__); ++ } ++#endif ++ ++ ret8 = rtw_init_default_value(padapter); ++ ++ rtw_dm_init(padapter); ++ rtw_sw_led_init(padapter); ++ ++#ifdef DBG_CONFIG_ERROR_DETECT ++ rtw_sreset_init(padapter); ++#endif ++ ++ ++#ifdef CONFIG_BR_EXT ++ _rtw_spinlock_init(&padapter->br_ext_lock); ++#endif // CONFIG_BR_EXT ++ ++exit: ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_init_drv_sw\n")); ++ ++ _func_exit_; ++ ++ return ret8; ++ ++} ++ ++void rtw_cancel_all_timer(_adapter *padapter) ++{ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+rtw_cancel_all_timer\n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.assoc_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel association timer complete! \n")); ++ ++ //_cancel_timer_ex(&padapter->securitypriv.tkip_timer); ++ //RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel tkip_timer! \n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.scan_to_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel scan_to_timer! \n")); ++ ++ _cancel_timer_ex(&padapter->mlmepriv.dynamic_chk_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel dynamic_chk_timer! \n")); ++ ++ // cancel sw led timer ++ rtw_sw_led_deinit(padapter); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel DeInitSwLeds! \n")); ++ ++ _cancel_timer_ex(&padapter->pwrctrlpriv.pwr_state_check_timer); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++#ifdef CONFIG_P2P ++ _cancel_timer_ex(&padapter->cfg80211_wdinfo.remain_on_ch_timer); ++#endif //CONFIG_P2P ++#endif //CONFIG_IOCTL_CFG80211 ++ ++#ifdef CONFIG_SET_SCAN_DENY_TIMER ++ _cancel_timer_ex(&padapter->mlmepriv.set_scan_deny_timer); ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("rtw_cancel_all_timer:cancel set_scan_deny_timer! \n")); ++#endif ++ ++#ifdef CONFIG_NEW_SIGNAL_STAT_PROCESS ++ _cancel_timer_ex(&padapter->recvpriv.signal_stat_timer); ++#endif ++ ++ // cancel dm timer ++ padapter->HalFunc.dm_deinit(padapter); ++ ++} ++ ++u8 rtw_free_drv_sw(_adapter *padapter) ++{ ++ struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("==>rtw_free_drv_sw")); ++ ++ ++ //we can call rtw_p2p_enable here, but: ++ // 1. rtw_p2p_enable may have IO operation ++ // 2. rtw_p2p_enable is bundled with wext interface ++ #ifdef CONFIG_P2P ++ { ++ struct wifidirect_info *pwdinfo = &padapter->wdinfo; ++ if(!rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ { ++ _cancel_timer_ex( &pwdinfo->find_phase_timer ); ++ _cancel_timer_ex( &pwdinfo->restore_p2p_state_timer ); ++ _cancel_timer_ex( &pwdinfo->pre_tx_scan_timer); ++ rtw_p2p_set_state(pwdinfo, P2P_STATE_NONE); ++ } ++ } ++ #endif ++ ++ ++#ifdef CONFIG_BR_EXT ++ _rtw_spinlock_free(&padapter->br_ext_lock); ++#endif // CONFIG_BR_EXT ++ ++ ++ free_mlme_ext_priv(&padapter->mlmeextpriv); ++ ++#ifdef CONFIG_TDLS ++ //rtw_free_tdls_info(&padapter->tdlsinfo); ++#endif //CONFIG_TDLS ++ ++ rtw_free_cmd_priv(&padapter->cmdpriv); ++ ++ rtw_free_evt_priv(&padapter->evtpriv); ++ ++ rtw_free_mlme_priv(&padapter->mlmepriv); ++ ++ //free_io_queue(padapter); ++ ++ _rtw_free_xmit_priv(&padapter->xmitpriv); ++ ++ _rtw_free_sta_priv(&padapter->stapriv); //will free bcmc_stainfo here ++ ++ _rtw_free_recv_priv(&padapter->recvpriv); ++ ++ rtw_free_pwrctrl_priv(padapter); ++ ++ //rtw_mfree((void *)padapter, sizeof (padapter)); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ free_drvext(&padapter->drvextpriv); ++#endif ++ ++ padapter->HalFunc.free_hal_data(padapter); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("<==rtw_free_drv_sw\n")); ++ ++ //free the old_pnetdev ++ if(padapter->rereg_nd_name_priv.old_pnetdev) { ++ free_netdev(padapter->rereg_nd_name_priv.old_pnetdev); ++ padapter->rereg_nd_name_priv.old_pnetdev = NULL; ++ } ++ ++ if(pnetdev) ++ { ++ rtw_free_netdev(pnetdev); ++ } ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-rtw_free_drv_sw\n")); ++ ++ return _SUCCESS; ++ ++} ++ ++int _netdev_open(struct net_device *pnetdev) ++{ ++ uint status; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - dev_open\n")); ++ DBG_8192C("+871x_drv - drv_open, bup=%d\n", padapter->bup); ++ ++ if(pwrctrlpriv->ps_flag == _TRUE){ ++ padapter->net_closed = _FALSE; ++ goto netdev_open_normal_process; ++ } ++ ++ if(padapter->bup == _FALSE) ++ { ++ padapter->bDriverStopped = _FALSE; ++ padapter->bSurpriseRemoved = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ ++ status = rtw_hal_init(padapter); ++ if (status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("rtl871x_hal_init(): Can't init h/w!\n")); ++ goto netdev_open_error; ++ } ++ ++ DBG_8192C("MAC Address = "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ status=rtw_start_drv_threads(padapter); ++ if(status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto netdev_open_error; ++ } ++ ++ ++ if (init_hw_mlme_ext(padapter) == _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("can't init mlme_ext_priv\n")); ++ goto netdev_open_error; ++ } ++ ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ init_drvext(padapter); ++#endif ++ ++ if(padapter->intf_start) ++ { ++ padapter->intf_start(padapter); ++ } ++ ++#ifdef CONFIG_PROC_DEBUG ++#ifndef RTK_DMP_PLATFORM ++ rtw_proc_init_one(pnetdev); ++#endif ++#endif ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_init_wiphy(padapter); ++#endif ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ padapter->bup = _TRUE; ++ } ++ padapter->net_closed = _FALSE; ++ ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000); ++ ++ if(( pwrctrlpriv->power_mgnt != PS_MODE_ACTIVE ) ||(padapter->pwrctrlpriv.bHWPwrPindetect)) ++ { ++ padapter->pwrctrlpriv.bips_processing = _FALSE; ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ } ++ ++ //netif_carrier_on(pnetdev);//call this func when rtw_joinbss_event_callback return success ++ if(!netif_queue_stopped(pnetdev)) ++ netif_start_queue(pnetdev); ++ else ++ netif_wake_queue(pnetdev); ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++ //if(check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ++ { ++ //struct net_bridge *br = pnetdev->br_port->br;//->dev->dev_addr; ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if (pnetdev->br_port) ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ if (rcu_dereference(padapter->pnetdev->rx_handler_data)) ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ { ++ struct net_device *br_netdev; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ br_netdev = dev_get_by_name(CONFIG_BR_EXT_BRNAME); ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ struct net *devnet = NULL; ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = pnetdev->nd_net; ++#else // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ devnet = dev_net(pnetdev); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26)) ++ ++ br_netdev = dev_get_by_name(devnet, CONFIG_BR_EXT_BRNAME); ++#endif // (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24)) ++ ++ if (br_netdev) { ++ memcpy(padapter->br_mac, br_netdev->dev_addr, ETH_ALEN); ++ dev_put(br_netdev); ++ } else ++ printk("%s()-%d: dev_get_by_name(%s) failed!", __FUNCTION__, __LINE__, CONFIG_BR_EXT_BRNAME); ++ } ++ ++ padapter->ethBrExtInfo.addPPPoETag = 1; ++ } ++ ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 35)) ++ ++#endif // CONFIG_BR_EXT ++ ++netdev_open_normal_process: ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - dev_open\n")); ++ DBG_8192C("-871x_drv - drv_open, bup=%d\n", padapter->bup); ++ ++ return 0; ++ ++netdev_open_error: ++ ++ padapter->bup = _FALSE; ++ ++ netif_carrier_off(pnetdev); ++ netif_stop_queue(pnetdev); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("-871x_drv - dev_open, fail!\n")); ++ DBG_8192C("-871x_drv - drv_open fail, bup=%d\n", padapter->bup); ++ ++ return (-1); ++ ++} ++ ++int netdev_open(struct net_device *pnetdev) ++{ ++ int ret; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ ++ _enter_pwrlock(&pwrctrlpriv->lock); ++ ret = _netdev_open(pnetdev); ++ _exit_pwrlock(&pwrctrlpriv->lock); ++ ++ return ret; ++} ++ ++#ifdef CONFIG_IPS ++int ips_netdrv_open(_adapter *padapter) ++{ ++ int status = _SUCCESS; ++ padapter->net_closed = _FALSE; ++ DBG_8192C("===> %s.........\n",__FUNCTION__); ++ ++ ++ padapter->bDriverStopped = _FALSE; ++ padapter->bSurpriseRemoved = _FALSE; ++ padapter->bCardDisableWOHSM = _FALSE; ++ padapter->bup = _TRUE; ++ ++ status = rtw_hal_init(padapter); ++ if (status ==_FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("ips_netdrv_open(): Can't init h/w!\n")); ++ goto netdev_open_error; ++ } ++ ++ if(padapter->intf_start) ++ { ++ padapter->intf_start(padapter); ++ } ++ ++ rtw_set_pwr_state_check_timer(&padapter->pwrctrlpriv); ++ _set_timer(&padapter->mlmepriv.dynamic_chk_timer,5000); ++ ++ return _SUCCESS; ++ ++netdev_open_error: ++ padapter->bup = _FALSE; ++ DBG_8192C("-ips_netdrv_open - drv_open failure, bup=%d\n", padapter->bup); ++ ++ return _FAIL; ++} ++ ++ ++int rtw_ips_pwr_up(_adapter *padapter) ++{ ++ int result; ++ u32 start_time = rtw_get_current_time(); ++ DBG_8192C("===> rtw_ips_pwr_up..............\n"); ++ rtw_reset_drv_sw(padapter); ++ result = ips_netdrv_open(padapter); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ DBG_8192C("<=== rtw_ips_pwr_up.............. in %dms\n", rtw_get_passing_time_ms(start_time)); ++ return result; ++ ++} ++ ++void rtw_ips_pwr_down(_adapter *padapter) ++{ ++ u32 start_time = rtw_get_current_time(); ++ DBG_8192C("===> rtw_ips_pwr_down...................\n"); ++ ++ padapter->bCardDisableWOHSM = _TRUE; ++ padapter->net_closed = _TRUE; ++ ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ ++ rtw_ips_dev_unload(padapter); ++ padapter->bCardDisableWOHSM = _FALSE; ++ DBG_8192C("<=== rtw_ips_pwr_down..................... in %dms\n", rtw_get_passing_time_ms(start_time)); ++} ++#endif ++void rtw_ips_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ struct xmit_priv *pxmitpriv = &(padapter->xmitpriv); ++ DBG_8192C("====> %s...\n",__FUNCTION__); ++ ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_FIFO_CLEARN_UP, 0); ++ ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ rtw_hal_deinit(padapter); ++ } ++ ++} ++ ++int pm_netdev_open(struct net_device *pnetdev,u8 bnormal) ++{ ++ int status; ++ if(bnormal) ++ status = _netdev_open(pnetdev); ++#ifdef CONFIG_IPS ++ else ++ status = (_SUCCESS == ips_netdrv_open((_adapter *)rtw_netdev_priv(pnetdev)))?(0):(-1); ++#endif ++ ++ return status; ++} ++//extern int rfpwrstate_check(_adapter *padapter); ++static int netdev_close(struct net_device *pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("+871x_drv - drv_close\n")); ++ ++ if(padapter->pwrctrlpriv.bInternalAutoSuspend == _TRUE) ++ { ++ //rfpwrstate_check(padapter); ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_off) ++ padapter->pwrctrlpriv.ps_flag = _TRUE; ++ } ++ padapter->net_closed = _TRUE; ++ ++/* if(!padapter->hw_init_completed) ++ { ++ DBG_8192C("(1)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++ ++ padapter->bDriverStopped = _TRUE; ++ ++ rtw_dev_unload(padapter); ++ } ++ else*/ ++ if(padapter->pwrctrlpriv.rf_pwrstate == rf_on){ ++ DBG_8192C("(2)871x_drv - drv_close, bup=%d, hw_init_completed=%d\n", padapter->bup, padapter->hw_init_completed); ++ ++ //s1. ++ if(pnetdev) ++ { ++ if (!netif_queue_stopped(pnetdev)) ++ netif_stop_queue(pnetdev); ++ } ++ ++#ifndef CONFIG_ANDROID ++ //s2. ++ //s2-1. issue rtw_disassoc_cmd to fw ++ rtw_disassoc_cmd(padapter); ++ //s2-2. indicate disconnect to os ++ rtw_indicate_disconnect(padapter); ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++ //s2-4. ++ rtw_free_network_queue(padapter,_TRUE); ++#endif ++ // Close LED ++ rtw_led_control(padapter, LED_CTL_POWER_OFF); ++ } ++ ++#ifdef CONFIG_BR_EXT ++ //if (OPMODE & (WIFI_STATION_STATE | WIFI_ADHOC_STATE)) ++ { ++ //void nat25_db_cleanup(_adapter *priv); ++ nat25_db_cleanup(padapter); ++ } ++#endif // CONFIG_BR_EXT ++ ++#ifdef CONFIG_P2P ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if(wdev_to_priv(padapter->rtw_wdev)->p2p_enabled == _TRUE) ++ wdev_to_priv(padapter->rtw_wdev)->p2p_enabled = _FALSE; ++ #endif ++ rtw_p2p_enable(padapter, P2P_ROLE_DISABLE); ++#endif //CONFIG_P2P ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_cfg80211_indicate_scan_done(wdev_to_priv(padapter->rtw_wdev), _TRUE); ++ padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; //set this at the end ++#endif ++ ++ RT_TRACE(_module_os_intfs_c_,_drv_info_,("-871x_drv - drv_close\n")); ++ DBG_8192C("-871x_drv - drv_close, bup=%d\n", padapter->bup); ++ ++ return 0; ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/pci_intf.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/pci_intf.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1889 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _HCI_INTF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifndef CONFIG_PCI_HCI ++ ++#error "CONFIG_PCI_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifdef CONFIG_80211N_HT ++extern int rtw_ht_enable; ++extern int rtw_cbw40_enable; ++extern int rtw_ampdu_enable;//for enable tx_ampdu ++#endif ++ ++#ifdef CONFIG_PM ++extern int pm_netdev_open(struct net_device *pnetdev); ++static int rtw_suspend(struct pci_dev *pdev, pm_message_t state); ++static int rtw_resume(struct pci_dev *pdev); ++#endif ++ ++ ++static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *pdid); ++static void rtw_dev_remove(struct pci_dev *pdev); ++ ++static struct specific_device_id specific_device_id_tbl[] = { ++ {.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {} ++}; ++ ++struct pci_device_id rtw_pci_id_tbl[] = { ++#ifdef CONFIG_RTL8192C ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8191)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8178)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8177)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8176)}, ++#endif ++#ifdef CONFIG_RTL8192D ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x8193)}, ++ {PCI_DEVICE(PCI_VENDER_ID_REALTEK, 0x002B)}, ++#endif ++ {}, ++}; ++ ++typedef struct _driver_priv{ ++ ++ struct pci_driver rtw_pci_drv; ++ int drv_registered; ++ ++}drv_priv, *pdrv_priv; ++ ++ ++static drv_priv drvpriv = { ++ .rtw_pci_drv.name = (char*)DRV_NAME, ++ .rtw_pci_drv.probe = rtw_drv_init, ++ .rtw_pci_drv.remove = rtw_dev_remove, ++ .rtw_pci_drv.id_table = rtw_pci_id_tbl, ++#ifdef CONFIG_PM ++ .rtw_pci_drv.suspend = rtw_suspend, ++ .rtw_pci_drv.resume = rtw_resume, ++#else ++ .rtw_pci_drv.suspend = NULL, ++ .rtw_pci_drv.resume = NULL, ++#endif ++}; ++ ++ ++MODULE_DEVICE_TABLE(pci, rtw_pci_id_tbl); ++ ++ ++static u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = { ++ INTEL_VENDOR_ID, ++ ATI_VENDOR_ID, ++ AMD_VENDOR_ID, ++ SIS_VENDOR_ID ++}; ++ ++static u8 rtw_pci_platform_switch_device_pci_aspm(_adapter *padapter, u8 value) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ u8 bresult = _SUCCESS; ++ int error; ++ ++ value |= 0x40; ++ ++ error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x80, value); ++ ++ if(error != 0) ++ { ++ bresult = _FALSE; ++ DBG_8192C("rtw_pci_platform_switch_device_pci_aspm error (%d)\n",error); ++ } ++ ++ return bresult; ++} ++ ++// ++// When we set 0x01 to enable clk request. Set 0x0 to disable clk req. ++// ++static u8 rtw_pci_switch_clk_req(_adapter *padapter, u8 value) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ u8 buffer, bresult = _SUCCESS; ++ int error; ++ ++ buffer = value; ++ ++ if(!padapter->hw_init_completed) ++ return bresult; ++ ++ error = pci_write_config_byte(pdvobjpriv->ppcidev, 0x81, value); ++ ++ if(error != 0) ++ { ++ bresult = _FALSE; ++ DBG_8192C("rtw_pci_switch_clk_req error (%d)\n",error); ++ } ++ ++ return bresult; ++} ++ ++#if 0 ++//Description: ++//Disable RTL8192SE ASPM & Disable Pci Bridge ASPM ++void rtw_pci_disable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u32 pcicfg_addrport = 0; ++ u8 num4bytes; ++ u8 linkctrl_reg; ++ u16 pcibridge_linkctrlreg, aspmlevel = 0; ++ ++ // When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ // if it is not intel bus then don't enable ASPM. ++ if ((pcipriv->busnumber == 0xff ++ && pcipriv->devnumber == 0xff ++ && pcipriv->funcnumber == 0xff) ++ || (pcipriv->pcibridge_busnum == 0xff ++ && pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ DBG_8192C("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { ++ DBG_8192C("%s(): Disable ASPM. Recognize the Bus of PCI(Bridge) as UNKNOWN.\n", __func__); ++ } ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ rtw_pci_switch_clk_req(padapter, 0x0); ++ } ++ ++ { ++ // Suggested by SD1 for promising device will in L0 state after an I/O. ++ u8 tmp_u1b; ++ ++ pci_read_config_byte(pdvobjpriv->ppcidev, 0x80, &tmp_u1b); ++ } ++ ++ // Retrieve original configuration settings. ++ linkctrl_reg = pcipriv->linkctrl_reg; ++ pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg; ++ ++ // Set corresponding value. ++ aspmlevel |= BIT(0) | BIT(1); ++ linkctrl_reg &= ~aspmlevel; ++ pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1)); ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg); ++ rtw_udelay_os(50); ++ ++ //When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ if ((pcipriv->busnumber == 0xff && ++ pcipriv->devnumber == 0xff && ++ pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && ++ pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ //Do Nothing!! ++ } ++ else ++ { ++ //4 //Disable Pci Bridge ASPM ++ pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) | ++ (pcipriv->pcibridge_devnum << 11) | ++ (pcipriv->pcibridge_funcnum << 8) | (1 << 31); ++ num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4; ++ ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg); ++ ++ DBG_8192C("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg); ++ ++ rtw_udelay_os(50); ++ } ++} ++ ++//[ASPM] ++//Description: ++// Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for power saving ++// We should follow the sequence to enable RTL8192SE first then enable Pci Bridge ASPM ++// or the system will show bluescreen. ++void rtw_pci_enable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u16 aspmlevel = 0; ++ u32 pcicfg_addrport = 0; ++ u8 num4bytes; ++ u8 u_pcibridge_aspmsetting = 0; ++ u8 u_device_aspmsetting = 0; ++ ++ // When there exists anyone's busnum, devnum, and funcnum that are set to 0xff, ++ // we do not execute any action and return. ++ // if it is not intel bus then don't enable ASPM. ++ ++ if ((pcipriv->busnumber == 0xff ++ && pcipriv->devnumber == 0xff ++ && pcipriv->funcnumber == 0xff) ++ || (pcipriv->pcibridge_busnum == 0xff ++ && pcipriv->pcibridge_devnum == 0xff ++ && pcipriv->pcibridge_funcnum == 0xff)) ++ { ++ DBG_8192C("PlatformEnableASPM(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++ //4 Enable Pci Bridge ASPM ++ pcicfg_addrport = (pcipriv->pcibridge_busnum << 16) ++ | (pcipriv->pcibridge_devnum << 11) ++ | (pcipriv->pcibridge_funcnum << 8) | (1 << 31); ++ num4bytes = (pcipriv->pcibridge_pciehdr_offset + 0x10) / 4; ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ ++ u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg | pdvobjpriv->const_hostpci_aspm_setting; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL || ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS) ++ u_pcibridge_aspmsetting &= ~BIT(0); ++ ++ NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting); ++ ++ DBG_8192C("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), ++ u_pcibridge_aspmsetting); ++ ++ rtw_udelay_os(50); ++ ++ // Get ASPM level (with/without Clock Req) ++ aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting; ++ u_device_aspmsetting = pcipriv->linkctrl_reg; ++ u_device_aspmsetting |= aspmlevel; ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting); //(priv->linkctrl_reg | ASPMLevel)); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ } ++ ++ rtw_udelay_os(50); ++} ++ ++// ++//Description: ++//To get link control field by searching from PCIe capability lists. ++// ++static u8 ++rtw_get_link_control_field(_adapter *padapter, u8 busnum, u8 devnum, ++ u8 funcnum) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct rt_pci_capabilities_header capability_hdr; ++ u8 capability_offset, num4bytes; ++ u32 pcicfg_addrport = 0; ++ u8 linkctrl_reg; ++ u8 status = _FALSE; ++ ++ //If busnum, devnum, funcnum are set to 0xff. ++ if (busnum == 0xff && devnum == 0xff && funcnum == 0xff) { ++ DBG_8192C("GetLinkControlField(): Fail to find PCIe Capability\n"); ++ return _FALSE; ++ } ++ ++ pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31); ++ ++ //2PCIeCap ++ ++ // The device supports capability lists. Find the capabilities. ++ num4bytes = 0x34 / 4; ++ //get capability_offset ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUchar(PCI_CONF_DATA, &capability_offset); ++ ++ // Loop through the capabilities in search of the power management capability. ++ // The list is NULL-terminated, so the last offset will always be zero. ++ ++ while (capability_offset != 0) { ++ // First find the number of 4 Byte. ++ num4bytes = capability_offset / 4; ++ ++ // Read the header of the capability at this offset. If the retrieved capability is not ++ // the power management capability that we are looking for, follow the link to the ++ // next capability and continue looping. ++ ++ //4 get capability_hdr ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUshort(PCI_CONF_DATA, (u16 *) & capability_hdr); ++ ++ // Found the PCI express capability ++ if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS) ++ { ++ break; ++ } ++ else ++ { ++ // This is some other capability. Keep looking for the PCI express capability. ++ capability_offset = capability_hdr.next; ++ } ++ } ++ ++ if (capability_hdr.capability_id == PCI_CAPABILITY_ID_PCI_EXPRESS) // ++ { ++ num4bytes = (capability_offset + 0x10) / 4; ++ ++ //4 Read Link Control Register ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUchar(PCI_CONF_DATA, &linkctrl_reg); ++ ++ pcipriv->pcibridge_pciehdr_offset = capability_offset; ++ pcipriv->pcibridge_linkctrlreg = linkctrl_reg; ++ ++ status = _TRUE; ++ } ++ else ++ { ++ // We didn't find a PCIe capability. ++ DBG_8192C("GetLinkControlField(): Cannot Find PCIe Capability\n"); ++ } ++ ++ return status; ++} ++ ++// ++//Description: ++//To get PCI bus infomation and return busnum, devnum, and funcnum about ++//the bus(bridge) which the device binds. ++// ++static u8 ++rtw_get_pci_bus_info(_adapter *padapter, ++ u16 vendorid, ++ u16 deviceid, ++ u8 irql, u8 basecode, u8 subclass, u8 filed19val, ++ u8 * busnum, u8 * devnum, u8 * funcnum) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ u8 busnum_idx, devicenum_idx, functionnum_idx; ++ u32 pcicfg_addrport = 0; ++ u32 dev_venid = 0, classcode, field19, headertype; ++ u16 venId, devId; ++ u8 basec, subc, irqline; ++ u16 regoffset; ++ u8 b_singlefunc = _FALSE; ++ u8 b_bridgechk = _FALSE; ++ ++ *busnum = 0xFF; ++ *devnum = 0xFF; ++ *funcnum = 0xFF; ++ ++ //DBG_8192C("==============>vendorid:%x,deviceid:%x,irql:%x\n", vendorid,deviceid,irql); ++ if ((basecode == PCI_CLASS_BRIDGE_DEV) && ++ (subclass == PCI_SUBCLASS_BR_PCI_TO_PCI) ++ && (filed19val == U1DONTCARE)) ++ b_bridgechk = _TRUE; ++ ++ // perform a complete pci bus scan operation ++ for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++) //255 ++ { ++ for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++) //32 ++ { ++ b_singlefunc = _FALSE; ++ for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++) //8 ++ { ++ // ++ // We have to skip redundant Bus scan to prevent unexpected system hang ++ // if single function is present in this device. ++ // 2009.02.26. ++ // ++ if (functionnum_idx == 0) { ++ //4 get header type (DWORD #3) ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &headertype); ++ headertype = ((headertype >> 16) & 0x0080) >> 7; // address 0x0e[7]. ++ if (headertype == 0) //Single function ++ b_singlefunc = _TRUE; ++ } ++ else ++ {//By pass the following scan process. ++ if (b_singlefunc == _TRUE) ++ break; ++ } ++ ++ // Set access enable control. ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ ++ //4 // Get vendorid/ deviceid ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid); ++ ++ // if data port is full of 1s, no device is present ++ // some broken boards return 0 if a slot is empty: ++ if (dev_venid == 0xFFFFFFFF || dev_venid == 0) ++ continue; //PCI_INVALID_VENDORID ++ ++ // 4 // Get irql ++ regoffset = 0x3C; ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ NdisRawReadPortUchar((PCI_CONF_DATA +(regoffset & 0x3)), &irqline); ++ ++ venId = (u16) (dev_venid >> 0) & 0xFFFF; ++ devId = (u16) (dev_venid >> 16) & 0xFFFF; ++ ++ // Check Vendor ID ++ if (!b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE)) ++ continue; ++ ++ // Check Device ID ++ if (!b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE)) ++ continue; ++ ++ // Check irql ++ if (!b_bridgechk && (irqline != irql) && (irql != U1DONTCARE)) ++ continue; ++ ++ //4 get Class Code ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &classcode); ++ classcode = classcode >> 8; ++ ++ basec = (u8) (classcode >> 16) & 0xFF; ++ subc = (u8) (classcode >> 8) & 0xFF; ++ if (b_bridgechk && (venId != vendorid) && (basec == basecode) && (subc == subclass)) ++ return _TRUE; ++ ++ // Check Vendor ID ++ if (b_bridgechk && (venId != vendorid) && (vendorid != U2DONTCARE)) ++ continue; ++ ++ // Check Device ID ++ if (b_bridgechk && (devId != deviceid) && (deviceid != U2DONTCARE)) ++ continue; ++ ++ // Check irql ++ if (b_bridgechk && (irqline != irql) && (irql != U1DONTCARE)) ++ continue; ++ ++ //4 get field 0x19 value (DWORD #6) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &field19); ++ field19 = (field19 >> 8) & 0xFF; ++ ++ //4 Matching Class Code and filed19. ++ if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) { ++ *busnum = busnum_idx; ++ *devnum = devicenum_idx; ++ *funcnum = functionnum_idx; ++ ++ DBG_8192C("GetPciBusInfo(): Find Device(%X:%X) bus=%d dev=%d, func=%d\n", ++ vendorid, deviceid, busnum_idx, devicenum_idx, functionnum_idx); ++ return _TRUE; ++ } ++ } ++ } ++ } ++ ++ DBG_8192C("GetPciBusInfo(): Cannot Find Device(%X:%X:%X)\n", vendorid, deviceid, dev_venid); ++ ++ return _FALSE; ++} ++ ++static u8 ++rtw_get_pci_brideg_info(_adapter *padapter, ++ u8 basecode, ++ u8 subclass, ++ u8 filed19val, u8 * busnum, u8 * devnum, ++ u8 * funcnum, u16 * vendorid, u16 * deviceid) ++{ ++ u8 busnum_idx, devicenum_idx, functionnum_idx; ++ u32 pcicfg_addrport = 0; ++ u32 dev_venid, classcode, field19, headertype; ++ u16 venId, devId; ++ u8 basec, subc, irqline; ++ u16 regoffset; ++ u8 b_singlefunc = _FALSE; ++ ++ *busnum = 0xFF; ++ *devnum = 0xFF; ++ *funcnum = 0xFF; ++ ++ // perform a complete pci bus scan operation ++ for (busnum_idx = 0; busnum_idx < PCI_MAX_BRIDGE_NUMBER; busnum_idx++) //255 ++ { ++ for (devicenum_idx = 0; devicenum_idx < PCI_MAX_DEVICES; devicenum_idx++) //32 ++ { ++ b_singlefunc = _FALSE; ++ for (functionnum_idx = 0; functionnum_idx < PCI_MAX_FUNCTION; functionnum_idx++) //8 ++ { ++ // ++ // We have to skip redundant Bus scan to prevent unexpected system hang ++ // if single function is present in this device. ++ // 2009.02.26. ++ // ++ if (functionnum_idx == 0) ++ { ++ //4 get header type (DWORD #3) ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ //NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS , pcicfg_addrport + (3 << 2)); ++ //NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA, &headertype); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (3 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &headertype); ++ headertype = ((headertype >> 16) & 0x0080) >> 7; // address 0x0e[7]. ++ if (headertype == 0) //Single function ++ b_singlefunc = _TRUE; ++ } ++ else ++ {//By pass the following scan process. ++ if (b_singlefunc == _TRUE) ++ break; ++ } ++ ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ ++ //4 // Get vendorid/ deviceid ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ // now grab data port with device|vendor 4 byte dword ++ NdisRawReadPortUlong(PCI_CONF_DATA, &dev_venid); ++ ++ //4 Get irql ++ regoffset = 0x3C; ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31) | (regoffset & 0xFFFFFFFC); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport); ++ NdisRawReadPortUchar((PCI_CONF_DATA + (regoffset & 0x3)), &irqline); ++ ++ venId = (u16) (dev_venid >> 0) & 0xFFFF; ++ devId = (u16) (dev_venid >> 16) & 0xFFFF; ++ ++ //4 get Class Code ++ pcicfg_addrport = (busnum_idx << 16) | (devicenum_idx << 11) | (functionnum_idx << 8) | (1 << 31); ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (2 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &classcode); ++ classcode = classcode >> 8; ++ ++ basec = (u8) (classcode >> 16) & 0xFF; ++ subc = (u8) (classcode >> 8) & 0xFF; ++ ++ //4 get field 0x19 value (DWORD #6) ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (6 << 2)); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &field19); ++ field19 = (field19 >> 8) & 0xFF; ++ ++ //4 Matching Class Code and filed19. ++ if ((basec == basecode) && (subc == subclass) && ((field19 == filed19val) || (filed19val == U1DONTCARE))) { ++ *busnum = busnum_idx; ++ *devnum = devicenum_idx; ++ *funcnum = functionnum_idx; ++ *vendorid = venId; ++ *deviceid = devId; ++ ++ DBG_8192C("GetPciBridegInfo : Find Device(%X:%X) bus=%d dev=%d, func=%d\n", ++ venId, devId, busnum_idx, devicenum_idx, functionnum_idx); ++ ++ return _TRUE; ++ } ++ } ++ } ++ } ++ ++ DBG_8192C("GetPciBridegInfo(): Cannot Find PciBridge for Device\n"); ++ ++ return _FALSE; ++} // end of GetPciBridegInfo ++ ++// ++//Description: ++//To find specific bridge information. ++// ++static void rtw_find_bridge_info(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u8 pcibridge_busnum = 0xff; ++ u8 pcibridge_devnum = 0xff; ++ u8 pcibridge_funcnum = 0xff; ++ u16 pcibridge_vendorid = 0xff; ++ u16 pcibridge_deviceid = 0xff; ++ u8 tmp = 0; ++ ++ rtw_get_pci_brideg_info(padapter, ++ PCI_CLASS_BRIDGE_DEV, ++ PCI_SUBCLASS_BR_PCI_TO_PCI, ++ pcipriv->busnumber, ++ &pcibridge_busnum, ++ &pcibridge_devnum, &pcibridge_funcnum, ++ &pcibridge_vendorid, &pcibridge_deviceid); ++ ++ // match the array of vendor id and regonize which chipset is used. ++ pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN; ++ ++ for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) { ++ if (pcibridge_vendorid == pcibridge_vendors[tmp]) { ++ pcipriv->pcibridge_vendor = tmp; ++ DBG_8192C("Pci Bridge Vendor is found index: %d\n", tmp); ++ break; ++ } ++ } ++ DBG_8192C("Pci Bridge Vendor is %x\n", pcibridge_vendors[tmp]); ++ ++ // Update corresponding PCI bus info. ++ pcipriv->pcibridge_busnum = pcibridge_busnum; ++ pcipriv->pcibridge_devnum = pcibridge_devnum; ++ pcipriv->pcibridge_funcnum = pcibridge_funcnum; ++ pcipriv->pcibridge_vendorid = pcibridge_vendorid; ++ pcipriv->pcibridge_deviceid = pcibridge_deviceid; ++ ++} ++ ++static u8 ++rtw_get_amd_l1_patch(_adapter *padapter, u8 busnum, u8 devnum, ++ u8 funcnum) ++{ ++ u8 status = _FALSE; ++ u8 offset_e0; ++ unsigned offset_e4; ++ u32 pcicfg_addrport = 0; ++ ++ pcicfg_addrport = (busnum << 16) | (devnum << 11) | (funcnum << 8) | (1 << 31); ++ ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0); ++ NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0); ++ ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE0); ++ NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0); ++ ++ if (offset_e0 == 0xA0) ++ { ++ NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4); ++ NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4); ++ //DbgPrint("Offset E4 %x\n", offset_e4); ++ if (offset_e4 & BIT(23)) ++ status = _TRUE; ++ } ++ ++ return status; ++} ++#else ++/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/ ++void rtw_pci_disable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u8 linkctrl_reg; ++ u16 pcibridge_linkctrlreg; ++ u16 aspmlevel = 0; ++ ++ // We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM. ++ // Advertised by SD1 victorh. Added by tynli. 2009.11.23. ++ if(pdvobjpriv->const_pci_aspm == 0) ++ return; ++ ++ if(!padapter->hw_init_completed) ++ return; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("%s(): PCI(Bridge) UNKNOWN.\n", __FUNCTION__)); ++ return; ++ } ++ ++ linkctrl_reg = pcipriv->linkctrl_reg; ++ pcibridge_linkctrlreg = pcipriv->pcibridge_linkctrlreg; ++ ++ // Set corresponding value. ++ aspmlevel |= BIT(0) | BIT(1); ++ linkctrl_reg &=~aspmlevel; ++ pcibridge_linkctrlreg &=~aspmlevel; ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ RT_CLEAR_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ rtw_pci_switch_clk_req(padapter, 0x0); ++ } ++ ++ { ++ /*for promising device will in L0 state after an I/O.*/ ++ u8 tmp_u1b; ++ pci_read_config_byte(pdev, 0x80, &tmp_u1b); ++ } ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, linkctrl_reg); ++ rtw_udelay_os(50); ++ ++ //When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, ++ // we do not execute any action and return. Added by tynli. ++ if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) ) ++ { ++ // Do Nothing!! ++ } ++ else ++ { ++ /*Disable Pci Bridge ASPM*/ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + (num4bytes << 2)); ++ //NdisRawWritePortUchar(PCI_CONF_DATA, pcibridge_linkctrlreg); ++ pci_write_config_byte(bridge_pdev, pcipriv->pcibridge_pciehdr_offset + 0x10, pcibridge_linkctrlreg); ++ ++ DBG_8192C("rtw_pci_disable_aspm():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), pcibridge_linkctrlreg); ++ ++ rtw_udelay_os(50); ++ } ++ ++} ++ ++/*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for ++power saving We should follow the sequence to enable ++RTL8192SE first then enable Pci Bridge ASPM ++or the system will show bluescreen.*/ ++void rtw_pci_enable_aspm(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u16 aspmlevel = 0; ++ u8 u_pcibridge_aspmsetting = 0; ++ u8 u_device_aspmsetting = 0; ++ u32 u_device_aspmsupportsetting = 0; ++ ++ // We do not diable/enable ASPM by driver, in the future, the BIOS will enable host and NIC ASPM. ++ // Advertised by SD1 victorh. Added by tynli. 2009.11.23. ++ if(pdvobjpriv->const_pci_aspm == 0) ++ return; ++ ++ //When there exists anyone's BusNum, DevNum, and FuncNum that are set to 0xff, ++ // we do not execute any action and return. Added by tynli. ++ if( (pcipriv->busnumber == 0xff && pcipriv->devnumber == 0xff && pcipriv->funcnumber == 0xff) || ++ (pcipriv->pcibridge_busnum == 0xff && pcipriv->pcibridge_devnum == 0xff && pcipriv->pcibridge_funcnum == 0xff) ) ++ { ++ DBG_8192C("rtw_pci_enable_aspm(): Fail to enable ASPM. Cannot find the Bus of PCI(Bridge).\n"); ++ return; ++ } ++ ++//Get Bridge ASPM Support ++//not to enable bridge aspm if bridge does not support ++//Added by sherry 20100803 ++ if (IS_HARDWARE_TYPE_8192DE(padapter)) ++ { ++ //PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11)|(pcipriv->pcibridge_funcnum << 8)|(1 << 31); ++ //Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x0C)/4; ++ //NdisRawWritePortUlong((ULONG_PTR)PCI_CONF_ADDRESS , PciCfgAddrPort+(Num4Bytes << 2)); ++ //NdisRawReadPortUlong((ULONG_PTR)PCI_CONF_DATA,&uDeviceASPMSupportSetting); ++ pci_read_config_dword(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x0C), &u_device_aspmsupportsetting); ++ DBG_8192C("rtw_pci_enable_aspm(): Bridge ASPM support %x \n",u_device_aspmsupportsetting); ++ if(((u_device_aspmsupportsetting & BIT(11)) != BIT(11)) || ((u_device_aspmsupportsetting & BIT(10)) != BIT(10))) ++ { ++ if(pdvobjpriv->const_devicepci_aspm_setting == 3) ++ { ++ DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L0S or L1\n"); ++ return; ++ } ++ else if(pdvobjpriv->const_devicepci_aspm_setting == 2) ++ { ++ if((u_device_aspmsupportsetting & BIT(11)) != BIT(11)) ++ { ++ DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L1 \n"); ++ return; ++ } ++ } ++ else if(pdvobjpriv->const_devicepci_aspm_setting == 1) ++ { ++ if((u_device_aspmsupportsetting & BIT(10)) != BIT(10)) ++ { ++ DBG_8192C("rtw_pci_enable_aspm(): Bridge not support L0s \n"); ++ return; ++ } ++ ++ } ++ } ++ else ++ { ++ DBG_8192C("rtw_pci_enable_aspm(): Bridge support L0s and L1 \n"); ++ } ++ } ++ ++ ++ /*Enable Pci Bridge ASPM*/ ++ //PciCfgAddrPort = (pcipriv->pcibridge_busnum << 16)|(pcipriv->pcibridge_devnum<< 11) |(pcipriv->pcibridge_funcnum << 8)|(1 << 31); ++ //Num4Bytes = (pcipriv->pcibridge_pciehdr_offset+0x10)/4; ++ // set up address port at 0xCF8 offset field= 0 (dev|vend) ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, PciCfgAddrPort + (Num4Bytes << 2)); ++ // now grab data port with device|vendor 4 byte dword ++ ++ u_pcibridge_aspmsetting = pcipriv->pcibridge_linkctrlreg; ++ u_pcibridge_aspmsetting |= pdvobjpriv->const_hostpci_aspm_setting; ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL || ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_SIS ) ++ u_pcibridge_aspmsetting &= ~BIT(0); // for intel host 42 device 43 ++ ++ //NdisRawWritePortUchar(PCI_CONF_DATA, u_pcibridge_aspmsetting); ++ pci_write_config_byte(bridge_pdev, (pcipriv->pcibridge_pciehdr_offset+0x10), u_pcibridge_aspmsetting); ++ ++ DBG_8192C("PlatformEnableASPM():PciBridge busnumber[%x], DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n", ++ pcipriv->pcibridge_busnum, pcipriv->pcibridge_devnum, pcipriv->pcibridge_funcnum, ++ (pcipriv->pcibridge_pciehdr_offset+0x10), ++ u_pcibridge_aspmsetting); ++ ++ rtw_udelay_os(50); ++ ++ /*Get ASPM level (with/without Clock Req)*/ ++ aspmlevel |= pdvobjpriv->const_devicepci_aspm_setting; ++ u_device_aspmsetting = pcipriv->linkctrl_reg; ++ u_device_aspmsetting |= aspmlevel; // device 43 ++ ++ rtw_pci_platform_switch_device_pci_aspm(padapter, u_device_aspmsetting); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) { ++ rtw_pci_switch_clk_req(padapter, (pwrpriv->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_OFF_LEVL_CLK_REQ); ++ } ++ ++ rtw_udelay_os(50); ++} ++ ++static u8 rtw_pci_get_amd_l1_patch(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ u8 status = _FALSE; ++ u8 offset_e0; ++ u32 offset_e4; ++ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0); ++ //NdisRawWritePortUchar(PCI_CONF_DATA, 0xA0); ++ pci_write_config_byte(bridge_pdev, 0xE0, 0xA0); ++ ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS,pcicfg_addrport + 0xE0); ++ //NdisRawReadPortUchar(PCI_CONF_DATA, &offset_e0); ++ pci_read_config_byte(bridge_pdev, 0xE0, &offset_e0); ++ ++ if (offset_e0 == 0xA0) { ++ //NdisRawWritePortUlong(PCI_CONF_ADDRESS, pcicfg_addrport + 0xE4); ++ //NdisRawReadPortUlong(PCI_CONF_DATA, &offset_e4); ++ pci_read_config_dword(bridge_pdev, 0xE4, &offset_e4); ++ if (offset_e4 & BIT(23)) ++ status = _TRUE; ++ } ++ ++ return status; ++} ++ ++static void rtw_pci_get_linkcontrol_field(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ u8 capabilityoffset = pcipriv->pcibridge_pciehdr_offset; ++ u8 linkctrl_reg; ++ ++ /*Read Link Control Register*/ ++ pci_read_config_byte(bridge_pdev, capabilityoffset + PCI_EXP_LNKCTL, &linkctrl_reg); ++ ++ pcipriv->pcibridge_linkctrlreg = linkctrl_reg; ++} ++#endif ++ ++static void rtw_pci_parse_configuration(struct pci_dev *pdev, _adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ u8 tmp; ++ int pos; ++ u8 linkctrl_reg; ++ ++ //Link Control Register ++ pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); ++ pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg); ++ pcipriv->linkctrl_reg = linkctrl_reg; ++ ++ //DBG_8192C("Link Control Register = %x\n", pcipriv->linkctrl_reg); ++ ++ pci_read_config_byte(pdev, 0x98, &tmp); ++ tmp |= BIT(4); ++ pci_write_config_byte(pdev, 0x98, tmp); ++ ++ //tmp = 0x17; ++ //pci_write_config_byte(pdev, 0x70f, tmp); ++} ++ ++// ++// Update PCI dependent default settings. ++// ++static void rtw_pci_update_default_setting(_adapter *padapter) ++{ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ //reset pPSC->reg_rfps_level & priv->b_support_aspm ++ pwrpriv->reg_rfps_level = 0; ++ pwrpriv->b_support_aspm = 0; ++ ++ // Dynamic Mechanism, ++ //pAdapter->HalFunc.SetHalDefVarHandler(pAdapter, HAL_DEF_INIT_GAIN, &(pDevice->InitGainState)); ++ ++ // Update PCI ASPM setting ++ pwrpriv->const_amdpci_aspm = pdvobjpriv->const_amdpci_aspm; ++ switch (pdvobjpriv->const_pci_aspm) { ++ case 0: // No ASPM ++ break; ++ ++ case 1: // ASPM dynamically enabled/disable. ++ pwrpriv->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM; ++ break; ++ ++ case 2: // ASPM with Clock Req dynamically enabled/disable. ++ pwrpriv->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ break; ++ ++ case 3: // Always enable ASPM and Clock Req from initialization to halt. ++ pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM); ++ pwrpriv->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ break; ++ ++ case 4: // Always enable ASPM without Clock Req from initialization to halt. ++ pwrpriv->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM | RT_RF_OFF_LEVL_CLK_REQ); ++ pwrpriv->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM; ++ break; ++ } ++ ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC; ++ ++ // Update Radio OFF setting ++ switch (pdvobjpriv->const_hwsw_rfoff_d3) { ++ case 1: ++ if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM) ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM; ++ break; ++ ++ case 2: ++ if (pwrpriv->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM) ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM; ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC; ++ break; ++ ++ case 3: ++ pwrpriv->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3; ++ break; ++ } ++ ++ // Update Rx 2R setting ++ //pPSC->reg_rfps_level |= ((pDevice->RegLPS2RDisable) ? RT_RF_LPS_DISALBE_2R : 0); ++ ++ // ++ // Set HW definition to determine if it supports ASPM. ++ // ++ switch (pdvobjpriv->const_support_pciaspm) { ++ case 0: // Not support ASPM. ++ { ++ u8 b_support_aspm = _FALSE; ++ pwrpriv->b_support_aspm = b_support_aspm; ++ } ++ break; ++ ++ case 1: // Support ASPM. ++ { ++ u8 b_support_aspm = _TRUE; ++ u8 b_support_backdoor = _TRUE; ++ ++ pwrpriv->b_support_aspm = b_support_aspm; ++ ++ /*if(pAdapter->MgntInfo.CustomerID == RT_CID_TOSHIBA && ++ pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD && ++ !pcipriv->amd_l1_patch) ++ b_support_backdoor = _FALSE;*/ ++ ++ pwrpriv->b_support_backdoor = b_support_backdoor; ++ } ++ break; ++ ++ case 2: // Set by Chipset. ++ // ASPM value set by chipset. ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) { ++ u8 b_support_aspm = _TRUE; ++ pwrpriv->b_support_aspm = b_support_aspm; ++ } ++ break; ++ ++ default: ++ // Do nothing. Set when finding the chipset. ++ break; ++ } ++} ++ ++static void rtw_pci_initialize_adapter_common(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ ++ rtw_pci_update_default_setting(padapter); ++ ++ if (pwrpriv->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) { ++ // Always enable ASPM & Clock Req. ++ rtw_pci_enable_aspm(padapter); ++ RT_SET_PS_LEVEL(pwrpriv, RT_RF_PS_LEVEL_ALWAYS_ASPM); ++ } ++ ++} ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)) || (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++#define rtw_pci_interrupt(x,y,z) rtw_pci_interrupt(x,y) ++#endif ++ ++static irqreturn_t rtw_pci_interrupt(int irq, void *priv, struct pt_regs *regs) ++{ ++ _adapter *padapter = (_adapter *)priv; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ ++ ++ if (pdvobjpriv->irq_enabled == 0) { ++ return IRQ_HANDLED; ++ } ++ ++ if(padapter->HalFunc.interrupt_handler(padapter) == _FAIL) ++ return IRQ_HANDLED; ++ //return IRQ_NONE; ++ ++ return IRQ_HANDLED; ++} ++ ++static u32 pci_dvobj_init(_adapter *padapter) ++{ ++ u32 status = _SUCCESS; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct pci_priv *pcipriv = &(pdvobjpriv->pcipriv); ++ struct pci_dev *pdev = pdvobjpriv->ppcidev; ++ struct pci_dev *bridge_pdev = pdev->bus->self; ++ u8 tmp; ++ ++_func_enter_; ++ ++#if 1 ++ /*find bus info*/ ++ pcipriv->busnumber = pdev->bus->number; ++ pcipriv->devnumber = PCI_SLOT(pdev->devfn); ++ pcipriv->funcnumber = PCI_FUNC(pdev->devfn); ++ ++ /*find bridge info*/ ++ pcipriv->pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN; ++ if(bridge_pdev){ ++ pcipriv->pcibridge_vendorid = bridge_pdev->vendor; ++ for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) { ++ if (bridge_pdev->vendor == pcibridge_vendors[tmp]) { ++ pcipriv->pcibridge_vendor = tmp; ++ DBG_8192C("Pci Bridge Vendor is found index: %d, %x\n", tmp, pcibridge_vendors[tmp]); ++ break; ++ } ++ } ++ } ++ ++ //if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) { ++ if(bridge_pdev){ ++ pcipriv->pcibridge_busnum = bridge_pdev->bus->number; ++ pcipriv->pcibridge_devnum = PCI_SLOT(bridge_pdev->devfn); ++ pcipriv->pcibridge_funcnum = PCI_FUNC(bridge_pdev->devfn); ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)) ++ pcipriv->pcibridge_pciehdr_offset = pci_find_capability(bridge_pdev, PCI_CAP_ID_EXP); ++#else ++ pcipriv->pcibridge_pciehdr_offset = bridge_pdev->pcie_cap; ++#endif ++ ++ rtw_pci_get_linkcontrol_field(padapter); ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) { ++ pcipriv->amd_l1_patch = rtw_pci_get_amd_l1_patch(padapter); ++ } ++ } ++#else ++ // ++ // Find bridge related info. ++ // ++ rtw_get_pci_bus_info(padapter, ++ pdev->vendor, ++ pdev->device, ++ (u8) pdvobjpriv->irqline, ++ 0x02, 0x80, U1DONTCARE, ++ &pcipriv->busnumber, ++ &pcipriv->devnumber, ++ &pcipriv->funcnumber); ++ ++ rtw_find_bridge_info(padapter); ++ ++ if (pcipriv->pcibridge_vendor != PCI_BRIDGE_VENDOR_UNKNOWN) { ++ rtw_get_link_control_field(padapter, ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum); ++ ++ if (pcipriv->pcibridge_vendor == PCI_BRIDGE_VENDOR_AMD) { ++ pcipriv->amd_l1_patch = ++ rtw_get_amd_l1_patch(padapter, ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum); ++ } ++ } ++#endif ++ ++ // ++ // Allow the hardware to look at PCI config information. ++ // ++ rtw_pci_parse_configuration(pdev, padapter); ++ ++ DBG_8192C("pcidev busnumber:devnumber:funcnumber:" ++ "vendor:link_ctl %d:%d:%d:%x:%x\n", ++ pcipriv->busnumber, ++ pcipriv->devnumber, ++ pcipriv->funcnumber, ++ pdev->vendor, ++ pcipriv->linkctrl_reg); ++ ++ DBG_8192C("pci_bridge busnumber:devnumber:funcnumber:vendor:" ++ "pcie_cap:link_ctl_reg: %d:%d:%d:%x:%x:%x:%x\n", ++ pcipriv->pcibridge_busnum, ++ pcipriv->pcibridge_devnum, ++ pcipriv->pcibridge_funcnum, ++ pcibridge_vendors[pcipriv->pcibridge_vendor], ++ pcipriv->pcibridge_pciehdr_offset, ++ pcipriv->pcibridge_linkctrlreg, ++ pcipriv->amd_l1_patch); ++ ++ //.2 ++ if ((rtw_init_io_priv(padapter)) == _FAIL) ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ status = _FAIL; ++ } ++ ++ //.3 ++ intf_read_chip_version(padapter); ++ //.4 ++ intf_chip_configure(padapter); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++static void pci_dvobj_deinit(_adapter * padapter) ++{ ++ //struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv; ++ ++_func_enter_; ++ ++_func_exit_; ++} ++ ++ ++static void decide_chip_type_by_pci_device_id(_adapter *padapter, struct pci_dev *pdev) ++{ ++ u16 venderid, deviceid, irqline; ++ u8 revisionid; ++ struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv; ++ ++ ++ venderid = pdev->vendor; ++ deviceid = pdev->device; ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23)) ++ pci_read_config_byte(pdev, PCI_REVISION_ID, &revisionid); // PCI_REVISION_ID 0x08 ++#else ++ revisionid = pdev->revision; ++#endif ++ pci_read_config_word(pdev, PCI_INTERRUPT_LINE, &irqline); // PCI_INTERRUPT_LINE 0x3c ++ pdvobjpriv->irqline = irqline; ++ ++ ++ // ++ // Decide hardware type here. ++ // ++ if( deviceid == HAL_HW_PCI_8185_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8188_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8198_DEVICE_ID) ++ { ++ DBG_8192C("Adapter (8185/8185B) is found- VendorID/DeviceID=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType=HARDWARE_TYPE_RTL8185; ++ } ++ else if (deviceid == HAL_HW_PCI_8190_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0045_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0046_DEVICE_ID || ++ deviceid == HAL_HW_PCI_DLINK_DEVICE_ID) ++ { ++ DBG_8192C("Adapter(8190 PCI) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8190P; ++ } ++ else if (deviceid == HAL_HW_PCI_8192_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0044_DEVICE_ID || ++ deviceid == HAL_HW_PCI_0047_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8192SE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8174_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8173_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8172_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8171_DEVICE_ID) ++ { ++ // 8192e and and 8192se may have the same device ID 8192. However, their Revision ++ // ID is different ++ // Added for 92DE. We deferentiate it from SVID,SDID. ++ if( pdev->subsystem_vendor == 0x10EC && pdev->subsystem_device == 0xE020){ ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++ DBG_8192C("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid); ++ }else{ ++ switch (revisionid) { ++ case HAL_HW_PCI_REVISION_ID_8192PCIE: ++ DBG_8192C("Adapter(8192 PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192E; ++ break; ++ case HAL_HW_PCI_REVISION_ID_8192SE: ++ DBG_8192C("Adapter(8192SE) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192SE; ++ break; ++ default: ++ DBG_8192C("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192SE; ++ break; ++ } ++ } ++ } ++ else if(deviceid==HAL_HW_PCI_8723E_DEVICE_ID ) ++ {//RTL8723E may have the same device ID with RTL8192CET ++ padapter->HardwareType = HARDWARE_TYPE_RTL8723E; ++ DBG_8192C("Adapter(8723 PCI-E) is found - VendorID/DeviceID=%x/%x\n", venderid, deviceid); ++ } ++ else if (deviceid == HAL_HW_PCI_8192CET_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8192CE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8191CE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_8188CE_DEVICE_ID) ++ { ++ DBG_8192C("Adapter(8192C PCI-E) is found - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CE; ++ } ++ else if (deviceid == HAL_HW_PCI_8192DE_DEVICE_ID || ++ deviceid == HAL_HW_PCI_002B_DEVICE_ID ){ ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++ DBG_8192C("Adapter(8192DE) is found - VendorID/DeviceID/RID=%X/%X/%X\n", venderid, deviceid, revisionid); ++ } ++ else ++ { ++ DBG_8192C("Err: Unknown device - vendorid/deviceid=%x/%x\n", venderid, deviceid); ++ //padapter->HardwareType = HAL_DEFAULT_HARDWARE_TYPE; ++ } ++ ++ ++ padapter->chip_type = NULL_CHIP_TYPE; ++ ++ //TODO: ++#ifdef CONFIG_RTL8192C ++ padapter->chip_type = RTL8188C_8192C; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CE; ++#endif ++#ifdef CONFIG_RTL8192D ++ pdvobjpriv->InterfaceNumber = revisionid; ++ ++ padapter->chip_type = RTL8192D; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DE; ++#endif ++ ++} ++ ++static void pci_intf_start(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_start\n")); ++ DBG_8192C("+pci_intf_start\n"); ++ ++ //Enable hw interrupt ++ padapter->HalFunc.enable_interrupt(padapter); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_start\n")); ++ DBG_8192C("-pci_intf_start\n"); ++} ++ ++static void pci_intf_stop(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+pci_intf_stop\n")); ++ ++ //Disable hw interrupt ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //device still exists, so driver can do i/o operation ++ padapter->HalFunc.disable_interrupt(padapter); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("pci_intf_stop: SurpriseRemoved==_FALSE\n")); ++ } ++ else ++ { ++ // Clear irq_enabled to prevent handle interrupt function. ++ padapter->dvobjpriv.irq_enabled = 0; ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-pci_intf_stop\n")); ++ ++} ++ ++ ++static void rtw_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n")); ++ ++ if(padapter->bup == _TRUE) ++ { ++ DBG_8192C("+rtw_dev_unload\n"); ++ //s1. ++/* if(pnetdev) ++ { ++ netif_carrier_off(pnetdev); ++ netif_stop_queue(pnetdev); ++ } ++ ++ //s2. ++ //s2-1. issue rtw_disassoc_cmd to fw ++ rtw_disassoc_cmd(padapter); ++ //s2-2. indicate disconnect to os ++ rtw_indicate_disconnect(padapter); ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++ //s2-4. ++ rtw_free_network_queue(padapter, _TRUE);*/ ++ ++ padapter->bDriverStopped = _TRUE; ++ ++ //s3. ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s4. ++ rtw_stop_drv_threads(padapter); ++ ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ DBG_8192C("r871x_dev_unload()->rtl871x_hal_deinit()\n"); ++ rtw_hal_deinit(padapter); ++ ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ padapter->bup = _FALSE; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" )); ++ } ++ ++ DBG_8192C("-rtw_dev_unload\n"); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n")); ++ ++} ++ ++static void disable_ht_for_spec_devid(const struct pci_device_id *pdid) ++{ ++#ifdef CONFIG_80211N_HT ++ u16 vid, pid; ++ u32 flags; ++ int i; ++ int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id); ++ ++ for(i=0; ivendor==vid) && (pdid->device==pid) && (flags&SPEC_DEV_ID_DISABLE_HT)) ++ { ++ rtw_ht_enable = 0; ++ rtw_cbw40_enable = 0; ++ rtw_ampdu_enable = 0; ++ } ++ ++ } ++#endif ++} ++ ++#ifdef CONFIG_PM ++static int rtw_suspend(struct pci_dev *pdev, pm_message_t state) ++{ ++ _func_enter_; ++ ++ ++ _func_exit_; ++ return 0; ++} ++ ++static int rtw_resume(struct pci_dev *pdev) ++{ ++ _func_enter_; ++ ++ ++ _func_exit_; ++ ++ return 0; ++} ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++#define pci_iounmap(x,y) iounmap(y) ++#endif ++ ++extern char* ifname; ++ ++/* ++ * drv_init() - a device potentially for us ++ * ++ * notes: drv_init() is called when the bus driver has located a card for us to support. ++ * We accept the new device by returning 0. ++*/ ++static int rtw_drv_init(struct pci_dev *pdev, const struct pci_device_id *pdid) ++{ ++ int i, err = -ENODEV; ++ ++ uint status; ++ _adapter *padapter = NULL; ++ struct dvobj_priv *pdvobjpriv; ++ struct net_device *pnetdev; ++ unsigned long pmem_start, pmem_len, pmem_flags; ++ u8 bdma64 = _FALSE; ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n")); ++ //DBG_8192C("+rtw_drv_init\n"); ++ ++ err = pci_enable_device(pdev); ++ if (err) { ++ DBG_8192C(KERN_ERR "%s : Cannot enable new PCI device\n", pci_name(pdev)); ++ return err; ++ } ++ ++#ifdef CONFIG_64BIT_DMA ++ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { ++ DBG_8192C("RTL819xCE: Using 64bit DMA\n"); ++ if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { ++ DBG_8192C(KERN_ERR "Unable to obtain 64bit DMA for consistent allocations\n"); ++ err = -ENOMEM; ++ pci_disable_device(pdev); ++ return err; ++ } ++ bdma64 = _TRUE; ++ } else ++#endif ++ { ++ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { ++ if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { ++ DBG_8192C(KERN_ERR "Unable to obtain 32bit DMA for consistent allocations\n"); ++ err = -ENOMEM; ++ pci_disable_device(pdev); ++ return err; ++ } ++ } ++ } ++ ++ pci_set_master(pdev); ++ ++ //step 0. ++ disable_ht_for_spec_devid(pdid); ++ ++ ++ //step 1. set USB interface data ++ // init data ++ pnetdev = rtw_init_netdev(NULL); ++ if (!pnetdev){ ++ err = -ENOMEM; ++ goto fail1; ++ } ++ rtw_init_netdev_name(pnetdev,ifname); ++ ++ if(bdma64){ ++ pnetdev->features |= NETIF_F_HIGHDMA; ++ } ++ ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) ++ SET_NETDEV_DEV(pnetdev, &pdev->dev); ++#endif ++ ++ padapter = rtw_netdev_priv(pnetdev); ++ pdvobjpriv = &padapter->dvobjpriv; ++ pdvobjpriv->padapter = padapter; ++ pdvobjpriv->ppcidev = pdev; ++ ++ // set data ++ pci_set_drvdata(pdev, pnetdev); ++ ++ err = pci_request_regions(pdev, DRV_NAME); ++ if (err) { ++ DBG_8192C(KERN_ERR "Can't obtain PCI resources\n"); ++ goto fail1; ++ } ++ //MEM map ++ pmem_start = pci_resource_start(pdev, 2); ++ pmem_len = pci_resource_len(pdev, 2); ++ pmem_flags = pci_resource_flags(pdev, 2); ++ ++#ifdef RTK_DMP_PLATFORM ++ pdvobjpriv->pci_mem_start = (unsigned long)ioremap_nocache( pmem_start, pmem_len); ++#else ++ pdvobjpriv->pci_mem_start = (unsigned long)pci_iomap(pdev, 2, pmem_len); // shared mem start ++#endif ++ if (pdvobjpriv->pci_mem_start == 0) { ++ DBG_8192C(KERN_ERR "Can't map PCI mem\n"); ++ goto fail2; ++ } ++ ++ DBG_8192C("Memory mapped space start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n", ++ pmem_start, pmem_len, pmem_flags, pdvobjpriv->pci_mem_start); ++ ++ // Disable Clk Request */ ++ pci_write_config_byte(pdev, 0x81, 0); ++ // leave D3 mode */ ++ pci_write_config_byte(pdev, 0x44, 0); ++ pci_write_config_byte(pdev, 0x04, 0x06); ++ pci_write_config_byte(pdev, 0x04, 0x07); ++ ++ ++ //set interface_type to usb ++ padapter->interface_type = RTW_PCIE; ++ ++ //step 1-1., decide the chip_type via vid/pid ++ decide_chip_type_by_pci_device_id(padapter, pdev); ++ ++ //step 2. ++ if(padapter->chip_type== RTL8188C_8192C) ++ { ++#ifdef CONFIG_RTL8192C ++ rtl8192ce_set_hal_ops(padapter); ++#endif ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++#ifdef CONFIG_RTL8192D ++ rtl8192de_set_hal_ops(padapter); ++#endif ++ } ++ else ++ { ++ status = _FAIL; ++ goto error; ++ } ++ ++ //step 3. initialize the dvobj_priv ++ padapter->dvobj_init=&pci_dvobj_init; ++ padapter->dvobj_deinit=&pci_dvobj_deinit; ++ padapter->intf_start=&pci_intf_start; ++ padapter->intf_stop=&pci_intf_stop; ++ ++ if (padapter->dvobj_init == NULL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n")); ++ goto error; ++ } ++ ++ status = padapter->dvobj_init(padapter); ++ if (status != _SUCCESS) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); ++ goto error; ++ } ++ ++ pnetdev->irq = pdev->irq; ++ ++ //step 4. read efuse/eeprom data and get mac_addr ++ intf_read_chip_info(padapter); ++ ++ //step 5. ++ status = rtw_init_drv_sw(padapter); ++ if(status ==_FAIL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto error; ++ } ++ ++ status = padapter->HalFunc.inirp_init(padapter); ++ if(status ==_FAIL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize PCI desc ring Failed!\n")); ++ goto error; ++ } ++ ++ rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); ++ ++ _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ DBG_8192C("MAC Address from pnetdev->dev_addr= "MAC_FMT"\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ padapter->HalFunc.disable_interrupt(padapter); ++ ++#if defined(IRQF_SHARED) ++ err = request_irq(pdev->irq, &rtw_pci_interrupt, IRQF_SHARED, DRV_NAME, padapter); ++#else ++ err = request_irq(pdev->irq, &rtw_pci_interrupt, SA_SHIRQ, DRV_NAME, padapter); ++#endif ++ if (err) { ++ DBG_8192C("Error allocating IRQ %d",pdev->irq); ++ goto error; ++ } else { ++ pdvobjpriv->irq_alloc = 1; ++ DBG_8192C("Request_irq OK, IRQ %d\n",pdev->irq); ++ } ++ ++ //step 6. Init pci related configuration ++ rtw_pci_initialize_adapter_common(padapter); ++ ++ //step 7. ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); ++ goto error; ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n")); ++ //DBG_8192C("-871x_drv - drv_init, success!\n"); ++ ++#ifdef CONFIG_PROC_DEBUG ++#ifdef RTK_DMP_PLATFORM ++ rtw_proc_init_one(pnetdev); ++#endif ++#endif ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_init(padapter); ++#endif ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_8192C("wlan link up\n"); ++ rtd2885_wlan_netlink_sendMsg("linkup", "8712"); ++#endif ++ ++ return 0; ++ ++error: ++ ++ pci_set_drvdata(pdev, NULL); ++ ++ if (pdvobjpriv->irq_alloc) { ++ free_irq(pdev->irq, padapter); ++ pdvobjpriv->irq_alloc = 0; ++ } ++ ++ if (pdvobjpriv->pci_mem_start != 0) { ++ pci_iounmap(pdev, (void *)pdvobjpriv->pci_mem_start); ++ } ++ ++ pci_dvobj_deinit(padapter); ++ ++ if (pnetdev) ++ { ++ //unregister_netdev(pnetdev); ++ rtw_free_netdev(pnetdev); ++ } ++ ++fail2: ++ pci_release_regions(pdev); ++ ++fail1: ++ pci_disable_device(pdev); ++ ++ DBG_8192C("-871x_pci - drv_init, fail!\n"); ++ ++ return err; ++} ++ ++/* ++ * dev_remove() - our device is being removed ++*/ ++//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both ++static void rtw_dev_remove(struct pci_dev *pdev) ++{ ++ struct net_device *pnetdev=pci_get_drvdata(pdev); ++ _adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev); ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ ++_func_exit_; ++ ++ if (unlikely(!padapter)) { ++ return; ++ } ++ ++ DBG_8192C("+rtw_dev_remove\n"); ++ ++#if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(&padapter->pwrctrlpriv); ++#endif ++ ++ LeaveAllPowerSaveMode(padapter); ++ ++#ifdef RTK_DMP_PLATFORM ++ padapter->bSurpriseRemoved = _FALSE; // always trate as device exists ++ // this will let the driver to disable it's interrupt ++#else ++ if(drvpriv.drv_registered == _TRUE) ++ { ++ //DBG_8192C("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n"); ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ /*else ++ { ++ //DBG_8192C("r871xu_dev_remove():module removed\n"); ++ padapter->hw_init_completed = _FALSE; ++ }*/ ++#endif ++ ++ ++#ifdef CONFIG_AP_MODE ++ free_mlme_ap_info(padapter); ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_unload(padapter); ++#endif //CONFIG_HOSTAPD_MLME ++#endif //CONFIG_AP_MODE ++ ++ if(pnetdev){ ++ unregister_netdev(pnetdev); //will call netdev_close() ++#ifdef CONFIG_PROC_DEBUG ++ rtw_proc_remove_one(pnetdev); ++#endif ++ } ++ ++ rtw_cancel_all_timer(padapter); ++ ++ rtw_dev_unload(padapter); ++ ++ DBG_8192C("+r871xu_dev_remove, hw_init_completed=%d\n", padapter->hw_init_completed); ++ ++ if (pdvobjpriv->irq_alloc) { ++ free_irq(pdev->irq, padapter); ++ pdvobjpriv->irq_alloc = 0; ++ } ++ ++ if (pdvobjpriv->pci_mem_start != 0) { ++ pci_iounmap(pdev, (void *)pdvobjpriv->pci_mem_start); ++ pci_release_regions(pdev); ++ } ++ ++ pci_disable_device(pdev); ++ pci_set_drvdata(pdev, NULL); ++ ++ padapter->HalFunc.inirp_deinit(padapter); ++ //s6. ++ if(padapter->dvobj_deinit) ++ { ++ padapter->dvobj_deinit(padapter); ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n")); ++ } ++ ++ rtw_free_drv_sw(padapter); ++ ++ //after rtw_free_drv_sw(), padapter has beed freed, don't refer to it. ++ ++ DBG_8192C("-r871xu_dev_remove, done\n"); ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_8192C("wlan link down\n"); ++ rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); ++#endif ++ ++_func_exit_; ++ ++ return; ++ ++} ++ ++ ++static int __init rtw_drv_entry(void) ++{ ++ int ret = 0; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n")); ++ DBG_871X("rtw driver version=%s \n", DRIVERVERSION); ++ DBG_871X("Build at: %s %s\n", __DATE__, __TIME__); ++ drvpriv.drv_registered = _TRUE; ++ ret = pci_register_driver(&drvpriv.rtw_pci_drv); ++ if (ret) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, (": No device found\n")); ++ } ++ ++ return ret; ++} ++ ++static void __exit rtw_drv_halt(void) ++{ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n")); ++ DBG_8192C("+rtw_drv_halt\n"); ++ drvpriv.drv_registered = _FALSE; ++ pci_unregister_driver(&drvpriv.rtw_pci_drv); ++ DBG_8192C("-rtw_drv_halt\n"); ++} ++ ++ ++module_init(rtw_drv_entry); ++module_exit(rtw_drv_halt); ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/recv_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/recv_linux.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,462 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++#define _RECV_OSDEP_C_ ++ ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++#include ++ ++#ifdef CONFIG_USB_HCI ++#include ++#endif ++ ++//init os related resource in struct recv_priv ++int rtw_os_recv_resource_init(struct recv_priv *precvpriv, _adapter *padapter) ++{ ++ int res=_SUCCESS; ++ ++ return res; ++} ++ ++//alloc os related resource in union recv_frame ++int rtw_os_recv_resource_alloc(_adapter *padapter, union recv_frame *precvframe) ++{ ++ int res=_SUCCESS; ++ ++ precvframe->u.hdr.pkt_newalloc = precvframe->u.hdr.pkt = NULL; ++ ++ return res; ++ ++} ++ ++//free os related resource in union recv_frame ++void rtw_os_recv_resource_free(struct recv_priv *precvpriv) ++{ ++ ++} ++ ++ ++//alloc os related resource in struct recv_buf ++int rtw_os_recvbuf_resource_alloc(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ int res=_SUCCESS; ++ ++#ifdef CONFIG_USB_HCI ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ precvbuf->irp_pending = _FALSE; ++ precvbuf->purb = usb_alloc_urb(0, GFP_KERNEL); ++ if(precvbuf->purb == NULL){ ++ res = _FAIL; ++ } ++ ++ precvbuf->pskb = NULL; ++ ++ precvbuf->reuse = _FALSE; ++ ++ precvbuf->pallocated_buf = precvbuf->pbuf = NULL; ++ ++ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; ++ ++ precvbuf->transfer_len = 0; ++ ++ precvbuf->len = 0; ++ ++ #ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ precvbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)precvbuf->alloc_sz, GFP_ATOMIC, &precvbuf->dma_transfer_addr); ++ precvbuf->pbuf = precvbuf->pallocated_buf; ++ if(precvbuf->pallocated_buf == NULL) ++ return _FAIL; ++ #endif //CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++#endif //CONFIG_USB_HCI ++ ++ ++#ifdef CONFIG_SDIO_HCI ++ precvbuf->pskb = NULL; ++ ++ precvbuf->pallocated_buf = precvbuf->pbuf = NULL; ++ ++ precvbuf->pdata = precvbuf->phead = precvbuf->ptail = precvbuf->pend = NULL; ++ ++ precvbuf->len = 0; ++#endif ++ return res; ++ ++} ++ ++//free os related resource in struct recv_buf ++int rtw_os_recvbuf_resource_free(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ int ret = _SUCCESS; ++ ++#ifdef CONFIG_USB_HCI ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ rtw_usb_buffer_free(pusbd, (size_t)precvbuf->alloc_sz, precvbuf->pallocated_buf, precvbuf->dma_transfer_addr); ++ precvbuf->pallocated_buf = NULL; ++ precvbuf->dma_transfer_addr = 0; ++ ++#endif //CONFIG_USE_USB_BUFFER_ALLOC_RX ++ ++ if(precvbuf->purb) ++ { ++ //usb_kill_urb(precvbuf->purb); ++ usb_free_urb(precvbuf->purb); ++ } ++ ++#endif //CONFIG_USB_HCI ++ ++ ++ if(precvbuf->pskb) ++ dev_kfree_skb_any(precvbuf->pskb); ++ ++ ++ return ret; ++ ++} ++ ++void rtw_handle_tkip_mic_err(_adapter *padapter,u8 bgroup) ++{ ++#ifdef CONFIG_IOCTL_CFG80211 ++ enum nl80211_key_type key_type; ++#endif ++ union iwreq_data wrqu; ++ struct iw_michaelmicfailure ev; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ u32 cur_time = 0; ++ ++ if( psecuritypriv->last_mic_err_time == 0 ) ++ { ++ psecuritypriv->last_mic_err_time = rtw_get_current_time(); ++ } ++ else ++ { ++ cur_time = rtw_get_current_time(); ++ ++ if( cur_time - psecuritypriv->last_mic_err_time < 60*HZ ) ++ { ++ psecuritypriv->btkip_countermeasure = _TRUE; ++ psecuritypriv->last_mic_err_time = 0; ++ psecuritypriv->btkip_countermeasure_time = cur_time; ++ } ++ else ++ { ++ psecuritypriv->last_mic_err_time = rtw_get_current_time(); ++ } ++ } ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ if ( bgroup ) ++ { ++ key_type |= NL80211_KEYTYPE_GROUP; ++ } ++ else ++ { ++ key_type |= NL80211_KEYTYPE_PAIRWISE; ++ } ++ ++ cfg80211_michael_mic_failure(padapter->pnetdev, (u8 *)&pmlmepriv->assoc_bssid[ 0 ], key_type, -1, ++ NULL, GFP_ATOMIC); ++#endif ++ ++ _rtw_memset( &ev, 0x00, sizeof( ev ) ); ++ if ( bgroup ) ++ { ++ ev.flags |= IW_MICFAILURE_GROUP; ++ } ++ else ++ { ++ ev.flags |= IW_MICFAILURE_PAIRWISE; ++ } ++ ++ ev.src_addr.sa_family = ARPHRD_ETHER; ++ _rtw_memcpy( ev.src_addr.sa_data, &pmlmepriv->assoc_bssid[ 0 ], ETH_ALEN ); ++ ++ _rtw_memset( &wrqu, 0x00, sizeof( wrqu ) ); ++ wrqu.data.length = sizeof( ev ); ++ ++ wireless_send_event( padapter->pnetdev, IWEVMICHAELMICFAILURE, &wrqu, (char*) &ev ); ++} ++ ++void rtw_hostapd_mlme_rx(_adapter *padapter, union recv_frame *precv_frame) ++{ ++#ifdef CONFIG_HOSTAPD_MLME ++ _pkt *skb; ++ struct hostapd_priv *phostapdpriv = padapter->phostapdpriv; ++ struct net_device *pmgnt_netdev = phostapdpriv->pmgnt_netdev; ++ ++ RT_TRACE(_module_recv_osdep_c_, _drv_info_, ("+rtw_hostapd_mlme_rx\n")); ++ ++ skb = precv_frame->u.hdr.pkt; ++ ++ if (skb == NULL) ++ return; ++ ++ skb->data = precv_frame->u.hdr.rx_data; ++ skb->tail = precv_frame->u.hdr.rx_tail; ++ skb->len = precv_frame->u.hdr.len; ++ ++ //pskb_copy = skb_copy(skb, GFP_ATOMIC); ++// if(skb == NULL) goto _exit; ++ ++ skb->dev = pmgnt_netdev; ++ skb->ip_summed = CHECKSUM_NONE; ++ skb->pkt_type = PACKET_OTHERHOST; ++ //skb->protocol = __constant_htons(0x0019); /*ETH_P_80211_RAW*/ ++ skb->protocol = __constant_htons(0x0003); /*ETH_P_80211_RAW*/ ++ ++ //DBG_8192C("(1)data=0x%x, head=0x%x, tail=0x%x, mac_header=0x%x, len=%d\n", skb->data, skb->head, skb->tail, skb->mac_header, skb->len); ++ ++ //skb->mac.raw = skb->data; ++ skb_reset_mac_header(skb); ++ ++ //skb_pull(skb, 24); ++ _rtw_memset(skb->cb, 0, sizeof(skb->cb)); ++ ++ netif_rx(skb); ++ ++ precv_frame->u.hdr.pkt = NULL; // set pointer to NULL before rtw_free_recvframe() if call netif_rx() ++#endif ++} ++ ++int rtw_recv_indicatepkt(_adapter *padapter, union recv_frame *precv_frame) ++{ ++ struct recv_priv *precvpriv; ++ _queue *pfree_recv_queue; ++ _pkt *skb; ++ struct mlme_priv*pmlmepriv = &padapter->mlmepriv; ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++#endif ++ ++#ifdef CONFIG_BR_EXT ++ void *br_port = NULL; ++#endif ++ ++_func_enter_; ++ ++ precvpriv = &(padapter->recvpriv); ++ pfree_recv_queue = &(precvpriv->free_recv_queue); ++ ++#ifdef CONFIG_DRVEXT_MODULE ++ if (drvext_rx_handler(padapter, precv_frame->u.hdr.rx_data, precv_frame->u.hdr.len) == _SUCCESS) ++ { ++ goto _recv_indicatepkt_drop; ++ } ++#endif ++ ++ skb = precv_frame->u.hdr.pkt; ++ if(skb == NULL) ++ { ++ RT_TRACE(_module_recv_osdep_c_,_drv_err_,("rtw_recv_indicatepkt():skb==NULL something wrong!!!!\n")); ++ goto _recv_indicatepkt_drop; ++ } ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():skb != NULL !!!\n")); ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("rtw_recv_indicatepkt():precv_frame->u.hdr.rx_head=%p precv_frame->hdr.rx_data=%p\n", precv_frame->u.hdr.rx_head, precv_frame->u.hdr.rx_data)); ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("precv_frame->hdr.rx_tail=%p precv_frame->u.hdr.rx_end=%p precv_frame->hdr.len=%d \n", precv_frame->u.hdr.rx_tail, precv_frame->u.hdr.rx_end, precv_frame->u.hdr.len)); ++ ++ skb->data = precv_frame->u.hdr.rx_data; ++ ++#ifdef NET_SKBUFF_DATA_USES_OFFSET ++ skb_set_tail_pointer(skb, precv_frame->u.hdr.len); ++#else ++ skb->tail = precv_frame->u.hdr.rx_tail; ++#endif ++ ++ skb->len = precv_frame->u.hdr.len; ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n skb->head=%p skb->data=%p skb->tail=%p skb->end=%p skb->len=%d\n", skb->head, skb->data, skb->tail, skb->end, skb->len)); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ _pkt *pskb2=NULL; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct rx_pkt_attrib *pattrib = &precv_frame->u.hdr.attrib; ++ int bmcast = IS_MCAST(pattrib->dst); ++ ++ //DBG_871X("bmcast=%d\n", bmcast); ++ ++ if(_rtw_memcmp(pattrib->dst, myid(&padapter->eeprompriv), ETH_ALEN)==_FALSE) ++ { ++ //DBG_871X("not ap psta=%p, addr=%pM\n", psta, pattrib->dst); ++ ++ if(bmcast) ++ { ++ psta = rtw_get_bcmc_stainfo(padapter); ++ pskb2 = skb_clone(skb, GFP_ATOMIC); ++ } else { ++ psta = rtw_get_stainfo(pstapriv, pattrib->dst); ++ } ++ ++ if(psta) ++ { ++ //DBG_871X("directly forwarding to the rtw_xmit_entry\n"); ++ ++ //skb->ip_summed = CHECKSUM_NONE; ++ //skb->protocol = eth_type_trans(skb, pnetdev); ++ ++ skb->dev = padapter->pnetdev; ++ rtw_xmit_entry(skb, padapter->pnetdev); ++ ++ if(bmcast) ++ skb = pskb2; ++ else ++ goto _recv_indicatepkt_end; ++ } ++ ++ ++ } ++ else// to APself ++ { ++ //DBG_871X("to APSelf\n"); ++ } ++ } ++ ++ ++#ifdef CONFIG_BR_EXT ++ ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ br_port = padapter->pnetdev->br_port; ++#else // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ rcu_read_lock(); ++ br_port = rcu_dereference(padapter->pnetdev->rx_handler_data); ++ rcu_read_unlock(); ++#endif // (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 35)) ++ ++ if( br_port && (check_fwstate(pmlmepriv, WIFI_STATION_STATE|WIFI_ADHOC_STATE) == _TRUE) ) ++ { ++ int nat25_handle_frame(_adapter *priv, struct sk_buff *skb); ++ if (nat25_handle_frame(padapter, skb) == -1) { ++ //priv->ext_stats.rx_data_drops++; ++ //DEBUG_ERR("RX DROP: nat25_handle_frame fail!\n"); ++ //return FAIL; ++#if 1 ++ // bypass this frame to upper layer!! ++#else ++ goto _recv_indicatepkt_drop; ++#endif ++ } ++ } ++ ++#endif // CONFIG_BR_EXT ++ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_RX ++ if ( (pattrib->tcpchk_valid == 1) && (pattrib->tcp_chkrpt == 1) ) { ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ //DBG_8192C("CHECKSUM_UNNECESSARY \n"); ++ } else { ++ skb->ip_summed = CHECKSUM_NONE; ++ //DBG_8192C("CHECKSUM_NONE(%d, %d) \n", pattrib->tcpchk_valid, pattrib->tcp_chkrpt); ++ } ++#else /* !CONFIG_TCP_CSUM_OFFLOAD_RX */ ++ ++ skb->ip_summed = CHECKSUM_NONE; ++ ++#endif ++ ++ skb->dev = padapter->pnetdev; ++ skb->protocol = eth_type_trans(skb, padapter->pnetdev); ++ ++ netif_rx(skb); ++ ++_recv_indicatepkt_end: ++ ++ precv_frame->u.hdr.pkt = NULL; // pointers to NULL before rtw_free_recvframe() ++ ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ ++ RT_TRACE(_module_recv_osdep_c_,_drv_info_,("\n rtw_recv_indicatepkt :after netif_rx!!!!\n")); ++ ++_func_exit_; ++ ++ return _SUCCESS; ++ ++_recv_indicatepkt_drop: ++ ++ //enqueue back to free_recv_queue ++ if(precv_frame) ++ rtw_free_recvframe(precv_frame, pfree_recv_queue); ++ ++ ++ precvpriv->rx_drop++; ++ ++ return _FAIL; ++ ++_func_exit_; ++ ++} ++ ++void rtw_os_read_port(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ ++#ifdef CONFIG_USB_HCI ++ ++ precvbuf->ref_cnt--; ++ ++ //free skb in recv_buf ++ dev_kfree_skb_any(precvbuf->pskb); ++ ++ precvbuf->pskb = NULL; ++ precvbuf->reuse = _FALSE; ++ ++ if(precvbuf->irp_pending == _FALSE) ++ { ++ rtw_read_port(padapter, precvpriv->ff_hwaddr, 0, (unsigned char *)precvbuf); ++ } ++ ++ ++#endif ++#ifdef CONFIG_SDIO_HCI ++ precvbuf->pskb = NULL; ++#endif ++ ++} ++void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext); ++void _rtw_reordering_ctrl_timeout_handler (void *FunctionContext) ++{ ++ struct recv_reorder_ctrl *preorder_ctrl = (struct recv_reorder_ctrl *)FunctionContext; ++ rtw_reordering_ctrl_timeout_handler(preorder_ctrl); ++} ++ ++void rtw_init_recv_timer(struct recv_reorder_ctrl *preorder_ctrl) ++{ ++ _adapter *padapter = preorder_ctrl->padapter; ++ ++ _init_timer(&(preorder_ctrl->reordering_ctrl_timer), padapter->pnetdev, _rtw_reordering_ctrl_timeout_handler, preorder_ctrl); ++ ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/rtw_android.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/rtw_android.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,713 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++ ++#if defined(CONFIG_WIFI_CONTROL_FUNC) && 0 ++#include ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) ++#include ++#else ++#include ++#endif ++#endif /* CONFIG_WIFI_CONTROL_FUNC */ ++ ++const char *android_wifi_cmd_str[ANDROID_WIFI_CMD_MAX] = { ++ "START", ++ "STOP", ++ "SCAN-ACTIVE", ++ "SCAN-PASSIVE", ++ "RSSI", ++ "LINKSPEED", ++ "RXFILTER-START", ++ "RXFILTER-STOP", ++ "RXFILTER-ADD", ++ "RXFILTER-REMOVE", ++ "BTCOEXSCAN-START", ++ "BTCOEXSCAN-STOP", ++ "BTCOEXMODE", ++ "SETSUSPENDOPT", ++ "P2P_DEV_ADDR", ++ "SETFWPATH", ++ "SETBAND", ++ "GETBAND", ++ "COUNTRY", ++ "P2P_SET_NOA", ++ "P2P_GET_NOA", ++ "P2P_SET_PS", ++ "SET_AP_WPS_P2P_IE", ++#ifdef PNO_SUPPORT ++ "PNOSSIDCLR", ++ "PNOSETUP ", ++ "PNOFORCE", ++ "PNODEBUG", ++#endif ++ ++ "MACADDR", ++ ++ "BLOCK", ++ ++}; ++ ++#ifdef PNO_SUPPORT ++#define PNO_TLV_PREFIX 'S' ++#define PNO_TLV_VERSION '1' ++#define PNO_TLV_SUBVERSION '2' ++#define PNO_TLV_RESERVED '0' ++#define PNO_TLV_TYPE_SSID_IE 'S' ++#define PNO_TLV_TYPE_TIME 'T' ++#define PNO_TLV_FREQ_REPEAT 'R' ++#define PNO_TLV_FREQ_EXPO_MAX 'M' ++ ++typedef struct cmd_tlv { ++ char prefix; ++ char version; ++ char subver; ++ char reserved; ++} cmd_tlv_t; ++#endif /* PNO_SUPPORT */ ++ ++typedef struct android_wifi_priv_cmd { ++ char *buf; ++ int used_len; ++ int total_len; ++} android_wifi_priv_cmd; ++ ++ ++/** ++ * Local (static) functions and variables ++ */ ++ ++/* Initialize g_wifi_on to 1 so dhd_bus_start will be called for the first ++ * time (only) in dhd_open, subsequential wifi on will be handled by ++ * wl_android_wifi_on ++ */ ++static int g_wifi_on = _TRUE; ++ ++ ++#ifdef PNO_SUPPORT ++static int wl_android_set_pno_setup(struct net_device *dev, char *command, int total_len) ++{ ++ wlc_ssid_t ssids_local[MAX_PFN_LIST_COUNT]; ++ int res = -1; ++ int nssid = 0; ++ cmd_tlv_t *cmd_tlv_temp; ++ char *str_ptr; ++ int tlv_size_left; ++ int pno_time = 0; ++ int pno_repeat = 0; ++ int pno_freq_expo_max = 0; ++ ++#ifdef PNO_SET_DEBUG ++ int i; ++ char pno_in_example[] = { ++ 'P', 'N', 'O', 'S', 'E', 'T', 'U', 'P', ' ', ++ 'S', '1', '2', '0', ++ 'S', ++ 0x05, ++ 'd', 'l', 'i', 'n', 'k', ++ 'S', ++ 0x04, ++ 'G', 'O', 'O', 'G', ++ 'T', ++ '0', 'B', ++ 'R', ++ '2', ++ 'M', ++ '2', ++ 0x00 ++ }; ++#endif /* PNO_SET_DEBUG */ ++ ++ DHD_INFO(("%s: command=%s, len=%d\n", __FUNCTION__, command, total_len)); ++ ++ if (total_len < (strlen(CMD_PNOSETUP_SET) + sizeof(cmd_tlv_t))) { ++ DHD_ERROR(("%s argument=%d less min size\n", __FUNCTION__, total_len)); ++ goto exit_proc; ++ } ++ ++#ifdef PNO_SET_DEBUG ++ memcpy(command, pno_in_example, sizeof(pno_in_example)); ++ for (i = 0; i < sizeof(pno_in_example); i++) ++ printf("%02X ", command[i]); ++ printf("\n"); ++ total_len = sizeof(pno_in_example); ++#endif ++ ++ str_ptr = command + strlen(CMD_PNOSETUP_SET); ++ tlv_size_left = total_len - strlen(CMD_PNOSETUP_SET); ++ ++ cmd_tlv_temp = (cmd_tlv_t *)str_ptr; ++ memset(ssids_local, 0, sizeof(ssids_local)); ++ ++ if ((cmd_tlv_temp->prefix == PNO_TLV_PREFIX) && ++ (cmd_tlv_temp->version == PNO_TLV_VERSION) && ++ (cmd_tlv_temp->subver == PNO_TLV_SUBVERSION)) { ++ ++ str_ptr += sizeof(cmd_tlv_t); ++ tlv_size_left -= sizeof(cmd_tlv_t); ++ ++ if ((nssid = wl_iw_parse_ssid_list_tlv(&str_ptr, ssids_local, ++ MAX_PFN_LIST_COUNT, &tlv_size_left)) <= 0) { ++ DHD_ERROR(("SSID is not presented or corrupted ret=%d\n", nssid)); ++ goto exit_proc; ++ } else { ++ if ((str_ptr[0] != PNO_TLV_TYPE_TIME) || (tlv_size_left <= 1)) { ++ DHD_ERROR(("%s scan duration corrupted field size %d\n", ++ __FUNCTION__, tlv_size_left)); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_time = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s: pno_time=%d\n", __FUNCTION__, pno_time)); ++ ++ if (str_ptr[0] != 0) { ++ if ((str_ptr[0] != PNO_TLV_FREQ_REPEAT)) { ++ DHD_ERROR(("%s pno repeat : corrupted field\n", ++ __FUNCTION__)); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_repeat = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s :got pno_repeat=%d\n", __FUNCTION__, pno_repeat)); ++ if (str_ptr[0] != PNO_TLV_FREQ_EXPO_MAX) { ++ DHD_ERROR(("%s FREQ_EXPO_MAX corrupted field size\n", ++ __FUNCTION__)); ++ goto exit_proc; ++ } ++ str_ptr++; ++ pno_freq_expo_max = simple_strtoul(str_ptr, &str_ptr, 16); ++ DHD_INFO(("%s: pno_freq_expo_max=%d\n", ++ __FUNCTION__, pno_freq_expo_max)); ++ } ++ } ++ } else { ++ DHD_ERROR(("%s get wrong TLV command\n", __FUNCTION__)); ++ goto exit_proc; ++ } ++ ++ res = dhd_dev_pno_set(dev, ssids_local, nssid, pno_time, pno_repeat, pno_freq_expo_max); ++ ++exit_proc: ++ return res; ++} ++#endif /* PNO_SUPPORT */ ++ ++int rtw_android_cmdstr_to_num(char *cmdstr) ++{ ++ int cmd_num; ++ for(cmd_num=0 ; cmd_nummlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ int bytes_written = 0; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ bytes_written += snprintf(&command[bytes_written], total_len, "%s rssi %d", ++ pcur_network->network.Ssid.Ssid, padapter->recvpriv.rssi); ++ } ++ ++ return bytes_written; ++} ++ ++int rtw_android_get_link_speed(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(net); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct wlan_network *pcur_network = &pmlmepriv->cur_network; ++ int bytes_written = 0; ++ u16 link_speed = 0; ++ ++ link_speed = rtw_get_network_max_rate(padapter, &pcur_network->network); ++ bytes_written = snprintf(command, total_len, "LinkSpeed %d", link_speed); ++ ++ return bytes_written; ++} ++ ++int rtw_android_get_macaddr(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ int bytes_written = 0; ++ ++ bytes_written = snprintf(command, total_len, "Macaddr = "MAC_FMT, MAC_ARG(net->dev_addr)); ++ return bytes_written; ++} ++ ++int rtw_android_set_country(struct net_device *net, char *command, int total_len) ++{ ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *country_code = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_COUNTRY]) + 1; ++ int ret; ++ ++ ret = rtw_set_country(adapter, country_code); ++ ++ return (ret==_SUCCESS)?0:-1; ++} ++ ++int rtw_android_get_p2p_dev_addr(struct net_device *net, char *command, int total_len) ++{ ++ int ret; ++ int bytes_written = 0; ++ ++ //We use the same address as our HW MAC address ++ _rtw_memcpy(command, net->dev_addr, ETH_ALEN); ++ ++ bytes_written = ETH_ALEN; ++ return bytes_written; ++} ++ ++int rtw_android_set_block(struct net_device *net, char *command, int total_len) ++{ ++ int ret; ++ _adapter *adapter = (_adapter *)rtw_netdev_priv(net); ++ char *block_value = command + strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_BLOCK]) + 1; ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ wdev_to_priv(adapter->rtw_wdev)->block = (*block_value=='0')?_FALSE:_TRUE; ++ #endif ++ ++ return 0; ++} ++ ++int rtw_android_priv_cmd(struct net_device *net, struct ifreq *ifr, int cmd) ++{ ++ int ret = 0; ++ char *command = NULL; ++ int cmd_num; ++ int bytes_written = 0; ++ android_wifi_priv_cmd priv_cmd; ++ ++ rtw_lock_suspend(); ++ ++ if (!ifr->ifr_data) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ if (copy_from_user(&priv_cmd, ifr->ifr_data, sizeof(android_wifi_priv_cmd))) { ++ ret = -EFAULT; ++ goto exit; ++ } ++ command = kmalloc(priv_cmd.total_len, GFP_KERNEL); ++ if (!command) ++ { ++ DBG_871X("%s: failed to allocate memory\n", __FUNCTION__); ++ ret = -ENOMEM; ++ goto exit; ++ } ++ if (copy_from_user(command, priv_cmd.buf, priv_cmd.total_len)) { ++ ret = -EFAULT; ++ goto exit; ++ } ++ ++ DBG_871X("%s: Android private cmd \"%s\" on %s\n" ++ , __FUNCTION__, command, ifr->ifr_name); ++ ++ cmd_num = rtw_android_cmdstr_to_num(command); ++ ++ switch(cmd_num) { ++ case ANDROID_WIFI_CMD_START: ++ //bytes_written = wl_android_wifi_on(net); ++ goto response; ++ case ANDROID_WIFI_CMD_SETFWPATH: ++ goto response; ++ } ++ ++ if (!g_wifi_on) { ++ DBG_871X("%s: Ignore private cmd \"%s\" - iface %s is down\n" ++ ,__FUNCTION__, command, ifr->ifr_name); ++ ret = 0; ++ goto exit; ++ } ++ ++ switch(cmd_num) { ++ ++ case ANDROID_WIFI_CMD_STOP: ++ //bytes_written = wl_android_wifi_off(net); ++ break; ++ ++ case ANDROID_WIFI_CMD_SCAN_ACTIVE: ++ rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_ACTIVE); ++ break; ++ case ANDROID_WIFI_CMD_SCAN_PASSIVE: ++ rtw_set_scan_mode((_adapter *)rtw_netdev_priv(net), SCAN_PASSIVE); ++ break; ++ ++ case ANDROID_WIFI_CMD_RSSI: ++ bytes_written = rtw_android_get_rssi(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_LINKSPEED: ++ bytes_written = rtw_android_get_link_speed(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_MACADDR: ++ bytes_written = rtw_android_get_macaddr(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_BLOCK: ++ bytes_written = rtw_android_set_block(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_RXFILTER_START: ++ //bytes_written = net_os_set_packet_filter(net, 1); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_STOP: ++ //bytes_written = net_os_set_packet_filter(net, 0); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_ADD: ++ //int filter_num = *(command + strlen(CMD_RXFILTER_ADD) + 1) - '0'; ++ //bytes_written = net_os_rxfilter_add_remove(net, TRUE, filter_num); ++ break; ++ case ANDROID_WIFI_CMD_RXFILTER_REMOVE: ++ //int filter_num = *(command + strlen(CMD_RXFILTER_REMOVE) + 1) - '0'; ++ //bytes_written = net_os_rxfilter_add_remove(net, FALSE, filter_num); ++ break; ++ ++ case ANDROID_WIFI_CMD_BTCOEXSCAN_START: ++ /* TBD: BTCOEXSCAN-START */ ++ break; ++ case ANDROID_WIFI_CMD_BTCOEXSCAN_STOP: ++ /* TBD: BTCOEXSCAN-STOP */ ++ break; ++ case ANDROID_WIFI_CMD_BTCOEXMODE: ++ #if 0 ++ uint mode = *(command + strlen(CMD_BTCOEXMODE) + 1) - '0'; ++ if (mode == 1) ++ net_os_set_packet_filter(net, 0); /* DHCP starts */ ++ else ++ net_os_set_packet_filter(net, 1); /* DHCP ends */ ++#ifdef WL_CFG80211 ++ bytes_written = wl_cfg80211_set_btcoex_dhcp(net, command); ++#endif ++ #endif ++ break; ++ ++ case ANDROID_WIFI_CMD_SETSUSPENDOPT: ++ //bytes_written = wl_android_set_suspendopt(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_SETBAND: ++ //uint band = *(command + strlen(CMD_SETBAND) + 1) - '0'; ++ //bytes_written = wldev_set_band(net, band); ++ break; ++ case ANDROID_WIFI_CMD_GETBAND: ++ //bytes_written = wl_android_get_band(net, command, priv_cmd.total_len); ++ break; ++ ++ case ANDROID_WIFI_CMD_COUNTRY: ++ bytes_written = rtw_android_set_country(net, command, priv_cmd.total_len); ++ break; ++ ++#ifdef PNO_SUPPORT ++ case ANDROID_WIFI_CMD_PNOSSIDCLR_SET: ++ //bytes_written = dhd_dev_pno_reset(net); ++ break; ++ case ANDROID_WIFI_CMD_PNOSETUP_SET: ++ //bytes_written = wl_android_set_pno_setup(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_PNOENABLE_SET: ++ //uint pfn_enabled = *(command + strlen(CMD_PNOENABLE_SET) + 1) - '0'; ++ //bytes_written = dhd_dev_pno_enable(net, pfn_enabled); ++ break; ++#endif ++ ++ case ANDROID_WIFI_CMD_P2P_DEV_ADDR: ++ bytes_written = rtw_android_get_p2p_dev_addr(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_P2P_SET_NOA: ++ //int skip = strlen(CMD_P2P_SET_NOA) + 1; ++ //bytes_written = wl_cfg80211_set_p2p_noa(net, command + skip, priv_cmd.total_len - skip); ++ break; ++ case ANDROID_WIFI_CMD_P2P_GET_NOA: ++ //bytes_written = wl_cfg80211_get_p2p_noa(net, command, priv_cmd.total_len); ++ break; ++ case ANDROID_WIFI_CMD_P2P_SET_PS: ++ //int skip = strlen(CMD_P2P_SET_PS) + 1; ++ //bytes_written = wl_cfg80211_set_p2p_ps(net, command + skip, priv_cmd.total_len - skip); ++ break; ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ case ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE: ++ { ++ int skip = strlen(android_wifi_cmd_str[ANDROID_WIFI_CMD_SET_AP_WPS_P2P_IE]) + 3; ++ bytes_written = rtw_cfg80211_set_mgnt_wpsp2pie(net, command + skip, priv_cmd.total_len - skip, *(command + skip - 2) - '0'); ++ break; ++ } ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ default: ++ DBG_871X("Unknown PRIVATE command %s - ignored\n", command); ++ snprintf(command, 3, "OK"); ++ bytes_written = strlen("OK"); ++ } ++ ++response: ++ if (bytes_written >= 0) { ++ if ((bytes_written == 0) && (priv_cmd.total_len > 0)) ++ command[0] = '\0'; ++ if (bytes_written >= priv_cmd.total_len) { ++ DBG_871X("%s: bytes_written = %d\n", __FUNCTION__, bytes_written); ++ bytes_written = priv_cmd.total_len; ++ } else { ++ bytes_written++; ++ } ++ priv_cmd.used_len = bytes_written; ++ if (copy_to_user(priv_cmd.buf, command, bytes_written)) { ++ DBG_871X("%s: failed to copy data to user buffer\n", __FUNCTION__); ++ ret = -EFAULT; ++ } ++ } ++ else { ++ ret = bytes_written; ++ } ++ ++exit: ++ rtw_unlock_suspend(); ++ if (command) { ++ kfree(command); ++ } ++ ++ return ret; ++} ++ ++ ++/** ++ * Functions for Android WiFi card detection ++ */ ++#if defined(CONFIG_WIFI_CONTROL_FUNC) && 0 ++ ++static int g_wifidev_registered = 0; ++static struct semaphore wifi_control_sem; ++static struct wifi_platform_data *wifi_control_data = NULL; ++static struct resource *wifi_irqres = NULL; ++ ++static int wifi_add_dev(void); ++static void wifi_del_dev(void); ++ ++int wl_android_wifictrl_func_add(void) ++{ ++ int ret = 0; ++ sema_init(&wifi_control_sem, 0); ++ ++ ret = wifi_add_dev(); ++ if (ret) { ++ DHD_ERROR(("%s: platform_driver_register failed\n", __FUNCTION__)); ++ return ret; ++ } ++ g_wifidev_registered = 1; ++ ++ /* Waiting callback after platform_driver_register is done or exit with error */ ++ if (down_timeout(&wifi_control_sem, msecs_to_jiffies(1000)) != 0) { ++ ret = -EINVAL; ++ DHD_ERROR(("%s: platform_driver_register timeout\n", __FUNCTION__)); ++ } ++ ++ return ret; ++} ++ ++void wl_android_wifictrl_func_del(void) ++{ ++ if (g_wifidev_registered) ++ { ++ wifi_del_dev(); ++ g_wifidev_registered = 0; ++ } ++} ++ ++void *wl_android_prealloc(int section, unsigned long size) ++{ ++ void *alloc_ptr = NULL; ++ if (wifi_control_data && wifi_control_data->mem_prealloc) { ++ alloc_ptr = wifi_control_data->mem_prealloc(section, size); ++ if (alloc_ptr) { ++ DHD_INFO(("success alloc section %d\n", section)); ++ if (size != 0L) ++ bzero(alloc_ptr, size); ++ return alloc_ptr; ++ } ++ } ++ ++ DHD_ERROR(("can't alloc section %d\n", section)); ++ return NULL; ++} ++ ++int wifi_get_irq_number(unsigned long *irq_flags_ptr) ++{ ++ if (wifi_irqres) { ++ *irq_flags_ptr = wifi_irqres->flags & IRQF_TRIGGER_MASK; ++ return (int)wifi_irqres->start; ++ } ++#ifdef CUSTOM_OOB_GPIO_NUM ++ return CUSTOM_OOB_GPIO_NUM; ++#else ++ return -1; ++#endif ++} ++ ++int wifi_set_power(int on, unsigned long msec) ++{ ++ DHD_ERROR(("%s = %d\n", __FUNCTION__, on)); ++ if (wifi_control_data && wifi_control_data->set_power) { ++ wifi_control_data->set_power(on); ++ } ++ if (msec) ++ msleep(msec); ++ return 0; ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) ++int wifi_get_mac_addr(unsigned char *buf) ++{ ++ DHD_ERROR(("%s\n", __FUNCTION__)); ++ if (!buf) ++ return -EINVAL; ++ if (wifi_control_data && wifi_control_data->get_mac_addr) { ++ return wifi_control_data->get_mac_addr(buf); ++ } ++ return -EOPNOTSUPP; ++} ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35)) */ ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) ++void *wifi_get_country_code(char *ccode) ++{ ++ DHD_TRACE(("%s\n", __FUNCTION__)); ++ if (!ccode) ++ return NULL; ++ if (wifi_control_data && wifi_control_data->get_country_code) { ++ return wifi_control_data->get_country_code(ccode); ++ } ++ return NULL; ++} ++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 39)) */ ++ ++static int wifi_set_carddetect(int on) ++{ ++ DHD_ERROR(("%s = %d\n", __FUNCTION__, on)); ++ if (wifi_control_data && wifi_control_data->set_carddetect) { ++ wifi_control_data->set_carddetect(on); ++ } ++ return 0; ++} ++ ++static int wifi_probe(struct platform_device *pdev) ++{ ++ struct wifi_platform_data *wifi_ctrl = ++ (struct wifi_platform_data *)(pdev->dev.platform_data); ++ ++ DHD_ERROR(("## %s\n", __FUNCTION__)); ++ wifi_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "bcmdhd_wlan_irq"); ++ if (wifi_irqres == NULL) ++ wifi_irqres = platform_get_resource_byname(pdev, ++ IORESOURCE_IRQ, "bcm4329_wlan_irq"); ++ wifi_control_data = wifi_ctrl; ++ ++ wifi_set_power(1, 0); /* Power On */ ++ wifi_set_carddetect(1); /* CardDetect (0->1) */ ++ ++ up(&wifi_control_sem); ++ return 0; ++} ++ ++static int wifi_remove(struct platform_device *pdev) ++{ ++ struct wifi_platform_data *wifi_ctrl = ++ (struct wifi_platform_data *)(pdev->dev.platform_data); ++ ++ DHD_ERROR(("## %s\n", __FUNCTION__)); ++ wifi_control_data = wifi_ctrl; ++ ++ wifi_set_power(0, 0); /* Power Off */ ++ wifi_set_carddetect(0); /* CardDetect (1->0) */ ++ ++ up(&wifi_control_sem); ++ return 0; ++} ++ ++static int wifi_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ DHD_TRACE(("##> %s\n", __FUNCTION__)); ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) ++ bcmsdh_oob_intr_set(0); ++#endif ++ return 0; ++} ++ ++static int wifi_resume(struct platform_device *pdev) ++{ ++ DHD_TRACE(("##> %s\n", __FUNCTION__)); ++#if (LINUX_VERSION_CODE <= KERNEL_VERSION(2, 6, 39)) && defined(OOB_INTR_ONLY) ++ if (dhd_os_check_if_up(bcmsdh_get_drvdata())) ++ bcmsdh_oob_intr_set(1); ++#endif ++ return 0; ++} ++ ++static struct platform_driver wifi_device = { ++ .probe = wifi_probe, ++ .remove = wifi_remove, ++ .suspend = wifi_suspend, ++ .resume = wifi_resume, ++ .driver = { ++ .name = "bcmdhd_wlan", ++ } ++}; ++ ++static struct platform_driver wifi_device_legacy = { ++ .probe = wifi_probe, ++ .remove = wifi_remove, ++ .suspend = wifi_suspend, ++ .resume = wifi_resume, ++ .driver = { ++ .name = "bcm4329_wlan", ++ } ++}; ++ ++static int wifi_add_dev(void) ++{ ++ DHD_TRACE(("## Calling platform_driver_register\n")); ++ platform_driver_register(&wifi_device); ++ platform_driver_register(&wifi_device_legacy); ++ return 0; ++} ++ ++static void wifi_del_dev(void) ++{ ++ DHD_TRACE(("## Unregister platform_driver_register\n")); ++ platform_driver_unregister(&wifi_device); ++ platform_driver_unregister(&wifi_device_legacy); ++} ++#endif /* defined(CONFIG_WIFI_CONTROL_FUNC) */ ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/sdio_intf.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/sdio_intf.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,922 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _HCI_INTF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++extern u32 rtw_start_drv_threads(_adapter *padapter); ++extern void rtw_stop_drv_threads (_adapter *padapter); ++extern u8 rtw_init_drv_sw(_adapter *padapter); ++extern u8 rtw_free_drv_sw(_adapter *padapter); ++extern void rtw_cancel_all_timer(_adapter *padapter); ++extern struct net_device *rtw_init_netdev(_adapter *old_padapter); ++extern void update_recvframe_attrib_from_recvstat(struct rx_pkt_attrib ++*pattrib, struct recv_stat *prxstat); ++static const struct sdio_device_id sdio_ids[] = { ++ { SDIO_DEVICE(0x024c, 0x8712) }, ++// { SDIO_DEVICE_CLASS(SDIO_CLASS_WLAN) }, ++// { /* end: all zeroes */ }, ++}; ++ ++typedef struct _driver_priv{ ++ struct sdio_driver r871xs_drv; ++}drv_priv, *pdrv_priv; ++ ++void sd_sync_int_hdl(struct sdio_func *func); ++ ++extern unsigned int sd_dvobj_init(_adapter * padapter){ ++ ++ struct dvobj_priv *psddev=&padapter->dvobjpriv; ++ struct sdio_func *func=psddev->func; ++ int ret; ++ _func_enter_; ++ //_rtw_init_sema(&psddev->init_finish,0); ++ sdio_claim_host(func); ++ ret=sdio_enable_func(func); ++ if(ret){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("sd_dvobj_init: sdio_enable_func fail!!!!!\n")); ++ return _FAIL; ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("sd_dvobj_init: sdio_enable_func success!!!!!\n")); ++ padapter->EepromAddressSize = 6; ++ psddev->tx_block_mode=1; ++ psddev->rx_block_mode=1; ++ sdio_set_block_size(func, 512); ++ psddev->block_transfer_len=512; ++ psddev->blk_shiftbits=9; ++ ret=sdio_claim_irq(func,sd_sync_int_hdl); ++ sdio_release_host(func); ++ psddev->sdio_himr=0xff; ++ if(ret) ++ return _FAIL; ++ _func_exit_; ++ return _SUCCESS; ++} ++ ++extern void sd_dvobj_deinit(_adapter * padapter) ++{ ++ unsigned char data; ++ struct dvobj_priv *psddev=&padapter->dvobjpriv; ++ struct sdio_func *func=psddev->func; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+SDIO deinit\n")); ++ if(func !=0){ ++ sdio_claim_host(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in sd_dvobj_deinit():sdio_claim_host !\n")); ++// sdio_release_irq(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in sd_dvobj_deinit():sdio_release_irq !\n")); ++ sdio_disable_func(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in sd_dvobj_deinit():sdio_disable_func !\n")); ++ sdio_release_host(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in sd_dvobj_deinit():sdio_release_host !\n")); ++ ++ ++ } ++ return; ++} ++ ++uint sdbus_read_reg_int(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata) ++{ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ struct sdio_func *func = pdvobjpriv->func; ++ u8 *mem = NULL; ++ int status; ++ ++#ifdef CONFIG_IO_4B ++ u32 addr_org = addr, addr_offset = 0; ++ u32 cnt_org = cnt; ++#endif ++ ++_func_enter_; ++ ++#ifdef CONFIG_IO_4B ++ addr_offset = addr % 4; ++ if (addr_offset) { ++ addr = addr - addr_offset; ++ cnt = cnt + addr_offset; ++ } ++ if (cnt % 4) ++ cnt = ((cnt + 4) >> 2) << 2; ++#endif ++ ++ mem = rtw_malloc(cnt); ++ if (mem == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ++ ("SDIO_STATUS_NO_RESOURCES - memory alloc fail\n")); ++ return _FAIL; ++ } ++ ++ status = sdio_memcpy_fromio(func, mem, addr&0x1FFFF, cnt); ++ if (status) { ++ //error ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ++ ("sdbus_read_reg_int error 0x%x\n" ++ "***** Addr = %x *****\n" ++ "***** Length = %d *****\n", status, addr, cnt)); ++ status = _FAIL; ++ } else { ++#ifdef CONFIG_IO_4B ++ if (cnt != cnt_org) ++ _rtw_memcpy(pdata, mem + addr_offset, cnt_org); ++ else ++#endif ++ _rtw_memcpy(pdata, mem, cnt); ++ status = _SUCCESS; ++ } ++ ++ rtw_mfree(mem, cnt); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++void sdio_read_int(_adapter *padapter, u32 addr, u8 sz, void *pdata) ++{ ++ struct io_queue *pio_queue = (struct io_queue*)padapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ u32 ftaddr = 0, res; ++ ++_func_enter_; ++ ++// RT_TRACE(_module_hci_ops_c_,_drv_err_,("sdio_read_int\n")); ++ ++ if ((_cvrt2ftaddr(addr, &ftaddr)) == _SUCCESS) { ++ res = sdbus_read_reg_int(pintfpriv, ftaddr, sz, pdata); ++ if (res != _SUCCESS) { ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_read_int fail!!!\n")); ++ } ++ } else { ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, (" sdio_read_int address translate error!!!\n")); ++ } ++ ++_func_exit_; ++} ++ ++uint sdbus_write_reg_int(struct intf_priv *pintfpriv, u32 addr, u32 cnt, void *pdata) ++{ ++ struct dvobj_priv *pdvobjpriv = (struct dvobj_priv*)pintfpriv->intf_dev; ++ struct sdio_func *func = pdvobjpriv->func; ++ int status; ++#ifdef CONFIG_IO_4B ++ u32 addr_org = addr, addr_offset = 0; ++ u32 cnt_org = cnt; ++ void *pdata_org = pdata; ++#endif ++ ++_func_enter_; ++ ++#ifdef CONFIG_IO_4B ++ addr_offset = addr % 4; ++ if (addr_offset) { ++ addr = addr - addr_offset; ++ cnt = cnt + addr_offset; ++ } ++ if (cnt % 4) ++ cnt = ((cnt + 4) >> 2) << 2; ++ if (cnt != cnt_org) { ++ pdata = rtw_malloc(cnt); ++ if (pdata == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ++ ("SDIO_STATUS_NO_RESOURCES - rtw_malloc fail\n")); ++ return _FAIL; ++ } ++ status = sdio_memcpy_fromio(func, pdata, addr&0x1FFFF, cnt); ++ if (status) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_emerg_, ++ ("sdbus_write_reg_int read failed 0x%x\n " ++ "***** Addr = %x *****\n" ++ "***** Length = %d *****\n", status, addr, cnt)); ++ rtw_mfree(pdata, cnt); ++ return _FAIL; ++ } ++ _rtw_memcpy(pdata + addr_offset, pdata_org, cnt_org); ++ /* if data been modify between this read and write, may cause a problem */ ++ } ++#endif ++ status = sdio_memcpy_toio(func, addr&0x1FFFF, pdata, cnt); ++ if (status) { ++ //error ++ RT_TRACE(_module_hci_ops_os_c_, _drv_emerg_, ++ ("sdbus_write_reg_int failed 0x%x\n" ++ "***** Addr = %x *****\n" ++ "***** Length = %d *****\n", status, addr, cnt)); ++ ++ status = _FAIL; ++ } else ++ status = _SUCCESS; ++ ++#ifdef CONFIG_IO_4B ++ if (cnt != cnt_org) ++ rtw_mfree(pdata, cnt); ++#endif ++ ++_func_exit_; ++ ++ return status; ++} ++ ++void sdio_write_int(_adapter *padapter, u32 addr, u32 val, u8 sz) ++{ ++ struct io_queue *pio_queue = (struct io_queue*)padapter->pio_queue; ++ struct intf_hdl *pintfhdl = &pio_queue->intf; ++ struct intf_priv *pintfpriv = pintfhdl->pintfpriv; ++ ++ u32 ftaddr = 0, res; ++ ++_func_enter_; ++ ++// RT_TRACE(_module_hci_ops_c_,_drv_err_,("sdio_write_int\n")); ++ ++ val = cpu_to_le32(val); ++ ++ if ((_cvrt2ftaddr(addr, &ftaddr)) == _SUCCESS) { ++ res = sdbus_write_reg_int(pintfpriv, ftaddr, sz, &val); ++ if (res != _SUCCESS) { ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_write_int fail!!!\n")); ++ } ++ } else { ++ RT_TRACE(_module_hci_ops_c_, _drv_emerg_, ("sdio_write_int address translate error!!!\n")); ++ } ++ ++_func_exit_; ++} ++ ++int recvbuf2recvframe_s(_adapter *padapter, struct recv_buf *precvbuf) ++{ ++// _irqL irql; ++ u8 *pbuf; ++// u8 bsumbit = _FALSE; ++ uint pkt_len, pkt_offset; ++ int transfer_len; ++ struct recv_stat *prxstat; ++ u16 pkt_cnt, drvinfo_sz; ++ _queue *pfree_recv_queue; ++ union recv_frame *precvframe = NULL,*plast_recvframe = NULL; ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++// struct intf_hdl *pintfhdl = &padapter->pio_queue->intf; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("+recvbuf2recvframe()\n")); ++ ++ pfree_recv_queue = &(precvpriv->free_recv_queue); ++ ++ pbuf = (u8*)precvbuf->pbuf; ++ ++ prxstat = (struct recv_stat *)pbuf; ++/* { ++ u8 i; ++ DBG_8192C("\n-----recvbuf-----\n"); ++ for (i=0;i<64;i=i+8) { ++ DBG_8192C("0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x\n",pbuf[i],pbuf[i+1],pbuf[i+2],pbuf[i+3],pbuf[i+4],pbuf[i+5],pbuf[i+6],pbuf[i+7]); ++ } ++ DBG_8192C("\n-----recvbuf end-----\n"); ++ }*/ ++ transfer_len = precvbuf->len; ++ precvbuf->ref_cnt = 1; ++ do { ++ precvframe = NULL; ++ precvframe = rtw_alloc_recvframe(pfree_recv_queue); ++ if (precvframe == NULL){ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_err_,("recvbuf2recvframe(), precvframe==NULL\n")); ++ break; ++ } ++ if (plast_recvframe != NULL) { ++ if (rtw_recv_entry(plast_recvframe) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe(), rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ prxstat = (struct recv_stat*)pbuf; ++ pkt_len = le32_to_cpu(prxstat->rxdw0&0x00003fff); //pkt_len = prxstat->frame_length; ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("rxdesc: offsset0:0x%08x, offsset4:0x%08x, offsset8:0x%08x, offssetc:0x%08x\n",prxstat->rxdw0, prxstat->rxdw1, prxstat->rxdw2, prxstat->rxdw4)); ++ ++ drvinfo_sz = le16_to_cpu((prxstat->rxdw0&0x000f0000)>>16);//uint 2^3 = 8 bytes ++ drvinfo_sz = drvinfo_sz << 3; ++ RT_TRACE(_module_rtl871x_recv_c_, _drv_info_, ("pkt_len=%d[0x%x] drvinfo_sz=%d[0x%x]\n", pkt_len, pkt_len, drvinfo_sz, drvinfo_sz)); ++ precvframe->u.hdr.precvbuf = precvbuf; ++ precvframe->u.hdr.adapter = padapter; ++ rtw_init_recvframe(precvframe, precvpriv); ++ ++ precvframe->u.hdr.rx_head = precvframe->u.hdr.rx_data = precvframe->u.hdr.rx_tail = pbuf; ++ precvframe->u.hdr.rx_end = precvbuf->pend; ++ update_recvframe_attrib_from_recvstat(&precvframe->u.hdr.attrib, prxstat); ++ pkt_offset = pkt_len + drvinfo_sz + RXDESC_SIZE; ++ ++ recvframe_put(precvframe, pkt_len + drvinfo_sz + RXDESC_SIZE); ++ recvframe_pull(precvframe, drvinfo_sz + RXDESC_SIZE); ++/* { ++ u8 i; ++ DBG_8192C("\n-----packet-----\n"); ++ for(i=0;i<32;i++){ ++ DBG_8192C("0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x:0x%.2x\n",precvframe->u.hdr.rx_data[i],precvframe->u.hdr.rx_data[i+1],precvframe->u.hdr.rx_data[i+2],precvframe->u.hdr.rx_data[i+3],precvframe->u.hdr.rx_data[i+4],precvframe->u.hdr.rx_data[i+5],precvframe->u.hdr.rx_data[i+6],precvframe->u.hdr.rx_data[i+7]); ++ } ++ DBG_8192C("\n-----packet end-----\n"); ++ }*/ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n precvframe->u.hdr.rx_head=%p precvframe->u.hdr.rx_data=%p precvframe->u.hdr.rx_tail=%p precvframe->u.hdr.rx_end=%p\n",precvframe->u.hdr.rx_head,precvframe->u.hdr.rx_data,precvframe->u.hdr.rx_tail,precvframe->u.hdr.rx_end)); ++ ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\npkt_offset=%d [1]\n",pkt_offset)); ++ pkt_offset = _RND512(pkt_offset); ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\npkt_offset=%d [2] transfer_len=%d\n",pkt_offset,transfer_len)); ++ transfer_len -= pkt_offset; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n transfer_len=%d \n",transfer_len)); ++ pbuf += pkt_offset; ++ if (transfer_len > 0) ++ precvbuf->ref_cnt++; ++ plast_recvframe = precvframe; ++ precvframe = NULL; ++ } while (transfer_len > 0); ++ ++ if (plast_recvframe != NULL) { ++ if (rtw_recv_entry(plast_recvframe) != _SUCCESS) { ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("recvbuf2recvframe(), rtw_recv_entry(precvframe) != _SUCCESS\n")); ++ } ++ } ++ ++ dev_kfree_skb_any(precvbuf->pskb); ++ precvbuf->pskb = NULL; ++ return _SUCCESS; ++} ++ ++u32 read_pkt2recvbuf(PADAPTER padapter, u32 rd_cnt, struct recv_buf *precvbuf) ++{ ++ struct recv_priv *precvpriv = &padapter->recvpriv; ++ u32 skb_buf_sz; ++ if (rd_cnt < 1600) ++ skb_buf_sz = 1600; ++ else ++ skb_buf_sz = rd_cnt; ++ RT_TRACE(_module_rtl871x_recv_c_,_drv_info_,("\n read_pkt2recvbuf------skb_buf_sz=%d rd_cnt=%d\n",skb_buf_sz,rd_cnt)); ++// if (precvbuf->pskb != NULL) { ++// dev_kfree_skb_any(precvbuf->pskb ); ++// } ++ ++ //alloc skb ++ { ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)) // http://www.mail-archive.com/netdev@vger.kernel.org/msg17214.html ++ precvbuf->pskb = dev_alloc_skb(skb_buf_sz); ++#else ++ precvbuf->pskb = netdev_alloc_skb(padapter->pnetdev, skb_buf_sz); ++#endif ++ if (precvbuf->pskb == NULL) { ++ RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("==================init_recvbuf(): alloc_skb fail!\n")); ++ return _FAIL; ++ } ++ ++ precvbuf->phead = precvbuf->pskb->head; ++ precvbuf->pdata = precvbuf->pskb->data; ++ precvbuf->ptail = precvbuf->pskb->tail; ++ precvbuf->pend = precvbuf->pskb->end; ++ precvbuf->pbuf = precvbuf->pskb->data; ++ } ++// else { ++// RT_TRACE(_module_hci_ops_os_c_,_drv_err_,("after init_recvbuf(): skb !=NULL!\n")); ++// } ++ ++ rtw_read_port(padapter, RTL8712_DMA_RX0FF, rd_cnt, (u8*)precvbuf); ++ precvbuf->ptail = precvbuf->ptail + rd_cnt; ++ precvbuf->len = rd_cnt; ++ /*{ ++ u32 i; ++ DBG_8192C("-----After read port[%d]-----\n",skb_buf_sz); ++ for (i = 0; i < skb_buf_sz; i = i + 8) { ++ DBG_8192C("0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x\n",precvbuf->pbuf[i],precvbuf->pbuf[i+1],precvbuf->pbuf[i+2],precvbuf->pbuf[i+3],precvbuf->pbuf[i+4],precvbuf->pbuf[i+5],precvbuf->pbuf[i+6],precvbuf->pbuf[i+7]); ++ } ++ ++ DBG_8192C("-----------\n"); ++ }*/ ++#if 1 ++ recvbuf2recvframe_s(padapter, precvbuf); ++#else ++{ ++ dev_kfree_skb_any(precvbuf->pskb); ++ precvbuf->pskb = NULL; ++ rtw_list_delete(&(precvbuf->list)); ++ rtw_list_insert_tail(&precvbuf->list, get_list_head(&precvpriv->free_recv_buf_queue)); ++ precvpriv->free_recv_buf_queue_cnt++; ++} ++#endif ++ ++ return _SUCCESS; ++} ++ ++void sd_recv_rxfifo(PADAPTER padapter); ++#if 0 ++void sd_recv_rxfifo(PADAPTER padapter) ++{ ++// u8 *pdata, *ptail, *pfixed_tail,*pfixed_head,*pfixed_end,blk_shift_bit; ++ u16 rx_blknum; ++ u32 blk_sz, cnt;//,remain,tmp_cnt; ++ struct recv_priv *precvpriv; ++// struct recv_stat *prxstat; ++ //union recv_frame *precvframe, *ppreframe = NULL; ++// _queue *pfree_recv_queue, *ppending_recv_queue; ++// u8 tmp[2048]; ++ struct recv_buf *precvbuf; ++ _list *precvbuf_head, *precvbuf_list; ++ _irqL irql, rx_proc_irq; ++// uint pkt_len; ++// u16 drvinfo_sz; ++ ++ precvpriv = &padapter->recvpriv; ++ blk_sz = padapter->dvobjpriv.block_transfer_len; ++// blk_shift_bit= (u8)padapter->dvobjpriv.blk_shiftbits; ++// pfree_recv_queue = &(precvpriv->free_recv_queue); ++// ppending_recv_queue = &(precvpriv->recv_pending_queue); ++ ++ rx_blknum = padapter->dvobjpriv.rxblknum; ++// _enter_hwio_critical(&padapter->dvobjpriv.rx_protect, &rx_proc_irq); ++// padapter->dvobjpriv.rxblknum=rtw_read16(padapter, SDIO_RX0_RDYBLK_NUM); ++ sdio_read_int(padapter, SDIO_RX0_RDYBLK_NUM, 2, &padapter->dvobjpriv.rxblknum); ++ if (rx_blknum>padapter->dvobjpriv.rxblknum) { ++ cnt = (0x10000 - rx_blknum + padapter->dvobjpriv.rxblknum) * blk_sz; ++ } else { ++ cnt = (padapter->dvobjpriv.rxblknum-rx_blknum) * blk_sz; ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=====================sd_recv_rxfifo padapter->dvobjpriv.rxblknum=%x Blk_Num = %x cnt=%d",padapter->dvobjpriv.rxblknum, rx_blknum,cnt)); ++ ++ if (cnt == 0) { ++// remain = 0; ++ precvbuf = NULL; ++ RT_TRACE(_module_hci_intfs_c_,_drv_info_,("---===============sd_recv_rxfifo padapter->dvobjpriv.rxblknum=0x%x padapter->dvobjpriv.rxblknum_rd=0x%x", padapter->dvobjpriv.rxblknum,padapter->dvobjpriv.rxblknum_rd)); ++ goto drop_pkt; ++ } ++ ++ if(_rtw_queue_empty(&precvpriv->free_recv_buf_queue) == _TRUE) ++ { ++ precvbuf = NULL; ++ RT_TRACE(_module_hci_intfs_c_,_drv_emerg_,("\n sd_recv_rxfifo : precvbuf= NULL precvpriv->free_recv_buf_queue_cnt=%d \n",precvpriv->free_recv_buf_queue_cnt)); ++ goto drop_pkt; ++ } ++ else ++ { ++ _enter_critical(&precvpriv->free_recv_buf_queue.lock, &irql); ++ precvbuf_head = get_list_head(&precvpriv->free_recv_buf_queue); ++ precvbuf_list = get_next(precvbuf_head); ++ precvbuf = LIST_CONTAINOR(precvbuf_list, struct recv_buf, list); ++ rtw_list_delete(&precvbuf->list); ++ precvpriv->free_recv_buf_queue_cnt--; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("\n sd_recv_rxfifo : precvbuf= 0x%p dequeue: free_recv_buf_queue_cnt=%d\n",precvbuf,precvpriv->free_recv_buf_queue_cnt)); ++ _exit_critical(&precvpriv->free_recv_buf_queue.lock, &irql); ++ } ++ read_pkt2recvbuf(padapter, cnt, precvbuf); ++ ++ return; ++ ++drop_pkt: ++ ++ if (cnt >0) { ++ do{ ++ if (cnt > MAX_RECVBUF_SZ) { ++ rtw_read_port(padapter, 0x10380000, MAX_RECVBUF_SZ, (u8 *)precvpriv->recvbuf_drop); ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=========sd_recv_rxfifo precvbuf= NULL no recvbuf cnt=%d tmp read %d",cnt,MAX_RECVBUF_SZ)); ++ cnt=cnt-MAX_RECVBUF_SZ; ++ } else { ++ rtw_read_port(padapter, 0x10380000, cnt, (u8 *)precvpriv->recvbuf_drop); ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("=========sd_recv_rxfifo precvbuf= NULL no recvbuf cnt=%d tmp read(@) %d",cnt,cnt)); ++ cnt=0; ++ } ++ } while(cnt > 0); ++ } ++ ++ return; ++} ++#endif ++#if 0 ++void sd_c2h_hdl(PADAPTER padapter) ++{ ++ u8 cmd_seq, pkt_num = 0; ++ u16 tmp16, sz, cmd_len = 0; ++ u32 rd_sz=0, cmd_sz = 0;//,ptr; ++ struct evt_priv *pevtpriv = &padapter->evtpriv; ++ pkt_num = rtw_read8(padapter, 0x102500BF); ++// RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:pkt_num=%d",pkt_num)); ++get_next: ++// ptr=rtw_read32(padapter,0x102500e8); ++// RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:C2H fifo RDPTR=0x%x",ptr)); ++// ptr=rtw_read32(padapter,0x102500ec); ++// RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:C2H fifo WTPTR=0x%x",ptr)); ++// if(pkt_num==0x0 ){ ++// RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:cmd_pkt num=0x%x!",pkt_num)); ++// return; ++// } ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@ sd_c2h_hdl:pkt_num=%d",pkt_num)); ++ //memset(pevtpriv->c2h_mem,0,512); ++ rtw_read_port(padapter, RTL8712_DMA_C2HCMD, 512, pevtpriv->c2h_mem); ++ cmd_sz = *(u16 *)&pevtpriv->c2h_mem[0]; ++ cmd_sz &= 0x3fff; ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: cmd_sz=%d[0x%x]!",cmd_sz,cmd_sz)); ++ tmp16 = *(u16 *)&pevtpriv->c2h_mem[4]; ++ tmp16 &= 0x01ff; ++ if (tmp16 !=0x1ff) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: 0x1ff error[0x%x]!",pevtpriv->c2h_mem[4])); ++ goto exit; ++ } ++ if((cmd_sz+24) >512){ ++ rtw_read_port(padapter, RTL8712_DMA_C2HCMD, (cmd_sz+24-512), pevtpriv->c2h_mem+512); ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: read the second part of c2h event!")); ++ } ++ cmd_seq = pevtpriv->c2h_mem[27]; ++ cmd_seq &= 0x7f; ++ if (pevtpriv->event_seq != cmd_seq) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: pevtpriv->event_seq (%d) != c2hbuf seq(%d)",pevtpriv->event_seq,cmd_seq)); ++ } else { ++ RT_TRACE(_module_hci_intfs_c_, _drv_notice_, ("sd_c2h_hdl: pevtpriv->event_seq (%d) == c2hbuf seq(%d)",pevtpriv->event_seq,cmd_seq)); ++ } ++ cmd_len = *(u16 *)&pevtpriv->c2h_mem[0]; ++ cmd_len &= 0x3ff; ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("@sd_c2h_hdl: cmd_len=%d",cmd_len)); ++// if(cmd_len){ ++// memset(pevtpriv->c2h_mem+cmd_len,0,cmd_len); ++// rtw_read_port(padapter, RTL8712_DMA_C2HCMD, cmd_len, pevtpriv->c2h_mem+cmd_len); ++// } ++// pevtpriv->event_seq=pevtpriv->event_seq++; ++// if(pevtpriv->event_seq>127) ++// pevtpriv->event_seq=0; ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl:!")); ++ rxcmd_event_hdl(padapter,pevtpriv->c2h_mem); ++ if (pkt_num > 1) { ++ pkt_num--; ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("sd_c2h_hdl: pkt_num=%d",pkt_num)); ++ goto get_next; ++ } ++ ++exit: ++ ++ return; ++} ++#endif ++void update_free_ffsz_int(_adapter *padapter ) ++{ ++ struct xmit_priv *pxmitpriv=&padapter->xmitpriv; ++ RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(before)=padapter->xmitpriv.public_pgsz=0x%x====update_free_ffsz: free_pg=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ padapter->xmitpriv.public_pgsz, ++ pxmitpriv->free_pg[0],pxmitpriv->free_pg[1],pxmitpriv->free_pg[2],pxmitpriv->free_pg[3], ++ pxmitpriv->free_pg[4],pxmitpriv->free_pg[5],pxmitpriv->free_pg[6],pxmitpriv->free_pg[7])); ++// rtw_read_mem(padapter,SDIO_BCNQ_FREEPG,8,pxmitpriv->free_pg); ++ sdio_read_int(padapter, SDIO_BCNQ_FREEPG, 8, pxmitpriv->free_pg); ++ padapter->xmitpriv.public_pgsz = pxmitpriv->free_pg[0]; ++ if (pxmitpriv->public_pgsz > pxmitpriv->init_pgsz) { ++ pxmitpriv->init_pgsz = pxmitpriv->public_pgsz; ++ } ++ ++ { ++ u8 diff; ++ if (pxmitpriv->public_pgsz > (pxmitpriv->init_pgsz - pxmitpriv->used_pgsz)) { ++ RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(0)=====update_free_ffsz: pxmitpriv->public_pgsz=0x%x pxmitpriv->init_pgsz=0x%x pxmitpriv->used_pgsz=0x%x \n",pxmitpriv->public_pgsz ,pxmitpriv->init_pgsz, pxmitpriv->used_pgsz)); ++ diff = pxmitpriv->public_pgsz - (pxmitpriv->init_pgsz - pxmitpriv->used_pgsz); ++ pxmitpriv->used_pgsz = pxmitpriv->used_pgsz - diff; ++// pxmitpriv->required_pgsz = pxmitpriv->required_pgsz - diff; ++ RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(1)=====update_free_ffsz: pxmitpriv->public_pgsz =0x%x diff=0x%x pxmitpriv->used_pgsz=0x%x pxmitpriv->required_pgsz=0x%x\n",pxmitpriv->public_pgsz,diff,pxmitpriv->used_pgsz,pxmitpriv->required_pgsz) ); ++ } else { ++ ++ } ++ } ++ ++ RT_TRACE(_module_hci_ops_c_,_drv_err_,("\n====(after)=====update_free_ffsz: free_pg=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x:0x%x \n", ++ pxmitpriv->free_pg[0],pxmitpriv->free_pg[1],pxmitpriv->free_pg[2],pxmitpriv->free_pg[3], ++ pxmitpriv->free_pg[4],pxmitpriv->free_pg[5],pxmitpriv->free_pg[6],pxmitpriv->free_pg[7])); ++ ++ return; ++} ++ ++void sd_int_dpc(PADAPTER padapter); ++#if 0 ++void sd_int_dpc(PADAPTER padapter) ++{ ++ uint tasks= (padapter->IsrContent /*& padapter->ImrContent*/); ++// rtw_write16(padapter,SDIO_HIMR,0); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,(" sd_int_dpc[0x%x] ",padapter->IsrContent)); ++ ++ if ((tasks & _VOQ_AVAL_IND) || (tasks & _VIQ_AVAL_IND) || (tasks & _BEQ_AVAL_IND) || (tasks & _BKQ_AVAL_IND) || (tasks & _BMCQ_AVAL_IND)) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============INT : _TXDONE")); ++ update_free_ffsz_int(padapter); ++ } else { ++ if (((padapter->xmitpriv.init_pgsz - padapter->xmitpriv.used_pgsz) > 0 && (padapter->xmitpriv.init_pgsz - padapter->xmitpriv.used_pgsz) < 0x2f) || padapter->xmitpriv.required_pgsz > 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============padapter->xmitpriv.public_pgsz[0x%x] <30 ",padapter->xmitpriv.public_pgsz)); ++ update_free_ffsz_int(padapter); ++ } ++ } ++ ++ if(tasks & _C2HCMD) ++ { ++// RT_TRACE(_module_hci_intfs_c_,_drv_err_,("======C2H_CMD========")); ++ padapter->IsrContent ^= _C2HCMD; ++ sd_c2h_hdl(padapter); ++// RT_TRACE(_module_hci_intfs_c_,_drv_err_,("======C2H_CMD[end]========")); ++ } ++ ++ if(tasks & _RXDONE) ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("==============INT : _RXDONE")); ++ padapter->IsrContent ^= _RXDONE; ++ sd_recv_rxfifo(padapter); ++ } ++ ++} ++#endif ++void sd_sync_int_hdl(struct sdio_func *func) ++{ ++ struct dvobj_priv *psdpriv = sdio_get_drvdata(func); ++ _adapter *padapter = (_adapter*)psdpriv->padapter; ++ u16 tmp16; ++// uint tasks; ++ ++_func_enter_; ++ ++ if ((padapter->bDriverStopped ==_TRUE) || (padapter->bSurpriseRemoved == _TRUE)) { ++ goto exit; ++ } ++ ++ //padapter->IsrContent=rtw_read16(padapter, SDIO_HISR); ++ sdio_read_int(padapter, SDIO_HISR, 2, &psdpriv->sdio_hisr); ++ ++ if (psdpriv->sdio_hisr & psdpriv->sdio_himr) ++ { ++ sdio_write_int(padapter, SDIO_HIMR, 0, 2); ++ sd_int_dpc(padapter); ++ sdio_write_int(padapter, SDIO_HIMR, psdpriv->sdio_himr, 2); ++ ++ sdio_read_int(padapter, SDIO_HIMR, 2, &tmp16); ++ if (tmp16 != psdpriv->sdio_himr) ++ sdio_write_int(padapter, SDIO_HIMR, psdpriv->sdio_himr, 2); ++ } else { ++ RT_TRACE(_module_hci_intfs_c_, _drv_info_, ("<=========== sd_sync_int_hdl(): not our INT")); ++ } ++exit: ++ ++_func_exit_; ++ ++ return; ++} ++ ++static int r871xs_drv_init(struct sdio_func *func, const struct sdio_device_id *id) ++{ ++ _adapter *padapter = NULL; ++ struct dvobj_priv *pdvobjpriv; ++ struct net_device *pnetdev; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_alert_,("+871x - drv_init:id=0x%p func->vendor=0x%x func->device=0x%x\n",id,func->vendor,func->device)); ++ ++ //step 1. ++ pnetdev = rtw_init_netdev(NULL); ++ if (!pnetdev) ++ goto error; ++ ++ padapter = rtw_netdev_priv(pnetdev); ++ pdvobjpriv = &padapter->dvobjpriv; ++ pdvobjpriv->padapter = padapter; ++ pdvobjpriv->func = func; ++ sdio_set_drvdata(func, pdvobjpriv); ++ SET_NETDEV_DEV(pnetdev, &func->dev); ++ ++ ++ //step 2. ++ if (alloc_io_queue(padapter) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Can't init io_reqs\n")); ++ goto error; ++ } ++ ++ ++#if 0 //temp remove ++ //step 3. ++ if (loadparam(padapter, pnetdev) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Read Parameter Failed!\n")); ++ goto error; ++ } ++#endif ++ ++ //step 4. ++ //dvobj_init(padapter); ++ padapter->dvobj_init = &sd_dvobj_init; ++ padapter->dvobj_deinit = &sd_dvobj_deinit; ++ padapter->halpriv.hal_bus_init = &sd_hal_bus_init; ++ padapter->halpriv.hal_bus_deinit = &sd_hal_bus_deinit; ++ ++ if (padapter->dvobj_init == NULL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n")); ++ goto error; ++ } ++ ++ if (padapter->dvobj_init(padapter) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n initialize device object priv Failed!\n")); ++ goto error; ++ } ++ ++ ++ //step 6. ++ if (rtw_init_drv_sw(padapter) == _FAIL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto error; ++ } ++ ++#if 1 ++{ ++ //step 7. ++ u8 mac[6]; ++ mac[0]=0x00; ++ mac[1]=0xe0; ++ mac[2]=0x4c; ++ mac[3]=0x87; ++ mac[4]=0x66; ++ mac[5]=0x55; ++ ++ _rtw_memcpy(pnetdev->dev_addr, mac/*padapter->eeprompriv.mac_addr*/, ETH_ALEN); ++ RT_TRACE(_module_hci_intfs_c_,_drv_info_,("pnetdev->dev_addr=0x%x:0x%x:0x%x:0x%x:0x%x:0x%x\n",pnetdev->dev_addr[0],pnetdev->dev_addr[1],pnetdev->dev_addr[2],pnetdev->dev_addr[3],pnetdev->dev_addr[4],pnetdev->dev_addr[5])); ++} ++#endif ++ //step 8. ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); ++ goto error; ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_info_,("register_netdev() success\n")); ++ RT_TRACE(_module_hci_intfs_c_,_drv_notice_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ RT_TRACE(_module_hci_intfs_c_,_drv_info_,("-871xs_drv - drv_init, success!\n")); ++ ++ return 0; ++ ++error: ++ ++ if (padapter->dvobj_deinit == NULL) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_deinit error!!!\n")); ++ } else { ++ padapter->dvobj_deinit(padapter); ++ } ++ ++ if (pnetdev) { ++ unregister_netdev(pnetdev); ++ rtw_free_netdev(pnetdev); ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_emerg_, ("-871x_sdio - drv_init, fail!\n")); ++ ++ return -1; ++} ++ ++void rtl871x_intf_stop(_adapter *padapter) ++{ ++ // Disable interrupt, also done in rtl8712_hal_deinit ++// rtw_write16(padapter, SDIO_HIMR, 0x00); ++} ++ ++void r871x_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev = (struct net_device*)padapter->pnetdev; ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+r871x_dev_unload\n")); ++ ++ if (padapter->bup == _TRUE) ++ { ++#if 0 ++ //s1. ++ if (pnetdev) { ++ netif_carrier_off(pnetdev); ++ netif_stop_queue(pnetdev); ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complelte s1!\n")); ++ ++ //s2. ++ // indicate-disconnect if necssary (free all assoc-resources) ++ // dis-assoc from assoc_sta (optional) ++ rtw_indicate_disconnect(padapter); ++ rtw_free_network_queue(padapter, _TRUE); ++#endif ++ ++ padapter->bDriverStopped = _TRUE; ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s2!\n")); ++ ++ //s3. ++ rtl871x_intf_stop(padapter); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s3!\n")); ++ ++ //s4. ++ rtw_stop_drv_threads(padapter); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s4!\n")); ++ ++ //s5. ++ if (padapter->bSurpriseRemoved == _FALSE) { ++ rtl871x_hal_deinit(padapter); ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complelt s5!\n")); ++ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("@ r871x_dev_unload:complete s6!\n")); ++ ++ padapter->bup = _FALSE; ++ } ++ else { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" )); ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-r871x_dev_unload\n")); ++} ++ ++static void r8712s_dev_remove(struct sdio_func *func) ++{ ++ _adapter *padapter = (_adapter*) (((struct dvobj_priv*)sdio_get_drvdata(func))->padapter); ++ struct net_device *pnetdev = (struct net_device *)padapter->pnetdev; ++ ++_func_exit_; ++ ++ if (padapter) ++ { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+dev_remove()\n")); ++ ++// padapter->bSurpriseRemoved = _TRUE; ++ ++ if (pnetdev) ++ unregister_netdev(pnetdev); //will call netdev_close() ++ ++ rtw_cancel_all_timer(padapter); ++ ++ r871x_dev_unload(padapter); ++ //s6. ++ if (padapter->dvobj_deinit) { ++ padapter->dvobj_deinit(padapter); // call sd_dvobj_deinit() ++ } else { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n")); ++ } ++ ++ rtw_free_drv_sw(padapter); ++ //after rtw_free_drv_sw(), padapter has beed freed, don't refer to it. ++ ++ sdio_claim_host(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_claim_host !\n")); ++ sdio_release_irq(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_release_irq !\n")); ++ sdio_disable_func(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_disable_func !\n")); ++ sdio_release_host(func); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" in dev_remove():sdio_release_host !\n")); ++ } ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n")); ++ ++_func_exit_; ++ ++ return; ++} ++ ++static drv_priv drvpriv = { ++ .r871xs_drv.probe = r871xs_drv_init, ++ .r871xs_drv.remove = r8712s_dev_remove, ++ .r871xs_drv.name = "rtl871x_sdio_wlan", ++ .r871xs_drv.id_table = sdio_ids, ++}; ++ ++ ++static int __init r8712s_drv_entry(void) ++{ ++ int status; ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+8712s_sdio - drv_entry\n")); ++ status = sdio_register_driver(&drvpriv.r871xs_drv); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-8712_sdio - drv_entry, status=%d\n", status)); ++ ++ return status; ++} ++ ++static void __exit r8712s_drv_halt(void) ++{ ++ int ret; ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+8712_sdio - drv_halt\n")); ++ sdio_unregister_driver(&drvpriv.r871xs_drv); // call r8712s_dev_remove() ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-8712_sdio - drv_halt\n")); ++ ++} ++ ++ ++module_init(r8712s_drv_entry); ++module_exit(r8712s_drv_halt); +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1523 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ++******************************************************************************/ ++#define _HCI_INTF_C_ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#ifndef CONFIG_USB_HCI ++ ++#error "CONFIG_USB_HCI shall be on!\n" ++ ++#endif ++ ++#include ++#include ++#include ++#include ++#ifdef CONFIG_PLATFORM_RTK_DMP ++#include ++#endif ++ ++#if defined (PLATFORM_LINUX) && defined (PLATFORM_WINDOWS) ++ ++#error "Shall be Linux or Windows, but not both!\n" ++ ++#endif ++ ++#ifdef CONFIG_80211N_HT ++extern int rtw_ht_enable; ++extern int rtw_cbw40_enable; ++extern int rtw_ampdu_enable;//for enable tx_ampdu ++#endif ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++int ui_pid[3] = {0, 0, 0}; ++#endif ++ ++ ++extern int pm_netdev_open(struct net_device *pnetdev,u8 bnormal); ++static int rtw_suspend(struct usb_interface *intf, pm_message_t message); ++static int rtw_resume(struct usb_interface *intf); ++int rtw_resume_process(struct usb_interface *pusb_intf); ++ ++ ++static int rtw_drv_init(struct usb_interface *pusb_intf,const struct usb_device_id *pdid); ++static void rtw_dev_remove(struct usb_interface *pusb_intf); ++ ++#define USB_VENDER_ID_REALTEK 0x0BDA ++ ++//DID_USB_v82_20110808 ++static struct usb_device_id rtw_usb_id_tbl[] ={ ++#ifdef CONFIG_RTL8192C ++ /*=== Realtek demoboard ===*/ ++ {USB_DEVICE(0x0BDA, 0x8191)},//Default ID ++ ++ /****** 8188CUS ********/ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8176)},//8188cu 1*1 dongole ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8170)},//8188CE-VAU USB minCard ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817E)},//8188CE-VAU USB minCard ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817A)},//8188cu Slim Solo ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817B)},//8188cu Slim Combo ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817D)},//8188RU High-power USB Dongle ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8754)},//8188 Combo for BC4 ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817F)},//8188RU ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x818A)},//RTL8188CUS-VL ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x018A)},//RTL8188CTV ++ ++ /****** 8192CUS ********/ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8177)},//8191cu 1*2 ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8178)},//8192cu 2*2 ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x817C)},//8192CE-VAU USB minCard ++ ++ ++ /*=== Customer ID ===*/ ++ /****** 8188CUS Dongle ********/ ++ {USB_DEVICE(0x2019, 0xED17)},//PCI - Edimax ++ {USB_DEVICE(0x0DF6, 0x0052)},//Sitecom - Edimax ++ {USB_DEVICE(0x7392, 0x7811)},//Edimax - Edimax ++ {USB_DEVICE(0x07B8, 0x8189)},//Abocom - Abocom ++ {USB_DEVICE(0x0EB0, 0x9071)},//NO Brand - Etop ++ {USB_DEVICE(0x06F8, 0xE033)},//Hercules - Edimax ++ {USB_DEVICE(0x103C, 0x1629)},//HP - Lite-On ,8188CUS Slim Combo ++ {USB_DEVICE(0x2001, 0x3308)},//D-Link - Alpha ++ {USB_DEVICE(0x050D, 0x1102)},//Belkin - Edimax ++ {USB_DEVICE(0x2019, 0xAB2A)},//Planex - Abocom ++ {USB_DEVICE(0x20F4, 0x648B)},//TRENDnet - Cameo ++ {USB_DEVICE(0x4855, 0x0090)},// - Feixun ++ {USB_DEVICE(0x13D3, 0x3357)},// - AzureWave ++ {USB_DEVICE(0x0DF6, 0x005C)},//Sitecom - Edimax ++ {USB_DEVICE(0x0BDA, 0x5088)},//Thinkware - CC&C ++ {USB_DEVICE(0x4856, 0x0091)},//NetweeN - Feixun ++ {USB_DEVICE(0x2019, 0x4902)},//Planex - Etop ++ {USB_DEVICE(0x2019, 0xAB2E)},//SW-WF02-AD15 -Abocom ++ ++ /****** 8188 RU ********/ ++ {USB_DEVICE(0x0BDA, 0x317F)},//Netcore,Netcore ++ ++ /****** 8188CE-VAU ********/ ++ {USB_DEVICE(0x13D3, 0x3359)},// - Azwave ++ {USB_DEVICE(0x13D3, 0x3358)},// - Azwave ++ ++ /****** 8188CUS Slim Solo********/ ++ {USB_DEVICE(0x04F2, 0xAFF7)},//XAVI - XAVI ++ {USB_DEVICE(0x04F2, 0xAFF9)},//XAVI - XAVI ++ {USB_DEVICE(0x04F2, 0xAFFA)},//XAVI - XAVI ++ ++ /****** 8188CUS Slim Combo ********/ ++ {USB_DEVICE(0x04F2, 0xAFF8)},//XAVI - XAVI ++ {USB_DEVICE(0x04F2, 0xAFFB)},//XAVI - XAVI ++ {USB_DEVICE(0x04F2, 0xAFFC)},//XAVI - XAVI ++ {USB_DEVICE(0x2019, 0x1201)},//Planex - Vencer ++ ++ /****** 8192CUS Dongle ********/ ++ {USB_DEVICE(0x2001, 0x3307)},//D-Link - Cameo ++ {USB_DEVICE(0x2001, 0x330A)},//D-Link - Alpha ++ {USB_DEVICE(0x2001, 0x3309)},//D-Link - Alpha ++ {USB_DEVICE(0x0586, 0x341F)},//Zyxel - Abocom ++ {USB_DEVICE(0x7392, 0x7822)},//Edimax - Edimax ++ {USB_DEVICE(0x2019, 0xAB2B)},//Planex - Abocom ++ {USB_DEVICE(0x07B8, 0x8178)},//Abocom - Abocom ++ {USB_DEVICE(0x07AA, 0x0056)},//ATKK - Gemtek ++ {USB_DEVICE(0x4855, 0x0091)},// - Feixun ++ {USB_DEVICE(0x2001, 0x3307)},//D-Link-Cameo ++ {USB_DEVICE(0x050D, 0x2102)},//Belkin - Sercomm ++ {USB_DEVICE(0x050D, 0x2103)},//Belkin - Edimax ++ {USB_DEVICE(0x20F4, 0x624D)},//TRENDnet ++ {USB_DEVICE(0x0DF6, 0x0061)},//Sitecom - Edimax ++ {USB_DEVICE(0x0B05, 0x17AB)},//ASUS - Edimax ++ {USB_DEVICE(0x0846, 0x9021)},//Netgear - Sercomm ++ {USB_DEVICE(0x0E66, 0x0019)},//Hawking,Edimax ++ ++ /****** 8192CE-VAU ********/ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8186)},//Intel-Xavi( Azwave) ++#endif ++#ifdef CONFIG_RTL8192D ++ /*=== Realtek demoboard ===*/ ++ /****** 8192DU ********/ ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8193)},//8192DU-VC ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8194)},//8192DU-VS ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8111)},//Realtek 5G dongle for WiFi Display ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x0193)},//8192DE-VAU ++ {USB_DEVICE(USB_VENDER_ID_REALTEK, 0x8171)},//8192DU-VC ++ ++ /*=== Customer ID ===*/ ++ /****** 8192DU-VC ********/ ++ {USB_DEVICE(0x2019, 0xAB2C)},//PCI - Abocm ++ {USB_DEVICE(0x2019, 0x4903)},//PCI - ETOP ++ {USB_DEVICE(0x2019, 0x4904)},//PCI - ETOP ++ {USB_DEVICE(0x07B8, 0x8193)},//Abocom - Abocom ++ ++ /****** 8192DU-VS ********/ ++ {USB_DEVICE(0x20F4, 0x664B)},//TRENDnet ++ ++ /****** 8192DU-WiFi Display Dongle ********/ ++ {USB_DEVICE(0x2019, 0xAB2D)},//Planex - Abocom ,5G dongle for WiFi Display ++#endif ++ {} /* Terminating entry */ ++}; ++ ++int const rtw_usb_id_len = sizeof(rtw_usb_id_tbl) / sizeof(struct usb_device_id); ++ ++static struct specific_device_id specific_device_id_tbl[] = { ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8177, .flags=SPEC_DEV_ID_DISABLE_HT},//8188cu 1*1 dongole, (b/g mode only) ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x817E, .flags=SPEC_DEV_ID_DISABLE_HT},//8188CE-VAU USB minCard (b/g mode only) ++ {.idVendor=0x0b05, .idProduct=0x1791, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3311, .flags=SPEC_DEV_ID_DISABLE_HT}, ++ {.idVendor=0x13D3, .idProduct=0x3359, .flags=SPEC_DEV_ID_DISABLE_HT},//Russian customer -Azwave (8188CE-VAU g mode) ++#ifdef RTK_DMP_PLATFORM ++ {.idVendor=USB_VENDER_ID_REALTEK, .idProduct=0x8111, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // Realtek 5G dongle for WiFi Display ++ {.idVendor=0x2019, .idProduct=0xAB2D, .flags=SPEC_DEV_ID_ASSIGN_IFNAME}, // PCI-Abocom 5G dongle for WiFi Display ++#endif /* RTK_DMP_PLATFORM */ ++ {} ++}; ++ ++typedef struct _driver_priv{ ++ ++ struct usb_driver rtw_usb_drv; ++ int drv_registered; ++ ++}drv_priv, *pdrv_priv; ++ ++ ++static drv_priv drvpriv = { ++ .rtw_usb_drv.name = (char*)DRV_NAME, ++ .rtw_usb_drv.probe = rtw_drv_init, ++ .rtw_usb_drv.disconnect = rtw_dev_remove, ++ .rtw_usb_drv.id_table = rtw_usb_id_tbl, ++ .rtw_usb_drv.suspend = rtw_suspend, ++ .rtw_usb_drv.resume = rtw_resume, ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 22)) ++ .rtw_usb_drv.reset_resume = rtw_resume, ++#endif ++#ifdef CONFIG_AUTOSUSPEND ++ .rtw_usb_drv.supports_autosuspend = 1, ++#endif ++}; ++ ++MODULE_DEVICE_TABLE(usb, rtw_usb_id_tbl); ++ ++ ++static inline int RT_usb_endpoint_dir_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); ++} ++ ++static inline int RT_usb_endpoint_dir_out(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); ++} ++ ++static inline int RT_usb_endpoint_xfer_int(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_INT); ++} ++ ++static inline int RT_usb_endpoint_xfer_bulk(const struct usb_endpoint_descriptor *epd) ++{ ++ return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == USB_ENDPOINT_XFER_BULK); ++} ++ ++static inline int RT_usb_endpoint_is_bulk_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_in(epd)); ++} ++ ++static inline int RT_usb_endpoint_is_bulk_out(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_bulk(epd) && RT_usb_endpoint_dir_out(epd)); ++} ++ ++static inline int RT_usb_endpoint_is_int_in(const struct usb_endpoint_descriptor *epd) ++{ ++ return (RT_usb_endpoint_xfer_int(epd) && RT_usb_endpoint_dir_in(epd)); ++} ++ ++static inline int RT_usb_endpoint_num(const struct usb_endpoint_descriptor *epd) ++{ ++ return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; ++} ++ ++u8 rtw_init_intf_priv(_adapter * padapter) ++{ ++ u8 rst = _SUCCESS; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _rtw_mutex_init(&padapter->dvobjpriv.usb_vendor_req_mutex); ++ #endif ++ ++ ++#ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ padapter->dvobjpriv.usb_alloc_vendor_req_buf = rtw_zmalloc(MAX_USB_IO_CTL_SIZE); ++ ++ if (padapter->dvobjpriv.usb_alloc_vendor_req_buf == NULL){ ++ padapter->dvobjpriv.usb_alloc_vendor_req_buf =NULL; ++ printk("alloc usb_vendor_req_buf failed... /n"); ++ rst = _FAIL; ++ goto exit; ++ } ++ padapter->dvobjpriv.usb_vendor_req_buf = ++ (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(padapter->dvobjpriv.usb_alloc_vendor_req_buf ), ALIGNMENT_UNIT); ++exit: ++#endif //CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ ++ return rst; ++ ++} ++ ++u8 rtw_deinit_intf_priv(_adapter * padapter) ++{ ++ u8 rst = _SUCCESS; ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ if(padapter->dvobjpriv.usb_vendor_req_buf) ++ { ++ rtw_mfree(padapter->dvobjpriv.usb_alloc_vendor_req_buf,MAX_USB_IO_CTL_SIZE); ++ } ++ #endif //CONFIG_USB_VENDOR_REQ_BUFFER_PREALLOC ++ ++ ++ #ifdef CONFIG_USB_VENDOR_REQ_MUTEX ++ _rtw_mutex_free(&padapter->dvobjpriv.usb_vendor_req_mutex); ++ #endif ++ ++ return rst; ++ ++} ++ ++static u32 usb_dvobj_init(_adapter *padapter) ++{ ++ int i; ++ u8 val8; ++ int status = _SUCCESS; ++ struct usb_device_descriptor *pdev_desc; ++ struct usb_host_config *phost_conf; ++ struct usb_config_descriptor *pconf_desc; ++ struct usb_host_interface *phost_iface; ++ struct usb_interface_descriptor *piface_desc; ++ struct usb_host_endpoint *phost_endp; ++ struct usb_endpoint_descriptor *pendp_desc; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ struct usb_interface *pusb_interface = pdvobjpriv->pusbintf; ++ ++_func_enter_; ++ ++ pdvobjpriv->padapter = padapter; ++ ++ pdvobjpriv->RtNumInPipes = 0; ++ pdvobjpriv->RtNumOutPipes = 0; ++ ++ //padapter->EepromAddressSize = 6; ++ //pdvobjpriv->nr_endpoint = 6; ++ ++ pdev_desc = &pusbd->descriptor; ++ ++#if 0 ++ DBG_8192C("\n8712_usb_device_descriptor:\n"); ++ DBG_8192C("bLength=%x\n", pdev_desc->bLength); ++ DBG_8192C("bDescriptorType=%x\n", pdev_desc->bDescriptorType); ++ DBG_8192C("bcdUSB=%x\n", pdev_desc->bcdUSB); ++ DBG_8192C("bDeviceClass=%x\n", pdev_desc->bDeviceClass); ++ DBG_8192C("bDeviceSubClass=%x\n", pdev_desc->bDeviceSubClass); ++ DBG_8192C("bDeviceProtocol=%x\n", pdev_desc->bDeviceProtocol); ++ DBG_8192C("bMaxPacketSize0=%x\n", pdev_desc->bMaxPacketSize0); ++ DBG_8192C("idVendor=%x\n", pdev_desc->idVendor); ++ DBG_8192C("idProduct=%x\n", pdev_desc->idProduct); ++ DBG_8192C("bcdDevice=%x\n", pdev_desc->bcdDevice); ++ DBG_8192C("iManufacturer=%x\n", pdev_desc->iManufacturer); ++ DBG_8192C("iProduct=%x\n", pdev_desc->iProduct); ++ DBG_8192C("iSerialNumber=%x\n", pdev_desc->iSerialNumber); ++ DBG_8192C("bNumConfigurations=%x\n", pdev_desc->bNumConfigurations); ++#endif ++ ++ phost_conf = pusbd->actconfig; ++ pconf_desc = &phost_conf->desc; ++ ++#if 0 ++ DBG_8192C("\n8712_usb_configuration_descriptor:\n"); ++ DBG_8192C("bLength=%x\n", pconf_desc->bLength); ++ DBG_8192C("bDescriptorType=%x\n", pconf_desc->bDescriptorType); ++ DBG_8192C("wTotalLength=%x\n", pconf_desc->wTotalLength); ++ DBG_8192C("bNumInterfaces=%x\n", pconf_desc->bNumInterfaces); ++ DBG_8192C("bConfigurationValue=%x\n", pconf_desc->bConfigurationValue); ++ DBG_8192C("iConfiguration=%x\n", pconf_desc->iConfiguration); ++ DBG_8192C("bmAttributes=%x\n", pconf_desc->bmAttributes); ++ DBG_8192C("bMaxPower=%x\n", pconf_desc->bMaxPower); ++#endif ++ ++ //DBG_8192C("\n/****** num of altsetting = (%d) ******/\n", pusb_interface->num_altsetting); ++ ++ phost_iface = &pusb_interface->altsetting[0]; ++ piface_desc = &phost_iface->desc; ++ ++#if 0 ++ DBG_8192C("\n8712_usb_interface_descriptor:\n"); ++ DBG_8192C("bLength=%x\n", piface_desc->bLength); ++ DBG_8192C("bDescriptorType=%x\n", piface_desc->bDescriptorType); ++ DBG_8192C("bInterfaceNumber=%x\n", piface_desc->bInterfaceNumber); ++ DBG_8192C("bAlternateSetting=%x\n", piface_desc->bAlternateSetting); ++ DBG_8192C("bNumEndpoints=%x\n", piface_desc->bNumEndpoints); ++ DBG_8192C("bInterfaceClass=%x\n", piface_desc->bInterfaceClass); ++ DBG_8192C("bInterfaceSubClass=%x\n", piface_desc->bInterfaceSubClass); ++ DBG_8192C("bInterfaceProtocol=%x\n", piface_desc->bInterfaceProtocol); ++ DBG_8192C("iInterface=%x\n", piface_desc->iInterface); ++#endif ++ ++ pdvobjpriv->NumInterfaces = pconf_desc->bNumInterfaces; ++ pdvobjpriv->InterfaceNumber = piface_desc->bInterfaceNumber; ++ pdvobjpriv->nr_endpoint = piface_desc->bNumEndpoints; ++ ++ //DBG_8192C("\ndump usb_endpoint_descriptor:\n"); ++ ++ for (i = 0; i < pdvobjpriv->nr_endpoint; i++) ++ { ++ phost_endp = phost_iface->endpoint + i; ++ if (phost_endp) ++ { ++ pendp_desc = &phost_endp->desc; ++ ++ DBG_8192C("\nusb_endpoint_descriptor(%d):\n", i); ++ DBG_8192C("bLength=%x\n",pendp_desc->bLength); ++ DBG_8192C("bDescriptorType=%x\n",pendp_desc->bDescriptorType); ++ DBG_8192C("bEndpointAddress=%x\n",pendp_desc->bEndpointAddress); ++ //DBG_8192C("bmAttributes=%x\n",pendp_desc->bmAttributes); ++ //DBG_8192C("wMaxPacketSize=%x\n",pendp_desc->wMaxPacketSize); ++ DBG_8192C("wMaxPacketSize=%x\n",le16_to_cpu(pendp_desc->wMaxPacketSize)); ++ DBG_8192C("bInterval=%x\n",pendp_desc->bInterval); ++ //DBG_8192C("bRefresh=%x\n",pendp_desc->bRefresh); ++ //DBG_8192C("bSynchAddress=%x\n",pendp_desc->bSynchAddress); ++ ++ if (RT_usb_endpoint_is_bulk_in(pendp_desc)) ++ { ++ DBG_8192C("RT_usb_endpoint_is_bulk_in = %x\n", RT_usb_endpoint_num(pendp_desc)); ++ pdvobjpriv->RtNumInPipes++; ++ } ++ else if (RT_usb_endpoint_is_int_in(pendp_desc)) ++ { ++ DBG_8192C("RT_usb_endpoint_is_int_in = %x, Interval = %x\n", RT_usb_endpoint_num(pendp_desc),pendp_desc->bInterval); ++ pdvobjpriv->RtNumInPipes++; ++ } ++ else if (RT_usb_endpoint_is_bulk_out(pendp_desc)) ++ { ++ DBG_8192C("RT_usb_endpoint_is_bulk_out = %x\n", RT_usb_endpoint_num(pendp_desc)); ++ pdvobjpriv->RtNumOutPipes++; ++ } ++ pdvobjpriv->ep_num[i] = RT_usb_endpoint_num(pendp_desc); ++ } ++ } ++ ++ DBG_8192C("nr_endpoint=%d, in_num=%d, out_num=%d\n\n", pdvobjpriv->nr_endpoint, pdvobjpriv->RtNumInPipes, pdvobjpriv->RtNumOutPipes); ++ ++ if (pusbd->speed == USB_SPEED_HIGH) ++ { ++ pdvobjpriv->ishighspeed = _TRUE; ++ DBG_8192C("USB_SPEED_HIGH\n"); ++ } ++ else ++ { ++ pdvobjpriv->ishighspeed = _FALSE; ++ DBG_8192C("NON USB_SPEED_HIGH\n"); ++ } ++ ++ //.2 ++ if ((rtw_init_io_priv(padapter)) == _FAIL) ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,(" \n Can't init io_reqs\n")); ++ status = _FAIL; ++ } ++ ++ if((rtw_init_intf_priv(padapter) )== _FAIL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("\n Can't INIT rtw_init_intf_priv\n")); ++ status = _FAIL; ++ } ++ ++ //.3 misc ++ _rtw_init_sema(&(padapter->dvobjpriv.usb_suspend_sema), 0); ++ ++ intf_read_chip_version(padapter); ++ ++ //.4 usb endpoint mapping ++ intf_chip_configure(padapter); ++ ++ rtw_reset_continual_urb_error(pdvobjpriv); ++ ++_func_exit_; ++ ++ return status; ++} ++ ++static void usb_dvobj_deinit(_adapter * padapter){ ++ ++ struct dvobj_priv *pdvobjpriv=&padapter->dvobjpriv; ++ ++ _func_enter_; ++ ++ rtw_deinit_intf_priv(padapter); ++ ++ _func_exit_; ++} ++ ++static void decide_chip_type_by_usb_device_id(_adapter *padapter, const struct usb_device_id *pdid) ++{ ++ //u32 i; ++ //u16 vid, pid; ++ ++ padapter->chip_type = NULL_CHIP_TYPE; ++ ++ //vid = pdid->idVendor; ++ //pid = pdid->idProduct; ++ ++ //TODO: dynamic judge 92c or 92d according to usb vid and pid. ++#ifdef CONFIG_RTL8192C ++ padapter->chip_type = RTL8188C_8192C; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192CU; ++ DBG_8192C("CHIP TYPE: RTL8188C_8192C\n"); ++#endif ++ ++#ifdef CONFIG_RTL8192D ++ padapter->chip_type = RTL8192D; ++ padapter->HardwareType = HARDWARE_TYPE_RTL8192DU; ++ DBG_8192C("CHIP TYPE: RTL8192D\n"); ++#endif ++ ++} ++ ++static void usb_intf_start(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_start\n")); ++ ++ if(padapter->HalFunc.inirp_init == NULL) ++ { ++ RT_TRACE(_module_os_intfs_c_,_drv_err_,("Initialize dvobjpriv.inirp_init error!!!\n")); ++ } ++ else ++ { ++ padapter->HalFunc.inirp_init(padapter); ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_start\n")); ++ ++} ++ ++static void usb_intf_stop(_adapter *padapter) ++{ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+usb_intf_stop\n")); ++ ++ //disabel_hw_interrupt ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //device still exists, so driver can do i/o operation ++ //TODO: ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("SurpriseRemoved==_FALSE\n")); ++ } ++ ++ //cancel in irp ++ if(padapter->HalFunc.inirp_deinit !=NULL) ++ { ++ padapter->HalFunc.inirp_deinit(padapter); ++ } ++ ++ //cancel out irp ++ rtw_write_port_cancel(padapter); ++ ++ //todo:cancel other irps ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-usb_intf_stop\n")); ++ ++} ++ ++static void rtw_dev_unload(_adapter *padapter) ++{ ++ struct net_device *pnetdev= (struct net_device*)padapter->pnetdev; ++ u8 val8; ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_dev_unload\n")); ++ ++ if(padapter->bup == _TRUE) ++ { ++ DBG_8192C("===> rtw_dev_unload\n"); ++ ++ padapter->bDriverStopped = _TRUE; ++ ++ //s3. ++ if(padapter->intf_stop) ++ { ++ padapter->intf_stop(padapter); ++ } ++ ++ //s4. ++ if(!padapter->pwrctrlpriv.bInternalAutoSuspend ) ++ rtw_stop_drv_threads(padapter); ++ ++ ++ //s5. ++ if(padapter->bSurpriseRemoved == _FALSE) ++ { ++ //DBG_8192C("r871x_dev_unload()->rtl871x_hal_deinit()\n"); ++ #ifdef CONFIG_WOWLAN ++ if((padapter->pwrctrlpriv.bSupportRemoteWakeup==_TRUE)&&(padapter->pwrctrlpriv.wowlan_mode==_TRUE)){ ++ DBG_8192C("%s bSupportWakeOnWlan==_TRUE do not run rtw_hal_deinit()\n",__FUNCTION__); ++ } ++ else ++ #endif //CONFIG_WOWLAN ++ { ++ rtw_hal_deinit(padapter); ++ } ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ ++ padapter->bup = _FALSE; ++ ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("r871x_dev_unload():padapter->bup == _FALSE\n" )); ++ } ++ ++ DBG_8192C("<=== rtw_dev_unload\n"); ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-rtw_dev_unload\n")); ++ ++} ++ ++static void process_spec_devid(const struct usb_device_id *pdid) ++{ ++ u16 vid, pid; ++ u32 flags; ++ int i; ++ int num = sizeof(specific_device_id_tbl)/sizeof(struct specific_device_id); ++ ++ for(i=0; iidVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_DISABLE_HT)) ++ { ++ rtw_ht_enable = 0; ++ rtw_cbw40_enable = 0; ++ rtw_ampdu_enable = 0; ++ } ++#endif ++ ++#ifdef RTK_DMP_PLATFORM ++ // Change the ifname to wlan10 when PC side WFD dongle plugin on DMP platform. ++ // It is used to distinguish between normal and PC-side wifi dongle/module. ++ if((pdid->idVendor==vid) && (pdid->idProduct==pid) && (flags&SPEC_DEV_ID_ASSIGN_IFNAME)) ++ { ++ extern char* ifname; ++ strncpy(ifname, "wlan10", 6); ++ //DBG_8192C("%s()-%d: ifname=%s, vid=%04X, pid=%04X\n", __FUNCTION__, __LINE__, ifname, vid, pid); ++ } ++#endif /* RTK_DMP_PLATFORM */ ++ ++ } ++} ++ ++#ifdef SUPPORT_HW_RFOFF_DETECTED ++extern u8 disconnect_hdl(_adapter *padapter, u8 *pbuf); ++extern void rtw_os_indicate_disconnect( _adapter *adapter ); ++ ++int rtw_hw_suspend(_adapter *padapter ) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_interface *pusb_intf = padapter->dvobjpriv.pusbintf; ++ struct net_device *pnetdev=usb_get_intfdata(pusb_intf); ++ ++ _func_enter_; ++ ++ if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) ++ { ++ DBG_8192C("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", ++ padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); ++ goto error_exit; ++ } ++ ++ if(padapter)//system suspend ++ { ++ LeaveAllPowerSaveMode(padapter); ++ ++ DBG_8192C("==> rtw_hw_suspend\n"); ++ _enter_pwrlock(&pwrpriv->lock); ++ pwrpriv->bips_processing = _TRUE; ++ //padapter->net_closed = _TRUE; ++ //s1. ++ if(pnetdev) ++ { ++ netif_carrier_off(pnetdev); ++ netif_stop_queue(pnetdev); ++ } ++ ++ //s2. ++ //s2-1. issue rtw_disassoc_cmd to fw ++ //rtw_disassoc_cmd(padapter);//donnot enqueue cmd ++ disconnect_hdl(padapter, NULL); ++ ++ //s2-2. indicate disconnect to os ++ //rtw_indicate_disconnect(padapter); ++ { ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED)) ++ { ++ _clr_fwstate_(pmlmepriv, _FW_LINKED); ++ ++ rtw_led_control(padapter, LED_CTL_NO_LINK); ++ ++ rtw_os_indicate_disconnect(padapter); ++ ++ #ifdef CONFIG_LPS ++ //donnot enqueue cmd ++ rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_DISCONNECT, 0); ++ #endif ++ } ++ ++ } ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++ ++ //s2-4. ++ rtw_free_network_queue(padapter,_TRUE); ++ #ifdef CONFIG_IPS ++ rtw_ips_dev_unload(padapter); ++ #endif ++ pwrpriv->rf_pwrstate = rf_off; ++ pwrpriv->bips_processing = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ } ++ else ++ goto error_exit; ++ ++ _func_exit_; ++ return 0; ++ ++error_exit: ++ DBG_8192C("%s, failed \n",__FUNCTION__); ++ return (-1); ++ ++} ++ ++int rtw_hw_resume(_adapter *padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_interface *pusb_intf = padapter->dvobjpriv.pusbintf; ++ struct net_device *pnetdev=usb_get_intfdata(pusb_intf); ++ ++ _func_enter_; ++ ++ if(padapter)//system resume ++ { ++ DBG_8192C("==> rtw_hw_resume\n"); ++ _enter_pwrlock(&pwrpriv->lock); ++ pwrpriv->bips_processing = _TRUE; ++ rtw_reset_drv_sw(padapter); ++ ++ if(pm_netdev_open(pnetdev,_FALSE) != 0) ++ { ++ _exit_pwrlock(&pwrpriv->lock); ++ goto error_exit; ++ } ++ ++ netif_device_attach(pnetdev); ++ netif_carrier_on(pnetdev); ++ ++ if(!netif_queue_stopped(pnetdev)) ++ netif_start_queue(pnetdev); ++ else ++ netif_wake_queue(pnetdev); ++ ++ pwrpriv->bkeepfwalive = _FALSE; ++ pwrpriv->brfoffbyhw = _FALSE; ++ ++ pwrpriv->rf_pwrstate = rf_on; ++ pwrpriv->bips_processing = _FALSE; ++ ++ _exit_pwrlock(&pwrpriv->lock); ++ } ++ else ++ { ++ goto error_exit; ++ } ++ ++ _func_exit_; ++ ++ return 0; ++error_exit: ++ DBG_8192C("%s, Open net dev failed \n",__FUNCTION__); ++ return (-1); ++} ++#endif ++ ++static int rtw_suspend(struct usb_interface *pusb_intf, pm_message_t message) ++{ ++ struct net_device *pnetdev=usb_get_intfdata(pusb_intf); ++ _adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev); ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct usb_device *usb_dev = interface_to_usbdev(pusb_intf); ++ struct wowlan_ioctl_param poidparam; ++ _func_enter_; ++ ++ if((!padapter->bup) || (padapter->bDriverStopped)||(padapter->bSurpriseRemoved)) ++ { ++ DBG_8192C("padapter->bup=%d bDriverStopped=%d bSurpriseRemoved = %d\n", ++ padapter->bup, padapter->bDriverStopped,padapter->bSurpriseRemoved); ++ return 0; ++ } ++ ++ DBG_8192C("########### rtw_suspend #################\n"); ++ ++ if(padapter)//system suspend ++ { ++ if(pwrpriv->bInternalAutoSuspend ) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ // The FW command register update must after MAC and FW init ready. ++ if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) ++ { ++ u8 bOpen = _TRUE; ++ rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); ++ //rtl8192c_set_FwSelectSuspend_cmd(padapter,_TRUE ,500);//note fw to support hw power down ping detect ++ } ++ #endif ++ #endif ++ } ++ pwrpriv->bInSuspend = _TRUE; ++ rtw_cancel_all_timer(padapter); ++ LeaveAllPowerSaveMode(padapter); ++ ++ _enter_pwrlock(&pwrpriv->lock); ++ //padapter->net_closed = _TRUE; ++ //s1. ++ if(pnetdev) ++ { ++ netif_carrier_off(pnetdev); ++ netif_stop_queue(pnetdev); ++ } ++#ifdef CONFIG_WOWLAN ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup==_TRUE&&padapter->pwrctrlpriv.wowlan_mode==_TRUE){ ++ u8 ps_mode=PS_MODE_MIN; ++ //set H2C command ++ poidparam.subcode=WOWLAN_ENABLE; ++ padapter->HalFunc.SetHwRegHandler(padapter,HW_VAR_WOWLAN,(u8 *)&poidparam); ++ padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_PWRMODE, &ps_mode); ++ rtw_set_rpwm(padapter, PS_STATE_S2); ++ } ++ else ++#endif //CONFIG_WOWLAN ++ { ++ //s2. ++ //s2-1. issue rtw_disassoc_cmd to fw ++ disconnect_hdl(padapter, NULL); ++ //rtw_disassoc_cmd(padapter); ++ } ++ ++ ++#ifdef CONFIG_LAYER2_ROAMING_RESUME ++ if(check_fwstate(pmlmepriv, WIFI_STATION_STATE) && check_fwstate(pmlmepriv, _FW_LINKED) ) ++ { ++ //printk("%s:%d assoc_ssid:%s\n", __FUNCTION__, __LINE__, pmlmepriv->assoc_ssid.Ssid); ++ DBG_871X("%s:%d %s(" MAC_FMT "), length:%d assoc_ssid.length:%d\n",__FUNCTION__, __LINE__, ++ pmlmepriv->cur_network.network.Ssid.Ssid, ++ MAC_ARG(pmlmepriv->cur_network.network.MacAddress), ++ pmlmepriv->cur_network.network.Ssid.SsidLength, ++ pmlmepriv->assoc_ssid.SsidLength); ++ ++ pmlmepriv->to_roaming = 1; ++ } ++#endif ++ //s2-2. indicate disconnect to os ++ rtw_indicate_disconnect(padapter); ++ //s2-3. ++ rtw_free_assoc_resources(padapter, 1); ++#ifdef CONFIG_AUTOSUSPEND ++ if(!pwrpriv->bInternalAutoSuspend ) ++#endif ++ //s2-4. ++ rtw_free_network_queue(padapter, _TRUE); ++ ++ rtw_dev_unload(padapter); ++#ifdef CONFIG_AUTOSUSPEND ++ pwrpriv->rf_pwrstate = rf_off; ++ pwrpriv->bips_processing = _FALSE; ++#endif ++ _exit_pwrlock(&pwrpriv->lock); ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_SURVEY)) ++ rtw_indicate_scan_done(padapter, 1); ++ ++ if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) ++ rtw_indicate_disconnect(padapter); ++ } ++ else ++ goto error_exit; ++ ++ DBG_871X("########### rtw_suspend done #################\n"); ++ ++ _func_exit_; ++ return 0; ++ ++error_exit: ++ DBG_871X("########### rtw_suspend fail !! #################\n"); ++ return (-1); ++ ++} ++ ++static int rtw_resume(struct usb_interface *pusb_intf) ++{ ++ struct net_device *pnetdev=usb_get_intfdata(pusb_intf); ++ _adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev); ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ int ret = 0; ++ ++ if(pwrpriv->bInternalAutoSuspend ){ ++ ret = rtw_resume_process(pusb_intf); ++ } else { ++#ifdef CONFIG_RESUME_IN_WORKQUEUE ++ rtw_resume_in_workqueue(pwrpriv); ++#elif defined(CONFIG_HAS_EARLYSUSPEND) || defined(CONFIG_ANDROID_POWER) ++ if(rtw_is_earlysuspend_registered(pwrpriv)) { ++ //jeff: bypass resume here, do in late_resume ++ pwrpriv->do_late_resume = _TRUE; ++ } else { ++ ret = rtw_resume_process(pusb_intf); ++ } ++#else // Normal resume process ++ ret = rtw_resume_process(pusb_intf); ++#endif //CONFIG_RESUME_IN_WORKQUEUE ++ } ++ ++ return ret; ++ ++} ++ ++ ++int rtw_resume_process(struct usb_interface *pusb_intf) ++{ ++ struct net_device *pnetdev; ++ struct usb_device *usb_dev; ++ _adapter *padapter; ++ struct pwrctrl_priv *pwrpriv; ++ ++ _func_enter_; ++ ++ DBG_8192C("########### rtw_resume #################\n"); ++ ++ if(pusb_intf) { ++ pnetdev=usb_get_intfdata(pusb_intf); ++ usb_dev = interface_to_usbdev(pusb_intf); ++ } else { ++ goto error_exit; ++ } ++ ++ padapter = (_adapter*)rtw_netdev_priv(pnetdev); ++ pwrpriv = &padapter->pwrctrlpriv; ++ ++ if(padapter)//system resume ++ { ++ _enter_pwrlock(&pwrpriv->lock); ++ rtw_reset_drv_sw(padapter); ++ pwrpriv->bkeepfwalive = _FALSE; ++ ++ DBG_8192C("bkeepfwalive(%x)\n",pwrpriv->bkeepfwalive); ++ if(pm_netdev_open(pnetdev,_TRUE) != 0) ++ goto error_exit; ++ ++ netif_device_attach(pnetdev); ++ netif_carrier_on(pnetdev); ++ ++#ifdef CONFIG_AUTOSUSPEND ++ if(pwrpriv->bInternalAutoSuspend ) ++ { ++ #ifdef CONFIG_AUTOSUSPEND ++ #ifdef SUPPORT_HW_RFOFF_DETECTED ++ // The FW command register update must after MAC and FW init ready. ++ if((padapter->bFWReady) && ( padapter->pwrctrlpriv.bHWPwrPindetect ) && (padapter->registrypriv.usbss_enable )) ++ { ++ //rtl8192c_set_FwSelectSuspend_cmd(padapter,_FALSE ,500);//note fw to support hw power down ping detect ++ u8 bOpen = _FALSE; ++ rtw_interface_ps_func(padapter,HAL_USB_SELECT_SUSPEND,&bOpen); ++ } ++ #endif ++ #endif ++ ++ pwrpriv->bInternalAutoSuspend = _FALSE; ++ pwrpriv->brfoffbyhw = _FALSE; ++ { ++ DBG_8192C("enc_algorithm(%x),wepkeymask(%x)\n", ++ padapter->securitypriv.dot11PrivacyAlgrthm,pwrpriv->wepkeymask); ++ if( (_WEP40_ == padapter->securitypriv.dot11PrivacyAlgrthm) || ++ (_WEP104_ == padapter->securitypriv.dot11PrivacyAlgrthm)) ++ { ++ sint keyid; ++ ++ for(keyid=0;keyid<4;keyid++){ ++ if(pwrpriv->wepkeymask & BIT(keyid)) { ++ if(keyid == padapter->securitypriv.dot11PrivacyKeyIndex) ++ rtw_set_key(padapter,&padapter->securitypriv, keyid, 1); ++ else ++ rtw_set_key(padapter,&padapter->securitypriv, keyid, 0); ++ } ++ } ++ } ++ } ++ } ++#endif ++ _exit_pwrlock(&pwrpriv->lock); ++ } ++ else ++ { ++ goto error_exit; ++ } ++ ++ if( padapter->pid[1]!=0) { ++ DBG_871X("pid[1]:%d\n",padapter->pid[1]); ++ rtw_signal_process(padapter->pid[1], SIGUSR2); ++ } ++ ++ #ifdef CONFIG_LAYER2_ROAMING_RESUME ++ rtw_roaming(padapter, NULL); ++ #endif ++ ++ DBG_871X("########### rtw_resume done#################\n"); ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ rtw_unlock_suspend(); ++ #endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++ _func_exit_; ++ ++ return 0; ++error_exit: ++ DBG_8192C("%s, Open net dev failed \n",__FUNCTION__); ++ ++ DBG_871X("########### rtw_resume done with error#################\n"); ++ ++ #ifdef CONFIG_RESUME_IN_WORKQUEUE ++ rtw_unlock_suspend(); ++ #endif //CONFIG_RESUME_IN_WORKQUEUE ++ ++ _func_exit_; ++ ++ return (-1); ++} ++ ++#ifdef CONFIG_AUTOSUSPEND ++void autosuspend_enter(_adapter* padapter) ++{ ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ pwrpriv->bInternalAutoSuspend = _TRUE; ++ pwrpriv->bips_processing = _TRUE; ++ ++ DBG_8192C("==>autosuspend_enter...........\n"); ++ ++ if(rf_off == pwrpriv->change_rfpwrstate ) ++ { ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_enable_autosuspend(padapter->dvobjpriv.pusbdev); ++ #else ++ padapter->dvobjpriv.pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) ++ usb_autopm_put_interface(padapter->dvobjpriv.pusbintf); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) ++ usb_autopm_enable(padapter->dvobjpriv.pusbintf); ++ #else ++ usb_autosuspend_device(padapter->dvobjpriv.pusbdev, 1); ++ #endif ++ } ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_8192C("...pm_usage_cnt(%d).....\n",atomic_read(&(padapter->dvobjpriv.pusbintf->pm_usage_cnt))); ++ #else ++ DBG_8192C("...pm_usage_cnt(%d).....\n",padapter->dvobjpriv.pusbintf->pm_usage_cnt); ++ #endif ++ ++} ++int autoresume_enter(_adapter* padapter) ++{ ++ int result = _SUCCESS; ++ struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ ++ DBG_8192C("====> autoresume_enter \n"); ++ ++ if(rf_off == pwrpriv->rf_pwrstate ) ++ { ++ pwrpriv->ps_flag = _FALSE; ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,33)) ++ if (usb_autopm_get_interface( padapter->dvobjpriv.pusbintf) < 0) ++ { ++ DBG_8192C( "can't get autopm: %d\n", result); ++ result = _FAIL; ++ goto error_exit; ++ } ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,20)) ++ usb_autopm_disable(padapter->dvobjpriv.pusbintf); ++ #else ++ usb_autoresume_device(padapter->dvobjpriv.pusbdev, 1); ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_8192C("...pm_usage_cnt(%d).....\n",atomic_read(&(padapter->dvobjpriv.pusbintf->pm_usage_cnt))); ++ #else ++ DBG_8192C("...pm_usage_cnt(%d).....\n",padapter->dvobjpriv.pusbintf->pm_usage_cnt); ++ #endif ++ } ++ DBG_8192C("<==== autoresume_enter \n"); ++error_exit: ++ ++ return result; ++} ++#endif ++ ++extern char* ifname; ++/* ++ * drv_init() - a device potentially for us ++ * ++ * notes: drv_init() is called when the bus driver has located a card for us to support. ++ * We accept the new device by returning 0. ++*/ ++ ++_adapter *rtw_sw_export = NULL; ++ ++static int rtw_drv_init(struct usb_interface *pusb_intf, const struct usb_device_id *pdid) ++{ ++ int i; ++ ++ uint status; ++ _adapter *padapter = NULL; ++ struct dvobj_priv *pdvobjpriv; ++ struct net_device *pnetdev; ++ ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("+rtw_drv_init\n")); ++ //DBG_8192C("+rtw_drv_init\n"); ++ ++ //2009.8.13, by Thomas ++ // In this probe function, O.S. will provide the usb interface pointer to driver. ++ // We have to increase the reference count of the usb device structure by using the usb_get_dev function. ++ usb_get_dev(interface_to_usbdev(pusb_intf)); ++ ++ //step 0. ++ process_spec_devid(pdid); ++ ++ //step 1. set USB interface data ++ // init data ++ pnetdev = rtw_init_netdev(NULL); ++ if (!pnetdev) ++ goto error; ++ ++ SET_NETDEV_DEV(pnetdev, &pusb_intf->dev); ++ ++ padapter = rtw_netdev_priv(pnetdev); ++ padapter->bDriverStopped=_TRUE; ++ pdvobjpriv = &padapter->dvobjpriv; ++ pdvobjpriv->padapter = padapter; ++ pdvobjpriv->pusbintf = pusb_intf ; ++ pdvobjpriv->pusbdev = interface_to_usbdev(pusb_intf); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_alloc(padapter, &pusb_intf->dev); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ ++ // set data ++ usb_set_intfdata(pusb_intf, pnetdev); ++ ++ //set interface_type to usb ++ padapter->interface_type = RTW_USB; ++ ++ //step 1-1., decide the chip_type via vid/pid ++ decide_chip_type_by_usb_device_id(padapter, pdid); ++ ++ //step 2. ++ if(padapter->chip_type == RTL8188C_8192C) ++ { ++#ifdef CONFIG_RTL8192C ++ rtl8192cu_set_hal_ops(padapter); ++#endif ++ } ++ else if(padapter->chip_type == RTL8192D) ++ { ++#ifdef CONFIG_RTL8192D ++ rtl8192du_set_hal_ops(padapter); ++#endif ++ } ++ else ++ { ++ DBG_8192C("Detect NULL_CHIP_TYPE\n"); ++ status = _FAIL; ++ goto error; ++ } ++ ++ //step 3. initialize the dvobj_priv ++ padapter->dvobj_init=&usb_dvobj_init; ++ padapter->dvobj_deinit=&usb_dvobj_deinit; ++ padapter->intf_start=&usb_intf_start; ++ padapter->intf_stop=&usb_intf_stop; ++ ++ //step 3. ++ //initialize the dvobj_priv ,include Chip version ++ if (padapter->dvobj_init == NULL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("\n Initialize dvobjpriv.dvobj_init error!!!\n")); ++ goto error; ++ } ++ ++ status = padapter->dvobj_init(padapter); ++ if (status != _SUCCESS) { ++ RT_TRACE(_module_hci_intfs_c_, _drv_err_, ("initialize device object priv Failed!\n")); ++ goto error; ++ } ++ ++ //step 4. read efuse/eeprom data and get mac_addr ++ intf_read_chip_info(padapter); ++ ++ //step 5. ++ status = rtw_init_drv_sw(padapter); ++ if(status ==_FAIL){ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize driver software resource Failed!\n")); ++ goto error; ++ } ++ ++#ifdef CONFIG_PM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,18)) ++ if(padapter->pwrctrlpriv.bSupportRemoteWakeup) ++ { ++ pdvobjpriv->pusbdev->do_remote_wakeup=1; ++ pusb_intf->needs_remote_wakeup = 1; ++ device_init_wakeup(&pusb_intf->dev, 1); ++ DBG_8192C("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~~~~\n"); ++ DBG_8192C("\n padapter->pwrctrlpriv.bSupportRemoteWakeup~~~[%d]~~~\n",device_may_wakeup(&pusb_intf->dev)); ++ } ++#endif ++#endif ++ ++#ifdef CONFIG_AUTOSUSPEND ++ if( padapter->registrypriv.power_mgnt != PS_MODE_ACTIVE ) ++ { ++ if(padapter->registrypriv.usbss_enable ){ /* autosuspend (2s delay) */ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,38)) ++ pdvobjpriv->pusbdev->dev.power.autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time ++ #else ++ pdvobjpriv->pusbdev->autosuspend_delay = 0 * HZ;//15 * HZ; idle-delay time ++ #endif ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,35)) ++ usb_enable_autosuspend(padapter->dvobjpriv.pusbdev); ++ #elif (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,22) && LINUX_VERSION_CODE<=KERNEL_VERSION(2,6,34)) ++ padapter->bDisableAutosuspend = padapter->dvobjpriv.pusbdev->autosuspend_disabled ; ++ padapter->dvobjpriv.pusbdev->autosuspend_disabled = 0;//autosuspend disabled by the user ++ #endif ++ ++ usb_autopm_get_interface(padapter->dvobjpriv.pusbintf );//init pm_usage_cnt ,let it start from 1 ++ ++ #if (LINUX_VERSION_CODE>=KERNEL_VERSION(2,6,32)) ++ DBG_8192C("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,atomic_read(&(pdvobjpriv->pusbintf ->pm_usage_cnt))); ++ #else ++ DBG_8192C("%s...pm_usage_cnt(%d).....\n",__FUNCTION__,pdvobjpriv->pusbintf ->pm_usage_cnt); ++ #endif ++ } ++ } ++#endif ++ // alloc dev name after read efuse. ++ rtw_init_netdev_name(pnetdev, ifname); ++ ++ rtw_macaddr_cfg(padapter->eeprompriv.mac_addr); ++ ++ _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ DBG_8192C("MAC Address from pnetdev->dev_addr= " MAC_FMT "\n", MAC_ARG(pnetdev->dev_addr)); ++ ++ ++ //step 6. ++ /* Tell the network stack we exist */ ++ if (register_netdev(pnetdev) != 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); ++ goto error; ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-drv_init - Adapter->bDriverStopped=%d, Adapter->bSurpriseRemoved=%d\n",padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_drv - drv_init, success!\n")); ++ //DBG_8192C("-871x_drv - drv_init, success!\n"); ++ ++#ifdef CONFIG_PROC_DEBUG ++#ifdef RTK_DMP_PLATFORM ++ rtw_proc_init_one(pnetdev); ++#endif ++#endif ++ ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_init(padapter); ++#endif ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_8192C("wlan link up\n"); ++ rtd2885_wlan_netlink_sendMsg("linkup", "8712"); ++#endif ++ ++ ++#ifdef CONFIG_GLOBAL_UI_PID ++ if(ui_pid[1]!=0) { ++ DBG_871X("ui_pid[1]:%d\n",ui_pid[1]); ++ rtw_signal_process(ui_pid[1], SIGUSR2); ++ } ++#endif ++#ifdef CONFIG_INTEL_PROXIM ++ rtw_sw_export=padapter; ++#endif ++ ++ DBG_8192C("bDriverStopped:%d, bSurpriseRemoved:%d, bup:%d, hw_init_completed:%d\n" ++ ,padapter->bDriverStopped ++ ,padapter->bSurpriseRemoved ++ ,padapter->bup ++ ,padapter->hw_init_completed ++ ); ++ ++ return 0; ++ ++error: ++ ++ usb_put_dev(interface_to_usbdev(pusb_intf));//decrease the reference count of the usb device structure if driver fail on initialzation ++ ++ usb_set_intfdata(pusb_intf, NULL); ++ ++ usb_dvobj_deinit(padapter); ++ ++ if (pnetdev) ++ { ++ //unregister_netdev(pnetdev); ++ rtw_free_netdev(pnetdev); ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-871x_usb - drv_init, fail!\n")); ++ //DBG_8192C("-871x_usb - drv_init, fail!\n"); ++ ++ return -ENODEV; ++} ++ ++/* ++ * dev_remove() - our device is being removed ++*/ ++//rmmod module & unplug(SurpriseRemoved) will call r871xu_dev_remove() => how to recognize both ++static void rtw_dev_remove(struct usb_interface *pusb_intf) ++{ ++ struct net_device *pnetdev=usb_get_intfdata(pusb_intf); ++ _adapter *padapter = (_adapter*)rtw_netdev_priv(pnetdev); ++ struct mlme_priv *pmlmepriv= &padapter->mlmepriv; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ u8 bResetDevice = _FALSE; ++ ++_func_exit_; ++ ++ usb_set_intfdata(pusb_intf, NULL); ++ ++ if(padapter) ++ { ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ struct wireless_dev *wdev = padapter->rtw_wdev; ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ DBG_8192C("+rtw_dev_remove\n"); ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+dev_remove()\n")); ++#if defined(CONFIG_HAS_EARLYSUSPEND ) || defined(CONFIG_ANDROID_POWER) ++ rtw_unregister_early_suspend(&padapter->pwrctrlpriv); ++#endif ++ LeaveAllPowerSaveMode(padapter); ++ ++ if(check_fwstate(pmlmepriv, _FW_LINKED)) ++ disconnect_hdl(padapter, NULL); ++ ++ if(drvpriv.drv_registered == _TRUE) ++ { ++ //DBG_8192C("r871xu_dev_remove():padapter->bSurpriseRemoved == _TRUE\n"); ++ padapter->bSurpriseRemoved = _TRUE; ++ } ++ /*else ++ { ++ //DBG_8192C("r871xu_dev_remove():module removed\n"); ++ padapter->hw_init_completed = _FALSE; ++ }*/ ++ ++#ifdef CONFIG_AP_MODE ++ free_mlme_ap_info(padapter); ++#ifdef CONFIG_HOSTAPD_MLME ++ hostapd_mode_unload(padapter); ++#endif //CONFIG_HOSTAPD_MLME ++#endif //CONFIG_AP_MODE ++ ++ if(padapter->DriverState != DRIVER_DISAPPEAR) ++ { ++ if(pnetdev) { ++ unregister_netdev(pnetdev); //will call netdev_close() ++#ifdef CONFIG_PROC_DEBUG ++ rtw_proc_remove_one(pnetdev); ++#endif ++ } ++ } ++ ++ rtw_cancel_all_timer(padapter); ++#ifdef CONFIG_WOWLAN ++ padapter->pwrctrlpriv.wowlan_mode=_FALSE; ++#endif //CONFIG_WOWLAN ++ rtw_dev_unload(padapter); ++ ++ DBG_8192C("+r871xu_dev_remove, hw_init_completed=%d\n", padapter->hw_init_completed); ++ ++ //Modify condition for 92DU DMDP 2010.11.18, by Thomas ++ //move code to here, avoid access null pointer. 2011.05.25. ++ if((pdvobjpriv->NumInterfaces != 2) || (pdvobjpriv->InterfaceNumber == 1)) ++ bResetDevice = _TRUE; ++ ++ //s6. ++ if(padapter->dvobj_deinit) ++ { ++ padapter->dvobj_deinit(padapter); ++ } ++ else ++ { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("Initialize hcipriv.hci_priv_init error!!!\n")); ++ } ++ ++ //after rtw_free_drv_sw(), padapter has beed freed, don't refer to it. ++ rtw_free_drv_sw(padapter); ++ ++#ifdef CONFIG_IOCTL_CFG80211 ++ rtw_wdev_free(wdev); ++#endif //CONFIG_IOCTL_CFG80211 ++ ++ } ++ ++ usb_put_dev(interface_to_usbdev(pusb_intf));//decrease the reference count of the usb device structure when disconnect ++ ++ //If we didn't unplug usb dongle and remove/insert modlue, driver fails on sitesurvey for the first time when device is up . ++ //Reset usb port for sitesurvey fail issue. 2009.8.13, by Thomas ++ if(_TRUE == bResetDevice) ++ { ++ if(interface_to_usbdev(pusb_intf)->state != USB_STATE_NOTATTACHED) ++ { ++ DBG_8192C("usb attached..., try to reset usb device\n"); ++ usb_reset_device(interface_to_usbdev(pusb_intf)); ++ } ++ } ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("-dev_remove()\n")); ++ DBG_8192C("-r871xu_dev_remove, done\n"); ++ ++#ifdef CONFIG_PLATFORM_RTD2880B ++ DBG_8192C("wlan link down\n"); ++ rtd2885_wlan_netlink_sendMsg("linkdown", "8712"); ++#endif ++#ifdef CONFIG_INTEL_PROXIM ++ rtw_sw_export=NULL; ++#endif ++ #ifdef DBG_MEM_ALLOC ++ rtw_dump_mem_stat (); ++ #endif ++_func_exit_; ++ ++ return; ++ ++} ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) ++extern int console_suspend_enabled; ++#endif ++ ++static int __init rtw_drv_entry(void) ++{ ++#ifdef CONFIG_PLATFORM_RTK_DMP ++ u32 tmp; ++ tmp=readl((volatile unsigned int*)0xb801a608); ++ tmp &= 0xffffff00; ++ tmp |= 0x55; ++ writel(tmp,(volatile unsigned int*)0xb801a608);//write dummy register for 1055 ++#endif ++ ++ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_entry\n")); ++ ++ DBG_871X("rtw driver version=%s \n", DRIVERVERSION); ++ DBG_871X("Build at: %s %s\n", __DATE__, __TIME__); ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24)) ++ //console_suspend_enabled=0; ++#endif ++ ++ rtw_suspend_lock_init(); ++ ++ drvpriv.drv_registered = _TRUE; ++ return usb_register(&drvpriv.rtw_usb_drv); ++} ++ ++static void __exit rtw_drv_halt(void) ++{ ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("+rtw_drv_halt\n")); ++ DBG_8192C("+rtw_drv_halt\n"); ++ ++ rtw_suspend_lock_uninit(); ++ ++ drvpriv.drv_registered = _FALSE; ++ usb_deregister(&drvpriv.rtw_usb_drv); ++ DBG_8192C("-rtw_drv_halt\n"); ++} ++ ++ ++module_init(rtw_drv_entry); ++module_exit(rtw_drv_halt); ++ ++ ++/* ++init (driver module)-> r8712u_drv_entry ++probe (sd device)-> r871xu_drv_init(dev_init) ++open (net_device) ->netdev_open ++close (net_device) ->netdev_close ++remove (sd device) ->r871xu_dev_remove ++exit (driver module)-> r8712u_drv_halt ++*/ ++ ++ ++/* ++r8711s_drv_entry() ++r8711u_drv_entry() ++r8712s_drv_entry() ++r8712u_drv_entry() ++*/ ++#ifdef CONFIG_INTEL_PROXIM ++_adapter *rtw_usb_get_sw_pointer(void) ++{ ++ return rtw_sw_export; ++} ++EXPORT_SYMBOL(rtw_usb_get_sw_pointer); ++#endif //CONFIG_INTEL_PROXIM ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/xmit_linux.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/xmit_linux.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,367 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++******************************************************************************/ ++#define _XMIT_OSDEP_C_ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++uint rtw_remainder_len(struct pkt_file *pfile) ++{ ++ return (pfile->buf_len - ((SIZE_PTR)(pfile->cur_addr) - (SIZE_PTR)(pfile->buf_start))); ++} ++ ++void _rtw_open_pktfile (_pkt *pktptr, struct pkt_file *pfile) ++{ ++_func_enter_; ++ ++ pfile->pkt = pktptr; ++ pfile->cur_addr = pfile->buf_start = pktptr->data; ++ pfile->pkt_len = pfile->buf_len = pktptr->len; ++ ++ pfile->cur_buffer = pfile->buf_start ; ++ ++_func_exit_; ++} ++ ++uint _rtw_pktfile_read (struct pkt_file *pfile, u8 *rmem, uint rlen) ++{ ++ uint len = 0; ++ ++_func_enter_; ++ ++ len = rtw_remainder_len(pfile); ++ len = (rlen > len)? len: rlen; ++ ++ if(rmem) ++ skb_copy_bits(pfile->pkt, pfile->buf_len-pfile->pkt_len, rmem, len); ++ ++ pfile->cur_addr += len; ++ pfile->pkt_len -= len; ++ ++_func_exit_; ++ ++ return len; ++} ++ ++sint rtw_endofpktfile(struct pkt_file *pfile) ++{ ++_func_enter_; ++ ++ if (pfile->pkt_len == 0) { ++_func_exit_; ++ return _TRUE; ++ } ++ ++_func_exit_; ++ ++ return _FALSE; ++} ++ ++void rtw_set_tx_chksum_offload(_pkt *pkt, struct pkt_attrib *pattrib) ++{ ++ ++#ifdef CONFIG_TCP_CSUM_OFFLOAD_TX ++ struct sk_buff *skb = (struct sk_buff *)pkt; ++ pattrib->hw_tcp_csum = 0; ++ ++ if (skb->ip_summed == CHECKSUM_PARTIAL) { ++ if (skb_shinfo(skb)->nr_frags == 0) ++ { ++ const struct iphdr *ip = ip_hdr(skb); ++ if (ip->protocol == IPPROTO_TCP) { ++ // TCP checksum offload by HW ++ DBG_8192C("CHECKSUM_PARTIAL TCP\n"); ++ pattrib->hw_tcp_csum = 1; ++ //skb_checksum_help(skb); ++ } else if (ip->protocol == IPPROTO_UDP) { ++ //DBG_8192C("CHECKSUM_PARTIAL UDP\n"); ++#if 1 ++ skb_checksum_help(skb); ++#else ++ // Set UDP checksum = 0 to skip checksum check ++ struct udphdr *udp = skb_transport_header(skb); ++ udp->check = 0; ++#endif ++ } else { ++ DBG_8192C("%s-%d TCP CSUM offload Error!!\n", __FUNCTION__, __LINE__); ++ WARN_ON(1); /* we need a WARN() */ ++ } ++ } ++ else { // IP fragmentation case ++ DBG_8192C("%s-%d nr_frags != 0, using skb_checksum_help(skb);!!\n", __FUNCTION__, __LINE__); ++ skb_checksum_help(skb); ++ } ++ } ++#endif ++ ++} ++ ++int rtw_os_xmit_resource_alloc(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 alloc_sz) ++{ ++#ifdef CONFIG_USB_HCI ++ int i; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ pxmitbuf->pallocated_buf = rtw_usb_buffer_alloc(pusbd, (size_t)alloc_sz, GFP_ATOMIC, &pxmitbuf->dma_transfer_addr); ++ pxmitbuf->pbuf = pxmitbuf->pallocated_buf; ++ if(pxmitbuf->pallocated_buf == NULL) ++ return _FAIL; ++#else // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ return _FAIL; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++ pxmitbuf->dma_transfer_addr = 0; ++ ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++ for(i=0; i<8; i++) ++ { ++ pxmitbuf->pxmit_urb[i] = usb_alloc_urb(0, GFP_KERNEL); ++ if(pxmitbuf->pxmit_urb[i] == NULL) ++ { ++ DBG_8192C("pxmitbuf->pxmit_urb[i]==NULL"); ++ return _FAIL; ++ } ++ ++ } ++#endif ++#ifdef CONFIG_PCI_HCI ++ pxmitbuf->pallocated_buf = rtw_zmalloc(alloc_sz); ++ if (pxmitbuf->pallocated_buf == NULL) ++ { ++ return _FAIL; ++ } ++ ++ pxmitbuf->pbuf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pxmitbuf->pallocated_buf), XMITBUF_ALIGN_SZ); ++#endif ++ ++ return _SUCCESS; ++} ++ ++void rtw_os_xmit_resource_free(_adapter *padapter, struct xmit_buf *pxmitbuf,u32 free_sz) ++{ ++#ifdef CONFIG_USB_HCI ++ int i; ++ struct dvobj_priv *pdvobjpriv = &padapter->dvobjpriv; ++ struct usb_device *pusbd = pdvobjpriv->pusbdev; ++ ++ ++ for(i=0; i<8; i++) ++ { ++ if(pxmitbuf->pxmit_urb[i]) ++ { ++ //usb_kill_urb(pxmitbuf->pxmit_urb[i]); ++ usb_free_urb(pxmitbuf->pxmit_urb[i]); ++ } ++ } ++ ++#ifdef CONFIG_USE_USB_BUFFER_ALLOC_TX ++ rtw_usb_buffer_free(pusbd, (size_t)free_sz, pxmitbuf->pallocated_buf, pxmitbuf->dma_transfer_addr); ++ pxmitbuf->pallocated_buf = NULL; ++ pxmitbuf->dma_transfer_addr = 0; ++#else // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ if(pxmitbuf->pallocated_buf) ++ rtw_mfree(pxmitbuf->pallocated_buf, free_sz); ++#endif // CONFIG_USE_USB_BUFFER_ALLOC_TX ++ ++#endif ++#ifdef CONFIG_PCI_HCI ++ if(pxmitbuf->pallocated_buf) ++ rtw_mfree(pxmitbuf->pallocated_buf, free_sz); ++#endif ++} ++ ++void rtw_os_pkt_complete(_adapter *padapter, _pkt *pkt) ++{ ++ if (netif_queue_stopped(padapter->pnetdev)) ++ netif_wake_queue(padapter->pnetdev); ++ ++ dev_kfree_skb_any(pkt); ++} ++ ++void rtw_os_xmit_complete(_adapter *padapter, struct xmit_frame *pxframe) ++{ ++ if(pxframe->pkt) ++ { ++ //RT_TRACE(_module_xmit_osdep_c_,_drv_err_,("linux : rtw_os_xmit_complete, dev_kfree_skb()\n")); ++ ++ //dev_kfree_skb_any(pxframe->pkt); ++ rtw_os_pkt_complete(padapter, pxframe->pkt); ++ ++ } ++ ++ pxframe->pkt = NULL; ++} ++ ++void rtw_os_xmit_schedule(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ ++ _enter_critical_bh(&pxmitpriv->lock, &irqL); ++ ++ if(rtw_txframes_pending(padapter)) ++ { ++ tasklet_hi_schedule(&pxmitpriv->xmit_tasklet); ++ } ++ ++ _exit_critical_bh(&pxmitpriv->lock, &irqL); ++} ++ ++ ++ ++#ifdef CONFIG_TX_MCAST2UNI ++int rtw_mlcst2unicst(_adapter *padapter, struct sk_buff *skb) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sk_buff *newskb; ++ struct sta_info *psta = NULL; ++ s32 res; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //free sta asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ /* avoid come from STA1 and send back STA1 */ ++ if (!memcmp(psta->hwaddr, &skb->data[6], 6)) ++ continue; ++ ++ newskb = skb_copy(skb, GFP_ATOMIC); ++ ++ if (newskb) { ++ memcpy(newskb->data, psta->hwaddr, 6); ++ res = rtw_xmit(padapter, &newskb); ++ if (res < 0) { ++ DBG_871X("%s()-%d: rtw_xmit() return error!\n", __FUNCTION__, __LINE__); ++ pxmitpriv->tx_drop++; ++ dev_kfree_skb_any(newskb); ++ } else ++ pxmitpriv->tx_pkts++; ++ } else { ++ DBG_871X("%s-%d: skb_copy() failed!\n", __FUNCTION__, __LINE__); ++ pxmitpriv->tx_drop++; ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ //dev_kfree_skb_any(skb); ++ return _FALSE; // Caller shall tx this multicast frame via normal way. ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ dev_kfree_skb_any(skb); ++ return _TRUE; ++} ++#endif // CONFIG_TX_MCAST2UNI ++ ++ ++int rtw_xmit_entry(_pkt *pkt, _nic_hdl pnetdev) ++{ ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(pnetdev); ++ struct xmit_priv *pxmitpriv = &padapter->xmitpriv; ++#ifdef CONFIG_TX_MCAST2UNI ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ extern int rtw_mc2u_disable; ++#endif // CONFIG_TX_MCAST2UNI ++ s32 res = 0; ++ int ret = 0; ++ ++_func_enter_; ++ ++ RT_TRACE(_module_rtl871x_mlme_c_, _drv_info_, ("+xmit_enry\n")); ++ ++ if (rtw_if_up(padapter) == _FALSE) { ++ RT_TRACE(_module_xmit_osdep_c_, _drv_err_, ("rtw_xmit_entry: rtw_if_up fail\n")); ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s if_up fail\n", __FUNCTION__); ++ #endif ++ goto drop_packet; ++ } ++ ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( !rtw_mc2u_disable ++ && check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE ++ && ( IP_MCAST_MAC(pkt->data) ++ || ICMPV6_MCAST_MAC(pkt->data) ) ++ ) ++ { ++ if ( pxmitpriv->free_xmitframe_cnt > (NR_XMITFRAME/4) ) { ++ res = rtw_mlcst2unicst(padapter, pkt); ++ if (res == _TRUE) { ++ goto exit; ++ } ++ } else { ++ //DBG_871X("Stop M2U(%d, %d)! ", pxmitpriv->free_xmitframe_cnt, pxmitpriv->free_xmitbuf_cnt); ++ //DBG_871X("!m2u ); ++ } ++ } ++#endif // CONFIG_TX_MCAST2UNI ++ ++ res = rtw_xmit(padapter, &pkt); ++ if (res < 0) { ++ #ifdef DBG_TX_DROP_FRAME ++ DBG_871X("DBG_TX_DROP_FRAME %s rtw_xmit fail\n", __FUNCTION__); ++ #endif ++ goto drop_packet; ++ } ++ pxmitpriv->tx_pkts++; ++ ++ RT_TRACE(_module_xmit_osdep_c_, _drv_info_, ("rtw_xmit_entry: tx_pkts=%d\n", (u32)pxmitpriv->tx_pkts)); ++ goto exit; ++ ++drop_packet: ++ pxmitpriv->tx_drop++; ++ dev_kfree_skb_any(pkt); ++ RT_TRACE(_module_xmit_osdep_c_, _drv_notice_, ("rtw_xmit_entry: drop, tx_drop=%d\n", (u32)pxmitpriv->tx_drop)); ++ ++exit: ++ ++_func_exit_; ++ ++ return 0; ++} ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/osdep_service.c 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,1571 @@ ++/****************************************************************************** ++ * ++ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of version 2 of the GNU General Public License as ++ * published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License along with ++ * this program; if not, write to the Free Software Foundation, Inc., ++ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA ++ * ++ * ++ ******************************************************************************/ ++ ++ ++#define _OSDEP_SERVICE_C_ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#ifdef RTK_DMP_PLATFORM ++#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,12)) ++#include ++#endif ++#endif ++ ++#define RT_TAG '1178' ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++#include ++atomic_t _malloc_cnt = ATOMIC_INIT(0); ++atomic_t _malloc_size = ATOMIC_INIT(0); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ ++#if defined(PLATFORM_LINUX) ++/* ++* Translate the OS dependent @param error_code to OS independent RTW_STATUS_CODE ++* @return: one of RTW_STATUS_CODE ++*/ ++inline int RTW_STATUS_CODE(int error_code){ ++ if(error_code >=0) ++ return _SUCCESS; ++ ++ switch(error_code) { ++ //case -ETIMEDOUT: ++ // return RTW_STATUS_TIMEDOUT; ++ default: ++ return _FAIL; ++ } ++} ++#else ++inline int RTW_STATUS_CODE(int error_code){ ++ return error_code; ++} ++#endif ++ ++ ++inline u8* _rtw_vmalloc(u32 sz) ++{ ++ u8 *pbuf; ++#ifdef PLATFORM_LINUX ++ pbuf = vmalloc(sz); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ if ( pbuf != NULL) { ++ atomic_inc(&_malloc_cnt); ++ atomic_add(sz, &_malloc_size); ++ } ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ return pbuf; ++} ++ ++inline u8* _rtw_zvmalloc(u32 sz) ++{ ++ u8 *pbuf; ++#ifdef PLATFORM_LINUX ++ pbuf = _rtw_vmalloc(sz); ++ if (pbuf != NULL) ++ memset(pbuf, 0, sz); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++ if (pbuf != NULL) ++ NdisFillMemory(pbuf, sz, 0); ++#endif ++ ++ return pbuf; ++} ++ ++inline void _rtw_vmfree(u8 *pbuf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ vfree(pbuf); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisFreeMemory(pbuf,sz, 0); ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ atomic_dec(&_malloc_cnt); ++ atomic_sub(sz, &_malloc_size); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++} ++ ++u8* _rtw_malloc(u32 sz) ++{ ++ ++ u8 *pbuf=NULL; ++ ++#ifdef PLATFORM_LINUX ++#ifdef RTK_DMP_PLATFORM ++ if(sz > 0x4000) ++ pbuf = (u8 *)dvr_malloc(sz); ++ else ++#endif ++ pbuf = kmalloc(sz, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAllocateMemoryWithTag(&pbuf,sz, RT_TAG); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ if ( pbuf != NULL) { ++ atomic_inc(&_malloc_cnt); ++ atomic_add(sz, &_malloc_size); ++ } ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++ return pbuf; ++ ++} ++ ++ ++u8* _rtw_zmalloc(u32 sz) ++{ ++ u8 *pbuf = _rtw_malloc(sz); ++ ++ if (pbuf != NULL) { ++ ++#ifdef PLATFORM_LINUX ++ memset(pbuf, 0, sz); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ NdisFillMemory(pbuf, sz, 0); ++#endif ++ ++ } ++ ++ return pbuf; ++ ++} ++ ++void _rtw_mfree(u8 *pbuf, u32 sz) ++{ ++ ++#ifdef PLATFORM_LINUX ++#ifdef RTK_DMP_PLATFORM ++ if(sz > 0x4000) ++ dvr_free(pbuf); ++ else ++#endif ++ kfree(pbuf); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisFreeMemory(pbuf,sz, 0); ++ ++#endif ++ ++#ifdef DBG_MEMORY_LEAK ++#ifdef PLATFORM_LINUX ++ atomic_dec(&_malloc_cnt); ++ atomic_sub(sz, &_malloc_size); ++#endif ++#endif /* DBG_MEMORY_LEAK */ ++ ++} ++ ++ ++#ifdef DBG_MEM_ALLOC ++ ++struct rtw_dbg_mem_stat { ++ ATOMIC_T vir_alloc; // the memory bytes we allocate now ++ ATOMIC_T vir_peak; // the peak memory bytes we allocate ++ ATOMIC_T vir_alloc_err; // the error times we fail to allocate memory ++ ++ ATOMIC_T phy_alloc; ++ ATOMIC_T phy_peak; ++ ATOMIC_T phy_alloc_err; ++} rtw_dbg_mem_stat; ++ ++enum { ++ MEM_STAT_VIR_ALLOC_SUCCESS, ++ MEM_STAT_VIR_ALLOC_FAIL, ++ MEM_STAT_VIR_FREE, ++ MEM_STAT_PHY_ALLOC_SUCCESS, ++ MEM_STAT_PHY_ALLOC_FAIL, ++ MEM_STAT_PHY_FREE ++}; ++ ++void rtw_dump_mem_stat (void) ++{ ++ int vir_alloc, vir_peak, vir_alloc_err, phy_alloc, phy_peak, phy_alloc_err; ++ ++ vir_alloc=ATOMIC_READ(&rtw_dbg_mem_stat.vir_alloc); ++ vir_peak=ATOMIC_READ(&rtw_dbg_mem_stat.vir_peak); ++ vir_alloc_err=ATOMIC_READ(&rtw_dbg_mem_stat.vir_alloc_err); ++ ++ phy_alloc=ATOMIC_READ(&rtw_dbg_mem_stat.phy_alloc); ++ phy_peak=ATOMIC_READ(&rtw_dbg_mem_stat.phy_peak); ++ phy_alloc_err=ATOMIC_READ(&rtw_dbg_mem_stat.phy_alloc_err); ++ ++ DBG_871X("vir_alloc:%d, vir_peak:%d,vir_alloc_err:%d, phy_alloc:%d, phy_peak:%d, phy_alloc_err:%d\n" ++ , vir_alloc, vir_peak, vir_alloc_err ++ , phy_alloc, phy_peak, phy_alloc_err ++ ); ++} ++ ++void rtw_update_mem_stat(u8 flag, u32 sz) ++{ ++ static u32 update_time = 0; ++ int peak, alloc; ++ ++ if(!update_time) { ++ ATOMIC_SET(&rtw_dbg_mem_stat.vir_alloc,0); ++ ATOMIC_SET(&rtw_dbg_mem_stat.vir_peak,0); ++ ATOMIC_SET(&rtw_dbg_mem_stat.vir_alloc_err,0); ++ ATOMIC_SET(&rtw_dbg_mem_stat.phy_alloc,0); ++ ATOMIC_SET(&rtw_dbg_mem_stat.phy_peak,0); ++ ATOMIC_SET(&rtw_dbg_mem_stat.phy_alloc_err,0); ++ } ++ ++ switch(flag) { ++ case MEM_STAT_VIR_ALLOC_SUCCESS: ++ alloc = ATOMIC_ADD_RETURN(&rtw_dbg_mem_stat.vir_alloc, sz); ++ peak=ATOMIC_READ(&rtw_dbg_mem_stat.vir_peak); ++ if (peak 5000) { ++ rtw_dump_mem_stat(); ++ update_time=rtw_get_current_time(); ++ } ++ ++ ++} ++ ++ ++inline u8* dbg_rtw_vmalloc(u32 sz, const char *func, int line) ++{ ++ u8 *p; ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_vmalloc((sz)); ++ ++ rtw_update_mem_stat( ++ p ? MEM_STAT_VIR_ALLOC_SUCCESS : MEM_STAT_VIR_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline u8* dbg_rtw_zvmalloc(u32 sz, const char *func, int line) ++{ ++ u8 *p; ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_zvmalloc((sz)); ++ ++ rtw_update_mem_stat( ++ p ? MEM_STAT_VIR_ALLOC_SUCCESS : MEM_STAT_VIR_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline void dbg_rtw_vmfree(u8 *pbuf, u32 sz, const char *func, int line) ++{ ++ DBG_871X("DBG_MEM_ALLOC %s:%d %s(%p,%d)\n", func, line, __FUNCTION__, (pbuf), (sz)); ++ ++ _rtw_vmfree((pbuf), (sz)); ++ ++ rtw_update_mem_stat( ++ MEM_STAT_VIR_FREE ++ , sz ++ ); ++ ++} ++ ++inline u8* dbg_rtw_malloc(u32 sz, const char *func, int line) ++{ ++ u8 *p; ++ ++ if((sz)>4096) ++ DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p=_rtw_malloc((sz)); ++ ++ rtw_update_mem_stat( ++ p ? MEM_STAT_PHY_ALLOC_SUCCESS : MEM_STAT_PHY_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++} ++ ++inline u8* dbg_rtw_zmalloc(u32 sz, const char *func, int line) ++{ ++ u8 *p; ++ ++ if((sz)>4096) ++ DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%d)\n", func, line, __FUNCTION__, (sz)); ++ ++ p = _rtw_zmalloc((sz)); ++ ++ rtw_update_mem_stat( ++ p ? MEM_STAT_PHY_ALLOC_SUCCESS : MEM_STAT_PHY_ALLOC_FAIL ++ , sz ++ ); ++ ++ return p; ++ ++} ++ ++inline void dbg_rtw_mfree(u8 *pbuf, u32 sz, const char *func, int line) ++{ ++ if((sz)>4096) ++ DBG_871X("DBG_MEM_ALLOC !!!!!!!!!!!!!! %s:%d %s(%p,%d)\n", func, line, __FUNCTION__, (pbuf), (sz)); ++ ++ _rtw_mfree((pbuf), (sz)); ++ ++ rtw_update_mem_stat( ++ MEM_STAT_PHY_FREE ++ , sz ++ ); ++} ++#endif ++ ++ ++void _rtw_memcpy(void* dst, void* src, u32 sz) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ memcpy(dst, src, sz); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMoveMemory(dst, src, sz); ++ ++#endif ++ ++} ++ ++int _rtw_memcmp(void *dst, void *src, u32 sz) ++{ ++ ++#ifdef PLATFORM_LINUX ++//under Linux/GNU/GLibc, the return value of memcmp for two same mem. chunk is 0 ++ ++ if (!(memcmp(dst, src, sz))) ++ return _TRUE; ++ else ++ return _FALSE; ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++//under Windows, the return value of NdisEqualMemory for two same mem. chunk is 1 ++ ++ if (NdisEqualMemory (dst, src, sz)) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++ ++ ++ ++} ++ ++void _rtw_memset(void *pbuf, int c, u32 sz) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ memset(pbuf, c, sz); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++#if 0 ++ NdisZeroMemory(pbuf, sz); ++ if (c != 0) memset(pbuf, c, sz); ++#else ++ NdisFillMemory(pbuf, sz, c); ++#endif ++#endif ++ ++} ++ ++void _rtw_init_listhead(_list *list) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ INIT_LIST_HEAD(list); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisInitializeListHead(list); ++ ++#endif ++ ++} ++ ++ ++/* ++For the following list_xxx operations, ++caller must guarantee the atomic context. ++Otherwise, there will be racing condition. ++*/ ++u32 rtw_is_list_empty(_list *phead) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ if (list_empty(phead)) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++ if (IsListEmpty(phead)) ++ return _TRUE; ++ else ++ return _FALSE; ++ ++#endif ++ ++ ++} ++ ++ ++void rtw_list_insert_tail(_list *plist, _list *phead) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ list_add_tail(plist, phead); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ InsertTailList(phead, plist); ++ ++#endif ++ ++} ++ ++ ++/* ++ ++Caller must check if the list is empty before calling rtw_list_delete ++ ++*/ ++ ++ ++void _rtw_init_sema(_sema *sema, int init_val) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ sema_init(sema, init_val); ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++ KeInitializeSemaphore(sema, init_val, SEMA_UPBND); // count=0; ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ if(*sema == NULL) ++ *sema = CreateSemaphore(NULL, init_val, SEMA_UPBND, NULL); ++#endif ++ ++} ++ ++void _rtw_free_sema(_sema *sema) ++{ ++ ++#ifdef PLATFORM_OS_CE ++ CloseHandle(*sema); ++#endif ++ ++} ++ ++void _rtw_up_sema(_sema *sema) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ up(sema); ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++ KeReleaseSemaphore(sema, IO_NETWORK_INCREMENT, 1, FALSE ); ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ ReleaseSemaphore(*sema, 1, NULL ); ++#endif ++} ++ ++u32 _rtw_down_sema(_sema *sema) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ if (down_interruptible(sema)) ++ return _FAIL; ++ else ++ return _SUCCESS; ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++ if(STATUS_SUCCESS == KeWaitForSingleObject(sema, Executive, KernelMode, TRUE, NULL)) ++ return _SUCCESS; ++ else ++ return _FAIL; ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ if(WAIT_OBJECT_0 == WaitForSingleObject(*sema, INFINITE )) ++ return _SUCCESS; ++ else ++ return _FAIL; ++#endif ++} ++ ++ ++ ++void _rtw_mutex_init(_mutex *pmutex) ++{ ++#ifdef PLATFORM_LINUX ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_init(pmutex); ++#else ++ init_MUTEX(pmutex); ++#endif ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++ KeInitializeMutex(pmutex, 0); ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ *pmutex = CreateMutex( NULL, _FALSE, NULL); ++#endif ++} ++ ++ ++void _rtw_mutex_free(_mutex *pmutex) ++{ ++#ifdef PLATFORM_LINUX ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) ++ mutex_destroy(pmutex); ++#else ++#endif ++ ++#endif ++ ++#ifdef PLATFORM_OS_XP ++ ++#endif ++ ++#ifdef PLATFORM_OS_CE ++ ++#endif ++} ++ ++void _rtw_spinlock_init(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock_init(plock); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAllocateSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinlock_free(_lock *plock) ++{ ++ ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisFreeSpinLock(plock); ++ ++#endif ++ ++} ++ ++ ++void _rtw_spinlock(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock(plock); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisAcquireSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinunlock(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_unlock(plock); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisReleaseSpinLock(plock); ++ ++#endif ++} ++ ++ ++void _rtw_spinlock_ex(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_lock(plock); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisDprAcquireSpinLock(plock); ++ ++#endif ++ ++} ++ ++void _rtw_spinunlock_ex(_lock *plock) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ spin_unlock(plock); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisDprReleaseSpinLock(plock); ++ ++#endif ++} ++ ++ ++ ++void _rtw_init_queue(_queue *pqueue) ++{ ++ ++ _rtw_init_listhead(&(pqueue->queue)); ++ ++ _rtw_spinlock_init(&(pqueue->lock)); ++ ++} ++ ++u32 _rtw_queue_empty(_queue *pqueue) ++{ ++ return (rtw_is_list_empty(&(pqueue->queue))); ++} ++ ++ ++u32 rtw_end_of_queue_search(_list *head, _list *plist) ++{ ++ if (head == plist) ++ return _TRUE; ++ else ++ return _FALSE; ++} ++ ++ ++u32 rtw_get_current_time(void) ++{ ++ ++#ifdef PLATFORM_LINUX ++ return jiffies; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ LARGE_INTEGER SystemTime; ++ NdisGetCurrentSystemTime(&SystemTime); ++ return (u32)(SystemTime.LowPart);// count of 100-nanosecond intervals ++#endif ++} ++ ++inline u32 rtw_systime_to_ms(u32 systime) ++{ ++#ifdef PLATFORM_LINUX ++ return systime*1000/HZ; ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ return systime /10000 ; ++#endif ++} ++ ++// the input parameter start use the same unit as returned by rtw_get_current_time ++inline s32 rtw_get_passing_time_ms(u32 start) ++{ ++#ifdef PLATFORM_LINUX ++ return rtw_systime_to_ms(jiffies-start); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ LARGE_INTEGER SystemTime; ++ NdisGetCurrentSystemTime(&SystemTime); ++ return rtw_systime_to_ms((u32)(SystemTime.LowPart) - start) ; ++#endif ++} ++ ++inline s32 rtw_get_time_interval_ms(u32 start, u32 end) ++{ ++#ifdef PLATFORM_LINUX ++ return rtw_systime_to_ms(end-start); ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ return rtw_systime_to_ms(end-start); ++#endif ++} ++ ++ ++void rtw_sleep_schedulable(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ u32 delta; ++ ++ delta = (ms * HZ)/1000;//(ms) ++ if (delta == 0) { ++ delta = 1;// 1 ms ++ } ++ set_current_state(TASK_INTERRUPTIBLE); ++ if (schedule_timeout(delta) != 0) { ++ return ; ++ } ++ return; ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++} ++ ++ ++void rtw_msleep_os(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ msleep((unsigned int)ms); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void rtw_usleep_os(int us) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ // msleep((unsigned int)us); ++ if ( 1 < (us/1000) ) ++ msleep(1); ++ else ++ msleep( (us/1000) + 1); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisMSleep(us); //(us) ++ ++#endif ++ ++ ++} ++ ++ ++#ifdef DBG_DELAY_OS ++void _rtw_mdelay_os(int ms, const char *func, const int line) ++{ ++ #if 0 ++ if(ms>10) ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); ++ rtw_msleep_os(ms); ++ return; ++ #endif ++ ++ ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, ms); ++ ++#if defined(PLATFORM_LINUX) ++ ++ mdelay((unsigned long)ms); ++ ++#elif defined(PLATFORM_WINDOWS) ++ ++ NdisStallExecution(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void _rtw_udelay_os(int us, const char *func, const int line) ++{ ++ ++ #if 0 ++ if(us > 1000) { ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); ++ rtw_usleep_os(us); ++ return; ++ } ++ #endif ++ ++ ++ DBG_871X("%s:%d %s(%d)\n", func, line, __FUNCTION__, us); ++ ++ ++#if defined(PLATFORM_LINUX) ++ ++ udelay((unsigned long)us); ++ ++#elif defined(PLATFORM_WINDOWS) ++ ++ NdisStallExecution(us); //(us) ++ ++#endif ++ ++} ++#else ++void rtw_mdelay_os(int ms) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ mdelay((unsigned long)ms); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisStallExecution(ms*1000); //(us)*1000=(ms) ++ ++#endif ++ ++ ++} ++void rtw_udelay_os(int us) ++{ ++ ++#ifdef PLATFORM_LINUX ++ ++ udelay((unsigned long)us); ++ ++#endif ++ ++#ifdef PLATFORM_WINDOWS ++ ++ NdisStallExecution(us); //(us) ++ ++#endif ++ ++} ++#endif ++ ++#define RTW_SUSPEND_LOCK_NAME "rtw_wifi" ++ ++#ifdef CONFIG_WAKELOCK ++static struct wake_lock rtw_suspend_lock; ++#elif defined(CONFIG_ANDROID_POWER) ++static android_suspend_lock_t rtw_suspend_lock ={ ++ .name = RTW_SUSPEND_LOCK_NAME ++}; ++#endif ++ ++inline void rtw_suspend_lock_init() ++{ ++ #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) ++ DBG_871X("##########%s ###########\n", __FUNCTION__); ++ #endif ++ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock_init(&rtw_suspend_lock, WAKE_LOCK_SUSPEND, RTW_SUSPEND_LOCK_NAME); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_init_suspend_lock(&rtw_suspend_lock); ++ #endif ++ ++} ++ ++inline void rtw_suspend_lock_uninit() ++{ ++ ++ #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) ++ DBG_871X("##########%s###########\n", __FUNCTION__); ++ if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) { ++ DBG_871X("##########%s########### list poison!!\n", __FUNCTION__); ++ return; ++ } ++ #endif ++ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock_destroy(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_uninit_suspend_lock(&rtw_suspend_lock); ++ #endif ++} ++ ++ ++inline void rtw_lock_suspend() ++{ ++ ++ #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) ++ //DBG_871X("##########%s###########\n", __FUNCTION__); ++ if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) { ++ DBG_871X("##########%s########### list poison!!\n", __FUNCTION__); ++ return; ++ } ++ #endif ++ ++ #ifdef CONFIG_WAKELOCK ++ wake_lock(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_lock_suspend(&rtw_suspend_lock); ++ #endif ++} ++ ++inline void rtw_unlock_suspend() ++{ ++ #if defined(CONFIG_WAKELOCK) || defined(CONFIG_ANDROID_POWER) ++ //DBG_871X("##########%s###########\n", __FUNCTION__); ++ if(rtw_suspend_lock.link.next == LIST_POISON1 || rtw_suspend_lock.link.prev == LIST_POISON2) { ++ DBG_871X("##########%s########### list poison!!\n", __FUNCTION__); ++ return; ++ } ++ #endif ++ ++ #ifdef CONFIG_WAKELOCK ++ wake_unlock(&rtw_suspend_lock); ++ #elif defined(CONFIG_ANDROID_POWER) ++ android_unlock_suspend(&rtw_suspend_lock); ++ #endif ++} ++ ++ ++inline void ATOMIC_SET(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_set(v,i); ++ #elif defined(PLATFORM_WINDOWS) ++ *v=i;// other choice???? ++ #endif ++} ++ ++inline int ATOMIC_READ(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_read(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return *v; // other choice???? ++ #endif ++} ++ ++inline void ATOMIC_ADD(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_add(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedAdd(v,i); ++ #endif ++} ++inline void ATOMIC_SUB(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_sub(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedAdd(v,-i); ++ #endif ++} ++ ++inline void ATOMIC_INC(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_inc(v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedIncrement(v); ++ #endif ++} ++ ++inline void ATOMIC_DEC(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ atomic_dec(v); ++ #elif defined(PLATFORM_WINDOWS) ++ InterlockedDecrement(v); ++ #endif ++} ++ ++inline int ATOMIC_ADD_RETURN(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_add_return(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedAdd(v,i); ++ #endif ++} ++ ++inline int ATOMIC_SUB_RETURN(ATOMIC_T *v, int i) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_sub_return(i,v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedAdd(v,-i); ++ #endif ++} ++ ++inline int ATOMIC_INC_RETURN(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_inc_return(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedIncrement(v); ++ #endif ++} ++ ++inline int ATOMIC_DEC_RETURN(ATOMIC_T *v) ++{ ++ #ifdef PLATFORM_LINUX ++ return atomic_dec_return(v); ++ #elif defined(PLATFORM_WINDOWS) ++ return InterlockedDecrement(v); ++ #endif ++} ++ ++ ++#ifdef PLATFORM_LINUX ++/* ++* Open a file with the specific @param path, @param flag, @param mode ++* @param fpp the pointer of struct file pointer to get struct file pointer while file opening is success ++* @param path the path of the file to open ++* @param flag file operation flags, please refer to linux document ++* @param mode please refer to linux document ++* @return Linux specific error code ++*/ ++static int openFile(struct file **fpp, char *path, int flag, int mode) ++{ ++ struct file *fp; ++ ++ fp=filp_open(path, flag, mode); ++ if(IS_ERR(fp)) { ++ *fpp=NULL; ++ return PTR_ERR(fp); ++ } ++ else { ++ *fpp=fp; ++ return 0; ++ } ++} ++ ++/* ++* Close the file with the specific @param fp ++* @param fp the pointer of struct file to close ++* @return always 0 ++*/ ++static int closeFile(struct file *fp) ++{ ++ filp_close(fp,NULL); ++ return 0; ++} ++ ++static int readFile(struct file *fp,char *buf,int len) ++{ ++ int rlen=0, sum=0; ++ ++ if (!fp->f_op || !fp->f_op->read) ++ return -EPERM; ++ ++ while(sumf_op->read(fp,buf+sum,len-sum, &fp->f_pos); ++ if(rlen>0) ++ sum+=rlen; ++ else if(0 != rlen) ++ return rlen; ++ else ++ break; ++ } ++ ++ return sum; ++ ++} ++ ++static int writeFile(struct file *fp,char *buf,int len) ++{ ++ int wlen=0, sum=0; ++ ++ if (!fp->f_op || !fp->f_op->write) ++ return -EPERM; ++ ++ while(sumf_op->write(fp,buf+sum,len-sum, &fp->f_pos); ++ if(wlen>0) ++ sum+=wlen; ++ else if(0 != wlen) ++ return wlen; ++ else ++ break; ++ } ++ ++ return sum; ++ ++} ++ ++/* ++* Test if the specifi @param path is a file and readable ++* @param path the path of the file to test ++* @return Linux specific error code ++*/ ++static int isFileReadable(char *path) ++{ ++ struct file *fp; ++ int ret = 0; ++ mm_segment_t oldfs; ++ char buf; ++ ++ fp=filp_open(path, O_RDONLY, 0); ++ if(IS_ERR(fp)) { ++ ret = PTR_ERR(fp); ++ } ++ else { ++ oldfs = get_fs(); set_fs(get_ds()); ++ ++ if(1!=readFile(fp, &buf, 1)) ++ ret = PTR_ERR(fp); ++ ++ set_fs(oldfs); ++ filp_close(fp,NULL); ++ } ++ return ret; ++} ++ ++/* ++* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most ++* @param path the path of the file to open and read ++* @param buf the starting address of the buffer to store file content ++* @param sz how many bytes to read at most ++* @return the byte we've read, or Linux specific error code ++*/ ++static int retriveFromFile(char *path, u8* buf, u32 sz) ++{ ++ int ret =-1; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && buf) { ++ if( 0 == (ret=openFile(&fp,path, O_RDONLY, 0)) ){ ++ DBG_8192C("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); ++ ++ oldfs = get_fs(); set_fs(get_ds()); ++ ret=readFile(fp, buf, sz); ++ set_fs(oldfs); ++ closeFile(fp); ++ ++ DBG_8192C("%s readFile, ret:%d\n",__FUNCTION__, ret); ++ ++ } else { ++ DBG_8192C("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); ++ } ++ } else { ++ DBG_8192C("%s NULL pointer\n",__FUNCTION__); ++ ret = -EINVAL; ++ } ++ return ret; ++} ++ ++/* ++* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file ++* @param path the path of the file to open and write ++* @param buf the starting address of the data to write into file ++* @param sz how many bytes to write at most ++* @return the byte we've written, or Linux specific error code ++*/ ++static int storeToFile(char *path, u8* buf, u32 sz) ++{ ++ int ret =0; ++ mm_segment_t oldfs; ++ struct file *fp; ++ ++ if(path && buf) { ++ if( 0 == (ret=openFile(&fp, path, O_CREAT|O_WRONLY, 0666)) ) { ++ DBG_8192C("%s openFile path:%s fp=%p\n",__FUNCTION__, path ,fp); ++ ++ oldfs = get_fs(); set_fs(get_ds()); ++ ret=writeFile(fp, buf, sz); ++ set_fs(oldfs); ++ closeFile(fp); ++ ++ DBG_8192C("%s writeFile, ret:%d\n",__FUNCTION__, ret); ++ ++ } else { ++ DBG_8192C("%s openFile path:%s Fail, ret:%d\n",__FUNCTION__, path, ret); ++ } ++ } else { ++ DBG_8192C("%s NULL pointer\n",__FUNCTION__); ++ ret = -EINVAL; ++ } ++ return ret; ++} ++#endif //PLATFORM_LINUX ++ ++/* ++* Test if the specifi @param path is a file and readable ++* @param path the path of the file to test ++* @return _TRUE or _FALSE ++*/ ++int rtw_is_file_readable(char *path) ++{ ++#ifdef PLATFORM_LINUX ++ if(isFileReadable(path) == 0) ++ return _TRUE; ++ else ++ return _FALSE; ++#else ++ //Todo... ++ return _FALSE; ++#endif ++} ++ ++/* ++* Open the file with @param path and retrive the file content into memory starting from @param buf for @param sz at most ++* @param path the path of the file to open and read ++* @param buf the starting address of the buffer to store file content ++* @param sz how many bytes to read at most ++* @return the byte we've read ++*/ ++int rtw_retrive_from_file(char *path, u8* buf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ int ret =retriveFromFile(path, buf, sz); ++ return ret>=0?ret:0; ++#else ++ //Todo... ++ return 0; ++#endif ++} ++ ++/* ++* Open the file with @param path and wirte @param sz byte of data starting from @param buf into the file ++* @param path the path of the file to open and write ++* @param buf the starting address of the data to write into file ++* @param sz how many bytes to write at most ++* @return the byte we've written ++*/ ++int rtw_store_to_file(char *path, u8* buf, u32 sz) ++{ ++#ifdef PLATFORM_LINUX ++ int ret =storeToFile(path, buf, sz); ++ return ret>=0?ret:0; ++#else ++ //Todo... ++ return 0; ++#endif ++} ++ ++#if 1 //#ifdef MEM_ALLOC_REFINE_ADAPTOR ++#ifdef PLATFORM_LINUX ++struct net_device *rtw_alloc_etherdev_with_old_priv(int sizeof_priv, void *old_priv) ++{ ++ struct net_device *pnetdev; ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!pnetdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(pnetdev); ++ pnpi->priv=old_priv; ++ pnpi->sizeof_priv=sizeof_priv; ++ ++RETURN: ++ return pnetdev; ++} ++ ++struct net_device *rtw_alloc_etherdev(int sizeof_priv) ++{ ++ struct net_device *pnetdev; ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++ pnetdev = alloc_etherdev(sizeof(struct rtw_netdev_priv_indicator)); ++ if (!pnetdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(pnetdev); ++ ++ pnpi->priv = rtw_zvmalloc(sizeof_priv); ++ if (!pnpi->priv) { ++ free_netdev(pnetdev); ++ pnetdev = NULL; ++ goto RETURN; ++ } ++ ++ pnpi->sizeof_priv=sizeof_priv; ++RETURN: ++ return pnetdev; ++} ++ ++void rtw_free_netdev(struct net_device * netdev) ++{ ++ struct rtw_netdev_priv_indicator *pnpi; ++ ++ if(!netdev) ++ goto RETURN; ++ ++ pnpi = netdev_priv(netdev); ++ ++ if(!pnpi->priv) ++ goto RETURN; ++ ++ rtw_vmfree(pnpi->priv, pnpi->sizeof_priv); ++ free_netdev(netdev); ++ ++RETURN: ++ return; ++} ++ ++/* ++* Jeff: this function should be called under ioctl (rtnl_lock is accquired) while ++* LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) ++*/ ++int rtw_change_ifname(_adapter *padapter, const char *ifname) ++{ ++ struct net_device *pnetdev; ++ struct net_device *cur_pnetdev = padapter->pnetdev; ++ struct rereg_nd_name_data *rereg_priv; ++ int ret; ++ ++ if(!padapter) ++ goto error; ++ ++ rereg_priv = &padapter->rereg_nd_name_priv; ++ ++ //free the old_pnetdev ++ if(rereg_priv->old_pnetdev) { ++ free_netdev(rereg_priv->old_pnetdev); ++ rereg_priv->old_pnetdev = NULL; ++ } ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) ++ if(!rtnl_is_locked()) ++ unregister_netdev(cur_pnetdev); ++ else ++#endif ++ unregister_netdevice(cur_pnetdev); ++ ++ #ifdef CONFIG_PROC_DEBUG ++ rtw_proc_remove_one(cur_pnetdev); ++ #endif //CONFIG_PROC_DEBUG ++ ++ rereg_priv->old_pnetdev=cur_pnetdev; ++ ++ pnetdev = rtw_init_netdev(padapter); ++ if (!pnetdev) { ++ ret = -1; ++ goto error; ++ } ++ ++#ifdef CONFIG_USB_HCI ++ ++ SET_NETDEV_DEV(pnetdev, &padapter->dvobjpriv.pusbintf->dev); ++ ++ usb_set_intfdata(padapter->dvobjpriv.pusbintf, pnetdev); ++ ++#elif defined(CONFIG_PCI_HCI) ++ ++#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) ++ SET_NETDEV_DEV(pnetdev, &padapter->dvobjpriv.ppcidev->dev); ++#endif ++ ++ pci_set_drvdata(padapter->dvobjpriv.ppcidev, pnetdev); ++ ++#endif ++ ++ rtw_init_netdev_name(pnetdev, ifname); ++ ++ _rtw_memcpy(pnetdev->dev_addr, padapter->eeprompriv.mac_addr, ETH_ALEN); ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26)) ++ if(!rtnl_is_locked()) ++ ret = register_netdev(pnetdev); ++ else ++#endif ++ ret = register_netdevice(pnetdev); ++ ++ if ( ret != 0) { ++ RT_TRACE(_module_hci_intfs_c_,_drv_err_,("register_netdev() failed\n")); ++ goto error; ++ } ++ ++ #ifdef CONFIG_PROC_DEBUG ++ rtw_proc_init_one(pnetdev); ++ #endif //CONFIG_PROC_DEBUG ++ ++ return 0; ++ ++error: ++ ++ return -1; ++ ++} ++#endif ++#endif //MEM_ALLOC_REFINE_ADAPTOR ++ ++u64 rtw_modular64(u64 x, u64 y) ++{ ++#ifdef PLATFORM_LINUX ++ return do_div(x, y); ++#elif defined(PLATFORM_WINDOWS) ++ return (x % y); ++#endif ++} ++ ++u64 rtw_division64(u64 x, u64 y) ++{ ++#ifdef PLATFORM_LINUX ++ do_div(x, y); ++ return x; ++#elif defined(PLATFORM_WINDOWS) ++ return (x / y); ++#endif ++} ++ ++#ifdef PLATFORM_LINUX ++int start_kthread(_thread_hdl_ *t_hdl, int (*threadfn)(void *data), ++ void *data, const char *name) ++{ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(3,7,0)) ++ *t_hdl = kernel_thread(threadfn, data, CLONE_FS|CLONE_FILES); ++ if(*t_hdl < 0) ++#else ++ *t_hdl = kthread_run(threadfn, data, name); ++ if(IS_ERR(*t_hdl)) ++#endif ++ return 0; ++ return -1; ++} ++#endif ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/wlan0dhcp +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/wlan0dhcp 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1,16 @@ ++#!/bin/bash ++ ++var0=`ps aux|awk '/dhclient wlan0/'|awk '$11!="awk"{print $2}'` ++ ++kill $var0 ++cp ifcfg-wlan0 /etc/sysconfig/network-scripts/ ++ ++dhclient wlan0 ++ ++var1=`ifconfig wlan0 |awk '/inet/{print $2}'|awk -F: '{print $2}'` ++ ++ ++rm -f /etc/sysconfig/network-scripts/ifcfg-wlan0 ++ ++echo "get ip: $var1" ++ +Index: linux-3.10-3.10.11/dummy/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1598_0c32f49fc4c3b33678fcdb7a17f7437656a51ecf.txt 2014-04-28 00:42:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.patch --- linux-3.10.11/debian/patches/rpi/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.patch 2014-04-28 00:42:52.000000000 +0000 @@ -0,0 +1,37 @@ +commit 3b3e72ee6dba9f16727dcae20c0faa8a12e4361d +Author: Jo Are By +Date: Sun Mar 17 17:45:41 2013 +0100 + + Add device ID (330d) + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c 2014-04-28 00:42:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/hal/rtl8192c/usb/usb_halinit.c 2014-04-28 00:42:51.000000000 +0000 +@@ -3786,6 +3786,8 @@ + pHalData->CustomerID = RT_CID_DLINK; + else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330a)) + pHalData->CustomerID = RT_CID_DLINK; ++ else if((pHalData->EEPROMVID == 0x2001) && (pHalData->EEPROMPID == 0x330d)) ++ pHalData->CustomerID = RT_CID_DLINK; + break; + case EEPROM_CID_WHQL: + /* +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c 2014-04-28 00:42:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c 2014-04-28 00:42:51.000000000 +0000 +@@ -137,6 +137,7 @@ + {USB_DEVICE(0x2001, 0x3307)},//D-Link - Cameo + {USB_DEVICE(0x2001, 0x330A)},//D-Link - Alpha + {USB_DEVICE(0x2001, 0x3309)},//D-Link - Alpha ++ {USB_DEVICE(0x2001, 0x330D)},//D-Link - Alpha(?) + {USB_DEVICE(0x0586, 0x341F)},//Zyxel - Abocom + {USB_DEVICE(0x7392, 0x7822)},//Edimax - Edimax + {USB_DEVICE(0x2019, 0xAB2B)},//Planex - Abocom +Index: linux-3.10-3.10.11/dummy/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1599_3b3e72ee6dba9f16727dcae20c0faa8a12e4361d.txt 2014-04-28 00:42:51.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.patch 2014-04-28 00:42:53.000000000 +0000 @@ -0,0 +1,105 @@ +commit 364ae653ac6dc441df61be2b9a18c25c4afb6ad4 +Author: popcornmix +Date: Sat Sep 8 15:17:53 2012 +0100 + + Avoid dynamic memory allocation for channel lock in USB driver. Thanks ddv2005. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:52.000000000 +0000 +@@ -822,6 +822,7 @@ + } else if (dwc_otg_hcd->status_buf != NULL) { + DWC_FREE(dwc_otg_hcd->status_buf); + } ++ DWC_SPINLOCK_FREE(dwc_otg_hcd->channel_lock); + DWC_SPINLOCK_FREE(dwc_otg_hcd->lock); + /* Set core_if's lock pointer to NULL */ + dwc_otg_hcd->core_if->lock = NULL; +@@ -848,6 +849,7 @@ + dwc_hc_t *channel; + + hcd->lock = DWC_SPINLOCK_ALLOC(); ++ hcd->channel_lock = DWC_SPINLOCK_ALLOC(); + DWC_DEBUGPL(DBG_HCDV, "init of HCD %p given core_if %p\n", + hcd, core_if); + if (!hcd->lock) { +@@ -1248,7 +1250,7 @@ + dwc_otg_qh_t *qh; + int num_channels; + dwc_irqflags_t flags; +- dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ dwc_spinlock_t *channel_lock = hcd->channel_lock; + dwc_otg_transaction_type_e ret_val = DWC_OTG_TRANSACTION_NONE; + + #ifdef DEBUG_SOF +@@ -1348,8 +1350,6 @@ + #ifdef DEBUG_HOST_CHANNELS + last_sel_trans_num_avail_hc_at_end = hcd->available_host_channels; + #endif /* DEBUG_HOST_CHANNELS */ +- +- DWC_SPINLOCK_FREE(channel_lock); + return ret_val; + } + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:52.000000000 +0000 +@@ -548,7 +548,7 @@ + + /* */ + dwc_spinlock_t *lock; +- ++ dwc_spinlock_t *channel_lock; + /** + * Private data that could be used by OS wrapper. + */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_ddma.c 2014-04-28 00:42:52.000000000 +0000 +@@ -276,7 +276,7 @@ + static void release_channel_ddma(dwc_otg_hcd_t * hcd, dwc_otg_qh_t * qh) + { + dwc_irqflags_t flags; +- dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ dwc_spinlock_t *channel_lock = hcd->channel_lock; + + dwc_hc_t *hc = qh->channel; + if (dwc_qh_is_non_per(qh)) { +@@ -306,7 +306,6 @@ + dwc_memset(qh->desc_list, 0x00, + sizeof(dwc_otg_host_dma_desc_t) * max_desc_num(qh)); + } +- DWC_SPINLOCK_FREE(channel_lock); + } + + /** +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:52.000000000 +0000 +@@ -922,7 +922,7 @@ + dwc_otg_transaction_type_e tr_type; + int free_qtd; + dwc_irqflags_t flags; +- dwc_spinlock_t *channel_lock = DWC_SPINLOCK_ALLOC(); ++ dwc_spinlock_t *channel_lock = hcd->channel_lock; + + DWC_DEBUGPL(DBG_HCDV, " %s: channel %d, halt_status %d, xfer_len %d\n", + __func__, hc->hc_num, halt_status, hc->xfer_len); +@@ -1009,7 +1009,6 @@ + if (tr_type != DWC_OTG_TRANSACTION_NONE) { + dwc_otg_hcd_queue_transactions(hcd, tr_type); + } +- DWC_SPINLOCK_FREE(channel_lock); + } + + /** +Index: linux-3.10-3.10.11/dummy/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1600_364ae653ac6dc441df61be2b9a18c25c4afb6ad4.txt 2014-04-28 00:42:52.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.patch --- linux-3.10.11/debian/patches/rpi/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.patch 2014-04-28 00:42:54.000000000 +0000 @@ -0,0 +1,296 @@ +commit 751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad +Author: popcornmix +Date: Sat Nov 2 22:44:41 2013 +0000 + + Add cpufreq driver + +Index: linux-3.10-3.10.11/arch/arm/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/Kconfig 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/Kconfig 2014-04-28 00:42:53.000000000 +0000 +@@ -369,6 +369,7 @@ + select HAVE_SCHED_CLOCK + select NEED_MACH_MEMORY_H + select CLKDEV_LOOKUP ++ select ARCH_HAS_CPUFREQ + select GENERIC_CLOCKEVENTS + select ARM_ERRATA_411920 + select MACH_BCM2708 +Index: linux-3.10-3.10.11/drivers/cpufreq/Kconfig.arm +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpufreq/Kconfig.arm 2014-04-27 23:37:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpufreq/Kconfig.arm 2014-04-28 00:42:53.000000000 +0000 +@@ -150,3 +150,11 @@ + default y + help + This adds the CPUFreq driver support for SPEAr SOCs. ++ ++config ARM_BCM2835_CPUFREQ ++ bool "BCM2835 Driver" ++ default y ++ help ++ This adds the CPUFreq driver for BCM2835 ++ ++ If in doubt, say N. +Index: linux-3.10-3.10.11/drivers/cpufreq/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/cpufreq/Makefile 2014-04-27 23:37:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpufreq/Makefile 2014-04-28 00:42:53.000000000 +0000 +@@ -72,6 +72,7 @@ + obj-$(CONFIG_ARM_SA1110_CPUFREQ) += sa1110-cpufreq.o + obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o + obj-$(CONFIG_ARCH_TEGRA) += tegra-cpufreq.o ++obj-$(CONFIG_ARM_BCM2835_CPUFREQ) += bcm2835-cpufreq.o + + ################################################################################## + # PowerPC platform drivers +Index: linux-3.10-3.10.11/drivers/cpufreq/bcm2835-cpufreq.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/cpufreq/bcm2835-cpufreq.c 2014-04-28 00:42:53.000000000 +0000 +@@ -0,0 +1,239 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++/***************************************************************************** ++* FILENAME: bcm2835-cpufreq.h ++* DESCRIPTION: This driver dynamically manages the CPU Frequency of the ARM ++* processor. Messages are sent to Videocore either setting or requesting the ++* frequency of the ARM in order to match an appropiate frequency to the current ++* usage of the processor. The policy which selects the frequency to use is ++* defined in the kernel .config file, but can be changed during runtime. ++*****************************************************************************/ ++ ++/* ---------- INCLUDES ---------- */ ++#include ++#include ++#include ++#include ++#include ++ ++/* ---------- DEFINES ---------- */ ++/*#define CPUFREQ_DEBUG_ENABLE*/ /* enable debugging */ ++#define MODULE_NAME "bcm2835-cpufreq" ++ ++#define VCMSG_ID_ARM_CLOCK 0x000000003 /* Clock/Voltage ID's */ ++ ++/* debug printk macros */ ++#ifdef CPUFREQ_DEBUG_ENABLE ++#define print_debug(fmt,...) pr_debug("%s:%s:%d: "fmt, MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) ++#else ++#define print_debug(fmt,...) ++#endif ++#define print_err(fmt,...) pr_err("%s:%s:%d: "fmt, MODULE_NAME, __func__,__LINE__, ##__VA_ARGS__) ++#define print_info(fmt,...) pr_info("%s: "fmt, MODULE_NAME, ##__VA_ARGS__) ++ ++/* tag part of the message */ ++struct vc_msg_tag { ++ uint32_t tag_id; /* the message id */ ++ uint32_t buffer_size; /* size of the buffer (which in this case is always 8 bytes) */ ++ uint32_t data_size; /* amount of data being sent or received */ ++ uint32_t dev_id; /* the ID of the clock/voltage to get or set */ ++ uint32_t val; /* the value (e.g. rate (in Hz)) to set */ ++}; ++ ++/* message structure to be sent to videocore */ ++struct vc_msg { ++ uint32_t msg_size; /* simply, sizeof(struct vc_msg) */ ++ uint32_t request_code; /* holds various information like the success and number of bytes returned (refer to mailboxes wiki) */ ++ struct vc_msg_tag tag; /* the tag structure above to make */ ++ uint32_t end_tag; /* an end identifier, should be set to NULL */ ++}; ++ ++/* ---------- GLOBALS ---------- */ ++static struct cpufreq_driver bcm2835_cpufreq_driver; /* the cpufreq driver global */ ++ ++/* ++ =============================================== ++ clk_rate either gets or sets the clock rates. ++ =============================================== ++*/ ++static uint32_t bcm2835_cpufreq_set_clock(int cur_rate, int arm_rate) ++{ ++ int s, actual_rate=0; ++ struct vc_msg msg; ++ ++ /* wipe all previous message data */ ++ memset(&msg, 0, sizeof msg); ++ ++ msg.msg_size = sizeof msg; ++ ++ msg.tag.tag_id = VCMSG_SET_CLOCK_RATE; ++ msg.tag.buffer_size = 8; ++ msg.tag.data_size = 8; /* we're sending the clock ID and the new rates which is a total of 2 words */ ++ msg.tag.dev_id = VCMSG_ID_ARM_CLOCK; ++ msg.tag.val = arm_rate * 1000; ++ ++ /* send the message */ ++ s = bcm_mailbox_property(&msg, sizeof msg); ++ ++ /* check if it was all ok and return the rate in KHz */ ++ if (s == 0 && (msg.request_code & 0x80000000)) ++ actual_rate = msg.tag.val/1000; ++ ++ print_debug("Setting new frequency = %d -> %d (actual %d)\n", cur_rate, arm_rate, actual_rate); ++ return actual_rate; ++} ++ ++static uint32_t bcm2835_cpufreq_get_clock(int tag) ++{ ++ int s; ++ int arm_rate = 0; ++ struct vc_msg msg; ++ ++ /* wipe all previous message data */ ++ memset(&msg, 0, sizeof msg); ++ ++ msg.msg_size = sizeof msg; ++ msg.tag.tag_id = tag; ++ msg.tag.buffer_size = 8; ++ msg.tag.data_size = 4; /* we're just sending the clock ID which is one word long */ ++ msg.tag.dev_id = VCMSG_ID_ARM_CLOCK; ++ ++ /* send the message */ ++ s = bcm_mailbox_property(&msg, sizeof msg); ++ ++ /* check if it was all ok and return the rate in KHz */ ++ if (s == 0 && (msg.request_code & 0x80000000)) ++ arm_rate = msg.tag.val/1000; ++ ++ print_debug("%s frequency = %d\n", ++ tag == VCMSG_GET_CLOCK_RATE ? "Current": ++ tag == VCMSG_GET_MIN_CLOCK ? "Min": ++ tag == VCMSG_GET_MAX_CLOCK ? "Max": ++ "Unexpected", arm_rate); ++ ++ return arm_rate; ++} ++ ++/* ++ ==================================================== ++ Module Initialisation registers the cpufreq driver ++ ==================================================== ++*/ ++static int __init bcm2835_cpufreq_module_init(void) ++{ ++ print_debug("IN\n"); ++ return cpufreq_register_driver(&bcm2835_cpufreq_driver); ++} ++ ++/* ++ ============= ++ Module exit ++ ============= ++*/ ++static void __exit bcm2835_cpufreq_module_exit(void) ++{ ++ print_debug("IN\n"); ++ cpufreq_unregister_driver(&bcm2835_cpufreq_driver); ++ return; ++} ++ ++/* ++ ============================================================== ++ Initialisation function sets up the CPU policy for first use ++ ============================================================== ++*/ ++static int bcm2835_cpufreq_driver_init(struct cpufreq_policy *policy) ++{ ++ /* measured value of how long it takes to change frequency */ ++ policy->cpuinfo.transition_latency = 355000; /* ns */ ++ ++ /* now find out what the maximum and minimum frequencies are */ ++ policy->min = policy->cpuinfo.min_freq = bcm2835_cpufreq_get_clock(VCMSG_GET_MIN_CLOCK); ++ policy->max = policy->cpuinfo.max_freq = bcm2835_cpufreq_get_clock(VCMSG_GET_MAX_CLOCK); ++ policy->cur = bcm2835_cpufreq_get_clock(VCMSG_GET_CLOCK_RATE); ++ ++ print_info("min=%d max=%d cur=%d\n", policy->min, policy->max, policy->cur); ++ return 0; ++} ++ ++/* ++ ================================================================================= ++ Target function chooses the most appropriate frequency from the table to enable ++ ================================================================================= ++*/ ++ ++static int bcm2835_cpufreq_driver_target(struct cpufreq_policy *policy, unsigned int target_freq, unsigned int relation) ++{ ++ unsigned int target = target_freq; ++ unsigned int cur = policy->cur; ++ print_debug("%s: min=%d max=%d cur=%d target=%d\n",policy->governor->name,policy->min,policy->max,policy->cur,target_freq); ++ ++ /* if we are above min and using ondemand, then just use max */ ++ if (strcmp("ondemand", policy->governor->name)==0 && target > policy->min) ++ target = policy->max; ++ /* if the frequency is the same, just quit */ ++ if (target == policy->cur) ++ return 0; ++ ++ /* otherwise were good to set the clock frequency */ ++ policy->cur = bcm2835_cpufreq_set_clock(policy->cur, target); ++ ++ if (!policy->cur) ++ { ++ print_err("Error occurred setting a new frequency (%d)!\n", target); ++ policy->cur = bcm2835_cpufreq_get_clock(VCMSG_GET_CLOCK_RATE); ++ return -EINVAL; ++ } ++ print_debug("Freq %d->%d (min=%d max=%d target=%d request=%d)\n", cur, policy->cur, policy->min, policy->max, target_freq, target); ++ return 0; ++} ++ ++static unsigned int bcm2835_cpufreq_driver_get(unsigned int cpu) ++{ ++ unsigned int actual_rate = bcm2835_cpufreq_get_clock(VCMSG_GET_CLOCK_RATE); ++ print_debug("cpu=%d\n", actual_rate); ++ return actual_rate; ++} ++ ++/* ++ ================================================================================= ++ Verify ensures that when a policy is changed, it is suitable for the CPU to use ++ ================================================================================= ++*/ ++ ++static int bcm2835_cpufreq_driver_verify(struct cpufreq_policy *policy) ++{ ++ print_info("switching to governor %s\n", policy->governor->name); ++ return 0; ++} ++ ++ ++/* the CPUFreq driver */ ++static struct cpufreq_driver bcm2835_cpufreq_driver = { ++ .name = "BCM2835 CPUFreq", ++ .owner = THIS_MODULE, ++ .init = bcm2835_cpufreq_driver_init, ++ .verify = bcm2835_cpufreq_driver_verify, ++ .target = bcm2835_cpufreq_driver_target, ++ .get = bcm2835_cpufreq_driver_get ++}; ++ ++MODULE_AUTHOR("Dorian Peake and Dom Cobley"); ++MODULE_DESCRIPTION("CPU frequency driver for BCM2835 chip"); ++MODULE_LICENSE("GPL"); ++ ++module_init(bcm2835_cpufreq_module_init); ++module_exit(bcm2835_cpufreq_module_exit); ++ +Index: linux-3.10-3.10.11/dummy/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1601_751e9b9efb62e1c8f77e7d2eb9767dcbcd6fafad.txt 2014-04-28 00:42:53.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.patch 2014-04-28 00:42:55.000000000 +0000 @@ -0,0 +1,207 @@ +commit 2506f13a0f5dfc5e52f5208ca524dc914326511a +Author: popcornmix +Date: Mon Apr 8 21:12:48 2013 +0100 + + Add NAK holdoff scheme. Enabled by default, disable with dwc_otg.nak_holdoff_enable=0. Thanks gsh + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:54.000000000 +0000 +@@ -243,6 +243,9 @@ + //Global variable to switch the fiq fix on or off (declared in bcm2708.c) + extern bool fiq_fix_enable; + ++//Global variable to switch the nak holdoff on or off ++bool nak_holdoff_enable = true; ++ + + /** + * This function shows the Driver Version. +@@ -1086,6 +1089,7 @@ + return retval; + } + printk(KERN_DEBUG "dwc_otg: FIQ %s\n", fiq_fix_enable ? "enabled":"disabled"); ++ printk(KERN_DEBUG "dwc_otg: NAK holdoff %s\n", nak_holdoff_enable ? "enabled":"disabled"); + + error = driver_create_file(drv, &driver_attr_version); + #ifdef DEBUG +@@ -1366,9 +1370,10 @@ + module_param(microframe_schedule, bool, 0444); + MODULE_PARM_DESC(microframe_schedule, "Enable the microframe scheduler"); + +- + module_param(fiq_fix_enable, bool, 0444); + MODULE_PARM_DESC(fiq_fix_enable, "Enable the fiq fix"); ++module_param(nak_holdoff_enable, bool, 0444); ++MODULE_PARM_DESC(nak_holdoff_enable, "Enable the NAK holdoff"); + + /** @page "Module Parameters" + * +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:54.000000000 +0000 +@@ -527,6 +527,8 @@ + { + dwc_otg_qh_t *qh; + dwc_otg_qtd_t *urb_qtd; ++ BUG_ON(!hcd); ++ BUG_ON(!dwc_otg_urb); + + #ifdef DEBUG /* integrity checks (Broadcom) */ + +@@ -543,14 +545,17 @@ + return -DWC_E_INVALID; + } + urb_qtd = dwc_otg_urb->qtd; ++ BUG_ON(!urb_qtd); + if (urb_qtd->qh == NULL) { + DWC_ERROR("**** DWC OTG HCD URB Dequeue with QTD with NULL Q handler\n"); + return -DWC_E_INVALID; + } + #else + urb_qtd = dwc_otg_urb->qtd; ++ BUG_ON(!urb_qtd); + #endif + qh = urb_qtd->qh; ++ BUG_ON(!qh); + if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { + if (urb_qtd->in_process) { + dump_channel_info(hcd, qh); +@@ -1309,6 +1314,22 @@ + num_channels - hcd->periodic_channels) && + !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) { + ++ qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); ++ ++ /* ++ * Check to see if this is a NAK'd retransmit, in which case ignore for retransmission ++ * we hold off on bulk retransmissions to reduce NAK interrupt overhead for ++ * cheeky devices that just hold off using NAKs ++ */ ++ if (dwc_full_frame_num(qh->nak_frame) == dwc_full_frame_num(dwc_otg_hcd_get_frame_number(hcd))) { ++ // Make fiq interrupt run on next frame (i.e. 8 uframes) ++ g_next_sched_frame = ((qh->nak_frame + 8) & ~7) & DWC_HFNUM_MAX_FRNUM; ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ continue; ++ } ++ else ++ qh->nak_frame = 0xffff; ++ + if (microframe_schedule) { + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels < 1) { +@@ -1321,7 +1342,6 @@ + last_sel_trans_num_nonper_scheduled++; + #endif /* DEBUG_HOST_CHANNELS */ + } +- qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); + + assign_and_init_hc(hcd, qh); + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:54.000000000 +0000 +@@ -321,6 +321,11 @@ + */ + uint16_t sched_frame; + ++ /* ++ ** Frame a NAK was received on this queue head, used to minimise NAK retransmission ++ */ ++ uint16_t nak_frame; ++ + /** (micro)frame at which last start split was initialized. */ + uint16_t start_split_frame; + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:52.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:54.000000000 +0000 +@@ -56,7 +56,12 @@ + int g_next_sched_frame, g_np_count, g_np_sent, g_work_expected; + static int mphi_int_count = 0 ; + +-extern bool fiq_fix_enable; ++extern bool fiq_fix_enable, nak_holdoff_enable; ++ ++hcchar_data_t nak_hcchar; ++hctsiz_data_t nak_hctsiz; ++hcsplt_data_t nak_hcsplt; ++int nak_count; + + void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void) + { +@@ -230,7 +235,7 @@ + DWC_WRITE_REG32(c_mphi_regs.ctrl, (1<<31)); + mphi_int_count = 0; + } +- int_done++; ++ int_done++; + if((jiffies / HZ) > last_time) + { + /* Once a second output the fiq and irq numbers, useful for debug */ +@@ -1419,6 +1424,18 @@ + "NAK Received--\n", hc->hc_num); + + /* ++ * When we get bulk NAKs then remember this so we holdoff on this qh until ++ * the beginning of the next frame ++ */ ++ switch(dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) { ++ case UE_BULK: ++ //case UE_INTERRUPT: ++ //case UE_CONTROL: ++ if (nak_holdoff_enable) ++ hc->qh->nak_frame = dwc_otg_hcd_get_frame_number(hcd); ++ } ++ ++ /* + * Handle NAK for IN/OUT SSPLIT/CSPLIT transfers, bulk, control, and + * interrupt. Re-start the SSPLIT transfer. + */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:54.000000000 +0000 +@@ -181,6 +181,7 @@ + if (microframe_schedule) + qh->speed = dev_speed; + ++ qh->nak_frame = 0xffff; + + if (((dev_speed == USB_SPEED_LOW) || + (dev_speed == USB_SPEED_FULL)) && +@@ -764,6 +765,24 @@ + int sched_next_periodic_split) + { + if (dwc_qh_is_non_per(qh)) { ++ ++ dwc_otg_qh_t *qh_tmp; ++ dwc_list_link_t *qh_list; ++ DWC_LIST_FOREACH(qh_list, &hcd->non_periodic_sched_inactive) ++ { ++ qh_tmp = DWC_LIST_ENTRY(qh_list, struct dwc_otg_qh, qh_list_entry); ++ if(qh_tmp == qh) ++ { ++ /* ++ * FIQ is being disabled because this one nevers gets a np_count increment ++ * This is still not absolutely correct, but it should fix itself with ++ * just an unnecessary extra interrupt ++ */ ++ g_np_sent = g_np_count; ++ } ++ } ++ ++ + dwc_otg_hcd_qh_remove(hcd, qh); + if (!DWC_CIRCLEQ_EMPTY(&qh->qtd_list)) { + /* Add back to inactive non-periodic schedule. */ +Index: linux-3.10-3.10.11/dummy/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1602_2506f13a0f5dfc5e52f5208ca524dc914326511a.txt 2014-04-28 00:42:54.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.patch --- linux-3.10.11/debian/patches/rpi/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.patch 2014-04-28 00:42:56.000000000 +0000 @@ -0,0 +1,537 @@ +commit 17c4ebbb5f59902f30496b9678e2dfff23616f34 +Author: popcornmix +Date: Tue Mar 26 19:24:24 2013 +0000 + + Added hwmon/thermal driver for reporting core temperature. Thanks Dorian + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:55.000000000 +0000 +@@ -562,6 +562,14 @@ + .resource = bcm2708_bsc1_resources, + }; + ++static struct platform_device bcm2835_hwmon_device = { ++ .name = "bcm2835_hwmon", ++}; ++ ++static struct platform_device bcm2835_thermal_device = { ++ .name = "bcm2835_thermal", ++}; ++ + int __init bcm_register_device(struct platform_device *pdev) + { + int ret; +@@ -682,6 +690,9 @@ + bcm_register_device(&bcm2708_bsc0_device); + bcm_register_device(&bcm2708_bsc1_device); + ++ bcm_register_device(&bcm2835_hwmon_device); ++ bcm_register_device(&bcm2835_thermal_device); ++ + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { + struct amba_device *d = amba_devs[i]; + amba_device_register(d, &iomem_resource); +Index: linux-3.10-3.10.11/drivers/hwmon/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hwmon/Kconfig 2014-04-27 23:37:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hwmon/Kconfig 2014-04-28 00:42:55.000000000 +0000 +@@ -1528,6 +1528,16 @@ + help + Support for the A/D converter on MC13783 and MC13892 PMIC. + ++config SENSORS_BCM2835 ++ depends on THERMAL_BCM2835=n ++ tristate "Broadcom BCM2835 HWMON Driver" ++ help ++ If you say yes here you get support for the hardware ++ monitoring features of the BCM2835 Chip ++ ++ This driver can also be built as a module. If so, the module ++ will be called bcm2835-hwmon. ++ + if ACPI + + comment "ACPI drivers" +Index: linux-3.10-3.10.11/drivers/hwmon/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/hwmon/Makefile 2014-04-27 23:37:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hwmon/Makefile 2014-04-28 00:42:55.000000000 +0000 +@@ -140,6 +140,7 @@ + obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o + obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o + obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o ++obj-$(CONFIG_SENSORS_BCM2835) += bcm2835-hwmon.o + + obj-$(CONFIG_PMBUS) += pmbus/ + +Index: linux-3.10-3.10.11/drivers/hwmon/bcm2835-hwmon.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/hwmon/bcm2835-hwmon.c 2014-04-28 00:42:55.000000000 +0000 +@@ -0,0 +1,219 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MODULE_NAME "bcm2835_hwmon" ++ ++/*#define HWMON_DEBUG_ENABLE*/ ++ ++#ifdef HWMON_DEBUG_ENABLE ++#define print_debug(fmt,...) printk(KERN_INFO "%s:%s:%d: "fmt"\n", MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) ++#else ++#define print_debug(fmt,...) ++#endif ++#define print_err(fmt,...) printk(KERN_ERR "%s:%s:%d: "fmt"\n", MODULE_NAME, __func__,__LINE__, ##__VA_ARGS__) ++#define print_info(fmt,...) printk(KERN_INFO "%s: "fmt"\n", MODULE_NAME, ##__VA_ARGS__) ++ ++#define VC_TAG_GET_TEMP 0x00030006 ++#define VC_TAG_GET_MAX_TEMP 0x0003000A ++ ++/* --- STRUCTS --- */ ++struct bcm2835_hwmon_data { ++ struct device *hwmon_dev; ++}; ++ ++/* tag part of the message */ ++struct vc_msg_tag { ++ uint32_t tag_id; /* the tag ID for the temperature */ ++ uint32_t buffer_size; /* size of the buffer (should be 8) */ ++ uint32_t request_code; /* identifies message as a request (should be 0) */ ++ uint32_t id; /* extra ID field (should be 0) */ ++ uint32_t val; /* returned value of the temperature */ ++}; ++ ++/* message structure to be sent to videocore */ ++struct vc_msg { ++ uint32_t msg_size; /* simply, sizeof(struct vc_msg) */ ++ uint32_t request_code; /* holds various information like the success and number of bytes returned (refer to mailboxes wiki) */ ++ struct vc_msg_tag tag; /* the tag structure above to make */ ++ uint32_t end_tag; /* an end identifier, should be set to NULL */ ++}; ++ ++typedef enum { ++ TEMP, ++ MAX_TEMP, ++} temp_type; ++ ++/* --- PROTOTYPES --- */ ++static ssize_t bcm2835_get_temp(struct device *dev, struct device_attribute *attr, char *buf); ++static ssize_t bcm2835_get_name(struct device *dev, struct device_attribute *attr, char *buf); ++ ++/* --- GLOBALS --- */ ++ ++static struct bcm2835_hwmon_data *bcm2835_data; ++static struct platform_driver bcm2835_hwmon_driver; ++ ++static SENSOR_DEVICE_ATTR(name, S_IRUGO,bcm2835_get_name,NULL,0); ++static SENSOR_DEVICE_ATTR(temp1_input,S_IRUGO,bcm2835_get_temp,NULL,TEMP); ++static SENSOR_DEVICE_ATTR(temp1_max,S_IRUGO,bcm2835_get_temp,NULL,MAX_TEMP); ++ ++static struct attribute* bcm2835_attributes[] = { ++ &sensor_dev_attr_name.dev_attr.attr, ++ &sensor_dev_attr_temp1_input.dev_attr.attr, ++ &sensor_dev_attr_temp1_max.dev_attr.attr, ++ NULL, ++}; ++ ++static struct attribute_group bcm2835_attr_group = { ++ .attrs = bcm2835_attributes, ++}; ++ ++/* --- FUNCTIONS --- */ ++ ++static ssize_t bcm2835_get_name(struct device *dev, struct device_attribute *attr, char *buf) ++{ ++ return sprintf(buf,"bcm2835_hwmon\n"); ++} ++ ++static ssize_t bcm2835_get_temp(struct device *dev, struct device_attribute *attr, char *buf) ++{ ++ struct vc_msg msg; ++ int result; ++ uint temp = 0; ++ int index = ((struct sensor_device_attribute*)to_sensor_dev_attr(attr))->index; ++ ++ print_debug("IN"); ++ ++ /* wipe all previous message data */ ++ memset(&msg, 0, sizeof msg); ++ ++ /* determine the message type */ ++ if(index == TEMP) ++ msg.tag.tag_id = VC_TAG_GET_TEMP; ++ else if (index == MAX_TEMP) ++ msg.tag.tag_id = VC_TAG_GET_MAX_TEMP; ++ else ++ { ++ print_debug("Unknown temperature message!"); ++ return -EINVAL; ++ } ++ ++ msg.msg_size = sizeof msg; ++ msg.tag.buffer_size = 8; ++ ++ /* send the message */ ++ result = bcm_mailbox_property(&msg, sizeof msg); ++ ++ /* check if it was all ok and return the rate in milli degrees C */ ++ if (result == 0 && (msg.request_code & 0x80000000)) ++ temp = (uint)msg.tag.val; ++ #ifdef HWMON_DEBUG_ENABLE ++ else ++ print_debug("Failed to get temperature!"); ++ #endif ++ print_debug("Got temperature as %u",temp); ++ print_debug("OUT"); ++ return sprintf(buf, "%u\n", temp); ++} ++ ++ ++static int bcm2835_hwmon_probe(struct platform_device *pdev) ++{ ++ int err; ++ ++ print_debug("IN"); ++ print_debug("HWMON Driver has been probed!"); ++ ++ /* check that the device isn't null!*/ ++ if(pdev == NULL) ++ { ++ print_debug("Platform device is empty!"); ++ return -ENODEV; ++ } ++ ++ /* allocate memory for neccessary data */ ++ bcm2835_data = kzalloc(sizeof(struct bcm2835_hwmon_data),GFP_KERNEL); ++ if(!bcm2835_data) ++ { ++ print_debug("Unable to allocate memory for hwmon data!"); ++ err = -ENOMEM; ++ goto kzalloc_error; ++ } ++ ++ /* create the sysfs files */ ++ if(sysfs_create_group(&pdev->dev.kobj, &bcm2835_attr_group)) ++ { ++ print_debug("Unable to create sysfs files!"); ++ err = -EFAULT; ++ goto sysfs_error; ++ } ++ ++ /* register the hwmon device */ ++ bcm2835_data->hwmon_dev = hwmon_device_register(&pdev->dev); ++ if (IS_ERR(bcm2835_data->hwmon_dev)) ++ { ++ err = PTR_ERR(bcm2835_data->hwmon_dev); ++ goto hwmon_error; ++ } ++ print_debug("OUT"); ++ return 0; ++ ++ /* error goto's */ ++ hwmon_error: ++ sysfs_remove_group(&pdev->dev.kobj, &bcm2835_attr_group); ++ ++ sysfs_error: ++ kfree(bcm2835_data); ++ ++ kzalloc_error: ++ ++ return err; ++ ++} ++ ++static int bcm2835_hwmon_remove(struct platform_device *pdev) ++{ ++ print_debug("IN"); ++ hwmon_device_unregister(bcm2835_data->hwmon_dev); ++ ++ sysfs_remove_group(&pdev->dev.kobj, &bcm2835_attr_group); ++ print_debug("OUT"); ++ return 0; ++} ++ ++/* Hwmon Driver */ ++static struct platform_driver bcm2835_hwmon_driver = { ++ .probe = bcm2835_hwmon_probe, ++ .remove = bcm2835_hwmon_remove, ++ .driver = { ++ .name = "bcm2835_hwmon", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Dorian Peake"); ++MODULE_DESCRIPTION("HW Monitor driver for bcm2835 chip"); ++ ++module_platform_driver(bcm2835_hwmon_driver); +Index: linux-3.10-3.10.11/drivers/thermal/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/thermal/Kconfig 2014-04-27 23:37:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/thermal/Kconfig 2014-04-28 00:42:55.000000000 +0000 +@@ -169,4 +169,11 @@ + enforce idle time which results in more package C-state residency. The + user interface is exposed via generic thermal framework. + ++config THERMAL_BCM2835 ++ tristate "BCM2835 Thermal Driver" ++ help ++ This will enable temperature monitoring for the Broadcom BCM2835 ++ chip. If built as a module, it will be called 'bcm2835-thermal'. ++ + endif ++ +Index: linux-3.10-3.10.11/drivers/thermal/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/thermal/Makefile 2014-04-27 23:37:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/thermal/Makefile 2014-04-28 00:42:55.000000000 +0000 +@@ -23,4 +23,5 @@ + obj-$(CONFIG_ARMADA_THERMAL) += armada_thermal.o + obj-$(CONFIG_DB8500_CPUFREQ_COOLING) += db8500_cpufreq_cooling.o + obj-$(CONFIG_INTEL_POWERCLAMP) += intel_powerclamp.o ++obj-$(CONFIG_THERMAL_BCM2835) += bcm2835-thermal.o + +Index: linux-3.10-3.10.11/drivers/thermal/bcm2835-thermal.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/thermal/bcm2835-thermal.c 2014-04-28 00:42:55.000000000 +0000 +@@ -0,0 +1,208 @@ ++/***************************************************************************** ++* Copyright 2011 Broadcom Corporation. All rights reserved. ++* ++* Unless you and Broadcom execute a separate written software license ++* agreement governing use of this software, this software is licensed to you ++* under the terms of the GNU General Public License version 2, available at ++* http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). ++* ++* Notwithstanding the above, under no circumstances may you combine this ++* software in any way with any other Broadcom software provided under a ++* license other than the GPL, without Broadcom's express prior written ++* consent. ++*****************************************************************************/ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++/* --- DEFINITIONS --- */ ++#define MODULE_NAME "bcm2835_thermal" ++ ++/*#define THERMAL_DEBUG_ENABLE*/ ++ ++#ifdef THERMAL_DEBUG_ENABLE ++#define print_debug(fmt,...) printk(KERN_INFO "%s:%s:%d: "fmt"\n", MODULE_NAME, __func__, __LINE__, ##__VA_ARGS__) ++#else ++#define print_debug(fmt,...) ++#endif ++#define print_err(fmt,...) printk(KERN_ERR "%s:%s:%d: "fmt"\n", MODULE_NAME, __func__,__LINE__, ##__VA_ARGS__) ++#define print_info(fmt,...) printk(KERN_INFO "%s: "fmt"\n", MODULE_NAME, ##__VA_ARGS__) ++ ++#define VC_TAG_GET_TEMP 0x00030006 ++#define VC_TAG_GET_MAX_TEMP 0x0003000A ++ ++typedef enum { ++ TEMP, ++ MAX_TEMP, ++} temp_type; ++ ++/* --- STRUCTS --- */ ++/* tag part of the message */ ++struct vc_msg_tag { ++ uint32_t tag_id; /* the tag ID for the temperature */ ++ uint32_t buffer_size; /* size of the buffer (should be 8) */ ++ uint32_t request_code; /* identifies message as a request (should be 0) */ ++ uint32_t id; /* extra ID field (should be 0) */ ++ uint32_t val; /* returned value of the temperature */ ++}; ++ ++/* message structure to be sent to videocore */ ++struct vc_msg { ++ uint32_t msg_size; /* simply, sizeof(struct vc_msg) */ ++ uint32_t request_code; /* holds various information like the success and number of bytes returned (refer to mailboxes wiki) */ ++ struct vc_msg_tag tag; /* the tag structure above to make */ ++ uint32_t end_tag; /* an end identifier, should be set to NULL */ ++}; ++ ++struct bcm2835_thermal_data { ++ struct thermal_zone_device *thermal_dev; ++ struct vc_msg msg; ++}; ++ ++/* --- PROTOTYPES --- */ ++static int bcm2835_get_temp(struct thermal_zone_device *thermal_dev, unsigned long *); ++static int bcm2835_get_max_temp(struct thermal_zone_device *thermal_dev, int, unsigned long *); ++static int bcm2835_get_trip_type(struct thermal_zone_device *thermal_dev, int trip_num, enum thermal_trip_type *trip_type); ++static int bcm2835_get_mode(struct thermal_zone_device *thermal_dev, enum thermal_device_mode *dev_mode); ++ ++/* --- GLOBALS --- */ ++static struct bcm2835_thermal_data bcm2835_data; ++ ++/* Thermal Device Operations */ ++static struct thermal_zone_device_ops ops; ++ ++/* --- FUNCTIONS --- */ ++static int bcm2835_get_max_temp(struct thermal_zone_device *thermal_dev, int trip_num, unsigned long *temp) ++{ ++ int result; ++ ++ print_debug("IN"); ++ ++ /* wipe all previous message data */ ++ memset(&bcm2835_data.msg, 0, sizeof bcm2835_data.msg); ++ ++ /* prepare message */ ++ bcm2835_data.msg.msg_size = sizeof bcm2835_data.msg; ++ bcm2835_data.msg.tag.buffer_size = 8; ++ bcm2835_data.msg.tag.tag_id = VC_TAG_GET_MAX_TEMP; ++ ++ /* send the message */ ++ result = bcm_mailbox_property(&bcm2835_data.msg, sizeof bcm2835_data.msg); ++ ++ /* check if it was all ok and return the rate in milli degrees C */ ++ if (result == 0 && (bcm2835_data.msg.request_code & 0x80000000)) ++ *temp = (uint)bcm2835_data.msg.tag.val; ++ #ifdef THERMAL_DEBUG_ENABLE ++ else ++ print_debug("Failed to get temperature!"); ++ #endif ++ print_debug("Got temperature as %u",(uint)*temp); ++ print_debug("OUT"); ++ return 0; ++} ++ ++static int bcm2835_get_temp(struct thermal_zone_device *thermal_dev, unsigned long *temp) ++{ ++ int result; ++ ++ print_debug("IN"); ++ ++ /* wipe all previous message data */ ++ memset(&bcm2835_data.msg, 0, sizeof bcm2835_data.msg); ++ ++ /* prepare message */ ++ bcm2835_data.msg.msg_size = sizeof bcm2835_data.msg; ++ bcm2835_data.msg.tag.buffer_size = 8; ++ bcm2835_data.msg.tag.tag_id = VC_TAG_GET_TEMP; ++ ++ /* send the message */ ++ result = bcm_mailbox_property(&bcm2835_data.msg, sizeof bcm2835_data.msg); ++ ++ /* check if it was all ok and return the rate in milli degrees C */ ++ if (result == 0 && (bcm2835_data.msg.request_code & 0x80000000)) ++ *temp = (uint)bcm2835_data.msg.tag.val; ++ #ifdef THERMAL_DEBUG_ENABLE ++ else ++ print_debug("Failed to get temperature!"); ++ #endif ++ print_debug("Got temperature as %u",(uint)*temp); ++ print_debug("OUT"); ++ return 0; ++} ++ ++ ++static int bcm2835_get_trip_type(struct thermal_zone_device * thermal_dev, int trip_num, enum thermal_trip_type *trip_type) ++{ ++ *trip_type = THERMAL_TRIP_HOT; ++ return 0; ++} ++ ++ ++static int bcm2835_get_mode(struct thermal_zone_device *thermal_dev, enum thermal_device_mode *dev_mode) ++{ ++ *dev_mode = THERMAL_DEVICE_ENABLED; ++ return 0; ++} ++ ++ ++static int bcm2835_thermal_probe(struct platform_device *pdev) ++{ ++ print_debug("IN"); ++ print_debug("THERMAL Driver has been probed!"); ++ ++ /* check that the device isn't null!*/ ++ if(pdev == NULL) ++ { ++ print_debug("Platform device is empty!"); ++ return -ENODEV; ++ } ++ ++ if(!(bcm2835_data.thermal_dev = thermal_zone_device_register("bcm2835_thermal", 1, 0, NULL, &ops, NULL, 0, 0))) ++ { ++ print_debug("Unable to register the thermal device!"); ++ return -EFAULT; ++ } ++ return 0; ++} ++ ++ ++static int bcm2835_thermal_remove(struct platform_device *pdev) ++{ ++ print_debug("IN"); ++ ++ thermal_zone_device_unregister(bcm2835_data.thermal_dev); ++ ++ print_debug("OUT"); ++ ++ return 0; ++} ++ ++static struct thermal_zone_device_ops ops = { ++ .get_temp = bcm2835_get_temp, ++ .get_trip_temp = bcm2835_get_max_temp, ++ .get_trip_type = bcm2835_get_trip_type, ++ .get_mode = bcm2835_get_mode, ++}; ++ ++/* Thermal Driver */ ++static struct platform_driver bcm2835_thermal_driver = { ++ .probe = bcm2835_thermal_probe, ++ .remove = bcm2835_thermal_remove, ++ .driver = { ++ .name = "bcm2835_thermal", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Dorian Peake"); ++MODULE_DESCRIPTION("Thermal driver for bcm2835 chip"); ++ ++module_platform_driver(bcm2835_thermal_driver); +Index: linux-3.10-3.10.11/dummy/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1603_17c4ebbb5f59902f30496b9678e2dfff23616f34.txt 2014-04-28 00:42:55.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.patch --- linux-3.10.11/debian/patches/rpi/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.patch 2014-04-28 00:42:57.000000000 +0000 @@ -0,0 +1,949 @@ +commit 2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0 +Author: popcornmix +Date: Thu Jul 19 16:00:28 2012 +0100 + + config: add missing options from 3.6.y kernel + +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:27.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:56.000000000 +0000 +@@ -1,11 +1,17 @@ +-CONFIG_EXPERIMENTAL=y ++# CONFIG_ARM_PATCH_PHYS_VIRT is not set + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SYSVIPC=y + CONFIG_POSIX_MQUEUE=y +-CONFIG_BSD_PROCESS_ACCT=y +-CONFIG_BSD_PROCESS_ACCT_V3=y + CONFIG_FHANDLE=y + CONFIG_AUDIT=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++CONFIG_TASK_XACCT=y ++CONFIG_TASK_IO_ACCOUNTING=y + CONFIG_IKCONFIG=y + CONFIG_IKCONFIG_PROC=y + CONFIG_CGROUP_FREEZER=y +@@ -15,22 +21,24 @@ + CONFIG_BLK_CGROUP=y + CONFIG_NAMESPACES=y + CONFIG_SCHED_AUTOGROUP=y ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y + CONFIG_EMBEDDED=y + # CONFIG_COMPAT_BRK is not set +-CONFIG_SLAB=y + CONFIG_PROFILING=y + CONFIG_OPROFILE=m + CONFIG_KPROBES=y ++CONFIG_JUMP_LABEL=y + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y + # CONFIG_BLK_DEV_BSG is not set + CONFIG_BLK_DEV_THROTTLING=y ++CONFIG_PARTITION_ADVANCED=y ++CONFIG_MAC_PARTITION=y + CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_ARCH_BCM2708=y +-CONFIG_NO_HZ=y +-CONFIG_HIGH_RES_TIMERS=y + CONFIG_AEABI=y + CONFIG_SECCOMP=y + CONFIG_CC_STACKPROTECTOR=y +@@ -38,6 +46,14 @@ + CONFIG_ZBOOT_ROM_BSS=0x0 + CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" + CONFIG_KEXEC=y ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_STAT=m ++CONFIG_CPU_FREQ_STAT_DETAILS=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y + CONFIG_CPU_IDLE=y + CONFIG_VFP=y + CONFIG_BINFMT_MISC=m +@@ -52,15 +68,257 @@ + CONFIG_IP_PNP_DHCP=y + CONFIG_IP_PNP_RARP=y + CONFIG_SYN_COOKIES=y +-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +-# CONFIG_INET_XFRM_MODE_TUNNEL is not set +-# CONFIG_INET_XFRM_MODE_BEET is not set +-# CONFIG_INET_LRO is not set +-# CONFIG_INET_DIAG is not set +-# CONFIG_IPV6 is not set ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m ++CONFIG_INET_IPCOMP=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++CONFIG_INET_LRO=m ++CONFIG_INET_DIAG=m ++CONFIG_IPV6_PRIVACY=y ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++CONFIG_IPV6_MULTIPLE_TABLES=y ++CONFIG_NETFILTER=y ++CONFIG_NF_CONNTRACK=m ++CONFIG_NF_CONNTRACK_ZONES=y ++CONFIG_NF_CONNTRACK_EVENTS=y ++CONFIG_NF_CONNTRACK_TIMESTAMP=y ++CONFIG_NF_CT_PROTO_DCCP=m ++CONFIG_NF_CT_PROTO_UDPLITE=m ++CONFIG_NF_CONNTRACK_AMANDA=m ++CONFIG_NF_CONNTRACK_FTP=m ++CONFIG_NF_CONNTRACK_H323=m ++CONFIG_NF_CONNTRACK_IRC=m ++CONFIG_NF_CONNTRACK_NETBIOS_NS=m ++CONFIG_NF_CONNTRACK_SNMP=m ++CONFIG_NF_CONNTRACK_PPTP=m ++CONFIG_NF_CONNTRACK_SANE=m ++CONFIG_NF_CONNTRACK_SIP=m ++CONFIG_NF_CONNTRACK_TFTP=m ++CONFIG_NF_CT_NETLINK=m ++CONFIG_NETFILTER_TPROXY=m ++CONFIG_NETFILTER_XT_SET=m ++CONFIG_NETFILTER_XT_TARGET_AUDIT=m ++CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m ++CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m ++CONFIG_NETFILTER_XT_TARGET_CONNMARK=m ++CONFIG_NETFILTER_XT_TARGET_DSCP=m ++CONFIG_NETFILTER_XT_TARGET_HMARK=m ++CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m ++CONFIG_NETFILTER_XT_TARGET_LED=m ++CONFIG_NETFILTER_XT_TARGET_LOG=m ++CONFIG_NETFILTER_XT_TARGET_MARK=m ++CONFIG_NETFILTER_XT_TARGET_NFLOG=m ++CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m ++CONFIG_NETFILTER_XT_TARGET_NOTRACK=m ++CONFIG_NETFILTER_XT_TARGET_TEE=m ++CONFIG_NETFILTER_XT_TARGET_TPROXY=m ++CONFIG_NETFILTER_XT_TARGET_TRACE=m ++CONFIG_NETFILTER_XT_TARGET_TCPMSS=m ++CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m ++CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m ++CONFIG_NETFILTER_XT_MATCH_BPF=m ++CONFIG_NETFILTER_XT_MATCH_CLUSTER=m ++CONFIG_NETFILTER_XT_MATCH_COMMENT=m ++CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++CONFIG_NETFILTER_XT_MATCH_CONNLABEL=m ++CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_CONNMARK=m ++CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m ++CONFIG_NETFILTER_XT_MATCH_CPU=m ++CONFIG_NETFILTER_XT_MATCH_DCCP=m ++CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m ++CONFIG_NETFILTER_XT_MATCH_DSCP=m ++CONFIG_NETFILTER_XT_MATCH_ESP=m ++CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m ++CONFIG_NETFILTER_XT_MATCH_HELPER=m ++CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_LENGTH=m ++CONFIG_NETFILTER_XT_MATCH_LIMIT=m ++CONFIG_NETFILTER_XT_MATCH_MAC=m ++CONFIG_NETFILTER_XT_MATCH_MARK=m ++CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m ++CONFIG_NETFILTER_XT_MATCH_NFACCT=m ++CONFIG_NETFILTER_XT_MATCH_OSF=m ++CONFIG_NETFILTER_XT_MATCH_OWNER=m ++CONFIG_NETFILTER_XT_MATCH_POLICY=m ++CONFIG_NETFILTER_XT_MATCH_PHYSDEV=m ++CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m ++CONFIG_NETFILTER_XT_MATCH_QUOTA=m ++CONFIG_NETFILTER_XT_MATCH_RATEEST=m ++CONFIG_NETFILTER_XT_MATCH_REALM=m ++CONFIG_NETFILTER_XT_MATCH_RECENT=m ++CONFIG_NETFILTER_XT_MATCH_SOCKET=m ++CONFIG_NETFILTER_XT_MATCH_STATE=m ++CONFIG_NETFILTER_XT_MATCH_STATISTIC=m ++CONFIG_NETFILTER_XT_MATCH_STRING=m ++CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++CONFIG_NETFILTER_XT_MATCH_TIME=m ++CONFIG_NETFILTER_XT_MATCH_U32=m ++CONFIG_IP_SET=m ++CONFIG_IP_SET_BITMAP_IP=m ++CONFIG_IP_SET_BITMAP_IPMAC=m ++CONFIG_IP_SET_BITMAP_PORT=m ++CONFIG_IP_SET_HASH_IP=m ++CONFIG_IP_SET_HASH_IPPORT=m ++CONFIG_IP_SET_HASH_IPPORTIP=m ++CONFIG_IP_SET_HASH_IPPORTNET=m ++CONFIG_IP_SET_HASH_NET=m ++CONFIG_IP_SET_HASH_NETPORT=m ++CONFIG_IP_SET_HASH_NETIFACE=m ++CONFIG_IP_SET_LIST_SET=m ++CONFIG_IP_VS=m ++CONFIG_IP_VS_PROTO_TCP=y ++CONFIG_IP_VS_PROTO_UDP=y ++CONFIG_IP_VS_PROTO_ESP=y ++CONFIG_IP_VS_PROTO_AH=y ++CONFIG_IP_VS_PROTO_SCTP=y ++CONFIG_IP_VS_RR=m ++CONFIG_IP_VS_WRR=m ++CONFIG_IP_VS_LC=m ++CONFIG_IP_VS_WLC=m ++CONFIG_IP_VS_LBLC=m ++CONFIG_IP_VS_LBLCR=m ++CONFIG_IP_VS_DH=m ++CONFIG_IP_VS_SH=m ++CONFIG_IP_VS_SED=m ++CONFIG_IP_VS_NQ=m ++CONFIG_IP_VS_FTP=m ++CONFIG_IP_VS_PE_SIP=m ++CONFIG_NF_CONNTRACK_IPV4=m ++CONFIG_IP_NF_IPTABLES=m ++CONFIG_IP_NF_MATCH_AH=m ++CONFIG_IP_NF_MATCH_ECN=m ++CONFIG_IP_NF_MATCH_TTL=m ++CONFIG_IP_NF_FILTER=m ++CONFIG_IP_NF_TARGET_REJECT=m ++CONFIG_IP_NF_TARGET_ULOG=m ++CONFIG_NF_NAT_IPV4=m ++CONFIG_IP_NF_TARGET_MASQUERADE=m ++CONFIG_IP_NF_TARGET_NETMAP=m ++CONFIG_IP_NF_TARGET_REDIRECT=m ++CONFIG_IP_NF_MANGLE=m ++CONFIG_IP_NF_TARGET_ECN=m ++CONFIG_IP_NF_TARGET_TTL=m ++CONFIG_IP_NF_RAW=m ++CONFIG_IP_NF_ARPTABLES=m ++CONFIG_IP_NF_ARPFILTER=m ++CONFIG_IP_NF_ARP_MANGLE=m ++CONFIG_NF_CONNTRACK_IPV6=m ++CONFIG_IP6_NF_IPTABLES=m ++CONFIG_IP6_NF_MATCH_AH=m ++CONFIG_IP6_NF_MATCH_EUI64=m ++CONFIG_IP6_NF_MATCH_FRAG=m ++CONFIG_IP6_NF_MATCH_OPTS=m ++CONFIG_IP6_NF_MATCH_HL=m ++CONFIG_IP6_NF_MATCH_IPV6HEADER=m ++CONFIG_IP6_NF_MATCH_MH=m ++CONFIG_IP6_NF_MATCH_RT=m ++CONFIG_IP6_NF_TARGET_HL=m ++CONFIG_IP6_NF_FILTER=m ++CONFIG_IP6_NF_TARGET_REJECT=m ++CONFIG_IP6_NF_MANGLE=m ++CONFIG_IP6_NF_RAW=m ++CONFIG_NF_NAT_IPV6=m ++CONFIG_IP6_NF_TARGET_MASQUERADE=m ++CONFIG_IP6_NF_TARGET_NPT=m ++CONFIG_BRIDGE_NF_EBTABLES=m ++CONFIG_BRIDGE_EBT_BROUTE=m ++CONFIG_BRIDGE_EBT_T_FILTER=m ++CONFIG_BRIDGE_EBT_T_NAT=m ++CONFIG_BRIDGE_EBT_802_3=m ++CONFIG_BRIDGE_EBT_AMONG=m ++CONFIG_BRIDGE_EBT_ARP=m ++CONFIG_BRIDGE_EBT_IP=m ++CONFIG_BRIDGE_EBT_IP6=m ++CONFIG_BRIDGE_EBT_LIMIT=m ++CONFIG_BRIDGE_EBT_MARK=m ++CONFIG_BRIDGE_EBT_PKTTYPE=m ++CONFIG_BRIDGE_EBT_STP=m ++CONFIG_BRIDGE_EBT_VLAN=m ++CONFIG_BRIDGE_EBT_ARPREPLY=m ++CONFIG_BRIDGE_EBT_DNAT=m ++CONFIG_BRIDGE_EBT_MARK_T=m ++CONFIG_BRIDGE_EBT_REDIRECT=m ++CONFIG_BRIDGE_EBT_SNAT=m ++CONFIG_BRIDGE_EBT_LOG=m ++CONFIG_BRIDGE_EBT_ULOG=m ++CONFIG_BRIDGE_EBT_NFLOG=m ++CONFIG_SCTP_COOKIE_HMAC_SHA1=y ++CONFIG_L2TP=m ++CONFIG_BRIDGE=m ++CONFIG_VLAN_8021Q=m ++CONFIG_VLAN_8021Q_GVRP=y ++CONFIG_ATALK=m ++CONFIG_NET_SCHED=y ++CONFIG_NET_SCH_CBQ=m ++CONFIG_NET_SCH_HTB=m ++CONFIG_NET_SCH_HFSC=m ++CONFIG_NET_SCH_PRIO=m ++CONFIG_NET_SCH_MULTIQ=m ++CONFIG_NET_SCH_RED=m ++CONFIG_NET_SCH_SFB=m ++CONFIG_NET_SCH_SFQ=m ++CONFIG_NET_SCH_TEQL=m ++CONFIG_NET_SCH_TBF=m ++CONFIG_NET_SCH_GRED=m ++CONFIG_NET_SCH_DSMARK=m ++CONFIG_NET_SCH_NETEM=m ++CONFIG_NET_SCH_DRR=m ++CONFIG_NET_SCH_MQPRIO=m ++CONFIG_NET_SCH_CHOKE=m ++CONFIG_NET_SCH_QFQ=m ++CONFIG_NET_SCH_CODEL=m ++CONFIG_NET_SCH_FQ_CODEL=m ++CONFIG_NET_SCH_INGRESS=m ++CONFIG_NET_SCH_PLUG=m ++CONFIG_NET_CLS_BASIC=m ++CONFIG_NET_CLS_TCINDEX=m ++CONFIG_NET_CLS_ROUTE4=m ++CONFIG_NET_CLS_FW=m ++CONFIG_NET_CLS_U32=m ++CONFIG_CLS_U32_MARK=y ++CONFIG_NET_CLS_RSVP=m ++CONFIG_NET_CLS_RSVP6=m ++CONFIG_NET_CLS_FLOW=m ++CONFIG_NET_CLS_CGROUP=m ++CONFIG_NET_EMATCH=y ++CONFIG_NET_EMATCH_CMP=m ++CONFIG_NET_EMATCH_NBYTE=m ++CONFIG_NET_EMATCH_U32=m ++CONFIG_NET_EMATCH_META=m ++CONFIG_NET_EMATCH_TEXT=m ++CONFIG_NET_EMATCH_IPSET=m ++CONFIG_NET_CLS_ACT=y ++CONFIG_NET_ACT_POLICE=m ++CONFIG_NET_ACT_GACT=m ++CONFIG_GACT_PROB=y ++CONFIG_NET_ACT_MIRRED=m ++CONFIG_NET_ACT_IPT=m ++CONFIG_NET_ACT_NAT=m ++CONFIG_NET_ACT_PEDIT=m ++CONFIG_NET_ACT_SIMP=m ++CONFIG_NET_ACT_SKBEDIT=m ++CONFIG_NET_ACT_CSUM=m ++CONFIG_BATMAN_ADV=m ++CONFIG_OPENVSWITCH=m + CONFIG_NET_PKTGEN=m ++CONFIG_HAMRADIO=y ++CONFIG_AX25=m ++CONFIG_NETROM=m ++CONFIG_ROSE=m ++CONFIG_MKISS=m ++CONFIG_6PACK=m ++CONFIG_BPQETHER=m ++CONFIG_BAYCOM_SER_FDX=m ++CONFIG_BAYCOM_SER_HDX=m ++CONFIG_YAM=m + CONFIG_IRDA=m + CONFIG_IRLAN=m ++CONFIG_IRNET=m + CONFIG_IRCOMM=m + CONFIG_IRDA_ULTRA=y + CONFIG_IRDA_CACHE_LAST_LSAP=y +@@ -73,8 +331,6 @@ + CONFIG_SIGMATEL_FIR=m + CONFIG_MCS_FIR=m + CONFIG_BT=m +-CONFIG_BT_L2CAP=y +-CONFIG_BT_SCO=y + CONFIG_BT_RFCOMM=m + CONFIG_BT_RFCOMM_TTY=y + CONFIG_BT_BNEP=m +@@ -89,21 +345,28 @@ + CONFIG_BT_MRVL=m + CONFIG_BT_MRVL_SDIO=m + CONFIG_BT_ATH3K=m ++CONFIG_BT_WILINK=m + CONFIG_CFG80211=m ++CONFIG_CFG80211_WEXT=y + CONFIG_MAC80211=m + CONFIG_MAC80211_RC_PID=y + CONFIG_MAC80211_MESH=y + CONFIG_WIMAX=m ++CONFIG_RFKILL=m ++CONFIG_RFKILL_INPUT=y + CONFIG_NET_9P=m + CONFIG_NFC=m + CONFIG_NFC_PN533=m + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_CMA=y + CONFIG_BLK_DEV_LOOP=y + CONFIG_BLK_DEV_CRYPTOLOOP=m ++CONFIG_BLK_DEV_DRBD=m + CONFIG_BLK_DEV_NBD=m + CONFIG_BLK_DEV_RAM=y + CONFIG_CDROM_PKTCDVD=m +-CONFIG_MISC_DEVICES=y + CONFIG_SCSI=y + # CONFIG_SCSI_PROC_FS is not set + CONFIG_BLK_DEV_SD=m +@@ -111,13 +374,50 @@ + CONFIG_SCSI_MULTI_LUN=y + # CONFIG_SCSI_LOWLEVEL is not set + CONFIG_MD=y ++CONFIG_BLK_DEV_DM=m ++CONFIG_DM_CRYPT=m + CONFIG_NETDEVICES=y ++CONFIG_DUMMY=m ++CONFIG_NETCONSOLE=m + CONFIG_TUN=m +-CONFIG_PHYLIB=m + CONFIG_MDIO_BITBANG=m +-CONFIG_NET_ETHERNET=y +-# CONFIG_NETDEV_1000 is not set +-# CONFIG_NETDEV_10000 is not set ++CONFIG_PPP=m ++CONFIG_PPP_BSDCOMP=m ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_ASYNC=m ++CONFIG_PPP_SYNC_TTY=m ++CONFIG_SLIP=m ++CONFIG_SLIP_COMPRESSED=y ++CONFIG_USB_CATC=m ++CONFIG_USB_KAWETH=m ++CONFIG_USB_PEGASUS=m ++CONFIG_USB_RTL8150=m ++CONFIG_USB_RTL8152=m ++CONFIG_USB_USBNET=y ++CONFIG_USB_NET_AX8817X=m ++CONFIG_USB_NET_CDCETHER=m ++CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_CDC_MBIM=m ++CONFIG_USB_NET_DM9601=m ++CONFIG_USB_NET_SMSC75XX=m ++CONFIG_USB_NET_SMSC95XX=y ++CONFIG_USB_NET_GL620A=m ++CONFIG_USB_NET_NET1080=m ++CONFIG_USB_NET_PLUSB=m ++CONFIG_USB_NET_MCS7830=m ++CONFIG_USB_NET_CDC_SUBSET=m ++CONFIG_USB_ALI_M5632=y ++CONFIG_USB_AN2720=y ++CONFIG_USB_EPSON2888=y ++CONFIG_USB_KC2190=y ++CONFIG_USB_NET_ZAURUS=m ++CONFIG_USB_NET_CX82310_ETH=m ++CONFIG_USB_NET_KALMIA=m ++CONFIG_USB_NET_QMI_WWAN=m ++CONFIG_USB_NET_INT51X1=m ++CONFIG_USB_IPHETH=m ++CONFIG_USB_SIERRA_NET=m ++CONFIG_USB_VL600=m + CONFIG_LIBERTAS_THINFIRM=m + CONFIG_LIBERTAS_THINFIRM_USB=m + CONFIG_AT76C50X_USB=m +@@ -125,14 +425,16 @@ + CONFIG_USB_NET_RNDIS_WLAN=m + CONFIG_RTL8187=m + CONFIG_MAC80211_HWSIM=m +-CONFIG_ATH_COMMON=m ++CONFIG_ATH_CARDS=m + CONFIG_ATH9K=m + CONFIG_ATH9K_HTC=m + CONFIG_CARL9170=m ++CONFIG_ATH6KL=m ++CONFIG_ATH6KL_USB=m ++CONFIG_AR5523=m + CONFIG_B43=m + CONFIG_B43LEGACY=m + CONFIG_HOSTAP=m +-CONFIG_IWM=m + CONFIG_LIBERTAS=m + CONFIG_LIBERTAS_USB=m + CONFIG_LIBERTAS_SDIO=m +@@ -143,56 +445,25 @@ + CONFIG_RT73USB=m + CONFIG_RT2800USB=m + CONFIG_RT2800USB_RT53XX=y +-CONFIG_RTL8192CU=m +-CONFIG_WL1251=m +-CONFIG_WL12XX_MENU=m ++CONFIG_RT2800USB_UNKNOWN=y + CONFIG_ZD1211RW=m + CONFIG_MWIFIEX=m + CONFIG_MWIFIEX_SDIO=m ++CONFIG_RTL8192CU=m + CONFIG_WIMAX_I2400M_USB=m +-CONFIG_USB_CATC=m +-CONFIG_USB_KAWETH=m +-CONFIG_USB_PEGASUS=m +-CONFIG_USB_RTL8150=m +-CONFIG_USB_USBNET=y +-CONFIG_USB_NET_AX8817X=m +-CONFIG_USB_NET_CDCETHER=m +-CONFIG_USB_NET_CDC_EEM=m +-CONFIG_USB_NET_DM9601=m +-CONFIG_USB_NET_SMSC75XX=m +-CONFIG_USB_NET_SMSC95XX=y +-CONFIG_USB_NET_GL620A=m +-CONFIG_USB_NET_NET1080=m +-CONFIG_USB_NET_PLUSB=m +-CONFIG_USB_NET_MCS7830=m +-CONFIG_USB_NET_CDC_SUBSET=m +-CONFIG_USB_ALI_M5632=y +-CONFIG_USB_AN2720=y +-CONFIG_USB_KC2190=y +-# CONFIG_USB_NET_ZAURUS is not set +-CONFIG_USB_NET_CX82310_ETH=m +-CONFIG_USB_NET_KALMIA=m +-CONFIG_USB_NET_INT51X1=m +-CONFIG_USB_IPHETH=m +-CONFIG_USB_SIERRA_NET=m +-CONFIG_USB_VL600=m +-CONFIG_PPP=m +-CONFIG_PPP_ASYNC=m +-CONFIG_PPP_SYNC_TTY=m +-CONFIG_PPP_DEFLATE=m +-CONFIG_PPP_BSDCOMP=m +-CONFIG_SLIP=m +-CONFIG_SLIP_COMPRESSED=y +-CONFIG_NETCONSOLE=m + CONFIG_INPUT_POLLDEV=m + # CONFIG_INPUT_MOUSEDEV_PSAUX is not set + CONFIG_INPUT_JOYDEV=m + CONFIG_INPUT_EVDEV=m + # CONFIG_INPUT_KEYBOARD is not set + # CONFIG_INPUT_MOUSE is not set ++CONFIG_INPUT_JOYSTICK=y ++CONFIG_JOYSTICK_IFORCE=m ++CONFIG_JOYSTICK_IFORCE_USB=y ++CONFIG_JOYSTICK_XPAD=y ++CONFIG_JOYSTICK_XPAD_FF=y + CONFIG_INPUT_MISC=y + CONFIG_INPUT_AD714X=m +-CONFIG_INPUT_ATI_REMOTE=m + CONFIG_INPUT_ATI_REMOTE2=m + CONFIG_INPUT_KEYSPAN_REMOTE=m + CONFIG_INPUT_POWERMATE=m +@@ -202,28 +473,188 @@ + CONFIG_INPUT_GPIO_ROTARY_ENCODER=m + CONFIG_INPUT_ADXL34X=m + CONFIG_INPUT_CMA3000=m +-CONFIG_SERIO=m +-CONFIG_SERIO_RAW=m +-CONFIG_GAMEPORT=m +-CONFIG_GAMEPORT_NS558=m +-CONFIG_GAMEPORT_L4=m ++# CONFIG_SERIO is not set + CONFIG_VT_HW_CONSOLE_BINDING=y + # CONFIG_LEGACY_PTYS is not set + # CONFIG_DEVKMEM is not set + CONFIG_SERIAL_AMBA_PL011=y + CONFIG_SERIAL_AMBA_PL011_CONSOLE=y +-# CONFIG_HW_RANDOM is not set ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_BCM2708=y + CONFIG_RAW_DRIVER=y ++CONFIG_BRCM_CHAR_DRIVERS=y ++CONFIG_BCM_VC_CMA=y + CONFIG_I2C=y + CONFIG_I2C_CHARDEV=m + CONFIG_I2C_BCM2708=m + CONFIG_SPI=y + CONFIG_SPI_BCM2708=m ++CONFIG_SPI_SPIDEV=m + CONFIG_GPIO_SYSFS=y ++CONFIG_W1=m ++CONFIG_W1_MASTER_DS2490=m ++CONFIG_W1_MASTER_DS2482=m ++CONFIG_W1_MASTER_DS1WM=m ++CONFIG_W1_MASTER_GPIO=m ++CONFIG_W1_SLAVE_THERM=m ++CONFIG_W1_SLAVE_SMEM=m ++CONFIG_W1_SLAVE_DS2408=m ++CONFIG_W1_SLAVE_DS2413=m ++CONFIG_W1_SLAVE_DS2423=m ++CONFIG_W1_SLAVE_DS2431=m ++CONFIG_W1_SLAVE_DS2433=m ++CONFIG_W1_SLAVE_DS2760=m ++CONFIG_W1_SLAVE_DS2780=m ++CONFIG_W1_SLAVE_DS2781=m ++CONFIG_W1_SLAVE_DS28E04=m ++CONFIG_W1_SLAVE_BQ27000=m ++CONFIG_BATTERY_DS2760=m + # CONFIG_HWMON is not set ++CONFIG_THERMAL=y ++CONFIG_THERMAL_BCM2835=y + CONFIG_WATCHDOG=y + CONFIG_BCM2708_WDT=m +-# CONFIG_MFD_SUPPORT is not set ++CONFIG_MEDIA_SUPPORT=m ++CONFIG_MEDIA_CAMERA_SUPPORT=y ++CONFIG_MEDIA_ANALOG_TV_SUPPORT=y ++CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y ++CONFIG_MEDIA_RADIO_SUPPORT=y ++CONFIG_MEDIA_RC_SUPPORT=y ++CONFIG_MEDIA_CONTROLLER=y ++CONFIG_LIRC=m ++CONFIG_RC_DEVICES=y ++CONFIG_RC_ATI_REMOTE=m ++CONFIG_IR_IMON=m ++CONFIG_IR_MCEUSB=m ++CONFIG_IR_REDRAT3=m ++CONFIG_IR_STREAMZAP=m ++CONFIG_IR_IGUANA=m ++CONFIG_IR_TTUSBIR=m ++CONFIG_RC_LOOPBACK=m ++CONFIG_IR_GPIO_CIR=m ++CONFIG_MEDIA_USB_SUPPORT=y ++CONFIG_USB_VIDEO_CLASS=m ++CONFIG_USB_M5602=m ++CONFIG_USB_STV06XX=m ++CONFIG_USB_GL860=m ++CONFIG_USB_GSPCA_BENQ=m ++CONFIG_USB_GSPCA_CONEX=m ++CONFIG_USB_GSPCA_CPIA1=m ++CONFIG_USB_GSPCA_ETOMS=m ++CONFIG_USB_GSPCA_FINEPIX=m ++CONFIG_USB_GSPCA_JEILINJ=m ++CONFIG_USB_GSPCA_JL2005BCD=m ++CONFIG_USB_GSPCA_KINECT=m ++CONFIG_USB_GSPCA_KONICA=m ++CONFIG_USB_GSPCA_MARS=m ++CONFIG_USB_GSPCA_MR97310A=m ++CONFIG_USB_GSPCA_NW80X=m ++CONFIG_USB_GSPCA_OV519=m ++CONFIG_USB_GSPCA_OV534=m ++CONFIG_USB_GSPCA_OV534_9=m ++CONFIG_USB_GSPCA_PAC207=m ++CONFIG_USB_GSPCA_PAC7302=m ++CONFIG_USB_GSPCA_PAC7311=m ++CONFIG_USB_GSPCA_SE401=m ++CONFIG_USB_GSPCA_SN9C2028=m ++CONFIG_USB_GSPCA_SN9C20X=m ++CONFIG_USB_GSPCA_SONIXB=m ++CONFIG_USB_GSPCA_SONIXJ=m ++CONFIG_USB_GSPCA_SPCA500=m ++CONFIG_USB_GSPCA_SPCA501=m ++CONFIG_USB_GSPCA_SPCA505=m ++CONFIG_USB_GSPCA_SPCA506=m ++CONFIG_USB_GSPCA_SPCA508=m ++CONFIG_USB_GSPCA_SPCA561=m ++CONFIG_USB_GSPCA_SPCA1528=m ++CONFIG_USB_GSPCA_SQ905=m ++CONFIG_USB_GSPCA_SQ905C=m ++CONFIG_USB_GSPCA_SQ930X=m ++CONFIG_USB_GSPCA_STK014=m ++CONFIG_USB_GSPCA_STV0680=m ++CONFIG_USB_GSPCA_SUNPLUS=m ++CONFIG_USB_GSPCA_T613=m ++CONFIG_USB_GSPCA_TOPRO=m ++CONFIG_USB_GSPCA_TV8532=m ++CONFIG_USB_GSPCA_VC032X=m ++CONFIG_USB_GSPCA_VICAM=m ++CONFIG_USB_GSPCA_XIRLINK_CIT=m ++CONFIG_USB_GSPCA_ZC3XX=m ++CONFIG_USB_PWC=m ++CONFIG_VIDEO_CPIA2=m ++CONFIG_USB_ZR364XX=m ++CONFIG_USB_STKWEBCAM=m ++CONFIG_USB_S2255=m ++CONFIG_USB_SN9C102=m ++CONFIG_VIDEO_PVRUSB2=m ++CONFIG_VIDEO_HDPVR=m ++CONFIG_VIDEO_TLG2300=m ++CONFIG_VIDEO_USBVISION=m ++CONFIG_VIDEO_STK1160=m ++CONFIG_VIDEO_STK1160_AC97=y ++CONFIG_VIDEO_AU0828=m ++CONFIG_VIDEO_CX231XX=m ++CONFIG_VIDEO_CX231XX_ALSA=m ++CONFIG_VIDEO_CX231XX_DVB=m ++CONFIG_VIDEO_TM6000=m ++CONFIG_VIDEO_TM6000_ALSA=m ++CONFIG_VIDEO_TM6000_DVB=m ++CONFIG_DVB_USB=m ++CONFIG_DVB_USB_A800=m ++CONFIG_DVB_USB_DIBUSB_MB=m ++CONFIG_DVB_USB_DIBUSB_MB_FAULTY=y ++CONFIG_DVB_USB_DIBUSB_MC=m ++CONFIG_DVB_USB_DIB0700=m ++CONFIG_DVB_USB_UMT_010=m ++CONFIG_DVB_USB_CXUSB=m ++CONFIG_DVB_USB_M920X=m ++CONFIG_DVB_USB_DIGITV=m ++CONFIG_DVB_USB_VP7045=m ++CONFIG_DVB_USB_VP702X=m ++CONFIG_DVB_USB_GP8PSK=m ++CONFIG_DVB_USB_NOVA_T_USB2=m ++CONFIG_DVB_USB_TTUSB2=m ++CONFIG_DVB_USB_DTT200U=m ++CONFIG_DVB_USB_OPERA1=m ++CONFIG_DVB_USB_AF9005=m ++CONFIG_DVB_USB_AF9005_REMOTE=m ++CONFIG_DVB_USB_PCTV452E=m ++CONFIG_DVB_USB_DW2102=m ++CONFIG_DVB_USB_CINERGY_T2=m ++CONFIG_DVB_USB_DTV5100=m ++CONFIG_DVB_USB_FRIIO=m ++CONFIG_DVB_USB_AZ6027=m ++CONFIG_DVB_USB_TECHNISAT_USB2=m ++CONFIG_DVB_USB_V2=m ++CONFIG_DVB_USB_AF9015=m ++CONFIG_DVB_USB_AF9035=m ++CONFIG_DVB_USB_ANYSEE=m ++CONFIG_DVB_USB_AU6610=m ++CONFIG_DVB_USB_AZ6007=m ++CONFIG_DVB_USB_CE6230=m ++CONFIG_DVB_USB_EC168=m ++CONFIG_DVB_USB_GL861=m ++CONFIG_DVB_USB_IT913X=m ++CONFIG_DVB_USB_LME2510=m ++CONFIG_DVB_USB_MXL111SF=m ++CONFIG_DVB_USB_RTL28XXU=m ++CONFIG_SMS_USB_DRV=m ++CONFIG_DVB_B2C2_FLEXCOP_USB=m ++CONFIG_VIDEO_EM28XX=m ++CONFIG_VIDEO_EM28XX_ALSA=m ++CONFIG_VIDEO_EM28XX_DVB=m ++CONFIG_RADIO_SI470X=y ++CONFIG_USB_SI470X=m ++CONFIG_USB_MR800=m ++CONFIG_USB_DSBR=m ++CONFIG_RADIO_SHARK=m ++CONFIG_RADIO_SHARK2=m ++CONFIG_RADIO_SI4713=m ++CONFIG_USB_KEENE=m ++CONFIG_USB_MA901=m ++CONFIG_RADIO_SAA7706H=m ++CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL128X=m + CONFIG_FB=y + CONFIG_FB_BCM2708=y + CONFIG_FRAMEBUFFER_CONSOLE=y +@@ -250,8 +681,7 @@ + CONFIG_SND_USB_CAIAQ=m + CONFIG_SND_USB_6FIRE=m + CONFIG_SOUND_PRIME=m +-CONFIG_HID_PID=y +-CONFIG_USB_HIDDEV=y ++CONFIG_HIDRAW=y + CONFIG_HID_A4TECH=m + CONFIG_HID_ACRUX=m + CONFIG_HID_APPLE=m +@@ -282,7 +712,6 @@ + CONFIG_HID_PANTHERLORD=m + CONFIG_HID_PETALYNX=m + CONFIG_HID_PICOLCD=m +-CONFIG_HID_QUANTA=m + CONFIG_HID_ROCCAT=m + CONFIG_HID_SAMSUNG=m + CONFIG_HID_SONY=m +@@ -291,15 +720,18 @@ + CONFIG_HID_GREENASIA=m + CONFIG_HID_SMARTJOYPLUS=m + CONFIG_HID_TOPSEED=m ++CONFIG_HID_THINGM=m + CONFIG_HID_THRUSTMASTER=m + CONFIG_HID_WACOM=m + CONFIG_HID_WIIMOTE=m + CONFIG_HID_ZEROPLUS=m + CONFIG_HID_ZYDACRON=m +-CONFIG_USB=y ++CONFIG_HID_PID=y ++CONFIG_USB_HIDDEV=y + CONFIG_USB_ANNOUNCE_NEW_DEVICES=y + CONFIG_USB_MON=m + CONFIG_USB_DWCOTG=y ++CONFIG_USB_PRINTER=m + CONFIG_USB_STORAGE=y + CONFIG_USB_STORAGE_REALTEK=m + CONFIG_USB_STORAGE_DATAFAB=m +@@ -314,8 +746,6 @@ + CONFIG_USB_STORAGE_KARMA=m + CONFIG_USB_STORAGE_CYPRESS_ATACB=m + CONFIG_USB_STORAGE_ENE_UB6250=m +-CONFIG_USB_UAS=m +-CONFIG_USB_LIBUSUAL=y + CONFIG_USB_MDC800=m + CONFIG_USB_MICROTEK=m + CONFIG_USB_SERIAL=m +@@ -336,6 +766,7 @@ + CONFIG_USB_SERIAL_IR=m + CONFIG_USB_SERIAL_EDGEPORT=m + CONFIG_USB_SERIAL_EDGEPORT_TI=m ++CONFIG_USB_SERIAL_F81232=m + CONFIG_USB_SERIAL_GARMIN=m + CONFIG_USB_SERIAL_IPW=m + CONFIG_USB_SERIAL_IUU=m +@@ -344,6 +775,7 @@ + CONFIG_USB_SERIAL_KLSI=m + CONFIG_USB_SERIAL_KOBIL_SCT=m + CONFIG_USB_SERIAL_MCT_U232=m ++CONFIG_USB_SERIAL_METRO=m + CONFIG_USB_SERIAL_MOS7720=m + CONFIG_USB_SERIAL_MOS7840=m + CONFIG_USB_SERIAL_MOTOROLA=m +@@ -365,8 +797,12 @@ + CONFIG_USB_SERIAL_OMNINET=m + CONFIG_USB_SERIAL_OPTICON=m + CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m ++CONFIG_USB_SERIAL_XSENS_MT=m + CONFIG_USB_SERIAL_ZIO=m ++CONFIG_USB_SERIAL_WISHBONE=m ++CONFIG_USB_SERIAL_ZTE=m + CONFIG_USB_SERIAL_SSU100=m ++CONFIG_USB_SERIAL_QT2=m + CONFIG_USB_SERIAL_DEBUG=m + CONFIG_USB_EMI62=m + CONFIG_USB_EMI26=m +@@ -388,17 +824,59 @@ + CONFIG_USB_ISIGHTFW=m + CONFIG_USB_YUREX=m + CONFIG_MMC=y ++CONFIG_MMC_BLOCK_MINORS=32 + CONFIG_MMC_SDHCI=y + CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SDHCI_BCM2708=y + CONFIG_MMC_SDHCI_BCM2708_DMA=y +-CONFIG_LEDS_GPIO=y +-CONFIG_LEDS_TRIGGER_TIMER=m +-CONFIG_LEDS_TRIGGER_HEARTBEAT=m +-CONFIG_LEDS_TRIGGER_DEFAULT_ON=m ++CONFIG_LEDS_GPIO=m ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_ONESHOT=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_LEDS_TRIGGER_BACKLIGHT=y ++CONFIG_LEDS_TRIGGER_CPU=y ++CONFIG_LEDS_TRIGGER_GPIO=y ++CONFIG_LEDS_TRIGGER_DEFAULT_ON=y ++CONFIG_LEDS_TRIGGER_TRANSIENT=m ++CONFIG_LEDS_TRIGGER_CAMERA=m ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_DRV_DS1307=m ++CONFIG_RTC_DRV_DS1374=m ++CONFIG_RTC_DRV_DS1672=m ++CONFIG_RTC_DRV_DS3232=m ++CONFIG_RTC_DRV_MAX6900=m ++CONFIG_RTC_DRV_RS5C372=m ++CONFIG_RTC_DRV_ISL1208=m ++CONFIG_RTC_DRV_ISL12022=m ++CONFIG_RTC_DRV_X1205=m ++CONFIG_RTC_DRV_PCF8523=m ++CONFIG_RTC_DRV_PCF8563=m ++CONFIG_RTC_DRV_PCF8583=m ++CONFIG_RTC_DRV_M41T80=m ++CONFIG_RTC_DRV_BQ32K=m ++CONFIG_RTC_DRV_S35390A=m ++CONFIG_RTC_DRV_FM3130=m ++CONFIG_RTC_DRV_RX8581=m ++CONFIG_RTC_DRV_RX8025=m ++CONFIG_RTC_DRV_EM3027=m ++CONFIG_RTC_DRV_RV3029C2=m ++CONFIG_RTC_DRV_M41T93=m ++CONFIG_RTC_DRV_M41T94=m ++CONFIG_RTC_DRV_DS1305=m ++CONFIG_RTC_DRV_DS1390=m ++CONFIG_RTC_DRV_MAX6902=m ++CONFIG_RTC_DRV_R9701=m ++CONFIG_RTC_DRV_RS5C348=m ++CONFIG_RTC_DRV_DS3234=m ++CONFIG_RTC_DRV_PCF2123=m ++CONFIG_RTC_DRV_RX4581=m + CONFIG_UIO=m + CONFIG_UIO_PDRV=m + CONFIG_UIO_PDRV_GENIRQ=m ++CONFIG_STAGING=y ++CONFIG_STAGING_MEDIA=y ++CONFIG_LIRC_STAGING=y ++CONFIG_LIRC_RPI=m + # CONFIG_IOMMU_SUPPORT is not set + CONFIG_EXT4_FS=y + CONFIG_EXT4_FS_POSIX_ACL=y +@@ -421,6 +899,8 @@ + CONFIG_BTRFS_FS_POSIX_ACL=y + CONFIG_NILFS2_FS=m + CONFIG_FANOTIFY=y ++CONFIG_QFMT_V1=m ++CONFIG_QFMT_V2=m + CONFIG_AUTOFS4_FS=y + CONFIG_FUSE_FS=m + CONFIG_CUSE=m +@@ -443,21 +923,22 @@ + CONFIG_SQUASHFS_XATTR=y + CONFIG_SQUASHFS_LZO=y + CONFIG_SQUASHFS_XZ=y ++CONFIG_F2FS_FS=y + CONFIG_NFS_FS=y +-CONFIG_NFS_V3=y + CONFIG_NFS_V3_ACL=y + CONFIG_NFS_V4=y + CONFIG_ROOT_NFS=y + CONFIG_NFS_FSCACHE=y ++CONFIG_NFSD=m ++CONFIG_NFSD_V3_ACL=y ++CONFIG_NFSD_V4=y + CONFIG_CIFS=m + CONFIG_CIFS_WEAK_PW_HASH=y + CONFIG_CIFS_XATTR=y + CONFIG_CIFS_POSIX=y ++# CONFIG_CIFS_DEBUG is not set + CONFIG_9P_FS=m + CONFIG_9P_FS_POSIX_ACL=y +-CONFIG_PARTITION_ADVANCED=y +-CONFIG_MAC_PARTITION=y +-CONFIG_EFI_PARTITION=y + CONFIG_NLS_DEFAULT="utf8" + CONFIG_NLS_CODEPAGE_437=y + CONFIG_NLS_CODEPAGE_737=m +@@ -497,38 +978,28 @@ + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m + CONFIG_NLS_UTF8=m ++CONFIG_DLM=m + CONFIG_PRINTK_TIME=y + CONFIG_DETECT_HUNG_TASK=y + CONFIG_TIMER_STATS=y +-CONFIG_DEBUG_STACK_USAGE=y +-CONFIG_DEBUG_INFO=y + CONFIG_DEBUG_MEMORY_INIT=y + CONFIG_BOOT_PRINTK_DELAY=y + CONFIG_LATENCYTOP=y +-CONFIG_SYSCTL_SYSCALL_CHECK=y +-CONFIG_IRQSOFF_TRACER=y +-CONFIG_SCHED_TRACER=y +-CONFIG_STACK_TRACER=y +-CONFIG_BLK_DEV_IO_TRACE=y +-CONFIG_FUNCTION_PROFILER=y + CONFIG_KGDB=y + CONFIG_KGDB_KDB=y + CONFIG_KDB_KEYBOARD=y + CONFIG_STRICT_DEVMEM=y +-CONFIG_CRYPTO_AUTHENC=m + CONFIG_CRYPTO_SEQIV=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_HMAC=y + CONFIG_CRYPTO_XCBC=m + CONFIG_CRYPTO_MD5=y + CONFIG_CRYPTO_SHA1=y +-CONFIG_CRYPTO_SHA256=m + CONFIG_CRYPTO_SHA512=m + CONFIG_CRYPTO_TGR192=m + CONFIG_CRYPTO_WP512=m + CONFIG_CRYPTO_CAST5=m + CONFIG_CRYPTO_DES=y +-CONFIG_CRYPTO_DEFLATE=m + # CONFIG_CRYPTO_ANSI_CPRNG is not set + # CONFIG_CRYPTO_HW is not set + CONFIG_CRC_ITU_T=y +Index: linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/hif_usb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/ath/ath9k/hif_usb.c 2014-04-28 00:32:47.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/ath/ath9k/hif_usb.c 2014-04-28 00:42:56.000000000 +0000 +@@ -37,9 +37,11 @@ + { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */ + { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ + { USB_DEVICE(0x040D, 0x3801) }, /* VIA */ ++ { USB_DEVICE(0x0cf3, 0xb002) }, /* Ubiquiti WifiStation */ + { USB_DEVICE(0x0cf3, 0xb003) }, /* Ubiquiti WifiStation Ext */ + { USB_DEVICE(0x0cf3, 0xb002) }, /* Ubiquiti WifiStation */ + { USB_DEVICE(0x057c, 0x8403) }, /* AVM FRITZ!WLAN 11N v2 USB */ ++ { USB_DEVICE(0x057c, 0x8403) }, /* AVM FRITZ!WLAN 11N v2 USB */ + + { USB_DEVICE(0x0cf3, 0x7015), + .driver_info = AR9287_USB }, /* Atheros */ +Index: linux-3.10-3.10.11/dummy/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1604_2340da3adbcd1d5a0d31de7e9ba5729f156fbeb0.txt 2014-04-28 00:42:56.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.patch --- linux-3.10.11/debian/patches/rpi/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.patch 2014-04-28 00:42:57.000000000 +0000 @@ -0,0 +1,77 @@ +commit b76c3a8614fcd2df00260ad6d61d1d2dda22f848 +Author: popcornmix +Date: Wed Apr 17 12:16:36 2013 +0100 + + Enable multiple ALSA channels + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:55.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:57.000000000 +0000 +@@ -471,12 +471,54 @@ + + + static struct platform_device bcm2708_alsa_devices[] = { +- [0] = { +- .name = "bcm2835_AUD0", +- .id = 0, /* first audio device */ +- .resource = 0, +- .num_resources = 0, +- }, ++ [0] = { ++ .name = "bcm2835_AUD0", ++ .id = 0, /* first audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [1] = { ++ .name = "bcm2835_AUD1", ++ .id = 1, /* second audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [2] = { ++ .name = "bcm2835_AUD2", ++ .id = 2, /* third audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [3] = { ++ .name = "bcm2835_AUD3", ++ .id = 3, /* forth audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [4] = { ++ .name = "bcm2835_AUD4", ++ .id = 4, /* fifth audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [5] = { ++ .name = "bcm2835_AUD5", ++ .id = 5, /* sixth audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [6] = { ++ .name = "bcm2835_AUD6", ++ .id = 6, /* seventh audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, ++ [7] = { ++ .name = "bcm2835_AUD7", ++ .id = 7, /* eighth audio device */ ++ .resource = 0, ++ .num_resources = 0, ++ }, + }; + + static struct resource bcm2708_spi_resources[] = { +Index: linux-3.10-3.10.11/dummy/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1605_b76c3a8614fcd2df00260ad6d61d1d2dda22f848.txt 2014-04-28 00:42:57.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.patch --- linux-3.10.11/debian/patches/rpi/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.patch 2014-04-28 00:42:58.000000000 +0000 @@ -0,0 +1,75 @@ +commit e5c5956ed7aa509187515a1acfe4ec2ca6d63433 +Author: popcornmix +Date: Wed Oct 3 20:08:19 2012 +0100 + + set i2c speed via module-parameter or menuconfig. Thanks FrankBoesing + +Index: linux-3.10-3.10.11/drivers/i2c/busses/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/Kconfig 2014-04-28 00:42:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/Kconfig 2014-04-28 00:42:58.000000000 +0000 +@@ -352,6 +352,17 @@ + support for the BCM2708. BSC is a Broadcom proprietary bus compatible + with I2C/TWI/SMBus. + ++config I2C_BCM2708_BAUDRATE ++ prompt "BCM2708 I2C baudrate" ++ depends on I2C_BCM2708 ++ int ++ default 100000 ++ help ++ Set the I2C baudrate. This will alter the default value. A ++ different baudrate can be set by using a module parameter as well. If ++ no parameter is provided when loading, this is the value that will be ++ used. ++ + config I2C_BLACKFIN_TWI + tristate "Blackfin TWI I2C support" + depends on BLACKFIN +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:42:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:42:58.000000000 +0000 +@@ -66,11 +66,15 @@ + #define BSC_S_DONE 0x00000002 + #define BSC_S_TA 0x00000001 + +-#define I2C_CLOCK_HZ 100000 /* FIXME: get from DT */ + #define I2C_TIMEOUT_MS 150 + + #define DRV_NAME "bcm2708_i2c" + ++static unsigned int baudrate = CONFIG_I2C_BCM2708_BAUDRATE; ++module_param(baudrate, uint, S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP); ++MODULE_PARM_DESC(baudrate, "The I2C baudrate"); ++ ++ + struct bcm2708_i2c { + struct i2c_adapter adapter; + +@@ -148,7 +152,7 @@ + u32 c = BSC_C_I2CEN | BSC_C_INTD | BSC_C_ST | BSC_C_CLEAR_1; + + bus_hz = clk_get_rate(bi->clk); +- cdiv = bus_hz / I2C_CLOCK_HZ; ++ cdiv = bus_hz / baudrate; + + if (bi->msg->flags & I2C_M_RD) + c |= BSC_C_INTR | BSC_C_READ; +@@ -331,8 +335,8 @@ + goto out_free_irq; + } + +- dev_info(&pdev->dev, "BSC%d Controller at 0x%08lx (irq %d)\n", +- pdev->id, (unsigned long)regs->start, irq); ++ dev_info(&pdev->dev, "BSC%d Controller at 0x%08lx (irq %d) (baudrate %dk)\n", ++ pdev->id, (unsigned long)regs->start, irq, baudrate/1000); + + return 0; + +Index: linux-3.10-3.10.11/dummy/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1606_e5c5956ed7aa509187515a1acfe4ec2ca6d63433.txt 2014-04-28 00:42:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.patch --- linux-3.10.11/debian/patches/rpi/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.patch 2014-04-28 00:42:59.000000000 +0000 @@ -0,0 +1,42 @@ +commit f8b33cb3ea1be1072ac6b9bd897ef346d42567ae +Author: popcornmix +Date: Wed Oct 3 21:31:48 2012 +0100 + + Allow the number of cycles delay between sdcard peripheral writes to be specified on command line with sdhci-bcm2708.cycle_delay + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:58.000000000 +0000 +@@ -77,6 +77,8 @@ + #define REG_EXRDFIFO_EN 0x80 + #define REG_EXRDFIFO_CFG 0x84 + ++int cycle_delay=2; ++ + /*****************************************************************************\ + * * + * Debug * +@@ -249,7 +251,7 @@ + /* host->clock is the clock freq in Hz */ + static hptime_t last_write_hpt; + hptime_t now = hptime(); +- ns_2clk = 2000000000/host->clock; ++ ns_2clk = cycle_delay*1000000/(host->clock/1000); + + if (now == last_write_hpt || now == last_write_hpt+1) { + /* we can't guarantee any significant time has +@@ -1388,6 +1390,7 @@ + module_param(sync_after_dma, bool, 0444); + module_param(missing_status, bool, 0444); + module_param(enable_llm, bool, 0444); ++module_param(cycle_delay, int, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +Index: linux-3.10-3.10.11/dummy/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1607_f8b33cb3ea1be1072ac6b9bd897ef346d42567ae.txt 2014-04-28 00:42:58.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.patch --- linux-3.10.11/debian/patches/rpi/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.patch 2014-04-28 00:43:00.000000000 +0000 @@ -0,0 +1,231 @@ +commit 280e59db6f9b9bc9f55dd0f651c667f05591c0de +Author: dero +Date: Mon Nov 19 12:46:06 2012 +0100 + + Lazy CRC quirk: Implemented retrying mechanisms for SD SSR and SCR, disabled missing_status and spurious CRC ACMD51 quirks by default (should be fixed by the retrying-mechanishm) + +Index: linux-3.10-3.10.11/drivers/mmc/core/sd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/core/sd.c 2014-04-27 23:37:07.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/core/sd.c 2014-04-28 00:42:59.000000000 +0000 +@@ -13,6 +13,8 @@ + #include + #include + #include ++#include ++#include + + #include + #include +@@ -58,6 +60,15 @@ + __res & __mask; \ + }) + ++// timeout for tries ++static const unsigned long retry_timeout_ms= 10*1000; ++ ++// try at least 10 times, even if timeout is reached ++static const int retry_min_tries= 10; ++ ++// delay between tries ++static const unsigned long retry_delay_ms= 10; ++ + /* + * Given the decoded CSD structure, decode the raw CID to our CID structure. + */ +@@ -210,12 +221,62 @@ + } + + /* +- * Fetch and process SD Status register. ++ * Fetch and process SD Configuration Register. ++ */ ++static int mmc_read_scr(struct mmc_card *card) ++{ ++ unsigned long timeout_at; ++ int err, tries; ++ ++ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms ); ++ tries= 0; ++ ++ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) ) ++ { ++ unsigned long delay_at; ++ tries++; ++ ++ err = mmc_app_send_scr(card, card->raw_scr); ++ if( !err ) ++ break; // sucess!!! ++ ++ touch_nmi_watchdog(); // we are still alive! ++ ++ // delay ++ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms ); ++ while( time_before( jiffies, delay_at ) ) ++ { ++ mdelay( 1 ); ++ touch_nmi_watchdog(); // we are still alive! ++ } ++ } ++ ++ if( err) ++ { ++ pr_err("%s: failed to read SD Configuration register (SCR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err ); ++ return err; ++ } ++ ++ if( tries > 1 ) ++ { ++ pr_info("%s: could read SD Configuration register (SCR) at the %dth attempt\n", mmc_hostname(card->host), tries ); ++ } ++ ++ err = mmc_decode_scr(card); ++ if (err) ++ return err; ++ ++ return err; ++} ++ ++/* ++ * Fetch and process SD Status Register. + */ + static int mmc_read_ssr(struct mmc_card *card) + { ++ unsigned long timeout_at; + unsigned int au, es, et, eo; +- int err, i; ++ int err, i, tries; + u32 *ssr; + + if (!(card->csd.cmdclass & CCC_APP_SPEC)) { +@@ -227,15 +288,41 @@ + ssr = kmalloc(64, GFP_KERNEL); + if (!ssr) + return -ENOMEM; +- +- err = mmc_app_sd_status(card, ssr); +- if (err) { +- pr_warning("%s: problem reading SD Status " +- "register.\n", mmc_hostname(card->host)); +- err = 0; ++ ++ timeout_at= jiffies + msecs_to_jiffies( retry_timeout_ms ); ++ tries= 0; ++ ++ while( tries < retry_min_tries || time_before( jiffies, timeout_at ) ) ++ { ++ unsigned long delay_at; ++ tries++; ++ ++ err= mmc_app_sd_status(card, ssr); ++ if( !err ) ++ break; // sucess!!! ++ ++ touch_nmi_watchdog(); // we are still alive! ++ ++ // delay ++ delay_at= jiffies + msecs_to_jiffies( retry_delay_ms ); ++ while( time_before( jiffies, delay_at ) ) ++ { ++ mdelay( 1 ); ++ touch_nmi_watchdog(); // we are still alive! ++ } ++ } ++ ++ if( err) ++ { ++ pr_err("%s: failed to read SD Status register (SSR) after %d tries during %lu ms, error %d\n", mmc_hostname(card->host), tries, retry_timeout_ms, err ); + goto out; + } + ++ if( tries > 1 ) ++ { ++ pr_info("%s: could read SD Status register (SSR) at the %dth attempt\n", mmc_hostname(card->host), tries ); ++ } ++ + for (i = 0; i < 16; i++) + ssr[i] = be32_to_cpu(ssr[i]); + +@@ -808,15 +895,11 @@ + + if (!reinit) { + /* +- * Fetch SCR from card. ++ * Fetch and decode SD Configuration register. + */ +- err = mmc_app_send_scr(card, card->raw_scr); +- if (err) +- return err; +- +- err = mmc_decode_scr(card); +- if (err) +- return err; ++ err = mmc_read_scr(card); ++ if( err ) ++ return err; + + /* + * Fetch and process SD Status register. +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:59.000000000 +0000 +@@ -137,6 +137,7 @@ + static int emmc_clock_freq = BCM2708_EMMC_CLOCK_FREQ; + static bool sync_after_dma = 1; + static bool missing_status = 1; ++static bool spurious_crc_acmd51 = 0; + bool enable_llm = 1; + + #if 0 +@@ -1103,7 +1104,7 @@ + return 1; + } + +-static unsigned int sdhci_bcm2708_quirk_spurious_crc(struct sdhci_host *host) ++static unsigned int sdhci_bcm2708_quirk_spurious_crc_acmd51(struct sdhci_host *host) + { + return 1; + } +@@ -1149,7 +1150,6 @@ + .pdma_reset = sdhci_bcm2708_platdma_reset, + #endif + .extra_ints = sdhci_bcm2708_quirk_extra_ints, +- .spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc, + .voltage_broken = sdhci_bcm2708_quirk_voltage_broken, + .uhs_broken = sdhci_bcm2708_uhs_broken, + }; +@@ -1194,6 +1194,11 @@ + sdhci_bcm2708_ops.missing_status = sdhci_bcm2708_missing_status; + } + ++ if( spurious_crc_acmd51 ) { ++ sdhci_bcm2708_ops.spurious_crc_acmd51 = sdhci_bcm2708_quirk_spurious_crc_acmd51; ++ } ++ ++ + printk("sdhci: %s low-latency mode\n",enable_llm?"Enable":"Disable"); + + host->hw_name = "BCM2708_Arasan"; +@@ -1389,6 +1394,7 @@ + module_param(emmc_clock_freq, int, 0444); + module_param(sync_after_dma, bool, 0444); + module_param(missing_status, bool, 0444); ++module_param(spurious_crc_acmd51, bool, 0444); + module_param(enable_llm, bool, 0444); + module_param(cycle_delay, int, 0444); + +@@ -1401,6 +1407,7 @@ + MODULE_PARM_DESC(emmc_clock_freq, "Specify the speed of emmc clock"); + MODULE_PARM_DESC(sync_after_dma, "Block in driver until dma complete"); + MODULE_PARM_DESC(missing_status, "Use the missing status quirk"); ++MODULE_PARM_DESC(spurious_crc_acmd51, "Use the spurious crc quirk for reading SCR (ACMD51)"); + MODULE_PARM_DESC(enable_llm, "Enable low-latency mode"); + + +Index: linux-3.10-3.10.11/dummy/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1608_280e59db6f9b9bc9f55dd0f651c667f05591c0de.txt 2014-04-28 00:42:59.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.patch --- linux-3.10.11/debian/patches/rpi/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.patch 2014-04-28 00:43:01.000000000 +0000 @@ -0,0 +1,60 @@ +commit 7f31c743d40ec1185db2b57707d3bcde6f7531fe +Author: popcornmix +Date: Thu Mar 28 00:10:32 2013 +0000 + + bcm2708: Add vc_cma driver to enable use of CMA + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:42:57.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/bcm2708.c 2014-04-28 00:43:00.000000000 +0000 +@@ -60,6 +60,11 @@ + #include "armctrl.h" + #include "clock.h" + ++#ifdef CONFIG_BCM_VC_CMA ++#include ++#endif ++ ++ + /* Effectively we have an IOMMU (ARM<->VideoCore map) that is set up to + * give us IO access only to 64Mbytes of physical memory (26 bits). We could + * represent this window by setting our dmamasks to 26 bits but, in fact +@@ -693,6 +698,9 @@ + { + int i; + ++#if defined(CONFIG_BCM_VC_CMA) ++ vc_cma_early_init(); ++#endif + printk("bcm2708.uart_clock = %d\n", uart_clock); + pm_power_off = bcm2708_power_off; + +@@ -889,6 +897,13 @@ + init_dma_coherent_pool_size(SZ_4M); + } + ++static void __init board_reserve(void) ++{ ++#if defined(CONFIG_BCM_VC_CMA) ++ vc_cma_reserve(); ++#endif ++} ++ + MACHINE_START(BCM2708, "BCM2708") + /* Maintainer: Broadcom Europe Ltd. */ + .map_io = bcm2708_map_io, +@@ -897,6 +912,7 @@ + .init_machine = bcm2708_init, + .init_early = bcm2708_init_early, + .restart = bcm2708_restart, ++ .reserve = board_reserve, + MACHINE_END + + module_param(boardrev, uint, 0644); +Index: linux-3.10-3.10.11/dummy/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1609_7f31c743d40ec1185db2b57707d3bcde6f7531fe.txt 2014-04-28 00:43:00.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.patch --- linux-3.10.11/debian/patches/rpi/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.patch 2014-04-28 00:43:01.000000000 +0000 @@ -0,0 +1,25 @@ +commit b6d5536d19f217c75ba95957ea208e64e4994d03 +Author: Gordon Hollingworth +Date: Sun Nov 4 15:55:01 2012 +0000 + + Make sure we wait for the reset to finish + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:42:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:01.000000000 +0000 +@@ -232,6 +232,8 @@ + if (mphi_int_count >= 60) + { + DWC_WRITE_REG32(c_mphi_regs.ctrl, ((1<<31) + (1<<16))); ++ while(!(DWC_READ_REG32(c_mphi_regs.ctrl) & (1 << 17))) ++ ; + DWC_WRITE_REG32(c_mphi_regs.ctrl, (1<<31)); + mphi_int_count = 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1610_b6d5536d19f217c75ba95957ea208e64e4994d03.txt 2014-04-28 00:43:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.patch --- linux-3.10.11/debian/patches/rpi/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.patch 2014-04-28 00:43:02.000000000 +0000 @@ -0,0 +1,1330 @@ +commit baf31097e790a22884aa4d40eb61bfa6207e4304 +Author: popcornmix +Date: Mon Nov 19 18:27:05 2012 +0000 + + Add Simon Hall's dma helper module, useful in future for X acceleration + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/Kconfig 2014-04-28 00:42:27.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Kconfig 2014-04-28 00:43:01.000000000 +0000 +@@ -38,4 +38,12 @@ + default y + help + Binds spidev driver to the SPI0 master ++ ++config BCM2708_DMAER ++ tristate "BCM2708 DMA helper" ++ depends on MACH_BCM2708 ++ default n ++ help ++ Enable DMA helper for accelerating X composition ++ + endmenu +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/Makefile 2014-04-28 00:42:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/Makefile 2014-04-28 00:43:01.000000000 +0000 +@@ -6,3 +6,6 @@ + obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o + obj-$(CONFIG_BCM2708_VCMEM) += vc_mem.o + ++obj-$(CONFIG_BCM2708_DMAER) += dmaer_master.o ++dmaer_master-objs := dmaer.o vc_support.o ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/dmaer.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/dmaer.c 2014-04-28 00:43:01.000000000 +0000 +@@ -0,0 +1,887 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#ifdef ECLIPSE_IGNORE ++ ++#define __user ++#define __init ++#define __exit ++#define __iomem ++#define KERN_DEBUG ++#define KERN_ERR ++#define KERN_WARNING ++#define KERN_INFO ++#define _IOWR(a, b, c) b ++#define _IOW(a, b, c) b ++#define _IO(a, b) b ++ ++#endif ++ ++//#define inline ++ ++#define PRINTK(args...) printk(args) ++//#define PRINTK_VERBOSE(args...) printk(args) ++//#define PRINTK(args...) ++#define PRINTK_VERBOSE(args...) ++ ++/***** TYPES ****/ ++#define PAGES_PER_LIST 500 ++struct PageList ++{ ++ struct page *m_pPages[PAGES_PER_LIST]; ++ unsigned int m_used; ++ struct PageList *m_pNext; ++}; ++ ++struct VmaPageList ++{ ++ //each vma has a linked list of pages associated with it ++ struct PageList *m_pPageHead; ++ struct PageList *m_pPageTail; ++ unsigned int m_refCount; ++}; ++ ++struct DmaControlBlock ++{ ++ unsigned int m_transferInfo; ++ void __user *m_pSourceAddr; ++ void __user *m_pDestAddr; ++ unsigned int m_xferLen; ++ unsigned int m_tdStride; ++ struct DmaControlBlock *m_pNext; ++ unsigned int m_blank1, m_blank2; ++}; ++ ++/***** DEFINES ******/ ++//magic number defining the module ++#define DMA_MAGIC 0xdd ++ ++//do user virtual to physical translation of the CB chain ++#define DMA_PREPARE _IOWR(DMA_MAGIC, 0, struct DmaControlBlock *) ++ ++//kick the pre-prepared CB chain ++#define DMA_KICK _IOW(DMA_MAGIC, 1, struct DmaControlBlock *) ++ ++//prepare it, kick it, wait for it ++#define DMA_PREPARE_KICK_WAIT _IOWR(DMA_MAGIC, 2, struct DmaControlBlock *) ++ ++//prepare it, kick it, don't wait for it ++#define DMA_PREPARE_KICK _IOWR(DMA_MAGIC, 3, struct DmaControlBlock *) ++ ++//not currently implemented ++#define DMA_WAIT_ONE _IO(DMA_MAGIC, 4, struct DmaControlBlock *) ++ ++//wait on all kicked CB chains ++#define DMA_WAIT_ALL _IO(DMA_MAGIC, 5) ++ ++//in order to discover the largest AXI burst that should be programmed into the transfer params ++#define DMA_MAX_BURST _IO(DMA_MAGIC, 6) ++ ++//set the address range through which the user address is assumed to already by a physical address ++#define DMA_SET_MIN_PHYS _IOW(DMA_MAGIC, 7, unsigned long) ++#define DMA_SET_MAX_PHYS _IOW(DMA_MAGIC, 8, unsigned long) ++#define DMA_SET_PHYS_OFFSET _IOW(DMA_MAGIC, 9, unsigned long) ++ ++//used to define the size for the CMA-based allocation *in pages*, can only be done once once the file is opened ++#define DMA_CMA_SET_SIZE _IOW(DMA_MAGIC, 10, unsigned long) ++ ++//used to get the version of the module, to test for a capability ++#define DMA_GET_VERSION _IO(DMA_MAGIC, 99) ++ ++#define VERSION_NUMBER 1 ++ ++#define VIRT_TO_BUS_CACHE_SIZE 8 ++ ++/***** FILE OPS *****/ ++static int Open(struct inode *pInode, struct file *pFile); ++static int Release(struct inode *pInode, struct file *pFile); ++static long Ioctl(struct file *pFile, unsigned int cmd, unsigned long arg); ++static ssize_t Read(struct file *pFile, char __user *pUser, size_t count, loff_t *offp); ++static int Mmap(struct file *pFile, struct vm_area_struct *pVma); ++ ++/***** VMA OPS ****/ ++static void VmaOpen4k(struct vm_area_struct *pVma); ++static void VmaClose4k(struct vm_area_struct *pVma); ++static int VmaFault4k(struct vm_area_struct *pVma, struct vm_fault *pVmf); ++ ++/**** DMA PROTOTYPES */ ++static struct DmaControlBlock __user *DmaPrepare(struct DmaControlBlock __user *pUserCB, int *pError); ++static int DmaKick(struct DmaControlBlock __user *pUserCB); ++static void DmaWaitAll(void); ++ ++/**** GENERIC ****/ ++static int __init dmaer_init(void); ++static void __exit dmaer_exit(void); ++ ++/*** OPS ***/ ++static struct vm_operations_struct g_vmOps4k = { ++ .open = VmaOpen4k, ++ .close = VmaClose4k, ++ .fault = VmaFault4k, ++}; ++ ++static struct file_operations g_fOps = { ++ .owner = THIS_MODULE, ++ .llseek = 0, ++ .read = Read, ++ .write = 0, ++ .unlocked_ioctl = Ioctl, ++ .open = Open, ++ .release = Release, ++ .mmap = Mmap, ++}; ++ ++/***** GLOBALS ******/ ++static dev_t g_majorMinor; ++ ++//tracking usage of the two files ++static atomic_t g_oneLock4k = ATOMIC_INIT(1); ++ ++//device operations ++static struct cdev g_cDev; ++static int g_trackedPages = 0; ++ ++//dma control ++static unsigned int *g_pDmaChanBase; ++static int g_dmaIrq; ++static int g_dmaChan; ++ ++//cma allocation ++static int g_cmaHandle; ++ ++//user virtual to bus address translation acceleration ++static unsigned long g_virtAddr[VIRT_TO_BUS_CACHE_SIZE]; ++static unsigned long g_busAddr[VIRT_TO_BUS_CACHE_SIZE]; ++static unsigned long g_cbVirtAddr; ++static unsigned long g_cbBusAddr; ++static int g_cacheInsertAt; ++static int g_cacheHit, g_cacheMiss; ++ ++//off by default ++static void __user *g_pMinPhys; ++static void __user *g_pMaxPhys; ++static unsigned long g_physOffset; ++ ++/****** CACHE OPERATIONS ********/ ++static inline void FlushAddrCache(void) ++{ ++ int count = 0; ++ for (count = 0; count < VIRT_TO_BUS_CACHE_SIZE; count++) ++ g_virtAddr[count] = 0xffffffff; //never going to match as we always chop the bottom bits anyway ++ ++ g_cbVirtAddr = 0xffffffff; ++ ++ g_cacheInsertAt = 0; ++} ++ ++//translate from a user virtual address to a bus address by mapping the page ++//NB this won't lock a page in memory, so to avoid potential paging issues using kernel logical addresses ++static inline void __iomem *UserVirtualToBus(void __user *pUser) ++{ ++ int mapped; ++ struct page *pPage; ++ void *phys; ++ ++ //map it (requiring that the pointer points to something that does not hang off the page boundary) ++ mapped = get_user_pages(current, current->mm, ++ (unsigned long)pUser, 1, ++ 1, 0, ++ &pPage, ++ 0); ++ ++ if (mapped <= 0) //error ++ return 0; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "user virtual %p arm phys %p bus %p\n", ++ pUser, page_address(pPage), (void __iomem *)__virt_to_bus(page_address(pPage))); ++ ++ //get the arm physical address ++ phys = page_address(pPage) + offset_in_page(pUser); ++ page_cache_release(pPage); ++ ++ //and now the bus address ++ return (void __iomem *)__virt_to_bus(phys); ++} ++ ++static inline void __iomem *UserVirtualToBusViaCbCache(void __user *pUser) ++{ ++ unsigned long virtual_page = (unsigned long)pUser & ~4095; ++ unsigned long page_offset = (unsigned long)pUser & 4095; ++ unsigned long bus_addr; ++ ++ if (g_cbVirtAddr == virtual_page) ++ { ++ bus_addr = g_cbBusAddr + page_offset; ++ g_cacheHit++; ++ return (void __iomem *)bus_addr; ++ } ++ else ++ { ++ bus_addr = (unsigned long)UserVirtualToBus(pUser); ++ ++ if (!bus_addr) ++ return 0; ++ ++ g_cbVirtAddr = virtual_page; ++ g_cbBusAddr = bus_addr & ~4095; ++ g_cacheMiss++; ++ ++ return (void __iomem *)bus_addr; ++ } ++} ++ ++//do the same as above, by query our virt->bus cache ++static inline void __iomem *UserVirtualToBusViaCache(void __user *pUser) ++{ ++ int count; ++ //get the page and its offset ++ unsigned long virtual_page = (unsigned long)pUser & ~4095; ++ unsigned long page_offset = (unsigned long)pUser & 4095; ++ unsigned long bus_addr; ++ ++ if (pUser >= g_pMinPhys && pUser < g_pMaxPhys) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "user->phys passthrough on %p\n", pUser); ++ return (void __iomem *)((unsigned long)pUser + g_physOffset); ++ } ++ ++ //check the cache for our entry ++ for (count = 0; count < VIRT_TO_BUS_CACHE_SIZE; count++) ++ if (g_virtAddr[count] == virtual_page) ++ { ++ bus_addr = g_busAddr[count] + page_offset; ++ g_cacheHit++; ++ return (void __iomem *)bus_addr; ++ } ++ ++ //not found, look up manually and then insert its page address ++ bus_addr = (unsigned long)UserVirtualToBus(pUser); ++ ++ if (!bus_addr) ++ return 0; ++ ++ g_virtAddr[g_cacheInsertAt] = virtual_page; ++ g_busAddr[g_cacheInsertAt] = bus_addr & ~4095; ++ ++ //round robin ++ g_cacheInsertAt++; ++ if (g_cacheInsertAt == VIRT_TO_BUS_CACHE_SIZE) ++ g_cacheInsertAt = 0; ++ ++ g_cacheMiss++; ++ ++ return (void __iomem *)bus_addr; ++} ++ ++/***** FILE OPERATIONS ****/ ++static int Open(struct inode *pInode, struct file *pFile) ++{ ++ PRINTK(KERN_DEBUG "file opening: %d/%d\n", imajor(pInode), iminor(pInode)); ++ ++ //check which device we are ++ if (iminor(pInode) == 0) //4k ++ { ++ //only one at a time ++ if (!atomic_dec_and_test(&g_oneLock4k)) ++ { ++ atomic_inc(&g_oneLock4k); ++ return -EBUSY; ++ } ++ } ++ else ++ return -EINVAL; ++ ++ //todo there will be trouble if two different processes open the files ++ ++ //reset after any file is opened ++ g_pMinPhys = (void __user *)-1; ++ g_pMaxPhys = (void __user *)0; ++ g_physOffset = 0; ++ g_cmaHandle = 0; ++ ++ return 0; ++} ++ ++static int Release(struct inode *pInode, struct file *pFile) ++{ ++ PRINTK(KERN_DEBUG "file closing, %d pages tracked\n", g_trackedPages); ++ if (g_trackedPages) ++ PRINTK(KERN_ERR "we\'re leaking memory!\n"); ++ ++ //wait for any dmas to finish ++ DmaWaitAll(); ++ ++ //free this memory on the application closing the file or it crashing (implicitly closing the file) ++ if (g_cmaHandle) ++ { ++ PRINTK(KERN_DEBUG "unlocking vc memory\n"); ++ if (UnlockVcMemory(g_cmaHandle)) ++ PRINTK(KERN_ERR "uh-oh, unable to unlock vc memory!\n"); ++ PRINTK(KERN_DEBUG "releasing vc memory\n"); ++ if (ReleaseVcMemory(g_cmaHandle)) ++ PRINTK(KERN_ERR "uh-oh, unable to release vc memory!\n"); ++ } ++ ++ if (iminor(pInode) == 0) ++ atomic_inc(&g_oneLock4k); ++ else ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static struct DmaControlBlock __user *DmaPrepare(struct DmaControlBlock __user *pUserCB, int *pError) ++{ ++ struct DmaControlBlock kernCB; ++ struct DmaControlBlock __user *pUNext; ++ void __iomem *pSourceBus, __iomem *pDestBus; ++ ++ //get the control block into kernel memory so we can work on it ++ if (copy_from_user(&kernCB, pUserCB, sizeof(struct DmaControlBlock)) != 0) ++ { ++ PRINTK(KERN_ERR "copy_from_user failed for user cb %p\n", pUserCB); ++ *pError = 1; ++ return 0; ++ } ++ ++ if (kernCB.m_pSourceAddr == 0 || kernCB.m_pDestAddr == 0) ++ { ++ PRINTK(KERN_ERR "faulty source (%p) dest (%p) addresses for user cb %p\n", ++ kernCB.m_pSourceAddr, kernCB.m_pDestAddr, pUserCB); ++ *pError = 1; ++ return 0; ++ } ++ ++ pSourceBus = UserVirtualToBusViaCache(kernCB.m_pSourceAddr); ++ pDestBus = UserVirtualToBusViaCache(kernCB.m_pDestAddr); ++ ++ if (!pSourceBus || !pDestBus) ++ { ++ PRINTK(KERN_ERR "virtual to bus translation failure for source/dest %p/%p->%p/%p\n", ++ kernCB.m_pSourceAddr, kernCB.m_pDestAddr, ++ pSourceBus, pDestBus); ++ *pError = 1; ++ return 0; ++ } ++ ++ //update the user structure with the new bus addresses ++ kernCB.m_pSourceAddr = pSourceBus; ++ kernCB.m_pDestAddr = pDestBus; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "final source %p dest %p\n", kernCB.m_pSourceAddr, kernCB.m_pDestAddr); ++ ++ //sort out the bus address for the next block ++ pUNext = kernCB.m_pNext; ++ ++ if (kernCB.m_pNext) ++ { ++ void __iomem *pNextBus; ++ pNextBus = UserVirtualToBusViaCbCache(kernCB.m_pNext); ++ ++ if (!pNextBus) ++ { ++ PRINTK(KERN_ERR "virtual to bus translation failure for m_pNext\n"); ++ *pError = 1; ++ return 0; ++ } ++ ++ //update the pointer with the bus address ++ kernCB.m_pNext = pNextBus; ++ } ++ ++ //write it back to user space ++ if (copy_to_user(pUserCB, &kernCB, sizeof(struct DmaControlBlock)) != 0) ++ { ++ PRINTK(KERN_ERR "copy_to_user failed for cb %p\n", pUserCB); ++ *pError = 1; ++ return 0; ++ } ++ ++ __cpuc_flush_dcache_area(pUserCB, 32); ++ ++ *pError = 0; ++ return pUNext; ++} ++ ++static int DmaKick(struct DmaControlBlock __user *pUserCB) ++{ ++ void __iomem *pBusCB; ++ ++ pBusCB = UserVirtualToBusViaCbCache(pUserCB); ++ if (!pBusCB) ++ { ++ PRINTK(KERN_ERR "virtual to bus translation failure for cb\n"); ++ return 1; ++ } ++ ++ //flush_cache_all(); ++ ++ bcm_dma_start(g_pDmaChanBase, (dma_addr_t)pBusCB); ++ ++ return 0; ++} ++ ++static void DmaWaitAll(void) ++{ ++ int counter = 0; ++ volatile int inner_count; ++ volatile unsigned int cs; ++ unsigned long time_before, time_after; ++ ++ time_before = jiffies; ++ //bcm_dma_wait_idle(g_pDmaChanBase); ++ dsb(); ++ ++ cs = readl(g_pDmaChanBase); ++ ++ while ((cs & 1) == 1) ++ { ++ cs = readl(g_pDmaChanBase); ++ counter++; ++ ++ for (inner_count = 0; inner_count < 32; inner_count++); ++ ++ asm volatile ("MCR p15,0,r0,c7,c0,4 \n"); ++ //cpu_do_idle(); ++ if (counter >= 1000000) ++ { ++ PRINTK(KERN_WARNING "DMA failed to finish in a timely fashion\n"); ++ break; ++ } ++ } ++ time_after = jiffies; ++ PRINTK_VERBOSE(KERN_DEBUG "done, counter %d, cs %08x", counter, cs); ++ PRINTK_VERBOSE(KERN_DEBUG "took %ld jiffies, %d HZ\n", time_after - time_before, HZ); ++} ++ ++static long Ioctl(struct file *pFile, unsigned int cmd, unsigned long arg) ++{ ++ int error = 0; ++ PRINTK_VERBOSE(KERN_DEBUG "ioctl cmd %x arg %lx\n", cmd, arg); ++ ++ switch (cmd) ++ { ++ case DMA_PREPARE: ++ case DMA_PREPARE_KICK: ++ case DMA_PREPARE_KICK_WAIT: ++ { ++ struct DmaControlBlock __user *pUCB = (struct DmaControlBlock *)arg; ++ int steps = 0; ++ unsigned long start_time = jiffies; ++ (void)start_time; ++ ++ //flush our address cache ++ FlushAddrCache(); ++ ++ PRINTK_VERBOSE(KERN_DEBUG "dma prepare\n"); ++ ++ //do virtual to bus translation for each entry ++ do ++ { ++ pUCB = DmaPrepare(pUCB, &error); ++ } while (error == 0 && ++steps && pUCB); ++ PRINTK_VERBOSE(KERN_DEBUG "prepare done in %d steps, %ld\n", steps, jiffies - start_time); ++ ++ //carry straight on if we want to kick too ++ if (cmd == DMA_PREPARE || error) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "falling out\n"); ++ return error ? -EINVAL : 0; ++ } ++ } ++ case DMA_KICK: ++ PRINTK_VERBOSE(KERN_DEBUG "dma begin\n"); ++ ++ if (cmd == DMA_KICK) ++ FlushAddrCache(); ++ ++ DmaKick((struct DmaControlBlock __user *)arg); ++ ++ if (cmd != DMA_PREPARE_KICK_WAIT) ++ break; ++/* case DMA_WAIT_ONE: ++ //PRINTK(KERN_DEBUG "dma wait one\n"); ++ break;*/ ++ case DMA_WAIT_ALL: ++ //PRINTK(KERN_DEBUG "dma wait all\n"); ++ DmaWaitAll(); ++ break; ++ case DMA_MAX_BURST: ++ if (g_dmaChan == 0) ++ return 10; ++ else ++ return 5; ++ case DMA_SET_MIN_PHYS: ++ g_pMinPhys = (void __user *)arg; ++ PRINTK(KERN_DEBUG "min/max user/phys bypass set to %p %p\n", g_pMinPhys, g_pMaxPhys); ++ break; ++ case DMA_SET_MAX_PHYS: ++ g_pMaxPhys = (void __user *)arg; ++ PRINTK(KERN_DEBUG "min/max user/phys bypass set to %p %p\n", g_pMinPhys, g_pMaxPhys); ++ break; ++ case DMA_SET_PHYS_OFFSET: ++ g_physOffset = arg; ++ PRINTK(KERN_DEBUG "user/phys bypass offset set to %ld\n", g_physOffset); ++ break; ++ case DMA_CMA_SET_SIZE: ++ { ++ unsigned int pBusAddr; ++ ++ if (g_cmaHandle) ++ { ++ PRINTK(KERN_ERR "memory has already been allocated (handle %d)\n", g_cmaHandle); ++ return -EINVAL; ++ } ++ ++ PRINTK(KERN_INFO "allocating %ld bytes of VC memory\n", arg * 4096); ++ ++ //get the memory ++ if (AllocateVcMemory(&g_cmaHandle, arg * 4096, 4096, MEM_FLAG_L1_NONALLOCATING | MEM_FLAG_NO_INIT | MEM_FLAG_HINT_PERMALOCK)) ++ { ++ PRINTK(KERN_ERR "failed to allocate %ld bytes of VC memory\n", arg * 4096); ++ g_cmaHandle = 0; ++ return -EINVAL; ++ } ++ ++ //get an address for it ++ PRINTK(KERN_INFO "trying to map VC memory\n"); ++ ++ if (LockVcMemory(&pBusAddr, g_cmaHandle)) ++ { ++ PRINTK(KERN_ERR "failed to map CMA handle %d, releasing memory\n", g_cmaHandle); ++ ReleaseVcMemory(g_cmaHandle); ++ g_cmaHandle = 0; ++ } ++ ++ PRINTK(KERN_INFO "bus address for CMA memory is %x\n", pBusAddr); ++ return pBusAddr; ++ } ++ case DMA_GET_VERSION: ++ PRINTK(KERN_DEBUG "returning version number, %d\n", VERSION_NUMBER); ++ return VERSION_NUMBER; ++ default: ++ PRINTK(KERN_DEBUG "unknown ioctl: %d\n", cmd); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static ssize_t Read(struct file *pFile, char __user *pUser, size_t count, loff_t *offp) ++{ ++ return -EIO; ++} ++ ++static int Mmap(struct file *pFile, struct vm_area_struct *pVma) ++{ ++ struct PageList *pPages; ++ struct VmaPageList *pVmaList; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "MMAP vma %p, length %ld (%s %d)\n", ++ pVma, pVma->vm_end - pVma->vm_start, ++ current->comm, current->pid); ++ PRINTK_VERBOSE(KERN_DEBUG "MMAP %p %d (tracked %d)\n", pVma, current->pid, g_trackedPages); ++ ++ //make a new page list ++ pPages = (struct PageList *)kmalloc(sizeof(struct PageList), GFP_KERNEL); ++ if (!pPages) ++ { ++ PRINTK(KERN_ERR "couldn\'t allocate a new page list (%s %d)\n", ++ current->comm, current->pid); ++ return -ENOMEM; ++ } ++ ++ //clear the page list ++ pPages->m_used = 0; ++ pPages->m_pNext = 0; ++ ++ //insert our vma and new page list somewhere ++ if (!pVma->vm_private_data) ++ { ++ struct VmaPageList *pList; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "new vma list, making new one (%s %d)\n", ++ current->comm, current->pid); ++ ++ //make a new vma list ++ pList = (struct VmaPageList *)kmalloc(sizeof(struct VmaPageList), GFP_KERNEL); ++ if (!pList) ++ { ++ PRINTK(KERN_ERR "couldn\'t allocate vma page list (%s %d)\n", ++ current->comm, current->pid); ++ kfree(pPages); ++ return -ENOMEM; ++ } ++ ++ //clear this list ++ pVma->vm_private_data = (void *)pList; ++ pList->m_refCount = 0; ++ } ++ ++ pVmaList = (struct VmaPageList *)pVma->vm_private_data; ++ ++ //add it to the vma list ++ pVmaList->m_pPageHead = pPages; ++ pVmaList->m_pPageTail = pPages; ++ ++ pVma->vm_ops = &g_vmOps4k; ++ pVma->vm_flags |= VM_IO; ++ ++ VmaOpen4k(pVma); ++ ++ return 0; ++} ++ ++/****** VMA OPERATIONS ******/ ++ ++static void VmaOpen4k(struct vm_area_struct *pVma) ++{ ++ struct VmaPageList *pVmaList; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "vma open %p private %p (%s %d), %d live pages\n", pVma, pVma->vm_private_data, current->comm, current->pid, g_trackedPages); ++ PRINTK_VERBOSE(KERN_DEBUG "OPEN %p %d %ld pages (tracked pages %d)\n", ++ pVma, current->pid, (pVma->vm_end - pVma->vm_start) >> 12, ++ g_trackedPages); ++ ++ pVmaList = (struct VmaPageList *)pVma->vm_private_data; ++ ++ if (pVmaList) ++ { ++ pVmaList->m_refCount++; ++ PRINTK_VERBOSE(KERN_DEBUG "ref count is now %d\n", pVmaList->m_refCount); ++ } ++ else ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "err, open but no vma page list\n"); ++ } ++} ++ ++static void VmaClose4k(struct vm_area_struct *pVma) ++{ ++ struct VmaPageList *pVmaList; ++ int freed = 0; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "vma close %p private %p (%s %d)\n", pVma, pVma->vm_private_data, current->comm, current->pid); ++ ++ //wait for any dmas to finish ++ DmaWaitAll(); ++ ++ //find our vma in the list ++ pVmaList = (struct VmaPageList *)pVma->vm_private_data; ++ ++ //may be a fork ++ if (pVmaList) ++ { ++ struct PageList *pPages; ++ ++ pVmaList->m_refCount--; ++ ++ if (pVmaList->m_refCount == 0) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "found vma, freeing pages (%s %d)\n", ++ current->comm, current->pid); ++ ++ pPages = pVmaList->m_pPageHead; ++ ++ if (!pPages) ++ { ++ PRINTK(KERN_ERR "no page list (%s %d)!\n", ++ current->comm, current->pid); ++ return; ++ } ++ ++ while (pPages) ++ { ++ struct PageList *next; ++ int count; ++ ++ PRINTK_VERBOSE(KERN_DEBUG "page list (%s %d)\n", ++ current->comm, current->pid); ++ ++ next = pPages->m_pNext; ++ for (count = 0; count < pPages->m_used; count++) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "freeing page %p (%s %d)\n", ++ pPages->m_pPages[count], ++ current->comm, current->pid); ++ __free_pages(pPages->m_pPages[count], 0); ++ g_trackedPages--; ++ freed++; ++ } ++ ++ PRINTK_VERBOSE(KERN_DEBUG "freeing page list (%s %d)\n", ++ current->comm, current->pid); ++ kfree(pPages); ++ pPages = next; ++ } ++ ++ //remove our vma from the list ++ kfree(pVmaList); ++ pVma->vm_private_data = 0; ++ } ++ else ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "ref count is %d, not closing\n", pVmaList->m_refCount); ++ } ++ } ++ else ++ { ++ PRINTK_VERBOSE(KERN_ERR "uh-oh, vma %p not found (%s %d)!\n", pVma, current->comm, current->pid); ++ PRINTK_VERBOSE(KERN_ERR "CLOSE ERR\n"); ++ } ++ ++ PRINTK_VERBOSE(KERN_DEBUG "CLOSE %p %d %d pages (tracked pages %d)", ++ pVma, current->pid, freed, g_trackedPages); ++ ++ PRINTK_VERBOSE(KERN_DEBUG "%d pages open\n", g_trackedPages); ++} ++ ++static int VmaFault4k(struct vm_area_struct *pVma, struct vm_fault *pVmf) ++{ ++ PRINTK_VERBOSE(KERN_DEBUG "vma fault for vma %p private %p at offset %ld (%s %d)\n", pVma, pVma->vm_private_data, pVmf->pgoff, ++ current->comm, current->pid); ++ PRINTK_VERBOSE(KERN_DEBUG "FAULT\n"); ++ pVmf->page = alloc_page(GFP_KERNEL); ++ ++ if (pVmf->page) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "alloc page virtual %p\n", page_address(pVmf->page)); ++ } ++ ++ if (!pVmf->page) ++ { ++ PRINTK(KERN_ERR "vma fault oom (%s %d)\n", current->comm, current->pid); ++ return VM_FAULT_OOM; ++ } ++ else ++ { ++ struct VmaPageList *pVmaList; ++ ++ get_page(pVmf->page); ++ g_trackedPages++; ++ ++ //find our vma in the list ++ pVmaList = (struct VmaPageList *)pVma->vm_private_data; ++ ++ if (pVmaList) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "vma found (%s %d)\n", current->comm, current->pid); ++ ++ if (pVmaList->m_pPageTail->m_used == PAGES_PER_LIST) ++ { ++ PRINTK_VERBOSE(KERN_DEBUG "making new page list (%s %d)\n", current->comm, current->pid); ++ //making a new page list ++ pVmaList->m_pPageTail->m_pNext = (struct PageList *)kmalloc(sizeof(struct PageList), GFP_KERNEL); ++ if (!pVmaList->m_pPageTail->m_pNext) ++ return -ENOMEM; ++ ++ //update the tail pointer ++ pVmaList->m_pPageTail = pVmaList->m_pPageTail->m_pNext; ++ pVmaList->m_pPageTail->m_used = 0; ++ pVmaList->m_pPageTail->m_pNext = 0; ++ } ++ ++ PRINTK_VERBOSE(KERN_DEBUG "adding page to list (%s %d)\n", current->comm, current->pid); ++ ++ pVmaList->m_pPageTail->m_pPages[pVmaList->m_pPageTail->m_used] = pVmf->page; ++ pVmaList->m_pPageTail->m_used++; ++ } ++ else ++ PRINTK(KERN_ERR "returned page for vma we don\'t know %p (%s %d)\n", pVma, current->comm, current->pid); ++ ++ return 0; ++ } ++} ++ ++/****** GENERIC FUNCTIONS ******/ ++static int __init dmaer_init(void) ++{ ++ int result = alloc_chrdev_region(&g_majorMinor, 0, 1, "dmaer"); ++ if (result < 0) ++ { ++ PRINTK(KERN_ERR "unable to get major device number\n"); ++ return result; ++ } ++ else ++ PRINTK(KERN_DEBUG "major device number %d\n", MAJOR(g_majorMinor)); ++ ++ PRINTK(KERN_DEBUG "vma list size %d, page list size %d, page size %ld\n", ++ sizeof(struct VmaPageList), sizeof(struct PageList), PAGE_SIZE); ++ ++ //get a dma channel to work with ++ result = bcm_dma_chan_alloc(BCM_DMA_FEATURE_FAST, (void **)&g_pDmaChanBase, &g_dmaIrq); ++ ++ //uncomment to force to channel 0 ++ //result = 0; ++ //g_pDmaChanBase = 0xce808000; ++ ++ if (result < 0) ++ { ++ PRINTK(KERN_ERR "failed to allocate dma channel\n"); ++ cdev_del(&g_cDev); ++ unregister_chrdev_region(g_majorMinor, 1); ++ } ++ ++ //reset the channel ++ PRINTK(KERN_DEBUG "allocated dma channel %d (%p), initial state %08x\n", result, g_pDmaChanBase, *g_pDmaChanBase); ++ *g_pDmaChanBase = 1 << 31; ++ PRINTK(KERN_DEBUG "post-reset %08x\n", *g_pDmaChanBase); ++ ++ g_dmaChan = result; ++ ++ //clear the cache stats ++ g_cacheHit = 0; ++ g_cacheMiss = 0; ++ ++ //register our device - after this we are go go go ++ cdev_init(&g_cDev, &g_fOps); ++ g_cDev.owner = THIS_MODULE; ++ g_cDev.ops = &g_fOps; ++ ++ result = cdev_add(&g_cDev, g_majorMinor, 1); ++ if (result < 0) ++ { ++ PRINTK(KERN_ERR "failed to add character device\n"); ++ unregister_chrdev_region(g_majorMinor, 1); ++ bcm_dma_chan_free(g_dmaChan); ++ return result; ++ } ++ ++ return 0; ++} ++ ++static void __exit dmaer_exit(void) ++{ ++ PRINTK(KERN_INFO "closing dmaer device, cache stats: %d hits %d misses\n", g_cacheHit, g_cacheMiss); ++ //unregister the device ++ cdev_del(&g_cDev); ++ unregister_chrdev_region(g_majorMinor, 1); ++ //free the dma channel ++ bcm_dma_chan_free(g_dmaChan); ++} ++ ++MODULE_LICENSE("Dual BSD/GPL"); ++MODULE_AUTHOR("Simon Hall"); ++module_init(dmaer_init); ++module_exit(dmaer_exit); ++ +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vc_support.h +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/vc_support.h 2014-04-28 00:43:01.000000000 +0000 +@@ -0,0 +1,69 @@ ++#ifndef _VC_SUPPORT_H_ ++#define _VC_SUPPORT_H_ ++ ++/* ++ * vc_support.h ++ * ++ * Created on: 25 Nov 2012 ++ * Author: Simon ++ */ ++ ++enum { ++/* ++ If a MEM_HANDLE_T is discardable, the memory manager may resize it to size ++ 0 at any time when it is not locked or retained. ++ */ ++ MEM_FLAG_DISCARDABLE = 1 << 0, ++ ++ /* ++ If a MEM_HANDLE_T is allocating (or normal), its block of memory will be ++ accessed in an allocating fashion through the cache. ++ */ ++ MEM_FLAG_NORMAL = 0 << 2, ++ MEM_FLAG_ALLOCATING = MEM_FLAG_NORMAL, ++ ++ /* ++ If a MEM_HANDLE_T is direct, its block of memory will be accessed ++ directly, bypassing the cache. ++ */ ++ MEM_FLAG_DIRECT = 1 << 2, ++ ++ /* ++ If a MEM_HANDLE_T is coherent, its block of memory will be accessed in a ++ non-allocating fashion through the cache. ++ */ ++ MEM_FLAG_COHERENT = 2 << 2, ++ ++ /* ++ If a MEM_HANDLE_T is L1-nonallocating, its block of memory will be accessed by ++ the VPU in a fashion which is allocating in L2, but only coherent in L1. ++ */ ++ MEM_FLAG_L1_NONALLOCATING = (MEM_FLAG_DIRECT | MEM_FLAG_COHERENT), ++ ++ /* ++ If a MEM_HANDLE_T is zero'd, its contents are set to 0 rather than ++ MEM_HANDLE_INVALID on allocation and resize up. ++ */ ++ MEM_FLAG_ZERO = 1 << 4, ++ ++ /* ++ If a MEM_HANDLE_T is uninitialised, it will not be reset to a defined value ++ (either zero, or all 1's) on allocation. ++ */ ++ MEM_FLAG_NO_INIT = 1 << 5, ++ ++ /* ++ Hints. ++ */ ++ MEM_FLAG_HINT_PERMALOCK = 1 << 6, /* Likely to be locked for long periods of time. */ ++}; ++ ++unsigned int AllocateVcMemory(unsigned int *pHandle, unsigned int size, unsigned int alignment, unsigned int flags); ++unsigned int ReleaseVcMemory(unsigned int handle); ++unsigned int LockVcMemory(unsigned int *pBusAddress, unsigned int handle); ++unsigned int UnlockVcMemory(unsigned int handle); ++ ++unsigned int ExecuteVcCode(unsigned int code, ++ unsigned int r0, unsigned int r1, unsigned int r2, unsigned int r3, unsigned int r4, unsigned int r5); ++ ++#endif +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/vc_support.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/vc_support.c 2014-04-28 00:43:01.000000000 +0000 +@@ -0,0 +1,319 @@ ++/* ++ * vc_support.c ++ * ++ * Created on: 25 Nov 2012 ++ * Author: Simon ++ */ ++ ++#include ++#include ++ ++#ifdef ECLIPSE_IGNORE ++ ++#define __user ++#define __init ++#define __exit ++#define __iomem ++#define KERN_DEBUG ++#define KERN_ERR ++#define KERN_WARNING ++#define KERN_INFO ++#define _IOWR(a, b, c) b ++#define _IOW(a, b, c) b ++#define _IO(a, b) b ++ ++#endif ++ ++/****** VC MAILBOX FUNCTIONALITY ******/ ++unsigned int AllocateVcMemory(unsigned int *pHandle, unsigned int size, unsigned int alignment, unsigned int flags) ++{ ++ struct vc_msg ++ { ++ unsigned int m_msgSize; ++ unsigned int m_response; ++ ++ struct vc_tag ++ { ++ unsigned int m_tagId; ++ unsigned int m_sendBufferSize; ++ union { ++ unsigned int m_sendDataSize; ++ unsigned int m_recvDataSize; ++ }; ++ ++ struct args ++ { ++ union { ++ unsigned int m_size; ++ unsigned int m_handle; ++ }; ++ unsigned int m_alignment; ++ unsigned int m_flags; ++ } m_args; ++ } m_tag; ++ ++ unsigned int m_endTag; ++ } msg; ++ int s; ++ ++ msg.m_msgSize = sizeof(msg); ++ msg.m_response = 0; ++ msg.m_endTag = 0; ++ ++ //fill in the tag for the allocation command ++ msg.m_tag.m_tagId = 0x3000c; ++ msg.m_tag.m_sendBufferSize = 12; ++ msg.m_tag.m_sendDataSize = 12; ++ ++ //fill in our args ++ msg.m_tag.m_args.m_size = size; ++ msg.m_tag.m_args.m_alignment = alignment; ++ msg.m_tag.m_args.m_flags = flags; ++ ++ //run the command ++ s = bcm_mailbox_property(&msg, sizeof(msg)); ++ ++ if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) ++ { ++ *pHandle = msg.m_tag.m_args.m_handle; ++ return 0; ++ } ++ else ++ { ++ printk(KERN_ERR "failed to allocate vc memory: s=%d response=%08x recv data size=%08x\n", ++ s, msg.m_response, msg.m_tag.m_recvDataSize); ++ return 1; ++ } ++} ++ ++unsigned int ReleaseVcMemory(unsigned int handle) ++{ ++ struct vc_msg ++ { ++ unsigned int m_msgSize; ++ unsigned int m_response; ++ ++ struct vc_tag ++ { ++ unsigned int m_tagId; ++ unsigned int m_sendBufferSize; ++ union { ++ unsigned int m_sendDataSize; ++ unsigned int m_recvDataSize; ++ }; ++ ++ struct args ++ { ++ union { ++ unsigned int m_handle; ++ unsigned int m_error; ++ }; ++ } m_args; ++ } m_tag; ++ ++ unsigned int m_endTag; ++ } msg; ++ int s; ++ ++ msg.m_msgSize = sizeof(msg); ++ msg.m_response = 0; ++ msg.m_endTag = 0; ++ ++ //fill in the tag for the release command ++ msg.m_tag.m_tagId = 0x3000f; ++ msg.m_tag.m_sendBufferSize = 4; ++ msg.m_tag.m_sendDataSize = 4; ++ ++ //pass across the handle ++ msg.m_tag.m_args.m_handle = handle; ++ ++ s = bcm_mailbox_property(&msg, sizeof(msg)); ++ ++ if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004 && msg.m_tag.m_args.m_error == 0) ++ return 0; ++ else ++ { ++ printk(KERN_ERR "failed to release vc memory: s=%d response=%08x recv data size=%08x error=%08x\n", ++ s, msg.m_response, msg.m_tag.m_recvDataSize, msg.m_tag.m_args.m_error); ++ return 1; ++ } ++} ++ ++unsigned int LockVcMemory(unsigned int *pBusAddress, unsigned int handle) ++{ ++ struct vc_msg ++ { ++ unsigned int m_msgSize; ++ unsigned int m_response; ++ ++ struct vc_tag ++ { ++ unsigned int m_tagId; ++ unsigned int m_sendBufferSize; ++ union { ++ unsigned int m_sendDataSize; ++ unsigned int m_recvDataSize; ++ }; ++ ++ struct args ++ { ++ union { ++ unsigned int m_handle; ++ unsigned int m_busAddress; ++ }; ++ } m_args; ++ } m_tag; ++ ++ unsigned int m_endTag; ++ } msg; ++ int s; ++ ++ msg.m_msgSize = sizeof(msg); ++ msg.m_response = 0; ++ msg.m_endTag = 0; ++ ++ //fill in the tag for the lock command ++ msg.m_tag.m_tagId = 0x3000d; ++ msg.m_tag.m_sendBufferSize = 4; ++ msg.m_tag.m_sendDataSize = 4; ++ ++ //pass across the handle ++ msg.m_tag.m_args.m_handle = handle; ++ ++ s = bcm_mailbox_property(&msg, sizeof(msg)); ++ ++ if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) ++ { ++ //pick out the bus address ++ *pBusAddress = msg.m_tag.m_args.m_busAddress; ++ return 0; ++ } ++ else ++ { ++ printk(KERN_ERR "failed to lock vc memory: s=%d response=%08x recv data size=%08x\n", ++ s, msg.m_response, msg.m_tag.m_recvDataSize); ++ return 1; ++ } ++} ++ ++unsigned int UnlockVcMemory(unsigned int handle) ++{ ++ struct vc_msg ++ { ++ unsigned int m_msgSize; ++ unsigned int m_response; ++ ++ struct vc_tag ++ { ++ unsigned int m_tagId; ++ unsigned int m_sendBufferSize; ++ union { ++ unsigned int m_sendDataSize; ++ unsigned int m_recvDataSize; ++ }; ++ ++ struct args ++ { ++ union { ++ unsigned int m_handle; ++ unsigned int m_error; ++ }; ++ } m_args; ++ } m_tag; ++ ++ unsigned int m_endTag; ++ } msg; ++ int s; ++ ++ msg.m_msgSize = sizeof(msg); ++ msg.m_response = 0; ++ msg.m_endTag = 0; ++ ++ //fill in the tag for the unlock command ++ msg.m_tag.m_tagId = 0x3000e; ++ msg.m_tag.m_sendBufferSize = 4; ++ msg.m_tag.m_sendDataSize = 4; ++ ++ //pass across the handle ++ msg.m_tag.m_args.m_handle = handle; ++ ++ s = bcm_mailbox_property(&msg, sizeof(msg)); ++ ++ //check the error code too ++ if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004 && msg.m_tag.m_args.m_error == 0) ++ return 0; ++ else ++ { ++ printk(KERN_ERR "failed to unlock vc memory: s=%d response=%08x recv data size=%08x error%08x\n", ++ s, msg.m_response, msg.m_tag.m_recvDataSize, msg.m_tag.m_args.m_error); ++ return 1; ++ } ++} ++ ++unsigned int ExecuteVcCode(unsigned int code, ++ unsigned int r0, unsigned int r1, unsigned int r2, unsigned int r3, unsigned int r4, unsigned int r5) ++{ ++ struct vc_msg ++ { ++ unsigned int m_msgSize; ++ unsigned int m_response; ++ ++ struct vc_tag ++ { ++ unsigned int m_tagId; ++ unsigned int m_sendBufferSize; ++ union { ++ unsigned int m_sendDataSize; ++ unsigned int m_recvDataSize; ++ }; ++ ++ struct args ++ { ++ union { ++ unsigned int m_pCode; ++ unsigned int m_return; ++ }; ++ unsigned int m_r0; ++ unsigned int m_r1; ++ unsigned int m_r2; ++ unsigned int m_r3; ++ unsigned int m_r4; ++ unsigned int m_r5; ++ } m_args; ++ } m_tag; ++ ++ unsigned int m_endTag; ++ } msg; ++ int s; ++ ++ msg.m_msgSize = sizeof(msg); ++ msg.m_response = 0; ++ msg.m_endTag = 0; ++ ++ //fill in the tag for the unlock command ++ msg.m_tag.m_tagId = 0x30010; ++ msg.m_tag.m_sendBufferSize = 28; ++ msg.m_tag.m_sendDataSize = 28; ++ ++ //pass across the handle ++ msg.m_tag.m_args.m_pCode = code; ++ msg.m_tag.m_args.m_r0 = r0; ++ msg.m_tag.m_args.m_r1 = r1; ++ msg.m_tag.m_args.m_r2 = r2; ++ msg.m_tag.m_args.m_r3 = r3; ++ msg.m_tag.m_args.m_r4 = r4; ++ msg.m_tag.m_args.m_r5 = r5; ++ ++ s = bcm_mailbox_property(&msg, sizeof(msg)); ++ ++ //check the error code too ++ if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) ++ return msg.m_tag.m_args.m_return; ++ else ++ { ++ printk(KERN_ERR "failed to execute: s=%d response=%08x recv data size=%08x\n", ++ s, msg.m_response, msg.m_tag.m_recvDataSize); ++ return 1; ++ } ++} ++ +Index: linux-3.10-3.10.11/dummy/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1611_baf31097e790a22884aa4d40eb61bfa6207e4304.txt 2014-04-28 00:43:01.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.patch --- linux-3.10.11/debian/patches/rpi/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.patch 2014-04-28 00:43:03.000000000 +0000 @@ -0,0 +1,733 @@ +commit 8998330a2562f6e80efbf680f51ba05e538fb8d7 +Author: Aron Szabo +Date: Sat Jun 16 12:15:55 2012 +0200 + + lirc: added support for RaspberryPi GPIO + +Index: linux-3.10-3.10.11/drivers/staging/media/lirc/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/lirc/Kconfig 2014-04-27 23:37:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/lirc/Kconfig 2014-04-28 00:43:02.000000000 +0000 +@@ -38,6 +38,12 @@ + help + Driver for Homebrew Parallel Port Receivers + ++config LIRC_RPI ++ tristate "Homebrew GPIO Port Receiver/Transmitter for the RaspberryPi" ++ depends on LIRC ++ help ++ Driver for Homebrew GPIO Port Receiver/Transmitter for the RaspberryPi ++ + config LIRC_SASEM + tristate "Sasem USB IR Remote" + depends on LIRC && USB +Index: linux-3.10-3.10.11/drivers/staging/media/lirc/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/lirc/Makefile 2014-04-27 23:37:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/lirc/Makefile 2014-04-28 00:43:02.000000000 +0000 +@@ -7,6 +7,7 @@ + obj-$(CONFIG_LIRC_IGORPLUGUSB) += lirc_igorplugusb.o + obj-$(CONFIG_LIRC_IMON) += lirc_imon.o + obj-$(CONFIG_LIRC_PARALLEL) += lirc_parallel.o ++obj-$(CONFIG_LIRC_RPI) += lirc_rpi.o + obj-$(CONFIG_LIRC_SASEM) += lirc_sasem.o + obj-$(CONFIG_LIRC_SERIAL) += lirc_serial.o + obj-$(CONFIG_LIRC_SIR) += lirc_sir.o +Index: linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_rpi.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_rpi.c 2014-04-28 00:43:02.000000000 +0000 +@@ -0,0 +1,687 @@ ++/* ++ * lirc_rpi.c ++ * ++ * lirc_rpi - Device driver that records pulse- and pause-lengths ++ * (space-lengths) (just like the lirc_serial driver does) ++ * between GPIO interrupt events on the Raspberry Pi. ++ * Lots of code has been taken from the lirc_serial module, ++ * so I would like say thanks to the authors. ++ * ++ * Copyright (C) 2012 Aron Robert Szabo , ++ * Michael Bishop ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define LIRC_DRIVER_NAME "lirc_rpi" ++#define RBUF_LEN 256 ++#define LIRC_TRANSMITTER_LATENCY 256 ++ ++#ifndef MAX_UDELAY_MS ++#define MAX_UDELAY_US 5000 ++#else ++#define MAX_UDELAY_US (MAX_UDELAY_MS*1000) ++#endif ++ ++#define dprintk(fmt, args...) \ ++ do { \ ++ if (debug) \ ++ printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ ++ fmt, ## args); \ ++ } while (0) ++ ++/* module parameters */ ++ ++/* set the default GPIO input pin */ ++static int gpio_in_pin = 18; ++/* set the default GPIO output pin */ ++static int gpio_out_pin = 17; ++/* enable debugging messages */ ++static int debug; ++/* -1 = auto, 0 = active high, 1 = active low */ ++static int sense = -1; ++/* use softcarrier by default */ ++static int softcarrier = 1; ++ ++struct gpio_chip *gpiochip; ++struct irq_chip *irqchip; ++struct irq_data *irqdata; ++ ++/* forward declarations */ ++static long send_pulse(unsigned long length); ++static void send_space(long length); ++static void lirc_rpi_exit(void); ++ ++int valid_gpio_pins[] = { 0, 1, 4, 8, 7, 9, 10, 11, 14, 15, 17, 18, 21, 22, 23, ++ 24, 25 }; ++ ++static struct platform_device *lirc_rpi_dev; ++static struct timeval lasttv = { 0, 0 }; ++static struct lirc_buffer rbuf; ++static spinlock_t lock; ++ ++/* initialized/set in init_timing_params() */ ++static unsigned int freq = 38000; ++static unsigned int duty_cycle = 50; ++static unsigned long period; ++static unsigned long pulse_width; ++static unsigned long space_width; ++ ++static void safe_udelay(unsigned long usecs) ++{ ++ while (usecs > MAX_UDELAY_US) { ++ udelay(MAX_UDELAY_US); ++ usecs -= MAX_UDELAY_US; ++ } ++ udelay(usecs); ++} ++ ++static int init_timing_params(unsigned int new_duty_cycle, ++ unsigned int new_freq) ++{ ++ /* ++ * period, pulse/space width are kept with 8 binary places - ++ * IE multiplied by 256. ++ */ ++ if (256 * 1000000L / new_freq * new_duty_cycle / 100 <= ++ LIRC_TRANSMITTER_LATENCY) ++ return -EINVAL; ++ if (256 * 1000000L / new_freq * (100 - new_duty_cycle) / 100 <= ++ LIRC_TRANSMITTER_LATENCY) ++ return -EINVAL; ++ duty_cycle = new_duty_cycle; ++ freq = new_freq; ++ period = 256 * 1000000L / freq; ++ pulse_width = period * duty_cycle / 100; ++ space_width = period - pulse_width; ++ dprintk("in init_timing_params, freq=%d pulse=%ld, " ++ "space=%ld\n", freq, pulse_width, space_width); ++ return 0; ++} ++ ++static long send_pulse_softcarrier(unsigned long length) ++{ ++ int flag; ++ unsigned long actual, target, d; ++ ++ length <<= 8; ++ ++ actual = 0; target = 0; flag = 0; ++ while (actual < length) { ++ if (flag) { ++ gpiochip->set(gpiochip, gpio_out_pin, 0); ++ target += space_width; ++ } else { ++ gpiochip->set(gpiochip, gpio_out_pin, 1); ++ target += pulse_width; ++ } ++ d = (target - actual - ++ LIRC_TRANSMITTER_LATENCY + 128) >> 8; ++ /* ++ * Note - we've checked in ioctl that the pulse/space ++ * widths are big enough so that d is > 0 ++ */ ++ udelay(d); ++ actual += (d << 8) + LIRC_TRANSMITTER_LATENCY; ++ flag = !flag; ++ } ++ return (actual-length) >> 8; ++} ++ ++static long send_pulse(unsigned long length) ++{ ++ if (length <= 0) ++ return 0; ++ ++ if (softcarrier) { ++ return send_pulse_softcarrier(length); ++ } else { ++ gpiochip->set(gpiochip, gpio_out_pin, 1); ++ safe_udelay(length); ++ return 0; ++ } ++} ++ ++static void send_space(long length) ++{ ++ gpiochip->set(gpiochip, gpio_out_pin, 0); ++ if (length <= 0) ++ return; ++ safe_udelay(length); ++} ++ ++static void rbwrite(int l) ++{ ++ if (lirc_buffer_full(&rbuf)) { ++ /* no new signals will be accepted */ ++ dprintk("Buffer overrun\n"); ++ return; ++ } ++ lirc_buffer_write(&rbuf, (void *)&l); ++} ++ ++static void frbwrite(int l) ++{ ++ /* simple noise filter */ ++ static int pulse, space; ++ static unsigned int ptr; ++ ++ if (ptr > 0 && (l & PULSE_BIT)) { ++ pulse += l & PULSE_MASK; ++ if (pulse > 250) { ++ rbwrite(space); ++ rbwrite(pulse | PULSE_BIT); ++ ptr = 0; ++ pulse = 0; ++ } ++ return; ++ } ++ if (!(l & PULSE_BIT)) { ++ if (ptr == 0) { ++ if (l > 20000) { ++ space = l; ++ ptr++; ++ return; ++ } ++ } else { ++ if (l > 20000) { ++ space += pulse; ++ if (space > PULSE_MASK) ++ space = PULSE_MASK; ++ space += l; ++ if (space > PULSE_MASK) ++ space = PULSE_MASK; ++ pulse = 0; ++ return; ++ } ++ rbwrite(space); ++ rbwrite(pulse | PULSE_BIT); ++ ptr = 0; ++ pulse = 0; ++ } ++ } ++ rbwrite(l); ++} ++ ++static irqreturn_t irq_handler(int i, void *blah, struct pt_regs *regs) ++{ ++ struct timeval tv; ++ long deltv; ++ int data; ++ int signal; ++ ++ /* use the GPIO signal level */ ++ signal = gpiochip->get(gpiochip, gpio_in_pin); ++ ++ /* unmask the irq */ ++ irqchip->irq_unmask(irqdata); ++ ++ if (sense != -1) { ++ /* get current time */ ++ do_gettimeofday(&tv); ++ ++ /* calc time since last interrupt in microseconds */ ++ deltv = tv.tv_sec-lasttv.tv_sec; ++ if (tv.tv_sec < lasttv.tv_sec || ++ (tv.tv_sec == lasttv.tv_sec && ++ tv.tv_usec < lasttv.tv_usec)) { ++ printk(KERN_WARNING LIRC_DRIVER_NAME ++ ": AIEEEE: your clock just jumped backwards\n"); ++ printk(KERN_WARNING LIRC_DRIVER_NAME ++ ": %d %d %lx %lx %lx %lx\n", signal, sense, ++ tv.tv_sec, lasttv.tv_sec, ++ tv.tv_usec, lasttv.tv_usec); ++ data = PULSE_MASK; ++ } else if (deltv > 15) { ++ data = PULSE_MASK; /* really long time */ ++ if (!(signal^sense)) { ++ /* sanity check */ ++ printk(KERN_WARNING LIRC_DRIVER_NAME ++ ": AIEEEE: %d %d %lx %lx %lx %lx\n", ++ signal, sense, tv.tv_sec, lasttv.tv_sec, ++ tv.tv_usec, lasttv.tv_usec); ++ /* ++ * detecting pulse while this ++ * MUST be a space! ++ */ ++ sense = sense ? 0 : 1; ++ } ++ } else { ++ data = (int) (deltv*1000000 + ++ (tv.tv_usec - lasttv.tv_usec)); ++ } ++ frbwrite(signal^sense ? data : (data|PULSE_BIT)); ++ lasttv = tv; ++ wake_up_interruptible(&rbuf.wait_poll); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int is_right_chip(struct gpio_chip *chip, void *data) ++{ ++ dprintk("is_right_chip %s %d\n", chip->label, strcmp(data, chip->label)); ++ ++ if (strcmp(data, chip->label) == 0) ++ return 1; ++ return 0; ++} ++ ++static int init_port(void) ++{ ++ int i, nlow, nhigh, ret, irq; ++ ++ gpiochip = gpiochip_find("bcm2708_gpio", is_right_chip); ++ ++ if (!gpiochip) ++ return -ENODEV; ++ ++ if (gpio_request(gpio_out_pin, LIRC_DRIVER_NAME " ir/out")) { ++ printk(KERN_ALERT LIRC_DRIVER_NAME ++ ": cant claim gpio pin %d\n", gpio_out_pin); ++ ret = -ENODEV; ++ goto exit_init_port; ++ } ++ ++ if (gpio_request(gpio_in_pin, LIRC_DRIVER_NAME " ir/in")) { ++ printk(KERN_ALERT LIRC_DRIVER_NAME ++ ": cant claim gpio pin %d\n", gpio_in_pin); ++ ret = -ENODEV; ++ goto exit_gpio_free_out_pin; ++ } ++ ++ gpiochip->direction_input(gpiochip, gpio_in_pin); ++ gpiochip->direction_output(gpiochip, gpio_out_pin, 1); ++ gpiochip->set(gpiochip, gpio_out_pin, 0); ++ ++ irq = gpiochip->to_irq(gpiochip, gpio_in_pin); ++ dprintk("to_irq %d\n", irq); ++ irqdata = irq_get_irq_data(irq); ++ ++ if (irqdata && irqdata->chip) { ++ irqchip = irqdata->chip; ++ } else { ++ ret = -ENODEV; ++ goto exit_gpio_free_in_pin; ++ } ++ ++ /* if pin is high, then this must be an active low receiver. */ ++ if (sense == -1) { ++ /* wait 1/2 sec for the power supply */ ++ msleep(500); ++ ++ /* ++ * probe 9 times every 0.04s, collect "votes" for ++ * active high/low ++ */ ++ nlow = 0; ++ nhigh = 0; ++ for (i = 0; i < 9; i++) { ++ if (gpiochip->get(gpiochip, gpio_in_pin)) ++ nlow++; ++ else ++ nhigh++; ++ msleep(40); ++ } ++ sense = (nlow >= nhigh ? 1 : 0); ++ printk(KERN_INFO LIRC_DRIVER_NAME ++ ": auto-detected active %s receiver on GPIO pin %d\n", ++ sense ? "low" : "high", gpio_in_pin); ++ } else { ++ printk(KERN_INFO LIRC_DRIVER_NAME ++ ": manually using active %s receiver on GPIO pin %d\n", ++ sense ? "low" : "high", gpio_in_pin); ++ } ++ ++ return 0; ++ ++ exit_gpio_free_in_pin: ++ gpio_free(gpio_in_pin); ++ ++ exit_gpio_free_out_pin: ++ gpio_free(gpio_out_pin); ++ ++ exit_init_port: ++ return ret; ++} ++ ++// called when the character device is opened ++static int set_use_inc(void *data) ++{ ++ int result; ++ unsigned long flags; ++ ++ /* initialize timestamp */ ++ do_gettimeofday(&lasttv); ++ ++ result = request_irq(gpiochip->to_irq(gpiochip, gpio_in_pin), ++ (irq_handler_t) irq_handler, 0, ++ LIRC_DRIVER_NAME, (void*) 0); ++ ++ switch (result) { ++ case -EBUSY: ++ printk(KERN_ERR LIRC_DRIVER_NAME ++ ": IRQ %d is busy\n", ++ gpiochip->to_irq(gpiochip, gpio_in_pin)); ++ return -EBUSY; ++ case -EINVAL: ++ printk(KERN_ERR LIRC_DRIVER_NAME ++ ": Bad irq number or handler\n"); ++ return -EINVAL; ++ default: ++ dprintk("Interrupt %d obtained\n", ++ gpiochip->to_irq(gpiochip, gpio_in_pin)); ++ break; ++ }; ++ ++ /* initialize pulse/space widths */ ++ init_timing_params(duty_cycle, freq); ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ /* GPIO Pin Falling/Rising Edge Detect Enable */ ++ irqchip->irq_set_type(irqdata, ++ IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING); ++ ++ /* unmask the irq */ ++ irqchip->irq_unmask(irqdata); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ return 0; ++} ++ ++static void set_use_dec(void *data) ++{ ++ unsigned long flags; ++ ++ spin_lock_irqsave(&lock, flags); ++ ++ /* GPIO Pin Falling/Rising Edge Detect Disable */ ++ irqchip->irq_set_type(irqdata, 0); ++ irqchip->irq_mask(irqdata); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ ++ free_irq(gpiochip->to_irq(gpiochip, gpio_in_pin), (void *) 0); ++ ++ dprintk(KERN_INFO LIRC_DRIVER_NAME ++ ": freed IRQ %d\n", gpiochip->to_irq(gpiochip, gpio_in_pin)); ++} ++ ++static ssize_t lirc_write(struct file *file, const char *buf, ++ size_t n, loff_t *ppos) ++{ ++ int i, count; ++ unsigned long flags; ++ long delta = 0; ++ int *wbuf; ++ ++ count = n / sizeof(int); ++ if (n % sizeof(int) || count % 2 == 0) ++ return -EINVAL; ++ wbuf = memdup_user(buf, n); ++ if (IS_ERR(wbuf)) ++ return PTR_ERR(wbuf); ++ spin_lock_irqsave(&lock, flags); ++ ++ for (i = 0; i < count; i++) { ++ if (i%2) ++ send_space(wbuf[i] - delta); ++ else ++ delta = send_pulse(wbuf[i]); ++ } ++ gpiochip->set(gpiochip, gpio_out_pin, 0); ++ ++ spin_unlock_irqrestore(&lock, flags); ++ kfree(wbuf); ++ return n; ++} ++ ++static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) ++{ ++ int result; ++ __u32 value; ++ ++ switch (cmd) { ++ case LIRC_GET_SEND_MODE: ++ return -ENOIOCTLCMD; ++ break; ++ ++ case LIRC_SET_SEND_MODE: ++ result = get_user(value, (__u32 *) arg); ++ if (result) ++ return result; ++ /* only LIRC_MODE_PULSE supported */ ++ if (value != LIRC_MODE_PULSE) ++ return -ENOSYS; ++ break; ++ ++ case LIRC_GET_LENGTH: ++ return -ENOSYS; ++ break; ++ ++ case LIRC_SET_SEND_DUTY_CYCLE: ++ dprintk("SET_SEND_DUTY_CYCLE\n"); ++ result = get_user(value, (__u32 *) arg); ++ if (result) ++ return result; ++ if (value <= 0 || value > 100) ++ return -EINVAL; ++ return init_timing_params(value, freq); ++ break; ++ ++ case LIRC_SET_SEND_CARRIER: ++ dprintk("SET_SEND_CARRIER\n"); ++ result = get_user(value, (__u32 *) arg); ++ if (result) ++ return result; ++ if (value > 500000 || value < 20000) ++ return -EINVAL; ++ return init_timing_params(duty_cycle, value); ++ break; ++ ++ default: ++ return lirc_dev_fop_ioctl(filep, cmd, arg); ++ } ++ return 0; ++} ++ ++static const struct file_operations lirc_fops = { ++ .owner = THIS_MODULE, ++ .write = lirc_write, ++ .unlocked_ioctl = lirc_ioctl, ++ .read = lirc_dev_fop_read, ++ .poll = lirc_dev_fop_poll, ++ .open = lirc_dev_fop_open, ++ .release = lirc_dev_fop_close, ++ .llseek = no_llseek, ++}; ++ ++static struct lirc_driver driver = { ++ .name = LIRC_DRIVER_NAME, ++ .minor = -1, ++ .code_length = 1, ++ .sample_rate = 0, ++ .data = NULL, ++ .add_to_buf = NULL, ++ .rbuf = &rbuf, ++ .set_use_inc = set_use_inc, ++ .set_use_dec = set_use_dec, ++ .fops = &lirc_fops, ++ .dev = NULL, ++ .owner = THIS_MODULE, ++}; ++ ++static struct platform_driver lirc_rpi_driver = { ++ .driver = { ++ .name = LIRC_DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init lirc_rpi_init(void) ++{ ++ int result; ++ ++ /* Init read buffer. */ ++ result = lirc_buffer_init(&rbuf, sizeof(int), RBUF_LEN); ++ if (result < 0) ++ return -ENOMEM; ++ ++ result = platform_driver_register(&lirc_rpi_driver); ++ if (result) { ++ printk(KERN_ERR LIRC_DRIVER_NAME ++ ": lirc register returned %d\n", result); ++ goto exit_buffer_free; ++ } ++ ++ lirc_rpi_dev = platform_device_alloc(LIRC_DRIVER_NAME, 0); ++ if (!lirc_rpi_dev) { ++ result = -ENOMEM; ++ goto exit_driver_unregister; ++ } ++ ++ result = platform_device_add(lirc_rpi_dev); ++ if (result) ++ goto exit_device_put; ++ ++ return 0; ++ ++ exit_device_put: ++ platform_device_put(lirc_rpi_dev); ++ ++ exit_driver_unregister: ++ platform_driver_unregister(&lirc_rpi_driver); ++ ++ exit_buffer_free: ++ lirc_buffer_free(&rbuf); ++ ++ return result; ++} ++ ++static void lirc_rpi_exit(void) ++{ ++ gpio_free(gpio_out_pin); ++ gpio_free(gpio_in_pin); ++ platform_device_unregister(lirc_rpi_dev); ++ platform_driver_unregister(&lirc_rpi_driver); ++ lirc_buffer_free(&rbuf); ++} ++ ++static int __init lirc_rpi_init_module(void) ++{ ++ int result, i; ++ ++ result = lirc_rpi_init(); ++ if (result) ++ return result; ++ ++ /* check if the module received valid gpio pin numbers */ ++ result = 0; ++ if (gpio_in_pin != gpio_out_pin) { ++ for(i = 0; (i < ARRAY_SIZE(valid_gpio_pins)) && (result != 2); i++) { ++ if (gpio_in_pin == valid_gpio_pins[i] || ++ gpio_out_pin == valid_gpio_pins[i]) { ++ result++; ++ } ++ } ++ } ++ ++ if (result != 2) { ++ result = -EINVAL; ++ printk(KERN_ERR LIRC_DRIVER_NAME ++ ": invalid GPIO pin(s) specified!\n"); ++ goto exit_rpi; ++ } ++ ++ driver.features = LIRC_CAN_SET_SEND_DUTY_CYCLE | ++ LIRC_CAN_SET_SEND_CARRIER | ++ LIRC_CAN_SEND_PULSE | ++ LIRC_CAN_REC_MODE2; ++ ++ driver.dev = &lirc_rpi_dev->dev; ++ driver.minor = lirc_register_driver(&driver); ++ ++ if (driver.minor < 0) { ++ printk(KERN_ERR LIRC_DRIVER_NAME ++ ": device registration failed with %d\n", result); ++ result = -EIO; ++ goto exit_rpi; ++ } ++ ++ printk(KERN_INFO LIRC_DRIVER_NAME ": driver registered!\n"); ++ ++ result = init_port(); ++ if (result < 0) ++ goto exit_rpi; ++ ++ return 0; ++ ++ exit_rpi: ++ lirc_rpi_exit(); ++ ++ return result; ++} ++ ++static void __exit lirc_rpi_exit_module(void) ++{ ++ lirc_rpi_exit(); ++ ++ lirc_unregister_driver(driver.minor); ++ printk(KERN_INFO LIRC_DRIVER_NAME ": cleaned up module\n"); ++} ++ ++module_init(lirc_rpi_init_module); ++module_exit(lirc_rpi_exit_module); ++ ++MODULE_DESCRIPTION("Infra-red receiver and blaster driver for Raspberry Pi GPIO."); ++MODULE_AUTHOR("Aron Robert Szabo "); ++MODULE_AUTHOR("Michael Bishop "); ++MODULE_LICENSE("GPL"); ++ ++module_param(gpio_out_pin, int, S_IRUGO); ++MODULE_PARM_DESC(gpio_out_pin, "GPIO output/transmitter pin number of the BCM" ++ " processor. Valid pin numbers are: 0, 1, 4, 8, 7, 9, 10, 11," ++ " 14, 15, 17, 18, 21, 22, 23, 24, 25, default 17"); ++ ++module_param(gpio_in_pin, int, S_IRUGO); ++MODULE_PARM_DESC(gpio_in_pin, "GPIO input pin number of the BCM processor." ++ " Valid pin numbers are: 0, 1, 4, 8, 7, 9, 10, 11, 14, 15," ++ " 17, 18, 21, 22, 23, 24, 25, default 18"); ++ ++module_param(sense, bool, S_IRUGO); ++MODULE_PARM_DESC(sense, "Override autodetection of IR receiver circuit" ++ " (0 = active high, 1 = active low )"); ++ ++module_param(softcarrier, bool, S_IRUGO); ++MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)"); ++ ++module_param(debug, bool, S_IRUGO | S_IWUSR); ++MODULE_PARM_DESC(debug, "Enable debugging messages"); +Index: linux-3.10-3.10.11/dummy/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1612_8998330a2562f6e80efbf680f51ba05e538fb8d7.txt 2014-04-28 00:43:02.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.patch --- linux-3.10.11/debian/patches/rpi/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.patch 2014-04-28 00:43:04.000000000 +0000 @@ -0,0 +1,25 @@ +commit 9025bc52c25cf7526ef8b204e9a6dbd620d31529 +Author: popcornmix +Date: Tue Dec 11 18:23:03 2012 +0000 + + Default to dwc_otp.lpm_enable=0 + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:42:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:43:03.000000000 +0000 +@@ -228,7 +228,7 @@ + .rx_thr_length = -1, + .pti_enable = -1, + .mpi_enable = -1, +- .lpm_enable = -1, ++ .lpm_enable = 0, + .ic_usb_cap = -1, + .ahb_thr_ratio = -1, + .power_down = -1, +Index: linux-3.10-3.10.11/dummy/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1613_9025bc52c25cf7526ef8b204e9a6dbd620d31529.txt 2014-04-28 00:43:03.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.patch --- linux-3.10.11/debian/patches/rpi/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.patch 2014-04-28 00:43:05.000000000 +0000 @@ -0,0 +1,38 @@ +commit 6fc2bf7f9e2ec3d6b85176c32963119f23f1e614 +Author: P33M +Date: Wed Jan 9 16:12:04 2013 +0000 + + dwc_otg: fix bug in dwc_otg_hcd.c resulting in silent kernel + memory corruption, escalating to OOPS under high USB load. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:42:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:04.000000000 +0000 +@@ -500,8 +500,6 @@ + DWC_ERROR("DWC OTG HCD URB Enqueue failed adding QTD. " + "Error status %d\n", retval); + dwc_otg_hcd_qtd_free(qtd); +- } else { +- qtd->qh = *ep_handle; + } + intr_mask.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->gintmsk); + if (!intr_mask.b.sofintr && retval == 0) { +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:42:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:04.000000000 +0000 +@@ -946,6 +946,7 @@ + if (retval == 0) { + DWC_CIRCLEQ_INSERT_TAIL(&((*qh)->qtd_list), qtd, + qtd_list_entry); ++ qtd->qh = *qh; + } + DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); + +Index: linux-3.10-3.10.11/dummy/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1614_6fc2bf7f9e2ec3d6b85176c32963119f23f1e614.txt 2014-04-28 00:43:04.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.patch --- linux-3.10.11/debian/patches/rpi/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.patch 2014-04-28 00:43:05.000000000 +0000 @@ -0,0 +1,24 @@ +commit 99a55d02892d5ab84fb914f23a7140e67ea7c605 +Author: popcornmix +Date: Mon Jan 21 23:03:53 2013 +0000 + + Return error value from bcm2708_setup_state. Thanks notro + +Index: linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/spi/spi-bcm2708.c 2014-04-28 00:42:28.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c 2014-04-28 00:43:05.000000000 +0000 +@@ -378,6 +378,7 @@ + if (ret < 0) { + kfree(state); + spi->controller_state = NULL; ++ return ret; + } + + dev_dbg(&spi->dev, +Index: linux-3.10-3.10.11/dummy/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1615_99a55d02892d5ab84fb914f23a7140e67ea7c605.txt 2014-04-28 00:43:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.patch --- linux-3.10.11/debian/patches/rpi/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.patch 2014-04-28 00:43:06.000000000 +0000 @@ -0,0 +1,47 @@ +commit 5d5e954ae142026c62eb50f558700624b6f09dce +Author: Kamal Mostafa +Date: Mon Oct 22 15:52:44 2012 -0700 + + spi/spi-bcm2708: respect per-transfer SPI clock speed_hz value + + The bcm2708 SPI driver's bcm2708_process_transfer() was ignoring the + per-transfer speed_hz value even when it was provided (it always just + used the spi device's max_speed_hz value). Now, per-transfer speed_hz + values are respected. + + Also added debug print to bcm2708_setup_state() to help keep an eye on + the configured SPI parameters. + + Signed-off-by: Kamal Mostafa + +Index: linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/spi/spi-bcm2708.c 2014-04-28 00:43:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c 2014-04-28 00:43:05.000000000 +0000 +@@ -259,6 +259,10 @@ + if (state) { + state->cs = cs; + state->cdiv = cdiv; ++ dev_dbg(dev, "setup: want %d Hz; " ++ "bus_hz=%lu / cdiv=%u == %lu Hz; " ++ "mode %u: cs 0x%08X\n", ++ hz, bus_hz, cdiv, bus_hz/cdiv, mode, cs); + } + + return 0; +@@ -277,7 +281,8 @@ + + if (xfer->bits_per_word || xfer->speed_hz) { + ret = bcm2708_setup_state(spi->master, &spi->dev, &state, +- spi->max_speed_hz, spi->chip_select, spi->mode, ++ xfer->speed_hz ? xfer->speed_hz : spi->max_speed_hz, ++ spi->chip_select, spi->mode, + spi->bits_per_word); + if (ret) + return ret; +Index: linux-3.10-3.10.11/dummy/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1616_5d5e954ae142026c62eb50f558700624b6f09dce.txt 2014-04-28 00:43:05.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.patch --- linux-3.10.11/debian/patches/rpi/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.patch 2014-04-28 00:43:07.000000000 +0000 @@ -0,0 +1,175 @@ +commit 95020b63fdbaaa3a48402957a8cfde8ef5130490 +Author: popcornmix +Date: Wed Jul 3 00:51:55 2013 +0100 + + Add hwrng (hardware random number generator) driver + +Index: linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/mach-bcm2708/include/mach/platform.h 2014-04-28 00:43:06.000000000 +0000 +@@ -62,6 +62,7 @@ + #define DMA_BASE (BCM2708_PERI_BASE + 0x7000) /* DMA controller */ + #define ARM_BASE (BCM2708_PERI_BASE + 0xB000) /* BCM2708 ARM control block */ + #define PM_BASE (BCM2708_PERI_BASE + 0x100000) /* Power Management, Reset controller and Watchdog registers */ ++#define RNG_BASE (BCM2708_PERI_BASE + 0x104000) /* Hardware RNG */ + #define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO */ + #define UART0_BASE (BCM2708_PERI_BASE + 0x201000) /* Uart 0 */ + #define MMCI0_BASE (BCM2708_PERI_BASE + 0x202000) /* MMC interface */ +Index: linux-3.10-3.10.11/drivers/char/hw_random/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/hw_random/Kconfig 2014-04-27 23:37:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/hw_random/Kconfig 2014-04-28 00:43:06.000000000 +0000 +@@ -314,3 +314,15 @@ + module will be called tpm-rng. + + If unsure, say Y. ++ ++config HW_RANDOM_BCM2708 ++ tristate "BCM2708 generic true random number generator support" ++ depends on HW_RANDOM && ARCH_BCM2708 ++ ---help--- ++ This driver provides the kernel-side support for the BCM2708 hardware. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called bcm2708-rng. ++ ++ If unsure, say N. ++ +Index: linux-3.10-3.10.11/drivers/char/hw_random/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/char/hw_random/Makefile 2014-04-27 23:37:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/hw_random/Makefile 2014-04-28 00:43:06.000000000 +0000 +@@ -27,3 +27,4 @@ + obj-$(CONFIG_HW_RANDOM_EXYNOS) += exynos-rng.o + obj-$(CONFIG_HW_RANDOM_TPM) += tpm-rng.o + obj-$(CONFIG_HW_RANDOM_BCM2835) += bcm2835-rng.o ++obj-$(CONFIG_HW_RANDOM_BCM2708) += bcm2708-rng.o +Index: linux-3.10-3.10.11/drivers/char/hw_random/bcm2708-rng.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/char/hw_random/bcm2708-rng.c 2014-04-28 00:43:06.000000000 +0000 +@@ -0,0 +1,117 @@ ++/** ++ * Copyright (c) 2010-2012 Broadcom. All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * 1. Redistributions of source code must retain the above copyright ++ * notice, this list of conditions, and the following disclaimer, ++ * without modification. ++ * 2. Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in the ++ * documentation and/or other materials provided with the distribution. ++ * 3. The names of the above-listed copyright holders may not be used ++ * to endorse or promote products derived from this software without ++ * specific prior written permission. ++ * ++ * ALTERNATIVELY, this software may be distributed under the terms of the ++ * GNU General Public License ("GPL") version 2, as published by the Free ++ * Software Foundation. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS ++ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, ++ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR ++ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR ++ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, ++ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, ++ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR ++ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF ++ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING ++ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS ++ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define RNG_CTRL (0x0) ++#define RNG_STATUS (0x4) ++#define RNG_DATA (0x8) ++#define RNG_FF_THRESHOLD (0xc) ++ ++/* enable rng */ ++#define RNG_RBGEN 0x1 ++/* double speed, less random mode */ ++#define RNG_RBG2X 0x2 ++ ++/* the initial numbers generated are "less random" so will be discarded */ ++#define RNG_WARMUP_COUNT 0x40000 ++ ++static int bcm2708_rng_data_read(struct hwrng *rng, u32 *buffer) ++{ ++ void __iomem *rng_base = (void __iomem *)rng->priv; ++ unsigned words; ++ /* wait for a random number to be in fifo */ ++ do { ++ words = __raw_readl(rng_base + RNG_STATUS)>>24; ++ } ++ while (words == 0); ++ /* read the random number */ ++ *buffer = __raw_readl(rng_base + RNG_DATA); ++ return 4; ++} ++ ++static struct hwrng bcm2708_rng_ops = { ++ .name = "bcm2708", ++ .data_read = bcm2708_rng_data_read, ++}; ++ ++static int __init bcm2708_rng_init(void) ++{ ++ void __iomem *rng_base; ++ int err; ++ ++ /* map peripheral */ ++ rng_base = ioremap(RNG_BASE, 0x10); ++ pr_info("bcm2708_rng_init=%p\n", rng_base); ++ if (!rng_base) { ++ pr_err("bcm2708_rng_init failed to ioremap\n"); ++ return -ENOMEM; ++ } ++ bcm2708_rng_ops.priv = (unsigned long)rng_base; ++ /* register driver */ ++ err = hwrng_register(&bcm2708_rng_ops); ++ if (err) { ++ pr_err("bcm2708_rng_init hwrng_register()=%d\n", err); ++ iounmap(rng_base); ++ } else { ++ /* set warm-up count & enable */ ++ __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS); ++ __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL); ++ } ++ return err; ++} ++ ++static void __exit bcm2708_rng_exit(void) ++{ ++ void __iomem *rng_base = (void __iomem *)bcm2708_rng_ops.priv; ++ pr_info("bcm2708_rng_exit\n"); ++ /* disable rng hardware */ ++ __raw_writel(0, rng_base + RNG_CTRL); ++ /* unregister driver */ ++ hwrng_unregister(&bcm2708_rng_ops); ++ iounmap(rng_base); ++} ++ ++module_init(bcm2708_rng_init); ++module_exit(bcm2708_rng_exit); ++ ++MODULE_DESCRIPTION("BCM2708 H/W Random Number Generator (RNG) driver"); ++MODULE_LICENSE("GPL and additional rights"); +Index: linux-3.10-3.10.11/dummy/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1617_95020b63fdbaaa3a48402957a8cfde8ef5130490.txt 2014-04-28 00:43:06.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.patch --- linux-3.10.11/debian/patches/rpi/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.patch 2014-04-28 00:43:08.000000000 +0000 @@ -0,0 +1,37 @@ +commit 024a3f13cd86b82618538b202cf260b2a218be97 +Author: Technion +Date: Mon Feb 11 22:08:53 2013 +1100 + + Changed wording on logging. Previously, we received errors like this: + mmc0: could read SD Status register (SSR) at the 3th attempt + A more sensible response is now returned. + A typo also fixed in comments. + +Index: linux-3.10-3.10.11/drivers/mmc/core/sd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/core/sd.c 2014-04-28 00:42:59.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/core/sd.c 2014-04-28 00:43:07.000000000 +0000 +@@ -238,7 +238,7 @@ + + err = mmc_app_send_scr(card, card->raw_scr); + if( !err ) +- break; // sucess!!! ++ break; // success!!! + + touch_nmi_watchdog(); // we are still alive! + +@@ -320,7 +320,7 @@ + + if( tries > 1 ) + { +- pr_info("%s: could read SD Status register (SSR) at the %dth attempt\n", mmc_hostname(card->host), tries ); ++ pr_info("%s: read SD Status register (SSR) after %d attempts\n", mmc_hostname(card->host), tries ); + } + + for (i = 0; i < 16; i++) +Index: linux-3.10-3.10.11/dummy/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1618_024a3f13cd86b82618538b202cf260b2a218be97.txt 2014-04-28 00:43:07.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.patch --- linux-3.10.11/debian/patches/rpi/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.patch 2014-04-28 00:43:09.000000000 +0000 @@ -0,0 +1,89 @@ +commit 90baf0433bfc52f92b8db0c49fc29382684fe9e1 +Author: P33M +Date: Fri Feb 15 22:36:47 2013 +0000 + + dwc_otg: Fix unsafe access of QTD during URB enqueue + + In dwc_otg_hcd_urb_enqueue during qtd creation, it was possible that the + transaction could complete almost immediately after the qtd was assigned + to a host channel during URB enqueue, which meant the qtd pointer was no + longer valid having been completed and removed. Usually, this resulted in + an OOPS during URB submission. By predetermining whether transactions + need to be queued or not, this unsafe pointer access is avoided. + + This bug was only evident on the Pi model A where a device was attached + that had no periodic endpoints (e.g. USB pendrive or some wlan devices). + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:08.000000000 +0000 +@@ -462,6 +462,8 @@ + { + dwc_irqflags_t flags; + int retval = 0; ++ uint8_t needs_scheduling = 0; ++ dwc_otg_transaction_type_e tr_type; + dwc_otg_qtd_t *qtd; + gintmsk_data_t intr_mask = {.d32 = 0 }; + +@@ -493,22 +495,22 @@ + return -DWC_E_NO_MEMORY; + } + #endif +- retval = +- dwc_otg_hcd_qtd_add(qtd, hcd, (dwc_otg_qh_t **) ep_handle, atomic_alloc); ++ intr_mask.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->gintmsk); ++ if(!intr_mask.b.sofintr) needs_scheduling = 1; ++ if((((dwc_otg_qh_t *)ep_handle)->ep_type == UE_BULK) && !(qtd->urb->flags & URB_GIVEBACK_ASAP)) ++ /* Do not schedule SG transactions until qtd has URB_GIVEBACK_ASAP set */ ++ needs_scheduling = 0; ++ ++ retval = dwc_otg_hcd_qtd_add(qtd, hcd, (dwc_otg_qh_t **) ep_handle, atomic_alloc); + // creates a new queue in ep_handle if it doesn't exist already + if (retval < 0) { + DWC_ERROR("DWC OTG HCD URB Enqueue failed adding QTD. " + "Error status %d\n", retval); + dwc_otg_hcd_qtd_free(qtd); ++ return retval; + } +- intr_mask.d32 = DWC_READ_REG32(&hcd->core_if->core_global_regs->gintmsk); +- if (!intr_mask.b.sofintr && retval == 0) { +- dwc_otg_transaction_type_e tr_type; +- if ((qtd->qh->ep_type == UE_BULK) +- && !(qtd->urb->flags & URB_GIVEBACK_ASAP)) { +- /* Do not schedule SG transactions until qtd has URB_GIVEBACK_ASAP set */ +- return 0; +- } ++ ++ if(needs_scheduling) { + DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); + tr_type = dwc_otg_hcd_select_transactions(hcd); + if (tr_type != DWC_OTG_TRANSACTION_NONE) { +@@ -516,7 +518,6 @@ + } + DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); + } +- + return retval; + } + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:04.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:08.000000000 +0000 +@@ -937,7 +937,7 @@ + if (*qh == NULL) { + *qh = dwc_otg_hcd_qh_create(hcd, urb, atomic_alloc); + if (*qh == NULL) { +- retval = -1; ++ retval = -DWC_E_NO_MEMORY; + goto done; + } + } +Index: linux-3.10-3.10.11/dummy/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1619_90baf0433bfc52f92b8db0c49fc29382684fe9e1.txt 2014-04-28 00:43:08.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.patch 2014-04-28 00:43:09.000000000 +0000 @@ -0,0 +1,44 @@ +commit b74f706eb8624818db4cc9e19296bd3dc029950f +Author: P33M +Date: Fri Feb 15 22:38:40 2013 +0000 + + dwc_otg: Fix incorrect URB allocation error handling + + If the memory allocation for a dwc_otg_urb failed, the kernel would OOPS + because for some reason a member of the *unallocated* struct was set to + zero. Error handling changed to fail correctly. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:09.000000000 +0000 +@@ -3136,17 +3136,13 @@ + else + dwc_otg_urb = DWC_ALLOC(size); + +- if (NULL != dwc_otg_urb) +- dwc_otg_urb->packet_count = iso_desc_count; ++ if (dwc_otg_urb) ++ dwc_otg_urb->packet_count = iso_desc_count; + else { +- dwc_otg_urb->packet_count = 0; +- if (size != 0) { +- DWC_ERROR("**** DWC OTG HCD URB alloc - " +- "%salloc of %db failed\n", +- atomic_alloc?"atomic ":"", size); +- } +- } +- ++ DWC_ERROR("**** DWC OTG HCD URB alloc - " ++ "%salloc of %db failed\n", ++ atomic_alloc?"atomic ":"", size); ++ } + return dwc_otg_urb; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1620_b74f706eb8624818db4cc9e19296bd3dc029950f.txt 2014-04-28 00:43:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.patch 2014-04-28 00:43:10.000000000 +0000 @@ -0,0 +1,83 @@ +commit 50115992c8c3e8e4a334ea37368eecb57106f11a +Author: pjennings +Date: Wed Feb 20 17:51:43 2013 -0600 + + Added inverted transmitter support + +Index: linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_rpi.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/staging/media/lirc/lirc_rpi.c 2014-04-28 00:43:02.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/staging/media/lirc/lirc_rpi.c 2014-04-28 00:43:09.000000000 +0000 +@@ -68,6 +68,8 @@ + static int sense = -1; + /* use softcarrier by default */ + static int softcarrier = 1; ++/* 0 = do not invert output, 1 = invert output */ ++static int invert = 0; + + struct gpio_chip *gpiochip; + struct irq_chip *irqchip; +@@ -135,10 +137,10 @@ + actual = 0; target = 0; flag = 0; + while (actual < length) { + if (flag) { +- gpiochip->set(gpiochip, gpio_out_pin, 0); ++ gpiochip->set(gpiochip, gpio_out_pin, invert); + target += space_width; + } else { +- gpiochip->set(gpiochip, gpio_out_pin, 1); ++ gpiochip->set(gpiochip, gpio_out_pin, !invert); + target += pulse_width; + } + d = (target - actual - +@@ -162,7 +164,7 @@ + if (softcarrier) { + return send_pulse_softcarrier(length); + } else { +- gpiochip->set(gpiochip, gpio_out_pin, 1); ++ gpiochip->set(gpiochip, gpio_out_pin, !invert); + safe_udelay(length); + return 0; + } +@@ -170,7 +172,7 @@ + + static void send_space(long length) + { +- gpiochip->set(gpiochip, gpio_out_pin, 0); ++ gpiochip->set(gpiochip, gpio_out_pin, invert); + if (length <= 0) + return; + safe_udelay(length); +@@ -318,7 +320,7 @@ + + gpiochip->direction_input(gpiochip, gpio_in_pin); + gpiochip->direction_output(gpiochip, gpio_out_pin, 1); +- gpiochip->set(gpiochip, gpio_out_pin, 0); ++ gpiochip->set(gpiochip, gpio_out_pin, invert); + + irq = gpiochip->to_irq(gpiochip, gpio_in_pin); + dprintk("to_irq %d\n", irq); +@@ -457,7 +459,7 @@ + else + delta = send_pulse(wbuf[i]); + } +- gpiochip->set(gpiochip, gpio_out_pin, 0); ++ gpiochip->set(gpiochip, gpio_out_pin, invert); + + spin_unlock_irqrestore(&lock, flags); + kfree(wbuf); +@@ -683,5 +685,8 @@ + module_param(softcarrier, bool, S_IRUGO); + MODULE_PARM_DESC(softcarrier, "Software carrier (0 = off, 1 = on, default on)"); + ++module_param(invert, bool, S_IRUGO); ++MODULE_PARM_DESC(invert, "Invert output (0 = off, 1 = on, default off"); ++ + module_param(debug, bool, S_IRUGO | S_IWUSR); + MODULE_PARM_DESC(debug, "Enable debugging messages"); +Index: linux-3.10-3.10.11/dummy/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1621_50115992c8c3e8e4a334ea37368eecb57106f11a.txt 2014-04-28 00:43:09.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.patch --- linux-3.10.11/debian/patches/rpi/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.patch 2014-04-28 00:43:11.000000000 +0000 @@ -0,0 +1,129 @@ +commit 3f634523c9cb7ab3dad0a53a5b64c75102cd7b96 +Author: popcornmix +Date: Sun Feb 24 16:30:57 2013 +0000 + + Add retry on error and tidy of temperature driver + +Index: linux-3.10-3.10.11/drivers/thermal/bcm2835-thermal.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/thermal/bcm2835-thermal.c 2014-04-28 00:42:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/thermal/bcm2835-thermal.c 2014-04-28 00:43:10.000000000 +0000 +@@ -33,7 +33,6 @@ + #define print_debug(fmt,...) + #endif + #define print_err(fmt,...) printk(KERN_ERR "%s:%s:%d: "fmt"\n", MODULE_NAME, __func__,__LINE__, ##__VA_ARGS__) +-#define print_info(fmt,...) printk(KERN_INFO "%s: "fmt"\n", MODULE_NAME, ##__VA_ARGS__) + + #define VC_TAG_GET_TEMP 0x00030006 + #define VC_TAG_GET_MAX_TEMP 0x0003000A +@@ -66,12 +65,6 @@ + struct vc_msg msg; + }; + +-/* --- PROTOTYPES --- */ +-static int bcm2835_get_temp(struct thermal_zone_device *thermal_dev, unsigned long *); +-static int bcm2835_get_max_temp(struct thermal_zone_device *thermal_dev, int, unsigned long *); +-static int bcm2835_get_trip_type(struct thermal_zone_device *thermal_dev, int trip_num, enum thermal_trip_type *trip_type); +-static int bcm2835_get_mode(struct thermal_zone_device *thermal_dev, enum thermal_device_mode *dev_mode); +- + /* --- GLOBALS --- */ + static struct bcm2835_thermal_data bcm2835_data; + +@@ -79,64 +72,47 @@ + static struct thermal_zone_device_ops ops; + + /* --- FUNCTIONS --- */ +-static int bcm2835_get_max_temp(struct thermal_zone_device *thermal_dev, int trip_num, unsigned long *temp) +-{ +- int result; + ++static int bcm2835_get_temp_or_max(struct thermal_zone_device *thermal_dev, unsigned long *temp, unsigned tag_id) ++{ ++ int result = -1, retry = 3; + print_debug("IN"); + +- /* wipe all previous message data */ +- memset(&bcm2835_data.msg, 0, sizeof bcm2835_data.msg); +- +- /* prepare message */ +- bcm2835_data.msg.msg_size = sizeof bcm2835_data.msg; +- bcm2835_data.msg.tag.buffer_size = 8; +- bcm2835_data.msg.tag.tag_id = VC_TAG_GET_MAX_TEMP; +- +- /* send the message */ +- result = bcm_mailbox_property(&bcm2835_data.msg, sizeof bcm2835_data.msg); ++ *temp = 0; ++ while (result != 0 && retry-- > 0) { ++ /* wipe all previous message data */ ++ memset(&bcm2835_data.msg, 0, sizeof bcm2835_data.msg); ++ ++ /* prepare message */ ++ bcm2835_data.msg.msg_size = sizeof bcm2835_data.msg; ++ bcm2835_data.msg.tag.buffer_size = 8; ++ bcm2835_data.msg.tag.tag_id = tag_id; ++ ++ /* send the message */ ++ result = bcm_mailbox_property(&bcm2835_data.msg, sizeof bcm2835_data.msg); ++ print_debug("Got %stemperature as %u (%d,%x)\n", tag_id==VC_TAG_GET_MAX_TEMP ? "max ":"", (uint)bcm2835_data.msg.tag.val, result, bcm2835_data.msg.request_code); ++ if (!(bcm2835_data.msg.request_code & 0x80000000)) ++ result = -1; ++ } + + /* check if it was all ok and return the rate in milli degrees C */ +- if (result == 0 && (bcm2835_data.msg.request_code & 0x80000000)) ++ if (result == 0) + *temp = (uint)bcm2835_data.msg.tag.val; +- #ifdef THERMAL_DEBUG_ENABLE + else +- print_debug("Failed to get temperature!"); +- #endif +- print_debug("Got temperature as %u",(uint)*temp); ++ print_err("Failed to get temperature! (%x:%d)\n", tag_id, result); + print_debug("OUT"); +- return 0; ++ return result; + } + + static int bcm2835_get_temp(struct thermal_zone_device *thermal_dev, unsigned long *temp) + { +- int result; +- +- print_debug("IN"); +- +- /* wipe all previous message data */ +- memset(&bcm2835_data.msg, 0, sizeof bcm2835_data.msg); +- +- /* prepare message */ +- bcm2835_data.msg.msg_size = sizeof bcm2835_data.msg; +- bcm2835_data.msg.tag.buffer_size = 8; +- bcm2835_data.msg.tag.tag_id = VC_TAG_GET_TEMP; +- +- /* send the message */ +- result = bcm_mailbox_property(&bcm2835_data.msg, sizeof bcm2835_data.msg); +- +- /* check if it was all ok and return the rate in milli degrees C */ +- if (result == 0 && (bcm2835_data.msg.request_code & 0x80000000)) +- *temp = (uint)bcm2835_data.msg.tag.val; +- #ifdef THERMAL_DEBUG_ENABLE +- else +- print_debug("Failed to get temperature!"); +- #endif +- print_debug("Got temperature as %u",(uint)*temp); +- print_debug("OUT"); +- return 0; ++ return bcm2835_get_temp_or_max(thermal_dev, temp, VC_TAG_GET_TEMP); + } + ++static int bcm2835_get_max_temp(struct thermal_zone_device *thermal_dev, int trip_num, unsigned long *temp) ++{ ++ return bcm2835_get_temp_or_max(thermal_dev, temp, VC_TAG_GET_MAX_TEMP); ++} + + static int bcm2835_get_trip_type(struct thermal_zone_device * thermal_dev, int trip_num, enum thermal_trip_type *trip_type) + { +Index: linux-3.10-3.10.11/dummy/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1622_3f634523c9cb7ab3dad0a53a5b64c75102cd7b96.txt 2014-04-28 00:43:10.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.patch --- linux-3.10.11/debian/patches/rpi/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.patch 2014-04-28 00:43:11.000000000 +0000 @@ -0,0 +1,34 @@ +commit 920093eb87ec2f0e490a5fab13b2e13d135a2daa +Author: P33M +Date: Thu Feb 28 16:52:51 2013 +0000 + + dwc_otg: fix potential use-after-free case in interrupt handler + + If a transaction had previously aborted, certain interrupts are + enabled to track error counts and reset where necessary. On IN + endpoints the host generates an ACK interrupt near-simultaneously + with completion of transfer. In the case where this transfer had + previously had an error, this results in a use-after-free on + the QTD memory space with a 1-byte length being overwritten to + 0x00. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:11.000000000 +0000 +@@ -2223,7 +2223,8 @@ + retval |= handle_hc_nak_intr(dwc_otg_hcd, hc, hc_regs, qtd); + } + if (hcint.b.ack) { +- retval |= handle_hc_ack_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ if(!hcint.b.chhltd) ++ retval |= handle_hc_ack_intr(dwc_otg_hcd, hc, hc_regs, qtd); + } + if (hcint.b.nyet) { + retval |= handle_hc_nyet_intr(dwc_otg_hcd, hc, hc_regs, qtd); +Index: linux-3.10-3.10.11/dummy/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1623_920093eb87ec2f0e490a5fab13b2e13d135a2daa.txt 2014-04-28 00:43:11.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.patch 2014-04-28 00:43:12.000000000 +0000 @@ -0,0 +1,57 @@ +commit ae8185e36b5b474de6a8f053b494432b693ced7a +Author: P33M +Date: Sun Mar 3 14:45:53 2013 +0000 + + dwc_otg: add handling of SPLIT transaction data toggle errors + + Previously a data toggle error on packets from a USB1.1 device behind + a TT would result in the Pi locking up as the driver never handled + the associated interrupt. Patch adds basic retry mechanism and + interrupt acknowledgement to cater for either a chance toggle error or + for devices that have a broken initial toggle state (FT8U232/FT232BM). + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:11.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:12.000000000 +0000 +@@ -1921,13 +1921,20 @@ + dwc_otg_qtd_t * qtd) + { + DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " +- "Data Toggle Error--\n", hc->hc_num); ++ "Data Toggle Error on %s transfer--\n", ++ hc->hc_num, (hc->ep_is_in ? "IN" : "OUT")); + +- if (hc->ep_is_in) { ++ /* Data toggles on split transactions cause the hc to halt. ++ * restart transfer */ ++ if(hc->qh->do_split) ++ { ++ qtd->error_count++; ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ update_urb_state_xfer_intr(hc, hc_regs, ++ qtd->urb, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ } else if (hc->ep_is_in) { + qtd->error_count = 0; +- } else { +- DWC_ERROR("Data Toggle Error on OUT transfer," +- "channel %d\n", hc->hc_num); + } + + disable_hc_int(hc_regs, datatglerr); +@@ -2080,6 +2087,8 @@ + handle_hc_babble_intr(hcd, hc, hc_regs, qtd); + } else if (hcint.b.frmovrun) { + handle_hc_frmovrun_intr(hcd, hc, hc_regs, qtd); ++ } else if (hcint.b.datatglerr) { ++ handle_hc_datatglerr_intr(hcd, hc, hc_regs, qtd); + } else if (!out_nak_enh) { + if (hcint.b.nyet) { + /* +Index: linux-3.10-3.10.11/dummy/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1624_ae8185e36b5b474de6a8f053b494432b693ced7a.txt 2014-04-28 00:43:12.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.patch --- linux-3.10.11/debian/patches/rpi/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.patch 2014-04-28 00:43:13.000000000 +0000 @@ -0,0 +1,139 @@ +commit 36a1ff9b3debcd596f531feaeb0ee92879cba31c +Author: popcornmix +Date: Wed May 1 21:14:28 2013 +0100 + + Add bitbanging pullups, use them for w1-gpio + + Allows parasite power to work, uses module option pullup=1 + +Index: linux-3.10-3.10.11/drivers/w1/masters/w1-gpio.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/w1/masters/w1-gpio.c 2014-04-27 23:37:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/w1/masters/w1-gpio.c 2014-04-28 00:43:12.000000000 +0000 +@@ -23,6 +23,9 @@ + #include "../w1.h" + #include "../w1_int.h" + ++static int w1_gpio_pullup = 0; ++module_param_named(pullup, w1_gpio_pullup, int, 0); ++ + static void w1_gpio_write_bit_dir(void *data, u8 bit) + { + struct w1_gpio_platform_data *pdata = data; +@@ -47,6 +50,16 @@ + return gpio_get_value(pdata->pin) ? 1 : 0; + } + ++static void w1_gpio_bitbang_pullup(void *data, u8 on) ++{ ++ struct w1_gpio_platform_data *pdata = data; ++ ++ if (on) ++ gpio_direction_output(pdata->pin, 1); ++ else ++ gpio_direction_input(pdata->pin); ++} ++ + #if defined(CONFIG_OF) + static struct of_device_id w1_gpio_dt_ids[] = { + { .compatible = "w1-gpio" }, +@@ -133,6 +146,13 @@ + master->write_bit = w1_gpio_write_bit_dir; + } + ++ if (w1_gpio_pullup) ++ if (pdata->is_open_drain) ++ printk(KERN_ERR "w1-gpio 'pullup' option " ++ "doesn't work with open drain GPIO\n"); ++ else ++ master->bitbang_pullup = w1_gpio_bitbang_pullup; ++ + err = w1_add_master_device(master); + if (err) { + dev_err(&pdev->dev, "w1_add_master device failed\n"); +Index: linux-3.10-3.10.11/drivers/w1/w1.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/w1/w1.h 2014-04-27 23:37:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/w1/w1.h 2014-04-28 00:43:12.000000000 +0000 +@@ -148,6 +148,12 @@ + */ + u8 (*set_pullup)(void *, int); + ++ /** ++ * Turns the pullup on/off in bitbanging mode, takes an on/off argument. ++ * @return -1=Error, 0=completed ++ */ ++ void (*bitbang_pullup) (void *, u8); ++ + /** Really nice hardware can handles the different types of ROM search + * w1_master* is passed to the slave found callback. + */ +Index: linux-3.10-3.10.11/drivers/w1/w1_int.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/w1/w1_int.c 2014-04-27 23:37:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/w1/w1_int.c 2014-04-28 00:43:13.000000000 +0000 +@@ -117,19 +117,21 @@ + printk(KERN_ERR "w1_add_master_device: invalid function set\n"); + return(-EINVAL); + } +- /* While it would be electrically possible to make a device that +- * generated a strong pullup in bit bang mode, only hardware that +- * controls 1-wire time frames are even expected to support a strong +- * pullup. w1_io.c would need to support calling set_pullup before +- * the last write_bit operation of a w1_write_8 which it currently +- * doesn't. +- */ ++ ++ /* bitbanging hardware uses bitbang_pullup, other hardware uses set_pullup ++ * and takes care of timing itself */ + if (!master->write_byte && !master->touch_bit && master->set_pullup) { + printk(KERN_ERR "w1_add_master_device: set_pullup requires " + "write_byte or touch_bit, disabling\n"); + master->set_pullup = NULL; + } + ++ if (master->set_pullup && master->bitbang_pullup) { ++ printk(KERN_ERR "w1_add_master_device: set_pullup should not " ++ "be set when bitbang_pullup is used, disabling\n"); ++ master->set_pullup = NULL; ++ } ++ + /* Lock until the device is added (or not) to w1_masters. */ + mutex_lock(&w1_mlock); + /* Search for the first available id (starting at 1). */ +Index: linux-3.10-3.10.11/drivers/w1/w1_io.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/w1/w1_io.c 2014-04-27 23:37:01.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/w1/w1_io.c 2014-04-28 00:43:13.000000000 +0000 +@@ -127,10 +127,22 @@ + static void w1_post_write(struct w1_master *dev) + { + if (dev->pullup_duration) { +- if (dev->enable_pullup && dev->bus_master->set_pullup) +- dev->bus_master->set_pullup(dev->bus_master->data, 0); +- else ++ if (dev->enable_pullup) { ++ if (dev->bus_master->set_pullup) { ++ dev->bus_master->set_pullup(dev-> ++ bus_master->data, ++ 0); ++ } else if (dev->bus_master->bitbang_pullup) { ++ dev->bus_master-> ++ bitbang_pullup(dev->bus_master->data, 1); + msleep(dev->pullup_duration); ++ dev->bus_master-> ++ bitbang_pullup(dev->bus_master->data, 0); ++ } ++ } else { ++ msleep(dev->pullup_duration); ++ } ++ + dev->pullup_duration = 0; + } + } +Index: linux-3.10-3.10.11/dummy/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1625_36a1ff9b3debcd596f531feaeb0ee92879cba31c.txt 2014-04-28 00:43:13.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.patch 2014-04-28 00:43:14.000000000 +0000 @@ -0,0 +1,72 @@ +commit e3126c88f65577ebb667c943c1257a8147474fa5 +Author: notro +Date: Sat Jan 26 20:38:03 2013 +0100 + + spi-bcm2708: add 9-bit support using LoSSI mode + +Index: linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/spi/spi-bcm2708.c 2014-04-28 00:43:05.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/spi/spi-bcm2708.c 2014-04-28 00:43:14.000000000 +0000 +@@ -146,10 +146,31 @@ + static inline void bcm2708_wr_fifo(struct bcm2708_spi *bs, int len) + { + u8 byte; ++ u16 val; + + if (len > bs->len) + len = bs->len; + ++ if (unlikely(bcm2708_rd(bs, SPI_CS) & SPI_CS_LEN)) { ++ /* LoSSI mode */ ++ if (unlikely(len % 2)) { ++ printk(KERN_ERR"bcm2708_wr_fifo: length must be even, skipping.\n"); ++ bs->len = 0; ++ return; ++ } ++ while (len) { ++ if (bs->tx_buf) { ++ val = *(const u16 *)bs->tx_buf; ++ bs->tx_buf += 2; ++ } else ++ val = 0; ++ bcm2708_wr(bs, SPI_FIFO, val); ++ bs->len -= 2; ++ len -= 2; ++ } ++ return; ++ } ++ + while (len--) { + byte = bs->tx_buf ? *bs->tx_buf++ : 0; + bcm2708_wr(bs, SPI_FIFO, byte); +@@ -234,8 +255,12 @@ + switch (bpw) { + case 8: + break; ++ case 9: ++ /* Reading in LoSSI mode is a special case. See 'BCM2835 ARM Peripherals' datasheet */ ++ cs |= SPI_CS_LEN; ++ break; + default: +- dev_dbg(dev, "setup: invalid bits_per_word %u (must be 8)\n", ++ dev_dbg(dev, "setup: invalid bits_per_word %u (must be 8 or 9)\n", + bpw); + return -EINVAL; + } +@@ -283,7 +308,8 @@ + ret = bcm2708_setup_state(spi->master, &spi->dev, &state, + xfer->speed_hz ? xfer->speed_hz : spi->max_speed_hz, + spi->chip_select, spi->mode, +- spi->bits_per_word); ++ xfer->bits_per_word ? xfer->bits_per_word : ++ spi->bits_per_word); + if (ret) + return ret; + +Index: linux-3.10-3.10.11/dummy/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1626_e3126c88f65577ebb667c943c1257a8147474fa5.txt 2014-04-28 00:43:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.patch 2014-04-28 00:43:15.000000000 +0000 @@ -0,0 +1,239 @@ +commit 2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f +Author: P33M +Date: Thu Mar 21 19:36:17 2013 +0000 + + dwc_otg: implement tasklet for returning URBs to usbcore hcd layer + + The dwc_otg driver interrupt handler for transfer completion will spend + a very long time with interrupts disabled when a URB is completed - + this is because usb_hcd_giveback_urb is called from within the handler + which for a USB device driver with complicated processing (e.g. webcam) + will take an exorbitant amount of time to complete. This results in + missed completion interrupts for other USB packets which lead to them + being dropped due to microframe overruns. + + This patch splits returning the URB to the usb hcd layer into a + high-priority tasklet. This will have most benefit for isochronous IN + transfers but will also have incidental benefit where multiple periodic + devices are active at once. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_common_port/dwc_common_linux.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c 2014-04-28 00:43:14.000000000 +0000 +@@ -991,6 +991,11 @@ + tasklet_schedule(&task->t); + } + ++void DWC_TASK_HI_SCHEDULE(dwc_tasklet_t *task) ++{ ++ tasklet_hi_schedule(&task->t); ++} ++ + + /* workqueues + - run in process context (can sleep) +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_list.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_common_port/dwc_list.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_list.h 2014-04-28 00:43:14.000000000 +0000 +@@ -384,17 +384,17 @@ + #define DWC_TAILQ_PREV(elm, headname, field) \ + (*(((struct headname *)((elm)->field.tqe_prev))->tqh_last)) + #define DWC_TAILQ_EMPTY(head) \ +- (TAILQ_FIRST(head) == TAILQ_END(head)) ++ (DWC_TAILQ_FIRST(head) == DWC_TAILQ_END(head)) + + #define DWC_TAILQ_FOREACH(var, head, field) \ +- for((var) = TAILQ_FIRST(head); \ +- (var) != TAILQ_END(head); \ +- (var) = TAILQ_NEXT(var, field)) ++ for ((var) = DWC_TAILQ_FIRST(head); \ ++ (var) != DWC_TAILQ_END(head); \ ++ (var) = DWC_TAILQ_NEXT(var, field)) + + #define DWC_TAILQ_FOREACH_REVERSE(var, head, headname, field) \ +- for((var) = TAILQ_LAST(head, headname); \ +- (var) != TAILQ_END(head); \ +- (var) = TAILQ_PREV(var, headname, field)) ++ for ((var) = DWC_TAILQ_LAST(head, headname); \ ++ (var) != DWC_TAILQ_END(head); \ ++ (var) = DWC_TAILQ_PREV(var, headname, field)) + + /* + * Tail queue functions. +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_os.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_common_port/dwc_os.h 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_os.h 2014-04-28 00:43:14.000000000 +0000 +@@ -981,6 +981,8 @@ + extern void DWC_TASK_SCHEDULE(dwc_tasklet_t *task); + #define dwc_task_schedule DWC_TASK_SCHEDULE + ++extern void DWC_TASK_HI_SCHEDULE(dwc_tasklet_t *task); ++#define dwc_task_hi_schedule DWC_TASK_HI_SCHEDULE + + /** @name Timer + * +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:09.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:14.000000000 +0000 +@@ -40,6 +40,9 @@ + * header file. + */ + ++#include ++#include ++ + #include "dwc_otg_hcd.h" + #include "dwc_otg_regs.h" + +@@ -694,6 +697,31 @@ + dwc_otg_hcd->flags.b.port_reset_change = 1; + } + ++static void completion_tasklet_func(void *ptr) ++{ ++ dwc_otg_hcd_t *hcd = (dwc_otg_hcd_t *) ptr; ++ struct urb *urb; ++ urb_tq_entry_t *item; ++ dwc_irqflags_t flags; ++ ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ while (!DWC_TAILQ_EMPTY(&hcd->completed_urb_list)) { ++ item = DWC_TAILQ_FIRST(&hcd->completed_urb_list); ++ urb = item->urb; ++ DWC_TAILQ_REMOVE(&hcd->completed_urb_list, item, ++ urb_tq_entries); ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ DWC_FREE(item); ++ ++ usb_hcd_unlink_urb_from_ep(hcd->priv, urb); ++ usb_hcd_giveback_urb(hcd->priv, urb, urb->status); ++ ++ DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); ++ } ++ DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); ++ return; ++} ++ + static void qh_list_free(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list) + { + dwc_list_link_t *item; +@@ -833,6 +861,7 @@ + + DWC_TIMER_FREE(dwc_otg_hcd->conn_timer); + DWC_TASK_FREE(dwc_otg_hcd->reset_tasklet); ++ DWC_TASK_FREE(dwc_otg_hcd->completion_tasklet); + + #ifdef DWC_DEV_SRPCAP + if (dwc_otg_hcd->core_if->power_down == 2 && +@@ -877,7 +906,7 @@ + DWC_LIST_INIT(&hcd->periodic_sched_ready); + DWC_LIST_INIT(&hcd->periodic_sched_assigned); + DWC_LIST_INIT(&hcd->periodic_sched_queued); +- ++ DWC_TAILQ_INIT(&hcd->completed_urb_list); + /* + * Create a host channel descriptor for each host channel implemented + * in the controller. Initialize the channel descriptor array. +@@ -915,6 +944,9 @@ + + /* Initialize reset tasklet. */ + hcd->reset_tasklet = DWC_TASK_ALLOC("reset_tasklet", reset_tasklet_func, hcd); ++ ++ hcd->completion_tasklet = DWC_TASK_ALLOC("completion_tasklet", ++ completion_tasklet_func, hcd); + #ifdef DWC_DEV_SRPCAP + if (hcd->core_if->power_down == 2) { + /* Initialize Power on timer for Host power up in case hibernation */ +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:42:54.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:43:14.000000000 +0000 +@@ -374,6 +374,13 @@ + + DWC_CIRCLEQ_HEAD(hc_list, dwc_hc); + ++typedef struct urb_tq_entry { ++ struct urb *urb; ++ DWC_TAILQ_ENTRY(urb_tq_entry) urb_tq_entries; ++} urb_tq_entry_t; ++ ++DWC_TAILQ_HEAD(urb_list, urb_tq_entry); ++ + /** + * This structure holds the state of the HCD, including the non-periodic and + * periodic schedules. +@@ -551,6 +558,9 @@ + /* Tasket to do a reset */ + dwc_tasklet_t *reset_tasklet; + ++ dwc_tasklet_t *completion_tasklet; ++ struct urb_list completed_urb_list; ++ + /* */ + dwc_spinlock_t *lock; + dwc_spinlock_t *channel_lock; +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:14.000000000 +0000 +@@ -271,7 +271,7 @@ + dwc_otg_hcd_urb_t * dwc_otg_urb, int32_t status) + { + struct urb *urb = (struct urb *)urb_handle; +- ++ urb_tq_entry_t *new_entry; + if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { + DWC_PRINTF("%s: urb %p, device %d, ep %d %s, status=%d\n", + __func__, urb, usb_pipedevice(urb->pipe), +@@ -285,7 +285,7 @@ + } + } + } +- ++ new_entry = DWC_ALLOC_ATOMIC(sizeof(urb_tq_entry_t)); + urb->actual_length = dwc_otg_hcd_urb_get_actual_length(dwc_otg_urb); + /* Convert status value. */ + switch (status) { +@@ -348,18 +348,25 @@ + } + + DWC_FREE(dwc_otg_urb); +- ++ if (!new_entry) { ++ DWC_ERROR("dwc_otg_hcd: complete: cannot allocate URB TQ entry\n"); ++ urb->status = -EPROTO; ++ /* don't schedule the tasklet - ++ * directly return the packet here with error. */ + #if USB_URB_EP_LINKING +- usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(hcd), urb); ++ usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(hcd), urb); + #endif +- DWC_SPINUNLOCK(hcd->lock); + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) +- usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb); ++ usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb); + #else +- usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb, status); ++ usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb, urb->status); + #endif +- DWC_SPINLOCK(hcd->lock); +- ++ } else { ++ new_entry->urb = urb; ++ DWC_TAILQ_INSERT_TAIL(&hcd->completed_urb_list, new_entry, ++ urb_tq_entries); ++ DWC_TASK_HI_SCHEDULE(hcd->completion_tasklet); ++ } + return 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1627_2bb563ade7d8343bd29ec55f350d6e4cca0a1b4f.txt 2014-04-28 00:43:14.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1628_231425035552554489be3a2704d80798311d0025.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1628_231425035552554489be3a2704d80798311d0025.patch --- linux-3.10.11/debian/patches/rpi/rpi_1628_231425035552554489be3a2704d80798311d0025.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1628_231425035552554489be3a2704d80798311d0025.patch 2014-04-28 00:43:16.000000000 +0000 @@ -0,0 +1,27 @@ +commit 231425035552554489be3a2704d80798311d0025 +Author: popcornmix +Date: Wed Jul 3 00:54:08 2013 +0100 + + Added Device IDs for August DVB-T 205 + +Index: linux-3.10-3.10.11/drivers/media/usb/dvb-usb-v2/rtl28xxu.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/media/usb/dvb-usb-v2/rtl28xxu.c 2014-04-27 23:37:00.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/media/usb/dvb-usb-v2/rtl28xxu.c 2014-04-28 00:43:15.000000000 +0000 +@@ -1408,6 +1408,10 @@ + &rtl2832u_props, "Compro VideoMate U620F", NULL) }, + { DVB_USB_DEVICE(USB_VID_KWORLD_2, 0xd394, + &rtl2832u_props, "MaxMedia HU394-T", NULL) }, ++ { DVB_USB_DEVICE(USB_VID_GTEK, 0xb803 /*USB_PID_AUGUST_DVBT205*/, ++ &rtl2832u_props, "August DVB-T 205", NULL) }, ++ { DVB_USB_DEVICE(USB_VID_GTEK, 0xa803 /*USB_PID_AUGUST_DVBT205*/, ++ &rtl2832u_props, "August DVB-T 205", NULL) }, + { } + }; + MODULE_DEVICE_TABLE(usb, rtl28xxu_id_table); +Index: linux-3.10-3.10.11/dummy/rpi_1628_231425035552554489be3a2704d80798311d0025.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1628_231425035552554489be3a2704d80798311d0025.txt 2014-04-28 00:43:15.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.patch --- linux-3.10.11/debian/patches/rpi/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.patch 2014-04-28 00:43:17.000000000 +0000 @@ -0,0 +1,24 @@ +commit f971c63abf1f3cf07b53b135908326201c208afd +Author: popcornmix +Date: Tue Apr 16 15:36:01 2013 +0100 + + Add v6wbi_flush_kern_tlb_range to allow zsmalloc to be built as a module + +Index: linux-3.10-3.10.11/arch/arm/kernel/armksyms.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/armksyms.c 2014-04-27 23:37:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/armksyms.c 2014-04-28 00:43:16.000000000 +0000 +@@ -156,3 +156,7 @@ + #ifdef CONFIG_ARM_PATCH_PHYS_VIRT + EXPORT_SYMBOL(__pv_phys_offset); + #endif ++ ++extern void v6wbi_flush_kern_tlb_range(void); ++EXPORT_SYMBOL(v6wbi_flush_kern_tlb_range); ++ +Index: linux-3.10-3.10.11/dummy/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1629_f971c63abf1f3cf07b53b135908326201c208afd.txt 2014-04-28 00:43:16.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.patch 2014-04-28 00:43:17.000000000 +0000 @@ -0,0 +1,72 @@ +commit 16cc4b289ed75acd033eae582a561e20a254650f +Author: P33M +Date: Mon Apr 22 00:08:36 2013 +0100 + + dwc_otg: fix NAK holdoff and allow on split transactions only + + This corrects a bug where if a single active non-periodic endpoint + had at least one transaction in its qh, on frnum == MAX_FRNUM the qh + would get skipped and never get queued again. This would result in + a silent device until error detection (automatic or otherwise) would + either reset the device or flush and requeue the URBs. + + Additionally the NAK holdoff was enabled for all transactions - this + would potentially stall a HS endpoint for 1ms if a previous error state + enabled this interrupt and the next response was a NAK. Fix so that + only split transactions get held off. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:17.000000000 +0000 +@@ -46,7 +46,7 @@ + #include "dwc_otg_hcd.h" + #include "dwc_otg_regs.h" + +-extern bool microframe_schedule; ++extern bool microframe_schedule, nak_holdoff_enable; + + //#define DEBUG_HOST_CHANNELS + #ifdef DEBUG_HOST_CHANNELS +@@ -1349,18 +1349,26 @@ + + /* + * Check to see if this is a NAK'd retransmit, in which case ignore for retransmission +- * we hold off on bulk retransmissions to reduce NAK interrupt overhead for ++ * we hold off on bulk retransmissions to reduce NAK interrupt overhead for full-speed + * cheeky devices that just hold off using NAKs + */ +- if (dwc_full_frame_num(qh->nak_frame) == dwc_full_frame_num(dwc_otg_hcd_get_frame_number(hcd))) { +- // Make fiq interrupt run on next frame (i.e. 8 uframes) +- g_next_sched_frame = ((qh->nak_frame + 8) & ~7) & DWC_HFNUM_MAX_FRNUM; +- qh_ptr = DWC_LIST_NEXT(qh_ptr); +- continue; ++ if (nak_holdoff_enable && qh->do_split) { ++ if (qh->nak_frame != 0xffff && ++ dwc_full_frame_num(qh->nak_frame) == ++ dwc_full_frame_num(dwc_otg_hcd_get_frame_number(hcd))) { ++ /* ++ * Revisit: Need to avoid trampling on periodic scheduling. ++ * Currently we are safe because g_np_count != g_np_sent whenever we hit this, ++ * but if this behaviour is changed then periodic endpoints will get a slower ++ * polling rate. ++ */ ++ g_next_sched_frame = ((qh->nak_frame + 8) & ~7) & DWC_HFNUM_MAX_FRNUM; ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ continue; ++ } else { ++ qh->nak_frame = 0xffff; ++ } + } +- else +- qh->nak_frame = 0xffff; +- + if (microframe_schedule) { + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels < 1) { +Index: linux-3.10-3.10.11/dummy/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1630_16cc4b289ed75acd033eae582a561e20a254650f.txt 2014-04-28 00:43:17.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.patch 2014-04-28 00:43:18.000000000 +0000 @@ -0,0 +1,480 @@ +commit da7e5ae895349c513b4cb78432114e528f942be5 +Author: popcornmix +Date: Fri Apr 26 10:08:31 2013 -0700 + + Merge pull request #286 from martinezjavier/rpi-3.6.y-dev + + add mmap support and some cleanups to bcm2835 ALSA driver + +Index: linux-3.10-3.10.11/sound/arm/bcm2835-pcm.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/bcm2835-pcm.c 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835-pcm.c 2014-04-28 00:43:18.000000000 +0000 +@@ -19,7 +19,8 @@ + + /* hardware definition */ + static struct snd_pcm_hardware snd_bcm2835_playback_hw = { +- .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER), ++ .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER | ++ SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID), + .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, + .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, + .rate_min = 8000, +@@ -251,6 +252,12 @@ + + audio_info(" .. IN\n"); + ++ memset(&alsa_stream->pcm_indirect, 0, sizeof(alsa_stream->pcm_indirect)); ++ ++ alsa_stream->pcm_indirect.hw_buffer_size = ++ alsa_stream->pcm_indirect.sw_buffer_size = ++ snd_pcm_lib_buffer_bytes(substream); ++ + alsa_stream->buffer_size = snd_pcm_lib_buffer_bytes(substream); + alsa_stream->period_size = snd_pcm_lib_period_bytes(substream); + alsa_stream->pos = 0; +@@ -263,6 +270,32 @@ + return 0; + } + ++static void snd_bcm2835_pcm_transfer(struct snd_pcm_substream *substream, ++ struct snd_pcm_indirect *rec, size_t bytes) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ void *src = (void *)(substream->runtime->dma_area + rec->sw_data); ++ int err; ++ ++ err = bcm2835_audio_write(alsa_stream, bytes, src); ++ if (err) ++ audio_error(" Failed to transfer to alsa device (%d)\n", err); ++ ++} ++ ++static int snd_bcm2835_pcm_ack(struct snd_pcm_substream *substream) ++{ ++ struct snd_pcm_runtime *runtime = substream->runtime; ++ bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; ++ struct snd_pcm_indirect *pcm_indirect = &alsa_stream->pcm_indirect; ++ ++ pcm_indirect->hw_queue_size = runtime->hw.buffer_bytes_max; ++ snd_pcm_indirect_playback_transfer(substream, pcm_indirect, ++ snd_bcm2835_pcm_transfer); ++ return 0; ++} ++ + /* trigger callback */ + static int snd_bcm2835_pcm_trigger(struct snd_pcm_substream *substream, int cmd) + { +@@ -279,6 +312,11 @@ + if (!alsa_stream->running) { + err = bcm2835_audio_start(alsa_stream); + if (err == 0) { ++ alsa_stream->pcm_indirect.hw_io = ++ alsa_stream->pcm_indirect.hw_data = ++ bytes_to_frames(runtime, ++ alsa_stream->pos); ++ substream->ops->ack(substream); + alsa_stream->running = 1; + alsa_stream->draining = 1; + } else { +@@ -327,30 +365,9 @@ + alsa_stream->pos); + + audio_info(" .. OUT\n"); +- return bytes_to_frames(runtime, alsa_stream->pos); +-} +- +-static int snd_bcm2835_pcm_copy(struct snd_pcm_substream *substream, +- int channel, snd_pcm_uframes_t pos, void *src, +- snd_pcm_uframes_t count) +-{ +- int ret; +- struct snd_pcm_runtime *runtime = substream->runtime; +- bcm2835_alsa_stream_t *alsa_stream = runtime->private_data; +- +- audio_info(" .. IN\n"); +- audio_debug("copy.......... (%d) hwptr=%d appl=%d pos=%d\n", +- frames_to_bytes(runtime, count), frames_to_bytes(runtime, +- runtime-> +- status-> +- hw_ptr), +- frames_to_bytes(runtime, runtime->control->appl_ptr), +- alsa_stream->pos); +- ret = +- bcm2835_audio_write(alsa_stream, frames_to_bytes(runtime, count), +- src); +- audio_info(" .. OUT\n"); +- return ret; ++ return snd_pcm_indirect_playback_pointer(substream, ++ &alsa_stream->pcm_indirect, ++ alsa_stream->pos); + } + + static int snd_bcm2835_pcm_lib_ioctl(struct snd_pcm_substream *substream, +@@ -372,7 +389,7 @@ + .prepare = snd_bcm2835_pcm_prepare, + .trigger = snd_bcm2835_pcm_trigger, + .pointer = snd_bcm2835_pcm_pointer, +- .copy = snd_bcm2835_pcm_copy, ++ .ack = snd_bcm2835_pcm_ack, + }; + + /* create a pcm device */ +Index: linux-3.10-3.10.11/sound/arm/bcm2835-vchiq.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/bcm2835-vchiq.c 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835-vchiq.c 2014-04-28 00:43:18.000000000 +0000 +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + #include "bcm2835.h" + +@@ -37,6 +38,10 @@ + + /* ---- Private Constants and Types ------------------------------------------ */ + ++#define BCM2835_AUDIO_STOP 0 ++#define BCM2835_AUDIO_START 1 ++#define BCM2835_AUDIO_WRITE 2 ++ + /* Logging macros (for remapping to other logging mechanisms, i.e., printf) */ + #ifdef AUDIO_DEBUG_ENABLE + #define LOG_ERR( fmt, arg... ) pr_err( "%s:%d " fmt, __func__, __LINE__, ##arg) +@@ -53,7 +58,7 @@ + typedef struct opaque_AUDIO_INSTANCE_T { + uint32_t num_connections; + VCHI_SERVICE_HANDLE_T vchi_handle[VCHI_MAX_NUM_CONNECTIONS]; +- struct semaphore msg_avail_event; ++ struct completion msg_avail_comp; + struct mutex vchi_mutex; + bcm2835_alsa_stream_t *alsa_stream; + int32_t result; +@@ -70,27 +75,35 @@ + + static int bcm2835_audio_stop_worker(bcm2835_alsa_stream_t * alsa_stream); + static int bcm2835_audio_start_worker(bcm2835_alsa_stream_t * alsa_stream); ++static int bcm2835_audio_write_worker(bcm2835_alsa_stream_t *alsa_stream, ++ uint32_t count, void *src); + + typedef struct { + struct work_struct my_work; + bcm2835_alsa_stream_t *alsa_stream; +- int x; ++ int cmd; ++ void *src; ++ uint32_t count; + } my_work_t; + + static void my_wq_function(struct work_struct *work) + { + my_work_t *w = (my_work_t *) work; + int ret = -9; +- LOG_DBG(" .. IN %p:%d\n", w->alsa_stream, w->x); +- switch (w->x) { +- case 1: ++ LOG_DBG(" .. IN %p:%d\n", w->alsa_stream, w->cmd); ++ switch (w->cmd) { ++ case BCM2835_AUDIO_START: + ret = bcm2835_audio_start_worker(w->alsa_stream); + break; +- case 2: ++ case BCM2835_AUDIO_STOP: + ret = bcm2835_audio_stop_worker(w->alsa_stream); + break; ++ case BCM2835_AUDIO_WRITE: ++ ret = bcm2835_audio_write_worker(w->alsa_stream, w->count, ++ w->src); ++ break; + default: +- LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->x); ++ LOG_ERR(" Unexpected work: %p:%d\n", w->alsa_stream, w->cmd); + break; + } + kfree((void *)work); +@@ -107,7 +120,7 @@ + if (work) { + INIT_WORK((struct work_struct *)work, my_wq_function); + work->alsa_stream = alsa_stream; +- work->x = 1; ++ work->cmd = BCM2835_AUDIO_START; + if (queue_work + (alsa_stream->my_wq, (struct work_struct *)work)) + ret = 0; +@@ -128,7 +141,31 @@ + if (work) { + INIT_WORK((struct work_struct *)work, my_wq_function); + work->alsa_stream = alsa_stream; +- work->x = 2; ++ work->cmd = BCM2835_AUDIO_STOP; ++ if (queue_work ++ (alsa_stream->my_wq, (struct work_struct *)work)) ++ ret = 0; ++ } else ++ LOG_ERR(" .. Error: NULL work kmalloc\n"); ++ } ++ LOG_DBG(" .. OUT %d\n", ret); ++ return ret; ++} ++ ++int bcm2835_audio_write(bcm2835_alsa_stream_t *alsa_stream, ++ uint32_t count, void *src) ++{ ++ int ret = -1; ++ LOG_DBG(" .. IN\n"); ++ if (alsa_stream->my_wq) { ++ my_work_t *work = kmalloc(sizeof(my_work_t), GFP_ATOMIC); ++ /*--- Queue some work (item 1) ---*/ ++ if (work) { ++ INIT_WORK((struct work_struct *)work, my_wq_function); ++ work->alsa_stream = alsa_stream; ++ work->cmd = BCM2835_AUDIO_WRITE; ++ work->src = src; ++ work->count = count; + if (queue_work + (alsa_stream->my_wq, (struct work_struct *)work)) + ret = 0; +@@ -178,7 +215,7 @@ + (" .. instance=%p, m.type=VC_AUDIO_MSG_TYPE_RESULT, success=%d\n", + instance, m.u.result.success); + instance->result = m.u.result.success; +- up(&instance->msg_avail_event); ++ complete(&instance->msg_avail_comp); + } else if (m.type == VC_AUDIO_MSG_TYPE_COMPLETE) { + irq_handler_t callback = (irq_handler_t) m.u.complete.callback; + LOG_DBG +@@ -435,8 +472,8 @@ + m.u.control.dest = chip->dest; + m.u.control.volume = chip->volume; + +- /* Create the message available event */ +- sema_init(&instance->msg_avail_event, 0); ++ /* Create the message available completion */ ++ init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ + success = vchi_msg_queue(instance->vchi_handle[0], +@@ -452,11 +489,10 @@ + } + + /* We are expecting a reply from the videocore */ +- if (down_interruptible(&instance->msg_avail_event)) { ++ ret = wait_for_completion_interruptible(&instance->msg_avail_comp); ++ if (ret) { + LOG_ERR("%s: failed on waiting for event (status=%d)\n", + __func__, success); +- +- ret = -1; + goto unlock; + } + +@@ -539,8 +575,8 @@ + m.u.config.samplerate = samplerate; + m.u.config.bps = bps; + +- /* Create the message available event */ +- sema_init(&instance->msg_avail_event, 0); ++ /* Create the message available completion */ ++ init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ + success = vchi_msg_queue(instance->vchi_handle[0], +@@ -556,11 +592,10 @@ + } + + /* We are expecting a reply from the videocore */ +- if (down_interruptible(&instance->msg_avail_event)) { ++ ret = wait_for_completion_interruptible(&instance->msg_avail_comp); ++ if (ret) { + LOG_ERR("%s: failed on waiting for event (status=%d)\n", + __func__, success); +- +- ret = -1; + goto unlock; + } + +@@ -688,8 +723,8 @@ + + m.type = VC_AUDIO_MSG_TYPE_CLOSE; + +- /* Create the message available event */ +- sema_init(&instance->msg_avail_event, 0); ++ /* Create the message available completion */ ++ init_completion(&instance->msg_avail_comp); + + /* Send the message to the videocore */ + success = vchi_msg_queue(instance->vchi_handle[0], +@@ -702,11 +737,11 @@ + ret = -1; + goto unlock; + } +- if (down_interruptible(&instance->msg_avail_event)) { ++ ++ ret = wait_for_completion_interruptible(&instance->msg_avail_comp); ++ if (ret) { + LOG_ERR("%s: failed on waiting for event (status=%d)", + __func__, success); +- +- ret = -1; + goto unlock; + } + if (instance->result != 0) { +@@ -732,8 +767,8 @@ + return ret; + } + +-int bcm2835_audio_write(bcm2835_alsa_stream_t * alsa_stream, uint32_t count, +- void *src) ++int bcm2835_audio_write_worker(bcm2835_alsa_stream_t *alsa_stream, ++ uint32_t count, void *src) + { + VC_AUDIO_MSG_T m; + AUDIO_INSTANCE_T *instance = alsa_stream->instance; +Index: linux-3.10-3.10.11/sound/arm/bcm2835.c +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/bcm2835.c 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835.c 2014-04-28 00:43:18.000000000 +0000 +@@ -110,20 +110,20 @@ + + err = snd_bcm2835_create(g_card, pdev, &chip); + if (err < 0) { +- printk(KERN_ERR "Failed to create bcm2835 chip\n"); ++ dev_err(&pdev->dev, "Failed to create bcm2835 chip\n"); + goto out_bcm2835_create; + } + + g_chip = chip; + err = snd_bcm2835_new_pcm(chip); + if (err < 0) { +- printk(KERN_ERR "Failed to create new BCM2835 pcm device\n"); ++ dev_err(&pdev->dev, "Failed to create new BCM2835 pcm device\n"); + goto out_bcm2835_new_pcm; + } + + err = snd_bcm2835_new_ctl(chip); + if (err < 0) { +- printk(KERN_ERR "Failed to create new BCM2835 ctl\n"); ++ dev_err(&pdev->dev, "Failed to create new BCM2835 ctl\n"); + goto out_bcm2835_new_ctl; + } + +@@ -139,14 +139,14 @@ + if (dev == 0) { + err = snd_card_register(card); + if (err < 0) { +- printk(KERN_ERR +- "Failed to register bcm2835 ALSA card \n"); ++ dev_err(&pdev->dev, ++ "Failed to register bcm2835 ALSA card \n"); + goto out_card_register; + } + platform_set_drvdata(pdev, card); +- printk(KERN_INFO "bcm2835 ALSA card created!\n"); ++ audio_info("bcm2835 ALSA card created!\n"); + } else { +- printk(KERN_INFO "bcm2835 ALSA chip created!\n"); ++ audio_info("bcm2835 ALSA chip created!\n"); + platform_set_drvdata(pdev, (void *)dev); + } + +@@ -160,11 +160,11 @@ + out_bcm2835_create: + BUG_ON(!g_card); + if (snd_card_free(g_card)) +- printk(KERN_ERR "Failed to free Registered alsa card\n"); ++ dev_err(&pdev->dev, "Failed to free Registered alsa card\n"); + g_card = NULL; + out: + dev = SNDRV_CARDS; /* stop more avail_substreams from being probed */ +- printk(KERN_ERR "BCM2835 ALSA Probe failed !!\n"); ++ dev_err(&pdev->dev, "BCM2835 ALSA Probe failed !!\n"); + return err; + } + +@@ -326,49 +326,49 @@ + int err; + err = platform_driver_register(&bcm2835_alsa0_driver); + if (err) { +- printk("Error registering bcm2835_alsa0_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto out; + } + + err = platform_driver_register(&bcm2835_alsa1_driver); + if (err) { +- printk("Error registering bcm2835_alsa1_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_0; + } + + err = platform_driver_register(&bcm2835_alsa2_driver); + if (err) { +- printk("Error registering bcm2835_alsa2_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_1; + } + + err = platform_driver_register(&bcm2835_alsa3_driver); + if (err) { +- printk("Error registering bcm2835_alsa3_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_2; + } + + err = platform_driver_register(&bcm2835_alsa4_driver); + if (err) { +- printk("Error registering bcm2835_alsa4_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_3; + } + + err = platform_driver_register(&bcm2835_alsa5_driver); + if (err) { +- printk("Error registering bcm2835_alsa5_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_4; + } + + err = platform_driver_register(&bcm2835_alsa6_driver); + if (err) { +- printk("Error registering bcm2835_alsa6_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_5; + } + + err = platform_driver_register(&bcm2835_alsa7_driver); + if (err) { +- printk("Error registering bcm2835_alsa7_driver %d .\n", err); ++ pr_err("Error registering bcm2835_alsa0_driver %d .\n", err); + goto unregister_6; + } + +Index: linux-3.10-3.10.11/sound/arm/bcm2835.h +=================================================================== +--- linux-3.10-3.10.11.orig/sound/arm/bcm2835.h 2014-04-28 00:42:18.000000000 +0000 ++++ linux-3.10-3.10.11/sound/arm/bcm2835.h 2014-04-28 00:43:18.000000000 +0000 +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + + /* +@@ -110,6 +111,7 @@ + typedef struct bcm2835_alsa_stream { + bcm2835_chip_t *chip; + struct snd_pcm_substream *substream; ++ struct snd_pcm_indirect pcm_indirect; + + struct semaphore buffers_update_sem; + struct semaphore control_sem; +Index: linux-3.10-3.10.11/dummy/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1631_da7e5ae895349c513b4cb78432114e528f942be5.txt 2014-04-28 00:43:18.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.patch --- linux-3.10.11/debian/patches/rpi/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.patch 2014-04-28 00:43:19.000000000 +0000 @@ -0,0 +1,217 @@ +commit 0fb5f97e8545da135182d9a2d71e4da42c5b2b87 +Author: popcornmix +Date: Tue May 7 22:20:24 2013 +0100 + + Add quick config. + + This is designed for quick compiling when developing. + No modules are needed and it includes all Pi specific drivers + +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_quick_defconfig +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_quick_defconfig 2014-04-28 00:43:19.000000000 +0000 +@@ -0,0 +1,197 @@ ++# CONFIG_ARM_PATCH_PHYS_VIRT is not set ++CONFIG_LOCALVERSION="-quick" ++# CONFIG_LOCALVERSION_AUTO is not set ++# CONFIG_SWAP is not set ++CONFIG_SYSVIPC=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_NO_HZ=y ++CONFIG_HIGH_RES_TIMERS=y ++CONFIG_IKCONFIG=y ++CONFIG_IKCONFIG_PROC=y ++CONFIG_KALLSYMS_ALL=y ++CONFIG_EMBEDDED=y ++CONFIG_PERF_EVENTS=y ++# CONFIG_COMPAT_BRK is not set ++CONFIG_SLAB=y ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++CONFIG_MODVERSIONS=y ++CONFIG_MODULE_SRCVERSION_ALL=y ++# CONFIG_BLK_DEV_BSG is not set ++CONFIG_ARCH_BCM2708=y ++CONFIG_PREEMPT=y ++CONFIG_AEABI=y ++CONFIG_UACCESS_WITH_MEMCPY=y ++CONFIG_ZBOOT_ROM_TEXT=0x0 ++CONFIG_ZBOOT_ROM_BSS=0x0 ++CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y ++CONFIG_CPU_IDLE=y ++CONFIG_VFP=y ++CONFIG_BINFMT_MISC=y ++CONFIG_NET=y ++CONFIG_PACKET=y ++CONFIG_UNIX=y ++CONFIG_INET=y ++CONFIG_IP_MULTICAST=y ++CONFIG_IP_PNP=y ++CONFIG_IP_PNP_DHCP=y ++CONFIG_IP_PNP_RARP=y ++CONFIG_SYN_COOKIES=y ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_WIRELESS is not set ++CONFIG_DEVTMPFS=y ++CONFIG_DEVTMPFS_MOUNT=y ++CONFIG_BLK_DEV_LOOP=y ++CONFIG_BLK_DEV_RAM=y ++CONFIG_SCSI=y ++# CONFIG_SCSI_PROC_FS is not set ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_NETDEVICES=y ++# CONFIG_NET_VENDOR_BROADCOM is not set ++# CONFIG_NET_VENDOR_CIRRUS is not set ++# CONFIG_NET_VENDOR_FARADAY is not set ++# CONFIG_NET_VENDOR_INTEL is not set ++# CONFIG_NET_VENDOR_MARVELL is not set ++# CONFIG_NET_VENDOR_MICREL is not set ++# CONFIG_NET_VENDOR_NATSEMI is not set ++# CONFIG_NET_VENDOR_SEEQ is not set ++# CONFIG_NET_VENDOR_STMICRO is not set ++# CONFIG_NET_VENDOR_WIZNET is not set ++CONFIG_USB_USBNET=y ++# CONFIG_USB_NET_AX8817X is not set ++# CONFIG_USB_NET_CDCETHER is not set ++# CONFIG_USB_NET_CDC_NCM is not set ++CONFIG_USB_NET_SMSC95XX=y ++# CONFIG_USB_NET_NET1080 is not set ++# CONFIG_USB_NET_CDC_SUBSET is not set ++# CONFIG_USB_NET_ZAURUS is not set ++# CONFIG_WLAN is not set ++# CONFIG_INPUT_MOUSEDEV is not set ++CONFIG_INPUT_EVDEV=y ++# CONFIG_INPUT_KEYBOARD is not set ++# CONFIG_INPUT_MOUSE is not set ++# CONFIG_SERIO is not set ++CONFIG_VT_HW_CONSOLE_BINDING=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_DEVKMEM is not set ++CONFIG_SERIAL_AMBA_PL011=y ++CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_TTY_PRINTK=y ++CONFIG_HW_RANDOM=y ++CONFIG_HW_RANDOM_BCM2708=y ++CONFIG_RAW_DRIVER=y ++CONFIG_THERMAL=y ++CONFIG_THERMAL_BCM2835=y ++CONFIG_WATCHDOG=y ++CONFIG_BCM2708_WDT=y ++CONFIG_REGULATOR=y ++CONFIG_REGULATOR_DEBUG=y ++CONFIG_REGULATOR_FIXED_VOLTAGE=y ++CONFIG_REGULATOR_VIRTUAL_CONSUMER=y ++CONFIG_REGULATOR_USERSPACE_CONSUMER=y ++CONFIG_FB=y ++CONFIG_FB_BCM2708=y ++CONFIG_FRAMEBUFFER_CONSOLE=y ++CONFIG_LOGO=y ++# CONFIG_LOGO_LINUX_MONO is not set ++# CONFIG_LOGO_LINUX_VGA16 is not set ++CONFIG_SOUND=y ++CONFIG_SND=y ++CONFIG_SND_BCM2835=y ++# CONFIG_SND_USB is not set ++CONFIG_USB=y ++CONFIG_USB_ANNOUNCE_NEW_DEVICES=y ++CONFIG_USB_DWCOTG=y ++CONFIG_MMC=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_PLTFM=y ++CONFIG_MMC_SDHCI_BCM2708=y ++CONFIG_MMC_SDHCI_BCM2708_DMA=y ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++CONFIG_LEDS_TRIGGERS=y ++# CONFIG_IOMMU_SUPPORT is not set ++CONFIG_EXT4_FS=y ++CONFIG_EXT4_FS_POSIX_ACL=y ++CONFIG_EXT4_FS_SECURITY=y ++CONFIG_AUTOFS4_FS=y ++CONFIG_FSCACHE=y ++CONFIG_CACHEFILES=y ++CONFIG_MSDOS_FS=y ++CONFIG_VFAT_FS=y ++CONFIG_FAT_DEFAULT_IOCHARSET="ascii" ++CONFIG_TMPFS=y ++CONFIG_TMPFS_POSIX_ACL=y ++CONFIG_CONFIGFS_FS=y ++# CONFIG_MISC_FILESYSTEMS is not set ++CONFIG_NFS_FS=y ++CONFIG_NFS_V3_ACL=y ++CONFIG_NFS_V4=y ++CONFIG_ROOT_NFS=y ++CONFIG_NFS_FSCACHE=y ++CONFIG_NLS_DEFAULT="utf8" ++CONFIG_NLS_CODEPAGE_437=y ++CONFIG_NLS_CODEPAGE_737=y ++CONFIG_NLS_CODEPAGE_775=y ++CONFIG_NLS_CODEPAGE_850=y ++CONFIG_NLS_CODEPAGE_852=y ++CONFIG_NLS_CODEPAGE_855=y ++CONFIG_NLS_CODEPAGE_857=y ++CONFIG_NLS_CODEPAGE_860=y ++CONFIG_NLS_CODEPAGE_861=y ++CONFIG_NLS_CODEPAGE_862=y ++CONFIG_NLS_CODEPAGE_863=y ++CONFIG_NLS_CODEPAGE_864=y ++CONFIG_NLS_CODEPAGE_865=y ++CONFIG_NLS_CODEPAGE_866=y ++CONFIG_NLS_CODEPAGE_869=y ++CONFIG_NLS_CODEPAGE_936=y ++CONFIG_NLS_CODEPAGE_950=y ++CONFIG_NLS_CODEPAGE_932=y ++CONFIG_NLS_CODEPAGE_949=y ++CONFIG_NLS_CODEPAGE_874=y ++CONFIG_NLS_ISO8859_8=y ++CONFIG_NLS_CODEPAGE_1250=y ++CONFIG_NLS_CODEPAGE_1251=y ++CONFIG_NLS_ASCII=y ++CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_2=y ++CONFIG_NLS_ISO8859_3=y ++CONFIG_NLS_ISO8859_4=y ++CONFIG_NLS_ISO8859_5=y ++CONFIG_NLS_ISO8859_6=y ++CONFIG_NLS_ISO8859_7=y ++CONFIG_NLS_ISO8859_9=y ++CONFIG_NLS_ISO8859_13=y ++CONFIG_NLS_ISO8859_14=y ++CONFIG_NLS_ISO8859_15=y ++CONFIG_NLS_UTF8=y ++CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_FS=y ++CONFIG_DETECT_HUNG_TASK=y ++# CONFIG_DEBUG_PREEMPT is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_FTRACE is not set ++CONFIG_KGDB=y ++CONFIG_KGDB_KDB=y ++# CONFIG_ARM_UNWIND is not set ++CONFIG_CRYPTO_CBC=y ++CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_MD5=y ++CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_DES=y ++# CONFIG_CRYPTO_ANSI_CPRNG is not set ++# CONFIG_CRYPTO_HW is not set ++CONFIG_CRC_ITU_T=y ++CONFIG_LIBCRC32C=y +Index: linux-3.10-3.10.11/dummy/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1632_0fb5f97e8545da135182d9a2d71e4da42c5b2b87.txt 2014-04-28 00:43:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.patch 2014-04-28 00:43:20.000000000 +0000 @@ -0,0 +1,67 @@ +commit bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8 +Author: popcornmix +Date: Fri May 10 19:42:38 2013 +0100 + + mmc: suppress sdcard warnings we are happy about by default + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:42:59.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:43:19.000000000 +0000 +@@ -139,6 +139,7 @@ + static bool missing_status = 1; + static bool spurious_crc_acmd51 = 0; + bool enable_llm = 1; ++bool extra_messages = 0; + + #if 0 + static void hptime_test(void) +@@ -672,13 +673,16 @@ + cs = readl(host_priv->dma_chan_base + BCM2708_DMA_CS); + + if (!(BCM2708_DMA_ACTIVE & cs)) +- printk(KERN_INFO "%s: missed completion of " ++ { ++ if (extra_messages) ++ printk(KERN_INFO "%s: missed completion of " + "cmd %d DMA (%d/%d [%d]/[%d]) - " + "ignoring it\n", + mmc_hostname(host->mmc), + host->last_cmdop, + host_priv->sg_done, sg_todo, + host_priv->sg_ix+1, sg_len); ++ } + else + printk(KERN_INFO "%s: resetting ongoing cmd %d" + "DMA before %d/%d [%d]/[%d] complete\n", +@@ -903,7 +907,8 @@ + + if (!host_priv->dma_wanted) { + /* ignore this interrupt - it was reset */ +- printk(KERN_INFO "%s: DMA IRQ %X ignored - " ++ if (extra_messages) ++ printk(KERN_INFO "%s: DMA IRQ %X ignored - " + "results were reset\n", + mmc_hostname(host->mmc), dma_cs); + #ifdef CHECK_DMA_USE +@@ -1397,6 +1402,7 @@ + module_param(spurious_crc_acmd51, bool, 0444); + module_param(enable_llm, bool, 0444); + module_param(cycle_delay, int, 0444); ++module_param(extra_messages, bool, 0444); + + MODULE_DESCRIPTION("Secure Digital Host Controller Interface platform driver"); + MODULE_AUTHOR("Broadcom "); +@@ -1409,5 +1415,6 @@ + MODULE_PARM_DESC(missing_status, "Use the missing status quirk"); + MODULE_PARM_DESC(spurious_crc_acmd51, "Use the spurious crc quirk for reading SCR (ACMD51)"); + MODULE_PARM_DESC(enable_llm, "Enable low-latency mode"); ++MODULE_PARM_DESC(extra_messages, "Enable more sdcard warning messages"); + + +Index: linux-3.10-3.10.11/dummy/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1633_bae4d6a1aa171a2c3ca2ced6a9bfd2242e876af8.txt 2014-04-28 00:43:19.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.patch --- linux-3.10.11/debian/patches/rpi/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.patch 2014-04-28 00:43:21.000000000 +0000 @@ -0,0 +1,24 @@ +commit 28b0e06bbd01d930a4a6157c8b80d3e001c6d3db +Author: popcornmix +Date: Fri May 17 15:19:49 2013 +0100 + + Add missing ids for Netgear WNA1000N and D-Link Alpha + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c 2014-04-28 00:42:51.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/usb_intf.c 2014-04-28 00:43:20.000000000 +0000 +@@ -114,6 +114,7 @@ + {USB_DEVICE(0x4856, 0x0091)},//NetweeN - Feixun + {USB_DEVICE(0x2019, 0x4902)},//Planex - Etop + {USB_DEVICE(0x2019, 0xAB2E)},//SW-WF02-AD15 -Abocom ++ {USB_DEVICE(0x0846, 0x9041)},//Netgear + + /****** 8188 RU ********/ + {USB_DEVICE(0x0BDA, 0x317F)},//Netcore,Netcore +Index: linux-3.10-3.10.11/dummy/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1634_28b0e06bbd01d930a4a6157c8b80d3e001c6d3db.txt 2014-04-28 00:43:20.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.patch --- linux-3.10.11/debian/patches/rpi/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.patch 2014-04-28 00:43:21.000000000 +0000 @@ -0,0 +1,26 @@ +commit 189aa695d9edaf45b38342e594c138c2784bd745 +Author: popcornmix +Date: Fri May 31 14:50:09 2013 +0100 + + rtl8192cu: select required config options to allow builds without other wifi modules. Thanks UrsusArctos + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/Kconfig 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig 2014-04-28 00:43:21.000000000 +0000 +@@ -1,6 +1,8 @@ + config RTL8192CU + tristate "Realtek 8192C USB WiFi" + depends on USB ++ select WIRELESS_EXT ++ select WEXT_PRIV + ---help--- +- Help message of RTL8192CU ++ Enable wireless network adapters based on Realtek RTL8192C chipset family, such as EDUP nano series + +Index: linux-3.10-3.10.11/dummy/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1635_189aa695d9edaf45b38342e594c138c2784bd745.txt 2014-04-28 00:43:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.patch --- linux-3.10.11/debian/patches/rpi/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.patch 2014-04-28 00:43:22.000000000 +0000 @@ -0,0 +1,46 @@ +commit d7ed51f5d768158ca7eb4dee423ed7f797d38f81 +Author: popcornmix +Date: Sat Jun 8 22:14:13 2013 +0100 + + Only init gpio pins of selected i2c bus + +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:42:58.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:43:21.000000000 +0000 +@@ -97,7 +97,7 @@ + * + * FIXME: This is a hack. Use pinmux / pinctrl. + */ +-static void bcm2708_i2c_init_pinmode(void) ++static void bcm2708_i2c_init_pinmode(int id) + { + #define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) + #define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) +@@ -105,8 +105,10 @@ + int pin; + u32 *gpio = ioremap(0x20200000, SZ_16K); + ++ BUG_ON(id != 0 && id != 1); + /* BSC0 is on GPIO 0 & 1, BSC1 is on GPIO 2 & 3 */ +- for (pin = 0; pin <= 3; pin++) { ++ for (pin = id*2+0; pin <= id*2+1; pin++) { ++printk("bcm2708_i2c_init_pinmode(%d,%d)\n", id, pin); + INP_GPIO(pin); /* set mode to GPIO input first */ + SET_GPIO_ALT(pin, 0); /* set mode to ALT 0 */ + } +@@ -279,7 +281,7 @@ + return PTR_ERR(clk); + } + +- bcm2708_i2c_init_pinmode(); ++ bcm2708_i2c_init_pinmode(pdev->id); + + bi = kzalloc(sizeof(*bi), GFP_KERNEL); + if (!bi) +Index: linux-3.10-3.10.11/dummy/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1636_d7ed51f5d768158ca7eb4dee423ed7f797d38f81.txt 2014-04-28 00:43:21.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.patch --- linux-3.10.11/debian/patches/rpi/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.patch 2014-04-28 00:43:23.000000000 +0000 @@ -0,0 +1,36 @@ +commit f2a51534c533eb1198cb6c76d409ef0eb8442807 +Author: popcornmix +Date: Thu Jun 13 16:46:54 2013 +0100 + + Avoid responding to unexpected I2C interrupts + +Index: linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:43:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/i2c/busses/i2c-bcm2708.c 2014-04-28 00:43:22.000000000 +0000 +@@ -175,6 +175,11 @@ + + spin_lock(&bi->lock); + ++ /* we may see camera interrupts on the "other" I2C channel ++ Just return if we've not sent anything */ ++ if (!bi->nmsgs || !bi->msg ) ++ goto early_exit; ++ + s = bcm2708_rd(bi, BSC_S); + + if (s & (BSC_S_CLKT | BSC_S_ERR)) { +@@ -208,6 +213,7 @@ + handled = false; + } + ++early_exit: + spin_unlock(&bi->lock); + + return handled ? IRQ_HANDLED : IRQ_NONE; +Index: linux-3.10-3.10.11/dummy/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1637_f2a51534c533eb1198cb6c76d409ef0eb8442807.txt 2014-04-28 00:43:22.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.patch --- linux-3.10.11/debian/patches/rpi/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.patch 2014-04-28 00:43:23.000000000 +0000 @@ -0,0 +1,215 @@ +commit b4879875090a00ea0df948608ddcd7cf8ce81ba5 +Author: Harm Hanemaaijer +Date: Thu Jun 20 20:21:39 2013 +0200 + + Speed up console framebuffer imageblit function + + Especially on platforms with a slower CPU but a relatively high + framebuffer fill bandwidth, like current ARM devices, the existing + console monochrome imageblit function used to draw console text is + suboptimal for common pixel depths such as 16bpp and 32bpp. The existing + code is quite general and can deal with several pixel depths. By creating + special case functions for 16bpp and 32bpp, by far the most common pixel + formats used on modern systems, a significant speed-up is attained + which can be readily felt on ARM-based devices like the Raspberry Pi + and the Allwinner platform, but should help any platform using the + fb layer. + + The special case functions allow constant folding, eliminating a number + of instructions including divide operations, and allow the use of an + unrolled loop, eliminating instructions with a variable shift size, + reducing source memory access instructions, and eliminating excessive + branching. These unrolled loops also allow much better code optimization + by the C compiler. The code that selects which optimized variant is used + is also simplified, eliminating integer divide instructions. + + The speed-up, measured by timing 'cat file.txt' in the console, varies + between 40% and 70%, when testing on the Raspberry Pi and Allwinner + ARM-based platforms, depending on font size and the pixel depth, with + the greater benefit for 32bpp. + + Signed-off-by: Harm Hanemaaijer + +Index: linux-3.10-3.10.11/drivers/video/cfbimgblt.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/cfbimgblt.c 2014-04-27 23:36:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/cfbimgblt.c 2014-04-28 00:43:23.000000000 +0000 +@@ -28,6 +28,11 @@ + * + * Also need to add code to deal with cards endians that are different than + * the native cpu endians. I also need to deal with MSB position in the word. ++ * Modified by Harm Hanemaaijer (fgenfb@yahoo.com) 2013: ++ * - Provide optimized versions of fast_imageblit for 16 and 32bpp that are ++ * significantly faster than the previous implementation. ++ * - Simplify the fast/slow_imageblit selection code, avoiding integer ++ * divides. + */ + #include + #include +@@ -262,6 +267,133 @@ + } + } + ++/* ++ * Optimized fast_imageblit for bpp == 16. ppw = 2, bit_mask = 3 folded ++ * into the code, main loop unrolled. ++ */ ++ ++static inline void fast_imageblit16(const struct fb_image *image, ++ struct fb_info *p, u8 __iomem * dst1, ++ u32 fgcolor, u32 bgcolor) ++{ ++ u32 fgx = fgcolor, bgx = bgcolor; ++ u32 spitch = (image->width + 7) / 8; ++ u32 end_mask, eorx; ++ const char *s = image->data, *src; ++ u32 __iomem *dst; ++ const u32 *tab = NULL; ++ int i, j, k; ++ ++ tab = fb_be_math(p) ? cfb_tab16_be : cfb_tab16_le; ++ ++ fgx <<= 16; ++ bgx <<= 16; ++ fgx |= fgcolor; ++ bgx |= bgcolor; ++ ++ eorx = fgx ^ bgx; ++ k = image->width / 2; ++ ++ for (i = image->height; i--;) { ++ dst = (u32 __iomem *) dst1; ++ src = s; ++ ++ j = k; ++ while (j >= 4) { ++ u8 bits = *src; ++ end_mask = tab[(bits >> 6) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 4) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 2) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[bits & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ src++; ++ j -= 4; ++ } ++ if (j != 0) { ++ u8 bits = *src; ++ end_mask = tab[(bits >> 6) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ if (j >= 2) { ++ end_mask = tab[(bits >> 4) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ if (j == 3) { ++ end_mask = tab[(bits >> 2) & 3]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst); ++ } ++ } ++ } ++ dst1 += p->fix.line_length; ++ s += spitch; ++ } ++} ++ ++/* ++ * Optimized fast_imageblit for bpp == 32. ppw = 1, bit_mask = 1 folded ++ * into the code, main loop unrolled. ++ */ ++ ++static inline void fast_imageblit32(const struct fb_image *image, ++ struct fb_info *p, u8 __iomem * dst1, ++ u32 fgcolor, u32 bgcolor) ++{ ++ u32 fgx = fgcolor, bgx = bgcolor; ++ u32 spitch = (image->width + 7) / 8; ++ u32 end_mask, eorx; ++ const char *s = image->data, *src; ++ u32 __iomem *dst; ++ const u32 *tab = NULL; ++ int i, j, k; ++ ++ tab = cfb_tab32; ++ ++ eorx = fgx ^ bgx; ++ k = image->width; ++ ++ for (i = image->height; i--;) { ++ dst = (u32 __iomem *) dst1; ++ src = s; ++ ++ j = k; ++ while (j >= 8) { ++ u8 bits = *src; ++ end_mask = tab[(bits >> 7) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 6) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 5) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 4) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 3) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 2) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[(bits >> 1) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ end_mask = tab[bits & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ src++; ++ j -= 8; ++ } ++ if (j != 0) { ++ u32 bits = (u32) * src; ++ while (j > 1) { ++ end_mask = tab[(bits >> 7) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst++); ++ bits <<= 1; ++ j--; ++ } ++ end_mask = tab[(bits >> 7) & 1]; ++ FB_WRITEL((end_mask & eorx) ^ bgx, dst); ++ } ++ dst1 += p->fix.line_length; ++ s += spitch; ++ } ++} ++ + void cfb_imageblit(struct fb_info *p, const struct fb_image *image) + { + u32 fgcolor, bgcolor, start_index, bitstart, pitch_index = 0; +@@ -294,11 +426,21 @@ + bgcolor = image->bg_color; + } + +- if (32 % bpp == 0 && !start_index && !pitch_index && +- ((width & (32/bpp-1)) == 0) && +- bpp >= 8 && bpp <= 32) +- fast_imageblit(image, p, dst1, fgcolor, bgcolor); +- else ++ if (!start_index && !pitch_index) { ++ if (bpp == 32) ++ fast_imageblit32(image, p, dst1, fgcolor, ++ bgcolor); ++ else if (bpp == 16 && (width & 1) == 0) ++ fast_imageblit16(image, p, dst1, fgcolor, ++ bgcolor); ++ else if (bpp == 8 && (width & 3) == 0) ++ fast_imageblit(image, p, dst1, fgcolor, ++ bgcolor); ++ else ++ slow_imageblit(image, p, dst1, fgcolor, ++ bgcolor, ++ start_index, pitch_index); ++ } else + slow_imageblit(image, p, dst1, fgcolor, bgcolor, + start_index, pitch_index); + } else +Index: linux-3.10-3.10.11/dummy/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1638_b4879875090a00ea0df948608ddcd7cf8ce81ba5.txt 2014-04-28 00:43:23.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.patch --- linux-3.10.11/debian/patches/rpi/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.patch 2014-04-28 00:43:24.000000000 +0000 @@ -0,0 +1,98 @@ +commit f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf +Author: Siarhei Siamashka +Date: Mon Jun 17 13:32:11 2013 +0300 + + fbdev: add FBIOCOPYAREA ioctl + + Based on the patch authored by Ali Gholami Rudi at + https://lkml.org/lkml/2009/7/13/153 + + Provide an ioctl for userspace applications, but only if this operation + is hardware accelerated (otherwide it does not make any sense). + + Signed-off-by: Siarhei Siamashka + +Index: linux-3.10-3.10.11/drivers/video/fbmem.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/fbmem.c 2014-04-27 23:36:57.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/fbmem.c 2014-04-28 00:43:24.000000000 +0000 +@@ -1074,6 +1074,25 @@ + return ret; + } + ++static int fb_copyarea_user(struct fb_info *info, ++ struct fb_copyarea *copy) ++{ ++ int ret = 0; ++ if (!lock_fb_info(info)) ++ return -ENODEV; ++ if (copy->dx + copy->width > info->var.xres || ++ copy->sx + copy->width > info->var.xres || ++ copy->dy + copy->height > info->var.yres || ++ copy->sy + copy->height > info->var.yres) { ++ ret = -EINVAL; ++ goto out; ++ } ++ info->fbops->fb_copyarea(info, copy); ++out: ++ unlock_fb_info(info); ++ return ret; ++} ++ + static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, + unsigned long arg) + { +@@ -1084,6 +1103,7 @@ + struct fb_cmap cmap_from; + struct fb_cmap_user cmap; + struct fb_event event; ++ struct fb_copyarea copy; + void __user *argp = (void __user *)arg; + long ret = 0; + +@@ -1193,6 +1213,15 @@ + console_unlock(); + unlock_fb_info(info); + break; ++ case FBIOCOPYAREA: ++ if (info->flags & FBINFO_HWACCEL_COPYAREA) { ++ /* only provide this ioctl if it is accelerated */ ++ if (copy_from_user(©, argp, sizeof(copy))) ++ return -EFAULT; ++ ret = fb_copyarea_user(info, ©); ++ break; ++ } ++ /* fall through */ + default: + if (!lock_fb_info(info)) + return -ENODEV; +@@ -1345,6 +1374,7 @@ + case FBIOPAN_DISPLAY: + case FBIOGET_CON2FBMAP: + case FBIOPUT_CON2FBMAP: ++ case FBIOCOPYAREA: + arg = (unsigned long) compat_ptr(arg); + case FBIOBLANK: + ret = do_fb_ioctl(info, cmd, arg); +Index: linux-3.10-3.10.11/include/uapi/linux/fb.h +=================================================================== +--- linux-3.10-3.10.11.orig/include/uapi/linux/fb.h 2014-04-27 23:36:57.000000000 +0000 ++++ linux-3.10-3.10.11/include/uapi/linux/fb.h 2014-04-28 00:43:24.000000000 +0000 +@@ -34,6 +34,11 @@ + #define FBIOPUT_MODEINFO 0x4617 + #define FBIOGET_DISPINFO 0x4618 + #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) ++/* ++ * HACK: use 'z' in order not to clash with any other ioctl numbers which might ++ * be concurrently added to the mainline kernel ++ */ ++#define FBIOCOPYAREA _IOW('z', 0x21, struct fb_copyarea) + + #define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */ + #define FB_TYPE_PLANES 1 /* Non interleaved planes */ +Index: linux-3.10-3.10.11/dummy/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1639_f8d31723061c62e5b1021b9eeebc8ec9e36cb5cf.txt 2014-04-28 00:43:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.patch --- linux-3.10.11/debian/patches/rpi/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.patch 2014-04-28 00:43:25.000000000 +0000 @@ -0,0 +1,247 @@ +commit 9790ebeef4e67feee2364b6c6e6241e5270a23ab +Author: Siarhei Siamashka +Date: Mon Jun 17 16:00:25 2013 +0300 + + bcm2708_fb: DMA acceleration for fb_copyarea + + Based on http://www.raspberrypi.org/phpBB3/viewtopic.php?p=62425#p62425 + Also used Simon's dmaer_master module as a reference for tweaking DMA + settings for better performance. + + For now busylooping only. IRQ support might be added later. + With non-overclocked Raspberry Pi, the performance is ~360 MB/s + for simple copy or ~260 MB/s for two-pass copy (used when dragging + windows to the right). + + In the case of using DMA channel 0, the performance improves + to ~440 MB/s. + + For comparison, VFP optimized CPU copy can only do ~114 MB/s in + the same conditions (hindered by reading uncached source buffer). + + Signed-off-by: Siarhei Siamashka + +Index: linux-3.10-3.10.11/drivers/video/bcm2708_fb.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/video/bcm2708_fb.c 2014-04-28 00:42:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/video/bcm2708_fb.c 2014-04-28 00:43:24.000000000 +0000 +@@ -28,6 +28,7 @@ + #include + #include + ++#include + #include + #include + +@@ -63,6 +64,11 @@ + struct fbinfo_s *info; + dma_addr_t dma; + u32 cmap[16]; ++ int dma_chan; ++ int dma_irq; ++ void __iomem *dma_chan_base; ++ void *cb_base; /* DMA control blocks */ ++ dma_addr_t cb_handle; + }; + + #define to_bcm2708(info) container_of(info, struct bcm2708_fb, fb) +@@ -312,11 +318,133 @@ + cfb_fillrect(info, rect); + } + ++/* A helper function for configuring dma control block */ ++static void set_dma_cb(struct bcm2708_dma_cb *cb, ++ int burst_size, ++ dma_addr_t dst, ++ int dst_stride, ++ dma_addr_t src, ++ int src_stride, ++ int w, ++ int h) ++{ ++ cb->info = BCM2708_DMA_BURST(burst_size) | BCM2708_DMA_S_WIDTH | ++ BCM2708_DMA_S_INC | BCM2708_DMA_D_WIDTH | ++ BCM2708_DMA_D_INC | BCM2708_DMA_TDMODE; ++ cb->dst = dst; ++ cb->src = src; ++ /* ++ * This is not really obvious from the DMA documentation, ++ * but the top 16 bits must be programmmed to "height -1" ++ * and not "height" in 2D mode. ++ */ ++ cb->length = ((h - 1) << 16) | w; ++ cb->stride = ((dst_stride - w) << 16) | (u16)(src_stride - w); ++ cb->pad[0] = 0; ++ cb->pad[1] = 0; ++} ++ + static void bcm2708_fb_copyarea(struct fb_info *info, + const struct fb_copyarea *region) + { +- /*print_debug("bcm2708_fb_copyarea\n"); */ +- cfb_copyarea(info, region); ++ struct bcm2708_fb *fb = to_bcm2708(info); ++ struct bcm2708_dma_cb *cb = fb->cb_base; ++ int bytes_per_pixel = (info->var.bits_per_pixel + 7) >> 3; ++ /* Channel 0 supports larger bursts and is a bit faster */ ++ int burst_size = (fb->dma_chan == 0) ? 8 : 2; ++ ++ /* Fallback to cfb_copyarea() if we don't like something */ ++ if (bytes_per_pixel > 4 || ++ info->var.xres > 1920 || info->var.yres > 1200 || ++ region->width <= 0 || region->width > info->var.xres || ++ region->height <= 0 || region->height > info->var.yres || ++ region->sx < 0 || region->sx >= info->var.xres || ++ region->sy < 0 || region->sy >= info->var.yres || ++ region->dx < 0 || region->dx >= info->var.xres || ++ region->dy < 0 || region->dy >= info->var.yres || ++ region->sx + region->width > info->var.xres || ++ region->dx + region->width > info->var.xres || ++ region->sy + region->height > info->var.yres || ++ region->dy + region->height > info->var.yres) { ++ cfb_copyarea(info, region); ++ return; ++ } ++ ++ if (region->dy == region->sy && region->dx > region->sx) { ++ /* ++ * A difficult case of overlapped copy. Because DMA can't ++ * copy individual scanlines in backwards direction, we need ++ * two-pass processing. We do it by programming a chain of dma ++ * control blocks in the first 16K part of the buffer and use ++ * the remaining 48K as the intermediate temporary scratch ++ * buffer. The buffer size is sufficient to handle up to ++ * 1920x1200 resolution at 32bpp pixel depth. ++ */ ++ int y; ++ dma_addr_t control_block_pa = fb->cb_handle; ++ dma_addr_t scratchbuf = fb->cb_handle + 16 * 1024; ++ int scanline_size = bytes_per_pixel * region->width; ++ int scanlines_per_cb = (64 * 1024 - 16 * 1024) / scanline_size; ++ ++ for (y = 0; y < region->height; y += scanlines_per_cb) { ++ dma_addr_t src = ++ fb->fb.fix.smem_start + ++ bytes_per_pixel * region->sx + ++ (region->sy + y) * fb->fb.fix.line_length; ++ dma_addr_t dst = ++ fb->fb.fix.smem_start + ++ bytes_per_pixel * region->dx + ++ (region->dy + y) * fb->fb.fix.line_length; ++ ++ if (region->height - y < scanlines_per_cb) ++ scanlines_per_cb = region->height - y; ++ ++ set_dma_cb(cb, burst_size, scratchbuf, scanline_size, ++ src, fb->fb.fix.line_length, ++ scanline_size, scanlines_per_cb); ++ control_block_pa += sizeof(struct bcm2708_dma_cb); ++ cb->next = control_block_pa; ++ cb++; ++ ++ set_dma_cb(cb, burst_size, dst, fb->fb.fix.line_length, ++ scratchbuf, scanline_size, ++ scanline_size, scanlines_per_cb); ++ control_block_pa += sizeof(struct bcm2708_dma_cb); ++ cb->next = control_block_pa; ++ cb++; ++ } ++ /* move the pointer back to the last dma control block */ ++ cb--; ++ } else { ++ /* A single dma control block is enough. */ ++ int sy, dy, stride; ++ if (region->dy <= region->sy) { ++ /* processing from top to bottom */ ++ dy = region->dy; ++ sy = region->sy; ++ stride = fb->fb.fix.line_length; ++ } else { ++ /* processing from bottom to top */ ++ dy = region->dy + region->height - 1; ++ sy = region->sy + region->height - 1; ++ stride = -fb->fb.fix.line_length; ++ } ++ set_dma_cb(cb, burst_size, ++ fb->fb.fix.smem_start + dy * fb->fb.fix.line_length + ++ bytes_per_pixel * region->dx, ++ stride, ++ fb->fb.fix.smem_start + sy * fb->fb.fix.line_length + ++ bytes_per_pixel * region->sx, ++ stride, ++ region->width * bytes_per_pixel, ++ region->height); ++ } ++ ++ /* end of dma control blocks chain */ ++ cb->next = 0; ++ ++ bcm_dma_start(fb->dma_chan_base, fb->cb_handle); ++ bcm_dma_wait_idle(fb->dma_chan_base); + } + + static void bcm2708_fb_imageblit(struct fb_info *info, +@@ -359,7 +487,7 @@ + fb->dma = dma; + } + fb->fb.fbops = &bcm2708_fb_ops; +- fb->fb.flags = FBINFO_FLAG_DEFAULT; ++ fb->fb.flags = FBINFO_FLAG_DEFAULT | FBINFO_HWACCEL_COPYAREA; + fb->fb.pseudo_palette = fb->cmap; + + strncpy(fb->fb.fix.id, bcm2708_name, sizeof(fb->fb.fix.id)); +@@ -424,6 +552,28 @@ + } + memset(fb, 0, sizeof(struct bcm2708_fb)); + ++ fb->cb_base = dma_alloc_writecombine(&dev->dev, SZ_64K, ++ &fb->cb_handle, GFP_KERNEL); ++ if (!fb->cb_base) { ++ dev_err(&dev->dev, "cannot allocate DMA CBs\n"); ++ ret = -ENOMEM; ++ goto free_fb; ++ } ++ ++ pr_info("BCM2708FB: allocated DMA memory %08x\n", ++ fb->cb_handle); ++ ++ ret = bcm_dma_chan_alloc(BCM_DMA_FEATURE_BULK, ++ &fb->dma_chan_base, &fb->dma_irq); ++ if (ret < 0) { ++ dev_err(&dev->dev, "couldn't allocate a DMA channel\n"); ++ goto free_cb; ++ } ++ fb->dma_chan = ret; ++ ++ pr_info("BCM2708FB: allocated DMA channel %d @ %p\n", ++ fb->dma_chan, fb->dma_chan_base); ++ + fb->dev = dev; + + ret = bcm2708_fb_register(fb); +@@ -432,6 +582,9 @@ + goto out; + } + ++free_cb: ++ dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle); ++free_fb: + kfree(fb); + free_region: + dev_err(&dev->dev, "probe failed, err %d\n", ret); +@@ -449,6 +602,9 @@ + iounmap(fb->fb.screen_base); + unregister_framebuffer(&fb->fb); + ++ dma_free_writecombine(&dev->dev, SZ_64K, fb->cb_base, fb->cb_handle); ++ bcm_dma_chan_free(fb->dma_chan); ++ + dma_free_coherent(NULL, PAGE_ALIGN(sizeof(*fb->info)), (void *)fb->info, + fb->dma); + kfree(fb); +Index: linux-3.10-3.10.11/dummy/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1640_9790ebeef4e67feee2364b6c6e6241e5270a23ab.txt 2014-04-28 00:43:24.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.patch 2014-04-28 00:43:26.000000000 +0000 @@ -0,0 +1,88 @@ +commit 87f7101032e62f17eea0b2ba2b8f6c13dc0b444a +Author: Mike Bradley +Date: Mon Jun 17 11:31:42 2013 -0700 + + dwc_otg: Call usb_hcd_unlink_urb_from_ep with lock held in completion handler + + usb_hcd_unlink_urb_from_ep must be called with the HCD lock held. Calling it + asynchronously in the tasklet was not safe (regression in + c4564d4a1a0a9b10d4419e48239f5d99e88d2667). + + This change unlinks it from the endpoint prior to queueing it for handling in + the tasklet, and also adds a check to ensure the urb is OK to be unlinked + before doing so. + + NULL pointer dereference kernel oopses had been observed in usb_hcd_giveback_urb + when a USB device was unplugged/replugged during data transfer. This effect + was reproduced using automated USB port power control, hundreds of replug + events were performed during active transfers to confirm that the problem was + eliminated. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:17.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:25.000000000 +0000 +@@ -704,6 +704,7 @@ + urb_tq_entry_t *item; + dwc_irqflags_t flags; + ++ /* This could just be spin_lock_irq */ + DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); + while (!DWC_TAILQ_EMPTY(&hcd->completed_urb_list)) { + item = DWC_TAILQ_FIRST(&hcd->completed_urb_list); +@@ -713,7 +714,6 @@ + DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); + DWC_FREE(item); + +- usb_hcd_unlink_urb_from_ep(hcd->priv, urb); + usb_hcd_giveback_urb(hcd->priv, urb, urb->status); + + DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:25.000000000 +0000 +@@ -265,13 +265,15 @@ + + /** + * Sets the final status of an URB and returns it to the device driver. Any +- * required cleanup of the URB is performed. ++ * required cleanup of the URB is performed. The HCD lock should be held on ++ * entry. + */ + static int _complete(dwc_otg_hcd_t * hcd, void *urb_handle, + dwc_otg_hcd_urb_t * dwc_otg_urb, int32_t status) + { + struct urb *urb = (struct urb *)urb_handle; + urb_tq_entry_t *new_entry; ++ int rc = 0; + if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) { + DWC_PRINTF("%s: urb %p, device %d, ep %d %s, status=%d\n", + __func__, urb, usb_pipedevice(urb->pipe), +@@ -363,9 +365,17 @@ + #endif + } else { + new_entry->urb = urb; +- DWC_TAILQ_INSERT_TAIL(&hcd->completed_urb_list, new_entry, +- urb_tq_entries); +- DWC_TASK_HI_SCHEDULE(hcd->completion_tasklet); ++#if USB_URB_EP_LINKING ++ rc = usb_hcd_check_unlink_urb(dwc_otg_hcd_to_hcd(hcd), urb, urb->status); ++ if(0 == rc) { ++ usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(hcd), urb); ++ } ++#endif ++ if(0 == rc) { ++ DWC_TAILQ_INSERT_TAIL(&hcd->completed_urb_list, new_entry, ++ urb_tq_entries); ++ DWC_TASK_HI_SCHEDULE(hcd->completion_tasklet); ++ } + } + return 0; + } +Index: linux-3.10-3.10.11/dummy/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1641_87f7101032e62f17eea0b2ba2b8f6c13dc0b444a.txt 2014-04-28 00:43:25.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.patch --- linux-3.10.11/debian/patches/rpi/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.patch 2014-04-28 00:43:27.000000000 +0000 @@ -0,0 +1,1413 @@ +commit c033ecd660e08776a2bdd1b72eef166ee2cecf75 +Author: Gordon Hollingworth +Date: Thu Apr 4 11:05:21 2013 +0100 + + USB fix using a FIQ to implement split transactions + + This commit adds a FIQ implementaion that schedules + the split transactions using a FIQ so we don't get + held off by the interrupt latency of Linux + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_common_port/dwc_common_linux.c 2014-04-28 00:43:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_common_port/dwc_common_linux.c 2014-04-28 00:43:26.000000000 +0000 +@@ -580,7 +580,12 @@ + + void DWC_MODIFY_REG32(uint32_t volatile *reg, uint32_t clear_mask, uint32_t set_mask) + { ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ local_fiq_disable(); + writel((readl(reg) & ~clear_mask) | set_mask, reg); ++ local_irq_restore(flags); + } + + #if 0 +@@ -1301,7 +1306,7 @@ + EXPORT_SYMBOL(__DWC_DEBUG); + #endif + +-EXPORT_SYMBOL(__DWC_DMA_ALLOC); ++EXPORT_SYMBOL(__DWC_DMA_ALLOC); + EXPORT_SYMBOL(__DWC_DMA_ALLOC_ATOMIC); + EXPORT_SYMBOL(__DWC_DMA_FREE); + EXPORT_SYMBOL(__DWC_ALLOC); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c 2014-04-28 00:43:26.000000000 +0000 +@@ -47,8 +47,6 @@ + #include "dwc_otg_hcd.h" + #include "dwc_otg_mphi_fix.h" + +-extern bool fiq_fix_enable; +- + #ifdef DEBUG + inline const char *op_state_str(dwc_otg_core_if_t * core_if) + { +@@ -1321,7 +1319,7 @@ + /** + * This function returns the Core Interrupt register. + */ +-static inline uint32_t dwc_otg_read_common_intr(dwc_otg_core_if_t * core_if) ++static inline uint32_t dwc_otg_read_common_intr(dwc_otg_core_if_t * core_if, gintmsk_data_t *reenable_gintmsk) + { + gahbcfg_data_t gahbcfg = {.d32 = 0 }; + gintsts_data_t gintsts; +@@ -1338,19 +1336,33 @@ + gintmsk_common.b.lpmtranrcvd = 1; + #endif + gintmsk_common.b.restoredone = 1; +- /** @todo: The port interrupt occurs while in device +- * mode. Added code to CIL to clear the interrupt for now! +- */ +- gintmsk_common.b.portintr = 1; +- ++ if(dwc_otg_is_device_mode(core_if)) ++ { ++ /** @todo: The port interrupt occurs while in device ++ * mode. Added code to CIL to clear the interrupt for now! ++ */ ++ gintmsk_common.b.portintr = 1; ++ } + gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); + gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ { ++ unsigned long flags; ++ ++ // Re-enable the saved interrupts ++ local_irq_save(flags); ++ local_fiq_disable(); ++ gintmsk.d32 |= gintmsk_common.d32; ++ gintsts_saved.d32 &= ~gintmsk_common.d32; ++ reenable_gintmsk->d32 = gintmsk.d32; ++ local_irq_restore(flags); ++ } ++ + gahbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg); + + #ifdef DEBUG + /* if any common interrupts set */ + if (gintsts.d32 & gintmsk_common.d32) { +- DWC_DEBUGPL(DBG_ANY, "gintsts=%08x gintmsk=%08x\n", ++ DWC_DEBUGPL(DBG_ANY, "common_intr: gintsts=%08x gintmsk=%08x\n", + gintsts.d32, gintmsk.d32); + } + #endif +@@ -1394,6 +1406,7 @@ + { + int retval = 0; + gintsts_data_t gintsts; ++ gintmsk_data_t reenable_gintmsk; + gpwrdn_data_t gpwrdn = {.d32 = 0 }; + dwc_otg_device_t *otg_dev = dev; + dwc_otg_core_if_t *core_if = otg_dev->core_if; +@@ -1415,7 +1428,7 @@ + } + + if (core_if->hibernation_suspend <= 0) { +- gintsts.d32 = dwc_otg_read_common_intr(core_if); ++ gintsts.d32 = dwc_otg_read_common_intr(core_if, &reenable_gintmsk); + + if (gintsts.b.modemismatch) { + retval |= dwc_otg_handle_mode_mismatch_intr(core_if); +@@ -1512,8 +1525,12 @@ + gintsts.b.portintr = 1; + DWC_WRITE_REG32(&core_if->core_global_regs->gintsts,gintsts.d32); + retval |= 1; ++ reenable_gintmsk.b.portintr = 1; + + } ++ ++ DWC_WRITE_REG32(&core_if->core_global_regs->gintmsk, reenable_gintmsk.d32); ++ + } else { + DWC_DEBUGPL(DBG_ANY, "gpwrdn=%08x\n", gpwrdn.d32); + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:43:03.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:43:26.000000000 +0000 +@@ -242,7 +242,8 @@ + + //Global variable to switch the fiq fix on or off (declared in bcm2708.c) + extern bool fiq_fix_enable; +- ++// Global variable to enable the split transaction fix ++bool fiq_split_enable = true; + //Global variable to switch the nak holdoff on or off + bool nak_holdoff_enable = true; + +@@ -1090,6 +1091,7 @@ + } + printk(KERN_DEBUG "dwc_otg: FIQ %s\n", fiq_fix_enable ? "enabled":"disabled"); + printk(KERN_DEBUG "dwc_otg: NAK holdoff %s\n", nak_holdoff_enable ? "enabled":"disabled"); ++ printk(KERN_DEBUG "dwc_otg: FIQ split fix %s\n", fiq_split_enable ? "enabled":"disabled"); + + error = driver_create_file(drv, &driver_attr_version); + #ifdef DEBUG +@@ -1374,6 +1376,8 @@ + MODULE_PARM_DESC(fiq_fix_enable, "Enable the fiq fix"); + module_param(nak_holdoff_enable, bool, 0444); + MODULE_PARM_DESC(nak_holdoff_enable, "Enable the NAK holdoff"); ++module_param(fiq_split_enable, bool, 0444); ++MODULE_PARM_DESC(fiq_split_enable, "Enable the FIQ fix on split transactions"); + + /** @page "Module Parameters" + * +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:26.000000000 +0000 +@@ -45,6 +45,7 @@ + + #include "dwc_otg_hcd.h" + #include "dwc_otg_regs.h" ++#include "dwc_otg_mphi_fix.h" + + extern bool microframe_schedule, nak_holdoff_enable; + +@@ -581,6 +582,8 @@ + */ + dwc_otg_hc_halt(hcd->core_if, qh->channel, + DWC_OTG_HC_XFER_URB_DEQUEUE); ++ ++ dwc_otg_hcd_release_port(hcd, qh); + } + } + +@@ -716,6 +719,8 @@ + + usb_hcd_giveback_urb(hcd->priv, urb, urb->status); + ++ fiq_print(FIQDBG_PORTHUB, "COMPLETE"); ++ + DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); + } + DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); +@@ -979,6 +984,10 @@ + hcd->frame_list = NULL; + hcd->frame_list_dma = 0; + hcd->periodic_qh_count = 0; ++ ++ DWC_MEMSET(hcd->hub_port, 0, sizeof(hcd->hub_port)); ++ DWC_MEMSET(hcd->hub_port_alloc, -1, sizeof(hcd->hub_port_alloc)); ++ + out: + return retval; + } +@@ -1124,7 +1133,12 @@ + uint32_t hub_addr, port_addr; + hc->do_split = 1; + hc->xact_pos = qtd->isoc_split_pos; +- hc->complete_split = qtd->complete_split; ++ /* We don't need to do complete splits anymore */ ++ if(fiq_split_enable) ++ hc->complete_split = qtd->complete_split = 0; ++ else ++ hc->complete_split = qtd->complete_split; ++ + hcd->fops->hub_info(hcd, urb->priv, &hub_addr, &port_addr); + hc->hub_addr = (uint8_t) hub_addr; + hc->port_addr = (uint8_t) port_addr; +@@ -1271,6 +1285,62 @@ + hc->qh = qh; + } + ++/* ++** Check the transaction to see if the port / hub has already been assigned for ++** a split transaction ++** ++** Return 0 - Port is already in use ++*/ ++int dwc_otg_hcd_allocate_port(dwc_otg_hcd_t * hcd, dwc_otg_qh_t *qh) ++{ ++ uint32_t hub_addr, port_addr; ++ ++ if(!fiq_split_enable) ++ return 0; ++ ++ hcd->fops->hub_info(hcd, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->priv, &hub_addr, &port_addr); ++ ++ if(hcd->hub_port[hub_addr] & (1 << port_addr)) ++ { ++ fiq_print(FIQDBG_PORTHUB, "H%dP%d:S%02d", hub_addr, port_addr, qh->skip_count); ++ ++ qh->skip_count++; ++ ++ if(qh->skip_count > 40000) ++ { ++ printk_once(KERN_ERR "Error: Having to skip port allocation"); ++ local_fiq_disable(); ++ BUG(); ++ return 0; ++ } ++ return 1; ++ } ++ else ++ { ++ qh->skip_count = 0; ++ hcd->hub_port[hub_addr] |= 1 << port_addr; ++ fiq_print(FIQDBG_PORTHUB, "H%dP%d:A %d", hub_addr, port_addr, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->pipe_info.ep_num); ++ hcd->hub_port_alloc[hub_addr * 16 + port_addr] = dwc_otg_hcd_get_frame_number(hcd); ++ return 0; ++ } ++} ++void dwc_otg_hcd_release_port(dwc_otg_hcd_t * hcd, dwc_otg_qh_t *qh) ++{ ++ uint32_t hub_addr, port_addr; ++ ++ if(!fiq_split_enable) ++ return; ++ ++ hcd->fops->hub_info(hcd, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->priv, &hub_addr, &port_addr); ++ ++ hcd->hub_port[hub_addr] &= ~(1 << port_addr); ++ hcd->hub_port_alloc[hub_addr * 16 + port_addr] = -1; ++ ++ fiq_print(FIQDBG_PORTHUB, "H%dP%d:RO%d", hub_addr, port_addr, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->pipe_info.ep_num); ++ ++} ++ ++ + /** + * This function selects transactions from the HCD transfer schedule and + * assigns them to available host channels. It is called from HCD interrupt +@@ -1304,11 +1374,22 @@ + + while (qh_ptr != &hcd->periodic_sched_ready && + !DWC_CIRCLEQ_EMPTY(&hcd->free_hc_list)) { ++ ++ qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); ++ ++ if(qh->do_split && dwc_otg_hcd_allocate_port(hcd, qh)) ++ { ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ g_next_sched_frame = dwc_frame_num_inc(dwc_otg_hcd_get_frame_number(hcd), 1); ++ continue; ++ } ++ + if (microframe_schedule) { + // Make sure we leave one channel for non periodic transactions. + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels <= 1) { + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ if(qh->do_split) dwc_otg_hcd_release_port(hcd, qh); + break; + } + hcd->available_host_channels--; +@@ -1329,8 +1410,6 @@ + DWC_LIST_MOVE_HEAD(&hcd->periodic_sched_assigned, + &qh->qh_list_entry); + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); +- +- ret_val = DWC_OTG_TRANSACTION_PERIODIC; + } + + /* +@@ -1369,10 +1448,19 @@ + qh->nak_frame = 0xffff; + } + } ++ ++ if (qh->do_split && dwc_otg_hcd_allocate_port(hcd, qh)) ++ { ++ g_next_sched_frame = dwc_frame_num_inc(dwc_otg_hcd_get_frame_number(hcd), 1); ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ continue; ++ } ++ + if (microframe_schedule) { + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels < 1) { + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); ++ if(qh->do_split) dwc_otg_hcd_release_port(hcd, qh); + break; + } + hcd->available_host_channels--; +@@ -1396,16 +1484,17 @@ + + g_np_sent++; + +- if (ret_val == DWC_OTG_TRANSACTION_NONE) { +- ret_val = DWC_OTG_TRANSACTION_NON_PERIODIC; +- } else { +- ret_val = DWC_OTG_TRANSACTION_ALL; +- } +- + if (!microframe_schedule) + hcd->non_periodic_channels++; + } + ++ if(!DWC_LIST_EMPTY(&hcd->periodic_sched_assigned)) ++ ret_val |= DWC_OTG_TRANSACTION_PERIODIC; ++ ++ if(!DWC_LIST_EMPTY(&hcd->non_periodic_sched_active)) ++ ret_val |= DWC_OTG_TRANSACTION_NON_PERIODIC; ++ ++ + #ifdef DEBUG_HOST_CHANNELS + last_sel_trans_num_avail_hc_at_end = hcd->available_host_channels; + #endif /* DEBUG_HOST_CHANNELS */ +@@ -1522,6 +1611,15 @@ + + qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); + ++ // Do not send a split start transaction any later than frame .6 ++ // Note, we have to schedule a periodic in .5 to make it go in .6 ++ if(fiq_split_enable && qh->do_split && ((dwc_otg_hcd_get_frame_number(hcd) + 1) & 7) > 6) ++ { ++ qh_ptr = qh_ptr->next; ++ g_next_sched_frame = dwc_otg_hcd_get_frame_number(hcd) | 7; ++ continue; ++ } ++ + /* + * Set a flag if we're queuing high-bandwidth in slave mode. + * The flag prevents any halts to get into the request queue in +@@ -1651,6 +1749,15 @@ + + qh = DWC_LIST_ENTRY(hcd->non_periodic_qh_ptr, dwc_otg_qh_t, + qh_list_entry); ++ ++ // Do not send a split start transaction any later than frame .5 ++ // non periodic transactions will start immediately in this uframe ++ if(fiq_split_enable && qh->do_split && ((dwc_otg_hcd_get_frame_number(hcd) + 1) & 7) > 6) ++ { ++ g_next_sched_frame = dwc_otg_hcd_get_frame_number(hcd) | 7; ++ break; ++ } ++ + status = + queue_transaction(hcd, qh->channel, + tx_status.b.nptxfspcavail); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:43:14.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:43:26.000000000 +0000 +@@ -168,10 +168,10 @@ + + /** Transaction types. */ + typedef enum dwc_otg_transaction_type { +- DWC_OTG_TRANSACTION_NONE, +- DWC_OTG_TRANSACTION_PERIODIC, +- DWC_OTG_TRANSACTION_NON_PERIODIC, +- DWC_OTG_TRANSACTION_ALL ++ DWC_OTG_TRANSACTION_NONE = 0, ++ DWC_OTG_TRANSACTION_PERIODIC = 1, ++ DWC_OTG_TRANSACTION_NON_PERIODIC = 2, ++ DWC_OTG_TRANSACTION_ALL = DWC_OTG_TRANSACTION_PERIODIC + DWC_OTG_TRANSACTION_NON_PERIODIC + } dwc_otg_transaction_type_e; + + struct dwc_otg_qh; +@@ -370,6 +370,8 @@ + + uint16_t speed; + uint16_t frame_usecs[8]; ++ ++ uint32_t skip_count; + } dwc_otg_qh_t; + + DWC_CIRCLEQ_HEAD(hc_list, dwc_hc); +@@ -574,6 +576,10 @@ + /** Frame List */ + uint32_t *frame_list; + ++ /** Hub - Port assignment */ ++ int hub_port[16]; ++ int hub_port_alloc[256]; ++ + /** Frame List DMA address */ + dma_addr_t frame_list_dma; + +@@ -604,12 +610,16 @@ + extern void dwc_otg_hcd_queue_transactions(dwc_otg_hcd_t * hcd, + dwc_otg_transaction_type_e tr_type); + ++int dwc_otg_hcd_allocate_port(dwc_otg_hcd_t * hcd, dwc_otg_qh_t *qh); ++void dwc_otg_hcd_release_port(dwc_otg_hcd_t * dwc_otg_hcd, dwc_otg_qh_t *qh); ++ ++ + /** @} */ + + /** @name Interrupt Handler Functions */ + /** @{ */ + extern int32_t dwc_otg_hcd_handle_intr(dwc_otg_hcd_t * dwc_otg_hcd); +-extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd, int32_t); ++extern int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * dwc_otg_hcd); + extern int32_t dwc_otg_hcd_handle_rx_status_q_level_intr(dwc_otg_hcd_t * + dwc_otg_hcd); + extern int32_t dwc_otg_hcd_handle_np_tx_fifo_empty_intr(dwc_otg_hcd_t * +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:12.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:26.000000000 +0000 +@@ -38,6 +38,7 @@ + + #include + #include ++#include + + + extern bool microframe_schedule; +@@ -52,21 +53,295 @@ + + void * dummy_send; + mphi_regs_t c_mphi_regs; ++volatile void *dwc_regs_base; + int fiq_done, int_done; +-int g_next_sched_frame, g_np_count, g_np_sent, g_work_expected; +-static int mphi_int_count = 0 ; + +-extern bool fiq_fix_enable, nak_holdoff_enable; ++gintsts_data_t gintsts_saved = {.d32 = 0}; ++hcint_data_t hcint_saved[MAX_EPS_CHANNELS]; ++hcintmsk_data_t hcintmsk_saved[MAX_EPS_CHANNELS]; ++int split_out_xfersize[MAX_EPS_CHANNELS]; ++haint_data_t haint_saved; ++ ++int g_next_sched_frame, g_np_count, g_np_sent; ++static int mphi_int_count = 0 ; + + hcchar_data_t nak_hcchar; + hctsiz_data_t nak_hctsiz; + hcsplt_data_t nak_hcsplt; + int nak_count; + ++int complete_sched[MAX_EPS_CHANNELS] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; ++int split_start_frame[MAX_EPS_CHANNELS]; ++int queued_port[MAX_EPS_CHANNELS]; ++ ++#ifdef FIQ_DEBUG ++char buffer[1000*16]; ++int wptr; ++void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...) ++{ ++ FIQDBG_T dbg_lvl_req = FIQDBG_PORTHUB; ++ va_list args; ++ char text[17]; ++ hfnum_data_t hfnum = { .d32 = FIQ_READ(dwc_regs_base + 0x408) }; ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ local_fiq_disable(); ++ if(dbg_lvl & dbg_lvl_req || dbg_lvl == FIQDBG_ERR) ++ { ++ snprintf(text, 9, "%4d%d:%d ", hfnum.b.frnum/8, hfnum.b.frnum%8, 8 - hfnum.b.frrem/937); ++ va_start(args, fmt); ++ vsnprintf(text+8, 9, fmt, args); ++ va_end(args); ++ ++ memcpy(buffer + wptr, text, 16); ++ wptr = (wptr + 16) % sizeof(buffer); ++ } ++ local_irq_restore(flags); ++} ++#endif ++ ++void fiq_queue_request(int channel, int odd_frame) ++{ ++ hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) }; ++ hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) }; ++ hctsiz_data_t hctsiz = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x10) }; ++ ++ if(hcsplt.b.spltena == 0) ++ { ++ fiq_print(FIQDBG_ERR, "SPLTENA "); ++ BUG(); ++ } ++ ++ if(hcchar.b.epdir == 1) ++ { ++ fiq_print(FIQDBG_SCHED, "IN Ch %d", channel); ++ } ++ else ++ { ++ hctsiz.b.xfersize = 0; ++ fiq_print(FIQDBG_SCHED, "OUT Ch %d", channel); ++ } ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0x10), hctsiz.d32); ++ ++ hcsplt.b.compsplt = 1; ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0x4), hcsplt.d32); ++ ++ // Send the Split complete ++ hcchar.b.chen = 1; ++ hcchar.b.oddfrm = odd_frame ? 1 : 0; ++ ++ // Post this for transmit on the next frame for periodic or this frame for non-periodic ++ fiq_print(FIQDBG_SCHED, "SND_%s", odd_frame ? "ODD " : "EVEN"); ++ ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0x0), hcchar.d32); ++} ++ ++static int last_sof = -1; ++ ++/* ++** Function to handle the start of frame interrupt, choose whether we need to do anything and ++** therefore trigger the main interrupt ++** ++** returns int != 0 - interrupt has been handled ++*/ ++int diff; ++ ++int fiq_sof_handle(hfnum_data_t hfnum) ++{ ++ int handled = 0; ++ int i; ++ ++ // Just check that once we're running we don't miss a SOF ++ /*if(last_sof != -1 && (hfnum.b.frnum != ((last_sof + 1) & 0x3fff))) ++ { ++ fiq_print(FIQDBG_ERR, "LASTSOF "); ++ fiq_print(FIQDBG_ERR, "%4d%d ", last_sof / 8, last_sof & 7); ++ fiq_print(FIQDBG_ERR, "%4d%d ", hfnum.b.frnum / 8, hfnum.b.frnum & 7); ++ BUG(); ++ }*/ ++ ++ // Only start remembering the last sof when the interrupt has been ++ // enabled (we don't check the mask to come in here...) ++ if(last_sof != -1 || FIQ_READ(dwc_regs_base + 0x18) & (1<<3)) ++ last_sof = hfnum.b.frnum; ++ ++ for(i = 0; i < MAX_EPS_CHANNELS; i++) ++ { ++ if(complete_sched[i] != -1) ++ { ++ if(complete_sched[i] <= hfnum.b.frnum || (complete_sched[i] > 0x3f00 && hfnum.b.frnum < 0xf0)) ++ { ++ fiq_queue_request(i, hfnum.b.frnum & 1); ++ complete_sched[i] = -1; ++ } ++ } ++ ++ if(complete_sched[i] != -1) ++ { ++ // This is because we've seen a split complete occur with no start... ++ // most likely because missed the complete 0x3fff frames ago! ++ ++ diff = (hfnum.b.frnum + 0x3fff - complete_sched[i]) & 0x3fff ; ++ if(diff > 32 && diff < 0x3f00) ++ { ++ fiq_print(FIQDBG_ERR, "SPLTMISS"); ++ BUG(); ++ } ++ } ++ } ++ ++ if(g_np_count == g_np_sent && dwc_frame_num_gt(g_next_sched_frame, hfnum.b.frnum)) ++ { ++ /* ++ * If np_count != np_sent that means we need to queue non-periodic (bulk) packets this packet ++ * g_next_sched_frame is the next frame we have periodic packets for ++ * ++ * if neither of these are required for this frame then just clear the interrupt ++ */ ++ handled = 1; ++ ++ } ++ ++ return handled; ++} ++ ++int port_id(hcsplt_data_t hcsplt) ++{ ++ return hcsplt.b.prtaddr + (hcsplt.b.hubaddr << 8); ++} ++ ++int fiq_hcintr_handle(int channel, hfnum_data_t hfnum) ++{ ++ hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) }; ++ hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) }; ++ hcint_data_t hcint = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x8) }; ++ hcintmsk_data_t hcintmsk = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0xc) }; ++ hctsiz_data_t hctsiz = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x10)}; ++ ++ hcint_saved[channel].d32 |= hcint.d32; ++ hcintmsk_saved[channel].d32 = hcintmsk.d32; ++ ++ if(hcsplt.b.spltena) ++ { ++ fiq_print(FIQDBG_PORTHUB, "ph: %4x", port_id(hcsplt)); ++ if(hcint.b.chhltd) ++ { ++ fiq_print(FIQDBG_SCHED, "CH HLT %d", channel); ++ fiq_print(FIQDBG_SCHED, "%08x", hcint_saved[channel]); ++ } ++ if(hcint.b.stall || hcint.b.xacterr || hcint.b.bblerr || hcint.b.frmovrun || hcint.b.datatglerr) ++ { ++ queued_port[channel] = 0; ++ fiq_print(FIQDBG_ERR, "CHAN ERR"); ++ } ++ if(hcint.b.xfercomp) ++ { ++ // Clear the port allocation and transmit anything also on this port ++ queued_port[channel] = 0; ++ fiq_print(FIQDBG_SCHED, "XFERCOMP"); ++ } ++ if(hcint.b.nak) ++ { ++ queued_port[channel] = 0; ++ fiq_print(FIQDBG_SCHED, "NAK"); ++ } ++ if(hcint.b.ack && !hcsplt.b.compsplt) ++ { ++ int i; ++ ++ // Do not complete isochronous out transactions ++ if(hcchar.b.eptype == 1 && hcchar.b.epdir == 0) ++ { ++ queued_port[channel] = 0; ++ fiq_print(FIQDBG_SCHED, "ISOC_OUT"); ++ } ++ else ++ { ++ // Make sure we check the port / hub combination that we sent this split on. ++ // Do not queue a second request to the same port ++ for(i = 0; i < MAX_EPS_CHANNELS; i++) ++ { ++ if(port_id(hcsplt) == queued_port[i]) ++ { ++ fiq_print(FIQDBG_ERR, "PORTERR "); ++ //BUG(); ++ } ++ } ++ ++ split_start_frame[channel] = (hfnum.b.frnum + 1) & ~7; ++ ++ // Note, the size of an OUT is in the start split phase, not ++ // the complete split ++ split_out_xfersize[channel] = hctsiz.b.xfersize; ++ ++ hcint_saved[channel].b.chhltd = 0; ++ hcint_saved[channel].b.ack = 0; ++ ++ queued_port[channel] = port_id(hcsplt); ++ ++ if(hcchar.b.eptype & 1) ++ { ++ // Send the periodic complete in the same oddness frame as the ACK went... ++ fiq_queue_request(channel, !(hfnum.b.frnum & 1)); ++ // complete_sched[channel] = dwc_frame_num_inc(hfnum.b.frnum, 1); ++ } ++ else ++ { ++ // Schedule the split complete to occur later ++ complete_sched[channel] = dwc_frame_num_inc(hfnum.b.frnum, 2); ++ fiq_print(FIQDBG_SCHED, "ACK%04d%d", complete_sched[channel]/8, complete_sched[channel]%8); ++ } ++ } ++ } ++ if(hcint.b.nyet) ++ { ++ fiq_print(FIQDBG_ERR, "NYETERR1"); ++ //BUG(); ++ // Can transmit a split complete up to uframe .0 of the next frame ++ if(hfnum.b.frnum <= dwc_frame_num_inc(split_start_frame[channel], 8)) ++ { ++ // Send it next frame ++ if(hcchar.b.eptype & 1) // type 1 & 3 are interrupt & isoc ++ { ++ fiq_print(FIQDBG_SCHED, "NYT:SEND"); ++ fiq_queue_request(channel, !(hfnum.b.frnum & 1)); ++ } ++ else ++ { ++ // Schedule non-periodic access for next frame (the odd-even bit doesn't effect NP) ++ complete_sched[channel] = dwc_frame_num_inc(hfnum.b.frnum, 1); ++ fiq_print(FIQDBG_SCHED, "NYT%04d%d", complete_sched[channel]/8, complete_sched[channel]%8); ++ } ++ hcint_saved[channel].b.chhltd = 0; ++ hcint_saved[channel].b.nyet = 0; ++ } ++ else ++ { ++ queued_port[channel] = 0; ++ fiq_print(FIQDBG_ERR, "NYETERR2"); ++ //BUG(); ++ } ++ } ++ } ++ ++ // Clear the interrupt, this will also clear the HAINT bit ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0x8), hcint.d32); ++ return hcint_saved[channel].d32 == 0; ++} ++ ++gintsts_data_t gintsts; ++gintmsk_data_t gintmsk; ++// triggered: The set of interrupts that were triggered ++// handled: The set of interrupts that have been handled (no IRQ is ++// required) ++// keep: The set of interrupts we want to keep unmasked even though we ++// want to trigger an IRQ to handle it (SOF and HCINTR) ++gintsts_data_t triggered, handled, keep; ++hfnum_data_t hfnum; ++ + void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void) + { +- gintsts_data_t gintsts; +- hfnum_data_t hfnum; + + /* entry takes care to store registers we will be treading on here */ + asm __volatile__ ( +@@ -74,43 +349,112 @@ + /* stash FIQ and normal regs */ + "stmdb sp!, {r0-r12, lr};" + /* !! THIS SETS THE FRAME, adjust to > sizeof locals */ +- "sub fp, ip, #256 ;" ++ "sub fp, ip, #512 ;" + ); + +- fiq_done++; +- gintsts.d32 = FIQ_READ_IO_ADDRESS(USB_BASE + 0x14) & FIQ_READ_IO_ADDRESS(USB_BASE + 0x18); +- hfnum.d32 = FIQ_READ_IO_ADDRESS(USB_BASE + 0x408); +- +- if(gintsts.d32) ++ // Cannot put local variables at the beginning of the function ++ // because otherwise 'C' will play with the stack pointer. any locals ++ // need to be inside the following block ++ do + { +- if(gintsts.b.sofintr && g_np_count == g_np_sent && dwc_frame_num_gt(g_next_sched_frame, hfnum.b.frnum)) ++ fiq_done++; ++ gintsts.d32 = FIQ_READ(dwc_regs_base + 0x14); ++ gintmsk.d32 = FIQ_READ(dwc_regs_base + 0x18); ++ hfnum.d32 = FIQ_READ(dwc_regs_base + 0x408); ++ triggered.d32 = gintsts.d32 & gintmsk.d32; ++ handled.d32 = 0; ++ keep.d32 = 0; ++ fiq_print(FIQDBG_INT, "FIQ "); ++ fiq_print(FIQDBG_INT, "%08x", gintsts.d32); ++ fiq_print(FIQDBG_INT, "%08x", gintmsk.d32); ++ if(gintsts.d32) + { +- /* +- * If np_count != np_sent that means we need to queue non-periodic (bulk) packets this packet +- * g_next_sched_frame is the next frame we have periodic packets for +- * +- * if neither of these are required for this frame then just clear the interrupt +- */ +- gintsts.d32 = 0; +- gintsts.b.sofintr = 1; +- FIQ_WRITE_IO_ADDRESS((USB_BASE + 0x14), gintsts.d32); ++ // If port enabled ++ if((FIQ_READ(dwc_regs_base + 0x440) & 0xf) == 0x5) ++ { ++ if(gintsts.b.sofintr) ++ { ++ if(fiq_sof_handle(hfnum)) ++ { ++ handled.b.sofintr = 1; /* Handled in FIQ */ ++ } ++ else ++ { ++ /* Keer interrupt unmasked */ ++ keep.b.sofintr = 1; ++ } ++ { ++ // Need to make sure the read and clearing of the SOF interrupt is as close as possible to avoid the possibility of missing ++ // a start of frame interrupt ++ gintsts_data_t gintsts = { .b.sofintr = 1 }; ++ FIQ_WRITE((dwc_regs_base + 0x14), gintsts.d32); ++ } ++ } ++ ++ if(fiq_split_enable && gintsts.b.hcintr) ++ { ++ int i; ++ haint_data_t haint; ++ haintmsk_data_t haintmsk; ++ ++ haint.d32 = FIQ_READ(dwc_regs_base + 0x414); ++ haintmsk.d32 = FIQ_READ(dwc_regs_base + 0x418); ++ haint.d32 &= haintmsk.d32; ++ haint_saved.d32 |= haint.d32; ++ ++ fiq_print(FIQDBG_INT, "hcintr"); ++ fiq_print(FIQDBG_INT, "%08x", FIQ_READ(dwc_regs_base + 0x414)); ++ ++ // Go through each channel that has an enabled interrupt ++ for(i = 0; i < 16; i++) ++ if((haint.d32 >> i) & 1) ++ if(fiq_hcintr_handle(i, hfnum)) ++ haint_saved.d32 &= ~(1 << i); /* this was handled */ ++ ++ /* If we've handled all host channel interrupts then don't trigger the interrupt */ ++ if(haint_saved.d32 == 0) ++ { ++ handled.b.hcintr = 1; ++ } ++ else ++ { ++ /* Make sure we keep the channel interrupt unmasked when triggering the IRQ */ ++ keep.b.hcintr = 1; ++ } + +- g_work_expected = 0; ++ { ++ gintsts_data_t gintsts = { .b.hcintr = 1 }; ++ ++ // Always clear the channel interrupt ++ FIQ_WRITE((dwc_regs_base + 0x14), gintsts.d32); ++ } ++ } ++ } ++ else ++ { ++ last_sof = -1; ++ } + } +- else ++ ++ // Mask out the interrupts triggered - those handled - don't mask out the ones we want to keep ++ gintmsk.d32 = keep.d32 | (gintmsk.d32 & ~(triggered.d32 & ~handled.d32)); ++ // Save those that were triggered but not handled ++ gintsts_saved.d32 |= triggered.d32 & ~handled.d32; ++ FIQ_WRITE(dwc_regs_base + 0x18, gintmsk.d32); ++ ++ // Clear and save any unhandled interrupts and trigger the interrupt ++ if(gintsts_saved.d32) + { +- g_work_expected = 1; + /* To enable the MPHI interrupt (INT 32) + */ +- FIQ_WRITE( c_mphi_regs.outdda, (int) dummy_send); ++ FIQ_WRITE( c_mphi_regs.outdda, (int) dummy_send); + FIQ_WRITE( c_mphi_regs.outddb, (1 << 29)); + + mphi_int_count++; +- /* Clear the USB global interrupt so we don't just sit in the FIQ */ +- FIQ_MODIFY_IO_ADDRESS((USB_BASE + 0x8),1,0); +- + } + } ++ while(0); ++ + mb(); + + /* exit back to normal mode restoring everything */ +@@ -133,6 +477,7 @@ + + dwc_otg_core_if_t *core_if = dwc_otg_hcd->core_if; + gintsts_data_t gintsts; ++ gintmsk_data_t gintmsk; + hfnum_data_t hfnum; + + #ifdef DEBUG +@@ -140,6 +485,9 @@ + + #endif + ++ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts); ++ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk); ++ + /* Exit from ISR if core is hibernated */ + if (core_if->hibernation_suspend == 1) { + goto exit_handler_routine; +@@ -147,11 +495,18 @@ + DWC_SPINLOCK(dwc_otg_hcd->lock); + /* Check if HOST Mode */ + if (dwc_otg_is_host_mode(core_if)) { +- gintsts.d32 = dwc_otg_read_core_intr(core_if); ++ local_fiq_disable(); ++ gintmsk.d32 |= gintsts_saved.d32; ++ gintsts.d32 |= gintsts_saved.d32; ++ gintsts_saved.d32 = 0; ++ local_fiq_enable(); + if (!gintsts.d32) { + goto exit_handler_routine; + } ++ gintsts.d32 &= gintmsk.d32; ++ + #ifdef DEBUG ++ // We should be OK doing this because the common interrupts should already have been serviced + /* Don't print debug message in the interrupt handler on SOF */ + #ifndef DEBUG_SOF + if (gintsts.d32 != DWC_SOF_INTR_MASK) +@@ -171,11 +526,12 @@ + if (gintsts.b.sofintr && g_np_count == g_np_sent && dwc_frame_num_gt(g_next_sched_frame, hfnum.b.frnum)) + { + /* Note, we should never get here if the FIQ is doing it's job properly*/ +- retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd, g_work_expected); ++ retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd); + } + else if (gintsts.b.sofintr) { +- retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd, g_work_expected); ++ retval |= dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd); + } ++ + if (gintsts.b.rxstsqlvl) { + retval |= + dwc_otg_hcd_handle_rx_status_q_level_intr +@@ -190,7 +546,10 @@ + /** @todo Implement i2cintr handler. */ + } + if (gintsts.b.portintr) { ++ ++ gintmsk_data_t gintmsk = { .b.portintr = 1}; + retval |= dwc_otg_hcd_handle_port_intr(dwc_otg_hcd); ++ DWC_MODIFY_REG32(&core_if->core_global_regs->gintmsk, 0, gintmsk.d32); + } + if (gintsts.b.hcintr) { + retval |= dwc_otg_hcd_handle_hc_intr(dwc_otg_hcd); +@@ -227,26 +586,35 @@ + + if (fiq_fix_enable) + { +- /* Clear the MPHI interrupt */ +- DWC_WRITE_REG32(c_mphi_regs.intstat, (1<<16)); +- if (mphi_int_count >= 60) ++ local_fiq_disable(); ++ // Make sure that we don't clear the interrupt if we've still got pending work to do ++ if(gintsts_saved.d32 == 0) + { +- DWC_WRITE_REG32(c_mphi_regs.ctrl, ((1<<31) + (1<<16))); +- while(!(DWC_READ_REG32(c_mphi_regs.ctrl) & (1 << 17))) +- ; +- DWC_WRITE_REG32(c_mphi_regs.ctrl, (1<<31)); +- mphi_int_count = 0; ++ /* Clear the MPHI interrupt */ ++ DWC_WRITE_REG32(c_mphi_regs.intstat, (1<<16)); ++ if (mphi_int_count >= 60) ++ { ++ DWC_WRITE_REG32(c_mphi_regs.ctrl, ((1<<31) + (1<<16))); ++ while(!(DWC_READ_REG32(c_mphi_regs.ctrl) & (1 << 17))) ++ ; ++ DWC_WRITE_REG32(c_mphi_regs.ctrl, (1<<31)); ++ mphi_int_count = 0; ++ } ++ int_done++; + } +- int_done++; ++ ++ // Unmask handled interrupts ++ FIQ_WRITE(dwc_regs_base + 0x18, gintmsk.d32); ++ //DWC_MODIFY_REG32((uint32_t *)IO_ADDRESS(USB_BASE + 0x8), 0 , 1); ++ ++ local_fiq_enable(); ++ + if((jiffies / HZ) > last_time) + { + /* Once a second output the fiq and irq numbers, useful for debug */ + last_time = jiffies / HZ; + DWC_DEBUGPL(DBG_USER, "int_done = %d fiq_done = %d\n", int_done, fiq_done); + } +- +- /* Re-Enable FIQ interrupt from USB peripheral */ +- DWC_MODIFY_REG32((uint32_t *)IO_ADDRESS(USB_BASE + 0x8), 0 , 1); + } + + DWC_SPINUNLOCK(dwc_otg_hcd->lock); +@@ -294,13 +662,12 @@ + * (micro)frame. Periodic transactions may be queued to the controller for the + * next (micro)frame. + */ +-int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd, int32_t work_expected) ++int32_t dwc_otg_hcd_handle_sof_intr(dwc_otg_hcd_t * hcd) + { + hfnum_data_t hfnum; + dwc_list_link_t *qh_entry; + dwc_otg_qh_t *qh; + dwc_otg_transaction_type_e tr_type; +- gintsts_data_t gintsts = {.d32 = 0 }; + int did_something = 0; + int32_t next_sched_frame = -1; + +@@ -326,6 +693,7 @@ + qh = DWC_LIST_ENTRY(qh_entry, dwc_otg_qh_t, qh_list_entry); + qh_entry = qh_entry->next; + if (dwc_frame_num_le(qh->sched_frame, hcd->frame_number)) { ++ + /* + * Move QH to the ready list to be executed next + * (micro)frame. +@@ -351,15 +719,10 @@ + dwc_otg_hcd_queue_transactions(hcd, tr_type); + did_something = 1; + } +- if(work_expected && !did_something) +- DWC_DEBUGPL(DBG_USER, "Nothing to do !! frame = %x, g_next_sched_frame = %x\n", (int) hfnum.b.frnum, g_next_sched_frame); +- if(!work_expected && did_something) +- DWC_DEBUGPL(DBG_USER, "Unexpected work done !! frame = %x, g_next_sched_frame = %x\n", (int) hfnum.b.frnum, g_next_sched_frame); +- + + /* Clear interrupt */ +- gintsts.b.sofintr = 1; +- DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); ++ //gintsts.b.sofintr = 1; ++ //DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); + + return 1; + } +@@ -643,6 +1006,15 @@ + + haint.d32 = dwc_otg_read_host_all_channels_intr(dwc_otg_hcd->core_if); + ++ // Overwrite with saved interrupts from fiq handler ++ if(fiq_split_enable) ++ { ++ local_fiq_disable(); ++ haint.d32 = haint_saved.d32; ++ haint_saved.d32 = 0; ++ local_fiq_enable(); ++ } ++ + for (i = 0; i < dwc_otg_hcd->core_if->core_params->host_channels; i++) { + if (haint.b2.chint & (1 << i)) { + retval |= dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd, i); +@@ -683,7 +1055,10 @@ + *short_read = (hctsiz.b.xfersize != 0); + } + } else if (hc->qh->do_split) { +- length = qtd->ssplit_out_xfer_count; ++ if(fiq_split_enable) ++ length = split_out_xfersize[hc->hc_num]; ++ else ++ length = qtd->ssplit_out_xfer_count; + } else { + length = hc->xfer_len; + } +@@ -727,7 +1102,6 @@ + DWC_OTG_HC_XFER_COMPLETE, + &short_read); + +- + /* non DWORD-aligned buffer case handling. */ + if (hc->align_buff && xfer_length && hc->ep_is_in) { + dwc_memcpy(urb->buf + urb->actual_length, hc->qh->dw_align_buf, +@@ -930,6 +1304,9 @@ + int free_qtd; + dwc_irqflags_t flags; + dwc_spinlock_t *channel_lock = hcd->channel_lock; ++#ifdef FIQ_DEBUG ++ int endp = qtd->urb ? qtd->urb->pipe_info.ep_num : 0; ++#endif + + DWC_DEBUGPL(DBG_HCDV, " %s: channel %d, halt_status %d, xfer_len %d\n", + __func__, hc->hc_num, halt_status, hc->xfer_len); +@@ -1008,9 +1385,24 @@ + + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + hcd->available_host_channels++; ++ fiq_print(FIQDBG_PORTHUB, "AHC = %d ", hcd->available_host_channels); + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); + } + ++ if(fiq_split_enable && hc->do_split) ++ { ++ if(!(hcd->hub_port[hc->hub_addr] & (1 << hc->port_addr))) ++ { ++ fiq_print(FIQDBG_ERR, "PRTNOTAL"); ++ //BUG(); ++ } ++ ++ hcd->hub_port[hc->hub_addr] &= ~(1 << hc->port_addr); ++ hcd->hub_port_alloc[hc->hub_addr * 16 + hc->port_addr] = -1; ++ ++ fiq_print(FIQDBG_PORTHUB, "H%dP%d:RR%d", hc->hub_addr, hc->port_addr, endp); ++ } ++ + /* Try to queue more transfers now that there's a free channel. */ + tr_type = dwc_otg_hcd_select_transactions(hcd); + if (tr_type != DWC_OTG_TRANSACTION_NONE) { +@@ -1633,8 +2025,10 @@ + hc->ep_type == DWC_OTG_EP_TYPE_ISOC) { + int frnum = dwc_otg_hcd_get_frame_number(hcd); + ++ // With the FIQ running we only ever see the failed NYET + if (dwc_full_frame_num(frnum) != +- dwc_full_frame_num(hc->qh->sched_frame)) { ++ dwc_full_frame_num(hc->qh->sched_frame) || ++ fiq_split_enable) { + /* + * No longer in the same full speed frame. + * Treat this as a transaction error. +@@ -2012,10 +2406,10 @@ + static void handle_hc_chhltd_intr_dma(dwc_otg_hcd_t * hcd, + dwc_hc_t * hc, + dwc_otg_hc_regs_t * hc_regs, +- dwc_otg_qtd_t * qtd) ++ dwc_otg_qtd_t * qtd, ++ hcint_data_t hcint, ++ hcintmsk_data_t hcintmsk) + { +- hcint_data_t hcint; +- hcintmsk_data_t hcintmsk; + int out_nak_enh = 0; + + /* For core with OUT NAK enhancement, the flow for high- +@@ -2047,8 +2441,11 @@ + } + + /* Read the HCINTn register to determine the cause for the halt. */ +- hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); +- hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); ++ if(!fiq_split_enable) ++ { ++ hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); ++ } + + if (hcint.b.xfercomp) { + /** @todo This is here because of a possible hardware bug. Spec +@@ -2161,13 +2558,15 @@ + static int32_t handle_hc_chhltd_intr(dwc_otg_hcd_t * hcd, + dwc_hc_t * hc, + dwc_otg_hc_regs_t * hc_regs, +- dwc_otg_qtd_t * qtd) ++ dwc_otg_qtd_t * qtd, ++ hcint_data_t hcint, ++ hcintmsk_data_t hcintmsk) + { + DWC_DEBUGPL(DBG_HCDI, "--Host Channel %d Interrupt: " + "Channel Halted--\n", hc->hc_num); + + if (hcd->core_if->dma_enable) { +- handle_hc_chhltd_intr_dma(hcd, hc, hc_regs, qtd); ++ handle_hc_chhltd_intr_dma(hcd, hc, hc_regs, qtd, hcint, hcintmsk); + } else { + #ifdef DEBUG + if (!halt_status_ok(hcd, hc, hc_regs, qtd)) { +@@ -2184,7 +2583,7 @@ + int32_t dwc_otg_hcd_handle_hc_n_intr(dwc_otg_hcd_t * dwc_otg_hcd, uint32_t num) + { + int retval = 0; +- hcint_data_t hcint; ++ hcint_data_t hcint, hcint_orig; + hcintmsk_data_t hcintmsk; + dwc_hc_t *hc; + dwc_otg_hc_regs_t *hc_regs; +@@ -2197,12 +2596,23 @@ + qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); + + hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); ++ hcint_orig = hcint; + hcintmsk.d32 = DWC_READ_REG32(&hc_regs->hcintmsk); + DWC_DEBUGPL(DBG_HCDV, + " hcint 0x%08x, hcintmsk 0x%08x, hcint&hcintmsk 0x%08x\n", + hcint.d32, hcintmsk.d32, (hcint.d32 & hcintmsk.d32)); + hcint.d32 = hcint.d32 & hcintmsk.d32; + ++ if(fiq_split_enable) ++ { ++ // replace with the saved interrupts from the fiq handler ++ local_fiq_disable(); ++ hcint_orig.d32 = hcint_saved[num].d32; ++ hcint.d32 = hcint_orig.d32 & hcintmsk_saved[num].d32; ++ hcint_saved[num].d32 = 0; ++ local_fiq_enable(); ++ } ++ + if (!dwc_otg_hcd->core_if->dma_enable) { + if (hcint.b.chhltd && hcint.d32 != 0x2) { + hcint.b.chhltd = 0; +@@ -2220,7 +2630,7 @@ + hcint.b.nyet = 0; + } + if (hcint.b.chhltd) { +- retval |= handle_hc_chhltd_intr(dwc_otg_hcd, hc, hc_regs, qtd); ++ retval |= handle_hc_chhltd_intr(dwc_otg_hcd, hc, hc_regs, qtd, hcint_orig, hcintmsk_saved[num]); + } + if (hcint.b.ahberr) { + retval |= handle_hc_ahberr_intr(dwc_otg_hcd, hc, hc_regs, qtd); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:25.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:26.000000000 +0000 +@@ -392,7 +392,11 @@ + static struct fiq_handler fh = { + .name = "usb_fiq", + }; +-static uint8_t fiqStack[1024]; ++struct fiq_stack_s { ++ int magic1; ++ uint8_t stack[2048]; ++ int magic2; ++} fiq_stack; + + extern mphi_regs_t c_mphi_regs; + /** +@@ -434,9 +438,11 @@ + memset(®s,0,sizeof(regs)); + regs.ARM_r8 = (long)dwc_otg_hcd_handle_fiq; + regs.ARM_r9 = (long)0; +- regs.ARM_sp = (long)fiqStack + sizeof(fiqStack) - 4; ++ regs.ARM_sp = (long)fiq_stack.stack + sizeof(fiq_stack.stack) - 4; + set_fiq_regs(®s); +- } ++ fiq_stack.magic1 = 0xdeadbeef; ++ fiq_stack.magic2 = 0xaa995566; ++ } + + /* + * Allocate memory for the base HCD plus the DWC OTG HCD. +@@ -459,6 +465,8 @@ + + if (fiq_fix_enable) + { ++ volatile extern void *dwc_regs_base; ++ + //Set the mphi periph to the required registers + c_mphi_regs.base = otg_dev->os_dep.mphi_base; + c_mphi_regs.ctrl = otg_dev->os_dep.mphi_base + 0x4c; +@@ -466,6 +474,8 @@ + c_mphi_regs.outddb = otg_dev->os_dep.mphi_base + 0x2c; + c_mphi_regs.intstat = otg_dev->os_dep.mphi_base + 0x50; + ++ dwc_regs_base = otg_dev->os_dep.base; ++ + //Enable mphi peripheral + writel((1<<31),c_mphi_regs.ctrl); + #ifdef DEBUG +@@ -839,6 +849,8 @@ + usb_hcd_unlink_urb_from_ep(hcd, urb); + #endif + DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags); ++ ++ + #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) + usb_hcd_giveback_urb(hcd, urb); + #else +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:08.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:26.000000000 +0000 +@@ -41,6 +41,7 @@ + + #include "dwc_otg_hcd.h" + #include "dwc_otg_regs.h" ++#include "dwc_otg_mphi_fix.h" + + extern bool microframe_schedule; + +@@ -191,6 +192,7 @@ + dwc_otg_hcd_get_ep_num(&urb->pipe_info), hub_addr, + hub_port); + qh->do_split = 1; ++ qh->skip_count = 0; + } + + if (qh->ep_type == UE_INTERRUPT || qh->ep_type == UE_ISOCHRONOUS) { +@@ -737,6 +739,9 @@ + hcd->non_periodic_qh_ptr->next; + } + DWC_LIST_REMOVE_INIT(&qh->qh_list_entry); ++ ++ // If we've removed the last non-periodic entry then there are none left! ++ g_np_count = g_np_sent; + } else { + deschedule_periodic(hcd, qh); + hcd->periodic_qh_count--; +@@ -766,21 +771,21 @@ + { + if (dwc_qh_is_non_per(qh)) { + +- dwc_otg_qh_t *qh_tmp; +- dwc_list_link_t *qh_list; +- DWC_LIST_FOREACH(qh_list, &hcd->non_periodic_sched_inactive) +- { +- qh_tmp = DWC_LIST_ENTRY(qh_list, struct dwc_otg_qh, qh_list_entry); +- if(qh_tmp == qh) ++ dwc_otg_qh_t *qh_tmp; ++ dwc_list_link_t *qh_list; ++ DWC_LIST_FOREACH(qh_list, &hcd->non_periodic_sched_inactive) + { +- /* +- * FIQ is being disabled because this one nevers gets a np_count increment +- * This is still not absolutely correct, but it should fix itself with +- * just an unnecessary extra interrupt +- */ +- g_np_sent = g_np_count; ++ qh_tmp = DWC_LIST_ENTRY(qh_list, struct dwc_otg_qh, qh_list_entry); ++ if(qh_tmp == qh) ++ { ++ /* ++ * FIQ is being disabled because this one nevers gets a np_count increment ++ * This is still not absolutely correct, but it should fix itself with ++ * just an unnecessary extra interrupt ++ */ ++ g_np_sent = g_np_count; ++ } + } +- } + + + dwc_otg_hcd_qh_remove(hcd, qh); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.h 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_mphi_fix.h 2014-04-28 00:43:26.000000000 +0000 +@@ -1,10 +1,7 @@ + #ifndef __DWC_OTG_MPHI_FIX_H__ + #define __DWC_OTG_MPHI_FIX_H__ +- +-#define FIQ_WRITE_IO_ADDRESS(_addr_,_data_) *(volatile uint32_t *) IO_ADDRESS(_addr_) = _data_ +-#define FIQ_READ_IO_ADDRESS(_addr_) *(volatile uint32_t *) IO_ADDRESS(_addr_) +-#define FIQ_MODIFY_IO_ADDRESS(_addr_,_clear_,_set_) FIQ_WRITE_IO_ADDRESS(_addr_ , (FIQ_READ_IO_ADDRESS(_addr_)&~_clear_)|_set_) +-#define FIQ_WRITE(_addr_,_data_) *(volatile uint32_t *) _addr_ = _data_ ++#define FIQ_WRITE(_addr_,_data_) (*(volatile uint32_t *) (_addr_) = (_data_)) ++#define FIQ_READ(_addr_) (*(volatile uint32_t *) (_addr_)) + + typedef struct { + volatile void* base; +@@ -12,13 +9,13 @@ + volatile void* outdda; + volatile void* outddb; + volatile void* intstat; +-} mphi_regs_t; ++} mphi_regs_t; + + void dwc_debug_print_core_int_reg(gintsts_data_t gintsts, const char* function_name); + void dwc_debug_core_int_mask(gintsts_data_t gintmsk, const char* function_name); + void dwc_debug_otg_int(gotgint_data_t gotgint, const char* function_name); + +- ++extern gintsts_data_t gintsts_saved; + + #ifdef DEBUG + #define DWC_DBG_PRINT_CORE_INT(_arg_) dwc_debug_print_core_int_reg(_arg_,__func__) +@@ -30,7 +27,22 @@ + #define DWC_DBG_PRINT_CORE_INT_MASK(_arg_) + #define DWC_DBG_PRINT_OTG_INT(_arg_) + ++#endif + ++typedef enum { ++ FIQDBG_SCHED = (1 << 0), ++ FIQDBG_INT = (1 << 1), ++ FIQDBG_ERR = (1 << 2), ++ FIQDBG_PORTHUB = (1 << 3), ++} FIQDBG_T; ++ ++void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...); ++#ifdef FIQ_DEBUG ++#define fiq_print _fiq_print ++#else ++#define fiq_print(x, y, ...) + #endif + ++extern bool fiq_fix_enable, nak_holdoff_enable, fiq_split_enable; ++ + #endif +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_pcd_intr.c 2014-04-28 00:43:26.000000000 +0000 +@@ -4276,7 +4276,7 @@ + && (pcd->ep0state == EP0_OUT_DATA_PHASE)) + status.d32 = core_if->dev_if->out_desc_addr->status.d32; + if (pcd->ep0state == EP0_OUT_STATUS_PHASE) +- status.d32 = status.d32 = core_if->dev_if-> ++ status.d32 = core_if->dev_if-> + out_desc_addr->status.d32; + + if (status.b.sr) { +Index: linux-3.10-3.10.11/dummy/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1642_c033ecd660e08776a2bdd1b72eef166ee2cecf75.txt 2014-04-28 00:43:26.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.patch --- linux-3.10.11/debian/patches/rpi/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.patch 2014-04-28 00:43:28.000000000 +0000 @@ -0,0 +1,70 @@ +commit 86e8d677baae77a45a6cc491ce8927561e134b85 +Author: popcornmix +Date: Wed Jul 3 11:39:46 2013 +0100 + + dwc_otg: fix device attributes and avoid kernel warnings on boot + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_attr.c 2014-04-28 00:42:06.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c 2014-04-28 00:43:27.000000000 +0000 +@@ -909,7 +909,7 @@ + return sprintf(buf, "Register Dump\n"); + } + +-DEVICE_ATTR(regdump, S_IRUGO | S_IWUSR, regdump_show, 0); ++DEVICE_ATTR(regdump, S_IRUGO, regdump_show, 0); + + /** + * Dump global registers and either host or device registers (depending on the +@@ -925,7 +925,7 @@ + return sprintf(buf, "SPRAM Dump\n"); + } + +-DEVICE_ATTR(spramdump, S_IRUGO | S_IWUSR, spramdump_show, 0); ++DEVICE_ATTR(spramdump, S_IRUGO, spramdump_show, 0); + + /** + * Dump the current hcd state. +@@ -940,7 +940,7 @@ + return sprintf(buf, "HCD Dump\n"); + } + +-DEVICE_ATTR(hcddump, S_IRUGO | S_IWUSR, hcddump_show, 0); ++DEVICE_ATTR(hcddump, S_IRUGO, hcddump_show, 0); + + /** + * Dump the average frame remaining at SOF. This can be used to +@@ -958,7 +958,7 @@ + return sprintf(buf, "HCD Dump Frame Remaining\n"); + } + +-DEVICE_ATTR(hcd_frrem, S_IRUGO | S_IWUSR, hcd_frrem_show, 0); ++DEVICE_ATTR(hcd_frrem, S_IRUGO, hcd_frrem_show, 0); + + /** + * Displays the time required to read the GNPTXFSIZ register many times (the +@@ -986,7 +986,7 @@ + RW_REG_COUNT, time * MSEC_PER_JIFFIE, time); + } + +-DEVICE_ATTR(rd_reg_test, S_IRUGO | S_IWUSR, rd_reg_test_show, 0); ++DEVICE_ATTR(rd_reg_test, S_IRUGO, rd_reg_test_show, 0); + + /** + * Displays the time required to write the GNPTXFSIZ register many times (the +@@ -1014,7 +1014,7 @@ + RW_REG_COUNT, time * MSEC_PER_JIFFIE, time); + } + +-DEVICE_ATTR(wr_reg_test, S_IRUGO | S_IWUSR, wr_reg_test_show, 0); ++DEVICE_ATTR(wr_reg_test, S_IRUGO, wr_reg_test_show, 0); + + #ifdef CONFIG_USB_DWC_OTG_LPM + +Index: linux-3.10-3.10.11/dummy/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1643_86e8d677baae77a45a6cc491ce8927561e134b85.txt 2014-04-28 00:43:27.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.patch --- linux-3.10.11/debian/patches/rpi/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.patch 2014-04-28 00:43:29.000000000 +0000 @@ -0,0 +1,25 @@ +commit ac04ff8fad23b4d173a669cc4dd15274f64115a8 +Author: popcornmix +Date: Wed Jul 3 13:55:00 2013 +0100 + + hack: fix for incorrect uart fifo size detection + +Index: linux-3.10-3.10.11/drivers/tty/serial/amba-pl011.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/tty/serial/amba-pl011.c 2014-04-27 23:36:55.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/tty/serial/amba-pl011.c 2014-04-28 00:43:28.000000000 +0000 +@@ -84,7 +84,7 @@ + + static unsigned int get_fifosize_arm(unsigned int periphid) + { +- unsigned int rev = (periphid >> 20) & 0xf; ++ unsigned int rev = 0; //(periphid >> 20) & 0xf; + return rev < 3 ? 16 : 32; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1644_ac04ff8fad23b4d173a669cc4dd15274f64115a8.txt 2014-04-28 00:43:28.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.patch --- linux-3.10.11/debian/patches/rpi/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.patch 2014-04-28 00:43:29.000000000 +0000 @@ -0,0 +1,43 @@ +commit fab230444978c855714d72ec22914fd6ae5bb20b +Author: Jonathan Bensen +Date: Mon Jul 8 09:49:56 2013 -0700 + + Fix for deprecated/undefined create_proc_entry in RTL8192cu driver + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c 2014-04-28 00:42:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/os_dep/linux/os_intfs.c 2014-04-28 00:43:29.000000000 +0000 +@@ -255,6 +255,18 @@ + static struct proc_dir_entry *rtw_proc = NULL; + static int rtw_proc_cnt = 0; + ++#ifndef create_proc_entry ++/* dummy routines */ ++void rtw_proc_remove_one(struct net_device *dev) ++{ ++} ++ ++void rtw_proc_init_one(struct net_device *dev) ++{ ++} ++ ++#else /* create_proc_entry not defined */ ++ + void rtw_proc_init_one(struct net_device *dev) + { + struct proc_dir_entry *dir_dev = NULL; +@@ -525,6 +537,7 @@ + } + } + #endif ++#endif + + uint loadparam( _adapter *padapter, _nic_hdl pnetdev) + { +Index: linux-3.10-3.10.11/dummy/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1645_fab230444978c855714d72ec22914fd6ae5bb20b.txt 2014-04-28 00:43:29.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.patch --- linux-3.10.11/debian/patches/rpi/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.patch 2014-04-28 00:43:30.000000000 +0000 @@ -0,0 +1,29 @@ +commit 53011c10f7477d80dbae40b1be6dfad150e6c7eb +Author: popcornmix +Date: Wed Jul 10 23:53:31 2013 +0100 + + sdhci-bcm2807: Increase sync_after_dma timeout + + The current timeout is being hit with some cards that complete successfully with a longer timeout. + The timeout is not handled well, and is believed to be a code path that causes corruption. + 872a8ff suggests that crappy cards can take up to 3 seconds to respond + +Index: linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:43:19.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/mmc/host/sdhci-bcm2708.c 2014-04-28 00:43:30.000000000 +0000 +@@ -842,7 +842,7 @@ + We get CRC and DEND errors unless we wait for + the SD controller to finish reading/writing to the card. */ + u32 state_mask; +- int timeout=30*5000; ++ int timeout=3*1000*1000; + + DBG("PDMA over - sync card\n"); + if (data->flags & MMC_DATA_READ) +Index: linux-3.10-3.10.11/dummy/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1646_53011c10f7477d80dbae40b1be6dfad150e6c7eb.txt 2014-04-28 00:43:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.patch 2014-04-28 00:43:31.000000000 +0000 @@ -0,0 +1,28 @@ +commit b78d6b0c22e37b261d97bb85355c25212900472a +Author: popcornmix +Date: Mon Jul 15 23:55:52 2013 +0100 + + dcw_otg: avoid logging function that can cause panics + + See: https://github.com/raspberrypi/firmware/issues/21 + Thanks to cleverca22 for fix + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_attr.c 2014-04-28 00:43:27.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_attr.c 2014-04-28 00:43:30.000000000 +0000 +@@ -920,7 +920,7 @@ + { + dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev); + +- dwc_otg_dump_spram(otg_dev->core_if); ++ //dwc_otg_dump_spram(otg_dev->core_if); + + return sprintf(buf, "SPRAM Dump\n"); + } +Index: linux-3.10-3.10.11/dummy/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1647_b78d6b0c22e37b261d97bb85355c25212900472a.txt 2014-04-28 00:43:30.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.patch --- linux-3.10.11/debian/patches/rpi/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.patch 2014-04-28 00:43:31.000000000 +0000 @@ -0,0 +1,69 @@ +commit 4b7a326bf945f1a53acdc63a687bc0bd3c08cc32 +Author: P33M +Date: Sat Jul 13 20:41:26 2013 +0100 + + dwc_otg: mask correct interrupts after transaction error recovery + + The dwc_otg driver will unmask certain interrupts on a transaction + that previously halted in the error state in order to reset the + QTD error count. The various fine-grained interrupt handlers do not + consider that other interrupts besides themselves were unmasked. + + By disabling the two other interrupts only ever enabled in DMA mode + for this purpose, we can avoid unnecessary function calls in the + IRQ handler. This will also prevent an unneccesary FIQ interrupt + from being generated if the FIQ is enabled. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:31.000000000 +0000 +@@ -1851,7 +1851,11 @@ + * transfers in DMA mode for the sole purpose of + * resetting the error count after a transaction error + * occurs. The core will continue transferring data. ++ * Disable other interrupts unmasked for the same ++ * reason. + */ ++ disable_hc_int(hc_regs, datatglerr); ++ disable_hc_int(hc_regs, ack); + qtd->error_count = 0; + goto handle_nak_done; + } +@@ -1963,6 +1967,15 @@ + halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_ACK); + } + } else { ++ /* ++ * An unmasked ACK on a non-split DMA transaction is ++ * for the sole purpose of resetting error counts. Disable other ++ * interrupts unmasked for the same reason. ++ */ ++ if(hcd->core_if->dma_enable) { ++ disable_hc_int(hc_regs, datatglerr); ++ disable_hc_int(hc_regs, nak); ++ } + qtd->error_count = 0; + + if (hc->qh->ping_state) { +@@ -2328,6 +2341,14 @@ + qtd->urb, qtd, DWC_OTG_HC_XFER_XACT_ERR); + halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); + } else if (hc->ep_is_in) { ++ /* An unmasked data toggle error on a non-split DMA transaction is ++ * for the sole purpose of resetting error counts. Disable other ++ * interrupts unmasked for the same reason. ++ */ ++ if(hcd->core_if->dma_enable) { ++ disable_hc_int(hc_regs, ack); ++ disable_hc_int(hc_regs, nak); ++ } + qtd->error_count = 0; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1648_4b7a326bf945f1a53acdc63a687bc0bd3c08cc32.txt 2014-04-28 00:43:31.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.patch --- linux-3.10.11/debian/patches/rpi/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.patch 2014-04-28 00:43:32.000000000 +0000 @@ -0,0 +1,59 @@ +commit 7a6c7797d2c83808199eaf6df48ce5367d126a1a +Author: P33M +Date: Sat Jul 13 21:48:41 2013 +0100 + + dwc_otg: fiq: prevent FIQ thrash and incorrect state passing to IRQ + + In the case of a transaction to a device that had previously aborted + due to an error, several interrupts are enabled to reset the error + count when a device responds. This has the side-effect of making the + FIQ thrash because the hardware will generate multiple instances of + a NAK on an IN bulk/interrupt endpoint and multiple instances of ACK + on an OUT bulk/interrupt endpoint. Make the FIQ mask and clear the + associated interrupts. + + Additionally, on non-split transactions make sure that only unmasked + interrupts are cleared. This caused a hard-to-trigger but serious + race condition when you had the combination of an endpoint awaiting + error recovery and a transaction completed on an endpoint - due to + the sequencing and timing of interrupts generated by the dwc_otg core, + it was possible to confuse the IRQ handler. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:31.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:32.000000000 +0000 +@@ -324,6 +324,27 @@ + } + } + } ++ else ++ { ++ /* ++ * If we have any of NAK, ACK, Datatlgerr active on a ++ * non-split channel, the sole reason is to reset error ++ * counts for a previously broken transaction. The FIQ ++ * will thrash on NAK IN and ACK OUT in particular so ++ * handle it "once" and allow the IRQ to do the rest. ++ */ ++ hcint.d32 &= hcintmsk.d32; ++ if(hcint.b.nak) ++ { ++ hcintmsk.b.nak = 0; ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0xc), hcintmsk.d32); ++ } ++ if (hcint.b.ack) ++ { ++ hcintmsk.b.ack = 0; ++ FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0xc), hcintmsk.d32); ++ } ++ } + + // Clear the interrupt, this will also clear the HAINT bit + FIQ_WRITE((dwc_regs_base + 0x500 + (channel * 0x20) + 0x8), hcint.d32); +Index: linux-3.10-3.10.11/dummy/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1649_7a6c7797d2c83808199eaf6df48ce5367d126a1a.txt 2014-04-28 00:43:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.patch --- linux-3.10.11/debian/patches/rpi/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.patch 2014-04-28 00:43:33.000000000 +0000 @@ -0,0 +1,67 @@ +commit b37d750ea3959712cafb9302372661a7a5bd8186 +Author: Gordon Hollingworth +Date: Mon Jul 8 04:12:19 2013 +0100 + + Fix function tracing + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:32.000000000 +0000 +@@ -77,7 +77,7 @@ + #ifdef FIQ_DEBUG + char buffer[1000*16]; + int wptr; +-void _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...) ++void notrace _fiq_print(FIQDBG_T dbg_lvl, char *fmt, ...) + { + FIQDBG_T dbg_lvl_req = FIQDBG_PORTHUB; + va_list args; +@@ -101,7 +101,7 @@ + } + #endif + +-void fiq_queue_request(int channel, int odd_frame) ++void notrace fiq_queue_request(int channel, int odd_frame) + { + hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) }; + hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) }; +@@ -147,7 +147,7 @@ + */ + int diff; + +-int fiq_sof_handle(hfnum_data_t hfnum) ++int notrace fiq_sof_handle(hfnum_data_t hfnum) + { + int handled = 0; + int i; +@@ -206,12 +206,12 @@ + return handled; + } + +-int port_id(hcsplt_data_t hcsplt) ++int notrace port_id(hcsplt_data_t hcsplt) + { + return hcsplt.b.prtaddr + (hcsplt.b.hubaddr << 8); + } + +-int fiq_hcintr_handle(int channel, hfnum_data_t hfnum) ++int notrace fiq_hcintr_handle(int channel, hfnum_data_t hfnum) + { + hcchar_data_t hcchar = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x0) }; + hcsplt_data_t hcsplt = { .d32 = FIQ_READ(dwc_regs_base + 0x500 + (channel * 0x20) + 0x4) }; +@@ -361,7 +361,7 @@ + gintsts_data_t triggered, handled, keep; + hfnum_data_t hfnum; + +-void __attribute__ ((naked)) dwc_otg_hcd_handle_fiq(void) ++void __attribute__ ((naked)) notrace dwc_otg_hcd_handle_fiq(void) + { + + /* entry takes care to store registers we will be treading on here */ +Index: linux-3.10-3.10.11/dummy/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1650_b37d750ea3959712cafb9302372661a7a5bd8186.txt 2014-04-28 00:43:32.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.patch --- linux-3.10.11/debian/patches/rpi/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.patch 2014-04-28 00:43:34.000000000 +0000 @@ -0,0 +1,93 @@ +commit 8847e6bbe4fc6d862ae29b39df4dd956008edae2 +Author: P33M +Date: Thu Jul 18 16:32:41 2013 +0100 + + dwc_otg: whitespace cleanup in dwc_otg_urb_enqueue + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:33.000000000 +0000 +@@ -733,10 +733,10 @@ + if(dwc_otg_urb == NULL) + return -ENOMEM; + +- urb->hcpriv = dwc_otg_urb; +- if (!dwc_otg_urb && urb->number_of_packets) +- return -ENOMEM; +- ++ urb->hcpriv = dwc_otg_urb; ++ if (!dwc_otg_urb && urb->number_of_packets) ++ return -ENOMEM; ++ + dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_urb, usb_pipedevice(urb->pipe), + usb_pipeendpoint(urb->pipe), ep_type, + usb_pipein(urb->pipe), +@@ -776,36 +776,35 @@ + } + + #if USB_URB_EP_LINKING +- DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); + retval = usb_hcd_link_urb_to_ep(hcd, urb); +- DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); +- if (0 == retval) ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); ++ if (0 == retval) + #endif +- { +- retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, +- /*(dwc_otg_qh_t **)*/ +- ref_ep_hcpriv, +- mem_flags == GFP_ATOMIC ? 1 : 0); +- if (0 == retval) { +- if (alloc_bandwidth) { +- allocate_bus_bandwidth(hcd, +- dwc_otg_hcd_get_ep_bandwidth( +- dwc_otg_hcd, *ref_ep_hcpriv), +- urb); +- } +- } else { ++ { ++ retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, ++ /*(dwc_otg_qh_t **)*/ ++ ref_ep_hcpriv, ++ mem_flags == GFP_ATOMIC ? 1 : 0); ++ if (0 == retval) { ++ if (alloc_bandwidth) { ++ allocate_bus_bandwidth(hcd, ++ dwc_otg_hcd_get_ep_bandwidth( ++ dwc_otg_hcd, *ref_ep_hcpriv), ++ urb); ++ } ++ } else { + #if USB_URB_EP_LINKING +- dwc_irqflags_t irqflags; +- DWC_DEBUGPL(DBG_HCD, "DWC OTG dwc_otg_hcd_urb_enqueue failed rc %d\n", retval); +- DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); +- usb_hcd_unlink_urb_from_ep(hcd, urb); +- DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); ++ dwc_irqflags_t irqflags; ++ DWC_DEBUGPL(DBG_HCD, "DWC OTG dwc_otg_hcd_urb_enqueue failed rc %d\n", retval); ++ DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++ usb_hcd_unlink_urb_from_ep(hcd, urb); ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); + #endif +- if (retval == -DWC_E_NO_DEVICE) { +- retval = -ENODEV; +- } +- } +- } ++ if (retval == -DWC_E_NO_DEVICE) ++ retval = -ENODEV; ++ } ++ } + return retval; + } + +Index: linux-3.10-3.10.11/dummy/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1651_8847e6bbe4fc6d862ae29b39df4dd956008edae2.txt 2014-04-28 00:43:33.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.patch --- linux-3.10.11/debian/patches/rpi/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.patch 2014-04-28 00:43:34.000000000 +0000 @@ -0,0 +1,142 @@ +commit 38753ce72d4f10d5d0f1ed27fa691a2ba8910941 +Author: P33M +Date: Thu Jul 18 17:07:26 2013 +0100 + + dwc_otg: prevent OOPSes during device disconnects + + The dwc_otg_urb_enqueue function is thread-unsafe. In particular the + access of urb->hcpriv, usb_hcd_link_urb_to_ep, dwc_otg_urb->qtd and + friends does not occur within a critical section and so if a device + was unplugged during activity there was a high chance that the + usbcore hub_thread would try to disable the endpoint with partially- + formed entries in the URB queue. This would result in BUG() or null + pointer dereferences. + + Fix so that access of urb->hcpriv, enqueuing to the hardware and + adding to usbcore endpoint URB lists is contained within a single + critical section. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:34.000000000 +0000 +@@ -464,7 +464,6 @@ + dwc_otg_hcd_urb_t * dwc_otg_urb, void **ep_handle, + int atomic_alloc) + { +- dwc_irqflags_t flags; + int retval = 0; + uint8_t needs_scheduling = 0; + dwc_otg_transaction_type_e tr_type; +@@ -515,12 +514,10 @@ + } + + if(needs_scheduling) { +- DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); + tr_type = dwc_otg_hcd_select_transactions(hcd); + if (tr_type != DWC_OTG_TRANSACTION_NONE) { + dwc_otg_hcd_queue_transactions(hcd, tr_type); + } +- DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); + } + return retval; + } +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:33.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:34.000000000 +0000 +@@ -679,9 +679,7 @@ + #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28) + struct usb_host_endpoint *ep = urb->ep; + #endif +-#if USB_URB_EP_LINKING + dwc_irqflags_t irqflags; +-#endif + void **ref_ep_hcpriv = &ep->hcpriv; + dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd); + dwc_otg_hcd_urb_t *dwc_otg_urb; +@@ -733,7 +731,6 @@ + if(dwc_otg_urb == NULL) + return -ENOMEM; + +- urb->hcpriv = dwc_otg_urb; + if (!dwc_otg_urb && urb->number_of_packets) + return -ENOMEM; + +@@ -775,10 +772,10 @@ + iso_frame_desc[i].length); + } + +-#if USB_URB_EP_LINKING + DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++ urb->hcpriv = dwc_otg_urb; ++#if USB_URB_EP_LINKING + retval = usb_hcd_link_urb_to_ep(hcd, urb); +- DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); + if (0 == retval) + #endif + { +@@ -794,17 +791,16 @@ + urb); + } + } else { +-#if USB_URB_EP_LINKING +- dwc_irqflags_t irqflags; + DWC_DEBUGPL(DBG_HCD, "DWC OTG dwc_otg_hcd_urb_enqueue failed rc %d\n", retval); +- DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &irqflags); ++#if USB_URB_EP_LINKING + usb_hcd_unlink_urb_from_ep(hcd, urb); +- DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); + #endif ++ urb->hcpriv = NULL; + if (retval == -DWC_E_NO_DEVICE) + retval = -ENODEV; + } + } ++ DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); + return retval; + } + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_queue.c 2014-04-28 00:43:34.000000000 +0000 +@@ -919,6 +919,7 @@ + * QH to place the QTD into. If it does not find a QH, then it will create a + * new QH. If the QH to which the QTD is added is not currently scheduled, it + * is placed into the proper schedule based on its EP type. ++ * HCD lock must be held and interrupts must be disabled on entry + * + * @param[in] qtd The QTD to add + * @param[in] hcd The DWC HCD structure +@@ -931,8 +932,6 @@ + dwc_otg_hcd_t * hcd, dwc_otg_qh_t ** qh, int atomic_alloc) + { + int retval = 0; +- dwc_irqflags_t flags; +- + dwc_otg_hcd_urb_t *urb = qtd->urb; + + /* +@@ -946,15 +945,12 @@ + goto done; + } + } +- DWC_SPINLOCK_IRQSAVE(hcd->lock, &flags); + retval = dwc_otg_hcd_qh_add(hcd, *qh); + if (retval == 0) { + DWC_CIRCLEQ_INSERT_TAIL(&((*qh)->qtd_list), qtd, + qtd_list_entry); + qtd->qh = *qh; + } +- DWC_SPINUNLOCK_IRQRESTORE(hcd->lock, flags); +- + done: + + return retval; +Index: linux-3.10-3.10.11/dummy/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1652_38753ce72d4f10d5d0f1ed27fa691a2ba8910941.txt 2014-04-28 00:43:34.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.patch --- linux-3.10.11/debian/patches/rpi/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.patch 2014-04-28 00:43:35.000000000 +0000 @@ -0,0 +1,90 @@ +commit 1dd563aff4b4740f2999447c545aaee1720d8844 +Author: P33M +Date: Mon Jul 22 14:08:26 2013 +0100 + + dwc_otg: prevent BUG() in TT allocation if hub address is > 16 + + A fixed-size array is used to track TT allocation. This was + previously set to 16 which caused a crash because + dwc_otg_hcd_allocate_port would read past the end of the array. + + This was hit if a hub was plugged in which enumerated as addr > 16, + due to previous device resets or unplugs. + + Also add #ifdef FIQ_DEBUG around hcd->hub_port_alloc[], which grows + to a large size if 128 hub addresses are supported. This field is + for debug only for tracking which frame an allocate happened in. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:35.000000000 +0000 +@@ -983,7 +983,9 @@ + hcd->periodic_qh_count = 0; + + DWC_MEMSET(hcd->hub_port, 0, sizeof(hcd->hub_port)); ++#ifdef FIQ_DEBUG + DWC_MEMSET(hcd->hub_port_alloc, -1, sizeof(hcd->hub_port_alloc)); ++#endif + + out: + return retval; +@@ -1317,7 +1319,9 @@ + qh->skip_count = 0; + hcd->hub_port[hub_addr] |= 1 << port_addr; + fiq_print(FIQDBG_PORTHUB, "H%dP%d:A %d", hub_addr, port_addr, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->pipe_info.ep_num); ++#ifdef FIQ_DEBUG + hcd->hub_port_alloc[hub_addr * 16 + port_addr] = dwc_otg_hcd_get_frame_number(hcd); ++#endif + return 0; + } + } +@@ -1331,8 +1335,9 @@ + hcd->fops->hub_info(hcd, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->priv, &hub_addr, &port_addr); + + hcd->hub_port[hub_addr] &= ~(1 << port_addr); ++#ifdef FIQ_DEBUG + hcd->hub_port_alloc[hub_addr * 16 + port_addr] = -1; +- ++#endif + fiq_print(FIQDBG_PORTHUB, "H%dP%d:RO%d", hub_addr, port_addr, DWC_CIRCLEQ_FIRST(&qh->qtd_list)->urb->pipe_info.ep_num); + + } +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.h 2014-04-28 00:43:35.000000000 +0000 +@@ -577,8 +577,10 @@ + uint32_t *frame_list; + + /** Hub - Port assignment */ +- int hub_port[16]; +- int hub_port_alloc[256]; ++ int hub_port[128]; ++#ifdef FIQ_DEBUG ++ int hub_port_alloc[2048]; ++#endif + + /** Frame List DMA address */ + dma_addr_t frame_list_dma; +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:32.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:35.000000000 +0000 +@@ -1419,8 +1419,9 @@ + } + + hcd->hub_port[hc->hub_addr] &= ~(1 << hc->port_addr); ++#ifdef FIQ_DEBUG + hcd->hub_port_alloc[hc->hub_addr * 16 + hc->port_addr] = -1; +- ++#endif + fiq_print(FIQDBG_PORTHUB, "H%dP%d:RR%d", hc->hub_addr, hc->port_addr, endp); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1653_1dd563aff4b4740f2999447c545aaee1720d8844.txt 2014-04-28 00:43:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.patch --- linux-3.10.11/debian/patches/rpi/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.patch 2014-04-28 00:43:36.000000000 +0000 @@ -0,0 +1,47 @@ +commit 665e5df8c7f88f04e76caa71d92654edfcc99492 +Author: P33M +Date: Tue Jul 23 14:15:32 2013 +0100 + + dwc_otg: make channel halts with unknown state less damaging + + If the IRQ received a channel halt interrupt through the FIQ + with no other bits set, the IRQ would not release the host + channel and never complete the URB. + + Add catchall handling to treat as a transaction error and retry. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:35.000000000 +0000 +@@ -2578,12 +2578,24 @@ + DWC_READ_REG32(&hcd-> + core_if->core_global_regs-> + gintsts)); ++ /* Failthrough: use 3-strikes rule */ ++ qtd->error_count++; ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ update_urb_state_xfer_intr(hc, hc_regs, ++ qtd->urb, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); + } + + } + } else { + DWC_PRINTF("NYET/NAK/ACK/other in non-error case, 0x%08x\n", + hcint.d32); ++ /* Failthrough: use 3-strikes rule */ ++ qtd->error_count++; ++ dwc_otg_hcd_save_data_toggle(hc, hc_regs, qtd); ++ update_urb_state_xfer_intr(hc, hc_regs, ++ qtd->urb, qtd, DWC_OTG_HC_XFER_XACT_ERR); ++ halt_channel(hcd, hc, qtd, DWC_OTG_HC_XFER_XACT_ERR); + } + } + +Index: linux-3.10-3.10.11/dummy/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1654_665e5df8c7f88f04e76caa71d92654edfcc99492.txt 2014-04-28 00:43:35.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.patch --- linux-3.10.11/debian/patches/rpi/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.patch 2014-04-28 00:43:37.000000000 +0000 @@ -0,0 +1,122 @@ +commit 3cdf1108ca4ce83737dbadd774023650218914c6 +Author: P33M +Date: Tue Jul 30 09:58:48 2013 +0100 + + dwc_otg: fiq_split: use TTs with more granularity + + This fixes certain issues with split transaction scheduling. + + - Isochronous multi-packet OUT transactions now hog the TT until + they are completed - this prevents hubs aborting transactions + if they get a periodic start-split out-of-order + - Don't perform TT allocation on non-periodic endpoints - this + allows simultaneous use of the TT's bulk/control and periodic + transaction buffers + + This commit will mainly affect USB audio playback. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:36.000000000 +0000 +@@ -1356,6 +1356,7 @@ + { + dwc_list_link_t *qh_ptr; + dwc_otg_qh_t *qh; ++ dwc_otg_qtd_t *qtd; + int num_channels; + dwc_irqflags_t flags; + dwc_spinlock_t *channel_lock = hcd->channel_lock; +@@ -1379,11 +1380,18 @@ + + qh = DWC_LIST_ENTRY(qh_ptr, dwc_otg_qh_t, qh_list_entry); + +- if(qh->do_split && dwc_otg_hcd_allocate_port(hcd, qh)) +- { +- qh_ptr = DWC_LIST_NEXT(qh_ptr); +- g_next_sched_frame = dwc_frame_num_inc(dwc_otg_hcd_get_frame_number(hcd), 1); +- continue; ++ if(qh->do_split) { ++ qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); ++ if(!(qh->ep_type == UE_ISOCHRONOUS && ++ (qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_MID || ++ qtd->isoc_split_pos == DWC_HCSPLIT_XACTPOS_END))) { ++ if(dwc_otg_hcd_allocate_port(hcd, qh)) ++ { ++ qh_ptr = DWC_LIST_NEXT(qh_ptr); ++ g_next_sched_frame = dwc_frame_num_inc(dwc_otg_hcd_get_frame_number(hcd), 1); ++ continue; ++ } ++ } + } + + if (microframe_schedule) { +@@ -1451,18 +1459,10 @@ + } + } + +- if (qh->do_split && dwc_otg_hcd_allocate_port(hcd, qh)) +- { +- g_next_sched_frame = dwc_frame_num_inc(dwc_otg_hcd_get_frame_number(hcd), 1); +- qh_ptr = DWC_LIST_NEXT(qh_ptr); +- continue; +- } +- + if (microframe_schedule) { + DWC_SPINLOCK_IRQSAVE(channel_lock, &flags); + if (hcd->available_host_channels < 1) { + DWC_SPINUNLOCK_IRQRESTORE(channel_lock, flags); +- if(qh->do_split) dwc_otg_hcd_release_port(hcd, qh); + break; + } + hcd->available_host_channels--; +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:35.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:36.000000000 +0000 +@@ -1328,10 +1328,20 @@ + #ifdef FIQ_DEBUG + int endp = qtd->urb ? qtd->urb->pipe_info.ep_num : 0; + #endif ++ int hog_port = 0; + + DWC_DEBUGPL(DBG_HCDV, " %s: channel %d, halt_status %d, xfer_len %d\n", + __func__, hc->hc_num, halt_status, hc->xfer_len); + ++ if(fiq_split_enable && hc->do_split) { ++ if(!hc->ep_is_in && hc->ep_type == UE_ISOCHRONOUS) { ++ if(hc->xact_pos == DWC_HCSPLIT_XACTPOS_MID || ++ hc->xact_pos == DWC_HCSPLIT_XACTPOS_BEGIN) { ++ hog_port = 1; ++ } ++ } ++ } ++ + switch (halt_status) { + case DWC_OTG_HC_XFER_URB_COMPLETE: + free_qtd = 1; +@@ -1417,12 +1427,14 @@ + fiq_print(FIQDBG_ERR, "PRTNOTAL"); + //BUG(); + } +- +- hcd->hub_port[hc->hub_addr] &= ~(1 << hc->port_addr); ++ if(!hog_port && (hc->ep_type == DWC_OTG_EP_TYPE_ISOC || ++ hc->ep_type == DWC_OTG_EP_TYPE_INTR)) { ++ hcd->hub_port[hc->hub_addr] &= ~(1 << hc->port_addr); + #ifdef FIQ_DEBUG +- hcd->hub_port_alloc[hc->hub_addr * 16 + hc->port_addr] = -1; ++ hcd->hub_port_alloc[hc->hub_addr * 16 + hc->port_addr] = -1; + #endif +- fiq_print(FIQDBG_PORTHUB, "H%dP%d:RR%d", hc->hub_addr, hc->port_addr, endp); ++ fiq_print(FIQDBG_PORTHUB, "H%dP%d:RR%d", hc->hub_addr, hc->port_addr, endp); ++ } + } + + /* Try to queue more transfers now that there's a free channel. */ +Index: linux-3.10-3.10.11/dummy/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1655_3cdf1108ca4ce83737dbadd774023650218914c6.txt 2014-04-28 00:43:36.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.patch --- linux-3.10.11/debian/patches/rpi/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.patch 2014-04-28 00:43:37.000000000 +0000 @@ -0,0 +1,31 @@ +commit f63076e0daf170ca1ab08c99d189b2953c6a4d3f +Author: P33M +Date: Fri Aug 2 10:04:18 2013 +0100 + + dwc_otg: fix potential sleep while atomic during urb enqueue + + Fixes a regression introduced with eb1b482a. Kmalloc called from + dwc_otg_hcd_qtd_add / dwc_otg_hcd_qtd_create did not always have + the GPF_ATOMIC flag set. Force this flag when inside the larger + critical section. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:34.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:37.000000000 +0000 +@@ -781,8 +781,7 @@ + { + retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, + /*(dwc_otg_qh_t **)*/ +- ref_ep_hcpriv, +- mem_flags == GFP_ATOMIC ? 1 : 0); ++ ref_ep_hcpriv, 1); + if (0 == retval) { + if (alloc_bandwidth) { + allocate_bus_bandwidth(hcd, +Index: linux-3.10-3.10.11/dummy/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1656_f63076e0daf170ca1ab08c99d189b2953c6a4d3f.txt 2014-04-28 00:43:37.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1657_e36721d4652bf4330c46badb75236156812af919.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1657_e36721d4652bf4330c46badb75236156812af919.patch --- linux-3.10.11/debian/patches/rpi/rpi_1657_e36721d4652bf4330c46badb75236156812af919.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1657_e36721d4652bf4330c46badb75236156812af919.patch 2014-04-28 00:43:38.000000000 +0000 @@ -0,0 +1,32 @@ +commit e36721d4652bf4330c46badb75236156812af919 +Author: P33M +Date: Mon Aug 5 11:42:12 2013 +0100 + + dwc_otg: make fiq_split_enable imply fiq_fix_enable + + Failing to set up the FIQ correctly would result in + "IRQ 32: nobody cared" errors in dmesg. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:43:26.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_driver.c 2014-04-28 00:43:38.000000000 +0000 +@@ -1070,6 +1070,12 @@ + int retval = 0; + int error; + struct device_driver *drv; ++ ++ if(fiq_split_enable && !fiq_fix_enable) { ++ printk(KERN_WARNING "dwc_otg: fiq_split_enable was set without fiq_fix_enable! Correcting.\n"); ++ fiq_fix_enable = 1; ++ } ++ + printk(KERN_INFO "%s: version %s (%s bus)\n", dwc_driver_name, + DWC_DRIVER_VERSION, + #ifdef LM_INTERFACE +Index: linux-3.10-3.10.11/dummy/rpi_1657_e36721d4652bf4330c46badb75236156812af919.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1657_e36721d4652bf4330c46badb75236156812af919.txt 2014-04-28 00:43:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.patch --- linux-3.10.11/debian/patches/rpi/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.patch 2014-04-28 00:43:39.000000000 +0000 @@ -0,0 +1,159 @@ +commit 59be8006a1657e436f1091a7057f8b924fd32f54 +Author: P33M +Date: Mon Aug 5 11:47:12 2013 +0100 + + dwc_otg: prevent crashes on host port disconnects + + Fix several issues resulting in crashes or inconsistent state + if a Model A root port was disconnected. + + - Clean up queue heads properly in kill_urbs_in_qh_list by + removing the empty QHs from the schedule lists + - Set the halt status properly to prevent IRQ handlers from + using freed memory + - Add fiq_split related cleanup for saved registers + - Make microframe scheduling reclaim host channels if + active during a disconnect + - Abort URBs with -ESHUTDOWN status response, informing + device drivers so they respond in a more correct fashion + and don't try to resubmit URBs + - Prevent IRQ handlers from attempting to handle channel + interrupts if the associated URB was dequeued (and the + driver state was cleared) + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:36.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:38.000000000 +0000 +@@ -59,6 +59,11 @@ + + extern int g_next_sched_frame, g_np_count, g_np_sent; + ++extern haint_data_t haint_saved; ++extern hcintmsk_data_t hcintmsk_saved[MAX_EPS_CHANNELS]; ++extern hcint_data_t hcint_saved[MAX_EPS_CHANNELS]; ++extern gintsts_data_t ginsts_saved; ++ + dwc_otg_hcd_t *dwc_otg_hcd_alloc_hcd(void) + { + return DWC_ALLOC(sizeof(dwc_otg_hcd_t)); +@@ -168,31 +173,43 @@ + + /** + * Processes all the URBs in a single list of QHs. Completes them with +- * -ETIMEDOUT and frees the QTD. ++ * -ESHUTDOWN and frees the QTD. + */ + static void kill_urbs_in_qh_list(dwc_otg_hcd_t * hcd, dwc_list_link_t * qh_list) + { +- dwc_list_link_t *qh_item; ++ dwc_list_link_t *qh_item, *qh_tmp; + dwc_otg_qh_t *qh; + dwc_otg_qtd_t *qtd, *qtd_tmp; + +- DWC_LIST_FOREACH(qh_item, qh_list) { ++ DWC_LIST_FOREACH_SAFE(qh_item, qh_tmp, qh_list) { + qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry); + DWC_CIRCLEQ_FOREACH_SAFE(qtd, qtd_tmp, + &qh->qtd_list, qtd_list_entry) { + qtd = DWC_CIRCLEQ_FIRST(&qh->qtd_list); + if (qtd->urb != NULL) { + hcd->fops->complete(hcd, qtd->urb->priv, +- qtd->urb, -DWC_E_TIMEOUT); ++ qtd->urb, -DWC_E_SHUTDOWN); + dwc_otg_hcd_qtd_remove_and_free(hcd, qtd, qh); + } + + } ++ if(qh->channel) { ++ /* Using hcchar.chen == 1 is not a reliable test. ++ * It is possible that the channel has already halted ++ * but not yet been through the IRQ handler. ++ */ ++ dwc_otg_hc_halt(hcd->core_if, qh->channel, ++ DWC_OTG_HC_XFER_URB_DEQUEUE); ++ if(microframe_schedule) ++ hcd->available_host_channels++; ++ qh->channel = NULL; ++ } ++ dwc_otg_hcd_qh_remove(hcd, qh); + } + } + + /** +- * Responds with an error status of ETIMEDOUT to all URBs in the non-periodic ++ * Responds with an error status of ESHUTDOWN to all URBs in the non-periodic + * and periodic schedules. The QTD associated with each URB is removed from + * the schedule and freed. This function may be called when a disconnect is + * detected or when the HCD is being stopped. +@@ -278,7 +295,8 @@ + */ + dwc_otg_hcd->flags.b.port_connect_status_change = 1; + dwc_otg_hcd->flags.b.port_connect_status = 0; +- ++ if(fiq_fix_enable) ++ local_fiq_disable(); + /* + * Shutdown any transfers in process by clearing the Tx FIFO Empty + * interrupt mask and status bits and disabling subsequent host +@@ -374,8 +392,22 @@ + channel->qh = NULL; + } + } ++ if(fiq_split_enable) { ++ for(i=0; i < 128; i++) { ++ dwc_otg_hcd->hub_port[i] = 0; ++ } ++ haint_saved.d32 = 0; ++ for(i=0; i < MAX_EPS_CHANNELS; i++) { ++ hcint_saved[i].d32 = 0; ++ hcintmsk_saved[i].d32 = 0; ++ } ++ } ++ + } + ++ if(fiq_fix_enable) ++ local_fiq_enable(); ++ + if (dwc_otg_hcd->fops->disconnect) { + dwc_otg_hcd->fops->disconnect(dwc_otg_hcd); + } +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:36.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:38.000000000 +0000 +@@ -2660,6 +2660,13 @@ + + hc = dwc_otg_hcd->hc_ptr_array[num]; + hc_regs = dwc_otg_hcd->core_if->host_if->hc_regs[num]; ++ if(hc->halt_status == DWC_OTG_HC_XFER_URB_DEQUEUE) { ++ /* We are responding to a channel disable. Driver ++ * state is cleared - our qtd has gone away. ++ */ ++ release_channel(dwc_otg_hcd, hc, NULL, hc->halt_status); ++ return 1; ++ } + qtd = DWC_CIRCLEQ_FIRST(&hc->qh->qtd_list); + + hcint.d32 = DWC_READ_REG32(&hc_regs->hcint); +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:38.000000000 +0000 +@@ -309,6 +309,9 @@ + case -DWC_E_OVERFLOW: + status = -EOVERFLOW; + break; ++ case -DWC_E_SHUTDOWN: ++ status = -ESHUTDOWN; ++ break; + default: + if (status) { + DWC_PRINTF("Uknown urb status %d\n", status); +Index: linux-3.10-3.10.11/dummy/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1658_59be8006a1657e436f1091a7057f8b924fd32f54.txt 2014-04-28 00:43:38.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.patch --- linux-3.10.11/debian/patches/rpi/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.patch 2014-04-28 00:43:40.000000000 +0000 @@ -0,0 +1,39 @@ +commit d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18 +Author: P33M +Date: Mon Aug 5 13:17:58 2013 +0100 + + dwc_otg: prevent leaking URBs during enqueue + + A dwc_otg_urb would get leaked if the HCD enqueue function + failed for any reason. Free the URB at the appropriate points. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c 2014-04-28 00:43:39.000000000 +0000 +@@ -797,11 +797,19 @@ + #if USB_URB_EP_LINKING + usb_hcd_unlink_urb_from_ep(hcd, urb); + #endif ++ DWC_FREE(dwc_otg_urb); + urb->hcpriv = NULL; + if (retval == -DWC_E_NO_DEVICE) + retval = -ENODEV; + } + } ++#if USB_URB_EP_LINKING ++ else ++ { ++ DWC_FREE(dwc_otg_urb); ++ urb->hcpriv = NULL; ++ } ++#endif + DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, irqflags); + return retval; + } +Index: linux-3.10-3.10.11/dummy/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1659_d4bcc8aabcdb460029cd1a2f9f9311f2a4e0ea18.txt 2014-04-28 00:43:39.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.patch --- linux-3.10.11/debian/patches/rpi/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.patch 2014-04-28 00:43:40.000000000 +0000 @@ -0,0 +1,57 @@ +commit f11b0cb4931ffec56a452e46ac13f81efcfb7863 +Author: Russell King +Date: Thu Aug 8 11:51:21 2013 +0100 + + ARM: Fix FIQ code on VIVT CPUs + + Aaro Koskinen reports the following oops: + Installing fiq handler from c001b110, length 0x164 + Unable to handle kernel paging request at virtual address ffff1224 + pgd = c0004000 + [ffff1224] *pgd=00000000, *pte=11fff0cb, *ppte=11fff00a + ... + [] (set_fiq_handler+0x0/0x6c) from [] (ams_delta_init_fiq+0xa8/0x160) + r6:00000164 r5:c001b110 r4:00000000 r3:fefecb4c + [] (ams_delta_init_fiq+0x0/0x160) from [] (ams_delta_init+0xd4/0x114) + r6:00000000 r5:fffece10 r4:c037a9e0 + [] (ams_delta_init+0x0/0x114) from [] (customize_machine+0x24/0x30) + + This is because the vectors page is now write-protected, and to change + code in there we must write to its original alias. Make that change, + and adjust the cache flushing such that the code will become visible + to the instruction stream on VIVT CPUs. + + Reported-by: Aaro Koskinen + Tested-by: Aaro Koskinen + Signed-off-by: Russell King + +Index: linux-3.10-3.10.11/arch/arm/kernel/fiq.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/fiq.c 2014-04-28 00:42:35.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/fiq.c 2014-04-28 00:43:40.000000000 +0000 +@@ -84,17 +84,13 @@ + + void set_fiq_handler(void *start, unsigned int length) + { +-#if defined(CONFIG_CPU_USE_DOMAINS) +- void *base = (void *)0xffff0000; +-#else + void *base = vectors_page; +-#endif + unsigned offset = FIQ_OFFSET; + + memcpy(base + offset, start, length); ++ if (!cache_is_vipt_nonaliasing()) ++ flush_icache_range(base + offset, offset + length); + flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); +- if (!vectors_high()) +- flush_icache_range(offset, offset + length); + } + + int claim_fiq(struct fiq_handler *f) +Index: linux-3.10-3.10.11/dummy/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1660_f11b0cb4931ffec56a452e46ac13f81efcfb7863.txt 2014-04-28 00:43:40.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.patch --- linux-3.10.11/debian/patches/rpi/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.patch 2014-04-28 00:43:41.000000000 +0000 @@ -0,0 +1,35 @@ +commit cd3842e8500681729d236313433297143bc6f1ff +Author: Fabio Estevam +Date: Fri Aug 16 12:55:56 2013 +0100 + + ARM: 7819/1: fiq: Cast the first argument of flush_icache_range() + + Commit 2ba85e7af4 (ARM: Fix FIQ code on VIVT CPUs) causes the following build warning: + + arch/arm/kernel/fiq.c:92:3: warning: passing argument 1 of 'cpu_cache.coherent_kern_range' makes integer from pointer without a cast [enabled by default] + + Cast it as '(unsigned long)base' to avoid the warning. + + Signed-off-by: Fabio Estevam + Signed-off-by: Russell King + +Index: linux-3.10-3.10.11/arch/arm/kernel/fiq.c +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/kernel/fiq.c 2014-04-28 00:43:40.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/kernel/fiq.c 2014-04-28 00:43:41.000000000 +0000 +@@ -89,7 +89,8 @@ + + memcpy(base + offset, start, length); + if (!cache_is_vipt_nonaliasing()) +- flush_icache_range(base + offset, offset + length); ++ flush_icache_range((unsigned long)base + offset, offset + ++ length); + flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length); + } + +Index: linux-3.10-3.10.11/dummy/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1661_cd3842e8500681729d236313433297143bc6f1ff.txt 2014-04-28 00:43:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.patch --- linux-3.10.11/debian/patches/rpi/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.patch 2014-04-28 00:43:42.000000000 +0000 @@ -0,0 +1,78 @@ +commit 6d3fe890e0de3400945e9e8f01bd8c078bc62abc +Author: popcornmix +Date: Sat Sep 7 19:07:33 2013 +0100 + + Support for cheap Ralink 3070 WiFi plug + + See: https://github.com/raspberrypi/linux/pull/321 + +Index: linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800.h +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rt2x00/rt2800.h 2014-04-27 23:36:49.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800.h 2014-04-28 00:43:41.000000000 +0000 +@@ -70,6 +70,7 @@ + #define RF3322 0x000c + #define RF3053 0x000d + #define RF5592 0x000f ++#define RF3070 0x3070 + #define RF3290 0x3290 + #define RF5360 0x5360 + #define RF5370 0x5370 +Index: linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-28 00:36:43.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rt2x00/rt2800lib.c 2014-04-28 00:43:41.000000000 +0000 +@@ -2599,6 +2599,7 @@ + break; + case RF5360: + case RF5370: ++ case RF3070: + case RF5372: + case RF5390: + case RF5392: +@@ -2615,6 +2616,7 @@ + rt2x00_rf(rt2x00dev, RF3322) || + rt2x00_rf(rt2x00dev, RF5360) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF3070) || + rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390) || + rt2x00_rf(rt2x00dev, RF5392)) { +@@ -3206,6 +3208,7 @@ + case RF3290: + case RF5360: + case RF5370: ++ case RF3070: + case RF5372: + case RF5390: + case RF5392: +@@ -5521,6 +5524,7 @@ + case RF3322: + case RF5360: + case RF5370: ++ case RF3070: + case RF5372: + case RF5390: + case RF5392: +@@ -5976,6 +5980,7 @@ + rt2x00_rf(rt2x00dev, RF3322) || + rt2x00_rf(rt2x00dev, RF5360) || + rt2x00_rf(rt2x00dev, RF5370) || ++ rt2x00_rf(rt2x00dev, RF3070) || + rt2x00_rf(rt2x00dev, RF5372) || + rt2x00_rf(rt2x00dev, RF5390) || + rt2x00_rf(rt2x00dev, RF5392)) { +@@ -6078,6 +6083,7 @@ + case RF3290: + case RF5360: + case RF5370: ++ case RF3070: + case RF5372: + case RF5390: + case RF5392: +Index: linux-3.10-3.10.11/dummy/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1662_6d3fe890e0de3400945e9e8f01bd8c078bc62abc.txt 2014-04-28 00:43:41.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.patch --- linux-3.10.11/debian/patches/rpi/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.patch 2014-04-28 00:43:43.000000000 +0000 @@ -0,0 +1,35 @@ +commit 747a619132d144e8d33961121c1ba7f685eff3e4 +Author: P33M +Date: Fri Sep 20 16:08:27 2013 +0100 + + dwc_otg: Enable NAK holdoff for control split transactions + + Certain low-speed devices take a very long time to complete a + data or status stage of a control transaction, producing NAK + responses until they complete internal processing - the USB2.0 + spec limit is up to 500mS. This causes the same type of interrupt + storm as seen with USB-serial dongles prior to c8edb238. + + In certain circumstances, usually while booting, this interrupt + storm could cause SD card timeouts. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:42.000000000 +0000 +@@ -1857,8 +1857,7 @@ + */ + switch(dwc_otg_hcd_get_pipe_type(&qtd->urb->pipe_info)) { + case UE_BULK: +- //case UE_INTERRUPT: +- //case UE_CONTROL: ++ case UE_CONTROL: + if (nak_holdoff_enable) + hc->qh->nak_frame = dwc_otg_hcd_get_frame_number(hcd); + } +Index: linux-3.10-3.10.11/dummy/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1663_747a619132d144e8d33961121c1ba7f685eff3e4.txt 2014-04-28 00:43:42.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.patch 2014-04-28 00:43:44.000000000 +0000 @@ -0,0 +1,27 @@ +commit bb8efd4841329bc3aa4468e5c613c872046c25f9 +Author: popcornmix +Date: Fri Sep 20 19:07:56 2013 +0100 + + dwc_otg: Fix for occasional lockup on boot when doing a USB reset + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:42.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd_intr.c 2014-04-28 00:43:43.000000000 +0000 +@@ -742,8 +742,8 @@ + } + + /* Clear interrupt */ +- //gintsts.b.sofintr = 1; +- //DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); ++ gintsts.b.sofintr = 1; ++ DWC_WRITE_REG32(&hcd->core_if->core_global_regs->gintsts, gintsts.d32); + + return 1; + } +Index: linux-3.10-3.10.11/dummy/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1664_bb8efd4841329bc3aa4468e5c613c872046c25f9.txt 2014-04-28 00:43:43.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.patch --- linux-3.10.11/debian/patches/rpi/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.patch 2014-04-28 00:43:44.000000000 +0000 @@ -0,0 +1,45 @@ +commit 19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9 +Author: P33M +Date: Fri Sep 27 14:42:24 2013 +0100 + + dwc_otg: Don't issue traffic to LS devices in FS mode + + Issuing low-speed packets when the root port is in full-speed mode + causes the root port to stop responding. Explicitly fail when + enqueuing URBs to a LS endpoint on a FS bus. + +Index: linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:38.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/usb/host/dwc_otg/dwc_otg_hcd.c 2014-04-28 00:43:44.000000000 +0000 +@@ -501,6 +501,7 @@ + dwc_otg_transaction_type_e tr_type; + dwc_otg_qtd_t *qtd; + gintmsk_data_t intr_mask = {.d32 = 0 }; ++ hprt0_data_t hprt0 = { .d32 = 0 }; + + #ifdef DEBUG /* integrity checks (Broadcom) */ + if (NULL == hcd->core_if) { +@@ -515,6 +516,16 @@ + return -DWC_E_NO_DEVICE; + } + ++ /* Some core configurations cannot support LS traffic on a FS root port */ ++ if ((hcd->fops->speed(hcd, dwc_otg_urb->priv) == USB_SPEED_LOW) && ++ (hcd->core_if->hwcfg2.b.fs_phy_type == 1) && ++ (hcd->core_if->hwcfg2.b.hs_phy_type == 1)) { ++ hprt0.d32 = DWC_READ_REG32(hcd->core_if->host_if->hprt0); ++ if (hprt0.b.prtspd == DWC_HPRT0_PRTSPD_FULL_SPEED) { ++ return -DWC_E_NO_DEVICE; ++ } ++ } ++ + qtd = dwc_otg_hcd_qtd_create(dwc_otg_urb, atomic_alloc); + if (qtd == NULL) { + DWC_ERROR("DWC OTG HCD URB Enqueue failed creating QTD\n"); +Index: linux-3.10-3.10.11/dummy/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1665_19b1dd5236fb99e9f9fa8926cbc32b1603db4bb9.txt 2014-04-28 00:43:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.patch --- linux-3.10.11/debian/patches/rpi/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.patch 2014-04-28 00:43:45.000000000 +0000 @@ -0,0 +1,308 @@ +commit 5cadf3dceca8262f2388f9ba9ec86ad088a78f92 +Author: popcornmix +Date: Wed Nov 6 12:08:46 2013 +0000 + + config: enable BLK_DEV_SD statically. Add some DM_MIRROR raid options. Add ISCSI_TCP. Add R8712U + + kernel: config: add missing PPP config options + + kernel: config: Add MMC_SPI and DM_LOG_USERSPACE + + kernel: config: Add crypto modules + + config: Enable NET_IPIP, IP_ADVANCED_ROUTER, IP_MULTIPLE_TABLES, IP_ROUTE_MULTIPATH, NETFILTER_MATCH_IPVS + + config: Enable MROUTE options + + config: enable CONFIG_CRYPTO_AES_ARM + + config: Add more config options from 3.6 tree including PREEMPT, SPEAKUP, NTFS_RW, HFS + + config: Set CONFIG_SPI_SPIDEV=y + +Index: linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig +=================================================================== +--- linux-3.10-3.10.11.orig/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:42:56.000000000 +0000 ++++ linux-3.10-3.10.11/arch/arm/configs/bcmrpi_defconfig 2014-04-28 00:43:44.000000000 +0000 +@@ -33,18 +33,21 @@ + CONFIG_MODULE_UNLOAD=y + CONFIG_MODVERSIONS=y + CONFIG_MODULE_SRCVERSION_ALL=y +-# CONFIG_BLK_DEV_BSG is not set + CONFIG_BLK_DEV_THROTTLING=y + CONFIG_PARTITION_ADVANCED=y + CONFIG_MAC_PARTITION=y + CONFIG_CFQ_GROUP_IOSCHED=y + CONFIG_ARCH_BCM2708=y ++CONFIG_PREEMPT=y + CONFIG_AEABI=y ++CONFIG_CLEANCACHE=y ++CONFIG_FRONTSWAP=y ++CONFIG_UACCESS_WITH_MEMCPY=y + CONFIG_SECCOMP=y + CONFIG_CC_STACKPROTECTOR=y + CONFIG_ZBOOT_ROM_TEXT=0x0 + CONFIG_ZBOOT_ROM_BSS=0x0 +-CONFIG_CMDLINE="dwc_otg.lpm_enable=0 console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext3 rootwait" ++CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" + CONFIG_KEXEC=y + CONFIG_CPU_FREQ=y + CONFIG_CPU_FREQ_STAT=m +@@ -64,9 +67,20 @@ + CONFIG_NET_KEY=m + CONFIG_INET=y + CONFIG_IP_MULTICAST=y ++CONFIG_IP_ADVANCED_ROUTER=y ++CONFIG_IP_MULTIPLE_TABLES=y ++CONFIG_IP_ROUTE_MULTIPATH=y ++CONFIG_IP_ROUTE_VERBOSE=y + CONFIG_IP_PNP=y + CONFIG_IP_PNP_DHCP=y + CONFIG_IP_PNP_RARP=y ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE_DEMUX=m ++CONFIG_NET_IPGRE=m ++CONFIG_IP_MROUTE=y ++CONFIG_IP_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IP_PIMSM_V1=y ++CONFIG_IP_PIMSM_V2=y + CONFIG_SYN_COOKIES=y + CONFIG_INET_AH=m + CONFIG_INET_ESP=m +@@ -81,6 +95,9 @@ + CONFIG_INET6_ESP=m + CONFIG_INET6_IPCOMP=m + CONFIG_IPV6_MULTIPLE_TABLES=y ++CONFIG_IPV6_MROUTE=y ++CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y ++CONFIG_IPV6_PIMSM_V2=y + CONFIG_NETFILTER=y + CONFIG_NF_CONNTRACK=m + CONFIG_NF_CONNTRACK_ZONES=y +@@ -136,6 +153,7 @@ + CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + CONFIG_NETFILTER_XT_MATCH_HELPER=m + CONFIG_NETFILTER_XT_MATCH_IPRANGE=m ++CONFIG_NETFILTER_XT_MATCH_IPVS=m + CONFIG_NETFILTER_XT_MATCH_LENGTH=m + CONFIG_NETFILTER_XT_MATCH_LIMIT=m + CONFIG_NETFILTER_XT_MATCH_MAC=m +@@ -357,7 +375,6 @@ + CONFIG_NET_9P=m + CONFIG_NFC=m + CONFIG_NFC_PN533=m +-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_DEVTMPFS=y + CONFIG_DEVTMPFS_MOUNT=y + CONFIG_CMA=y +@@ -369,25 +386,44 @@ + CONFIG_CDROM_PKTCDVD=m + CONFIG_SCSI=y + # CONFIG_SCSI_PROC_FS is not set +-CONFIG_BLK_DEV_SD=m ++CONFIG_BLK_DEV_SD=y ++CONFIG_CHR_DEV_ST=m ++CONFIG_CHR_DEV_OSST=m + CONFIG_BLK_DEV_SR=m + CONFIG_SCSI_MULTI_LUN=y +-# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_SCSI_ISCSI_ATTRS=y ++CONFIG_ISCSI_TCP=m ++CONFIG_ISCSI_BOOT_SYSFS=m + CONFIG_MD=y ++CONFIG_MD_RAID0=m + CONFIG_BLK_DEV_DM=m + CONFIG_DM_CRYPT=m ++CONFIG_DM_SNAPSHOT=m ++CONFIG_DM_MIRROR=m ++CONFIG_DM_RAID=m ++CONFIG_DM_LOG_USERSPACE=m ++CONFIG_DM_ZERO=m ++CONFIG_DM_DELAY=m + CONFIG_NETDEVICES=y ++CONFIG_BONDING=m + CONFIG_DUMMY=m ++CONFIG_MACVLAN=m + CONFIG_NETCONSOLE=m + CONFIG_TUN=m + CONFIG_MDIO_BITBANG=m + CONFIG_PPP=m + CONFIG_PPP_BSDCOMP=m + CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_FILTER=y ++CONFIG_PPP_MPPE=m ++CONFIG_PPP_MULTILINK=y ++CONFIG_PPPOE=m ++CONFIG_PPPOL2TP=m + CONFIG_PPP_ASYNC=m + CONFIG_PPP_SYNC_TTY=m + CONFIG_SLIP=m + CONFIG_SLIP_COMPRESSED=y ++CONFIG_SLIP_SMART=y + CONFIG_USB_CATC=m + CONFIG_USB_KAWETH=m + CONFIG_USB_PEGASUS=m +@@ -397,6 +433,7 @@ + CONFIG_USB_NET_AX8817X=m + CONFIG_USB_NET_CDCETHER=m + CONFIG_USB_NET_CDC_EEM=m ++CONFIG_USB_NET_CDC_NCM=m + CONFIG_USB_NET_CDC_MBIM=m + CONFIG_USB_NET_DM9601=m + CONFIG_USB_NET_SMSC75XX=m +@@ -473,14 +510,19 @@ + CONFIG_INPUT_GPIO_ROTARY_ENCODER=m + CONFIG_INPUT_ADXL34X=m + CONFIG_INPUT_CMA3000=m +-# CONFIG_SERIO is not set ++CONFIG_SERIO=m ++CONFIG_SERIO_RAW=m ++CONFIG_GAMEPORT=m ++CONFIG_GAMEPORT_NS558=m ++CONFIG_GAMEPORT_L4=m + CONFIG_VT_HW_CONSOLE_BINDING=y + # CONFIG_LEGACY_PTYS is not set + # CONFIG_DEVKMEM is not set + CONFIG_SERIAL_AMBA_PL011=y + CONFIG_SERIAL_AMBA_PL011_CONSOLE=y ++CONFIG_TTY_PRINTK=y + CONFIG_HW_RANDOM=y +-CONFIG_HW_RANDOM_BCM2708=y ++CONFIG_HW_RANDOM_BCM2708=m + CONFIG_RAW_DRIVER=y + CONFIG_BRCM_CHAR_DRIVERS=y + CONFIG_BCM_VC_CMA=y +@@ -489,7 +531,7 @@ + CONFIG_I2C_BCM2708=m + CONFIG_SPI=y + CONFIG_SPI_BCM2708=m +-CONFIG_SPI_SPIDEV=m ++CONFIG_SPI_SPIDEV=y + CONFIG_GPIO_SYSFS=y + CONFIG_W1=m + CONFIG_W1_MASTER_DS2490=m +@@ -645,6 +687,7 @@ + CONFIG_VIDEO_EM28XX_DVB=m + CONFIG_RADIO_SI470X=y + CONFIG_USB_SI470X=m ++CONFIG_I2C_SI470X=m + CONFIG_USB_MR800=m + CONFIG_USB_DSBR=m + CONFIG_RADIO_SHARK=m +@@ -652,11 +695,14 @@ + CONFIG_RADIO_SI4713=m + CONFIG_USB_KEENE=m + CONFIG_USB_MA901=m ++CONFIG_RADIO_TEA5764=m + CONFIG_RADIO_SAA7706H=m + CONFIG_RADIO_TEF6862=m ++CONFIG_RADIO_WL1273=m + CONFIG_RADIO_WL128X=m + CONFIG_FB=y + CONFIG_FB_BCM2708=y ++# CONFIG_BACKLIGHT_GENERIC is not set + CONFIG_FRAMEBUFFER_CONSOLE=y + CONFIG_LOGO=y + # CONFIG_LOGO_LINUX_MONO is not set +@@ -679,6 +725,7 @@ + CONFIG_SND_USB_AUDIO=m + CONFIG_SND_USB_UA101=m + CONFIG_SND_USB_CAIAQ=m ++CONFIG_SND_USB_CAIAQ_INPUT=y + CONFIG_SND_USB_6FIRE=m + CONFIG_SOUND_PRIME=m + CONFIG_HIDRAW=y +@@ -829,6 +876,7 @@ + CONFIG_MMC_SDHCI_PLTFM=y + CONFIG_MMC_SDHCI_BCM2708=y + CONFIG_MMC_SDHCI_BCM2708_DMA=y ++CONFIG_MMC_SPI=m + CONFIG_LEDS_GPIO=m + CONFIG_LEDS_TRIGGER_TIMER=y + CONFIG_LEDS_TRIGGER_ONESHOT=y +@@ -874,9 +922,20 @@ + CONFIG_UIO_PDRV=m + CONFIG_UIO_PDRV_GENIRQ=m + CONFIG_STAGING=y ++CONFIG_W35UND=m ++CONFIG_PRISM2_USB=m ++CONFIG_R8712U=m ++CONFIG_VT6656=m ++CONFIG_SPEAKUP=m ++CONFIG_SPEAKUP_SYNTH_SOFT=m + CONFIG_STAGING_MEDIA=y ++CONFIG_DVB_AS102=m + CONFIG_LIRC_STAGING=y ++CONFIG_LIRC_IGORPLUGUSB=m ++CONFIG_LIRC_IMON=m + CONFIG_LIRC_RPI=m ++CONFIG_LIRC_SASEM=m ++CONFIG_LIRC_SERIAL=m + # CONFIG_IOMMU_SUPPORT is not set + CONFIG_EXT4_FS=y + CONFIG_EXT4_FS_POSIX_ACL=y +@@ -916,9 +975,13 @@ + CONFIG_VFAT_FS=y + CONFIG_FAT_DEFAULT_IOCHARSET="ascii" + CONFIG_NTFS_FS=m ++CONFIG_NTFS_RW=y + CONFIG_TMPFS=y + CONFIG_TMPFS_POSIX_ACL=y + CONFIG_CONFIGFS_FS=y ++CONFIG_ECRYPT_FS=m ++CONFIG_HFS_FS=m ++CONFIG_HFSPLUS_FS=m + CONFIG_SQUASHFS=m + CONFIG_SQUASHFS_XATTR=y + CONFIG_SQUASHFS_LZO=y +@@ -936,7 +999,6 @@ + CONFIG_CIFS_WEAK_PW_HASH=y + CONFIG_CIFS_XATTR=y + CONFIG_CIFS_POSIX=y +-# CONFIG_CIFS_DEBUG is not set + CONFIG_9P_FS=m + CONFIG_9P_FS_POSIX_ACL=y + CONFIG_NLS_DEFAULT="utf8" +@@ -977,27 +1039,32 @@ + CONFIG_NLS_ISO8859_15=m + CONFIG_NLS_KOI8_R=m + CONFIG_NLS_KOI8_U=m +-CONFIG_NLS_UTF8=m + CONFIG_DLM=m + CONFIG_PRINTK_TIME=y ++CONFIG_DEBUG_FS=y + CONFIG_DETECT_HUNG_TASK=y + CONFIG_TIMER_STATS=y ++# CONFIG_DEBUG_PREEMPT is not set + CONFIG_DEBUG_MEMORY_INIT=y + CONFIG_BOOT_PRINTK_DELAY=y + CONFIG_LATENCYTOP=y ++# CONFIG_KPROBE_EVENT is not set + CONFIG_KGDB=y + CONFIG_KGDB_KDB=y + CONFIG_KDB_KEYBOARD=y + CONFIG_STRICT_DEVMEM=y ++CONFIG_CRYPTO_USER=m ++CONFIG_CRYPTO_NULL=m ++CONFIG_CRYPTO_CRYPTD=m + CONFIG_CRYPTO_SEQIV=m + CONFIG_CRYPTO_CBC=y +-CONFIG_CRYPTO_HMAC=y ++CONFIG_CRYPTO_XTS=m + CONFIG_CRYPTO_XCBC=m +-CONFIG_CRYPTO_MD5=y +-CONFIG_CRYPTO_SHA1=y ++CONFIG_CRYPTO_SHA1_ARM=m + CONFIG_CRYPTO_SHA512=m + CONFIG_CRYPTO_TGR192=m + CONFIG_CRYPTO_WP512=m ++CONFIG_CRYPTO_AES_ARM=m + CONFIG_CRYPTO_CAST5=m + CONFIG_CRYPTO_DES=y + # CONFIG_CRYPTO_ANSI_CPRNG is not set +Index: linux-3.10-3.10.11/dummy/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.txt +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-3.10-3.10.11/dummy/rpi_1666_5cadf3dceca8262f2388f9ba9ec86ad088a78f92.txt 2014-04-28 00:43:44.000000000 +0000 +@@ -0,0 +1 @@ ++dummy file to ensure patch has content. diff -Nru linux-3.10.11/debian/patches/rpi/rpi_1667_dbaaa7776a358c98654eee26d749c9f78e993a54.patch linux-3.10-3.10.11/debian/patches/rpi/rpi_1667_dbaaa7776a358c98654eee26d749c9f78e993a54.patch --- linux-3.10.11/debian/patches/rpi/rpi_1667_dbaaa7776a358c98654eee26d749c9f78e993a54.patch 1970-01-01 00:00:00.000000000 +0000 +++ linux-3.10-3.10.11/debian/patches/rpi/rpi_1667_dbaaa7776a358c98654eee26d749c9f78e993a54.patch 2014-04-28 00:43:59.000000000 +0000 @@ -0,0 +1,139953 @@ +commit dbaaa7776a358c98654eee26d749c9f78e993a54 +Author: popcornmix +Date: Sat Nov 9 12:17:56 2013 +0000 + + wifi: Update to newer rtl8192cu driver release + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/Kconfig 2014-04-28 00:43:21.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Kconfig 2014-04-28 00:43:45.000000000 +0000 +@@ -1,8 +1,6 @@ + config RTL8192CU + tristate "Realtek 8192C USB WiFi" + depends on USB +- select WIRELESS_EXT +- select WEXT_PRIV + ---help--- +- Enable wireless network adapters based on Realtek RTL8192C chipset family, such as EDUP nano series ++ Help message of RTL8192CU + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Makefile +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/Makefile 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/Makefile 2014-04-28 00:43:45.000000000 +0000 +@@ -1,15 +1,15 @@ + EXTRA_CFLAGS += $(USER_EXTRA_CFLAGS) + EXTRA_CFLAGS += -O1 + #EXTRA_CFLAGS += -O3 +-#EXTRA_CFLAGS += -Wall +-#EXTRA_CFLAGS += -Wextra ++#EXTRA_CFLAGS += -Wall ++#EXTRA_CFLAGS += -Wextra + #EXTRA_CFLAGS += -Werror + #EXTRA_CFLAGS += -pedantic +-#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes ++#EXTRA_CFLAGS += -Wshadow -Wpointer-arith -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes + +-EXTRA_CFLAGS += -Wno-unused-variable +-EXTRA_CFLAGS += -Wno-unused-value +-EXTRA_CFLAGS += -Wno-unused-label ++EXTRA_CFLAGS += -Wno-unused-variable ++EXTRA_CFLAGS += -Wno-unused-value ++EXTRA_CFLAGS += -Wno-unused-label + EXTRA_CFLAGS += -Wno-unused-parameter + EXTRA_CFLAGS += -Wno-unused-function + EXTRA_CFLAGS += -Wno-unused +@@ -22,23 +22,26 @@ + + CONFIG_RTL8192C = y + CONFIG_RTL8192D = n ++CONFIG_RTL8723A = n + + CONFIG_USB_HCI = y + CONFIG_PCI_HCI = n + CONFIG_SDIO_HCI = n + + CONFIG_MP_INCLUDED = n +-CONFIG_POWER_SAVING = y +-CONFIG_USB_AUTOSUSPEND = n +-CONFIG_HW_PWRP_DETECTION = n +-CONFIG_WIFI_TEST = n +-CONFIG_BT_COEXISTENCE = n +-CONFIG_RTL8192CU_REDEFINE_1X1 =n +-CONFIG_WAKE_ON_WLAN = n ++CONFIG_POWER_SAVING = y ++CONFIG_USB_AUTOSUSPEND = n ++CONFIG_HW_PWRP_DETECTION = n ++CONFIG_WIFI_TEST = n ++CONFIG_BT_COEXISTENCE = n ++CONFIG_RTL8192CU_REDEFINE_1X1 = n ++CONFIG_INTEL_WIDI = n ++CONFIG_WAKE_ON_WLAN = n + +-CONFIG_PLATFORM_I386_PC = n ++CONFIG_PLATFORM_I386_PC = y + CONFIG_PLATFORM_TI_AM3517 = n + CONFIG_PLATFORM_ANDROID_X86 = n ++CONFIG_PLATFORM_JB_X86 = n + CONFIG_PLATFORM_ARM_S3C2K4 = n + CONFIG_PLATFORM_ARM_PXA2XX = n + CONFIG_PLATFORM_ARM_S3C6K4 = n +@@ -50,44 +53,33 @@ + CONFIG_PLATFORM_MSTAR389 = n + CONFIG_PLATFORM_MT53XX = n + CONFIG_PLATFORM_ARM_MX51_241H = n ++CONFIG_PLATFORM_FS_MX61 = n + CONFIG_PLATFORM_ACTIONS_ATJ227X = n +-CONFIG_PLATFORM_ARM_TEGRA3 = n ++CONFIG_PLATFORM_TEGRA3_CARDHU = n ++CONFIG_PLATFORM_TEGRA4_DALMORE = n + CONFIG_PLATFORM_ARM_TCC8900 = n + CONFIG_PLATFORM_ARM_TCC8920 = n ++CONFIG_PLATFORM_ARM_TCC8920_JB42 = n + CONFIG_PLATFORM_ARM_RK2818 = n + CONFIG_PLATFORM_ARM_TI_PANDA = n + CONFIG_PLATFORM_MIPS_JZ4760 = n + CONFIG_PLATFORM_DMP_PHILIPS = n +-CONFIG_PLATFORM_TI_DM365 = n ++CONFIG_PLATFORM_TI_DM365 = n + CONFIG_PLATFORM_MN10300 = n + CONFIG_PLATFORM_MSTAR_TITANIA12 = n +-CONFIG_PLATFORM_ARM_BCM2708 = y ++CONFIG_PLATFORM_MSTAR_A3 = n ++CONFIG_PLATFORM_ARM_SUNxI = n ++CONFIG_PLATFORM_ARM_SUN6I = n + + CONFIG_DRVEXT_MODULE = n + + export TopDIR ?= $(shell pwd) + + +-ifeq ($(CONFIG_RTL8712), y) +- +-RTL871X = rtl8712 +- +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8712s +-endif +-ifeq ($(CONFIG_USB_HCI), y) +-MODULE_NAME = 8712u +-endif +- +-endif +- + ifeq ($(CONFIG_RTL8192C), y) + + RTL871X = rtl8192c + +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8192cs +-endif + ifeq ($(CONFIG_USB_HCI), y) + MODULE_NAME = 8192cu + FW_FILES := hal/$(RTL871X)/usb/Hal8192CUHWImg.o +@@ -100,7 +92,9 @@ + FW_FILES := hal/$(RTL871X)/pci/Hal8192CEHWImg.o + endif + +-CHIP_FILES := hal/$(RTL871X)/$(RTL871X)_sreset.o ++CHIP_FILES := \ ++ hal/$(RTL871X)/$(RTL871X)_sreset.o \ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o + CHIP_FILES += $(FW_FILES) + endif + +@@ -108,111 +102,101 @@ + + RTL871X = rtl8192d + +-ifeq ($(CONFIG_SDIO_HCI), y) +-MODULE_NAME = 8192ds +-endif + ifeq ($(CONFIG_USB_HCI), y) + MODULE_NAME = 8192du +-FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o \ +- hal/$(RTL871X)/usb/Hal8192DUTestHWImg.o ++FW_FILES := hal/$(RTL871X)/usb/Hal8192DUHWImg.o + ifneq ($(CONFIG_WAKE_ON_WLAN), n) + FW_FILES += hal/$(RTL871X)/usb/Hal8192DUHWImg_wowlan.o + endif + endif + ifeq ($(CONFIG_PCI_HCI), y) + MODULE_NAME = 8192de +-FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o \ +- hal/$(RTL871X)/pci/Hal8192DETestHWImg.o ++FW_FILES := hal/$(RTL871X)/pci/Hal8192DEHWImg.o + endif + ++CHIP_FILES := \ ++ hal/$(RTL871X)/$(RTL871X)_xmit.o + CHIP_FILES += $(FW_FILES) + endif + +-ifeq ($(CONFIG_SDIO_HCI), y) ++ifeq ($(CONFIG_RTL8723A), y) + +-HCI_NAME = sdio +- +-_OS_INTFS_FILES := os_dep/osdep_service.o \ +- os_dep/linux/os_intfs.o \ +- os_dep/linux/sdio_intf.o \ +- os_dep/linux/ioctl_linux.o \ +- os_dep/linux/xmit_linux.o \ +- os_dep/linux/mlme_linux.o \ +- os_dep/linux/recv_linux.o \ +- os_dep/linux/rtw_android.o +- +-_HAL_INTFS_FILES := hal/$(RTL871X)/hal_init.o \ +- hal/$(RTL871X)/sdio_halinit.o \ +- hal/$(RTL871X)/sdio_ops.o \ +- hal/$(RTL871X)/sdio_ops_linux.o ++RTL871X = rtl8723a + ++ifeq ($(CONFIG_SDIO_HCI), y) ++MODULE_NAME = 8723as ++FW_FILES := hal/$(RTL871X)/sdio/Hal8723SHWImg.o + endif + +- + ifeq ($(CONFIG_USB_HCI), y) ++MODULE_NAME = 8723au ++FW_FILES := hal/$(RTL871X)/usb/Hal8723UHWImg.o ++endif + +-HCI_NAME = usb ++ifeq ($(CONFIG_PCI_HCI), y) ++MODULE_NAME = 8723ae ++FW_FILES := hal/$(RTL871X)/pci/Hal8723EHWImg.o ++endif + +-_OS_INTFS_FILES := os_dep/osdep_service.o \ +- os_dep/linux/os_intfs.o \ +- os_dep/linux/$(HCI_NAME)_intf.o \ +- os_dep/linux/ioctl_linux.o \ +- os_dep/linux/xmit_linux.o \ +- os_dep/linux/mlme_linux.o \ +- os_dep/linux/recv_linux.o \ +- os_dep/linux/ioctl_cfg80211.o \ +- os_dep/linux/rtw_android.o ++PWRSEQ_FILES := hal/HalPwrSeqCmd.o \ ++ hal/$(RTL871X)/Hal8723PwrSeq.o + +-_HAL_INTFS_FILES := hal/hal_init.o \ +- hal/$(RTL871X)/$(RTL871X)_hal_init.o \ +- hal/$(RTL871X)/$(RTL871X)_phycfg.o \ +- hal/$(RTL871X)/$(RTL871X)_rf6052.o \ +- hal/$(RTL871X)/$(RTL871X)_dm.o \ +- hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ +- hal/$(RTL871X)/$(RTL871X)_cmd.o \ +- hal/$(RTL871X)/$(RTL871X)_mp.o \ +- hal/$(RTL871X)/usb/usb_ops_linux.o \ +- hal/$(RTL871X)/usb/usb_halinit.o \ +- hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_led.o \ +- hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_xmit.o \ +- hal/$(RTL871X)/usb/rtl$(MODULE_NAME)_recv.o +- +-_HAL_INTFS_FILES += $(CHIP_FILES) ++CHIP_FILES += $(FW_FILES) $(PWRSEQ_FILES) ++ ++endif + ++ifeq ($(CONFIG_SDIO_HCI), y) ++HCI_NAME = sdio + endif + ++ifeq ($(CONFIG_USB_HCI), y) ++HCI_NAME = usb ++endif + + ifeq ($(CONFIG_PCI_HCI), y) +- + HCI_NAME = pci ++endif ++ + + _OS_INTFS_FILES := os_dep/osdep_service.o \ + os_dep/linux/os_intfs.o \ + os_dep/linux/$(HCI_NAME)_intf.o \ ++ os_dep/linux/$(HCI_NAME)_ops_linux.o \ + os_dep/linux/ioctl_linux.o \ + os_dep/linux/xmit_linux.o \ + os_dep/linux/mlme_linux.o \ + os_dep/linux/recv_linux.o \ ++ os_dep/linux/ioctl_cfg80211.o \ + os_dep/linux/rtw_android.o + +-_HAL_INTFS_FILES := hal/hal_init.o \ +- hal/$(RTL871X)/$(RTL871X)_hal_init.o \ ++ ++_HAL_INTFS_FILES := hal/hal_intf.o \ ++ hal/hal_com.o \ ++ hal/dm.o \ ++ hal/$(RTL871X)/$(RTL871X)_hal_init.o \ + hal/$(RTL871X)/$(RTL871X)_phycfg.o \ + hal/$(RTL871X)/$(RTL871X)_rf6052.o \ + hal/$(RTL871X)/$(RTL871X)_dm.o \ + hal/$(RTL871X)/$(RTL871X)_rxdesc.o \ + hal/$(RTL871X)/$(RTL871X)_cmd.o \ +- hal/$(RTL871X)/$(RTL871X)_mp.o \ +- hal/$(RTL871X)/pci/pci_ops_linux.o \ +- hal/$(RTL871X)/pci/pci_halinit.o \ +- hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_led.o \ +- hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_xmit.o \ +- hal/$(RTL871X)/pci/rtl$(MODULE_NAME)_recv.o ++ hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_halinit.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_led.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_xmit.o \ ++ hal/$(RTL871X)/$(HCI_NAME)/rtl$(MODULE_NAME)_recv.o + +-_HAL_INTFS_FILES += $(CHIP_FILES) ++ifeq ($(CONFIG_SDIO_HCI), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops.o ++else ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(HCI_NAME)/$(HCI_NAME)_ops_linux.o ++endif + ++ifeq ($(CONFIG_MP_INCLUDED), y) ++_HAL_INTFS_FILES += hal/$(RTL871X)/$(RTL871X)_mp.o + endif + ++_HAL_INTFS_FILES += $(CHIP_FILES) ++ ++ + ifeq ($(CONFIG_AUTOCFG_CP), y) + $(shell cp $(TopDIR)/autoconf_$(RTL871X)_$(HCI_NAME)_linux.h $(TopDIR)/include/autoconf.h) + endif +@@ -238,22 +222,18 @@ + + ifeq ($(CONFIG_BT_COEXISTENCE), y) + EXTRA_CFLAGS += -DCONFIG_BT_COEXISTENCE +-endif ++endif + + ifeq ($(CONFIG_RTL8192CU_REDEFINE_1X1), y) + EXTRA_CFLAGS += -DRTL8192C_RECONFIG_TO_1T1R +-endif ++endif + + ifeq ($(CONFIG_WAKE_ON_WLAN), y) + EXTRA_CFLAGS += -DCONFIG_WAKE_ON_WLAN + endif + +-ifeq ($(CONFIG_PLATFORM_ARM_BCM2708), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN +-ARCH := arm +-CROSS_COMPILE ?= +-KVER := 3.6.11+ +-KSRC := /lib/modules/$(KVER)/build ++ifeq ($(CONFIG_INTEL_WIDI), y) ++EXTRA_CFLAGS += -DCONFIG_INTEL_WIDI + endif + + ifeq ($(CONFIG_PLATFORM_I386_PC), y) +@@ -275,11 +255,20 @@ + endif + + ifeq ($(CONFIG_PLATFORM_MSTAR_TITANIA12), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR_TITANIA12 ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_TITANIA12 + ARCH:=mips +-CROSS_COMPILE:= /work/mstar/mips-4.3/bin/mips-linux-gnu- ++CROSS_COMPILE:= /usr/src/Mstar_kernel/mips-4.3/bin/mips-linux-gnu- + KVER:= 2.6.28.9 +-KSRC:= /work/mstar/2.6.28.9/ ++KSRC:= /usr/src/Mstar_kernel/2.6.28.9/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_MSTAR_A3), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_MSTAR -DCONFIG_PLATFORM_MSTAR_A3 ++ARCH:=arm ++CROSS_COMPILE:= arm-none-linux-gnueabi- ++KVER:= 2.6.35.11 ++KSRC:= /home/gary/PERFORCE/THEALE/RedLion/2.6.35.11/ ++MODULE_NAME = wlan + endif + + ifeq ($(CONFIG_PLATFORM_ANDROID_X86), y) +@@ -291,6 +280,18 @@ + MODULE_NAME :=wlan + endif + ++ifeq ($(CONFIG_PLATFORM_JB_X86), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++SUBARCH := $(shell uname -m | sed -e s/i.86/i386/) ++ARCH := $(SUBARCH) ++CROSS_COMPILE := /home/android_sdk/android-x86_JB/prebuilts/gcc/linux-x86/x86/i686-linux-android-4.7/bin/i686-linux-android- ++KSRC := /home/android_sdk/android-x86_JB/out/target/product/x86/obj/kernel/ ++MODULE_NAME :=wlan ++endif ++ + ifeq ($(CONFIG_PLATFORM_ARM_PXA2XX), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + ARCH := arm +@@ -327,7 +328,7 @@ + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + ARCH:=mips + CROSS_COMPILE:=mipsisa32r2-uclibc- +-KVER:= ++KVER:= + KSRC:= /root/work/kernel_realtek + endif + +@@ -335,7 +336,7 @@ + EXTRA_CFLAGS += -DCONFIG_BIG_ENDIAN + ARCH:=mips + CROSS_COMPILE:=mipsisa32r2-uclibc- +-KVER:= ++KVER:= + KSRC:= /root/work/kernel_realtek + endif + +@@ -366,8 +367,8 @@ + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DRTK_DMP_PLATFORM + ARCH:=mips + CROSS_COMPILE:=mipsel-linux- +-KVER:= +-KSRC ?= /usr/src/work/DMP_Kernel/jupiter/linux-2.6.12 ++KVER:= ++KSRC ?= /usr/src/DMP_Kernel/jupiter/linux-2.6.12 + endif + + ifeq ($(CONFIG_PLATFORM_MT53XX), y) +@@ -385,7 +386,16 @@ + KVER := 2.6.31 + KSRC ?= /lib/modules/2.6.31-770-g0e46b52/source + endif +- ++ ++ifeq ($(CONFIG_PLATFORM_FS_MX61), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := /home/share/CusEnv/FreeScale/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC ?= /home/share/CusEnv/FreeScale/FS_kernel_env ++endif ++ ++ ++ + ifeq ($(CONFIG_PLATFORM_ACTIONS_ATJ227X), y) + EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ACTIONS_ATJ227X + ARCH := mips +@@ -402,27 +412,57 @@ + KSRC := /home/cnsd4/Appro/mv_pro_5.0/montavista/pro/devkit/lsp/ti-davinci/linux-dm365 + endif + +-ifeq ($(CONFIG_PLATFORM_ARM_TEGRA3), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE +-ARCH ?= arm +-CROSS_COMPILE ?= /media/DATA-1/nvidia/gingerbread/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- +-KSRC ?= /media/DATA-1/nvidia/gingerbread/out/debug/target/product/cardhu/obj/KERNEL ++ifeq ($(CONFIG_PLATFORM_TEGRA3_CARDHU), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/nvidia/tegra-16r3-partner-android-4.1_20120723/out/target/product/cardhu/obj/KERNEL ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_TEGRA4_DALMORE), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DRTW_ENABLE_WIFI_CONTROL_FUNC ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/nvidia/tegra-17r9-partner-android-4.2-dalmore_20130131/out/target/product/dalmore/obj/KERNEL + MODULE_NAME := wlan + endif + + ifeq ($(CONFIG_PLATFORM_ARM_TCC8900), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_MINIMAL_MEMORY_USAGE +-ARCH ?= arm +-CROSS_COMPILE ?= /media/DATA-1/telechips/SDK_2302_20110425/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- +-KSRC ?=/media/DATA-1/telechips/SDK_2302_20110425/kernel ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/SDK_2304_20110613/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/SDK_2304_20110613/kernel + MODULE_NAME := wlan + endif + + ifeq ($(CONFIG_PLATFORM_ARM_TCC8920), y) +-EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN #-DCONFIG_MINIMAL_MEMORY_USAGE ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN + ARCH := arm +-CROSS_COMPILE := /media/DATA-2/telechips/ics_sdk/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- +-KSRC := /media/DATA-2/telechips/ics_sdk/kernel ++CROSS_COMPILE := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/v12.06_r1-tcc-android-4.0.4/kernel ++MODULE_NAME := wlan ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_TCC8920_JB42), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/bin/arm-eabi- ++KSRC := /home/android_sdk/Telechips/v13.03_r1-tcc-android-4.2.2_ds_patched/kernel + MODULE_NAME := wlan + endif + +@@ -461,11 +501,39 @@ + INSTALL_PREFIX := + endif + ++ifeq ($(CONFIG_PLATFORM_ARM_SUNxI), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN -DCONFIG_PLATFORM_ARM_SUNxI ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 3.0.8 ++#KSRC:= ../lichee/linux-3.0/ ++endif ++ ++ifeq ($(CONFIG_PLATFORM_ARM_SUN6I), y) ++EXTRA_CFLAGS += -DCONFIG_LITTLE_ENDIAN ++EXTRA_CFLAGS += -DCONFIG_PLATFORM_ARM_SUN6I ++EXTRA_CFLAGS += -DCONFIG_USE_USB_BUFFER_ALLOC_TX ++EXTRA_CFLAGS += -DCONFIG_TRAFFIC_PROTECT ++# default setting for Android 4.1, 4.2 ++EXTRA_CFLAGS += -DCONFIG_CONCURRENT_MODE ++EXTRA_CFLAGS += -DCONFIG_IOCTL_CFG80211 -DRTW_USE_CFG80211_STA_EVENT ++EXTRA_CFLAGS += -DCONFIG_P2P_IPS ++ARCH := arm ++CROSS_COMPILE := arm-none-linux-gnueabi- ++KVER := 3.3.0 ++#KSRC:= ../lichee/linux-3.3/ ++endif ++ ++ifneq ($(USER_MODULE_NAME),) ++MODULE_NAME := $(USER_MODULE_NAME) ++endif ++ + ifeq ($(CONFIG_MP_INCLUDED), y) + MODULE_NAME := $(MODULE_NAME)_mp + EXTRA_CFLAGS += -DCONFIG_MP_INCLUDED + endif + ++ + ifneq ($(KERNELRELEASE),) + + +@@ -483,23 +551,26 @@ + core/rtw_rf.o \ + core/rtw_recv.o \ + core/rtw_sta_mgt.o \ ++ core/rtw_ap.o \ + core/rtw_xmit.o \ + core/rtw_p2p.o \ ++ core/rtw_tdls.o \ + core/rtw_br_ext.o \ +- core/rtw_iol.o ++ core/rtw_iol.o \ ++ core/rtw_sreset.o + + $(MODULE_NAME)-y += $(rtk_core) +- ++ ++$(MODULE_NAME)-$(CONFIG_INTEL_WIDI) += core/rtw_intel_widi.o ++ + $(MODULE_NAME)-y += core/efuse/rtw_efuse.o + + $(MODULE_NAME)-y += $(_HAL_INTFS_FILES) + + $(MODULE_NAME)-y += $(_OS_INTFS_FILES) + +- + $(MODULE_NAME)-$(CONFIG_MP_INCLUDED) += core/rtw_mp.o \ +- core/rtw_mp_ioctl.o \ +- core/rtw_ioctl_rtl.o ++ core/rtw_mp_ioctl.o + + obj-$(CONFIG_RTL8192CU) := $(MODULE_NAME).o + +@@ -522,12 +593,12 @@ + uninstall: + rm -f $(MODDESTDIR)/$(MODULE_NAME).ko + /sbin/depmod -a ${KVER} +- +- ++ ++ + config_r: + @echo "make config" + /bin/bash script/Configure script/config.in +- ++ + .PHONY: modules clean + + clean: +@@ -535,11 +606,11 @@ + rm .tmp_versions -fr ; rm Module.symvers -fr + rm -fr Module.markers ; rm -fr modules.order + cd core/efuse ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko +- cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd core ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X)/$(HCI_NAME) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal/$(RTL871X) ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd hal ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep/linux ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko ++ cd os_dep ; rm -fr *.mod.c *.mod *.o .*.cmd *.ko + endif + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/clean +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/clean 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/clean 2014-04-28 00:43:45.000000000 +0000 +@@ -3,7 +3,3 @@ + rmmod 8192ce + rmmod 8192du + rmmod 8192de +- +-rmmod rtl8192cu +-rmmod rtl8192c_common +-rmmod rtlwifi +\ No newline at end of file +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/efuse/rtw_efuse.c 2014-04-28 00:43:45.000000000 +0000 +@@ -1,7 +1,7 @@ + /****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * ++ * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. +@@ -54,6 +54,11 @@ + Efuse_Read1ByteFromFakeContent( + IN PADAPTER pAdapter, + IN u16 Offset, ++ IN OUT u8 *Value ); ++BOOLEAN ++Efuse_Read1ByteFromFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, + IN OUT u8 *Value ) + { + if(Offset >= EFUSE_MAX_HW_SIZE) +@@ -67,6 +72,12 @@ + *Value = fakeBTEfuseContent[fakeEfuseBank-1][Offset]; + return _TRUE; + } ++ ++BOOLEAN ++Efuse_Write1ByteToFakeContent( ++ IN PADAPTER pAdapter, ++ IN u16 Offset, ++ IN u8 Value ); + BOOLEAN + Efuse_Write1ByteToFakeContent( + IN PADAPTER pAdapter, +@@ -210,7 +221,7 @@ + value32 = rtw_read32(Adapter, EFUSE_CTRL); + + *pbuf = (u8)(value32 & 0xff); +- //MSG_8192C("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); ++ //DBG_871X("ReadEFuseByte _offset:%08u, in %d ms\n",_offset ,rtw_get_passing_time_ms(start)); + + } + +@@ -232,6 +243,16 @@ + // 2008/12/22 MH Read Efuse must check if we write section 1 data again!!! Sec1 + // write addr must be after sec5. + // ++ ++VOID ++efuse_ReadEFuse( ++ PADAPTER Adapter, ++ u8 efuseType, ++ u16 _offset, ++ u16 _size_byte, ++ u8 *pbuf, ++ IN BOOLEAN bPseudoTest ++ ); + VOID + efuse_ReadEFuse( + PADAPTER Adapter, +@@ -250,7 +271,7 @@ + IN PADAPTER pAdapter, + IN u8 efuseType, + IN u8 type, +- OUT PVOID *pOut, ++ OUT void *pOut, + IN BOOLEAN bPseudoTest + ) + { +@@ -337,6 +358,12 @@ + * 09/23/2008 MHC Copy from WMAC. + * + *---------------------------------------------------------------------------*/ ++ ++void ++EFUSE_Write1Byte( ++ IN PADAPTER Adapter, ++ IN u16 Address, ++ IN u8 Value); + void + EFUSE_Write1Byte( + IN PADAPTER Adapter, +@@ -709,12 +736,12 @@ + + if (word_en != 0xF) { + ret = Efuse_PgPacketWrite(padapter, offset, word_en, newdata, _FALSE); +- DBG_8192C("offset=%x \n",offset); +- DBG_8192C("word_en=%x \n",word_en); ++ DBG_871X("offset=%x \n",offset); ++ DBG_871X("word_en=%x \n",word_en); + + for(i=0;i ++#include ++#include ++#include ++ ++ ++#ifdef CONFIG_AP_MODE ++ ++extern unsigned char RTW_WPA_OUI[]; ++extern unsigned char WMM_OUI[]; ++extern unsigned char WPS_OUI[]; ++extern unsigned char P2P_OUI[]; ++extern unsigned char WFD_OUI[]; ++ ++void init_mlme_ap_info(_adapter *padapter) ++{ ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ ++ _rtw_spinlock_init(&pmlmepriv->bcn_update_lock); ++ ++ //for ACL ++ _rtw_init_queue(&pacl_list->acl_node_q); ++ ++ //pmlmeext->bstart_bss = _FALSE; ++ ++ start_ap_mode(padapter); ++} ++ ++void free_mlme_ap_info(_adapter *padapter) ++{ ++ _irqL irqL; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ //stop_ap_mode(padapter); ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ ++ rtw_sta_flush(padapter); ++ ++ pmlmeinfo->state = _HW_STATE_NOLINK_; ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ //free bc/mc sta_info ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ _rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++} ++ ++static void update_BCNTIM(_adapter *padapter) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ unsigned char *pie = pnetwork_mlmeext->IEs; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ //update TIM IE ++ //if(pstapriv->tim_bitmap) ++ if(_TRUE) ++ { ++ u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u16 tim_bitmap_le; ++ uint offset, tmp_len, tim_ielen, tim_ie_offset, remainder_ielen; ++ ++ tim_bitmap_le = cpu_to_le16(pstapriv->tim_bitmap); ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, _TIM_IE_, &tim_ielen, pnetwork_mlmeext->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && tim_ielen>0) ++ { ++ tim_ielen += 2; ++ ++ premainder_ie = p+tim_ielen; ++ ++ tim_ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - tim_ie_offset - tim_ielen; ++ ++ //append TIM IE from dst_ie offset ++ dst_ie = p; ++ } ++ else ++ { ++ tim_ielen = 0; ++ ++ //calucate head_len ++ offset = _FIXED_IE_LENGTH_; ++ ++ /* get ssid_ie len */ ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SSID_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ offset += tmp_len+2; ++ ++ // get supported rates len ++ p = rtw_get_ie(pie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &tmp_len, (pnetwork_mlmeext->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ offset += tmp_len+2; ++ } ++ ++ //DS Parameter Set IE, len=3 ++ offset += 3; ++ ++ premainder_ie = pie + offset; ++ ++ remainder_ielen = pnetwork_mlmeext->IELength - offset - tim_ielen; ++ ++ //append TIM IE from offset ++ dst_ie = pie + offset; ++ ++ } ++ ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=_TIM_IE_; ++ ++ if((pstapriv->tim_bitmap&0xff00) && (pstapriv->tim_bitmap&0x00fc)) ++ tim_ielen = 5; ++ else ++ tim_ielen = 4; ++ ++ *dst_ie++= tim_ielen; ++ ++ *dst_ie++=0;//DTIM count ++ *dst_ie++=1;//DTIM peroid ++ ++ if(pstapriv->tim_bitmap&BIT(0))//for bc/mc frames ++ *dst_ie++ = BIT(0);//bitmap ctrl ++ else ++ *dst_ie++ = 0; ++ ++ if(tim_ielen==4) ++ { ++ *dst_ie++ = *(u8*)&tim_bitmap_le; ++ } ++ else if(tim_ielen==5) ++ { ++ _rtw_memcpy(dst_ie, &tim_bitmap_le, 2); ++ dst_ie+=2; ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork_mlmeext->IELength = offset + remainder_ielen; ++ ++ } ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ set_tx_beacon_cmd(padapter); ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++ ++} ++ ++void rtw_add_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index, u8 *data, u8 len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 bmatch = _FALSE; ++ u8 *pie = pnetwork->IEs; ++ u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ u32 i, offset, ielen, ie_offset, remainder_ielen = 0; ++ ++ for (i = sizeof(NDIS_802_11_FIXED_IEs); i < pnetwork->IELength;) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(pnetwork->IEs + i); ++ ++ if (pIE->ElementID > index) ++ { ++ break; ++ } ++ else if(pIE->ElementID == index) // already exist the same IE ++ { ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ bmatch = _TRUE; ++ break; ++ } ++ ++ p = (u8 *)pIE; ++ ielen = pIE->Length; ++ i += (pIE->Length + 2); ++ } ++ ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ if(bmatch) ++ dst_ie = p; ++ else ++ dst_ie = (p+ielen); ++ } ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ *dst_ie++=index; ++ *dst_ie++=len; ++ ++ _rtw_memcpy(dst_ie, data, len); ++ dst_ie+=len; ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++void rtw_remove_bcn_ie(_adapter *padapter, WLAN_BSSID_EX *pnetwork, u8 index) ++{ ++ u8 *p, *dst_ie, *premainder_ie=NULL, *pbackup_remainder_ie=NULL; ++ uint offset, ielen, ie_offset, remainder_ielen = 0; ++ u8 *pie = pnetwork->IEs; ++ ++ p = rtw_get_ie(pie + _FIXED_IE_LENGTH_, index, &ielen, pnetwork->IELength - _FIXED_IE_LENGTH_); ++ if (p != NULL && ielen>0) ++ { ++ ielen += 2; ++ ++ premainder_ie = p+ielen; ++ ++ ie_offset = (sint)(p -pie); ++ ++ remainder_ielen = pnetwork->IELength - ie_offset - ielen; ++ ++ dst_ie = p; ++ } ++ else { ++ return; ++ } ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie && premainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ //copy remainder IE ++ if(pbackup_remainder_ie) ++ { ++ _rtw_memcpy(dst_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ } ++ ++ offset = (uint)(dst_ie - pie); ++ pnetwork->IELength = offset + remainder_ielen; ++} ++ ++ ++u8 chk_sta_is_alive(struct sta_info *psta); ++u8 chk_sta_is_alive(struct sta_info *psta) ++{ ++ u8 ret = _FALSE; ++ #ifdef DBG_EXPIRATION_CHK ++ DBG_871X("sta:"MAC_FMT", rssi:%d, rx:"STA_PKTS_FMT", expire_to:%u, %s%ssq_len:%u\n" ++ , MAC_ARG(psta->hwaddr) ++ , psta->rssi_stat.UndecoratedSmoothedPWDB ++ //, STA_RX_PKTS_ARG(psta) ++ , STA_RX_PKTS_DIFF_ARG(psta) ++ , psta->expire_to ++ , psta->state&WIFI_SLEEP_STATE?"PS, ":"" ++ , psta->state&WIFI_STA_ALIVE_CHK_STATE?"SAC, ":"" ++ , psta->sleepq_len ++ ); ++ #endif ++ ++ //if(sta_last_rx_pkts(psta) == sta_rx_pkts(psta)) ++ if((psta->sta_stats.last_rx_data_pkts + psta->sta_stats.last_rx_ctrl_pkts) == (psta->sta_stats.rx_data_pkts + psta->sta_stats.rx_ctrl_pkts)) ++ { ++ #if 0 ++ if(psta->state&WIFI_SLEEP_STATE) ++ ret = _TRUE; ++ #endif ++ } ++ else ++ { ++ ret = _TRUE; ++ } ++ ++ sta_update_last_rx_pkts(psta); ++ ++ return ret; ++} ++ ++void expire_timeout_chk(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 updated; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ phead = &pstapriv->auth_list; ++ plist = get_next(phead); ++ ++ //check auth_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" auth_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->auth_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, auth_list); ++ plist = get_next(plist); ++ ++ if(psta->expire_to>0) ++ { ++ psta->expire_to--; ++ if (psta->expire_to == 0) ++ { ++ rtw_list_delete(&psta->auth_list); ++ pstapriv->auth_list_cnt--; ++ ++ DBG_871X("auth expire %02X%02X%02X%02X%02X%02X\n", ++ psta->hwaddr[0],psta->hwaddr[1],psta->hwaddr[2],psta->hwaddr[3],psta->hwaddr[4],psta->hwaddr[5]); ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ _enter_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ } ++ } ++ ++ } ++ ++ _exit_critical_bh(&pstapriv->auth_list_lock, &irqL); ++ ++ psta = NULL; ++ ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ #ifdef DBG_EXPIRATION_CHK ++ if (rtw_end_of_queue_search(phead, plist) == _FALSE) { ++ DBG_871X(FUNC_NDEV_FMT" asoc_list, cnt:%u\n" ++ , FUNC_NDEV_ARG(padapter->pnetdev), pstapriv->asoc_list_cnt); ++ } ++ #endif ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ if (chk_sta_is_alive(psta) || !psta->expire_to) { ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ #ifdef CONFIG_TX_MCAST2UNI ++ psta->under_exist_checking = 0; ++ #endif // CONFIG_TX_MCAST2UNI ++ } else { ++ psta->expire_to--; ++ } ++ ++#ifndef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_TX_MCAST2UNI ++ if ( (psta->flags & WLAN_STA_HT) && (psta->htpriv.agg_enable_bitmap || psta->under_exist_checking) ) { ++ // check sta by delba(addba) for 11n STA ++ // ToDo: use CCX report to check for all STAs ++ //DBG_871X("asoc check by DELBA/ADDBA! (pstapriv->expire_to=%d s)(psta->expire_to=%d s), [%02x, %d]\n", pstapriv->expire_to*2, psta->expire_to*2, psta->htpriv.agg_enable_bitmap, psta->under_exist_checking); ++ ++ if ( psta->expire_to <= (pstapriv->expire_to - 50 ) ) { ++ DBG_871X("asoc expire by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 0; ++ psta->expire_to = 0; ++ } else if ( psta->expire_to <= (pstapriv->expire_to - 3) && (psta->under_exist_checking==0)) { ++ DBG_871X("asoc check by DELBA/ADDBA! (%d s)\n", (pstapriv->expire_to-psta->expire_to)*2); ++ psta->under_exist_checking = 1; ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ } ++ } ++#endif // CONFIG_TX_MCAST2UNI ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ ++ if (psta->expire_to <= 0) ++ { ++ #ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ ++ if (padapter->registrypriv.wifi_spec == 1) ++ { ++ psta->expire_to = pstapriv->expire_to; ++ continue; ++ } ++ ++ if (psta->state & WIFI_SLEEP_STATE) { ++ if (!(psta->state & WIFI_STA_ALIVE_CHK_STATE)) { ++ //to check if alive by another methods if staion is at ps mode. ++ psta->expire_to = pstapriv->expire_to; ++ psta->state |= WIFI_STA_ALIVE_CHK_STATE; ++ ++ //DBG_871X("alive chk, sta:" MAC_FMT " is at ps mode!\n", MAC_ARG(psta->hwaddr)); ++ ++ //to update bcn with tim_bitmap for this station ++ pstapriv->tim_bitmap |= BIT(psta->aid); ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ ++ if(!pmlmeext->active_keep_alive_check) ++ continue; ++ } ++ } ++ ++ if (pmlmeext->active_keep_alive_check) { ++ int stainfo_offset; ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ ++ continue; ++ } ++ #endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ else ++ { ++ /* TODO: Aging mechanism to digest frames in sleep_q to avoid running out of xmitframe */ ++ if (psta->sleepq_len > (NR_XMITFRAME/pstapriv->asoc_list_cnt) ++ && padapter->xmitpriv.free_xmitframe_cnt < (NR_XMITFRAME/pstapriv->asoc_list_cnt/2) ++ ){ ++ DBG_871X("%s sta:"MAC_FMT", sleepq_len:%u, free_xmitframe_cnt:%u, asoc_list_cnt:%u, clear sleep_q\n", __func__ ++ , MAC_ARG(psta->hwaddr) ++ , psta->sleepq_len, padapter->xmitpriv.free_xmitframe_cnt, pstapriv->asoc_list_cnt); ++ wakeup_sta_to_xmit(padapter, psta); ++ } ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++if (chk_alive_num) { ++ ++ u8 backup_oper_channel=0; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ /* switch to correct channel of current network before issue keep-alive frames */ ++ if (rtw_get_oper_ch(padapter) != pmlmeext->cur_channel) { ++ backup_oper_channel = rtw_get_oper_ch(padapter); ++ SelectChannel(padapter, pmlmeext->cur_channel); ++ } ++ ++ /* issue null data to check sta alive*/ ++ for (i = 0; i < chk_alive_num; i++) { ++ ++ int ret = _FAIL; ++ ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ if(!(psta->state &_FW_LINKED)) ++ continue; ++ ++ if (psta->state & WIFI_SLEEP_STATE) ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 1, 50); ++ else ++ ret = issue_nulldata(padapter, psta->hwaddr, 0, 3, 50); ++ ++ psta->keep_alive_trycnt++; ++ if (ret == _SUCCESS) ++ { ++ DBG_871X("asoc check, sta(" MAC_FMT ") is alive\n", MAC_ARG(psta->hwaddr)); ++ psta->expire_to = pstapriv->expire_to; ++ psta->keep_alive_trycnt = 0; ++ continue; ++ } ++ else if (psta->keep_alive_trycnt <= 3) ++ { ++ DBG_871X("ack check for asoc expire, keep_alive_trycnt=%d\n", psta->keep_alive_trycnt); ++ psta->expire_to = 1; ++ continue; ++ } ++ ++ psta->keep_alive_trycnt = 0; ++ ++ DBG_871X("asoc expire "MAC_FMT", state=0x%x\n", MAC_ARG(psta->hwaddr), psta->state); ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ if (rtw_is_list_empty(&psta->asoc_list)==_FALSE) { ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ updated = ap_free_sta(padapter, psta, _FALSE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++ if (backup_oper_channel>0) /* back to the original operation channel */ ++ SelectChannel(padapter, backup_oper_channel); ++} ++#endif /* CONFIG_ACTIVE_KEEP_ALIVE_CHECK */ ++ ++ associated_clients_update(padapter, updated); ++} ++ ++ ++static void add_RATid(_adapter *padapter, struct sta_info *psta) ++{ ++ int i; ++ u8 rf_type; ++ u32 init_rate=0; ++ unsigned char sta_band = 0, raid, shortGIrate = _FALSE; ++ unsigned char limit; ++ unsigned int tx_ra_bitmap=0; ++ struct ht_priv *psta_ht = NULL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ ++ ++ if(psta) ++ psta_ht = &psta->htpriv; ++ else ++ return; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset); i++) ++ { ++ if (psta->bssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ //n mode ra_bitmap ++ if(psta_ht->ht_option) ++ { ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ if(rf_type == RF_2T2R) ++ limit=16;// 2R ++ else ++ limit=8;// 1R ++ ++ for (i=0; iht_cap.supp_mcs_set[i/8] & BIT(i%8)) ++ tx_ra_bitmap |= BIT(i+12); ++ } ++ ++ //max short GI rate ++ shortGIrate = psta_ht->sgi; ++ } ++ ++ ++#if 0//gtest ++ if(get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R) ++ { ++ //is this a 2r STA? ++ if((pstat->tx_ra_bitmap & 0x0ff00000) != 0 && !(priv->pshare->has_2r_sta & BIT(pstat->aid))) ++ { ++ priv->pshare->has_2r_sta |= BIT(pstat->aid); ++ if(rtw_read16(padapter, 0x102501f6) != 0xffff) ++ { ++ rtw_write16(padapter, 0x102501f6, 0xffff); ++ reset_1r_sta_RA(priv, 0xffff); ++ Switch_1SS_Antenna(priv, 3); ++ } ++ } ++ else// bg or 1R STA? ++ { ++ if((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len && priv->pshare->has_2r_sta == 0) ++ { ++ if(rtw_read16(padapter, 0x102501f6) != 0x7777) ++ { // MCS7 SGI ++ rtw_write16(padapter, 0x102501f6,0x7777); ++ reset_1r_sta_RA(priv, 0x7777); ++ Switch_1SS_Antenna(priv, 2); ++ } ++ } ++ } ++ ++ } ++ ++ if ((pstat->rssi_level < 1) || (pstat->rssi_level > 3)) ++ { ++ if (pstat->rssi >= priv->pshare->rf_ft_var.raGoDownUpper) ++ pstat->rssi_level = 1; ++ else if ((pstat->rssi >= priv->pshare->rf_ft_var.raGoDown20MLower) || ++ ((priv->pshare->is_40m_bw) && (pstat->ht_cap_len) && ++ (pstat->rssi >= priv->pshare->rf_ft_var.raGoDown40MLower) && ++ (pstat->ht_cap_buf.ht_cap_info & cpu_to_le16(_HTCAP_SUPPORT_CH_WDTH_)))) ++ pstat->rssi_level = 2; ++ else ++ pstat->rssi_level = 3; ++ } ++ ++ // rate adaptive by rssi ++ if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11N) && pstat->ht_cap_len) ++ { ++ if ((get_rf_mimo_mode(priv) == MIMO_1T2R) || (get_rf_mimo_mode(priv) == MIMO_1T1R)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x100f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x100ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x100ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x100ff001; ++ ++ break; ++ } ++ } ++ else ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x1f0f0000; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x1f0ff000; ++ break; ++ case 3: ++ if (priv->pshare->is_40m_bw) ++ pstat->tx_ra_bitmap &= 0x000ff005; ++ else ++ pstat->tx_ra_bitmap &= 0x000ff001; ++ ++ break; ++ } ++ ++ // Don't need to mask high rates due to new rate adaptive parameters ++ //if (pstat->is_broadcom_sta) // use MCS12 as the highest rate vs. Broadcom sta ++ // pstat->tx_ra_bitmap &= 0x81ffffff; ++ ++ // NIC driver will report not supporting MCS15 and MCS14 in asoc req ++ //if (pstat->is_rtl8190_sta && !pstat->is_2t_mimo_sta) ++ // pstat->tx_ra_bitmap &= 0x83ffffff; // if Realtek 1x2 sta, don't use MCS15 and MCS14 ++ } ++ } ++ else if ((priv->pmib->dot11BssType.net_work_type & WIRELESS_11G) && isErpSta(pstat)) ++ { ++ switch (pstat->rssi_level) { ++ case 1: ++ pstat->tx_ra_bitmap &= 0x00000f00; ++ break; ++ case 2: ++ pstat->tx_ra_bitmap &= 0x00000ff0; ++ break; ++ case 3: ++ pstat->tx_ra_bitmap &= 0x00000ff5; ++ break; ++ } ++ } ++ else ++ { ++ pstat->tx_ra_bitmap &= 0x0000000d; ++ } ++ ++ // disable tx short GI when station cannot rx MCS15(AP is 2T2R) ++ // disable tx short GI when station cannot rx MCS7 (AP is 1T2R or 1T1R) ++ // if there is only 1r STA and we are 2T2R, DO NOT mask SGI rate ++ if ((!(pstat->tx_ra_bitmap & 0x8000000) && (priv->pshare->has_2r_sta > 0) && (get_rf_mimo_mode(padapter) == RTL8712_RF_2T2R)) || ++ (!(pstat->tx_ra_bitmap & 0x80000) && (get_rf_mimo_mode(padapter) != RTL8712_RF_2T2R))) ++ { ++ pstat->tx_ra_bitmap &= ~BIT(28); ++ } ++#endif ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ // 5G band ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_5N | WIRELESS_11A; ++ else ++ sta_band |= WIRELESS_11A; ++ } else { ++ if (tx_ra_bitmap & 0xffff000) ++ sta_band |= WIRELESS_11_24N | WIRELESS_11G | WIRELESS_11B; ++ else if (tx_ra_bitmap & 0xff0) ++ sta_band |= WIRELESS_11G |WIRELESS_11B; ++ else ++ sta_band |= WIRELESS_11B; ++ } ++ ++ raid = networktype_to_raid(sta_band); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ if (psta->aid < NUM_STA) ++ { ++ u8 arg = 0; ++ ++ arg = psta->mac_id&0x1f; ++ ++ arg |= BIT(7);//support entry 2~31 ++ ++ if (shortGIrate==_TRUE) ++ arg |= BIT(5); ++ ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("%s=> mac_id:%d , raid:%d , bitmap=0x%x, arg=0x%x\n", ++ __FUNCTION__ , psta->mac_id, raid ,tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg); ++ ++ if (shortGIrate==_TRUE) ++ init_rate |= BIT(6); ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ } ++ else ++ { ++ DBG_871X("station aid %d exceed the max number\n", psta->aid); ++ } ++ ++} ++ ++static void update_bmc_sta(_adapter *padapter) ++{ ++ _irqL irqL; ++ u32 init_rate=0; ++ unsigned char network_type, raid; ++ int i, supportRateNum = 0; ++ unsigned int tx_ra_bitmap=0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pcur_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_info *psta = rtw_get_bcmc_stainfo(padapter); ++ ++ if(psta) ++ { ++ psta->aid = 0;//default set to 0 ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid + 1; ++ ++ psta->qos_option = 0; ++ psta->htpriv.ht_option = _FALSE; ++ ++ psta->ieee8021x_blocked = 0; ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ //psta->dot118021XPrivacy = _NO_PRIVACY_;//!!! remove it, because it has been set before this. ++ ++ ++ ++ //prepare for add_RATid ++ supportRateNum = rtw_get_rateset_len((u8*)&pcur_network->SupportedRates); ++ network_type = rtw_check_network_type((u8*)&pcur_network->SupportedRates, supportRateNum, 1); ++ ++ _rtw_memcpy(psta->bssrateset, &pcur_network->SupportedRates, supportRateNum); ++ psta->bssratelen = supportRateNum; ++ ++ //b/g mode ra_bitmap ++ for (i=0; ibssrateset[i]) ++ tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f); ++ } ++ ++ if ( pcur_network->Configuration.DSConfig > 14 ) { ++ //force to A mode. 5G doesn't support CCK rates ++ network_type = WIRELESS_11A; ++ tx_ra_bitmap = 0x150; // 6, 12, 24 Mbps ++ } else { ++ //force to b mode ++ network_type = WIRELESS_11B; ++ tx_ra_bitmap = 0xf; ++ } ++ ++ //tx_ra_bitmap = update_basic_rate(pcur_network->SupportedRates, supportRateNum); ++ ++ raid = networktype_to_raid(network_type); ++ init_rate = get_highest_rate_idx(tx_ra_bitmap&0x0fffffff)&0x3f; ++ ++ //DBG_871X("Add id %d val %08x to ratr for bmc sta\n", psta->aid, tx_ra_bitmap); ++ ++ //if(pHalData->fw_ractrl == _TRUE) ++ { ++ u8 arg = 0; ++ ++ arg = psta->mac_id&0x1f; ++ ++ arg |= BIT(7); ++ ++ //if (shortGIrate==_TRUE) ++ // arg |= BIT(5); ++ ++ tx_ra_bitmap |= ((raid<<28)&0xf0000000); ++ ++ DBG_871X("update_bmc_sta, mask=0x%x, arg=0x%x\n", tx_ra_bitmap, arg); ++ ++ //bitmap[0:27] = tx_rate_bitmap ++ //bitmap[28:31]= Rate Adaptive id ++ //arg[0:4] = macid ++ //arg[5] = Short GI ++ rtw_hal_add_ra_tid(padapter, tx_ra_bitmap, arg); ++ ++ } ++ ++ //set ra_id, init_rate ++ psta->raid = raid; ++ psta->init_rate = init_rate; ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state = _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ } ++ else ++ { ++ DBG_871X("add_RATid_bmc_sta error!\n"); ++ } ++ ++} ++ ++//notes: ++//AID: 1~MAX for sta and 0 for bc/mc in ap/adhoc mode ++//MAC_ID = AID+1 for sta in ap/adhoc mode ++//MAC_ID = 1 for bc/mc for sta/ap/adhoc ++//MAC_ID = 0 for bssid for sta/ap/adhoc ++//CAM_ID = //0~3 for default key, cmd_id=macid + 3, macid=aid+1; ++ ++void update_sta_info_apmode(_adapter *padapter, struct sta_info *psta) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ struct ht_priv *phtpriv_sta = &psta->htpriv; ++ ++ //set intf_tag to if1 ++ //psta->intf_tag = 0; ++ ++ //psta->mac_id = psta->aid+4; ++ psta->mac_id = psta->aid+1; ++ ++ if(psecuritypriv->dot11AuthAlgrthm==dot11AuthAlgrthm_8021X) ++ psta->ieee8021x_blocked = _TRUE; ++ else ++ psta->ieee8021x_blocked = _FALSE; ++ ++ ++ //update sta's cap ++ ++ //ERP ++ VCS_update(padapter, psta); ++ ++ //HT related cap ++ if(phtpriv_sta->ht_option) ++ { ++ //check if sta supports rx ampdu ++ phtpriv_sta->ampdu_enable = phtpriv_ap->ampdu_enable; ++ ++ //check if sta support s Short GI ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SGI_20|IEEE80211_HT_CAP_SGI_40)) ++ { ++ phtpriv_sta->sgi = _TRUE; ++ } ++ ++ // bwmode ++ if((phtpriv_sta->ht_cap.cap_info & phtpriv_ap->ht_cap.cap_info) & cpu_to_le16(IEEE80211_HT_CAP_SUP_WIDTH)) ++ { ++ //phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_40; ++ phtpriv_sta->bwmode = pmlmeext->cur_bwmode; ++ phtpriv_sta->ch_offset = pmlmeext->cur_ch_offset; ++ ++ } ++ ++ psta->qos_option = _TRUE; ++ ++ } ++ else ++ { ++ phtpriv_sta->ampdu_enable = _FALSE; ++ ++ phtpriv_sta->sgi = _FALSE; ++ phtpriv_sta->bwmode = HT_CHANNEL_WIDTH_20; ++ phtpriv_sta->ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ } ++ ++ //Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ phtpriv_sta->agg_enable_bitmap = 0x0;//reset ++ phtpriv_sta->candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //todo: init other variables ++ ++ _rtw_memset((void*)&psta->sta_stats, 0, sizeof(struct stainfo_stats)); ++ ++ ++ //add ratid ++ //add_RATid(padapter, psta);//move to ap_sta_info_defer_update() ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state |= _FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ ++} ++ ++static void update_hw_ht_param(_adapter *padapter) ++{ ++ unsigned char max_AMPDU_len; ++ unsigned char min_MPDU_spacing; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ ++ //handle A-MPDU parameter field ++ /* ++ AMPDU_para [1:0]:Max AMPDU Len => 0:8k , 1:16k, 2:32k, 3:64k ++ AMPDU_para [4:2]:Min MPDU Start Spacing ++ */ ++ max_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03; ++ ++ min_MPDU_spacing = (pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x1c) >> 2; ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MIN_SPACE, (u8 *)(&min_MPDU_spacing)); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&max_AMPDU_len)); ++ ++ // ++ // Config SM Power Save setting ++ // ++ pmlmeinfo->SM_PS = (pmlmeinfo->HT_caps.u.HT_cap_element.HT_caps_info & 0x0C) >> 2; ++ if(pmlmeinfo->SM_PS == WLAN_HT_CAP_SM_PS_STATIC) ++ { ++ /*u8 i; ++ //update the MCS rates ++ for (i = 0; i < 16; i++) ++ { ++ pmlmeinfo->HT_caps.HT_cap_element.MCS_rate[i] &= MCS_rate_1R[i]; ++ }*/ ++ DBG_871X("%s(): WLAN_HT_CAP_SM_PS_STATIC\n",__FUNCTION__); ++ } ++ ++ // ++ // Config current HT Protection mode. ++ // ++ //pmlmeinfo->HT_protection = pmlmeinfo->HT_info.infos[1] & 0x3; ++ ++} ++ ++static void start_bss_network(_adapter *padapter, u8 *pbuf) ++{ ++ u8 *p; ++ u8 val8, cur_channel, cur_bwmode, cur_ch_offset; ++ u16 bcn_interval; ++ u32 acparm; ++ int ie_len; ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ WLAN_BSSID_EX *pnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork_mlmeext = &(pmlmeinfo->network); ++ struct HT_info_element *pht_info=NULL; ++#ifdef CONFIG_P2P ++ struct wifidirect_info *pwdinfo = &(padapter->wdinfo); ++#endif //CONFIG_P2P ++ u8 cbw40_enable=0; ++ u8 change_band = _FALSE; ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ bcn_interval = (u16)pnetwork->Configuration.BeaconPeriod; ++ cur_channel = pnetwork->Configuration.DSConfig; ++ cur_bwmode = HT_CHANNEL_WIDTH_20;; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ ++ //check if there is wps ie, ++ //if there is wpsie in beacon, the hostapd will update beacon twice when stating hostapd, ++ //and at first time the security ie ( RSN/WPA IE) will not include in beacon. ++ if(NULL == rtw_get_wps_ie(pnetwork->IEs+_FIXED_IE_LENGTH_, pnetwork->IELength-_FIXED_IE_LENGTH_, NULL, NULL)) ++ { ++ pmlmeext->bstart_bss = _TRUE; ++ } ++ ++ //todo: update wmm, ht cap ++ //pmlmeinfo->WMM_enable; ++ //pmlmeinfo->HT_enable; ++ if(pmlmepriv->qospriv.qos_option) ++ pmlmeinfo->WMM_enable = _TRUE; ++ ++ if(pmlmepriv->htpriv.ht_option) ++ { ++ pmlmeinfo->WMM_enable = _TRUE; ++ pmlmeinfo->HT_enable = _TRUE; ++ //pmlmeinfo->HT_info_enable = _TRUE; ++ //pmlmeinfo->HT_caps_enable = _TRUE; ++ ++ update_hw_ht_param(padapter); ++ } ++ ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ //WEP Key will be set before this function, do not clear CAM. ++ if ((psecuritypriv->dot11PrivacyAlgrthm != _WEP40_) && (psecuritypriv->dot11PrivacyAlgrthm != _WEP104_)) ++ flush_all_cam_entry(padapter); //clear CAM ++ } ++ ++ //set MSR to AP_Mode ++ Set_MSR(padapter, _HW_STATE_AP_); ++ ++ //Set BSSID REG ++ rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pnetwork->MacAddress); ++ ++ //Set EDCA param reg ++#ifdef CONFIG_CONCURRENT_MODE ++ acparm = 0x005ea42b; ++#else ++ acparm = 0x002F3217; // VO ++#endif ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VO, (u8 *)(&acparm)); ++ acparm = 0x005E4317; // VI ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_VI, (u8 *)(&acparm)); ++ //acparm = 0x00105320; // BE ++ acparm = 0x005ea42b; ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BE, (u8 *)(&acparm)); ++ acparm = 0x0000A444; // BK ++ rtw_hal_set_hwreg(padapter, HW_VAR_AC_PARAM_BK, (u8 *)(&acparm)); ++ ++ //Set Security ++ val8 = (psecuritypriv->dot11AuthAlgrthm == dot11AuthAlgrthm_8021X)? 0xcc: 0xcf; ++ rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8)); ++ ++ //Beacon Control related register ++ rtw_hal_set_hwreg(padapter, HW_VAR_BEACON_INTERVAL, (u8 *)(&bcn_interval)); ++ ++ if(pmlmepriv->cur_network.join_res != _TRUE) //setting only at first time ++ { ++ u32 initialgain; ++ ++ initialgain = 0x1e; ++ ++ ++ //disable dynamic functions, such as high power, DIG ++ //Save_DM_Func_Flag(padapter); ++ //Switch_DM_Func(padapter, DYNAMIC_FUNC_DISABLE, _FALSE); ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if(padapter->adapter_type > PRIMARY_ADAPTER) ++ { ++ if(rtw_buddy_adapter_up(padapter)) ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ ++ //turn on dynamic functions on PRIMARY_ADAPTER, dynamic functions only runs at PRIMARY_ADAPTER ++ Switch_DM_Func(pbuddy_adapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ rtw_hal_set_hwreg(pbuddy_adapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ } ++ } ++ else ++#endif ++ { ++ //turn on dynamic functions ++ Switch_DM_Func(padapter, DYNAMIC_FUNC_DIG|DYNAMIC_FUNC_HP|DYNAMIC_FUNC_SS, _TRUE); ++ ++ rtw_hal_set_hwreg(padapter, HW_VAR_INITIAL_GAIN, (u8 *)(&initialgain)); ++ } ++ ++ } ++ ++ //set channel, bwmode ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _HT_ADD_INFO_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if( p && ie_len) ++ { ++ pht_info = (struct HT_info_element *)(p+2); ++ ++ if( pmlmeext->cur_channel > 14 ) ++ { ++ if( pregpriv->cbw40_enable & BIT(1) ) ++ cbw40_enable = 1; ++ } ++ else ++ if( pregpriv->cbw40_enable & BIT(0) ) ++ cbw40_enable = 1; ++ ++ if ((cbw40_enable) && (pht_info->infos[0] & BIT(2))) ++ { ++ //switch to the 40M Hz mode ++ //pmlmeext->cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ switch (pht_info->infos[0] & 0x3) ++ { ++ case 1: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ break; ++ ++ case 3: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ break; ++ ++ default: ++ //pmlmeext->cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ break; ++ } ++ ++ } ++ ++ } ++ ++#ifdef CONFIG_DUALMAC_CONCURRENT ++ dc_set_ap_channel_bandwidth(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++#else ++ //TODO: need to judge the phy parameters on concurrent mode for single phy ++ //set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++#ifdef CONFIG_CONCURRENT_MODE ++ if(!check_buddy_fwstate(padapter, _FW_LINKED|_FW_UNDER_LINKING|_FW_UNDER_SURVEY)) ++ { ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ else if(check_buddy_fwstate(padapter, _FW_LINKED)==_TRUE)//only second adapter can enter AP Mode ++ { ++ _adapter *pbuddy_adapter = padapter->pbuddy_adapter; ++ struct mlme_ext_priv *pbuddy_mlmeext = &pbuddy_adapter->mlmeextpriv; ++ ++ //To sync cur_channel/cur_bwmode/cur_ch_offset with primary adapter ++ DBG_871X("primary iface is at linked state, sync cur_channel/cur_bwmode/cur_ch_offset\n"); ++ DBG_871X("primary adapter, CH=%d, BW=%d, offset=%d\n", pbuddy_mlmeext->cur_channel, pbuddy_mlmeext->cur_bwmode, pbuddy_mlmeext->cur_ch_offset); ++ DBG_871X("second adapter, CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ if((cur_channel <= 14 && pbuddy_mlmeext->cur_channel >= 36) || ++ (cur_channel >= 36 && pbuddy_mlmeext->cur_channel <= 14)) ++ change_band = _TRUE; ++ ++ cur_channel = pbuddy_mlmeext->cur_channel; ++ if(cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ if(pht_info) ++ pht_info->infos[0] &= ~(BIT(0)|BIT(1)); ++ ++ if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_40) ++ { ++ cur_ch_offset = pbuddy_mlmeext->cur_ch_offset; ++ ++ //to update cur_ch_offset value in beacon ++ if(pht_info) ++ { ++ switch(cur_ch_offset) ++ { ++ case HAL_PRIME_CHNL_OFFSET_LOWER: ++ pht_info->infos[0] |= 0x1; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_UPPER: ++ pht_info->infos[0] |= 0x3; ++ break; ++ case HAL_PRIME_CHNL_OFFSET_DONT_CARE: ++ default: ++ break; ++ } ++ } ++ ++ } ++ else if(pbuddy_mlmeext->cur_bwmode == HT_CHANNEL_WIDTH_20) ++ { ++ cur_bwmode = HT_CHANNEL_WIDTH_20; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ ++ if(cur_channel>0 && cur_channel<5) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x1; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_LOWER; ++ } ++ ++ if(cur_channel>7 && cur_channel<(14+1)) ++ { ++ if(pht_info) ++ pht_info->infos[0] |= 0x3; ++ ++ cur_bwmode = HT_CHANNEL_WIDTH_40; ++ cur_ch_offset = HAL_PRIME_CHNL_OFFSET_UPPER; ++ } ++ ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++ } ++ ++ } ++ ++ // to update channel value in beacon ++ pnetwork->Configuration.DSConfig = cur_channel; ++ p = rtw_get_ie((pnetwork->IEs + sizeof(NDIS_802_11_FIXED_IEs)), _DSSET_IE_, &ie_len, (pnetwork->IELength - sizeof(NDIS_802_11_FIXED_IEs))); ++ if(p && ie_len>0) ++ *(p + 2) = cur_channel; ++ ++ if(pht_info) ++ pht_info->primary_channel = cur_channel; ++ ++ //set buddy adapter channel, bandwidth, offeset to current adapter ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++ ++ //buddy interface band is different from current interface, update ERP, support rate, ext support rate IE ++ if(change_band == _TRUE) ++ change_band_update_ie(padapter, pnetwork); ++ } ++#else ++ set_channel_bwmode(padapter, cur_channel, cur_ch_offset, cur_bwmode); ++#endif //CONFIG_CONCURRENT_MODE ++ ++ DBG_871X("CH=%d, BW=%d, offset=%d\n", cur_channel, cur_bwmode, cur_ch_offset); ++ ++ // ++ pmlmeext->cur_channel = cur_channel; ++ pmlmeext->cur_bwmode = cur_bwmode; ++ pmlmeext->cur_ch_offset = cur_ch_offset; ++#endif //CONFIG_DUALMAC_CONCURRENT ++ pmlmeext->cur_wireless_mode = pmlmepriv->cur_network.network_type; ++ ++ //update cur_wireless_mode ++ update_wireless_mode(padapter); ++ ++ //update RRSR after set channel and bandwidth ++ UpdateBrateTbl(padapter, pnetwork->SupportedRates); ++ rtw_hal_set_hwreg(padapter, HW_VAR_BASIC_RATE, pnetwork->SupportedRates); ++ ++ //udpate capability after cur_wireless_mode updated ++ update_capinfo(padapter, rtw_get_capability((WLAN_BSSID_EX *)pnetwork)); ++ ++ //let pnetwork_mlmeext == pnetwork_mlme. ++ _rtw_memcpy(pnetwork_mlmeext, pnetwork, pnetwork->Length); ++ ++#ifdef CONFIG_P2P ++ _rtw_memcpy(pwdinfo->p2p_group_ssid, pnetwork->Ssid.Ssid, pnetwork->Ssid.SsidLength); ++ pwdinfo->p2p_group_ssid_len = pnetwork->Ssid.SsidLength; ++#endif //CONFIG_P2P ++ ++ if(_TRUE == pmlmeext->bstart_bss) ++ { ++ update_beacon(padapter, _TIM_IE_, NULL, _FALSE); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN //other case will tx beacon when bcn interrupt coming in. ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ //issue beacon frame ++ if(send_beacon(padapter)==_FAIL) ++ { ++ DBG_871X("issue_beacon, fail!\n"); ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++ } ++ ++ ++ //update bc/mc sta_info ++ update_bmc_sta(padapter); ++ ++ //pmlmeext->bstart_bss = _TRUE; ++ ++} ++ ++int rtw_check_beacon_data(_adapter *padapter, u8 *pbuf, int len) ++{ ++ int ret=_SUCCESS; ++ u8 *p; ++ u8 *pHT_caps_ie=NULL; ++ u8 *pHT_info_ie=NULL; ++ struct sta_info *psta = NULL; ++ u16 cap, ht_cap=_FALSE; ++ uint ie_len = 0; ++ int group_cipher, pairwise_cipher; ++ u8 channel, network_type, supportRate[NDIS_802_11_LENGTH_RATES_EX]; ++ int supportRateNum = 0; ++ u8 OUI1[] = {0x00, 0x50, 0xf2,0x01}; ++ u8 wps_oui[4]={0x0,0x50,0xf2,0x04}; ++ u8 WMM_PARA_IE[] = {0x00, 0x50, 0xf2, 0x02, 0x01, 0x01}; ++ struct registry_priv *pregistrypriv = &padapter->registrypriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ WLAN_BSSID_EX *pbss_network = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ u8 *ie = pbss_network->IEs; ++ ++ ++ /* SSID */ ++ /* Supported rates */ ++ /* DS Params */ ++ /* WLAN_EID_COUNTRY */ ++ /* ERP Information element */ ++ /* Extended supported rates */ ++ /* WPA/WPA2 */ ++ /* Wi-Fi Wireless Multimedia Extensions */ ++ /* ht_capab, ht_oper */ ++ /* WPS IE */ ++ ++ DBG_871X("%s, len=%d\n", __FUNCTION__, len); ++ ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) != _TRUE) ++ return _FAIL; ++ ++ ++ if(len>MAX_IE_SZ) ++ return _FAIL; ++ ++ pbss_network->IELength = len; ++ ++ _rtw_memset(ie, 0, MAX_IE_SZ); ++ ++ _rtw_memcpy(ie, pbuf, pbss_network->IELength); ++ ++ ++ if(pbss_network->InfrastructureMode!=Ndis802_11APMode) ++ return _FAIL; ++ ++ pbss_network->Rssi = 0; ++ ++ _rtw_memcpy(pbss_network->MacAddress, myid(&(padapter->eeprompriv)), ETH_ALEN); ++ ++ //beacon interval ++ p = rtw_get_beacon_interval_from_ie(ie);//ie + 8; // 8: TimeStamp, 2: Beacon Interval 2:Capability ++ //pbss_network->Configuration.BeaconPeriod = le16_to_cpu(*(unsigned short*)p); ++ pbss_network->Configuration.BeaconPeriod = RTW_GET_LE16(p); ++ ++ //capability ++ //cap = *(unsigned short *)rtw_get_capability_from_ie(ie); ++ //cap = le16_to_cpu(cap); ++ cap = RTW_GET_LE16(ie); ++ ++ //SSID ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SSID_IE_, &ie_len, (pbss_network->IELength -_BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ _rtw_memset(&pbss_network->Ssid, 0, sizeof(NDIS_802_11_SSID)); ++ _rtw_memcpy(pbss_network->Ssid.Ssid, (p + 2), ie_len); ++ pbss_network->Ssid.SsidLength = ie_len; ++ } ++ ++ //chnnel ++ channel = 0; ++ pbss_network->Configuration.Length = 0; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _DSSET_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ channel = *(p + 2); ++ ++ pbss_network->Configuration.DSConfig = channel; ++ ++ ++ _rtw_memset(supportRate, 0, NDIS_802_11_LENGTH_RATES_EX); ++ // get supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _SUPPORTEDRATES_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate, p+2, ie_len); ++ supportRateNum = ie_len; ++ } ++ ++ //get ext_supported rates ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _EXT_SUPPORTEDRATES_IE_, &ie_len, pbss_network->IELength - _BEACON_IE_OFFSET_); ++ if (p != NULL) ++ { ++ _rtw_memcpy(supportRate+supportRateNum, p+2, ie_len); ++ supportRateNum += ie_len; ++ ++ } ++ ++ network_type = rtw_check_network_type(supportRate, supportRateNum, channel); ++ ++ rtw_set_supported_rate(pbss_network->SupportedRates, network_type); ++ ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ ERP_IE_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)p); ++ } ++ ++ //update privacy/security ++ if (cap & BIT(4)) ++ pbss_network->Privacy = 1; ++ else ++ pbss_network->Privacy = 0; ++ ++ psecuritypriv->wpa_psk = 0; ++ ++ //wpa2 ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _RSN_IE_2_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ if(rtw_parse_wpa2_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ psecuritypriv->wpa_psk |= BIT(1); ++ ++ psecuritypriv->wpa2_group_cipher = group_cipher; ++ psecuritypriv->wpa2_pairwise_cipher = pairwise_cipher; ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa2_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa2_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa2_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa2_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ } ++ ++ //wpa ++ ie_len = 0; ++ group_cipher = 0; pairwise_cipher = 0; ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _SSN_IE_1_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if ((p) && (_rtw_memcmp(p+2, OUI1, 4))) ++ { ++ if(rtw_parse_wpa_ie(p, ie_len+2, &group_cipher, &pairwise_cipher) == _SUCCESS) ++ { ++ psecuritypriv->dot11AuthAlgrthm= dot11AuthAlgrthm_8021X; ++ ++ psecuritypriv->dot8021xalg = 1;//psk, todo:802.1x ++ ++ psecuritypriv->wpa_psk |= BIT(0); ++ ++ psecuritypriv->wpa_group_cipher = group_cipher; ++ psecuritypriv->wpa_pairwise_cipher = pairwise_cipher; ++ ++#if 0 ++ switch(group_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_group_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_group_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_group_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_group_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_group_cipher = _WEP104_; ++ break; ++ } ++ ++ switch(pairwise_cipher) ++ { ++ case WPA_CIPHER_NONE: ++ psecuritypriv->wpa_pairwise_cipher = _NO_PRIVACY_; ++ break; ++ case WPA_CIPHER_WEP40: ++ psecuritypriv->wpa_pairwise_cipher = _WEP40_; ++ break; ++ case WPA_CIPHER_TKIP: ++ psecuritypriv->wpa_pairwise_cipher = _TKIP_; ++ break; ++ case WPA_CIPHER_CCMP: ++ psecuritypriv->wpa_pairwise_cipher = _AES_; ++ break; ++ case WPA_CIPHER_WEP104: ++ psecuritypriv->wpa_pairwise_cipher = _WEP104_; ++ break; ++ } ++#endif ++ } ++ ++ break; ++ ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ ++ } ++ ++ //wmm ++ ie_len = 0; ++ pmlmepriv->qospriv.qos_option = 0; ++ if(pregistrypriv->wmm_enable) ++ { ++ for (p = ie + _BEACON_IE_OFFSET_; ;p += (ie_len + 2)) ++ { ++ p = rtw_get_ie(p, _VENDOR_SPECIFIC_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_ - (ie_len + 2))); ++ if((p) && _rtw_memcmp(p+2, WMM_PARA_IE, 6)) ++ { ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ *(p+8) |= BIT(7);//QoS Info, support U-APSD ++ ++ /* disable all ACM bits since the WMM admission control is not supported */ ++ *(p + 10) &= ~BIT(4); /* BE */ ++ *(p + 14) &= ~BIT(4); /* BK */ ++ *(p + 18) &= ~BIT(4); /* VI */ ++ *(p + 22) &= ~BIT(4); /* VO */ ++ ++ break; ++ } ++ ++ if ((p == NULL) || (ie_len == 0)) ++ { ++ break; ++ } ++ } ++ } ++ ++ //parsing HT_CAP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_CAPABILITY_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ u8 rf_type; ++ ++ struct rtw_ieee80211_ht_cap *pht_cap = (struct rtw_ieee80211_ht_cap *)(p+2); ++ ++ pHT_caps_ie=p; ++ ++ ++ ht_cap = _TRUE; ++ network_type |= WIRELESS_11_24N; ++ ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type)); ++ ++ if((psecuritypriv->wpa_pairwise_cipher & WPA_CIPHER_CCMP) || ++ (psecuritypriv->wpa2_pairwise_cipher & WPA_CIPHER_CCMP)) ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&(0x07<<2)); ++ } ++ else ++ { ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_DENSITY&0x00); ++ } ++ ++ pht_cap->ampdu_params_info |= (IEEE80211_HT_CAP_AMPDU_FACTOR & 0x03); //set Max Rx AMPDU size to 64K ++ ++ if(rf_type == RF_1T1R) ++ { ++ pht_cap->supp_mcs_set[0] = 0xff; ++ pht_cap->supp_mcs_set[1] = 0x0; ++ } ++ ++ _rtw_memcpy(&pmlmepriv->htpriv.ht_cap, p+2, ie_len); ++ ++ } ++ ++ //parsing HT_INFO_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _HT_ADD_INFO_IE_, &ie_len, (pbss_network->IELength - _BEACON_IE_OFFSET_)); ++ if(p && ie_len>0) ++ { ++ pHT_info_ie=p; ++ } ++ ++ switch(network_type) ++ { ++ case WIRELESS_11B: ++ pbss_network->NetworkTypeInUse = Ndis802_11DS; ++ break; ++ case WIRELESS_11G: ++ case WIRELESS_11BG: ++ case WIRELESS_11G_24N: ++ case WIRELESS_11BG_24N: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ case WIRELESS_11A: ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM5; ++ break; ++ default : ++ pbss_network->NetworkTypeInUse = Ndis802_11OFDM24; ++ break; ++ } ++ ++ pmlmepriv->cur_network.network_type = network_type; ++ ++ ++ pmlmepriv->htpriv.ht_option = _FALSE; ++#ifdef CONFIG_80211N_HT ++ if( (psecuritypriv->wpa2_pairwise_cipher&WPA_CIPHER_TKIP) || ++ (psecuritypriv->wpa_pairwise_cipher&WPA_CIPHER_TKIP)) ++ { ++ //todo: ++ //ht_cap = _FALSE; ++ } ++ ++ //ht_cap ++ if(pregistrypriv->ht_enable && ht_cap==_TRUE) ++ { ++ pmlmepriv->htpriv.ht_option = _TRUE; ++ pmlmepriv->qospriv.qos_option = 1; ++ ++ if(pregistrypriv->ampdu_enable==1) ++ { ++ pmlmepriv->htpriv.ampdu_enable = _TRUE; ++ } ++ ++ HT_caps_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_caps_ie); ++ ++ HT_info_handler(padapter, (PNDIS_802_11_VARIABLE_IEs)pHT_info_ie); ++ } ++#endif ++ ++ ++ pbss_network->Length = get_WLAN_BSSID_EX_sz((WLAN_BSSID_EX *)pbss_network); ++ ++ //issue beacon to start bss network ++ start_bss_network(padapter, (u8*)pbss_network); ++ ++ ++ //alloc sta_info for ap itself ++ psta = rtw_get_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if(!psta) ++ { ++ psta = rtw_alloc_stainfo(&padapter->stapriv, pbss_network->MacAddress); ++ if (psta == NULL) ++ { ++ return _FAIL; ++ } ++ } ++ psta->state |= WIFI_AP_STATE; //Aries, add,fix bug of flush_cam_entry at STOP AP mode , 0724 ++ rtw_indicate_connect( padapter); ++ ++ pmlmepriv->cur_network.join_res = _TRUE;//for check if already set beacon ++ ++ //update bc/mc sta_info ++ //update_bmc_sta(padapter); ++ ++ return ret; ++ ++} ++ ++void rtw_set_macaddr_acl(_adapter *padapter, int mode) ++{ ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ DBG_871X("%s, mode=%d\n", __func__, mode); ++ ++ pacl_list->mode = mode; ++} ++ ++int rtw_acl_add_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ u8 added = _FALSE; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ if((NUM_ACL-1) < pacl_list->num) ++ return (-1); ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ added = _TRUE; ++ DBG_871X("%s, sta has been added\n", __func__); ++ break; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ ++ if(added == _TRUE) ++ return ret; ++ ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ for(i=0; i< NUM_ACL; i++) ++ { ++ paclnode = &pacl_list->aclnode[i]; ++ ++ if(paclnode->valid == _FALSE) ++ { ++ _rtw_init_listhead(&paclnode->list); ++ ++ _rtw_memcpy(paclnode->addr, addr, ETH_ALEN); ++ ++ paclnode->valid = _TRUE; ++ ++ rtw_list_insert_tail(&paclnode->list, get_list_head(pacl_node_q)); ++ ++ pacl_list->num++; ++ ++ break; ++ } ++ } ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ return ret; ++} ++ ++int rtw_acl_remove_sta(_adapter *padapter, u8 *addr) ++{ ++ _irqL irqL; ++ _list *plist, *phead; ++ int i, ret=0; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ DBG_871X("%s(acl_num=%d)=" MAC_FMT "\n", __func__, pacl_list->num, MAC_ARG(addr)); ++ ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(_rtw_memcmp(paclnode->addr, addr, ETH_ALEN)) ++ { ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ } ++ ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, acl_num=%d\n", __func__, pacl_list->num); ++ ++ return ret; ++ ++} ++ ++#ifdef CONFIG_NATIVEAP_MLME ++ ++static void update_bcn_fixed_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_erpinfo_ie(_adapter *padapter) ++{ ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *p, *ie = pnetwork->IEs; ++ u32 len = 0; ++ ++ DBG_871X("%s, ERP_enable=%d\n", __FUNCTION__, pmlmeinfo->ERP_enable); ++ ++ if(!pmlmeinfo->ERP_enable) ++ return; ++ ++ //parsing ERP_IE ++ p = rtw_get_ie(ie + _BEACON_IE_OFFSET_, _ERPINFO_IE_, &len, (pnetwork->IELength - _BEACON_IE_OFFSET_)); ++ if(p && len>0) ++ { ++ PNDIS_802_11_VARIABLE_IEs pIE = (PNDIS_802_11_VARIABLE_IEs)p; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ pIE->data[0] |= RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_NON_ERP_PRESENT|RTW_ERP_INFO_USE_PROTECTION); ++ ++ if(pmlmepriv->num_sta_no_short_preamble > 0) ++ pIE->data[0] |= RTW_ERP_INFO_BARKER_PREAMBLE_MODE; ++ else ++ pIE->data[0] &= ~(RTW_ERP_INFO_BARKER_PREAMBLE_MODE); ++ ++ ERP_IE_handler(padapter, pIE); ++ } ++ ++} ++ ++static void update_bcn_htcap_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_htinfo_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_rsn_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wpa_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wmm_ie(_adapter *padapter) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++} ++ ++static void update_bcn_wps_ie(_adapter *padapter) ++{ ++ u8 *pwps_ie=NULL, *pwps_ie_src, *premainder_ie, *pbackup_remainder_ie=NULL; ++ uint wps_ielen=0, wps_offset, remainder_ielen; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ WLAN_BSSID_EX *pnetwork = &(pmlmeinfo->network); ++ unsigned char *ie = pnetwork->IEs; ++ u32 ielen = pnetwork->IELength; ++ ++ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ pwps_ie = rtw_get_wps_ie(ie+_FIXED_IE_LENGTH_, ielen-_FIXED_IE_LENGTH_, NULL, &wps_ielen); ++ ++ if(pwps_ie==NULL || wps_ielen==0) ++ return; ++ ++ wps_offset = (uint)(pwps_ie-ie); ++ ++ premainder_ie = pwps_ie + wps_ielen; ++ ++ remainder_ielen = ielen - wps_offset - wps_ielen; ++ ++ if(remainder_ielen>0) ++ { ++ pbackup_remainder_ie = rtw_malloc(remainder_ielen); ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pbackup_remainder_ie, premainder_ie, remainder_ielen); ++ } ++ ++ ++ pwps_ie_src = pmlmepriv->wps_beacon_ie; ++ if(pwps_ie_src == NULL) ++ return; ++ ++ ++ wps_ielen = (uint)pwps_ie_src[1];//to get ie data len ++ if((wps_offset+wps_ielen+2+remainder_ielen)<=MAX_IE_SZ) ++ { ++ _rtw_memcpy(pwps_ie, pwps_ie_src, wps_ielen+2); ++ pwps_ie += (wps_ielen+2); ++ ++ if(pbackup_remainder_ie) ++ _rtw_memcpy(pwps_ie, pbackup_remainder_ie, remainder_ielen); ++ ++ //update IELength ++ pnetwork->IELength = wps_offset + (wps_ielen+2) + remainder_ielen; ++ } ++ ++ if(pbackup_remainder_ie) ++ rtw_mfree(pbackup_remainder_ie, remainder_ielen); ++ ++} ++ ++static void update_bcn_p2p_ie(_adapter *padapter) ++{ ++ ++} ++ ++static void update_bcn_vendor_spec_ie(_adapter *padapter, u8*oui) ++{ ++ DBG_871X("%s\n", __FUNCTION__); ++ ++ if(_rtw_memcmp(RTW_WPA_OUI, oui, 4)) ++ { ++ update_bcn_wpa_ie(padapter); ++ } ++ else if(_rtw_memcmp(WMM_OUI, oui, 4)) ++ { ++ update_bcn_wmm_ie(padapter); ++ } ++ else if(_rtw_memcmp(WPS_OUI, oui, 4)) ++ { ++ update_bcn_wps_ie(padapter); ++ } ++ else if(_rtw_memcmp(P2P_OUI, oui, 4)) ++ { ++ update_bcn_p2p_ie(padapter); ++ } ++ else ++ { ++ DBG_871X("unknown OUI type!\n"); ++ } ++ ++ ++} ++ ++void update_beacon(_adapter *padapter, u8 ie_id, u8 *oui, u8 tx) ++{ ++ _irqL irqL; ++ struct mlme_priv *pmlmepriv; ++ struct mlme_ext_priv *pmlmeext; ++ //struct mlme_ext_info *pmlmeinfo; ++ ++ //DBG_871X("%s\n", __FUNCTION__); ++ ++ if(!padapter) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ pmlmeext = &(padapter->mlmeextpriv); ++ //pmlmeinfo = &(pmlmeext->mlmext_info); ++ ++ if(_FALSE == pmlmeext->bstart_bss) ++ return; ++ ++ _enter_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++ switch(ie_id) ++ { ++ case 0xFF: ++ ++ update_bcn_fixed_ie(padapter);//8: TimeStamp, 2: Beacon Interval 2:Capability ++ ++ break; ++ ++ case _TIM_IE_: ++ ++ update_BCNTIM(padapter); ++ ++ break; ++ ++ case _ERPINFO_IE_: ++ ++ update_bcn_erpinfo_ie(padapter); ++ ++ break; ++ ++ case _HT_CAPABILITY_IE_: ++ ++ update_bcn_htcap_ie(padapter); ++ ++ break; ++ ++ case _RSN_IE_2_: ++ ++ update_bcn_rsn_ie(padapter); ++ ++ break; ++ ++ case _HT_ADD_INFO_IE_: ++ ++ update_bcn_htinfo_ie(padapter); ++ ++ break; ++ ++ case _VENDOR_SPECIFIC_IE_: ++ ++ update_bcn_vendor_spec_ie(padapter, oui); ++ ++ break; ++ ++ default: ++ break; ++ } ++ ++ pmlmepriv->update_bcn = _TRUE; ++ ++ _exit_critical_bh(&pmlmepriv->bcn_update_lock, &irqL); ++ ++#ifndef CONFIG_INTERRUPT_BASED_TXBCN ++#if defined(CONFIG_USB_HCI) || defined(CONFIG_SDIO_HCI) || defined(CONFIG_GSPI_HCI) ++ if(tx) ++ { ++ //send_beacon(padapter);//send_beacon must execute on TSR level ++ set_tx_beacon_cmd(padapter); ++ } ++#else ++ { ++ //PCI will issue beacon when BCN interrupt occurs. ++ } ++#endif ++#endif //!CONFIG_INTERRUPT_BASED_TXBCN ++ ++} ++ ++#ifdef CONFIG_80211N_HT ++ ++/* ++op_mode ++Set to 0 (HT pure) under the followign conditions ++ - all STAs in the BSS are 20/40 MHz HT in 20/40 MHz BSS or ++ - all STAs in the BSS are 20 MHz HT in 20 MHz BSS ++Set to 1 (HT non-member protection) if there may be non-HT STAs ++ in both the primary and the secondary channel ++Set to 2 if only HT STAs are associated in BSS, ++ however and at least one 20 MHz HT STA is associated ++Set to 3 (HT mixed mode) when one or more non-HT STAs are associated ++ (currently non-GF HT station is considered as non-HT STA also) ++*/ ++static int rtw_ht_operation_update(_adapter *padapter) ++{ ++ u16 cur_op_mode, new_op_mode; ++ int op_mode_changes = 0; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct ht_priv *phtpriv_ap = &pmlmepriv->htpriv; ++ ++ if(pmlmepriv->htpriv.ht_option == _TRUE) ++ return 0; ++ ++ //if (!iface->conf->ieee80211n || iface->conf->ht_op_mode_fixed) ++ // return 0; ++ ++ DBG_871X("%s current operation mode=0x%X\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode); ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) ++ && pmlmepriv->num_sta_ht_no_gf) { ++ pmlmepriv->ht_op_mode |= ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT) && ++ pmlmepriv->num_sta_ht_no_gf == 0) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT; ++ op_mode_changes++; ++ } ++ ++ if (!(pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht || pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode |= HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } else if ((pmlmepriv->ht_op_mode & ++ HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT) && ++ (pmlmepriv->num_sta_no_ht == 0 && !pmlmepriv->olbc_ht)) { ++ pmlmepriv->ht_op_mode &= ++ ~HT_INFO_OPERATION_MODE_NON_HT_STA_PRESENT; ++ op_mode_changes++; ++ } ++ ++ /* Note: currently we switch to the MIXED op mode if HT non-greenfield ++ * station is associated. Probably it's a theoretical case, since ++ * it looks like all known HT STAs support greenfield. ++ */ ++ new_op_mode = 0; ++ if (pmlmepriv->num_sta_no_ht || ++ (pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_NON_GF_DEVS_PRESENT)) ++ new_op_mode = OP_MODE_MIXED; ++ else if ((phtpriv_ap->ht_cap.cap_info & IEEE80211_HT_CAP_SUP_WIDTH) ++ && pmlmepriv->num_sta_ht_20mhz) ++ new_op_mode = OP_MODE_20MHZ_HT_STA_ASSOCED; ++ else if (pmlmepriv->olbc_ht) ++ new_op_mode = OP_MODE_MAY_BE_LEGACY_STAS; ++ else ++ new_op_mode = OP_MODE_PURE; ++ ++ cur_op_mode = pmlmepriv->ht_op_mode & HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ if (cur_op_mode != new_op_mode) { ++ pmlmepriv->ht_op_mode &= ~HT_INFO_OPERATION_MODE_OP_MODE_MASK; ++ pmlmepriv->ht_op_mode |= new_op_mode; ++ op_mode_changes++; ++ } ++ ++ DBG_871X("%s new operation mode=0x%X changes=%d\n", ++ __FUNCTION__, pmlmepriv->ht_op_mode, op_mode_changes); ++ ++ return op_mode_changes; ++ ++} ++ ++#endif /* CONFIG_80211N_HT */ ++ ++void associated_clients_update(_adapter *padapter, u8 updated) ++{ ++ //update associcated stations cap. ++ if(updated == _TRUE) ++ { ++ _irqL irqL; ++ _list *phead, *plist; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ //check asoc_queue ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ ++ plist = get_next(plist); ++ ++ VCS_update(padapter, psta); ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ } ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void bss_cap_update_on_sta_join(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && ++ !psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 1; ++ pmlmepriv->num_sta_no_short_preamble++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ ++ if(!(psta->flags & WLAN_STA_SHORT_PREAMBLE)) ++ { ++ if(!psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 1; ++ ++ pmlmepriv->num_sta_no_short_preamble++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_preamble_set) ++ { ++ psta->no_short_preamble_set = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_preamble == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ ++#if 0 ++ if (psta->flags & WLAN_STA_NONERP && !psta->nonerp_set) { ++ psta->nonerp_set = 1; ++ pmlmepriv->num_sta_non_erp++; ++ if (pmlmepriv->num_sta_non_erp == 1) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(psta->flags & WLAN_STA_NONERP) ++ { ++ if(!psta->nonerp_set) ++ { ++ psta->nonerp_set = 1; ++ ++ pmlmepriv->num_sta_non_erp++; ++ ++ if (pmlmepriv->num_sta_non_erp == 1) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ else ++ { ++ if(psta->nonerp_set) ++ { ++ psta->nonerp_set = 0; ++ ++ pmlmepriv->num_sta_non_erp--; ++ ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ } ++ ++ ++#if 0 ++ if (!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT) && ++ !psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 1; ++ pmlmepriv->num_sta_no_short_slot_time++; ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ ieee802_11_set_beacons(hapd->iface); ++ } ++#endif ++ ++ if(!(psta->capability & WLAN_CAPABILITY_SHORT_SLOT)) ++ { ++ if(!psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 1; ++ ++ pmlmepriv->num_sta_no_short_slot_time++; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 1)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ ++ } ++ } ++ else ++ { ++ if(psta->no_short_slot_time_set) ++ { ++ psta->no_short_slot_time_set = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time--; ++ ++ if ((pmlmeext->cur_wireless_mode > WIRELESS_11B) && ++ (pmlmepriv->num_sta_no_short_slot_time == 0)) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->flags & WLAN_STA_HT) ++ { ++ u16 ht_capab = le16_to_cpu(psta->htpriv.ht_cap.cap_info); ++ ++ DBG_871X("HT: STA " MAC_FMT " HT Capabilities " ++ "Info: 0x%04x\n", MAC_ARG(psta->hwaddr), ht_capab); ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_GRN_FLD) == 0) { ++ if (!psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 1; ++ pmlmepriv->num_sta_ht_no_gf++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - no " ++ "greenfield, num of non-gf stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_no_gf); ++ } ++ ++ if ((ht_capab & IEEE80211_HT_CAP_SUP_WIDTH) == 0) { ++ if (!psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 1; ++ pmlmepriv->num_sta_ht_20mhz++; ++ } ++ DBG_871X("%s STA " MAC_FMT " - 20 MHz HT, " ++ "num of 20MHz HT STAs %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_ht_20mhz); ++ } ++ ++ } ++ else ++ { ++ if (!psta->no_ht_set) { ++ psta->no_ht_set = 1; ++ pmlmepriv->num_sta_no_ht++; ++ } ++ if(pmlmepriv->htpriv.ht_option == _TRUE) { ++ DBG_871X("%s STA " MAC_FMT ++ " - no HT, num of non-HT stations %d\n", ++ __FUNCTION__, MAC_ARG(psta->hwaddr), ++ pmlmepriv->num_sta_no_ht); ++ } ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ associated_clients_update(padapter, beacon_updated); ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++} ++ ++u8 bss_cap_update_on_sta_leave(_adapter *padapter, struct sta_info *psta) ++{ ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (psta->no_short_preamble_set) { ++ psta->no_short_preamble_set = 0; ++ pmlmepriv->num_sta_no_short_preamble--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_preamble == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->nonerp_set) { ++ psta->nonerp_set = 0; ++ pmlmepriv->num_sta_non_erp--; ++ if (pmlmepriv->num_sta_non_erp == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, _ERPINFO_IE_, NULL, _TRUE); ++ } ++ } ++ ++ if (psta->no_short_slot_time_set) { ++ psta->no_short_slot_time_set = 0; ++ pmlmepriv->num_sta_no_short_slot_time--; ++ if (pmlmeext->cur_wireless_mode > WIRELESS_11B ++ && pmlmepriv->num_sta_no_short_slot_time == 0) ++ { ++ beacon_updated = _TRUE; ++ update_beacon(padapter, 0xFF, NULL, _TRUE); ++ } ++ } ++ ++#ifdef CONFIG_80211N_HT ++ ++ if (psta->no_ht_gf_set) { ++ psta->no_ht_gf_set = 0; ++ pmlmepriv->num_sta_ht_no_gf--; ++ } ++ ++ if (psta->no_ht_set) { ++ psta->no_ht_set = 0; ++ pmlmepriv->num_sta_no_ht--; ++ } ++ ++ if (psta->ht_20mhz_set) { ++ psta->ht_20mhz_set = 0; ++ pmlmepriv->num_sta_ht_20mhz--; ++ } ++ ++ if (rtw_ht_operation_update(padapter) > 0) ++ { ++ update_beacon(padapter, _HT_CAPABILITY_IE_, NULL, _FALSE); ++ update_beacon(padapter, _HT_ADD_INFO_IE_, NULL, _TRUE); ++ } ++ ++#endif /* CONFIG_80211N_HT */ ++ ++ //update associcated stations cap. ++ //associated_clients_update(padapter, beacon_updated); //move it to avoid deadlock ++ ++ DBG_871X("%s, updated=%d\n", __func__, beacon_updated); ++ ++ return beacon_updated; ++ ++} ++ ++u8 ap_free_sta(_adapter *padapter, struct sta_info *psta, bool active, u16 reason) ++{ ++ _irqL irqL; ++ u8 beacon_updated = _FALSE; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &(padapter->mlmeextpriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ ++ if(!psta) ++ return beacon_updated; ++ ++ if (active == _TRUE) ++ { ++#ifdef CONFIG_80211N_HT ++ //tear down Rx AMPDU ++ send_delba(padapter, 0, psta->hwaddr);// recipient ++ ++ //tear down TX AMPDU ++ send_delba(padapter, 1, psta->hwaddr);// // originator ++ ++#endif //CONFIG_80211N_HT ++ ++ issue_deauth(padapter, psta->hwaddr, reason); ++ } ++ ++ psta->htpriv.agg_enable_bitmap = 0x0;//reset ++ psta->htpriv.candidate_tid_bitmap = 0x0;//reset ++ ++ ++ //report_del_sta_event(padapter, psta->hwaddr, reason); ++ ++ //clear cam entry / key ++ //clear_cam_entry(padapter, (psta->mac_id + 3)); ++ rtw_clearstakey_cmd(padapter, (u8*)psta, (u8)(psta->mac_id + 3), _TRUE); ++ ++ ++ _enter_critical_bh(&psta->lock, &irqL); ++ psta->state &= ~_FW_LINKED; ++ _exit_critical_bh(&psta->lock, &irqL); ++ ++ #ifdef CONFIG_IOCTL_CFG80211 ++ if (1) { ++ #ifdef COMPAT_KERNEL_RELEASE ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #elif (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ rtw_cfg80211_indicate_sta_disassoc(padapter, psta->hwaddr, reason); ++ #else //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ /* will call rtw_cfg80211_indicate_sta_disassoc() in cmd_thread for old API context */ ++ #endif //(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37)) && !defined(CONFIG_CFG80211_FORCE_COMPATIBLE_2_6_37_UNDER) ++ } else ++ #endif //CONFIG_IOCTL_CFG80211 ++ { ++ rtw_indicate_sta_disassoc_event(padapter, psta); ++ } ++ ++ report_del_sta_event(padapter, psta->hwaddr, reason); ++ ++ beacon_updated = bss_cap_update_on_sta_leave(padapter, psta); ++ ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ ++ return beacon_updated; ++ ++} ++ ++int rtw_ap_inform_ch_switch(_adapter *padapter, u8 new_ch, u8 ch_offset) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ DBG_871X(FUNC_NDEV_FMT" with ch:%u, offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), new_ch, ch_offset); ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ /* for each sta in asoc_queue */ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ issue_action_spct_ch_switch(padapter, psta->hwaddr, new_ch, ch_offset); ++ psta->expire_to = ((pstapriv->expire_to * 2) > 5) ? 5 : (pstapriv->expire_to * 2); ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ issue_action_spct_ch_switch(padapter, bc_addr, new_ch, ch_offset); ++ ++ return ret; ++} ++ ++int rtw_sta_flush(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ int ret=0; ++ struct sta_info *psta = NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ u8 bc_addr[ETH_ALEN] = {0xff,0xff,0xff,0xff,0xff,0xff}; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ DBG_871X(FUNC_NDEV_FMT"\n", FUNC_NDEV_ARG(padapter->pnetdev)); ++ ++ if((pmlmeinfo->state&0x03) != WIFI_FW_AP_STATE) ++ return ret; ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ /* Remove sta from asoc_list */ ++ rtw_list_delete(&psta->asoc_list); ++ pstapriv->asoc_list_cnt--; ++ ++ /* Keep sta for ap_free_sta() beyond this asoc_list loop */ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ ++ /* For each sta in chk_alive_list, call ap_free_sta */ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ap_free_sta(padapter, psta, _TRUE, WLAN_REASON_DEAUTH_LEAVING); ++ } ++ ++ issue_deauth(padapter, bc_addr, WLAN_REASON_DEAUTH_LEAVING); ++ ++ associated_clients_update(padapter, _TRUE); ++ ++ return ret; ++ ++} ++ ++/* called > TSR LEVEL for USB or SDIO Interface*/ ++void sta_info_update(_adapter *padapter, struct sta_info *psta) ++{ ++ int flags = psta->flags; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ ++ //update wmm cap. ++ if(WLAN_STA_WME&flags) ++ psta->qos_option = 1; ++ else ++ psta->qos_option = 0; ++ ++ if(pmlmepriv->qospriv.qos_option == 0) ++ psta->qos_option = 0; ++ ++ ++#ifdef CONFIG_80211N_HT ++ //update 802.11n ht cap. ++ if(WLAN_STA_HT&flags) ++ { ++ psta->htpriv.ht_option = _TRUE; ++ psta->qos_option = 1; ++ } ++ else ++ { ++ psta->htpriv.ht_option = _FALSE; ++ } ++ ++ if(pmlmepriv->htpriv.ht_option == _FALSE) ++ psta->htpriv.ht_option = _FALSE; ++#endif ++ ++ ++ update_sta_info_apmode(padapter, psta); ++ ++ ++} ++ ++/* called >= TSR LEVEL for USB or SDIO Interface*/ ++void ap_sta_info_defer_update(_adapter *padapter, struct sta_info *psta) ++{ ++ if(psta->state & _FW_LINKED) ++ { ++ //add ratid ++ add_RATid(padapter, psta); ++ } ++} ++ ++/* restore hw setting from sw data structures */ ++void rtw_ap_restore_network(_adapter *padapter) ++{ ++ struct mlme_priv *mlmepriv = &padapter->mlmepriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); ++ struct sta_priv * pstapriv = &padapter->stapriv; ++ struct sta_info *psta; ++ struct security_priv* psecuritypriv=&(padapter->securitypriv); ++ _irqL irqL; ++ _list *phead, *plist; ++ u8 chk_alive_num = 0; ++ char chk_alive_list[NUM_STA]; ++ int i; ++ ++ rtw_setopmode_cmd(padapter, Ndis802_11APMode); ++ ++ set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode); ++ ++ start_bss_network(padapter, (u8*)&mlmepriv->cur_network.network); ++ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) || ++ (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) ++ { ++ /* restore group key, WEP keys is restored in ips_leave() */ ++ rtw_set_key(padapter, psecuritypriv, psecuritypriv->dot118021XGrpKeyid, 0); ++ } ++ ++ /* per sta pairwise key and settings */ ++ if((padapter->securitypriv.dot11PrivacyAlgrthm != _TKIP_) && ++ (padapter->securitypriv.dot11PrivacyAlgrthm != _AES_)) { ++ return; ++ } ++ ++ _enter_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ phead = &pstapriv->asoc_list; ++ plist = get_next(phead); ++ ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) { ++ int stainfo_offset; ++ ++ psta = LIST_CONTAINOR(plist, struct sta_info, asoc_list); ++ plist = get_next(plist); ++ ++ stainfo_offset = rtw_stainfo_offset(pstapriv, psta); ++ if (stainfo_offset_valid(stainfo_offset)) { ++ chk_alive_list[chk_alive_num++] = stainfo_offset; ++ } ++ } ++ ++ _exit_critical_bh(&pstapriv->asoc_list_lock, &irqL); ++ ++ for (i = 0; i < chk_alive_num; i++) { ++ psta = rtw_get_stainfo_by_offset(pstapriv, chk_alive_list[i]); ++ ++ if (psta == NULL) { ++ DBG_871X(FUNC_ADPT_FMT" sta_info is null\n", FUNC_ADPT_ARG(padapter)); ++ } else if (psta->state &_FW_LINKED) { ++ Update_RA_Entry(padapter, psta->mac_id); ++ //pairwise key ++ rtw_setstakey_cmd(padapter, (unsigned char *)psta, _TRUE); ++ } ++ } ++ ++} ++ ++void start_ap_mode(_adapter *padapter) ++{ ++ int i; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ ++ //init_mlme_ap_info(padapter); ++ pmlmeext->bstart_bss = _FALSE; ++ ++ pmlmepriv->num_sta_non_erp = 0; ++ ++ pmlmepriv->num_sta_no_short_slot_time = 0; ++ ++ pmlmepriv->num_sta_no_short_preamble = 0; ++ ++ pmlmepriv->num_sta_ht_no_gf = 0; ++ ++ pmlmepriv->num_sta_no_ht = 0; ++ ++ pmlmepriv->num_sta_ht_20mhz = 0; ++ ++ pmlmepriv->olbc = _FALSE; ++ ++ pmlmepriv->olbc_ht = _FALSE; ++ ++#ifdef CONFIG_80211N_HT ++ pmlmepriv->ht_op_mode = 0; ++#endif ++ ++ for(i=0; ista_aid[i] = NULL; ++ ++ pmlmepriv->wps_beacon_ie = NULL; ++ pmlmepriv->wps_probe_resp_ie = NULL; ++ pmlmepriv->wps_assoc_resp_ie = NULL; ++ ++ pmlmepriv->p2p_beacon_ie = NULL; ++ pmlmepriv->p2p_probe_resp_ie = NULL; ++ ++ ++ //for ACL ++ _rtw_init_listhead(&(pacl_list->acl_node_q.queue)); ++ pacl_list->num = 0; ++ pacl_list->mode = 0; ++ for(i = 0; i < NUM_ACL; i++) ++ { ++ _rtw_init_listhead(&pacl_list->aclnode[i].list); ++ pacl_list->aclnode[i].valid = _FALSE; ++ } ++ ++} ++ ++void stop_ap_mode(_adapter *padapter) ++{ ++ _irqL irqL; ++ _list *phead, *plist; ++ struct rtw_wlan_acl_node *paclnode; ++ struct sta_info *psta=NULL; ++ struct sta_priv *pstapriv = &padapter->stapriv; ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct wlan_acl_pool *pacl_list = &pstapriv->acl_list; ++ _queue *pacl_node_q =&pacl_list->acl_node_q; ++ ++ pmlmepriv->update_bcn = _FALSE; ++ pmlmeext->bstart_bss = _FALSE; ++ //_rtw_spinlock_free(&pmlmepriv->bcn_update_lock); ++ ++ //reset and init security priv , this can refine with rtw_reset_securitypriv ++ _rtw_memset((unsigned char *)&padapter->securitypriv, 0, sizeof (struct security_priv)); ++ padapter->securitypriv.ndisauthtype = Ndis802_11AuthModeOpen; ++ padapter->securitypriv.ndisencryptstatus = Ndis802_11WEPDisabled; ++ ++ //for ACL ++ _enter_critical_bh(&(pacl_node_q->lock), &irqL); ++ phead = get_list_head(pacl_node_q); ++ plist = get_next(phead); ++ while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) ++ { ++ paclnode = LIST_CONTAINOR(plist, struct rtw_wlan_acl_node, list); ++ plist = get_next(plist); ++ ++ if(paclnode->valid == _TRUE) ++ { ++ paclnode->valid = _FALSE; ++ ++ rtw_list_delete(&paclnode->list); ++ ++ pacl_list->num--; ++ } ++ } ++ _exit_critical_bh(&(pacl_node_q->lock), &irqL); ++ ++ DBG_871X("%s, free acl_node_queue, num=%d\n", __func__, pacl_list->num); ++ ++ rtw_sta_flush(padapter); ++ ++ //free_assoc_sta_resources ++ rtw_free_all_stainfo(padapter); ++ ++ psta = rtw_get_bcmc_stainfo(padapter); ++ _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ rtw_free_stainfo(padapter, psta); ++ _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL); ++ ++ rtw_init_bcmc_stainfo(padapter); ++ ++ rtw_free_mlme_priv_ie_data(pmlmepriv); ++ ++} ++ ++#endif //CONFIG_NATIVEAP_MLME ++#endif //CONFIG_AP_MODE ++ +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_br_ext.c 2014-04-28 00:43:45.000000000 +0000 +@@ -126,10 +126,10 @@ + int tail_len; + unsigned long end, tail; + +- if ((src+len) > skb->tail || skb->len < len) ++ if ((src+len) > skb_tail_pointer(skb) || skb->len < len) + return -1; + +- tail = (unsigned long)skb->tail; ++ tail = (unsigned long)skb_tail_pointer(skb); + end = (unsigned long)src+len; + if (tail < end) + return -1; +@@ -522,7 +522,7 @@ + db = db->next_hash; + } + +- db = (struct nat25_network_db_entry *) _rtw_malloc(sizeof(*db)); ++ db = (struct nat25_network_db_entry *) rtw_malloc(sizeof(*db)); + if(db == NULL) { + _exit_critical_bh(&priv->br_ext_lock, &irqL); + return; +@@ -633,7 +633,7 @@ + int i; + _irqL irqL; + _enter_critical_bh(&priv->br_ext_lock, &irqL); +- ++ + for(i=0; iscdb_entry = NULL; + } + __network_hash_unlink(f); +- _rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); + + f = g; + } +@@ -664,7 +664,7 @@ + int i; + _irqL irqL; + _enter_critical_bh(&priv->br_ext_lock, &irqL); +- ++ + //if(!priv->ethBrExtInfo.nat25_disable) + { + for (i=0; iscdb_entry = NULL; + } + __network_hash_unlink(f); +- _rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); ++ rtw_mfree((u8 *) f, sizeof(struct nat25_network_db_entry)); + } + } + +@@ -848,6 +848,11 @@ + else { + // forward unknow IP packet to upper TCP/IP + DEBUG_INFO("NAT25: Replace DA with BR's MAC\n"); ++ if ( (*(u32 *)priv->br_mac) == 0 && (*(u16 *)(priv->br_mac+4)) == 0 ) { ++ void netdev_br_init(struct net_device *netdev); ++ printk("Re-init netdev_br_init() due to br_mac==0!\n"); ++ netdev_br_init(priv->pnetdev); ++ } + memcpy(skb->data, priv->br_mac, ETH_ALEN); + } + } +@@ -1533,7 +1538,7 @@ + _exit_critical_bh(&priv->br_ext_lock, &irqL); + + retval = nat25_db_handle(priv, skb, NAT25_LOOKUP); +- } ++ } + } + else { + if (((*((unsigned short *)(skb->data+ETH_ALEN*2)) == __constant_htons(ETH_P_IP)) && +@@ -1633,13 +1638,13 @@ + + if(iph->protocol == IPPROTO_UDP) // UDP + { +- struct udphdr *udph = (struct udphdr *)((unsigned int)iph + (iph->ihl << 2)); ++ struct udphdr *udph = (struct udphdr *)((SIZE_PTR)iph + (iph->ihl << 2)); + + if((udph->source == __constant_htons(CLIENT_PORT)) + && (udph->dest == __constant_htons(SERVER_PORT))) // DHCP request + { + struct dhcpMessage *dhcph = +- (struct dhcpMessage *)((unsigned int)udph + sizeof(struct udphdr)); ++ (struct dhcpMessage *)((SIZE_PTR)udph + sizeof(struct udphdr)); + + if(dhcph->cookie == __constant_htonl(DHCP_MAGIC)) // match magic word + { +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_cmd.c 2014-04-28 00:43:45.000000000 +0000 +@@ -16,7 +16,7 @@ + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +-******************************************************************************/ ++ ******************************************************************************/ + #define _RTW_CMD_C_ + + #include +@@ -58,9 +58,8 @@ + goto exit; + } + +- //pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1)); +- pcmdpriv->cmd_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->cmd_allocated_buf ), CMDBUFF_ALIGN_SZ); +- ++ pcmdpriv->cmd_buf = pcmdpriv->cmd_allocated_buf + CMDBUFF_ALIGN_SZ - ( (SIZE_PTR)(pcmdpriv->cmd_allocated_buf) & (CMDBUFF_ALIGN_SZ-1)); ++ + pcmdpriv->rsp_allocated_buf = rtw_zmalloc(MAX_RSPSZ + 4); + + if (pcmdpriv->rsp_allocated_buf == NULL){ +@@ -68,9 +67,8 @@ + goto exit; + } + +- //pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); +- pcmdpriv->rsp_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pcmdpriv->rsp_allocated_buf ), 4); +- ++ pcmdpriv->rsp_buf = pcmdpriv->rsp_allocated_buf + 4 - ( (SIZE_PTR)(pcmdpriv->rsp_allocated_buf) & 3); ++ + pcmdpriv->cmd_issued_cnt = pcmdpriv->cmd_done_cnt = pcmdpriv->rsp_cnt = 0; + + exit: +@@ -81,7 +79,9 @@ + + } + +- ++#ifdef CONFIG_C2H_WK ++static void c2h_wk_callback(_workitem *work); ++#endif + sint _rtw_init_evt_priv(struct evt_priv *pevtpriv) + { + sint res=_SUCCESS; +@@ -109,8 +109,7 @@ + res= _FAIL; + goto exit; + } +- //pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); +- pevtpriv->evt_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->evt_allocated_buf ), 4); ++ pevtpriv->evt_buf = pevtpriv->evt_allocated_buf + 4 - ((unsigned int)(pevtpriv->evt_allocated_buf) & 3); + + + #ifdef CONFIG_SDIO_HCI +@@ -121,10 +120,8 @@ + goto exit; + } + +- //pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4 +- //- ( (u32)(pevtpriv->allocated_c2h_mem) & 3); +- pevtpriv->c2h_mem = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(pevtpriv->allocated_c2h_mem ), 4); +- ++ pevtpriv->c2h_mem = pevtpriv->allocated_c2h_mem + 4\ ++ - ( (u32)(pevtpriv->allocated_c2h_mem) & 3); + #ifdef PLATFORM_OS_XP + pevtpriv->pc2h_mdl= IoAllocateMdl((u8 *)pevtpriv->c2h_mem, C2H_MEM_SZ , FALSE, FALSE, NULL); + +@@ -142,6 +139,12 @@ + + #endif //end of CONFIG_EVENT_THREAD_MODE + ++#ifdef CONFIG_C2H_WK ++ _init_workitem(&pevtpriv->c2h_wk, c2h_wk_callback, NULL); ++ pevtpriv->c2h_wk_alive = _FALSE; ++ pevtpriv->c2h_queue = rtw_cbuf_alloc(C2H_QUEUE_MAX_LEN+1); ++#endif ++ + _func_exit_; + + return res; +@@ -162,6 +165,21 @@ + rtw_mfree(pevtpriv->evt_allocated_buf, MAX_EVTSZ + 4); + #endif + ++#ifdef CONFIG_C2H_WK ++ _cancel_workitem_sync(&pevtpriv->c2h_wk); ++ while(pevtpriv->c2h_wk_alive) ++ rtw_msleep_os(10); ++ ++ while (!rtw_cbuf_empty(pevtpriv->c2h_queue)) { ++ void *c2h; ++ if ((c2h = rtw_cbuf_pop(pevtpriv->c2h_queue)) != NULL ++ && c2h != (void *)pevtpriv) { ++ rtw_mfree(c2h, 16); ++ } ++ } ++ rtw_cbuf_free(pevtpriv->c2h_queue); ++#endif ++ + RT_TRACE(_module_rtl871x_cmd_c_,_drv_info_,("-_rtw_free_evt_priv \n")); + + _func_exit_; +@@ -229,8 +247,7 @@ + _func_enter_; + + //_enter_critical_bh(&(queue->lock), &irqL); +- _enter_critical(&(queue->lock), &irqL); +- ++ _enter_critical(&queue->lock, &irqL); + if (rtw_is_list_empty(&(queue->queue))) + obj = NULL; + else +@@ -240,7 +257,7 @@ + } + + //_exit_critical_bh(&(queue->lock), &irqL); +- _exit_critical(&(queue->lock), &irqL); ++ _exit_critical(&queue->lock, &irqL); + + _func_exit_; + +@@ -281,6 +298,7 @@ + _func_exit_; + } + ++int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj); + int rtw_cmd_filter(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) + { + u8 bAllow = _FALSE; //set to _TRUE to allow enqueuing cmd when hw_init_completed is _FALSE +@@ -292,23 +310,23 @@ + ) + { + if(cmd_obj->cmdcode == GEN_CMD_CODE(_Set_Drv_Extra) ) +- { ++ { + struct drvextra_cmd_parm *pdrvextra_cmd_parm = (struct drvextra_cmd_parm *)cmd_obj->parmbuf; + if(pdrvextra_cmd_parm->ec_id == POWER_SAVING_CTRL_WK_CID) + { +- //DBG_8192C("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); ++ //DBG_871X("==>enqueue POWER_SAVING_CTRL_WK_CID\n"); + bAllow = _TRUE; + } + } + } +-#endif ++ #endif + + if(cmd_obj->cmdcode == GEN_CMD_CODE(_SetChannelPlan)) + bAllow = _TRUE; + + if( (pcmdpriv->padapter->hw_init_completed ==_FALSE && bAllow == _FALSE) +- || pcmdpriv->cmdthd_running== _FALSE //com_thread not running +- ) ++ || pcmdpriv->cmdthd_running== _FALSE //com_thread not running ++ ) + { + //DBG_871X("%s:%s: drop cmdcode:%u, hw_init_completed:%u, cmdthd_running:%u\n", caller_func, __FUNCTION__, + // cmd_obj->cmdcode, +@@ -326,6 +344,7 @@ + u32 rtw_enqueue_cmd(struct cmd_priv *pcmdpriv, struct cmd_obj *cmd_obj) + { + int res = _FAIL; ++ PADAPTER padapter = pcmdpriv->padapter; + + _func_enter_; + +@@ -333,6 +352,14 @@ + goto exit; + } + ++ cmd_obj->padapter = padapter; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ //change pcmdpriv to primary's pcmdpriv ++ if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) ++ pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); ++#endif ++ + if( _FAIL == (res=rtw_cmd_filter(pcmdpriv, cmd_obj)) ) { + rtw_free_cmd_obj(cmd_obj); + goto exit; +@@ -395,6 +422,16 @@ + _func_exit_; + } + ++void rtw_stop_cmd_thread(_adapter *adapter) ++{ ++ if(adapter->cmdThread && adapter->cmdpriv.cmdthd_running == _TRUE ++ && adapter->cmdpriv.stop_req == 0) ++ { ++ adapter->cmdpriv.stop_req = 1; ++ _rtw_up_sema(&adapter->cmdpriv.cmd_queue_sema); ++ _rtw_down_sema(&adapter->cmdpriv.terminate_cmdthread_sema); ++ } ++} + + thread_return rtw_cmd_thread(thread_context context) + { +@@ -408,11 +445,12 @@ + + _func_enter_; + +- thread_enter(padapter); ++ thread_enter("RTW_CMD_THREAD"); + + pcmdbuf = pcmdpriv->cmd_buf; + prspbuf = pcmdpriv->rsp_buf; + ++ pcmdpriv->stop_req = 0; + pcmdpriv->cmdthd_running=_TRUE; + _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); + +@@ -420,24 +458,35 @@ + + while(1) + { +- if ((_rtw_down_sema(&(pcmdpriv->cmd_queue_sema))) == _FAIL) ++ if ((_rtw_down_sema(&(pcmdpriv->cmd_queue_sema))) == _FAIL) { ++ LOG_LEVEL(_drv_err_, FUNC_ADPT_FMT" _rtw_down_sema(&pcmdpriv->cmd_queue_sema) return _FAIL, break\n", FUNC_ADPT_ARG(padapter)); + break; ++ } + ++ if (pcmdpriv->stop_req) { ++ LOG_LEVEL(_drv_err_, FUNC_ADPT_FMT" stop_req:%u, break\n", FUNC_ADPT_ARG(padapter), pcmdpriv->stop_req); ++ break; ++ } ++ ++#ifdef CONFIG_LPS_LCLK + if (rtw_register_cmd_alive(padapter) != _SUCCESS) + { + continue; + } ++#endif + + _next: +- if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved == _TRUE)) + { +- DBG_8192C("###> rtw_cmd_thread break.................\n"); +- RT_TRACE(_module_rtl871x_cmd_c_, _drv_info_, ("rtw_cmd_thread:bDriverStopped(%d) OR bSurpriseRemoved(%d)", padapter->bDriverStopped, padapter->bSurpriseRemoved)); ++ LOG_LEVEL(_drv_err_, "%s: DriverStopped(%d) SurpriseRemoved(%d) break at line %d\n", ++ __FUNCTION__, padapter->bDriverStopped, padapter->bSurpriseRemoved, __LINE__); + break; + } + + if(!(pcmd = rtw_dequeue_cmd(pcmdpriv))) { ++#ifdef CONFIG_LPS_LCLK + rtw_unregister_cmd_alive(padapter); ++#endif + continue; + } + +@@ -447,6 +496,11 @@ + goto post_process; + } + ++ if( _FAIL == rtw_cmd_filter(pcmdpriv, pcmd) ) { ++ rtw_free_cmd_obj(pcmd); ++ continue; ++ } ++ + pcmdpriv->cmd_issued_cnt++; + + pcmd->cmdsz = _RND4((pcmd->cmdsz));//_RND4 +@@ -459,11 +513,11 @@ + + if (cmd_hdl) + { +- ret = cmd_hdl(padapter, pcmdbuf); ++ ret = cmd_hdl(pcmd->padapter, pcmdbuf); + pcmd->res = ret; + } + +- pcmdpriv->cmd_seq++; ++ pcmdpriv->cmd_seq++; + } + else + { +@@ -473,7 +527,7 @@ + cmd_hdl = NULL; + + post_process: +- ++ + //call callback function for post-processed + if(pcmd->cmdcode <= (sizeof(rtw_cmd_callback) /sizeof(struct _cmd_callback))) + { +@@ -486,20 +540,17 @@ + else + { + //todo: !!! fill rsp_buf to pcmd->rsp if (pcmd->rsp!=NULL) +- pcmd_callback(padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback ++ pcmd_callback(pcmd->padapter, pcmd);//need conider that free cmd_obj in rtw_cmd_callback + } +- } +- ++ } + + flush_signals_thread(); + + goto _next; + + } +- + pcmdpriv->cmdthd_running=_FALSE; + +- DBG_871X("%s: leaving... check & free all cmd_obj resources\n", __FUNCTION__); + + // free all cmd_obj resources + do{ +@@ -507,13 +558,11 @@ + if(pcmd==NULL) + break; + +- DBG_871X("%s: leaving... drop cmdcode:%u\n", __FUNCTION__, pcmd->cmdcode); ++ //DBG_871X("%s: leaving... drop cmdcode:%u\n", __FUNCTION__, pcmd->cmdcode); + + rtw_free_cmd_obj(pcmd); + }while(1); + +- DBG_871X("%s: leaving... call up terminate_cmdthread_sema\n", __FUNCTION__); +- + _rtw_up_sema(&pcmdpriv->terminate_cmdthread_sema); + + _func_exit_; +@@ -644,28 +693,28 @@ + ### NOTE:#### (!!!!) + MUST TAKE CARE THAT BEFORE CALLING THIS FUNC, YOU SHOULD HAVE LOCKED pmlmepriv->lock + */ +-u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *pssid, int ssid_max_num) ++u8 rtw_sitesurvey_cmd(_adapter *padapter, NDIS_802_11_SSID *ssid, int ssid_num, ++ struct rtw_ieee80211_channel *ch, int ch_num) + { + u8 res = _FAIL; + struct cmd_obj *ph2c; + struct sitesurvey_parm *psurveyPara; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +-#ifdef CONFIG_P2P +- struct wifidirect_info *pwdinfo= &(padapter->wdinfo); +-#endif //CONFIG_P2P + +-_func_enter_; +- ++_func_enter_; ++ + #ifdef CONFIG_LPS + if(check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE){ + rtw_lps_ctrl_wk_cmd(padapter, LPS_CTRL_SCAN, 1); + } + #endif + +-#ifdef CONFIG_P2P +- p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); +-#endif //CONFIG_P2P ++#ifdef CONFIG_P2P_PS ++ if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) { ++ p2p_ps_wk_cmd(padapter, P2P_PS_SCAN, 1); ++ } ++#endif // CONFIG_P2P_PS + + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if (ph2c == NULL) +@@ -683,18 +732,33 @@ + + init_h2fwcmd_w_parm_no_rsp(ph2c, psurveyPara, GEN_CMD_CODE(_SiteSurvey)); + +- psurveyPara->bsslimit = 48; ++ /* psurveyPara->bsslimit = 48; */ + psurveyPara->scan_mode = pmlmepriv->scan_mode; + +- _rtw_memset(psurveyPara->ssid, 0, sizeof(NDIS_802_11_SSID)*RTW_SSID_SCAN_AMOUNT); ++ /* prepare ssid list */ ++ if (ssid) { ++ int i; ++ for (i=0; issid[i], &ssid[i], sizeof(NDIS_802_11_SSID)); ++ psurveyPara->ssid_num++; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ssid:(%s, %d)\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); ++ } ++ } ++ } + +- if(pssid){ ++ /* prepare channel list */ ++ if (ch) { + int i; +- for(i=0; issid[i], &pssid[i], sizeof(NDIS_802_11_SSID)); +- //DBG_871X("%s scan for specific ssid: %s, %d\n", __FUNCTION__ +- // , psurveyPara->ssid[i].Ssid, psurveyPara->ssid[i].SsidLength); ++ for (i=0; ich[i], &ch[i], sizeof(struct rtw_ieee80211_channel)); ++ psurveyPara->ch_num++; ++ if (0) ++ DBG_871X(FUNC_ADPT_FMT" ch:%u\n", FUNC_ADPT_ARG(padapter), ++ psurveyPara->ch[i].hw_value); + } + } + } +@@ -707,7 +771,16 @@ + + pmlmepriv->scan_start_time = rtw_get_current_time(); + +- _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); ++#ifdef CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++ if (padapter->pbuddy_adapter == NULL ) ++ goto full_scan_timeout; ++ if((padapter->pbuddy_adapter->mlmeextpriv.mlmext_info.state&0x03) == WIFI_FW_AP_STATE) ++ _set_timer(&pmlmepriv->scan_to_timer, ++ SURVEY_TO * ( padapter->mlmeextpriv.max_chan_nums + ( padapter->mlmeextpriv.max_chan_nums / RTW_SCAN_NUM_OF_CH ) * RTW_STAY_AP_CH_MILLISECOND ) + 1000 ); ++ else ++#endif //CONFIG_STA_MODE_SCAN_UNDER_AP_MODE ++full_scan_timeout: ++ _set_timer(&pmlmepriv->scan_to_timer, SCANNING_TIMEOUT); + + rtw_led_control(padapter, LED_CTL_SITE_SURVEY); + +@@ -1219,7 +1292,7 @@ + { + //rtw_restructure_ht_ie + rtw_restructure_ht_ie(padapter, &pnetwork->network.IEs[0], &psecnetwork->IEs[0], +- pnetwork->network.IELength, &psecnetwork->IELength); ++ pnetwork->network.IELength, &psecnetwork->IELength, (u8)psecnetwork->Configuration.DSConfig ); + } + } + +@@ -1276,38 +1349,42 @@ + return res; + } + +-u8 rtw_disassoc_cmd(_adapter*padapter) // for sta_mode ++u8 rtw_disassoc_cmd(_adapter*padapter, u32 deauth_timeout_ms, bool enqueue) /* for sta_mode */ + { +- struct cmd_obj* pdisconnect_cmd; +- struct disconnect_parm* pdisconnect; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; +- struct cmd_priv *pcmdpriv = &padapter->cmdpriv; +- +- u8 res=_SUCCESS; ++ struct cmd_obj *cmdobj = NULL; ++ struct disconnect_parm *param = NULL; ++ struct cmd_priv *cmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; + + _func_enter_; + + RT_TRACE(_module_rtl871x_cmd_c_, _drv_notice_, ("+rtw_disassoc_cmd\n")); +- +- //if ((check_fwstate(pmlmepriv, _FW_LINKED)) == _TRUE) { + +- pdisconnect_cmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +- if(pdisconnect_cmd == NULL){ +- res=_FAIL; +- goto exit; +- } ++ /* prepare cmd parameter */ ++ param = (struct disconnect_parm *)rtw_zmalloc(sizeof(*param)); ++ if (param == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ param->deauth_timeout_ms = deauth_timeout_ms; + +- pdisconnect = (struct disconnect_parm*)rtw_zmalloc(sizeof(struct disconnect_parm)); +- if(pdisconnect == NULL) { +- rtw_mfree((u8 *)pdisconnect_cmd, sizeof(struct cmd_obj)); +- res= _FAIL; ++ if (enqueue) { ++ /* need enqueue, prepare cmd_obj and enqueue */ ++ cmdobj = (struct cmd_obj *)rtw_zmalloc(sizeof(*cmdobj)); ++ if (cmdobj == NULL) { ++ res = _FAIL; ++ rtw_mfree((u8 *)param, sizeof(*param)); + goto exit; + } +- +- init_h2fwcmd_w_parm_no_rsp(pdisconnect_cmd, pdisconnect, _DisConnect_CMD_); +- res = rtw_enqueue_cmd(pcmdpriv, pdisconnect_cmd); +- //} +- ++ init_h2fwcmd_w_parm_no_rsp(cmdobj, param, _DisConnect_CMD_); ++ res = rtw_enqueue_cmd(cmdpriv, cmdobj); ++ } else { ++ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ ++ if (H2C_SUCCESS != disconnect_hdl(padapter, (u8 *)param)) ++ res = _FAIL; ++ rtw_mfree((u8 *)param, sizeof(*param)); ++ } ++ + exit: + + _func_exit_; +@@ -1396,7 +1473,7 @@ + if(sta->tdls_sta_state&TDLS_LINKED_STATE) + psetstakey_para->algorithm=(u8)sta->dot118021XPrivacy; + else +-#endif ++#endif //CONFIG_TDLS + psetstakey_para->algorithm =(unsigned char) psecuritypriv->dot11PrivacyAlgrthm; + }else{ + GET_ENCRY_ALGO(psecuritypriv, sta, psetstakey_para->algorithm, _FALSE); +@@ -1404,10 +1481,10 @@ + + if (unicast_key == _TRUE) { + #ifdef CONFIG_TDLS +- if((sta->tdls_sta_state&TDLS_LINKED_STATE)==TDLS_LINKED_STATE) ++ if(sta->tdls_sta_state&TDLS_LINKED_STATE) + _rtw_memcpy(&psetstakey_para->key, sta->tpk.tk, 16); + else +-#endif ++#endif //CONFIG_TDLS + _rtw_memcpy(&psetstakey_para->key, &sta->dot118021x_UncstKey, 16); + } else { + _rtw_memcpy(&psetstakey_para->key, &psecuritypriv->dot118021XGrpKey[psecuritypriv->dot118021XGrpKeyid].skey, 16); +@@ -1425,6 +1502,67 @@ + return res; + } + ++u8 rtw_clearstakey_cmd(_adapter *padapter, u8 *psta, u8 entry, u8 enqueue) ++{ ++ struct cmd_obj* ph2c; ++ struct set_stakey_parm *psetstakey_para; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ struct set_stakey_rsp *psetstakey_rsp = NULL; ++ struct mlme_priv *pmlmepriv = &padapter->mlmepriv; ++ struct security_priv *psecuritypriv = &padapter->securitypriv; ++ struct sta_info* sta = (struct sta_info* )psta; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ if(!enqueue) ++ { ++ clear_cam_entry(padapter, entry); ++ } ++ else ++ { ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if ( ph2c == NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ psetstakey_para = (struct set_stakey_parm*)rtw_zmalloc(sizeof(struct set_stakey_parm)); ++ if(psetstakey_para==NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ psetstakey_rsp = (struct set_stakey_rsp*)rtw_zmalloc(sizeof(struct set_stakey_rsp)); ++ if(psetstakey_rsp == NULL){ ++ rtw_mfree((u8 *) ph2c, sizeof(struct cmd_obj)); ++ rtw_mfree((u8 *) psetstakey_para, sizeof(struct set_stakey_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, psetstakey_para, _SetStaKey_CMD_); ++ ph2c->rsp = (u8 *) psetstakey_rsp; ++ ph2c->rspsz = sizeof(struct set_stakey_rsp); ++ ++ _rtw_memcpy(psetstakey_para->addr, sta->hwaddr, ETH_ALEN); ++ ++ psetstakey_para->algorithm = _NO_PRIVACY_; ++ ++ psetstakey_para->id = entry; ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++ } ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++ + u8 rtw_setrttbl_cmd(_adapter *padapter, struct setratable_parm *prate_table) + { + struct cmd_obj* ph2c; +@@ -1570,8 +1708,47 @@ + + init_h2fwcmd_w_parm_no_rsp(ph2c, paddbareq_parm, GEN_CMD_CODE(_AddBAReq)); + +- //DBG_8192C("rtw_addbareq_cmd, tid=%d\n", tid); ++ //DBG_871X("rtw_addbareq_cmd, tid=%d\n", tid); ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++} ++//add for CONFIG_IEEE80211W, none 11w can use it ++u8 rtw_reset_securitypriv_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = RESET_SECURITYPRIV; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; + ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ + //rtw_enqueue_cmd(pcmdpriv, ph2c); + res = rtw_enqueue_cmd(pcmdpriv, ph2c); + +@@ -1580,8 +1757,50 @@ + _func_exit_; + + return res; ++ + } + ++u8 rtw_free_assoc_resources_cmd(_adapter*padapter) ++{ ++ struct cmd_obj* ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv=&padapter->cmdpriv; ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(ph2c==NULL){ ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if(pdrvextra_cmd_parm==NULL){ ++ rtw_mfree((unsigned char *)ph2c, sizeof(struct cmd_obj)); ++ res= _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = FREE_ASSOC_RESOURCES; ++ pdrvextra_cmd_parm->type_size = 0; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ ++ //rtw_enqueue_cmd(pcmdpriv, ph2c); ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++_func_exit_; ++ ++ return res; ++ ++} ++ ++ + u8 rtw_dynamic_chk_wk_cmd(_adapter*padapter) + { + struct cmd_obj* ph2c; +@@ -1591,6 +1810,15 @@ + + _func_enter_; + ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ goto exit; ++ ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type != PRIMARY_ADAPTER && padapter->pbuddy_adapter) ++ pcmdpriv = &(padapter->pbuddy_adapter->cmdpriv); ++#endif ++ + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if(ph2c==NULL){ + res= _FAIL; +@@ -1606,7 +1834,7 @@ + + pdrvextra_cmd_parm->ec_id = DYNAMIC_CHK_WK_CID; + pdrvextra_cmd_parm->type_size = 0; +- pdrvextra_cmd_parm->pbuf = NULL; ++ pdrvextra_cmd_parm->pbuf = (u8 *)padapter; + + init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + +@@ -1622,11 +1850,65 @@ + + } + ++u8 rtw_set_ch_cmd(_adapter*padapter, u8 ch, u8 bw, u8 ch_offset, u8 enqueue) ++{ ++ struct cmd_obj *pcmdobj; ++ struct set_ch_parm *set_ch_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ ++ u8 res=_SUCCESS; ++ ++_func_enter_; ++ ++ DBG_871X(FUNC_NDEV_FMT" ch:%u, bw:%u, ch_offset:%u\n", ++ FUNC_NDEV_ARG(padapter->pnetdev), ch, bw, ch_offset); ++ ++ /* check input parameter */ ++ ++ /* prepare cmd parameter */ ++ set_ch_parm = (struct set_ch_parm *)rtw_zmalloc(sizeof(*set_ch_parm)); ++ if (set_ch_parm == NULL) { ++ res= _FAIL; ++ goto exit; ++ } ++ set_ch_parm->ch = ch; ++ set_ch_parm->bw = bw; ++ set_ch_parm->ch_offset = ch_offset; ++ ++ if (enqueue) { ++ /* need enqueue, prepare cmd_obj and enqueue */ ++ pcmdobj = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if(pcmdobj == NULL){ ++ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); ++ res=_FAIL; ++ goto exit; ++ } ++ ++ init_h2fwcmd_w_parm_no_rsp(pcmdobj, set_ch_parm, GEN_CMD_CODE(_SetChannel)); ++ res = rtw_enqueue_cmd(pcmdpriv, pcmdobj); ++ } else { ++ /* no need to enqueue, do the cmd hdl directly and free cmd parameter */ ++ if( H2C_SUCCESS !=set_ch_hdl(padapter, (u8 *)set_ch_parm) ) ++ res = _FAIL; ++ ++ rtw_mfree((u8 *)set_ch_parm, sizeof(*set_ch_parm)); ++ } ++ ++ /* do something based on res... */ ++ ++exit: ++ ++ DBG_871X(FUNC_NDEV_FMT" res:%u\n", FUNC_NDEV_ARG(padapter->pnetdev), res); ++ ++_func_exit_; ++ ++ return res; ++} ++ + u8 rtw_set_chplan_cmd(_adapter*padapter, u8 chplan, u8 enqueue) + { + struct cmd_obj* pcmdobj; + struct SetChannelPlan_param *setChannelPlan_param; +- struct mlme_priv *pmlmepriv = &padapter->mlmepriv; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; + + u8 res=_SUCCESS; +@@ -1738,7 +2020,7 @@ + goto exit; + } + +- setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); ++ setChannelSwitch_param = (struct SetChannelSwitch_param *)rtw_zmalloc(sizeof(struct SetChannelSwitch_param)); + if(setChannelSwitch_param == NULL) { + rtw_mfree((u8 *)pcmdobj, sizeof(struct cmd_obj)); + res= _FAIL; +@@ -1806,9 +2088,8 @@ + { + #ifdef CONFIG_LPS + u8 bEnterPS; +- u32 trx_threshold; +- u32 rx_threshold; + #endif ++ u16 BusyThreshold = 100; + u8 bBusyTraffic = _FALSE, bTxBusyTraffic = _FALSE, bRxBusyTraffic = _FALSE; + u8 bHigherBusyTraffic = _FALSE, bHigherBusyRxTraffic = _FALSE, bHigherBusyTxTraffic = _FALSE; + struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +@@ -1816,6 +2097,8 @@ + struct tdls_info *ptdlsinfo = &(padapter->tdlsinfo); + #endif //CONFIG_TDLS + ++ RT_LINK_DETECT_T * link_detect = &pmlmepriv->LinkDetectInfo; ++ + // + // Determine if our traffic is busy now + // +@@ -1823,15 +2106,18 @@ + /*&& !MgntInitAdapterInProgress(pMgntInfo)*/) + { + +- if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100 || +- pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100 ) ++ // if we raise bBusyTraffic in last watchdog, using lower threshold. ++ if (pmlmepriv->LinkDetectInfo.bBusyTraffic) ++ BusyThreshold = 75; ++ if( pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold || ++ pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold ) + { + bBusyTraffic = _TRUE; + +- if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > 100) ++ if(pmlmepriv->LinkDetectInfo.NumRxOkInPeriod > BusyThreshold) + bRxBusyTraffic = _TRUE; + +- if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 100) ++ if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > BusyThreshold) + bTxBusyTraffic = _TRUE; + } + +@@ -1849,29 +2135,39 @@ + if(pmlmepriv->LinkDetectInfo.NumTxOkInPeriod > 5000) + bHigherBusyTxTraffic = _TRUE; + } +- ++ ++#ifdef CONFIG_TRAFFIC_PROTECT ++#define TX_ACTIVE_TH 2 ++#define RX_ACTIVE_TH 1 ++#define TRAFFIC_PROTECT_PERIOD_MS 4500 ++ ++ if (link_detect->NumTxOkInPeriod > TX_ACTIVE_TH ++ || link_detect->NumRxUnicastOkInPeriod > RX_ACTIVE_TH) { ++ ++ LOG_LEVEL(_drv_info_, FUNC_ADPT_FMT" acqiure wake_lock for %u ms(tx:%d,rx_unicast:%d)\n", ++ FUNC_ADPT_ARG(padapter), ++ TRAFFIC_PROTECT_PERIOD_MS, ++ link_detect->NumTxOkInPeriod, ++ link_detect->NumRxUnicastOkInPeriod); ++ ++ rtw_lock_suspend_timeout(TRAFFIC_PROTECT_PERIOD_MS); ++ } ++#endif ++ + #ifdef CONFIG_TDLS + #ifdef CONFIG_TDLS_AUTOSETUP +- if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //10 * 2sec, periodically sending ++ if( ( ptdlsinfo->watchdog_count % TDLS_WATCHDOG_PERIOD ) == 0 ) //TDLS_WATCHDOG_PERIOD * 2sec, periodically sending + issue_tdls_dis_req( padapter, NULL ); + ptdlsinfo->watchdog_count++; + #endif //CONFIG_TDLS_AUTOSETUP + #endif //CONFIG_TDLS +- ++ + #ifdef CONFIG_LPS + // check traffic for powersaving. +- if(padapter->registrypriv.intel_class_mode==1){ +- trx_threshold=1; +- rx_threshold=1; +- } +- else{ +- trx_threshold=8; +- rx_threshold=2; +- } +- if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > trx_threshold ) || +- (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > rx_threshold) ) ++ if( ((pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod + pmlmepriv->LinkDetectInfo.NumTxOkInPeriod) > 8 ) || ++ (pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod > 2) ) + { +- //DBG_8192C("Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); ++ //DBG_871X("Tx = %d, Rx = %d \n",pmlmepriv->LinkDetectInfo.NumTxOkInPeriod,pmlmepriv->LinkDetectInfo.NumRxUnicastOkInPeriod); + bEnterPS= _FALSE; + } + else +@@ -1905,15 +2201,39 @@ + pmlmepriv->LinkDetectInfo.bRxBusyTraffic = bRxBusyTraffic; + pmlmepriv->LinkDetectInfo.bHigherBusyTraffic = bHigherBusyTraffic; + pmlmepriv->LinkDetectInfo.bHigherBusyRxTraffic = bHigherBusyRxTraffic; ++ pmlmepriv->LinkDetectInfo.bHigherBusyTxTraffic = bHigherBusyTxTraffic; ++ + } + ++void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz); + void dynamic_chk_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) + { +- struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); +- //struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ struct mlme_priv *pmlmepriv; ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ if((void*)padapter != (void*)pbuf && padapter->pbuddy_adapter == NULL) ++ return; ++ ++ padapter = (_adapter *)pbuf; ++ ++ if ((padapter->bDriverStopped == _TRUE)||(padapter->bSurpriseRemoved== _TRUE)) ++ return; ++ ++ pmlmepriv = &(padapter->mlmepriv); ++ ++#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++#ifdef CONFIG_AP_MODE ++ if(check_fwstate(pmlmepriv, WIFI_AP_STATE) == _TRUE) ++ { ++ expire_timeout_chk(padapter); ++ } ++#endif ++#endif //CONFIG_ACTIVE_KEEP_ALIVE_CHECK ++ + #ifdef DBG_CONFIG_ERROR_DETECT +- if(padapter->HalFunc.sreset_xmit_status_check) +- padapter->HalFunc.sreset_xmit_status_check(padapter); ++ rtw_hal_sreset_xmit_status_check(padapter); + #endif + + //if(check_fwstate(pmlmepriv, _FW_UNDER_LINKING|_FW_UNDER_SURVEY)==_FALSE) +@@ -1922,13 +2242,15 @@ + traffic_status_watchdog(padapter); + } + +- padapter->HalFunc.hal_dm_watchdog(padapter); ++ rtw_hal_dm_watchdog(padapter); + + //check_hw_pbc(padapter, pdrvextra_cmd->pbuf, pdrvextra_cmd->type_size); + + } + + #ifdef CONFIG_LPS ++ ++void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type); + void lps_ctrl_wk_hdl(_adapter *padapter, u8 lps_ctrl_type) + { + struct pwrctrl_priv *pwrpriv = &padapter->pwrctrlpriv; +@@ -1946,28 +2268,28 @@ + switch(lps_ctrl_type) + { + case LPS_CTRL_SCAN: +- //DBG_8192C("LPS_CTRL_SCAN \n"); ++ //DBG_871X("LPS_CTRL_SCAN \n"); + LeaveAllPowerSaveMode(padapter); + break; + case LPS_CTRL_JOINBSS: +- //DBG_8192C("LPS_CTRL_JOINBSS \n"); ++ //DBG_871X("LPS_CTRL_JOINBSS \n"); + LPS_Leave(padapter); + break; + case LPS_CTRL_CONNECT: +- //DBG_8192C("LPS_CTRL_CONNECT \n"); ++ //DBG_871X("LPS_CTRL_CONNECT \n"); + mstatus = 1; + // Reset LPS Setting + padapter->pwrctrlpriv.LpsIdleCount = 0; +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); + break; + case LPS_CTRL_DISCONNECT: +- //DBG_8192C("LPS_CTRL_DISCONNECT \n"); ++ //DBG_871X("LPS_CTRL_DISCONNECT \n"); + mstatus = 0; + LPS_Leave(padapter); +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_H2C_FW_JOINBSSRPT, (u8 *)(&mstatus)); + break; + case LPS_CTRL_SPECIAL_PACKET: +- //DBG_8192C("LPS_CTRL_SPECIAL_PACKET \n"); ++ //DBG_871X("LPS_CTRL_SPECIAL_PACKET \n"); + pwrpriv->DelayLPSLastTimeStamp = rtw_get_current_time(); + LPS_Leave(padapter); + break; +@@ -1984,7 +2306,7 @@ + struct cmd_obj *ph2c; + struct drvextra_cmd_parm *pdrvextra_cmd_parm; + struct cmd_priv *pcmdpriv = &padapter->cmdpriv; +- struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; ++ //struct pwrctrl_priv *pwrctrlpriv = &padapter->pwrctrlpriv; + u8 res = _SUCCESS; + + _func_enter_; +@@ -1992,6 +2314,11 @@ + //if(!pwrctrlpriv->bLeisurePs) + // return res; + ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->iface_type != IFACE_PORT0) ++ return res; ++#endif ++ + if(enqueue) + { + ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); +@@ -2033,7 +2360,7 @@ + + void antenna_select_wk_hdl(_adapter *padapter, u8 antenna) + { +- padapter->HalFunc.SetHwRegHandler(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); ++ rtw_hal_set_hwreg(padapter, HW_VAR_ANTENNA_DIVERSITY_SELECT, (u8 *)(&antenna)); + } + + u8 rtw_antenna_select_cmd(_adapter*padapter, u8 antenna,u8 enqueue) +@@ -2045,7 +2372,7 @@ + u8 res = _SUCCESS; + + _func_enter_; +- padapter->HalFunc.GetHalDefVarHandler(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); ++ rtw_hal_get_def_var(padapter, HAL_DEF_IS_SUPPORT_ANT_DIV, &(bSupportAntDiv)); + if(_FALSE == bSupportAntDiv ) return res; + + if(_TRUE == enqueue) +@@ -2082,11 +2409,23 @@ + } + #endif + ++void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz); + void power_saving_wk_hdl(_adapter *padapter, u8 *pbuf, int sz) + { + rtw_ps_processor(padapter); + } + ++//add for CONFIG_IEEE80211W, none 11w can use it ++void reset_securitypriv_hdl(_adapter *padapter) ++{ ++ rtw_reset_securitypriv(padapter); ++} ++ ++void free_assoc_resources_hdl(_adapter *padapter) ++{ ++ rtw_free_assoc_resources(padapter, 1); ++} ++ + #ifdef CONFIG_P2P + u8 p2p_protocol_wk_cmd(_adapter*padapter, int intCmdType ) + { +@@ -2098,7 +2437,7 @@ + + _func_enter_; + +- if (rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) ++ if(rtw_p2p_chk_state(pwdinfo, P2P_STATE_NONE)) + { + return res; + } +@@ -2141,6 +2480,11 @@ + + u8 res = _SUCCESS; + _func_enter_; ++ ++#ifdef CONFIG_CONCURRENT_MODE ++ if (padapter->adapter_type != PRIMARY_ADAPTER) ++ goto exit; ++#endif + + ppscmd = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); + if(ppscmd==NULL){ +@@ -2157,7 +2501,6 @@ + + pdrvextra_cmd_parm->ec_id = POWER_SAVING_CTRL_WK_CID; + pdrvextra_cmd_parm->pbuf = NULL; +- DBG_8192C("==> %s , enqueue CMD \n",__FUNCTION__); + init_h2fwcmd_w_parm_no_rsp(ppscmd, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); + + res = rtw_enqueue_cmd(pcmdpriv, ppscmd); +@@ -2241,6 +2584,108 @@ + } + #endif + ++u8 rtw_c2h_wk_cmd(PADAPTER padapter, u8 *c2h_evt) ++{ ++ struct cmd_obj *ph2c; ++ struct drvextra_cmd_parm *pdrvextra_cmd_parm; ++ struct cmd_priv *pcmdpriv = &padapter->cmdpriv; ++ u8 res = _SUCCESS; ++ ++ ph2c = (struct cmd_obj*)rtw_zmalloc(sizeof(struct cmd_obj)); ++ if (ph2c == NULL) { ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm = (struct drvextra_cmd_parm*)rtw_zmalloc(sizeof(struct drvextra_cmd_parm)); ++ if (pdrvextra_cmd_parm == NULL) { ++ rtw_mfree((u8*)ph2c, sizeof(struct cmd_obj)); ++ res = _FAIL; ++ goto exit; ++ } ++ ++ pdrvextra_cmd_parm->ec_id = C2H_WK_CID; ++ pdrvextra_cmd_parm->type_size = c2h_evt?16:0; ++ pdrvextra_cmd_parm->pbuf = c2h_evt; ++ ++ init_h2fwcmd_w_parm_no_rsp(ph2c, pdrvextra_cmd_parm, GEN_CMD_CODE(_Set_Drv_Extra)); ++ ++ res = rtw_enqueue_cmd(pcmdpriv, ph2c); ++ ++exit: ++ ++ return res; ++} ++ ++s32 c2h_evt_hdl(_adapter *adapter, struct c2h_evt_hdr *c2h_evt, c2h_id_filter filter) ++{ ++ s32 ret = _FAIL; ++ u8 buf[16]; ++ ++ if (!c2h_evt) { ++ /* No c2h event in cmd_obj, read c2h event before handling*/ ++ if (c2h_evt_read(adapter, buf) == _SUCCESS) { ++ c2h_evt = (struct c2h_evt_hdr *)buf; ++ ++ if (filter && filter(c2h_evt->id) == _FALSE) ++ goto exit; ++ ++ ret = rtw_hal_c2h_handler(adapter, c2h_evt); ++ } ++ } else { ++ ++ if (filter && filter(c2h_evt->id) == _FALSE) ++ goto exit; ++ ++ ret = rtw_hal_c2h_handler(adapter, c2h_evt); ++ } ++exit: ++ return ret; ++} ++ ++#ifdef CONFIG_C2H_WK ++static void c2h_wk_callback(_workitem *work) ++{ ++ struct evt_priv *evtpriv = container_of(work, struct evt_priv, c2h_wk); ++ _adapter *adapter = container_of(evtpriv, _adapter, evtpriv); ++ struct c2h_evt_hdr *c2h_evt; ++ c2h_id_filter ccx_id_filter = rtw_hal_c2h_id_filter_ccx(adapter); ++ ++ evtpriv->c2h_wk_alive = _TRUE; ++ ++ while (!rtw_cbuf_empty(evtpriv->c2h_queue)) { ++ if ((c2h_evt = (struct c2h_evt_hdr *)rtw_cbuf_pop(evtpriv->c2h_queue)) != NULL) { ++ /* This C2H event is read, clear it */ ++ c2h_evt_clear(adapter); ++ } else if ((c2h_evt = (struct c2h_evt_hdr *)rtw_malloc(16)) != NULL) { ++ /* This C2H event is not read, read & clear now */ ++ if (c2h_evt_read(adapter, (u8*)c2h_evt) != _SUCCESS) ++ continue; ++ } ++ ++ /* Special pointer to trigger c2h_evt_clear only */ ++ if ((void *)c2h_evt == (void *)evtpriv) ++ continue; ++ ++ if (!c2h_evt_exist(c2h_evt)) { ++ rtw_mfree((u8*)c2h_evt, 16); ++ continue; ++ } ++ ++ if (ccx_id_filter(c2h_evt->id) == _TRUE) { ++ /* Handle CCX report here */ ++ rtw_hal_c2h_handler(adapter, c2h_evt); ++ rtw_mfree((u8*)c2h_evt, 16); ++ } else { ++ /* Enqueue into cmd_thread for others */ ++ rtw_c2h_wk_cmd(adapter, (u8 *)c2h_evt); ++ } ++ } ++ ++ evtpriv->c2h_wk_alive = _FALSE; ++} ++#endif ++ + u8 rtw_drvextra_cmd_hdl(_adapter *padapter, unsigned char *pbuf) + { + struct drvextra_cmd_parm *pdrvextra_cmd; +@@ -2268,24 +2713,39 @@ + antenna_select_wk_hdl(padapter, pdrvextra_cmd->type_size); + break; + #endif +-#ifdef CONFIG_P2P ++#ifdef CONFIG_P2P_PS + case P2P_PS_WK_CID: + p2p_ps_wk_hdl(padapter, pdrvextra_cmd->type_size); + break; ++#endif // CONFIG_P2P_PS + case P2P_PROTO_WK_CID: + // Commented by Albert 2011/07/01 + // I used the type_size as the type command + p2p_protocol_wk_hdl( padapter, pdrvextra_cmd->type_size ); + break; +-#endif //CONFIG_P2P + #ifdef CONFIG_AP_MODE + case CHECK_HIQ_WK_CID: + rtw_chk_hi_queue_hdl(padapter); + break; +-#endif //CONFIG_AP_MODE +- default: ++#endif //CONFIG_AP_MODE ++#ifdef CONFIG_INTEL_WIDI ++ case INTEl_WIDI_WK_CID: ++ intel_widi_wk_hdl(padapter, pdrvextra_cmd->type_size, pdrvextra_cmd->pbuf); ++ break; ++#endif //CONFIG_INTEL_WIDI ++ //add for CONFIG_IEEE80211W, none 11w can use it ++ case RESET_SECURITYPRIV: ++ reset_securitypriv_hdl(padapter); ++ break; ++ case FREE_ASSOC_RESOURCES: ++ free_assoc_resources_hdl(padapter); ++ break; ++ case C2H_WK_CID: ++ c2h_evt_hdl(padapter, (struct c2h_evt_hdr *)pdrvextra_cmd->pbuf, NULL); + break; + ++ default: ++ break; + } + + +@@ -2552,13 +3012,14 @@ + + set_fwstate(pmlmepriv, _FW_LINKED); + _exit_critical_bh(&pmlmepriv->lock, &irqL); +- +-exit: ++ ++exit: + rtw_free_cmd_obj(pcmd); +- ++ + _func_exit_; + } + ++void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd); + void rtw_getrttbl_cmd_cmdrsp_callback(_adapter* padapter, struct cmd_obj *pcmd) + { + _func_enter_; +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_debug.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/rtw_debug.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_debug.c 2014-04-28 00:43:45.000000000 +0000 +@@ -1,7 +1,7 @@ + /****************************************************************************** + * + * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. +- * ++ * + * This program is free software; you can redistribute it and/or modify it + * under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. +@@ -21,10 +21,11 @@ + + + #include ++#include <../hal/dm.h> + +-#ifdef CONFIG_DEBUG_RTL871X ++//#ifdef CONFIG_DEBUG_RTL871X + +- u32 GlobalDebugLevel = _drv_info_; ++ u32 GlobalDebugLevel = _drv_err_; + + u64 GlobalDebugComponents = \ + _module_rtl871x_xmit_c_ | +@@ -52,12 +53,12 @@ + _module_hci_ops_os_c_| + _module_rtl871x_ioctl_os_c| + _module_rtl8712_cmd_c_| +- _module_rtl8192c_xmit_c_| ++ _module_hal_xmit_c_| + _module_rtl8712_recv_c_ | + _module_mp_ | + _module_efuse_; + +-#endif ++//#endif + + #ifdef CONFIG_PROC_DEBUG + #include +@@ -76,6 +77,65 @@ + return len; + } + ++int proc_get_log_level(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); ++ ++ int len = 0; ++ ++ len += snprintf(page + len, count - len, ++ "log_level:%d\n", ++ GlobalDebugLevel ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_log_level(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 is_signal_dbg; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &is_signal_dbg); ++ ++ if( is_signal_dbg >= 0 && is_signal_dbg < 10 ) ++ { ++ GlobalDebugLevel= is_signal_dbg; ++ printk("%d\n", GlobalDebugLevel); ++ } ++ } ++ ++ return count; ++ ++} ++ ++#ifdef DBG_MEM_ALLOC ++int proc_get_mstat(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ int len = 0; ++ ++ len += _rtw_mstat_dump(page+len, count-len); ++ *eof = 1; ++ ++ return len; ++} ++#endif /* DBG_MEM_ALLOC */ ++ + int proc_get_write_reg(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +@@ -94,7 +154,7 @@ + + if (count < 3) + { +- DBG_8192C("argument size is less than 3\n"); ++ DBG_871X("argument size is less than 3\n"); + return -EFAULT; + } + +@@ -103,7 +163,7 @@ + int num = sscanf(tmp, "%x %x %x", &addr, &val, &len); + + if (num != 3) { +- DBG_8192C("invalid write_reg parameter!\n"); ++ DBG_871X("invalid write_reg parameter!\n"); + return count; + } + +@@ -119,7 +179,7 @@ + rtw_write32(padapter, addr, val); + break; + default: +- DBG_8192C("error write length=%d", len); ++ DBG_871X("error write length=%d", len); + break; + } + +@@ -171,14 +231,12 @@ + int proc_set_read_reg(struct file *file, const char *buffer, + unsigned long count, void *data) + { +- struct net_device *dev = (struct net_device *)data; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + char tmp[16]; + u32 addr, len; + + if (count < 2) + { +- DBG_8192C("argument size is less than 2\n"); ++ DBG_871X("argument size is less than 2\n"); + return -EFAULT; + } + +@@ -187,7 +245,7 @@ + int num = sscanf(tmp, "%x %x", &addr, &len); + + if (num != 2) { +- DBG_8192C("invalid read_reg parameter!\n"); ++ DBG_871X("invalid read_reg parameter!\n"); + return count; + } + +@@ -289,17 +347,17 @@ + int *eof, void *data) + { + struct net_device *dev = data; +- _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); +- struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; + int len = 0; + +- len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n", +- pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset); +- +- ++ len += snprintf(page + len, count - len, "cur_ch=%d, cur_bw=%d, cur_ch_offet=%d\n" ++ "oper_ch=%d, oper_bw=%d, oper_ch_offet=%d\n", ++ pmlmeext->cur_channel, pmlmeext->cur_bwmode, pmlmeext->cur_ch_offset, ++ rtw_get_oper_ch(padapter), rtw_get_oper_bw(padapter), rtw_get_oper_choffset(padapter)); + *eof = 1; +- return len; + ++ return len; + } + + int proc_get_ap_info(char *page, char **start, +@@ -371,23 +429,282 @@ + off_t offset, int count, + int *eof, void *data) + { ++ int i; + struct net_device *dev = data; + _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); + struct xmit_priv *pxmitpriv = &padapter->xmitpriv; + struct recv_priv *precvpriv = &padapter->recvpriv; ++ struct dvobj_priv *pdvobj = adapter_to_dvobj(padapter); ++ struct hw_xmit *phwxmit; + int len = 0; + +- len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d, free_ext_xmitbuf_cnt=%d, free_recvframe_cnt=%d\n", +- pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt,pxmitpriv->free_xmit_extbuf_cnt, precvpriv->free_recvframe_cnt); ++ len += snprintf(page + len, count - len, "free_xmitbuf_cnt=%d, free_xmitframe_cnt=%d" ++ ", free_ext_xmitbuf_cnt=%d, free_xframe_ext_cnt=%d" ++ ", free_recvframe_cnt=%d\n", ++ pxmitpriv->free_xmitbuf_cnt, pxmitpriv->free_xmitframe_cnt, ++ pxmitpriv->free_xmit_extbuf_cnt, pxmitpriv->free_xframe_ext_cnt, ++ precvpriv->free_recvframe_cnt); + #ifdef CONFIG_USB_HCI +- len += snprintf(page + len, count - len, "rx_urb_pending_cn=%d\n", precvpriv->rx_pending_cnt); ++ len += snprintf(page + len, count - len, "rx_urb_pending_cnt=%d\n", precvpriv->rx_pending_cnt); + #endif + ++ len += snprintf(page + len, count - len, "recvbuf_skb_alloc_fail_cnt=%d\n", precvpriv->recvbuf_skb_alloc_fail_cnt); ++ len += snprintf(page + len, count - len, "recvbuf_null_cnt=%d\n", precvpriv->recvbuf_null_cnt); ++ len += snprintf(page + len, count - len, "read_port_complete_EINPROGRESS_cnt=%d\n", precvpriv->read_port_complete_EINPROGRESS_cnt); ++ len += snprintf(page + len, count - len, "read_port_complete_other_urb_err_cnt=%d\n", precvpriv->read_port_complete_other_urb_err_cnt); ++ len += snprintf(page + len, count - len, "hw_init_completed=%d\n", padapter->hw_init_completed); ++#ifdef CONFIG_USB_HCI ++ len += snprintf(page + len, count - len, "continual_urb_error=%d\n", atomic_read(&pdvobj->continual_urb_error)); ++#endif ++ ++ for(i = 0; i < 4; i++) ++ { ++ phwxmit = pxmitpriv->hwxmits + i; ++ len += snprintf(page + len, count - len, "%d, hwq.accnt=%d\n", i, phwxmit->accnt); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++ ++ ++int proc_get_mac_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ ++ for(i=0x0;i<0x300;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ + *eof = 1; + return len; + + } ++ ++int proc_get_mac_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ memset(page, 0, count); ++ for(i=0x300;i<0x600;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_mac_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= MAC REG =======\n"); ++ ++ for(i=0x600;i<0x800;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ ++ *eof = 1; ++ return len; ++ ++} ++ ++int proc_get_bb_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0x800;i<0xB00;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_bb_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0xB00;i<0xE00;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_bb_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1; ++ ++ len += snprintf(page + len, count - len, "\n======= BB REG =======\n"); ++ for(i=0xE00;i<0x1000;i+=4) ++ { ++ if(j%4==1) len += snprintf(page + len, count - len,"0x%02x",i); ++ len += snprintf(page + len, count - len," 0x%08x ",rtw_read32(padapter,i)); ++ if((j++)%4 == 0) len += snprintf(page + len, count - len,"\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rf_reg_dump1(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; + ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 1; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0;i<0xC0;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump2(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 1; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0xC0;i<0x100;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump3(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 2; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0;i<0xC0;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ ++ *eof = 1; ++ return len; ++} ++ ++ ++int proc_get_rf_reg_dump4(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ int i,j=1,path; ++ u32 value; ++ ++ len += snprintf(page + len, count - len, "\n======= RF REG =======\n"); ++ path = 2; ++ len += snprintf(page + len, count - len, "\nRF_Path(%x)\n",path); ++ for(i=0xC0;i<0x100;i++) ++ { ++ //value = PHY_QueryRFReg(padapter, (RF90_RADIO_PATH_E)path,i, bMaskDWord); ++ value =rtw_hal_read_rfreg(padapter, path, i, 0xffffffff); ++ if(j%4==1) len += snprintf(page + len, count - len, "0x%02x ",i); ++ len += snprintf(page + len, count - len, " 0x%08x ",value); ++ if((j++)%4==0) len += snprintf(page + len, count - len, "\n"); ++ } ++ *eof = 1; ++ return len; ++} ++ ++ + + int proc_get_rx_signal(char *page, char **start, + off_t offset, int count, +@@ -453,6 +770,101 @@ + + } + ++int proc_get_ht_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->ht_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_ht_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 2 ) ++ { ++ pregpriv->ht_enable= mode; ++ printk("ht_enable=%d\n", pregpriv->ht_enable); ++ } ++ } ++ ++ return count; ++ ++} ++ ++ ++int proc_get_cbw40_enable(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->cbw40_enable ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_cbw40_enable(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && mode >= 0 && mode < 2 ) ++ { ++ pregpriv->cbw40_enable= mode; ++ printk("cbw40_enable=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ + int proc_get_ampdu_enable(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +@@ -500,6 +912,112 @@ + + } + ++ ++int proc_get_two_path_rssi(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ ++ int len = 0; ++ ++ if(padapter) ++ len += snprintf(page + len, count - len, ++ "%d %d\n", ++ padapter->recvpriv.RxRssi[0], ++ padapter->recvpriv.RxRssi[1] ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_rx_stbc(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ ++ int len = 0; ++ ++ if(pregpriv) ++ len += snprintf(page + len, count - len, ++ "%d\n", ++ pregpriv->rx_stbc ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_rx_stbc(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct registry_priv *pregpriv = &padapter->registrypriv; ++ char tmp[32]; ++ u32 mode; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d ", &mode); ++ ++ if( pregpriv && (mode == 0 || mode == 1|| mode == 2|| mode == 3)) ++ { ++ pregpriv->rx_stbc= mode; ++ printk("rx_stbc=%d\n", mode); ++ } ++ } ++ ++ return count; ++ ++} ++ ++int proc_get_vid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 VID=0; ++ int len = 0; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_VID, (u8 *)&VID); ++ len += snprintf(page + len, count - len, ++ "%04x\n", ++ VID ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_get_pid(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ u16 PID=0; ++ int len = 0; ++ ++ rtw_hal_get_hwreg(padapter, HW_VAR_PID, (u8 *)&PID); ++ len += snprintf(page + len, count - len, ++ "%04x\n", ++ PID ++ ); ++ ++ *eof = 1; ++ return len; ++} ++ + int proc_get_rssi_disp(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +@@ -703,7 +1221,117 @@ + return len; + + } ++ ++int proc_set_best_channel(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_ext_priv *pmlmeext = &padapter->mlmeextpriv; ++ char tmp[32]; ++ ++ if(count < 1) ++ return -EFAULT; ++ ++ if(buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) ++ { ++ int i; ++ for(i = 0; pmlmeext->channel_set[i].ChannelNum != 0; i++) ++ { ++ pmlmeext->channel_set[i].rx_count = 0; ++ } ++ ++ DBG_871X("set %s\n", "Clean Best Channel Count"); ++ } ++ ++ return count; ++} + #endif /* CONFIG_FIND_BEST_CHANNEL */ ++ ++#if defined(DBG_CONFIG_ERROR_DETECT) ++#include ++int proc_get_sreset(char *page, char **start, off_t offset, int count, int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ struct mlme_priv *pmlmepriv = &(padapter->mlmepriv); + ++ int len = 0; ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_sreset(struct file *file, const char *buffer, unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ s32 trigger_point; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%d", &trigger_point); ++ ++ if (trigger_point == SRESET_TGP_NULL) ++ rtw_hal_sreset_reset(padapter); ++ else ++ sreset_set_trigger_point(padapter, trigger_point); ++ } ++ ++ return count; ++ ++} ++#endif /* DBG_CONFIG_ERROR_DETECT */ ++ ++#ifdef CONFIG_DM_ADAPTIVITY ++int proc_get_dm_adaptivity(char *page, char **start, ++ off_t offset, int count, ++ int *eof, void *data) ++{ ++ struct net_device *dev = data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ int len = 0; ++ ++ len += dm_adaptivity_get_parm_str(padapter, page, count); ++ ++ *eof = 1; ++ return len; ++} ++ ++int proc_set_dm_adaptivity(struct file *file, const char *buffer, ++ unsigned long count, void *data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ _adapter *padapter = (_adapter *)rtw_netdev_priv(dev); ++ char tmp[32]; ++ u32 TH_L2H_ini; ++ s8 TH_EDCCA_HL_diff; ++ u32 IGI_Base; ++ int ForceEDCCA; ++ u8 AdapEn_RSSI; ++ u8 IGI_LowerBound; ++ ++ if (count < 1) ++ return -EFAULT; ++ ++ if (buffer && !copy_from_user(tmp, buffer, sizeof(tmp))) { ++ ++ int num = sscanf(tmp, "%x %hhd %x %d %hhu %hhu", ++ &TH_L2H_ini, &TH_EDCCA_HL_diff, &IGI_Base, &ForceEDCCA, &AdapEn_RSSI, &IGI_LowerBound); ++ ++ if (num != 6) ++ return count; ++ ++ dm_adaptivity_set_parm(padapter, (s8)TH_L2H_ini, TH_EDCCA_HL_diff, (s8)IGI_Base, (bool)ForceEDCCA, AdapEn_RSSI, IGI_LowerBound); ++ } ++ ++ return count; ++} ++#endif /* CONFIG_DM_ADAPTIVITY */ ++ + #endif + +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_eeprom.c 2014-04-28 00:43:45.000000000 +0000 +@@ -16,8 +16,7 @@ + * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA + * + * +- +-******************************************************************************/ ++ ******************************************************************************/ + #define _RTW_EEPROM_C_ + + #include +Index: linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c +=================================================================== +--- linux-3.10-3.10.11.orig/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c 2014-04-28 00:42:37.000000000 +0000 ++++ linux-3.10-3.10.11/drivers/net/wireless/rtl8192cu/core/rtw_ieee80211.c 2014-04-28 00:43:45.000000000 +0000 +@@ -25,7 +25,27 @@ + #include + #include + +- ++u8 RTW_WPA_OUI_TYPE[] = { 0x00, 0x50, 0xf2, 1 }; ++u16 RTW_WPA_VERSION = 1; ++u8 WPA_AUTH_KEY_MGMT_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x50, 0xf2, 1 }; ++u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x50, 0xf2, 2 }; ++u8 WPA_CIPHER_SUITE_NONE[] = { 0x00, 0x50, 0xf2, 0 }; ++u8 WPA_CIPHER_SUITE_WEP40[] = { 0x00, 0x50, 0xf2, 1 }; ++u8 WPA_CIPHER_SUITE_TKIP[] = { 0x00, 0x50, 0xf2, 2 }; ++u8 WPA_CIPHER_SUITE_WRAP[] = { 0x00, 0x50, 0xf2, 3 }; ++u8 WPA_CIPHER_SUITE_CCMP[] = { 0x00, 0x50, 0xf2, 4 }; ++u8 WPA_CIPHER_SUITE_WEP104[] = { 0x00, 0x50, 0xf2, 5 }; ++ ++u16 RSN_VERSION_BSD = 1; ++u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X[] = { 0x00, 0x0f, 0xac, 1 }; ++u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X[] = { 0x00, 0x0f, 0xac, 2 }; ++u8 RSN_CIPHER_SUITE_NONE[] = { 0x00, 0x0f, 0xac, 0 }; ++u8 RSN_CIPHER_SUITE_WEP40[] = { 0x00, 0x0f, 0xac, 1 }; ++u8 RSN_CIPHER_SUITE_TKIP[] = { 0x00, 0x0f, 0xac, 2 }; ++u8 RSN_CIPHER_SUITE_WRAP[] = { 0x00, 0x0f, 0xac, 3 }; ++u8 RSN_CIPHER_SUITE_CCMP[] = { 0x00, 0x0f, 0xac, 4 }; ++u8 RSN_CIPHER_SUITE_WEP104[] = { 0x00, 0x0f, 0xac, 5 }; + //----------------------------------------------------------- + // for adhoc-master to generate ie and provide supported-rate to fw + //----------------------------------------------------------- +@@ -147,7 +167,58 @@ + _func_exit_; + } + ++inline u8 *rtw_set_ie_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, ++ u8 new_ch, u8 ch_switch_cnt) ++{ ++ u8 ie_data[3]; ++ ++ ie_data[0] = ch_switch_mode; ++ ie_data[1] = new_ch; ++ ie_data[2] = ch_switch_cnt; ++ return rtw_set_ie(buf, WLAN_EID_CHANNEL_SWITCH, 3, ie_data, buf_len); ++} ++ ++inline u8 secondary_ch_offset_to_hal_ch_offset(u8 ch_offset) ++{ ++ if (ch_offset == SCN) ++ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++ else if(ch_offset == SCA) ++ return HAL_PRIME_CHNL_OFFSET_UPPER; ++ else if(ch_offset == SCB) ++ return HAL_PRIME_CHNL_OFFSET_LOWER; + ++ return HAL_PRIME_CHNL_OFFSET_DONT_CARE; ++} ++ ++inline u8 hal_ch_offset_to_secondary_ch_offset(u8 ch_offset) ++{ ++ if (ch_offset == HAL_PRIME_CHNL_OFFSET_DONT_CARE) ++ return SCN; ++ else if(ch_offset == HAL_PRIME_CHNL_OFFSET_LOWER) ++ return SCB; ++ else if(ch_offset == HAL_PRIME_CHNL_OFFSET_UPPER) ++ return SCA; ++ ++ return SCN; ++} ++ ++inline u8 *rtw_set_ie_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset) ++{ ++ return rtw_set_ie(buf, WLAN_EID_SECONDARY_CHANNEL_OFFSET, 1, &secondary_ch_offset, buf_len); ++} ++ ++inline u8 *rtw_set_ie_mesh_ch_switch_parm(u8 *buf, u32 *buf_len, u8 ttl, ++ u8 flags, u16 reason, u16 precedence) ++{ ++ u8 ie_data[6]; ++ ++ ie_data[0] = ttl; ++ ie_data[1] = flags; ++ RTW_PUT_LE16((u8*)&ie_data[2], reason); ++ RTW_PUT_LE16((u8*)&ie_data[4], precedence); ++ ++ return rtw_set_ie(buf, 0x118, 6, ie_data, buf_len); ++} + + /*---------------------------------------------------------------------------- + index: the information element id index, limit is the limit for search +@@ -185,6 +256,104 @@ + return NULL; + } + ++/** ++ * rtw_get_ie_ex - Search specific IE from a series of IEs ++ * @in_ie: Address of IEs to search ++ * @in_len: Length limit from in_ie ++ * @eid: Element ID to match ++ * @oui: OUI to match ++ * @oui_len: OUI length ++ * @ie: If not NULL and the specific IE is found, the IE will be copied to the buf starting from the specific IE ++ * @ielen: If not NULL and the specific IE is found, will set to the length of the entire IE ++ * ++ * Returns: The address of the specific IE found, or NULL ++ */ ++u8 *rtw_get_ie_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen) ++{ ++ uint cnt; ++ u8 *target_ie = NULL; ++ ++ ++ if(ielen) ++ *ielen = 0; ++ ++ if(!in_ie || in_len<=0) ++ return target_ie; ++ ++ cnt = 0; ++ ++ while(cnt='0')&&(ch<='9')) + return ch - '0'; +@@ -1030,16 +1197,23 @@ + return 0xff; + } + ++u8 str_2char2num(u8 hch, u8 lch); + u8 str_2char2num(u8 hch, u8 lch) + { + return ((key_char2num(hch) * 10 ) + key_char2num(lch)); + } + ++u8 key_2char2num(u8 hch, u8 lch); + u8 key_2char2num(u8 hch, u8 lch) + { + return ((key_char2num(hch) << 4) | key_char2num(lch)); + } + ++u8 convert_ip_addr(u8 hch, u8 mch, u8 lch) ++{ ++ return ((key_char2num(hch) * 100) + (key_char2num(mch) * 10 ) + key_char2num(lch)); ++} ++ + extern char* rtw_initmac; + void rtw_macaddr_cfg(u8 *mac_addr) + { +@@ -1074,10 +1248,10 @@ + mac[5] = 0x00; + // use default mac addresss + _rtw_memcpy(mac_addr, mac, ETH_ALEN); +- DBG_8192C("MAC Address from efuse error, assign default one !!!\n"); ++ DBG_871X("MAC Address from efuse error, assign default one !!!\n"); + } + +- DBG_8192C("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); ++ DBG_871X("rtw_macaddr_cfg MAC Address = "MAC_FMT"\n", MAC_ARG(mac_addr)); + } + + void dump_ies(u8 *buf, u32 buf_len) { +@@ -1122,6 +1296,77 @@ + } + + #ifdef CONFIG_P2P ++/** ++ * rtw_get_p2p_merged_len - Get merged ie length from muitiple p2p ies. ++ * @in_ie: Pointer of the first p2p ie ++ * @in_len: Total len of muiltiple p2p ies ++ * Returns: Length of merged p2p ie length ++ */ ++u32 rtw_get_p2p_merged_ies_len(u8 *in_ie, u32 in_len) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; ++ int i=0; ++ int j=0, len=0; ++ ++ while( i < in_len) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie+ i); ++ ++ if( pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) ++ { ++ len += pIE->Length-4; // 4 is P2P OUI length, don't count it in this loop ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return len + 4; // Append P2P OUI length at last. ++} ++ ++/** ++ * rtw_p2p_merge_ies - Merge muitiple p2p ies into one ++ * @in_ie: Pointer of the first p2p ie ++ * @in_len: Total len of muiltiple p2p ies ++ * @merge_ie: Pointer of merged ie ++ * Returns: Length of merged p2p ie ++ */ ++int rtw_p2p_merge_ies(u8 *in_ie, u32 in_len, u8 *merge_ie) ++{ ++ PNDIS_802_11_VARIABLE_IEs pIE; ++ u8 len = 0; ++ u8 OUI[4] = { 0x50, 0x6f, 0x9a, 0x09 }; ++ u8 ELOUI[6] = { 0xDD, 0x00, 0x50, 0x6f, 0x9a, 0x09 }; //EID;Len;OUI, Len would copy at the end of function ++ int i=0; ++ ++ if( merge_ie != NULL) ++ { ++ //Set first P2P OUI ++ _rtw_memcpy(merge_ie, ELOUI, 6); ++ merge_ie += 6; ++ ++ while( i < in_len) ++ { ++ pIE = (PNDIS_802_11_VARIABLE_IEs)(in_ie+ i); ++ ++ // Take out the rest of P2P OUIs ++ if( pIE->ElementID == _VENDOR_SPECIFIC_IE_ && _rtw_memcmp(pIE->data, OUI, 4) ) ++ { ++ _rtw_memcpy( merge_ie, pIE->data +4, pIE->Length -4); ++ len += pIE->Length-4; ++ merge_ie += pIE->Length-4; ++ } ++ ++ i += (pIE->Length + 2); ++ } ++ ++ return len + 4; // 4 is for P2P OUI ++ ++ } ++ ++ return 0; ++} ++ + void dump_p2p_ie(u8 *ie, u32 ie_len) { + u8* pos = (u8*)ie; + u8 id; +@@ -1154,7 +1399,7 @@ + * + * Returns: The address of the P2P IE found, or NULL + */ +-u8 *rtw_get_p2p_ie(u8 *in_ie, uint in_len, u8 *p2p_ie, uint *p2p_ielen) ++u8 *rtw_get_p2p_ie(u8 *in_ie, int in_len, u8 *p2p_ie, uint *p2p_ielen) + { + uint cnt = 0; + u8 *p2p_ie_ptr; +@@ -1166,7 +1411,12 @@ + while(cnt MAX_IE_SZ)) { ++#ifdef PLATFORM_LINUX ++ dump_stack(); ++#endif ++ return NULL; ++ } + if( ( eid == _VENDOR_SPECIFIC_IE_ ) && ( _rtw_memcmp( &in_ie[cnt+2], p2p_oui, 4) == _TRUE ) ) + { + p2p_ie_ptr = in_ie + cnt; +@@ -1215,7 +1465,7 @@ + if(len_attr) + *len_attr = 0; + +- if ( ( p2p_ie[0] != _VENDOR_SPECIFIC_IE_ ) || ++ if ( !p2p_ie || ( p2p_ie[0] != _VENDOR_SPECIFIC_IE_ ) || + ( _rtw_memcmp( p2p_ie + 2, p2p_oui , 4 ) != _TRUE ) ) + { + return attr_ptr; +@@ -1381,8 +1631,10 @@ + } + } + ++#endif //CONFIG_P2P ++ + #ifdef CONFIG_WFD +-int rtw_get_wfd_ie(u8 *in_ie, uint in_len, u8 *wfd_ie, uint *wfd_ielen) ++int rtw_get_wfd_ie(u8 *in_ie, int in_len, u8 *wfd_ie, uint *wfd_ielen) + { + int match; + uint cnt = 0; +@@ -1390,6 +1642,12 @@ + + + match=_FALSE; ++ ++ if ( in_len < 0 ) ++ { ++ return match; ++ } ++ + while(cnt